build from:
c754b0d Version: DDR Version 1.24 20191016
update feature:
5ed0e6d lpddr4: add support multi frequency
1eb26fb RK3399: ddr: support choice uart by g_uart_info
Change-Id: I128678613bd2eb3fcfe857cab9af63a6ed2786ed
Signed-off-by: YouMin Chen <cym@rock-chips.com>
We have deleted other uart bin file.If you want to generate other uart
bin file, please use ./tools/ddrbin_tool as follow:
1. modify "ddrbin_param.txt", choose ddr frequency, uart info.
2. run "ddrbin_tool" with argument 1: ddrbin_param.txt, argument 2: ddr
bin file.
build from:
ec2214e rockchip: rk3308: dram_init: updata to version 1.29
Update feature:
b1df665 drivers: ram: rockchip: rk3308: set phy dll delay
in different freq
73cb0bb drivers: ram: rockchip: rk3308: reduce ddr.bin size
a83ae48 drivers: ram: rockchip: rk3308: disable ddr standby
if disable sr or pd
0eb4bef drivers: ram: rockchip: rk3308: remove CONFIG_RK3308_ODT_ENABLE
245b957 rockchip: rk3308: dram_init: add surpport uart0~uart4 iomux
Change-Id: I7b84fa65f2671a348a36ea0529dcbcf518d452b5
Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
from commit: I90d1f648b68a01ee125a045907fee9d3eec2129a
1.Remove Nor vendor partition
2.Support SPI Nor backup GPT
Change-Id: I00dc03d483e023128a80016cfbf5cfd41eed5f76
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
from commit: 2d08d469508ef9890e8f85e1a2ae3e94655c8602
invalid icache before run bl31
Change-Id: I65e35f54cc44daf5ba2684e96d3e726bd915ba9c
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
tool version: v1.00 20190920
This tool support modifying ddr frequency and uart infomation.
See tools/ddrbin_tool_user_guide.txt for more detail.
Change-Id: I1d634395c3cb0635a61fe8f227242523b926cd1b
Signed-off-by: Tang Yun ping <typ@rock-chips.com>
Build from commit:
30f1405 plat: rk3308: change BL31 offset from 0x10000 to 0x40000 on AArch64
Update feature:
30f1405 plat: rk3308: change BL31 offset from 0x10000 to 0x40000 on AArch64
Change-Id: If6039c5daf6e1a14f0fd145330a79c7b6050c5ad
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Build from ATF commit:
ca3dd02 plat: px30: set all region as secure to all master
update feature:
ca3dd02 plat: px30: set all region as secure to all master
a9dd46e plat: px30: change bl31_base to 0x40000
31ff1d0 plat: rockchip: set "plat_uart_base=0" if uart disable
Change-Id: Icfb591a14440257aa9b84ce4e9da0c9d7892d1fb
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
Build from ATF commit:
ca3dd02 plat: px30: set all region as secure to all master
update feature:
ca3dd02 plat: px30: set all region as secure to all master
a9dd46e plat: px30: change bl31_base to 0x40000
31ff1d0 plat: rockchip: set "plat_uart_base=0" if uart disable
Change-Id: Ie0db861255ab5f0507ee91302ef23d9dbd175f70
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
from commit: 32687efbfe62f4a38c6871133338c92c8381c227
1.src: platform rk3308: add icache clean
Change-Id: If70d017e08eebfcd314864fbcabb8f45c7d86653
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
from commit: 72205102d1643973a7ec05064b2e31982bd6a9f9
1.add new SPI flash GD5F2GQ5UEYIG
Change-Id: Ic9d395db6e43c33815a2ce07faf96bd906644ecf
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
Build from optee commit in develop-next branch:
02f0e5be static ta: do not return error if head.magic != TEE_SVC_STORAGE_MAGIC
Update feature:
c24aaddd rk1808: efuse: disable auto mode after R&W efuse
ec94b753 plat-rockchip: fix compile fail for vendor props
55bcc440 plat-rockchip: pta: add OS service pseudo ta
Change-Id: Iec7cdc1b2bd5798d4a27186c093cf6ba5637e2ba
Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>
Build from optee commit in develop-next branch:
02f0e5be static ta: do not return error if head.magic != TEE_SVC_STORAGE_MAGIC
Update feature:
c24aaddd rk1808: efuse: disable auto mode after R&W efuse
ec94b753 plat-rockchip: fix compile fail for vendor props
55bcc440 plat-rockchip: pta: add OS service pseudo ta
Change-Id: I76a5165c6aeda8065c9d586faa136ab7930668f1
Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>
Build from optee commit in develop-next branch:
02f0e5be static ta: do not return error if head.magic != TEE_SVC_STORAGE_MAGIC
Update feature:
c24aaddd rk1808: efuse: disable auto mode after R&W efuse
ec94b753 plat-rockchip: fix compile fail for vendor props
55bcc440 plat-rockchip: pta: add OS service pseudo ta
Change-Id: I42c127744c26e28bb60363e8a96a258873beb957
Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>
Build from optee commit in develop-next branch:
02f0e5be static ta: do not return error if head.magic != TEE_SVC_STORAGE_MAGIC
Update feature:
c24aaddd rk1808: efuse: disable auto mode after R&W efuse
ec94b753 plat-rockchip: fix compile fail for vendor props
55bcc440 plat-rockchip: pta: add OS service pseudo ta
Change-Id: Ib730abfcf4744436919da51fe1a58d44e87d4519
Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>
Build from optee commit in develop branch:
45f58ab9 static ta: do not return error if head.magic != TEE_SVC_STORAGE_MAGIC
Update feature:
19950c70 rk3399: fix secure ddr region setting error
da2bcfdc sta: rk_os_service: add permission check
64eedbd9 ree fs: recreate file if open meta file fail
Change-Id: Ia5cca9fecab4b1ccec517919e877797e4e1093a4
Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>
Build from optee commit in develop branch:
45f58ab9 static ta: do not return error if head.magic != TEE_SVC_STORAGE_MAGIC
Update feature:
19950c70 rk3399: fix secure ddr region setting error
da2bcfdc sta: rk_os_service: add permission check
64eedbd9 ree fs: recreate file if open meta file fail
Change-Id: Ia1640251803e79daaf968019057924b659fcb481
Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>
Build from optee commit in develop branch:
45f58ab9 static ta: do not return error if head.magic != TEE_SVC_STORAGE_MAGIC
Update feature:
19950c70 rk3399: fix secure ddr region setting error
da2bcfdc sta: rk_os_service: add permission check
64eedbd9 ree fs: recreate file if open meta file fail
Change-Id: Ia954402f26b9f1ecec17bb63dcfacf7a773d9ec8
Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>
Build from optee commit in develop branch:
45f58ab9 static ta: do not return error if head.magic != TEE_SVC_STORAGE_MAGIC
Update feature:
19950c70 rk3399: fix secure ddr region setting error
da2bcfdc sta: rk_os_service: add permission check
64eedbd9 ree fs: recreate file if open meta file fail
Change-Id: I56bb1298c5b1a63ac622d766d41b8dce56988a3c
Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>
build from optee commit in develop-rk3228 branch:
be1b074d static ta: do not return error if head.magic != TEE_SVC_STORAGE_MAGIC
update feature:
746912b1 rk322x: ddr: set pll bypass if this pll was in power-down
28bcc014 plat-rockchip: support rv1108 soc
6cf8251c plat: rk312x: support suspend from uboot
Change-Id: I1a0e1f75ea25c0d22659ddb123d1cae40246b6ec
Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>
build from optee commit in develop-rk3228 branch:
be1b074d static ta: do not return error if head.magic != TEE_SVC_STORAGE_MAGIC
update feature:
746912b1 rk322x: ddr: set pll bypass if this pll was in power-down
28bcc014 plat-rockchip: support rv1108 soc
6cf8251c plat: rk312x: support suspend from uboot
Change-Id: I476bca58edba2218b2972fa05a8939ec512876b8
Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>
build from optee commit in develop-rk3228 branch:
be1b074d static ta: do not return error if head.magic != TEE_SVC_STORAGE_MAGIC
update feature:
746912b1 rk322x: ddr: set pll bypass if this pll was in power-down
28bcc014 plat-rockchip: support rv1108 soc
6cf8251c plat: rk312x: support suspend from uboot
Change-Id: I45d45ec3491440941819c7f7fe9868a315465de7
Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>
build from optee commit in develop-rk3228 branch:
be1b074d static ta: do not return error if head.magic != TEE_SVC_STORAGE_MAGIC
update feature:
746912b1 rk322x: ddr: set pll bypass if this pll was in power-down
28bcc014 plat-rockchip: support rv1108 soc
6cf8251c plat: rk312x: support suspend from uboot
Change-Id: I4b8916f3f27dc144e3690bda9a8927ba8a03cd00
Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>
build from optee commit in develop-rk3228 branch:
746912b rk322x: ddr: set pll bypass if this pll was in power-down
update feature:
746912b rk322x: ddr: set pll bypass if this pll was in power-down
Change-Id: I75de7f8d5ed1873b38fabb80d789be4349dc4c9a
Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
Build from ATF commit:
22b599a plat: rk3399: ddr: fix lpddr4 read write-only register bit
update feature:
5a090b1 plat: rk322xh: ddr: set pll bypass if this pll was in power-down
c0933ee rockchip: common: atags: sync from u-boot
b0cf3d1 rockchip: sram: add pmu_sram section defines
c2b0155 plat: rockchip: move the function about dram spec timing to common
Change-Id: I78d001b2e0750d9df9860f11180856d1322e60ce
Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
