add support load elf format trust.img and support boot from sd card
Change-Id: I399f107b137e45ab5f1deacbfbc04d0a33d18a12
Signed-off-by: chenfen <chenfen@rock-chips.com>
Naming rule for binaries locate at tools/rk_tools/bin/:
ddrbin
miniloader
atf/tee
version
Change-Id: I92461b4c60fd5038b0b0d6e3110d343961d6e5f0
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
1. Files to be merged in rk_tools should rename as format:
[chip]_[module]_[feature]_[version].[postfix]
such as "rk322xh_ddr3_800MHz_v1.00.bin"
2. Output two-level loader, format such as "rk322xh_loader_v1.00.238.bin",
v1.00.238 means its ddr version is v1.06, and miniloader version is v2.38.
3. As for output one-level loader, format such as "rk3288_bootloader_v1.01.bin",
v1.01 means its ddr version is v1.01.
Change-Id: Ia492b9c76e2396ff246585d5fbbb34c248b55044
Signed-off-by: William Zhang <william.zhang@rock-chips.com>
compile cmd:
make rk3328_box_defconfig
make ARCHV=aarch64 or ./mkv8.sh
ini, must modify this two file:
tools/rk_tools/RKBOOT/RK3328MINIALL.ini
tools/rk_tools/RKTRUST/RK3328TRUST.ini
Change-Id: Icd97d45c00015844c8645806daa76cd42ad88f54
Signed-off-by: William Zhang <william.zhang@rock-chips.com>
In secure boot, check secure flag on otp, instead of efuse.
Change-Id: I9d2293436c7a8f3dd1d1ee8151a315a00d35c9cb
Signed-off-by: William Zhang <william.zhang@rock-chips.com>
increase rk322x_tee_ta_v1.6.bin for with ta in rk3229
Change-Id: I657ae3016b165ab59a6e54c409b216797a8c8961
Signed-off-by: sean.huang <sean.huang@rock-chips.com>
Don't copy 1024 bits RSA_KEY_DATA to uboot, that means not
support soft sign.
Change-Id: I9abc52d9630c188b2d13a9a6f3512586d5dbbc03
Signed-off-by: William Zhang <william.zhang@rock-chips.com>
1. enable read efuse_non_secure data for kernel
2. config SGRF according to efuse_non_secure data
Change-Id: Ica3ca04ba1d8dbbfed256bb1ee270fea2db5bab2
Signed-off-by: William Zhang <william.zhang@rock-chips.com>
when detect gpio wakeup before wfi instruction, give up system
suspend and resume plls
Change-Id: I70713d6e5e25e654ea0a4089e7690dc72591515d
Signed-off-by: Jianhong Chen <chenjh@rock-chips.com>
This patch intend to support save the registers of the DDR controller
and PHY before suspend, and restore them after resume.
Change-Id: Ia2cc6664baa4116be4587e6ad3023ce325270fc0
Signed-off-by: Shengfei xu <xsf@rock-chips.com>
To fix suspend issue during ddr changing frequency, build based on
the commit of arm-trusted-firmware:
6b958c9c6fced39be0e86ccbbc5aa61aef8b3315
Change-Id: Ib1df36e4a706a782262b9ad24c8f5c12c74e751c
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Support soft sign 1024bits RSA key only
Change-Id: Ie1e9aaf6cbe362e1c9e4739ce44bd2548b97bd59
Signed-off-by: William Zhang <william.zhang@rock-chips.com>
compile cmd:
make px5_defconfig
make ARCHV=aarch64
ini, must modify this two file:
tools/rk_tools/RKBOOT/PX5MINIALL.ini
tools/rk_tools/RKTRUST/PX5TRUST.ini
Change-Id: I81250ebc3b49b59cff64a05f86d7ed19a13a6a7d
Signed-off-by: Jason Song <sxj@rock-chips.com>
Amend msch ddrconfig register write error and make sure row numbers
configure in msch is equal to row numbers configure in ddr controller
Change-Id: I03f673075ffc68f177a65e08a50896144eda1b4b
Signed-off-by: Tang Yun ping <typ@rock-chips.com>
All DRAM type init frequency increase to 400MHz,
because some type of screen display gilitter before
kernel set DDR rate to high frequency.
Change-Id: I519b606db92e10ae6807efecf361fe2379cbf28d
Signed-off-by: Hecanyang <hcy@rock-chips.com>
