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mach-k3: enable mmu after reserved memory is unmapped

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Currently the sequence to enable caches for the A53/A72 core on K3
devices looks as follows:

 1. Map entire DDR banks
 2. Setup page tables (done by mmu_setup)
 3. Enable MMU
 4. Unmap reserved-memory regions
 5. Enable caches

However there is a brief period of execution between #3 and #4 where the
core can issue speculative accesses to the entire DDR space (including
the reserved-memory regions) despite the caches being disabled.

A firewall exception is triggered whenever such speculative access is
made to secure DDR region of TFA or OP-TEE. This patch fixes the issue
by re-ordering the sequence as follows:

 1. Map entire DDR banks
 2. Setup page tables
 3. Unmap reserved-memory regions
 4. Enable MMU
 5. Enable caches

Fixes: f1c694b8fd ("mach-k3: map all banks using mem_map_from_dram_banks")
Reported-by: Suhaas Joshi <s-joshi@ti.com>
Signed-off-by: Anshul Dalal <anshuld@ti.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
This commit is contained in:
Anshul Dalal
2026-05-20 08:21:50 +05:30
committed by Tom Rini
parent b53128d528
commit 37e6b640ef
1 changed files with 1 additions and 1 deletions
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2
arch/arm/mach-k3/common.c
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@@ -279,7 +279,6 @@ void enable_caches(void)
__func__, fdt_strerror(ret));
mmu_setup();
mmu_enable();
if (CONFIG_K3_ATF_LOAD_ADDR >= CFG_SYS_SDRAM_BASE) {
ret = mmu_unmap_reserved_mem("tfa", true);
@@ -295,6 +294,7 @@ void enable_caches(void)
__func__, ret);
}
mmu_enable();
icache_enable();
dcache_enable();
}