Second set of u-boot-atmel fixes for 2021.01 cycle

This set includes very important fixes for: MMC booting on several
boards, drive strength on sam9x60ek mmc lines, compile issues for
timer.c old driver, removal of unwanted access to sam9x60 bit for
oscillator bypass mode, and eeproms read on sama5d2_icp.
This commit is contained in:
Tom Rini
2020-12-11 15:55:17 -05:00
6 changed files with 29 additions and 19 deletions

View File

@@ -53,19 +53,19 @@
status = "okay";
eeprom@50 {
compatible = "atmel,24c32";
compatible = "microchip,24aa02e48";
reg = <0x50>;
pagesize = <16>;
};
eeprom@52 {
compatible = "atmel,24c32";
compatible = "microchip,24aa02e48";
reg = <0x52>;
pagesize = <16>;
};
eeprom@53 {
compatible = "atmel,24c32";
compatible = "microchip,24aa02e48";
reg = <0x53>;
pagesize = <16>;
};

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@@ -153,12 +153,18 @@
sdhci0 {
pinctrl_sdhci0: sdhci0 {
atmel,pins =
<AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_DRIVE_STRENGTH_DEFAULT /* PA17 CK periph A with pullup */
AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA16 CMD periph A with pullup */
AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA15 DAT0 periph A */
AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA18 DAT1 periph A with pullup */
AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA19 DAT2 periph A with pullup */
AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA20 DAT3 periph A with pullup */
<AT91_PIOA 17 AT91_PERIPH_A
(AT91_PINCTRL_DRIVE_STRENGTH_HI | AT91_PINCTRL_SLEWRATE_ENA) /* PA17 CK periph A with pullup */
AT91_PIOA 16 AT91_PERIPH_A
(AT91_PINCTRL_PULL_UP | AT91_PINCTRL_DRIVE_STRENGTH_HI | AT91_PINCTRL_SLEWRATE_ENA) /* PA16 CMD periph A with pullup */
AT91_PIOA 15 AT91_PERIPH_A
(AT91_PINCTRL_PULL_UP | AT91_PINCTRL_DRIVE_STRENGTH_HI | AT91_PINCTRL_SLEWRATE_ENA) /* PA15 DAT0 periph A */
AT91_PIOA 18 AT91_PERIPH_A
(AT91_PINCTRL_PULL_UP | AT91_PINCTRL_DRIVE_STRENGTH_HI | AT91_PINCTRL_SLEWRATE_ENA) /* PA18 DAT1 periph A with pullup */
AT91_PIOA 19 AT91_PERIPH_A
(AT91_PINCTRL_PULL_UP | AT91_PINCTRL_DRIVE_STRENGTH_HI | AT91_PINCTRL_SLEWRATE_ENA) /* PA19 DAT2 periph A with pullup */
AT91_PIOA 20 AT91_PERIPH_A
(AT91_PINCTRL_PULL_UP | AT91_PINCTRL_DRIVE_STRENGTH_HI | AT91_PINCTRL_SLEWRATE_ENA)>; /* PA20 DAT3 periph A with pullup */
};
};
};

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@@ -6,13 +6,15 @@
# (C) Copyright 2013
# Bo Shen <voice.shen@atmel.com>
obj-$(CONFIG_SAMA5D2) += sama5d2_devices.o
obj-$(CONFIG_SAMA5D3) += sama5d3_devices.o
obj-$(CONFIG_SAMA5D4) += sama5d4_devices.o
obj-$(CONFIG_SAMA5D2) += sama5d2_devices.o clock.o
obj-$(CONFIG_SAMA5D3) += sama5d3_devices.o clock.o
obj-$(CONFIG_SAMA5D4) += sama5d4_devices.o clock.o
obj-$(CONFIG_SAMA7G5) += sama7g5_devices.o
obj-y += clock.o
obj-y += cpu.o
obj-y += reset.o
ifeq ($(CONFIG_ATMEL_PIT_TIMER),)
ifneq ($(CONFIG_ATMEL_PIT_TIMER),y)
ifneq ($(CONFIG_MCHP_PIT64B_TIMER),y)
# old non-DM timer driver
obj-y += timer.o
endif
endif

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@@ -24,7 +24,11 @@
int arch_cpu_init(void)
{
#if defined(CONFIG_CLK_CCF)
return 0;
#else
return at91_clock_init(CONFIG_SYS_AT91_MAIN_CLOCK);
#endif
}
void arch_preboot_os(void)

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@@ -382,7 +382,6 @@ static int sam9x60_clk_probe(struct udevice *dev)
const char *p[10];
unsigned int cm[10], m[10], *tmpclkmux, *tmpmux;
struct clk clk, *c;
bool main_osc_bypass;
int ret, muxallocindex = 0, clkmuxallocindex = 0, i;
static const struct clk_range r = { 0, 0 };
@@ -440,8 +439,6 @@ static int sam9x60_clk_probe(struct udevice *dev)
if (ret)
goto fail;
main_osc_bypass = dev_read_bool(dev, "atmel,main-osc-bypass");
/* Register main rc oscillator. */
c = at91_clk_main_rc(base, clk_names[ID_MAIN_RC_OSC],
clk_names[ID_MAIN_RC]);
@@ -453,7 +450,7 @@ static int sam9x60_clk_probe(struct udevice *dev)
/* Register main oscillator. */
c = at91_clk_main_osc(base, clk_names[ID_MAIN_OSC],
clk_names[ID_MAIN_XTAL], main_osc_bypass);
clk_names[ID_MAIN_XTAL], false);
if (IS_ERR(c)) {
ret = PTR_ERR(c);
goto fail;

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@@ -86,7 +86,8 @@ static int atmel_sdhci_probe(struct udevice *dev)
return -EINVAL;
ret = clk_enable(&clk);
if (ret)
/* return error only if the clock really has a clock enable func */
if (ret && ret != -ENOSYS)
return ret;
ret = mmc_of_parse(dev, &plat->cfg);