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https://source.denx.de/u-boot/u-boot.git
synced 2026-06-02 09:46:37 +03:00
arch: arm: dts: k3-am642-phyboard-electra: Drop bootph properties
Remove bootph properties no longer needed. These are now handled in upstream Linux device trees. While at it, drop the vtt-supply which is a leftover from the very initial prototype of this board. Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
This commit is contained in:
@@ -17,34 +17,6 @@
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stdout-path = "serial2:115200n8";
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tick-timer = &main_timer0;
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};
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memory@80000000 {
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bootph-all;
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};
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};
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&cbass_main {
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bootph-all;
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};
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&dmsc {
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bootph-all;
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};
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&dmss {
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bootph-all;
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};
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&k3_clks {
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bootph-all;
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};
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&k3_pds {
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bootph-all;
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};
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&k3_reset {
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bootph-all;
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};
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&main_bcdma {
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@@ -61,68 +33,16 @@
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"cfg", "tchan", "rchan";
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};
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&main_conf {
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bootph-all;
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chipid@14 {
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bootph-all;
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};
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};
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&main_gpio0 {
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bootph-all;
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};
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&main_i2c0 {
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bootph-all;
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};
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&main_i2c0_pins_default {
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bootph-all;
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};
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&main_mmc1_pins_default {
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bootph-all;
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};
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&main_pktdma {
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bootph-all;
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reg = <0x00 0x485c0000 0x00 0x100>,
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<0x00 0x4a800000 0x00 0x20000>,
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<0x00 0x4aa00000 0x00 0x40000>,
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<0x00 0x4b800000 0x00 0x400000>,
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<0x00 0x485e0000 0x00 0x20000>,
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<0x00 0x484a0000 0x00 0x4000>,
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<0x00 0x484c0000 0x00 0x2000>,
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<0x00 0x48430000 0x00 0x4000>;
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reg-names = "gcfg", "rchanrt", "tchanrt", "ringrt", "cfg",
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"tchan", "rchan", "rflow";
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};
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&main_pmx0 {
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bootph-all;
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};
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&main_timer0 {
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bootph-all;
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clock-frequency = <200000000>;
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};
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&main_uart0 {
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bootph-all;
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};
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&main_uart0_pins_default {
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bootph-all;
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};
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&main_usb0_pins_default {
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bootph-all;
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};
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&ospi0 {
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bootph-all;
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flash@0 {
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bootph-all;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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@@ -152,30 +72,6 @@
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};
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};
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&ospi0_pins_default {
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bootph-all;
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};
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&main_rti1 {
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status = "disabled";
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};
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&sdhci0 {
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bootph-all;
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};
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&sdhci1 {
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bootph-all;
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};
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&secure_proxy_main {
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bootph-all;
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};
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&usbss0 {
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bootph-all;
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};
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&usb0 {
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bootph-all;
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};
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@@ -45,20 +45,6 @@
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clock-frequency = <200000000>;
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bootph-pre-ram;
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};
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vtt_supply: vtt-supply {
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compatible = "regulator-fixed";
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regulator-name = "vtt";
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pinctrl-names = "default";
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pinctrl-0 = <&ddr_vtt_pins_default>;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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gpios = <&main_gpio0 14 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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regulator-always-on;
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regulator-boot-on;
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bootph-pre-ram;
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};
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};
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&cbass_main {
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@@ -70,10 +56,6 @@
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};
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};
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&cbass_mcu {
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bootph-pre-ram;
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};
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&dmsc {
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mboxes= <&secure_proxy_main 0>,
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<&secure_proxy_main 1>,
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@@ -83,24 +65,6 @@
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ti,secure-host;
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};
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&main_esm {
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bootph-pre-ram;
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};
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&main_gpio0 {
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bootph-pre-ram;
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};
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&main_pmx0 {
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bootph-pre-ram;
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ddr_vtt_pins_default: ddr-vtt-default-pins {
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bootph-pre-ram;
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pinctrl-single,pins = <
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AM64X_IOPAD(0x0038, PIN_OUTPUT_PULLUP, 7) /* (L18) OSPI0_CSN3.GPIO0_14 */
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>;
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};
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};
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/* timer init is called as part of rproc_start() while
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* starting System Firmware, so any clock/power-domain
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* operations will fail as SYSFW is not yet up and running.
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@@ -126,14 +90,6 @@
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/delete-property/ clock-names;
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};
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&mcu_esm {
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bootph-pre-ram;
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};
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&memorycontroller {
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vtt-supply = <&vtt_supply>;
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};
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&ospi0 {
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reg = <0x00 0x0fc40000 0x00 0x100>,
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<0x00 0x60000000 0x00 0x08000000>;
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