Simon Glass <sjg@chromium.org> says:
Each arch does something slightly different before booting the OS. Some
archs even do different things depending on the CPU type.
It is quite hard to know what actually happens in the final milliseconds
before the OS boot.
This series attempts to start cleaning up U-Boot in this area.
The basic intent is to create a new bootm_final() function which can be
called by all archs. It provides some flags for a couple of necessary
variations but otherwise it is generic.
All architectures are converted over to use this new function.
board_quiesce_devices() is moved into bootm_final() so that all archs
benefit from it.
This series fixes a bug in device_remove() is fixed where removing a
parent with specialised flags (e.g. DM_REMOVE_ACTIVE_ALL) could leave
children activated, since they do not match the flags. This fixes is
needed to avoid bootm_final() causing test failures on sandbox.
Future work could take this a little further:
- Convert EFI loader to use the same function
- Improve comments for cleanup_before_linux() across architectures
- Support fake-run tracing on all archs
Link: https://lore.kernel.org/r/20260306023638.2678886-1-sjg@chromium.org
When dm_remove_devices_active() removes devices using specialised flags
like DM_REMOVE_ACTIVE_ALL, a parent device may match (e.g. MMC has
DM_FLAG_OS_PREPARE) while its children do not. This deactivates the
parent but leaves children activated, an inconsistent state.
Later, when uclass_destroy() calls device_remove() with DM_REMOVE_NORMAL
on the already-deactivated parent, it returns early without touching the
children. The subsequent device_unbind() then fails because the children
are still activated.
Fix this by dropping only the DM_REMOVE_ACTIVE_ALL requirement for child
removal when the parent is being removed. This ensures children are
removed along with their parent, while still preserving other flags like
DM_REMOVE_NON_VITAL so that vital devices remain protected.
Signed-off-by: Simon Glass <simon.glass@canonical.com>
Move the flags_remove() call before device_chld_remove() and save the
result in a separate variable. This is just a refactoring with no
behaviour change, preparing for the next commit which needs to know
whether the parent will be removed before deciding how to remove its
children.
Signed-off-by: Simon Glass <simon.glass@canonical.com>
Quentin Schulz <quentin.schulz@cherry.de> says:
This migrates the last user of the legacy LED API, IMX233-OLinuXino and
net/bootp.c, to the modern LED framework.
I do have concern about being able to use BOOTP in SPL? In which case, I
should probably add an additional check on CONFIG_IS_ENABLED(LED) in
addition to IS_ENABLED(CONFIG_LED_BOOT)?
I haven't tested this as I do not own an IMX233-OLinuXino, so please
give this a try if you own this device.
Then, since there's no user left of this legacy API, it is entirely
removed.
Link: https://lore.kernel.org/r/20251120-legacy-led-removal-v1-0-369d44338358@cherry.de
No user of the legacy LED API anymore (except Sunxi with the PinePhone
but that is now a Sunxi-specific implementation), so let's remove
anything related.
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
- A fix for mt8188 clock oscillator rates.
- New driver for mt8189 clocks.
- The rest is a first wave of a larger effort to refactor and clean up the
mediatek clocks to replace various hacks that built up over time with
something that is easier to understand and maintain.
Add support for external clock parent type in MediaTek clock driver to
allow multiple external clock sources.
This is intended to eventually replace CLK_PARENT_XTAL which only allows
a single external clock source. Replacing CLK_PARENT_XTAL is not trivial
since it would required touching all chip-specific drivers. So that is
saved for another day.
Before this change, the only way to add additional external clocks was
to use a clock ID mapping and add the external clock in the fixed clocks
portion of the CLK_PARENT_TOPCKGEN clocks. After this change, such hacks
are no longer necessary and external clocks can be added in a cleaner
way.
Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260303-mtk-mt8189-clocks-v4-4-ee85f8dd2f0d@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
Add helper functions to check if a clock ID corresponds to a particular
clock type (mux, gate, fdiv). This simplifies the code and makes it more
readable.
Additionally, it removes the restriction that fdivs_offs < muxes_offs <
gates_offs by making the checking more strict in some places. This will
allow future drivers to not have to define a mapping to meet this
requirement.
Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260303-mtk-mt8189-clocks-v4-3-ee85f8dd2f0d@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
Refactor duplicate parent rate lookup code into a common function.
Instead of relying on rules like X is always the parent of Y, we use
the driver ops pointer to make sure we are actually getting the correct
parent clock device. This allows the same function to be called from
different clock types and will allow future chip-specific clock drivers
to not have to follow the rules as strictly.
Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260303-mtk-mt8189-clocks-v4-2-ee85f8dd2f0d@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
The XSPI SET GMID command is used to assign GMID ownership to the
requester, allowing access to protected XSPI control registers. This API
must be called in SPL if XSPI GMID-protected settings need to be
modified. Otherwise, XSPI configuration depends on the previous GMID
owner to provide the correct settings.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Add new driver to support NXP XSPI controller for NOR and NAND flash.
XSPI controller also uses a programmable sequence engine to provide
flexibility to support existing and future memory devices. It supports
single, dual, quad, octal modes of operation.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Alice Guo <alice.guo@nxp.com>
If CONFIG_CMD_FUSE is not enabled in imx93_11x11_evk_defconfig, then
compilation fails with various undefined references to 'fuse_read',
such as:
| .../arch/arm/mach-imx/imx9/soc.c:188:(.text.get_cpu_rev+0x38): undefined reference to `fuse_read'
therefore remove the 'fuse' command dependency in order to compile
fuse.c unconditionally to mitigate the issue.
Signed-off-by: Niko Mauno <niko.mauno@vaisala.com>
This patch is used to add the imx type string of i.MX952 so that the
i.MX952 CPU info can be printed.
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Multiple pads can drive the same module input pin, and a daisy chain
register is used to select the active input path. This patch defines
DAISY_OFFSET_IMX952 (0x460) and allows binding on i.MX952.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Get and enable a optional power gpio. This feature is ported
from the jh7110 pcie driver in Linux. VisionFive 2 Lite needs
this gpio to enable the PCI bus device (M.2 M-Key) power.
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
Per the SCSI SPC-4 specification, the standard inquiry data length
should not be less than 36 bytes. The current implementation uses 512
bytes, which causes detection failures on some UFS devices (e.g.,
Longsys) that do not expect a transfer length exceeding the standard
inquiry size.
Align the default standard inquiry length with the Linux kernel's
implementation (see drivers/scsi/scsi_scan.c), which uses 36 bytes as
the default. Devices requiring vendor-specific inquiry lengths should
be handled through quirk settings in the future.
Signed-off-by: ht.lin <ht.lin@mediatek.com>
Signed-off-by: Macpaul Lin <macpaul.lin@mediatek.com>
Reviewed-by: Marek Vasut <marek.vasut@mailbox.org>
Add SPL_PHY_J721E_WIZ configuration option to enable the WIZ SERDES
wrapper driver in SPL stage. This is required for PCIe boot support
where SERDES configuration must be done early in the boot sequence
before loading the bootloader image over PCIe.
Signed-off-by: Hrushikesh Salunke <h-salunke@ti.com>
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Add SPL_PHY_CADENCE_TORRENT configuration option to enable the Cadence
Torrent PHY driver in SPL stage. This is required for PCIe boot support
where SERDES configuration must be done early in the boot sequence
before loading the bootloader image over PCIe.
Signed-off-by: Hrushikesh Salunke <h-salunke@ti.com>
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
u-boot-dfu-20260316
DFU:
* Make DFU_WRITE_ALT symbol available outside of DFU
* Fix PCI subclass_code warning in spl_dfu
Usb Gadget:
* Mark udc_disconnect() as static
K3 OTP bits can only be programmed 25bits at a time. Limit the value
accordingly using a 25 bit mask.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Anshul Dalal <anshuld@ti.com>
Error out if readback value doesn't match the programmed value.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Anshul Dalal <anshuld@ti.com>
Use signed int format to print error codes so that its more readable
Fixes: ed5f2e5bed ("drivers: k3_fuse: Add fuse sub-system func calls")
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Anshul Dalal <anshuld@ti.com>
Pull request net-20260312.
net:
- Move network PHY under NETDEVICES
- s/DM_CLK/CLK/ in HIFEMAC_{ETH,MDIO}
- Add support for Airoha AN8811HB PHY
- airoha: PCS and MDIO support for Airoha AN7581 SoC
net-lwip:
- Fix issue when TFTP blocksize is >8192
- Adjust PBUF_POOL_SIZE/IP_REASS_MAX_PBUFS for better performance and
resource usage.
- Enable mii command for NET_LWIP
A number of network PHY drivers have Kconfig dependencies on various
network drivers under NETDEVICES. This is in addition to logical
dependencies of network PHYs needing network drivers. Resolve the
Kconfig problems by moving the network PHY lines to be after the network
devices, within the overall NETDEVICES guard.
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Jerome Forissier <jerome.forissier@arm.com>
For enabling the clock driver we use symbol CONFIG_CLK.
Select this symbol for the HiSilicon Fast Ethernet Controller driver.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Under single core boot platform, the secondary cores won't enter the
u-boot spl. Therefore we move the pl2 driver from u-boot to the Opensbi.
Signed-off-by: Nick Hu <nick.hu@sifive.com>
Signed-off-by: Jimmy Ho <jimmy.ho@sifive.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Tested on HiFive Unleashed and HiFive Unmatched, both SPIFlash and MMC boot.
Signed-off-by: Andreas Schwab <schwab@suse.de>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Current code just bind mt7531 mdio with it's driver, so mdio device may
not be probed and hense not usable.
This patch:
* Forces probing of mt7531 mdio for GDM1 port
* Renames the mt7531 mdio bus interface to 'mt7531-mdio'. We may have
multiple available MDIO, so the name 'mdio' isn't descriptive enough.
* Sets mdio bus for the GDM port device
Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
It's not possible to disable PCS support just now, an7581 u-boot will not
compile. This patch fixes an issue.
Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
Add required changes to call PCS function to configure the Serdes Port.
The Ethernet driver is adapted following Upstream Kernel node structure.
Function calling order is the same of Phylink upstream kernel.
With the PCS support, also add support for attaching PHY. With
"in-band-status" set in DT for the managed property, a rudimental
support for SFP module is present.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
