Commit Graph

97310 Commits

Author SHA1 Message Date
Simon Glass
9ecc1cabe1 vbe: Support loading SPL images
VBE needs to load different images from a FIT depending on the xPL phase
in use. The IH_PHASE value is used to select the image to load.

Add the required logic to handle this. For compatibility with the
SPL-loader driver, fill out a struct spl_image_info with the details
needed to boot the next phase.

This is good enough for VBE-simple but ABrec will need the full set of
bootstd features. So add a USE_BOOTMETH define to control this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2025-01-22 09:47:50 -06:00
Simon Glass
65250625c5 vbe: Support loading an FDT with the relocating loader
Add FDT support so that this can be copied down in memory after loading
and made available to the new image.

Signed-off-by: Simon Glass <sjg@chromium.org>
2025-01-22 09:47:50 -06:00
Simon Glass
ca055155f4 spl: Plumb in the relocating loader
This is fairly easy to use. The SPL loader sets up some fields in the
spl_image_info struct and calls spl_reloc_prepare(). When SPL is ready
to do the jump it must call spl_reloc_jump() instead of jump_to_image().

Add this logic.

Signed-off-by: Simon Glass <sjg@chromium.org>
2025-01-22 09:47:50 -06:00
Simon Glass
20ad3fa0e1 spl: Add support for a relocating jump to the next phase
When one xPL phase wants to jump to the next, the next phase must be
loaded into its required address. This means that the TEXT_BASE for the
two phases must be different and there cannot be any memory overlap
between the code used by the two phases. It also can mean that phases
need to be moved around to accommodate any size growth.

Having two xPL phases in SRAM at the same time can be tricky if SRAM
is limited, which it often is. It would be better if the second phase
could be loaded somewhere else, then decompressed into place over the
top of the first phase.

Introduce a relocating jump for xPL to support this. This selects a
suitable place to load the (typically compressed) next phase, copies
some decompression code out of the first phase, then jumps to this code
to decompress and start the next phase.

This feature makes it much easier to support Verified Boot for Embedded
(VBE) on RK3399 boards, which have 192KB of SRAM.

Signed-off-by: Simon Glass <sjg@chromium.org>
2025-01-22 09:47:50 -06:00
Simon Glass
bed7c4599d spl: Add a type for the jumper function
This function will be used by the relocating jumper too, so add a
typedef to the header file to avoid mismatches.

Signed-off-by: Simon Glass <sjg@chromium.org>
2025-01-22 09:47:50 -06:00
Simon Glass
d86bdb60b5 spl: Add fields for VBE
Add some fields to track the VBE state in SPL.

Signed-off-by: Simon Glass <sjg@chromium.org>
2025-01-22 09:47:50 -06:00
Simon Glass
df42d54b96 vbe: Support loading an FDT from the FIT
In many cases the FIT includes a devicetree. Add support for loading
this into a suitable place in memory.

Signed-off-by: Simon Glass <sjg@chromium.org>
2025-01-22 09:47:50 -06:00
Simon Glass
42fb767da4 vbe: Allow loading loadables if there is no firmware
In some cases only the 'loadable' property is present in the FIT.
Handle this by loading the first such image.

Signed-off-by: Simon Glass <sjg@chromium.org>
2025-01-22 09:47:50 -06:00
Simon Glass
36d6c89950 vbe: Handle loading from an unaligned offset
There is no guarantee that an FIT image starts on a block boundary. When
it doesn't, the image starts part-way through the first block.

Add logic to detect this and copy the image down into place.

Signed-off-by: Simon Glass <sjg@chromium.org>
2025-01-22 09:47:49 -06:00
Simon Glass
d337037e1a vbe: Tidy up error checking with blk_read()
This function can read fewer blocks than requested, so update the checks
to handle this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2025-01-22 09:47:49 -06:00
Simon Glass
91f27b5b07 vbe: Allow VBE to load FITs on any architecture
At present the VBE implementation is limited to sandbox only. Adjust the
call to fit_image_load() to remove this limitation.

Signed-off-by: Simon Glass <sjg@chromium.org>
2025-01-22 09:47:49 -06:00
Simon Glass
0148c14e04 vbe: Allocate space for the FIT header
It is convenient to use TEXT_BASE as a place to hold the FIT header, but
this does not work in VPL, since SDRAM is not inited yet.

Allocate the memory instead. Ensure the size is aligned to the media
block-size so that it can be read in directly. Improve the
error-checking for blk_read() and add some more debugging.

Keep the existing TEXT_BASE mechanism in sandbox to avoid an
'Exec format error' when trying to run the image.

Signed-off-by: Simon Glass <sjg@chromium.org>
2025-01-22 09:47:49 -06:00
Simon Glass
ea6cfc55e0 vbe: Split out reading a FIT into the common file
Loading a FIT is useful for other VBE methods, such as ABrec. Create a
new function to handling reading it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2025-01-22 09:47:49 -06:00
Simon Glass
0a59dc4199 vbe: Move reading the nvdata into the common file
All VBE methods read non-volatile data, so move this function into a
common file.

Signed-off-by: Simon Glass <sjg@chromium.org>
2025-01-22 09:47:49 -06:00
Simon Glass
47e5618508 vbe: Move reading the version into the common file
All VBE methods read a version string, so move this function into a
common file.

Signed-off-by: Simon Glass <sjg@chromium.org>
2025-01-22 09:47:49 -06:00
Simon Glass
190b128252 vbe: Create a common function to get the block device
Add a vbe_get_blk() function and use it to obtain the block device used
by VBE.

Signed-off-by: Simon Glass <sjg@chromium.org>
2025-01-22 09:47:49 -06:00
Simon Glass
27008ce513 vbe: Convert some checks to assertions
VBE is currently quite careful with function arguments because it is
used in VPL which cannot be updated after manufacture. Bugs can cause
security holes.

Unfortunately this adds to code size.

In several cases we are reading values from a devicetree which is part
of U-Boot (or at least VPL) and so known to be good. Also, in several
places, getting bad values does not matter.

So change a few checks to assert() to reduce code size.

Signed-off-by: Simon Glass <sjg@chromium.org>
2025-01-22 09:47:49 -06:00
Simon Glass
00f521903e vbe: Pass simple_priv to internal functions
Pass the private data instead of the device, to help the compiler
optimise better. This saves 16 bytes of code on pinecube (rk3288)

Signed-off-by: Simon Glass <sjg@chromium.org>
2025-01-22 09:47:49 -06:00
Simon Glass
b407b3e7d4 vbe: Use a block device instead of descriptor
Pass a struct udevice instead of the descriptor structure, since this is
the native argument for blk_read()

Signed-off-by: Simon Glass <sjg@chromium.org>
2025-01-22 09:47:49 -06:00
Simon Glass
20a1e83732 vbe: Start a common header file
Move a few things into a new, common header file so that vbe-simple can
share code with the upcoming abrec.

Put struct simple_nvdata in it and rename it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2025-01-22 09:47:49 -06:00
Simon Glass
a1c456d199 vbe: Use blk_read() to read blocks
We should not be using the old blk_d...() interface, is only there to
aid migration to driver model.

Move to blk_read() instead.

Changes in v2:
- Split patch into several pieces

Signed-off-by: Simon Glass <sjg@chromium.org>
2025-01-22 09:47:49 -06:00
Simon Glass
21dd873572 dm: core: Simplify dm_probe_devices()
There is no point in checking the pre_reloc flag, since devices not
marked as pre-reloc will not have been bound, so won't exist yet.

There doesn't seem to be any point in checking if the device has a
valid devicetree node either, so drop that too.

Signed-off-by: Simon Glass <sjg@chromium.org>
2025-01-14 11:42:51 -06:00
Simon Glass
70c79dc88f common: Drop check for DM in initf_dm()
This is enabled by all boards, so drop the condition.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2025-01-14 11:42:51 -06:00
Tom Rini
4eb937058f Merge tag 'xilinx-for-v2025.04-rc1-v2' of https://source.denx.de/u-boot/custodians/u-boot-microblaze
AMD/Xilinx changes for v2025.04-rc1 v2

Versal:
- Enable dfu support for SPI with multiboot

ZynqMP:
- Align multiboot reg description
- DT syncups
- Wire missing DTs in defconfig
- Kria: Remove usb hub initialization via commands
- Kria: Update DP reset in psu_init

AMD/Xilinx:
- Enable SPI_STACKED_PARALLEL configs

SPI/ZYNQMP_GQSPI:
- Update debug message to use log_debug()

RTC:
- Enable ZYNQMP_RTC for Versal SOCs
2025-01-14 09:36:06 -06:00
Tom Rini
ecc2bd711a Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-pmic 2025-01-14 09:35:43 -06:00
Vincent Fazio
3a2bf24a85 rtc: zynqmp: allow on Versal architectures
Allow the ZyncMP RTC driver to be enabled on Versal architectures.

Also, require DM_RTC since the driver uses the RTC driver model.

Signed-off-by: Vincent Fazio <vfazio@xes-inc.com>
Link: https://lore.kernel.org/r/20250114135812.2605618-1-vfazio@xes-inc.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2025-01-14 15:34:51 +01:00
Ibai Erkiaga
f039cde1e2 zynqmp_gqspi: update to log_debug
Update recent parallel memory support code to move to log_debug instead
of debug as per logging in U-Boot documentation

Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@amd.com>
Link: https://lore.kernel.org/r/20250107145110.2855213-1-ibai.erkiaga-elorza@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2025-01-14 08:33:31 +01:00
Venkatesh Yadav Abbarapu
4d33529207 board: xilinx: Add missing prototype for set_dfu_alt_info
Add missing prototype to fix the sparse warning,
warning: no previous prototype for 'set_dfu_alt_info'
[-Wmissing-prototypes].

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://lore.kernel.org/r/20250106090630.209938-1-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2025-01-14 08:29:46 +01:00
Jonathan Stroud
b446b8a865 arm64: zynqmp: Add eeprom labels for System Controller dts
Label all eeproms so we can open by label rather than a fixed i2c address.

Signed-off-by: Jonathan Stroud <jonathan.stroud@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/878558c3c859599d29bc4ae2278baebf84b368e0.1736152966.git.michal.simek@amd.com
2025-01-14 08:29:45 +01:00
Michal Simek
e7ce901452 arm64: zynqmp: Enable iio-hwmon description only for SOM
Description is coming from SOM only that's why enable it only on SOM.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/08ee4ce2fe242905dd99cea2b87373b57d8fea91.1736152939.git.michal.simek@amd.com
2025-01-14 08:29:45 +01:00
Venkatesh Yadav Abbarapu
caf1d916c5 config: xilinx: Enable the SPI_STACKED_PARALLEL config option
Enable the SPI_STACKED_PARALLEL config option for
all AMD/xilinx platforms, as this is required for parallel and
stacked memories.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://lore.kernel.org/r/20250103044812.18828-1-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2025-01-14 08:29:45 +01:00
Neal Frager
7a8417845d board: zynqmp: zynqmp-sm-k26-revA: release DP from reset
This releases the DP configuration from reset early on during the boot process
for K26 SOM.  It will also avoid the boot hang situation should any attempt be
made to configure the DP registers while it is still in reset.

Fixes the same issue as described by the commit 8b81010a2f ("video:
zynqmp: Add support for reset").

Signed-off-by: Neal Frager <neal.frager@amd.com>
Link: https://lore.kernel.org/r/20241218130129.687650-1-neal.frager@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2025-01-14 08:29:45 +01:00
Michal Simek
c2612feb65 xilinx: Sort OF_LIST and add missing vpk120 and zcu670 platforms
Sort OF_LIST entries and also add missing vpk120 and zcu670 platforms.
Compilation is failing when these DTs are exported via DEVICE_TREE because
binman is not able to create a link for default configuration.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/505996b6ef969b1b677ab921462c75c798c366e7.1734335553.git.michal.simek@amd.com
2025-01-14 08:29:45 +01:00
Michal Simek
539cf291ad zynqmp: Remove usb init initialization for Kria
USB hub initialization is done by driver introduced by commit 09f557e106
("usb: onboard-hub: Add i2c initialization for usb5744 hub") that's why
there is no need to do initialization via variables.

Reported-by: Love Kumar <love.kumar@amd.com>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/96e9c80aeeed4e9664858bf236476997d17a9914.1734522042.git.michal.simek@amd.com
2025-01-14 08:29:45 +01:00
Michal Simek
bb1562e347 arm64: zynqmp: Sync DTs with Linux v6.13-rc1
Sync zynqmp* DTS files with v6.13-rc1 Linux kernel including three patches
from Sean:
arm64: zynqmp: Enable AMS for all boards
arm64: zynqmp: Expose AMS to userspace as HWMON
arm64: zynqmp: Add thermal zones

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/06e466d64c9d8e718e2f06a76cc65d6da2a37a7b.1733996500.git.michal.simek@amd.com
2025-01-14 08:29:45 +01:00
Naman Trivedi
9ce8f720af arm64: zynqmp: add clock-output-names property in clock nodes
Replace underscores with hyphens in the clock node names as per
dt-schema rule.

Also, add clock-output-names property to all clock nodes, so that the
resulting clock name do not change when clock node name is changed.

Signed-off-by: Naman Trivedi <naman.trivedimanojbhai@amd.com>
Acked-by: Senthil Nathan Thangaraj <senthilnathan.thangaraj@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/1080e31393c3e1b49735b77e7ddc14d570b83222.1733991159.git.michal.simek@amd.com
2025-01-14 08:29:45 +01:00
Michal Simek
71db6bf278 arm64: zynqmp: Do not use hardcoded address in do_zynqmp_reboot()
multi_boot is already the part of csu_base structure that's why use it
directly instead of using register offset value.

Fixes: fc001432e5 ("arm64: zynqmp: Add u-boot command to boot into recovery image")
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/3e5c6ea426b81cc73b90e6425764e41a98deb2a6.1733735454.git.michal.simek@amd.com
2025-01-14 08:29:45 +01:00
Michal Simek
d1de34798a arm64: versal: RO multi_boot register in non JTAG bootmode
The main reason for this change is that upstream QEMU has no multiboot
register implemented that's why access to it fails which ends up in CI
failure for our target.
That's why in JTAG bootmode returns 0 which is correct behaviour because
multiboot register is not used in this mode and value should be ignored and
as a side effect it is also fixing CI/Qemu issue.

Also move versal_get_bootmode() to avoid function declaration.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/484b9cafc45e72308a1a29a3ab772020f96784cc.1736155238.git.michal.simek@amd.com
2025-01-14 08:29:45 +01:00
Michal Simek
a6ca9310ef arm64: versal: Support operations around multiboot register
Read multiboot register and show it's value by default.
Also extend logic in dfu_alt_info string generation to support capsule
update for different offsets.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/72ba2efd0fb7b66a86b409a1521fe288a4dd3453.1733395093.git.michal.simek@amd.com
2025-01-14 08:23:47 +01:00
Michal Simek
5e3b8e5c49 arm64: versal: Wire SPIs for dfu_alt_info variable generation
Enable automatic dfu_alt_info variable generation based on MTD partition.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/67ff88c8c7186138353c0b74ed37a318fb4b199e.1733395093.git.michal.simek@amd.com
2025-01-14 08:23:47 +01:00
Udit Kumar
b9fe3ec8a2 power: pmic: tps65941: Fix TI TPS65224 PMIC compatiable
Fix compatiable name for TPS65224 PMIC as defined in
dts/upstream/Bindings/mfd/ti,tps6594.yaml bindings.

Fixes: 1468fbba6d55("power: pmic: tps65941: Add TI TPS65224 PMIC")
Signed-off-by: Udit Kumar <u-kumar1@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2025-01-14 07:44:51 +09:00
Shree Ramamoorthy
7e261a05a5 power: replace magic numbers with macros
Replace magic numbers in buckval2votl() & buckvolt2val() with macros to
help with clarity and correlate what the numbers correspond to in the
TPS65219 datasheet.

Signed-off-by: Shree Ramamoorthy <s-ramamoorthy@ti.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2025-01-14 07:44:42 +09:00
Shree Ramamoorthy
eda65fa42b power: regulator: replace printf() with pr_err()
Replace printf() with pr_err() because pr_err() has a uniform print format
and takes into consideration the log levels supported.

Signed-off-by: Shree Ramamoorthy <s-ramamoorthy@ti.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2025-01-14 07:44:30 +09:00
Tom Rini
6a0db9ee03 Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-usb
- ehci-mx5/ehci-mx6 driver improvements
2025-01-13 08:25:00 -06:00
Marek Vasut
801b5fafd3 usb: ehci-mx6: Add i.MX95 support
i.MX95 uses the same USB IP as i.MX8MM. It can then reuse the ehci-mx6
driver.

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2025-01-13 04:39:05 +01:00
Tom Rini
35d9b1d254 Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sh 2025-01-12 19:28:54 -06:00
Marek Vasut
46a7999160 arm64: renesas: Convert boards over to is_cortex_a() functions
Use generic is_cortex_a() functions instead of open-coded midr_el1 read.
No functional change.

Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2025-01-12 23:49:58 +01:00
Marek Vasut
2fca3cf799 arm64: Add MIDR entries for Cortex-A57 and Cortex-A76
Add MIDR entries for Cortex-A57 and Cortex-A76 cores.
Those are used on R-Car Gen3 and Gen4 SoCs respectively.

Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2025-01-12 23:49:58 +01:00
Marek Vasut
ddb0f26dc4 arm64: Convert core type check macros into inline functions
Turn the core type check macros into inline functions to perform
better type checking on them. The inline functions get optimized
out in case they are not used. Indent the MIDR_PARTNUM_CORTEX_An
macros in preparation for addition of future three-digit cores
and use MIDR_PARTNUM_SHIFT in MIDR_PARTNUM_MASK to be consistent.

Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2025-01-12 23:49:58 +01:00
Tom Rini
bc157bb666 Merge tag 'u-boot-rockchip-20250110' of https://source.denx.de/u-boot/custodians/u-boot-rockchip
CI: https://source.denx.de/u-boot/custodians/u-boot-rockchip/-/pipelines/24129

- Add boards:
	rk3566: FriendlyARM NanoPi R3S
	rk3588s: Radxa ROCK 5C,
	rk3588: Khadas Edge2
- Migrate to OF_UPSTREAM:
	rk3066a/rk3188;
	rk3288: tinker, miqi, firefly;
- Migrate to TPL: rk3399 kevin and bob;
2025-01-10 18:56:22 -06:00