Had to move the RTC area for ATC board to upper addresses

(0xf5000000, to be specific). The reason is that the RTC first gets accessed before MMU is initialized and, consequently, it needs to be placed at physical addresses which are later mapped to the same virtual addresses (like 0xf5000000 physical is mapped to 0xf5000000 virtual).
Patch by Murray Jensen, 20 Jun 2003:
2026-06-13 15:03:58 +03:00 · 2003-06-22 10:30:54 +00:00 · 2003-06-21 00:17:24 +00:00 · 2003-06-20 23:10:58 +00:00 · 2003-06-20 22:36:30 +00:00 · 2003-06-19 23:58:30 +00:00
473 changed files with 47819 additions and 16965 deletions
--- a/216
+++ b/216
@@ -2,6 +2,220 @@
 Changes since U-Boot 0.3.1:
 ======================================================================

+* Patch by Murray Jensen, 20 Jun 2003:
+  - hymod update
+  - cleanup (especially for gcc-3.x compilers)
+
+* Patch by Tom Guilliams, 20 Jun 2003:
+  added CONFIG_750FX support for IBM 750FX processors
+
+* Patch by Devin Crumb, 02 Apr 2003:
+  Fix clock divider rounding problem in drivers/serial.c
+
+* Patch by Richard Woodruff, 19 June 03:
+  - Fixed smc91c111 driver to sync with the u-boot environment
+    (driver/smc91c111.c).
+  - Added eth_init error return check in NetLoop (net/net.c).
+
+* Patch by Ken Chou, 19 June 2003:
+  Added support for A3000 SBC board (Artis Microsystems Inc.)
+
+* Patches by Murray Jensen, 17 Jun 2003:
+  - Hymod board database mods: add "who" field and new xilinx chip types
+  - provide new "init_cmd_timeout()" function so code external to
+    "common/main.c" can use the "reset_cmd_timeout()" function before
+    entering the main loop
+  - add DTT support for adm1021 (new file dtt/adm1021.c; config
+    slightly different. see include/configs/hymod.h for an example
+    (requires CONFIG_DTT_ADM1021, CONFIG_DTT_SENSORS, and
+    CFG_DTT_ADM1021 defined)
+  - add new "eeprom_probe()" function which has similar args and
+    behaves in a similar way to "eeprom_read()" etc.
+  - add 8260 FCC ethernet loopback code (new "eth_loopback_test()"
+    function which is enabled by defining CONFIG_ETHER_LOOPBACK_TEST)
+  - gdbtools copyright update
+  - ensure that set_msr() executes the "sync" and "isync" instructions
+    after the "mtmsr" instruction in cpu/mpc8260/interrupts.c
+  - 8260 I/O ports fix: Open Drain should be set last when configuring
+  - add SIU IRQ defines for 8260
+  - allow LDSCRIPT override and OBJCFLAGS initialization: change to
+    config.mk to allow board configurations to override the GNU
+    linker script, selected via the LDSCRIPT, make variable, and to
+    give an initial value to the OBJCFLAGS make variable
+  - 8260 i2c enhancement:
+    o correctly extends the timeout depending on the size of all
+      queued messages for both transmit and receive
+    o will not continue with receive if transmit times out
+    o ensures that the error callback is done for all queued tx
+      and rx messages
+    o correctly detects both tx and rx timeouts, only delivers one to
+      the callback, and does not overwrite an earlier error
+    o logic in i2c_probe now correct
+  - add "vprintf()" function so that "panic()" function can be
+    technically correct
+  - many Hymod board changes
+
+* Patches by Robert Schwebel, 14 Jun 2003:
+  - add support for Logotronic DL datalogger board
+  - cleanup serial line after kermit binary download
+  - add debugX macro (debug level support)
+  - update mach-types.h to latest arm.linux.org.uk master list.
+
+* Patches by David Müller, 12 Jun 2003:
+  - rewrite of the S3C24X0 register definitions stuff
+  - "driver" for the built-in S3C24X0 RTC
+
+* Patches by Yuli Barcohen, 12 Jun 2003:
+  - Add MII support and Ethernet PHY initialization for MPC8260ADS board
+  - Fix incorrect SIUMCR initialisation caused by wrong Hard Reset
+    configuration word supplied by FPGA on some MPC8260ADS boards
+
+* Patch by Pantelis Antoniou, 10 Jun 2003:
+  Unify status LED interface
+
+* Add support for DS12887 RTC; add RTC support for ATC board
+
+* Patch by Nicolas Lacressonniere, 11 Jun 2003:
+  Modifications for Atmel AT91RM9200DK ARM920T based development kit
+  - Add Atmel DataFlash support for reading and writing.
+  - Add possibility to boot a Linux from DataFlash with BOOTM command. 
+  - Add Flash detection on Atmel AT91RM9200DK
+    (between Atmel AT49BV1614 and AT49BV1614A flashes)
+  - Replace old Ethernet PHY layer functions
+  - Change link address
+
+* Patch by Frank Smith, 9 Jun 2003:
+  use CRIT_EXCEPTION for machine check on 4xx
+
+* Patch by Detlev Zundel, 13 Jun 2003:
+  added implementation of the "carinfo" command in cmd_immap.c
+
+* Fix CONFIG_NET_MULTI support in include/net.h
+
+* Patches by Kyle Harris, 13 Mar 2003:
+  - Add FAT partition support
+  - Add command support for FAT
+  - Add command support for MMC
+  ----
+  - Add Intel PXA support for video
+  - Add Intel PXA support for MMC
+  ----
+  - Enable MMC and FAT for lubbock board
+  - Other misc changes for lubbock board
+
+* Patch by Robert Schwebel, April 02, 2003:
+  fix for SMSC91111 driver
+
+* Patch by Vladimir Gurevich, 04 Jun 2003:
+  make ppc405 ethernet driver compatible with CONFIG_NET_MULTI option
+
+* Patch by Stefan Roese, 05 Jun 2003:
+  - PPC4xx: Fix bug for initial stack in data cache as pointed out by
+    Thomas Schaefer (tschaefer@giga-stream.de). Now inital stack in
+    data cache can be used even if the chip select is in use.
+  - CFG_RX_ETH_BUFFER added to set the ethernet receive buffer count
+    (see README for further description).
+  - Changed config files of CONFIG_EEPRO100 boards to use the
+    CFG_RX_ETH_BUFFER define.
+
+* Add support for RMU board
+
+* Add support for TQM862L at 100/50 MHz
+
+* Patch by Pantelis Antoniou, 02 Jun 2003:
+  major reconstruction of networking code;
+  add "ping" support (outgoing only!)
+
+* Patch by Denis Peter, 04 June 2003:
+  add support for the MIP405T board
+
+* Patches by Udi Finkelstein, 2 June 2003:
+  - Added support for custom keyboards, initialized by defining a
+    board-specific drv_keyboard_init as well as defining CONFIG_KEYBOARD .
+  - Added support for the RBC823 board.
+  - cpu/mpc8xx/lcd.c now automatically calculates the
+    Horizontal Pixel Count field.
+
+* Fix alignment problem in BOOTP (dhcp_leasetime option)
+  [pointed out by Nicolas Lacressonnière, 2 Jun 2003]
+
+* Patch by Mark Rakes, 14 May 2003:
+  add support for Intel e1000 gig cards.
+
+* Patch by Nye Liu, 3 Jun 2003:
+  fix critical typo in MAMR definition (include/mpc8xx.h)
+
+* Fix requirement to align U-Boot image on 16 kB boundaries on PPC.
+
+* Patch by Klaus Heydeck, 2 Jun 2003
+  Minor changes for KUP4K configuration
+
+* Patch by Marc Singer, 29 May 2003:
+  Fixed rarp boot method for IA32 and other little-endian CPUs.
+
+* Patch by Marc Singer, 28 May 2003:
+  Added port I/O commands.
+
+* Patch by Matthew McClintock, 28 May 2003
+  - cpu/mpc824x/start.S: fix relocation code when booting from RAM
+  - minor patches for utx8245
+
+* Patch by Daniel Engström, 28 May 2003:
+  x86 update
+
+* Patch by Dave Ellis, 9 May 2003 + 27 May 2003:
+  add nand flash support to SXNI855T configuration
+  fix/extend nand flash support:
+  - fix 'nand erase' command so does not erase bad blocks
+  - fix 'nand write' command so does not write to bad blocks
+  - fix nand_probe() so handles no flash detected properly
+  - add doc/README.nand
+  - add .jffs2 and .oob options to nand read/write
+  - add 'nand bad' command to list bad blocks
+  - add 'clean' option to 'nand erase' to write JFFS2 clean markers
+  - make NAND read/write faster
+
+* Patch by Rune Torgersen, 23 May 2003:
+  Update for MPC8266ADS board
+
+* Get (mostly) rid of CFG_MONITOR_LEN definition; compute real length
+  instead CFG_MONITOR_LEN is now only used to determine  _at_compile_
+  _time_  (!) if the environment is embedded within the U-Boot image,
+  or in a separate flash sector.
+
+* Cleanup CFG_DER #defines in config files (wd maintained only)
+
+* Fix data abort exception handling for arm920t CPU
+
+* Fix alignment problems with flash driver for TRAB board
+
+* Patch by Donald White, 21 May 2003:
+  fix calculation of base address in pci_hose_config_device()
+
+* Fix bug in command line parsing: "cmd1;cmd2" is supposed to always
+  execute "cmd2", even if "cmd1" fails. Note that this is different
+  to "run var1 var2" where the contents of "var2" will NOT be
+  executed when a command in "var1" fails.
+
+* Add zero-copy ramdisk support (requires corresponding kernel support!)
+
+* Patch by Kyle Harris, 20 May 2003:
+  In preparation for an ixp port, rename cpu/xscale and arch-xscale
+  into cpu/pxa and arch-pxa.
+
+* Patch by Stefan Roese, 23 May 2003:
+  - IBM PPC405EP port added.
+  - CONFIG_UART1_CONSOLE added. If defined internal UART1 (and not
+    UART0) is used as default U-Boot console. PPC4xx only!
+  - esd ASH405 board added (PPC405EP based).
+  - BUBINGA405EP board added (PPC405EP based - IBM Eval Board).
+  - esd CPCI405AB board added.
+  - esd PMC405 board added.
+  - Update of some esd boards.
+
+* Patch by Denis Peter, 19 Mai 2003:
+  add support for the MIP405-3 board
+
 * Patch by Dave Ellis, 22 May 2003:
  Fix problem with only partially cleared .bss segment

@@ -278,7 +492,7 @@ Changes for U-Boot 0.3.0:

 * TRAB fixes / extensions:
  - Restore VFD brightness as saved in environment
-  - add support for FGujitsu flashes
+  - add support for Fujitsu flashes
  - make sure both buzzers are turned off (drive low level)

 * Patches by Robert Schwebel, 06 Mar 2003:
--- a/4
+++ b/4
@@ -66,6 +66,10 @@ N: Jonathan De Bruyne
 E: jonathan.debruyne@siemens.atea.be
 D: Port to Siemens IAD210 board

+N: Ken Chou
+E: kchou@ieee.org	
+D: Support for A3000 SBC board
+
 N: Conn Clark
 E: clark@esteem.com
 D: ESTEEM192E support
--- a/9
+++ b/9
@@ -63,6 +63,9 @@ Wolfgang Denk <wd@denx.de>
 	IVMS8_128		MPC860
 	IVMS8_256		MPC860
 	LANTEC			MPC850
+	LWMON			MPC823
+	R360MPI			MPC823
+	RMU			MPC850
 	RRvision		MPC823
 	SM850			MPC850
 	SPD823TS		MPC823
@@ -72,6 +75,7 @@ Wolfgang Denk <wd@denx.de>
 	TQM855L			MPC855
 	TQM860L			MPC860
 	TQM860L_FEC		MPC860
+	TTTech			MPC823
 	c2mon			MPC855
 	hermes			MPC860
 	lwmon			MPC823
@@ -180,14 +184,19 @@ Stefan Roese <stefan.roese@esd-electronics.com>

 	ADCIOP			IOP480 (PPC401)
 	AR405			PPC405GP
+	ASH405			PPC405EP
 	CANBT			PPC405CR
 	CPCI405			PPC405GP
+	CPCI4052		PPC405GP
+	CPCI405AB		PPC405GP
 	CPCI440			PPC440GP
 	CPCIISER4		PPC405GP
 	DASA_SIM		IOP480 (PPC401)
 	DU405			PPC405GP
 	OCRTC			PPC405GP
 	ORSG			PPC405GP
+	PCI405			PPC405GP
+	PMC405			PPC405GP

 Peter De Schrijver <p2@mind.be>

--- a/44
+++ b/44
@@ -32,11 +32,11 @@ LIST_8xx="	\
 	IVMS8		IVMS8_128	IVMS8_256	KUP4K           \
 	LANTEC	        lwmon   	MBX		MBX860T		\
 	MHPC		MVS1		NETVIA		NX823		\
-	pcu_e		R360MPI		RPXClassic	RPXlite		\
-	RRvision	SM850		SPD823TS	svm_sc8xx	\
-	SXNI855T	TOP860		TQM823L		TQM823L_LCD	\
-	TQM850L		TQM855L		TQM860L		TTTech		\
-	v37								\
+	pcu_e		R360MPI		RBC823		rmu		\
+	RPXClassic	RPXlite		RRvision	SM850		\
+	SPD823TS	svm_sc8xx	SXNI855T	TOP860		\
+	TQM823L		TQM823L_LCD	TQM850L		TQM855L		\
+	TQM860L		TTTech		v37				\
 "

 #########################################################################
@@ -44,12 +44,13 @@ LIST_8xx="	\
 #########################################################################

 LIST_4xx="	\
-	ADCIOP		AR405		CANBT		CPCI405		\
-	CPCI4052 	CPCI440         CPCIISER4	CRAYL1  	\
-	DASA_SIM	DU405    	EBONY           ERIC  		\
-	MIP405  	ML2		OCRTC		ORSG		\
-	PCI405          PIP405		W7OLMC		W7OLMG          \
-	WALNUT405							\
+	ADCIOP		AR405		ASH405          BUBINGA405EP    \
+        CANBT		CPCI405		CPCI4052 	CPCI405AB       \
+        CPCI440         CPCIISER4	CRAYL1  	DASA_SIM	\
+        DU405    	EBONY           ERIC  		MIP405  	\
+        MIP405T		ML2		OCRTC		ORSG		\
+	PCI405		PIP405		PMC405          W7OLMC		\
+	W7OLMG          WALNUT405	\
 "

 #########################################################################
@@ -57,9 +58,9 @@ LIST_4xx="	\
 #########################################################################

 LIST_824x="	\
-	BMW		CPC45		CU824		MOUSSE		\
-	MUSENKI		OXC		PN62		Sandpoint8240	\
-	Sandpoint8245	utx8245						\
+        A3000           BMW		CPC45		CU824		\
+	MOUSSE          MUSENKI    	OXC		PN62		\
+	Sandpoint8240   Sandpoint8245	utx8245		\
 "

 #########################################################################
@@ -113,10 +114,10 @@ LIST_ARM9="at91rm9200dk smdk2400 smdk2410 trab VCMA9"
 ## Xscale Systems
 #########################################################################

-LIST_xscale="cradle csb226 innokom lubbock wepep250"
+LIST_pxa="cradle csb226 innokom lubbock wepep250"


-LIST_arm="${LIST_SA} ${LIST_ARM7} ${LIST_ARM9} ${LIST_xscale}"
+LIST_arm="${LIST_SA} ${LIST_ARM7} ${LIST_ARM9} ${LIST_pxa}"

 #########################################################################
 ## MIPS 4Kc Systems
@@ -128,6 +129,15 @@ LIST_mips5kc="purple"

 LIST_mips="${LIST_mips4kc} ${LIST_mips5kc}"

+#########################################################################
+## i386 Systems
+#########################################################################
+
+LIST_I486="sc520_cdp sc520_spunk sc520_spunk_rel"
+
+LIST_x86="${LIST_I486}"
+
+#-----------------------------------------------------------------------

 #----- for now, just run PPC by default -----
 [ $# = 0 ] && set $LIST_ppc
@@ -149,7 +159,7 @@ build_target() {
 for arg in $@
 do
 	case "$arg" in
-	5xx|8xx|824x|8260|4xx|7xx|74xx|SA|ARM7|ARM9|ppc|arm|xscale|mips)
+	5xx|8xx|824x|8260|4xx|7xx|74xx|SA|ARM7|ARM9|ppc|arm|pxa|mips|I486|x86)
 			for target in `eval echo '$LIST_'${arg}`
 			do
 				build_target ${target}
--- a/69
+++ b/69
@@ -60,7 +60,11 @@ ifeq ($(ARCH),arm)
 CROSS_COMPILE = arm-linux-
 endif
 ifeq ($(ARCH),i386)
-#CROSS_COMPILE = i386-elf-
+ifeq ($(HOSTARCH),i386)
+CROSS_COMPILE =
+else
+CROSS_COMPILE = i386-linux-
+endif
 endif
 ifeq ($(ARCH),mips)
 CROSS_COMPILE = mips_4KC-
@@ -102,7 +106,7 @@ endif
 LIBS  =	board/$(BOARDDIR)/lib$(BOARD).a
 LIBS += cpu/$(CPU)/lib$(CPU).a
 LIBS += lib_$(ARCH)/lib$(ARCH).a
-LIBS += fs/jffs2/libjffs2.a fs/fdos/libfdos.a
+LIBS += fs/jffs2/libjffs2.a fs/fdos/libfdos.a fs/fat/libfat.a
 LIBS += net/libnet.a
 LIBS += disk/libdisk.a
 LIBS += rtc/librtc.a
@@ -310,12 +314,18 @@ pcu_e_config:		unconfig
 R360MPI_config:	unconfig
 	@./mkconfig $(@:_config=) ppc mpc8xx r360mpi

+RBC823_config:	unconfig
+	@./mkconfig $(@:_config=) ppc mpc8xx rbc823
+
 RPXClassic_config:	unconfig
 	@./mkconfig $(@:_config=) ppc mpc8xx RPXClassic

 RPXlite_config:		unconfig
 	@./mkconfig $(@:_config=) ppc mpc8xx RPXlite

+rmu_config:	unconfig
+	@./mkconfig $(@:_config=) ppc mpc8xx rmu
+
 RRvision_config:	unconfig
 	@./mkconfig $(@:_config=) ppc mpc8xx RRvision

@@ -342,10 +352,10 @@ TOP860_config:		unconfig
 	@./mkconfig $(@:_config=) ppc mpc8xx top860 emk

 # Play some tricks for configuration selection
-# All boards can come with 50 MHz (default), 66MHz or 80MHz clock,
+# All boards can come with 50 MHz (default), 66MHz, 80MHz or 100 MHz clock,
 # but only 855 and 860 boards may come with FEC
 # and 823 boards may have LCD support
-xtract_8xx = $(subst _66MHz,,$(subst _80MHz,,$(subst _LCD,,$(subst _config,,$1))))
+xtract_8xx = $(subst _66MHz,,$(subst _80MHz,,$(subst _100MHz,,$(subst _LCD,,$(subst _config,,$1)))))

 FPS850L_config		\
 FPS860L_config		\
@@ -366,7 +376,8 @@ TQM860L_66MHz_config	\
 TQM860L_80MHz_config	\
 TQM862L_config		\
 TQM862L_66MHz_config	\
-TQM862L_80MHz_config:	unconfig
+TQM862L_80MHz_config	\
+TQM862M_100MHz_config:	unconfig
 	@ >include/config.h
 	@[ -z "$(findstring _66MHz,$@)" ] || \
 		{ echo "#define CONFIG_66MHz"		>>include/config.h ; \
@@ -376,6 +387,10 @@ TQM862L_80MHz_config:	unconfig
 		{ echo "#define CONFIG_80MHz"		>>include/config.h ; \
 		  echo "... with 80MHz system clock" ; \
 		}
+	@[ -z "$(findstring _100MHz,$@)" ] || \
+		{ echo "#define CONFIG_100MHz"		>>include/config.h ; \
+		  echo "... with 100MHz system clock" ; \
+		}
 	@[ -z "$(findstring _LCD,$@)" ] || \
 		{ echo "#define CONFIG_LCD"		>>include/config.h ; \
 		  echo "#define CONFIG_NEC_NL6648BC20"	>>include/config.h ; \
@@ -403,11 +418,18 @@ ADCIOP_config:	unconfig
 AR405_config:	unconfig
 	@./mkconfig $(@:_config=) ppc ppc4xx ar405 esd

+ASH405_config:	unconfig
+	@./mkconfig $(@:_config=) ppc ppc4xx ash405 esd
+
+BUBINGA405EP_config:unconfig
+	@./mkconfig $(@:_config=) ppc ppc4xx bubinga405ep
+
 CANBT_config:	unconfig
 	@./mkconfig $(@:_config=) ppc ppc4xx canbt esd

-CPCI405_config		\
-CPCI4052_config:	unconfig
+CPCI405_config	\
+CPCI4052_config	\
+CPCI405AB_config:	unconfig
 	@./mkconfig $(@:_config=) ppc ppc4xx cpci405 esd
 	@echo "BOARD_REVISION = $(@:_config=)"	>>include/config.mk

@@ -435,6 +457,11 @@ ERIC_config:unconfig
 MIP405_config:unconfig
 	@./mkconfig $(@:_config=) ppc ppc4xx mip405 mpl

+MIP405T_config:unconfig
+	@echo "#define CONFIG_MIP405T" >include/config.h
+	@echo "Enable subset config for MIP405T"
+	@./mkconfig -a MIP405 ppc ppc4xx mip405 mpl
+
 ML2_config:unconfig
 	@./mkconfig $(@:_config=) ppc ppc4xx ml2

@@ -448,6 +475,9 @@ PCI405_config:	unconfig
 PIP405_config:unconfig
 	@./mkconfig $(@:_config=) ppc ppc4xx pip405 mpl

+PMC405_config:	unconfig
+	@./mkconfig $(@:_config=) ppc ppc4xx pmc405 esd
+
 W7OLMC_config	\
 W7OLMG_config: unconfig
 	@./mkconfig $(@:_config=) ppc ppc4xx w7o
@@ -460,6 +490,9 @@ WALNUT405_config:unconfig
 #########################################################################
 xtract_82xx = $(subst _ROMBOOT,,$(subst _L2,,$(subst _266MHz,,$(subst _300MHz,,$(subst _config,,$1)))))

+A3000_config: unconfig
+	@./mkconfig $(@:_config=) ppc mpc824x a3000
+
 BMW_config: unconfig
 	@./mkconfig $(@:_config=) ppc mpc824x bmw

@@ -696,19 +729,22 @@ ep7312_config	:	unconfig
 #########################################################################

 cradle_config	:	unconfig
-	@./mkconfig $(@:_config=) arm xscale cradle
+	@./mkconfig $(@:_config=) arm pxa cradle 

 csb226_config	:	unconfig
-	@./mkconfig $(@:_config=) arm xscale csb226
+	@./mkconfig $(@:_config=) arm pxa csb226

 innokom_config	:	unconfig
-	@./mkconfig $(@:_config=) arm xscale innokom
+	@./mkconfig $(@:_config=) arm pxa innokom

 lubbock_config	:	unconfig
-	@./mkconfig $(@:_config=) arm xscale lubbock
+	@./mkconfig $(@:_config=) arm pxa lubbock
+
+logodl_config	:	unconfig
+	@./mkconfig $(@:_config=) arm pxa logodl

 wepep250_config	:	unconfig
-	@./mkconfig $(@:_config=) arm xscale wepep250
+	@./mkconfig $(@:_config=) arm pxa wepep250

 #========================================================================
 # i386
@@ -719,6 +755,12 @@ wepep250_config	:	unconfig
 sc520_cdp_config	:	unconfig
 	@./mkconfig $(@:_config=) i386 i386 sc520_cdp

+sc520_spunk_config	:	unconfig
+	@./mkconfig $(@:_config=) i386 i386 sc520_spunk
+
+sc520_spunk_rel_config	:	unconfig
+	@./mkconfig $(@:_config=) i386 i386 sc520_spunk
+
 #========================================================================
 # MIPS
 #========================================================================
@@ -742,7 +784,8 @@ clean:
 		| xargs rm -f
 	rm -f examples/hello_world examples/timer \
 	      examples/eepro100_eeprom examples/sched \
-	      examples/mem_to_mem_idma2intr
+	      examples/mem_to_mem_idma2intr examples/82559_eeprom
+
 	rm -f tools/img2srec tools/mkimage tools/envcrc tools/gen_eth_addr
 	rm -f tools/easylogo/easylogo tools/bmp_logo
 	rm -f tools/gdb/astest tools/gdb/gdbcont tools/gdb/gdbsend
--- a/153
+++ b/153
@@ -151,6 +151,7 @@ Directory Hierarchy:
 - board/RPXClassic
 		Files specific to RPXClassic boards
 - board/RPXlite	Files specific to RPXlite    boards
+- board/at91rm9200dk Files specific to AT91RM9200DK boards
 - board/c2mon	Files specific to c2mon	     boards
 - board/cmi	Files specific to cmi        boards
 - board/cogent	Files specific to Cogent     boards
@@ -300,6 +301,7 @@ The following options need to be configured:
 	or	CONFIG_405GP
 	or	CONFIG_440
 	or	CONFIG_MPC74xx
+	or	CONFIG_750FX

 		ARM based CPUs:
 		---------------
@@ -344,7 +346,7 @@ The following options need to be configured:
 		CONFIG_IAD210,     CONFIG_RPXlite,    CONFIG_sbc8260,
 		CONFIG_EBONY,      CONFIG_sacsng,     CONFIG_FPS860L,
 		CONFIG_V37,        CONFIG_ELPT860,    CONFIG_CMI,
-		CONFIG_NETVIA
+		CONFIG_NETVIA,     CONFIG_RBC823

 		ARM based boards:
 		-----------------
@@ -352,7 +354,7 @@ The following options need to be configured:
 		CONFIG_HHP_CRADLE,  CONFIG_DNP1110,    CONFIG_EP7312,
 		CONFIG_IMPA7,       CONFIG_LART,       CONFIG_LUBBOCK,
 		CONFIG_SHANNON,     CONFIG_SMDK2400,   CONFIG_SMDK2410,
-		CONFIG_TRAB
+		CONFIG_TRAB,	    CONFIG_AT91RM9200DK


 - CPU Module Type: (if CONFIG_COGENT is defined)
@@ -470,6 +472,13 @@ The following options need to be configured:
 		Set to 0 to disable this feature (this is the default).
 		This will also disable hardware handshake.

+- Console UART Number:
+		CONFIG_UART1_CONSOLE
+
+		IBM PPC4xx only.
+		If defined internal UART1 (and not UART0) is used
+		as default U-Boot console.
+
 - Boot Delay:	CONFIG_BOOTDELAY - in seconds
 		Delay before automatically booting the default image;
 		set to -1 to disable autoboot.
@@ -558,6 +567,7 @@ The following options need to be configured:
 		CFG_CMD_ELF	  bootelf, bootvx
 		CFG_CMD_ENV	  saveenv
 		CFG_CMD_FDC	* Floppy Disk Support
+		CFG_CMD_FAT	  FAT partition support
 		CFG_CMD_FDOS	* Dos diskette Support
 		CFG_CMD_FLASH	  flinfo, erase, protect
 		CFG_CMD_FPGA	  FPGA device initialization support
@@ -571,6 +581,7 @@ The following options need to be configured:
 		CFG_CMD_LOADS	  loads
 		CFG_CMD_MEMORY	  md, mm, nm, mw, cp, cmp, crc, base,
 				  loop, mtest
+		CFG_CMD_MMC	  MMC memory mapped support
 		CFG_CMD_MII	  MII utility commands
 		CFG_CMD_NET	  bootp, tftpboot, rarpboot
 		CFG_CMD_PCI	* pciinfo
@@ -681,6 +692,9 @@ The following options need to be configured:
 		CFG_SCSI_SYM53C8XX_CCF to fix clock timing (80Mhz)

 - NETWORK Support (PCI):
+		CONFIG_E1000
+		Support for Intel 8254x gigabit chips.
+
 		CONFIG_EEPRO100
 		Support for Intel 82557/82559/82559ER chips.
 		Optional CONFIG_EEPRO100_SROM_WRITE enables eeprom
@@ -720,6 +734,14 @@ The following options need to be configured:
 		Supported are USB Keyboards and USB Floppy drives
 		(TEAC FD-05PUB).

+- MMC Support:
+  		The MMC controller on the Intel PXA is supported. To
+		enable this define CONFIG_MMC. The MMC can be 
+		accessed from the boot prompt by mapping the device 
+		to physical memory similar to flash. Command line is
+		enabled with CFG_CMD_MMC. The MMC driver also works with
+		the FAT fs. This is enabled with CFG_CMD_FAT. 
+
 - Keyboard Support:
 		CONFIG_ISA_KEYBOARD

@@ -759,6 +781,13 @@ The following options need to be configured:
 		and 16bpp modes defined by CONFIG_VIDEO_SED13806_8BPP
 		or CONFIG_VIDEO_SED13806_16BPP

+- Keyboard Support:
+                CONFIG_KEYBOARD
+
+                Define this to enable a custom keyboard support.
+                This simply calls drv_keyboard_init() which must be
+                defined in your board-specific files.
+                The only board using this so far is RBC823.

 - LCD Support:	CONFIG_LCD

@@ -1176,13 +1205,13 @@ The following options need to be configured:

 	Note:

-		In the current implementation, the local variables
-		space and global environment variables space are
-		separated. Local variables are those you define by
-		simply typing like `name=value'. To access a local
-		variable later on, you have write `$name' or
-		`${name}'; variable directly by typing say `$name' at
-		the command prompt.
+                In the current implementation, the local variables
+                space and global environment variables space are
+                separated. Local variables are those you define by
+                simply typing `name=value'. To access a local
+                variable later on, you have write `$name' or
+                `${name}'; to execute the contents of a variable
+                directly type `$name' at the command prompt.

 		Global environment variables are those you use
 		setenv/printenv to work with. To run a command stored
@@ -1221,6 +1250,13 @@ The following options need to be configured:
 		the environment like the autoscript function or the
 		boot command first.

+- DataFlash Support
+		CONFIG_HAS_DATAFLASH
+
+                Defining this option enables DataFlash features and
+                allows to read/write in Dataflash via the standard
+                commands cp, md...
+
 - Show boot progress
 		CONFIG_SHOW_BOOT_PROGRESS

@@ -1382,7 +1418,10 @@ Configuration Settings:
 		CFG_FLASH_BASE when booting from flash.

 - CFG_MONITOR_LEN:
-		Size of memory reserved for monitor code
+                Size of memory reserved for monitor code, used to
+                determine _at_compile_time_ (!) if the environment is
+                embedded within the U-Boot image, or in a separate
+                flash sector.

 - CFG_MALLOC_LEN:
 		Size of DRAM reserved for malloc() use.
@@ -1422,6 +1461,14 @@ Configuration Settings:
 		Define if the flash driver uses extra elements in the
 		common flash structure for storing flash geometry

+- CFG_RX_ETH_BUFFER:
+		Defines the number of ethernet receive buffers. On some
+		ethernet controllers it is recommended to set this value
+		to 8 or even higher (EEPRO100 or 405 EMAC), since all
+		buffers can be full shortly after enabling the interface
+		on high ethernet traffic.
+		Defaults to 4 if not defined.
+
 The following definitions that deal with the placement and management
 of environment data (variable area); in general, we support the
 following configurations:
@@ -1710,13 +1757,13 @@ Low Level (hardware related) configuration options:
 		#define'd default value in commproc.h resp.
 		cpm_8260.h.

- CFG_PCI_SLV_MEM_LOCAL, CFG_PCI_SLV_MEM_BUS, CFG_PICMR0_MASK_ATTRIB, 
-  CFG_PCI_MSTR0_LOCAL, CFG_PCIMSK0_MASK, CFG_PCI_MSTR1_LOCAL, 
-  CFG_PCIMSK1_MASK, CFG_PCI_MSTR_MEM_LOCAL, CFG_PCI_MSTR_MEM_BUS, 
-  CFG_CPU_PCI_MEM_START, CFG_PCI_MSTR_MEM_SIZE, CFG_POCMR0_MASK_ATTRIB, 
-  CFG_PCI_MSTR_MEMIO_LOCAL, CFG_PCI_MSTR_MEMIO_BUS, CPU_PCI_MEMIO_START, 
-  CFG_PCI_MSTR_MEMIO_SIZE, CFG_POCMR1_MASK_ATTRIB, CFG_PCI_MSTR_IO_LOCAL, 
-  CFG_PCI_MSTR_IO_BUS, CFG_CPU_PCI_IO_START, CFG_PCI_MSTR_IO_SIZE, 
+- CFG_PCI_SLV_MEM_LOCAL, CFG_PCI_SLV_MEM_BUS, CFG_PICMR0_MASK_ATTRIB,
+  CFG_PCI_MSTR0_LOCAL, CFG_PCIMSK0_MASK, CFG_PCI_MSTR1_LOCAL,
+  CFG_PCIMSK1_MASK, CFG_PCI_MSTR_MEM_LOCAL, CFG_PCI_MSTR_MEM_BUS,
+  CFG_CPU_PCI_MEM_START, CFG_PCI_MSTR_MEM_SIZE, CFG_POCMR0_MASK_ATTRIB,
+  CFG_PCI_MSTR_MEMIO_LOCAL, CFG_PCI_MSTR_MEMIO_BUS, CPU_PCI_MEMIO_START,
+  CFG_PCI_MSTR_MEMIO_SIZE, CFG_POCMR1_MASK_ATTRIB, CFG_PCI_MSTR_IO_LOCAL,
+  CFG_PCI_MSTR_IO_BUS, CFG_CPU_PCI_IO_START, CFG_PCI_MSTR_IO_SIZE,
  CFG_POCMR2_MASK_ATTRIB: (MPC826x only)
 		Overrides the default PCI memory map in cpu/mpc8260/pci.c if set.

@@ -1763,6 +1810,7 @@ configurations; the following names are supported:
    GENIETV_config	  TQM823L_config	PIP405_config
    GEN860T_config	  EBONY_config		FPS860L_config
    ELPT860_config	  cmi_mpc5xx_config	NETVIA_config
+    at91rm9200dk_config

 Note: for some board special configuration names may exist; check  if
      additional  information is available from the board vendor; for
@@ -1981,6 +2029,14 @@ Some configuration options can be set using Environment Variables:

 		  setenv initrd_high 00c00000

+                  If you set initrd_high to 0xFFFFFFFF, this is an
+                  indication to U-Boot that all addresses are legal
+                  for the Linux kernel, including addresses in flash
+                  memory. In this case U-Boot will NOT COPY the
+                  ramdisk at all. This may be useful to reduce the
+                  boot time on your system, but requires that this
+                  feature is supported by your Linux kernel.
+
  ipaddr	- IP address; needed for tftpboot command

  loadaddr	- Default load address for commands like "bootp",
@@ -2033,6 +2089,48 @@ Please note that changes to some configuration parameters may take
 only effect after the next boot (yes, that's just like Windoze :-).


+Command Line Parsing:
+=====================
+
+There are two different command line parsers available  with  U-Boot:
+the old "simple" one, and the much more pwerful "hush" shell:
+
+Old, simple command line parser:
+--------------------------------
+
+- supports environment variables (through setenv / saveenv commands)
+- several commands on one line, separated by ';'
+- variable substitution using "... $(name) ..." syntax
+- special characters ('$', ';') can be escaped by prefixing with '\',
+  for example:
+	setenv bootcmd bootm \$(address)
+- You can also escape text by enclosing in single apostrophes, for example:
+	setenv addip 'setenv bootargs $bootargs ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname::off'
+
+Hush shell:
+-----------
+
+- similar to Bourne shell, with control structures like
+  if...then...else...fi, for...do...done; while...do...done,
+  until...do...done, ...
+- supports environment ("global") variables (through setenv / saveenv
+  commands) and local shell variables (through standard shell syntax
+  "name=value"); only environment variables can be used with "run"
+  command
+
+General rules:
+--------------
+
+(1) If a command line (or an environment variable executed by a "run"
+    command) contains several commands separated by semicolon, and
+    one of these commands fails, then the remaining commands will be
+    executed anyway.
+
+(2) If you execute several variables with one call to run (i. e.
+    calling run with a list af variables as arguments), any failing
+    command will cause "run" to terminate, i. e. the remaining
+    variables are not executed.
+
 Note for Redundant Ethernet Interfaces:
 =======================================

@@ -2548,12 +2646,20 @@ Minicom warning:
 ================

 Over time, many people have reported problems when trying to used the
-"minicom" terminal emulation program  for  serial  download.  I  (wd)
-consider  minicom  to  be  broken, and recommend not to use it. Under
-Unix, I recommend  to  use  CKermit  for  general  purpose  use  (and
+"minicom" terminal emulation program for serial download. I (wd)
+consider minicom to be broken, and recommend not to use it. Under
+Unix, I recommend to use C-Kermit for general purpose use (and
 especially for kermit binary protocol download ("loadb" command), and
 use "cu" for S-Record download ("loads" command).

+Nevertheless, if you absolutely want to use it try adding this
+configuration to your "File transfer protocols" section:
+
+	   Name    Program                      Name U/D FullScr IO-Red. Multi
+	X  kermit  /usr/bin/kermit -i -l %l -s   Y    U    Y       N      N
+	Y  kermit  /usr/bin/kermit -i -l %l -r   N    D    Y       N      N
+
+
 NetBSD Notes:
 =============

@@ -2905,6 +3011,13 @@ it:
  We accept patches as plain text, MIME attachments or as uuencoded
  gzipped text.

+* If one logical set of modifications affects or creates several
+  files, all these changes shall be submitted in a SINGLE patch file.
+
+* Changesets that contain different, unrelated modifications shall be
+  submitted as SEPARATE patches, one patch per changeset.
+  
+
 Notes:

 * Before sending the patch, run the MAKEALL script on your patched
--- a/board/LEOX/elpt860/flash.c
+++ b/board/LEOX/elpt860/flash.c
@@ -118,7 +118,7 @@ flash_init (void)
  /* monitor protection ON by default */
  flash_protect (FLAG_PROTECT_SET,
 		 CFG_MONITOR_BASE,
-		 CFG_MONITOR_BASE + CFG_MONITOR_LEN-1,
+		 CFG_MONITOR_BASE + monitor_flash_len-1,
 		 &flash_info[0]);
 #endif
  
--- a/board/MAI/AmigaOneG3SE/flash_new.c
+++ b/board/MAI/AmigaOneG3SE/flash_new.c
@@ -120,7 +120,7 @@ unsigned long flash_init (void)
 		/* monitor protection ON by default */
 		flash_protect(FLAG_PROTECT_SET,
 			      CFG_MONITOR_BASE,
-			      CFG_MONITOR_BASE + CFG_MONITOR_LEN - 1,
+			      CFG_MONITOR_BASE + monitor_flash_len - 1,
 			      &flash_info[0]);
 #endif

--- a/board/MAI/bios_emulator/scitech/src/v86bios/command.c
+++ b/board/MAI/bios_emulator/scitech/src/v86bios/command.c
@@ -36,6 +36,3 @@ getline(char *buf,int *num,int max_num)
    line_pointer = line_pointer + *num;
    len = len - *num;
 }
-
-
-
--- a/board/RPXClassic/flash.c
+++ b/board/RPXClassic/flash.c
@@ -64,7 +64,7 @@ unsigned long flash_init (void)
 	/* monitor protection ON by default */
 	flash_protect(FLAG_PROTECT_SET,
 		      CFG_MONITOR_BASE,
-		      CFG_MONITOR_BASE+CFG_MONITOR_LEN-1,
+		      CFG_MONITOR_BASE+monitor_flash_len-1,
 		      &flash_info[0]);
 #endif

--- a/board/RPXlite/flash.c
+++ b/board/RPXlite/flash.c
@@ -85,7 +85,7 @@ unsigned long flash_init (void)
 	/* monitor protection ON by default */
 	flash_protect(FLAG_PROTECT_SET,
 		      CFG_MONITOR_BASE,
-		      CFG_MONITOR_BASE+CFG_MONITOR_LEN-1,
+		      CFG_MONITOR_BASE+monitor_flash_len-1,
 		      &flash_info[0]);
 #endif

--- a/board/RRvision/flash.c
+++ b/board/RRvision/flash.c
@@ -73,7 +73,7 @@ unsigned long flash_init (void)
 	/* monitor protection ON by default */
 	flash_protect(FLAG_PROTECT_SET,
 		      CFG_MONITOR_BASE,
-		      CFG_MONITOR_BASE+CFG_MONITOR_LEN-1,
+		      CFG_MONITOR_BASE+monitor_flash_len-1,
 		      &flash_info[0]);
 #endif

--- a/board/a3000/Makefile
+++ b/board/a3000/Makefile
@@ -0,0 +1,40 @@
+#
+# (C) Copyright 2001
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB	= lib$(BOARD).a
+
+OBJS 	= $(BOARD).o flash.o
+
+$(LIB):	.depend $(OBJS)
+	$(AR) crv $@ $^
+
+#########################################################################
+
+.depend:	Makefile $(OBJS:.o=.c)
+		$(CC) -M $(CFLAGS) $(OBJS:.o=.c) > $@
+
+sinclude .depend
+
+#########################################################################
--- a/board/a3000/README
+++ b/board/a3000/README
@@ -0,0 +1,18 @@
+U-Boot for Artis SBC-A3000
+---------------------------
+
+Artis SBC-A3000 has one flash socket that the user uses Intel 28F128J3A (16MB)
+or 28F064J3A (8MB) chips.
+
+In board's notation, bank 0 is the one at the address of 0xFF000000.
+bank 1 is the one at the address of 0xFF800000
+
+On power-up the processor jumps to the address of 0xFFF00100, the last
+megabyte of the bank 0 of flash.
+
+Thus, U-Boot is configured to reside in flash starting at the address of
+0xFFF00000.  The environment space is located in flash separately from
+U-Boot, at the address of 0xFFFE0000.
+
+There is a National ns83815 10/100M ethernet controller on-board.
+
--- a/board/a3000/a3000.c
+++ b/board/a3000/a3000.c
@@ -0,0 +1,144 @@
+/*
+ * (C) Copyright 2001
+ * Rob Taylor, Flying Pig Systems. robt@flyingpig.com.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <mpc824x.h>
+#include <pci.h>
+
+int checkboard (void)
+{
+	ulong busfreq  = get_bus_freq(0);
+	char  buf[32];
+
+	printf("Board: A3000 Local Bus at %s MHz\n", strmhz(buf, busfreq));
+	return 0;
+
+}
+
+long int initdram (int board_type)
+{
+	int              i, cnt;
+	volatile uchar * base= CFG_SDRAM_BASE;
+	volatile ulong * addr;
+	ulong            save[32];
+	ulong            val, ret  = 0;
+
+	for (i=0, cnt=(CFG_MAX_RAM_SIZE / sizeof(long)) >> 1; cnt > 0; cnt >>= 1) {
+		addr = (volatile ulong *)base + cnt;
+		save[i++] = *addr;
+		*addr = ~cnt;
+	}
+
+	addr = (volatile ulong *)base;
+	save[i] = *addr;
+	*addr = 0;
+
+	if (*addr != 0) {
+		*addr = save[i];
+		goto Done;
+	}
+
+	for (cnt = 1; cnt <= CFG_MAX_RAM_SIZE / sizeof(long); cnt <<= 1) {
+		addr = (volatile ulong *)base + cnt;
+		val = *addr;
+		*addr = save[--i];
+		if (val != ~cnt) {
+			ulong new_bank0_end = cnt * sizeof(long) - 1;
+			ulong mear1  = mpc824x_mpc107_getreg(MEAR1);
+			ulong emear1 = mpc824x_mpc107_getreg(EMEAR1);
+			mear1 =  (mear1  & 0xFFFFFF00) |
+			  ((new_bank0_end & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT);
+			emear1 = (emear1 & 0xFFFFFF00) |
+			  ((new_bank0_end & MICR_ADDR_MASK) >> MICR_EADDR_SHIFT);
+			mpc824x_mpc107_setreg(MEAR1,  mear1);
+			mpc824x_mpc107_setreg(EMEAR1, emear1);
+
+			ret = cnt * sizeof(long);
+			goto Done;
+		}
+	}
+
+	ret = CFG_MAX_RAM_SIZE;
+Done:
+	return ret;
+}
+
+/*
+ * Initialize PCI Devices
+ */
+#if 1
+#ifndef CONFIG_PCI_PNP
+static struct pci_config_table pci_a3000_config_table[] = {
+	{ PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
+	  0x0, 0x0, 0x0, /* unknown eth0 divice */
+	  pci_cfgfunc_config_device, { PCI_ENET0_IOADDR,
+				       PCI_ENET0_MEMADDR,
+				       PCI_COMMAND_IO |
+				       PCI_COMMAND_MEMORY |
+				       PCI_COMMAND_MASTER }},
+	{ PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
+	  0x0, 0x0, 0x0, /* unknown eth1 device */
+	  pci_cfgfunc_config_device, { PCI_ENET1_IOADDR,
+				       PCI_ENET1_MEMADDR,
+				       PCI_COMMAND_IO |
+				       PCI_COMMAND_MEMORY |
+				       PCI_COMMAND_MASTER }},
+	{ PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
+	  0x0, 0x0, 0x0, /* unknown eth1 device */
+	  pci_cfgfunc_config_device, { PCI_ENET2_IOADDR,
+				       PCI_ENET2_MEMADDR,
+				       PCI_COMMAND_IO |
+				       PCI_COMMAND_MEMORY |
+				       PCI_COMMAND_MASTER }},
+	{ }
+};
+#endif
+
+#else
+
+#ifndef CONFIG_PCI_PNP
+static struct pci_config_table pci_a3000_config_table[] = {
+	{ PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 0x0f, PCI_ANY_ID,
+	  pci_cfgfunc_config_device, { PCI_ENET0_IOADDR,
+				       PCI_ENET0_MEMADDR,
+				       PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER }},
+	{ PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 0x10, PCI_ANY_ID,
+	  pci_cfgfunc_config_device, { PCI_ENET1_IOADDR,
+				       PCI_ENET1_MEMADDR,
+				       PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER }},
+	{ }
+};
+#endif
+
+#endif
+
+struct pci_controller hose = {
+#ifndef CONFIG_PCI_PNP
+	config_table: pci_a3000_config_table,
+#endif
+};
+
+void pci_init_board(void)
+{
+	pci_mpc824x_init(&hose);
+}
--- a/board/a3000/config.mk
+++ b/board/a3000/config.mk
@@ -0,0 +1,30 @@
+#
+# (C) Copyright 2000, 2001
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+#
+# Artis A-3000 boards
+#
+
+TEXT_BASE = 0xFFF00000
+
+PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE)
--- a/board/a3000/flash.c
+++ b/board/a3000/flash.c
@@ -0,0 +1,454 @@
+/*
+ * (C) Copyright 2001
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+
+#include <common.h>
+#include <mpc824x.h>
+
+#if defined(CFG_ENV_IS_IN_FLASH)
+# ifndef  CFG_ENV_ADDR
+#  define CFG_ENV_ADDR  (CFG_FLASH_BASE + CFG_ENV_OFFSET)
+# endif
+# ifndef  CFG_ENV_SIZE
+#  define CFG_ENV_SIZE  CFG_ENV_SECT_SIZE
+# endif
+# ifndef  CFG_ENV_SECT_SIZE
+#  define CFG_ENV_SECT_SIZE  CFG_ENV_SIZE
+# endif
+#endif
+
+
+/*---------------------------------------------------------------------*/
+#define DEBUG_FLASH
+
+#ifdef DEBUG_FLASH
+#define DEBUGF(fmt,args...) printf(fmt ,##args)
+#else
+#define DEBUGF(fmt,args...)
+#endif
+/*---------------------------------------------------------------------*/
+
+flash_info_t	flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips	*/
+
+/*-----------------------------------------------------------------------
+ * Functions
+ */
+static ulong flash_get_size (vu_char *addr, flash_info_t *info);
+static int write_data (flash_info_t *info, uchar *dest, uchar data);
+static void flash_get_offsets (ulong base, flash_info_t *info);
+
+#define BS(b)     (b)
+#define BYTEME(x) ((x) & 0xFF)
+
+/*-----------------------------------------------------------------------
+ */
+
+unsigned long flash_init (void)
+{
+	unsigned long flash_banks[CFG_MAX_FLASH_BANKS] = CFG_FLASH_BANKS;
+	unsigned long size, size_b[CFG_MAX_FLASH_BANKS];
+
+	int i;
+
+	/* Init: no FLASHes known */
+	for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) 
+	{
+		flash_info[i].flash_id = FLASH_UNKNOWN;
+
+		DEBUGF("Get flash bank %d @ 0x%08lx\n", i, flash_banks[i]);
+/*
+		size_b[i] = flash_get_size((vu_char *)flash_banks[i], &flash_info[i]);
+*/
+		size_b[i] = flash_get_size((vu_char *) 0xff800000 , &flash_info[i]);
+
+		if (flash_info[i].flash_id == FLASH_UNKNOWN) 
+		{
+			printf ("## Unknown FLASH on Bank %d: "
+				"ID 0x%lx, Size = 0x%08lx = %ld MB\n",
+				i, flash_info[i].flash_id,
+				size_b[i], size_b[i]<<20);
+		}
+		else
+		{
+			DEBUGF("## Flash bank %d at 0x%08lx sizes: 0x%08lx \n",
+				i, flash_banks[i], size_b[i]);
+
+			flash_get_offsets (flash_banks[i], &flash_info[i]);
+			flash_info[i].size = size_b[i];
+		}
+	}
+
+
+#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
+	DEBUGF("protect monitor %x @ %x\n", CFG_MONITOR_BASE, CFG_MONITOR_LEN);
+	/* monitor protection ON by default */
+	flash_protect(FLAG_PROTECT_SET,
+		      CFG_MONITOR_BASE,
+		      CFG_MONITOR_BASE+CFG_MONITOR_LEN-1,
+		      &flash_info[0]);
+#endif
+
+#ifdef	CFG_ENV_IS_IN_FLASH
+	/* ENV protection ON by default */
+	DEBUGF("protect environtment %x @ %x\n", CFG_ENV_ADDR, CFG_ENV_SECT_SIZE);
+	flash_protect(FLAG_PROTECT_SET,
+		      CFG_ENV_ADDR,
+		      CFG_ENV_ADDR+CFG_ENV_SECT_SIZE-1,
+		      &flash_info[0]);
+#endif
+
+	size = 0;
+	DEBUGF("## Final Flash bank sizes: ");
+	for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) 
+	{
+		DEBUGF("%08lx ", size_b[i]);
+		size += size_b[i];
+	}
+	DEBUGF("\n");
+	return (size);
+}
+
+/*-----------------------------------------------------------------------
+ */
+static void flash_get_offsets (ulong base, flash_info_t *info)
+{
+	int i;
+
+	if (info->flash_id == FLASH_UNKNOWN) {
+		return;
+	}
+
+	switch (info->flash_id & FLASH_VENDMASK) {
+		case FLASH_MAN_INTEL:
+		    for (i = 0; i < info->sector_count; i++) {
+				info->start[i] = base;
+				base += 0x00020000;		/* 128k per bank */
+		    }
+		    return;
+
+		default:
+		    printf ("Don't know sector ofsets for flash type 0x%lx\n", info->flash_id);
+		    return;
+	}
+}
+
+/*-----------------------------------------------------------------------
+ */
+void flash_print_info  (flash_info_t *info)
+{
+	int i;
+
+	if (info->flash_id == FLASH_UNKNOWN) {
+		printf ("missing or unknown FLASH type\n");
+		return;
+	}
+
+	switch (info->flash_id & FLASH_VENDMASK) {
+	case FLASH_MAN_AMD:	printf ("AMD ");		break;
+	case FLASH_MAN_FUJ:	printf ("Fujitsu ");		break;
+	case FLASH_MAN_SST:	printf ("SST ");		break;
+	case FLASH_MAN_STM:	printf ("STM ");		break;
+	case FLASH_MAN_INTEL:	printf ("Intel ");		break;
+	case FLASH_MAN_MT:	printf ("MT ");			break;
+	default:		printf ("Unknown Vendor ");	break;
+	}
+
+	switch (info->flash_id & FLASH_TYPEMASK) {
+	case FLASH_28F320J3A:	
+			printf ("28F320J3A (32Mbit = 128K x 32)\n");
+			break;
+	case FLASH_28F640J3A:	
+			printf ("28F640J3A (64Mbit = 128K x 64)\n");
+			break;
+	case FLASH_28F128J3A:	
+			printf ("28F128J3A (128Mbit = 128K x 128)\n");
+			break;
+	default:		
+			printf ("Unknown Chip Type\n");
+			break;
+	}
+
+#if 1
+	if (info->size >= (1 << 20)) {
+		i = 20;
+	} else {
+		i = 10;
+	}
+	printf ("  Size: %ld %cB in %d Sectors\n",
+		info->size >> i,
+		(i == 20) ? 'M' : 'k',
+		info->sector_count);
+
+	printf ("  Sector Start Addresses:");
+	for (i=0; i<info->sector_count; ++i) {
+		if ((i % 5) == 0)
+			printf ("\n   ");
+		printf (" %08lX%s",
+			info->start[i],
+			info->protect[i] ? " (RO)" : "     "
+		);
+	}
+	printf ("\n");
+#endif
+	return;
+}
+
+/*-----------------------------------------------------------------------
+ */
+
+
+/*-----------------------------------------------------------------------
+ */
+
+/*
+ * The following code cannot be run from FLASH!
+ */
+static ulong flash_get_size (vu_char *addr, flash_info_t *info)
+{
+	vu_char manuf, device;
+
+	addr[0] = BS(0x90);
+	manuf = BS(addr[0]);
+	DEBUGF("Manuf. ID @ 0x%08lx: 0x%08x\n", (ulong)addr, manuf);
+
+	switch (manuf) {
+	case BYTEME(AMD_MANUFACT):
+		info->flash_id = FLASH_MAN_AMD;
+		break;
+	case BYTEME(FUJ_MANUFACT):
+		info->flash_id = FLASH_MAN_FUJ;
+		break;
+	case BYTEME(SST_MANUFACT):
+		info->flash_id = FLASH_MAN_SST;
+		break;
+	case BYTEME(STM_MANUFACT):
+		info->flash_id = FLASH_MAN_STM;
+		break;
+	case BYTEME(INTEL_MANUFACT):
+		info->flash_id = FLASH_MAN_INTEL;
+		break;
+	default:
+		info->flash_id = FLASH_UNKNOWN;
+		info->sector_count = 0;
+		info->size = 0;
+		addr[0] = BS(0xFF);		/* restore read mode, (yes, BS is a NOP) */
+		return 0;			/* no or unknown flash	*/
+	}
+
+	device = BS(addr[2]);			/* device ID		*/
+
+	DEBUGF("Device ID @ 0x%08lx: 0x%08x\n", (ulong)(&addr[1]), device);
+
+	switch (device) {
+	case BYTEME(INTEL_ID_28F320J3A):
+		info->flash_id += FLASH_28F320J3A;
+		info->sector_count = 32;
+		info->size = 0x00400000;
+		break;				/* =>  4 MB		*/
+
+	case BYTEME(INTEL_ID_28F640J3A):
+		info->flash_id += FLASH_28F640J3A;
+		info->sector_count = 64;
+		info->size = 0x00800000;
+		break;				/* => 8 MB		*/
+
+	case BYTEME(INTEL_ID_28F128J3A):
+		info->flash_id += FLASH_28F128J3A;
+		info->sector_count = 128;
+		info->size = 0x01000000;
+		break;				/* => 16 MB		*/
+
+	default:
+		info->flash_id = FLASH_UNKNOWN;
+		addr[0] = BS(0xFF);		/* restore read mode (yes, a NOP) */
+		return 0;			/* => no or unknown flash */
+
+	}
+
+	if (info->sector_count > CFG_MAX_FLASH_SECT) {
+		printf ("** ERROR: sector count %d > max (%d) **\n",
+			info->sector_count, CFG_MAX_FLASH_SECT);
+		info->sector_count = CFG_MAX_FLASH_SECT;
+	}
+
+	addr[0] = BS(0xFF);		/* restore read mode */
+
+	return (info->size);
+}
+
+
+/*-----------------------------------------------------------------------
+ */
+
+int	flash_erase (flash_info_t *info, int s_first, int s_last)
+{
+	int flag, prot, sect;
+	ulong start, now, last;
+
+	if ((s_first < 0) || (s_first > s_last)) {
+		if (info->flash_id == FLASH_UNKNOWN) {
+			printf ("- missing\n");
+		} else {
+			printf ("- no sectors to erase\n");
+		}
+		return 1;
+	}
+
+	if ((info->flash_id & FLASH_VENDMASK) != FLASH_MAN_INTEL) {
+		printf ("Can erase only Intel flash types - aborted\n");
+		return 1;
+	}
+
+	prot = 0;
+	for (sect=s_first; sect<=s_last; ++sect) {
+		if (info->protect[sect]) {
+			prot++;
+		}
+	}
+
+	if (prot) {
+		printf ("- Warning: %d protected sectors will not be erased!\n", prot);
+	} else {
+		printf ("\n");
+	}
+
+	start = get_timer (0);
+	last  = start;
+	/* Start erase on unprotected sectors */
+	for (sect = s_first; sect<=s_last; sect++) {
+		if (info->protect[sect] == 0) {	/* not protected */
+			vu_char *addr = (vu_char *)(info->start[sect]);
+			unsigned long status;
+
+			/* Disable interrupts which might cause a timeout here */
+			flag = disable_interrupts();
+
+			*addr = BS(0x50);	/* clear status register */
+			*addr = BS(0x20);	/* erase setup */
+			*addr = BS(0xD0);	/* erase confirm */
+
+			/* re-enable interrupts if necessary */
+			if (flag) {
+				enable_interrupts();
+			}
+
+			/* wait at least 80us - let's wait 1 ms */
+			udelay (1000);
+
+			while (((status = BS(*addr)) & BYTEME(0x00800080)) != BYTEME(0x00800080)) {
+				if ((now=get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
+					printf ("Timeout\n");
+					*addr = BS(0xB0); /* suspend erase	  */
+					*addr = BS(0xFF); /* reset to read mode */
+					return 1;
+				}
+
+				/* show that we're waiting */
+				if ((now - last) > 1000) {	/* every second */
+					putc ('.');
+					last = now;
+				}
+			}
+
+			*addr = BS(0xFF);	/* reset to read mode */
+		}
+	}
+	printf (" done\n");
+	return 0;
+}
+
+/*-----------------------------------------------------------------------
+ * Copy memory to flash, returns:
+ * 0 - OK
+ * 1 - write timeout
+ * 2 - Flash not erased
+ * 4 - Flash not identified
+ */
+
+#define	FLASH_WIDTH	1	/* flash bus width in bytes */
+
+int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
+{
+	uchar *wp = (uchar *)addr;
+	int rc;
+
+	if (info->flash_id == FLASH_UNKNOWN) {
+		return 4;
+	}
+
+	while (cnt > 0) {
+		if ((rc = write_data(info, wp, *src)) != 0) {
+			return rc;
+		}
+		wp++;
+		src++;
+		cnt--;
+	}
+
+	return cnt;
+}
+
+/*-----------------------------------------------------------------------
+ * Write a word to Flash, returns:
+ * 0 - OK
+ * 1 - write timeout
+ * 2 - Flash not erased
+ */
+static int write_data (flash_info_t *info, uchar *dest, uchar data)
+{
+	vu_char *addr = (vu_char *)dest;
+	ulong status;
+	ulong start;
+	int flag;
+
+	/* Check if Flash is (sufficiently) erased */
+	if ((BS(*addr) & data) != data) {
+		return 2;
+	}
+	/* Disable interrupts which might cause a timeout here */
+	flag = disable_interrupts();
+
+	*addr = BS(0x40);		/* write setup */
+	*addr = data;
+
+	/* re-enable interrupts if necessary */
+	if (flag) {
+		enable_interrupts();
+	}
+
+	start = get_timer (0);
+
+	while (((status = BS(*addr)) & BYTEME(0x00800080)) != BYTEME(0x00800080)) {
+		if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
+			*addr = BS(0xFF);	/* restore read mode */
+			return 1;
+		}
+	}
+
+	*addr = BS(0xFF);	/* restore read mode */
+
+	return 0;
+}
+
+/*-----------------------------------------------------------------------
+ */
--- a/board/a3000/u-boot.lds
+++ b/board/a3000/u-boot.lds
@@ -0,0 +1,128 @@
+/*
+ * (C) Copyright 2001
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_ARCH(powerpc)
+SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
+/* Do we need any of these for elf?
+   __DYNAMIC = 0;    */
+SECTIONS
+{
+  /* Read-only sections, merged into text segment: */
+  . = + SIZEOF_HEADERS;
+  .interp : { *(.interp) }
+  .hash          : { *(.hash)		}
+  .dynsym        : { *(.dynsym)		}
+  .dynstr        : { *(.dynstr)		}
+  .rel.text      : { *(.rel.text)		}
+  .rela.text     : { *(.rela.text) 	}
+  .rel.data      : { *(.rel.data)		}
+  .rela.data     : { *(.rela.data) 	}
+  .rel.rodata    : { *(.rel.rodata) 	}
+  .rela.rodata   : { *(.rela.rodata) 	}
+  .rel.got       : { *(.rel.got)		}
+  .rela.got      : { *(.rela.got)		}
+  .rel.ctors     : { *(.rel.ctors)	}
+  .rela.ctors    : { *(.rela.ctors)	}
+  .rel.dtors     : { *(.rel.dtors)	}
+  .rela.dtors    : { *(.rela.dtors)	}
+  .rel.bss       : { *(.rel.bss)		}
+  .rela.bss      : { *(.rela.bss)		}
+  .rel.plt       : { *(.rel.plt)		}
+  .rela.plt      : { *(.rela.plt)		}
+  .init          : { *(.init)	}
+  .plt : { *(.plt) }
+  .text      :
+  {
+    cpu/mpc824x/start.o		(.text)
+    lib_ppc/board.o		(.text)
+    lib_ppc/ppcstring.o		(.text)
+    lib_generic/vsprintf.o	(.text)
+    lib_generic/crc32.o		(.text)
+    lib_generic/zlib.o		(.text)
+
+	. = DEFINED(env_offset) ? env_offset : .;
+    common/environment.o (.text)
+
+	*(.text)
+
+    *(.fixup)
+    *(.got1)
+    . = ALIGN(16);
+    *(.rodata)
+    *(.rodata1)
+  }
+  .fini      : { *(.fini)    } =0
+  .ctors     : { *(.ctors)   }
+  .dtors     : { *(.dtors)   }
+
+  /* Read-write section, merged into data segment: */
+  . = (. + 0x0FFF) & 0xFFFFF000;
+  _erotext = .;
+  PROVIDE (erotext = .);
+  .reloc   :
+  {
+    *(.got)
+    _GOT2_TABLE_ = .;
+    *(.got2)
+    _FIXUP_TABLE_ = .;
+    *(.fixup)
+  }
+  __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
+  __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
+
+  .data    :
+  {
+    *(.data)
+    *(.data1)
+    *(.sdata)
+    *(.sdata2)
+    *(.dynamic)
+    CONSTRUCTORS
+  }
+  _edata  =  .;
+  PROVIDE (edata = .);
+
+  __start___ex_table = .;
+  __ex_table : { *(__ex_table) }
+  __stop___ex_table = .;
+
+  . = ALIGN(4096);
+  __init_begin = .;
+  .text.init : { *(.text.init) }
+  .data.init : { *(.data.init) }
+  . = ALIGN(4096);
+  __init_end = .;
+
+  __bss_start = .;
+  .bss       :
+  {
+   *(.sbss) *(.scommon)
+   *(.dynbss)
+   *(.bss)
+   *(COMMON)
+  }
+
+  _end = . ;
+  PROVIDE (end = .);
+}
+
--- a/board/at91rm9200dk/at91rm9200dk.c
+++ b/board/at91rm9200dk/at91rm9200dk.c
@@ -30,28 +30,35 @@
 * Miscelaneous platform dependent initialisations
 */

-int board_init(void)
-  {
-  DECLARE_GLOBAL_DATA_PTR;
+int board_init (void)
+{
+	DECLARE_GLOBAL_DATA_PTR;

-    /* memory and cpu-speed are setup before relocation */
-    /* so we do _nothing_ here */
+	/* Enable Ctrlc */
+	console_init_f ();

-    /* arch number of AT91RM9200DK-Board */
-    gd->bd->bi_arch_number = 251;
-    /* adress of boot parameters */
-    gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
+	/* Correct IRDA resistor problem */
+	/* Set PA23_TXD in Output */
+	(AT91PS_PIO) AT91C_BASE_PIOA->PIO_OER = AT91C_PA23_TXD2;

-    return 0;
+	/* memory and cpu-speed are setup before relocation */
+	/* so we do _nothing_ here */
+
+	/* arch number of AT91RM9200DK-Board */
+	gd->bd->bi_arch_number = 251;
+	/* adress of boot parameters */
+	gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
+
+	return 0;
 }

-int dram_init(void)
+int dram_init (void)
 {
-  DECLARE_GLOBAL_DATA_PTR;
+	DECLARE_GLOBAL_DATA_PTR;

-  gd->bd->bi_dram[0].start = PHYS_SDRAM;
-  gd->bd->bi_dram[0].size  = PHYS_SDRAM_SIZE;
-  return 0;
+	gd->bd->bi_dram[0].start = PHYS_SDRAM;
+	gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE;
+	return 0;
 }

 /*
@@ -59,47 +66,47 @@ int dram_init(void)
 * The NAND lives in the CS2* space
 */
 #if (CONFIG_COMMANDS & CFG_CMD_NAND)
-extern void
-nand_probe(ulong physadr);
+extern void nand_probe (ulong physadr);

-#define AT91_SMARTMEDIA_BASE 0x40000000  /* physical address to access memory on NCS3 */
-void
-nand_init(void)
+#define AT91_SMARTMEDIA_BASE 0x40000000	/* physical address to access memory on NCS3 */
+void nand_init (void)
 {
 	/* Setup Smart Media, fitst enable the address range of CS3 */
-        *AT91C_EBI_CSA |= AT91C_EBI_CS3A_SMC_SmartMedia;
-        /* set the bus interface characteristics based on
-           tDS Data Set up Time 30 - ns
-           tDH Data Hold Time 20 - ns
-           tALS ALE Set up Time 20 - ns
-           16ns at 60 MHz ~= 3  */
+	*AT91C_EBI_CSA |= AT91C_EBI_CS3A_SMC_SmartMedia;
+	/* set the bus interface characteristics based on
+	   tDS Data Set up Time 30 - ns
+	   tDH Data Hold Time 20 - ns
+	   tALS ALE Set up Time 20 - ns
+	   16ns at 60 MHz ~= 3  */
 /*memory mapping structures */
 #define SM_ID_RWH	(5 << 28)
 #define SM_RWH		(1 << 28)
 #define SM_RWS		(0 << 24)
 #define SM_TDF		(1 << 8)
 #define SM_NWS		(3)
-        AT91C_BASE_SMC2->SMC2_CSR[3] = ( SM_RWH|SM_RWS | AT91C_SMC2_ACSS_STANDARD |
-                                         AT91C_SMC2_DBW_8 | SM_TDF |
-                                         AT91C_SMC2_WSEN | SM_NWS);
+	AT91C_BASE_SMC2->SMC2_CSR[3] = (SM_RWH | SM_RWS |
+		AT91C_SMC2_ACSS_STANDARD | AT91C_SMC2_DBW_8 |
+		SM_TDF | AT91C_SMC2_WSEN | SM_NWS);

-        /* enable the SMOE line PC0=SMCE, A21=CLE, A22=ALE */
-        *AT91C_PIOC_ASR = AT91C_PC0_BFCK | AT91C_PC1_BFRDY_SMOE | AT91C_PC3_BFBAA_SMWE;
-        *AT91C_PIOC_PDR = AT91C_PC0_BFCK | AT91C_PC1_BFRDY_SMOE | AT91C_PC3_BFBAA_SMWE;
+	/* enable the SMOE line PC0=SMCE, A21=CLE, A22=ALE */
+	*AT91C_PIOC_ASR = AT91C_PC0_BFCK | AT91C_PC1_BFRDY_SMOE |
+		AT91C_PC3_BFBAA_SMWE;
+	*AT91C_PIOC_PDR = AT91C_PC0_BFCK | AT91C_PC1_BFRDY_SMOE |
+		AT91C_PC3_BFBAA_SMWE;

 	/* Configure PC2 as input (signal READY of the SmartMedia) */
-        *AT91C_PIOC_PER = AT91C_PC2_BFAVD;  /* enable direct output enable */
-        *AT91C_PIOC_ODR = AT91C_PC2_BFAVD;  /* disable output */
+	*AT91C_PIOC_PER = AT91C_PC2_BFAVD;	/* enable direct output enable */
+	*AT91C_PIOC_ODR = AT91C_PC2_BFAVD;	/* disable output */

 	/* Configure PB1 as input (signal Card Detect of the SmartMedia) */
-        *AT91C_PIOB_PER = AT91C_PIO_PB1;  /* enable direct output enable */
-        *AT91C_PIOB_ODR = AT91C_PIO_PB1;  /* disable output */
+	*AT91C_PIOB_PER = AT91C_PIO_PB1;	/* enable direct output enable */
+	*AT91C_PIOB_ODR = AT91C_PIO_PB1;	/* disable output */

-        if (*AT91C_PIOB_PDSR & AT91C_PIO_PB1)
-          printf ("No ");
-        printf ("SmartMedia card inserted\n");
+	if (*AT91C_PIOB_PDSR & AT91C_PIO_PB1)
+		printf ("No ");
+	printf ("SmartMedia card inserted\n");

-	printf("Probing at 0x%.8x\n", AT91_SMARTMEDIA_BASE);
-	nand_probe(AT91_SMARTMEDIA_BASE);
+	printf ("Probing at 0x%.8x\n", AT91_SMARTMEDIA_BASE);
+	nand_probe (AT91_SMARTMEDIA_BASE);
 }
 #endif
--- a/board/at91rm9200dk/config.mk
+++ b/board/at91rm9200dk/config.mk
@@ -1,2 +1,2 @@
-TEXT_BASE = 0x21fa0000
+TEXT_BASE = 0x21f00000

--- a/board/at91rm9200dk/flash.c
+++ b/board/at91rm9200dk/flash.c
@@ -31,11 +31,40 @@
 ulong myflush(void);


+/* Flash Organization Structure */
+typedef struct OrgDef
+{
+	unsigned int sector_number;
+	unsigned int sector_size;
+} OrgDef;
+
+
+/* Flash Organizations */
+OrgDef OrgAT49BV16x4[] =
+{
+	{ 8, 8*1024 }, /* 8 * 8kBytes sectors */
+	{ 2, 32*1024 }, /* 2 * 32kBytes sectors */	
+	{ 30, 64*1024 } /* 30 * 64kBytes sectors */	
+};
+
+OrgDef OrgAT49BV16x4A[] =
+{
+	{ 8, 8*1024 }, /* 8 * 8kBytes sectors */	
+	{ 31, 64*1024 } /* 31 * 64kBytes sectors */	
+};
+
+
 #define FLASH_BANK_SIZE 0x200000	/* 2 MB */
 #define MAIN_SECT_SIZE  0x10000		/* 64 KB */

 flash_info_t    flash_info[CFG_MAX_FLASH_BANKS];

+/* AT49BV1614A Codes */
+#define FLASH_CODE1		0xAA
+#define FLASH_CODE2		0x55
+#define ID_IN_CODE		0x90
+#define ID_OUT_CODE		0xF0
+

 #define CMD_READ_ARRAY		0x00F0
 #define CMD_UNLOCK1		0x00AA
@@ -48,6 +77,9 @@ flash_info_t    flash_info[CFG_MAX_FLASH_BANKS];
 #define MEM_FLASH_ADDR1		(*(volatile u16 *)(CFG_FLASH_BASE + (0x00005555<<1)))
 #define MEM_FLASH_ADDR2		(*(volatile u16 *)(CFG_FLASH_BASE + (0x00002AAA<<1)))

+#define IDENT_FLASH_ADDR1	(*(volatile u16 *)(CFG_FLASH_BASE + (0x0000555<<1)))
+#define IDENT_FLASH_ADDR2	(*(volatile u16 *)(CFG_FLASH_BASE + (0x0000AAA<<1)))
+
 #define BIT_ERASE_DONE		0x0080
 #define BIT_RDY_MASK		0x0080
 #define BIT_PROGRAM_ERROR	0x0020
@@ -59,339 +91,375 @@ flash_info_t    flash_info[CFG_MAX_FLASH_BANKS];

 /*-----------------------------------------------------------------------
 */
-
-ulong flash_init(void)
+void flash_identification (flash_info_t * info)
 {
-    int i, j;
-    ulong size = 0;
+	volatile u16 manuf_code, device_code, add_device_code;

-    for (i = 0; i < CFG_MAX_FLASH_BANKS; i++)
-    {
-	ulong flashbase = 0;
-	flash_info[i].flash_id =
-	  (ATM_MANUFACT & FLASH_VENDMASK) |
-	  (ATM_ID_BV1614 & FLASH_TYPEMASK);
-	flash_info[i].size = FLASH_BANK_SIZE;
-	flash_info[i].sector_count = CFG_MAX_FLASH_SECT;
-	memset(flash_info[i].protect, 0, CFG_MAX_FLASH_SECT);
-	if (i == 0)
-	  flashbase = PHYS_FLASH_1;
-	else
-	  panic("configured to many flash banks!\n");
-	for (j = 0; j < flash_info[i].sector_count; j++)
-	{
+	IDENT_FLASH_ADDR1 = FLASH_CODE1;
+	IDENT_FLASH_ADDR2 = FLASH_CODE2;
+	IDENT_FLASH_ADDR1 = ID_IN_CODE;

-	    if (j <= 9)
-	    {
-		/* 1st to 8th are 8 KB */
-		if (j <= 7)
-		{
-		    flash_info[i].start[j] = flashbase + j*0x2000;
+	manuf_code = *(volatile u16 *) CFG_FLASH_BASE;
+	device_code = *(volatile u16 *) (CFG_FLASH_BASE + 2);
+	add_device_code = *(volatile u16 *) (CFG_FLASH_BASE + (3 << 1));
+
+	IDENT_FLASH_ADDR1 = FLASH_CODE1;
+	IDENT_FLASH_ADDR2 = FLASH_CODE2;
+	IDENT_FLASH_ADDR1 = ID_OUT_CODE;
+
+	/* Vendor type */
+	info->flash_id = ATM_MANUFACT & FLASH_VENDMASK;
+	printf ("Atmel: ");
+
+	if ((device_code & FLASH_TYPEMASK) == (ATM_ID_BV1614 & FLASH_TYPEMASK)) {
+
+		if ((add_device_code & FLASH_TYPEMASK) ==
+			(ATM_ID_BV1614A & FLASH_TYPEMASK)) {
+			info->flash_id |= ATM_ID_BV1614A & FLASH_TYPEMASK;
+			printf ("AT49BV1614A (16Mbit)\n");
 		}

-		/* 9th and 10th are both 32 KB */
-		if ((j == 8) || (j == 9))
-		{
-			flash_info[i].start[j] = flashbase + 0x10000 + (j-8)*0x8000;
-		}
-	    }
-	    else
-	    {
-		flash_info[i].start[j] = flashbase + (j-8)*MAIN_SECT_SIZE;
-	    }
+	} else {				/* AT49BV1614 Flash */
+		info->flash_id |= ATM_ID_BV1614 & FLASH_TYPEMASK;
+		printf ("AT49BV1614 (16Mbit)\n");
 	}
-	size += flash_info[i].size;
-    }
+}

-    flash_protect(FLAG_PROTECT_SET,
-		  CFG_FLASH_BASE,
-		  CFG_ENV_ADDR - 1,
-		  &flash_info[0]);

-    flash_protect(FLAG_PROTECT_SET,
-		  CFG_ENV_ADDR,
-		  CFG_ENV_ADDR + CFG_ENV_SIZE - 1,
-		  &flash_info[0]);
+ulong flash_init (void)
+{
+	int i, j, k;
+	unsigned int flash_nb_blocks, sector;
+	unsigned int start_address;
+	OrgDef *pOrgDef;

-    return size;
+	ulong size = 0;
+
+	for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) {
+		ulong flashbase = 0;
+
+		flash_identification (&flash_info[i]);
+
+		flash_info[i].size = FLASH_BANK_SIZE;
+
+		if ((flash_info[i].flash_id & FLASH_TYPEMASK) ==
+			(ATM_ID_BV1614 & FLASH_TYPEMASK)) {
+			flash_info[i].sector_count = CFG_MAX_FLASH_SECT;
+			memset (flash_info[i].protect, 0, CFG_MAX_FLASH_SECT);
+
+			pOrgDef = OrgAT49BV16x4;
+			flash_nb_blocks = sizeof (OrgAT49BV16x4) / sizeof (OrgDef);
+		} else {			/* AT49BV1614A Flash */
+			flash_info[i].sector_count = CFG_MAX_FLASH_SECT - 1;
+			memset (flash_info[i].protect, 0, CFG_MAX_FLASH_SECT - 1);
+
+			pOrgDef = OrgAT49BV16x4A;
+			flash_nb_blocks = sizeof (OrgAT49BV16x4A) / sizeof (OrgDef);
+		}
+
+		if (i == 0)
+			flashbase = PHYS_FLASH_1;
+		else
+			panic ("configured to many flash banks!\n");
+
+		sector = 0;
+		start_address = flashbase;
+
+		for (j = 0; j < flash_nb_blocks; j++) {
+			for (k = 0; k < pOrgDef[j].sector_number; k++) {
+				flash_info[i].start[sector++] = start_address;
+				start_address += pOrgDef[j].sector_size;
+			}
+		}
+
+		size += flash_info[i].size;
+	}
+
+	/* Protect binary boot image */
+	flash_protect (FLAG_PROTECT_SET,
+		       CFG_FLASH_BASE,
+		       CFG_FLASH_BASE + CFG_BOOT_SIZE - 1, &flash_info[0]);
+
+	/* Protect environment variables */
+	flash_protect (FLAG_PROTECT_SET,
+		       CFG_ENV_ADDR,
+		       CFG_ENV_ADDR + CFG_ENV_SIZE - 1, &flash_info[0]);
+
+	/* Protect U-Boot gzipped image */
+	flash_protect (FLAG_PROTECT_SET,
+		       CFG_U_BOOT_BASE,
+		       CFG_U_BOOT_BASE + CFG_U_BOOT_SIZE - 1, &flash_info[0]);
+
+	return size;
 }

 /*-----------------------------------------------------------------------
 */
-void flash_print_info  (flash_info_t *info)
+void flash_print_info (flash_info_t * info)
 {
-    int i;
+	int i;

-    switch (info->flash_id & FLASH_VENDMASK)
-    {
-    case (ATM_MANUFACT & FLASH_VENDMASK):
-	printf("Atmel: ");
-	break;
-    default:
-	printf("Unknown Vendor ");
-	break;
-    }
-
-    switch (info->flash_id & FLASH_TYPEMASK)
-    {
-    case (ATM_ID_BV1614 & FLASH_TYPEMASK):
-	printf("AT49BV1614 (16Mbit)\n");
-	break;
-    default:
-	printf("Unknown Chip Type\n");
-	goto Done;
-	break;
-    }
-
-    printf("  Size: %ld MB in %d Sectors\n",
-	   info->size >> 20, info->sector_count);
-
-    printf("  Sector Start Addresses:");
-    for (i = 0; i < info->sector_count; i++)
-    {
-	if ((i % 5) == 0)
-	{
-	    printf ("\n   ");
+	switch (info->flash_id & FLASH_VENDMASK) {
+	case (ATM_MANUFACT & FLASH_VENDMASK):
+		printf ("Atmel: ");
+		break;
+	default:
+		printf ("Unknown Vendor ");
+		break;
 	}
-	printf (" %08lX%s", info->start[i],
-		info->protect[i] ? " (RO)" : "     ");
-    }
-    printf ("\n");

-Done:
+	switch (info->flash_id & FLASH_TYPEMASK) {
+	case (ATM_ID_BV1614 & FLASH_TYPEMASK):
+		printf ("AT49BV1614 (16Mbit)\n");
+		break;
+	case (ATM_ID_BV1614A & FLASH_TYPEMASK):
+		printf ("AT49BV1614A (16Mbit)\n");
+		break;
+	default:
+		printf ("Unknown Chip Type\n");
+		goto Done;
+		break;
+	}
+
+	printf ("  Size: %ld MB in %d Sectors\n",
+		info->size >> 20, info->sector_count);
+
+	printf ("  Sector Start Addresses:");
+	for (i = 0; i < info->sector_count; i++) {
+		if ((i % 5) == 0) {
+			printf ("\n   ");
+		}
+		printf (" %08lX%s", info->start[i],
+			info->protect[i] ? " (RO)" : "     ");
+	}
+	printf ("\n");
+
+  Done:
 }

 /*-----------------------------------------------------------------------
 */

-int	flash_erase (flash_info_t *info, int s_first, int s_last)
+int flash_erase (flash_info_t * info, int s_first, int s_last)
 {
-    ulong result;
-    int iflag, cflag, prot, sect;
-    int rc = ERR_OK;
-    int chip1;
+	ulong result;
+	int iflag, cflag, prot, sect;
+	int rc = ERR_OK;
+	int chip1;

-    /* first look for protection bits */
+	/* first look for protection bits */

-    if (info->flash_id == FLASH_UNKNOWN)
-	return ERR_UNKNOWN_FLASH_TYPE;
+	if (info->flash_id == FLASH_UNKNOWN)
+		return ERR_UNKNOWN_FLASH_TYPE;

-    if ((s_first < 0) || (s_first > s_last)) {
-	return ERR_INVAL;
-    }
-
-    if ((info->flash_id & FLASH_VENDMASK) !=
-	(ATM_MANUFACT & FLASH_VENDMASK)) {
-	return ERR_UNKNOWN_FLASH_VENDOR;
-    }
-
-    prot = 0;
-    for (sect=s_first; sect<=s_last; ++sect) {
-	if (info->protect[sect]) {
-	    prot++;
+	if ((s_first < 0) || (s_first > s_last)) {
+		return ERR_INVAL;
 	}
-    }
-    if (prot)
-	return ERR_PROTECTED;

-    /*
-     * Disable interrupts which might cause a timeout
-     * here. Remember that our exception vectors are
-     * at address 0 in the flash, and we don't want a
-     * (ticker) exception to happen while the flash
-     * chip is in programming mode.
-     */
-    cflag = icache_status();
-    icache_disable();
-    iflag = disable_interrupts();
+	if ((info->flash_id & FLASH_VENDMASK) !=
+		(ATM_MANUFACT & FLASH_VENDMASK)) {
+		return ERR_UNKNOWN_FLASH_VENDOR;
+	}

-    /* Start erase on unprotected sectors */
-    for (sect = s_first; sect<=s_last && !ctrlc(); sect++)
-    {
-	printf("Erasing sector %2d ... ", sect);
-
-	/* arm simple, non interrupt dependent timer */
-	reset_timer_masked();
-
-	if (info->protect[sect] == 0)
-	{	/* not protected */
-	    volatile u16 *addr = (volatile u16 *)(info->start[sect]);
-
-	    MEM_FLASH_ADDR1 = CMD_UNLOCK1;
-	    MEM_FLASH_ADDR2 = CMD_UNLOCK2;
-	    MEM_FLASH_ADDR1 = CMD_ERASE_SETUP;
-
-	    MEM_FLASH_ADDR1 = CMD_UNLOCK1;
-	    MEM_FLASH_ADDR2 = CMD_UNLOCK2;
-	    *addr = CMD_ERASE_CONFIRM;
-
-	    /* wait until flash is ready */
-	    chip1 = 0;
-
-	    do
-	    {
-		result = *addr;
-
-		/* check timeout */
-		if (get_timer_masked() > CFG_FLASH_ERASE_TOUT)
-		{
-		    MEM_FLASH_ADDR1 = CMD_READ_ARRAY;
-		    chip1 = TMO;
-		    break;
+	prot = 0;
+	for (sect = s_first; sect <= s_last; ++sect) {
+		if (info->protect[sect]) {
+			prot++;
 		}
-
-		if (!chip1 && (result & 0xFFFF) & BIT_ERASE_DONE)
-			chip1 = READY;
-
-	    }  while (!chip1);
-
-	    MEM_FLASH_ADDR1 = CMD_READ_ARRAY;
-
-	    if (chip1 == ERR)
-	    {
-		rc = ERR_PROG_ERROR;
-		goto outahere;
-	    }
-	    if (chip1 == TMO)
-	    {
-		rc = ERR_TIMOUT;
-		goto outahere;
-	    }
-
-	    printf("ok.\n");
 	}
-	else /* it was protected */
-	{
-	    printf("protected!\n");
-	}
-    }
+	if (prot)
+		return ERR_PROTECTED;

-    if (ctrlc())
-      printf("User Interrupt!\n");
+	/*
+	 * Disable interrupts which might cause a timeout
+	 * here. Remember that our exception vectors are
+	 * at address 0 in the flash, and we don't want a
+	 * (ticker) exception to happen while the flash
+	 * chip is in programming mode.
+	 */
+	cflag = icache_status ();
+	icache_disable ();
+	iflag = disable_interrupts ();
+
+	/* Start erase on unprotected sectors */
+	for (sect = s_first; sect <= s_last && !ctrlc (); sect++) {
+		printf ("Erasing sector %2d ... ", sect);
+
+		/* arm simple, non interrupt dependent timer */
+		reset_timer_masked ();
+
+		if (info->protect[sect] == 0) {	/* not protected */
+			volatile u16 *addr = (volatile u16 *) (info->start[sect]);
+
+			MEM_FLASH_ADDR1 = CMD_UNLOCK1;
+			MEM_FLASH_ADDR2 = CMD_UNLOCK2;
+			MEM_FLASH_ADDR1 = CMD_ERASE_SETUP;
+
+			MEM_FLASH_ADDR1 = CMD_UNLOCK1;
+			MEM_FLASH_ADDR2 = CMD_UNLOCK2;
+			*addr = CMD_ERASE_CONFIRM;
+
+			/* wait until flash is ready */
+			chip1 = 0;
+
+			do {
+				result = *addr;
+
+				/* check timeout */
+				if (get_timer_masked () > CFG_FLASH_ERASE_TOUT) {
+					MEM_FLASH_ADDR1 = CMD_READ_ARRAY;
+					chip1 = TMO;
+					break;
+				}
+
+				if (!chip1 && (result & 0xFFFF) & BIT_ERASE_DONE)
+					chip1 = READY;
+
+			} while (!chip1);
+
+			MEM_FLASH_ADDR1 = CMD_READ_ARRAY;
+
+			if (chip1 == ERR) {
+				rc = ERR_PROG_ERROR;
+				goto outahere;
+			}
+			if (chip1 == TMO) {
+				rc = ERR_TIMOUT;
+				goto outahere;
+			}
+
+			printf ("ok.\n");
+		} else {			/* it was protected */
+			printf ("protected!\n");
+		}
+	}
+
+	if (ctrlc ())
+		printf ("User Interrupt!\n");

 outahere:
-    /* allow flash to settle - wait 10 ms */
-    udelay_masked(10000);
+	/* allow flash to settle - wait 10 ms */
+	udelay_masked (10000);

-    if (iflag)
-      enable_interrupts();
+	if (iflag)
+		enable_interrupts ();

-    if (cflag)
-      icache_enable();
+	if (cflag)
+		icache_enable ();

-    return rc;
+	return rc;
 }

 /*-----------------------------------------------------------------------
 * Copy memory to flash
 */

-volatile static int write_word (flash_info_t *info, ulong dest, ulong data)
+volatile static int write_word (flash_info_t * info, ulong dest,
+								ulong data)
 {
-    volatile u16 *addr = (volatile u16 *)dest;
-    ulong result;
-    int rc = ERR_OK;
-    int cflag, iflag;
-    int chip1;
+	volatile u16 *addr = (volatile u16 *) dest;
+	ulong result;
+	int rc = ERR_OK;
+	int cflag, iflag;
+	int chip1;

-    /*
-     * Check if Flash is (sufficiently) erased
-     */
-    result = *addr;
-    if ((result & data) != data)
-        return ERR_NOT_ERASED;
-
-
-    /*
-     * Disable interrupts which might cause a timeout
-     * here. Remember that our exception vectors are
-     * at address 0 in the flash, and we don't want a
-     * (ticker) exception to happen while the flash
-     * chip is in programming mode.
-     */
-    cflag = icache_status();
-    icache_disable();
-    iflag = disable_interrupts();
-
-    MEM_FLASH_ADDR1 = CMD_UNLOCK1;
-    MEM_FLASH_ADDR2 = CMD_UNLOCK2;
-    MEM_FLASH_ADDR1 = CMD_PROGRAM;
-    *addr = data;
-
-    /* arm simple, non interrupt dependent timer */
-    reset_timer_masked();
-
-    /* wait until flash is ready */
-    chip1 = 0;
-    do
-    {
+	/*
+	 * Check if Flash is (sufficiently) erased
+	 */
 	result = *addr;
+	if ((result & data) != data)
+		return ERR_NOT_ERASED;

-	/* check timeout */
-	if (get_timer_masked() > CFG_FLASH_ERASE_TOUT)
-	{
-	    chip1 = ERR | TMO;
-	    break;
-	}
-	if (!chip1 && ((result & 0x80) == (data & 0x80)))
-		chip1 = READY;

-    }  while (!chip1);
+	/*
+	 * Disable interrupts which might cause a timeout
+	 * here. Remember that our exception vectors are
+	 * at address 0 in the flash, and we don't want a
+	 * (ticker) exception to happen while the flash
+	 * chip is in programming mode.
+	 */
+	cflag = icache_status ();
+	icache_disable ();
+	iflag = disable_interrupts ();

-    *addr = CMD_READ_ARRAY;
+	MEM_FLASH_ADDR1 = CMD_UNLOCK1;
+	MEM_FLASH_ADDR2 = CMD_UNLOCK2;
+	MEM_FLASH_ADDR1 = CMD_PROGRAM;
+	*addr = data;

-    if (chip1 == ERR || *addr != data)
-        rc = ERR_PROG_ERROR;
+	/* arm simple, non interrupt dependent timer */
+	reset_timer_masked ();

-    if (iflag)
-      enable_interrupts();
+	/* wait until flash is ready */
+	chip1 = 0;
+	do {
+		result = *addr;

-    if (cflag)
-      icache_enable();
+		/* check timeout */
+		if (get_timer_masked () > CFG_FLASH_ERASE_TOUT) {
+			chip1 = ERR | TMO;
+			break;
+		}
+		if (!chip1 && ((result & 0x80) == (data & 0x80)))
+			chip1 = READY;

-    return rc;
+	} while (!chip1);
+
+	*addr = CMD_READ_ARRAY;
+
+	if (chip1 == ERR || *addr != data)
+		rc = ERR_PROG_ERROR;
+
+	if (iflag)
+		enable_interrupts ();
+
+	if (cflag)
+		icache_enable ();
+
+	return rc;
 }

 /*-----------------------------------------------------------------------
 * Copy memory to flash.
 */

-int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
+int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
 {
-    ulong wp, data;
-    int rc;
+	ulong wp, data;
+	int rc;

-    if(addr & 1) {
-      printf("unaligned destination not supported\n");
-      return ERR_ALIGN;
-    };
+	if (addr & 1) {
+		printf ("unaligned destination not supported\n");
+		return ERR_ALIGN;
+	};

-    if((int)src & 1) {
-      printf("unaligned source not supported\n");
-      return ERR_ALIGN;
-    };
+	if ((int) src & 1) {
+		printf ("unaligned source not supported\n");
+		return ERR_ALIGN;
+	};

-    wp = addr;
+	wp = addr;

-    while (cnt >= 2) {
-	data = *((volatile u16*)src);
-	if ((rc = write_word(info, wp, data)) != 0) {
-	    return (rc);
+	while (cnt >= 2) {
+		data = *((volatile u16 *) src);
+		if ((rc = write_word (info, wp, data)) != 0) {
+			return (rc);
+		}
+		src += 2;
+		wp += 2;
+		cnt -= 2;
 	}
-	src += 2;
-	wp  += 2;
-	cnt -= 2;
-    }

-    if(cnt == 1) {
-      data =  (*((volatile u8*)src)) | (*((volatile u8*)(wp+1)) << 8);
-	if ((rc = write_word(info, wp, data)) != 0) {
-	    return (rc);
-	}
-	src += 1;
-	wp  += 1;
-	cnt -= 1;
-    };
+	if (cnt == 1) {
+		data = (*((volatile u8 *) src)) | (*((volatile u8 *) (wp + 1)) <<
+										   8);
+		if ((rc = write_word (info, wp, data)) != 0) {
+			return (rc);
+		}
+		src += 1;
+		wp += 1;
+		cnt -= 1;
+	};

-    return ERR_OK;
+	return ERR_OK;
 }
--- a/board/atc/atc.c
+++ b/board/atc/atc.c
@@ -203,6 +203,49 @@ const iop_conf_t iop_conf_tab[4][32] = {
    }
 };

+/*
+ * UPMB initialization table
+ */
+#define	_NOT_USED_	0xFFFFFFFF
+  
+static const uint rtc_table[] =
+{
+	/*
+	 * Single Read. (Offset 0 in UPMA RAM)
+	 */
+	0xfffec00, 0xfffac00, 0xfff2d00, 0xfef2800, 
+	0xfaf2080, 0xfaf2080, 0xfff2400, 0x1fff6c05, /* last */	    
+	/*
+	 * Burst Read. (Offset 8 in UPMA RAM)
+	 */
+	_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
+	_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
+	_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
+	_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
+	/*
+	 * Single Write. (Offset 18 in UPMA RAM)
+	 */
+	0xfffec00, 0xfffac00, 0xfff2d00, 0xfef2800, 
+	0xfaf2080, 0xfaf2080, 0xfaf2400, 0x1fbf6c05, /* last */
+	/*
+	 * Burst Write. (Offset 20 in UPMA RAM)
+	 */
+	_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
+	_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
+	_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
+	_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
+	/*
+	 * Refresh  (Offset 30 in UPMA RAM)
+	 */
+	_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
+	_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
+	_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
+	/*
+	 * Exception. (Offset 3c in UPMA RAM)
+	 */
+	_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
+};												
+																	
 /* ------------------------------------------------------------------------- */

 /* Check Board Identity:
@@ -319,6 +362,17 @@ static long int try_init (volatile memctl8260_t * memctl, ulong sdmr,
 	return (maxsize);
 }

+int misc_init_r(void)
+{
+	volatile immap_t *immap = (immap_t *) CFG_IMMR;
+	volatile memctl8260_t *memctl = &immap->im_memctl;
+	
+	upmconfig(UPMA, (uint *)rtc_table, sizeof(rtc_table) / sizeof(uint));
+	memctl->memc_mamr = MxMR_RLFx_6X | MxMR_WLFx_6X | MxMR_OP_NORM;	
+
+	return (0);
+}
+			
 long int initdram (int board_type)
 {
 	volatile immap_t *immap = (immap_t *) CFG_IMMR;
--- a/board/atc/config.mk
+++ b/board/atc/config.mk
@@ -30,12 +30,7 @@
 # in RAM where U-Boot is loaded at for debugging.
 #

-ifeq ($(CONFIG_BOOT_ROM),y)
-	TEXT_BASE := 0xFF800000
-	PLATFORM_CPPFLAGS += -DCONFIG_BOOT_ROM
-else
-	TEXT_BASE := 0xFF000000
-endif
+TEXT_BASE := 0xFF000000

 # RAM version
 #TEXT_BASE := 0x100000
--- a/board/atc/flash.c
+++ b/board/atc/flash.c
@@ -91,7 +91,7 @@ unsigned long flash_init (void)
 	/* monitor protection ON by default */
 	flash_protect(FLAG_PROTECT_SET,
 		      CFG_MONITOR_BASE,
-		      CFG_MONITOR_BASE+CFG_MONITOR_LEN-1,
+		      CFG_MONITOR_BASE+monitor_flash_len-1,
 		      flash_get_info(CFG_MONITOR_BASE));
 #endif

--- a/board/bmw/flash.c
+++ b/board/bmw/flash.c
@@ -219,7 +219,7 @@ flash_init(void)
 #if CFG_MONITOR_BASE >= CFG_FLASH_BASE
    flash_protect(FLAG_PROTECT_SET,
 		CFG_MONITOR_BASE,
-		CFG_MONITOR_BASE + CFG_MONITOR_LEN - 1,
+		CFG_MONITOR_BASE + monitor_flash_len - 1,
 		&flash_info[0]);
 #endif

--- a/board/bubinga405ep/Makefile
+++ b/board/bubinga405ep/Makefile
@@ -0,0 +1,47 @@
+#
+# (C) Copyright 2000
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB	= lib$(BOARD).a
+
+OBJS	= $(BOARD).o flash.o
+SOBJS	= init.o
+
+$(LIB):	$(OBJS) $(SOBJS)
+	$(AR) crv $@ $^
+
+clean:
+	rm -f $(SOBJS) $(OBJS)
+
+distclean:	clean
+	rm -f $(LIB) core *.bak .depend
+
+#########################################################################
+
+.depend:	Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
+		$(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
+
+sinclude .depend
+
+#########################################################################
--- a/board/bubinga405ep/bubinga405ep.c
+++ b/board/bubinga405ep/bubinga405ep.c
@@ -0,0 +1,126 @@
+/*
+ * (C) Copyright 2000
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+long int spd_sdram (void);
+
+#include <common.h>
+#include "bubinga405ep.h"
+#include <asm/processor.h>
+
+
+int board_pre_init (void)
+{
+	mtdcr (uicsr, 0xFFFFFFFF);      /* clear all ints */
+	mtdcr (uicer, 0x00000000);      /* disable all ints */
+	mtdcr (uiccr, 0x00000010);
+	mtdcr (uicpr, 0xFFFF7FF0);      /* set int polarities */
+	mtdcr (uictr, 0x00000010);      /* set int trigger levels */
+	mtdcr (uicsr, 0xFFFFFFFF);      /* clear all ints */
+
+#if 0
+#define mtebc(reg, data)  mtdcr(ebccfga,reg);mtdcr(ebccfgd,data)
+    /* CS1 */
+	/* BAS=0xF00,BS=0x0(1MB),BU=0x3(R/W),BW=0x0( 8 bits) */
+	mtebc (pb1ap, 0x02815480);
+	mtebc (pb1cr, 0xF0018000);
+
+	p = (unsigned int*)0xEF600708;
+	t = *p;
+	t = t | 0x00000400;
+	*p = t;
+
+	/* BAS=0xF01,BS=0x0(1MB),BU=0x3(R/W),BW=0x0(8 bits) */
+	mtebc (pb2ap, 0x04815A80);
+	mtebc (pb2cr, 0xF0118000);
+
+	/* BAS=0xF02,BS=0x0(1MB),BU=0x3(R/W),BW=0x0( 8 bits) */
+	mtebc (pb3ap, 0x01815280);
+	mtebc (pb3cr, 0xF0218000);
+
+	/* BAS=0xF03,BS=0x0(1MB),BU=0x3(R/W),BW=0x0(8 bits) */
+	mtebc (pb7ap, 0x01815280);
+	mtebc (pb7cr, 0xF0318000);
+
+
+	/* set UART1 control to select CTS/RTS */
+#define FPGA_BRDC       0xF0300004
+	*(volatile char *) (FPGA_BRDC) |= 0x1;
+
+#endif
+
+	return 0;
+}
+
+
+/* ------------------------------------------------------------------------- */
+
+/*
+ * Check Board Identity:
+ */
+
+int checkboard (void)
+{
+	unsigned char *s = getenv ("serial#");
+	unsigned char *e;
+
+	puts ("Board: ");
+
+	if (!s || strncmp (s, "BUBINGA405EP", 9)) {
+		puts ("### No HW ID - assuming WALNUT405");
+	} else {
+		for (e = s; *e; ++e) {
+			if (*e == ' ')
+				break;
+		}
+		for (; s < e; ++s) {
+			putc (*s);
+		}
+	}
+	putc ('\n');
+
+	return (0);
+}
+
+
+/* -------------------------------------------------------------------------
+  initdram(int board_type) reads EEPROM via I2c. EEPROM contains all of
+  the necessary info for SDRAM controller configuration
+   ------------------------------------------------------------------------- */
+long int initdram (int board_type)
+{
+	long int ret;
+
+	ret = spd_sdram ();
+	return ret;
+}
+
+/* ------------------------------------------------------------------------- */
+
+int testdram (void)
+{
+	/* TODO: XXX XXX XXX */
+	printf ("test: xxx MB - ok\n");
+
+	return (0);
+}
+
+/* ------------------------------------------------------------------------- */
--- a/board/bubinga405ep/bubinga405ep.h
+++ b/board/bubinga405ep/bubinga405ep.h
@@ -0,0 +1,44 @@
+/*
+ * (C) Copyright 2000
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/****************************************************************************
+ * FLASH Memory Map as used by TQ Monitor:
+ *
+ *                          Start Address    Length
+ * +-----------------------+ 0x4000_0000     Start of Flash -----------------
+ * | MON8xx code           | 0x4000_0100     Reset Vector
+ * +-----------------------+ 0x400?_????
+ * | (unused)              |
+ * +-----------------------+ 0x4001_FF00
+ * | Ethernet Addresses    |                 0x78
+ * +-----------------------+ 0x4001_FF78
+ * | (Reserved for MON8xx) |                 0x44
+ * +-----------------------+ 0x4001_FFBC
+ * | Lock Address          |                 0x04
+ * +-----------------------+ 0x4001_FFC0                     ^
+ * | Hardware Information  |                 0x40            | MON8xx
+ * +=======================+ 0x4002_0000 (sector border)    -----------------
+ * | Autostart Header      |                                 | Applications
+ * | ...                   |                                 v
+ *
+ *****************************************************************************/
--- a/board/bubinga405ep/config.mk
+++ b/board/bubinga405ep/config.mk
@@ -0,0 +1,29 @@
+#
+# (C) Copyright 2000
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+#
+# esd ADCIOP boards
+#
+
+#TEXT_BASE = 0xFFFE0000
+TEXT_BASE = 0xFFF80000
--- a/board/bubinga405ep/flash.c
+++ b/board/bubinga405ep/flash.c
@@ -0,0 +1,737 @@
+/*
+ * (C) Copyright 2000
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*
+ * Modified 4/5/2001
+ * Wait for completion of each sector erase command issued
+ * 4/5/2001
+ * Chris Hallinan - DS4.COM, Inc. - clh@net1plus.com
+ */
+
+#include <common.h>
+#include <ppc4xx.h>
+#include <asm/processor.h>
+
+flash_info_t	flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips	*/
+
+/*-----------------------------------------------------------------------
+ * Functions
+ */
+static ulong flash_get_size (vu_long *addr, flash_info_t *info);
+static int write_word (flash_info_t *info, ulong dest, ulong data);
+static void flash_get_offsets (ulong base, flash_info_t *info);
+
+#ifdef CONFIG_ADCIOP
+#define ADDR0           0x0aa9
+#define ADDR1           0x0556
+#define FLASH_WORD_SIZE unsigned char
+#endif
+
+#ifdef CONFIG_CPCI405
+#define ADDR0           0x5555
+#define ADDR1           0x2aaa
+#define FLASH_WORD_SIZE unsigned short
+#endif
+
+#ifdef CONFIG_WALNUT405
+#define ADDR0           0x5555
+#define ADDR1           0x2aaa
+#define FLASH_WORD_SIZE unsigned char
+#endif
+
+#ifdef CONFIG_BUBINGA405EP
+#define ADDR0           0x5555
+#define ADDR1           0x2aaa
+#define FLASH_WORD_SIZE unsigned char
+#endif
+
+
+/*-----------------------------------------------------------------------
+ */
+
+unsigned long flash_init (void)
+{
+	unsigned long size_b0, size_b1;
+	int i;
+        uint pbcr;
+        unsigned long base_b0, base_b1;
+
+	/* Init: no FLASHes known */
+	for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
+		flash_info[i].flash_id = FLASH_UNKNOWN;
+	}
+
+	/* Static FLASH Bank configuration here - FIXME XXX */
+
+	size_b0 = flash_get_size((vu_long *)FLASH_BASE0_PRELIM, &flash_info[0]);
+
+	if (flash_info[0].flash_id == FLASH_UNKNOWN) {
+		printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
+			size_b0, size_b0<<20);
+	}
+
+	/* Only one bank */
+	if (CFG_MAX_FLASH_BANKS == 1)
+	  {
+	    /* Setup offsets */
+	    flash_get_offsets (FLASH_BASE0_PRELIM, &flash_info[0]);
+
+	    /* Monitor protection ON by default */
+	    (void)flash_protect(FLAG_PROTECT_SET,
+				FLASH_BASE0_PRELIM,
+				FLASH_BASE0_PRELIM+CFG_MONITOR_LEN-1,
+				&flash_info[0]);
+	    size_b1 = 0 ;
+	    flash_info[0].size = size_b0;
+	  }
+
+	/* 2 banks */
+	else
+	  {
+	    size_b1 = flash_get_size((vu_long *)FLASH_BASE1_PRELIM, &flash_info[1]);
+
+	    /* Re-do sizing to get full correct info */
+
+	    if (size_b1)
+	      {
+		mtdcr(ebccfga, pb0cr);
+		pbcr = mfdcr(ebccfgd);
+		mtdcr(ebccfga, pb0cr);
+		base_b1 = -size_b1;
+		pbcr = (pbcr & 0x0001ffff) | base_b1 | (((size_b1/1024/1024)-1)<<17);
+		mtdcr(ebccfgd, pbcr);
+		/*          printf("pb1cr = %x\n", pbcr); */
+	      }
+
+	    if (size_b0)
+	      {
+		mtdcr(ebccfga, pb1cr);
+		pbcr = mfdcr(ebccfgd);
+		mtdcr(ebccfga, pb1cr);
+		base_b0 = base_b1 - size_b0;
+		pbcr = (pbcr & 0x0001ffff) | base_b0 | (((size_b0/1024/1024)-1)<<17);
+		mtdcr(ebccfgd, pbcr);
+		/*            printf("pb0cr = %x\n", pbcr); */
+	      }
+
+	    size_b0 = flash_get_size((vu_long *)base_b0, &flash_info[0]);
+
+	    flash_get_offsets (base_b0, &flash_info[0]);
+
+	    /* monitor protection ON by default */
+	    (void)flash_protect(FLAG_PROTECT_SET,
+				base_b0+size_b0-CFG_MONITOR_LEN,
+				base_b0+size_b0-1,
+				&flash_info[0]);
+
+	    if (size_b1) {
+	      /* Re-do sizing to get full correct info */
+	      size_b1 = flash_get_size((vu_long *)base_b1, &flash_info[1]);
+
+	      flash_get_offsets (base_b1, &flash_info[1]);
+
+	      /* monitor protection ON by default */
+	      (void)flash_protect(FLAG_PROTECT_SET,
+				  base_b1+size_b1-CFG_MONITOR_LEN,
+				  base_b1+size_b1-1,
+				  &flash_info[1]);
+	      /* monitor protection OFF by default (one is enough) */
+	      (void)flash_protect(FLAG_PROTECT_CLEAR,
+				  base_b0+size_b0-CFG_MONITOR_LEN,
+				  base_b0+size_b0-1,
+				  &flash_info[0]);
+	    } else {
+	      flash_info[1].flash_id = FLASH_UNKNOWN;
+	      flash_info[1].sector_count = -1;
+	    }
+
+	    flash_info[0].size = size_b0;
+	    flash_info[1].size = size_b1;
+	  }/* else 2 banks */
+	return (size_b0 + size_b1);
+}
+
+
+
+/*-----------------------------------------------------------------------
+ */
+static void flash_get_offsets (ulong base, flash_info_t *info)
+{
+	int i;
+
+	/* set up sector start address table */
+        if (((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) ||
+	    (info->flash_id  == FLASH_AM040)){
+	    for (i = 0; i < info->sector_count; i++)
+		info->start[i] = base + (i * 0x00010000);
+        } else {
+	    if (info->flash_id & FLASH_BTYPE) {
+		/* set sector offsets for bottom boot block type	*/
+		info->start[0] = base + 0x00000000;
+		info->start[1] = base + 0x00004000;
+		info->start[2] = base + 0x00006000;
+		info->start[3] = base + 0x00008000;
+		for (i = 4; i < info->sector_count; i++) {
+			info->start[i] = base + (i * 0x00010000) - 0x00030000;
+		}
+	    } else {
+		/* set sector offsets for top boot block type		*/
+		i = info->sector_count - 1;
+		info->start[i--] = base + info->size - 0x00004000;
+		info->start[i--] = base + info->size - 0x00006000;
+		info->start[i--] = base + info->size - 0x00008000;
+		for (; i >= 0; i--) {
+			info->start[i] = base + i * 0x00010000;
+		}
+	    }
+	}
+}
+
+/*-----------------------------------------------------------------------
+ */
+void flash_print_info  (flash_info_t *info)
+{
+	int i;
+        int k;
+        int size;
+        int erased;
+        volatile unsigned long *flash;
+
+	if (info->flash_id == FLASH_UNKNOWN) {
+		printf ("missing or unknown FLASH type\n");
+		return;
+	}
+
+	switch (info->flash_id & FLASH_VENDMASK) {
+	case FLASH_MAN_AMD:	printf ("AMD ");		break;
+	case FLASH_MAN_FUJ:	printf ("FUJITSU ");		break;
+	case FLASH_MAN_SST:	printf ("SST ");		break;
+	default:		printf ("Unknown Vendor ");	break;
+	}
+
+	switch (info->flash_id & FLASH_TYPEMASK) {
+	case FLASH_AM040:	printf ("AM29F040 (512 Kbit, uniform sector size)\n");
+				break;
+	case FLASH_AM400B:	printf ("AM29LV400B (4 Mbit, bottom boot sect)\n");
+				break;
+	case FLASH_AM400T:	printf ("AM29LV400T (4 Mbit, top boot sector)\n");
+				break;
+	case FLASH_AM800B:	printf ("AM29LV800B (8 Mbit, bottom boot sect)\n");
+				break;
+	case FLASH_AM800T:	printf ("AM29LV800T (8 Mbit, top boot sector)\n");
+				break;
+	case FLASH_AM160B:	printf ("AM29LV160B (16 Mbit, bottom boot sect)\n");
+				break;
+	case FLASH_AM160T:	printf ("AM29LV160T (16 Mbit, top boot sector)\n");
+				break;
+	case FLASH_AM320B:	printf ("AM29LV320B (32 Mbit, bottom boot sect)\n");
+				break;
+	case FLASH_AM320T:	printf ("AM29LV320T (32 Mbit, top boot sector)\n");
+				break;
+	case FLASH_SST800A:	printf ("SST39LF/VF800 (8 Mbit, uniform sector size)\n");
+				break;
+	case FLASH_SST160A:	printf ("SST39LF/VF160 (16 Mbit, uniform sector size)\n");
+				break;
+	default:		printf ("Unknown Chip Type\n");
+				break;
+	}
+
+	printf ("  Size: %ld KB in %d Sectors\n",
+		info->size >> 10, info->sector_count);
+
+	printf ("  Sector Start Addresses:");
+	for (i=0; i<info->sector_count; ++i) {
+                /*
+                 * Check if whole sector is erased
+                 */
+                if (i != (info->sector_count-1))
+                  size = info->start[i+1] - info->start[i];
+                else
+                  size = info->start[0] + info->size - info->start[i];
+                erased = 1;
+                flash = (volatile unsigned long *)info->start[i];
+                size = size >> 2;        /* divide by 4 for longword access */
+                for (k=0; k<size; k++)
+                  {
+                    if (*flash++ != 0xffffffff)
+                      {
+                        erased = 0;
+                        break;
+                      }
+                  }
+
+		if ((i % 5) == 0)
+			printf ("\n   ");
+#if 0 /* test-only */
+		printf (" %08lX%s",
+			info->start[i],
+			info->protect[i] ? " (RO)" : "     "
+#else
+		printf (" %08lX%s%s",
+			info->start[i],
+			erased ? " E" : "  ",
+			info->protect[i] ? "RO " : "   "
+#endif
+		);
+	}
+	printf ("\n");
+	return;
+}
+
+/*-----------------------------------------------------------------------
+ */
+
+
+/*-----------------------------------------------------------------------
+ */
+
+/*
+ * The following code cannot be run from FLASH!
+ */
+static ulong flash_get_size (vu_long *addr, flash_info_t *info)
+{
+	short i;
+	FLASH_WORD_SIZE value;
+	ulong base = (ulong)addr;
+        volatile FLASH_WORD_SIZE *addr2 = (FLASH_WORD_SIZE *)addr;
+
+	/* Write auto select command: read Manufacturer ID */
+	addr2[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
+	addr2[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
+	addr2[ADDR0] = (FLASH_WORD_SIZE)0x00900090;
+
+#ifdef CONFIG_ADCIOP
+	value = addr2[2];
+#else
+	value = addr2[0];
+#endif
+
+	switch (value) {
+	case (FLASH_WORD_SIZE)AMD_MANUFACT:
+		info->flash_id = FLASH_MAN_AMD;
+		break;
+	case (FLASH_WORD_SIZE)FUJ_MANUFACT:
+		info->flash_id = FLASH_MAN_FUJ;
+		break;
+	case (FLASH_WORD_SIZE)SST_MANUFACT:
+		info->flash_id = FLASH_MAN_SST;
+		break;
+	default:
+		info->flash_id = FLASH_UNKNOWN;
+		info->sector_count = 0;
+		info->size = 0;
+		return (0);			/* no or unknown flash	*/
+	}
+
+#ifdef CONFIG_ADCIOP
+	value = addr2[0];			/* device ID		*/
+        /*        printf("\ndev_code=%x\n", value); */
+#else
+	value = addr2[1];			/* device ID		*/
+#endif
+
+	switch (value) {
+	case (FLASH_WORD_SIZE)AMD_ID_F040B:
+	        info->flash_id += FLASH_AM040;
+		info->sector_count = 8;
+		info->size = 0x0080000; /* => 512 ko */
+		break;
+	case (FLASH_WORD_SIZE)AMD_ID_LV400T:
+		info->flash_id += FLASH_AM400T;
+		info->sector_count = 11;
+		info->size = 0x00080000;
+		break;				/* => 0.5 MB		*/
+
+	case (FLASH_WORD_SIZE)AMD_ID_LV400B:
+		info->flash_id += FLASH_AM400B;
+		info->sector_count = 11;
+		info->size = 0x00080000;
+		break;				/* => 0.5 MB		*/
+
+	case (FLASH_WORD_SIZE)AMD_ID_LV800T:
+		info->flash_id += FLASH_AM800T;
+		info->sector_count = 19;
+		info->size = 0x00100000;
+		break;				/* => 1 MB		*/
+
+	case (FLASH_WORD_SIZE)AMD_ID_LV800B:
+		info->flash_id += FLASH_AM800B;
+		info->sector_count = 19;
+		info->size = 0x00100000;
+		break;				/* => 1 MB		*/
+
+	case (FLASH_WORD_SIZE)AMD_ID_LV160T:
+		info->flash_id += FLASH_AM160T;
+		info->sector_count = 35;
+		info->size = 0x00200000;
+		break;				/* => 2 MB		*/
+
+	case (FLASH_WORD_SIZE)AMD_ID_LV160B:
+		info->flash_id += FLASH_AM160B;
+		info->sector_count = 35;
+		info->size = 0x00200000;
+		break;				/* => 2 MB		*/
+#if 0	/* enable when device IDs are available */
+	case (FLASH_WORD_SIZE)AMD_ID_LV320T:
+		info->flash_id += FLASH_AM320T;
+		info->sector_count = 67;
+		info->size = 0x00400000;
+		break;				/* => 4 MB		*/
+
+	case (FLASH_WORD_SIZE)AMD_ID_LV320B:
+		info->flash_id += FLASH_AM320B;
+		info->sector_count = 67;
+		info->size = 0x00400000;
+		break;				/* => 4 MB		*/
+#endif
+	case (FLASH_WORD_SIZE)SST_ID_xF800A:
+		info->flash_id += FLASH_SST800A;
+		info->sector_count = 16;
+		info->size = 0x00100000;
+		break;				/* => 1 MB		*/
+
+	case (FLASH_WORD_SIZE)SST_ID_xF160A:
+		info->flash_id += FLASH_SST160A;
+		info->sector_count = 32;
+		info->size = 0x00200000;
+		break;				/* => 2 MB		*/
+
+	default:
+		info->flash_id = FLASH_UNKNOWN;
+		return (0);			/* => no or unknown flash */
+
+	}
+
+	/* set up sector start address table */
+        if (((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) ||
+	    (info->flash_id  == FLASH_AM040)){
+	    for (i = 0; i < info->sector_count; i++)
+		info->start[i] = base + (i * 0x00010000);
+        } else {
+	    if (info->flash_id & FLASH_BTYPE) {
+		/* set sector offsets for bottom boot block type	*/
+		info->start[0] = base + 0x00000000;
+		info->start[1] = base + 0x00004000;
+		info->start[2] = base + 0x00006000;
+		info->start[3] = base + 0x00008000;
+		for (i = 4; i < info->sector_count; i++) {
+			info->start[i] = base + (i * 0x00010000) - 0x00030000;
+		}
+	    } else {
+		/* set sector offsets for top boot block type		*/
+		i = info->sector_count - 1;
+		info->start[i--] = base + info->size - 0x00004000;
+		info->start[i--] = base + info->size - 0x00006000;
+		info->start[i--] = base + info->size - 0x00008000;
+		for (; i >= 0; i--) {
+			info->start[i] = base + i * 0x00010000;
+		}
+	    }
+	}
+
+	/* check for protected sectors */
+	for (i = 0; i < info->sector_count; i++) {
+		/* read sector protection at sector address, (A7 .. A0) = 0x02 */
+		/* D0 = 1 if protected */
+#ifdef CONFIG_ADCIOP
+		addr2 = (volatile FLASH_WORD_SIZE *)(info->start[i]);
+		info->protect[i] = addr2[4] & 1;
+#else
+		addr2 = (volatile FLASH_WORD_SIZE *)(info->start[i]);
+                if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST)
+                  info->protect[i] = 0;
+                else
+                  info->protect[i] = addr2[2] & 1;
+#endif
+	}
+
+	/*
+	 * Prevent writes to uninitialized FLASH.
+	 */
+	if (info->flash_id != FLASH_UNKNOWN) {
+#if 0 /* test-only */
+#ifdef CONFIG_ADCIOP
+		addr2 = (volatile unsigned char *)info->start[0];
+                addr2[ADDR0] = 0xAA;
+                addr2[ADDR1] = 0x55;
+                addr2[ADDR0] = 0xF0;  /* reset bank */
+#else
+		addr2 = (FLASH_WORD_SIZE *)info->start[0];
+		*addr2 = (FLASH_WORD_SIZE)0x00F000F0;	/* reset bank */
+#endif
+#else /* test-only */
+		addr2 = (FLASH_WORD_SIZE *)info->start[0];
+		*addr2 = (FLASH_WORD_SIZE)0x00F000F0;	/* reset bank */
+#endif /* test-only */
+	}
+
+	return (info->size);
+}
+
+int wait_for_DQ7(flash_info_t *info, int sect)
+{
+	ulong start, now, last;
+	volatile FLASH_WORD_SIZE *addr = (FLASH_WORD_SIZE *)(info->start[sect]);
+
+	start = get_timer (0);
+    last  = start;
+    while ((addr[0] & (FLASH_WORD_SIZE)0x00800080) != (FLASH_WORD_SIZE)0x00800080) {
+        if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
+            printf ("Timeout\n");
+            return -1;
+        }
+        /* show that we're waiting */
+        if ((now - last) > 1000) {  /* every second */
+            putc ('.');
+            last = now;
+        }
+    }
+	return 0;
+}
+
+/*-----------------------------------------------------------------------
+ */
+
+int	flash_erase (flash_info_t *info, int s_first, int s_last)
+{
+	volatile FLASH_WORD_SIZE *addr = (FLASH_WORD_SIZE *)(info->start[0]);
+	volatile FLASH_WORD_SIZE *addr2;
+	int flag, prot, sect, l_sect;
+	int i;
+
+	if ((s_first < 0) || (s_first > s_last)) {
+		if (info->flash_id == FLASH_UNKNOWN) {
+			printf ("- missing\n");
+		} else {
+			printf ("- no sectors to erase\n");
+		}
+		return 1;
+	}
+
+	if (info->flash_id == FLASH_UNKNOWN) {
+		printf ("Can't erase unknown flash type - aborted\n");
+		return 1;
+	}
+
+	prot = 0;
+	for (sect=s_first; sect<=s_last; ++sect) {
+		if (info->protect[sect]) {
+			prot++;
+		}
+	}
+
+	if (prot) {
+		printf ("- Warning: %d protected sectors will not be erased!\n",
+			prot);
+	} else {
+		printf ("\n");
+	}
+
+	l_sect = -1;
+
+	/* Disable interrupts which might cause a timeout here */
+	flag = disable_interrupts();
+
+	/* Start erase on unprotected sectors */
+	for (sect = s_first; sect<=s_last; sect++) {
+		if (info->protect[sect] == 0) {	/* not protected */
+		    addr2 = (FLASH_WORD_SIZE *)(info->start[sect]);
+		    printf("Erasing sector %p\n", addr2);	/* CLH */
+
+		    if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) {
+			addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
+			addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
+			addr[ADDR0] = (FLASH_WORD_SIZE)0x00800080;
+			addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
+			addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
+			addr2[0] = (FLASH_WORD_SIZE)0x00500050;  /* block erase */
+			for (i=0; i<50; i++)
+				udelay(1000);  /* wait 1 ms */
+		    } else {
+			addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
+			addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
+			addr[ADDR0] = (FLASH_WORD_SIZE)0x00800080;
+			addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
+			addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
+			addr2[0] = (FLASH_WORD_SIZE)0x00300030;  /* sector erase */
+		    }
+		    l_sect = sect;
+		    /*
+		     * Wait for each sector to complete, it's more
+		     * reliable.  According to AMD Spec, you must
+		     * issue all erase commands within a specified
+		     * timeout.  This has been seen to fail, especially
+		     * if printf()s are included (for debug)!!
+		     */
+		    wait_for_DQ7(info, sect);
+		}
+	}
+
+	/* re-enable interrupts if necessary */
+	if (flag)
+		enable_interrupts();
+
+	/* wait at least 80us - let's wait 1 ms */
+	udelay (1000);
+
+#if 0
+	/*
+	 * We wait for the last triggered sector
+	 */
+	if (l_sect < 0)
+		goto DONE;
+	wait_for_DQ7(info, l_sect);
+
+DONE:
+#endif
+	/* reset to read mode */
+	addr = (FLASH_WORD_SIZE *)info->start[0];
+	addr[0] = (FLASH_WORD_SIZE)0x00F000F0;	/* reset bank */
+
+	printf (" done\n");
+	return 0;
+}
+
+/*-----------------------------------------------------------------------
+ * Copy memory to flash, returns:
+ * 0 - OK
+ * 1 - write timeout
+ * 2 - Flash not erased
+ */
+
+int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
+{
+	ulong cp, wp, data;
+	int i, l, rc;
+
+	wp = (addr & ~3);	/* get lower word aligned address */
+
+	/*
+	 * handle unaligned start bytes
+	 */
+	if ((l = addr - wp) != 0) {
+		data = 0;
+		for (i=0, cp=wp; i<l; ++i, ++cp) {
+			data = (data << 8) | (*(uchar *)cp);
+		}
+		for (; i<4 && cnt>0; ++i) {
+			data = (data << 8) | *src++;
+			--cnt;
+			++cp;
+		}
+		for (; cnt==0 && i<4; ++i, ++cp) {
+			data = (data << 8) | (*(uchar *)cp);
+		}
+
+		if ((rc = write_word(info, wp, data)) != 0) {
+			return (rc);
+		}
+		wp += 4;
+	}
+
+	/*
+	 * handle word aligned part
+	 */
+	while (cnt >= 4) {
+		data = 0;
+		for (i=0; i<4; ++i) {
+			data = (data << 8) | *src++;
+		}
+		if ((rc = write_word(info, wp, data)) != 0) {
+			return (rc);
+		}
+		wp  += 4;
+		cnt -= 4;
+	}
+
+	if (cnt == 0) {
+		return (0);
+	}
+
+	/*
+	 * handle unaligned tail bytes
+	 */
+	data = 0;
+	for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) {
+		data = (data << 8) | *src++;
+		--cnt;
+	}
+	for (; i<4; ++i, ++cp) {
+		data = (data << 8) | (*(uchar *)cp);
+	}
+
+	return (write_word(info, wp, data));
+}
+
+/*-----------------------------------------------------------------------
+ * Write a word to Flash, returns:
+ * 0 - OK
+ * 1 - write timeout
+ * 2 - Flash not erased
+ */
+static int write_word (flash_info_t * info, ulong dest, ulong data)
+{
+	volatile FLASH_WORD_SIZE *addr2 = (FLASH_WORD_SIZE *) (info->start[0]);
+	volatile FLASH_WORD_SIZE *dest2 = (FLASH_WORD_SIZE *) dest;
+	volatile FLASH_WORD_SIZE *data2 = (FLASH_WORD_SIZE *) & data;
+	ulong start;
+	int i;
+
+	/* Check if Flash is (sufficiently) erased */
+	if ((*((volatile FLASH_WORD_SIZE *) dest) &
+	    (FLASH_WORD_SIZE) data) != (FLASH_WORD_SIZE) data) {
+		return (2);
+	}
+
+	for (i = 0; i < 4 / sizeof (FLASH_WORD_SIZE); i++) {
+		int flag;
+
+		/* Disable interrupts which might cause a timeout here */
+		flag = disable_interrupts ();
+
+		addr2[ADDR0] = (FLASH_WORD_SIZE) 0x00AA00AA;
+		addr2[ADDR1] = (FLASH_WORD_SIZE) 0x00550055;
+		addr2[ADDR0] = (FLASH_WORD_SIZE) 0x00A000A0;
+
+		dest2[i] = data2[i];
+
+		/* re-enable interrupts if necessary */
+		if (flag)
+			enable_interrupts ();
+
+		/* data polling for D7 */
+		start = get_timer (0);
+		while ((dest2[i] & (FLASH_WORD_SIZE) 0x00800080) !=
+		       (data2[i] & (FLASH_WORD_SIZE) 0x00800080)) {
+
+			if (get_timer (start) > CFG_FLASH_WRITE_TOUT) {
+				return (1);
+			}
+		}
+	}
+
+	return (0);
+}
+
+/*-----------------------------------------------------------------------
+ */
--- a/board/bubinga405ep/init.S
+++ b/board/bubinga405ep/init.S
@@ -0,0 +1,55 @@
+/*------------------------------------------------------------------------------+ */
+/* */
+/*       This source code has been made available to you by IBM on an AS-IS */
+/*       basis.  Anyone receiving this source is licensed under IBM */
+/*       copyrights to use it in any way he or she deems fit, including */
+/*       copying it, modifying it, compiling it, and redistributing it either */
+/*       with or without modifications.  No license under IBM patents or */
+/*       patent applications is to be implied by the copyright license. */
+/* */
+/*       Any user of this software should understand that IBM cannot provide */
+/*       technical support for this software and will not be responsible for */
+/*       any consequences resulting from the use of this software. */
+/* */
+/*       Any person who transfers this source code or any derivative work */
+/*       must include the IBM copyright notice, this paragraph, and the */
+/*       preceding two paragraphs in the transferred software. */
+/* */
+/*       COPYRIGHT   I B M   CORPORATION 1995 */
+/*       LICENSED MATERIAL  -  PROGRAM PROPERTY OF I B M */
+/*------------------------------------------------------------------------------- */
+
+/*----------------------------------------------------------------------------- */
+/* Function:     ext_bus_cntlr_init */
+/* Description:  Initializes the External Bus Controller for the external */
+/*		peripherals. IMPORTANT: For pass1 this code must run from */
+/*		cache since you can not reliably change a peripheral banks */
+/*		timing register (pbxap) while running code from that bank. */
+/*		For ex., since we are running from ROM on bank 0, we can NOT */
+/*		execute the code that modifies bank 0 timings from ROM, so */
+/*		we run it from cache. */
+/*	Bank 0 - Flash and SRAM */
+/*	Bank 1 - NVRAM/RTC */
+/*	Bank 2 - Keyboard/Mouse controller */
+/*	Bank 3 - IR controller */
+/*	Bank 4 - not used */
+/*	Bank 5 - not used */
+/*	Bank 6 - not used */
+/*	Bank 7 - FPGA registers */
+/*----------------------------------------------------------------------------- */
+#include <ppc4xx.h>
+
+#include <ppc_asm.tmpl>
+#include <ppc_defs.h>
+
+#include <asm/cache.h>
+#include <asm/mmu.h>
+
+
+/*----------------------------------------------------------------------------- */
+/* Function:     sdram_init */
+/* Description:  Dummy implementation here - done in C later */
+/*----------------------------------------------------------------------------- */
+        .globl  sdram_init
+sdram_init:
+        blr
--- a/board/bubinga405ep/u-boot.lds
+++ b/board/bubinga405ep/u-boot.lds
@@ -0,0 +1,144 @@
+/*
+ * (C) Copyright 2000
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_ARCH(powerpc)
+SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
+/* Do we need any of these for elf?
+   __DYNAMIC = 0;    */
+SECTIONS
+{
+  .resetvec 0xFFFFFFFC :
+  {
+    *(.resetvec)
+  } = 0xffff
+
+  /* Read-only sections, merged into text segment: */
+  . = + SIZEOF_HEADERS;
+  .interp : { *(.interp) }
+  .hash          : { *(.hash)		}
+  .dynsym        : { *(.dynsym)		}
+  .dynstr        : { *(.dynstr)		}
+  .rel.text      : { *(.rel.text)		}
+  .rela.text     : { *(.rela.text) 	}
+  .rel.data      : { *(.rel.data)		}
+  .rela.data     : { *(.rela.data) 	}
+  .rel.rodata    : { *(.rel.rodata) 	}
+  .rela.rodata   : { *(.rela.rodata) 	}
+  .rel.got       : { *(.rel.got)		}
+  .rela.got      : { *(.rela.got)		}
+  .rel.ctors     : { *(.rel.ctors)	}
+  .rela.ctors    : { *(.rela.ctors)	}
+  .rel.dtors     : { *(.rel.dtors)	}
+  .rela.dtors    : { *(.rela.dtors)	}
+  .rel.bss       : { *(.rel.bss)		}
+  .rela.bss      : { *(.rela.bss)		}
+  .rel.plt       : { *(.rel.plt)		}
+  .rela.plt      : { *(.rela.plt)		}
+  .init          : { *(.init)	}
+  .plt : { *(.plt) }
+  .text      :
+  {
+    /* WARNING - the following is hand-optimized to fit within	*/
+    /* the sector layout of our flash chips!	XXX FIXME XXX	*/
+
+    cpu/ppc4xx/start.o	(.text)
+    board/bubinga405ep/init.o	(.text)
+    cpu/ppc4xx/kgdb.o	(.text)
+    cpu/ppc4xx/traps.o	(.text)
+    cpu/ppc4xx/interrupts.o	(.text)
+    cpu/ppc4xx/serial.o	(.text)
+    cpu/ppc4xx/cpu_init.o	(.text)
+    cpu/ppc4xx/speed.o	(.text)
+    cpu/ppc4xx/405gp_enet.o	(.text)
+    common/dlmalloc.o	(.text)
+    lib_generic/crc32.o		(.text)
+    lib_ppc/extable.o	(.text)
+    lib_generic/zlib.o		(.text)
+
+/*    . = env_offset;*/
+/*    common/environment.o(.text)*/
+
+    *(.text)
+    *(.fixup)
+    *(.got1)
+  }
+  _etext = .;
+  PROVIDE (etext = .);
+  .rodata    :
+  {
+    *(.rodata)
+    *(.rodata1)
+  }
+  .fini      : { *(.fini)    } =0
+  .ctors     : { *(.ctors)   }
+  .dtors     : { *(.dtors)   }
+
+  /* Read-write section, merged into data segment: */
+  . = (. + 0x00FF) & 0xFFFFFF00;
+  _erotext = .;
+  PROVIDE (erotext = .);
+  .reloc   :
+  {
+    *(.got)
+    _GOT2_TABLE_ = .;
+    *(.got2)
+    _FIXUP_TABLE_ = .;
+    *(.fixup)
+  }
+  __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
+  __fixup_entries = (. - _FIXUP_TABLE_)>>2;
+
+  .data    :
+  {
+    *(.data)
+    *(.data1)
+    *(.sdata)
+    *(.sdata2)
+    *(.dynamic)
+    CONSTRUCTORS
+  }
+  _edata  =  .;
+  PROVIDE (edata = .);
+
+  __start___ex_table = .;
+  __ex_table : { *(__ex_table) }
+  __stop___ex_table = .;
+
+  . = ALIGN(256);
+  __init_begin = .;
+  .text.init : { *(.text.init) }
+  .data.init : { *(.data.init) }
+  . = ALIGN(256);
+  __init_end = .;
+
+  __bss_start = .;
+  .bss       :
+  {
+   *(.sbss) *(.scommon)
+   *(.dynbss)
+   *(.bss)
+   *(COMMON)
+  }
+  _end = . ;
+  PROVIDE (end = .);
+}
--- a/board/bubinga405ep/u-boot.lds.debug
+++ b/board/bubinga405ep/u-boot.lds.debug
@@ -0,0 +1,147 @@
+/*
+ * (C) Copyright 2000
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_ARCH(powerpc)
+SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
+/* Do we need any of these for elf?
+   __DYNAMIC = 0;    */
+SECTIONS
+{
+  /* Read-only sections, merged into text segment: */
+  . = + SIZEOF_HEADERS;
+  .interp : { *(.interp) }
+  .hash          : { *(.hash)		}
+  .dynsym        : { *(.dynsym)		}
+  .dynstr        : { *(.dynstr)		}
+  .rel.text      : { *(.rel.text)		}
+  .rela.text     : { *(.rela.text) 	}
+  .rel.data      : { *(.rel.data)		}
+  .rela.data     : { *(.rela.data) 	}
+  .rel.rodata    : { *(.rel.rodata) 	}
+  .rela.rodata   : { *(.rela.rodata) 	}
+  .rel.got       : { *(.rel.got)		}
+  .rela.got      : { *(.rela.got)		}
+  .rel.ctors     : { *(.rel.ctors)	}
+  .rela.ctors    : { *(.rela.ctors)	}
+  .rel.dtors     : { *(.rel.dtors)	}
+  .rela.dtors    : { *(.rela.dtors)	}
+  .rel.bss       : { *(.rel.bss)		}
+  .rela.bss      : { *(.rela.bss)		}
+  .rel.plt       : { *(.rel.plt)		}
+  .rela.plt      : { *(.rela.plt)		}
+  .init          : { *(.init)	}
+  .plt : { *(.plt) }
+  .text      :
+  {
+    /* WARNING - the following is hand-optimized to fit within	*/
+    /* the sector layout of our flash chips!	XXX FIXME XXX	*/
+
+/*
+    cpu/ppc4xx/start.o	(.text)
+    common/dlmalloc.o	(.text)
+    lib_generic/vsprintf.o	(.text)
+    lib_generic/crc32.o		(.text)
+    lib_ppc/extable.o	(.text)
+*/
+    cpu/ppc4xx/start.o	(.text)
+    board/bubinga405ep/init.o	(.text)
+    cpu/ppc4xx/kgdb.o	(.text)
+    cpu/ppc4xx/traps.o	(.text)
+    cpu/ppc4xx/interrupts.o	(.text)
+    cpu/ppc4xx/serial.o	(.text)
+    cpu/ppc4xx/cpu_init.o	(.text)
+    cpu/ppc4xx/speed.o	(.text)
+    cpu/ppc4xx/405gp_enet.o	(.text)
+    common/dlmalloc.o	(.text)
+    lib_generic/crc32.o		(.text)
+    lib_ppc/extable.o	(.text)
+    lib_generic/zlib.o		(.text)
+
+
+    common/environment.o(.text)
+
+    *(.text)
+    *(.fixup)
+    *(.got1)
+  }
+  _etext = .;
+  PROVIDE (etext = .);
+  .rodata    :
+  {
+    *(.rodata)
+    *(.rodata1)
+  }
+  .fini      : { *(.fini)    } =0
+  .ctors     : { *(.ctors)   }
+  .dtors     : { *(.dtors)   }
+
+  /* Read-write section, merged into data segment: */
+  . = (. + 0x0FFF) & 0xFFFFF000;
+  _erotext = .;
+  PROVIDE (erotext = .);
+  .reloc   :
+  {
+    *(.got)
+    _GOT2_TABLE_ = .;
+    *(.got2)
+    _FIXUP_TABLE_ = .;
+    *(.fixup)
+  }
+  __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
+  __fixup_entries = (. - _FIXUP_TABLE_)>>2;
+
+  .data    :
+  {
+    *(.data)
+    *(.data1)
+    *(.sdata)
+    *(.sdata2)
+    *(.dynamic)
+    CONSTRUCTORS
+  }
+  _edata  =  .;
+  PROVIDE (edata = .);
+
+  __start___ex_table = .;
+  __ex_table : { *(__ex_table) }
+  __stop___ex_table = .;
+
+  . = ALIGN(4096);
+  __init_begin = .;
+  .text.init : { *(.text.init) }
+  .data.init : { *(.data.init) }
+  . = ALIGN(4096);
+  __init_end = .;
+
+  __bss_start = .;
+  .bss       :
+  {
+   *(.sbss) *(.scommon)
+   *(.dynbss)
+   *(.bss)
+   *(COMMON)
+  }
+  _end = . ;
+  PROVIDE (end = .);
+}
+
--- a/board/c2mon/flash.c
+++ b/board/c2mon/flash.c
@@ -91,7 +91,7 @@ unsigned long flash_init (void)
 	/* monitor protection ON by default */
 	flash_protect(FLAG_PROTECT_SET,
 		      CFG_MONITOR_BASE,
-		      CFG_MONITOR_BASE+CFG_MONITOR_LEN-1,
+		      CFG_MONITOR_BASE+monitor_flash_len-1,
 		      &flash_info[0]);
 #endif

@@ -118,7 +118,7 @@ unsigned long flash_init (void)
 		/* monitor protection ON by default */
 		flash_protect(FLAG_PROTECT_SET,
 			      CFG_MONITOR_BASE,
-			      CFG_MONITOR_BASE+CFG_MONITOR_LEN-1,
+			      CFG_MONITOR_BASE+monitor_flash_len-1,
 			      &flash_info[1]);
 #endif

--- a/board/cmi/flash.c
+++ b/board/cmi/flash.c
@@ -106,7 +106,7 @@ unsigned long flash_init (void)
 	/* monitor protection ON by default */
 	flash_protect(FLAG_PROTECT_SET,
 		      CFG_MONITOR_BASE,
-		      CFG_MONITOR_BASE+CFG_MONITOR_LEN-1,
+		      CFG_MONITOR_BASE+monitor_flash_len-1,
 		      &flash_info[0]);
 #endif

--- a/board/cogent/flash.c
+++ b/board/cogent/flash.c
@@ -323,7 +323,7 @@ flash_init(void)
 #if CFG_MONITOR_BASE == CFG_FLASH_BASE
 	flash_protect(FLAG_PROTECT_SET,
 		      CFG_MONITOR_BASE,
-		      CFG_MONITOR_BASE+CFG_MONITOR_LEN-1,
+		      CFG_MONITOR_BASE+monitor_flash_len-1,
 		      &flash_info[0]);
 #endif

--- a/board/cpc45/flash.c
+++ b/board/cpc45/flash.c
@@ -132,12 +132,12 @@ unsigned long flash_init(void)
 #if CFG_MONITOR_BASE >= CFG_FLASH_BASE + FLASH_BANK_SIZE
    flash_protect(FLAG_PROTECT_SET,
              CFG_MONITOR_BASE,
-              CFG_MONITOR_BASE + CFG_MONITOR_LEN - 1,
+              CFG_MONITOR_BASE + monitor_flash_len - 1,
              &flash_info[1]);
 #else
    flash_protect(FLAG_PROTECT_SET,
              CFG_MONITOR_BASE,
-              CFG_MONITOR_BASE + CFG_MONITOR_LEN - 1,
+              CFG_MONITOR_BASE + monitor_flash_len - 1,
              &flash_info[0]);
 #endif
 #endif
--- a/board/cpu86/flash.c
+++ b/board/cpu86/flash.c
@@ -218,14 +218,14 @@ unsigned long flash_init (void)

 		flash_protect  (FLAG_PROTECT_SET,
 				CFG_MONITOR_BASE,
-				CFG_MONITOR_BASE + CFG_MONITOR_LEN - 1, &flash_info[1]
+				CFG_MONITOR_BASE + monitor_flash_len - 1, &flash_info[1]
 		);
 	}
 #else
 #if CFG_MONITOR_BASE >= CFG_FLASH_BASE
 	flash_protect (FLAG_PROTECT_SET,
 		       CFG_MONITOR_BASE,
-		       CFG_MONITOR_BASE + CFG_MONITOR_LEN - 1, &flash_info[0]
+		       CFG_MONITOR_BASE + monitor_flash_len - 1, &flash_info[0]
 	);
 #endif
 #endif
--- a/board/cradle/flash.c
+++ b/board/cradle/flash.c
@@ -73,7 +73,7 @@ ulong flash_init(void)
    */
   flash_protect(FLAG_PROTECT_SET,
                  CFG_FLASH_BASE,
-                  CFG_FLASH_BASE + _armboot_end_data - _armboot_start,
+                  CFG_FLASH_BASE + monitor_flash_len - 1,
                  &flash_info[0]);

   flash_protect(FLAG_PROTECT_SET,
--- a/board/cradle/u-boot.lds
+++ b/board/cradle/u-boot.lds
@@ -31,7 +31,7 @@ SECTIONS
        . = ALIGN(4);
 	.text      :
 	{
-	  cpu/xscale/start.o	(.text)
+	  cpu/pxa/start.o	(.text)
 	  *(.text)
 	}

--- a/board/cray/L1/flash.c
+++ b/board/cray/L1/flash.c
@@ -88,7 +88,7 @@ unsigned long flash_init (void)
 	    /* Monitor protection ON by default */
 	    (void)flash_protect(FLAG_PROTECT_SET,
 				FLASH_BASE0_PRELIM,
-				FLASH_BASE0_PRELIM+CFG_MONITOR_LEN-1,
+				FLASH_BASE0_PRELIM+monitor_flash_len-1,
 				&flash_info[0]);
 #endif
 	    size_b1 = 0 ;
--- a/board/csb226/flash.c
+++ b/board/csb226/flash.c
@@ -74,7 +74,7 @@ ulong flash_init(void)
 	/* Protect monitor and environment sectors */
 	flash_protect(FLAG_PROTECT_SET,
 			CFG_FLASH_BASE,
-			CFG_FLASH_BASE + _armboot_end_data - _armboot_start,
+			CFG_FLASH_BASE + monitor_flash_len - 1,
 			&flash_info[0]);

 	flash_protect(FLAG_PROTECT_SET,
--- a/board/csb226/u-boot.lds
+++ b/board/csb226/u-boot.lds
@@ -31,7 +31,7 @@ SECTIONS
        . = ALIGN(4);
 	.text      :
 	{
-	  cpu/xscale/start.o	(.text)
+	  cpu/pxa/start.o	(.text)
 	  *(.text)
 	}

--- a/board/cu824/flash.c
+++ b/board/cu824/flash.c
@@ -125,12 +125,12 @@ unsigned long flash_init(void)
 #if CFG_MONITOR_BASE >= CFG_FLASH_BASE + FLASH_BANK_SIZE
    flash_protect(FLAG_PROTECT_SET,
              CFG_MONITOR_BASE,
-              CFG_MONITOR_BASE + CFG_MONITOR_LEN - 1,
+              CFG_MONITOR_BASE + monitor_flash_len - 1,
              &flash_info[1]);
 #else
    flash_protect(FLAG_PROTECT_SET,
              CFG_MONITOR_BASE,
-              CFG_MONITOR_BASE + CFG_MONITOR_LEN - 1,
+              CFG_MONITOR_BASE + monitor_flash_len - 1,
              &flash_info[0]);
 #endif
 #endif
--- a/board/dnp1110/flash.c
+++ b/board/dnp1110/flash.c
@@ -84,7 +84,7 @@ unsigned long flash_init (void)
     */
    flash_protect(FLAG_PROTECT_SET,
 		  CFG_FLASH_BASE,
-		  CFG_FLASH_BASE + _armboot_end_data - _armboot_start,
+		  CFG_FLASH_BASE + monitor_flash_len  - 1,
 		  &flash_info[0]);

    flash_protect(FLAG_PROTECT_SET,
--- a/board/eltec/bab7xx/flash.c
+++ b/board/eltec/bab7xx/flash.c
@@ -83,21 +83,21 @@ unsigned long flash_init (void)
    {
        (void)flash_protect(FLAG_PROTECT_SET,
                FLASH_BASE0_PRELIM,
-                FLASH_BASE0_PRELIM+CFG_MONITOR_LEN-1,
+                FLASH_BASE0_PRELIM+monitor_flash_len-1,
                &flash_info[0]);
    }
    if (size2 == 512*1024)
    {
        (void)flash_protect(FLAG_PROTECT_SET,
                FLASH_BASE1_PRELIM,
-                FLASH_BASE1_PRELIM+CFG_MONITOR_LEN-1,
+                FLASH_BASE1_PRELIM+monitor_flash_len-1,
                &flash_info[1]);
    }
    if (size2 == 4*1024*1024)
    {
        (void)flash_protect(FLAG_PROTECT_SET,
                CFG_FLASH_BASE,
-                CFG_FLASH_BASE+CFG_MONITOR_LEN-1,
+                CFG_FLASH_BASE+monitor_flash_len-1,
                &flash_info[1]);
    }

--- a/board/eltec/elppc/flash.c
+++ b/board/eltec/elppc/flash.c
@@ -83,21 +83,21 @@ unsigned long flash_init (void)
    {
        (void)flash_protect(FLAG_PROTECT_SET,
                FLASH_BASE0_PRELIM,
-                FLASH_BASE0_PRELIM+CFG_MONITOR_LEN-1,
+                FLASH_BASE0_PRELIM+monitor_flash_len-1,
                &flash_info[0]);
    }
    if (size2 == 512*1024)
    {
        (void)flash_protect(FLAG_PROTECT_SET,
                FLASH_BASE1_PRELIM,
-                FLASH_BASE1_PRELIM+CFG_MONITOR_LEN-1,
+                FLASH_BASE1_PRELIM+monitor_flash_len-1,
                &flash_info[1]);
    }
    if (size2 == 4*1024*1024)
    {
        (void)flash_protect(FLAG_PROTECT_SET,
                CFG_FLASH_BASE,
-                CFG_FLASH_BASE+CFG_MONITOR_LEN-1,
+                CFG_FLASH_BASE+monitor_flash_len-1,
                &flash_info[1]);
    }

--- a/board/eltec/mhpc/flash.c
+++ b/board/eltec/mhpc/flash.c
@@ -92,7 +92,7 @@ unsigned long flash_init (void)
 	/* monitor protection ON by default */
 	(void)flash_protect(FLAG_PROTECT_SET,
 			    CFG_FLASH_BASE,
-			    CFG_FLASH_BASE+CFG_MONITOR_LEN-1,
+			    CFG_FLASH_BASE+monitor_flash_len-1,
 			    &flash_info[0]);

 	flash_info[0].size = size_b0;
--- a/board/ep7312/flash.c
+++ b/board/ep7312/flash.c
@@ -61,7 +61,7 @@ ulong flash_init (void)
 	 */
 	flash_protect ( FLAG_PROTECT_SET,
 			CFG_FLASH_BASE,
-			CFG_FLASH_BASE + _armboot_end_data - _armboot_start,
+			CFG_FLASH_BASE + monitor_flash_len - 1,
 			&flash_info[0]);

 	flash_protect ( FLAG_PROTECT_SET,
--- a/board/ep8260/flash.c
+++ b/board/ep8260/flash.c
@@ -140,7 +140,7 @@ unsigned long flash_init (void)
 #if CFG_MONITOR_BASE >= CFG_FLASH0_BASE
    flash_protect(FLAG_PROTECT_SET,
 		  CFG_MONITOR_BASE,
-		  CFG_MONITOR_BASE+CFG_MONITOR_LEN-1,
+		  CFG_MONITOR_BASE+monitor_flash_len-1,
 		  &flash_info[0]);
 #endif

--- a/board/eric/flash.c
+++ b/board/eric/flash.c
@@ -83,13 +83,13 @@ unsigned long flash_init (void)
 	    /* Monitor protection ON by default */
 #if 0	    /* sand: */
 	    (void)flash_protect(FLAG_PROTECT_SET,
-				FLASH_BASE0_PRELIM-CFG_MONITOR_LEN+size_b0,
+				FLASH_BASE0_PRELIM-monitor_flash_len+size_b0,
 				FLASH_BASE0_PRELIM-1+size_b0,
 				&flash_info[0]);
 #else
 	    (void)flash_protect(FLAG_PROTECT_SET,
 		      		CFG_MONITOR_BASE,
-		      		CFG_MONITOR_BASE+CFG_MONITOR_LEN-1,
+		      		CFG_MONITOR_BASE+monitor_flash_len-1,
 		      		&flash_info[0]);
 #endif
 	    size_b1 = 0 ;
@@ -132,13 +132,13 @@ unsigned long flash_init (void)
 	    /* monitor protection ON by default */
 #if 0	    /* sand: */
 	    (void)flash_protect(FLAG_PROTECT_SET,
-				FLASH_BASE0_PRELIM-CFG_MONITOR_LEN+size_b0,
+				FLASH_BASE0_PRELIM-monitor_flash_len+size_b0,
 				FLASH_BASE0_PRELIM-1+size_b0,
 				&flash_info[0]);
 #else
 	    (void)flash_protect(FLAG_PROTECT_SET,
 		      		CFG_MONITOR_BASE,
-		      		CFG_MONITOR_BASE+CFG_MONITOR_LEN-1,
+		      		CFG_MONITOR_BASE+monitor_flash_len-1,
 		      		&flash_info[0]);
 #endif

@@ -150,12 +150,12 @@ unsigned long flash_init (void)

 	      /* monitor protection ON by default */
 	      (void)flash_protect(FLAG_PROTECT_SET,
-				  base_b1+size_b1-CFG_MONITOR_LEN,
+				  base_b1+size_b1-monitor_flash_len,
 				  base_b1+size_b1-1,
 				  &flash_info[1]);
 	      /* monitor protection OFF by default (one is enough) */
 	      (void)flash_protect(FLAG_PROTECT_CLEAR,
-				  base_b0+size_b0-CFG_MONITOR_LEN,
+				  base_b0+size_b0-monitor_flash_len,
 				  base_b0+size_b0-1,
 				  &flash_info[0]);
 	    } else {
--- a/board/esd/adciop/flash.c
+++ b/board/esd/adciop/flash.c
@@ -80,7 +80,7 @@ unsigned long flash_init (void)

 	/* monitor protection ON by default */
 	flash_protect(FLAG_PROTECT_SET,
-		      FLASH_BASE0_PRELIM+size_b0-CFG_MONITOR_LEN,
+		      FLASH_BASE0_PRELIM+size_b0-monitor_flash_len,
 		      FLASH_BASE0_PRELIM+size_b0-1,
 		      &flash_info[0]);

@@ -93,12 +93,12 @@ unsigned long flash_init (void)

 		/* monitor protection ON by default */
 		flash_protect(FLAG_PROTECT_SET,
-			      FLASH_BASE0_PRELIM+size_b0+size_b1-CFG_MONITOR_LEN,
+			      FLASH_BASE0_PRELIM+size_b0+size_b1-monitor_flash_len,
 			      FLASH_BASE0_PRELIM+size_b0+size_b1-1,
 			      &flash_info[1]);
                /* monitor protection OFF by default (one is enough) */
                flash_protect(FLAG_PROTECT_CLEAR,
-			      FLASH_BASE0_PRELIM+size_b0-CFG_MONITOR_LEN,
+			      FLASH_BASE0_PRELIM+size_b0-monitor_flash_len,
 			      FLASH_BASE0_PRELIM+size_b0-1,
 			      &flash_info[0]);
 	} else {
--- a/board/esd/ar405/flash.c
+++ b/board/esd/ar405/flash.c
@@ -94,7 +94,7 @@ unsigned long flash_init (void)

 	/* monitor protection ON by default */
 	(void)flash_protect(FLAG_PROTECT_SET,
-			    base_b0+size_b0-CFG_MONITOR_LEN,
+			    base_b0+size_b0-monitor_flash_len,
 			    base_b0+size_b0-1,
 			    &flash_info[0]);

@@ -106,12 +106,12 @@ unsigned long flash_init (void)

 		/* monitor protection ON by default */
 		(void)flash_protect(FLAG_PROTECT_SET,
-				    base_b1+size_b1-CFG_MONITOR_LEN,
+				    base_b1+size_b1-monitor_flash_len,
 				    base_b1+size_b1-1,
 				    &flash_info[1]);
                /* monitor protection OFF by default (one is enough) */
                (void)flash_protect(FLAG_PROTECT_CLEAR,
-                                    base_b0+size_b0-CFG_MONITOR_LEN,
+                                    base_b0+size_b0-monitor_flash_len,
                                    base_b0+size_b0-1,
                                    &flash_info[0]);
 	} else {
--- a/board/esd/ash405/Makefile
+++ b/board/esd/ash405/Makefile
@@ -0,0 +1,46 @@
+#
+# (C) Copyright 2000
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB	= lib$(BOARD).a
+
+OBJS	= $(BOARD).o flash.o
+
+$(LIB):	$(OBJS) $(SOBJS)
+	$(AR) crv $@ $^
+
+clean:
+	rm -f $(SOBJS) $(OBJS)
+
+distclean:	clean
+	rm -f $(LIB) core *.bak .depend
+
+#########################################################################
+
+.depend:	Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
+		$(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
+
+sinclude .depend
+
+#########################################################################
--- a/board/esd/ash405/ash405.c
+++ b/board/esd/ash405/ash405.c
@@ -0,0 +1,247 @@
+/*
+ * (C) Copyright 2001-2003
+ * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/processor.h>
+#include <command.h>
+#include <cmd_boot.h>
+#include <malloc.h>
+
+/* ------------------------------------------------------------------------- */
+
+#if 0
+#define FPGA_DEBUG
+#endif
+
+/* fpga configuration data - gzip compressed and generated by bin2c */
+const unsigned char fpgadata[] =
+{
+#include "fpgadata.c"
+};
+
+/*
+ * include common fpga code (for esd boards)
+ */
+#include "../common/fpga.c"
+
+
+/* Prototypes */
+int gunzip(void *, int, unsigned char *, int *);
+
+
+int board_pre_init (void)
+{
+	/*
+	 * IRQ 0-15  405GP internally generated; active high; level sensitive
+	 * IRQ 16    405GP internally generated; active low; level sensitive
+	 * IRQ 17-24 RESERVED
+	 * IRQ 25 (EXT IRQ 0) CAN0; active low; level sensitive
+	 * IRQ 26 (EXT IRQ 1) SER0 ; active low; level sensitive
+	 * IRQ 27 (EXT IRQ 2) SER1; active low; level sensitive
+	 * IRQ 28 (EXT IRQ 3) FPGA 0; active low; level sensitive
+	 * IRQ 29 (EXT IRQ 4) FPGA 1; active low; level sensitive
+	 * IRQ 30 (EXT IRQ 5) PCI INTA; active low; level sensitive
+	 * IRQ 31 (EXT IRQ 6) COMPACT FLASH; active high; level sensitive
+	 */
+	mtdcr(uicsr, 0xFFFFFFFF);       /* clear all ints */
+	mtdcr(uicer, 0x00000000);       /* disable all ints */
+	mtdcr(uiccr, 0x00000000);       /* set all to be non-critical*/
+	mtdcr(uicpr, 0xFFFFFF81);       /* set int polarities */
+	mtdcr(uictr, 0x10000000);       /* set int trigger levels */
+	mtdcr(uicvcr, 0x00000001);      /* set vect base=0,INT0 highest priority*/
+	mtdcr(uicsr, 0xFFFFFFFF);       /* clear all ints */
+
+	/*
+	 * EBC Configuration Register: set ready timeout to 512 ebc-clks -> ca. 15 us
+	 */
+	mtebc (epcr, 0xa8400000); /* ebc always driven */
+
+	return 0;
+}
+
+
+/* ------------------------------------------------------------------------- */
+
+int misc_init_f (void)
+{
+	return 0;  /* dummy implementation */
+}
+
+
+int misc_init_r (void)
+{
+	volatile unsigned char *duart0_mcr = (unsigned char *)((ulong)DUART0_BA + 4);
+	volatile unsigned char *duart1_mcr = (unsigned char *)((ulong)DUART1_BA + 4);
+	volatile unsigned char *duart2_mcr = (unsigned char *)((ulong)DUART2_BA + 4);
+	volatile unsigned char *duart3_mcr = (unsigned char *)((ulong)DUART3_BA + 4);
+	unsigned char *dst;
+	ulong len = sizeof(fpgadata);
+	int status;
+	int index;
+	int i;
+
+	dst = malloc(CFG_FPGA_MAX_SIZE);
+	if (gunzip (dst, CFG_FPGA_MAX_SIZE, (uchar *)fpgadata, (int *)&len) != 0) {
+		printf ("GUNZIP ERROR - must RESET board to recover\n");
+		do_reset (NULL, 0, 0, NULL);
+	}
+
+	status = fpga_boot(dst, len);
+	if (status != 0) {
+		printf("\nFPGA: Booting failed ");
+		switch (status) {
+		case ERROR_FPGA_PRG_INIT_LOW:
+			printf("(Timeout: INIT not low after asserting PROGRAM*)\n ");
+			break;
+		case ERROR_FPGA_PRG_INIT_HIGH:
+			printf("(Timeout: INIT not high after deasserting PROGRAM*)\n ");
+			break;
+		case ERROR_FPGA_PRG_DONE:
+			printf("(Timeout: DONE not high after programming FPGA)\n ");
+			break;
+		}
+
+		/* display infos on fpgaimage */
+		index = 15;
+		for (i=0; i<4; i++) {
+			len = dst[index];
+			printf("FPGA: %s\n", &(dst[index+1]));
+			index += len+3;
+		}
+		putc ('\n');
+		/* delayed reboot */
+		for (i=20; i>0; i--) {
+			printf("Rebooting in %2d seconds \r",i);
+			for (index=0;index<1000;index++)
+				udelay(1000);
+		}
+		putc ('\n');
+		do_reset(NULL, 0, 0, NULL);
+	}
+
+	puts("FPGA:  ");
+
+	/* display infos on fpgaimage */
+	index = 15;
+	for (i=0; i<4; i++) {
+		len = dst[index];
+		printf("%s ", &(dst[index+1]));
+		index += len+3;
+	}
+	putc ('\n');
+
+	free(dst);
+
+	/*
+	 * Reset FPGA via FPGA_DATA pin
+	 */
+	SET_FPGA(FPGA_PRG | FPGA_CLK);
+	udelay(1000); /* wait 1ms */
+	SET_FPGA(FPGA_PRG | FPGA_CLK | FPGA_DATA);
+	udelay(1000); /* wait 1ms */
+
+	/*
+	 * Reset external DUARTs
+	 */
+	out32(GPIO0_OR, in32(GPIO0_OR) | CFG_DUART_RST); /* set reset to high */
+	udelay(10); /* wait 10us */
+	out32(GPIO0_OR, in32(GPIO0_OR) & ~CFG_DUART_RST); /* set reset to low */
+	udelay(1000); /* wait 1ms */
+
+	/*
+	 * Set NAND-FLASH GPIO signals to default
+	 */
+	out32(GPIO0_OR, in32(GPIO0_OR) & ~(CFG_NAND_CLE | CFG_NAND_ALE));
+	out32(GPIO0_OR, in32(GPIO0_OR) | CFG_NAND_CE);
+
+	/*
+	 * Enable interrupts in exar duart mcr[3]
+	 */
+	*duart0_mcr = 0x08;
+	*duart1_mcr = 0x08;
+	*duart2_mcr = 0x08;
+	*duart3_mcr = 0x08;
+
+	return (0);
+}
+
+
+/*
+ * Check Board Identity:
+ */
+
+int checkboard (void)
+{
+	unsigned char str[64];
+	int i = getenv_r ("serial#", str, sizeof(str));
+
+	puts ("Board: ");
+
+	if (i == -1) {
+		puts ("### No HW ID - assuming ASH405");
+	} else {
+		puts(str);
+	}
+
+	putc ('\n');
+
+	return 0;
+}
+
+/* ------------------------------------------------------------------------- */
+
+long int initdram (int board_type)
+{
+	unsigned long val;
+
+	mtdcr(memcfga, mem_mb0cf);
+	val = mfdcr(memcfgd);
+
+#if 0
+	printf("\nmb0cf=%x\n", val); /* test-only */
+	printf("strap=%x\n", mfdcr(strap)); /* test-only */
+#endif
+
+	return (4*1024*1024 << ((val & 0x000e0000) >> 17));
+}
+
+/* ------------------------------------------------------------------------- */
+
+int testdram (void)
+{
+	/* TODO: XXX XXX XXX */
+	printf ("test: 16 MB - ok\n");
+
+	return (0);
+}
+
+/* ------------------------------------------------------------------------- */
+
+#if (CONFIG_COMMANDS & CFG_CMD_NAND)
+extern void nand_probe(ulong physadr);
+void nand_init(void)
+{
+	printf("Probing at 0x%.8x\n", CFG_NAND_BASE);
+	nand_probe(CFG_NAND_BASE);
+}
+#endif
--- a/board/esd/ash405/config.mk
+++ b/board/esd/ash405/config.mk
@@ -0,0 +1,28 @@
+#
+# (C) Copyright 2000
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+#
+# esd ASH405 boards
+#
+
+TEXT_BASE = 0xFFFC0000
--- a/board/esd/ash405/flash.c
+++ b/board/esd/ash405/flash.c
@@ -0,0 +1,101 @@
+/*
+ * (C) Copyright 2001
+ * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <ppc4xx.h>
+#include <asm/processor.h>
+
+/*
+ * include common flash code (for esd boards)
+ */
+#include "../common/flash.c"
+
+/*-----------------------------------------------------------------------
+ * Functions
+ */
+static ulong flash_get_size (vu_long * addr, flash_info_t * info);
+static void flash_get_offsets (ulong base, flash_info_t * info);
+
+/*-----------------------------------------------------------------------
+ */
+
+unsigned long flash_init (void)
+{
+	unsigned long size_b0;
+	int i;
+        uint pbcr;
+        unsigned long base_b0;
+	int size_val = 0;
+
+	/* Init: no FLASHes known */
+	for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
+		flash_info[i].flash_id = FLASH_UNKNOWN;
+	}
+
+	/* Static FLASH Bank configuration here - FIXME XXX */
+
+	size_b0 = flash_get_size((vu_long *)FLASH_BASE0_PRELIM, &flash_info[0]);
+
+	if (flash_info[0].flash_id == FLASH_UNKNOWN) {
+		printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
+			size_b0, size_b0<<20);
+	}
+
+        /* Setup offsets */
+        flash_get_offsets (-size_b0, &flash_info[0]);
+
+        /* Re-do sizing to get full correct info */
+        mtdcr(ebccfga, pb0cr);
+        pbcr = mfdcr(ebccfgd);
+        mtdcr(ebccfga, pb0cr);
+        base_b0 = -size_b0;
+	switch (size_b0) {
+	case 1 << 20:
+		size_val = 0;
+		break;
+	case 2 << 20:
+		size_val = 1;
+		break;
+	case 4 << 20:
+		size_val = 2;
+		break;
+	case 8 << 20:
+		size_val = 3;
+		break;
+	case 16 << 20:
+		size_val = 4;
+		break;
+	}
+	pbcr = (pbcr & 0x0001ffff) | base_b0 | (size_val << 17);
+        mtdcr(ebccfgd, pbcr);
+
+        /* Monitor protection ON by default */
+        (void)flash_protect(FLAG_PROTECT_SET,
+                            -CFG_MONITOR_LEN,
+                            0xffffffff,
+                            &flash_info[0]);
+
+        flash_info[0].size = size_b0;
+
+	return (size_b0);
+}
--- a/board/esd/ash405/fpgadata.c
+++ b/board/esd/ash405/fpgadata.c
--- a/board/esd/ash405/u-boot.lds
+++ b/board/esd/ash405/u-boot.lds
@@ -0,0 +1,142 @@
+/*
+ * (C) Copyright 2000
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_ARCH(powerpc)
+SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
+/* Do we need any of these for elf?
+   __DYNAMIC = 0;    */
+SECTIONS
+{
+  .resetvec 0xFFFFFFFC :
+  {
+    *(.resetvec)
+  } = 0xffff
+
+  /* Read-only sections, merged into text segment: */
+  . = + SIZEOF_HEADERS;
+  .interp : { *(.interp) }
+  .hash          : { *(.hash)		}
+  .dynsym        : { *(.dynsym)		}
+  .dynstr        : { *(.dynstr)		}
+  .rel.text      : { *(.rel.text)		}
+  .rela.text     : { *(.rela.text) 	}
+  .rel.data      : { *(.rel.data)		}
+  .rela.data     : { *(.rela.data) 	}
+  .rel.rodata    : { *(.rel.rodata) 	}
+  .rela.rodata   : { *(.rela.rodata) 	}
+  .rel.got       : { *(.rel.got)		}
+  .rela.got      : { *(.rela.got)		}
+  .rel.ctors     : { *(.rel.ctors)	}
+  .rela.ctors    : { *(.rela.ctors)	}
+  .rel.dtors     : { *(.rel.dtors)	}
+  .rela.dtors    : { *(.rela.dtors)	}
+  .rel.bss       : { *(.rel.bss)		}
+  .rela.bss      : { *(.rela.bss)		}
+  .rel.plt       : { *(.rel.plt)		}
+  .rela.plt      : { *(.rela.plt)		}
+  .init          : { *(.init)	}
+  .plt : { *(.plt) }
+  .text      :
+  {
+    /* WARNING - the following is hand-optimized to fit within	*/
+    /* the sector layout of our flash chips!	XXX FIXME XXX	*/
+
+    cpu/ppc4xx/start.o	(.text)
+    cpu/ppc4xx/traps.o	(.text)
+    cpu/ppc4xx/interrupts.o	(.text)
+    cpu/ppc4xx/serial.o	(.text)
+    cpu/ppc4xx/cpu_init.o	(.text)
+    cpu/ppc4xx/speed.o	(.text)
+    cpu/ppc4xx/405gp_enet.o	(.text)
+    common/dlmalloc.o	(.text)
+    lib_generic/crc32.o		(.text)
+    lib_ppc/extable.o	(.text)
+    lib_generic/zlib.o		(.text)
+
+/*    . = env_offset;*/
+/*    common/environment.o(.text)*/
+
+    *(.text)
+    *(.fixup)
+    *(.got1)
+  }
+  _etext = .;
+  PROVIDE (etext = .);
+  .rodata    :
+  {
+    *(.rodata)
+    *(.rodata1)
+  }
+  .fini      : { *(.fini)    } =0
+  .ctors     : { *(.ctors)   }
+  .dtors     : { *(.dtors)   }
+
+  /* Read-write section, merged into data segment: */
+  . = (. + 0x00FF) & 0xFFFFFF00;
+  _erotext = .;
+  PROVIDE (erotext = .);
+  .reloc   :
+  {
+    *(.got)
+    _GOT2_TABLE_ = .;
+    *(.got2)
+    _FIXUP_TABLE_ = .;
+    *(.fixup)
+  }
+  __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
+  __fixup_entries = (. - _FIXUP_TABLE_)>>2;
+
+  .data    :
+  {
+    *(.data)
+    *(.data1)
+    *(.sdata)
+    *(.sdata2)
+    *(.dynamic)
+    CONSTRUCTORS
+  }
+  _edata  =  .;
+  PROVIDE (edata = .);
+
+  __start___ex_table = .;
+  __ex_table : { *(__ex_table) }
+  __stop___ex_table = .;
+
+  . = ALIGN(256);
+  __init_begin = .;
+  .text.init : { *(.text.init) }
+  .data.init : { *(.data.init) }
+  . = ALIGN(256);
+  __init_end = .;
+
+  __bss_start = .;
+  .bss       :
+  {
+   *(.sbss) *(.scommon)
+   *(.dynbss)
+   *(.bss)
+   *(COMMON)
+  }
+  _end = . ;
+  PROVIDE (end = .);
+}
--- a/board/esd/canbt/canbt.c
+++ b/board/esd/canbt/canbt.c
@@ -114,9 +114,9 @@ int board_pre_init (void)
 	/*
 	 * Setup port pins for normal operation
 	 */
-	out32 (IBM405GP_GPIO0_ODR, 0x00000000);	/* no open drain pins */
-	out32 (IBM405GP_GPIO0_TCR, 0x07038100);	/* setup for output */
-	out32 (IBM405GP_GPIO0_OR, 0x07030100);	/* set output pins to high (default) */
+	out32 (GPIO0_ODR, 0x00000000);	/* no open drain pins */
+	out32 (GPIO0_TCR, 0x07038100);	/* setup for output */
+	out32 (GPIO0_OR, 0x07030100);	/* set output pins to high (default) */

 	/*
 	 * IRQ 0-15  405GP internally generated; active high; level sensitive
--- a/board/esd/canbt/flash.c
+++ b/board/esd/canbt/flash.c
@@ -74,7 +74,7 @@ unsigned long flash_init (void)

        /* Monitor protection ON by default */
        (void)flash_protect(FLAG_PROTECT_SET,
-                            -CFG_MONITOR_LEN,
+                            -monitor_flash_len,
                            0xffffffff,
                            &flash_info[0]);

--- a/board/esd/common/fpga.c
+++ b/board/esd/common/fpga.c
@@ -1,5 +1,5 @@
 /*
- * (C) Copyright 2001
+ * (C) Copyright 2001-2003
 * Matthias Fuchs, esd gmbh germany, matthias.fuchs@esd-electronics.com
 * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
 *
@@ -36,11 +36,6 @@

 #define MAX_ONES               226

-#define IBM405GP_GPIO0_OR      0xef600700  /* GPIO Output */
-#define IBM405GP_GPIO0_TCR     0xef600704  /* GPIO Three-State Control */
-#define IBM405GP_GPIO0_ODR     0xef600718  /* GPIO Open Drain */
-#define IBM405GP_GPIO0_IR      0xef60071c  /* GPIO Input */
-
 #ifdef CFG_FPGA_PRG
 # define FPGA_PRG              CFG_FPGA_PRG /* FPGA program pin (ppc output)*/
 # define FPGA_CLK              CFG_FPGA_CLK /* FPGA clk pin (ppc output)    */
@@ -59,7 +54,7 @@
 #define ERROR_FPGA_PRG_INIT_HIGH -2        /* Timeout after PRG* deasserted */
 #define ERROR_FPGA_PRG_DONE      -3        /* Timeout after programming     */

-#define SET_FPGA(data)         out32(IBM405GP_GPIO0_OR, data)
+#define SET_FPGA(data)         out32(GPIO0_OR, data)

 #define FPGA_WRITE_1 {                                                    \
        SET_FPGA(FPGA_PRG |            FPGA_DATA);  /* set clock to 0 */  \
@@ -120,12 +115,12 @@ static int fpga_boot(unsigned char *fpgadata, int size)
  /*
   * Setup port pins for fpga programming
   */
-  out32(IBM405GP_GPIO0_ODR, 0x00000000);                       /* no open drain pins      */
-  out32(IBM405GP_GPIO0_TCR, FPGA_PRG | FPGA_CLK | FPGA_DATA);  /* setup for output        */
-  out32(IBM405GP_GPIO0_OR,  FPGA_PRG | FPGA_CLK | FPGA_DATA);  /* set output pins to high */
+  out32(GPIO0_ODR, 0x00000000);                                      /* no open drain pins */
+  out32(GPIO0_TCR, in32(GPIO0_TCR) | FPGA_PRG | FPGA_CLK | FPGA_DATA); /* setup for output */
+  out32(GPIO0_OR, in32(GPIO0_OR) | FPGA_PRG | FPGA_CLK | FPGA_DATA);   /* set pins to high */

-  DBG("%s, ",((in32(IBM405GP_GPIO0_IR) & FPGA_DONE) == 0) ? "NOT DONE" : "DONE" );
-  DBG("%s\n",((in32(IBM405GP_GPIO0_IR) & FPGA_INIT) == 0) ? "NOT INIT" : "INIT" );
+  DBG("%s, ",((in32(GPIO0_IR) & FPGA_DONE) == 0) ? "NOT DONE" : "DONE" );
+  DBG("%s\n",((in32(GPIO0_IR) & FPGA_INIT) == 0) ? "NOT INIT" : "INIT" );

  /*
   * Init fpga by asserting and deasserting PROGRAM*
@@ -134,7 +129,7 @@ static int fpga_boot(unsigned char *fpgadata, int size)

  /* Wait for FPGA init line low */
  count = 0;
-  while (in32(IBM405GP_GPIO0_IR) & FPGA_INIT)
+  while (in32(GPIO0_IR) & FPGA_INIT)
    {
      udelay(1000); /* wait 1ms */
      /* Check for timeout - 100us max, so use 3ms */
@@ -145,15 +140,15 @@ static int fpga_boot(unsigned char *fpgadata, int size)
        }
    }

-  DBG("%s, ",((in32(IBM405GP_GPIO0_IR) & FPGA_DONE) == 0) ? "NOT DONE" : "DONE" );
-  DBG("%s\n",((in32(IBM405GP_GPIO0_IR) & FPGA_INIT) == 0) ? "NOT INIT" : "INIT" );
+  DBG("%s, ",((in32(GPIO0_IR) & FPGA_DONE) == 0) ? "NOT DONE" : "DONE" );
+  DBG("%s\n",((in32(GPIO0_IR) & FPGA_INIT) == 0) ? "NOT INIT" : "INIT" );

  /* deassert PROGRAM* */
  SET_FPGA(FPGA_PRG | FPGA_CLK | FPGA_DATA);

  /* Wait for FPGA end of init period .  */
  count = 0;
-  while (!(in32(IBM405GP_GPIO0_IR) & FPGA_INIT))
+  while (!(in32(GPIO0_IR) & FPGA_INIT))
    {
      udelay(1000); /* wait 1ms */
      /* Check for timeout */
@@ -164,8 +159,8 @@ static int fpga_boot(unsigned char *fpgadata, int size)
        }
    }

-  DBG("%s, ",((in32(IBM405GP_GPIO0_IR) & FPGA_DONE) == 0) ? "NOT DONE" : "DONE" );
-  DBG("%s\n",((in32(IBM405GP_GPIO0_IR) & FPGA_INIT) == 0) ? "NOT INIT" : "INIT" );
+  DBG("%s, ",((in32(GPIO0_IR) & FPGA_DONE) == 0) ? "NOT DONE" : "DONE" );
+  DBG("%s\n",((in32(GPIO0_IR) & FPGA_INIT) == 0) ? "NOT INIT" : "INIT" );

  DBG("write configuration data into fpga\n");
  /* write configuration-data into fpga... */
@@ -237,8 +232,8 @@ static int fpga_boot(unsigned char *fpgadata, int size)
    }
 #endif

-  DBG("%s, ",((in32(IBM405GP_GPIO0_IR) & FPGA_DONE) == 0) ? "NOT DONE" : "DONE" );
-  DBG("%s\n",((in32(IBM405GP_GPIO0_IR) & FPGA_INIT) == 0) ? "NOT INIT" : "INIT" );
+  DBG("%s, ",((in32(GPIO0_IR) & FPGA_DONE) == 0) ? "NOT DONE" : "DONE" );
+  DBG("%s\n",((in32(GPIO0_IR) & FPGA_INIT) == 0) ? "NOT INIT" : "INIT" );

  /*
   * Check if fpga's DONE signal - correctly booted ?
@@ -246,7 +241,7 @@ static int fpga_boot(unsigned char *fpgadata, int size)

  /* Wait for FPGA end of programming period .  */
  count = 0;
-  while (!(in32(IBM405GP_GPIO0_IR) & FPGA_DONE))
+  while (!(in32(GPIO0_IR) & FPGA_DONE))
    {
      udelay(1000); /* wait 1ms */
      /* Check for timeout */
--- a/board/esd/cpci405/config.mk
+++ b/board/esd/cpci405/config.mk
@@ -28,5 +28,9 @@
 ifeq ($(BOARD_REVISION),CPCI4052)
 TEXT_BASE = 0xFFFC0000
 else
+ifeq ($(BOARD_REVISION),CPCI405AB)
+TEXT_BASE = 0xFFFC0000
+else
 TEXT_BASE = 0xFFFD0000
 endif
+endif
--- a/board/esd/cpci405/cpci405.c
+++ b/board/esd/cpci405/cpci405.c
@@ -37,7 +37,11 @@
 const unsigned char fpgadata[] =
 {
 #ifdef CONFIG_CPCI405_VER2
-# include "fpgadata_cpci4052.c"
+# ifdef CONFIG_CPCI405AB
+#  include "fpgadata_cpci405ab.c"
+# else
+#  include "fpgadata_cpci4052.c"
+# endif
 #else
 # include "fpgadata_cpci405.c"
 #endif
@@ -74,10 +78,10 @@ int board_pre_init (void)
 	/*
 	 * First pull fpga-prg pin low, to disable fpga logic (on version 2 board)
 	 */
-	out32(IBM405GP_GPIO0_ODR, 0x00000000);        /* no open drain pins      */
-	out32(IBM405GP_GPIO0_TCR, CFG_FPGA_PRG);      /* setup for output        */
-	out32(IBM405GP_GPIO0_OR,  CFG_FPGA_PRG);      /* set output pins to high */
-	out32(IBM405GP_GPIO0_OR, 0);                  /* pull prg low            */
+	out32(GPIO0_ODR, 0x00000000);        /* no open drain pins      */
+	out32(GPIO0_TCR, CFG_FPGA_PRG);      /* setup for output        */
+	out32(GPIO0_OR,  CFG_FPGA_PRG);      /* set output pins to high */
+	out32(GPIO0_OR, 0);                  /* pull prg low            */

 	/*
 	 * Boot onboard FPGA
@@ -192,10 +196,10 @@ int cpci405_version(void)
 	 */
 	cntrl0Reg = mfdcr(cntrl0);
 	mtdcr(cntrl0, cntrl0Reg | 0x03000000);
-	out32(IBM405GP_GPIO0_ODR, in32(IBM405GP_GPIO0_ODR) & ~0x00180000);
-	out32(IBM405GP_GPIO0_TCR, in32(IBM405GP_GPIO0_TCR) & ~0x00180000);
+	out32(GPIO0_ODR, in32(GPIO0_ODR) & ~0x00180000);
+	out32(GPIO0_TCR, in32(GPIO0_TCR) & ~0x00180000);
 	udelay(1000);                   /* wait some time before reading input */
-	value = in32(IBM405GP_GPIO0_IR) & 0x00180000;       /* get config bits */
+	value = in32(GPIO0_IR) & 0x00180000;       /* get config bits */

 	/*
 	 * Restore GPIO settings
@@ -505,4 +509,44 @@ void ide_set_reset(int on)
 #endif /* CONFIG_IDE_RESET */
 #endif /* CONFIG_CPCI405_VER2 */

+#if 0 /* test-only */
 /* ------------------------------------------------------------------------- */
+
+u8 *dhcp_vendorex_prep (u8 * e)
+{
+	char *ptr;
+
+/* DHCP vendor-class-identifier = 60 */
+	if ((ptr = getenv ("dhcp_vendor-class-identifier"))) {
+		*e++ = 60;
+		*e++ = strlen (ptr);
+		while (*ptr)
+			*e++ = *ptr++;
+	}
+/* my DHCP_CLIENT_IDENTIFIER = 61 */
+	if ((ptr = getenv ("dhcp_client_id"))) {
+		*e++ = 61;
+		*e++ = strlen (ptr);
+		while (*ptr)
+			*e++ = *ptr++;
+	}
+
+	return e;
+}
+
+
+/* ------------------------------------------------------------------------- */
+
+u8 *dhcp_vendorex_proc (u8 * popt)
+{
+	if (*popt == 61)
+		return (u8 *)-1;
+	if (*popt == 43) {
+		printf("|%s|", popt+4); /* test-only */
+		return (u8 *)-1;
+	}
+	return NULL;
+}
+
+/* ------------------------------------------------------------------------- */
+#endif /* test-only */
--- a/board/esd/cpci405/flash.c
+++ b/board/esd/cpci405/flash.c
@@ -86,11 +86,11 @@ unsigned long flash_init (void)
 	/* Re-do sizing to get full correct info */

 	if (size_b1) {
-		base_b1 = -size_b1;
 		if (size_b1 < (1 << 20)) {
 			/* minimum CS size on PPC405GP is 1MB !!! */
 			size_b1 = 1 << 20;
 		}
+		base_b1 = -size_b1;
 		mtdcr (ebccfga, pb0cr);
 		pbcr = mfdcr (ebccfgd);
 		mtdcr (ebccfga, pb0cr);
@@ -103,11 +103,11 @@ unsigned long flash_init (void)
 	}

 	if (size_b0) {
-		base_b0 = base_b1 - size_b0;
 		if (size_b0 < (1 << 20)) {
 			/* minimum CS size on PPC405GP is 1MB !!! */
 			size_b0 = 1 << 20;
 		}
+		base_b0 = base_b1 - size_b0;
 		mtdcr (ebccfga, pb1cr);
 		pbcr = mfdcr (ebccfgd);
 		mtdcr (ebccfga, pb1cr);
@@ -125,7 +125,7 @@ unsigned long flash_init (void)

 	/* monitor protection ON by default */
 	flash_protect (FLAG_PROTECT_SET,
-			base_b0 + size_b0 - CFG_MONITOR_LEN,
+			base_b0 + size_b0 - monitor_flash_len,
 			base_b0 + size_b0 - 1, &flash_info[0]);

 	if (size_b1) {
@@ -136,11 +136,11 @@ unsigned long flash_init (void)

 		/* monitor protection ON by default */
 		flash_protect (FLAG_PROTECT_SET,
-				base_b1 + size_b1 - CFG_MONITOR_LEN,
+				base_b1 + size_b1 - monitor_flash_len,
 				base_b1 + size_b1 - 1, &flash_info[1]);
 		/* monitor protection OFF by default (one is enough) */
 		flash_protect (FLAG_PROTECT_CLEAR,
-				base_b0 + size_b0 - CFG_MONITOR_LEN,
+				base_b0 + size_b0 - monitor_flash_len,
 				base_b0 + size_b0 - 1, &flash_info[0]);
 	} else {
 		flash_info[1].flash_id = FLASH_UNKNOWN;
--- a/board/esd/cpci405/fpgadata_cpci405ab.c
+++ b/board/esd/cpci405/fpgadata_cpci405ab.c
--- a/board/esd/cpci440/strataflash.c
+++ b/board/esd/cpci440/strataflash.c
@@ -200,7 +200,7 @@ unsigned long flash_init (void)
 #if 0 /* test-only */
 	/* Monitor protection ON by default */
 #if (CFG_MONITOR_BASE >= CFG_FLASH_BASE)
-	for(i=0; flash_info[0].start[i] < CFG_MONITOR_BASE+CFG_MONITOR_LEN-1; i++)
+	for(i=0; flash_info[0].start[i] < CFG_MONITOR_BASE+monitor_flash_len-1; i++)
 		(void)flash_real_protect(&flash_info[0], i, 1);
 #endif
 #endif
--- a/board/esd/cpciiser4/flash.c
+++ b/board/esd/cpciiser4/flash.c
@@ -74,7 +74,7 @@ unsigned long flash_init (void)

        /* Monitor protection ON by default */
        (void)flash_protect(FLAG_PROTECT_SET,
-                            -CFG_MONITOR_LEN,
+                            -monitor_flash_len,
                            0xffffffff,
                            &flash_info[0]);

--- a/board/esd/dasa_sim/flash.c
+++ b/board/esd/dasa_sim/flash.c
@@ -67,7 +67,7 @@ unsigned long flash_init (void)

        /* Monitor protection ON by default */
        (void)flash_protect(FLAG_PROTECT_SET,
-                            -CFG_MONITOR_LEN,
+                            -monitor_flash_len,
                            0xffffffff,
                            &flash_info[0]);

--- a/board/esd/du405/flash.c
+++ b/board/esd/du405/flash.c
@@ -94,7 +94,7 @@ unsigned long flash_init (void)

 	/* monitor protection ON by default */
 	flash_protect (FLAG_PROTECT_SET,
-			base_b0 + size_b0 - CFG_MONITOR_LEN,
+			base_b0 + size_b0 - monitor_flash_len,
 			base_b0 + size_b0 - 1, &flash_info[0]);

 	if (size_b1) {
@@ -105,11 +105,11 @@ unsigned long flash_init (void)

 		/* monitor protection ON by default */
 		flash_protect (FLAG_PROTECT_SET,
-				base_b1 + size_b1 - CFG_MONITOR_LEN,
+				base_b1 + size_b1 - monitor_flash_len,
 				base_b1 + size_b1 - 1, &flash_info[1]);
 		/* monitor protection OFF by default (one is enough) */
 		flash_protect (FLAG_PROTECT_CLEAR,
-				base_b0 + size_b0 - CFG_MONITOR_LEN,
+				base_b0 + size_b0 - monitor_flash_len,
 				base_b0 + size_b0 - 1, &flash_info[0]);
 	} else {
 		flash_info[1].flash_id = FLASH_UNKNOWN;
--- a/board/esd/ocrtc/flash.c
+++ b/board/esd/ocrtc/flash.c
@@ -127,7 +127,7 @@ unsigned long flash_init (void)

 	/* monitor protection ON by default */
 	flash_protect (FLAG_PROTECT_SET,
-			base_b0 + size_b0 - CFG_MONITOR_LEN,
+			base_b0 + size_b0 - monitor_flash_len,
 			base_b0 + size_b0 - 1, &flash_info[0]);

 	if (size_b1) {
@@ -138,11 +138,11 @@ unsigned long flash_init (void)

 		/* monitor protection ON by default */
 		flash_protect (FLAG_PROTECT_SET,
-				base_b1 + size_b1 - CFG_MONITOR_LEN,
+				base_b1 + size_b1 - monitor_flash_len,
 				base_b1 + size_b1 - 1, &flash_info[1]);
 		/* monitor protection OFF by default (one is enough) */
 		flash_protect (FLAG_PROTECT_CLEAR,
-				base_b0 + size_b0 - CFG_MONITOR_LEN,
+				base_b0 + size_b0 - monitor_flash_len,
 				base_b0 + size_b0 - 1, &flash_info[0]);
 	} else {
 		flash_info[1].flash_id = FLASH_UNKNOWN;
--- a/board/esd/pci405/cmd_pci405.c
+++ b/board/esd/pci405/cmd_pci405.c
@@ -36,66 +36,7 @@

 extern int do_bootm (cmd_tbl_t *, int, int, char *[]);

-#if 0 /* test-only */
-#include "../common/fpga.c"
-void error_print(void)
-{
-	int i;
-	volatile unsigned char *ptr;
-	volatile unsigned long *ptr2;
-	
-	printf("\n 2nd SJA1000:\n");
-	ptr = 0xf0000100;
-	for (i=0; i<0x20; i++) {
-		printf("%02x ", *ptr++);
-	}

-	ptr2 = 0xf0400008;
-	printf("\nTimestamp = %x\n", *ptr2);
-	udelay(1000);
-	printf("Timestamp = %x\n", *ptr2);
-	udelay(1000);
-	printf("Timestamp = %x\n", *ptr2);
-
-#if 0 /* test-only */
-	/*
-	 * Reset FPGA via FPGA_DATA pin
-	 */
-	printf("Resetting FPGA...\n");
-	SET_FPGA(FPGA_PRG | FPGA_CLK);
-	udelay(1000); /* wait 1ms */
-	SET_FPGA(FPGA_PRG | FPGA_CLK | FPGA_DATA);
-	udelay(1000); /* wait 1ms */
-
-	do_loadpci(NULL, 0,0, NULL);
-#endif
-}
-
-void read_loop(void)
-{
-	int i;
-	volatile unsigned char *ptr;
-	volatile unsigned char val;
-	volatile unsigned long *ptr2;
-
-	printf("\nread loop on 1st sja1000...");
-	while (1) {
-		ptr = 0xf0000000;
-/*		printf("\n1st SJA1000:\n");*/
-		for (i=0; i<0x20; i++) {
-			i = i;
-			val = *ptr++;
-/*			printf("%02x ", val);*/
-		}
-
-		/* Abort if ctrl-c was pressed */
-		if (ctrlc()) {
-			puts("\nAbort\n");
-			return 0;
-		}
-	}
-}
-#endif
 /*
 * Command loadpci: wait for signal from host and boot image.
 */
@@ -110,66 +51,6 @@ int do_loadpci(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 	char str[] = "\\|/-";
 	char *local_args[2];

-#if 0 /* test-only */
-	puts("\nStarting sja1000 test...");
-	{
-		int count;
-		volatile unsigned char *ptr;
-		volatile unsigned char val;
-		volatile unsigned char val2;
-
-#if 1 /* write test */
-		ptr = 0xf0000014;
-		for (i=1; i<11; i++)
-			*ptr++ = i;
-#endif
-		
-		count = 0;
-		while (1) {
-			count++;
-#if 0 /* write test */
-			ptr = 0xf0000014;
-			for (i=1; i<11; i++)
-				*ptr++ = i;
-#endif
-#if 1 /* read test */
-			ptr = 0xf0000014;
-			for (i=1; i<11; i++) {
-				val = *ptr++;
-#if 1
-				if (val != i) {
-					ptr = 0xf0000100;
-					val = *ptr; /* trigger las */
-
-					ptr = 0xf0000014;
-					val2 = *ptr;
-
-					printf("\nERROR: count=%d: soll=%x ist=%x -> staring read loop on 1st sja1000...\n",	count, i, val);
-
-					printf("soll=%x ist=%x -> staring read loop on 1st sja1000...\n", 1, val2);
-
-					return 0; /* test-only */
-					udelay(1000);
-					error_print();
-					read_loop();
-					return 0;
-				}
-#endif
-			}
-#endif
-
-			/* Abort if ctrl-c was pressed */
-			if (ctrlc()) {
-				puts("\nAbort\n");
-				return 0;
-			}
-
-			if (!(count % 100000)) {
-				printf(".");
-			}
-		}
-	}
-#endif
 	/*
 	 * Mark sync address
 	 */
@@ -212,13 +93,13 @@ int do_loadpci(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 		printf("\nStoring PCI Configuration Regs...\n");
 	} else {
 		sprintf(addr, "%08x", *ptr);
-		
+
 		/*
 		 * Boot image
 		 */
 		printf("\nBooting image at addr 0x%s ...\n", addr);
 		setenv("loadaddr", addr);
-		
+
 		local_args[0] = argv[0];
 		local_args[1] = NULL;
 		status = do_bootm (cmdtp, 0, 1, local_args);
--- a/board/esd/pci405/flash.c
+++ b/board/esd/pci405/flash.c
@@ -91,7 +91,7 @@ unsigned long flash_init (void)

        /* Monitor protection ON by default */
        (void)flash_protect(FLAG_PROTECT_SET,
-                            -CFG_MONITOR_LEN,
+                            -monitor_flash_len,
                            0xffffffff,
                            &flash_info[0]);

--- a/board/esd/pci405/fpgadata.c
+++ b/board/esd/pci405/fpgadata.c
--- a/board/esd/pci405/pci405.c
+++ b/board/esd/pci405/pci405.c
@@ -84,6 +84,11 @@ int board_pre_init (void)
 	cntrl0Reg = mfdcr(cntrl0);
 	mtdcr(cntrl0, cntrl0Reg | 0x00008000);

+	/*
+	 * EBC Configuration Register: set ready timeout to 512 ebc-clks -> ca. 25 us
+	 */
+	mtebc (epcr, 0xa8400000); /* ebc always driven */
+
 	return 0;
 }

@@ -186,7 +191,7 @@ int misc_init_r (void)
 			}
 		}
 		mtdcr(uicsr, 0xFFFFFFFF);        /* clear all ints */
-		
+
 		*magic = 0;      /* clear pci reconfig magic again */
 	}

--- a/board/esd/pmc405/Makefile
+++ b/board/esd/pmc405/Makefile
@@ -0,0 +1,46 @@
+#
+# (C) Copyright 2000, 2001
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB	= lib$(BOARD).a
+
+OBJS	= $(BOARD).o strataflash.o
+
+$(LIB):	$(OBJS) $(SOBJS)
+	$(AR) crv $@ $^
+
+clean:
+	rm -f $(SOBJS) $(OBJS)
+
+distclean:	clean
+	rm -f $(LIB) core *.bak .depend
+
+#########################################################################
+
+.depend:	Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
+		$(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
+
+sinclude .depend
+
+#########################################################################
--- a/board/esd/pmc405/config.mk
+++ b/board/esd/pmc405/config.mk
@@ -0,0 +1,28 @@
+#
+# (C) Copyright 2000, 2001
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+#
+# esd PMC405 boards
+#
+
+TEXT_BASE = 0xFFFC0000
--- a/board/esd/pmc405/pmc405.c
+++ b/board/esd/pmc405/pmc405.c
@@ -0,0 +1,229 @@
+/*
+ * (C) Copyright 2001-2003
+ * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/processor.h>
+#include <command.h>
+#include <cmd_boot.h>
+#include <malloc.h>
+
+/* ------------------------------------------------------------------------- */
+
+
+/* Prototypes */
+int gunzip(void *, int, unsigned char *, int *);
+
+
+int board_pre_init (void)
+{
+	/*
+	 * IRQ 0-15  405GP internally generated; active high; level sensitive
+	 * IRQ 16    405GP internally generated; active low; level sensitive
+	 * IRQ 17-24 RESERVED
+	 * IRQ 25 (EXT IRQ 0) CAN0; active low; level sensitive
+	 * IRQ 26 (EXT IRQ 1) SER0 ; active low; level sensitive
+	 * IRQ 27 (EXT IRQ 2) SER1; active low; level sensitive
+	 * IRQ 28 (EXT IRQ 3) FPGA 0; active low; level sensitive
+	 * IRQ 29 (EXT IRQ 4) FPGA 1; active low; level sensitive
+	 * IRQ 30 (EXT IRQ 5) PCI INTA; active low; level sensitive
+	 * IRQ 31 (EXT IRQ 6) COMPACT FLASH; active high; level sensitive
+	 */
+	mtdcr(uicsr, 0xFFFFFFFF);       /* clear all ints */
+	mtdcr(uicer, 0x00000000);       /* disable all ints */
+	mtdcr(uiccr, 0x00000000);       /* set all to be non-critical*/
+	mtdcr(uicpr, 0xFFFFFF81);       /* set int polarities */
+	mtdcr(uictr, 0x10000000);       /* set int trigger levels */
+	mtdcr(uicvcr, 0x00000001);      /* set vect base=0,INT0 highest priority*/
+	mtdcr(uicsr, 0xFFFFFFFF);       /* clear all ints */
+
+	/*
+	 * EBC Configuration Register: set ready timeout to 512 ebc-clks -> ca. 15 us
+	 */
+	mtebc (epcr, 0xa8400000);
+
+	return 0;
+}
+
+
+/* ------------------------------------------------------------------------- */
+
+int misc_init_f (void)
+{
+	return 0;  /* dummy implementation */
+}
+
+
+int misc_init_r (void)
+{
+#if 0 /* test-only */
+	DECLARE_GLOBAL_DATA_PTR;
+	volatile unsigned short *fpga_mode =
+		(unsigned short *)((ulong)CFG_FPGA_BASE_ADDR + CFG_FPGA_CTRL);
+	volatile unsigned char *duart0_mcr =
+		(unsigned char *)((ulong)DUART0_BA + 4);
+	volatile unsigned char *duart1_mcr =
+		(unsigned char *)((ulong)DUART1_BA + 4);
+	bd_t *bd = gd->bd;
+	char *	tmp;                    /* Temporary char pointer      */
+	unsigned char *dst;
+	ulong len = sizeof(fpgadata);
+	int status;
+	int index;
+	int i;
+	unsigned long cntrl0Reg;
+
+	/*
+	 * Setup GPIO pins (CS6+CS7 as GPIO)
+	 */
+	cntrl0Reg = mfdcr(cntrl0);
+	mtdcr(cntrl0, cntrl0Reg | 0x00300000);
+
+	dst = malloc(CFG_FPGA_MAX_SIZE);
+	if (gunzip (dst, CFG_FPGA_MAX_SIZE, (uchar *)fpgadata, (int *)&len) != 0) {
+		printf ("GUNZIP ERROR - must RESET board to recover\n");
+		do_reset (NULL, 0, 0, NULL);
+	}
+
+	status = fpga_boot(dst, len);
+	if (status != 0) {
+		printf("\nFPGA: Booting failed ");
+		switch (status) {
+		case ERROR_FPGA_PRG_INIT_LOW:
+			printf("(Timeout: INIT not low after asserting PROGRAM*)\n ");
+			break;
+		case ERROR_FPGA_PRG_INIT_HIGH:
+			printf("(Timeout: INIT not high after deasserting PROGRAM*)\n ");
+			break;
+		case ERROR_FPGA_PRG_DONE:
+			printf("(Timeout: DONE not high after programming FPGA)\n ");
+			break;
+		}
+
+		/* display infos on fpgaimage */
+		index = 15;
+		for (i=0; i<4; i++) {
+			len = dst[index];
+			printf("FPGA: %s\n", &(dst[index+1]));
+			index += len+3;
+		}
+		putc ('\n');
+		/* delayed reboot */
+		for (i=20; i>0; i--) {
+			printf("Rebooting in %2d seconds \r",i);
+			for (index=0;index<1000;index++)
+				udelay(1000);
+		}
+		putc ('\n');
+		do_reset(NULL, 0, 0, NULL);
+	}
+
+	/* restore gpio/cs settings */
+	mtdcr(cntrl0, cntrl0Reg);
+
+	puts("FPGA:  ");
+
+	/* display infos on fpgaimage */
+	index = 15;
+	for (i=0; i<4; i++) {
+		len = dst[index];
+		printf("%s ", &(dst[index+1]));
+		index += len+3;
+	}
+	putc ('\n');
+
+	free(dst);
+
+	/*
+	 * Reset FPGA via FPGA_DATA pin
+	 */
+	SET_FPGA(FPGA_PRG | FPGA_CLK);
+	udelay(1000); /* wait 1ms */
+	SET_FPGA(FPGA_PRG | FPGA_CLK | FPGA_DATA);
+	udelay(1000); /* wait 1ms */
+
+	/*
+	 * Enable power on PS/2 interface
+	 */
+	*fpga_mode |= CFG_FPGA_CTRL_PS2_RESET;
+
+	/*
+	 * Enable interrupts in exar duart mcr[3]
+	 */
+	*duart0_mcr = 0x08;
+	*duart1_mcr = 0x08;
+#endif
+
+	return (0);
+}
+
+
+/*
+ * Check Board Identity:
+ */
+
+int checkboard (void)
+{
+	unsigned char str[64];
+	int i = getenv_r ("serial#", str, sizeof(str));
+
+	puts ("Board: ");
+
+	if (i == -1) {
+		puts ("### No HW ID - assuming ABG405");
+	} else {
+		puts(str);
+	}
+
+	putc ('\n');
+
+	return 0;
+}
+
+/* ------------------------------------------------------------------------- */
+
+long int initdram (int board_type)
+{
+	unsigned long val;
+
+	mtdcr(memcfga, mem_mb0cf);
+	val = mfdcr(memcfgd);
+
+#if 0
+	printf("\nmb0cf=%x\n", val); /* test-only */
+	printf("strap=%x\n", mfdcr(strap)); /* test-only */
+#endif
+
+	return (4*1024*1024 << ((val & 0x000e0000) >> 17));
+}
+
+/* ------------------------------------------------------------------------- */
+
+int testdram (void)
+{
+	/* TODO: XXX XXX XXX */
+	printf ("test: 16 MB - ok\n");
+
+	return (0);
+}
+
+/* ------------------------------------------------------------------------- */
--- a/board/esd/pmc405/strataflash.c
+++ b/board/esd/pmc405/strataflash.c
@@ -0,0 +1,796 @@
+/*
+ * (C) Copyright 2002
+ * Brad Kemp, Seranoa Networks, Brad.Kemp@seranoa.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/processor.h>
+
+#undef  DEBUG_FLASH 
+/*
+ * This file implements a Common Flash Interface (CFI) driver for ppcboot.
+ * The width of the port and the width of the chips are determined at initialization.
+ * These widths are used to calculate the address for access CFI data structures.
+ * It has been tested on an Intel Strataflash implementation.
+ *
+ * References
+ * JEDEC Standard JESD68 - Common Flash Interface (CFI)
+ * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes
+ * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets
+ * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet
+ *
+ * TODO
+ * Use Primary Extended Query table (PRI) and Alternate Algorithm Query Table (ALT) to determine if protection is available
+ * Add support for other command sets Use the PRI and ALT to determine command set
+ * Verify erase and program timeouts.
+ */
+
+#define FLASH_CMD_CFI			0x98
+#define FLASH_CMD_READ_ID		0x90
+#define FLASH_CMD_RESET			0xff
+#define FLASH_CMD_BLOCK_ERASE		0x20
+#define FLASH_CMD_ERASE_CONFIRM		0xD0
+#define FLASH_CMD_WRITE			0x40
+#define FLASH_CMD_PROTECT		0x60
+#define FLASH_CMD_PROTECT_SET		0x01
+#define FLASH_CMD_PROTECT_CLEAR		0xD0
+#define FLASH_CMD_CLEAR_STATUS		0x50
+#define FLASH_CMD_WRITE_TO_BUFFER       0xE8
+#define FLASH_CMD_WRITE_BUFFER_CONFIRM  0xD0
+
+#define FLASH_STATUS_DONE		0x80
+#define FLASH_STATUS_ESS		0x40
+#define FLASH_STATUS_ECLBS		0x20
+#define FLASH_STATUS_PSLBS		0x10
+#define FLASH_STATUS_VPENS		0x08
+#define FLASH_STATUS_PSS		0x04
+#define FLASH_STATUS_DPS		0x02
+#define FLASH_STATUS_R			0x01
+#define FLASH_STATUS_PROTECT		0x01
+
+#define FLASH_OFFSET_CFI		0x55
+#define FLASH_OFFSET_CFI_RESP		0x10
+#define FLASH_OFFSET_WTOUT		0x1F
+#define FLASH_OFFSET_WBTOUT             0x20
+#define FLASH_OFFSET_ETOUT		0x21
+#define FLASH_OFFSET_CETOUT             0x22
+#define FLASH_OFFSET_WMAX_TOUT		0x23
+#define FLASH_OFFSET_WBMAX_TOUT         0x24
+#define FLASH_OFFSET_EMAX_TOUT		0x25
+#define FLASH_OFFSET_CEMAX_TOUT         0x26
+#define FLASH_OFFSET_SIZE		0x27
+#define FLASH_OFFSET_INTERFACE          0x28
+#define FLASH_OFFSET_BUFFER_SIZE        0x2A
+#define FLASH_OFFSET_NUM_ERASE_REGIONS	0x2C
+#define FLASH_OFFSET_ERASE_REGIONS	0x2D
+#define FLASH_OFFSET_PROTECT		0x02
+#define FLASH_OFFSET_USER_PROTECTION    0x85
+#define FLASH_OFFSET_INTEL_PROTECTION   0x81
+
+
+#define FLASH_MAN_CFI			0x01000000
+
+
+
+
+typedef union {
+	unsigned char c;
+	unsigned short w;
+	unsigned long l;
+} cfiword_t;
+
+typedef union {
+	unsigned char * cp;
+	unsigned short *wp;
+	unsigned long *lp;
+} cfiptr_t;
+
+#define NUM_ERASE_REGIONS 4
+
+flash_info_t	flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips	*/
+
+
+/*-----------------------------------------------------------------------
+ * Functions
+ */
+
+
+
+static void flash_add_byte(flash_info_t *info, cfiword_t * cword, uchar c);
+static void flash_make_cmd(flash_info_t * info, uchar cmd, void * cmdbuf);
+static void flash_write_cmd(flash_info_t * info, int sect, uchar offset, uchar cmd);
+static int flash_isequal(flash_info_t * info, int sect, uchar offset, uchar cmd);
+static int flash_isset(flash_info_t * info, int sect, uchar offset, uchar cmd);
+static int flash_detect_cfi(flash_info_t * info);
+static ulong flash_get_size (ulong base, int banknum);
+static int flash_write_cfiword (flash_info_t *info, ulong dest, cfiword_t cword);
+static int flash_full_status_check(flash_info_t * info, ulong sector, ulong tout, char * prompt);
+#ifdef CFG_FLASH_USE_BUFFER_WRITE
+static int flash_write_cfibuffer(flash_info_t * info, ulong dest, uchar * cp, int len);
+#endif
+/*-----------------------------------------------------------------------
+ * create an address based on the offset and the port width
+ */
+inline uchar * flash_make_addr(flash_info_t * info, int sect, int offset)
+{
+	return ((uchar *)(info->start[sect] + (offset * info->portwidth)));
+}
+/*-----------------------------------------------------------------------
+ * read a character at a port width address
+ */
+inline uchar flash_read_uchar(flash_info_t * info, uchar offset)
+{
+	uchar *cp;
+	cp = flash_make_addr(info, 0, offset);
+	return (cp[info->portwidth - 1]);
+}
+
+/*-----------------------------------------------------------------------
+ * read a short word by swapping for ppc format.
+ */
+ushort flash_read_ushort(flash_info_t * info, int sect,  uchar offset)
+{
+    uchar * addr;
+
+    addr = flash_make_addr(info, sect, offset);
+    return ((addr[(2*info->portwidth) - 1] << 8) | addr[info->portwidth - 1]);
+
+}
+
+/*-----------------------------------------------------------------------
+ * read a long word by picking the least significant byte of each maiximum
+ * port size word. Swap for ppc format.
+ */
+ulong flash_read_long(flash_info_t * info, int sect,  uchar offset)
+{
+    uchar * addr;
+
+    addr = flash_make_addr(info, sect, offset);
+    return ( (addr[(2*info->portwidth) - 1] << 24 ) | (addr[(info->portwidth) -1] << 16) |
+	    (addr[(4*info->portwidth) - 1] << 8) | addr[(3*info->portwidth) - 1]);
+
+}
+
+/*-----------------------------------------------------------------------
+ */
+unsigned long flash_init (void)
+{
+	unsigned long size;
+	int i;
+	unsigned long  address;
+
+
+	/* The flash is positioned back to back, with the demultiplexing of the chip
+	 * based on the A24 address line.
+	 *
+	 */
+
+	address = CFG_FLASH_BASE;
+	size = 0;
+
+	/* Init: no FLASHes known */
+	for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
+		flash_info[i].flash_id = FLASH_UNKNOWN;
+		size += flash_info[i].size = flash_get_size(address, i);
+		address += CFG_FLASH_INCREMENT;
+		if (flash_info[0].flash_id == FLASH_UNKNOWN) {
+			printf ("## Unknown FLASH on Bank %d - Size = 0x%08lx = %ld MB\n",i,
+				flash_info[0].size, flash_info[i].size<<20);
+		}
+	}
+
+#if 0 /* test-only */
+	/* Monitor protection ON by default */
+#if (CFG_MONITOR_BASE >= CFG_FLASH_BASE)
+	for(i=0; flash_info[0].start[i] < CFG_MONITOR_BASE+CFG_MONITOR_LEN-1; i++)
+		(void)flash_real_protect(&flash_info[0], i, 1);
+#endif
+#else
+	/* monitor protection ON by default */
+	flash_protect (FLAG_PROTECT_SET,
+		       - CFG_MONITOR_LEN,
+		       - 1, &flash_info[1]);
+#endif
+
+	return (size);
+}
+
+/*-----------------------------------------------------------------------
+ */
+int flash_erase (flash_info_t *info, int s_first, int s_last)
+{
+	int rcode = 0;
+	int prot;
+	int sect;
+
+	if( info->flash_id != FLASH_MAN_CFI) {
+		printf ("Can't erase unknown flash type - aborted\n");
+		return 1;
+	}
+	if ((s_first < 0) || (s_first > s_last)) {
+		printf ("- no sectors to erase\n");
+		return 1;
+	}
+
+	prot = 0;
+	for (sect=s_first; sect<=s_last; ++sect) {
+		if (info->protect[sect]) {
+			prot++;
+		}
+	}
+	if (prot) {
+		printf ("- Warning: %d protected sectors will not be erased!\n",
+			prot);
+	} else {
+		printf ("\n");
+	}
+
+
+	for (sect = s_first; sect<=s_last; sect++) {
+		if (info->protect[sect] == 0) { /* not protected */
+			flash_write_cmd(info, sect, 0, FLASH_CMD_CLEAR_STATUS);
+			flash_write_cmd(info, sect, 0, FLASH_CMD_BLOCK_ERASE);
+			flash_write_cmd(info, sect, 0, FLASH_CMD_ERASE_CONFIRM);
+			
+			if(flash_full_status_check(info, sect, info->erase_blk_tout, "erase")) {
+				rcode = 1;
+			} else
+				printf(".");
+		}
+	}
+	printf (" done\n");
+	return rcode;
+}
+
+/*-----------------------------------------------------------------------
+ */
+void flash_print_info  (flash_info_t *info)
+{
+	int i;
+
+	if (info->flash_id != FLASH_MAN_CFI) {
+		printf ("missing or unknown FLASH type\n");
+		return;
+	}
+
+	printf("CFI conformant FLASH (%d x %d)",
+	       (info->portwidth	 << 3 ), (info->chipwidth  << 3 ));
+	printf ("  Size: %ld MB in %d Sectors\n",
+		info->size >> 20, info->sector_count);
+	printf(" Erase timeout %ld ms, write timeout %ld ms, buffer write timeout %ld ms, buffer size %d\n",
+	       info->erase_blk_tout, info->write_tout, info->buffer_write_tout, info->buffer_size);
+      
+	printf ("  Sector Start Addresses:");
+	for (i=0; i<info->sector_count; ++i) {
+#ifdef CFG_FLASH_EMPTY_INFO
+		int k;
+		int size;
+		int erased;
+		volatile unsigned long *flash;
+
+                /*
+                 * Check if whole sector is erased
+                 */
+                if (i != (info->sector_count-1))
+                  size = info->start[i+1] - info->start[i];
+                else
+                  size = info->start[0] + info->size - info->start[i];
+                erased = 1;
+                flash = (volatile unsigned long *)info->start[i];
+                size = size >> 2;        /* divide by 4 for longword access */
+                for (k=0; k<size; k++)
+                  {
+                    if (*flash++ != 0xffffffff)
+                      {
+                        erased = 0;
+                        break;
+                      }
+                  }
+
+		if ((i % 5) == 0)
+			printf ("\n   ");
+                /* print empty and read-only info */
+		printf (" %08lX%s%s",
+			info->start[i],
+			erased ? " E" : "  ",
+			info->protect[i] ? "RO " : "   ");
+#else
+		if ((i % 5) == 0)
+			printf ("\n   ");
+		printf (" %08lX%s",
+			info->start[i],
+			info->protect[i] ? " (RO)" : "     ");
+#endif
+	}
+	printf ("\n");
+	return;
+}
+
+/*-----------------------------------------------------------------------
+ * Copy memory to flash, returns:
+ * 0 - OK
+ * 1 - write timeout
+ * 2 - Flash not erased
+ */
+int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
+{
+	ulong wp;
+	ulong cp;
+	int aln;
+	cfiword_t cword;
+	int i, rc;
+
+	/* get lower aligned address */
+	wp = (addr & ~(info->portwidth - 1));
+
+	/* handle unaligned start */
+	if((aln = addr - wp) != 0) {
+		cword.l = 0;
+		cp = wp;
+		for(i=0;i<aln; ++i, ++cp)
+			flash_add_byte(info, &cword, (*(uchar *)cp));
+
+		for(; (i< info->portwidth) && (cnt > 0) ; i++) {
+			flash_add_byte(info, &cword, *src++);
+			cnt--;
+			cp++;
+		}
+		for(; (cnt == 0) && (i < info->portwidth); ++i, ++cp)
+			flash_add_byte(info, &cword, (*(uchar *)cp));
+		if((rc = flash_write_cfiword(info, wp, cword)) != 0)
+			return rc;
+		wp = cp;
+	}
+
+#ifdef CFG_FLASH_USE_BUFFER_WRITE
+	while(cnt >= info->portwidth) {
+		i = info->buffer_size > cnt? cnt: info->buffer_size;
+		if((rc = flash_write_cfibuffer(info, wp, src,i)) != ERR_OK)
+			return rc;
+		wp += i;
+		src += i;
+		cnt -=i;
+	}
+#else
+	/* handle the aligned part */
+	while(cnt >= info->portwidth) {
+		cword.l = 0;
+		for(i = 0; i < info->portwidth; i++) {
+			flash_add_byte(info, &cword, *src++);
+		}
+		if((rc = flash_write_cfiword(info, wp, cword)) != 0)
+			return rc;
+		wp += info->portwidth;
+		cnt -= info->portwidth;
+	}
+#endif /* CFG_FLASH_USE_BUFFER_WRITE */
+	if (cnt == 0) {
+		return (0);
+	}
+
+	/*
+	 * handle unaligned tail bytes
+	 */
+	cword.l = 0;
+	for (i=0, cp=wp; (i<info->portwidth) && (cnt>0); ++i, ++cp) {
+		flash_add_byte(info, &cword, *src++);
+		--cnt;
+	}
+	for (; i<info->portwidth; ++i, ++cp) {
+		flash_add_byte(info, & cword, (*(uchar *)cp));
+	}
+
+	return flash_write_cfiword(info, wp, cword);
+}
+
+/*-----------------------------------------------------------------------
+ */
+int flash_real_protect(flash_info_t *info, long sector, int prot)
+{
+	int retcode = 0;
+
+	flash_write_cmd(info, sector, 0, FLASH_CMD_CLEAR_STATUS);
+	flash_write_cmd(info, sector, 0, FLASH_CMD_PROTECT);
+	if(prot)
+		flash_write_cmd(info, sector, 0, FLASH_CMD_PROTECT_SET);
+	else
+		flash_write_cmd(info, sector, 0, FLASH_CMD_PROTECT_CLEAR);
+
+	if((retcode = flash_full_status_check(info, sector, info->erase_blk_tout, 
+					 prot?"protect":"unprotect")) == 0) {
+
+		info->protect[sector] = prot;
+		/* Intel's unprotect unprotects all locking */
+		if(prot == 0) {
+			int i;
+			for(i = 0 ; i<info->sector_count; i++) {
+				if(info->protect[i])
+					flash_real_protect(info, i, 1);
+			}
+		}
+	}
+
+	return retcode;
+}
+/*-----------------------------------------------------------------------
+ *  wait for XSR.7 to be set. Time out with an error if it does not.
+ *  This routine does not set the flash to read-array mode.
+ */
+static int flash_status_check(flash_info_t * info, ulong sector, ulong tout, char * prompt)
+{
+	ulong start;
+
+	/* Wait for command completion */
+	start = get_timer (0);
+	while(!flash_isset(info, sector, 0, FLASH_STATUS_DONE)) {
+		if (get_timer(start) > info->erase_blk_tout) {
+			printf("Flash %s timeout at address %lx\n", prompt, info->start[sector]);
+			flash_write_cmd(info, sector, 0, FLASH_CMD_RESET);
+			return ERR_TIMOUT;
+		}
+	}
+	return ERR_OK;
+}
+/*-----------------------------------------------------------------------
+ * Wait for XSR.7 to be set, if it times out print an error, otherwise do a full status check.
+ * This routine sets the flash to read-array mode.
+ */
+static int flash_full_status_check(flash_info_t * info, ulong sector, ulong tout, char * prompt)
+{
+	int retcode;
+	retcode = flash_status_check(info, sector, tout, prompt);
+	if((retcode == ERR_OK) && !flash_isequal(info,sector, 0, FLASH_STATUS_DONE)) {
+		retcode = ERR_INVAL;
+		printf("Flash %s error at address %lx\n", prompt,info->start[sector]);
+		if(flash_isset(info, sector, 0, FLASH_STATUS_ECLBS | FLASH_STATUS_PSLBS)){
+			printf("Command Sequence Error.\n");
+		} else if(flash_isset(info, sector, 0, FLASH_STATUS_ECLBS)){
+			printf("Block Erase Error.\n");
+		        retcode = ERR_NOT_ERASED;
+		} else if (flash_isset(info, sector, 0, FLASH_STATUS_PSLBS)) {
+			printf("Locking Error\n");
+		}
+		if(flash_isset(info, sector, 0, FLASH_STATUS_DPS)){
+			printf("Block locked.\n");
+			retcode = ERR_PROTECTED;
+		}
+		if(flash_isset(info, sector, 0, FLASH_STATUS_VPENS))
+			printf("Vpp Low Error.\n");
+	}
+	flash_write_cmd(info, sector, 0, FLASH_CMD_RESET);
+	return retcode;
+}
+/*-----------------------------------------------------------------------
+ */
+static void flash_add_byte(flash_info_t *info, cfiword_t * cword, uchar c)
+{
+	switch(info->portwidth) {
+	case FLASH_CFI_8BIT:
+		cword->c = c;
+		break;
+	case FLASH_CFI_16BIT:
+		cword->w = (cword->w << 8) | c;
+		break;
+	case FLASH_CFI_32BIT:
+		cword->l = (cword->l << 8) | c;
+	}
+}
+
+
+/*-----------------------------------------------------------------------
+ * make a proper sized command based on the port and chip widths
+ */
+static void flash_make_cmd(flash_info_t * info, uchar cmd, void * cmdbuf)
+{
+	int i;
+	uchar *cp = (uchar *)cmdbuf;
+	for(i=0; i< info->portwidth; i++)
+		*cp++ = ((i+1) % info->chipwidth) ? '\0':cmd;
+}
+
+/*
+ * Write a proper sized command to the correct address
+ */
+static void flash_write_cmd(flash_info_t * info, int sect, uchar offset, uchar cmd)
+{
+
+	volatile cfiptr_t addr;
+	cfiword_t cword;
+	addr.cp = flash_make_addr(info, sect, offset);
+	flash_make_cmd(info, cmd, &cword);
+	switch(info->portwidth) {
+	case FLASH_CFI_8BIT:
+		*addr.cp = cword.c;
+		break;
+	case FLASH_CFI_16BIT:
+		*addr.wp = cword.w;
+		break;
+	case FLASH_CFI_32BIT:
+		*addr.lp = cword.l;
+		break;
+	}
+}
+
+/*-----------------------------------------------------------------------
+ */
+static int flash_isequal(flash_info_t * info, int sect, uchar offset, uchar cmd)
+{
+	cfiptr_t cptr;
+	cfiword_t cword;
+	int retval;
+	cptr.cp = flash_make_addr(info, sect, offset);
+	flash_make_cmd(info, cmd, &cword);
+	switch(info->portwidth) {
+	case FLASH_CFI_8BIT:
+		retval = (cptr.cp[0] == cword.c);
+		break;
+	case FLASH_CFI_16BIT:
+		retval = (cptr.wp[0] == cword.w);
+		break;
+	case FLASH_CFI_32BIT:
+		retval = (cptr.lp[0] == cword.l);
+		break;
+	default:
+		retval = 0;
+		break;
+	}
+	return retval;
+}
+/*-----------------------------------------------------------------------
+ */
+static int flash_isset(flash_info_t * info, int sect, uchar offset, uchar cmd)
+{
+	cfiptr_t cptr;
+	cfiword_t cword;
+	int retval;
+	cptr.cp = flash_make_addr(info, sect, offset);
+	flash_make_cmd(info, cmd, &cword);
+	switch(info->portwidth) {
+	case FLASH_CFI_8BIT:
+		retval = ((cptr.cp[0] & cword.c) == cword.c);
+		break;
+	case FLASH_CFI_16BIT:
+		retval = ((cptr.wp[0] & cword.w) == cword.w);
+		break;
+	case FLASH_CFI_32BIT:
+		retval = ((cptr.lp[0] & cword.l) == cword.l);
+		break;
+	default:
+		retval = 0;
+		break;
+	}
+	return retval;
+}
+
+/*-----------------------------------------------------------------------
+ * detect if flash is compatible with the Common Flash Interface (CFI)
+ * http://www.jedec.org/download/search/jesd68.pdf
+ *
+*/
+static int flash_detect_cfi(flash_info_t * info)
+{
+
+	for(info->portwidth=FLASH_CFI_8BIT; info->portwidth <= FLASH_CFI_32BIT;
+	    info->portwidth <<= 1) {
+		for(info->chipwidth =FLASH_CFI_BY8;
+		    info->chipwidth <= info->portwidth;
+		    info->chipwidth <<= 1) {
+			flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
+			flash_write_cmd(info, 0, FLASH_OFFSET_CFI, FLASH_CMD_CFI);
+			if(flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP,'Q') &&
+			   flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R') &&
+			   flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y'))
+				return 1;
+		}
+	}
+	return 0;
+}
+/*
+ * The following code cannot be run from FLASH!
+ *
+ */
+static ulong flash_get_size (ulong base, int banknum)
+{
+	flash_info_t * info = &flash_info[banknum];
+	int i, j;
+	int sect_cnt;
+	unsigned long sector;
+	unsigned long tmp;
+	int size_ratio;
+	uchar num_erase_regions;
+	int  erase_region_size;
+	int  erase_region_count;
+
+	info->start[0] = base;
+
+	if(flash_detect_cfi(info)){
+#ifdef DEBUG_FLASH
+		printf("portwidth=%d chipwidth=%d\n", info->portwidth, info->chipwidth); /* test-only */
+#endif
+		size_ratio = info->portwidth / info->chipwidth;
+		num_erase_regions = flash_read_uchar(info, FLASH_OFFSET_NUM_ERASE_REGIONS);
+#ifdef DEBUG_FLASH
+		printf("found %d erase regions\n", num_erase_regions);
+#endif
+		sect_cnt = 0;
+		sector = base;
+		for(i = 0 ; i < num_erase_regions; i++) {
+			if(i > NUM_ERASE_REGIONS) {
+				printf("%d erase regions found, only %d used\n",
+				       num_erase_regions, NUM_ERASE_REGIONS);
+				break;
+			}
+			tmp = flash_read_long(info, 0, FLASH_OFFSET_ERASE_REGIONS);
+			erase_region_size = (tmp & 0xffff)? ((tmp & 0xffff) * 256): 128;
+			tmp >>= 16;
+			erase_region_count = (tmp & 0xffff) +1;
+			for(j = 0; j< erase_region_count; j++) {
+				info->start[sect_cnt] = sector;
+				sector += (erase_region_size * size_ratio);
+				info->protect[sect_cnt] = flash_isset(info, sect_cnt, FLASH_OFFSET_PROTECT, FLASH_STATUS_PROTECT);
+				sect_cnt++;
+			}
+		}
+
+		info->sector_count = sect_cnt;
+		/* multiply the size by the number of chips */
+		info->size = (1 << flash_read_uchar(info, FLASH_OFFSET_SIZE)) * size_ratio;
+		info->buffer_size = (1 << flash_read_ushort(info, 0, FLASH_OFFSET_BUFFER_SIZE));
+		tmp = 1 << flash_read_uchar(info, FLASH_OFFSET_ETOUT);
+		info->erase_blk_tout = (tmp * (1 << flash_read_uchar(info, FLASH_OFFSET_EMAX_TOUT)));
+		tmp = 1 << flash_read_uchar(info, FLASH_OFFSET_WBTOUT);
+		info->buffer_write_tout = (tmp * (1 << flash_read_uchar(info, FLASH_OFFSET_WBMAX_TOUT)));
+		tmp = 1 << flash_read_uchar(info, FLASH_OFFSET_WTOUT);
+		info->write_tout = (tmp * (1 << flash_read_uchar(info, FLASH_OFFSET_WMAX_TOUT)))/ 1000;
+		info->flash_id = FLASH_MAN_CFI;
+	}
+
+	flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
+	return(info->size);
+}
+
+
+/*-----------------------------------------------------------------------
+ */
+static int flash_write_cfiword (flash_info_t *info, ulong dest, cfiword_t cword)
+{
+
+	cfiptr_t ctladdr;
+	cfiptr_t cptr;
+	int flag;
+
+	ctladdr.cp = flash_make_addr(info, 0, 0);
+	cptr.cp = (uchar *)dest;
+
+
+	/* Check if Flash is (sufficiently) erased */
+	switch(info->portwidth) {
+	case FLASH_CFI_8BIT:
+		flag = ((cptr.cp[0] & cword.c) == cword.c);
+		break;
+	case FLASH_CFI_16BIT:
+		flag = ((cptr.wp[0] & cword.w) == cword.w);
+		break;
+	case FLASH_CFI_32BIT:
+		flag = ((cptr.lp[0] & cword.l)	== cword.l);
+		break;
+	default:
+		return 2;
+	}
+	if(!flag)
+		return 2;
+
+	/* Disable interrupts which might cause a timeout here */
+	flag = disable_interrupts();
+
+	flash_write_cmd(info, 0, 0, FLASH_CMD_CLEAR_STATUS);
+	flash_write_cmd(info, 0, 0, FLASH_CMD_WRITE);
+
+	switch(info->portwidth) {
+	case FLASH_CFI_8BIT:
+		cptr.cp[0] = cword.c;
+		break;
+	case FLASH_CFI_16BIT:
+		cptr.wp[0] = cword.w;
+		break;
+	case FLASH_CFI_32BIT:
+		cptr.lp[0] = cword.l;
+		break;
+	}
+
+	/* re-enable interrupts if necessary */
+	if(flag)
+		enable_interrupts();
+
+	return flash_full_status_check(info, 0, info->write_tout, "write");
+}
+
+#ifdef CFG_FLASH_USE_BUFFER_WRITE
+
+/* loop through the sectors from the highest address
+ * when the passed address is greater or equal to the sector address
+ * we have a match
+ */
+static int find_sector(flash_info_t *info, ulong addr)
+{
+	int sector;
+	for(sector = info->sector_count - 1; sector >= 0; sector--) {
+		if(addr >= info->start[sector]) 
+			break;
+	}
+	return sector;
+}
+
+static int flash_write_cfibuffer(flash_info_t * info, ulong dest, uchar * cp, int len)
+{
+	
+	int sector;
+	int cnt;
+	int retcode;
+	volatile cfiptr_t src;
+	volatile cfiptr_t dst;
+
+	src.cp = cp;
+	dst.cp = (uchar *)dest;
+	sector = find_sector(info, dest);
+	flash_write_cmd(info, sector, 0, FLASH_CMD_CLEAR_STATUS);
+	flash_write_cmd(info, sector, 0, FLASH_CMD_WRITE_TO_BUFFER);
+	if((retcode = flash_status_check(info, sector, info->buffer_write_tout,
+					 "write to buffer")) == ERR_OK) {
+		switch(info->portwidth) {
+		case FLASH_CFI_8BIT:
+			cnt = len;
+			break;
+		case FLASH_CFI_16BIT:
+			cnt = len >> 1;
+			break;
+		case FLASH_CFI_32BIT:
+			cnt = len >> 2;
+			break;
+		default:
+			return ERR_INVAL;
+			break;
+		}
+		flash_write_cmd(info, sector, 0, (uchar)cnt-1);
+		while(cnt-- > 0) {
+			switch(info->portwidth) {
+			case FLASH_CFI_8BIT:
+				*dst.cp++ = *src.cp++;
+				break;
+			case FLASH_CFI_16BIT:
+				*dst.wp++ = *src.wp++;
+				break;
+			case FLASH_CFI_32BIT:
+				*dst.lp++ = *src.lp++;
+				break;
+			default:
+				return ERR_INVAL;
+				break;
+			}
+		}
+		flash_write_cmd(info, sector, 0, FLASH_CMD_WRITE_BUFFER_CONFIRM);
+		retcode = flash_full_status_check(info, sector, info->buffer_write_tout,
+					     "buffer write");
+	} 
+	flash_write_cmd(info, sector, 0, FLASH_CMD_CLEAR_STATUS);
+	return retcode;
+}	
+#endif /* CFG_USE_FLASH_BUFFER_WRITE */
--- a/board/esd/pmc405/u-boot.lds
+++ b/board/esd/pmc405/u-boot.lds
@@ -0,0 +1,142 @@
+/*
+ * (C) Copyright 2000, 2001
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_ARCH(powerpc)
+SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
+/* Do we need any of these for elf?
+   __DYNAMIC = 0;    */
+SECTIONS
+{
+  .resetvec 0xFFFFFFFC :
+  {
+    *(.resetvec)
+  } = 0xffff
+
+  /* Read-only sections, merged into text segment: */
+  . = + SIZEOF_HEADERS;
+  .interp : { *(.interp) }
+  .hash          : { *(.hash)		}
+  .dynsym        : { *(.dynsym)		}
+  .dynstr        : { *(.dynstr)		}
+  .rel.text      : { *(.rel.text)		}
+  .rela.text     : { *(.rela.text) 	}
+  .rel.data      : { *(.rel.data)		}
+  .rela.data     : { *(.rela.data) 	}
+  .rel.rodata    : { *(.rel.rodata) 	}
+  .rela.rodata   : { *(.rela.rodata) 	}
+  .rel.got       : { *(.rel.got)		}
+  .rela.got      : { *(.rela.got)		}
+  .rel.ctors     : { *(.rel.ctors)	}
+  .rela.ctors    : { *(.rela.ctors)	}
+  .rel.dtors     : { *(.rel.dtors)	}
+  .rela.dtors    : { *(.rela.dtors)	}
+  .rel.bss       : { *(.rel.bss)		}
+  .rela.bss      : { *(.rela.bss)		}
+  .rel.plt       : { *(.rel.plt)		}
+  .rela.plt      : { *(.rela.plt)		}
+  .init          : { *(.init)	}
+  .plt : { *(.plt) }
+  .text      :
+  {
+    /* WARNING - the following is hand-optimized to fit within	*/
+    /* the sector layout of our flash chips!	XXX FIXME XXX	*/
+
+    cpu/ppc4xx/start.o	(.text)
+    cpu/ppc4xx/traps.o	(.text)
+    cpu/ppc4xx/interrupts.o	(.text)
+    cpu/ppc4xx/serial.o	(.text)
+    cpu/ppc4xx/cpu_init.o	(.text)
+    cpu/ppc4xx/speed.o	(.text)
+    cpu/ppc4xx/405gp_enet.o	(.text)
+    common/dlmalloc.o	(.text)
+    lib_generic/crc32.o		(.text)
+    lib_ppc/extable.o	(.text)
+    lib_generic/zlib.o		(.text)
+
+/*    . = env_offset;*/
+/*    common/environment.o(.text)*/
+
+    *(.text)
+    *(.fixup)
+    *(.got1)
+  }
+  _etext = .;
+  PROVIDE (etext = .);
+  .rodata    :
+  {
+    *(.rodata)
+    *(.rodata1)
+  }
+  .fini      : { *(.fini)    } =0
+  .ctors     : { *(.ctors)   }
+  .dtors     : { *(.dtors)   }
+
+  /* Read-write section, merged into data segment: */
+  . = (. + 0x00FF) & 0xFFFFFF00;
+  _erotext = .;
+  PROVIDE (erotext = .);
+  .reloc   :
+  {
+    *(.got)
+    _GOT2_TABLE_ = .;
+    *(.got2)
+    _FIXUP_TABLE_ = .;
+    *(.fixup)
+  }
+  __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
+  __fixup_entries = (. - _FIXUP_TABLE_)>>2;
+
+  .data    :
+  {
+    *(.data)
+    *(.data1)
+    *(.sdata)
+    *(.sdata2)
+    *(.dynamic)
+    CONSTRUCTORS
+  }
+  _edata  =  .;
+  PROVIDE (edata = .);
+
+  __start___ex_table = .;
+  __ex_table : { *(__ex_table) }
+  __stop___ex_table = .;
+
+  . = ALIGN(256);
+  __init_begin = .;
+  .text.init : { *(.text.init) }
+  .data.init : { *(.data.init) }
+  . = ALIGN(256);
+  __init_end = .;
+
+  __bss_start = .;
+  .bss       :
+  {
+   *(.sbss) *(.scommon)
+   *(.dynbss)
+   *(.bss)
+   *(COMMON)
+  }
+  _end = . ;
+  PROVIDE (end = .);
+}
--- a/board/esteem192e/flash.c
+++ b/board/esteem192e/flash.c
@@ -104,7 +104,7 @@ unsigned long flash_init (void)
 	/* monitor protection ON by default */
 	(void)flash_protect(FLAG_PROTECT_SET,
 			    CFG_MONITOR_BASE,
-			    CFG_MONITOR_BASE+CFG_MONITOR_LEN-1,
+			    CFG_MONITOR_BASE+monitor_flash_len-1,
 			    &flash_info[0]);
 #endif

@@ -124,7 +124,7 @@ unsigned long flash_init (void)
 		/* monitor protection ON by default */
 		(void)flash_protect(FLAG_PROTECT_SET,
 				    CFG_MONITOR_BASE,
-				    CFG_MONITOR_BASE+CFG_MONITOR_LEN-1,
+				    CFG_MONITOR_BASE+monitor_flash_len-1,
 				    &flash_info[1]);
 #endif
 	} else {
--- a/board/etx094/flash.c
+++ b/board/etx094/flash.c
@@ -91,7 +91,7 @@ unsigned long flash_init (void)
 	/* monitor protection ON by default */
 	flash_protect(FLAG_PROTECT_SET,
 		      CFG_MONITOR_BASE,
-		      CFG_MONITOR_BASE+CFG_MONITOR_LEN-1,
+		      CFG_MONITOR_BASE+monitor_flash_len-1,
 		      &flash_info[0]);
 #endif

@@ -115,7 +115,7 @@ unsigned long flash_init (void)
 		/* monitor protection ON by default */
 		flash_protect(FLAG_PROTECT_SET,
 			      CFG_MONITOR_BASE,
-			      CFG_MONITOR_BASE+CFG_MONITOR_LEN-1,
+			      CFG_MONITOR_BASE+monitor_flash_len-1,
 			      &flash_info[1]);
 #endif
 	} else {
--- a/board/fads/flash.c
+++ b/board/fads/flash.c
@@ -112,7 +112,7 @@ unsigned long flash_init (void)
 		/* monitor protection ON by default */
 		flash_protect(FLAG_PROTECT_SET,
 			      CFG_MONITOR_BASE,
-			      CFG_MONITOR_BASE+CFG_MONITOR_LEN-1,
+			      CFG_MONITOR_BASE+monitor_flash_len-1,
 			      &flash_info[i]);
 #endif

--- a/board/flagadm/flash.c
+++ b/board/flagadm/flash.c
@@ -77,7 +77,7 @@ unsigned long flash_init (void)
 	/* monitor protection ON by default */
 	flash_protect(FLAG_PROTECT_SET,
 		      CFG_MONITOR_BASE,
-		      CFG_MONITOR_BASE+CFG_MONITOR_LEN-1,
+		      CFG_MONITOR_BASE+monitor_flash_len-1,
 		      &flash_info[0]);
 #endif

--- a/board/gen860t/flash.c
+++ b/board/gen860t/flash.c
@@ -157,7 +157,7 @@ flash_init (void)
 	 */
 	flash_protect(FLAG_PROTECT_SET,
 		      	  CFG_MONITOR_BASE,
-		      	  CFG_MONITOR_BASE + CFG_MONITOR_LEN - 1,
+		      	  CFG_MONITOR_BASE + monitor_flash_len - 1,
 		      	  &flash_info[0]);
 #endif

--- a/board/genietv/flash.c
+++ b/board/genietv/flash.c
@@ -55,7 +55,7 @@ unsigned long flash_init (void)
 	/* Monitor protection ON by default */
 	flash_protect(FLAG_PROTECT_SET,
 		      CFG_MONITOR_BASE,
-		      CFG_MONITOR_BASE+CFG_MONITOR_LEN-1,
+		      CFG_MONITOR_BASE+monitor_flash_len-1,
 		      &flash_info[0]);
 #endif

--- a/board/gth/flash.c
+++ b/board/gth/flash.c
@@ -102,7 +102,7 @@ unsigned long flash_init (void)
 	  /* monitor protection ON by default */
 	  (void)flash_protect(FLAG_PROTECT_SET,
 			    CFG_MONITOR_BASE,
-			    CFG_MONITOR_BASE+CFG_MONITOR_LEN-1,
+			    CFG_MONITOR_BASE+monitor_flash_len-1,
 			    &flash_info[0]);
 #endif

@@ -121,7 +121,7 @@ unsigned long flash_init (void)
 		/* monitor protection ON by default */
 		(void)flash_protect(FLAG_PROTECT_SET,
 				    CFG_MONITOR_BASE,
-				    CFG_MONITOR_BASE+CFG_MONITOR_LEN-1,
+				    CFG_MONITOR_BASE+monitor_flash_len-1,
 				    &flash_info[1]);
 #endif
 	}
--- a/board/gw8260/flash.c
+++ b/board/gw8260/flash.c
@@ -96,7 +96,7 @@ unsigned long flash_init (void)
 #if CFG_MONITOR_BASE >= CFG_FLASH0_BASE
    flash_protect(FLAG_PROTECT_SET,
 		  CFG_MONITOR_BASE,
-		  CFG_MONITOR_BASE+CFG_MONITOR_LEN-1,
+		  CFG_MONITOR_BASE+monitor_flash_len-1,
 		  &flash_info[0]);
 #endif

--- a/board/hermes/flash.c
+++ b/board/hermes/flash.c
@@ -71,7 +71,7 @@ unsigned long flash_init (void)
 	/* monitor protection ON by default */
 	flash_protect(FLAG_PROTECT_SET,
 		      CFG_MONITOR_BASE,
-		      CFG_MONITOR_BASE+CFG_MONITOR_LEN-1,
+		      CFG_MONITOR_BASE+monitor_flash_len-1,
 		      &flash_info[0]);
 #endif

--- a/board/hymod/Makefile
+++ b/board/hymod/Makefile
@@ -25,7 +25,7 @@ include $(TOPDIR)/config.mk

 LIB	= lib$(BOARD).a

-OBJS	= $(BOARD).o flash.o bsp.o eeprom.o fetch.o
+OBJS	= $(BOARD).o flash.o bsp.o eeprom.o fetch.o input.o env.o

 $(LIB):	.depend $(OBJS)
 	$(AR) crv $@ $^
--- a/board/hymod/bsp.c
+++ b/board/hymod/bsp.c
@@ -20,13 +20,12 @@
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 *
- * hacked for Hymod FPGA support by Murray.Jensen@cmst.csiro.au, 29-Jan-01
+ * hacked for Hymod FPGA support by Murray.Jensen@csiro.au, 29-Jan-01
 */

 #include <common.h>
 #include <command.h>
 #include <net.h>
-#include <i2c.h>
 #include <asm/iopin_8260.h>
 #include <cmd_bsp.h>

@@ -74,28 +73,29 @@
 *     has not worked (wait several ms?)
 */

-int fpga_load (int mezz, uchar * addr, ulong size)
+int
+fpga_load (int mezz, uchar *addr, ulong size)
 {
 	DECLARE_GLOBAL_DATA_PTR;

 	hymod_conf_t *cp = &gd->bd->bi_hymod_conf;
+	xlx_info_t *fp;
 	xlx_iopins_t *fpgaio;
 	volatile uchar *fpgabase;
 	volatile uint cnt;
 	uchar *eaddr = addr + size;
 	int result;

-	if (mezz) {
-		if (!cp->mezz.mmap[0].prog.exists)
-			return (LOAD_FAIL_NOCONF);
-		fpgabase = (uchar *) cp->mezz.mmap[0].prog.base;
-		fpgaio = &cp->mezz.iopins[0];
-	} else {
-		if (!cp->main.mmap[0].prog.exists)
-			return (LOAD_FAIL_NOCONF);
-		fpgabase = (uchar *) cp->main.mmap[0].prog.base;
-		fpgaio = &cp->main.iopins[0];
-	}
+	if (mezz)
+		fp = &cp->mezz.xlx[0];
+	else
+		fp = &cp->main.xlx[0];
+
+	if (!fp->mmap.prog.exists)
+		return (LOAD_FAIL_NOCONF);
+
+	fpgabase = (uchar *)fp->mmap.prog.base;
+	fpgaio = &fp->iopins;

 	/* set enable HIGH if required */
 	if (fpgaio->enable_pin.flag)
@@ -106,7 +106,7 @@ int fpga_load (int mezz, uchar * addr, ulong size)

 	/* toggle PROG Low then High (will already be Low after Power-On) */
 	iopin_set_low (&fpgaio->prog_pin);
-	udelay (1);					/* minimum 300ns - 1usec should do it */
+	udelay (1);	/* minimum 300ns - 1usec should do it */
 	iopin_set_high (&fpgaio->prog_pin);

 	/* wait for INIT High */
@@ -157,15 +157,15 @@ do_fpga (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
 	case 2:
 		if (strcmp (argv[1], "info") == 0) {
 			printf ("\nHymod FPGA Info...\n");
-			printf ("				Address		Size\n");
-			printf ("	Main Configuration:	0x%08x	%d\n",
-					FPGA_MAIN_CFG_BASE, FPGA_MAIN_CFG_SIZE);
-			printf ("	Main Register:		0x%08x	%d\n",
-					FPGA_MAIN_REG_BASE, FPGA_MAIN_REG_SIZE);
-			printf ("	Main Port:		0x%08x	%d\n",
-					FPGA_MAIN_PORT_BASE, FPGA_MAIN_PORT_SIZE);
-			printf ("	Mezz Configuration:	0x%08x	%d\n",
-					FPGA_MEZZ_CFG_BASE, FPGA_MEZZ_CFG_SIZE);
+			printf ("\t\t\t\tAddress\t\tSize\n");
+			printf ("\tMain Configuration:\t0x%08x\t%d\n",
+				FPGA_MAIN_CFG_BASE, FPGA_MAIN_CFG_SIZE);
+			printf ("\tMain Register:\t\t0x%08x\t%d\n",
+				FPGA_MAIN_REG_BASE, FPGA_MAIN_REG_SIZE);
+			printf ("\tMain Port:\t\t0x%08x\t%d\n",
+				FPGA_MAIN_PORT_BASE, FPGA_MAIN_PORT_SIZE);
+			printf ("\tMezz Configuration:\t0x%08x\t%d\n",
+				FPGA_MEZZ_CFG_BASE, FPGA_MEZZ_CFG_SIZE);
 			return 0;
 		}
 		break;
@@ -176,18 +176,21 @@ do_fpga (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])

 			save_addr = addr;
 #if 0
-			/* reading config data unimplemented */
-			while VM
-			  :more config data * addr++ = *fpga;
-		  result = VM:? ? ?
+			/* fpga readback unimplemented */
+			while (more readback data)
+				*addr++ = *fpga;
+			result = error ? STORE_FAIL_XXX : STORE_SUCCESS;
 #else
-			result = 0;
+			result = STORE_SUCCESS;
 #endif
+
 			if (result == STORE_SUCCESS) {
-				printf ("SUCCEEDED (%d bytes)\n", addr - save_addr);
+				printf ("SUCCEEDED (%d bytes)\n",
+					addr - save_addr);
 				return 0;
 			} else
-				printf ("FAILED (%d bytes)\n", addr - save_addr);
+				printf ("FAILED (%d bytes)\n",
+					addr - save_addr);
 			return 1;
 		}
 		break;
@@ -196,25 +199,32 @@ do_fpga (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
 		if (strcmp (argv[1], "tftp") == 0) {
 			copy_filename (BootFile, argv[2], sizeof (BootFile));
 			load_addr = simple_strtoul (argv[3], NULL, 16);
+			NetBootFileXferSize = 0;

 			if (NetLoop (TFTP) <= 0) {
-				printf ("tftp transfer failed - aborting fgpa load\n");
+				printf ("tftp transfer failed - aborting "
+					"fgpa load\n");
 				return 1;
 			}

 			if (NetBootFileXferSize == 0) {
-				printf ("can't determine file size - aborting fpga load\n");
+				printf ("can't determine file size - "
+					"aborting fpga load\n");
 				return 1;
 			}

-			printf ("File transfer succeeded - beginning fpga load...");
+			printf ("File transfer succeeded - "
+				"beginning fpga load...");

 			result = fpga_load (0, (uchar *) load_addr,
-								NetBootFileXferSize);
+				NetBootFileXferSize);
+
 			if (result == LOAD_SUCCESS) {
 				printf ("SUCCEEDED\n");
 				return 0;
-			} else if (result == LOAD_FAIL_NOINIT)
+			} else if (result == LOAD_FAIL_NOCONF)
+				printf ("FAILED (no CONF)\n");
+			else if (result == LOAD_FAIL_NOINIT)
 				printf ("FAILED (no INIT)\n");
 			else
 				printf ("FAILED (no DONE)\n");
@@ -231,7 +241,8 @@ do_fpga (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
 				else if (strcmp (argv[2], "mezz") == 0)
 					mezz = 1;
 				else {
-					printf ("FPGA type must be either `main' or `mezz'\n");
+					printf ("FPGA type must be either "
+						"`main' or `mezz'\n");
 					return 1;
 				}
 				arg = 3;
@@ -239,14 +250,18 @@ do_fpga (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
 				mezz = 0;
 				arg = 2;
 			}
+
 			addr = (uchar *) simple_strtoul (argv[arg++], NULL, 16);
 			size = (ulong) simple_strtoul (argv[arg], NULL, 16);

 			result = fpga_load (mezz, addr, size);
+
 			if (result == LOAD_SUCCESS) {
 				printf ("SUCCEEDED\n");
 				return 0;
-			} else if (result == LOAD_FAIL_NOINIT)
+			} else if (result == LOAD_FAIL_NOCONF)
+				printf ("FAILED (no CONF)\n");
+			else if (result == LOAD_FAIL_NOINIT)
 				printf ("FAILED (no INIT)\n");
 			else
 				printf ("FAILED (no DONE)\n");
@@ -267,22 +282,21 @@ int
 do_eecl (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
 {
 	uchar data[HYMOD_EEPROM_SIZE];
-	uint offset;
-	int rcode = 0;
+	uint addr = CFG_I2C_EEPROM_ADDR;

 	switch (argc) {

 	case 1:
-		offset = HYMOD_EEOFF_MAIN;
+		addr |= HYMOD_EEOFF_MAIN;
 		break;

 	case 2:
 		if (strcmp (argv[1], "main") == 0) {
-			offset = HYMOD_EEOFF_MAIN;
+			addr |= HYMOD_EEOFF_MAIN;
 			break;
 		}
 		if (strcmp (argv[1], "mezz") == 0) {
-			offset = HYMOD_EEOFF_MEZZ;
+			addr |= HYMOD_EEOFF_MEZZ;
 			break;
 		}
 		/* fall through ... */
@@ -293,15 +307,77 @@ do_eecl (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
 	}

 	memset (data, 0, HYMOD_EEPROM_SIZE);
-	if (i2c_write
-		(CFG_I2C_EEPROM_ADDR | offset, 0, CFG_I2C_EEPROM_ADDR_LEN, data,
-		 HYMOD_EEPROM_SIZE)) {
-		rcode = 1;
-	}

-	return rcode;
+	eeprom_write (addr, 0, data, HYMOD_EEPROM_SIZE);
+
+	return 0;
 }

-#endif							/* CFG_CMD_BSP */
+/* ------------------------------------------------------------------------- */
+
+#if 0
+static uchar test_bitfile[] = {
+	/* one day ... */
+};
+#endif
+
+int
+do_htest (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+{
+#if 0
+	int rc;
+#endif
+#ifdef CONFIG_ETHER_LOOPBACK_TEST
+	extern void eth_loopback_test (void);
+#endif /* CONFIG_ETHER_LOOPBACK_TEST */
+
+	printf ("HYMOD tests - ensure loopbacks etc. are connected\n\n");
+
+#if 0
+	/* Load FPGA with test program */
+
+	printf ("Loading test FPGA program ...");
+
+	rc = fpga_load (0, test_bitfile, sizeof (test_bitfile));
+
+	switch (rc) {
+
+	case LOAD_SUCCESS:
+		printf (" SUCCEEDED\n");
+		break;
+
+	case LOAD_FAIL_NOCONF:
+		printf (" FAILED (no configuration space defined)\n");
+		return 1;
+
+	case LOAD_FAIL_NOINIT:
+		printf (" FAILED (timeout - no INIT signal seen)\n");
+		return 1;
+
+	case LOAD_FAIL_NODONE:
+		printf (" FAILED (timeout - no DONE signal seen)\n");
+		return 1;
+
+	default:
+		printf (" FAILED (unknown return code from fpga_load\n");
+		return 1;
+	}
+
+	/* run Local Bus <=> Xilinx tests */
+
+	/* tell Xilinx to run ZBT Ram, High Speed serial and Mezzanine tests */
+
+	/* run SDRAM test */
+#endif
+
+#ifdef CONFIG_ETHER_LOOPBACK_TEST
+	/* run Ethernet test */
+	eth_loopback_test ();
+#endif /* CONFIG_ETHER_LOOPBACK_TEST */
+
+	return 0;
+}
+
+#endif	/* CFG_CMD_BSP */

 /* ------------------------------------------------------------------------- */
--- a/board/hymod/config.mk
+++ b/board/hymod/config.mk
@@ -27,6 +27,6 @@

 TEXT_BASE = 0x40000000

-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)
+PLATFORM_CPPFLAGS += -I$(TOPDIR)

-OBJCFLAGS = --set-section-flags=.ppcenv=contents,alloc,load,data
+OBJCFLAGS = --remove-section=.ppcenv
--- a/board/hymod/eeprom.c
+++ b/board/hymod/eeprom.c
--- a/board/hymod/env.c
+++ b/board/hymod/env.c
@@ -0,0 +1,236 @@
+/*
+ * (C) Copyright 2003
+ * Murray Jensen, CSIRO-MIT, <Murray.Jensen@csiro.au>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+
+/* imports from fetch.c */
+extern int fetch_and_parse (char *, ulong, int (*)(uchar *, uchar *));
+
+/* this is relative to the root of the server's tftp directory */
+static char *def_global_env_path = "/hymod/global_env";
+
+static int
+env_callback (uchar *name, uchar *value)
+{
+	DECLARE_GLOBAL_DATA_PTR;
+
+	hymod_conf_t *cp = &gd->bd->bi_hymod_conf;
+	char ov[CFG_CBSIZE], nv[CFG_CBSIZE], *p, *q, *nn, c, *curver, *newver;
+	int override = 1, append = 0, remove = 0, nnl, ovl, nvl;
+
+	nn = name;
+
+	if (*nn == '-') {
+		override = 0;
+		nn++;
+	}
+
+	while (*nn == ' ' || *nn == '\t')
+		nn++;
+
+	if ((nnl = strlen (nn)) == 0) {
+		printf ("Empty name in global env file\n");
+		return (0);
+	}
+
+	if ((c = nn[nnl - 1]) == '+' || c == '-') {
+		if (c == '+')
+			append = 1;
+		else
+			remove = 1;
+		nn[--nnl] = '\0';
+	}
+
+	while (nnl > 0 && ((c = nn[nnl - 1]) == ' ' || c == '\t'))
+		nn[--nnl] = '\0';
+	if (nnl == 0) {
+		printf ("Empty name in global env file\n");
+		return (0);
+	}
+
+	p = value;
+	q = nv;
+
+	while ((c = *p) == ' ' || c == '\t')
+		p++;
+
+	nvl = strlen (p);
+	while (nvl > 0 && ((c = p[nvl - 1]) == ' ' || c == '\t'))
+		p[--nvl] = '\0';
+
+	while ((*q = *p++) != '\0') {
+		if (*q == '%') {
+			switch (*p++) {
+
+			case '\0':	/* whoops - back up */
+				p--;
+				break;
+
+			case '%':	/* a single percent character */
+				q++;
+				break;
+
+			case 's':	/* main board serial number as string */
+				q += sprintf (q, "%010lu",
+					cp->main.eeprom.serno);
+				break;
+
+			case 'S':	/* main board serial number as number */
+				q += sprintf (q, "%lu", cp->main.eeprom.serno);
+				break;
+
+			default:	/* ignore any others */
+				break;
+			}
+		}
+		else
+			q++;
+	}
+
+	if ((nvl = q - nv) == 0) {
+		setenv (nn, NULL);
+		return (1);
+	}
+
+	if ((curver = getenv ("global_env_version")) == NULL)
+		curver = "unknown";
+
+	if ((newver = getenv ("new_genv_version")) == NULL || \
+	    strcmp (curver, newver) == 0) {
+		if (strcmp (nn, "version") == 0)
+			setenv ("new_genv_version", nv);
+		return (1);
+	}
+
+	if ((p = getenv (nn)) != NULL) {
+
+		strcpy (ov, p);
+		ovl = strlen (ov);
+
+		if (append) {
+
+			if (strstr (ov, nv) == NULL) {
+
+				printf ("Appending '%s' to env var '%s'\n",
+					nv, nn);
+
+				while (nvl >= 0) {
+					nv[ovl + 1 + nvl] = nv[nvl];
+					nvl--;
+				}
+
+				nv[ovl] = ' ';
+
+				while (--ovl >= 0)
+					nv[ovl] = ov[ovl];
+
+				setenv (nn, nv);
+			}
+
+			return (1);
+		}
+
+		if (remove) {
+
+			if (strstr (ov, nv) != NULL) {
+
+				printf ("Removing '%s' from env var '%s'\n",
+					nv, nn);
+
+				while ((p = strstr (ov, nv)) != NULL) {
+					q = p + nvl;
+					if (*q == ' ')
+						q++;
+					strcpy(p, q);
+				}
+
+				setenv (nn, ov);
+			}
+
+			return (1);
+		}
+
+		if (!override || strcmp (ov, nv) == 0)
+			return (1);
+
+		printf ("Re-setting env cmd '%s' from '%s' to '%s'\n",
+			nn, ov, nv);
+	}
+	else
+		printf ("Setting env cmd '%s' to '%s'\n", nn, nv);
+
+	setenv (nn, nv);
+	return (1);
+}
+
+void
+hymod_check_env (void)
+{
+	char *p, *path, *curver, *newver;
+	int firsttime = 0, needsave = 0;
+
+	if (getenv ("global_env_loaded") == NULL) {
+		puts ("*** global environment has never been loaded\n");
+		puts ("*** fetching from server");
+		firsttime = 1;
+	}
+	else if ((p = getenv ("always_check_env")) != NULL &&
+	    strcmp (p, "yes") == 0)
+		puts ("*** checking for updated global environment");
+	else
+		return;
+
+	puts (" (Control-C to Abort)\n");
+
+	if ((path = getenv ("global_env_path")) == NULL || *path == '\0')
+		path = def_global_env_path;
+
+	if (fetch_and_parse (path, CFG_LOAD_ADDR, env_callback) == 0) {
+		puts ("*** Fetch of global environment failed!\n");
+		return;
+	}
+
+	if ((newver = getenv ("new_genv_version")) == NULL) {
+		puts ("*** Version number not set - contents ignored!\n");
+		return;
+	}
+
+	if ((curver = getenv ("global_env_version")) == NULL || \
+	    strcmp (curver, newver) != 0) {
+		setenv ("global_env_version", newver);
+		needsave = 1;
+	}
+	else
+		printf ("*** Global environment up-to-date (ver %s)\n", curver);
+
+	setenv ("new_genv_version", NULL);
+
+	if (firsttime) {
+		setenv ("global_env_loaded", "yes");
+		needsave = 1;
+	}
+
+	if (needsave)
+		puts ("\n*** Remember to run the 'saveenv' "
+			"command to save the changes\n\n");
+}
--- a/board/hymod/fetch.c
+++ b/board/hymod/fetch.c
@@ -1,7 +1,6 @@
 /*
 * (C) Copyright 2001
- * Murray Jensen, CSIRO Manufacturing Science and Technology,
- * <Murray.Jensen@cmst.csiro.au>
+ * Murray Jensen, CSIRO-MIT, <Murray.Jensen@csiro.au>
 *
 * See file CREDITS for list of people who contributed to this
 * project.
@@ -25,118 +24,84 @@
 #include <common.h>
 #include <net.h>

-/* imports from common/main.c */
-extern char console_buffer[CFG_CBSIZE];
+/* imports from input.c */
+extern int hymod_get_ethaddr (void);

 int
-fetch_and_parse(bd_t *bd, char *fn, ulong addr, int (*cback)(uchar *, uchar *))
+fetch_and_parse (char *fn, ulong addr, int (*cback)(uchar *, uchar *))
 {
-    char *ethaddr;
-    uchar *fp, *efp;
+	char *ethaddr;
+	uchar *fp, *efp;
+	int rc, count = 0;

-    while ((ethaddr = getenv("ethaddr")) == NULL || *ethaddr == '\0') {
+	while ((ethaddr = getenv ("ethaddr")) == NULL || *ethaddr == '\0') {

-	puts("*** Ethernet address is not set\n");
+		printf ("*** Ethernet address is%s not set\n",
+			count == 0 ? "" : " STILL");

-	for (;;) {
-	    int n;
+		if ((rc = hymod_get_ethaddr ()) < 0) {
+			if (rc == -1)
+				puts ("\n*** interrupted!");
+			else
+				puts ("\n*** timeout!");
+			printf (" - fetch of '%s' aborted\n", fn);
+			return (0);
+		}

-	    n = readline("Enter board ethernet address: ");
+		count++;
+	}

-	    if (n < 0) {
-		puts("\n");
+	copy_filename (BootFile, fn, sizeof (BootFile));
+	load_addr = addr;
+	NetBootFileXferSize = 0;
+
+	if (NetLoop (TFTP) == 0) {
+		printf ("tftp transfer of file '%s' failed\n", fn);
 		return (0);
-	    }
-
-	    if (n == 0)
-		continue;
-
-	    if (n == 17) {
-		int i;
-		char *p, *q;
-		uchar ea[6];
-
-		/* see if it looks like an ethernet address */
-
-		p = console_buffer;
-
-		for (i = 0; i < 6; i++) {
-		    char term = (i == 5 ? '\0' : ':');
-
-		    ea[i] = simple_strtol(p, &q, 16);
-
-		    if ((q - p) != 2 || *q++ != term)
-			break;
-
-		    p = q;
-		}
-
-		if (i == 6) {
-		    /* it looks ok - set it */
-		    printf("Setting ethernet address to %s\n", console_buffer);
-		    setenv("ethaddr", console_buffer);
-
-		    puts("Remember to do a 'saveenv' to make it permanent\n");
-		    break;
-		}
-	    }
-
-	    printf("Invalid ethernet address (%s) - please re-enter\n",
-		console_buffer);
-	}
-    }
-
-    copy_filename(BootFile, fn, sizeof (BootFile));
-    load_addr = addr;
-
-    if (NetLoop(TFTP) <= 0) {
-	printf("tftp transfer of file '%s' failed\n", fn);
-	return (0);
-    }
-
-    if (NetBootFileXferSize == 0) {
-	printf("can't determine size of file '%s'\n", fn);
-	return (0);
-    }
-
-    fp = (uchar *)load_addr;
-    efp = fp + NetBootFileXferSize;
-
-    do {
-	uchar *name, *value;
-
-	if (*fp == '#' || *fp == '\n') {
-	    while (fp < efp && *fp++ != '\n')
-		;
-	    continue;
 	}

-	name = fp;
+	if (NetBootFileXferSize == 0) {
+		printf ("can't determine size of file '%s'\n", fn);
+		return (0);
+	}
+
+	fp = (uchar *)load_addr;
+	efp = fp + NetBootFileXferSize;
+
+	do {
+		uchar *name, *value;
+
+		if (*fp == '#' || *fp == '\n') {
+			/* skip this line */
+			while (fp < efp && *fp++ != '\n')
+				;
+			continue;
+		}

-	while (fp < efp && *fp != '=')
-	    if (*fp++ == '\n')
 		name = fp;

-	if (fp >= efp)
-	    break;
+		while (fp < efp && *fp != '=' && *fp != '\n')
+			fp++;
+		if (fp >= efp)
+			break;
+		if (*fp == '\n') {
+			fp++;
+			continue;
+		}
+		*fp++ = '\0';

-	*fp++ = '\0';
+		value = fp;

-	value = fp;
+		while (fp < efp && *fp != '\n')
+			fp++;
+		if (fp[-1] == '\r')
+			fp[-1] = '\0';
+		*fp++ = '\0';	/* ok if we go off the end here */

-	while (fp < efp && *fp != '\n')
-	    fp++;
+		if ((*cback)(name, value) == 0)
+			return (0);

-	/* ok if we go off the end here */
+	} while (fp < efp);

-	if (fp[-1] == '\r')
-	    fp[-1] = '\0';
-	*fp++ = '\0';
-
-	if ((*cback)(name, value) == 0)
-	    return (0);
-
-    } while (fp < efp);
-
-    return (1);
+	return (1);
 }
--- a/board/hymod/flash.c
+++ b/board/hymod/flash.c
@@ -20,7 +20,7 @@
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 *
- * Hacked for the Hymod board by Murray.Jensen@cmst.csiro.au, 20-Oct-00
+ * Hacked for the Hymod board by Murray.Jensen@csiro.au, 20-Oct-00
 */

 #include <common.h>
@@ -35,235 +35,155 @@ flash_info_t flash_info[CFG_MAX_FLASH_BANKS];	/* info for FLASH chips */
 #define FLAG_PROTECT_SET	0x01
 #define FLAG_PROTECT_CLEAR	0x02

-/*-----------------------------------------------------------------------
- * Functions
- */
-#if 0
-static ulong flash_get_size (vu_long *addr, flash_info_t *info);
-static void flash_get_offsets (ulong base, flash_info_t *info);
-#endif
-static int write_word (flash_info_t *info, ulong dest, ulong data);
-
 /*-----------------------------------------------------------------------
 */

 /*
- * probe for the existence of flash at bank word address "addr"
- * 0 = yes, 1 = bad Manufacturer's Id, 2 = bad Device Id
+ * probe for flash bank at address "base" and store info about it
+ * in the flash_info entry "fip". Fatal error if nothing there.
 */
-static int
-bank_probe_word(bank_addr_t addr)
+static void
+bank_probe (flash_info_t *fip, volatile bank_addr_t base)
 {
-	int retval;
+	volatile bank_addr_t addr;
+	bank_word_t word;
+	int i;

 	/* reset the flash */
-	*addr = BANK_CMD_RST;
+	*base = BANK_CMD_RST;

-	/* check the manufacturer id */
-	*addr = BANK_CMD_RD_ID;
-	if (*BANK_ADDR_REG_MAN(addr) != BANK_RD_ID_MAN) {
-		retval = -1;
-		goto out;
-	}
+	/* put flash into read id mode */
+	*base = BANK_CMD_RD_ID;
+
+	/* check the manufacturer id - must be intel */
+	word = *BANK_REG_MAN_CODE (base);
+	if (word != BANK_FILL_WORD (INTEL_MANUFACT&0xff))
+		panic ("\nbad manufacturer's code (0x%08lx) at addr 0x%08lx",
+			(unsigned long)word, (unsigned long)base);

 	/* check the device id */
-	*addr = BANK_CMD_RD_ID;
-	if (*BANK_ADDR_REG_DEV(addr) != BANK_RD_ID_DEV) {
-		retval = -2;
-		goto out;
+	word = *BANK_REG_DEV_CODE (base);
+	switch (word) {
+
+	case BANK_FILL_WORD (INTEL_ID_28F320J5&0xff):
+		fip->flash_id = FLASH_MAN_INTEL | FLASH_28F320J5;
+		fip->sector_count = 32;
+		break;
+
+	case BANK_FILL_WORD (INTEL_ID_28F640J5&0xff):
+		fip->flash_id = FLASH_MAN_INTEL | FLASH_28F640J5;
+		fip->sector_count = 64;
+		break;
+
+	case BANK_FILL_WORD (INTEL_ID_28F320J3A&0xff):
+		fip->flash_id = FLASH_MAN_INTEL | FLASH_28F320J3A;
+		fip->sector_count = 32;
+		break;
+
+	case BANK_FILL_WORD (INTEL_ID_28F640J3A&0xff):
+		fip->flash_id = FLASH_MAN_INTEL | FLASH_28F640J3A;
+		fip->sector_count = 64;
+		break;
+
+	case BANK_FILL_WORD (INTEL_ID_28F128J3A&0xff):
+		fip->flash_id = FLASH_MAN_INTEL | FLASH_28F128J3A;
+		fip->sector_count = 128;
+		break;
+
+	default:
+		panic ("\nbad device code (0x%08lx) at addr 0x%08lx",
+			(unsigned long)word, (unsigned long)base);
 	}

-	retval = CFG_FLASH_TYPE;
-
-out:
-	/* reset the flash again */
-	*addr = BANK_CMD_RST;
-
-	return retval;
-}
-
-/*
- * probe for flash banks at address "base" and store info for any found
- * into flash_info entry "fip". Must find at least one bank.
- */
-static void
-bank_probe(flash_info_t *fip, bank_addr_t base)
-{
-	bank_addr_t addr, eaddr;
-	int nbanks;
-
-	fip->flash_id = FLASH_UNKNOWN;
-	fip->size = 0L;
-	fip->sector_count = 0;
+	if (fip->sector_count >= CFG_MAX_FLASH_SECT)
+		panic ("\ntoo many sectors (%d) in flash at address 0x%08lx",
+			fip->sector_count, (unsigned long)base);

 	addr = base;
-	eaddr = BANK_ADDR_BASE(addr, MAX_BANKS);
-	nbanks = 0;
-
-	while (addr < eaddr) {
-		bank_addr_t addrw, eaddrw, addrb;
-		int i, osc, nsc, curtype = -1;
-
-		addrw = addr;
-		eaddrw = BANK_ADDR_NEXT_WORD(addrw);
-
-		while (addrw < eaddrw) {
-			int thistype;
-
-#ifdef FLASH_DEBUG
-			printf("  probing for flash at addr 0x%08lx\n",
-				(unsigned long)addrw);
-#endif
-			if ((thistype = bank_probe_word(addrw++)) < 0)
-				goto out;
-
-			if (curtype < 0)
-				curtype = thistype;
-			else {
-				if (thistype != curtype) {
-					printf("Differing flash type found!\n");
-					goto out;
-				}
-			}
-		}
-
-		if (curtype < 0)
-			goto out;
-
-		/* bank exists - append info for this bank to *fip */
-		fip->flash_id = FLASH_MAN_INTEL|curtype;
-		fip->size += BANK_SIZE;
-		osc = fip->sector_count;
-		fip->sector_count += BANK_NBLOCKS;
-		if ((nsc = fip->sector_count) >= CFG_MAX_FLASH_SECT)
-			panic("Too many sectors in flash at address 0x%08lx\n",
-				(unsigned long)base);
-
-		addrb = addr;
-		for (i = osc; i < nsc; i++) {
-			fip->start[i] = (ulong)addrb;
-			fip->protect[i] = 0;
-			addrb = BANK_ADDR_NEXT_BLK(addrb);
-		}
-
-		addr = BANK_ADDR_NEXT_BANK(addr);
-		nbanks++;
+	for (i = 0; i < fip->sector_count; i++) {
+		fip->start[i] = (unsigned long)addr;
+		fip->protect[i] = 0;
+		addr = BANK_ADDR_NEXT_BLK (addr);
 	}

-out:
-	if (nbanks == 0)
-		panic("ERROR: no flash found at address 0x%08lx\n",
-			(unsigned long)base);
+	fip->size = (bank_size_t)addr - (bank_size_t)base;
+
+	/* reset the flash */
+	*base = BANK_CMD_RST;
 }

 static void
-bank_reset(flash_info_t *info, int sect)
+bank_reset (flash_info_t *info, int sect)
 {
-	bank_addr_t addrw, eaddrw;
+	volatile bank_addr_t addr = (bank_addr_t)info->start[sect];

-	addrw = (bank_addr_t)info->start[sect];
-	eaddrw = BANK_ADDR_NEXT_WORD(addrw);
-
-	while (addrw < eaddrw) {
 #ifdef FLASH_DEBUG
-		printf("  writing reset cmd to addr 0x%08lx\n",
-			(unsigned long)addrw);
+	printf ("writing reset cmd to addr 0x%08lx\n", (unsigned long)addr);
 #endif
-		*addrw = BANK_CMD_RST;
-		addrw++;
-	}
+
+	*addr = BANK_CMD_RST;
 }

 static void
-bank_erase_init(flash_info_t *info, int sect)
+bank_erase_init (flash_info_t *info, int sect)
 {
-	bank_addr_t addrw, saddrw, eaddrw;
+	volatile bank_addr_t addr = (bank_addr_t)info->start[sect];
 	int flag;

 #ifdef FLASH_DEBUG
-	printf("0x%08lx BANK_CMD_PROG\n", BANK_CMD_PROG);
-	printf("0x%08lx BANK_CMD_ERASE1\n", BANK_CMD_ERASE1);
-	printf("0x%08lx BANK_CMD_ERASE2\n", BANK_CMD_ERASE2);
-	printf("0x%08lx BANK_CMD_CLR_STAT\n", BANK_CMD_CLR_STAT);
-	printf("0x%08lx BANK_CMD_RST\n", BANK_CMD_RST);
-	printf("0x%08lx BANK_STAT_RDY\n", BANK_STAT_RDY);
-	printf("0x%08lx BANK_STAT_ERR\n", BANK_STAT_ERR);
-#endif
-
-	saddrw = (bank_addr_t)info->start[sect];
-	eaddrw = BANK_ADDR_NEXT_WORD(saddrw);
-
-#ifdef FLASH_DEBUG
-	printf("erasing sector %d, start addr = 0x%08lx "
-		"(bank next word addr = 0x%08lx)\n", sect,
-		(unsigned long)saddrw, (unsigned long)eaddrw);
+	printf ("erasing sector %d, addr = 0x%08lx\n",
+		sect, (unsigned long)addr);
 #endif

 	/* Disable intrs which might cause a timeout here */
-	flag = disable_interrupts();
+	flag = disable_interrupts ();

-	for (addrw = saddrw; addrw < eaddrw; addrw++) {
 #ifdef FLASH_DEBUG
-		printf("  writing erase cmd to addr 0x%08lx\n",
-			(unsigned long)addrw);
+	printf ("writing erase cmd to addr 0x%08lx\n", (unsigned long)addr);
 #endif
-		*addrw = BANK_CMD_ERASE1;
-		*addrw = BANK_CMD_ERASE2;
-	}
+	*addr = BANK_CMD_ERASE1;
+	*addr = BANK_CMD_ERASE2;

 	/* re-enable interrupts if necessary */
 	if (flag)
-		enable_interrupts();
+		enable_interrupts ();
 }

 static int
-bank_erase_poll(flash_info_t *info, int sect)
+bank_erase_poll (flash_info_t *info, int sect)
 {
-	bank_addr_t addrw, saddrw, eaddrw;
-	int sectdone, haderr;
-
-	saddrw = (bank_addr_t)info->start[sect];
-	eaddrw = BANK_ADDR_NEXT_WORD(saddrw);
-
-	sectdone = 1;
-	haderr = 0;
-
-	for (addrw = saddrw; addrw < eaddrw; addrw++) {
-		bank_word_t stat = *addrw;
+	volatile bank_addr_t addr = (bank_addr_t)info->start[sect];
+	bank_word_t stat = *addr;

 #ifdef FLASH_DEBUG
-		printf("  checking status at addr "
-			"0x%08lx [0x%08lx]\n",
-			(unsigned long)addrw, stat);
+	printf ("checking status at addr 0x%08lx [0x%08lx]\n",
+		(unsigned long)addr, (unsigned long)stat);
 #endif
-		if ((stat & BANK_STAT_RDY) != BANK_STAT_RDY)
-			sectdone = 0;
-		else if ((stat & BANK_STAT_ERR) != 0) {
-			printf(" failed on sector %d "
-				"(stat = 0x%08lx) at "
-				"address 0x%08lx\n",
-				sect, stat,
-				(unsigned long)addrw);
-			*addrw = BANK_CMD_CLR_STAT;
-			haderr = 1;
-		}
-	}

-	if (haderr)
-		return (-1);
+	if ((stat & BANK_STAT_RDY) == BANK_STAT_RDY) {
+		if ((stat & BANK_STAT_ERR) != 0) {
+			printf ("failed on sector %d [0x%08lx] at "
+				"address 0x%08lx\n", sect,
+				(unsigned long)stat, (unsigned long)addr);
+			*addr = BANK_CMD_CLR_STAT;
+			return (-1);
+		}
+		else
+			return (1);
+	}
 	else
-		return (sectdone);
+		return (0);
 }

 static int
-bank_write_word(bank_addr_t addr, bank_word_t value)
+bank_write_word (volatile bank_addr_t addr, bank_word_t value)
 {
 	bank_word_t stat;
 	ulong start;
 	int flag, retval;

 	/* Disable interrupts which might cause a timeout here */
-	flag = disable_interrupts();
+	flag = disable_interrupts ();

 	*addr = BANK_CMD_PROG;

@@ -271,14 +191,14 @@ bank_write_word(bank_addr_t addr, bank_word_t value)

 	/* re-enable interrupts if necessary */
 	if (flag)
-		enable_interrupts();
+		enable_interrupts ();

 	retval = 0;

 	/* data polling for D7 */
 	start = get_timer (0);
 	do {
-		if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
+		if (get_timer (start) > CFG_FLASH_WRITE_TOUT) {
 			retval = 1;
 			goto done;
 		}
@@ -286,8 +206,8 @@ bank_write_word(bank_addr_t addr, bank_word_t value)
 	} while ((stat & BANK_STAT_RDY) != BANK_STAT_RDY);

 	if ((stat & BANK_STAT_ERR) != 0) {
-		printf("flash program failed (stat = 0x%08lx) "
-			"at address 0x%08lx\n", (ulong)stat, (ulong)addr);
+		printf ("flash program failed [0x%08lx] at address 0x%08lx\n",
+			(unsigned long)stat, (unsigned long)addr);
 		*addr = BANK_CMD_CLR_STAT;
 		retval = 3;
 	}
@@ -303,7 +223,7 @@ done:
 */

 unsigned long
-flash_init(void)
+flash_init (void)
 {
 	int i;

@@ -312,21 +232,21 @@ flash_init(void)
 		flash_info[i].flash_id = FLASH_UNKNOWN;
 	}

-	bank_probe(&flash_info[0], (bank_addr_t)CFG_FLASH_BASE);
+	bank_probe (&flash_info[0], (bank_addr_t)CFG_FLASH_BASE);

 	/*
 	 * protect monitor and environment sectors
 	 */

 #if CFG_MONITOR_BASE == CFG_FLASH_BASE
-	(void)flash_protect(FLAG_PROTECT_SET,
+	(void)flash_protect (FLAG_PROTECT_SET,
 		      CFG_MONITOR_BASE,
-		      CFG_MONITOR_BASE+CFG_MONITOR_LEN-1,
+		      CFG_MONITOR_BASE+monitor_flash_len-1,
 		      &flash_info[0]);
 #endif

 #if defined(CFG_FLASH_ENV_ADDR)
-	(void)flash_protect(FLAG_PROTECT_SET,
+	(void)flash_protect (FLAG_PROTECT_SET,
 		      CFG_FLASH_ENV_ADDR,
 #if defined(CFG_FLASH_ENV_BUF)
 		      CFG_FLASH_ENV_ADDR + CFG_FLASH_ENV_BUF - 1,
@@ -339,42 +259,10 @@ flash_init(void)
 	return flash_info[0].size;
 }

-/*-----------------------------------------------------------------------
- */
-#if 0
-static void
-flash_get_offsets(ulong base, flash_info_t *info)
-{
-	int i;
-
-	/* set up sector start adress table */
-	if (info->flash_id & FLASH_BTYPE) {
-		/* set sector offsets for bottom boot block type	*/
-		info->start[0] = base + 0x00000000;
-		info->start[1] = base + 0x00008000;
-		info->start[2] = base + 0x0000C000;
-		info->start[3] = base + 0x00010000;
-		for (i = 4; i < info->sector_count; i++) {
-			info->start[i] = base + (i * 0x00020000) - 0x00060000;
-		}
-	} else {
-		/* set sector offsets for top boot block type		*/
-		i = info->sector_count - 1;
-		info->start[i--] = base + info->size - 0x00008000;
-		info->start[i--] = base + info->size - 0x0000C000;
-		info->start[i--] = base + info->size - 0x00010000;
-		for (; i >= 0; i--) {
-			info->start[i] = base + i * 0x00020000;
-		}
-	}
-
-}
-#endif	/* 0 */
-
 /*-----------------------------------------------------------------------
 */
 void
-flash_print_info(flash_info_t *info)
+flash_print_info (flash_info_t *info)
 {
 	int i;

@@ -391,6 +279,14 @@ flash_print_info(flash_info_t *info)
 	switch (info->flash_id & FLASH_TYPEMASK) {
 	case FLASH_28F320J5:	printf ("28F320J5 (32 Mbit, 2 x 16bit)\n");
 				break;
+	case FLASH_28F640J5:	printf ("28F640J5 (64 Mbit, 2 x 16bit)\n");
+				break;
+	case FLASH_28F320J3A:	printf ("28F320J3A (32 Mbit, 2 x 16bit)\n");
+				break;
+	case FLASH_28F640J3A:	printf ("28F640J3A (64 Mbit, 2 x 16bit)\n");
+				break;
+	case FLASH_28F128J3A:	printf ("28F320J3A (128 Mbit, 2 x 16bit)\n");
+				break;
 	default:		printf ("Unknown Chip Type\n");
 				break;
 	}
@@ -411,157 +307,25 @@ flash_print_info(flash_info_t *info)
 	return;
 }

-/*-----------------------------------------------------------------------
- */
-
 /*
 * The following code cannot be run from FLASH!
 */
-#if 0
-static ulong
-flash_get_size(vu_long *addr, flash_info_t *info)
-{
-	short i;
-	ulong value;
-	ulong base = (ulong)addr;
-
-
-	/* Write auto select command: read Manufacturer ID */
-	addr[0x0555] = 0x00AA00AA;
-	addr[0x02AA] = 0x00550055;
-	addr[0x0555] = 0x00900090;
-
-	value = addr[0];
-
-	switch (value) {
-	case AMD_MANUFACT:
-		info->flash_id = FLASH_MAN_AMD;
-		break;
-	case FUJ_MANUFACT:
-		info->flash_id = FLASH_MAN_FUJ;
-		break;
-	default:
-		info->flash_id = FLASH_UNKNOWN;
-		info->sector_count = 0;
-		info->size = 0;
-		return (0);			/* no or unknown flash	*/
-	}
-
-	value = addr[1];			/* device ID		*/
-
-	switch (value) {
-	case AMD_ID_LV400T:
-		info->flash_id += FLASH_AM400T;
-		info->sector_count = 11;
-		info->size = 0x00100000;
-		break;				/* => 1 MB		*/
-
-	case AMD_ID_LV400B:
-		info->flash_id += FLASH_AM400B;
-		info->sector_count = 11;
-		info->size = 0x00100000;
-		break;				/* => 1 MB		*/
-
-	case AMD_ID_LV800T:
-		info->flash_id += FLASH_AM800T;
-		info->sector_count = 19;
-		info->size = 0x00200000;
-		break;				/* => 2 MB		*/
-
-	case AMD_ID_LV800B:
-		info->flash_id += FLASH_AM800B;
-		info->sector_count = 19;
-		info->size = 0x00200000;
-		break;				/* => 2 MB		*/
-
-	case AMD_ID_LV160T:
-		info->flash_id += FLASH_AM160T;
-		info->sector_count = 35;
-		info->size = 0x00400000;
-		break;				/* => 4 MB		*/
-
-	case AMD_ID_LV160B:
-		info->flash_id += FLASH_AM160B;
-		info->sector_count = 35;
-		info->size = 0x00400000;
-		break;				/* => 4 MB		*/
-#if 0	/* enable when device IDs are available */
-	case AMD_ID_LV320T:
-		info->flash_id += FLASH_AM320T;
-		info->sector_count = 67;
-		info->size = 0x00800000;
-		break;				/* => 8 MB		*/
-
-	case AMD_ID_LV320B:
-		info->flash_id += FLASH_AM320B;
-		info->sector_count = 67;
-		info->size = 0x00800000;
-		break;				/* => 8 MB		*/
-#endif
-	default:
-		info->flash_id = FLASH_UNKNOWN;
-		return (0);			/* => no or unknown flash */
-
-	}
-
-	/* set up sector start adress table */
-	if (info->flash_id & FLASH_BTYPE) {
-		/* set sector offsets for bottom boot block type	*/
-		info->start[0] = base + 0x00000000;
-		info->start[1] = base + 0x00008000;
-		info->start[2] = base + 0x0000C000;
-		info->start[3] = base + 0x00010000;
-		for (i = 4; i < info->sector_count; i++) {
-			info->start[i] = base + (i * 0x00020000) - 0x00060000;
-		}
-	} else {
-		/* set sector offsets for top boot block type		*/
-		i = info->sector_count - 1;
-		info->start[i--] = base + info->size - 0x00008000;
-		info->start[i--] = base + info->size - 0x0000C000;
-		info->start[i--] = base + info->size - 0x00010000;
-		for (; i >= 0; i--) {
-			info->start[i] = base + i * 0x00020000;
-		}
-	}
-
-	/* check for protected sectors */
-	for (i = 0; i < info->sector_count; i++) {
-		/* read sector protection at sector address, (A7 .. A0) = 0x02 */
-		/* D0 = 1 if protected */
-		addr = (volatile unsigned long *)(info->start[i]);
-		info->protect[i] = addr[2] & 1;
-	}
-
-	/*
-	 * Prevent writes to uninitialized FLASH.
-	 */
-	if (info->flash_id != FLASH_UNKNOWN) {
-		addr = (volatile unsigned long *)info->start[0];
-
-		*addr = 0x00F000F0;	/* reset bank */
-	}
-
-	return (info->size);
-}
-#endif /* 0 */
-

 /*-----------------------------------------------------------------------
 */

 int
-flash_erase(flash_info_t *info, int s_first, int s_last)
+flash_erase (flash_info_t *info, int s_first, int s_last)
 {
 	int prot, sect, haderr;
 	ulong start, now, last;
 	int rcode = 0;

 #ifdef FLASH_DEBUG
-	printf("\nflash_erase: erase %d sectors (%d to %d incl.) from\n"
+	printf ("\nflash_erase: erase %d sectors (%d to %d incl.) from\n"
 		"  Bank # %d: ", s_last - s_first + 1, s_first, s_last,
 		(info - flash_info) + 1);
-	flash_print_info(info);
+	flash_print_info (info);
 #endif

 	if ((s_first < 0) || (s_first > s_last)) {
@@ -574,14 +338,14 @@ flash_erase(flash_info_t *info, int s_first, int s_last)
 	}

 	prot = 0;
-	for (sect=s_first; sect<=s_last; ++sect) {
+	for (sect = s_first; sect <= s_last; ++sect) {
 		if (info->protect[sect]) {
 			prot++;
 		}
 	}

 	if (prot) {
-		printf("- Warning: %d protected sector%s will not be erased!\n",
+		printf ("- Warning: %d protected sector%s will not be erased\n",
 			prot, (prot > 1 ? "s" : ""));
 	}

@@ -594,15 +358,15 @@ flash_erase(flash_info_t *info, int s_first, int s_last)
 			ulong estart;
 			int sectdone;

-			bank_erase_init(info, sect);
+			bank_erase_init (info, sect);

 			/* wait at least 80us - let's wait 1 ms */
 			udelay (1000);

-			estart = get_timer(start);
+			estart = get_timer (start);

 			do {
-				now = get_timer(start);
+				now = get_timer (start);

 				if (now - estart > CFG_FLASH_ERASE_TOUT) {
 					printf ("Timeout (sect %d)\n", sect);
@@ -619,7 +383,7 @@ flash_erase(flash_info_t *info, int s_first, int s_last)
 				}
 #endif

-				sectdone = bank_erase_poll(info, sect);
+				sectdone = bank_erase_poll (info, sect);

 				if (sectdone < 0) {
 					haderr = 1;
@@ -642,21 +406,39 @@ flash_erase(flash_info_t *info, int s_first, int s_last)
 	/* reset to read mode */
 	for (sect = s_first; sect <= s_last; sect++) {
 		if (info->protect[sect] == 0) {	/* not protected */
-			bank_reset(info, sect);
+			bank_reset (info, sect);
 		}
 	}
 	return rcode;
 }

+/*-----------------------------------------------------------------------
+ * Write a word to Flash, returns:
+ * 0 - OK
+ * 1 - write timeout
+ * 2 - Flash not erased
+ * 3 - Program failed
+ */
+static int
+write_word (flash_info_t *info, ulong dest, ulong data)
+{
+	/* Check if Flash is (sufficiently) erased */
+	if ((*(ulong *)dest & data) != data)
+		return (2);
+
+	return (bank_write_word ((bank_addr_t)dest, (bank_word_t)data));
+}
+
 /*-----------------------------------------------------------------------
 * Copy memory to flash, returns:
 * 0 - OK
 * 1 - write timeout
 * 2 - Flash not erased
+ * 3 - Program failed
 */

 int
-write_buff(flash_info_t *info, uchar *src, ulong addr, ulong cnt)
+write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
 {
 	ulong cp, wp, data;
 	int i, l, rc;
@@ -680,7 +462,7 @@ write_buff(flash_info_t *info, uchar *src, ulong addr, ulong cnt)
 			data = (data << 8) | (*(uchar *)cp);
 		}

-		if ((rc = write_word(info, wp, data)) != 0) {
+		if ((rc = write_word (info, wp, data)) != 0) {
 			return (rc);
 		}
 		wp += 4;
@@ -694,7 +476,7 @@ write_buff(flash_info_t *info, uchar *src, ulong addr, ulong cnt)
 		for (i=0; i<4; ++i) {
 			data = (data << 8) | *src++;
 		}
-		if ((rc = write_word(info, wp, data)) != 0) {
+		if ((rc = write_word (info, wp, data)) != 0) {
 			return (rc);
 		}
 		wp  += 4;
@@ -717,28 +499,7 @@ write_buff(flash_info_t *info, uchar *src, ulong addr, ulong cnt)
 		data = (data << 8) | (*(uchar *)cp);
 	}

-	return (write_word(info, wp, data));
-}
-
-/*-----------------------------------------------------------------------
- * Write a word to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int
-write_word(flash_info_t *info, ulong dest, ulong data)
-{
-	int retval;
-
-	/* Check if Flash is (sufficiently) erased */
-	if ((*(ulong *)dest & data) != data) {
-		return (2);
-	}
-
-	retval = bank_write_word((bank_addr_t)dest, (bank_word_t)data);
-
-	return (retval);
+	return (write_word (info, wp, data));
 }

 /*-----------------------------------------------------------------------
--- a/board/hymod/flash.h
+++ b/board/hymod/flash.h
@@ -1,163 +1,156 @@
-/*************** DEFINES for Intel StrataFlash FLASH chip ********************/
-
 /*
- * acceptable chips types are:
+ * (C) Copyright 2000
+ * Murray Jensen, CSIRO-MIT, <Murray.Jensen@csiro.au>
 *
- *	28F320J5, 28F640J5, 28F320J3A, 28F640J3A and 28F128J3A
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
 */

-/* register addresses, valid only following an CHIP_CMD_RD_ID command */
-#define CHIP_ADDR_REG_MAN	0x000000	/* manufacturer's id */
-#define CHIP_ADDR_REG_DEV	0x000001	/* device id */
-#define CHIP_ADDR_REG_CFGM	0x000003	/* master lock config */
-#define CHIP_ADDR_REG_CFG(b)	(((b)<<16)|2)	/* lock config for block b */
+/*************** DEFINES for Intel StrataFlash FLASH chip ********************/

 /* Commands */
-#define CHIP_CMD_RST		0xFF		/* reset flash */
-#define CHIP_CMD_RD_ID		0x90		/* read the id and lock bits */
-#define CHIP_CMD_RD_QUERY	0x98		/* read device capabilities */
-#define CHIP_CMD_RD_STAT	0x70		/* read the status register */
-#define CHIP_CMD_CLR_STAT	0x50		/* clear the staus register */
-#define CHIP_CMD_WR_BUF		0xE8		/* clear the staus register */
-#define CHIP_CMD_PROG		0x40		/* program word command */
-#define CHIP_CMD_ERASE1		0x20		/* 1st word for block erase */
-#define CHIP_CMD_ERASE2		0xD0		/* 2nd word for block erase */
-#define CHIP_CMD_ERASE_SUSP	0xB0		/* suspend block erase */
-#define CHIP_CMD_LOCK		0x60		/* 1st word for all lock cmds */
-#define CHIP_CMD_SET_LOCK_BLK	0x01		/* 2nd wrd set block lock bit */
-#define CHIP_CMD_SET_LOCK_MSTR	0xF1		/* 2nd wrd set master lck bit */
-#define CHIP_CMD_CLR_LOCK_BLK	0xD0		/* 2nd wrd clear blk lck bit */
+#define ISF_CMD_RST		0xFF		/* reset flash */
+#define ISF_CMD_RD_ID		0x90		/* read the id and lock bits */
+#define ISF_CMD_RD_QUERY	0x98		/* read device capabilities */
+#define ISF_CMD_RD_STAT		0x70		/* read the status register */
+#define ISF_CMD_CLR_STAT	0x50		/* clear the staus register */
+#define ISF_CMD_WR_BUF		0xE8		/* clear the staus register */
+#define ISF_CMD_PROG		0x40		/* program word command */
+#define ISF_CMD_ERASE1		0x20		/* 1st word for block erase */
+#define ISF_CMD_ERASE2		0xD0		/* 2nd word for block erase */
+#define ISF_CMD_ERASE_SUSP	0xB0		/* suspend block erase */
+#define ISF_CMD_LOCK		0x60		/* 1st word for all lock cmds */
+#define ISF_CMD_SET_LOCK_BLK	0x01		/* 2nd wrd set block lock bit */
+#define ISF_CMD_SET_LOCK_MSTR	0xF1		/* 2nd wrd set master lck bit */
+#define ISF_CMD_CLR_LOCK_BLK	0xD0		/* 2nd wrd clear blk lck bit */

 /* status register bits */
-#define CHIP_STAT_DPS		0x02		/* Device Protect Status */
-#define CHIP_STAT_VPPS		0x08		/* VPP Status */
-#define CHIP_STAT_PSLBS		0x10		/* Program+Set Lock Bit Stat */
-#define CHIP_STAT_ECLBS		0x20		/* Erase+Clr Lock Bit Stat */
-#define CHIP_STAT_ESS		0x40		/* Erase Suspend Status */
-#define CHIP_STAT_RDY		0x80		/* WSM Mach Status, 1=rdy */
+#define ISF_STAT_DPS		0x02		/* Device Protect Status */
+#define ISF_STAT_VPPS		0x08		/* VPP Status */
+#define ISF_STAT_PSLBS		0x10		/* Program+Set Lock Bit Stat */
+#define ISF_STAT_ECLBS		0x20		/* Erase+Clr Lock Bit Stat */
+#define ISF_STAT_ESS		0x40		/* Erase Suspend Status */
+#define ISF_STAT_RDY		0x80		/* WSM Mach Status, 1=rdy */

-#define CHIP_STAT_ERR		(CHIP_STAT_VPPS | CHIP_STAT_DPS | \
-				    CHIP_STAT_ECLBS | CHIP_STAT_PSLBS)
+#define ISF_STAT_ERR		(ISF_STAT_VPPS | ISF_STAT_DPS | \
+				    ISF_STAT_ECLBS | ISF_STAT_PSLBS)

-/* ID and Lock Configuration */
-#define CHIP_RD_ID_LOCK		0x01		/* Bit 0 of each byte */
-#define CHIP_RD_ID_MAN		0x89		/* Manufacturer code = 0x89 */
-#define CHIP_RD_ID_DEV		CFG_FLASH_ID
-
-/* dimensions */
-#define CHIP_WIDTH		2		/* chips are in 16 bit mode */
-#define CHIP_WSHIFT		1		/* (log2 of CHIP_WIDTH) */
-#define CHIP_NBLOCKS		CFG_FLASH_NBLOCKS
-#define CHIP_BLKSZ		(128 * 1024)	/* of 128Kbytes each */
-#define CHIP_SIZE		(CHIP_BLKSZ * CHIP_NBLOCKS)
+/* register addresses, valid only following an ISF_CMD_RD_ID command */
+#define ISF_REG_MAN_CODE	0x00		/* manufacturer code */
+#define ISF_REG_DEV_CODE	0x01		/* device code */
+#define ISF_REG_BLK_LCK		0x02		/* block lock configuration */
+#define ISF_REG_MST_LCK		0x03		/* master lock configuration */

 /********************** DEFINES for Hymod Flash ******************************/

 /*
- * The hymod board has 2 x 28F320J5 chips running in
- * 16 bit mode, for a 32 bit wide bank.
+ * this code requires that the flash on any Hymod board appear as a bank
+ * of two (identical) 16bit Intel StrataFlash chips with 64Kword erase
+ * sectors (or blocks), running in x16 bit mode and connected side-by-side
+ * to make a 32-bit wide bus.
 */

-typedef unsigned long bank_word_t;		/* 8/16/32/64bit unsigned int */
-typedef volatile bank_word_t *bank_addr_t;
-typedef unsigned long bank_size_t;		/* want this big - >= 32 bit */
+typedef unsigned long bank_word_t;
+typedef bank_word_t bank_blk_t[64 * 1024];

-#define BANK_CHIP_WIDTH		2		/* each bank is 2 chips wide */
-#define BANK_CHIP_WSHIFT	1		/* (log2 of BANK_CHIP_WIDTH) */
+#define BANK_FILL_WORD(b)	(((bank_word_t)(b) << 16) | (bank_word_t)(b))

-#define BANK_WIDTH		(CHIP_WIDTH * BANK_CHIP_WIDTH)
-#define BANK_WSHIFT		(CHIP_WSHIFT + BANK_CHIP_WSHIFT)
-#define BANK_NBLOCKS		CHIP_NBLOCKS
-#define BANK_BLKSZ		(CHIP_BLKSZ * BANK_CHIP_WIDTH)
-#define BANK_SIZE		(CHIP_SIZE * BANK_CHIP_WIDTH)
+#ifdef EXAMPLE

-#define MAX_BANKS		1		/* only one bank possible */
+/* theoretically the following examples should also work */
+
+/* one flash chip in x8 mode with 128Kword sectors and 8bit bus */
+typedef unsigned char bank_word_t;
+typedef bank_word_t bank_blk_t[128 * 1024];
+#define BANK_FILL_WORD(b)	((bank_word_t)(b))
+
+/* four flash chips in x16 mode with 32Kword sectors and 64bit bus */
+typedef unsigned long long bank_word_t;
+typedef bank_word_t bank_blk_t[32 * 1024];
+#define BANK_FILL_WORD(b)	( \
+				    ((bank_word_t)(b) << 48) \
+				    ((bank_word_t)(b) << 32) \
+				    ((bank_word_t)(b) << 16) \
+				    ((bank_word_t)(b) <<  0) \
+				)
+
+#endif /* EXAMPLE */
+
+/* the sizes of these two types should probably be the same */
+typedef bank_word_t *bank_addr_t;
+typedef unsigned long bank_size_t;

 /* align bank addresses and sizes to bank word boundaries */
 #define BANK_ADDR_WORD_ALIGN(a)	((bank_addr_t)((bank_size_t)(a) \
-				    & ~(BANK_WIDTH - 1)))
-#define BANK_SIZE_WORD_ALIGN(s)	((bank_size_t)BANK_ADDR_WORD_ALIGN( \
-				    (bank_size_t)(s) + (BANK_WIDTH - 1)))
+				    & ~(sizeof (bank_word_t) - 1)))
+#define BANK_SIZE_WORD_ALIGN(s)	(((bank_size_t)(s) + sizeof (bank_word_t) - 1) \
+				    & ~(sizeof (bank_word_t) - 1))

 /* align bank addresses and sizes to bank block boundaries */
 #define BANK_ADDR_BLK_ALIGN(a)	((bank_addr_t)((bank_size_t)(a) \
-				    & ~(BANK_BLKSZ - 1)))
-#define BANK_SIZE_BLK_ALIGN(s)	((bank_size_t)BANK_ADDR_BLK_ALIGN( \
-				    (bank_size_t)(s) + (BANK_BLKSZ - 1)))
-
-/* align bank addresses and sizes to bank boundaries */
-#define BANK_ADDR_BANK_ALIGN(a)	((bank_addr_t)((bank_size_t)(a) \
-				    & ~(BANK_SIZE - 1)))
-#define BANK_SIZE_BANK_ALIGN(s)	((bank_size_t)BANK_ADDR_BANK_ALIGN( \
-				    (bank_size_t)(s) + (BANK_SIZE - 1)))
+				    & ~(sizeof (bank_blk_t) - 1)))
+#define BANK_SIZE_BLK_ALIGN(s)	(((bank_size_t)(s) + sizeof (bank_blk_t) - 1) \
+				    & ~(sizeof (bank_blk_t) - 1))

 /* add an offset to a bank address */
-#define BANK_ADDR_OFFSET(a, o)	(bank_addr_t)((bank_size_t)(a) + \
-				    (bank_size_t)(o))
-
-/* get base address of bank b, given flash base address a */
-#define BANK_ADDR_BASE(a, b)	BANK_ADDR_OFFSET(BANK_ADDR_BANK_ALIGN(a), \
-				    (bank_size_t)(b) * BANK_SIZE)
+#define BANK_ADDR_OFFSET(a, o)	((bank_addr_t)((bank_size_t)(a) + \
+				    (bank_size_t)(o)))

 /* adjust a bank address to start of next word, block or bank */
 #define BANK_ADDR_NEXT_WORD(a)	BANK_ADDR_OFFSET(BANK_ADDR_WORD_ALIGN(a), \
-				    BANK_WIDTH)
+				    sizeof (bank_word_t))
 #define BANK_ADDR_NEXT_BLK(a)	BANK_ADDR_OFFSET(BANK_ADDR_BLK_ALIGN(a), \
-				    BANK_BLKSZ)
-#define BANK_ADDR_NEXT_BANK(a)	BANK_ADDR_OFFSET(BANK_ADDR_BANK_ALIGN(a), \
-				    BANK_SIZE)
+				    sizeof (bank_blk_t))

-/* get bank address of chip register r given a bank base address a */
-#define BANK_ADDR_REG(a, r)	BANK_ADDR_OFFSET(BANK_ADDR_BANK_ALIGN(a), \
-				    ((bank_size_t)(r) << BANK_WSHIFT))
+/* get bank address of register r given a bank base address a and block num b */
+#define BANK_ADDR_REG(a, b, r)	BANK_ADDR_OFFSET(BANK_ADDR_OFFSET((a), \
+				    (bank_size_t)(b) * sizeof (bank_blk_t)), \
+					(bank_size_t)(r) * sizeof (bank_word_t))

-/* make a bank address for each chip register address */
-
-#define BANK_ADDR_REG_MAN(a)	BANK_ADDR_REG((a), CHIP_ADDR_REG_MAN)
-#define BANK_ADDR_REG_DEV(a)	BANK_ADDR_REG((a), CHIP_ADDR_REG_DEV)
-#define BANK_ADDR_REG_CFGM(a)	BANK_ADDR_REG((a), CHIP_ADDR_REG_CFGM)
-#define BANK_ADDR_REG_CFG(b,a)	BANK_ADDR_REG((a), CHIP_ADDR_REG_CFG(b))
-
-/*
- * replicate a chip cmd/stat/rd value into each byte position within a word
- * so that multiple chips are accessed in a single word i/o operation
- *
- * this must be as wide as the bank_word_t type, and take into account the
- * chip width and bank layout
- */
-
-#define BANK_FILL_WORD(o)	((bank_word_t)( \
-				    ((unsigned long)(o) << 16) | \
-				    ((unsigned long)(o) <<  0) \
-				))
-
-/* make a bank word value for each chip cmd/stat/rd value */
+/* make a bank word value for each StrataFlash value */

 /* Commands */
-#define BANK_CMD_RST		BANK_FILL_WORD(CHIP_CMD_RST)
-#define BANK_CMD_RD_ID		BANK_FILL_WORD(CHIP_CMD_RD_ID)
-#define BANK_CMD_RD_STAT	BANK_FILL_WORD(CHIP_CMD_RD_STAT)
-#define BANK_CMD_CLR_STAT	BANK_FILL_WORD(CHIP_CMD_CLR_STAT)
-#define BANK_CMD_ERASE1		BANK_FILL_WORD(CHIP_CMD_ERASE1)
-#define BANK_CMD_ERASE2		BANK_FILL_WORD(CHIP_CMD_ERASE2)
-#define BANK_CMD_PROG		BANK_FILL_WORD(CHIP_CMD_PROG)
-#define BANK_CMD_LOCK		BANK_FILL_WORD(CHIP_CMD_LOCK)
-#define BANK_CMD_SET_LOCK_BLK	BANK_FILL_WORD(CHIP_CMD_SET_LOCK_BLK)
-#define BANK_CMD_SET_LOCK_MSTR	BANK_FILL_WORD(CHIP_CMD_SET_LOCK_MSTR)
-#define BANK_CMD_CLR_LOCK_BLK	BANK_FILL_WORD(CHIP_CMD_CLR_LOCK_BLK)
+#define BANK_CMD_RST		BANK_FILL_WORD(ISF_CMD_RST)
+#define BANK_CMD_RD_ID		BANK_FILL_WORD(ISF_CMD_RD_ID)
+#define BANK_CMD_RD_STAT	BANK_FILL_WORD(ISF_CMD_RD_STAT)
+#define BANK_CMD_CLR_STAT	BANK_FILL_WORD(ISF_CMD_CLR_STAT)
+#define BANK_CMD_ERASE1		BANK_FILL_WORD(ISF_CMD_ERASE1)
+#define BANK_CMD_ERASE2		BANK_FILL_WORD(ISF_CMD_ERASE2)
+#define BANK_CMD_PROG		BANK_FILL_WORD(ISF_CMD_PROG)
+#define BANK_CMD_LOCK		BANK_FILL_WORD(ISF_CMD_LOCK)
+#define BANK_CMD_SET_LOCK_BLK	BANK_FILL_WORD(ISF_CMD_SET_LOCK_BLK)
+#define BANK_CMD_SET_LOCK_MSTR	BANK_FILL_WORD(ISF_CMD_SET_LOCK_MSTR)
+#define BANK_CMD_CLR_LOCK_BLK	BANK_FILL_WORD(ISF_CMD_CLR_LOCK_BLK)

 /* status register bits */
-#define BANK_STAT_DPS		BANK_FILL_WORD(CHIP_STAT_DPS)
-#define BANK_STAT_PSS		BANK_FILL_WORD(CHIP_STAT_PSS)
-#define BANK_STAT_VPPS		BANK_FILL_WORD(CHIP_STAT_VPPS)
-#define BANK_STAT_PSLBS		BANK_FILL_WORD(CHIP_STAT_PSLBS)
-#define BANK_STAT_ECLBS		BANK_FILL_WORD(CHIP_STAT_ECLBS)
-#define BANK_STAT_ESS		BANK_FILL_WORD(CHIP_STAT_ESS)
-#define BANK_STAT_RDY		BANK_FILL_WORD(CHIP_STAT_RDY)
+#define BANK_STAT_DPS		BANK_FILL_WORD(ISF_STAT_DPS)
+#define BANK_STAT_PSS		BANK_FILL_WORD(ISF_STAT_PSS)
+#define BANK_STAT_VPPS		BANK_FILL_WORD(ISF_STAT_VPPS)
+#define BANK_STAT_PSLBS		BANK_FILL_WORD(ISF_STAT_PSLBS)
+#define BANK_STAT_ECLBS		BANK_FILL_WORD(ISF_STAT_ECLBS)
+#define BANK_STAT_ESS		BANK_FILL_WORD(ISF_STAT_ESS)
+#define BANK_STAT_RDY		BANK_FILL_WORD(ISF_STAT_RDY)

-#define BANK_STAT_ERR		BANK_FILL_WORD(CHIP_STAT_ERR)
+#define BANK_STAT_ERR		BANK_FILL_WORD(ISF_STAT_ERR)

-/* ID and Lock Configuration */
-#define BANK_RD_ID_LOCK		BANK_FILL_WORD(CHIP_RD_ID_LOCK)
-#define BANK_RD_ID_MAN		BANK_FILL_WORD(CHIP_RD_ID_MAN)
-#define BANK_RD_ID_DEV		BANK_FILL_WORD(CHIP_RD_ID_DEV)
+/* make a bank register address for each StrataFlash register address */
+
+#define BANK_REG_MAN_CODE(a)	BANK_ADDR_REG((a), 0, ISF_REG_MAN_CODE)
+#define BANK_REG_DEV_CODE(a)	BANK_ADDR_REG((a), 0, ISF_REG_DEV_CODE)
+#define BANK_REG_BLK_LCK(a, b)	BANK_ADDR_REG((a), (b), ISF_REG_BLK_LCK)
+#define BANK_REG_MST_LCK(a)	BANK_ADDR_REG((a), 0, ISF_REG_MST_LCK)
--- a/board/hymod/global_env
+++ b/board/hymod/global_env
@@ -1,3 +1,33 @@
+# DONT FORGET TO CHANGE THE "version" VAR BELOW IF YOU MAKE CHANGES TO THIS FILE
+
+# (C) Copyright 2001
+# Murray Jensen, CSIRO-MIT, <Murray.Jensen@csiro.au>
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+
+#
+# global_env
+#
+# file used by Hymod boards to initialise the u-boot non-volatile
+# environment when u-boot is first run (it determines this by the
+# absence of the environment variable "global_env_loaded")
+#
 # format of this file is:
 #
 #	1. blank lines and lines beginning with '#' are ignored
@@ -7,32 +37,94 @@
 #		%s	serial number of the main board (10 digit zero filled)
 #		%S	serial number of the main board (plain number)
 #		%%	a percentage character
-#
-# no whitespace is removed in either <name> or <value>
+#		... otherwise the %x is discarded
 #
 # if first character in <name> is a dash ('-'), then an existing env var
-# will not be overwritten (the dash is removed).
+# will not be overwritten (the dash is removed). i.e. it is only set if
+# it does not exist
 #
 # if last character in <name> is a plus ('+'), then <value> will be appended
-# to any existing env var (the plus is removed). Duplicates of <value> are
+# to any existing env var (the plus is ignored). Duplicates of <value> are
 # removed.
 #
+# similarly, if the last character in <name> is a minus ('-'), then any
+# occurences of <value> in the current value of <name> will removed (the
+# minus is ignored).
+#
+# leading and trailing whitespace is removed in both <name> and <value>
+# (after processing any initial or final plus/minus in <name>).
+#
+
+# MISCELLANEOUS PARAMETERS
+
+# version must always come first
+version=4

 # set the ip address based on the main board serial number
 ipaddr=192.168.1.%S
 serverip=192.168.1.254

-# stop auto execute after tftp
+# stop auto execute after tftp (not a very good name really)
 autostart=no

+# setting this to "yes" forces the global_env file to be loaded and processed
+# if the current version is different to the version in the file
+always_check_env=no
+
+# BOOTING COMMANDS AND PARAMETERS
+
+# command to run when "auto-booting"
+bootcmd=bootm 40080000
+
+# how long the "countdown" to automatically running "bootcmd" is
+bootdelay=2
+
+# how long before it "times out" console input and attempts to run "bootcmd"
+bootretry=5
+
+# arguments passed to the boot program (i.e. linux kernel) via register 6
+# the linux kernel (v2.4) uses the following registers:
+#	r3 - address of board information structure
+#	r4 - address of initial ramdisk image (0 means no initrd)
+#	r5 - size of initial ramdisk image
+#	r6 - address of command line string
+-bootargs=root=/dev/mtdblock5 rootfstype=squashfs ro
+
+# these four are for hymod linux integrated into our Sun network
+bootargs+=serialno=%S
+bootargs+=nisclient nisdomain=mlb.dmt.csiro.au nissrvadr=138.194.112.4
+bootargs+=nfsclient
+bootargs+=automount
+
+# start a web server by default
+bootargs+=webserver
+
+# give negotiation time to finish
+bootargs+=netsleep=5
+
+# then our ciscos don't pass packets for 25-30 secs after that, so
+# pinging the server until it responds prevents network connections
+# from failing...
+bootargs+=netping
+
+# these are old bootargs - we don't need them anymore
+bootargs-=preload=unix,i2c-cpm,i2c-dev
+bootargs-=ramdisk_size=32768
+bootargs-=ramdisk_size=24576
+
+# FLASH MANIPULATION COMMANDS
+
 #
-# 16M flash map, 64 x 256K sectors, mapped at address 0x40000000
+# 16M flash, 64 x 256K sectors, mapped at address 0x40000000
 #
-# sector 0:	boot
-# sector 1:	non volatile environment
-# sectors 2-4:	linux kernel image
-# sectors 5-7:	alternate linux kernel image
-# sectors 8-63:	linux initial ramdisk image
+# Sector(s)	Address		Size	Description
+#
+#  0 -  0	0x40000000	256K	boot code
+#  1 -  1	0x40040000	256K	non volatile environment
+#  2 -  4	0x40080000	768K	linux kernel image
+#  5 -  7	0x40140000	768K	alternate linux kernel image
+#  8 - 47	0x40200000	 10M	linux initial ramdisk image
+# 48 - 63	0x40c00000	  4M	ramdisk image for applications
 #

 fetchboot=tftp 100000 /hymod/u-boot.bin
@@ -49,21 +141,21 @@ newlinux=run fetchlinux eraselinux copylinux cmplinux

 fetchaltlinux=tftp 100000 /hymod/altlinux.bin
 erasealtlinux=erase 1:5-7
-copyaltlinux=cp.b 100000 40080000 $(filesize)
-cmpaltlinux=cmp.b 100000 40080000 $(filesize)
+copyaltlinux=cp.b 100000 40140000 $(filesize)
+cmpaltlinux=cmp.b 100000 40140000 $(filesize)
 newaltlinux=run fetchaltlinux erasealtlinux copyaltlinux cmpaltlinux

-fetchird=tftp 100000 /hymod/initrd.bin
-eraseird=erase 1:8-63
-copyird=cp.b 100000 40200000 $(filesize)
-cmpird=cmp.b 100000 40200000 $(filesize)
-newinitrd=run fetchird eraseird copyird cmpird
+fetchroot=tftp 100000 /hymod/root.bin
+eraseroot=erase 1:8-47
+copyroot=cp.b 100000 40200000 $(filesize)
+cmproot=cmp.b 100000 40200000 $(filesize)
+newroot=run fetchroot eraseroot copyroot cmproot

-bootcmd=bootm 40080000 40200000
-bootargs=root=/dev/ram rw
-# these are for hymod linux
-bootargs+=preload=unix,i2c-cpm,i2c-dev
-bootargs+=serialno=%S
-bootargs+=ramdisk_size=32768
-bootargs+=automount nisclient nisdomain=mlb.dmt.csiro.au nissrvadr=138.194.112.4
-bootdelay=2
+fetchard=tftp 100000 /hymod/apprd.bin
+eraseard=erase 1:48-63
+copyard=cp.b 100000 40c00000 $(filesize)
+cmpard=cmp.b 100000 40c00000 $(filesize)
+newapprd=run fetchard eraseard copyard cmpard
+
+# pass above map to linux mtd driver
+bootargs+=mtdparts=phys:256k(u-boot),256k(u-boot-env),768k(linux),768k(altlinux),10m(root),4m(hymod)
--- a/board/hymod/hymod.c
+++ b/board/hymod/hymod.c
@@ -20,11 +20,12 @@
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 *
- * Hacked for the Hymod board by Murray.Jensen@cmst.csiro.au, 20-Oct-00
+ * Hacked for the Hymod board by Murray.Jensen@csiro.au, 20-Oct-00
 */

 #include <common.h>
 #include <mpc8260.h>
+#include <mpc8260_irq.h>
 #include <ioports.h>
 #include <i2c.h>
 #include <asm/iopin_8260.h>
@@ -32,15 +33,11 @@
 /* ------------------------------------------------------------------------- */

 /* imports from eeprom.c */
-extern int eeprom_load (unsigned, hymod_eeprom_t *);
-extern int eeprom_fetch (unsigned, char *, ulong);
-extern void eeprom_print (hymod_eeprom_t *);
+extern int hymod_eeprom_read (int, hymod_eeprom_t *);
+extern void hymod_eeprom_print (hymod_eeprom_t *);

-/* imports from fetch.c */
-extern int fetch_and_parse (char *, ulong, int (*)(uchar *, uchar *));
-
-/* imports from common/main.c */
-extern char console_buffer[CFG_CBSIZE];
+/* imports from env.c */
+extern void hymod_check_env (void);

 /* ------------------------------------------------------------------------- */

@@ -54,274 +51,152 @@ extern char console_buffer[CFG_CBSIZE];
 const iop_conf_t iop_conf_tab[4][32] = {

 	/* Port A configuration */
-	{							/*        conf ppar psor pdir podr pdat */
-									/* PA31 */ {1, 1, 1, 0, 0, 0},
-									/* FCC1 MII COL */
-									/* PA30 */ {1, 1, 1, 0, 0, 0},
-									/* FCC1 MII CRS */
-									/* PA29 */ {1, 1, 1, 1, 0, 0},
-									/* FCC1 MII TX_ER */
-									/* PA28 */ {1, 1, 1, 1, 0, 0},
-									/* FCC1 MII TX_EN */
-									/* PA27 */ {1, 1, 1, 0, 0, 0},
-									/* FCC1 MII RX_DV */
-									/* PA26 */ {1, 1, 1, 0, 0, 0},
-									/* FCC1 MII RX_ER */
-									/* PA25 */ {1, 0, 0, 1, 0, 0},
-									/* FCC2 MII MDIO */
-									/* PA24 */ {1, 0, 0, 1, 0, 0},
-									/* FCC2 MII MDC */
-									/* PA23 */ {1, 0, 0, 1, 0, 0},
-									/* FCC3 MII MDIO */
-									/* PA22 */ {1, 0, 0, 1, 0, 0},
-									/* FCC3 MII MDC */
-									/* PA21 */ {1, 1, 0, 1, 0, 0},
-									/* FCC1 MII TxD[3] */
-									/* PA20 */ {1, 1, 0, 1, 0, 0},
-									/* FCC1 MII TxD[2] */
-									/* PA19 */ {1, 1, 0, 1, 0, 0},
-									/* FCC1 MII TxD[1] */
-									/* PA18 */ {1, 1, 0, 1, 0, 0},
-									/* FCC1 MII TxD[0] */
-									/* PA17 */ {1, 1, 0, 0, 0, 0},
-									/* FCC1 MII RxD[3] */
-									/* PA16 */ {1, 1, 0, 0, 0, 0},
-									/* FCC1 MII RxD[2] */
-									/* PA15 */ {1, 1, 0, 0, 0, 0},
-									/* FCC1 MII RxD[1] */
-									/* PA14 */ {1, 1, 0, 0, 0, 0},
-									/* FCC1 MII RxD[0] */
-									/* PA13 */ {1, 0, 0, 1, 0, 0},
-									/* FCC1 MII MDIO */
-									/* PA12 */ {1, 0, 0, 1, 0, 0},
-									/* FCC1 MII MDC */
-									/* PA11 */ {1, 0, 0, 1, 0, 0},
-									/* SEL_CD */
-									/* PA10 */ {1, 0, 0, 0, 0, 0},
-									/* FLASH STS1 */
-									/* PA9  */ {1, 0, 0, 0, 0, 0},
-									/* FLASH STS0 */
-									/* PA8  */ {1, 0, 0, 0, 0, 0},
-									/* FLASH ~PE */
-									/* PA7  */ {1, 0, 0, 0, 0, 0},
-									/* WATCH ~HRESET */
-									/* PA6  */ {1, 0, 0, 0, 1, 0},
-									/* VC DONE */
-									/* PA5  */ {1, 0, 0, 1, 1, 0},
-									/* VC INIT */
-									/* PA4  */ {1, 0, 0, 1, 0, 0},
-									/* VC ~PROG */
-									/* PA3  */ {1, 0, 0, 1, 0, 0},
-									/* VM ENABLE */
-									/* PA2  */ {1, 0, 0, 0, 1, 0},
-									/* VM DONE */
-									/* PA1  */ {1, 0, 0, 1, 1, 0},
-									/* VM INIT */
-									/* PA0  */ {1, 0, 0, 1, 0, 0}
-									/* VM ~PROG */
-	 },
+	{
+		/* cnf par sor dir odr dat */
+		{   1,  1,  1,  0,  0,  0   },	/* PA31: FCC1 MII COL */
+		{   1,  1,  1,  0,  0,  0   },	/* PA30: FCC1 MII CRS */
+		{   1,  1,  1,  1,  0,  0   },	/* PA29: FCC1 MII TX_ER */
+		{   1,  1,  1,  1,  0,  0   },	/* PA28: FCC1 MII TX_EN */
+		{   1,  1,  1,  0,  0,  0   },	/* PA27: FCC1 MII RX_DV */
+		{   1,  1,  1,  0,  0,  0   },	/* PA26: FCC1 MII RX_ER */
+		{   1,  0,  0,  1,  0,  0   },	/* PA25: FCC2 MII MDIO */
+		{   1,  0,  0,  1,  0,  0   },	/* PA24: FCC2 MII MDC */
+		{   1,  0,  0,  1,  0,  0   },	/* PA23: FCC3 MII MDIO */
+		{   1,  0,  0,  1,  0,  0   },	/* PA22: FCC3 MII MDC */
+		{   1,  1,  0,  1,  0,  0   },	/* PA21: FCC1 MII TxD[3] */
+		{   1,  1,  0,  1,  0,  0   },	/* PA20: FCC1 MII TxD[2] */
+		{   1,  1,  0,  1,  0,  0   },	/* PA19: FCC1 MII TxD[1] */
+		{   1,  1,  0,  1,  0,  0   },	/* PA18: FCC1 MII TxD[0] */
+		{   1,  1,  0,  0,  0,  0   },	/* PA17: FCC1 MII RxD[3] */
+		{   1,  1,  0,  0,  0,  0   },	/* PA16: FCC1 MII RxD[2] */
+		{   1,  1,  0,  0,  0,  0   },	/* PA15: FCC1 MII RxD[1] */
+		{   1,  1,  0,  0,  0,  0   },	/* PA14: FCC1 MII RxD[0] */
+		{   1,  0,  0,  1,  0,  0   },	/* PA13: FCC1 MII MDIO */
+		{   1,  0,  0,  1,  0,  0   },	/* PA12: FCC1 MII MDC */
+		{   1,  0,  0,  1,  0,  0   },	/* PA11: SEL_CD */
+		{   1,  0,  0,  0,  0,  0   },	/* PA10: FLASH STS1 */
+		{   1,  0,  0,  0,  0,  0   },	/* PA09: FLASH STS0 */
+		{   1,  0,  0,  0,  0,  0   },	/* PA08: FLASH ~PE */
+		{   1,  0,  0,  0,  0,  0   },	/* PA07: WATCH ~HRESET */
+		{   1,  0,  0,  0,  1,  0   },	/* PA06: VC DONE */
+		{   1,  0,  0,  1,  1,  0   },	/* PA05: VC INIT */
+		{   1,  0,  0,  1,  0,  0   },	/* PA04: VC ~PROG */
+		{   1,  0,  0,  1,  0,  0   },	/* PA03: VM ENABLE */
+		{   1,  0,  0,  0,  1,  0   },	/* PA02: VM DONE */
+		{   1,  0,  0,  1,  1,  0   },	/* PA01: VM INIT */
+		{   1,  0,  0,  1,  0,  0   } 	/* PA00: VM ~PROG */
+	},

 	/* Port B configuration */
-	{							/*        conf ppar psor pdir podr pdat */
-									/* PB31 */ {1, 1, 0, 1, 0, 0},
-									/* FCC2 MII TX_ER */
-									/* PB30 */ {1, 1, 0, 0, 0, 0},
-									/* FCC2 MII RX_DV */
-									/* PB29 */ {1, 1, 1, 1, 0, 0},
-									/* FCC2 MII TX_EN */
-									/* PB28 */ {1, 1, 0, 0, 0, 0},
-									/* FCC2 MII RX_ER */
-									/* PB27 */ {1, 1, 0, 0, 0, 0},
-									/* FCC2 MII COL */
-									/* PB26 */ {1, 1, 0, 0, 0, 0},
-									/* FCC2 MII CRS */
-									/* PB25 */ {1, 1, 0, 1, 0, 0},
-									/* FCC2 MII TxD[3] */
-									/* PB24 */ {1, 1, 0, 1, 0, 0},
-									/* FCC2 MII TxD[2] */
-									/* PB23 */ {1, 1, 0, 1, 0, 0},
-									/* FCC2 MII TxD[1] */
-									/* PB22 */ {1, 1, 0, 1, 0, 0},
-									/* FCC2 MII TxD[0] */
-									/* PB21 */ {1, 1, 0, 0, 0, 0},
-									/* FCC2 MII RxD[0] */
-									/* PB20 */ {1, 1, 0, 0, 0, 0},
-									/* FCC2 MII RxD[1] */
-									/* PB19 */ {1, 1, 0, 0, 0, 0},
-									/* FCC2 MII RxD[2] */
-									/* PB18 */ {1, 1, 0, 0, 0, 0},
-									/* FCC2 MII RxD[3] */
-									/* PB17 */ {1, 1, 0, 0, 0, 0},
-									/* FCC3 MII RX_DV */
-									/* PB16 */ {1, 1, 0, 0, 0, 0},
-									/* FCC3 MII RX_ER */
-									/* PB15 */ {1, 1, 0, 1, 0, 0},
-									/* FCC3 MII TX_ER */
-									/* PB14 */ {1, 1, 0, 1, 0, 0},
-									/* FCC3 MII TX_EN */
-									/* PB13 */ {1, 1, 0, 0, 0, 0},
-									/* FCC3 MII COL */
-									/* PB12 */ {1, 1, 0, 0, 0, 0},
-									/* FCC3 MII CRS */
-									/* PB11 */ {1, 1, 0, 0, 0, 0},
-									/* FCC3 MII RxD[3] */
-									/* PB10 */ {1, 1, 0, 0, 0, 0},
-									/* FCC3 MII RxD[2] */
-									/* PB9  */ {1, 1, 0, 0, 0, 0},
-									/* FCC3 MII RxD[1] */
-									/* PB8  */ {1, 1, 0, 0, 0, 0},
-									/* FCC3 MII RxD[0] */
-									/* PB7  */ {1, 1, 0, 1, 0, 0},
-									/* FCC3 MII TxD[3] */
-									/* PB6  */ {1, 1, 0, 1, 0, 0},
-									/* FCC3 MII TxD[2] */
-									/* PB5  */ {1, 1, 0, 1, 0, 0},
-									/* FCC3 MII TxD[1] */
-									/* PB4  */ {1, 1, 0, 1, 0, 0},
-									/* FCC3 MII TxD[0] */
-									/* PB3  */ {0, 0, 0, 0, 0, 0},
-									/* pin doesn't exist */
-									/* PB2  */ {0, 0, 0, 0, 0, 0},
-									/* pin doesn't exist */
-									/* PB1  */ {0, 0, 0, 0, 0, 0},
-									/* pin doesn't exist */
-									/* PB0  */ {0, 0, 0, 0, 0, 0}
-									/* pin doesn't exist */
-	 },
+	{
+		/* cnf par sor dir odr dat */
+		{   1,  1,  0,  1,  0,  0   },	/* PB31: FCC2 MII TX_ER */
+		{   1,  1,  0,  0,  0,  0   },	/* PB30: FCC2 MII RX_DV */
+		{   1,  1,  1,  1,  0,  0   },	/* PB29: FCC2 MII TX_EN */
+		{   1,  1,  0,  0,  0,  0   },	/* PB28: FCC2 MII RX_ER */
+		{   1,  1,  0,  0,  0,  0   },	/* PB27: FCC2 MII COL */
+		{   1,  1,  0,  0,  0,  0   },	/* PB26: FCC2 MII CRS */
+		{   1,  1,  0,  1,  0,  0   },	/* PB25: FCC2 MII TxD[3] */
+		{   1,  1,  0,  1,  0,  0   },	/* PB24: FCC2 MII TxD[2] */
+		{   1,  1,  0,  1,  0,  0   },	/* PB23: FCC2 MII TxD[1] */
+		{   1,  1,  0,  1,  0,  0   },	/* PB22: FCC2 MII TxD[0] */
+		{   1,  1,  0,  0,  0,  0   },	/* PB21: FCC2 MII RxD[0] */
+		{   1,  1,  0,  0,  0,  0   },	/* PB20: FCC2 MII RxD[1] */
+		{   1,  1,  0,  0,  0,  0   },	/* PB19: FCC2 MII RxD[2] */
+		{   1,  1,  0,  0,  0,  0   },	/* PB18: FCC2 MII RxD[3] */
+		{   1,  1,  0,  0,  0,  0   },	/* PB17: FCC3 MII RX_DV */
+		{   1,  1,  0,  0,  0,  0   },	/* PB16: FCC3 MII RX_ER */
+		{   1,  1,  0,  1,  0,  0   },	/* PB15: FCC3 MII TX_ER */
+		{   1,  1,  0,  1,  0,  0   },	/* PB14: FCC3 MII TX_EN */
+		{   1,  1,  0,  0,  0,  0   },	/* PB13: FCC3 MII COL */
+		{   1,  1,  0,  0,  0,  0   },	/* PB12: FCC3 MII CRS */
+		{   1,  1,  0,  0,  0,  0   },	/* PB11: FCC3 MII RxD[3] */
+		{   1,  1,  0,  0,  0,  0   },	/* PB10: FCC3 MII RxD[2] */
+		{   1,  1,  0,  0,  0,  0   },	/* PB09: FCC3 MII RxD[1] */
+		{   1,  1,  0,  0,  0,  0   },	/* PB08: FCC3 MII RxD[0] */
+		{   1,  1,  0,  1,  0,  0   },	/* PB07: FCC3 MII TxD[3] */
+		{   1,  1,  0,  1,  0,  0   },	/* PB06: FCC3 MII TxD[2] */
+		{   1,  1,  0,  1,  0,  0   },	/* PB05: FCC3 MII TxD[1] */
+		{   1,  1,  0,  1,  0,  0   },	/* PB04: FCC3 MII TxD[0] */
+		{   0,  0,  0,  0,  0,  0   },	/* PB03: pin doesn't exist */
+		{   0,  0,  0,  0,  0,  0   },	/* PB02: pin doesn't exist */
+		{   0,  0,  0,  0,  0,  0   },	/* PB01: pin doesn't exist */
+		{   0,  0,  0,  0,  0,  0   }	/* PB00: pin doesn't exist */
+	},

-	/* Port C */
-	{							/*        conf ppar psor pdir podr pdat */
-									/* PC31 */ {1, 0, 0, 0, 0, 0},
-									/* MEZ ~IACK */
-	 /* PC30 */ {0, 0, 0, 0, 0, 0},
-									/* PC29 */ {1, 1, 0, 0, 0, 0},
-									/* CLK SCCx */
-									/* PC28 */ {1, 1, 0, 0, 0, 0},
-									/* CLK4 */
-									/* PC27 */ {1, 1, 0, 0, 0, 0},
-									/* CLK SCCF */
-									/* PC26 */ {1, 1, 0, 0, 0, 0},
-									/* CLK 32K */
-									/* PC25 */ {1, 1, 0, 0, 0, 0},
-									/* BRG4/CLK7 */
-	 /* PC24 */ {0, 0, 0, 0, 0, 0},
-									/* PC23 */ {1, 1, 0, 0, 0, 0},
-									/* CLK SCCx */
-									/* PC22 */ {1, 1, 0, 0, 0, 0},
-									/* FCC1 MII RX_CLK */
-									/* PC21 */ {1, 1, 0, 0, 0, 0},
-									/* FCC1 MII TX_CLK */
-									/* PC20 */ {1, 1, 0, 0, 0, 0},
-									/* CLK SCCF */
-									/* PC19 */ {1, 1, 0, 0, 0, 0},
-									/* FCC2 MII RX_CLK */
-									/* PC18 */ {1, 1, 0, 0, 0, 0},
-									/* FCC2 MII TX_CLK */
-									/* PC17 */ {1, 1, 0, 0, 0, 0},
-									/* FCC3 MII RX_CLK */
-									/* PC16 */ {1, 1, 0, 0, 0, 0},
-									/* FCC3 MII TX_CLK */
-									/* PC15 */ {1, 0, 0, 0, 0, 0},
-									/* SCC1 UART ~CTS */
-									/* PC14 */ {1, 0, 0, 0, 0, 0},
-									/* SCC1 UART ~CD */
-									/* PC13 */ {1, 0, 0, 0, 0, 0},
-									/* SCC2 UART ~CTS */
-									/* PC12 */ {1, 0, 0, 0, 0, 0},
-									/* SCC2 UART ~CD */
-									/* PC11 */ {1, 0, 0, 1, 0, 0},
-									/* SCC1 UART ~DTR */
-									/* PC10 */ {1, 0, 0, 1, 0, 0},
-									/* SCC1 UART ~DSR */
-									/* PC9  */ {1, 0, 0, 1, 0, 0},
-									/* SCC2 UART ~DTR */
-									/* PC8  */ {1, 0, 0, 1, 0, 0},
-									/* SCC2 UART ~DSR */
-									/* PC7  */ {1, 0, 0, 0, 0, 0},
-									/* TEMP ~ALERT */
-									/* PC6  */ {1, 0, 0, 0, 0, 0},
-									/* FCC3 INT */
-									/* PC5  */ {1, 0, 0, 0, 0, 0},
-									/* FCC2 INT */
-									/* PC4  */ {1, 0, 0, 0, 0, 0},
-									/* FCC1 INT */
-									/* PC3  */ {1, 1, 1, 1, 0, 0},
-									/* SDMA IDMA2 ~DACK */
-									/* PC2  */ {1, 1, 1, 0, 0, 0},
-									/* SDMA IDMA2 ~DONE */
-									/* PC1  */ {1, 1, 0, 0, 0, 0},
-									/* SDMA IDMA2 ~DREQ */
-									/* PC0  */ {1, 1, 0, 1, 0, 0}
-									/* BRG7 */
-	 },
+	/* Port C configuration */
+	{
+		/* cnf par sor dir odr dat */
+		{   1,  0,  0,  0,  0,  0   },	/* PC31: MEZ ~IACK */
+		{   0,  0,  0,  0,  0,  0   },	/* PC30: ? */
+		{   1,  1,  0,  0,  0,  0   },	/* PC29: CLK SCCx */
+		{   1,  1,  0,  0,  0,  0   },	/* PC28: CLK4 */
+		{   1,  1,  0,  0,  0,  0   },	/* PC27: CLK SCCF */
+		{   1,  1,  0,  0,  0,  0   },	/* PC26: CLK 32K */
+		{   1,  1,  0,  0,  0,  0   },	/* PC25: BRG4/CLK7 */
+		{   0,  0,  0,  0,  0,  0   },	/* PC24: ? */
+		{   1,  1,  0,  0,  0,  0   },	/* PC23: CLK SCCx */
+		{   1,  1,  0,  0,  0,  0   },	/* PC22: FCC1 MII RX_CLK */
+		{   1,  1,  0,  0,  0,  0   },	/* PC21: FCC1 MII TX_CLK */
+		{   1,  1,  0,  0,  0,  0   },	/* PC20: CLK SCCF */
+		{   1,  1,  0,  0,  0,  0   },	/* PC19: FCC2 MII RX_CLK */
+		{   1,  1,  0,  0,  0,  0   },	/* PC18: FCC2 MII TX_CLK */
+		{   1,  1,  0,  0,  0,  0   },	/* PC17: FCC3 MII RX_CLK */
+		{   1,  1,  0,  0,  0,  0   },	/* PC16: FCC3 MII TX_CLK */
+		{   1,  0,  0,  0,  0,  0   },	/* PC15: SCC1 UART ~CTS */
+		{   1,  0,  0,  0,  0,  0   },	/* PC14: SCC1 UART ~CD */
+		{   1,  0,  0,  0,  0,  0   },	/* PC13: SCC2 UART ~CTS */
+		{   1,  0,  0,  0,  0,  0   },	/* PC12: SCC2 UART ~CD */
+		{   1,  0,  0,  1,  0,  0   },	/* PC11: SCC1 UART ~DTR */
+		{   1,  0,  0,  1,  0,  0   },	/* PC10: SCC1 UART ~DSR */
+		{   1,  0,  0,  1,  0,  0   },	/* PC09: SCC2 UART ~DTR */
+		{   1,  0,  0,  1,  0,  0   },	/* PC08: SCC2 UART ~DSR */
+		{   1,  0,  0,  0,  0,  0   },	/* PC07: TEMP ~ALERT */
+		{   1,  0,  0,  0,  0,  0   },	/* PC06: FCC3 INT */
+		{   1,  0,  0,  0,  0,  0   },	/* PC05: FCC2 INT */
+		{   1,  0,  0,  0,  0,  0   },	/* PC04: FCC1 INT */
+		{   0,  1,  1,  1,  0,  0   },	/* PC03: SDMA IDMA2 ~DACK */
+		{   0,  1,  1,  0,  0,  0   },	/* PC02: SDMA IDMA2 ~DONE */
+		{   0,  1,  0,  0,  0,  0   },	/* PC01: SDMA IDMA2 ~DREQ */
+		{   1,  1,  0,  1,  0,  0   }	/* PC00: BRG7 */
+	},

-	/* Port D */
-	{							/*        conf ppar psor pdir podr pdat */
-									/* PD31 */ {1, 1, 0, 0, 0, 0},
-									/* SCC1 UART RxD */
-									/* PD30 */ {1, 1, 1, 1, 0, 0},
-									/* SCC1 UART TxD */
-									/* PD29 */ {1, 0, 0, 1, 0, 0},
-									/* SCC1 UART ~RTS */
-									/* PD28 */ {1, 1, 0, 0, 0, 0},
-									/* SCC2 UART RxD */
-									/* PD27 */ {1, 1, 0, 1, 0, 0},
-									/* SCC2 UART TxD */
-									/* PD26 */ {1, 0, 0, 1, 0, 0},
-									/* SCC2 UART ~RTS */
-									/* PD25 */ {1, 0, 0, 0, 0, 0},
-									/* SCC1 UART ~RI */
-									/* PD24 */ {1, 0, 0, 0, 0, 0},
-									/* SCC2 UART ~RI */
-									/* PD23 */ {1, 0, 0, 1, 0, 0},
-									/* CLKGEN PD */
-									/* PD22 */ {1, 0, 0, 0, 0, 0},
-									/* USER3 */
-									/* PD21 */ {1, 0, 0, 0, 0, 0},
-									/* USER2 */
-									/* PD20 */ {1, 0, 0, 0, 0, 0},
-									/* USER1 */
-									/* PD19 */ {1, 1, 1, 0, 0, 0},
-									/* SPI ~SEL */
-									/* PD18 */ {1, 1, 1, 0, 0, 0},
-									/* SPI CLK */
-									/* PD17 */ {1, 1, 1, 0, 0, 0},
-									/* SPI MOSI */
-									/* PD16 */ {1, 1, 1, 0, 0, 0},
-									/* SPI MISO */
-									/* PD15 */ {1, 1, 1, 0, 1, 0},
-									/* I2C SDA */
-									/* PD14 */ {1, 1, 1, 0, 1, 0},
-									/* I2C SCL */
-									/* PD13 */ {1, 0, 0, 1, 0, 1},
-									/* TEMP ~STDBY */
-									/* PD12 */ {1, 0, 0, 1, 0, 1},
-									/* FCC3 ~RESET */
-									/* PD11 */ {1, 0, 0, 1, 0, 1},
-									/* FCC2 ~RESET */
-									/* PD10 */ {1, 0, 0, 1, 0, 1},
-									/* FCC1 ~RESET */
-									/* PD9  */ {1, 0, 0, 0, 0, 0},
-									/* PD9 */
-									/* PD8  */ {1, 0, 0, 0, 0, 0},
-									/* PD8 */
-									/* PD7  */ {1, 0, 0, 1, 0, 1},
-									/* PD7 */
-									/* PD6  */ {1, 0, 0, 1, 0, 1},
-									/* PD6 */
-									/* PD5  */ {1, 0, 0, 1, 0, 1},
-									/* PD5 */
-									/* PD4  */ {1, 0, 0, 1, 0, 1},
-									/* PD4 */
-									/* PD3  */ {0, 0, 0, 0, 0, 0},
-									/* pin doesn't exist */
-									/* PD2  */ {0, 0, 0, 0, 0, 0},
-									/* pin doesn't exist */
-									/* PD1  */ {0, 0, 0, 0, 0, 0},
-									/* pin doesn't exist */
-									/* PD0  */ {0, 0, 0, 0, 0, 0}
-									/* pin doesn't exist */
-	 }
+	/* Port D configuration */
+	{
+		/* cnf par sor dir odr dat */
+		{   1,  1,  0,  0,  0,  0   },	/* PD31: SCC1 UART RxD */
+		{   1,  1,  1,  1,  0,  0   },	/* PD30: SCC1 UART TxD */
+		{   1,  0,  0,  1,  0,  0   },	/* PD29: SCC1 UART ~RTS */
+		{   1,  1,  0,  0,  0,  0   },	/* PD28: SCC2 UART RxD */
+		{   1,  1,  0,  1,  0,  0   },	/* PD27: SCC2 UART TxD */
+		{   1,  0,  0,  1,  0,  0   },	/* PD26: SCC2 UART ~RTS */
+		{   1,  0,  0,  0,  0,  0   },	/* PD25: SCC1 UART ~RI */
+		{   1,  0,  0,  0,  0,  0   },	/* PD24: SCC2 UART ~RI */
+		{   1,  0,  0,  1,  0,  0   },	/* PD23: CLKGEN PD */
+		{   1,  0,  0,  0,  0,  0   },	/* PD22: USER3 */
+		{   1,  0,  0,  0,  0,  0   },	/* PD21: USER2 */
+		{   1,  0,  0,  0,  0,  0   },	/* PD20: USER1 */
+		{   1,  1,  1,  0,  0,  0   },	/* PD19: SPI ~SEL */
+		{   1,  1,  1,  0,  0,  0   },	/* PD18: SPI CLK */
+		{   1,  1,  1,  0,  0,  0   },	/* PD17: SPI MOSI */
+		{   1,  1,  1,  0,  0,  0   },	/* PD16: SPI MISO */
+		{   1,  1,  1,  0,  1,  0   },	/* PD15: I2C SDA */
+		{   1,  1,  1,  0,  1,  0   },	/* PD14: I2C SCL */
+		{   1,  0,  0,  1,  0,  1   },	/* PD13: TEMP ~STDBY */
+		{   1,  0,  0,  1,  0,  1   },	/* PD12: FCC3 ~RESET */
+		{   1,  0,  0,  1,  0,  1   },	/* PD11: FCC2 ~RESET */
+		{   1,  0,  0,  1,  0,  1   },	/* PD10: FCC1 ~RESET */
+		{   1,  0,  0,  0,  0,  0   },	/* PD09: PD9 */
+		{   1,  0,  0,  0,  0,  0   },	/* PD08: PD8 */
+		{   1,  0,  0,  1,  0,  1   },	/* PD07: PD7 */
+		{   1,  0,  0,  1,  0,  1   },	/* PD06: PD6 */
+		{   1,  0,  0,  1,  0,  1   },	/* PD05: PD5 */
+		{   1,  0,  0,  1,  0,  1   },	/* PD04: PD4 */
+		{   0,  0,  0,  0,  0,  0   },	/* PD03: pin doesn't exist */
+		{   0,  0,  0,  0,  0,  0   },	/* PD02: pin doesn't exist */
+		{   0,  0,  0,  0,  0,  0   },	/* PD01: pin doesn't exist */
+		{   0,  0,  0,  0,  0,  0   }	/* PD00: pin doesn't exist */
+	}
 };

 /* ------------------------------------------------------------------------- */
@@ -334,17 +209,36 @@ const iop_conf_t iop_conf_tab[4][32] = {
 *
 * the data is written to the FS6377 via the i2c bus using address in
 * "fs6377_addr" (address is 7 bits - R/W bit not included).
+ *
+ * The fs6377 has four clock outputs: A, B, C and D.
+ *
+ * Outputs C and D can each provide two different clock outputs C1/D1 or
+ * C2/D2 depending on the state of the SEL_CD input which is connected to
+ * the MPC8260 I/O port pin PA11. PA11 output (SEL_CD input) low (or 0)
+ * selects C1/D1 and PA11 output (SEL_CD input) high (or 1) selects C2/D2.
+ *
+ * PA11 defaults to output low (or 0) in the i/o port config table above.
+ *
+ * Output A provides a 100MHz for the High Speed Serial chips. Output B
+ * provides a 3.6864MHz clock for more accurate asynchronous serial bit
+ * rates. Output C is routed to the mezzanine connector but is currently
+ * unused - both C1 and C2 are set to 16MHz. Output D is used by both the
+ * alt-input and display mezzanine boards for their video chips. The
+ * alt-input board requires a clock of 24.576MHz and this is available on
+ * D1 (PA11=SEL_CD=0). The display board requires a clock of 27MHz and this
+ * is available on D2 (PA11=SEL_CD=1).
+ *
+ * So the default is a clock suitable for the alt-input board. PA11 is toggled
+ * later in misc_init_r(), if a display board is detected.
 */

 uchar fs6377_addr = 0x5c;

 uchar fs6377_regs[16] = {
-	12, 75, 64, 25, 144, 128, 25, 192,
-	0, 16, 135, 192, 224, 64, 64, 192
+	 12,  75,  64,  25, 144, 128,  25, 192,
+	  0,  16, 135, 192, 224,  64,  64, 192
 };

-iopin_t pa11 = { IOPIN_PORTA, 11, 0 };
-
 /* ------------------------------------------------------------------------- */

 /*
@@ -356,7 +250,8 @@ iopin_t pa11 = { IOPIN_PORTA, 11, 0 };
 * the timebase, for udelay())
 */

-int board_postclk_init (void)
+int
+board_postclk_init (void)
 {
 	i2c_init (CFG_I2C_SPEED, CFG_I2C_SLAVE);

@@ -371,7 +266,7 @@ int board_postclk_init (void)
 	 * if this doesn't work
 	 */
 	(void) i2c_write (fs6377_addr, 0, 1, fs6377_regs,
-					  sizeof (fs6377_regs));
+					sizeof (fs6377_regs));

 	return (0);
 }
@@ -382,7 +277,8 @@ int board_postclk_init (void)
 * Check Board Identity: Hardwired to HYMOD
 */

-int checkboard (void)
+int
+checkboard (void)
 {
 	puts ("Board: HYMOD\n");
 	return (0);
@@ -446,7 +342,8 @@ uint upmc_table[] = {
 	_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_
 };

-int misc_init_f (void)
+int
+misc_init_f (void)
 {
 	volatile immap_t *immap = (immap_t *) CFG_IMMR;
 	volatile memctl8260_t *memctl = &immap->im_memctl;
@@ -465,7 +362,8 @@ int misc_init_f (void)

 /* ------------------------------------------------------------------------- */

-long initdram (int board_type)
+long
+initdram (int board_type)
 {
 	volatile immap_t *immap = (immap_t *) CFG_IMMR;
 	volatile memctl8260_t *memctl = &immap->im_memctl;
@@ -523,280 +421,95 @@ long initdram (int board_type)
 /* containing information to be stored in the eeprom from the tftp server    */
 /* (the file name is based on the serial number and a built-in path)	     */

-/* these are relative to the root of the server's tftp directory */
-static char *bddb_cfgdir = "/hymod/bddb";
-static char *global_env_path = "/hymod/global_env";
-
-static ulong get_serno (const char *prompt)
-{
-	for (;;) {
-		int n;
-		char *p;
-		ulong serno;
-
-		n = readline (prompt);
-
-		if (n < 0)
-			return (0);
-
-		if (n == 0)
-			continue;
-
-		serno = simple_strtol (console_buffer, &p, 10);
-
-		if (p > console_buffer && *p == '\0')
-			return (serno);
-
-		printf ("Invalid number (%s) - please re-enter\n", console_buffer);
-	}
-}
-
-static int read_eeprom (char *label, unsigned offset, hymod_eeprom_t * ep)
-{
-	char filename[50], prompt[50];
-	ulong serno;
-	int count = 0;
-
-	sprintf (prompt, "Enter %s board serial number: ", label);
-
-	for (;;) {
-
-		if (eeprom_load (offset, ep))
-			return (1);
-
-		printf ("*** %s board EEPROM contents are %sinvalid\n",
-				label, count == 0 ? "" : "STILL ");
-
-		puts ("*** will attempt to fetch from server (Ctrl-C to abort)\n");
-
-		if ((serno = get_serno (prompt)) == 0) {
-			puts ("\n*** interrupted! - ignoring eeprom contents\n");
-			return (0);
-		}
-
-		sprintf (filename, "%s/%010lu.cfg", bddb_cfgdir, serno);
-
-		printf ("*** fetching %s board EEPROM contents from server\n",
-				label);
-
-		if (eeprom_fetch (offset, filename, 0x100000) == 0) {
-			puts ("*** fetch failed - ignoring eeprom contents\n");
-			return (0);
-		}
-
-		count++;
-	}
-}
-
-static ulong main_serno;
-
-static int env_fetch_callback (uchar * name, uchar * value)
-{
-	char *ov, nv[CFG_CBSIZE], *p, *q, *nn;
-	int override = 1, append = 0, nl;
-
-	nn = name;
-	if (*nn == '-') {
-		override = 0;
-		nn++;
-	}
-
-	if ((nl = strlen (nn)) > 0 && nn[nl - 1] == '+') {
-		append = 1;
-		nn[--nl] = '\0';
-	}
-
-	p = value;
-	q = nv;
-
-	while ((*q = *p++) != '\0')
-		if (*q == '%') {
-			switch (*p++) {
-
-			case '\0':			/* whoops - back up */
-				p--;
-				break;
-
-			case '%':			/* a single percent character */
-				q++;
-				break;
-
-			case 's':			/* main board serial number as string */
-				q += sprintf (q, "%010lu", main_serno);
-				break;
-
-			case 'S':			/* main board serial number as number */
-				q += sprintf (q, "%lu", main_serno);
-				break;
-
-			default:			/* ignore any others */
-				break;
-			}
-		} else
-			q++;
-
-	if ((ov = getenv (nn)) != NULL) {
-
-		if (append) {
-
-			if (strstr (ov, nv) == NULL) {
-				int ovl, nvl;
-
-				printf ("Appending '%s' to env cmd '%s'\n", nv, nn);
-
-				ovl = strlen (ov);
-				nvl = strlen (nv);
-
-				while (nvl >= 0) {
-					nv[ovl + 1 + nvl] = nv[nvl];
-					nvl--;
-				}
-
-				nv[ovl] = ' ';
-
-				while (--ovl >= 0)
-					nv[ovl] = ov[ovl];
-
-				setenv (nn, nv);
-			}
-
-			return (1);
-		}
-
-		if (!override || strcmp (ov, nv) == 0)
-			return (1);
-
-		printf ("Re-setting env cmd '%s' from '%s' to '%s'\n", nn, ov, nv);
-	} else
-		printf ("Setting env cmd '%s' to '%s'\n", nn, nv);
-
-	setenv (nn, nv);
-	return (1);
-}
-
-int misc_init_r (void)
+int
+last_stage_init (void)
 {
 	DECLARE_GLOBAL_DATA_PTR;

 	hymod_conf_t *cp = &gd->bd->bi_hymod_conf;
 	int rc;

+#ifdef CONFIG_BOOT_RETRY_TIME
+	/*
+	 * we use the readline () function, but we also want
+	 * command timeout enabled
+	 */
+	init_cmd_timeout ();
+#endif
+
 	memset ((void *) cp, 0, sizeof (*cp));

 	/* set up main board config info */

-	if (i2c_probe (CFG_I2C_EEPROM_ADDR | HYMOD_EEOFF_MAIN)) {
+	rc = hymod_eeprom_read (0, &cp->main.eeprom);

-		if (read_eeprom
-			("main", HYMOD_EEOFF_MAIN << 8, &cp->main.eeprom))
-			cp->main.eeprom_valid = 1;
+	puts ("EEPROM:main...");
+	if (rc < 0)
+		puts ("NOT PRESENT\n");
+	else if (rc == 0)
+		puts ("INVALID\n");
+	else {
+		cp->main.eeprom.valid = 1;

-		puts ("EEPROM:main...");
+		printf ("OK (ver %u)\n", cp->main.eeprom.ver);
+		hymod_eeprom_print (&cp->main.eeprom);

-		if (cp->main.eeprom_valid) {
-			printf ("OK (ver %u)\n", cp->main.eeprom.ver);
-			eeprom_print (&cp->main.eeprom);
-			main_serno = cp->main.eeprom.serno;
-		} else
-			puts ("BAD\n");
+		/*
+		 * hard-wired assumption here: all hymod main boards will have
+		 * one xilinx fpga, with the interrupt line connected to IRQ2
+		 *
+		 * One day, this might be based on the board type
+		 */

-		cp->main.mmap[0].prog.exists = 1;
-		cp->main.mmap[0].prog.size = FPGA_MAIN_CFG_SIZE;
-		cp->main.mmap[0].prog.base = FPGA_MAIN_CFG_BASE;
+		cp->main.xlx[0].mmap.prog.exists = 1;
+		cp->main.xlx[0].mmap.prog.size = FPGA_MAIN_CFG_SIZE;
+		cp->main.xlx[0].mmap.prog.base = FPGA_MAIN_CFG_BASE;

-		cp->main.mmap[0].reg.exists = 1;
-		cp->main.mmap[0].reg.size = FPGA_MAIN_REG_SIZE;
-		cp->main.mmap[0].reg.base = FPGA_MAIN_REG_BASE;
+		cp->main.xlx[0].mmap.reg.exists = 1;
+		cp->main.xlx[0].mmap.reg.size = FPGA_MAIN_REG_SIZE;
+		cp->main.xlx[0].mmap.reg.base = FPGA_MAIN_REG_BASE;

-		cp->main.mmap[0].port.exists = 1;
-		cp->main.mmap[0].port.size = FPGA_MAIN_PORT_SIZE;
-		cp->main.mmap[0].port.base = FPGA_MAIN_PORT_BASE;
+		cp->main.xlx[0].mmap.port.exists = 1;
+		cp->main.xlx[0].mmap.port.size = FPGA_MAIN_PORT_SIZE;
+		cp->main.xlx[0].mmap.port.base = FPGA_MAIN_PORT_BASE;

-		cp->main.iopins[0].prog_pin.port = FPGA_MAIN_PROG_PORT;
-		cp->main.iopins[0].prog_pin.pin = FPGA_MAIN_PROG_PIN;
-		cp->main.iopins[0].prog_pin.flag = 1;
-		cp->main.iopins[0].init_pin.port = FPGA_MAIN_INIT_PORT;
-		cp->main.iopins[0].init_pin.pin = FPGA_MAIN_INIT_PIN;
-		cp->main.iopins[0].init_pin.flag = 1;
-		cp->main.iopins[0].done_pin.port = FPGA_MAIN_DONE_PORT;
-		cp->main.iopins[0].done_pin.pin = FPGA_MAIN_DONE_PIN;
-		cp->main.iopins[0].done_pin.flag = 1;
+		cp->main.xlx[0].iopins.prog_pin.port = FPGA_MAIN_PROG_PORT;
+		cp->main.xlx[0].iopins.prog_pin.pin = FPGA_MAIN_PROG_PIN;
+		cp->main.xlx[0].iopins.prog_pin.flag = 1;
+		cp->main.xlx[0].iopins.init_pin.port = FPGA_MAIN_INIT_PORT;
+		cp->main.xlx[0].iopins.init_pin.pin = FPGA_MAIN_INIT_PIN;
+		cp->main.xlx[0].iopins.init_pin.flag = 1;
+		cp->main.xlx[0].iopins.done_pin.port = FPGA_MAIN_DONE_PORT;
+		cp->main.xlx[0].iopins.done_pin.pin = FPGA_MAIN_DONE_PIN;
+		cp->main.xlx[0].iopins.done_pin.flag = 1;
 #ifdef FPGA_MAIN_ENABLE_PORT
-		cp->main.iopins[0].enable_pin.port = FPGA_MAIN_ENABLE_PORT;
-		cp->main.iopins[0].enable_pin.pin = FPGA_MAIN_ENABLE_PIN;
-		cp->main.iopins[0].enable_pin.flag = 1;
+		cp->main.xlx[0].iopins.enable_pin.port = FPGA_MAIN_ENABLE_PORT;
+		cp->main.xlx[0].iopins.enable_pin.pin = FPGA_MAIN_ENABLE_PIN;
+		cp->main.xlx[0].iopins.enable_pin.flag = 1;
 #endif
-	} else
-		puts ("EEPROM:main...NOT PRESENT\n");
+
+		cp->main.xlx[0].irq = FPGA_MAIN_IRQ;
+	}

 	/* set up mezzanine board config info */

-	if (i2c_probe (CFG_I2C_EEPROM_ADDR | HYMOD_EEOFF_MEZZ)) {
+	rc = hymod_eeprom_read (1, &cp->mezz.eeprom);

-		if (read_eeprom
-			("mezz", HYMOD_EEOFF_MEZZ << 8, &cp->mezz.eeprom))
-			cp->mezz.eeprom_valid = 1;
+	puts ("EEPROM:mezz...");
+	if (rc < 0)
+		puts ("NOT PRESENT\n");
+	else if (rc == 0)
+		puts ("INVALID\n");
+	else {
+		cp->main.eeprom.valid = 1;

-		puts ("EEPROM:mezz...");
-
-		if (cp->mezz.eeprom_valid) {
-			printf ("OK (ver %u)\n", cp->mezz.eeprom.ver);
-			eeprom_print (&cp->mezz.eeprom);
-		} else
-			puts ("BAD\n");
-
-		cp->mezz.mmap[0].prog.exists = 1;
-		cp->mezz.mmap[0].prog.size = FPGA_MEZZ_CFG_SIZE;
-		cp->mezz.mmap[0].prog.base = FPGA_MEZZ_CFG_BASE;
-
-		cp->mezz.mmap[0].reg.exists = 0;
-
-		cp->mezz.mmap[0].port.exists = 0;
-
-		cp->mezz.iopins[0].prog_pin.port = FPGA_MEZZ_PROG_PORT;
-		cp->mezz.iopins[0].prog_pin.pin = FPGA_MEZZ_PROG_PIN;
-		cp->mezz.iopins[0].prog_pin.flag = 1;
-		cp->mezz.iopins[0].init_pin.port = FPGA_MEZZ_INIT_PORT;
-		cp->mezz.iopins[0].init_pin.pin = FPGA_MEZZ_INIT_PIN;
-		cp->mezz.iopins[0].init_pin.flag = 1;
-		cp->mezz.iopins[0].done_pin.port = FPGA_MEZZ_DONE_PORT;
-		cp->mezz.iopins[0].done_pin.pin = FPGA_MEZZ_DONE_PIN;
-		cp->mezz.iopins[0].done_pin.flag = 1;
-#ifdef FPGA_MEZZ_ENABLE_PORT
-		cp->mezz.iopins[0].enable_pin.port = FPGA_MEZZ_ENABLE_PORT;
-		cp->mezz.iopins[0].enable_pin.pin = FPGA_MEZZ_ENABLE_PIN;
-		cp->mezz.iopins[0].enable_pin.flag = 1;
-#endif
-
-		if (cp->mezz.eeprom_valid &&
-			cp->mezz.eeprom.bdtype == HYMOD_BDTYPE_DISPLAY) {
-			/*
-			 * mezzanine board is a display board - switch the SEL_CD
-			 * input of the FS6377 clock generator (via I/O Port Pin PA11) to
-			 * high (or 1) to select the 27MHz required by the display board
-			 */
-			iopin_set_high (&pa11);
-
-			puts ("SEL_CD:toggled for display board\n");
-		}
-	} else
-		puts ("EEPROM:mezz...NOT PRESENT\n");
-
-	cp->crc =
-			crc32 (0, (unsigned char *) cp, offsetof (hymod_conf_t, crc));
-
-	if (getenv ("global_env_loaded") == NULL) {
-
-		puts ("*** global environment has not been loaded\n");
-		puts ("*** fetching from server (Control-C to Abort)\n");
-
-		rc = fetch_and_parse (global_env_path, 0x100000,
-							  env_fetch_callback);
-
-		if (rc == 0)
-			puts ("*** Fetch of environment failed!\n");
-		else
-			setenv ("global_env_loaded", "yes");
+		printf ("OK (ver %u)\n", cp->mezz.eeprom.ver);
+		hymod_eeprom_print (&cp->mezz.eeprom);
 	}
+
+	cp->crc = crc32 (0, (unsigned char *)cp, offsetof (hymod_conf_t, crc));
+
+	hymod_check_env ();
+
 	return (0);
 }
--- a/board/hymod/hymod.h
+++ b/board/hymod/hymod.h
@@ -0,0 +1,322 @@
+/*
+ * (C) Copyright 2001
+ * Murray Jensen, CSIRO-MIT, <Murray.Jensen@csiro.au>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef _HYMOD_H_
+#define _HYMOD_H_
+
+#include <linux/config.h>
+#ifdef CONFIG_8260
+#include <asm/iopin_8260.h>
+#endif
+
+/*
+ * hymod configuration data - passed by boot code via the board information
+ * structure (only U-Boot has support for this at the moment)
+ *
+ * there are three types of data passed up from the boot monitor. the first
+ * (type hymod_eeprom_t) is the eeprom data that was read off both the main
+ * (or mother) board and the mezzanine board (if any). this data defines how
+ * many Xilinx fpgas are on each board, and their types (among other things).
+ * the second type of data (type xlx_mmap_t, one per Xilinx fpga) defines where
+ * in the physical address space the various Xilinx fpga access regions have
+ * been mapped by the boot rom. the third type of data (type xlx_iopins_t,
+ * one per Xilinx fpga) defines which io port pins are connected to the various
+ * signals required to program a Xilinx fpga.
+ *
+ * A ram/flash "bank" refers to memory controlled by the same chip select.
+ *
+ * the eeprom contents are defined as in technical note #2 - basically,
+ * a header, zero or more records in no particular order, and a 32 bit crc
+ * a record is 1 or more type bytes, a length byte and "length" bytes.
+ */
+
+#define HYMOD_EEPROM_ID		0xAA	/* eeprom id byte */
+#define HYMOD_EEPROM_VER	1	/* eeprom contents version (0-127) */
+#define HYMOD_EEPROM_SIZE	256	/* number of bytes in the eeprom */
+
+/* eeprom header */
+typedef
+    struct {
+	unsigned char id;		/* eeprom id byte */
+	unsigned char :1;
+	unsigned char ver:7;		/* eeprom contents version number */
+	unsigned long len;		/* total # of bytes btw hdr and crc */
+    }
+hymod_eehdr_t;
+
+/* maximum number of bytes available for eeprom data records */
+#define HYMOD_EEPROM_MAXLEN	(HYMOD_EEPROM_SIZE \
+					- sizeof (hymod_eehdr_t) \
+					- sizeof (unsigned long))
+
+/* eeprom data record */
+typedef
+    union {
+	struct {
+	    unsigned char topbit:1;
+	    unsigned char type:7;
+	    unsigned char len;
+	    unsigned char data[1];	/* variable length */
+	} small;
+	struct {
+	    unsigned short topbit:1;
+	    unsigned short nxtbit:1;
+	    unsigned short type:14;
+	    unsigned short len;
+	    unsigned char data[1];	/* variable length */
+	} medium;
+	struct {
+	    unsigned long topbit:1;
+	    unsigned long nxtbit:1;
+	    unsigned long type:30;
+	    unsigned long len;
+	    unsigned char data[1];	/* variable length */
+	} large;
+    }
+hymod_eerec_t;
+
+#define HYMOD_EEOFF_MAIN	0x00	/* i2c addr offset for main eeprom */
+#define HYMOD_EEOFF_MEZZ	0x04	/* i2c addr offset for mezz eepomr */
+
+/* eeprom record types */
+#define HYMOD_EEREC_SERNO	1	/* serial number */
+#define HYMOD_EEREC_DATE	2	/* date */
+#define HYMOD_EEREC_BATCH	3	/* batch id */
+#define HYMOD_EEREC_TYPE	4	/* board type */
+#define HYMOD_EEREC_REV		5	/* revision number */
+#define HYMOD_EEREC_SDRAM	6	/* sdram sizes */
+#define HYMOD_EEREC_FLASH	7	/* flash sizes */
+#define HYMOD_EEREC_ZBT		8	/* zbt ram sizes */
+#define HYMOD_EEREC_XLXTYP	9	/* Xilinx fpga types */
+#define HYMOD_EEREC_XLXSPD	10	/* Xilinx fpga speeds */
+#define HYMOD_EEREC_XLXTMP	11	/* Xilinx fpga temperatures */
+#define HYMOD_EEREC_XLXGRD	12	/* Xilinx fpga grades */
+#define HYMOD_EEREC_CPUTYP	13	/* Motorola CPU type */
+#define HYMOD_EEREC_CPUSPD	14	/* CPU speed */
+#define HYMOD_EEREC_BUSSPD	15	/* bus speed */
+#define HYMOD_EEREC_CPMSPD	16	/* CPM speed */
+#define HYMOD_EEREC_HSTYPE	17	/* high-speed serial chip type */
+#define HYMOD_EEREC_HSCHIN	18	/* high-speed serial input channels */
+#define HYMOD_EEREC_HSCHOUT	19	/* high-speed serial output channels */
+
+/* some dimensions */
+#define HYMOD_MAX_BATCH		32	/* max no. of bytes in batch id */
+#define HYMOD_MAX_SDRAM		4	/* max sdram "banks" on any board */
+#define HYMOD_MAX_FLASH		4	/* max flash "banks" on any board */
+#define HYMOD_MAX_ZBT		16	/* max ZBT rams on any board */
+#define HYMOD_MAX_XLX		4	/* max Xilinx fpgas on any board */
+
+#define HYMOD_MAX_BYTES		16	/* enough to store any bytes array */
+
+/* board types */
+#define HYMOD_BDTYPE_NONE	0	/* information not present */
+#define HYMOD_BDTYPE_IO		1	/* I/O main board */
+#define HYMOD_BDTYPE_CLP	2	/* CLP main board */
+#define HYMOD_BDTYPE_DSP	3	/* DSP main board */
+#define HYMOD_BDTYPE_INPUT	4	/* video input mezzanine board */
+#define HYMOD_BDTYPE_ALTINPUT	5	/* video input mezzanine board */
+#define HYMOD_BDTYPE_DISPLAY	6	/* video display mezzanine board */
+#define HYMOD_BDTYPE_MAX	7	/* first invalid value */
+
+/* Xilinx fpga types */
+#define HYMOD_XTYP_NONE		0	/* information not present */
+#define HYMOD_XTYP_XCV300E	1	/* Xilinx Virtex 300 */
+#define HYMOD_XTYP_XCV400E	2	/* Xilinx Virtex 400 */
+#define HYMOD_XTYP_XCV600E	3	/* Xilinx Virtex 600 */
+#define HYMOD_XTYP_MAX		4	/* first invalid value */
+
+/* Xilinx fpga speeds */
+#define HYMOD_XSPD_NONE		0	/* information not present */
+#define HYMOD_XSPD_SIX		1
+#define HYMOD_XSPD_SEVEN	2
+#define HYMOD_XSPD_EIGHT	3
+#define HYMOD_XSPD_MAX		4	/* first invalid value */
+
+/* Xilinx fpga temperatures */
+#define HYMOD_XTMP_NONE		0	/* information not present */
+#define HYMOD_XTMP_COM		1
+#define HYMOD_XTMP_IND		2
+#define HYMOD_XTMP_MAX		3	/* first invalid value */
+
+/* Xilinx fpga grades */
+#define HYMOD_XTMP_NONE		0	/* information not present */
+#define HYMOD_XTMP_NORMAL	1
+#define HYMOD_XTMP_ENGSAMP	2
+#define HYMOD_XTMP_MAX		3	/* first invalid value */
+
+/* CPU types */
+#define HYMOD_CPUTYPE_NONE	0	/* information not present */
+#define HYMOD_CPUTYPE_MPC8260	1	/* Motorola MPC8260 embedded powerpc */
+#define HYMOD_CPUTYPE_MAX	2	/* first invalid value */
+
+/* CPU/BUS/CPM clock speeds */
+#define HYMOD_CLKSPD_NONE	0	/* information not present */
+#define HYMOD_CLKSPD_33MHZ	1
+#define HYMOD_CLKSPD_66MHZ	2
+#define HYMOD_CLKSPD_100MHZ	3
+#define HYMOD_CLKSPD_133MHZ	4
+#define HYMOD_CLKSPD_166MHZ	5
+#define HYMOD_CLKSPD_200MHZ	6
+#define HYMOD_CLKSPD_MAX	7	/* first invalid value */
+
+/* high speed serial chip types */
+#define HYMOD_HSSTYPE_NONE	0	/* information not present */
+#define HYMOD_HSSTYPE_AMCC52064	1
+#define HYMOD_HSSTYPE_MAX	2	/* first invalid value */
+
+/* a date (yyyy-mm-dd) */
+typedef
+    struct {
+	unsigned short year;
+	unsigned char month;
+	unsigned char day;
+    }
+hymod_date_t;
+
+/* describes a Xilinx fpga */
+typedef
+    struct {
+	unsigned char type;		/* chip type */
+	unsigned char speed;		/* chip speed rating */
+	unsigned char temp;		/* chip temperature rating */
+	unsigned char grade;		/* chip grade */
+    }
+hymod_xlx_t;
+
+/* describes a Motorola embedded processor */
+typedef
+    struct {
+	unsigned char type;		/* CPU type */
+	unsigned char cpuspd;		/* speed of the PowerPC core */
+	unsigned char busspd;		/* speed of the system and 60x bus */
+	unsigned char cpmspd;		/* speed of the CPM co-processor */
+    }
+hymod_mpc_t;
+
+/* info about high-speed (1Gbit) serial interface */
+typedef
+    struct {
+	unsigned char type;		/* high-speed serial chip type */
+	unsigned char nchin;		/* number of input channels mounted */
+	unsigned char nchout;		/* number of output channels mounted */
+    }
+hymod_hss_t;
+
+/*
+ * this defines the contents of the serial eeprom that exists on every
+ * hymod board, including mezzanine boards (the serial eeprom will be
+ * faked for early development boards that don't have one)
+ */
+
+typedef
+    struct {
+	unsigned char valid:1;		/* contents of this struct is valid */
+	unsigned char ver:7;		/* eeprom contents version */
+	unsigned char bdtype;		/* board type */
+	unsigned char bdrev;		/* board revision */
+	unsigned char batchlen;		/* length of batch string below */
+	unsigned long serno;		/* serial number */
+	hymod_date_t date;		/* manufacture date */
+	unsigned char batch[32];	/* manufacturer specific batch id */
+	unsigned char nsdram;		/* # of ram "banks" */
+	unsigned char nflash;		/* # of flash "banks" */
+	unsigned char nzbt;		/* # of ZBT rams */
+	unsigned char nxlx;		/* # of Xilinx fpgas */
+	unsigned char sdramsz[HYMOD_MAX_SDRAM];	/* log2 of sdram size */
+	unsigned char flashsz[HYMOD_MAX_FLASH];	/* log2 of flash size */
+	unsigned char zbtsz[HYMOD_MAX_ZBT];	/* log2 of ZBT ram size */
+	hymod_xlx_t xlx[HYMOD_MAX_XLX];	/* Xilinx fpga info */
+	hymod_mpc_t mpc;		/* Motorola MPC CPU info */
+	hymod_hss_t hss;		/* high-speed serial info */
+    }
+hymod_eeprom_t;
+
+/*
+ * this defines a region in the processor's physical address space
+ */
+typedef
+    struct {
+	unsigned long exists:1;		/* 1 if the region exists, 0 if not */
+	unsigned long size:31;		/* size in bytes */
+	unsigned long base;		/* base address */
+    }
+xlx_prgn_t;
+
+/*
+ * this defines where the various Xilinx fpga access regions are mapped
+ * into the physical address space of the processor
+ */
+typedef
+    struct {
+	xlx_prgn_t prog;		/* program access region */
+	xlx_prgn_t reg;			/* register access region */
+	xlx_prgn_t port;		/* port access region */
+    }
+xlx_mmap_t;
+
+/*
+ * this defines which 8260 i/o port pins are connected to the various
+ * signals required for programming a Xilinx fpga
+ */
+typedef
+    struct {
+	iopin_t prog_pin;		/* assert for >= 300ns to program */
+	iopin_t init_pin;		/* goes high when fpga is cleared */
+	iopin_t done_pin;		/* goes high when program is done */
+	iopin_t enable_pin;		/* some fpgas need enabling */
+    }
+xlx_iopins_t;
+
+/* all info about one Xilinx chip */
+typedef
+    struct {
+	xlx_mmap_t mmap;
+	xlx_iopins_t iopins;
+	unsigned long irq:8;		/* h/w intr req number for this fpga */
+    }
+xlx_info_t;
+
+/* all info about one hymod board */
+typedef
+    struct {
+	hymod_eeprom_t eeprom;
+	xlx_info_t xlx[HYMOD_MAX_XLX];
+    }
+hymod_board_t;
+
+/*
+ * this defines the configuration information of a hymod board-set
+ * (main board + possible mezzanine board). In future, there may be
+ * more than one mezzanine board (stackable?) - if so, add a "mezz2"
+ * field, and so on... or make mezz an array?
+ */
+typedef
+    struct {
+	unsigned long ver:8;		/* version control */
+	hymod_board_t main;		/* main board info */
+	hymod_board_t mezz;		/* mezzanine board info */
+	unsigned long crc;		/* ensures kernel and boot prom agree */
+    }
+hymod_conf_t;
+
+#endif /* _HYMOD_H_ */
--- a/Show More
+++ b/Show More
Author	SHA1	Message	Date
wdenk	9a0e21a3a8	Had to move the RTC area for ATC board to upper addresses (0xf5000000, to be specific). The reason is that the RTC first gets accessed before MMU is initialized and, consequently, it needs to be placed at physical addresses which are later mapped to the same virtual addresses (like 0xf5000000 physical is mapped to 0xf5000000 virtual).	2003-06-22 10:30:54 +00:00
wdenk	592c5cabe7	Patch by Murray Jensen, 20 Jun 2003: - hymod update - cleanup (especially for gcc-3.x compilers)	2003-06-21 00:17:24 +00:00
wdenk	72755c7137	Patch by Tom Guilliams, 20 Jun 2003: added CONFIG_750FX support for IBM 750FX processors	2003-06-20 23:10:58 +00:00
wdenk	0332990b85	* Patch by Devin Crumb, 02 Apr 2003: Fix clock divider rounding problem in drivers/serial.c * Patch by Ken Chou, 19 June 2003: Added support for A3000 SBC board (Artis Microsystems Inc.)	2003-06-20 22:36:30 +00:00
wdenk	0b97ab144f	* Patch by Richard Woodruff, 19 June 03: - Fixed smc91c111 driver to sync with the u-boot environment (driver/smc91c111.c). - Added eth_init error return check in NetLoop (net/net.c).	2003-06-19 23:58:30 +00:00
wdenk	6dd652fa4d	Patches by Murray Jensen, 17 Jun 2003: - Hymod board database mods: add "who" field and new xilinx chip types - provide new "init_cmd_timeout()" function so code external to "common/main.c" can use the "reset_cmd_timeout()" function before entering the main loop - add DTT support for adm1021 (new file dtt/adm1021.c; config slightly different. see include/configs/hymod.h for an example (requires CONFIG_DTT_ADM1021, CONFIG_DTT_SENSORS, and CFG_DTT_ADM1021 defined) - add new "eeprom_probe()" function which has similar args and behaves in a similar way to "eeprom_read()" etc. - add 8260 FCC ethernet loopback code (new "eth_loopback_test()" function which is enabled by defining CONFIG_ETHER_LOOPBACK_TEST) - gdbtools copyright update - ensure that set_msr() executes the "sync" and "isync" instructions after the "mtmsr" instruction in cpu/mpc8260/interrupts.c - 8260 I/O ports fix: Open Drain should be set last when configuring - add SIU IRQ defines for 8260 - allow LDSCRIPT override and OBJCFLAGS initialization: change to config.mk to allow board configurations to override the GNU linker script, selected via the LDSCRIPT, make variable, and to give an initial value to the OBJCFLAGS make variable - 8260 i2c enhancement: o correctly extends the timeout depending on the size of all queued messages for both transmit and receive o will not continue with receive if transmit times out o ensures that the error callback is done for all queued tx and rx messages o correctly detects both tx and rx timeouts, only delivers one to the callback, and does not overwrite an earlier error o logic in i2c_probe now correct - add "vprintf()" function so that "panic()" function can be technically correct - many Hymod board changes	2003-06-19 23:40:20 +00:00
wdenk	52f52c1494	Patches by Robert Schwebel, 14 Jun 2003: - add support for Logotronic DL datalogger board - cleanup serial line after kermit binary download - add debugX macro (debug level support) - update mach-types.h to latest arm.linux.org.uk master list.	2003-06-19 23:04:19 +00:00
wdenk	48b42616e9	* Patches by David M�ller, 12 Jun 2003: - rewrite of the S3C24X0 register definitions stuff - "driver" for the built-in S3C24X0 RTC * Patches by Yuli Barcohen, 12 Jun 2003: - Add MII support and Ethernet PHY initialization for MPC8260ADS board - Fix incorrect SIUMCR initialisation caused by wrong Hard Reset configuration word supplied by FPGA on some MPC8260ADS boards * Patch by Pantelis Antoniou, 10 Jun 2003: Unify status LED interface	2003-06-19 23:01:32 +00:00
wdenk	15ef8a5d17	Add support for DS12887 RTC; add RTC support for ATC board	2003-06-18 20:22:24 +00:00
wdenk	2abbe07547	* Patch by Nicolas Lacressonniere, 11 Jun 2003: Modifications for Atmel AT91RM9200DK ARM920T based development kit - Add Atmel DataFlash support for reading and writing. - Add possibility to boot a Linux from DataFlash with BOOTM command. - Add Flash detection on Atmel AT91RM9200DK (between Atmel AT49BV1614 and AT49BV1614A flashes) - Replace old Ethernet PHY layer functions - Change link address * Patch by Frank Smith, 9 Jun 2003: use CRIT_EXCEPTION for machine check on 4xx * Patch by Detlev Zundel, 13 Jun 2003: added implementation of the "carinfo" command in cmd_immap.c	2003-06-16 23:50:08 +00:00
wdenk	71f9511803	* Fix CONFIG_NET_MULTI support in include/net.h * Patches by Kyle Harris, 13 Mar 2003: - Add FAT partition support - Add command support for FAT - Add command support for MMC ---- - Add Intel PXA support for video - Add Intel PXA support for MMC ---- - Enable MMC and FAT for lubbock board - Other misc changes for lubbock board	2003-06-15 22:40:42 +00:00
wdenk	487778b781	Patch by Robert Schwebel, April 02, 2003: fix for SMSC91111 driver	2003-06-06 11:20:01 +00:00
stroese	8b601449e8	- Update new fpga file.	2003-06-06 09:44:40 +00:00
stroese	e58dc13283	- Fix compile bug (PPC4xx).	2003-06-06 09:43:42 +00:00
wdenk	a3ed3996cd	* Patch by Vladimir Gurevich, 04 Jun 2003: make ppc405 ethernet driver compatible with CONFIG_NET_MULTI option	2003-06-05 19:37:36 +00:00
wdenk	73a8b27c57	* Add support for RMU board * Add support for TQM862L at 100/50 MHz * Patch by Pantelis Antoniou, 02 Jun 2003: major reconstruction of networking code; add "ping" support (outgoing only!)	2003-06-05 19:27:42 +00:00
stroese	08eaea9c9f	Patch from Stefan Roese.	2003-06-05 15:44:37 +00:00
stroese	53cf9435cc	- CFG_RX_ETH_BUFFER added.	2003-06-05 15:39:44 +00:00
stroese	c602883592	- CFG_ETH_RX_BUFFER added.	2003-06-05 15:38:29 +00:00
stroese	3720878599	- Fix bug for initial stack in data cache as pointed out by Thomas Schaefer (tschaefer@giga-stream.de). Now inital stack in data cache can be used even if the chip select is in use.	2003-06-05 15:35:20 +00:00
wdenk	f3e0de60a6	* Patch by Denis Peter, 04 June 2003: add support for the MIP405T board	2003-06-04 15:05:30 +00:00
wdenk	682011ff69	* Patches by Udi Finkelstein, 2 June 2003: - Added support for custom keyboards, initialized by defining a board-specific drv_keyboard_init as well as defining CONFIG_KEYBOARD . - Added support for the RBC823 board. - cpu/mpc8xx/lcd.c now automatically calculates the Horizontal Pixel Count field. * Fix alignment problem in BOOTP (dhcp_leasetime option) [pointed out by Nicolas Lacressonni�re, 2 Jun 2003] * Patch by Mark Rakes, 14 May 2003: add support for Intel e1000 gig cards. * Patch by Nye Liu, 3 Jun 2003: fix critical typo in MAMR definition (include/mpc8xx.h) * Fix requirement to align U-Boot image on 16 kB boundaries on PPC. * Patch by Klaus Heydeck, 2 Jun 2003 Minor changes for KUP4K configuration	2003-06-03 23:54:09 +00:00
wdenk	7a8e9bed17	* Patch by Marc Singer, 29 May 2003: Fixed rarp boot method for IA32 and other little-endian CPUs. * Patch by Marc Singer, 28 May 2003: Added port I/O commands. * Patch by Matthew McClintock, 28 May 2003 - cpu/mpc824x/start.S: fix relocation code when booting from RAM - minor patches for utx8245 * Patch by Daniel Engstr�m, 28 May 2003: x86 update * Patch by Dave Ellis, 9 May 2003 + 27 May 2003: add nand flash support to SXNI855T configuration fix/extend nand flash support: - fix 'nand erase' command so does not erase bad blocks - fix 'nand write' command so does not write to bad blocks - fix nand_probe() so handles no flash detected properly - add doc/README.nand - add .jffs2 and .oob options to nand read/write - add 'nand bad' command to list bad blocks - add 'clean' option to 'nand erase' to write JFFS2 clean markers - make NAND read/write faster * Patch by Rune Torgersen, 23 May 2003: Update for MPC8266ADS board	2003-05-31 18:35:21 +00:00
wdenk	3b57fe0a70	* Get (mostly) rid of CFG_MONITOR_LEN definition; compute real length instead CFG_MONITOR_LEN is now only used to determine _at_compile_ _time_ (!) if the environment is embedded within the U-Boot image, or in a separate flash sector. * Cleanup CFG_DER #defines in config files (wd maintained only)	2003-05-30 12:48:29 +00:00
wdenk	f07771cc28	* Fix data abort exception handling for arm920t CPU * Fix alignment problems with flash driver for TRAB board * Patch by Donald White, 21 May 2003: fix calculation of base address in pci_hose_config_device() * Fix bug in command line parsing: "cmd1;cmd2" is supposed to always execute "cmd2", even if "cmd1" fails. Note that this is different to "run var1 var2" where the contents of "var2" will NOT be executed when a command in "var1" fails.	2003-05-28 08:06:31 +00:00
wdenk	38b99261c1	Add zero-copy ramdisk support (requires corresponding kernel support!)	2003-05-23 23:18:21 +00:00
wdenk	4c3b21a5f9	Patch by Kyle Harris, 20 May 2003: In preparation for an ixp port, rename cpu/xscale and arch-xscale into cpu/pxa and arch-pxa.	2003-05-23 12:36:20 +00:00
stroese	d9ff6e84e4	Patch from Stefan Roese.	2003-05-23 11:49:24 +00:00
stroese	e1e89324ad	- ASH405 board added (PPC405EP based). - CPCI4052 added (PPC405GP based). - CPCI405AB added (PPC405GP based). - PCI405 added (PPC405GP based). - PMC405 added (PPC405GP based).	2003-05-23 11:43:00 +00:00
stroese	549826eaa0	- ASH405 board added (PPC405EP based). - BUBINGA405EP added (PPC405EP based). - CPCI405AB added (PPC405GP based). - PMC405 added (PPC405GP based).	2003-05-23 11:41:44 +00:00
stroese	1d49b1f365	CONFIG_UART1_CONSOLE added.	2003-05-23 11:39:05 +00:00
wdenk	33149b8812	Patch by Denis Peter, 19 Mai 2003: add support for the MIP405-3 board	2003-05-23 11:38:58 +00:00
stroese	9919f13cc1	DHCP support added.	2003-05-23 11:38:22 +00:00
stroese	071d897c96	PMC405 board added.	2003-05-23 11:35:47 +00:00
stroese	3871842529	Code cleanup.	2003-05-23 11:35:09 +00:00
stroese	b6d9e4f5af	New FPGA image with 527 support.	2003-05-23 11:34:40 +00:00
stroese	1545ad35c5	Local Bus Timeout increased.	2003-05-23 11:33:57 +00:00
stroese	c231d00f4e	Code reworked for PPC405EP support.	2003-05-23 11:32:53 +00:00
stroese	d4629c8c8d	CPCI405AB (special version of esd CPCI405) board added.	2003-05-23 11:30:39 +00:00
stroese	46578cc018	BUBINGA405EP board added (IBM PPC405EP Eval Board).	2003-05-23 11:28:55 +00:00
stroese	c93f70962b	ASH405 board added (PPC405EP based).	2003-05-23 11:27:18 +00:00
stroese	8749cfb44e	- PPC405EP support added. - CONFIG_UART1_CONSOLE added (see README).	2003-05-23 11:25:57 +00:00
stroese	b867d705b6	PPC405EP support added.	2003-05-23 11:18:02 +00:00
stroese	bedc497029	- PPC405EP support added. - "nand_init" (NAND FLASH) added.	2003-05-23 11:16:49 +00:00