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6 Commits

Author SHA1 Message Date
wdenk
80369866a4 Work on TRAB's auto_update feature.
Cleanup for submitted patches.
2003-09-18 18:55:25 +00:00
wdenk
65bd0e284b * Patch by Rune Torgersen, 17 Sep 2003:
- Fixes for MPC8266 default config
  - Allow eth_loopback_test() on 8260 to use a subset of the FCC's
2003-09-18 10:45:21 +00:00
wdenk
206c60cbea * Patches by Jon Diekema, 17 Sep 2003:
- update README (SHOW_BOOT_PROGRESS values for cmd_nand.c and
    env_common.c)
  - sbc8260 tweaks
  - adjust "help" output
2003-09-18 10:02:25 +00:00
wdenk
5f535fe170 * Patches by Anders Larsen, 17 Sep 2003:
- fix spelling errors
  - set GD_FLG_DEVINIT flag only after device function pointers
    are valid
  - Allow CFG_ALT_MEMTEST on systems where address zero isn't
    writeable
  - enable 3.rd UART (ST-UART) on PXA(XScale) CPUs
  - trigger watchdog while waiting in serial driver
2003-09-18 09:21:33 +00:00
wdenk
b0639ca332 Support new configuration of TRAB board with more memory
Minor cleanup of comments
2003-09-17 22:48:07 +00:00
wdenk
f54ebdfa28 Add auto-update code for TRAB board using USB memory sticks 2003-09-17 15:10:32 +00:00
55 changed files with 955 additions and 207 deletions

View File

@@ -2,6 +2,28 @@
Changes for U-Boot 1.0.0:
======================================================================
* Patch by Rune Torgersen, 17 Sep 2003:
- Fixes for MPC8266 default config
- Allow eth_loopback_test() on 8260 to use a subset of the FCC's
* Patches by Jon Diekema, 17 Sep 2003:
- update README (SHOW_BOOT_PROGRESS values for cmd_nand.c and
env_common.c)
- sbc8260 tweaks
- adjust "help" output
* Patches by Anders Larsen, 17 Sep 2003:
- fix spelling errors
- set GD_FLG_DEVINIT flag only after device function pointers
are valid
- Allow CFG_ALT_MEMTEST on systems where address zero isn't
writeable
- enable 3.rd UART (ST-UART) on PXA(XScale) CPUs
- trigger watchdog while waiting in serial driver
* Add auto-update code for TRAB board using USB memory sticks,
support new configuration with more memory
* disable MPC5200 bus pipelining as workaround for bus contention
* Modify XLB arbiter priorities on MPC5200 so all devices use same

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@@ -796,7 +796,7 @@ shannon_config : unconfig
## ARM92xT Systems
#########################################################################
xtract_trab = $(subst _big_flash,,$(subst _config,,$1))
xtract_trab = $(subst _bigram,,$(subst _bigflash,,$(subst _old,,$(subst _config,,$1))))
omap1510inn_config : unconfig
@./mkconfig $(@:_config=) arm arm925t omap1510inn
@@ -811,11 +811,23 @@ smdk2410_config : unconfig
@./mkconfig $(@:_config=) arm arm920t smdk2410
trab_config \
trab_big_flash_config: unconfig
trab_bigram_config \
trab_bigflash_config \
trab_old_config: unconfig
@ >include/config.h
@[ -z "$(findstring _big_flash,$@)" ] || \
{ echo "#define CONFIG_BIG_FLASH" >>include/config.h ; \
echo "... with big flash support" ; \
@[ -z "$(findstring _bigram,$@)" ] || \
{ echo "#define CONFIG_FLASH_8MB" >>include/config.h ; \
echo "... with 8 MB Flash, 32 MB RAM" ; \
}
@[ -z "$(findstring _bigflash,$@)" ] || \
{ echo "#define CONFIG_RAM_16MB" >>include/config.h ; \
echo "... with 16 MB Flash, 16 MB RAM" ; \
echo "TEXT_BASE = 0x0CF00000" >board/trab/config.tmp ; \
}
@[ -z "$(findstring _old,$@)" ] || \
{ echo "#define CONFIG_OLD_VERSION" >>include/config.h ; \
echo "... with small memory configuration" ; \
echo "TEXT_BASE = 0x0CF00000" >board/trab/config.tmp ; \
}
@./mkconfig -a $(call xtract_trab,$@) arm arm920t trab
@@ -921,7 +933,7 @@ clean:
rm -f tools/gdb/astest tools/gdb/gdbcont tools/gdb/gdbsend
rm -f tools/env/fw_printenv tools/env/fw_setenv
rm -f board/cray/L1/bootscript.c board/cray/L1/bootscript.image
rm -f board/trab/trab_fkt
rm -f board/trab/trab_fkt board/trab/config.tmp
clobber: clean
find . -type f \

12
README
View File

@@ -1416,7 +1416,13 @@ The following options need to be configured:
-1 common/cmd_ide.c Read Error on boot device
-1 common/cmd_ide.c Image header has bad magic number
-1 common/cmd_nvedit.c Environment not changable, but has bad CRC
-1 common/cmd_nand.c Bad usage of "nand" command
-1 common/cmd_nand.c No boot device
-1 common/cmd_nand.c Unknown Chip ID on boot device
-1 common/cmd_nand.c Read Error on boot device
-1 common/cmd_nand.c Image header has bad magic number
-1 common/env_common.c Environment has a bad CRC, using default
Modem Support:
@@ -1498,6 +1504,10 @@ Configuration Settings:
- CFG_ALT_MEMTEST:
Enable an alternate, more extensive memory test.
- CFG_MEMTEST_SCRATCH:
Scratch address used by the alternate memory test
You only need to set this if address zero isn't writeable
- CFG_TFTP_LOADADDR:
Default load address for network file downloads

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@@ -160,7 +160,7 @@ ulong flash_init (void)
if (i == 0)
flashbase = PHYS_FLASH_1;
else
panic ("configured to many flash banks!\n");
panic ("configured too many flash banks!\n");
sector = 0;
start_address = flashbase;

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@@ -59,7 +59,7 @@ ulong flash_init(void)
flashbase = PHYS_FLASH_2;
break;
default:
panic("configured to many flash banks!\n");
panic("configured too many flash banks!\n");
break;
}
for (j = 0; j < flash_info[i].sector_count; j++)

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@@ -62,7 +62,7 @@ ulong flash_init(void)
flashbase = PHYS_FLASH_1;
break;
default:
panic("configured to many flash banks!\n");
panic("configured too many flash banks!\n");
break;
}
for (j = 0; j < flash_info[i].sector_count; j++) {

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@@ -74,7 +74,7 @@ unsigned long flash_init (void)
flash_get_offsets(PHYS_FLASH_1, &flash_info[i]);
break;
default:
panic("configured to many flash banks!\n");
panic("configured too many flash banks!\n");
break;
}
size += flash_info[i].size;

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@@ -50,7 +50,7 @@ ulong flash_init (void)
if (i == 0)
flashbase = PHYS_FLASH_1;
else
panic ("configured to many flash banks!\n");
panic ("configured too many flash banks!\n");
for (j = 0; j < flash_info[i].sector_count; j++) {
flash_info[i].start[j] = flashbase + j * MAIN_SECT_SIZE;
}

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@@ -53,7 +53,7 @@ ulong flash_init(void)
else if (i == 1)
flashbase = PHYS_FLASH_2;
else
panic("configured to many flash banks!\n");
panic("configured too many flash banks!\n");
for (j = 0; j < flash_info[i].sector_count; j++)
{
if (j <= 7)

View File

@@ -276,7 +276,7 @@ ulong flash_init(void)
flashbase = PHYS_FLASH_1;
break;
default:
panic("configured to many flash banks!\n");
panic("configured too many flash banks!\n");
break;
}
for (j = 0; j < flash_info[i].sector_count; j++) {

View File

@@ -86,7 +86,7 @@ ulong flash_init(void)
if (i == 0)
flashbase = PHYS_FLASH_1;
else
panic("configured to many flash banks!\n");
panic("configured too many flash banks!\n");
for (j = 0; j < flash_info[i].sector_count; j++)
{
if (j <= 7)

View File

@@ -91,7 +91,7 @@ ulong flash_init(void)
flashbase = PHYS_FLASH_2;
break;
default:
panic("configured to many flash banks!\n");
panic("configured too many flash banks!\n");
break;
}
for (j = 0; j < flash_info[i].sector_count; j++)

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@@ -76,7 +76,7 @@ unsigned long flash_init (void)
flash_get_offsets (PHYS_FLASH_2, &flash_info[i]);
break;
default:
panic ("configured to many flash banks!\n");
panic ("configured too many flash banks!\n");
break;
}
size += flash_info[i].size;

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@@ -72,7 +72,7 @@ ulong flash_init(void) {
if (i==0)
flashbase = CFG_FLASH_BASE;
else
panic("configured to many flash banks!\n");
panic("configured too many flash banks!\n");
for (j = 0; j < flash_info[i].sector_count; j++)
flash_info[i].start[j]=flashbase + j * SECT_SIZE;

View File

@@ -427,7 +427,7 @@ long int initdram(int board_type)
bsma = ((31 - width) - 14) - ((rows > cols) ? rows : cols);
sda10 = sdam + 2;
#else
sdam = cols - 6;
sdam = cols + banks - 8;
bsma = ((31 - width) - 14) - ((rows > cols) ? rows : cols);
sda10 = sdam;
#endif
@@ -557,9 +557,18 @@ long int initdram(int board_type)
printf("SDRAM configuration read from SPD\n");
printf("\tSize per side = %dMB\n", sdram_size >> 20);
printf("\tOrganization: %d sides, %d banks, %d Columns, %d Rows, Data width = %d bits\n", chipselects, 1<<(banks), cols, rows, data_width);
printf("\tRefresh rate = %d, CAS latency = %d\n", psrt, caslatency);
printf("\tRefresh rate = %d, CAS latency = %d", psrt, caslatency);
#if(CONFIG_PBI == 0) /* bank-based interleaving */
printf(", Using Bank Based Interleave\n");
#else
printf(", Using Page Based Interleave\n");
#endif
printf("\tTotal size: ");
/* this delay only needed for original 16MB DIMM...
* Not needed for any other memory configuration */
if ((sdram_size * chipselects) == (16 *1024 *1024))
udelay (250000);
return (sdram_size * chipselects);
/*return (16 * 1024 * 1024);*/
}
@@ -575,3 +584,4 @@ void pci_init_board(void)
pci_mpc8250_init(&hose);
}
#endif

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@@ -80,7 +80,7 @@ ulong flash_init(void)
if (i == 0)
flashbase = PHYS_FLASH_1;
else
panic("configured to many flash banks!\n");
panic("configured too many flash banks!\n");
for (j = 0; j < flash_info[i].sector_count; j++)
{
if (j <= 3)

View File

@@ -72,7 +72,7 @@ unsigned long flash_init (void)
flash_get_offsets (PHYS_FLASH_1, &flash_info[i]);
break;
default:
panic ("configured to many flash banks!\n");
panic ("configured too many flash banks!\n");
break;
}
size += flash_info[i].size;

View File

@@ -96,7 +96,7 @@ unsigned long flash_init (void)
flash_get_offsets (PHYS_FLASH_1, &flash_info[i]);
break;
default:
panic ("configured to many flash banks!\n");
panic ("configured too many flash banks!\n");
break;
}
size += flash_info[i].size;

View File

@@ -234,7 +234,7 @@ ulong flash_init(void)
flashbase = SC520_FLASH_BANK2_BASE;
break;
default:
panic("configured to many flash banks!\n");
panic("configured too many flash banks!\n");
}
id = identify_flash(flashbase, 4);

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@@ -101,7 +101,7 @@ ulong flash_init(void)
flashbase = SC520_FLASH_BANK0_BASE;
break;
default:
panic("configured to many flash banks!\n");
panic("configured too many flash banks!\n");
}
for (j = 0; j < flash_info[i].sector_count; j++) {

View File

@@ -239,7 +239,7 @@ ulong flash_init(void)
flashbase = SC520_FLASH_BANK0_BASE;
break;
default:
panic("configured to many flash banks!\n");
panic("configured too many flash banks!\n");
}
id = identify_flash(flashbase, 2);

View File

@@ -73,7 +73,7 @@ ulong flash_init(void)
if (i == 0)
flashbase = PHYS_FLASH_1;
else
panic("configured to many flash banks!\n");
panic("configured too many flash banks!\n");
for (j = 0; j < flash_info[i].sector_count; j++)
{

View File

@@ -60,7 +60,7 @@ int board_init (void)
*(unsigned long *)temp = 0x00060006;
}
#endif /* CONFIG_INIT_CRITICAL */
#endif /* CONFIG_INFERNO */
/* arch number for shannon */
gd->bd->bi_arch_number = 97;

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@@ -80,7 +80,7 @@ ulong flash_init(void)
if (i == 0)
flashbase = PHYS_FLASH_1;
else
panic("configured to many flash banks!\n");
panic("configured too many flash banks!\n");
for (j = 0; j < flash_info[i].sector_count; j++)
{
if (j <= 3)

View File

@@ -25,7 +25,7 @@ include $(TOPDIR)/config.mk
LIB = lib$(BOARD).a
OBJS := trab.o flash.o vfd.o cmd_trab.o memory.o tsc2000.o
OBJS := trab.o flash.o vfd.o cmd_trab.o memory.o tsc2000.o auto_update.o
SOBJS := memsetup.o
gcclibdir := $(shell dirname `$(CC) -print-libgcc-file-name`)

594
board/trab/auto_update.c Normal file
View File

@@ -0,0 +1,594 @@
/*
* (C) Copyright 2003
* Gary Jennejohn, DENX Software Engineering, gj@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#include <command.h>
#include <malloc.h>
#include <image.h>
#include <asm/byteorder.h>
#include <usb.h>
#ifdef CFG_HUSH_PARSER
#include <hush.h>
#endif
#ifdef CONFIG_AUTO_UPDATE
#ifndef CONFIG_USB_OHCI
#error "must define CONFIG_USB_OHCI"
#endif
#ifndef CONFIG_USB_STORAGE
#error "must define CONFIG_USB_STORAGE"
#endif
#ifndef CFG_HUSH_PARSER
#error "must define CFG_HUSH_PARSER"
#endif
#if !(CONFIG_COMMANDS & CFG_CMD_FAT)
#error "must define CFG_CMD_FAT"
#endif
/*
* Check whether a USB memory stick is plugged in.
* If one is found:
* 1) if prepare.img ist found load it into memory. If it is
* valid then run it.
* 2) if preinst.img is found load it into memory. If it is
* valid then run it. Update the EEPROM.
* 3) if firmware.img is found load it into memory. If it is valid,
* burn it into FLASH and update the EEPROM.
* 4) if kernel.img is found load it into memory. If it is valid,
* burn it into FLASH and update the EEPROM.
* 5) if app.img is found load it into memory. If it is valid,
* burn it into FLASH and update the EEPROM.
* 6) if disk.img is found load it into memory. If it is valid,
* burn it into FLASH and update the EEPROM.
* 7) if postinst.img is found load it into memory. If it is
* valid then run it. Update the EEPROM.
*/
#undef AU_DEBUG
#undef debug
#ifdef AU_DEBUG
#define debug(fmt,args...) printf (fmt ,##args)
#else
#define debug(fmt,args...)
#endif /* AU_DEBUG */
/* possible names of files on the USB stick. */
#define AU_PREPARE "prepare.img"
#define AU_PREINST "preinst.img"
#define AU_FIRMWARE "firmware.img"
#define AU_KERNEL "kernel.img"
#define AU_APP "app.img"
#define AU_DISK "disk.img"
#define AU_POSTINST "postinst.img"
struct flash_layout
{
long start;
long end;
};
/* layout of the FLASH. ST = start address, ND = end address. */
#ifndef CONFIG_FLASH_8MB /* 16 MB Flash, 32 MB RAM */
#define AU_FL_FIRMWARE_ST 0x00000000
#define AU_FL_FIRMWARE_ND 0x0009FFFF
#define AU_FL_VFD_ST 0x000A0000
#define AU_FL_VFD_ND 0x000BFFFF
#define AU_FL_KERNEL_ST 0x000C0000
#define AU_FL_KERNEL_ND 0x001BFFFF
#define AU_FL_APP_ST 0x001C0000
#define AU_FL_APP_ND 0x005BFFFF
#define AU_FL_DISK_ST 0x005C0000
#define AU_FL_DISK_ND 0x00FFFFFF
#else /* 8 MB Flash, 16 MB RAM */
#define AU_FL_FIRMWARE_ST 0x00000000
#define AU_FL_FIRMWARE_ND 0x0003FFFF
#define AU_FL_KERNEL_ST 0x00040000
#define AU_FL_KERNEL_ND 0x0011FFFF
#define AU_FL_APP_ST 0x00120000
#define AU_FL_APP_ND 0x003FFFFF
#define AU_FL_DISK_ST 0x00400000
#define AU_FL_DISK_ND 0x007DFFFF
#define AU_FL_VFD_ST 0x007E0000
#define AU_FL_VFD_ND 0x007FFFFF
#endif /* CONFIG_FLASH_8MB */
/* a structure with the offsets to values in the EEPROM */
struct eeprom_layout
{
int time;
int size;
int dcrc;
};
/* layout of the EEPROM - offset from the start. All entries are 32 bit. */
#define AU_EEPROM_TIME_PREINST 64
#define AU_EEPROM_SIZE_PREINST 68
#define AU_EEPROM_DCRC_PREINST 72
#define AU_EEPROM_TIME_FIRMWARE 76
#define AU_EEPROM_SIZE_FIRMWARE 80
#define AU_EEPROM_DCRC_FIRMWARE 84
#define AU_EEPROM_TIME_KERNEL 88
#define AU_EEPROM_SIZE_KERNEL 92
#define AU_EEPROM_DCRC_KERNEL 96
#define AU_EEPROM_TIME_APP 100
#define AU_EEPROM_SIZE_APP 104
#define AU_EEPROM_DCRC_APP 108
#define AU_EEPROM_TIME_DISK 112
#define AU_EEPROM_SIZE_DISK 116
#define AU_EEPROM_DCRC_DISK 120
#define AU_EEPROM_TIME_POSTINST 124
#define AU_EEPROM_SIZE_POSTINST 128
#define AU_EEPROM_DCRC_POSTINST 132
static int au_usb_stor_curr_dev; /* current device */
/* index of each file in the following arrays */
#define IDX_PREPARE 0
#define IDX_PREINST 1
#define IDX_FIRMWARE 2
#define IDX_KERNEL 3
#define IDX_APP 4
#define IDX_DISK 5
#define IDX_POSTINST 6
/* max. number of files which could interest us */
#define AU_MAXFILES 7
/* pointers to file names */
char *aufile[AU_MAXFILES];
/* sizes of flash areas for each file */
long ausize[AU_MAXFILES];
/* offsets into the EEEPROM */
struct eeprom_layout auee_off[AU_MAXFILES] = { \
{0}, \
{AU_EEPROM_TIME_PREINST, AU_EEPROM_SIZE_PREINST, AU_EEPROM_DCRC_PREINST,}, \
{AU_EEPROM_TIME_FIRMWARE, AU_EEPROM_SIZE_FIRMWARE, AU_EEPROM_DCRC_FIRMWARE,}, \
{AU_EEPROM_TIME_KERNEL, AU_EEPROM_SIZE_KERNEL, AU_EEPROM_DCRC_KERNEL,}, \
{AU_EEPROM_TIME_APP, AU_EEPROM_SIZE_APP, AU_EEPROM_DCRC_APP,}, \
{AU_EEPROM_TIME_DISK, AU_EEPROM_SIZE_DISK, AU_EEPROM_DCRC_DISK,}, \
{AU_EEPROM_TIME_POSTINST, AU_EEPROM_SIZE_POSTINST, AU_EEPROM_DCRC_POSTINST,} \
};
/* array of flash areas start and end addresses */
struct flash_layout aufl_layout[AU_MAXFILES - 3] = { \
{AU_FL_FIRMWARE_ST, AU_FL_FIRMWARE_ND,}, \
{AU_FL_KERNEL_ST, AU_FL_KERNEL_ND,}, \
{AU_FL_APP_ST, AU_FL_APP_ND,}, \
{AU_FL_DISK_ST, AU_FL_DISK_ND,}, \
};
/* convert the index into aufile[] to an index into aufl_layout[] */
#define FIDX_TO_LIDX(idx) ((idx) - 2)
/* where to load files into memory */
#define LOAD_ADDR ((unsigned char *)0x0C100100)
/* where to build strings in memory - 256 bytes should be enough */
#define STRING_ADDR ((char *)0x0C100000)
/* the disk is the largest image */
#define MAX_LOADSZ ausize[IDX_DISK]
/* externals */
extern int fat_register_device(block_dev_desc_t *, int);
extern int file_fat_detectfs(void);
extern long file_fat_read(const char *, void *, unsigned long);
extern int i2c_read (unsigned char, unsigned int, int , unsigned char* , int);
extern int i2c_write (uchar, uint, int , uchar* , int);
#ifdef CONFIG_VFD
extern int trab_vfd (ulong);
extern int transfer_pic(unsigned char, unsigned char *, int, int);
#endif
/* change char* to void* to shutup the compiler */
extern int i2c_write_multiple (uchar, uint, int, void *, int);
extern int i2c_read_multiple (uchar, uint, int, void *, int);
extern block_dev_desc_t *get_dev (char*, int);
int
au_check_valid(int idx, long nbytes)
{
image_header_t *hdr;
unsigned long checksum;
unsigned char buf[4];
hdr = (image_header_t *)LOAD_ADDR;
/* check the easy ones first */
#undef CHECK_VALID_DEBUG
#ifdef CHECK_VALID_DEBUG
printf("magic %#x %#x ", ntohl(hdr->ih_magic), IH_MAGIC);
printf("arch %#x %#x ", hdr->ih_arch, IH_CPU_ARM);
printf("size %#x %#lx ", ntohl(hdr->ih_size), nbytes);
printf("type %#x %#x ", hdr->ih_type, IH_TYPE_KERNEL);
#endif
if (ntohl(hdr->ih_magic) != IH_MAGIC ||
hdr->ih_arch != IH_CPU_ARM ||
nbytes < ntohl(hdr->ih_size))
{
printf ("Image %s bad MAGIC or ARCH or SIZE\n", aufile[idx]);
return -1;
}
/* check the hdr CRC */
checksum = ntohl(hdr->ih_hcrc);
hdr->ih_hcrc = 0;
if (crc32 (0, (char *)hdr, sizeof(*hdr)) != checksum) {
printf ("Image %s bad header checksum\n", aufile[idx]);
return -1;
}
hdr->ih_hcrc = htonl(checksum);
/* check the data CRC */
checksum = ntohl(hdr->ih_dcrc);
if (crc32 (0, (char *)(LOAD_ADDR + sizeof(*hdr)), ntohl(hdr->ih_size))
!= checksum)
{
printf ("Image %s bad data checksum\n", aufile[idx]);
return -1;
}
/* check the type - could do this all in one gigantic if() */
if ((idx == IDX_FIRMWARE) && (hdr->ih_type != IH_TYPE_FIRMWARE)) {
printf ("Image %s wrong type\n", aufile[idx]);
return -1;
}
if ((idx == IDX_KERNEL) && (hdr->ih_type != IH_TYPE_KERNEL)) {
printf ("Image %s wrong type\n", aufile[idx]);
return -1;
}
if ((idx == IDX_DISK || idx == IDX_APP)
&& (hdr->ih_type != IH_TYPE_RAMDISK))
{
printf ("Image %s wrong type\n", aufile[idx]);
return -1;
}
if ((idx == IDX_PREPARE || idx == IDX_PREINST || idx == IDX_POSTINST)
&& (hdr->ih_type != IH_TYPE_SCRIPT))
{
printf ("Image %s wrong type\n", aufile[idx]);
return -1;
}
/* special case for prepare.img */
if (idx == IDX_PREPARE)
return 0;
/* check the size does not exceed space in flash */
if ((ausize[idx] != 0) && (ausize[idx] < ntohl(hdr->ih_size))) {
printf ("Image %s is bigger than FLASH\n", aufile[idx]);
return -1;
}
/* check the time stamp from the EEPROM */
/* read it in */
i2c_read_multiple(0x54, auee_off[idx].time, 1, buf, sizeof(buf));
#ifdef CHECK_VALID_DEBUG
printf ("buf[0] %#x buf[1] %#x buf[2] %#x buf[3] %#x "
"as int %#x time %#x\n",
buf[0], buf[1], buf[2], buf[3],
*((unsigned int *)buf), ntohl(hdr->ih_time));
#endif
/* check it */
if (*((unsigned int *)buf) >= ntohl(hdr->ih_time)) {
printf ("Image %s is too old\n", aufile[idx]);
return -1;
}
return 0;
}
/* power control defines */
#define CPLD_VFD_BK ((volatile char *)0x04038002)
#define POWER_OFF (1 << 1)
int
au_do_update(int idx, long sz, int repeat)
{
image_header_t *hdr;
char *addr;
long start, end;
char *strbuf = STRING_ADDR;
int off;
uint nbytes;
hdr = (image_header_t *)LOAD_ADDR;
/* disable the power switch */
*CPLD_VFD_BK |= POWER_OFF;
/* execute a script */
if (hdr->ih_type == IH_TYPE_SCRIPT) {
addr = (char *)((char *)hdr + sizeof(*hdr) + 8);
parse_string_outer(addr,
FLAG_PARSE_SEMICOLON | FLAG_EXIT_FROM_LOOP);
return 0;
}
start = aufl_layout[FIDX_TO_LIDX(idx)].start;
end = aufl_layout[FIDX_TO_LIDX(idx)].end;
/* unprotect the address range */
/* this assumes that ONLY the firmware is protected! */
if (idx == IDX_FIRMWARE) {
#undef AU_UPDATE_TEST
#ifdef AU_UPDATE_TEST
/* erase it where Linux goes */
start = aufl_layout[1].start;
end = aufl_layout[1].end;
#endif
debug ("protect off %lx %lx\n", start, end);
sprintf(strbuf, "protect off %lx %lx\n", start, end);
parse_string_outer(strbuf,
FLAG_PARSE_SEMICOLON | FLAG_EXIT_FROM_LOOP);
}
/*
* erase the address range. Multiple erases seem to cause
* problems.
*/
if (repeat == 0) {
debug ("erase %lx %lx\n", start, end);
sprintf(strbuf, "erase %lx %lx\n", start, end);
parse_string_outer(strbuf,
FLAG_PARSE_SEMICOLON | FLAG_EXIT_FROM_LOOP);
}
wait_ms(100);
/* strip the header - except for the kernel */
if (idx == IDX_FIRMWARE || idx == IDX_DISK || idx == IDX_APP) {
addr = (char *)((char *)hdr + sizeof(*hdr));
#ifdef AU_UPDATE_TEST
/* copy it to where Linux goes */
if (idx == IDX_FIRMWARE)
start = aufl_layout[1].start;
#endif
off = 0;
nbytes = ntohl(hdr->ih_size);
} else {
addr = (char *)hdr;
off = sizeof(*hdr);
nbytes = sizeof(*hdr) + ntohl(hdr->ih_size);
}
/* copy the data from RAM to FLASH */
debug ("cp.b %p %lx %x\n", addr, start, nbytes);
sprintf(strbuf, "cp.b %p %lx %x\n", addr, start, nbytes);
parse_string_outer(strbuf,
FLAG_PARSE_SEMICOLON | FLAG_EXIT_FROM_LOOP);
/* check the dcrc of the copy */
if (crc32 (0, (char *)(start + off), ntohl(hdr->ih_size)) != ntohl(hdr->ih_dcrc)) {
printf ("Image %s Bad Data Checksum After COPY\n", aufile[idx]);
return -1;
}
/* protect the address range */
/* this assumes that ONLY the firmware is protected! */
if (idx == IDX_FIRMWARE) {
debug ("protect on %lx %lx\n", start, end);
sprintf(strbuf, "protect on %lx %lx\n", start, end);
parse_string_outer(strbuf,
FLAG_PARSE_SEMICOLON | FLAG_EXIT_FROM_LOOP);
}
return 0;
}
int
au_update_eeprom(int idx)
{
image_header_t *hdr;
int off;
uint32_t val;
hdr = (image_header_t *)LOAD_ADDR;
/* write the time field into EEPROM */
off = auee_off[idx].time;
val = ntohl(hdr->ih_time);
i2c_write_multiple(0x54, off, 1, &val, sizeof(val));
/* write the size field into EEPROM */
off = auee_off[idx].size;
val = ntohl(hdr->ih_size);
i2c_write_multiple(0x54, off, 1, &val, sizeof(val));
/* write the dcrc field into EEPROM */
off = auee_off[idx].dcrc;
val = ntohl(hdr->ih_dcrc);
i2c_write_multiple(0x54, off, 1, &val, sizeof(val));
/* enable the power switch */
*CPLD_VFD_BK &= ~POWER_OFF;
return 0;
}
/*
* this is called from board_init() after the hardware has been set up
* and is usable. That seems like a good time to do this.
* Right now the return value is ignored.
*/
int
do_auto_update(void)
{
block_dev_desc_t *stor_dev;
long sz;
int i, res, bitmap_first, cnt, old_ctrlc, got_ctrlc;
char *env;
long start, end;
#undef ERASE_EEPROM
#ifdef ERASE_EEPROM
int arr[18];
memset(arr, 0, sizeof(arr));
i2c_write_multiple(0x54, 64, 1, arr, sizeof(arr));
#endif
au_usb_stor_curr_dev = -1;
/* start USB */
if (usb_stop() < 0) {
debug ("usb_stop failed\n");
return -1;
}
if (usb_init() < 0) {
debug ("usb_init failed\n");
return -1;
}
/*
* check whether a storage device is attached (assume that it's
* a USB memory stick, since nothing else should be attached).
*/
au_usb_stor_curr_dev = usb_stor_scan(1);
if (au_usb_stor_curr_dev == -1) {
debug ("No device found. Not initialized?\n");
return -1;
}
/* check whether it has a partition table */
stor_dev = get_dev("usb", 0);
if (stor_dev == NULL) {
debug ("uknown device type\n");
return -1;
}
if (fat_register_device(stor_dev, 1) != 0) {
debug ("Unable to use USB %d:%d for fatls\n",
au_usb_stor_curr_dev, 1);
return -1;
}
if (file_fat_detectfs() != 0) {
debug ("file_fat_detectfs failed\n");
}
/* initialize the array of file names */
memset(aufile, 0, sizeof(aufile));
aufile[IDX_PREPARE] = AU_PREPARE;
aufile[IDX_PREINST] = AU_PREINST;
aufile[IDX_FIRMWARE] = AU_FIRMWARE;
aufile[IDX_KERNEL] = AU_KERNEL;
aufile[IDX_APP] = AU_APP;
aufile[IDX_DISK] = AU_DISK;
aufile[IDX_POSTINST] = AU_POSTINST;
/* initialize the array of flash sizes */
memset(ausize, 0, sizeof(ausize));
ausize[IDX_FIRMWARE] = (AU_FL_FIRMWARE_ND + 1) - AU_FL_FIRMWARE_ST;
ausize[IDX_KERNEL] = (AU_FL_KERNEL_ND + 1) - AU_FL_KERNEL_ST;
ausize[IDX_APP] = (AU_FL_APP_ND + 1) - AU_FL_APP_ST;
ausize[IDX_DISK] = (AU_FL_DISK_ND + 1) - AU_FL_DISK_ST;
/*
* now check whether start and end are defined using environment
* variables.
*/
start = end = 0;
env = getenv("firmware_st");
if (env != NULL)
start = simple_strtoul(env, NULL, 16);
env = getenv("firmware_nd");
if (env != NULL)
end = simple_strtoul(env, NULL, 16);
if (start && end && end > start)
ausize[IDX_FIRMWARE] = (end + 1) - start;
start = end = 0;
env = getenv("kernel_st");
if (env != NULL)
start = simple_strtoul(env, NULL, 16);
env = getenv("kernel_nd");
if (env != NULL)
end = simple_strtoul(env, NULL, 16);
if (start && end && end > start)
ausize[IDX_KERNEL] = (end + 1) - start;
start = end = 0;
env = getenv("app_st");
if (env != NULL)
start = simple_strtoul(env, NULL, 16);
env = getenv("app_nd");
if (env != NULL)
end = simple_strtoul(env, NULL, 16);
if (start && end && end > start)
ausize[IDX_APP] = (end + 1) - start;
start = end = 0;
env = getenv("disk_st");
if (env != NULL)
start = simple_strtoul(env, NULL, 16);
env = getenv("disk_nd");
if (env != NULL)
end = simple_strtoul(env, NULL, 16);
if (start && end && end > start)
ausize[IDX_DISK] = (end + 1) - start;
/* make sure that we see CTRL-C and save the old state */
old_ctrlc = disable_ctrlc(0);
bitmap_first = 0;
/* just loop thru all the possible files */
for (i = 0; i < AU_MAXFILES; i++) {
sz = file_fat_read(aufile[i], LOAD_ADDR, MAX_LOADSZ);
debug ("read %s sz %ld hdr %d\n",
aufile[i], sz, sizeof(image_header_t));
if (sz <= 0 || sz <= sizeof(image_header_t)) {
debug ("%s not found\n", aufile[i]);
continue;
}
if (au_check_valid(i, sz) < 0) {
debug ("%s not valid\n", aufile[i]);
continue;
}
#ifdef CONFIG_VFD
/* now that we have a valid file we can display the */
/* bitmap. */
if (bitmap_first == 0) {
env = getenv("bitmap2");
if (env == NULL) {
trab_vfd(0);
} else {
/* not so simple - bitmap2 is supposed to */
/* contain the address of the bitmap */
env = (char *)simple_strtoul(env, NULL, 16);
/* NOTE: these are taken from vfd_logo.h. If that file changes then */
/* these defines MUST also be updated! These may be wrong for bitmap2. */
#define VFD_LOGO_WIDTH 112
#define VFD_LOGO_HEIGHT 72
/* must call transfer_pic directly */
transfer_pic(3, env, VFD_LOGO_HEIGHT, VFD_LOGO_WIDTH);
}
bitmap_first = 1;
}
#endif
/* this is really not a good idea, but it's what the */
/* customer wants. */
cnt = 0;
got_ctrlc = 0;
do {
res = au_do_update(i, sz, cnt);
/* let the user break out of the loop */
if (ctrlc() || had_ctrlc()) {
clear_ctrlc();
if (res < 0)
got_ctrlc = 1;
break;
}
cnt++;
#ifdef AU_TEST_ONLY
} while (res < 0 && cnt < 3);
if (cnt < 3)
#else
} while (res < 0);
#endif
/*
* it doesn't make sense to update the EEPROM if the
* update was interrupted by the user due to errors.
*/
if (got_ctrlc == 0)
au_update_eeprom(i);
}
usb_stop();
/* restore the old state */
disable_ctrlc(old_ctrlc);
return 0;
}
#endif /* CONFIG_AUTO_UPDATE */

View File

@@ -111,6 +111,10 @@ int do_vcc5v (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
int do_burn_in (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
int do_contact_temp (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
int do_burn_in_status (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
int i2c_write_multiple (uchar chip, uint addr, int alen,
uchar *buffer, int len);
int i2c_read_multiple (uchar chip, uint addr, int alen,
uchar *buffer, int len);
/* helper functions */
static void adc_init (void);
@@ -123,10 +127,6 @@ static int test_rotary_switch (void);
static int test_sram (void);
static int test_eeprom (void);
static int test_contact_temp (void);
static int i2c_write_multiple (uchar chip, uint addr, int alen,
uchar *buffer, int len);
static int i2c_read_multiple (uchar chip, uint addr, int alen,
uchar *buffer, int len);
static void led_set (unsigned int);
static void led_blink (void);
static void led_init (void);
@@ -579,8 +579,8 @@ static int test_contact_temp (void)
}
static int i2c_write_multiple (uchar chip, uint addr, int alen,
uchar *buffer, int len)
int i2c_write_multiple (uchar chip, uint addr, int alen,
uchar *buffer, int len)
{
int i;
@@ -608,8 +608,8 @@ static int i2c_write_multiple (uchar chip, uint addr, int alen,
}
static int i2c_read_multiple (uchar chip, uint addr, int alen,
uchar *buffer, int len)
int i2c_read_multiple ( uchar chip, uint addr, int alen,
uchar *buffer, int len)
{
int i;

View File

@@ -8,16 +8,19 @@
#
#
# TRAB has 1 bank of 16 MB DRAM
# TRAB has 1 bank of 16 MB or 32 MB DRAM
#
# 0c00'0000 to 0e00'0000
#
# Linux-Kernel is expected to be at 0c00'8000, entry 0c00'8000
#
# we load ourself to 0cf0'0000
# we load ourself to 0CF0'0000 / 0DF0'0000
#
# download areas is 0c80'0000
# download areas is 0C80'0000
#
sinclude $(TOPDIR)/board/$(BOARDDIR)/config.tmp
TEXT_BASE = 0x0cf00000
ifndef TEXT_BASE
TEXT_BASE = 0x0DF00000
endif

View File

@@ -5,7 +5,7 @@
* Jan-Derk Bakker (J.D.Bakker@its.tudelft.nl)
*
* Modified for the TRAB board by
* (C) Copyright 2002
* (C) Copyright 2002-2003
* Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
*
* See file CREDITS for list of people who contributed to this
@@ -101,6 +101,17 @@
#define B5_Tacp 0x0
#define B5_PMC 0x0 /* normal */
#ifndef CONFIG_RAM_16MB /* 32 MB RAM */
/* Bank6 */
#define B6_MT 0x3 /* SDRAM */
#define B6_Trcd 0x1 /* 3clk */
#define B6_SCAN 0x1 /* 9 bit */
/* Bank7 */
#define B7_MT 0x3 /* SDRAM */
#define B7_Trcd 0x1 /* 3clk */
#define B7_SCAN 0x1 /* 9 bit */
#else /* CONFIG_RAM_16MB = 16 MB RAM */
/* Bank6 */
#define B6_MT 0x3 /* SDRAM */
#define B6_Trcd 0x1 /* 2clk */
@@ -110,6 +121,7 @@
#define B7_MT 0x3 /* SDRAM */
#define B7_Trcd 0x1 /* 2clk */
#define B7_SCAN 0x0 /* 8 bit */
#endif /* CONFIG_RAM_16MB */
/* refresh parameter */
#define REFEN 0x1 /* enable refresh */
@@ -161,6 +173,10 @@ SMRDATA:
.word ((B6_MT<<15)+(B6_Trcd<<2)+(B6_SCAN)) /* GCS6 */
.word ((B7_MT<<15)+(B7_Trcd<<2)+(B7_SCAN)) /* GCS7 */
.word ((REFEN<<23)+(TREFMD<<22)+(Trp<<20)+(Trc<<18)+(Tchr<<16)+REFCNT)
#ifndef CONFIG_RAM_16MB /* 32 MB RAM */
.word 0x10 /* BUSWIDTH=32, SCLK power saving mode, BANKSIZE 32M/32M */
#else /* CONFIG_RAM_16MB = 16 MB RAM */
.word 0x17 /* BUSWIDTH=32, SCLK power saving mode, BANKSIZE 16M/16M */
#endif /* CONFIG_RAM_16MB */
.word 0x30 /* MRSR6, CL=3clk */
.word 0x30 /* MRSR7 */

View File

@@ -169,6 +169,12 @@ int misc_init_r (void)
uchar *str;
int i;
#ifdef CONFIG_AUTO_UPDATE
extern int do_auto_update(void);
/* this has priority over all else */
do_auto_update();
#endif
for (i = 0; i < KEYBD_KEY_NUM; ++i) {
keybd_env[i] = '0' + ((kbd_data >> i) & 1);
}

View File

@@ -634,7 +634,7 @@ U_BOOT_CMD(
U_BOOT_CMD(
iopset, 5, 0, do_iopset,
"iopset - set I/O Port registers\n",
"iopset - set I/O Port registers\n",
"PORT PIN CMD VALUE\nPORT: A-D, PIN: 0-31, CMD: [dat|dir|odr|sor], VALUE: 0|1"
);

View File

@@ -555,7 +555,11 @@ int do_mem_mtest (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
vu_long temp;
vu_long anti_pattern;
vu_long num_words;
#if defined(CFG_MEMTEST_SCRATCH)
vu_long *dummy = (vu_long*)CFG_MEMTEST_SCRATCH;
#else
vu_long *dummy = NULL;
#endif
int j;
int iterations = 1;

View File

@@ -133,7 +133,7 @@ int do_spi (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
U_BOOT_CMD(
sspi, 5, 1, do_spi,
"sspi - SPI utility commands\n",
"sspi - SPI utility commands\n",
"<device> <bit_len> <dout> - Send <bit_len> bits from <dout> out the SPI\n"
"<device> - Identifies the chip select of the device\n"
"<bit_len> - Number of bits to send (base 10)\n"

View File

@@ -436,6 +436,8 @@ int console_init_r (void)
console_setfile (stdin, inputdev);
}
gd->flags |= GD_FLG_DEVINIT; /* device initialization completed */
#ifndef CFG_CONSOLE_INFO_QUIET
/* Print information */
printf ("In: ");
@@ -480,6 +482,8 @@ int console_init_r (void)
/* Called after the relocation - use desired console functions */
int console_init_r (void)
{
DECLARE_GLOBAL_DATA_PTR;
device_t *inputdev = NULL, *outputdev = NULL;
int i, items = ListNumItems (devlist);
@@ -514,6 +518,8 @@ int console_init_r (void)
console_setfile (stdin, inputdev);
}
gd->flags |= GD_FLG_DEVINIT; /* device initialization completed */
#ifndef CFG_CONSOLE_INFO_QUIET
/* Print information */
printf ("In: ");

View File

@@ -158,9 +158,9 @@ int device_deregister(char *devname)
int devices_init (void)
{
#ifndef CONFIG_ARM /* already relocated for current ARM implementation */
DECLARE_GLOBAL_DATA_PTR;
#ifndef CONFIG_ARM /* already relocated for current ARM implementation */
ulong relocation_offset = gd->reloc_off;
int i;
@@ -195,8 +195,6 @@ int devices_init (void)
#endif
drv_system_init ();
gd-> flags |= GD_FLG_DEVINIT; /* device initialization done */
return (0);
}

View File

@@ -595,7 +595,7 @@ struct usb_device * usb_alloc_new_device(void)
int i;
USB_PRINTF("New Device %d\n",dev_index);
if(dev_index==USB_MAX_DEVICE) {
printf("ERROR, to many USB Devices max=%d\n",USB_MAX_DEVICE);
printf("ERROR, too many USB Devices, max=%d\n",USB_MAX_DEVICE);
return NULL;
}
usb_dev[dev_index].devnum=dev_index+1; /* default Address is 0, real addresses start with 1 */

View File

@@ -188,7 +188,7 @@ int usb_stor_scan(int mode)
memset(usb_stor_buf, 0, sizeof(usb_stor_buf));
if(mode==1) {
printf("scanning bus for storage devices...\n");
printf(" scanning bus for storage devices...\n");
}
usb_disable_asynch(1); /* asynch transfer not allowed */

View File

@@ -71,9 +71,6 @@ _fiq: .word fiq
*************************************************************************
*/
/*
* CFG_MEM_END is in the board dependent config-file (configs/config_BOARD.h)
*/
_TEXT_BASE:
.word TEXT_BASE

View File

@@ -30,7 +30,7 @@
#elif CONFIG_SERIAL2
# if defined(CONFIG_TRAB)
# #error "TRAB supports only CONFIG_SERIAL1"
# error "TRAB supports only CONFIG_SERIAL1"
# endif
#define UART_NR S3C24X0_UART1

View File

@@ -72,9 +72,6 @@ _fiq: .word fiq
*************************************************************************
*/
/*
* CFG_MEM_END is in the board dependent config-file (configs/config_BOARD.h)
*/
_TEXT_BASE:
.word TEXT_BASE

View File

@@ -1199,7 +1199,7 @@ int submit_common_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
/* ohci_dump_status(&gohci); */
/* allow more time for a BULK device to react - some are slow */
#define BULK_TO 2000 /* timeout in milliseconds */
#define BULK_TO 5000 /* timeout in milliseconds */
if (usb_pipetype (pipe) == PIPE_BULK)
timeout = BULK_TO;
else

View File

@@ -81,9 +81,6 @@ _fiq: .word fiq
*************************************************************************
*/
/*
* CFG_MEM_END is in the board dependent config-file (configs/config_BOARD.h)
*/
_TEXT_BASE:
.word TEXT_BASE

View File

@@ -90,9 +90,6 @@ _fiq:
*************************************************************************
*/
/*
* CFG_MEM_END is in the board dependent config-file (configs/config_BOARD.h)
*/
_TEXT_BASE:
.word TEXT_BASE

View File

@@ -71,9 +71,6 @@ _fiq: .word fiq
*************************************************************************
*/
/*
* CFG_MEM_END is in the board dependent config-file (configs/config_BOARD.h)
*/
_TEXT_BASE:
.word TEXT_BASE

View File

@@ -650,6 +650,15 @@ eth_loopback_test (void)
/* 28.9 - (1-2): ioports have been set up already */
#if defined(CONFIG_HYMOD)
/*
* Attention: this is board-specific
* 0, FCC1
* 1, FCC2
* 2, FCC3
*/
# define FCC_START_LOOP 0
# define FCC_END_LOOP 2
/*
* Attention: this is board-specific
* - FCC1 Rx-CLK is CLK10
@@ -665,13 +674,30 @@ eth_loopback_test (void)
immr->im_cpmux.cmx_fcr = CMXFCR_RF1CS_CLK10|CMXFCR_TF1CS_CLK11|\
CMXFCR_RF2CS_CLK13|CMXFCR_TF2CS_CLK14|\
CMXFCR_RF3CS_CLK15|CMXFCR_TF3CS_CLK16;
#elif defined(CONFIG_SBC8260) || defined(CONFIG_SACSng)
/*
* Attention: this is board-specific
* 1, FCC2
*/
# define FCC_START_LOOP 1
# define FCC_END_LOOP 1
/*
* Attention: this is board-specific
* - FCC2 Rx-CLK is CLK13
* - FCC2 Tx-CLK is CLK14
*/
/* 28.9 - (3): connect FCC's tx and rx clocks */
immr->im_cpmux.cmx_uar = 0;
immr->im_cpmux.cmx_fcr = CMXFCR_RF2CS_CLK13|CMXFCR_TF2CS_CLK14;
#else
#error "eth_loopback_test not supported on your board"
#endif
puts ("Initialise FCC channels:");
for (c = 0; c < 3; c++) {
for (c = FCC_START_LOOP; c <= FCC_END_LOOP; c++) {
elbt_chan *ecp = &elbt_chans[c];
volatile fcc_t *fcp = &immr->im_fcc[c];
volatile fcc_enet_t *fpp;
@@ -853,7 +879,7 @@ eth_loopback_test (void)
do {
nclosed = 0;
for (c = 0; c < 3; c++) {
for (c = FCC_START_LOOP; c <= FCC_END_LOOP; c++) {
volatile fcc_t *fcp = &immr->im_fcc[c];
elbt_chan *ecp = &elbt_chans[c];
int i;
@@ -1082,7 +1108,7 @@ eth_loopback_test (void)
}
}
} while (nclosed < 3);
} while (nclosed < (FCC_END_LOOP - FCC_START_LOOP + 1));
runtime = get_timer (runtime);
if (runtime <= ELBT_CLSWAIT) {
@@ -1099,7 +1125,7 @@ eth_loopback_test (void)
* now print stats
*/
for (c = 0; c < 3; c++) {
for (c = FCC_START_LOOP; c <= FCC_END_LOOP; c++) {
elbt_chan *ecp = &elbt_chans[c];
uint rxpps, txpps, nerr;
@@ -1131,17 +1157,17 @@ eth_loopback_test (void)
}
puts ("Receive Error Counts:\n");
for (c = 0; c < 3; c++)
for (c = FCC_START_LOOP; c <= FCC_END_LOOP; c++)
bases[c] = (uchar *)&elbt_chans[c].rxeacc;
print_desc (rxeacc_descs, rxeacc_ndesc, bases, 3);
puts ("\nTransmit Error Counts:\n");
for (c = 0; c < 3; c++)
for (c = FCC_START_LOOP; c <= FCC_END_LOOP; c++)
bases[c] = (uchar *)&elbt_chans[c].txeacc;
print_desc (txeacc_descs, txeacc_ndesc, bases, 3);
puts ("\nRMON(-like) Counters:\n");
for (c = 0; c < 3; c++)
for (c = FCC_START_LOOP; c <= FCC_END_LOOP; c++)
bases[c] = (uchar *)&immr->im_dprambase[elbt_chans[c].proff];
print_desc (epram_descs, epram_ndesc, bases, 3);
}

View File

@@ -83,7 +83,7 @@ int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
extern void reset_cpu (ulong addr);
printf ("reseting ...\n");
printf ("resetting ...\n");
udelay (50000); /* wait 50 ms */
disable_interrupts ();

View File

@@ -29,6 +29,7 @@
*/
#include <common.h>
#include <watchdog.h>
#include <asm/arch/pxa-regs.h>
void serial_setbrg (void)
@@ -38,7 +39,7 @@ void serial_setbrg (void)
unsigned int quot = 0;
if (gd->baudrate == 1200)
quot = 192;
quot = 768;
else if (gd->baudrate == 9600)
quot = 96;
else if (gd->baudrate == 19200)
@@ -53,7 +54,6 @@ void serial_setbrg (void)
hang ();
#ifdef CONFIG_FFUART
CKEN |= CKEN6_FFUART;
FFIER = 0; /* Disable for now */
@@ -82,9 +82,21 @@ void serial_setbrg (void)
BTIER = IER_UUE; /* Enable BFUART */
#elif defined(CONFIG_STUART)
#error "Bad: not implemented yet!"
CKEN |= CKEN5_STUART;
STIER = 0;
STFCR = 0;
/* set baud rate */
STLCR = LCR_DLAB;
STDLL = quot & 0xff;
STDLH = quot >> 8;
STLCR = LCR_WLS0 | LCR_WLS1;
STIER = IER_UUE; /* Enable STUART */
#else
#error "Bad: you didn't configured serial ..."
#error "Bad: you didn't configure serial ..."
#endif
}
@@ -109,13 +121,17 @@ void serial_putc (const char c)
{
#ifdef CONFIG_FFUART
/* wait for room in the tx FIFO on FFUART */
while ((FFLSR & LSR_TEMT) == 0);
while ((FFLSR & LSR_TEMT) == 0)
WATCHDOG_RESET (); /* Reset HW Watchdog, if needed */
FFTHR = c;
#elif defined(CONFIG_BTUART)
while ((BTLSR & LSR_TEMT ) == 0 );
while ((BTLSR & LSR_TEMT ) == 0 )
WATCHDOG_RESET (); /* Reset HW Watchdog, if needed */
BTTHR = c;
#elif defined(CONFIG_STUART)
while ((STLSR & LSR_TEMT ) == 0 )
WATCHDOG_RESET (); /* Reset HW Watchdog, if needed */
STTHR = c;
#endif
/* If \n, also do \r */
@@ -135,6 +151,7 @@ int serial_tstc (void)
#elif defined(CONFIG_BTUART)
return BTLSR & LSR_DR;
#elif defined(CONFIG_STUART)
return STLSR & LSR_DR;
#endif
}
@@ -146,14 +163,17 @@ int serial_tstc (void)
int serial_getc (void)
{
#ifdef CONFIG_FFUART
while (!(FFLSR & LSR_DR));
while (!(FFLSR & LSR_DR))
WATCHDOG_RESET (); /* Reset HW Watchdog, if needed */
return (char) FFRBR & 0xff;
#elif defined(CONFIG_BTUART)
while (!(BTLSR & LSR_DR));
while (!(BTLSR & LSR_DR))
WATCHDOG_RESET (); /* Reset HW Watchdog, if needed */
return (char) BTRBR & 0xff;
#elif defined(CONFIG_STUART)
while (!(STLSR & LSR_DR))
WATCHDOG_RESET (); /* Reset HW Watchdog, if needed */
return (char) STRBR & 0xff;
#endif
}

View File

@@ -61,9 +61,6 @@ _fiq: .word fiq
* - jump to second stage
*/
/*
* CFG_MEM_END is in the board dependent config-file (configs/config_BOARD.h)
*/
_TEXT_BASE:
.word TEXT_BASE

View File

@@ -73,9 +73,6 @@ _fiq: .word fiq
*************************************************************************
*/
/*
* CFG_MEM_END is in the board dependent config-file (configs/config_BOARD.h)
*/
_TEXT_BASE:
.word TEXT_BASE

View File

@@ -71,6 +71,7 @@
#define CONFIG_NET_MULTI 1
#define CONFIG_EEPRO100 1
#define CFG_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */
#define CONFIG_NS8382X 1
#define ADD_PCI_CMD CFG_CMD_PCI

View File

@@ -508,7 +508,8 @@
#define CFG_MPTPR 0x00001900
#define CFG_PSRT 0x00000021
#define CFG_RESET_ADDRESS 0x04400000
/* This address must not exist */
#define CFG_RESET_ADDRESS 0xFCFFFF00
/* PCI Memory map (if different from default map */
#define CFG_PCI_SLV_MEM_LOCAL CFG_SDRAM_BASE /* Local base */

View File

@@ -196,6 +196,7 @@
#ifdef CONFIG_ETHER_ON_FCC
#define CONFIG_ETHER_INDEX 2 /* which SCC/FCC channel for ethernet */
#undef CONFIG_ETHER_LOOPBACK_TEST /* Ethernet external loopback test */
#define CONFIG_MII /* MII PHY management */
#define CONFIG_BITBANGMII /* bit-bang MII PHY management */
/*
@@ -351,38 +352,39 @@
*
*/
#define CONFIG_EXTRA_ENV_SETTINGS \
"serverip=192.168.123.201\0" \
"ipaddr=192.168.123.203\0" \
"serverip=192.168.123.205\0\0" \
"ipaddr=192.168.123.213\0" \
"reprog="\
"tftpboot 0x140000 /bdi2000/u-boot.bin; " \
"protect off 1:0; " \
"erase 1:0; " \
"cp.b 140000 40000000 $(filesize); " \
"bootp;" \
"tftpboot 0x140000 /bdi2000/u-boot.bin;" \
"protect off 1:0;" \
"erase 1:0;" \
"cp.b 140000 40000000 $(filesize);" \
"protect on 1:0\0" \
"zapenv="\
"protect off 1:1; " \
"erase 1:1; " \
"protect off 1:1;" \
"erase 1:1;" \
"protect on 1:1\0" \
"root-on-initrd="\
"setenv bootcmd "\
"version\\;" \
"echo\\;" \
"bootp\\;" \
"version;" \
"echo;" \
"bootp;" \
"setenv bootargs root=/dev/ram0 rw " \
"ip=\\$(ipaddr):\\$(serverip):\\$(gatewayip):\\$(netmask):\\$(hostname)::off\\;" \
"run boot-hook\\;" \
"ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask):$(hostname)::off;" \
"run boot-hook;" \
"bootm\0" \
"root-on-nfs="\
"setenv bootcmd "\
"version\\;" \
"echo\\;" \
"bootp\\;" \
"version;" \
"echo;" \
"bootp;" \
"setenv bootargs root=/dev/nfs rw " \
"nfsroot=\\$(serverip):\\$(rootpath) " \
"ip=\\$(ipaddr):\\$(serverip):\\$(gatewayip):\\$(netmask):\\$(hostname)::off\\;" \
"run boot-hook\\;" \
"nfsroot=$(serverip):$(rootpath) " \
"ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask):$(hostname)::off;" \
"run boot-hook;" \
"bootm\0" \
"boot-hook=echo boot-hook\0"
"boot-hook=echo\0"
/* Define a command string that is automatically executed when no character
* is read on the console interface withing "Boot Delay" after reset.
@@ -412,11 +414,14 @@
/* Add support for a few extra bootp options like:
* - File size
* - DNS
* - DNS (up to 2 servers)
* - Send hostname to DHCP server
*/
#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | \
CONFIG_BOOTP_BOOTFILESIZE | \
CONFIG_BOOTP_DNS)
CONFIG_BOOTP_DNS | \
CONFIG_BOOTP_DNS2 | \
CONFIG_BOOTP_SEND_HOSTNAME)
/* undef this to save memory */
#define CFG_LONGHELP
@@ -434,28 +439,37 @@
*/
#define CONFIG_TIMESTAMP
/* If this variable is defined, an environment variable named "ver"
* is created by U-Boot showing the U-Boot version.
*/
#define CONFIG_VERSION_VARIABLE
/* What U-Boot subsytems do you want enabled? */
#ifdef CONFIG_ETHER_ON_FCC
# define CONFIG_COMMANDS (((CONFIG_CMD_DFL & ~(CFG_CMD_KGDB))) | \
CFG_CMD_ELF | \
CFG_CMD_ASKENV | \
CFG_CMD_ECHO | \
CFG_CMD_ELF | \
CFG_CMD_I2C | \
CFG_CMD_SDRAM | \
CFG_CMD_REGINFO | \
CFG_CMD_IMMAP | \
CFG_CMD_MII )
CFG_CMD_MII | \
CFG_CMD_PING | \
CFG_CMD_REGINFO | \
CFG_CMD_SDRAM )
#else
# define CONFIG_COMMANDS (((CONFIG_CMD_DFL & ~(CFG_CMD_KGDB))) | \
CFG_CMD_ELF | \
CFG_CMD_ASKENV | \
CFG_CMD_ECHO | \
CFG_CMD_ELF | \
CFG_CMD_I2C | \
CFG_CMD_SDRAM | \
CFG_CMD_IMMAP | \
CFG_CMD_PING | \
CFG_CMD_REGINFO | \
CFG_CMD_IMMAP )
CFG_CMD_SDRAM )
#endif /* CONFIG_ETHER_ON_FCC */
#undef CONFIG_WATCHDOG /* disable the watchdog */
/* Where do the internal registers live? */
#define CFG_IMMR 0xF0000000
@@ -670,12 +684,22 @@
*-----------------------------------------------------------------------
* Watchdog & Bus Monitor Timer max, 60x Bus Monitor enable
*/
#if defined(CONFIG_WATCHDOG)
#define CFG_SYPCR (SYPCR_SWTC |\
SYPCR_BMT |\
SYPCR_PBME |\
SYPCR_LBME |\
SYPCR_SWRI |\
SYPCR_SWP |\
SYPCR_SWE)
#else
#define CFG_SYPCR (SYPCR_SWTC |\
SYPCR_BMT |\
SYPCR_PBME |\
SYPCR_LBME |\
SYPCR_SWRI |\
SYPCR_SWP)
#endif /* CONFIG_WATCHDOG */
/*-----------------------------------------------------------------------
* TMCNTSC - Time Counter Status and Control 4-40

View File

@@ -26,6 +26,11 @@
#ifndef __CONFIG_H
#define __CONFIG_H
#ifdef CONFIG_OLD_VERSION /* Old configuration: */
#define CONFIG_RAM_16MB /* 16 MB SDRAM */
#define CONFIG_FLASH_8MB /* 8 MB Flash */
#endif
/*
* If we are developing, we might want to start armboot from ram
* so we MUST NOT initialize critical regs like mem-timing ...
@@ -42,6 +47,9 @@
#undef CONFIG_TRAB_50MHZ /* run the CPU at 50 MHz */
#define LITTLEENDIAN 1 /* used by usb_ohci.c */
/* automatic software updates (see board/trab/auto_update.c) */
#define CONFIG_AUTO_UPDATE 1
/* input clock of PLL */
#define CONFIG_SYS_CLK_FREQ 12000000 /* TRAB has 12 MHz input clock */
@@ -176,7 +184,7 @@
#define CONFIG_SERVERIP 192.168.3.1
#define CONFIG_BOOTCOMMAND "run flash_nfs"
#ifndef CONFIG_BIG_FLASH
#ifndef CONFIG_FLASH_8MB /* current config: 16 MB flash */
#ifdef CFG_HUSH_PARSER
#define CONFIG_EXTRA_ENV_SETTINGS \
"nfs_args=setenv bootargs root=/dev/nfs rw " \
@@ -186,14 +194,15 @@
"add_net=setenv bootargs $bootargs ethaddr=$ethaddr " \
"ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname::off\0" \
"add_misc=setenv bootargs $bootargs console=ttyS0 panic=1\0" \
"load=tftp 0xC100000 /tftpboot/TRAB/u-boot.bin\0" \
"update=protect off 1:0-8;era 1:0-8;cp.b 0xc100000 0 $filesize;" \
"setenv filesize;saveenv\0" \
"u-boot=/tftpboot/TRAB/u-boot.bin\0" \
"load=tftp C100000 ${u-boot}\0" \
"update=protect off 0 5FFFF;era 0 5FFFF;" \
"cp.b C100000 0 $filesize\0" \
"loadfile=/tftpboot/TRAB/uImage\0" \
"loadaddr=c400000\0" \
"net_load=tftpboot $loadaddr $loadfile\0" \
"net_nfs=run net_load nfs_args add_net add_misc;bootm\0" \
"kernel_addr=00040000\0" \
"kernel_addr=000C0000\0" \
"flash_nfs=run nfs_args add_net add_misc;bootm $kernel_addr\0" \
"mdm_init1=ATZ\0" \
"mdm_init2=ATS0=1\0" \
@@ -207,20 +216,21 @@
"add_net=setenv bootargs $(bootargs) ethaddr=$(ethaddr) " \
"ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask):$(hostname)::off\0" \
"add_misc=setenv bootargs $(bootargs) console=ttyS0 panic=1\0" \
"load=tftp 0xC100000 /tftpboot/TRAB/u-boot.bin\0" \
"update=protect off 1:0-8;era 1:0-8;cp.b 0xc100000 0 $(filesize);" \
"setenv filesize;saveenv\0" \
"u-boot=/tftpboot/TRAB/u-boot.bin\0" \
"load=tftp C100000 $(u-boot)\0" \
"update=protect off 0 5FFFF;era 0 5FFFF;" \
"cp.b C100000 0 $(filesize)\0" \
"loadfile=/tftpboot/TRAB/uImage\0" \
"loadaddr=c400000\0" \
"net_load=tftpboot $(loadaddr) $(loadfile)\0" \
"net_nfs=run net_load nfs_args add_net add_misc;bootm\0" \
"kernel_addr=00040000\0" \
"kernel_addr=000C0000\0" \
"flash_nfs=run nfs_args add_net add_misc;bootm $(kernel_addr)\0" \
"mdm_init1=ATZ\0" \
"mdm_init2=ATS0=1\0" \
"mdm_flow_control=rts/cts\0"
#endif /* CFG_HUSH_PARSER */
#else /* CONFIG_BIG_FLASH */
#endif /* CFG_HUSH_PARSER */
#else /* CONFIG_FLASH_8MB => 8 MB flash */
#ifdef CFG_HUSH_PARSER
#define CONFIG_EXTRA_ENV_SETTINGS \
"nfs_args=setenv bootargs root=/dev/nfs rw " \
@@ -230,13 +240,16 @@
"add_net=setenv bootargs $bootargs ethaddr=$ethaddr " \
"ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname::off\0" \
"add_misc=setenv bootargs $bootargs console=ttyS0 panic=1\0" \
"load=tftp 0xC100000 /tftpboot/TRAB/u-boot.bin\0" \
"update=protect off 1:0;era 1:0;cp.b 0xc100000 0 $filesize\0" \
"u-boot=/tftpboot/TRAB/u-boot.bin-old\0" \
"load=tftp C100000 ${u-boot}\0" \
"update=protect off 0 3FFFF;era 0 3FFFF;" \
"cp.b C100000 0 $filesize;" \
"setenv filesize;saveenv\0" \
"loadfile=/tftpboot/TRAB/uImage\0" \
"loadaddr=c400000\0" \
"loadaddr=C400000\0" \
"net_load=tftpboot $loadaddr $loadfile\0" \
"net_nfs=run net_load nfs_args add_net add_misc;bootm\0" \
"kernel_addr=00040000\0" \
"kernel_addr=000C0000\0" \
"flash_nfs=run nfs_args add_net add_misc;bootm $kernel_addr\0" \
"mdm_init1=ATZ\0" \
"mdm_init2=ATS0=1\0" \
@@ -250,19 +263,22 @@
"add_net=setenv bootargs $(bootargs) ethaddr=$(ethaddr) " \
"ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask):$(hostname)::off\0" \
"add_misc=setenv bootargs $(bootargs) console=ttyS0 panic=1\0" \
"load=tftp 0xC100000 /tftpboot/TRAB/u-boot.bin\0" \
"update=protect off 1:0;era 1:0;cp.b 0xc100000 0 $(filesize)\0" \
"u-boot=/tftpboot/TRAB/u-boot.bin-old\0" \
"load=tftp C100000 $(u-boot)\0" \
"update=protect off 0 3FFFF;era 0 3FFFF;" \
"cp.b C100000 0 $(filesize);" \
"setenv filesize;saveenv\0" \
"loadfile=/tftpboot/TRAB/uImage\0" \
"loadaddr=c400000\0" \
"loadaddr=C400000\0" \
"net_load=tftpboot $(loadaddr) $(loadfile)\0" \
"net_nfs=run net_load nfs_args add_net add_misc;bootm\0" \
"kernel_addr=00040000\0" \
"kernel_addr=000C0000\0" \
"flash_nfs=run nfs_args add_net add_misc;bootm $(kernel_addr)\0" \
"mdm_init1=ATZ\0" \
"mdm_init2=ATS0=1\0" \
"mdm_flow_control=rts/cts\0"
#endif /* CFG_HUSH_PARSER */
#endif /* CONFIG_BIG_FLASH */
#endif /* CONFIG_FLASH_8MB */
#if 0 /* disabled for development */
#define CONFIG_AUTOBOOT_KEYED /* Enable password protection */
@@ -290,12 +306,12 @@
#define CFG_MAXARGS 16 /* max number of command args */
#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
#define CFG_MEMTEST_START 0x0c000000 /* memtest works on */
#define CFG_MEMTEST_END 0x0d000000 /* 16 MB in DRAM */
#define CFG_MEMTEST_START 0x0C000000 /* memtest works on */
#define CFG_MEMTEST_END 0x0D000000 /* 16 MB in DRAM */
#undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */
#define CFG_LOAD_ADDR 0x0cf00000 /* default load address */
#define CFG_LOAD_ADDR 0x0CF00000 /* default load address */
#ifdef CONFIG_TRAB_50MHZ
/* the PWM TImer 4 uses a counter of 15625 for 10 ms, so we need */
@@ -334,27 +350,27 @@
* Physical Memory Map
*/
#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
#define PHYS_SDRAM_1 0x0c000000 /* SDRAM Bank #1 */
#define PHYS_SDRAM_1 0x0C000000 /* SDRAM Bank #1 */
#ifndef CONFIG_RAM_16MB
#define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB */
#else
#define PHYS_SDRAM_1_SIZE 0x01000000 /* 16 MB */
#endif
#define CFG_FLASH_BASE 0x00000000 /* Flash Bank #1 */
/* The following #defines are needed to get flash environment right */
#define CFG_MONITOR_BASE CFG_FLASH_BASE
#ifndef CONFIG_BIG_FLASH
#define CFG_MONITOR_LEN (256 << 10)
#else
#define CFG_MONITOR_LEN (128 << 10)
#endif
/*-----------------------------------------------------------------------
* FLASH and environment organization
*/
#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
#ifndef CONFIG_BIG_FLASH
#define CFG_MAX_FLASH_SECT 71 /* max number of sectors on one chip */
#else
#ifndef CONFIG_FLASH_8MB
#define CFG_MAX_FLASH_SECT 128 /* max number of sectors on one chip */
#else
#define CFG_MAX_FLASH_SECT 71 /* max number of sectors on one chip */
#endif
/* timeout values are in ticks */
@@ -364,14 +380,14 @@
#define CFG_ENV_IS_IN_FLASH 1
/* Address and size of Primary Environment Sector */
#ifndef CONFIG_BIG_FLASH
#ifndef CONFIG_FLASH_8MB
#define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x60000)
#define CFG_ENV_SIZE 0x4000
#define CFG_ENV_SECT_SIZE 0x20000
#else
#define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x4000)
#define CFG_ENV_SIZE 0x4000
#define CFG_ENV_SECT_SIZE 0x4000
#else
#define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x20000)
#define CFG_ENV_SIZE 0x4000
#define CFG_ENV_SECT_SIZE 0x20000
#endif
/* Address and size of Redundant Environment Sector */

View File

@@ -1,38 +1,38 @@
/*----------------------------------------------------------------------------+
|
| This source code has been made available to you by IBM on an AS-IS
| basis. Anyone receiving this source is licensed under IBM
| copyrights to use it in any way he or she deems fit, including
| copying it, modifying it, compiling it, and redistributing it either
| with or without modifications. No license under IBM patents or
| patent applications is to be implied by the copyright license.
| This source code has been made available to you by IBM on an AS-IS
| basis. Anyone receiving this source is licensed under IBM
| copyrights to use it in any way he or she deems fit, including
| copying it, modifying it, compiling it, and redistributing it either
| with or without modifications. No license under IBM patents or
| patent applications is to be implied by the copyright license.
|
| Any user of this software should understand that IBM cannot provide
| technical support for this software and will not be responsible for
| any consequences resulting from the use of this software.
| Any user of this software should understand that IBM cannot provide
| technical support for this software and will not be responsible for
| any consequences resulting from the use of this software.
|
| Any person who transfers this source code or any derivative work
| must include the IBM copyright notice, this paragraph, and the
| preceding two paragraphs in the transferred software.
| Any person who transfers this source code or any derivative work
| must include the IBM copyright notice, this paragraph, and the
| preceding two paragraphs in the transferred software.
|
| COPYRIGHT I B M CORPORATION 1999
| LICENSED MATERIAL - PROGRAM PROPERTY OF I B M
| COPYRIGHT I B M CORPORATION 1999
| LICENSED MATERIAL - PROGRAM PROPERTY OF I B M
+----------------------------------------------------------------------------*/
/*----------------------------------------------------------------------------+
|
| File Name: miiphy.h
| File Name: miiphy.h
|
| Function: Include file defining PHY registers.
| Function: Include file defining PHY registers.
|
| Author: Mark Wisner
| Author: Mark Wisner
|
| Change Activity-
|
| Date Description of Change BY
| --------- --------------------- ---
| 04-May-99 Created MKW
| 07-Jul-99 Added full duplex support MKW
| 08-Sep-01 Tweaks gvb
| Date Description of Change BY
| --------- --------------------- ---
| 04-May-99 Created MKW
| 07-Jul-99 Added full duplex support MKW
| 08-Sep-01 Tweaks gvb
|
+----------------------------------------------------------------------------*/
#ifndef _miiphy_h_
@@ -49,35 +49,35 @@ int miiphy_duplex(unsigned char addr);
/* phy seed setup */
#define AUTO 99
#define _100BASET 100
#define _10BASET 10
#define HALF 22
#define FULL 44
#define AUTO 99
#define _100BASET 100
#define _10BASET 10
#define HALF 22
#define FULL 44
/* phy register offsets */
#define PHY_BMCR 0x00
#define PHY_BMCR 0x00
#define PHY_BMSR 0x01
#define PHY_PHYIDR1 0x02
#define PHY_PHYIDR2 0x03
#define PHY_PHYIDR1 0x02
#define PHY_PHYIDR2 0x03
#define PHY_ANAR 0x04
#define PHY_ANLPAR 0x05
#define PHY_ANLPAR 0x05
#define PHY_ANER 0x06
#define PHY_ANNPTR 0x07
#define PHY_PHYSTS 0x10
#define PHY_MIPSCR 0x11
#define PHY_MIPGSR 0x12
#define PHY_DCR 0x13
#define PHY_ANNPTR 0x07
#define PHY_PHYSTS 0x10
#define PHY_MIPSCR 0x11
#define PHY_MIPGSR 0x12
#define PHY_DCR 0x13
#define PHY_FCSCR 0x14
#define PHY_RECR 0x15
#define PHY_PCSR 0x16
#define PHY_LBR 0x17
#define PHY_10BTSCR 0x18
#define PHY_PHYCTRL 0x19
#define PHY_LBR 0x17
#define PHY_10BTSCR 0x18
#define PHY_PHYCTRL 0x19
/* PHY BMCR */
#define PHY_BMCR_RESET 0x8000
#define PHY_BMCR_LOOP 0x4000
#define PHY_BMCR_RESET 0x8000
#define PHY_BMCR_LOOP 0x4000
#define PHY_BMCR_100MB 0x2000
#define PHY_BMCR_AUTON 0x1000
#define PHY_BMCR_POWD 0x0800
@@ -103,11 +103,11 @@ int miiphy_duplex(unsigned char addr);
/*phy ANLPAR */
#define PHY_ANLPAR_NP 0x8000
#define PHY_ANLPAR_ACK 0x4000
#define PHY_ANLPAR_RF 0x2000
#define PHY_ANLPAR_T4 0x0200
#define PHY_ANLPAR_TXFD 0x0100
#define PHY_ANLPAR_TX 0x0080
#define PHY_ANLPAR_RF 0x2000
#define PHY_ANLPAR_T4 0x0200
#define PHY_ANLPAR_TXFD 0x0100
#define PHY_ANLPAR_TX 0x0080
#define PHY_ANLPAR_10FD 0x0040
#define PHY_ANLPAR_10 0x0020
#define PHY_ANLPAR_100 0x0380 /* we can run at 100 */
#define PHY_ANLPAR_10 0x0020
#define PHY_ANLPAR_100 0x0380 /* we can run at 100 */
#endif

View File

@@ -157,7 +157,7 @@ static void display_flash_config (ulong size)
/*
* Breath some life into the board...
*
* Initialize an SMC for serial comms, and carry out some hardware
* Initialize a serial port as console, and carry out some hardware
* tests.
*
* The first part of initialization is running from Flash memory;
@@ -285,7 +285,7 @@ void start_armboot (void)
}
}
devices_init (); /* get the devices list going. */
devices_init (); /* get the devices list going. */
jumptable_init ();