This reverts commit ca9c8a1e10,
which causes compile warnings ("large integer implicitly truncated
to unsigned type") on all systems that use this driver. The warning
results from passing long constants (TX_CFG, RX_CFG) into
smc911x_set_mac_csr() which is declared to accept "unsigned
character" arguments only.
Being close to a release, with nobody available to actually test the
code or the suggested fixes, it seems better to revert the patch.
The ddr code computes most things as 64-bit quantities and had some places
in the middle that it was using phy_addr_t and phys_size_t.
Instead we use unsigned long long through out and only at the last stage of
setting the LAWs and reporting the amount of memory to the board code do we
truncate down to what we can cover via phys_size_t.
This has the added benefit that the DDR controller itself is always setup
the same way regardless of how much memory we have. Its only the LAW
setup that limits what is visible to the system.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
MPC8569 UART1 signals are muxed with PortF bit[9-12], we need to define
those pins before using UART1.
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
- Increase the size of malloc to 512KB because MPC8569MDS needs more memory for
malloc to support up to eight Ethernet interfaces.
- Move Environment address out of uboot thus the saved environment variables
will not be erased after u-boot is re-programmed.
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Remove "saveenv" from "update" definition: the environment is outside
the U-Boot image on TQM85xx and therefor not affected by updates.
Also "beautify" code a bit (vertical alignment).
Signed-off-by: Wolfgang Denk <wd@denx.de>
Old TQM85xx boards had 'M' type Spansion Flashes from the S29GLxxxM
series while new boards have 'N' type Flashes from the S29GLxxxN
series, which have bigger sectors: 2 x 128 instead of 2 x 64 KB.
We now change the configuration to the new flash types for all
boards; this also works on old boards - we just waste two flash
sectors for the environment which could be smaller there.
Signed-off-by: Wolfgang Denk <wd@denx.de>
The SYS_CLK_IN of MPC8569MDS is 66.66MHz,
The DDR_CLK_IN is same with SYS_CLK_IN in 8569 processor.
so, change the SYS_CLK_IN from 66MHz to 66.66MHz.
Signed-off-by: Dave Liu <daveliu@freescale.com>
The BCSR17[7] = 1 will unlock the write protect of FLASH.
The WP# pin only controls the write protect of top/bottom sector,
That is why we can save env, but we can't write the first sector
before the patch.
Signed-off-by: Dave Liu <daveliu@freescale.com>
The MAXSIZE field in the TLB1CFG register is 4 bits, not 8 bits.
This made setup_ddr_tlbs() try to set up a TLB larger than the e500 maximum
(256 MB)
which made u-boot hang in board_init_f() when trying to create a new stack
in RAM.
I have an mpc8540 with one 1GB dimm.
Signed-off-by: Fredrik Arnerup <fredrik.arnerup@edgeware.tv>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Acked-by: Kumar Gala <galak@kernel.crashing.org>
Currently the clk_adj is 6 (3/4 cycle), The settings will cause
the DDR controller hang at the data init. Change the clk_adj
from 6 to 4 (1/2 cycle), make the memory system stable.
Signed-off-by: Dave Liu <daveliu@freescale.com>
This patch corrects the missing PLLB initialization in usb_cpu_init()
for AT91SAM9261.
Because of the missing PLLB initialization, the USB support for all
AT91SAM9261 based boards will work only if the PLLB is configured by a
precedent bootloader.
Signed-off-by: Ilko Iliev <iliev@ronetix.at>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Remy Bohmer <linux@bohmer.net>
This patch fixes MDIO clock setup in case when OPB frequency is 100MHz.
Current code assumes that the value of sysinfo.freqOPB is 100000000
when OPB frequency is 100MHz. In reality it is 100000001. As a result
MDIO clock is set to incorrect value, larger than 2.5MHz, thus violating
the standard. This in not a problem on boards equipped with Marvell PHYs
(e.g. Canyonlands), since those PHYs support MDIO clocks up to 8.3MHz,
but can be a problem for other PHYs (e.g. Realtek ones).
Signed-off-by: Felix Radensky <felix@embedded-sol.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
When PCI device use system memory, some PCI host controller should be
set physical memory address.
Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
eth_halt() function in the smc911x drivers used to call the
smc911x_reset() function. eth_halt() used to be called after
tftp transfers. This used to put the ethernet chip in reset
while the linux boots up resulting in the ethernet driver
not coming up. NFS boot used to fail as a result.
This patch calls smc911x_shutdown() instead of smc911x_reset().
Some comments received has also been fixed.
Signed-off-by: Manikandan Pillai <mani.pillai@ti.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Some boards do not have SROM support for the DM9000 network adapter.
Instead of listing these board names in the driver code, make this
option configurable from the board config file.
It also removes a build warning for the at91sam9261ek board:
'dm9000x.c:545: warning: 'read_srom_word' defined but not used'
And it repaires the trizepsiv board build which was broken around the
same routines
Signed-off-by: Remy Bohmer <linux@bohmer.net>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
In GMII mode (which operates at 3.3V) both SICRH TSEC1/2 output buffer
impedance bits should be clear, i.e., SICRH[TSIOB1] = 0 and SICRH[TSIOB2] = 0.
SICRH[TSIOB1] was erroneously being set high.
U-Boot always operated this PHY interface in GMII mode. It is assumed this
was missed in the clean up by the original board porters, and copied along
to the TQM and sbc boards.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Acked-by: Ira Snyder <iws@ovro.caltech.edu>
Reviewed-by: David Hawkins <dwh@ovro.caltech.edu>
Tested-by: Paul Gortmaker <paul.gortmaker@windriver.com>
CC: Dave Liu <DaveLiu@freescale.com>
Several boards used different ways to specify the size of the
protected area when enabling flash write protection for the sectors
holding the environment variables: some used CONFIG_ENV_SIZE and
CONFIG_ENV_SIZE_REDUND, some used CONFIG_ENV_SECT_SIZE, and some even
a mix of both for the "normal" and the "redundant" areas.
Normally, this makes no difference at all. However, things are
different when you have to deal with boards that can come with
different types of flash chips, which may have different sector
sizes.
Here we may have to chose CONFIG_ENV_SECT_SIZE such that it fits the
biggest sector size, which may include several sectors on boards using
the smaller sector flash types. In such a case, using CONFIG_ENV_SIZE
or CONFIG_ENV_SIZE_REDUND to enable the protection may lead to the
case that only the first of these sectors get protected, while the
following ones aren't.
This is no real problem, but it can be confusing for the user -
especially on boards that use CONFIG_ENV_SECT_SIZE to protect the
"normal" areas, while using CONFIG_ENV_SIZE_REDUND for the
"redundant" area.
To avoid such inconsistencies, I changed all sucn boards that I found
to consistently use CONFIG_ENV_SECT_SIZE for protection. This should
not cause any functional changes to the code.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Paul Ruhland
Cc: Pantelis Antoniou <panto@intracom.gr>
Cc: Stefan Roese <sr@denx.de>
Cc: Gary Jennejohn <garyj@denx.de>
Cc: Dave Ellis <DGE@sixnetio.com>
Acked-by: Stefan Roese <sr@denx.de>
Return value of mmc_send_if_cond() can be safely ignored (as it is
done in Linux). This makes older cards work with MXC MCI controller.
Signed-off-by: Ilya Yanok <yanok@emcraft.com>
This patch now enabled this cfi-mtd wrapper to correctly detect and
erase the last sector in an NOR FLASH device.
Signed-off-by: Stefan Roese <sr@denx.de>
SCR & switch data are read from card as big-endian words and should be
converted to CPU byte order.
Signed-off-by: Yauhen Kharuzhy <jekhor@gmail.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Cards which are not compatible with SD 2.0 standard, may return response
for CMD8 command, but it will be invalid in terms of SD 2.0. We should
accept this case as admissible, just like Linux does.
Signed-off-by: Yauhen Kharuzhy <jekhor@gmail.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
The mmc code defines the response as an array of chars. However, it
access the response bytes both as (i) an array of four uints (with
casts) and (ii) as individual chars. The former case is used more
often, including by the driver when it assigns the response.
The char-wise accesses are broken on little endian systems because they
assume that the bytes in the uints are in big endian byte order.
This patch fixes this by changing the response to be an array of four
uints and replacing the char-wise accesses with equivalent uint-wise
accesses.
Signed-off-by: Rabin Vincent <rabin@rab.in>
The generic MMC core uses direct long long divisions, which do not build
with ARM EABI toolchains. Use lldiv() instead, which works everywhere.
Signed-off-by: Rabin Vincent <rabin@rab.in>
find_mmc_device returns NULL if an invalid device number is specified.
Check for this to avoid dereferencing NULL pointers.
Signed-off-by: Rabin Vincent <rabin@rab.in>
A missing set of parenthesis caused the silicon revision to apply only to
the BF533 and not the BF531/BF532 variants.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Currently using JFFS2 with MTDPARTS enabled doesn't work. This is because
mtdparts_init() is available in both files, cmd_mtdparts.c and
cmd_jffs2.c. Please note that in the original cmd_jffs2.c file (before
the jffs2/mtdparts command/file split those 2 different versions
already existed. So this is nothing new. The main problem is that the
variables "current_dev" and "current_partnum" are declared in both
files now. This doesn't work.
This patch now changes the names of those variable to more specific
names: "current_mtd_dev" and "current_mtd_partnum". This is because
this patch also changes the declaration from static to global, so
that they can be used from both files.
Please note that my first tests were not successful. The MTD devices
selected via mtdparts are now accessed but I'm failing to see the
directory listed via the "ls" command. Nothing is displayed. Perhaps
I didn't generate the JFFS2 image correctly (I never used JFFS2 in
U-Boot before). Not sure. Perhaps somebody else could take a look at
this as well. I'll continue looking into this on Monday.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Detlev Zundel <dzu@denx.de>
Cc: Ilya Yanok <yanok@emcraft.com>
Cc: Renaud barbier <renaud.barbier@ge.com>
The pins for async memory where parallel flash lives are not enabled by
default, so make sure we mux them as needed.
Signed-off-by: Graf Yang <graf.yang@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
This patch enables Smart Media (SMC) ECC byte ordering which is used
on the PPC4xx NAND FLASH controller (NDFC). Without this patch we have
incompatible ECC byte ordering to the Linux kernel NDFC driver.
Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Scott Wood <scottwood@freescale.com>
This patch now uses the correct ECC byte order (Smart Media - SMC)
to be used on the 4xx NAND FLASH driver. Without this patch we have
incompatible ECC byte ordering to the Linux kernel NDFC driver.
Please note that we also have to enable CONFIG_MTD_NAND_ECC_SMC in
drivers/mtd/nand/nand_ecc.c for correct operation. This is done with
a seperate patch.
Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Scott Wood <scottwood@freescale.com>
This patch moves the definition for the PPC4xx NAND FLASH controller
(NDFC) CONFIG_NAND_NDFC into include/ppc4xx.h. This is needed for the
upcoming fix for the ECC byte ordering of the NDFC driver.
Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Scott Wood <scottwood@freescale.com>
cmd_ide.c:547: error: inline function 'ide_inb' cannot be declared weak
removing the inline attribute fixes it.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Return -ENODEV instead of 0 when trying to read from a non existing volume.
Signed-off-by: Andreas Huber <andreas.huber@keymile.com>
Signed-off-by: Stefan Roese <sr@denx.de>
The timer_init() function was not using the right csync instruction, nor
was it doing it right after disabling the core timer.
The timer_reset() function would reset the timestamp, but not the actual
timer, so there was a common edge case where get_timer() return a jump of
one timestamp (couple milliseconds) right after resetting. This caused
many functions to improperly timeout right away.
Signed-off-by: Graf Yang <graf.yang@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
This fixes the following build warnings:
board.c: In function 'board_init_r':
board.c:328: warning: unused variable 'i'
board.c:326: warning: unused variable 'e'
Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
All these functions are expected to be static inline-ed.
This patch also fixes the following build warnings on MIPS targets:
include/asm/bitops.h: In function 'ext2_find_next_zero_bit':
include/asm/bitops.h:862: warning: '__fswab32' is static but used in inline function 'ext2_find_next_zero_bit' which is not static
include/asm/bitops.h:885: warning: '__fswab32' is static but used in inline function 'ext2_find_next_zero_bit' which is not static
include/asm/bitops.h:887: warning: '__fswab32' is static but used in inline function 'ext2_find_next_zero_bit' which is not static
Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
Implement ethernet halt() by putting MAC0 in reset.
If we do not do this, we will get memory corruption
when ethernet frames are received during early OS boot.
Signed-off-by: Thomas Lange <thomas@corelatus.se>
Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
U-Boot does not currently build for PXA platforms with USB support
enabled:
usb.c:46: error: 'UP2OCR' undeclared (first use in this function)
Signed-off-by: Daniel Mack <daniel@caiaq.de>
Cc: Markus Klotzbuecher <mk@denx.de>
Edited commit message.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Commit 574b319512 introduced a subtle bug by mixing a list of tests
for "dev_desc->type" and "dev_desc->if_type" into one switch(), which
then mostly did not work because "dev_desc->type" cannot take any
"IF_*" type values. A later fix in commit 8ec6e332ea changed the
switch() into testing "dev_desc->if_type", but at this point the
initial test for unknown device types was completely lost, which
resulted in output like that for IDE ports without device attached:
Device 1: Model: Firm: Ser#:
Type: # 1F #
Capacity: not available
This patch re-introduces the missing test for unknown device types.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Detlev Zundel <dzu@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
This patch fixes a problem in the CPU frequency calculation. Without it
a 798MHz CPU is displayed as 368.503 MHz. And with it it's 798 MHz.
Signed-off-by: Stefan Roese <sr@denx.de>
The 'inline' is conflicting with the semantic of 'weak' attribute and with the
way the show_boot_progress() function is used.
Also gcc 4.4 is complaining about it:
main.c:51: error: inline function 'show_boot_progress' cannot be declared weak
Signed-off-by: Emil Medve <Emilian.Medve@Freescale.com>
cpu/mpc8260/cpu.c used to use do_fixup_by_path_u32() to update the
clock frequencies in the device tree, using a CPU path
"/cpus/OF_CPU", with OF_CPU beind defined in the board config file.
However, this does not work when one board config file (here:
MPC8260ADS.h) is intended to be used for several diffrent CPUs and
therefor contains a generic definition like "cpu@0", as the device
trees that will then be loaded will contain specific names like
"PowerPC,8272@0".
We switch to using do_fixup_by_prop_u32() instead, so we can search
for device_type="cpu", as it is done in other architectures, too.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Acked-by: Heiko Schocher <hs@denx.de>
Tested-by: Heiko Schocher <hs@denx.de>
Add CONFIG_SYS_MONITOR_LEN macro to apollon board config.
CONFIG_SYS_MONITOR_LEN defines the U-Boot image size.
and is used by OneNAND ipl when reading U-Boot image.
Signed-off-by: Rohit Hagargundgi <h.rohit at samsung.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
This will make CONFIG_NET_MULTI the only net driver configuration and
we'll be able to remove this option.
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
The pin which was used in preliminary versions of the board for ide
reset is really connected to the rtc clock.
Signed-off-by: Detlev Zundel <dzu@denx.de>
This patch adds, under tools folder, a new command called imls. Its
goal is the same of UBoot's imls but it can be used as Linux shell
command. It reads from raw mtd partition and prints the list of the
stored images.
Signed-off-by: Marco Stornelli <marco.stornelli@gmail.com>
Fix some issues introduced from commit:
2f70c49e5b
suggested by Mike Frysinger.
- added some comment for the env_id variable in common_cmd_nvedit.c
- moved some variables in fn scope instead of file scope
- NetInitLoop now static void
Signed-off-by: Heiko Schocher <hs@denx.de>
Acked-by: Ben Warren <biggerbadderben@gmail.com>
I never acked a patch that adds me as phycore i.MX31 maintainer nor was
it me who pushed the patches, so remove myself from the maintainer list
so that other people do not longer wait for my ack.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
AFEB9260 uses PA10, PA11 for ETX2 and ETX3.
Also, due to extarnal pull-up on IRQ line, Micrel PHY ID is 1 after reset sequence,
not 0.
Signed-off-by: Sergey Lapin <slapin@ossfans.org>
We don't know what state the ethernet PHY is in when starting up, so make
sure we set it to a sane state. This fixes troubles seen when Linux boots
up, configures the PHY is a non-default state, and then the system reboots
into U-Boot which previously expected a reset state only.
Signed-off-by: Graf Yang <graf.yang@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The BF527-EZKIT settings for storing the environment in SPI flash wasn't
using the correct sector settings for the SPI flash part that is actually
on the board.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
When the clock functions were changed to use cached values (and thereby
avoiding expensive math functions), early serial debug broke because the
baud programming is called before external memory is available.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
When dropping jump block support, the assumption was that all bootroms
supported entry point redirection via the EVT1 register. Unfortunately,
this turned out to be incorrect for the oldest Blackfin parts (BF533-0.2
and older and BF561). No one really noticed earlier because these parts
usually are booted by bypassing the bootrom entirely, and older BF533
parts are not supported at all (too many anomalies).
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Make sure we recurse through serial_putc() rather than bang on the UART
transmit register directly to avoid hardware overflows when using \n.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
lowlevel_init.S is not used any more so remove it.
As consequence, we also don't have to generate u-boot.lds
but can use a static version as before.
This also fixes the out-of-tree build problem introduced
with commit f0a2c7b4 "at91: add support for the PM9263 board"
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Wolfgang Denk <wd@denx.de>
The Beagle Rev C boards pull UART2 from an alternate set of balls.
Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Dirk Behme <dirk.behme@googlemail.com>
Blocks compressed with zlib dont have the full gzip header.
Without this patch, block compressed with zlib cannot be readed!
Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@uam.es>
Separate gunzip in
gunzip: Find the end of the header and call zunzip.
zunzip: Inflate gunzip block without header.
UBI fs blocks can be compresed in lzo, zlib or no-compression. The
current implementation of u-boot supported all the compressions but
there was a bug in the implementation of the zlib blocks.
UBIFS's Zlib blocks do not have header but they were compressed using
gunzip, a function used to decompress gunzip files/sectors with a
header.
This patch adds a new function zunzip that uncompress a zlib block with
no header.
Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@uam.es>
Let CONFIG_SYS_HZ to have value of 1000 effectively fixing all users of
get_timer.
Changes since original version:
* Set PTV=2 (divisor 8) for boards using 12MHz timer clock source to
improve timer resolution.
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
The function display_board_info() displays incorrect
silicon revision - based on the return value from
function get_cpu_rev().
This patch fixes the problem.
Signed-off-by: Sanjeev Premi <premi@ti.com>
The board-types defined in struct omap3_sysinfo seem to be
unused. The function display_board_info() is passed
board type as an argument; which is ignored.
This patch removes all uses of board-type, related definitions
and functions.
Signed-off-by: Sanjeev Premi <premi@ti.com>
Use the functions print_cpuinfo() and checkboard() to
display the cpu and board specific information.
These functions reuse content from the existing function
display_board_info() - which has been removed.
Also, updated the existig OMAP3 configurations to
define:
- CONFIG_DISPLAY_CPUINFO
- CONFIG_DISPLAY_BOARDINFO
Signed-off-by: Sanjeev Premi <premi@ti.com>
With this patch non-uniform NOR FLASH chips (chips with multiple erase
regions) can be exported via the cfi-mtd layer and therefor used by UBI.
We select the largest sector size as erasesize. The cfi driver will make
sure that the smaller sectors are handled correctly.
Signed-off-by: Stefan Roese <sr@denx.de>
Fix bug in drawing long version/info strings:
U-Boot version string like
"U-Boot 2009.03-05647-g7c51e06 (Apr 23 2009 - 12:40:00) MPC83XX"
is long and doesn't wrap around correctly while drawing
beside the logo. Such long strings partially overwrite
the logo. This patch is an attempt to fix it.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Get rid of these warnings:
cmd_ext2.c:247: warning: format '%ld' expects type 'long int', but argument 2 has type 'int'
cmd_ext2.c:248: warning: format '%lX' expects type 'long unsigned int', but argument 3 has type 'int'
Signed-off-by: Wolfgang Denk <wd@denx.de>
because legacy NAND support is deprecated converting to current
NAND interface. !This just compile, because I have no more the
hardware to test it.
Signed-off-by: Heiko Schocher <hs@denx.de>
If the memory used to copy the link_make is "dirty" the string wont
be ended with NULL, throwing out multiple memory bugs.
Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@uam.es>
Acked-by: Stefan Roese <sr@denx.de>
Add basic error handling to fread() function calls. This prevents
compililation warnings such as:
bmp_logo.c: In function ‘main’:
bmp_logo.c:71: warning: ignoring return value of ‘fread’, declared with
attribute warn_unused_result
...
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
This prevents the compilation warning:
ncb.c: In function 'main':
ncb.c:32: warning: ignoring return value of ‘write’, declared with
attribute warn_unused_result
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
With this patch the NAND and OneNAND devices are registered in the MTD
subsystem and can then be referenced by the mtdcore code (e.g.
get_mtd_device_nm()). This is needed for the new "ubi part" command
syntax without the flash type parameter (nor|nand|onenand).
Signed-off-by: Stefan Roese <sr@denx.de>
This patch removes this compilation warning when CONFIG_MTD_PARTITIONS is
defined:
nand_base.c: In function 'nand_release':
nand_base.c:2922: warning: implicit declaration of function 'del_mtd_partitions'
Signed-off-by: Stefan Roese <sr@denx.de>
This patch removes the now unnecessary flash type parameter from the
"ubi part" command. Currently the user has to define the type of flash
he will be using UBI on. Example:
=> ubi part nor partition1
With this patch this type parameter is not needed anymore. The user can
now select the partition directly without the flash type paramter.
Example:
=> ubi part partition1
This breaks backward compatibility right now because of the change in the
command syntax. But UBI support is still quite fresh and the advantage of
this new command is syntax big enough for this change. Additionally the
code is much cleaner now.
Signed-off-by: Stefan Roese <sr@denx.de>
CC: Kyungmin Park <kyungmin.park@samsung.com>
As the common code also handles baudrate switching, which the board
specific vct.c driver did not support, this is one of the rare
occassions where deleting code actually adds a feature :)
Signed-off-by: Detlev Zundel <dzu@denx.de>
Acked-by: Stefan Roese <sr@denx.de>
Acked-by: Shinya Kuribayashi <shinya.kuribayashi@necel.com>
On Thu, Mar 19, 2009 at 01:30:36PM +0100, Stefan Roese wrote:
> Currently the mtdparts commands are included in the jffs2 command support.
> This doesn't make sense anymore since other commands (e.g. UBI) use this
> infrastructure as well now. This patch separates the mtdparts commands from
> the jffs2 commands making it possible to only select mtdparts when no JFFS2
> support is needed.
One more leftover... Let nboot command know about partitions even if JFFS2
support is not enabled.
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Acked-by: Stefan Roese <sr@denx.de>
The output_data_short() and input_data_short() functions for the
AmigaOneG3SE are unused and result in compiler warnings.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
__asm__ follows gcc's documented syntax and is generally more common
than __asm. This change is only asthetic and should not affect
functionality.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
__attribute__ follows gcc's documented syntax and is generally more
common than __attribute. This change is only asthetic and should not
affect functionality.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Make the headers in the "mtdparts" command output line up
with their columns ... strike the extra TAB character.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
I missed removing this file while implementing the UBIFS support. It's
not referenced at all, so let's remove it. Thanks to Artem Bityutskiy
for spotting.
Signed-off-by: Stefan Roese <sr@denx.de>
UBIFS did not recovery in a situation in which it could
have. The relevant function assumed there could not be
more nodes in an eraseblock after a corrupted node, but
in fact the last (NAND) page written might contain anything.
The correct approach is to check for empty space (0xFF bytes)
from then on.
Signed-off-by: Adrian Hunter <adrian.hunter@nokia.com>
Signed-off-by: Stefan Roese <sr@denx.de>
The filelen should be signed type, not unsigned type.
otherwise, The condition as below never take.
if (filelen < 0)
Signed-off-by: Gao Guanhua <B22826@freescale.com>
Signed-off-by: Dave Liu <daveliu@freescale.com>
Make the U-Boot dm9000 driver read addresses from EEPROM just
like Linux does ... read six bytes, instead of reading twelve
bytes and then discarding every other one.
Using the right Ethernet address is a big win.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Ben Warren <biggerbadderben@gmail.com>
For a long time, the print_cpuinfo() declaration in lib_arm/board.c
had been marked as "test-only", which is plain wrong considering
current usage. Delete this misleading comment.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Minor cleanup to clock-related defines for DaVinci DM6446 boards:
- CONFIG_SYS_CLK_FREQ is unused; remove it.
- CONFIG_SYS_NS16550_CLK must be the same as CONFIG_SYS_HZ_CLOCK
On DM6446 both of those peripheral clocks actually come from the
same source, the primary oscillator. Having them use the same
symbol avoids bugs in the clone'n'modify development cycle.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
if using CONFIG_BOOTCOUNT_LIMIT feature on a MPC8360 CPU
in the muram-data node, the reg entry needs to be updated.
This is done in fdt_fixup_muram(), but we should use
the compatible "fsl,qe-muram-data" for searching the
node instead of searching the muram-data node with
an absolute path.
Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
The size of U-Boot binary for MPC8360ERDK increased
(> 2 flash sectors now), so 'saveenv' will partially
overwrite U-Boot in flash and will brick the board.
This patch moves environment offset to fourth flash
sector and also fixes CONFIG_SYS_MONITOR_LEN.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
The patch fixes the bug of partial initialization of global network
parameters.
Upon u-boot's start up the first ping command causes a failure of the
consequent TFTP command. It happens in the recently added mechanism of
the NetLoop initialization where initialization of global network
parameters is separated in the NetInitLoop routine which is called per
env_id change. Thus, ping request will initialize the network parameters
necessary for ping operation only, afterwards the env_changed_id will be
set to the env_id that will prevent all following initialization requests
from other protocols.
The problem is that the initialized by ping subset of network parameters
is not sufficient for other protocols and particularly for TFTP which
requires the NetServerIp also.
Signed-off-by: Michael Zaidman <michael.zaidman@gmail.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Change netdev.h to use CONFIG_ULI526X instead of CONFIG_ULI526. CONFIG_ULI526X
is used everywhere else, so that's the correct macro name. Without this fix,
Ethernet will not work on the Freescale MPC8610 HPCD.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Update the DaVinci DM6446 boards to use the new convention
for CONFIG_SYS_NS16550_REG_SIZE ... the size hasn't changed
from the original 4 bytes, but these chips are little-endian.
(Resolves a regression added recently by the include/ns16550.h
patch to "Unify structure declaration for registers". The code
previously worked just fine because the registers were accessed
as host-endian words, not as bytes.)
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
The first if statement checks for NULL ptrs, so there is no need to check
it again in later else cases (such as .oob).
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
CC: Scott Wood <scottwood@freescale.com>
Fix dependency goofage: it should certainly be possible to have the
partition support without bringing in UBI commands.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Acked-by: Stefan Roese <sr@denx.de>
Don't run the memory POST on the NAND-booting version. It will
overwrite part of the U-Boot image which is already loaded from NAND
to SDRAM. We were just lucky that it booted at all with this SDRAM
test enabled.
Signed-off-by: Stefan Roese <sr@denx.de>
Don't run the memory POST on the NAND-booting version. It will
overwrite part of the U-Boot image which is already loaded from NAND
to SDRAM. We were just lucky that it booted at all with this SDRAM
test enabled.
Signed-off-by: Stefan Roese <sr@denx.de>
The current define of get_bus_freq() in the CONFIG_NAND_SPL #ifdef is not
used at all. This patch changes it's define to the currently used value of
133333333 and removes the unnecessary code.
Signed-off-by: Stefan Roese <sr@denx.de>
This additional text in the bootup log helps to see if the board is
configured for NAND-booting. Especially helpful for boards that can
boot from NOR and NAND (e.g. most of the AMCC eval boards).
Signed-off-by: Stefan Roese <sr@denx.de>
Currently the NOR & NAND support in Linux only works for the "standard"
Sequoia, the version booting for NOR flash. The NAND-booting version
has the chip-selects swapped. Here the chip-select mappings:
"Standard" NOR-booting version:
CS0 NOR
CS3 NAND
NAND-booting version:
CS0 NAND
CS3 NOR
With this path the dtb gets fixed-up, so that the correct chip-select
numbers are patched in the dtb enabling correct NOR & NAND support
in Linux on the NAND-booting Sequoia version.
Signed-off-by: Stefan Roese <sr@denx.de>
There is no code change here, just new comments, but this keeps me from
having to do another audit from scratch in the future.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
DESCRIPTION:
The column address width settings for banks 2 and 3 are misconnected in
the SDRAM controller. Accesses to bank 2 will result in an error if the
Column Address Width for bank 3 (EB3CAW ) is not set to be the same as
that of bank 2.
WORKAROUND:
If using bank 2, make sure that banks 2 and 3 have the same column address
width settings in the EBIU_SDBCTL register. This must be the case
regardless of whether or not bank 3 is enabled.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
DESCRIPTION:
If the DF bit is set prior to a hardware reset, the PLL will continue to
divide CLKIN by 2 after the hardware reset, but the DF bit itself will be
cleared in the PLL_CTL register.
WORKAROUND:
Reprogram the PLL with DF cleared if the desire is to not divide CLKIN by
2 after reset.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
DESCRIPTION:
The Boot ROM is executed at power up/reset and changes the value of the
SICA_IWR registers from their default reset value of 0xFFFF, but does not
restore them.
WORKAROUND:
User code should not rely on the default value of these registers. Set
the desired values explicitly.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
We need to make sure the data written to the nand flash controller makes
it there before we start polling its status register. Otherwise, we may
get stale data and return before the controller is actually ready.
Signed-off-by: Graf Yang <graf.yang@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Acked-by: Scott Wood <scottwood@freescale.com>
This Patch adds Support for PXA27X UDC.
(Rebased to drivers/usb reorganisation)
Signed-off-by: Vivek Kutal <vivek.kutal@azingo.com>
Signed-off-by: Remy Bohmer <linux@bohmer.net>
move to linux usb driver organisation
as following
drivers/usb/gadget
drivers/usb/host
drivers/usb/musb
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Remy Bohmer <linux@bohmer.net>
Blackfin SPI driver was not driving the SPI chip-select high before
putting the chip-select signals into tri-state mode. This is probably
something that slipped by unnoticed in most designs. If the signals are
put directly into a tri-state mode, then the board is relying on the
pull-up resistors to pull up the chip-select before the next transaction.
Most of the time this is fine, except when you have two transactions that
follow each other very closely, such as the flash erase and read status
register commands. In this case I was seeing a 500ns separation between
the transactions. In my setup, with a 10kOhm pull-up, it would meet
timing spec about half the time and resulted in intermittent errors. (A
stronger pull up would fix this, but our design is targeted for low power
consumption and a 3.3kOhm @ 3.3v is 3.3mW of needless power consumption.)
I modified the spi_cs_deactivate() function in bfin_spi.c to drive the
chip-selects high before putting them into tri-state. For me, this
resulted in a rise time of 5ns instead of the previous rise time of about
1us, and fully satisfied the timing spec of the chip.
Signed-off-by: Todor I Mollov <tmollov@ucsd.edu>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
A new Overo expansion board uses GPIO 14, 21, 22 and 23 for LED's and
switches. This patch changes the pinmux configuration for those pins.
They were previously set up for unused MMC3_DAT4-7.
Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Dirk Behme <dirk.behme@googlemail.com>
imx31_phycore_eet is a variant of the imx31_phycore board with a few
extensions, which justifies a separate entry in the MAINTAINERS list,
whereas normally all entries sharing a single configuration file and a
board/ directory have only one entry in MAINTAINERS.
Reported-by: Wolfgang Denk <wd@denx.de>
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
The previous code waited 1000us before checking i2c
status. Measurement shows i2c is usually ready in
under 50us. Change the polling interval to 15us,
loop 6,667 times to keep the polling timeout constant
at 100ms.
Fixes this compile error:
board.c: In function 'do_switch_ecc':
board.c:339: error: 'cmd_tbl_t' has no member named 'help'
make[1]: *** [board.o] Error 1
make[1]: Leaving directory `/db/psp_git/users/a0756819/u-boot/cpu/arm_cortexa8/omap3'
make: *** [cpu/arm_cortexa8/omap3/libomap3.a] Error 2
This is due to the fact that current command uses long
help for the usage print even if the CONFIG_SYS_LONGHELP
is not enabled. (Thanks Jean-Christophe for explanation).
Signed-off-by: Sanjeev Premi <premi@ti.com>
Move machine specific code to smdk6400.
Some board use OneNAND instead of NAND.
Some register MP0_CS_CFG[5:0] are controled by both h/w and s/w.
So it's better to use macro instead of hard-coded value.
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
In addition to the changes for CONFIG_ENV_IS_IN_FLASH as done in
commit afcbce07, we also need to do the same for
CONFIG_ENV_IS_IN_EEPROM and CONFIG_ENV_IS_IN_NVRAM.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Without this, u-boot can crash or print garbage if the original link
address no longer points to a valid string.
Signed-off-by: Scott Wood <scottwood@freescale.com>
On platforms with multiple NOR chips, currently only the first one
can be selected using the "ubi part" command. This patch fixes this
problem by using different names for the NOR "mtd devices".
It also changes the name of the NOR MTD device from "cfi-mtd" to
"norX" (X indexing the device numer) to better match the mtdparts
defaults.
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Andreas Huber <andreas.huber@keymile.com>
Now UBIFS is supported by u-boot. If we ever decide to change the
media format, then people will have to upgrade their u-boots to
mount new format images. However, very often it is possible to
preserve R/O forward-compatibility, even though the write
forward-compatibility is not preserved.
This patch introduces a new super-block field which stores the
R/O compatibility version.
Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com>
Acked-by: Adrian Hunter <Adrian.Hunter@nokia.com>
Signed-off-by: Stefan Roese <sr@denx.de>
On Thu, Mar 19, 2009 at 01:30:36PM +0100, Stefan Roese wrote:
> Currently the mtdparts commands are included in the jffs2 command support.
> This doesn't make sense anymore since other commands (e.g. UBI) use this
> infrastructure as well now. This patch separates the mtdparts commands from
> the jffs2 commands making it possible to only select mtdparts when no JFFS2
> support is needed.
... and to make it useful for NAND chips as well, we should also remove now
unrelated CONFIG_JFFS2_NAND. Note that struct part_info etc is in
jffs2/load_kernel.h which is a bit misleading filename for that purpose,
but that can be fixed later (tm).
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Rather than sticking Blackfin-specific stuff into the eeprom example, use
an indirect macro so that any board can override it with their own magic
sauce in their board config file.
Also fix some spurious semi-colons in defines while I'm at it ...
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
CC: Ben Warren <biggerbadderben@gmail.com>
Update the rm9200 reset sequence to try executing a board-specific reset
function and move specific board reset to board.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
introduce serial_exit for this purpose. Use it only when the rm9200
serial driver is active
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
The AT91RM9200-EK Evaluation Board supports the AT91RM9200
ARM9-based 32-bit RISC microcontroller and enables real-time code development
and evaluation.
Here is the chip page on Atmel website:
http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3507
with
- NOR (cfi driver)
- DataFlash
- USB OHCI
- Net
- I2C (hard)
Signed-off-by: Ulf Samuelsson <ulf@atmel.com>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
In set_ddr_laws() when we determined how much of the size requested
to be mapped was covered by the the first LAW we needed to recalculate
the size based on what was actually mapped.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Rename the pci header for FSL HW so we can move some prototypes
in there and stop doing explicit externs
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Since commit a706bfc7 common/env_embedded.o and tools/envcrc were
only built when CONFIG_ENV_IS_EMBEDDED was set, but this breaks
building for many boards.
We always have to build these files when CONFIG_ENV_IS_IN_FLASH is
set.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Some systems have zlib.h installed in /usr/include/. This isn't the
desired file for u-boot code - we want the one in include/zlib.h.
This rename will avoid the conflict.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Instead of special casing the different access patterns, use common
code with light macros sprinkled in to accomodate for the different
layouts of the register structure.
Note that this also changes the types of the registers for the
"positively packed (>1)" cases. As the registers truly are unsigned
chars, this is surely the Right Thing, but it is a semantic change.
Note that for this case depending on the endianness on the bus, we may
see a change of behaviour.
Signed-off-by: Detlev Zundel <dzu@denx.de>
Add support for compiling the host tools in the tools directory using
the MinGW toolchain. This produces executables which can be used on
standard Windows computers without requiring cygwin.
One must specify the MinGW compiler and strip utilities as if they
were the host toolchain in order to build win32 executables, eg:
make HOSTCC=i586-mingw32msvc-gcc HOSTSTRIP=i586-mingw32msvc-strip tools
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Files in the SRCS variable have their dependencies automatically
generated so remove duplicate explicit dependencies
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
crc32.c uses the zlib.h header in include/u-boot/zlib.h. The symlink
was previously necessary to give U-Boot's version of zlib.h precedence
over the host computer's version of zlib.h.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Split variable declarations into multiple lines and use the standard
VAR-y convention. Also move object and binary variable declarations to
after config.mk has been included to allow for these lists to utilize
the CONFIG_XXX variables.
These changes lay the groundwork for conditional compilation of files
in the tools directory.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Replace random()/srandom() use with rand()/srand() to support
compilation with the mingw toolchain. The rand()/srand() functions are
generally more common and are functionally equivalent to the original
random()/srandom() calls.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
The original code provided an incomplete set of typedefs for WIN32
compiles and replicated the standard typedefs that are already
provided by stdint.h
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
The original code did not generate autoconf.mk until after some targets
dependencies had already been calculated, for example the directories in
the SUBDIRS variable
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Mflash is fusion memory device mainly targeted consumer eletronic and
mobile phone.
Internally, it have nand flash and other hardware logics and supports
some different operation (ATA, IO, XIP) modes.
IO mode is custom mode for the host that doesn't have IDE interface.
(Many mobile targeted SoC doesn't have IDE bus)
This driver support mflash IO mode.
Followings are brief descriptions about IO mode.
1. IO mode based on ATA protocol and uses some custom command. (read
confirm, write confirm)
2. IO mode uses SRAM bus interface.
Signed-off-by: unsik Kim <donari75@gmail.com>
Fix problems introduced in commit
7b5611cdd1 [inka4x0: Add hardware
diagnosis functions for inka4x0] which redefined MSR_RI which is
already used on PowerPC systems.
Also eliminate redundant definitions in ps2mult.h. More cleanup will
be needed for other redundant occurrences though.
Signed-off-by: Detlev Zundel <dzu@denx.de>
Legacy NAND is marked for feature removal after April 2009 (i.e. this
upcoming release). There are still several boards that reference it
(though many do so only for disk-on-chip support which has been silently
disabled for a while now). These boards will now fail to build
with #error, though the code is still there if the user removes #error.
The plan is to remove the code outright in the next release, along with
any board code that refers to it (such as board/esd/common/auto_update.c).
Also, remove the legacy NAND API description from README.nand.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Currently OneNAND initial program loader (ipl) reads only block 0 ie 128KB.
However, u-boot image for apollon board is 195KB making the board
unbootable with OneNAND.
Fix ipl to read CONFIG_SYS_MONITOR_LEN.
CONFIG_SYS_MONITOR_LEN macro holds the U-Boot image size.
Signed-off-by: Rohit Hagargundgi <h.rohit@samsung.com>
Signed-off-by: Gangheyamoorthy <moorthy.apg@samsung.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
According to the doc/feature-removal-schedule.txt, the "autoscr"
command will be replaced by the "source" command in approximately 6
months from now.
This patch prepares this change and starts a 6 month transition
period as follows:
- The new "source" command has been added, which implements exactly
the same functionlaity as the old "autoscr" command before
- The old "autoscr" command name is kept as an alias for compatibility
- Command sequences, script files atc. have been adapted to use the
new "source" command
- Related environment variables ("autoscript", "autoscript_uname")
have *not* been adapted yet; these will be renamed resp. removed in
a separate patch when the support for the "autoscr" command get's
finally dropped.
Signed-off-by: Wolfgang Denk <wd@denx.de>
I can't find anywhere in the datasheet that says the status register needs
3 dummy bytes sent to it before being able to read back the first real
result. Tests on a Blackfin board show that after writing the opcode, the
status register starts coming back immediately. So only write out the
read status register opcode before polling the result.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
CC: Jason McMullan <mcmullan@netapp.com>
CC: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
Since timeouts are only hit when there is a problem in the system, we
don't want to prematurely timeout on a functioning setup. Thus having
low timeouts (in milliseconds) doesn't gain us anything in the production
case, but rather increases likely hood of causing problems where none
otherwise exist.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
CC: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Some SPI flash drivers like to have extended id information available
(like the spansion flash), so rather than making it re-issue the ID cmd
to get at the last 2 bytes, have the common code read 5 bytes rather than
just 3. This also matches the Linux behavior where it always reads 5 id
bytes from all flashes.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Acked-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
CC: Mingkai Hu <Mingkai.hu@freescale.com>
Add MTD SPI Flash support for S25FL008A, S25FL016A,
S25FL032A, S25FL064A, S25FL128P.
Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Since the Blackfin timer code requires HZ to be 1000, barf on any board
that tries to use a different value.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The Blackfin SDH controller is still using the legacy framework, so update
the driver to use the renamed functions.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
When testing a u-boot binary that hasn't been booted from the bootrom, we
have to make sure the bootstruct structure has sane storage space. If we
don't, the initcode will crash when it tries to dereference an invalid
pointer.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
.../dtc/libfdt/fdt_sw.c: In function 'fdt_end_node':
.../dtc/libfdt/fdt_sw.c:81: error: assuming signed overflow does not occur when assuming that (X + c) < X is always false
Signed-off-by: Emil Medve <Emilian.Medve@Freescale.com>
Currently, callers of fdt_next_tag() must usually follow the call with
some sort of call to fdt_offset_ptr() to verify that the blob isn't
truncated in the middle of the tag data they're going to process.
This is a bit silly, since fdt_next_tag() generally has to call
fdt_offset_ptr() on at least some of the data following the tag for
its own operation.
This patch alters fdt_next_tag() to always use fdt_offset_ptr() to
verify the data between its starting offset and the offset it returns
in nextoffset. This simplifies fdt_get_property() which no longer has
to verify itself that the property data is all present.
At the same time, I neaten and clarify the error handling for
fdt_next_tag(). Previously, fdt_next_tag() could return -1 instead of
a tag value in some circumstances - which almost none of the callers
checked for. Also, fdt_next_tag() could return FDT_END either because
it encountered an FDT_END tag, or because it reached the end of the
structure block - no way was provided to tell between these cases.
With this patch, fdt_next_tag() always returns FDT_END with a negative
value in nextoffset for an error. This means the several places which
loop looking for FDT_END will still work correctly - they only need to
check for errors at the end. The errors which fdt_next_tag() can
report are:
- -FDT_ERR_TRUNCATED if it reached the end of the structure
block instead of finding a tag.
- -FDT_BADSTRUCTURE if a bad tag was encountered, or if the
tag data couldn't be verified with fdt_offset_ptr().
This patch also updates the callers of fdt_next_tag(), where
appropriate, to make use of the new error reporting.
Finally, the prototype for the long gone _fdt_next_tag() is removed
from libfdt_internal.h.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Currently fdt_next_node() will find the next node in the blob
regardless of whether it is above, below or at the same level in the
tree as the starting node - the depth parameter is updated to indicate
which is the case. When a depth parameter is supplied, this patch
makes it instead terminate immediately when it finds the END_NODE tag
for a node at depth 0. In this case it returns the offset immediately
past the END_NODE tag.
This has a couple of advantages. First, this slightly simplifies
fdt_subnode_offset(), which no longer needs to explicitly check that
fdt_next_node()'s iteration hasn't left the starting node. Second,
this allows fdt_next_node() to be used to implement
_fdt_node_end_offset() considerably simplifying the latter function.
The other users of fdt_next_node() either don't need to iterate out of
the starting node, or don't pass a depth parameter at all. Any
callers that really need to iterate out of the starting node, but keep
tracking depth can do so by biasing the initial depth value.
This is a semantic change, but I think it's very unlikely to break any
existing library users.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
The mpc8313erdb board currently sets DBAT6 to cover all of the final 256MiB of
address space; however, not all of this space is covered by a device. In
particular, flash sits at 0xfe000000-0xfe7fffff, and nothing is mapped
at the far end of the address space.
In zlib, there is a loop that references p[-1] if p is non-NULL. Under
some circumstances, this leads to the CPU speculatively loading from
0xfffffff8 if p is NULL. This leads to a machine check.
Signed-off-by: Scott Wood <scottwood@freescale.com>
continuation to the remaining mpc83xx boards that suffer from the same problem.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
commit 04e11cf3 "rtc: add support for 4543 RTC (manufactured by e.g.
EPSON)" introduces the following build error on boards configuring e.g,
the ds1374 rtc:
Configuring for MPC837XEMDS board...
ds1374.c:103: error: static declaration of 'rtc_read' follows non-static declaration
/home/r1aaha/git/u-boot/include/rtc.h:64: error: previous declaration of 'rtc_read' was here
ds1374.c:104: error: conflicting types for 'rtc_write'
/home/r1aaha/git/u-boot/include/rtc.h:65: error: previous declaration of 'rtc_write' was here
this reverts the erroneous chunk.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Acked-by: Detlev Zundel <dzu@denx.de>
CC: Detlev Zundel <dzu@denx.de>
CC: Andreas Pfefferle <ap@denx.de>
We had a bug on 86xx in which the boot page used to bring up secondary
cores was being overwritten and used for the malloc region in u-boot.
We need to reserve the region of memory that the boot page is going to
be put at so nothing uses it.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Becky Bruce <beckyb@kernel.crashing.org>
Match determine_mp_bootpg() that was added for 86xx. We need this to
address a bug introduced in v2009.03 with 86xx MP booting. We have to
make sure to reserve the region of memory used for the MP bootpg() so
other u-boot code doesn't use it.
Also added a comment about how cpu_reset() is dealing w/an errata on
early 85xx MP HW.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* Use CONFIG_MP instead of CONFIG_NUM_CPUS to match 85xx
* Introduce determine_mp_bootpg() helper. We'll need this to address a
bug introduced in v2009.03 with 86xx MP booting. We have to make sure
to reserve the region of memory used for the MP bootpg() so other
u-boot code doesn't use it.
* Added dummy versions of cpu_reset(), cpu_status() & cpu_release() to
allow cmd_mp.c to build and work. In the future we should look at
implementing all these functions. This could be common w/85xx if we
use spin tables on 86xx.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
We're missing the board_lmb_reserve definitions that allow
cpu_mp_lmb_reserve to be called; this means that Linux
is free to reallocate reserved pages. Linux currently boots
because we're getting lucky - the page we've reserved is
high enough in memory that it isn't allocated by Linux
while we still need it to be in existence.
Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Fix NAND support broken during new NAND code merge. Move those few lines of
code to board/netstar/netstar.c
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
This patch fix the compiler/linker errors
common/cmd_i2c.c:1252: undefined reference to `i2c_get_bus_speed'
common/cmd_i2c.c:1256: undefined reference to `i2c_set_bus_speed'
if board use CONFIG_I2C_CMD_TREE and CONFIG_I2C_MULTI_BUS is not
uesd/undef (wrong define order)
and
removes additional empty lines
Signed-off-by: Jens Scharsig <esw@bus-elektronik.de>
This patch adds MPC8569MDS board support. The UART, QE UEC1 and UEC2, BRD
EEPROM on I2C2 bus, PCI express and DDR3 SPD are supported in this patch.
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Hillel Avni <Hillel.Avni@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
There is a workaround for MPC8569 CPU Errata, which needs to set Bit 13 of
LBCR in 4K bootpage. We setup a temp TLB for eLBC controller in bootpage,
then invalidate it after LBCR bit 13 is set.
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
For the silicon which doesn't have ROM support in QE, it always needs to load
a pre-built ucode binary to IRAM so that QE can work.
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Hillel Avni <Hillel.Avni@freescale.com>
- support mirrored DIMMs, not support register DIMMs
- test passed on P2020DS board with MT9JSF12872AY-1G1D1
- test passed on MPC8569MDS board with MT8JSF12864HY-1G1D1
Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Travis Wheatley <travis.wheatley@freescale.com>
1. wr_lat
UM said the total write latency for DDR2 is equal to
WR_LAT + ADD_LAT, the write latency is CL + ADD_LAT - 1.
so, the WR_LAT = CL - 1;
2. rd_to_pre
we missed to add the ADD_LAT for DDR2 case.
Reported-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
Signed-off-by: Dave Liu <daveliu@freescale.com>
The masks for various bit defines of LSDMR are common and thus we can
define them in one place rather than replicating them in each config.h
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This patch adds the board specific communication routines needed by
the external 4543 RTC.
Signed-off-by: Detlev Zundel <dzu@denx.de>
Signed-off-by: Andreas Pfefferle <ap@denx.de>
This patch adds advanced diagnosis functions for the inka4x0 board.
Signed-off-by: Andreas Pfefferle <ap@denx.de>
Signed-off-by: Detlev Zundel <dzu@denx.de>
Fix these:
cmd_vcma9.c:82: warning: implicit declaration of function 'eth_getenv_enetaddr'
cmd_vcma9.c:89: error: 'enetaddr' undeclared (first use in this function)
Signed-off-by: Wolfgang Denk <wd@denx.de>
cs8900.c: In function 'eth_init':
cs8900.c:164: warning: passing argument 2 of 'eth_getenv_enetaddr' from incompatible pointer type
cs8900.c:165: error: invalid operands to binary <<
cs8900.c:166: error: invalid operands to binary <<
cs8900.c:167: error: invalid operands to binary <<
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Other commands implementing subcommands can reuse this code nicely.
Signed-off-by: Detlev Zundel <dzu@denx.de>
Signed-off-by: Andreas Pfefferle <ap@denx.de>
Current u-boot top of tree builds with warnings/errors for
the following boards:
ads5121 cpci5200 mecp5200 v38b IAD210 MBX MBX860T NX823
RPXClassic debris PN62
following patch solves this.
Signed-off-by: Heiko Schocher <hs@denx.de>
Acked-by: Mike Frysinger <vapier@gentoo.org>
This patch fixes a bug in the Sequoia TLB init code to reconfigure
the correct TLB (boot space) after running from RAM. This bug was
introduced with patch 4d332dbeb0
[ppc4xx: Make Sequoia boot vxWorks] which changed the order of the
TLB in the Sequoia init.S file.
Signed-off-by: Stefan Roese <sr@denx.de>
Enabling the instruction cache significantly accelerates U-Boot
operations like CRC checking, image uncompression, etc.
Kudos to Andrea Scian for pointing out.
Signed-off-by: Wolfgang Denk <wd@denx.de>
On boards which have the environment in eeprom, i2c_init() is called
before the console and RAM are initialized.
Suppress printfs until the console is initialized.
Signed-off-by: Jon Smirl <jonsmirl@gmail.com>
Acked-by: Heiko Schocher <hs@denx.de>
http://www.denx.de/wiki/DULG/UBootCmdGroupFlash#UBootCmdFlMtdparts
provides a flexible way to create and maintain u-boot mtd
partitions. This allows commands such as "nand erase fs"
to work and the user no longer needs to decode the absolute
nand offsets. This patch enables this function for beagleboard
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Since all of the bf537-stamp and bf537-ezkit boards out there can handle it,
increase the speed of SCLK to 125MHz rather than 100MHz.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Use the common net eth functions to setup the env/global data with the MAC
address, and properly handle the case where CONFIG_SYS_NO_FLASH is defined.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Since the hardware can handle it, bump the default clocks from 80mhz SCLK
and 398mhz CCLK to 100mhz SCLK and 498mhz CCLK.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Again, don't clobber pins that we aren't actually using, and use the common
LED framework rather than our own hob-job-but-not-really-working.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Rather than duplicate the same ADI settings in every ADI board, create a
common ADI config header and have all ADI boards start using that. This
will also make merging the ~10 boards I have to forward port a lot easier.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
OneNAND IPL has common codes for RAM init, load data, and jump to 2nd
bootloader, but it's common code used about 300~400 bytes. So board
specific codes, such as lowlevel_init, can't has enough code. It make
a difficult to implement OneNAND IPL.
his patch make this common code as small as possible. and give
lowlevel_init can have more codes.
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
This patches configures the NAND UPM-FSL driver with multi-chip
support for the Micron MT29F8G08FAB NAND flash memory on the
TQM8548 modules.
Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
The NAND flash on the TQM8548_BE modules requires a short delay after
running the UPM pattern like the MPC8360ERDK board does. The TQM8548_BE
requires a further short delay after writing out a buffer. Normally the
R/B pin should be checked, but it's not connected on the TQM8548_BE.
The corresponding Linux FSL UPM driver uses similar delay points at the
same locations. To manage these extra delays in a more general way, I
introduced the "wait_flags" field allowing the board-specific driver to
specify various types of extra delay.
Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
For the NAND chips on the TQM8548 modules, a special chip-select logic is
used. It uses dedicated address lines to be set via UPM machine address
register (mar). This patch adds such support to the FSL-UPM driver.
Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
This patch adds support for multi-chip NAND devices to the FSL-UPM
driver. The "dev_ready" callback of the "struct fsl_upm_nand" is now
called with the argument "chip_nr" to allow testing the proper chip
select line. The NAND support of the MPC8360ERDK is updated as well.
No other boards are currently using the FSL UPM driver.
Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
This patch adds support for NAND_MAX_CHIPS to the MTD NAND layer.
Multi-chips devices are displayed as shown:
Device 0: 2x NAND 512MiB 3,3V 8-bit, sector size 128 KiB
Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
When initializing the core clocks, stick external memory into self-refresh.
This gains us a few cool things:
- support suspend-to-RAM with Linux
- reprogram clocks automatically when doing "go" on u-boot.bin in RAM
- make sure settings are stable before flashing new version
- finally fully unify initialize startup code path between LDR/non-LDR
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Some newer Blackfins (like the BF51x) do not have an on-chip voltage
regulator, so do not attempt to program the memory as if it does.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
If the board config does not specify an explicit EBIU_SDBCTL value, set it
up with sane values based on other configuration options.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Workaround anomaly 432:
The bfrom_SysControl() firmware function does not clear the SIC_IWR1
register before executing the PLL programming sequence. Therefore, any
interrupt enabled in the SIC_IWR1 register prior to the call to
bfrom_SysControl() can prematurely terminate the idle sequence required
for the PLL to relock properly. SIC_IWR0 is properly handled.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The Boot ROM uses EVT1 as the entry point so set that rather than having
to use a tiny jump block in the default EVT1 location.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The SPORT_TX registers cannot be read (the hardware will trigger an error),
so drop the read helper macros.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
If there is some problem in the flash init/checking code, it's nicer to see
the message "Flash:" before crashing. This way the source of the problem
is a bit more straightforward.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Since the PORTJ on the BF537 is peripheral-only (no GPIO functionality),
then there is no PORTJ_FER register for us to worry about.
Signed-off-by: Sonic Zhang <Sonic.Zhang@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The jtag tstc operation was checking the hardware to see if data is
available from it (which is fine for the jtag getc operation), but the
higher layers need to know whether any data is available. Since we have
to read up to 4 bytes at a time from the hardware, the higher layers need
to know they can consume the cached bytes as well.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Unify all of the net-related init code in the common Blackfin board init
code to clean up the ifdef mess a bit.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
On the pcm030 the environment is located in the onboard EEPROM. But we want
to handle flash sector protection in a safe manner. So we must read the
unlock environment variable from EEPROM instead from flash.
This patch is required as long the evironment is saved into the EEPROM.
Stefan: Additional change as suggested by Wolfgang, use bigger char array
(instead of 4).
Signed-off-by: Eric Schumann <E.Schumann@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Wolfgang Denk <wd@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
On systems where U-Boot is linked to another address than it really lays
(e.g. backup image), calls via function pointers must be fixed with a
'+= gd->reloc_off'.
This was not done for none_compr in ubifs_compressors_init() what leads
to system crash on ubifsmount command.
Signed-off-by: Michael Lawnick <ml.lawnick@gmx.de>
Acked-by: Stefan Roese <sr@denx.de>
This patchset adds these UBIFS related commands:
- ubifsmount
Mount an UBIFS volume
- ubifsls
List a directory of the mounted UBIFS volume
- ubifsload
Load a file from the mounted UBIFS volume to memory
Signed-off-by: Stefan Roese <sr@denx.de>
The U-Boot UBIFS implementation is largely a direct copy from the current
Linux version (2.6.29-rc6). As already done in the UBI version we have an
"abstraction layer" to redefine or remove some OS calls (e.g. mutex_lock()
...). This makes it possible to use the original Linux code with very
little changes. And by this we can better update to later Linux versions.
I removed some of the Linux features that are not used in the U-Boot
version (e.g. garbage-collection, write support).
Signed-off-by: Stefan Roese <sr@denx.de>
CC: Artem Bityutskiy <dedekind@infradead.org>
CC: Adrian Hunter <ext-Adrian.Hunter@nokia.com>
This patch adds LZO decompression support to U-Boot. It is needed for
the upcoming UBIFS support, since UBIFS uses LZO as default compressor/
decompressor. Since we only support read-only in UBIFS, only the
decompressor is needed.
All this is copied with minor changes from the current Linux kernel
version (2.6.28-rc8).
This patch only implements this LZO decompressor support for PPC.
Other platforms using UBIFS will have to add the required
"include/asm/unaligned.h" as well. It should be fairly easy to copy this
from the Linux source tree as I have done it for PPC in this patch.
Signed-off-by: Stefan Roese <sr@denx.de>
Currently the mtdparts commands are included in the jffs2 command support.
This doesn't make sense anymore since other commands (e.g. UBI) use this
infrastructure as well now. This patch separates the mtdparts commands from
the jffs2 commands making it possible to only select mtdparts when no JFFS2
support is needed.
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Remove this code. It's not needed. The 4xx EMAC driver stores the MAC
addresses into the SoC registers instead.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch replaces in/out8/16/32 macros by in/out_8/_be16/_be32
macros. Also volatile pointer references are replaced by the
new accessors.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch replaces in/out8/16/32 macros by in/out_8/_be16/_be32
macros. Also volatile pointer references are replaced by the
new accessors.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
Signed-off-by: Stefan Roese <sr@denx.de>
Fix building DASA_SIM boards by increasing U-Boot's size in flash.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
Signed-off-by: Stefan Roese <sr@denx.de>
Moved sub-features of the SC520 code which is currently selectively compiled
using #ifdef out of sc520.c into individual files selectively compiled via
the makefile
Signed-off-by: Graeme Russ <graeme.russ at gmail.com>
Rewrite interrupt handling functionality for the i386 port. Separated
functionality into separate CPU and Architecture components.
It appears as if the i386 interrupt handler functionality was intended
to allow multiple handlers to be installed for a given interrupt.
Unfortunately, this functionality was not fully implemented and also
had the problem that irq_free_handler() does not allow the passing
of the handler function pointer and therefore could never be used to
free specific handlers that had been installed for a given IRQ.
There were also various issues with array bounds not being fully
tested.
I had two objectives in mind for the new implementation:
1) Keep the implementation as similar as possible to existing
implementations. To that end, I have used the leon2/3
implementations as the reference
2) Seperate CPU and Architecture specific elements. All specific i386
interrupt functionality is now in cpu/i386/ with the high level
API and architecture specific code in lib_i386. Functionality
specific to the PC/AT architecture (i.e. cascaded i8259 PICs) has
been further split out into an individual file to allow for the
implementation of the PIC architecture of the SC520 CPU (supports
more IRQs)
Signed-off-by: Graeme Russ <graeme.russ at gmail.com>
A recent gcc added a new unaligned rodata section called '.rodata.str1.1',
which needs to be added the the linker script. Instead of just adding this
one section, we use a wildcard ".rodata*" to get all rodata linker section
gcc has now and might add in the future.
However, '*(.rodata*)' by itself will result in sub-optimal section
ordering. The sections will be sorted by object file, which causes extra
padding between the unaligned rodata.str.1.1 of one object file and the
aligned rodata of the next object file. This is easy to fix by using the
SORT_BY_ALIGNMENT command.
This patch has not be tested one most of the boards modified. Some boards
have a linker script that looks something like this:
*(.text)
. = ALIGN(16);
*(.rodata)
*(.rodata.str1.4)
*(.eh_frame)
I change this to:
*(.text)
. = ALIGN(16);
*(.eh_frame)
*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
This means the start of rodata will no longer be 16 bytes aligned.
However, the boundary between text and rodata/eh_frame is still aligned to
16 bytes, which is what I think the real purpose of the ALIGN call is.
Signed-off-by: Trent Piepho <xyzzy@speakeasy.org>
The environment is the canonical storage location of the mac address, so
we're killing off the global data location and moving everything to
querying the env directly.
In the ppc case, these things are part of the legacy ABI, so keep them
around but mark them as legacy so no new code will touch them.
Also stop calling load_sernum_ethaddr() since all boards now implement
this as a stub.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
CC: Ben Warren <biggerbadderben@gmail.com>
The environment is the canonical storage location of the mac address, so
we're killing off the global data location and moving everything to
querying the env directly.
Rather than have common ppc code call a board-specific function like
load_sernum_ethaddr(), have each board call it in its own board-specific
misc_init_r() function.
The boards that get converted here are:
- kup4k/kup4x
- pcs440ep
- tqm8xx
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
CC: Ben Warren <biggerbadderben@gmail.com>
CC: Stefan Roese <sr@denx.de>
The environment is the canonical storage location of the mac address, so
we're killing off the global data location and moving everything to
querying the env directly.
Also rename load_sernum_ethaddr() to misc_init_r() so we don't need to
handle this board specially in common ARM code.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
CC: Ben Warren <biggerbadderben@gmail.com>
The environment is the canonical storage location of the mac address, so
we're killing off the global data location and moving everything to
querying the env directly.
Rather than have the common ppc code have board-specific hooks, move the
board_get_enetaddr() function into the board-specific init functions.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
CC: Ben Warren <biggerbadderben@gmail.com>
The environment is the canonical storage location of the mac address, so
we're killing off the global data location and moving everything to
querying the env directly.
Some warts are remaining and should be killed off (by moving the func to
the appropriate board init code):
- davinci_eth_set_mac_addr
- cs8900_get_enetaddr
- smc_set_mac_addr
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
CC: Ben Warren <biggerbadderben@gmail.com>
The environment is the canonical storage location of the mac address, so
we're killing off the global data location and moving everything to
querying the env directly.
For the nx823, the serial number is moved out of load_sernum_ethaddr() and
into misc_init_r() as is the env setup. This lets us kill off the former
function in the process.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
CC: Ben Warren <biggerbadderben@gmail.com>
The environment is the canonical storage location of the mac address, so
we're killing off the global data location and moving everything to
querying the env directly.
The resulting code can also be simplified even further.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
CC: Stefan Roese <sr@denx.de>
CC: Ben Warren <biggerbadderben@gmail.com>
The environment is the canonical storage location of the mac address, so
we're killing off the global data location and moving everything to
querying the env directly.
The cpus that get converted here:
at91rm9200
mpc512x
mpc5xxx
mpc8260
mpc8xx
ppc4xx
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
CC: Ben Warren <biggerbadderben@gmail.com>
CC: John Rigby <jrigby@freescale.com>
CC: Stefan Roese <sr@denx.de>
The environment is the canonical storage location of the mac address, so
we're killing off the global data location and moving everything to
querying the env directly.
Also, do not bother checking the EEPROM if the env is setup. This
simplifies the code greatly.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Wolfgang Dnek <wd@denx.de>
CC: Ben Warren <biggerbadderben@gmail.com>
CC: Rolf Offermanns <rof@sysgo.de>
CC: Erik Stahlman <erik@vt.edu>
CC: Daris A Nevil <dnevil@snmc.com>
CC: Sascha Hauer <s.hauer@pengutronix.de>
The environment is the canonical storage location of the mac address, so
we're killing off the global data location and moving everything to
querying the env directly.
The sh_eth driver can also be simplified a bit by using enetaddr member of
the eth_device structure.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
CC: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
CC: Carlos Munoz <carlos@kenati.com>
CC: Ben Warren <biggerbadderben@gmail.com>
The environment is the canonical storage location of the mac address, so
we're killing off the global data location and moving everything to
querying the env directly.
The cs8900 driver also changes slightly in that the hardware is not
consulted if the mac address in the env is sane.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
CC: Marius Groeger <mgroeger@sysgo.de>
CC: Ben Warren <biggerbadderben@gmail.com>
The environment is the canonical storage location of the mac address, so
we're killing off the global data location and moving everything to
querying the env directly.
Since the address is in the PLM_DEVICE_BLOCK structure already, there is
no need to pass the NodeAddress as a second parameter. So drop the second
argument to the LM_SetMacAddress() function (and update the tigon3 driver
accordingly).
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
CC: Ben Warren <biggerbadderben@gmail.com>
Always use the MAC address that is stored in the environment first before
falling back to the ROM. This also cuts out any comparison steps: if the
mac in the env is sane, the ROM is never consulted.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
CC: Thomas Frieden <ThomasF@hyperion-entertainment.com>
CC: Ben Warren <biggerbadderben@gmail.com>
Since the ethernet layer handles updating of device addresses itself from
the environment, there is no point in calling eth_set_enetaddr().
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
CC: Ben Warren <biggerbadderben@gmail.com>
Since the on-chip MAC does not have an eeprom or similar interface, force
all Blackfin boards that use this driver to setup the board data with a
proper MAC.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
CC: Ben Warren <biggerbadderben@gmail.com>
Declare new utility functions for converting between the environment
variables (eth*addr) and the binary MAC address representation. This way
we can unify all the random places that already do this kind of thing.
The functions in question:
eth_parse_enetaddr - "..." -> {...}
eth_getenv_enetaddr - env -> {...}
eth_setenv_enetaddr - {...} -> env
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
CC: Ben Warren <biggerbadderben@gmail.com>
Now that our printf functions support the %pI4 modifier like the kernel,
let's drop the inflexible print_IPaddr() function and covert over to the
%pI4 modifier.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
CC: Ben Warren <biggerbadderben@gmail.com>
This brings in support for the %p modifier which allows us to easily print
out things like ip addresses, mac addresses, and pointers.
It also converts the rarely used 'q' length modifier to the common 'L'
modifier when dealing with quad types.
While this new code is a bit larger (~1k .text), most of it should be made
up by converting the existing ip/mac address code to use format modifiers.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
sh_eth_reset is function to reset Ether IP.
The MAC address is stored in IP, but it is initialized by this function.
OS (e.g. Linux Kernel) can not use this device when initialized.
This revises this problem.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
PCI outbound address map configuration doesn't match the
PCI memory address range covered by appropriate TLB entry
configuration for canyonlands causing machine check
exceptions while accessing PCI memory regions. This patch
provides a fix for this issue.
Kazuaki Ichinohe observed and reported this issue while
testing display output with PCI ATI video card on canyonlands.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
Follow up to the flash_fixup_stm to fix geometry reversal
on STMicro M29W320ET flash chip. The M29W320DT has 4 erase region.
Signed-off-by: Richard Retanubun <RichardRetanubun@RuggedCom.com>
Signed-off-by: Stefan Roese <sr@denx.de>
The smc911x driver changed the naming convention for its register funcs,
so update the eeprom code accordingly.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
CC: Ben Warren <biggerbadderben@gmail.com>
Total5200 and digsy MTC use I2C port 2 pins as a ATA chip select.
To avoid adding board-specific ifdefs to cpu/mpc5xxx/ide.c new
define CONFIG_SYS_ATA_CS_ON_I2C2 was introduced. It is used by
Total5200 and will be used by digsy MTC and other boards with
ATA CS on I2C pins.
Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
This patch adds support for the kmsupx4 board from Keymile,
based on a Freescale MPC852T CPU
- serial console on SMC1
- 32 MB SDRAM
- 32 MB NOR Flash
- Ethernet over SCC3
- I2C Bitbang
Signed-off-by: Heiko Schocher <hs@denx.de>
renaming the "mgsuvd" board port into "km8xx", because
there come more similar boards from keymile.
Compiling the mgsuvd board with "make mgsuvd_config"
remains.
Signed-off-by: Heiko Schocher <hs@denx.de>
- added to keymile-common.h:
- bootcount support
- COMMAND HISTORY
- CONFIG_AUTO_COMPLETE
- CONFIG_SYS_FLASH_PROTECTION
- JFFS2 support
- CONFIG_VERSION_VARIABLE
- extracted common I2C settings for all boards
- common default environment settings summarized
Signed-off-by: Heiko Schocher <hs@denx.de>
The Nand flash was unable to read and write properly
due to Nand Chip Select (nCE) setup was in reverse
order. Also, increase the Nand time out value to 60.
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
The serial boot dram extended/standard mode register was not
setup and was using default DRAM setup causing the U-boot was
unstable to boot up in serial mode.
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
According to coldfire manual data timeout > address time out
also use correct macro to program XARB_CFG
Signed-off-by: Arun C <arunedarath@mistralsolutions.com>
nboot command currently does not skip bad blocks and gives read error when
loading image stored over bad block. With patch applied, nboot works as
expected:
Device 0 bad blocks:
00780000
014a0000
02000000
02cc0000
04aa0000
Loading from NAND 128MiB 3,3V 8-bit, offset 0x2c00000
Image Name: Linux-2.6.22-omap1
Created: 2008-11-20 23:44:32 UTC
Image Type: ARM Linux Kernel Image (uncompressed)
Data Size: 1052520 Bytes = 1 MB
Load Address: 10008000
Entry Point: 10008000
Skipping bad block 0x02cc0000
Automatic boot of image at addr 0x10400000 ...
...
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Signed-off-by: Scott Wood <scottwood@freescale.com>
This patch fixes a problem spotted by Mikhail Zolotaryov on Sequoia with
the DDR2 configuration to only use one CS (rank). As this code is most
likely copied from the original Sequoia version, this error was copied
as well.
This patch also removes some dead code.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch fixes a problem spotted by Mikhail Zolotaryov on Sequoia with
the DDR2 configuration to only use one CS (rank). As this code is most
likely copied from the original Sequoia version, this error was copied
as well.
Signed-off-by: Stefan Roese <sr@denx.de>
Sequoia board schematics (DES0211_11_SCH_11.pdf, page 5, unit U1D)
specifies that BankSel#1 is not connected, while bootloader memory
configuration is (board/amcc/sequoia/sdram.c):
mtsdram(DDR0_10, 0x00000300);
i.e. both Chip Selects used - not correct.
If we change to correct value here:
mtsdram(DDR0_10, 0x00000100);
memory is accessible OK also.
Signed-off-by: Mikhail Zolotaryov <lebon@lebon.org.ua>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch makes sure the correct mask is applied when setting
the encryption and I2C bus 0 clock in SCCR.
Failing to do so may lead to ENCCM being 0 in which case I2C bus 0
won't function.
Signed-off-by: Norbert van Bolhuis <nvbolhuis@aimvalley.nl>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
The rtl8139 driver use pci_mem_to_phys. So it need PCI system memory
registration.
Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
We can built 'make sh7785lcr_32bit_config'. And add new command "pmb"
for this mode. This command changes PMB for using 512MB system memory.
Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Some register value was hardcoded for System memory size 128MB and
memory offset 0x08000000. This patch fixed the problem.
Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Commit af1c2b84 added a generic phy support, with an ID of zero
and a 32 bit mask; meaning that it will match on any PHY ID.
The problem is that there is a test that checked if a matching
PHY was found, and if not, it printed the non-matching ID.
But since there will always be a match (on the generic PHY,
worst case), this test will never trip.
In the case of a misconfigured PHY address, or of a PHY that
isn't explicitly supported outside of the generic support,
you will never see the ID of 0xffffffff, or the ID of the
real (but unsupported) chip. It will silently fall through
onto the generic support.
This change makes that test useful again, and ensures that
the selection of generic PHY support doesn't happen without
some sort of notice. It also makes it explicitly clear that
the generic PHY must be last in the PHY table.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Acked-by: Andy Fleming <afleming@freescale.com>
Fix typo in makefile which broke out of tree builds.
Also use expolicit "rm" instead of "ln -sf" which is known to be
unreliable.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
These were left in accidentally, and are not really useful unless the
code is as broken as it was when it was being developed.
Signed-off-by: Andy Fleming <afleming@freescale.com>
Commit e1be0d25, "32bit BUg fix for DDR2 on 8572" prevented other
sdram_cfg bits (such as ecc and self_refresh_in_sleep) from being set.
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Fix typo in makefile which broke out of tree builds.
Also use expolicit "rm" instead of "ln -sf" which is known to be
unreliable.
Signed-off-by: Wolfgang Denk <wd@denx.de>
add CONFIG_BOOTCOUNT_LIMIT feature for 8360 CPU.
The bootcounter uses 8 bytes from the muram,
because no other memory was found on this
CPU for the bootcount feature. So we must
correct the muram size in DTS before booting
Linux.
This feature is actual only implemented for
MPC8360, because not all 83xx CPU have qe,
and therefore no muram, which this feature
uses.
Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
old code implemented the QE_ENET10 errata only for Silicon
Revision 2.0. New code reads now the Silicon Revision
register and sets dependend on the Silicon Revision the
values as advised in the QE_ENET10 errata.
Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
it is possible that some board variants have different DDR II
RAM sizes. So we autodetect the size of the assembled RAM.
Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
This patch adds I2C mux support for the fsl_i2c driver. This
allows you to add "new" i2c busses, which are reached over
i2c muxes. For more infos, please look in the README and
search for CONFIG_I2C_MUX.
Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
This patch adds I2C support for the Keymile kmeter1 board.
It uses the First I2C Controller from the CPU, for
accessing 4 temperature sensors, an eeprom with IVM data
and the booteeprom over a pca9547 mux.
Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
In case where a board not uses CONFIG_POST, it is not
necessary to init the DTTs when running from flash.
Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
1. RD_TO_PRE missed to add the AL, and need min 2 clocks for
tRTP according to DDR2 JEDEC spec.
2. WRTORD - tWTR need min 2 clocks according to DDR2 JEDEC spec.
3. add the support of DDR2-533,667,800 DIMMs
4. cpo
5. make the AL to min to gain better performance.
The Micron MT9HTF6472CHY-667D1 DIMMs test passed on
MPC837xEMDS platform at 266MHz/333MHz/400MHz data rate.
items 1, 2 and 5:
Acked-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
Reported-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
The previous version rebooted forever with DDR bigger than 256MB.
Access the DS1339 RTC chip is on I2C1 bus.
Allow DHCP.
Signed-off-by: Valeriy Glushkov <gvv@lstec.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
The SerDes initialization should be finished before negating the reset
signal according to the reference manual. This isn't an issue on real
hardware, but we'd better stick to the specifications anyway.
Suggested-by: Liu Dave <DaveLiu@freescale.com>
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Fix following warning while compilation for mcc200 board:
lcd.c: In function 'lcd_display_bitmap':
lcd.c:625: warning: unused variable 'cmap'
Signed-off-by: Anatolij Gustschin <agust@denx.de>
The smc911x driver has a lot of useful defines/functions which can be used
by pieces of code (such as example eeprom programmers). Rather than
forcing each place to duplicate these defines/functions, split them out
of the smdc911x driver into a local header.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Acked-by: Ben Warren <biggerbadderben@gmail.com>
CC: Sascha Hauer <s.hauer@pengutronix.de>
CC: Guennadi Liakhovetski <lg@denx.de>
CC: Magnus Lilja <lilja.magnus@gmail.com>
CC: Ben Warren <biggerbadderben@gmail.com>
The "eet" variant of the imx31_phycore board has an OLED display, using a
s6e63d6 display controller on the first SPI interface, using GPIO57 as a
chip-select for it. With this configuration you can display 256 colour BMP
images in 16-bit RGB (RGB565) LCD mode.
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Add a driver for the Synchronous Display Controller and the Display
Interface on i.MX31, using IPU for DMA channel setup. So far only
displaying of bitmaps is supported, no text output.
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
Acked-by: Anatolij Gustschin <agust@denx.de>
This patch also simplifies some ifdefs in lcd.c, introduces a generic
vidinfo_t, which new drivers are encouraged to use and old drivers to switch
over to.
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
Acked-by: Anatolij Gustschin <agust@denx.de>
This patch adds 16bpp BMP support to the common lcd code.
Use CONFIG_BMP_16BPP and set LCD_BPP to LCD_COLOR16 to enable the code.
At the moment it's only been tested on the MIMC200 AVR32 board, but extending
this to other platforms should be a simple task !!
Signed-off-by: Mark Jackson <mpfj@mimc.co.uk>
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
Acked-by: Anatolij Gustschin <agust@denx.de>
This is a driver for the S6E63D6 SPI OLED display controller from Samsung.
It only provides access to controller's registers so the client can freely
configure it.
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
Acked-by: Anatolij Gustschin <agust@denx.de>
Some SPI devices have special requirements on chip-select handling.
With this patch we can use a GPIO as a chip-select and strictly follow
the SPI_XFER_BEGIN and SPI_XFER_END flags.
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
This is a minimal driver, so far only managing output. It will
be used by the mxc_spi.c driver.
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Fix setting the SPI Control register, 8 and 16-bit transfers
and a wrong pointer in the free routine in the mxc_spi driver.
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
On MPC8377E-RDB and MPC8378E-RDB boards we have PCIe and mini-PCIe
slots. Let's support them.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
We should use pci_last_busno() in pci_init_bus(), otherwise we'll
erroneously re-use PCI0's first_busno for PCI1 hoses.
NOTE: The patch is untested. All MPC83xx FSL boards I have have
PCI1 in miniPCI form, for which I don't have any cards handy.
But looking in cpu/mpc85xx/pci.c:
...
#ifdef CONFIG_MPC85XX_PCI2
hose = &pci_hose[1];
hose->first_busno = pci_hose[0].last_busno + 1;
And considering that we do the same for MPC83xx PCI-E support,
I think this patch is correct.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
This patch fixes copy-paste issue: pci_hose[0]'s first and last
busnos were used to fixup pci1's nodes.
We don't see this bug triggering only because Linux reenumerate
buses anyway.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
This patch fixes an issue in config space read accessors: we should
fill-in the value even if we fail (e.g. skipping devices), otherwise
CONFIG_PCI_SCAN_SHOW reports bogus values during boot up.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Currently we assign first_busno = 0 for the first PCIe hose, but this
scheme won't work if we have ordinary PCI hose already registered (its
first_busno value is 0 too).
The old code worked fine only because we have PCI disabled on
MPC837XEMDS boards in stand-alone mode (see commit 00f7bbae92
"mpc83xx: fix PCI scan hang on the standalone MPC837xE-MDS boards").
But on MPC837XERDB boards we have PCI and PCIe, so the bug actually
triggers.
So, to fix the issue, we should use pci_last_busno() + 1 for the
first_busno (i.e. last available busno).
Reported-by: Huang Changming <Chang-Ming.Huang@freescale.com>
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
This is just a handy routine that reports last PCI busno: we walk
down all the hoses and return last hose's last_busno.
Will be used by PCI/PCIe initialization code.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Currently, we get 256MB as the default, but since all the 86xx
board configs define a 2G BAT mapping for RAM, raise default
to 2G.
Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Acked-by: Jon Loeliger <jdl@freescale.com>
Added code to setup the extra Flash and FRAM chip selects as used on the
MIMC200 board.
V2 moves the init code from the common "cpu.c" file into the board specific
setup file.
Signed-off-by: Mark Jackson <mpfj@mimc.co.uk>
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Change the MIMC200 startup code to use the built-in (rather than
hard-coded) funtions for setting up gclk outputs.
We'll also move the code to the new, more-appropriate
board_postclk_init() routine.
Signed-off-by: Mark Jackson <mpfj@mimc.co.uk>
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
The AVR32A architecture (which AT32UC3A-series is based on) has a
different memory layout than the AVR32B-architecture. This patch moves
addrspace.h to an arch-dependent directory in preparation for
AT32UC3A-support. It also moves some address-space manipulation
functions from io.h to addrspace.h.
Signed-off-by: Gunnar Rangoy <gunnar@rangoy.com>
Signed-off-by: Paul Driveklepp <pauldriveklepp@gmail.com>
Signed-off-by: Olav Morken <olavmrk@gmail.com>
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
The AT32UC3A series of processors doesn't contain any cache, and issuing
cache control instructions on those will cause an exception. This commit
makes cacheflush.h arch-dependent in preparation for the AT32UC3A-support.
Signed-off-by: Gunnar Rangoy <gunnar@rangoy.com>
Signed-off-by: Paul Driveklepp <pauldriveklepp@gmail.com>
Signed-off-by: Olav Morken <olavmrk@gmail.com>
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
NetLoop polls every cycle with getenv some environment variables.
This is horribly slow, especially when the environment is big.
This patch reads only the environment variables in NetLoop,
when they were changed.
Also moved the init part of the NetLoop function in a seperate
function.
Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
A forward port of the last version to work with the newer smc911x driver.
I only have a board with a LAN9218 part on it, so that is the only one
I've tested. But there isn't anything in this that would make it terribly
chip specific afaik.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
CC: Sascha Hauer <s.hauer@pengutronix.de>
CC: Guennadi Liakhovetski <lg@denx.de>
CC: Magnus Lilja <lilja.magnus@gmail.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Added the struct containing PHY settings for the Vitesse VSC8211 phy to
the phy_info list in tsec.c
Signed-off-by: Pieter Henning <phenning@vastech.co.za>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Compiling dbau1x00 and gth2 boards with GCC-4.2, you would see new warnings
like this:
skuribay@ubuntu:u-boot.git$ ./MAKEALL dbau1000
Configuring for dbau1x00 board...
au1x00_eth.c: In function 'au1x00_send':
au1x00_eth.c:158: warning: passing argument 1 of 'virt_to_phys' discards qualifiers from pointer target type
au1x00_eth.c: In function 'au1x00_recv':
au1x00_eth.c:211: warning: passing argument 1 of 'virt_to_phys' discards qualifiers from pointer target type
au1x00_eth.c: In function 'au1x00_init':
au1x00_eth.c:252: warning: passing argument 1 of 'virt_to_phys' discards qualifiers from pointer target type
au1x00_eth.c: In function 'au1x00_recv':
au1x00_eth.c:211: warning: passing argument 1 of 'virt_to_phys' discards qualifiers from pointer target type
au1x00_eth.c: In function 'au1x00_init':
au1x00_eth.c:252: warning: passing argument 1 of 'virt_to_phys' discards qualifiers from pointer target type
au1x00_eth.c: In function 'au1x00_send':
au1x00_eth.c:158: warning: passing argument 1 of 'virt_to_phys' discards qualifiers from pointer target type
We're passing a volatile pointer to a function which is expecting a non-
volatile pointer. That's potentially dangerous, so gcc warns about it.
Confirmed with ELDK 4.2 (GCC 4.2.2) and Sourcey G++ 4.2 (GCC 4.2.3).
To fix this, we add a volatile attribute to the argument in question.
The virt_to_phys function in Linux kernel also does the same thing.
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
Clock pin must have input enabled for MMC3 to work.
Also enable pull-ups for cmd/data lines to be consistent
with remaining MMC host pin setup.
Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
This patch adds OMAP3 cpu type auto detection based on OMAP3 register
and removes hardcoded values.
Signed-off-by: Steve Sakoman <sakoman@gmail.com>
Signed-off-by: Dirk Behme <dirk.behme@googlemail.com>
With BeagleBoard revision C some HW changes are introduced (e.g. PinMUX)
which might need different software handling. For this, GPIO pin 171 (GPIO
module 6, offset 11) can be used to check for board revision. If this pin
is low, we have a rev C board. Else it must be a revision Ax or Bx board.
To handle board differences you can call function beagle_get_revision().
E.g.:
if (beagle_get_revision()) {
/* do special revision C stuff here */
}
Signed-off-by: Dirk Behme <dirk.behme@googlemail.com>
* Make Overo GPIO114 an input for touchscreen PENDOWN
* Make Overo GPIO144-147 readable
* Make Overo EHCI pinmux match beagle rev c setup
* Adjust pinmux for SMSC911X network chip support
* Remove unnecessary GPIO setup
* Fix merge error in Makefile
Signed-off-by: Steve Sakoman <sakoman@gmail.com>
Signed-off-by: Dirk Behme <dirk.behme@googlemail.com>
Serial driver via the EmbeddedICE macrocell's DCC channel using
co-processor 14.
It does include a timeout to ensure that the system does not
totally freeze when there is nothing connected to read.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Taken all the duplicated code for enabling common modules and apply
software workarounds from the board specific code into common
functions. Also added comments explaining the workarounds
(from TI errata documents) and replaced some numerical bit numbers
with more meaningful defines.
Signed-off-by: Hugo Villeneuve <hugo.villeneuve@lyrtech.com>
This trivially enables Ethernet support in the debug board
by setting up the proper chip select.
Signed-off-by: Alessandro Rubini <rubini@unipv.it>
Acked-by: Andrea Gallo <andrea.gallo@stnwireless.com>
This driver implements the ECC algorithm described in
the CPU data sheet and uses the OOB layout chosen in
already-released development systems (shipped with a custom-made
u-boot 1.3.1).
Signed-off-by: Alessandro Rubini <rubini@unipv.it>
Acked-by: Andrea Gallo <andrea.gallo@stnwireless.com>
Fix the problem that cannot use external hub, because this driver
did not control correctly a DEVADDx register.
Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
Signed-off-by: Remy Bohmer <linux@bohmer.net>
Looks like the initcode updates fell out of order during my merges. The
patch that really fixes up this code is part of power-on overhaul and so
is too large for merging at this point. Instead, we can disable the code
as no currently in-tree board depends on it. The next merge window will
fix things up properly.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The previous merge for cleaning up the I2C driver incorrectly reverted the
CFG_xxx rename for some of the I2C defines.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Heiko Schocher <hs@denx.de>
Commit e4943ec5 moved the ARM boards to a vendor directory but forgot
to adapt the cleanup rules in the Makefile
Signed-off-by: Wolfgang Denk <wd@denx.de>
This patch clarifies the way m68k passes linux boot argument.
The one gotcha here is that the assembly instruction that
the compiler uses to jump to the kernel is 'jsr' which pushes the
program counter for the instruction after the jsr into the stack pointer.
Signed-off-by: Richard Retanubun <RichardRetanubun@RuggedCom.com>
Signed-off-by: Wolfgang Denk <wd@denx.de>
Although load address and image start address are same address,
bootm command always does memmove.
That is unnecessary memmove and can be taken few milliseconds
(about 500 msec to 1000 msec).
If skip this memmove, we can reduce the boot time.
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
This patch does some minor fixing of the Xilinx Spartan III
FPGA boot code:
- Fixed call order of post configuration callback and
success message printing (result of copy-paste?)
- remove obsolete comment
- minor coding style cleanup
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
This patch does some minor fixing of the Xilinx Spartan II
FPGA boot code:
- Fixed call order of post configuration callback and
success message printing (result of copy-paste?)
- relocate post configuration callback only when it
is implemented
- remove obsolete comment
- minor coding style cleanup
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
In the commit 79b51ff820 ([MIPS] cpu/mips/
Makefile: Split [CS]OBJS onto separate lines), I wrongly deleted a START
line. This patch puts it back.
Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi@necel.com>
These names are being taken over by the new MMC framework. Hopefuly
the PXA can be easily ported, and these functions will go away entirely.
Signed-off-by: Andy Fleming <afleming@freescale.com>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Fixing the get_timer function to return time in miliseconds instead of
ticks. Also fixed PXA boards to use the conventional value of 1000 for
CONFIG_SYS_HZ.
Signed-off-by: Micha Kalfon <smichak.uv@gmail.com>
omap3_mmc.c was changed to define mmc_legacy_init.
Remove unused functions.
Compile tested on all arm
Runtime tested on Zoom1.
Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
- activate CS4 for accessing the FPGA
- activate Rx buf len > 1 on SMC
- pram activated
- MTDPARTS_DEFAULT defined
- update the size of the flashes in the DTS
before booting Linux
- MONITOR_LEN updated to 384k
- added CONFIG_HOSTNAME
- added CONFIG_ENV_BUFFER_PRINT
- Environment size reduced to 16k
Signed-off-by: Heiko Schocher <hs@denx.de>
- activate Rx buf len > 1 on SMC
- pram activated
- MTDPARTS_DEFAULT defined
- update the size of the flash in the DTS
before booting Linux
- MONITOR_LEN updated to 384k
- added CONFIG_HOSTNAME
- added CONFIG_ENV_BUFFER_PRINT
- Environment size reduced to 16k
Signed-off-by: Heiko Schocher <hs@denx.de>
THe TQM8xxL use a ahnd-optimized linker script to efficiently use the
small boot sectors in the flash. This patch makes some room in the
first sector to prepare for a size increase of lib_generic/vsprintf.o
by a future patch.
Signed-off-by: Wolfgang Denk <wd@denx.de>
judging from other printfs in the same file, it seems ata should be
postpended with the interface number, not the address of the global
port variable. Fixes this for current u-boot-mpc83xx tree:
Configuring for MPC8349ITX board...
sata_sil3114.c: In function 'sata_bus_softreset':
sata_sil3114.c:99: warning: format '%u' expects type 'unsigned int', but argument 2 has type 'struct sata_port *'
sata_sil3114.c:108: warning: format '%u' expects type 'unsigned int', but argument 2 has type 'struct sata_port *'
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
This patch will create a configuration option for a minimum configuration for
the ns16550 serial driver at drivers/serial/ns16550.c and will apply this new
configuration option to the SIMPC8313.h config file in order to fix the NAND
bootstrap build error. This option will exclude all functions with exception of
NS16550_putc and NS16550_init. This will be used primarily to save space and
remove unused code from builds in which space is limited.
Signed-off-by: Ron Madrid <ron_madrid@sbcglobal.net>
swapping the include order suppresses warnings for board configs
that define their own CONFIG_MAX_MEM_MAPPED:
In file included from /home/r1aaha/git/u-boot/include/config.h:5,
from /home/r1aaha/git/u-boot/include/common.h:35,
from simpc8313.c:26:
/home/r1aaha/git/u-boot/include/configs/SIMPC8313.h:81:1: warning:
"CONFIG_MAX_MEM_MAPPED" redefined
In file included from /home/r1aaha/git/u-boot/include/config.h:4,
from /home/r1aaha/git/u-boot/include/common.h:35,
from simpc8313.c:26:
/home/r1aaha/git/u-boot/include/asm/config.h:28:1: warning: this is
the location of the previous definition
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
This patch prepares the good old PMC405 board support for
upcoming PMC405V2 patches.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch fixes coding style for PMC405 board support.
Also some unneeded features/code is removed.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
Signed-off-by: Stefan Roese <sr@denx.de>
1. Changes to the default environment:
- "bootcmd" defined as "run flash_self"
- "saveenv" command removed from "update"
- "uboot" changed to "u-boot" (also in "load")
- "addmtd" variable defined (and added to all boot commands)
2. CONFIG_CMD_JFFS2 defined to enable "mtdparts" command
3. MTDIDS_DEFAULT and MTDPARTS_DEFAULT defined
4. CONFIG_SYS_CBSIZE changed from 256 to 512. That solves the problem
with truncated "bootargs" environment variable.
Signed-off-by: Ilya Yanok <yanok@emcraft.com>
Move the CONFIG_8xx mpc8xx_pcmcia.c protection out of the C file and
into the Makefile so we avoid pointless compiling of the file.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Because the functions have been defined using macros, grepping for
their definitions is not possible. This patch adds the real function
names in comments.
Signed-off-by: Petri Lehtinen <petri.lehtinen@inoi.fi>
Acked-by: Mike Frysinger <vapier@gentoo.org>
The CONFIG_CMD_ENV option controls enablement of the `saveenv` command
rather than a generic "env" command, or anything else related to the
environment. So, let's make sure the define is named accordingly.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
- Extend ub_dev_read() and ub_dev_recv() so they return the length actually
read, which allows for better control and error handling (this introduces
additional error code API_ESYSC returned by the glue mid-layer).
- Clean up definitions naming and usage.
- Other minor cosmetics.
Note these changes do not touch the API proper, so the interface between
U-Boot and standalone applications remains unchanged.
Signed-off-by: Rafal Jaworowski <raj@semihalf.com>
De-hardcode range in RAM we search for the API signature. Instead use the stack
pointer as a hint to narrow down the range in which the signature could reside
(it is malloc'ed on the U-Boot heap, and is hoped to remain in some proximity
from stack area). Adjust PowerPC code in API demo to the new scheme.
Signed-off-by: Rafal Czubak <rcz@semihalf.com>
Signed-off-by: Rafal Jaworowski <raj@semihalf.com>
This patch allows using of SATA devices connected
to the onboard PCI SIL1334 SATA controller.
Signed-off-by: Valeriy Glushkov <gvv@lstec.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Here's a new framework (based roughly off the linux one) for managing
MMC controllers. It handles all of the standard SD/MMC transactions,
leaving the host drivers to implement only what is necessary to
deal with their specific hardware.
This also hooks the infrastructure into the PowerPC board code
(similar to how the ethernet infrastructure now hooks in)
Some of this code was contributed by Dave Liu <daveliu@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
The current MMC infrastructure relies on the existence of an
arch-specific header file. This isn't necessary, and a couple
drivers were forced to implement dummy files to meet this requirement.
Instead, we move the stuff in those header files into a more appropriate
place, and eliminate the stubs and the #include of asm/arch/mmc.h
Signed-off-by: Andy Fleming <afleming@freescale.com>
This errata fix is required for 32 bit DDR2 controller on 8572.
May also be required for P10XX20XX platforms
Signed-off-by: Poonam_Agarwal-b10812 <b10812@lc1106.zin33.ap.freescale.net>
The ecm variable in sdram.c was being declared for all 8548, but only
used by specific 8548 boards, so we make that variable require those
specific boards, too
The nand code was using an index "i" into a table, and then re-using "i"
to set addresses for each upm. However, then it relied on the old value
of i still being there to enable things. Changed the second "i" to "j"
Signed-off-by: Andy Fleming <afleming@freescale.com>
This patch adds the workaround for erratum DDR20 according to MPC8548
Device Errata document, Rev. 1: "CKE signal may not function correctly
after assertion of HRESET". Furthermore, the bug DDR19 is fixed in
processor version 2.1 and the work-around must be removed.
Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
This patch makes accesses to the system memory cachable by removing the
caching-inhibited and guarded flags from the relevant TLB entries for
the TQM8548_BE and TQM8548_AG modules. FYI, the Freescale MPC85* boards
are configured similarly.
This results in a big averall performace improvement. TFTP downloads,
NAND Flash accesses, kernel boots, etc. are much faster.
Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
This patch add support for the 1 GiB DDR2-SDRAM on the TQM8548_AG
module.
Signed-off-by: Jens Gehrlein <sew_s@tqs.de>
Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
The TQM8548_AG is a variant of the TQM8548 module with 1 GiB memory,
CAN and without PCI/PCI-X and RTC. U-Boot can be built for this module
with "$ make TQM8548_AG_config".
Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
The TQM8548_BE is a variant of the TQM8548 module with NAND and CAN
interface. With NAND support, the image is significantly larger and
TEXT_BASE is adjusted accordingly. U-Boot can be built for this
module with "$ make TQM8548_BE_config".
Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
The TQM8548_AG module does not have the standard PCI/PCI-X interface
connected but just the PCI Express interface . So far it was not
possible to disable it without disabling the complete PCI interface
(CONFIG_PCI) including PCI Express.
Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
As the reset vector is located at 0xfffffffc, all flash sectors from the
beginning of the U-Boot binary to 0xffffffff must be protected. On the
TQM8548-AG having small sectors at the end of the flash it happened that
the last two sector were not protected and an "erase all" left an
un-bootable system behind:
Bank # 2: CFI conformant FLASH (32 x 16) Size: 32 MB in 270 Sectors
AMD Standard command set, Manufacturer ID: 0xEC, Device ID: 0x257E
Erase timeout: 8192 ms, write timeout: 1 ms
FFFA0000 E RO FFFC0000 RO FFFE0000 RO FFFE4000 RO FFFE8000 RO
FFFEC000 RO FFFF0000 RO FFFF4000 RO FFFF8000 E FFFFC000
The same bug seems to be in drivers/mtd/cfi_flash.c:flash_init() and many
board BSPs as well.
Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
Update the 86xx reset sequence to try executing a board-specific reset
function. If the board-specific reset is not implemented or does not
succeed, then assert #HRESET_REQ. Using #HRESET_REQ is a more standard
reset procedure than the previous method and allows all board
peripherals to be reset if needed.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Previously if we >=4G of memory and !CONFIG_PHYS_64BIT we'd report
an error and hang. Instead of doing that since DDR is mapped in the
lowest priority LAWs we setup the DDR controller and the max amount
of memory we report back is what we can map (CONFIG_MAX_MEM_MAPPED)
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Becky Bruce <beckyb@kernel.crashing.org>
Added some info that is printed out when we boot to distiquish if we
built MPC8572DS_config vs MPC8572DS_36BIT_config since they have
different address maps.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The device tree's PHY addresses need to be fixed up if we're using the
SGMII Riser Card.
The 8572, 8536, and 8544 DS boards were modified to call this function.
Code idea taken from Liu Yu <yu.liu@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
In the 36-bit physical config for MPC8572DS when need the start address
of memory and it size to be kept in phys_*_t instead of a ulong since
we support >4G of memory in the config and ulong cant represent that.
Otherwise we end up seeing the memory node in the device tree reporting
back we have memory starting @ 0 and of size 0.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
When we introduced the 36-bit config of the MPC8572DS board we had the
wrong PCI MEM bus address map. Additionally, the change to the address
map exposes a small issue in our dummy read on the ULI bus. We need
to use the new mapping functions to handle that read properly in the
36-bit config.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Previously we only allowed power-of-two memory sizes and didnt
handle >2G of memory. Now we will map up to CONFIG_MAX_MEM_MAPPED
and should properly handle any size that we can make in the TLBs
we have available to us
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
If we only have one controller we can completely ignore how
memctl_intlv_ctl is set. Otherwise other levels of code get confused
and think we have twice as much memory.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The LUN number is not part of the Command Descriptor Block (CDB) for scsi inquiry, request sense, test unit ready, read capacity and read10 commands. This patch removes the LUN number information from the CDB.
Signed-off-by: Thomas Abraham <t-abraham@ti.com>
Signed-off-by: Remy Bohmer <linux@bohmer.net>
V3: Fixed line-wrap problem due to user error in mail!
Added usb_configured() checks in usbtty_puts() and usbtty_putc() to get around a hang
when usb is not connected and the user has set up multi-io (setenv stdout serial,usbtty etc).
Got rid of redundant __attribute__((packed)) directives that were causing warnings from gcc.
Signed-off-by: Atin Malaviya <atin.malaviya@gmail.com>
Signed-off-by: Remy Bohmer <linux@bohmer.net>
i.MX31 powers on with most clocks running, so, after a power on this explicit
clock start up is not required. However, as Linux boots it disables most clocks
to save power. This includes the I2C clock. If we then soft reboot from Linux
the I2C clock stays off. This breaks the phycore, which has its environment in
I2C EEPROM. Fix the problem by explicitly starting the clock in I2C driver
initialisation routine.
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
Ack-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
The Blackfin i2c driver has been rewritten thus the special ifdefs in the
common code are no longer needed.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
With actual u-boot compiling the mgcoge port fails, because
since commit ba705b5b1a it is
necessary to define CONFIG_NET_MULTI.
Seems to me the mgcoge port is the only actual existing 8260
port who uses CONFIG_ETHER_ON_SCC, so no other 8260 port needed
to be fixed.
Signed-off-by: Heiko Schocher <hs@denx.de>
This fixes the initialization of the SDRAM_CODT register in the ppc4xx DDR2
initialization code. It also removes use of the SDRAM_CODT_FEEDBACK_RCV_SINGLE_END
and SDRAM_CODT_FEEDBACK_DRV_SINGLE_END #define's since they are reserved bits.
Signed-off-by: Carolyn Smith <carolyn.smith@tektronix.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Some AMCC eval boards do have a board_eth_init() function calling
pci_eth_init(). These boards need to call cpu_eth_init() explicitly now
with the new eth_init rework.
Signed-off-by: Stefan Roese <sr@denx.de>
The criteria of the AMCC SDRAM Controller DDR autocalibration
U-Boot code is to pick the largest passing write/read/compare
window that also has the smallest SDRAM_RDCC.[RDSS] Read Sample
Cycle Select value.
On some Kilauea boards the DDR autocalibration algorithm can
find a large passing write/read/compare window with a small
SDRAM_RDCC.[RDSS] aggressive value of Read Sample Cycle Select
value "T1 Sample".
This SDRAM_RDCC.[RDSS] Read Sample Cycle Select value of
"T1 Sample" proves to be to aggressive when later on U-Boot
relocates into DDR memory and executes.
The memory traces on the Kilauea board are short so on some
Kilauea boards the SDRAM_RDCC.[RDSS] Read Sample Cycle Select
value of "T1 Sample" shows up as a potentially valid value for
the DDR autocalibratiion algorithm.
The fix is to define a weak default function which provides
the minimum SDRAM_RDCC.[RDSS] Read Sample Cycle Select value
to accept for DDR autocalibration. The default will be the
"T2 Sample" value. A board developer who has a well defined
board and chooses to be more aggressive can always provide
their own board specific string function with the more
aggressive "T1 Sample" value or stick with the default
minimum SDRAM_RDCC.[RDSS] value of "T2".
Also put in a autocalibration loop fix for case where current
write/read/compare passing window size is the same as a prior
window size, then in this case choose the write/read/compare
result that has the associated smallest RDCC T-Sample value.
Signed-off-by: Adam Graham <agraham@amcc.com>
Signed-off-by: Stefan Roese <sr@denx.de>
CONFIG_SDRAM_PPC4xx_IBM_DDR2 is not set when include/asm-ppc/config.h is
included. So for katmai, CONFIG_MAX_MEM_MAPPED will get set to 256MB.
It makes perfect sense to set CONFIG_MAX_MEM_MAPPED to 2GB for all PPC4xx
boards right now.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds the configuration option CONFIG_SYS_SMC_RXBUFLEN.
With this option it is possible to allow the receive
buffer for the SMC on 8xx to be greater then 1. In case
CONFIG_SYS_SMC_RXBUFLEN == 1 this driver works as the
old version.
When defining CONFIG_SYS_SMC_RXBUFLEN also
CONFIG_SYS_MAXIDLE must be defined to setup the maximum
idle timeout for the SMC.
Signed-off-by: Heiko Schocher <hs@denx.de>
Move global '#ifdef CONFIG_xxx .... #endif' out of the .c files and into
the COBJS-$(CONFIG_xxx) in the Makefile. Also delete unused var in kgdb
code in the process.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
At some point an intentional double space at the end of the sentence
got changed into a tab in the GPL header line:
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
This patch fixes the damage.
Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
If on your board is more than one flash, you must know
the size of every single flash, for example, for updating
the DTS before booting Linux. So make this function
flash_get_info() extern, and you can have all info
about your flashes.
Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
Added new CONFIG options for the three type of MAC-PHY interconnect and
applied them all relevant board config files
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
SOFT_RESET must be asserted for at least 3 TX clocks. Usually, that's about 30
clock cycles, so it's been mostly working. But we had no guarantee, and at
slower bitrates, it's just over a microsecond (over 1000 clock cycles). This
enforces a 2 microsecond gap between assertion and deassertion.
Signed-off-by: Andy Fleming <afleming@freescale.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
100Mbs ethernet does not work on sh7763 chips due to the wrong value being
used in the GECMR register. Following diff fixes the problem
Signed-off-by: Simon Munton <simon@nidoran.m5data.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
This fixes MPC8260 compilation with ethernet on SCC. Probably was a
typo or something...
Signed-off-by: Sergey Kubushyn <ksi@koi8.net>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
This patch adds the configuration option CONFIG_SYS_SMC_RXBUFLEN.
With this option it is possible to allow the receive
buffer for the SMC on 82xx to be greater then 1. In case
CONFIG_SYS_SMC_RXBUFLEN == 1 this driver works as the
old version.
When defining CONFIG_SYS_SMC_RXBUFLEN also
CONFIG_SYS_MAXIDLE must be defined to setup the maximum
idle timeout for the SMC.
Signed-off-by: Heiko Schocher <hs@denx.de>
If we call flush_cache(0xfffff000, 0x1000) it would never
terminate the loop since end = 0xffffffff and we'd roll over
our counter from 0xfffffe0 to 0 (assuming a 32-byte cache line)
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Moved CONFIG_MAX_MEM_MAPPED to the asm/config.h so its kept consistent
between the two current users (lib_ppc/board.c, 44x SPD DDR2).
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Stefan Roese <sr@denx.de>
We have common defines that we duplicate in various ways. Having an
arch specific config.h gives us a common location for those defines.
Eventually we should be able to replace this when we have proper
Kconfig support.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Now that the rest of u-boot can support it, change the PCI bus
address of the PCI MEM regions from 0x80000000 to 0xc0000000,
and use the same bus address for both PCI1 and PCI2. This will
maximize the amount of PCI address space left over to map RAM
on systems with large amounts of memory.
Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
The code assumes that the pci bus address and the virtual
address used to access a region are the same, but they might
not be. Fix this assumption.
Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Clean up PCI mapping concepts in the 8641 config - rename _BASE
to _BUS, as it's actually a PCI bus address, separate virtual
and physical addresses into _VIRT and _PHYS, and use each
appopriately.
Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
The BAT fields are architected; there's no need for these to be in
cpu-specific files. Drop the duplication and move these to
include/asm-ppc/mmu.h. Also, remove the BL_xxx defines that were only
used by the alaska board, and switch to using the BATU_BL_xxx defines
used by all the other boards. The BL_ defines previously in use
had to be shifted into the proper position for use, which was inefficient.
Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
It is no longer always true that the pci bus address can be
used as the virtual address for pci accesses. pci_map_bar()
is created to return the virtual address for a pci region.
Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Because the inbound pci windows are mapped generously, set up
the more specific outbound windows first. This way, when we
search the pci regions for something, we will hit on the more
specific region. This can actually be a problem on systems
with large amounts of RAM.
Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
If the VA and PA of the flash aren't the same, the banks list
should be initialized to hold the physical address. Correct this.
Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Driver for Dave DNET ethernet controller (used on Dave/DENX
QongEVB-LITE board).
Signed-off-by: Ilya Yanok <yanok@emcraft.com>
Acked-by: Ben Warren <biggerbadderben@gmail.com>
When we search for an address match in pci_hose_{phys_to_bus,bus_to_phys}
we should give preference to memory regions that aren't system memory.
Its possible that we have over mapped system memory in the regions and
we want to avoid depending on the order of the regions.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The PCI_REGION_MEMORY and PCI_REGION_MEM are a bit to similar and
can be confusing when reading the code.
Rename PCI_REGION_MEMORY to PCI_REGION_SYS_MEMORY to clarify its used
for system memory mapping purposes.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Without the timeout present an infinite loop can occur if the
NAND device is broken or not present.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Commit cfa460adfd removed support
for disabling the "No NAND device found!!!" warning when
CONFIG_SYS_NAND_QUIET_TEST was defined. This re-adds support
for silencing the warning.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Dear Wolfgang,
You are right, the patch was ugly.
The new one seems to be better.
Signed-off-by: Valeriy Glushkov <gvv@lstec.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
This fixes a bug that tmp environment memory not being released.
Signed-off-by: Derek Ou <dou@siconix.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
The "size" variable in start_armboot() in lib_arm/board.c is only really
used in "#ifndef CONFIG_SYS_NO_FLASH" case, and even there it can be
eliminated (thanks to Jean-Christophe PLAGNIOL-VILLARD for a suggestion.)
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
Modified mii_init to support boards with PHYs that are not set to
autonegotiate, but still want to use u-boot's mii commands to probe
the smi bus. Such PHYs will not set the Autonegotiate-done bit.
Signed-off-by: Richard Retanubun <RichardRetanubun@RuggedCom.com>
Applied the patch for baudrate divider value truncation for
serial_init to serial_setbrg as well.
Signed-off-by: Richard Retanubun <RichardRetanubun@RuggedCom.com>
Cleanup for M5271EVB:
Added clarification on the use of CONFIG_SYS_CLOCK.
Modified to use u-boot's HUSH parser.
Cleanup on environment settings.
Removed compiler warning by defining CONFIG_SYS_CS0_*
Dependencies:
Added the use of CONFIG_SYS_MCF_SYNCR for clock multiplier.
This depends on a patch to include/asm-m68k/m5271.h
that defines the multiplier and divider ratios.
Removed the definition of CONFIG_SYS_FECI2C.
This depends on a patch that removes the use of it in
cpu/mcf52x2/cpu_init.c
Signed-off-by: Richard Retanubun <RichardRetanubun@RuggedCom.com>
M5271 dynamic clock multiplier. It is currently fixed at 100MHz.
Allow the board header file to set their own multiplier and divider.
Added the #define for the multiplier and divider to the cpu header file.
Signed-off-by: Richard Retanubun <RichardRetanubun@RuggedCom.com>
Discontinue the use of CONFIG_SYS_FECI2C (only used by M5271EVB).
Use read-modify-write to activate the FEC pins without disabling I2C.
Signed-off-by: Richard Retanubun <RichardRetanubun@RuggedCom.com>
CONFIG_M68K bdinfo cleanup:
Fixed compiler warning about baudrate printing.
format '%d' expects type 'int', but argument 2 has type 'long unsigned int'.
Added printing of "cpufreq"
Signed-off-by: Richard Retanubun <RichardRetanubun@RuggedCom.com>
Added the CONFIG_M5271 to the list of Coldfire V2 processor. This
was causing the bus clock (not CPU clock) to be declared twice as
fast as it actually is. This causes UARTS to operate at half the
specified baudrate.
Signed-off-by: Richard Retanubun <RichardRetanubun@RuggedCom.com>
On some platforms PCIE support is not required, but would be included
because the cpu supports it. To reduce fooprint it is now configurable
via CONFIG_PCI_DISABLE_PCIE.
Signed-off-by: Dirk Eibach <eibach@gdsys.de>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch updates the fdt UART clock fixup code to
only touch CPU internal UARTs on 4xx systems.
Only these UARTs are definitely clocked by gd->uart_clk.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Move the default SPI CS that we boot from into common code so that it can
be used in other SPI drivers and environment settings.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Previously, booting over the UART required the baud rate to be known ahead
of time. Using a bit of tricky simple math, we can calculate the new board
rate based on the old divisors.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Robin Getz <rgetz@blackfin.uclinux.org>
Newer Blackfin boot roms support using the fast SPI read command rather than
just the slow one. If the functionality is available, then use it.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Some bits of the DDR MMRs should not be set. If they do, bad things may
happen (like random failures or hardware destruction).
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Newer Blackfin's have an on-chip rom with a syscontrol() function that needs
to be used to properly program the memory and voltage settings as it will
include (possibly critical) factory tested bias values.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Patch "flash/cfi_flash: Use virtual sector start address, not phys"
introduced a small typo and compilation warning for systems with CFI
legacy support (e.g. hcu4). This patch fixes it.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch removes the double defined manufacturer defines from
jedec_flash.c. Since the common defines in flash.h are 32bit
we now need the (16) cast. This patch also removes the compilation
warning (e.g. seen on hcu5):
./MAKEALL hcu5
Configuring for hcu5 board...
jedec_flash.c:219: warning: large integer implicitly truncated to unsigned type
Signed-off-by: Stefan Roese <sr@denx.de>
Patch "flash/cfi_flash: Use virtual sector start address, not phys"
introduced a small compilation warning. This patch fixes it.
Signed-off-by: Stefan Roese <sr@denx.de>
include/flash.h was commented to say that the address in
flash_info->start was a physical address. However, from u-boot's
point of view, and looking at most flash code, it makes more
sense for this to be a virtual address. So I corrected the
comment to indicate that this was a virtual address.
The only flash driver that was actually treating the address
as physical was the mtd/cfi_flash driver. However, this code
was using it inconsistently as it actually directly dereferenced
the "start" element, while it used map_physmem to get a
virtual address in other places. I changed this driver so
that the code which initializes the info->start field calls
map_physmem to get a virtual address, eliminating the need for
further map_physmem calls. The code is now consistent.
The *only* place a physical address should be used is when defining the
flash banks list that is used to initialize the flash_info struct,
usually found in the board config file.
Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Signed-off-by: Stefan Roese <sr@denx.de>
Original patch from Ralph Kondziella
plus clean up by Wolfgang Denk
plus changes by John Rigby
use ips clock not lpc
port forward to current u-boot release
Signed-off-by: Ralph Kondziella <rk@argos-messtechnik.de>
Signed-off-by: Wolfgang Denk <wd@denx.de>
Signed-off-by: John Rigby <jrigby@freescale.com>
IIM (IC Identification Module) is the fusebox for the mpc5121.
Use #define CONFIG_IIM to turn on the clock for this module
use #define CONFIG_CMD_FUSE to add fusebox commands.
Fusebox commands include the ability to read
the status, read the register cache, override the register cache,
program the fuses and sense them.
Signed-off-by: Martha Marx <mmarx@silicontkx.com>
Signed-off-by: John Rigby <jrigby@freescale.com>
Add support for using a bmp other than
FSL_Logo_BMP for the DIU splash screen.
Can now set the env var "diu_bmp_addr" to
the address of a BMP in flash to use instead
of the default FSL_Logo_BMP.
Signed-off-by: Martha Marx <mmarx@silicontkx.com>
Signed-off-by: John Rigby <jrigby@freescale.com>
Somehow I missed the real driver part in my last patch version. This patch
now adds the driver.
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Remy Bohmer <linux@bohmer.net>
This is a port of the Linux Blackfin on-chip SDH driver to U-Boot.
Signed-off-by: Cliff Cai <cliff.cai@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Knowing the booting source of the part is useful, especially when the part
can switch dynamically between sources.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Set the default CONFIG_ENV_SPI_CS value to match the SPI CS that is used by
the Blackfin on-chip bootrom to boot out of SPI flash.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
This is a port of the Linux Blackfin on-chip ATAPI driver to U-Boot.
Signed-off-by: Sonic Zhang <Sonic.Zhang@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Use the -mno-fdpic flag so that any Blackfin toolchain can be used to build
up u-boot, including ones that output FDPIC ELF by default.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Rather than using 8bit transfers for everything, use 8/16/32 bit transfers
as usable with the source/destination addresses and the count size.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The performance difference from doing an 8 bit DMA memcpy vs an optimized
core memcpy can be pretty big when you add in the overhead of setting up the
MDMA registers, cache flushes, etc... So only use dma_memcpy() when we
actually require it.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
We have to make sure the DMA channel is actually disabled in hardware before
attempting to reprogram it. Otherwise the new settings are ignored and we
end up with random hangs/failures.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Take the cache flush functions from the kernel as they use hardware loops in
order to get optimal performance.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
For systems with CONFIG_NET_MULTI disabled, bi_enetaddr does not get setup
based on $ethaddr, so set it up.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Calculating the clocks requires a bit of calls to gcc math functions, so
cache the values after the first run since they'll most likely never
change once U-Boot is up and running.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Start building all Blackfin boards with -ffunction-sections/-fdata-sections
and linking with --gc-sections.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Redo how pointers are managed to get rid of ugly casts and strict pointer
aliasing issues that are highlighted by gcc 4.3.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Acked-by: Ben Warren <biggerbadderben@gmail.com>
No point in having a Blackfin-specific define "CONFIG_BFIN_MAC_RMII" that
does exactly the same thing as common "CONFIG_RMII".
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Acked-by: Ben Warren <biggerbadderben@gmail.com>
Rather than having the on-chip MAC hardcoded to phy address 1 and a speed
of 2.5mhz, use these as defaults if the board doesn't specify otherwise.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Acked-by: Ben Warren <biggerbadderben@gmail.com>
Cleanup and rewrite the MII/PHY related functions so that we can reuse the
existing common linux/miiphy.h code and hook into the `mii` command.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Acked-by: Ben Warren <biggerbadderben@gmail.com>
Rather than hardcoding MDCDIV to 24 (which is correct for ~125mhz SCLK),
use the real algorithm so it gets set correctly regardless of SCLK.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Acked-by: Ben Warren <biggerbadderben@gmail.com>
instead the board will have to load it from flash or ram
which will be specified by npe_ucode env var
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
This patch updates the default environmental variables for the
Korat PPC 440EPx board, and makes additional minor fixes.
Signed-off-by: Larry Johnson <lrj@acm.org>
Signed-off-by: Stefan Roese <sr@denx.de>
The new environment variable "korat_usbcf" selects the USB
port used by the Korat board's CompactFlash controller.
Signed-off-by: Larry Johnson <lrj@acm.org>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds support for searching through available PHY-addresses in
the macb-driver. This is needed for the ATEVK1100 evaluation board,
where the PHY-address will be initialized to either 1 or 7.
This patch adds a config option, CONFIG_MACB_SEARCH_PHY, which when
enabled tells the driver to search for the PHY address.
Signed-off-by: Gunnar Rangoy <gunnar@rangoy.com>
Signed-off-by: Paul Driveklepp <pauldriveklepp@gmail.com>
Signed-off-by: Olav Morken <olavmrk@gmail.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
This patch removes volatile from:
volatile IP_t *ip = (IP_t *)xip;
Due to a bug, avr32-gcc will assume that ip is aligned on a word boundary when
using volatile, which causes an exception since xip isn't aligned on a word
boundary.
Signed-off-by: Gunnar Rangoy <gunnar@rangoy.com>
Signed-off-by: Paul Driveklepp <pauldriveklepp@gmail.com>
Signed-off-by: Olav Morken <olavmrk@gmail.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
This patch adjusts the LED control so that interrupt lines are not reading LEDs
and effectively causing indefinite interrupts to the controller.
Signed-off-by: Ron Madrid <ron_madrid@sbcglobal.net>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Import the is_valid_ether_addr() function from the Linux kernel.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
This fixes an error which raises just a warning:
sbc8560.c:250: warning: passing argument 2 of 'strmhz' makes integer from pointer without a cast
Signed-off-by: Wolfgang Denk <wd@denx.de>
Since the SPD823TS board does not actually have any writable flash to save
its environment, undefine CONFIG_CMD_ENV so the "saveenv" command is
disabled.
This fixes the build error:
common/libcommon.a(cmd_nvedit.o): In function `do_saveenv':
common/cmd_nvedit.c:557: undefined reference to `saveenv'
make: *** [u-boot] Error 1
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Configuring for MPC8540EVAL board...
mpc8540eval.c: In function 'checkboard':
mpc8540eval.c:53: error: invalid operands to binary /
make[1]: *** [mpc8540eval.o] Error 1
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
We should check the return of usb_new_device() so that if no USB device is
found, we print out the right message rather than always saying "new usb
device found".
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Remy Bohmer <linux@bohmer.net>
With this patch the USB related connection speed output ("usb tree" command and
debug output) is now high-speed enabled.
This patch also fixes a compilation warning when debugging is enabled.
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Remy Bohmer <linux@bohmer.net>
This patch adds routines to handle (flush/invalidate) the dcache for the
QH and qTD structures and data buffers. This is needed on platforms using
this EHCI support with dcache enabled (like the MIPS VCT board port).
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Remy Bohmer <linux@bohmer.net>
This patch adds the config option CONFIG_EHCI_HCD_INIT_AFTER_RESET
to call ehci_hcd_init() again after ehci_reset() is executed. This
is needed for the upcoming VCT EHCI support which needs to re-init
the hcd part again after the EHCI CMD_RESET is executed.
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Remy Bohmer <linux@bohmer.net>
This patch fixes an issue that the speed of USB devices was not detected
correctly on some EHCI controllers. This will be used on the upcoming VCT
EHCI support.
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Remy Bohmer <linux@bohmer.net>
Enabling DM6446 (TI DaVinci) USB module power and MUSB low-level
controller hook up to USB core layer.
Signed-off-by: Ravi Babu <ravibabu@ti.com>
Signed-off-by: Swaminathan S <swami.iyer@ti.com>
Signed-off-by: Thomas Abraham <t-abraham@ti.com>
Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
Signed-off-by: Remy Bohmer <linux@bohmer.net>
Adding DM6446 (TI DaVinci) platform specific USB functionality for
USB Phy and VBUS initialization.
Signed-off-by: Ravi Babu <ravibabu@ti.com>
Signed-off-by: Swaminathan S <swami.iyer@ti.com>
Signed-off-by: Thomas Abraham <t-abraham@ti.com>
Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
Signed-off-by: Remy Bohmer <linux@bohmer.net>
Adding Mentor USB core functionality and Mentor USB Host controller
functionality for Mentor USB OTG controller (musbhdrc).
Signed-off-by: Ravi Babu <ravibabu@ti.com>
Signed-off-by: Swaminathan S <swami.iyer@ti.com>
Signed-off-by: Thomas Abraham <t-abraham@ti.com>
Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
Signed-off-by: Remy Bohmer <linux@bohmer.net>
Rather than forcing people to define a custom "LITTLEENDIAN", just use the
__LITTLE_ENDIAN one from the Linux byteorder headers that every arch is
already setting up.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Remy Bohmer <linux@bohmer.net>
Add USB ehci ixp4xx host controller. Test on ixdp465 board.
Signed-off-by: Michael Trimarchi <trimarchimichael@yahoo.it>
Signed-off-by: Remy Bohmer <linux@bohmer.net>
USB ehci code cleanup. Use handshake instead of infinite while loop
to check the STD_ASS status
Signed-off-by: Michael Trimarchi <trimarchimichael@yahoo.it>
Signed-off-by: Remy Bohmer <linux@bohmer.net>
Add USB ehci pci support. This patch doesn't include any
pci_ids and it is not tested on real hardware.
Signed-off-by: Michael Trimarchi <trimarchimichael@yahoo.it>
Signed-off-by: Remy Bohmer <linux@bohmer.net>
The SanDisk Corporation U3 Cruzer Micro 1/4GB Flash Drive 000016244373FFB4
does not like to be reset, so check for it.
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Remy Bohmer <linux@bohmer.net>
This patch populates the 'priv' field of the USB keyboard device_t
structure. The 'priv' field is populated with the address of the
'struct usb_device' structure that represents the USB device.
The 'priv' field can then be used in the 'usb_event_poll' function to
determine the USB device that requires to be polled. An
example of its usage in 'usb_event_poll' function is as below.
device_t *dev;
struct usb_device *usb_kbd_dev;
<snip>
dev = device_get_by_name("usbkbd");
usb_kbd_dev = (struct usb_device *)dev->priv;
iface = &usb_kbd_dev->config.if_desc[0];
Signed-off-by: Thomas Abraham <t-abraham@ti.com>
Signed-off-by: Remy Bohmer <linux@bohmer.net>
- fix ehci_readl, ehci_writel
- introduce new define in ehci.h
- introduce the handshake function for waiting on a register
- fix usb_ehci_fsl with the new HC_LENGTH macro
Signed-off-by: Michael Trimarchi <trimarchimichael@yahoo.it>
Signed-off-by: Remy Böhmer <linux@bohmer.net>
IXP465 board and I find some errors in the code. This
patch fix:
- descriptor initizialization (config, interface and endpoint
must be one next-to the other when the USB_DT_CONFIG message
is send.
- FIX little/endian bigendian (introduce the CONFIG_EHCI_DESC_BIG_ENDIAN
and the CONFIG_EHCI_MMIO_BIG_ENDIAN)
- Introduce the linux version of the usb_config_descriptor and
usb_interface descriptor. This descriptor does't contains
u-boot extension.
Signed-off-by: Michael Trimarchi <trimarchimichael@yahoo.it>
Signed-off-by: Remy Böhmer <linux@bohmer.net>
The old swap function tended to clobber unrelated pins and screw up masks.
Rewrite the thing from scratch so it only uses the resources it needs.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The BF53x/BF56x parts do not have an on-chip ROM to boot LDRs out of
arbitrary memory locations, so implement a basic one in software.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Now that real documentation has been released for the OTP interface and
the on-chip ROM wrt writing/timings, implement support for reading/writing
as well as dumping/locking.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Some devices have no UART device pulled out, so allow people to disable the
driver completely in favor of other methods (like JTAG-console).
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The Blackfin JTAG has the ability to pass data via a back-channel without
halting the processor. Utilize that channel to emulate a console.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Make sure we save the value of RETX at power on and then pass it on to the
kernel so that it can nicely debug a "double-fault-caused-a-reset" crash.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
People often ask questions about the init process and when things go
from flash to relocated base, so clarify the comments a bit.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
As pointed out by Ivan Koryakovskiy, the initialization code was not
actually respecting the CONFIG_CLKIN_HALF option when configuring the
PLL_CTL register.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
This video driver used to live in the Blackfin cpu directory, but it was
lost during the unification process. This brings it back.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The DEBUG code in initdram() is quite old and was never really useful, so
just drop it altogether. Common Blackfin debug code does a better job.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Some of the flash defines weren't in the correct location and caused build
problems in some configurations, so let's move types and defines to better
local locations.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The current Blackfin i2c driver does not work properly with certain devices
due to it breaking up transfers incorrectly. This is a rewrite of the
driver and relocates it to the newer place in the source tree.
Also remove duplicated I2C speed defines in Blackfin board configs and
disable I2C slave address usage since it isn't implemented.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Respect the CONFIG_SYS_MONITOR_LEN define rather than assuming a size of
128kB when setting up the default flash protection region for U-Boot
itself.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
When setting up the global data, rather than relying on sizeof(), use the
common CONFIG_SYS_GBL_DATA_SIZE define.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Our dcache invalidate function doesn't just invalidate, it also flushes.
So rename the function accordingly and fix the dma_memcpy() function so it
doesn't inadvertently corrupt the data destination.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Creating a new dma_memcpy() function that skips all cache checks allows us
to use the function in very early init where the cache is not yet setup.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
extend commit c70564e6b1
"NAND: Fix cache and memory inconsistency issue" to add the cache.o dependency
to the simpc8313 build and fix this:
...Large Page NAND...Configuring for SIMPC8313 board...
nand_boot_fsl_elbc.o: In function `nand_boot':
nand_spl/board/sheldon/simpc8313/nand_boot_fsl_elbc.c:150: undefined reference to `flush_cache'
make[1]: *** [/home/r1aaha/git/u-boot-mpc83xx/nand_spl/u-boot-spl] Error 1
make: *** [nand_spl] Error 2
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Remove command name from all command "usage" fields and update
common/command.c to display "name - usage" instead of
just "usage". Also remove newlines from command usage fields.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
The pcs440ep's led command usage formatting is non-standard. It
was made standard in preparation for larger command usage updates.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
The diufb command usage formatting is non-standard. It was
made standard in preparation for larger command usage updates.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Rather than have the board code initialize SATA automatically during boot,
make the user manually run "sata init". This brings the SATA subsystem in
line with common U-Boot policy.
Rather than having a dedicated weak function "is_sata_supported", people
can override sata_initialize() to do their weird board stuff. Then they
can call the actual __sata_initialize().
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The ending LBA is inclusive. Hence, the partition size should be
((ending-LBA + 1) - starting-LBA) to get the proper partition size.
This is confirmed against the results from the parted tool.
(e.g. use parted /dev/sda -s unit S print) and observe the size.
Signed-off-by: Richard Retanubun <RichardRetanubun@RuggedCom.com>
This patch fixes a bug (?) introduced after inclusion of the new
JFFS2 code.
When not using CONFIG_JFFS2_CMDLINE, the code in cmd_jffs2.c doesn't
fill in part->sector_size (keeping it as 0), but a correct value is
needed by the code in jffs2_1pass.c. This causes all JFFS2 accesses
to be in the same place of the memory, what obviously means
impossibility to use the JFFS2 partition.
This problem is fixed in this patch by including sector size
calculation in non-CONFIG_JFFS2_CMDLINE mtdparts_init variant.
Signed-off-by: Tomasz Figa <tomasz.figa_at_gmail.com>
Rather than special casing each environment type for enabling the saveenv
command, have them all behave the same. This avoids bitrot as new env
sources are added/removed.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
This patch adds a #define to optionally change the behaviour of
i2c_read() in soft_i2c.c to send an I2C repeated start instead of a
stop-start between sending the device address pointer write and
reading back the data. The current behaviour is retained as the
default.
While most devices will work either way, I have a smart battery(*)
that requires repeated start, and someone at some point found a
device that required a stop-start.
(*) http://www.inspired-energy.com/Standard_Products/NL2054/NL2054%20Rev1.0%20Data%20Sheet.pdf
Signed-off-by: Andrew Dyer <adyer@righthandtech.com>
U-Boot's gunzip() function does not handle the return code
of zlib's inflate() function correctly. gunzip() is implemented
to uncompress all input data in one run. So the correct return
code for the good case is Z_STREAM_END. In case of insufficient
output buffer memory inflate returns Z_OK. For gunzip() this
is an error.
It also makes sense to me to call inflateEnd() also in case
of an error.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
This patch adds flush_/invalidate_dcache_range() to the MIPS architecture.
Those functions are needed for the upcoming dcache support for the USB
EHCI driver. I chose this API because those cache handling functions are
already present in the PPC architecture.
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
This patch removes the now obsolete and additionally wrongly defined
board_nand_init() prototype from nand_spl/nand_boot.c.
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Added flash_fixup_stm to fix geometry reversal on STMicro M29W320ET flash chip.
Modeled after flash_fixup_amd, this patch handles the geometry reversal
or erase sectors that exist for ST Micro (now Numonyx) M29W320ET flash.
Since I cannot test all STM's chips, the detection is implemented as
narrow as possible for now.
Signed-off-by: Richard Retanubun <RichardRetanubun@RuggedCom.com>
Signed-off-by: Stefan Roese <sr@denx.de>
The function find_sector() doesn't need to be called twice in
the case of AMD command set.
Tested on TQM5200S-BD with Samsung K8P2815UQB.
Signed-off-by: Jens Gehrlein <sew_s@tqs.de>
Signed-off-by: Stefan Roese <sr@denx.de>
Lot's of 405 board config files use CONFIG_SYS_IGNORE_405_UART_ERRATA_59.
Either they define or undef it. Because it's not used in any source
files this patch removes any references to it.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Board support for the Guntermann & Drunck PowerPC 440 ETX module.
Based on the AMCC Yosemite board support by Stefan Roese.
Signed-off-by: Dirk Eibach <eibach@gdsys.de>
Signed-off-by: Stefan Roese <sr@denx.de>
Added support for a second memory bank to DDR autodetection for 440
platforms.
Made hardcoded values configurable.
Signed-off-by: Dirk Eibach <eibach@gdsys.de>
Signed-off-by: Stefan Roese <sr@denx.de>
This change is needed for mgcoge because it uses two ethernet drivers.
Add a check for the presence of the PIGGY board on mgcoge. Without this
board networking cannot work and the initialization must be aborted.
Only allocate rtx once to prevent DPRAM exhaustion.
Initialize ether_scc.c and the keymile-specific HDLC driver (to be added
soon) in eth.c.
Signed-off-by: Gary Jennejohn <garyj@denx.de>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
This patch changes the reg_read/_write to smc911x_reg_read/_write
and defines then as weak so that they can be overridden by board
specific version.
This will be used by the upcoming VCTH board support.
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
The NMDK8815 board is distributed by ST Microelectornics.
Other (proprietary) code must be run to unlock the CPU before
U-Boot runs. doc/README.nmdk8815 outlines the boot sequence.
This is the initial port, with basic infrastructure and
a working serial port.
Signed-off-by: Alessandro Rubini <rubini@unipv.it>
Acked-by: Andrea Gallo <andrea.gallo@stnwireless.com>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Some images can be quite large, so add an option to compress the
image data with gzip in the U-Boot image. Then at runtime, the
board can decompress it with the normal zlib functions.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
A couple of buffers in the fat code are declared as an array of bytes.
But it is then cast up to a structure with 16bit and 32bit members.
Since GCC assumes structure alignment here, we have to force the
buffers to be aligned according to the structure usage.
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Higher spi flash layers expect to be given back a pointer that was
malloced so that it can free the result, but the lower layers return
a pointer that is in the middle of the malloced memory. Reorder the
members of the lower spi structures so that things work out.
Signed-off-by: Brad Bozarth <bflinux@yumbrad.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Acked-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
When compile u-boot with the 2.18 binutils the following
warning messages for each object file in post/lib_ppc/fpu/ is
produced at the linking stage:
post/libpost.a(acc1.o) uses hard float, u-boot uses soft-float
...
This is because of the fact that, in general, the soft-float and
hard-float ABIs are incompatible; the 2.18 binutils do checking
of the Tag_GNU_Power_ABI_FP attribute of the files to be linked, and
produce the worning like above if these are not compatible.
The incompatibility of ABIs is concerned only the float values:
e.g. the soft-float ABI assumes the float argument passing in the
pair of rX registers, and the hard-float ABI assumes passing of
the float argument in the fX register. When we don't pass the float
arguments between the functions compiled with different floatness,
then such an application will work correctly.
This is the case for the FPU POST: u-boot (compiled with soft-float)
doesn't pass to (and doesn't get from) the FPU POST functions any
floats; there are no functions exported from the post/lib_ppc/fpu/
objects which would work with float parameters/returns too. So, we
can reassure the linker not to worry about the difference in ABI
attributes of linking files just by setting the 'soft-float'
attribute for the objects in post/lib_ppc/fpu. And this patch does
this.
Also, to avoid passing both soft- and hard-float options in CFLAGS
when compiling the files from post/lib_ppc/fpu (which is OK, but
looks rather dirty) this patch removes the soft-float string from
CFLAGS in post/lib_ppc/fpu/Makefile.
Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
Initial support for the DS4510, a CPU supervisor with
integrated EEPROM, SRAM, and 4 programmable non-volatile
GPIO pins. The CONFIG_DS4510 define enables support
for the device while the CONFIG_CMD_DS4510 define
enables the ds4510 command. The additional
CONFIG_DS4510_INFO, CONFIG_DS4510_MEM, and
CONFIG_DS4510_RST defines add additional sub-commands
to the ds4510 command when defined.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
The iteration limit is passed to mtest as a fourth parameter:
[start [end [pattern [iterations]]]]
If no fourth parameter is supplied, there is no iteration limit and the
test will loop forever.
Signed-off-by: Dirk Eibach <eibach@gdsys.de>
Moved driver vcth.c to vct.c to better reflect the VCT board series.
This driver is now used by the VCT platforms:
vct_premium
vct_platinum
vct_platinumsvc
Signed-off-by: Stefan Roese <sr@denx.de>
Support bootdelay=0 in abortboot for the CONFIG_AUTOBOOT_KEYED case
similar to the CONFIG_ZERO_BOOTDELAY_CHECK support for the
!CONFIG_AUTOBOOT_KEYED case.
Do this by reversing the loop so we do at least one iteration before
checking for timeout.
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
Reset function specific to AMD SC520 microcontroller - Is more of a
'hard reset' that the triple fault.
Requires CONFIG_SYS_RESET_SC520 to be defined in config
I would have liked to add this to a new file (cpu/i386/sc520/reset.c)
but ld requires that a object file in a library arhive MUST contain
at least one function which does not override a weak function (and is
called from outside the object file) in order for that object file to
be extracted from the archive. This would be the only function on the
new file, and hence, will never get linked in.
Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
Moved from interrupts.c to cpu.c and made into a weak function to
allow vendor specific override
Vendor specific CPU reset (like the AMD SC520 MMCR reset) can now be
added to the vendor specific code without the need to remember to
#undef usage of the generic method and if you forget to include your
custom reset method, you will always get the default.
Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
Brings i386 in line with other CPUs with a reset vector and frees up reset.c
for CPU reset functions
Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
This patch extracts the identical config options for the
keymile boards mgcoge, mgsuvd and kmeter1 in a new
common config file keymile-common.h.
Signed-off-by: Heiko Schocher <hs@denx.de>
Check the presence of the PIGGY on the keymile boards mgcoge,
mgsuvd and kmeter1. If the PIGGY is not present, dont register
this Ethernet device.
Signed-off-by: Heiko Schocher <hs@denx.de>
Acked-by: Ben Warren <biggerbadderben@gmail.com>
This patch adds support for the kmeter1 board from Keymile,
based on a Freescale MPC8360 CPU.
- serial console on UART 1
- 256 MB DDR2 RAM
- 64 MB NOR Flash
- Ethernet RMII Mode over UCC4
- PHY SMSC LAN8700
Signed-off-by: Heiko Schocher <hs@denx.de>
Add a do_div() wrapper, lldiv(). The new inline function doesn't modify
the dividend and returns the result of division, so it is useful
in complex expressions, i.e. "return(a/b)" -> "return(lldiv(a,b))"
Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
We move all IO addressed (CCSR, localbus, PCI) above the 4G boundary
to allow for larger memory sizes.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The eLBC only handles 32-bit physical address in systems with 36-bit
physical. The previos generation of LBC handled 34-bit physical
address in 36-bit systems. Added a new CONFIG option to convey
the difference between the LBC and eLBC.
Also added defines for XAM bits used in LBC for the extended 34-bit
support.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Use the new BR_ADDR macro to properly setup the address field of the
localbus chipselects used by NAND.
This allows us to deal with 36-bit phys on these boards in the future.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This patch updates e500 freqProcessor to array based on CONFIG_NUM_CPUS,
and prints each CPU's frequency separately. It also fixes up each CPU's
frequency in "clock-frequency" of fdt blob.
Signed-off-by: James Yang <James.Yang@freescale.com>
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
The wake up ARP feature need use the memory to process
wake up packet, we enable auto self refresh to support it.
Signed-off-by: Dave Liu <daveliu@freescale.com>
Acked-by: Andy Fleming <afleming@freescale.com>
For light loaded system, we use the 1T timing to gain better
memory performance, but for some heavily loaded system,
you have to add the 2T timing options to board files.
Signed-off-by: Dave Liu <daveliu@freescale.com>
Acked-by: Andy Fleming <afleming@freescale.com>
Some 85xx processors have the advanced power management feature,
such as wake up ARP, that needs enable the automatic self refresh.
If the DDR controller pass the SR_IT (self refresh idle threshold)
idle cycles, it will automatically enter self refresh. However,
anytime one transaction is issued to the DDR controller, it will
reset the counter and exit self refresh state.
Signed-off-by: Dave Liu <daveliu@freescale.com>
Acked-by: Andy Fleming <afleming@freescale.com>
- The DDR3 controller is expanding the bits for timing config
- Add the DDR3 32-bit bus mode support
Signed-off-by: Dave Liu <daveliu@freescale.com>
Acked-by: Andy Fleming <afleming@freescale.com>
According to the latest 8572 UM, the DDR3 controller
is expanding the bit mask, and we use the extend ACTTOPRE
mode when tRAS more than 19 MCLK.
Signed-off-by: Dave Liu <daveliu@freescale.com>
Introduce a new define to seperate out the virtual address that PCI
IO space is at from the physical address. In most situations these are
mapped 1:1. However any code accessing the bus should use VIRT.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Andy Fleming <afleming@freescale.com>
Introduce a new define to seperate out the virtual address that PCI
memory is at from the physical address. In most situations these are
mapped 1:1. However any code accessing the bus should use VIRT.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Andy Fleming <afleming@freescale.com>
Use the _MEM_PHYS defines instead of _MEM_BUS for LAW and real address fields
of TLBs. This is what we should have always been using from the start.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Andy Fleming <afleming@freescale.com>
Use CONFIG_SYS_PCI*_IO_BUS for the bus relative address instead
of _IO_BASE so we are more explicit.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Use CONFIG_SYS_{PCI,RIO}_MEM_BUS for the bus relative address instead
of _MEM_BASE so we are more explicit.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Andy Fleming <afleming@freescale.com>
Added a CONFIG_SYS_FLASH_BASE_PHYS for use as the physical address and
maintain CONFIG_SYS_FLASH_BASE as the virtual address of the flash.
This allows us to deal with 36-bit phys on these boards in the future.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Andy Fleming <afleming@freescale.com>
Added a PIXIS_BASE_PHYS for use as the physical address and maintain
PIXIS_BASE as the virtual address of the PIXIS fpga registers.
This allows us to deal with 36-bit phys on these boards in the future.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Andy Fleming <afleming@freescale.com>
This patch will create a new board, SIMPC8313, from Sheldon Instruments. This
board boots from NAND devices and is configureable for either large or small
page devices. The board supports non-soldered DDR2, one ethernet port, a
Marvell 88E1118 PHY, and PCI host support. The board also has a FPGA connected
to the eLBC providing glue logic to a TMS320C67xx DSP.
Signed-off-by: Ron Madrid <ron_madrid@sbcglobal.net>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Error with CONFIG_NAND_LEGACY in common/cmd_nand.c:
With current code "nand read.jffs2s" (read and skip bad blocks) is always interpreted as
"nand read.jffs2" (read and fill bad blocks with 0xff). This is because ".jffs2" is
tested before ".jffs2s" and only the first two characters are compared.
Correction:
Test for ".jffs2s" first and compare the first 7 characters.
Signed-off-by: Scott Wood <scottwood@freescale.com>
This patch renames NAND_MAX_CHIPS to CONFIG_SYS_NAND_MAX_CHIPS and
changes the default from 8 to 1 for the legacy and the new MTD
NAND layer. This allows to remove all NAND_MAX_CHIPS definitions
in the board config files because none of the boards use multi
chip support (NAND_MAX_CHIPS > 1) so far. The bamboo and the DU440
define
#define NAND_MAX_CHIPS CONFIG_SYS_MAX_NAND_DEVICE
but that's bogus and did not work anyhow.
Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
We load the secondary stage u-boot image from NAND to
system memory by nand_load, but we did not flush d-cache
to memory, nor invalidate i-cache before we jump to RAM.
When the system has cache enabled and the TLB/page attribute
of system memory is cacheable, it will cause issues.
- 83xx family is using the d-cache lock, so all of d-cache
access is cache-inhibited. so you can't see the issue.
- 85xx family is using d-cache, i-cache enable, partial
cache lock. you will see the issue.
This patch fixes the cache issue.
Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Enable nand lock, unlock and status of lock feature.
Not every device and platform requires this, hence,
it is under define for CONFIG_CMD_NAND_LOCK_UNLOCK
Nand unlock and status operate on block boundary instead
of page boundary. Details in:
http://www.micron.com/products/partdetail?part=MT29C2G24MAKLAJG-6%20IT
Intial solution provided by Vikram Pandita <vikram.pandita@ti.com>
Includes preliminary suggestions from Scott Wood
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Rather than putting the function prototype for board_nand_init() in the one
place where it gets called, put it into nand.h so that every place that also
defines it gets the prototype. Otherwise, errors can go silently unnoticed
such as using the wrong return value (void rather than int) when defining
the function.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Scott Wood <scottwood@freescale.com>
- Add subpage write support
- Add onenand_oob_64/32 ecclayout
This has been missing and without it UBI has some incompatibilies issues
with the current (>= 2.6.27) Linux kernel version. vid_hdr_offset is
placed differently (2048 instead of 512) without this fix.
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Update OneNAND command to support bad block awareness.
Also change the OneNAND command style to better match the
NAND version.
Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
The version (ver_id) was not stored in the onenand_chip structure and
because of this the continuous locking scheme could be enabled on some
chips.
Signed-off-by: Stefan Roese <sr@denx.de>
This ensures that subsequent accesses properly hit the new window.
The dcbi during the NAND loop was accidentally working around this;
it's no longer necessary, as the cache is not enabled.
Reported-by: Suchit Lepcha <Suchit.Lepcha@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
MPC837XEMDS boards can support PCI-E via "PCI-E riser card". The card
provides two PCI-E (x2) ports. Though, only one port can be used in x2
mode. Two ports can function simultaneously in x1 mode.
PCI-E x1/x2 modes can be switched via "pex_x2" environment variable.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
This patch adds support for MPC83xx PCI-E controllers in Root Complex
mode.
The patch is based on Tony Li and Dave Liu work[1].
Though unlike the original patch, by default we don't register PCI-E
buses for use in U-Boot, we only configure the controllers for future
use in other OSes (Linux). This is done because we don't have enough
of spare BATs to map all the PCI-E regions.
To actually use PCI-E in U-Boot, users should explicitly define
CONFIG_83XX_GENERIC_PCIE_REGISTER_HOSES symbol in the board file. And
only then U-Boot will able to access PCI-E, but at the cost of disabled
address translation.
[1] http://lists.denx.de/pipermail/u-boot/2008-January/027630.html
Signed-off-by: Tony Li <tony.li@freescale.com>
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Acked-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
When running in PCI agent mode, the PCI_CLK_OUT signals are not used, so do
not enable them. See the MPC8349EA Reference Manual, Section 4.4.2
"Clocking in PCI Agent Mode".
Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
When running a system with 2 or more MPC8349EMDS boards in PCI agent mode,
the boards will lock up the PCI bus by scanning against each other.
The boards lock against each other by trying to access the PCI bus before
clearing their configuration lock bit. Both boards end up in a loop,
sending and receiving "Target Not Ready" messages forever.
When running in PCI agent mode, the scanning now takes place after the
boards have cleared their configuration lock bit.
Also, add a missing declaration to the mpc83xx.h header file, fixing a
build warning.
Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Currently there are in excess of 100 bytes located at the beginning of the image
built by start.S that are not being utilized. This patch moves a few functions
into this part of the image. This will create a greater number of *available*
bytes that can be used by board specific code in NAND builds and will decrease
the size of the assembled code in other builds.
Signed-off-by: Ron Madrid <ron_madrid@sbcglobal.net>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
The x86 based version of Darwin behaves the same quirky way as the powerpc
Darwin, so only check HOSTOS when setting up Darwin workarounds.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The code in fdt_resize() to extend the fdt size to end on a page boundary
is wrong for fdt's not located at an address aligned on a page boundary.
What's even worse, the code would make actualsize shrink rather than grow
if (blob & 0xfff) was bigger than the amount of padding added by ALIGN(),
causing fdt_add_mem_rsv to fail.
Fix it by aligning end address (blob + size) to a page boundary instead.
For aligned fdt's this is equivalent to what we had before.
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
lowlevel_init of SH was corrected to use the write/readXX macro.
However, there was a problem that was not able to be compiled partially.
This patch corrected this.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Parallel builds would occasionally issue this build warning:
ln: creating symbolic link `cpu/mpc824x/bedbug_603e.c': File exists
Use "ln -sf" as quick work around for the issue.
Signed-off-by: Wolfgang Denk <wd@denx.de>
This patch adds esd's loadpci BSP command to CPCI4052 and
CPCI405AB board. This requires CONFIG_CMD_BSP and CONFIG_PRAM.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch cleans up CPCI405 board support:
- wrap long lines
- unification of spaces in function calls
- remove dead code
Use correct io accessors on peripherals.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch turns on the auto RS485 mode in the 2nd external
uart on PLU405 boards. This is a special mode of the used
Exar XR16C2850 uart. Because these boards only have a 485 physical
layer connected it's a good idea to turn it on by default.
Signed-off-by: Matthias Fuchs <mf@esd.eu>
Signed-off-by: Stefan Roese <sr@denx.de>
- Move the TLB entry of PIXIS_BASE from TLB0 to TLB1[8], because in CAMP mode,
all the TLB0 entries will be invalidated after cpu1 brings up kernel, thus cpu0
can not access PIXIS_BASE anymore (any access will cause DataTLBError exception)
- Set CONFIG_SYS_DDR_TLB_START to 9 for MPC8572DS board.
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
So that we can locate the DDR tlb start entry to the value other than 8. By
default, it is still 8.
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
The IO port selection for MPC8544DS board:
Port cfg_io_ports
PCIE1 0x2, 0x3, 0x4, 0x5, 0x6, 0x7
PCIE2 0x4, 0x5, 0x6, 0x7
PCIE3 0x6, 0x7
This patch changes the PCIE12 and PCIE2 logic more readable.
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
PCIE2 and PCIE3 should be decided by corresponing bit in devdisr instead of
PCIE1 bit.
On MPC8572DS board, PCIE refers to PCIE1.
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
The IO port selection is not correct on MPC8572DS and MPC8544DS board.
This patch fixes this issue.
For MPC8572
Port cfg_io_ports
PCIE1 0x2, 0x3, 0x7, 0xb, 0xc, 0xf
PCIE2 0x3, 0x7
PCIE3 0x7
For MPC8544
Port cfg_io_ports
PCIE1 0x2, 0x3, 0x4, 0x5, 0x6, 0x7
PCIE2 0x4, 0x5, 0x6, 0x7
PCIE3 0x6, 0x7
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Rename _BASE to _BUS, as it's actually a PCI bus address,
separate virtual and physical addresses into _VIRT and _PHYS,
and use each appopriately. This makes the code easier to read
and understand, and facilitates mapping changes going forward.
Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Rename _BASE to _BUS, as it's actually a PCI bus address,
separate virtual and physical addresses into _VIRT and _PHYS,
and use each appopriately. This makes the code easier to read
and understand, and facilitates mapping changes going forward.
Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Many of the Blackfin board linker scripts are preprocessed, so make sure we
output the linker script into the build tree rather than the source tree.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Make sure all .text sections get pulled in and the entry point is properly
referenced so they don't get discarded when linking with --gc-sections.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
In order to boot an LDR out of parallel flash, the ldr utility needs a few
flags to tell it to generate the right header.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Currently MPC85xx and MPC86xx boards just calculate the localbus frequency
and print it out, but don't save it.
This changes where its calculated and stored to be more consistent with the
CPU, CCB, TB, and DDR frequencies and the MPC83xx localbus clock.
The localbus frequency is added to sysinfo and calculated when sysinfo is
set up, in cpu/mpc8[56]xx/speed.c, the same as the other frequencies are.
get_clocks() copies the frequency into the global data, as the other
frequencies are, into a new field that is only enabled for MPC85xx and
MPC86xx.
checkcpu() in cpu/mpc8[56]xx/cpu.c will print out the local bus frequency
from sysinfo, like the other frequencies, instead of calculating it on the
spot.
Signed-off-by: Trent Piepho <tpiepho@freescale.com>
Acked-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Jon Loeliger <jdl@freescale.com>
The clock divider for the MPC8568 local bus should be doubled, like the
other newer MPC85xx chips.
Since there are now more chips with a 2x divider than a 1x, and any new
85xx chips will probably be 2x, invert the sense of the #if so that it
lists the 1x chips instead of the 2x ones.
Signed-off-by: Trent Piepho <tpiepho@freescale.com>
Acked-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Jon Loeliger <jdl@freescale.com>
If one custom board is using the 8MB flash, it is set
as FLASH_BASE = 0xef000000, TEXT_BASE = 0xef780000.
The current start.S code will be broken at switch_as.
It is because the TLB1[15] is set as 16MB page size,
EPN = TEXT_BASE & 0xff000000, RPN = 0xff000000.
For the 8MB flash case, the EPN = 0xefxxxxxx,
RPN = 0xffxxxxxx. Assume the virt address of switch_as
is 0xef7ff18c, the real address of the instruction at
switch_as should be 0xff7ff18c. the 0xff7ff18c is out
of the range of the default 8MB boot LAW window
0xff800000 - 0xffffffff.
So when we switch to AS1 address space at switch_as,
the core can't fetch the instruction at switch_as any
more. It will cause broken issue.
Signed-off-by: Dave Liu <daveliu@freescale.com>
The values given for the PHY address were wrong, so the code
read no valid PHY ID, and fell through to the generic PHY
support, which would work on 1000M but would not auto negotiate
down to 100M or 10M.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
These interfaces don't have usable connectors on the board, so don't
bother enumerating or configuring them.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Assuming the OSes exception vectors start from the base of kernel address, and
the kernel physical starting address can be relocated to an non-zero address.
This patch enables the second core to have a valid IVPR for debugger before
kernel setting IVPR in CAMP mode. Otherwise, IVPR is 0x0 and it is not a valid
value for second core which runs kernel at different physical address other
than 0x0.
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
On newer CPUs, 8536, 8572, and 8610, the CLKDIV field of LCRR is five bits
instead of four.
In order to avoid an ifdef, LCRR_CLKDIV is set to 0x1f on all systems. It
should be safe as the fifth bit was defined as reserved and set to 0.
Code that was using a hard coded 0x0f is changed to use LCRR_CLKDIV.
Signed-off-by: Trent Piepho <tpiepho@freescale.com>
Acked-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Jon Loeliger <jdl@freescale.com>
Export the localbus frequency in the device tree, the same way the CPU, TB,
CCB, and various other frequencies are exported in their respective device
tree nodes.
Some localbus devices need this information to be programed correctly, so
it makes sense to export it along with the other frequencies.
Unfortunately, when someone wrote the localbus dts bindings, they didn't
bother to define what the "compatible" property should be. So it seems no
one was quite sure what to put in their dts files.
Based on current existing dts files in the kernel source, I've used
"fsl,pq3-localbus" and "fsl,elbc" for MPC85xx, which are used by almost all
of the 85xx devices, and are looked for by the Linux code. The eLBC is
apparently not entirely backward compatible with the pq3 LBC and so eLBC
equipped platforms like 8572 won't use pq3-localbus.
For MPC86xx, I've used "fsl,elbc" which is used by some of the 86xx systems
and is also looked for by the Linux code. On MPC8641, I've also used
"fsl,mpc8641-localbus" as it is also commonly used in dts files, some of
which don't use "fsl,elbc" or any other acceptable name to match on.
Signed-off-by: Trent Piepho <tpiepho@freescale.com>
Acked-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Jon Loeliger <jdl@freescale.com>
The current code that determines which bank/chipselect is used for a
given NAND instance only worked for 32-bit addresses and assumed
a 1:1 mapping. This breaks in 36-bit physical configs.
The proper way to handle this is to use the virt_to_phys() and
BR_PHYS_ADDR() routinues to match the 34-bit lbc bus address
with the the virtual address the NAND code uses.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Scott Wood <scottwood@freescale.com>
If we have addr map support enabled use the mapping functions to
implement virt_to_phys() and map_physmem().
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Initial support for Extreme Engineering Solutions XPedite5200 -
a MPC8548-based PMC single board computer.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Update X-ES Freescale boards to allow inbound PCI configuration
cycles when configured as agent/endpoint.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Initial support for Extreme Engineering Solutions XPedite5370 -
a MPC8572-based 3U VPX single board computer with a PMC/XMC
site.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Initial support for NXP's 4 and 8 bit I2C gpio expanders
(eg pca9537, pca9557, etc). The CONFIG_PCA953X define
enables support for the devices while the CONFIG_CMD_PCA953X
define enables the pca953x command. The CONFIG_CMD_PCA953X_INFO
define enables an 'info' sub-command which provides summary
information for the given pca953x device.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Add fsl_pci_config_unlock() function to enable a
PCI/PCIe interface configured in agent/endpoint mode to
respond to inbound PCI configuration cycles.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
The second definition introduced by 65e43a1063 conflicts with the
existing one.
Also, convert the existing definition to use phys_addr_t. The volatile
qualifier is still needed due to brain damage elsewhere.
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Apply changes from commit 44b4dbed to board/trab/memory.c, too.
Actually we'd need a major cleanup here - as it turns out,
board/trab/memory.c is more or less a verbatim copy of
post/drivers/memory.c ... but then, trab is EOL anyway,r
so this is not worth the effort.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Otherwise, recursion can occur if scan_bbt does not find a bad block
table, and tries to write one, and the attempt to erase the BBT area
causes a bad block check.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Include <linux/mtd/compat.h> header for min_t definition instead of
providing our own one. Removes warnings in case of OneNAND support
enabled.
Although I thinks it's a bit silly to include <linux/mtd/compat.h>
just for min_t...
Signed-off-by: Ilya Yanok <yanok@emcraft.com>
Acked-by: Stefan Roese <sr@denx.de>
Casting a pointer to a phys_addr_t when it's an unsigned long long
on a 32-bit system without first casting to a non-pointer type
generates a compiler warning. Fix this.
Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Parallel builds (using "make -jN") would occasionally fail with error
messages like
ppc_4xxFP-objdump: string.o: File format not recognized
or
post/libpost.a(cpu.o): In function `cpu_post_test':
/home/wd/git/u-boot/work/post/lib_ppc/cpu.c:130: undefined reference to `cpu_post_test_string'
or similar. We now make sure to run the 'postdeps" step before
attempting to build the specific POST libraries.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Parallel builds (using "make -jN") would occasionally fail with error
messages like
include/autoconf.mk:212: *** missing separator. Stop.
Line numbers and affected boards were changing. Obviously some
Makefiles included autoconf.mk while it was still being written to.
As a fix, we now write to a temporary file first and then rename it,
so that it is really ready to use as soon as it appears.
Signed-off-by: Wolfgang Denk <wd@denx.de>
The stmicro_wait_ready() func tries to show the actual opcode that was sent
to the device, but instead it displays the array pointer. Fix it to pull
out the opcode from the start of the array.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
If both CONFIG_ENV_SECT_SIZE and CONFIG_ENV_SIZE are defined, and the sect
size is larger than the env size, then it means the env is embedded in a
block. So we have to save/restore the part of the sector which is not the
environment. Previously, saving the environment in SPI flash in this
setup would probably brick the board as the rest of the sector tends to
contain actual U-Boot data/code.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Acked-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
All implementations of the functions i2c_reg_read() and
i2c_reg_write() are identical. We can save space and simplify the
code by converting these functions into inlines and putting them in
i2c.h.
Signed-off-by: Timur Tabi <timur@freescale.com>
Acked-By: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
- It is possible to miss flush/invalidate the last
cache line, we fix it at here.
- add the volatile and memory clobber.
They are pointed by Scott Wood.
Signed-off-by: Dave Liu <daveliu@freescale.com>
Add a library that helps in translating between virtual and physical
addresses. This library can be useful as a simple means to implement
map_physmem() and virt_to_phys() for platforms that need functionality
beyond the simple 1:1 mapping.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
virt_to_phys() returns the physical address given a virtual. In most
cases this will be just the input value as the vast majority of
systems run in a 1:1 mode.
However in systems that are not running this way it should report the
physical address or ~0 if no mapping exists for the given virtual
address.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This warning is issued by modern ARM-EABI GCC on non-thumb targets.
Signed-off-by: Vladimir Panfilov <pvr@emcraft.com>
Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
FDT support is used for both FIT style images and for architectures
that can pass a fdt blob to an OS (ppc, m68k, sparc).
For other architectures and boards which do not pass a fdt blob to an
OS but want to use the new uImage format, we just need FIT support.
Now we can have the 4 following configurations :
1) FIT only CONFIG_FIT
2) fdt blob only CONFIG_OF_LIBFDT
3) both CONFIG_OF_LIBFDT & CONFIG_FIT
4) none none
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
This patch now adds a flush to the data cache upon relocation. The
current implementation is missing this. Only a comment states that it
should be done. So let's really do it now.
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
This patch adds the CONFIG_SKIP_LOWLEVEL_INIT option to start.S. This
enables support for boards where the lowlevel initialization is
already done when U-Boot runs (e.g. via OnChip ROM).
This will be used in the upcoming VCTH board support.
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
This patch adds the board_early_init_f() call to the MIPS init
sequence. A weak dummy implementation is also added which can be
overridden by a board specific version.
This will be used by the upcoming VCTH board support.
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
This patch adds a call to onenand_init() for OneNAND support and moves
the nand_init() call to an earlier place, so that the environment can
be used from NAND and OneNAND.
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
SH4 is different a value of CACHE_OC_NUM_ENTRIES and
CACHE_OC_WAY_SHIFT every CPU.
This patch corrects these values.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
The address of SCFSR register is wrong at SH7720/SH7721.
This patch fix this.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
With this patch we set the type back to NONE upon failing UBI partition
initialization. Otherwise further calls to the UBI subsystem would try
to really access the non-existing UBI partition.
Thanks to Michael Lawnick for pointing this out.
Signed-off-by: Stefan Roese <sr@denx.de>
---
Microblaze platforms use generic settings and to have
many platforms is confusing that's why I decided to remove this
platform from U-BOOT. ml401 tree is sufficient for covering
all Microblaze platforms.
This change will go through microblaze custodian tree.
While the doc/README.NetConsole does have a snippet for people to
create their own netcat script, it's a lot easier to make a simple
dedicated script and tell people to use it.
Also spruce it up a bit to make it user friendly.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The FAT file system driver should also handle FAT on SATA devices.
Signed-off-by: Sonic Zhang <Sonic.Zhang@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Compiling U-Boot in an old OS environment (RedHat-7.3 :-) gives the
following warnings from FDT:
include/libfdt_env.h:50: warning: redefinition of 'uintptr_t'
/usr/include/stdint.h:129: warning: 'uintptr_t' previously declared here
Fix: Protect the definition of uintptr_t when compiling on the host
system.
Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
As we moved data_crc() invocation from jffs2_1pass_build_lists() to
jffs2_1pass_read_inode() data_crc is going to be calculated on each
inode access. This patch adds caching of data_crc() results. There
is no significant improvement in speed (because of flash access
caching added in previous patch I think, crc in RAM is really fast)
but this patch impacts memory usage -- every b_node structure uses
12 bytes instead of 8.
Signed-off-by: Alexey Neyman <avn@emcraft.com>
Signed-off-by: Ilya Yanok <yanok@emcraft.com>
This patch adds support for reading fs information from summary
node instead of scanning full eraseblock.
Signed-off-by: Ilya Yanok <yanok@emcraft.com>
With this patch JFFS2 code allocates memory buffer of max_totlen size
(size of the largest node, calculated during scan time) and uses it to
store entire node. Speeds up loading. If malloc fails we use old ways
to do things.
Signed-off-by: Alexey Neyman <avn@emcraft.com>
Signed-off-by: Ilya Yanok <yanok@emcraft.com>
Rewrites jffs2_1pass_build_lists() function in style of Linux's
jffs2_scan_medium() and jffs2_scan_eraseblock().
This includes:
- Caching flash acceses
- Smart dealing with free space
Signed-off-by: Alexey Neyman <avn@emcraft.com>
Signed-off-by: Ilya Yanok <yanok@emcraft.com>
We need to update i_version inside cycle to find really latest version
inside jffs2_1pass_list_inodes(). With that fixed we can use isize inside
dump_inode() instead of calling expensive jffs2_1pass_read_inode().
Signed-off-by: Alexey Neyman <avn@emcraft.com>
Signed-off-by: Ilya Yanok <yanok@emcraft.com>
Hi,
I found a bug when working with the u-boot USB subsystem on IXP425 processor
(big endian Xscale aka ARMv5).
I recognized that the second usb_endpoint_descriptor of the attached memory
stick was corrupted.
The reason for this are the packed structures below (either u-boot and
u-boot-usb):
--------------
/* Endpoint descriptor */
struct usb_endpoint_descriptor {
unsigned char bLength;
unsigned char bDescriptorType;
unsigned char bEndpointAddress;
unsigned char bmAttributes;
unsigned short wMaxPacketSize;
unsigned char bInterval;
unsigned char bRefresh;
unsigned char bSynchAddress;
} __attribute__ ((packed));
/* Interface descriptor */
struct usb_interface_descriptor {
unsigned char bLength;
unsigned char bDescriptorType;
unsigned char bInterfaceNumber;
unsigned char bAlternateSetting;
unsigned char bNumEndpoints;
unsigned char bInterfaceClass;
unsigned char bInterfaceSubClass;
unsigned char bInterfaceProtocol;
unsigned char iInterface;
unsigned char no_of_ep;
unsigned char num_altsetting;
unsigned char act_altsetting;
struct usb_endpoint_descriptor ep_desc[USB_MAXENDPOINTS];
} __attribute__ ((packed));
------------
As usb_endpoint_descriptor is only 7byte in length, the start of all
odd ep_desc[] structures is not word aligned. This makes wMaxPacketSize
of these structures also not word aligned.
ARMv5 Architecture however does not support non-aligned multibyte
data type (see A2.8 of ARM Architecture Reference Manual).
Signed-off-by: Stefan Althoefer <stefan.althoefer@web.de>
Signed-off-by: Remy Böhmer <linux@bohmer.net>
fsl_pci_init.c: In function 'fsl_pci_setup_inbound_windows':
fsl_pci_init.c:122: warning: comparison is always true due to limited range of data type
The check only makes sense if we are CONFIG_PHYS_64BIT
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Since commit 561858ee building for FADS823 and RRvision
doesn't work. Let's include version.h and timestamp.h
unconditionally to fix the problem.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
With this patch now, the user can call "ubi part" multiple times to
re-connect the UBI device to another MTD partition.
Signed-off-by: Stefan Roese <sr@denx.de>
Don't use LIST_HEAD() but initialize the struct via INIT_LIST_HEAD() upon
first call of add_mtd_partitions(). Otherwise this won't work on platforms
where the relocation is broken (like MIPS or PPC).
Signed-off-by: Stefan Roese <sr@denx.de>
Add logic to the MAKEALL script to determine the number of CPU cores
on the system, and run a parallel build if there is more than one.
Usually this significantrly accelerates builds.
Allow to manually adjust the number of parallel make jobs by using
the "BUILD_NCPUS" environment variable.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Some Make script commands rely on bash-specific features like brace
expansion, so default to bash for the SHELL variable with a fallback
to the standard sh shell
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
rename devices_init () in common/jffs2.c to
jffs2_devices_init (), because there is also a
devices_init () in common/devices.c.
Signed-off-by: Heiko Schocher <hs@denx.de>
Modifications to support console multiplexing. This is controlled using
CONFIG_SYS_CONSOLE_MUX in the board configuration file.
This allows a user to specify multiple console devices in the environment
with a command like this: setenv stdin serial,nc. As a result, the user can
enter text on both the serial and netconsole interfaces.
All devices - stdin, stdout and stderr - can be set in this manner.
1) common/iomux.c and include/iomux.h contain the environment setting
implementation.
2) doc/README.iomux contains a somewhat more detailed description.
3) The implementation in (1) is called from common/cmd_nvedit.c to
handle setenv and from common/console.c to handle initialization of
input/output devices at boot time.
4) common/console.c also contains the code needed to poll multiple console
devices for input and send output to all devices registered for output.
5) include/common.h includes iomux.h and common/Makefile generates iomux.o
when CONFIG_SYS_CONSOLE_MUX is set.
Signed-off-by: Gary Jennejohn <garyj@denx.de>
When running `strings` on really long strings, the stack tends to get
smashed due to printf(). Switch to puts() instead since we're only passing
the data through.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
- fix size too small by one in sprintf
- changed old (pre 2004) device name ibmEmac to emac
- boot device may be overriden in board config
- servername may be defined in board config
- additional parameters may be defined in board config
- fixed some line wrappings
- replaced redundant MAX define by max
Signed-off-by: Niklaus Giger <niklaus.giger@member.fsf.org>
Currently the arm926ejs tree has the armv4 option set during compilation.
This flag does not belong here because a arm926 CPU is always a armv5 CPU.
Signed-off-by: Remy Bohmer <linux@bohmer.net>
This patch adds the possiblity to choose the media where the environment will
be located. This allow to choose this fundamental configuration without editing
config files.
Documentation file added.
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Stelian Pop <stelian@popies.net>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Commit 6b59e03e02
lcd: Let the board code show board-specific info
introduced some bugs which prevent U-Boot building
for lwmon board if CONFIG_LCD_INFO_BELOW_LOGO will
be defined in the board configuration.
Also "LCD enabled" building for TQM823L doesn't work
since this commit.
This patch fixes above-mentioned issues.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
The TftpStart() function modifies the 'BootFile'
string when 'BootFile' contains both an IP address
and filename (eg 1.2.3.4:/path/file). This causes
subsequent calls to TftpStart to incorrectly parse
the TFTP filename and server IP address to use.
For example:
=> tftp 0x100000 10.52.0.62:/home/ptyser/non_existant
Speed: 100, half duplex
Using eTSEC1 device
TFTP from server 10.52.0.62; our IP address is 10.52.253.79
^^^^^^^^^^ CORRECT
Filename '/home/ptyser/non_existant'.
^^^^^^^^^^^^^^^^^^^^^^^^^ CORRECT
Load address: 0x100000
Loading: *
TFTP error: 'File not found' (1)
Starting again
eTSEC2: No link.
Speed: 100, half duplex
Using eTSEC1 device
TFTP from server 10.52.0.33; our IP address is 10.52.253.79
^^^^^^^^^^ WRONG
Filename '10.52.0.62'.
^^^^^^^^^^ WRONG
Load address: 0x100000
Loading: *
TFTP error: 'File not found' (1)
Starting again
TftpStart() was modified to not modify the 'BootFile' string.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Ignore IP packets which have the "more fragments" flag bit
set. This flag indicates the IP packet is fragmented and
must be ignored by U-Boot.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
This patch tries to ensure that phy interrupt pin
won't be asserted after booting. We experienced
following issues with current 88E1121R phy init:
Marvell 88E1121R phy can be hardware-configured
to share MDC/MDIO and interrupt pins for both ports
P0 and P1 (e.g. as configured on socrates board).
Port 0 interrupt pin will be shared by both ports
in such configuration. After booting Linux and
configuring eth0 interface, port 0 phy interrupts
are enabled. After rebooting without proper eth0
interface shutdown port 0 phy interrupts remain
enabled so any change on port 0 (link status, etc.)
cause assertion of the interrupt. Now booting Linux
and configuring eth1 interface will cause permanent
phy interrupt storm as the registered phy 1 interrupt
handler doesn't acknowledge phy 0 interrupts. This
of course should be fixed in Linux driver too.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Acked-by: Andy Fleming <afleming@freescale.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
When CONFIG_SYS_HUSH_PARSER is defined network download
commands with 1 argument in the format 'tftp "/path/file"'
do not work as expected. The hush command parser strips
the quotes from "/path/file" which causes the network
commands to interpret "/path/file" as an address
instead of the intended filename.
The previous check for a leading quote in netboot_common()
was replaced with a check which ensures only valid
numbers are treated as addresses.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
This code contains some non-ascii characters in comment lines and code.
Most editors do not display those characters properly and editing those
files results always in diffs at these places which are usually not required
to be changed at all. This is error prone.
So, remove those weird characters and replace them by normal C-style
equivalents for which the proper defines were already in the header.
Signed-off-by: Remy Bohmer <linux@bohmer.net>
The default DDR freq is 400MHz or 800M data rate,
the old settings is pure wrong for the default case.
Signed-off-by: Dave Liu <daveliu@freescale.com>
Acked-by: Andy Fleming <afleming@freescale.com>
Moved up the initialization of GD so C code like set_tlb() can use
gd->flags to determine if we've relocated or not in the future.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Andy Fleming <afleming@freescale.com>
If the virtual address for CCSRBAR is the same after relocation but
the physical address is changing we'd end up having two TLB entries with
the same VA. Instead we new us the new CCSRBAR virt address + 4k as a
temp virt address to access the old CCSRBAR to relocate it.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Andy Fleming <afleming@freescale.com>
The BR_PHYS_ADDR macro is useful on all machines that have local bus
which is pretty much all 83xx/85xx/86xx chips.
Additionally most 85xx & 86xx will need it if they want to support
36-bit physical addresses.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Andy Fleming <afleming@freescale.com>
Add define used to determine if PCI1 interface is in PCI or PCIX mode.
Convert users of the old PORDEVSR_PCI constant to use MPC85xx_PORDEVSR_PCI1
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
The current code will cause the creation of a 4GB window
starting at 0 if we have more than 4GB of RAM installed,
which overlaps with PCI_MEM space and causes pci_bus_to_phys()
to return erroneous information. Limit the size to 4GB - 1;
which causes the code to create one 2GB and one 1GB window
instead.
Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Andy Fleming <afleming@freescale.com>
Prevent further viral propogation of the unused
symbol CONFIG_L1_INIT_RAM by just removing it.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Acked-by: Andy Fleming <afleming@freescale.com>
since commit be0bd8234b
tlb entry for socrates DDR SDRAM will be reconfigured
by setup_ddr_tlbs() from initdram() causing an
inconsistency with previously configured DDR SDRAM tlb
entry from tlb_table:
socrates>l2cam 7 9
IDX PID EPN SIZE V TS RPN U0-U3 WIMGE UUUSSS
7 : 00 00000000 256MB V 0 -> 0_00000000 0000 -I-G- ---RWX
8 : 00 00000000 256MB V 0 -> 0_00000000 0000 ----- ---RWX
9 : 00 10000000 256MB V 0 -> 0_10000000 0000 ----- ---RWX
This patch makes the presence of the DDR SDRAM tlb entry in
the tlb_table dependent on CONFIG_SPD_EEPROM to avoid this
inconsistency.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Acked-by: Andy Fleming <afleming@freescale.com>
All mpc8548-based boards should implement the suggested workaround
to CPU 2 errata. Without the workaround, its possible for the
8548's core to hang while executing a msync or mbar 0 instruction
and a snoopable transaction from an I/O master tagged to make
quick forward progress is present.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Acked-by: Andy Fleming <afleming@freescale.com>
The DDR controller of 8548/8544/8568/8572/8536 processors
have the ECC data init feature, and the new DDR code is
using the feature, and we don't need the way with DMA to
init memory any more.
Signed-off-by: Dave Liu <daveliu@freescale.com>
Acked-by: Andy Fleming <afleming@freescale.com>
This patch fix the problem that only the [NB_DATAFLASH_AREA - 1] dataflash
partition can be defined to use the area to the end of dataflash size.
Now it is possible to have only one dataflash partition from 0 to the end
of of dataflash size.
Signed-off-by: Ilko Iliev <iliev@ronetix.at>
Without this patch "saveenv" crashes when MTD partitions are enabled (e.g.
for use in UBI) via CONFIG_MTD_PARTITIONS.
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Introducing 64-bit (36-bit) support for the MPC8641HPCN
failed to accomodate the other two 86xx boards.
Introduce definitions for CONFIG_SYS_CCSRBAR_PHYS_{LOW,HIGH}
CONFIG_SYS_CCSR_DEFAULT_DBAT{U,L} and CONFIG_SYS_CCSR_DEFAULT_IBAT{U,L}
with nominal 32-bit values.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Acked-by: Becky Bruce <becky.bruce@freescale.com>
This caused the operation to be needlessly repeated if there were
no bad blocks and no errors.
Signed-off-by: Valeriy Glushkov <gvv@lstec.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
This BSP should be outside u-boot source tree.
The second reason is that xilinx ppc405 was moved to generic platform.
Signed-off-by: Michal Simek <monstr@monstr.eu>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch disables some unused features from the PCI405 configuration
to keep U-Boot image size below 192k.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch extracts the identical config options for the
keymile boards mgcoge, mgsuvd and kmeter1 in a new
common config file keymile-common.h.
Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Check the presence of the PIGGY on the keymile boards mgcoge,
mgsuvd and kmeter1. If the PIGGY is not present, dont register
this Ethernet device.
Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
This patch fix the broken boot from NOR Flash on AT91RM9200 boards, if
CONFIG_AT91RM9200 is defined and nor preloader is used.
Signed-off-by: Jens Scharsig <esw@bus-elektronik.de>
Remove a printf() from add_mtd_device(), which produces spurious output.
Signed-off-by: Piotr Ziecik <kosmo@semihalf.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Add cfi-mtd driver, which exports CFI flash to MTD layer.
This allows CFI flash devices to be used from MTD layer.
Building of the new driver is controlled by CONFIG_FLASH_CFI_MTD
option. Initialization is done by calling cfi_mtd_init() from
flash_init().
Signed-off-by: Piotr Ziecik <kosmo@semihalf.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Add interface for flash verbosity control. It allows
to disable output from low-level flash API. It is useful
when calling these low-level functions from context other
than flash commands (for example the MTD/CFI interface
implmentation).
Signed-off-by: Piotr Ziecik <kosmo@semihalf.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Export flash_sector_size() function from drivers/mtd/cfi_flash.c,
so that it can be used in the upcoming cfi-mtd driver.
Signed-off-by: Piotr Ziecik <kosmo@semihalf.com>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch defines all flash access functions as weak so that
they can be overridden by board specific versions.
This will be used by the upcoming VCTH board support where the NOR
FLASH unfortunately can't be accessed memory-mapped. Special
accessor functions are needed here.
To enable this weak functions you need to define
CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS in your board config header.
Otherwise the "old" default functions will be used resulting
in smaller code.
Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Currently the size parameters of the UBI commands (e.g. "ubi write") are
decoded as decimal instead of hex as default. This patch now interprets
all these values consistantly as hex, as all other standard U-Boot commands
do.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch enables support for EXT2, and increases the
CONFIG_SYS_BOOTMAPSZ size for the default configuration
of the katmai boards to use them as the RAID-reference
AMCC setups.
EXT2 enabling allows one to boot kernels from the EXT2
formatted Compact Flash cards.
CONFIG_SYS_BOOTMAPSZ increasing allows one to boot the
Linux kernels, which use PAGE_SIZE of 256KB. Otherwise,
the memory area with DTB file (which is placed at the
end of the bootmap area) will turn out to be overlapped
with the BSS segment of the 256KB kernel, and zeroed
in early_init() of Linux.
Actually, increasing of the bootmap size could be done
via setting of the bootm_size U-Boot variable, but it looks
like the current U-Boot implementation have some bootm_size-
related functionality lost. In many places through the U-Boot
code the CONFIG_SYS_BOOTMAPSZ definition is used directly
(instead of trying to read the corresponding value from the
environment). The same is truth for the boot_jump_linux()
function in lib_ppc/bootm.c, where U-Boot transfers control
to Linux passing the CONFIG_SYS_BOOTMAPSZ (not bootm_size)
value to the booting kernel.
Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
Signed-off-by: Ilya Yanok <yanok@emcraft.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Expanded OCM TLB to allow access to 64K OCM as well as 256K of
internal SRAM.
Adjusted internal SRAM initialization to match updated user
manual recommendation.
OCM & ISRAM are now mapped as follows:
physical virtual size
ISRAM 0x4_0000_0000 0xE300_0000 256k
OCM 0x4_0004_0000 0xE304_0000 64k
A single TLB was used for this mapping.
Signed-off-by: Dave Mitchell <dmitch71@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Added include/asm-ppc/ppc4xx-isram.h and moved internal SRAM and
L2 cache DCRs from ppc440.h to this new header.
Also converted these DCR defines from lowercase to uppercase and
modified referencing modules to use them.
Signed-off-by: Dave Mitchell <dmitch71@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
The definitions of bits in SDR_CFG are incorrect, and not used within
U-Boot. Therefore, they can be removed.
The naming of the sdr_ddrdl/sdr_cfg registers do not follow conventions,
and are unused, so they can be removed too.
A definition for SDR0_DDRCFG is added.
Signed-off-by: Steven A. Falco <sfalco@harris.com>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch corrects a small bug in the "if" condition:
the parameter "flag" is 0 and the "if" condition is always true.
The result is - the boom command doesn't start the kernel.
Affected targets: all arm based.
Signed-off-by: Ilko Iliev <iliev@ronetix.at>
At least some (old ?) versions of the AT91Bootstrap do not set up the
PLLB correctly to 48 MHz in order to make USB host function correctly.
This patch sets up the PLLB to the same values Linux uses, and makes USB
work ok on the following CPUs:
- AT91CAP9
- AT91SAM9260
- AT91SAM9263
This patch also defines CONFIG_USB_STORAGE and CONFIG_CMD_FAT for all
the relevant AT91CAP9/AT91SAM9 atmel boards.
Signed-off-by: Stelian Pop <stelian@popies.net>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Introduce AT91_CPU_CLOCK and use it for displaying the CPU
speed in the LCD driver.
Also make AT91_MAIN_CLOCK and AT91_MASTER_CLOCK reflect the
corresponding board clocks.
Signed-off-by: Stelian Pop <stelian@popies.net>
This patch adds support for the kmeter1 board from Keymile,
based on a Freescale MPC8360 CPU.
- serial console on UART 1
- 256 MB DDR2 RAM
- 64 MB NOR Flash
- Ethernet RMII Mode over UCC4
- PHY SMSC LAN8700
Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
This is needed on Canyonlands which still has an exception pending
while running relocate_code(). This leads to a failure after trap_init()
is moved to the top of board_init_r().
Signed-off-by: Stefan Roese <sr@denx.de>
modify the CAS timings. my understanding is that these
settings decrease various wait times in the DDR interface.
Because these wait times are in clock cycles, and the DDR
clock on the 8315 RDB runs slower than on some other 83xx
platforms, we can dial down these values without a problem,
thereby decreasing the latency of memory a little.
Signed-off-by: Howard Gregory <Greg.Howard@freescale.com>
Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
To enable UBI on Apollon you need to uncomment the CONFIG_SYS_USE_UBI
macro.
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds these UBI commands:
ubi part [nand|onenand] [part] - Show or set current partition
ubi info [l[ayout]] -Display volume and UBI layout information
ubi create[vol] volume [size] [type] - Create volume name with size
ubi write[vol] address volume size - Write volume from address with size
ubi read[vol] address volume [size] - Read volume to address with size
ubi remove[vol] volume - Remove volume
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds basic UBI (Unsorted Block Image) support to U-Boot.
It's based on the Linux UBI version and basically has a "OS"
translation wrapper that defines most Linux specific calls
(spin_lock() etc.) into no-ops. Some source code parts have been
uncommented by "#ifdef UBI_LINUX". This makes it easier to compare
this version with the Linux version and simplifies future UBI
ports/bug-fixes from the Linux version.
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds basic UBI (Unsorted Block Image) support to U-Boot.
It's based on the Linux UBI version and basically has a "OS"
translation wrapper that defines most Linux specific calls
(spin_lock() etc.) into no-ops. Some source code parts have been
uncommented by "#ifdef UBI_LINUX". This makes it easier to compare
this version with the Linux version and simplifies future UBI
ports/bug-fixes from the Linux version.
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds basic UBI (Unsorted Block Image) support to U-Boot.
It's based on the Linux UBI version and basically has a "OS"
translation wrapper that defines most Linux specific calls
(spin_lock() etc.) into no-ops. Some source code parts have been
uncommented by "#ifdef UBI_LINUX". This makes it easier to compare
this version with the Linux version and simplifies future UBI
ports/bug-fixes from the Linux version.
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds basic UBI (Unsorted Block Image) support to U-Boot.
It's based on the Linux UBI version and basically has a "OS"
translation wrapper that defines most Linux specific calls
(spin_lock() etc.) into no-ops. Some source code parts have been
uncommented by "#ifdef UBI_LINUX". This makes it easier to compare
this version with the Linux version and simplifies future UBI
ports/bug-fixes from the Linux version.
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds basic UBI (Unsorted Block Image) support to U-Boot.
It's based on the Linux UBI version and basically has a "OS"
translation wrapper that defines most Linux specific calls
(spin_lock() etc.) into no-ops. Some source code parts have been
uncommented by "#ifdef UBI_LINUX". This makes it easier to compare
this version with the Linux version and simplifies future UBI
ports/bug-fixes from the Linux version.
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds basic UBI (Unsorted Block Image) support to U-Boot.
It's based on the Linux UBI version and basically has a "OS"
translation wrapper that defines most Linux specific calls
(spin_lock() etc.) into no-ops. Some source code parts have been
uncommented by "#ifdef UBI_LINUX". This makes it easier to compare
this version with the Linux version and simplifies future UBI
ports/bug-fixes from the Linux version.
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds basic UBI (Unsorted Block Image) support to U-Boot.
It's based on the Linux UBI version and basically has a "OS"
translation wrapper that defines most Linux specific calls
(spin_lock() etc.) into no-ops. Some source code parts have been
uncommented by "#ifdef UBI_LINUX". This makes it easier to compare
this version with the Linux version and simplifies future UBI
ports/bug-fixes from the Linux version.
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds basic UBI (Unsorted Block Image) support to U-Boot.
It's based on the Linux UBI version and basically has a "OS"
translation wrapper that defines most Linux specific calls
(spin_lock() etc.) into no-ops. Some source code parts have been
uncommented by "#ifdef UBI_LINUX". This makes it easier to compare
this version with the Linux version and simplifies future UBI
ports/bug-fixes from the Linux version.
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Stefan Roese <sr@denx.de>
This MTD part infrastructure will be used by the upcoming
UBI support.
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Most of the bss initialization loop increments 4 bytes
at a time. And the loop end is checked for an 'equal'
condition. Make the bss end address aligned by 4, so
that the loop will end as expected.
Signed-off-by: Selvamuthukumar <selva.muthukumar@e-coninfotech.com>
Signed-off-by: Wolfgang Denk <wd@denx.de>
address-cells defaults to 2, not 1; so in the unlikely
event that it isn't specified, this patch is required
for correct operation.
Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
Doing trap_init immediately once we're running from RAM
means we're no longer dependent on the physical location of
the flash on non-BookE platforms. Before trap_init, those
platforms switch to real mode and go to 0xfff00100 on exception.
After the switch, they go to 0x00000100 This makes it easier to
move the flash location.
Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
Since we've changed the memory map of the board, be nice and
add some checking to try to catch out-of-date .dts files. We do
this by checking the CCSRBAR location in the .dts and comparing
it to the CCSRBAR location in u-boot. If they don't match, a
warning msg is printed. This isn't foolproof, but it's simple and
will catch most of the cases where an out-of-date .dts is present,
including all of the cases where a new u-boot is used with an old
standard MPC8641 .dts file as supplied with Linux.
Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
This patch creates a memory map with all the devices
in 36-bit physical space, in addition to the 32-bit map.
The CCSR relocation is moved (again, sorry) to
allow for the physical address to be 36 bits - this
requires translation to be enabled. With 36-bit physical
addressing enabled, we are no longer running with VA=PA
translations. This means we have to distinguish between
the two in the config file. The existing region name is
used to indicate the virtual address, and a _PHYS variety
is created to represent the physical address.
Large physical addressing is not enabled by default.
Set CONFIG_PHYS_64BIT in the config file to turn this on.
Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
The memory map on the 8641hpcn is modified to look more like
the 85xx boards; this is a step towards a more standardized
layout going forward. As part of this change, we now relocate
the flash.
The regions for some of the mappings were far larger than they
needed to be. I have reduced the mappings to match the
actual sizes supported by the hardware.
In addition I have removed the comments at the head
of the BAT blocks in the config file, rather than updating
them. These get horribly out of date, and it's a simple
matter to look at the defines to see what they are set to
since everything is right here in the same file.
Documentation has been changed to reflect the new map, as this
change is user visible, and affects the OS which runs post-uboot.
Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
We define CONFIG_MONITOR_BASE_EARLY to define the initial location
of the bootpage in flash. Use this to create an early mapping
definition for the FLASH, and change the early_bats code to use this.
This change facilitates the relocation of the flash since the early
mappings are no longer tied to the final location of the flash.
Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
Using a mtmsr/blr means that you have to be executing at the
same virtual address once you enable translation. This is
unnecessarily restrictive, and is not really how this is
usually done. Change it to use the more common mtspr SRR0/SRR1
and rfi method.
Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
There's a lot of setup and foo for the second flash
bank. The problem is, this board doesn't actually have one.
Clean this up. Also, the flash is 8M in size. Get rid
of the confusing aliased overmapping, and just map 8M.
Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
It's currently defined twice inside in an if/else block, but
both halves set the same value. Move the define outside
the if.
Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
In order to later allow for a physical relocation of the
flash, setup_bats, which sets up the final BAT mapping
for the board, needs to happen *after* init_laws().
Otherwise, there will be no window programmed for the flash
at the new physical location at the point when we change
the mmu translation.
Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
Copied over the fixed PHY driver as used in pp4xx/4xx_enet.c.
This adds support for PHY-less MAC connections to the UEC.
Signed-off-by: Richard Retanubun <RichardRetanubun@RuggedCom.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Also changed path in all linker scripts that reference this driver
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Acked-by: Stefan Roese <sr@denx.de>
All in-tree IBM/AMCC PPC4xx boards using the EMAC get this new CONFIG
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Acked-by: Stefan Roese <sr@denx.de>
Affected boards:
Several MPC8xx boards
Several MPC8260/MPC8272 boards
Several MPC85xx boards
Removed initialization of the driver from net/eth.c
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
This patch will move au1x00_eth_initialize from net/eth.c to cpu_eth_init
as a part of ongoing eth_initialize cleanup work. The function ret value
is also fixed as it should be negative on fail.
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Patch to fix buffer allocation size and alignment. Buffer needs to be u32 aligned and
PKTSIZE_ALIGN bytes long.
Acked-by: Michal Simek <monstr@monstr.eu>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
The current uec_miiphy_read and uec_miiphy_write hardcode access devlist[0]
This patch makes these function use the devname argument that is passed in to
allow access to the phy registers of other devices in devlist[].
Signed-of-by: Richard Retanubun <RichardRetanubun@RugggedCom.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
AT91_BASE_EMAC is never used outside the board specific files,
so replace its usage by the board specific AT91xxx_BASE_EMAC.
Signed-off-by: Stelian Pop <stelian@popies.net>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
AT91_ID_US0 / AT91_ID_US1 / AT91_ID_US2 were used but never defined.
Since they are never used outside the board specific files, they can
be replaced by the board specific AT91xxx_ID_US0 / AT91xxx_ID_US1 /
AT91xxx_ID_US2.
Bug spotted by Jesus Alvarez <jalvarez@micromint.com>.
Signed-off-by: Stelian Pop <stelian@popies.net>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
This patch provides support for AFEB9260 board, a product of
OpenSource hardware and software. Some commertial projects
are made with this design. A board is basically AT91SAM9260-EK
with some modifications and different peripherals and different
parts used. Main purpose of this project is to gain experience in
hardware design.
More info: http://groups.google.com/group/arm9fpga-evolution-board
(In Russian only, sorry).
Subversion repository: svn://194.85.238.22/home/users/george/svn/arm9eb
Signed-off-by: Sergey Lapin <slapin@ossfans.org>
OMAP identification is implemented in 'cpuinfo.c' and located in ARM926EJ-S directory.
It makes sense to place this file in OMAP specific subdirectory, i.e. cpu/arm926ejs/omap
Signed-off-by: Roman Mashak <romez777@gmail.com>
We put the bootpg for the secondary cpus into memory and use
BPTR to get to it. This is a step towards converting to the
ePAPR boot methodology. Also, the code is written to
deal properly with more than 4GB of RAM.
Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
There are several items in the config file that were hardcoded
but that should really be based on other config options, since
the regions are contiguous and depend on being so. This cleans
that up a bit. Also, add BR_PHYS_ADDR() macro to convert
addresses into the proper format for BR registers.
Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
Currently, the CCSR gets relocated while translation is
enabled, meaning we need 2 BAT translations to get to both the
old location and the new location. Also, the DEFAULT
CCSR location has a dependency on the BAT that maps the
FLASH region. Moving the relocation removes this unnecessary
dependency. This makes it easier and more intutive to
modify the board's memory map.
Swap BATs 3 and 4 on 8610 so that all 86xx boards use the same
BAT for CCSR space.
Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
You can't actually have both, and with some coming changes to
change the memory map for the board and support 36-bit physical,
we need the extra BAT that is being consumed by having both.
I also make non-PCI configs build cleanly, for the sake of sanity.
Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
Fix compilation issue caused by a few mismatches.
Provide proper nand chip select enable/disable in
nand_hwcontrol() rather than in board_nand_init()
just enable once. Remove redundant local nand driver
functions - nand_read_byte(), nand_write_byte() and
nand_dev_ready() to use common nand driver.
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
The error was caused by the change for strmhz() in cpu.c.
A few of them were one extra close parenthesis.
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
Will use mcfmii.c driver in drivers/net rather than
keep creating new mii.c for each future platform.
Remove EB+MCF-EV123, cobra5272, idmr, M5235EVB,
M5271EVB, M5272C3, M5275EVB, M5282EVB, M5329EVB,
M5373EVB, M54451EVB, M54455EVB, M547xEVB, and M548xEVB's
mii.c
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
Consolidate ATA, ePORT, QSPI, FlexCan, PWM, RNG,
MDHA, SKHA, INTC, and FlexBus structures and
definitions in immap_5xxx.h to more unify modules
header files. Append DSPI support for m547x_8x.
SSI cleanup. Remove USB Host structure from immap_539.h.
Apply changes to use FlexBus structures in mcf52x2's
cpu_init.c and platform configuration files.
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
Each different build for M54455EVB and M5235EVB will
create a u-boot.lds linker file. It is redundant to
keep the u-boot.lds
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
This removes in nand.h code that is verbatim duplicated from bbm.h,
including directly bbm.h in nand.h. The previous state of affairs
prevented compiling code for a board hosting both NAND and OneNAND chips.
Reported-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Alessandro Rubini <rubini@unipv.it>
Signed-off-by: Scott Wood <scottwood@freescale.com>
This patch defines 1M TLB&LAW size for NAND on MPC8536DS, assigns 0xffa00000
for CONFIG_SYS_NAND_BASE and adds other NAND supports in config file.
It also moves environment(CONFIG_ENV_ADDR) outside of u-boot image.
Singed-off-by: Jason Jin <Jason.Jin@freescale.com>
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This patch fixes a problem on systems where the NOR flash is attached
to a 64 bit bus. The toggle bit detection in flash_toggle() is based
on the assumption that the same flash address is read twice without
any other interjacent flash accesses. However, on 32 bit systems the
function flash_read64() [as currently implemented] does not perform
an atomic 64 bit read - instead, this is broken down into two 32 bit
read accesses on addresses "addr" and "addr + 4". So instead of
reading a 64 bit value twice from "addr", we see a sequence of 4 32
bit reads from "addr", "addr + 4", "addr", and "addr + 4". The
consequence is that flash_toggle() fails to work.
This patch implements a simple, but somewhat ugly solution, as it
avoids the use of flash_read64() in this critical place (by breaking
it down manually into 32 bit read operations) instead of rewriting
flash_read64() such to perform atomic 64 bit reads as one could
expect. However, such a rewrite would require the use of floating
point load operations, which becomes pretty complex:
save MSR;
set Floating Point Enable bit in MSR;
use "lfd" instruction to perform atomic 64 bit read;
use "stfd" to store value to temporary variable on stack;
load u64 value from temporary variable;
restore saved MSR;
return u64 value;
The benefit-cost ratio of such an implementation was considered too
bad to actually attempt this, especially as we can expect that such
an implementation would not only have a bigger memory footprint but
also cause a performance degradation.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch brings PMC440 board support up to date:
- fix GPIO configuration
- add misc_init_f()
- use better values for usbact variable
- fix USB 2.0 phy reset sequence
- shrink BAR2 to save PCI address space
- add FDT support
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch fixes esd's loadpci command when not all
memory on adapter boards is accessable via PCI.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Xilinx ppc440 and ppc405 have many similarities. This patch merge the
config files of both infrastuctures
Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@uam.es>
Signed-off-by: Stefan Roese <sr@denx.de>
There's currently an off-by-one bug in fdt_subnode_offset_namelen()
which causes it to keep searching after it's finished the subnodes of
the given parent, and into the subnodes of siblings of the original
node which come after it in the tree.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
fdt_add_mem_rsv() requires space for a struct fdt_reserve_entry
(16 bytes), so make sure that fdt_resize at least adds that much
padding, no matter what the location or size of the fdt is.
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
Acked-by: Andy Fleming <afleming@freescale.com>
The patch is following the commit 3924384060
mpc86xx: use r4 instead of r2 in lock_ram_in_cache and unlock_ram_in_cache
This is needed in unlock_ram_in_cache() because it is called from C and
will corrupt the small data area anchor that is kept in R2.
lock_ram_in_cache() is modified similarly as good coding practice, but
is not called from C.
Signed-off-by: Nick Spence <nick.spence@freescale.com>
also, the r2 is used as global data pointer.
Signed-off-by: Dave Liu <daveliu@freescale.com>
The current calculation will fail to cover all memory if
its size is not a power of two.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
The commit 67256678f0 add
the another global data pointer save, but in fact the
global data pointer will be initialized in the board_init_r,
so remove it such as the 85xx/83xx family.
Signed-off-by: Dave Liu <daveliu@freescale.com>
Acked-by: Kumar Gala <kumar.gala@freescale.com>
The DDR controller of 86xx processors have the ECC data init
feature, and the new DDR code is using the feature, we don't
need the way with DMA to init memory again.
Signed-off-by: Dave Liu <daveliu@freescale.com>
Acked-by: Kumar Gala <kumar.gala@freescale.com>
We must invalidate TLBs before MMU turn on, but
currently the code is not, if there are some stale
TLB entry valid in the TLBs, it will cause strange
issue.
Signed-off-by: Dave Liu <daveliu@freescale.com>
Acked-by: Becky Bruce <becky.bruce@freescale.com>
As reported by Ilko Iliev <iliev@ronetix.at>, the "nand erase clean"
command is currently broken, and among other things causes all blocks
to be marked bad.
This implements it properly using MTD_OOB_AUTO, along with some
indentation fixes.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Hardware expects ECCM 0 for small page and ECCM 1 for large page
when booting from NAND, so use those defaults.
Signed-off-by: Scott Wood <scottwood@freescale.com>
This patch defines 1M TLB&LAW size for NAND on MPC8572DS, assigns
0xffa00000 for CONFIG_SYS_NAND_BASE and adds other NAND supports in
config file.
It also moves environment(CONFIG_ENV_ADDR) outside of u-boot image, to
make room for the increased code size with NAND enabled.
Signed-off-by: Jason Jin <Jason.Jin@freescale.com>
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
- Rename lbus83xx_t to fsl_lbus_t and move it to asm/fsl_lbc.h so that it
can be shared by both 83xx and 85xx
- Remove lbus83xx_t and replace it with fsl_lbus_t in all 83xx boards
files which use lbus83xx_t.
- Move FMR, FIR, FCR, FPAR, LTESR from mpc83xx.h to asm/fsl_lbc.h so that
85xx can share them.
Signed-off-by: Jason Jin <Jason.Jin@freescale.com>
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Some chips require a RESET after power-up (e.g. Micron MT29FxGxxxxx).
The first command sent is NAND_CMD_READID.
Issue a NAND_CMD_RESET in nand_scan_ident before reading the device id.
Tested with an MT29F4G08AAC.
Signed-off-by: Karl Beldan <karl.beldan@gmail.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
This brings the core NAND code up to date with the Linux kernel.
Since there were several drivers in Linux as of the last update that are
not in u-boot, I'm not bringing over new drivers that have been added
since in the absence of an interested party.
I did not update OneNAND since it was recently synced by Kyungmin Park,
and I'm not sure exactly what the common ancestor is.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Add the ability to break the steps of the bootm command into several
subcommands: start, loados, ramdisk, fdt, bdt, cmdline, prep, go.
This allows us to do things like manipulate device trees before
they are passed to a booting kernel or setup memory for a secondary
core in multicore situations.
Not all OS types support all subcommands (currently only start, loados,
ramdisk, fdt, and go are supported).
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This removes a bit of code and makes it easier for the upcoming sub bootm
command support to call into the proper OS specific handler.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Wolfgang Denk <wd@denx.de>
Renamed show_boot_progress in assembler init phase to
show_boot_progress_asm to avoid link conflicts with C version
Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
The MPC8572 has a 4-bit wide PORDEVSR IO_SEL field. Other MPC85xx
processors have a 3-bit wide IO_SEL field but have the most
significant bit is wired to 0 so this change should not affect
them.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
The existing code has a few errors that need to be fixed in
order to support large RAM sizes. Fix those, and add a
comment to make it clearer.
Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
Acked-by: Kumar Gala <galak@kernel.crashing.org>
The information displayed when CONFIG_LCD_INFO is set is inherently
board-specific, so it should be done by the board code. The current code
dealing with this only handles two cases, and is already a horrible mess
of #ifdeffery.
Yes, this duplicates some code, but it also allows boards to print more
board-specific information; this used to be very difficult.
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
This allows the logo/info rendering routines to use the regular
lcd_putc/lcd_puts/lcd_printf calls.
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
lcd_printf() has a prototype in include/lcd.h but no implementation. Fix
this by borrowing the lcd_printf() implementation from the cogent board
code (which appears to use its own LCD framework.)
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
If the board _didn't_ request INVLINE_INVERTED, we set INVLINE_INVERTED,
otherwise we don't. WTF?
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
atmel_lcdfb doesn't actually need anything from asm/arch/hardware.h. It
includes a file that does, asm/arch/gpio.h, but this file doesn't
include <asm/arch/hardware.h> like it's supposed to.
Add the missing include to asm/arch/gpio.h and remove the workaround
from the atmel_lcdfb driver. This makes the driver compile on avr32.
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Converted MPC8610HCPD, MPC8641HPCN, and SBC8641D to use
fsl_pci_setup_inbound_windows() and ft_fsl_pci_setup().
With these changes the board code is a bit smaller and we get dma-ranges
set in the device tree for these boards.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Andrew Fleming-AFLEMING <afleming@freescale.com>
Acked-by: Jon Loeliger <jdl@freescale.com>
Converted ATUM8548, MPC8536DS, MPC8544DS, MPC8548CDS, MPC8568MDS,
MPC8572DS, TQM85xx, and SBC8548 to use fsl_pci_setup_inbound_windows()
and ft_fsl_pci_setup().
With these changes the board code is a bit smaller and we get dma-ranges
set in the device tree for these boards.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Andrew Fleming-AFLEMING <afleming@freescale.com>
Add a common setup function that determines the pci_region(s) based
on how much memory we have in the system.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Andrew Fleming-AFLEMING <afleming@freescale.com>
* PCI Inbound window was setup incorrectly. The PCI address and system
address were swapped. The PCI address should be setting piwar/piwbear
and the system address should be setting pitar.
* Removed masking of addresses to allow for system address to support
system address & PCI address >32-bits
* Set PIWBEAR & POTEAR to allow for full 64-bit PCI addresses
* Respect the PCI_REGION_PREFETCH for inbound windows
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Andrew Fleming-AFLEMING <afleming@freescale.com>
Added fdt_pci_dma_ranges() that parses the pci_region info from the
struct pci_controller and populates the dma-ranges based on it.
The max # of windws/dma-ranges we support is 3 since on embedded
PowerPC based systems this is the max number of windows.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Andrew Fleming-AFLEMING <afleming@freescale.com>
PCI bus is inherently 64-bit. While not all system require access to
the full 64-bit PCI address range some do. This allows those systems
to enable the full PCI address width via CONFIG_SYS_PCI_64BIT.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Andrew Fleming-AFLEMING <afleming@freescale.com>
Acked-by: Wolfgang Denk <wd@denx.de>
The 8572 DDR erratum1:
DDR controller may enter an illegal state when operating
in 32-bit bus mode with 4-beat bursts.
Description:
When operating with a 32-bit bus, it is recommended that
DDR_SDRAM_CFG[8_BE] is cleared when DDR2 memories are used.
This forces the DDR controller to use 4-beat bursts when
communicating to the DRAMs. However, an issue exists that
could lead to data corruption when the DDR controller is
in 32-bit bus mode while using 4-beat bursts.
Projected Impact:
If the DDR controller is operating in 32-bit bus mode with
4-beat bursts, then the controller may enter into a bad state.
All subsequent reads from memory is corrupted.
Four-beat bursts with a 32-bit bus only is used with DDR2 memories.
Therefore, this erratum does not affect DDR3 mode.
Work Arounds:
To work around this issue, software must set DEBUG_1[31] in
DDR memory mapped space (CCSRBAR offset + 0x2f00 for DDR_1
and CCSRBAR offset + 0x6f00 for DDR_2).
Currenlty, the code is using incorrect register DDR_SDRAM_CFG_2
as condition, but it should be DDR_SDRAM_CFG register.
Signed-off-by: Dave Liu <daveliu@freescale.com>
Introduce CONFIG_E500MC to deal with the minor differences between
e500v2 and e500mc.
* Certain fields of HID0/1 don't exist anymore on e500mc
* Cache line size is 64-bytes on e500mc
* reset value of PIR is different
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Using CONFIG_SYS_CACHELINE_SIZE instead of 31 means we can handle
e500mc's 64-byte cacheline properly when it gets added.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This patch adds support for the avnet fx12 minimodul.
It needs the "ppc4xx: Generic architecture for xilinx ppc405"
patch from Ricardo.
Signed-off-by: Georg Schardt <schardt@team-ctech.de>
Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@uam.es>
Signed-off-by: Stefan Roese <sr@denx.de>
As "ppc44x: Unification of virtex5 pp440 boards" did for the xilinx
ppc440 boards, this patch presents a common architecture for all the
xilinx ppc405 boards.
Any custom xilinx ppc405 board can be added very easily with no code
duplicity.
This patch also adds a simple generic board, that can be used on almost
any design with xilinx ppc405 replacing the file ppc405-generic/xparameters.h
This patch is prepared to work with the latest version of EDK (10.1)
Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@uam.es>
Signed-off-by: Stefan Roese <sr@denx.de>
Since the new autocalibration still has some problems on some Kilauea
boards with 200MHz DDR2 frequency we disable the autocalibration and
use the hardcoded values as done before. This seems to work reliably
on all known DDR2 frequencies.
After the autocalibration issue is fixed we will enable it again.
Signed-off-by: Stefan Roese <sr@denx.de>
Some Blackfin UARTs are read-to-clear while others are write-to-clear.
This can cause problems when we poll the LSR and then later try and handle
any errors detected.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The USB/LAN register settings are not actually used/needed in order to
drive things from U-Boot, so drop the code.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Make sure that the start.o object is always the first object in our linker
script regardless of configuration settings, and add some linker symbols
so the ldr utility can properly locate the initcode when generating a LDR.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Use the sti instruction to set the initial interrupt mask rather than
banging on the core IMASK MMR to save both space and time.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
We should use the algorithm in the Linux kernel so that the UART divisor
calculation is more accurate. It also fixes problems on some picky UARTs
that have sampling anomalies.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
During cpu init, make sure we initialize the CEC properly so that
interrupts can fire and be handled while U-Boot is running.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
If booting out of NAND, we need to make sure we initialize it properly
before attempting to relocate the environment.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
This is done to allow other 83XX based platforms which also have UPM
(e.g. 8360) to configure and use their UPM in u-boot.
Signed-off-by: Richard Retanubun <RichardRetanubun@RuggedCom.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
With this patch u-boot can fixup the dr_mode and phy_type properties
for the Dual-Role USB controller.
While at it, also remove #ifdefs around includes, they are not needed.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Though NAND chip is replaceable on the MPC837XE-MDS boards, the
current settings don't work with the default chip on the board.
Nevertheless Freescale's U-Boot sets the option register correctly,
so I just dumped the register from the working u-boot. My guess is
that the old settings were applicable for some pilot boards, not
found in the production.
This patch also enables FSL ELBC driver so that we could access
the NAND storage in the u-boot.
The NAND support costs about 45KB, so the u-boot no longer fits
into two 128KB NOR flash sectors, thus we also have to adjust
environment location: add another 128KB to the monitor length.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
It is due to hardware design and logic defect, that is the
I/O[0:7] of NAND chip is connected to LAD[7:0], so when
the NAND chip connected to nLCS3, you have to set up the
OR3[BCTLD] = '1' for normal operation, otherwise it will have
bus contention due to the pin 48/25 of U60 is enabled.
Setup the OR3[BCTLD] = '1' , that meaning the LBCTL is not
asserted upon access to the NAND chip, keep the default state.
Acked-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
The MPC837xE-MDS board's CPLD can auto-detect if the board is on the PIB,
standalone or acting as a PCI agent. User's Guide says:
- When the CPLD recognizes its location on the PIB it automatically
configures RCW to the PCI Host.
- If the CPLD fails to recognize its location then it is automatically
configured as an Agent and the PCI is configured to an external arbiter.
This sounds good. Though in the standalone setup the CPLD sets PCI_HOST
flag (it's ok, we can't act as PCI agents since we receive CLKIN, not
PCICLK), but the CPLD doesn't set the ARBITER_ENABLE flag, and without
any arbiter bad things will happen (here the board hangs during any config
space reads).
In this situation we must disable the PCI. And in case of anybody really
want to use an external arbiter, we provide "pci_external_aribter"
environment variable.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
This involves configuring the SerDes and fixing up the flags and
PHY addresses for the TSECs.
For Linux we also fix up the device tree.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
The rfcks should be shifted by 28 bits left. We didn't notice the bug
because we were using only 100MHz clocks (for which rfcks == 0).
Though, for SGMII we'll need 125MHz clocks.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
MPC837xE specs says that SerDes1 has:
— Two lanes running x1 SGMII at 1.25 Gbps;
— Two lanes running x1 SATA at 1.5 or 3.0 Gbps.
And for SerDes2:
— Two lanes running x1 PCI Express at 2.5 Gbps;
— One lane running x2 PCI Express at 2.5 Gbps;
— Two lanes running x1 SATA at 1.5 or 3.0 Gbps.
The spec also explicitly states that PEX options are not valid for
the SD1.
Nevertheless MPC8378 RDB and MDS boards configure the SD1 for PEX,
which is wrong to do.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Currently 64M of LBC SDRAM are mapped at 0xF0000000 which makes
it difficult to use (b/c then the memory is discontinuous and
there is quite big memory hole between the DDR/SDRAM regions).
This patch reworks LBC SDRAM setup so that now we dynamically
place the LBC SDRAM near the DDR (or at 0x0 if there isn't any
DDR memory).
With this patch we're able to:
- Boot without external DDR memory;
- Use most "DDR + SDRAM" setups without need to support for
sparse/discontinuous memory model in the software.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
On some systems (for example Fedora Core 4) U-Boot builds with the
following wanrings only:
...
In file included from /home/wd/git/u-boot/include/libfdt_env.h:33,
from fdt.c:51:
/usr/include/asm/byteorder.h:6:2: warning: #warning using private kernel header; include <endian.h> instead!
This patch fixes this problem.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Previously only the NOR flash mapping was written into the ranges
property of the ebc node. This patch now writes all enabled chip
select areas into the ranges property.
Signed-off-by: Stefan Roese <sr@denx.de>
I reorganized my config files, putting the common stuff into netstal-common.h
(got the idea by looking a amcc-common.h from Stefan).
Added stuff to boot the new powerpc linux via NFS (only tested with HCU4).
Signed-off-by: Niklaus Giger <niklaus.giger@netstal.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Provide a weak defined routine to retrieve the CPU number for
reference boards that have multiple CPU's. Default behavior
is the existing single CPU print output. Reference boards with
multiple CPU's need to provide a board specific routine.
See board/amcc/arches/arches.c for an example.
Signed-off-by: Adam Graham <agraham@amcc.com>
Signed-off-by: Victor Gallardo <vgallardo@amcc.com>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch add the capability to configure a PPC440 based IBM SDRAM
Controller with static, compiled-in, values. PPC440 memory subsystem
includes a Memory Queue core.
Signed-off-by: Adam Graham <agraham@amcc.com>
Signed-off-by: Victor Gallardo <vgallardo@amcc.com>
Signed-off-by: Stefan Roese <sr@denx.de>
The Arches Evaluation board is based on the AMCC 460GT SoC chip.
This board is a dual processor board with each processor providing
independent resources for Rapid IO, Gigabit Ethernet, and serial
communications. Each 460GT has it's own 512MB DDR2 memory, 32MB NOR
FLASH, UART, EEPROM and temperature sensor, along with a shared debug
port. The two 460GT's will communicate with each other via shared
memory, Gigabit Ethernet and x1 PCI-Express.
Signed-off-by: Adam Graham <agraham@amcc.com>
Signed-off-by: Victor Gallardo <vgallardo@amcc.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Several customers have reported problems with the environment in
EEPROM, including corrupted content after board reset. Probably the
code to prevent I2C Enge Conditions is not working sufficiently.
We move the environment to flash now, which allows to have a backup
copy plus gives much faster boot times.
Also, change the default console initialization to 115200 bps as used
on most other boards.
Signed-off-by: Wolfgang Denk <wd@denx.de>
mpc8536ds.c: In function 'is_sata_supported':
mpc8536ds.c:615: warning: unused variable 'devdisr'
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Round clock frequencies for printing.
Many boards printed off clock frequencies like 399 MHz instead of the
exact 400 MHz because numberes were not rounded. This is fixed now.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Commit f7d190b1 corrected the value of MPC85xx_PORDEVSR2_SEC_CFG, but forgot
to add a comment that the correct value disagrees with the 8544 reference
manual. The changelog for that commit is also wrong, as it says "bit 28"
when it should be "bit 24".
Signed-off-by: Timur Tabi <timur@freescale.com>
The pixis sgmii command depend on the FPGA support on the board, some 85xx
boards support SGMII riser card but did not support this command, define
CONFIG_PIXIS_SGMII_CMD for those boards which support the sgmii command.
Not like 8544, 8572 has 4 eTsec so that the other two's pixis bits
are not supported by 8544. Therefor, define PIXIS_VSPEED2_MASK and
PIXIS_VCFGEN1_MASK in header file for both boards.
Signed-off-by: Liu Yu <yu.liu@freescale.com>
Debug sessions may have left enabled laws.
Changing lawbar with an unkown enabled tgtid could cause problems.
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
mpc8572 supports all pcie controllers as end-points with cfg_host_agent=0.
Include host_agent == 0 decode for end-point determination.
This is not needed for the ds reference board since pcie3 will be a host
in order to connect to the uli chip. Include it here as a reference for
other mpc8572 boards.
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Some cores don't support ethernet stashing at all, and some
instances have errata. Adds 3 properties to gianfar nodes
which support stashing. For now, just add this support to
85xx SoCs.
Signed-off-by: Andy Fleming <afleming@freescale.com>
* Add board specific parameter table to choose correct cpo, clk_adjust,
write_data_delay based on board ddr frequency and n_ranks.
* Set odt_rd_cfg and odt_wr_cfg based on the dimm# and CS#.
Signed-off-by: James Yang <James.Yang@freescale.com>
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
* Add board specific parameter table to choose correct cpo, clk_adjust,
write_data_delay, 2T based on board ddr frequency and n_ranks.
* Set odt_rd_cfg and odt_wr_cfg based on the dimm# and CS#.
* Set memory controller interleaving mode to bank interleaving, and disable
bank(chip select) interleaving mode by default, because the default on-board
DDR DIMMs are 2x512MB single-rank.
* Change CONFIG_ICS307_REFCLK_HZ from 33333333 to 33333000.
Signed-off-by: James Yang <James.Yang@freescale.com>
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
* Check DDR interleaving mode from environment by reading memctl_intlv_ctl and
ba_intlv_ctl.
* Print DDR interleaving mode information
* Add doc/README.fsl-ddr to describe the interleaving setting
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Because some dimm parameters like n_ranks needs to be used with the board
frequency to choose the board parameters like clk_adjust etc. in the
board_specific_paramesters table of the board ddr file, we need to pass
the dimm parameters to the board file.
* move ddr dimm parameters header file from /cpu to /include directory.
* add ddr dimm parameters to populate board specific options.
* Fix fsl_ddr_board_options() for all the 8xxx boards which call this function.
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Fix some bugs:
1. Correctly set intlv_ctl in cs_config.
2. Correctly set sa, ea in cs_bnds when bank interleaving mode is enabled.
3. Set base_address and total memory for each ddr controller in memory
controller interleaving mode.
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Changing the flash from cacheable to cache-inhibited was taking a significant
amount of time due to the fact that we were iterating over the full 256M of
flash. Instead we can just flush the L1 d-cache and invalidate the i-cache.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Added the ability for C code to invalidate the i/d-cache's and
to flush the d-cache. This allows us to more efficient change mappings
from cache-able to cache-inhibited.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
in ft_blob_update () for both boards was an unneccessary
repetition of code, which this patch moves in a common
function for this boards.
Signed-off-by: Heiko Schocher <hs@denx.de>
Each architecture has different ways of determine what regions of memory
might not be valid to get overwritten when we boot. This provides a
hook to allow them to reserve any regions they care about. Currently
only ppc, m68k and sparc need/use this.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Sub-command can benefit from using the same table and search functions
that top level commands have. Expose this functionality by refactoring
find_cmd() and introducing find_cmd_tbl() that sub-command processing
can call.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The EEprom contains some Manufacturerinformation,
which are read from u-boot at boot time, and saved
in same hush shell variables.
Signed-off-by: Heiko Schocher <hs@denx.de>
This new command shows the local variables defined in
the hush shell:
=> help showvar
showvar
- print values of all hushshell variables
showvar name ...
- print value of hushshell variable 'name'
Also make the set_local_var() and unset_local_var ()
no longer static, so it is possible to define local
hush shell variables at boot time. If CONFIG_HUSH_INIT_VAR
is defined, u-boot calls hush_init_var (), where
boardspecific code can define local hush shell
variables at boottime.
Signed-off-by: Heiko Schocher <hs@denx.de>
With this Command it is possible to add new I2C Busses,
which are behind 1 .. n I2C Muxes. Details see README.
Signed-off-by: Heiko Schocher <hs@denx.de>
As documented in doc/I2C_Edge_Conditions, adding a
board specific deblocking mechanism via CFG_I2C_INIT_BOARD
for the mgcoge and mgsuvd board.
This code was originally written by Keymile in association
with Anatech and Atmel in 1998. The Code toggels the SCL
until the SCA line goes to HIGH (max. 16 times).
And after this, a start condition is sent.
This is another approach to deblock the I2C Bus. The
soft I2C driver actually sends 9 clocks with SDA High,
and then a stop at the end, to deblock the I2C Bus.
Maybe we should use the approach from Keymile as
the new standard?
Signed-off-by: Heiko Schocher <hs@denx.de>
This patch fixes the following warnings, when using
the soft_i2c driver using no CPU pins on MPC82xx or MPC8xx
systems:
soft_i2c.c: In function 'send_reset':
soft_i2c.c:93: warning: unused variable 'immr'
soft_i2c.c: In function 'send_start':
soft_i2c.c:124: warning: unused variable 'immr'
soft_i2c.c: In function 'send_stop':
soft_i2c.c:146: warning: unused variable 'immr'
soft_i2c.c: In function 'send_ack':
soft_i2c.c:171: warning: unused variable 'immr'
soft_i2c.c: In function 'write_byte':
soft_i2c.c:196: warning: unused variable 'immr'
soft_i2c.c: In function 'read_byte':
soft_i2c.c:244: warning: unused variable 'immr'
Signed-off-by: Heiko Schocher <hs@denx.de>
If I2C Bus is blocked (see doc/I2C_Edge_Conditions),
it is not possible to get out of this, until the
complete Hardware gets a reset. This new commando
calls again i2c_init (and that calls i2c_init_board
if defined), which will deblock the I2C Bus.
Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Wolfgang Denk <wd@denx.de>
There are some more extensions, which are for both boards
and some more boards from this manufacturer will follow soon.
Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Wolfgang Denk <wd@denx.de>
This patch adds support for the National LM63 temperature
sensor with integrated fan control. It's used on the GDSys
Neo board (405EP) which will be submitted later.
Signed-off-by: Dirk Eibach <eibach@gdsys.de>
Acked-by: Stefan Roese <sr@denx.de>
Now it's used at UBI module. Of course other modules can use it.
If you want to use it, please define CONFIG_RBTREE
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Now that the auto-update feature uses the 'firmware' type for updates, it is
useful to inspect the load address of such images.
Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
The auto-update feature allows to automatically download software updates
from a TFTP server and store them in Flash memory during boot. Updates are
contained in a FIT file and protected with SHA-1 checksum.
More detailed description can be found in doc/README.update.
Signed-off-by: Rafal Czubak <rcz@semihalf.com>
Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
The upcoming automatic update feature needs the ability to adjust an
address within Flash to the end of its respective sector. Factor out
this functionality to a new function flash_sect_roundb().
Signed-off-by: Rafal Czubak <rcz@semihalf.com>
Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
Signed-off-by: Stefan Roese <sr@denx.de>
There are two aspects of a TFTP transfer involving timeouts:
1. timeout waiting for initial server reply after sending RRQ
2. timeouts while transferring actual data from the server
Since the upcoming auto-update feature attempts a TFTP download during each
boot, it is undesirable to have a long delay when the TFTP server is not
available. Thus, this commit makes the server timeout (1.) configurable by two
global variables:
TftpRRQTimeoutMSecs
TftpRRQTimeoutCountMax
TftpRRQTimeoutMSecs overrides default timeout when trying to connect to a TFTP
server, TftpRRQTimeoutCountMax overrides default number of connection retries.
The total delay when trying to download a file from a non-existing TFTP server
is TftpRRQTimeoutMSecs x TftpRRQTimeoutCountMax milliseconds.
Timeouts during file transfers (2.) are unaffected.
Signed-off-by: Rafal Czubak <rcz@semihalf.com>
Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Enforce millisecond semantics of the first argument to NetSetTimeout() --
the change is transparent for well-behaving boards (CFG_HZ == 1000 and
get_timer() countiing in milliseconds).
Rationale for this patch is to enable millisecond granularity for
network-related timeouts, which is needed for the upcoming automatic
software update feature.
Summary of changes:
- do not scale the first argument to NetSetTimeout() by CFG_HZ
- change timeout values used in the networking code to milliseconds
Signed-off-by: Rafal Czubak <rcz@semihalf.com>
Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Added as a convenience for other platforms that uses MPC8360 (has 8 UCC).
Six eth interface is chosen because the platform I am using combines
UCC1&2 and UCC3&4 as 1000 Eth and the other four UCCs as 10/100 Eth.
Signed-off-by: Richard Retanubun <RichardRetanubun@RugggedCom.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Change UEC phy interface from GMII to RGMII on MPC8568MDS board
Because on MPC8568MDS, GMII interface is only recommended for 1000Mbps speed,
but RGMII interface can work at 10/100/1000Mbps, and RGMII interface works more stable.
Now both UEC1 and UEC2 can work properly under u-boot.
It is also in consistent with the kernel setting for 8568 UEC phy interface.
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Set the MQ Read Passing & MCIF Cycle limits to the recommended by AMCC
values. This fixes the occasional 440SPe hard locking issues when the 440SPe's
dedicated DMA engines are used (e.g. by the h/w accelerated RAID driver).
Previously the appropriate initialization had been made in Linux, by the
ppc440spe ADMA driver, which is wrong because modifying the MQ configuration
registers after normal operation has begun is not supported and could
have unpredictable results.
Comment from Stefan: This patch doesn't change the resulting value of the
MQ registers. It explicitly sets/clears all bits to the desired state which
better documents the resulting register value instead of relying on pre-set
default values.
Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
Signed-off-by: Stefan Roese <sr@denx.de>
At a lot of places in the code the PIPE_INTERRUPT flags and friends
are used wrong. The wrong bits are compared to this flag resulting
in wrong conditions. Also there are macros that should be used for
PIPE_* flags.
This patch tries to fix them all, however, I was not able to test the
changes, because I do not have any of these boards.
Review required!
Signed-off-by: Remy Bohmer <linux@bohmer.net>
Signed-off-by: Markus Klotzbuecher <mk@denx.de>
The max packet size is encoded as 0,1,2,3 for 8,16,32,64 bytes.
At some places directly 8,16,32,64 was used instead of the encoded
value. Made a enum for the options to make this more clear and to help
preventing similar errors in the future.
After fixing this bug it became clear that another bug existed where
the 'pipe' is and-ed with PIPE_* flags, where it should have been
'usb_pipetype(pipe)', or even better usb_pipeint(pipe).
Also removed the triple 'get_device_descriptor' sequence, it has no use,
and Windows nor Linux behaves that way.
There is also a poll going on with a timeout when usb_control_msg() fails.
However, the poll is useless, because the flag will never be set on a error,
because there is no code that runs in a parallel that can set this flag.
Changed this to something more logical.
Tested on AT91SAM9261ek and compared the flow on the USB bus to what
Linux is doing. There is no difference anymore in the early initialisation
sequence.
Signed-off-by: Remy Bohmer <linux@bohmer.net>
Signed-off-by: Markus Klotzbuecher <mk@denx.de>
Changed MIMC200 board setup and config to use CONFIG_DISABLE_CONSOLE.
Also fixed default uImage location.
Signed-off-by: Mark Jackson <mpfj@mimc.co.uk>
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
There are several differences between Linux, Windows and U-boot for initialising the
USB devices. While analysing the behaviour of U-boot it turned out that U-boot does
things really different, and some are wrong (compared to the USB standard).
This patch fixes some errors:
* The NEW_init procedure that was already in the code is good, while the old procedure
is wrong. See code comments for more info.
* On a Control request the data returned by the device can be more than 8 bytes, while
the host limits it to 8 bytes. This caused the host to generate a DataOverrun error.
This results in a lot of USB sticks not being recognised, and the transmission ended
frequently with a CTL:TIMEOUT Error.
* Added a flag CONFIG_LEGACY_USB_INIT_SEQ to allow users to use the old init procedure.
Signed-off-by: Remy Bohmer <linux@bohmer.net>
Signed-off-by: Markus Klotzbuecher <mk@denx.de>
This patch refactors some large routines of the USB OHCI code by
making some routines smaller and more readable which helps
debugging and understanding the code. (Makes the code looks
somewhat more like the Linux implementation.)
Also made entire file compliant to Linux Coding Rules (checkpatch.pl compliant)
Signed-off-by: Remy Bohmer <linux@bohmer.net>
Signed-off-by: Markus Klotzbuecher <mk@denx.de>
The GCC-compiler makes an optimisation error while optimising the routine
usb_set_maxpacket(). This should be fixed in the compiler in the first place,
but there lots of compilers out there that makes this error, that it is
probably wiser to workaround it in U-boot itself.
What happens is that the register r3 is used as loop-counter 'i', but gets
overwritten later on. From there it starts using register r3 for several other
things and the assembler code is becoming a big mess. This is clearly a compiler bug.
This error occurs on at least several versions of Code Sourcery Lite compilers
for ARM. Like the Edition 2008q1, and 2008q3, It has also been seen on other
compilers, while compiling for armv4t, or armv5te with Os, O1 and O2.
We work around it by splitting up this routine in 2 parts, and making sure that
the split out part is NOT inlined any longer. This will make GCC spit out assembler
that do not show this problem. Another possibility is to adapt the Makefile to stop
optimisation for the complete file. I think this solution is nicer.
Signed-off-by: Remy Bohmer <linux@bohmer.net>
Signed-off-by: Markus Klotzbuecher <mk@denx.de>
The "GPIO" port mux is used on AVR32 UC3 parts as well as AT32AP7200 and
all later AVR32 chips. This patch adds a driver for it, implementing the
same API as the existing portmux-pio driver but with more functionality.
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Replace the avr32-specific board_init_info hook by the standard
board_early_init_r hook and make it optional.
board_early_init_r() runs somewhat earlier than board_init_info used to
do, but this isn't a problem for any of the in-tree boards.
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Replace the avr32-specific gclk_init() board hook with the standard
board_postclk_init() hook which is supposed to run at the same point
during initialization.
Provide a dummy weak alias for boards not implementing this hook. The
cost of this is:
- 2 bytes for the dummy function (retal 0)
- 2 bytes for each unnecessary function call (short rcall)
which is a pretty small price to pay for avoiding lots of #ifdef
clutter. In this particular case, all boards probably end up slightly
smaller because we avoid the conditional checking if the gclk_init
symbol is NULL.
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Use the new gclk helper functions to set up the PHY clock instead of
accessing the PM registers directly.
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Add two helper functions for configuring and enabling generic clocks:
- gclk_enable_output: Enables output on a GCLKx pin
- gclk_set_rate: Configures a gclk to run at a specific rate
This should eliminate any reason to go mucking about with PM registers
from board code.
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
- Separate the portmux configuration functionality from the GPIO pin
control API.
- Separate the controller-specific code from the chip-specific code.
- Allow "ganged" port configuration (multiple pins at once).
- Add more flexibility to the "canned" peripheral select functions:
- Allow using more than 23 address bits, more chip selects, as
well as NAND- and CF-specific pins.
- Make the MACB SPEED pin optional, and choose between MII/RMII
using a parameter instead of an #ifdef.
- Make it possible to use other MMC slots than slot 0, and support
different MMC/SDCard data bus widths.
- Use more reasonable pull-up defaults; floating pins may consume a
lot of power.
- Get rid of some custom portmux code from the mimc200 board code. The
old gpio/portmux API couldn't really handle its requirements, but
the new one can.
- Add documentation.
The end result is slightly smaller code for all boards. Which isn't
really the point, but at least it isn't any larger.
This has been verified on ATSTK1002 and ATNGW100. I'd appreciate if
the board maintainers could help me test this on their boards. In
particular, the mimc200 port has lost a lot of code, so I'm hoping Mark
can help me out.
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Cc: Hans-Christian Egtvedt <hans-christian.egtvedt@atmel.com>
Cc: Mark Jackson <mpfj@mimc.co.uk>
Cc: Alex Raimondi <alex.raimondi@miromico.ch>
Cc: Julien May <julien.may@miromico.ch>
Changes since v1:
* Enable pullup on NWAIT
* Add missing include to portmux-pio.h
* Rename CONFIG_PIO2 -> CONFIG_PORTMUX_PIO to match docs
Make the data_bits enum in struct sdram_config reflect the actual number
of data bits on the bus, i.e. 16 or 32. Having 0 mean 16 bits and 1 mean
32 bits is just too confusing.
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Remove some outdated and/or unnecessary information, and add updated
information about the toolchain and buildroot.
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2008-09-01 13:41:58 +02:00
3614 changed files with 200241 additions and 90672 deletions
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