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861 Commits

Author SHA1 Message Date
Wolfgang Denk
b1af6f532e Prepare v2011.06
Signed-off-by: Wolfgang Denk <wd@denx.de>
2011-06-27 22:22:42 +02:00
Wolfgang Denk
177f38609b Minor coding style fixes.
Signed-off-by: Wolfgang Denk <wd@denx.de>
2011-06-27 22:22:16 +02:00
Mike Frysinger
181f565c2d usb: convert to partial linking
Looks like this was missed during the conversion to partial linking.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-06-25 09:53:10 +02:00
Zhao Chenhui
ae46d2a952 ehci-pci: Fix PCI EHCI driver for 36-bit
Convert the PCI base address into a virtual address.

Signed-off-by: Zhao Chenhui <b35336@freescale.com>
Signed-off-by: Li Yang <leoli@freescale.com>
2011-06-25 09:53:10 +02:00
Cliff Cai
b17ce92a42 musb: process control messages after roothub accepted it
When dealing with non-multipoint devices, if the software root hub code
accepted the message, then we still need to process it normally.  So only
return quickly when the root hub skipped the message or is otherwise in
an error state.

Signed-off-by: Cliff Cai <cliff.cai@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-06-25 09:53:10 +02:00
Wolfgang Denk
9623c158f6 Merge branch 'master' of git://git.denx.de/u-boot-arm
* 'master' of git://git.denx.de/u-boot-arm:
  run arm_pci_init after relocation
  IXP42x PCI rewrite
  update/fix PDNB3 board
  update/fix IXDP425 / IXDPG425 boards
  add dvlhost (dLAN 200 AV Wireless G) board
  IXP NPE: add support for fixed-speed MII ports
  update/fix AcTux4 board
  update/fix AcTux3 board
  update/fix AcTux2 board
  update/fix AcTux1 board
  use -ffunction-sections / --gc-sections on IXP42x
  support CONFIG_SYS_LDSCRIPT on ARM
  fix "depend" target in npe directory
  Fix IXP code to work after relocation was added
  trigger hardware watchdog in IXP42x serial driver
  add support for IXP42x Rev. B1 and newer
  add XScale sub architecture (IXP/PXA) to maintainer list

Conflicts:
	arch/arm/lib/board.c

Signed-off-by: Wolfgang Denk <wd@denx.de>
2011-06-23 15:37:33 +02:00
Michael Schwingen
1ed63c5498 run arm_pci_init after relocation
Signed-off-by: Michael Schwingen <michael@schwingen.org>
2011-06-23 08:25:19 +02:00
Michael Schwingen
29161f47d0 IXP42x PCI rewrite
clean up IXP PCI handling: get rid of IXP-private bus scan, BAR assign etc.
code and use u-boot's PCI infrastructure instead.  Move board-specific PCI
setup code (clock/reset) to board directory.

Signed-off-by: Michael Schwingen <michael@schwingen.org>
2011-06-23 08:25:18 +02:00
Michael Schwingen
904ec57b33 update/fix PDNB3 board
Signed-off-by: Michael Schwingen <michael@schwingen.org>
2011-06-23 08:25:18 +02:00
Michael Schwingen
973af335e6 update/fix IXDP425 / IXDPG425 boards
Signed-off-by: Michael Schwingen <michael@schwingen.org>
2011-06-23 08:25:18 +02:00
Michael Schwingen
10c9787e68 add dvlhost (dLAN 200 AV Wireless G) board
Signed-off-by: Michael Schwingen <michael@schwingen.org>
2011-06-23 08:25:18 +02:00
Michael Schwingen
d697d79f8d IXP NPE: add support for fixed-speed MII ports
Signed-off-by: Michael Schwingen <michael@schwingen.org>
2011-06-23 08:25:18 +02:00
Michael Schwingen
080b7643fb update/fix AcTux4 board
Signed-off-by: Michael Schwingen <michael@schwingen.org>
2011-06-23 08:25:18 +02:00
Michael Schwingen
8b5ab4c1b6 update/fix AcTux3 board
Signed-off-by: Michael Schwingen <michael@schwingen.org>
2011-06-23 08:25:18 +02:00
Michael Schwingen
af0504858c update/fix AcTux2 board
Signed-off-by: Michael Schwingen <michael@schwingen.org>
2011-06-23 08:25:18 +02:00
Michael Schwingen
517c5dfed5 update/fix AcTux1 board
Signed-off-by: Michael Schwingen <michael@schwingen.org>
2011-06-23 08:25:18 +02:00
Michael Schwingen
66463e60df use -ffunction-sections / --gc-sections on IXP42x
Signed-off-by: Michael Schwingen <michael@schwingen.org>
2011-06-23 08:24:55 +02:00
Michael Schwingen
363613a08d support CONFIG_SYS_LDSCRIPT on ARM
Signed-off-by: Michael Schwingen <michael@schwingen.org>
2011-06-23 08:24:55 +02:00
Michael Schwingen
3053fa0bfb fix "depend" target in npe directory
Signed-off-by: Michael Schwingen <michael@schwingen.org>
2011-06-23 08:24:55 +02:00
Michael Schwingen
ce04bb41a6 Fix IXP code to work after relocation was added
- jump to real flash location after reset before turning off flash mirror
 - fix timer system to use HZ == 1000, remove broken interrupt-based code

Signed-off-by: Michael Schwingen <michael@schwingen.org>
2011-06-23 08:24:55 +02:00
Michael Schwingen
009e464802 trigger hardware watchdog in IXP42x serial driver
Signed-off-by: Michael Schwingen <michael@schwingen.org>
2011-06-23 08:24:55 +02:00
Michael Schwingen
20f172815d add support for IXP42x Rev. B1 and newer
Signed-off-by: Michael Schwingen <michael@schwingen.org>
2011-06-23 08:24:55 +02:00
Michael Schwingen
c3dc3dfb7e add XScale sub architecture (IXP/PXA) to maintainer list
Signed-off-by: Michael Schwingen <michael@schwingen.org>
2011-06-23 08:24:55 +02:00
Mike Frysinger
2ad6e27dcd tools: make it possible to build tools unconfigured
On Sunday, June 19, 2011 13:55:13 Ilya Yanok wrote:
> On 18.06.2011 23:03, Mike Frysinger wrote:
> >>  - tools/Makefile put common/env_embedded.o and envcrc.o to object list
> >>
> >> conditionally. This fixes errors during dependency generation.
> >
> > pretty sure this breaks board builds.  if the only thing this fixes is a
>
> I'm sorry but I can't see how this can break the builds. Could you
> please be more specific? I've tried to build some boards, it actually
> works...

i might be thinking of a different env_embedded situation.  a different
problem with your patch to tools/Makefile: you copied the same logic multiple
times which means more bitrot.

why dont you do something like:

> > harmless warning when generating dependency files, then i say ignore it.
> > after all, this is how it has always worked in the past and no one really
> > cared.
>
> Yep, they are harmless but they are not warnings but rather scary errors
> actually. ;) I think it's better to fix them.

i guess my threshold for being scared is a bit higher :p
-mike
2011-06-22 20:03:13 +02:00
Ilya Yanok
28abd48f50 Makefile: move $(VERSION_FILE) rule out of ifeq configured
mkimage relies on autogenerated version so we need to move
$(VERSION_FILE) rule out of ifeq and make tools rule depend on it to be
able to run 'make tools' from the unconfigured tree.

Signed-off-by: Ilya Yanok <yanok@emcraft.com>
Acked-by: Mike Frysinger <vapier@gentoo.org>
2011-06-22 20:03:08 +02:00
Ilya Yanok
d51dfff7af config.mk: move LDSCRIPT processing to the top-level Makefile
LDSCRIPT is used only from the top-level Makefile and only when the
system is configured so we can move LDSCRIPT and CONFIG_SYS_LDSCRIPT
related logic into the top level Makefile and under configured condition
to avoid errors when building tools from unconfigured tree.

Signed-off-by: Ilya Yanok <yanok@emcraft.com>
Acked-by: Mike Frysinger <vapier@gentoo.org>
2011-06-22 20:03:01 +02:00
Wolfgang Denk
566e5cf451 ARM: drop unsupported 'trab' board
The 'trab' board configuration is broken, and there is nobody who is
interested and willing to fix it.  Drop it.

This includes support for VFD displays which have always been used by
this board only.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2011-06-22 20:00:51 +02:00
Wolfgang Denk
79cfe42261 Prepare v2011.06-rc3
Signed-off-by: Wolfgang Denk <wd@denx.de>
2011-06-22 11:39:24 +02:00
Sergey Lapin
282e27c0b7 Build fix/update of AFEB9260
Make AFEB9260 build again.
Based on fix for AT91SAM9260EK.

Signed-off-by: Sergey Lapin <slapin@ossfans.org>
2011-06-21 22:26:22 +02:00
andreas.devel@googlemail.com
6c169c12d7 macb: fix compile warning
This patch fixes following compile warning:

---8<---
macb.c: In function 'macb_write_hwaddr':
macb.c:525:2: warning: dereferencing type-punned pointer will break strict-aliasing rules
--->8---

Signed-off-by: Andreas Bießmann <andreas.devel@gmail.com>
2011-06-21 22:26:22 +02:00
andreas.devel@googlemail.com
2321bfe425 at91_emac: fix compile warning
This patch removes the warning

---8<---
at91_emac.c: In function 'at91emac_write_hwaddr':
at91_emac.c:487:2: warning: dereferencing type-punned pointer will break strict-aliasing rules
--->8---

Signed-off-by: Andreas Bießmann <andreas.devel@gmail.com>
2011-06-21 22:26:22 +02:00
Eric Benard
fd2f565809 include/asm/arch-at91: update several .h files to ATMEL_xxx name scheme
Signed-off-by: Eric Bénard <eric@eukrea.com>
2011-06-21 22:26:22 +02:00
Eric Benard
d0a94620a8 cpuat91: fix board support
Signed-off-by: Eric Bénard <eric@eukrea.com>
2011-06-21 22:26:22 +02:00
Eric Benard
95d50e5ce7 cpu9260/9G20: fix board support
Signed-off-by: Eric Bénard <eric@eukrea.com>
2011-06-21 22:26:22 +02:00
Eric Benard
96fd99067f arm926ejs/at91/lowlevel_init.S: fix defines
atmel rework changed define names which broke this file

Signed-off-by: Eric Bénard <eric@eukrea.com>
2011-06-21 22:26:22 +02:00
Reinhard Meyer
576e7a10c4 ATMEL spi_dataflash driver - fix to build again
The rework effort for ATMEL (AT91/AVR32) accidentially broke build of
this driver. Fix this to make it build again. However this driver should
be reworked as soon as possible!

Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
2011-06-21 22:26:22 +02:00
Reinhard Meyer
9b372b2c8e AT91 rework: fix TOP9000 files to build again
Fix EMK TOP9000 board to build again:
- changes required due to ATMEL rework

Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
2011-06-21 22:26:22 +02:00
Reinhard Meyer
8c6407fce3 AT91 rework: fix at91sam(9260/9g20/9xe)ek board port to build again:
Make ATMEL's at91sam9260/9g20/9xe-ek boards build again

Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
2011-06-21 22:26:22 +02:00
Ryan Mallon
b8d41dda22 Add support for Bluewater Systems Snapper 9260/9G20 modules
Add support for Bluewater Systems AT91 based Snapper 9260 and 9G20
single board computer modules. Includes NAND flash and Ethernet
support.

Signed-off-by: Ryan Mallon <ryan@bluewatersys.com>
2011-06-21 22:26:21 +02:00
Jens Scharsig
8073399444 update arm/at91rm9200 work with rework rework110202
* convert at91rm9200ek and eb_cpux9k2 board to ATMEL_xxx name scheme
 * Fix: timer.c compile error io.h not found with arm/at91rm9200
 * update arm920t/at91 to ATMEL_xxx name scheme
 * update arm920t/at91 soc lib
 * update at91_emac driver

Signed-off-by: Jens Scharsig <js_at_ng@scharsoft.de>
Tested-by: Andreas Bießmann <andreas.devel@gmail.com>
2011-06-21 22:26:21 +02:00
Fabio Estevam
fc97102810 mx31pdk: Add DHCP command
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2011-06-21 22:26:21 +02:00
Helmut Raiger
61a58a16f8 mxc_spi.c: typo fixed
Signed-off-by: Helmut Raiger <helmut.raiger@hale.at>
2011-06-21 22:26:21 +02:00
Fabio Estevam
953ee4d09e imx31_phycore: Fix build by using new relocation scheme
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2011-06-21 22:26:21 +02:00
Fabio Estevam
e845f9006a mx1ads: Fix build by using new relocation scheme
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2011-06-21 22:26:21 +02:00
Stefano Babic
22a9ea974b MX31: QONG: drop config.mk
Remove obsolete config.mk from QONG board.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2011-06-21 22:26:21 +02:00
Aneesh V
154f53488e omap730p2: fix build breaks
Provide SDRAM base address and use SRAM for initial stack

Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-06-21 22:26:21 +02:00
Aneesh V
3712982019 omap2420h4: fix build breaks
DRAM base address and use SRAM for initial stack

Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-06-21 22:26:21 +02:00
Aneesh V
574fa1f02e omap1610inn: fix build breaks
Provide SDRAM base address and use SRAM for initial stack

Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-06-21 22:26:21 +02:00
Aneesh V
56ccd36fa1 omap1510inn: fix build breaks
Provide SDRAM base address and use SRAM for initial stack

Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-06-21 22:26:20 +02:00
Aneesh V
0f33ef946a omap5912osk: fix build breaks
Provide SDRAM base address and use SRAM for initial stack

Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-06-21 22:26:20 +02:00
Aneesh V
d59772eb75 omap1610h2: fix build breaks
Provide SDRAM base address and use SRAM for initial stack

Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-06-21 22:26:20 +02:00
Timur Tabi
29b83d9833 powerpc/p1022ds: set the clock-frequency prop only if the clock is enabled
The clock-frequency property in an audio codec's device tree node is set to
the input clock frequency for that codec.  On the Freescale P1022DS board,
the input clock is enabled only if the hwconfig 'audclk' option is set.
Therefore, the property should only be set in the device tree if the clock
is actually enabled.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-06-09 15:53:38 -05:00
Wolfgang Denk
9571865e0d Merge branch 'master' of git://git.denx.de/u-boot-arm
* 'master' of git://git.denx.de/u-boot-arm:
  SMDK6400: fix the compiler error
  imx27lite: Remove local config.mk
  mx31ads: Fix environment location on flash
  imx31_litekit: Remove local config.mk
  mx31litekit: Fix boot with the new relocation scheme.
  mx31ads: Use the new relocation scheme
2011-06-08 23:29:04 +02:00
Minkyu Kang
84b8085638 SMDK6400: fix the compiler error
This patch adds _end for fix following compiler error

arch/arm/cpu/arm1176/start.o: In function `_end_ofs':
arch/arm/cpu/arm1176/start.S:61: undefined reference to `_end'

Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2011-06-08 22:10:03 +02:00
Fabio Estevam
43f13e4ad7 imx27lite: Remove local config.mk
Local board config.mk should be avoided.

Place CONFIG_SYS_TEXT_BASE definition into the board config file instead.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2011-06-07 15:06:26 +02:00
Felix Radensky
ba8dcca78d mx31ads: Fix environment location on flash
At the moment u-boot and u-boot environment on flash
have overlapping addresses, so each u-boot update erases
the environment. Fix this by placing evironment right
after u-boot. Also, remove confusing comment about environment
location.

Signed-off-by: Felix Radensky <felix@embedded-sol.com>
2011-06-07 15:05:48 +02:00
Fabio Estevam
ac88e66e14 imx31_litekit: Remove local config.mk
Local board config.mk should be avoided.

Place CONFIG_SYS_TEXT_BASE definition into the board config file instead.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
2011-06-07 15:04:33 +02:00
Fabio Estevam
4e37731a27 mx31litekit: Fix boot with the new relocation scheme.
imx31_litekit has been converted to the new relocation scheme, but it does not boot.

Make the boot functional by using board_early_init_f .

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Tested-by: Magnus Lilja <lilja.magnus@gmail.com>
2011-06-06 09:35:25 +02:00
Fabio Estevam
4ac2e2d69f mx31ads: Use the new relocation scheme
This fixes the MX31ADS build by using the new relocation scheme.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Tested-by: Felix Radensky <felix@embedded-sol.com>
2011-06-06 09:35:25 +02:00
Harald Krapfenbauer
ba5c122846 Blackfin: cm-bf537e/cm-bf537u/tcm-bf537: update embedded env settings
The recent commit ea882baf9c broke embedding environments in the middle
of a sector, so relocate it to the start of the 2nd sector.

Signed-off-by: Harald Krapfenbauer <harald.krapfenbauer@bluetechnix.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-06-03 13:26:52 -04:00
Mike Frysinger
acf04b3059 Blackfin: boards: build zlib dir with -O2
Now that the zlib code has been relocated to a dedicated subdir, make
sure we still build it with -O2 for boards that want speed over size.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-06-03 13:26:45 -04:00
Mike Frysinger
1b48f126d6 Blackfin: bf548-ezkit/bf561-ezkit: update env location
Relocate the env to one of the small end sectors to avoid issues with
embedding it, such as support being broken (by recent commit ea882baf9c),
and for taking a while to save updates.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-06-03 13:26:45 -04:00
Mike Frysinger
9aeab10bd4 Blackfin: use on-chip reset func with newer parts
Turns out the documentation is wrong and doing "RAISE 1" does not result
in a software reset, only a core reset.  So when the on-chip rom has a
functioning reset helper, use it.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-06-03 13:26:45 -04:00
Mike Frysinger
867f54cc35 Blackfin: use common LDSCRIPT logic
Now that common code is a bit smarter when it comes to default LDSCRIPT
values, rename the default Blackfin file and drop the Blackfin-specific
config.mk logic.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-06-03 13:26:45 -04:00
Wolfgang Denk
6f4dd40cdd Prepare v2011.06-rc2
Signed-off-by: Wolfgang Denk <wd@denx.de>
2011-06-02 23:19:27 +02:00
Wolfgang Denk
4c9640865b Minor coding style cleanup
Signed-off-by: Wolfgang Denk <wd@denx.de>
2011-06-02 23:18:32 +02:00
Haojian Zhuang
b79003627d common/cmd_fdt.c: fix wrong data displayed in fdt print
All data in dtb is big endian. Some ARM devices are little-endian.
In print_data(), it displays data with big-endian format. For ARM device,
data should be converted to little-endian first.

Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
Cc: Gerald Van Baren <vanbaren@cideas.com>
2011-06-01 22:44:50 +02:00
Luuk Paulussen
d6840e3d7a sntp: avoid use of uninitialized variable
When we use the ntpserverip environment variable argv[1] may not be set.
Printing the error message using the NetNtpServerIP variable ensures the
correct output in both cases.

Signed-off-by: Luuk Paulussen <luuk.paulussen@alliedtelesis.co.nz>
Acked-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Cc: Ben Warren <biggerbadderben@gmail.com>
Acked-by: Detlev Zundel <dzu@denx.de>
2011-06-01 22:35:09 +02:00
Patrick Sestier
bd0d19cc5f sf: kick watchdog when polling
The status polling can take a while, so make sure we kick the
watchdog after each successful poll.

Signed-off-by: Patrick Sestier <psestier@mircom.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-06-01 22:21:42 +02:00
Enric Balletbo i Serra
23a70bf9c3 net/net.c: Update ipaddr if the environment has changed
At least on ARM the ipaddr is only set in board_init_r function. The
problem is if ipaddr is not defined in environment importing another
environment defined don't update the ipaddr value.

For example, suppose we've a default environment without net variables
defined and we want to import an uEnv.txt environment from SD-card like
this:

  ipaddr=192.168.2.240
  netmask=255.255.255.0
  gatewayip=192.168.2.1
  serverip=192.168.2.114

Then if you try boot from NFS results in:

  Importing environment from mmc ...
  Running uenvcmd ...
  smc911x: detected LAN9221 controller
  smc911x: phy initialized
  smc911x: MAC ac:de:48:00:00:00
  *** ERROR: `ipaddr' not set

The ipaddr at this point is NULL beacause is only set at board_init_r
function. This patch updates the ipaddr value if the environment has
changed.

Signed-off-by: Enric Balletbo i Serra <eballetbo@iseebcn.com>
Acked-by: Mike Frysinger <vapier@gentoo.org>
2011-06-01 22:17:49 +02:00
Wolfgang Denk
f345334d25 Merge branch 'master' of /home/wd/git/u-boot/custodians
* 'master' of /home/wd/git/u-boot/custodians:
  sh: sh7785lcr: Update BSC of USB area
2011-06-01 22:16:21 +02:00
Wolfgang Denk
1dddf21db3 Merge branch 'master' of git://git.denx.de/u-boot-sh
* 'master' of git://git.denx.de/u-boot-sh:
  sh: sh7785lcr: Update BSC of USB area
2011-06-01 22:16:19 +02:00
Wolfgang Denk
1a0787d3c4 Merge branch 'master' of /home/wd/git/u-boot/custodians
* 'master' of /home/wd/git/u-boot/custodians:
  SMDKV310: Fix incorrect conditional compilation for MIU linear mapping
  SMDKV310: CPU fequency and mmc_pre_ratio modified
  armv7: Add support for ST-Ericsson U8500 href platform
  I2C: Add driver for ST-Ericsson U8500 i2c
  armv7: Add ST-Ericsson u8500 arch
  Kirkwood: boards cleanup for deprecated CONFIG_CMD_AUTOSCRIPT
  ARMV7: Vexpress: Add missing MMC header
  arm/km: update mgcoge3un board support
  mvgbe: enable configurability of PORT_SERIAL_CONTROL_VALUE
  arm/km: rename mgcoge2un to mgcoge3un
  arm/km: add second serial interface for kirkwood
  arm/km: disable ls (through jffs2 support)
  arm/km: introduce bootcount env variable and clean km_arm
  arm/km: move CONFIG_EXTRA_ENV_SETTINGS from board to km_arm file
  arm/km: remove CONFIG_SYS_KWD_CONFIG from keymile-common.h
  ARMV7: MMC SPL Boot support for SMDKV310 board
  ARMV7: Add support for Samsung SMDKV310 Board
  S5PC2XX: clock: support pwm clock for evt1 (cpu revision 1)
  S5P: add set_mmc_clk for external clock control
  S5PC2XX: Support the cpu revision
  S5P:SROM config code moved to s5p-common directory
  Add _end for the end of u-boot image for SMDK6400
  MMC S5P: Fix typo
  S5P: GPIO Macro Values Corrected.
  SMDK2410: various cleanup/code style fixes
  SMDK2410: use the CFI driver (and remove the old one)
  SMDK2410: remove unneeded config.mk
  SMDK2410: activate ARM relocation feature
  BeagleBoard: fixed typo in typecast
  mvsata: issue hard reset on initialization
  VCMA9: use ARM relocation feature to fix build error
  MX31: drop warnings due to missing prototype for mxc_watchdog_reset()
  MX5: drop config.mk from efikamx board
  MX31: Make get_reset_cause() static and drop unreachable code
  MX53: Remove CONFIG_SYS_BOOTMAPSZ from mx53 config files.
  MX53: Handle silicon revision 2.1 case
  mx5: board: code clean up for checkboard code
  MX51: vision2: Fix build for vision2 board.
  MX51: vision: Let video mode struct be independant of watchdog.
  MX53: Add initial support for MX53SMD board.
  MX53: support for freescale MX53LOCO board
  mx5: Fix CONFIG_OF_LIBFDT redefined warning
  mx5: Remove unnecessary CONFIG_SYS_BOOTMAPSZ definition
  mx31pdk: Clean up mx31pdk.h file
2011-06-01 22:04:29 +02:00
Wolfgang Denk
033cd2c42b Merge branch 'master' of git://git.denx.de/u-boot-arm
* 'master' of git://git.denx.de/u-boot-arm:
  SMDKV310: Fix incorrect conditional compilation for MIU linear mapping
  SMDKV310: CPU fequency and mmc_pre_ratio modified
  armv7: Add support for ST-Ericsson U8500 href platform
  I2C: Add driver for ST-Ericsson U8500 i2c
  armv7: Add ST-Ericsson u8500 arch
  Kirkwood: boards cleanup for deprecated CONFIG_CMD_AUTOSCRIPT
  ARMV7: Vexpress: Add missing MMC header
  arm/km: update mgcoge3un board support
  mvgbe: enable configurability of PORT_SERIAL_CONTROL_VALUE
  arm/km: rename mgcoge2un to mgcoge3un
  arm/km: add second serial interface for kirkwood
  arm/km: disable ls (through jffs2 support)
  arm/km: introduce bootcount env variable and clean km_arm
  arm/km: move CONFIG_EXTRA_ENV_SETTINGS from board to km_arm file
  arm/km: remove CONFIG_SYS_KWD_CONFIG from keymile-common.h
  ARMV7: MMC SPL Boot support for SMDKV310 board
  ARMV7: Add support for Samsung SMDKV310 Board
  S5PC2XX: clock: support pwm clock for evt1 (cpu revision 1)
  S5P: add set_mmc_clk for external clock control
  S5PC2XX: Support the cpu revision
  S5P:SROM config code moved to s5p-common directory
  Add _end for the end of u-boot image for SMDK6400
  MMC S5P: Fix typo
  S5P: GPIO Macro Values Corrected.
  SMDK2410: various cleanup/code style fixes
  SMDK2410: use the CFI driver (and remove the old one)
  SMDK2410: remove unneeded config.mk
  SMDK2410: activate ARM relocation feature
  BeagleBoard: fixed typo in typecast
  mvsata: issue hard reset on initialization
  VCMA9: use ARM relocation feature to fix build error
  MX31: drop warnings due to missing prototype for mxc_watchdog_reset()
  MX5: drop config.mk from efikamx board
  MX31: Make get_reset_cause() static and drop unreachable code
  MX53: Remove CONFIG_SYS_BOOTMAPSZ from mx53 config files.
  MX53: Handle silicon revision 2.1 case
  mx5: board: code clean up for checkboard code
  MX51: vision2: Fix build for vision2 board.
  MX51: vision: Let video mode struct be independant of watchdog.
  MX53: Add initial support for MX53SMD board.
  MX53: support for freescale MX53LOCO board
  mx5: Fix CONFIG_OF_LIBFDT redefined warning
  mx5: Remove unnecessary CONFIG_SYS_BOOTMAPSZ definition
  mx31pdk: Clean up mx31pdk.h file
2011-06-01 22:04:12 +02:00
Wolfgang Denk
54ca033b0f Merge branch 'master' of /home/wd/git/u-boot/custodians
* 'master' of /home/wd/git/u-boot/custodians:
  powerpc/fsl_pci: Fix device tree fixups for newer platforms
2011-06-01 22:01:10 +02:00
Wolfgang Denk
2130b03309 Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx
* 'master' of git://git.denx.de/u-boot-mpc85xx:
  powerpc/fsl_pci: Fix device tree fixups for newer platforms
2011-06-01 22:01:07 +02:00
Wolfgang Denk
8aebd75a4a Merge branch 'master' of /home/wd/git/u-boot/custodians
* 'master' of /home/wd/git/u-boot/custodians:
  cmd_nand: fix help of nand erase subcommand
  env_nand: zero-initialize variable nand_erase_options
2011-06-01 21:59:27 +02:00
Marek Vasut
9f084b1e04 Move wepep250,delta,xsengine to scrapyard
Drop wepep250 board from MAINTAINERS and add all these three boards to
doc/README.scrapyard

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
2011-06-01 21:53:57 +02:00
Thomas Abraham
cd3af8b567 SMDKV310: Fix incorrect conditional compilation for MIU linear mapping
Fix the incorrect macro check for MIU linear mapping conditional compilation.

Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
Acked-by: Minkyu Kang <mk7.kang@samsung.com>
2011-06-01 19:45:59 +02:00
Chander Kashyap
cb56c0237d SMDKV310: CPU fequency and mmc_pre_ratio modified
Modifies CPU Frequency to 1GHz and removes hard coding of mmc_pre_ratio for
MMC Channel2 in FSYS2 register.

Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org>
Acked-by: Minkyu Kang <mk7.kang@samsung.com>
2011-06-01 19:41:32 +02:00
John Rigby
afbf88993c armv7: Add support for ST-Ericsson U8500 href platform
Minimal platform support to boot linux from SD.

Supported devices/hw limited to external MMC/SD slot,
GPIO, I2C and minimal PRCMU.

Signed-off-by: John Rigby <john.rigby@linaro.org>
CC: Albert Aribaud <albert.aribaud@free.fr>
2011-06-01 19:31:03 +02:00
Michael Brandt
d3d6427a3f I2C: Add driver for ST-Ericsson U8500 i2c
Signed-off-by: John Rigby <john.rigby@linaro.org>
CC: Heiko Schocher <hs@denx.de>
2011-06-01 19:22:47 +02:00
John Rigby
be72e0c8c5 armv7: Add ST-Ericsson u8500 arch
Based on ST-Ericsson internal git repo.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: John Rigby <john.rigby@linaro.org>
CC: Albert Aribaud <albert.aribaud@free.fr>
2011-06-01 19:22:41 +02:00
Nobuhiro Iwamatsu
091d8c3431 sh: sh7785lcr: Update BSC of USB area
A value of BSC of the USB was wrong.
This updates this.

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2011-06-01 10:20:19 +09:00
Albert ARIBAUD
92ff2d82b0 Kirkwood: boards cleanup for deprecated CONFIG_CMD_AUTOSCRIPT 2011-05-31 23:51:55 +02:00
Dirk Behme
a6f479cd85 ARMV7: Vexpress: Add missing MMC header
Add a header file with the missing function prototype to fix

ca9x4_ct_vxp.c: In function 'cpu_mmc_init':
ca9x4_ct_vxp.c:93: warning: implicit declaration of function 'arm_pl180_mmci_init'

introduced by commit "ARMV7: Vexpress: Add MMC support"
(f0c64526b7)

Signed-off-by: Dirk Behme <dirk.behme@googlemail.com>
CC: Andy Fleming <afleming@freescale.com>
CC: Matt Waddel <matt.waddel@linaro.org>
2011-05-31 22:25:23 +02:00
Holger Brunck
8612b70154 arm/km: update mgcoge3un board support
We change default settings for egiga on mgcoge3un.
The reason we need this is that we have the gig port on mgcoge3un
connected using a back-to-back pair of PHYs. There are no magnetics and
because of that the port has to be run with a fixd configuration and
auto-negotiation must be disabled. In the default mode the egiga driver
uses autoneg to determine port speed - which defaults to 1G (we need
100M full duplex).

Add wait for the GPIO line connected to mgcoge3ne before
starting mgcoge3un. A board specific ethernet present function
was added, because on this board ethernet is always present.
The BOCO FPGA access was enhanced and changed to use register
definitions.

Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
Acked-by: Heiko Schocher <hs@denx.de>
cc: Wolfgang Denk <wd@denx.de>
cc: Detlev Zundel <dzu@denx.de>
cc: Prafulla Wadaskar <prafulla@marvell.com>
2011-05-31 19:46:19 +02:00
Valentin Longchamp
d3920144e1 mvgbe: enable configurability of PORT_SERIAL_CONTROL_VALUE
This allows this configuration to be defined differently for some
boards that request it.

Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
cc: Holger Brunck <holger.brunck@keymile.com>
cc: Heiko Schocher <hs@denx.de>
cc: Wolfgang Denk <wd@denx.de>
cc: Detlev Zundel <dzu@denx.de>
cc: Prafulla Wadaskar <prafulla@marvell.com>
2011-05-31 19:46:14 +02:00
Valentin Longchamp
68d6963c44 arm/km: rename mgcoge2un to mgcoge3un
The mgcoge2un target was only an intermediate step to mgcoge3un.
For this reason the mgcoge2un support was moved to mgcoge3un,
because it isn't needed to support both targets.

We add the BootROM init file for the mgcoge3un memphis RAM.

We also move the suen3 and suen8 boards into the correct category
in the MAINTAINERS file.

Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Acked-by: Heiko Schocher <hs@denx.de>
cc: Wolfgang Denk <wd@denx.de>
cc: Detlev Zundel <dzu@denx.de>
cc: Prafulla Wadaskar <prafulla@marvell.com>
2011-05-31 19:45:59 +02:00
Holger Brunck
3d3c709697 arm/km: add second serial interface for kirkwood
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
Acked-by: Heiko Schocher <hs@denx.de>
cc: Wolfgang Denk <wd@denx.de>
cc: Detlev Zundel <dzu@denx.de>
cc: Prafulla Wadaskar <prafulla@marvell.com>
2011-05-31 19:45:54 +02:00
Valentin Longchamp
95e3979331 arm/km: disable ls (through jffs2 support)
This is not supported on our km-arm boards since we have defined
CONFIG_SYS_NO_FLASH for our NAND Flash chip.

With CONFIG_CMD_JFFS2, the ls command is present and works very badly
on our km-arm boards.

Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Acked-by: Heiko Schocher <hs@denx.de>
Acked-by: Prafulla Wadaskar <prafulla@marvell.com>
cc: Wolfgang Denk <wd@denx.de>
cc: Detlev Zundel <dzu@denx.de>
2011-05-31 19:45:34 +02:00
Valentin Longchamp
22c67d0839 arm/km: introduce bootcount env variable and clean km_arm
This environment variable is used to set the bootcount address
for the kernel.

last_stage_init is not available for arm platforms. So the
calls to set_km_var and set_bootcount_addr are done in
misc_init_r.

Additionally some unneeded printouts were removed.

Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Acked-by: Heiko Schocher <hs@denx.de>
cc: Wolfgang Denk <wd@denx.de>
cc: Detlev Zundel <dzu@denx.de>
cc: Prafulla Wadaskar <prafulla@marvell.com>
2011-05-31 19:45:27 +02:00
Valentin Longchamp
ea616d4def arm/km: move CONFIG_EXTRA_ENV_SETTINGS from board to km_arm file
Since all the boards define the same env settings, this simplifies
the board files.

Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
cc: Holger Brunck <holger.brunck@keymile.com>
cc: Heiko Schocher <hs@denx.de>
cc: Wolfgang Denk <wd@denx.de>
cc: Detlev Zundel <dzu@denx.de>
cc: Prafulla Wadaskar <prafulla@marvell.com>
2011-05-31 19:45:24 +02:00
Valentin Longchamp
b84ac38c23 arm/km: remove CONFIG_SYS_KWD_CONFIG from keymile-common.h
This define is marvell specific, so it should be present in km_arm.
It is however not needed there either, since we set it to the default
value that is already set in include/asm/arch-kirkwood/config.h

Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
cc: Holger Brunck <holger.brunck@keymile.com>
cc: Prafulla Wadaskar <prafulla@marvell.com>
cc: Heiko Schocher <hs@denx.de>
cc: Wolfgang Denk <wd@denx.de>
cc: Detlev Zundel <dzu@denx.de>
2011-05-31 19:45:02 +02:00
Chander Kashyap
0d3c62e466 ARMV7: MMC SPL Boot support for SMDKV310 board
Added MMC SPL boot support for SMDKV310. This framework design is
based on nand_spl support.

Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2011-05-26 19:33:57 +09:00
Chander Kashyap
e21185bae6 ARMV7: Add support for Samsung SMDKV310 Board
SMDKV310 board is based on Samsung S5PV310 SOC. This SOC is very much
similar to S5PC210.

Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org>
Signed-off-by: Tushar Behera <tushar.behera@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2011-05-26 19:33:44 +09:00
Minkyu Kang
b4f73910d9 S5PC2XX: clock: support pwm clock for evt1 (cpu revision 1)
The source of pwm clock is fixed at evt1.
And some registers for pwm clock are removed.

Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2011-05-26 19:33:25 +09:00
Jaehoon Chung
68a8cbfad9 S5P: add set_mmc_clk for external clock control
This patch added set_mmc_clk for external clock control.

c210 didn't support host clock control.
So We need external_clock_control function for c210.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
2011-05-26 19:33:09 +09:00
Minkyu Kang
5d845f2758 S5PC2XX: Support the cpu revision
S5PC210 SoC have two cpu revisions, and have some difference.
So, support the cpu revision for each revision.

Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
2011-05-26 19:31:11 +09:00
Chander Kashyap
b0ad862177 S5P:SROM config code moved to s5p-common directory
SROM config code is made common for S5P series of boards.
smdkc100.c now refers to s5p-common/sromc.c for SROM related
subroutines.

Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2011-05-26 19:30:46 +09:00
seedshope
920c428d0a Add _end for the end of u-boot image for SMDK6400
Since we rename _end to __bss_end__, But we need add _end symbol for
the end of u-boot image.

Signed-off-by: Zhong Hongbo <bocui107@gmail.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2011-05-26 19:30:31 +09:00
Dirk Behme
810423f405 MMC S5P: Fix typo
Fix typo resulting in the compilation error

s5p_mmc.c: In function 's5p_mmc_initialize':
s5p_mmc.c:469: error: 'struct mmc' has no member named 'm_bmax'

introduced by commit "MMC: make b_max unconditional"
(8feafcc49c)

Signed-off-by: Dirk Behme <dirk.behme@googlemail.com>
CC: John Rigby <john.rigby@linaro.org>
CC: Andy Fleming <afleming@freescale.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2011-05-26 19:30:19 +09:00
Chander Kashyap
898ddf0a36 S5P: GPIO Macro Values Corrected.
S5PC2XX: Macro values for Pull Up and Driver Strength were wrong.
S5PC1XX: Macro values for Driver Strength were wrong.

Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2011-05-26 19:30:06 +09:00
David Müller (ELSOFT AG)
d0b375f647 SMDK2410: various cleanup/code style fixes
Signed-off-by: David Müller <d.mueller@elsoft.ch>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2011-05-26 19:29:26 +09:00
David Müller (ELSOFT AG)
a5ec7f6494 SMDK2410: use the CFI driver (and remove the old one)
Signed-off-by: David Müller <d.mueller@elsoft.ch>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2011-05-26 19:29:13 +09:00
David Müller (ELSOFT AG)
4479fc5b20 SMDK2410: remove unneeded config.mk
Signed-off-by: David Müller <d.mueller@elsoft.ch>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2011-05-26 19:28:56 +09:00
David Müller (ELSOFT AG)
b9f15902b6 SMDK2410: activate ARM relocation feature
Signed-off-by: David Müller <d.mueller@elsoft.ch>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2011-05-26 19:28:34 +09:00
Daniel Hobi
eb3abce898 cmd_nand: fix help of nand erase subcommand
Since commit 30486322 (nand erase: .spread, .part, .chip subcommands)
the arguments off and size are no longer optional.

Signed-off-by: Daniel Hobi <daniel.hobi@schmid-telecom.ch>
Cc: Scott Wood <scottwood@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2011-05-24 16:08:44 -05:00
Daniel Hobi
3b250ffb41 env_nand: zero-initialize variable nand_erase_options
Commit 30486322 (nand erase: .spread, .part, .chip subcommands)
added a new field to struct nand_erase_options, but forgot to
update common/env_nand.c.

Depending on the stack state and bad block distribution, saveenv()
can thus erase more than CONFIG_ENV_RANGE bytes which may corrupt
the following NAND sectors/partitions.

Signed-off-by: Daniel Hobi <daniel.hobi@schmid-telecom.ch>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2011-05-24 16:08:44 -05:00
Jason Kridner
f14a522a6c BeagleBoard: fixed typo in typecast
Without this patch, you should get a warning.

Signed-off-by: Jason Kridner <jkridner@beagleboard.org>
Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
2011-05-23 09:04:39 +02:00
Michael Walle
70c55f5ab3 mvsata: issue hard reset on initialization
Before the actual initialization do a hard reset of the SATA port and the
connected device.

changes v1->v2:
 - add comment for udelay

Signed-off-by: Michael Walle <michael@walle.cc>
Cc: Prafulla Wadaskar <prafulla@marvell.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
2011-05-23 08:58:32 +02:00
David Müller (ELSOFT AG)
d2d945714d VCMA9: use ARM relocation feature to fix build error
Signed-off-by: David Müller <d.mueller@elsoft.ch>
2011-05-23 08:38:10 +02:00
Stefano Babic
bdb3c20386 MX31: drop warnings due to missing prototype for mxc_watchdog_reset()
Signed-off-by: Stefano Babic <sbabic@denx.de>
2011-05-23 08:36:46 +02:00
Stefano Babic
0e82efa14e MX5: drop config.mk from efikamx board
Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Marek Vasut <marek.vasut@gmail.com>
2011-05-23 08:36:46 +02:00
Stefano Babic
d43458d237 MX31: Make get_reset_cause() static and drop unreachable code
get_reset_cause() should not be exported. Drop code in the function
after return statement that can generate warnings due to unreachable code.

Signed-off-by: Stefano Babic <sbabic@denx.de>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2011-05-23 08:36:46 +02:00
Fabio Estevam
b302b15193 MX53: Remove CONFIG_SYS_BOOTMAPSZ from mx53 config files.
commit ed59e58 (Remove device tree booting dependency on CONFIG_SYS_BOOTMAPSZ) made the
definition of CONFIG_SYS_BOOTMAPSZ unnecessary.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Jason Liu <jason.hui@linaro.org>
2011-05-23 08:36:46 +02:00
Fabio Estevam
aa1cb689d5 MX53: Handle silicon revision 2.1 case
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2011-05-23 08:36:46 +02:00
Jason Liu
5195890440 mx5: board: code clean up for checkboard code
The boot cause code has been factor out to soc common
code,we need drop the part from the board support code

This patch also remove the redundant cpu version print

Signed-off-by: Jason Liu <jason.hui@linaro.org>
2011-05-23 08:36:46 +02:00
Fabio Estevam
c02d828059 MX51: vision2: Fix build for vision2 board.
config.mk should not be used in board directory and should be removed.
Use the same approach for building the image as other MX51/MX53 boards.

After this change vision2 board can be built again.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2011-05-23 08:36:46 +02:00
Fabio Estevam
c08f68c299 MX51: vision: Let video mode struct be independant of watchdog.
Currently the fb_videomode struct is only declared if CONFIG_HW_WATCHDOG is defined.

Remove this dependancy and let the video struct always be declared.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2011-05-23 08:36:46 +02:00
Fabio Estevam
860b32ee50 MX53: Add initial support for MX53SMD board.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2011-05-23 08:36:46 +02:00
Jason Liu
938080dc4b MX53: support for freescale MX53LOCO board
This patch add initial support for freescale MX53LOCO board.
Network(FEC),SD/MMC,UART have been supported by this patch

Signed-off-by: Jason Liu <jason.hui@linaro.org>
2011-05-23 08:36:46 +02:00
Shawn Guo
464bed5cd0 mx5: Fix CONFIG_OF_LIBFDT redefined warning
With the following commit, CONFIG_OF_LIBFDT is redefined.

  2fa8ca98c3
  Add CONFIG_OF_LIBFDT to more boards.

Remove the duplicated definition to fix CONFIG_OF_LIBFDT redefined
warning.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2011-05-23 08:36:46 +02:00
Shawn Guo
b78b40f6c0 mx5: Remove unnecessary CONFIG_SYS_BOOTMAPSZ definition
Since the following commit, definition CONFIG_SYS_BOOTMAPSZ is not
needed any more.

  ed59e58786
  Remove device tree booting dependency on CONFIG_SYS_BOOTMAPSZ

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2011-05-23 08:36:45 +02:00
Fabio Estevam
e89f1f9114 mx31pdk: Clean up mx31pdk.h file
No need to use '#define SYMBOL 1' to make it active.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2011-05-23 08:36:45 +02:00
ecc
5d1ee00b1f .gitignore: update list of u-boot.* files and add *.bin
This patch adds additional u-boot.* files mentioned in Makefile,
and adds *.bin since these are deleted as part of "make clean".

Signed-off-by: Eric Cooper <ecc@cmu.edu>
2011-05-22 23:46:26 +02:00
Wolfgang Denk
b777f39c31 MPC8xx: Make SPD823TS board build again
Commit e59e356 "TFTP: net/tftp.c: add server mode receive" caused the
size of some object files to grow which breaks the manually optimized
linking for the SPD823TS board.  Adjust linker script as needed.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2011-05-22 23:45:14 +02:00
Kumar Gala
8f29084a4f powerpc/fsl_pci: Fix device tree fixups for newer platforms
We assumed that only a small set of compatiable strings would be needed
to find the PCIe device tree nodes to be fixed up.  However on newer
platforms the simple rules no longer work.  We need to allow specifying
the PCIe compatiable string for each individual SoC.

We introduce CONFIG_SYS_FSL_PCIE_COMPAT for this purpose and set it if
the default isn't sufficient.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-05-20 00:48:41 -05:00
Wolfgang Denk
7a82c20814 Prepare v2011.06-rc1
Signed-off-by: Wolfgang Denk <wd@denx.de>
2011-05-19 22:23:50 +02:00
Wolfgang Denk
cd6881b519 Minor coding style cleanup.
Signed-off-by: Wolfgang Denk <wd@denx.de>
2011-05-19 22:22:44 +02:00
Luca Ceresoli
4d69e98c06 net/tftp.c: fix typo
Signed-off-by: Luca Ceresoli <luca.ceresoli@comelit.it>
Cc: Wolfgang Denk <wd@denx.de>
Acked-by: Detlev Zundel <dzu@denx.de>
2011-05-19 21:38:38 +02:00
Luca Ceresoli
7a83af07ae TFTP: add tftpsrv command
Signed-off-by: Luca Ceresoli <luca.ceresoli@comelit.it>
Cc: Wolfgang Denk <wd@denx.de>
Acked-by: Detlev Zundel <dzu@denx.de>
2011-05-19 21:38:32 +02:00
Luca Ceresoli
e59e35620a TFTP: net/tftp.c: add server mode receive
Signed-off-by: Luca Ceresoli <luca.ceresoli@comelit.it>
Cc: Wolfgang Denk <wd@denx.de>
Acked-by: Detlev Zundel <dzu@denx.de>
2011-05-19 21:38:26 +02:00
Luca Ceresoli
e3fb0abe2b TFTP: rename STATE_RRQ to STATE_SEND_RRQ
With the upcoming TFTP server implementation, requests can be either
outgoing or incoming, so avoid ambiguities.

Signed-off-by: Luca Ceresoli <luca.ceresoli@comelit.it>
Cc: Wolfgang Denk <wd@denx.de>
Acked-by: Detlev Zundel <dzu@denx.de>
2011-05-19 21:38:19 +02:00
Luca Ceresoli
20478ceaa2 TFTP: replace "server" with "remote" in local variable names
With the upcoming TFTP server implementation, the remote node can be
either a client or a server, so avoid ambiguities.

Signed-off-by: Luca Ceresoli <luca.ceresoli@comelit.it>
Cc: Wolfgang Denk <wd@denx.de>
Acked-by: Detlev Zundel <dzu@denx.de>
2011-05-19 21:38:12 +02:00
Luca Ceresoli
9bb0a1bf98 net/tftp.c: cosmetic: do not initialise statics to 0 or NULL
This removes the following checkpatch issue:
 - ERROR: do not initialise statics to 0 or NULL

Signed-off-by: Luca Ceresoli <luca.ceresoli@comelit.it>
Cc: Wolfgang Denk <wd@denx.de>
2011-05-19 21:36:21 +02:00
Luca Ceresoli
0bdd8acc35 net/tftp.c: cosmetic: fix indentation
This removes the following checkpatch issue:
 - WARNING: suspect code indent for conditional statements

Signed-off-by: Luca Ceresoli <luca.ceresoli@comelit.it>
Cc: Wolfgang Denk <wd@denx.de>
2011-05-19 21:36:15 +02:00
Luca Ceresoli
6d2231e8fa net/tftp.c: cosmetic: trailing statements should be on next line
This removes the following checkpatch issue:
 - ERROR: trailing statements should be on next line

Signed-off-by: Luca Ceresoli <luca.ceresoli@comelit.it>
Cc: Wolfgang Denk <wd@denx.de>
2011-05-19 21:36:08 +02:00
Luca Ceresoli
7bc325a1b2 net/tftp.c: cosmetic: fix brace issues
This removes the following checkpatch issues:
 - WARNING: braces {} are not necessary for single statement blocks
 - WARNING: braces {} are not necessary for any arm of this statement

Signed-off-by: Luca Ceresoli <luca.ceresoli@comelit.it>
Cc: Wolfgang Denk <wd@denx.de>
2011-05-19 21:36:02 +02:00
Luca Ceresoli
2cb5360807 net/tftp.c: cosmetic: do not use assignment in if condition
This removes the following checkpatch issue:
 - ERROR: do not use assignment in if condition.

There is one such error left:

  ERROR: do not use assignment in if condition
  #239: FILE: tftp.c:239:
  +		if (!ProhibitMcast
  +		 && (Bitmap = malloc(Mapsize))
  +		 && eth_get_dev()->mcast) {

which would require an additional nested if to be fixed, resulting in longer
and less readable code.

Signed-off-by: Luca Ceresoli <luca.ceresoli@comelit.it>
Cc: Wolfgang Denk <wd@denx.de>
2011-05-19 21:35:55 +02:00
Luca Ceresoli
2e320257c8 net/tftp.c: cosmetic: fix pointer syntax issues
This removes the following checkpatch issues:
 - ERROR: "foo * bar" should be "foo *bar"
 - ERROR: "(foo*)" should be "(foo *)"

Signed-off-by: Luca Ceresoli <luca.ceresoli@comelit.it>
Cc: Wolfgang Denk <wd@denx.de>
2011-05-19 21:35:48 +02:00
Luca Ceresoli
c718b1439b net/tftp.c: cosmetic: fix whitespace issues
This removes the following checkpatch issues:
 - ERROR: space prohibited before that close parenthesis ')'
 - ERROR: space required after that ';' (ctx:BxV)
 - ERROR: space required after that ',' (ctx:VxV)
 - ERROR: space required after that ';' (ctx:VxV)
 - ERROR: spaces required around that '<<=' (ctx:VxV)
 - ERROR: spaces required around that '<' (ctx:VxV)
 - ERROR: spaces required around that '=' (ctx:VxV)
 - ERROR: spaces required around that '+=' (ctx:VxV)
 - ERROR: spaces required around that '=' (ctx:VxW)
 - WARNING: please, no spaces at the start of a line
 - WARNING: space prohibited between function name and open parenthesis '('

Signed-off-by: Luca Ceresoli <luca.ceresoli@comelit.it>
Cc: Wolfgang Denk <wd@denx.de>
2011-05-19 21:35:40 +02:00
Luca Ceresoli
2f09413fd9 net/tftp.c: cosmetic: fix lines over 80 characters
Signed-off-by: Luca Ceresoli <luca.ceresoli@comelit.it>
Cc: Wolfgang Denk <wd@denx.de>
2011-05-19 21:34:48 +02:00
Wolfgang Denk
b0e51ebca2 Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx
* 'master' of git://git.denx.de/u-boot-mpc85xx:
  powerpc/85xx: add support for env in MMC/SPI on corenet ds boards
  powerpc/85xx: Enable eSPI support on corenet ds boards
2011-05-19 21:30:22 +02:00
Holger Brunck
638a48ed60 km/common: add pnvramsize to default environment
The pnvram size was used later from start scripts in linux. Therefore
it was added to the default environment.

Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
Acked-by: Heiko Schocher <hs@denx.de>
cc: Wolfgang Denk <wd@denx.de>
cc: Detlev Zundel <dzu@denx.de>
2011-05-18 23:05:40 +02:00
Holger Brunck
2d9528e32f km/common: simplify default environment
This is a first step to simplify the default environment. Move all
the environment variables which are only needed for debugging
purpose to textfiles in the scripts directory. In case of debugging
these files can be loaded via tftp into RAM and set via the env import
command. Other variables are identified as obsolete and were removed.

Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
Acked-by: Heiko Schocher <hs@denx.de>
cc: Wolfgang Denk <wd@denx.de>
cc: Detlev Zundel <dzu@denx.de>
2011-05-18 23:03:22 +02:00
Thomas Herzmann
92c91080e4 km/common: implement boardId HWkey checks as u-boot cmd
BoardId and HWKey are used to identify the HW class of a given board.
The correct values are stored in the inventory eeprom. During creation
time of a boot package the boardId and HWkey for the SW is stored in
the default environment and burned into the flash. During boottime
the values in the inventory and in the environment are compared to
avoid starting of a SW which is not authorized for this board.

Some bootpackages are allowed to run on a set of different boardId
hwKey. In this case the environment variable boardIdListHex was added
to the default environment. In this case the command iterates over the
pair values and compares them with the values read from the inventory
eeprom.

The syntax of such a boardIdListHex value is e.g.: 158_1 159_1 159_2

Signed-off-by: Thomas Herzmann <thomas.herzmann@keymile.com>
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
Acked-by: Heiko Schocher <hs@denx.de>
cc: Wolfgang Denk <wd@denx.de>
cc: Detlev Zundel <dzu@denx.de>
2011-05-18 23:02:55 +02:00
Dirk Behme
96e0e7b36c MMC: omap_hsmmc.c: Add missing prototype header
Add missing header file to fix compilation warning

omap_hsmmc.c: In function 'omap_mmc_init':
omap_hsmmc.c:474: warning: implicit declaration of function 'get_cpu_family'
omap_hsmmc.c:474: warning: implicit declaration of function 'get_cpu_rev'

introduced by commit "MMC: omap_hsmmc.c: disable
multiblock rw on old rev omap34xx silicon"
(4ca9244d74)

Signed-off-by: Dirk Behme <dirk.behme@googlemail.com>
CC: Andy Fleming <afleming@freescale.com>
CC: John Rigby <john.rigby@linaro.org>
2011-05-18 14:38:05 -05:00
Fabio Estevam
1ed60d7ade fsl_esdhc: Initialize mmc->b_max
commit 262951(MMC: make b_max unconditional) missed to update fsl_esdhc.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
2011-05-18 14:37:45 -05:00
Lei Wen
bc897b1d4d mmc: enable partition switch function for emmc
For emmc, it may have up to 7 partitions: two boot partitions, one
user partition, one RPMB partition and four general purpose partitions.
(Refer to JESD84-A44.pdf/page 154)

As bootloader may need to read out or reflashing images on those

different partitions, it is better to enable the partition switch with
console command support.

Also for partition would be restore to user partition(part 0) when CMD0
is used, so change mmc_init routine to perform normal initialization
only once for each slot, unless use the rescan command to force init
again.

Signed-off-by: Lei Wen <leiwen@marvell.com>
Acked-by: Andy Fleming <afleming@freescale.com>
2011-05-18 14:37:03 -05:00
Lei Wen
ea6ebe2177 cmd_mmc: eliminate device num in the mmc command
mmc command applied device, like ide and usb...

Signed-off-by: Lei Wen <leiwen@marvell.com>
Acked-by: Andy Fleming <afleming@freescale.com>
2011-05-18 14:36:35 -05:00
Thomas Chou
ed018b21d6 mmc_spi: generate response for send status command
A "send status" command is added with the commit "mmc: checking
status after commands with R1b response". But the status register
returned from send status command of SPI protocol is different from
that of MMC/SD protocol. We do a simple test and generate a response
in stead of full bit-by-bit translation.

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
2011-05-18 14:30:34 -05:00
Shaohui Xie
be827c7ab0 powerpc/85xx: add support for env in MMC/SPI on corenet ds boards
Signed-off-by: Shaohui Xie <b21989@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-05-18 09:15:25 -05:00
Shaohui Xie
2dd3095d87 powerpc/85xx: Enable eSPI support on corenet ds boards
Signed-off-by: Shaohui Xie <b21989@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-05-18 09:14:49 -05:00
Wolfgang Denk
0ea91423f4 Merge branch 'master' of git://git.denx.de/u-boot-arm
* 'master' of git://git.denx.de/u-boot-arm: (40 commits)
  avr32: add ATAG_BOARDINFO
  at91: reworked support for otc570 board
  at91: reworked support for meesc board
  hammerhead: move CONFIG_SYS_TEXT_BASE to header
  mimc200: move CONFIG_SYS_TEXT_BASE to header
  favr-32-ezkit: move CONFIG_SYS_TEXT_BASE to header
  atstk100x: move CONFIG_SYS_TEXT_BASE to header
  atngw100: move CONFIG_SYS_TEXT_BASE to header
  mimc200: fix "#define XXXX 1"
  hammerhead: fix "#define XXXX 1"
  favr-32-ezkit: fix "#define XXXX 1"
  atstk1006: fix "#define XXXX 1"
  atstk1004: fix "#define XXXX 1"
  atstk1003: fix "#define XXXX 1"
  atstk1002: fix "#define XXXX 1"
  atngw100: fix "#define XXXX 1"
  avr32: use single linker script
  avr32/config.mk: simplify PLATFORM_RELFLAGS
  avr32: fix linking
  Add support for Bluewater Systems Snapper 9260 and 9G20 modules
  ...
2011-05-18 14:31:56 +02:00
Wolfgang Denk
ce6400a0f8 Merge branch 'master' of git://git.denx.de/u-boot-nand-flash
* 'master' of git://git.denx.de/u-boot-nand-flash:
  nand_spl: nand_boot.c: Remove last CONFIG_SYS_NAND_READ_DELAY occurance
2011-05-18 14:30:31 +02:00
Andreas Bießmann
24890f1198 avr32: add ATAG_BOARDINFO
This patch adds a new ATAG_BORADINFO to U-Boot. This tag is intended to hand
over the bd->bi_board_number to the linux kernel for early stage board
information like a board revision or other kind of board specific decisions
necessary before the linux peripherial drivers are up.

Signed-off-by: Andreas Bießmann <biessmann@corscience.de>
2011-05-18 07:56:54 +02:00
Daniel Gorsulowski
a950c81851 at91: reworked support for otc570 board
The otc570 board support was broken. Within this opportunity, I completely
reworked the board files.

Signed-off-by: Daniel Gorsulowski <Daniel.Gorsulowski@esd.eu>
2011-05-18 07:56:54 +02:00
Daniel Gorsulowski
89ce8f73c6 at91: reworked support for meesc board
The meesc board support was broken. Within this opportunity, I completely
reworked the board files.

Signed-off-by: Daniel Gorsulowski <Daniel.Gorsulowski@esd.eu>
2011-05-18 07:56:54 +02:00
Andreas Bießmann
15cc55ac93 hammerhead: move CONFIG_SYS_TEXT_BASE to header
Signed-off-by: Andreas Bießmann <biessmann@corscience.de>
2011-05-18 07:56:54 +02:00
Andreas Bießmann
d85edc7c18 mimc200: move CONFIG_SYS_TEXT_BASE to header
Signed-off-by: Andreas Bießmann <biessmann@corscience.de>
2011-05-18 07:56:54 +02:00
Andreas Bießmann
8e218a9997 favr-32-ezkit: move CONFIG_SYS_TEXT_BASE to header
Signed-off-by: Andreas Bießmann <biessmann@corscience.de>
2011-05-18 07:56:54 +02:00
Andreas Bießmann
47293c18ba atstk100x: move CONFIG_SYS_TEXT_BASE to header
Signed-off-by: Andreas Bießmann <biessmann@corscience.de>
2011-05-18 07:56:54 +02:00
Andreas Bießmann
da48437230 atngw100: move CONFIG_SYS_TEXT_BASE to header
Signed-off-by: Andreas Bießmann <biessmann@corscience.de>
2011-05-18 07:56:54 +02:00
Andreas Bießmann
2607ecf26e mimc200: fix "#define XXXX 1"
Signed-off-by: Andreas Bießmann <biessmann@corscience.de>
2011-05-18 07:56:54 +02:00
Andreas Bießmann
bf018332ec hammerhead: fix "#define XXXX 1"
Signed-off-by: Andreas Bießmann <biessmann@corscience.de>
2011-05-18 07:56:54 +02:00
Andreas Bießmann
eacbfe7d75 favr-32-ezkit: fix "#define XXXX 1"
Signed-off-by: Andreas Bießmann <biessmann@corscience.de>
2011-05-18 07:56:53 +02:00
Andreas Bießmann
09d623cdfd atstk1006: fix "#define XXXX 1"
Signed-off-by: Andreas Bießmann <biessmann@corscience.de>
2011-05-18 07:56:53 +02:00
Andreas Bießmann
4de58bcb1a atstk1004: fix "#define XXXX 1"
Signed-off-by: Andreas Bießmann <biessmann@corscience.de>
2011-05-18 07:56:53 +02:00
Andreas Bießmann
38a3939869 atstk1003: fix "#define XXXX 1"
Signed-off-by: Andreas Bießmann <biessmann@corscience.de>
2011-05-18 07:56:53 +02:00
Andreas Bießmann
e3e8d46342 atstk1002: fix "#define XXXX 1"
Signed-off-by: Andreas Bießmann <biessmann@corscience.de>
2011-05-18 07:56:53 +02:00
Andreas Bießmann
b78431a43d atngw100: fix "#define XXXX 1"
Signed-off-by: Andreas Bießmann <biessmann@corscience.de>
2011-05-18 07:56:53 +02:00
Andreas Bießmann
bb7dc6af20 avr32: use single linker script
This patch move the atstk100x linker script to $(CPUDIR) and delete other
pure copies of this file in each board directory.

Signed-off-by: Andreas Bießmann <biessmann@corscience.de>
2011-05-18 07:56:53 +02:00
Andreas Bießmann
758472cc7b avr32/config.mk: simplify PLATFORM_RELFLAGS
This patch removes PLATFORM_RELFLAGS from board specific config.mk files and
define them in arch specific config.mk file.

Signed-off-by: Andreas Bießmann <biessmann@corscience.de>
2011-05-18 07:56:53 +02:00
Andreas Bießmann
c8e7ddd4c6 avr32: fix linking
This patch fixes following error:

---8<---
avr32-linux-ld: --gc-sections and -r may not be used together
--->8---

Since 8aba9dceeb all avr32 boards are broken due
to linking error as seen above.

Signed-off-by: Andreas Bießmann <biessmann@corscience.de>
2011-05-18 07:56:52 +02:00
Ryan Mallon
74cd9777f8 Add support for Bluewater Systems Snapper 9260 and 9G20 modules
Add support for Bluewater Systems AT91 based Snapper 9260 and 9G20
single board computer modules. Includes NAND flash and Ethernet
support.

Signed-off-by: Ryan Mallon <ryan@bluewatersys.com>
2011-05-18 07:56:52 +02:00
Daniel Gorsulowski
1069a5cf30 at91: fixed at91sam9263 system file
Signed-off-by: Daniel Gorsulowski <Daniel.Gorsulowski@esd.eu>
2011-05-18 07:56:52 +02:00
Jens Scharsig
673678eacf remove __attribute__ ((packed)) in at91 headers
* remove __attribute__ ((packed)) to prevent byte access
  to soc registers in some gcc version

Signed-off-by: Jens Scharsig <js_at_ng@scharsoft.de>
2011-05-18 07:56:52 +02:00
Jens Scharsig
ce26582606 at91rm9200: fix lowlevel_init() SMRDATA size
* use start/end label for initialization tables instead of fix values

Signed-off-by: Jens Scharsig <js_at_ng@scharsoft.de>
Acked-by: Andreas Bießmann <andreas.devel@googlemail.com>
2011-05-18 07:56:52 +02:00
Reinhard Meyer
cfff263f41 AT91: fix timer.c - remove reset_timer()
Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
2011-05-18 07:56:52 +02:00
Reinhard Meyer
7f6ed7ff7c AT91: fix at91sam_wdt.c to reworked header files
Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
2011-05-18 07:56:51 +02:00
Reinhard Meyer
50f750022b AT91: remove LEGACY from at91_rstc.h
Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
2011-05-18 07:56:51 +02:00
Reinhard Meyer
a0cfd18876 ATMEL: fix dataflash (dirty) this file should be converted to struct SoC access
Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
2011-05-18 07:56:51 +02:00
Reinhard Meyer
86592f6059 AT91: change includes from asm/arch/io.h to asm/io.h
and remove the now unused asm/arch-at91/io.h

Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
2011-05-18 07:56:51 +02:00
Reinhard Meyer
60af568038 AT91: cleanup at91sam9260_matrix.h to struct SoC access
Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
2011-05-18 07:56:51 +02:00
Reinhard Meyer
329f0f52fa ATMEL: fix related common atmel driver files
Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
2011-05-18 07:56:51 +02:00
Reinhard Meyer
372f2783a7 AT91: fix related at91 driver files
Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
2011-05-18 07:56:51 +02:00
Reinhard Meyer
9f3fe90f09 AT91: fix related at91 system/driver files
Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
2011-05-18 07:56:51 +02:00
Reinhard Meyer
83f1072e06 AT91: fix related arch-at91 header files
Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
2011-05-18 07:56:51 +02:00
Reinhard Meyer
405e5919f2 AT91: cleanup hardware.h, remove memory-map.h
Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
2011-05-18 07:56:50 +02:00
Reinhard Meyer
4b1f9b1b36 AT91: rework at91sam9g45.h
Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
2011-05-18 07:56:50 +02:00
Reinhard Meyer
09aca70fa4 AT91: rework at91sam9263.h
Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
2011-05-18 07:56:50 +02:00
Reinhard Meyer
5e5925930b AT91: rework at91sam9261.h
Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
2011-05-18 07:56:50 +02:00
Reinhard Meyer
aa0f5ef20d AT91: rework at91sam9260.h
Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
2011-05-18 07:56:50 +02:00
Andreas Bießmann
f4278b716c avr32: fixup definitions to ATMEL_BASE_xxx
Signed-off-by: Andreas Bießmann <biessmann@corscience.de>
2011-05-18 07:56:50 +02:00
Andreas Bießmann
5d73bc7af7 avr32: rename memory-map.h -> hardware.h
Signed-off-by: Andreas Bießmann <biessmann@corscience.de>
2011-05-18 07:56:50 +02:00
Thomas Chou
e09e083f7f nios2: Make STANDALONE_LOAD_ADDR configurable per board
Follow commit 8ae86b76c6
which changed the variable name.

Fix this error,
nios2-elf-ld: invalid hex number `-o'

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Signed-off-by: Scott McNutt <smcnutt@psyent.com>
2011-05-16 21:00:43 -04:00
Stefan Roese
e29816f330 nand_spl: nand_boot.c: Remove last CONFIG_SYS_NAND_READ_DELAY occurance
Remove the last CONFIG_SYS_NAND_READ_DELAY occurance from nand_boot.c.
I missed this one in patch a9c847cb [nand_spl: nand_boot.c: Remove
CONFIG_SYS_NAND_READ_DELAY].

This fixes a compile breakage on kilauea_nand for example.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Scott Wood <scottwood@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2011-05-16 14:10:19 -05:00
Wolfgang Denk
535abb96fb Merge branch 'master' of git://git.denx.de/u-boot-nand-flash 2011-05-15 23:23:36 +02:00
Wolfgang Denk
77467e2560 Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx 2011-05-15 23:20:10 +02:00
Stefan Roese
a9c847cb38 nand_spl: nand_boot.c: Remove CONFIG_SYS_NAND_READ_DELAY
There are multiple reasons why this define should be removed:

First it saves some space and therefore fixes a problem we have on
the canyonlands_nand and glacier_nand targets right now.

Second, the define was hackish and would most likely not work on all
board using nand_boot.c. Boards not providing a real dev_ready()
function should implement a board specific function instead.

I checked and it seems, that all boards using nand_boot.c right now
already implement a board specific dev_ready() function. So this
patch should not break any boards and will result in smaller
NAND_SPL images.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Scott Wood <scottwood@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Sughosh Ganu <urwithsughosh@gmail.com>
Cc: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
Tested-by: Sughosh Ganu <urwithsughosh@gmail.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2011-05-13 11:13:21 -05:00
Stefan Roese
a89a990159 nand_spl: nand_boot.c: Init nand_chip.options to 0
Patch 65a9db7b [nand_spl: Fix large page nand_command()] broke
nand booting on canyonlands. "options" has to be initialized to
0. If not, boards might have the NAND_BUSWIDTH_16 bit set,
resulting in wrong offset calculation.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Scott Wood <scottwood@freescale.com>
Cc: Alex Waterman <awaterman@dawning.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2011-05-13 11:07:49 -05:00
Alex Waterman
8370978318 Decreases code size of the nand_spl
The canyonland boards nand_spl size is just under the maximum 4KByte size. This
patch decreases the size of the nand_spl to make a previous commit - commit
65a9db7be0 - fit in the nand_spl.

Signed-off-by: Alex Waterman <awaterman@dawning.com>
Acked-by: Stefan Roese <sr@denx.de>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2011-05-13 11:07:01 -05:00
Wolfgang Denk
91081e01b1 Revert "Fix building tools alone with host compiler"
This reverts commit bbc6353c74.
It breaks building on many systems:
...
.../common/env_embedded.c:28:20: fatal error: config.h: No such file or directory
compilation terminated.
.../common/image.c:27:20: fatal error: common.h: No such file or directory
compilation terminated.
.../lib/crc32.c:12:20: fatal error: common.h: No such file or directory
compilation terminated.
.../lib/md5.c:28:22: fatal error: compiler.h: No such file or directory
compilation terminated.
.../lib/sha1.c:33:20: fatal error: common.h: No such file or directory
compilation terminated.
2011-05-13 13:37:20 +02:00
York Sun
d49f8e04db powerpc/mpc8xxx: reword max tCKmin message
Reword "The DIMM max tCKmin is ..." to "The DDR clock is faster than the slowest
DIMM(s) can support". Fixed interger type in printf as well.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-05-13 00:36:11 -05:00
Timur Tabi
ee4756d4cb powerpc/85xx: fix compatible property for the L2 cache node
The compatible property for the L2 cache node (on 85xx systems that don't
have a CPC) was using a value for the property length that did not match
the actual length of the property.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-05-13 00:36:11 -05:00
Nobuhiro Iwamatsu
3500e9aed6 kwbimage: Fix check variable of checksum
calc_hdrcsum two times are checked. checksumi of exthdr is not checked.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
CC: Prafulla Wadaskar <prafulla@marvell.com>
2011-05-12 23:53:41 +02:00
Mike Frysinger
201a017c2f examples: add smc911x_eeprom to clean target
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-05-12 23:52:10 +02:00
Macpaul Lin
ac56032676 ftpmu010.h: fix some missing declaration in header
Fix some missing declaration in header.

Signed-off-by: Macpaul Lin <macpaul@andestech.com>
2011-05-12 23:44:33 +02:00
Macpaul Lin
10ba1d3cff ftsmc020: add missing definitions
Add missing definitions in header file according to datasheet.

Signed-off-by: Macpaul Lin <macpaul@andestech.com>
2011-05-12 23:43:38 +02:00
Macpaul Lin
56cd247232 ftsmc020: un-nest the register structure in header
Un-nestted the register structure in ftsmc020.h

Signed-off-by: Macpaul Lin <macpaul@andestech.com>
2011-05-12 23:43:33 +02:00
Macpaul Lin
f194f6ba5b ftsmc020: fix relocation
Avoid relocation problem by fix global declaration.

Signed-off-by: Macpaul Lin <macpaul@andestech.com>
2011-05-12 23:43:27 +02:00
Macpaul Lin
4bed7265f2 ftide020: add faraday ide ahb controller
Faraday's ftide020_s is an IDE-AHB controller for SoC design.
This patch add the u-boot driver (PIO) of ftide020 ATA (IDE) driver.
IDE commands include read, info, and other functions has been implemented.

Because this IDE controller support AHB interface only which is differ
from other most IDE controller supports PCI interface. Some registers
access is required during CMD/DATA I/O. Hence a configuration
"CONFIG_IDE_AHB" is required to be defined according to the feature in
cmd_ide.c.

Signed-off-by: Macpaul Lin <macpaul@andestech.com>
2011-05-12 23:41:44 +02:00
Ben Gardiner
7124015ada README.arm-relocation: get relocated address in gdb
When your emulator is connected at reset (or is used to load u-boot)
it is possible to get the relocation address from the gd->relocaddr
since gd is always in r8 (on ARM) it is addressable before the
gdb has remapped symbols.

Document this alternate method in-line with the original method
written by Heiko Schocher.

Signed-off-by: Ben Gardiner <bengardiner@nanometrics.ca>
CC: Heiko Schocher <hs@denx.de>
CC: Wolfgang Denk <wd@denx.de>
Acked-by: Heiko Schocher <hs@denx.de>
2011-05-12 23:34:02 +02:00
Ben Gardiner
f4379ceff0 README.arm-relocation: get relocated address from bdinfo
The bdinfo command prints the relocaddr on ARM as it does
on PPC.

Update the debugging instructions for arm relocation to
reflect this fact rather than requiring that the user
rebuild the u-boot image using -DDEBUG.

Signed-off-by: Ben Gardiner <bengardiner@nanometrics.ca>
CC: Wolfgang Denk <wd@denx.de>
Acked-by: Heiko Schocher <hs@denx.de>
2011-05-12 23:33:32 +02:00
Macpaul Lin
5902e8f711 cosmetic: cmd_bdinfo.c: clean up by using checkpatch.pl
cmd_bdinfo.c: clean up with 2.6.38 checkpatch.pl

Signed-off-by: Macpaul Lin <macpaul@andestech.com>
Acked-by: Detlev Zundel <dzu@denx.de>
2011-05-12 23:31:07 +02:00
Eric Bénard
25ee9616de mp2usb: finish the removal
- remove from boards.cfg
- add to doc/README.scrapyard

Signed-off-by: Eric Bénard <eric@eukrea.com>
2011-05-12 23:28:40 +02:00
Detlev Zundel
6abe6fb68b README: Clarify difference of CONFIG_WATCHDOG and CONFIG_HW_WATCHDOG
Now that we have the documentation, the code should be changed to reflect
it ;)

Asd far as I can see, these are the places where HW_WATCHDOG is used
instead of WATCHDOG:

arch/blackfin/cpu/blackfin/watchdog.c
arch/m68k/cpu/mcf547x_8x/cpu.c

The relevant maintainers are on CC.

Signed-off-by: Detlev Zundel <dzu@denx.de>
Cc: Mike Frysinger <vapier@gentoo.org>
Cc: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
2011-05-12 23:26:07 +02:00
Macpaul Lin
b1196a3fba ftsdmc021: add register definitions of ftsdmc021
Support registers definitions of ftsdmc021 SDRAM controller.

Signed-off-by: Macpaul Lin <macpaul@andestech.com>
2011-05-12 23:25:28 +02:00
Macpaul Lin
4bb87d2b3f ftahbc020s: Faraday FTAHBC020s AHB Bus Controller
ftahbc020s.h provides basic definitions of this controller
to help a SoC which use this AHB Controller could
do scalable software settings in lowlevel_init.S.

Signed-off-by: Macpaul Lin <macpaul@andestech.com>
2011-05-12 23:24:11 +02:00
Joakim Tjernlund
cd8c87756a Fix a few gcc warnings.
Noticed while building all of mpc8xx. Also
constify usage string in timer.c
Warnings fixed are:
timer.c: In function 'timer':
timer.c:189: warning: format not a string literal and no format arguments
timer.c:258: warning: format not a string literal and no format arguments
atm.c: In function 'atmUnload':
atm.c:99: warning: array subscript is above array bounds
atm.c: In function 'atmLoad':
atm.c:65: warning: array subscript is above array bounds
codec.c: In function 'codsp_write_pop_int':
codec.c:678: warning: array subscript is above array bounds
codec.c: In function 'codsp_write_cop_short':
codec.c:585: warning: array subscript is above array bounds
codec.c: In function 'codsp_write_sop_int':
codec.c:512: warning: array subscript is above array bounds

Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
2011-05-12 23:17:52 +02:00
Michael Jones
2cc195e0a5 Remove remnants of obsolete CONFIG_SYS_GBL_DATA_SIZE comments
commit 25ddd1fb0a left remnants of
many comments about CONFIG_SYS_GBL_DATA_SIZE.

Signed-off-by: Michael Jones <michael.jones@matrix-vision.de>
2011-05-12 23:04:55 +02:00
Dirk Eibach
31c1bdd93d hwmon: Extend lm63.c to support LM64
This patch adds support for the National LM64 temperature
sensor with integrated fan control to lm63.c.
Main difference between LM63 and LM64 is 16°C offset in sensor
readings.

Signed-off-by: Dirk Eibach <eibach@gdsys.de>
2011-05-12 23:01:34 +02:00
François Revol
bbc6353c74 Fix building tools alone with host compiler
- don't include config.h when building with host cc,
- HOSTCFLAGS was defined with the wrong name, so wasn't used,
- make sure make finds sources outside of tools/.

Signed-off-by: Franois Revol <revol@free.fr>
2011-05-12 22:46:42 +02:00
Michal Simek
95efa79d08 net: xilinx emaclite: Fix return values
Fix return values for initialize/init/recv/send functions

Signed-off-by: Michal Simek <monstr@monstr.eu>
2011-05-12 22:29:28 +02:00
Che-liang Chiou
0da43893dd Fix variable flavor in examples/standalone/Makefile
GNU Makefile have two flavors of variables, recursively expanded that is
defined by using '=', and simply expanded that is defined by using ':='.

The bug is caused by using recursively expanded flavor for BIN and SREC.
As you can see below, they are prepended by $(obj) twice.

We can reproduce this bug with a simplified version of this Makefile:
$ cat >Makefile <<\EOF
obj := /path/to/obj/
ELF := hello_world

BIN_rec = $(addsuffix .bin,$(ELF))      # recursively expanded
BIN_sim := $(addsuffix .bin,$(ELF))     # simply expanded

ELF := $(addprefix $(obj),$(ELF))
BIN_rec := $(addprefix $(obj),$(BIN_rec))
BIN_sim := $(addprefix $(obj),$(BIN_sim))

show:
	@echo BIN_rec=$(BIN_rec)
	@echo BIN_sim=$(BIN_sim)

.PHONY: show
EOF
$ make show
BIN_rec=/path/to/obj//path/to/obj/hello_world.bin
BIN_sim=/path/to/obj/hello_world.bin

Signed-off-by: Che-Liang Chiou <clchiou@chromium.org>
2011-05-12 22:25:16 +02:00
Luca Ceresoli
ccb9ebefbe net/net.c: cosmetic: do not use assignment in if condition
This removes the following checkpatch issue:
 - ERROR: do not use assignment in if condition

Signed-off-by: Luca Ceresoli <luca.ceresoli@comelit.it>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Ben Warren <biggerbadderben@gmail.com>
2011-05-12 22:07:41 +02:00
Luca Ceresoli
c819abeef7 net/net.c: cosmetic: fix indentation
This removes the following checkpatch issues:
 - ERROR: switch and case should be at the same indent
 - WARNING: suspect code indent for conditional statements
 - WARNING: labels should not be indented

Signed-off-by: Luca Ceresoli <luca.ceresoli@comelit.it>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Ben Warren <biggerbadderben@gmail.com>
2011-05-12 22:07:31 +02:00
Luca Ceresoli
92895de978 net/net.c: cosmetic: parentheses not required for return
This removes the following checkpatch issue:
 - ERROR: return is not a function, parentheses are not required

Signed-off-by: Luca Ceresoli <luca.ceresoli@comelit.it>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Ben Warren <biggerbadderben@gmail.com>
2011-05-12 22:06:04 +02:00
Luca Ceresoli
6b147d1139 net/net.c: cosmetic: fix pointer syntax issues
This removes the following checkpatch issues:
 - ERROR: "foo * bar" should be "foo *bar"
 - ERROR: "(foo*)" should be "(foo *)"

Signed-off-by: Luca Ceresoli <luca.ceresoli@comelit.it>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Ben Warren <biggerbadderben@gmail.com>
2011-05-12 22:03:47 +02:00
Luca Ceresoli
d3c65b015a net/net.c: cosmetic: fix brace issues
This removes the following checkpatch issues:
 - WARNING: braces {} are not necessary for single statement blocks
 - WARNING: braces {} are not necessary for any arm of this statement

Signed-off-by: Luca Ceresoli <luca.ceresoli@comelit.it>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Ben Warren <biggerbadderben@gmail.com>
2011-05-12 22:01:34 +02:00
Luca Ceresoli
4f63acd062 net/net.c: cosmetic: fix whitespace issues
This removes the following checkpatch issues:
 - ERROR: space prohibited after that open parenthesis '('
 - ERROR: space prohibited before that close parenthesis ')'
 - ERROR: space prohibited after that open square bracket '['
 - ERROR: space prohibited after that '&' (ctx:WxW)
 - ERROR: spaces required around that '=' (ctx:VxW)
 - ERROR: space required before the open parenthesis '('
 - ERROR: space required after that ',' (ctx:VxV)
 - ERROR: need consistent spacing around '+' (ctx:WxV)
 - WARNING: unnecessary whitespace before a quoted newline
 - WARNING: please, no spaces at the start of a line
 - WARNING: space prohibited between function name and open
   parenthesis '('

Signed-off-by: Luca Ceresoli <luca.ceresoli@comelit.it>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Ben Warren <biggerbadderben@gmail.com>
Cc: Mike Frysinger <vapier@gentoo.org>
2011-05-12 22:01:05 +02:00
Luca Ceresoli
c586ce6e01 net/net.c: cosmetic: variable initializations
This removes the following checkpatch errors:
 - ERROR: do not initialise globals to 0 or NULL
 - ERROR: spaces required around that '=' (ctx:VxV)
 - ERROR: that open brace { should be on the previous line

Signed-off-by: Luca Ceresoli <luca.ceresoli@comelit.it>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Ben Warren <biggerbadderben@gmail.com>
Cc: Mike Frysinger <vapier@gentoo.org>
2011-05-12 21:49:56 +02:00
Luca Ceresoli
3e38e429ff net/net.c: cosmetic: fix lines over 80 characters
This removes the following checkpatch warning:
 - WARNING: line over 80 characters

There are three such warnings left.

The first is hard to fix with cosmetic-only changes without compromising code
readability, so I'm leaving it as it is for now:
  WARNING: line over 80 characters
  #1537: FILE: net.c:1537:
  + [4 tabs] memcpy(((Ethernet_t *)NetArpWaitTxPacket)->et_dest, ...

The other two cannot be fixed without splitting string literals, so it is
preferred to keep them longer than 80 characters.

Signed-off-by: Luca Ceresoli <luca.ceresoli@comelit.it>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Ben Warren <biggerbadderben@gmail.com>
Cc: Mike Frysinger <vapier@gentoo.org>
2011-05-12 21:49:49 +02:00
Heiko Schocher
a7fd0d9ffd lib, vsprintf: introduce strict_strtoul
as checkpatch proposes to use strict_strtoul instead of
simple_strtoul, introduce it.

Ported this function from Linux 2.6.38 commit ID:
521cb40b0c44418a4fd36dc633f575813d59a43d

Signed-off-by: Heiko Schocher <hs@denx.de>
cc: Wolfgang Denk <wd@denx.de>
cc: Detlev Zundel <dzu@denx.de>
cc: Valentin Longchamp <valentin.longchamp@keymile.com>
cc: Holger Brunck <holger.brunck@keymile.com>
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
2011-05-12 21:07:06 +02:00
Wolfgang Denk
f0c0b3a9e6 Fix incorrect use of getenv() before relocation
A large number of boards incorrectly used getenv() in their board init
code running before relocation.  In some cases this caused U-Boot to
hang when certain environment variables grew too long.
Fix the code to use getenv_r().

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: The LEOX team <team@leox.org>
Cc: Michael Schwingen <michael@schwingen.org>
Cc: Georg Schardt <schardt@team-ctech.de>
Cc: Werner Pfister <Pfister_Werner@intercontrol.de>
Cc: Dirk Eibach <eibach@gdsys.de>
Cc: Peter De Schrijver <p2@mind.be>
Cc: John Zhan <zhanz@sinovee.com>
Cc: Rishi Bhattacharya <rishi@ti.com>
Cc: Peter Tyser <ptyser@xes-inc.com>
2011-05-12 19:48:42 +02:00
Wolfgang Denk
a02a884b95 cmd_nvedit.c: make error message more helpful
When calling getenv_f() with a too small buffer, it would print an
error message like this:

	env_buf too small [32]

This is not really helpful as it does not give any indication which of
the calls might have failed.  Change this into:

	env_buf [32 bytes] too small for value of "hwconfig"

so we know at least which variable caused the overflow; this usually
allows to quickly find the related code as well.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2011-05-12 19:47:14 +02:00
Luca Ceresoli
03eb129f8a NET: pass source IP address to packet handlers
This is needed for the upcoming TFTP server implementation.

This also simplifies PingHandler() and fixes rxhand_f documentation.

Signed-off-by: Luca Ceresoli <luca.ceresoli@comelit.it>
Cc: Wolfgang Denk <wd@denx.de>
Acked-by: Detlev Zundel <dzu@denx.de>
2011-05-12 19:38:19 +02:00
Luca Ceresoli
8eccee7ae7 README: remove spurious line
Signed-off-by: Luca Ceresoli <luca.ceresoli@comelit.it>
Cc: Wolfgang Denk <wd@denx.de>
Acked-by: Detlev Zundel <dzu@denx.de>
2011-05-12 19:37:10 +02:00
Wolfgang Denk
9e2b517637 MPC8260: Fix compile problems with "hymod" board
Commit 9d8fbd1 "powerpc, 8xx: Fixup all 8xx u-boot.lds scripts" broke
building of the MPC8260 based "hymod" board.  Fix this.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Murray Jensen <Murray.Jensen@csiro.au>
Cc: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
2011-05-12 19:31:05 +02:00
Mike Frysinger
f18185ab60 zlib: fix DEBUG build
The previous commit imported a little too much from upstream.  We need
to disable stdio.h when using U-Boot.

Reported-by: Wolfgang Denk <wd@denx.de>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-05-12 19:30:29 +02:00
Wolfgang Denk
0e0c0892a1 Merge branch 'master' of git://git.denx.de/u-boot-ppc4xx 2011-05-12 19:27:42 +02:00
Wolfgang Denk
162eee4106 Merge branch 'master' of git://git.denx.de/u-boot-arm 2011-05-12 19:26:45 +02:00
Simon Guinot
8b6bbe104f netconsole: remove `serverip' check
Netconsole use the environment variable `ncip' to configure the
destination IP. `serverip' don't need to be defined.

Signed-off-by: Simon Guinot <sguinot@lacie.com>
2011-05-12 19:11:51 +02:00
John Rigby
910f1ae3eb Serial: p1011: new vendor init options
Two new options:

CONFIG_PL011_SERIAL_RLCR

Some vendor versions of PL011 serial ports (e.g. ST-Ericsson U8500)
have separate receive and transmit line control registers.  Set
this variable to initialize the extra register.

CONFIG_PL011_SERIAL_FLUSH_ON_INIT

On some platforms (e.g. U8500) U-Boot is loaded by a second stage
boot loader that has already initialized the UART.  Define this
variable to flush the UART at init time.
empty fifo on init

Signed-off-by: John Rigby <john.rigby@linaro.org>
Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com>
2011-05-12 19:09:07 +02:00
Steven A. Falco
644362c40a PPC405EX CHIP_21 erratum
APM errata CHIP_21 for the 405EX/EXr (from the rev 1.09 document dated
4/27/11) states that rev D processors may wake up with the wrong feature
set.  This patch implements the APM-proposed workaround.

To enable this patch for your board, add the appropriate define for your
CPU to your board header file.  See kilauea.h for more information.  The
following variants are supported:

#define CONFIG_SYS_4xx_CHIP_21_405EX_NO_SECURITY
#define CONFIG_SYS_4xx_CHIP_21_405EX_SECURITY
#define CONFIG_SYS_4xx_CHIP_21_405EXr_NO_SECURITY
#define CONFIG_SYS_4xx_CHIP_21_405EXr_SECURITY

Please note that if you select the wrong define, your board will not
boot, and JTAG will be required to recover.

Tested on custom boards using:

CONFIG_SYS_4xx_CHIP_21_405EX_NO_SECURITY  <sfalco@harris.com>
CONFIG_SYS_4xx_CHIP_21_405EX_SECURITY     <eibach@gdsys.de>

Signed-off-by: Steve Falco <sfalco@harris.com>
Acked-by: Dirk Eibach <eibach@gdsys.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2011-05-12 16:10:51 +02:00
Clint Adams
2e73808ee9 Enable multiple fs options for Marvell SoC family on OpenRD boards
Signed-off-by: Clint Adams <clint@debian.org>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Prafulla Wadaskar <prafulla@marvell.com>
Cc: Julian Pidancet <julian.pidancet@citrix.com>
2011-05-11 23:03:16 +02:00
Clint Adams
1615db3c1c Initialize second PHY on OpenRD-Client and OpenRD-Ultimate
Though the OpenRD-Base only has one gigabit Ethernet port,
both the OpenRD-Client and OpenRD-Ultimate each have two.

On the Ultimate, the PHY addresses are consecutive, but
on the Client they are not.

(based on
<62a0952ce368acc725063a00a5ec680a639d6c27.1301040318.git.julian.pidancet@citrix.com>
<ad0a2dc1e422698b005d6f0ceb6dd6f75a87e00a.1301040318.git.julian.pidancet@citrix.com>
)

Signed-off-by: Clint Adams <clint@debian.org>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Prafulla Wadaskar <prafulla@marvell.com>
Cc: Julian Pidancet <julian.pidancet@citrix.com>
2011-05-11 23:03:16 +02:00
Clint Adams
21861f2d39 Add definitions for OpenRD-Client and OpenRD-Ultimate
Signed-off-by: Clint Adams <clint@debian.org>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Prafulla Wadaskar <prafulla@marvell.com>
Cc: Julian Pidancet <julian.pidancet@citrix.com>
2011-05-11 23:03:16 +02:00
Clint Adams
f846604ff5 Rename openrd_base files to openrd
Signed-off-by: Clint Adams <clint@debian.org>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Prafulla Wadaskar <prafulla@marvell.com>
Cc: Julian Pidancet <julian.pidancet@citrix.com>
2011-05-11 23:03:16 +02:00
Simon Guinot
2f795ac74e mv-common.h: fix DRAM banks configuration
The asm/arch/config.h header define CONFIG_NR_DRAM_BANKS_MAX, which is
needed to configure DRAM banks.

This patch move the asm/arch/config.h header inclusion above the DRAM
banks configuration.

Additionally this patch fix a typo.

Signed-off-by: Simon Guinot <sguinot@lacie.com>
2011-05-11 23:03:16 +02:00
Simon Guinot
29d53d19f3 Kirkwood: allow to override CONFIG_SYS_TCLK
This patch allow to override CONFIG_SYS_TCLK from board configuration
files. This is needed for the Network Space v2 which use a non standard
core clock frequency (166MHz instead of 200MHz for a 6281 SoC).

As a possible enhancement for 6281 and 6282 devices, TCLK could be
dynamically detected by checking the Sample at Reset register bit 21.

Additionally this patch fix a typo.

Signed-off-by: Simon Guinot <sguinot@lacie.com>
Acked-by: Prafulla Wadaskar <Prafulla@marvell.com>
2011-05-11 23:03:15 +02:00
Stefano Babic
2f22045be5 MX31: change return value of get_cpu_rev
Drop warnings in get_cpu_rev and changes the return value
(a u32 instead of char * is returned) of the function
to be coherent with other processors.

Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Detlev Zundel <dzu@denx.de>
CC: Fabio Estevam <fabio.estevam@freescale.com>
2011-05-11 23:03:15 +02:00
Stefano Babic
d109b11e54 MX31: removed warning due to missing prototype
Drop warning caused by missing prototype for
mxc_hw_watchdog_reset().

Signed-off-by: Stefano Babic <sbabic@denx.de>
2011-05-11 23:03:15 +02:00
Fabio Estevam
e53bcd947d gpio: imx: Fix return value on error
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2011-05-11 23:03:15 +02:00
Fabio Estevam
b73850f764 MX31: mx31pdk: Add watchdog support
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2011-05-11 23:03:15 +02:00
Ben Gardiner
24a514c445 da850evm: fix NAND WSTROBE and TA timings
The current NAND timings, introduced in commit
a3f88293dd da850evm: setup the NAND flash
timings , incorrectly set WSTROBE and TA to 0. A more recent inspection of the
values set by the Linux kernel indicates that these should be set to 1.

Set the WSTROBE and TA field of the EMIFA cycle-count timings configuration to
1 to match the values set by linux.

Signed-off-by: Ben Gardiner <bengardiner@nanometrics.ca>
CC: Stefano Babic <sbabic@denx.de>
CC: Sandeep Paulraj <s-paulraj@ti.com>
CC: Scott Wood <scottwood@freescale.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-05-11 23:03:15 +02:00
Valentin Longchamp
264eaa0ea9 keymile boards: move keymile specific header in subdir
Collect all keymile specific common headers in include/configs/km.

Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
cc: Wolfgang Denk <wd@denx.de>
cc: Detlev Zundel <dzu@denx.de>
cc: Prafulla Wadaskar <prafulla@marvell.com>
cc: Kim Phillips <kim.phillips@freescale.com>
cc: Holger Brunck <holger.brunck@keymile.com>
2011-05-10 23:22:49 +02:00
Holger Brunck
499b1a4d33 km/common: fix coding style issues in generic header
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Acked-by: Heiko Schocher <hs@denx.de>
cc: Wolfgang Denk <wd@denx.de>
cc: Detlev Zundel <dzu@denx.de>
cc: Valentin Longchamp <valentin.longchamp@keymile.com>
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
2011-05-10 23:20:30 +02:00
Holger Brunck
a9417ce74a km/common: implement setboardid command
Read out board id and HW key from the IVM eeprom and set
these values as an environment variable.

Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Acked-by: Heiko Schocher <hs@denx.de>
cc: Wolfgang Denk <wd@denx.de>
cc: Detlev Zundel <dzu@denx.de>
cc: Valentin Longchamp <valentin.longchamp@keymile.com>
2011-05-10 23:19:43 +02:00
Holger Brunck
eae3b0644c common/hush: make get_local_var visible for other users
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Acked-by: Heiko Schocher <hs@denx.de>
cc: Wolfgang Denk <wd@denx.de>
cc: Detlev Zundel <dzu@denx.de>
cc: Valentin Longchamp <valentin.longchamp@keymile.com>
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
2011-05-10 23:19:07 +02:00
Thomas Herzmann
e80ab3e661 km/common: fix initial_boot_bank for bootpackages
The initial_boot_bank can be set when more than one application is
used in a bootpackage. But a value n <> 0 never led to booting from
bank n. Instead, bank 0 was booted. This patch fixes this.

Signed-off-by: Thomas Herzmann <thomas.herzmann@keymile.com>
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Acked-by: Heiko Schocher <hs@denx.de>
cc: Wolfgang Denk <wd@denx.de>
cc: Detlev Zundel <dzu@denx.de>
cc: Valentin Longchamp <valentin.longchamp@keymile.com>
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
2011-05-10 23:17:36 +02:00
Holger Brunck
486c1f6e7e powerpc/km82xx: fix compile issue for mgcoge2ne
commit 91a3c14c (ppc, mgcoge: add DIP switch detection)
introduces an compile error due to an missing define in the
mgcoge2ne.h. DIP switch detection is valid for both boards.

Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
cc: Wolfgang Denk <wd@denx.de>
cc: Heiko Schocher <hs@denx.de>
2011-05-10 23:15:59 +02:00
Holger Brunck
cceaa63bfe poweprc/km82xx: add board specific environment variable
On mgcoge3ne a new environment variable bobcatreset is used.
So this patch adds a possibility to add board specific
environment variables in general and this specific variable
for mgcoge3ne.

Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Acked-by: Heiko Schocher <hs@denx.de>
cc: Wolfgang Denk <wd@denx.de>
cc: Detlev Zundel <dzu@denx.de>
cc: Valentin Longchamp <valentin.longchamp@keymile.com>
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
2011-05-10 22:48:59 +02:00
Holger Brunck
ba12cd5b06 powerpc/km82xx: adapt CONFIG_SYSSYPCR to manual
Reserved bit was changed according to the processors manual.

Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Acked-by: Heiko Schocher <hs@denx.de>
cc: Wolfgang Denk <wd@denx.de>
cc: Detlev Zundel <dzu@denx.de>
cc: Valentin Longchamp <valentin.longchamp@keymile.com>
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
2011-05-10 22:48:54 +02:00
Holger Brunck
489337f513 powerpc/km82xx: add mgcoge3ne and remove mgcoge2ne support
This patch adds support for the MPC8247 based board mgcoge3ne.
Additionaly mgcoge2ne board supprot was removed, because due
to the mgcoge3ne, this board is obsolete and not longer
maintained.
The board is similar to mgcoge. The difference is that
a NUMONYX flash is used and a different SDRAM (256MB).
Also introduce CONFIG_KM_82XX to collect ppc82xx common
settings and remove staticness from the common set_pin function.

Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
Acked-by: Heiko Schocher <hs@denx.de>
cc: Wolfgang Denk <wd@denx.de>
cc: Detlev Zundel <dzu@denx.de>
2011-05-10 22:48:50 +02:00
Huber, Andreas
f30c62bbe8 powerpc/km82xx: rework DIP switch detection
Introduce a struct for the BFTICU FPGA to increase the readability of
the code. And the define CONFIG_SYS_BFTICU_BASE was removed because
the CONFIG_SYS_FPGA_BASE is already the base value for BFTICU registers.

Signed-off-by: Andreas Huber <andreas.huber@keymile.com>
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
Acked-by: Heiko Schocher <hs@denx.de>
cc: Wolfgang Denk <wd@denx.de>
cc: Detlev Zundel <dzu@denx.de>
2011-05-10 22:48:45 +02:00
Holger Brunck
0278236c38 powerpc/km82xx: rename mgcoge files to km82xx
The directory and file mgcoge was renamed to km82xx.
Because other keymile 82xx will follow and will use the
same platform code.

Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Acked-by: Heiko Schocher <hs@denx.de>
cc: Wolfgang Denk <wd@denx.de>
cc: Detlev Zundel <dzu@denx.de>
cc: Valentin Longchamp <valentin.longchamp@keymile.com>
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
2011-05-10 22:48:41 +02:00
Holger Brunck
2220e6ca17 powerpc/km82xx: cleanup coding style for mgcoge.c
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Acked-by: Heiko Schocher <hs@denx.de>
cc: Wolfgang Denk <wd@denx.de>
cc: Detlev Zundel <dzu@denx.de>
cc: Valentin Longchamp <valentin.longchamp@keymile.com>
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
2011-05-10 22:48:36 +02:00
Holger Brunck
23512c3158 km/common: remove hdlc_enet implementation
The hdlc implementation for mgcoge was initially developed,
but later on not used. Remove the C files, the references
in mgcoge.c and the Makefile to decrease maintenance effort.

Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Acked-by: Heiko Schocher <hs@denx.de>
cc: Wolfgang Denk <wd@denx.de>
cc: Detlev Zundel <dzu@denx.de>
cc: Valentin Longchamp <valentin.longchamp@keymile.com>
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
2011-05-10 22:48:31 +02:00
Heiko Schocher
62a813bcac cramfs: make cramfs usable without a NOR flash
cc: Wolfgang Denk <wd@denx.de>
cc: Detlev Zundel <dzu@denx.de>
cc: Valentin Longchamp <valentin.longchamp@keymile.com>
cc: Holger Brunck <holger.brunck@keymile.com>
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
2011-05-10 22:47:32 +02:00
Heiko Schocher
ee8bc961a4 cramfs: fix bug in using CONFIG_CRAMFS_CMDLINE
do not define own flash_info variable, instead use
the flash_info variable defined in your flash driver.

Signed-off-by: Heiko Schocher <hs@denx.de>
cc: Wolfgang Denk <wd@denx.de>
cc: Detlev Zundel <dzu@denx.de>
cc: Valentin Longchamp <valentin.longchamp@keymile.com>
cc: Holger Brunck <holger.brunck@keymile.com>
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
2011-05-10 22:46:56 +02:00
Wolfgang Denk
8c65b8a937 Merge branch 'master' of git://git.denx.de/u-boot-mips 2011-05-10 22:34:24 +02:00
Wolfgang Denk
909e9bf3ae Merge branch 'master' of git://git.denx.de/u-boot-mpc83xx 2011-05-10 22:30:07 +02:00
Shinya Kuribayashi
68cebb8027 MIPS: Move timer code to arch/mips/cpu/$(CPU)/
Current timer routines (arch/mips/lib/timer.c) are implemented assuming
that MIPS32 coprocessor (CP0) resources, Counter and Compare registers
in this case, are available.  But this doesn't always work.

We need to make sure that all MIPS-based systems don't necessarily use
CP0 counter/compare registers as time keeping resources.  And some MIPS
variant processors might come with different hardware specs with genuine
MIPS32 CP0 registers.

With this change, each $(CPU)/ directory can have its own timer code.

Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
2011-05-10 00:12:31 +09:00
Daniel Schwierzeck
660da0947a MIPS: Introduce --gc-sections for MIPS
All architectures but MIPS are using --gc-sections on final linking.
This patch introduces that feature for MIPS to reduce the memory and
flash footprint.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Thomas Lange <thomas@corelatus.se>
Cc: Vlad Lungu <vlad.lungu@windriver.com>
Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
2011-05-10 00:08:10 +09:00
Shinya Kuribayashi
7aa1f198c8 MIPS: Coding style cleanups on common assembly files
Fix style issues and alignments globally.  No logical changes.
- Replace C comments with AS line comments where possible
- Use ifndef where possible, rather than if !defined for simplicity
- An instruction executed in a delay slot is now indicated by a leading
  space, not by C comment

Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
2011-05-07 00:18:13 +09:00
Shinya Kuribayashi
522171a087 MIPS: Remove mips_cache_lock() feature
As requested in commit e1390801a3 ([MIPS]
Request for the 'mips_cache_lock()' removal), such feature is no longer
needed for current MIPS implementation of U-Boot, and no one in the tree
uses it for years.

Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
2011-05-07 00:18:13 +09:00
Wolfgang Denk
96d04c3150 IDE: fix compiler warnings
The changes introduced by commit 0abddf8 ``cmd_ide: enhance new
feature "CONFIG_IDE_AHB"'' caused compiler warnings like

cmd_ide.c: In function 'ide_init':
cmd_ide.c:716: warning: assignment from incompatible pointer type

Constify the respective function arguments to fix this.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2011-04-30 23:29:55 +02:00
Anatolij Gustschin
a621b167ba common/cmd_mdio.c: fix compile warning
cmd_mdio.c: In function 'mdio_read_ranges':
cmd_mdio.c:97: warning: comparison is always false due to limited range of data type

Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Andy Fleming <afleming@freescale.com>
2011-04-30 23:09:48 +02:00
Anatolij Gustschin
d67d5d529a miiphy: miiphyutil.c: fix compile warning
Fix warning introduced while recent PHY Lib changes:

miiphyutil.c: In function 'miiphy_read':
miiphyutil.c:304: warning: comparison is always false due to limited range of data type

Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Andy Fleming <afleming@freescale.com>
2011-04-30 23:09:25 +02:00
Wolfgang Denk
aeabdeb7a3 Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx 2011-04-30 22:45:55 +02:00
Macpaul Lin
f3c615b8ab cmd_nvedit.c: clean up with checkpatch
Code clean up of cmd_nvedit.c by using checkpatch.pl.

Signed-off-by: Macpaul Lin <macpaul@andestech.com>
Acked-by: Detlev Zundel <dzu@denx.de>
2011-04-30 22:27:19 +02:00
Macpaul Lin
0abddf82d5 cmd_ide: enhance new feature "CONFIG_IDE_AHB"
Although most IDE controller is designed to be connected to PCI bridge,
there are still some IDE controller support AHB interface for SoC design.

The driver implementation of these IDE-AHB controllers differ from other
IDE-PCI controller, some additional registers and commands access is required
during CMD/DATA I/O. Hence a configuration "CONFIG_IDE_AHB" in cmd_ide.c is
required to be defined to support these kinds of SoC controllers. Such as
Faraday's FTIDE020 series and Global Unichip's UINF-0301.

Signed-off-by: Macpaul Lin <macpaul@andestech.com>
2011-04-30 21:04:25 +02:00
Thomas Chou
dea6386b71 spi: add new driver for OpenCores tiny_spi
This patch adds support for OpenCores tiny_spi.

http://opencores.org/project,tiny_spi

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
2011-04-30 20:58:36 +02:00
Mike Frysinger
e89516f031 zlib: split up to match original source tree
While looking to upgrade to zlib-1.2.5, the current mondo merge of
multiple files into a single was making things way more difficult
than it should have been.  Hard to pick out what has been changed
to port it to U-Boot, been removed as useless, and bug fixes added
after the fact.

So split the single file up into the original file names, and merge
non-essential changes back from the original tree (for some reason,
style in code in a bunch of places was changed to U-Boot style even
though this isn't "U-Boot" code).

The original build style is retained -- we have a single zlib.c that
includes all the other files, and that is the only file we compile.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-30 20:21:45 +02:00
Luca Ceresoli
56c1769806 tools/env: document current cross-compilation issues and workaround
Signed-off-by: Luca Ceresoli <luca.ceresoli@comelit.it>
2011-04-30 01:10:28 +02:00
Scott Wood
83b7e2a7f2 Handle most LDSCRIPT setting centrally
Currently, some linker scripts are found by common code in config.mk.
Some are found using CONFIG_SYS_LDSCRIPT, but the code for that is
sometimes in arch config.mk and sometimes in board config.mk.  Some
are found using an arch-specific rule for looking in CPUDIR, etc.

Further, the powerpc config.mk rule relied on CONFIG_NAND_SPL
when it really wanted CONFIG_NAND_U_BOOT -- which covered up the fact
that not all NAND_U_BOOT builds actually wanted CPUDIR/u-boot-nand.lds.

Replace all of this -- except for a handful of boards that are actually
selecting a linker script in a unique way -- with centralized ldscript
finding.

If board code specifies LDSCRIPT, that will be used.
Otherwise, if CONFIG_SYS_LDSCRIPT is specified, that will be used.

If neither of these are specified, then the central config.mk will
check for the existence of the following, in order:

$(TOPDIR)/board/$(BOARDDIR)/u-boot-nand.lds (only if CONFIG_NAND_U_BOOT)
$(TOPDIR)/$(CPUDIR)/u-boot-nand.lds (only if CONFIG_NAND_U_BOOT)
$(TOPDIR)/board/$(BOARDDIR)/u-boot.lds
$(TOPDIR)/$(CPUDIR)/u-boot.lds

Some boards (sc3, cm5200, munices) provided their own u-boot.lds that
were dead code, because they were overridden by a CPUDIR u-boot.lds under
the old powerpc rules.  These boards' own u-boot.lds have bitrotted and
no longer work -- these lds files have been removed.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Tested-by: Graeme Russ <graeme.russ@gmail.com>
2011-04-30 00:59:47 +02:00
Holger Brunck
ec9a374041 keymile-common.h: remove IO mux stuff
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
cc: Wolfgang Denk <wd@denx.de>
cc: Valentin Longchamp <valentin.longchamp@keymile.com>
cc: Heiko Schocher <hs@denx.de>
2011-04-30 00:45:30 +02:00
Thomas Herzmann
48d9539ad2 keymile boards: support of boardId / hwkey lists
In order to support boardId / hwkey lists, the u-boot default
environment has been updated: Added a script checkboardidlist
which checks the list of boardId / hwkey if the boadrId / hwkey
of the IVM is included in that list. This feature is used if you
got different HW variants but you only want to create one boot
package. E.g. supx5 board series.

Signed-off-by: Thomas Herzmann <thomas.herzmann@keymile.com>
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
cc: Valentin Longchamp <valentin.longchamp@keymile.com>
cc: Heiko Schocher <hs@denx.de>
2011-04-30 00:45:29 +02:00
Holger Brunck
a21b5d4bfd ppc, arm: rework and enhance keymile-common.h
Add:
  - introduce "bootrunner" environment variable
    This allows to execute consecutive different commands
    specified in the list "subbootcmd". If one command fails
    the command serie will stop.
  - introduce environment variable "develop", "ramfs" and "release"
    Each variable is one way to boot our linux. "develop" is for
    development purpose and boots the SW via NFS. "release" is for
    booting the linux image from flash, "ramfs" allows to load an SW
    image via tftp into ram and executes from there
  - introduce "addmem" variable, this command adds the used memory
    for linux to the bootargs
  - introduce "addvar" variable, this command adress for the /var
    directory to the kernel command line
  - introduce "setramfspram" and "setrootfsaddr" these calculation
    were done if "ramfs" was used (only for debugging)
  - introduce "tftpramfs" used for "ramfs" to load the image into
    RAM (only for debugging)
Remove unneeded stuff:
   - CONFIG_IO_MUXING is obsolete for keymile boards
   - CONFIG_KM_DEF_ENV_PRIVATE is also obsolete
   - define CONFIG_SYS_TEXT_BASE in board configs only

Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
cc: Wolfgang Denk <wd@denx.de>
cc: Prafulla Wadaskar <prafulla@marvell.com>
cc: Valentin Longchamp <valentin.longchamp@keymile.com>
cc: Heiko Schocher <hs@denx.de>
2011-04-30 00:45:23 +02:00
Heiko Schocher
f1fef1d8a1 keymile, common: add setting of some environment variables
This patch adds last_stage_init to all keymile boards. And
in the last stage init some environment variables for u-boot
were set. Currently these are pnvramaddr, pram and var address.

Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Signed-off-by: Heiko Schocher <hs@denx.de>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
cc: Valentin Longchamp <valentin.longchamp@keymile.com>
cc: Wolfgang Denk <wd@denx.de>
cc: Kim Phillips <kim.phillips@freescale.com>
2011-04-30 00:45:22 +02:00
Heiko Schocher
0d01520200 keymile boards: add CONFIG_PIGGY_MAC_ADRESS_OFFSET
Normaly the PIGGY_MAC_ADRESS can be read directly from the
IVM on keymile boards. On mgcoge3 it differs. Because there
are two piggy boards deployed the second MAC adress must be
calculated with the IVM mac adress and an offset. This patch
allows to set such a offset in the board config.

Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
cc: Valentin Longchamp <valentin.longchamp@keymile.com>
cc: Heiko Schocher <hs@denx.de>
2011-04-30 00:45:17 +02:00
Heiko Schocher
731b968044 arm, keymile: updates for the arm based boards from keymile
define KM_IVM_BUS and KM_ENV_BUS macros
 KM_IVM_BUS is used to define the EEprom_ivm environment variable.
 These macros allow the reuse of these I2C addresses in other code
 locations.

remove unneeded code
  On first HW versions the BOCO FPGA was behind a MUX device. These
  HW versions are not supported anymore. And therefore this code can
  be removed.

added LED initialization for SUEN3
  The bootstat LED required to be initialized so to have a green
  colour after start-up.

define CONFIG_SYS_TEXT_BASE
  This is needed by the relocation code and is not the same for
  our ARM BEC and thus needs to be defined.

remove memsize variable
  An environment variable for memsize is not needed.
  this can be get via the board info struct.

remove unneeded double access to bi_dram[i].size field

Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Signed-off-by: Luca Haab <luca.haab@keymile.com>
Signed-off-by: Heiko Schocher <hs@denx.de>
cc: Prafulla Wadaskar <prafulla@marvell.com>
2011-04-30 00:45:15 +02:00
Heiko Schocher
6c11aeafef keymile, common; fix i2c deblocking support
This patch fix the i2c deblocking facility with the i2c HW-Controller.
The required delays for byte reading, the enhanced criteria for stop
the dummy read and required 5 start/stop sequences are added.

Add i2c deblocking before ivm eeprom read.

Improve i2c deblocking sequence by respecting stop hold time.

Cleaned function for deblocking. Have now one function i2c_make_abort()
available for bitbang, mpc82xx and mpc83xx harware controller.

Signed-off-by: Stefan Bigler <stefan.bigler@keymile.com>
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Signed-off-by: Heiko Schocher <hs@denx.de>
cc: Valentin Longchamp <valentin.longchamp@keymile.com>
2011-04-30 00:45:09 +02:00
Heiko Schocher
8ed74341ba ppc, 8321: cleanup tuxa1, tuda1 and suvd3 support
For the kmsupx5 a new header file was introduced km8321-common.h.
Now the common stuff from tuxa1, tuda1 and suvd3 was removed and
the new header file included.

The defines CONFIG_SYS_PIGGY_BASE and CONFIG_SYS_PIGGY_SIZE are
confusing. Because they actually describe the KMBEC FPGA values.
The KMBEC FPGA can be PRIO on kmeter1 or upio on mgcoge. Therefore
all the defines were renamed.

remove unneeded variable CONFIG_KM_DEF_NETDEV, as it is
already declared in keymile-common.h

Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Signed-off-by: Heiko Schocher <hs@denx.de>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
cc: Kim Phillips <kim.phillips@freescale.com>
cc: Wolfgang Denk <wd@denx.de>
cc: Valentin Longchamp <valentin.longchamp@keymile.com>
2011-04-30 00:45:07 +02:00
Heiko Schocher
1ebbb77a19 km_arm: change some register values for SDRAM initialization
These new values are:
- enables UART0 and UART1 pins in MPP
- define some L2 cache settings
- changes a SDRAM timing to better fit the hardware
- removed three writes that were the same as the reset values

Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
Signed-off-by: Heiko Schocher <hs@denx.de>
cc: Holger Brunck <holger.brunck@keymile.com>
cc: Prafulla Wadaskar <prafulla@marvell.com>
2011-04-30 00:45:00 +02:00
Heiko Schocher
44097e26cc km-arm: i2c support for suenx based boards
This patch renames the suen3 defines and functions to KM_KIRKWOOD
which is more generic and more precise, because these values
and functions where used by all suenX boards and not only suen3.

Signed-off-by: Lukas Roggli <lukas.roggli@keymile.com>
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Signed-off-by: Heiko Schocher <hs@denx.de>
cc: Prafulla Wadaskar <prafulla@marvell.com>
2011-04-30 00:44:58 +02:00
Heiko Schocher
4074296b1c powerpc, 83xx: add kmsupx5 board support
The Keymile SUPx5 board series is based on a PBEC8321 but
contains an additional PBUS FPGA (LPXF) on local bus CS2.

Signed-off-by: Thomas Reufer <thomas.reufer@keymile.com>
Signed-off-by: Heiko Schocher <hs@denx.de>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
cc: Wolfgang Denk <wd@denx.de>
cc: Kim Phillips <kim.phillips@freescale.com>
cc: Valentin Longchamp <valentin.longchamp@keymile.com>
cc: Holger Brunck <holger.brunck@keymile.com>
2011-04-30 00:44:53 +02:00
Thomas Reufer
8d564640c6 keymile, 8321 boards: move common definitions to km8321-common.h
First step for a cleanup of all header files for km8321 boards.

Signed-off-by: Thomas Reufer <thomas.reufer@keymile.com>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
cc: Wolfgang Denk <wd@denx.de>
cc: Kim Phillips <kim.phillips@freescale.com>
cc: Valentin Longchamp <valentin.longchamp@keymile.com>
cc: Holger Brunck <holger.brunck@keymile.com>
cc: Heiko Schocher <hs@denx.de>
2011-04-30 00:44:52 +02:00
Heiko Schocher
af895e4527 ppc: add support for ppc based board mgcoge2ne
The mgcoge2 board from keymile deploys two different processors.
An ARM based Kirkwood for the "unit" part of the SW and a PPC for
the "ne" part of the SW. Therefore in Linux and U-Boot the names
for the board are mgcoge2un and mgcoge2ne. This patch adds the
mgcoge2ne part of the board. The ppc part of mgboge2 is quite
similar to mgcoge, therefore a generic header km82xx-common.h
was introduced to collect all similiarities. Currently the only
difference is that mgcoge2ne has a 64 MB numonyx NOR flash with
a single die. The mgcoge has a dual die flash 2*32MB from spansion.

Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Signed-off-by: Heiko Schocher <hs@denx.de>
cc: Wolfgang Denk <wd@denx.de>
cc: Valentin Longchamp <valentin.longchamp@keymile.com>
2011-04-30 00:44:47 +02:00
Heiko Schocher
effe5e8cda arm: add support of Kirkwood based board SUEN8
The Kirwood based SUEN8 board from Keymile is at this stage
the same than the suen3 board. This patch adds the board
support for the suen8.

Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Signed-off-by: Heiko Schocher <hs@denx.de>
cc: Prafulla Wadaskar <prafulla@marvell.com>
2011-04-30 00:44:44 +02:00
Heiko Schocher
331a30dc5b arm: add support for kirkwood based mgcoge2un board
This board is similar to keymile suen3.

Signed-off-by: Clive Stubbings <clive.stubbings@xentech.co.uk>
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Signed-off-by: Heiko Schocher <hs@denx.de>
cc: Prafulla Wadaskar <prafulla@marvell.com>
2011-04-30 00:44:39 +02:00
Heiko Schocher
dc6033ecf1 mpc832x: add support for mpc8321 based tuda1 board
This board is similar to suvd3 board. So most initialisation topics
are taken from suvd3 (UART1, Ethernet, piggy PHY, flash, ram) only the
application specific chip selects differ.

Signed-off-by: Lukas Roggli <lukas.roggli@keymile.com>
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Signed-off-by: Heiko Schocher <hs@denx.de>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
cc: Kim Phillips <kim.phillips@freescale.com>
cc: Valentin Longchamp <valentin.longchamp@keymile.com>
2011-04-30 00:44:37 +02:00
Heiko Schocher
9a276bb093 mpc832x: add support for mpc8321 based tuxa1 board
This board is similar to suvd3 board. So most initialisation topics
are taken from suvd3 (UART1, Ethernet, piggy PHY, flash, ram) only the
application specific chip selects differ.

Signed-off-by: Lukas Roggli <lukas.roggli@keymile.com>
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Signed-off-by: Heiko Schocher <hs@denx.de>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
cc: Kim Phillips <kim.phillips@freescale.com>
cc: Valentin Longchamp <valentin.longchamp@keymile.com>
2011-04-30 00:44:35 +02:00
Heiko Schocher
62ddcf05e7 mpc832x: add support for the mpc8321 based suvd3 board
- serial console on UART1
- Ethernet RMII over UCC4
- PHY SMSC LAN8700
- 64MB Flash
- 128 MB DDR2 RAM
- I2C
- bootcount

This board is similiar to the kmeter1 (8360) board,
so common config options are extracted into the
include/configs/km83xx-common.h file.

Signed-off-by: Heiko Schocher <hs@denx.de>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
cc: Kim Phillips <kim.phillips@freescale.com>
cc: Holger Brunck <holger.brunck@keymile.com>
cc: Valentin Longchamp <valentin.longchamp@keymile.com>
2011-04-30 00:44:29 +02:00
Holger Brunck
de3ad13de5 arm, ppc: rework environment variables for keymile boards
This patch reworks all headerfiles for keymile boards. Furthermore
the environment variables are refactored.

Changes:
  - introduce km-powerpc.h file and extract ppc specific parts to it
  - move ARM specific options and vaiables to km_arm.h
  - sort the environment variables to logical groups
  - enhance the description of the environment variables
  - remove KM specific HW key and board id from kernel command line

Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Signed-off-by: Heiko Schocher <hs@denx.de>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
cc: Kim Phillips <kim.phillips@freescale.com>
cc: Wolfgang Denk <wd@denx.de>
cc: Valentin Longchamp <valentin.longchamp@keymile.com>
2011-04-30 00:44:27 +02:00
Holger Brunck
f41ee960d2 ppc, arm: adapt keymile header
- adapt copyright string
- change bootdelay to 2 seconds
- set max number of command args to 32
- set I/O buffer size to 512

Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Signed-off-by: Heiko Schocher <hs@denx.de>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
cc: Kim Phillips <kim.phillips@freescale.com>
cc: Wolfgang Denk <wd@denx.de>
cc: Valentin Longchamp <valentin.longchamp@keymile.com>
2011-04-30 00:44:24 +02:00
Heiko Schocher
b11f53f31b keymile: Fix Coding style issues for keymile boards.
- use I/O accessors
  -> For accessing the FPGA therefore a struct km_bec_fpga
     is introduced.
- no longer externs needed
- to defines, that only select functions, don;t assign a
  numeric value
- Codingstyle changes to prevent checkpatch errors/warnings

Signed-off-by: Heiko Schocher <hs@denx.de>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
cc: Kim Phillips <kim.phillips@freescale.com>
cc: Holger Brunck <holger.brunck@keymile.com>
cc: Wolfgang Denk <wd@denx.de>
cc: Detlev Zundel <dzu@denx.de>
cc: Valentin Longchamp <valentin.longchamp@keymile.com>
cc: Prafulla Wadaskar <prafulla@marvell.com>
2011-04-30 00:44:22 +02:00
Holger Brunck
802d996324 arm, keymile: rename MACH_SUEN3 to MACH_KM_KIRKWOOD
The MACH_TYPE SUEN3 is now to specific for keymile boards, because
other boards similar to suen3 will follow. So the MACH_SUEN3 was renamed
to MACH_KM_KIRKWOOD.

Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Signed-off-by: Heiko Schocher <hs@denx.de>
cc: Wolfgang Denk <wd@denx.de>
cc: Valentin Longchamp <valentin.longchamp@keymile.com>
cc: Prafulla Wadaskar <prafulla@marvell.com>
2011-04-30 00:44:18 +02:00
Heiko Schocher
7c6db91049 powerpc, mpc83xx: add missing functions to include/common.h
add following functions to common.h, to prevent
extern declarations:

void disable_addr_trans(void);
void enable_addr_trans(void);
void ddr_enable_ecc(unsigned int dram_size);

Signed-off-by: Heiko Schocher <hs@denx.de>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
cc: Kim Phillips <kim.phillips@freescale.com>
cc: Holger Brunck <holger.brunck@keymile.com>
cc: Wolfgang Denk <wd@denx.de>
cc: Detlev Zundel <dzu@denx.de>
cc: Valentin Longchamp <valentin.longchamp@keymile.com>
2011-04-30 00:44:12 +02:00
Wolfgang Denk
a146bcc208 Merge branch 'master' of git://git.denx.de/u-boot-mmc 2011-04-29 22:45:50 +02:00
Kyle Moffett
a2879634c4 fsl-ddr: Fix mixed-case macro names
Signed-off-by: Kyle Moffett <Kyle.D.Moffett@boeing.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-29 10:31:01 -05:00
Kumar Gala
a832ac4107 powerpc/85xx: Bump up the CONFIG_SYS_BOOTM_LEN to 64M on FSL 85xx boards
CONFIG_SYS_BOOTMAPSZ has been 64M on these boards for some time so we
should also allow the kernel image to be up to 64M decompressed.  This
also matches what we pass to the OS based on the ePAPR specification.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-29 07:36:18 -05:00
Jiang Yutang
9b6e9d1c13 powerpc/85xx: Enable eSPI support on P1022DS
Signed-off-by: Jiang Yutang <b14898@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-29 07:36:17 -05:00
Priyanka Jain
c62a6cfb94 powerpc/85xx: Enable eSPI support for p1_p2_rdb
Also added support to save env to spi flash in case of SPIBOOT.

Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-29 07:36:17 -05:00
Jerry Huang
21dd9af3cd powerpc/85xx: Enable eSPI controller & SPI boot support on P2020DS
Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com>
Signed-off-by: Zhao Chenhui <b35336@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-29 07:36:07 -05:00
Mingkai Hu
273feafefd powerpc: eSPI and eSPI controller support
Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
Singed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com>
Signed-off-by: Shaohui Xie <b21989@freescale.com>
Cc: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-29 07:34:09 -05:00
Andy Fleming
40ac3d462d tsec: Fix MDIO on devices with eTSEC2
The tsec driver was defining the default MDIO address as
the TSEC_BASE + 0x520, but on eTSEC2 controllers, the first
TSEC's registers are separated from the MDIO registers. Use
the existing MDIO_BASE_ADDR, instead.

Signed-off-by: Andy Fleming <afleming@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-29 07:32:48 -05:00
Thomas Chou
abe2c93ffb mmc: coding style fix and tabify of mmc.h
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
2011-04-29 03:22:17 -05:00
Jason Liu
4571de33ee fsl_esdhc: Fix multi-block read restriction on i.MX53 eSDHCv2
For freescale i.MX53 eSDHCv2, when using CMD12, cmdtype need
to be set to ABORT, otherwise, next read command will hang.

This is a software Software Restrictions in i.MX53 reference manual:

29.7.8 Multi-block Read
For pre-defined multi-block read operation, that is,the number of blocks
to read has been defined by previous CMD23 for MMC, or pre-defined number
of blocks in CMD53 for SDIO/SDCombo,or whatever multi-block read without
abort command at card side, an abort command, either automatic or manual
CMD12/CMD52, is still required by ESDHC after the pre-defined number of
blocks are done, to drive the internal state machine to idle mode. In this
case, the card may not respond to this extra abort command and ESDHC will
get Response Timeout.  It is recommended to manually send an abort command
with RSPTYP[1:0] both bits cleared.

Signed-off-by: Jason Liu <jason.hui@linaro.org>
2011-04-29 03:22:17 -05:00
John Rigby
4ca9244d74 MMC: omap_hsmmc.c: disable multiblock rw on old rev omap34xx silicon
Signed-off-by: John Rigby <john.rigby@linaro.org>
2011-04-29 03:22:17 -05:00
John Rigby
8feafcc49c MMC: make b_max unconditional
Make existing field b_max field in struct mmc unconditional
and use it instead of CONFIG_SYS_MMC_MAX_BLK_COUNT in mmc_bread
and mmc_bwrite.

Initialize b_max to CONFIG_SYS_MMC_MAX_BLK_COUNT in mmc_register
if it has not been initialized by the hw driver.

Initialize b_max to 0 in all callers to mmc_register.

Signed-off-by: John Rigby <john.rigby@linaro.org>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2011-04-29 03:21:54 -05:00
Thomas Chou
28df15e023 mmc_spi: add mmc_init call
As Andy Fleming suggested, we can call mmc_init() in mmc_spi command.
So that we don't need to run mmcinfo command next.

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
2011-04-29 03:20:01 -05:00
Matt Waddel
f0c64526b7 ARMV7: Vexpress: Add MMC support
Added the board specific definitions to use the MMCI device.

Signed-off-by: Matt Waddel <matt.waddel@linaro.org>
2011-04-29 03:20:01 -05:00
Matt Waddel
23b93e1d66 MMC: Add support for PL180 ARM mmc device
Add support for the ARM PrimeCell MultiMedia Interface - PL180.
Ported from original device driver written by ST-Ericsson.

Signed-off-by: Matt Waddel <matt.waddel@linaro.org>
2011-04-29 03:20:01 -05:00
Kumar Gala
66412c6371 powerpc/85xx: Change timebase divisor to be defined per processor
Introduce new CONFIG_SYS_FSL_TBCLK_DIV on 85xx platforms because
different SoCs have different divisor amounts.  All the PQ3 parts are
/8, the P4080/P4080 is /16, and P2040/P3041/P5020 are /32.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-28 22:09:24 -05:00
Timur Tabi
d90fdba6ca powerpc/85xx: Implement work-around for P4080 erratum SERDES-A001
Bank powerdown through RCW[SRDS_LPD_Bn] for XAUI on FM2 and SGMII on FM1
are swapped.

Erratum SERDES-A001 says that if bank two is kept disabled and after bank
three is enabled, then the PLL for bank three won't lock properly.  The
work-around is to enable and then disable bank two after bank three is
enabled.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-28 22:09:23 -05:00
Timur Tabi
f68d306349 powerpc/85xx: Extend SERDES9 erratum work-around to SGMII, SRIO, and AURORA
Part of the SERDES9 erratum work-around is to set some bits in the SerDes
TTLCR0 register for lanes configured as XAUI, SGMII, SRIO, or AURORA.  The
current code does this only for XAUI, so extend it to the other protocols.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-28 22:09:23 -05:00
Timur Tabi
7d6d9ba9d0 powerpc/85xx: Display SERDES 8 erratum warning if banks are not disabled
The work-around for P4080 erratum SERDES-8 requires all lanes of banks two
and three to be disabled (powered down) in the RCW.  Display a warning
message if this is not the case.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-28 22:09:23 -05:00
Timur Tabi
da30b9fd97 powerpc/85xx: Implement work-around for P4080 erratum SERDES-A005
SerDes PLL bandwidth default setting is incorrect when no lanes are
configured as PCI Express.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-28 22:09:23 -05:00
Timur Tabi
82c9dfdc20 powerpc/fsl: add 'pixis_reset dump' command
Add the 'pixis_reset dump' command, which displays the contents of the PIXIS
registers.  This command is only available if DEBUG is defined.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-28 22:09:23 -05:00
Timur Tabi
eb0d47e181 powerpc/86xx: remove empty board_early_init_f()
Remove an empty board_early_init_f() from the MPC8641HPCN board.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-28 22:08:16 -05:00
Wolfgang Denk
1911602b68 Merge branch 'master' of git://git.denx.de/u-boot-video 2011-04-28 23:45:16 +02:00
Wolfgang Denk
34d9cb5ec6 Merge branch 'master' of git://git.denx.de/u-boot-i2c 2011-04-28 23:19:18 +02:00
Timur Tabi
ba8e76bd49 powerpc: use 'video-mode' environment variable to configure DIU
Use the 'video-mode' environment variable (for Freescale chips that have a
DIU display controller) to designate the full video configuration.  Previously,
the DIU driver used the 'monitor' variable, and it was used only to determine
the output video port.

The old definition of the "monitor" environment variable only determines
which video port to use for output.  This variable was set to a number (0,
1, or sometimes 2) to specify a DVI, LVDS, or Dual-LVDS port.  The
resolution was hard-coded into board-specific code.  The Linux command-line
arguments needed to be hard-coded to the proper video definition string.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
2011-04-28 21:31:16 +02:00
Timur Tabi
a5dbdc81ea video: parse the video-mode environment variable
Add function video_get_video_mode(), which parses the "video-mode" environment
variable and returns each of its components.  The format matches the video=
command-line option used for Linux:

	video-mode=<driver>:<xres>x<yres>-<depth>@<freq><,option=string>

	<driver> The video driver, ignored by U-Boot
	<xres> The X resolution (in pixels) to use.
	<yres> The Y resolution (in pixels) to use.
	<depth> The color depth (in bits) to use.
	<freq> The frequency (in Hz) to use.
	<options> A comma-separated list of device-specific options

Signed-off-by: Timur Tabi <timur@freescale.com>
2011-04-28 21:31:02 +02:00
Anatolij Gustschin
74446b63dd cfb_console: fix RLE bitmap drawing code
There seems to be tools producing incorrect 'end of bitmap data'
markers '0100' in a RLE bitmap. Drawing such bitmaps can result
in overwriting memory above the frame buffer. E.g. on MPC5121e
based boards this memory can contain U-Boot environment.

We may not rely on the correct end of bitmap data marker 0001
only, but also have to check whether we are going to draw a
valid frame buffer scan line.

The patch provides a fix by maintaining a pixel counter
which is incremented by the amount of pixels we are going
to draw. If the counter exceeds frame buffer pixels limit
we stop the drawing with the error message.

Reported-by: Michael Weiss <michael.weiss@ifm.com>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Tested-by: Anatolij Gustschin <agust@denx.de>
2011-04-28 21:30:46 +02:00
Grant Likely
2fa8ca98c3 Add CONFIG_OF_LIBFDT to more boards.
The following boards gain device tree support with this patch:

ca9x4_ct_vxp - Versatile Express

i.mx5 boards:
efikamx
mx51evk
mx53evk

OMAP boards:
devkit8000
igep0020
igep0030
omap3_overo
omap3_pandora
omap4_sdp3430
omap3_zoom1
omap3_zoom2
omap4_panda
omap4_sdp4430

Tegra boards:
Harmony

Signed-off-by: Grant Likely <grant.likely@linaro.org>
2011-04-28 14:44:17 +02:00
Heiko Schocher
4bd5566ee8 i2c, soft_i2c: deblock bus if switching to another i2c bus
Deblock i2c bus when switching to another i2c bus, if using
i2c_set_bus_num().

Signed-off-by: Heiko Schocher <hs@denx.de>
cc: Wolfgang Denk <wd@denx.de>
cc: Detlev Zundel <dzu@denx.de>
cc: Valentin Longchamp <valentin.longchamp@keymile.com>
cc: Holger Brunck <holger.brunck@keymile.com>
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
2011-04-28 10:57:08 +02:00
Stefan Bigler
c649dda537 i2c: add i2c deblock sequence before and after every mux config
To make sure that the mux can be configured a deblocking sequence
is done before the mux configuration. After the mux switch the new leaf
of, the i2c tree must be again deblocked.

Signed-off-by: Stefan Bigler <stefan.bigler@keymile.com>
Acked-by: Heiko Schocher <hs@denx.de>
cc: Wolfgang Denk <wd@denx.de>
cc: Detlev Zundel <dzu@denx.de>
cc: Prafulla Wadaskar <prafulla@marvell.com>
cc: Valentin Longchamp <valentin.longchamp@keymile.com>
cc: Holger Brunck <holger.brunck@keymile.com>
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
2011-04-28 10:56:54 +02:00
Po-Yu Chuang
e3f1089846 arm: a320: fix compile error caused by commit 00d10eb
Signed-off-by: Po-Yu Chuang <ratbert@faraday-tech.com>
2011-04-28 10:32:49 +02:00
Matthew McClintock
ae425c1eca powerpc/85xx: Don't set FT_FSL_PCI_SETUP if CONFIG_PCI is not set
A lot of boards set FT_FSL_PCI_SETUP directly in their board code
and don't check to see if CONFIG_PCI is actually defined. This
will cause the board compilation to fail if CONFIG_PCI is not
defined. The p1022ds board is one such example.

Instead of fixing every board this patch wraps FT_FSL_PCI_SETUP
around CONFIG_PCI so we can remove CONFIG_PCI and boards will
still build properly.

Signed-off-by: Matthew McClintock <msm@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-27 22:40:32 -05:00
Kim Phillips
416202f672 powerpc/85xx: handle both "secX.Y" and "sec-vX.Y" properties
versioned SEC properties changed names during development, so
for now search and update LIODNs for both "secX.Y" and
"sec-vX.Y" based properties.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-27 22:29:04 -05:00
Lei Xu
300097669c powerpc/85xx: Enable ESDHC111 erratum on P2040/P3041/P5010/P5020 SoCs
The workaround for ESDHC111 should also be applied on
P2040/P3041/P5010/P5020 SoCs.

Signed-off-by: Lei Xu <B33228@freescale.com>
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-27 22:29:04 -05:00
Roy Zang
86221f09fb powerpc/85xx: Enable Internal USB PHY for p2040, p3041, p5010 and p5020
The P2040, P3041, P5010, and P5020 all have internal USB PHYs that we
need to enable for them to function.

Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-27 22:29:04 -05:00
Kumar Gala
e02aea61cb powerpc: Add P3041DS/P5020DS board support (uses corenet_ds code)
The P3041DS & P5020DS boards are almost identical (except for the
processor in them).  Additionally they are based on the P4080DS board
design so we use the some board code for all 3 boards.

Some ngPIXIS (FPGA) registers where reserved on P4080DS and now have
meaning on P3041DS/P5020DS.  We utilize some of these for SERDES clock
configuration.

Additionally, the P3041DS/P5020DS support NAND.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Shaohui Xie <b21989@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-27 22:29:04 -05:00
Emil Medve
df8af0b4a6 p4080/serdes: Implement the XAUI workaround for SERDES9 erratum
Signed-off-by: Emil Medve <Emilian.Medve@Freescale.com>
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-27 22:29:04 -05:00
Emil Medve
3d28c5c8ed powerpc/85xx: fsl_corenet_serdes code rework
Rework and add some new APIs to the fsl_corenet_serdes code for use by
erratum and drivers.

* Rename serdes_get_bank() to serdes_get_bank_by_lane()
* Add serdes_get_first_lane returns which SERDES lane is used by device

Signed-off-by: Emil Medve <Emilian.Medve@Freescale.com>
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-27 22:29:04 -05:00
Trübenbach, Ralf
02bb49891e powerpc/85xx: Fix Wrong PCIe 3 virtual address on corenet_ds platforms
This patch fixes a wrong address define in corenet_ds.h (used by
P4080DS.h, P3041DS.h, P5020DS.h).

Since board/Freescale/corenet_ds/tlb.c does not use the
CONFIG_SYS_PCIE3_MEM_VIRT define (uses CONFIG_SYS_PCIE1_MEM_VIRT with a
fix offset instead) this has no effect to the functionality. But it may
be important for changes in the future?

Signed-off-by: Ralf Trübenbach <ralf.truebenbach@men.de>
Cc: Andy Fleming <afleming@gmail.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-27 22:29:03 -05:00
Haiying Wang
2a0ffb84c7 powerpc/85xx: Add device tree fixup for bman portal
Fix fdt bportal to pass the bman revision number to kernel via device tree.

Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-27 22:29:03 -05:00
Ramneek Mehresh
2bad42a0c8 powerpc/85xx: Add support for 2nd USB controller on p1_p2_rdb
Second USB controller only works for SPI and SD boot because of pin muxing

Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
2011-04-27 22:29:03 -05:00
Dipen Dudhat
4b77047c2a powerpc/85xx: Added PMUXCR1 and PMUXCR2 defines for P1010/P1014 SoC
Signed-off-by: Dipen Dudhat <Dipen.Dudhat@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-27 22:29:03 -05:00
Dipen Dudhat
d7da1484cc powerpc/85xx: Change CS timing params before changing CS properties on IFC
To make sure that machine change operation work successfully, change
timing parameters first before changing machine for chip select on IFC.

Signed-off-by: Dipen Dudhat <Dipen.Dudhat@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-27 22:29:03 -05:00
Priyanka Jain
e59a93e7e8 powerpc/85xx: Add support to save environment in SD card on p1_p2_rdb
If we boot from a SD card use it for the environment as well.

Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Signed-off-by: Poonam Aggrwal <Poonam.Aggrwal@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-27 22:29:03 -05:00
Kim Phillips
a000b7950d common: add a grepenv command
u-boot environments, esp. when boards are shared across multiple
users, can get pretty large and time consuming to visually parse.
The grepenv command this patch adds can be used in lieu of printenv
to facilitate searching.  grepenv works like printenv but limits
its output only to environment strings (variable name and value
pairs) that match the user specified substring.

the following examples are on a board with a 5313 byte environment
that spans multiple screen pages:

Example 1:  summarize ethernet configuration:

=> grepenv eth TSEC
etact=FM1@DTSEC2
eth=FM1@DTSEC4
ethact=FM1@DTSEC2
eth1addr=00:E0:0C:00:8b:01
eth2addr=00:E0:0C:00:8b:02
eth3addr=00:E0:0C:00:8b:03
eth4addr=00:E0:0C:00:8b:04
eth5addr=00:E0:0C:00:8b:05
eth6addr=00:E0:0C:00:8b:06
eth7addr=00:E0:0C:00:8b:07
eth8addr=00:E0:0C:00:8b:08
eth9addr=00:E0:0C:00:8b:09
ethaddr=00:E0:0C:00:8b:00
netdev=eth0
uprcw=setenv ethact $eth;setenv filename p4080ds/R_PPSXX_0xe/rcw_0xe_2sgmii_rev2_high.bin;setenv start 0xe8000000;protect off all;run upimage;protect on all
upuboot=setenv ethact $eth;setenv filename u-boot.bin;setenv start eff80000;protect off all;run upimage;protect on all
upucode=setenv ethact $eth;setenv filename fsl_fman_ucode_P4080_101_6.bin;setenv start 0xef000000;protect off all;run upimage;protect on all
usdboot=setenv ethact $eth;tftp 1000000 $dir/$bootfile;tftp 2000000 $dir/initramfs.cpio.gz.uboot;tftp c00000 $dir/p4080ds-usdpaa.dtb;setenv bootargs root=/dev/ram rw console=ttyS0,115200 $othbootargs;bootm 1000000 2000000 c00000;
=>

Example 2: detect unused env vars:

=> grepenv etact
etact=FM1@DTSEC2
=>

Example 3: reveal hardcoded variables; e.g., for fdtaddr:

=> grepenv fdtaddr
fdtaddr=c00000
nfsboot=setenv bootargs root=/dev/nfs rw nfsroot=$serverip:$rootpath ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off console=$consoledev,$baudrate $othbootargs;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr - $fdtaddr
ramboot=setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs;tftp $ramdiskaddr $ramdiskfile;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr $ramdiskaddr $fdtaddr
=> grep $fdtaddr
fdtaddr=c00000
my_boot=bootm 0x40000000 0x41000000 0x00c00000
my_dtb=tftp 0x00c00000 $prefix/p4080ds.dtb
nohvboot=tftp 1000000 $dir/$bootfile;tftp 2000000 $dir/$ramdiskfile;tftp c00000 $dir/$fdtfile;setenv bootargs root=/dev/ram rw ramdisk_size=0x10000000 console=ttyS0,115200;bootm 1000000 2000000 c00000;
=>

This patch also enables the grepenv command by default on
corenet_ds based boards (and repositions the DHCP command
entry to keep the list sorted).

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Cc: Kumar Gala <kumar.gala@freescale.com>
Cc: Andy Fleming <afleming@freescale.com>
2011-04-28 01:00:07 +02:00
Timur Tabi
1fade70203 powerpc: fix implementation of out_8 to match the other out_XX functions
Signed-off-by: Timur Tabi <timur@freescale.com>
2011-04-28 00:55:16 +02:00
Kim Phillips
af4d9074aa env: fix env var autocompletion
commit 560d424b6d "env: re-add
support for auto-completion" fell short of its description -
the 'used' logic in hmatch_r was reversed - 'used' is 0 if
the hash table entry is not used, or -1 if deleted.  This
patch makes hmatch_r actually match on valid ('used') entries,
instead of skipping them and failing to match anything.

typing 'printenv tft' and hitting 'tab' now displays valid
choices for variable names.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Cc: Mike Frysinger <vapier@gentoo.org>
Tested-by: Mike Frysinger <vapier@gentoo.org>
2011-04-28 00:54:40 +02:00
Heiko Schocher
f314313494 mpc52xx, digsy_mtc: protect default flash sectors
call flash_protect_default() to protect default sectors.

Signed-off-by: Heiko Schocher <hs@denx.de>
2011-04-28 00:52:38 +02:00
Heiko Schocher
1b41493def mpc52xx, digsy_mtc: change phy addr for rev5 boards.
- rev5 board has phy addr 1 -> adapt CONFIG_PHY_ADDR define
  in board config file.
- also fixup the phy addr entry in dts, before booting
  Linux.

Signed-off-by: Heiko Schocher <hs@denx.de>
Acked-by: Detlev Zundel <dzu@denx.de>
2011-04-28 00:52:09 +02:00
Gray Remlin
9030a55ef3 NET: Correct potential missing goto label in case statement.
If neither CONFIG_CMD_PING or CONFIG_CMD_SNTP are defined but
CONFIG_CMD_DNS is, a compile-time error will occur due to the
absence of a goto label.

Signed-off-by: Gray Remlin <gryrmln@gmail.com>
2011-04-28 00:46:49 +02:00
thomas.langer@lantiq.com
2dc55d9ede fix redundant environment for serial flash
This patch fixes problems in the handling of redundant environment in env_sf.c

The major problem are double calls of free() on the allocated buffers,
which damages the internal data of malloc and crashes on next call.

In addition, the selection of the active environment had errors and compiler
warnings, which are corrected by this patch.

Signed-off-by: Thomas Langer <thomas.langer@lantiq.com>
2011-04-28 00:46:01 +02:00
Wolfgang Denk
f38536f913 Merge branch 'master' of git://git.denx.de/u-boot-arm 2011-04-27 21:48:09 +02:00
Wolfgang Denk
34b5fc4d8b Merge branch 'master' of git://git.denx.de/u-boot-fdt 2011-04-27 21:45:31 +02:00
Wolfgang Denk
547bea12cc Merge branch 'master' of git://git.denx.de/u-boot-blackfin 2011-04-27 21:43:42 +02:00
Wolfgang Denk
5f902cf139 Merge branch 'spi' of git://git.denx.de/u-boot-blackfin 2011-04-27 21:42:18 +02:00
Minkyu Kang
d32a1a4caa Don't grab memory for LCD if FB address is defined
If FB address is defined specific address then don't grab memory for LCD

Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Cc: Albert Aribaud <albert.aribaud@free.fr>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Kim Phillips <kim.phillips@freescale.com>
Cc: Andy Fleming <afleming@gmail.com>
Cc: Kumar Gala <kumar.gala@freescale.com>
2011-04-27 19:38:11 +02:00
Alessandro Rubini
aeb630d206 nhk8815: move config targets from Makefile to boards.cfg
Signed-off-by: Alessandro Rubini <rubini@unipv.it>
Acked-by: Andrea Gallo <andrea.gallo@stericsson.com>
2011-04-27 19:38:11 +02:00
Alessandro Rubini
afba32bcd6 nhk8815: add support for relocation
This patch defines all the needed symbols in the header file
and removes the now-unused config.mk in board directory.
Changes to board C file as requested.

Signed-off-by: Alessandro Rubini <rubini@gnudd.com>
Signed-off-by: Alessandro Rubini <rubini@unipv.it>
Acked-by: Andrea Gallo <andrea.gallo@stericsson.com>
2011-04-27 19:38:10 +02:00
Alessandro Rubini
cb8948ee52 nhk8815: remove platform.S, which was unused at link time
This source file, which I got by the vendor in their own port,
was not actually executing because lib-based compilation
didn't call lowlevel_init (we have CONFIG_SKIP_LOWLEVEL_INIT).
With the change to object-based linking, an undefined symbol in
this file started hitting in the final link.

Signed-off-by: Alessandro Rubini <rubini@unipv.it>
Acked-by: Andrea Gallo <andrea.gallo@stericsson.com>
2011-04-27 19:38:10 +02:00
Eric Benard
632f8fdf4c cpuat91: fix board support
- fix board support following relocation changes
- switch to boards.cfg
- disable i2c to keep size under 128kiB (1 sector)

Signed-off-by: Eric Bénard <eric@eukrea.com>
2011-04-27 19:38:10 +02:00
Macpaul Lin
00d10eb041 ftsmc020: move ftsmc020 static mem controller to driver/mtd
Move the header file and definitions of ftsmc020
static memory control unit from a320 SoC folder to
"drivers/mtd" folder.

This change will let other SoC which also use ftsmc020
could share the same header file.

Signed-off-by: Macpaul Lin <macpaul@andestech.com>
2011-04-27 19:38:10 +02:00
Macpaul Lin
5656b40bb3 ftsdmc020: move ftsdmc020.h to include/faraday
Move the header file "ftsdmc020.h" (SDRAM Controller)
to "include/faraday" folder.

This change will let other SoC which also use ftsdmc020
could share the same header file.

Signed-off-by: Macpaul Lin <macpaul@andestech.com>
2011-04-27 19:38:10 +02:00
Eric Benard
c2b2a07eeb cpu9260: update board support
- update to new relocation code
- switch to boards.cfg
- get rid of LEGACY (still a little hack in .h to compile)
- add nand boot configuration
- boot tested for the following configurations :
	9260 (64MB RAM & nor boot)
	9260_nand (64MB RAM & nand boot)
	9G20_128M (128MB RAM & nor boot)
	9G20_nand_128M (128MB RAM & nand boot)
	(nor boot is using lowlevel init)

Signed-off-by: Eric Bénard <eric@eukrea.com>
2011-04-27 19:38:10 +02:00
Sughosh Ganu
9a290466db Fix the issue of _end symbol not being found while building
Fix the nand_spl build for the hawkboard

Signed-off-by: Sughosh Ganu <urwithsughosh@gmail.com>
2011-04-27 19:38:10 +02:00
Luca Ceresoli
fb6e1f1b9d ARMV7: OMAP3: Add support for Comelit DIG297 board
Board support for the DIG297 board manufactured by Comelit Group SpA.
It is a custom board based on the BeagleBoard <http://beagleboard.org/> by
Texas Instruments.

The board support is based on the BeagleBoard implementation.

Signed-off-by: Luca Ceresoli <luca.ceresoli@comelit.it>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Albert Aribaud <albert.aribaud@free.fr>
Cc: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-04-27 19:38:10 +02:00
Luca Ceresoli
6cbec7b3ba ARMV7: OMAP3: Cleanup extern variables in mem.c
Removed boot_flash_* extern variables.
boot_flash_type was totally unused. The other ones were actually constants, so
they have been replaced with #defines in the board config files.

Signed-off-by: Luca Ceresoli <luca.ceresoli@comelit.it>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Albert Aribaud <albert.aribaud@free.fr>
Cc: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-04-27 19:38:10 +02:00
Tom Warren
f4ef66685a arm: Tegra2: Move clk/mux init to board_early_init_f, add GPIO init
Signed-off-by: Tom Warren <twarren@nvidia.com>
2011-04-27 19:38:10 +02:00
Tom Warren
c5e93131fa arm: Tegra2: GPIO: Add basic GPIO definitions
Signed-off-by: Tom Warren <twarren@nvidia.com>
2011-04-27 19:38:10 +02:00
Tom Warren
1436d51076 arm: Tegra2: Add missing PLLX init
Signed-off-by: Tom Warren <twarren@nvidia.com>
2011-04-27 19:38:09 +02:00
Eric Cooper
6445a3051e ARM: fix stack pointer adjustment in board_init_f()
Since addr_sp is a byte address, it should be adjusted by 12 here.

Signed-off-by: Eric Cooper <ecc@cmu.edu>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Acked-by: Wolfgang Denk <wd@denx.de>
2011-04-27 19:38:09 +02:00
Tom Warren
74652cf684 arm: Tegra2: add support for A9 CPU init
Signed-off-by: Tom Warren <twarren@nvidia.com>
2011-04-27 19:38:09 +02:00
Luca Ceresoli
c2b626c199 ARMV7: OMAP3: Add GPMC_CONFIGx register value definitions
Signed-off-by: Luca Ceresoli <luca.ceresoli@comelit.it>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-04-27 19:38:09 +02:00
Luca Ceresoli
b32e8126a3 ARMV7: OMAP3: Fix preprocessor check for CONFIG_OMAP34XX
CONFIG_OMAP34XX must be checked for existence, not value.

Signed-off-by: Luca Ceresoli <luca.ceresoli@comelit.it>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Albert Aribaud <albert.aribaud@free.fr>
Cc: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-04-27 19:38:09 +02:00
Alexander Holler
d90859a67c omap3_beagle: enable EHCI and USB storage.
The reset sequence/configuration for ehci is highly board specific,
so this will be done in the source for the board, instead of
introducing several CONFIG_* which would be needed to make those
few lines in beagle.c usable across different OMAP boards.

Signed-off-by: Alexander Holler <holler@ahsoftware.de>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-04-27 19:38:09 +02:00
Alexander Holler
7b89795f17 OMAP3: Add support for DPLL5 (usbhost)
Signed-off-by: Alexander Holler <holler@ahsoftware.de>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-04-27 19:38:09 +02:00
Alexander Holler
320f56fc9c OMAP3: Change some USB related MUX values
Signed-off-by: Alexander Holler <holler@ahsoftware.de>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-04-27 19:38:09 +02:00
Enric Balletbo i Serra
30f3413ef2 ARM: OMAP3: Revamp IGEP module default configuration
The default IGEP configuration doesn't do anything useful; using some
boot.scr search logic like BeagleBoard is much more useful.

Signed-off-by: Enric Balletbo i Serra <eballetbo@iseebcn.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-04-27 19:38:09 +02:00
Enric Balletbo i Serra
304a46cac6 ARM: OMAP3: Revamp IGEP v2 default
configuration

The default IGEP configuration doesn't do anything useful; using some
boot.scr search logic like BeagleBoard is much more useful.

Signed-off-by: Loïc Minier <loic.minier@linaro.org>
Signed-off-by: Enric Balletbo i Serra <eballetbo@iseebcn.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-04-27 19:38:09 +02:00
Albert ARIBAUD
57b4bce996 Replace obsolete e-mail address
Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
2011-04-27 19:38:09 +02:00
Macpaul Lin
844c05a992 a320evb: fix include path of timer fttmr010
Fix include path of timer fttmr010 in a320evb.

Signed-off-by: Macpaul Lin <macpaul@andestech.com>
2011-04-27 19:38:08 +02:00
Macpaul Lin
0f7ffd75c6 fttmr010: move fttmr010 header to include/faraday
Move the header file and definitions of fttmr010
power control unit from a320 SoC folder to
"include/faraday" folder.

This change will let other SoC which also use fttmr010
could share the same header file.

Signed-off-by: Macpaul Lin <macpaul@andestech.com>
2011-04-27 19:38:08 +02:00
Macpaul Lin
d228710f51 ftpmu010.h: add asm support used by lowlevel_init
Add asm support which is ususally used in lowlevel_init to set
power related parameters to sdram controller and static memory controller.

Signed-off-by: Macpaul Lin <macpaul@andestech.com>
2011-04-27 19:38:08 +02:00
Macpaul Lin
caddb8e41e ftpmu010: fix relocation and enhance features
1. ftpmu010.h: fix and add definitions
   Enhanced for more features and asm related support
   according to datasheet.

   Note:
    - FTPMU010_PDLLCR0_HCLKOUTDIS is "incorrect" in datasheet.
    - FTPMU010_PDLLCR0_DLLFRANG is only 1 bit at bit #19. (not 20-19)
    - FTPMU010_PDLLCR0_HCLKOUTDIS is 4 bits at bit #20. (not 24-21)

2. ftpmu010.c: enhance features and fix relocation
   - The following functions is added for pmu features.
     ftpmu010_mfpsr_select_dev()
     ftpmu010_sdramhtc_set()
   - This patch also fix the declare statement for relocation.

Signed-off-by: Macpaul Lin <macpaul@andestech.com>
2011-04-27 19:38:08 +02:00
Rogan Dawes
286a5b253a Orion5x: Correct DRAM bank detection 2011-04-27 19:38:08 +02:00
Lei Wen
81a9ab21ca I2C: add i2c support for Armada100 platform
Add i2c support to aspenite board with Armada100 soc.

Acked-by: Heiko Schocher <hs@denx.de>
Acked-by: Prafulla Wadaskar <prafulla@marvell.com>
Signed-off-by: Lei Wen <leiwen@marvell.com>
2011-04-27 19:38:08 +02:00
Lei Wen
adb00bb6a0 I2C: mv_i2c: add multi bus support
Add the ability to support multiple i2c bus for mv_i2c

Acked-by: Heiko Schocher <hs@denx.de>
Acked-by: Prafulla Wadaskar <prafulla@marvell.com>
Signed-off-by: Lei Wen <leiwen@marvell.com>
2011-04-27 19:38:08 +02:00
Lei Wen
aa3b168e31 I2C: add i2c support for Pantheon platform
Add i2c support to dkb board with pantheon soc.

Acked-by: Heiko Schocher <hs@denx.de>
Acked-by: Prafulla Wadaskar <prafulla@marvell.com>
Signed-off-by: Lei Wen <leiwen@marvell.com>
2011-04-27 19:38:08 +02:00
Lei Wen
3df619ec2c mv_i2c: use structure to replace the direclty define
Add i2c_clk_enable in the cpu specific code, since previous platform it,
while new platform don't need. In the pantheon and armada100 platform,
this function is defined as NULL one.

Acked-by: Heiko Schocher <hs@denx.de>
Acked-by: Prafulla Wadaskar <prafulla@marvell.com>
Signed-off-by: Lei Wen <leiwen@marvell.com>
2011-04-27 19:38:08 +02:00
Lei Wen
879de1275a mv_i2c: fix timeout value to be consistent with comments
The original 10000 value would be 100ms, which is not
the comments said.

Acked-by: Heiko Schocher <hs@denx.de>
Acked-by: Prafulla Wadaskar <prafulla@marvell.com>
Signed-off-by: Lei Wen <leiwen@marvell.com>
2011-04-27 19:38:07 +02:00
Lei Wen
68432c2743 pxa: move i2c driver to the common place
For better sharing with other platform other than pxa's,
it is more convenient to put the driver to the common place.

Acked-by: Heiko Schocher <hs@denx.de>
Acked-by: Prafulla Wadaskar <prafulla@marvell.com>
Signed-off-by: Lei Wen <leiwen@marvell.com>
2011-04-27 19:38:07 +02:00
Fabio Estevam
776784908c MX25: tx25: Add _end section on nand_spl
Commit f326cbb (arm: fix incorrect monitor protection region in FLASH) missed to update
nand_spl/board/karo/tx25/u-boot.lds.

Add the _end section.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2011-04-27 19:38:07 +02:00
Stefano Babic
7f5b2bb79b MX31: mx31pdk: fix nand_spl
Commit f326cbba98 breaks mx31pdk,
as the _end section in u-boot.lds is missing for the nand_spl
production.

Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Fabio Estevam <fabio.estevam@freescale.com>
Tested-by: Fabio Estevam <fabio.estevam@freescale.com>
2011-04-27 19:38:07 +02:00
Matt Waddel
471eec58de ARMV7: Vexpress: Remove config.mk
Remove obsolete board config.mk.

Signed-off-by: Matt Waddel <matt.waddel@linaro.org>
2011-04-27 19:38:07 +02:00
Po-Yu Chuang
8dc667c9b8 arm: a320: use new ftpmu010 API
ftpmu010 related code has been moved to drivers/power/.

Signed-off-by: Po-Yu Chuang <ratbert@faraday-tech.com>
Signed-off-by: Albert Aribaud <albert.aribaud@free.fr>
2011-04-27 19:38:07 +02:00
Po-Yu Chuang
d6150db2dc power: ftpmu010: move drivers/power/ftpmu010.h to include/faraday
Also add API declarations.

Signed-off-by: Po-Yu Chuang <ratbert@faraday-tech.com>
Signed-off-by: Albert Aribaud <albert.aribaud@free.fr>
2011-04-27 19:38:07 +02:00
Matthias Weisser
d8834a1323 arm: Use optimized memcpy and memset from linux
Using optimized versions of memset and memcpy from linux brings a quite
noticeable speed (x2 or better) improvement for these two functions.

Here are some numbers for test done with jadecpu

                           | HEAD(1)| HEAD(1)| HEAD(2)| HEAD(2)|
                           |        | +patch |        | +patch |
---------------------------+--------+--------+--------+--------+
Reset to prompt            |  438ms |  330ms |  228ms |  120ms |
                           |        |        |        |        |
TFTP a 3MB img             | 4782ms | 3428ms | 3245ms | 2820ms |
                           |        |        |        |        |
FATLOAD USB a 3MB img*     | 8515ms | 8510ms | ------ | ------ |
                           |        |        |        |        |
BOOTM LZO img in RAM       | 3473ms | 3168ms |  592ms |  592ms |
 where CRC is              |  615ms |  615ms |   54ms |   54ms |
 uncompress                | 2460ms | 2462ms |  450ms |  451ms |
 final boot_elf            |  376ms |   68ms |   65ms |   65ms |
                           |        |        |        |        |
BOOTM LZO img in FLASH     | 3207ms | 2902ms | 1050ms | 1050ms |
 where CRC is              |  600ms |  600ms |  135ms |  135ms |
 uncompress                | 2209ms | 2211ms |  828ms |  828ms |
                           |        |        |        |        |
Copy 1.4MB from NOR to RAM |  134ms |   72ms |  120ms |   70ms |

(1) No dcache
(2) dcache enabled in board_init
*Does not work when dcache is on

Size impact:

C version:
   text    data     bss     dec     hex filename
 202862   18912  266456  488230   77326 u-boot

ASM version:
   text    data     bss     dec     hex filename
 203798   18912  266288  488998   77626 u-boot
222712  u-boot.bin

Signed-off-by: Matthias Weisser <weisserm@arcor.de>
2011-04-27 19:38:07 +02:00
Igor Grinberg
b65a77a861 OMAP3: CM-T35: Add support for CM-T3730
CM-T3730 is exactly the same board as CM-T35, but it has
TI DM3730 SoC onboard and therefore some changes have to take place

Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-04-27 19:38:07 +02:00
Igor Grinberg
2b8754b25f OMAP3: CM-T35: enable the green LED
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-04-27 19:38:07 +02:00
Igor Grinberg
afff1fc079 OMAP3: CM-T35: remove redundand i2c initialization
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-04-27 19:38:07 +02:00
Igor Grinberg
13009e3f28 OMAP3: CM-T35: fix mmc
Use CONFIG_OMAP3_MMC in cm-t35 configuration file.

Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-04-27 19:38:07 +02:00
Igor Grinberg
eec70c2dda OMAP3: CM-T35: add MMC1 pinmux
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-04-27 19:38:06 +02:00
Igor Grinberg
31dd52f74d OMAP3: CM-T35: update MAINTAINERS file
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
Acked-by: Mike Rapoport <mike@compulab.co.il>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-04-27 19:38:06 +02:00
Igor Grinberg
dccd9a0b4f OMAP3: CM-T35: update board files header information
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-04-27 19:38:06 +02:00
Igor Grinberg
41d7e702eb OMAP3: CM-T35: update config
update config for OMAP3 CM-T35

Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-04-27 19:38:06 +02:00
Igor Grinberg
557aa15594 OMAP3: CM-T35: Move DECLARE_GLOBAL_DATA_PTR to file scope
Move DECLARE_GLOBAL_DATA_PTR to file scop

Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-04-27 19:38:06 +02:00
Srinath
915162daaa ARMV7: AM3517/05: Add support for CraneBoard.
It is a low cost reference design based on Sitara AM3517 SoC from Texas Instruments
Please refer to <www.craneboard.org> for more details.

Signed-off-by: Srinath <srinath@mistralsolutions.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-04-27 19:38:06 +02:00
Koen Kooi
ee8485fd84 OMAP3: BeagleBoard: add more expansionboard IDs
Information on configurations pulled from
http://www.elinux.org/BeagleBoardPinMux#Vendor_and_Device_IDs

Boards added:
* Added BeagleBoardToys WiFi, VGA and LCD boards
* Added KBADC Beagle FPGA board
* Added Brainmux LCDog and LCDog Touch
* Added Liquidware BeagleTouch

Signed-off-by: Jason Kridner <jkridner@beagleboard.org>
Signed-off-by: Koen Kooi <koen@dominion.thruhere.net>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-04-27 19:38:06 +02:00
Koen Kooi
f6e593bb12 OMAP3: BeagleBoard: add xM rev B to ID table
Patch was updated by Jason Kridner <jkridner@beagleboard.org>:
* Use tabs to match style of other board revisions
* Only include board revisions that exist
* Default to the same configuration as the latest revision, but
  without setting 'beaglerev'

Signed-off-by: Koen Kooi <koen@dominion.thruhere.net>
Signed-off-by: Jason Kridner <jkridner@beagleboard.org>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-04-27 19:38:06 +02:00
Steve Kipisz
d4e53f063d OMAP3: BeagleBoard: Enable pullups on i2c2.
This allows the reading of EEPROMS on the expansion bus without adding
external pull-ups.

Signed-off-by: Jason Kridner <jkridner@beagleboard.org>
Signed-off-by: Steve Kipisz <s-kipisz2@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-04-27 19:38:06 +02:00
Alexander Holler
cf073e49bc omap3_beagle: enable the use of a plain text file
Using the new env import command it is possible to use plain text files instead
of script-images. Plain text files are much easier to handle.

E.g. If your boot.scr contains the following:
-----------------------------------
setenv dvimode 1024x768-16@60
run loaduimage
run mmcboot
-----------------------------------
you could create a file named uEnv.txt and use that instead of boot.scr:
-----------------------------------
dvimode=1024x768-16@60
uenvcmd=run loaduimage; run mmcboot
-----------------------------------
The variable uenvcmd (if existent) will be executed (using run) after uEnv.txt
was loaded. If uenvcmd doesn't exist the default boot sequence will be started,
therefore you could just use
-----------------------------------
dvimode=1024x768-16@60
-----------------------------------
as uEnv.txt because loaduimage and mmcboot is part of the default boot sequence

Signed-off-by: Jason Kridner <jkridner@beagleboard.org>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-04-27 19:38:06 +02:00
Jason Kridner
70d8c9446f BeagleBoard: Added LED driver
Added LED driver using status_led.  USR0 is set to monitor the boot
status.  USR1 is set to be the green LED.

Included adding configuration and command to the default configuration.

Signed-off-by: Jason Kridner <jkridner@beagleboard.org>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-04-27 19:38:06 +02:00
Jason Kridner
b633f66f02 Add 'led' command
This patch allows any board implementing the coloured LED API
to control the LEDs from the console.

led [green | yellow | red | all ]  [ on | off ]

or

led [ 1 | 2 | 3 | all ]  [ on | off ]

Adds configuration item CONFIG_CMD_LED enabling the command.

Partially based on patch from Ulf Samuelsson:
http://www.mail-archive.com/u-boot@lists.denx.de/msg09593.html.

Updated based on feedback:
http://www.mail-archive.com/u-boot@lists.denx.de/msg41847.html
https://groups.google.com/d/topic/beagleboard/8Wf1HiK_QBo/discussion
* Fixed a handful of style issues.
* Significantly reduced the number of #ifdefs and redundant code
* Converted redundant code into loops test against a structure
* Made use of cmd_usage()
* Introduced a str_onoff() function, but haven't yet put it in common
* Eliminated trailing newline

Signed-off-by: Jason Kridner <jkridner@beagleboard.org>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-04-27 19:38:05 +02:00
Stefano Babic
cd4b8a6329 MX31: drop warnings in get_cpu_rev
Drop warnings due to recent commit
ARM: mx31: Print the silicon version

Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Fabio Estevam <fabio.estevam@freescale.com>
2011-04-27 19:38:05 +02:00
Jason Liu
7517a793f0 MX5: factor out boot cause funciton to common code
factor out boot cause function to common code to avoid
the duplicate code in each board support package

Signed-off-by: Jason Liu <jason.hui@linaro.org>
2011-04-27 19:38:05 +02:00
Fabio Estevam
a770975ab6 ARM: MX31: Fix file name label
Commit 5d2c154 (IMX: MX31: Cleanup include files and drop nasty #ifdef in drivers)
renamed mx31-imx-regs.h to imx-regs.h.

Change the file label accordingly.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2011-04-27 19:38:05 +02:00
Fabio Estevam
e9e0790cff MX31: mx31pdk: Make the board name simpler.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2011-04-27 19:38:05 +02:00
Fabio Estevam
25d8e1bb19 MX31: Introduce get_reset_cause()
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Detlev Zundel <dzu@denx.de>
2011-04-27 19:38:05 +02:00
Fabio Estevam
4adaf9bf09 ARM: mx31: Print the silicon version
Use the same method of the Linux kernel to print the MX31 silicon version on
boot.

Tested on a MX31PDK with a 2.0 silicon, where it shows:

CPU:   Freescale i.MX31 rev 2.0 at 531 MHz

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2011-04-27 19:38:05 +02:00
Stefano Babic
8627111543 IMX: MX31: Cleanup include files and drop nasty #ifdef in drivers
As exception among the i.MX processors, the i.MX31 has headers
without general names (mx31-regs.h, mx31.h instead of imx-regs.h and
clock.h). This requires several nasty #ifdef in the drivers to
include the correct header. The patch cleans up the driver and
renames the header files as for the other i.MX processors.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2011-04-27 19:38:05 +02:00
Liu Hui-R64343
dcd441c325 MX5: Enable flat-device-tree support on mx51/53 evk board
device tree for uboot arm support has already been enabled
in the master branch. This patch enable device tree support
for mx51/53 evk board for DT test.

Signed-off-by: Jason Liu <r64343@freescale.com>
2011-04-27 19:38:05 +02:00
Liu Hui-R64343
ec665d75a7 MX53: drop config.mk from mx53evk
The config.mk file in board directory is now obsolete and
should be removed. Add option for the IMX image into
boards.cfg

Signed-off-by: Jason Liu <r64343@freescale.com>
2011-04-27 19:38:05 +02:00
Fabio Estevam
9aa720b145 mx25: Make the UART port number explicit in its setup function
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2011-04-27 19:38:05 +02:00
Stefano Babic
8640c98463 MX31: qong: add watchdog
Signed-off-by: Stefano Babic <sbabic@denx.de>
2011-04-27 19:38:04 +02:00
Stefano Babic
2cf36ae7cf MX31: add support for MX31 watchdog
The patch add CONFIG_HW_WATCHDOG to be used
with the internal watchdog timer of the MX31
processor. Two function are exported for the
board maintainers:
	mxc_hw_watchdog_enable
	mxc_hw_watchdog_reset

The board maintainer can decide to use mxc_hw_watchdog_reset as
hw_watchdog_reset, or to implement his own function to reset
the watchdog.
The watchdog timer can be configured with CONFIG_SYS_WD_TIMER_SECS
(value in seconds). The MX31 allows values between 0.5
(CONFIG_SYS_WD_TIMER_SECS = 0) and 128 seconds.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2011-04-27 19:38:04 +02:00
Stefano Babic
c7bdcb61f3 MX51: drop config.mk from mx51evk
The config.mk file in board directory is now obsolete and
should be removed. Add option for the IMX image into
boards.cfg

Signed-off-by: Stefano Babic <sbabic@denx.de>
2011-04-27 19:38:04 +02:00
Stefano Babic
45d7d72b0e Makefile: change rule to build IMX image
config.mk in board directory is obsolete and should be removed.
The patch allows to get rid of own config.mk adding the imximage.cfg
file to the options in the boards.cfg

Signed-off-by: Stefano Babic <sbabic@denx.de>
2011-04-27 19:38:04 +02:00
Grant Likely
55b0a39314 Respect memreserve regions specified in the device tree
If a regions is reserved in the fdt, then it should not be used.  Add
the memreserve regions to the lmb so that u-boot doesn't use them to
store the initrd.

Signed-off-by: Grant Likely <grant.likely@linaro.org>
2011-04-25 21:11:21 -04:00
Grant Likely
ce6b27a874 Fix off-by-one error in passing initrd end address via device tree
The initrd_end variable contains the address immediately *after* the
initrd blob, not the last address containing data.  This patch fixes
an inadvertent off-by-one when setting up the initrd reserved map.

Signed-off-by: Grant Likely <grant.likely@linaro.org>
2011-04-25 21:11:21 -04:00
Grant Likely
ed59e58786 Remove device tree booting dependency on CONFIG_SYS_BOOTMAPSZ
The previous patch makes u-boot use the full accessible size of ram as
the default boot mapped size if CONFIG_SYS_BOOTMAPSZ is not defined,
which means boot_relocate_fdt() can be changed to depend solely on
CONFIG_OF_LIBFDT.

Signed-off-by: Grant Likely <grant.likely@linaro.org>
2011-04-25 21:11:20 -04:00
Grant Likely
c3624e6ed0 Default to bootm_size() when CONFIG_SYS_BOOTMAPSZ is not defined
This patch adds a function getenv_bootm_mapsize() for obtaining the
size of the early mapped region accessible by the kernel during early
boot.  It defaults to CONFIG_SYS_BOOTMAPSZ, or if not defined,
defaults to getenv_bootm_size(), which in turn defaults to the size of
RAM.

getenv_bootm_mapsize() can also be overridden with a "bootm_mapsize"
environmental variable.

Signed-off-by: Grant Likely <grant.likely@linaro.org>
2011-04-25 21:11:20 -04:00
Grant Likely
590d3cacb9 Stop passing around bootmem_base value.
For the calls to boot_relocate_fdt(), boot_get_cmdline(), and
boot_get_kbd(), the value of bootmem_base is always obtained by
calling getenv_bootm_low().  Since the value always comes from the
same source, the calling signature for those functions can be
simplified by making them call getenv_bootm_low() directly.

Signed-off-by: Grant Likely <grant.likely@linaro.org>
2011-04-25 21:11:19 -04:00
Heiko Schocher
a01ebd9679 mpc52xx, digsy_mtc: add trickle charger support for rev5 boards.
Signed-off-by: Heiko Schocher <hs@denx.de>
Acked-by: Detlev Zundel <dzu@denx.de>
2011-04-26 00:25:05 +02:00
Heiko Schocher
71d19f30d6 rtc, rv3029: add trickle charger support.
Signed-off-by: Heiko Schocher <hs@denx.de>
Acked-by: Detlev Zundel <dzu@denx.de>
2011-04-26 00:24:40 +02:00
Loïc Minier
31e413985c Fix typo in #error: IS_IN_NOWHERE vs. IS_NOWHERE
Signed-off-by: Loc Minier <loic.minier@linaro.org>
2011-04-26 00:04:02 +02:00
Mike Frysinger
9ccf0b24fb Blackfin: adi boards: add eon to the "all" spi flash list
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-25 02:02:52 -04:00
Mike Frysinger
945201a53f Blackfin: bf506f-ezkit: disable import/export env commands
Space is very tight on this board, so remove more extraneous commands.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-25 02:02:51 -04:00
Mike Frysinger
14dda9df19 Blackfin: bf537-stamp/bf527-ad7160-eval: convert to mmc_spi
Switch to the new common mmc_spi driver.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-25 02:02:50 -04:00
Thomas Chou
6c3eb43a0f bfin_spi: add spi_set_speed
The new speed will be applied by spi_claim_bus.

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-25 01:45:42 -04:00
Thomas Chou
fa1423e707 spi: add spi_set_speed func
This func helps mmc_spi driver set correct speed for mmc/sd, as
mmc card needs 400KHz clock for spi mode initialization.

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-25 01:45:29 -04:00
Wolfgang Denk
f02efacc51 Merge branch 'master' of git://git.denx.de/u-boot-cfi-flash 2011-04-25 00:58:45 +02:00
Wolfgang Denk
e22ba10107 Merge branch 'master' of git://git.denx.de/u-boot-ppc4xx 2011-04-25 00:55:26 +02:00
Joakim Tjernlund
c1fa1b7d00 powerpc, 8xx: Fix fallout from "Fixup all 8xx u-boot.lds scripts"
Two linker scripts for 8xx was missed.

Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
2011-04-24 22:49:16 +02:00
Aaron Williams
a90b9575f3 cfi_flash driver - Add delay after reset command
I ran into a problem where the reset was failing except when I enabled
debugging support.  After talking with Garret Swalling at Spansion I
was told that the GL-N series of devices require a 500ns wait for the
reset to complete.  The below patch adds a 1us delay after all reset
commands.

-Aaron Williams

Signed-off-by: Aaron Williams <aaron.williams@caviumnetworks.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2011-04-21 15:51:49 +02:00
Heiko Schocher
5b448adb4b mtd, cfi: read AMD 3-byte (expanded) device ids on 16bit devices
tested on the a4m072 board with a S29GL512P flash.

flinfo without this patch
Bank # 1: CFI conformant flash (16 x 16)  Size: 32 MB in 256 Sectors
  AMD Standard command set, Manufacturer ID: 0x01, Device ID: 0x227E
  Erase timeout: 16384 ms, write timeout: 2 ms
  Buffer write timeout: 5 ms, buffer size: 32 bytes
[...]

flinfo with this patch
Bank # 1: CFI conformant flash (16 x 16)  Size: 32 MB in 256 Sectors
  AMD Standard command set, Manufacturer ID: 0x01, Device ID: 0x227E2301
  Erase timeout: 16384 ms, write timeout: 2 ms
  Buffer write timeout: 5 ms, buffer size: 32 bytes
[...]

Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2011-04-21 15:51:39 +02:00
Mike Frysinger
6a011ce851 cfi_flash: reverse geometry for M29W800DT parts
The M29W800DT parts also report their geometry with the sector layout
reversed.  So add that ID to the flash_fixup_stm function.

Otherwise, we get:
bfin> flinfo

Bank # 1: CFI conformant FLASH (16 x 16)  Size: 1 MB in 19 Sectors
  AMD Standard command set, Manufacturer ID: 0x20, Device ID: 0x22D7
  Erase timeout: 8192 ms, write timeout: 1 ms

  Sector Start Addresses:
  20000000        20004000        20006000        20008000        20010000
  20020000        20030000        20040000        20050000        20060000
  20070000        20080000        20090000        200A0000        200B0000
  200C0000        200D0000        200E0000        200F0000

Reported-by: Jianxi Fu <fujianxi@gmail.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Stefan Roese <sr@denx.de>
2011-04-21 15:51:17 +02:00
Dirk Eibach
6cfa9eecb4 ppc4xx: Do not stop booting on any keypress on dlvision-10g
Use CONFIG_AUTOBOOT_KEYED on dlvision-10g so that booting can only be
stopped with well defined keypresses.

Signed-off-by: Dirk Eibach <eibach@gdsys.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2011-04-21 10:35:04 +02:00
Dirk Eibach
6c57c88dd2 ppc4xx: Improve fan PWM curve on DLVision 10G
Signed-off-by: Dirk Eibach <eibach@gdsys.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2011-04-21 10:34:58 +02:00
Dirk Eibach
7749c84e9d ppc4xx: Enable MPC92469AC on DLVision 10G
Signed-off-by: Dirk Eibach <eibach@gdsys.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2011-04-21 10:34:51 +02:00
Dirk Eibach
52158e3616 ppc4xx: Set DLVision 10G osd position to linux defaults
Signed-off-by: Dirk Eibach <eibach@gdsys.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2011-04-21 10:34:45 +02:00
Dirk Eibach
5cb4100f58 ppc4xx: Adapt DLVision 10G to new FPGA firmware
Signed-off-by: Dirk Eibach <eibach@gdsys.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2011-04-21 10:34:41 +02:00
Dirk Eibach
8aa50540e4 ppc4xx: Enable LM64 on DLVision 10G
Signed-off-by: Dirk Eibach <eibach@gdsys.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2011-04-21 10:34:36 +02:00
Dirk Eibach
b9ab8a994d ppc4xx: Improve video board detection
Signed-off-by: Dirk Eibach <eibach@gdsys.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2011-04-21 10:34:19 +02:00
Dirk Eibach
6853cc4b94 ppc4xx: Improve DLVision-10G PLL setup
Signed-off-by: Dirk Eibach <eibach@gdsys.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2011-04-21 10:34:15 +02:00
Ricardo Ribalda Delgado
d3da722552 xilinx_ppc_boards: Change address of RESET_VECTOR
Old address of RESET_VECTOR were overwritten by the bss sector, making
impossible its run from xmd.

Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2011-04-21 10:33:20 +02:00
Jon Povey
735eb0f0e6 tools/env: fix redundant env flag comparison
This fixes two bugs with comparison of redundant environment flags on
read.

flag0 and flag1 in fw_env_open() were declared signed instead of
unsigned char breaking BOOLEAN mode "== 0xFF" tests and in INCREMENTAL
mode the wrong environment would be chosen where the flag values are
127 and 128 (either way round). With both flags over 128, both signs
flipped and the logic worked by happy accident.

Also there was a logic bug in the INCREMENTAL test (after signedness was
fixed) in the case flag0=0, flag1=255, env 1 would be incorrectly chosen.

Fix both of these.

Signed-off-by: Jon Povey <jon.povey@racelogic.co.uk>
2011-04-21 00:25:08 +02:00
Wolfgang Denk
aef293bc85 Merge branch 'phylib' of git://git.denx.de/u-boot-mmc 2011-04-20 23:01:52 +02:00
Wolfgang Denk
9dd5dad887 Merge branch 'misc' of git://git.denx.de/u-boot-blackfin 2011-04-20 22:57:35 +02:00
Wolfgang Denk
d7eb184af8 Merge branch 'master' of git://git.denx.de/u-boot-fdt 2011-04-20 22:53:34 +02:00
Wolfgang Denk
afe0414b2e Merge branch 'master' of git://git.denx.de/u-boot-nand-flash 2011-04-20 22:50:22 +02:00
Wolfgang Denk
a94028338c Merge branch 'master' of git://git.denx.de/u-boot-i2c 2011-04-20 22:48:47 +02:00
Wolfgang Denk
4f27f0ab98 Merge branch 'master' of git://git.denx.de/u-boot-mmc 2011-04-20 22:18:13 +02:00
Wolfgang Denk
8c4734e9af Revert "PowerPC: Add support for -msingle-pic-base"
This reverts commit 39768f7715.

Reson: it breaks a number of boards with embedded environment as the
code size grows in some places.
2011-04-20 22:11:21 +02:00
Andy Fleming
995daa0b81 Add mdio command for new PHY infrastructure
The new mdio command doesn't have all of the features of the mii
command, but it provides the necessary read/write primitives, and allows
users to interact with 10G PHYs, and other PHYs which use Clause 45 of
802.3.  This means that the mdio command requires a "Device Address"
argument, though for clause 22 PHYs, the argument can be "-".

Signed-off-by: Andy Fleming <afleming@freescale.com>
Acked-by: Detlev Zundel <dzu@denx.de>
2011-04-20 15:09:35 -05:00
Andy Fleming
865ff85640 fsl: Change fsl_phy_enet_if to phy_interface_t
The fsl_phy_enet_if enum was, essentially, the phy_interface_t enum.
This meant that drivers which used fsl_phy_enet_if to deal with
PHY interfaces would have to convert between the two (or we would have
to have them mirror each other, and deal with the ensuing maintenance
headache). Instead, we switch all clients of fsl_phy_enet_if over to
phy_interface_t, which should become the standard, anyway.

Signed-off-by: Andy Fleming <afleming@freescale.com>
Acked-by: Detlev Zundel <dzu@denx.de>
2011-04-20 15:09:35 -05:00
Andy Fleming
063c12633d tsec: Convert tsec to use PHY Lib
This converts tsec to use the new PHY Lib.  All of the old PHY support
is ripped out.  The old MDIO driver is split off, and placed in
fsl_mdio.c.  The initialization is modified to initialize the MDIO
driver as well.  The powerpc config file is modified to configure PHYLIB
if TSEC_ENET is configured.

Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Detlev Zundel <dzu@denx.de>
2011-04-20 15:09:34 -05:00
Andy Fleming
9082eeac5d phylib: Add a bunch of PHY drivers from tsec
The tsec driver had a bunch of PHY drivers already written. This
converts them all into PHY Lib drivers, and serves as the first
set of PHY drivers for PHY Lib.

While doing that, cleaned up a number of magic numbers (though
not all of them, as PHY vendors like to keep their numbers as
magical as possible).  Also, noticed that almost all of the
vitesse/cicada PHYs had the same config/parse/startup functions,
so those have been collapsed into one.

Signed-off-by: Andy Fleming <afleming@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Detlev Zundel <dzu@denx.de>
2011-04-20 15:09:34 -05:00
Andy Fleming
5f184715ec Create PHY Lib for U-Boot
Extends the mii_dev structure to participate in a full-blown MDIO and
PHY driver scheme.  The mii_dev structure and miiphy calls are modified
in such a way to allow the original mii command and miiphy
infrastructure to work as before, but also to support a new set of APIs
which allow (among other things) sharing of PHY driver code and 10G support

The mii command will continue to support normal PHY management functions
(Clause 22 of 802.3), but will not be changed to support 10G
(Clause 45).

The basic design is similar to PHY Lib from Linux, but simplified for
U-Boot's network and driver infrastructure.

We now have MDIO drivers and PHY drivers

An MDIO driver provides:
read
write
reset

A PHY driver provides:
(optionally): probe
config - initial setup, starting of auto-negotiation
startup - waiting for AN, and reading link state
shutdown - any cleanup needed

The ethernet drivers interact with the PHY Lib using these functions:
phy_connect()
phy_config()
phy_startup()
phy_shutdown()

Each PHY driver can be configured separately, or all at once using
config_phylib_all_drivers.h (added in the patch which adds the drivers)

We also provide generic drivers for Clause 22 (10/100/1000), and
Clause 45 (10G) PHYs.

We also implement phy_reset(), and call it in phy_connect(). Because
phy_reset() is essentially the same as miiphy_reset, but:
a) must support 10G PHYs, and
b) should use the phylib primitives,

we implement miiphy_reset, using phy_reset(), but only when
CONFIG_PHYLIB is set. Otherwise, we just use the old version. In this
way, we save on compile size, even if we don't manage to save code size.

Pulled ethtool.h and mdio.h from:
git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next-2.6
782d640afd15af7a1faf01cfe566ca4ac511319d
With many, many deletions so as to enable compilation under u-boot

Signed-off-by: Andy Fleming <afleming@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Detlev Zundel <dzu@denx.de>
2011-04-20 15:09:19 -05:00
Joakim Tjernlund
9d8fbd1b20 powerpc, 8xx: Fixup all 8xx u-boot.lds scripts
8xx was left behind when fixing up powerpc linking
scripts to support -fpic.

Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
2011-04-20 22:03:13 +02:00
Andy Fleming
16a5323833 miiphy: Fix some formatting issues
Mostly putting a space between function name and "(", and
doing return (foo)

Signed-off-by: Andy Fleming <afleming@freescale.com>
Acked-by: Detlev Zundel <dzu@denx.de>
2011-04-20 13:44:46 -05:00
Andy Fleming
09c04c2096 Remove instances of phy_read/write
There were a few files which were already using phy_read and phy_write
for their PHY function names.  It's only a few places, and the name
seems most appropriate for the high-level abstraction, so let's
rename the other versions to something more specific.

Also, uec_phy.c had a marvell_init function which I renamed to not
conflict with the one in marvell.c

Lastly, uec_phy.c was putting a space between the phy writing
function names, and the open paren, so I fixed that

Signed-off-by: Andy Fleming <afleming@freescale.com>
Acked-by: Detlev Zundel <dzu@denx.de>
2011-04-20 13:44:46 -05:00
Mingkai Hu
907519108c tsec: arrange the code to avoid useless function declaration
This is merely a rearrangement.  No changes to the code, except
to remove now-useless declarations.

Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
Acked-by: Andy Fleming <afleming@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Detlev Zundel <dzu@denx.de>
2011-04-20 13:44:46 -05:00
Mingkai Hu
a32a6be28f tsec: use IO accessors for IO accesses
Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
Acked-by: Andy Fleming <afleming@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Detlev Zundel <dzu@denx.de>
2011-04-20 13:44:46 -05:00
Kyle Moffett
d13ffa66af fdt_support: Fix buffer overflow in fdt_fixup_memory_banks
When fdt_fixup_memory_banks is called with 2-cell address and size
fields in the device-tree (IE: 64-bit address and size), then it will
overflow its on-stack "tmp" buffer.

This fixes the buffer size and adds a comment explaining how many bytes
need to be allocated per record.

Signed-off-by: Kyle Moffett <Kyle.D.Moffett@boeing.com>
Cc: Jerry Van Baren <vanbaren@cideas.com>
Acked-by: Gerald Van Baren <vanbaren@cideas.com>
2011-04-17 21:08:41 -04:00
Dipen Dudhat
e1f703810e powerpc/85xx: Modify NAND loader makefiles to compile NAND_SPL linker script
Modify eLBC based platform's NAND loader Makefile to preprocess nand loader
linker script and then use it.

Signed-off-by: Dipen Dudhat <Dipen.Dudhat@freescale.com>
CC: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-15 15:57:32 -05:00
Alex Waterman
65a9db7be0 nand_spl: Fix large page nand_command()
This patch changes the large page nand_command() routine to use a word
offset instead of a byte offset. The 'offs' argument gets divided by 2
so that the offset passed to nand_command() is still by byte offset.
Originally, the offset was not shifted and when too high an offset was
requested the nand chip would attempt to read non-existent data.

Signed-off-by: Alex Waterman <awaterman@dawning.com>
2011-04-15 15:53:11 -05:00
Matthew McClintock
6297454688 nand/spl: Assuming a static nand page size to reduce code size
Change variables to const to reduce code size, these values are
hardcoded via defines anyways so we might as well assume they
are constants

Signed-off-by: Matthew McClintock <msm@freescale.com>
cc: Scott Wood <scottwood@freescale.com>
2011-04-15 15:53:11 -05:00
Florian Fainelli
aad99bbc39 NAND: rearrange ONFI revision checking, add ONFI 2.3
This patch sync with Brian's patch on Linux in nand_flash_detect_onfi()

	commit b7b1a29d94c17e4341856381bccb4d17495bea60
	Author: Brian Norris <computersforpeace@gmail.com>
	Date:   Sun Dec 12 00:23:33 2010 -0800

	    mtd: nand: rearrange ONFI revision checking, add ONFI 2.3

	    In checking for the ONFI revision, the first conditional (for checking
	    "unsupported" ONFI) seems unnecessary.  All ONFI revisions should be
	    backwards-compatible; even if this is not the case on some newer ONFI
	    revision, it should simply fail the second version-checking if-else block
	    (i.e., the bit-fields for 1.0, 2.0, etc. would not be set to 1). Thus, we
	    move our "unsupported" condition after having checked each bit field.

	    Also, it's simple enough to add a condition for ONFI revision 2.3. Note
	    that this does *NOT* mean we handle all new features of ONFI versions
	    above 1.0.

	    Signed-off-by: Brian Norris <computersforpeace@gmail.com>
	    Acked-by: Florian Fainelli <ffainelli@freebox.fr>
	    Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>

Signed-off-by: Florian Fainelli <florian@openwrt.org>
2011-04-15 15:53:11 -05:00
Florian Fainelli
a931f49296 NAND: Fix integer overflow in ONFI detection of chips >= 4GiB
This patch sync with David's patch on Linux in nand_flash_detect_onfi()

	commit 4ccb3b4497ce01fab4933704fe21581e30fda1a5
	Author: David Woodhouse <David.Woodhouse@intel.com>
	Date:   Fri Dec 3 16:36:34 2010 +0000

    	mtd: nand: Fix integer overflow in ONFI detection of chips >= 4GiB

    	Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>

Signed-off-by: Florian Fainelli <florian@openwrt.org>
2011-04-15 15:53:11 -05:00
Nick Thompson
0e57968a21 I2C: OMAP: detect more devices when probing an i2c bus
The omap24xx driver only seems to support devices that have a single subaddress
byte. With these types of devices, the first access in a bus transaction is
usually a write (writes the subaddress) followed by either a read or write to
access the devices registers.

Many such devices will respond to a read as the first access, but there are at
least some that will NACK such a read. (e.g. ADV7180.)

The probe function attempts to detect a devices ACK to a read access only and
fails to find devices that NACK a read.

This commit modifies the probe function to start a write instead. This detects
devices that respond to reads (since they must also respond to writes) as well
as those that only respond to writes. The bus is immediately set to idle after a
(N)ACK avoiding actually writing anything to the device.

Signed-off-by: Nick Thompson <nick.thompson@ge.com>
2011-04-14 08:33:23 +02:00
Fabio Estevam
73e5476e1e MAINTAINERS: fix email address case
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2011-04-13 22:40:51 +02:00
Simon Glass
21076f61c7 Fix bad padding of bootp request packet
This seems to pad to one byte longer than required

Signed-off-by: Simon Glass <sjg@chromium.org>
2011-04-13 22:25:07 +02:00
Wolfgang Denk
f16b608ae7 Merge branch 'sf' of git://git.denx.de/u-boot-blackfin 2011-04-13 22:04:11 +02:00
Mike Frysinger
6801201ee7 gpio: check request result
Make sure the pin request passed before attempting to use it later on.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-13 15:57:00 -04:00
Mike Frysinger
f93c25966f config_defaults.h: drop OSE bootm default
Most arches don't support OSE, and this is a new bootm target, so the
likelihood of any board actually wanting this today is fairly low.

Any board who actually wants this can enable it in the board-specific
config without making it a default bloat.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-13 15:56:56 -04:00
Mike Frysinger
a972b8d701 gpio: generalize for all generic gpio providers
The Blackfin gpio command isn't terribly Blackfin-specific.  So generalize
the few pieces into two new optional helpers:
	name_to_gpio() - turn a string name into a GPIO #
	gpio_status() - display current pin bindings (think /proc/gpio)

Once these pieces are pulled out, we can relocate the cmd_gpio.c into the
common directory.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-13 15:56:51 -04:00
Mike Frysinger
c3d2a17c1e md5sum/sha1sum/unzip: split out of mondo mem file
There's no real need to keep these functions in the cmd_mem file since
they do not use any of the common global mem variables.  So split them
out into their own dedicated cmd files.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-13 15:56:47 -04:00
Mike Frysinger
710b99385c crc32: make command optional
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-13 15:56:43 -04:00
Mike Frysinger
a641b9794b make go optional
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-13 15:56:39 -04:00
Mike Frysinger
0c79cda01b env: make import/export optional
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-13 15:56:34 -04:00
Wolfgang Denk
107b56bdd8 Merge branch 'master' of git://git.denx.de/u-boot-x86 2011-04-13 21:53:09 +02:00
Peter Tyser
2c51983b81 cfi_flash: Fix CONFIG_SYS_FLASH_AUTOPROTECT_LIST usage
Commit 6ee1416e81 (mtd, cfi: introduce
void flash_protect_default(void)) introduced a bug which resulted in
boards that define CONFIG_SYS_FLASH_AUTOPROTECT_LIST not compiling with
the the following errors and warning:
  ptyser@petert u-boot $ make -s xpedite520x
  Configuring for xpedite520x board...
  cfi_flash.c: In function 'flash_protect_default':
  cfi_flash.c:2118: error: 'i' undeclared (first use in this function)
  cfi_flash.c:2118: error: (Each undeclared identifier is reported only once
  cfi_flash.c:2118: error: for each function it appears in.)
  cfi_flash.c:2118: error: 'apl' undeclared (first use in this function)
  cfi_flash.c:2118: error: invalid application of 'sizeof' to incomplete type 'struct apl_s'
  cfi_flash.c: In function 'flash_init':
  cfi_flash.c:2137: warning: unused variable 'apl'

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Reported-by: Kumar Gala <galak@kernel.crashing.org>
Cc: Heiko Schocher <hs@denx.de>
2011-04-13 21:50:25 +02:00
James Kosin
1c091f59a0 sf: sst: add support for SST25VF064C
Signed-off-by: James Kosin <jkosin@intcomgrp.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-13 15:39:08 -04:00
Raffaele Recalcati
8511cd84ab MMC may wrongly regconize 2GB eMMC as high capacity
Hi Terry,

> So I guess:
> mmc_init calls mmc_send_op_cond  that set  high_capacity,
> than it calls mmc_startup, that, with MMC_CMD_SEND_CSD  command, set
> the capacity, using values in CSD register.
> So I guess that mmc_change_freq should not recalculate high_capacity.
>
> It seems better, isn't it?
>
> Regards,
> Raffaele
>

Finally I think that it is enough to apply the following patch in order
to fix the issue.

Regards,
Raffaele

Signed-off-by: Andy Fleming <afleming@freescale.com>
2011-04-13 07:09:04 -05:00
Raffaele Recalcati
5db2fe3ad9 mmc: trace added
Defining CONFIG_MMC_TRACE in the include board file it is possible to activate
a tracing support.
This code helps in case of eMMC hw failure or to investigate possible eMMC
initialization issues.

Signed-off-by: Raffaele Recalcati <raffaele.recalcati@bticino.it>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2011-04-13 07:09:04 -05:00
Raffaele Recalcati
31cacbabf0 mmc: SEND_OP_COND considers card capabilities (voltage)
The first SEND_OP_COND (CMD1) command added is used to ask card capabilities.
After it an AND operation is done between card capabilities and host
capabilities (at the moment only for the voltage field).
Finally the correct value is sent to the MMC, waiting that the card
exits from busy state.

Signed-off-by: Raffaele Recalcati <raffaele.recalcati@bticino.it>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2011-04-13 07:09:04 -05:00
Raffaele Recalcati
5d4fc8d907 mmc: checking status after commands with R1b response
It is recommended to check card status after these kind of commands.
This is done using CMD13 (SEND_STATUS) JEDEC command until
the card is ready.
In case of error the card status field is displayed.

Signed-off-by: Raffaele Recalcati <raffaele.recalcati@bticino.it>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2011-04-13 07:08:57 -05:00
Minkyu Kang
8baf939c2c mmc: remove duplicated header file
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2011-04-13 06:36:15 -05:00
Minkyu Kang
940e078297 mmc: show mmc capacity using print_size
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2011-04-13 06:35:22 -05:00
Thomas Chou
d52ebf1022 mmc: add generic mmc spi driver
This patch supports mmc/sd card with spi interface. It is based on
the generic mmc framework. It works with SDHC and supports multi
blocks read/write.

The crc checksum on data packet is enabled with the def,

There is a subcomamnd "mmc_spi" to setup spi bus and cs at run time.

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2011-04-13 06:35:22 -05:00
Mike Frysinger
5f837c2c0e mmc: constify & localize data
These local vars need not be writable nor exported.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2011-04-13 06:35:22 -05:00
Frans Meulenbroeks
63fb5a7e4b drivers/mmc/fsl_esdhc.c: reordered tests
As DATA_ERROR includes the value IRQSTAT_DTOE, a timeout error
would yield the first error return instead of TIMEOUT.
By swapping the test TIMEOUTs are reported as such

An alternate solution would be to remove the IRQSTAT_DTOE from the DATA_ERROR define
but as that one might be less desired I've opted for the simplest solution

Signed-off-by: Frans Meulenbroeks <fransmeulenbroeks@gmail.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2011-04-13 06:35:22 -05:00
Wolfgang Wegner
b97e0cd788 add CONFIG_SPI_IDLE_VAL for cf_spi.c to allow use of spi_mmc
This patch adds CONFIG_SPI_IDLE_VAL to cf_spi.c
The default setting is 0x0 to behave same as current version, in case
CONFIG_SPI_MMC is set, the value is set to 0xFFFF (all ones). In either
case, the value can be overwritten by board configuration.

Signed-off-by: Wolfgang Wegner <w.wegner@astro-kom.de>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2011-04-13 06:35:22 -05:00
Matt Waddel
ce0fbcd2e1 MMC: Max blocks value adjustable
The maximum blocks value was hardcoded to 65535 due to a 16 bit
register length.  The value can change for different platforms.
This patch makes the default the current value of 65535, but it
is configurable for other platforms.

Signed-off-by: Matt Waddel <matt.waddel@linaro.org>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2011-04-13 06:35:22 -05:00
Graeme Russ
880c80d004 Merge branch 'master' of git://git.denx.de/u-boot-x86 2011-04-13 19:56:23 +10:00
Graeme Russ
b3acbb221d x86: Update MAINTAINERS and delete README files
The README files are totally out-of-date to the point where they do more
harm than good

Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
2011-04-13 19:43:30 +10:00
Graeme Russ
b7af583185 sc520: Move reset to stand-alone file
Partial linking allows weak functions to be overridden in files containing
only one function. Moving the sc520 override of reset_cpu gets rid of an
ugly #ifdef

Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
2011-04-13 19:43:29 +10:00
Graeme Russ
fea2572001 x86: Rename i386 to x86
Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
2011-04-13 19:43:28 +10:00
Graeme Russ
dbf7115a32 x86: Code cleanup
Make the copyright notices in the x86 files consistent and update them with
proper attributions for recent updates

Also fix a few comment style/accuracy and whitespace/blank line issues

Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
2011-04-13 19:43:26 +10:00
Graeme Russ
e413554f9d eNET: Remove config.mk
By including <config.h> in the ld script, CONFIG_SYS_MONITOR_LEN (defined
in the boards config file) can be used in lieu of FLASH_SIZE (defined in
the board specific config.mk)

As this is the last remaining entry in the board specific config.mk, this
file can now be removed

Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
2011-04-13 19:43:25 +10:00
Graeme Russ
ec8016c856 eNET: Fix saveenv crash
CONFIG_ENV_SIZE = CONFIG_ENV_SECT_SIZE = 128kB but CONFIG_SYS_STACK_SIZE
is only 32kB resulting in saveenv causing a stack overflow and crashing
U-Boot. Resolve by reducing CONFIG_ENV_SIZE to 4kB

Also fix up CONFIG_SYS_MALLOC_LEN to correctly use environment sector
size and add some comments to the memory organisation configuration

Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
2011-04-13 19:43:24 +10:00
Alagu Sankar
b44c70837a SD1.00 wide-bus fix
Fixed a bug wherein SD version 1.0 cards were not configured for 4-bit mode

Signed-off-by: Alagu Sankar <alagusankar@embwise.com>
2011-04-13 03:50:43 -05:00
Lei Wen
b16aadf411 disk/part.c: fix potential stack overflow bug
If the param pass to get_dev is not the one defined in the block_drvr,
it could make uboot becomes unstable, for it would continue run after
search complete the block_drvr table.

Signed-off-by: Lei Wen <leiwen@marvell.com>
2011-04-12 22:58:35 +02:00
Remy Bohmer
9eeaa8e66c Add support for dataflash to U-boot environment settings tool.
* The sector size for SPI-dataflash (like AT45 flashes) are not always
  a power-of-2. So, the sector calculations are rewritten such that it
  works for either power-of-2 as any size sectors.
* Make the flash sector size optional in case it is the same value as
  the environment size.

Signed-off-by: Remy Bohmer <linux@bohmer.net>
2011-04-12 22:58:34 +02:00
Wolfgang Denk
976b38c074 mkimage: add "-V" option to print version information
Signed-off-by: Wolfgang Denk <wd@denx.de>
2011-04-12 22:58:33 +02:00
Macpaul Lin
04c2dd827b ftwdt010_wdt: move header to include/faraday and enhance
1. Move header to include/faraday
2. Fix include path in ftwdt010_wdt.c
3. Fix function prototype and declaration to
  - ftwdt010_wdt_settimeout
  - ftwdt010_wdt_reset
  - ftwdt010_wdt_disable
4. Add "#if definde (CONFIG_HW_WATCHDOG)" let user have flexibilty
  to choose which better to his product.

Signed-off-by: Macpaul Lin <macpaul@andestech.com>
2011-04-12 22:58:33 +02:00
Andreas Bießmann
418e046d89 common/cmd_bdinfo.c: fix do_bdinfo() for AVR32
This patch fixes following warning message:

---8<---
cmd_bdinfo.c:458: warning: initialization from incompatible pointer type
--->8---

There was a prototype change in 54841ab50c for
argv[] pointer type to const. This change was not made for AVR32 cause this
code came in later by a merge.

Signed-off-by: Andreas Biemann <biessmann@corscience.de>
2011-04-12 22:58:32 +02:00
Andreas Bießmann
8c3aff525c cmd_nvedit: use explicit typecast for printf
This patch fixes warnings in MAKEALL for avr32:

---8<---
cmd_nvedit.c: In function 'do_env_export':
cmd_nvedit.c:663: warning: format '%zX' expects type 'size_t', but argument 3 has type 'ssize_t'
--->8---

Signed-off-by: Andreas Biemann <biessmann@corscience.de>
2011-04-12 22:58:32 +02:00
Wolfgang Denk
8ae86b76c6 Make STANDALONE_LOAD_ADDR configurable per board
Rename STANDALONE_LOAD_ADDR into CONFIG_STANDALONE_LOAD_ADDR
and allow that the architecture-specific default value gets
overwritten by defining the value in the board header file.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Mike Frysinger <vapier@gentoo.org>
Cc: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
Cc: Daniel Hellstrom <daniel@gaisler.com>
Cc: Tsi Chung Liew <tsi-chung.liew@freescale.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2011-04-12 22:58:32 +02:00
Loïc Minier
13d72f02ef Drop config.h include in tools/imximage.h
"make tools-all" should allow building tools such as mkimage and the new
imximage without any config, but imximage.c currently fails to build
with:
imximage.h:27:20: error: config.h: No such file or directory

config.h is not needed in imximage.h nor in imximage.c, and imximage.h
is only included from imximage.c, so drop this include to fix the build.

Signed-off-by: Loc Minier <loic.minier@linaro.org>
2011-04-12 22:58:31 +02:00
Loïc Minier
6052cbab40 Fix misc spelling errors found by lintian
Signed-off-by: Loc Minier <loic.minier@linaro.org>
2011-04-12 22:58:31 +02:00
Catalin Radu
f039ada5c1 Fix gunzip to work for any gziped uImage size
Signed-off-by: Catalin Radu <Catalin@VirtualMetrix.com>
2011-04-12 22:58:30 +02:00
Aaron Williams
1472af34c1 Fix min/max macros in include/common.h
There is a bug in the min and max macros in common.h which occurs if
Y is a larger type than X. For example, if Y is a 64-bit value and X
is a 32-bit value then Y will be truncated to 32-bits.  This fix
matches what is done in the Linux kernel but without the additional
type checking present in the kernel version.

Signed-off-by: Aaron Williams <aaron.williams@caviumnetworks.com>
2011-04-12 22:58:30 +02:00
Mike Frysinger
8a07de03f0 cmd_sf: use cmd_usage() in more places
Requires a little reworking of the code flow with sub-functions, but
not a big deal.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-12 02:30:25 -04:00
Mike Frysinger
840ff99889 cmd_sf: drop device status message when probing
The common spi flash layer displays useful info when probing, so no
need for us to duplicate that.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-12 02:30:25 -04:00
Mike Frysinger
493c360721 sf: use print_size() for sector_size output
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-12 02:30:25 -04:00
Richard Retanubun
334eb4b02f cmd_sf: add handler for +len arg for erase command
This patch adds [+]len handler for the erase command that will
automatically round up the requested erase length to the flash's
sector_size.

Signed-off-by: Richard Retanubun <RichardRetanubun@RuggedCom.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-12 02:30:25 -04:00
Mike Frysinger
f8f0757dcb sf: localize erase funcs
No need for these to be exported as they are only accessed indirectly
via function pointers.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-12 02:15:56 -04:00
Mike Frysinger
c5910874ba sf: sst: setup read func
The previous unification patch missed setting up the sst read func.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-12 02:15:54 -04:00
Richard Retanubun
4e6a515899 sf: add struct spi_flash.sector_size parameter
This patch adds a new member to struct spi_flash (u16 sector_size)
and updates the spi flash drivers to start populating it.

This parameter can be used by spi flash commands that need to round
up units of operation to the flash's sector_size.

Having this number in one place also allows duplicated code to be
further collapsed into one common location (such as erase parameter
and the detected message).

Signed-off-by: Richard Retanubun <RichardRetanubun@RuggedCom.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-12 02:15:37 -04:00
Mike Frysinger
cdb6a00fb8 sf: atmel: undo unification of status polling
The AT45 flashes are completely different (at the command set and
status register level) from all other SPI flashes, so we can't unify
their logic with common code.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-11 23:41:09 -04:00
Mike Frysinger
192b639ecc sf: punt unused spi_flash_region struct
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-11 23:40:59 -04:00
Macpaul Lin
9096963c72 ftwdt010_wdt: support faraday ftwdt010 watchdog
Faraday ftwdt010 watchdog is an architecture independant
watchdog. It is usually used in SoC chip design.

Signed-off-by: Macpaul Lin <macpaul@andestech.com>
Signed-off-by: Wolfgang Denk <wd@denx.de>
2011-04-11 22:47:52 +02:00
Eric Bénard
ee986e2a7d mp2usb: remove board support
this board was cancelled long time ago so remove it as it won't
be maintained anymore

Signed-off-by: Eric Bnard <eric@eukrea.com>
2011-04-11 22:44:02 +02:00
Andreas Huber
91a3c14cd0 ppc, mgcoge: add DIP switch detection
This reads the DIP switch on mgcoge. The DIP switch is connected to
the BFTICU (0x40000089) FPGA. If the DIP switch is set the environment
variable 'actual_bank' is set to 0 and starts the SW in bank0.

Signed-off-by: Andreas Huber <andreas.huber@keymile.com>
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
2011-04-11 22:41:37 +02:00
Holger Brunck
086f09150d arm, keymile: remove unneeded code
On first HW versions the BOCO FPGA was behind a MUX device. These
HW versions are not supported anymore. And therefore this code can
be removed, it is already unused.

Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
2011-04-11 22:39:25 +02:00
Roy Zang
2c2668f971 Net: Add Intel E1000 82574L PCIe card support
Add Intel E1000 82574L PCIe card support. Test on MPC8544DS
and MPC8572 board.
Add the missing contact information for future support.

Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Acked-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-11 22:20:13 +02:00
Joakim Tjernlund
39768f7715 PowerPC: Add support for -msingle-pic-base
-msingle-pic-base is a new gcc option for ppc and
it reduces the size of my u-boot with 6-8 KB.
While at it, add -fno-jump-tables too to save a
few more bytes.

-msingle-pic-base will be in gcc 4.6, however
backported patches are available at
http://bugs.gentoo.org/show_bug.cgi?id=347281

Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
2011-04-11 21:38:47 +02:00
Joakim Tjernlund
33ee4c9233 PowerPC: Move -fPIC flag to common place
The -fPIC flag belongs with -mrelocatable, move it there.
Also change -fPIC to -fpic as this produces smaller
binaries.
However, currently -mrelocatable promotes -fpic to -fPIC, a
fix for this is in upcoming gcc 4.6 or you can apply this small
patch to gcc:

diff --git a/gcc/config/rs6000/sysv4.h b/gcc/config/rs6000/sysv4.h
index 8da8410..e4b8280 100644
--- a/gcc/config/rs6000/sysv4.h
+++ b/gcc/config/rs6000/sysv4.h
@@ -227,7 +227,8 @@ do {									\
     }									\
 									\
   else if (TARGET_RELOCATABLE)						\
-    flag_pic = 2;							\
+    if (!flag_pic)							\
+      flag_pic = 2;							\
 } while (0)

 #ifndef RS6000_BI_ARCH
--

Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
2011-04-11 21:36:41 +02:00
Ben Gardiner
7d2fade7b1 ea20: fix undefined PHY_* errors
This patch fixes ea20 after 8ef583a035 where
the u-boot custom PHY_ macros were replaced with those of linux/mii.h MII_
definitions except in the RMII support for davinci_emac. Probably also due to
the merge path of changes in 2010.12.

Signed-off-by: Ben Gardiner<bengardiner@nanometrics.ca>
CC: Mike Frysinger <vapier@gentoo.org>
Acked-by: Mike Frysinger <vapier@gentoo.org>
2011-04-11 21:28:44 +02:00
Ben Gardiner
fa9cd788bc ea20: fix libea20.o not found
This patch fixes ea20 after commit 6d8962e814
where $(obj)lib$(BOARD).a was changed to $(obj)lib$(BOARD).o in almost all the
Makefiles except ea20, probably due to merge path of the changes in 2010.12.

Signed-off-by: Ben Gardiner<bengardiner@nanometrics.ca>
CC: Sebastien Carlier <sebastien.carlier@gmail.com>
Acked-by : Stefano Babic <sbabic@denx.de>
2011-04-11 21:26:48 +02:00
Lei Wen
02cf345973 bootm: replace blob_start with image_start
For uImage always has a 64 bytes header, we couldn't expect to do
the xip from the header but should xip from the image start.

The latter logic in that section is also move the image from image_start
to the load address, so sync this logic to the xip operation.

Signed-off-by: Lei Wen <leiwen@marvell.com>
Acked-by: Mike Frysinger <vapier@gentoo.org>
2011-04-11 21:10:44 +02:00
Mike Frysinger
a4c3b40b33 sf: unify read functions
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-11 21:00:55 +02:00
Mike Frysinger
e7b44eddbe sf: unify erase functions
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-11 21:00:54 +02:00
Mike Frysinger
6163045bcd sf: unify status polling for ready bit
All of the spi flash drivers implement the status register polling for
detecting the device ready state, so unify them all in a new helper
function -- spi_flash_wait_ready.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-11 21:00:53 +02:00
Mike Frysinger
000044d8bf sf: unify read/write helpers
These functions largely do the same exact thing, so unify them all
into one basic function.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-11 21:00:49 +02:00
Wolfgang Denk
17e967b3df Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx 2011-04-10 21:24:40 +02:00
Wolfgang Denk
4fd783d63f Merge branch 'next' of git://git.denx.de/u-boot-nios 2011-04-10 21:20:28 +02:00
Wolfgang Denk
a8708a8634 Merge branch 'master' of git://git.denx.de/u-boot-blackfin 2011-04-10 21:06:27 +02:00
Fabian Cenedese
c1c087b753 powerpc/85xx: Removed clearing of L2-as-SRAM
Removed clearing of L2 cache as SRAM as it is not necessary without ECC.
This also speeds up the booting process.

Signed-off-by: Fabian Cenedese <cenedese@indel.ch>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-10 11:24:21 -05:00
Priyanka Jain
32c8cfb23c fsl_esdhc: Deal with watermark level register related changes
P1010 and P1014 has v2.3 version of FSL eSDHC controller in which watermark
level register description has been changed:

9-15 bits represent WR_WML[0:6], Max value = 128 represented by 0x00
25-31 bits represent RD_WML[0:6], Max value = 128 represented by 0x00

Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Signed-off-by: Poonam Aggrwal <Poonam.Aggrwal@freescale.com>
Tested-by: Stefano Babic <sbabic@denx.de>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-10 11:17:55 -05:00
Shaohui Xie
2a9fab82b7 powerpc/85xx: Add PBL boot from SPI flash support on P4080DS
PBL(pre-boot loader): SPI flash used as RCW(Reset Configuration Word) and
PBI(pre-boot initialization) source, CPC(CoreNet Platform Cache) used as
1M SRAM where PBL will copy whole U-BOOT image to, U-boot can boot from
CPC after PBL completes RCW and PBI phases.

Signed-off-by: Chunhe Lan <b25806@freescale.com>
Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
Signed-off-by: Shaohui Xie <b21989@freescale.com>
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-10 11:17:55 -05:00
Jiang Yutang
f378017ffa powerpc/85xx: Update default hwconfig on P1022DS
Set default configuration to have SDHC controller enabled,
AUDIO enabled(codec clock sources is 12MHz) and disable TDM.

Signed-off-by: Jiang Yutang <b14898@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-10 11:17:55 -05:00
Jiang Yutang
b93f81a418 powerpc/85xx: Add support usb2/etsec and tdm/audio pin multiplex on P1022DS
For soc which have pin multiplex relation, some of them can't enable
simultaneously. This patch add environment var 'hwconfig' content
defination for them. you can enable some one function by setting
environment var 'hwconfig' content and reset board. Detail setting
please refer doc/README.p1022ds

Signed-off-by: Jiang Yutang <b14898@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-10 11:17:55 -05:00
Jiang Yutang
218a758fb9 powerpc/85xx: Enable support for ATI graphics cards on P1022DS
Make the support for ATI graphics cards mutually exclusive with DIU.

Signed-off-by: Jiang Yutang <b14898@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-10 11:17:55 -05:00
Timur Tabi
314b3ff1a6 p4080ds: remove rev1-specific code for the SERDES8 erratum
Remove the SERDES8 erratum work-around code that only applied to P4080
rev1, which is not supported by this version of U-Boot.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-10 11:17:48 -05:00
Timur Tabi
6c7a29a5b4 p4080ds: add README.p4080ds which documents the "serdes" hwconfig option
Add documentation for the "serdes" hwconfig option, which is used to
specify the status of SerDes banks two and three for the SERDES8 erratum
work-around.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-10 11:17:32 -05:00
Kumar Gala
15321c9c39 powerpc/85xx: Drop CONFIG_VIDEO support on corenet_ds boards
We don't really ever use Video cards on corenet_ds style boards and its
bloating our image which is close the its max size.  Drop support and
also kill some defines for non-PNP PCI which we never use.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-09 12:36:09 -05:00
Thomas Chou
030103d780 nios2: reset cfi flash before reading env
Flash might be in unknown state when u-boot is started with jtag.
And got wrong env data. So reset it in board early init.

We cannot use generic cfi flash routines, because flash_init() is
not run yet.

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
2011-04-08 09:02:27 -04:00
Matthew McClintock
a3055c587d powerpc/85xx: rename NAND prefixes to CONFIG_SYS
renaming 85xx define CONFIG_NAND_OR_PRELIM to CONFIG_SYS_NAND_OR_PRELIM
and CONFIG_NAND_BR_PRELIM to CONFIG_SYS_NAND_BR_PRELIM to use the more
appropriate CONFIG_SYS prefix as well as be consistent with 83xx.

Signed-off-by: Matthew McClintock <msm@freescale.com>
cc: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-08 02:50:57 -05:00
Graeme Russ
e9bf8877da eNET: Fix undefined reference to `monitor_flash_len'
commit cfbe861506 removed the definition of
monitor_flash_len from the eNET which was not picked up due to extensive
use of the SRAM configuration target for testing

Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
2011-04-08 15:02:36 +10:00
Mike Frysinger
d1f3ac9ee4 Blackfin: bf526-ezbrd: get MAC from flash
The MAC address is stored in the last flash sector rather than OTP.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-08 00:44:27 -04:00
Mike Frysinger
03feb8ed2e Blackfin: bf518f-ezbrd: get MAC from flash
The MAC address is stored in the last flash sector rather than OTP.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-08 00:44:27 -04:00
Mike Frysinger
d413dbc990 Blackfin: bf548-ezkit: move env sector
U-Boot itself takes up more than 0x40000 bytes, so we can't use that
sector for the environment.  Move it down a page.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-08 00:44:27 -04:00
Kyle Moffett
eed1a7b1cf Blackfin: replace "bfin_reset_or_hang()" with "panic()"
The bfin_reset_or_hang function unnecessarily duplicates the panic()
logic based on CONFIG_PANIC_HANG.

This patch deletes 20 lines of code and just calls panic() instead.
This also makes the following generic-restart conversion patch simpler.

Signed-off-by: Kyle Moffett <Kyle.D.Moffett@boeing.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-08 00:44:27 -04:00
Mike Frysinger
a91eb2c56a Blackfin: adi boards: enable CONFIG_MONITOR_IS_IN_RAM
Our monitor is always in RAM, so enable this define for the CFI layer.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-08 00:44:27 -04:00
Sonic Zhang
21a50374d5 Blackfin: bfin_sdh: add support for multiblock operations
Don't forget to count full data size for the multiblock operation request.

Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-08 00:44:27 -04:00
Cliff Cai
1fd2d792a2 Blackfin: bfin_sdh: set all timer bits before transfer
The timer register is 32bits, not 16bit, so 0xFFFF won't fill it.
Write out -1 to make sure to fill the whole thing.

Signed-off-by: Cliff Cai <cliff.cai@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-08 00:44:27 -04:00
Mike Frysinger
d633b2dbe4 Blackfin: adi boards: enable ldrinfo
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-08 00:44:27 -04:00
Mike Frysinger
1ba7fd2567 Blackfin: ldrinfo: new command
Simple command to decode/check an LDR image before we try to boot it.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-08 00:44:27 -04:00
Mike Frysinger
31488a6f6e Blackfin: bootldr: use common defines
Now that the common bootrom.h sets up defines for us, switch to them
rather than our own local set.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-08 00:44:27 -04:00
Mike Frysinger
e8065f8889 Blackfin: bootrom.h: sync with toolchain
We need the updated LDR bit defines for our LDR utils.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-08 00:44:27 -04:00
Mike Frysinger
dba8cf1b2e Blackfin: adi boards: drop old ELF define
This define isn't used anywhere anymore, so punt it.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-08 00:44:27 -04:00
Mike Frysinger
7577aab8a6 Blackfin: bf506f-ezkit: new board port
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-08 00:44:26 -04:00
Mike Frysinger
105be9078c Blackfin: default to L1 bank A when L1 bank B does not exist
Some parts lack Bank B in L1 data, so have the linker script fall back to
Bank A when that happens.  This way we can still leverage L1 data.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-08 00:44:26 -04:00
Mike Frysinger
c745a84648 Blackfin: turn off caches when self initializing
When bootstrapping ourselves on the fly at runtime (via "go"), we need to
turn off the caches to avoid taking software exceptions.  Since caches
need CPLBs and CPLBs need exception handlers, but we're about to rewrite
the code in memory where those exception handlers live, we need to turn
off caches first.

This new code also encourages a slight code optimization by storing the
MMR bases in dedicated registers so we don't have to fully load up the
pointer regs multiple times.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-08 00:44:26 -04:00
Mike Frysinger
05e7825e49 Blackfin: only check for os log when we have external memory
If the part has no external memory configured, then there will be no os
log for us to check, and any attempt to access that memory will trigger
hardware errors.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-08 00:44:26 -04:00
Mike Frysinger
164d04f4fc Blackfin: BF537: unify duplicated headers
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-08 00:44:26 -04:00
Mike Frysinger
b0c5f1cb72 Blackfin: BF52x: unify duplicated headers
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-08 00:44:26 -04:00
Mike Frysinger
0807fe0a49 Blackfin: drop duplicate system mmr and L1 scratch defines
Common code already takes care of setting up these defines when a port
hasn't specified them, so punt the duplicate values.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-08 00:44:26 -04:00
Mike Frysinger
cca07417d5 Blackfin: BF50x: new processor port
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-08 00:44:26 -04:00
Mike Frysinger
5a9a2c55d1 Blackfin: fix bd_t handling
The recent global data changes (making the size autogenerated) broke the
board info handling on Blackfin ports as we were lying and lumping the
bd_t size in with the gd_t size.  So use the new dedicated bd_t size to
setup its own address in memory.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-08 00:44:26 -04:00
Mike Frysinger
d2ab733c05 Blackfin: bf561-ezkit/ibf-dsp561: invert env offset/addr logic
Have CONFIG_ENV_ADDR be based on CONFIG_ENV_OFFSET rather than the other
way around so that we can use CONFIG_ENV_OFFSET during build.  It also
avoids a little address duplication.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-08 00:44:26 -04:00
Mike Frysinger
704f1f0c20 Blackfin: bf537: fix L1 data defines
The __BFIN_DEF_ADSP_BF537_proc__ define isn't setup anymore, so use
the one coming from the compiler.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-08 00:44:26 -04:00
Mike Frysinger
42246c3f21 Blackfin: bf537-minotaur/bf537-srv1: undefine nfs when net is disabled
Fixes a build error due to new partial linking logic.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-08 00:44:26 -04:00
Mike Frysinger
baaa4f9ce2 Blackfin: serial: clean up muxing a bit
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-08 00:44:26 -04:00
Chong Huang
dbb6d366e3 Blackfin: bf525-ucr2: new board port
Signed-off-by: Chong Huang <chuang@ucrobotics.com>
Signed-off-by: Haitao Zhang <minipanda@linuxrobot.org>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-08 00:44:26 -04:00
Andreas Schallenberg
2fc32deab5 Blackfin: dnp5370: new board port
Info about the hardware can be found here:
	http://www.dilnetpc.com/dnp0086.htm

Signed-off-by: Andreas Schallenberg <Andreas.Schallenberg@3alitydigital.de>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-08 00:44:26 -04:00
Mike Frysinger
7e3eb0eaec Blackfin: bf537-pnav/blackstamp/blackvme: drop empty config.mk files
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-08 00:44:26 -04:00
Mike Frysinger
80528a7848 Blackfin: bf527-sdp: update custom CFLAGS paths
Looks like the filesystem shuffling missed the SDP board.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-08 00:44:26 -04:00
Mike Frysinger
fbcf8e8c75 Blackfin: move CONFIG_BFIN_CPU back to board config.h
This is a revert of 821ad16fa9 as Wolfgang doesn't like the new code.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-08 00:44:26 -04:00
Mike Frysinger
ec4c6933ff Blackfin: unify bootmode based LDR_FLAGS setup
Unify this convention for all Blackfin boards.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-08 00:44:26 -04:00
Mike Frysinger
fbb21ff047 Blackfin: drop CONFIG_SYS_TEXT_BASE from boards
We don't want/use this value for Blackfin boards, so punt it and have the
common code error out when people try to use it.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-08 00:44:26 -04:00
Mike Frysinger
7d69dfd2a8 Blackfin: skip RAM display for 0 mem systems
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-08 00:44:26 -04:00
Mike Frysinger
f57689e795 Blackfin: bf518f-ezbrd: don't require SPI logic all the time
Only the first run of boards had a ksz switch on it, so if building for a
newer silicon rev or SPI is disabled, don't bother checking for the ksz.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-08 00:44:25 -04:00
Heiko Schocher
6ee1416e81 mtd, cfi: introduce void flash_protect_default(void)
collect code which protects default sectors in a function, called
flash_protect_default. So boardspecific code can call it too.

Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2011-04-07 10:20:22 +02:00
Mario Schuknecht
2c9f48af73 cfi_flash: use AMD fixups for AMIC (e.g. A29L160A series) too
Signed-off-by: Mario Schuknecht <m.schuknecht@dresearch.de>
Signed-off-by: Steffen Sledz <sledz@dresearch.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2011-04-07 10:10:47 +02:00
Zhao Chenhui
4aa8405c91 powerpc/85xx: Add some defines & registers in immap_85xx.h
* Added SDHCDCR register to GUR struct
* Added SDHCDCR_CD_INV define related to SDHCDCR
* Added Pin Muxing define related to TDM on P102x

Signed-off-by: Zhao Chenhui <b35336@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-05 10:18:39 -05:00
Haiying Wang
a52d2f816d powerpc/85xx: Add P1021 specific QE and UEC support
P1021 has some QE pins which need to be set in pmuxcr register before
using QE functions. In this patch, pin QE0 and QE3 are set for UCC1 and
UCC5 in Eth mode.  QE9 and QE12 are set for MII management. QE12 needs to
be released after MII access because QE12 pin is muxed with LBCTL signal.

Also added relevant QE support defines unique to P1021.

The P1021 QE is shared on P1012, P1016, and P1025.

Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-05 10:18:39 -05:00
Zhao Chenhui
c1fc2d4fc2 powerpc/85xx: don't init SDRAM when CONFIG_SYS_RAMBOOT
Signed-off-by: Zhao Chenhui <b35336@freescale.com>
Acked-by: Li Yang <leoli@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-05 10:18:39 -05:00
Wolfgang Denk
4db2fa7f94 Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx
Conflicts:
	drivers/usb/host/ehci-pci.c

Signed-off-by: Wolfgang Denk <wd@denx.de>
2011-04-05 12:24:20 +02:00
Wolfgang Denk
75df0d5949 Merge branch 'master' of git://git.denx.de/u-boot-mips 2011-04-05 12:17:38 +02:00
Timur Tabi
7d3053fbf1 powerpc: clean up DIU macro definitions for Freescale reference boards
Clean up the macro defintions used to enable DIU (video) support on the
MPC8610HPCD and the MPC5121ADS so that they look more like the P1022DS,
which is newer.  Add software cursor support to all three boards.

Also document the CONFIG_FSL_DIU_FB in the README.

Signed-off-by: Timur Tabi <timur@freescale.com>
Acked-by: Anatolij Gustschin <agust@denx.de>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-04 22:32:18 -05:00
Jerry Huang
1ac63e4094 powerpc/85xx: Enable eSDHC boot support on P2020 DS
We implement our own mmc_get_env_addr since the environment variables are
written to just after the u-boot image on SDCard, so we must read the MBR
to get the start address and code length of the u-boot image, then
calculate the address of the env.

Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com>
Signed-off-by: Zhao Chenhui <b35336@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-04 22:26:32 -05:00
Mingkai Hu
97039ab98c env_mmc: Allow board code to override the environment address
On some boards the environment may not be located at a fixed address in
the MMC/SDHC card.  This allows those boards to implement their own
means to report what address the environment is located at.

Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com>
Signed-off-by: Zhao Chenhui <b35336@freescale.com>
Acked-by: Andy Fleming <afleming@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-04 22:26:16 -05:00
Kim Phillips
84d2e03f9d mpc83xx: restrict UTMI PHY configuration to 831x parts
i.e, to those parts that have PHY_CLK_VALID bits in their USB
CONTROL registers:

mpc8308	 WU_INT, PHY_CLK_SEL, USB_EN, WU_INT_EN, ULPI_INT_EN
mpc831x	 PHY_CLK_VALID, WU_INT, CLKIN_SEL, PHY_CLK_SEL, UTMI_PHY_EN,
	 PLL_RESET, REFSEL, OTG_PORT, KEEP_OTG_ON, LSF_EN, USB_EN,
	 ULPI_INT_EN
mpc834x	 USB_EN, ULPI_INT1_EN (MPH only), ULPI_INT0_EN
mpc837x	 USB_EN, ULPI_INT_EN

(mpc832x, mpc8360 don't have a USB_EHCI_FSL compatible controller)

this prevents non-831x parts from never completing cpu_init_f(),
because the (non-existent) PHY_CLK_VALID bit never gets set.

Reported-by: Andre Schwarz <andre.schwarz@matrix-vision.de>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Tested-by: Andre Schwarz <andre.schwarz@matrix-vision.de>
2011-04-04 20:23:20 -05:00
Kumar Gala
c2a63f48fb powerpc/8xxx: Fix typo for address hashing message
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-04 09:24:43 -05:00
Kyle Moffett
c7fd27ccfb mpc8xxx: DDR2/DDR3: Clean up DIMM-type switch statements
The numeric constants in the switch statements are replaced by #defines
added to the common ddr_spd.h header.  This dramatically improves the
readability of the switch statments.

In addition, a few of the longer lines were cleaned up, and the DDR2
type for an SO-RDIMM module was added to the DDR2 switch statement.

Signed-off-by: Kyle Moffett <Kyle.D.Moffett@boeing.com>
Cc: Andy Fleming <afleming@gmail.com>
Cc: Kim Phillips <kim.phillips@freescale.com>
Acked-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-04 09:24:43 -05:00
Kyle Moffett
e820a131f4 fsl_ddr: Don't use full 64-bit divides on 32-bit PowerPC
The current FreeScale MPC-8xxx DDR SPD interpreter is using full 64-bit
integer divide operations to convert between nanoseconds and DDR clock
cycles given arbitrary DDR clock frequencies.

Since all of the inputs to this are 32-bit (nanoseconds, clock cycles,
and DDR frequencies), we can easily restructure the computation to use
the "do_div()" function to perform 64-bit/32-bit divide operations.

On 64-bit this change is basically a no-op, because do_div is
implemented as a literal 64-bit divide operation and the instruction
scheduling works out almost the same.

On 32-bit PowerPC a fully accurate 64/64 divide (__udivdi3 in libgcc) is
over 1.1kB of code and thousands of heavily dependent cycles to compute,
all of which is linked from libgcc.  Another 1.2kB of code comes in for
the function __umoddi3.

It should be noted that nothing else in U-Boot or the Linux kernel seems
to require a full 64-bit divide on my 32-bit PowerPC.

Build-and-boot-tested on the HWW-1U-1A board using DDR2 SPD detection.

Signed-off-by: Kyle Moffett <Kyle.D.Moffett@boeing.com>
Acked-by: York Sun <yorksun@freescale.com>
Cc: Andy Fleming <afleming@gmail.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-04 09:24:43 -05:00
Laurentiu TUDOR
33e683541e powerpc/85xx: Fix setting of LIODN prop in PCIe nodes on P3041/P5020
We utilize the compatible string to find the node to add fsl,liodn
property to.  However P3041 & P5020 don't have "fsl,p4080-pcie"
compatible for their PCIe controllers as they aren't backwards compatible.

Allow the macro's to specify the PCIe compatible to use to allow SoC
uniqueness.  On P3041 & P5020 we utilize "fsl,qoriq-pcie-v2.2" for the
PCIe controllers.

Signed-off-by: Laurentiu TUDOR <Laurentiu.Tudor@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-04 09:24:43 -05:00
Jiang Yutang
9899ac1951 powerpc/85xx: Add 36-bit address map support to P1022DS
Signed-off-by: Jiang Yutang <b14898@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-04 09:24:43 -05:00
Li Yang
19d68d2027 tsec: add AR8021 PHY support
Signed-off-by: Li Yang <leoli@freescale.com>
2011-04-04 09:24:43 -05:00
bhaskar upadhaya
f5feb5afb2 powerpc/85xx: Update timer-frequency prop in ptp_timer node of device tree
Fix up the device tree property associated with the IEEE 1588 timer
source frequency.  Currently we only support the IEEE 1588 timer source
being the internal eTSEC system clock (for those SoCs with IEEE 1588
support).  The eTSEC clock is ccb_clk/2.

Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-04 09:24:43 -05:00
Kumar Gala
939cdcdc62 powerpc/85xx: Fix determining Fman freq on P1023
On the P1023 the Fman freq is equivalent to the system bus freq, not 1/2
of it.  Also we only have one Fman so no need for the code to deal with
a second.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-04 09:24:43 -05:00
Kumar Gala
b5c8753fa1 powerpc/85xx: Fixup determining PME, FMan freq
On CoreNet based SoCs (P2040, P3041, P4080, P5020) we have some
additional rules to determining the various frequencies that PME & FMan
IP blocks run at.

We need to take into account:
* Reduced number of Core Complex PLL clusters
* HWA_ASYNC_DIV (allows for /2 or /4 options)

On P2040/P3041/P5020 we only have 2 Core Complex PLLs and in such SoCs
the PME & FMan blocks utilize the second Core Complex PLL.  On SoCs
like p4080 with 4 Core Complex PLLs we utilize the third Core Complex
PLL for PME & FMan blocks.

On P2040/P3041/P5020 we have the added feature that we can divide the
PLL down further by either /2 or /4 based on HWA_ASYNC_DIV.  On P4080
this options doesn't exist, however HWA_ASYNC_DIV field in RCW should be
set to 0 and this gets a backward compatiable /2 behavior.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-04 09:24:43 -05:00
Zhao Chenhui
863a3eac23 powerpc/85xx: Add support for ULI1575 PCI EHCI module on MPC8572DS
MPC8572DS provides 2 USB ports with ULI1575. We enable USB storage
device support using PCI EHCI module.

Signed-off-by: Zhao Chenhui <b35336@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-04 09:24:42 -05:00
Zhao Chenhui
5103d7aa23 powerpc/85xx: Disable ECC in considering performance on MPC8572DS
Signed-off-by: Zhao Chenhui <b35336@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-04 09:24:42 -05:00
Zhao Chenhui
1a66f28916 powerpc/85xx: Replace memctl_intlv_ctl with hwconfig on MPC8572DS
Signed-off-by: Zhao Chenhui <b35336@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-04 09:24:42 -05:00
Poonam Aggrwal
e0082f7cb4 powerpc/85xx: Add 36-bit physical addressing support for P1_P2_RDB
Add support for 36-bit address map for NOR, SD, and SPI boot cfgs.

Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Priyanka Jain <priyanka.jain@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-04 09:24:42 -05:00
Poonam Aggrwal
66c74fca18 powerpc/85xx: Optimized DDR settings for 800MT/s on P1/P2 RDB
Changed the following DDR timing parameters for 800Mt/s:
tRRT    BL/2+1 to  BL/2
tWWT    BL/2+1 to  BL/2
tWRT    BL/2+1 to  BL/2
tRWT    BL/2+1 to  BL/2
REFINT  6500ns to  7800ns

Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-04 09:24:42 -05:00
Poonam Aggrwal
3313b20b95 powerpc/85xx: Removed P1/P2 RDB RevB support
RevB boards never really made it outside of Freescale and have been
replaced with RevC & RevD which had various board bug fixes.

Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-04 09:24:42 -05:00
Priyanka Jain
cac29f25fd powerpc/85xx: Read board switch settings on p1_p2_rdb
PCA9557 is parallel I/O expansion device on I2C bus which stores various
board switch settings like NOR Flash-Bank selection, SD Data width.

On board:
switch SW5[6] is to select width for eSDHC
        ON  - 4-bit [Enable eSPI]
        OFF - 8-bit [Disable eSPI]

switch SW4[8] is to select NOR Flash Bank for Booting
        OFF - Primary Bank
        ON  - Secondary Bank

Read board switch settings on p1_p2_rdb and configure corresponding
eSDHC width.

Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Signed-off-by: Dipen Dudhat <dipen.dudhat@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-04 09:24:42 -05:00
Priyanka Jain
0c871e952e powerpc/85xx: Use DDR for RAMBOOT instead of L2 SRAM on p1_p2_rdb
Using DDR as RAMBOOT base instead of L2SRAM for SDCard and SPI Flash
boot loaders because:
- P1_P2_RDB boards have soldered DDR so no need for SPD
- Also P102x has 256K L2 cache size so becomes a limiting factor for
  size of image that could be loaded in SRAM mode and would require three
  stage boot loader (TPL).

Changes done:
 1. CONFIG_SYS_TEXT_BASE to 0x11000000
 2. CONFIG_RESET_VECTOR_ADDRESS to 0x1107fffc

Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Signed-off-by: Poonam Aggrwal <Poonam.Aggrwal@freescale.com>
Signed-off-by: Dipen Dudhat <Dipen.Dudhat@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-04 09:24:42 -05:00
Timur Tabi
f098c9c880 fsl: obsolete NXID v0 EEPROMs, automatically upgrade them to NXID v1
The NXID EEPROM format comes in two versions, v0 and v1.  The only
difference is in the number of MAC addresses that can be stored.  NXID v0
supports eight addresses, and NXID v1 supports 23.

Rather than allow a board to choose which version to support, NXID v0 is
now considered deprecated.  The EEPROM code is updated to support only
NXID v1, but it can still read EEPROMs formatted with v0.  In these cases,
the EEPROM data is loaded and the CRC is verified, but the data is stored
into a v1 data structure.  If the EEPROM data is written back, it is
written in v1 format.  This allows existing v0-formatted EEPROMs to
continue providing MAC addresses, but any changes to the data will force
an upgrade to the v1 format, while retaining all data.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-04 09:24:42 -05:00
Kumar Gala
c657d898bc powerpc/85xx: Specify CONFIG_SYS_FM_MURAM_SIZE
CONFIG_SYS_FM_MURAM_SIZE varies from SoC to SoC to specify it in
config_mpc85xx.h for those parts with a Frame Manager.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-04 09:24:42 -05:00
Priyanka Jain
7d640e9bdf powerpc/85xx: Corrected sdhc clock value for P1010
SDHC clock is equal to CCB on P1010 and P1014 not CCB/2.

Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Signed-off-by: Poonam Aggrwal <Poonam.Aggrwal@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-04 09:24:42 -05:00
Poonam Aggrwal
1fbf3483b7 powerpc/85xx: Adds some P1010/P1014 SoC configuration defines
Add defines for FSL_SATA_V2, # of DDR controllers, reset value of CCSRBAR
and SDHC erratum.

Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-04 09:24:42 -05:00
Kumar Gala
093cffbe9a powerpc/85xx: Support for Freescale P1024/P1025 processor
Add Support for Freescale P1024/P1025 (dual core) and
P1015/P1016 (single core) processors.

P1024 is a variant of P1020 processor with a core frequency from
400Mhz to 667Mhz and comes in a 561-pin wirebond power-BGA

P1025 is a variant of P1021 processor with a core frequency from
400Mhz to 667Mhz and comes in a 561-pin wirebond power-BGA

P1015 is a variant of P1024 processor with single core and P1016 is a
variant of P1025 processor with single core.

Added comments in config_mpc85xx.h to denote single core versions of
processors.

Signed-off-by: Jin Qing <b24347@freescale.com>
Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-04 09:24:42 -05:00
Zhao Chenhui
298f8af17b echi: add ULI1575 PCI ID
Add ULI1575 EHCI controller to the list of the supported devices.

Signed-off-by: Zhao Chenhui <b35336@freescale.com>
Acked-by: Remy Bohmer <linux@bohmer.net>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-04 09:24:42 -05:00
Haiying Wang
a7b1e1b706 powerpc/85xx: load ucode from nand flash before qe_init
In the case the QE's microcode is stored in nand flash, we need to load it from
NAND flash to ddr first then the qe_init can get the ucode correctly.

Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-04 09:24:41 -05:00
Poonam Aggrwal
0b3b1766b7 fsl_ddr: Adds 16 bit DDR Data width option
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Cc: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-04 09:24:41 -05:00
Poonam Aggrwal
09f9ee1695 powerpc/85xx: Use BR_PHYS_ADDR macro to setup BRs on P1_P2_RDB
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-04 09:24:41 -05:00
York Sun
c399765d9c powerpc/8xxx: Display DIMM model
Beside displaying RDIMM or UDIMM, this patch adds display of the model numbers
embedded in SPD.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-04 09:24:41 -05:00
York Sun
dea8bd627c powerpc/85xx: Update fixed DDR3 timing table for P4080DS
Most of time U-boot doesn't get an exact clock number. For example, clock
900MHz may be detected as 899.99MHz. 800MHz could be 799.99MHz. Update the
table to align the desired clocks in the middle.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-04 09:24:41 -05:00
Kumar Gala
7639675131 powerpc/8xxx: Fix LAW init to respect pre-initialized entries
If some pre-boot or earlier stage bootloader (NAND SPL) has setup LAW
entries consider them good and mark them used.

In the NAND SPL case we skip re-initializing based on the law_table
since the SPL phase already did that.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-04 09:24:41 -05:00
Prabhakar Kushwaha
b6ccd2c9de fsl_pci: Add support for FSL PCIe controllers v2.x
FSL PCIe controller v2.1:
	- New MSI inbound window
	- Same Inbound windows address as PCIe controller v1.x

Added new pit_t member(pmit) to struct ccsr_pci for MSI inbound window

FSL PCIe controller v2.2 and v2.3:
	- Different addresses for PCIe inbound window 3,2,1
	- Exposed PCIe inbound window 0
	- New PCIe interrupt status register

Added new Interrupt Status register to struct ccsr_pci & updated pit_t array
size to reflect the 4 inbound windows.

To maintain backward compatiblilty, on V2.2 or greater controllers we
start with inbound window 1 and leave inbound 0 with its default value
(which maps to CCSRBAR).

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-04 09:24:41 -05:00
Haiying Wang
24995d829a powerpc/85xx: Refactor Qman/Portal support to be shared between SoCs
There are some differences between CoreNet (P2040, P3041, P5020, P4080)
and and non-CoreNet (P1017, P1023) based SoCs in what features exist and
the memory maps.

* Rename various immap defines to remove _CORENET_ if they are shared
* Added P1023/P1017 specific memory offsets
* Only setup LIODNs or LIODN related code on CORENET based SoCs
  (features doesn't exist on P1023/P1017)

Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-04 09:24:41 -05:00
Roy Zang
67a719da2e powerpc/85xx: Add support for Freescale P1023/P1017 Processors
Add P1023 (dual core) & P1017 (single core) specific information:
* SERDES Table
* Added P1023/P1017 to cpu_type_list and SVR list
  (fixed issue with P1013 not being sorted correctly).
* Added P1023/P1027 to config_mpc85xx.h
* Added new LAW type introduced on P1023/P1017
* Updated a few immap register/defines unique to P1023/P1017

Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-04 09:24:41 -05:00
Kumar Gala
ebc73943ba powerpc/85xx: Don't build read_tlbcam_entry for CONFIG_NAND_SPL
Slim down NAND SPL build a bit as we don't need read_tlbcam_entry.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-04 09:24:41 -05:00
Kumar Gala
f9a33f1c61 powerpc: Add cpu_secondary_init_r to allow for initialization post env setup
We can simplify some cpu/SoC level initialization by moving it to be
after the environment and non-volatile storage is setup as there might
be dependancies on such things in various boot configurations.

For example for FSL SoC's with QE if we boot from NAND we need it setup
to extra the ucode image to initialize the QE.  If we always do this
after environment & non-volatile storage is working we can have the code
be the same regardless of NOR, NAND, SPI, MMC boot.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-04 09:24:41 -05:00
Kumar Gala
fdb4dad31e powerpc/85xx: Cleanup some QE related defines
Move some processor specific QE defines into config_mpc85xx.h and use
QE_MURAM_SIZE to cleanup some ifdef mess in the QE immap struct.

Also fixed up some comment style issues in immap_qe.h

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-04 09:24:41 -05:00
Kumar Gala
c39f44dc6f powerpc/8xxx: Refactor fsl_ddr_get_spd into common code from board
Move fsl_ddr_get_spd into common mpc8xxx/ddr/main.c as most boards
pretty much do the same thing.  The only variations are in how many
controllers or DIMMs per controller exist.  To make this work we
standardize on the names of the SPD_EEPROM_ADDRESS defines based on the
use case of the board.

We allow boards to override get_spd to either do board specific fixups
to the SPD data or deal with any unique behavior of how the SPD eeproms
are wired up.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-04 09:24:41 -05:00
Kumar Gala
5df4b0ad0d powerpc/8xxx: Replace fsl_ddr_get_mem_data_rate with get_ddr_freq()
Every 85xx board implements fsl_ddr_get_mem_data_rate via get_ddr_freq()
and every 86xx board uses get_bus_freq().  If implement get_ddr_freq()
as a static inline to call get_bus_freq() we can remove
fsl_ddr_get_mem_data_rate altogether and just call get_ddr_freq()
directly.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-04 09:24:40 -05:00
Kumar Gala
00203c6464 powerpc/85xx: Remove config.mk for nand linker script
Move the include of mpc85xx/u-boot-nand.lds to utilize
CONFIG_SYS_LDSCRIPT rather than having an explicit config.mk

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-04 09:24:40 -05:00
Kumar Gala
561e710a97 powerpc: Move cpu specific lmb reserve to arch_lmb_reserve
We've been utilizing board_lmb_reserve to reserve the boot page for MP
systems.  We can just move this into arch_lmb_reserve for 85xx & 86xx
systems rather than duplicating in each board port.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-04 09:24:40 -05:00
Li Yang
ccc4a8d89f powerpc/85xx: Update P2020DS default env settings
Read MAC address from EEPROM. Add hwconfig settings.

Modified the default othbootargs to include the cache-sram-size
parameter. This parameter is needed as the L2 as SRAM is ON by
default in the P2020RDB kernel and used by the Gianfar driver.

Also cleanup some of the boot commands.

Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Zhao Chenhui <b35336@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-04 09:24:40 -05:00
Jerry Huang
9c4d8767ed powerpc/85xx: Add eSDHC support on P2020DS
We enable SDHC_CD and SDHC_WP signals (pin muxed with GPIO8 & GPIO9
respectively).

We enable EXT2, FAT, and parition support for both MMC & USB configs.

Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com>
Signed-off-by: Jin Qing <b24347@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-04 09:24:40 -05:00
Kumar Gala
fbee0f7f09 powerpc/85xx: Add some defines for P2040, P3041, P5010, P5020
Specify the number of DDR controllers, number of frame managers, number
of 1g and 10g ports.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-04 09:24:40 -05:00
Pankaj Chauhan
eea9a12344 powerpc/85xx: Extend ethernet device tree stashing parameters for "fsl,etsec2"
In a manner similar to passing ethernet stashing parameters into device
tree for "gianfar", extend the support to the "fsl,etsec2" as well.

Signed-off-by: Pankaj Chauhan <pankaj.chauhan@freescale.com>
Signed-off-by: Sandeep Gopalpet <sandeep.kumar@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-04 09:24:40 -05:00
Kumar Gala
f0f899432e powerpc/85xx: Declare fsl_ddr_set_memctl_regs in <asm/fsl_ddr_sdram.h>
Remove declerations of fsl_ddr_set_memctl_regs in board files with and
place it into a common header.

Based on patch from Poonam Aggrwal.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-04 09:24:40 -05:00
Kumar Gala
5cfbc458d4 powerpc/85xx: Remove DATARATE_*_MHZ defines in static ddr init
Rather than having #defines DATARATE_*_MHZ, lets just match what we do on
the SPD code and convert the DDR frequency into MHZ and just compare
with a constant.

Based on patch from Poonam Aggrwal.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-04 09:24:40 -05:00
Timur Tabi
aa8d3fb8f4 p1022ds: allow for board-specific ngPIXIS functions
The ngPIXIS is an FPGA used on the reference boards of most Freescale PowerPC
SOCs.  Although programming the ngPIXIS is mostly standard on all boards that
have it, the P1022DS is unique in that the ngPIXIS needs to be programmed in
"indirect" mode whenever the video display (DIU) is active.

To support indirect mode, and to make it easier to support other quirks on
future reference boards, the low-level ngPIXIS functions are all marked as
weak, so that board-specific code can override any of them.  We take advantage
of this feature on the P1022DS, so that we can properly reset the board when
the DIU is active.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-04 09:24:40 -05:00
Dipen Dudhat
d789b5f5bc powerpc/85xx: Add support for Integrated Flash Controller (IFC)
The Integrated Flash Controller (IFC) is used to access the external
NAND Flash, NOR Flash, EPROM, SRAM and Generic ASIC memories.Four chip
selects are provided in IFC so that maximum of four Flash devices can be
hooked, but only one can be accessed at a given time.

Features supported by IFC are,
        - Functional muxing of pins between NAND, NOR and GPCM
        - Support memory banks of size 64KByte to 4 GBytes
        - Write protection capability (only for NAND and NOR)
        - Provision of Software Reset
        - Flexible Timing programmability for every chip select
        - NAND Machine
                - x8/ x16 NAND Flash Interface
                - SLC and MLC NAND Flash devices support with
                  configurable
                  page sizes of upto 4KB
                - Internal SRAM of 9KB which is directly mapped and
                  availble at
                  boot time for NAND Boot
                - Configurable block size
                - Boot chip select (CS0) available at system reset
        - NOR Machine
                - Data bus width of 8/16/32
                - Compatible with asynchronous NOR Flash
                - Directly memory mapped
                - Supports address data multiplexed (ADM) NOR device
                - Boot chip select (CS0) available at system reset
        - GPCM Machine (NORMAL GPCM Mode)
                - Support for x8/16/32 bit device
                - Compatible with general purpose addressable device
                  e.g. SRAM, ROM
                - External clock is supported with programmable division
                  ratio
        - GPCM Machine (Generic ASIC Mode)
                - Support for x8/16/32 bit device
                - Address and Data are shared on I/O bus
                - Following Address and Data sequences can be supported
                  on I/O bus
                       - 32 bit I/O: AD
                       - 16 bit I/O: AADD
                       - 8 bit I/O : AAAADDDD
                - Configurable Even/Odd Parity on Address/Data bus
                  supported

Signed-off-by: Dipen Dudhat <Dipen.Dudhat@freescale.com>
Acked-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-04 09:24:40 -05:00
Prabhakar Kushwaha
28747f9bb1 powerpc/85xx: Add SERDES support for P1010/P1014
Add the ability to determine if a given IP block connected on SERDES is
configured. This is useful for things like PCIe and SRIO since they are only
ever connected on SERDES.

Updated MPC85xx_PORDEVSR_IO_SEL & MPC85xx_PORDEVSR_IO_SEL_SHIFT

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-04 09:24:40 -05:00
Daniel Schwierzeck
ea2f0cb35c MIPS: Au1x00: Move all Au1x00 specific code to separate subdirectory
Au1x00 is a SoC and its specific code should reside in an own
SoC subdirectory. Also add -mtune=4kc flag for CPU optimization.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Cc: Thomas Lange <thomas@corelatus.se>
Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
2011-04-02 22:07:12 +09:00
Daniel Schwierzeck
6235df946e MIPS: IncaIP: Move all IncaIP specific code to separate subdirectory
IncaIP is a SoC and its specific code should reside in an own
SoC subdirectory. Also add -mtune=4kc flag for CPU optimization.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Cc: Wolfgang Denk <wd@denx.de>
Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
2011-04-02 22:07:12 +09:00
Daniel Schwierzeck
04efda7afc MIPS: Optimize the setup of CPU optimization flags
The current MIPS CPU config.mk code always expects a MIPS 4kc
core. This is not appropiate for other CPUs and SoCs.

Replace the current MIPSFLAGS code by cc-option macro and use
-march=mips32r2 as default optimization level for all MIPS32 CPUs.

Note: Since commit f62fb99941 all
toolchains with binutils prior to v2.16 are not working anymore.
As agreed with Shinya Kuribayashi the support for those toolchains
will be dropped officially with this patch.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Cc: Wolfgang Denk <wd@denx.de>
Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
2011-04-02 22:07:12 +09:00
Daniel Schwierzeck
91809608a4 MIPS: Move content of arch/mips/cpu to arch/mips/cpu/mips32
All current CPUs and SoCs are based on MIPS32 arch. The complete
code resides in the global arch/mips/cpu directory. This is not
suitable if other MIPS architectures like MIPS64 or Octeon should
be supported in the future.

To achieve this the current CPU code is moved to its own mips32
subdirectory. All MIPS32 boards have to use mips32 as config switch
in board.cfg.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Thomas Lange <thomas@corelatus.se>
Cc: Vlad Lungu <vlad.lungu@windriver.com>
Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
2011-04-02 22:07:12 +09:00
Daniel Schwierzeck
b38a569901 MIPS: Purple: Remove Purple support
The Purple SoC and eval board are not actively maintained since years.
This patch removes the support completely as aggreed with Wolfgang Denk.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Cc: Wolfgang Denk <wd@denx.de>
Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
2011-04-02 22:07:12 +09:00
Trübenbach, Ralf
0a5f7e1bdc ehci-pci: Add PCI EHCI controller
This patch adds support for the PI7C9X442SL PCIe EHCI host controller
from Pericom.

Tested at P4080DS eval board from Freescale.

Signed-off-by: Ralf Trübenbach <ralf.truebenbach@men.de>
Cc: Remy Bohmer <linux@bohmer.net>
2011-04-02 09:38:24 +02:00
Erik Hansen
3f270f42d7 fat32 root directory handling
Fat directory handling didn't check reaching the end of the root directory. It
relied on a stop condition based on a directory entry with a name starting with
a '\0' character. This check in itself is wrong ('\0' indicates free entry, not
end_of_directory) but outside the scope of this fix. For FAT32, the end of the
rootdir is reached when the end of the cluster chain is reached. The code didn't
check this condition and started to read an incorrect cluster. This caused a
subsequent read request of a sector outside the range of the usb stick in
use. On its turn, the usb stick protested with a stall handshake.

Both FAT32 and non-FAT32 (FAT16/FAT12) end or rootdir checks have been put in.

Signed-off-by: Erik Hansen <erik@makarta.com>
2011-04-02 09:38:24 +02:00
Erik Hansen
56887e27ae Remove unnecessary reset in usb_stor_get_info
The reset request in usb_stor_get_info is causing issues with some usb
sticks. Some of these sticks vendor_id/product_id have been hardcoded to
not reset but better is to remove the reset altogether. It is not needed.

Signed-off-by: Erik Hansen <erik@makarta.com>
2011-04-02 09:38:24 +02:00
Mike Frysinger
081b59e453 usb: musb: blackfin: check anomaly workarounds at runtime too
The anomaly workarounds we need for older silicon might break things
if used on newer versions where the anomalies don't exist.  So check
the silicon rev at runtime too.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-02 09:38:24 +02:00
Mike Frysinger
38e0745e4d usb: musb: blackfin: make clkin configurable
Not everyone has a 24MHz clkin to the USB, so let board porters override.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-02 09:38:24 +02:00
michael
67a490d60d atmel_nand: don't require CONFIG_SYS_NAND_ENABLE_PIN
If NCE is hooked up to NCS3, we don't need to (and can't)
explicitly set the state of the NCE pin. Instead, the
controller asserts it automatically as part of a
command/data access. Only "CE don't care"-type NAND chips
can be used in this manner.

Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Cc: Scott Wood <scottwood@freescale.com>
Cc: Reinhard Meyer <u-boot@emk-elektronik.de>
2011-04-01 14:49:08 -05:00
Florian Fainelli
0272c718ba NAND: add support for reading ONFI page table
This patch adds support for reading an ONFI page parameter from a NAND
device supporting it. If this is the case, struct nand_chip onfi_version
member contains the supported ONFI version, 0 otherwise.

This allows NAND drivers past nand_scan_ident to set the best timings for the
NAND chip.

Signed-off-by: Florian Fainelli <florian@openwrt.org>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2011-04-01 14:49:08 -05:00
Haiying Wang
e935a374db Fix NAND_SPL and ONENAND_IPL in Makefile
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2011-04-01 14:49:08 -05:00
Scott Wood
6f2ffc3da2 NAND: add more watchdog resets
Poke the watchdog in a variety of looping constructs, which could take
a long time to complete.

Signed-off-by: Scott Wood <scottwood@freescale.com>
2011-04-01 14:49:08 -05:00
Wolfgang Denk
19b54a7018 Prepare v2011.03
Signed-off-by: Wolfgang Denk <wd@denx.de>
2011-03-31 23:45:36 +02:00
Wolfgang Denk
3b258e2e58 Fix build issues cause by LDFLAGS_FINAL changes
Commit 6dc1ece "Introduce a new linker flag LDFLAGS_FINAL" modified a
number of Makefiles in a way that broke out-of-tree builds.  The
problem was that $(nandobj) was used before it got defined.

Fix this.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2011-03-31 23:38:16 +02:00
Wolfgang Denk
b12fee010c Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx 2011-03-31 09:01:36 +02:00
Wolfgang Denk
53ce77eef1 Merge branch 'master' of git://git.denx.de/u-boot-cfi-flash 2011-03-31 08:59:32 +02:00
Wolfgang Denk
7ec830d580 Fix build problems caused by "_end" -> "__bss_end__" rename
Commit 44c6e65 "rename _end to __bss_end__ broke building of a large
number of systems (at least all PowerPC?):

libstubs.o: In function `app_startup':
examples/standalone/stubs.c:197: undefined reference to `__bss_end__'

The rename should not be done for the files in the
examples/standalone/ directory, as these are not using the code from
start.S, but do their own BSS clearing, and either use their own
linker scripts or the ones provided by the compilers.

Signed-off-by: Po-Yu Chuang <ratbert@faraday-tech.com>
Signed-off-by: Wolfgang Denk <wd@denx.de>
2011-03-31 08:54:35 +02:00
Prabhakar Kushwaha
b03a466d6c powerpc/85xx: Handle PCIe initialization requires for P1021 class SoCs
The P1011, P1012, P1015, P1016, P1020, P1021, P1024, & P1025 SoCs require
that we initialize the SERDES registers if the lanes are configured for
PCIe.  Additionally these devices PCIe controller do not support ASPM
and we have to explicitly disable it.

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-03-29 07:41:37 -05:00
Martin Krause
af56730153 cfi_flash: fix bug with flash banks with different sector numbers
The function find_sector() does not take into account if the flash bank
has changed since the last call. This could lead to illegal accesses inside
and beyond the flash_info_t info strcture. For example if the current
flash bank has less sectors than the last used flash bank.

This patch adds two cheks. One that insures, that the current sector does
not exceed the allowed maximum (which is always a good idea). And one that
checks if the current access is to the same flash bank as the last access.
If not, the search loop will start with sector 0.

Signed-off-by: Martin Krause <martin.krause@tqs.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2011-03-28 19:06:51 +02:00
Jiang Yutang
2d7534a344 powerpc/85xx: Enable various errata on P1022/P1013 SoCs
Enable workaround for errata ELBC A001, ESDHC 111 & SATA A001 on
P1022/P1013 SoCs.

Also updated P1022DS config to properly enable CONFIG_FSL_SATA_V2.

Signed-off-by: Jiang Yutang <b14898@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-03-28 09:04:26 -05:00
Wolfgang Denk
cb815e5ff9 Prepare v
Signed-off-by: Wolfgang Denk <wd@denx.de>
2011-03-27 21:50:07 +02:00
Wolfgang Denk
14666418e9 Coding Style cleanup: remove trailing empty lines
Signed-off-by: Wolfgang Denk <wd@denx.de>
2011-03-27 21:48:08 +02:00
Wolfgang Denk
c04bf5e9a4 Merge branch 'master' of git://git.denx.de/u-boot-arm 2011-03-27 21:20:29 +02:00
Tom Warren
05858736f5 arm: Tegra2: Change mach-type to MACH_TYPE_SEABOARD due to mach-types.h update
Signed-off-by: Tom Warren <twarren@nvidia.com>
2011-03-27 19:20:30 +02:00
Chander Kashyap
f69bb51145 S5P: mmc: Resolved interrupt error during mmc_init
Blocksize was hardcoded to 512 bytes. But the blocksize varies
depeding on various mmc subsystem commands (between 8 and 512).
This hardcoding was resulting in interrupt error during data
transfer.

It is now calculated based upon the request sent by mmc subsystem.

Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2011-03-27 19:20:26 +02:00
Chander Kashyap
bef5f8565f ARMV7: S5P: Fixed register offset in mmc.h
The MMC registers are accessed through struct s5p_mmc member
variables. MMC controller "control4" register offset is set
to 0x8C as per data sheet. The size of struct s5p_mmc is also
corrected.

Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org>
Signed-off-by: Tushar Behera <tushar.behera@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2011-03-27 19:20:21 +02:00
Minkyu Kang
9aca34d6ab S5P: timer: replace bss variable by gd
Use the global data instead of bss variable, replace as follow.

count_value -> removed
timestamp -> tbl
lastdec -> lastinc

Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Albert ARIBAUD <albert.aribaud@free.fr>
2011-03-27 19:20:17 +02:00
Minkyu Kang
aa44a45f73 S5P: universal: Enable the pwm driver
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2011-03-27 19:20:08 +02:00
Minkyu Kang
96caf02f60 S5P: goni: Enable the pwm driver
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2011-03-27 19:20:06 +02:00
Minkyu Kang
dc795a8882 S5P: smdkc100: Enable the pwm driver
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2011-03-27 19:20:03 +02:00
Minkyu Kang
70fc52dfaa S5P: timer: Use pwm functions
Use pwm functions for timer that is PWM timer 4.

Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2011-03-27 19:19:59 +02:00
Donghwa Lee
3f129280b3 ARM: S5P: pwm driver support
This is common pwm driver of S5P.

Signed-off-by: Donghwa Lee <dh09.lee@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2011-03-27 19:19:54 +02:00
seedshope
ecc7cedd5a SMDK6400: Fixup dram_init for relocation support
Signed-off-by: Zhong Hongbo <bocui107@gmail.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2011-03-27 19:19:24 +02:00
seedshope
9a3a49fb00 SMDK6400: Disable LED function in start.s on the nand booting
Since nand boot have some limit for the first 4KB, We only
disable the LED function to reduce the code space. At the
same time, Fix the compile error for LED function undefined
in the compile time of nand_spl.

Signed-off-by: Zhong Hongbo <bocui107@gmail.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2011-03-27 19:19:21 +02:00
seedshope
6dde5074cc SMDK6400: Add some labels to u-boot.lds to support nand_spl
In the nand_spl feature of SMDK6400. Add some relocation symbols to
nand_spl/board/samsung/smdk6400/u-boot.lds to fix the compile error.

Signed-off-by: Zhong Hongbo <bocui107@gmail.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2011-03-27 19:19:16 +02:00
seedshope
fb3527575d SMDK6400: Fix the mutiple link error
The first, the cpu_init.o have already been link for cmd_link_o_target
atfer compile, But, The link script re-link the point file. So the link
machine will generate multiple definition error information.

The second, Since the first 4kB of nand boot featue code move to nand_spl,
So It is not necessary to force the cpu_init.o in non-nand boot.

Signed-off-by: Zhong Hongbo <bocui107@gmail.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2011-03-27 19:19:10 +02:00
seedshope
6c0db6fb7f SMDK6400: Fix some label undefined in build error
Modify Makefile for cpu_init.c and Start.s use some label,this defined
u-boot.lds of arch/arm/cpu/arm1176. But SMDK6400 use the link script
board/samsung/smdk6400/u-boot-nand.lds. So add some label form u-boot.lds
to u-boot-nand.lds

Signed-off-by: Zhong Hongbo <bocui107@gmail.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2011-03-27 19:19:05 +02:00
seedshope
6d56073c60 SMDK6400: Fix CONFIG_SYS_INIT_SP_ADDR undefined
Fix CONFIG_SYS_INIT_SP_ADDR undefined issue.

Signed-off-by: Zhong Hongbo <bocui107@gmail.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2011-03-27 19:19:00 +02:00
Po-Yu Chuang
f326cbba98 arm: fix incorrect monitor protection region in FLASH
Monitor protection region in FLASH did not cover .rel.dyn
and .dynsym sections, because it uses __bss_start to compute
monitor_flash_len. Use _end instead.

Add _end to linker scripts for end of u-boot image
Add _end_ofs to all the start.S.

Signed-off-by: Po-Yu Chuang <ratbert@faraday-tech.com>
2011-03-27 19:18:52 +02:00
Po-Yu Chuang
44c6e6591c rename _end to __bss_end__
Currently, _end is used for end of BSS section.  We want _end to mean
end of u-boot image, so we rename _end to __bss_end__ first.

Signed-off-by: Po-Yu Chuang <ratbert@faraday-tech.com>
2011-03-27 19:18:37 +02:00
Prabhakar Kushwaha
b0c5ceb305 powerpc/85xx: Fix PCI memory map setup on P1_P2_RDB
Update the PCIe address map to match standard FSL memory map.
Additionally, fix the TLBs so the cover the PCIe address space properly
so cards plugged in like an e1000 work correctly.

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-03-24 09:46:21 -05:00
York Sun
eb672e92f4 powerpc/mpc8xxx: fix workaround for errata DDR111 and DDR134
The fix for errata workaround is to avoid covering physical address
0xff000000 to 0xffffffff during the implementation.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-03-24 09:20:50 -05:00
York Sun
4ca3192946 powerpc/mpc8xxx: disable rcw_en bit for non-DDR3
rcw_en bit is only available for DDR3 controllers. It is a reserved bit on
DDR1 and DDR2 controllers.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-03-24 09:20:50 -05:00
York Sun
634bc55429 powerpc/mpc8572ds: revise board specific timing for dual-rank DIMMs
Tested all possible values for clk_adjust and write_data_delay for dual
rank UDIMM and RDIMM to revise the tables.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-03-24 09:20:50 -05:00
York Sun
08b3f7599f powerpc/mpc8xxx: fix recognition of DIMMs with ECC and Address Parity
To recognize DIMMs with ECC capability by testing ECC bit only. Not to be
confused by Address Parity bit.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-03-24 09:20:49 -05:00
Ed Swarthout
55f7934d2b strmhz: Make hz unsigned to support greater than 2146 MHz clock
For example, an input of 0x80000000 should print:

2147.484 instead of -2147.-483.

Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-03-22 23:34:36 +01:00
Haiying Wang
6dc1eceb9c Introduce a new linker flag LDFLAGS_FINAL
commit 8aba9dceeb
Divides variable of linker flags to LDFLAGS-u-boot and LDFLAGS

breaks the usage of --gc-section to build nand_spl. We still need linker option
--gc-section for every uboot image, not only the main one. LDFLAGS_FINAL passes
the --gc-sections to each uboot image.

To get the proper linker flags, we use LDFLAGS and LDFLAGS_FINAL to replace
PLATFORM_LDFLAGS in the Makefile of each nand_spl board.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
2011-03-22 23:32:06 +01:00
Peter Barada
c81c122242 Fix hash table deletion to prevent lost entries
Use negative used value to mark deleted entry.  Search keeps probing
past deleted entries.  Adding an entry uses first deleted entry when
it hits end of probe chain.

Initially found that "ramdiskimage" and "preboot" collide modulus 347,
causing "preboot" to be inserted at idx 190, "ramdiskimage" at idx 191.
Previous to this fix when "preboot" is deleted, "ramdiskimage" is
orphaned.

Signed-off-by: Peter Barada <peter.barada@logicpd.com>
Tested-by: Wolfgang Denk <wd@denx.de>
2011-03-22 22:43:04 +01:00
Joakim Tjernlund
5e987ddf85 Top config.mk: add include/config.mk
Seems to me that the top level config.mk should include
the auto generated include/config.mk so that all Makefile's
pickup those definitions.

Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
2011-03-21 22:56:56 +01:00
Po-Yu Chuang
8d8fd5b696 net: ftmac100: update get_timer() usages
Use get_timer() the same way as drivers/net/ftgmac100.c

Signed-off-by: Po-Yu Chuang <ratbert@faraday-tech.com>
Reviewed-by: Macpaul Lin <macpaul@gmail.com>
Tested-by: Macpaul Lin <macpaul@gmail.com>
2011-03-21 22:54:23 +01:00
Po-Yu Chuang
6f6e6e09b2 net: ftmac100: remove unnecessary volatiles
Signed-off-by: Po-Yu Chuang <ratbert@faraday-tech.com>
Reviewed-by: Macpaul Lin <macpaul@gmail.com>
Tested-by: Macpaul Lin <macpaul@gmail.com>
2011-03-21 22:53:30 +01:00
Heiko Schocher
927d2cea6b mpc52xx, digsy_mtc_rev5: Fix Linux crash, if no Flash in bank 2
If no Flash is connected to cs1, Linux crashes, because
reg entries are not correct adapted.

Following fix is needed:
- swap base addresses in CONFIG_SYS_FLASH_BANKS_LIST, as
  flash bank 1 is on chipselect 0 and flash bank 2 on
  chipselect 1
- call fdt_fixup_nor_flash_size() from ft_board_setup()

Signed-off-by: Heiko Schocher <hs@denx.de>
cc: Wolfgang Denk <hs@denx.de>
cc: Werner Pfister <Pfister_Werner@intercontrol.de>
cc: Detlev Zundel <dzu@denx.de>
2011-03-21 22:51:27 +01:00
Wolfgang Denk
62043ed02a Merge branch 'master' of git://git.denx.de/u-boot-ubi 2011-03-21 21:40:15 +01:00
Wolfgang Denk
9063fda9d6 Merge branch 'master' of git://git.denx.de/u-boot-sh 2011-03-21 21:38:29 +01:00
Stefan Roese
7f5d8a4d8e UBI: Fix error code handling in ubi commands
Some ubi commands returned negative error codes, resulting in
the following error message on the prompt:

"exit not allowed from main input shell."

Negative error codes are not allowed.

This patch now changes the UBI code to return positive error codes.
Additionally "better" error codes are used, for example "ENOMEM" when
no memory is available for the UBI volume creation any more.

Also the output of some commands is enhanced:

Before:

=> ubi read 100000 testvol 100000
Volume testvol found at volume id 0
read 1048576 bytes from volume 0 to 100000(buf address)
=> ubi write 100000 testvol 1000
Volume testvol found at volume id 0

After:

=> ubi read 100000 testvol 100000
Read 1048576 bytes from volume testvol to 00100000
=> ubi write 100000 testvol 1000
4096 bytes written to volume testvol

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
2011-03-21 10:02:16 +01:00
Nobuhiro Iwamatsu
b52da2aed8 sh: Add KEEP order to start.o section
The start.o section is changed by --gc-section option of ld.
Of this using KEEP order, therefore, evade this problem.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2011-03-16 10:16:34 +09:00
Nobuhiro Iwamatsu
40c477082f sh: Add handling of CONFIG_SYS_NO_FLASH for board.c
Some board of SH does not have flash memoy.
This revises it to initialize Flash when CONFIG_SYS_NO_FLASH is not
defined.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2011-03-16 10:16:34 +09:00
Yoshihiro Shimoda
903de461e4 net: sh_eth: add support for SH7757's ETHER
SH7757 has ETHER and GETHER. This patch supports EHTER only.

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2011-03-16 10:16:34 +09:00
Kumar Gala
7afc45ad7d powerpc/85xx: Fix synchronization of timebase on MP boot
There is a small ordering issue in the master core in that we need to
make sure the disabling of the timebase in the SoC is visible before we
set the value to 0.  We can simply just read back the value to
synchronizatize the write, before we set TB to 0.

Reported-by: Dan Hettena
Tested-by: Dan Hettena
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-03-15 01:25:51 -05:00
John Schmoller
cc1dd33f27 mpc8[5/6]xx: Ensure POST word does not get reset
The POST word is stored in a spare register in the PIC on MPC8[5/6]xx
processors.  When interrupt_init() is called, this register gets reset
which resulted in all POST_RAM POSTs not being ran due to the corrupted
POST word.  To resolve this, store off POST word before the PIC is
reset, and restore it after the PIC has been initialized.

Signed-off-by: John Schmoller <jschmoller@xes-inc.com>
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-03-13 11:24:44 -05:00
Priyanka Jain
b71ea33699 fsl_esdhc: Correcting esdhc timeout counter calculation
- Timeout counter value is set as DTOCV bits in SYSCTL register
  For counter value set as timeout,
  Timeout period = (2^(timeout + 13)) SD Clock cycles

- As per 4.6.2.2 section of SD Card specification v2.00, host should
  cofigure timeout period value to minimum 0.25 sec.

- Number of SD Clock cycles for 0.25sec should be minimum
	(SD Clock/sec * 0.25 sec) SD Clock cycles
	= (mmc->tran_speed * 1/4) SD Clock cycles

- Calculating timeout based on
	(2^(timeout + 13)) >=  mmc->tran_speed * 1/4
	Taking log2 both the sides and rounding up to next power of 2
	=> timeout + 13 = log2(mmc->tran_speed/4) + 1

Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Acked-by: Mingkai Hu <Mingkai.Hu@freescale.com>
Tested-by: Stefano Babic <sbabic@denx.de>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-03-07 08:49:28 -06:00
Matthew McClintock
509e19cab4 powerpc/85xx: Fix pixis_reset altbank mask on MPC8536DS
Currently, pixis_reset altbank does not work properly. This patch
uses the correct mask to boot into the alternate bank.

Signed-off-by: Matthew McClintock <msm@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-03-06 21:41:07 -06:00
Ed Swarthout
e81241af5a powerpc/85xx: Fix plat_mp_up() disabling of BPTR for CoreNet Platforms
Copying directly from ECM/PQ3 is not correct for how CoreNet based
platforms handle boot page translation.

Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-03-05 10:16:24 -06:00
York Sun
d89a976c13 powerpc/corenet_ds: revise platform dependent parameters
This patch revised clk_adjust and wrlvl_start timings for corenet_ds, based
on testing on Virtium VL33B5163F-K9S and Kingston KVR1333D3Q8R9S/4G.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-03-05 10:13:50 -06:00
York Sun
59a4089f82 corenet_ds: pick the middle value for all tested timing parameters
For DDR3 controller, the clk_adjust and wrlvl_start are platform-dependent.
The best values should be picked up from the middle of all working
combinations. This patch updates the table with confirmed values tested on
Hynix dual-rank UDIMMs (HMT125U7BFR8C-H9) at 1300MT/s, 1200MT/s, 1000MT/s,
900MT/s, 800MT/s and Kingston quad-rank RDIMMs (KVR1333D3Q8R9S/4G) at 1300MT/s,
1200MT/s, 1000MT/s.

Signed-off-by: York Sun <yorksun@freescale.com>
2011-03-05 10:13:50 -06:00
York Sun
f5b6fb7c1b powerpc/mpc8xxx: Fix DDR3 timing_cfg_1 and sdram_mode registers
The write recovery time of both registers should match. Since mode register
doesn't support cycles of 9,11,13,15, we should use next higher number for
both registers.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-03-05 10:13:50 -06:00
Kumar Gala
8e29ebabf8 fsl_law: Fix LAW printing function
We had an extra '0x' in the output of the LAWAR header that would cause
output like:

LAWBAR11: 0x00000000 LAWAR0x11: 0x80f0001d

intead of:

LAWBAR11: 0x00000000 LAWAR11: 0x80f0001d

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-02-22 23:25:19 -06:00
Sandeep Paulraj
c7977858dc ARM: Update mach-types
This commit updates the mach-types based on the latest
in linus's head

Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-02-21 08:30:55 +01:00
Fabio Estevam
0952ea16ad arm1136 relocation: Fix calculation of board_init_r
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2011-02-21 08:30:55 +01:00
Fabio Estevam
428f718889 arm1136: Fix NAND boot
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
Tested-by: Magnus Lilja <lilja.magnus@gmail.com>
2011-02-21 08:30:55 +01:00
Po-Yu Chuang
3a8a83e08d arm: get_sp() should always be compiled
get_sp() was incorrectly excluded if none of
  CONFIG_SETUP_MEMORY_TAGS
  CONFIG_CMDLINE_TAG
  CONFIG_INITRD_TAG
  CONFIG_SERIAL_TAG
  CONFIG_REVISION_TAG
were defined.

Signed-off-by: Po-Yu Chuang <ratbert@faraday-tech.com>
2011-02-21 08:30:55 +01:00
Lei Wen
ea4bc120db Pantheon: Add Board Support for Marvell dkb board
DKB is a Development Board for PANTHEON TD/TTC(pxa920/pxa910) with
* Processor upto 806Mhz
* LPDDR1/2
* x8/x16 SLC/MLC NAND
* Footprints for eMMC & MMC x8 card

With Peripherals:
* Parallel LCD I/F
* Audio codecs (88PM8607)
* MIPI CSI-2 camera
* Marvell 88W8787 802.11n/BT module
* Marvell 2G/3G RF
* Dual analog mics & speakers, headset jack, LED, ambient
* USB2.0 HS host, OTG (mini AB)
* GPIO, GPIO expander with DIP switches for easier selection
* UART serial over USB, CIR

This patch adds basic board support with DRAM and UART functionality

Signed-off-by: Lei Wen <leiwen@marvell.com>
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
2011-02-21 08:30:55 +01:00
Lei Wen
a03774ed88 mvmfp: add MFP configuration support for PANTHEON
This patch adds the Multiple Function Pin configuration support for
Marvell PANTHEON SoCs

Signed-off-by: Lei Wen <leiwen@marvell.com>
2011-02-21 08:30:55 +01:00
Lei Wen
b5d807f64d serial: add pantheon soc support
Signed-off-by: Lei Wen <leiwen@marvell.com>
2011-02-21 08:30:55 +01:00
Lei Wen
896e2ca912 ARM: Add Support for Marvell Pantheon Familiy SoCs
Pantheon Family processors are highly integrated SoCs
based on Sheeva_88SV331x-v5 PJ1 cpu core.
Ref:
http://www.marvell.com/products/processors/communications/marvell_pantheon_910_920_pb.pdf

SoC versions Supported:
1) PANTHEON920          (TD)
2) PANTHEON910          (TTC)

Signed-off-by: Lei Wen <leiwen@marvell.com>
2011-02-21 08:30:55 +01:00
Lei Wen
cf946c6d09 mv: seperate kirkwood and armada from common setting
Since there are lots of difference between kirkwood and armada series,
it is better to seperate them but still keep the most common file
shared by all marvell platform in the mv-common configure file.

This patch move the kirkwood only driver definitoin in mv-common to
the <soc_name>/config.h.

This patch is tested with compilation for armada100 and guruplug.

Signed-off-by: Lei Wen <leiwen@marvell.com>
2011-02-21 08:30:55 +01:00
Wolfgang Denk
495df3bad9 ARM: fix write*() I/O accessors
Commit 3c0659b "ARM: Avoid compiler optimization for readb, writeb
and friends." introduced I/O accessors with memory barriers.
Unfortunately the new write*() accessors introduced a bug:

The problem is that the argument "v" gets evaluated twice.  This
breaks code like used here (from "drivers/net/dnet.c"):

	for (i = 0; i < wrsz; i++)
		writel(*bufp++, &dnet->regs->TX_DATA_FIFO);

Use auxiliary variables to avoid such problems.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Albert Aribaud <albert.aribaud@free.fr>
Cc: Alexander Holler <holler@ahsoftware.de>
Cc: Dirk Behme <dirk.behme@googlemail.com>
2011-02-21 08:30:55 +01:00
Alexander Stein
6087f1a90c arm relocation: Fix calculation of board_init_r
Signed-off-by: Alexander Stein <alexander.stein@informatik.tu-chemnitz.de>
2011-02-21 08:30:55 +01:00
Tom Warren
ee4bbbcb65 arm: Tegra2: Add support for NVIDIA Seaboard board
Signed-off-by: Tom Warren <twarren@nvidia.com>
2011-02-21 08:30:55 +01:00
Tom Warren
efc05ae131 arm: Tegra2: Add support for NVIDIA Harmony board
Signed-off-by: Tom Warren <twarren@nvidia.com>
2011-02-21 08:30:55 +01:00
Tom Warren
2ee3678159 serial: Add Tegra2 serial port support
Signed-off-by: Tom Warren <twarren@nvidia.com>
2011-02-21 08:30:55 +01:00
Tom Warren
3f82b1d3ab arm: Tegra2: Add basic NVIDIA Tegra2 SoC support
Signed-off-by: Tom Warren <twarren@nvidia.com>
2011-02-21 08:30:54 +01:00
Fabio Estevam
9b6442f99c mx31pdk: Make the full boot log visible
Use board_early_init_f so that the full boot log output can be displayed.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2011-02-21 08:30:54 +01:00
Fabio Estevam
ed3df72db1 mx31pdk: Use the new relocation scheme
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2011-02-21 08:30:54 +01:00
Loïc Minier
0b509519a6 EfikaMX: switch to MACH_TYPE_MX51_EFIKAMX
Upstream linux moved from MACH_TYPE_MX51_LANGE51 to
MACH_TYPE_MX51_EFIKAMX.

Signed-off-by: Loïc Minier <loic.minier@linaro.org>
2011-02-21 08:30:54 +01:00
Remy Bohmer
c650e1be41 Fix compile warning in net/eth.c
Signed-off-by: Remy Bohmer <linux@bohmer.net>
2011-02-19 20:32:38 +01:00
Remy Bohmer
3a26c43e42 Fix build warnings in cmd_flash.c
These variables are only used in case CONFIG_SYS_NO_FLASH is NOT set:
struct mtd_device *dev;
struct part_info *part;
u8 dev_type, dev_num, pnum;

Signed-off-by: Remy Bohmer <linux@bohmer.net>
2011-02-19 20:32:38 +01:00
Vitaly Kuzmichev
e4ae66608b USB-RNDIS: Send RNDIS state on disconnecting
Add waiting for receiving Ethernet gadget state on the Windows host
side before dropping pullup, but keep it for debug.

Signed-off-by: Vitaly Kuzmichev <vkuzmichev@mvista.com>
2011-02-19 20:32:38 +01:00
Vitaly Kuzmichev
7612a43d08 USB: Add USB RNDIS gadget protocol
Port USB gadget RNDIS protocol support from linux-2.6.26
(.27 gadget stack actually has composite drivers).

Signed-off-by: Vitaly Kuzmichev <vkuzmichev@mvista.com>
2011-02-19 20:32:37 +01:00
Vitaly Kuzmichev
8b6b66b427 USB-CDC: Move struct declaration before its use
Signed-off-by: Vitaly Kuzmichev <vkuzmichev@mvista.com>
2011-02-19 20:32:37 +01:00
Vitaly Kuzmichev
c85d70ef64 USB-CDC: Port struct net_device_stats
Port struct net_device_stats and statistics collecting needed for
RNDIS protocol.

Signed-off-by: Vitaly Kuzmichev <vkuzmichev@mvista.com>
2011-02-19 20:32:37 +01:00
Vitaly Kuzmichev
b3649f3bbf USB-CDC: handle interrupt after dropped pullup
Disconnecting USB gadget with pending interrupt may cause its wrong
handling in the next time when interface will be started again
(especially actual for RNDIS). This interrupt may force the gadget
to queue unexpected response before setup stage.
Despite the fact that such interrupt handled after dropped pullup
also may add pending response, this will not bring to any issues due to
usb_ep_disable (which clears the queue) called on gadget unregistering.

Signed-off-by: Vitaly Kuzmichev <vkuzmichev@mvista.com>
2011-02-19 20:32:36 +01:00
Simon Glass
9b70e00773 Add support for ASIX AX88772 USB 2.0 10/100Mbit Ethernet Adaptor
Driver originally written by NVIDIA Corporation, modified to
handle odd-length packets.

Signed-off-by: Simon Glass <sjg@chromium.org>
2011-02-19 20:32:36 +01:00
Simon Glass
89d48367ed Add USB host ethernet adapter support
This adds support for using USB Ethernet dongles in host mode. This is just
the framework - drivers will come later. A new config option called
CONFIG_USB_HOST_ETHER can be defined in board config files to switch this
on.

The was originally written by NVIDIA and was cleaned up for release by the
Chromium authors.

Signed-off-by: Simon Glass <sjg@chromium.org>
2011-02-19 20:32:36 +01:00
Simon Glass
96820a3587 Fix EHCI usb submit timeout and unify with OHCI
Changed both to use a common timeout for URB submission, since they were using
different values and EHCI's was too short.

Also fixed EHCI to actually check if urb submission succeeded, rather than
silently continuing into the weeds.

Change-Id: I7f71499ffaa05187d8e5618db2419e1606007b82

Signed-off-by: Simon Glass <sjg@chromium.org>
2011-02-19 20:32:34 +01:00
Yoshihiro Shimoda
efb063390d add checking the CONFIG_ENV_IS_IN_SPI_FLASH in Enbedded env
Fix the problem which cannot build the U-boot, if we only set
the CONFIG_ENV_IS_IN_SPI_FLASH.

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Acked-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2011-02-15 22:09:50 +01:00
Nobuhiro Iwamatsu
327f55c6da net: ne2000: Add spport RTL-8019AS
Add infomation of RTL-8016AS to hw_info.

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
CC: Ben Warren <biggerbadderben@gmail.com>
2011-02-15 21:55:41 +01:00
Wolfgang Denk
67fb0622a9 unzip: return uncompressed size in `filesize', and print it.
The unzip command did not provide a way for the caller to get any
information about the uncompressed size.  To make it better usable in
scripts, we now store the uncompressed size in the `filesize'
variable, like we do when for example loading a file over the network
or when reading it from a file system.  Following that analogy, it is
only consequent to also print the size.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2011-02-15 21:46:39 +01:00
Wolfgang Denk
cc22b795fb itest: fix result of string compares
The implementation of the string compare function of the "itest"
command was weird, as only the length of the shortest argument was
included in the compare, with the result that something like
"itest.s abd == abddef" would return TRUE.  Fix this.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Acked-by: Detlev Zundel <dzu@denx.de>
2011-02-15 21:45:55 +01:00
Michal Simek
518075fc6a microblaze: Fix msr handling in interrupt_handler
Fix ancient code which worked with MSR in a bad way.
Use rtid instruction which enable IRQs and jump.

Signed-off-by: Michal Simek <monstr@monstr.eu>
2011-02-15 15:13:24 +01:00
Michal Simek
b777a37c29 microblaze: Fix systems with MSR=0
u-boot BSP generates XILINX_USE_MSR_INSTR macro
even for system with MSR=0. That's why explicitly
check that MSR=1.

Signed-off-by: Michal Simek <monstr@monstr.eu>
2011-02-15 15:13:24 +01:00
Wolfgang Denk
c65715de78 Merge branch 'master' of git://git.denx.de/u-boot-mips 2011-02-12 20:37:47 +01:00
Graeme Russ
8b1a714013 eNET: Move initial Global Data into CAR 2011-02-12 15:12:14 +11:00
Graeme Russ
6002bf03b4 sc520: Release CAR and enable caching 2011-02-12 15:12:12 +11:00
Graeme Russ
e4f78d78d7 x86: Convert board_init_f to use an init_sequence 2011-02-12 15:12:10 +11:00
Graeme Russ
a3824142e7 x86: Rearrange function calls in board_init_f 2011-02-12 15:12:08 +11:00
Graeme Russ
71a5404974 x86: Split board_init_f() into init_fnc_t compatible functions 2011-02-12 15:12:06 +11:00
Graeme Russ
5fed82110d x86: Fix incorrect usage of relocation offset
x86 has always used relocation offset in the opposite sense to the ELF
standard - Fix this
2011-02-12 15:12:05 +11:00
Graeme Russ
0b2378557c x86: Move console initialisation into board_init_f 2011-02-12 15:12:03 +11:00
Graeme Russ
bf6af154a4 x86: Move test for cold boot into init functions 2011-02-12 15:12:01 +11:00
Graeme Russ
c869e2ac46 x86: Move call to dram_init_f into board_init_f 2011-02-12 15:11:59 +11:00
Graeme Russ
fb0029088e x86: Defer setup of final stack 2011-02-12 15:11:58 +11:00
Graeme Russ
96cd66426a sc520: Move RAM sizing code from asm to C 2011-02-12 15:11:54 +11:00
Graeme Russ
ed4cba79d6 x86: Use Cache-As-RAM for initial stack 2011-02-12 15:11:52 +11:00
Graeme Russ
2e2613d2c4 x86: Move initial gd to fixed location 2011-02-12 15:11:50 +11:00
Graeme Russ
cfbe861506 eNET: General code cleanup 2011-02-12 15:11:48 +11:00
Graeme Russ
c083e4bab1 eNET: Rearrange PAR assignments 2011-02-12 15:11:47 +11:00
Graeme Russ
420c7c054b eNET: Define MMCR values in config.h 2011-02-12 15:11:45 +11:00
Graeme Russ
218310018a eNET: Add RTC support to eNET
The SC520 has an inbuilt MC146818 - Enable it for the eNET board
2011-02-12 15:11:43 +11:00
Graeme Russ
d881ea532b eNET: Fix eNET Interrupt Setup for Linux
Fix minor issues with the configuration of the hardware interrupts for
Linux when booting the eNET board
2011-02-12 15:11:41 +11:00
Graeme Russ
6d0cb34954 sc520: Remove printf calls from cpu_init_f
In later patches, cpu_init_f will be called before console has been
initialised and printf will not be legitimately available
2011-02-12 15:11:40 +11:00
Graeme Russ
870847f5c5 sc520: Move board specific settings to board init function 2011-02-12 15:11:38 +11:00
Graeme Russ
c2cbbaf0b4 sc520: Define MMCR address in include file 2011-02-12 15:11:36 +11:00
Graeme Russ
0ea76e92e9 x86: Make cpu init functions weak 2011-02-12 15:11:35 +11:00
Graeme Russ
4e33467d44 x86: Call early_board_init when warm booting
early_board_init has been skipped to avoid SDRAM corruption in the case
that a fully relocatable image has been loaded into SDRAM and is being
executed from SDRAM. x86 is being aligned with other architectures (ARM
and PPC in particlar) and will be using Cache-As-RAM to run a C
environment from Flash (or SRAM if you have some). early_board_init may
be needed to assist in the setup of Cache-As-RAM and the early C
environment
2011-02-12 15:11:33 +11:00
Graeme Russ
0c24c9cc71 x86: Add processor flags header from linux 2011-02-12 15:11:32 +11:00
Graeme Russ
c53fd2bb6d x86: Move Global Descriptor Table defines to processor.h 2011-02-12 15:11:30 +11:00
Graeme Russ
ca56a4ceec x86: Add stack dump to register dump 2011-02-12 15:11:28 +11:00
Graeme Russ
9963a8216e x86: Fix mangled umlauts
git mergetool has a nasty habit of mangling umlats - fix ones that have
been missed in previous submissions
2011-02-12 15:11:26 +11:00
Graeme Russ
0640e40272 sc520: Sort Makefile 2011-02-12 15:11:25 +11:00
Graeme Russ
3a25e94410 x86: Parametize values used in linker script 2011-02-12 15:11:24 +11:00
Graeme Russ
fde5912366 eNET: Create distinct board configurations
Position independant functionality is due for removal from the x86
architecture, so create two distinct configurations - One for Flash and
one for SRAM
2011-02-12 15:11:22 +11:00
Graeme Russ
a85f53cd3f x86: Align config.mk and linker scripts with other arches 2011-02-12 15:11:21 +11:00
Graeme Russ
de47cbe686 x86: Fix definition of global_data struct for asm-offsets.c 2011-02-12 15:11:21 +11:00
Wolfgang Denk
d1a79b71f7 Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx 2011-02-11 21:23:33 +01:00
York Sun
856e4b0d7f powerpc/8xxx: Add additional cycle to write-to-read turnaound for DDR3
When DDR data rate is higher than 1200MT/s or controller interleaving is
enabled, additional cycle for write-to-read turnaround is needed to satisfy
dynamic ODT timing.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-02-10 23:40:02 -06:00
Priyanka Jain
b1d67857af powerpc/85xx: corrected p1_p2_rdb EEPROM address
Board EEPROM is used to read/save Ethernet MAC addresses.

Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-02-09 23:47:52 -06:00
Kumar Gala
a34af3cc9f powerpc/85xx: Fix p1_p2_rdb boards.cfg
We should have been defining the actual board name in the options, not
the processor.  Fix this for P1011RDB, P1020RDB, P2010RDB, and P2020RDB.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-02-09 23:47:52 -06:00
Timur Tabi
3fee334c85 fsl: update CRC after setting EEPROM identifier
The "mac id" command is used to initialize the EEPROM data to a specific
format, but it was not updating the CRC.  This didn't cause any real
problems, because writing the data to the EEPROM will always update the
CRC anyway, but it did result in a bogus CRC warning.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-02-09 23:30:39 -06:00
Wolfgang Denk
17f79e45e1 cmd_bmp.c: message about compressed formats is debug info only.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Anatolij Gustschin <agust@denx.de>
2011-02-09 21:32:20 +01:00
Wolfgang Denk
494a7d215b Merge branch 'master' of git://git.denx.de/u-boot-nand-flash 2011-02-09 21:22:58 +01:00
Wolfgang Denk
65b57ebb30 Merge branch 'next' of git://git.denx.de/u-boot-nios 2011-02-09 20:54:53 +01:00
Wolfgang Denk
fced09ae38 Merge branch 'master' of git://git.denx.de/u-boot-ppc4xx 2011-02-09 20:50:26 +01:00
Scott Wood
eef1d7199d NAND: env: remember the flags used in the previous environment
Previously, uninitialized stack space was being referenced.

Signed-off-by: Scott Wood <scottwood@freescale.com>
2011-02-08 15:25:02 -06:00
Thomas Chou
d8a593c68b nios2: add gpio_is_valid
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Signed-off-by: Scott McNutt <smcnutt@psyent.com>
2011-02-08 08:29:53 -05:00
Thomas Chou
85debefaf2 nios2: use long for ssize_t
This is consistent with nios2-linux. And resolved the warning,

cmd_nvedit.c: In function `do_env_export':
cmd_nvedit.c:660: warning: size_t format, ssize_t arg (arg 3)

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Signed-off-by: Scott McNutt <smcnutt@psyent.com>
2011-02-08 08:29:53 -05:00
Thomas Chou
df8f125261 altera_spi: add spi_set_speed
Added this for mmc_spi driver. Though altera spi core does not
support programmable speed. It is fixed when configured in
sopc-builder.

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Signed-off-by: Scott McNutt <smcnutt@psyent.com>
2011-02-08 08:29:53 -05:00
Thomas Chou
e91d54535f nios2: add gpio_free
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Signed-off-by: Scott McNutt <smcnutt@psyent.com>
2011-02-08 08:29:53 -05:00
Shinya Kuribayashi
9d3f9118a9 MIPS: Move VCT boards to boards.cfg
Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
Acked-by: Stefan Roese <sr@denx.de>
2011-02-07 22:05:50 +09:00
Dirk Eibach
2da0fc0d0f ppc4xx: Add DLVision-10G board support
Board support for the Guntermann & Drunck DLVision-10G.
Adds support for multiple FPGAs per board for gdsys 405ep
architecture.
Adds support for dual link osd hardware for gdsys 405ep.

Signed-off-by: Dirk Eibach <eibach@gdsys.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2011-02-07 11:13:16 +01:00
Wolfgang Denk
8d4addc3c3 Merge branch 'master' of git://git.denx.de/u-boot-mpc83xx 2011-02-06 22:41:53 +01:00
Wolfgang Denk
367c6651a8 Merge branch 'master' of git://git.denx.de/u-boot-usb 2011-02-06 22:39:50 +01:00
Wolfgang Denk
e9e481f74b Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx 2011-02-06 22:28:34 +01:00
Joakim Tjernlund
26e5f794d3 mpc83xx: Use correct register to calculate clocks.
Use SPMR instead of HRCWL when calculating clocks as HCRWL
may be changed and the CPU will not pick up all changes
until there is a POR. u-boot will think SPMF has changed and get
the clocks wrong.

Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2011-02-05 17:06:57 -06:00
Leo Liu
10fa8d7c70 mpc83xx: fix pcie configuration space read/write
This patch fix a problem for the pcie enumeration when the mpc83xx
pcie controller is connected with switch or we use both of the two
pcie controller.

Signed-off-by: Leo Liu <liucai.lfn@gmail.com>

fix codingstyle and compiler warning: 'pcie_priv' defined but not used

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2011-02-05 17:01:52 -06:00
Shinya Kuribayashi
536884f915 MIPS: Move Inca-IP targets to boards.cfg
At the same time, fix up CPU_CLOCK_RATE to have the CONFIG_ prefix to
work with boards.cfg.

Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
2011-02-05 22:45:41 +09:00
Shinya Kuribayashi
8d573fdcc4 MIPS: Move Qemu MIPS target to boards.cfg
CONFIG_QEMU_MIPS is already provided by <configs/qemu-mips.h>, so we
don't generate it using the options fields in boards.cfg.

Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
2011-02-05 22:45:41 +09:00
Alexander Holler
ce297a8f7e USB: Change the necessary defines to get debug output
While debugging some USB stuff, I've first missed that there are actually
two defines necessary to get usefull output. The one needed to get debug output
for the communication with HUBs was burried somewhere deep inside the code.

Change that so that a #define DEBUG is enough while still leaving the possibility
to reduce unwanted debug output.

Signed-off-by: Alexander Holler <holler@ahsoftware.de>
2011-02-05 13:54:51 +01:00
Alexander Holler
cb44091fdf USB: Fix device stati for removable and powerctrl (typo)
I currently don't know if the error could have other consequences
than a wrong output when turning debug on.

Signed-off-by: Alexander Holler <holler@ahsoftware.de>
2011-02-05 13:54:51 +01:00
Shinya Kuribayashi
5efd0da9b6 MIPS: Move Alchemy Au1x00 based boards to boards.cfg
CONFIG_GTH2 is already provided by <configs/gth2.h>, so we don't
generate it using the options fields in boards.cfg.

Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
2011-02-05 20:07:41 +09:00
Shinya Kuribayashi
c6dc8a734d cmd_ide: Fix an unused CONFIG_AU1X00 symbol to work as intended
commit 8bde63eb3f ([MIPS] Rename Alchemy
processor configs into CONFIG_SOC_*) forgot to pick up this one.

Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
2011-02-05 20:06:03 +09:00
Daniel Schwierzeck
17a990b550 MIPS: dbau1x00: Remove unused flash driver stub
All dbau1x00 boards use the CFI driver so this stub driver is useless
and should not be compiled.

This patch fixes the error:

u-boot-git/board/dbau1x00/flash.c:34: multiple definition of `flash_init'
drivers/mtd/libmtd.o:u-boot-git/drivers/mtd/cfi_flash.c:2084: first defined here
board/dbau1x00/libdbau1x00.o: In function `write_buff':
u-boot-git/board/dbau1x00/flash.c:40: multiple definition of `write_buff'
drivers/mtd/libmtd.o:u-boot-git/drivers/mtd/cfi_flash.c:1265: first defined here

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Cc: Wolfgang Denk <wd@denx.de>
Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
2011-02-05 20:05:31 +09:00
Daniel Schwierzeck
ec36d1f422 MIPS: Purple: Fix multiple definition error on final linking of u-boot binary
The linker of recent toolchains complains about multiple definitions
on final linking of u-boot binary. This patch removes all redundant
object files from u-boot.lds those are already added to .text section
by the linker.

That patch could not be tested but the resulting u-boot.map still looks
good. The start symbol is at 0xB0000000, the environment at 0xB0008000
so u-boot should boot.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Cc: Wolfgang Denk <wd@denx.de>
Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
2011-02-05 20:05:14 +09:00
Daniel Schwierzeck
383015b2cc MIPS: VCT: Fix enabling of unwanted options if networking or USB support are disabled
Some VCT boards lacks the support of networking or USB.
Additionally that support is disabled in small image
configurations.

If CONFIG_CMD_NET should not used the CONFIG_CMD_NFS option
have to be disabled too. Otherwise the linker fails with
unresolved symbols.

If CONFIG_VCT_SMALL_IMAGE is set than CONFIG_CMD_NET and
CONFIG_CMD_USB are disabled at the end of vct.h.
This is not adequate because CONFIG_CMD_USB enables additional
options and the linker fails again with unresolved symbols.

This patch adds an early check against CONFIG_VCT_SMALL_IMAGE
so the additional options are only enabled if they are really
needed.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Acked-by: Stefan Roese <sr@denx.de>
Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
2011-02-05 17:15:05 +09:00
Wolfgang Denk
f69b980d10 Merge branch 'master' of git://git.denx.de/u-boot-nand-flash 2011-02-04 21:44:46 +01:00
Kumar Gala
04a641df25 powerpc/8xxx: Fix possible compile issue related to P1013
The P1013 is a single core version of P1022 and thus should use the
p1022_serdes.c code.  It was acciently pointing to p1013_serdes.c which
doesn't exist.

Reported-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-02-04 14:04:21 -06:00
Wolfgang Denk
4bfa18fb99 Merge branch 'master' of git://git.denx.de/u-boot-sh 2011-02-04 20:38:27 +01:00
York Sun
d34897d329 powerpc/85xx: Enable ECC on MPC8572DS
Using hwconfig to turn on/off ECC, without re-compiling.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-02-03 02:46:13 -06:00
York Sun
91671913f7 powerpc/mpc85xx: implement workaround for errata DDR111 and DDR134
Workaround for the following errata:
DDR111 - MCKE signal may not function correctly at assertion of HRESET
DDR134 - The automatic CAS-to-Preamble feature of the DDR controller can
         calibrate to incorrect values

These two workarounds must be implemented together because they touch
common registers.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-02-03 02:46:13 -06:00
York Sun
eb0aff77c8 powerpc/85xx: Rename MPC8572 DDR erratum to DDR115
Use unique erratum number instead of platform number.
Enable command that reports errata on MPC8572DS.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-02-03 02:46:13 -06:00
York Sun
67f9447634 powerpc/85xx: Enable Errata command on MPC8572DS
Also removed duplicate CONFIG_CMD_IRQ define.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-02-03 02:46:13 -06:00
York Sun
e1df0de493 powerpc/85xx: Remove unnecessary polling loop from DDR init
This polling loop is not required normally, unless specifically stated in
workaround.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-02-03 02:46:12 -06:00
Kumar Gala
5103a03a0b fsl_esdhc: Add the workaround for erratum ESDHC-A001 (enable on P2020)
Data timeout counter (SYSCTL[DTOCV]) is not reliable for values of 4, 8,
and 12. Program one more than the desired value: 4 -> 5, 8 -> 9, 12 -> 13.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-02-03 02:46:12 -06:00
Kumar Gala
6e7f0bc0ce powerpc/85xx: Enable ESDHC111 Erratum on P2010/P2020 SoCs
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-02-03 02:46:12 -06:00
Nobuhiro Iwamatsu
e72f46787f sh: sh7785lcr: Fix out of tree building
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2011-02-03 16:54:19 +09:00
Alexander Holler
920a5dd232 NAND: Fix saving of redundand environment
When redundand environments are used the serial needs
to get increased, otherwise the old one will still be used.

Signed-off-by: Alexander Holler <holler@ahsoftware.de>
2011-02-02 16:14:08 -06:00
Yoshihiro Shimoda
9274b7b2ea change email address in MAINTAINERS
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2011-02-02 16:38:42 +09:00
Yoshihiro Shimoda
8e9c897b21 sh: add support for sh7757lcr board
The R0P7757LC0030RL board has SH7757, 256MB DDR3-SDRAM, SPI ROM,
Ethernet, and more.

This patch supports the following functions:
 - 256MB DDR3-SDRAM
 - SPI ROM
 - Ethernet

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2011-02-02 16:38:41 +09:00
Yoshihiro Shimoda
6639562e6a spi: add support SuperH SPI module
SH7757 has SPI module. This patch supports it.

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2011-02-02 16:38:41 +09:00
Yoshihiro Shimoda
68260aab93 net: sh_eth: add cache handling
Some CPU needs cache handling. So this patch add the config of
CONFIG_SH_ETHER_CACHE_WRITEBACK, and it calls wback function.

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2011-02-02 16:38:41 +09:00
Yoshihiro Shimoda
3d0075fa7a README: add description of sh_eth driver
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2011-02-02 16:38:41 +09:00
Yoshihiro Shimoda
36781e4897 sh: add support the CONFIG_SYS_LDSCRIPT
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2011-02-02 16:38:41 +09:00
Nobuhiro Iwamatsu
a8d954ba26 sh: Remove config.mk for shmin board
Move CONFIG_SYS_TEXT_BASE to the board's config file, and remove the
unnecessary config.mk file.

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2011-02-02 16:18:45 +09:00
Nobuhiro Iwamatsu
54fbf475cd sh: Remove config.mk for espt board
Move CONFIG_SYS_TEXT_BASE to the board's config file, and remove the
unnecessary config.mk file.

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2011-02-02 16:18:45 +09:00
Nobuhiro Iwamatsu
b825696251 sh: Remove config.mk for mpr2 board
Move CONFIG_SYS_TEXT_BASE to the board's config file, and remove the
unnecessary config.mk file.

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2011-02-02 16:18:45 +09:00
Nobuhiro Iwamatsu
da8241ba9d sh: Remove config.mk for ms7750se board
Move CONFIG_SYS_TEXT_BASE to the board's config file, and remove the
unnecessary config.mk file.

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2011-02-02 16:18:45 +09:00
Nobuhiro Iwamatsu
5c1877d682 sh: Remove config.mk for ms7722se board
Move CONFIG_SYS_TEXT_BASE to the board's config file, and remove the
unnecessary config.mk file.

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2011-02-02 16:18:45 +09:00
Nobuhiro Iwamatsu
46198754de sh: Remove config.mk for ms7720se board
Move CONFIG_SYS_TEXT_BASE to the board's config file, and remove the
unnecessary config.mk file.

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2011-02-02 16:18:45 +09:00
Nobuhiro Iwamatsu
59272c6bfc sh: Remove config.mk for sh7785lcr board
Move CONFIG_SYS_TEXT_BASE to the board's config file, and remove the
unnecessary config.mk file.

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2011-02-02 16:18:45 +09:00
Nobuhiro Iwamatsu
00cb2e3209 sh: Remove config.mk for sh7763rdp board
Move CONFIG_SYS_TEXT_BASE to the board's config file, and remove the
unnecessary config.mk file.

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2011-02-02 16:18:44 +09:00
Nobuhiro Iwamatsu
4f9a5b06f8 sh: Remove config.mk for rsk7203 board
Move CONFIG_SYS_TEXT_BASE to the board's config file, and remove the
unnecessary config.mk file.

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2011-02-02 16:18:44 +09:00
Nobuhiro Iwamatsu
913c8910bd sh: Remove config.mk for r7780mp board
Move CONFIG_SYS_TEXT_BASE to the board's config file, and remove the
unnecessary config.mk file.

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2011-02-02 16:18:44 +09:00
Nobuhiro Iwamatsu
653f985b89 sh: Remove config.mk for r2dplus board
Move CONFIG_SYS_TEXT_BASE to the board's config file, and remove the
unnecessary config.mk file.

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2011-02-02 16:18:44 +09:00
Nobuhiro Iwamatsu
db68b70364 sh: Remove config.mk for ap325rxa board
Move CONFIG_SYS_TEXT_BASE to the board's config file, and remove the
unnecessary config.mk file.

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2011-02-02 16:18:44 +09:00
Nobuhiro Iwamatsu
8cd7379ed5 sh: Remove config.mk for MigoR board
Move CONFIG_SYS_TEXT_BASE to the board's config file, and remove the
unnecessary config.mk file.

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2011-02-02 16:18:44 +09:00
1503 changed files with 59954 additions and 37542 deletions

8
.gitignore vendored
View File

@@ -13,6 +13,7 @@
*~
*.swp
*.patch
*.bin
#
# Top-level generic files
@@ -23,14 +24,15 @@
/u-boot.hex
/u-boot.imx
/u-boot.map
/u-boot.bin
/u-boot.srec
/u-boot.ldr
/u-boot.ldr.hex
/u-boot.ldr.srec
/u-boot.img
/u-boot.kwb
/u-boot.sha1
/u-boot.dis
/u-boot.lds
/u-boot-onenand.bin
/u-boot-flexonenand.bin
#
# Generated files

View File

@@ -146,6 +146,7 @@ Dirk Eibach <eibach@gdsys.de>
devconcenter PPC460EX
dlvision PPC405EP
dlvision-10g PPC405EP
gdppc440etx PPC440EP/GR
intip PPC460EX
io PPC405EP
@@ -301,6 +302,11 @@ Dan Malek <dan@embeddedalley.com>
stxssa MPC85xx
stxxtc MPC8xx
Ryan Mallon <ryan@bluewatersys.com>
snapper9260 ARM926EJS (AT91SAM9260 SoC)
snapper9g20 ARM926EJS (AT91SAM9G20 SoC)
Eran Man <eran@nbase.co.il>
EVB64260_750CX MPC750CX
@@ -426,12 +432,16 @@ Heiko Schocher <hs@denx.de>
ids8247 MPC8247
jupiter MPC5200
kmeter1 MPC8360
kmsupx5 MPC8321
mgcoge MPC8247
mgcoge3ne MPC8247
mucmc52 MPC5200
muas3001 MPC8270
municse MPC5200
sc3 PPC405GP
suen3 ARM926EJS (Kirkwood SoC)
suvd3 MPC8321
tuda1 MPC8321
tuxa1 MPC8321
uc101 MPC5200
ve8313 MPC8313
@@ -546,7 +556,7 @@ Unknown / orphaned boards:
# Board CPU #
#########################################################################
Albert ARIBAUD <albert.aribaud@free.fr>
Albert ARIBAUD <albert.u.boot@aribaud.net>
edminiv2 ARM926EJS (Orion5x SoC)
@@ -559,13 +569,14 @@ Stefano Babic <sbabic@denx.de>
ea20 davinci
mx35pdk i.MX35
mx51evk i.MX51
polaris xscale
trizepsiv xscale
polaris xscale/pxa
trizepsiv xscale/pxa
vision2 i.MX51
Jason Liu <r64343@freescale.com>
mx53evk i.MX53
mx53loco i.MX53
Enric Balletbo i Serra <eballetbo@iseebcn.com>
@@ -592,12 +603,16 @@ Andreas Bie
Cliff Brake <cliff.brake@gmail.com>
pxa255_idp xscale
pxa255_idp xscale/pxa
Rick Bronson <rick@efn.org>
AT91RM9200DK at91rm9200
Luca Ceresoli <luca.ceresoli@comelit.it>
dig297 ARM ARMV7 (OMAP3530 SoC)
Po-Yu Chuang <ratbert@faraday-tech.com>
a320evb FA526 (ARM920T-like) (a320 SoC)
@@ -623,13 +638,10 @@ Kristoffer Ericson <kristoffer.ericson@gmail.com>
jornada SA1110
Fabio Estevam <Fabio.Estevam@freescale.com>
Fabio Estevam <fabio.estevam@freescale.com>
mx31pdk i.MX31
Peter Figuli <peposh@etc.sk>
wepep250 xscale
mx53smd i.MX53
Daniel Gorsulowski <daniel.gorsulowski@esd.eu>
@@ -645,6 +657,10 @@ Marius Gr
impa7 ARM720T (EP7211)
ep7312 ARM720T (EP7312)
Igor Grinberg <grinberg@compulab.co.il>
cm-t35 ARM ARMV7 (OMAP3xx Soc)
Kshitij Gupta <kshitij@ti.com>
omap1510inn ARM925T
@@ -661,7 +677,6 @@ Grazvydas Ignotas <notasas@gmail.com>
Gary Jennejohn <garyj@denx.de>
smdk2400 ARM920T
trab ARM920T
Matthias Kaehlcke <matthias@kaehlcke.net>
edb9301 ARM920T (EP9301)
@@ -686,6 +701,10 @@ Minkyu Kang <mk7.kang@samsung.com>
s5p_goni ARM ARMV7 (S5PC110 SoC)
s5pc210_universal ARM ARMV7 (S5PC210 SoC)
Chander Kashyap <k.chander@samsung.com>
SMDKV310 ARM ARMV7 (S5PC210 SoC)
Frederik Kriewitz <frederik@kriewitz.eu>
devkit8000 ARM ARMV7 (OMAP3530 SoC)
@@ -698,7 +717,7 @@ Sergey Kubushyn <ksi@koi8.net>
Prakash Kumar <prakash@embedx.com>
cerf250 xscale
cerf250 xscale/pxa
Vipin Kumar <vipin.kumar@st.com>
@@ -725,6 +744,10 @@ Eric Millbrandt <emillbrandt@dekaresearch.com>
galaxy5200 mpc5200
Nagendra T S <nagendra@mistralsolutions.com>
am3517_crane ARM ARMV7 (AM35x SoC)
Rolf Offermanns <rof@sysgo.de>
shannon SA1100
@@ -762,10 +785,6 @@ Stelian Pop <stelian.pop@leadtechdesign.com>
at91sam9263ek ARM926EJS (AT91SAM9263 SoC)
at91sam9rlek ARM926EJS (AT91SAM9RL SoC)
Mike Rapoport <mike@compulab.co.il>
cm_t35 ARM ARMV7 (OMAP3xx SoC)
Tom Rix <Tom.Rix@windriver.com>
omap3_zoom2 ARM ARMV7 (OMAP3xx SoC)
@@ -776,9 +795,9 @@ John Rigby <jcrigby@gmail.com>
Stefan Roese <sr@denx.de>
ixdpg425 xscale
pdnb3 xscale
scpu xscale
ixdpg425 xscale/ixp
pdnb3 xscale/ixp
scpu xscale/ixp
Alessandro Rubini <rubini@unipv.it>
Nomadik Linux Team <STN_WMM_nomadik_linux@list.st.com>
@@ -798,18 +817,22 @@ Jens Scharsig <esw@bus-elektronik.de>
Heiko Schocher <hs@denx.de>
magnesium i.MX27
mgcoge3un ARM926EJS (Kirkwood SoC)
suen3 ARM926EJS (Kirkwood SoC)
suen8 ARM926EJS (Kirkwood SoC)
Robert Schwebel <r.schwebel@pengutronix.de>
csb226 xscale
innokom xscale
csb226 xscale/pxa
innokom xscale/pxa
Michael Schwingen <michael@schwingen.org>
actux1 xscale
actux2 xscale
actux3 xscale
actux4 xscale
actux1 xscale/ixp
actux2 xscale/ixp
actux3 xscale/ixp
actux4 xscale/ixp
dvlhost xscale/ixp
Andrea Scian <andrea.scian@dave-tech.it>
@@ -833,12 +856,12 @@ Greg Ungerer <greg.ungerer@opengear.com>
Marek Vasut <marek.vasut@gmail.com>
balloon3 xscale
colibri_pxa270 xscale
palmld xscale
palmtc xscale
vpac270 xscale
zipitz2 xscale
balloon3 xscale/pxa
colibri_pxa270 xscale/pxa
palmld xscale/pxa
palmtc xscale/pxa
vpac270 xscale/pxa
zipitz2 xscale/pxa
efikamx i.MX51
Hugo Villeneuve <hugo.villeneuve@lyrtech.com>
@@ -857,6 +880,15 @@ Prafulla Wadaskar <prafulla@marvell.com>
rd6281a ARM926EJS (Kirkwood SoC)
sheevaplug ARM926EJS (Kirkwood SoC)
Tom Warren <twarren@nvidia.com>
harmony Tegra2 (ARM7 & A9 Dual Core)
seaboard Tegra2 (ARM7 & A9 Dual Core)
Lei Wen <leiwen@marvell.com>
dkb ARM926EJS (PANTHEON 88AP920 SOC)
Matthias Weisser <weisserm@arcor.de>
jadecpu ARM926EJS (MB86R01 SoC)
@@ -880,9 +912,9 @@ Sughosh Ganu <urwithsughosh@gmail.com>
Unknown / orphaned boards:
Board CPU Last known maintainer / Comment
.........................................................................
cradle xscale Kyle Harris <kharris@nexus-tech.net> / dead address
ixdp425 xscale Kyle Harris <kharris@nexus-tech.net> / dead address
lubbock xscale Kyle Harris <kharris@nexus-tech.net> / dead address
cradle xscale/pxa Kyle Harris <kharris@nexus-tech.net> / dead address
ixdp425 xscale/ixp Kyle Harris <kharris@nexus-tech.net> / dead address
lubbock xscale/pxa Kyle Harris <kharris@nexus-tech.net> / dead address
imx31_phycore_eet i.MX31 Guennadi Liakhovetski <g.liakhovetski@gmx.de> / resigned
mx31ads i.MX31 Guennadi Liakhovetski <g.liakhovetski@gmx.de> / resigned
@@ -895,9 +927,9 @@ Unknown / orphaned boards:
# Board CPU #
#########################################################################
Daniel Engström <daniel@omicron.se>
Graeme Russ <graeme.russ@gmail.com>
sc520_cdp x86
eNET AMD SC520
#########################################################################
# MIPS Systems: #
@@ -909,7 +941,6 @@ Daniel Engstr
Wolfgang Denk <wd@denx.de>
incaip MIPS32 4Kc
purple MIPS64 5Kc
Thomas Lange <thomas@corelatus.se>
dbau1x00 MIPS32 Au1000
@@ -1036,6 +1067,7 @@ Mark Jonas <mark.jonas@de.bosch.com>
Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
MS7720SE SH7720
R0P77570030RL SH7757
R0P77850011RL SH7785
#########################################################################
@@ -1048,6 +1080,7 @@ Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Mike Frysinger <vapier@gentoo.org>
Blackfin Team <u-boot-devel@blackfin.uclinux.org>
BF506F-EZKIT BF506
BF518F-EZBRD BF518
BF526-EZBRD BF526
BF527-AD7160-EVAL BF527
@@ -1062,6 +1095,10 @@ Blackfin Team <u-boot-devel@blackfin.uclinux.org>
BF548-EZKIT BF548
BF561-EZKIT BF561
M.Hasewinkel (MHA) <info@ssv-embedded.de>
dnp5370 BF537
Brent Kandetzki <brentk@teleco.com>
IP04 BF532
@@ -1102,6 +1139,11 @@ Anton Shurpin <shurpin.aa@niistt.ru>
BF561-ACVILON BF561
Haitao Zhang <hzhang@ucrobotics.com>
Chong Huang <chuang@ucrobotics.com>
bf525-ucr2 BF525
#########################################################################
# End of MAINTAINERS list #
#########################################################################

16
MAKEALL
View File

@@ -361,6 +361,8 @@ LIST_ARM9=" \
omap5912osk \
omap730p2 \
openrd_base \
openrd_client \
openrd_ultimate \
rd6281a \
sbc2410x \
scb9328 \
@@ -372,7 +374,6 @@ LIST_ARM9=" \
spear320 \
spear600 \
suen3 \
trab \
VCMA9 \
versatile \
versatileab \
@@ -418,9 +419,11 @@ LIST_ARM11=" \
## ARMV7 Systems
#########################################################################
LIST_ARMV7=" \
am3517_crane \
am3517_evm \
ca9x4_ct_vxp \
devkit8000 \
dig297 \
igep0020 \
igep0030 \
mx51evk \
@@ -450,9 +453,6 @@ LIST_at91="$(boards_by_soc at91)\
at91sam9g20ek \
at91sam9m10g45ek \
at91sam9rlek \
CPUAT91 \
CPU9260 \
CPU9G20 \
pm9g45 \
SBC35_A9G20 \
TNY_A9260 \
@@ -507,9 +507,7 @@ LIST_mips4kc=" \
vct_premium_onenand_small \
"
LIST_mips5kc=" \
purple \
"
LIST_mips5kc=""
LIST_au1xx0=" \
dbau1000 \
@@ -546,10 +544,10 @@ LIST_mips_el=" \
"
#########################################################################
## i386 Systems
## x86 Systems
#########################################################################
LIST_x86="$(boards_by_arch i386)"
LIST_x86="$(boards_by_arch x86)"
#########################################################################
## Nios-II Systems

295
Makefile
View File

@@ -1,5 +1,5 @@
#
# (C) Copyright 2000-2010
# (C) Copyright 2000-2011
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# See file CREDITS for list of people who contributed to this
@@ -22,9 +22,9 @@
#
VERSION = 2011
PATCHLEVEL = 03
PATCHLEVEL = 06
SUBLEVEL =
EXTRAVERSION = -rc1
EXTRAVERSION =
ifneq "$(SUBLEVEL)" ""
U_BOOT_VERSION = $(VERSION).$(PATCHLEVEL).$(SUBLEVEL)$(EXTRAVERSION)
else
@@ -34,7 +34,7 @@ TIMESTAMP_FILE = $(obj)include/timestamp_autogenerated.h
VERSION_FILE = $(obj)include/version_autogenerated.h
HOSTARCH := $(shell uname -m | \
sed -e s/i.86/i386/ \
sed -e s/i.86/x86/ \
-e s/sun4u/sparc64/ \
-e s/arm.*/arm/ \
-e s/sa110/arm/ \
@@ -140,7 +140,7 @@ SUBDIRS = tools \
examples/standalone \
examples/api
.PHONY : $(SUBDIRS)
.PHONY : $(SUBDIRS) $(VERSION_FILE)
ifeq ($(obj)include/config.mk,$(wildcard $(obj)include/config.mk))
@@ -163,11 +163,41 @@ endif
# load other configuration
include $(TOPDIR)/config.mk
# If board code explicitly specified LDSCRIPT or CONFIG_SYS_LDSCRIPT, use
# that (or fail if absent). Otherwise, search for a linker script in a
# standard location.
ifndef LDSCRIPT
#LDSCRIPT := $(TOPDIR)/board/$(BOARDDIR)/u-boot.lds.debug
ifdef CONFIG_SYS_LDSCRIPT
# need to strip off double quotes
LDSCRIPT := $(subst ",,$(CONFIG_SYS_LDSCRIPT))
endif
endif
ifndef LDSCRIPT
ifeq ($(CONFIG_NAND_U_BOOT),y)
LDSCRIPT := $(TOPDIR)/board/$(BOARDDIR)/u-boot-nand.lds
ifeq ($(wildcard $(LDSCRIPT)),)
LDSCRIPT := $(TOPDIR)/$(CPUDIR)/u-boot-nand.lds
endif
endif
ifeq ($(wildcard $(LDSCRIPT)),)
LDSCRIPT := $(TOPDIR)/board/$(BOARDDIR)/u-boot.lds
endif
ifeq ($(wildcard $(LDSCRIPT)),)
LDSCRIPT := $(TOPDIR)/$(CPUDIR)/u-boot.lds
endif
ifeq ($(wildcard $(LDSCRIPT)),)
$(error could not find linker script)
endif
endif
#########################################################################
# U-Boot objects....order is important (i.e. start must be first)
OBJS = $(CPUDIR)/start.o
ifeq ($(CPU),i386)
ifeq ($(CPU),x86)
OBJS += $(CPUDIR)/start16.o
OBJS += $(CPUDIR)/resetvec.o
endif
@@ -183,6 +213,7 @@ OBJS := $(addprefix $(obj),$(OBJS))
LIBS = lib/libgeneric.o
LIBS += lib/lzma/liblzma.o
LIBS += lib/lzo/liblzo.o
LIBS += lib/zlib/libz.o
LIBS += $(shell if [ -f board/$(VENDOR)/common/Makefile ]; then echo \
"board/$(VENDOR)/common/lib$(VENDOR).o"; fi)
LIBS += $(CPUDIR)/lib$(CPU).o
@@ -235,6 +266,7 @@ endif
LIBS += drivers/rtc/librtc.o
LIBS += drivers/serial/libserial.o
LIBS += drivers/twserial/libtws.o
LIBS += drivers/usb/eth/libusb_eth.o
LIBS += drivers/usb/gadget/libusb_gadget.o
LIBS += drivers/usb/host/libusb_host.o
LIBS += drivers/usb/musb/libusb_musb.o
@@ -261,7 +293,7 @@ LIBS += $(CPUDIR)/s5p-common/libs5p-common.o
endif
LIBS := $(addprefix $(obj),$(sort $(LIBS)))
.PHONY : $(LIBS) $(TIMESTAMP_FILE) $(VERSION_FILE)
.PHONY : $(LIBS) $(TIMESTAMP_FILE)
LIBBOARD = board/$(BOARDDIR)/lib$(BOARD).o
LIBBOARD := $(addprefix $(obj),$(LIBBOARD))
@@ -287,17 +319,6 @@ LDPPFLAGS += \
$(shell $(LD) --version | \
sed -ne 's/GNU ld version \([0-9][0-9]*\)\.\([0-9][0-9]*\).*/-DLD_MAJOR=\1 -DLD_MINOR=\2/p')
ifeq ($(CONFIG_NAND_U_BOOT),y)
NAND_SPL = nand_spl
U_BOOT_NAND = $(obj)u-boot-nand.bin
endif
ifeq ($(CONFIG_ONENAND_U_BOOT),y)
ONENAND_IPL = onenand_ipl
U_BOOT_ONENAND = $(obj)u-boot-onenand.bin
ONENAND_BIN ?= $(obj)onenand_ipl/onenand-ipl-2k.bin
endif
__OBJS := $(subst $(obj),,$(OBJS))
__LIBS := $(subst $(obj),,$(LIBS)) $(subst $(obj),,$(LIBBOARD))
@@ -320,7 +341,20 @@ BOARD_SIZE_CHECK =
endif
# Always append ALL so that arch config.mk's can add custom ones
ALL += $(obj)u-boot.srec $(obj)u-boot.bin $(obj)System.map $(U_BOOT_NAND) $(U_BOOT_ONENAND)
ALL += $(obj)u-boot.srec $(obj)u-boot.bin $(obj)System.map
ifeq ($(CONFIG_NAND_U_BOOT),y)
ALL += $(obj)u-boot-nand.bin
endif
ifeq ($(CONFIG_ONENAND_U_BOOT),y)
ALL += $(obj)u-boot-onenand.bin
ONENAND_BIN ?= $(obj)onenand_ipl/onenand-ipl-2k.bin
endif
ifeq ($(CONFIG_MMC_U_BOOT),y)
ALL += $(obj)mmc_spl/u-boot-mmc-spl.bin
endif
all: $(ALL)
@@ -353,7 +387,7 @@ $(obj)u-boot.img: $(obj)u-boot.bin
-d $< $@
$(obj)u-boot.imx: $(obj)u-boot.bin
$(obj)tools/mkimage -n $(IMX_CONFIG) -T imximage \
$(obj)tools/mkimage -n $(CONFIG_IMX_CONFIG) -T imximage \
-e $(CONFIG_SYS_TEXT_BASE) -d $< $@
$(obj)u-boot.kwb: $(obj)u-boot.bin
@@ -401,26 +435,22 @@ $(LDSCRIPT): depend
$(obj)u-boot.lds: $(LDSCRIPT)
$(CPP) $(CPPFLAGS) $(LDPPFLAGS) -ansi -D__ASSEMBLY__ -P - <$^ >$@
$(NAND_SPL): $(TIMESTAMP_FILE) $(VERSION_FILE) depend
nand_spl: $(TIMESTAMP_FILE) $(VERSION_FILE) depend
$(MAKE) -C nand_spl/board/$(BOARDDIR) all
$(U_BOOT_NAND): $(NAND_SPL) $(obj)u-boot.bin
$(obj)u-boot-nand.bin: nand_spl $(obj)u-boot.bin
cat $(obj)nand_spl/u-boot-spl-16k.bin $(obj)u-boot.bin > $(obj)u-boot-nand.bin
$(ONENAND_IPL): $(TIMESTAMP_FILE) $(VERSION_FILE) $(obj)include/autoconf.mk
onenand_ipl: $(TIMESTAMP_FILE) $(VERSION_FILE) $(obj)include/autoconf.mk
$(MAKE) -C onenand_ipl/board/$(BOARDDIR) all
$(U_BOOT_ONENAND): $(ONENAND_IPL) $(obj)u-boot.bin
$(obj)u-boot-onenand.bin: onenand_ipl $(obj)u-boot.bin
cat $(ONENAND_BIN) $(obj)u-boot.bin > $(obj)u-boot-onenand.bin
$(VERSION_FILE):
@( printf '#define U_BOOT_VERSION "U-Boot %s%s"\n' "$(U_BOOT_VERSION)" \
'$(shell $(TOPDIR)/tools/setlocalversion $(TOPDIR))' ) > $@.tmp
@( printf '#define CC_VERSION_STRING "%s"\n' \
'$(shell $(CC) --version | head -n 1)' )>> $@.tmp
@( printf '#define LD_VERSION_STRING "%s"\n' \
'$(shell $(LD) -v | head -n 1)' )>> $@.tmp
@cmp -s $@ $@.tmp && rm -f $@.tmp || mv -f $@.tmp $@
mmc_spl: $(TIMESTAMP_FILE) $(VERSION_FILE) depend
$(MAKE) -C mmc_spl/board/$(BOARDDIR) all
$(obj)mmc_spl/u-boot-mmc-spl.bin: mmc_spl
$(TIMESTAMP_FILE):
@LC_ALL=C date +'#define U_BOOT_DATE "%b %d %C%y"' > $@
@@ -496,20 +526,33 @@ $(obj)lib/asm-offsets.s: $(obj)include/autoconf.mk.dep \
else # !config.mk
all $(obj)u-boot.hex $(obj)u-boot.srec $(obj)u-boot.bin \
$(obj)u-boot.img $(obj)u-boot.dis $(obj)u-boot \
$(filter-out tools,$(SUBDIRS)) $(TIMESTAMP_FILE) $(VERSION_FILE) \
$(filter-out tools,$(SUBDIRS)) $(TIMESTAMP_FILE) \
updater depend dep tags ctags etags cscope $(obj)System.map:
@echo "System not configured - see README" >&2
@ exit 1
tools:
tools: $(VERSION_FILE)
$(MAKE) -C $@ all
endif # config.mk
$(VERSION_FILE):
@( localvers='$(shell $(TOPDIR)/tools/setlocalversion $(TOPDIR))' ; \
printf '#define PLAIN_VERSION "%s%s"\n' \
"$(U_BOOT_VERSION)" "$${localvers}" ; \
printf '#define U_BOOT_VERSION "U-Boot %s%s"\n' \
"$(U_BOOT_VERSION)" "$${localvers}" ; \
) > $@.tmp
@( printf '#define CC_VERSION_STRING "%s"\n' \
'$(shell $(CC) --version | head -n 1)' )>> $@.tmp
@( printf '#define LD_VERSION_STRING "%s"\n' \
'$(shell $(LD) -v | head -n 1)' )>> $@.tmp
@cmp -s $@ $@.tmp && rm -f $@.tmp || mv -f $@.tmp $@
easylogo env gdb:
$(MAKE) -C tools/$@ all MTD_VERSION=${MTD_VERSION}
gdbtools: gdb
tools-all: easylogo env gdb
tools-all: easylogo env gdb $(VERSION_FILE)
$(MAKE) -C tools HOST_TOOLS_ALL=y
.PHONY : CHANGELOG
@@ -749,57 +792,10 @@ M5485HFE_config : unconfig
# ARM
#========================================================================
#########################################################################
## Atmel AT91RM9200 Systems
#########################################################################
CPUAT91_RAM_config \
CPUAT91_config : unconfig
@mkdir -p $(obj)include
@echo "#define CONFIG_$(@:_config=) 1" >$(obj)include/config.h
@$(MKCONFIG) -n $@ -a cpuat91 arm arm920t cpuat91 eukrea at91
#########################################################################
## ARM926EJ-S Systems
#########################################################################
at91sam9260ek_nandflash_config \
at91sam9260ek_dataflash_cs0_config \
at91sam9260ek_dataflash_cs1_config \
at91sam9260ek_config \
at91sam9g20ek_nandflash_config \
at91sam9g20ek_dataflash_cs0_config \
at91sam9g20ek_dataflash_cs1_config \
at91sam9g20ek_config : unconfig
@mkdir -p $(obj)include
@if [ "$(findstring 9g20,$@)" ] ; then \
echo "#define CONFIG_AT91SAM9G20EK 1" >>$(obj)include/config.h ; \
else \
echo "#define CONFIG_AT91SAM9260EK 1" >>$(obj)include/config.h ; \
fi;
@if [ "$(findstring _nandflash,$@)" ] ; then \
echo "#define CONFIG_SYS_USE_NANDFLASH 1" >>$(obj)include/config.h ; \
elif [ "$(findstring dataflash_cs0,$@)" ] ; then \
echo "#define CONFIG_SYS_USE_DATAFLASH_CS0 1" >>$(obj)include/config.h ; \
else \
echo "#define CONFIG_SYS_USE_DATAFLASH_CS1 1" >>$(obj)include/config.h ; \
fi;
@$(MKCONFIG) -n $@ -a at91sam9260ek arm arm926ejs at91sam9260ek atmel at91
at91sam9xeek_nandflash_config \
at91sam9xeek_dataflash_cs0_config \
at91sam9xeek_dataflash_cs1_config \
at91sam9xeek_config : unconfig
@mkdir -p $(obj)include
@if [ "$(findstring _nandflash,$@)" ] ; then \
echo "#define CONFIG_SYS_USE_NANDFLASH 1" >>$(obj)include/config.h ; \
elif [ "$(findstring dataflash_cs0,$@)" ] ; then \
echo "#define CONFIG_SYS_USE_DATAFLASH_CS0 1" >>$(obj)include/config.h ; \
else \
echo "#define CONFIG_SYS_USE_DATAFLASH_CS1 1" >>$(obj)include/config.h ; \
fi;
@$(MKCONFIG) -n $@ -a at91sam9260ek arm arm926ejs at91sam9260ek atmel at91
at91sam9261ek_nandflash_config \
at91sam9261ek_dataflash_cs0_config \
at91sam9261ek_dataflash_cs3_config \
@@ -854,14 +850,6 @@ at91sam9rlek_config : unconfig
fi;
@$(MKCONFIG) -n $@ -a at91sam9rlek arm arm926ejs at91sam9rlek atmel at91
CPU9G20_128M_config \
CPU9G20_config \
CPU9260_128M_config \
CPU9260_config : unconfig
@mkdir -p $(obj)include
@echo "#define CONFIG_$(@:_config=) 1" >$(obj)include/config.h
@$(MKCONFIG) -n $@ -a cpu9260 arm arm926ejs cpu9260 eukrea at91
at91sam9m10g45ek_nandflash_config \
at91sam9m10g45ek_dataflash_config \
at91sam9m10g45ek_dataflash_cs0_config \
@@ -930,15 +918,6 @@ cp922_XA10_config \
cp1026_config: unconfig
@board/armltd/integrator/split_by_variant.sh cp $@
nhk8815_config \
nhk8815_onenand_config: unconfig
@mkdir -p $(obj)include
@ > $(obj)include/config.h
@if [ "$(findstring _onenand, $@)" ] ; then \
echo "#define CONFIG_BOOT_ONENAND" >> $(obj)include/config.h; \
fi
@$(MKCONFIG) -n $@ -a nhk8815 arm arm926ejs nhk8815 st nomadik
xtract_omap1610xxx = $(subst _cs0boot,,$(subst _cs3boot,,$(subst _cs_autoboot,,$(subst _config,,$1))))
omap1610inn_config \
@@ -988,29 +967,6 @@ SX1_config: unconfig
fi;
@$(MKCONFIG) -n $@ SX1 arm arm925t sx1
# TRAB default configuration: 8 MB Flash, 32 MB RAM
trab_config \
trab_bigram_config \
trab_bigflash_config \
trab_old_config: unconfig
@mkdir -p $(obj)include
@mkdir -p $(obj)board/trab
@[ -z "$(findstring _bigram,$@)" ] || \
{ echo "#define CONFIG_FLASH_8MB" >>$(obj)include/config.h ; \
echo "#define CONFIG_RAM_32MB" >>$(obj)include/config.h ; \
}
@[ -z "$(findstring _bigflash,$@)" ] || \
{ echo "#define CONFIG_FLASH_16MB" >>$(obj)include/config.h ; \
echo "#define CONFIG_RAM_16MB" >>$(obj)include/config.h ; \
echo "CONFIG_SYS_TEXT_BASE = 0x0CF40000" >$(obj)board/trab/config.tmp ; \
}
@[ -z "$(findstring _old,$@)" ] || \
{ echo "#define CONFIG_FLASH_8MB" >>$(obj)include/config.h ; \
echo "#define CONFIG_RAM_16MB" >>$(obj)include/config.h ; \
echo "CONFIG_SYS_TEXT_BASE = 0x0CF40000" >$(obj)board/trab/config.tmp ; \
}
@$(MKCONFIG) -n $@ -a trab arm arm920t trab - s3c24x0
tx25_config : unconfig
@echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk
@$(MKCONFIG) $@ arm arm926ejs tx25 karo mx25
@@ -1091,95 +1047,6 @@ smdk6400_config : unconfig
@$(MKCONFIG) smdk6400 arm arm1176 smdk6400 samsung s3c64xx
@echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk
#========================================================================
# MIPS
#========================================================================
#########################################################################
## MIPS32 4Kc
#########################################################################
incaip_100MHz_config \
incaip_133MHz_config \
incaip_150MHz_config \
incaip_config: unconfig
@mkdir -p $(obj)include
@[ -z "$(findstring _100MHz,$@)" ] || \
echo "#define CPU_CLOCK_RATE 100000000" >>$(obj)include/config.h
@[ -z "$(findstring _133MHz,$@)" ] || \
echo "#define CPU_CLOCK_RATE 133000000" >>$(obj)include/config.h
@[ -z "$(findstring _150MHz,$@)" ] || \
echo "#define CPU_CLOCK_RATE 150000000" >>$(obj)include/config.h
@$(MKCONFIG) -n $@ -a incaip mips mips incaip
vct_premium_config \
vct_premium_small_config \
vct_premium_onenand_config \
vct_premium_onenand_small_config \
vct_platinum_config \
vct_platinum_small_config \
vct_platinum_onenand_config \
vct_platinum_onenand_small_config \
vct_platinumavc_config \
vct_platinumavc_small_config \
vct_platinumavc_onenand_config \
vct_platinumavc_onenand_small_config: unconfig
@mkdir -p $(obj)include
@[ -z "$(findstring _premium,$@)" ] || \
echo "#define CONFIG_VCT_PREMIUM" > $(obj)include/config.h
@[ -z "$(findstring _platinum_,$@)" ] || \
echo "#define CONFIG_VCT_PLATINUM" > $(obj)include/config.h
@[ -z "$(findstring _platinumavc,$@)" ] || \
echo "#define CONFIG_VCT_PLATINUMAVC" > $(obj)include/config.h
@[ -z "$(findstring _onenand,$@)" ] || \
echo "#define CONFIG_VCT_ONENAND" >> $(obj)include/config.h
@[ -z "$(findstring _small,$@)" ] || \
echo "#define CONFIG_VCT_SMALL_IMAGE" >> $(obj)include/config.h
@$(MKCONFIG) -n $@ -a vct mips mips vct micronas
#########################################################################
## MIPS32 AU1X00
#########################################################################
dbau1000_config : unconfig
@mkdir -p $(obj)include
@echo "#define CONFIG_DBAU1000 1" >$(obj)include/config.h
@$(MKCONFIG) -a dbau1x00 mips mips dbau1x00
dbau1100_config : unconfig
@mkdir -p $(obj)include
@echo "#define CONFIG_DBAU1100 1" >$(obj)include/config.h
@$(MKCONFIG) -a dbau1x00 mips mips dbau1x00
dbau1500_config : unconfig
@mkdir -p $(obj)include
@echo "#define CONFIG_DBAU1500 1" >$(obj)include/config.h
@$(MKCONFIG) -a dbau1x00 mips mips dbau1x00
dbau1550_config : unconfig
@mkdir -p $(obj)include
@echo "#define CONFIG_DBAU1550 1" >$(obj)include/config.h
@$(MKCONFIG) -a dbau1x00 mips mips dbau1x00
dbau1550_el_config : unconfig
@mkdir -p $(obj)include
@echo "#define CONFIG_DBAU1550 1" >$(obj)include/config.h
@$(MKCONFIG) -a dbau1x00 mips mips dbau1x00
gth2_config : unconfig
@mkdir -p $(obj)include
@echo "#define CONFIG_GTH2 1" >$(obj)include/config.h
@$(MKCONFIG) -a $@ mips mips gth2
pb1000_config : unconfig
@mkdir -p $(obj)include
@echo "#define CONFIG_PB1000 1" >$(obj)include/config.h
@$(MKCONFIG) -a pb1x00 mips mips pb1x00
qemu_mips_config : unconfig
@mkdir -p $(obj)include
@echo "#define CONFIG_QEMU_MIPS 1" >$(obj)include/config.h
@$(MKCONFIG) -a qemu-mips mips mips qemu-mips
#========================================================================
# Nios
#========================================================================
@@ -1205,7 +1072,7 @@ clean:
$(obj)examples/standalone/interrupt \
$(obj)examples/standalone/mem_to_mem_idma2intr \
$(obj)examples/standalone/sched \
$(obj)examples/standalone/smc91111_eeprom \
$(obj)examples/standalone/smc911{11,x}_eeprom \
$(obj)examples/standalone/test_burst \
$(obj)examples/standalone/timer
@rm -f $(obj)examples/api/demo{,.bin}
@@ -1219,7 +1086,7 @@ clean:
@rm -f $(obj)board/cray/L1/{bootscript.c,bootscript.image} \
$(obj)board/matrix_vision/*/bootscript.img \
$(obj)board/netstar/{eeprom,crcek,crcit,*.srec,*.bin} \
$(obj)board/trab/trab_fkt $(obj)board/voiceblue/eeprom \
$(obj)board/voiceblue/eeprom \
$(obj)board/armltd/{integratorap,integratorcp}/u-boot.lds \
$(obj)u-boot.lds \
$(obj)arch/blackfin/cpu/bootrom-asm-offsets.[chs]
@@ -1227,6 +1094,7 @@ clean:
@rm -f $(obj)lib/asm-offsets.s
@rm -f $(obj)nand_spl/{u-boot.lds,u-boot-spl,u-boot-spl.map,System.map}
@rm -f $(obj)onenand_ipl/onenand-{ipl,ipl.bin,ipl.map}
@rm -f $(obj)mmc_spl/{u-boot.lds,u-boot-spl,u-boot-spl.map,u-boot-spl.bin,u-boot-mmc-spl.bin}
@rm -f $(ONENAND_BIN)
@rm -f $(obj)onenand_ipl/u-boot.lds
@rm -f $(TIMESTAMP_FILE) $(VERSION_FILE)
@@ -1251,6 +1119,7 @@ clobber: clean
@rm -fr $(obj)include/generated
@[ ! -d $(obj)nand_spl ] || find $(obj)nand_spl -name "*" -type l -print | xargs rm -f
@[ ! -d $(obj)onenand_ipl ] || find $(obj)onenand_ipl -name "*" -type l -print | xargs rm -f
@[ ! -d $(obj)mmc_spl ] || find $(obj)mmc_spl -name "*" -type l -print | xargs rm -f
ifeq ($(OBJTREE),$(SRCTREE))
mrproper \

149
README
View File

@@ -1,5 +1,5 @@
#
# (C) Copyright 2000 - 2009
# (C) Copyright 2000 - 2011
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# See file CREDITS for list of people who contributed to this
@@ -164,7 +164,7 @@ Directory Hierarchy:
/blackfin Files generic to Analog Devices Blackfin architecture
/cpu CPU specific files
/lib Architecture specific library files
/i386 Files generic to i386 architecture
/x86 Files generic to x86 architecture
/cpu CPU specific files
/lib Architecture specific library files
/m68k Files generic to m68k architecture
@@ -319,6 +319,11 @@ The following options need to be configured:
CONFIG_SYS_PQ2FADS - PQ2FADS-ZU or PQ2FADS-VR
CONFIG_SYS_8272ADS - MPC8272ADS
- Marvell Family Member
CONFIG_SYS_MVFS - define it if you want to enable
multiple fs option at one time
for marvell soc family
- MPC824X Family Member (if CONFIG_MPC824X is defined)
Define exactly one of
CONFIG_MPC8240, CONFIG_MPC8245
@@ -351,6 +356,18 @@ The following options need to be configured:
Define this option if you want to enable the
ICache only when Code runs from RAM.
- 85xx CPU Options:
CONFIG_SYS_FSL_TBCLK_DIV
Defines the core time base clock divider ratio compared to the
system clock. On most PQ3 devices this is 8, on newer QorIQ
devices it can be 16 or 32. The ratio varies from SoC to Soc.
CONFIG_SYS_FSL_PCIE_COMPAT
Defines the string to utilize when trying to match PCIe device
tree nodes for the given platform.
- Intel Monahans options:
CONFIG_SYS_MONAHANS_RUN_MODE_OSC_RATIO
@@ -463,6 +480,18 @@ The following options need to be configured:
define this to a list of base addresses for each (supported)
port. See e.g. include/configs/versatile.h
CONFIG_PL011_SERIAL_RLCR
Some vendor versions of PL011 serial ports (e.g. ST-Ericsson U8500)
have separate receive and transmit line control registers. Set
this variable to initialize the extra register.
CONFIG_PL011_SERIAL_FLUSH_ON_INIT
On some platforms (e.g. U8500) U-Boot is loaded by a second stage
boot loader that has already initialized the UART. Define this
variable to flush the UART at init time.
- Console Interface:
Depending on board, define exactly one serial port
@@ -620,6 +649,7 @@ The following options need to be configured:
CONFIG_CMD_BOOTD bootd
CONFIG_CMD_CACHE * icache, dcache
CONFIG_CMD_CONSOLE coninfo
CONFIG_CMD_CRC32 * crc32
CONFIG_CMD_DATE * support for RTC, date/time...
CONFIG_CMD_DHCP * DHCP support
CONFIG_CMD_DIAG * Diagnostics
@@ -632,22 +662,27 @@ The following options need to be configured:
CONFIG_CMD_EDITENV edit env variable
CONFIG_CMD_EEPROM * EEPROM read/write support
CONFIG_CMD_ELF * bootelf, bootvx
CONFIG_CMD_EXPORTENV * export the environment
CONFIG_CMD_SAVEENV saveenv
CONFIG_CMD_FDC * Floppy Disk Support
CONFIG_CMD_FAT * FAT partition support
CONFIG_CMD_FDOS * Dos diskette Support
CONFIG_CMD_FLASH flinfo, erase, protect
CONFIG_CMD_FPGA FPGA device initialization support
CONFIG_CMD_GO * the 'go' command (exec code)
CONFIG_CMD_GREPENV * search environment
CONFIG_CMD_HWFLOW * RTS/CTS hw flow control
CONFIG_CMD_I2C * I2C serial bus support
CONFIG_CMD_IDE * IDE harddisk support
CONFIG_CMD_IMI iminfo
CONFIG_CMD_IMLS List all found images
CONFIG_CMD_IMMAP * IMMR dump support
CONFIG_CMD_IMPORTENV * import an environment
CONFIG_CMD_IRQ * irqinfo
CONFIG_CMD_ITEST Integer/string test of 2 values
CONFIG_CMD_JFFS2 * JFFS2 Support
CONFIG_CMD_KGDB * kgdb
CONFIG_CMD_LDRINFO ldrinfo (display Blackfin loader)
CONFIG_CMD_LOADB loadb
CONFIG_CMD_LOADS loads
CONFIG_CMD_MD5SUM print md5 message digest
@@ -679,8 +714,8 @@ The following options need to be configured:
(requires CONFIG_CMD_MEMORY)
CONFIG_CMD_SOURCE "source" command Support
CONFIG_CMD_SPI * SPI serial bus support
CONFIG_CMD_TFTPSRV * TFTP transfer in server mode
CONFIG_CMD_USB * USB support
CONFIG_CMD_VFD * VFD support (TRAB)
CONFIG_CMD_CDP * Cisco Discover Protocol support
CONFIG_CMD_FSL * Microblaze FSL support
@@ -709,10 +744,17 @@ The following options need to be configured:
- Watchdog:
CONFIG_WATCHDOG
If this variable is defined, it enables watchdog
support. There must be support in the platform specific
code for a watchdog. For the 8xx and 8260 CPUs, the
SIU Watchdog feature is enabled in the SYPCR
register.
support for the SoC. There must be support in the SoC
specific code for a watchdog. For the 8xx and 8260
CPUs, the SIU Watchdog feature is enabled in the SYPCR
register. When supported for a specific SoC is
available, then no further board specific code should
be needed to use it.
CONFIG_HW_WATCHDOG
When using a watchdog circuitry external to the used
SoC, then define this variable and provide board
specific code for the "hw_watchdog_reset" function.
- U-Boot Version:
CONFIG_VERSION_VARIABLE
@@ -738,6 +780,8 @@ The following options need to be configured:
CONFIG_RTC_ISL1208 - use Intersil ISL1208 RTC
CONFIG_RTC_MAX6900 - use Maxim, Inc. MAX6900 RTC
CONFIG_SYS_RTC_DS1337_NOOSC - Turn off the OSC output for DS1337
CONFIG_SYS_RV3029_TCR - enable trickle charger on
RV3029 RTC.
Note that if the RTC uses I2C, then the I2C interface
must also be configured. See I2C Support, below.
@@ -892,6 +936,18 @@ The following options need to be configured:
automatically converts one 32 bit word to two 16 bit
words you may also try CONFIG_SMC911X_32_BIT.
CONFIG_SH_ETHER
Support for Renesas on-chip Ethernet controller
CONFIG_SH_ETHER_USE_PORT
Define the number of ports to be used
CONFIG_SH_ETHER_PHY_ADDR
Define the ETH PHY's address
CONFIG_SH_ETHER_CACHE_WRITEBACK
If this option is set, the driver enables cache flush.
- USB Support:
At the moment only the UHCI host controller is
supported (PIP405, MIP405, MPC5200); define
@@ -1057,6 +1113,25 @@ The following options need to be configured:
and 16bpp modes defined by CONFIG_VIDEO_SED13806_8BPP
or CONFIG_VIDEO_SED13806_16BPP
CONFIG_FSL_DIU_FB
Enable the Freescale DIU video driver. Reference boards for
SOCs that have a DIU should define this macro to enable DIU
support, and should also define these other macros:
CONFIG_SYS_DIU_ADDR
CONFIG_VIDEO
CONFIG_CMD_BMP
CONFIG_CFB_CONSOLE
CONFIG_VIDEO_SW_CURSOR
CONFIG_VGA_AS_SINGLE_DEVICE
CONFIG_VIDEO_LOGO
CONFIG_VIDEO_BMP_LOGO
The DIU driver will look for the 'video-mode' environment
variable, and if defined, enable the DIU as a console during
boot. See the documentation file README.video for a
description of this variable.
- Keyboard Support:
CONFIG_KEYBOARD
@@ -1259,7 +1334,6 @@ The following options need to be configured:
driver in use must provide a function: mcast() to join/leave a
multicast group.
CONFIG_BOOTP_RANDOM_DELAY
- BOOTP Recovery Mode:
CONFIG_BOOTP_RANDOM_DELAY
@@ -1648,6 +1722,11 @@ The following options need to be configured:
SPI EEPROM, also an instance works with Crystal A/D and
D/As on the SACSng board)
CONFIG_SH_SPI
Enables the driver for SPI controller on SuperH. Currently
only SH7757 is supported.
CONFIG_SPI_X
Enables extended (16-bit) SPI EEPROM addressing.
@@ -1952,6 +2031,28 @@ The following options need to be configured:
example, some LED's) on your board. At the moment,
the following checkpoints are implemented:
- Standalone program support:
CONFIG_STANDALONE_LOAD_ADDR
This option allows to define board specific values
for the address where standalone program gets loaded,
thus overwriting the architecutre dependent default
settings.
- Frame Buffer Address:
CONFIG_FB_ADDR
Define CONFIG_FB_ADDR if you want to use specific address for
frame buffer.
Then system will reserve the frame buffer address to defined address
instead of lcd_setmem (this function grab the memory for frame buffer
by panel's size).
Please see board_init_f function.
If you want this config option then,
please define it at your board config file
Legacy uImage format:
Arg Where When
@@ -2128,7 +2229,7 @@ FIT uImage format:
Modem Support:
--------------
[so far only for SMDK2400 and TRAB boards]
[so far only for SMDK2400 boards]
- Modem support enable:
CONFIG_MODEM_SUPPORT
@@ -2289,7 +2390,10 @@ Configuration Settings:
used) must be put below this limit, unless "bootm_low"
enviroment variable is defined and non-zero. In such case
all data for the Linux kernel must be between "bootm_low"
and "bootm_low" + CONFIG_SYS_BOOTMAPSZ.
and "bootm_low" + CONFIG_SYS_BOOTMAPSZ. The environment
variable "bootm_mapsize" will override the value of
CONFIG_SYS_BOOTMAPSZ. If CONFIG_SYS_BOOTMAPSZ is undefined,
then the value in "bootm_size" will be used instead.
- CONFIG_SYS_BOOT_RAMDISK_HIGH:
Enable initrd_high functionality. If defined then the
@@ -2677,6 +2781,14 @@ Low Level (hardware related) configuration options:
source code. It is used to make hardware dependant
initializations.
- CONFIG_IDE_AHB:
Most IDE controllers were designed to be connected with PCI
interface. Only few of them were designed for AHB interface.
When software is doing ATA command and data transfer to
IDE devices through IDE-AHB controller, some additional
registers accessing to these kind of IDE-AHB controller
is requierd.
- CONFIG_SYS_IMMR: Physical address of the Internal Memory.
DO NOT CHANGE unless you know exactly what you're
doing! (11-4) [MPC8xx/82xx systems only]
@@ -2885,6 +2997,12 @@ Low Level (hardware related) configuration options:
that is executed before the actual U-Boot. E.g. when
compiling a NAND SPL.
- CONFIG_USE_ARCH_MEMCPY
CONFIG_USE_ARCH_MEMSET
If these options are used a optimized version of memcpy/memset will
be used if available. These functions may be faster under some
conditions but may increase the binary size.
Building the Software:
======================
@@ -3125,7 +3243,16 @@ List of environment variables (most likely not complete):
for use by the bootm command. See also "bootm_size"
environment variable. Address defined by "bootm_low" is
also the base of the initial memory mapping for the Linux
kernel -- see the description of CONFIG_SYS_BOOTMAPSZ.
kernel -- see the description of CONFIG_SYS_BOOTMAPSZ and
bootm_mapsize.
bootm_mapsize - Size of the initial memory mapping for the Linux kernel.
This variable is given as a hexadecimal number and it
defines the size of the memory region starting at base
address bootm_low that is accessible by the Linux kernel
during early boot. If unset, CONFIG_SYS_BOOTMAPSZ is used
as the default value if it is defined, and bootm_size is
used otherwise.
bootm_size - Memory range available for image processing in the bootm
command can be restricted. This variable is given as

View File

@@ -23,13 +23,11 @@
CROSS_COMPILE ?= arm-linux-
ifeq ($(BOARD),omap2420h4)
STANDALONE_LOAD_ADDR = 0x80300000
else
ifndef CONFIG_STANDALONE_LOAD_ADDR
ifeq ($(SOC),omap3)
STANDALONE_LOAD_ADDR = 0x80300000
CONFIG_STANDALONE_LOAD_ADDR = 0x80300000
else
STANDALONE_LOAD_ADDR = 0xc100000
CONFIG_STANDALONE_LOAD_ADDR = 0xc100000
endif
endif
@@ -63,7 +61,13 @@ ifeq (,$(findstring arch/arm/lib/eabi_compat.o,$(PLATFORM_LIBS)))
PLATFORM_LIBS += $(OBJTREE)/arch/arm/lib/eabi_compat.o
endif
endif
ifdef CONFIG_SYS_LDSCRIPT
# need to strip off double quotes
LDSCRIPT := $(subst ",,$(CONFIG_SYS_LDSCRIPT))
else
LDSCRIPT := $(SRCTREE)/$(CPUDIR)/u-boot.lds
endif
# needed for relocation
ifndef CONFIG_NAND_SPL

View File

@@ -24,8 +24,8 @@
*/
#include <common.h>
#include <asm/arch/mx31-regs.h>
#include <asm/arch/mx31.h>
#include <asm/arch/imx-regs.h>
#include <asm/arch/clock.h>
#ifdef CONFIG_SYS_MX31_UART1
void mx31_uart1_hw_init(void)

View File

@@ -22,7 +22,7 @@
*/
#include <common.h>
#include <asm/arch/mx31-regs.h>
#include <asm/arch/imx-regs.h>
#include <asm/io.h>
static u32 mx31_decode_pll(u32 reg, u32 infreq)
@@ -106,11 +106,65 @@ void mx31_set_pad(enum iomux_pins pin, u32 config)
}
struct mx3_cpu_type mx31_cpu_type[] = {
{ .srev = 0x00, .v = 0x10 },
{ .srev = 0x10, .v = 0x11 },
{ .srev = 0x11, .v = 0x11 },
{ .srev = 0x12, .v = 0x1F },
{ .srev = 0x13, .v = 0x1F },
{ .srev = 0x14, .v = 0x12 },
{ .srev = 0x15, .v = 0x12 },
{ .srev = 0x28, .v = 0x20 },
{ .srev = 0x29, .v = 0x20 },
};
u32 get_cpu_rev(void)
{
u32 i, srev;
/* read SREV register from IIM module */
struct iim_regs *iim = (struct iim_regs *)MX31_IIM_BASE_ADDR;
srev = readl(&iim->iim_srev);
for (i = 0; i < ARRAY_SIZE(mx31_cpu_type); i++)
if (srev == mx31_cpu_type[i].srev)
return mx31_cpu_type[i].v;
return srev | 0x8000;
}
static char *get_reset_cause(void)
{
/* read RCSR register from CCM module */
struct clock_control_regs *ccm =
(struct clock_control_regs *)CCM_BASE;
u32 cause = readl(&ccm->rcsr) & 0x07;
switch (cause) {
case 0x0000:
return "POR";
case 0x0001:
return "RST";
case 0x0002:
return "WDOG";
case 0x0006:
return "JTAG";
default:
return "unknown reset";
}
}
#if defined(CONFIG_DISPLAY_CPUINFO)
int print_cpuinfo (void)
{
printf("CPU: Freescale i.MX31 at %d MHz\n",
mx31_get_mcu_main_clk() / 1000000);
u32 srev = get_cpu_rev();
printf("CPU: Freescale i.MX31 rev %d.%d%s at %d MHz.",
(srev & 0xF0) >> 4, (srev & 0x0F),
((srev & 0x8000) ? " unknown" : ""),
mx31_get_mcu_main_clk() / 1000000);
printf("Reset cause: %s\n", get_reset_cause());
return 0;
}
#endif

View File

@@ -22,8 +22,10 @@
*/
#include <common.h>
#include <asm/arch/mx31-regs.h>
#include <asm/arch/imx-regs.h>
#include <div64.h>
#include <watchdog.h>
#include <asm/io.h>
#define TIMER_BASE 0x53f90000 /* General purpose timer 1 */
@@ -165,5 +167,39 @@ void __udelay (unsigned long usec)
void reset_cpu (ulong addr)
{
__REG16(WDOG_BASE) = 4;
struct wdog_regs *wdog = (struct wdog_regs *)WDOG_BASE;
wdog->wcr = WDOG_ENABLE;
while (1)
;
}
#ifdef CONFIG_HW_WATCHDOG
void mxc_hw_watchdog_enable(void)
{
struct wdog_regs *wdog = (struct wdog_regs *)WDOG_BASE;
u16 secs;
/*
* The timer watchdog can be set between
* 0.5 and 128 Seconds. If not defined
* in configuration file, sets 64 Seconds
*/
#ifdef CONFIG_SYS_WD_TIMER_SECS
secs = (CONFIG_SYS_WD_TIMER_SECS << 1) & 0xFF;
if (!secs) secs = 1;
#else
secs = 64;
#endif
writew(readw(&wdog->wcr) | (secs << WDOG_WT_SHIFT) | WDOG_ENABLE,
&wdog->wcr);
}
void mxc_hw_watchdog_reset(void)
{
struct wdog_regs *wdog = (struct wdog_regs *)WDOG_BASE;
writew(0x5555, &wdog->wsr);
writew(0xAAAA, &wdog->wsr);
}
#endif

View File

@@ -102,6 +102,10 @@ _bss_start_ofs:
.globl _bss_end_ofs
_bss_end_ofs:
.word __bss_end__ - _start
.globl _end_ofs
_end_ofs:
.word _end - _start
#ifdef CONFIG_USE_IRQ
@@ -163,15 +167,7 @@ call_board_init_f:
bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
ldr r0,=0x00000000
#ifdef CONFIG_NAND_SPL
bl nand_boot
#else
#ifdef CONFIG_ONENAND_IPL
bl start_oneboot
#else
bl board_init_f
#endif /* CONFIG_ONENAND_IPL */
#endif /* CONFIG_NAND_SPL */
/*------------------------------------------------------------------------------*/
@@ -267,14 +263,14 @@ clbss_l:str r2, [r0] /* clear loop... */
*/
#ifdef CONFIG_NAND_SPL
ldr r0, _nand_boot_ofs
adr r1, _start
add pc, r0, r1
_nand_boot_ofs
: .word nand_boot - _start
mov pc, r0
_nand_boot_ofs:
.word nand_boot
#else
jump_2_ram:
ldr r0, _board_init_r_ofs
adr r1, _start
ldr r1, _TEXT_BASE
add lr, r0, r1
add lr, lr, r9
/* setup parameters for board_init_r */

View File

@@ -72,11 +72,13 @@ SECTIONS
*(.dynsym)
}
_end = .;
.bss __rel_dyn_start (OVERLAY) : {
__bss_start = .;
*(.bss)
. = ALIGN(4);
_end = .;
__bss_end__ = .;
}
/DISCARD/ : { *(.dynstr*) }

View File

@@ -121,6 +121,10 @@ _bss_start_ofs:
.globl _bss_end_ofs
_bss_end_ofs:
.word __bss_end__ - _start
.globl _end_ofs
_end_ofs:
.word _end - _start
/* IRQ stack memory (calculated at run-time) + 8 bytes */
@@ -352,9 +356,11 @@ clbss_l:str r2, [r0] /* clear loop... */
cmp r0, r1
bne clbss_l
#ifndef CONFIG_NAND_SPL
bl coloured_LED_init
bl red_LED_on
#endif
#endif
/*
* We are done. Do not return, instead branch to second part of board

View File

@@ -61,11 +61,13 @@ SECTIONS
*(.dynsym)
}
_end = .;
.bss __rel_dyn_start (OVERLAY) : {
__bss_start = .;
*(.bss)
. = ALIGN(4);
_end = .;
__bss_end__ = .;
}
/DISCARD/ : { *(.dynstr*) }

View File

@@ -91,6 +91,10 @@ _bss_start_ofs:
.globl _bss_end_ofs
_bss_end_ofs:
.word __bss_end__ - _start
.globl _end_ofs
_end_ofs:
.word _end - _start
#ifdef CONFIG_USE_IRQ

View File

@@ -62,11 +62,13 @@ SECTIONS
*(.dynsym)
}
_end = .;
.bss __rel_dyn_start (OVERLAY) : {
__bss_start = .;
*(.bss)
. = ALIGN(4);
_end = .;
__bss_end__ = .;
}
/DISCARD/ : { *(.dynstr*) }

View File

@@ -27,7 +27,6 @@ LIB = $(obj)lib$(SOC).o
SOBJS += reset.o
COBJS += timer.o
COBJS += ftsmc020.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))

View File

@@ -19,21 +19,19 @@
#include <common.h>
#include <asm/io.h>
#include <asm/arch/ftpmu010.h>
#include <asm/arch/fttmr010.h>
#include <faraday/ftpmu010.h>
#include <faraday/fttmr010.h>
static ulong timestamp;
static ulong lastdec;
static struct fttmr010 *tmr = (struct fttmr010 *)CONFIG_FTTMR010_BASE;
static struct ftpmu010 *pmu = (struct ftpmu010 *)CONFIG_FTPMU010_BASE;
#define TIMER_CLOCK 32768
#define TIMER_LOAD_VAL 0xffffffff
int timer_init(void)
{
unsigned int oscc;
unsigned int cr;
debug("%s()\n", __func__);
@@ -41,23 +39,8 @@ int timer_init(void)
/* disable timers */
writel(0, &tmr->cr);
/*
* use 32768Hz oscillator for RTC, WDT, TIMER
*/
/* enable the 32768Hz oscillator */
oscc = readl(&pmu->OSCC);
oscc &= ~(FTPMU010_OSCC_OSCL_OFF | FTPMU010_OSCC_OSCL_TRI);
writel(oscc, &pmu->OSCC);
/* wait until ready */
while (!(readl(&pmu->OSCC) & FTPMU010_OSCC_OSCL_STABLE))
;
/* select 32768Hz oscillator */
oscc = readl(&pmu->OSCC);
oscc |= FTPMU010_OSCC_OSCL_RTCLSEL;
writel(oscc, &pmu->OSCC);
/* use 32768Hz oscillator for RTC, WDT, TIMER */
ftpmu010_32768osc_enable();
/* setup timer */
writel(TIMER_LOAD_VAL, &tmr->timer3_load);

View File

@@ -65,7 +65,8 @@ LoopOsc:
ldr r0, =SMRDATA
ldr r1, _MTEXT_BASE
sub r0, r0, r1
add r2, r0, #80
ldr r2, =SMRDATAE
sub r2, r2, r1
pllloop:
/* the address */
ldr r1, [r0], #4
@@ -83,7 +84,8 @@ lock:
ldr r0, =SMRDATA1
ldr r1, _MTEXT_BASE
sub r0, r0, r1
add r2, r0, #176
ldr r2, =SMRDATA1E
sub r2, r2, r1
sdinit:
/* the address */
ldr r1, [r0], #4
@@ -114,6 +116,7 @@ SMRDATA:
.word CONFIG_SYS_PLLBR_VAL
.word AT91_ASM_PMC_MCKR
.word CONFIG_SYS_MCKR_VAL
SMRDATAE:
/* here there's a delay */
SMRDATA1:
.word AT91_ASM_PIOC_ASR
@@ -160,5 +163,6 @@ SMRDATA1:
.word CONFIG_SYS_SDRC_MR_VAL3
.word CONFIG_SYS_SDRAM
.word CONFIG_SYS_SDRAM_VAL
SMRDATA1E:
/* SMRDATA1 is 176 bytes long */
#endif /* CONFIG_SKIP_LOWLEVEL_INIT */

View File

@@ -42,7 +42,7 @@ void __attribute__((weak)) board_reset(void)
void reset_cpu(ulong ignored)
{
at91_st_t *st = (at91_st_t *) AT91_ST_BASE;
at91_st_t *st = (at91_st_t *) ATMEL_BASE_ST;
#if defined(CONFIG_AT91RM9200_USART)
/*shutdown the console to avoid strange chars during reset */
serial_exit();

View File

@@ -32,7 +32,7 @@
#include <common.h>
#include <asm/arch/io.h>
#include <asm/io.h>
#include <asm/arch/hardware.h>
#include <asm/arch/at91_tc.h>
#include <asm/arch/at91_pmc.h>
@@ -44,11 +44,11 @@ DECLARE_GLOBAL_DATA_PTR;
int timer_init(void)
{
at91_tc_t *tc = (at91_tc_t *) AT91_TC_BASE;
at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE;
at91_tc_t *tc = (at91_tc_t *) ATMEL_BASE_TC;
at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
/* enables TC1.0 clock */
writel(1 << AT91_ID_TC0, &pmc->pcer); /* enable clock */
writel(1 << ATMEL_ID_TC0, &pmc->pcer); /* enable clock */
writel(0, &tc->bcr);
writel(AT91_TC_BMR_TC0XC0S_NONE | AT91_TC_BMR_TC1XC1S_NONE |
@@ -96,14 +96,14 @@ void __udelay(unsigned long usec)
void reset_timer_masked(void)
{
/* reset time */
at91_tc_t *tc = (at91_tc_t *) AT91_TC_BASE;
at91_tc_t *tc = (at91_tc_t *) ATMEL_BASE_TC;
gd->lastinc = readl(&tc->tc[0].cv) & 0x0000ffff;
gd->tbl = 0;
}
ulong get_timer_raw(void)
{
at91_tc_t *tc = (at91_tc_t *) AT91_TC_BASE;
at91_tc_t *tc = (at91_tc_t *) ATMEL_BASE_TC;
u32 now;
now = readl(&tc->tc[0].cv) & 0x0000ffff;

View File

@@ -39,7 +39,7 @@ typedef struct {
#define RBF_MULTICAST (1<<30)
#define RBF_UNICAST (1<<29)
#define RBF_EXTERNAL (1<<28)
#define RBF_UNKOWN (1<<27)
#define RBF_UNKNOWN (1<<27)
#define RBF_SIZE 0x07ff
#define RBF_LOCAL4 (1<<26)
#define RBF_LOCAL3 (1<<25)

View File

@@ -55,5 +55,7 @@ SECTIONS
. = ALIGN(4);
__bss_start = .;
.bss : { *(.bss) }
__bss_end__ = .;
_end = .;
}

View File

@@ -177,7 +177,7 @@ ulong get_tbclk(void)
{
ulong tbclk;
#if defined(CONFIG_SMDK2400) || defined(CONFIG_TRAB)
#if defined(CONFIG_SMDK2400)
tbclk = timer_load_val * 100;
#elif defined(CONFIG_SBC2410X) || \
defined(CONFIG_SMDK2410) || \
@@ -198,12 +198,6 @@ void reset_cpu(ulong ignored)
{
struct s3c24x0_watchdog *watchdog;
#ifdef CONFIG_TRAB
extern void disable_vfd(void);
disable_vfd();
#endif
watchdog = s3c24x0_get_base_watchdog();
/* Disable watchdog */

View File

@@ -87,6 +87,10 @@ _bss_start_ofs:
.globl _bss_end_ofs
_bss_end_ofs:
.word __bss_end__ - _start
.globl _end_ofs
_end_ofs:
.word _end - _start
#ifdef CONFIG_USE_IRQ

View File

@@ -71,11 +71,13 @@ SECTIONS
*(.dynsym)
}
_end = .;
.bss __rel_dyn_start (OVERLAY) : {
__bss_start = .;
*(.bss)
. = ALIGN(4);
_end = .;
__bss_end__ = .;
}
/DISCARD/ : { *(.dynstr*) }

View File

@@ -97,6 +97,10 @@ _bss_start_ofs:
.globl _bss_end_ofs
_bss_end_ofs:
.word __bss_end__ - _start
.globl _end_ofs
_end_ofs:
.word _end - _start
#ifdef CONFIG_USE_IRQ

View File

@@ -66,11 +66,13 @@ SECTIONS
*(.dynsym)
}
_end = .;
.bss __rel_dyn_start (OVERLAY) : {
__bss_start = .;
*(.bss)
. = ALIGN(4);
_end = .;
__bss_end__ = .;
}
/DISCARD/ : { *(.dynstr*) }

View File

@@ -62,6 +62,16 @@ int arch_cpu_init(void)
/* Enable GPIO clock */
writel(APBC_APBCLK, &apb1clkres->gpio);
#ifdef CONFIG_I2C_MV
/* Enable general I2C clock */
writel(APBC_RST | APBC_FNCLK | APBC_APBCLK, &apb1clkres->twsi0);
writel(APBC_FNCLK | APBC_APBCLK, &apb1clkres->twsi0);
/* Enable power I2C clock */
writel(APBC_RST | APBC_FNCLK | APBC_APBCLK, &apb1clkres->twsi1);
writel(APBC_FNCLK | APBC_APBCLK, &apb1clkres->twsi1);
#endif
/*
* Enable Functional and APB clock at 14.7456MHz
* for configured UART console
@@ -90,3 +100,9 @@ int print_cpuinfo(void)
return 0;
}
#endif
#ifdef CONFIG_I2C_MV
void i2c_clk_enable(void)
{
}
#endif

View File

@@ -28,6 +28,7 @@ LIB = $(obj)lib$(SOC).o
COBJS-$(CONFIG_AT91CAP9) += at91cap9_devices.o
COBJS-$(CONFIG_AT91SAM9260) += at91sam9260_devices.o
COBJS-$(CONFIG_AT91SAM9G20) += at91sam9260_devices.o
COBJS-$(CONFIG_AT91SAM9XE) += at91sam9260_devices.o
COBJS-$(CONFIG_AT91SAM9261) += at91sam9261_devices.o
COBJS-$(CONFIG_AT91SAM9G10) += at91sam9261_devices.o
COBJS-$(CONFIG_AT91SAM9263) += at91sam9263_devices.o

View File

@@ -23,10 +23,10 @@
*/
#include <common.h>
#include <asm/io.h>
#include <asm/arch/at91_common.h>
#include <asm/arch/at91_pmc.h>
#include <asm/arch/gpio.h>
#include <asm/arch/io.h>
/*
* if CONFIG_AT91_GPIO_PULLUP ist set, keep pullups on on all
@@ -45,70 +45,51 @@
void at91_serial0_hw_init(void)
{
at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE;
at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
at91_set_a_periph(AT91_PIO_PORTB, 4, 1); /* TXD0 */
at91_set_a_periph(AT91_PIO_PORTB, 5, PUP); /* RXD0 */
writel(1 << AT91SAM9260_ID_US0, &pmc->pcer);
writel(1 << ATMEL_ID_USART0, &pmc->pcer);
}
void at91_serial1_hw_init(void)
{
at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE;
at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
at91_set_a_periph(AT91_PIO_PORTB, 6, 1); /* TXD1 */
at91_set_a_periph(AT91_PIO_PORTB, 7, PUP); /* RXD1 */
writel(1 << AT91SAM9260_ID_US1, &pmc->pcer);
writel(1 << ATMEL_ID_USART1, &pmc->pcer);
}
void at91_serial2_hw_init(void)
{
at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE;
at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
at91_set_a_periph(AT91_PIO_PORTB, 8, 1); /* TXD2 */
at91_set_a_periph(AT91_PIO_PORTB, 9, PUP); /* RXD2 */
writel(1 << AT91SAM9260_ID_US2, &pmc->pcer);
writel(1 << ATMEL_ID_USART2, &pmc->pcer);
}
void at91_serial3_hw_init(void)
void at91_seriald_hw_init(void)
{
at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE;
at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
at91_set_a_periph(AT91_PIO_PORTB, 14, PUP); /* DRXD */
at91_set_a_periph(AT91_PIO_PORTB, 15, 1); /* DTXD */
writel(1 << AT91_ID_SYS, &pmc->pcer);
}
void at91_serial_hw_init(void)
{
#ifdef CONFIG_USART0
at91_serial0_hw_init();
#endif
#ifdef CONFIG_USART1
at91_serial1_hw_init();
#endif
#ifdef CONFIG_USART2
at91_serial2_hw_init();
#endif
#ifdef CONFIG_USART3 /* DBGU */
at91_serial3_hw_init();
#endif
writel(1 << ATMEL_ID_SYS, &pmc->pcer);
}
#if defined(CONFIG_HAS_DATAFLASH) || defined(CONFIG_ATMEL_SPI)
void at91_spi0_hw_init(unsigned long cs_mask)
{
at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE;
at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
at91_set_a_periph(AT91_PIO_PORTA, 0, PUP); /* SPI0_MISO */
at91_set_a_periph(AT91_PIO_PORTA, 1, PUP); /* SPI0_MOSI */
at91_set_a_periph(AT91_PIO_PORTA, 2, PUP); /* SPI0_SPCK */
/* Enable clock */
writel(1 << AT91SAM9260_ID_SPI0, &pmc->pcer);
writel(1 << ATMEL_ID_SPI0, &pmc->pcer);
if (cs_mask & (1 << 0)) {
at91_set_a_periph(AT91_PIO_PORTA, 3, 1);
@@ -138,14 +119,14 @@ void at91_spi0_hw_init(unsigned long cs_mask)
void at91_spi1_hw_init(unsigned long cs_mask)
{
at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE;
at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
at91_set_a_periph(AT91_PIO_PORTB, 0, PUP); /* SPI1_MISO */
at91_set_a_periph(AT91_PIO_PORTB, 1, PUP); /* SPI1_MOSI */
at91_set_a_periph(AT91_PIO_PORTB, 2, PUP); /* SPI1_SPCK */
/* Enable clock */
writel(1 << AT91SAM9260_ID_SPI1, &pmc->pcer);
writel(1 << ATMEL_ID_SPI1, &pmc->pcer);
if (cs_mask & (1 << 0)) {
at91_set_a_periph(AT91_PIO_PORTB, 3, 1);

View File

@@ -3,7 +3,7 @@
* Stelian Pop <stelian.pop@leadtechdesign.com>
* Lead Tech Design <www.leadtechdesign.com>
*
* (C) Copyright 2009
* (C) Copyright 2009-2011
* Daniel Gorsulowski <daniel.gorsulowski@esd.eu>
* esd electronic system design gmbh <www.esd.eu>
*
@@ -27,78 +27,59 @@
*/
#include <common.h>
#include <asm/io.h>
#include <asm/arch/hardware.h>
#include <asm/arch/io.h>
#include <asm/arch/at91_common.h>
#include <asm/arch/at91_pmc.h>
#include <asm/arch/at91_pio.h>
void at91_serial0_hw_init(void)
{
at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE;
at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
at91_set_a_periph(AT91_PIO_PORTA, 26, 1); /* TXD0 */
at91_set_a_periph(AT91_PIO_PORTA, 27, 0); /* RXD0 */
writel(1 << AT91SAM9263_ID_US0, &pmc->pcer);
writel(1 << ATMEL_ID_USART0, &pmc->pcer);
}
void at91_serial1_hw_init(void)
{
at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE;
at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
at91_set_a_periph(AT91_PIO_PORTD, 0, 1); /* TXD1 */
at91_set_a_periph(AT91_PIO_PORTD, 1, 0); /* RXD1 */
writel(1 << AT91SAM9263_ID_US1, &pmc->pcer);
writel(1 << ATMEL_ID_USART1, &pmc->pcer);
}
void at91_serial2_hw_init(void)
{
at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE;
at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
at91_set_a_periph(AT91_PIO_PORTD, 2, 1); /* TXD2 */
at91_set_a_periph(AT91_PIO_PORTD, 3, 0); /* RXD2 */
writel(1 << AT91SAM9263_ID_US2, &pmc->pcer);
writel(1 << ATMEL_ID_USART2, &pmc->pcer);
}
void at91_serial3_hw_init(void)
void at91_seriald_hw_init(void)
{
at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE;
at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
at91_set_a_periph(AT91_PIO_PORTC, 30, 0); /* DRXD */
at91_set_a_periph(AT91_PIO_PORTC, 31, 1); /* DTXD */
writel(1 << AT91_ID_SYS, &pmc->pcer);
writel(1 << ATMEL_ID_SYS, &pmc->pcer);
}
void at91_serial_hw_init(void)
{
#ifdef CONFIG_USART0
at91_serial0_hw_init();
#endif
#ifdef CONFIG_USART1
at91_serial1_hw_init();
#endif
#ifdef CONFIG_USART2
at91_serial2_hw_init();
#endif
#ifdef CONFIG_USART3 /* DBGU */
at91_serial3_hw_init();
#endif
}
#ifdef CONFIG_HAS_DATAFLASH
#if defined(CONFIG_HAS_DATAFLASH) || defined(CONFIG_ATMEL_SPI)
void at91_spi0_hw_init(unsigned long cs_mask)
{
at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE;
at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
at91_set_b_periph(AT91_PIO_PORTA, 0, 0); /* SPI0_MISO */
at91_set_b_periph(AT91_PIO_PORTA, 1, 0); /* SPI0_MOSI */
at91_set_b_periph(AT91_PIO_PORTA, 2, 0); /* SPI0_SPCK */
/* Enable clock */
writel(1 << AT91SAM9263_ID_SPI0, &pmc->pcer);
writel(1 << ATMEL_ID_SPI0, &pmc->pcer);
if (cs_mask & (1 << 0)) {
at91_set_b_periph(AT91_PIO_PORTA, 5, 1);
@@ -128,14 +109,14 @@ void at91_spi0_hw_init(unsigned long cs_mask)
void at91_spi1_hw_init(unsigned long cs_mask)
{
at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE;
at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
at91_set_a_periph(AT91_PIO_PORTB, 12, 0); /* SPI1_MISO */
at91_set_a_periph(AT91_PIO_PORTB, 13, 0); /* SPI1_MOSI */
at91_set_a_periph(AT91_PIO_PORTB, 14, 0); /* SPI1_SPCK */
/* Enable clock */
writel(1 << AT91SAM9263_ID_SPI1, &pmc->pcer);
writel(1 << ATMEL_ID_SPI1, &pmc->pcer);
if (cs_mask & (1 << 0)) {
at91_set_a_periph(AT91_PIO_PORTB, 15, 1);
@@ -203,12 +184,12 @@ void at91_uhp_hw_init(void)
#ifdef CONFIG_AT91_CAN
void at91_can_hw_init(void)
{
at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE;
at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
at91_set_a_periph(AT91_PIO_PORTA, 13, 0); /* CAN_TX */
at91_set_a_periph(AT91_PIO_PORTA, 14, 1); /* CAN_RX */
/* Enable clock */
writel(1 << AT91SAM9263_ID_CAN, &pmc->pcer);
writel(1 << ATMEL_ID_CAN, &pmc->pcer);
}
#endif

View File

@@ -12,8 +12,8 @@
*/
#include <common.h>
#include <asm/io.h>
#include <asm/arch/hardware.h>
#include <asm/arch/io.h>
#include <asm/arch/at91_pmc.h>
#include <asm/arch/clk.h>
@@ -57,7 +57,7 @@ static unsigned long at91_css_to_rate(unsigned long css)
{
switch (css) {
case AT91_PMC_MCKR_CSS_SLOW:
return AT91_SLOW_CLOCK;
return CONFIG_SYS_AT91_SLOW_CLOCK;
case AT91_PMC_MCKR_CSS_MAIN:
return gd->main_clk_rate_hz;
case AT91_PMC_MCKR_CSS_PLLA:
@@ -145,7 +145,7 @@ static u32 at91_pll_rate(u32 freq, u32 reg)
int at91_clock_init(unsigned long main_clock)
{
unsigned freq, mckr;
at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE;
at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
#ifndef CONFIG_SYS_AT91_MAIN_CLOCK
unsigned tmp;
/*
@@ -159,7 +159,7 @@ int at91_clock_init(unsigned long main_clock)
tmp = readl(&pmc->mcfr);
} while (!(tmp & AT91_PMC_MCFR_MAINRDY));
tmp &= AT91_PMC_MCFR_MAINF_MASK;
main_clock = tmp * (AT91_SLOW_CLOCK / 16);
main_clock = tmp * (CONFIG_SYS_AT91_SLOW_CLOCK / 16);
}
#endif
gd->main_clk_rate_hz = main_clock;

View File

@@ -24,13 +24,12 @@
*/
#include <common.h>
#include <asm/io.h>
#include <asm/arch/hardware.h>
#include <asm/arch/at91_pmc.h>
#include <asm/arch/at91_pit.h>
#include <asm/arch/at91_gpbr.h>
#include <asm/arch/clk.h>
#include <asm/arch/io.h>
#ifndef CONFIG_SYS_AT91_MAIN_CLOCK
#define CONFIG_SYS_AT91_MAIN_CLOCK 0
@@ -44,7 +43,7 @@ int arch_cpu_init(void)
void arch_preboot_os(void)
{
ulong cpiv;
at91_pit_t *pit = (at91_pit_t *) AT91_PIT_BASE;
at91_pit_t *pit = (at91_pit_t *) ATMEL_BASE_PIT;
cpiv = AT91_PIT_MR_PIV_MASK(readl(&pit->piir));
@@ -61,7 +60,7 @@ int print_cpuinfo(void)
{
char buf[32];
printf("CPU: %s\n", CONFIG_SYS_AT91_CPU_NAME);
printf("CPU: %s\n", ATMEL_CPU_NAME);
printf("Crystal frequency: %8s MHz\n",
strmhz(buf, get_main_clk_rate()));
printf("CPU clock : %8s MHz\n",
@@ -80,7 +79,7 @@ int print_cpuinfo(void)
*/
void bootcount_store (ulong a)
{
at91_gpbr_t *gpbr = (at91_gpbr_t *) AT91_GPR_BASE;
at91_gpbr_t *gpbr = (at91_gpbr_t *) ATMEL_BASE_GPBR;
writel((BOOTCOUNT_MAGIC & 0xffff0000) | (a & 0x0000ffff),
&gpbr->reg[AT91_GPBR_INDEX_BOOTCOUNT]);
@@ -88,7 +87,7 @@ void bootcount_store (ulong a)
ulong bootcount_load (void)
{
at91_gpbr_t *gpbr = (at91_gpbr_t *) AT91_GPR_BASE;
at91_gpbr_t *gpbr = (at91_gpbr_t *) ATMEL_BASE_GPBR;
ulong val = readl(&gpbr->reg[AT91_GPBR_INDEX_BOOTCOUNT]);
if ((val & 0xffff0000) != (BOOTCOUNT_MAGIC & 0xffff0000))

View File

@@ -60,8 +60,8 @@
* do a read-modify-write for partially programmed pages
*/
#include <common.h>
#include <asm/io.h>
#include <asm/arch/hardware.h>
#include <asm/arch/io.h>
#include <asm/arch/at91_common.h>
#include <asm/arch/at91_eefc.h>
#include <asm/arch/at91_dbu.h>
@@ -77,8 +77,8 @@ static u32 pagesize;
unsigned long flash_init (void)
{
at91_eefc_t *eefc = (at91_eefc_t *) 0xfffffa00;
at91_dbu_t *dbu = (at91_dbu_t *) 0xfffff200;
at91_eefc_t *eefc = (at91_eefc_t *) ATMEL_BASE_EEFC;
at91_dbu_t *dbu = (at91_dbu_t *) ATMEL_BASE_DBGU;
u32 id, size, nplanes, planesize, nlocks;
u32 addr, i, tmp=0;
@@ -119,7 +119,7 @@ unsigned long flash_init (void)
flash_info[0].sector_count = nlocks;
flash_info[0].flash_id = id;
addr = AT91SAM9XE_FLASH_BASE;
addr = ATMEL_BASE_FLASH;
for (i=0; i<nlocks; i++) {
tmp = readl(&eefc->frr); /* words 4+nplanes+1.. */
flash_info[0].start[i] = addr;
@@ -167,8 +167,8 @@ void flash_print_info (flash_info_t *info)
int flash_real_protect (flash_info_t *info, long sector, int prot)
{
at91_eefc_t *eefc = (at91_eefc_t *) 0xfffffa00;
u32 pagenum = (info->start[sector]-AT91SAM9XE_FLASH_BASE)/pagesize;
at91_eefc_t *eefc = (at91_eefc_t *) ATMEL_BASE_EEFC;
u32 pagenum = (info->start[sector]-ATMEL_BASE_FLASH)/pagesize;
u32 i, tmp=0;
debug("protect sector=%ld prot=%d\n", sector, prot);
@@ -205,7 +205,7 @@ int flash_real_protect (flash_info_t *info, long sector, int prot)
static u32 erase_write_page (u32 pagenum)
{
at91_eefc_t *eefc = (at91_eefc_t *) 0xfffffa00;
at91_eefc_t *eefc = (at91_eefc_t *) ATMEL_BASE_EEFC;
debug("erase+write page=%u\n", pagenum);
@@ -249,7 +249,7 @@ int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
}
/* now start copying data */
pagenum = (addr-AT91SAM9XE_FLASH_BASE)/pagesize;
pagenum = (addr-ATMEL_BASE_FLASH)/pagesize;
src32 = (u32 *) src;
dst32 = (u32 *) addr;
while (cnt > 0) {

View File

@@ -23,10 +23,10 @@
*/
#include <common.h>
#include <asm/io.h>
#include <asm/arch/at91_pmc.h>
#include <asm/arch/at91_pio.h>
#include <asm/arch/gpio.h>
#include <asm/arch/io.h>
#ifdef CONFIG_RED_LED
void red_LED_on(void)

View File

@@ -230,37 +230,37 @@ SMRDATA1:
.word CONFIG_SYS_SDRC_MDR_VAL
.word AT91_ASM_SDRAMC_MR
.word CONFIG_SYS_SDRC_MR_VAL2
.word AT91_SDRAM_BASE
.word CONFIG_SYS_SDRAM_BASE
.word CONFIG_SYS_SDRAM_VAL1
.word AT91_ASM_SDRAMC_MR
.word CONFIG_SYS_SDRC_MR_VAL3
.word AT91_SDRAM_BASE
.word CONFIG_SYS_SDRAM_BASE
.word CONFIG_SYS_SDRAM_VAL2
.word AT91_SDRAM_BASE
.word CONFIG_SYS_SDRAM_BASE
.word CONFIG_SYS_SDRAM_VAL3
.word AT91_SDRAM_BASE
.word CONFIG_SYS_SDRAM_BASE
.word CONFIG_SYS_SDRAM_VAL4
.word AT91_SDRAM_BASE
.word CONFIG_SYS_SDRAM_BASE
.word CONFIG_SYS_SDRAM_VAL5
.word AT91_SDRAM_BASE
.word CONFIG_SYS_SDRAM_BASE
.word CONFIG_SYS_SDRAM_VAL6
.word AT91_SDRAM_BASE
.word CONFIG_SYS_SDRAM_BASE
.word CONFIG_SYS_SDRAM_VAL7
.word AT91_SDRAM_BASE
.word CONFIG_SYS_SDRAM_BASE
.word CONFIG_SYS_SDRAM_VAL8
.word AT91_SDRAM_BASE
.word CONFIG_SYS_SDRAM_BASE
.word CONFIG_SYS_SDRAM_VAL9
.word AT91_ASM_SDRAMC_MR
.word CONFIG_SYS_SDRC_MR_VAL4
.word AT91_SDRAM_BASE
.word CONFIG_SYS_SDRAM_BASE
.word CONFIG_SYS_SDRAM_VAL10
.word AT91_ASM_SDRAMC_MR
.word CONFIG_SYS_SDRC_MR_VAL5
.word AT91_SDRAM_BASE
.word CONFIG_SYS_SDRAM_BASE
.word CONFIG_SYS_SDRAM_VAL11
.word AT91_ASM_SDRAMC_TR
.word CONFIG_SYS_SDRC_TR_VAL2
.word AT91_SDRAM_BASE
.word CONFIG_SYS_SDRAM_BASE
.word CONFIG_SYS_SDRAM_VAL12
/* User reset enable*/
.word AT91_ASM_RSTC_MR

View File

@@ -23,14 +23,14 @@
*/
#include <common.h>
#include <asm/io.h>
#include <asm/arch/hardware.h>
#include <asm/arch/at91_rstc.h>
#include <asm/arch/io.h>
/* Reset the cpu by telling the reset controller to do so */
void reset_cpu(ulong ignored)
{
at91_rstc_t *rstc = (at91_rstc_t *) AT91_RSTC_BASE;
at91_rstc_t *rstc = (at91_rstc_t *) ATMEL_BASE_RSTC;
writel(AT91_RSTC_KEY
| AT91_RSTC_CR_PROCRST /* Processor Reset */

View File

@@ -23,11 +23,11 @@
*/
#include <common.h>
#include <asm/io.h>
#include <asm/arch/hardware.h>
#include <asm/arch/at91_pit.h>
#include <asm/arch/at91_pmc.h>
#include <asm/arch/clk.h>
#include <asm/arch/io.h>
#include <div64.h>
#if !defined(CONFIG_AT91FAMILY)
@@ -70,11 +70,11 @@ static inline unsigned long long usec_to_tick(unsigned long long usec)
*/
int timer_init(void)
{
at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE;
at91_pit_t *pit = (at91_pit_t *) AT91_PIT_BASE;
at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
at91_pit_t *pit = (at91_pit_t *) ATMEL_BASE_PIT;
/* Enable PITC Clock */
writel(1 << AT91_ID_SYS, &pmc->pcer);
writel(1 << ATMEL_ID_SYS, &pmc->pcer);
/* Enable PITC */
writel(TIMER_LOAD_VAL | AT91_PIT_MR_EN , &pit->mr);
@@ -90,7 +90,7 @@ int timer_init(void)
*/
unsigned long long get_ticks(void)
{
at91_pit_t *pit = (at91_pit_t *) AT91_PIT_BASE;
at91_pit_t *pit = (at91_pit_t *) ATMEL_BASE_PIT;
ulong now = readl(&pit->piir);
@@ -103,33 +103,28 @@ unsigned long long get_ticks(void)
void __udelay(unsigned long usec)
{
unsigned long long tmp;
unsigned long long start;
ulong tmo;
tmo = usec_to_tick(usec);
tmp = get_ticks() + tmo; /* get current timestamp */
while (get_ticks() < tmp) /* loop till event */
;
start = get_ticks(); /* get current timestamp */
tmo = usec_to_tick(usec); /* convert usecs to ticks */
while ((get_ticks() - start) < tmo)
; /* loop till time has passed */
}
/*
* reset_timer() and get_timer(base) are a pair of functions that are used by
* some timeout/sleep mechanisms in u-boot.
* get_timer(base) can be used to check for timeouts or
* to measure elasped time relative to an event:
*
* reset_timer() marks the current time as epoch and
* get_timer(base) works relative to that epoch.
* ulong start_time = get_timer(0) sets start_time to the current
* time value.
* get_timer(start_time) returns the time elapsed since then.
*
* The time is used in CONFIG_SYS_HZ units!
*/
void reset_timer(void)
{
gd->timer_reset_value = get_ticks();
}
ulong get_timer(ulong base)
{
return tick_to_time(get_ticks() - gd->timer_reset_value) - base;
return tick_to_time(get_ticks()) - base;
}
/*

View File

@@ -145,7 +145,7 @@ int cpu_mmc_init (bd_t * bis)
}
#ifdef CONFIG_MXC_UART
void mx25_uart_init_pins (void)
void mx25_uart1_init_pins(void)
{
struct iomuxc_mux_ctl *muxctl;
struct iomuxc_pad_ctl *padctl;

View File

@@ -1,5 +1,5 @@
#
# Copyright (C) 2010 Albert ARIBAUD <albert.aribaud@free.fr>
# Copyright (C) 2010 Albert ARIBAUD <albert.u.boot@aribaud.net>
#
# Based on original Kirkwood support which is
# (C) Copyright 2009

View File

@@ -1,5 +1,5 @@
/*
* Copyright (C) 2010 Albert ARIBAUD <albert.aribaud@free.fr>
* Copyright (C) 2010 Albert ARIBAUD <albert.u.boot@aribaud.net>
*
* Based on original Kirkwood support which is
* (C) Copyright 2009

View File

@@ -1,5 +1,5 @@
/*
* Copyright (C) 2010 Albert ARIBAUD <albert.aribaud@free.fr>
* Copyright (C) 2010 Albert ARIBAUD <albert.u.boot@aribaud.net>
*
* Based on original Kirkwood support which is
* (C) Copyright 2009
@@ -38,7 +38,7 @@ u32 orion5x_sdram_bar(enum memory_bank bank)
{
struct orion5x_ddr_addr_decode_registers *winregs =
(struct orion5x_ddr_addr_decode_registers *)
ORION5X_CPU_WIN_BASE;
ORION5X_DRAM_BASE;
u32 result = 0;
u32 enable = 0x01 & winregs[bank].size;

View File

@@ -1,5 +1,5 @@
/*
* Copyright (C) 2010 Albert ARIBAUD <albert.aribaud@free.fr>
* Copyright (C) 2010 Albert ARIBAUD <albert.u.boot@aribaud.net>
*
* (C) Copyright 2009
* Marvell Semiconductor <www.marvell.com>

View File

@@ -1,5 +1,5 @@
/*
* Copyright (C) 2010 Albert ARIBAUD <albert.aribaud@free.fr>
* Copyright (C) 2010 Albert ARIBAUD <albert.u.boot@aribaud.net>
*
* Based on original Kirkwood support which is
* Copyright (C) Marvell International Ltd. and its affiliates

View File

@@ -0,0 +1,46 @@
#
# (C) Copyright 2011
# Marvell Semiconductor <www.marvell.com>
# Written-by: Lei Wen <leiwen@marvell.com>
#
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
# MA 02110-1301 USA
#
include $(TOPDIR)/config.mk
LIB = $(obj)lib$(SOC).o
COBJS-y = cpu.o timer.o dram.o
SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS-y))
all: $(obj).depend $(LIB)
$(LIB): $(OBJS)
$(AR) $(ARFLAGS) $@ $(OBJS)
#########################################################################
# defines $(obj).depend target
include $(SRCTREE)/rules.mk
sinclude $(obj).depend
#########################################################################

View File

@@ -0,0 +1,90 @@
/*
* (C) Copyright 2011
* Marvell Semiconductor <www.marvell.com>
* Written-by: Lei Wen <leiwen@marvell.com>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
* MA 02110-1301 USA
*/
#include <common.h>
#include <asm/arch/pantheon.h>
#include <asm/io.h>
#define UARTCLK14745KHZ (APBC_APBCLK | APBC_FNCLK | APBC_FNCLKSEL(1))
#define SET_MRVL_ID (1<<8)
#define L2C_RAM_SEL (1<<4)
int arch_cpu_init(void)
{
u32 val;
struct panthcpu_registers *cpuregs =
(struct panthcpu_registers*) PANTHEON_CPU_BASE;
struct panthapb_registers *apbclkres =
(struct panthapb_registers*) PANTHEON_APBC_BASE;
struct panthmpmu_registers *mpmu =
(struct panthmpmu_registers*) PANTHEON_MPMU_BASE;
/* set SEL_MRVL_ID bit in PANTHEON_CPU_CONF register */
val = readl(&cpuregs->cpu_conf);
val = val | SET_MRVL_ID;
writel(val, &cpuregs->cpu_conf);
/* Turn on clock gating (PMUM_CCGR) */
writel(0xFFFFFFFF, &mpmu->ccgr);
/* Turn on clock gating (PMUM_ACGR) */
writel(0xFFFFFFFF, &mpmu->acgr);
/* Turn on uart2 clock */
writel(UARTCLK14745KHZ, &apbclkres->uart0);
/* Enable GPIO clock */
writel(APBC_APBCLK, &apbclkres->gpio);
#ifdef CONFIG_I2C_MV
/* Enable I2C clock */
writel(APBC_RST | APBC_FNCLK | APBC_APBCLK, &apbclkres->twsi);
writel(APBC_FNCLK | APBC_APBCLK, &apbclkres->twsi);
#endif
icache_enable();
return 0;
}
#if defined(CONFIG_DISPLAY_CPUINFO)
int print_cpuinfo(void)
{
u32 id;
struct panthcpu_registers *cpuregs =
(struct panthcpu_registers*) PANTHEON_CPU_BASE;
id = readl(&cpuregs->chip_id);
printf("SoC: PANTHEON 88AP%X-%X\n", (id & 0xFFF), (id >> 0x10));
return 0;
}
#endif
#ifdef CONFIG_I2C_MV
void i2c_clk_enable(void)
{
}
#endif

View File

@@ -0,0 +1,132 @@
/*
* (C) Copyright 2011
* Marvell Semiconductor <www.marvell.com>
* Written-by: Lei Wen <leiwen@marvell.com>,
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
* MA 02110-1301 USA
*/
#include <common.h>
#include <asm/arch/pantheon.h>
DECLARE_GLOBAL_DATA_PTR;
/*
* Pantheon DRAM controller supports upto 8 banks
* for chip select 0 and 1
*/
/*
* DDR Memory Control Registers
* Refer Datasheet 4.4
*/
struct panthddr_map_registers {
u32 cs; /* Memory Address Map Register -CS */
u32 pad[3];
};
struct panthddr_registers {
u8 pad[0x100 - 0x000];
struct panthddr_map_registers mmap[2];
};
/*
* panth_sdram_base - reads SDRAM Base Address Register
*/
u32 panth_sdram_base(int chip_sel)
{
struct panthddr_registers *ddr_regs =
(struct panthddr_registers *)PANTHEON_DRAM_BASE;
u32 result = 0;
u32 CS_valid = 0x01 & readl(&ddr_regs->mmap[chip_sel].cs);
if (!CS_valid)
return 0;
result = readl(&ddr_regs->mmap[chip_sel].cs) & 0xFF800000;
return result;
}
/*
* panth_sdram_size - reads SDRAM size
*/
u32 panth_sdram_size(int chip_sel)
{
struct panthddr_registers *ddr_regs =
(struct panthddr_registers *)PANTHEON_DRAM_BASE;
u32 result = 0;
u32 CS_valid = 0x01 & readl(&ddr_regs->mmap[chip_sel].cs);
if (!CS_valid)
return 0;
result = readl(&ddr_regs->mmap[chip_sel].cs);
result = (result >> 16) & 0xF;
if (result < 0x7) {
printf("Unknown DRAM Size\n");
return -1;
} else {
return ((0x8 << (result - 0x7)) * 1024 * 1024);
}
}
#ifndef CONFIG_SYS_BOARD_DRAM_INIT
int dram_init(void)
{
int i;
gd->ram_size = 0;
for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
gd->bd->bi_dram[i].start = panth_sdram_base(i);
gd->bd->bi_dram[i].size = panth_sdram_size(i);
/*
* It is assumed that all memory banks are consecutive
* and without gaps.
* If the gap is found, ram_size will be reported for
* consecutive memory only
*/
if (gd->bd->bi_dram[i].start != gd->ram_size)
break;
gd->ram_size += gd->bd->bi_dram[i].size;
}
for (; i < CONFIG_NR_DRAM_BANKS; i++) {
/*
* If above loop terminated prematurely, we need to set
* remaining banks' start address & size as 0. Otherwise other
* u-boot functions and Linux kernel gets wrong values which
* could result in crash
*/
gd->bd->bi_dram[i].start = 0;
gd->bd->bi_dram[i].size = 0;
}
return 0;
}
/*
* If this function is not defined here,
* board.c alters dram bank zero configuration defined above.
*/
void dram_init_banksize(void)
{
dram_init();
}
#endif /* CONFIG_SYS_BOARD_DRAM_INIT */

View File

@@ -0,0 +1,214 @@
/*
* (C) Copyright 2011
* Marvell Semiconductor <www.marvell.com>
* Written-by: Lei Wen <leiwen@marvell.com>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
* MA 02110-1301 USA
*/
#include <common.h>
#include <asm/arch/pantheon.h>
/*
* Timer registers
* Refer 6.2.9 in Datasheet
*/
struct panthtmr_registers {
u32 clk_ctrl; /* Timer clk control reg */
u32 match[9]; /* Timer match registers */
u32 count[3]; /* Timer count registers */
u32 status[3];
u32 ie[3];
u32 preload[3]; /* Timer preload value */
u32 preload_ctrl[3];
u32 wdt_match_en;
u32 wdt_match_r;
u32 wdt_val;
u32 wdt_sts;
u32 icr[3];
u32 wdt_icr;
u32 cer; /* Timer count enable reg */
u32 cmr;
u32 ilr[3];
u32 wcr;
u32 wfar;
u32 wsar;
u32 cvwr[3];
};
#define TIMER 0 /* Use TIMER 0 */
/* Each timer has 3 match registers */
#define MATCH_CMP(x) ((3 * TIMER) + x)
#define TIMER_LOAD_VAL 0xffffffff
#define COUNT_RD_REQ 0x1
DECLARE_GLOBAL_DATA_PTR;
/* Using gd->tbu from timestamp and gd->tbl for lastdec */
/*
* For preventing risk of instability in reading counter value,
* first set read request to register cvwr and then read same
* register after it captures counter value.
*/
ulong read_timer(void)
{
struct panthtmr_registers *panthtimers =
(struct panthtmr_registers *) PANTHEON_TIMER_BASE;
volatile int loop=100;
ulong val;
writel(COUNT_RD_REQ, &panthtimers->cvwr);
while (loop--)
val = readl(&panthtimers->cvwr);
/*
* This stop gcc complain and prevent loop mistake init to 0
*/
val = readl(&panthtimers->cvwr);
return val;
}
void reset_timer_masked(void)
{
/* reset time */
gd->tbl = read_timer();
gd->tbu = 0;
}
ulong get_timer_masked(void)
{
ulong now = read_timer();
if (now >= gd->tbl) {
/* normal mode */
gd->tbu += now - gd->tbl;
} else {
/* we have an overflow ... */
gd->tbu += now + TIMER_LOAD_VAL - gd->tbl;
}
gd->tbl = now;
return gd->tbu;
}
void reset_timer(void)
{
reset_timer_masked();
}
ulong get_timer(ulong base)
{
return ((get_timer_masked() / (CONFIG_SYS_HZ_CLOCK / 1000)) -
base);
}
void set_timer(ulong t)
{
gd->tbu = t;
}
void __udelay(unsigned long usec)
{
ulong delayticks;
ulong endtime;
delayticks = (usec * (CONFIG_SYS_HZ_CLOCK / 1000000));
endtime = get_timer_masked() + delayticks;
while (get_timer_masked() < endtime)
;
}
/*
* init the Timer
*/
int timer_init(void)
{
struct panthapb_registers *apb1clkres =
(struct panthapb_registers *) PANTHEON_APBC_BASE;
struct panthtmr_registers *panthtimers =
(struct panthtmr_registers *) PANTHEON_TIMER_BASE;
/* Enable Timer clock at 3.25 MHZ */
writel(APBC_APBCLK | APBC_FNCLK | APBC_FNCLKSEL(3), &apb1clkres->timers);
/* load value into timer */
writel(0x0, &panthtimers->clk_ctrl);
/* Use Timer 0 Match Resiger 0 */
writel(TIMER_LOAD_VAL, &panthtimers->match[MATCH_CMP(0)]);
/* Preload value is 0 */
writel(0x0, &panthtimers->preload[TIMER]);
/* Enable match comparator 0 for Timer 0 */
writel(0x1, &panthtimers->preload_ctrl[TIMER]);
/* Enable timer 0 */
writel(0x1, &panthtimers->cer);
/* init the gd->tbu and gd->tbl value */
reset_timer_masked();
return 0;
}
#define MPMU_APRR_WDTR (1<<4)
#define TMR_WFAR 0xbaba /* WDT Register First key */
#define TMP_WSAR 0xeb10 /* WDT Register Second key */
/*
* This function uses internal Watchdog Timer
* based reset mechanism.
* Steps to write watchdog registers (protected access)
* 1. Write key value to TMR_WFAR reg.
* 2. Write key value to TMP_WSAR reg.
* 3. Perform write operation.
*/
void reset_cpu (unsigned long ignored)
{
struct panthmpmu_registers *mpmu =
(struct panthmpmu_registers *) PANTHEON_MPMU_BASE;
struct panthtmr_registers *panthtimers =
(struct panthtmr_registers *) PANTHEON_WD_TIMER_BASE;
u32 val;
/* negate hardware reset to the WDT after system reset */
val = readl(&mpmu->aprr);
val = val | MPMU_APRR_WDTR;
writel(val, &mpmu->aprr);
/* reset/enable WDT clock */
writel(APBC_APBCLK, &mpmu->wdtpcr);
/* clear previous WDT status */
writel(TMR_WFAR, &panthtimers->wfar);
writel(TMP_WSAR, &panthtimers->wsar);
writel(0, &panthtimers->wdt_sts);
/* set match counter */
writel(TMR_WFAR, &panthtimers->wfar);
writel(TMP_WSAR, &panthtimers->wsar);
writel(0xf, &panthtimers->wdt_match_r);
/* enable WDT reset */
writel(TMR_WFAR, &panthtimers->wfar);
writel(TMP_WSAR, &panthtimers->wsar);
writel(0x3, &panthtimers->wdt_match_en);
/*enable functional WDT clock */
writel(APBC_APBCLK | APBC_FNCLK, &mpmu->wdtpcr);
}

View File

@@ -10,7 +10,7 @@
* Copyright (c) 2002 Gary Jennejohn <garyj@denx.de>
* Copyright (c) 2003 Richard Woodruff <r-woodruff2@ti.com>
* Copyright (c) 2003 Kshitij <kshitij@ti.com>
* Copyright (c) 2010 Albert Aribaud <albert.aribaud@free.fr>
* Copyright (c) 2010 Albert Aribaud <albert.u.boot@aribaud.net>
*
* See file CREDITS for list of people who contributed to this
* project.
@@ -131,6 +131,10 @@ _bss_start_ofs:
.globl _bss_end_ofs
_bss_end_ofs:
.word __bss_end__ - _start
.globl _end_ofs
_end_ofs:
.word _end - _start
#ifdef CONFIG_USE_IRQ
@@ -281,7 +285,7 @@ _nand_boot_ofs:
.word nand_boot
#else
ldr r0, _board_init_r_ofs
adr r1, _start
ldr r1, _TEXT_BASE
add lr, r0, r1
add lr, lr, r9
/* setup parameters for board_init_r */

View File

@@ -63,11 +63,13 @@ SECTIONS
*(.dynsym)
}
_end = .;
.bss __rel_dyn_start (OVERLAY) : {
__bss_start = .;
*(.bss)
. = ALIGN(4);
_end = .;
__bss_end__ = .;
}
/DISCARD/ : { *(.dynstr*) }

View File

@@ -10,7 +10,7 @@
* Copyright (c) 2002 Gary Jennejohn <garyj@denx.de>
* Copyright (c) 2003 Richard Woodruff <r-woodruff2@ti.com>
* Copyright (c) 2003 Kshitij <kshitij@ti.com>
* Copyright (c) 2010 Albert Aribaud <albert.aribaud@free.fr>
* Copyright (c) 2010 Albert Aribaud <albert.u.boot@aribaud.net>
*
* See file CREDITS for list of people who contributed to this
* project.
@@ -103,6 +103,10 @@ _bss_start_ofs:
.globl _bss_end_ofs
_bss_end_ofs:
.word __bss_end__ - _start
.globl _end_ofs
_end_ofs:
.word _end - _start
#ifdef CONFIG_USE_IRQ

View File

@@ -63,11 +63,13 @@ SECTIONS
*(.dynsym)
}
_end = .;
.bss __rel_dyn_start (OVERLAY) : {
__bss_start = .;
*(.bss)
. = ALIGN(4);
_end = .;
__bss_end__ = .;
}
/DISCARD/ : { *(.dynstr*) }

View File

@@ -99,6 +99,10 @@ _bss_start_ofs:
.globl _bss_end_ofs
_bss_end_ofs:
.word __bss_end__ - _start
.globl _end_ofs
_end_ofs:
.word _end - _start
#ifdef CONFIG_USE_IRQ

View File

@@ -63,11 +63,13 @@ SECTIONS
*(.dynsym)
}
_end = .;
.bss __rel_dyn_start (OVERLAY) : {
__bss_start = .;
*(.bss)
. = ALIGN(4);
_end = .;
__bss_end__ = .;
}
/DISCARD/ : { *(.dynstr*) }

View File

@@ -65,18 +65,41 @@ u32 get_cpu_rev(void)
break;
}
#else
switch (reg) {
case 0x20:
system_rev |= CHIP_REV_2_0;
break;
default:
if (reg < 0x20)
system_rev |= CHIP_REV_1_0;
break;
}
else
system_rev |= reg;
#endif
return system_rev;
}
static char *get_reset_cause(void)
{
u32 cause;
struct src *src_regs = (struct src *)SRC_BASE_ADDR;
cause = readl(&src_regs->srsr);
writel(cause, &src_regs->srsr);
switch (cause) {
case 0x00001:
return "POR";
case 0x00004:
return "CSU";
case 0x00008:
return "IPP USER";
case 0x00010:
return "WDOG";
case 0x00020:
return "JTAG HIGH-Z";
case 0x00040:
return "JTAG SW";
case 0x10000:
return "WARM BOOT";
default:
return "unknown reset";
}
}
#if defined(CONFIG_DISPLAY_CPUINFO)
int print_cpuinfo(void)
@@ -89,6 +112,7 @@ int print_cpuinfo(void)
(cpurev & 0x000F0) >> 4,
(cpurev & 0x0000F) >> 0,
mxc_get_clock(MXC_ARM_CLK) / 1000000);
printf("Reset cause: %s\n", get_reset_cause());
return 0;
}
#endif

View File

@@ -278,6 +278,25 @@ static void dpll4_init_34xx(u32 sil_index, u32 clk_index)
wait_on_value(ST_PERIPH_CLK, 2, &prcm_base->idlest_ckgen, LDELAY);
}
static void dpll5_init_34xx(u32 sil_index, u32 clk_index)
{
struct prcm *prcm_base = (struct prcm *)PRCM_BASE;
dpll_param *ptr = (dpll_param *) get_per2_dpll_param();
/* Moving it to the right sysclk base */
ptr = ptr + clk_index;
/* PER2 DPLL (DPLL5) */
sr32(&prcm_base->clken2_pll, 0, 3, PLL_STOP);
wait_on_value(1, 0, &prcm_base->idlest2_ckgen, LDELAY);
sr32(&prcm_base->clksel5_pll, 0, 5, ptr->m2); /* set M2 (usbtll_fck) */
sr32(&prcm_base->clksel4_pll, 8, 11, ptr->m); /* set m (11-bit multiplier) */
sr32(&prcm_base->clksel4_pll, 0, 7, ptr->n); /* set n (7-bit divider)*/
sr32(&prcm_base->clken_pll, 4, 4, ptr->fsel); /* FREQSEL */
sr32(&prcm_base->clken2_pll, 0, 3, PLL_LOCK); /* lock mode */
wait_on_value(1, 1, &prcm_base->idlest2_ckgen, LDELAY);
}
static void mpu_init_34xx(u32 sil_index, u32 clk_index)
{
struct prcm *prcm_base = (struct prcm *)PRCM_BASE;
@@ -587,6 +606,7 @@ void prcm_init(void)
dpll3_init_34xx(sil_index, clk_index);
dpll4_init_34xx(sil_index, clk_index);
dpll5_init_34xx(sil_index, clk_index);
iva_init_34xx(sil_index, clk_index);
mpu_init_34xx(sil_index, clk_index);

View File

@@ -360,6 +360,28 @@ get_per_dpll_param:
adr r0, per_dpll_param
mov pc, lr
/* PER2 DPLL values */
per2_dpll_param:
/* 12MHz */
.word PER2_M_12, PER2_N_12, PER2_FSEL_12, PER2_M2_12
/* 13MHz */
.word PER2_M_13, PER2_N_13, PER2_FSEL_13, PER2_M2_13
/* 19.2MHz */
.word PER2_M_19P2, PER2_N_19P2, PER2_FSEL_19P2, PER2_M2_19P2
/* 26MHz */
.word PER2_M_26, PER2_N_26, PER2_FSEL_26, PER2_M2_26
/* 38.4MHz */
.word PER2_M_38P4, PER2_N_38P4, PER2_FSEL_38P4, PER2_M2_38P4
.globl get_per2_dpll_param
get_per2_dpll_param:
adr r0, per2_dpll_param
mov pc, lr
/*
* Tables for 36XX/37XX devices
*

View File

@@ -31,16 +31,6 @@
#include <asm/arch/sys_proto.h>
#include <command.h>
/*
* Only One NAND allowed on board at a time.
* The GPMC CS Base for the same
*/
unsigned int boot_flash_base;
unsigned int boot_flash_off;
unsigned int boot_flash_sec;
unsigned int boot_flash_type;
volatile unsigned int boot_flash_env_addr;
struct gpmc *gpmc_cfg;
#if defined(CONFIG_CMD_NAND)
@@ -134,10 +124,6 @@ void gpmc_init(void)
const u32 *gpmc_config = NULL;
u32 base = 0;
u32 size = 0;
#if defined(CONFIG_ENV_IS_IN_NAND) || defined(CONFIG_ENV_IS_IN_ONENAND)
u32 f_off = CONFIG_SYS_MONITOR_LEN;
u32 f_sec = 0;
#endif
#endif
u32 config = 0;
@@ -162,15 +148,6 @@ void gpmc_init(void)
base = PISMO1_NAND_BASE;
size = PISMO1_NAND_SIZE;
enable_gpmc_cs_config(gpmc_config, &gpmc_cfg->cs[0], base, size);
#if defined(CONFIG_ENV_IS_IN_NAND)
f_off = SMNAND_ENV_OFFSET;
f_sec = (128 << 10); /* 128 KiB */
/* env setup */
boot_flash_base = base;
boot_flash_off = f_off;
boot_flash_sec = f_sec;
boot_flash_env_addr = f_off;
#endif
#endif
#if defined(CONFIG_CMD_ONENAND)
@@ -178,14 +155,5 @@ void gpmc_init(void)
base = PISMO1_ONEN_BASE;
size = PISMO1_ONEN_SIZE;
enable_gpmc_cs_config(gpmc_config, &gpmc_cfg->cs[0], base, size);
#if defined(CONFIG_ENV_IS_IN_ONENAND)
f_off = ONENAND_ENV_OFFSET;
f_sec = (128 << 10); /* 128 KiB */
/* env setup */
boot_flash_base = base;
boot_flash_off = f_off;
boot_flash_sec = f_sec;
boot_flash_env_addr = f_off;
#endif
#endif
}

View File

@@ -27,6 +27,8 @@ LIB = $(obj)libs5p-common.o
COBJS-y += cpu_info.o
COBJS-y += timer.o
COBJS-y += sromc.o
COBJS-$(CONFIG_PWM) += pwm.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS-y) $(SOBJS))

View File

@@ -26,6 +26,8 @@
/* Default is s5pc100 */
unsigned int s5p_cpu_id = 0xC100;
/* Default is EVT1 */
unsigned int s5p_cpu_rev = 1;
#ifdef CONFIG_ARCH_CPU_INIT
int arch_cpu_init(void)

View File

@@ -0,0 +1,189 @@
/*
* Copyright (C) 2011 Samsung Electronics
*
* Donghwa Lee <dh09.lee@samsung.com>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#include <errno.h>
#include <pwm.h>
#include <asm/io.h>
#include <asm/arch/pwm.h>
#include <asm/arch/clk.h>
int pwm_enable(int pwm_id)
{
const struct s5p_timer *pwm =
(struct s5p_timer *)samsung_get_base_timer();
unsigned long tcon;
tcon = readl(&pwm->tcon);
tcon |= TCON_START(pwm_id);
writel(tcon, &pwm->tcon);
return 0;
}
void pwm_disable(int pwm_id)
{
const struct s5p_timer *pwm =
(struct s5p_timer *)samsung_get_base_timer();
unsigned long tcon;
tcon = readl(&pwm->tcon);
tcon &= ~TCON_START(pwm_id);
writel(tcon, &pwm->tcon);
}
static unsigned long pwm_calc_tin(int pwm_id, unsigned long freq)
{
unsigned long tin_parent_rate;
unsigned int div;
tin_parent_rate = get_pwm_clk();
for (div = 2; div <= 16; div *= 2) {
if ((tin_parent_rate / (div << 16)) < freq)
return tin_parent_rate / div;
}
return tin_parent_rate / 16;
}
#define NS_IN_HZ (1000000000UL)
int pwm_config(int pwm_id, int duty_ns, int period_ns)
{
const struct s5p_timer *pwm =
(struct s5p_timer *)samsung_get_base_timer();
unsigned int offset;
unsigned long tin_rate;
unsigned long tin_ns;
unsigned long period;
unsigned long tcon;
unsigned long tcnt;
unsigned long timer_rate_hz;
unsigned long tcmp;
/*
* We currently avoid using 64bit arithmetic by using the
* fact that anything faster than 1GHz is easily representable
* by 32bits.
*/
if (period_ns > NS_IN_HZ || duty_ns > NS_IN_HZ)
return -ERANGE;
if (duty_ns > period_ns)
return -EINVAL;
period = NS_IN_HZ / period_ns;
/* Check to see if we are changing the clock rate of the PWM */
tin_rate = pwm_calc_tin(pwm_id, period);
timer_rate_hz = tin_rate;
tin_ns = NS_IN_HZ / tin_rate;
tcnt = period_ns / tin_ns;
/* Note, counters count down */
tcmp = duty_ns / tin_ns;
tcmp = tcnt - tcmp;
/*
* the pwm hw only checks the compare register after a decrement,
* so the pin never toggles if tcmp = tcnt
*/
if (tcmp == tcnt)
tcmp--;
if (tcmp < 0)
tcmp = 0;
/* Update the PWM register block. */
offset = pwm_id * 3;
if (pwm_id < 4) {
writel(tcnt, &pwm->tcntb0 + offset);
writel(tcmp, &pwm->tcmpb0 + offset);
}
tcon = readl(&pwm->tcon);
tcon |= TCON_UPDATE(pwm_id);
if (pwm_id < 4)
tcon |= TCON_AUTO_RELOAD(pwm_id);
else
tcon |= TCON4_AUTO_RELOAD;
writel(tcon, &pwm->tcon);
tcon &= ~TCON_UPDATE(pwm_id);
writel(tcon, &pwm->tcon);
return 0;
}
int pwm_init(int pwm_id, int div, int invert)
{
u32 val;
const struct s5p_timer *pwm =
(struct s5p_timer *)samsung_get_base_timer();
unsigned long timer_rate_hz;
unsigned int offset, prescaler;
/*
* Timer Freq(HZ) =
* PWM_CLK / { (prescaler_value + 1) * (divider_value) }
*/
val = readl(&pwm->tcfg0);
if (pwm_id < 2) {
prescaler = PRESCALER_0;
val &= ~0xff;
val |= (prescaler & 0xff);
} else {
prescaler = PRESCALER_1;
val &= ~(0xff << 8);
val |= (prescaler & 0xff) << 8;
}
writel(val, &pwm->tcfg0);
val = readl(&pwm->tcfg1);
val &= ~(0xf << MUX_DIV_SHIFT(pwm_id));
val |= (div & 0xf) << MUX_DIV_SHIFT(pwm_id);
writel(val, &pwm->tcfg1);
timer_rate_hz = get_pwm_clk() / ((prescaler + 1) *
(div + 1));
timer_rate_hz = timer_rate_hz / 100;
/* set count value */
offset = pwm_id * 3;
writel(timer_rate_hz, &pwm->tcntb0 + offset);
val = readl(&pwm->tcon) & ~(0xf << TCON_OFFSET(pwm_id));
if (invert && (pwm_id < 4))
val |= TCON_INVERTER(pwm_id);
writel(val, &pwm->tcon);
pwm_enable(pwm_id);
return 0;
}

View File

@@ -23,27 +23,27 @@
#include <common.h>
#include <asm/io.h>
#include <asm/arch/smc.h>
#include <asm/arch/sromc.h>
/*
* s5pc1xx_config_sromc() - select the proper SROMC Bank and configure the
* band width control and bank control registers
* srom_bank - SROM Bank 0 to 5
* smc_bw_conf - SMC Band witdh reg configuration value
* smc_bc_conf - SMC Bank Control reg configuration value
* s5p_config_sromc() - select the proper SROMC Bank and configure the
* band width control and bank control registers
* srom_bank - SROM
* srom_bw_conf - SMC Band witdh reg configuration value
* srom_bc_conf - SMC Bank Control reg configuration value
*/
void s5pc1xx_config_sromc(u32 srom_bank, u32 smc_bw_conf, u32 smc_bc_conf)
void s5p_config_sromc(u32 srom_bank, u32 srom_bw_conf, u32 srom_bc_conf)
{
u32 tmp;
struct s5pc1xx_smc *srom =
(struct s5pc1xx_smc *)samsung_get_base_sromc();
struct s5p_sromc *srom =
(struct s5p_sromc *)samsung_get_base_sromc();
/* Configure SMC_BW register to handle proper SROMC bank */
tmp = srom->bw;
tmp &= ~(0xF << (srom_bank * 4));
tmp |= smc_bw_conf;
tmp |= srom_bw_conf;
srom->bw = tmp;
/* Configure SMC_BC register */
srom->bc[srom_bank] = smc_bc_conf;
srom->bc[srom_bank] = srom_bc_conf;
}

View File

@@ -27,21 +27,9 @@
#include <asm/io.h>
#include <asm/arch/pwm.h>
#include <asm/arch/clk.h>
#include <pwm.h>
#define PRESCALER_1 (16 - 1) /* prescaler of timer 2, 3, 4 */
#define MUX_DIV_2 1 /* 1/2 period */
#define MUX_DIV_4 2 /* 1/4 period */
#define MUX_DIV_8 3 /* 1/8 period */
#define MUX_DIV_16 4 /* 1/16 period */
#define MUX4_DIV_SHIFT 16
#define TCON_TIMER4_SHIFT 20
static unsigned long count_value;
/* Internal tick units */
static unsigned long long timestamp; /* Monotonic incrementing timer */
static unsigned long lastdec; /* Last decremneter snapshot */
DECLARE_GLOBAL_DATA_PTR;
/* macro to read the 16 bit timer */
static inline struct s5p_timer *s5p_get_base_timer(void)
@@ -51,41 +39,10 @@ static inline struct s5p_timer *s5p_get_base_timer(void)
int timer_init(void)
{
struct s5p_timer *const timer = s5p_get_base_timer();
u32 val;
/*
* @ PWM Timer 4
* Timer Freq(HZ) =
* PWM_CLK / { (prescaler_value + 1) * (divider_value) }
*/
/* set prescaler : 16 */
/* set divider : 2 */
writel((PRESCALER_1 & 0xff) << 8, &timer->tcfg0);
writel((MUX_DIV_2 & 0xf) << MUX4_DIV_SHIFT, &timer->tcfg1);
/* count_value = 2085937.5(HZ) (per 1 sec)*/
count_value = get_pwm_clk() / ((PRESCALER_1 + 1) *
(MUX_DIV_2 + 1));
/* count_value / 100 = 20859.375(HZ) (per 10 msec) */
count_value = count_value / 100;
/* set count value */
writel(count_value, &timer->tcntb4);
lastdec = count_value;
val = (readl(&timer->tcon) & ~(0x07 << TCON_TIMER4_SHIFT)) |
TCON4_AUTO_RELOAD;
/* auto reload & manual update */
writel(val | TCON4_UPDATE, &timer->tcon);
/* start PWM timer 4 */
writel(val | TCON4_START, &timer->tcon);
timestamp = 0;
/* PWM Timer 4 */
pwm_init(4, MUX_DIV_2, 0);
pwm_config(4, 0, 0);
pwm_enable(4);
return 0;
}
@@ -105,14 +62,14 @@ unsigned long get_timer(unsigned long base)
void set_timer(unsigned long t)
{
timestamp = t;
gd->tbl = t;
}
/* delay x useconds */
void __udelay(unsigned long usec)
{
struct s5p_timer *const timer = s5p_get_base_timer();
unsigned long tmo, tmp;
unsigned long tmo, tmp, count_value;
count_value = readl(&timer->tcntb4);
@@ -137,7 +94,7 @@ void __udelay(unsigned long usec)
tmp = get_timer(0);
/* if setting this fordward will roll time stamp */
/* reset "advancing" timestamp to 0, set lastdec value */
/* reset "advancing" timestamp to 0, set lastinc value */
/* else, set advancing stamp wake up time */
if ((tmo + tmp + 1) < tmp)
reset_timer_masked();
@@ -154,23 +111,24 @@ void reset_timer_masked(void)
struct s5p_timer *const timer = s5p_get_base_timer();
/* reset time */
lastdec = readl(&timer->tcnto4);
timestamp = 0;
gd->lastinc = readl(&timer->tcnto4);
gd->tbl = 0;
}
unsigned long get_timer_masked(void)
{
struct s5p_timer *const timer = s5p_get_base_timer();
unsigned long now = readl(&timer->tcnto4);
unsigned long count_value = readl(&timer->tcntb4);
if (lastdec >= now)
timestamp += lastdec - now;
if (gd->lastinc >= now)
gd->tbl += gd->lastinc - now;
else
timestamp += lastdec + count_value - now;
gd->tbl += gd->lastinc + count_value - now;
lastdec = now;
gd->lastinc = now;
return timestamp;
return gd->tbl;
}
/*

View File

@@ -32,7 +32,6 @@ SOBJS = cache.o
SOBJS += reset.o
COBJS += clock.o
COBJS += sromc.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS))

View File

@@ -336,3 +336,8 @@ unsigned long get_uart_clk(int dev_index)
{
return s5pc1xx_get_uart_clk(dev_index);
}
void set_mmc_clk(int dev_index, unsigned int div)
{
/* Do NOTHING */
}

View File

@@ -124,29 +124,35 @@ static unsigned long s5pc210_get_pwm_clk(void)
unsigned int sel;
unsigned int ratio;
/*
* CLK_SRC_PERIL0
* PWM_SEL [27:24]
*/
sel = readl(&clk->src_peril0);
sel = (sel >> 24) & 0xf;
if (s5p_get_cpu_rev() == 0) {
/*
* CLK_SRC_PERIL0
* PWM_SEL [27:24]
*/
sel = readl(&clk->src_peril0);
sel = (sel >> 24) & 0xf;
if (sel == 0x6)
if (sel == 0x6)
sclk = get_pll_clk(MPLL);
else if (sel == 0x7)
sclk = get_pll_clk(EPLL);
else if (sel == 0x8)
sclk = get_pll_clk(VPLL);
else
return 0;
/*
* CLK_DIV_PERIL3
* PWM_RATIO [3:0]
*/
ratio = readl(&clk->div_peril3);
ratio = ratio & 0xf;
} else if (s5p_get_cpu_rev() == 1) {
sclk = get_pll_clk(MPLL);
else if (sel == 0x7)
sclk = get_pll_clk(EPLL);
else if (sel == 0x8)
sclk = get_pll_clk(VPLL);
else
ratio = 8;
} else
return 0;
/*
* CLK_DIV_PERIL3
* PWM_RATIO [3:0]
*/
ratio = readl(&clk->div_peril3);
ratio = ratio & 0xf;
pclk = sclk / (ratio + 1);
return pclk;
@@ -199,6 +205,33 @@ static unsigned long s5pc210_get_uart_clk(int dev_index)
return uclk;
}
/* s5pc210: set the mmc clock */
static void s5pc210_set_mmc_clk(int dev_index, unsigned int div)
{
struct s5pc210_clock *clk =
(struct s5pc210_clock *)samsung_get_base_clock();
unsigned int addr;
unsigned int val;
/*
* CLK_DIV_FSYS1
* MMC0_PRE_RATIO [15:8], MMC1_PRE_RATIO [31:24]
* CLK_DIV_FSYS2
* MMC2_PRE_RATIO [15:8], MMC3_PRE_RATIO [31:24]
*/
if (dev_index < 2) {
addr = (unsigned int)&clk->div_fsys1;
} else {
addr = (unsigned int)&clk->div_fsys2;
dev_index -= 2;
}
val = readl(addr);
val &= ~(0xff << ((dev_index << 4) + 8));
val |= (div & 0xff) << ((dev_index << 4) + 8);
writel(val, addr);
}
unsigned long get_pll_clk(int pllreg)
{
return s5pc210_get_pll_clk(pllreg);
@@ -218,3 +251,8 @@ unsigned long get_uart_clk(int dev_index)
{
return s5pc210_get_uart_clk(dev_index);
}
void set_mmc_clk(int dev_index, unsigned int div)
{
s5pc210_set_mmc_clk(dev_index, div);
}

View File

@@ -70,6 +70,18 @@ _end_vect:
_TEXT_BASE:
.word CONFIG_SYS_TEXT_BASE
#ifdef CONFIG_TEGRA2
/*
* Tegra2 uses 2 separate CPUs - the AVP (ARM7TDMI) and the CPU (dual A9s).
* U-Boot runs on the AVP first, setting things up for the CPU (PLLs,
* muxes, clocks, clamps, etc.). Then the AVP halts, and expects the CPU
* to pick up its reset vector, which points here.
*/
.globl _armboot_start
_armboot_start:
.word _start
#endif
/*
* These are defined in the board-specific linker script.
*/
@@ -79,6 +91,10 @@ _bss_start_ofs:
.globl _bss_end_ofs
_bss_end_ofs:
.word __bss_end__ - _start
.globl _end_ofs
_end_ofs:
.word _end - _start
#ifdef CONFIG_USE_IRQ
@@ -111,7 +127,7 @@ reset:
orr r0, r0, #0xd3
msr cpsr,r0
#if (CONFIG_OMAP34XX)
#if defined(CONFIG_OMAP34XX)
/* Copy vectors to mask ROM indirect addr */
adr r0, _start @ r0 <- current position of code
add r0, r0, #4 @ skip reset vector

View File

@@ -0,0 +1,48 @@
#
# (C) Copyright 2010,2011 Nvidia Corporation.
#
# (C) Copyright 2000-2003
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
include $(TOPDIR)/config.mk
LIB = $(obj)lib$(SOC).o
SOBJS := lowlevel_init.o
COBJS := ap20.o board.o sys_info.o timer.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS))
all: $(obj).depend $(LIB)
$(LIB): $(OBJS)
$(AR) $(ARFLAGS) $@ $(OBJS)
#########################################################################
# defines $(obj).depend target
include $(SRCTREE)/rules.mk
sinclude $(obj).depend
#########################################################################

View File

@@ -0,0 +1,358 @@
/*
* (C) Copyright 2010-2011
* NVIDIA Corporation <www.nvidia.com>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include "ap20.h"
#include <asm/io.h>
#include <asm/arch/tegra2.h>
#include <asm/arch/clk_rst.h>
#include <asm/arch/pmc.h>
#include <asm/arch/pinmux.h>
#include <asm/arch/scu.h>
#include <common.h>
u32 s_first_boot = 1;
void init_pllx(void)
{
struct clk_rst_ctlr *clkrst = (struct clk_rst_ctlr *)NV_PA_CLK_RST_BASE;
u32 reg;
/* If PLLX is already enabled, just return */
reg = readl(&clkrst->crc_pllx_base);
if (reg & PLL_ENABLE)
return;
/* Set PLLX_MISC */
reg = CPCON; /* CPCON[11:8] = 0001 */
writel(reg, &clkrst->crc_pllx_misc);
/* Use 12MHz clock here */
reg = (PLL_BYPASS | PLL_DIVM);
reg |= (1000 << 8); /* DIVN = 0x3E8 */
writel(reg, &clkrst->crc_pllx_base);
reg |= PLL_ENABLE;
writel(reg, &clkrst->crc_pllx_base);
reg &= ~PLL_BYPASS;
writel(reg, &clkrst->crc_pllx_base);
}
static void enable_cpu_clock(int enable)
{
struct clk_rst_ctlr *clkrst = (struct clk_rst_ctlr *)NV_PA_CLK_RST_BASE;
u32 reg, clk;
/*
* NOTE:
* Regardless of whether the request is to enable or disable the CPU
* clock, every processor in the CPU complex except the master (CPU 0)
* will have it's clock stopped because the AVP only talks to the
* master. The AVP does not know (nor does it need to know) that there
* are multiple processors in the CPU complex.
*/
if (enable) {
/* Initialize PLLX */
init_pllx();
/* Wait until all clocks are stable */
udelay(PLL_STABILIZATION_DELAY);
writel(CCLK_BURST_POLICY, &clkrst->crc_cclk_brst_pol);
writel(SUPER_CCLK_DIVIDER, &clkrst->crc_super_cclk_div);
}
/* Fetch the register containing the main CPU complex clock enable */
reg = readl(&clkrst->crc_clk_out_enb_l);
reg |= CLK_ENB_CPU;
/*
* Read the register containing the individual CPU clock enables and
* always stop the clock to CPU 1.
*/
clk = readl(&clkrst->crc_clk_cpu_cmplx);
clk |= CPU1_CLK_STP;
if (enable) {
/* Unstop the CPU clock */
clk &= ~CPU0_CLK_STP;
} else {
/* Stop the CPU clock */
clk |= CPU0_CLK_STP;
}
writel(clk, &clkrst->crc_clk_cpu_cmplx);
writel(reg, &clkrst->crc_clk_out_enb_l);
}
static int is_cpu_powered(void)
{
struct pmc_ctlr *pmc = (struct pmc_ctlr *)NV_PA_PMC_BASE;
return (readl(&pmc->pmc_pwrgate_status) & CPU_PWRED) ? 1 : 0;
}
static void remove_cpu_io_clamps(void)
{
struct pmc_ctlr *pmc = (struct pmc_ctlr *)NV_PA_PMC_BASE;
u32 reg;
/* Remove the clamps on the CPU I/O signals */
reg = readl(&pmc->pmc_remove_clamping);
reg |= CPU_CLMP;
writel(reg, &pmc->pmc_remove_clamping);
/* Give I/O signals time to stabilize */
udelay(IO_STABILIZATION_DELAY);
}
static void powerup_cpu(void)
{
struct pmc_ctlr *pmc = (struct pmc_ctlr *)NV_PA_PMC_BASE;
u32 reg;
int timeout = IO_STABILIZATION_DELAY;
if (!is_cpu_powered()) {
/* Toggle the CPU power state (OFF -> ON) */
reg = readl(&pmc->pmc_pwrgate_toggle);
reg &= PARTID_CP;
reg |= START_CP;
writel(reg, &pmc->pmc_pwrgate_toggle);
/* Wait for the power to come up */
while (!is_cpu_powered()) {
if (timeout-- == 0)
printf("CPU failed to power up!\n");
else
udelay(10);
}
/*
* Remove the I/O clamps from CPU power partition.
* Recommended only on a Warm boot, if the CPU partition gets
* power gated. Shouldn't cause any harm when called after a
* cold boot according to HW, probably just redundant.
*/
remove_cpu_io_clamps();
}
}
static void enable_cpu_power_rail(void)
{
struct pmc_ctlr *pmc = (struct pmc_ctlr *)NV_PA_PMC_BASE;
u32 reg;
reg = readl(&pmc->pmc_cntrl);
reg |= CPUPWRREQ_OE;
writel(reg, &pmc->pmc_cntrl);
/*
* The TI PMU65861C needs a 3.75ms delay between enabling
* the power rail and enabling the CPU clock. This delay
* between SM1EN and SM1 is for switching time + the ramp
* up of the voltage to the CPU (VDD_CPU from PMU).
*/
udelay(3750);
}
static void reset_A9_cpu(int reset)
{
struct clk_rst_ctlr *clkrst = (struct clk_rst_ctlr *)NV_PA_CLK_RST_BASE;
u32 reg, cpu;
/*
* NOTE: Regardless of whether the request is to hold the CPU in reset
* or take it out of reset, every processor in the CPU complex
* except the master (CPU 0) will be held in reset because the
* AVP only talks to the master. The AVP does not know that there
* are multiple processors in the CPU complex.
*/
/* Hold CPU 1 in reset */
cpu = SET_DBGRESET1 | SET_DERESET1 | SET_CPURESET1;
writel(cpu, &clkrst->crc_cpu_cmplx_set);
reg = readl(&clkrst->crc_rst_dev_l);
if (reset) {
/* Now place CPU0 into reset */
cpu |= SET_DBGRESET0 | SET_DERESET0 | SET_CPURESET0;
writel(cpu, &clkrst->crc_cpu_cmplx_set);
/* Enable master CPU reset */
reg |= SWR_CPU_RST;
} else {
/* Take CPU0 out of reset */
cpu = CLR_DBGRESET0 | CLR_DERESET0 | CLR_CPURESET0;
writel(cpu, &clkrst->crc_cpu_cmplx_clr);
/* Disable master CPU reset */
reg &= ~SWR_CPU_RST;
}
writel(reg, &clkrst->crc_rst_dev_l);
}
static void clock_enable_coresight(int enable)
{
struct clk_rst_ctlr *clkrst = (struct clk_rst_ctlr *)NV_PA_CLK_RST_BASE;
u32 rst, clk, src;
rst = readl(&clkrst->crc_rst_dev_u);
clk = readl(&clkrst->crc_clk_out_enb_u);
if (enable) {
rst &= ~SWR_CSITE_RST;
clk |= CLK_ENB_CSITE;
} else {
rst |= SWR_CSITE_RST;
clk &= ~CLK_ENB_CSITE;
}
writel(clk, &clkrst->crc_clk_out_enb_u);
writel(rst, &clkrst->crc_rst_dev_u);
if (enable) {
/*
* Put CoreSight on PLLP_OUT0 (216 MHz) and divide it down by
* 1.5, giving an effective frequency of 144MHz.
* Set PLLP_OUT0 [bits31:30 = 00], and use a 7.1 divisor
* (bits 7:0), so 00000001b == 1.5 (n+1 + .5)
*/
src = CLK_DIVIDER(NVBL_PLLP_KHZ, 144000);
writel(src, &clkrst->crc_clk_src_csite);
/* Unlock the CPU CoreSight interfaces */
rst = 0xC5ACCE55;
writel(rst, CSITE_CPU_DBG0_LAR);
writel(rst, CSITE_CPU_DBG1_LAR);
}
}
void start_cpu(u32 reset_vector)
{
/* Enable VDD_CPU */
enable_cpu_power_rail();
/* Hold the CPUs in reset */
reset_A9_cpu(1);
/* Disable the CPU clock */
enable_cpu_clock(0);
/* Enable CoreSight */
clock_enable_coresight(1);
/*
* Set the entry point for CPU execution from reset,
* if it's a non-zero value.
*/
if (reset_vector)
writel(reset_vector, EXCEP_VECTOR_CPU_RESET_VECTOR);
/* Enable the CPU clock */
enable_cpu_clock(1);
/* If the CPU doesn't already have power, power it up */
powerup_cpu();
/* Take the CPU out of reset */
reset_A9_cpu(0);
}
void halt_avp(void)
{
for (;;) {
writel((HALT_COP_EVENT_JTAG | HALT_COP_EVENT_IRQ_1 \
| HALT_COP_EVENT_FIQ_1 | (FLOW_MODE_STOP<<29)),
FLOW_CTLR_HALT_COP_EVENTS);
}
}
void enable_scu(void)
{
struct scu_ctlr *scu = (struct scu_ctlr *)NV_PA_ARM_PERIPHBASE;
u32 reg;
/* If SCU already setup/enabled, return */
if (readl(&scu->scu_ctrl) & SCU_CTRL_ENABLE)
return;
/* Invalidate all ways for all processors */
writel(0xFFFF, &scu->scu_inv_all);
/* Enable SCU - bit 0 */
reg = readl(&scu->scu_ctrl);
reg |= SCU_CTRL_ENABLE;
writel(reg, &scu->scu_ctrl);
}
void init_pmc_scratch(void)
{
struct pmc_ctlr *const pmc = (struct pmc_ctlr *)NV_PA_PMC_BASE;
int i;
/* SCRATCH0 is initialized by the boot ROM and shouldn't be cleared */
for (i = 0; i < 23; i++)
writel(0, &pmc->pmc_scratch1+i);
/* ODMDATA is for kernel use to determine RAM size, LP config, etc. */
writel(CONFIG_SYS_BOARD_ODMDATA, &pmc->pmc_scratch20);
}
void cpu_start(void)
{
struct pmux_tri_ctlr *pmt = (struct pmux_tri_ctlr *)NV_PA_APB_MISC_BASE;
/* enable JTAG */
writel(0xC0, &pmt->pmt_cfg_ctl);
if (s_first_boot) {
/*
* Need to set this before cold-booting,
* otherwise we'll end up in an infinite loop.
*/
s_first_boot = 0;
cold_boot();
}
}
void tegra2_start()
{
if (s_first_boot) {
/* Init Debug UART Port (115200 8n1) */
uart_init();
/* Init PMC scratch memory */
init_pmc_scratch();
}
#ifdef CONFIG_ENABLE_CORTEXA9
/* take the mpcore out of reset */
cpu_start();
/* configure cache */
cache_configure();
#endif
}

View File

@@ -0,0 +1,104 @@
/*
* (C) Copyright 2010-2011
* NVIDIA Corporation <www.nvidia.com>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <asm/types.h>
/* Stabilization delays, in usec */
#define PLL_STABILIZATION_DELAY (300)
#define IO_STABILIZATION_DELAY (1000)
#define NVBL_PLLP_KHZ (216000)
#define PLLX_ENABLED (1 << 30)
#define CCLK_BURST_POLICY 0x20008888
#define SUPER_CCLK_DIVIDER 0x80000000
/* Calculate clock fractional divider value from ref and target frequencies */
#define CLK_DIVIDER(REF, FREQ) ((((REF) * 2) / FREQ) - 2)
/* Calculate clock frequency value from reference and clock divider value */
#define CLK_FREQUENCY(REF, REG) (((REF) * 2) / (REG + 2))
/* AVP/CPU ID */
#define PG_UP_TAG_0_PID_CPU 0x55555555 /* CPU aka "a9" aka "mpcore" */
#define PG_UP_TAG_0 0x0
#define CORESIGHT_UNLOCK 0xC5ACCE55;
/* AP20-Specific Base Addresses */
/* AP20 Base physical address of SDRAM. */
#define AP20_BASE_PA_SDRAM 0x00000000
/* AP20 Base physical address of internal SRAM. */
#define AP20_BASE_PA_SRAM 0x40000000
/* AP20 Size of internal SRAM (256KB). */
#define AP20_BASE_PA_SRAM_SIZE 0x00040000
/* AP20 Base physical address of flash. */
#define AP20_BASE_PA_NOR_FLASH 0xD0000000
/* AP20 Base physical address of boot information table. */
#define AP20_BASE_PA_BOOT_INFO AP20_BASE_PA_SRAM
/*
* Super-temporary stacks for EXTREMELY early startup. The values chosen for
* these addresses must be valid on ALL SOCs because this value is used before
* we are able to differentiate between the SOC types.
*
* NOTE: The since CPU's stack will eventually be moved from IRAM to SDRAM, its
* stack is placed below the AVP stack. Once the CPU stack has been moved,
* the AVP is free to use the IRAM the CPU stack previously occupied if
* it should need to do so.
*
* NOTE: In multi-processor CPU complex configurations, each processor will have
* its own stack of size CPU_EARLY_BOOT_STACK_SIZE. CPU 0 will have a
* limit of CPU_EARLY_BOOT_STACK_LIMIT. Each successive CPU will have a
* stack limit that is CPU_EARLY_BOOT_STACK_SIZE less then the previous
* CPU.
*/
/* Common AVP early boot stack limit */
#define AVP_EARLY_BOOT_STACK_LIMIT \
(AP20_BASE_PA_SRAM + (AP20_BASE_PA_SRAM_SIZE/2))
/* Common AVP early boot stack size */
#define AVP_EARLY_BOOT_STACK_SIZE 0x1000
/* Common CPU early boot stack limit */
#define CPU_EARLY_BOOT_STACK_LIMIT \
(AVP_EARLY_BOOT_STACK_LIMIT - AVP_EARLY_BOOT_STACK_SIZE)
/* Common CPU early boot stack size */
#define CPU_EARLY_BOOT_STACK_SIZE 0x1000
#define EXCEP_VECTOR_CPU_RESET_VECTOR (NV_PA_EVP_BASE + 0x100)
#define CSITE_CPU_DBG0_LAR (NV_PA_CSITE_BASE + 0x10FB0)
#define CSITE_CPU_DBG1_LAR (NV_PA_CSITE_BASE + 0x12FB0)
#define FLOW_CTLR_HALT_COP_EVENTS (NV_PA_FLOW_BASE + 4)
#define FLOW_MODE_STOP 2
#define HALT_COP_EVENT_JTAG (1 << 28)
#define HALT_COP_EVENT_IRQ_1 (1 << 11)
#define HALT_COP_EVENT_FIQ_1 (1 << 9)
/* Prototypes */
void tegra2_start(void);
void uart_init(void);
void udelay(unsigned long);
void cold_boot(void);
void cache_configure(void);

View File

@@ -0,0 +1,88 @@
/*
* (C) Copyright 2010,2011
* NVIDIA Corporation <www.nvidia.com>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#include <asm/io.h>
#include <asm/arch/sys_proto.h>
#include <asm/arch/tegra2.h>
#include <asm/arch/pmc.h>
DECLARE_GLOBAL_DATA_PTR;
/*
* Boot ROM initializes the odmdata in APBDEV_PMC_SCRATCH20_0,
* so we are using this value to identify memory size.
*/
unsigned int query_sdram_size(void)
{
struct pmc_ctlr *const pmc = (struct pmc_ctlr *)NV_PA_PMC_BASE;
u32 reg;
reg = readl(&pmc->pmc_scratch20);
debug("pmc->pmc_scratch20 (ODMData) = 0x%08lX\n", reg);
/* bits 31:28 in OdmData are used for RAM size */
switch ((reg) >> 28) {
case 1:
return 0x10000000; /* 256 MB */
case 2:
return 0x20000000; /* 512 MB */
case 3:
default:
return 0x40000000; /* 1GB */
}
}
void s_init(void)
{
#ifndef CONFIG_ICACHE_OFF
icache_enable();
#endif
invalidate_dcache();
}
int dram_init(void)
{
unsigned long rs;
/* We do not initialise DRAM here. We just query the size */
gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
gd->bd->bi_dram[0].size = gd->ram_size = query_sdram_size();
/* Now check it dynamically */
rs = get_ram_size(CONFIG_SYS_SDRAM_BASE, gd->ram_size);
if (rs) {
printf("dynamic ram_size = %lu\n", rs);
gd->bd->bi_dram[0].size = gd->ram_size = rs;
}
return 0;
}
#ifdef CONFIG_DISPLAY_BOARDINFO
int checkboard(void)
{
printf("Board: %s\n", sysinfo.board_string);
return 0;
}
#endif /* CONFIG_DISPLAY_BOARDINFO */

View File

@@ -1,5 +1,9 @@
#
# Copyright (C) 2009 Freescale Semiconductor, Inc.
# (C) Copyright 2010,2011
# NVIDIA Corporation <www.nvidia.com>
#
# (C) Copyright 2002
# Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
#
# See file CREDITS for list of people who contributed to this
# project.
@@ -20,11 +24,5 @@
# MA 02111-1307 USA
#
#
# mpc8569mds board
#
ifndef NAND_SPL
ifeq ($(CONFIG_NAND), y)
LDSCRIPT := $(TOPDIR)/$(CPUDIR)/u-boot-nand.lds
endif
endif
# Use ARMv4 for Tegra2 - initial code runs on the AVP, which is an ARM7TDI.
PLATFORM_CPPFLAGS += -march=armv4

View File

@@ -0,0 +1,159 @@
/*
* SoC-specific setup info
*
* (C) Copyright 2010,2011
* NVIDIA Corporation <www.nvidia.com>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <config.h>
#include <version.h>
_TEXT_BASE:
.word CONFIG_SYS_TEXT_BASE @ sdram load addr from config file
.global invalidate_dcache
invalidate_dcache:
mov pc, lr
.align 5
.global reset_cpu
reset_cpu:
ldr r1, rstctl @ get addr for global reset
@ reg
ldr r3, [r1]
orr r3, r3, #0x10
str r3, [r1] @ force reset
mov r0, r0
_loop_forever:
b _loop_forever
rstctl:
.word PRM_RSTCTRL
.globl lowlevel_init
lowlevel_init:
ldr sp, SRAM_STACK
str ip, [sp]
mov ip, lr
bl s_init @ go setup pll, mux & memory
ldr ip, [sp]
mov lr, ip
mov pc, lr @ back to arch calling code
.globl startup_cpu
startup_cpu:
@ Initialize the AVP, clocks, and memory controller
@ SDRAM is guaranteed to be on at this point
ldr r0, =cold_boot @ R0 = reset vector for CPU
bl start_cpu @ start the CPU
@ Transfer control to the AVP code
bl halt_avp
@ Should never get here
_loop_forever2:
b _loop_forever2
.globl cache_configure
cache_configure:
stmdb r13!,{r14}
@ invalidate instruction cache
mov r1, #0
mcr p15, 0, r1, c7, c5, 0
@ invalidate the i&d tlb entries
mcr p15, 0, r1, c8, c5, 0
mcr p15, 0, r1, c8, c6, 0
@ enable instruction cache
mrc p15, 0, r1, c1, c0, 0
orr r1, r1, #(1<<12)
mcr p15, 0, r1, c1, c0, 0
bl enable_scu
@ enable SMP mode and FW for CPU0, by writing to Auxiliary Ctl reg
mrc p15, 0, r0, c1, c0, 1
orr r0, r0, #0x41
mcr p15, 0, r0, c1, c0, 1
@ Now flush the Dcache
mov r0, #0
@ 256 cache lines
mov r1, #256
invalidate_loop:
add r1, r1, #-1
mov r0, r1, lsl #5
@ invalidate d-cache using line (way0)
mcr p15, 0, r0, c7, c6, 2
orr r2, r0, #(1<<30)
@ invalidate d-cache using line (way1)
mcr p15, 0, r2, c7, c6, 2
orr r2, r0, #(2<<30)
@ invalidate d-cache using line (way2)
mcr p15, 0, r2, c7, c6, 2
orr r2, r0, #(3<<30)
@ invalidate d-cache using line (way3)
mcr p15, 0, r2, c7, c6, 2
cmp r1, #0
bne invalidate_loop
@ FIXME: should have ap20's L2 disabled too?
invalidate_done:
ldmia r13!,{pc}
.globl cold_boot
cold_boot:
msr cpsr_c, #0xD3
@ Check current processor: CPU or AVP?
@ If CPU, go to CPU boot code, else continue on AVP path
ldr r0, =NV_PA_PG_UP_BASE
ldr r1, [r0]
ldr r2, =PG_UP_TAG_AVP
@ are we the CPU?
ldr sp, CPU_STACK
cmp r1, r2
@ yep, we are the CPU
bne _armboot_start
@ AVP initialization follows this path
ldr sp, AVP_STACK
@ Init AVP and start CPU
b startup_cpu
@ the literal pools origin
.ltorg
SRAM_STACK:
.word LOW_LEVEL_SRAM_STACK
AVP_STACK:
.word EARLY_AVP_STACK
CPU_STACK:
.word EARLY_CPU_STACK

View File

@@ -1,6 +1,6 @@
/*
* (C) Copyright 2010
* Dirk Eibach, Guntermann & Drunck GmbH, eibach@gdsys.de
* (C) Copyright 2010,2011
* NVIDIA Corporation <www.nvidia.com>
*
* See file CREDITS for list of people who contributed to this
* project.
@@ -21,17 +21,15 @@
* MA 02111-1307 USA
*/
#ifndef _FPGA_H_
#define _FPGA_H_
#include <common.h>
static inline u16 fpga_get_reg(unsigned reg)
#ifdef CONFIG_DISPLAY_CPUINFO
/* Print CPU information */
int print_cpuinfo(void)
{
return in_le16((void *)(CONFIG_SYS_FPGA_BASE + reg));
}
puts("TEGRA2\n");
static inline void fpga_set_reg(unsigned reg, u16 val)
{
return out_le16((void *)(CONFIG_SYS_FPGA_BASE + reg), val);
/* TBD: Add printf of major/minor rev info, stepping, etc. */
return 0;
}
#endif
#endif /* CONFIG_DISPLAY_CPUINFO */

View File

@@ -0,0 +1,122 @@
/*
* (C) Copyright 2010,2011
* NVIDIA Corporation <www.nvidia.com>
*
* (C) Copyright 2008
* Texas Instruments
*
* Richard Woodruff <r-woodruff2@ti.com>
* Syed Moahmmed Khasim <khasim@ti.com>
*
* (C) Copyright 2002
* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
* Marius Groeger <mgroeger@sysgo.de>
* Alex Zuepke <azu@sysgo.de>
*
* (C) Copyright 2002
* Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#include <asm/io.h>
#include <asm/arch/tegra2.h>
DECLARE_GLOBAL_DATA_PTR;
struct timerus *timer_base = (struct timerus *)NV_PA_TMRUS_BASE;
/* counter runs at 1MHz */
#define TIMER_CLK (1000000)
#define TIMER_LOAD_VAL 0xffffffff
/* timer without interrupts */
void reset_timer(void)
{
reset_timer_masked();
}
ulong get_timer(ulong base)
{
return get_timer_masked() - base;
}
void set_timer(ulong t)
{
gd->tbl = t;
}
/* delay x useconds */
void __udelay(unsigned long usec)
{
long tmo = usec * (TIMER_CLK / 1000) / 1000;
unsigned long now, last = readl(&timer_base->cntr_1us);
while (tmo > 0) {
now = readl(&timer_base->cntr_1us);
if (last > now) /* count up timer overflow */
tmo -= TIMER_LOAD_VAL - last + now;
else
tmo -= now - last;
last = now;
}
}
void reset_timer_masked(void)
{
/* reset time, capture current incrementer value time */
gd->lastinc = readl(&timer_base->cntr_1us) / (TIMER_CLK/CONFIG_SYS_HZ);
gd->tbl = 0; /* start "advancing" time stamp from 0 */
}
ulong get_timer_masked(void)
{
ulong now;
/* current tick value */
now = readl(&timer_base->cntr_1us) / (TIMER_CLK / CONFIG_SYS_HZ);
if (now >= gd->lastinc) /* normal mode (non roll) */
/* move stamp forward with absolute diff ticks */
gd->tbl += (now - gd->lastinc);
else /* we have rollover of incrementer */
gd->tbl += ((TIMER_LOAD_VAL / (TIMER_CLK / CONFIG_SYS_HZ))
- gd->lastinc) + now;
gd->lastinc = now;
return gd->tbl;
}
/*
* This function is derived from PowerPC code (read timebase as long long).
* On ARM it just returns the timer value.
*/
unsigned long long get_ticks(void)
{
return get_timer(0);
}
/*
* This function is derived from PowerPC code (timebase clock frequency).
* On ARM it returns the number of timer ticks per second.
*/
ulong get_tbclk(void)
{
return CONFIG_SYS_HZ;
}

View File

@@ -66,11 +66,13 @@ SECTIONS
*(.dynsym)
}
_end = .;
.bss __rel_dyn_start (OVERLAY) : {
__bss_start = .;
*(.bss)
. = ALIGN(4);
_end = .;
__bss_end__ = .;
}
/DISCARD/ : { *(.dynstr*) }

View File

@@ -0,0 +1,46 @@
#
# (C) Copyright 2000-2006
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
include $(TOPDIR)/config.mk
LIB = $(obj)lib$(SOC).o
COBJS = timer.o clock.o
SOBJS = lowlevel.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS))
all: $(obj).depend $(LIB)
$(LIB): $(OBJS)
$(call cmd_link_o_target, $(OBJS))
#########################################################################
# defines $(obj).depend target
include $(SRCTREE)/rules.mk
sinclude $(obj).depend
#########################################################################

View File

@@ -0,0 +1,56 @@
/*
* (C) Copyright 2009 ST-Ericsson
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#include <asm/io.h>
#include <asm/arch/hardware.h>
DECLARE_GLOBAL_DATA_PTR;
struct clkrst {
unsigned int pcken;
unsigned int pckdis;
unsigned int kcken;
unsigned int kckdis;
};
static unsigned int clkrst_base[] = {
U8500_CLKRST1_BASE,
U8500_CLKRST2_BASE,
U8500_CLKRST3_BASE,
0,
U8500_CLKRST5_BASE,
U8500_CLKRST6_BASE,
U8500_CLKRST7_BASE, /* ED only */
};
/* Turn on peripheral clock at PRCC level */
void u8500_clock_enable(int periph, int cluster, int kern)
{
struct clkrst *clkrst = (struct clkrst *) clkrst_base[periph - 1];
if (kern != -1)
writel(1 << kern, &clkrst->kcken);
if (cluster != -1)
writel(1 << cluster, &clkrst->pcken);
}

View File

@@ -1,7 +1,8 @@
/*
* [origin: Linux kernel include/asm-arm/arch-at91/io.h]
* (C) Copyright 2011 ST-Ericsson
*
* Copyright (C) 2003 SAN People
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -15,29 +16,20 @@
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#ifndef __ASM_ARCH_IO_H
#define __ASM_ARCH_IO_H
#include <config.h>
#include <asm/io.h>
.globl lowlevel_init
lowlevel_init:
mov pc, lr
#ifdef CONFIG_AT91_LEGACY
static inline unsigned int at91_sys_read(unsigned int reg_offset)
{
void *addr = (void *)AT91_BASE_SYS;
return __raw_readl(addr + reg_offset);
}
static inline void at91_sys_write(unsigned int reg_offset, unsigned long value)
{
void *addr = (void *)AT91_BASE_SYS;
__raw_writel(value, addr + reg_offset);
}
#endif
#endif
.align 5
.globl reset_cpu
reset_cpu:
ldr r0, =CFG_PRCMU_BASE
ldr r1, =0x1
str r1, [r0, #0x228]
_loop_forever:
b _loop_forever

View File

@@ -0,0 +1,154 @@
/*
* Copyright (C) 2010 Linaro Limited
* John Rigby <john.rigby@linaro.org>
*
* Based on original from Linux kernel source and
* internal ST-Ericsson U-Boot source.
* (C) Copyright 2009 Alessandro Rubini
* (C) Copyright 2010 ST-Ericsson
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#include <asm/io.h>
#include <asm/arch/hardware.h>
DECLARE_GLOBAL_DATA_PTR;
/*
* The MTU device has some interrupt control registers
* followed by 4 timers.
*/
/* The timers */
struct u8500_mtu_timer {
u32 lr; /* Load value */
u32 cv; /* Current value */
u32 cr; /* Control reg */
u32 bglr; /* ??? */
};
/* The MTU that contains the timers */
struct u8500_mtu {
u32 imsc; /* Interrupt mask set/clear */
u32 ris; /* Raw interrupt status */
u32 mis; /* Masked interrupt status */
u32 icr; /* Interrupt clear register */
struct u8500_mtu_timer pt[4];
};
/* bits for the control register */
#define MTU_CR_ONESHOT 0x01 /* if 0 = wraps reloading from BGLR */
#define MTU_CR_32BITS 0x02
#define MTU_CR_PRESCALE_1 0x00
#define MTU_CR_PRESCALE_16 0x04
#define MTU_CR_PRESCALE_256 0x08
#define MTU_CR_PRESCALE_MASK 0x0c
#define MTU_CR_PERIODIC 0x40 /* if 0 = free-running */
#define MTU_CR_ENA 0x80
/*
* The MTU is clocked at 133 MHz by default. (V1 and later)
*/
#define TIMER_CLOCK (133 * 1000 * 1000 / 16)
#define COUNT_TO_USEC(x) ((x) * 16 / 133)
#define USEC_TO_COUNT(x) ((x) * 133 / 16)
#define TICKS_PER_HZ (TIMER_CLOCK / CONFIG_SYS_HZ)
#define TICKS_TO_HZ(x) ((x) / TICKS_PER_HZ)
#define TIMER_LOAD_VAL 0xffffffff
/*
* MTU timer to use (from 0 to 3).
*/
#define MTU_TIMER 2
static struct u8500_mtu_timer *timer_base =
&((struct u8500_mtu *)U8500_MTU0_BASE_V1)->pt[MTU_TIMER];
/* macro to read the 32 bit timer: since it decrements, we invert read value */
#define READ_TIMER() (~readl(&timer_base->cv))
/* Configure a free-running, auto-wrap counter with /16 prescaler */
int timer_init(void)
{
writel(MTU_CR_ENA | MTU_CR_PRESCALE_16 | MTU_CR_32BITS,
&timer_base->cr);
return 0;
}
ulong get_timer_masked(void)
{
/* current tick value */
ulong now = TICKS_TO_HZ(READ_TIMER());
if (now >= gd->lastinc) /* normal (non rollover) */
gd->tbl += (now - gd->lastinc);
else /* rollover */
gd->tbl += (TICKS_TO_HZ(TIMER_LOAD_VAL) - gd->lastinc) + now;
gd->lastinc = now;
return gd->tbl;
}
/* Delay x useconds */
void __udelay(ulong usec)
{
long tmo = usec * (TIMER_CLOCK / 1000) / 1000;
ulong now, last = READ_TIMER();
while (tmo > 0) {
now = READ_TIMER();
if (now > last) /* normal (non rollover) */
tmo -= now - last;
else /* rollover */
tmo -= TIMER_LOAD_VAL - last + now;
last = now;
}
}
ulong get_timer(ulong base)
{
return get_timer_masked() - base;
}
void set_timer(ulong t)
{
gd->tbl = t;
}
/*
* Emulation of Power architecture long long timebase.
*
* TODO: Support gd->tbu for real long long timebase.
*/
unsigned long long get_ticks(void)
{
return get_timer(0);
}
/*
* Emulation of Power architecture timebase.
* NB: Low resolution compared to Power tbclk.
*/
ulong get_tbclk(void)
{
return CONFIG_SYS_HZ;
}

View File

@@ -27,6 +27,11 @@ BIG_ENDIAN = y
PLATFORM_RELFLAGS += -fno-common -ffixed-r8 -msoft-float -mbig-endian
PLATFORM_CPPFLAGS += -mbig-endian -march=armv5te -mtune=strongarm1100
# -fdata-sections triggers "section .bss overlaps section .rel.dyn" linker error
PLATFORM_RELFLAGS += -ffunction-sections
LDFLAGS_u-boot += --gc-sections
# =========================================================================
#
# Supply options according to compiler version

View File

@@ -36,8 +36,6 @@
#include <asm/arch/ixp425.h>
#include <asm/system.h>
ulong loops_per_jiffy;
static void cache_flush(void);
#if defined(CONFIG_DISPLAY_CPUINFO)
@@ -51,17 +49,14 @@ int print_cpuinfo (void)
puts("CPU: Intel IXP425 at ");
switch ((id & 0x000003f0) >> 4) {
case 0x1c:
loops_per_jiffy = 887467;
speed = 533;
break;
case 0x1d:
loops_per_jiffy = 666016;
speed = 400;
break;
case 0x1f:
loops_per_jiffy = 442901;
speed = 266;
break;
}

View File

@@ -27,6 +27,7 @@ LIB := $(obj)libnpe.o
LOCAL_CFLAGS += -I$(TOPDIR)/arch/arm/cpu/ixp/npe/include -DCONFIG_IXP425_COMPONENT_ETHDB -D__linux
CFLAGS += $(LOCAL_CFLAGS)
CPPFLAGS += $(LOCAL_CFLAGS) # needed for depend
HOSTCFLAGS += $(LOCAL_CFLAGS)
COBJS-$(CONFIG_IXP4XX_NPE) := npe.o \

View File

@@ -359,36 +359,53 @@ static int npe_init(struct eth_device *dev, bd_t * bis)
debug("%s: 1\n", __FUNCTION__);
miiphy_read (dev->name, p_npe->phy_no, MII_BMSR, &reg_short);
#ifdef CONFIG_MII_NPE0_FIXEDLINK
if (0 == p_npe->eth_id) {
speed = CONFIG_MII_NPE0_SPEED;
duplex = CONFIG_MII_NPE0_FULLDUPLEX ? FULL : HALF;
} else
#endif
#ifdef CONFIG_MII_NPE1_FIXEDLINK
if (1 == p_npe->eth_id) {
speed = CONFIG_MII_NPE1_SPEED;
duplex = CONFIG_MII_NPE1_FULLDUPLEX ? FULL : HALF;
} else
#endif
{
miiphy_read(dev->name, p_npe->phy_no, MII_BMSR, &reg_short);
/*
* Wait if PHY is capable of autonegotiation and autonegotiation is not complete
*/
if ((reg_short & BMSR_ANEGCAPABLE) && !(reg_short & BMSR_ANEGCOMPLETE)) {
puts ("Waiting for PHY auto negotiation to complete");
i = 0;
while (!(reg_short & BMSR_ANEGCOMPLETE)) {
/*
* Timeout reached ?
*/
if (i > PHY_AUTONEGOTIATE_TIMEOUT) {
puts (" TIMEOUT !\n");
break;
}
/*
* Wait if PHY is capable of autonegotiation and
* autonegotiation is not complete
*/
if ((reg_short & BMSR_ANEGCAPABLE) &&
!(reg_short & BMSR_ANEGCOMPLETE)) {
puts("Waiting for PHY auto negotiation to complete");
i = 0;
while (!(reg_short & BMSR_ANEGCOMPLETE)) {
/*
* Timeout reached ?
*/
if (i > PHY_AUTONEGOTIATE_TIMEOUT) {
puts(" TIMEOUT !\n");
break;
}
if ((i++ % 1000) == 0) {
putc ('.');
miiphy_read (dev->name, p_npe->phy_no, MII_BMSR, &reg_short);
if ((i++ % 1000) == 0) {
putc('.');
miiphy_read(dev->name, p_npe->phy_no,
MII_BMSR, &reg_short);
}
udelay(1000); /* 1 ms */
}
udelay (1000); /* 1 ms */
puts(" done\n");
/* another 500 ms (results in faster booting) */
udelay(500000);
}
puts (" done\n");
udelay (500000); /* another 500 ms (results in faster booting) */
speed = miiphy_speed(dev->name, p_npe->phy_no);
duplex = miiphy_duplex(dev->name, p_npe->phy_no);
}
speed = miiphy_speed (dev->name, p_npe->phy_no);
duplex = miiphy_duplex (dev->name, p_npe->phy_no);
if (p_npe->print_speed) {
p_npe->print_speed = 0;
printf ("ENET Speed is %d Mbps - %s duplex connection\n",
@@ -621,9 +638,12 @@ int npe_initialize(bd_t * bis)
if (ixFeatureCtrlDeviceRead() == IX_FEATURE_CTRL_DEVICE_TYPE_IXP42X) {
switch (ixFeatureCtrlProductIdRead() & IX_FEATURE_CTRL_SILICON_STEPPING_MASK) {
case IX_FEATURE_CTRL_SILICON_TYPE_B0:
default: /* newer than B0 */
/*
* If it is B0 Silicon, we only enable port when its corresponding
* Eth Coprocessor is available.
* If it is B0 or newer Silicon, we
* only enable port when its
* corresponding Eth Coprocessor is
* available.
*/
if (ixFeatureCtrlComponentCheck(IX_FEATURECTRL_ETH0) ==
IX_FEATURE_CTRL_COMPONENT_ENABLED)

View File

@@ -65,7 +65,8 @@
.endm
.globl _start
_start: b reset
_start:
ldr pc, _reset
ldr pc, _undefined_instruction
ldr pc, _software_interrupt
ldr pc, _prefetch_abort
@@ -74,6 +75,7 @@ _start: b reset
ldr pc, _irq
ldr pc, _fiq
_reset: .word reset
_undefined_instruction: .word undefined_instruction
_software_interrupt: .word software_interrupt
_prefetch_abort: .word prefetch_abort
@@ -110,6 +112,10 @@ _bss_start_ofs:
.globl _bss_end_ofs
_bss_end_ofs:
.word __bss_end__ - _start
.globl _end_ofs
_end_ofs:
.word _end - _start
#ifdef CONFIG_USE_IRQ
@@ -163,12 +169,6 @@ reset:
str r1, [r2]
/* make sure flash is visible at 0 */
#if 0
ldr r2, =IXP425_EXP_CFG0
ldr r1, [r2]
orr r1, r1, #0x80000000
str r1, [r2]
#endif
mov r1, #CONFIG_SYS_SDR_CONFIG
ldr r2, =IXP425_SDR_CONFIG
str r1, [r2]
@@ -212,19 +212,6 @@ reset:
str r1, [r4]
DELAY_FOR 0x4000, r0
/* copy */
mov r0, #0
mov r4, r0
add r2, r0, #CONFIG_SYS_MONITOR_LEN
mov r1, #0x10000000
mov r5, r1
30:
ldr r3, [r0], #4
str r3, [r1], #4
cmp r0, r2
bne 30b
/* invalidate I & D caches & BTB */
mcr p15, 0, r0, c7, c7, 0
CPWAIT r0
@@ -237,19 +224,12 @@ reset:
mcr p15, 0, r0, c7, c10, 4
CPWAIT r0
/* move flash to 0x50000000 */
/* remove flash mirror at 0x00000000 */
ldr r2, =IXP425_EXP_CFG0
ldr r1, [r2]
bic r1, r1, #0x80000000
str r1, [r2]
nop
nop
nop
nop
nop
nop
/* invalidate I & Data TLB */
mcr p15, 0, r0, c8, c7, 0
CPWAIT r0
@@ -265,7 +245,7 @@ reset:
orr r0,r0,#0x13
msr cpsr,r0
/* Set stackpointer in internal RAM to call board_init_f */
/* Set initial stackpointer in SDRAM to call board_init_f */
call_board_init_f:
ldr sp, =(CONFIG_SYS_INIT_SP_ADDR)
bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
@@ -571,33 +551,5 @@ reset_cpu:
str r1, [r2]
b reset_endless
reset_endless:
b reset_endless
#ifdef CONFIG_USE_IRQ
.LC0: .word loops_per_jiffy
/*
* 0 <= r0 <= 2000
*/
.globl __udelay
__udelay:
mov r2, #0x6800
orr r2, r2, #0x00db
mul r0, r2, r0
ldr r2, .LC0
ldr r2, [r2] @ max = 0x0fffffff
mov r0, r0, lsr #11 @ max = 0x00003fff
mov r2, r2, lsr #11 @ max = 0x0003ffff
mul r0, r2, r0 @ max = 2^32-1
movs r0, r0, lsr #6
delay_loop:
subs r0, r0, #1
bne delay_loop
mov pc, lr
#endif /* CONFIG_USE_IRQ */

View File

@@ -1,4 +1,7 @@
/*
* (C) Copyright 2010
* Michael Schwingen, michael@schwingen.org
*
* (C) Copyright 2006
* Stefan Roese, DENX Software Engineering, sr@denx.de.
*
@@ -31,105 +34,94 @@
#include <common.h>
#include <asm/arch/ixp425.h>
#include <asm/io.h>
#include <div64.h>
#ifdef CONFIG_TIMER_IRQ
#define FREQ 66666666
#define CLOCK_TICK_RATE (((FREQ / CONFIG_SYS_HZ & ~IXP425_OST_RELOAD_MASK) + 1) * CONFIG_SYS_HZ)
#define LATCH ((CLOCK_TICK_RATE + CONFIG_SYS_HZ/2) / CONFIG_SYS_HZ) /* For divider */
DECLARE_GLOBAL_DATA_PTR;
/*
* When interrupts are enabled, use timer 2 for time/delay generation...
* The IXP42x time-stamp timer runs at 2*OSC_IN (66.666MHz when using a
* 33.333MHz crystal).
*/
static volatile ulong timestamp;
static void timer_isr(void *data)
static inline unsigned long long tick_to_time(unsigned long long tick)
{
unsigned int *pTime = (unsigned int *)data;
(*pTime)++;
/*
* Reset IRQ source
*/
*IXP425_OSST = IXP425_OSST_TIMER_2_PEND;
tick *= CONFIG_SYS_HZ;
do_div(tick, CONFIG_IXP425_TIMER_CLK);
return tick;
}
ulong get_timer (ulong base)
static inline unsigned long long time_to_tick(unsigned long long time)
{
return timestamp - base;
time *= CONFIG_IXP425_TIMER_CLK;
do_div(time, CONFIG_SYS_HZ);
return time;
}
void reset_timer (void)
static inline unsigned long long us_to_tick(unsigned long long us)
{
timestamp = 0;
us = us * CONFIG_IXP425_TIMER_CLK + 999999;
do_div(us, 1000000);
return us;
}
int timer_init (void)
unsigned long long get_ticks(void)
{
/* install interrupt handler for timer */
irq_install_handler(IXP425_TIMER_2_IRQ, timer_isr, (void *)&timestamp);
ulong now = readl(IXP425_OSTS_B);
/* setup the Timer counter value */
*IXP425_OSRT2 = (LATCH & ~IXP425_OST_RELOAD_MASK) | IXP425_OST_ENABLE;
/* enable timer irq */
*IXP425_ICMR = (1 << IXP425_TIMER_2_IRQ);
return 0;
}
#else
ulong get_timer (ulong base)
{
return get_timer_masked () - base;
}
void ixp425_udelay(unsigned long usec)
{
/*
* This function has a max usec, but since it is called from udelay
* we should not have to worry... be happy
*/
unsigned long usecs = CONFIG_SYS_HZ/1000000L & ~IXP425_OST_RELOAD_MASK;
*IXP425_OSST = IXP425_OSST_TIMER_1_PEND;
usecs |= IXP425_OST_ONE_SHOT | IXP425_OST_ENABLE;
*IXP425_OSRT1 = usecs;
while (!(*IXP425_OSST & IXP425_OSST_TIMER_1_PEND));
}
void __udelay (unsigned long usec)
{
while (usec--) ixp425_udelay(1);
}
static ulong reload_constant = 0xfffffff0;
void reset_timer_masked (void)
{
ulong reload = reload_constant | IXP425_OST_ONE_SHOT | IXP425_OST_ENABLE;
*IXP425_OSST = IXP425_OSST_TIMER_1_PEND;
*IXP425_OSRT1 = reload;
}
ulong get_timer_masked (void)
{
/*
* Note that it is possible for this to wrap!
* In this case we return max.
*/
ulong current = *IXP425_OST1;
if (*IXP425_OSST & IXP425_OSST_TIMER_1_PEND)
{
return reload_constant;
if (readl(IXP425_OSST) & IXP425_OSST_TIMER_TS_PEND) {
/* rollover of timestamp timer register */
gd->timestamp += (0xFFFFFFFF - gd->lastinc) + now + 1;
writel(IXP425_OSST_TIMER_TS_PEND, IXP425_OSST);
} else {
/* move stamp forward with absolut diff ticks */
gd->timestamp += (now - gd->lastinc);
}
return (reload_constant - current);
gd->lastinc = now;
return gd->timestamp;
}
void reset_timer_masked(void)
{
/* capture current timestamp counter */
gd->lastinc = readl(IXP425_OSTS_B);
/* start "advancing" time stamp from 0 */
gd->timestamp = 0;
}
void reset_timer(void)
{
reset_timer_masked();
}
ulong get_timer_masked(void)
{
return tick_to_time(get_ticks());
}
ulong get_timer(ulong base)
{
return get_timer_masked() - base;
}
void set_timer(ulong t)
{
gd->timestamp = time_to_tick(t);
}
/* delay x useconds AND preserve advance timestamp value */
void __udelay(unsigned long usec)
{
unsigned long long tmp;
tmp = get_ticks() + us_to_tick(usec);
while (get_ticks() < tmp)
;
}
int timer_init(void)
{
writel(IXP425_OSST_TIMER_TS_PEND, IXP425_OSST);
return 0;
}
#endif

View File

@@ -31,8 +31,8 @@ SECTIONS
. = ALIGN(4);
.text :
{
arch/arm/cpu/ixp/start.o(.text)
*(.text)
arch/arm/cpu/ixp/start.o(.text*)
*(.text*)
}
. = ALIGN(4);
@@ -40,7 +40,7 @@ SECTIONS
. = ALIGN(4);
.data : {
*(.data)
*(.data*)
}
. = ALIGN(4);
@@ -63,11 +63,13 @@ SECTIONS
*(.dynsym)
}
_end = .;
.bss __rel_dyn_start (OVERLAY) : {
__bss_start = .;
*(.bss)
*(.bss*)
. = ALIGN(4);
_end = .;
__bss_end__ = .;
}
/DISCARD/ : { *(.dynstr*) }

View File

@@ -87,6 +87,10 @@ _bss_start_ofs:
.globl _bss_end_ofs
_bss_end_ofs:
.word __bss_end__ - _start
.globl _end_ofs
_end_ofs:
.word _end - _start
#ifdef CONFIG_USE_IRQ

View File

@@ -63,11 +63,13 @@ SECTIONS
*(.dynsym)
}
_end = .;
.bss __rel_dyn_start (OVERLAY) : {
__bss_start = .;
*(.bss)
. = ALIGN(4);
_end = .;
__bss_end__ = .;
}
/DISCARD/ : { *(.dynstr*) }

View File

@@ -28,7 +28,6 @@ LIB = $(obj)lib$(CPU).o
START = start.o
COBJS += cpu.o
COBJS += i2c.o
COBJS += pxafb.o
COBJS += timer.o
COBJS += usb.o

View File

@@ -318,3 +318,13 @@ int arch_cpu_init(void)
pxa_clock_setup();
return 0;
}
void i2c_clk_enable(void)
{
/* set the global I2C clock on */
#ifdef CONFIG_CPU_MONAHANS
writel(readl(CKENB) | (CKENB_4_I2C), CKENB);
#else
writel(readl(CKEN) | CKEN14_I2C, CKEN);
#endif
}

View File

@@ -104,6 +104,10 @@ _bss_start_ofs:
.globl _bss_end_ofs
_bss_end_ofs:
.word __bss_end__ - _start
.globl _end_ofs
_end_ofs:
.word _end - _start
#ifdef CONFIG_USE_IRQ

View File

@@ -63,11 +63,13 @@ SECTIONS
*(.dynsym)
}
_end = .;
.bss __rel_dyn_start (OVERLAY) : {
__bss_start = .;
*(.bss)
. = ALIGN(4);
_end = .;
__bss_end__ = .;
}
/DISCARD/ : { *(.dynstr*) }

View File

@@ -78,6 +78,10 @@ _bss_start_ofs:
.globl _bss_end_ofs
_bss_end_ofs:
.word __bss_end__ - _start
.globl _end_ofs
_end_ofs:
.word _end - _start
#ifdef CONFIG_USE_IRQ

View File

@@ -63,11 +63,13 @@ SECTIONS
*(.dynsym)
}
_end = .;
.bss __rel_dyn_start (OVERLAY) : {
__bss_start = .;
*(.bss)
. = ALIGN(4);
_end = .;
__bss_end__ = .;
}
/DISCARD/ : { *(.dynstr*) }

View File

@@ -88,6 +88,10 @@ _bss_start_ofs:
.globl _bss_end_ofs
_bss_end_ofs:
.word __bss_end__ - _start
.globl _end_ofs
_end_ofs:
.word _end - _start
#ifdef CONFIG_USE_IRQ

View File

@@ -66,11 +66,13 @@ SECTIONS
*(.dynsym)
}
_end = .;
.bss __rel_dyn_start (OVERLAY) : {
__bss_start = .;
*(.bss)
. = ALIGN(4);
_end = .;
__bss_end__ = .;
}
/DISCARD/ : { *(.dynstr*) }

View File

@@ -0,0 +1,56 @@
/*
* (C) Copyright 2011
* Marvell Semiconductor <www.marvell.com>
* Written-by: Lei Wen <leiwen@marvell.com>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
* MA 02110-1301 USA
*/
/*
* This file should be included in board config header file.
*
* It supports common definitions for Armada100 platform
*/
#ifndef _ARMD1_CONFIG_H
#define _ARMD1_CONFIG_H
#define CONFIG_ARM926EJS 1 /* Basic Architecture */
#define CONFIG_SYS_TCLK (14745600) /* NS16550 clk config */
#define CONFIG_SYS_HZ_CLOCK (3250000) /* Timer Freq. 3.25MHZ */
#define CONFIG_MARVELL_MFP /* Enable mvmfp driver */
#define MV_MFPR_BASE ARMD1_MFPR_BASE
#define MV_UART_CONSOLE_BASE ARMD1_UART1_BASE
#define CONFIG_SYS_NS16550_IER (1 << 6) /* Bit 6 in UART_IER register
represents UART Unit Enable */
/*
* I2C definition
*/
#ifdef CONFIG_CMD_I2C
#define CONFIG_I2C_MV 1
#define CONFIG_MV_I2C_NUM 2
#define CONFIG_I2C_MULTI_BUS 1
#define CONFIG_MV_I2C_REG {0xd4011000, 0xd4025000}
#define CONFIG_HARD_I2C 1
#define CONFIG_SYS_I2C_SPEED 0
#define CONFIG_SYS_I2C_SLAVE 0xfe
#endif
#endif /* _ARMD1_CONFIG_H */

View File

@@ -37,28 +37,32 @@
* offset, pull,pF, drv,dF, edge,eF ,afn,aF
*/
/* UART1 */
#define MFP107_UART1_TXD MFP_REG(0x01ac) | MFP_AF1 | MFP_DRIVE_FAST
#define MFP107_UART1_RXD MFP_REG(0x01ac) | MFP_AF2 | MFP_DRIVE_FAST
#define MFP108_UART1_RXD MFP_REG(0x01b0) | MFP_AF1 | MFP_DRIVE_FAST
#define MFP108_UART1_TXD MFP_REG(0x01b0) | MFP_AF2 | MFP_DRIVE_FAST
#define MFP109_UART1_CTS MFP_REG(0x01b4) | MFP_AF1 | MFP_DRIVE_MEDIUM
#define MFP109_UART1_RTS MFP_REG(0x01b4) | MFP_AF2 | MFP_DRIVE_MEDIUM
#define MFP110_UART1_RTS MFP_REG(0x01b8) | MFP_AF1 | MFP_DRIVE_MEDIUM
#define MFP110_UART1_CTS MFP_REG(0x01b8) | MFP_AF2 | MFP_DRIVE_MEDIUM
#define MFP111_UART1_RI MFP_REG(0x01bc) | MFP_AF1 | MFP_DRIVE_MEDIUM
#define MFP111_UART1_DSR MFP_REG(0x01bc) | MFP_AF2 | MFP_DRIVE_MEDIUM
#define MFP112_UART1_DTR MFP_REG(0x01c0) | MFP_AF1 | MFP_DRIVE_MEDIUM
#define MFP112_UART1_DCD MFP_REG(0x01c0) | MFP_AF2 | MFP_DRIVE_MEDIUM
#define MFP107_UART1_TXD (MFP_REG(0x01ac) | MFP_AF1 | MFP_DRIVE_FAST)
#define MFP107_UART1_RXD (MFP_REG(0x01ac) | MFP_AF2 | MFP_DRIVE_FAST)
#define MFP108_UART1_RXD (MFP_REG(0x01b0) | MFP_AF1 | MFP_DRIVE_FAST)
#define MFP108_UART1_TXD (MFP_REG(0x01b0) | MFP_AF2 | MFP_DRIVE_FAST)
#define MFP109_UART1_CTS (MFP_REG(0x01b4) | MFP_AF1 | MFP_DRIVE_MEDIUM)
#define MFP109_UART1_RTS (MFP_REG(0x01b4) | MFP_AF2 | MFP_DRIVE_MEDIUM)
#define MFP110_UART1_RTS (MFP_REG(0x01b8) | MFP_AF1 | MFP_DRIVE_MEDIUM)
#define MFP110_UART1_CTS (MFP_REG(0x01b8) | MFP_AF2 | MFP_DRIVE_MEDIUM)
#define MFP111_UART1_RI (MFP_REG(0x01bc) | MFP_AF1 | MFP_DRIVE_MEDIUM)
#define MFP111_UART1_DSR (MFP_REG(0x01bc) | MFP_AF2 | MFP_DRIVE_MEDIUM)
#define MFP112_UART1_DTR (MFP_REG(0x01c0) | MFP_AF1 | MFP_DRIVE_MEDIUM)
#define MFP112_UART1_DCD (MFP_REG(0x01c0) | MFP_AF2 | MFP_DRIVE_MEDIUM)
/* UART2 */
#define MFP47_UART2_RXD MFP_REG(0x0028) | MFP_AF6 | MFP_DRIVE_MEDIUM
#define MFP48_UART2_TXD MFP_REG(0x002c) | MFP_AF6 | MFP_DRIVE_MEDIUM
#define MFP88_UART2_RXD MFP_REG(0x0160) | MFP_AF2 | MFP_DRIVE_MEDIUM
#define MFP89_UART2_TXD MFP_REG(0x0164) | MFP_AF2 | MFP_DRIVE_MEDIUM
#define MFP47_UART2_RXD (MFP_REG(0x0028) | MFP_AF6 | MFP_DRIVE_MEDIUM)
#define MFP48_UART2_TXD (MFP_REG(0x002c) | MFP_AF6 | MFP_DRIVE_MEDIUM)
#define MFP88_UART2_RXD (MFP_REG(0x0160) | MFP_AF2 | MFP_DRIVE_MEDIUM)
#define MFP89_UART2_TXD (MFP_REG(0x0164) | MFP_AF2 | MFP_DRIVE_MEDIUM)
/* UART3 */
#define MFPO8_UART3_RXD MFP_REG(0x06c) | MFP_AF2 | MFP_DRIVE_MEDIUM
#define MFPO9_UART3_TXD MFP_REG(0x070) | MFP_AF2 | MFP_DRIVE_MEDIUM
#define MFPO8_UART3_RXD (MFP_REG(0x06c) | MFP_AF2 | MFP_DRIVE_MEDIUM)
#define MFPO9_UART3_TXD (MFP_REG(0x070) | MFP_AF2 | MFP_DRIVE_MEDIUM)
/* I2c */
#define MFP105_CI2C_SDA (MFP_REG(0x1a4) | MFP_AF1 | MFP_DRIVE_MEDIUM)
#define MFP106_CI2C_SCL (MFP_REG(0x1a8) | MFP_AF1 | MFP_DRIVE_MEDIUM)
/* More macros can be defined here... */

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@@ -28,11 +28,10 @@
void at91_can_hw_init(void);
void at91_macb_hw_init(void);
void at91_mci_hw_init(void);
void at91_serial_hw_init(void);
void at91_serial0_hw_init(void);
void at91_serial1_hw_init(void);
void at91_serial2_hw_init(void);
void at91_serial3_hw_init(void);
void at91_seriald_hw_init(void);
void at91_spi0_hw_init(unsigned long cs_mask);
void at91_spi1_hw_init(unsigned long cs_mask);
void at91_uhp_hw_init(void);

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