Compare commits

..

1230 Commits

Author SHA1 Message Date
Tom Rini
e8ae0fa5ed Prepare v2013.01.01
Signed-off-by: Tom Rini <trini@ti.com>
2013-01-31 14:47:42 -05:00
Marek Vasut
bc8f446c17 vfat: Fix mkcksum argument sizes
In case a function argument is known/fixed size array in C, the argument is
still decoyed as pointer instead ( T f(U n[k]) ~= T fn(U *n) ) and therefore
calling sizeof on the function argument will result in the size of the pointer,
not the size of the array.

The VFAT code contains such a bug, this patch fixes it.

Reported-by: Aaron Williams <Aaron.Williams@cavium.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Tom Rini <tom.rini@gmail.com>
Cc: Aaron Williams <Aaron.Williams@cavium.com>
Tested-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
2013-01-31 14:46:43 -05:00
Lucas Stach
ad394e027f arm: fix CONFIG_DELAY_ENVIRONMENT to act like it claims in the README
No one expects to end up in a delayed environment if
CONFIG_DELAY_ENVIRONMENT isn't defined.

Signed-off-by: Lucas Stach <dev@lynxeye.de>
Acked-by: Simon Glass <sjg@chromium.org>
Acked-by: Allen Martin <amartin@nvidia.com>
2013-01-31 14:46:40 -05:00
Tom Rini
3a9d879f6f Prepare v2013.01
Signed-off-by: Tom Rini <trini@ti.com>
2013-01-15 14:47:42 -07:00
Łukasz Dałek
df3ad6c81d pxa: Save lr register in relocate_code function
When u-boot is compiled for PXA25x processor, pxa/start.S is calling
cpu_init_crit by BL instruction. BL is overwriting lr register so
relocate_code is going into infinite loop. This patch preservs lr
register in r12 before calling cpu_init_crit and after function returns
restores it.

Signed-off-by: Lukasz Dalek <luk0104@gmail.com>
Acked-by: Marek Vasut <marex@denx.de>
2013-01-14 16:22:00 -07:00
Tom Rini
981481958f Merge branch 'master' of git://git.denx.de/u-boot-video 2013-01-14 15:41:38 -07:00
Tom Rini
f1972e3255 Merge branch 'agust@denx.de' of git://git.denx.de/u-boot-staging 2013-01-14 15:30:31 -07:00
Peter Meerwald
dfe361098d twl4030: fix 'could could' in error messages
Signed-off-by: Peter Meerwald <p.meerwald@bct-electronic.com>
2013-01-14 23:22:37 +01:00
Tom Rini
a6720762c8 watchdog.h: Move hw_watchdog_init prototype to end, guard
In commit abbab70 we added a prototype for hw_watchdog_init, in a
Freescale i.MX watchdog driver.  We did not however guard it with an
__ASSEMBLY__ check and broke some platforms.  Move this to the end of
the file with other prototypes and guard it.

Signed-off-by: Tom Rini <trini@ti.com>
2013-01-14 13:10:07 -07:00
Wolfgang Denk
44a53b5743 VIDEO: better document the correct use of CONFIG_FB_ADDR
Signed-off-by: Wolfgang Denk <wd@denx.de>
cc: Anatolij Gustschin <agust@denx.de>
2013-01-14 20:16:51 +01:00
Nikita Kiryanov
dad631ccf7 lcd: restore ability to display 8 bpp BMPs on 16 bpp LCDs
Commit fb6a9aab7a (LCD: display 32bpp decompressed bitmap image)
broke the check that allowed U-Boot to display 8 bpp BMPs on a 16
bpp LCD screen, effectively turning this feature off.

Restore this feature by changing the check back to the same meaning
it originally had.
To avoid future confusion, the check has also been rephrased to make
its meaning clear.

Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
2013-01-14 20:16:45 +01:00
Albert ARIBAUD
a17617d655 Merge branch 'u-boot-imx/master' into 'u-boot-arm/master' 2013-01-14 17:00:02 +01:00
Albert ARIBAUD
1199c377cf Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master' 2013-01-14 15:21:00 +01:00
Ajay Kumar
e4660e0b73 video: exynos_fb: Make a call to draw_logo only when CONFIG_CMD_BMP is selected
Previously, the call to draw_logo() was happening irrespective
of whether we have selected logo or LCD console.
With this patch we call draw_logo() only when CONFIG_CMD_BMP is selected.

This would even fix the following compilation warning:
exynos_fb.c: In function 'draw_logo':
exynos_fb.c:74:8: warning: variable 'addr' set but not used
[-Wunused-but-set-variable]
exynos_fb.c:73:9: warning: variable 'y' set but not used
[-Wunused-but-set-variable]
exynos_fb.c:73:6: warning: variable 'x' set but not used
[-Wunused-but-set-variable]

Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-01-14 19:17:28 +09:00
Ajay Kumar
02a58b9340 video: exynos_dp: Remove unused variable disp_info
Remove unused variable disp_info to fix the following compilation warning:
exynos_dp.c: In function 'exynos_init_dp':
exynos_dp.c:860:23: warning: variable 'disp_info' set but not used
[-Wunused-but-set-variable]

Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-01-14 19:17:28 +09:00
Rajeshwari Shinde
d04df3c6ad I2C: S3C24X0: Resolve build error for VCMA9
This patch resolves the following build errors for I2C driver in
VCMA9:

In file included from s3c24x0_i2c.c:40:0:
s3c24x0_i2c.h:38:17: error: field 'id' has incomplete type
s3c24x0_i2c.c:70:39: error: 'CONFIG_MAX_I2C_NUM' undeclared here (not
in a function) s3c24x0_i2c.c:70:31: warning: 'i2c_bus' defined but
not used [-Wunused-variable] s3c24x0_i2c.c:72:12: warning:
'i2c_busses' defined but not used [-Wunused-variable]

Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-01-14 14:45:30 +09:00
Fabio Estevam
11d80af487 mx51evk: Add DVI output support
Add DVI output support and make it the default video output.

Currently the CLAA WVGA panel is supported, but this panel has to be purchased
separately, so using the DVI output as the default would allow more people to
try the splash screen feature on a mx51evk.

If someone still wants to use the CLAA WVGA, just set the panel variable as:
set panel claa

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2013-01-13 12:06:35 +01:00
Fabio Estevam
acbb4457ab mx6qsabresd: Fix booting the kernel from SDHC3
Since commit de7d02aeb (mx6qsabresd: add usdhc2 and usdhc4 support)
SDHC3 device node is no longer 0, which breaks loading a uImage from SDHC3.

Fix it by adapting the default environment to use CONFIG_SYS_MMC_ENV_DEV as the
correct mmc node for loading the kernel from.

While at it, go back to using SDHC3 as the default mmc, since we have Yocto
images that generate an SD card containing U-boot,kernel and rootfs, so it is
more convenient to keep using SDHC3 as it was originally.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2013-01-13 12:04:47 +01:00
Otavio Salvador
bf0c2245a2 mx6qsabre{auto, sd}: Add support to dynamically choose between fdt use or not
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Tested-by: Fabio Estevam <fabio.estevam@freescale.com>
2013-01-13 11:53:45 +01:00
Otavio Salvador
6efbe21990 mx6qsabrelite: Add support to dynamically choose between fdt use or not
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2013-01-13 11:53:45 +01:00
Otavio Salvador
e0df5353fb mx53loco: Add support to dynamically choose between fdt use or not
The CONFIG_SYS_CBSIZE has been change to 512 to avoid runtime errors as:

,---[ Runtime error ]
| Hit any key to stop autoboot:  0
| MX53LOCO U-Boot > pri netboot
| netboot=echo Booting from net ...; run netargs; if test ...
| prefetch abort
| pc : [<20747368>]          lr : [<20747365>]
| sp : af566e20  ip : 00000000     fp : 00000000
| r10: 00000002  r9 : af6dfc28     r8 : af566f58
| r7 : af6dfc10  r6 : 00000001     r5 : 00000002  r4 : 74206669
| r3 : 00000000  r2 : 00000060     r1 : 00000020  r0 : 0000018e
| Flags: nZCv  IRQs off  FIQs off  Mode SVC_32
| Resetting CPU ...
|
| resetting ...
`---

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2013-01-13 11:53:45 +01:00
Otavio Salvador
4c6b235059 mx28evk: Add support to dynamically choose between fdt use or not
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2013-01-13 11:53:44 +01:00
Otavio Salvador
3c41e90118 mx28evk: We shouldn't hardcode a rootfs filesystem type
For a generic environment, we shouldn't have a fixed rootfs filesystem
so we drop it from env.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2013-01-13 11:53:44 +01:00
Otavio Salvador
d17087cd01 mx6qsabrelite: Use tabs to environment setting
This rework the environment to use tabs for environment setting as
done in other boards.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2013-01-13 11:53:44 +01:00
Troy Kisky
abbab70363 mx31/mx35/mx51/mx53/mx6: add watchdog
Use a common watchdog driver for all these cpus.

Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Acked-by: Stefano Babic <sbabic@denx.de>
2013-01-13 11:39:57 +01:00
Bo Shen
961ffc7759 arm: at91sam9x5: add dataflash boot support
Add dataflash boot support on at91sam9x5ek board

Signed-off-by: Bo Shen <voice.shen@atmel.com>
Acked-by: Andreas Bießmann <andreas.devel@googlemail.com>
2013-01-12 13:18:50 +01:00
angelo
fd70aa4146 m68k/lib: fix serial driver relocation
Fix coldfire serial driver bindings no more relocated to ram after last
changes to drivers/serial/serial.c (regression).
Serial initialization in ram has to be called after that gd->reloc_off is
calculated.

Signed-off-by: Angelo Dureghello <sysamfw@gmail.com>
Cc: Jason Jin <jason.jin@freescale.com>
Acked-by: Jens Scharsig (BuS Elektronik) <esw@bus-elektronik.de>
Tested-by: Jens Scharsig (BuS Elektronik) <esw@bus-elektronik.de>
2013-01-11 14:41:14 -07:00
Tom Rini
7a8e739cd5 Merge branch 'master' of git://git.denx.de/u-boot-arm 2013-01-11 14:38:24 -07:00
Albert ARIBAUD
59ee45ee91 Merge branch 'u-boot-ti/master' into 'u-boot-arm/master' 2013-01-11 18:17:33 +01:00
Ajay Kumar
a2468dedef EXYNOS5: Enable console multiplexing in u-boot
We enable console multiplexing and use both serial and LCD for stdout/stderr.
Initially, u-boot output console is observed via serial port.
If you also have a DP panel connected onto your SMDK5250 board,
you can switch to LCD console by typing "setenv stdout lcd".
You can always switch back to serial using "setenv stdout serial".
You can switch error console(stderr) as well, using similar commands.

Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-01-11 17:15:04 +09:00
Ajay Kumar
99e516295f EXYNOS5: Make all display related code dependent on CONFIG_LCD
u-boot compilation fails for smdk5250 when we deselect CONFIG_LCD
from the main config file.

Following error was observed:
drivers/video/libvideo.o: In function `exynos_lcd_init':
/home/ajay/u-boot-samsung/drivers/video/exynos_fb.c:68: undefined reference to `lcd_set_flush_dcache'

This is because exynos video drivers have dependency on CONFIG_LCD.

Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-01-11 17:15:04 +09:00
Jaehoon Chung
5374d386f8 Exynos: clock: add CLK_DIV_FSYS3 at set_mmc_clk
Mobile storage is used the CLK_DIV_FSYS3 value.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-01-11 16:56:31 +09:00
Jaehoon Chung
c39e969e8e Exynos: clock: support get_mmc_clk for exynos
To get exactly clock value for mmc, support the get_mmc_clk() like
set_mmc_clk().

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-01-11 16:56:31 +09:00
Javier Martinez Canillas
039cbaefcf OMAP3: igep00x0: add CONFIG_SYS_NS16550_BROKEN_TEMT
IGEP board PC16550D (ns16550) UART doesn't set the
Transmitter Empty (TEMT) Bit in SPL. This makes
U-Boot to hang while waiting for TEMT. Add the
CONFIG_SYS_NS16550_BROKEN_TEMT config option to
avoid this issue.

Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
2013-01-10 15:09:24 -07:00
Javier Martinez Canillas
7de0fe1ac3 serial/ns16550: add an option to avoid hanging on broken platforms
Some platforms (e.g. IGEPv2 board) has a broken ns16550 UART that
does not set the TEMT bit when the transmitter is empty in SPL.
This makes U-Boot to hang while waiting for TEMT to be set.

Add a new option to avoid this:

CONFIG_SYS_NS16550_BROKEN_TEMT

16550 UART set the Transmitter Empty (TEMT) Bit when all output
has finished and the transmitter is totally empty. U-Boot waits
for this bit to be set to initialize the serial console. On some
broken platforms this bit is not set in SPL making U-Boot to
hang while waiting for TEMT. Define this option to avoid it.

Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
2013-01-10 15:09:24 -07:00
Nishanth Menon
94bcfe524c Makefile: remove MLO.byteswap on clobber
On clobber, do a cleanup even for SPL build else, we'd have
MLO.byteswap remaining for certain platforms like am33xx SPL builds

Signed-off-by: Nishanth Menon <nm@ti.com>
2013-01-10 15:09:24 -07:00
Javier Martinez Canillas
0e29a24814 OMAP3: igep00x0: add CONFIG_SPL_BOARD_INIT for CONFIG_SPL_NAND_SUPPORT
When booting an IGEPv2 board from NAND with SPL, U-Boot hangs
trying to read the OMAP General Purpose Memory Controller (GPMC).

The reason is that the GPMC initialization function is called
inside spl_board_init() and this function is only executed when
CONFIG_SPL_BOARD_INIT is defined.

Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Acked-by: Enric Balletbo i Serra <eballetbo@iseebcn.com>
2013-01-10 15:09:24 -07:00
Tom Rini
6fb4d74e59 Prepare v2013.01-rc3
Signed-off-by: Tom Rini <trini@ti.com>
2013-01-10 14:44:40 -07:00
Daniel Schwierzeck
58bd77db9d bootm: relocate names of sub-command table for archs with CONFIG_NEEDS_MANUAL_RELOC
To make bootm sub-command feature working on archs with CONFIG_NEEDS_MANUAL_RELOC,
the name pointers in the sub-command table need to be relocated.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2013-01-10 14:35:12 -07:00
Taylor Hutt
80e409508b arm: Tabify code for MMC initialization
The two modified lines were indented with spaces.
They are now indented with tabs.

Signed-off-by: Taylor Hutt <thutt@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2013-01-10 22:28:36 +01:00
Simon Glass
2f8d8d6b3a arm: Move bootstage record for board_init_f() to after arch_cpu_init()
The timer may be inited in arch_cpu_init() so it is not safe to make a
bootstage mark before this is called. Arrange the code to fix this.

Note: The question was raised as to why we don't keep all archs in sync.
PowerPC doesn't have specific bootstage markers at present (although it
does use boot progress). I hope that the generic board series will solve
this problem in general, but in the meantime this is a real problem, and
only in ARM.

We now get a correct time for board_init_f:

Timer summary in microseconds:
       Mark    Elapsed  Stage
          0          0  reset
    100,000    100,000  spl_start
    848,530    748,530  board_init_f
    907,301     58,771  board_init_r
    910,478      3,177  board_init

Signed-off-by: Simon Glass <sjg@chromium.org>
2013-01-10 22:27:41 +01:00
Tom Wai-Hong Tam
fe34f8dc8c arm: Make interrupts.o and reset.o in libarm also appear in SPL
SPL u-boot may call do_reset() which depends on interrupts.o and reset.o.
So make them also appear in SPL.

Signed-off-by: Tom Wai-Hong Tam <waihong@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2013-01-10 22:22:15 +01:00
Simon Glass
15a33e49de Add option to display customised memory information
Some boards want to report more than just memory size. For example, it
might be useful to display the memory type (DDR2, DDR3) or manufacturer.

Add a weak function to support this requirement, accessed through a new
'meminfo' command.

Any example of the DRAM: output is below, just for illustration:

SMDK5250 # meminfo
DRAM:  2 GiB Elpida DDR3 @ 800MHz

Signed-off-by: Simon Glass <sjg@chromium.org>
2013-01-10 22:22:12 +01:00
Simon Glass
e2e3e2b1be arm: Add CONFIG_DISPLAY_BOARDINFO_LATE to display board info on LCD
This option displays board info after stdio is running, so that it will
appear on the LCD. If it is displayed earlier, the board info will appear
on the serial console but not on the LCD.

Here follows a blow-by-blow description.

1a. Without CONFIG_DISPLAY_BOARDINFO_LATE, on serial:

U-Boot 2011.12-02550-g037e1c5-dirty (Nov 15 2012 - 14:29:42) for SMDK5250

CPU:   S5PC520 @ 1700MHz

Board: Google Snow, rev 0
I2C:   ready
DRAM:  2 GiB Elpida DDR3 @ 800MHz
MMC:   S5P MSHC0: 0, S5P MSHC1: 1
SF: Detected W25Q32 with page size 4 KiB, total 4 MiB
*** Warning - bad CRC, using default environment

In:    mkbp-keyb
Out:   lcd
Err:   lcd
Net:   No ethernet found.
Hit any key to stop autoboot:  0
SMDK5250 #

1b. Without CONFIG_DISPLAY_BOARDINFO_LATE, on LCD (note machine info
is missing):

In:    mkbp-keyb
Out:   lcd
Err:   lcd
Net:   No ethernet found.
Hit any key to stop autoboot:  0
SMDK5250 #

2a. With CONFIG_DISPLAY_BOARDINFO_LATE, on serial:

U-Boot 2011.12-02550-g037e1c5 (Nov 15 2012 - 14:27:40) for SMDK5250

CPU:   S5PC520 @ 1700MHz
I2C:   ready
DRAM:  2 GiB Elpida DDR3 @ 800MHz
MMC:   S5P MSHC0: 0, S5P MSHC1: 1
SF: Detected W25Q32 with page size 4 KiB, total 4 MiB
*** Warning - bad CRC, using default environment

Model: Google Snow
In:    mkbp-keyb
Out:   lcd
Err:   lcd
Net:   No ethernet found.
Hit any key to stop autoboot:  0
SMDK5250 #

2b. With CONFIG_DISPLAY_BOARDINFO_LATE, on LCD (note machine info is present):

Model: Google Snow
In:    mkbp-keyb
Out:   lcd
Err:   lcd
Net:   No ethernet found.
Hit any key to stop autoboot:  0
SMDK5250 #

Since the LCD is all that a typical user sees, it is useful to display
the model there.

We may be able to rearrange things some other way one day, but at
present this seems like a convenient way of getting the required
behaviour.

Signed-off-by: Simon Glass <sjg@chromium.org>
2013-01-10 22:22:01 +01:00
Simon Glass
b2b92f5315 Document the CONFIG_DISPLAY_BOARDINFO option
Add a short note about this in the README.

Signed-off-by: Simon Glass <sjg@chromium.org>
2013-01-10 22:21:57 +01:00
Simon Glass
06fd853890 arm: Add CONFIG_DELAY_ENVIRONMENT to delay environment loading
This option delays loading of the environment until later, so that only the
default environment will be available to U-Boot.

This can address the security risk of untrusted data being used during boot.

Any time you load untrusted data you expose yourself to a bug in the
code. The attacker gets to choose the data so can sometimes carefully
craft it to exploit a bug. We try to avoid touching user-controlled
data during a verified boot unless strictly necessary. Since the
default environment is good enough in this case (or you would just
change it), this gets around the problem by just not loading the
environment.

When CONFIG_DELAY_ENVIRONMENT is defined, it is convenient to have a
run-time way of enabling loading of the environment. Add this to the
fdt as /config/delay-environment.

Note: This patch depends on http://patchwork.ozlabs.org/patch/194342/

Signed-off-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Doug Anderson <dianders@chromium.org>
2013-01-10 22:21:47 +01:00
Simon Glass
eae78c3406 arm: Move fdt check earlier so that board_early_init_f() can use it
We want to use the fdt inside board_early_init_f(), so check for its
presence earlier in the pre-reloc init sequence.

So far ARM and microblaze are the only only ones that use
CONFIG_OF_CONTROL. Microblaze does not have the same init loop, and in
particular does not have the board_early_init_f() call. So a patch for
microblaze would have no meaning.

Signed-off-by: Simon Glass <sjg@chromium.org>
2013-01-10 22:21:44 +01:00
Gabe Black
724cdffca1 arm: Keep track of the tlb size as well as its location
It may be necessary to know where the TLB area ends as well as where it
starts. This allows board code to complete a secure memory erase without
destroying the page tables.

Signed-off-by: Gabe Black <gabeblack@google.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
2013-01-10 22:21:32 +01:00
Arun Mankuzhi
44df5e8d30 arm: move flush_dcache_all() to just before disable cache
In Cortex-A15 architecture, when we run cache invalidate
the cache clean operation executes automatically.
So if there are any dirty cache lines before disabling the L2 cache
these will be synchronized with the main memory when
invalidate_dcache_all() runs in the last part of U-boot

The two functions after flush_dcache_all is using the stack. So this
data will be on the cache. After disable when invalidate is called the
data will be flushed from cache to memory. This corrupts the stack in
invalida_dcache_all. So this change is required to avoid the u-boot
hang.

So flush has to be done just before clearing CR_C bit

Signed-off-by: Arun Mankuzhi <arun.m@samsung.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
2013-01-10 22:21:27 +01:00
Stefan Roese
d2af028db3 cfi_flash: Report Advanced Sector Protection (PPB) with flinfo cmd
Report the usage of the Advanced Sector Protection (PPB) to the user
upon 'flinfo' command. E.g:

Bank # 1: CFI conformant flash (16 x 16)  Size: 64 MB in 512 Sectors
  AMD Standard command set, Manufacturer ID: 0x01, Device ID: 0x227E2301
  Advanced Sector Protection (PPB) enabled
  Erase timeout: 16384 ms, write timeout: 2 ms
  Buffer write timeout: 5 ms, buffer size: 32 bytes

  Sector Start Addresses:
  FC000000 E      FC020000 E RO   FC040000 E      FC060000 E      FC080000 E
  ...

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Anatolij Gustschin <agust@denx.de>
Cc: Holger Brunck <holger.brunck@keymile.com>
Tested-by: Holger Brunck <holger.brunck@keymile.com>
2013-01-10 14:40:00 +01:00
Stefan Roese
ac6b911514 cfi_flash: Enable PPB protection for all AMD cmdset flash chips
Not only Spansion supports the Persistent Protection Bits (PPB) locking.
Other devices like the Micron JS28F512M29EWx also support this type
of locking/unlocking. Detection of support is done in the same way as
done for the Spansion chips - via the 0x49 CFI word.

This patch enables this PPB protection mechanism for all AMD type
(AMD commandset) chips.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Anatolij Gustschin <agust@denx.de>
Cc: Holger Brunck <holger.brunck@keymile.com>
Tested-by: Holger Brunck <holger.brunck@keymile.com>
2013-01-10 14:39:54 +01:00
Stefan Roese
03deff433e cfi_flash: Read PPB sector protection from device for AMD/Spansion chips
Patch 66863b05 [cfi_flash: add support for Spansion flash PPB sector
protection] introduced the PPB (Persistent Protection Bit) locking for
Spansion chips. But right now the sector protection status (locked vs
unlocked) is set to unlocked for all sectors upon bootup. The real
sector protection status is ignored.

This patch now reads the current sector protection status and uses
it for these AMD/Spansion flash chips.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Anatolij Gustschin <agust@denx.de>
Cc: Holger Brunck <holger.brunck@keymile.com>
Tested-by: Holger Brunck <holger.brunck@keymile.com>
2013-01-10 14:39:48 +01:00
Stefan Roese
20043a4c3c cfi_flash: Add manufact_match helper function
Consolidate manufacturer matching into the function manufact_match()
and use it.

Signed-off-by: Stefan Roese <sr@denx.de>
Tested-by: Holger Brunck <holger.brunck@keymile.com>
2013-01-10 14:39:30 +01:00
Angelo Dureghello
07b2c5c0e5 mtd/cfi: add support for SST 4KB sector granularity
Add support for SST 4KB sector granularity.

Many recent SST flashes, i.e. SST39VF3201B and similar of this family
are declared CFI-conformant from SST. They support CFI query, but implement
2 different sector sizes in the same memory: a 64KB sector (they call it
"block", std AMD erase cmd=0x30), and a 4KB sector (they call it "sector",
erase cmd=0x50). Also, CFI query on these chips, reading from address 0x2dh
of cfi query struct, detects a number of secotrs for the 4KB granularity
(flinfo shows it).

For all other aspects, they are CFI compliant, so, as Linux do, i think
it's a good idea to handle these chips in the CFI driver, with a fixup
to allow 4KB granularity, as should be expected, instead of 64KB.

Signed-off-by: Angelo Dureghello <sysamfw@gmail.com>
Signed-off-by: Stefan Rose <sr@denx.de>
2013-01-10 14:39:13 +01:00
Ajay Kumar
61b59e2749 video: Modify exynos_fimd driver to support LCD console
Currently, exynos FIMD driver is being used to support only TIZEN LOGOs.
In order to get LCD console, we need to enable half word swap feature
of FIMD and use 16 BPP.
LCD console and proprietary Logo cannot be used simultaneously.
We use "logo_on" field inside vidinfo_t structure to decide whether
user wants Logo or Console.
Define CONFIG_CMD_BMP and make logo_on = 1 to get Logo on screen.
Use logo_on = 0 to get output console on LCD.

Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-01-10 10:19:47 +09:00
Ajay Kumar
7b4bd121b6 EXYNOS: Add dummy definition to fix compilation dependency on CONFIG_EXYNOS_MIPI_DSIM
When only DP is used, we need not enable CONFIG_EXYNOS_MIPI_DSIM.
But if we do not select CONFIG_EXYNOS_MIPI_DSIM, exynos_fb.c throws
error saying exynos_mipi_dsi_init() not defined. So, we add
dummy definition for exynos_mipi_dsi_init when CONFIG_EXYNOS_MIPI_DSIM
is not defined.

Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Acked-by: Donghwa Lee <dh09.lee@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-01-10 10:19:47 +09:00
Ajay Kumar
1673f199d9 EXYNOS5: Change parent clock of FIMD to MPLL
With VPLL as source clock to FIMD,
Exynos DP Initializaton was failing sometimes with unstable clock.
Changing FIMD source to MPLL resolves this issue.

Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Acked-by: Donghwa Lee <dh09.lee@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-01-10 10:19:47 +09:00
Ajay Kumar
9b572852c0 EXYNOS5: Add support for FIMD and DP
Add panel_info structure required by LCD driver
and DP panel platdata for SMDK5250.
Add GPIO configuration for LCD.
Enable FIMD and DP support on SMDK5250.
DP Panel size: 2560x1600.
We use 16BPP resolution to get LCD console.

Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com>
Acked-by: Simon Glass <sjg@chomium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-01-10 10:19:47 +09:00
Rajeshwari Shinde
4050f0700f PMIC: MAX77686: Add FDT Support
This patch adds fdt support to MAX77686.

Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-01-10 10:12:50 +09:00
Rajeshwari Shinde
e00be0d30b EXYNOS5: Add device node for PMIC
Add device node for MAX77686

Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-01-10 10:12:50 +09:00
Rajeshwari Shinde
cd577e2b58 EXYNOS5: FDT: Add compatible strings for PMIC
Add required compatible information for PMIC

Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-01-10 10:12:50 +09:00
Albert ARIBAUD
612404c28a Merge 'u-boot-atmel/master' into 'u-boot-arm/master' 2013-01-09 20:01:48 +01:00
Fabio Estevam
17c5ef2007 mx53loco: Add support for SEIKO 4.3'' WVGA panel
Add support for the Seiko 4.3'' WVGA panel on mx53loco.

By default, the CLAA WVGA panel is selected.

In order to support the Seiko panel, the enviroment variable 'panel' must be
set to 'seiko'.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2013-01-09 19:22:24 +01:00
Fabio Estevam
2b16e51c2f mx6: Add workaround for ARM errata
Add workaround for the following ARM errata: 743622 and 751472.

The motivation for this change is the following kernel commit 62e4d357a
(ARM: 7609/1: disable errata work-arounds which access
secure registers), which removes the errata from multiplatform kernel.

Since imx has been converted to multiplatform in the kernel, we need to apply
such workarounds into the bootloader.

Workaround code has been taken from arch/arm/mm/proc-v7.S from 3.7.1 kernel.

Explanation of each erratum is provided at "Chip Errata for the i.MX 6Dual/6Quad"
document available at: cache.freescale.com/files/32bit/doc/errata/IMX6DQCE.pdf

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2013-01-09 19:22:06 +01:00
Albert ARIBAUD
ea33fb1a32 Merge branch 'u-boot-marvell/master' into 'u-boot-arm/master' 2013-01-09 16:57:03 +01:00
Tom Rini
642ef40bdc Merge branch 'master' of git://git.denx.de/u-boot-arm 2013-01-09 08:13:22 -07:00
Albert ARIBAUD
449485948e Fix SPL build for non-ARM targets
Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
2013-01-09 06:34:40 -07:00
Łukasz Majewski
c6d647e309 video:cache:fix: Enable dcache flush at LCD subsystem for Exynos based boards
lcd_set_flush_dcache(1) function is called from exynos_fb.c configuration file
to enable lcd_sync function.

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Tested-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-01-09 10:26:53 +09:00
Andreas Bießmann
bfbfab94fd mv-common.h: increase malloc arena to 4MiB
This will fix the following error:

---8<---
UBIFS error (pid 0): ubifs_mount: Error reading superblock on volume 'ubi:root' errno=-12!
--->8---

Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Cc: prafulla@marvell.com
Cc: dimax.main@gmail.com
Tested-by: Alex Xol <dimax.main@gmail.com>
2013-01-09 04:12:11 +05:30
Luke Lowrey
3e75e69668 arch-kirkwood: Ethernet port macro returning incorrect address
Modified the arch-kirkwood header so KWGBE_PORT_SERIAL_CONTROL1_REG(x)
returns the correct address.

Originally calling KWGBE_PORT_SERIAL_CONTROL1_REG(1) returned the
address for port 0 and vice versa.

Doesn't have any knock on effects to the u-boot code as the only
time they're used is to do the same function to both addresses

Signed-off-by: Luke Lowrey <luke@chamsys.co.uk>
Acked-by: Prafulla Wadaskar <Prafulla@marvell.com>
Acked-by: Heiko Schocher <hs@denx.de>
2013-01-09 04:12:11 +05:30
Michael Walle
23c9946a3b lsxl: unset ncip for rescue mode
Instead of using the serverip we get from the DHCP server, implicitly use
the broadcast address, which is automatically set when no ncip environment
variable is set. That way it isn't necessary to use a special DHCP
configuration to set the netconsole peer.

Signed-off-by: Michael Walle <michael@walle.cc>
Cc: Prafulla Wadaskar <prafulla@marvell.com>
2013-01-09 04:12:11 +05:30
Albert ARIBAUD
7202e8ae51 ARM: lacie_kw: add support for WIRELESS_SPACE
Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
2013-01-09 04:12:10 +05:30
Albert ARIBAUD
9d86f0c30b kirkwood: make MPP arrays static const
This saves stack and code memory for local copy, and
consumes initialized data memory. For 22 of the 29
kirkwood-based boards, this results in a global saving
of about 30 bytes. For 7 of them, it results in an
increase of 6 to 14 bytes.

Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
2013-01-09 04:12:10 +05:30
Albert ARIBAUD
0a16ea5933 mv88e61xx: refactor PHY and SWITCH level-code
Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
2013-01-09 04:12:10 +05:30
Valentin Longchamp
136846d77f arm/km: remove duplicate code
This patch removes 2 small portions of board specific code that are
duplicated with common ARM code and thus unnecessary. These 2 portions
of code concern the mach id that is given by u-boot to the Linux kernel
to identify the system's MACH.

The first one was the possibility to change the MACH thanks to the
'mach_id' enviroment variable. This is possible thanks to the 'machid'
env variable (see arch/arm/lib/bootm.c:boot_jump_linux()).

The seconde one is the setting of the bi_arch_number. This is already
done in arch/arm/lib/board.c:board_init_f() since km_arm.h does #define
CONFIG_MACH_TYPE.

Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
cc: Holger Brunck <holger.brunck@keymile.com>
cc: Prafulla Wadaskar <prafulla@marvell.com>
Acked-by: Prafulla Wadaskar <Prafulla@marvell.com>
2013-01-09 04:12:10 +05:30
Holger Brunck
37bead1a70 km/common: cosmetic change reported from checkpatch
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
cc: Valentin Longchamp <valentin.longchamp@keymile.com>
cc: Prafulla Wadaskar <prafulla@marvell.com>
Acked-by: Prafulla Wadaskar <Prafulla@marvell.com>
2013-01-09 04:12:10 +05:30
Holger Brunck
06610e1826 km/common: drop unneeded std* environment variables
These variables are only used if CONFIG_SYS_CONSOLE_IS_IN_ENV
is set. This isn't the case, so we can drop them safely.

Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
cc: Valentin Longchamp <valentin.longchamp@keymile.com>
cc: Prafulla Wadaskar <prafulla@marvell.com>
2013-01-09 04:12:10 +05:30
Holger Brunck
2472216cac arm/km: fix memory settings
On kmcoge5un we faced some serious problems with the memory during
temperature tests. Reason was that we overwrite some registers for
memory settings which have to leave untouched. These where registers
0x20148 , 0x2014c and 0x20154.
So writing these registers is prohibited and this patch removes them
from all km related config files. Even if the problem was only
seen on kmcoge5un.

Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
cc: Prafulla Wadaskar <prafulla@marvell.com>
2013-01-09 04:12:10 +05:30
Tom Rini
91c038f087 Merge branch 'master' of git://git.denx.de/u-boot-arm 2013-01-08 14:26:42 -07:00
Albert ARIBAUD
61bdb91335 arm: remove useless code in start.S files
Remove code such as unneeded includes or labels.
These removals have no functional effect.

Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
2013-01-08 22:14:54 +01:00
Albert ARIBAUD
e05e5de7fa arm: move C runtime setup code in crt0.S
Move all the C runtime setup code from every start.S
in arch/arm into arch/arm/lib/crt0.S. This covers
the code sequence from setting up the initial stack
to calling into board_init_r().

Also, rewrite the C runtime setup and make functions
board_init_*() and relocate_code() behave according to
normal C semantics (no jumping across the C stack any
more, etc).

Some SPL targets had to be touched because they use
start.S explicitly or for some reason; the relevant
maintainers and custodians are cc:ed.

Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
2013-01-08 22:14:50 +01:00
Albert ARIBAUD
7528cf5f01 Merge branch 'u-boot-imx/master' into 'u-boot-arm/master' 2013-01-08 14:59:37 +01:00
Albert ARIBAUD
79f3877794 Merge branch 'u-boot-ti/master' into 'u-boot-arm/master'
This required manual merging drivers/mtd/nand/Makefile
and adding am335x_evm support for CONFIG_SPL_NAND_DRIVERS
2013-01-08 13:15:45 +01:00
Vivek Gautam
9a0c4f9b87 SMDK5250: Enable VBus for USB 2.0 controller
This patch enables Vbus required for USB 2.0 controller.

Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-01-08 21:14:34 +09:00
Rajeshwari Shinde
6abd1620be EXYNOS5: FDT: Add compatible strings for USB
Add required compatible information for USB

Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-01-08 21:14:34 +09:00
Rajeshwari Shinde
69c6f976a1 EXYNOS5: Add device node for USB.
This patch adds the device node required for USB

Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-01-08 21:14:34 +09:00
Rajeshwari Shinde
e18bf1f9f2 EHCI: Exynos: Add fdt support
Adding fdt support to ehci-exynos in order to parse
register base addresses from the device node.

Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-01-08 21:14:34 +09:00
Rajeshwari Shinde
4d3acb9df3 SPI: EXYNOS: Add FDT support to driver.
This patch adds FDT support to the SPI driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-01-08 10:54:34 +09:00
Rajeshwari Shinde
cb9b23cda9 EXYNOS5: FDT: Add SPI device node data
Add SPI device node data for exynos.

Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-01-08 10:54:34 +09:00
Rajeshwari Shinde
2f26975df5 EXYNOS5 : FDT: Add Aliases for SPI device
This patch adds aliases for SPI.

Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-01-08 10:54:34 +09:00
Rajeshwari Shinde
5d50659dbf EXYNOS5: FDT: Add compatible strings for SPI
Add required compatible information for SPI driver.

Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-01-08 10:54:33 +09:00
Rajeshwari Shinde
2b8a053344 Sound: Add FDT support to CMD.
This patch adds FDT support to sound init in CMD.

Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-01-08 10:54:33 +09:00
Rajeshwari Shinde
6647c7ac8e Sound: WM8994: Add FDT support to codec
This patch adds FDT support to the codec.

Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-01-08 10:54:33 +09:00
Rajeshwari Shinde
f482310c6d Sound: Add FDT support to driver
This patch adds FDT support to the sound driver.

Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-01-08 10:54:33 +09:00
Rajeshwari Shinde
72dbff12a7 EXYNOS5: FDT: Add compatible strings for sound
Add required compatible information for sound driver.

Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-01-08 10:54:33 +09:00
Rajeshwari Shinde
d1e8d2cad0 EXYNOS5: FDT: Add sound and codec device node
Adds sound and codec device node parameters

Signed-off-by: R. Chandrasekar <rcsekar@samsung.com>
Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-01-08 10:54:33 +09:00
Rajeshwari Shinde
f0b1619118 EXYNOS5: FDT: Add sound device node data
Add sound device node data for exynos

Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-01-08 10:54:33 +09:00
Rajeshwari Shinde
a0f816b6bb SMDK5250: Initialise I2C using FDT
This patch initialises I2C using FDT.

Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Acked-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-01-08 10:54:33 +09:00
Rajeshwari Shinde
a9d2ae7014 I2C: Driver changes for FDT support
Functions added to get the I2C bus number and reset I2C bus using
FDT node.

Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Acked-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-01-08 10:54:33 +09:00
Rajeshwari Shinde
d055911887 EXYNOS5: FDT : Decode peripheral id
Api is added to decode peripheral id based on the interrupt number
of the peripheral.

Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-01-08 10:54:32 +09:00
Rajeshwari Shinde
c34253d1fc FDT: Add compatible string for I2C
Add required compatible information for I2C driver.

Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Acked-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-01-08 10:54:32 +09:00
Rajeshwari Shinde
961a54ce1b EXYNOS5 : FDT: Add Aliases for I2C device
This patch adds aliases for I2C.

Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Acked-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-01-08 10:54:32 +09:00
Rajeshwari Shinde
c2425b66c3 EXYNOS5: FDT: Add I2C device node data
Add I2C device node data for exynos

Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-01-08 10:54:32 +09:00
Piotr Wilczek
7a84e1fa22 arm:exynos4:pinmux: Modify the gpio function for mmc
This patch add pinmux settings for Exynos4 for mmc0 and mmc2

Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
CC: Albert ARIBAUD <albert.u.boot@aribaud.net>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-01-08 10:47:45 +09:00
Fabio Estevam
1411fb37b5 tools: imximage: Load a size that is multiple of 512
In order to mx53 ROM to properly load the U-boot image, its header size should
be multiple of 512 bytes.

This issue was observed with gcc 4.6.2/4.7.3, which caused data aborts:

U-Boot 2013.01-rc2-00172-gf8cfcf1-dirty (Dec 26 2012 - 13:13:28)

Board: MX53 LOCO
I2C:   ready
DRAM:  1 GiB
MMC:   FSL_SDHC: 0, FSL_SDHC: 1
In:    serial
Out:   serial
Err:   serial
CPU:   Freescale i.MX53 family rev2.1 at 1000 MHz
Reset cause: WDOG
Net:   FEC
Warning: FEC using MAC address from net device

Hit any key to stop autoboot:  0
data abort

    MAYBE you should read doc/README.arm-unaligned-accesses

pc : [<aff72220>]          lr : [<aff721fc>]
sp : af565e20  ip : af566918     fp : 00000000
r10: 00000003  r9 : affabb5b     r8 : af565f58
r7 : 00000000  r6 : 36747fff     r5 : af5668e8  r4 : 36747fff
r3 : af5668ec  r2 : af5668eb     r1 : 00000000  r0 : af5668e8
Flags: NzcV  IRQs off  FIQs off  Mode SVC_32
Resetting CPU ...

resetting ...

,and this patch fixes it.

Also, even though the ROUND macro is already defined in common.h,
the reason for redefining it in image.h is explained by Stefano Babic:

"I will remark a previous comment - even if including common.h seems a
good idea to avoid duplications, it makes tools like mkimage to depend
on the selected board, because <board>_config must run. Even if this is
not a problem for us u-boot developers, it becomes an issue when these
tools are included in distros (like u-boot-tools in Ubuntu) and cannot
be packaged."

Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2013-01-05 18:09:00 +01:00
Fabio Estevam
085e728aa5 mx53loco: Improve error handling on power_init()
Make the error handling more robust.

Check if each one of the PMIC writes fail and if they do, just return
immediately.

Also, print the cause for the failures.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2013-01-05 18:07:53 +01:00
Fabio Estevam
d22925108e mx53loco: Remove unneeded 'retval' variable
commit c73368150 (pmic: Extend PMIC framework to support multiple instances
of PMIC devices) introduced an extra 'retval' variable, but this is not
necessary since we have already the variable 'ret' in place.

So use 'ret' to store the return values from the pmic related calls and remove
'retval'.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2013-01-05 18:06:12 +01:00
Fabio Estevam
7093f85c9e mx51evk: Remove unneeded comment
Looks like the original comment came from a copy and paste from mx31ads.h.

It does not have a context on mx51evk anymore, so delete it.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2013-01-05 18:04:47 +01:00
Shawn Guo
49ea0ff5cc mx6qsabresd: use on-board eMMC to store environment
It makes more sense to use on-board eMMC to store environments.  The
boot partition 1 is selected by default.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-01-05 18:01:26 +01:00
Shawn Guo
de7d02aeba mx6qsabresd: add usdhc2 and usdhc4 support
The on-board number of available usdhc devices is something board
specific.  The patch moves CONFIG_SYS_FSL_USDHC_NUM out of
mx6qsabre_common.h and adds usdhc2 and usdhc4 support for mx6qsabresd
board.

To keep the default mmc device for environment same as before (usdhc3),
it moves CONFIG_SYS_MMC_ENV_DEV out of mx6qsabre_common.h and changes
it to 1 for mx6qsabresd.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-01-05 18:00:14 +01:00
Shawn Guo
fb8302bfc5 fsl_esdhc: add MMC_MODE_HC host_caps
All esdhc variants we know should support high capacity MMC cards,
so let's add MMC_MODE_HC host_caps unconditionally to support those
MMC cards (capacity > 2 GB).

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-01-05 17:56:42 +01:00
Ashok
e660c44d9e mx35pdk:Use IMX_GPIO_NR macro
Use IMX_GPO_NR macro

Signed-off-by: Ashok Kumar Reddy <ashokkourla2000@gmail.com>
Acked-by: Stefano Babic <sbabic@denx.de>
2013-01-05 17:44:41 +01:00
Marek Vasut
1f75b54150 mxs: Add NAND fdt and ramdisk partition to m28evk
Adjust the NAND partitioning layout so that there is a separate partition
for the ramdisk and fdt blob on the NAND.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Detlev Zundel <dzu@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
2013-01-05 17:40:12 +01:00
Łukasz Majewski
35777e2226 spl:falcon:trats Update Trats default board configuration file to support FALCON MODE
Support for a new command (defined at envs) - spl_export generates
the ATAGS image necessary for fast boot. Afterwards, it is stored
at ext4 partition.

Generated image format:
CRC [4B] SIZE [4B] PAYLOAD(ATAGS/DT) [SIZE]

Remarks:
- CRC is calculated only for PAYLOAD
- SIZE is the size of PAYLOAD

It is important to adjust ${splsize} when large image is generated.
It is defined as hex, since ext4 related commands expect it.

The ${spladdr} environment variable corresponds to
CONFIG_SYS_SPL_ARGS_ADDR

Additionally definitions for DFU have been refactored and support for
EFI has been added as well.

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-01-03 11:43:59 +09:00
Fabio Estevam
54bb84115d mx53loco: Call PMIC related functions from board_late_init()
Since commit c733681 (pmic: Extend PMIC framework to support multiple instances
of PMIC devices) mx53loco fails to allocate the memory for PMIC:

U-Boot 2013.01-rc2-dirty (Dec 20 2012 - 15:55:01)

Board: MX53 LOCO
I2C:   ready
DRAM:  1 GiB
pmic_alloc: No available memory for allocation!
pmic_init: POWER allocation error!
CPU:   Freescale i.MX53 family rev2.0 at 800 MHz
Reset cause: POR
MMC:   FSL_SDHC: 0, FSL_SDHC: 1

Calling the PMIC related functions at a later stage, ie, from board_late_init()
fixes the issue.

Reported-by: Robert Nelson <robertcnelson@gmail.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Tested-by: Stefano Babic <sbabic@denx.de>
2012-12-27 11:03:43 +01:00
Stefan Reinauer
e56cdd778c x86: Add coreboot version to u-boot's version command
Since U-Boot runs from coreboot on x86, the Coreboot version is an
important part of the boot state. This version information is
available in the coreboot tables, so print it when the 'version'
command is used.

Signed-off-by: Simon Glass <sjg@chromium.org>
2012-12-26 10:36:26 -08:00
Simon Glass
a08afb398b x86: coreboot: Enable io command
Enable the io command for x86 on coreboot.

Signed-off-by: Simon Glass <sjg@chromium.org>
2012-12-26 10:36:25 -08:00
Chander Kashyap
a527757316 EXYNOS: EXYNOS4X12: extract Exynos4x12 IPs clock frequency
Adds functions to extract clock frequency of Exynos4x12 IPs.

Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2012-12-26 21:12:43 +09:00
Otavio Salvador
2f994fe622 mx6qsabre_common: Change default loadaddr to 0x12000000
This allow use of mainline and Freescale BSP Linux kernel with same
environment.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2012-12-26 12:13:56 +01:00
Otavio Salvador
589b1afdb5 mx6qsabrelite: Change default loadaddr to 0x12000000
This allow use of mainline and Freescale BSP Linux kernel with same
environment.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2012-12-26 12:11:49 +01:00
Otavio Salvador
fe51f78714 mx53loco: Change default loadaddr to 0x72000000
This allow use of mainline and Freescale BSP Linux kernel with same
environment.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2012-12-26 12:08:28 +01:00
Otavio Salvador
aef8af6a3d mx53loco: We shouldn't hardcode a rootfs filesystem type
For a generic environment, we shouldn't have a fixed rootfs filesystem
so we drop it from env.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2012-12-26 12:05:54 +01:00
Fabio Estevam
8dd15b43b0 mx35pdk: Allow booting of a device tree kernel
Select CONFIG_OF_LIBFDT, so that a dt kernel can be launched.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-12-26 11:58:50 +01:00
Hatim RV
f1cbca2be5 SMDK5250: config: Add configuration file for SMDK5250 board
Add the configuration file for exynos5250 based SMDK5250 board.

Signed-off-by: Hatim Ali <hatim.rv@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2012-12-26 19:26:25 +09:00
Hatim RV
540b5af281 exynos5: config: Rename the smdk5250.h to exynos5250-dt.h
Create a common configuration file for all exynos5250 based boards.
Going forward we will be using DT based driver discovery for all the boards
based on Exynos5. The different boards added will have there own config.h files
which internally will include this file and specify their specific DT files.

Signed-off-by: Hatim Ali <hatim.rv@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2012-12-26 19:26:25 +09:00
Hatim RV
3ea93948cf exynos5: Add DT based driver for SMC911X ethernet
Add device tree based ethernet driver for SMC911X controller on
SMDK5250 boards.

Signed-off-by: Hatim Ali <hatim.rv@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2012-12-26 19:26:25 +09:00
Hatim RV
cc9fe33a36 fdt: exynos5: Add DT node definition for SROM and SMSC9215
Add the compatibility string and constant for the ethernet driver
so the device tree parsing code can recognize it.

Signed-off-by: Hatim Ali <hatim.rv@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2012-12-26 19:26:25 +09:00
Hatim RV
1b652071d0 EXYNOS5: FDT: add initial dts file for EXYNOS5250, SMDK5250
This patch adds initial dts file for EXYNOS5250 SoC. This dts
file currently include only ethernet devices and properties. More
devices to be added in subsequent patches.
Also add the dts file for SMDK5250 board which uses the EXYNOS5250
dts file.

Signed-off-by: Hatim Ali <hatim.rv@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2012-12-26 19:26:25 +09:00
Chander Kashyap
fa442bbb3f EXYNOS: EXYNOS4X12: Add gpio structure for EXYNOS4X12
This patch adds gpio structure for Exynos4x12.

Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2012-12-26 16:16:02 +09:00
Chander Kashyap
07235ef8a3 EXYNOS: EXYNOS4X12: Add clock structure for EXYNOS4X12
This patch adds clock structure for Exynos4x12.

Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2012-12-26 16:16:02 +09:00
Chander Kashyap
b189a83a08 EXYNOS: EXYNOS4X12: Populate Exynos4x12 register addresses
This patch populates base addresses of Exynos4x12 registers.

Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2012-12-26 16:16:02 +09:00
Scott Wood
f8cfcf1b1c env: don't generate callback list entries for SPL
SPL doesn't write to the environment.  These list entries prevent the
functions from being garbage-collected, even though nothing will look at
the list.  This caused several SPL builds (e.g.  P2020RDB-PC_NAND) to
break due to size limitations and/or unresolved symbols.

A static inline function is used to provide a context in which we
can consume the callback, and thus avoid unused function warnings.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Acked-by: Joe Hershberger <joe.hershberger@gmail.com>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
2012-12-22 05:57:16 -07:00
Tom Rini
da77a0e593 Merge branch 'master' of git://git.denx.de/u-boot-arm 2012-12-22 05:55:19 -07:00
Albert ARIBAUD
96764df1b4 Merge samsung, imx, tegra into u-boot-arm/master
This commit merges branches from samsung, imx and tegra
meant to fix merge issues between u-boot/master and
u-boot-arm/master, as well as a few manual merge fixes.
2012-12-22 11:59:14 +01:00
Tom Rini
ba6d4b64b3 Merge branch 'master' of git://git.denx.de/u-boot-usb 2012-12-21 16:19:29 -07:00
Prabhakar Kushwaha
ba427678a4 driver/mtd/IFC:Wait tWB time, poll R/B before command execution
IFC_FIR_OP_CMD0 issues command for execution without checking flash
readiness. It may cause problem if flash is not ready. Instead use
IFC_FIR_OP_CW0 which Wait for tWB time and poll R/B to return high or
time-out, before issuing command.

NAND_CMD_READID command implemention does not fulfill above requirement. So
update its programming.

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Hemant Nautiyal <hemant.nautiyal@freescale.com>
2012-12-21 15:34:54 -06:00
Tom Rini
42e1321874 Merge branch 'master' of git://git.denx.de/u-boot-sh 2012-12-20 10:53:20 -07:00
Nikita Kiryanov
41984e7123 cm_t35: use new low level interface for usb ehci
Update usb host support to use new version of omap_ehci_hcd_init.

Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
2012-12-20 17:04:21 +01:00
Nikita Kiryanov
854a7836dc cm-t35: add USB host support
Add support for USB host ports on cm-t3530 and cm-t3730.

Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
2012-12-20 17:04:21 +01:00
Nikita Kiryanov
41b13bc7c4 twl4030: add gpio register offsets
Add gpio register offsets for twl4030.

Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
2012-12-20 17:04:21 +01:00
Tom Rini
e3c52f2b87 Revert "fw_env: fix building w/out a config.h"
I had missed Joe's NAK on this patch, so...

This reverts commit 92ace272d0.

Signed-off-by: Tom Rini <trini@ti.com>
2012-12-20 07:30:27 -07:00
Yoshihiro Shimoda
bb474b8187 serial_sh: Add support Renesas SH7752
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2012-12-20 13:20:17 +09:00
Yoshihiro Shimoda
1a2621bab8 sh: add support for sh7752evb board
The R0P7752C00000RZ board has SH7752, 512MB DDR3-SDRAM, SPI ROM,
Gigabit Ethernet, and eMMC.

This patch supports the following functions:
 - 512MB DDR3-SDRAM, SCIF4, SPI ROM, Gigabit Ethernet, eMMC

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2012-12-20 13:20:17 +09:00
Jens Scharsig (BuS Elektronik)
46dc5bcade coldfire: eb_cpu5282: fix: boot from internal flash
* By a sequence of unfavorable conditions in the config header file, the eb_cpu5282
  booting from  internal stopped after relocation. Blame it is a faulty value of
  CONFIG_SYS_MONITOR_BASE. This patch fix this by replace the wrong condition in
  config header with option in board.cfg

Signed-off-by: Jens Scharsig (BuS Elektronik) <esw@bus-elektronik.de>
2012-12-19 15:51:58 -07:00
Mike Frysinger
92ace272d0 fw_env: fix building w/out a config.h
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Acked-by: Peter Korsgaard <jacmet@sunsite.dk>
2012-12-19 15:51:57 -07:00
Mike Frysinger
7a546db2ff fw_env: fix incorrect usage of open(O_CREAT)
When using open(), the O_CREAT flag must be given a mode, otherwise it
uses random garbage from the stack.  Also, it can fail to build:

In file included from /usr/include/fcntl.h:290:0,
                 from fw_env_main.c:42:
In function 'open',
    inlined from 'main' at fw_env_main.c:97:9:
/usr/include/bits/fcntl2.h:50:24: error: call to '__open_missing_mode' declared
	with attribute error: open with O_CREAT in second argument needs 3 arguments

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2012-12-19 15:51:57 -07:00
Mike Frysinger
3779c8e319 fw_env: fix type of len
This variable is assigned by a size_t, and is printed that way, but is
incorrectly declared as an int.  Which means we get warnings:
fw_env.c: In function 'fw_setenv':
fw_env.c:409:5: warning: format '%zu' expects argument of type 'size_t',
	but argument 3 has type 'int' [-Wformat]

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2012-12-19 15:51:57 -07:00
Joe Hershberger
4823b45da2 Add a simple load option to setexpr
Make setexpr accept a 2 parameter variant that will simply load a value
into a variable.  This is useful for loading a value from memory.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
2012-12-19 15:51:57 -07:00
Simon Glass
2400727318 spi: Add SPI flash test
It is useful to have a basic SPI flash test, which tests that the SPI chip,
the SPI bus and the driver are behaving.

This test erases part of the flash, writes data and reads it back as a
sanity check that all is well.

Use CONFIG_SF_TEST to enable it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2012-12-19 15:51:57 -07:00
James Miller
a683c288d4 spi: Add progress percentage and write speed to sf update
Output a progress update only at most 10 times per second, to avoid
saturating (and waiting on) the console. Make the summary line
to fit on a single line. Make sure that cursor sits at the end of
each update line instead of the beginning.

Sample output:

SF: Detected W25Q32 with page size 4 KiB, total 4 MiB
Update SPI
1331200 bytes written, 2863104 bytes skipped in 21.912s, speed 199728 B/s

time: 21.919 seconds, 21919 ticks
Skipping verify

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: James Miller <jamesmiller@chromium.org>
Signed-off-by: Taylor Hutt <thutt@chromium.org>
[trini: Drop 'const' from bytes_per_second()]
Signed-off-by: Tom Rini <trini@ti.com>
2012-12-19 15:51:23 -07:00
Allen Martin
a098cf41fd Merge remote-tracking branch 'u-boot/master' into u-boot-arm-merged
Conflicts:
	README
	arch/arm/cpu/armv7/exynos/clock.c
	board/samsung/universal_c210/universal.c
	drivers/misc/Makefile
	drivers/power/power_fsl.c
	include/configs/mx35pdk.h
	include/configs/mx53loco.h
	include/configs/seaboard.h
2012-12-19 13:02:36 -08:00
Tom Rini
095728803e Merge branch 'master' of git://git.denx.de/u-boot-net 2012-12-17 18:39:50 -07:00
Tom Rini
e80e588bb8 Merge branch 'master' of git://git.denx.de/u-boot-nand-flash 2012-12-17 18:39:45 -07:00
Pantelis Antoniou
598cf6062e g_dnl: Properly terminate string list.
Well, not terminating the list causes very interesting crashes.
As in changing the vendor & product ID crashes. Fun.

Signed-off-by: Pantelis Antoniou <panto@antoniou-consulting.com>
2012-12-17 15:38:15 +01:00
Pantelis Antoniou
5a413cae6a g_dnl: Issue connect/disconnect as appropriate
Call usb_gadget_connect/usb_gadget_disconnect in g_dnl_bind/g_dnl_unbind.

Signed-off-by: Pantelis Antoniou <panto@antoniou-consulting.com>
2012-12-17 15:38:15 +01:00
Vincent Palatin
8b57e2f081 usb: properly detect empty mass storage media reader
When a USB card reader is empty, it will return "Not Ready - medium not
present" as Key Code Qualifier. In that situation, it's useless waiting
for the full timeout since the result won't change until the user
inserts a card.

Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-12-17 15:38:15 +01:00
Milind Choudhary
359439d288 usb: Clean up newly allocated device nodes in case of configuration failure
If probe of a newly connected device fails for some reason, clean up
the allocated entry in usb_dev array.

Signed-off-by: Milind Choudhary <milindc@codeaurora.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-12-17 15:38:15 +01:00
Vipin Kumar
b6d7852cf8 usbh/ehci: Increase timeout for enumeration
The current logic reads the port status just once after usb_hub_power_on and
expects the portstatus and portchange to report the connection status
immediately and correctly.

Few pen drives are not able to report both of them immediately ie. those pens
report the connection change but not the connected state after the first read.
This opportunity once lost is gone for ever because the u-boot, unlike linux or
any other OS, works in polling mode.

This patch modifies the logic to read the port status continuously until the
portstatus and portchange both report a connection change as well as a connected
state or no connection change and no connection. This logic is placed in a
timeout of 10 sec. At the end of it, the pen drive would have either reported a
ONE or a ZERO in bit 1 of portstatus as well as portchange.

It enhances the set of pen drives which can eventually be detected by u-boot

Note: This 10 second timeout is based purely on several experiments done with
the broken pen drives

Signed-off-by: Vipin Kumar <vipin.kumar@st.com>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
2012-12-17 15:38:15 +01:00
Richard Genoud
c5a927c61f usb documentation: fix typo
Signed-off-by: Richard Genoud <richard.genoud@gmail.com>
2012-12-17 15:38:15 +01:00
Lukasz Dalek
a33fada1c0 h2200: Add USB CDC ethernet support
Add support for ethernet over USB which can be used for e.g. booting
process. It works with tftp and dhcp clients code.

Signed-off-by: Lukasz Dalek <luk0104@gmail.com>
2012-12-17 15:38:14 +01:00
Lukasz Dalek
27460be60d pxa25x_udc: Remove usbdescriptors.h
usbdescriptors.h conflicts with linux/usb/ch9.h.
Remove it.

Signed-off-by: Lukasz Dalek <luk0104@gmail.com>
2012-12-17 15:38:14 +01:00
Yoshihiro Shimoda
e3bb3254f8 net: sh_eth: add support for SH7752
SH7752 has two fast ethernet controllers and two gigabit ethernet
controllers. It is similar to SH7757.

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Acked-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2012-12-15 12:28:24 -06:00
Joe Hershberger
65b0db831e net: Fix endianness bug in link-local
The ip is stored in network order, so we can't test it in host order.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Kim Phillips <kim.phillips@freescale.com>
2012-12-15 12:28:23 -06:00
Simon Glass
85b1980273 net: Add tftp speed indication
This prints a tftp speed indication after the download completes. This
is the 3.6 MiB/s indicator below.

Tegra2 (SeaBoard) # tftp ...
Using asx0 device
TFTP from server 172.22.72.144; our IP address is 172.22.73.81
Filename '/tftpboot/uImage-user-seaboard-1'.
Load address: 0x408000
Loading: #################################################
         3.6 MiB/s
done

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
2012-12-15 12:28:22 -06:00
trem
d8fb710fdd powerpc: remove not used CONFIG_SYS_TFTP_LOADADDR
CONFIG_SYS_TFTP_LOADADDR is defined on severals boards,
but it's never used. So we can safely removed it.

Signed-off-by: Philippe Reynes <tremyfr@yahoo.fr>
2012-12-15 12:28:22 -06:00
Michal Simek
b4b81e83f5 phy: Add support for Marvell 88E1118R
Marvell 88E1118R has different uid then 88E1118.

Signed-off-by: Michal Simek <monstr@monstr.eu>
CC: Andy Fleming <afleming@freescale.com>
CC: Zang Roy-R61911 <tie-fei.zang@freescale.com>
CC: Kumar Gala <galak@kernel.crashing.org>
2012-12-15 12:28:22 -06:00
Ruchika Gupta
776e66e8f1 e1000e : Correct Rx Threshold granularity
In e1000e driver, Rx descriptor queue is used such that hardware can add only
one descriptor at a time. So the WTHRESH granularity in RXDCTL should be set
to single descriptor. This would ensure that every time controller fills a Rx
descriptor, it is flushed to host memory. Earlier this granularity was in
cache line units i.e 2 descriptors. This leads to controller always waiting
for 2 descriptors before flushing them out. But since not more than one Rx BD
is actually available , the accumulation condition never gets hit.

Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com>
Signed-off-by: Vakul Garg <vakul@freescale.com>
Acked-by: Roy Zang <tie-fei.zang@freescale.com>
2012-12-15 12:28:21 -06:00
Eric Benard
71779d5b87 m28evk/mx28evk: fix nand_update_full
- since commit 418396e212 nand write.raw
can take the number of page to be written as an argument. nand_update_full
is passing the size (in bytes) to nand write.raw. This value was previously
ignored but now breaks the write.
- this patch updates the default environment of these boards to provide a
pagecount instead of a size to nand write.raw.
- tested on a mx28evk with a 4k page NAND and on a custom board with a
2k page NAND.

Signed-off-by: Eric Bénard <eric@eukrea.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Marek Vasut <marex@denx.de>
2012-12-14 16:04:06 -06:00
Scott Wood
88c5c68ffa Merge remote-tracking branch 'origin/master' 2012-12-14 16:03:55 -06:00
Tom Rini
ebbf0d20aa Prepare v2013.01-rc2
Signed-off-by: Tom Rini <trini@ti.com>
2012-12-14 14:43:22 -07:00
Tom Rini
6e9005bd96 omap3_evm: Let CONFIG_EFI_PARTITION be set for SPL
The #ifdef here is not enough to stop part_efi.c from being built, only
being unused.  And with recent changes this now leads to warnings.  The
easiest solution here is to just let the garbage collection at link time
do its job.

Signed-off-by: Tom Rini <trini@ti.com>
2012-12-13 13:58:27 -07:00
Joe Hershberger
1d6cd0a3f6 env: Handle write-once ethaddr and serial# generically
Use the variable access flags to implement the protection for ethaddr
and serial# instead of hard-coding them.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
2012-12-13 11:46:57 -07:00
Joe Hershberger
9d8d661d7f env: Implement the env delete command
Implement a way to delete more than one variable at a time.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
2012-12-13 11:46:57 -07:00
Joe Hershberger
24ab5a1914 env: Add setenv force support
Now that we have support for permissions, add a way to override them.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
2012-12-13 11:46:56 -07:00
Joe Hershberger
267541f776 env: Add support for access control to .flags
Add support for read-only, write-once, and change-default.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
2012-12-13 11:46:56 -07:00
Joe Hershberger
fffad71bc4 env: Add a command to display details about env flags
Similar to the env callback command, this will show details about the
options available, the static list, and the currently active variables.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
2012-12-13 11:46:56 -07:00
Joe Hershberger
30fd4fadb3 tools/env: Add environment variable flags support
Currently just validates variable types as decimal, hexidecimal,
boolean, ip address, and mac address.  Call
env_acl_validate_setenv_params() from setenv() in fw_env.c.

If the entry is not found in the env .flags, then look in the static
one. This allows the env to override the static definitions, but prevents
the need to have every definition in the environment distracting you.

Need to build in _ctype for isdigit for Linux.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
2012-12-13 11:46:56 -07:00
Joe Hershberger
2598090b7e env: Add environment variable flags
Currently just validates variable types as decimal, hexidecimal,
boolean, ip address, and mac address.

If the entry is not found in the env ".flags", then look in the static
one. This allows the env to override the static definitions, but prevents
the need to have every definition in the environment distracting you.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
2012-12-13 11:46:56 -07:00
Joe Hershberger
e080d545f8 env: Add a silent env handler
The silent variable now updates the global data flag anytime it is
changed as well as after the env relocation (in case its value is
different from the default env in such cases as NAND env)

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
2012-12-13 11:46:56 -07:00
Joe Hershberger
849d5d9cda env: Add a console env handler
Remove the hard-coded console handler and use a callback instead

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
2012-12-13 11:46:56 -07:00
Joe Hershberger
1cf0a8b2fb env: Add a loadaddr env handler
Remove the hard-coded loadaddr handler and use a callback instead

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
2012-12-13 11:46:56 -07:00
Joe Hershberger
32057717e0 env: Add a baudrate env handler
Remove the hard-coded baudrate handler and use a callback instead

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
2012-12-13 11:46:55 -07:00
Joe Hershberger
a9f51c9b43 env: Add a bootfile env handler
Remove the hard-coded bootfile handler and use a callback instead

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
2012-12-13 11:46:55 -07:00
Joe Hershberger
5e2b3e0c59 env: Add a command to view callbacks
The callbacks can be bound, but are otherwise invisible.  Add a command
to show what callbacks are available.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>

!!! fix callback command
2012-12-13 11:46:55 -07:00
Joe Hershberger
170ab11075 env: Add support for callbacks to environment vars
Add support for per-variable callbacks to the "hashtable" functions.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>

!!!fix comment in callback
2012-12-13 11:46:55 -07:00
Joe Hershberger
be11235ab8 env: Hide '.' variables in env print by default
When printing all variables with env print, don't print variables that
begin with '.'.  If env print is called with a '-a' switch, then
include variables that begin with '.' (just like the ls command).

Variables printed explicitly will be printed even without the -a.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
2012-12-13 11:46:55 -07:00
Joe Hershberger
ec8a252cd4 env: Use getenv_yesno() more generally
Move the getenv_yesno() to env_common.c and change most checks for
'y' or 'n' to use this helper.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
2012-12-13 11:46:55 -07:00
Joe Hershberger
7afcf3a55b env: Refactor apply into change_ok
Move the read of the old value to inside the check function.  In some
cases it can be avoided all together and at the least the code is only
called from one place.

Also name the function and the callback to more clearly describe what
it does.

Pass the ENTRY instead of just the name for direct access to the whole
data structure.

Pass an enum to the callback that specifies the operation being approved.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
2012-12-13 11:46:55 -07:00
Joe Hershberger
3d3b52f258 env: Consolidate common code in hsearch_r()
The same chunk of code was replicated in two places and the following
changes will make that chunk grow a bit, so combine into a static func.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
2012-12-13 11:46:54 -07:00
Joe Hershberger
c4e0057fa7 env: Refactor do_apply to a flag
Use a flag in hsearch_r for insert mode passed from import to allow the
behavior be different based on use.

Now that "do_check" is called for all imports, ensure console init is
complete before updating the console on relocation import

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
2012-12-13 11:46:54 -07:00
Joe Hershberger
e772cb30f6 Make linux kernel string funcs available to tools
isspace() and strim() are not in the typical user-mode string.h, so
put them in a separate compilation unit so that they can be built into
tools that need them independent of the other common string functions.

This allows code shared by u-boot and the linux user-mode tools to link.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
2012-12-13 11:46:07 -07:00
Lukasz Majewski
9960d9a8bc gpt: Enable support for GPT partition table restoration at Samsung's Trats
Enable support for GPT partition table restoration at Samsung's Trats
development board.

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
CC: Minkyu Kang <mk7.kang@samsung.com>
2012-12-13 11:46:03 -07:00
Piotr Wilczek
8b09623766 gpt: Support for new "gpt" command
New command - "gpt" is supported. It restores the GPT partition table.
It looks into the given environment variable for partitions definition.
It can be enabled at target configuration file with CONFIG_CMD_GPT.

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
2012-12-13 11:46:02 -07:00
Lukasz Majewski
40684ddb83 gpt: Support for GPT (GUID Partition Table) restoration
The restoration of GPT table (both primary and secondary) is now possible.
Function 'gpt_restore' presents example of partition restoration process.

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
2012-12-13 11:46:02 -07:00
Chang Hyun Park
fae2bf22a2 gpt: The leXX_to_int() calls replaced with ones defined at <compiler.h>
Custom definitions of le_XX_to_int functions have been replaced with
standard ones, defined at <compiler.h>

Replacement of several GPT related structures members with ones
indicating its endianness and proper size.

Signed-off-by: Chang Hyun Park <heartinpiece@outlook.com>
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
2012-12-13 11:46:02 -07:00
Lukasz Majewski
36f2e8e0d1 gpt:doc: GPT (GUID Partition Table) documentation
Documentation of the GPT format.

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
2012-12-13 11:46:02 -07:00
Lukasz Majewski
9386f96ca9 part:efi: Move part_efi.h file to ./include
This move is necessary to export gpt header and GPT partition entries to be
used with other commands or subsystems.
Additionally the part_efi.h file has been cleaned-up to supress checkpatch's
warnings.

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
2012-12-13 11:46:02 -07:00
Lukasz Majewski
3ec44111aa vsprintf:fix: Change type returned by ustrtoul
The ustrtoul shall convert string defined size (e.g. 1GiB) to unsigned
long type (as its name implies).

Up till now it had returned int, which might cause problems with large
numbers (GiB range), when interpreted as U2 signed numbers.

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
2012-12-13 11:46:02 -07:00
Fabio Estevam
b874df74af mx25pdk: Allow booting a device tree kernel
Select CONFIG_OF_LIBFDT so that a device tree kernel can be launched.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-12-13 09:23:59 +01:00
Fabio Estevam
8965112bbf mx53loco: Fix PMIC name
commit c73368150 (pmic: Extend PMIC framework to support multiple instances
of PMIC devices) has incorrectly passed the PMIC name under the FSL PMIC case.

Fix that by passing "FSL_PMIC" as the parameter of pmic_get.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-12-13 09:22:55 +01:00
Tom Rini
caddc17f30 Merge branch 'master' of git://git.denx.de/u-boot-mips 2012-12-12 06:51:02 -07:00
Joe Hershberger
f88e09de8d mips: serial: Fix busted manual relocation
serial_initialize() must be called after relocation to adjust the
pointers to putc(), getc(), etc.  This is busted ever since the
serial driver-model-ification series.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2012-12-12 13:20:24 +01:00
Daniel Schwierzeck
f0c27993e4 MIPS: constify mips_io_port_base
mips_io_port_base is exported as 'extern const unsigned long mips_io_port_base;'
in arch/mips/include/asm/io.h. Thus make the variable const too.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2012-12-12 13:14:16 +01:00
Wolfram Sang
0b38fffbe4 mtd: nand: mxs: reset BCH earlier, too, to avoid NAND startup problems
It could happen (1 out of 100 times) that NAND did not start up correctly after
warm rebooting, so we end up with various failures or DMA timed out due to a
stalled BCH. When resetting BCH together with GPMI, the issue could not be
observed anymore (after 10000+ reboots). We probably need the consistent state
already before sending commands to NAND. This behaviour was observed in barebox
and kernel, so I assume it affects U-Boot as well. I chose to keep the extra
reset for BCH when changing the flash layout to be on the safe side.

Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Acked-by: Marek Vasut <marex@denx.de>
2012-12-11 17:19:51 -06:00
Łukasz Majewski
bf3d58bb7d cmd:spl:fix: Prevent from a build error on boards, which don't support FDT
Do not compile in FDT related code, when it is not supported.

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Stefano Babic <sbabic@denx.de>
2012-12-11 13:18:14 -07:00
Simon Glass
23b479b25c exynos: Enable hashing functions and EDID for smdk5250
Enable SHA1/SHA256 hashing and the hash command. Also enable EDID
support for reading from an LCD.

Signed-off-by: Simon Glass <sjg@chromium.org>
2012-12-11 13:18:14 -07:00
Luigi Semenzato
eea3f4d3e1 tpm: Add TPM stress test
Add a simple command to stress-test a TPM (Trusted Platform Module).

Signed-off-by: Luigi Semenzato <semenzato@chromium.org>

Signed-off-by: Simon Glass <sjg@chromium.org>
2012-12-11 13:18:13 -07:00
Simon Glass
78c112c9f9 console: Enable function to display console info
The CONFIG_SYS_CONSOLE_INFO_QUIET option should suppress the console
information, but allow boards to display it later if required. Adjust
the code to support this.

This is used to avoid printing the information while the LCD display
is not ready, since it only becomes ready when stdio init is complete.

Signed-off-by: Simon Glass <sjg@chromium.org>
2012-12-11 13:18:12 -07:00
Vadim Bendebury
9ad557be2f Add console command to access io space registers
Provide u-boot console functions to access IO space registers. A no
thrills implementation, accessing one register at a time.

For example:
    boot > iod 80
    0080: 00000094
    boot > iod.w 80
    0080: 0094
    boot > iod.b 80
    0080: 94
    boot > iow.b 0x80 12
    boot > iod 0x80
    0080: 00000012

Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-12-11 13:17:35 -07:00
Tom Wai-Hong Tam
096eb3f59b fdt: edid: Enable fdt_add_edid() function when CONFIG_LCD defined
This function can be used for LCDs as well as monitors.

Signed-off-by: Tom Wai-Hong Tam <waihong@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-12-11 13:17:35 -07:00
Tom Wai-Hong Tam
735987c5a8 edid: Add I2C command for printing the EDID
Add a single command to read the EDID information over I2C.

For example:

SMDK5250 # i2c dev 7
Setting bus to 7
SMDK5250 # i2c edid 50
EDID version: 1.4
Product ID code: 305c
Manufacturer: AUO
Serial number: 00000000
Manufactured in week: 0 year: 2011
Video input definition: digital signal, voltage level 0, blank to black
Monitor is non-RGB
Maximum visible display size: 26 cm x 14 cm
Power management features: no active off, no suspend, no standby
Estabilished timings:
Standard timings:
        1366x768        60 Hz (detailed)
        1366x768        60 Hz (detailed)
Monitor ID: 2VD2K.B116XW

Signed-off-by: Tom Wai-Hong Tam <waihong@chromium.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-12-11 13:17:35 -07:00
Tom Wai-Hong Tam
d46b5f7dcb edid: Library of EDID decode and print
This implements a library for accessing EDID data from an LCD panel.
This is used to obtain information about the panel such as its
resolution and type.

This is a tidied-up version of the original code pulled from
https://github.com/ynezz/u-boot-edid.

The changes we made are:
 - removed bit fields in the struct;
 - removed endianness cases in the struct;
 - fixed some wrong definitions;
 - fixed to fit 80 columns;
 - fixed some code styles.

Signed-off-by: Tom Wai-Hong Tam <waihong@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-12-11 13:17:34 -07:00
Simon Glass
bf36c5d521 Add hash command to perform hashing using various algorithms
This new command supports hashing SHA1 and SHA256. It could be extended
to others such as MD5 and the CRC algorithms. The syntax is modeled on
those:

   hash <algorithm> <address> <length> [*<dest_addr> | <dest_envvar>]

to calculate a hash, and:

   hash -v <algorithm> <address> <length> [*<verify_addr> | <verify_envvar>]

to verify a hash.

Use CONFIG_CMD_HASH to enable the command, CONFIG_SHA1 to enable SHA1 and
CONFIG_SHA256 to enable SHA256.

The existing sha1sum command remains.

Signed-off-by: Simon Glass <sjg@chromium.org>
2012-12-11 13:17:34 -07:00
Simon Glass
e50b12c95c sha1sum: Use generic hash layer
Update the code to use the hash layer instead of local code.

Signed-off-by: Simon Glass <sjg@chromium.org>
2012-12-11 13:17:34 -07:00
Simon Glass
460408ef9a Add generic hash API
We have a SHA1 command and want to add a SHA256 command also. Instead of
duplicating the code, create a generic hash API which can process
commands for different algorithms.

Signed-off-by: Simon Glass <sjg@chromium.org>
2012-12-11 13:17:34 -07:00
Simon Glass
b1f17bf5ff Add strcasecmp() and strncasecmp()
strncasecmp() is present as strnicmp() but disabled. Make it available
and define strcasecmp() also. There is a only a small performance penalty
to having strcasecmp() call strncasecmp(), so do this instead of a
standalone function, to save code space.

Update the prototype in arch-specific headers as needed to avoid warnings.

Signed-off-by: Simon Glass <sjg@chromium.org>
2012-12-11 13:17:34 -07:00
Simon Glass
ec7381fbf6 sha256: Use const where possible and add watchdog function
In preparation for making the hash function common, we may as well use
const where we can.

Also add a watchdog version of the hashing function.

Signed-off-by: Simon Glass <sjg@chromium.org>
2012-12-11 13:17:33 -07:00
Simon Glass
a7d1d76579 sha1: Use const where possible, and unsigned for input len
In preparation for making the hash function common, we may as well use
const where we can. Also the input length cannot be negative, but may
be very large, so use unsigned.

Signed-off-by: Simon Glass <sjg@chromium.org>
2012-12-11 13:17:33 -07:00
Vincent Palatin
6a135efcd0 stdio: remove useless strncpy
The name is already copied when we memcpy() the whole structure.

This is because struct stdio_dev has this field:

	char	name[16];		/* Device name				*/

So the data is inline, rather than being a pointer.

Signed-off-by: Vincent Palatin <vpalatin@chromium.org>

Signed-off-by: Simon Glass <sjg@chromium.org>
2012-12-11 13:17:33 -07:00
Simon Glass
75b3afc665 Fix use of conditional LMB
This code was not guarded with CONFIG_LMB so failed to build on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
2012-12-11 13:17:33 -07:00
Kenneth Waters
ff048ea916 Add a command to read raw blocks from a partition
Sometimes data is on a block device and within a partition, but not in a
particular filesystem.

This commands permits reading raw data from a partition.

Signed-off-by: Kenneth Waters <kwaters@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-12-11 13:17:33 -07:00
Anton Staaf
53fdc7ef2e Add gettime command
Gettime returns the current timer value.  If CONFIG_SYS_HZ is defined
then the timer value is also converted to seconds.

Tegra20 (SeaBoard) # gettime
Timer val: 7754
Seconds : 7
Remainder : 754
sys_hz = 1000

There has been some discussion about whether this is useful enough to
be included in U-Boot. The following boards do not have CONFIG_SYS_HZ
defined:

M52277EVB
M52277EVB_stmicro
M53017EVB
M54418TWR
M54418TWR_nand_mii
M54418TWR_nand_rmii
M54418TWR_nand_rmii_lowfreq
M54418TWR_serial_mii
M54418TWR_serial_rmii

Signed-off-by: Anton Staaf <robotboy@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-12-11 13:17:33 -07:00
Simon Glass
01433d6001 Add new bootstage step for the main loop
Mark when we get to the main loop.

Signed-off-by: Simon Glass <sjg@chromium.org>
2012-12-11 13:17:32 -07:00
Nikita Kiryanov
94740e4739 gpio: remove duplicate function signature
gpio_request() appears twice in asm-generic/gpio.h
Remove one of the definitions.

Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
2012-12-11 13:17:32 -07:00
Armando Visconti
d40d914c06 designware_i2c.h: Define IC_CLK only if not already defined in config file
Signed-off-by: Armando Visconti <armando.visconti@st.com>
2012-12-11 13:17:32 -07:00
Armando Visconti
ea31b7a7be designware_i2c.h: Fixed the correct values for SCL low/high time
Signed-off-by: Armando Visconti <armando.visconti@st.com>
2012-12-11 13:17:32 -07:00
Armando Visconti
5b8439bbde designware_i2c: Fixed the setting of the i2c bus speed
There are three couple (hcnt/lcnt) of registers for each
speed (SS/FS/HS). The driver needs to set the proper couple
of regs according to what speed we are setting.

Signed-off-by: Armando Visconti <armando.visconti@st.com>
2012-12-11 13:17:32 -07:00
Armando Visconti
491739bb74 designware_i2c: Added s/w generation of stop bit
In the newer versions of designware i2c IP there is the possibility
of configuring it with IC_EMPTYFIFO_HOLD_MASTER_EN=1, which basically
requires the s/w to generate the stop bit condition directly, as
the h/w will not automatically generate it when TX_FIFO is empty.

To avoid generation of an extra 0x0 byte sent as data, the
IC_STOP command must be sent along with the last IC_CMD.

This patch always writes bit[9] of ic_data_cmd even in the
older versions, assuming that it is a noop there.

Signed-off-by: Armando Visconti <armando.visconti@st.com>
2012-12-11 13:17:32 -07:00
Armando Visconti
ac6e2fe6e4 designware_i2c.c: Added the support for MULTI_BUS
This patch adds the capability to switch between 10
different I2C busses (from 0 to 9).

Signed-off-by: Armando Visconti <armando.visconti@st.com>
2012-12-11 13:17:31 -07:00
Piotr Wilczek
c86d9ed382 drivers:i2c: Modify I2C driver for Exynos4
This patch modifies the S3C i2c driver to support both Exynos4 and Exynos5

Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
CC: Minkyu Kang <mk7.kang@samsung.com>
2012-12-11 13:17:31 -07:00
Piotr Wilczek
89bd58a1e9 exynos:pinmux: Add pinmux support for i2c
This patch add pinmux for I2C for Exynos4

Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
CC: Minkyu Kang <mk7.kang@samsung.com>
2012-12-11 13:17:31 -07:00
Piotr Wilczek
847ab8f6e2 exynos:cpu: Add Exynos4 I2C spacing
This patch add the spacing for i2c for Exynos4

Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
CC: Minkyu Kang <mk7.kang@samsung.com>
2012-12-11 13:17:31 -07:00
Piotr Wilczek
83d745dd88 exynos:clock: Add i2c clock
This patch adds i2c clock for Exynos4

Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
CC: Minkyu Kang <mk7.kang@samsung.com>
2012-12-11 13:17:31 -07:00
Vincent Stehlé
66839773a8 omap24xx_i2c: Handle OMAP5 like OMAP2,3,4
OMAP5 has 8b i2c data register field, like OMAP2, 3 and 4. Handle in the same
way. This fixes the following error on OMAP5:

  OMAP5430 EVM # mmc rescan
  timed out in wait_for_bb: I2C_STAT=1410
  twl6035: could not turn on LDO9.

Signed-off-by: Vincent Stehlé <v-stehle@ti.com>
2012-12-11 13:17:31 -07:00
Marek Vasut
fa5e2845a8 mxs: i2c: Implement algorithm to set up arbitrary i2c speed
This algorithm computes the values of TIMING{0,1,2} registers for the
MX28 I2C block. This algorithm was derived by using a scope, but the
result seems correct.

The resulting values programmed into the registers do not correlate
with the contents in datasheet. When using the values from the datasheet,
the I2C clock were completely wrong.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Wolfgang Denk <wd@denx.de>
2012-12-11 13:17:30 -07:00
Marek Vasut
1e2fc0d19b mxs: i2c: Restore speed setting after block reset
The I2C block reset configures the I2C bus speed to strange value.
Read the I2C speed from the block before reseting the block and
restore it afterwards, so the I2C operates correctly. This issue
can be replicated by doing unsuccessful I2C transfer, after such
transfer finishes, the I2C block clock speed is misconfigured.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
2012-12-11 13:17:30 -07:00
Marek Vasut
aff36ea92e i2c: mxs: Fix TIMING2 register value
According to FSL, the value in the TIMING2 register shall be 0x00300030
instead of what's written in the datasheet. This new value correlates
with older STMP36xx datasheet. Issues were detected in Linux when this
register was misconfigured, so write this correct value.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
2012-12-11 13:17:30 -07:00
Marek Vasut
a157e0d5f6 i2c: mxs: Use i2c_set_bus_speed() in i2c_init()
Use i2c_set_bus_speed() in i2c_init() within the mxs i2c driver
to avoid duplication of code.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
2012-12-11 13:17:30 -07:00
Marek Vasut
a06f590f7f i2c: mxs: Implement i2c_get/set_bus_speed()
This patch implements the setup and retrieval functions for the I2C
bus speed on the MXS I2C IP.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
2012-12-11 13:17:30 -07:00
Marek Vasut
f32a470ed3 i2c: mxs: Abstract out the MXS I2C speed setup
This patch pulls out the I2C speed setup from the i2c_init() call
and implements the bus configuration lookup table with register
values that needs to be programmed into the I2C IP to run at
particular speed.

This patch is a first step towards implementing run-time I2C bus
speed configuration for the MXS I2C IP.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
2012-12-11 13:17:30 -07:00
Marek Vasut
06afa388b2 i2c: kerneldoc: Add kerneldoc annotations to cmd_i2c.c
Add kerneldoc style documentation into cmd_i2c.c to properly describe
all overridable functions and most of the command interface.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Heiko Schocher <hs@denx.de>
2012-12-11 13:17:29 -07:00
Marek Vasut
7f86bd576f i2c: Staticize local functions in mxc i2c driver
Some functions in the MXC i2c driver were not static, fix this by
making them so.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
2012-12-11 13:17:29 -07:00
Marek Vasut
2515d8437b i2c: Use __weak instead of __attribute__((weak, alias))
Use __weak from linux/compiler.h instead of __attribute__((weak, alias))
to define overridable function. This patch is intended as a cleanup patch
to bring some consistency into the code.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Heiko Schocher <hs@denx.de>
2012-12-11 13:17:29 -07:00
Andreas Bießmann
eabd5d8d70 soft_i2c: add necessary includes for AVR32
Signed-off-by: Andreas Bießmann <biessmann@corscience.de>
2012-12-11 13:17:29 -07:00
Fabio Estevam
9634670323 woodburn: Set gpio value in gpio_direction_output()
Set the gpio value in gpio_direction_output() instead of an extra gpio_set_value
call.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
2012-12-11 17:41:27 +01:00
Fabio Estevam
cabe240b59 mx25pdk: Adapt it for the new PMIC framework
Make the necessary adaptions for the new PMIC framework, so that mx25pdk can
be built again.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
2012-12-11 17:41:19 +01:00
Lars Rasmusson
ee7c0fc764 Correct comment to show the parameters as defined in tools/mkimage.h
Signed-off-by: Lars Rasmusson <Lars.Rasmusson@sics.se>
2012-12-11 06:46:43 -07:00
Minkyu Kang
fbef8e6e7f universal_c210: check the NULL pointer when get the PMIC
PMIC 2.0 require to test return pointer from pmic_get()

Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Cc: Wolfgang Denk <wd@denx.de>
Acked-by: Lukasz Majewski <l.majewski@samsung.com>
2012-12-11 17:37:28 +09:00
Rajeshwari Shinde
211e8438cf SMDK5250: Enable pmic MAX77686
Enabled pmic MAX77686 for SMDK5250.

Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
Acked-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2012-12-11 12:59:59 +09:00
Rajeshwari Shinde
857765e9aa POWER: MAX77686: Modified as per the latest Implementation
Moved the pmic_max77686.c max77686_pmic.h to drivers/power
and made required changes accordingly

Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
Acked-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2012-12-11 12:59:55 +09:00
Nikita Kiryanov
9bd5c1ad0d cm-t35: enable zero bootdelay check
Enable zero bootdelay check to make it possible to abort autoboot even if
bootdelay == 0

Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
2012-12-10 12:45:35 -07:00
Vincent Stehlé
ce851c8b3c power: twl6035: complain on LDO9 error
We handle i2c_write return code and complain in case of error. We propagate the
error, too, to allow better handling at the upper level in the future.

Signed-off-by: Vincent Stehlé <v-stehle@ti.com>
2012-12-10 12:45:35 -07:00
Vincent Stehlé
febc4cd48a omap24xx_i2c: Handle wait_for_bb error
We add a return code to wait_for_bb() to be able to report errors to the
callers properly. We in turn handle this new error code in i2c_read, i2c_write
and i2c_probe.

Signed-off-by: Vincent Stehlé <v-stehle@ti.com>
2012-12-10 12:45:35 -07:00
Nikita Kiryanov
dcee1ab320 gpio: add gpio_is_valid() to omap_gpio API
Add gpio_is_valid() to omap_gpio API

Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
2012-12-10 12:45:35 -07:00
Thomas Weber
abcbe2eb00 OMAP3: Remove unused PHYS_SDRAM_1_SIZE
Remove the unused PHYS_SDRAM_1_SIZE from OMAP3 config files.

Signed-off-by: Thomas Weber <thomas@tomweber.eu>
2012-12-10 12:45:34 -07:00
Yegor Yefremov
cdd0729ead am335x: cpsw: make phy address configurable
Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
2012-12-10 08:56:38 -07:00
Yegor Yefremov
cfd4ff6f0f am335x: disable internal delay for RGMII mode
According to errata the AM335x device does not support internal delay
mode, so RGMII1_IDMODE and RGMII2_IDMODE must be set to 1.

Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
2012-12-10 08:56:38 -07:00
Stefano Babic
31f5b651fa OMAP3: TAM3517: add macros for reading eeprom
Added macros to read SOM information from the I2C
EEPROM.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2012-12-10 08:56:38 -07:00
Stefano Babic
fe2d59a123 OMAP3: fix panel timing on the mt_ventoux board
Signed-off-by: Stefano Babic <sbabic@denx.de>
2012-12-10 08:56:38 -07:00
Davide Bonfanti
21f11c7b49 davinci: fixed cpu reset
The reset procedure works on watchdog timer while before it was modifying
TIMER_1 registers.
Tested on DM365.

Signed-off-by: Davide Bonfanti <davide.bonfanti@bticino.it>
2012-12-10 08:56:38 -07:00
ajoy
cc1182beea OMAP3 SPI : Fixed bugs related to SPI transfer
Added posted writes (read after writes) to effect the
change immediately for channel confiuration and channel
enable register

Disable the channel to purge receieve data in TX_ONLY
mode transfer otherwise rx data will get affected by
the next immediate RX_ONLY mode transfer

Wait for the EOT bit to be set after last byte has been
loaded to TX shift register in the the TX_ONLY mode.This
ensures TX data has been completely shifted out

Disable the channel in RX_ONLY mode before reading the
last data from  RXX register to prevent the SPI slave
to transmit next word

Signed-off-by: Ajoy Kumar Das <akdas75@yahoo.in>
Cc: Tom Rini <trini@ti.com>
Cc: jacopo mondi <j.mondi@voltaelectronics.com>
2012-12-10 08:55:25 -07:00
Lokesh Vutla
86021143a3 omap: emif: configure emif only when required
DMM_LISA_MAP registers program whether memory is mapped
on particular EMIF or not. Irrespective of these registers
EMIF is getting configured. Correcting the same.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2012-12-10 08:55:25 -07:00
Robert P. J. Day
c7f1cf5f29 OMAP: Tweak omap-common/Makefile since reset.S -> reset.c
Git commit d417d1db5f replaced the
omap-common file reset.S with reset.c, but the Makefile was not
adjusted for that.

Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
2012-12-10 08:55:25 -07:00
Robert P. J. Day
f281f299df omap4: Add comments on some "#endif"s for readability.
No functional changes, simply for readability.

Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
2012-12-10 08:55:25 -07:00
Robert P. J. Day
e3fe62574d omap3: Add a few comments to "#endif"s for readability.
No functional changes, just more comments for readability when a
preprocessor check spans more than a few lines, and for consistency.

Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
2012-12-10 08:55:25 -07:00
Peter Barada
8c4445d266 Pass sdrc timing values through board_sdrc_timings structure
Instead of passing individual registers by value to board_get_mem_timings,
pass a board_mem_timings structure pointer for the board files to fill in.
Pass same structure pointer to write_sdrc_timings.  This saves about
90 bytes of space in SPL.

Signed-off-by: Peter Barada <peter.barada@logicpd.com>
2012-12-10 08:54:02 -07:00
Robert P. J. Day
d7aff44a00 omap3_beagle.h: Fix comment for true/false return value.
Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
2012-12-10 08:54:02 -07:00
Ilya Yanok
b4606c6cea am335x_evm: enable SPL NAND support
Enable booting from NAND support from AM335x boards as well as
environment in NAND.

Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
2012-12-10 08:54:02 -07:00
Ilya Yanok
5846b11e88 am33xx_spl_bch: simple SPL nand loader for AM33XX
AM33XX with BCH8 can't work with nand_spl_simple correctly
because custom read_page implementation is required for proper
syndrome generation.

This simple driver mostly duplicates nand_spl_simple but has
nand_read_page changed to suit our needs.

Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
2012-12-10 08:54:02 -07:00
Mansoor Ahamed
c3754e9cc2 omap_gpmc: BCH8 support (ELM based)
This patch adds support for BCH8 error correction code to omap_gpmc
driver. We use GPMC to generate codes/syndromes but we need ELM to find
error locations from given syndrome.

Signed-off-by: Mansoor Ahamed <mansoor.ahamed@ti.com>
[ilya: merge it with omap_gpmc driver, some fixes and cleanup]
Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
2012-12-10 08:54:02 -07:00
Mansoor Ahamed
04c3757829 am33xx: add ELM support
AM33XX has Error Location Module (ELM) that can be used in conjuction
with GPMC controller to implement BCH codes fully in hardware.
This code is mostly taken from arago tree.

Signed-off-by: Mansoor Ahamed <mansoor.ahamed@ti.com>
Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
2012-12-10 08:54:02 -07:00
Ilya Yanok
98b5c26943 am335x_evm: enable NAND support
Enable NAND support for AM335X boards.

Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
2012-12-10 08:54:02 -07:00
Ilya Yanok
8eb16b7f73 am33xx: NAND support
TI AM33XX has the same GPMC controller as OMAP3 so we could just use the
existing omap_gpmc driver. This patch adds adds required
definitions/intialization.

Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
2012-12-10 08:54:01 -07:00
Ilya Yanok
70fb65b093 am335x_evm: add nand pinmux definition
Add NAND pins mux settings for AM335X devices. Enable NAND pins
for AM335X EVM board.

Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
2012-12-10 08:54:01 -07:00
Ilya Yanok
1befaffbfb OMAP: include sys_proto.h from boot-common
Include asm/arch/sys_proto.h for gpmc_init prototype.
Without this we get a warning while building for AM335x.

Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
2012-12-10 08:54:01 -07:00
Andreas Bießmann
4af9e675fa omap3/mem.c: remove unused defines
These GPMC_CS defines are a leftover from prior gpmc_init(). Commit 187af954
removed the need for these definitions but missed to remove them.

Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Cc: Tom Rini <trini@ti.com>
2012-12-10 08:54:01 -07:00
Minkyu Kang
48e91caefe universal_c210: fix compiler error and compiler warning
This patch fix following errors

universal.c: In function 'init_pmic_lcd':
universal.c:340: warning: implicit declaration of function 'get_pmic'
universal.c:340: warning: initialization makes pointer from integer without a cast
universal.c: In function 'lcd_power_on':
universal.c:431: warning: initialization makes pointer from integer without a cast
universal.c: At top level:
universal.c:335: warning: 'init_pmic_lcd' defined but not used

Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Cc: Donghwa Lee <dh09.lee@samsung.com>
Cc: Lukasz Majewski <l.majewski@samsung.com>
Tested-by: Piotr Wilczek <p.wilczek@samsung.com>
2012-12-10 22:28:10 +09:00
Minkyu Kang
2c601c7208 Merge branch 'master' of git://git.denx.de/u-boot into resolve
Conflicts:
	README
	board/samsung/universal_c210/universal.c
	drivers/misc/Makefile
	drivers/power/power_fsl.c
	include/configs/mx35pdk.h
	include/configs/mx53loco.h
	include/configs/seaboard.h
2012-12-10 14:13:27 +09:00
Bo Shen
ac81e1ccf7 spi: atmel: sam9m10g45 also support WDRBT bit
The at91sam9m10g45 also support WDRBT bit, add support for it

Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2012-12-09 22:40:13 +01:00
Richard Genoud
b030e73173 at91sam9x5ek: add USB configuration
Signed-off-by: Richard Genoud <richard.genoud@gmail.com>
Acked-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2012-12-09 22:39:47 +01:00
Richard Genoud
419fba0c68 at91sam9x5ek: regroup FAT/DOS features
Signed-off-by: Richard Genoud <richard.genoud@gmail.com>
Acked-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2012-12-09 22:38:50 +01:00
Richard Genoud
bcfc8976e5 at91sam9x5: enable USB support for 9x5ek board.
Signed-off-by: Richard Genoud <richard.genoud@gmail.com>
Acked-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2012-12-09 22:38:27 +01:00
Daniel Schwierzeck
ea40a05422 MIPS: constify address pointer in test_bit()
Fix several warnings when enabling UBIFS on MIPS:

In file included from ubifs.h:2137:0,
                 from ubifs.c:26:
misc.h: In function 'ubifs_zn_dirty':
misc.h:38:2: warning: passing argument 2 of 'test_bit' discards 'const' qualifier from pointer target type [enabled by default]
../include/asm/bitops.h:569:23: note: expected 'volatile void *' but argument is of type 'const long unsigned int *'

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2012-12-08 21:48:19 +01:00
Zhi-zhou Zhang
0d69d918ab MIPS: fix a latent bug on initialize $gp
If bal is 8 bytes aligned, the _gp will not be 8 bytes aligned.
then the following ld insntrustion generates a Adel exception.
So here make _gp be always aligned in 8 bytes.

Signed-off-by: Zhi-zhou Zhang <zhizhou.zh@gmail.com>
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2012-12-08 21:33:07 +01:00
Stefano Babic
05a860c228 Merge branch 'master' of git://git.denx.de/u-boot into master
Conflicts:
	drivers/power/power_fsl.c
	include/configs/mx35pdk.h
	include/configs/mx53loco.h
	include/configs/woodburn_common.h
	board/woodburn/woodburn.c

These boards still use the old old PMIC framework, so they
do not merge properly after the power framework was merged into
mainline.

Fix all conflicts and update woodburn to use Power Framework.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2012-12-08 12:02:45 +01:00
Tom Rini
fd4d564b3c Merge branch 'master' of git://git.denx.de/u-boot-x86 2012-12-07 08:47:59 -07:00
Łukasz Majewski
13d43555a9 fs:ext4:write: Initialize cache aligned filename buffer
The filename buffer is allocated dynamically. It must be cache aligned.
Moreover, it is necessary to erase its content before we use it for
file name operations.

This prevents from corruption of written file names.

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
2012-12-07 08:47:53 -07:00
Łukasz Majewski
d429ca0d83 fs:ext4:fix: Code refactoring to suppress compiler warnings
Several fixes to suppress compiler's (eldk-5.[12].x  gcc 4.6)
warning  [-Wunused-but-set-variable]

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
2012-12-07 08:47:53 -07:00
Łukasz Majewski
a1f41f1a55 fs:ext4:write: Store block device descriptor in file system structure
The device block descriptor (block_dev_desc_t) )shall be stored at
ext4 early code (at ext4fs_set_blk_dev in this case) to be available
for latter use (like put_ext4()).

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
2012-12-07 08:47:52 -07:00
Łukasz Majewski
32fc16d7e7 fs:ext4:write: Add lldiv and do_div to perform 64-32 bits division
The ext4write code has been using direct calls to 64-32 division
(/ and %).

Officially supported u-boot toolchains (eldk-5.[12].x) generate calls
to __aeabi_uldivmod(), which is niether defined in the toolchain libs
nor u-boot source tree.

Due to that, when the ext4write command has been executed, "undefined
instruction" execption was generated (since the __aeabi_uldivmod()
is not provided).

To fix this error, lldiv() for division and do_div() for modulo have
been used.

Those two functions are recommended for performing 64-32 bit number
division in u-boot.

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
2012-12-07 08:47:52 -07:00
Luka Perkov
3fdf7596df Change e-mail address of Luka Perkov
Change e-mail address of Luka Perkov.

Signed-off-by: Luka Perkov <luka@openwrt.org>
CC: Luka Perkov <uboot@lukaperkov.net>
2012-12-07 08:47:52 -07:00
Joshua Housh
10501df05e serial_pl011: Set RTS during initialization
If the pl011 is connected to another device which has hardware
flow-control on, characters are never received by the pl011.
Asserting RTS when flow-control is off will have no effect.

This is in line with how Linux behaves.

Signed-off-by: Joshua Housh <joshua.housh@calxeda.com>
Tested-by: Marek Vasut <marex@denx.de>
2012-12-07 08:47:52 -07:00
Robert P. J. Day
fcdde04c20 MAINTAINERS: Add a pointer to the custodians page.
Since there's no obvious mention, add a brief reference to the
custodians page at www.denx.de

Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
2012-12-07 08:47:51 -07:00
Otavio Salvador
393ff47ba3 mxs: SPL: Generalize memory initialization
Use a generic 'dram_vals[]' array that has the full initialization
sequence and rename the initialization method so it doesn't has a
frequency on its name.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2012-12-07 14:50:02 +01:00
Simon Glass
ac426b7290 x86: Fix coreboot config to boot on Chromebook
The config is current broken. It compiles but does not boot because IDE is
enabled. Remove all IDE options, and enable SCSI instead.

Also add a working boot command and Linux bootargs, and enable command
line editing to make it easier to work with.

Signed-off-by: Simon Glass <sjg@chromium.org>
2012-12-06 14:30:45 -08:00
Gabe Black
d954a431ec x86: Turn on support for EFI's GPT in the coreboot config
This allows u-boot to figure out the partitions of a chrome-os install.

Signed-off-by: Gabe Black <gabeblack@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-12-06 14:30:44 -08:00
Simon Glass
cbca883c46 x86: coreboot: Enable video display
Enable the display on coreboot, using CFB.

Signed-off-by: Simon Glass <sjg@chromium.org>
2012-12-06 14:30:44 -08:00
Simon Glass
058d59b08d x86: Build vga video code only if CONFIG_VIDEO_VGA is defined
When running from coreboot we don't want this code, so make it
optional.

Signed-off-by: Simon Glass <sjg@chromium.org>
2012-12-06 14:30:44 -08:00
Simon Glass
a94e9d70e3 x86: Remove video_init() prototype from u-boot-x86.h
This function is not intended to be exported from the video drivers, so
remove the prototype. This fixes an error:

cfb_console.c:1793:12: error: static declaration of 'video_init' follows non-static declaration

Signed-off-by: Simon Glass <sjg@chromium.org>
2012-12-06 14:30:44 -08:00
Duncan Laurie
ae63057446 video: Check for valid FB pointer before clearing
This command will start erasing at memory address zero
if there is not a valid framebuffer address that was found
during video_init().

This is a common case with Chrome OS devices in normal mode
when we do not execute the video option rom in coreboot.

Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-12-06 14:30:44 -08:00
Stefan Reinauer
c94663170b x86: drop unused code in coreboot.c
The function setup_pcat_compatibility() is weak and implemented as empty
function in board.c hence we don't have to override that with another
empty function.

monitor_flash_len is unused, drop it.

Signed-off-by: Stefan Reinauer <reinauer@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-12-06 14:30:44 -08:00
Stefan Reinauer
2b9d2252aa x86: Remove coreboot_ from file name
... because that information is already "encoded" in the directory name.

Signed-off-by: Stefan Reinauer <reinauer@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-12-06 14:30:43 -08:00
Vadim Bendebury
1350f1cce1 x86: Provide a way to throttle port80 accesses
Some systems (like Google Link device) provide the ability to keep a
history of the target CPU port80 accesses, which is extremely handy
for debugging. The problem is that the EC handling port 80 access is
orders of magnitude slower than the AP. This causes random loss of
trace data.

This change allows to throttle port 80 accesses such that in case the
AP is trying to post faster than the EC can handle, a delay is
introduced to make sure that the post rate is throttled. Experiments
have shown that on Link the delay should be at least 350,000 of tsc
clocks.

Throttling is not being enabled by default: to enable it one would
have to set MIN_PORT80_KCLOCKS_DELAY to something like 400 and rebuild
the u-boot image. With upcoming EC code optimizations this number
could be decreased (new new value should be established
experimentally).

Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-12-06 14:30:43 -08:00
Vadim Bendebury
7c71034d3c x86: Provide tick counter and frequency reference for Intel core architecture
Some u-boot modules rely on availability of get_ticks() and
get_tbclk() functions, reporting a free running clock and its
frequency respectively. Traditionally these functions return number
and frequency of timer interrupts.

Intel's core architecture processors however are known to run the
rdtsc instruction at a constant rate of the so called 'Max Non Turbo
ratio' times the external clock frequency which is 100MHz. This is
just as good for the timer tick functions in question.

Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-12-06 14:30:43 -08:00
Duncan Laurie
b83058cd23 x86: Issue SMI to finalize Coreboot in final stage
This will write magic value to APMC command port which
will trigger an SMI and cause coreboot to lock down
the ME, chipset, and CPU.

Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-12-06 14:30:43 -08:00
Duncan Laurie
488b8b242b x86: Fix MTRR clear to detect which MTRR to use
Coreboot was always using MTRR 7 for the write-protect
cache entry that covers the ROM and U-boot was removing it.
However with 4GB configs we need more MTRRs for the BIOS
and so the WP MTRR needs to move.  Instead coreboot will
always use the last available MTRR that is normally set
aside for OS use and U-boot can clear it before the OS.

Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-12-06 14:30:43 -08:00
Stefan Reinauer
300081aa68 x86: Emit port 80 post codes in show_boot_progress()
This helps us monitor boot progress and determine where U-Boot dies if
there are any problems.

Signed-off-by: Stefan Reinauer <reinauer@google.com>

Signed-off-by: Simon Glass <sjg@chromium.org>
2012-12-06 14:30:43 -08:00
Simon Glass
2712f08898 x86: fdt: Create basic .dtsi file for coreboot
This contains just the minimum information for a coreboot-based board.

Signed-off-by: Stefan Reinauer <reinauer@chromium.org>
Signed-off-by: Gabe Black <gabeblack@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-12-06 14:30:42 -08:00
Gabe Black
ba74a0ffcb x86: coreboot: Set CONFIG_ARCH_DEVICE_TREE correctly
We will use coreboot.dtsi as our fdt include file.

Signed-off-by: Gabe Black <gabeblack@chromium.org>

Signed-off-by: Simon Glass <sjg@chromium.org>
2012-12-06 14:30:42 -08:00
Gabe Black
b208c7f1d0 x86: Add support for CONFIG_OF_CONTROL
Allow a device tree to be provided through the standard mechanisms.

Signed-off-by: Gabe Black <gabeblack@google.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-12-06 14:30:42 -08:00
Stefan Reinauer
05b71646a9 x86: Add CONFIG_DELAY_ENVIRONMENT to delay environment loading
This option delays loading of the environment until later, so that only the
default environment will be available to U-Boot.

This can address the security risk of untrusted data being used during boot.

When CONFIG_DELAY_ENVIRONMENT is defined, it is convenient to have a
run-time way of enabling loadinlg of the environment. Add this to the
fdt as /config/delay-environment.

Note: This patch depends on http://patchwork.ozlabs.org/patch/194342/

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Stefan Reinauer <reinauer@chromium.org>
2012-12-06 14:30:42 -08:00
Gabe Black
91d82a29e7 x86: Add back cold- and warm-boot flags
These were removed, but actually are useful.

Cold means that we started from a reset/power on.
Warm means that we started from another U-Boot.

We determine whether u-boot on x86 was warm or cold booted (really if
it started at the beginning of the text segment or at the ELF entry point).
We plumb the result through to the global data structure.

Signed-off-by: Simon Glass <sjg@chromium.org>
2012-12-06 14:30:42 -08:00
Gabe Black
112a575e49 x86: Override calculate_relocation_address to use the e820 map
Because calculate_relocation_address now uses the e820 map, it will be able
to avoid addresses over 32 bits and regions that are at high addresses but
not big enough for U-Boot. It also means we can remove the hack which
limitted U-Boot's idea of the size of memory to less than 4GB.

Also take into account the space needed for the heap and stack, so we avoid
picking a very small region those areas might overlap with something it
shouldn't.

Signed-off-by: Gabe Black <gabeblack@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-12-06 14:30:42 -08:00
Gabe Black
d65297b64d x86: Make calculate_relocation_address an overridable function
Different systems may have different mechanisms for picking a suitable place
to relocate U-Boot to.

Signed-off-by: Gabe Black <gabeblack@chromium.org>

Signed-off-by: Simon Glass <sjg@chromium.org>
2012-12-06 14:30:41 -08:00
Gabe Black
842d33874f x86: Make the upper bound on relocated symbols closed instead of open
This seems to be a bug.

Signed-off-by: Simon Glass <sjg@chromium.org>
2012-12-06 14:30:41 -08:00
Gabe Black
32f98735f9 x86: Reorder x86's post relocation memory layout
This changes the layout in decreasing addresses from:

1. Stack
2. Sections in the image
3. Heap

to

1. Sections in the image
2. Heap
3. Stack

This allows the stack to grow significantly more since it isn't constrained by
the other u-boot areas. More importantly, the generic memory wipe code assumes
that the stack is the lowest addressed area used by the main part of u-boot.
In the original layout, that means that u-boot tramples all over itself. In
the new layout, it works.

Signed-off-by: Gabe Black <gabeblack@google.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-12-06 14:30:41 -08:00
Gabe Black
8313315b9a x86: Initialise SPI if enabled
If we have SPI support, make sure that we init it.

Signed-off-by: Gabe Black <gabeblack@google.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Vic Yang <victoryang@chromium.org>
2012-12-06 14:30:41 -08:00
Gabe Black
ac31a7b81c x86: Implement arch_phys_memset so that it can wipe memory above 4GB
Implement arch_phys_memset so that it can set memory at physical addresses
above 4GB using PAE paging. Because there are only 5 page tables in PAE mode,
1 PDPT and 4 PDTs, those tables are statically allocated in the BSS. The
tables must be 4K page aligned and are declared that way, and because U-Boot
starts as 4K aligned and the relocation code relocates it to a 4K aligned
address, the tables work as intended.

While paging is turned on, all 4GB are identity mapped except for one 2MB
page which is used as the window into high memory. This way, U-Boot will
continue to work as expected when running code that expects to access memory
freely, but the code can still get at high memory through its window.

The window is put at 2MB so that it's 2MB page aligned, low in memory to be
out of the way of things U-Boot is likely to care about, and above the lowest
1MB where lots of random things live.

Signed-off-by: Gabe Black <gabeblack@chromium.org>

Signed-off-by: Simon Glass <sjg@chromium.org>
2012-12-06 14:30:41 -08:00
Gabe Black
40fef04906 Introduce arch_phys_memset which works like memset but on physical memory
The default implementation of this function is just memset, but other
implementations will be needed when physical memory isn't accessible by
U-Boot using normal addressing mechanisms.

Signed-off-by: Gabe Black <gabeblack@chromium.org>
Signed-off-by: Che-Liang Chiou <clchiou@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-12-06 14:30:40 -08:00
Gabe Black
ec516c4899 x86: Increase the size of the phys_size_t and phys_addr_t types
These types should be 64 bits long to reflect the fact that physical
addresses and the size of physical areas of memory are more than 32 bits
long.

Signed-off-by: Gabe Black <gabeblack@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-12-06 14:30:40 -08:00
Duncan Laurie
0c3929092d x86: Fix off-by-one error in do_elf_reloc_fixups()
The use of post-increment with a do-while loop results in
the loop going one step too far when handling relocation fixups.

In about 1/100 cases this would cause it to hang.

Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-12-06 14:30:40 -08:00
Duncan Laurie
984d8b09fb x86: Ignore memory >4GB when parsing Coreboot tables
U-boot is unable to actually use that memory and it can
cause problems with relocation if it tries to.

Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-12-06 14:30:40 -08:00
Simon Glass
34d6057be1 x86: Enable CONFIG_CMD_ZBOOT for coreboot
Enable this option to support booting a zImage.

Signed-off-by: Simon Glass <sjg@chromium.org>
2012-12-06 14:30:40 -08:00
Simon Glass
1484311286 x86: Fix indirect jmp warning in zimage.c
This fixes the following warning:

zimage.c:312: Warning: indirect jmp without `*'

Also fixed these warnings to keep checkpatch quiet:

warning: arch/x86/lib/zimage.c,311: unnecessary whitespace before a quoted newline
warning: arch/x86/lib/zimage.c,312: unnecessary whitespace before a quoted newline
warning: arch/x86/lib/zimage.c,313: unnecessary whitespace before a quoted newline

Signed-off-by: Simon Glass <sjg@chromium.org>
2012-12-06 14:30:40 -08:00
Stefan Reinauer
17de114f9f x86: Clean up MTRR 7 right before jumping to the kernel
This cleans up the rom caching optimization implemented in coreboot (and
needed throughout U-Boot runtime).

Signed-off-by: Stefan Reinauer <reinauer@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-12-06 14:30:39 -08:00
Graeme Russ
98568f0fa9 x86: Import MSR/MTRR code from Linux
Imported from Linux 3.1 with a few modifications to suit U-Boot

Signed-off-by: Simon Glass <sjg@chromium.org>
2012-12-06 14:30:39 -08:00
Stefan Reinauer
61e0ea900a x86: Provide a function to clean up just before booting a zimage
This function can be used by boards which want to do some clean-up
before booting a zImage.

Signed-off-by: Stefan Reinauer <reinauer@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-12-06 14:30:39 -08:00
Stefan Reinauer
095593c030 x86: Add basic cache operations
Add functions to enable/disable the data cache.

Signed-off-by: Stefan Reinauer <reinauer@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-12-06 14:30:39 -08:00
Gabe Black
9a7da182fa x86: Fill in the dram info using the e820 map on coreboot/x86
This way when that dram "banks" are displayed, there's some useful information
there. The number of "banks" we claim to have needs to be adjusted so that it
covers the number of RAM e820 regions we expect to have/care about.

This needs to be done after "RAM" initialization even though we always run
from RAM. The bd pointer in the global data structure doesn't automatically
point to anything, and it isn't set up until "RAM" is available since, I
assume, it would take too much space in the very constrained pre-RAM
environment.

Signed-off-by: Gabe Black <gabeblack@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-12-06 14:30:39 -08:00
Vadim Bendebury
3cdc18a8de x86: Add a CBMEM timestamp generated right before the kernel startup.
To maintain the initialization state of the timestamp facility, thesq
pointer to the CBMEM section containing the timestamp table should be
kept in the .data section (so that it is maintained across u-boot
relocation).

Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-12-06 14:30:39 -08:00
Vadim Bendebury
6dbe0cce3f x86: Enable coreboot timestamp facility support in u-boot.
This change turns on the code which allows u-boot to add
timestamps to the timestamp table created by coreboot.

Since u-boot does not use the tsc_t like structure to represent
HW counter readings, this structure is being replaced by 64 bit
integer.

The timestamp_init() function is now initializing the base timer
value used by u-boot to calculate the HW counter increments.

Timestamp facility is initialized as soon as the timestamp table
pointer is found in the coreboot table. The u-boot generated
timer events' ID will start at 1000 to clearly separate u-boot
events from coreboot events in the timer trace.

Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Signed-off-by: Stefan Reinauer <reinauer@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-12-06 14:30:38 -08:00
Vadim Bendebury
2f899e03a9 x86: Add function to read time stamp counter
Put this function in the u-boot-x86.h header file. We could instead create
timer.h perhaps.

We support setting a base time, and reading the time relative to this base.

Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Signed-off-by: Stefan Reinauer <reinauer@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-12-06 14:30:38 -08:00
Bill Richardson
57be9172fc x86: gpio: Add additional GPIO banks to the ICH6 driver
We can generally trust the ICH to have GPIO Bank 0 (the first 32 pins) in the
same place across all versions. This change adds two more banks, for up to
96 GPIOS.

BUT:
- Not all chipsets have the same number of GPIOs
- Not all chipsets have the same number of GPIO banks
- Not all chipsets put the additional banks at the same offset from GPIOBASE
- There so many chipset variants that it's pretty much impossible to support
  them all, or even keep track of the new ones.

So, although this adds suppport for the additional banks that seem to work
for the particular variants of CougarPoint Mobile chipsets that we've tried,
there's no chance it will support everything Intel produces. Good luck.

Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-12-06 14:30:38 -08:00
Simon Glass
a7e6d5496c x86: Enable ICH6 GPIO controller for coreboot
Coreboot uses this controller to implement GPIO access.

Signed-off-by: Simon Glass <sjg@chromium.org>
2012-12-06 14:30:38 -08:00
Bill Richardson
55ae10f8db x86: gpio: Add GPIO driver for Intel ICH6 and later.
Implement <asm-generic/gpio.h> functions for Intel ICH6 and later.
Only GPIOs 0-31 are handled by this code.

Signed-off-by: Bill Richardson <wfrichar@chromium.org>

Signed-off-by: Simon Glass <sjg@chromium.org>
2012-12-06 14:30:38 -08:00
Luka Perkov
6e266bf88b add include/u-boot.lst to .gitignore
u-boot.lst is located in include directory. Update .gitignore file
accordingly.

Signed-off-by: Luka Perkov <luka@openwrt.org>
2012-12-06 13:56:39 -07:00
Robert P. J. Day
adb9d85139 README: Explain how to generate the CHANGELOG file.
Since the top-level README file refers the reader to the CHANGELOG,
it's worth mentioning how to generate it.

Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
2012-12-06 13:56:39 -07:00
Robert P. J. Day
d4b901dd73 cmd_led.c: Standardize format of help and usage info.
Current "led" help and usage info has redundancy and extraneous
newlines, tweak it to be consistent with other commands.

Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
2012-12-06 13:56:39 -07:00
Joe Hershberger
d060e6f441 Allow CONFIG_BOARD_SIZE_LIMIT to be specified in hex
Use the printf command to convert the number in any valid format into
the expected decimal format.  The resulting errors should be printed to
stderr.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
2012-12-06 13:56:39 -07:00
Jerry Huang
33699df12c part: check each variable for capability calculation
In order to calculate the capability, we use the below expression to check:
((dev_desc->lba * dev_desc->blksz)>0L)
If the capability is greater than 4GB (e.g. 8GB = 8 * 1024 * 104 * 1024),
the result will overflow, the low 32bit may be zero.

Therefore, change to check each variable to fix this potential issue.

Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com>
2012-12-06 13:56:39 -07:00
Simon Glass
e3ff797cdb cbfs: Add docbook template
This adds a docbook template for fs, and makes CBFS use it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2012-12-06 13:56:39 -07:00
Simon Glass
2592075776 cbfs: Remove mention of CREDITS files
As requested by Wolfgang, remove references to CREDITS in the CBFS
files.

Signed-off-by: Simon Glass <sjg@chromium.org>
2012-12-06 13:56:38 -07:00
Stefan Reinauer
5fe8380db3 lzma: update to lzma sdk 9.20
Updated code taken from latest lzma sdk release 9.20 at
http://downloads.sourceforge.net/sevenzip/lzma920.tar.bz2

This generates quite a lot of checkpatch warnings, but I guess we
need to keep the code style as is to avoid a massive job each time we
update this.

Signed-off-by: Stefan Reinauer <reinauer@google.com>

Signed-off-by: Simon Glass <sjg@chromium.org>
2012-12-06 13:56:38 -07:00
Joe Hershberger
0851020479 MAKEALL: Add options for incremental building
--continue will allow you to <ctrl-c> the MAKEALL and pick up where
you left off.

--rebuild-errors will allow you to rebuild only those boards which
had trouble on the last run of MAKEALL, allowing you to quickly test
a simple fix on just those boards.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
2012-12-06 11:23:00 -07:00
Joe Hershberger
c97d59cbda MAKEALL: Fix kill_children
When building in parallel, make sure that we look up the children
based on the the actual process group id instead of just assuming
that the MAKEALL pid is the process group id.

Also ensure that logs from incomplete builds are deleted in the
process.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
2012-12-06 11:23:00 -07:00
Matthias Fuchs
468ebf190a 4xx: Fix PCI memory mapping on CPCI405 boards
This patch fixes an issue with overlapping PCI regions
on boards with more than 64MB RAM.

Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
Signed-off-by: Stefan Roese <sr@denx.de>
2012-12-06 15:53:04 +01:00
Stefan Roese
fb3d2b8a3f Makefile: Add target for combined spl/u-boot.bin & u-boot.img
This new make target "u-boot-img.bin" consists of the U-Boot
SPL image with the real, full-blown U-Boot image directly
attached to it. The full-blown U-Boot image has the mkimage
header included, with its load-address and entry-point.

This will be used by the upcoming a3m071 MPC5200 board port.

Signed-off-by: Stefan Roese <sr@denx.de>
2012-12-05 17:31:30 +01:00
Stefan Roese
b40bda6bd8 Makefile: Add possibility to set entry-point for u-boot.img
This patch enabled boards using the SPL framework to set
an entry point in the U-Boot mkimage image "u-boot.img".
Until now the entry point in the header has been set to 0.
By setting CONFIG_SYS_UBOOT_START in the board header, boards
can override this default location.

This will be used by the upcoming a3m071 MPC5200 board port.

Signed-off-by: Stefan Roese <sr@denx.de>
2012-12-05 17:31:26 +01:00
Stefan Roese
13b4f63949 mpc5200: Add a3m071 board support
This patch adds support for the a3m071 board based on the
MPC5200.

Signed-off-by: Stefan Roese <sr@denx.de>
2012-12-05 17:31:23 +01:00
Stefan Roese
083f2e08d2 mpc5200: Add SPL support
This patch adds SPL booting support (NOR flash) for the
MPC5200 platforms.

Signed-off-by: Stefan Roese <sr@denx.de>
2012-12-05 17:30:51 +01:00
Stefan Roese
d3aa8b8be2 env: Enable getenv_f() for SPL_BUILD
With this patch, getenv_f() can be included easily into the SPL
binary. With this, SPL boards can now use getenv_f() to read
environment variables (e.g. to detect if the OS or U-Boot shall
be executed).

In the approach this is done for env stored in NOR flash, as this
will be used by an upcoming MPC5200 board port.

Signed-off-by: Stefan Roese <sr@denx.de>
2012-12-05 17:30:27 +01:00
Stefan Roese
ea8256f072 SPL: Port SPL framework to powerpc
This patch enables the SPL framework to be used on powerpc platforms
and not only ARM.

timer_init() does not exist on PPC systems. The timer (decrementer) is
initialized and enabled in interrupt_init() here. And currently
interrupt_init() is called after relocation to SDRAM. Since the only
powerpc SPL implementation (a3m071) doesn't need a timer, let's remove
this timer_init() call for PPC systems.

Signed-off-by: Stefan Roese <sr@denx.de>
2012-12-05 17:30:22 +01:00
Stefan Roese
966b11c749 powerpc: Extract EPAPR_MAGIC constants into processor.h
By extracting these defines into a header, they can be re-used by other
C sources as well. This will be done by the SPL framework OS boot
support.

Signed-off-by: Stefan Roese <sr@denx.de>
2012-12-05 17:27:02 +01:00
Marek Vasut
a918a53c36 mxs: Staticize SPL functions
The MXS SPL didn't mark local functions "static". Fix it. This also makes the
SPL smaller by roughly 300 bytes.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
2012-12-04 09:29:11 +01:00
Marek Vasut
1230e7bc2d mxs: Properly setup VDDD in power supply setup code
The memory setup code adjusted the VDDD voltage. Remove this adjustment
and configure the VDDD voltage correctly in the power supply setup code.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
2012-12-04 09:27:21 +01:00
Marek Vasut
77cb33bd25 mxs: Implement common function to setup VDDx
Implement common function to setup the VDDIO, VDDD and VDDA voltage.
Right now, there are two almost identical functions to setup VDDIO
and VDDD, which is prone to breakage. Pull out the differences into
constant structure and pass them as an argument to the common function.

Moreover, the function has almost identical loops for setting higher
and lower VDDx voltage. Merge these two loops.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
2012-12-04 09:26:54 +01:00
Marek Vasut
58bcadd9d0 mxs: Silence elftosb
The elftosb tool is now called with -d switch, which produces debug
output to the stdout. The debug output is completely useless for
regular operation, so silence it.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Otavio Salvador <otavio@ossystems.com.br>
2012-12-04 09:06:29 +01:00
Marek Vasut
893aabbead mx28: Rename regs-power.h to regs-power-mx28.h
The i.MX23 has different register layout and bit placement in the
power supply. Thus, in order to be able to add support for MX23,
rename the MX28's regs-power.h to regs-power-mx28.h . Moreover,
add ifdef around inclusion of regs-*-mx28.h in imx-regs.h so the
MX23 boards will include proper set of registers.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
2012-12-04 09:01:04 +01:00
Marek Vasut
3642b1c147 mx28: Remove SET, CLR, TOG ops from PLLxCTRL1 registers
These registers don't have _SET, _CLR and _TOG at the respective offsets
available, these registers has to be toggled via R-M-W if needed. Thus do
not export these offsets anymore.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Acked-by: Otavio Salvador <otavio@ossystems.com.br>
2012-12-04 08:52:05 +01:00
Tom Rini
ce12a8c1a9 Merge branch 'master' of git://git.denx.de/u-boot-x86 2012-12-03 06:47:05 -07:00
Stefan Reinauer
339c511106 x86: Don't spam POST80 codes with slow IO functions
This patch prevents u-boot from "spamming" random progress codes on
a port 80 "post card".
The previous version of this patch just removed the delays in the "slow"
IO functions, as they do not need to be slow, however, this patch is
less intrusive.

It uses another unused port that is often used by BIOSes (and the Linux
Kernel) for small delay timing purposes.

Signed-off-by: Stefan Reinauer <reinauer@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-30 13:44:05 -08:00
Simon Glass
a78d49473c x86: Define CONFIG_SYS_VSNPRINTF for coreboot
This option protects the printf() functions from overflow.

Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-30 13:44:05 -08:00
Stefan Reinauer
5b1be1bd01 x86: Fix typo in pcat_timer.c
Fix a small comment typo.

Signed-off-by: Stefan Reinauer <reinauer@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-30 13:44:05 -08:00
Gabe Black
687c108b10 x86: Include types.h explicitly in the i386 version of io.h
The i386 version of io.h depends on the phys_addr_t type which is defined in
types.h. It wasn't including that explicitly, and was working presumably
because the other files including it had already included types.h themselves
directly or indirectly. This change fixes that.

Signed-off-by: Gabe Black <gabeblack@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-30 13:44:05 -08:00
Gabe Black
452b80ef8c x86: Add a dummy implementation for timer_get_us
The microsecond timer is not currently implemented, but add a dummy
implementation for now.

Signed-off-by: Gabe Black <gabeblack@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-30 13:44:05 -08:00
Gabe Black
f30fc4de41 x86: Add a default implementation for cleanup_before_linux()
This function provides an opportunity for some last minute cleanup and
reconfiguration before control is handed over to Linux. It's possible this
may need to do something in the future, but for now it's left empty. It's set
up as a weak symbol so it can be overridden if necessary on a case by case
basis.

Signed-off-by: Gabe Black <gabeblack@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-30 13:44:04 -08:00
Gabe Black
9ad4736e32 x86: Add a minimal device tree for alex x86
The device tree now includes the necessary console configuration
information.

Signed-off-by: Gabe Black <gabeblack@chromium.org>
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>

Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-30 13:44:04 -08:00
Gabe Black
028a56289a x86: Add an fdt pointer to the global data structure
This change adds a pointer to the global data structure in x86 to point to
the device tree. This mirrors an identical pointer in ARM.

Signed-off-by: Gabe Black <gabeblack@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-30 13:44:04 -08:00
Stefan Reinauer
17c40ad963 x86: video: Add coreboot framebuffer support
Add a basic driver for the coreboot framebuffer.

Signed-off-by: Stefan Reinauer <reinauer@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-30 13:44:04 -08:00
Simon Glass
893db5956e x86: Remove coreboot start16 code
This file is no longer needed for coreboot.

Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-30 13:44:04 -08:00
Gabe Black
5b5ece9ef4 x86: Allow compiling out realmode/bios code
We don't want this for coreboot, so provide a way of compiling it out.

Signed-off-by: Gabe Black <gabeblack@chromium.org>
Signed-off-by: Stefan Reinauer <reinauer@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-30 13:44:04 -08:00
Simon Glass
420a2ca73f x86: Select stdio devices for coreboot
We want to support VGA, serial, USB keyboard and the Coreboot memory
console buffer.

Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-30 13:44:03 -08:00
Vadim Bendebury
b012bc94ac x86: Add console command to display CBMEM console buffer
This command is useful to allow to observe messages generated by
coreboot and u-boot until present. In particular it is handy when
u-boot is instrumented to fall through into console mode on startup
errors.

Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-30 13:44:03 -08:00
Vadim Bendebury
98ab435f73 x86: Add CBMEM console driver for coreboot
This patch builds upon the recently introduced CBMEM console
feature of coreboot.

CBMEM console uses a memry area allocated by coreboot to store
the console output. The memory area has a certain structure,
which allows to determine where the buffer is, the buffer size
and the location of the pointer in the buffer. This allows
different phases of the firmware (rom based coreboot, ram based
coreboot, u-boot after relocation with this change) to keep
adding text to the same buffer.

Note that this patch introduces a new console driver and adds the
driver to the list of drivers to be used for console output, i.e.
it engages only after u-boot relocates. Usiong CBMEM console for
capturing the pre-relocation console output will be done under a
separate change.

>From Linux, run the cbmem.py utility (which is a part of the coreboot
package) to see the output, e.g.:

vvvvvvvvvvvvvvvvv
SCSI:  AHCI 0001.0300 32 slots 6 ports ? Gbps 0xf impl SATA mode
flags: 64bit ilck stag led pmp pio
...
Magic signature found
Kernel command line: "cros_secure  quiet loglevel=1 console=tty2...
^^^^^^^^^^^^^^^^^

Note that the entire u-boot output fits into the buffer only if
the coreboot log level is reduced from the most verbose. Ether
the buffer size will have to be increased, or the coreboot
verbosity permanently reduced.

Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-30 13:44:03 -08:00
Simon Glass
402ed0048a x86: coreboot: Decode additional coreboot sysinfo tags
Add support for decoding tags for GPIOs, compile/build info, cbmem and
other features.

Signed-off-by: Stefan Reinauer <reinauer@chromium.org>
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Signed-off-by: Gabe Black <gabeblack@chromium.org>

Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-30 13:44:03 -08:00
Stefan Reinauer
93c1735f41 x86: coreboot: Drop sysinfo.c
sysinfo.c only contains the lib_sysinfo data structure which
is used/filled by tables.c. This split was introduced by importing
code from libpayload originally, but to keep the code simple, add
the single line of actual code to tables.c

Signed-off-by: Stefan Reinauer <reinauer@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-30 13:44:03 -08:00
Tom Rini
b04eb342af Merge branch 'master' of git://git.denx.de/u-boot-sh 2012-11-30 07:15:27 -07:00
Nobuhiro Iwamatsu
f3269ad4e8 include/linux/byteorder: Always defines __fswab64, __swab64p and __swab64s
When __BYTEORDER_HAS_U64__ is not defined, we got warning following:

-----
/tmp/include/linux/byteorder/little_endian.h: In function ‘__cpu_to_be64p’:
/tmp/include/linux/byteorder/little_endian.h:71:2: warning: implicit declaration of function ‘__swab64p’
		[-Wimplicit-function-declaration]
-----

Usually, __arch__swab64* required for __fswab64,  __swab64p and __swab64s
is defined.  Therefore, __BYTEORDER_HAS_U64__ is unnecessary.
This removes __BYTEORDER_HAS_U64__.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
CC: Kim Phillips <kim.phillips@freescale.com>
Reviewed-by: Kim Phillips <kim.phillips@freescale.com>
2012-11-30 07:15:04 -07:00
Tetsuyuki Kobayashi
7c791b3f0a serial: serial_sh: bugfix: autoboot fails if serial console is not connected
On kzm9g board (rmobile SoC), autoboot fails if serial console cable is not
connected.  When serial cable is not connected, serial error occurs and
some garbage comes in data register.
sh_serial_tstc() in serial_sh.c does not check error status and misunderstand
there is some input data.  It is the reason that autoboot fails.
This patch adds checking error status in sh_serial_tstc().

This patch is based on v2013.01-rc1 tag of u-boot master git.

Signed-off-by: Tetsuyuki Kobayashi <koba@kmckk.co.jp>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2012-11-30 15:06:05 +09:00
Yoshihiro Shimoda
867da0d4fe sh: fix trigger_address_error()
The function should set BL bit, but it should not clear other flags.
So, the patch uses set_bl_bit() instead of a local asm code.

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2012-11-30 15:06:04 +09:00
Tom Rini
b8715d8def Merge branch 'master' of git://git.denx.de/u-boot-fdt 2012-11-29 06:41:56 -07:00
Simon Glass
f39612d360 fdt: Correct global_data condition in main
We need an extra condition here in case we want to use fdt without the
silent console/cmdline editing/post options. It is easier to just remove
the #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-28 19:26:49 -05:00
Tom Rini
e57d9d15ee Merge branch 'master' of git://www.denx.de/git/u-boot-x86 2012-11-28 13:44:40 -07:00
Simon Glass
d02a568e9a x86: coreboot: Enable LPC TPM
Coreboot boards have an LPC TPM connected, so enable this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-28 11:40:05 -08:00
Simon Glass
cd23e6923f x86: Remove coreboot start16 code
Now that coreboot doesn't need the start16 code, remove it. We need
to remove the CONFIG_SYS_X86_RESET_VECTOR option from coreboot.h also.

Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-28 11:40:05 -08:00
Gabe Black
82e73f0e3d x86: coreboot: Implement recursively scanning PCI busses
A hook is installed to configure PCI bus bridges as they encountered by u-boot.
The hook extracts the secondary bus number from the bridge's config space and
then recursively scans that bus.

On Coreboot, the PCI bus address space has identity mapping with the
physical address space, so declare it as such to ensure that the "pci_map_bar"
function used by some PCI drivers is behaving properly. This fixes the
EHCI PCI driver initialization on Stumpy.

This was tested as follows:

Ran the PCI command on Alex, saw devices on bus 0, the OXPCIe 952 on
bus 1, and empty busses 2 through 5. This matches the bridges
reported on bus 0 and the PCI configuration output from coreboot.

Signed-off-by: Gabe Black <gabeblack@chromium.org>
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
Signed-off-by: Stefan Reinauer <reinauer@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-28 11:40:05 -08:00
Vadim Bendebury
422322f288 x86: coreboot: Modify u-boot code to allow building coreboot payload
This prevents the preprocessor from complaining when processing
variadic macros

Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Graeme Russ <graeme.russ@gmail.com>
2012-11-28 11:40:04 -08:00
Gabe Black
452f50f7cf x86: coreboot: Tell u-boot about PCI bus 0 when initializing
U-boot needs a host controller or "hose" to interact with the PCI busses
behind them. This change installs a host controller during initialization of
the coreboot "board" which implements some of X86's basic PCI semantics. This
relies on some existing generic code, but also duplicates a little bit of code
from the sc520 implementation. Ideally we'd eliminate that duplication at some
point.

It looks like in order to scan buses beyond bus 0, we'll need to tell u-boot's
generic PCI configuration code what to do if it encounters a bridge,
specifically to scan the bus on the other side of it.

Signed-off-by: Gabe Black <gabeblack@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Graeme Russ <graeme.russ@gmail.com>
2012-11-28 11:40:04 -08:00
Stefan Reinauer
badcb343d7 x86: coreboot: Move non-board specific files to coreboot arch directory
coreboot.c and coreboot_pci.c don't contain board specific but only
coreboot specific code. Hence move it to the coreboot directory in
arch/x86/cpu (which should probably be moved out of cpu/ in another
commit)

Signed-off-by: Stefan Reinauer <reinauer@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-28 11:40:04 -08:00
Gabe Black
c953fbee54 x86: Add some missing includes
I suspect these includes were usually available because something else
included them earlier or because they were brought in transitively.

Change-Id: I6aae2ac94dc792eac6febb4345e8125f69f70988
Signed-off-by: Gabe Black <gabeblack@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-28 11:40:04 -08:00
Gabe Black
b16f521a5e x86: Allow excluding reset vector code from u-boot
When running from coreboot we don't want this code.

This version works by ifdef-ing out all of the code that would go
into those sections and all the code that refers to it. The sections are
then empty, and the linker will either leave them empty for the loader
to ignore or remove them entirely.

Signed-off-by: Gabe Black <gabeblack@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-28 11:40:03 -08:00
Simon Glass
8a487a4417 x86: Add initial memory barrier macros
These are available on other architectures, so add them on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-28 11:40:03 -08:00
Graeme Russ
8abebe3ead x86: Add ilog2 to bitops
ilog2 is required by AHCI driver

Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-28 11:40:03 -08:00
Graeme Russ
c73c6de60c x86: Remove duplicate PCI init
Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-28 11:40:03 -08:00
Graeme Russ
8d61625d6a x86: Put global data on the stack
Putting global data on the stack simplifies the init process (and makes it
slightly quicker). During the 'flash' stage of the init sequence, global
data is in the CAR stack. After SDRAM is initialised, global data is copied
from CAR to the SDRAM stack

Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-28 11:40:03 -08:00
Graeme Russ
e4fb611649 x86: Forward declare gd_t
So it can be used as a type in struct global_data and remove an ugly typecast

Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Marek Vasut <marex@denx.de>
2012-11-28 11:40:03 -08:00
Tom Rini
a86fcff695 Merge branch 'master' of git://www.denx.de/git/u-boot-mpc85xx 2012-11-28 08:30:21 -07:00
Tom Rini
d41b3cc16f Merge branch 'master' of git://git.denx.de/u-boot-mips 2012-11-27 20:34:51 -07:00
York Sun
afbfdf5450 powerpc/mpc85xx: Fix a bug introduced by CONFIG_PPC_SPINTABLE_COMPATIBLE
Fix a bug introduced by this patch
powerpc/mpc85xx: Temporary fix for spin table backward compatibility

Should have checked both CONFIG_PPC_SPINTABLE_COMPATIBLE and CONFIG_MP in
cpu_init.c.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-11-27 18:28:08 -06:00
Timur Tabi
b25f6de7c0 powerpc/85xx: update the work-around for P4080 erratum SERDES-9
The documented work-around for P4080 erratum SERDES-9 has been updated.
It is now compatible with the work-around for erratum A-4580.

This requires adding a few bitfield macros for the BnTTLCRy0 register.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-11-27 18:28:07 -06:00
Yuanquan Chen
c0a4e6b889 powerpc/p4080ds: fix PCI-e x8 link training down failure
Due to SerDes configuration error, if we set the PCI-e controller link width
as x8 in RCW and add a narrower width(such as x4, x2 or x1) PCI-e device to
PCI-e slot, it fails to train down to the PCI-e device's link width. According
to p4080ds errata PCIe-A003, we reset the PCI-e controller link width to x4 in
u-boot. Then it can train down to x2 or x1 width to make the PCI-e link between
RC and EP.

Signed-off-by: Yuanquan Chen <B41889@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-11-27 18:28:07 -06:00
Zang Roy-R61911
9760b274df powerpc/corenet_ds: move SATA config to board configuration
board configuration file is included before asm/config_mpc85xx.h.
however, CONFIG_FSL_SATA_V2 is defined in asm/config_mpc85xx.h.
it will never take effective in the board configuration file for
this kind of code :

 #ifdef CONFIG_FSL_SATA_V2
 ...
 #endif

To solve this problem, move CONFIG_FSL_SATA_V2 to board
configuration header file.

This patch reverts Timur's
commit:3e0529f742e893653848494ffb9f7cd0d91304bf

Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-11-27 18:28:07 -06:00
Timur Tabi
d607b9684b powerpc/85xx: implement check for erratum A-004580 work-around
The work-around for erratum A-004580 ("Internal tracking loop can falsely
lock causing unrecoverable bit errors") is implemented via the PBI
(pre-boot initialization code, typically attached to the RCW binary).
This is because the work-around is easier to implement in PBI than in
U-Boot itself.

It is still useful, however, for the 'errata' command to tell us whether
the work-around has been applied.  For A-004580, we can do this by verifying
that the values in the specific registers that the work-around says to
update.

This change requires access to the SerDes lane sub-structure in
serdes_corenet_t, so we make it a named struct.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-11-27 18:28:07 -06:00
Kim Phillips
345d6efdc7 powerpc/mpc8xxx: take fdt_fixup_crypto_node() off the checkstack list
by moving compat_strlist into the .bss section.

0xfe004d80 fdt_fixup_crypto_node [u-boot]:		264

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-11-27 18:28:07 -06:00
York Sun
2a5fcb835f powerpc/mpc85xx: Temporary fix for spin table backward compatibility
Once u-boot sets the spin table to cache-enabled memory, old kernel which
uses cache-inhibit mapping without coherence will not work properly. We
use this temporary fix until kernel has updated its spin table code.
For now this fix is activated by default. To disable this fix for new
kernel, set environmental variable "spin_table_compat=no". After kernel
has updated spin table code, this default shall be changed.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-11-27 18:28:06 -06:00
York Sun
ca1b0b8956 powerpc/P2041RDB: Fix Flash address LAW address
P2041RDB uses common corenet TLB and LAW. However it doesn't have promjet
connector. It is necessary to use the same base address for correct LAW
address. An offset is added for NOR flash.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-11-27 18:28:06 -06:00
York Sun
765ad3cf4d powerpc/corenet_ds: Update DDR timing for single-rank DIMMs
Single rank UDIMM timing has been verified with HMT325U7BFR8C-H9 for speed
800, 900, 1000, 1200, 1300MT/s.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-11-27 18:28:06 -06:00
Timur Tabi
0118033b67 powerpc/85xx: implement check for erratum A-004849 work-around
The work-around for erratum A-004849 ("CoreNet fabric (CCF) can exhibit a
deadlock under certain traffic patterns causing the system to hang") is
implemented via the PBI (pre-boot initialization code, typically attached
to the RCW binary).  This is because the work-around is easier to implement
in PBI than in U-Boot itself.

It is still useful, however, for the 'errata' command to tell us whether
the work-around has been applied.  For A-004849, we can do this by verifying
that the values in the specific registers that the work-around says to
update.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-11-27 18:28:06 -06:00
Timur Tabi
d31e53b42c powerpc/85xx: add support for the Freescale P5040DS Superhydra reference board
The P5040DS reference board (a.k.a "Superhydra") is an enhanced version of
P3041DS/P5020DS ("Hydra") reference board.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-11-27 18:28:06 -06:00
Timur Tabi
1956e431f8 powerpc/85xx/p5040: add CONFIG_SYS_PPC64, del CONFIG_SYS_FSL_ELBC_MULTIBIT_ECC
The P5040 has an e5500 core, so CONFIG_SYS_PPC64 should be defined in
config_mpc85xx.h.  This macro was absent in the initial P5040 patch because
it crossed paths with the patch that introduced the macro.

Also delete CONFIG_SYS_FSL_ELBC_MULTIBIT_ECC, since it's not used in the
upstream U-Boot.  It's a holdover from the SDK.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-11-27 18:28:05 -06:00
York Sun
021382cad2 powerpc/qoriq: Move FMAN microcode location
Move FMAN microcude from 0xEF000000 to 0xEFF40000 to free up the beginning
of this virtual bank so that this bank can store RCW or be used together
with other banks to store large images.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-11-27 18:25:55 -06:00
Andy Fleming
7798f6dbd5 mmc: Properly determine maximum supported bus width
At some point, a confusion arose about the use of the bit
definitions in host_caps for bus widths, and the value
in ext_csd. By coincidence, a simple shift could convert
between one and the other:

MMC_MODE_1BIT = 0, EXT_CSD_BUS_WIDTH_1 = 0
MMC_MODE_4BIT = 0x100, EXT_CSD_BUS_WIDTH_4 = 1
MMC_MODE_8BIT = 0x200, EXT_CSD_BUS_WIDTH_8 = 2

However, as host_caps is a bitmask of supported things,
there is not, in fact, a one-to-one correspondence. host_caps
is capable of containing MODE_4BIT | MODE_8BIT, so nonsensical
things were happening where we would try to set the bus width
to 12.

The new code clarifies the very different namespaces:

host_caps/card_caps = bitmask (MMC_MODE_*)
ext CSD fields are just an index (EXT_CSD_BUS_WIDTH_*)
mmc->bus_width integer number of bits (1, 4, 8)

We create arrays to map between the namespaces, like in Linux.

Signed-off-by: Andy Fleming <afleming@freescale.com>
Tested-by: Jaehoon Chung <jh80.chung@samsung.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
2012-11-27 17:48:46 -06:00
Andy Fleming
e76cd5d4cf 8xxx: Change all 8*xx_DDR addresses to 8xxx
There were a number of shared files that were using
CONFIG_SYS_MPC85xx_DDR_ADDR, or CONFIG_SYS_MPC86xx_DDR_ADDR, and
several variants (DDR2, DDR3). A recent patchset added
85xx-specific ones to code which was used by 86xx systems.
After reviewing places where these constants were used, and
noting that the type definitions of the pointers assigned to
point to those addresses were the same, the cleanest approach
to fixing this problem was to unify the namespace for the
85xx, 83xx, and 86xx DDR address definitions.

This patch does:

s/CONFIG_SYS_MPC8.xx_DDR/CONFIG_SYS_MPC8xxx_DDR/g

All 85xx, 86xx, and 83xx have been built with this change.

Signed-off-by: Andy Fleming <afleming@freescale.com>
Tested-by: Andy Fleming <afleming@freescale.com>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
2012-11-27 17:45:17 -06:00
Taylor Hutt
ed80c931ba mmc: Fix incorrect handling of 'read' & 'write' commands
If a malformed 'read' or 'write' command is issued, the Sandbox U-Boot
can crash because the command-handling code does no error checking on
the number of provided arguments.

This change makes the mmc 'erase', 'read' and 'write' commands only
function if the proper number of arguments are supplied.

Also puts the else assignment at the beginning fo the if() statement
to shortens the generated code.  This removes an unnecessary jump from
the generated code.

Signed-off-by: Taylor Hutt <thutt@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-11-27 17:26:49 -06:00
Stephen Warren
1981539914 mmc: tegra: use bounce buffer APIs
Tegra's MMC driver does DMA, and hence needs cache-aligned buffers. In
some cases (e.g. user load commands) this cannot be guaranteed by callers
of the MMC APIs. To solve this, modify the Tegra MMC driver to use the
new bounce_buffer_*() APIs.

Note: Ideally, all U-Boot code will always provide address- and size-
aligned buffers, so a bounce buffer will only ever be needed for user-
supplied buffers (e.g. load commands). Ensuring this removes the need
for performance-sucking bounce buffer cache management and memcpy()s.
The one known exception at present is the SCR buffer in sd_change_freq(),
which is only 8 bytes long. Solving this requires enhancing struct
mmc_data to know the difference between buffer size and transferred data
size, or forcing all callers of mmc_send_cmd() to have allocated buffers
using ALLOC_CACHE_ALIGN_BUFFER(), which while true in this case, is not
enforced in any way at present, and so cannot be assumed by the core MMC
code.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-11-27 17:26:49 -06:00
Stephen Warren
84d35b2863 common: rework bouncebuf implementation
The current bouncebuf API requires all parameters to be passed to both
bounce_buffer_start() and bounce_buffer_stop(). Modify the bouncebuf
start function to accept a state structure as a parameter, and only
require that state struct to be passed to the stop function. This
simplifies usage of the bounce buffer by clients.

Don't modify the data pointer, but rather store the temporary buffer in
this state struct. The bouncebuf code ensures that client code can
always use a single buffer pointer in the state structure, irrespective
of whether a bounce buffer actually had to be allocated.

Move cache management logic into the bounce buffer code, so that each
client doesn't have to duplicate this. I believe there's no need to
invalidate the buffer before a DMA operation, since flushing the cache
should prevent any write-backs.

Update the MXS MMC driver for this change.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-11-27 17:26:48 -06:00
Stephen Warren
4ea7a09faf bouncebuf: remove dummy implementation
If any driver ever needs to use the bounce buffer API, it always needs
to use it. As such, providing a dummy implementation of those APIs when
CONFIG_BOUNCE_BUFFER isn't defined does not make sense. Remove the dummy
implementation.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-11-27 17:26:48 -06:00
Stephen Warren
640fb60784 Replace CONFIG_MMC_BOUNCE_BUFFER with CONFIG_BOUNCE_BUFFER in configs
Commits 6dc71c8 "MMC: MXS: Toggle the generic bounce buffer on the
boards" and 49a627f "MMC: Remove the MMC bounce buffer" replaced
CONFIG_MMC_BOUNCE_BUFFER with CONFIG_BOUNCE_BUFFER, but missed
converting a few boards over to the new option. Fix this.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-11-27 17:26:48 -06:00
Mela Custodio
688c2d140b mmc: add no simultaenous power and vdd
Bring in the code from Linux kernel.

Added to Linux kernel by:
commit e08c1694d9e2138204f2b79b73f0f159074ce2f5
Author: Andres Salomon <dilinger@queued.net>
Date:   Fri Jul 4 10:00:03 2008 -0700

Some HW balks when writing both voltage setting and power up at the same
time to SDHCI_POWER_CONTROL register.

Signed-off-by: Rommel G Custodio <sessyargc@gmail.com>
CC: Andy Fleming <afleming@freescale.com>

v2: fix attribution and SOB
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-11-27 17:26:48 -06:00
Wu, Josh
b7e3129e55 mmc: at91sam9x5: support to save environment in mmc
Signed-off-by: Josh Wu <josh.wu@atmel.com>
Acked-by: Andreas Bießmann <andreas.devel@googlemail.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-11-27 17:26:47 -06:00
Taylor Hutt
babce5f64e mmc: Fix interpretation of MMC_CMD_ALL_SEND_CID
The interpretation of the data returned by the MMC_CMD_ALL_SEND_CID
command was incorrect with respect to the JEDEC Standard No. 84-A441.

This change makes the interpretation correct with respect to the
defined fields of the CID register.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Taylor Hutt <thutt@chromium.org>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-11-27 17:26:47 -06:00
Jaehoon Chung
d0ebbb8dfa EXYNOS: mmc: support DesignWare Controller for Samsung-SoC
Support DesignWare MMC Controller for Samsung Specific.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Rajeshawari Shinde <rajeshwari.s@samsung.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-11-27 17:26:47 -06:00
Pantelis Antoniou
66dc452bfe Remove obsolete header file
usbdescriptors.h conflicts with linux/usb/ch9.h
Remove it.

Signed-off-by: Pantelis Antoniou <panto@antoniou-consulting.com>
2012-11-27 09:41:10 -07:00
Tom Rini
dfe161032d Merge branch 'master' of git://git.denx.de/u-boot-nand-flash 2012-11-26 14:53:33 -07:00
Benoît Thébaudeau
3287f6d385 nand: Add torture feature
This patch adds a NAND Flash torture feature, which is useful as a block stress
test to determine if a block is still good and reliable (or should be marked as
bad), e.g. after a write error.

This code is ported from mtd-utils' lib/libmtd.c.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Scott Wood <scottwood@freescale.com>
[scottwood@freescale.com: removed unnec. ifdef and unwrapped error strings]
Signed-off-by: Scott Wood <scottwood@freescale.com>
2012-11-26 15:41:29 -06:00
Benoît Thébaudeau
8156f732ee nand: Fix nand_erase_opts() offset check
NAND Flash is erased by blocks, not by pages.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Scott Wood <scottwood@freescale.com>
2012-11-26 15:41:28 -06:00
Benoît Thébaudeau
bd74280d62 nand: Clean up nand_util
This patch cleans up nand_util.c:
 - Fix tabs.
 - Fix typos.
 - Remove space character before opening parenthesis in function calls.
 - Fix comments.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Scott Wood <scottwood@freescale.com>
2012-11-26 15:41:28 -06:00
Joe Hershberger
c788ecfdc3 nand: Move the sub-page read support enable to a flag
Use a flag instead of a hard-coded macro so that sub-page reads can be
enabled in other cases (such as on-die ecc).

This is the same as a5ff4f102937a3492bca4a9ff0c341d78813414c in Linux

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
2012-11-26 15:41:28 -06:00
Prabhakar Kushwaha
79da5e3d5d driver/mtd:IFC NAND:Initialise internal SRAM before any write
IFC-1.1.0 uses 28nm techenology for SRAM. This tech has known limitaion for
SRAM i.e. "byte select" is not supported. Hence Read Modify Write is
implemented in IFC for any "system side write" into sram buffer. Reading an
uninitialized memory results in ECC Error from sram wrapper.

Hence we must initialize/prefill SRAM buffer by any data before writing
anything in SRAM from system side. To initialize SRAM user can use "READID"
NAND command with read bytes equal to SRAM size. It will be a one time
activity post boot

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
[scottwood@freescale.com: fix fsl_ifc_sram_init prototype]
Signed-off-by: Scott Wood <scottwood@freescale.com>
2012-11-26 15:41:28 -06:00
Karl O. Pinc
10635afa53 README: Reference nand monitor commands in U-Boot README
Reference nand monitor commands in U-Boot README

Signed-off-by: Karl O. Pinc <kop@meme.com>
2012-11-26 15:41:27 -06:00
Scott Wood
cb04c77234 nand/fsl: add NAND_NO_SUBPAGE_WRITE to eLBC and IFC drivers
These controllers can only do hardware ECC on full page transfers.

Signed-off-by: Scott Wood <scottwood@freescale.com>
2012-11-26 15:41:27 -06:00
Scott Wood
13d1143ffb powerpc/mpc85xx/p2020rdb-pca: Use L2 SRAM for SPL boot
This allows DDR configuration to be deferred to the final U-Boot image,
which is able to make use of SPD data.  The SPL itself cannot use SPD due
to code size constraints.  It previously used fixed register values for
DDR configuration, and those values did not work on the p2020rdb-pca
board I tested with.  It's possible that different revisions of the board
require different settings.  Using SPD eliminates that problem.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Cc: Andy Fleming <afleming@freescale.com>
2012-11-26 15:41:27 -06:00
Scott Wood
d674bccf73 powerpc/mpc85xx/p1_p2_rdb_pc: clean up memory map
- Sort by address, and fix column alignment

- Don't label things as localbus that aren't.  Instead, put chipselect
  info at the end of the description for localbus windows.  Note that
  NAND/NOR have their chipselects swapped when booting from NAND, and CS2
  can be either PMC or VSC7385 depending on hwconfig.

- Shrink NAND to the 32K that's actually mapped in the localbus

- Assign an address and size to L2 SRAM.  Remove the similarly named
  but unintelligible "L2 SDRAM(REV.)".

- Remove the untrue comment about L1 stack being mapped with TLB0.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Cc: Andy Fleming <afleming@freescale.com>
2012-11-26 15:41:26 -06:00
Scott Wood
a796e72c78 powerpc/mpc85xx/p1_p2_rdb_pc: convert from nand_spl to new spl
Signed-off-by: Scott Wood <scottwood@freescale.com>
Cc: Andy Fleming <afleming@freescale.com>
2012-11-26 15:41:26 -06:00
Scott Wood
7d4b79552d spl/nand: config symbol documentation
Document parameters used for specifying the NAND image to be loaded.

Also fix the definition of CONFIG_SPL_NAND_SIMPLE -- it's only
nand_spl_simple.c, not the entire nand directory.  The word "simple" is
there for a reason.  :-)

Signed-off-by: Scott Wood <scottwood@freescale.com>
---
v2: updated for makefile changes earlier in patchset
2012-11-26 15:41:26 -06:00
Scott Wood
6f2f01b9f3 spl/nand: introduce CONFIG_SPL_NAND_DRIVERS, _BASE, and _ECC.
Some small SPLs do not use nand_base.c, and a subset of those also
require a special driver.  Some SPLs need software ECC but others can't
fit it.

All existing boards that specify CONFIG_SPL_NAND_SUPPORT have these
symbols added to preserve existing behavior.

Signed-off-by: Scott Wood <scottwood@freescale.com>
--
v2: use positive logic for including bits of NAND, rather than
a MINIMAL symbol that excludes things.
2012-11-26 15:41:25 -06:00
Scott Wood
94a45bb197 powerpc/mpc85xx/p1_p2_rdb_pc: new SPL support
Introduces CONFIG_SPL_RELOC_TEXT_BASE and CONFIG_SPL_RELOC_STACK.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Cc: Andy Fleming <afleming@freescale.com>
2012-11-26 15:41:25 -06:00
Scott Wood
c97cd1ba48 spl/85xx: new SPL support
Update CONFIG_RAMBOOT and CONFIG_NAND_SPL references to accept CONFIG_SPL
and CONFIG_SPL_BUILD, respectively.  CONFIG_NAND_SPL can be removed once
the last mpc85xx nand_spl target is gone.

CONFIG_RAMBOOT will need to remain for other use cases, but it doesn't
seem right to overload it for meaning SPL as well as nand_spl does.  Even
if it's somewhat appropriate for the main u-boot, the SPL itself isn't
(necessarily) ramboot, and we don't have separate configs for SPL and
main u-boot.  It was also inconsistent, as other platforms such as
mpc83xx didn't use CONFIG_RAMBOOT in this way.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Cc: Andy Fleming <afleming@freescale.com>
2012-11-26 15:41:25 -06:00
Scott Wood
4b919725b6 spl/powerpc: introduce CONFIG_SPL_INIT_MINIMAL
cpu_init_nand.c is renamed to spl_minimal.c as it is not really NAND-specific.

Signed-off-by: Scott Wood <scottwood@freescale.com>
---
v2: factor out START, and change cpu_init_nand.c to spl_minimal.c
Cc: Andy Fleming <afleming@freescale.com>
2012-11-26 15:41:24 -06:00
Scott Wood
a179eb0a4b powerpc/mpc85xx: consistently use COBJS-y
A subsequent patch will conditionalize some of the files that are
currently unconditional.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Cc: Andy Fleming <afleming@freescale.com>
2012-11-26 15:41:24 -06:00
Scott Wood
b9735cbaeb spl/mpc85xx: rename cpu_init_nand.c to spl_minimal.c
There is nothing really NAND-specific about this file.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Cc: Andy Fleming <afleming@freescale.com>
2012-11-26 15:41:24 -06:00
Scott Wood
510ed3b8fd spl: include resetvec and lib8xxx
The toplevel makefile hardcodes this stuff, so spl/Makefile needs to as well.

Signed-off-by: Scott Wood <scottwood@freescale.com>
2012-11-26 15:41:23 -06:00
Scott Wood
59629c2897 spl/mpc85xx: move udelay to cpu code
It applies to non-Freescale 85xx boards as well as Freescale boards,
so it doesn't belong in board/freescale.  Plus, it needs to come out
of nand_spl if it's to be used by the new SPL.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Cc: Andy Fleming <afleming@freescale.com>
2012-11-26 15:41:23 -06:00
Scott Wood
8bc50f0b6d powerpc/mpc8xxx: move LAW code into arch/powerpc/cpu/mpc8xxx
It's arch code and not a driver, so move it where it belongs.  When it
originally went into drivers/misc there was no 8xxx CPU directory.

This will make new-SPL support a little easier since we can keep the CPU
stuff together and not need to pull stuff in from drivers/misc.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Cc: Andy Fleming <afleming@freescale.com>
2012-11-26 15:41:22 -06:00
Scott Wood
7f0a22ff25 powerpc/mpc85xx: fix TLB alignment
In the RAMBOOT/SPL case we were creating a TLB entry starting at
CONFIG_SYS_MONITOR_BASE, and just hoping that the base was properly
aligned for the TLB entry size.  This turned out to not be the case
with NAND SPL because the main U-Boot starts at an offset into the image
in order to skip the SPL itself.

Fix the TLB entry to always start at a proper alignment.  We still assume that
CONFIG_SYS_MONITOR_BASE doesn't start immediately before a large-page boundary
thus requiring multiple TLB entries.

Signed-off-by: Scott Wood <scottwood@frescale.com>
Cc: Andy Fleming <afleming@freescale.com>
2012-11-26 15:41:22 -06:00
Scott Wood
6ec63f411e powerpc: change .fixup test to a GCC version test
This was introduced by commit 2446151974, but it
fails in a minimal SPL build where the only thing in arch/powerpc/lib is
cache.c, which apparently doesn't generate any fixup records.

The problem is reported to occur with GCC 3.x, so insist on GCC 4.0 or newer.
Patterned after checkthumb as suggested by Tom Rini.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Cc: Peter Tyser <ptyser@xes-inc.com>
Cc: Tom Rini <trini@ti.com>
--
v2: test gcc version instead of testing nothing
2012-11-26 15:41:22 -06:00
Scott Wood
ca2fca2235 spl: introduce CONFIG_SPL_TARGET
Currently the SPL target is specified in a CPU-specific makefile
fragment.  While some targets may need something more complicated than a
simple target name, targets which don't need this shouldn't have to provide a makefile fragment just for this.

Signed-off-by: Scott Wood <scottwood@freescale.com>
---
v2: Removed default target as it's been pointed out to me how existing platforms
cause the SPL to be built.
2012-11-26 15:41:21 -06:00
Scott Wood
5364add4ef spl: rename u-boot-pad.bin to u-boot-with-spl.bin
Signed-off-by: Scott Wood <scottwood@freescale.com>
2012-11-26 15:41:21 -06:00
José Miguel Gonçalves
277f00f5b5 Add u-boot-pad.bin target to the Makefile
Samsung's S3C24XX SoCs need this in order to generate a binary image
with a padded SPL concatenated with U-Boot.

Signed-off-by: José Miguel Gonçalves <jose.goncalves@inov.pt>
[scottwood@freescale.com: fixed prereq of u-boot.ubl]
Signed-off-by: Scott Wood <scottwood@freescale.com>
--
v2: Removed spl/ prefix from u-boot.ubl prerequisite.
2012-11-26 15:41:21 -06:00
Scott Wood
9a511bd6a3 powerpc/mpc85xx: add comma before "already enabled"
Now outputs like this:

L2:    512 KB already enabled, moving to 0xf8f80000

rather than this:

L2:    512 KB already enabledmoving to 0xf8f80000

Signed-off-by: Scott Wood <scottwood@freescale.com>
Cc: Andy Fleming <afleming@gmail.com>
2012-11-26 15:41:20 -06:00
Scott Wood
f545d300b0 powerpc/mpc85xx: move debug tlb entry after TLB is in known state
Previously, in many if not all configs we were creating overlapping TLB entries
which is illegal.  This caused a crash during boot when moving p2020rdb NAND SPL
into L2 SRAM.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Cc: Prabhakar Kushwaha <prabhakar@freescale.com>
Cc: Andy Fleming <afleming@freescale.com>
--
Prabhakar, please test that debug still works.
2012-11-26 15:41:20 -06:00
Scott Wood
cb55b33200 serial/ns16550: wait for TEMT before initializing
TEMT is set when the transmitter is totally empty and all output has
finished.

This prevents output problems (including a loss of synchronization
observed on p2020 that persisted for quite a while) if SPL has output
still on its way out.

Signed-off-by: Scott Wood <scottwood@freescale.com>
--
v2: fixed typo in subject, and explained what the bit does in the changelog
2012-11-26 15:41:20 -06:00
Scott Wood
48cbc3a876 serial/ns16550: don't build serial_ns16550 with MIN_FUNCTIONS
CONFIG_NS16550_MIN_FUNCTIONS is used by small SPLs to gain access to basic
ns16550 output code without pulling in things not needed by the SPL.

This previously only worked with non-MULTI configs.  Recently MULTI was
made mandatory, and MIN_FUNCTIONS fails like this:

drivers/serial/libserial.o: In function `calc_divisor.clone.0':
serial_ns16550.c:(.text.calc_divisor.clone.0+0x24): undefined reference to `get_bus_freq'
drivers/serial/libserial.o: In function `_serial_getc':
(.text._serial_getc+0x30): undefined reference to `NS16550_getc'
drivers/serial/libserial.o: In function `_serial_tstc':
(.text._serial_tstc+0x30): undefined reference to `NS16550_tstc'
drivers/serial/libserial.o: In function `_serial_setbrg':
(.text._serial_setbrg+0x3c): undefined reference to `NS16550_reinit'
make[1]: *** [/tmp/u-boot/spl/u-boot-spl] Error 1
make: *** [/tmp/u-boot/spl/u-boot-spl.bin] Error 2

With MIN_FUNCTIONS we don't need anything from this file, so don't build
it.  The conditional needs to be in the file itself rather than the
makefile, because the config symbols are only imported to the makefiles
once, not separately for the SPL phase of the build.

Signed-off-by: Scott Wood <scottwood@freescale.com>
2012-11-26 15:41:20 -06:00
Zhi-zhou Zhang
8ab36d2e54 MIPS: do not initialize timestamp variable before relocate_code
Because timestamp is declared as `static', we needn't initialize
it by writing it a zero. If we do it before relocate_code, we
will write into a flash address(0xffffffffbfc0xxxx).

Signed-off-by: Zhi-zhou Zhang <zhizhou.zh@gmail.com>
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2012-11-25 21:50:43 +01:00
Albert ARIBAUD
b8a7c46796 Merge branch 'u-boot-imx/master' into 'u-boot-arm/master' 2012-11-25 13:01:58 +01:00
Marek Vasut
1d4fd0dc3b mx28: Fix typo in POWER_DCLIMITS_NEGLIMIT_OFFSET
The POWER_DCLIMITS_NEGLIMIT_OFFSET bit in mx28 power supply block is
not called POWER_DCLIMITS_NETLIMIT_OFFSET, but POWER_DCLIMITS_NEGLIMIT_OFFSET.
Correct the name in the header file.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
2012-11-24 16:21:37 +01:00
Marek Vasut
90a21030e3 mx28: Fix typo in POWER_MINPWR_VBG_OFF
The POWER_MINPWR_VBG_OFF bit in mx28 power supply block is not called
POWER_MINPWR_FBG_OFF, but POWER_MINPWR_VBG_OFF. Correct the name in the
header file.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
2012-11-24 16:21:10 +01:00
Tom Rini
d6bc7dcc03 Merge branch 'master' of git://git.denx.de/u-boot-fdt 2012-11-20 10:46:30 -07:00
Gerald Van Baren
2a7abdd3d3 Merge branch 'next' 2012-11-19 19:26:35 -05:00
Nobuhiro Iwamatsu
7bae844f2d usb: r8a6659: Fix build by missing of parenthesis
By commit c7e3b2b5, this was chanded to support multiple controllers.
But this has missing of parenthesis. This commit fix it.

-----
r8a66597-hcd.c: In function ‘usb_lowlevel_init’:
r8a66597-hcd.c:911:52: error: expected declaration specifiers before ‘)’
token
r8a66597-hcd.c:935:1: error: expected ‘=’, ‘,’, ‘;’, ‘asm’ or‘__attribute__’ before ‘{’ token
r8a66597-hcd.c:939:1: error: expected ‘{’ at end of input
-----

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
CC: Lucas Stach <dev@lynxeye.de>
2012-11-20 00:16:08 +01:00
Nobuhiro Iwamatsu
9d034208a8 usb: r8a66597: Switched from variable to only macro
Some variables are initialized with a value defined by macro.
This was changed to use the macro directly. And the variable not to
use deleted it.

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2012-11-20 00:16:08 +01:00
Ilya Yanok
c2af345ed5 omap3_beagle: use new MUSB intstead of the old one
Enable using of new MUSB framework on Beagle.

NOTE! This is not just a change of backend code: top-level behavior
is also changed, we now use USB device port for USB Ethernet instead
of serial.

Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
2012-11-20 00:16:08 +01:00
Ilya Yanok
c642b151f3 omap3_beagle: add musb-new init
Add initialization for new MUSB framework.

Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
2012-11-20 00:16:08 +01:00
Ilya Yanok
673a524b6a musb-new: omap2plus backend driver
Backend driver for MUSB OTG controllers found on TI OMAP2/3/4
(tested only on OMAP3 Beagle).

Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
2012-11-20 00:16:08 +01:00
Ilya Yanok
88919ff7bf am3517_evm: switch to musb-new
Use new musb framework instead of the old one on AM3517_EVM.

Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
2012-11-20 00:16:07 +01:00
Ilya Yanok
08fc71711a OMAP3: am35x: add musb functions
AM35XX specific functions for integrated USB PHY/MUSB IP.

Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
2012-11-20 00:16:07 +01:00
Ilya Yanok
272165f6a9 OMAP3: am35x_def.h: add USB defines
Add defines for MUSB IP block on AM35X SoCs.

Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
2012-11-20 00:16:07 +01:00
Ilya Yanok
833a53c627 musb-new: am35x backend driver
Backend driver for MUSB OTG controllers found on TI AM35x.

It seems that on AM35X interrupt status registers can be updated
_before_ core registers. As we don't use true interrupts in U-Boot
and poll interrupt status registers instead this can result in
interrupt handler being called with non-updated core registers.
This confuses the code and result in hanged transfers.
Add a small delay in am35x_interrupt as a workaround.

Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
2012-11-20 00:16:07 +01:00
Ilya Yanok
d2aa1154b9 am335x_evm: enable both musb gadget and host
Enable musb gadget in Ethernet mode on port 0 and
musb host on port1.

Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
2012-11-20 00:16:07 +01:00
Ilya Yanok
7df5cf35de am33xx: init OTG hardware and new musb gadget driver
AM33xx has support for dual port MUSB OTG controller. This patch
adds initialization for the controller using new MUSB gadget
driver and ether gadget.

Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
2012-11-20 00:16:07 +01:00
Ilya Yanok
37931f02c2 musb-new: dsps backend driver
Backend driver for MUSB OTG controllers found on TI AM33xx and
TI81xx SoCs (tested with AM33xx only).

Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
2012-11-20 00:16:06 +01:00
Ilya Yanok
eb81955bf0 musb-new: port of Linux musb driver
Existing U-Boot musb driver has no support for the new gadget framework
and also seems to have other limitations. As gadget framework is ported
from Linux it seems pretty natural to port musb gadget driver as well.

This driver supports both host and peripheral modes.

This is not a replacement for current musb driver (at least now) as
there are still some consumers of the old UDC interface.

No DMA operation support included, CONFIG_MUSB_PIO_ONLY should be
defined.

Virtual root hub device is not implemented.

Known problems: with no devices connected usb_lowlevel_start() fails.

Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
2012-11-20 00:16:06 +01:00
Ilya Yanok
c60795f41d usb: use linux/usb/ch9.h instead of usbdescriptors.h
Linux usb/ch9.h seems to have all the same information (and more)
as usbdescriptors.h so use the former instead of the later one.

As a consequense of this change USB_SPEED_* values don't correspond
directly to EHCI speed encoding anymore, I've added necessary
recoding in EHCI driver. Also there is no point to put speed into
pipe anymore so it's removed and a bunch of host drivers fixed to
look at usb_device->speed instead.

Old usbdescriptors.h included is not removed as it seems to be
used by old USB device code.

This makes usb.h and usbdevice.h incompatible. Fortunately the
only place that tries to include both are the old MUSB code and
it needs usb.h only for USB_DMA_MINALIGN used in aligned attribute
on musb_regs structure but this attribute seems to be unneeded
(old MUSB code doesn't support any DMA at all).

Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
2012-11-20 00:16:06 +01:00
Ilya Yanok
82651c39f6 linux/usb/ch9.h: update with the version from Linux tree
Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
2012-11-20 00:16:06 +01:00
Allen Martin
4151a400cf USB: add arrow key support to usb_kbd
Check for scancodes for arrow keys and map them to ^F/^B, ^N/^P.
Control characters are used instead of ANSI sequence because the
queueing code in usb_kbd doesn't handle the data increase when one
keypress generates 3 keycodes.  The real fix is to convert this driver
to use the input subsystem and queue, but this allows arrow keys to
work until this driver is converted.

Signed-off-by: Allen Martin <amartin@nvidia.com>
2012-11-20 00:16:06 +01:00
Allen Martin
5ddcc38bee tegra: Enable USB keyboard
Enable USB keyboard for seaboard and ventana

Signed-off-by: Allen Martin <amartin@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
2012-11-20 00:16:06 +01:00
Allen Martin
7992bfbf8d tegra: move TEGRA_DEVICE_SETTINGS to tegra-common-post.h
Move environment settings for stdin/stdout/stderr to
tegra-common-post.h and generate them automaticaly based on input
device selection.

Signed-off-by: Allen Martin <amartin@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
2012-11-20 00:16:05 +01:00
Allen Martin
d7475386bb USB: make usb_kbd obey USB DMA alignment requirements
Change usb_kbd driver to obey alignment requirements for USB DMA on
the buffer used for data transfer.  This is necessary for
architectures that enable dcache and enable USB DMA.

Signed-off-by: Allen Martin <amartin@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
2012-11-20 00:16:05 +01:00
Jeroen Hofstee
c11ace6b7b boards: remove the no longer used CONFIG_EHCI_DCACHE
CONFIG_EHCI_DCACHE was removed by commit b8adb12
"USB: Drop cache flush bloat in EHCI-HCD". Remove the defines from
the boards configs as well.

Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
cc: Marek Vasut <marex@denx.de>
cc: Stefan Roese <sr@denx.de>
cc: Tom Rini <trini@ti.com>
cc: Wolfgang Denk <wd@denx.de>
cc: Thierry Reding <thierry.reding@avionic-design.de>
cc: Tom Warren <twarren@nvidia.com>
cc: Stephen Warren <swarren@nvidia.com>
cc: Stefano Babic <sbabic@denx.de>
2012-11-20 00:16:05 +01:00
Tom Rini
178d0cc1a4 Merge branch 'master' of git://git.denx.de/u-boot-video 2012-11-19 09:28:04 -07:00
Tom Rini
bb367b95f9 Merge branch 'agust@denx.de' of git://git.denx.de/u-boot-staging 2012-11-19 09:27:18 -07:00
Stephen Warren
3786a942b5 tegra: use generic fs commands in BOOTCOMMAND
Modify tegra-common-post.h's BOOTCOMMAND definition to use the generic
filesystem command load rather than separate fatload and ext2load.
This removes the need to iterate over supported filesystem types in the
boot command.

This requires editing all board config headers to enable the new
commands. The now-unused commands are left enabled to assue backwards
compatibility with any user scripts. Boards (all from Avionic Design)
which define custom BOOTCOMMAND values are not affected.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
tegra generic fs cmds fixup
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-11-19 08:15:43 -07:00
Simon Glass
ef24c38a6f tegra: config: seaboard: Move tegra-common-post to correct place
The NAND defines ended up before this include file, but should be after
it, so it doesn't become a post-pre-NAND.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-11-19 08:15:42 -07:00
Simon Glass
faf32a0d3c tegra: Remove unnecessary CONFIG_SYS_NAND_BASE
Now that we are using the new CONFIG_SYS_NAND_SELF_INIT setup, we don't
need CONFIG_SYS_NAND_BASE. Punt it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-11-19 08:15:42 -07:00
Stephen Warren
72573543b5 ARM: tegra: enable 8-bit SD slots in board files
Harmony contains an SD slot with all 8 bits routed. This allows plugging
in an eMMC-chip-in-SD-form-factor.

Seaboard/Springbank/Ventana/AC100 all have an eMMC chip with all 8 bits
hooked up.

Now that the U-Boot eMMC code fully supports 8-bit operation, initialize
those ports as 8-bit instead of 4-bit to improve performance.

Whistler was already registering its ports as 8-bit.

TrimSlice doesn't have any 8-bit ports.

I don't have any Avionic Design boards nor the Colibri board to test with.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-11-19 08:15:42 -07:00
Stephen Warren
8c0ec0dbc4 mmc: tegra: support 4-bit operation too on 8-bit slots
If a board has all 8 data lines routed, the SD/MMC controller can still
operate in 4-bit (or presumably even 1-bit) mode. Adjust Tegra's MMC
driver to report the 4-bit capability even for 8-bit slots.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-11-19 08:15:41 -07:00
Allen Martin
1ed0b51b7d tegra: add CONSOLE_MUX support to tegra-kbc
Add support for CONSOLE_MUX to tegra-kbc driver.  This requires
adding a flag to struct keyb to know the driver has already been
initialized so if we try to initialize it again we can just return
success.  Also call into iomux_doenv() from drv_keyboard_init to
re-evaluate the stdin string.

Signed-off-by: Allen Martin <amartin@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-11-19 08:15:41 -07:00
Stephen Warren
7155dc97f6 ARM: tegra: TrimSlice: add support for USB1 port
TrimSlice's USB1 port has two purposes; it either acts as a device port
hosting Tegra's USB recovery protocol, or acts as a host port connected
to the internal USB->SATA bridge chip, which may in turn be connected to
an SSD or HDD. Add the appropriate device tree and board configuration
options to enable this port as a host port, and route the port to the
SATA bridge using the VBUS GPIO.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-11-19 08:15:41 -07:00
Mayuresh Kulkarni
4576c6e6f8 tegra: Enable display/lcd support on Seaboard
Enable the Seaboard's 16-bit LCD and use it as the console.

Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-11-19 08:15:40 -07:00
Simon Glass
0d89efef77 lcd: Add CONFIG_CONSOLE_SCROLL_LINES option to speed console
When the cursor position gets to the end of the LCD console we normally
scroll by one line. This adds an option to increase that value.

Console scrolling is often slow, and if a large amount of output is
being sent, increasing this option to 10 or so will speed things up
considerably.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-11-19 08:15:40 -07:00
Simon Glass
77139f5170 tegra: fdt: Add LCD definitions for Seaboard
The Seaboard has a 1366x768 16bpp LCD. The backlight is controlled
by one of the PWMs.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-11-19 08:15:39 -07:00
Simon Glass
44706a8765 tegra: Support control of cache settings for LCD
Add support for selecting the required cache mode for the LCD:
off, write-through or write-back.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-11-19 08:15:39 -07:00
Simon Glass
ad16617f74 tegra: Align LCD frame buffer to section boundary
For tegra we want to enable the cache for the LCD. This is easier if
we can avoid using L2 page tages, so align the LCD to a section
boundary.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-11-19 08:15:39 -07:00
Simon Glass
9a8efc4604 lcd: Add support for flushing LCD fb from dcache after update
This provides an option for the LCD to flush the dcache after each update
(puts, scroll or clear).

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-11-19 08:15:38 -07:00
Simon Glass
676d319ef5 lcd: Add CONFIG_LCD_ALIGNMENT to select frame buffer alignment
The normal alignment is PAGE_SIZE, but if this is defined, we can support
other alignments.

The motivation for this change is to make the display section-aligned on
ARM so that we can easily turn off data caching for the frame buffer region
without resorting to level 2 page tables.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-11-19 08:15:38 -07:00
Simon Glass
0dde7f5379 arm: Add control over cachability of memory regions
Add support for adjusting the L1 cache behavior by updating the MMU
configuration. The mmu_set_region_dcache_behaviour() function allows
drivers to make these changes after the MMU is set up.

It is implemented only for ARMv7 at present.

This is needed for LCD support, where we want to make the LCD frame buffer
write-through (or off) rather than write-back.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-11-19 08:15:38 -07:00
Simon Glass
1b24a50b44 tegra: Add LCD support to Nvidia boards
Add calls to the LCD driver from Nvidia board code.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-11-19 08:15:37 -07:00
Simon Glass
0be8f203f6 tegra: Add LCD driver
This driver supports driving a single LCD and providing a U-Boot console
on it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-11-19 08:15:37 -07:00
Wei Ni
87540de3af tegra: Add SOC support for display/lcd
Add support for the LCD peripheral at the Tegra2 SOC level. A separate
LCD driver will use this functionality to configure the display.

Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Mayuresh Kulkarni:
- changes to remove bitfields and clean up for submission

Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass:
- simplify code, move clock control into here, clean-up
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-11-19 08:15:37 -07:00
Simon Glass
e1ae0d1f71 tegra: Add support for PWM
The pulse width/frequency modulation peripheral supports generating
a repeating pulse. It is useful for controlling LCD brightness.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-11-19 08:15:36 -07:00
Simon Glass
eefe3e598e tegra: fdt: Add LCD definitions for Tegra
Add LCD definitions and also a proposed binding for LCD displays.

The PWM is as per what will likely be committed to linux-next soon.

The displaymode binding comes from a proposal here:

http://lists.freedesktop.org/archives/dri-devel/2012-July/024875.html

The panel binding is new, and fills a need to specify the panel
timings and other tegra-specific information. Should a binding appear
that allows the pwm to handle this automatically, we can revisit
this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-11-19 08:15:36 -07:00
Simon Glass
beca1fdeff tegra: fdt: Add pwm binding and node
This binding will apparently soon be in linux-next. Bring it in now
since we need to do something, and may as well try to target what
Linux will have.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-11-19 08:15:35 -07:00
Simon Glass
b344496110 tegra: Add display support to funcmux
Add support for a default pin mapping for display1.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-11-19 08:15:35 -07:00
Simon Glass
95be58c988 tegra: Use const for pinmux_config_pingroup/table()
These two functions don't actually modify their arguments so add a const
keyword.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-11-19 08:15:35 -07:00
Simon Glass
899590816a pxa: Disable dcache on palmld, palmtc, zipitz2
These platforms don't include dcache support. Define CONFIG_SYS_DCACHE_OFF
so that functions don't try to call non-existent routines like
flush_dcache_range().

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-11-19 08:15:34 -07:00
Benoît Thébaudeau
39e8576164 mx5: Mark lowlevel_init board-specific code
The mx5 lowlevel_init.S contains board-specific code based on the reference
design. Let's keep it since it avoids creating new lowlevel_init files and it
may be used by many boards. But add a config to make it optional in order not to
cause issues on boards not following this part of the reference design.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Matt Sealey <matt@genesi-usa.com>
Acked-by: Stefano Babic <sbabic@denx.de>
2012-11-19 08:56:27 +01:00
Benoît Thébaudeau
fa88ddb75f ehci-mxc: Fix host power mask bit for i.MX25
The correct bit for H1_PM is 16, not 8, which is the DP pull-up impedance
selection bit.

This issue has been reported by Eric Bénard <eric@eukrea.com> and fixed by
Christoph Fritz <chf.fritz@googlemail.com> on Linux, from which these #define-s
had been copied.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Marek Vasut <marex@denx.de>
2012-11-19 08:49:02 +01:00
Fabio Estevam
ec7503bb0e mx35pdk: Configure CONFIG_BOOTDELAY to one second
One second is enough time for users to react in case they want to stop the
booting process.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-11-19 08:49:02 +01:00
Fabio Estevam
562e6c62b6 mx31pdk: Configure CONFIG_BOOTDELAY to one second
One second is enough time for users to react in case they want to stop the
booting process.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-11-19 08:49:02 +01:00
Fabio Estevam
d941e6b63e mx25pdk: Configure CONFIG_BOOTDELAY to one second
One second is enough time for users to react in case they want to stop the
booting process.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-11-19 08:49:02 +01:00
Fabio Estevam
bf5c6fbbf7 mx51evk: Configure CONFIG_BOOTDELAY to one second
One second is enough time for users to react in case they want to stop the
booting process.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-11-19 08:49:01 +01:00
Fabio Estevam
072f26b1da mx6qsabre_common: Configure CONFIG_BOOTDELAY to one second
One second is enough time for users to react in case they want to stop the
booting process.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Jason Liu <r64343@freescale.com>
2012-11-19 08:49:01 +01:00
Fabio Estevam
eb141bd36c mx6qsabrelite: Configure CONFIG_BOOTDELAY to one second
One second is enough time for users to react in case they want to stop the
booting process.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Jason Liu <r64343@freescale.com>
2012-11-19 08:49:01 +01:00
Fabio Estevam
fbae0d108e mx53loco: Configure CONFIG_BOOTDELAY to one second
One second is enough time for users to react in case they want to stop the
booting process.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-11-19 08:49:01 +01:00
Fabio Estevam
2785694381 mx28evk: Configure CONFIG_BOOTDELAY to one second
One second is enough time for users to react in case they want to stop the
booting process.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-11-19 08:49:01 +01:00
Benoît Thébaudeau
ed0a6fcff9 ehci-mxc: Fix host power mask bit for i.MX35
The correct bit for H1_PM is 16, not 8, which is the DP pull-up impedance
selection bit.

This issue has been reported by Michael Burkey <mdburkey@gmail.com> and fixed by
Christoph Fritz <chf.fritz@googlemail.com> on Linux, from which these #define-s
had been copied.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Marek Vasut <marex@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
2012-11-19 08:49:00 +01:00
Fabio Estevam
cc446726de mx6: clock: Only show CSPI clock if CSPI is enabled
If a board does not enable CSPI, there is no need to show the CSPI clock
frequency as part of the 'clock' command.

Reported-by: Dirk Behme <dirk.behme@gmail.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Dirk Behme <dirk.behme@gmail.com>
2012-11-19 08:49:00 +01:00
Fabio Estevam
3cea335c34 spi: mxc_spi: Fix spi clock glitch durant reset
Measuring the spi clock line on a scope shows a 'glitch' during the reset of the
spi.

Fix this by toggling only the MXC_CSPICTRL_EN bit, so that the clock line becomes
always stable.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
2012-11-19 08:49:00 +01:00
Fabio Estevam
de5bf02cb1 spi: mxc_spi: Fix handling of chip select
In decode_cs() function the polarity of the chip select must be taken into
account.

Also, for the case of low active chip select, the CS was activated too early.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-11-19 08:49:00 +01:00
Fabio Estevam
081237c1f7 mx5: Print CSPI clock in 'clock' command
Print CSPI clock in 'clock' command.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
2012-11-19 08:49:00 +01:00
Fabio Estevam
d84f56f48f mx5: Align SPI CS naming with i.MX53 reference manual
Align SPI chip select naming with i.MX53 reference manual.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-11-19 08:48:59 +01:00
Benoît Thébaudeau
f22e4fae19 ehci-mx5/6: Make board_ehci_hcd_init() optional
A custom board_ehci_hcd_init() may be unneeded, so add a weak default
implementation doing nothing.

By the way, use simple __weak from linux/compiler.h for
board_ehci_hcd_postinit() instead of weak alias with full attribute.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
2012-11-16 09:16:46 +01:00
Benoît Thébaudeau
961a762838 mx35pdk: Add support for OTG
Add support for the OTG port on the mx35pdk Personality board.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Tested-by: Stefano Babic <sbabic@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Marek Vasut <marex@denx.de>
2012-11-16 09:16:45 +01:00
Benoît Thébaudeau
71a5c55bfa ehci-mxc: Add support for i.MX35
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
2012-11-16 09:16:45 +01:00
Benoît Thébaudeau
34d33b671a ehci-mxc: Define host offsets
Some MXC SoCs like the i.MX35 have hosts located at unusual offsets, so prepare
to the introduction of i.MX35 support by defining the ehci-mxc hosts offsets at
SoC level.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
2012-11-16 09:16:45 +01:00
Benoît Thébaudeau
9fa3d093d6 ehci-mxc: Make i.MX25 EHCI configurable
Use EHCI MXC configuration options for i.MX25.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Matthias Weisser <weisserm@arcor.de>
2012-11-16 09:16:45 +01:00
Benoît Thébaudeau
31ac2d0c6a ehci-mxc: Make EHCI power/oc polarities configurable
Make EHCI power and overcurrent polarities configurable. If not set, these new
configurartions keep the default register values so that existing board files
do not have to be changed.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
2012-11-16 09:16:45 +01:00
Benoît Thébaudeau
2cfe0b8f13 ehci-mx5: Add missing OC_DIS for i.MX53
The i.MX53 has MXC_H*_UCTRL_H*_OC_DIS_BIT bits to disable the oc pin.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
2012-11-16 09:16:44 +01:00
Benoît Thébaudeau
661052f476 ehci-mx5: Fix *PM usage for i.MX53
The MXC_*_UCTRL_*PM_BIT bits are available only on i.MX51.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
2012-11-16 09:16:44 +01:00
Benoît Thébaudeau
394c00dcfc ehci-mx5: Fix OPM usage
MXC_OTG_UCTRL_OPM_BIT disables (masks) the power/oc pins if set, like
MXC_H1_UCTRL_H1PM_BIT and MXC_H2_UCTRL_H2PM_BIT, not the opposite.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
2012-11-16 09:16:44 +01:00
Benoît Thébaudeau
7d42432d38 ehci-mx5: Fix OC_DIS usage
MXC_OTG_PHYCTRL_OC_DIS_BIT disables the oc pin if set, like MXC_H1_OC_DIS_BIT,
not the opposite.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
2012-11-16 09:16:44 +01:00
Benoît Thébaudeau
bdc5202068 ehci-mx5: Clean up
Clean up ehci-mx5:
 - Fix column alignments.
 - Fix comments.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
2012-11-16 09:16:44 +01:00
Benoît Thébaudeau
164738e940 ehci-mxc: Clean up
Clean up ehci-mxc:
 - Remove useless #if's.
 - Fix identation.
 - Issue a #error if used with an unsupported platform.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
2012-11-16 09:16:44 +01:00
Benoît Thébaudeau
8eeb19be75 mx31: Move EHCI definitions to ehci-fsl.h
The EHCI definitions in i.MX31's imx-regs.h are MXC-generic, so move them to
ehci-fsl.h so that all MXC SoCs can use them.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
2012-11-16 09:16:43 +01:00
Rajeshwari Shinde
7a5337732e EXYNOS5: Enable SPI booting.
This patch enables SPI Booting for EXYNOS5

Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2012-11-15 21:08:21 +09:00
Hatim RV
3a8a70017d EXYNOS5: Enable SPI
This patch enables SPI driver for EXYNOS5.

Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Signed-off-by: Hatim Ali <hatim.rv@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2012-11-15 21:08:21 +09:00
Rajeshwari Shinde
1bf43b829e SPI: Add SPI Driver for EXYNOS.
This patch adds SPI driver for EXYNOS.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Padmavathi Venna <padma.v@samsung.com>
Signed-off-by: Gabe Black <gabeblack@google.com>
Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Signed-off-by: Hatim Ali <hatim.rv@samsung.com>
Acked-by: Mike Frysinger <vapier@gentoo.org>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: jy0922.shim@samsung.com
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2012-11-15 21:08:21 +09:00
Hatim RV
383b5cc58c EXYNOS5: Add base address for SPI
Add base address definition for SPI device on Exynos.

Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Signed-off-by: Hatim Ali <hatim.rv@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2012-11-15 21:08:20 +09:00
Hatim RV
b56b304252 EXYNOS: Add clock for SPI
Add api to calculate and set the clock for SPI channels

Signed-off-by: James Miller <jamesmiller@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Signed-off-by: Hatim Ali <hatim.rv@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2012-11-15 21:08:20 +09:00
Rajeshwari Shinde
fbb5743308 EXYNOS5: Add pinmux support for SPI
This patch adds pinmux support for SPI channels

Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Signed-off-by: Hatim Ali <hatim.rv@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2012-11-15 21:08:20 +09:00
Rajeshwari Shinde
363647143c SMDK5250: Enable Sound
This patch enables sound support for EXYNOS5

Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Acked-by: Chander Kashyap <chander.kashyap@linaro.org>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2012-11-15 21:08:20 +09:00
Rajeshwari Shinde
2e206caaa6 EXYNOS: Add clock for I2S
This patch adds clock support for I2S

Signed-off-by: R. Chandrasekar <rcsekar@samsung.com>
Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2012-11-15 21:08:20 +09:00
Rajeshwari Shinde
87fa491aee EXYNOS: Add I2S base address
This patch adds base address for I2S

Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Acked-by: Chander Kashyap <chander.kashyap@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2012-11-15 21:08:20 +09:00
Rajeshwari Shinde
6b0884d73a EXYNOS: Add pinmux for I2S
This patch adds pinmux support for I2S1

Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2012-11-15 21:08:20 +09:00
Rajeshwari Shinde
75ddfb4ff4 EXYNOS: Add parameters required by I2S
This patch adds the audio parameters required by the I2S to play the
predefined audio data.

Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2012-11-15 21:08:20 +09:00
Rajeshwari Shinde
02cfce31a7 EXYNOS: Add I2S registers
This patch add I2S registers

Signed-off-by: R. Chandrasekar <rcsekar@samsung.com>
Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2012-11-15 21:08:20 +09:00
Rajeshwari Shinde
c0c88533ff Sound: Add command for audio playback
This patch adds command to test audio playback.
sound init - Initialises the audio subsystem (i2s and wm8994 codec)
sound play - Plays predefined the audio data when specified length
and frequency.

Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2012-11-15 21:08:20 +09:00
Rajeshwari Shinde
a2d8e0a717 SOUND: Add WM8994 codec
This patch adds driver for audio codec WM8994

Signed-off-by: R. Chandrasekar <rcsekar@samsung.com>
Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2012-11-15 21:08:20 +09:00
Rajeshwari Shinde
511ed5fdd3 SOUND: SAMSUNG: Add I2S driver
This patch adds driver for I2S interface specific to samsung.

Signed-off-by: R. Chandrasekar <rcsekar@samsung.com>
Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2012-11-15 21:08:20 +09:00
Piotr Wilczek
d984b9f89c exynos4: universal_C210: add display support
This patch add support for display on Universal C210 board.
Width of displyed logo must be not bigger than 480 pixel and
is limited by width of the screen.
Tizen logo size is 520x120 pixels and should be resized.

Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2012-11-15 21:08:20 +09:00
Piotr Wilczek
28c9e34827 drivers: video: fix image position
This patch fixes image position on screen when images's height or width is biger then the lcd's.

Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
CC: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2012-11-15 21:08:20 +09:00
Piotr Wilczek
eed2974218 drivers: video: Add ld9040 video driver
Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
CC: Donghwa Lee <dh09.lee@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2012-11-15 21:08:19 +09:00
Piotr Wilczek
9e26d8a4a0 misc:max8998 Add LDO macros
Add LDO7 and LDO17 macros to max8998_pmic.h necessary to power on the LCD.

Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2012-11-15 21:08:19 +09:00
Piotr Wilczek
ff0fedd585 exynos4: universal_C210: use software SPI
This patch use software spi on Samsung Universal C210 board.

Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2012-11-15 21:08:19 +09:00
Minkyu Kang
a6f173073b s3c64xx: fix the compiler error and warning
This patch is fixing the following errors

s3c64xx.c:175: error: variable 's3c64xx_serial_drv' has initializer but incomplete type
s3c64xx.c:176: error: unknown field 'name' specified in initializer
s3c64xx.c:176: warning: excess elements in struct initializer
s3c64xx.c:176: warning: (near initialization for 's3c64xx_serial_drv')
s3c64xx.c:177: error: unknown field 'start' specified in initializer
s3c64xx.c:177: warning: excess elements in struct initializer
s3c64xx.c:177: warning: (near initialization for 's3c64xx_serial_drv')
s3c64xx.c:178: error: unknown field 'stop' specified in initializer
s3c64xx.c:178: warning: excess elements in struct initializer
s3c64xx.c:178: warning: (near initialization for 's3c64xx_serial_drv')
s3c64xx.c:179: error: unknown field 'setbrg' specified in initializer
s3c64xx.c:179: warning: excess elements in struct initializer
s3c64xx.c:179: warning: (near initialization for 's3c64xx_serial_drv')
s3c64xx.c:180: error: unknown field 'putc' specified in initializer
s3c64xx.c:180: warning: excess elements in struct initializer
s3c64xx.c:180: warning: (near initialization for 's3c64xx_serial_drv')
s3c64xx.c:181: error: unknown field 'puts' specified in initializer
s3c64xx.c:181: warning: excess elements in struct initializer
s3c64xx.c:181: warning: (near initialization for 's3c64xx_serial_drv')
s3c64xx.c:182: error: unknown field 'getc' specified in initializer
s3c64xx.c:182: warning: excess elements in struct initializer
s3c64xx.c:182: warning: (near initialization for 's3c64xx_serial_drv')
s3c64xx.c:183: error: unknown field 'tstc' specified in initializer
s3c64xx.c:183: warning: excess elements in struct initializer
s3c64xx.c:183: warning: (near initialization for 's3c64xx_serial_drv')
s3c64xx.c: In function 's3c64xx_serial_initialize':
s3c64xx.c:188: warning: implicit declaration of function 'serial_register'
s3c64xx.c: At top level:
s3c64xx.c:191: error: expected '=', ',', ';', 'asm' or '__attribute__' before 'struct'

Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Acked-by: Marek Vasut <marex@denx.de>
2012-11-15 21:08:19 +09:00
Ashok Kumar Reddy
4debcc2c22 ARM: arm1176: Define arch_cpu_init() for s3c64xx
arch_cpu_init() is removed from cpu level to SOC level for arm1176
in commit 4ea6d6b,the same is done for s3c64xx

Signed-off-by: Ashok Kumar Reddy <ashokkourla2000@gmail.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2012-11-15 21:08:19 +09:00
Rajeshwari Shinde
0d146a56f9 SMDK5250: Config: Enable MAX77686 pmic chip
This patch enables MAX77686 pmic chip for SMDK5250.

Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2012-11-15 21:08:19 +09:00
Rajeshwari Shinde
5889452403 PMIC: MAX77686: Add support for MAX77686
This patch adds driver and register definitions for PMIC chip
MAX77686.

Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Acked-by: Lukasz Majewski <l.majewski@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2012-11-15 21:08:19 +09:00
Marek Vasut
2b5fdd07c5 dm: wdt: Move s5p watchdog timer to drivers/watchdog/
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: David Müller <d.mueller@elsoft.ch>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: U-Boot DM <u-boot-dm@lists.denx.de>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2012-11-15 21:08:19 +09:00
Minkyu Kang
bb6527bc73 EXYNOS: Clock: Add common function for pll rate calculation
Moved the common code to calculate pll clock rate to new function
exynos_get_pll_clk().

Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org>
2012-11-15 21:08:19 +09:00
Minkyu Kang
6fcc059f81 ARCH: EXYNOS: add support to match product id
Based upon single SoC there can be multiple variants.
This patch add support to match the complete product ID.

Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org>
2012-11-15 21:08:19 +09:00
Piotr Wilczek
ab23304dbc arm: trats: Power down core 1
This patch turns power down for unused core 1

Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2012-11-15 21:08:18 +09:00
Piotr Wilczek
11a447983f arm:exynos4:universal: Eliminated low level init
Low level initialisation is done by another bootloader

Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2012-11-15 21:08:18 +09:00
Piotr Wilczek
ea7991b8f1 arm:exynos4:universal: Use pinmux for mmc configuration
This patch use the pinmux for mmc configuration for Universal C210

Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2012-11-15 21:08:18 +09:00
Piotr Wilczek
d651e88a00 arm:exynos4:trats: Use pinmux for mmc configuration
This patch use the pinmux for mmc configuration for Trats

Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2012-11-15 21:08:18 +09:00
Piotr Wilczek
a3eab2ac41 arm:exynos4:pinmux: Modify the gpio function for mmc
This patch add pinmux settings for Exynos4 for mmc0 and mmc2

Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2012-11-15 21:08:18 +09:00
Piotr Wilczek
11c5bc0b9d arm:exynos4:trats: Fix SDRAM size
Full 1GiB is visible

Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2012-11-15 21:08:18 +09:00
Piotr Wilczek
b5598578f5 arm:exynos4:trats: Correct SDRAM configuration for trats
SDRAM setup alike to ORIGEN Dev board.

Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2012-11-15 21:08:18 +09:00
Chander Kashyap
061562c423 Exynos5250: Enable PXE Support
Add PXE support for the Exynos5250.

Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2012-11-15 21:08:18 +09:00
Łukasz Majewski
822593f028 gpio:fix: Proper handling of GPIO subsystem parts at Samsung devices
Now proper GPIO parts numbering is handled at Samsung devices.
This fix is necessary for code using GPIO located at other banks
than first.

Test HW:
- Exynos4210 - Trats
- S5PC110 - goni

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2012-11-15 21:08:18 +09:00
Robert P. J. Day
59ddead140 cmd_mmc.c: Fix typo, "dislay" -> "display"
Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
2012-11-14 14:29:27 +01:00
Vikram Narayanan
30ea4be921 mx53loco: Fix build error when CONFIG_VIDEO is disabled
The inclusion of LCD patch into mx53loco breaks the build when
CONFIG_VIDEO is disabled. Fix this by splitting the video
related stuff to a new file.

Also rename the function lcd_iomux to setup_iomux_lcd to make the
namings aligned with the other iomux functions.

Signed-off-by: Vikram Narayanan <vikram186@gmail.com>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
2012-11-14 14:05:51 +01:00
Vikram Narayanan
5d71bd210f mx51evk: Fix build error when CONFIG_VIDEO is disabled
The inclusion of LCD patch into mx51evk breaks the build when
CONFIG_VIDEO is disabled. Fix this by splitting the video related
stuff to a new file.

Also rename the function lcd_iomux to setup_iomux_lcd to make the
namings aligned with the other iomux functions.

Signed-off-by: Vikram Narayanan <vikram186@gmail.com>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
2012-11-14 14:05:35 +01:00
Andreas Bießmann
da1fd96ce4 fs/fs.c: do_fsload: measure throughput
This patch adds time measurement and throughput calculation for
all supported load commands.

The output of ext2load changes from

---8<---
1830666 bytes read
--->8---

to

---8<---
1830666 bytes read in 237 ms (7.4 MiB/s)
--->8---

Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
[agust: rebased and revised commit log]
Signed-off-by: Anatolij Gustschin <agust@denx.de>
2012-11-14 13:35:14 +01:00
Alejandro Mery
624c721f0c fs: zfs: fix illegal use of fp
the upcoming sunxi (allwinner a10/a13) platform enables zfs
by default, and using linaro's hf -msoft-float makes the build
fail because this u64 division.

Signed-off-by: Alejandro Mery <amery@geeks.cl>
Acked-by: Stefan Roese <sr@denx.de>
2012-11-14 13:18:41 +01:00
Jens Scharsig (BuS Elektronik)
4a1921eb04 Video: fix compiler warnings in bus_vcxk
if a board uses the vcxk driver option CONFIG_SYS_VCXK_DOUBLEBUFFERD,
compilier shows warnings. This patch will fix it.

Signed-off-by: Jens Scharsig (BuS Elektronik) <esw@bus-elektronik.de>
2012-11-14 12:27:49 +01:00
Jens Scharsig (BuS Elektronik)
d858c335bf M68K: eb_cpu5282: general update and enhanced board support
- update clock settings for higher perfomance
- change standard baud rate to 115200
- fix flash base address
- remove unused defines
- add I2C support
- switch form board dependent flash to cfi
- remove board dependent flash code
- use sdram bank 0 instead of bank 1 on boot
- enable on board frame buffer instead external
- remove fake mac address form config
- add watchdog support
- add status led support

Signed-off-by: Jens Scharsig (BuS Elektronik) <esw@bus-elektronik.de>
[agust: fixed small style issues and build warning]
Signed-off-by: Anatolij Gustschin <agust@denx.de>
2012-11-14 12:16:50 +01:00
Łukasz Majewski
f5a7004cf7 arm:universal_c210:pmic: Adjust C210 Universal target platform board to new PMIC framework
Move pmic_init() function call from board_init() to power_init_board()
to work with new PMIC/POWER framework.

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
2012-11-14 11:21:12 +01:00
Łukasz Majewski
0ecdab682c arm:goni:pmic: Adjust GONI target platform board to new PMIC framework
Move pmic_init() function call from board_init() to power_init_board()
to work with new PMIC/POWER framework.

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
2012-11-14 11:21:12 +01:00
Łukasz Majewski
2988e8662b power:pmic: Rename CONFIG_DIALOG_PMIC defines to CONFIG_DIALOG_POWER
Rename CONFIG_DIALOG_PMIC to CONFIG_DIALOG_POWER

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Stefano Babic <sbabic@denx.de>
2012-11-14 11:21:12 +01:00
Łukasz Majewski
be3b51aa4a power:pmic: Rename CONFIG_PMIC* defines to CONFIG_POWER
Rename all CONFIG_PMIC* defines to CONFIG_POWER*

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Stefano Babic <sbabic@denx.de>
2012-11-14 11:21:12 +01:00
Łukasz Majewski
316a51beba power:pmic: Rename ./drivers/power/pmic_* to ./drivers/power/power_* files
Rename pmic/power related files at ./drivers/power directory

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Stefano Babic <sbabic@denx.de>
2012-11-14 11:21:12 +01:00
Łukasz Majewski
7d19629f8e pmic: Extend PMIC framework to support battery related commands
Two extra commands:
"pmic name bat state" and "pmic name bat charge" has been added to
pmic framework. Those provides state display and charge capabilities
to named batteries.

The pmic_core.c file has been refactored to more consistent name scheme.

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Stefano Babic <sbabic@denx.de>
2012-11-14 11:21:12 +01:00
Łukasz Majewski
bdee9c8501 arm:trats:pmic: Support for charging battery at Samsung's TRATS board
The battery connected to Samsung's Trats development board is now
charged when voltage drops below threshold.

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
2012-11-14 11:21:11 +01:00
Łukasz Majewski
69ad72a10e arm:trats:pmic: Power consumption reduction state for Samsung's TRATS board
When charging battery is necessary, the development board needs to
be turned into low power mode for better efficiency.

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
2012-11-14 11:21:11 +01:00
Łukasz Majewski
d955c6de84 pmic:max8997: Support for MAX8997 internal charger control
Support for MAX8997 built-in charger.

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Stefano Babic <sbabic@denx.de>
2012-11-14 11:21:11 +01:00
Łukasz Majewski
61365ffc2e arm:trats:pmic: Enable battery support at Samsung's TRATS board
Support for TRATS battery has been added. It is treated as a "normal"
power related device and thereof controlled by pmic/power subsystem.

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
2012-11-14 11:21:11 +01:00
Łukasz Majewski
5a77358c4b arm:trats:pmic: Enable fuel-gauge (MAX17042) at Samsung's TRATS board
FG IC built into the MAX8997 device (compliant to MAX17042) is enabled
at TRATS.

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
2012-11-14 11:21:11 +01:00
Łukasz Majewski
7dcda99d4f arm:trats:pmic: Enable MUIC (MAX8997) at Samsung's TRATS board
MUIC IC built into the MAX8997 device is enabled at TRATS.

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
2012-11-14 11:21:11 +01:00
Łukasz Majewski
a52a7b1477 arm:trats:pmic: Default PMIC(MAX8997) initialization for Samsung's TRATS board
Default PMIC (MAX8997) initialization for Samsung's TRATS development board.

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
2012-11-14 11:21:10 +01:00
Łukasz Majewski
bf995a9a28 pmic:max8997: Function for calculating LDO internal register value
Function for calculating LDO internal register value from passed micro
Volt.

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Stefano Babic <sbabic@denx.de>
2012-11-14 11:21:10 +01:00
Łukasz Majewski
b95aacd332 pmic:fuel-gauge: Support for MAX17042 fuel-gauge
Support for MAX17042 fuel-gauge (FG), which is built into the MAX8997
power management device.
Special file - fg_battery_cell_params.h with cells characteristics
added.

The FG device will work with redesigned PMIC framework.

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Stefano Babic <sbabic@denx.de>
2012-11-14 11:21:10 +01:00
Łukasz Majewski
294a97da34 pmic:muic: Support for MUIC built into MAX8997 device
Support for MUIC (Micro USB Integrated Circuit) built into the MAX8997
power management device.

The MUIC device will work with redesigned PMIC framework.

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Stefano Babic <sbabic@denx.de>
2012-11-14 11:21:10 +01:00
Łukasz Majewski
eba423910c pmic🔋 Support for Trats Battery at PMIC framework
Trats battery is now treated in the same way as other power related
devices. This approach allows for more unified handling of all devices
responsible for power management.

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Stefano Babic <sbabic@denx.de>
2012-11-14 11:21:10 +01:00
Łukasz Majewski
bd8479e8de pmic: Extend struct pmic to support battery and charger related operations
Now it is possible to provide specific function per PMIC/power
device instance.

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
2012-11-14 11:21:09 +01:00
Łukasz Majewski
e0a0cbf247 pmic: Move pmic related code to ./drivers/power directory
The PMIC framework has been moved to its more natural place
./drivers/power from ./drivers/misc directory.

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
2012-11-14 11:21:09 +01:00
Łukasz Majewski
9a1c4b2286 pmic:chrg: Common information about charger and battery (power_chrg.h)
New power_chrg.h file has been added to "bind" together common
information about charging battery available in the system.

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Stefano Babic <sbabic@denx.de>
2012-11-14 11:21:09 +01:00
Łukasz Majewski
d47ab98261 pmic: Enable power_board_init() support at TRATS
Enable support for power_board_init() method at TRATS board.

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
2012-11-14 11:21:09 +01:00
Łukasz Majewski
2ffb4beb50 pmic: Introduce power_init_board() method at ./lib/board.c file
It is necessary to introduce a new system wide function- power_init_board()

It turns out, that power initialization must be done as early as possible.
In the case of PMIC framework redesign, which aims to support multiple
instances of PMIC devices the initialization shall be performed just
after malloc configuration.

The power_init_board function is a weak function with default implementation.

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
2012-11-14 11:21:09 +01:00
Łukasz Majewski
c733681507 pmic: Extend PMIC framework to support multiple instances of PMIC devices
The PMIC framework has been extended to support multiple instances of
the variety of devices responsible for power management.
This change allows supporting of e.g. fuel gauge, charger, MUIC (Micro USB
Interface Circuit).
Power related includes have been moved to ./include/power directory.
This is a first of a series of patches - in the future "pmic" will be
replaced with "power".

Two important issues:
1. The PMIC needs to be initialized just after malloc is configured
2. It uses list to hold information about available PMIC devices

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Stefano Babic <sbabic@denx.de>
2012-11-14 11:21:09 +01:00
Łukasz Majewski
452329f1d5 pmic:max8997: Switch the MAX8997 PMIC to be used with multibus I2C
PMIC MAX8997 is now ready to work with single and multibus soft I2C
implementation.

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
2012-11-14 11:21:07 +01:00
Łukasz Majewski
86879d7120 pmic:i2c: Add I2C sensor byte order (big/little) to PMIC framework
Since the pmic_reg_read is the u32 value, the order in which bytes
are placed to form u32 value is important.

Support for big and little sensor endianess is added.

Moreover calls to [leXX|beXX]_to_cpu have been added to support
little and big endian SoCs.

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
2012-11-14 11:21:07 +01:00
Łukasz Majewski
b5bf9cafea pmic:i2c: Handle PMIC I2C transmission comprising of two bytes
This patch adds support for proper handling of a PMIC I2C transmission
comprising of two bytes.

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Stefano Babic <sbabic@denx.de>
2012-11-14 11:21:07 +01:00
Scott Wood
a6d0f62a0c nand_spl: fix u-boot.lst breakage
Commit 97b24d3d51 "common: Add symbol
handling for generic lists into Makefile" introduced build errors in many
nand_spl targets, complaining of a missing u-boot.lst.  When not doing an
out-of-tree build, $(obj) expands to nothing, so GCC ended up being given
-I with no argument (or rather, -ansi was the argument).  The failure
didn't show up during a -j1 build because it was picking up the non-SPL
version of u-boot.lst.

Signed-off-by: Scott Wood <scottwood@freescale.com>
2012-11-14 10:26:23 +01:00
Andreas Bießmann
b3141fdb9f Makefile: silence 'make clean'
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
2012-11-14 10:26:18 +01:00
Simon Glass
27e976004e patman: Issue empty change logs for unchanged patches
Often a particular patch may change only for some versions of a series.
For versions where there is no change, issue a change log indicating
that (for example 'Changes in v4: None').

For such lines, don't add a blank line afterwards, to conserve space.
Use list.insert() instead of list = [item] + list.

Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Stefan Roese <sr@denx.de>
2012-11-14 10:22:47 +01:00
Simon Glass
008784765a fdt: Remove fdtdec_find_alias_node() function
This function is not needed, since fdt_path_offset() performs the same
service. Remove it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-12 23:15:25 -05:00
Simon Glass
fcabc24f4f fdt: Set kernaddr if fdt indicates a kernel is present
If kernel-offset is specified in the fdt, set an environment variable
so that scripts can access the attached kernel.

This can be used by a packaging program to tell U-Boot about a kernel
that has been downloaded alongside U-Boot. The value in the fdt is
the offset of the kernel from the start of the U-Boot image, so we can
find it just by adding CONFIG_SYS_TEXT_BASE.

It is then fairly easy to put something like this in the environment
variables in the board header file:

		"if test ${kernaddr} != \"\"; then "\
			"echo \"Using bundled kernel\"; "\
			"bootm ${kernaddr};" \
		"fi; "\
		/* rest of boot sequence follows here */

Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-12 23:14:57 -05:00
Gabe Black
d95f6ec733 fdt: Add option to default to most compatible conf in a fit image
When booting a fit image with multiple configurations, the user either has to
specify which configuration to use explicitly, or there has to be a default
defined which is chosen automatically. This change adds an option to change
that behavior so that a configuration can be selected explicitly, or the
configuration which has the device tree that claims to be compatible with the
earliest item in U-Boot's device tree.

In other words, if U-Boot claimed to be compatible with A, B, and then C, and
the configurations claimed to be compatible with A, D and B, D and D, E, the
first configuration, A, D, would be chosen. Both the first and second
configurations match, but the first one matches a more specific entry in
U-Boot's device tree. The order in the kernel's device tree is ignored.

Signed-off-by: Gabe Black <gabeblack@google.com>

Commit-Ready: Gabe Black <gabeblack@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-12 23:14:57 -05:00
Doug Anderson
67e1ea26e8 fdt: Allow device tree to specify secure booting
When secure booting is chosen:
* The u-boot shell is never invoked during boot--we just do a simple
  table lookup to find the command.  This means we could even remove
  the shell parsing from u-boot and still be able to boot.
* The boot command can't be interruped.
* Failure doesn't cause us to fall back to the shell.

Signed-off-by: Gabe Black <gabeblack@google.com>
Signed-off-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-12 23:14:57 -05:00
Gabe Black
3b73459ea3 fdt: Tell the FDT library where the device tree is
This change adds a call to set_working_fdt_addr near the end of u-boot
initialization which tells the fdt command/library where the device tree is.
This makes it possible to use the fdt command to look at the active device tree
since otherwise there would be no way to know what address it was at to set
things up manually.

Signed-off-by: Gabe Black <gabeblack@google.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-12 23:14:57 -05:00
Che-Liang Chiou
224b72e639 fdt: Load boot command from device tree
Load boot command from /config/bootcmd of device tree if present.

Signed-off-by: Tom Wai-Hong Tam <waihong@chromium.org>
Signed-off-by: Che-Liang Chiou <clchiou@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-12 23:14:57 -05:00
Sean Paul
202ff75375 fdt: Add polarity-aware gpio functions to fdtdec
Add get and set gpio functions to fdtdec that take into account the
polarity field in fdtdec_gpio_state.flags.

Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-12 23:14:57 -05:00
Che-Liang Chiou
aadef0a1bc fdt: Add fdtdec_get_uint64 to decode a 64-bit value from a property
It decodes a 64-bit value from a property that is at least 8 bytes long.

Signed-off-by: Che-Liang Chiou <clchiou@chromium.org>

Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-12 23:14:57 -05:00
Gabe Black
79289c0b5f fdt: Add function to read boolean property
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>

Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
Commit-Ready: Gabe Black <gabeblack@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-12 23:14:57 -05:00
Gerald Van Baren
7cde397b21 fdt: Export fdtdec_lookup() and fix the name
The name of this function is not consistent, so fix it, and export
the function for external use.

Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-12 23:13:54 -05:00
Abhilash Kesavan
5921f6a292 fdt: Add function for decoding multiple gpios globally available
Samsung's SDHCI bindings require multiple gpios to be parsed and
configured at a time. Export the already available fdtdec_decode_gpios
for this purpose.

Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com>
Commit-Ready: Che-Liang Chiou <clchiou@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-12 23:00:35 -05:00
Simon Glass
f20c461984 fdt: Add fdtdec_decode_region() to decode memory region
A memory region has a start and a size and is often specified in
a node by a 'reg' property. Add a function to decode this information
from the fdt.

Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-12 23:00:34 -05:00
Simon Glass
332ab0d54a fdt: Add function to get a config string from device tree
Add a function to look up a configuration string such as board name
and returns its value. We look in the "/config" node for this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-12 23:00:34 -05:00
Abhilash Kesavan
09258f1e8b fdt: Add function to get config int from device tree
Add a function to look up a configuration item such as machine id
and return its value.

Note: The code has been taken as is from the Chromium u-boot development
tree and needs Simon Glass' sign-off.

Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-12 23:00:34 -05:00
Bo Shen
cfcd1c03e4 video: atmel: implement lcd_setcolreg function
implement the common api lcd_setcolreg in include/lcd.h

Signed-off-by: Bo Shen <voice.shen@atmel.com>
[agust: fixed commit log and gcc 4.6 -Wparentheses warnings]
Signed-off-by: Anatolij Gustschin <agust@denx.de>
2012-11-10 14:04:08 +01:00
Thomas Chou
db71964235 nios2: remove asm/status_led.h
The file has a wrong inline keyword of __led_toggle(), which causes
compilation error. And its content is defined in common status_led.h.
So define CONFIG_BOARD_SPECIFIC_LED in board config files and remove
this header file.

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
2012-11-10 19:45:58 +08:00
Thomas Chou
4f63bfb689 nios2: use builtin functions for control registers access
The commit 51926d5ee0
  COMMON: Use __stringify() instead of rest of implementations
forgot to update the wrctl funtion, and causes compilation error.

But there are builtin functions for control registers access in
nios2 comipiler. It is convenient to use them instead.

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Cc: Marek Vasut <marex@denx.de>
2012-11-10 19:45:58 +08:00
Benoît Thébaudeau
ccfa398547 arm1136: Fix enable_caches()
enable_caches() did not enable icache if CONFIG_SYS_ICACHE_OFF was not defined
but CONFIG_SYS_DCACHE_OFF was.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
2012-11-10 12:28:22 +01:00
Troy Kisky
34275d70fe arch-mx6: add mx6dl_pins.h
Only the values used in the sabrelite board are
added currently. Add more as other boards use them.

Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
2012-11-10 08:15:40 +01:00
Troy Kisky
eb0344d974 imx-common: cpu: add imx_ddr_size
Read memory setup registers to determine size
of available ram. This routine works for mx53/mx6x

I need this because when mx6solo called get_ram_size
with a too large maximum size, the system hanged.

Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
2012-11-10 08:15:40 +01:00
Troy Kisky
5ea6d7c8fc mx6: use CONFIG_MX6 instead of CONFIG_MX6Q
Use CONFIG_MX6 when the particular processor
variant isn't important.

Reserve the use of CONFIG_MX6Q to
specifically test for quad cores variant.

Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
2012-11-10 08:15:40 +01:00
Troy Kisky
20332a066a mx6: soc: update get_cpu_rev and get_imx_type for mx6solo/sololite
Previously, the same value was returned for both mx6dl and mx6solo.
Check number of processors to differeniate.
Also, a freescale patch says that sololite has its cpu/rev
stored at 0x280 instead of 0x260.
I don't have a sololite to verify.

Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
2012-11-10 08:15:40 +01:00
Stefano Babic
3e4d27b06d Merge git://git.denx.de/u-boot 2012-11-10 08:05:54 +01:00
Tom Rini
59852d0386 Merge branch 'master' of git://www.denx.de/git/u-boot-microblaze 2012-11-09 08:47:25 -07:00
Anatolij Gustschin
22b6fcb50d common/command.c: revert changes from commit 199adb60
commit 199adb601f "common/misc: sparse
fixes" broke the help command trying to fix the sparse error
"command.c:44:38: error: bad constant expression".

As Henrik points out, the fix was bad because the commit used
CONFIG_SYS_MAXARGS whereas the code intended to use the maximum
number of commands (not arguments to a command).

Revert command.c changes to the original code as asked by Wolfgang.

Reported-by: Henrik Nordström <henrik@henriknordstrom.net>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
2012-11-08 13:18:10 +01:00
Michal Simek
b3e5cd17f6 microblaze: Fix compilation failure because of missing libdts
Microblaze platform can use CONFIG_OF_EMBED option
but also it is necessary to support boards
which don't want to use this option.
U-Boot doesn't compile dts/libdts.o for #undef CONFIG_OF_EMBED
case that's why it should be guarded by ifdef.

Signed-off-by: Michal Simek <monstr@monstr.eu>
2012-11-08 10:33:19 +01:00
Michal Simek
f8c1ed092c microblaze: Remove asm/bitops.h from asm/posix_types.h
The patch
"include/linux/byteorder: import latest endian definitions from linux"
(sha1: eef1cf2d5c)

Introduced a lot of compilation failures with unknow types.
include/linux/byteorder/big_endian.h:45:1: error: unknown type name '__le64'
include/linux/byteorder/big_endian.h: In function '__cpu_to_le64p':
include/linux/byteorder/big_endian.h:47:18: error: '__le64' undeclared (first use in this function)
include/linux/byteorder/big_endian.h:47:18: note: each undeclared identifier is reported only once for each function it appears in
include/linux/byteorder/big_endian.h:47:25: error: expected ';' before '__swab64p'
include/linux/byteorder/big_endian.h: At top level:
include/linux/byteorder/big_endian.h:49:1: error: unknown type name '__le64'
include/linux/byteorder/big_endian.h:53:1: error: unknown type name '__le32'
include/linux/byteorder/big_endian.h: In function '__cpu_to_le32p':
include/linux/byteorder/big_endian.h:55:18: error: '__le32' undeclared (first use in this function)
include/linux/byteorder/big_endian.h:55:25: error: expected ';' before '__swab32p'
include/linux/byteorder/big_endian.h: At top level:
include/linux/byteorder/big_endian.h:57:1: error: unknown type name '__le32'
include/linux/byteorder/big_endian.h:61:1: error: unknown type name '__le16'
...

Removing asm/bitops.h solved this problem.

Signed-off-by: Michal Simek <monstr@monstr.eu>
2012-11-07 17:11:14 +01:00
Michal Simek
5811830fae microblaze: Flush caches before enabling them
Flushing caches is necessary because of soft reset
which doesn't clear caches.

Signed-off-by: Michal Simek <monstr@monstr.eu>
Reviewed-by: Marek Vasut <marex@denx.de>
2012-11-07 17:11:14 +01:00
Michal Simek
ea0122816c microblaze: Fix byteorder for microblaze
Just remove ancient code.

Signed-off-by: Michal Simek <monstr@monstr.eu>
Acked-by: Stephan Linz <linz@li-pro.net>
Reviewed-by: Marek Vasut <marex@denx.de>
2012-11-07 17:11:14 +01:00
Michal Simek
548ce4bf76 microblaze: Fix compilation warning in ext2_find_next_zero_bit
ext2_find_next_zero_bit must be also static if __swab32 is also static.

Warning:
include/asm/bitops.h:369:22: warning: '__fswab32' is static but
used in inline function 'ext2_find_next_zero_bit'
which is not static [enabled by default]

Signed-off-by: Michal Simek <monstr@monstr.eu>
Acked-by: Stephan Linz <linz@li-pro.net>
2012-11-07 17:11:14 +01:00
Stefan Roese
24dede480c MAKEALL: Add spear platform target to compile all SPEAr boards
Signed-off-by: Stefan Roese <sr@denx.de>
2012-11-07 01:29:46 +01:00
Vadim Bendebury
d484b52e6f video: Skip bitmaps which do not fit into the screen in cfb_console
The cfb console driver is trying to prevent bitmaps to spill over the
screen, but the calculations assume that at least part of the bitmap
fits into the screen area. In reality there could be bitmap elements
which are completely out of the screen area, they just need to be
discarded.

Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-07 00:57:27 +01:00
Tom Wai-Hong Tam
45d7f52511 lcd: Implement RLE8 bitmap decoding
Add support for drawing compressed RLE8 bitmaps.

Reference: http://www.digicamsoft.com/bmp/bmp.html

Signed-off-by: Che-Liang Chiou <clchiou@chromium.org>
Signed-off-by: Tom Wai-Hong Tam <waihong@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Che-Liang Chiou <clchiou@chromium.org>
[agust: fix some minor style issues and build warnings]
Signed-off-by: Anatolij Gustschin <agust@denx.de>
2012-11-07 00:57:25 +01:00
Tom Wai-Hong Tam
fecac46cf8 lcd: Fix BMP decode bug that skips the wrong padded row
This change fixed 2 things:
 - Rename padded_line to padded_width since it is (width + padded_row) not line.
 - When finished a line, should skip the padded_row that is
   (padded_width - width) instead of (width - padded_width).

Reference: http://en.wikipedia.org/wiki/BMP_file_format
Signed-off-by: Tom Wai-Hong Tam <waihong@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-07 00:57:22 +01:00
Vadim Bendebury
395166cffb lcd: Provide an API to access LCD parameters
Create a basic API to provide access to lcd parameters such as screen
size, and to position the cursor on the screen.

This matches up with the video API for the same purpose. Unfortunately
they are not yet combined.

Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-07 00:57:16 +01:00
Stefan Reinauer
c20ee073a6 video: Implement additional video API functions in cfb_console
Implement the new video API functions to provide access to screen size,
etc.

Signed-off-by: Stefan Reinauer <reinauer@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
2012-11-07 00:48:44 +01:00
Stefan Reinauer
f674f7cfc0 video: Provide an API to access video parameters
Create a basic API to provide access to video parameters such as screen
size, and to position the cursor on the screen. Also add a prototype
for video_display_bitmap() which was missing.

Signed-off-by: Stefan Reinauer <reinauer@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
2012-11-06 22:57:32 +01:00
Liu Ying
945d069fb5 ipu common: reset ipuv3 correctly
This patch checks self-clear sw_ipu_rst bit in
SCR register of SRC controller to be cleared
after setting it to high to reset IPUv3. This
makes sure that IPUv3 finishes sofware reset.
A timeout mechanism is added to stop polling
on the bit status in case the bit could not be
cleared by the hardware automatically within
10 millisecond.

Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
2012-11-06 22:24:11 +01:00
Tom Rini
1cc619be8b Merge branch 'master' of git://git.denx.de/u-boot-avr32 2012-11-05 09:46:45 -07:00
Tom Rini
6acc7c3cbc Merge branch 'master' of git://git.denx.de/u-boot-arm 2012-11-05 07:42:00 -07:00
Wolfgang Denk
a6e8dcaf35 Makefile: use EXTRAVERSION for -rc? tag
When using SUBLEVEL for the -rc? tag, this results in an ugly version
string like "2013.01.-rc1" - let's use EXTRAVERSION instead to get the
simple "2013.01-rc1"

Signed-off-by: Wolfgang Denk <wd@denx.de>
Signed-off-by: Tom Rini <trini@ti.com>
2012-11-04 17:50:54 -07:00
Tom Rini
3ae7b240ad Prepare v2013.01-rc1
Signed-off-by: Tom Rini <trini@ti.com>
2012-11-04 11:44:08 -07:00
Simon Glass
619dd5de69 patman: Add additional tags to ignore
The BRANCH= tag can be used to indicate the destination branch for a
commit. Ignore this tag.

Also ignore the gerrit 'Commit-Ready:' tag.

Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-04 11:00:38 -07:00
Tom Rini
57a87a25f7 usb gadget ether: Fix warning in is_eth_addr_valid()
The gadget ethernet driver needs to keep copies of the MAC address (at
both endpoints) as strings so it needs a custom function for validation
of the MAC.  It was not however performing a totally correct check and
also was emitting a warning about a set but unused variable.  The
solution to both is that after checking the string contents we use the
standard test for a valid MAC.

Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Tom Rini <trini@ti.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2012-11-04 11:00:38 -07:00
Kim Phillips
ac63f2a2ec drivers/serial/serial_ns16550.c: sparse fixes
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2012-11-04 11:00:38 -07:00
Kim Phillips
7d2ab9ae4e drivers/mtd/nand: sparse fixes
nand_ecc.c:82:5: warning: symbol 'nand_calculate_ecc' was not declared. Should it be static?
nand_ecc.c:155:5: warning: symbol 'nand_correct_data' was not declared. Should it be static?
nand_base.c:2854:1: error: directive in argument list
nand_base.c:2856:1: error: directive in argument list

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Acked-by: Scott Wood <scottwood@freescale.com>
2012-11-04 11:00:38 -07:00
Kim Phillips
11dc401079 drivers/mtd/cfi_flash.c: sparse fixes
cfi_flash.c:756:43: warning: Using plain integer as NULL pointer
cfi_flash.c:1150:52: warning: cast to non-scalar
cfi_flash.c:1433:46: warning: cast truncates bits from constant value (890089 becomes 89)
cfi_flash.c:1490:61: warning: cast truncates bits from constant value (1f001f becomes 1f)
cfi_flash.c:1508:61: warning: cast truncates bits from constant value (10001 becomes 1)
cfi_flash.c:1738:63: warning: cast truncates bits from constant value (10001 becomes 1)
cfi_flash.c:1857:6: warning: symbol '__flash_cmd_reset' was not declared. Should it be static?

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2012-11-04 11:00:38 -07:00
Kim Phillips
eafa90a16c drivers/mmc/fsl_esdhc.c: sparse fixes
fsl_esdhc.c:71:6: warning: symbol 'esdhc_xfertyp' was not declared. Should it be static?
fsl_esdhc.c:413:6: warning: symbol 'set_sysctl' was not declared. Should it be st

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2012-11-04 11:00:37 -07:00
Kim Phillips
fdbb873eb0 drivers/mmc/mmc.c: sparse fixes
mmc.c:137:5: warning: symbol 'mmc_send_cmd' was not declared. Should it be static?
mmc.c:203:5: warning: symbol 'mmc_send_status' was not declared. Should it be static?
mmc.c:247:5: warning: symbol 'mmc_set_blocklen' was not declared. Should it be static?
mmc.c:440:5: warning: symbol 'mmc_read_blocks' was not declared. Should it be static?
mmc.c:510:5: warning: symbol 'mmc_go_idle' was not declared. Should it be static?
mmc.c:532:1: warning: symbol 'sd_send_op_cond' was not declared. Should it be static?
mmc.c:597:5: warning: symbol 'mmc_send_op_cond' was not declared. Should it be static?
mmc.c:661:5: warning: symbol 'mmc_send_ext_csd' was not declared. Should it be static?
mmc.c:683:5: warning: symbol 'mmc_switch' was not declared. Should it be static?
mmc.c:705:5: warning: symbol 'mmc_change_freq' was not declared. Should it be static?
mmc.c:775:5: warning: symbol 'sd_switch' was not declared. Should it be static?
mmc.c:796:5: warning: symbol 'sd_change_freq' was not declared. Should it be static?
mmc.c:935:6: warning: symbol 'mmc_set_ios' was not declared. Should it be static?
mmc.c:953:6: warning: symbol 'mmc_set_bus_width' was not declared. Should it be static?
mmc.c:1108:26: warning: dubious: !x & y
mmc.c:960:5: warning: symbol 'mmc_startup' was not declared. Should it be static?
mmc.c:1243:5: warning: symbol 'mmc_send_if_cond' was not declared. Should it be s

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2012-11-04 11:00:37 -07:00
Kim Phillips
c14e94e560 drivers/input/input.c: sparse fix
input.c:97:5: warning: symbol 'input_queue_ascii' was not declared. Should it be

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Acked-by: Simon Glass <sjg@chromium.org>
2012-11-04 11:00:37 -07:00
Kim Phillips
8121d3c5cc drivers/gpio/mpc83xx_gpio.c: sparse fixes
mpc83xx_gpio.c:166:26: warning: non-ANSI function declaration of function 'mpc83xx_gpio_init_f'
mpc83xx_gpio.c:190:26: warning: non-ANSI function declaration of function 'mpc83xx_gpio_init_r'

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2012-11-04 11:00:37 -07:00
Kim Phillips
00caa7f508 drivers/block/: sparse fixes
sata_sil.c:371:7: warning: symbol 'sil_sata_rw_lba28' was not declared. Should it be static?
sata_sil.c:399:7: warning: symbol 'sil_sata_rw_lba48' was not declared. Should it be static?
sata_sil.c:429:6: warning: symbol 'sil_sata_cmd_flush_cache' was not declared. Should it be static?
sata_sil.c:441:6: warning: symbol 'sil_sata_cmd_flush_cache_ext' was not declared. Should it be static?
sata_sil.c:489:7: warning: symbol 'sata_read' was not declared. Should it be static?
sata_sil.c:505:7: warning: symbol 'sata_write' was not declared. Should it be static?
sata_sil.c:526:5: warning: symbol 'init_sata' was not declared. Should it be static?
sata_sil.c:588:5: warning: symbol 'scan_sata' was not declared. Should it be static?
fsl_sata.c:59:6: warning: symbol 'dprint_buffer' was not declared. Should it be static?
fsl_sata.c:187:42: warning: incorrect type in assignment (different base types)
fsl_sata.c:187:42:    expected unsigned int [unsigned] [usertype] cda
fsl_sata.c:187:42:    got restricted __le32 [usertype] <noident>
fsl_sata.c:291:6: warning: symbol 'fsl_sata_hardware_reset' was not declared. Should it be static?
fsl_sata.c:418:27: warning: incorrect type in assignment (different base types)
fsl_sata.c:418:27:    expected unsigned int [unsigned] [usertype] dba
fsl_sata.c:418:27:    got restricted __le32 [usertype] <noident>
fsl_sata.c:424:41: warning: incorrect type in assignment (different base types)
fsl_sata.c:424:41:    expected unsigned int [unsigned] [usertype] ext_c_ddc
fsl_sata.c:424:41:    got restricted __le32 [usertype] <noident>
fsl_sata.c:431:41: warning: incorrect type in assignment (different base types)
fsl_sata.c:431:41:    expected unsigned int [unsigned] [usertype] ext_c_ddc
fsl_sata.c:431:41:    got restricted __le32 [usertype] <noident>
fsl_sata.c:442:22: warning: incorrect type in assignment (different base types)
fsl_sata.c:442:22:    expected unsigned int [unsigned] [usertype] cda
fsl_sata.c:442:22:    got restricted __le32 [usertype] <noident>
fsl_sata.c:446:31: warning: incorrect type in assignment (different base types)
fsl_sata.c:446:31:    expected unsigned int [unsigned] [usertype] prde_fis_len
fsl_sata.c:446:31:    got restricted __le32 [usertype] <noident>
fsl_sata.c:448:22: warning: incorrect type in assignment (different base types)
fsl_sata.c:448:22:    expected unsigned int [unsigned] [usertype] ttl
fsl_sata.c:448:22:    got restricted __le32 [usertype] <noident>
fsl_sata.c:460:28: warning: incorrect type in assignment (different base types)
fsl_sata.c:460:28:    expected unsigned int [unsigned] [usertype] attribute
fsl_sata.c:460:28:    got restricted __le32 [usertype] <noident>
fsl_sata.c:623:6: warning: symbol 'fsl_sata_flush_cache' was not declared. Should it be static?
fsl_sata.c:667:5: warning: symbol 'fsl_sata_rw_ncq_cmd' was not declared. Should it be static?
fsl_sata.c:710:6: warning: symbol 'fsl_sata_flush_cache_ext' was not declared. Should it be static?
fsl_sata.c:725:6: warning: symbol 'fsl_sata_software_reset' was not declared. Should it be static?
fsl_sata.c:760:5: warning: symbol 'ata_low_level_rw_lba48' was not declared. Should it be static?
fsl_sata.c:795:5: warning: symbol 'ata_low_level_rw_lba28' was not declared. Should it be static?

the following compiler warnings show up after fixing the above, so
remove those three functions:

fsl_sata.c:59:13: warning: 'dprint_buffer' defined but not used [-Wunused-function]
fsl_sata.c:291:13: warning: 'fsl_sata_hardware_reset' defined but not used [-Wunused-function]
fsl_sata.c:726:13: warning: 'fsl_sata_software_reset' defined but not used [-Wunused-function]

Other than that, the following are fixed by __iomem annotation:

fsl_sata.c:84:39: warning: incorrect type in argument 1 (different address spaces)
fsl_sata.c:84:39:    expected unsigned int const volatile [noderef] <asn:2>*addr
fsl_sata.c:84:39:    got unsigned int volatile *addr
fsl_sata.c:172:26: warning: incorrect type in argument 1 (different address spaces)
fsl_sata.c:172:26:    expected unsigned int const volatile [noderef] <asn:2>*addr
fsl_sata.c:172:26:    got unsigned int *<noident>
fsl_sata.c:175:19: warning: incorrect type in argument 1 (different address spaces)
fsl_sata.c:175:19:    expected unsigned int volatile [noderef] <asn:2>*addr
fsl_sata.c:175:19:    got unsigned int *<noident>
fsl_sata.c:181:19: warning: incorrect type in argument 1 (different address spaces)
fsl_sata.c:181:19:    expected unsigned int volatile [noderef] <asn:2>*addr
fsl_sata.c:181:19:    got unsigned int *<noident>
fsl_sata.c:184:26: warning: incorrect type in argument 1 (different address spaces)
fsl_sata.c:184:26:    expected unsigned int const volatile [noderef] <asn:2>*addr
fsl_sata.c:184:26:    got unsigned int *<noident>
fsl_sata.c:186:19: warning: incorrect type in argument 1 (different address spaces)
fsl_sata.c:186:19:    expected unsigned int volatile [noderef] <asn:2>*addr
fsl_sata.c:186:19:    got unsigned int *<noident>
fsl_sata.c:189:26: warning: incorrect type in argument 1 (different address spaces)
fsl_sata.c:189:26:    expected unsigned int const volatile [noderef] <asn:2>*addr
fsl_sata.c:189:26:    got unsigned int *<noident>
fsl_sata.c:191:19: warning: incorrect type in argument 1 (different address spaces)
fsl_sata.c:191:19:    expected unsigned int volatile [noderef] <asn:2>*addr
fsl_sata.c:191:19:    got unsigned int *<noident>
fsl_sata.c:194:26: warning: incorrect type in argument 1 (different address spaces)
fsl_sata.c:194:26:    expected unsigned int const volatile [noderef] <asn:2>*addr
fsl_sata.c:194:26:    got unsigned int *<noident>
fsl_sata.c:195:19: warning: incorrect type in argument 1 (different address spaces)
fsl_sata.c:195:19:    expected unsigned int volatile [noderef] <asn:2>*addr
fsl_sata.c:195:19:    got unsigned int *<noident>
fsl_sata.c:198:19: warning: incorrect type in argument 1 (different address spaces)
fsl_sata.c:198:19:    expected unsigned int volatile [noderef] <asn:2>*addr
fsl_sata.c:198:19:    got unsigned int *<noident>
fsl_sata.c:201:19: warning: incorrect type in argument 1 (different address spaces)
fsl_sata.c:201:19:    expected unsigned int volatile [noderef] <asn:2>*addr
fsl_sata.c:201:19:    got unsigned int *<noident>
fsl_sata.c:204:26: warning: incorrect type in argument 1 (different address spaces)
fsl_sata.c:204:26:    expected unsigned int const volatile [noderef] <asn:2>*addr
fsl_sata.c:204:26:    got unsigned int *<noident>
fsl_sata.c:205:19: warning: incorrect type in argument 1 (different address spaces)
fsl_sata.c:205:19:    expected unsigned int volatile [noderef] <asn:2>*addr
fsl_sata.c:205:19:    got unsigned int *<noident>
fsl_sata.c:208:26: warning: incorrect type in argument 1 (different address spaces)
fsl_sata.c:208:26:    expected unsigned int const volatile [noderef] <asn:2>*addr
fsl_sata.c:208:26:    got unsigned int *<noident>
fsl_sata.c:209:19: warning: incorrect type in argument 1 (different address spaces)
fsl_sata.c:209:19:    expected unsigned int volatile [noderef] <asn:2>*addr
fsl_sata.c:209:19:    got unsigned int *<noident>
fsl_sata.c:212:26: warning: incorrect type in argument 1 (different address spaces)
fsl_sata.c:212:26:    expected unsigned int const volatile [noderef] <asn:2>*addr
fsl_sata.c:212:26:    got unsigned int *<noident>
fsl_sata.c:213:19: warning: incorrect type in argument 1 (different address spaces)
fsl_sata.c:213:19:    expected unsigned int volatile [noderef] <asn:2>*addr
fsl_sata.c:213:19:    got unsigned int *<noident>
fsl_sata.c:216:19: warning: incorrect type in argument 1 (different address spaces)
fsl_sata.c:216:19:    expected unsigned int volatile [noderef] <asn:2>*addr
fsl_sata.c:216:19:    got unsigned int *<noident>
fsl_sata.c:219:19: warning: incorrect type in argument 1 (different address spaces)
fsl_sata.c:219:19:    expected unsigned int volatile [noderef] <asn:2>*addr
fsl_sata.c:219:19:    got unsigned int *<noident>
fsl_sata.c:222:19: warning: incorrect type in argument 1 (different address spaces)
fsl_sata.c:222:19:    expected unsigned int volatile [noderef] <asn:2>*addr
fsl_sata.c:222:19:    got unsigned int *<noident>
fsl_sata.c:225:26: warning: incorrect type in argument 1 (different address spaces)
fsl_sata.c:225:26:    expected unsigned int const volatile [noderef] <asn:2>*addr
fsl_sata.c:225:26:    got unsigned int *<noident>
fsl_sata.c:227:19: warning: incorrect type in argument 1 (different address spaces)
fsl_sata.c:227:19:    expected unsigned int volatile [noderef] <asn:2>*addr
fsl_sata.c:227:19:    got unsigned int *<noident>
fsl_sata.c:242:26: warning: incorrect type in argument 1 (different address spaces)
fsl_sata.c:242:26:    expected unsigned int const volatile [noderef] <asn:2>*addr
fsl_sata.c:242:26:    got unsigned int *<noident>
fsl_sata.c:256:32: warning: incorrect type in argument 1 (different address spaces)
fsl_sata.c:256:32:    expected unsigned int const volatile [noderef] <asn:2>*addr
fsl_sata.c:256:32:    got unsigned int *<noident>
fsl_sata.c:262:26: warning: incorrect type in argument 1 (different address spaces)
fsl_sata.c:262:26:    expected unsigned int const volatile [noderef] <asn:2>*addr
fsl_sata.c:262:26:    got unsigned int *<noident>
fsl_sata.c:274:53: warning: incorrect type in argument 1 (different address spaces)
fsl_sata.c:274:53:    expected unsigned int const volatile [noderef] <asn:2>*addr
fsl_sata.c:274:53:    got unsigned int *<noident>
fsl_sata.c:275:53: warning: incorrect type in argument 1 (different address spaces)
fsl_sata.c:275:53:    expected unsigned int const volatile [noderef] <asn:2>*addr
fsl_sata.c:275:53:    got unsigned int *<noident>
fsl_sata.c:276:53: warning: incorrect type in argument 1 (different address spaces)
fsl_sata.c:276:53:    expected unsigned int const volatile [noderef] <asn:2>*addr
fsl_sata.c:276:53:    got unsigned int *<noident>
fsl_sata.c:277:53: warning: incorrect type in argument 1 (different address spaces)
fsl_sata.c:277:53:    expected unsigned int const volatile [noderef] <asn:2>*addr
fsl_sata.c:277:53:    got unsigned int *<noident>
fsl_sata.c:278:53: warning: incorrect type in argument 1 (different address spaces)
fsl_sata.c:278:53:    expected unsigned int const volatile [noderef] <asn:2>*addr
fsl_sata.c:278:53:    got unsigned int *<noident>
fsl_sata.c:279:53: warning: incorrect type in argument 1 (different address spaces)
fsl_sata.c:279:53:    expected unsigned int const volatile [noderef] <asn:2>*addr
fsl_sata.c:279:53:    got unsigned int *<noident>
fsl_sata.c:280:53: warning: incorrect type in argument 1 (different address spaces)
fsl_sata.c:280:53:    expected unsigned int const volatile [noderef] <asn:2>*addr
fsl_sata.c:280:53:    got unsigned int *<noident>
fsl_sata.c:281:53: warning: incorrect type in argument 1 (different address spaces)
fsl_sata.c:281:53:    expected unsigned int const volatile [noderef] <asn:2>*addr
fsl_sata.c:281:53:    got unsigned int *<noident>
fsl_sata.c:282:53: warning: incorrect type in argument 1 (different address spaces)
fsl_sata.c:282:53:    expected unsigned int const volatile [noderef] <asn:2>*addr
fsl_sata.c:282:53:    got unsigned int *<noident>
fsl_sata.c:283:53: warning: incorrect type in argument 1 (different address spaces)
fsl_sata.c:283:53:    expected unsigned int const volatile [noderef] <asn:2>*addr
fsl_sata.c:283:53:    got unsigned int *<noident>
fsl_sata.c:284:53: warning: incorrect type in argument 1 (different address spaces)
fsl_sata.c:284:53:    expected unsigned int const volatile [noderef] <asn:2>*addr
fsl_sata.c:284:53:    got unsigned int *<noident>
fsl_sata.c:285:53: warning: incorrect type in argument 1 (different address spaces)
fsl_sata.c:285:53:    expected unsigned int const volatile [noderef] <asn:2>*addr
fsl_sata.c:285:53:    got unsigned int *<noident>
fsl_sata.c:286:53: warning: incorrect type in argument 1 (different address spaces)
fsl_sata.c:286:53:    expected unsigned int const volatile [noderef] <asn:2>*addr
fsl_sata.c:286:53:    got unsigned int *<noident>
fsl_sata.c:287:53: warning: incorrect type in argument 1 (different address spaces)
fsl_sata.c:287:53:    expected unsigned int const volatile [noderef] <asn:2>*addr
fsl_sata.c:287:53:    got unsigned int *<noident>
fsl_sata.c:288:53: warning: incorrect type in argument 1 (different address spaces)
fsl_sata.c:288:53:    expected unsigned int const volatile [noderef] <asn:2>*addr
fsl_sata.c:288:53:    got unsigned int *<noident>
fsl_sata.c:289:53: warning: incorrect type in argument 1 (different address spaces)
fsl_sata.c:289:53:    expected unsigned int const volatile [noderef] <asn:2>*addr
fsl_sata.c:289:53:    got unsigned int *<noident>
fsl_sata.c:290:53: warning: incorrect type in argument 1 (different address spaces)
fsl_sata.c:290:53:    expected unsigned int const volatile [noderef] <asn:2>*addr
fsl_sata.c:290:53:    got unsigned int *<noident>
fsl_sata.c:291:53: warning: incorrect type in argument 1 (different address spaces)
fsl_sata.c:291:53:    expected unsigned int const volatile [noderef] <asn:2>*addr
fsl_sata.c:291:53:    got unsigned int *<noident>
fsl_sata.c:292:53: warning: incorrect type in argument 1 (different address spaces)
fsl_sata.c:292:53:    expected unsigned int const volatile [noderef] <asn:2>*addr
fsl_sata.c:292:53:    got unsigned int *<noident>
fsl_sata.c:293:53: warning: incorrect type in argument 1 (different address spaces)
fsl_sata.c:293:53:    expected unsigned int const volatile [noderef] <asn:2>*addr
fsl_sata.c:293:53:    got unsigned int *<noident>
fsl_sata.c:294:53: warning: incorrect type in argument 1 (different address spaces)
fsl_sata.c:294:53:    expected unsigned int const volatile [noderef] <asn:2>*addr
fsl_sata.c:294:53:    got unsigned int *<noident>
fsl_sata.c:295:53: warning: incorrect type in argument 1 (different address spaces)
fsl_sata.c:295:53:    expected unsigned int const volatile [noderef] <asn:2>*addr
fsl_sata.c:295:53:    got unsigned int *<noident>
fsl_sata.c:296:53: warning: incorrect type in argument 1 (different address spaces)
fsl_sata.c:296:53:    expected unsigned int const volatile [noderef] <asn:2>*addr
fsl_sata.c:296:53:    got unsigned int *<noident>
fsl_sata.c:297:53: warning: incorrect type in argument 1 (different address spaces)
fsl_sata.c:297:53:    expected unsigned int const volatile [noderef] <asn:2>*addr
fsl_sata.c:297:53:    got unsigned int *<noident>
fsl_sata.c:298:53: warning: incorrect type in argument 1 (different address spaces)
fsl_sata.c:298:53:    expected unsigned int const volatile [noderef] <asn:2>*addr
fsl_sata.c:298:53:    got unsigned int *<noident>

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2012-11-04 11:00:37 -07:00
Kim Phillips
a2873bde4c powerpc/mpc83xx: sparse fixes
fdt.c:91:78: warning: Using plain integer as NULL pointer
fdt.c:103:78: warning: Using plain integer as NULL pointer
speed.c:55:11: warning: symbol 'corecnf_tab' was not declared. Should it be static?
speed.c:519:5: warning: symbol 'do_clocks' was not declared. Should it be static?
mpc8313erdb.c:73:17: warning: obsolete struct initializer, use C99 syntax
mpc8313erdb.c:74:17: warning: obsolete struct initializer, use C99 syntax
mpc8313erdb.c:75:17: warning: obsolete struct initializer, use C99 syntax
mpc8313erdb.c:76:17: warning: obsolete struct initializer, use C99 syntax
mpc8313erdb.c:79:17: warning: obsolete struct initializer, use C99 syntax
mpc8313erdb.c:80:17: warning: obsolete struct initializer, use C99 syntax
mpc8313erdb.c:81:17: warning: obsolete struct initializer, use C99 syntax
mpc8313erdb.c:82:17: warning: obsolete struct initializer, use C99 syntax
mpc8313erdb.c:85:17: warning: obsolete struct initializer, use C99 syntax
mpc8313erdb.c:86:17: warning: obsolete struct initializer, use C99 syntax
mpc8313erdb.c:87:17: warning: obsolete struct initializer, use C99 syntax
mpc8313erdb.c:88:17: warning: obsolete struct initializer, use C99 syntax

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2012-11-04 11:00:37 -07:00
Kim Phillips
e56143e54f powerpc/mpc85xx: sparse fixes
fsl_corenet_serdes.c:485:6: warning: symbol '__soc_serdes_init' was not declared. Should it be static?
cpu_init.c:185:6: warning: symbol 'invalidate_cpc' was not declared. Should it be static?
bcsr.c:28:27: warning: non-ANSI function declaration of function 'enable_8568mds_duart'
bcsr.c:39:33: warning: non-ANSI function declaration of function 'enable_8568mds_flash_write'
bcsr.c:46:34: warning: non-ANSI function declaration of function 'disable_8568mds_flash_write'
bcsr.c:53:29: warning: non-ANSI function declaration of function 'enable_8568mds_qe_mdio'
bcsr.c:28:33: warning: non-ANSI function declaration of function 'enable_8569mds_flash_write'
bcsr.c:33:34: warning: non-ANSI function declaration of function 'disable_8569mds_flash_write'
bcsr.c:38:28: warning: non-ANSI function declaration of function 'enable_8569mds_qe_uec'
bcsr.c:63:47: warning: non-ANSI function declaration of function 'disable_8569mds_brd_eeprom_write_protect'
ngpixis.c:245:1: error: directive in argument list
ngpixis.c:247:1: error: directive in argument list

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2012-11-04 11:00:36 -07:00
Kim Phillips
2ed2e9121f arch/powerpc/cpu/mpc8xxx/: sparse fixes
ctrl_regs.c:31:5: warning: symbol 'fsl_ddr_get_version' was not declared. Should it be static?
cpu.c:135:14: warning: non-ANSI function declaration of function 'cpu_mask'
cpu.c:154:18: warning: non-ANSI function declaration of function 'cpu_numcores'
cpu.c:37:17: warning: symbol 'cpu_type_list' was not declared. Should it be static?
cpu.c:117:17: warning: symbol 'cpu_type_unknown' was not declared. Should it be static?
fsl_lbc.c:14:6: warning: symbol '__lbc_sdram_init' was not declared. Should it be static?

and:

lc_common_dimm_params.c:15:1: warning: symbol 'compute_cas_latency_ddr3' was not declared. Should it be static?

making it static produces the following compiler warning:

lc_common_dimm_params.c:15:1: warning: 'compute_cas_latency_ddr3' defined but not used [-Wunused-function]

so we protect it with the preprocessor.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2012-11-04 11:00:36 -07:00
Kim Phillips
0eb257683d lib/vsprintf.c: sparse fixes
vsprintf.c:31:12: warning: symbol 'hex_asc' was not declared. Should it be static?
vsprintf.c:398:18: warning: Using plain integer as NULL pointer

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2012-11-04 11:00:36 -07:00
Kim Phillips
ee820b5e5b lib/zlib: sparse fixes
define Z_NULL to (void *)0 include/u-boot/zlib.h to get rid of most of
the NULL pointer warnings.

inflate.c:942:1: warning: non-ANSI definition of function 'inflateEnd'
inflate.c:9:1: warning: non-ANSI definition of function 'inflateReset'
inflate.c:12:17: warning: Using plain integer as NULL pointer
inflate.c:12:42: warning: Using plain integer as NULL pointer
inflate.c:15:17: warning: Using plain integer as NULL pointer
inflate.c:21:19: warning: Using plain integer as NULL pointer
inflate.c:35:1: warning: non-ANSI definition of function 'inflateInit2_'
inflate.c:38:20: warning: Using plain integer as NULL pointer
inflate.c:41:17: warning: Using plain integer as NULL pointer
inflate.c:42:17: warning: Using plain integer as NULL pointer
inflate.c:50:18: warning: Using plain integer as NULL pointer
inflate.c:65:23: warning: Using plain integer as NULL pointer
inflate.c:69:21: warning: Using plain integer as NULL pointer
inflate.c:78:1: warning: non-ANSI definition of function 'inflateInit_'
inflate.c:86:1: warning: non-ANSI definition of function 'fixedtables'
inflate.c:108:26: warning: Using plain integer as NULL pointer
inflate.c:109:1: warning: non-ANSI definition of function 'updatewindow'
inflate.c:112:30: warning: Using plain integer as NULL pointer
inflate.c:339:1: warning: non-ANSI definition of function 'inflate'
inflate.c:349:17: warning: Using plain integer as NULL pointer
inflate.c:349:42: warning: Using plain integer as NULL pointer
inflate.c:350:27: warning: Using plain integer as NULL pointer
inflate.c:369:42: warning: Using plain integer as NULL pointer
inflate.c:376:32: warning: Using plain integer as NULL pointer
inflate.c:401:54: warning: Using plain integer as NULL pointer
inflate.c:419:32: warning: Using plain integer as NULL pointer
inflate.c:426:32: warning: Using plain integer as NULL pointer
inflate.c:433:32: warning: Using plain integer as NULL pointer
inflate.c:444:36: warning: Using plain integer as NULL pointer
inflate.c:449:37: warning: Using plain integer as NULL pointer
inflate.c:450:38: warning: Using plain integer as NULL pointer
inflate.c:457:40: warning: Using plain integer as NULL pointer
inflate.c:458:47: warning: Using plain integer as NULL pointer
inflate.c:480:40: warning: Using plain integer as NULL pointer
inflate.c:481:50: warning: Using plain integer as NULL pointer
inflate.c:491:37: warning: Using plain integer as NULL pointer
inflate.c:492:37: warning: Using plain integer as NULL pointer
inflate.c:501:40: warning: Using plain integer as NULL pointer
inflate.c:502:53: warning: Using plain integer as NULL pointer
inflate.c:512:37: warning: Using plain integer as NULL pointer
inflate.c:513:40: warning: Using plain integer as NULL pointer
inflate.c:525:32: warning: Using plain integer as NULL pointer
inflate.c:529:52: warning: Using plain integer as NULL pointer
inflate.c:543:54: warning: Using plain integer as NULL pointer
inflate.c:932:17: warning: Using plain integer as NULL pointer
inflate.c:932:42: warning: Using plain integer as NULL pointer
inflate.c:935:26: warning: Using plain integer as NULL pointer
inflate.c:940:19: warning: Using plain integer as NULL pointer
adler32.c:58:5: warning: non-ANSI definition of function 'adler32'
adler32.c:81:16: warning: Using plain integer as NULL pointer
zutil.c:53:9: warning: non-ANSI definition of function 'zcalloc'
zutil.c:64:9: warning: non-ANSI definition of function 'zcfree'
inffast.c:70:1: warning: non-ANSI definition of function 'inflate_fast'
inftrees.c:33:1: warning: non-ANSI definition of function 'inflate_table'

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2012-11-04 11:00:36 -07:00
Kim Phillips
960d70c600 drivers/net/: sparse fixes
phy.c:46:5: warning: symbol 'genphy_config_advert' was not declared. Should it be static?
phy.c:121:5: warning: symbol 'genphy_setup_forced' was not declared. Should it be static?
phy.c:468:5: warning: symbol 'phy_probe' was not declared. Should it be static?
phy.c:491:19: warning: symbol 'get_phy_driver' was not declared. Should it be static?
phy.c:508:19: warning: symbol 'phy_device_create' was not declared. Should it be static?
phy.c:552:5: warning: symbol 'get_phy_id' was not declared. Should it be static?
phy.c:584:19: warning: symbol 'get_phy_device' was not declared. Should it be sta
vitesse.c:126:5: warning: symbol 'vsc8601_config' was not declared. Should it be static?
vsc7385.c:33:5: warning: symbol 'vsc7385_upload_firmware' was not declared. Should it be static?
tgec_phy.c:33:5: warning: symbol 'tgec_mdio_write' was not declared. Should it be static?
tgec_phy.c:75:5: warning: symbol 'tgec_mdio_read' was not declared. Should it be static?
tgec_phy.c:117:5: warning: symbol 'tgec_mdio_reset' was not declared. Should it be static?
eth.c:48:6: warning: symbol 'dtsec_configure_serdes' was not declared. Should it be static?
p4080.c:26:5: warning: symbol 'port_to_devdisr' was not declared. Should it be static?

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2012-11-04 11:00:36 -07:00
Kim Phillips
0637059088 net/: sparse fixes
bootp.c:44:14: warning: symbol 'dhcp_state' was not declared. Should it be static?
bootp.c:45:15: warning: symbol 'dhcp_leasetime' was not declared. Should it be static?
bootp.c:46:10: warning: symbol 'NetDHCPServerIP' was not declared. Should it be static?
arp.c:30:17: warning: symbol 'NetArpWaitReplyIP' was not declared. Should it be static?
arp.c:37:16: warning: symbol 'NetArpTxPacket' was not declared. Should it be static?
arp.c:38:17: warning: symbol 'NetArpPacketBuf' was not declared. Should it be static?
atheros.c:33:19: warning: symbol 'AR8021_driver' was not declared. Should it be static?
net.c:183:7: warning: symbol 'PktBuf' was not declared. Should it be static?
net.c:159:21: warning: symbol 'net_state' was not declared. Should it be static?
ping.c:73:6: warning: symbol 'ping_start' was not declared. Should it be static?
ping.c:82:13: warning: symbol 'ping_receive' was not declared. Should it be static?
tftp.c:53:7: warning: symbol 'TftpRRQTimeoutMSecs' was not declared. Should it be static?
tftp.c:54:5: warning: symbol 'TftpRRQTimeoutCountMax' was not declared. Should it be static?
eth.c:125:19: warning: symbol 'eth_current' was not declared. Should it be static?

Note: in the ping.c fix, commit a36b12f95a
"net: Move PING out of net.c" mistakenly carried the ifdef CMD_PING
clause from when it was necessary to avoid warnings when it was embedded
in net.c.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2012-11-04 11:00:36 -07:00
Kim Phillips
199adb601f common/misc: sparse fixes
command.c:44:38: error: bad constant expression
dlmalloc.c:1468:2: warning: Using plain integer as NULL pointer
dlmalloc.c:1468:5: warning: Using plain integer as NULL pointer
dlmalloc.c:2176:12: warning: Using plain integer as NULL pointer
dlmalloc.c:2179:31: warning: Using plain integer as NULL pointer
dlmalloc.c:2382:14: warning: Using plain integer as NULL pointer
dlmalloc.c:2436:14: warning: Using plain integer as NULL pointer
dlmalloc.c:2582:31: warning: Using plain integer as NULL pointer
dlmalloc.c:2585:17: warning: Using plain integer as NULL pointer
dlmalloc.c:2646:14: warning: Using plain integer as NULL pointer
dlmalloc.c:2659:19: warning: Using plain integer as NULL pointer
dlmalloc.c:2692:19: warning: Using plain integer as NULL pointer
dlmalloc.c:2707:19: warning: Using plain integer as NULL pointer
dlmalloc.c:2708:14: warning: Using plain integer as NULL pointer
dlmalloc.c:2786:31: warning: Using plain integer as NULL pointer
dlmalloc.c:2801:12: warning: Using plain integer as NULL pointer
dlmalloc.c:2801:22: warning: Using plain integer as NULL pointer
dlmalloc.c:2926:27: warning: Using plain integer as NULL pointer
dlmalloc.c:2928:14: warning: Using plain integer as NULL pointer
dlmalloc.c:2929:12: warning: Using plain integer as NULL pointer
dlmalloc.c:3075:14: warning: Using plain integer as NULL pointer
hush.c:292:14: warning: symbol 'last_return_code' was not declared. Should it be static?
hush.c:293:5: warning: symbol 'nesting_level' was not declared. Should it be static?
hush.c:2175:20: warning: Using plain integer as NULL pointer
hush.c:2175:34: warning: Using plain integer as NULL pointer
hush.c:2210:41: warning: Using plain integer as NULL pointer
hush.c:2216:45: warning: Using plain integer as NULL pointer
hush.c:2249:25: warning: Using plain integer as NULL pointer
hush.c:2332:13: warning: symbol 'new_pipe' was not declared. Should it be static?
hush.c:2390:5: warning: symbol 'reserved_word' was not declared. Should it be static?
hush.c:2927:5: warning: symbol 'parse_stream' was not declared. Should it be static?
hush.c:3127:6: warning: symbol 'mapset' was not declared. Should it be static?
hush.c:3133:6: warning: symbol 'update_ifs_map' was not declared. Should it be static?
hush.c:3161:5: warning: symbol 'parse_stream_outer' was not declared. Should it be static?
hush.c:3295:34: warning: Using plain integer as NULL pointer
hush.c:3631:5: warning: symbol 'do_showvar' was not declared. Should it be static
image.c:1282:29: warning: Using plain integer as NULL pointer
image.c:1315:41: warning: Using plain integer as NULL pointer
image.c:1330:25: warning: Using plain integer as NULL pointer
image.c:1706:25: warning: Using plain integer as NULL pointer
main.c:510:10: warning: symbol 'hist_num' was not declared. Should it be static?
main.c:512:5: warning: symbol 'hist_list' was not declared. Should it be static?
main.c:513:6: warning: symbol 'hist_lines' was not declared. Should it be static?
usb_storage.c:195:6: warning: symbol 'usb_show_progress' was not declared. Should it be static?
usb_storage.c:440:48: warning: Using plain integer as NULL pointer
usb_storage.c:503:5: warning: symbol 'usb_stor_BBB_comdat' was not declared. Should it be static?
usb_storage.c:551:5: warning: symbol 'usb_stor_CB_comdat' was not declared. Should it be static?
usb_storage.c:629:55: warning: Using plain integer as NULL pointer
usb_storage.c:620:5: warning: symbol 'usb_stor_CBI_get_status' was not declared. Should it be static?
usb_storage.c:675:43: warning: Using plain integer as NULL pointer
usb_storage.c:668:5: warning: symbol 'usb_stor_BBB_clear_endpt_stall' was not declared. Should it be static?
usb_storage.c:679:5: warning: symbol 'usb_stor_BBB_transport' was not declared. Should it be static?
usb_storage.c:801:5: warning: symbol 'usb_stor_CB_transport' was not declared. Sh
xyzModem.c:104:1: warning: symbol 'CYGACC_COMM_IF_GETC_TIMEOUT' was not declared. Should it be static?
xyzModem.c:122:1: warning: symbol 'CYGACC_COMM_IF_PUTC' was not declared. Should it be static?
xyzModem.c:169:1: warning: symbol 'parse_num' was not declared. Should it be stat

note: hush.c's nesting_level deleted because not used.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2012-11-04 11:00:35 -07:00
Kim Phillips
088f1b1991 common/cmd_*.c: sparse fixes
cmd_boot.c:40:5: warning: symbol 'do_go' was not declared. Should it be static?
cmd_bootm.c:164:6: warning: symbol '__arch_preboot_os' was not declared. Should it be static?
cmd_bootm.c:477:5: warning: symbol 'do_bootm_subcommand' was not declared. Should it be static?
cmd_bootm.c:1022:1: error: directive in argument list
cmd_bootm.c:1028:1: error: directive in argument list
cmd_bootm.c:1029:1: error: directive in argument list
cmd_bootm.c:1036:1: error: directive in argument list
cmd_bootm.c:1042:1: error: directive in argument list
cmd_bootm.c:1044:1: error: directive in argument list
cmd_bootm.c:1045:1: error: directive in argument list
cmd_bootm.c:1047:1: error: directive in argument list
cmd_bootm.c:1089:5: warning: symbol 'do_iminfo' was not declared. Should it be static?
cmd_bootm.c:1176:5: warning: symbol 'do_imls' was not declared. Should it be static?
cmd_bootm.c:1654:1: error: directive in argument list
cmd_bootm.c:1660:1: error: directive in argument list
cmd_console.c:32:5: warning: symbol 'do_coninfo' was not declared. Should it be s
cmd_date.c:46:5: warning: symbol 'do_date' was not declared. Should it be static?
cmd_echo.c:27:5: warning: symbol 'do_echo' was not declared. Should it be static?
cmd_exit.c:27:5: warning: symbol 'do_exit' was not declared. Should it be static?
cmd_fat.c:97:5: warning: symbol 'do_fat_ls' was not declared. Should it be static?
cmd_fat.c:136:5: warning: symbol 'do_fat_fsinfo' was not declared. Should it be s
cmd_fdt.c:66:5: warning: symbol 'do_fdt' was not declared. Should it be static?
cmd_fdt.c:542:43: warning: incorrect type in assignment (different base types)
cmd_fdt.c:542:43:    expected unsigned int [unsigned] [usertype] <noident>
cmd_fdt.c:542:43:    got restricted __be32 [usertype] <noident>
cmd_fdt.c:679:42: warning: cast to restricted __be32
cmd_fdt.c:820:1: error: directive in argument list
cmd_fdt.c:822:1: error: directive in argument list
cmd_flash.c:292:5: warning: symbol 'do_flinfo' was not declared. Should it be static?
cmd_flash.c:324:5: warning: symbol 'do_flerase' was not declared. Should it be static?
cmd_flash.c:457:5: warning: symbol 'do_protect' was not declared. Should it be st
cmd_help.c:27:5: warning: symbol 'do_help' was not declared. Should it be static?
cmd_i2c.c:136:6: warning: symbol '__def_i2c_init_board' was not declared. Should it be static?
cmd_i2c.c:144:14: warning: symbol '__def_i2c_get_bus_speed' was not declared. Should it be static?
cmd_i2c.c:151:5: warning: symbol '__def_i2c_set_bus_speed' was not declared. Should it be static?
cmd_i2c.c:1322:1: error: directive in argument list
cmd_i2c.c:1324:1: error: directive in argument list
cmd_i2c.c:1326:1: error: directive in argument list
cmd_i2c.c:1328:1: error: directive in argument list
cmd_i2c.c:1337:1: error: directive in argument list
cmd_i2c.c:1339:1: error: directive in argument list
cmd_irq.c:27:5: warning: symbol 'do_interrupts' was not declared. Should it be static?
cmd_itest.c:133:5: warning: symbol 'binary_test' was not declared. Should it be static?
cmd_itest.c:158:5: warning: symbol 'do_itest' was not declared. Should it be stat
cmd_load.c:54:5: warning: symbol 'do_load_serial' was not declared. Should it be static?
cmd_load.c:431:6: warning: symbol 'his_eol' was not declared. Should it be static?
cmd_load.c:432:6: warning: symbol 'his_pad_count' was not declared. Should it be static?
cmd_load.c:433:6: warning: symbol 'his_pad_char' was not declared. Should it be static?
cmd_load.c:434:6: warning: symbol 'his_quote' was not declared. Should it be static?
cmd_load.c:436:5: warning: symbol 'do_load_serial_bin' was not declared. Should it be static?
cmd_load.c:549:6: warning: symbol 'send_pad' was not declared. Should it be static?
cmd_load.c:558:6: warning: symbol 'ktrans' was not declared. Should it be static?
cmd_load.c:568:5: warning: symbol 'chk1' was not declared. Should it be static?
cmd_load.c:578:6: warning: symbol 's1_sendpacket' was not declared. Should it be static?
cmd_load.c:587:6: warning: symbol 'send_ack' was not declared. Should it be static?
cmd_load.c:600:6: warning: symbol 'send_nack' was not declared. Should it be static?
cmd_load.c:614:6: warning: symbol 'os_data_init' was not declared. Should it be static?
cmd_load.c:615:6: warning: symbol 'os_data_char' was not declared. Should it be static?
cmd_load.c:657:6: warning: symbol 'k_data_init' was not declared. Should it be static?
cmd_load.c:663:6: warning: symbol 'k_data_save' was not declared. Should it be static?
cmd_load.c:669:6: warning: symbol 'k_data_restore' was not declared. Should it be static?
cmd_load.c:675:6: warning: symbol 'k_data_char' was not declared. Should it be static?
cmd_load.c:693:6: warning: symbol 'send_parms' was not declared. Should it be static?
cmd_load.c:694:6: warning: symbol 'send_ptr' was not declared. Should it be static?
cmd_load.c:698:6: warning: symbol 'handle_send_packet' was not declared. Should i
cmd_mdio.c:60:5: warning: symbol 'mdio_write_ranges' was not declared. Should it be static?
cmd_mdio.c:82:5: warning: symbol 'mdio_read_ranges' was not declared. Should it be static?
cmd_mdio.c:115:5: warning: symbol 'extract_reg_range' was not declared. Should it be static?
cmd_mdio.c:144:5: warning: symbol 'extract_phy_range' was not declared. Should it
cmd_mem.c:54:5: warning: symbol 'do_mem_md' was not declared. Should it be static?
cmd_mem.c:150:5: warning: symbol 'do_mem_mm' was not declared. Should it be static?
cmd_mem.c:154:5: warning: symbol 'do_mem_nm' was not declared. Should it be static?
cmd_mem.c:159:5: warning: symbol 'do_mem_mw' was not declared. Should it be static?
cmd_mem.c:256:5: warning: symbol 'do_mem_cmp' was not declared. Should it be static?
cmd_mem.c:326:5: warning: symbol 'do_mem_cp' was not declared. Should it be static?
cmd_mem.c:436:5: warning: symbol 'do_mem_base' was not declared. Should it be static?
cmd_mem.c:449:5: warning: symbol 'do_mem_loop' was not declared. Should it be static?
cmd_mem.c:595:5: warning: symbol 'do_mem_mtest' was not declared. Should it be static?
cmd_mem.c:618:26: warning: Using plain integer as NULL pointer
cmd_mem.c:1057:5: warning: symbol 'do_mem_crc' was not declared. Should it be static?
cmd_misc.c:30:5: warning: symbol 'do_sleep' was not declared. Should it be static
cmd_mmc.c:118:5: warning: symbol 'do_mmcinfo' was not declared. Should it be static?
cmd_mmc.c:272:32: warning: Using plain integer as NULL pointer
cmd_mmc.c:150:5: warning: symbol 'do_mmcops' was not declared. Should it be stati
cmd_mp.c:27:1: warning: symbol 'cpu_cmd' was not declared. Should it be static?
cmd_mp.c:85:1: error: directive in argument list
cmd_mp.c:88:1: error: directive in argument list
cmd_mtdparts.c:150:18: warning: symbol 'mtdids' was not declared. Should it be static?
cmd_mtdparts.c:153:18: warning: symbol 'devices' was not declared. Should it be static?
cmd_mtdparts.c:713:5: warning: symbol 'mtd_device_validate' was not declared. Should it be static?
cmd_mtdparts.c:1887:5: warning: symbol 'do_chpart' was not declared. Should it be static?
cmd_mtdparts.c:1925:5: warning: symbol 'do_mtdparts' was not declared. Should it be static?
cmd_mtdparts.c:2060:1: error: directive in argument list
cmd_mtdparts.c:2063:1: error: directive in argument list
cmd_mtdparts.c:2066:1: error: directive in argument list
cmd_mtdparts.c:2071:1: error: directive in argument list
cmd_mtdparts.c:2073:1: error: directive in argument list
cmd_nand.c:377:18: error: bad constant expression
cmd_nand.c:431:5: warning: symbol 'do_nand' was not declared. Should it be static?
cmd_nand.c:796:1: error: directive in argument list
cmd_nand.c:801:1: error: directive in argument list
cmd_nand.c:802:1: error: directive in argument list
cmd_nand.c:806:1: error: directive in argument list
cmd_nand.c:819:1: error: directive in argument list
cmd_nand.c:824:1: error: directive in argument list
cmd_nand.c:825:1: error: directive in argument list
cmd_nand.c:831:1: error: directive in argument list
cmd_nand.c:918:5: warning: symbol 'do_nandboot' was not declared. Should it be static?
cmd_net.c:33:5: warning: symbol 'do_bootp' was not declared. Should it be static?
cmd_net.c:107:5: warning: symbol 'do_dhcp' was not declared. Should it be static?
cmd_net.c:120:5: warning: symbol 'do_nfs' was not declared. Should it be static?
cmd_nvedit.c:138:5: warning: symbol 'do_env_print' was not declared. Should it be static?
cmd_nvedit.c:323:5: warning: symbol '_do_env_set' was not declared. Should it be static?
cmd_nvedit.c:435:5: warning: symbol 'do_env_set' was not declared. Should it be static?
cmd_nvedit.c:514:5: warning: symbol 'do_env_edit' was not declared. Should it be static?
cmd_nvedit.c:620:5: warning: symbol 'do_env_save' was not declared. Should it be static?
cmd_nvedit.c:1016:1: error: directive in argument list
cmd_nvedit.c:1018:1: error: directive in argument list
cmd_nvedit.c:1021:1: error: directive in argument list
cmd_nvedit.c:1023:1: error: directive in argument list
cmd_nvedit.c:1024:1: error: directive in argument list
cmd_nvedit.c:1026:1: error: directive in argument list
cmd_nvedit.c:1027:1: error: directive in argument list
cmd_nvedit.c:1029:1: error: directive in argument list
cmd_nvedit.c:1030:1: error: directive in argument list
cmd_nvedit.c:1032:1: error: directive in argument list
cmd_nvedit.c:1034:1: error: directive in argument list
cmd_nvedit.c:1036:1: error: directive in argument list
cmd_nvedit.c:1037:1: error: directive in argument list
cmd_nvedit.c:1039:1: error: directive in argument list
cmd_pci.c:38:17: warning: symbol 'ShortPCIListing' was not declared. Should it be static?
cmd_pci.c:38:22: warning: 'ShortPCIListing' defined but not used [-Wunused-variable]
cmd_pci.c:411:5: warning: symbol 'do_pci' was not declared. Should it be static?
cmd_pci.c:494:1: error: directive in argument list
cmd_pci.c:497:1: error: directive in argument list
cmd_reginfo.c:40:5: warning: symbol 'do_reginfo' was not declared. Should it be static?
cmd_sata.c:31:5: warning: symbol 'sata_curr_device' was not declared. Should it be static?
 note -> ata_piix.c doesn't seem to use 'sata_curr_device'; deleted.
cmd_sata.c:32:18: warning: symbol 'sata_dev_desc' was not declared. Should it be static?
cmd_sata.c:70:5: warning: symbol 'do_sata' was not declared. Should it be static?
cmd_setexpr.c:53:5: warning: symbol 'do_setexpr' was not declared. Should it be static?
cmd_source.c:186:1: error: directive in argument list
cmd_source.c:190:1: error: directive in argument list
cmd_test.c:27:5: warning: symbol 'do_test' was not declared. Should it be static?
cmd_test.c:153:5: warning: symbol 'do_false' was not declared. Should it be static?
cmd_test.c:164:5: warning: symbol 'do_true' was not declared. Should it be static
cmd_usb.c:43:6: warning: symbol 'usb_get_class_desc' was not declared. Should it be static?
cmd_usb.c:69:6: warning: symbol 'usb_display_class_sub' was not declared. Should it be static?
cmd_usb.c:151:6: warning: symbol 'usb_display_string' was not declared. Should it be static?
cmd_usb.c:161:6: warning: symbol 'usb_display_desc' was not declared. Should it be static?
cmd_usb.c:195:6: warning: symbol 'usb_display_conf_desc' was not declared. Should it be static?
cmd_usb.c:210:6: warning: symbol 'usb_display_if_desc' was not declared. Should it be static?
cmd_usb.c:227:6: warning: symbol 'usb_display_ep_desc' was not declared. Should it be static?
cmd_usb.c:252:6: warning: symbol 'usb_display_config' was not declared. Should it be static?
cmd_usb.c:283:6: warning: symbol 'usb_show_tree_graph' was not declared. Should it be static?
cmd_usb.c:343:6: warning: symbol 'usb_show_tree' was not declared. Should it be static?
cmd_usb.c:356:5: warning: symbol 'do_usbboot' was not declared. Should it be static?
cmd_usb.c:366:5: warning: symbol 'do_usb' was not declared. Should it be static?
cmd_version.c:31:5: warning: symbol 'do_version' was not declared. Should it be s
cmd_ximg.c:46:1: warning: symbol 'do_imgextract' was not declared. Should it be static?
cmd_ximg.c:272:1: error: directive in argument list
cmd_ximg.c:276:1: error: directive in argument list

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2012-11-04 11:00:35 -07:00
Kim Phillips
2f220500a4 include/image.h: sparse fixes
include/image.h:378:1: warning: cast to restricted __be32
include/image.h:381:1: warning: cast to restricted __be32
include/image.h:382:1: warning: cast to restricted __be32
include/image.h:383:1: warning: cast to restricted __be32

fix by annotating image header integers big endian.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2012-11-04 11:00:35 -07:00
Kim Phillips
20051f2ab2 arch/powerpc/lib/board.c, *traps.c: sparse fixes
traps.c:*:1: warning: symbol 'print_backtrace' was not declared. Should it be static?
traps.c:93:1: warning: symbol '_exception' was not declared. Should it be static?
board.c:166:6: warning: symbol '__board_add_ram_info' was not declared. Should it be static?
board.c:174:5: warning: symbol '__board_flash_wp_on' was not declared. Should it be static?
board.c:187:6: warning: symbol '__cpu_secondary_init_r' was not declared. Should it be static?
board.c:265:12: warning: symbol 'init_sequence' was not declared. Should it be static?
board.c:348:5: warning: symbol '__fixup_cpu' was not declared. Should it be static?
board.c:405:53: warning: Using plain integer as NULL pointer

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2012-11-04 11:00:35 -07:00
Kim Phillips
fe44f452db arch/powerpc/lib/extable.c: sparse fix
extable.c:66:9: warning: symbol 'ex_tab_message' was not declared. Should it be static?

making it static can produce a new build warning on some boards:

extable.c:66:12: warning: 'ex_tab_message' defined but not used [-Wunused-variable]

but ex_tab_message doesn't do much even when used, so just remove it.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2012-11-04 11:00:35 -07:00
Kim Phillips
cdfdb8d7f3 arch/powerpc/include/asm/io.h: fix warning: preprocessor token __iomem redefined
a fixup __iomem definition in arch code appears to be placed there as a cover
up from a code import from linux when u-boot didn't yet have a compiler.h,
introduced by commit 812711ce6b "Implement
__raw_{read,write}[bwl] on all architectures".

git show 812711ce6b3a386125dcf0d6a59588e461abbb87:include/linux/compiler.h
fatal: Path 'include/linux/compiler.h' exists on disk, but not in '812711ce6b3a386125dcf0d6a59588e461abbb87'.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2012-11-04 11:00:35 -07:00
Kim Phillips
aa9e891c63 include/linux/stddef.h: avoid 'warning: preprocessor token offsetof redefined'
hack to avoid:

/opt/gcc-4.6.3-nolibc/powerpc-linux/bin/../lib/gcc/powerpc-linux/4.6.3/include/stddef.h:413:9: warning: preprocessor token offsetof redefined
u-boot/include/linux/stddef.h:20:9: this was the original definition

tried protecting with __KERNEL__, and #including compiler.h first.

Even tried include dir reordering to no avail:

 +++ b/config.mk
 @@ -194,7 +194,11 @@ OBJCFLAGS += --gap-fill=0xff
 gccincdir := $(shell $(CC) -print-file-name=include)

 CPPFLAGS := $(DBGFLAGS) $(OPTFLAGS) $(RELFLAGS)                \
 -       -D__KERNEL__
 +       -D__KERNEL__  \
 +       -I $(gccincdir) \
 +       -nostdinc
 +
 +#      -isystem $(gccincdir) \

 # Enable garbage collection of un-used sections for SPL
 ifeq ($(CONFIG_SPL_BUILD),y)
 @@ -227,8 +231,7 @@ CPPFLAGS += -I$(OBJTREE)/include2 -I$(OBJTREE)/include
 endif

 CPPFLAGS += -I$(TOPDIR)/include
 -CPPFLAGS += -fno-builtin -ffreestanding -nostdinc      \
 -       -isystem $(gccincdir) -pipe $(PLATFORM_CPPFLAGS)
 +CPPFLAGS += -fno-builtin -ffreestanding -pipe $(PLATFORM_CPPFLAGS)

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2012-11-04 11:00:34 -07:00
Kim Phillips
25b26ec69f include/linux/unaligned/generic.h: fix warning: preprocessor token __force redefined
include/linux/unaligned/generic.h:5:9: warning: preprocessor token __force redefined
include/linux/compiler.h:10:10: this was the original definition

fixup __force definitions in compat.h code appears to be placed
there as a cover up from a code import from linux when u-boot didn't yet
have a compiler.h, introduced by commit
b1b4e89a0f "Add LZO decompressor support".

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2012-11-04 11:00:34 -07:00
Kim Phillips
0d4c1c91bb include/linux/compat.h: fix warning: preprocessor token {__iomem, __user} redefined
include/linux/compat.h:4:9: warning: preprocessor token __user redefined
include/linux/compiler.h:7:10: this was the original definition
include/linux/compat.h:5:9: warning: preprocessor token __iomem redefined
include/linux/compiler.h:12:10: this was the original definition

fixup __iomem, __user definitions in compat.h code appears to be placed
there as a cover up from a code import from linux when u-boot didn't yet
have a compiler.h, introduced by commit
932394ac43 "Rewrite of NAND code based on
what is in 2.6.12 Linux kernel".

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2012-11-04 11:00:34 -07:00
Kim Phillips
eef1cf2d5c include/linux/byteorder: import latest endian definitions from linux
u-boot's byteorder headers did not contain endianness attributions
for use with sparse, causing a lot of false positives.  Import the
kernel's latest definitions, and enable them by including compiler.h
and types.h.  They come with 'const' added for some swab functions, so
fix those up, too:

include/linux/byteorder/big_endian.h:46:2: warning: passing argument 1 of '__swab64p' discards 'const' qualifier from pointer target type [enabled by default]

Also, note: u-boot's historic __BYTE_ORDER definition has been
preserved (for the time being at least).

We also remove ad-hoc barrier() definitions, since we're including
compiler.h in files that hadn't in the past:

macb.c:54:0: warning: "barrier" redefined [enabled by default]

In addition, including compiler.h in byteorder changes the 'noinline'
definition to expand to __attribute__((noinline)).  This fixes
arch/powerpc/lib/bootm.c:

bootm.c:329:16: error: attribute '__attribute__': unknown attribute
bootm.c:329:16: error: expected ')' before '__attribute__'
bootm.c:329:25: error: expected identifier or '(' before ')' token

powerpc sparse builds yield:

include/common.h:356:22: error: marked inline, but without a definition

the unknown-reason inlining without a definition is considered obsolete
given it was part of the 2002 initial commit, and no arm version was
'fixed.'

also fixed:
ydirectenv.h:60:0: warning: "inline" redefined [enabled by default]

and:

Configuring for devconcenter - Board: intip, Options: DEVCONCENTER
make[1]: *** [4xx_ibm_ddr2_autocalib.o] Error 1
make: *** [arch/powerpc/cpu/ppc4xx/libppc4xx.o] Error 2
powerpc-fsl-linux-size: './u-boot': No such file
4xx_ibm_ddr2_autocalib.c: In function 'DQS_autocalibration':
include/asm/ppc4xx-sdram.h:1407:13: sorry, unimplemented: inlining failed in call to 'ppc4xx_ibm_ddr2_register_dump': function body not available
4xx_ibm_ddr2_autocalib.c:1243:32: sorry, unimplemented: called from here

and:

In file included from crc32.c:50:0:
crc32table.h:4:1: warning: implicit declaration of function '___constant_swab32' [-Wimplicit-function-declaration]
crc32table.h:4:1: error: initializer element is not constant
crc32table.h:4:1: error: (near initialization for 'crc32table_le[0]')

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
[trini: Remove '#endif' in include/common.h around setenv portion]
Signed-off-by: Tom Rini <trini@ti.com>
2012-11-04 11:00:34 -07:00
Stephen Warren
f9b55e2285 fs: rename fsload command to load
When the generic filesystem load command "fsload" was written, I felt
that "load" was too generic of a name for it, since many other similar
commands already existed. However, it turns out that there is already
an "fsload" command, so that name cannot be used. Rename the new
"fsload" to plain "load" to avoid the conflict. At least anyone who's
used a Basic interpreter should feel familiar with the name!

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-04 11:00:34 -07:00
Stephen Warren
3f83c87ee5 fs: fix number base behaviour change in fatload/ext*load
Commit 045fa1e "fs: add filesystem switch libary, implement ls and
fsload commands" unified the implementation of fatload and ext*load
with the new command fsload. However, this altered the interpretation
of command-line numbers from always being base-16, to requiring a "0x"
prefix for base-16 numbers. Enhance do_fsload() to allow commands to
specify which base to use.

Use base 0, thus requiring a "0x" prefix for the new fsload command.
This feels much cleaner than assuming base 16.

Use base 16 for the pre-existing fatload and ext*load to prevent a
change in behaviour.

Use base 16 exclusively for the loadaddr environment variable, since
that variable is interpreted in multiple places, so we don't want the
behaviour to change.

Update command help text to make it clear where numbers are assumed to
be hex, and where an explicit "0x" prefix is required.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
2012-11-04 11:00:31 -07:00
Stephen Warren
b6a3044436 cmd_ext4: remove TABs from command help text
TABs in the help text won't line up in the same place on the console as
in a source editor. Replace them with spaces to make ensuring correct
alignment easier.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
2012-11-04 11:00:27 -07:00
Stephen Warren
e9b0f99e82 fs: fix do_fsload() handling of optional arguments
Most arguments to the shell command do_fsload() implements are optional.
Fix the minimum argc check to respect that. Cater for the situation
where argv[2] is not provided.

Enhance both do_fsload() and do_ls() to check the maximum number of
arguments too. While this check would typically be implemented via
U_BOOT_CMD()'s max_args parameter, if these functions are called
directly, then that check won't exist.

Finally, alter do_ls() to check (argc >= 4) rather than (argc == 4) so
that if the function is enhanced to allow extra arguments in the future,
this test won't need to be changed at that time.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
2012-11-04 11:00:24 -07:00
Vikram Narayanan
46d626d392 socfpga/spl: Remove malloc.h
Remove unused header

Signed-off-by: Vikram Narayanan <vikram186@gmail.com>
2012-11-04 16:23:23 +01:00
Vikram Narayanan
7ae534cef9 socfpga/spl: Remove timer_init from spl_board_init
Timer is initialized already in board_init_r function in
(common/spl/spl.c) No need to initialize it again

Signed-off-by: Vikram Narayanan <vikram186@gmail.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
2012-11-04 16:19:58 +01:00
Jens Scharsig (BuS Elektronik)
cc69cc0027 arm: atmel: cpux9k2: add missing cache configs
* add CONFIG_SYS_CACHELINE_SIZE to eb_cpux9k2 board config header
* dissable dcache (CONFIG_SYS_DCACHE_OFF) for eb_cpux9k2

Signed-off-by: Jens Scharsig (BuS Elektronik) <esw@bus-elektronik.de>
2012-11-04 15:56:52 +01:00
Albert ARIBAUD
a42c87f9d8 Merge remote-tracking branch 'u-boot-ti/master' 2012-11-03 10:05:22 +01:00
Simon Glass
51bdad67cb x86: config: Enable AHCI support for coreboot
Enable AHCI driver for Intel SATA devices.

Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-02 15:20:43 -07:00
Simon Glass
b6458d38d6 ide: Correct function signatures for ide_read/write()
The prototypes in the header were changed by commit 4ac8f8e0 but the
functions no longer match. Correct this.

It seems odd that block devices take an lbaint_t for the block count, but
an unsigned long for the blknr. Surely we should promote blknr to lbaint_t
also?

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@ti.com>
2012-11-02 15:20:43 -07:00
Walter Murphy
fe1f808ce7 ahci: Expand HDD Logical Block addressability up to 32 bits
Currently, this driver uses a 28bit interface to AHCI, this
limits the number of blocks addressable to 2^28, or the max
disk size to 512(2^28) or about 137GB. This change allows
supporting drives up to about 2TB.

Testing this is a bit difficult. There is test code that
can be inserted into U-Boot that will write test patterns
into certain unused blocks. These patterns can be manually
checked using 'dd' after boot. Another way is to confirm the
original error that exposed this bug is fixed. IOW: see if
AU (Auto Update) will now work on the drive. Also, check
that there are no warning messages from the 'cgpt' utility.

Signed-off-by: Walter Murphy <wmurphy@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-02 15:20:43 -07:00
Marc Jones
766b16fe18 ahci: Perform SATA flush after disk write.
Writes in u-boot are so rare, and the logic to know when is
the last write and do a flush only there is sufficiently
difficult. Just do a flush after every write. This incurs,
usually, one extra flush when the rare writes do happen.

Signed-off-by: Marc Jones <marc.jones@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-02 15:20:43 -07:00
Marc Jones
2a0c61d401 ahci: Support spin-up and link-up separately
Add HDD handling to the SSD-only AHCI driver, by separately dealing with
spin-up and link-up.

Signed-off-by: Marc Jones <marc.jones@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-02 15:20:43 -07:00
Walter Murphy
57847660bb ahci: Adjust SATA timeouts for hard disk (spinup delay & command timeout)
Note: These are timeout values and not delay values, so the event being
timed out will complete whenever it is actually ready, with a
measurement granularity of 1 millisecond, up till the timeout value.
Therefore, there is no effect on SSD booting.

The values were determined by instrumenting the code and measuring the
actual time taken by several different models of HDD for each of the
parameters and then adding 50% more for the spinup value and just
doubling the command timeout value.

Signed-off-by: Walter Murphy <wmurphy@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-02 15:20:42 -07:00
Taylor Hutt
90b276f6a2 ahci: flush / invalidate dcache around SATA commands
Exynos5 automatically performs DMA when the SATA controller executes
commands.  This adds the necessary dcache-to-memory flush &
invalidation calls to allow the DMA to properly function.

Signed-off-by: Taylor Hutt <thutt@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-02 15:20:42 -07:00
Taylor Hutt
64738e8ae8 ahci: Use virt_to_phys() to denote physical addresses for DMA
Update the assignment of various physical memory buffers used by the
SATA controller to explicitly be denoted as physical addresses.

The memory is identity-mapped, so these function calls are a nop, but
they provide good semantic documentation for any maintainers.

The return value of virt_to_phys() is 'unsigned long'.  On machines
where sizeof(unsigned long) != sizeof(pointer), a cast through
(uintptr_t) is needed to appease the compiler due to the potential of
losing the upper 32 bits of the address.

In compilation this scenario, a physical address could be 64-bits, yet
the C pointer environment only allows 32-bit addresses; the constraint
is that pointers cannot address more than 4Gb of memory and if
virt_to_phys() ever returns an out-of-range value for the physical
address, there are issues with emmory mapping which must be solved.
However, since the memory is identify mappeed, there is no problem
introducing the cast: the original pointer will reside in 32-bits, so
the physical address will also be within in 32-bits.

Signed-off-by: Taylor Hutt <thutt@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-02 15:20:42 -07:00
Gabe Black
b4c5bbce49 ahci: Support 64-bit LBA option when reading capacity
Capacity needs to allow for a 64-bit value.

Signed-off-by: Gabe Black <gabeblack@google.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-02 15:20:42 -07:00
Taylor Hutt
5a2b77f47d ahci: Fix 'Invaild' typo
This fixes a spelling error in a message which can be output to the
console.

Signed-off-by: Taylor Hutt <thutt@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-02 15:20:42 -07:00
Taylor Hutt
c873111565 ahci: Use sizeof(fis) instead of hardcoding '20'
This cleanup replaces the hardcoded use of '20', which represents the
number of bytes in the FIS, with sizeof(fis).

Signed-off-by: Taylor Hutt <thutt@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-02 15:20:42 -07:00
Gabe Black
19d1d41e84 ahci: Make the AHCI code find the capacity of disks > 128 GB properly
In the structure returned by the ATA identify device command, there are two
fields which describe the device capacity. One is a 32 bit data type which
reports the number of sectors as a 28 bit LBA, and the other is a 64 bit data
type which is for a 48 bit LBA. If the device doesn't support 48 bit LBAs,
the small value is the only value with the correct size. If it supports more,
if the number of sectors is small enough to fit into 28 bits, both fields
reflect the correct value. If it's too large, the smaller field has 28 bits of
1s, 0xfffffff, and the other field has the correct value.

The AHCI driver is implemented by attaching to the generic SCSI code and
translating on the fly between SCSI binary data structures and AHCI data
structures. It responds to requests to execute specific SCSI commands by
executing the equivalent AHCI commands and then crafting a response which
matches what a SCSI disk would send.

The AHCI driver now considers both fields and chooses the correct one when
implementing both the SCSI READ CAPACITY (10) and READ CAPACITY (16) commands.

Signed-off-by: Gabe Black <gabeblack@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-02 15:20:41 -07:00
Hung-Te Lin
b7a21b70d0 ahci: support scsi writing in AHCI driver
The "scsi write" command requires support from underlying driver.
This CL enables SCSI_WRITE10 in AHCI driver.

Tested in U-Boot console, try to i/o with sector #64:
scsi read 1000 40 1
md.b 1000 200 # check if things are not 0xcc
mw.b 1000 cc 200 # try to fill with 0xcc
scsi write 1000 40 1
mw.b 1000 0 200 # fill with zero
md.b 1000 200 # should be all 0
scsi read 1000 40 1
md.b 1000 200 # should be all 0xcc

Signed-off-by: Hung-Te Lin <hungte@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-02 15:20:41 -07:00
Gabe Black
e81058c05b ahci: Make sending the SETFEATURES_XFER command optional
This command doesn't really do anything when talking to a SATA device, and
sending it confuses some of them. This change makes sending the command
optional, and defaults to not. The situations where it should be sent are not
the common case.

With the standard SSD in the machine, here are some times with the option
turned off:
1. 8277
2. 8273
3. 8050

And turned on:
1. 8303
2. 8155
3. 8276

Sending that command seems to have no meaningful effect on performance.

This fixes problems with an SSD marked Toshiba NV6424, Taiwan 11159AE P
and TC58NVG5D2FTA10.

Signed-off-by: Gabe Black <gabeblack@chromium.org>
Signed-off-by: Taylor Hutt <thutt@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-02 15:20:41 -07:00
Stefan Reinauer
4e422bce8a ahci: cosmetics and cleanup
- print the correct speed
- print all the AHCI capability flags
(information taken from Linux kernel driver)
- clean up some comments

For example, this might show the following string:
AHCI 0001.0300 32 slots 6 ports 6 Gbps 0x3 impl SATA mode

Signed-off-by: Stefan Reinauer <reinauer@chromium.org>

Commit-Ready: Stefan Reinauer <reinauer@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Stefan Reinauer <reinauer@chromium.org>
2012-11-02 15:20:41 -07:00
Stefan Reinauer
7ba7917c91 ahci: Improve AHCI debugging
- remove unused ssleep macro
- add some useful debugging information

Signed-off-by: Stefan Reinauer <reinauer@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-02 15:20:41 -07:00
Stefan Reinauer
9a65b8754c ahci: Optimise AHCI controller reset and start-up
The existing code waits a whole second for the AHCI controller to reset.
Instead, let's poll the status register to see if the reset has
succeeded and return earlier if possible. This brings down the time for
AHCI probing from 1s to 20ms.

Signed-off-by: Stefan Reinauer <reinauer@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-02 15:20:41 -07:00
Stefan Reinauer
447c031ba4 scsi: Add function and env var to report number of scsi drives
Add a new function to find out the number of available SCSI disks. Also
set the 'scsidevs' environment variable after each scan.

Signed-off-by: Stefan Reinauer <reinauer@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-02 15:20:40 -07:00
Simon Glass
c4fa493d3a Support setenv_ulong() and setenv_addr() for powerpc
This includes were outside an #ifdef CONFIG_PPC, but there is not reason
to exclude powerpc from using them.

Move the declaration outside the #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-02 15:20:40 -07:00
Hung-Te Lin
758c9e6954 scsi: Add scsi_write to SCSI driver
Implement write functionality in the scsi layer. A ''scsi write'
command is also added to console for testing.

Signed-off-by: Hung-Te Lin <hungte@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-02 15:20:40 -07:00
Vadim Bendebury
4ae5eb7c5b scsi: Provide support for a list of AHCI controllers.
Many AHCI controllers are identical, the main (and often the
only) difference being the PCI Vendor ID/Device ID combination
reported by the device.

This change allows the config file to define a list of PCI vendor
ID/device ID pairs. The driver would scan the list and initialize
the first device it finds.

No actual multiple device list is introduced yet, this change
just add the framework.

Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Signed-off-by: Taylor Hutt <thutt@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-02 15:20:40 -07:00
Vadim Bendebury
284231e49a ahci: Support splitting of read transactions into multiple chunks
With an Intel AHCI controller, the driver does not operate properly
if the requested amount of blocks to read exceeds 255.

It is probably possible to specify 0 as the block count and the driver
will read 256 blocks, but it was decided to limit the number of blocks
read at once to 128 (it should be a power of 2 for the optimal
performance of solid state drives).

Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-02 15:20:40 -07:00
Stefan Roese
e08ebf4687 ZFS: Fix compile warning in fs/zfs/zfs.c (GCC 4.6.4 from ELDK 5.2.1)
This patch fixes the following compile warning:
zfs.c:2006:1: warning: 'zfs_label' defined but not used [-Wunused-function]
zfs.c:2029:1: warning: 'zfs_uuid' defined but not used [-Wunused-function]

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Jorgen Lundman <lundman@lundman.net>
2012-11-02 15:20:40 -07:00
Stefan Roese
af8d1d3f71 ZFS: Fix compile warning in cmd_zfs.c (GCC 4.6.4 from ELDK 5.2.1)
This patch fixes the following compile warnings:

cmd_zfs.c:177:1: warning: initialization from incompatible pointer type [enabled by default]
cmd_zfs.c:177:1: warning: (near initialization for '_u_boot_list_cmd_zfsls.cmd') [enabled by default]
cmd_zfs.c:182:1: warning: initialization from incompatible pointer type [enabled by default]
cmd_zfs.c:182:1: warning: (near initialization for '_u_boot_list_cmd_zfsload.cmd') [enabled by default]

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Jorgen Lundman <lundman@lundman.net>
2012-11-02 15:20:39 -07:00
Tom Rini
044fc14bcb am335x_evm: Add CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG support
We add CONFIG_ENV_VARS_UBOOT_CONFIG,
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG and CONFIG_BOARD_LATE_INIT to set
the variables and then fdtfile and findfdt to make us of this.  It is
now possible to do 'run findfdt' to have fdtfile be set to the value of
the dtb file to load for the board we are running on.

Signed-off-by: Tom Rini <trini@ti.com>
2012-11-02 15:14:28 -07:00
Stephen Warren
418b7f3aff Add board_name to CONFIG_ENV_VARS_UBOOT_CONFIG
CONFIG_ENV_VARS_UBOOT_CONFIG creates environment variables indicating
which configuration U-Boot was built for. Some U-Boot binaries run on
multiple boards, and hence this information may not uniquley describe
the HW that U-Boot is actually running on. Another patch introduces
environment variable board_name to represent that. In order to avoid
scripts having to check $board_name, use it if set, and then fall back
to using $board, make CONFIG_ENV_VARS_UBOOT_CONFIG also set a default
value for board_name, so that variable is always available.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2012-11-02 15:13:30 -07:00
Tom Rini
7e27f89fdf README: Document CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
This option is intended to be set by boards which will set the
board_name and board_rev environment variables.  These are to be used
when the U-Boot binary can support more than one board type at run-time
and the user needs an easy way (for example for scripting to determine
what device tree to load) to determine what board they are on.

Signed-off-by: Tom Rini <trini@ti.com>
2012-11-02 15:13:30 -07:00
Simon Glass
b4a2e43570 git-mailrc: Change x86 maintainer to Simon
Grame is still listed since he has agreed to continue with some review.
Also add an alias to shorten things.

Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-02 15:13:29 -07:00
Wolfgang Denk
d266f66925 lib/vsprintf.c: don't special-case pointers to address null
The %p format of printf() would print a pointer to address null as
"(null)".  This makes sense in a real OS where a NULL pointer must
never be dereferenced, but this is a bootloader, and there are cases
where accessing the data at address null makes perfect sense.

Remove the special case in lib/vsprintf.c using "#if 0" with a comment
to make clear this was an intentional change and to stop re-adding
this code.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2012-11-02 15:13:29 -07:00
Tom Rini
085b9c3a1d cmd_fdt.c: Use %p when printing pointers
When putting pointers into a format string use %p to ensure that they
are printed correctly regardless of bitsize.  This fixes warnings on
sandbox on 64bit systems.

Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Gerald Van Baren <vanbaren@cideas.com>
Signed-off-by: Tom Rini <trini@ti.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2012-11-02 15:13:29 -07:00
Stephen Warren
a1b231cef6 fs: handle CONFIG_NEEDS_MANUAL_RELOC
Without this, fstypes[].probe points at the wrong place, so calling the
function results in undefined behaviour.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Andreas Bießmann <andreas.devel@googlemail.com>
2012-11-02 15:13:29 -07:00
Matthias Fuchs
a956bdcb3f am335x: add initial AM335x IDK board support
This patch extends the am335x_evm board for the AM335x IDK.

The IDK board uses MII for the ethernet phy (same as
Beaglebone board) and MMC0 for storage (but without
card detect line).

The IDK uses UART3 for console. So u-boot must be build
with CONFIG_SERIAL4 and CONFIG_CONS_INDEX=4 or for
the am335x_evm_uart3 board configuration as introduced
by Andrew Bradfords recent patch series "am33xx: Enable
UART {1,2,3,4,5}...". When using the IDK with console on UART0,
those patches are not required. In this case the board
slightly needs to be modified.

Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
2012-11-02 10:04:04 -07:00
Andreas Bießmann
60607c9de0 avr32: allow multi block mmc access for all boards
Commit 1db7377a70 fixes the gen_atmel_mci driver
to be able to use multi block access for avr32. Therefore remove the setting
which forces single block access.

This also adds a huge performace gain for mmc access:
---8<---
Loading file "/boot/uImage" from mmc device 0:1
1830666 bytes read in 1293 ms (1.3 MiB/s)
--->8---

vs.

---8<---
Loading file "/boot/uImage" from mmc device 0:1
1830666 bytes read in 237 ms (7.4 MiB/s)
--->8---

Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Cc: haavard.skinnemoen@atmel.com
Cc: hans-christian.egtvedt@atmel.com
Cc: mpfj@mimc.co.uk
Cc: alex.raimondi@miromico.ch
Cc: julien.may@miromico.ch
Cc: egtvedt@samfundet.no
Cc: havard@skinnemoen.net
2012-11-02 13:17:39 +01:00
Tom Rini
57f588be60 omap3: Rework board.c for !CONFIG_SYS_L2CACHE_OFF
When CONFIG_SYS_L2CACHE_OFF is defined we end up with a few warnings
currently.  Re-order functions so that we don't have that anymore.

Signed-off-by: Tom Rini <trini@ti.com>
2012-10-30 22:23:28 -07:00
Koen Kooi
9cd7b4cdca am335x: add mux config for DDR3 version of beaglebone
This fixes the following boothang in SPL:

	Unknown board, cannot configure pinmux.### ERROR ### Please RESET the board ###

Future commits will add pinmuxes for more on-board peripherals.

Signed-off-by: Koen Kooi <koen@dominion.thruhere.net>
2012-10-30 15:28:44 -07:00
Raphael Assenat
843a7ee8c4 eco5pk: Add new board and default config
Signed-off-by: Raphael Assenat <raph@8d.com>
[trini: Squash boards.cfg / MAINTAINERS change into main patch]
Signed-off-by: Tom Rini <trini@ti.com>
2012-10-30 15:28:06 -07:00
Pali Rohár
ed407be53e New board support: Nokia RX-51 aka N900
Based on previous work by: Alistair Buxton <a.j.buxton@gmail.com>

Signed-off-by: Pali Rohár <pali.rohar@gmail.com>
Cc: Ивайло Димитров <freemangordon@abv.bg>
2012-10-30 15:28:06 -07:00
Pali Rohár
33a35bbbe0 cfb_console: Add support for some ANSI terminal escape codes
Add optional support for some ANSI escape sequences to the
cfb_console driver. Define CONFIG_CFB_CONSOLE_ANSI to enable
cursor moving, color reverting and clearing the cfb console
via ANSI escape codes.

Signed-off-by: Pali Rohár <pali.rohar@gmail.com>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
2012-10-30 15:28:06 -07:00
Pali Rohár
318e70e244 Add power bus message definitions in twl4030.h
* Code copied from linux kernel 3.0.0 from file include/linux/i2c/twl.h
* commit 6523b148b44be38d89c2ee9865d34da30d9f5f1c

Signed-off-by: Pali Rohár <pali.rohar@gmail.com>
2012-10-30 15:28:06 -07:00
Pali Rohár
89e6f13849 arm bootm: Allow to pass board specified atags
Board can implement function setup_board_tags which is used for adding atags

Signed-off-by: Pali Rohár <pali.rohar@gmail.com>
2012-10-30 15:28:05 -07:00
Tom Rini
ed296d206a MAKEALL: Add -s to '${MAKE} tidy' section
When BUILD_NBUILDS is > 1 we run the tidy command.  With the addition of
DocBook this now includes a -C doc/DocBook and a 'entering/leaving' pair
of messages happen.  Since we don't want to see what's being cleaned
here, we can just invoke make -s like we do when building.

Signed-off-by: Tom Rini <trini@ti.com>
2012-10-29 14:21:20 -07:00
Simon Glass
b9dc49412d ext4: Fix printf() format string error
Fix the following error in the ext4 command:

cmd_ext4.c:110:3: error: format '%lu' expects argument of type
'long unsigned int', but argument 4 has type 'int' [-Werror=format]

Signed-off-by: Simon Glass <sjg@chromium.org>
2012-10-29 14:21:20 -07:00
Stephan Gatzka
a99c040c33 FPGA: Cyclon II: Correctly reset the FPGA before configuration
Deassert the CONFIG pin before asserting it again. This assures that the
FPGA will be resetted and therefore configuration will be correctly
enabled.

This is also already done on other FPGA's, e.g. Stratix.

Signed-off-by: Stephan Gatzka <stephan.gatzka@hbm.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2012-10-29 14:21:20 -07:00
Stephen Warren
045fa1e114 fs: add filesystem switch libary, implement ls and fsload commands
Implement "ls" and "fsload" commands that act like {fat,ext2}{ls,load},
and transparently handle either file-system. This scheme could easily be
extended to other filesystem types; I only didn't do it for zfs because
I don't have any filesystems of that type to test with.

Replace the implementation of {fat,ext[24]}{ls,load} with this new code
too.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-10-29 14:21:20 -07:00
Stephen Warren
03e2ecf6b8 fs: separate CONFIG_FS_{FAT, EXT4} from CONFIG_CMD_{FAT, EXT*}
This makes the FAT and ext4 filesystem implementations build if
CONFIG_FS_{FAT,EXT4} are defined, rather than basing the build on
whether CONFIG_CMD_{FAT,EXT*} are defined. This will allow the
filesystems to be built separately from the filesystem-specific commands
that use them. This paves the way for the creation of filesystem-generic
commands that used the filesystems, without requiring the filesystem-
specific commands.

Minor documentation changes are made for this change.

The new config options are automatically selected by the old config
options to retain backwards-compatibility.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
2012-10-29 14:21:19 -07:00
Stephen Warren
672ee2110c fs: delete unused Makefile
fs/Makefile is unused. The top-level Makefile sets LIBS-y += fs/xxx and
hence causes make to directly descend two directory levels into each
individual filesystem, and it never descends into fs/ itself.

So, delete this useless file.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Acked-by: Simon Glass <sjg@chromium.org>
2012-10-29 14:21:19 -07:00
Allen Martin
d598e0fe73 arm720t: add back common.h include
Add back common.h header that was removed in previous patch so that
CONFIG_TEGRA can be evaluated correctly.

Signed-off-by: Allen Martin <amartin@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-10-29 14:04:26 -07:00
Allen Martin
0f89980222 serial: remove calls to serial_assign()
Remove calls to serial_assign() that are failing now that it returns a
proper error code.  This calls were not actually doing anything
because they passed the name of a stdio_dev when a serial_device name
is exptectd.

Signed-off-by: Allen Martin <amartin@nvidia.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Tested-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-10-29 09:07:06 -07:00
Stephen Warren
e4ec934673 ARM: tegra: combine duplicate Makefile rules
The rules to generate u-boot-{no,}dtb-tegra.bin were almost identical.
Combine them into a single paremeterized rule. This will allow the next
patch to edit a single rule, rather than being cut/paste twice.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-10-29 09:07:06 -07:00
Allen Martin
ee2e185f62 tegra20: initialize variable to avoid compiler warning
Initialize this variable to avoid a compiler warning about possible
use of uninitialized variable with gcc 4.4.6.

Signed-off-by: Allen Martin <amartin@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-10-29 09:07:06 -07:00
Allen Martin
b2f9893826 tegra: move to common SPL framework
Change tegra SPL to use common SPL framework.  Any tegra specific
initialization is now done in spl_board_init() instead of
board_init_f()/board_init_r().  Only one SPL boot target is supported
on tegra, which is boot to RAM image.  jump_to_image_no_args() must be
overridden on tegra so the host CPU can be initialized.

Signed-off-by: Allen Martin <amartin@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Lucas Stach <dev@lynxeye.de>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-10-29 09:07:06 -07:00
Allen Martin
a759f1e0db SPL: make jump_to_image_no_args a weak symbol
Change jump_to_image_no_args() to a weak symbol to allow override by
SoC specific code.  This is required by tegra because the SPL runs on
a different CPU from the image it is loading, so tegra specific
initialization is required to start the host CPU.  Pass in spl_image
as a parameter for the same reason.

Signed-off-by: Allen Martin <amartin@nvidia.com>
Acked-by: Tom Rini <trini@ti.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-10-29 09:07:05 -07:00
Stephen Warren
a2ab6b7d32 ARM: tegra: don't request GPIO from Seaboard's SPL
Seaboard has a GPIO that switches an external mux between Tegra's debug
UART and SPI flash. This is initialized from the SPL so that SPL debug
output can be seen. Simplify the code that does this, and don't actually
request the GPIO in the SPL; just program it. This saves ~4.5K from the
size of the SPL, mostly BSS due to the large gpio_names[] table that is
no longer required. This makes Seaboard's SPL fit within the current max
size.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Acked-by: Allen Martin <amartin@nvidia.com>
Tested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-10-29 09:07:05 -07:00
Stephen Warren
da1f735272 ARM: tegra: select between Seaboard/Ventana at compile time
Seaboard and Ventana are very similar boards, and so share the seaboard.c
board file. The one difference needed so far is detected at run-time by
calling machine_is_ventana(). This bloats the Ventana build with code
that is never used. Switch to detecting Ventana at compile time to remove
bloat. This shaves ~5K off the SPL size on Ventana, and makes the SPL fit
within the max size.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-10-29 09:07:05 -07:00
Stephen Warren
644a69ec85 ARM: tegra: derive CONFIG_SPL_MAX_SIZE instead of hard-coding it
For Tegra, the SPL and main U-Boot are concatenated together to form a
single memory image. Hence, the maximum SPL size is the different in
TEXT_BASE for SPL and main U-Boot. Instead of manually calculating
SPL_MAX_SIZE based on those two TEXT_BASE, which can lead to errors if
one TEXT_BASE is changed without updating SPL_MAX_SIZE, simply perform
the calculation automatically.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Acked-by: Allen Martin <amartin@nvidia.com>
Tested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-10-29 09:07:05 -07:00
Stephen Warren
2b7818d49f ARM: enhance u-boot.lds to detect over-sized SPL
Add an ASSERT() to u-boot.lds to detect an SPL that doesn't fit within
SPL_TEXT_BASE..SPL_MAX_SIZE.

Different .lds files implement this check in two possible ways:
1) An ASSERT() like this
2) Defining a MEMORY region of size SPL_MAX_SIZE, and re-directing all
   linker output into that region. Since u-boot.lds is used for both
   SPL and main U-Boot, this would entail only sometimes defining a
   MEMORY region, and only sometimes performing that redirection, and
   hence option (1) was deemed much simpler, and hence implemented.

Note that this causes build failures at least for NVIDIA Tegra Seaboard
and Ventana. However, these are legitimate; the SPL doesn't fit within
the required space, and this does cause runtime issues.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Acked-by: Allen Martin <amartin@nvidia.com>
Acked-by: Tom Rini <trini@ti.com>
Tested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-10-29 09:07:05 -07:00
Lucas Stach
a833b95039 tegra: nand: make ONFI detection work
Add the missing bits to the Tegra NAND driver to make ONFI detection work
properly.

Also add it to the Tegra default config, as it seems to be a reasonable thing
to have it available on all boards that use any kind of NAND.

Signed-off-by: Lucas Stach <dev@lynxeye.de>
Acked-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-10-29 09:07:05 -07:00
Stephen Warren
56f42f85f5 ARM: tegra: Whistler: remove unused USB alias
Port USB1 on Whistler is intended as a device port for USB recovery.
Whistler's DT currently contains an alias for this USB port, even though
Whistler's config doesn't enable multiple USB controllers, so the alias
is unused. Remove the unused alias for consistency for now. Similar,
explicitly disable the port in the device tree too.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-10-29 09:07:05 -07:00
Stephen Warren
e73c7cdd1e ARM: tegra: Seaboard: enable multiple USB ports
The device tree already contains the required configuration for both the
USB1 and USB3 ports. Enable the required configuration options to enable
both these ports, which in turn allows the USB1 port to be used.

Note that on a true Seaboard, this port is typically used as a device
port hosting Tegra's USB recovery protocol. However, on the Springbank
derivative, this port is the only external USB port, so we enable it as
a host port so that USB peripherals may be used. Enabling this port in
U-Boot as a host port doesn't prevent the port from reverting to a
device port when the CPU is reset into recovery mode.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-10-29 09:07:04 -07:00
Stephen Warren
699c40e878 ARM: tegra: Harmony: enable ULPI USB port
The ULPI port is routed onto pins on the mini PCI Express connector. A
standard breakout board may be used to access the port.

* Add required DT entries to configure the ULPI port.
* Setup up the ULPI pinmux in the board code.
* Enable multiple USB controller and ULPI support in the board config.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-10-29 09:07:04 -07:00
Stephen Warren
938176a482 ARM: tegra: use standard variables to define load addresses
Currently, Tegra's default environment uses non-standard variables to define
where boot scripts should load the kernel, FDT, and initrd. This change both
changes the variable names to match those described in U-Boot's README, and
shuffles their values around a little so that the values make a little more
sense; see comments in the patch for rationale behind the values chosen.

Note that this patch does remove the old non-standard variable "fdt_load" from
the default environment, so this patch requires people to change their boot
scripts.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-10-29 09:07:04 -07:00
Stephen Warren
7f1b767aea ARM: tegra: define CONFIG_SYS_BOOTMAPSZ
This define indicates the size of the memory region where it is safe
to place data passed to the Linux kernel (ATAGs, DTB, initrd). The
value needs to be:

a) Less than or equal to RAM size.
b) Small enough that the area is not within the kernel's highmem region,
   since the kernel cannot access ATAGs/DTB/initrd from highmem.
c) Large enough to hold the kernel+DTB+initrd.

256M seems large enough for (c) in most circumstances, and small enough
to satisfy (a) and (b) across any possible Tegra board. Note that the
user can override this value via environment variable "bootm_mapsize"
if needed.

The advantage of defining BOOTMAPSZ is that we no longer need to define
variable fdt_high in the default environment. Previously, we defined
this to prevent the DTB from being relocated to the very end of RAM,
which on most Tegra systems is within highmem, and hence which would
cause boot failures. A user can still define this variable themselves
if they want the FDT to be either left in-place wherever loaded, or
copied to some other specific location. Similarly, there should no
longer be a strict requirement for the user to define initrd_high if
using an initrd.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-10-29 09:07:04 -07:00
Lucas Stach
6bbda88384 tegra: add Colibri T20 board support
This adds board support for the Toradex Colibri T20 module.

Working functions:
- SD card boot
- USB boot
- Network
- NAND environment

Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-10-29 09:07:04 -07:00
Marc Dietrich
73286d8729 tegra: move common features to a common makefile
For Non-Nvidia boards to include newly added features (like emc clock
scaling) it would be necessary to add each feature to their own board
Makefile. This is because currently the top Makefile automaticly includes
these features only for Nvidia boards.

This patch adds a simple Makefile include so all new features become
available for non-Nvidia board vendors.

Cc: Stephen Warren <swarren@wwwdotorg.org>
Cc: Tom Warren <twarren@nvidia.com>
Cc: Thierry Reding <thierry.reding@avionic-design.de>
Cc: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Marc Dietrich <marvin24@gmx.de>
Acked-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-10-29 09:07:04 -07:00
Tom Rini
dac064f58e Merge branch 'master' of git://git.denx.de/u-boot-coldfire 2012-10-29 08:02:11 -07:00
Jason Jin
b765fce95c ColdFire: Remove save env in NAND support for M54418TWR board.
This patch remove the env saving in NAND as so far the
NAND driver is not ported to the M54418TWR platform.

Signed-off-by: Jason Jin <Jason.jin@freescale.com>
2012-10-29 22:08:32 +08:00
Jason Jin
f9a2d79337 ColdFire: Update the lds file for M54418TWR board.
The M54418TWR lds file  need to update since commit:

8b493a5236

common: Discard the __u_boot_cmd section

The command declaration now uses the new LG-array method to generate
list of commands. Thus the __u_boot_cmd section is now superseded and
redundant and therefore can be removed. Also, remove externed symbols
associated with this section from include/command.h .

Signed-off-by: Jason Jin <Jason.jin@freescale.com>
2012-10-29 22:08:09 +08:00
Wolfgang Denk
28aa27b608 ESTEEM192E: adjust linker script to grown code size
Once more, some of the previous changes caused the code to grow, which
causes errors like

u-boot.lds:74 cannot move location counter backwards (from 40008384 to 40008000)

when building with some older tool chains (like ELDK 4.2).
Adjust the linker script to make fit again.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Conn Clark <clark@esteem.com>
2012-10-28 20:18:32 +01:00
Wolfgang Denk
461d3800b4 TQM8xx: adjust linker script to grown code size
Once more, some of the previous changes caused the code to grow, which
causes errors like

u-boot.lds:80 cannot move location counter backwards (from 400082a4 to 40008000)

when building with some older tool chains (like ELDK 4.2).
Adjust the linker script to make fit again.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2012-10-28 20:18:17 +01:00
Wolfgang Denk
1b0757eced PPC: remove dead boards (AMX860, c2mon, ETX094, IAD210, LANTEC, SCM)
These boards have long reached EOL, and there has been no indication
of any active users of such hardware for years.  Get rid of the dead
weight.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Wolfgang Grandegger <wg@denx.de>
2012-10-28 20:17:25 +01:00
Albert ARIBAUD
f04821a8ca Merge remote-tracking branch 'u-boot-imx/master' 2012-10-27 11:43:17 +02:00
Tom Rini
5bb3505fa8 Merge branch 'master' of git://git.denx.de/u-boot-arm 2012-10-26 15:44:31 -07:00
Stephen Warren
b68d6712c3 ARM: fix u-boot.lds for -ffunction-sections/-fdata-sections
When -ffunction-sections or -fdata-section are used, symbols are placed
into sections such as .data.eserial1_device and .bss.serial_current.
Update the linker script to explicitly include these. Without this
change (at least with my gcc-4.5.3 built using crosstool-ng), I see that
the sections do end up being included, but __bss_end__ gets set to the
same value as __bss_start.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Allen Martin <amartin@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
2012-10-26 23:46:21 +02:00
Yann Vernier
bff679ddfb arm: ks8695: use defined constants for UART
CONFIG_BAUDRATE and KS8695_UART_LINEC_WLEN8 used for UART registers
2012-10-26 23:32:11 +02:00
Annamalai Lakshmanan
522de019e5 Origen: Add default clock settings for multimedia IPs
Added clock settings for MFC, FIMC, FB and G3D. They are clocked to
maximum respective frequencies as per datasheet.

Signed-off-by: Annamalai Lakshmanan <annamalai.lakshmanan@linaro.org>
Signed-off-by: Giridhar Maruthy <giridhar.maruthy@linaro.org>
Signed-off-by: Inderpal Singh <inderpal.singh@linaro.org>
Signed-off-by: Tushar Behera <tushar.behera@linaro.org>
2012-10-26 23:29:47 +02:00
Albert ARIBAUD
53c41548a9 arm: arm925t: remove SX1 board
SX1 does not build properly by itself, is not built
as part of MAKEALL arm or MAKEALL -a arm, and is only
present in Makefile, not boards.cfg. As it also has no
entry in MAINTAINERS, it is orphan and non-functional.
Remove it.

Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
2012-10-26 23:22:01 +02:00
Marek Vasut
82138f4fcd arm720: Remove CONFIG_ARM7_REVD
This is a dead code, remove it.

Signed-off-by: Marek Vasut <marex@denx.de>
2012-10-26 22:39:03 +02:00
Marek Vasut
a63dd62bb2 arm720: Further clean up the arm720t directory
Clean up away old macros and such, so the file doesn't start piling
up cruft.

Signed-off-by: Marek Vasut <marex@denx.de>

clean
2012-10-26 22:38:56 +02:00
Marek Vasut
f2e0801565 stdio: Remove the CLPS7111 serial driver
This driver is no longer used, remove it.

Signed-off-by: Marek Vasut <marex@denx.de>
2012-10-26 22:38:40 +02:00
Marek Vasut
b411eb30f5 arm: Remove support for NETARM
This stuff has been rotting in the tree for a while now. Remove it.

Signed-off-by: Marek Vasut <marex@denx.de>
2012-10-26 22:38:00 +02:00
Marek Vasut
afad40299e arm: Remove support for s3c4510
This stuff has been rotting in the tree for a year now. Remove it.

Signed-off-by: Marek Vasut <marex@denx.de>
2012-10-26 22:37:12 +02:00
Marek Vasut
6f62f42071 arm: Remove support for lpc2292
This stuff has been rotting in the tree for a year now. Remove it.

Signed-off-by: Marek Vasut <marex@denx.de>
2012-10-26 22:35:20 +02:00
Allen Martin
8440f18a48 serial: remove calls to serial_assign()
Remove calls to serial_assign() that are failing now that it returns a
proper error code.  This calls were not actually doing anything
because they passed the name of a stdio_dev when a serial_device name
is exptectd.

Signed-off-by: Allen Martin <amartin@nvidia.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Tested-by: Stephen Warren <swarren@nvidia.com>
2012-10-26 09:32:58 -07:00
Stefano Babic
bad05afe08 MX5: added CONFIG_PMIC_FSL_MC13892 to mx53evk
Recent patches adding FSL_PMIC_I2C_LENGTH require
that the PMIC model is defined.

Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Jason Liu <jason.hui@linaro.org>
2012-10-26 16:28:08 +02:00
Fabio Estevam
ea215cdfd0 mx6qsabre_common: Allow booting a zImage kernel
Allow booting a zImage kernel.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-10-26 16:28:08 +02:00
Fabio Estevam
ee303c964b mx35pdk: Allow booting a zImage kernel
Allow booting a zImage kernel.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-10-26 16:28:08 +02:00
Fabio Estevam
0d56a120a3 mx51evk: Allow booting a zImage kernel
Allow booting a zImage kernel.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-10-26 16:28:08 +02:00
Fabio Estevam
2dc0fe9eac mx25pdk: Allow booting a zImage kernel
Allow booting a zImage kernel.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-10-26 16:28:08 +02:00
Fabio Estevam
c14ab2ae13 mx53loco: Allow booting a zImage kernel
Allow booting a zImage kernel.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-10-26 16:28:08 +02:00
Fabio Estevam
e00c89df06 mx25pdk: Add Ethernet support
mx25pdk has a Ethernet port that is connected to its internal FEC controller.

In order to power up the Ethernet PHY (DP83640) it is necessary to communicate
with the MC34704 PMIC via I2C.

Make the FEC ethernet port functional

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-10-26 16:28:08 +02:00
Fabio Estevam
787f4f3082 pmic: Add support for mc34704
Add the register layout for the MC34704 PMIC from Freescale.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-10-26 16:28:07 +02:00
Fabio Estevam
e100a3d52e mx25: Place common functions into sys_proto.h
imx-regs.h is meant to contain SoC register definitions.

Common SoC funtions should go to sys_proto.h instead.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-10-26 16:28:07 +02:00
Fabio Estevam
4cfc6c4fa7 pmic_fsl: Introduce FSL_PMIC_I2C_LENGTH
Introduce FSL_PMIC_I2C_LENGTH to configure the number of bytes that are used to
communicate with the PMIC via I2C.

Instead of hardcoding the value, pass the number via a configurable option per
PMIC type.

This will be useful for adding support for PMIC MC34704 from Freescale, which
uses only one byte in its I2C protocol.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-10-26 16:28:07 +02:00
Fabio Estevam
af2a4093cb mx25pdk: Add esdhc support
mx25pdk has a SD/MMC slot connected to esdhc1.

Add support for it and allow the environment variables to be saved into SD/MMC.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-10-26 16:28:07 +02:00
Fabio Estevam
d6d94e7360 mx25pdk: Include CONFIG_MX25
It is necessary to include CONFIG_MX25 as several i.mx drivers handle the SoC
differences based on the this config option.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-10-26 16:28:07 +02:00
Stefano Babic
d81b27a245 MX35: add support for woodburn board
The woodburn board is based on the MX35 SOC.
Support for both external (NOR) and internal
(SD Card) boot mode are added. It uses the
generic SPL framework to implement the internal boot
mode.

The following peripherals are supported:
- Ethernet (FEC)
- SD Card
- NAND (512 MB)
- NOR Flash

In the internal boot mode, a simple imximage header
is generated to set the address in internal RAM
where the SOC must copy the SPL code. The initial setup
is then demanded to the SPL itself.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2012-10-26 16:27:59 +02:00
Stefano Babic
a3cbc3969d ARM: Add SPL target to arm1136
The patch adds SPL for the arm1136 architecture and
inserts SPL (the produced binary) to clobber target
in the main Makefile.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2012-10-26 16:27:59 +02:00
Stefano Babic
a80834c064 SPL: Added SPL target for mx35 SOC to SPL Makefile
Signed-off-by: Stefano Babic <sbabic@denx.de>
2012-10-26 16:27:59 +02:00
Stefano Babic
d41924a2c1 MX35: Add soc_boot_mode and soc_boot_device to MX35
The functions are required to use the generic
SPL Framework.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2012-10-26 16:27:58 +02:00
Stefano Babic
e650030347 MX35: add LOW_LEVEL_SRAM_STACK to use SPL_FRAMEWORK
Signed-off-by: Stefano Babic <sbabic@denx.de>
2012-10-26 16:27:58 +02:00
Stefano Babic
b736e4b929 ARM: Fix start.S when used with SPL in arm1136
This patch modifies start.S for the arm1136 to make it
conform to start.S  in armv7 architecture, to make it
usable if the SPL framework is used.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2012-10-26 16:27:58 +02:00
Stefano Babic
01968b96a2 MX5: fix warning in clock.c
Patch fix warnings compiling with ELDK-4.2:

clock.c: In function 'get_standard_pll_sel_clk':
clock.c:341: warning: 'freq' may be used uninitialized in this function

Reported-by : Marek Vasut <marex@denx.de>
Signed-off-by: Stefano Babic <sbabic@denx.de>
2012-10-26 16:11:32 +02:00
Albert ARIBAUD
4c25761337 Merge remote-tracking branch 'u-boot-atmel/master' 2012-10-26 07:54:25 +02:00
Albert ARIBAUD
c68436fa42 Merge remote-tracking branch 'u-boot-ti/master' 2012-10-26 07:00:28 +02:00
Andrew Bradford
c3f8318f33 am335x_evm: Enable use of UART{1,2,3,4,5}
Add targets of am335x_evm_uart{1,2,3,4,5} to have serial input/output on
UART{1,2,3,4,5} for use with the Beaglebone RS232 cape, am335x_evm
daughterboard, and other custom configurations.

Modify target for am335x_evm to include SERIAL1 and CONS_INDEX=1
options in order to clarify UART selection requirements.

Signed-off-by: Andrew Bradford <andrew@bradfordembedded.com>
2012-10-25 14:54:50 -07:00
Andrew Bradford
96708a0605 serial: ns16550: Enable COM5 and COM6
Increase the possible number of ns16550 serial devices from 4 to 6.

Signed-off-by: Andrew Bradford <andrew@bradfordembedded.com>
2012-10-25 14:54:50 -07:00
Andrew Bradford
6422b70bd5 am33xx: Enable UART{1,2,3,4,5} pin-mux
If configured to use UART{1,2,3,4,5} such as on the Beaglebone RS232
cape or on the am335x_evm daughterboard, enable the proper pin-muxing.

Signed-off-by: Andrew Bradford <andrew@bradfordembedded.com>
2012-10-25 14:54:50 -07:00
Andrew Bradford
25164218b7 am33xx: Enable UART{1,2,3,4,5} clocks
If configured to use UART{1,2,3,4,5} such as on the Beaglebone RS232
cape or the am335x_evm daughterboard, enable the required clocks for
the UART in use.

Signed-off-by: Andrew Bradford <andrew@bradfordembedded.com>
2012-10-25 14:44:24 -07:00
Stephen Warren
5e8f98319d FAT: implement fat_set_blk_dev(), convert cmd_fat.c
This makes the FAT filesystem API more consistent with other block-based
filesystems. If in the future standard multi-filesystem commands such as
"ls" or "load" are implemented, having FAT work the same way as other
filesystems will be necessary.

Convert cmd_fat.c to the new API, so the code looks more like other files
implementing the same commands for other filesystems.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
2012-10-25 12:07:47 -07:00
Stephen Warren
a1687b858e FAT: initialize all fields in cur_part_info, simplify init
cur_part_info.{name,type} are strings. So, we don't need to memset()
the entire thing, just put the NULL-termination in the first byte.

Add missing initialization of the bootable and uuid fields.

None of these fields are actually used by fat.c. However, since it
stores the entire disk_partition_t, we should make sure that all fields
are valid.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
2012-10-25 12:07:45 -07:00
Stephen Warren
461f86e696 FAT: remove cur_part_nr
A future patch will implement the more standard filesystem API
fat_set_blk_dev(). This API has no way to know which partition number
the partition represents. Equally, future DM rework will make the
concept of partition number harder to pass around.

So, simply remove cur_part_nr from fat.c; its only use is in a
diagnostic printf, and the context where it's printed should make it
obvious which partition is referred to anyway (since the partition ID
would come from the user command-line that caused it).

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
2012-10-25 12:07:41 -07:00
Kim Phillips
d07e7f9b3d drivers/serial/serial_ns16550.c: sparse fixes
serial_ns16550.c:222:1: warning: symbol 'eserial1_init' was not declared. Should it be static?
serial_ns16550.c:222:1: warning: symbol 'eserial1_setbrg' was not declared. Should it be static?
serial_ns16550.c:222:1: warning: symbol 'eserial1_getc' was not declared. Should it be static?
serial_ns16550.c:222:1: warning: symbol 'eserial1_tstc' was not declared. Should it be static?
serial_ns16550.c:222:1: warning: symbol 'eserial1_putc' was not declared. Should it be static?
serial_ns16550.c:222:1: warning: symbol 'eserial1_puts' was not declared. Should it be static?
serial_ns16550.c:225:1: warning: symbol 'eserial2_init' was not declared. Should it be static?
serial_ns16550.c:225:1: warning: symbol 'eserial2_setbrg' was not declared. Should it be static?
serial_ns16550.c:225:1: warning: symbol 'eserial2_getc' was not declared. Should it be static?
serial_ns16550.c:225:1: warning: symbol 'eserial2_tstc' was not declared. Should it be static?
serial_ns16550.c:225:1: warning: symbol 'eserial2_putc' was not declared. Should it be static?
serial_ns16550.c:225:1: warning: symbol 'eserial2_puts' was not declared. Should it be static?
serial_ns16550.c:228:1: warning: symbol 'eserial3_init' was not declared. Should it be static?
serial_ns16550.c:228:1: warning: symbol 'eserial3_setbrg' was not declared. Should it be static?
serial_ns16550.c:228:1: warning: symbol 'eserial3_getc' was not declared. Should it be static?
serial_ns16550.c:228:1: warning: symbol 'eserial3_tstc' was not declared. Should it be static?
serial_ns16550.c:228:1: warning: symbol 'eserial3_putc' was not declared. Should it be static?
serial_ns16550.c:228:1: warning: symbol 'eserial3_puts' was not declared. Should it be static?
serial_ns16550.c:231:1: warning: symbol 'eserial4_init' was not declared. Should it be static?
serial_ns16550.c:231:1: warning: symbol 'eserial4_setbrg' was not declared. Should it be static?
serial_ns16550.c:231:1: warning: symbol 'eserial4_getc' was not declared. Should it be static?
serial_ns16550.c:231:1: warning: symbol 'eserial4_tstc' was not declared. Should it be static?
serial_ns16550.c:231:1: warning: symbol 'eserial4_putc' was not declared. Should it be static?
serial_ns16550.c:231:1: warning: symbol 'eserial4_puts' was not declared. Should it be static?

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2012-10-25 12:06:21 -07:00
Kim Phillips
62f730fffd drivers/i2c/fsl_i2c.c: sparse fix
fsl_i2c.c:217:14: warning: symbol 'get_i2c_clock' was not declared. Should it be static?

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Acked-by: Heiko Schocher <hs@denx.de>
2012-10-25 12:06:21 -07:00
Peter Korsgaard
c7d35bef25 am33xx/ddr_defs.h: rename DDR2/DDR3 defines to their actual part numbers
So other parts can be added.

Signed-off-by: Peter Korsgaard <peter.korsgaard@barco.com>
2012-10-25 11:31:38 -07:00
Peter Korsgaard
c00f69dbcd am33xx: support board specific ddr settings
Move the hardcoded ddr2/ddr3 settings for the ti boards to board code,
so other boards can use different types/timings.

Signed-off-by: Peter Korsgaard <peter.korsgaard@barco.com>
[trini: Make apply with rtc32k_enable() in the file]
Signed-off-by: Tom Rini <trini@ti.com>
2012-10-25 11:31:38 -07:00
Peter Korsgaard
7f26a5a26f am33xx: move generic parts of pinmux handling out from board/ti/am335x
So they are available for other boards.

Signed-off-by: Peter Korsgaard <peter.korsgaard@barco.com>
2012-10-25 11:31:37 -07:00
Peter Korsgaard
75a23880a5 am33xx/board: use cpu_mmc_init() for default mmc initialization
So platforms can override it with board_mmc_init() if needed.

Signed-off-by: Peter Korsgaard <peter.korsgaard@barco.com>
2012-10-25 11:31:37 -07:00
Peter Korsgaard
e363426e99 am33xx: move ti i2c baseboard header handling to board/ti/am335x/
The i2c header is specific to ti(-derived) boards, and not generic for all
am335x boards.

Signed-off-by: Peter Korsgaard <peter.korsgaard@barco.com>
[trini: Make re-apply with rtc32k_enable() applied]
Signed-off-by: Tom Rini <trini@ti.com>
2012-10-25 11:31:36 -07:00
Peter Korsgaard
c50cce2758 am33xx/board.c: make wdtimer/uart_base static
Only used here (and uart_base only for SPL).

Signed-off-by: Peter Korsgaard <peter.korsgaard@barco.com>
2012-10-25 11:30:50 -07:00
Tom Rini
69916bcf71 am33xx: Add SPI SPL as an option
Add the required config.mk logic for this SoC as well as the BOOT_DEVICE
define.  Finally, enable the options on the am335x_evm.

Signed-off-by: Tom Rini <trini@ti.com>
2012-10-25 11:30:50 -07:00
Tom Rini
79b9ebb700 omapimage: Add support for byteswapped SPI images
Add MLO.byteswap as a target to spl/Makefile and un-guard the first MLO
rule so we don't have to duplicate it.

Signed-off-by: Tom Rini <trini@ti.com>
2012-10-25 11:30:50 -07:00
Peter Korsgaard
22cbeed454 omap3_spi: introduce CONFIG_OMAP3_SPI_D0_D1_SWAPPED
D0/D1 Swapped or not is a board property, not anything specific to
the am33xx SoC, so add a custom define for it.

At the same time correct the bit handling for the swapped mode
(DPE0 should be cleared and SI/DPE1 set).

Signed-off-by: Peter Korsgaard <peter.korsgaard@barco.com>
2012-10-25 11:30:50 -07:00
Stefano Babic
8f1fae26a7 OMAP3: add video support to the mcx board
Add video support to the board with the display
focaltech etm070003dh6.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2012-10-25 11:30:50 -07:00
Stefano Babic
60c41d907e VIDEO: add macro to set LCD size for DSS driver
Signed-off-by: Stefano Babic <sbabic@denx.de>
Acked-by: Anatolij Gustschin <agust@denx.de>
2012-10-25 11:30:49 -07:00
Stefano Babic
8c735b9909 OMAP3: mcx: updated to new hardware revision
Some GPIOs differ in the new revision board.
Previous revision are considered obsolete and
they will not anymore supported.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2012-10-25 11:30:49 -07:00
Stefano Babic
e47c9e8608 OMAP3: updated pinmux and environment for new revision of mcx board
The mcx board was slightly modified and the pinmux must be updated.
There is no need to support the old board, that becomes obsolete.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2012-10-25 11:30:49 -07:00
Stefano Babic
9f67054014 OMAP3: mt_ventoux: power on USB at startup
Updated revision of the board uses GPIOs to activate
the USB ports.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2012-10-25 11:30:49 -07:00
Vaibhav Hiremath
000820b583 am335x: Enable RTC 32K OSC clock
In order to support low power state, you must source kernel system
timers to persistent clock, available across suspend/resume.  In case of
AM335x device, the only source we have is, RTC32K, available in
wakeup/always-on domain.  Having said that, during validation it has
been observed that, RTC clock need couple of seconds delay to stabilize
the RTC OSC clock; and such a huge delay is not acceptable in kernel
especially during early init and also it will impact quick/fast boot
use-cases.

So, RTC32k OSC enable dependency has been shifted to
SPL/first-bootloader.

Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>
2012-10-25 11:30:22 -07:00
Alison Wang
186fc4db26 ColdFire: Add Freescale MCF54418TWR ColdFire development board support
Add Freescale MCF54418TWR ColdFire development board support.

Signed-off-by: TsiChung Liew <tsicliew@gmail.com>
Signed-off-by: Jason Jin <Jason.jin@freescale.com>
Signed-off-by: Alison Wang <b18965@freescale.com>
2012-10-24 22:27:46 +08:00
Alison Wang
45370e1836 ColdFire: Add MCF5441x CPU support
Add MCF5441x CPU support.

The MCF5441x devices are a family of highly-integrated 32-bit
microprocessors based on the Version 4m ColdFire microarchitecture,
comprising of the V4 integer core, memory management unit(MMU) and
enchanced multiply-accumulate unit(EMAC).

Signed-off-by: TsiChung Liew <tsicliew@gmail.com>
Signed-off-by: Jason Jin <Jason.jin@freescale.com>
Signed-off-by: Alison Wang <b18965@freescale.com>
2012-10-24 22:27:46 +08:00
Alison Wang
7adbd11e78 ColdFire: Fix unused variable in cpu_init.c
Fix the following build warnings in cpu_init.c:

cpu_init.c: In function 'cpu_init_f':
cpu_init.c:47:9: warning: unused variable 'pll'
cpu_init.c:46:10: warning: unused variable 'fbcs'
cpu_init.c:44:10: warning: unused variable 'scm1'

Signed-off-by: Alison Wang <b18965@freescale.com>
2012-10-24 22:27:46 +08:00
Gerlando Falauto
c4d22de817 km83xx: add kmvect1 board
Add support for the new kmvect1 board powered by the mpc8309 processor.
As this board is very similar to the existing suvd3, instead of adding a
new config header file, just add a new config option to suvd3.h

Signed-off-by: Gerlando Falauto <gerlando.falauto@keymile.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2012-10-23 15:23:26 -05:00
Gerlando Falauto
6967840b83 km83xx: add common support for km8309 boards
Add support for Keymile boards based on mpc8309
(it would be only kmvect1 for now)

Signed-off-by: Gerlando Falauto <gerlando.falauto@keymile.com>
[#elseif -> #if to allow kmcoge5ne and kmeter1 to build successfully]
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2012-10-23 15:23:26 -05:00
Gerlando Falauto
a88731a6c2 mpc83xx: add support for mpc8309
This processor, though very similar to other members of the
PowerQUICC II Pro family (namely 8308, 8360 and 832x), provides
yet another feature set than any supported sibling.

Signed-off-by: Gerlando Falauto <gerlando.falauto@keymile.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2012-10-23 15:23:26 -05:00
Gerlando Falauto
8afad91f15 cleanup: introduce CONFIG_MPC830x
Introduce a new configuration token CONFIG_MPC830x to be shared among
mpc8308 and mpc8309. Define it for existing 8308 boards, and refactor
existing common code so to make future introduction of 8309 simpler.

Signed-off-by: Gerlando Falauto <gerlando.falauto@keymile.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2012-10-23 15:23:25 -05:00
Gerlando Falauto
4b5282de99 cleanup: use CONFIG_QE instead of CONFIG_MPC8360 || CONFIG_MPC832x
simplify #if defined(CONFIG_MPC8360) || defined(CONFIG_MPC832x)
for qe variables
with #if defined(CONFIG_QE)

Signed-off-by: Gerlando Falauto <gerlando.falauto@keymile.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2012-10-23 15:23:25 -05:00
Gerlando Falauto
91eb52ade2 cosmetic: suvd3: align #defines
Signed-off-by: Gerlando Falauto <gerlando.falauto@keymile.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2012-10-23 15:23:25 -05:00
Igor Grinberg
3530a35d74 cm-t35: clean unused defines from config
Neither cm-t35, nor cm-t3730 is using OneNAND or flash.
Remove the related defines from config file.

Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
2012-10-23 08:33:17 -07:00
Andrew Bradford
669681104d configs: Fix usage of mmc rescan
Fix usage of 'mmc rescan' by many configs.  Proper use is
'mmc dev ${mmcdev}; mmc rescan' to set the mmc device and then rescan
the device.  'mmc rescan' itself does not take any arguments.

Signed-off-by: Andrew Bradford <andrew@bradfordembedded.com>
2012-10-23 08:33:17 -07:00
Joel A Fernandes
391a741162 am33xx: Enable DDR3 for DDR3 version of beaglebone
DDR3 support is tested and working with beaglebone hardware. Include a check
for this board type and configure DDR3. The timings and other configuration
match EVM SK.

Signed-off-by: Joel A Fernandes <joelagnel@ti.com>
Acked-by: Jason Kridner <jdk@ti.com>
2012-10-23 08:33:17 -07:00
Pankaj Bharadiya
3f0be8ea92 USB: musb_udc: Make musb_peri_rx_ep check for MUSB_RXCSR_RXPKTRDY
The endpoint rx count register value will be zero if it is read before
receive packet ready bit (PERI_RXCSR:RXPKTRDY) is set.

Check for the receive packet ready bit (PERI_RXCSR:RXPKTRDY) before
reading endpoint rx count register. Proceed with rx count read and
FIFO read only if RXPKTRDY bit is set.

Signed-off-by: Pankaj Bharadiya <pankaj.bharadiya@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>
2012-10-23 08:33:17 -07:00
Tom Rini
71724830b4 Merge branch 'master' of git://git.denx.de/u-boot-fdt 2012-10-22 19:54:48 -07:00
Gerald Van Baren
cae4a8a2a8 Merge branch 'next' 2012-10-22 20:42:09 -04:00
Tom Rini
c7656bab41 Merge branch 'master' of git://www.denx.de/git/u-boot-mpc85xx 2012-10-22 16:54:38 -07:00
Tom Rini
bdc3ff6e4f Merge branch 'master' of git://www.denx.de/git/u-boot-mmc 2012-10-22 16:53:19 -07:00
Andy Fleming
23028d69e9 85xx: Protect timeout_save variable with ifdefs
The timeout_save variable was only used by the DDR111_134
erratum code. It was being set, but never used. Newer compilers
will actually complain about this.

Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-10-22 17:28:18 -05:00
Liu Gang
19e4a00965 powerpc/boot: Change the compile macro for SRIO & PCIE boot master module
Currently, the SRIO and PCIE boot master module will be compiled into the
u-boot image if the macro "CONFIG_FSL_CORENET" has been defined. And this
macro has been included by all the corenet architecture platform boards.
But in fact, it's uncertain whether all corenet platform boards support
this feature.

So it may be better to get rid of the macro "CONFIG_FSL_CORENET", and add
a special macro for every board which can support the feature. This
special macro will be defined in the header file
"arch/powerpc/include/asm/config_mpc85xx.h". It will decide if the SRIO
and PCIE boot master module should be compiled into the board u-boot image.

Signed-off-by: Liu Gang <Gang.Liu@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-10-22 15:52:46 -05:00
Mingkai Hu
d8812bdbba phylib: Enable SMSC LAN87xx PHY support
LAN8720 PHY is used on Freescale C2X0QDS board.

Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-10-22 15:52:46 -05:00
Shaohui Xie
9905757e29 powerpc/espi: remove write command length check
Current espi controller driver assumes the command length of write command is
not equal to '1', it was made based on SPANSION SPI flash, but some SPI flash
driver such as SST does use write command length as '1', so write command on
SST SPI flash will not work. And the length check for write command is not
necessary for SPANSION, though it's harmless for SPANSION, it will stop write
operation on flashes like SST, so we remove the check.

Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-10-22 15:52:46 -05:00
shaohui xie
1f3bd3e239 powerpc/fm: fix TBI PHY address settings
TBI PHY address (TBIPA) register is set in general frame manager
phy init funciton dtsec_init_phy() in drivers/net/fm/eth.c, and
it is supposed to set TBIPA on FM1@DTSEC1 in case of FM1@DTSEC1
isn't used directly, which provides MDIO for other ports. So
following code is wrong in case of FM2, which has a different
mac base.

struct dtsec *regs = (struct dtsec *)fm_eth->mac->base;
/* Assign a Physical address to the TBI */
out_be32(&regs->tbipa, CONFIG_SYS_TBIPA_VALUE);

Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-10-22 15:52:46 -05:00
Haiying Wang
990e1a8ce1 poweprc/85xx: add QMan frequency info and fdt fixup.
Starting from QMan3.0, the QMan clock cycle needs be exposed so that the kernel
driver can use it to calculate the shaper prescaler and rate.

Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-10-22 15:52:46 -05:00
Haiying Wang
b0e8115741 mpc85xx/portals: Add qman and bman ip_cfg field into portal info
Because QMan3.0 and BMan2.1 used ip_cfg in ip_rev_2 register to differ the
total portal number, buffer pool number etc, we can use this info to limit
those resources in kernel driver.

Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-10-22 15:52:46 -05:00
York Sun
ee52b188ca powerpc/t4qds: Add T4QDS board
The T4240QDS is a high-performance computing evaluation, development and
test platform supporting the T4240 QorIQ Power Architecture™ processor.

SERDES Connections
  32 lanes grouped into four 8-lane banks
  Two “front side” banks dedicated to Ethernet
  Two “back side” banks dedicated to other protocols
DDR Controllers
  Three independant 64-bit DDR3 controllers
  Supports rates up to 2133 MHz data-rate
  Supports two DDR3/DDR3LP UDIMM/RDIMMs per controller
QIXIS System Logic FPGA

Each DDR controller has two DIMM slots. The first slot of each controller
has up to 4 chip selects to support single-, dual- and quad-rank DIMMs.
The second slot has only 2 chip selects to support single- and dual-rank
DIMMs. At any given time, up to total 4 chip selects can be used.

Detail information can be found in doc/README.t4qds

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-10-22 15:52:46 -05:00
York Sun
98ffa19053 powerpc/mpc85xx: Add CONFIG_DDR_CLK_FREQ for corenet platform
New corenet platforms with chassis2 have separated DDR clock inputs. Use
CONFIG_DDR_CLK_FREQ for DDR clock. This patch also cleans up the logic of
detecting and displaying synchronous vs asynchronous mode.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-10-22 14:31:33 -05:00
York Sun
ffd06e0231 powerpc/mpc85xx: Rewrite spin table to comply with ePAPR v1.1
Move spin table to cached memory to comply with ePAPR v1.1.
Load R3 with 64-bit value if CONFIG_SYS_PPC64 is defined.

'M' bit is set for DDR TLB to maintain cache coherence.

See details in doc/README.mpc85xx-spin-table.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-10-22 14:31:32 -05:00
York Sun
3f0997b325 powerpc/mpc85xx: Remove R6 from spin table
R6 was in ePAPR draft version but was dropped in official spec.
Removing it to comply.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-10-22 14:31:31 -05:00
York Sun
82968a7ab5 powerpc/mpc8xxx: Fix DDR SPD failed message
Since empty DIMM slot is allowed on other than the first slot, remove the
error message if SPD is not found in this case.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-10-22 14:31:31 -05:00
York Sun
89b7809568 powerpc/mpc8xxx: Add auto select bank interleaving mode
Based on populated DIMMs, automatically select from cs0_cs1_cs2_cs3 or
cs0_cs1 interleaving, or non-interleaving if not available.

Fix the message of interleaving disabled if controller interleaving
is enabled but DIMMs don't support it.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-10-22 14:31:30 -05:00
York Sun
a1d558a20f powerpc/mpc85xx: Add workaround for DDR erratum A004934
After DDR controller is enabled, it performs a calibration for the
transmit data vs DQS paths. During this calibration, the DDR controller
may make an inaccurate calculation, resulting in a non-optimal tap point.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-10-22 14:31:29 -05:00
York Sun
eb53941206 powerpc/mpc85xx: software workaround for DDR erratum A-004468
Boot space translation utilizes the pre-translation address to select
the DDR controller target. However, the post-translation address will be
presented to the selected DDR controller. It is possible that the pre-
translation address selects one DDR controller but the post-translation
address exists in a different DDR controller when using certain DDR
controller interleaving modes. The device may fail to boot under these
circumstances. Note that a DDR MSE error will not be detected since DDR
controller bounds registers are programmed to be the same when configured
for DDR controller interleaving.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-10-22 14:31:28 -05:00
York Sun
f31cfd1925 powerpc/mpc8xxx: Fix DDR initialization waiting for D_INIT
When ECC is enabled, DDR controller needs to initialize the data and ecc.
The wait time can be calcuated with total memory size, bus width, bus speed
and interleaving mode. If it went wrong, it is bettert to timeout than
waiting for D_INIT to clear, where it probably hangs.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-10-22 14:31:27 -05:00
York Sun
123922b1e5 powerpc/mpc8xxx: Fix DDR driver handling quad-rank DIMMs and address calculation
Fix handling quad-rank DIMMs in a system with two DIMM slots and first
slot supports both dual-rank DIMM and quad-rank DIMM.

For systems with quad-rank DIMM and double dual-rank DIMMs, cs_config
registers need to be enabled to maintain proper ODT operation. The
inactive CS should have bnds registers cleared.

Fix the turnaround timing for systems with all chip-selects enabled. This
wasn't an issue before because DDR was running lower than 1600MT/s with
this interleaving mode.

Fix DDR address calculation. It wasn't an issue until we have multiple
controllers with each more than 4GB and interleaving is disabled.

It also fixes the message of DDR: 2 GiB (DDR3, 64-bit, CL=0.5, ECC off)
when debugging DDR and first DDR controller is disabled. With the fix,
the first enabled controller information will be displayed.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-10-22 14:31:26 -05:00
York Sun
57495e4e5e powerpc/mpc8xxx: Update DDR registers
DDRC ver 4.7 adds DDR_SLOW bit in sdram_cfg_2 register. This bit needs to be
set for speed lower than 1250MT/s.

CDR1 and CDR2 are control driver registers. ODT termination valueis for
IOs are defined. Starting from DDRC 4.7, the decoding of ODT for IOs is
	000 -> Termsel off
	001 -> 120 Ohm
	010 -> 180 Ohm
	011 -> 75 Ohm
	100 -> 110 Ohm
	101 -> 60 Ohm
	110 -> 70 Ohm
	111 -> 47 Ohm

Add two write leveling registers. Each QDS now has its own write leveling
start value. In case of zero value, the value of QDS0 will be used. These
values are board-specific and are set in board files.

Extend DDR register timing_cfg_1 to have 4 bits for each field.

DDR control driver registers and write leveling registers are added to
interactive debugging for easy access.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-10-22 14:31:26 -05:00
Roy Zang
111fd19e3b fm/mEMAC: add mEMAC frame work
The multirate ethernet media access controller (mEMAC) interfaces to
10Gbps and below Ethernet/IEEE 802.3 networks via either RGMII/RMII
interfaces or XAUI/XFI/SGMII/QSGMII using the high-speed SerDes interface.

Signed-off-by: Sandeep Singh <Sandeep@freescale.com>
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-10-22 14:31:25 -05:00
York Sun
d2404141f9 powerpc/mpc85xx: Add B4860 and variant SoCs
Add support for Freescale B4860 and variant SoCs. Features of B4860 are
(incomplete list):

Six fully-programmable StarCore SC3900 FVP subsystems, divided into three
    clusters-each core runs up to 1.2 GHz, with an architecture highly
    optimized for wireless base station applications
Four dual-thread e6500 Power Architecture processors organized in one
    cluster-each core runs up to 1.8 GHz
Two DDR3/3L controllers for high-speed, industry-standard memory interface
    each runs at up to 1866.67 MHz
MAPLE-B3 hardware acceleration-for forward error correction schemes
    including Turbo or Viterbi decoding, Turbo encoding and rate matching,
    MIMO MMSE equalization scheme, matrix operations, CRC insertion and
    check, DFT/iDFT and FFT/iFFT calculations, PUSCH/PDSCH acceleration,
    and UMTS chip rate acceleration
CoreNet fabric that fully supports coherency using MESI protocol between
    the e6500 cores, SC3900 FVP cores, memories and external interfaces.
    CoreNet fabric interconnect runs at 667 MHz and supports coherent and
    non-coherent out of order transactions with prioritization and
    bandwidth allocation amongst CoreNet endpoints.
Data Path Acceleration Architecture, which includes the following:
  Frame Manager (FMan), which supports in-line packet parsing and general
    classification to enable policing and QoS-based packet distribution
  Queue Manager (QMan) and Buffer Manager (BMan), which allow offloading
    of queue management, task management, load distribution, flow ordering,
    buffer management, and allocation tasks from the cores
  Security engine (SEC 5.3)-crypto-acceleration for protocols such as
    IPsec, SSL, and 802.16
  RapidIO manager (RMAN) - Support SRIO types 8, 9, 10, and 11 (inbound and
    outbound). Supports types 5, 6 (outbound only)
Large internal cache memory with snooping and stashing capabilities for
    bandwidth saving and high utilization of processor elements. The
    9856-Kbyte internal memory space includes the following:
  32 Kbyte L1 ICache per e6500/SC3900 core
  32 Kbyte L1 DCache per e6500/SC3900 core
  2048 Kbyte unified L2 cache for each SC3900 FVP cluster
  2048 Kbyte unified L2 cache for the e6500 cluster
  Two 512 Kbyte shared L3 CoreNet platform caches (CPC)
Sixteen 10-GHz SerDes lanes serving:
  Two Serial RapidIO interfaces. Each supports up to 4 lanes and a total
    of up to 8 lanes
  Up to 8-lanes Common Public Radio Interface (CPRI) controller for glue-
    less antenna connection
  Two 10-Gbit Ethernet controllers (10GEC)
  Six 1G/2.5-Gbit Ethernet controllers for network communications
  PCI Express controller
  Debug (Aurora)
Two OCeaN DMAs
Various system peripherals
182 32-bit timers

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-10-22 14:31:24 -05:00
York Sun
9e75875849 powerpc/mpc85xx: Add T4240 SoC
Add support for Freescale T4240 SoC. Feature of T4240 are
(incomplete list):

12 dual-threaded e6500 cores built on Power Architecture® technology
  Arranged as clusters of four cores sharing a 2 MB L2 cache.
  Up to 1.8 GHz at 1.0 V with 64-bit ISA support (Power Architecture
    v2.06-compliant)
  Three levels of instruction: user, supervisor, and hypervisor
1.5 MB CoreNet Platform Cache (CPC)
Hierarchical interconnect fabric
  CoreNet fabric supporting coherent and non-coherent transactions with
    prioritization and bandwidth allocation amongst CoreNet end-points
  1.6 Tbps coherent read bandwidth
  Queue Manager (QMan) fabric supporting packet-level queue management and
    quality of service scheduling
Three 64-bit DDR3/3L SDRAM memory controllers with ECC and interleaving
    support
  Memory prefetch engine (PMan)
Data Path Acceleration Architecture (DPAA) incorporating acceleration for
    the following functions:
  Packet parsing, classification, and distribution (Frame Manager 1.1)
  Queue management for scheduling, packet sequencing, and congestion
    management (Queue Manager 1.1)
  Hardware buffer management for buffer allocation and de-allocation
    (BMan 1.1)
  Cryptography acceleration (SEC 5.0) at up to 40 Gbps
  RegEx Pattern Matching Acceleration (PME 2.1) at up to 10 Gbps
  Decompression/Compression Acceleration (DCE 1.0) at up to 20 Gbps
  DPAA chip-to-chip interconnect via RapidIO Message Manager (RMAN 1.0)
32 SerDes lanes at up to 10.3125 GHz
Ethernet interfaces
  Up to four 10 Gbps Ethernet MACs
  Up to sixteen 1 Gbps Ethernet MACs
  Maximum configuration of 4 x 10 GE + 8 x 1 GE
High-speed peripheral interfaces
  Four PCI Express 2.0/3.0 controllers
  Two Serial RapidIO 2.0 controllers/ports running at up to 5 GHz with
    Type 11 messaging and Type 9 data streaming support
  Interlaken look-aside interface for serial TCAM connection
Additional peripheral interfaces
  Two serial ATA (SATA 2.0) controllers
  Two high-speed USB 2.0 controllers with integrated PHY
  Enhanced secure digital host controller (SD/MMC/eMMC)
  Enhanced serial peripheral interface (eSPI)
  Four I2C controllers
  Four 2-pin or two 4-pin UARTs
  Integrated Flash controller supporting NAND and NOR flash
Two eight-channel DMA engines
Support for hardware virtualization and partitioning enforcement
QorIQ Platform's Trust Architecture 1.1

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-10-22 14:31:23 -05:00
Andy Fleming
f311838ded powerpc/mpc85xx: Add T4 device definitions
The T4 has added devices to previous corenet implementations:

* SEC has 3 more DECO units
* New PMAN device
* New DCE device

This doesn't add full support for the new devices. Just some
preliminary support.

Move PMAN LIODN to upper half of register

Despite having only one LIODN, the PMAN LIODN is stored in the
upper half of the register. Re-use the 2-LIODN code and just
set the LIODN as if the second one is 0. This results in the
actual LIODN being written to the upper half of the register.

Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-10-22 14:31:22 -05:00
Shaveta Leekha
aa42cb71fa board/freescale/common: VSC3316/VSC3308 initialization code
Add code for configuring VSC3316/3308 crosspoint switches
Add README to understand the APIs

   - VSC 3316/3308 is a low-power, low-cost asynchronous crosspoint switch
     capable of data rates upto 11.5Gbps. VSC3316 has 16 input and 16
     output ports whereas VSC3308 has 8 input and 8 output ports.
     Programming of these devices are performed by two-wire or four-wire
     serial interface.

Signed-off-by: Shaveta Leekha <shaveta@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-10-22 14:31:21 -05:00
York Sun
379c5145ef powerpc/corenet2: fix mismatch DDR sync bit from RCW
Corenet 2nd generation Chassis doesn't have ddr_sync bit in RCW. Only
async mode is supported.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-10-22 14:31:20 -05:00
York Sun
d1001e3f0c powerpc/corenet2: Add SerDes for corenet2
Create new files to handle 2nd generation Chassis as the registers are
organized differently.

 - Add SerDes protocol parsing and detection
 - Add support of 4 SerDes
 - Add CPRI protocol in fsl_serdes.h
	The Common Public Radio Interface (CPRI) is publicly available
	specification that standardizes the protocol interface between the
	radio equipment control (REC) and the radio equipment (RE) in wireless
	basestations. This allows interoperability of equipment from different
	vendors,and preserves the software investment made by wireless service
	providers.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-10-22 14:31:19 -05:00
York Sun
fd3cebd020 powerpc/mpc85xx: Add RCW bits and registers for SerDes for corenet2
Corenet 2nd generation Chassis has different RCW and registers for SerDes.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-10-22 14:31:18 -05:00
York Sun
92230d49da powerpc/e6500: Move QCSP registers for QMan v3
The QCSP registers are expanded and moved from offset 0 to offset 0x1000
for SoCs with QMan v3.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-10-22 14:31:18 -05:00
York Sun
f8f85b049c powerpc/mpc85xx: expand SERDES reference clock select bit
Expand the reference clock select to three bits
000: 100 MHz
001: 125 MHz
010: 156.25MHz
011: 150 MHz
100: 161.1328125 MHz
All others reserved

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-10-22 14:31:17 -05:00
York Sun
9a653a9810 powerpc/mpc85xx: Fix core cluster PLL calculation for Chassis generation 2
Corenet based SoCs have different core clocks starting from Chassis
generation 2. Cores are organized into clusters. Each cluster has up to
4 cores sharing same clock, which can be chosen from one of three PLLs in
the cluster group with one of the devisors /1, /2 or /4. Two clusters are
put together as a cluster group. These two clusters share the PLLs but may
have different divisor. For example, core 0~3 are in cluster 1. Core 4~7
are in cluster 2. Core 8~11 are in cluster 3 and so on. Cluster 1 and 2
are cluster group A. Cluster 3 and 4 are in cluster group B. Cluster group
A has PLL1, PLL2, PLL3. Cluster group B has PLL4, PLL5. Core 0~3 may have
PLL1/2, core 4~7 may have PLL2/2. Core 8~11 may have PLL4/1.

PME and FMan blocks can take different PLLs, configured by RCW.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-10-22 14:31:16 -05:00
York Sun
2f1712b275 powerpc/mpc85xx: check number of cores
Panic if the number of cores is more than CONFIG_MAX_CPUS because it will
surely overflow gd structure.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-10-22 14:31:15 -05:00
York Sun
f77329cfcf powerpc/mpc85xx: change RCW MEM_PLL_PLAT for Chassis generation 2
Chassis generation 2 has different mask and shift. Use macro instead of
magic numbers.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-10-22 14:31:15 -05:00
York Sun
6d2b9da19c powerpc/mpc85xx: Enable L2 at the beginning of U-boot for E6500
Using E6500 L1 cache as initram requires L2 cache enabled.
Add l2-cache cluster enabling.

Setup stash id for L1 cache as (coreID) * 2 + 32 + 0
Setup stash id for L2 cache as (cluster) * 2 + 32 + 1
Stash id for L2 is only set for Chassis 2.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-10-22 14:31:15 -05:00
York Sun
69c7826759 powerpc/mpc85xx: Introduce new macros to add and delete TLB entries
These assembly macros simplify codes to add and delete temporary TLB entries.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-10-22 14:31:15 -05:00
Kumar Gala
800c73c410 powerpc/85xx: Add determining and report IFC frequency
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-10-22 14:31:14 -05:00
York Sun
553ae6f8f2 powerpc/DPAA: Fix compiling error
FSL_HW_PORTAL_PME is used even when CONFIG_SYS_DPAA_PME is not defined.
Remove the #ifdef.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-10-22 14:31:14 -05:00
York Sun
a1e4318cff driver/pci: Fix compiling error
Fix compiling error in case CONFIG_SYS_PCIE2_MEM_VIRT or CONFIG_SYS_PCIE3_MEM_VIRT
not defined.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-10-22 14:31:14 -05:00
Shengzhou Liu
e4de13e38a powerpc/board: add present2 register definition for QIXIS
According to new QIXIS system definition, update QIXIS registers set
to add present2 register instead of obsolete ctl_sys2.

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-10-22 14:31:14 -05:00
Timur Tabi
4905443f1c powerpc/85xx: Add P5040 processor support
Add support for the Freescale P5040 SOC, which is similar to the P5020.
Features of the P5040 are:

Four P5040 single-threaded e5500 cores built
    Up to 2.4 GHz with 64-bit ISA support
    Three levels of instruction: user, supervisor, hypervisor
CoreNet platform cache (CPC)
    2.0 MB configures as dual 1 MB blocks hierarchical interconnect fabric
Two 64-bit DDR3/3L SDRAM memory controllers with ECC and interleaving
        support Up to 1600MT/s
    Memory pre-fetch engine
DPAA incorporating acceleration for the following functions
    Packet parsing, classification, and distribution (FMAN)
    Queue management for scheduling, packet sequencing and
    congestion management (QMAN)
    Hardware buffer management for buffer allocation and
    de-allocation (BMAN)
    Cryptography acceleration (SEC 5.2) at up to 40 Gbps SerDes
    20 lanes at up to 5 Gbps
    Supports SGMII, XAUI, PCIe rev1.1/2.0, SATA Ethernet interfaces
    Two 10 Gbps Ethernet MACs
    Ten 1 Gbps Ethernet MACs
High-speed peripheral interfaces
    Two PCI Express 2.0/3.0 controllers
Additional peripheral interfaces
    Two serial ATA (SATA 2.0) controllers
    Two high-speed USB 2.0 controllers with integrated PHY
    Enhanced secure digital host controller (SD/MMC/eMMC)
    Enhanced serial peripheral interface (eSPI)
    Two I2C controllers
    Four UARTs
    Integrated flash controller supporting NAND and NOR flash
DMA
    Dual four channel
Support for hardware virtualization and partitioning enforcement
    Extra privileged level for hypervisor support
QorIQ Trust Architecture 1.1
    Secure boot, secure debug, tamper detection, volatile key storage

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-10-22 14:31:13 -05:00
Laurentiu Tudor
71cfcef649 powerpc/p5040ds: add per pci endpoint liodn offset list
Add a new device tree property named "fsl,liodn-offset-list"
holding a list of per pci endpoint permitted liodn offsets.
This property is useful in virtualization scenarios
that implement per pci endpoint partitioning.
The final liodn of a partitioned pci endpoint is
calculated by the hardware, by adding these offsets
to pci controller's base liodn, stored in the
"fsl,liodn" property of its node.
The liodn offsets are interleaved to get better cache
utilization. As an example, given 3 pci controllers,
the following liodns are generated for the pci endpoints:
    pci0: 193 256 259 262 265 268 271 274 277
    pci1: 194 257 260 263 266 269 272 275 278
    pci2: 195 258 261 264 267 270 273 276 279

Signed-off-by: Laurentiu Tudor <Laurentiu.Tudor@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-10-22 14:31:13 -05:00
Timur Tabi
11860d888c powerpc/85xx: move SRIO configuration out of corenet_ds.h
The P5040 does not have SRIO, so don't put the SRIO definitions in
corenet_ds.h.  They belong in the board-specific header files.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-10-22 14:31:13 -05:00
Timur Tabi
fd946040f1 powerpc/85xx: define SRIO LIODN functions only if SRIO is defined
The P5040 does not have SRIO support, so there are no SRIO LIODNs.
Therefore, the functions that set the SRIO LIODNs should not be compiled.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-10-22 14:31:13 -05:00
Laurentiu Tudor
e389a377ee powerpc/85xx: introduce SET_PCI_LIODN_BASE, for setting PCI LIODNs
The liodn for the new PCIE controller included in P5040DS is no longer set
through a register in the guts register block but with one in the PCIE
register block itself.  Update the PCIE CCSR structure to add the new liodn
register and add a new dedicated SET_PCI_LIODN_BASE macro that puts
the liodn in the correct register.

Signed-off-by: Laurentiu Tudor <Laurentiu.Tudor@freescale.com>
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-10-22 14:31:12 -05:00
Timur Tabi
0c7e65f3d6 powerpc/mpc85xx: fix Unicode characters in release.S
Commit 709389b6 unintentionally used the Unicode version of the
apostrophy.  Replace it with the normal ASCII version.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-10-22 14:31:12 -05:00
Liu Gang
d59c557049 powerpc/srio: Workaround for srio erratrm a004034
Erratum: A-004034
Affects: SRIO

Description: During port initialization, the SRIO port performs
lane synchronization (detecting valid symbols on a lane) and
lane alignment (coordinating multiple lanes to receive valid data
across lanes). Internal errors in lane synchronization and lane
alignment may cause failure to achieve link initialization at
the configured port width.

An SRIO port configured as a 4x port may see one of these scenarios:

1.	One or more lanes fails to achieve lane synchronization.
	Depending on which lanes fail, this may result in downtraining
	from 4x to 1x on lane 0, 4x to 1x on lane R (redundant lane).

2.	The link may fail to achieve lane alignment as a 4x, even
	though all 4 lanes achieve lane synchronization, and downtrain
	to a 1x. An SRIO port configured as a 1x port may fail to complete
	port initialization (PnESCSR[PU] never deasserts) because of
	scenario 1.

Impact: SRIO port may downtrain to 1x, or may fail to complete
link initialization. Once a port completes link initialization
successfully, it will operate normally.

Signed-off-by: Liu Gang <Gang.Liu@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-10-22 14:31:12 -05:00
ramneek mehresh
9c889ece32 powerpc/mpc8xxx: Fix USB device-tree fixup
Fix usb device-tree fixup:
	- wrong modification of dr_mode and phy_type when
	  "usb1" is not mentioned inside hwconfig string;
	   now allows hwconfig strings like:
		"usb2:dr_mode=host,phy_type=ulpi"
	- add warning message for using usb_dr_mode
	  and usb_phy_type env variables (if either is used)

Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-10-22 14:31:12 -05:00
Ashok
bcf28c23f2 ARM : Remove unused CONFIG_DRIVER_SMC91111, CONFIG_DRIVER_LAN91C96
Remove unused CONFIG_DRIVER_SMC91111,CONFIG_DRIVER_LAN91C96,
if required implement smc_set_mac_addr() in board init.

Signed-off-by: Ashok Kumar Reddy <ashokkourla2000@gmail.com>
Acked-by: Tom Rini <trini@ti.com>
2012-10-22 08:33:52 -07:00
Ashok
860bde3fee omap2424:Rename CONFIG_DRIVER_LAN91C96 to CONFIG_LAN91C96 as CONFIG_DRIVER_LAN91C96 is obsolete.
Rename CONFIG_DRIVER_LAN91C96 to CONFIG_LAN91C9 as
CONFIG_DRIVER_LAN91C96 is obsolete.

Signed-off-by: Ashok Kumar Reddy <ashokkourla2000@gmail.com>
2012-10-22 08:31:57 -07:00
Ashok
3bb46d23f2 README : Rename CONFIG_DRIVER_SMC91111 to CONFIG_SMC91111, CONFIG_DRIVER_LAN91C96 to CONFIG_LAN91C96
Rename CONFIG_DRIVER_SMC91111 to CONFIG_SMC91111,
CONFIG_DRIVER_LAN91C96 to CONFIG_LAN91C96

Signed-off-by: Ashok Kumar Reddy <ashokkourla2000@gmail.com>
Reviewed-by: Tom Rini <trini@ti.com>
2012-10-22 08:29:56 -07:00
Simon Glass
af9f881a51 config: Enable CBFS, ext4 for coreboot
Enable Coreboot and EXT4 Filesystems on the coreboot board.

Signed-off-by: Simon Glass <sjg@chromium.org>
2012-10-22 08:29:55 -07:00
Gabe Black
84cd93272e fs: Add a Coreboot Filesystem (CBFS) driver and commands
This change adds CBFS support and some commands to use it to u-boot. These
commands are:

cbfsinit - Initialize CBFS support and pull all metadata into RAM. The end of
the ROM is an optional parameter which defaults to the standard 0xffffffff and
can be used to support multiple CBFSes in a system. The last one set up with
cbfsinit is the one that will be used.

cbfsinfo - Print information from the CBFS header.

cbfsls - Print out the size, type, and name of all the files in the current
CBFS. Recognized types are translated into symbolic names.

cbfsload - Load a file from CBFS into memory. Like the similar command for fat
filesystems, you can optionally provide a maximum size.

Support for CBFS is compiled in when the CONFIG_CMD_CBFS option is specified.

The CBFS driver can also be used programmatically from within u-boot.

If u-boot needs something out of CBFS very early before the heap is
configured, it won't be able to use the normal CBFS support which caches some
information in memory it allocates from the heap. The
cbfs_file_find_uncached function searches a CBFS instance without touching
the heap.

Signed-off-by: Gabe Black <gabeblack@google.com>
Signed-off-by: Stefan Reinauer <reinauer@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-10-22 08:29:55 -07:00
Taylor Hutt
9936be31fb disk: Address cast and format errors
This change addresses a few printf-formatting errors, and a typecast
error.

Signed-off-by: Taylor Hutt <thutt@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-10-22 08:29:55 -07:00
Gabe Black
0c9c8fb5ec disk: Make the disk partition code work with no specific partition types
Currently, if the disk partition code is compiled with all of the parition
types compiled out, it hits an #error which stops the build. This change
adjusts that file so that those functions will fall through to their defaults
in those cases instead of breaking the build. These functions are needed
because other code calls them, and that code is needed because other config
options are overly broad and bring in support we don't need along with
support we do.

Also reduce repetition of the 6-term #ifdef throughout the file.

Signed-off-by: Gabe Black <gabeblack@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-10-22 08:29:55 -07:00
Gabe Black
24a3fdd64d ide: Add printf format string for CONFIG_SYS_64BIT_LBA option
The size of an LBA type changes depending on this option. We need to
use a different printf() string in each case, so create a define for
this.

Signed-off-by: Gabe Black <gabeblack@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-10-22 08:29:55 -07:00
Marek Vasut
47444a27d2 kerneldoc: tmpl: Implement template for LG-arrays
Implement kerneldoc template for linker-generated arrays. This is
the first template in U-Boot that is used to generate kerneldoc
style documentation. This template is very basic.

Signed-off-by: Marek Vasut <marex@denx.de>
2012-10-22 08:29:55 -07:00
Marek Vasut
8b493a5236 common: Discard the __u_boot_cmd section
The command declaration now uses the new LG-array method to generate
list of commands. Thus the __u_boot_cmd section is now superseded and
redundant and therefore can be removed. Also, remove externed symbols
associated with this section from include/command.h .

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Cc: Mike Frysinger <vapier@gentoo.org>
2012-10-22 08:29:42 -07:00
Marek Vasut
6c7c946cad common: Convert the U-Boot commands to LG-arrays
This patch converts the old method of creating a list of command
onto the new LG-arrays code. The old u_boot_cmd section is converted
to new u_boot_list_cmd subsection and LG-array macros used as needed.

Minor adjustments had to be made to the common code to work with the
LG-array macros, mostly the fixup_cmdtable() calls are now passed the
ll_entry_start and ll_entry_count instead of linker-generated symbols.

The command.c had to be adjusted as well so it would use the newly
introduced LG-array API instead of directly using linker-generated
symbols.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Cc: Mike Frysinger <vapier@gentoo.org>
2012-10-22 08:29:42 -07:00
Marek Vasut
556751427b common: Add .u_boot_list into all linker files
Add section for the linker-generated lists into all possible linker
files, so that everyone can easily use these lists. This is mostly
a mechanical adjustment.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Cc: Mike Frysinger <vapier@gentoo.org>
2012-10-22 08:29:42 -07:00
Marek Vasut
42ebaae3a3 common: Implement support for linker-generated arrays
This patch adds support for linker-generated array. These arrays
are a generalization of the U-Boot command declaration approach.

Basically, the idea is to generate an array, where elements of the
array are statically initialized at compile time and each element
is declared separatelly at different place. Such array is assembled
together into continuous piece of memory by linker and a pointer to
it's first entry can then be retrieved via accessor.

The actual implementation relies on placing any variable that is to
represent an element of LG-array into particular subsection of the
.u_boot_list linker section . The subsection is determined by user
options. Once compiled, it is possible to dump all symbols placed
in .u_boot_list section and the subsections in which they should be
and generate appropriate bounds for each requested subsection of the
.u_boot_list section. Each such subsection thus contains __start and
__end entries at the begining and end respecitively.

This allows for simple run-time traversing of the array, since the
symbols are properly defined.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Cc: Mike Frysinger <vapier@gentoo.org>
2012-10-22 08:29:29 -07:00
Marek Vasut
97b24d3d51 common: Add symbol handling for generic lists into Makefile
This patch adds essential components for generation of the contents of
the linker section that is used by the linker-generated array. All of
the contents is held in a separate file, u-boot.lst, which is generated
at runtime just before U-Boot is linked.

The purpose of this code is to especially generate the appropriate
boundary symbols around each subsection in the section carrying the
linker-generated arrays. Obviously, the interim linker code for actual
placement of the variables into the section is generated too. The
generated file, u-boot.lst, is included into u-boot.lds via the linker
INCLUDE directive in u-boot.lds .

Adjustments are made in the Makefile and spl/Makefile so that the
u-boot.lds and u-boot-spl.lds depend on their respective .lst files.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Cc: Mike Frysinger <vapier@gentoo.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Tested-by: Joe Hershberger <joe.hershberger@ni.com>
2012-10-22 08:29:29 -07:00
Zang Roy-R61911
4e0be34a85 P4080/esdhc: make the P4080 ESDHC13 errata workaround conditional
P4080 Rev3.0 fixes ESDHC13 errata, so update the code to make the
workaround conditional.
In formal release document, the errata number should be ESDHC13 instead
of ESDHC136.

Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-10-22 03:04:28 -05:00
Prabhakar Kushwaha
9f26fd7947 board/freescale/common:QIXIS:Fix magic number usage
QIXIS FPGA layout defines the  address of registers but The actual register bit
implementation is board-specific,

So avoid use of magic numbers as it may vary across different boards's QIXIS
FPGA implementation.
Also, Avoid board specific defines in common/qixis.h

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-10-22 03:04:28 -05:00
Mark Marshall
320d53da60 powerpc mpc85xx: Only clear TSR:WIS in watchdog_reset.
We should only write TSR_WIS to the SPRN_TSR register in
reset_85xx_watchdog.

The old code would cause the timer interrupt to be acknowledged when the
watchdog was reset, and we would then get no more timer interrupts.
This bug would affect all mpc85xx boards that have the watchdog enabled.

Signed-off-by: Mark Marshall <Mark.Marshall@omicron.at>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-10-22 03:04:27 -05:00
Chris Packham
168e5bc409 mpc85xx: make gpio_direction_output respect value
Users of familiar with the Linux gpiolib API expect that value parameter
to gpio_direction_output reflects the initial state of the output pin.
gpio_direction_output was always driving the output low, now it drives
it high or low according to the value provided.

Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Cc: Kyle Moffett <Kyle.D.Moffett@boeing.com>
Cc: Andy Fleming <afleming@gmail.com>
Cc: Peter Tyser <ptyser@xes-inc.com>
Cc: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-10-22 03:03:16 -05:00
Minghuan Lian
505f3e6f2e fsl_pci: use 'Header Type' field to judge PCIE mode
The original code uses 'Programming Interface' field to judge if PCIE is
EP or RC mode, however, T4240 does not support this functionality.
According to PCIE specification, 'Header Type' offset 0x0e is used to
indicate header type, so for PCIE controller, the patch changes code to
use 'Header Type' field to identify if the PCIE is EP or RC mode.

Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-10-22 03:03:16 -05:00
Jaehoon Chung
757bff49ba mmc: dw-mmc: support DesignWare MMC Controller
Support the DesginWare MMC Controller.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Rajeshawari Shinde <rajeshwari.s@samsung.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-10-22 02:56:25 -05:00
Marek Vasut
48cf9dc63c mmc: pxa: Remove the old non-generic PXA MMC driver
This driver is no longer used and it's remaining users were converted
to the new generic PXA MMC driver. Thus, remove this driver.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Andy Fleming <afleming@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-10-22 02:56:25 -05:00
Marek Vasut
831f849f79 mmc: pxa: Flip over the remaining boards to pxa_mmc_generic
Some of the boards still used the old PXA_MMC driver instead of the
new generic one. Use the new one instead so the old can be removed
and the generic MMC framework can be properly used.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Andy Fleming <afleming@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-10-22 02:56:25 -05:00
Tushar Behera
13243f2eaf mmc: sdhci: Add a quirk to add delay during completion of sdhci_send_cmd
MMC host controller requires a delay between every sdhci_send_cmd()
execution. In s5p_mmc driver (s5p_sdhci replaces this driver), a delay
of 1000us was provided after every mmc_send_cmd() call. Adding a quirk
in current sdhci driver to replicate the behaviour.

Without this delay, MMC initialization on Origen board fails with
following error messages.

Timeout for status update!
mmc fail to send stop cmd

Signed-off-by: Tushar Behera <tushar.behera@linaro.org>
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-10-22 02:53:36 -05:00
Jaehoon Chung
804c7f4221 mmc: sdhci: add the DMA select for SDMA
In host-control register, DMA select bit field is present.
BUt in sdhci.c, didn't select for DMA.
if set CONFIG_MMC_SDMA, we need to set SDMA-select bit.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-10-22 02:53:36 -05:00
Jaehoon Chung
5d48e42247 mmc: sdhci: increase the timeout value for data transfer
Timeout value is tunable.
When run read/write operation, sometime returned the timeout error.
Because the timeout value is too short.
So increased the enough timeout value.
(This timeout value is used to prevent the infinite loop.)

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-10-22 02:53:36 -05:00
Marek Vasut
d6b2e5085c mmc: Fix mmc_spi error on cmd->flags field
The recent removal of the cmd->flags field caused error in the
debuging code of mmc_spi. Fix this:

mmc_spi.c: In function 'mmc_spi_request':
mmc_spi.c:179:2: error: 'struct mmc_cmd' has no member named 'flags'

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Andy Fleming <afleming@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-10-22 02:53:35 -05:00
Marek Vasut
49a627f8a1 MMC: Remove the MMC bounce buffer
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Andy Fleming <afleming@freescale.com>
Cc: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-10-22 02:53:35 -05:00
Marek Vasut
6dc71c8d2a MMC: MXS: Toggle the generic bounce buffer on the boards
Flip the boards to use the generic bounce buffer instead of the
MMC one.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Andy Fleming <afleming@freescale.com>
Cc: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-10-22 02:53:35 -05:00
Marek Vasut
4e6d81d1a4 MMC: MXS: Convert MXS MMC driver to generic bounce buffer
Implement necessary code to use the generic bounce buffer routines
inside this driver. This replaces the MMC bounce buffer, which is
to be removed.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Andy Fleming <afleming@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-10-22 02:53:35 -05:00
Marek Vasut
b660df3c90 COMMON: Implement common bounce buffer
Implement common bounce buffer to be used on a less capable hardware.
That includes hardware that can not do DMA from any address or such.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Andy Fleming <afleming@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-10-22 02:53:35 -05:00
Shengzhou Liu
047cea3655 powerpc/usb: fix bug of CPU hang when missing USB PHY clock
when missing USB PHY clock, u-boot will hang during USB
initialization when issuing "usb start". We should check
USBGP[PHY_CLK_VALID] bit to avoid CPU hanging in this case.

Due to controller issue of PHY_CLK_VALID in ULPI mode, we set
USB_EN before checking PHY_CLK_VALID, otherwise PHY_CLK_VALID
doesn't work.

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Acked-by: Marek Vasut <marex@denx.de>
2012-10-22 08:25:12 +02:00
Vincent Palatin
8b8d779dac usb: fallback safely when a configuration descriptor is too large
When a USB configuration descriptor was larger than our USB buffer
(512 bytes), we were skipping the full descriptor reading but then we
were still parsing and using it, triggering memory corruptions.
Now in that case, it just skips this device enumeration and displays the
appropriate message to the user, so he can fix the buffer if he wants.

This bug was triggered by some UVC webcams which have very large
configuration descriptors (e.g. a couple of kB) describing all their
supported video encodings.

Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
2012-10-22 08:25:07 +02:00
Gabe Black
e81e79ede1 usb: Support the CONFIG_SYS_64BIT_LBA option
usb_storage wouldn't compile when the CONFIG_SYS_64BIT_LBA option is
turned on because the used fixed size data types in their exported
functions when they should have used lbaint_t for the block count
parameter. That meant that when the sizes happened to be the same, when
using a 28 bit LBA, the driver would build, but when it wasn't, a 48 bit
LBA, things broke.

This change adjusts the signatures to use the right type and makes small
adjustments in the affected functions.

Signed-off-by: Gabe Black <gabeblack@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Marek Vasut <marex@denx.de>
2012-10-22 08:25:07 +02:00
Troy Kisky
ab857f2613 imximage: make set_imx_hdr_v1/v2 easier to read
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
2012-10-20 17:13:02 +02:00
Troy Kisky
ad0826dcd8 imximage: change parameters to set_imx_hdr
Call with the value the function will use
instead of going through a pointer.

Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
2012-10-20 17:13:02 +02:00
Troy Kisky
243319825f imximage: delay setting of image size
When later we change to variable length
header, we won't know the file size when
set_imx_hdr is called. So this is prep work.

Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
2012-10-20 17:13:02 +02:00
Troy Kisky
348ca8efb7 imximage: fix size of image to load.
sbuf->st_size already includes sizeof(struct imx_header),
so remove extra addition.

Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
2012-10-20 17:13:01 +02:00
Troy Kisky
8d8cc828f4 imximage: move flash_offset check to common location
Both set_imx_hdr_v1 and set_imx_hdr_v2 perform the
same check. Move check to before the set_imx_hdr call.

Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Acked-by: Stefano Babic <sbabic@denx.de>
2012-10-20 17:13:01 +02:00
Troy Kisky
f14e6258f3 imximage: remove redundant setting of app_dest_ptr
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Acked-by: Stefano Babic <sbabic@denx.de>
2012-10-20 17:13:01 +02:00
Troy Kisky
4d5fa98536 imximage: check dcd_len as entries added
Before the len was checked after the entire file
was processed, so it could have already overflowed.

Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
2012-10-20 17:13:01 +02:00
Fabio Estevam
c2cfe57e7c mx6qarm2: Enable DCACHE and CONFIG_MMC_BOUNCE_BUFFER
Data cache and CONFIG_MMC_BOUNCE_BUFFER can be safely enabled now.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-10-20 17:07:26 +02:00
Fabio Estevam
e6e85cd026 mx6qsabre_common: Enable DCACHE and CONFIG_MMC_BOUNCE_BUFFER
Data cache and CONFIG_MMC_BOUNCE_BUFFER can be safely enabled now.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-10-20 17:06:40 +02:00
Fabio Estevam
0208a53fb2 mx25pdk: Use internal RAM for stack pointer
Use internal RAM for stack pointer as it is done in other i.MX boards.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-10-20 17:04:28 +02:00
Tom Rini
99070db0dc Merge branch 'master' of git://git.denx.de/u-boot-arm
Conflicts:
	drivers/serial/serial_lh7a40x.c

Signed-off-by: Tom Rini <trini@ti.com>
2012-10-19 18:23:38 -07:00
Albert ARIBAUD
7f14f30a6d patman: force git log commands to not use color
Colored logs confuse patman when analyzing logs.
Add --no-color option in git log commands in case
the default config has color.

Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@ti.com>
2012-10-19 15:25:46 -07:00
Simon Glass
eeaec258b7 sandbox: Change global data baudrate to int
This doesn't need to be a long, so change it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@ti.com>
2012-10-19 15:25:46 -07:00
Simon Glass
55f97c1bfb x86: Change global data baudrate to int
This doesn't need to be a long, so change it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@ti.com>
2012-10-19 15:25:46 -07:00
Simon Glass
a25356d771 nds32: Change global data baudrate to int
This doesn't need to be a long, so change it.

Also adjust bi_baudrate to be unsigned.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@ti.com>
2012-10-19 15:25:46 -07:00
Simon Glass
8dc22b00ac mips: Change global data baudrate to int
This doesn't need to be a long, so change it.

Also adjust bi_baudrate to be unsigned.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@ti.com>
2012-10-19 15:25:45 -07:00
Simon Glass
5e84e5a7d4 blackfin: Change global data baudrate to int
This doesn't need to be a long, so change it.

Also adjust bi_baudrate to be unsigned.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@ti.com>
2012-10-19 15:25:45 -07:00
Simon Glass
e46e31a83a arm: Change global data baudrate to int
This does not need to be a long, so change it.

Also adjust bi_baudrate to be unsigned.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@ti.com>
2012-10-19 15:25:45 -07:00
Simon Glass
a8f1f1cd97 sparc: Change bi_baudrate and global data baudrate to int
These don't need to be longs, so change them.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@ti.com>
2012-10-19 15:25:45 -07:00
Simon Glass
a7e5ee9ebb powerpc: Change bi_baudrate and global data baudrate to int
These don't need to be longs, so change them.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@ti.com>
2012-10-19 15:25:45 -07:00
Simon Glass
7a68e330d0 openrisc: Change bi_baudrate and global data baudrate to int
These don't need to be longs, so change them.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@ti.com>
2012-10-19 15:25:45 -07:00
Simon Glass
7fffe2fac8 nios2: Change bi_baudrate and global data baudrate to int
These don't need to be longs, so change them.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@ti.com>
2012-10-19 15:25:44 -07:00
Simon Glass
74e8456bc1 microblaze: Change bi_baudrate and global data baudrate to int
These don't need to be longs, so change them.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@ti.com>
2012-10-19 15:25:44 -07:00
Simon Glass
f5a5b3c5ee m68k: Change bi_baudrate and global data baudrate to int
These don't need to be longs, so change them.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@ti.com>
2012-10-19 15:25:44 -07:00
Simon Glass
15dc95d48a avr32: Change bi_baudrate and global data baudrate to int
These don't need to be longs, so change them.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Andreas Bießmann <andreas.devel@googlemail.com>
Signed-off-by: Tom Rini <trini@ti.com>
2012-10-19 15:25:44 -07:00
Simon Glass
ecd4551f14 sh: Change bi_baudrate and global data baudrate to int
These don't need to be longs, so change them.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@ti.com>
2012-10-19 15:25:44 -07:00
Hung-Te Lin
44abe47deb input: Add ANSI 3.64 escape sequence generation.
To support Non-ASCII keys (ex, Fn, PgUp/Dn, arrow keys, ...), we need to
translate key code into escape sequence.

(Updated by sjg@chromium.org to move away from a function to store
keycodes, so we can easily record how many were sent. We now need to
return this from input_send_keycodes() so we know whether keys were
generated.)

Signed-off-by: Hung-Te Lin <hungte@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@ti.com>
2012-10-19 15:25:44 -07:00
Marc Jones
59a1b72ced input: Fix i8042 keyboard reset
The i8042 keyboard reset was not checking the results of the output
buffer after the reset command. This can jam up some KBC/keyboards.
Also, remove a write to the wrong register and the CONFIG setting
around the incorrect write.

Signed-off-by: Marc Jones <marc.jones@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@ti.com>
2012-10-19 15:25:43 -07:00
Louis Yung-Chieh Lo
45fe668f5f input: i8042: Provide feature to disable keyboard before booting kernel
The BIOS leaves the keyboard enabled during boot time so that any
keystroke would interfere kernel driver initialization.

Add a way to disable the keyboard to make sure no scancode will be
generated during the boot time. Note that the keyboard will be
re-enabled again after the kernel driver is up.

This code can be called from the board functions.
Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org>

Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@ti.com>
2012-10-19 15:25:43 -07:00
Gabe Black
48edb304d0 input: Provide a board specific mechanism to decide whether to skip i8042 init
This change adds a board overridable function which can be used to decide
whether or not to initialize the i8042 keyboard controller. On systems where
it isn't actually connected to anything, this can save a significant amount of
boot time.

On Stumpy, this saves about 200ms on boot.

Signed-off-by: Gabe Black <gabeblack@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@ti.com>
2012-10-19 15:25:43 -07:00
Gabe Black
ef94f7fa64 input: Use finer grain udelays while waitng for the i8042 keyboard buffer to empty
On x86, the i8042 keyboard controller driver frequently waits for the keyboard
input buffer to be empty to make sure the controller has had a chance to
process the data it was given. The way the delay loop was structured, if the
controller hadn't cleared the corresponding status bit immediately, it would
wait 1ms before checking again. If the keyboard responded quickly but not
instantly, the driver would still wait a full 1ms when perhaps 1us would have
been sufficient. Because udelay is a busy wait anyway, this change decreases
the delay between checks to 1us.

Also, this change gets rid of a hardcoded 250ms delay.

On Stumpy, this saves 100-150ms during boot.

Signed-off-by: Gabe Black <gabeblack@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@ti.com>
2012-10-19 15:25:43 -07:00
Joe Hershberger
ddd8418f7f env: cosmetic: Consilidate the default env definition
There used to be a huge structure duplicated 3 times in the source.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Tom Rini <trini@ti.com>
2012-10-19 15:25:43 -07:00
Stephen Warren
6ab6a650a4 disk: initialize name/part fields when returning a whole disk
When get_device_and_partition() finds a disk without a partition table,
under some conditions, it "returns" a disk_partition_t that describes
the entire raw disk. Make sure to initialize all fields in the partition
descriptor in that case.

The value chosen for name is just some arbitrary descriptive string.

The value chosen for info matches the check at the end of
get_device_and_partition(). However, it's probably not that important;
it's not obvious that the value is really used.

Reported-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Signed-off-by: Tom Rini <trini@ti.com>
2012-10-19 13:42:33 -07:00
Simon Glass
39826f0997 arm: fdt: Relocate fdt along with other data
Rather than leave the fdt down next to the code/data, we really should
relocate it along with everything else. For CONFIG_OF_EMBED this happens
automatically, but for CONFIG_OF_SEPARATE it does not.

Add code to copy the fdt and point to the new copy after relocation.

Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Stephen Warren <swarren@nvidia.com>
2012-10-19 21:38:27 +02:00
Alison Wang
39c7a26352 ColdFire: uart: fix build failure for missing header files
The following commit introduces some build failures for ColdFire
platform.

commit abaef69fbe
Author: Marek Vasut <marex@denx.de>
Date:   Thu Sep 13 16:51:38 2012 +0200

Add the missed header files.

Sign-off-by: Alison Wang <b18965@freescale.com>
2012-10-19 23:52:16 +08:00
Jason Jin
87c9b18687 ColdFire: Fix the build error for Freescale m5282evb board.
Clean up the lds file and fix the environment build error.

Signed-off-by: Jason Jin <Jason.jin@freescale.com>
2012-10-19 23:52:09 +08:00
Jason Jin
fa862dd7ce ColdFire: Fix build error for astro mcf53731 board.
Fix the  build error by clean up the lds file.

Signed-off-by: Jason Jin <Jason.jin@freescale.com>
2012-10-19 23:52:04 +08:00
Marek Vasut
2b758cad8d m68k: net: Fix unused variable in mcfmii.c
The following warning was produced, fix it:

mcfmii.c: In function 'mcffec_miiphy_write':
mcfmii.c:318:8: warning: variable 'rdreg' set but not used [-Wunused-but-set-variable]

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: "Jin Zhengxiong-R64188" <R64188@freescale.com>
Cc: Jason Jin <jason.jin@freescale.com>
2012-10-19 23:47:41 +08:00
Marek Vasut
c59ac903f2 m68k: Fix unused variable in board.c
The following warning was produced, fix it:

board.c: In function 'board_init_r':
board.c:390:8: warning: unused variable 's' [-Wunused-variable]

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: "Jin Zhengxiong-R64188" <R64188@freescale.com>
Cc: Jason Jin <jason.jin@freescale.com>
2012-10-19 23:47:41 +08:00
Marek Vasut
c1568ca545 m68k: Fix unused variable warning in speed.c
The following warning was produced, fix it:

speed.c: In function 'get_clocks':
speed.c:94:15: warning: variable 'bPci' set but not used [-Wunused-but-set-variable]

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: "Jin Zhengxiong-R64188" <R64188@freescale.com>
Cc: Jason Jin <jason.jin@freescale.com>
2012-10-19 23:47:41 +08:00
Marek Vasut
2b05593da6 m68k: Fix unused variable warning
The fbcs variable was unused, producing the following warning:

cpu_init.c: In function 'cpu_init_f':
cpu_init.c:52:10: warning: unused variable 'fbcs' [-Wunused-variable]

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: "Jin Zhengxiong-R64188" <R64188@freescale.com>
Cc: Jason Jin <jason.jin@freescale.com>
2012-10-19 23:47:41 +08:00
Marek Vasut
37d6cc3176 m68k: Fix wrong assembler instruction in start.S
The jmp _fault generated the following error message, thus change it
to bra _fault:

start.S: Assembler messages:
start.S:310: Error: Conversion of PC relative displacement to absolute

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: "Jin Zhengxiong-R64188" <R64188@freescale.com>
Cc: Jason Jin <jason.jin@freescale.com>
2012-10-19 23:47:41 +08:00
Philippe De Muyter
2ca7406c64 m68k: Fix relocation errors in start.S
When the environment sectors in the flash are big, one get those errors :

 mcf547x_8x/start.S:173: relocation truncated to fit: R_68K_PC16 against
  symbol `cpu_init_f' defined in .text section in libmcf547x_8x.a(cpu_init.o)
 mcf547x_8x/start.S:174: relocation truncated to fit: R_68K_PC16 against
  symbol `board_init_f' defined in .text section in libm68k.a(board.o)

Fix that.

Signed-off-by: Philippe De Muyter <phdm@macqel.be>
Cc: "Jin Zhengxiong-R64188" <R64188@freescale.com>
Cc: Jason Jin <jason.jin@freescale.com>
2012-10-19 23:47:41 +08:00
Tom Rini
1fb187b3b8 actux[123]: Update linker script for ELDK 4.2
With ELDK4.2 libserial.o is too large to fit in the area before the
environment.  Swap in libinput instead which is a little smaller.

Cc: Michael Schwingen <michael@schwingen.org>
Signed-off-by: Tom Rini <trini@ti.com>
2012-10-18 23:15:34 +02:00
402jagan@gmail.com
de1f9ac854 versatile: board configs: Use buffered writes on flash
This patch provides a support to use buffered writes on flash
for versatile and vexpress boards.

This will certainly increase the flash writes.

Signed-off-by: Jagannadha Sutradharudu Teki <402jagan@gmail.com>
2012-10-18 15:59:55 +02:00
Marek Vasut
fb24ffc086 dm: Move s3c24xx USB driver to a proper place
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: David Müller <d.mueller@elsoft.ch>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: U-Boot DM <u-boot-dm@lists.denx.de>
2012-10-18 06:54:18 +02:00
Marek Vasut
d731282e7c dm: wdt: arm: Move tnetv107x into drivers/watchdog/
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Oliver Brown <obrown@adventnetworks.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: U-Boot DM <u-boot-dm@lists.denx.de>
2012-10-18 06:52:02 +02:00
Paul Gortmaker
12c79a9578 powerpc: delete Wind River SBC8560/8540 support
The sbc8548/60 (both similar, just variations in UART hardware)
support has been removed from the linux kernel as of v3.6-rc1~132
so lets also now remove it from the u-boot tree as well.

Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
2012-10-17 09:39:16 -07:00
Fabio Estevam
c4fe17f6d8 mx5: Add workaround for ARM erratum ID 468414
Add the software workaround for ARM erratum ID 468414.

According to mx53/mx51 errata document:

"ENGcm11133 - ARM: NEON load data can be incorrectly forwarded to a
subsequent request

Description:

Under very specific set of conditions, data from a Neon load request can be incorrectly forwarded
to a subsequent, unrelated memory request.
The conditions are as follows:
• Neon loads and stores must be in use
• Neon L1 caching must be disabled
• Trustzone must be configured and in use
• The secure memory address space and the non-secure memory address space both use the same
physical addresses, either as an alias or the same memory location or for separate memory
locations
The issue is reported by ARM, erratum ID 468414, Category 2"

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-10-17 18:25:12 +02:00
Dirk Behme
f5a289ba1e mx6qsabrelite: enable DCache and MMC bounce buffer
The recent U-Boot version 2012.07 has improved drivers
(e.g. MMC and network/FEC) regarding DCache handling.
So it should be safe to use the DCache on the i.MX6, now.

Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com>
Acked-by: Stefano Babic <sbabic@denx.de>
2012-10-17 18:20:07 +02:00
Fabio Estevam
0690c69b27 configs: mx53evk: Remove CONFIG_HAS_ETH1
mx53evk has only one Ethernet port, so remove CONFIG_HAS_ETH1 option.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-10-17 18:09:34 +02:00
Fabio Estevam
ff7a89bb0f configs: mx51evk: Remove CONFIG_HAS_ETH1
mx51evk has only one Ethernet port, so remove CONFIG_HAS_ETH1 option.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-10-17 18:09:34 +02:00
Fabio Estevam
eca04423d1 configs: mx53loco: Remove CONFIG_HAS_ETH1
mx53loco has only one Ethernet port, so remove CONFIG_HAS_ETH1 option.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-10-17 18:09:34 +02:00
Fabio Estevam
c606608a34 mx53loco: Adapt the IPU clock
Since PLL2 now has changed, it is necessary to adapt the CONFIG_IPUV3_CLK
accordingly.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-10-17 18:09:34 +02:00
Fabio Estevam
782b028841 mx5: lowlevel_init.S: Fix PLL settings for mx53
Currently PLL2 is not explicitely configured for mx53 and it runs at 333MHz.

Since PLL2 is the parent clock for DDR2, IPU, VPU, we should set it at 400MHz
instead.

Without doing so, it is not possible to use a 2.6.35 FSL kernel and display HDMI
at 1080p because the IPU clock cannot reach the requested frequency.

Set PLL2 to 400MHz, so that 1080p can be played and the DDR2 can run at its
maximum frequency.

Also, setup the other PLL's as done in FSL U-boot and re-arrange the code a little
bit to allow easier comparison with the original clock setup from FSL U-boot.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-10-17 18:09:34 +02:00
Fabio Estevam
758c344945 mx5: lowlevel_init.S: Split init_clock macro
init_clock is currently shared between mx51 and mx53 and it contains lots of
ifdef's which makes it really hard to follow the code.

Split the init_clock between mx51 and mx53 to allow easier readability.

No functional changes are made.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-10-17 18:09:34 +02:00
Tom Rini
953cfd2878 Merge branch 'master' of git://git.denx.de/u-boot-i2c 2012-10-17 09:03:59 -07:00
Tom Rini
d1ff690612 Merge branch 'master' of git://git.denx.de/u-boot-mips 2012-10-17 08:57:13 -07:00
Marek Vasut
ff04f6d122 fs: fat: Fix mkcksum() function parameters
The mkcksum() function now takes one parameter, the pointer to
11-byte wide character array, which it then operates on.

Currently, the function is wrongly passed (dir_entry)->name, which
is only 8-byte wide character array. Though by further inspecting
the dir_entry structure, it can be noticed that the name[8] entry
is immediatelly followed by ext[3] entry. Thus, name[8] and ext[3]
in the dir_entry structure actually work as this 11-byte wide array
since they're placed right next to each other by current compiler
behavior.

Depending on this is obviously wrong, thus fix this by correctly
passing both (dir_entry)->name and (dir_entry)->ext to the mkcksum()
function and adjust the function appropriately.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Tom Rini <trini@ti.com>
2012-10-17 07:59:11 -07:00
Stephen Warren
e2e9b37898 disk: part_dos: print partition UUID in partition list
This information may be useful to compare against command "part uuid",
or if you want to manually paste the information into the kernel
command-line.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
[trini: print_one_part / print_part_dos output strings didn't quite
match before the changes]
Signed-off-by: Tom Rini <trini@ti.com>
2012-10-17 07:59:11 -07:00
Stephen Warren
304b571130 disk: part_dos: checkpatch cleanups
Minor cleanups required so later patches don't trigger checkpatch.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-10-17 07:59:11 -07:00
Stephen Warren
b4414f4a4a disk: part_efi: set bootable flag in partition objects
A partition is considered bootable if it either has the "legacy BIOS
bootable" flag set, or if the partition type UUID matches the standard
"system" type.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-10-17 07:59:10 -07:00
Stephen Warren
13bf2f55d9 disk: part_efi: print raw partition attributes
When printing the EFI partition table, print the raw attributes. Convert
struct gpt_entry_attributes to a union to allow raw access.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-10-17 07:59:10 -07:00
Stephen Warren
1c8346ab38 disk: part_efi: add new partition attribute definitions
Add no_block_io_protocol and legacy_bios_bootable attribute definitions.
These are sourced from UEFI Spec 2.3, page 105, table 19. Credits to the
libparted source for the specification pointer.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-10-17 07:59:10 -07:00
Stephen Warren
f07cd2c4c7 disk: part_efi: print partition UUIDs
When printing the partition table, print the partition type UUID and the
individual partition UUID. Do this unconditionally, since partition UUIDs
are useful.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-10-17 07:59:10 -07:00
Stephen Warren
788a8c1fc9 disk: part_efi: re-order partition list printf, change case
The partition name is a long variable-length string. Move it last on
the line to ensure consistent layout and that the entries align with
the "header" line. Also, surround it in quotes, so if it's empty, it's
obvious that something is still being printed.

Also, change the case of the LBA numbers; lower-case looks nicer in my
opinion, and will be more consistent with the UUID printing that is
added later in this series.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-10-17 07:59:10 -07:00
Stephen Warren
38a3021edc disk: part_efi: remove indent level from loop
Simplify the partition printing loop in print_part_efi() to bail out
early when the first invalid partition is found, rather than indenting
the whole body of the loop. This simplifies later patches.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-10-17 07:59:10 -07:00
Stephen Warren
71bba424ad disk: get_device_and_partition() return value fixes
When no valid partitions are found, guarantee that we return -1. This
most likely already happens, since the most recent get_partition_info()
will have returned an error. However, it's best to be explicit.

Remove an unnecessary assignment of ret=0 in the success case; this value
is over-written with the processed partition ID later.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-10-17 07:59:09 -07:00
Pavel Herrmann
8af4472a77 remove unnecessary includes from cmd_ide.c
mpc8xx and mpc5xxx specific includes in cmd_ide.c are not required, remove them.

Signed-off-by: Pavel Herrmann <morpheus.ibis@gmail.com>
2012-10-17 07:59:09 -07:00
Pavel Herrmann
21d2bf426f split PCS440EP specific code from cmd_ide.c
Move specific ide_input_data and friends to board-specific file.

Signed-off-by: Pavel Herrmann <morpheus.ibis@gmail.com>
2012-10-17 07:59:09 -07:00
Pavel Herrmann
4d1361d867 split AU1X00 specific code from cmd_ide.c
move special case of ide_swap_read() for AU1X00 SoC into SoC-specific directory.

Signed-off-by: Pavel Herrmann <morpheus.ibis@gmail.com>
2012-10-17 07:59:09 -07:00
Pavel Herrmann
0a4a64c079 move CPC45 ide_led to the same file as other IDE hooks
Keep all IDE-related hooks and overrides in a single file, to avoid confusion

Signed-off-by: Pavel Herrmann <morpheus.ibis@gmail.com>
2012-10-17 07:59:09 -07:00
Pavel Herrmann
19be2ea2ef make ide_led() a weak alias
Make ide_led() a weak alias instead of global/local function/empty macro
based on CONFIG_IDE_LED value and/or board-specific CONFIGs, to get rid of
board-specific code in cmd_ide.c
Define dummy values to get rid of compoler errors in case where ide_led()
used to be an empty macro

Signed-off-by: Pavel Herrmann <morpheus.ibis@gmail.com>
2012-10-17 07:59:09 -07:00
Pavel Herrmann
28920b1fd2 split CPC45 board-specific IDE functions from cmd_ide.c
Move input_data() and friends to board/cpc45/ide.c, as overrides for weak
aliases in cmd_ide.c

note: checkpatch emits warnings about using volatile

Signed-off-by: Pavel Herrmann <morpheus.ibis@gmail.com>
2012-10-17 07:59:08 -07:00
Pavel Herrmann
f5b82c0f9c change all versions of input_data() and output_data() to global weak aliases
This changes input_data() and friends from static function to global symbols
under weak alias, to enable board specific overrides (and therefore get rid of
board-specific code in cmd_ide.c)
Also declare ide_bus_offset in the header file, so other files can use
ATA_CURR_BASE as well.

Signed-off-by: Pavel Herrmann <morpheus.ibis@gmail.com>
2012-10-17 07:59:08 -07:00
Pavel Herrmann
e4148c1165 split IVM power hooks from cmd_ide.c
Move power control code from ide_reset() into IVM-specific IDE reset code.

Signed-off-by: Pavel Herrmann <morpheus.ibis@gmail.com>
2012-10-17 07:59:08 -07:00
Pavel Herrmann
8d1165e11a split mpc8xx hooks from cmd_ide.c
move most of mpc8xx hooks from cmd_ide.c into ide_preinit() and newly created
ide_init_postreset() (invoked after calling ide_reset after ide_preinit),
some cleanup to make checkpatch happy, enable IDE init hooks in configs of
affected boards.
confusingly, these hooks are used by more than just mpc8xx-based boards, and
therefore are placed in arch/ppc/lib/

note: checkpatch still emits warnings about using volatile

Signed-off-by: Pavel Herrmann <morpheus.ibis@gmail.com>
2012-10-17 07:59:08 -07:00
Pavel Herrmann
94fa029a6d remove CONFIG_SC3 from cmd_ide.c
There is no difference in codepath with CONFIG_SC3 enabled, so just remove it

Signed-off-by: Pavel Herrmann <morpheus.ibis@gmail.com>
2012-10-17 07:59:08 -07:00
Marek Vasut
eb1f09e007 kerneldoc: stdio: tmpl: Add stdio template
Add STDIO documentation template.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Tom Rini <trini@ti.com>
[trini: Fix DOCBOOKS line as we don't have linker_lists yet]
Signed-off-by: Tom Rini <trini@ti.com>
2012-10-17 07:58:44 -07:00
Marek Vasut
9cd2b9e47e kerneldoc: Annotate drivers/serial/serial.c
Add kerneldoc annotations into serial core.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Tom Rini <trini@ti.com>
2012-10-17 07:58:43 -07:00
Marek Vasut
dee1941604 serial: Reorder get_current()
Reorder the get_current() function to make it a bit more readable.
The code does not grow and there is minor change in the code logic,
where dev != NULL is now checked in any case.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Tom Rini <trini@ti.com>
2012-10-17 07:55:51 -07:00
Marek Vasut
6d93e25806 serial: Reorder serial_assign()
Reorder serial_assign() function to get rid of the extra level of
indentation. Also, adjust the return value to be -EINVAL instead of
positive one to be more consistent.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Tom Rini <trini@ti.com>
2012-10-17 07:55:50 -07:00
Marek Vasut
ec3fd68952 serial: Use default_serial_puts() in drivers
Replace the in-place ad-hoc implementation of serial_puts() within
the drivers with default_serial_puts() call. This cuts down on the
code duplication quite a bit.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Tom Rini <trini@ti.com>
2012-10-17 07:55:50 -07:00
Marek Vasut
bfb7d7a3d6 serial: Implement default_serial_puts()
U-Boot contains a lot of duplicit implementations of serial_puts()
call which just pipes single characters into the port in loop. Implement
function that does this behavior into common code, so others can make
easy use of it.

This function is called default_serial_puts() and it's sole purpose
is to call putc() in loop on the whole string passed to it.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Tom Rini <trini@ti.com>
2012-10-17 07:55:50 -07:00
Stefan Roese
bfa5b71408 mpc82xx: Remove BMW board port
As the board seems to be unmaintained for some time, lets remove
the support in mainline completely.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: James F. Dougherty <jfd@broadcom.com>
Cc: Wolfgang Denk <wd@denx.de>
Acked-by: Marek Vasut <marex@denx.de>
2012-10-17 07:55:50 -07:00
Nobuhiro Iwamatsu
6abcf2d531 nds32: Change macro from BOARD_LATE_INIT to CONFIG_BOARD_LATE_INIT
With almost all the architecture and board BOARD_LATE_INIT does not use.
CONFIG_BOARD_LATE_INIT is used instead.
This changed CONFIG_BOARD_LATE_INIT from BOARD_LATE_INIT.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
CC: Macpaul Lin <macpaul@andestech.com>
[trini: Fixup for context changes]
Signed-off-by: Tom Rini <trini@ti.com>
2012-10-17 07:55:50 -07:00
Wu, Josh
9924ca6e9b mmc: at91: use max timeout value. It will avoid some situation that timeout happened.
Signed-off-by: Josh Wu <josh.wu@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2012-10-17 11:29:52 +02:00
Wu, Josh
3a49cd7e1a ARM: at91sam9x5: enable MCI0 support for 9x5ek board.
Signed-off-by: Josh Wu <josh.wu@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2012-10-17 11:29:25 +02:00
Wu, Josh
1db7377a70 mmc: at91: add multi block read/write support.
Since the at91sam9263, the mmc hardware support multi blocks read/write. So this driver enable it.

Signed-off-by: Josh Wu <josh.wu@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2012-10-17 11:28:54 +02:00
Albert ARIBAUD
b9f4bc34ac Remove lh7a40x cpu and serial driver
Since commit 957731ed (ARM: remove broken "lpd7a40x" boards),
lh7a40x cpu and serial driver have become unused. Remove them.

Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
2012-10-16 18:00:36 +02:00
Joe Hershberger
74620e1c94 tools/env: Improve debug prints
Provide more information when using redundant environments
Consistently print debug info to stderr

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
2012-10-16 08:47:27 -07:00
Joe Hershberger
ce2f580017 tools/env: Fix variable delete operation
Fix crash introduced by a073d63a36524453a817ab029fad5b188f46127e
when attempting to delete a variable.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
2012-10-16 08:47:27 -07:00
Daniel Schwierzeck
6b2eba1b7c MIPS: qemu_mips.h: cleanup coding style and checkpatch.pl issues
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2012-10-16 15:02:08 +02:00
Zhi-zhou Zhang
32afad783e MIPS: add board qemu-mips64 support
Both big-endian and little-endian are tested with below commands:
Rom version: (Default, Now we config it as rom version)
qemu-system-mips64el -M mips -bios u-boot.bin -cpu MIPS64R2-generic -nographic
qemu-system-mips64 -M mips -bios u-boot.bin -cpu MIPS64R2-generic -nographic
Ram version:
qemu-system-mips64el -M mips -cpu MIPS64R2-generic -kernel u-boot -nographic
qemu-system-mips64 -M mips -cpu MIPS64R2-generic -kernel u-boot -nographic

Signed-off-by: Zhizhou Zhang <etou.zh@gmail.com>
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2012-10-16 15:02:08 +02:00
Zhi-zhou Zhang
ff9b0cb8b4 MIPS: qemu_mips: move CONFIG_SYS_TEXT_BASE to qemu-mips.h
We define CONFIG_SYS_TEXT_BASE in board's specified header file.
So config.mk is useless, then remove it.

Signed-off-by: Zhizhou Zhang <etou.zh@gmail.com>
2012-10-16 15:02:08 +02:00
Zhi-zhou Zhang
090854c826 MIPS: add support for 64 bit addressing
Prepare for upcoming mips64 support. This patch add mips64 address
support.

Signed-off-by: Zhizhou Zhang <etou.zh@gmail.com>
[daniel.schwierzeck@gmail.com: prefer _MIPS_SZLONG in posix_types.h to fix some warnings]
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2012-10-16 15:02:08 +02:00
Zhi-zhou Zhang
cb0a6a1ecc MIPS: don't use camel-case style
Replace camel-case style with upper-case style globally.

Signed-off-by: Zhizhou Zhang <etou.zh@gmail.com>
2012-10-16 15:02:08 +02:00
Benoît Thébaudeau
5676f598e7 mx25: Clean up imx-regs.h
Clean up i.MX25 imx-regs.h:
 - Update mx31 imx-regs.h filename.
 - Test for __KERNEL_STRICT_NAMES just in case.
 - Define internal RAM size.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
2012-10-16 12:35:12 +02:00
Eric Nelson
e58010b554 i.MX6: mx6qsabrelite: Add splash screen support
Adds support for HDMI, two LVDS panels and one RGB panel to
the SABRE-Lite board.

Displays supported:
         HDMI		- 1024 x 768 for maximum compatibility
         Hannstar-XGA   - 1024 x 768 LVDS (Freescale part number MCIMX-LVDS1)
         wsvga-lvds     - 1024 x 600 LVDS (Boundary p/n Nit6X_1024x600)
         wvga-rgb       - 800 x 480 RGB (Boundary p/n Nit6X_800x480)

Since the ipuv3_fb display driver currently supports only a single display,
this code auto-detects panel by probing the HDMI Phy for Hot Plug Detect
or the I2C touch controller of the LVDS and RGB displays in the priority
listed above.

Setting 'panel' environment variable to one of the names above will
override auto-detection.

Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
2012-10-16 12:35:12 +02:00
Eric Nelson
f95c960bcc i.MX6: add HDMI transmitter register declarations from kernel WIP.
Original source from Pengutronix HDMI driver work:

	http://git.pengutronix.de/?p=imx/linux-2.6.git;a=commitdiff;h=72c31cd67ac880bd90785af86f8e46f8ea7b3bb0

Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
2012-10-16 12:35:11 +02:00
Eric Nelson
0fb1e57cb6 i.MX6: set drive strength for parallel RGB pads
Default drive strength is disabled and won't function.

Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
2012-10-16 12:35:11 +02:00
Eric Nelson
08fd6a3580 i.MX: ipufb: add const to fb_videomode declarations
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
2012-10-16 12:35:11 +02:00
Eric Nelson
09c8bb264f i.MX video: struct fb_videomode can be const
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
2012-10-16 12:35:11 +02:00
Eric Nelson
6e14232010 i.MX: declare iomux_v3_cfg_t arrays as const
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
2012-10-16 12:35:11 +02:00
Eric Nelson
5ae28d2db2 i.MX: iomux: input pad array can be const
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
Signed-off-by: Stefano Babic <sbabic@denx.de>
2012-10-16 12:35:11 +02:00
Fabio Estevam
dce67bd548 mx6qsabreauto: Pass the board revision to the kernel
The kernel from Freescale expects that the bootloader passes the board revision.

Read the board revision and pass it via get_board_rev().

Without passing the board revision the kernel does not operate properly as the
initialization of peripherals are different in revA versus revB boards.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-10-16 12:35:11 +02:00
Otavio Salvador
903e779c55 mx6qsabreauto: Change mmcroot so it works out of box
The mmcroot setting vary between mx6qsabreauto and mx6qsabresd so we
move this to the board configuration file.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Acked-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-10-16 12:35:11 +02:00
Benoît Thébaudeau
a2ac1b3a7d mxc: Fix SDHC multi-instance clock
On mxc, each SDHC instance has a dedicated clock, so gd->sdhc_clk is not
suitable for the multi-instance use case (initialization made directly with
fsl_esdhc_initialize()).

This patch fixes this issue by adding a configuration field for the SDHC input
clock frequency.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Eric Bénard <eric@eukrea.com>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Jason Liu <r64343@freescale.com>
Cc: Matt Sealey <matt@genesi-usa.com>
Cc: Andy Fleming <afleming@gmail.com>
2012-10-16 12:35:10 +02:00
Benoît Thébaudeau
6e3dc12754 mx35: Fix eSDHC clocks
Each eSDHC instance has a dedicated clock.

gd->sdhc_clk must also be set accordingly. This is good for the case only a
single SDHC instance is used (initialization made with fsl_esdhc_mmc_init()). A
future patch will fix the multi-instance use case (initialization made directly
with fsl_esdhc_initialize()).

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Eric Bénard <eric@eukrea.com>
Cc: Otavio Salvador <otavio@ossystems.com.br>
2012-10-16 12:35:10 +02:00
Benoît Thébaudeau
151d63cb91 mx35: Clean up lowlevel_init
Clean up mx35 lowlevel_init:
 - Indent with tabs.
 - Fix comments.
 - Use defined values instead of literal constants.
 - Use defined macros instead of duplicating code.
 - Use macro parameters with default values instead of #define'd configs.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
2012-10-16 12:35:10 +02:00
Łukasz Dałek
34cda7a0d8 h2200: Add support for iPAQ h2200 palmtop
Add basic support for HP iPAQ h2200 palmtop. h2200 palmtop was targeted
to general consumers. It has 64 MB of RAM, 32 MB flash. No intergrated
Wi-Fi nor Ethernet. Based on Intel PXA255 processor. It was shipped with
Windows CE 4.2 operating system.

Signed-off-by: Lukasz Dalek <luk0104@gmail.com>
2012-10-16 07:14:55 +02:00
Eric Nelson
54b99e51ab i2c_probe: update for use in scripting
Allow the use of an I2C address to test and return success
if one or more devices is found.

This allows device presence to alter the flow of a script.
e.g.
   if i2c probe 0x04 ; then
	echo found Hannstar touch ;
   fi

Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
2012-10-16 05:47:21 +02:00
York Sun
ff5d2dce1e common/i2c: Add i2c write command
Add i2c write command to write data from memory to i2c devices.

Signed-off-by: York Sun <yorksun@freescale.com>
2012-10-16 05:47:21 +02:00
Tetsuyuki Kobayashi
f539094f48 i2c: sh_i2c: use setbits/clrbits macro
Use setbits/clrbits macro when read-modify-write register.

Signed-off-by: Tetsuyuki Kobayashi <koba@kmckk.co.jp>
Acked-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
2012-10-16 05:47:21 +02:00
Tetsuyuki Kobayashi
650f95b0c7 arm: rmobile: kzm9g: enable I2C2
Acked-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Tetsuyuki Kobayashi <koba@kmckk.co.jp>
2012-10-16 05:47:21 +02:00
Tetsuyuki Kobayashi
937b6862de arm: rmobile: kzm9g: enable I2C1
Supply clock to I2C1 and release resetting.

Acked-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Tetsuyuki Kobayashi <koba@kmckk.co.jp>
2012-10-16 05:47:20 +02:00
Tetsuyuki Kobayashi
0e5fb33cf7 i2c: sh_i2c.c: check error in i2c_read and i2c_write
Before this patch, i2c_{read,write} always returned 0.
Check TACK in i2c_raw_{read,write} so that i2c_{read,write} return non-zero when error.

Acked-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Tetsuyuki Kobayashi <koba@kmckk.co.jp>
2012-10-16 05:47:20 +02:00
Tetsuyuki Kobayashi
d042d7121b i2c: sh_i2c: enable i2c_probe
Before this patch i2c_probe() always returned 0 and "i2c probe" command did not work properly.

Modify i2c_set_addr() to check TACK when waiting DTE and make i2c_probe() call this function.

Acked-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Tetsuyuki Kobayashi <koba@kmckk.co.jp>
2012-10-16 05:47:20 +02:00
Tetsuyuki Kobayashi
020ec727a6 i2c: sh_i2c.c: support I2C2, I2C3 and I2C4
sh_i2c.c support I2C0 and I2C1. This patch extends it to I2C4.

Acked-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Tetsuyuki Kobayashi <koba@kmckk.co.jp>
2012-10-16 05:47:20 +02:00
Tetsuyuki Kobayashi
3ce2703d8f i2c: sh_i2c.c: adjust for SH73A0
Adjust i2c_raw_read() in sh_i2c.c to work for SH73A0.
After this patch, "i2c md" and "i2c mw" command on U-Boot work properly on KZM-A9-GT board.

Acked-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Tetsuyuki Kobayashi <koba@kmckk.co.jp>
2012-10-16 05:47:20 +02:00
Tetsuyuki Kobayashi
57d7c80472 i2c: sh_i2c.c: correct BUSY bit define in ICSR
Correct BUSY bit define in ICSR from (1<<3) to (1<<4).

Acked-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Tetsuyuki Kobayashi <koba@kmckk.co.jp>
2012-10-16 05:47:19 +02:00
Tetsuyuki Kobayashi
b1af67fe5e i2c: sh_i2c.c: support iccl and icch extension
R-mobile SoC (at least SH73A0) has extension bits to store 8th bit of iccl and icch.
This patch add support for the extentin bits.

Acked-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Tetsuyuki Kobayashi <koba@kmckk.co.jp>
2012-10-16 05:47:19 +02:00
Gerald Van Baren
c71b64f361 libfdt: Add helper function to create a trivial, empty tree
The libfdt read/write functions are now usable enough that it's become a
moderately common pattern to use them to build and manipulate a device
tree from scratch.  For example, we do so ourself in our rw_tree1 testcase,
and qemu is starting to use this model when building device trees for some
targets such as e500.

However, the read/write functions require some sort of valid tree to begin
with, so this necessitates either having a trivial canned dtb to begin with
or, more commonly, creating an empty tree using the serial-write functions
first.

This patch adds a helper function which uses the serial-write functions to
create a trivial, empty but complete and valid tree in a supplied buffer,
ready for manipulation with the read/write functions.

Signed-off-by: David Gibson <david@gibson.dropbear.id.au>

From git://git.jdl.com/software/dtc.git patch hash be6026838 with
adaptations to include/libfdt.h and lib/libfdt/Makefile for the U-Boot
environment.

Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
2012-10-15 22:24:36 -04:00
Joe Hershberger
8ac88f2d28 fdt: Check for a token to skip auto-hash validation
Allow the itb file to declare to u-boot that its hash should not be
checked automatically on bootm or iminfo.  This allows an image to
either be checked automatically or to include a script which may
check it otherwise (such as after part of the itb has been relocated
to RAM by the script).

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
2012-10-15 19:20:32 -04:00
Joe Hershberger
8805beec8f fdt: Identify scripts in ITBs as printable strings
Scripts in the ITB format will have spaces in them and will end in a
newline charachter.  Make sure that these are considered printable.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
2012-10-15 19:20:26 -04:00
Joe Hershberger
bc80295b62 fdt: Add get commands to fdt
Add commands to access data in the fdt.  This allows data from a dtb
or itb to be accessed from the shell scripts.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
2012-10-15 19:20:22 -04:00
Joe Hershberger
f0a29d4331 fdt: Limit printed hex in fdt print and list commands
Prevent printing the entire image in a itb. It is most likely unhelpful
to have the hex of the entire image scroll for minutes on your slow
serial console.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
2012-10-15 19:20:16 -04:00
Joe Hershberger
367e125976 fdt: Check error codes returned from fdtlib when loading ITB
Before this patch, error codes returned from fdtlib were ignored and
continued access would cause a crash. Now just check if the image is
truncated and error if so.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
2012-10-15 19:20:08 -04:00
David Gibson
24fa0e588e libfdt: Add helpers for 64-bit integer properties
In device trees in the world, properties consisting of a single 64-bit
integer are not as common as those consisting of a single 32-bit, cell
sized integer, but they're common enough that they're worth including
convenience functions for.

This patch adds helper wrappers of fdt_setprop_inplace(), fdt_setprop() and
fdt_appendprop() for handling 64-bit integer quantities in properties.  For
better consistency with the names of these new *_u64() functions we also
add *_u32() functions as alternative names for the existing *_cell()
functions handling 32-bit integers.

Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2012-10-15 19:15:39 -04:00
Minghuan Lian
36ad18a6db libfdt: Add support for appending the values to a existing property
Some properties may contain multiple values, these values may need
to be added to the property respectively. this patch provides this
functionality. The main purpose of fdt_append_prop() is to append
the values to a existing property, or create a new property if it
dose not exist.

Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2012-10-15 19:15:39 -04:00
Tom Rini
bd23b22bad Merge branch 'agust@denx.de-next' of git://git.denx.de/u-boot-staging 2012-10-15 13:37:22 -07:00
Joe Hershberger
06134211ee tools/env: Fix build failure from missing header include
This was introduced in:
8679d0ffdcc0beafea8e6942c0c67cf859afa18e -
	COMMON: Use __stringify() instead of MK_STR()

The header is now needed since common.h is not included in this tool.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
2012-10-15 13:36:48 -07:00
Marek Vasut
34e24b620a kerneldoc: Add myself to the git-mailrc for kerneldoc
Add entry for kerneldoc into the git-mailrc pointing to the U-Boot ML
and myself.

Signed-off-by: Marek Vasut <marex@denx.de>
2012-10-15 11:54:15 -07:00
Marek Vasut
95d45a91d7 kerneldoc: Implement "Example" section handling
The default kernel-doc strips starting spaces from every single
line in the Example section. This makes the code look bad. Thus,
implement special handling for this section.

Signed-off-by: Marek Vasut <marex@denx.de>
2012-10-15 11:54:15 -07:00
Marek Vasut
8d5d89e21d kerneldoc: Add nicer CSS stylesheet for HTML docs
Import basic CSS stylesheet for the HTML documentation. The base for
the stylesheet is taken from:

	http://ds9a.nl/docbook/minimal-page.html

I customized the CSS a bit further, for example to add curvy corners
to example section and change the tint of gray. The HTML documentation
does not look that crude anymore.

Signed-off-by: Marek Vasut <marex@denx.de>
2012-10-15 11:54:15 -07:00
Marek Vasut
30ff89189b kerneldoc: Implant DocBook from Linux kernel
Pull slightly modified version of Documentation/DocBook, the related perl
script scripts/kernel-doc and the scripts/docproc.c from Linux kernel and
implant it into U-Boot. This will allow smooth generation of kerneldoc
style documentation.

It was necessary to modify the DocBook/Makefile to work with U-Boot build
system. The changes were only minor though and involved replacing the kbuild
specific parts.

It was also necessary to replace use of variables like KERNEL_VERSION with
U_BOOT_VERSION, strings like Linux kernel with U-Boot Bootloader etc. so
the generated result actually matches.

Finally, it was necessary to adjust docproc.c, since the documentation in
U-Boot is located in doc/DocBook instead of Documentation/DocBook as is in
case of the Linux kernel.

Some parts of the DocBook Makefile are unused, but to allow easier sync with
Linux kernel, these parts are still left in. The targets enabled now are
"htmldocs" "pdfdocs" "psdocs" "xmldocs" and "cleandocs" to remove the results
of documentation build.

Linux scripts/docproc.c:
commit f0f3ca8d967462dafb815412b14ca3339b9817a6
Date:   Wed Jun 15 11:53:13 2011 +0200

Linux scripts/kernel-doc:
commit 1b40c1944db445c1de1c47ffd8cd426167f488e8
Date:   Sun Aug 12 10:46:15 2012 +0200

Linux Documentation/DocBook:
commit bb8187d35f820671d6dd76700d77a6b55f95e2c5
Date:   Thu May 17 19:06:13 2012 -0400

Signed-off-by: Marek Vasut <marex@denx.de>
2012-10-15 11:54:14 -07:00
Fabio Estevam
c50204a517 configs: mx6qsabre_common.h: Use default clock definitions
Since commit 50d4a707f0 (mx5/6: Define default SoC input clock frequencies)
we can use the default clock values.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-10-15 11:54:14 -07:00
Fabio Estevam
fe5ebe97fa mx6qsabreauto: Add Ethernet support
mx6qsabreauto has a AR8031 Gigabit PHY.

Add support for it.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-10-15 11:54:14 -07:00
Benoît Thébaudeau
85d993cef9 mx25: Clean up lowlevel_init
Clean up mx25 lowlevel_init:
 - Add comments.
 - Do not use write32 repeatedly with the same value in order not to increase
   code size.
 - Make register values configurable.
 - Use macro parameters with default values instead of literal constants.
 - Use defined macros instead of duplicating code.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: John Rigby <jcrigby@gmail.com>
Cc: Matthias Weisser <weisserm@arcor.de>
2012-10-15 11:54:14 -07:00
Benoît Thébaudeau
9e0081d573 mx31: Fix PDR0_CSI_PODF
The CSI PODF bit-field used by the previous code for the i.MX31 CCM PDR0
register is actually composed of two bit-fields: one pre-divider and one
post-divider. This patch fixes the CCM access macros and the code using them
accordingly.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
2012-10-15 11:54:14 -07:00
Benoît Thébaudeau
b809b3ac13 mx35: Define MAX and AIPS registers
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
2012-10-15 11:54:14 -07:00
Benoît Thébaudeau
df7e420bbd mx31: Add more CCM access macros
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
2012-10-15 11:54:13 -07:00
Benoît Thébaudeau
dd227b6ea0 mx5: Optimize lowlevel_init code size
Optimize mx5 lowlevel_init.S code size:
 - Compute values at compile time rather than at runtime where possible.
 - Assign r4 to hold the zero value rather than setting registers to 0 again and
   again.
 - Associate a function to setup_pll rather than expanding its large macro code
   multiple times.
 - Allocate constant values in section only if used.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Tested-by: Stefano Babic <sbabic@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
2012-10-15 11:54:13 -07:00
Otavio Salvador
51535d9f6f mx6qsabreauto: Use ttymxc3 as console
The mx6qsabreauto console is different than mx6qsabresd so the console
configuration is now set in the board file.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Acked-by: Stefano Babic <sbabic@denx.de>
2012-10-15 11:54:13 -07:00
Benoît Thébaudeau
6be5800504 mx25: Fix eSDHC support
The MMC driver appropriate for the i.MX25 is fsl_esdhc, which has nothing to do
with mxcmmc.

Also, each eSDHC instance has a dedicated clock, so gd->sdhc_clk must be set
accordingly. This is good for the case only a single SDHC instance is used
(initialization made with fsl_esdhc_mmc_init()). A future patch will fix the
multi-instance use case (initialization made directly with
fsl_esdhc_initialize()).

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Eric Bénard <eric@eukrea.com>
Cc: Otavio Salvador <otavio@ossystems.com.br>
2012-10-15 11:54:13 -07:00
Benoît Thébaudeau
f7542638c7 mx25: Define cpu_eth_init() only if needed
The FEC is the only SoC Ethernet support available on i.MX25, so define
cpu_eth_init() only for it instead of returning a misleading success code.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
2012-10-15 11:54:13 -07:00
Benoît Thébaudeau
9baefa465d mx25: Clean up clocks API
Use the standard mxc_get_clock() instead of exporting internal functions and
using literal constant values.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
2012-10-15 11:54:13 -07:00
Benoît Thébaudeau
17c7cf71b4 mx25 clocks: Fix MXC_FEC_CLK
mxc_get_clock(MXC_FEC_CLK) should return the IPG clock, not the AHB clock.

Also, imx_get_fecclk() was correct but reimplemented the calculation of the IPG
clock, so remove the duplicated code.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
2012-10-15 11:54:13 -07:00
Benoît Thébaudeau
c3b5189031 mx25: Define more standard clocks
Define AHB, IPG and CSPI clocks.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
2012-10-15 11:54:12 -07:00
Benoît Thébaudeau
fac7c817c3 mx25: Clean up clock calculations
Avoid possible overflow in clock calculations, and do not waste calls to lldiv()
to divide simple ulongs.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
2012-10-15 11:54:12 -07:00
Benoît Thébaudeau
3c76add262 mx25: Fix decode_pll
The MFN bit-field of the PLL registers represents a signed value. See the
reference manual.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
2012-10-15 11:54:12 -07:00
Benoît Thébaudeau
323846561a mx5/6 clocks: Fix SDHC clocks
The i.MX5 eSDHC clocks were considered as coming from the IPG clock although
they have dedicated clock paths.

Also, on i.MX5/6, each SDHC instance has a dedicated clock, so gd->sdhc_clk must
be set accordingly. This is good for the case only a single SDHC instance is
used (initialization made with fsl_esdhc_mmc_init()). A future patch will fix
the multi-instance use case (initialization made directly with
fsl_esdhc_initialize()).

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Eric Bénard <eric@eukrea.com>
Cc: Otavio Salvador <otavio@ossystems.com.br>
2012-10-15 11:54:12 -07:00
Benoît Thébaudeau
be2f93b1ea mx51: Fix I2C clock ID check
There are only 2 I²C instances on i.MX51, but 3 on i.MX53.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
2012-10-15 11:54:12 -07:00
Benoît Thébaudeau
d5fe220df4 mx5 clocks: Fix MXC_FEC_CLK
The FEC clock does not come from PLL1, but from the IPG clock. The previous code
was even inconsistent with itself, returning the IPG clock as expected for
imx_get_fecclk(), but the PLL1 clock for mxc_get_clock(MXC_FEC_CLK).

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
2012-10-15 11:54:12 -07:00
Benoît Thébaudeau
3cbd107b5f mx5 clocks: Simplify imx_get_cspiclk()
The code handling the dividers was duplicated for each possible input clock, and
this function can benefit from the newly introduced get_standard_pll_sel_clk()
function instead of duplicating this mux handling code.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
2012-10-15 11:54:11 -07:00
Benoît Thébaudeau
08028b113e mx5 clocks: Fix get_uart_clk()
This function returned 66500000 instead of the correct lp_apm clock frequency if
the CCM.CSCMR1.uart_clk_sel mux is set to 3.

This patch fixes this issue by introducing the get_standard_pll_sel_clk()
function that will be used by future patches to handle identical muxes used by
many other clocks.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
2012-10-15 11:54:11 -07:00
Benoît Thébaudeau
f124e718f4 mx5 clocks: Fix get_ipg_per_clk()
This fixes the "IPG PERCLK" frequency printed by the clocks command. The issue
was that get_ipg_per_clk() used periph_clk instead of lp_apm in the case
CCM.CBCMR.perclk_lp_apm_sel is set.

It also fixes I²C support.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
2012-10-15 11:54:11 -07:00
Benoît Thébaudeau
55c8df0cb1 mx5 clocks: Fix get_periph_clk()
In the case periph_clk comes from periph_apm_clk, the latter is selected by the
CCM.CBCMR.periph_apm_sel mux, which can source the lp_apm clock from its
input ♯2. get_periph_clk() returned 0 instead of the lp_apm clock frequency in
this case.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
2012-10-15 11:54:11 -07:00
Benoît Thébaudeau
b94792982f mx5 clocks: Fix get_lp_apm()
If CCM.CCSR.lp_apm is set, the lp_apm clock is not necessarily 32768 Hz x 1024.
In that case:
 - on i.MX51, this clock comes from the output of the FPM,
 - on i.MX53, this clock comes from the output of PLL4.

This patch fixes the code accordingly.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
2012-10-15 11:54:11 -07:00
Benoît Thébaudeau
649dc8abd9 mx5 clocks: Add and use CCSR definitions
This fixes config_pll_clk(), which used 0x20 instead of 0x200 for PLL4_CLOCK.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
2012-10-15 11:54:11 -07:00
Benoît Thébaudeau
414e1660c8 mx51: Fix USB PHY clocks
The i.MX51 has a single USB PHY clock, while the i.MX53 has two. These 3 clocks
have different clock gate control bit-fields.

The existing code was correct only for i.MX53, so this patch fixes the i.MX51
use case.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Jana Rapava <fermata7@gmail.com>
Cc: Wolfgang Grandegger <wg@denx.de>
Cc: Igor Grinberg <grinberg@compulab.co.il>
2012-10-15 11:54:11 -07:00
Benoît Thébaudeau
248cdf0b52 mx5: Fix clock gate values
The clock gate values are 2-bit bit-fields. Hence, setting or clearing only one
of these bits like what was done is wrong and can lead to unpredictable behavior
depending on the original value of these bit-fields.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
2012-10-15 11:54:10 -07:00
Benoît Thébaudeau
1f5e4ee0b9 mx5: Use explicit clock gate names
Use clock gate definitions having names showing clearly the gated clock instead
of names giving only a register field index.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
2012-10-15 11:54:10 -07:00
Benoît Thébaudeau
846b38981f mx5 clocks: Cleanup
Clean up the i.MX5 clock driver:
 - Use readl() and writel() instead of their __raw_ counterparts.
 - Use the clr/setbits_le32() family of macros rather than expanding code.
 - Use accessor macros for bit-fields instead of _MASK and _OFFSET.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
2012-10-15 11:54:10 -07:00
Benoît Thébaudeau
833b6435de mx5/6: Define default SoC input clock frequencies
Define default SoC input clock frequencies for i.MX5/6 in order to get rid of
duplicated definitions.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Jason Liu <r64343@freescale.com>
Cc: Matt Sealey <matt@genesi-usa.com>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
2012-10-15 11:54:10 -07:00
Matthias Weisser
e7bed5c2b3 imx: Use MXC_I2C_CLK in imx i2c driver
i2c didn't work on imx25 due to missing MXC_IPG_PERCLK. Now using
MXC_I2C_CLK on all imx systems using i2c.

Signed-off-by: Matthias Weisser <weisserm@arcor.de>
Acked-by: Stefano Babic <sbabic@denx.de>
2012-10-15 11:54:10 -07:00
Eric Benard
8a57fdc640 mx25: add CPU revision 1.2
tested on a MCIMX257CJM4A which now reports :
CPU:   Freescale i.MX25 rev1.2 at 399 MHz

Signed-off-by: Eric Bénard <eric@eukrea.com>
Acked-by: Otavio Salvador <otavio@ossystems.com.br>
2012-10-15 11:54:10 -07:00
Fabio Estevam
7dd6545da7 mx6q: Add basic support for mx6qsabreauto
mx6qsabreauto is a board based on mx6q SoC with the following features:
- 2GB of DDR3
- 2 USB ports
- 1 HDMI output port
- SPI NOR
- 2 LVDS LCD ports
- Gigabit Ethernet
- Camera
- eMMC and SD card slot
- Multichannel Audio
- CAN
- SATA
- NAND
- PCIE
- Video Input

Add very basic support for it.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-10-15 11:54:09 -07:00
Fabio Estevam
bcfc71186e configs: mx6: Add a common config file
Add a common mx6 config file that can be shared between some mx6 boards.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-10-15 11:54:09 -07:00
Eric Nelson
2af7e81015 i.MX6: get rid of redundant struct src_regs (dupe of struct src)
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
2012-10-15 11:54:09 -07:00
Eric Nelson
de710a14b5 i.MX6: define struct iomuxc and IOMUX_GPR2 register bitfields
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
Acked-by: Stefano Babic <sbabic@denx.de>
2012-10-15 11:54:09 -07:00
Eric Nelson
e66ad6e747 i.MX6: Add ANATOP_PFD_480 bitfield constants
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
Acked-by: Stefano Babic <sbabic@denx.de>
2012-10-15 11:54:09 -07:00
Eric Nelson
a83e1b7b8c i.MX6: define IOMUX_GPR3 register bitfields
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
2012-10-15 11:54:09 -07:00
Eric Nelson
344da71a20 i.MX6: define bitfields for CHSCCDR register
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
2012-10-15 11:54:09 -07:00
Eric Nelson
da6df2d1c8 i.MX6: change register name for CCM_CHSCCDR to match ref. manual
Register CCM_CHSCCDR (offset 0x34 in CCM) is named CCM_CHSCCDR in
reference manual, but was named chscdr in struct mxc_ccm_reg.

Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
2012-10-15 11:54:08 -07:00
Eric Nelson
0bb7e316f0 i.MX6: provide functional names for CCM_CCGR0-CCGR6 bit fields
Add meaningful constants for each clock channels and use them for
enabling and disabling i.MX6 clocks.

Includes an update to enable/disable the IPU1 clock in
drivers/video/ipu_common to remove IMX5x register access
when used on i.MX6 as discussed in V1:

     http://patchwork.ozlabs.org/patch/185129/

Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
2012-10-15 11:54:08 -07:00
Fabio Estevam
e72d617860 mx6qsabresd: Add 8-bit USDHC support
USDHC3 has 8 pins wired in mx6qsabresd. Configure the extra pins.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-10-15 11:54:08 -07:00
Fabio Estevam
a0d21fc01a mx6qsabresd: Add Ethernet support
mx6qsabresd has a AR8031 Gigabit PHY.

Add support for it.

Also increase CONFIG_SYS_MALLOC_LEN so that FEC buffer allocation does not fail.

Tested on 1Gbp and 100Mbps networks.

Suggested-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
2012-10-15 11:54:08 -07:00
Fabio Estevam
7891e258d4 mx6: Add basic support for mx6qsabresd board.
mx6qsabresd is a board based on mx6q SoC with the following features:
- 1GB of DDR3
- 1 USB OTG port
- 1 HDMI output port
- SPI NOR
- LVDS panel
- Gigabit Ethernet
- Camera Connector
- eMMC and SD card slot
- Audio

Add very basic support for it.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-10-15 11:54:08 -07:00
Fabio Estevam
af7ec0b058 mx6q: Factor out common DDR3 init code
Factor out common DDR3 initialization code, allowing easier maintainance of such
scripts.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-10-15 11:54:08 -07:00
Lukasz Dalek
539e9ffd92 pxa: Add code to examine cpu model and revision
Add function which return CPU model and revision which can be used for
cpu detection.

Signed-off-by: Lukasz Dalek <luk0104@gmail.com>
2012-10-15 11:54:07 -07:00
Lucas Stach
c0720afbb5 tegra: nand: add board pinmux
Boards may require a different pinmux setup for NAND than the default one.
Add a way to call into board specific code to set this up.

Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-10-15 11:54:07 -07:00
Lucas Stach
516f00b324 tegra: clean up board include hell
The prototypes used in board files were all scattered out, which lead to
code duplication between SPL and normal U-Boot and some prototypes not actually
being used. Consolidate this in a common board header.

Signed-off-by: Lucas Stach <dev@lynxeye.de>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-10-15 11:54:07 -07:00
Lucas Stach
ac56d959a3 tegra: add funcmux entry for NAND attached to KBC
Secondary config for the Flash attachment.

Signed-off-by: Lucas Stach <dev@lynxeye.de>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-10-15 11:54:07 -07:00
Lucas Stach
0cd10c7abf tegra20: rework UART GPIO handling
Rename board provided gpio_config_uart() to
gpio_early_init_uart() as it does the same thing as the equally
called function provided by the uart-switch code. This allows
to simply call this function in early board init whether or not
we are building with CONFIG_UART_SWITCH defined.

Also provide a weak symbol for this function, to avoid the
need to provide this function for boards that don't need any
fixup.

This patch supersedes the earlier posted
"tegra: convert gpio_config_uart to weak symbol".
Build tested with MAKEALL -s tegra20

Signed-off-by: Lucas Stach <dev@lynxeye.de>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-10-15 11:54:07 -07:00
Lucas Stach
65530a842e tegra20: add clock_set_pllout function
Common practice on Tegra 2 boards is to use the pllp_out4 FO
to generate the ULPI reference clock. For this to work we have
to override the default hardware generated output divider.

This function adds a clean way to do so.

Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-10-15 11:54:07 -07:00
Lucas Stach
3f44e44f33 tegra20: complete periph_id enum
Most Tegra boards output the ULPI reference clock on pad DEV2.

Complete the periph_id enum so that we are able to enable this
clock output circuit.

Signed-off-by: Lucas Stach <dev@lynxeye.de>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-10-15 11:54:06 -07:00
Stephen Warren
01ca286526 tegra: enable CONFIG_CMD_PART
This is extremely likely to be used from the boot.scr that Tegra's default
bootcmd locates and executes.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-10-15 11:54:06 -07:00
Tom Warren
150c24936b Tegra20: Move some include files to arch-tegra for sharing with Tegra30
The move is pretty straight-forward. ap20.h and tegra20.h were renamed to ap.h and tegra.h.
Some files remain in arch-tegra20 but 'include' a file in 'arch-tegra' with #defines & structs
that will be common between T20 and T30 HW. HW-specific #defines, etc. stay in the 'arch-tegra20'
'root' file.

All boards build OK w/MAKEALL -s tegra20. Checkpatch.pl runs clean. Seaboard works OK.

Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-10-15 11:54:06 -07:00
Tom Warren
3064f32278 Tegra20: Move some code files to common directories for upcoming Tegra30 patches.
Move files that are going to be common between T20 and T30 into 'tegra-common'
subdirs in AVP (arm720t), CPU (armv7), and shared (arch/arm/cpu/.) areas. Any
files that are left behind in '/tegra20' will be copied to '/tegra30' subdirs
and modified for that SoC. The 'common' files should need only minor changes.

Include files (arch/arm/include/asm/arch-tegra/tegra20) will be done in a
follow-on patch.

Builds fine w/MAKEALL -s tegra20. Checkpatch.pl is clean.

Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-10-15 11:54:06 -07:00
Thierry Reding
66b796a560 tegra: Rename Medcom to Medcom-Wide
Medcom is the marketing name for an older, PXA-based version of the same
device. In order to avoid confusion, rename the Tegra-based version to
the new marketing name.

Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-10-15 11:54:06 -07:00
Thierry Reding
b9ce38ef29 tegra: Update Avionic Design vendor prefix
The official vendor prefix for Avionic Design is now "ad". Update the
board DTS files accordingly.

Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-10-15 11:54:06 -07:00
Joe Hershberger
1c4ea78aa7 tools: Add a README note about fw_printenv lock file
Add a mention of the lock file to the README for the fw_printenv tool.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Reported-by: Luka Perkov <uboot@lukaperkov.net>
2012-10-15 11:54:05 -07:00
Joe Hershberger
586197dfe4 env: Check for NULL pointer in envmatch()
If the pointer passed into envmatch() is NULL, return -1 instead of
crashing.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
2012-10-15 11:54:05 -07:00
Joe Hershberger
e4a223f04d tools/env: Serialize calls to fw_*env
Use a lock file at /var/lock/fw_printenv.lock.
Avoids seriously confusing the MTD driver.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
2012-10-15 11:54:05 -07:00
Joe Hershberger
d9acae1a88 tools/env: Don't call env_init() in fw_getenv()
We will only call fw_getenv when the env has already been initialized.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
2012-10-15 11:54:05 -07:00
Joe Hershberger
62a34a04e7 tools/env: Remove unneeded complexity
The length included the name length, and then it was subtracted back
out on each use.  Now we don't include it in the first place.  Also
realloc as we process arguments and eliminate memset.  Use memcpy
instead of manually copying each byte.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
2012-10-15 11:54:05 -07:00
Joe Hershberger
497f2053f8 tools/env: Use a board-specific default env
Originally added in aa701b9433

Before this patch, there was a hard-coded env that was used as default
if the env in flash is detected as invalid.  Now this tool (compiled
for a given board) will share the default env with the u-boot for the
board.

Fix include of config.h

Need to define "TEXT_BASE" when building the fw_env tool so that the
default env will be correct for environments which use it.

Define __ASSEMBLY__ when calling #include <config.h> so that we only
get #defines (all we're interested in).

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
2012-10-15 11:54:05 -07:00
Daniel Schwierzeck
47708457f8 common: cmd_bdinfo: fix type of value in print_lnum
This fixes a warning when compiling with ELDK-5.2.1 for MIPS64:

cmd_bdinfo.c: In function 'print_lnum':
cmd_bdinfo.c:56:2: warning: format '%llX' expects argument of type 'long long unsigned int', but argument 3 has type 'u64' [-Wformat]

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2012-10-15 11:54:04 -07:00
Simon Glass
14813f19e3 input: Add debugging for key matrix key codes
These are read from the fdt - add a debug feature to display the mapping
on start-up.

See that we get debug output listing the keycodes

Signed-off-by: Simon Glass <sjg@chromium.org>
2012-10-15 11:54:04 -07:00
Simon Glass
71dc6bca4e input: Allow key ghosting filter to be disabled
Some keyboards will not need a key ghosting filter, so make this feature
optional.

Signed-off-by: Simon Glass <sjg@chromium.org>
2012-10-15 11:54:04 -07:00
Simon Glass
1b1d3e6461 input: Separate out keyboard repeat/delay from init
It is inconvenient to have to specify the keyboard repeat and delay at
init time if it is not yet available, so move this into a separate
function.

Some drivers will want to do this when their keyboard init routine
is actually called.

Signed-off-by: Simon Glass <sjg@chromium.org>
2012-10-15 11:54:04 -07:00
Simon Glass
00f1099e09 input: Correct key_matrix fdt decoding
Some issues with this were not addressed in the previous series. Fix up
the binding decoding to deal with what is actually expected in the fdt.

This corrects the broken keyboard on seaboard.

Signed-off-by: Simon Glass <sjg@chromium.org>
2012-10-15 11:54:04 -07:00
Fabio Estevam
92eee7cde1 tools: Add cleanpatch
There are some errors reported by checkpatch.pl that can be easily cleaned up by
using the cleanpatch tool.

Import the cleanpatch script from linux kernel 3.5.4 stable version as from the
following commit:

commit cb3ed5b7e09c6c0462e396d55e3fecc0980a333a
Author: H. Peter Anvin <hpa@zytor.com>
Date:   Fri May 25 17:58:26 2007 -0700

    scripts: Make cleanfile/cleanpatch warn about long lines

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-10-15 11:54:04 -07:00
Simon Glass
afb9bf55d0 patman: Handle checkpatch.pl not providing file/line info
Sometimes we don't get a valid filename or line number from checkpatch.pl,
for example if the patch is in a bad format. Deal with this by using a
default value, rather than a stack trace.

Signed-off-by: Simon Glass <sjg@chromium.org>
2012-10-15 11:54:04 -07:00
Simon Glass
ef0e9de82b patman: Support Series-name tag to name a series
Sometimes it is possible to forget the name of the branch you used to
generate an upstream series. To assist with this, add an optional
patman does not use this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2012-10-15 11:54:03 -07:00
Kim Phillips
33f336d528 MAKEALL: add a -C/--check option to enable build checking
thanks to Tom Rini for the good idea.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2012-10-15 11:54:03 -07:00
Kim Phillips
4ab64933e3 add check infrastructure, default sparse
Add support for running source code checkers on u-boot source, e.g.,
using sparse to aid with typechecking.  This comes in especially
handy as SoC vendors mix and match cores and devices with different
endianness, thus here we add CHECK_ENDIAN to the otherwise linux
kernel default CHECKFLAGS.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2012-10-15 11:54:03 -07:00
Pavel Herrmann
e46a4350b4 sata.h: Make all sata/ata drivers include <sata.h>
- block_dev_desc_t says that block_(read|write) take lbaint_t for blkcnt
  not ulong.
- We also move the extern of sata_dev_desc into <sata.h>
- Remove now duplicate declarations from driver-specific headers.

Signed-off-by: Tom Rini <trini@ti.com>
Signed-off-by: Pavel Herrmann <morpheus.ibis@gmail.com>
2012-10-15 11:54:03 -07:00
Tom Rini
4ac8f8e022 ide.h: Make ide_(read|write) match block_dev_desc_t block_(read|write)
block_dev_desc_t says that block_(read|write) take lbaint_t for blkcnt
not ulong

Signed-off-by: Tom Rini <trini@ti.com>
2012-10-15 11:54:03 -07:00
Tom Rini
0e7d856ea5 sil_sata: Make sata_write() comply with <part.h>
sata_write() takes a const void as the last argument.  Fixing this means
we also need to make ata_low_level_rw_lba{28,48} also take a const void.

Signed-off-by: Tom Rini <trini@ti.com>
2012-10-15 11:54:03 -07:00
Tom Rini
98391ff143 sata_dwc: Make sata_write() use const void, per <part.h>
Signed-off-by: Tom Rini <trini@ti.com>
2012-10-15 11:54:02 -07:00
Tom Rini
974d801401 pata_bfin: Make sata_{read,write}() comply with <part.h>
These functions take lbaint_t for blkcnt.

Signed-off-by: Tom Rini <trini@ti.com>
2012-10-15 11:54:02 -07:00
Tom Rini
40c030f8ff fsl_sata: Make sata_{read,write}() comply with <part.h>
- sata_write() takes a const void as the last argument.  Fixing this
  means we also need to make ata_low_level_rw_lba{28,48} also take a
  const void.
- Both sata_{read,write} take lbaint_t for blkcnt and ulong for blknr

Signed-off-by: Tom Rini <trini@ti.com>
2012-10-15 11:54:02 -07:00
Tom Rini
dac8757100 dwc_ahsata: Make sata_write() comply with <part.h>
sata_write() takes a const void as the last argument.  Fixing this means
we also need to make ata_low_level_rw_lba{28,48} also take a const void.

Acked-by: Stefano Babic <sbabic@denx.de>
Signed-off-by: Tom Rini <trini@ti.com>
2012-10-15 11:54:02 -07:00
Tom Rini
5048a672d9 ata_piix: sata_write must take a const void argument.
Signed-off-by: Tom Rini <trini@ti.com>
2012-10-15 11:54:02 -07:00
Tom Rini
879a57ac0e ata_piix: Fix checkpatch issues
While in here also:
- Switch to debug from custom PRINTF for debugging.
- Use mdelay rather than custom msleep.

Signed-off-by: Tom Rini <trini@ti.com>
2012-10-15 11:54:02 -07:00
Lukasz Dalek
e5f24753c9 usb.h: Add udc_disconnect prototype to usb.h
PXA25x gadget implements common function usb_disconnect().
This patch adds this function prototype into usb.h for boards using it.

Signed-off-by: Lukasz Dalek <luk0104@gmail.com>
2012-10-15 11:54:02 -07:00
Lukasz Dalek
3c09a2836d pxa25x: Add support for USB ethernet gadget
Add to pxa25x based devices support for USB ethernet gadget. This is a
port of pxa25x UDC driver from Linux kernel.

Signed-off-by: Lukasz Dalek <luk0104@gmail.com>
2012-10-15 11:54:01 -07:00
Lukasz Dalek
2bb378841e usbether: Removed DEV_CONFIG_{CDC,SUBSET}
Removed DEV_CONFIG_CDC and DEV_CONFIG_SUBSET and replaced it with
CONFIG_USB_ETH_CDC and CONFIG_USB_ETH_SUBSET.

Signed-off-by: Lukasz Dalek <luk0104@gmail.com>
2012-10-15 11:54:01 -07:00
Lukasz Dalek
4c43cd5a63 usbether: Define CONFIG_USB_ETH_{CDC,SUBSET}
Introduced CONFIG_USB_ETH_CDC and CONFIG_USB_ETH_SUBSET as preparation
for removal DEV_CONFIG_CDC and DEV_CONFIG_SUBSET

Signed-off-by: Lukasz Dalek <luk0104@gmail.com>
2012-10-15 11:54:01 -07:00
Lukasz Dalek
563aed2539 usbether: Fixed bug when using with PXA25X chips
PXA25X chips don't support alternate settings so driver uses non-CDC
driver.
But only code defined between DEV_CONFIG_CDC signals that network is up.
This patch is fixing this bug by signaling that network is up after USB
SET_INTERFACE request.

Signed-off-by: Lukasz Dalek <luk0104@gmail.com>
2012-10-15 11:54:01 -07:00
Lucas Stach
6d365ea0ac tegra20: add USB ULPI init code
This adds the required code to set up a ULPI USB port. It is
mostly a port of the Linux ULPI setup code with some tweaks
added for more correctness, discovered along the way of
debugging this.

To use this both CONFIG_USB_ULPI and CONFIG_USB_ULPI_VIEWPORT
have to be set in the board configuration file.

Signed-off-by: Lucas Stach <dev@lynxeye.de>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
2012-10-15 11:54:01 -07:00
Lucas Stach
141288b3a3 usb: ulpi: add indicator configuration function
Allows for easy configuration of the VBUS indicator related ULPI
config bits.

Also move the external indicator setup from ulpi_set_vbus() to
the new function.

Signed-off-by: Lucas Stach <dev@lynxeye.de>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
2012-10-15 11:54:01 -07:00
Lucas Stach
7a46b2c7f2 usb: ehci: don't print debug output
This is clearly some sort of debug output and should not
be printed during normal operation.

Signed-off-by: Lucas Stach <dev@lynxeye.de>
2012-10-15 11:54:00 -07:00
Lucas Stach
a896211ff1 tegra20: port to new ehci interface
EHCI interface now supports more than one controller. Wire up our usb functions
to use this new interface.

Signed-off-by: Lucas Stach <dev@lynxeye.de>
2012-10-15 11:54:00 -07:00
Lucas Stach
93c2582fea usb: add support for multiple usb controllers
Allows to initialize more than one USB controller at once.

v2: print message when controller stop fails

Signed-off-by: Lucas Stach <dev@lynxeye.de>
Reviewed-by: Marek Vasut <marex@denx.de>
2012-10-15 11:54:00 -07:00
Lucas Stach
676ae068d9 usb: ehci: rework to take advantage of new lowlevel interface
Kill off ehci-core.h
It was used to specify some static controller data. To support more than
one controller being active at any time we have to carry the controller
data ourselfes. Change the ehci interface accordingly.

NOTE: OMAP implemented the ehci stuff a bit backwards and should be fixed
to do the same thing as other platforms. But the change for now is at least
compile clean.

Signed-off-by: Lucas Stach <dev@lynxeye.de>
Reviewed-by: Marek Vasut <marex@denx.de>
2012-10-15 11:54:00 -07:00
Lucas Stach
c7e3b2b586 usb: lowlevel interface change to support multiple controllers
Carry an index in the lowlevel usb functions to make specify the
respective usb controller.

Also pass through an controller struct from lowlevel_init to the
creation of the root usb device of this controller.

Signed-off-by: Lucas Stach <dev@lynxeye.de>
Reviewed-by: Marek Vasut <marex@denx.de>
2012-10-15 11:54:00 -07:00
Igor Grinberg
5527efe501 pmc405de and zeus: remove the env_ptr externs
The env_ptr is already declared in environment.h, so there is no need to
redeclare in board files (especially after including the environment.h)
Remove those declarations.

Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Matthias Fuchs <matthias.fuchs@esd.eu>
2012-10-15 11:54:00 -07:00
Stefan Roese
a821d08dca ppc4xx: Remove AP1000 board support
As the board seems to be unmaintained for some time, lets remove
the support in mainline completely.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: James MacAulay <james.macaulay@amirix.com>
Acked-by: Marek Vasut <marex@denx.de>
2012-10-15 11:53:59 -07:00
Stefan Roese
dee9c534db ppc4xx: Remove ML2 board support
As the board seems to be unmaintained for some time, lets remove
the support in mainline completely.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Peter De Schrijver <p2@mind.be>
Acked-by: Marek Vasut <marex@denx.de>
2012-10-15 11:53:59 -07:00
Stefan Roese
99bcad1809 ppc4xx: Remove IOP480 support
Since the IOP480 (PPC401/3 variant from PLX) is only used on 2
boards that are not actively maintained, lets remove support
for it completely. This way the ppc4xx code will get a bit cleaner.

Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Matthias Fuchs <matthias.fuchs@esd.eu>
Acked-by: Marek Vasut <marex@denx.de>
2012-10-15 11:53:59 -07:00
Marek Vasut
f2760c4acd serial: Enhance the manual relocation
Enhance the manual relocation of drivers operations structure by
checking if the entries are NULL and increment them only if they
are not. This allows for setting any entry to NULL and it will
survive the manual relocation.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Tom Rini <trini@ti.com>
Cc: Anatolij Gustschin <agust@denx.de>
Cc: Stefan Roese <sr@denx.de>
2012-10-15 11:53:59 -07:00
Marek Vasut
c1f5805a9d serial: Compile drivers/serial/serial.c by default
Compile drivers/serial/serial.c by default both into SPL and into
non-SPL builds, since CONFIG_SERIAL_MULTI is now the default state.
Also having common/serial.c in by default now, it's pointless to keep
-DCONFIG_SERIAL_MULTI in CPPFLAGS any longer, so remove it as well.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Tom Rini <trini@ti.com>
Cc: Anatolij Gustschin <agust@denx.de>
Cc: Stefan Roese <sr@denx.de>
2012-10-15 11:53:59 -07:00
Marek Vasut
036036d79c serial: Remove CONFIG_SERIAL_MULTI from remaining sources
Remove the parts depending either on disabled CONFIG_SERIAL_MULTI
or ifdefs around CONFIG_SERIAL_MULTI parts since CONFIG_SERIAL_MULTI
is now enabled by default.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Tom Rini <trini@ti.com>
Cc: Anatolij Gustschin <agust@denx.de>
Cc: Stefan Roese <sr@denx.de>
2012-10-15 11:53:59 -07:00
Marek Vasut
a382725060 serial: Remove CONFIG_SERIAL_MULTI from serial drivers
Remove the support for not-CONFIG_SERIAL_MULTI part from serial
port drivers and some board files. Since CONFIG_SERIAL_MULTI is
now enabled by default, that part is a dead code. Remove it.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Anatolij Gustschin <agust@denx.de>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Tom Rini <trini@ti.com>
2012-10-15 11:53:58 -07:00
Marek Vasut
bffe31c144 serial: Remove CONFIG_SERIAL_MULTI from config files
Remove any notion of CONFIG_SERIAL_MULTI from board config files.
Since CONFIG_SERIAL_MULTI is now enabled by default, it is useless
to specify this config option in the board config files. Therefore
remove it.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Anatolij Gustschin <agust@denx.de>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Tom Rini <trini@ti.com>
2012-10-15 11:53:58 -07:00
Marek Vasut
82dda962f0 serial: Unconditionally enable CONFIG_SERIAL_MULTI
Enable CONFIG_SERIAL_MULTI for all builds of U-Boot. That includes
both SPL builds and non-SPL builds, everything. To avoid poluting
this patch with removal of ifdef-endif constructions containing
CONFIG_SERIAL_MULTI, the CONFIG_SERIAL_MULTI is temporarily added
into CPPFLAGS in config.mk . This will be again removed in following
patch.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Tom Rini <trini@ti.com>
2012-10-15 11:53:58 -07:00
Marek Vasut
7742aa65a8 serial: Move common/serial.c to drivers/serial/
Move the common/serial.c into driver/serial/, since this file
provides serial multiplexing functions and it is imperative to
be linked with libserial.o instead of libcommon.o.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Tom Rini <trini@ti.com>
2012-10-15 11:53:58 -07:00
Marek Vasut
19b8fa0b61 serial: ns16550: Rename serial.c to serial_ns16550.c
This serial driver had wrong name of the source file for some time
now. The name of the driver was serial.c instead of any more logical
and fitting name. Thus, rename the driver source file to serial_ns16550.c
and be done with it.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Tom Rini <trini@ti.com>
Cc: Anatolij Gustschin <agust@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Mike Frysinger <vapier@gentoo.org>
Cc: Michal Simek <monstr@monstr.eu>
2012-10-15 11:53:58 -07:00
Marek Vasut
f2041388bd serial: ns16550: Call usbtty_poll only in non-SPL build
Having both USBTTY and CONFIG_SERIAL_MULTI enabled in SPL, the
usbtty.c file is protected in Makefile to not be compiled into
the SPL. Yet, the ns16550 serial driver does not contain such
protection. Add it to avoid missing symbol error.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Tom Rini <trini@ti.com>
2012-10-15 11:53:58 -07:00
Marek Vasut
f1f1e9cb73 serial: Use puts() and hang() instead of panic() in SPL
If case the get_current() call fails before relocation, the U-Boot
must try to print an error message, fail and either reset or halt.
Such error is critical enough to halt the system, as it means the
system is in very bad state.

This is now also used in SPL, since CONFIG_SERIAL_MULTI is enabled
unconditionally. To avoid compiling whole vsprintf.c into SPL, use
puts() to print error message and hang() to stop the system in case
of SPL build.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Tom Rini <trini@ti.com>
2012-10-15 11:53:57 -07:00
Marek Vasut
320de1354f serial: mxs: spl: Remove empty serial_* functions from SPL code
Remove the empty bodies from serial_* functions from MXS SPL code.
These empty implementations are now in common/serial.c instead so
declaring them also in the SPL code would cause a colision once
serial multi is enabled unconditionally.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Tom Rini <trini@ti.com>
Cc: Stefano Babic <sbabic@denx.de>
2012-10-15 11:53:57 -07:00
Marek Vasut
8bdd7efa23 serial: sh: Implement CONFIG_SERIAL_MULTI into sh serial driver
Implement support for CONFIG_SERIAL_MULTI into sh serial driver.
This driver was so far only usable directly, but this patch also adds
support for the multi method. This allows using more than one serial
driver alongside the sh driver. Also, add a weak implementation
of default_serial_console() returning this driver.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Phil Edworthy <PHIL.EDWORTHY@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Tom Rini <trini@ti.com>
2012-10-15 11:53:57 -07:00
Marek Vasut
a30a422084 serial: arm: Implement CONFIG_SERIAL_MULTI into sa1100 serial driver
Implement support for CONFIG_SERIAL_MULTI into sa1100 serial driver.
This driver was so far only usable directly, but this patch also adds
support for the multi method. This allows using more than one serial
driver alongside the sa1100 driver. Also, add a weak implementation
of default_serial_console() returning this driver.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Tom Rini <trini@ti.com>
2012-10-15 11:53:57 -07:00
Marek Vasut
eb5076697a serial: arm: Implement CONFIG_SERIAL_MULTI into s3c44b0 serial driver
Implement support for CONFIG_SERIAL_MULTI into s3c44b0 serial driver.
This driver was so far only usable directly, but this patch also adds
support for the multi method. This allows using more than one serial
driver alongside the s3c44b0 driver. Also, add a weak implementation
of default_serial_console() returning this driver.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Tom Rini <trini@ti.com>
2012-10-15 11:53:57 -07:00
Marek Vasut
39f614779f serial: arm: Implement CONFIG_SERIAL_MULTI into pl01x serial driver
Implement support for CONFIG_SERIAL_MULTI into pl01x serial driver.
This driver was so far only usable directly, but this patch also adds
support for the multi method. This allows using more than one serial
driver alongside the pl01x driver. Also, add a weak implementation
of default_serial_console() returning this driver.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Tom Rini <trini@ti.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Mathieu J. Poirier <mathieu.poirier@linaro.org>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: John Rigby <john.rigby@linaro.org>
Cc: Rabin Vincent <rabin.vincent@stericsson.com>
2012-10-15 11:53:57 -07:00
Marek Vasut
0dd9b84908 serial: arm: Implement CONFIG_SERIAL_MULTI into netarm serial driver
Implement support for CONFIG_SERIAL_MULTI into netarm serial driver.
This driver was so far only usable directly, but this patch also adds
support for the multi method. This allows using more than one serial
driver alongside the netarm driver. Also, add a weak implementation
of default_serial_console() returning this driver.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Tom Rini <trini@ti.com>
Cc: Stefano Babic <sbabic@denx.de>
2012-10-15 11:53:56 -07:00
Marek Vasut
a943472c23 serial: arm: Implement CONFIG_SERIAL_MULTI into mxc serial driver
Implement support for CONFIG_SERIAL_MULTI into mxc serial driver.
This driver was so far only usable directly, but this patch also adds
support for the multi method. This allows using more than one serial
driver alongside the mxc driver. Also, add a weak implementation
of default_serial_console() returning this driver.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Tom Rini <trini@ti.com>
Cc: Stefano Babic <sbabic@denx.de>
2012-10-15 11:53:56 -07:00
Marek Vasut
7cd851a50b serial: Implement CONFIG_SERIAL_MULTI into max3100 serial driver
Implement support for CONFIG_SERIAL_MULTI into max3100 serial driver.
This driver was so far only usable directly, but this patch also adds
support for the multi method. This allows using more than one serial
driver alongside the max3100 driver. Also, add a weak implementation
of default_serial_console() returning this driver.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Tom Rini <trini@ti.com>
2012-10-15 11:53:56 -07:00
Marek Vasut
21310b5750 serial: arm: Implement CONFIG_SERIAL_MULTI into lpc2292 serial driver
Implement support for CONFIG_SERIAL_MULTI into lpc2292 serial driver.
This driver was so far only usable directly, but this patch also adds
support for the multi method. This allows using more than one serial
driver alongside the lpc2292 driver. Also, add a weak implementation
of default_serial_console() returning this driver.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Tom Rini <trini@ti.com>
2012-10-15 11:53:56 -07:00
Marek Vasut
1f673b4f8b serial: arm: Implement CONFIG_SERIAL_MULTI into lh7a40x serial driver
Implement support for CONFIG_SERIAL_MULTI into lh7a40x serial driver.
This driver was so far only usable directly, but this patch also adds
support for the multi method. This allows using more than one serial
driver alongside the lh7a40x driver. Also, add a weak implementation
of default_serial_console() returning this driver.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Tom Rini <trini@ti.com>
2012-10-15 11:53:56 -07:00
Marek Vasut
a7ffb2fc99 serial: arm: Implement CONFIG_SERIAL_MULTI into ks8695 serial driver
Implement support for CONFIG_SERIAL_MULTI into ks8695 serial driver.
This driver was so far only usable directly, but this patch also adds
support for the multi method. This allows using more than one serial
driver alongside the ks8695 driver. Also, add a weak implementation
of default_serial_console() returning this driver.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Tom Rini <trini@ti.com>
2012-10-15 11:53:56 -07:00
Marek Vasut
b6cd0fef93 serial: arm: Implement CONFIG_SERIAL_MULTI into ixp serial driver
Implement support for CONFIG_SERIAL_MULTI into ixp serial driver.
This driver was so far only usable directly, but this patch also adds
support for the multi method. This allows using more than one serial
driver alongside the ixp driver. Also, add a weak implementation
of default_serial_console() returning this driver.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Tom Rini <trini@ti.com>
Cc: Michael Schwingen <michael@schwingen.org>
2012-10-15 11:53:56 -07:00
Marek Vasut
7882e7c182 serial: arm: Implement CONFIG_SERIAL_MULTI into imx serial driver
Implement support for CONFIG_SERIAL_MULTI into imx serial driver.
This driver was so far only usable directly, but this patch also adds
support for the multi method. This allows using more than one serial
driver alongside the imx driver. Also, add a weak implementation
of default_serial_console() returning this driver.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Tom Rini <trini@ti.com>
Cc: Stefano Babic <sbabic@denx.de>
2012-10-15 11:53:55 -07:00
Marek Vasut
8b029db859 serial: arm: Implement CONFIG_SERIAL_MULTI into clps7111 serial driver
Implement support for CONFIG_SERIAL_MULTI into clps7111 serial driver.
This driver was so far only usable directly, but this patch also adds
support for the multi method. This allows using more than one serial
driver alongside the clps7111 driver. Also, add a weak implementation
of default_serial_console() returning this driver.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Tom Rini <trini@ti.com>
2012-10-15 11:53:55 -07:00
Marek Vasut
cef46b7792 serial: sandbox: Implement CONFIG_SERIAL_MULTI into sandbox serial driver
Implement support for CONFIG_SERIAL_MULTI into sandbox serial driver.
This driver was so far only usable directly, but this patch also adds
support for the multi method. This allows using more than one serial
driver alongside the sandbox driver. Also, add a weak implementation
of default_serial_console() returning this driver.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Tom Rini <trini@ti.com>
Cc: Mike Frysinger <vapier@gentoo.org>
2012-10-15 11:53:55 -07:00
Marek Vasut
cc61c31df2 serial: arm: Implement CONFIG_SERIAL_MULTI into s3c64xx serial driver
Implement support for CONFIG_SERIAL_MULTI into s3c64xx serial driver.
This driver was so far only usable directly, but this patch also adds
support for the multi method. This allows using more than one serial
driver alongside the s3c64xx driver. Also, add a weak implementation
of default_serial_console() returning this driver.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Tom Rini <trini@ti.com>
Cc: John Rigby <john.rigby@linaro.org>
Cc: Minkyu Kang <mk7.kang@samsung.com>
2012-10-15 11:53:55 -07:00
Marek Vasut
4bee0b36de serial: arm: Implement CONFIG_SERIAL_MULTI into s3c4510b serial driver
Implement support for CONFIG_SERIAL_MULTI into s3c4510b serial driver.
This driver was so far only usable directly, but this patch also adds
support for the multi method. This allows using more than one serial
driver alongside the s3c4510b driver. Also, add a weak implementation
of default_serial_console() returning this driver.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Tom Rini <trini@ti.com>
2012-10-15 11:53:55 -07:00
Marek Vasut
69ea807024 serial: oc: Implement CONFIG_SERIAL_MULTI into OpenCores serial driver
Implement support for CONFIG_SERIAL_MULTI into OpenCores serial driver.
This driver was so far only usable directly, but this patch also adds
support for the multi method. This allows using more than one serial
driver alongside the OpenCores driver. Also, add a weak implementation
of default_serial_console() returning this driver.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Tom Rini <trini@ti.com>
Cc: Scott McNutt <smcnutt@psyent.com>
2012-10-15 11:53:55 -07:00
Marek Vasut
28ea4c34a6 serial: Implement CONFIG_SERIAL_MULTI into ns9750 serial driver
Implement support for CONFIG_SERIAL_MULTI into ns9750 serial driver.
This driver was so far only usable directly, but this patch also adds
support for the multi method. This allows using more than one serial
driver alongside the ns9750 driver. Also, add a weak implementation
of default_serial_console() returning this driver.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Tom Rini <trini@ti.com>
2012-10-15 11:53:54 -07:00
Marek Vasut
abaef69fbe serial: mcf: Implement CONFIG_SERIAL_MULTI into MCF serial driver
Implement support for CONFIG_SERIAL_MULTI into MCF serial driver.
This driver was so far only usable directly, but this patch also adds
support for the multi method. This allows using more than one serial
driver alongside the MCF driver. Also, add a weak implementation
of default_serial_console() returning this driver.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Tom Rini <trini@ti.com>
Cc: TsiChung Liew <tsicliew@gmail.com>
2012-10-15 11:53:54 -07:00
Marek Vasut
e503f90a57 serial: arm: Implement CONFIG_SERIAL_MULTI into lpc32xx serial driver
Implement support for CONFIG_SERIAL_MULTI into lpc32xx serial driver.
This driver was so far only usable directly, but this patch also adds
support for the multi method. This allows using more than one serial
driver alongside the lpc32xx driver. Also, add a weak implementation
of default_serial_console() returning this driver.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Tom Rini <trini@ti.com>
Cc: Vladimir Zapolskiy <vz@mleia.com>
2012-10-15 11:53:54 -07:00
Marek Vasut
cfba4573f6 serial: arm: Implement CONFIG_SERIAL_MULTI into atmel serial driver
Implement support for CONFIG_SERIAL_MULTI into atmel serial driver.
This driver was so far only usable directly, but this patch also adds
support for the multi method. This allows using more than one serial
driver alongside the atmel driver. Also, add a weak implementation
of default_serial_console() returning this driver.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Tom Rini <trini@ti.com>
Cc: Xu, Hong <Hong.Xu@atmel.com>
2012-10-15 11:53:54 -07:00
Marek Vasut
b207d6455b serial: arm: Implement CONFIG_SERIAL_MULTI into altera serial driver
Implement support for CONFIG_SERIAL_MULTI into altera serial driver.
This driver was so far only usable directly, but this patch also adds
support for the multi method. This allows using more than one serial
driver alongside the altera driver. Also, add a weak implementation
of default_serial_console() returning this driver.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Tom Rini <trini@ti.com>
Cc: Scott McNutt <smcnutt@psyent.com>
2012-10-15 11:53:54 -07:00
Marek Vasut
8c08575749 serial: arm: Implement CONFIG_SERIAL_MULTI into altera_jtag serial driver
Implement support for CONFIG_SERIAL_MULTI into altera_jtag serial driver.
This driver was so far only usable directly, but this patch also adds
support for the multi method. This allows using more than one serial
driver alongside the altera_jtag driver. Also, add a weak implementation
of default_serial_console() returning this driver.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Tom Rini <trini@ti.com>
Cc: Thomas Chou <thomas@wytron.com.tw>
2012-10-15 11:53:54 -07:00
Marek Vasut
088a4f3cdf serial: powerpc: Implement CONFIG_SERIAL_MULTI into p3mx serial driver
Implement support for CONFIG_SERIAL_MULTI into p3mx serial driver.
This driver was so far only usable directly, but this patch also adds
support for the multi method. This allows using more than one serial
driver alongside the p3mx driver. Also, add a weak implementation
of default_serial_console() returning this driver.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Tom Rini <trini@ti.com>
Cc: Anatolij Gustschin <agust@denx.de>
Cc: Stefan Roese <sr@denx.de>
2012-10-15 11:53:53 -07:00
Marek Vasut
26d8eaaa48 serial: powerpc: Implement CONFIG_SERIAL_MULTI into sconsole serial driver
Implement support for CONFIG_SERIAL_MULTI into sconsole serial driver.
This driver was so far only usable directly, but this patch also adds
support for the multi method. This allows using more than one serial
driver alongside the sconsole driver. Also, add a weak implementation
of default_serial_console() returning this driver.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Tom Rini <trini@ti.com>
Cc: Anatolij Gustschin <agust@denx.de>
Cc: Stefan Roese <sr@denx.de>
2012-10-15 11:53:53 -07:00
Marek Vasut
d126f2850f serial: powerpc: Implement CONFIG_SERIAL_MULTI into ml2 serial driver
Implement support for CONFIG_SERIAL_MULTI into ml2 serial driver.
This driver was so far only usable directly, but this patch also adds
support for the multi method. This allows using more than one serial
driver alongside the ml2 driver. Also, add a weak implementation
of default_serial_console() returning this driver.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Tom Rini <trini@ti.com>
Cc: Anatolij Gustschin <agust@denx.de>
Cc: Stefan Roese <sr@denx.de>
2012-10-15 11:53:53 -07:00
Marek Vasut
829b3b2e88 serial: powerpc: Implement CONFIG_SERIAL_MULTI into evb64260 serial driver
Implement support for CONFIG_SERIAL_MULTI into evb64260 serial driver.
This driver was so far only usable directly, but this patch also adds
support for the multi method. This allows using more than one serial
driver alongside the evb64260 driver. Also, add a weak implementation
of default_serial_console() returning this driver.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Tom Rini <trini@ti.com>
Cc: Anatolij Gustschin <agust@denx.de>
Cc: Stefan Roese <sr@denx.de>
2012-10-15 11:53:53 -07:00
Marek Vasut
619c90bbeb serial: powerpc: Implement CONFIG_SERIAL_MULTI into cpci750 serial driver
Implement support for CONFIG_SERIAL_MULTI into cpci750 serial driver.
This driver was so far only usable directly, but this patch also adds
support for the multi method. This allows using more than one serial
driver alongside the cpci750 driver. Also, add a weak implementation
of default_serial_console() returning this driver.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Tom Rini <trini@ti.com>
Cc: Anatolij Gustschin <agust@denx.de>
Cc: Stefan Roese <sr@denx.de>
2012-10-15 11:53:53 -07:00
Marek Vasut
d25c39d360 serial: powerpc: Implement CONFIG_SERIAL_MULTI into cogent serial driver
Implement support for CONFIG_SERIAL_MULTI into cogent serial driver.
This driver was so far only usable directly, but this patch also adds
support for the multi method. This allows using more than one serial
driver alongside the cogent driver. Also, add a weak implementation
of default_serial_console() returning this driver.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Tom Rini <trini@ti.com>
Cc: Anatolij Gustschin <agust@denx.de>
Cc: Stefan Roese <sr@denx.de>
2012-10-15 11:53:53 -07:00
Marek Vasut
c45a14ad57 serial: powerpc: Implement CONFIG_SERIAL_MULTI into bmw serial driver
Implement support for CONFIG_SERIAL_MULTI into bmw serial driver.
This driver was so far only usable directly, but this patch also adds
support for the multi method. This allows using more than one serial
driver alongside the bmw driver. Also, add a weak implementation
of default_serial_console() returning this driver.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Tom Rini <trini@ti.com>
Cc: Anatolij Gustschin <agust@denx.de>
Cc: Stefan Roese <sr@denx.de>
2012-10-15 11:53:53 -07:00
Marek Vasut
5dee6f559f serial: powerpc: Implement CONFIG_SERIAL_MULTI into amirix serial driver
Implement support for CONFIG_SERIAL_MULTI into amirix serial driver.
This driver was so far only usable directly, but this patch also adds
support for the multi method. This allows using more than one serial
driver alongside the amirix driver. Also, add a weak implementation
of default_serial_console() returning this driver.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Tom Rini <trini@ti.com>
Cc: Anatolij Gustschin <agust@denx.de>
Cc: Stefan Roese <sr@denx.de>
2012-10-15 11:53:52 -07:00
Marek Vasut
afe4c389fb serial: powerpc: Implement CONFIG_SERIAL_MULTI into marvell serial driver
Implement support for CONFIG_SERIAL_MULTI into marvell serial driver.
This driver was so far only usable directly, but this patch also adds
support for the multi method. This allows using more than one serial
driver alongside the marvell driver. Also, add a weak implementation
of default_serial_console() returning this driver.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Tom Rini <trini@ti.com>
Cc: Anatolij Gustschin <agust@denx.de>
Cc: Stefan Roese <sr@denx.de>
2012-10-15 11:53:52 -07:00
Marek Vasut
29b5ff7f8e serial: sparc: Implement CONFIG_SERIAL_MULTI into leon3 serial driver
Implement support for CONFIG_SERIAL_MULTI into leon3 serial driver.
This driver was so far only usable directly, but this patch also adds
support for the multi method. This allows using more than one serial
driver alongside the leon3 driver. Also, add a weak implementation
of default_serial_console() returning this driver.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Tom Rini <trini@ti.com>
Cc: Peter Tyser <ptyser@xes-inc.com>
2012-10-15 11:53:52 -07:00
Marek Vasut
af7be3b6a9 serial: sparc: Implement CONFIG_SERIAL_MULTI into leon2 serial driver
Implement support for CONFIG_SERIAL_MULTI into leon2 serial driver.
This driver was so far only usable directly, but this patch also adds
support for the multi method. This allows using more than one serial
driver alongside the leon2 driver. Also, add a weak implementation
of default_serial_console() returning this driver.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Tom Rini <trini@ti.com>
Cc: Peter Tyser <ptyser@xes-inc.com>
2012-10-15 11:53:52 -07:00
Marek Vasut
fcc2074d57 serial: powerpc: Implement CONFIG_SERIAL_MULTI into iop480 serial driver
Implement support for CONFIG_SERIAL_MULTI into iop480 serial driver.
This driver was so far only usable directly, but this patch also adds
support for the multi method. This allows using more than one serial
driver alongside the iop480 driver. Also, add a weak implementation
of default_serial_console() returning this driver.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Tom Rini <trini@ti.com>
Cc: Anatolij Gustschin <agust@denx.de>
Cc: Stefan Roese <sr@denx.de>
2012-10-15 11:53:52 -07:00
Marek Vasut
7a31154627 serial: powerpc: Implement CONFIG_SERIAL_MULTI into mpc85xx serial driver
Implement support for CONFIG_SERIAL_MULTI into mpc85xx serial driver.
This driver was so far only usable directly, but this patch also adds
support for the multi method. This allows using more than one serial
driver alongside the mpc85xx driver. Also, add a weak implementation
of default_serial_console() returning this driver.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Tom Rini <trini@ti.com>
Cc: Anatolij Gustschin <agust@denx.de>
Cc: Stefan Roese <sr@denx.de>
2012-10-15 11:53:52 -07:00
Marek Vasut
d68f4da2fa serial: powerpc: Implement CONFIG_SERIAL_MULTI into mpc8260 serial drivers
Implement support for CONFIG_SERIAL_MULTI into both SCC and SMC mpc8260
serial drivers. These drivers were so far only usable directly, but this
patch also adds support for the multi method. This allows using more than
one serial driver alongside the mpc8260 drivers. Also, add a weak
implementation of default_serial_console() returning this driver.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Tom Rini <trini@ti.com>
Cc: Anatolij Gustschin <agust@denx.de>
Cc: Stefan Roese <sr@denx.de>
2012-10-15 11:53:51 -07:00
Marek Vasut
2063a54e14 serial: powerpc: Implement CONFIG_SERIAL_MULTI into mpc8220 serial driver
Implement support for CONFIG_SERIAL_MULTI into mpc8220 serial driver.
This driver was so far only usable directly, but this patch also adds
support for the multi method. This allows using more than one serial
driver alongside the mpc8220 driver. Also, add a weak implementation
of default_serial_console() returning this driver.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Tom Rini <trini@ti.com>
Cc: Anatolij Gustschin <agust@denx.de>
Cc: Stefan Roese <sr@denx.de>
2012-10-15 11:53:51 -07:00
Marek Vasut
b57c652802 serial: powerpc: Implement CONFIG_SERIAL_MULTI into mpc5xx serial driver
Implement support for CONFIG_SERIAL_MULTI into mpc5xx serial driver.
This driver was so far only usable directly, but this patch also adds
support for the multi method. This allows using more than one serial
driver alongside the mpc5xx driver. Also, add a weak implementation
of default_serial_console() returning this driver.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Tom Rini <trini@ti.com>
Cc: Anatolij Gustschin <agust@denx.de>
Cc: Stefan Roese <sr@denx.de>
2012-10-15 11:53:51 -07:00
Marek Vasut
6cb3273d11 serial: mips: Implement CONFIG_SERIAL_MULTI into JZ serial driver
Implement support for CONFIG_SERIAL_MULTI into JZ serial driver.
This driver was so far only usable directly, but this patch also adds
support for the multi method. This allows using more than one serial
driver alongside the JZ driver. Also, add a weak implementation
of default_serial_console() returning this driver.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Tom Rini <trini@ti.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
2012-10-15 11:53:51 -07:00
Marek Vasut
0191142283 serial: mips: Implement CONFIG_SERIAL_MULTI into asc serial driver
Implement support for CONFIG_SERIAL_MULTI into asc serial driver.
This driver was so far only usable directly, but this patch also adds
support for the multi method. This allows using more than one serial
driver alongside the asc driver. Also, add a weak implementation
of default_serial_console() returning this driver.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Tom Rini <trini@ti.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
2012-10-15 11:53:51 -07:00
Marek Vasut
7b953c5165 serial: mips: Implement CONFIG_SERIAL_MULTI into au1x00 serial driver
Implement support for CONFIG_SERIAL_MULTI into au1x00 serial driver.
This driver was so far only usable directly, but this patch also adds
support for the multi method. This allows using more than one serial
driver alongside the au1x00 driver. Also, add a weak implementation
of default_serial_console() returning this driver.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Tom Rini <trini@ti.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
2012-10-15 11:53:51 -07:00
Marek Vasut
41651cab97 serial: bfin: Flip the jtag serial console to CONFIG_SERIAL_MULTI
Rework the emulation of serial console via JTAG from simple ad-hoc
implementation of serial port routines to CONFIG_SERIAL_MULTI and
enable CONFIG_SERIAL_MULTI unconditionally for blackfin.

In order for the JTAG serial console to take precedence over all
other serial ports available in system, implement override for
default_serial_console call returning this JTAG serial console.

This brings in a bit of a growth of size, but eventually will allow
us to unconditionally enable CONFIG_SERIAL_MULTI throughout the whole
U-Boot and maintain only one serial subsystem.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Tom Rini <trini@ti.com>
Cc: Mike Frysinger <vapier@gentoo.org>
2012-10-15 11:53:51 -07:00
Marek Vasut
425101e115 serial: zoom2: Remove zoom2 serial prototypes from serial.h
Remove the prototypes for zoom2_serial_deviceN from serial.h . This
can't be done right away, as they are referenced from the zoom2
config file. Therefore, adjust the code so the config file only
specifies number of the port. Then, replace the simple return in
default_serial_console() with a switch across possible values, which
returns the zoom2_serial_deviceN . With such adjustment in place,
the exported prototypes in serial.h can be safely removed.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Tom Rini <trini@ti.com>
2012-10-15 11:53:50 -07:00
Marek Vasut
5ae1de0d49 serial: bfin: Adjust serial_register_bfin_uart()
Rename the serial_register_bfin_uart() to bfin_initialize_serial()
to be consistent with the rest of the naming. Next, remove it's
prototype from serial.h and properly insert it into serial.c as
the rest of the serial initialization functions.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Tom Rini <trini@ti.com>
Cc: Mike Frysinger <vapier@gentoo.org>
2012-10-15 11:53:50 -07:00
Marek Vasut
c513d7e530 serial: bfin: Remove the bfin_serialN_device exports from serial.h
Remove the exports from serial.h as they are only used in the blackfin
serial driver. Furthermore, they are only used for registration, which
is handled already inside that driver and default_serial_port() call,
which is also handled in that driver.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Tom Rini <trini@ti.com>
Cc: Mike Frysinger <vapier@gentoo.org>
2012-10-15 11:53:50 -07:00
Marek Vasut
abc0ed8da1 serial: ns16550: Move serial registration from serial_initialize()
Move the registration of eserialN_device ports from default
serial_initialize() into driver specific function called from
serial_initialize(). This slims down the serial_initialize() call
to a bare tracker of all possible serial port registration routines
in U-Boot.

The newly implemented ns16550_serial_initialize() function, which is
implemented inside of the ns16550 serial driver allows encapsulation
of eserialN_device within the ns16550 serial driver itself.

Also, remove the exports of eserialN_device from include/serial.h
as they are no longer needed. This is simply because the implementation of
default_serial_console() is wrapped into the ns16550 serial driver and
the default console is picked by CONFIG_SERIAL<N> macro in config file.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Tom Rini <trini@ti.com>
Cc: Anatolij Gustschin <agust@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Mike Frysinger <vapier@gentoo.org>
Cc: Michal Simek <monstr@monstr.eu>
2012-10-15 11:53:50 -07:00
Marek Vasut
918327c8f0 serial: mpc512x: Move serial registration from serial_initialize()
Move the registration of serialN_device ports from default
serial_initialize() into driver specific function called from
serial_initialize(). This slims down the serial_initialize() call
to a bare tracker of all possible serial port registration routines
in U-Boot.

The newly implemented mpc512x_serial_initialize() function, which is
implemented inside of the mpc512x serial driver allows encapsulation
of serialN_device within the mpc512x serial driver itself.

Also, remove the exports of serialN_device from include/serial.h
as they are no longer needed. This is simply because the implementation of
default_serial_console() is wrapped into the mpx512x serial driver and
the default console is picked by CONFIG_SERIAL<N> macro in config file.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Tom Rini <trini@ti.com>
Cc: Anatolij Gustschin <agust@denx.de>
Cc: Stefan Roese <sr@denx.de>
2012-10-15 11:53:50 -07:00
Marek Vasut
87d692295f serial: microblaze: Move serial registration from serial_initialize()
Move the registration of xuartlite_serialN_device ports from
default serial_initialize() into driver specific function called from
serial_initialize(). This slims down the serial_initialize() call
to a bare tracker of all possible serial port registration routines
in U-Boot.

The newly implemented xuartlite_serial_initialize() function, which is
implemented inside of the serial_xuartlite driver allows encapsulation
of xuartlite_serialN_device within the serial_xuartlite driver itself.

Also, remove the exports of xuartlite_serialN_device from include/serial.h
as they are no longer needed. This is simply because the implementation of
default_serial_console() is wrapped into the serial_xuartlite driver and
the default console is picked by CONFIG_SERIAL<N> macro in config file.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Tom Rini <trini@ti.com>
Cc: Michal Simek <monstr@monstr.eu>
2012-10-15 11:53:50 -07:00
Tom Rini
51d8102f8e serial: zynq: Move serial registration from serial_initialize()
Move the registration of zynq_serialN_device ports from default
serial_initialize() into driver specific function called from
serial_initialize(). This slims down the serial_initialize() call
to a bare tracker of all possible serial port registration routines
in U-Boot.

The newly implemented zynq_serial_initialize() function, which is
implemented inside of the serial_zynq driver allows encapsulation
of zynq_serialN_device within the serial_zynq driver itself.

Also, remove the exports of zynq_serialN_device from include/serial.h
as they are no longer needed. This is simply because the implementation of
default_serial_console() is wrapped into the serial_zynq driver and
the default console is picked by CONFIG_SERIAL<N> macro in config file.

Signed-off-by: Tom Rini <trini@ti.com>
2012-10-15 11:53:49 -07:00
Marek Vasut
b4980515f3 serial: s5p: Move serial registration from serial_initialize()
Move the registration of s5p_serialN_device ports from default
serial_initialize() into driver specific function called from
serial_initialize(). This slims down the serial_initialize() call
to a bare tracker of all possible serial port registration routines
in U-Boot.

The newly implemented s5p_serial_initialize() function, which is
implemented inside of the serial_s5p driver allows encapsulation
of s5p_serialN_device within the serial_s5p driver itself.

Also, remove the exports of s5p_serialN_device from include/serial.h
as they are no longer needed. This is simply because the implementation of
default_serial_console() is wrapped into the serial_s5p driver and
the default console is picked by CONFIG_SERIAL<N> macro in config file.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Tom Rini <trini@ti.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
2012-10-15 11:53:49 -07:00
Marek Vasut
1fe5c11045 serial: pxa: Move serial registration from serial_initialize()
Move the registration of serial_XXuart ports from default
serial_initialize() into driver specific function called from
serial_initialize(). This slims down the serial_initialize() call
to a bare tracker of all possible serial port registration routines
in U-Boot.

The newly implemented pxa_serial_initialize() function, which is
implemented inside of the serial_pxa driver allows encapsulation
of serial_XXuart within the serial_pxa driver itself.

Also, remove the exports of serial_XXuart from include/serial.h
as they are no longer needed. This is simply because the implementation of
default_serial_console() is wrapped into the serial_pxa driver and
the default console is picked by CONFIG_CONS_IDX macro in config file.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Tom Rini <trini@ti.com>
2012-10-15 11:53:49 -07:00
Marek Vasut
28af6385c7 serial: s3c24xx: Move serial registration from serial_initialize()
Move the registration of s3c24xx_serialN_device ports from
default serial_initialize() into driver specific function called from
serial_initialize(). This slims down the serial_initialize() call
to a bare tracker of all possible serial port registration routines
in U-Boot.

The newly implemented s3c24xx_serial_initialize() function, which is
implemented inside of the serial_s3c24xx driver allows encapsulation
of s3c24xx_serialN_device within the serial_s3c24xx driver itself.

Also, remove the exports of s3c24xx_serialN_device from include/serial.h
as they are no longer needed. This is simply because the implementation of
default_serial_console() is wrapped into the serial_s3c24xx driver and
the default console is picked by CONFIG_SERIAL<N> macro in config file.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Tom Rini <trini@ti.com>
Cc: C Nauman <cnauman@diagraph.com>
2012-10-15 11:53:49 -07:00
Marek Vasut
f0eb1f61b0 serial: mpc8xx: Move serial registration from serial_initialize()
Move the registration of serial_smc and serial_scc ports from
default serial_initialize() into CPU specific function called from
serial_initialize(). This slims down the serial_initialize() call
to a bare tracker of all possible serial port registration routines
in U-Boot.

The exports of both serial_scc_device and serial_smc_device can
not yet be removed as they are still used in default_serial_console()
calls.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Tom Rini <trini@ti.com>
Cc: Anatolij Gustschin <agust@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Mike Frysinger <vapier@gentoo.org>
2012-10-15 11:53:49 -07:00
Marek Vasut
2a333aeb8f serial: Implement serial_initfunc() macro
This macro simplifies declaration of weak aliases for per-driver
functions, which register these drivers with the serial subsystem.
The idea here is to push serial_register() calls from serial.c into
the drivers. To avoid pile of ifdef construct as it is now, create
weak aliases to these functions, which in case the driver is not
present alias onto an empty function, which is in turn optimized out
altogether.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Tom Rini <trini@ti.com>
Cc: Anatolij Gustschin <agust@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Mike Frysinger <vapier@gentoo.org>
2012-10-15 11:53:49 -07:00
Marek Vasut
bfb3127938 serial: mpc512x: Properly define CONFIG_SYS_PSC3 in config files
Some of the boards using the mpc512x serial driver didn't properly
define which PSC console to use. This caused breakage when building
with CONFIG_SERIAL_MULTI enabled. Fix this by defining the default
PSC console.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Tom Rini <trini@ti.com>
Cc: Anatolij Gustschin <agust@denx.de>
Cc: Stefan Roese <sr@denx.de>
2012-10-15 11:53:49 -07:00
Marek Vasut
4808f106d2 serial: pxa: Make local functions static
Make functions that are local-only static, so no hairy symbols
stick out of the serial_pxa driver file.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Tom Rini <trini@ti.com>
2012-10-15 11:53:48 -07:00
Marek Vasut
ce6971cdd8 serial: pxa: Make use of default_serial_console in serial_pxa
Make use of the newly implemented weak default_serial_console in
the serial_pxa driver. This removes all reimplementations of this
function from board files.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Tom Rini <trini@ti.com>
2012-10-15 11:53:48 -07:00
Marek Vasut
407e6a2800 serial: pxa: Implement default_serial_console in serial_pxa.c
Implement weak default_serial_console() function in serial_pxa
driver, which gets available in case CONFIG_SERIAL_MULTI is
enabled. This will get helpful in subsequent patches, which will
encapsulate PXA's struct serial_device instances in serial_pxa
driver.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Tom Rini <trini@ti.com>
2012-10-15 11:53:48 -07:00
Marek Vasut
90bad891e1 serial: Properly spell out the structure member names of serial_driver
Properly spell out the whole structure member names when an initialized
varible is instantiated from the struct serial_driver. In case the
structure definition for struct serial_driver undergoes reordering,
there will be no impact on variables defined based on this structure.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Tom Rini <trini@ti.com>
Cc: Anatolij Gustschin <agust@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Mike Frysinger <vapier@gentoo.org>
Cc: C Nauman <cnauman@diagraph.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Michal Simek <monstr@monstr.eu>
2012-10-15 11:53:48 -07:00
Marek Vasut
89143fb3b0 serial: Rename .init() and .uninit() in serial_device
Rename .init() to .start() and .uninit() to .stop() in struct
serial_device. This allows aligning struct serial_device with
closer to struct stdio_dev. The real goal here is to allow
these two structures to converge together and eventually make
one to be a superset of the other.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Marek Vasut <marek.vasut@gmail.com>
Signed-off-by: Tom Rini <trini@ti.com>
2012-10-15 11:53:48 -07:00
Marek Vasut
78322d63ea serial: Coding style cleanup of struct serial_device
Do a simple cleanup of the struct serial_device and align it with
current coding style. Checkpatch now reports no errors.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Tom Rini <trini@ti.com>
2012-10-15 11:53:48 -07:00
Marek Vasut
51926d5ee0 COMMON: Use __stringify() instead of rest of implementations
Fix up the rest of implementations of __stringify().

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
2012-10-15 11:53:47 -07:00
Marek Vasut
5368c55d4c COMMON: Use __stringify() instead of MK_STR()
Kill multiple occurances and redeclaration of MK_STR
in favor of __stringify().

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Signed-off-by: Tom Rini <trini@ti.com>
2012-10-15 11:53:47 -07:00
Marek Vasut
93ea89f0d9 COMMON: Use __stringify() instead of xstr()
Kill multiple occurances and redeclaration of xstr in favor of __stringify().

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
2012-10-15 11:53:47 -07:00
Marek Vasut
9aed508083 COMMON: Add __stringify() function
Copied from Linux kernel:
commit 8f7c2c37319a81ef4c2bfdec67b1ccd5744d97e4
Date:   Wed Apr 8 16:58:57 2009 +0800

Pull in the __stringify() macro from Linux kernel. This macro is usually used to
convert numbers to strings at preprocessor level, yet it is not limited only to
that. This is useful as it allows higher usage of puts() in favour of printf().

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
2012-10-15 11:53:47 -07:00
Tom Rini
868444faa0 SPL: Remove setting GD_FLG_RELOC in preloader_console_init()
We have not strictly speaking relocated at this point, do not claim that
we have.  This is not required for output.

Signed-off-by: Tom Rini <trini@ti.com>
2012-10-15 11:53:47 -07:00
Tom Rini
c26420bbb5 MAINTAINERS: Move dbau1x00 to orphaned.
The former maintainer is no longer interested, move to orphaned.  Patch
is from the former maintainer.

Signed-off-by: Tom Rini <trini@ti.com>
2012-10-15 11:53:47 -07:00
Tom Rini
61c0d6ae77 gth2: Remove this platform
After taking with the former maintainer, delete this platform.  The
patch is from the former maintainer.

Signed-off-by: Tom Rini <trini@ti.com>
2012-10-15 11:53:46 -07:00
Daniel Schwierzeck
b0d60a9812 common: cmd_elf.c: use uintptr_t for casts from u32 to void*
This fixes warnings when compiling with ELDK-5.2.1 for MIPS64:

cmd_elf.c: In function 'load_elf_image_phdr':
cmd_elf.c:289:15: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
cmd_elf.c: In function 'load_elf_image_shdr':
cmd_elf.c:343:12: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
cmd_elf.c:346:12: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2012-10-15 11:53:46 -07:00
Daniel Schwierzeck
62e03d33c9 common: cmd_elf.c: fix checkpath.pl warnings
[Tom: Move valid_elf_image around and don't mark it as static as another
board makes use of this function]

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Tom Rini <trini@ti.com>
2012-10-15 11:53:46 -07:00
Daniel Schwierzeck
7b64f66c58 lib: vsprintf.c: replace NUM_TYPE with s64/u64 types
This fixes warnings when compiling with ELDK-5.2.1 for MIPS64:

vsprintf.c: In function 'put_dec':
vsprintf.c:258:9: warning: comparison of distinct pointer types lacks a cast [enabled by default]
vsprintf.c:258:3: warning: passing argument 1 of '__div64_32' from incompatible pointer type [enabled by default]
include/div64.h:22:17: note: expected 'uint64_t *' but argument is of type 'long long unsigned int *'

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2012-10-15 11:53:46 -07:00
Daniel Schwierzeck
8acdae681a lib: vsprintf.c: fix checkpath.pl warnings
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2012-10-15 11:53:46 -07:00
Albert ARIBAUD
b823fd9ba5 ARM: prevent misaligned array inits
Under option -munaligned-access, gcc can perform local char
or 16-bit array initializations using misaligned native
accesses which will throw a data abort exception. Fix files
where these array initializations were unneeded, and for
files known to contain such initializations, enforce gcc
option -mno-unaligned-access.

Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
[trini: Switch to usign call cc-option for -mno-unaligned-access as
Albert had done previously as that's really correct]
Signed-off-by: Tom Rini <trini@ti.com>
2012-10-15 11:53:07 -07:00
Simon Glass
996e95d49d bootstage: Add new bootstage IDs for board, LCD
Add bootstage IDs for board init and LCD.

Signed-off-by: Simon Glass <sjg@chromium.org>
2012-10-03 00:53:00 +02:00
Simon Glass
2eba38cf84 bootstage: Add bootstage command
Now that there are a few features, add a bootstage command to access them.

bootstage report - prints a report
bootstage stash/unstash - stashes bootstage records in memory, reads them back

Signed-off-by: Simon Glass <sjg@chromium.org>
2012-10-03 00:52:44 +02:00
Simon Glass
fcf509b807 bootstage: Add feature to stash/unstash bootstage info
It is useful to be able to write the bootstage information to memory for
use by a later utility, or the Linux kernel. Provide a function to do
this as well as a function to read bootstage information back and incorporate
it into the current table.

This also makes it possible for U-Boot to chain to another U-Boot and pass
on its bootstage information.

Signed-off-by: Simon Glass <sjg@chromium.org>
2012-10-03 00:52:40 +02:00
Simon Glass
94fd1316b7 bootstage: Store boot timings in device tree
Add an option, CONFIG_BOOTSTAGE_FDT to pass boot timings to the kernel
in the device tree, if available. To use this, you must have
CONFIG_OF_LIBFDT defined.

Signed-off-by: Simon Glass <sjg@chromium.org>
2012-10-02 22:39:33 +02:00
Simon Glass
0e99677358 bootstage: Add time accumulation feature
Sometimes we want to add up the amount of time spent in a particular
activity when it is happening in a number of discrete chunks.

Add bootstage_start() to mark the start of an acitivity and
bootstage_accum() to accumulate the time since the last start. Calling
these function in pairs results in the accumulated time being collected.

Signed-off-by: Simon Glass <sjg@chromium.org>
2012-10-02 22:39:33 +02:00
Simon Glass
094e06a523 bootstage: Export bootstage_add_record() function
This function is not static, but not exported either. Add a prototype
in the header file and move the required enum to the header also.

Signed-off-by: Simon Glass <sjg@chromium.org>
2012-10-02 22:39:33 +02:00
1778 changed files with 83478 additions and 46657 deletions

1
.gitignore vendored
View File

@@ -43,6 +43,7 @@
/u-boot.dtb
/u-boot.sb
/u-boot.geany
/include/u-boot.lst
#
# Generated files

View File

@@ -79,11 +79,6 @@ N: Oliver Brown
E: obrown@adventnetworks.com
D: Port to the gw8260 board
N: Curt Brune
E: curt@cucy.com
D: Added support for Samsung S3C4510B CPU (ARM7tdmi based SoC)
W: http://www.cucy.com
N: Jonathan De Bruyne
E: jonathan.debruyne@siemens.atea.be
D: Port to Siemens IAD210 board

View File

@@ -7,6 +7,10 @@
# and Cc: the <u-boot@lists.denx.de> mailing list. #
# #
# Note: lists sorted by Maintainer Name #
# Note: These are the maintainers for specific *boards*. The #
# custodians for general architectures and subsystems can #
# be found here -- http://www.denx.de/wiki/U-Boot/Custodians #
# #
#########################################################################
@@ -104,8 +108,6 @@ Wolfgang Denk <wd@denx.de>
ARIA MPC5121e
AMX860 MPC860
ETX094 MPC850
FPS850L MPC850
FPS860L MPC860
ICU862 MPC862
@@ -116,7 +118,6 @@ Wolfgang Denk <wd@denx.de>
IVMS8 MPC860
IVMS8_128 MPC860
IVMS8_256 MPC860
LANTEC MPC850
LWMON MPC823
R360MPI MPC823
RRvision MPC823
@@ -128,7 +129,6 @@ Wolfgang Denk <wd@denx.de>
TQM855L MPC855
TQM860L MPC860
TQM860L_FEC MPC860
c2mon MPC855
hermes MPC860
lwmon MPC823
@@ -179,7 +179,6 @@ Thomas Frieden <ThomasF@hyperion-entertainment.com>
Matthias Fuchs <matthias.fuchs@esd-electronics.com>
ADCIOP IOP480 (PPC401)
APC405 PPC405GP
AR405 PPC405GP
ASH405 PPC405EP
@@ -190,7 +189,6 @@ Matthias Fuchs <matthias.fuchs@esd-electronics.com>
CPCI405AB PPC405GP
CPCI405DT PPC405GP
CPCIISER4 PPC405GP
DASA_SIM IOP480 (PPC401)
DP405 PPC405EP
DU405 PPC405GP
DU440 PPC440EPx
@@ -216,9 +214,7 @@ Siddarth Gore <gores@marvell.com>
Paul Gortmaker <paul.gortmaker@windriver.com>
sbc8349 MPC8349
sbc8540 MPC8540
sbc8548 MPC8548
sbc8560 MPC8560
sbc8641d MPC8641D
Frank Gottschling <fgottschling@eltec.de>
@@ -231,7 +227,6 @@ Wolfgang Grandegger <wg@denx.de>
PN62 MPC8240
IPHASE4539 MPC8260
SCM MPC8260
Anatolij Gustschin <agust@denx.de>
@@ -397,6 +392,8 @@ Ricardo Ribalda <ricardo.ribalda@uam.es>
Stefan Roese <sr@denx.de>
a3m071 MPC5200
P3M7448 MPC7448
uc100 MPC857
@@ -456,10 +453,6 @@ Heiko Schocher <hs@denx.de>
uc101 MPC5200
ve8313 MPC8313
Peter De Schrijver <p2@mind.be>
ML2 PPC4xx
Andre Schwarz <andre.schwarz@matrix-vision.de>
mergerbox MPC8377
@@ -551,7 +544,6 @@ Unknown / orphaned boards:
FADS850SAR MPC8xx
FADS860T MPC8xx
GENIETV MPC8xx
IAD210 MPC8xx
MBX MPC8xx
MBX860T MPC8xx
NX823 MPC8xx
@@ -579,6 +571,10 @@ Albert ARIBAUD <albert.u.boot@aribaud.net>
edminiv2 ARM926EJS (Orion5x SoC)
Raphael Assenat <raph@8d.com>
eco5pk ARM ARMV7 (AM35x SoC)
Stefano Babic <sbabic@denx.de>
ea20 davinci
@@ -590,6 +586,11 @@ Stefano Babic <sbabic@denx.de>
trizepsiv xscale/pxa
twister omap3
vision2 i.MX51
woodburn i.MX35
Lukasz Dalek <luk0104@gmail.com>
h2200 xscale/pxa
Jason Liu <r64343@freescale.com>
@@ -656,6 +657,8 @@ Fabio Estevam <fabio.estevam@freescale.com>
mx31pdk i.MX31
mx53ard i.MX53
mx53smd i.MX53
mx6qsabresd i.MX6Q
mx6qsabreauto i.MX6Q
Daniel Gorsulowski <daniel.gorsulowski@esd.eu>
@@ -803,7 +806,7 @@ Veli-Pekka Peltola <veli-pekka.peltola@bluegiga.com>
apx4devkit i.MX28
Luka Perkov <uboot@lukaperkov.net>
Luka Perkov <luka@openwrt.org>
ib62x0 ARM926EJS
iconnect ARM926EJS
@@ -836,7 +839,7 @@ Sricharan R <r.sricharan@ti.com>
Thierry Reding <thierry.reding@avionic-design.de>
plutux Tegra20 (ARM7 & A9 Dual Core)
medcom Tegra20 (ARM7 & A9 Dual Core)
medcom-wide Tegra20 (ARM7 & A9 Dual Core)
tec Tegra20 (ARM7 & A9 Dual Core)
Christian Riesch <christian.riesch@omicron.at>
@@ -904,6 +907,10 @@ Michal Simek <monstr@monstr.eu>
zynq ARM ARMV7 (Zynq SoC)
Lucas Stach <dev@lynxeye.de>
colibri_t20_iris Tegra20 (ARM7 & A9 Dual Core)
Nick Thompson <nick.thompson@gefanuc.com>
da830evm ARM926EJS (DA830/OMAP-L137)
@@ -1013,10 +1020,14 @@ Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
armadillo-800eva R8A7740 (RMOBILE SoC)
Pali Rohár <pali.rohar@gmail.com>
nokia_rx51 ARM ARMV7 (OMAP34xx SoC)
-------------------------------------------------------------------------
Unknown / orphaned boards:
Board CPU Last known maintainer / Comment
Board CPU Last known maintainer / Comment
.........................................................................
omap1510inn ARM925T Kshitij Gupta <kshitij@ti.com>
@@ -1048,10 +1059,6 @@ Wolfgang Denk <wd@denx.de>
incaip MIPS32 4Kc
Thomas Lange <thomas@corelatus.se>
dbau1x00 MIPS32 Au1000
gth2 MIPS32 Au1000
Vlad Lungu <vlad.lungu@windriver.com>
qemu_mips MIPS32
@@ -1063,6 +1070,14 @@ Xiangfu Liu <xiangfu@openmobilefree.net>
qi_lb60 MIPS32 (XBurst Jz4740 SoC)
-------------------------------------------------------------------------
Unknown / orphaned boards:
Board CPU Last known maintainer / Comment
.........................................................................
dbau1x00 MIPS32 Au1000 Thomas Lange <thomas@corelatus.se>
#########################################################################
# Nios-II Systems: #
# #
@@ -1188,6 +1203,7 @@ Mark Jonas <mark.jonas@de.bosch.com>
Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
MS7720SE SH7720
R0P77520000RZ SH7752
R0P77570030RL SH7757
R0P77850011RL SH7785

78
MAKEALL
View File

@@ -19,6 +19,9 @@ usage()
-l, --list List all targets to be built
-m, --maintainers List all targets and maintainer email
-M, --mails List all targets and all affilated emails
-C, --check Enable build checking
-n, --continue Continue (skip boards already built)
-r, --rebuild-errors Rebuild any boards that errored
-h, --help This help output
Selections by these options are logically ANDed; if the same option
@@ -51,8 +54,8 @@ usage()
exit ${ret}
}
SHORT_OPTS="ha:c:v:s:lmM"
LONG_OPTS="help,arch:,cpu:,vendor:,soc:,list,maintainers,mails"
SHORT_OPTS="ha:c:v:s:lmMCnr"
LONG_OPTS="help,arch:,cpu:,vendor:,soc:,list,maintainers,mails,check,continue,rebuild-errors"
# Option processing based on util-linux-2.13/getopt-parse.bash
@@ -72,6 +75,8 @@ SELECTED=''
ONLY_LIST=''
PRINT_MAINTS=''
MAINTAINERS_ONLY=''
CONTINUE=''
REBUILD_ERRORS=''
while true ; do
case "$1" in
@@ -111,6 +116,15 @@ while true ; do
fi
SELECTED='y'
shift 2 ;;
-C|--check)
CHECK='C=1'
shift ;;
-n|--continue)
CONTINUE='y'
shift ;;
-r|--rebuild-errors)
REBUILD_ERRORS='y'
shift ;;
-l|--list)
ONLY_LIST='y'
shift ;;
@@ -194,7 +208,9 @@ fi
OUTPUT_PREFIX="${BUILD_DIR}"
[ -d ${LOG_DIR} ] || mkdir "${LOG_DIR}" || exit 1
find "${LOG_DIR}/" -type f -exec rm -f {} +
if [ "$CONTINUE" != 'y' -a "$REBUILD_ERRORS" != 'y' ] ; then
find "${LOG_DIR}/" -type f -exec rm -f {} +
fi
LIST=""
@@ -204,6 +220,7 @@ ERR_LIST=""
WRN_CNT=0
WRN_LIST=""
TOTAL_CNT=0
SKIP_CNT=0
CURRENT_CNT=0
OLDEST_IDX=1
RC=0
@@ -376,6 +393,12 @@ LIST_pxa="$(boards_by_cpu pxa)"
LIST_ixp="$(boards_by_cpu ixp)"
#########################################################################
## SPEAr Systems
#########################################################################
LIST_spear="$(boards_by_soc spear)"
#########################################################################
## ARM groups
#########################################################################
@@ -411,7 +434,6 @@ LIST_au1xx0=" \
dbau1100 \
dbau1500 \
dbau1550 \
gth2 \
"
LIST_mips=" \
@@ -607,6 +629,13 @@ list_target() {
donep="${LOG_DIR}/._done_"
skipp="${LOG_DIR}/._skip_"
build_target_killed() {
echo "Aborted $target build."
# Remove the logs for this board since it was aborted
rm -f ${LOG_DIR}/$target.MAKELOG ${LOG_DIR}/$target.ERR
exit
}
build_target() {
target=$1
build_idx=$2
@@ -619,6 +648,7 @@ build_target() {
if [ $BUILD_MANY == 1 ] ; then
output_dir="${OUTPUT_PREFIX}/${target}"
mkdir -p "${output_dir}"
trap build_target_killed TERM
else
output_dir="${OUTPUT_PREFIX}"
fi
@@ -628,7 +658,7 @@ build_target() {
${MAKE} distclean >/dev/null
${MAKE} -s ${target}_config
${MAKE} ${JOBS} all \
${MAKE} ${JOBS} ${CHECK} all \
>${LOG_DIR}/$target.MAKELOG 2> ${LOG_DIR}/$target.ERR
# Check for 'make' errors
@@ -637,7 +667,9 @@ build_target() {
fi
if [ $BUILD_MANY == 1 ] ; then
${MAKE} tidy
trap - TERM
${MAKE} -s tidy
if [ -s ${LOG_DIR}/${target}.ERR ] ; then
cp ${LOG_DIR}/${target}.ERR ${OUTPUT_PREFIX}/ERR/${target}
@@ -715,10 +747,20 @@ build_targets() {
: $((CURRENT_CNT += 1))
rm -f "${donep}${TOTAL_CNT}"
rm -f "${skipp}${TOTAL_CNT}"
if [ $BUILD_MANY == 1 ] ; then
build_target ${t} ${TOTAL_CNT} &
if [ "$CONTINUE" = 'y' -a -e ${LOG_DIR}/$t.MAKELOG ] ; then
: $((SKIP_CNT += 1))
touch "${donep}${TOTAL_CNT}"
elif [ "$REBUILD_ERRORS" = 'y' -a ! -e ${LOG_DIR}/$t.ERR ] ; then
: $((SKIP_CNT += 1))
touch "${donep}${TOTAL_CNT}"
else
build_target ${t} ${TOTAL_CNT}
if [ $BUILD_MANY == 1 ] ; then
build_target ${t} ${TOTAL_CNT} &
else
CUR_TGT="${t}"
build_target ${t} ${TOTAL_CNT}
CUR_TGT=''
fi
fi
fi
@@ -742,7 +784,11 @@ build_targets() {
#-----------------------------------------------------------------------
kill_children() {
kill -- "-$1"
local pgid=`ps -p $$ --no-headers -o "%r" | tr -d ' '`
local children=`pgrep -g $pgid | grep -v $$ | grep -v $pgid`
kill $children 2> /dev/null
wait $children 2> /dev/null
exit
}
@@ -750,6 +796,9 @@ kill_children() {
print_stats() {
if [ "$ONLY_LIST" == 'y' ] ; then return ; fi
# Only count boards that completed
: $((TOTAL_CNT = `find ${skipp}* 2> /dev/null | wc -l`))
rm -f ${donep}* ${skipp}*
if [ $BUILD_MANY == 1 ] && [ -e "${OUTPUT_PREFIX}/ERR" ] ; then
@@ -759,10 +808,17 @@ print_stats() {
WRN_LIST=`grep -riwL error ${OUTPUT_PREFIX}/ERR/`
WRN_LIST=`for f in $WRN_LIST ; do echo -n " $(basename $f)" ; done`
WRN_CNT=`echo $WRN_LIST | wc -w | awk '{print $1}'`
else
# Remove the logs for any board that was interrupted
rm -f ${LOG_DIR}/${CUR_TGT}.MAKELOG ${LOG_DIR}/${CUR_TGT}.ERR
fi
: $((TOTAL_CNT -= ${SKIP_CNT}))
echo ""
echo "--------------------- SUMMARY ----------------------------"
if [ "$CONTINUE" = 'y' -o "$REBUILD_ERRORS" = 'y' ] ; then
echo "Boards skipped: ${SKIP_CNT}"
fi
echo "Boards compiled: ${TOTAL_CNT}"
if [ ${ERR_CNT} -gt 0 ] ; then
echo "Boards with errors: ${ERR_CNT} (${ERR_LIST} )"
@@ -773,7 +829,7 @@ print_stats() {
echo "----------------------------------------------------------"
if [ $BUILD_MANY == 1 ] ; then
kill_children $$ &
kill_children
fi
exit $RC

152
Makefile
View File

@@ -21,9 +21,9 @@
# MA 02111-1307 USA
#
VERSION = 2012
PATCHLEVEL = 10
SUBLEVEL =
VERSION = 2013
PATCHLEVEL = 01
SUBLEVEL = 01
EXTRAVERSION =
ifneq "$(SUBLEVEL)" ""
U_BOOT_VERSION = $(VERSION).$(PATCHLEVEL).$(SUBLEVEL)$(EXTRAVERSION)
@@ -92,6 +92,24 @@ BUILD_DIR := $(O)
endif
endif
# Call a source code checker (by default, "sparse") as part of the
# C compilation.
#
# Use 'make C=1' to enable checking of re-compiled files.
#
# See the linux kernel file "Documentation/sparse.txt" for more details,
# including where to get the "sparse" utility.
ifdef C
ifeq ("$(origin C)", "command line")
CHECKSRC := $(C)
endif
endif
ifndef CHECKSRC
CHECKSRC = 0
endif
export CHECKSRC
ifneq ($(BUILD_DIR),)
saved-output := $(BUILD_DIR)
@@ -213,8 +231,8 @@ endif
OBJS = $(CPUDIR)/start.o
ifeq ($(CPU),x86)
OBJS += $(CPUDIR)/start16.o
OBJS += $(CPUDIR)/resetvec.o
RESET_OBJS-$(CONFIG_X86_NO_RESET_VECTOR) += $(CPUDIR)/start16.o
RESET_OBJS-$(CONFIG_X86_NO_RESET_VECTOR) += $(CPUDIR)/resetvec.o
endif
ifeq ($(CPU),ppc4xx)
OBJS += $(CPUDIR)/resetvec.o
@@ -223,7 +241,7 @@ ifeq ($(CPU),mpc85xx)
OBJS += $(CPUDIR)/resetvec.o
endif
OBJS := $(addprefix $(obj),$(OBJS))
OBJS := $(addprefix $(obj),$(OBJS) $(RESET_OBJS-))
HAVE_VENDOR_COMMON_LIB = $(if $(wildcard board/$(VENDOR)/common/Makefile),y,n)
@@ -242,7 +260,9 @@ LIBS-y += drivers/net/npe/libnpe.o
endif
LIBS-$(CONFIG_OF_EMBED) += dts/libdts.o
LIBS-y += arch/$(ARCH)/lib/lib$(ARCH).o
LIBS-y += fs/cramfs/libcramfs.o \
LIBS-y += fs/libfs.o \
fs/cbfs/libcbfs.o \
fs/cramfs/libcramfs.o \
fs/ext4/libext4fs.o \
fs/fat/libfat.o \
fs/fdos/libfdos.o \
@@ -273,7 +293,10 @@ LIBS-y += drivers/net/libnet.o
LIBS-y += drivers/net/phy/libphy.o
LIBS-y += drivers/pci/libpci.o
LIBS-y += drivers/pcmcia/libpcmcia.o
LIBS-y += drivers/power/libpower.o
LIBS-y += drivers/power/libpower.o \
drivers/power/fuel_gauge/libfuel_gauge.o \
drivers/power/pmic/libpmic.o \
drivers/power/battery/libbattery.o
LIBS-y += drivers/spi/libspi.o
LIBS-y += drivers/dfu/libdfu.o
ifeq ($(CPU),mpc83xx)
@@ -293,12 +316,14 @@ LIBS-y += arch/powerpc/cpu/mpc8xxx/lib8xxx.o
endif
LIBS-y += drivers/rtc/librtc.o
LIBS-y += drivers/serial/libserial.o
LIBS-y += drivers/sound/libsound.o
LIBS-$(CONFIG_GENERIC_LPC_TPM) += drivers/tpm/libtpm.o
LIBS-y += drivers/twserial/libtws.o
LIBS-y += drivers/usb/eth/libusb_eth.o
LIBS-y += drivers/usb/gadget/libusb_gadget.o
LIBS-y += drivers/usb/host/libusb_host.o
LIBS-y += drivers/usb/musb/libusb_musb.o
LIBS-y += drivers/usb/musb-new/libusb_musb-new.o
LIBS-y += drivers/usb/phy/libusb_phy.o
LIBS-y += drivers/usb/ulpi/libusb_ulpi.o
LIBS-y += drivers/video/libvideo.o
@@ -325,6 +350,8 @@ LIBS-y += $(CPUDIR)/s5p-common/libs5p-common.o
endif
ifeq ($(SOC),tegra20)
LIBS-y += arch/$(ARCH)/cpu/$(SOC)-common/lib$(SOC)-common.o
LIBS-y += arch/$(ARCH)/cpu/tegra-common/libcputegra-common.o
LIBS-y += $(CPUDIR)/tegra-common/libtegra-common.o
endif
LIBS := $(addprefix $(obj),$(sort $(LIBS-y)))
@@ -364,12 +391,12 @@ __LIBS := $(subst $(obj),,$(LIBS)) $(subst $(obj),,$(LIBBOARD))
ifneq ($(CONFIG_BOARD_SIZE_LIMIT),)
BOARD_SIZE_CHECK = \
@actual=`wc -c $@ | awk '{print $$1}'`; \
limit=$(CONFIG_BOARD_SIZE_LIMIT); \
limit=`printf "%d" $(CONFIG_BOARD_SIZE_LIMIT)`; \
if test $$actual -gt $$limit; then \
echo "$@ exceeds file size limit:"; \
echo " limit: $$limit bytes"; \
echo " actual: $$actual bytes"; \
echo " excess: $$((actual - limit)) bytes"; \
echo "$@ exceeds file size limit:" >&2 ; \
echo " limit: $$limit bytes" >&2 ; \
echo " actual: $$actual bytes" >&2 ; \
echo " excess: $$((actual - limit)) bytes" >&2; \
exit 1; \
fi
else
@@ -382,6 +409,7 @@ ALL-y += $(obj)u-boot.srec $(obj)u-boot.bin $(obj)System.map
ALL-$(CONFIG_NAND_U_BOOT) += $(obj)u-boot-nand.bin
ALL-$(CONFIG_ONENAND_U_BOOT) += $(obj)u-boot-onenand.bin
ALL-$(CONFIG_SPL) += $(obj)spl/u-boot-spl.bin
ALL-$(CONFIG_SPL) += $(obj)$(subst ",,$(CONFIG_SPL_TARGET))
ALL-$(CONFIG_OF_SEPARATE) += $(obj)u-boot.dtb $(obj)u-boot-dtb.bin
# enable combined SPL/u-boot/dtb rules for tegra
@@ -423,9 +451,18 @@ $(obj)u-boot.ldr.hex: $(obj)u-boot.ldr
$(obj)u-boot.ldr.srec: $(obj)u-boot.ldr
$(OBJCOPY) ${OBJCFLAGS} -O srec $< $@ -I binary
#
# U-Boot entry point, needed for booting of full-blown U-Boot
# from the SPL U-Boot version.
#
ifndef CONFIG_SYS_UBOOT_START
CONFIG_SYS_UBOOT_START := 0
endif
$(obj)u-boot.img: $(obj)u-boot.bin
$(obj)tools/mkimage -A $(ARCH) -T firmware -C none \
-O u-boot -a $(CONFIG_SYS_TEXT_BASE) -e 0 \
-O u-boot -a $(CONFIG_SYS_TEXT_BASE) \
-e $(CONFIG_SYS_UBOOT_START) \
-n $(shell sed -n -e 's/.*U_BOOT_VERSION//p' $(VERSION_FILE) | \
sed -e 's/"[ ]*$$/ for $(BOARD) board"/') \
-d $< $@
@@ -449,14 +486,15 @@ $(obj)u-boot.sha1: $(obj)u-boot.bin
$(obj)u-boot.dis: $(obj)u-boot
$(OBJDUMP) -d $< > $@
$(obj)u-boot.ubl: $(obj)spl/u-boot-spl.bin $(obj)u-boot.bin
$(obj)u-boot-with-spl.bin: $(obj)spl/u-boot-spl.bin $(obj)u-boot.bin
$(OBJCOPY) ${OBJCFLAGS} --pad-to=$(PAD_TO) -O binary $(obj)spl/u-boot-spl $(obj)spl/u-boot-spl-pad.bin
cat $(obj)spl/u-boot-spl-pad.bin $(obj)u-boot.bin > $(obj)u-boot-ubl.bin
$(obj)tools/mkimage -n $(UBL_CONFIG) -T ublimage \
-e $(CONFIG_SYS_TEXT_BASE) -d $(obj)u-boot-ubl.bin $(obj)u-boot.ubl
rm $(obj)u-boot-ubl.bin
cat $(obj)spl/u-boot-spl-pad.bin $(obj)u-boot.bin > $@
rm $(obj)spl/u-boot-spl-pad.bin
$(obj)u-boot.ubl: $(obj)u-boot-with-spl.bin
$(obj)tools/mkimage -n $(UBL_CONFIG) -T ublimage \
-e $(CONFIG_SYS_TEXT_BASE) -d $< $(obj)u-boot.ubl
$(obj)u-boot.ais: $(obj)spl/u-boot-spl.bin $(obj)u-boot.img
$(obj)tools/mkimage -s -n $(if $(CONFIG_AIS_CONFIG_FILE),$(CONFIG_AIS_CONFIG_FILE),"/dev/null") \
-T aisimage \
@@ -473,7 +511,7 @@ $(obj)u-boot.ais: $(obj)spl/u-boot-spl.bin $(obj)u-boot.img
ELFTOSB_TARGET-$(CONFIG_MX28) = imx28
$(obj)u-boot.sb: $(obj)u-boot.bin $(obj)spl/u-boot-spl.bin
elftosb -zdf $(ELFTOSB_TARGET-y) -c $(TOPDIR)/$(CPUDIR)/$(SOC)/u-boot-$(ELFTOSB_TARGET-y).bd \
elftosb -zf $(ELFTOSB_TARGET-y) -c $(TOPDIR)/$(CPUDIR)/$(SOC)/u-boot-$(ELFTOSB_TARGET-y).bd \
-o $(obj)u-boot.sb
# On x600 (SPEAr600) U-Boot is appended to U-Boot SPL.
@@ -494,17 +532,21 @@ $(obj)u-boot.spr: $(obj)u-boot.img $(obj)spl/u-boot-spl.bin
ifeq ($(SOC),tegra20)
ifeq ($(CONFIG_OF_SEPARATE),y)
$(obj)u-boot-dtb-tegra.bin: $(obj)spl/u-boot-spl.bin $(obj)u-boot.bin $(obj)u-boot.dtb
$(OBJCOPY) ${OBJCFLAGS} --pad-to=$(CONFIG_SYS_TEXT_BASE) -O binary $(obj)spl/u-boot-spl $(obj)spl/u-boot-spl-pad.bin
cat $(obj)spl/u-boot-spl-pad.bin $(obj)u-boot.bin $(obj)u-boot.dtb > $@
rm $(obj)spl/u-boot-spl-pad.bin
nodtb=dtb
dtbfile=$(obj)u-boot.dtb
else
$(obj)u-boot-nodtb-tegra.bin: $(obj)spl/u-boot-spl.bin $(obj)u-boot.bin
nodtb=nodtb
dtbfile=
endif
$(obj)u-boot-$(nodtb)-tegra.bin: $(obj)spl/u-boot-spl.bin $(obj)u-boot.bin $(dtbfile)
$(OBJCOPY) ${OBJCFLAGS} --pad-to=$(CONFIG_SYS_TEXT_BASE) -O binary $(obj)spl/u-boot-spl $(obj)spl/u-boot-spl-pad.bin
cat $(obj)spl/u-boot-spl-pad.bin $(obj)u-boot.bin > $@
cat $(obj)spl/u-boot-spl-pad.bin $(obj)u-boot.bin $(dtbfile) > $@
rm $(obj)spl/u-boot-spl-pad.bin
endif
endif
$(obj)u-boot-img.bin: $(obj)spl/u-boot-spl.bin $(obj)u-boot.img
cat $(obj)spl/u-boot-spl.bin $(obj)u-boot.img > $@
ifeq ($(CONFIG_SANDBOX),y)
GEN_UBOOT = \
@@ -513,9 +555,10 @@ GEN_UBOOT = \
$(PLATFORM_LIBS) -Wl,-Map -Wl,u-boot.map -o u-boot
else
GEN_UBOOT = \
UNDEF_SYM=`$(OBJDUMP) -x $(LIBBOARD) $(LIBS) | \
sed -n -e 's/.*\($(SYM_PREFIX)__u_boot_cmd_.*\)/-u\1/p'|sort|uniq`;\
cd $(LNDIR) && $(LD) $(LDFLAGS) $(LDFLAGS_$(@F)) $$UNDEF_SYM $(__OBJS) \
UNDEF_LST=`$(OBJDUMP) -x $(LIBBOARD) $(LIBS) | \
sed -n -e 's/.*\($(SYM_PREFIX)_u_boot_list_.*\)/-u\1/p'|sort|uniq`;\
cd $(LNDIR) && $(LD) $(LDFLAGS) $(LDFLAGS_$(@F)) \
$$UNDEF_LST $(__OBJS) \
--start-group $(__LIBS) --end-group $(PLATFORM_LIBS) \
-Map u-boot.map -o u-boot
endif
@@ -548,8 +591,12 @@ $(SUBDIR_EXAMPLES): $(obj)u-boot
$(LDSCRIPT): depend
$(MAKE) -C $(dir $@) $(notdir $@)
$(obj)u-boot.lds: $(LDSCRIPT)
$(CPP) $(CPPFLAGS) $(LDPPFLAGS) -ansi -D__ASSEMBLY__ -P - <$^ >$@
# The following line expands into whole rule which generates u-boot.lst,
# the file containing u-boots LG-array linker section. This is included into
# $(LDSCRIPT). The function make_u_boot_list is defined in helper.mk file.
$(eval $(call make_u_boot_list, $(obj)include/u-boot.lst, $(LIBBOARD) $(LIBS)))
$(obj)u-boot.lds: $(LDSCRIPT) $(obj)include/u-boot.lst
$(CPP) $(CPPFLAGS) $(LDPPFLAGS) -ansi -D__ASSEMBLY__ -P - <$< >$@
nand_spl: $(TIMESTAMP_FILE) $(VERSION_FILE) depend
$(MAKE) -C nand_spl/board/$(BOARDDIR) all
@@ -610,6 +657,16 @@ checkthumb:
echo '*** Your board is configured for THUMB mode.'; \
false; \
fi
# GCC 3.x is reported to have problems generating the type of relocation
# that U-Boot wants.
# See http://lists.denx.de/pipermail/u-boot/2012-September/135156.html
checkgcc4:
@if test $(call cc-version) -lt 0400; then \
echo -n '*** Your GCC is too old, please upgrade to GCC 4.x or newer'; \
false; \
fi
#
# Auto-generate the autoconf.mk file (which is included by all makefiles)
#
@@ -695,6 +752,9 @@ easylogo env gdb:
$(MAKE) -C tools/$@ all MTD_VERSION=${MTD_VERSION}
gdbtools: gdb
xmldocs pdfdocs psdocs htmldocs mandocs: tools/kernel-doc/docproc
$(MAKE) U_BOOT_VERSION=$(U_BOOT_VERSION) -C doc/DocBook/ $@
tools-all: easylogo env gdb $(VERSION_FILE) $(TIMESTAMP_FILE)
$(MAKE) -C tools HOST_TOOLS_ALL=y
@@ -725,20 +785,6 @@ $(obj).boards.depend: boards.cfg
lcname = $(shell echo $(1) | sed -e 's/\(.*\)_config/\L\1/')
ucname = $(shell echo $(1) | sed -e 's/\(.*\)_config/\U\1/')
#========================================================================
# ARM
#========================================================================
SX1_stdout_serial_config \
SX1_config: unconfig
@mkdir -p $(obj)include
@if [ "$(findstring _stdout_serial_, $@)" ] ; then \
echo "#undef CONFIG_STDOUT_USBTTY" >> $(obj)include/config.h ; \
else \
echo "#define CONFIG_STDOUT_USBTTY" >> $(obj)include/config.h ; \
fi;
@$(MKCONFIG) -n $@ SX1 arm arm925t sx1
#########################################################################
## ARM1176 Systems
#########################################################################
@@ -779,11 +825,13 @@ clean:
$(obj)tools/mk{env,}image $(obj)tools/mpc86x_clk \
$(obj)tools/mk{smdk5250,}spl \
$(obj)tools/mxsboot \
$(obj)tools/ncb $(obj)tools/ubsha1
$(obj)tools/ncb $(obj)tools/ubsha1 \
$(obj)tools/kernel-doc/docproc
@rm -f $(obj)board/cray/L1/{bootscript.c,bootscript.image} \
$(obj)board/matrix_vision/*/bootscript.img \
$(obj)board/voiceblue/eeprom \
$(obj)u-boot.lds \
$(obj)include/u-boot.lst \
$(obj)arch/blackfin/cpu/bootrom-asm-offsets.[chs] \
$(obj)arch/blackfin/cpu/init.{lds,elf}
@rm -f $(obj)include/bmp_logo.h
@@ -792,6 +840,7 @@ clean:
@rm -f $(obj)include/generated/asm-offsets.h
@rm -f $(obj)$(CPUDIR)/$(SOC)/asm-offsets.s
@rm -f $(TIMESTAMP_FILE) $(VERSION_FILE)
@$(MAKE) -s -C doc/DocBook/ cleandocs
@find $(OBJTREE) -type f \
\( -name 'core' -o -name '*.bak' -o -name '*~' -o -name '*.su' \
-o -name '*.o' -o -name '*.a' -o -name '*.exe' \) -print \
@@ -816,9 +865,12 @@ clobber: tidy
@rm -f $(obj)u-boot.dtb
@rm -f $(obj)u-boot.sb
@rm -f $(obj)u-boot.spr
@rm -f $(obj)nand_spl/{u-boot.lds,u-boot-nand_spl.lds,u-boot-spl,u-boot-spl.map,System.map}
@rm -f $(obj)spl/{u-boot-spl,u-boot-spl.bin,u-boot-spl.lds,u-boot-spl.map}
@rm -f $(obj)MLO
@rm -f $(obj)nand_spl/{u-boot.{lds,lst},System.map}
@rm -f $(obj)nand_spl/{u-boot-nand_spl.lds,u-boot-spl,u-boot-spl.map}
@rm -f $(obj)spl/{u-boot-spl,u-boot-spl.bin,u-boot-spl.map}
@rm -f $(obj)spl/{u-boot-spl.lds,u-boot.lst}
@rm -f $(obj)MLO MLO.byteswap
@rm -f $(obj)SPL
@rm -f $(obj)tools/xway-swap-bytes
@rm -f $(obj)arch/powerpc/cpu/mpc824x/bedbug_603e.c
@rm -f $(obj)arch/powerpc/cpu/mpc83xx/ddr-gen?.c

323
README
View File

@@ -54,6 +54,11 @@ In case of problems see the CHANGELOG and CREDITS files to find out
who contributed the specific port. The MAINTAINERS file lists board
maintainers.
Note: There is no CHANGELOG file in the actual U-Boot source tree;
it can be created dynamically from the Git log using:
make CHANGELOG
Where to get help:
==================
@@ -363,6 +368,12 @@ The following options need to be configured:
ICache only when Code runs from RAM.
- 85xx CPU Options:
CONFIG_SYS_PPC64
Specifies that the core is a 64-bit PowerPC implementation (implements
the "64" category of the Power ISA). This is necessary for ePAPR
compliance, among other possible reasons.
CONFIG_SYS_FSL_TBCLK_DIV
Defines the core time base clock divider ratio compared to the
@@ -605,6 +616,14 @@ The following options need to be configured:
boot loader that has already initialized the UART. Define this
variable to flush the UART at init time.
CONFIG_SYS_NS16550_BROKEN_TEMT
16550 UART set the Transmitter Empty (TEMT) Bit when all output
has finished and the transmitter is totally empty. U-Boot waits
for this bit to be set to initialize the serial console. On some
broken platforms this bit is not set in SPL making U-Boot to
hang while waiting for TEMT. Define this option to avoid it.
- Console Interface:
Depending on board, define exactly one serial port
@@ -655,6 +674,10 @@ The following options need to be configured:
additional board info beside
the logo
When CONFIG_CFB_CONSOLE_ANSI is defined, console will support
a limited number of ANSI escape sequences (cursor control,
erase functions and limited graphics rendition control).
When CONFIG_CFB_CONSOLE is defined, video console is
default i/o. Serial console can be forced with
environment 'console=serial'.
@@ -800,15 +823,21 @@ The following options need to be configured:
CONFIG_CMD_EDITENV edit env variable
CONFIG_CMD_EEPROM * EEPROM read/write support
CONFIG_CMD_ELF * bootelf, bootvx
CONFIG_CMD_ENV_CALLBACK * display details about env callbacks
CONFIG_CMD_ENV_FLAGS * display details about env flags
CONFIG_CMD_EXPORTENV * export the environment
CONFIG_CMD_EXT2 * ext2 command support
CONFIG_CMD_EXT4 * ext4 command support
CONFIG_CMD_SAVEENV saveenv
CONFIG_CMD_FDC * Floppy Disk Support
CONFIG_CMD_FAT * FAT partition support
CONFIG_CMD_FAT * FAT command support
CONFIG_CMD_FDOS * Dos diskette Support
CONFIG_CMD_FLASH flinfo, erase, protect
CONFIG_CMD_FPGA FPGA device initialization support
CONFIG_CMD_GETTIME * Get time since boot
CONFIG_CMD_GO * the 'go' command (exec code)
CONFIG_CMD_GREPENV * search environment
CONFIG_CMD_HASH * calculate hash / digest
CONFIG_CMD_HWFLOW * RTS/CTS hw flow control
CONFIG_CMD_I2C * I2C serial bus support
CONFIG_CMD_IDE * IDE harddisk support
@@ -828,6 +857,7 @@ The following options need to be configured:
CONFIG_CMD_LOADS loads
CONFIG_CMD_MD5SUM print md5 message digest
(requires CONFIG_CMD_MEMORY and CONFIG_MD5)
CONFIG_CMD_MEMINFO * Display detailed memory information
CONFIG_CMD_MEMORY md, mm, nm, mw, cp, cmp, crc, base,
loop, loopw, mtest
CONFIG_CMD_MISC Misc functions like sleep etc
@@ -843,6 +873,7 @@ The following options need to be configured:
CONFIG_CMD_PING * send ICMP ECHO_REQUEST to network
host
CONFIG_CMD_PORTIO * Port I/O
CONFIG_CMD_READ * Read raw data from partition
CONFIG_CMD_REGINFO * Register dump
CONFIG_CMD_RUN run command in env variable
CONFIG_CMD_SAVES * save S record dump
@@ -1033,6 +1064,9 @@ The following options need to be configured:
devices.
CONFIG_SYS_SCSI_SYM53C8XX_CCF to fix clock timing (80Mhz)
The environment variable 'scsidevs' is set to the number of
SCSI devices found during the last scan.
- NETWORK Support (PCI):
CONFIG_E1000
Support for Intel 8254x/8257x gigabit chips.
@@ -1084,7 +1118,7 @@ The following options need to be configured:
CONFIG_CALXEDA_XGMAC
Support for the Calxeda XGMAC device
CONFIG_DRIVER_LAN91C96
CONFIG_LAN91C96
Support for SMSC's LAN91C96 chips.
CONFIG_LAN91C96_BASE
@@ -1094,7 +1128,7 @@ The following options need to be configured:
CONFIG_LAN91C96_USE_32_BIT
Define this to enable 32 bit addressing
CONFIG_DRIVER_SMC91111
CONFIG_SMC91111
Support for SMSC's LAN91C111 chip
CONFIG_SMC91111_BASE
@@ -1268,6 +1302,9 @@ The following options need to be configured:
viewport is supported.
To enable the ULPI layer support, define CONFIG_USB_ULPI and
CONFIG_USB_ULPI_VIEWPORT in your board configuration file.
If your ULPI phy needs a different reference clock than the
standard 24 MHz then you have to define CONFIG_ULPI_REF_CLK to
the appropriate value in Hz.
- MMC Support:
The MMC controller on the Intel PXA is supported. To
@@ -1313,6 +1350,13 @@ The following options need to be configured:
This will also enable the command "fatwrite" enabling the
user to write files to FAT.
CBFS (Coreboot Filesystem) support
CONFIG_CMD_CBFS
Define this to enable support for reading from a Coreboot
filesystem. Available commands are cbfsinit, cbfsinfo, cbfsls
and cbfsload.
- Keyboard Support:
CONFIG_ISA_KEYBOARD
@@ -1384,6 +1428,13 @@ The following options need to be configured:
boot. See the documentation file README.video for a
description of this variable.
CONFIG_VIDEO_VGA
Enable the VGA video / BIOS for x86. The alternative if you
are using coreboot is to use the coreboot frame buffer
driver.
- Keyboard Support:
CONFIG_KEYBOARD
@@ -1444,6 +1495,30 @@ The following options need to be configured:
Normally display is black on white background; define
CONFIG_SYS_WHITE_ON_BLACK to get it inverted.
CONFIG_LCD_ALIGNMENT
Normally the LCD is page-aligned (tyically 4KB). If this is
defined then the LCD will be aligned to this value instead.
For ARM it is sometimes useful to use MMU_SECTION_SIZE
here, since it is cheaper to change data cache settings on
a per-section basis.
CONFIG_CONSOLE_SCROLL_LINES
When the console need to be scrolled, this is the number of
lines to scroll by. It defaults to 1. Increasing this makes
the console jump but can help speed up operation when scrolling
is slow.
CONFIG_LCD_BMP_RLE8
Support drawing of RLE8-compressed bitmaps on the LCD.
CONFIG_I2C_EDID
Enables an 'i2c edid' command which can read EDID
information over I2C from an attached LCD display.
- Splash Screen Support: CONFIG_SPLASH_SCREEN
If this option is set, the environment is checked for
@@ -2137,6 +2212,11 @@ The following options need to be configured:
serial# is unaffected by this, i. e. it remains
read-only.]
The same can be accomplished in a more flexible way
for any variable by configuring the type of access
to allow for those variables in the ".flags" variable
or define CONFIG_ENV_FLAGS_LIST_STATIC.
- Protected RAM:
CONFIG_PRAM
@@ -2166,10 +2246,18 @@ The following options need to be configured:
following board configurations are known to be
"pRAM-clean":
ETX094, IVMS8, IVML24, SPD8xx, TQM8xxL,
HERMES, IP860, RPXlite, LWMON, LANTEC,
IVMS8, IVML24, SPD8xx, TQM8xxL,
HERMES, IP860, RPXlite, LWMON,
FLAGADM, TQM8260
- Access to physical memory region (> 4GB)
Some basic support is provided for operations on memory not
normally accessible to U-Boot - e.g. some architectures
support access to more than 4GB of memory on 32-bit
machines using physical address extension or similar.
Define CONFIG_PHYSMEM to access this basic support, which
currently only supports clearing the memory.
- Error Recovery:
CONFIG_PANIC_HANG
@@ -2293,6 +2381,21 @@ The following options need to be configured:
- CONFIG_SYS_VENDOR
- CONFIG_SYS_SOC
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
Define this in order to add variables describing certain
run-time determined information about the hardware to the
environment. These will be named board_name, board_rev.
CONFIG_DELAY_ENVIRONMENT
Normally the environment is loaded when the board is
intialised so that it is available to U-Boot. This inhibits
that so that the environment is not available until
explicitly loaded later by U-Boot code. With CONFIG_OF_CONTROL
this is instead controlled by the value of
/config/load-environment.
- DataFlash Support:
CONFIG_HAS_DATAFLASH
@@ -2319,6 +2422,11 @@ The following options need to be configured:
CONFIG_SF_DEFAULT_MODE (see include/spi.h)
CONFIG_SF_DEFAULT_SPEED in Hz
CONFIG_CMD_SF_TEST
Define this option to include a destructive SPI flash
test ('sf test').
- SystemACE Support:
CONFIG_SYSTEMACE
@@ -2353,6 +2461,23 @@ The following options need to be configured:
A better solution is to properly configure the firewall,
but sometimes that is not allowed.
- Hashing support:
CONFIG_CMD_HASH
This enables a generic 'hash' command which can produce
hashes / digests from a few algorithms (e.g. SHA1, SHA256).
CONFIG_HASH_VERIFY
Enable the hash verify command (hash -v). This adds to code
size a little.
CONFIG_SHA1 - support SHA1 hashing
CONFIG_SHA256 - support SHA256 hashing
Note: There is also a sha1sum command, which should perhaps
be deprecated in favour of 'hash sha1'.
- Show boot progress:
CONFIG_SHOW_BOOT_PROGRESS
@@ -2388,6 +2513,31 @@ The following options need to be configured:
29,916,167 26,005,792 bootm_start
30,361,327 445,160 start_kernel
CONFIG_CMD_BOOTSTAGE
Add a 'bootstage' command which supports printing a report
and un/stashing of bootstage data.
CONFIG_BOOTSTAGE_FDT
Stash the bootstage information in the FDT. A root 'bootstage'
node is created with each bootstage id as a child. Each child
has a 'name' property and either 'mark' containing the
mark time in microsecond, or 'accum' containing the
accumulated time for that bootstage id in microseconds.
For example:
bootstage {
154 {
name = "board_init_f";
mark = <3575678>;
};
170 {
name = "lcd";
accum = <33482>;
};
};
Code in the Linux kernel can find this in /proc/devicetree.
Legacy uImage format:
Arg Where When
@@ -2541,6 +2691,17 @@ FIT uImage format:
-150 common/cmd_nand.c Incorrect FIT image format
151 common/cmd_nand.c FIT image format OK
- FIT image support:
CONFIG_FIT
Enable support for the FIT uImage format.
CONFIG_FIT_BEST_MATCH
When no configuration is explicitly selected, default to the
one whose fdt's compatibility field best matches that of
U-Boot itself. A match is considered "best" if it matches the
most specific compatibility entry of U-Boot's fdt's root node.
The order of entries in the configuration's fdt is ignored.
- Standalone program support:
CONFIG_STANDALONE_LOAD_ADDR
@@ -2553,10 +2714,13 @@ FIT uImage format:
CONFIG_FB_ADDR
Define CONFIG_FB_ADDR if you want to use specific
address for frame buffer.
Then system will reserve the frame buffer address to
defined address instead of lcd_setmem (this function
grabs the memory for frame buffer by panel's size).
address for frame buffer. This is typically the case
when using a graphics controller has separate video
memory. U-Boot will then place the frame buffer at
the given address instead of dynamically reserving it
in system RAM by calling lcd_setmem(), which grabs
the memory for the frame buffer depending on the
configured panel size.
Please see board_init_f function.
@@ -2592,6 +2756,10 @@ FIT uImage format:
CONFIG_SPL_TEXT_BASE
TEXT_BASE for linking the SPL binary.
CONFIG_SPL_RELOC_TEXT_BASE
Address to relocate to. If unspecified, this is equal to
CONFIG_SPL_TEXT_BASE (i.e. no relocation is done).
CONFIG_SPL_BSS_START_ADDR
Link address for the BSS within the SPL binary.
@@ -2601,6 +2769,11 @@ FIT uImage format:
CONFIG_SPL_STACK
Adress of the start of the stack SPL will use
CONFIG_SPL_RELOC_STACK
Adress of the start of the stack SPL will use after
relocation. If unspecified, this is equal to
CONFIG_SPL_STACK.
CONFIG_SYS_SPL_MALLOC_START
Starting address of the malloc pool used in SPL.
@@ -2616,6 +2789,9 @@ FIT uImage format:
For ARM, enable an optional function to print more information
about the running system.
CONFIG_SPL_INIT_MINIMAL
Arch init code should be built for a very small image
CONFIG_SPL_LIBCOMMON_SUPPORT
Support for common/libcommon.o in SPL binary
@@ -2643,8 +2819,19 @@ FIT uImage format:
CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME
Filename to read to load U-Boot when reading from FAT
CONFIG_SPL_NAND_BASE
Include nand_base.c in the SPL. Requires
CONFIG_SPL_NAND_DRIVERS.
CONFIG_SPL_NAND_DRIVERS
SPL uses normal NAND drivers, not minimal drivers.
CONFIG_SPL_NAND_ECC
Include standard software ECC in the SPL
CONFIG_SPL_NAND_SIMPLE
Support for drivers/mtd/nand/libnand.o in SPL binary
Support for NAND boot using simple NAND drivers that
expose the cmd_ctrl() interface.
CONFIG_SYS_NAND_5_ADDR_CYCLE, CONFIG_SYS_NAND_PAGE_COUNT,
CONFIG_SYS_NAND_PAGE_SIZE, CONFIG_SYS_NAND_OOBSIZE,
@@ -2652,15 +2839,19 @@ FIT uImage format:
CONFIG_SYS_NAND_ECCPOS, CONFIG_SYS_NAND_ECCSIZE,
CONFIG_SYS_NAND_ECCBYTES
Defines the size and behavior of the NAND that SPL uses
to read U-Boot with CONFIG_SPL_NAND_SIMPLE
to read U-Boot
CONFIG_SYS_NAND_U_BOOT_OFFS
Location in NAND for CONFIG_SPL_NAND_SIMPLE to read U-Boot
from.
Location in NAND to read U-Boot from
CONFIG_SYS_NAND_U_BOOT_DST
Location in memory to load U-Boot to
CONFIG_SYS_NAND_U_BOOT_SIZE
Size of image to load
CONFIG_SYS_NAND_U_BOOT_START
Location in memory for CONFIG_SPL_NAND_SIMPLE to load U-Boot
to.
Entry point in loaded image to jump to
CONFIG_SYS_NAND_HW_ECC_OOBFIRST
Define this if you need to first read the OOB and then the
@@ -2685,6 +2876,11 @@ FIT uImage format:
CONFIG_SPL_LIBGENERIC_SUPPORT
Support for lib/libgeneric.o in SPL binary
CONFIG_SPL_TARGET
Final target image containing SPL and payload. Some SPLs
use an arch-specific makefile fragment instead, for
example if more than one image needs to be produced.
Modem Support:
--------------
@@ -2819,9 +3015,6 @@ Configuration Settings:
non page size aligned address and this could cause major
problems.
- CONFIG_SYS_TFTP_LOADADDR:
Default load address for network file downloads
- CONFIG_SYS_LOADS_BAUD_CHANGE:
Enable temporary baudrate change while serial download
@@ -2963,6 +3156,49 @@ Configuration Settings:
cases. This setting can be used to tune behaviour; see
lib/hashtable.c for details.
- CONFIG_ENV_FLAGS_LIST_DEFAULT
- CONFIG_ENV_FLAGS_LIST_STATIC
Enable validation of the values given to enviroment variables when
calling env set. Variables can be restricted to only decimal,
hexadecimal, or boolean. If CONFIG_CMD_NET is also defined,
the variables can also be restricted to IP address or MAC address.
The format of the list is:
type_attribute = [s|d|x|b|i|m]
access_atribute = [a|r|o|c]
attributes = type_attribute[access_atribute]
entry = variable_name[:attributes]
list = entry[,list]
The type attributes are:
s - String (default)
d - Decimal
x - Hexadecimal
b - Boolean ([1yYtT|0nNfF])
i - IP address
m - MAC address
The access attributes are:
a - Any (default)
r - Read-only
o - Write-once
c - Change-default
- CONFIG_ENV_FLAGS_LIST_DEFAULT
Define this to a list (string) to define the ".flags"
envirnoment variable in the default or embedded environment.
- CONFIG_ENV_FLAGS_LIST_STATIC
Define this to a list (string) to define validation that
should be done if an entry is not found in the ".flags"
environment variable. To override a setting in the static
list, simply add an entry for the same variable name to the
".flags" variable.
- CONFIG_ENV_ACCESS_IGNORE_FORCE
If defined, don't allow the -f switch to env set override variable
access flags.
The following definitions that deal with the placement and management
of environment data (variable area); in general, we support the
following configurations:
@@ -3238,6 +3474,16 @@ use the "saveenv" command to store a valid environment.
space for already greatly restricted images, including but not
limited to NAND_SPL configurations.
- CONFIG_DISPLAY_BOARDINFO
Display information about the board that U-Boot is running on
when U-Boot starts up. The board function checkboard() is called
to do this.
- CONFIG_DISPLAY_BOARDINFO_LATE
Similar to the previous option, but display this information
later, once stdio is running and output goes to the LCD, if
present.
Low Level (hardware related) configuration options:
---------------------------------------------------
@@ -3560,6 +3806,16 @@ Low Level (hardware related) configuration options:
be used if available. These functions may be faster under some
conditions but may increase the binary size.
- CONFIG_X86_NO_RESET_VECTOR
If defined, the x86 reset vector code is excluded. You will need
to do this when U-Boot is running from Coreboot.
- CONFIG_X86_NO_REAL_MODE
If defined, x86 real mode code is omitted. This assumes a
32-bit environment where such code is not needed. You will
need to do this when U-Boot is running from Coreboot.
Freescale QE/FMAN Firmware Support:
-----------------------------------
@@ -3787,6 +4043,7 @@ saveenv - save environment variables to persistent storage
protect - enable or disable FLASH write protection
erase - erase FLASH memory
flinfo - print FLASH memory information
nand - NAND memory operations (see doc/README.nand)
bdinfo - print Board Info structure
iminfo - print header information for application image
coninfo - print console devices and informations
@@ -4053,6 +4310,36 @@ Please note that changes to some configuration parameters may take
only effect after the next boot (yes, that's just like Windoze :-).
Callback functions for environment variables:
---------------------------------------------
For some environment variables, the behavior of u-boot needs to change
when their values are changed. This functionailty allows functions to
be associated with arbitrary variables. On creation, overwrite, or
deletion, the callback will provide the opportunity for some side
effect to happen or for the change to be rejected.
The callbacks are named and associated with a function using the
U_BOOT_ENV_CALLBACK macro in your board or driver code.
These callbacks are associated with variables in one of two ways. The
static list can be added to by defining CONFIG_ENV_CALLBACK_LIST_STATIC
in the board configuration to a string that defines a list of
associations. The list must be in the following format:
entry = variable_name[:callback_name]
list = entry[,list]
If the callback name is not specified, then the callback is deleted.
Spaces are also allowed anywhere in the list.
Callbacks can also be associated by defining the ".callbacks" variable
with the same list format above. Any association in ".callbacks" will
override any association in the static list. You can define
CONFIG_ENV_CALLBACK_LIST_DEFAULT to a list (string) to define the
".callbacks" envirnoment variable in the default or embedded environment.
Command Line Parsing:
=====================

View File

@@ -31,3 +31,6 @@ PLATFORM_CPPFLAGS += -march=armv5
# =========================================================================
PF_RELFLAGS_SLB_AT := $(call cc-option,-mshort-load-bytes,$(call cc-option,-malignment-traps,))
PLATFORM_RELFLAGS += $(PF_RELFLAGS_SLB_AT)
ifdef CONFIG_SPL_BUILD
ALL-y += $(OBJTREE)/SPL
endif

View File

@@ -141,16 +141,6 @@ void flush_cache(unsigned long start, unsigned long size)
flush_dcache_range(start, start + size);
}
void enable_caches(void)
{
#ifndef CONFIG_SYS_ICACHE_OFF
icache_enable();
#endif
#ifndef CONFIG_SYS_DCACHE_OFF
dcache_enable();
#endif
}
#else /* #ifndef CONFIG_SYS_DCACHE_OFF */
void invalidate_dcache_all(void)
{
@@ -172,3 +162,15 @@ void flush_cache(unsigned long start, unsigned long size)
{
}
#endif /* #ifndef CONFIG_SYS_DCACHE_OFF */
#if !defined(CONFIG_SYS_ICACHE_OFF) || !defined(CONFIG_SYS_DCACHE_OFF)
void enable_caches(void)
{
#ifndef CONFIG_SYS_ICACHE_OFF
icache_enable();
#endif
#ifndef CONFIG_SYS_DCACHE_OFF
dcache_enable();
#endif
}
#endif

View File

@@ -104,6 +104,7 @@ unsigned int mxc_get_clock(enum mxc_clock clk)
case MXC_CSPI_CLK:
case MXC_UART_CLK:
case MXC_ESDHC_CLK:
case MXC_I2C_CLK:
return mx31_get_ipg_clk();
case MXC_IPU_CLK:
return mx31_get_hsp_clk();

View File

@@ -161,42 +161,3 @@ ulong get_tbclk(void)
{
return MXC_CLK32;
}
void reset_cpu(ulong addr)
{
struct wdog_regs *wdog = (struct wdog_regs *)WDOG_BASE;
wdog->wcr = WDOG_ENABLE;
while (1)
;
}
#ifdef CONFIG_HW_WATCHDOG
void mxc_hw_watchdog_enable(void)
{
struct wdog_regs *wdog = (struct wdog_regs *)WDOG_BASE;
u16 secs;
/*
* The timer watchdog can be set between
* 0.5 and 128 Seconds. If not defined
* in configuration file, sets 64 Seconds
*/
#ifdef CONFIG_SYS_WD_TIMER_SECS
secs = (CONFIG_SYS_WD_TIMER_SECS << 1) & 0xFF;
if (!secs) secs = 1;
#else
secs = 64;
#endif
setbits_le16(&wdog->wcr, (secs << WDOG_WT_SHIFT) | WDOG_ENABLE
| WDOG_WDZST);
}
void mxc_hw_watchdog_reset(void)
{
struct wdog_regs *wdog = (struct wdog_regs *)WDOG_BASE;
writew(0x5555, &wdog->wsr);
writew(0xAAAA, &wdog->wsr);
}
#endif

View File

@@ -30,6 +30,7 @@ LIB = $(obj)lib$(SOC).o
COBJS += generic.o
COBJS += timer.o
COBJS += iomux.o
COBJS += mx35_sdram.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))

View File

@@ -22,7 +22,6 @@
int main(void)
{
/* Round up to make sure size gives nice stack alignment */
DEFINE(CLKCTL_CCMR, offsetof(struct ccm_regs, ccmr));
DEFINE(CLKCTL_PDR0, offsetof(struct ccm_regs, pdr0));
@@ -38,6 +37,38 @@ int main(void)
DEFINE(CLKCTL_CGR0, offsetof(struct ccm_regs, cgr0));
DEFINE(CLKCTL_CGR1, offsetof(struct ccm_regs, cgr1));
DEFINE(CLKCTL_CGR2, offsetof(struct ccm_regs, cgr2));
DEFINE(CLKCTL_CGR3, offsetof(struct ccm_regs, cgr3));
/* Multi-Layer AHB Crossbar Switch */
DEFINE(MAX_MPR0, offsetof(struct max_regs, mpr0));
DEFINE(MAX_SGPCR0, offsetof(struct max_regs, sgpcr0));
DEFINE(MAX_MPR1, offsetof(struct max_regs, mpr1));
DEFINE(MAX_SGPCR1, offsetof(struct max_regs, sgpcr1));
DEFINE(MAX_MPR2, offsetof(struct max_regs, mpr2));
DEFINE(MAX_SGPCR2, offsetof(struct max_regs, sgpcr2));
DEFINE(MAX_MPR3, offsetof(struct max_regs, mpr3));
DEFINE(MAX_SGPCR3, offsetof(struct max_regs, sgpcr3));
DEFINE(MAX_MPR4, offsetof(struct max_regs, mpr4));
DEFINE(MAX_SGPCR4, offsetof(struct max_regs, sgpcr4));
DEFINE(MAX_MGPCR0, offsetof(struct max_regs, mgpcr0));
DEFINE(MAX_MGPCR1, offsetof(struct max_regs, mgpcr1));
DEFINE(MAX_MGPCR2, offsetof(struct max_regs, mgpcr2));
DEFINE(MAX_MGPCR3, offsetof(struct max_regs, mgpcr3));
DEFINE(MAX_MGPCR4, offsetof(struct max_regs, mgpcr4));
DEFINE(MAX_MGPCR5, offsetof(struct max_regs, mgpcr5));
/* AHB <-> IP-Bus Interface */
DEFINE(AIPS_MPR_0_7, offsetof(struct aips_regs, mpr_0_7));
DEFINE(AIPS_MPR_8_15, offsetof(struct aips_regs, mpr_8_15));
DEFINE(AIPS_PACR_0_7, offsetof(struct aips_regs, pacr_0_7));
DEFINE(AIPS_PACR_8_15, offsetof(struct aips_regs, pacr_8_15));
DEFINE(AIPS_PACR_16_23, offsetof(struct aips_regs, pacr_16_23));
DEFINE(AIPS_PACR_24_31, offsetof(struct aips_regs, pacr_24_31));
DEFINE(AIPS_OPACR_0_7, offsetof(struct aips_regs, opacr_0_7));
DEFINE(AIPS_OPACR_8_15, offsetof(struct aips_regs, opacr_8_15));
DEFINE(AIPS_OPACR_16_23, offsetof(struct aips_regs, opacr_16_23));
DEFINE(AIPS_OPACR_24_31, offsetof(struct aips_regs, opacr_24_31));
DEFINE(AIPS_OPACR_32_39, offsetof(struct aips_regs, opacr_32_39));
return 0;
}

View File

@@ -35,6 +35,7 @@
#include <fsl_esdhc.h>
#endif
#include <netdev.h>
#include <spl.h>
#define CLK_CODE(arm, ahb, sel) (((arm) << 16) + ((ahb) << 8) + (sel))
#define CLK_CODE_ARM(c) (((c) >> 16) & 0xFF)
@@ -357,11 +358,16 @@ unsigned int mxc_get_clock(enum mxc_clock clk)
case MXC_IPG_CLK:
return get_ipg_clk();
case MXC_IPG_PERCLK:
case MXC_I2C_CLK:
return get_ipg_per_clk();
case MXC_UART_CLK:
return imx_get_uartclk();
case MXC_ESDHC_CLK:
case MXC_ESDHC1_CLK:
return mxc_get_peri_clock(ESDHC1_CLK);
case MXC_ESDHC2_CLK:
return mxc_get_peri_clock(ESDHC2_CLK);
case MXC_ESDHC3_CLK:
return mxc_get_peri_clock(ESDHC3_CLK);
case MXC_USB_CLK:
return mxc_get_main_clock(USB_CLK);
case MXC_FEC_CLK:
@@ -471,13 +477,87 @@ int cpu_mmc_init(bd_t *bis)
int get_clocks(void)
{
#ifdef CONFIG_FSL_ESDHC
gd->sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
#if CONFIG_SYS_FSL_ESDHC_ADDR == MMC_SDHC2_BASE_ADDR
gd->sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
#elif CONFIG_SYS_FSL_ESDHC_ADDR == MMC_SDHC3_BASE_ADDR
gd->sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
#else
gd->sdhc_clk = mxc_get_clock(MXC_ESDHC1_CLK);
#endif
#endif
return 0;
}
void reset_cpu(ulong addr)
#define RCSR_MEM_CTL_WEIM 0
#define RCSR_MEM_CTL_NAND 1
#define RCSR_MEM_CTL_ATA 2
#define RCSR_MEM_CTL_EXPANSION 3
#define RCSR_MEM_TYPE_NOR 0
#define RCSR_MEM_TYPE_ONENAND 2
#define RCSR_MEM_TYPE_SD 0
#define RCSR_MEM_TYPE_I2C 2
#define RCSR_MEM_TYPE_SPI 3
u32 spl_boot_device(void)
{
struct wdog_regs *wdog = (struct wdog_regs *)WDOG_BASE_ADDR;
writew(4, &wdog->wcr);
struct ccm_regs *ccm =
(struct ccm_regs *)IMX_CCM_BASE;
u32 rcsr = readl(&ccm->rcsr);
u32 mem_type, mem_ctl;
/* In external mode, no boot device is returned */
if ((rcsr >> 10) & 0x03)
return BOOT_DEVICE_NONE;
mem_ctl = (rcsr >> 25) & 0x03;
mem_type = (rcsr >> 23) & 0x03;
switch (mem_ctl) {
case RCSR_MEM_CTL_WEIM:
switch (mem_type) {
case RCSR_MEM_TYPE_NOR:
return BOOT_DEVICE_NOR;
case RCSR_MEM_TYPE_ONENAND:
return BOOT_DEVICE_ONE_NAND;
default:
return BOOT_DEVICE_NONE;
}
case RCSR_MEM_CTL_NAND:
return BOOT_DEVICE_NAND;
case RCSR_MEM_CTL_EXPANSION:
switch (mem_type) {
case RCSR_MEM_TYPE_SD:
return BOOT_DEVICE_MMC1;
case RCSR_MEM_TYPE_I2C:
return BOOT_DEVICE_I2C;
case RCSR_MEM_TYPE_SPI:
return BOOT_DEVICE_SPI;
default:
return BOOT_DEVICE_NONE;
}
}
return BOOT_DEVICE_NONE;
}
#ifdef CONFIG_SPL_BUILD
u32 spl_boot_mode(void)
{
switch (spl_boot_device()) {
case BOOT_DEVICE_MMC1:
#ifdef CONFIG_SPL_FAT_SUPPORT
return MMCSD_MODE_FAT;
#else
return MMCSD_MODE_RAW;
#endif
break;
case BOOT_DEVICE_NAND:
return 0;
break;
default:
puts("spl: ERROR: unsupported device\n");
hang();
}
}
#endif

View File

@@ -0,0 +1,137 @@
/*
* Copyright (C) 2012, Stefano Babic <sbabic@denx.de>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <asm/io.h>
#include <asm/errno.h>
#include <asm/arch/imx-regs.h>
#include <linux/types.h>
#include <asm/arch/sys_proto.h>
#define ESDCTL_DDR2_EMR2 0x04000000
#define ESDCTL_DDR2_EMR3 0x06000000
#define ESDCTL_PRECHARGE 0x00000400
#define ESDCTL_DDR2_EN_DLL 0x02000400
#define ESDCTL_DDR2_RESET_DLL 0x00000333
#define ESDCTL_DDR2_MR 0x00000233
#define ESDCTL_DDR2_OCD_DEFAULT 0x02000780
enum {
SMODE_NORMAL = 0,
SMODE_PRECHARGE,
SMODE_AUTO_REFRESH,
SMODE_LOAD_REG,
SMODE_MANUAL_REFRESH
};
#define set_mode(x, en, m) (x | (en << 31) | (m << 28))
static inline void dram_wait(unsigned int count)
{
volatile unsigned int wait = count;
while (wait--)
;
}
void mx3_setup_sdram_bank(u32 start_address, u32 ddr2_config,
u32 row, u32 col, u32 dsize, u32 refresh)
{
struct esdc_regs *esdc = (struct esdc_regs *)ESDCTL_BASE_ADDR;
u32 *cfg_reg, *ctl_reg;
u32 val;
u32 ctlval;
switch (start_address) {
case CSD0_BASE_ADDR:
cfg_reg = &esdc->esdcfg0;
ctl_reg = &esdc->esdctl0;
break;
case CSD1_BASE_ADDR:
cfg_reg = &esdc->esdcfg1;
ctl_reg = &esdc->esdctl1;
break;
default:
return;
}
/* The MX35 supports 11 up to 14 rows */
if (row < 11 || row > 14 || col < 8 || col > 10)
return;
ctlval = (row - 11) << 24 | (col - 8) << 20 | (dsize << 16);
/* Initialize MISC register for DDR2 */
val = ESDC_MISC_RST | ESDC_MISC_MDDR_EN | ESDC_MISC_MDDR_DL_RST |
ESDC_MISC_DDR_EN | ESDC_MISC_DDR2_EN;
writel(val, &esdc->esdmisc);
val &= ~(ESDC_MISC_RST | ESDC_MISC_MDDR_DL_RST);
writel(val, &esdc->esdmisc);
/*
* according to DDR2 specs, wait a while before
* the PRECHARGE_ALL command
*/
dram_wait(0x20000);
/* Load DDR2 config and timing */
writel(ddr2_config, cfg_reg);
/* Precharge ALL */
writel(set_mode(ctlval, 1, SMODE_PRECHARGE),
ctl_reg);
writel(0xda, start_address + ESDCTL_PRECHARGE);
/* Load mode */
writel(set_mode(ctlval, 1, SMODE_LOAD_REG),
ctl_reg);
writeb(0xda, start_address + ESDCTL_DDR2_EMR2); /* EMRS2 */
writeb(0xda, start_address + ESDCTL_DDR2_EMR3); /* EMRS3 */
writeb(0xda, start_address + ESDCTL_DDR2_EN_DLL); /* Enable DLL */
writeb(0xda, start_address + ESDCTL_DDR2_RESET_DLL); /* Reset DLL */
/* Precharge ALL */
writel(set_mode(ctlval, 1, SMODE_PRECHARGE),
ctl_reg);
writel(0xda, start_address + ESDCTL_PRECHARGE);
/* Set mode auto refresh : at least two refresh are required */
writel(set_mode(ctlval, 1, SMODE_AUTO_REFRESH),
ctl_reg);
writel(0xda, start_address);
writel(0xda, start_address);
writel(set_mode(ctlval, 1, SMODE_LOAD_REG),
ctl_reg);
writeb(0xda, start_address + ESDCTL_DDR2_MR);
writeb(0xda, start_address + ESDCTL_DDR2_OCD_DEFAULT);
/* OCD mode exit */
writeb(0xda, start_address + ESDCTL_DDR2_EN_DLL); /* Enable DLL */
/* Set normal mode */
writel(set_mode(ctlval, 1, SMODE_NORMAL) | refresh,
ctl_reg);
dram_wait(0x20000);
/* Do not set delay lines, only for MDDR */
}

View File

@@ -100,6 +100,10 @@ _TEXT_BASE:
_bss_start_ofs:
.word __bss_start - _start
.global _image_copy_end_ofs
_image_copy_end_ofs:
.word __image_copy_end - _start
.globl _bss_end_ofs
_bss_end_ofs:
.word __bss_end__ - _start
@@ -161,13 +165,7 @@ next:
bl cpu_init_crit
#endif
/* Set stackpointer in internal RAM to call board_init_f */
call_board_init_f:
ldr sp, =(CONFIG_SYS_INIT_SP_ADDR)
bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
ldr r0,=0x00000000
bl board_init_f
bl _main
/*------------------------------------------------------------------------------*/
@@ -184,16 +182,12 @@ relocate_code:
mov r5, r1 /* save addr of gd */
mov r6, r2 /* save addr of destination */
/* Set up the stack */
stack_setup:
mov sp, r4
adr r0, _start
cmp r0, r6
moveq r9, #0 /* no relocation. relocation offset(r9) = 0 */
beq clear_bss /* skip relocation */
beq relocate_done /* skip relocation */
mov r1, r6 /* r1 <- scratch for copy_loop */
ldr r3, _bss_start_ofs
ldr r3, _image_copy_end_ofs
add r2, r0, r3 /* r2 <- source end address */
copy_loop:
@@ -241,50 +235,15 @@ fixnext:
add r2, r2, #8 /* each rel.dyn entry is 8 bytes */
cmp r2, r3
blo fixloop
bx lr
#endif
clear_bss:
relocate_done:
bx lr
#ifndef CONFIG_SPL_BUILD
ldr r0, _bss_start_ofs
ldr r1, _bss_end_ofs
mov r4, r6 /* reloc addr */
add r0, r0, r4
add r1, r1, r4
mov r2, #0x00000000 /* clear */
clbss_l:cmp r0, r1 /* clear loop... */
bhs clbss_e /* if reached end of bss, exit */
str r2, [r0]
add r0, r0, #4
b clbss_l
clbss_e:
#endif /* #ifndef CONFIG_SPL_BUILD */
/*
* We are done. Do not return, instead branch to second part of board
* initialization, now running from RAM.
*/
#ifdef CONFIG_NAND_SPL
ldr r0, _nand_boot_ofs
mov pc, r0
_nand_boot_ofs:
.word nand_boot
#else
jump_2_ram:
ldr r0, _board_init_r_ofs
ldr r1, _TEXT_BASE
add lr, r0, r1
add lr, lr, r9
/* setup parameters for board_init_r */
mov r0, r5 /* gd_t */
mov r1, r6 /* dest_addr */
/* jump to it ... */
mov pc, lr
_board_init_r_ofs:
.word board_init_r - _start
#endif
_rel_dyn_start_ofs:
.word __rel_dyn_start - _start
@@ -293,6 +252,13 @@ _rel_dyn_end_ofs:
_dynsym_start_ofs:
.word __dynsym_start - _start
#endif
.globl c_runtime_cpu_setup
c_runtime_cpu_setup:
bx lr
/*
*************************************************************************
*

View File

@@ -1,11 +1,11 @@
/*
* (C) Copyright 2002
* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
* Marius Groeger <mgroeger@sysgo.de>
*
* (C) Copyright 2002
* Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
*
* (C) Copyright 2010
* Texas Instruments, <www.ti.com>
* Aneesh V <aneesh@ti.com>
*
* See file CREDITS for list of people who contributed to this
* project.
*
@@ -16,7 +16,7 @@
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
@@ -25,41 +25,38 @@
* MA 02111-1307 USA
*/
/*
* CPU specific code
*/
MEMORY { .sram : ORIGIN = CONFIG_SPL_TEXT_BASE,\
LENGTH = CONFIG_SPL_MAX_SIZE }
MEMORY { .sdram : ORIGIN = CONFIG_SPL_BSS_START_ADDR, \
LENGTH = CONFIG_SPL_BSS_MAX_SIZE }
#include <common.h>
#include <command.h>
#include <asm/system.h>
static void cache_flush(void);
int cleanup_before_linux (void)
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)
ENTRY(_start)
SECTIONS
{
/*
* this function is called just before we call linux
* it prepares the processor for linux
*
* we turn off caches etc ...
*/
.text :
{
__start = .;
arch/arm/cpu/arm1136/start.o (.text)
*(.text*)
} >.sram
disable_interrupts ();
. = ALIGN(4);
.rodata : { *(SORT_BY_ALIGNMENT(.rodata*)) } >.sram
/* turn off I/D-cache */
icache_disable();
dcache_disable();
. = ALIGN(4);
.data : { *(SORT_BY_ALIGNMENT(.data*)) } >.sram
. = ALIGN(4);
__image_copy_end = .;
_end = .;
/* flush I/D-cache */
cache_flush();
return 0;
}
/* flush I/D-cache */
static void cache_flush (void)
{
unsigned long i = 0;
asm ("mcr p15, 0, %0, c7, c7, 0": :"r" (i));
.bss :
{
. = ALIGN(4);
__bss_start = .;
*(.bss*)
. = ALIGN(4);
__bss_end__ = .;
} >.sdram
}

View File

@@ -31,7 +31,7 @@ LIB = $(obj)lib$(SOC).o
SOBJS = reset.o
COBJS-$(CONFIG_S3C6400) += cpu_init.o speed.o
COBJS-y += timer.o
COBJS-y += timer.o init.o
OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS-y))

View File

@@ -0,0 +1,26 @@
/*
* (C) Copyright 2012 Ashok Kumar Reddy Kourla
* ashokkourla2000@gmail.com
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include<common.h>
int arch_cpu_init(void)
{
icache_enable();
return 0;
}

View File

@@ -224,12 +224,7 @@ skip_tcmdisable:
*/
bl lowlevel_init /* go setup pll,mux,memory */
/* Set stackpointer in internal RAM to call board_init_f */
call_board_init_f:
ldr sp, =(CONFIG_SYS_INIT_SP_ADDR)
bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
ldr r0,=0x00000000
bl board_init_f
bl _main
/*------------------------------------------------------------------------------*/
@@ -246,14 +241,10 @@ relocate_code:
mov r5, r1 /* save addr of gd */
mov r6, r2 /* save addr of destination */
/* Set up the stack */
stack_setup:
mov sp, r4
adr r0, _start
cmp r0, r6
moveq r9, #0 /* no relocation. relocation offset(r9) = 0 */
beq clear_bss /* skip relocation */
beq relocate_done /* skip relocation */
mov r1, r6 /* r1 <- scratch for copy_loop */
ldr r3, _bss_start_ofs
add r2, r0, r3 /* r2 <- source end address */
@@ -343,49 +334,9 @@ mmu_enable:
skip_hw_init:
#endif
clear_bss:
#ifndef CONFIG_SPL_BUILD
ldr r0, _bss_start_ofs
ldr r1, _bss_end_ofs
mov r4, r6 /* reloc addr */
add r0, r0, r4
add r1, r1, r4
mov r2, #0x00000000 /* clear */
relocate_done:
clbss_l:cmp r0, r1 /* clear loop... */
bhs clbss_e /* if reached end of bss, exit */
str r2, [r0]
add r0, r0, #4
b clbss_l
clbss_e:
#ifndef CONFIG_NAND_SPL
bl coloured_LED_init
bl red_led_on
#endif
#endif
/*
* We are done. Do not return, instead branch to second part of board
* initialization, now running from RAM.
*/
#ifdef CONFIG_NAND_SPL
ldr pc, _nand_boot
_nand_boot: .word nand_boot
#else
ldr r0, _board_init_r_ofs
adr r1, _start
add lr, r0, r1
add lr, lr, r9
/* setup parameters for board_init_r */
mov r0, r5 /* gd_t */
mov r1, r6 /* dest_addr */
/* jump to it ... */
mov pc, lr
_board_init_r_ofs:
.word board_init_r - _start
#endif
bx lr
_rel_dyn_start_ofs:
.word __rel_dyn_start - _start
@@ -399,6 +350,11 @@ _mmu_table_base:
.word mmu_table
#endif
.globl c_runtime_cpu_setup
c_runtime_cpu_setup:
mov pc, lr
#ifndef CONFIG_NAND_SPL
/*
* we assume that cache operation is done before. (eg. cleanup_before_linux())

View File

@@ -21,7 +21,7 @@ include $(TOPDIR)/config.mk
LIB = $(obj)lib$(SOC).o
COBJS += aemif.o clock.o init.o mux.o timer.o wdt.o
COBJS += aemif.o clock.o init.o mux.o timer.o
SOBJS += lowlevel_init.o
SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)

View File

@@ -168,10 +168,6 @@ static unsigned long pll_div_mask[] = { 0x01ff, 0x00ff, 0x00ff };
#define tdm_extra_clk {TDM_PLL, 1}
#define tdm1_clk {TDM_PLL, 2}
/* Optimization barrier */
#define barrier() \
__asm__ __volatile__("mov r0, r0\n" : : : "memory");
static const struct lpsc_map lpsc_clk_map[] = {
[TNETV107X_LPSC_ARM] = sys_arm1176_clk,
[TNETV107X_LPSC_GEM] = sys_dsp_clk,

View File

@@ -27,34 +27,12 @@
*/
/*
* CPU specific code
* cleanup_before_linux() - Prepare the CPU to jump to Linux
*
* This function is called just before we call Linux, it
* prepares the processor for linux
*/
#include <common.h>
#include <command.h>
#include <clps7111.h>
#include <asm/hardware.h>
#include <asm/system.h>
int cleanup_before_linux (void)
int cleanup_before_linux(void)
{
/*
* this function is called just before we call linux
* it prepares the processor for linux
*
* we turn off caches etc ...
* and we set the CPU-speed to 73 MHz - see start.S for details
*/
#if defined(CONFIG_NETARM) || defined(CONFIG_S3C4510B) || defined(CONFIG_LPC2292)
disable_interrupts ();
/* Nothing more needed */
#elif defined(CONFIG_INTEGRATOR) && defined(CONFIG_ARCH_INTEGRATOR)
/* No cleanup before linux for IntegratorAP/CM720T as yet */
#elif defined(CONFIG_TEGRA)
/* No cleanup before linux for tegra as yet */
#else
#error No cleanup_before_linux() defined for this CPU type
#endif
return 0;
}

View File

@@ -27,266 +27,23 @@
*/
#include <common.h>
#include <clps7111.h>
#include <asm/proc-armv/ptrace.h>
#include <asm/hardware.h>
#ifndef CONFIG_NETARM
/* we always count down the max. */
#define TIMER_LOAD_VAL 0xffff
/* macro to read the 16 bit timer */
#define READ_TIMER (IO_TC1D & 0xffff)
#ifdef CONFIG_LPC2292
#undef READ_TIMER
#define READ_TIMER (0xFFFFFFFF - GET32(T0TC))
#endif
#else
#define IRQEN (*(volatile unsigned int *)(NETARM_GEN_MODULE_BASE + NETARM_GEN_INTR_ENABLE))
#define TM2CTRL (*(volatile unsigned int *)(NETARM_GEN_MODULE_BASE + NETARM_GEN_TIMER2_CONTROL))
#define TM2STAT (*(volatile unsigned int *)(NETARM_GEN_MODULE_BASE + NETARM_GEN_TIMER2_STATUS))
#define TIMER_LOAD_VAL NETARM_GEN_TSTAT_CTC_MASK
#define READ_TIMER (TM2STAT & NETARM_GEN_TSTAT_CTC_MASK)
#endif
#ifdef CONFIG_S3C4510B
/* require interrupts for the S3C4510B */
# ifndef CONFIG_USE_IRQ
# error CONFIG_USE_IRQ _must_ be defined when using CONFIG_S3C4510B
# else
static struct _irq_handler IRQ_HANDLER[N_IRQS];
# endif
#endif /* CONFIG_S3C4510B */
#ifdef CONFIG_USE_IRQ
void do_irq (struct pt_regs *pt_regs)
{
#if defined(CONFIG_S3C4510B)
unsigned int pending;
while ( (pending = GET_REG( REG_INTOFFSET)) != 0x54) { /* sentinal value for no pending interrutps */
IRQ_HANDLER[pending>>2].m_func( IRQ_HANDLER[pending>>2].m_data);
/* clear pending interrupt */
PUT_REG( REG_INTPEND, (1<<(pending>>2)));
}
#elif defined(CONFIG_INTEGRATOR) && defined(CONFIG_ARCH_INTEGRATOR)
/* No do_irq() for IntegratorAP/CM720T as yet */
#elif defined(CONFIG_LPC2292)
void (*pfnct)(void);
pfnct = (void (*)(void))VICVectAddr;
(*pfnct)();
#else
#error do_irq() not defined for this CPU type
#endif
}
#endif
#ifdef CONFIG_S3C4510B
static void default_isr( void *data) {
printf ("default_isr(): called for IRQ %d\n", (int)data);
}
static void timer_isr( void *data) {
unsigned int *pTime = (unsigned int *)data;
(*pTime)++;
if ( !(*pTime % (CONFIG_SYS_HZ/4))) {
/* toggle LED 0 */
PUT_REG( REG_IOPDATA, GET_REG(REG_IOPDATA) ^ 0x1);
}
}
#endif
#if defined(CONFIG_INTEGRATOR) && defined(CONFIG_ARCH_INTEGRATOR)
/* Use IntegratorAP routines in board/integratorap.c */
#else
#if defined(CONFIG_TEGRA)
static ulong timestamp;
static ulong lastdec;
#if defined(CONFIG_USE_IRQ) && defined(CONFIG_S3C4510B)
int arch_interrupt_init (void)
int timer_init (void)
{
int i;
/* install default interrupt handlers */
for ( i = 0; i < N_IRQS; i++) {
IRQ_HANDLER[i].m_data = (void *)i;
IRQ_HANDLER[i].m_func = default_isr;
}
/* configure interrupts for IRQ mode */
PUT_REG( REG_INTMODE, 0x0);
/* clear any pending interrupts */
PUT_REG( REG_INTPEND, 0x1FFFFF);
/* No timer routines for tegra as yet */
lastdec = 0;
/* install interrupt handler for timer */
IRQ_HANDLER[INT_TIMER0].m_data = (void *)&timestamp;
IRQ_HANDLER[INT_TIMER0].m_func = timer_isr;
timestamp = 0;
return 0;
}
#endif
int timer_init (void)
{
#if defined(CONFIG_NETARM)
/* disable all interrupts */
IRQEN = 0;
/* operate timer 2 in non-prescale mode */
TM2CTRL = ( NETARM_GEN_TIMER_SET_HZ(CONFIG_SYS_HZ) |
NETARM_GEN_TCTL_ENABLE |
NETARM_GEN_TCTL_INIT_COUNT(TIMER_LOAD_VAL));
/* set timer 2 counter */
lastdec = TIMER_LOAD_VAL;
#elif defined(CONFIG_S3C4510B)
/* configure free running timer 0 */
PUT_REG( REG_TMOD, 0x0);
/* Stop timer 0 */
CLR_REG( REG_TMOD, TM0_RUN);
/* Configure for interval mode */
CLR_REG( REG_TMOD, TM1_TOGGLE);
/*
* Load Timer data register with count down value.
* count_down_val = CONFIG_SYS_SYS_CLK_FREQ/CONFIG_SYS_HZ
*/
PUT_REG( REG_TDATA0, (CONFIG_SYS_SYS_CLK_FREQ / CONFIG_SYS_HZ));
/*
* Enable global interrupt
* Enable timer0 interrupt
*/
CLR_REG( REG_INTMASK, ((1<<INT_GLOBAL) | (1<<INT_TIMER0)));
/* Start timer */
SET_REG( REG_TMOD, TM0_RUN);
#elif defined(CONFIG_LPC2292)
PUT32(T0IR, 0); /* disable all timer0 interrupts */
PUT32(T0TCR, 0); /* disable timer0 */
PUT32(T0PR, CONFIG_SYS_SYS_CLK_FREQ / CONFIG_SYS_HZ);
PUT32(T0MCR, 0);
PUT32(T0TC, 0);
PUT32(T0TCR, 1); /* enable timer0 */
#elif defined(CONFIG_TEGRA)
/* No timer routines for tegra as yet */
lastdec = 0;
#else
#error No timer_init() defined for this CPU type
#endif
timestamp = 0;
return (0);
}
#endif /* ! IntegratorAP */
/*
* timer without interrupts
*/
#if defined(CONFIG_NETARM) || defined(CONFIG_LPC2292)
ulong get_timer (ulong base)
{
return get_timer_masked () - base;
}
void __udelay (unsigned long usec)
{
ulong tmo;
tmo = usec / 1000;
tmo *= CONFIG_SYS_HZ;
tmo /= 1000;
tmo += get_timer (0);
while (get_timer_masked () < tmo)
#ifdef CONFIG_LPC2292
/* GJ - not sure whether this is really needed or a misunderstanding */
__asm__ __volatile__(" nop");
#else
/*NOP*/;
#endif
}
ulong get_timer_masked (void)
{
ulong now = READ_TIMER;
if (lastdec >= now) {
/* normal mode */
timestamp += lastdec - now;
} else {
/* we have an overflow ... */
timestamp += lastdec + TIMER_LOAD_VAL - now;
}
lastdec = now;
return timestamp;
}
void udelay_masked (unsigned long usec)
{
ulong tmo;
ulong endtime;
signed long diff;
if (usec >= 1000) {
tmo = usec / 1000;
tmo *= CONFIG_SYS_HZ;
tmo /= 1000;
} else {
tmo = usec * CONFIG_SYS_HZ;
tmo /= (1000*1000);
}
endtime = get_timer_masked () + tmo;
do {
ulong now = get_timer_masked ();
diff = endtime - now;
} while (diff >= 0);
}
#elif defined(CONFIG_S3C4510B)
ulong get_timer (ulong base)
{
return timestamp - base;
}
void __udelay (unsigned long usec)
{
u32 ticks;
ticks = (usec * CONFIG_SYS_HZ) / 1000000;
ticks += get_timer (0);
while (get_timer (0) < ticks)
/*NOP*/;
}
#elif defined(CONFIG_INTEGRATOR) && defined(CONFIG_ARCH_INTEGRATOR)
/* No timer routines for IntegratorAP/CM720T as yet */
#elif defined(CONFIG_TEGRA)
/* No timer routines for tegra as yet */
#else
#error Timer routines not defined for this CPU type
#endif

View File

@@ -1,50 +0,0 @@
#
# (C) Copyright 2000-2007
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
include $(TOPDIR)/config.mk
LIB = $(obj)lib$(SOC).o
COBJS = flash.o mmc.o mmc_hw.o spi.o
SOBJS = $(obj)iap_entry.o
SRCS := $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS))
all: $(obj).depend $(LIB)
$(LIB): $(OBJS) $(SOBJS)
$(call cmd_link_o_target, $(OBJS) $(SOBJS))
# this MUST be compiled as thumb code!
$(SOBJS):
$(CC) $(AFLAGS) -march=armv4t -c -o $(SOBJS) iap_entry.S
#########################################################################
# defines $(obj).depend target
include $(SRCTREE)/rules.mk
sinclude $(obj).depend
#########################################################################

View File

@@ -1,249 +0,0 @@
/*
* (C) Copyright 2006 Embedded Artists AB <www.embeddedartists.com>
*
* Modified to remove all but the IAP-command related code by
* Gary Jennejohn <garyj@denx.de>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#include <asm/arch/hardware.h>
/* IAP commands use 32 bytes at the top of CPU internal sram, we
use 512 bytes below that */
#define COPY_BUFFER_LOCATION 0x40003de0
#define IAP_LOCATION 0x7ffffff1
#define IAP_CMD_PREPARE 50
#define IAP_CMD_COPY 51
#define IAP_CMD_ERASE 52
#define IAP_CMD_CHECK 53
#define IAP_CMD_ID 54
#define IAP_CMD_VERSION 55
#define IAP_CMD_COMPARE 56
#define IAP_RET_CMD_SUCCESS 0
static unsigned long command[5];
static unsigned long result[2];
extern void iap_entry(unsigned long * command, unsigned long * result);
/*-----------------------------------------------------------------------
*
*/
static int get_flash_sector(flash_info_t * info, ulong flash_addr)
{
int i;
for(i = 1; i < (info->sector_count); i++) {
if (flash_addr < (info->start[i]))
break;
}
return (i-1);
}
/*-----------------------------------------------------------------------
* This function assumes that flash_addr is aligned on 512 bytes boundary
* in flash. This function also assumes that prepare have been called
* for the sector in question.
*/
int lpc2292_copy_buffer_to_flash(flash_info_t * info, ulong flash_addr)
{
int first_sector;
int last_sector;
first_sector = get_flash_sector(info, flash_addr);
last_sector = get_flash_sector(info, flash_addr + 512 - 1);
/* prepare sectors for write */
command[0] = IAP_CMD_PREPARE;
command[1] = first_sector;
command[2] = last_sector;
iap_entry(command, result);
if (result[0] != IAP_RET_CMD_SUCCESS) {
printf("IAP prepare failed\n");
return ERR_PROG_ERROR;
}
command[0] = IAP_CMD_COPY;
command[1] = flash_addr;
command[2] = COPY_BUFFER_LOCATION;
command[3] = 512;
command[4] = CONFIG_SYS_SYS_CLK_FREQ >> 10;
iap_entry(command, result);
if (result[0] != IAP_RET_CMD_SUCCESS) {
printf("IAP copy failed\n");
return 1;
}
return 0;
}
/*-----------------------------------------------------------------------
*/
int lpc2292_flash_erase (flash_info_t * info, int s_first, int s_last)
{
int flag;
int prot;
int sect;
prot = 0;
for (sect = s_first; sect <= s_last; ++sect) {
if (info->protect[sect]) {
prot++;
}
}
if (prot)
return ERR_PROTECTED;
flag = disable_interrupts();
printf ("Erasing %d sectors starting at sector %2d.\n"
"This make take some time ... ",
s_last - s_first + 1, s_first);
command[0] = IAP_CMD_PREPARE;
command[1] = s_first;
command[2] = s_last;
iap_entry(command, result);
if (result[0] != IAP_RET_CMD_SUCCESS) {
printf("IAP prepare failed\n");
return ERR_PROTECTED;
}
command[0] = IAP_CMD_ERASE;
command[1] = s_first;
command[2] = s_last;
command[3] = CONFIG_SYS_SYS_CLK_FREQ >> 10;
iap_entry(command, result);
if (result[0] != IAP_RET_CMD_SUCCESS) {
printf("IAP erase failed\n");
return ERR_PROTECTED;
}
if (flag)
enable_interrupts();
return ERR_OK;
}
int lpc2292_write_buff (flash_info_t * info, uchar * src, ulong addr,
ulong cnt)
{
int first_copy_size;
int last_copy_size;
int first_block;
int last_block;
int nbr_mid_blocks;
uchar memmap_value;
ulong i;
uchar* src_org;
uchar* dst_org;
int ret = ERR_OK;
src_org = src;
dst_org = (uchar*)addr;
first_block = addr / 512;
last_block = (addr + cnt) / 512;
nbr_mid_blocks = last_block - first_block - 1;
first_copy_size = 512 - (addr % 512);
last_copy_size = (addr + cnt) % 512;
debug("\ncopy first block: (1) %lX -> %lX 0x200 bytes, "
"(2) %lX -> %lX 0x%X bytes, (3) %lX -> %lX 0x200 bytes\n",
(ulong)(first_block * 512),
(ulong)COPY_BUFFER_LOCATION,
(ulong)src,
(ulong)(COPY_BUFFER_LOCATION + 512 - first_copy_size),
first_copy_size,
(ulong)COPY_BUFFER_LOCATION,
(ulong)(first_block * 512));
/* copy first block */
memcpy((void*)COPY_BUFFER_LOCATION,
(void*)(first_block * 512), 512);
memcpy((void*)(COPY_BUFFER_LOCATION + 512 - first_copy_size),
src, first_copy_size);
lpc2292_copy_buffer_to_flash(info, first_block * 512);
src += first_copy_size;
addr += first_copy_size;
/* copy middle blocks */
for (i = 0; i < nbr_mid_blocks; i++) {
debug("copy middle block: %lX -> %lX 512 bytes, "
"%lX -> %lX 512 bytes\n",
(ulong)src,
(ulong)COPY_BUFFER_LOCATION,
(ulong)COPY_BUFFER_LOCATION,
(ulong)addr);
memcpy((void*)COPY_BUFFER_LOCATION, src, 512);
lpc2292_copy_buffer_to_flash(info, addr);
src += 512;
addr += 512;
}
if (last_copy_size > 0) {
debug("copy last block: (1) %lX -> %lX 0x200 bytes, "
"(2) %lX -> %lX 0x%X bytes, (3) %lX -> %lX x200 bytes\n",
(ulong)(last_block * 512),
(ulong)COPY_BUFFER_LOCATION,
(ulong)src,
(ulong)(COPY_BUFFER_LOCATION),
last_copy_size,
(ulong)COPY_BUFFER_LOCATION,
(ulong)addr);
/* copy last block */
memcpy((void*)COPY_BUFFER_LOCATION,
(void*)(last_block * 512), 512);
memcpy((void*)COPY_BUFFER_LOCATION,
src, last_copy_size);
lpc2292_copy_buffer_to_flash(info, addr);
}
/* verify write */
memmap_value = GET8(MEMMAP);
disable_interrupts();
PUT8(MEMMAP, 01); /* we must make sure that initial 64
bytes are taken from flash when we
do the compare */
for (i = 0; i < cnt; i++) {
if (*dst_org != *src_org){
printf("Write failed. Byte %lX differs\n", i);
ret = ERR_PROG_ERROR;
break;
}
dst_org++;
src_org++;
}
PUT8(MEMMAP, memmap_value);
enable_interrupts();
return ret;
}

View File

@@ -1,7 +0,0 @@
IAP_ADDRESS: .word 0x7FFFFFF1
.globl iap_entry
iap_entry:
ldr r2, IAP_ADDRESS
bx r2
mov pc, lr

View File

@@ -1,131 +0,0 @@
/*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <config.h>
#include <common.h>
#include <mmc.h>
#include <asm/errno.h>
#include <asm/arch/hardware.h>
#include <part.h>
#include <fat.h>
#include "mmc_hw.h"
#include <asm/arch/spi.h>
#ifdef CONFIG_MMC
#undef MMC_DEBUG
static block_dev_desc_t mmc_dev;
/* these are filled out by a call to mmc_hw_get_parameters */
static int hw_size; /* in kbytes */
static int hw_nr_sects;
static int hw_sect_size; /* in bytes */
block_dev_desc_t * mmc_get_dev(int dev)
{
return (block_dev_desc_t *)(&mmc_dev);
}
unsigned long mmc_block_read(int dev,
unsigned long start,
lbaint_t blkcnt,
void *buffer)
{
unsigned long rc = 0;
unsigned char *p = (unsigned char *)buffer;
unsigned long i;
unsigned long addr = start;
#ifdef MMC_DEBUG
printf("mmc_block_read: start=%lu, blkcnt=%lu\n", start,
(unsigned long)blkcnt);
#endif
for(i = 0; i < (unsigned long)blkcnt; i++) {
#ifdef MMC_DEBUG
printf("mmc_read_sector: addr=%lu, buffer=%p\n", addr, p);
#endif
(void)mmc_read_sector(addr, p);
rc++;
addr++;
p += hw_sect_size;
}
return rc;
}
/*-----------------------------------------------------------------------------
* Read hardware paramterers (sector size, size, number of sectors)
*/
static int mmc_hw_get_parameters(void)
{
unsigned char csddata[16];
unsigned int sizemult;
unsigned int size;
mmc_read_csd(csddata);
hw_sect_size = 1<<(csddata[5] & 0x0f);
size = ((csddata[6]&0x03)<<10)+(csddata[7]<<2)+(csddata[8]&0xc0);
sizemult = ((csddata[10] & 0x80)>>7)+((csddata[9] & 0x03)<<1);
hw_nr_sects = (size+1)*(1<<(sizemult+2));
hw_size = hw_nr_sects*hw_sect_size/1024;
#ifdef MMC_DEBUG
printf("mmc_hw_get_parameters: hw_sect_size=%d, hw_nr_sects=%d, "
"hw_size=%d\n", hw_sect_size, hw_nr_sects, hw_size);
#endif
return 0;
}
int mmc_legacy_init(int verbose)
{
int ret = -ENODEV;
if (verbose)
printf("mmc_legacy_init\n");
spi_init();
/* this meeds to be done twice */
mmc_hw_init();
udelay(1000);
mmc_hw_init();
mmc_hw_get_parameters();
mmc_dev.if_type = IF_TYPE_MMC;
mmc_dev.part_type = PART_TYPE_DOS;
mmc_dev.dev = 0;
mmc_dev.lun = 0;
mmc_dev.type = 0;
mmc_dev.blksz = hw_sect_size;
mmc_dev.lba = hw_nr_sects;
sprintf((char*)mmc_dev.vendor, "Unknown vendor");
sprintf((char*)mmc_dev.product, "Unknown product");
sprintf((char*)mmc_dev.revision, "N/A");
mmc_dev.removable = 0; /* should be true??? */
mmc_dev.block_read = mmc_block_read;
fat_register_device(&mmc_dev, 1);
ret = 0;
return ret;
}
#endif /* CONFIG_MMC */

View File

@@ -1,233 +0,0 @@
/*
This code was original written by Ulrich Radig and modified by
Embedded Artists AB (www.embeddedartists.com).
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include <config.h>
#include <common.h>
#include <asm/arch/hardware.h>
#include <asm/arch/spi.h>
#define MMC_Enable() PUT32(IO1CLR, 1l << 22)
#define MMC_Disable() PUT32(IO1SET, 1l << 22)
#define mmc_spi_cfg() spi_set_clock(8); spi_set_cfg(0, 1, 0);
static unsigned char Write_Command_MMC (unsigned char *CMD);
static void MMC_Read_Block(unsigned char *CMD, unsigned char *Buffer,
unsigned short int Bytes);
/* initialize the hardware */
int mmc_hw_init(void)
{
unsigned long a;
unsigned short int Timeout = 0;
unsigned char b;
unsigned char CMD[] = {0x40, 0x00, 0x00, 0x00, 0x00, 0x95};
/* set-up GPIO and SPI */
(*((volatile unsigned long *)PINSEL2)) &= ~(1l << 3); /* clear bit 3 */
(*((volatile unsigned long *)IO1DIR)) |= (1l << 22); /* set bit 22 (output) */
MMC_Disable();
spi_lock();
spi_set_clock(248);
spi_set_cfg(0, 1, 0);
MMC_Enable();
/* waste some time */
for(a=0; a < 20000; a++)
asm("nop");
/* Put the MMC/SD-card into SPI-mode */
for (b = 0; b < 10; b++) /* Sends min 74+ clocks to the MMC/SD-card */
spi_write(0xff);
/* Sends command CMD0 to MMC/SD-card */
while (Write_Command_MMC(CMD) != 1) {
if (Timeout++ > 200) {
MMC_Disable();
spi_unlock();
return(1); /* Abort with command 1 (return 1) */
}
}
/* Sends Command CMD1 an MMC/SD-card */
Timeout = 0;
CMD[0] = 0x41;/* Command 1 */
CMD[5] = 0xFF;
while (Write_Command_MMC(CMD) != 0) {
if (Timeout++ > 200) {
MMC_Disable();
spi_unlock();
return (2); /* Abort with command 2 (return 2) */
}
}
MMC_Disable();
spi_unlock();
return 0;
}
/* ############################################################################
Sends a command to the MMC/SD-card
######################################################################### */
static unsigned char Write_Command_MMC (unsigned char *CMD)
{
unsigned char a, tmp = 0xff;
unsigned short int Timeout = 0;
MMC_Disable();
spi_write(0xFF);
MMC_Enable();
for (a = 0; a < 0x06; a++)
spi_write(*CMD++);
while (tmp == 0xff) {
tmp = spi_read();
if (Timeout++ > 5000)
break;
}
return (tmp);
}
/* ############################################################################
Routine to read the CID register from the MMC/SD-card (16 bytes)
######################################################################### */
void MMC_Read_Block(unsigned char *CMD, unsigned char *Buffer, unsigned short
int Bytes)
{
unsigned short int a;
spi_lock();
mmc_spi_cfg();
MMC_Enable();
if (Write_Command_MMC(CMD) != 0) {
MMC_Disable();
spi_unlock();
return;
}
while (spi_read() != 0xfe) {};
for (a = 0; a < Bytes; a++)
*Buffer++ = spi_read();
/* Read the CRC-byte */
spi_read(); /* CRC - byte is discarded */
spi_read(); /* CRC - byte is discarded */
/* set MMC_Chip_Select to high (MMC/SD-card Inaktiv) */
MMC_Disable();
spi_unlock();
return;
}
/* ############################################################################
Routine to read a block (512 bytes) from the MMC/SD-card
######################################################################### */
unsigned char mmc_read_sector (unsigned long addr,unsigned char *Buffer)
{
/* Command 16 to read aBlocks from the MMC/SD - caed */
unsigned char CMD[] = {0x51,0x00,0x00,0x00,0x00,0xFF};
/* The address on the MMC/SD-card is in bytes,
addr is transformed from blocks to bytes and the result is
placed into the command */
addr = addr << 9; /* addr = addr * 512 */
CMD[1] = ((addr & 0xFF000000) >> 24);
CMD[2] = ((addr & 0x00FF0000) >> 16);
CMD[3] = ((addr & 0x0000FF00) >> 8 );
MMC_Read_Block(CMD, Buffer, 512);
return (0);
}
/* ############################################################################
Routine to write a block (512 byte) to the MMC/SD-card
######################################################################### */
unsigned char mmc_write_sector (unsigned long addr,unsigned char *Buffer)
{
unsigned char tmp, a;
unsigned short int b;
/* Command 24 to write a block to the MMC/SD - card */
unsigned char CMD[] = {0x58, 0x00, 0x00, 0x00, 0x00, 0xFF};
/* The address on the MMC/SD-card is in bytes,
addr is transformed from blocks to bytes and the result is
placed into the command */
addr = addr << 9; /* addr = addr * 512 */
CMD[1] = ((addr & 0xFF000000) >> 24);
CMD[2] = ((addr & 0x00FF0000) >> 16);
CMD[3] = ((addr & 0x0000FF00) >> 8 );
spi_lock();
mmc_spi_cfg();
MMC_Enable();
/* Send command CMD24 to the MMC/SD-card (Write 1 Block/512 Bytes) */
tmp = Write_Command_MMC(CMD);
if (tmp != 0) {
MMC_Disable();
spi_unlock();
return(tmp);
}
/* Do a short delay and send a clock-pulse to the MMC/SD-card */
for (a = 0; a < 100; a++)
spi_read();
/* Send a start byte to the MMC/SD-card */
spi_write(0xFE);
/* Write the block (512 bytes) to the MMC/SD-card */
for (b = 0; b < 512; b++)
spi_write(*Buffer++);
/* write the CRC-Byte */
spi_write(0xFF); /* write a dummy CRC */
spi_write(0xFF); /* CRC code is not used */
/* Wait for MMC/SD-card busy */
while (spi_read() != 0xff) {};
/* set MMC_Chip_Select to high (MMC/SD-card inactive) */
MMC_Disable();
spi_unlock();
return (0);
}
/* #########################################################################
Routine to read the CSD register from the MMC/SD-card (16 bytes)
######################################################################### */
unsigned char mmc_read_csd (unsigned char *Buffer)
{
/* Command to read the CSD register */
unsigned char CMD[] = {0x49, 0x00, 0x00, 0x00, 0x00, 0xFF};
MMC_Read_Block(CMD, Buffer, 16);
return (0);
}

View File

@@ -1,29 +0,0 @@
/*
This module implements a linux character device driver for the 24c256 chip.
Copyright (C) 2006 Embedded Artists AB (www.embeddedartists.com)
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#ifndef _MMC_HW_
#define _MMC_HW_
unsigned char mmc_read_csd(unsigned char *Buffer);
unsigned char mmc_read_sector (unsigned long addr,
unsigned char *Buffer);
unsigned char mmc_write_sector (unsigned long addr,unsigned char *Buffer);
int mmc_hw_init(void);
#endif /* _MMC_HW_ */

View File

@@ -1,40 +0,0 @@
/*
This module implements an interface to the SPI on the lpc22xx.
Copyright (C) 2006 Embedded Artists AB (www.embeddedartists.com)
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include <config.h>
#include <common.h>
#include <asm/errno.h>
#include <asm/arch/hardware.h>
#include <asm/arch/spi.h>
unsigned long spi_flags;
unsigned char spi_idle = 0x00;
int spi_init(void)
{
unsigned long pinsel0_value;
/* activate spi pins */
pinsel0_value = GET32(PINSEL0);
pinsel0_value &= ~(0xFFl << 8);
pinsel0_value |= (0x55l << 8);
PUT32(PINSEL0, pinsel0_value);
return 0;
}

View File

@@ -1,86 +0,0 @@
/*
* (C) Copyright 2002
* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
* Marius Groeger <mgroeger@sysgo.de>
*
* (C) Copyright 2002
* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
* Alex Zuepke <azu@sysgo.de>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#include <asm/hardware.h>
void icache_enable (void)
{
s32 i;
/* disable all cache bits */
CLR_REG( REG_SYSCFG, 0x3F);
/* 8KB cache, write enable */
SET_REG( REG_SYSCFG, CACHE_WRITE_BUFF | CACHE_MODE_01);
/* clear TAG RAM bits */
for ( i = 0; i < 256; i++)
PUT_REG( CACHE_TAG_RAM + 4*i, 0x00000000);
/* clear SET0 RAM */
for(i=0; i < 1024; i++)
PUT_REG( CACHE_SET0_RAM + 4*i, 0x00000000);
/* clear SET1 RAM */
for(i=0; i < 1024; i++)
PUT_REG( CACHE_SET1_RAM + 4*i, 0x00000000);
/* enable cache */
SET_REG( REG_SYSCFG, CACHE_ENABLE);
}
void icache_disable (void)
{
/* disable all cache bits */
CLR_REG( REG_SYSCFG, 0x3F);
}
int icache_status (void)
{
return GET_REG( REG_SYSCFG) & CACHE_ENABLE;
}
void dcache_enable (void)
{
/* we don't have seperate instruction/data caches */
icache_enable();
}
void dcache_disable (void)
{
/* we don't have seperate instruction/data caches */
icache_disable();
}
int dcache_status (void)
{
/* we don't have seperate instruction/data caches */
return icache_status();
}

View File

@@ -43,11 +43,7 @@ _start: b reset
ldr pc, _software_interrupt
ldr pc, _prefetch_abort
ldr pc, _data_abort
#ifdef CONFIG_LPC2292
.word 0xB4405F76 /* 2's complement of the checksum of the vectors */
#else
ldr pc, _not_used
#endif
ldr pc, _irq
ldr pc, _fiq
@@ -151,16 +147,7 @@ reset:
bl cpu_init_crit
#endif
#ifdef CONFIG_LPC2292
bl lowlevel_init
#endif
/* Set stackpointer in internal RAM to call board_init_f */
call_board_init_f:
ldr sp, =(CONFIG_SYS_INIT_SP_ADDR)
bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
ldr r0,=0x00000000
bl board_init_f
bl _main
/*------------------------------------------------------------------------------*/
@@ -177,14 +164,10 @@ relocate_code:
mov r5, r1 /* save addr of gd */
mov r6, r2 /* save addr of destination */
/* Set up the stack */
stack_setup:
mov sp, r4
adr r0, _start
cmp r0, r6
moveq r9, #0 /* no relocation. relocation offset(r9) = 0 */
beq clear_bss /* skip relocation */
beq relocate_done /* skip relocation */
mov r1, r6 /* r1 <- scratch for copy_loop */
ldr r3, _bss_start_ofs
add r2, r0, r3 /* r2 <- source end address */
@@ -236,43 +219,10 @@ fixnext:
blo fixloop
#endif
clear_bss:
#ifndef CONFIG_SPL_BUILD
ldr r0, _bss_start_ofs
ldr r1, _bss_end_ofs
mov r4, r6 /* reloc addr */
add r0, r0, r4
add r1, r1, r4
mov r2, #0x00000000 /* clear */
relocate_done:
clbss_l:cmp r0, r1 /* clear loop... */
bhs clbss_e /* if reached end of bss, exit */
str r2, [r0]
add r0, r0, #4
b clbss_l
clbss_e:
bl coloured_LED_init
bl red_led_on
#endif
/*
* We are done. Do not return, instead branch to second part of board
* initialization, now running from RAM.
*/
ldr r0, _board_init_r_ofs
adr r1, _start
add lr, r0, r1
add lr, lr, r9
/* setup parameters for board_init_r */
mov r0, r5 /* gd_t */
mov r1, r6 /* dest_addr */
/* jump to it ... */
mov pc, lr
_board_init_r_ofs:
.word board_init_r - _start
_rel_dyn_start_ofs:
.word __rel_dyn_start - _start
_rel_dyn_end_ofs:
@@ -280,6 +230,11 @@ _rel_dyn_end_ofs:
_dynsym_start_ofs:
.word __dynsym_start - _start
.globl c_runtime_cpu_setup
c_runtime_cpu_setup:
mov pc, lr
/*
*************************************************************************
*
@@ -291,148 +246,9 @@ _dynsym_start_ofs:
*************************************************************************
*/
#if defined(CONFIG_LPC2292)
PLLCFG_ADR: .word PLLCFG
PLLFEED_ADR: .word PLLFEED
PLLCON_ADR: .word PLLCON
PLLSTAT_ADR: .word PLLSTAT
VPBDIV_ADR: .word VPBDIV
MEMMAP_ADR: .word MEMMAP
#endif
cpu_init_crit:
#if defined(CONFIG_NETARM)
/*
* prior to software reset : need to set pin PORTC4 to be *HRESET
*/
ldr r0, =NETARM_GEN_MODULE_BASE
ldr r1, =(NETARM_GEN_PORT_MODE(0x10) | \
NETARM_GEN_PORT_DIR(0x10))
str r1, [r0, #+NETARM_GEN_PORTC]
/*
* software reset : see HW Ref. Guide 8.2.4 : Software Service register
* for an explanation of this process
*/
ldr r0, =NETARM_GEN_MODULE_BASE
ldr r1, =NETARM_GEN_SW_SVC_RESETA
str r1, [r0, #+NETARM_GEN_SOFTWARE_SERVICE]
ldr r1, =NETARM_GEN_SW_SVC_RESETB
str r1, [r0, #+NETARM_GEN_SOFTWARE_SERVICE]
ldr r1, =NETARM_GEN_SW_SVC_RESETA
str r1, [r0, #+NETARM_GEN_SOFTWARE_SERVICE]
ldr r1, =NETARM_GEN_SW_SVC_RESETB
str r1, [r0, #+NETARM_GEN_SOFTWARE_SERVICE]
/*
* setup PLL and System Config
*/
ldr r0, =NETARM_GEN_MODULE_BASE
ldr r1, =( NETARM_GEN_SYS_CFG_LENDIAN | \
NETARM_GEN_SYS_CFG_BUSFULL | \
NETARM_GEN_SYS_CFG_USER_EN | \
NETARM_GEN_SYS_CFG_ALIGN_ABORT | \
NETARM_GEN_SYS_CFG_BUSARB_INT | \
NETARM_GEN_SYS_CFG_BUSMON_EN )
str r1, [r0, #+NETARM_GEN_SYSTEM_CONTROL]
#ifndef CONFIG_NETARM_PLL_BYPASS
ldr r1, =( NETARM_GEN_PLL_CTL_PLLCNT(NETARM_PLL_COUNT_VAL) | \
NETARM_GEN_PLL_CTL_POLTST_DEF | \
NETARM_GEN_PLL_CTL_INDIV(1) | \
NETARM_GEN_PLL_CTL_ICP_DEF | \
NETARM_GEN_PLL_CTL_OUTDIV(2) )
str r1, [r0, #+NETARM_GEN_PLL_CONTROL]
#endif
/*
* mask all IRQs by clearing all bits in the INTMRs
*/
mov r1, #0
ldr r0, =NETARM_GEN_MODULE_BASE
str r1, [r0, #+NETARM_GEN_INTR_ENABLE]
#elif defined(CONFIG_S3C4510B)
/*
* Mask off all IRQ sources
*/
ldr r1, =REG_INTMASK
ldr r0, =0x3FFFFF
str r0, [r1]
/*
* Disable Cache
*/
ldr r0, =REG_SYSCFG
ldr r1, =0x83ffffa0 /* cache-disabled */
str r1, [r0]
#elif defined(CONFIG_INTEGRATOR) && defined(CONFIG_ARCH_INTEGRATOR)
/* No specific initialisation for IntegratorAP/CM720T as yet */
#elif defined(CONFIG_LPC2292)
/* Set-up PLL */
mov r3, #0xAA
mov r4, #0x55
/* First disconnect and disable the PLL */
ldr r0, PLLCON_ADR
mov r1, #0x00
str r1, [r0]
ldr r0, PLLFEED_ADR /* start feed sequence */
str r3, [r0]
str r4, [r0] /* feed sequence done */
/* Set new M and P values */
ldr r0, PLLCFG_ADR
mov r1, #0x23 /* M=4 and P=2 */
str r1, [r0]
ldr r0, PLLFEED_ADR /* start feed sequence */
str r3, [r0]
str r4, [r0] /* feed sequence done */
/* Then enable the PLL */
ldr r0, PLLCON_ADR
mov r1, #0x01 /* PLL enable bit */
str r1, [r0]
ldr r0, PLLFEED_ADR /* start feed sequence */
str r3, [r0]
str r4, [r0] /* feed sequence done */
/* Wait for the lock */
ldr r0, PLLSTAT_ADR
mov r1, #0x400 /* lock bit */
lock_loop:
ldr r2, [r0]
and r2, r1, r2
cmp r2, #0
beq lock_loop
/* And finally connect the PLL */
ldr r0, PLLCON_ADR
mov r1, #0x03 /* PLL enable bit and connect bit */
str r1, [r0]
ldr r0, PLLFEED_ADR /* start feed sequence */
str r3, [r0]
str r4, [r0] /* feed sequence done */
/* Set-up VPBDIV register */
ldr r0, VPBDIV_ADR
mov r1, #0x01 /* VPB clock is same as process clock */
str r1, [r0]
#elif defined(CONFIG_TEGRA)
/* No cpu_init_crit for tegra as yet */
#else
#error No cpu_init_crit() defined for current CPU type
#endif
#ifdef CONFIG_ARM7_REVD
/* set clock speed */
/* !!! we run @ 36 MHz due to a hardware flaw in Rev. D processors */
/* !!! not doing DRAM refresh properly! */
ldr r0, SYSCON3
ldr r1, [r0]
bic r1, r1, #CLKCTL
orr r1, r1, #CLKCTL_36
str r1, [r0]
#endif
#if !defined(CONFIG_LPC2292) && !defined(CONFIG_TEGRA)
#if !defined(CONFIG_TEGRA)
mov ip, lr
/*
* before relocating, we have to setup RAM timing
@@ -610,39 +426,3 @@ fiq:
#endif
#endif /* CONFIG_SPL_BUILD */
#if defined(CONFIG_NETARM)
.align 5
.globl reset_cpu
reset_cpu:
ldr r1, =NETARM_MEM_MODULE_BASE
ldr r0, [r1, #+NETARM_MEM_CS0_BASE_ADDR]
ldr r1, =0xFFFFF000
and r0, r1, r0
ldr r1, =(relocate-CONFIG_SYS_TEXT_BASE)
add r0, r1, r0
ldr r4, =NETARM_GEN_MODULE_BASE
ldr r1, =NETARM_GEN_SW_SVC_RESETA
str r1, [r4, #+NETARM_GEN_SOFTWARE_SERVICE]
ldr r1, =NETARM_GEN_SW_SVC_RESETB
str r1, [r4, #+NETARM_GEN_SOFTWARE_SERVICE]
ldr r1, =NETARM_GEN_SW_SVC_RESETA
str r1, [r4, #+NETARM_GEN_SOFTWARE_SERVICE]
ldr r1, =NETARM_GEN_SW_SVC_RESETB
str r1, [r4, #+NETARM_GEN_SOFTWARE_SERVICE]
mov pc, r0
#elif defined(CONFIG_S3C4510B)
/* Nothing done here as reseting the CPU is board specific, depending
* on external peripherals such as watchdog timers, etc. */
#elif defined(CONFIG_INTEGRATOR) && defined(CONFIG_ARCH_INTEGRATOR)
/* No specific reset actions for IntegratorAP/CM720T as yet */
#elif defined(CONFIG_LPC2292)
.align 5
.globl reset_cpu
reset_cpu:
mov pc, r0
#elif defined(CONFIG_TEGRA)
/* No specific reset actions for tegra as yet */
#else
#error No reset_cpu() defined for current CPU type
#endif

View File

@@ -0,0 +1,47 @@
#
# (C) Copyright 2010,2011 Nvidia Corporation.
#
# (C) Copyright 2000-2008
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
include $(TOPDIR)/config.mk
LIB = $(obj)libtegra-common.o
COBJS-$(CONFIG_SPL_BUILD) += spl.o
SRCS := $(COBJS-y:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS-y))
all: $(obj).depend $(LIB)
$(LIB): $(OBJS)
$(call cmd_link_o_target, $(OBJS))
#########################################################################
# defines $(obj).depend target
include $(SRCTREE)/rules.mk
sinclude $(obj).depend
#########################################################################

View File

@@ -0,0 +1,64 @@
/*
* (C) Copyright 2012
* NVIDIA Inc, <www.nvidia.com>
*
* Allen Martin <amartin@nvidia.com>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#include "cpu.h"
#include <spl.h>
#include <asm/io.h>
#include <asm/arch/clock.h>
#include <asm/arch/pinmux.h>
#include <asm/arch/tegra.h>
#include <asm/arch-tegra/board.h>
#include <asm/arch/spl.h>
void spl_board_init(void)
{
struct pmux_tri_ctlr *pmt = (struct pmux_tri_ctlr *)NV_PA_APB_MISC_BASE;
/* enable JTAG */
writel(0xC0, &pmt->pmt_cfg_ctl);
board_init_uart_f();
/* Initialize periph GPIOs */
gpio_early_init_uart();
clock_early_init();
preloader_console_init();
}
u32 spl_boot_device(void)
{
return BOOT_DEVICE_RAM;
}
void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image)
{
debug("image entry point: 0x%X\n", spl_image->entry_point);
start_cpu((u32)spl_image->entry_point);
halt_avp();
}

View File

@@ -28,7 +28,6 @@ include $(TOPDIR)/config.mk
LIB = $(obj)lib$(SOC).o
COBJS-y += cpu.o
COBJS-$(CONFIG_SPL_BUILD) += spl.o
SRCS := $(COBJS-y:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS-y))

View File

@@ -21,15 +21,15 @@
* MA 02111-1307 USA
*/
#include <asm/io.h>
#include <asm/arch/tegra20.h>
#include <asm/arch/clk_rst.h>
#include <asm/arch/clock.h>
#include <asm/arch/pmc.h>
#include <asm/arch/pinmux.h>
#include <asm/arch/scu.h>
#include <common.h>
#include "cpu.h"
#include <asm/io.h>
#include <asm/arch/clock.h>
#include <asm/arch/pinmux.h>
#include <asm/arch/tegra.h>
#include <asm/arch-tegra/clk_rst.h>
#include <asm/arch-tegra/pmc.h>
#include <asm/arch-tegra/scu.h>
#include "../tegra-common/cpu.h"
/* Returns 1 if the current CPU executing is a Cortex-A9, else 0 */
int ap20_cpu_is_cortexa9(void)

View File

@@ -1,133 +0,0 @@
/*
* (C) Copyright 2012
* NVIDIA Inc, <www.nvidia.com>
*
* Allen Martin <amartin@nvidia.com>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#include <asm/u-boot.h>
#include <asm/utils.h>
#include <asm/arch/sys_proto.h>
#include <asm/arch/clock.h>
#include <nand.h>
#include <mmc.h>
#include <fat.h>
#include <version.h>
#include <i2c.h>
#include <image.h>
#include <malloc.h>
#include <linux/compiler.h>
#include "board.h"
#include "cpu.h"
#include <asm/io.h>
#include <asm/arch/tegra20.h>
#include <asm/arch/clk_rst.h>
#include <asm/arch/clock.h>
#include <asm/arch/pmc.h>
#include <asm/arch/pinmux.h>
#include <asm/arch/scu.h>
#include <common.h>
DECLARE_GLOBAL_DATA_PTR;
/* Define global data structure pointer to it*/
static gd_t gdata __attribute__ ((section(".data")));
static bd_t bdata __attribute__ ((section(".data")));
inline void hang(void)
{
puts("### ERROR ### Please RESET the board ###\n");
for (;;)
;
}
void board_init_f(ulong dummy)
{
board_init_uart_f();
/* Initialize periph GPIOs */
#ifdef CONFIG_SPI_UART_SWITCH
gpio_early_init_uart();
#else
gpio_config_uart();
#endif
/*
* We call relocate_code() with relocation target same as the
* CONFIG_SYS_SPL_TEXT_BASE. This will result in relocation getting
* skipped. Instead, only .bss initialization will happen. That's
* all we need
*/
debug(">>board_init_f()\n");
relocate_code(CONFIG_SPL_STACK, &gdata, CONFIG_SPL_TEXT_BASE);
}
/* This requires UART clocks to be enabled */
static void preloader_console_init(void)
{
const char *u_boot_rev = U_BOOT_VERSION;
gd = &gdata;
gd->bd = &bdata;
gd->flags |= GD_FLG_RELOC;
gd->baudrate = CONFIG_BAUDRATE;
serial_init(); /* serial communications setup */
gd->have_console = 1;
/* Avoid a second "U-Boot" coming from this string */
u_boot_rev = &u_boot_rev[7];
printf("\nU-Boot SPL %s (%s - %s)\n", u_boot_rev, U_BOOT_DATE,
U_BOOT_TIME);
}
void board_init_r(gd_t *id, ulong dummy)
{
struct pmux_tri_ctlr *pmt = (struct pmux_tri_ctlr *)NV_PA_APB_MISC_BASE;
/* enable JTAG */
writel(0xC0, &pmt->pmt_cfg_ctl);
debug(">>spl:board_init_r()\n");
mem_malloc_init(CONFIG_SYS_SPL_MALLOC_START,
CONFIG_SYS_SPL_MALLOC_SIZE);
#ifdef CONFIG_SPL_BOARD_INIT
spl_board_init();
#endif
clock_early_init();
serial_init();
preloader_console_init();
start_cpu((u32)CONFIG_SYS_TEXT_BASE);
halt_avp();
/* not reached */
}
int board_usb_init(const void *blob)
{
return 0;
}

View File

@@ -48,9 +48,11 @@ SECTIONS
.got : { *(.got) }
. = .;
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
. = ALIGN(4);
.u_boot_list : {
#include <u-boot.lst>
}
. = ALIGN(4);
__bss_start = .;

View File

@@ -72,10 +72,10 @@ lowlevel_init:
* enable UART for early debug trace
*/
ldr r1, =(KS8695_IO_BASE+KS8695_UART_DIVISOR)
mov r2, #0xd9
str r2, [r1] /* 115200 baud */
mov r2, #((25000000+CONFIG_BAUDRATE/2) / CONFIG_BAUDRATE)
str r2, [r1]
ldr r1, =(KS8695_IO_BASE+KS8695_UART_LINE_CTRL)
mov r2, #0x03
mov r2, #KS8695_UART_LINEC_WLEN8
str r2, [r1] /* 8 data bits, no parity, 1 stop */
ldr r1, =(KS8695_IO_BASE+KS8695_UART_TX_HOLDING)
mov r2, #0x41

View File

@@ -29,9 +29,6 @@ COBJS-$(CONFIG_USE_IRQ) += interrupts.o
COBJS-$(CONFIG_DISPLAY_CPUINFO) += cpu_info.o
COBJS-y += speed.o
COBJS-y += timer.o
COBJS-y += usb.o
COBJS-y += usb_ohci.o
SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS-y))

View File

@@ -1,71 +0,0 @@
/*
* (C) Copyright 2006
* DENX Software Engineering <mk@denx.de>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#if defined(CONFIG_USB_OHCI_NEW) && \
defined(CONFIG_SYS_USB_OHCI_CPU_INIT) && \
defined(CONFIG_S3C24X0)
#include <asm/arch/s3c24x0_cpu.h>
#include <asm/io.h>
int usb_cpu_init(void)
{
struct s3c24x0_clock_power *clk_power = s3c24x0_get_base_clock_power();
struct s3c24x0_gpio *gpio = s3c24x0_get_base_gpio();
/*
* Set the 48 MHz UPLL clocking. Values are taken from
* "PLL value selection guide", 6-23, s3c2400_UM.pdf.
*/
writel((40 << 12) + (1 << 4) + 2, &clk_power->upllcon);
/* 1 = use pads related USB for USB host */
writel(readl(&gpio->misccr) | 0x8, &gpio->misccr);
/*
* Enable USB host clock.
*/
writel(readl(&clk_power->clkcon) | (1 << 4), &clk_power->clkcon);
return 0;
}
int usb_cpu_stop(void)
{
struct s3c24x0_clock_power *clk_power = s3c24x0_get_base_clock_power();
/* may not want to do this */
writel(readl(&clk_power->clkcon) & ~(1 << 4), &clk_power->clkcon);
return 0;
}
int usb_cpu_init_fail(void)
{
struct s3c24x0_clock_power *clk_power = s3c24x0_get_base_clock_power();
writel(readl(&clk_power->clkcon) & ~(1 << 4), &clk_power->clkcon);
return 0;
}
#endif /* defined(CONFIG_USB_OHCI_NEW) && \
defined(CONFIG_SYS_USB_OHCI_CPU_INIT) && \
defined(CONFIG_S3C24X0) */

View File

@@ -182,12 +182,7 @@ copyex:
bl cpu_init_crit
#endif
/* Set stackpointer in internal RAM to call board_init_f */
call_board_init_f:
ldr sp, =(CONFIG_SYS_INIT_SP_ADDR)
bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
ldr r0,=0x00000000
bl board_init_f
bl _main
/*------------------------------------------------------------------------------*/
@@ -204,14 +199,10 @@ relocate_code:
mov r5, r1 /* save addr of gd */
mov r6, r2 /* save addr of destination */
/* Set up the stack */
stack_setup:
mov sp, r4
adr r0, _start
cmp r0, r6
moveq r9, #0 /* no relocation. relocation offset(r9) = 0 */
beq clear_bss /* skip relocation */
beq relocate_done /* skip relocation */
mov r1, r6 /* r1 <- scratch for copy_loop */
ldr r3, _bss_start_ofs
add r2, r0, r3 /* r2 <- source end address */
@@ -263,51 +254,10 @@ fixnext:
blo fixloop
#endif
clear_bss:
#ifndef CONFIG_SPL_BUILD
ldr r0, _bss_start_ofs
ldr r1, _bss_end_ofs
mov r4, r6 /* reloc addr */
add r0, r0, r4
add r1, r1, r4
mov r2, #0x00000000 /* clear */
relocate_done:
clbss_l:cmp r0, r1 /* clear loop... */
bhs clbss_e /* if reached end of bss, exit */
str r2, [r0]
add r0, r0, #4
b clbss_l
clbss_e:
bl coloured_LED_init
bl red_led_on
#endif
/*
* We are done. Do not return, instead branch to second part of board
* initialization, now running from RAM.
*/
#ifdef CONFIG_NAND_SPL
ldr r0, _nand_boot_ofs
mov pc, r0
_nand_boot_ofs:
.word nand_boot
#else
ldr r0, _board_init_r_ofs
adr r1, _start
add lr, r0, r1
add lr, lr, r9
/* setup parameters for board_init_r */
mov r0, r5 /* gd_t */
mov r1, r6 /* dest_addr */
/* jump to it ... */
mov pc, lr
_board_init_r_ofs:
.word board_init_r - _start
#endif
_rel_dyn_start_ofs:
.word __rel_dyn_start - _start
_rel_dyn_end_ofs:
@@ -315,6 +265,11 @@ _rel_dyn_end_ofs:
_dynsym_start_ofs:
.word __dynsym_start - _start
.globl c_runtime_cpu_setup
c_runtime_cpu_setup:
mov pc, lr
/*
*************************************************************************
*

View File

@@ -34,10 +34,6 @@
#include <config.h>
#include <version.h>
#if defined(CONFIG_OMAP1510)
#include <./configs/omap1510.h>
#endif
/*
*************************************************************************
*
@@ -176,12 +172,7 @@ poll1:
bl cpu_init_crit
#endif
/* Set stackpointer in internal RAM to call board_init_f */
call_board_init_f:
ldr sp, =(CONFIG_SYS_INIT_SP_ADDR)
bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
ldr r0,=0x00000000
bl board_init_f
bl _main
/*------------------------------------------------------------------------------*/
@@ -198,14 +189,10 @@ relocate_code:
mov r5, r1 /* save addr of gd */
mov r6, r2 /* save addr of destination */
/* Set up the stack */
stack_setup:
mov sp, r4
adr r0, _start
cmp r0, r6
moveq r9, #0 /* no relocation. relocation offset(r9) = 0 */
beq clear_bss /* skip relocation */
beq relocate_done /* skip relocation */
mov r1, r6 /* r1 <- scratch for copy_loop */
ldr r3, _bss_start_ofs
add r2, r0, r3 /* r2 <- source end address */
@@ -257,51 +244,10 @@ fixnext:
blo fixloop
#endif
clear_bss:
#ifndef CONFIG_SPL_BUILD
ldr r0, _bss_start_ofs
ldr r1, _bss_end_ofs
mov r4, r6 /* reloc addr */
add r0, r0, r4
add r1, r1, r4
mov r2, #0x00000000 /* clear */
relocate_done:
clbss_l:cmp r0, r1 /* clear loop... */
bhs clbss_e /* if reached end of bss, exit */
str r2, [r0]
add r0, r0, #4
b clbss_l
clbss_e:
bl coloured_LED_init
bl red_led_on
#endif
/*
* We are done. Do not return, instead branch to second part of board
* initialization, now running from RAM.
*/
#ifdef CONFIG_NAND_SPL
ldr r0, _nand_boot_ofs
mov pc, r0
_nand_boot_ofs:
.word nand_boot
#else
ldr r0, _board_init_r_ofs
adr r1, _start
add lr, r0, r1
add lr, lr, r9
/* setup parameters for board_init_r */
mov r0, r5 /* gd_t */
mov r1, r6 /* dest_addr */
/* jump to it ... */
mov pc, lr
_board_init_r_ofs:
.word board_init_r - _start
#endif
_rel_dyn_start_ofs:
.word __rel_dyn_start - _start
_rel_dyn_end_ofs:
@@ -309,6 +255,11 @@ _rel_dyn_end_ofs:
_dynsym_start_ofs:
.word __dynsym_start - _start
.globl c_runtime_cpu_setup
c_runtime_cpu_setup:
mov pc, lr
/*
*************************************************************************
*

View File

@@ -118,6 +118,21 @@ void at91_serial2_hw_init(void)
writel(1 << ATMEL_ID_USART2, &pmc->pcer);
}
void at91_mci_hw_init(void)
{
/* Initialize the MCI0 */
at91_set_a_periph(AT91_PIO_PORTA, 17, 1); /* MCCK */
at91_set_a_periph(AT91_PIO_PORTA, 16, 1); /* MCCDA */
at91_set_a_periph(AT91_PIO_PORTA, 15, 1); /* MCDA0 */
at91_set_a_periph(AT91_PIO_PORTA, 18, 1); /* MCDA1 */
at91_set_a_periph(AT91_PIO_PORTA, 19, 1); /* MCDA2 */
at91_set_a_periph(AT91_PIO_PORTA, 20, 1); /* MCDA3 */
/* Enable clock for MCI0 */
struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
writel(1 << ATMEL_ID_HSMCI0, &pmc->pcer);
}
#ifdef CONFIG_ATMEL_SPI
void at91_spi0_hw_init(unsigned long cs_mask)
{
@@ -178,6 +193,19 @@ void at91_spi1_hw_init(unsigned long cs_mask)
}
#endif
#if defined(CONFIG_USB_OHCI_NEW) || defined(CONFIG_USB_EHCI)
void at91_uhp_hw_init(void)
{
/* Enable VBus on UHP ports */
at91_set_pio_output(AT91_PIO_PORTD, 18, 0); /* port A */
at91_set_pio_output(AT91_PIO_PORTD, 19, 0); /* port B */
#if defined(CONFIG_USB_OHCI_NEW)
/* port C is OHCI only */
at91_set_pio_output(AT91_PIO_PORTD, 20, 0); /* port C */
#endif
}
#endif
#ifdef CONFIG_MACB
void at91_macb_hw_init(void)
{

View File

@@ -16,7 +16,7 @@
void reset_cpu(unsigned long a)
{
struct davinci_timer *const wdttimer =
(struct davinci_timer *)DAVINCI_TIMER1_BASE;
(struct davinci_timer *)DAVINCI_WDOG_BASE;
writel(0x08, &wdttimer->tgcr);
writel(readl(&wdttimer->tgcr) | 0x03, &wdttimer->tgcr);
writel(0, &wdttimer->tim12);

View File

@@ -31,7 +31,7 @@ static u32 kirkwood_variant(void)
#define MPP_CTRL(i) (KW_MPP_BASE + (i* 4))
#define MPP_NR_REGS (1 + MPP_MAX/8)
void kirkwood_mpp_conf(u32 *mpp_list, u32 *mpp_save)
void kirkwood_mpp_conf(const u32 *mpp_list, u32 *mpp_save)
{
u32 mpp_ctrl[MPP_NR_REGS];
unsigned int variant_mask;

View File

@@ -29,11 +29,10 @@
#include <asm/arch/imx-regs.h>
#include <asm/arch/imx25-pinmux.h>
#include <asm/arch/clock.h>
#ifdef CONFIG_MXC_MMC
#include <asm/arch/mxcmmc.h>
#endif
#ifdef CONFIG_FSL_ESDHC
#include <fsl_esdhc.h>
DECLARE_GLOBAL_DATA_PTR;
#endif
@@ -48,7 +47,7 @@ static unsigned int imx_decode_pll(unsigned int pll, unsigned int f_ref)
{
unsigned int mfi = (pll >> CCM_PLL_MFI_SHIFT)
& CCM_PLL_MFI_MASK;
unsigned int mfn = (pll >> CCM_PLL_MFN_SHIFT)
int mfn = (pll >> CCM_PLL_MFN_SHIFT)
& CCM_PLL_MFN_MASK;
unsigned int mfd = (pll >> CCM_PLL_MFD_SHIFT)
& CCM_PLL_MFD_MASK;
@@ -56,9 +55,12 @@ static unsigned int imx_decode_pll(unsigned int pll, unsigned int f_ref)
& CCM_PLL_PD_MASK;
mfi = mfi <= 5 ? 5 : mfi;
mfn = mfn >= 512 ? mfn - 1024 : mfn;
mfd += 1;
pd += 1;
return lldiv(2 * (u64) f_ref * (mfi * (mfd + 1) + mfn),
(mfd + 1) * (pd + 1));
return lldiv(2 * (u64) f_ref * (mfi * mfd + mfn),
mfd * pd);
}
static ulong imx_get_mpllclk(void)
@@ -69,7 +71,7 @@ static ulong imx_get_mpllclk(void)
return imx_decode_pll(readl(&ccm->mpctl), fref);
}
ulong imx_get_armclk(void)
static ulong imx_get_armclk(void)
{
struct ccm_regs *ccm = (struct ccm_regs *)IMX_CCM_BASE;
ulong cctl = readl(&ccm->cctl);
@@ -77,15 +79,15 @@ ulong imx_get_armclk(void)
ulong div;
if (cctl & CCM_CCTL_ARM_SRC)
fref = lldiv((fref * 3), 4);
fref = lldiv((u64) fref * 3, 4);
div = ((cctl >> CCM_CCTL_ARM_DIV_SHIFT)
& CCM_CCTL_ARM_DIV_MASK) + 1;
return lldiv(fref, div);
return fref / div;
}
ulong imx_get_ahbclk(void)
static ulong imx_get_ahbclk(void)
{
struct ccm_regs *ccm = (struct ccm_regs *)IMX_CCM_BASE;
ulong cctl = readl(&ccm->cctl);
@@ -95,10 +97,15 @@ ulong imx_get_ahbclk(void)
div = ((cctl >> CCM_CCTL_AHB_DIV_SHIFT)
& CCM_CCTL_AHB_DIV_MASK) + 1;
return lldiv(fref, div);
return fref / div;
}
ulong imx_get_perclk(int clk)
static ulong imx_get_ipgclk(void)
{
return imx_get_ahbclk() / 2;
}
static ulong imx_get_perclk(int clk)
{
struct ccm_regs *ccm = (struct ccm_regs *)IMX_CCM_BASE;
ulong fref = imx_get_ahbclk();
@@ -107,7 +114,7 @@ ulong imx_get_perclk(int clk)
div = readl(&ccm->pcdr[CCM_PERCLK_REG(clk)]);
div = ((div >> CCM_PERCLK_SHIFT(clk)) & CCM_PERCLK_MASK) + 1;
return lldiv(fref, div);
return fref / div;
}
unsigned int mxc_get_clock(enum mxc_clock clk)
@@ -117,8 +124,12 @@ unsigned int mxc_get_clock(enum mxc_clock clk)
switch (clk) {
case MXC_ARM_CLK:
return imx_get_armclk();
case MXC_FEC_CLK:
case MXC_AHB_CLK:
return imx_get_ahbclk();
case MXC_IPG_CLK:
case MXC_CSPI_CLK:
case MXC_FEC_CLK:
return imx_get_ipgclk();
default:
return imx_get_perclk(clk);
}
@@ -140,6 +151,9 @@ u32 get_cpu_rev(void)
case 0x01:
system_rev |= CHIP_REV_1_1;
break;
case 0x02:
system_rev |= CHIP_REV_1_2;
break;
default:
system_rev |= 0x8000;
break;
@@ -194,9 +208,13 @@ void enable_caches(void)
#endif
}
#if defined(CONFIG_FEC_MXC)
/*
* Initializes on-chip ethernet controllers.
* to override, implement board_eth_init()
*/
int cpu_eth_init(bd_t *bis)
{
#if defined(CONFIG_FEC_MXC)
struct ccm_regs *ccm = (struct ccm_regs *)IMX_CCM_BASE;
ulong val;
@@ -204,31 +222,31 @@ int cpu_eth_init(bd_t *bis)
val |= (1 << 23);
writel(val, &ccm->cgr0);
return fecmxc_initialize(bis);
#else
return 0;
#endif
}
#endif
int get_clocks(void)
{
#ifdef CONFIG_FSL_ESDHC
gd->sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
#if CONFIG_SYS_FSL_ESDHC_ADDR == IMX_MMC_SDHC2_BASE
gd->sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
#else
gd->sdhc_clk = mxc_get_clock(MXC_ESDHC1_CLK);
#endif
#endif
return 0;
}
#ifdef CONFIG_FSL_ESDHC
/*
* Initializes on-chip MMC controllers.
* to override, implement board_mmc_init()
*/
int cpu_mmc_init(bd_t *bis)
{
#ifdef CONFIG_MXC_MMC
return mxc_mmc_init(bis);
#else
return 0;
#endif
return fsl_esdhc_mmc_init(bis);
}
#endif
#ifdef CONFIG_MXC_UART
void mx25_uart1_init_pins(void)

View File

@@ -333,6 +333,8 @@ uint32_t mxc_get_clock(enum mxc_clock clk)
return mx28_get_sspclk(MXC_SSPCLK2);
case MXC_SSP3_CLK:
return mx28_get_sspclk(MXC_SSPCLK3);
case MXC_XTAL_CLK:
return XTAL_FREQ_KHZ * 1000;
}
return 0;

View File

@@ -50,7 +50,7 @@ void early_delay(int delay)
}
#define MUX_CONFIG_BOOTMODE_PAD (MXS_PAD_3V3 | MXS_PAD_4MA | MXS_PAD_NOPULL)
const iomux_cfg_t iomux_boot[] = {
static const iomux_cfg_t iomux_boot[] = {
MX28_PAD_LCD_D00__GPIO_1_0 | MUX_CONFIG_BOOTMODE_PAD,
MX28_PAD_LCD_D01__GPIO_1_1 | MUX_CONFIG_BOOTMODE_PAD,
MX28_PAD_LCD_D02__GPIO_1_2 | MUX_CONFIG_BOOTMODE_PAD,
@@ -59,7 +59,7 @@ const iomux_cfg_t iomux_boot[] = {
MX28_PAD_LCD_D05__GPIO_1_5 | MUX_CONFIG_BOOTMODE_PAD,
};
uint8_t mxs_get_bootmode_index(void)
static uint8_t mxs_get_bootmode_index(void)
{
uint8_t bootmode = 0;
int i;
@@ -124,10 +124,6 @@ inline void board_init_r(gd_t *id, ulong dest_addr)
;
}
#ifndef CONFIG_SPL_SERIAL_SUPPORT
void serial_putc(const char c) {}
void serial_puts(const char *s) {}
#endif
void hang(void) __attribute__ ((noreturn));
void hang(void)
{

View File

@@ -30,7 +30,11 @@
#include "mxs_init.h"
static uint32_t mx28_dram_vals[] = {
static uint32_t dram_vals[] = {
/*
* i.MX28 DDR2 at 200MHz
*/
#if defined(CONFIG_MX28)
0x00000000, 0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000, 0x00000000,
@@ -79,6 +83,9 @@ static uint32_t mx28_dram_vals[] = {
0x06120612, 0x04320432, 0x04320432, 0x00040004,
0x00040004, 0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00010001
#else
#error Unsupported memory initialization
#endif
};
void __mxs_adjust_memory_params(uint32_t *dram_vals)
@@ -87,17 +94,17 @@ void __mxs_adjust_memory_params(uint32_t *dram_vals)
void mxs_adjust_memory_params(uint32_t *dram_vals)
__attribute__((weak, alias("__mxs_adjust_memory_params")));
void init_mx28_200mhz_ddr2(void)
static void initialize_dram_values(void)
{
int i;
mxs_adjust_memory_params(mx28_dram_vals);
mxs_adjust_memory_params(dram_vals);
for (i = 0; i < ARRAY_SIZE(mx28_dram_vals); i++)
writel(mx28_dram_vals[i], MXS_DRAM_BASE + (4 * i));
for (i = 0; i < ARRAY_SIZE(dram_vals); i++)
writel(dram_vals[i], MXS_DRAM_BASE + (4 * i));
}
void mxs_mem_init_clock(void)
static void mxs_mem_init_clock(void)
{
struct mxs_clkctrl_regs *clkctrl_regs =
(struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE;
@@ -128,7 +135,7 @@ void mxs_mem_init_clock(void)
early_delay(10000);
}
void mxs_mem_setup_cpu_and_hbus(void)
static void mxs_mem_setup_cpu_and_hbus(void)
{
struct mxs_clkctrl_regs *clkctrl_regs =
(struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE;
@@ -160,7 +167,7 @@ void mxs_mem_setup_cpu_and_hbus(void)
early_delay(15000);
}
void mxs_mem_setup_vdda(void)
static void mxs_mem_setup_vdda(void)
{
struct mxs_power_regs *power_regs =
(struct mxs_power_regs *)MXS_POWER_BASE;
@@ -171,17 +178,6 @@ void mxs_mem_setup_vdda(void)
&power_regs->hw_power_vddactrl);
}
void mxs_mem_setup_vddd(void)
{
struct mxs_power_regs *power_regs =
(struct mxs_power_regs *)MXS_POWER_BASE;
writel((0x1c << POWER_VDDDCTRL_TRG_OFFSET) |
(0x7 << POWER_VDDDCTRL_BO_OFFSET_OFFSET) |
POWER_VDDDCTRL_LINREG_OFFSET_1STEPS_BELOW,
&power_regs->hw_power_vdddctrl);
}
uint32_t mxs_mem_get_size(void)
{
uint32_t sz, da;
@@ -229,7 +225,7 @@ void mxs_mem_init(void)
/* Clear START bit from DRAM_CTL16 */
clrbits_le32(MXS_DRAM_BASE + 0x40, 1);
init_mx28_200mhz_ddr2();
initialize_dram_values();
/* Clear SREFRESH bit from DRAM_CTL17 */
clrbits_le32(MXS_DRAM_BASE + 0x44, 1);
@@ -241,8 +237,6 @@ void mxs_mem_init(void)
while (!(readl(MXS_DRAM_BASE + 0xe8) & (1 << 20)))
;
mxs_mem_setup_vddd();
early_delay(10000);
mxs_mem_setup_cpu_and_hbus();

View File

@@ -30,7 +30,7 @@
#include "mxs_init.h"
void mxs_power_clock2xtal(void)
static void mxs_power_clock2xtal(void)
{
struct mxs_clkctrl_regs *clkctrl_regs =
(struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE;
@@ -40,7 +40,7 @@ void mxs_power_clock2xtal(void)
&clkctrl_regs->hw_clkctrl_clkseq_set);
}
void mxs_power_clock2pll(void)
static void mxs_power_clock2pll(void)
{
struct mxs_clkctrl_regs *clkctrl_regs =
(struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE;
@@ -52,7 +52,7 @@ void mxs_power_clock2pll(void)
CLKCTRL_CLKSEQ_BYPASS_CPU);
}
void mxs_power_clear_auto_restart(void)
static void mxs_power_clear_auto_restart(void)
{
struct mxs_rtc_regs *rtc_regs =
(struct mxs_rtc_regs *)MXS_RTC_BASE;
@@ -85,7 +85,7 @@ void mxs_power_clear_auto_restart(void)
;
}
void mxs_power_set_linreg(void)
static void mxs_power_set_linreg(void)
{
struct mxs_power_regs *power_regs =
(struct mxs_power_regs *)MXS_POWER_BASE;
@@ -104,7 +104,7 @@ void mxs_power_set_linreg(void)
POWER_VDDIOCTRL_LINREG_OFFSET_1STEPS_BELOW);
}
int mxs_get_batt_volt(void)
static int mxs_get_batt_volt(void)
{
struct mxs_power_regs *power_regs =
(struct mxs_power_regs *)MXS_POWER_BASE;
@@ -115,12 +115,12 @@ int mxs_get_batt_volt(void)
return volt;
}
int mxs_is_batt_ready(void)
static int mxs_is_batt_ready(void)
{
return (mxs_get_batt_volt() >= 3600);
}
int mxs_is_batt_good(void)
static int mxs_is_batt_good(void)
{
struct mxs_power_regs *power_regs =
(struct mxs_power_regs *)MXS_POWER_BASE;
@@ -160,7 +160,7 @@ int mxs_is_batt_good(void)
return 0;
}
void mxs_power_setup_5v_detect(void)
static void mxs_power_setup_5v_detect(void)
{
struct mxs_power_regs *power_regs =
(struct mxs_power_regs *)MXS_POWER_BASE;
@@ -172,7 +172,7 @@ void mxs_power_setup_5v_detect(void)
POWER_5VCTRL_PWRUP_VBUS_CMPS);
}
void mxs_src_power_init(void)
static void mxs_src_power_init(void)
{
struct mxs_power_regs *power_regs =
(struct mxs_power_regs *)MXS_POWER_BASE;
@@ -203,7 +203,7 @@ void mxs_src_power_init(void)
clrbits_le32(&power_regs->hw_power_5vctrl, POWER_5VCTRL_DCDC_XFER);
}
void mxs_power_init_4p2_params(void)
static void mxs_power_init_4p2_params(void)
{
struct mxs_power_regs *power_regs =
(struct mxs_power_regs *)MXS_POWER_BASE;
@@ -227,7 +227,7 @@ void mxs_power_init_4p2_params(void)
0x3f << POWER_5VCTRL_CHARGE_4P2_ILIMIT_OFFSET);
}
void mxs_enable_4p2_dcdc_input(int xfer)
static void mxs_enable_4p2_dcdc_input(int xfer)
{
struct mxs_power_regs *power_regs =
(struct mxs_power_regs *)MXS_POWER_BASE;
@@ -323,7 +323,7 @@ void mxs_enable_4p2_dcdc_input(int xfer)
POWER_CTRL_ENIRQ_VDD5V_DROOP);
}
void mxs_power_init_4p2_regulator(void)
static void mxs_power_init_4p2_regulator(void)
{
struct mxs_power_regs *power_regs =
(struct mxs_power_regs *)MXS_POWER_BASE;
@@ -407,7 +407,7 @@ void mxs_power_init_4p2_regulator(void)
writel(POWER_CTRL_DCDC4P2_BO_IRQ, &power_regs->hw_power_ctrl_clr);
}
void mxs_power_init_dcdc_4p2_source(void)
static void mxs_power_init_dcdc_4p2_source(void)
{
struct mxs_power_regs *power_regs =
(struct mxs_power_regs *)MXS_POWER_BASE;
@@ -429,7 +429,7 @@ void mxs_power_init_dcdc_4p2_source(void)
}
}
void mxs_power_enable_4p2(void)
static void mxs_power_enable_4p2(void)
{
struct mxs_power_regs *power_regs =
(struct mxs_power_regs *)MXS_POWER_BASE;
@@ -488,7 +488,7 @@ void mxs_power_enable_4p2(void)
&power_regs->hw_power_charge_clr);
}
void mxs_boot_valid_5v(void)
static void mxs_boot_valid_5v(void)
{
struct mxs_power_regs *power_regs =
(struct mxs_power_regs *)MXS_POWER_BASE;
@@ -511,7 +511,7 @@ void mxs_boot_valid_5v(void)
mxs_power_enable_4p2();
}
void mxs_powerdown(void)
static void mxs_powerdown(void)
{
struct mxs_power_regs *power_regs =
(struct mxs_power_regs *)MXS_POWER_BASE;
@@ -520,7 +520,7 @@ void mxs_powerdown(void)
&power_regs->hw_power_reset);
}
void mxs_batt_boot(void)
static void mxs_batt_boot(void)
{
struct mxs_power_regs *power_regs =
(struct mxs_power_regs *)MXS_POWER_BASE;
@@ -564,7 +564,7 @@ void mxs_batt_boot(void)
0x8 << POWER_5VCTRL_CHARGE_4P2_ILIMIT_OFFSET);
}
void mxs_handle_5v_conflict(void)
static void mxs_handle_5v_conflict(void)
{
struct mxs_power_regs *power_regs =
(struct mxs_power_regs *)MXS_POWER_BASE;
@@ -600,7 +600,7 @@ void mxs_handle_5v_conflict(void)
}
}
void mxs_5v_boot(void)
static void mxs_5v_boot(void)
{
struct mxs_power_regs *power_regs =
(struct mxs_power_regs *)MXS_POWER_BASE;
@@ -623,7 +623,7 @@ void mxs_5v_boot(void)
mxs_handle_5v_conflict();
}
void mxs_init_batt_bo(void)
static void mxs_init_batt_bo(void)
{
struct mxs_power_regs *power_regs =
(struct mxs_power_regs *)MXS_POWER_BASE;
@@ -637,7 +637,7 @@ void mxs_init_batt_bo(void)
writel(POWER_CTRL_ENIRQ_BATT_BO, &power_regs->hw_power_ctrl_clr);
}
void mxs_switch_vddd_to_dcdc_source(void)
static void mxs_switch_vddd_to_dcdc_source(void)
{
struct mxs_power_regs *power_regs =
(struct mxs_power_regs *)MXS_POWER_BASE;
@@ -651,7 +651,7 @@ void mxs_switch_vddd_to_dcdc_source(void)
POWER_VDDDCTRL_DISABLE_STEPPING);
}
void mxs_power_configure_power_source(void)
static void mxs_power_configure_power_source(void)
{
int batt_ready, batt_good;
struct mxs_power_regs *power_regs =
@@ -689,7 +689,7 @@ void mxs_power_configure_power_source(void)
mxs_switch_vddd_to_dcdc_source();
}
void mxs_enable_output_rail_protection(void)
static void mxs_enable_output_rail_protection(void)
{
struct mxs_power_regs *power_regs =
(struct mxs_power_regs *)MXS_POWER_BASE;
@@ -707,7 +707,7 @@ void mxs_enable_output_rail_protection(void)
POWER_VDDIOCTRL_PWDN_BRNOUT);
}
int mxs_get_vddio_power_source_off(void)
static int mxs_get_vddio_power_source_off(void)
{
struct mxs_power_regs *power_regs =
(struct mxs_power_regs *)MXS_POWER_BASE;
@@ -735,7 +735,7 @@ int mxs_get_vddio_power_source_off(void)
}
int mxs_get_vddd_power_source_off(void)
static int mxs_get_vddd_power_source_off(void)
{
struct mxs_power_regs *power_regs =
(struct mxs_power_regs *)MXS_POWER_BASE;
@@ -766,201 +766,115 @@ int mxs_get_vddd_power_source_off(void)
return 0;
}
void mxs_power_set_vddio(uint32_t new_target, uint32_t new_brownout)
struct mxs_vddx_cfg {
uint32_t *reg;
uint8_t step_mV;
uint16_t lowest_mV;
int (*powered_by_linreg)(void);
uint32_t trg_mask;
uint32_t bo_irq;
uint32_t bo_enirq;
uint32_t bo_offset_mask;
uint32_t bo_offset_offset;
};
static const struct mxs_vddx_cfg mxs_vddio_cfg = {
.reg = &(((struct mxs_power_regs *)MXS_POWER_BASE)->
hw_power_vddioctrl),
.step_mV = 50,
.lowest_mV = 2800,
.powered_by_linreg = mxs_get_vddio_power_source_off,
.trg_mask = POWER_VDDIOCTRL_TRG_MASK,
.bo_irq = POWER_CTRL_VDDIO_BO_IRQ,
.bo_enirq = POWER_CTRL_ENIRQ_VDDIO_BO,
.bo_offset_mask = POWER_VDDIOCTRL_BO_OFFSET_MASK,
.bo_offset_offset = POWER_VDDIOCTRL_BO_OFFSET_OFFSET,
};
static const struct mxs_vddx_cfg mxs_vddd_cfg = {
.reg = &(((struct mxs_power_regs *)MXS_POWER_BASE)->
hw_power_vdddctrl),
.step_mV = 25,
.lowest_mV = 800,
.powered_by_linreg = mxs_get_vddd_power_source_off,
.trg_mask = POWER_VDDDCTRL_TRG_MASK,
.bo_irq = POWER_CTRL_VDDD_BO_IRQ,
.bo_enirq = POWER_CTRL_ENIRQ_VDDD_BO,
.bo_offset_mask = POWER_VDDDCTRL_BO_OFFSET_MASK,
.bo_offset_offset = POWER_VDDDCTRL_BO_OFFSET_OFFSET,
};
static void mxs_power_set_vddx(const struct mxs_vddx_cfg *cfg,
uint32_t new_target, uint32_t new_brownout)
{
struct mxs_power_regs *power_regs =
(struct mxs_power_regs *)MXS_POWER_BASE;
uint32_t cur_target, diff, bo_int = 0;
uint32_t powered_by_linreg = 0;
int adjust_up, tmp;
new_brownout = (new_target - new_brownout + 25) / 50;
new_brownout = DIV_ROUND(new_target - new_brownout, cfg->step_mV);
cur_target = readl(&power_regs->hw_power_vddioctrl);
cur_target &= POWER_VDDIOCTRL_TRG_MASK;
cur_target *= 50; /* 50 mV step*/
cur_target += 2800; /* 2800 mV lowest */
cur_target = readl(cfg->reg);
cur_target &= cfg->trg_mask;
cur_target *= cfg->step_mV;
cur_target += cfg->lowest_mV;
powered_by_linreg = mxs_get_vddio_power_source_off();
if (new_target > cur_target) {
adjust_up = new_target > cur_target;
powered_by_linreg = cfg->powered_by_linreg();
if (adjust_up) {
if (powered_by_linreg) {
bo_int = readl(&power_regs->hw_power_vddioctrl);
clrbits_le32(&power_regs->hw_power_vddioctrl,
POWER_CTRL_ENIRQ_VDDIO_BO);
bo_int = readl(cfg->reg);
clrbits_le32(cfg->reg, cfg->bo_enirq);
}
setbits_le32(&power_regs->hw_power_vddioctrl,
POWER_VDDIOCTRL_BO_OFFSET_MASK);
do {
if (new_target - cur_target > 100)
diff = cur_target + 100;
else
diff = new_target;
diff -= 2800;
diff /= 50;
clrsetbits_le32(&power_regs->hw_power_vddioctrl,
POWER_VDDIOCTRL_TRG_MASK, diff);
if (powered_by_linreg ||
(readl(&power_regs->hw_power_sts) &
POWER_STS_VDD5V_GT_VDDIO))
early_delay(500);
else {
while (!(readl(&power_regs->hw_power_sts) &
POWER_STS_DC_OK))
;
}
cur_target = readl(&power_regs->hw_power_vddioctrl);
cur_target &= POWER_VDDIOCTRL_TRG_MASK;
cur_target *= 50; /* 50 mV step*/
cur_target += 2800; /* 2800 mV lowest */
} while (new_target > cur_target);
if (powered_by_linreg) {
writel(POWER_CTRL_VDDIO_BO_IRQ,
&power_regs->hw_power_ctrl_clr);
if (bo_int & POWER_CTRL_ENIRQ_VDDIO_BO)
setbits_le32(&power_regs->hw_power_vddioctrl,
POWER_CTRL_ENIRQ_VDDIO_BO);
}
} else {
do {
if (cur_target - new_target > 100)
diff = cur_target - 100;
else
diff = new_target;
diff -= 2800;
diff /= 50;
clrsetbits_le32(&power_regs->hw_power_vddioctrl,
POWER_VDDIOCTRL_TRG_MASK, diff);
if (powered_by_linreg ||
(readl(&power_regs->hw_power_sts) &
POWER_STS_VDD5V_GT_VDDIO))
early_delay(500);
else {
while (!(readl(&power_regs->hw_power_sts) &
POWER_STS_DC_OK))
;
}
cur_target = readl(&power_regs->hw_power_vddioctrl);
cur_target &= POWER_VDDIOCTRL_TRG_MASK;
cur_target *= 50; /* 50 mV step*/
cur_target += 2800; /* 2800 mV lowest */
} while (new_target < cur_target);
setbits_le32(cfg->reg, cfg->bo_offset_mask);
}
clrsetbits_le32(&power_regs->hw_power_vddioctrl,
POWER_VDDIOCTRL_BO_OFFSET_MASK,
new_brownout << POWER_VDDIOCTRL_BO_OFFSET_OFFSET);
}
void mxs_power_set_vddd(uint32_t new_target, uint32_t new_brownout)
{
struct mxs_power_regs *power_regs =
(struct mxs_power_regs *)MXS_POWER_BASE;
uint32_t cur_target, diff, bo_int = 0;
uint32_t powered_by_linreg = 0;
new_brownout = (new_target - new_brownout + 12) / 25;
cur_target = readl(&power_regs->hw_power_vdddctrl);
cur_target &= POWER_VDDDCTRL_TRG_MASK;
cur_target *= 25; /* 25 mV step*/
cur_target += 800; /* 800 mV lowest */
powered_by_linreg = mxs_get_vddd_power_source_off();
if (new_target > cur_target) {
if (powered_by_linreg) {
bo_int = readl(&power_regs->hw_power_vdddctrl);
clrbits_le32(&power_regs->hw_power_vdddctrl,
POWER_CTRL_ENIRQ_VDDD_BO);
}
setbits_le32(&power_regs->hw_power_vdddctrl,
POWER_VDDDCTRL_BO_OFFSET_MASK);
do {
if (new_target - cur_target > 100)
do {
if (abs(new_target - cur_target) > 100) {
if (adjust_up)
diff = cur_target + 100;
else
diff = new_target;
diff -= 800;
diff /= 25;
clrsetbits_le32(&power_regs->hw_power_vdddctrl,
POWER_VDDDCTRL_TRG_MASK, diff);
if (powered_by_linreg ||
(readl(&power_regs->hw_power_sts) &
POWER_STS_VDD5V_GT_VDDIO))
early_delay(500);
else {
while (!(readl(&power_regs->hw_power_sts) &
POWER_STS_DC_OK))
;
}
cur_target = readl(&power_regs->hw_power_vdddctrl);
cur_target &= POWER_VDDDCTRL_TRG_MASK;
cur_target *= 25; /* 25 mV step*/
cur_target += 800; /* 800 mV lowest */
} while (new_target > cur_target);
if (powered_by_linreg) {
writel(POWER_CTRL_VDDD_BO_IRQ,
&power_regs->hw_power_ctrl_clr);
if (bo_int & POWER_CTRL_ENIRQ_VDDD_BO)
setbits_le32(&power_regs->hw_power_vdddctrl,
POWER_CTRL_ENIRQ_VDDD_BO);
}
} else {
do {
if (cur_target - new_target > 100)
diff = cur_target - 100;
else
diff = new_target;
} else {
diff = new_target;
}
diff -= 800;
diff /= 25;
diff -= cfg->lowest_mV;
diff /= cfg->step_mV;
clrsetbits_le32(&power_regs->hw_power_vdddctrl,
POWER_VDDDCTRL_TRG_MASK, diff);
if (powered_by_linreg ||
(readl(&power_regs->hw_power_sts) &
POWER_STS_VDD5V_GT_VDDIO))
early_delay(500);
else {
while (!(readl(&power_regs->hw_power_sts) &
POWER_STS_DC_OK))
;
clrsetbits_le32(cfg->reg, cfg->trg_mask, diff);
if (powered_by_linreg ||
(readl(&power_regs->hw_power_sts) &
POWER_STS_VDD5V_GT_VDDIO))
early_delay(500);
else {
for (;;) {
tmp = readl(&power_regs->hw_power_sts);
if (tmp & POWER_STS_DC_OK)
break;
}
}
cur_target = readl(&power_regs->hw_power_vdddctrl);
cur_target &= POWER_VDDDCTRL_TRG_MASK;
cur_target *= 25; /* 25 mV step*/
cur_target += 800; /* 800 mV lowest */
} while (new_target < cur_target);
cur_target = readl(cfg->reg);
cur_target &= cfg->trg_mask;
cur_target *= cfg->step_mV;
cur_target += cfg->lowest_mV;
} while (new_target > cur_target);
if (adjust_up && powered_by_linreg) {
writel(cfg->bo_irq, &power_regs->hw_power_ctrl_clr);
if (bo_int & cfg->bo_enirq)
setbits_le32(cfg->reg, cfg->bo_enirq);
}
clrsetbits_le32(&power_regs->hw_power_vdddctrl,
POWER_VDDDCTRL_BO_OFFSET_MASK,
new_brownout << POWER_VDDDCTRL_BO_OFFSET_OFFSET);
clrsetbits_le32(cfg->reg, cfg->bo_offset_mask,
new_brownout << cfg->bo_offset_offset);
}
void mxs_setup_batt_detect(void)
static void mxs_setup_batt_detect(void)
{
mxs_lradc_init();
mxs_lradc_enable_batt_measurement();
@@ -982,9 +896,8 @@ void mxs_power_init(void)
mxs_power_configure_power_source();
mxs_enable_output_rail_protection();
mxs_power_set_vddio(3300, 3150);
mxs_power_set_vddd(1350, 1200);
mxs_power_set_vddx(&mxs_vddio_cfg, 3300, 3150);
mxs_power_set_vddx(&mxs_vddd_cfg, 1500, 1000);
writel(POWER_CTRL_VDDD_BO_IRQ | POWER_CTRL_VDDA_BO_IRQ |
POWER_CTRL_VDDIO_BO_IRQ | POWER_CTRL_VDD5V_DROOP_IRQ |

View File

@@ -50,9 +50,10 @@ SECTIONS
}
. = ALIGN(4);
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
.u_boot_list : {
#include <u-boot.lst>
}
. = ALIGN(4);

View File

@@ -194,8 +194,8 @@ u32 orion5x_device_rev(void)
*/
int print_cpuinfo(void)
{
char dev_str[] = "0x0000";
char rev_str[] = "0x00";
char dev_str[7]; /* room enough for 0x0000 plus null byte */
char rev_str[5]; /* room enough for 0x00 plus null byte */
char *dev_name = NULL;
char *rev_name = NULL;

View File

@@ -50,9 +50,10 @@ SECTIONS
}
. = ALIGN(4);
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
.u_boot_list : {
#include <u-boot.lst>
}
. = ALIGN(4);

View File

@@ -36,12 +36,6 @@
#include <common.h>
#include <version.h>
#if defined(CONFIG_OMAP1610)
#include <./configs/omap1510.h>
#elif defined(CONFIG_OMAP730)
#include <./configs/omap730.h>
#endif
/*
*************************************************************************
*
@@ -198,20 +192,7 @@ reset:
bl cpu_init_crit
#endif
/* Set stackpointer in internal RAM to call board_init_f */
call_board_init_f:
#ifdef CONFIG_NAND_SPL /* deprecated, use instead CONFIG_SPL_BUILD */
ldr sp, =(CONFIG_SYS_INIT_SP_ADDR)
#else
#ifdef CONFIG_SPL_BUILD
ldr sp, =(CONFIG_SPL_STACK)
#else
ldr sp, =(CONFIG_SYS_INIT_SP_ADDR)
#endif
#endif
bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
ldr r0,=0x00000000
bl board_init_f
bl _main
/*------------------------------------------------------------------------------*/
@@ -229,15 +210,11 @@ relocate_code:
mov r5, r1 /* save addr of gd */
mov r6, r2 /* save addr of destination */
/* Set up the stack */
stack_setup:
mov sp, r4
adr r0, _start
sub r9, r6, r0 /* r9 <- relocation offset */
cmp r0, r6
moveq r9, #0 /* no relocation. relocation offset(r9) = 0 */
beq clear_bss /* skip relocation */
moveq r9, #0 /* no relocation. offset(r9) = 0 */
beq relocate_done /* skip relocation */
mov r1, r6 /* r1 <- scratch for copy loop */
ldr r3, _bss_start_ofs
add r2, r0, r3 /* r2 <- source end address */
@@ -289,56 +266,9 @@ fixnext:
blo fixloop
#endif
clear_bss:
#ifdef CONFIG_SPL_BUILD
/* No relocation for SPL */
ldr r0, =__bss_start
ldr r1, =__bss_end__
#else
ldr r0, _bss_start_ofs
ldr r1, _bss_end_ofs
mov r4, r6 /* reloc addr */
add r0, r0, r4
add r1, r1, r4
#endif
mov r2, #0x00000000 /* clear */
relocate_done:
clbss_l:cmp r0, r1 /* clear loop... */
bhs clbss_e /* if reached end of bss, exit */
str r2, [r0]
add r0, r0, #4
b clbss_l
clbss_e:
#ifndef CONFIG_SPL_BUILD
bl coloured_LED_init
bl red_led_on
#endif
/*
* We are done. Do not return, instead branch to second part of board
* initialization, now running from RAM.
*/
#ifdef CONFIG_NAND_SPL
ldr r0, _nand_boot_ofs
mov pc, r0
_nand_boot_ofs:
.word nand_boot
#else
ldr r0, _board_init_r_ofs
ldr r1, _TEXT_BASE
add lr, r0, r1
add lr, lr, r9
/* setup parameters for board_init_r */
mov r0, r5 /* gd_t */
mov r1, r6 /* dest_addr */
/* jump to it ... */
mov pc, lr
_board_init_r_ofs:
.word board_init_r - _start
#endif
bx lr
_rel_dyn_start_ofs:
.word __rel_dyn_start - _start
@@ -346,8 +276,14 @@ _rel_dyn_end_ofs:
.word __rel_dyn_end - _start
_dynsym_start_ofs:
.word __dynsym_start - _start
#endif
.globl c_runtime_cpu_setup
c_runtime_cpu_setup:
bx lr
/*
*************************************************************************
*

View File

@@ -147,12 +147,7 @@ reset:
bl cpu_init_crit
#endif
/* Set stackpointer in internal RAM to call board_init_f */
call_board_init_f:
ldr sp, =(CONFIG_SYS_INIT_SP_ADDR)
bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
ldr r0,=0x00000000
bl board_init_f
bl _main
/*------------------------------------------------------------------------------*/
@@ -169,14 +164,10 @@ relocate_code:
mov r5, r1 /* save addr of gd */
mov r6, r2 /* save addr of destination */
/* Set up the stack */
stack_setup:
mov sp, r4
adr r0, _start
cmp r0, r6
moveq r9, #0 /* no relocation. relocation offset(r9) = 0 */
beq clear_bss /* skip relocation */
beq relocate_done /* skip relocation */
mov r1, r6 /* r1 <- scratch for copy_loop */
ldr r3, _bss_start_ofs
add r2, r0, r3 /* r2 <- source end address */
@@ -228,46 +219,10 @@ fixnext:
blo fixloop
#endif
clear_bss:
#ifndef CONFIG_SPL_BUILD
ldr r0, _bss_start_ofs
ldr r1, _bss_end_ofs
mov r4, r6 /* reloc addr */
add r0, r0, r4
add r1, r1, r4
mov r2, #0x00000000 /* clear */
relocate_done:
clbss_l:cmp r0, r1 /* clear loop... */
bhs clbss_e /* if reached end of bss, exit */
str r2, [r0]
add r0, r0, #4
b clbss_l
clbss_e:
#endif
/*
* We are done. Do not return, instead branch to second part of board
* initialization, now running from RAM.
*/
#ifdef CONFIG_NAND_SPL
ldr pc, _nand_boot
_nand_boot: .word nand_boot
#else
ldr r0, _board_init_r_ofs
adr r1, _start
add lr, r0, r1
add lr, lr, r9
/* setup parameters for board_init_r */
mov r0, r5 /* gd_t */
mov r1, r6 /* dest_addr */
/* jump to it ... */
mov pc, lr
_board_init_r_ofs:
.word board_init_r - _start
#endif
_rel_dyn_start_ofs:
.word __rel_dyn_start - _start
_rel_dyn_end_ofs:
@@ -275,6 +230,11 @@ _rel_dyn_end_ofs:
_dynsym_start_ofs:
.word __dynsym_start - _start
.globl c_runtime_cpu_setup
c_runtime_cpu_setup:
mov pc, lr
/*
*************************************************************************
*

View File

@@ -143,12 +143,7 @@ reset:
bl cpu_init_crit
#endif
/* Set stackpointer in internal RAM to call board_init_f */
call_board_init_f:
ldr sp, =(CONFIG_SYS_INIT_SP_ADDR)
bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
ldr r0,=0x00000000
bl board_init_f
bl _main
/*------------------------------------------------------------------------------*/
@@ -165,14 +160,10 @@ relocate_code:
mov r5, r1 /* save addr of gd */
mov r6, r2 /* save addr of destination */
/* Set up the stack */
stack_setup:
mov sp, r4
adr r0, _start
cmp r0, r6
moveq r9, #0 /* no relocation. relocation offset(r9) = 0 */
beq clear_bss /* skip relocation */
beq relocate_done /* skip relocation */
mov r1, r6 /* r1 <- scratch for copy_loop */
ldr r3, _bss_start_ofs
add r2, r0, r3 /* r2 <- source end address */
@@ -224,50 +215,9 @@ fixnext:
blo fixloop
#endif
clear_bss:
#ifndef CONFIG_SPL_BUILD
ldr r0, _bss_start_ofs
ldr r1, _bss_end_ofs
mov r4, r6 /* reloc addr */
add r0, r0, r4
add r1, r1, r4
mov r2, #0x00000000 /* clear */
relocate_done:
clbss_l:cmp r0, r1 /* clear loop... */
bhs clbss_e /* if reached end of bss, exit */
str r2, [r0]
add r0, r0, #4
b clbss_l
clbss_e:
bl coloured_LED_init
bl red_led_on
#endif
/*
* We are done. Do not return, instead branch to second part of board
* initialization, now running from RAM.
*/
#ifdef CONFIG_NAND_SPL
ldr r0, _nand_boot_ofs
mov pc, r0
_nand_boot_ofs:
.word nand_boot
#else
ldr r0, _board_init_r_ofs
adr r1, _start
add lr, r0, r1
add lr, lr, r9
/* setup parameters for board_init_r */
mov r0, r5 /* gd_t */
mov r1, r6 /* dest_addr */
/* jump to it ... */
mov pc, lr
_board_init_r_ofs:
.word board_init_r - _start
#endif
bx lr
_rel_dyn_start_ofs:
.word __rel_dyn_start - _start
@@ -276,6 +226,11 @@ _rel_dyn_end_ofs:
_dynsym_start_ofs:
.word __dynsym_start - _start
.globl c_runtime_cpu_setup
c_runtime_cpu_setup:
mov pc, lr
/*
*************************************************************************
*

View File

@@ -18,9 +18,12 @@ LIB = $(obj)lib$(SOC).o
COBJS += clock.o
COBJS += sys_info.o
COBJS += mem.o
COBJS += ddr.o
COBJS += emif4.o
COBJS += board.o
COBJS += mux.o
COBJS-$(CONFIG_NAND_OMAP_GPMC) += elm.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS) $(COBJS-y) $(SOBJS))

View File

@@ -25,6 +25,7 @@
#include <asm/arch/ddr_defs.h>
#include <asm/arch/clock.h>
#include <asm/arch/gpio.h>
#include <asm/arch/mem.h>
#include <asm/arch/mmc_host_def.h>
#include <asm/arch/sys_proto.h>
#include <asm/io.h>
@@ -33,12 +34,14 @@
#include <i2c.h>
#include <miiphy.h>
#include <cpsw.h>
#include <asm/errno.h>
#include <linux/usb/ch9.h>
#include <linux/usb/gadget.h>
#include <linux/usb/musb.h>
#include <asm/omap_musb.h>
DECLARE_GLOBAL_DATA_PTR;
struct wd_timer *wdtimer = (struct wd_timer *)WDT_BASE;
struct uart_sys *uart_base = (struct uart_sys *)DEFAULT_UART_BASE;
static const struct gpio_bank gpio_bank_am33xx[4] = {
{ (void *)AM33XX_GPIO0_BASE, METHOD_GPIO_24XX },
{ (void *)AM33XX_GPIO1_BASE, METHOD_GPIO_24XX },
@@ -48,153 +51,11 @@ static const struct gpio_bank gpio_bank_am33xx[4] = {
const struct gpio_bank *const omap_gpio_bank = gpio_bank_am33xx;
/* MII mode defines */
#define MII_MODE_ENABLE 0x0
#define RGMII_MODE_ENABLE 0xA
/* GPIO that controls power to DDR on EVM-SK */
#define GPIO_DDR_VTT_EN 7
static struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE;
static struct am335x_baseboard_id __attribute__((section (".data"))) header;
static inline int board_is_bone(void)
{
return !strncmp(header.name, "A335BONE", HDR_NAME_LEN);
}
static inline int board_is_evm_sk(void)
{
return !strncmp("A335X_SK", header.name, HDR_NAME_LEN);
}
/*
* Read header information from EEPROM into global structure.
*/
static int read_eeprom(void)
{
/* Check if baseboard eeprom is available */
if (i2c_probe(CONFIG_SYS_I2C_EEPROM_ADDR)) {
puts("Could not probe the EEPROM; something fundamentally "
"wrong on the I2C bus.\n");
return -ENODEV;
}
/* read the eeprom using i2c */
if (i2c_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0, 2, (uchar *)&header,
sizeof(header))) {
puts("Could not read the EEPROM; something fundamentally"
" wrong on the I2C bus.\n");
return -EIO;
}
if (header.magic != 0xEE3355AA) {
/*
* read the eeprom using i2c again,
* but use only a 1 byte address
*/
if (i2c_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0, 1,
(uchar *)&header, sizeof(header))) {
puts("Could not read the EEPROM; something "
"fundamentally wrong on the I2C bus.\n");
return -EIO;
}
if (header.magic != 0xEE3355AA) {
printf("Incorrect magic number (0x%x) in EEPROM\n",
header.magic);
return -EINVAL;
}
}
return 0;
}
/* UART Defines */
#ifdef CONFIG_SPL_BUILD
#define UART_RESET (0x1 << 1)
#define UART_CLK_RUNNING_MASK 0x1
#define UART_SMART_IDLE_EN (0x1 << 0x3)
#endif
/*
* Determine what type of DDR we have.
*/
static short inline board_memory_type(void)
{
/* The following boards are known to use DDR3. */
if (board_is_evm_sk())
return EMIF_REG_SDRAM_TYPE_DDR3;
return EMIF_REG_SDRAM_TYPE_DDR2;
}
/*
* early system init of muxing and clocks.
*/
void s_init(void)
{
/* WDT1 is already running when the bootloader gets control
* Disable it to avoid "random" resets
*/
writel(0xAAAA, &wdtimer->wdtwspr);
while (readl(&wdtimer->wdtwwps) != 0x0)
;
writel(0x5555, &wdtimer->wdtwspr);
while (readl(&wdtimer->wdtwwps) != 0x0)
;
#ifdef CONFIG_SPL_BUILD
/* Setup the PLLs and the clocks for the peripherals */
pll_init();
/* UART softreset */
u32 regVal;
enable_uart0_pin_mux();
regVal = readl(&uart_base->uartsyscfg);
regVal |= UART_RESET;
writel(regVal, &uart_base->uartsyscfg);
while ((readl(&uart_base->uartsyssts) &
UART_CLK_RUNNING_MASK) != UART_CLK_RUNNING_MASK)
;
/* Disable smart idle */
regVal = readl(&uart_base->uartsyscfg);
regVal |= UART_SMART_IDLE_EN;
writel(regVal, &uart_base->uartsyscfg);
gd = &gdata;
preloader_console_init();
/* Initalize the board header */
enable_i2c0_pin_mux();
i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
if (read_eeprom() < 0)
puts("Could not get board ID.\n");
enable_board_pin_mux(&header);
if (board_is_evm_sk()) {
/*
* EVM SK 1.2A and later use gpio0_7 to enable DDR3.
* This is safe enough to do on older revs.
*/
gpio_request(GPIO_DDR_VTT_EN, "ddr_vtt_en");
gpio_direction_output(GPIO_DDR_VTT_EN, 1);
}
config_ddr(board_memory_type());
#endif
}
#if defined(CONFIG_OMAP_HSMMC) && !defined(CONFIG_SPL_BUILD)
int board_mmc_init(bd_t *bis)
int cpu_mmc_init(bd_t *bis)
{
int ret;
ret = omap_mmc_init(0, 0, 0);
if (ret)
return ret;
@@ -209,92 +70,82 @@ void setup_clocks_for_console(void)
return;
}
/*
* Basic board specific setup. Pinmux has been handled already.
*/
int board_init(void)
/* AM33XX has two MUSB controllers which can be host or gadget */
#if (defined(CONFIG_MUSB_GADGET) || defined(CONFIG_MUSB_HOST)) && \
(defined(CONFIG_AM335X_USB0) || defined(CONFIG_AM335X_USB1))
static struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE;
/* USB 2.0 PHY Control */
#define CM_PHY_PWRDN (1 << 0)
#define CM_PHY_OTG_PWRDN (1 << 1)
#define OTGVDET_EN (1 << 19)
#define OTGSESSENDEN (1 << 20)
static void am33xx_usb_set_phy_power(u8 on, u32 *reg_addr)
{
i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
if (read_eeprom() < 0)
puts("Could not get board ID.\n");
if (on) {
clrsetbits_le32(reg_addr, CM_PHY_PWRDN | CM_PHY_OTG_PWRDN,
OTGVDET_EN | OTGSESSENDEN);
} else {
clrsetbits_le32(reg_addr, 0, CM_PHY_PWRDN | CM_PHY_OTG_PWRDN);
}
}
gd->bd->bi_boot_params = PHYS_DRAM_1 + 0x100;
static struct musb_hdrc_config musb_config = {
.multipoint = 1,
.dyn_fifo = 1,
.num_eps = 16,
.ram_bits = 12,
};
#ifdef CONFIG_AM335X_USB0
static void am33xx_otg0_set_phy_power(u8 on)
{
am33xx_usb_set_phy_power(on, &cdev->usb_ctrl0);
}
struct omap_musb_board_data otg0_board_data = {
.set_phy_power = am33xx_otg0_set_phy_power,
};
static struct musb_hdrc_platform_data otg0_plat = {
.mode = CONFIG_AM335X_USB0_MODE,
.config = &musb_config,
.power = 50,
.platform_ops = &musb_dsps_ops,
.board_data = &otg0_board_data,
};
#endif
#ifdef CONFIG_AM335X_USB1
static void am33xx_otg1_set_phy_power(u8 on)
{
am33xx_usb_set_phy_power(on, &cdev->usb_ctrl1);
}
struct omap_musb_board_data otg1_board_data = {
.set_phy_power = am33xx_otg1_set_phy_power,
};
static struct musb_hdrc_platform_data otg1_plat = {
.mode = CONFIG_AM335X_USB1_MODE,
.config = &musb_config,
.power = 50,
.platform_ops = &musb_dsps_ops,
.board_data = &otg1_board_data,
};
#endif
#endif
int arch_misc_init(void)
{
#ifdef CONFIG_AM335X_USB0
musb_register(&otg0_plat, &otg0_board_data,
(void *)AM335X_USB0_OTG_BASE);
#endif
#ifdef CONFIG_AM335X_USB1
musb_register(&otg1_plat, &otg1_board_data,
(void *)AM335X_USB1_OTG_BASE);
#endif
return 0;
}
#ifdef CONFIG_DRIVER_TI_CPSW
static void cpsw_control(int enabled)
{
/* VTP can be added here */
return;
}
static struct cpsw_slave_data cpsw_slaves[] = {
{
.slave_reg_ofs = 0x208,
.sliver_reg_ofs = 0xd80,
.phy_id = 0,
},
{
.slave_reg_ofs = 0x308,
.sliver_reg_ofs = 0xdc0,
.phy_id = 1,
},
};
static struct cpsw_platform_data cpsw_data = {
.mdio_base = AM335X_CPSW_MDIO_BASE,
.cpsw_base = AM335X_CPSW_BASE,
.mdio_div = 0xff,
.channels = 8,
.cpdma_reg_ofs = 0x800,
.slaves = 1,
.slave_data = cpsw_slaves,
.ale_reg_ofs = 0xd00,
.ale_entries = 1024,
.host_port_reg_ofs = 0x108,
.hw_stats_reg_ofs = 0x900,
.mac_control = (1 << 5),
.control = cpsw_control,
.host_port_num = 0,
.version = CPSW_CTRL_VERSION_2,
};
int board_eth_init(bd_t *bis)
{
uint8_t mac_addr[6];
uint32_t mac_hi, mac_lo;
if (!eth_getenv_enetaddr("ethaddr", mac_addr)) {
debug("<ethaddr> not set. Reading from E-fuse\n");
/* try reading mac address from efuse */
mac_lo = readl(&cdev->macid0l);
mac_hi = readl(&cdev->macid0h);
mac_addr[0] = mac_hi & 0xFF;
mac_addr[1] = (mac_hi & 0xFF00) >> 8;
mac_addr[2] = (mac_hi & 0xFF0000) >> 16;
mac_addr[3] = (mac_hi & 0xFF000000) >> 24;
mac_addr[4] = mac_lo & 0xFF;
mac_addr[5] = (mac_lo & 0xFF00) >> 8;
if (is_valid_ether_addr(mac_addr))
eth_setenv_enetaddr("ethaddr", mac_addr);
else
return -1;
}
if (board_is_bone()) {
writel(MII_MODE_ENABLE, &cdev->miisel);
cpsw_slaves[0].phy_if = cpsw_slaves[1].phy_if =
PHY_INTERFACE_MODE_MII;
} else {
writel(RGMII_MODE_ENABLE, &cdev->miisel);
cpsw_slaves[0].phy_if = cpsw_slaves[1].phy_if =
PHY_INTERFACE_MODE_RGMII;
}
return cpsw_register(&cpsw_data);
}
#endif

View File

@@ -40,10 +40,12 @@
#define CLK_MODE_MASK 0xfffffff8
#define CLK_DIV_SEL 0xFFFFFFE0
#define CPGMAC0_IDLE 0x30000
#define DPLL_CLKDCOLDO_GATE_CTRL 0x300
const struct cm_perpll *cmper = (struct cm_perpll *)CM_PER;
const struct cm_wkuppll *cmwkup = (struct cm_wkuppll *)CM_WKUP;
const struct cm_dpll *cmdpll = (struct cm_dpll *)CM_DPLL;
const struct cm_rtc *cmrtc = (struct cm_rtc *)CM_RTC;
static void enable_interface_clocks(void)
{
@@ -114,6 +116,51 @@ static void enable_per_clocks(void)
while (readl(&cmwkup->wkup_uart0ctrl) != PRCM_MOD_EN)
;
/* UART1 */
#ifdef CONFIG_SERIAL2
writel(PRCM_MOD_EN, &cmper->uart1clkctrl);
while (readl(&cmper->uart1clkctrl) != PRCM_MOD_EN)
;
#endif /* CONFIG_SERIAL2 */
/* UART2 */
#ifdef CONFIG_SERIAL3
writel(PRCM_MOD_EN, &cmper->uart2clkctrl);
while (readl(&cmper->uart2clkctrl) != PRCM_MOD_EN)
;
#endif /* CONFIG_SERIAL3 */
/* UART3 */
#ifdef CONFIG_SERIAL4
writel(PRCM_MOD_EN, &cmper->uart3clkctrl);
while (readl(&cmper->uart3clkctrl) != PRCM_MOD_EN)
;
#endif /* CONFIG_SERIAL4 */
/* UART4 */
#ifdef CONFIG_SERIAL5
writel(PRCM_MOD_EN, &cmper->uart4clkctrl);
while (readl(&cmper->uart4clkctrl) != PRCM_MOD_EN)
;
#endif /* CONFIG_SERIAL5 */
/* UART5 */
#ifdef CONFIG_SERIAL6
writel(PRCM_MOD_EN, &cmper->uart5clkctrl);
while (readl(&cmper->uart5clkctrl) != PRCM_MOD_EN)
;
#endif /* CONFIG_SERIAL6 */
/* GPMC */
writel(PRCM_MOD_EN, &cmper->gpmcclkctrl);
while (readl(&cmper->gpmcclkctrl) != PRCM_MOD_EN)
;
/* ELM */
writel(PRCM_MOD_EN, &cmper->elmclkctrl);
while (readl(&cmper->elmclkctrl) != PRCM_MOD_EN)
;
/* MMC0*/
writel(PRCM_MOD_EN, &cmper->mmc0clkctrl);
while (readl(&cmper->mmc0clkctrl) != PRCM_MOD_EN)
@@ -153,6 +200,16 @@ static void enable_per_clocks(void)
writel(PRCM_MOD_EN, &cmper->spi0clkctrl);
while (readl(&cmper->spi0clkctrl) != PRCM_MOD_EN)
;
/* RTC */
writel(PRCM_MOD_EN, &cmrtc->rtcclkctrl);
while (readl(&cmrtc->rtcclkctrl) != PRCM_MOD_EN)
;
/* MUSB */
writel(PRCM_MOD_EN, &cmper->usb0clkctrl);
while (readl(&cmper->usb0clkctrl) != PRCM_MOD_EN)
;
}
static void mpu_pll_config(void)
@@ -249,6 +306,8 @@ static void per_pll_config(void)
while (readl(&cmwkup->idlestdpllper) != ST_DPLL_CLK)
;
writel(DPLL_CLKDCOLDO_GATE_CTRL, &cmwkup->clkdcoldodpllper);
}
void ddr_pll_config(unsigned int ddrpll_m)

View File

@@ -13,6 +13,7 @@
#
ifdef CONFIG_SPL_BUILD
ALL-y += $(OBJTREE)/MLO
ALL-$(CONFIG_SPL_SPI_SUPPORT) += $(OBJTREE)/MLO.byteswap
else
ALL-y += $(obj)u-boot.img
endif

View File

@@ -0,0 +1,212 @@
/*
* (C) Copyright 2010-2011 Texas Instruments, <www.ti.com>
* Mansoor Ahamed <mansoor.ahamed@ti.com>
*
* BCH Error Location Module (ELM) support.
*
* NOTE:
* 1. Supports only continuous mode. Dont see need for page mode in uboot
* 2. Supports only syndrome polynomial 0. i.e. poly local variable is
* always set to ELM_DEFAULT_POLY. Dont see need for other polynomial
* sets in uboot
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#include <asm/io.h>
#include <asm/errno.h>
#include <asm/arch/cpu.h>
#include <asm/arch/omap_gpmc.h>
#include <asm/arch/elm.h>
#define ELM_DEFAULT_POLY (0)
struct elm *elm_cfg;
/**
* elm_load_syndromes - Load BCH syndromes based on nibble selection
* @syndrome: BCH syndrome
* @nibbles:
* @poly: Syndrome Polynomial set to use
*
* Load BCH syndromes based on nibble selection
*/
static void elm_load_syndromes(u8 *syndrome, u32 nibbles, u8 poly)
{
u32 *ptr;
u32 val;
/* reg 0 */
ptr = &elm_cfg->syndrome_fragments[poly].syndrome_fragment_x[0];
val = syndrome[0] | (syndrome[1] << 8) | (syndrome[2] << 16) |
(syndrome[3] << 24);
writel(val, ptr);
/* reg 1 */
ptr = &elm_cfg->syndrome_fragments[poly].syndrome_fragment_x[1];
val = syndrome[4] | (syndrome[5] << 8) | (syndrome[6] << 16) |
(syndrome[7] << 24);
writel(val, ptr);
/* BCH 8-bit with 26 nibbles (4*8=32) */
if (nibbles > 13) {
/* reg 2 */
ptr = &elm_cfg->syndrome_fragments[poly].syndrome_fragment_x[2];
val = syndrome[8] | (syndrome[9] << 8) | (syndrome[10] << 16) |
(syndrome[11] << 24);
writel(val, ptr);
/* reg 3 */
ptr = &elm_cfg->syndrome_fragments[poly].syndrome_fragment_x[3];
val = syndrome[12] | (syndrome[13] << 8) |
(syndrome[14] << 16) | (syndrome[15] << 24);
writel(val, ptr);
}
/* BCH 16-bit with 52 nibbles (7*8=56) */
if (nibbles > 26) {
/* reg 4 */
ptr = &elm_cfg->syndrome_fragments[poly].syndrome_fragment_x[4];
val = syndrome[16] | (syndrome[17] << 8) |
(syndrome[18] << 16) | (syndrome[19] << 24);
writel(val, ptr);
/* reg 5 */
ptr = &elm_cfg->syndrome_fragments[poly].syndrome_fragment_x[5];
val = syndrome[20] | (syndrome[21] << 8) |
(syndrome[22] << 16) | (syndrome[23] << 24);
writel(val, ptr);
/* reg 6 */
ptr = &elm_cfg->syndrome_fragments[poly].syndrome_fragment_x[6];
val = syndrome[24] | (syndrome[25] << 8) |
(syndrome[26] << 16) | (syndrome[27] << 24);
writel(val, ptr);
}
}
/**
* elm_check_errors - Check for BCH errors and return error locations
* @syndrome: BCH syndrome
* @nibbles:
* @error_count: Returns number of errrors in the syndrome
* @error_locations: Returns error locations (in decimal) in this array
*
* Check the provided syndrome for BCH errors and return error count
* and locations in the array passed. Returns -1 if error is not correctable,
* else returns 0
*/
int elm_check_error(u8 *syndrome, u32 nibbles, u32 *error_count,
u32 *error_locations)
{
u8 poly = ELM_DEFAULT_POLY;
s8 i;
u32 location_status;
elm_load_syndromes(syndrome, nibbles, poly);
/* start processing */
writel((readl(&elm_cfg->syndrome_fragments[poly].syndrome_fragment_x[6])
| ELM_SYNDROME_FRAGMENT_6_SYNDROME_VALID),
&elm_cfg->syndrome_fragments[poly].syndrome_fragment_x[6]);
/* wait for processing to complete */
while ((readl(&elm_cfg->irqstatus) & (0x1 << poly)) != 0x1)
;
/* clear status */
writel((readl(&elm_cfg->irqstatus) | (0x1 << poly)),
&elm_cfg->irqstatus);
/* check if correctable */
location_status = readl(&elm_cfg->error_location[poly].location_status);
if (!(location_status & ELM_LOCATION_STATUS_ECC_CORRECTABLE_MASK))
return -1;
/* get error count */
*error_count = readl(&elm_cfg->error_location[poly].location_status) &
ELM_LOCATION_STATUS_ECC_NB_ERRORS_MASK;
for (i = 0; i < *error_count; i++) {
error_locations[i] =
readl(&elm_cfg->error_location[poly].error_location_x[i]);
}
return 0;
}
/**
* elm_config - Configure ELM module
* @level: 4 / 8 / 16 bit BCH
*
* Configure ELM module based on BCH level.
* Set mode as continuous mode.
* Currently we are using only syndrome 0 and syndromes 1 to 6 are not used.
* Also, the mode is set only for syndrome 0
*/
int elm_config(enum bch_level level)
{
u32 val;
u8 poly = ELM_DEFAULT_POLY;
u32 buffer_size = 0x7FF;
/* config size and level */
val = (u32)(level) & ELM_LOCATION_CONFIG_ECC_BCH_LEVEL_MASK;
val |= ((buffer_size << ELM_LOCATION_CONFIG_ECC_SIZE_POS) &
ELM_LOCATION_CONFIG_ECC_SIZE_MASK);
writel(val, &elm_cfg->location_config);
/* config continous mode */
/* enable interrupt generation for syndrome polynomial set */
writel((readl(&elm_cfg->irqenable) | (0x1 << poly)),
&elm_cfg->irqenable);
/* set continuous mode for the syndrome polynomial set */
writel((readl(&elm_cfg->page_ctrl) & ~(0x1 << poly)),
&elm_cfg->page_ctrl);
return 0;
}
/**
* elm_reset - Do a soft reset of ELM
*
* Perform a soft reset of ELM and return after reset is done.
*/
void elm_reset(void)
{
/* initiate reset */
writel((readl(&elm_cfg->sysconfig) | ELM_SYSCONFIG_SOFTRESET),
&elm_cfg->sysconfig);
/* wait for reset complete and normal operation */
while ((readl(&elm_cfg->sysstatus) & ELM_SYSSTATUS_RESETDONE) !=
ELM_SYSSTATUS_RESETDONE)
;
}
/**
* elm_init - Initialize ELM module
*
* Initialize ELM support. Currently it does only base address init
* and ELM reset.
*/
void elm_init(void)
{
elm_cfg = (struct elm *)ELM_BASE;
elm_reset();
}

View File

@@ -47,78 +47,6 @@ void dram_init_banksize(void)
static struct vtp_reg *vtpreg = (struct vtp_reg *)VTP0_CTRL_ADDR;
static struct ddr_ctrl *ddrctrl = (struct ddr_ctrl *)DDR_CTRL_ADDR;
static const struct ddr_data ddr2_data = {
.datardsratio0 = ((DDR2_RD_DQS<<30)|(DDR2_RD_DQS<<20)
|(DDR2_RD_DQS<<10)|(DDR2_RD_DQS<<0)),
.datawdsratio0 = ((DDR2_WR_DQS<<30)|(DDR2_WR_DQS<<20)
|(DDR2_WR_DQS<<10)|(DDR2_WR_DQS<<0)),
.datawiratio0 = ((DDR2_PHY_WRLVL<<30)|(DDR2_PHY_WRLVL<<20)
|(DDR2_PHY_WRLVL<<10)|(DDR2_PHY_WRLVL<<0)),
.datagiratio0 = ((DDR2_PHY_GATELVL<<30)|(DDR2_PHY_GATELVL<<20)
|(DDR2_PHY_GATELVL<<10)|(DDR2_PHY_GATELVL<<0)),
.datafwsratio0 = ((DDR2_PHY_FIFO_WE<<30)|(DDR2_PHY_FIFO_WE<<20)
|(DDR2_PHY_FIFO_WE<<10)|(DDR2_PHY_FIFO_WE<<0)),
.datawrsratio0 = ((DDR2_PHY_WR_DATA<<30)|(DDR2_PHY_WR_DATA<<20)
|(DDR2_PHY_WR_DATA<<10)|(DDR2_PHY_WR_DATA<<0)),
.datauserank0delay = DDR2_PHY_RANK0_DELAY,
.datadldiff0 = PHY_DLL_LOCK_DIFF,
};
static const struct cmd_control ddr2_cmd_ctrl_data = {
.cmd0csratio = DDR2_RATIO,
.cmd0dldiff = DDR2_DLL_LOCK_DIFF,
.cmd0iclkout = DDR2_INVERT_CLKOUT,
.cmd1csratio = DDR2_RATIO,
.cmd1dldiff = DDR2_DLL_LOCK_DIFF,
.cmd1iclkout = DDR2_INVERT_CLKOUT,
.cmd2csratio = DDR2_RATIO,
.cmd2dldiff = DDR2_DLL_LOCK_DIFF,
.cmd2iclkout = DDR2_INVERT_CLKOUT,
};
static const struct emif_regs ddr2_emif_reg_data = {
.sdram_config = DDR2_EMIF_SDCFG,
.ref_ctrl = DDR2_EMIF_SDREF,
.sdram_tim1 = DDR2_EMIF_TIM1,
.sdram_tim2 = DDR2_EMIF_TIM2,
.sdram_tim3 = DDR2_EMIF_TIM3,
.emif_ddr_phy_ctlr_1 = DDR2_EMIF_READ_LATENCY,
};
static const struct ddr_data ddr3_data = {
.datardsratio0 = DDR3_RD_DQS,
.datawdsratio0 = DDR3_WR_DQS,
.datafwsratio0 = DDR3_PHY_FIFO_WE,
.datawrsratio0 = DDR3_PHY_WR_DATA,
.datadldiff0 = PHY_DLL_LOCK_DIFF,
};
static const struct cmd_control ddr3_cmd_ctrl_data = {
.cmd0csratio = DDR3_RATIO,
.cmd0dldiff = DDR3_DLL_LOCK_DIFF,
.cmd0iclkout = DDR3_INVERT_CLKOUT,
.cmd1csratio = DDR3_RATIO,
.cmd1dldiff = DDR3_DLL_LOCK_DIFF,
.cmd1iclkout = DDR3_INVERT_CLKOUT,
.cmd2csratio = DDR3_RATIO,
.cmd2dldiff = DDR3_DLL_LOCK_DIFF,
.cmd2iclkout = DDR3_INVERT_CLKOUT,
};
static struct emif_regs ddr3_emif_reg_data = {
.sdram_config = DDR3_EMIF_SDCFG,
.ref_ctrl = DDR3_EMIF_SDREF,
.sdram_tim1 = DDR3_EMIF_TIM1,
.sdram_tim2 = DDR3_EMIF_TIM2,
.sdram_tim3 = DDR3_EMIF_TIM3,
.zq_config = DDR3_ZQ_CFG,
.emif_ddr_phy_ctlr_1 = DDR3_EMIF_READ_LATENCY,
};
static void config_vtp(void)
{
writel(readl(&vtpreg->vtp0ctrlreg) | VTP_CTRL_ENABLE,
@@ -134,46 +62,26 @@ static void config_vtp(void)
;
}
void config_ddr(short ddr_type)
void config_ddr(unsigned int pll, unsigned int ioctrl,
const struct ddr_data *data, const struct cmd_control *ctrl,
const struct emif_regs *regs)
{
int ddr_pll, ioctrl_val;
const struct emif_regs *emif_regs;
const struct ddr_data *ddr_data;
const struct cmd_control *cmd_ctrl_data;
if (ddr_type == EMIF_REG_SDRAM_TYPE_DDR2) {
ddr_pll = 266;
cmd_ctrl_data = &ddr2_cmd_ctrl_data;
ddr_data = &ddr2_data;
ioctrl_val = DDR2_IOCTRL_VALUE;
emif_regs = &ddr2_emif_reg_data;
} else if (ddr_type == EMIF_REG_SDRAM_TYPE_DDR3) {
ddr_pll = 303;
cmd_ctrl_data = &ddr3_cmd_ctrl_data;
ddr_data = &ddr3_data;
ioctrl_val = DDR3_IOCTRL_VALUE;
emif_regs = &ddr3_emif_reg_data;
} else {
puts("Unknown memory type");
hang();
}
enable_emif_clocks();
ddr_pll_config(ddr_pll);
ddr_pll_config(pll);
config_vtp();
config_cmd_ctrl(cmd_ctrl_data);
config_cmd_ctrl(ctrl);
config_ddr_data(0, ddr_data);
config_ddr_data(1, ddr_data);
config_ddr_data(0, data);
config_ddr_data(1, data);
config_io_ctrl(ioctrl_val);
config_io_ctrl(ioctrl);
/* Set CKE to be controlled by EMIF/DDR PHY */
writel(DDR_CKE_CTRL_NORMAL, &ddrctrl->ddrckectrl);
/* Program EMIF instance */
config_ddr_phy(emif_regs);
set_sdram_timings(emif_regs);
config_sdram(emif_regs);
config_ddr_phy(regs);
set_sdram_timings(regs);
config_sdram(regs);
}
#endif

View File

@@ -0,0 +1,101 @@
/*
* (C) Copyright 2010
* Texas Instruments, <www.ti.com>
*
* Author :
* Mansoor Ahamed <mansoor.ahamed@ti.com>
*
* Initial Code from:
* Manikandan Pillai <mani.pillai@ti.com>
* Richard Woodruff <r-woodruff2@ti.com>
* Syed Mohammed Khasim <khasim@ti.com>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#include <asm/io.h>
#include <asm/arch/cpu.h>
#include <asm/arch/mem.h>
#include <asm/arch/sys_proto.h>
#include <command.h>
struct gpmc *gpmc_cfg;
#if defined(CONFIG_CMD_NAND)
static const u32 gpmc_m_nand[GPMC_MAX_REG] = {
M_NAND_GPMC_CONFIG1,
M_NAND_GPMC_CONFIG2,
M_NAND_GPMC_CONFIG3,
M_NAND_GPMC_CONFIG4,
M_NAND_GPMC_CONFIG5,
M_NAND_GPMC_CONFIG6, 0
};
#endif
void enable_gpmc_cs_config(const u32 *gpmc_config, struct gpmc_cs *cs, u32 base,
u32 size)
{
writel(0, &cs->config7);
sdelay(1000);
/* Delay for settling */
writel(gpmc_config[0], &cs->config1);
writel(gpmc_config[1], &cs->config2);
writel(gpmc_config[2], &cs->config3);
writel(gpmc_config[3], &cs->config4);
writel(gpmc_config[4], &cs->config5);
writel(gpmc_config[5], &cs->config6);
/* Enable the config */
writel((((size & 0xF) << 8) | ((base >> 24) & 0x3F) |
(1 << 6)), &cs->config7);
sdelay(2000);
}
/*****************************************************
* gpmc_init(): init gpmc bus
* Init GPMC for x16, MuxMode (SDRAM in x32).
* This code can only be executed from SRAM or SDRAM.
*****************************************************/
void gpmc_init(void)
{
/* putting a blanket check on GPMC based on ZeBu for now */
gpmc_cfg = (struct gpmc *)GPMC_BASE;
#ifdef CONFIG_CMD_NAND
const u32 *gpmc_config = NULL;
u32 base = 0;
u32 size = 0;
#endif
/* global settings */
writel(0x00000008, &gpmc_cfg->sysconfig);
writel(0x00000100, &gpmc_cfg->irqstatus);
writel(0x00000200, &gpmc_cfg->irqenable);
writel(0x00000012, &gpmc_cfg->config);
/*
* Disable the GPMC0 config set by ROM code
*/
writel(0, &gpmc_cfg->cs[0].config7);
sdelay(1000);
#ifdef CONFIG_CMD_NAND
gpmc_config = gpmc_m_nand;
base = PISMO1_NAND_BASE;
size = PISMO1_NAND_SIZE;
enable_gpmc_cs_config(gpmc_config, &gpmc_cfg->cs[0], base, size);
#endif
}

View File

@@ -0,0 +1,33 @@
/*
* mux.c
*
* Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation version 2.
*
* This program is distributed "as is" WITHOUT ANY WARRANTY of any
* kind, whether express or implied; without even the implied warranty
* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <common.h>
#include <asm/arch/mux.h>
#include <asm/arch/hardware.h>
#include <asm/io.h>
/*
* Configure the pin mux for the module
*/
void configure_module_pin_mux(struct module_pin_mux *mod_pin_mux)
{
int i;
if (!mod_pin_mux)
return;
for (i = 0; mod_pin_mux[i].reg_offset != -1; i++)
MUX_CFG(mod_pin_mux[i].val, mod_pin_mux[i].reg_offset);
}

View File

@@ -297,6 +297,12 @@ void arm_init_before_mmu(void)
v7_inval_tlb();
}
void mmu_page_table_flush(unsigned long start, unsigned long stop)
{
flush_dcache_range(start, stop);
v7_inval_tlb();
}
/*
* Flush range from all levels of d-cache/unified-cache used:
* Affects the range [start, start + size - 1]
@@ -329,6 +335,11 @@ void arm_init_before_mmu(void)
void flush_cache(unsigned long start, unsigned long size)
{
}
void mmu_page_table_flush(unsigned long start, unsigned long stop)
{
}
#endif /* #ifndef CONFIG_SYS_DCACHE_OFF */
#ifndef CONFIG_SYS_ICACHE_OFF

View File

@@ -26,8 +26,6 @@ PLATFORM_RELFLAGS += -fno-common -ffixed-r8 -msoft-float
# supported by more tool-chains
PF_CPPFLAGS_ARMV7 := $(call cc-option, -march=armv7-a, -march=armv5)
PLATFORM_CPPFLAGS += $(PF_CPPFLAGS_ARMV7)
PF_CPPFLAGS_NO_UNALIGNED := $(call cc-option, -mno-unaligned-access,)
PLATFORM_CPPFLAGS += $(PF_CPPFLAGS_NO_UNALIGNED)
# =========================================================================
#
@@ -36,6 +34,11 @@ PLATFORM_CPPFLAGS += $(PF_CPPFLAGS_NO_UNALIGNED)
# =========================================================================
PF_RELFLAGS_SLB_AT := $(call cc-option,-mshort-load-bytes,$(call cc-option,-malignment-traps,))
PLATFORM_RELFLAGS += $(PF_RELFLAGS_SLB_AT)
# SEE README.arm-unaligned-accesses
PF_NO_UNALIGNED := $(call cc-option, -mno-unaligned-access,)
PLATFORM_NO_UNALIGNED := $(PF_NO_UNALIGNED)
ifneq ($(CONFIG_IMX_CONFIG),)
ALL-y += $(obj)u-boot.imx
endif

View File

@@ -25,42 +25,32 @@
#include <asm/io.h>
#include <asm/arch/clock.h>
#include <asm/arch/clk.h>
#include <asm/arch/periph.h>
/* exynos4: return pll clock frequency */
static unsigned long exynos4_get_pll_clk(int pllreg)
/* Epll Clock division values to achive different frequency output */
static struct set_epll_con_val exynos5_epll_div[] = {
{ 192000000, 0, 48, 3, 1, 0 },
{ 180000000, 0, 45, 3, 1, 0 },
{ 73728000, 1, 73, 3, 3, 47710 },
{ 67737600, 1, 90, 4, 3, 20762 },
{ 49152000, 0, 49, 3, 3, 9961 },
{ 45158400, 0, 45, 3, 3, 10381 },
{ 180633600, 0, 45, 3, 1, 10381 }
};
/* exynos: return pll clock frequency */
static int exynos_get_pll_clk(int pllreg, unsigned int r, unsigned int k)
{
struct exynos4_clock *clk =
(struct exynos4_clock *)samsung_get_base_clock();
unsigned long r, m, p, s, k = 0, mask, fout;
unsigned long m, p, s = 0, mask, fout;
unsigned int freq;
switch (pllreg) {
case APLL:
r = readl(&clk->apll_con0);
break;
case MPLL:
r = readl(&clk->mpll_con0);
break;
case EPLL:
r = readl(&clk->epll_con0);
k = readl(&clk->epll_con1);
break;
case VPLL:
r = readl(&clk->vpll_con0);
k = readl(&clk->vpll_con1);
break;
default:
printf("Unsupported PLL (%d)\n", pllreg);
return 0;
}
/*
* APLL_CON: MIDV [25:16]
* MPLL_CON: MIDV [25:16]
* EPLL_CON: MIDV [24:16]
* VPLL_CON: MIDV [24:16]
* BPLL_CON: MIDV [25:16]: Exynos5
*/
if (pllreg == APLL || pllreg == MPLL)
if (pllreg == APLL || pllreg == MPLL || pllreg == BPLL)
mask = 0x3ff;
else
mask = 0x1ff;
@@ -92,13 +82,73 @@ static unsigned long exynos4_get_pll_clk(int pllreg)
return fout;
}
/* exynos4: return pll clock frequency */
static unsigned long exynos4_get_pll_clk(int pllreg)
{
struct exynos4_clock *clk =
(struct exynos4_clock *)samsung_get_base_clock();
unsigned long r, k = 0;
switch (pllreg) {
case APLL:
r = readl(&clk->apll_con0);
break;
case MPLL:
r = readl(&clk->mpll_con0);
break;
case EPLL:
r = readl(&clk->epll_con0);
k = readl(&clk->epll_con1);
break;
case VPLL:
r = readl(&clk->vpll_con0);
k = readl(&clk->vpll_con1);
break;
default:
printf("Unsupported PLL (%d)\n", pllreg);
return 0;
}
return exynos_get_pll_clk(pllreg, r, k);
}
/* exynos4x12: return pll clock frequency */
static unsigned long exynos4x12_get_pll_clk(int pllreg)
{
struct exynos4x12_clock *clk =
(struct exynos4x12_clock *)samsung_get_base_clock();
unsigned long r, k = 0;
switch (pllreg) {
case APLL:
r = readl(&clk->apll_con0);
break;
case MPLL:
r = readl(&clk->mpll_con0);
break;
case EPLL:
r = readl(&clk->epll_con0);
k = readl(&clk->epll_con1);
break;
case VPLL:
r = readl(&clk->vpll_con0);
k = readl(&clk->vpll_con1);
break;
default:
printf("Unsupported PLL (%d)\n", pllreg);
return 0;
}
return exynos_get_pll_clk(pllreg, r, k);
}
/* exynos5: return pll clock frequency */
static unsigned long exynos5_get_pll_clk(int pllreg)
{
struct exynos5_clock *clk =
(struct exynos5_clock *)samsung_get_base_clock();
unsigned long r, m, p, s, k = 0, mask, fout;
unsigned int freq, pll_div2_sel, fout_sel;
unsigned long r, k = 0, fout;
unsigned int pll_div2_sel, fout_sel;
switch (pllreg) {
case APLL:
@@ -123,41 +173,7 @@ static unsigned long exynos5_get_pll_clk(int pllreg)
return 0;
}
/*
* APLL_CON: MIDV [25:16]
* MPLL_CON: MIDV [25:16]
* EPLL_CON: MIDV [24:16]
* VPLL_CON: MIDV [24:16]
* BPLL_CON: MIDV [25:16]
*/
if (pllreg == APLL || pllreg == MPLL || pllreg == BPLL)
mask = 0x3ff;
else
mask = 0x1ff;
m = (r >> 16) & mask;
/* PDIV [13:8] */
p = (r >> 8) & 0x3f;
/* SDIV [2:0] */
s = r & 0x7;
freq = CONFIG_SYS_CLK_FREQ;
if (pllreg == EPLL) {
k = k & 0xffff;
/* FOUT = (MDIV + K / 65536) * FIN / (PDIV * 2^SDIV) */
fout = (m + k / 65536) * (freq / (p * (1 << s)));
} else if (pllreg == VPLL) {
k = k & 0xfff;
/* FOUT = (MDIV + K / 1024) * FIN / (PDIV * 2^SDIV) */
fout = (m + k / 1024) * (freq / (p * (1 << s)));
} else {
if (s < 1)
s = 1;
/* FOUT = MDIV * FIN / (PDIV * 2^(SDIV - 1)) */
fout = m * (freq / (p * (1 << (s - 1))));
}
fout = exynos_get_pll_clk(pllreg, r, k);
/* According to the user manual, in EVT1 MPLL and BPLL always gives
* 1.6GHz clock, so divide by 2 to get 800MHz MPLL clock.*/
@@ -207,6 +223,28 @@ static unsigned long exynos4_get_arm_clk(void)
return armclk;
}
/* exynos4x12: return ARM clock frequency */
static unsigned long exynos4x12_get_arm_clk(void)
{
struct exynos4x12_clock *clk =
(struct exynos4x12_clock *)samsung_get_base_clock();
unsigned long div;
unsigned long armclk;
unsigned int core_ratio;
unsigned int core2_ratio;
div = readl(&clk->div_cpu0);
/* CORE_RATIO: [2:0], CORE2_RATIO: [30:28] */
core_ratio = (div >> 0) & 0x7;
core2_ratio = (div >> 28) & 0x7;
armclk = get_pll_clk(APLL) / (core_ratio + 1);
armclk /= (core2_ratio + 1);
return armclk;
}
/* exynos5: return ARM clock frequency */
static unsigned long exynos5_get_arm_clk(void)
{
@@ -272,6 +310,20 @@ static unsigned long exynos4_get_pwm_clk(void)
return pclk;
}
/* exynos4x12: return pwm clock frequency */
static unsigned long exynos4x12_get_pwm_clk(void)
{
unsigned long pclk, sclk;
unsigned int ratio;
sclk = get_pll_clk(MPLL);
ratio = 8;
pclk = sclk / (ratio + 1);
return pclk;
}
/* exynos5: return pwm clock frequency */
static unsigned long exynos5_get_pwm_clk(void)
{
@@ -340,6 +392,51 @@ static unsigned long exynos4_get_uart_clk(int dev_index)
return uclk;
}
/* exynos4x12: return uart clock frequency */
static unsigned long exynos4x12_get_uart_clk(int dev_index)
{
struct exynos4x12_clock *clk =
(struct exynos4x12_clock *)samsung_get_base_clock();
unsigned long uclk, sclk;
unsigned int sel;
unsigned int ratio;
/*
* CLK_SRC_PERIL0
* UART0_SEL [3:0]
* UART1_SEL [7:4]
* UART2_SEL [8:11]
* UART3_SEL [12:15]
* UART4_SEL [16:19]
*/
sel = readl(&clk->src_peril0);
sel = (sel >> (dev_index << 2)) & 0xf;
if (sel == 0x6)
sclk = get_pll_clk(MPLL);
else if (sel == 0x7)
sclk = get_pll_clk(EPLL);
else if (sel == 0x8)
sclk = get_pll_clk(VPLL);
else
return 0;
/*
* CLK_DIV_PERIL0
* UART0_RATIO [3:0]
* UART1_RATIO [7:4]
* UART2_RATIO [8:11]
* UART3_RATIO [12:15]
* UART4_RATIO [16:19]
*/
ratio = readl(&clk->div_peril0);
ratio = (ratio >> (dev_index << 2)) & 0xf;
uclk = sclk / (ratio + 1);
return uclk;
}
/* exynos5: return uart clock frequency */
static unsigned long exynos5_get_uart_clk(int dev_index)
{
@@ -387,6 +484,100 @@ static unsigned long exynos5_get_uart_clk(int dev_index)
return uclk;
}
static unsigned long exynos4_get_mmc_clk(int dev_index)
{
struct exynos4_clock *clk =
(struct exynos4_clock *)samsung_get_base_clock();
unsigned long uclk, sclk;
unsigned int sel, ratio, pre_ratio;
int shift;
sel = readl(&clk->src_fsys);
sel = (sel >> (dev_index << 2)) & 0xf;
if (sel == 0x6)
sclk = get_pll_clk(MPLL);
else if (sel == 0x7)
sclk = get_pll_clk(EPLL);
else if (sel == 0x8)
sclk = get_pll_clk(VPLL);
else
return 0;
switch (dev_index) {
case 0:
case 1:
ratio = readl(&clk->div_fsys1);
pre_ratio = readl(&clk->div_fsys1);
break;
case 2:
case 3:
ratio = readl(&clk->div_fsys2);
pre_ratio = readl(&clk->div_fsys2);
break;
case 4:
ratio = readl(&clk->div_fsys3);
pre_ratio = readl(&clk->div_fsys3);
break;
default:
return 0;
}
if (dev_index == 1 || dev_index == 3)
shift = 16;
ratio = (ratio >> shift) & 0xf;
pre_ratio = (pre_ratio >> (shift + 8)) & 0xff;
uclk = (sclk / (ratio + 1)) / (pre_ratio + 1);
return uclk;
}
static unsigned long exynos5_get_mmc_clk(int dev_index)
{
struct exynos5_clock *clk =
(struct exynos5_clock *)samsung_get_base_clock();
unsigned long uclk, sclk;
unsigned int sel, ratio, pre_ratio;
int shift;
sel = readl(&clk->src_fsys);
sel = (sel >> (dev_index << 2)) & 0xf;
if (sel == 0x6)
sclk = get_pll_clk(MPLL);
else if (sel == 0x7)
sclk = get_pll_clk(EPLL);
else if (sel == 0x8)
sclk = get_pll_clk(VPLL);
else
return 0;
switch (dev_index) {
case 0:
case 1:
ratio = readl(&clk->div_fsys1);
pre_ratio = readl(&clk->div_fsys1);
break;
case 2:
case 3:
ratio = readl(&clk->div_fsys2);
pre_ratio = readl(&clk->div_fsys2);
break;
default:
return 0;
}
if (dev_index == 1 || dev_index == 3)
shift = 16;
ratio = (ratio >> shift) & 0xf;
pre_ratio = (pre_ratio >> (shift + 8)) & 0xff;
uclk = (sclk / (ratio + 1)) / (pre_ratio + 1);
return uclk;
}
/* exynos4: set the mmc clock */
static void exynos4_set_mmc_clk(int dev_index, unsigned int div)
{
@@ -395,6 +586,38 @@ static void exynos4_set_mmc_clk(int dev_index, unsigned int div)
unsigned int addr;
unsigned int val;
/*
* CLK_DIV_FSYS1
* MMC0_PRE_RATIO [15:8], MMC1_PRE_RATIO [31:24]
* CLK_DIV_FSYS2
* MMC2_PRE_RATIO [15:8], MMC3_PRE_RATIO [31:24]
* CLK_DIV_FSYS3
* MMC4_PRE_RATIO [15:8]
*/
if (dev_index < 2) {
addr = (unsigned int)&clk->div_fsys1;
} else if (dev_index == 4) {
addr = (unsigned int)&clk->div_fsys3;
dev_index -= 4;
} else {
addr = (unsigned int)&clk->div_fsys2;
dev_index -= 2;
}
val = readl(addr);
val &= ~(0xff << ((dev_index << 4) + 8));
val |= (div & 0xff) << ((dev_index << 4) + 8);
writel(val, addr);
}
/* exynos4x12: set the mmc clock */
static void exynos4x12_set_mmc_clk(int dev_index, unsigned int div)
{
struct exynos4x12_clock *clk =
(struct exynos4x12_clock *)samsung_get_base_clock();
unsigned int addr;
unsigned int val;
/*
* CLK_DIV_FSYS1
* MMC0_PRE_RATIO [15:8], MMC1_PRE_RATIO [31:24]
@@ -617,7 +840,7 @@ void exynos5_set_lcd_clk(void)
*/
cfg = readl(&clk->src_disp1_0);
cfg &= ~(0xf);
cfg |= 0x8;
cfg |= 0x6;
writel(cfg, &clk->src_disp1_0);
/*
@@ -732,26 +955,252 @@ static unsigned long exynos5_get_i2c_clk(void)
return aclk_66;
}
int exynos5_set_epll_clk(unsigned long rate)
{
unsigned int epll_con, epll_con_k;
unsigned int i;
unsigned int lockcnt;
unsigned int start;
struct exynos5_clock *clk =
(struct exynos5_clock *)samsung_get_base_clock();
epll_con = readl(&clk->epll_con0);
epll_con &= ~((EPLL_CON0_LOCK_DET_EN_MASK <<
EPLL_CON0_LOCK_DET_EN_SHIFT) |
EPLL_CON0_MDIV_MASK << EPLL_CON0_MDIV_SHIFT |
EPLL_CON0_PDIV_MASK << EPLL_CON0_PDIV_SHIFT |
EPLL_CON0_SDIV_MASK << EPLL_CON0_SDIV_SHIFT);
for (i = 0; i < ARRAY_SIZE(exynos5_epll_div); i++) {
if (exynos5_epll_div[i].freq_out == rate)
break;
}
if (i == ARRAY_SIZE(exynos5_epll_div))
return -1;
epll_con_k = exynos5_epll_div[i].k_dsm << 0;
epll_con |= exynos5_epll_div[i].en_lock_det <<
EPLL_CON0_LOCK_DET_EN_SHIFT;
epll_con |= exynos5_epll_div[i].m_div << EPLL_CON0_MDIV_SHIFT;
epll_con |= exynos5_epll_div[i].p_div << EPLL_CON0_PDIV_SHIFT;
epll_con |= exynos5_epll_div[i].s_div << EPLL_CON0_SDIV_SHIFT;
/*
* Required period ( in cycles) to genarate a stable clock output.
* The maximum clock time can be up to 3000 * PDIV cycles of PLLs
* frequency input (as per spec)
*/
lockcnt = 3000 * exynos5_epll_div[i].p_div;
writel(lockcnt, &clk->epll_lock);
writel(epll_con, &clk->epll_con0);
writel(epll_con_k, &clk->epll_con1);
start = get_timer(0);
while (!(readl(&clk->epll_con0) &
(0x1 << EXYNOS5_EPLLCON0_LOCKED_SHIFT))) {
if (get_timer(start) > TIMEOUT_EPLL_LOCK) {
debug("%s: Timeout waiting for EPLL lock\n", __func__);
return -1;
}
}
return 0;
}
void exynos5_set_i2s_clk_source(void)
{
struct exynos5_clock *clk =
(struct exynos5_clock *)samsung_get_base_clock();
clrsetbits_le32(&clk->src_peric1, AUDIO1_SEL_MASK,
(CLK_SRC_SCLK_EPLL));
}
int exynos5_set_i2s_clk_prescaler(unsigned int src_frq,
unsigned int dst_frq)
{
struct exynos5_clock *clk =
(struct exynos5_clock *)samsung_get_base_clock();
unsigned int div;
if ((dst_frq == 0) || (src_frq == 0)) {
debug("%s: Invalid requency input for prescaler\n", __func__);
debug("src frq = %d des frq = %d ", src_frq, dst_frq);
return -1;
}
div = (src_frq / dst_frq);
if (div > AUDIO_1_RATIO_MASK) {
debug("%s: Frequency ratio is out of range\n", __func__);
debug("src frq = %d des frq = %d ", src_frq, dst_frq);
return -1;
}
clrsetbits_le32(&clk->div_peric4, AUDIO_1_RATIO_MASK,
(div & AUDIO_1_RATIO_MASK));
return 0;
}
/**
* Linearly searches for the most accurate main and fine stage clock scalars
* (divisors) for a specified target frequency and scalar bit sizes by checking
* all multiples of main_scalar_bits values. Will always return scalars up to or
* slower than target.
*
* @param main_scalar_bits Number of main scalar bits, must be > 0 and < 32
* @param fine_scalar_bits Number of fine scalar bits, must be > 0 and < 32
* @param input_freq Clock frequency to be scaled in Hz
* @param target_freq Desired clock frequency in Hz
* @param best_fine_scalar Pointer to store the fine stage divisor
*
* @return best_main_scalar Main scalar for desired frequency or -1 if none
* found
*/
static int clock_calc_best_scalar(unsigned int main_scaler_bits,
unsigned int fine_scalar_bits, unsigned int input_rate,
unsigned int target_rate, unsigned int *best_fine_scalar)
{
int i;
int best_main_scalar = -1;
unsigned int best_error = target_rate;
const unsigned int cap = (1 << fine_scalar_bits) - 1;
const unsigned int loops = 1 << main_scaler_bits;
debug("Input Rate is %u, Target is %u, Cap is %u\n", input_rate,
target_rate, cap);
assert(best_fine_scalar != NULL);
assert(main_scaler_bits <= fine_scalar_bits);
*best_fine_scalar = 1;
if (input_rate == 0 || target_rate == 0)
return -1;
if (target_rate >= input_rate)
return 1;
for (i = 1; i <= loops; i++) {
const unsigned int effective_div = max(min(input_rate / i /
target_rate, cap), 1);
const unsigned int effective_rate = input_rate / i /
effective_div;
const int error = target_rate - effective_rate;
debug("%d|effdiv:%u, effrate:%u, error:%d\n", i, effective_div,
effective_rate, error);
if (error >= 0 && error <= best_error) {
best_error = error;
best_main_scalar = i;
*best_fine_scalar = effective_div;
}
}
return best_main_scalar;
}
static int exynos5_set_spi_clk(enum periph_id periph_id,
unsigned int rate)
{
struct exynos5_clock *clk =
(struct exynos5_clock *)samsung_get_base_clock();
int main;
unsigned int fine;
unsigned shift, pre_shift;
unsigned mask = 0xff;
u32 *reg;
main = clock_calc_best_scalar(4, 8, 400000000, rate, &fine);
if (main < 0) {
debug("%s: Cannot set clock rate for periph %d",
__func__, periph_id);
return -1;
}
main = main - 1;
fine = fine - 1;
switch (periph_id) {
case PERIPH_ID_SPI0:
reg = &clk->div_peric1;
shift = 0;
pre_shift = 8;
break;
case PERIPH_ID_SPI1:
reg = &clk->div_peric1;
shift = 16;
pre_shift = 24;
break;
case PERIPH_ID_SPI2:
reg = &clk->div_peric2;
shift = 0;
pre_shift = 8;
break;
case PERIPH_ID_SPI3:
reg = &clk->sclk_div_isp;
shift = 0;
pre_shift = 4;
break;
case PERIPH_ID_SPI4:
reg = &clk->sclk_div_isp;
shift = 12;
pre_shift = 16;
break;
default:
debug("%s: Unsupported peripheral ID %d\n", __func__,
periph_id);
return -1;
}
clrsetbits_le32(reg, mask << shift, (main & mask) << shift);
clrsetbits_le32(reg, mask << pre_shift, (fine & mask) << pre_shift);
return 0;
}
static unsigned long exynos4_get_i2c_clk(void)
{
struct exynos4_clock *clk =
(struct exynos4_clock *)samsung_get_base_clock();
unsigned long sclk, aclk_100;
unsigned int ratio;
sclk = get_pll_clk(APLL);
ratio = (readl(&clk->div_top)) >> 4;
ratio &= 0xf;
aclk_100 = sclk / (ratio + 1);
return aclk_100;
}
unsigned long get_pll_clk(int pllreg)
{
if (cpu_is_exynos5())
return exynos5_get_pll_clk(pllreg);
else
else {
if (proid_is_exynos4412())
return exynos4x12_get_pll_clk(pllreg);
return exynos4_get_pll_clk(pllreg);
}
}
unsigned long get_arm_clk(void)
{
if (cpu_is_exynos5())
return exynos5_get_arm_clk();
else
else {
if (proid_is_exynos4412())
return exynos4x12_get_arm_clk();
return exynos4_get_arm_clk();
}
}
unsigned long get_i2c_clk(void)
{
if (cpu_is_exynos5()) {
return exynos5_get_i2c_clk();
} else if (cpu_is_exynos4()) {
return exynos4_get_i2c_clk();
} else {
debug("I2C clock is not set for this CPU\n");
return 0;
@@ -762,24 +1211,41 @@ unsigned long get_pwm_clk(void)
{
if (cpu_is_exynos5())
return exynos5_get_pwm_clk();
else
else {
if (proid_is_exynos4412())
return exynos4x12_get_pwm_clk();
return exynos4_get_pwm_clk();
}
}
unsigned long get_uart_clk(int dev_index)
{
if (cpu_is_exynos5())
return exynos5_get_uart_clk(dev_index);
else
else {
if (proid_is_exynos4412())
return exynos4x12_get_uart_clk(dev_index);
return exynos4_get_uart_clk(dev_index);
}
}
unsigned long get_mmc_clk(int dev_index)
{
if (cpu_is_exynos5())
return exynos5_get_mmc_clk(dev_index);
else
return exynos4_get_mmc_clk(dev_index);
}
void set_mmc_clk(int dev_index, unsigned int div)
{
if (cpu_is_exynos5())
exynos5_set_mmc_clk(dev_index, div);
else
else {
if (proid_is_exynos4412())
exynos4x12_set_mmc_clk(dev_index, div);
exynos4_set_mmc_clk(dev_index, div);
}
}
unsigned long get_lcd_clk(void)
@@ -803,3 +1269,34 @@ void set_mipi_clk(void)
if (cpu_is_exynos4())
exynos4_set_mipi_clk();
}
int set_spi_clk(int periph_id, unsigned int rate)
{
if (cpu_is_exynos5())
return exynos5_set_spi_clk(periph_id, rate);
else
return 0;
}
int set_i2s_clk_prescaler(unsigned int src_frq, unsigned int dst_frq)
{
if (cpu_is_exynos5())
return exynos5_set_i2s_clk_prescaler(src_frq, dst_frq);
else
return 0;
}
void set_i2s_clk_source(void)
{
if (cpu_is_exynos5())
exynos5_set_i2s_clk_source();
}
int set_epll_clk(unsigned long rate)
{
if (cpu_is_exynos5())
return exynos5_set_epll_clk(rate);
else
return 0;
}

View File

@@ -22,6 +22,7 @@
*/
#include <common.h>
#include <fdtdec.h>
#include <asm/arch/gpio.h>
#include <asm/arch/pinmux.h>
#include <asm/arch/sromc.h>
@@ -112,6 +113,7 @@ static int exynos5_mmc_config(int peripheral, int flags)
s5p_gpio_set_pull(bank, i, GPIO_PULL_UP);
s5p_gpio_set_drv(bank, i, GPIO_DRV_4X);
}
return 0;
}
@@ -230,6 +232,59 @@ static void exynos5_i2c_config(int peripheral, int flags)
}
}
static void exynos5_i2s_config(int peripheral)
{
int i;
struct exynos5_gpio_part1 *gpio1 =
(struct exynos5_gpio_part1 *) samsung_get_base_gpio_part1();
for (i = 0; i < 5; i++)
s5p_gpio_cfg_pin(&gpio1->b0, i, GPIO_FUNC(0x02));
}
void exynos5_spi_config(int peripheral)
{
int cfg = 0, pin = 0, i;
struct s5p_gpio_bank *bank = NULL;
struct exynos5_gpio_part1 *gpio1 =
(struct exynos5_gpio_part1 *) samsung_get_base_gpio_part1();
struct exynos5_gpio_part2 *gpio2 =
(struct exynos5_gpio_part2 *) samsung_get_base_gpio_part2();
switch (peripheral) {
case PERIPH_ID_SPI0:
bank = &gpio1->a2;
cfg = GPIO_FUNC(0x2);
pin = 0;
break;
case PERIPH_ID_SPI1:
bank = &gpio1->a2;
cfg = GPIO_FUNC(0x2);
pin = 4;
break;
case PERIPH_ID_SPI2:
bank = &gpio1->b1;
cfg = GPIO_FUNC(0x5);
pin = 1;
break;
case PERIPH_ID_SPI3:
bank = &gpio2->f1;
cfg = GPIO_FUNC(0x2);
pin = 0;
break;
case PERIPH_ID_SPI4:
for (i = 0; i < 2; i++) {
s5p_gpio_cfg_pin(&gpio2->f0, i + 2, GPIO_FUNC(0x4));
s5p_gpio_cfg_pin(&gpio2->e0, i + 4, GPIO_FUNC(0x4));
}
break;
}
if (peripheral != PERIPH_ID_SPI4) {
for (i = pin; i < pin + 4; i++)
s5p_gpio_cfg_pin(bank, i, cfg);
}
}
static int exynos5_pinmux_config(int peripheral, int flags)
{
switch (peripheral) {
@@ -257,6 +312,123 @@ static int exynos5_pinmux_config(int peripheral, int flags)
case PERIPH_ID_I2C7:
exynos5_i2c_config(peripheral, flags);
break;
case PERIPH_ID_I2S1:
exynos5_i2s_config(peripheral);
break;
case PERIPH_ID_SPI0:
case PERIPH_ID_SPI1:
case PERIPH_ID_SPI2:
case PERIPH_ID_SPI3:
case PERIPH_ID_SPI4:
exynos5_spi_config(peripheral);
break;
default:
debug("%s: invalid peripheral %d", __func__, peripheral);
return -1;
}
return 0;
}
static void exynos4_i2c_config(int peripheral, int flags)
{
struct exynos4_gpio_part1 *gpio1 =
(struct exynos4_gpio_part1 *) samsung_get_base_gpio_part1();
switch (peripheral) {
case PERIPH_ID_I2C0:
s5p_gpio_cfg_pin(&gpio1->d1, 0, GPIO_FUNC(0x2));
s5p_gpio_cfg_pin(&gpio1->d1, 1, GPIO_FUNC(0x2));
break;
case PERIPH_ID_I2C1:
s5p_gpio_cfg_pin(&gpio1->d1, 2, GPIO_FUNC(0x2));
s5p_gpio_cfg_pin(&gpio1->d1, 3, GPIO_FUNC(0x2));
break;
case PERIPH_ID_I2C2:
s5p_gpio_cfg_pin(&gpio1->a0, 6, GPIO_FUNC(0x3));
s5p_gpio_cfg_pin(&gpio1->a0, 7, GPIO_FUNC(0x3));
break;
case PERIPH_ID_I2C3:
s5p_gpio_cfg_pin(&gpio1->a1, 2, GPIO_FUNC(0x3));
s5p_gpio_cfg_pin(&gpio1->a1, 3, GPIO_FUNC(0x3));
break;
case PERIPH_ID_I2C4:
s5p_gpio_cfg_pin(&gpio1->b, 2, GPIO_FUNC(0x3));
s5p_gpio_cfg_pin(&gpio1->b, 3, GPIO_FUNC(0x3));
break;
case PERIPH_ID_I2C5:
s5p_gpio_cfg_pin(&gpio1->b, 6, GPIO_FUNC(0x3));
s5p_gpio_cfg_pin(&gpio1->b, 7, GPIO_FUNC(0x3));
break;
case PERIPH_ID_I2C6:
s5p_gpio_cfg_pin(&gpio1->c1, 3, GPIO_FUNC(0x4));
s5p_gpio_cfg_pin(&gpio1->c1, 4, GPIO_FUNC(0x4));
break;
case PERIPH_ID_I2C7:
s5p_gpio_cfg_pin(&gpio1->d0, 2, GPIO_FUNC(0x3));
s5p_gpio_cfg_pin(&gpio1->d0, 3, GPIO_FUNC(0x3));
break;
}
}
static int exynos4_mmc_config(int peripheral, int flags)
{
struct exynos4_gpio_part2 *gpio2 =
(struct exynos4_gpio_part2 *)samsung_get_base_gpio_part2();
struct s5p_gpio_bank *bank, *bank_ext;
int i;
switch (peripheral) {
case PERIPH_ID_SDMMC0:
bank = &gpio2->k0;
bank_ext = &gpio2->k1;
break;
case PERIPH_ID_SDMMC2:
bank = &gpio2->k2;
bank_ext = &gpio2->k3;
break;
default:
return -1;
}
for (i = 0; i < 7; i++) {
if (i == 2)
continue;
s5p_gpio_cfg_pin(bank, i, GPIO_FUNC(0x2));
s5p_gpio_set_pull(bank, i, GPIO_PULL_NONE);
s5p_gpio_set_drv(bank, i, GPIO_DRV_4X);
}
if (flags & PINMUX_FLAG_8BIT_MODE) {
for (i = 3; i < 7; i++) {
s5p_gpio_cfg_pin(bank_ext, i, GPIO_FUNC(0x3));
s5p_gpio_set_pull(bank_ext, i, GPIO_PULL_NONE);
s5p_gpio_set_drv(bank_ext, i, GPIO_DRV_4X);
}
}
return 0;
}
static int exynos4_pinmux_config(int peripheral, int flags)
{
switch (peripheral) {
case PERIPH_ID_I2C0:
case PERIPH_ID_I2C1:
case PERIPH_ID_I2C2:
case PERIPH_ID_I2C3:
case PERIPH_ID_I2C4:
case PERIPH_ID_I2C5:
case PERIPH_ID_I2C6:
case PERIPH_ID_I2C7:
exynos4_i2c_config(peripheral, flags);
break;
case PERIPH_ID_SDMMC0:
case PERIPH_ID_SDMMC2:
return exynos4_mmc_config(peripheral, flags);
case PERIPH_ID_SDMMC1:
case PERIPH_ID_SDMMC3:
case PERIPH_ID_SDMMC4:
printf("SDMMC device %d not implemented\n", peripheral);
return -1;
default:
debug("%s: invalid peripheral %d", __func__, peripheral);
return -1;
@@ -269,8 +441,38 @@ int exynos_pinmux_config(int peripheral, int flags)
{
if (cpu_is_exynos5())
return exynos5_pinmux_config(peripheral, flags);
else if (cpu_is_exynos4())
return exynos4_pinmux_config(peripheral, flags);
else {
debug("pinmux functionality not supported\n");
return -1;
}
}
#ifdef CONFIG_OF_CONTROL
static int exynos5_pinmux_decode_periph_id(const void *blob, int node)
{
int err;
u32 cell[3];
err = fdtdec_get_int_array(blob, node, "interrupts", cell,
ARRAY_SIZE(cell));
if (err)
return PERIPH_ID_NONE;
/* check for invalid peripheral id */
if ((PERIPH_ID_SDMMC4 > cell[1]) || (cell[1] < PERIPH_ID_UART0))
return cell[1];
debug(" invalid peripheral id\n");
return PERIPH_ID_NONE;
}
int pinmux_decode_periph_id(const void *blob, int node)
{
if (cpu_is_exynos5())
return exynos5_pinmux_decode_periph_id(blob, node);
else
return PERIPH_ID_NONE;
}
#endif

View File

@@ -36,7 +36,9 @@ enum pll_clocks {
PLL1_CLOCK = 0,
PLL2_CLOCK,
PLL3_CLOCK,
#ifdef CONFIG_MX53
PLL4_CLOCK,
#endif
PLL_CLOCKS,
};
@@ -69,7 +71,7 @@ struct fixed_pll_mfd {
};
const struct fixed_pll_mfd fixed_mfd[] = {
{CONFIG_SYS_MX5_HCLK, 24 * 16},
{MXC_HCLK, 24 * 16},
};
struct pll_param {
@@ -89,95 +91,85 @@ struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)MXC_CCM_BASE;
void set_usboh3_clk(void)
{
unsigned int reg;
reg = readl(&mxc_ccm->cscmr1) &
~MXC_CCM_CSCMR1_USBOH3_CLK_SEL_MASK;
reg |= 1 << MXC_CCM_CSCMR1_USBOH3_CLK_SEL_OFFSET;
writel(reg, &mxc_ccm->cscmr1);
reg = readl(&mxc_ccm->cscdr1);
reg &= ~MXC_CCM_CSCDR1_USBOH3_CLK_PODF_MASK;
reg &= ~MXC_CCM_CSCDR1_USBOH3_CLK_PRED_MASK;
reg |= 4 << MXC_CCM_CSCDR1_USBOH3_CLK_PRED_OFFSET;
reg |= 1 << MXC_CCM_CSCDR1_USBOH3_CLK_PODF_OFFSET;
writel(reg, &mxc_ccm->cscdr1);
clrsetbits_le32(&mxc_ccm->cscmr1,
MXC_CCM_CSCMR1_USBOH3_CLK_SEL_MASK,
MXC_CCM_CSCMR1_USBOH3_CLK_SEL(1));
clrsetbits_le32(&mxc_ccm->cscdr1,
MXC_CCM_CSCDR1_USBOH3_CLK_PODF_MASK |
MXC_CCM_CSCDR1_USBOH3_CLK_PRED_MASK,
MXC_CCM_CSCDR1_USBOH3_CLK_PRED(4) |
MXC_CCM_CSCDR1_USBOH3_CLK_PODF(1));
}
void enable_usboh3_clk(unsigned char enable)
{
unsigned int reg;
unsigned int cg = enable ? MXC_CCM_CCGR_CG_ON : MXC_CCM_CCGR_CG_OFF;
reg = readl(&mxc_ccm->CCGR2);
if (enable)
reg |= 1 << MXC_CCM_CCGR2_CG14_OFFSET;
else
reg &= ~(1 << MXC_CCM_CCGR2_CG14_OFFSET);
writel(reg, &mxc_ccm->CCGR2);
clrsetbits_le32(&mxc_ccm->CCGR2,
MXC_CCM_CCGR2_USBOH3_60M(MXC_CCM_CCGR_CG_MASK),
MXC_CCM_CCGR2_USBOH3_60M(cg));
}
#ifdef CONFIG_I2C_MXC
/* i2c_num can be from 0 - 2 */
/* i2c_num can be from 0, to 1 for i.MX51 and 2 for i.MX53 */
int enable_i2c_clk(unsigned char enable, unsigned i2c_num)
{
u32 reg;
u32 mask;
#if defined(CONFIG_MX51)
if (i2c_num > 1)
#elif defined(CONFIG_MX53)
if (i2c_num > 2)
#endif
return -EINVAL;
mask = MXC_CCM_CCGR_CG_MASK << ((i2c_num + 9) << 1);
reg = __raw_readl(&mxc_ccm->CCGR1);
mask = MXC_CCM_CCGR_CG_MASK <<
(MXC_CCM_CCGR1_I2C1_OFFSET + (i2c_num << 1));
if (enable)
reg |= mask;
setbits_le32(&mxc_ccm->CCGR1, mask);
else
reg &= ~mask;
__raw_writel(reg, &mxc_ccm->CCGR1);
clrbits_le32(&mxc_ccm->CCGR1, mask);
return 0;
}
#endif
void set_usb_phy1_clk(void)
void set_usb_phy_clk(void)
{
unsigned int reg;
reg = readl(&mxc_ccm->cscmr1);
reg &= ~MXC_CCM_CSCMR1_USB_PHY_CLK_SEL;
writel(reg, &mxc_ccm->cscmr1);
clrbits_le32(&mxc_ccm->cscmr1, MXC_CCM_CSCMR1_USB_PHY_CLK_SEL);
}
#if defined(CONFIG_MX51)
void enable_usb_phy1_clk(unsigned char enable)
{
unsigned int reg;
unsigned int cg = enable ? MXC_CCM_CCGR_CG_ON : MXC_CCM_CCGR_CG_OFF;
reg = readl(&mxc_ccm->CCGR4);
if (enable)
reg |= 1 << MXC_CCM_CCGR4_CG5_OFFSET;
else
reg &= ~(1 << MXC_CCM_CCGR4_CG5_OFFSET);
writel(reg, &mxc_ccm->CCGR4);
}
void set_usb_phy2_clk(void)
{
unsigned int reg;
reg = readl(&mxc_ccm->cscmr1);
reg &= ~MXC_CCM_CSCMR1_USB_PHY_CLK_SEL;
writel(reg, &mxc_ccm->cscmr1);
clrsetbits_le32(&mxc_ccm->CCGR2,
MXC_CCM_CCGR2_USB_PHY(MXC_CCM_CCGR_CG_MASK),
MXC_CCM_CCGR2_USB_PHY(cg));
}
void enable_usb_phy2_clk(unsigned char enable)
{
unsigned int reg;
reg = readl(&mxc_ccm->CCGR4);
if (enable)
reg |= 1 << MXC_CCM_CCGR4_CG6_OFFSET;
else
reg &= ~(1 << MXC_CCM_CCGR4_CG6_OFFSET);
writel(reg, &mxc_ccm->CCGR4);
/* i.MX51 has a single USB PHY clock, so do nothing here. */
}
#elif defined(CONFIG_MX53)
void enable_usb_phy1_clk(unsigned char enable)
{
unsigned int cg = enable ? MXC_CCM_CCGR_CG_ON : MXC_CCM_CCGR_CG_OFF;
clrsetbits_le32(&mxc_ccm->CCGR4,
MXC_CCM_CCGR4_USB_PHY1(MXC_CCM_CCGR_CG_MASK),
MXC_CCM_CCGR4_USB_PHY1(cg));
}
void enable_usb_phy2_clk(unsigned char enable)
{
unsigned int cg = enable ? MXC_CCM_CCGR_CG_ON : MXC_CCM_CCGR_CG_OFF;
clrsetbits_le32(&mxc_ccm->CCGR4,
MXC_CCM_CCGR4_USB_PHY2(MXC_CCM_CCGR_CG_MASK),
MXC_CCM_CCGR4_USB_PHY2(cg));
}
#endif
/*
* Calculate the frequency of PLLn.
@@ -191,19 +183,19 @@ static uint32_t decode_pll(struct mxc_pll_reg *pll, uint32_t infreq)
ctrl = readl(&pll->ctrl);
if (ctrl & MXC_DPLLC_CTL_HFSM) {
mfn = __raw_readl(&pll->hfs_mfn);
mfd = __raw_readl(&pll->hfs_mfd);
op = __raw_readl(&pll->hfs_op);
mfn = readl(&pll->hfs_mfn);
mfd = readl(&pll->hfs_mfd);
op = readl(&pll->hfs_op);
} else {
mfn = __raw_readl(&pll->mfn);
mfd = __raw_readl(&pll->mfd);
op = __raw_readl(&pll->op);
mfn = readl(&pll->mfn);
mfd = readl(&pll->mfd);
op = readl(&pll->op);
}
mfd &= MXC_DPLLC_MFD_MFD_MASK;
mfn &= MXC_DPLLC_MFN_MFN_MASK;
pdf = op & MXC_DPLLC_OP_PDF_MASK;
mfi = (op & MXC_DPLLC_OP_MFI_MASK) >> MXC_DPLLC_OP_MFI_OFFSET;
mfi = MXC_DPLLC_OP_MFI_RD(op);
/* 21.2.3 */
if (mfi < 5)
@@ -233,6 +225,44 @@ static uint32_t decode_pll(struct mxc_pll_reg *pll, uint32_t infreq)
return ret;
}
#ifdef CONFIG_MX51
/*
* This function returns the Frequency Pre-Multiplier clock.
*/
static u32 get_fpm(void)
{
u32 mult;
u32 ccr = readl(&mxc_ccm->ccr);
if (ccr & MXC_CCM_CCR_FPM_MULT)
mult = 1024;
else
mult = 512;
return MXC_CLK32 * mult;
}
#endif
/*
* This function returns the low power audio clock.
*/
static u32 get_lp_apm(void)
{
u32 ret_val = 0;
u32 ccsr = readl(&mxc_ccm->ccsr);
if (ccsr & MXC_CCM_CCSR_LP_APM)
#if defined(CONFIG_MX51)
ret_val = get_fpm();
#elif defined(CONFIG_MX53)
ret_val = decode_pll(mxc_plls[PLL4_CLOCK], MXC_HCLK);
#endif
else
ret_val = MXC_HCLK;
return ret_val;
}
/*
* Get mcu main rate
*/
@@ -240,9 +270,8 @@ u32 get_mcu_main_clk(void)
{
u32 reg, freq;
reg = (__raw_readl(&mxc_ccm->cacrr) & MXC_CCM_CACRR_ARM_PODF_MASK) >>
MXC_CCM_CACRR_ARM_PODF_OFFSET;
freq = decode_pll(mxc_plls[PLL1_CLOCK], CONFIG_SYS_MX5_HCLK);
reg = MXC_CCM_CACRR_ARM_PODF_RD(readl(&mxc_ccm->cacrr));
freq = decode_pll(mxc_plls[PLL1_CLOCK], MXC_HCLK);
return freq / (reg + 1);
}
@@ -253,16 +282,17 @@ u32 get_periph_clk(void)
{
u32 reg;
reg = __raw_readl(&mxc_ccm->cbcdr);
reg = readl(&mxc_ccm->cbcdr);
if (!(reg & MXC_CCM_CBCDR_PERIPH_CLK_SEL))
return decode_pll(mxc_plls[PLL2_CLOCK], CONFIG_SYS_MX5_HCLK);
reg = __raw_readl(&mxc_ccm->cbcmr);
switch ((reg & MXC_CCM_CBCMR_PERIPH_CLK_SEL_MASK) >>
MXC_CCM_CBCMR_PERIPH_CLK_SEL_OFFSET) {
return decode_pll(mxc_plls[PLL2_CLOCK], MXC_HCLK);
reg = readl(&mxc_ccm->cbcmr);
switch (MXC_CCM_CBCMR_PERIPH_CLK_SEL_RD(reg)) {
case 0:
return decode_pll(mxc_plls[PLL1_CLOCK], CONFIG_SYS_MX5_HCLK);
return decode_pll(mxc_plls[PLL1_CLOCK], MXC_HCLK);
case 1:
return decode_pll(mxc_plls[PLL3_CLOCK], CONFIG_SYS_MX5_HCLK);
return decode_pll(mxc_plls[PLL3_CLOCK], MXC_HCLK);
case 2:
return get_lp_apm();
default:
return 0;
}
@@ -278,9 +308,8 @@ static u32 get_ipg_clk(void)
freq = get_ahb_clk();
reg = __raw_readl(&mxc_ccm->cbcdr);
div = ((reg & MXC_CCM_CBCDR_IPG_PODF_MASK) >>
MXC_CCM_CBCDR_IPG_PODF_OFFSET) + 1;
reg = readl(&mxc_ccm->cbcdr);
div = MXC_CCM_CBCDR_IPG_PODF_RD(reg) + 1;
return freq / div;
}
@@ -290,20 +319,43 @@ static u32 get_ipg_clk(void)
*/
static u32 get_ipg_per_clk(void)
{
u32 pred1, pred2, podf;
u32 freq, pred1, pred2, podf;
if (__raw_readl(&mxc_ccm->cbcmr) & MXC_CCM_CBCMR_PERCLK_IPG_CLK_SEL)
if (readl(&mxc_ccm->cbcmr) & MXC_CCM_CBCMR_PERCLK_IPG_CLK_SEL)
return get_ipg_clk();
/* Fixme: not handle what about lpm*/
podf = __raw_readl(&mxc_ccm->cbcdr);
pred1 = (podf & MXC_CCM_CBCDR_PERCLK_PRED1_MASK) >>
MXC_CCM_CBCDR_PERCLK_PRED1_OFFSET;
pred2 = (podf & MXC_CCM_CBCDR_PERCLK_PRED2_MASK) >>
MXC_CCM_CBCDR_PERCLK_PRED2_OFFSET;
podf = (podf & MXC_CCM_CBCDR_PERCLK_PODF_MASK) >>
MXC_CCM_CBCDR_PERCLK_PODF_OFFSET;
return get_periph_clk() / ((pred1 + 1) * (pred2 + 1) * (podf + 1));
if (readl(&mxc_ccm->cbcmr) & MXC_CCM_CBCMR_PERCLK_LP_APM_CLK_SEL)
freq = get_lp_apm();
else
freq = get_periph_clk();
podf = readl(&mxc_ccm->cbcdr);
pred1 = MXC_CCM_CBCDR_PERCLK_PRED1_RD(podf);
pred2 = MXC_CCM_CBCDR_PERCLK_PRED2_RD(podf);
podf = MXC_CCM_CBCDR_PERCLK_PODF_RD(podf);
return freq / ((pred1 + 1) * (pred2 + 1) * (podf + 1));
}
/* Get the output clock rate of a standard PLL MUX for peripherals. */
static u32 get_standard_pll_sel_clk(u32 clk_sel)
{
u32 freq = 0;
switch (clk_sel & 0x3) {
case 0:
freq = decode_pll(mxc_plls[PLL1_CLOCK], MXC_HCLK);
break;
case 1:
freq = decode_pll(mxc_plls[PLL2_CLOCK], MXC_HCLK);
break;
case 2:
freq = decode_pll(mxc_plls[PLL3_CLOCK], MXC_HCLK);
break;
case 3:
freq = get_lp_apm();
break;
}
return freq;
}
/*
@@ -311,119 +363,96 @@ static u32 get_ipg_per_clk(void)
*/
static u32 get_uart_clk(void)
{
unsigned int freq, reg, pred, podf;
unsigned int clk_sel, freq, reg, pred, podf;
reg = __raw_readl(&mxc_ccm->cscmr1);
switch ((reg & MXC_CCM_CSCMR1_UART_CLK_SEL_MASK) >>
MXC_CCM_CSCMR1_UART_CLK_SEL_OFFSET) {
case 0x0:
freq = decode_pll(mxc_plls[PLL1_CLOCK],
CONFIG_SYS_MX5_HCLK);
break;
case 0x1:
freq = decode_pll(mxc_plls[PLL2_CLOCK],
CONFIG_SYS_MX5_HCLK);
break;
case 0x2:
freq = decode_pll(mxc_plls[PLL3_CLOCK],
CONFIG_SYS_MX5_HCLK);
break;
default:
return 66500000;
}
reg = readl(&mxc_ccm->cscmr1);
clk_sel = MXC_CCM_CSCMR1_UART_CLK_SEL_RD(reg);
freq = get_standard_pll_sel_clk(clk_sel);
reg = __raw_readl(&mxc_ccm->cscdr1);
pred = (reg & MXC_CCM_CSCDR1_UART_CLK_PRED_MASK) >>
MXC_CCM_CSCDR1_UART_CLK_PRED_OFFSET;
podf = (reg & MXC_CCM_CSCDR1_UART_CLK_PODF_MASK) >>
MXC_CCM_CSCDR1_UART_CLK_PODF_OFFSET;
reg = readl(&mxc_ccm->cscdr1);
pred = MXC_CCM_CSCDR1_UART_CLK_PRED_RD(reg);
podf = MXC_CCM_CSCDR1_UART_CLK_PODF_RD(reg);
freq /= (pred + 1) * (podf + 1);
return freq;
}
/*
* This function returns the low power audio clock.
*/
static u32 get_lp_apm(void)
{
u32 ret_val = 0;
u32 ccsr = __raw_readl(&mxc_ccm->ccsr);
if (((ccsr >> 9) & 1) == 0)
ret_val = CONFIG_SYS_MX5_HCLK;
else
ret_val = ((32768 * 1024));
return ret_val;
}
/*
* get cspi clock rate.
*/
static u32 imx_get_cspiclk(void)
{
u32 ret_val = 0, pdf, pre_pdf, clk_sel;
u32 cscmr1 = __raw_readl(&mxc_ccm->cscmr1);
u32 cscdr2 = __raw_readl(&mxc_ccm->cscdr2);
u32 ret_val = 0, pdf, pre_pdf, clk_sel, freq;
u32 cscmr1 = readl(&mxc_ccm->cscmr1);
u32 cscdr2 = readl(&mxc_ccm->cscdr2);
pre_pdf = (cscdr2 & MXC_CCM_CSCDR2_CSPI_CLK_PRED_MASK) \
>> MXC_CCM_CSCDR2_CSPI_CLK_PRED_OFFSET;
pdf = (cscdr2 & MXC_CCM_CSCDR2_CSPI_CLK_PODF_MASK) \
>> MXC_CCM_CSCDR2_CSPI_CLK_PODF_OFFSET;
clk_sel = (cscmr1 & MXC_CCM_CSCMR1_CSPI_CLK_SEL_MASK) \
>> MXC_CCM_CSCMR1_CSPI_CLK_SEL_OFFSET;
pre_pdf = MXC_CCM_CSCDR2_CSPI_CLK_PRED_RD(cscdr2);
pdf = MXC_CCM_CSCDR2_CSPI_CLK_PODF_RD(cscdr2);
clk_sel = MXC_CCM_CSCMR1_CSPI_CLK_SEL_RD(cscmr1);
freq = get_standard_pll_sel_clk(clk_sel);
ret_val = freq / ((pre_pdf + 1) * (pdf + 1));
return ret_val;
}
switch (clk_sel) {
/*
* get esdhc clock rate.
*/
static u32 get_esdhc_clk(u32 port)
{
u32 clk_sel = 0, pred = 0, podf = 0, freq = 0;
u32 cscmr1 = readl(&mxc_ccm->cscmr1);
u32 cscdr1 = readl(&mxc_ccm->cscdr1);
switch (port) {
case 0:
ret_val = decode_pll(mxc_plls[PLL1_CLOCK],
CONFIG_SYS_MX5_HCLK) /
((pre_pdf + 1) * (pdf + 1));
clk_sel = MXC_CCM_CSCMR1_ESDHC1_MSHC1_CLK_SEL_RD(cscmr1);
pred = MXC_CCM_CSCDR1_ESDHC1_MSHC1_CLK_PRED_RD(cscdr1);
podf = MXC_CCM_CSCDR1_ESDHC1_MSHC1_CLK_PODF_RD(cscdr1);
break;
case 1:
ret_val = decode_pll(mxc_plls[PLL2_CLOCK],
CONFIG_SYS_MX5_HCLK) /
((pre_pdf + 1) * (pdf + 1));
clk_sel = MXC_CCM_CSCMR1_ESDHC2_MSHC2_CLK_SEL_RD(cscmr1);
pred = MXC_CCM_CSCDR1_ESDHC2_MSHC2_CLK_PRED_RD(cscdr1);
podf = MXC_CCM_CSCDR1_ESDHC2_MSHC2_CLK_PODF_RD(cscdr1);
break;
case 2:
ret_val = decode_pll(mxc_plls[PLL3_CLOCK],
CONFIG_SYS_MX5_HCLK) /
((pre_pdf + 1) * (pdf + 1));
break;
if (cscmr1 & MXC_CCM_CSCMR1_ESDHC3_CLK_SEL)
return get_esdhc_clk(1);
else
return get_esdhc_clk(0);
case 3:
if (cscmr1 & MXC_CCM_CSCMR1_ESDHC4_CLK_SEL)
return get_esdhc_clk(1);
else
return get_esdhc_clk(0);
default:
ret_val = get_lp_apm() / ((pre_pdf + 1) * (pdf + 1));
break;
}
return ret_val;
freq = get_standard_pll_sel_clk(clk_sel) / ((pred + 1) * (podf + 1));
return freq;
}
static u32 get_axi_a_clk(void)
{
u32 cbcdr = __raw_readl(&mxc_ccm->cbcdr);
u32 pdf = (cbcdr & MXC_CCM_CBCDR_AXI_A_PODF_MASK) \
>> MXC_CCM_CBCDR_AXI_A_PODF_OFFSET;
u32 cbcdr = readl(&mxc_ccm->cbcdr);
u32 pdf = MXC_CCM_CBCDR_AXI_A_PODF_RD(cbcdr);
return get_periph_clk() / (pdf + 1);
}
static u32 get_axi_b_clk(void)
{
u32 cbcdr = __raw_readl(&mxc_ccm->cbcdr);
u32 pdf = (cbcdr & MXC_CCM_CBCDR_AXI_B_PODF_MASK) \
>> MXC_CCM_CBCDR_AXI_B_PODF_OFFSET;
u32 cbcdr = readl(&mxc_ccm->cbcdr);
u32 pdf = MXC_CCM_CBCDR_AXI_B_PODF_RD(cbcdr);
return get_periph_clk() / (pdf + 1);
}
static u32 get_emi_slow_clk(void)
{
u32 cbcdr = __raw_readl(&mxc_ccm->cbcdr);
u32 cbcdr = readl(&mxc_ccm->cbcdr);
u32 emi_clk_sel = cbcdr & MXC_CCM_CBCDR_EMI_CLK_SEL;
u32 pdf = (cbcdr & MXC_CCM_CBCDR_EMI_PODF_MASK) \
>> MXC_CCM_CBCDR_EMI_PODF_OFFSET;
u32 pdf = MXC_CCM_CBCDR_EMI_PODF_RD(cbcdr);
if (emi_clk_sel)
return get_ahb_clk() / (pdf + 1);
@@ -434,16 +463,14 @@ static u32 get_emi_slow_clk(void)
static u32 get_ddr_clk(void)
{
u32 ret_val = 0;
u32 cbcmr = __raw_readl(&mxc_ccm->cbcmr);
u32 ddr_clk_sel = (cbcmr & MXC_CCM_CBCMR_DDR_CLK_SEL_MASK) \
>> MXC_CCM_CBCMR_DDR_CLK_SEL_OFFSET;
u32 cbcmr = readl(&mxc_ccm->cbcmr);
u32 ddr_clk_sel = MXC_CCM_CBCMR_DDR_CLK_SEL_RD(cbcmr);
#ifdef CONFIG_MX51
u32 cbcdr = __raw_readl(&mxc_ccm->cbcdr);
u32 cbcdr = readl(&mxc_ccm->cbcdr);
if (cbcdr & MXC_CCM_CBCDR_DDR_HIFREQ_SEL) {
u32 ddr_clk_podf = (cbcdr & MXC_CCM_CBCDR_DDR_PODF_MASK) >> \
MXC_CCM_CBCDR_DDR_PODF_OFFSET;
u32 ddr_clk_podf = MXC_CCM_CBCDR_DDR_PODF_RD(cbcdr);
ret_val = decode_pll(mxc_plls[PLL1_CLOCK], CONFIG_SYS_MX5_HCLK);
ret_val = decode_pll(mxc_plls[PLL1_CLOCK], MXC_HCLK);
ret_val /= ddr_clk_podf + 1;
return ret_val;
@@ -482,14 +509,22 @@ unsigned int mxc_get_clock(enum mxc_clock clk)
case MXC_IPG_CLK:
return get_ipg_clk();
case MXC_IPG_PERCLK:
case MXC_I2C_CLK:
return get_ipg_per_clk();
case MXC_UART_CLK:
return get_uart_clk();
case MXC_CSPI_CLK:
return imx_get_cspiclk();
case MXC_ESDHC_CLK:
return get_esdhc_clk(0);
case MXC_ESDHC2_CLK:
return get_esdhc_clk(1);
case MXC_ESDHC3_CLK:
return get_esdhc_clk(2);
case MXC_ESDHC4_CLK:
return get_esdhc_clk(3);
case MXC_FEC_CLK:
return decode_pll(mxc_plls[PLL1_CLOCK],
CONFIG_SYS_MX5_HCLK);
return get_ipg_clk();
case MXC_SATA_CLK:
return get_ahb_clk();
case MXC_DDR_CLK:
@@ -505,10 +540,9 @@ u32 imx_get_uartclk(void)
return get_uart_clk();
}
u32 imx_get_fecclk(void)
{
return mxc_get_clock(MXC_IPG_CLK);
return get_ipg_clk();
}
static int gcd(int m, int n)
@@ -610,63 +644,73 @@ static int calc_pll_params(u32 ref, u32 target, struct pll_param *pll)
#define CHANGE_PLL_SETTINGS(pll, pd, fi, fn, fd) \
{ \
__raw_writel(0x1232, &pll->ctrl); \
__raw_writel(0x2, &pll->config); \
__raw_writel((((pd) - 1) << 0) | ((fi) << 4), \
&pll->op); \
__raw_writel(fn, &(pll->mfn)); \
__raw_writel((fd) - 1, &pll->mfd); \
__raw_writel((((pd) - 1) << 0) | ((fi) << 4), \
&pll->hfs_op); \
__raw_writel(fn, &pll->hfs_mfn); \
__raw_writel((fd) - 1, &pll->hfs_mfd); \
__raw_writel(0x1232, &pll->ctrl); \
while (!__raw_readl(&pll->ctrl) & 0x1) \
writel(0x1232, &pll->ctrl); \
writel(0x2, &pll->config); \
writel((((pd) - 1) << 0) | ((fi) << 4), \
&pll->op); \
writel(fn, &(pll->mfn)); \
writel((fd) - 1, &pll->mfd); \
writel((((pd) - 1) << 0) | ((fi) << 4), \
&pll->hfs_op); \
writel(fn, &pll->hfs_mfn); \
writel((fd) - 1, &pll->hfs_mfd); \
writel(0x1232, &pll->ctrl); \
while (!readl(&pll->ctrl) & 0x1) \
;\
}
static int config_pll_clk(enum pll_clocks index, struct pll_param *pll_param)
{
u32 ccsr = __raw_readl(&mxc_ccm->ccsr);
u32 ccsr = readl(&mxc_ccm->ccsr);
struct mxc_pll_reg *pll = mxc_plls[index];
switch (index) {
case PLL1_CLOCK:
/* Switch ARM to PLL2 clock */
__raw_writel(ccsr | 0x4, &mxc_ccm->ccsr);
writel(ccsr | MXC_CCM_CCSR_PLL1_SW_CLK_SEL,
&mxc_ccm->ccsr);
CHANGE_PLL_SETTINGS(pll, pll_param->pd,
pll_param->mfi, pll_param->mfn,
pll_param->mfd);
/* Switch back */
__raw_writel(ccsr & ~0x4, &mxc_ccm->ccsr);
writel(ccsr & ~MXC_CCM_CCSR_PLL1_SW_CLK_SEL,
&mxc_ccm->ccsr);
break;
case PLL2_CLOCK:
/* Switch to pll2 bypass clock */
__raw_writel(ccsr | 0x2, &mxc_ccm->ccsr);
writel(ccsr | MXC_CCM_CCSR_PLL2_SW_CLK_SEL,
&mxc_ccm->ccsr);
CHANGE_PLL_SETTINGS(pll, pll_param->pd,
pll_param->mfi, pll_param->mfn,
pll_param->mfd);
/* Switch back */
__raw_writel(ccsr & ~0x2, &mxc_ccm->ccsr);
writel(ccsr & ~MXC_CCM_CCSR_PLL2_SW_CLK_SEL,
&mxc_ccm->ccsr);
break;
case PLL3_CLOCK:
/* Switch to pll3 bypass clock */
__raw_writel(ccsr | 0x1, &mxc_ccm->ccsr);
writel(ccsr | MXC_CCM_CCSR_PLL3_SW_CLK_SEL,
&mxc_ccm->ccsr);
CHANGE_PLL_SETTINGS(pll, pll_param->pd,
pll_param->mfi, pll_param->mfn,
pll_param->mfd);
/* Switch back */
__raw_writel(ccsr & ~0x1, &mxc_ccm->ccsr);
writel(ccsr & ~MXC_CCM_CCSR_PLL3_SW_CLK_SEL,
&mxc_ccm->ccsr);
break;
#ifdef CONFIG_MX53
case PLL4_CLOCK:
/* Switch to pll4 bypass clock */
__raw_writel(ccsr | 0x20, &mxc_ccm->ccsr);
writel(ccsr | MXC_CCM_CCSR_PLL4_SW_CLK_SEL,
&mxc_ccm->ccsr);
CHANGE_PLL_SETTINGS(pll, pll_param->pd,
pll_param->mfi, pll_param->mfn,
pll_param->mfd);
/* Switch back */
__raw_writel(ccsr & ~0x20, &mxc_ccm->ccsr);
writel(ccsr & ~MXC_CCM_CCSR_PLL4_SW_CLK_SEL,
&mxc_ccm->ccsr);
break;
#endif
default:
return -EINVAL;
}
@@ -694,7 +738,6 @@ static int config_core_clk(u32 ref, u32 freq)
static int config_nfc_clk(u32 nfc_clk)
{
u32 reg;
u32 parent_rate = get_emi_slow_clk();
u32 div = parent_rate / nfc_clk;
@@ -704,11 +747,10 @@ static int config_nfc_clk(u32 nfc_clk)
div++;
if (parent_rate / div > NFC_CLK_MAX)
div++;
reg = __raw_readl(&mxc_ccm->cbcdr);
reg &= ~MXC_CCM_CBCDR_NFC_PODF_MASK;
reg |= (div - 1) << MXC_CCM_CBCDR_NFC_PODF_OFFSET;
__raw_writel(reg, &mxc_ccm->cbcdr);
while (__raw_readl(&mxc_ccm->cdhipr) != 0)
clrsetbits_le32(&mxc_ccm->cbcdr,
MXC_CCM_CBCDR_NFC_PODF_MASK,
MXC_CCM_CBCDR_NFC_PODF(div - 1));
while (readl(&mxc_ccm->cdhipr) != 0)
;
return 0;
}
@@ -721,16 +763,15 @@ static int config_periph_clk(u32 ref, u32 freq)
memset(&pll_param, 0, sizeof(struct pll_param));
if (__raw_readl(&mxc_ccm->cbcdr) & MXC_CCM_CBCDR_PERIPH_CLK_SEL) {
if (readl(&mxc_ccm->cbcdr) & MXC_CCM_CBCDR_PERIPH_CLK_SEL) {
ret = calc_pll_params(ref, freq, &pll_param);
if (ret != 0) {
printf("Error:Can't find pll parameters: %d\n",
ret);
return ret;
}
switch ((__raw_readl(&mxc_ccm->cbcmr) & \
MXC_CCM_CBCMR_PERIPH_CLK_SEL_MASK) >> \
MXC_CCM_CBCMR_PERIPH_CLK_SEL_OFFSET) {
switch (MXC_CCM_CBCMR_PERIPH_CLK_SEL_RD(
readl(&mxc_ccm->cbcmr))) {
case 0:
return config_pll_clk(PLL1_CLOCK, &pll_param);
break;
@@ -749,8 +790,7 @@ static int config_ddr_clk(u32 emi_clk)
{
u32 clk_src;
s32 shift = 0, clk_sel, div = 1;
u32 cbcmr = __raw_readl(&mxc_ccm->cbcmr);
u32 cbcdr = __raw_readl(&mxc_ccm->cbcdr);
u32 cbcmr = readl(&mxc_ccm->cbcmr);
if (emi_clk > MAX_DDR_CLK) {
printf("Warning:DDR clock should not exceed %d MHz\n",
@@ -760,7 +800,7 @@ static int config_ddr_clk(u32 emi_clk)
clk_src = get_periph_clk();
/* Find DDR clock input */
clk_sel = (cbcmr >> 10) & 0x3;
clk_sel = MXC_CCM_CBCMR_DDR_CLK_SEL_RD(cbcmr);
switch (clk_sel) {
case 0:
shift = 16;
@@ -785,12 +825,10 @@ static int config_ddr_clk(u32 emi_clk)
if (div > 8)
div = 8;
cbcdr = cbcdr & ~(0x7 << shift);
cbcdr |= ((div - 1) << shift);
__raw_writel(cbcdr, &mxc_ccm->cbcdr);
while (__raw_readl(&mxc_ccm->cdhipr) != 0)
clrsetbits_le32(&mxc_ccm->cbcdr, 0x7 << shift, (div - 1) << shift);
while (readl(&mxc_ccm->cdhipr) != 0)
;
__raw_writel(0x0, &mxc_ccm->ccdr);
writel(0x0, &mxc_ccm->ccdr);
return 0;
}
@@ -861,9 +899,9 @@ void mxc_set_sata_internal_clock(void)
u32 *tmp_base =
(u32 *)(IIM_BASE_ADDR + 0x180c);
set_usb_phy1_clk();
set_usb_phy_clk();
writel((readl(tmp_base) & (~0x6)) | 0x4, tmp_base);
clrsetbits_le32(tmp_base, 0x6, 0x4);
}
#endif
@@ -874,14 +912,14 @@ int do_mx5_showclocks(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
u32 freq;
freq = decode_pll(mxc_plls[PLL1_CLOCK], CONFIG_SYS_MX5_HCLK);
freq = decode_pll(mxc_plls[PLL1_CLOCK], MXC_HCLK);
printf("PLL1 %8d MHz\n", freq / 1000000);
freq = decode_pll(mxc_plls[PLL2_CLOCK], CONFIG_SYS_MX5_HCLK);
freq = decode_pll(mxc_plls[PLL2_CLOCK], MXC_HCLK);
printf("PLL2 %8d MHz\n", freq / 1000000);
freq = decode_pll(mxc_plls[PLL3_CLOCK], CONFIG_SYS_MX5_HCLK);
freq = decode_pll(mxc_plls[PLL3_CLOCK], MXC_HCLK);
printf("PLL3 %8d MHz\n", freq / 1000000);
#ifdef CONFIG_MX53
freq = decode_pll(mxc_plls[PLL4_CLOCK], CONFIG_SYS_MX5_HCLK);
freq = decode_pll(mxc_plls[PLL4_CLOCK], MXC_HCLK);
printf("PLL4 %8d MHz\n", freq / 1000000);
#endif
@@ -890,7 +928,9 @@ int do_mx5_showclocks(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
printf("IPG %8d kHz\n", mxc_get_clock(MXC_IPG_CLK) / 1000);
printf("IPG PERCLK %8d kHz\n", mxc_get_clock(MXC_IPG_PERCLK) / 1000);
printf("DDR %8d kHz\n", mxc_get_clock(MXC_DDR_CLK) / 1000);
#ifdef CONFIG_MXC_SPI
printf("CSPI %8d kHz\n", mxc_get_clock(MXC_CSPI_CLK) / 1000);
#endif
return 0;
}

View File

@@ -24,6 +24,15 @@
#include <generated/asm-offsets.h>
#include <linux/linkage.h>
.section ".text.init", "x"
.macro init_arm_erratum
/* ARM erratum ID #468414 */
mrc 15, 0, r1, c1, c0, 1
orr r1, r1, #(1 << 5) /* enable L1NEON bit */
mcr 15, 0, r1, c1, c0, 1
.endm
/*
* L2CC Cache setup/invalidation/disable
*/
@@ -34,15 +43,14 @@
mcr 15, 0, r0, c1, c0, 1
/* reconfigure L2 cache aux control reg */
mov r0, #0xC0 /* tag RAM */
add r0, r0, #0x4 /* data RAM */
orr r0, r0, #1 << 24 /* disable write allocate delay */
orr r0, r0, #1 << 23 /* disable write allocate combine */
orr r0, r0, #1 << 22 /* disable write allocate */
ldr r0, =0xC0 | /* tag RAM */ \
0x4 | /* data RAM */ \
1 << 24 | /* disable write allocate delay */ \
1 << 23 | /* disable write allocate combine */ \
1 << 22 /* disable write allocate */
#if defined(CONFIG_MX51)
ldr r1, =0x0
ldr r3, [r1, #ROM_SI_REV]
ldr r3, [r4, #ROM_SI_REV]
cmp r3, #0x10
/* disable write combine for TO 2 and lower revs */
@@ -84,8 +92,7 @@
ldr r1, =0x00000203
str r1, [r0, #0x40]
ldr r1, =0x0
str r1, [r0, #0x44]
str r4, [r0, #0x44]
ldr r1, =0x00120125
str r1, [r0, #0x9C]
@@ -98,20 +105,29 @@
.macro setup_pll pll, freq
ldr r0, =\pll
adr r2, W_DP_\freq
bl setup_pll_func
.endm
#define W_DP_OP 0
#define W_DP_MFD 4
#define W_DP_MFN 8
setup_pll_func:
ldr r1, =0x00001232
str r1, [r0, #PLL_DP_CTL] /* Set DPLL ON (set UPEN bit): BRMO=1 */
mov r1, #0x2
str r1, [r0, #PLL_DP_CONFIG] /* Enable auto-restart AREN bit */
ldr r1, W_DP_OP_\freq
ldr r1, [r2, #W_DP_OP]
str r1, [r0, #PLL_DP_OP]
str r1, [r0, #PLL_DP_HFS_OP]
ldr r1, W_DP_MFD_\freq
ldr r1, [r2, #W_DP_MFD]
str r1, [r0, #PLL_DP_MFD]
str r1, [r0, #PLL_DP_HFS_MFD]
ldr r1, W_DP_MFN_\freq
ldr r1, [r2, #W_DP_MFN]
str r1, [r0, #PLL_DP_MFN]
str r1, [r0, #PLL_DP_HFS_MFN]
@@ -120,12 +136,13 @@
1: ldr r1, [r0, #PLL_DP_CTL]
ands r1, r1, #0x1
beq 1b
.endm
/* r10 saved upper lr */
mov pc, lr
.macro setup_pll_errata pll, freq
ldr r2, =\pll
mov r1, #0x0
str r1, [r2, #PLL_DP_CONFIG] /* Disable auto-restart AREN bit */
str r4, [r2, #PLL_DP_CONFIG] /* Disable auto-restart AREN bit */
ldr r1, =0x00001236
str r1, [r2, #PLL_DP_CTL] /* Restart PLL with PLM=1 */
1: ldr r1, [r2, #PLL_DP_CTL] /* Wait for lock */
@@ -152,16 +169,15 @@
.endm
.macro init_clock
#if defined (CONFIG_MX51)
ldr r0, =CCM_BASE_ADDR
#if defined(CONFIG_MX51)
/* Gate of clocks to the peripherals first */
ldr r1, =0x3FFFFFFF
str r1, [r0, #CLKCTL_CCGR0]
ldr r1, =0x0
str r1, [r0, #CLKCTL_CCGR1]
str r1, [r0, #CLKCTL_CCGR2]
str r1, [r0, #CLKCTL_CCGR3]
str r4, [r0, #CLKCTL_CCGR1]
str r4, [r0, #CLKCTL_CCGR2]
str r4, [r0, #CLKCTL_CCGR3]
ldr r1, =0x00030000
str r1, [r0, #CLKCTL_CCGR4]
@@ -181,22 +197,6 @@
1: ldr r1, [r0, #CLKCTL_CDHIPR]
cmp r1, #0x0
bne 1b
#else
ldr r1, =0x3FFFFFFF
str r1, [r0, #CLKCTL_CCGR0]
ldr r1, =0x0
str r1, [r0, #CLKCTL_CCGR1]
str r1, [r0, #CLKCTL_CCGR2]
str r1, [r0, #CLKCTL_CCGR3]
str r1, [r0, #CLKCTL_CCGR7]
ldr r1, =0x00030000
str r1, [r0, #CLKCTL_CCGR4]
ldr r1, =0x00FFF030
str r1, [r0, #CLKCTL_CCGR5]
ldr r1, =0x0F00030F
str r1, [r0, #CLKCTL_CCGR6]
#endif
/* Switch ARM to step clock */
mov r1, #0x4
@@ -209,13 +209,11 @@
setup_pll PLL1_BASE_ADDR, 800
#endif
#if defined(CONFIG_MX51)
setup_pll PLL3_BASE_ADDR, 665
/* Switch peripheral to PLL 3 */
ldr r0, =CCM_BASE_ADDR
ldr r1, =0x000010C0
orr r1,r1,#CONFIG_SYS_DDR_CLKSEL
ldr r1, =0x000010C0 | CONFIG_SYS_DDR_CLKSEL
str r1, [r0, #CLKCTL_CBCMR]
ldr r1, =0x13239145
str r1, [r0, #CLKCTL_CBCDR]
@@ -225,10 +223,9 @@
ldr r0, =CCM_BASE_ADDR
ldr r1, =0x19239145
str r1, [r0, #CLKCTL_CBCDR]
ldr r1, =0x000020C0
orr r1,r1,#CONFIG_SYS_DDR_CLKSEL
ldr r1, =0x000020C0 | CONFIG_SYS_DDR_CLKSEL
str r1, [r0, #CLKCTL_CBCMR]
#endif
setup_pll PLL3_BASE_ADDR, 216
/* Set the platform clock dividers */
@@ -238,32 +235,24 @@
ldr r0, =CCM_BASE_ADDR
#if defined(CONFIG_MX51)
/* Run 3.0 at Full speed, for other TO's wait till we increase VDDGP */
ldr r1, =0x0
ldr r3, [r1, #ROM_SI_REV]
ldr r3, [r4, #ROM_SI_REV]
cmp r3, #0x10
movls r1, #0x1
movhi r1, #0
#else
mov r1, #0
#endif
str r1, [r0, #CLKCTL_CACRR]
/* Switch ARM back to PLL 1 */
mov r1, #0
str r1, [r0, #CLKCTL_CCSR]
str r4, [r0, #CLKCTL_CCSR]
#if defined(CONFIG_MX51)
/* setup the rest */
/* Use lp_apm (24MHz) source for perclk */
ldr r1, =0x000020C2
orr r1,r1,#CONFIG_SYS_DDR_CLKSEL
ldr r1, =0x000020C2 | CONFIG_SYS_DDR_CLKSEL
str r1, [r0, #CLKCTL_CBCMR]
/* ddr clock from PLL 1, all perclk dividers are 1 since using 24MHz */
ldr r1, =CONFIG_SYS_CLKTL_CBCDR
str r1, [r0, #CLKCTL_CBCDR]
#endif
/* Restore the default values in the Gate registers */
ldr r1, =0xFFFFFFFF
@@ -274,49 +263,127 @@
str r1, [r0, #CLKCTL_CCGR4]
str r1, [r0, #CLKCTL_CCGR5]
str r1, [r0, #CLKCTL_CCGR6]
#if defined(CONFIG_MX53)
str r1, [r0, #CLKCTL_CCGR7]
#endif
#if defined(CONFIG_MX51)
/* Use PLL 2 for UART's, get 66.5MHz from it */
ldr r1, =0xA5A2A020
str r1, [r0, #CLKCTL_CSCMR1]
ldr r1, =0x00C30321
str r1, [r0, #CLKCTL_CSCDR1]
#elif defined(CONFIG_MX53)
/* Switch peripheral to PLL2 */
ldr r0, =CCM_BASE_ADDR
ldr r1, =0x00808145
orr r1, r1, #2 << 10
orr r1, r1, #0 << 16
orr r1, r1, #1 << 19
str r1, [r0, #CLKCTL_CBCDR]
ldr r1, =0x00016154
str r1, [r0, #CLKCTL_CBCMR]
/* Change uart clk parent to pll2*/
ldr r1, [r0, #CLKCTL_CSCMR1]
and r1, r1, #0xfcffffff
orr r1, r1, #0x01000000
str r1, [r0, #CLKCTL_CSCMR1]
ldr r1, [r0, #CLKCTL_CSCDR1]
and r1, r1, #0xffffffc0
orr r1, r1, #0x0a
str r1, [r0, #CLKCTL_CSCDR1]
#endif
/* make sure divider effective */
1: ldr r1, [r0, #CLKCTL_CDHIPR]
cmp r1, #0x0
bne 1b
mov r1, #0x0
str r1, [r0, #CLKCTL_CCDR]
str r4, [r0, #CLKCTL_CCDR]
/* for cko - for ARM div by 8 */
mov r1, #0x000A0000
add r1, r1, #0x00000F0
str r1, [r0, #CLKCTL_CCOSR]
#else /* CONFIG_MX53 */
ldr r0, =CCM_BASE_ADDR
/* Gate of clocks to the peripherals first */
ldr r1, =0x3FFFFFFF
str r1, [r0, #CLKCTL_CCGR0]
str r4, [r0, #CLKCTL_CCGR1]
str r4, [r0, #CLKCTL_CCGR2]
str r4, [r0, #CLKCTL_CCGR3]
str r4, [r0, #CLKCTL_CCGR7]
ldr r1, =0x00030000
str r1, [r0, #CLKCTL_CCGR4]
ldr r1, =0x00FFF030
str r1, [r0, #CLKCTL_CCGR5]
ldr r1, =0x0F00030F
str r1, [r0, #CLKCTL_CCGR6]
/* Switch ARM to step clock */
mov r1, #0x4
str r1, [r0, #CLKCTL_CCSR]
setup_pll PLL1_BASE_ADDR, 800
setup_pll PLL3_BASE_ADDR, 400
/* Switch peripheral to PLL3 */
ldr r0, =CCM_BASE_ADDR
ldr r1, =0x00015154
str r1, [r0, #CLKCTL_CBCMR]
ldr r1, =0x02888945
orr r1, r1, #(1 << 16)
str r1, [r0, #CLKCTL_CBCDR]
/* make sure change is effective */
1: ldr r1, [r0, #CLKCTL_CDHIPR]
cmp r1, #0x0
bne 1b
setup_pll PLL2_BASE_ADDR, 400
/* Switch peripheral to PLL2 */
ldr r0, =CCM_BASE_ADDR
ldr r1, =0x00808145
orr r1, r1, #(2 << 10)
orr r1, r1, #(0 << 16)
orr r1, r1, #(1 << 19)
str r1, [r0, #CLKCTL_CBCDR]
ldr r1, =0x00016154
str r1, [r0, #CLKCTL_CBCMR]
/*change uart clk parent to pll2*/
ldr r1, [r0, #CLKCTL_CSCMR1]
and r1, r1, #0xfcffffff
orr r1, r1, #0x01000000
str r1, [r0, #CLKCTL_CSCMR1]
/* make sure change is effective */
1: ldr r1, [r0, #CLKCTL_CDHIPR]
cmp r1, #0x0
bne 1b
setup_pll PLL3_BASE_ADDR, 216
setup_pll PLL4_BASE_ADDR, 455
/* Set the platform clock dividers */
ldr r0, =ARM_BASE_ADDR
ldr r1, =0x00000124
str r1, [r0, #0x14]
ldr r0, =CCM_BASE_ADDR
mov r1, #0
str r1, [r0, #CLKCTL_CACRR]
/* Switch ARM back to PLL 1. */
mov r1, #0x0
str r1, [r0, #CLKCTL_CCSR]
/* make uart div=6 */
ldr r1, [r0, #CLKCTL_CSCDR1]
and r1, r1, #0xffffffc0
orr r1, r1, #0x0a
str r1, [r0, #CLKCTL_CSCDR1]
/* Restore the default values in the Gate registers */
ldr r1, =0xFFFFFFFF
str r1, [r0, #CLKCTL_CCGR0]
str r1, [r0, #CLKCTL_CCGR1]
str r1, [r0, #CLKCTL_CCGR2]
str r1, [r0, #CLKCTL_CCGR3]
str r1, [r0, #CLKCTL_CCGR4]
str r1, [r0, #CLKCTL_CCGR5]
str r1, [r0, #CLKCTL_CCGR6]
str r1, [r0, #CLKCTL_CCGR7]
mov r1, #0x00000
str r1, [r0, #CLKCTL_CCDR]
/* for cko - for ARM div by 8 */
mov r1, #0x000A0000
add r1, r1, #0x00000F0
str r1, [r0, #CLKCTL_CCOSR]
#endif /* CONFIG_MX53 */
.endm
.macro setup_wdog
@@ -325,10 +392,11 @@
strh r1, [r0]
.endm
.section ".text.init", "x"
ENTRY(lowlevel_init)
#if defined(CONFIG_MX51)
mov r10, lr
mov r4, #0 /* Fix R4 to 0 */
#if defined(CONFIG_SYS_MAIN_PWR_ON)
ldr r0, =GPIO1_BASE_ADDR
ldr r1, [r0, #0x0]
orr r1, r1, #1 << 23
@@ -338,6 +406,8 @@ ENTRY(lowlevel_init)
str r1, [r0, #0x4]
#endif
init_arm_erratum
init_l2cc
init_aips
@@ -346,21 +416,31 @@ ENTRY(lowlevel_init)
init_clock
/* r12 saved upper lr*/
mov pc,lr
mov pc, r10
ENDPROC(lowlevel_init)
/* Board level setting value */
W_DP_OP_864: .word DP_OP_864
W_DP_MFD_864: .word DP_MFD_864
W_DP_MFN_864: .word DP_MFN_864
#if defined(CONFIG_MX51_PLL_ERRATA)
W_DP_864: .word DP_OP_864
.word DP_MFD_864
.word DP_MFN_864
W_DP_MFN_800_DIT: .word DP_MFN_800_DIT
W_DP_OP_800: .word DP_OP_800
W_DP_MFD_800: .word DP_MFD_800
W_DP_MFN_800: .word DP_MFN_800
W_DP_OP_665: .word DP_OP_665
W_DP_MFD_665: .word DP_MFD_665
W_DP_MFN_665: .word DP_MFN_665
W_DP_OP_216: .word DP_OP_216
W_DP_MFD_216: .word DP_MFD_216
W_DP_MFN_216: .word DP_MFN_216
#else
W_DP_800: .word DP_OP_800
.word DP_MFD_800
.word DP_MFN_800
#endif
#if defined(CONFIG_MX51)
W_DP_665: .word DP_OP_665
.word DP_MFD_665
.word DP_MFN_665
#endif
W_DP_216: .word DP_OP_216
.word DP_MFD_216
.word DP_MFN_216
W_DP_400: .word DP_OP_400
.word DP_MFD_400
.word DP_MFN_400
W_DP_455: .word DP_OP_455
.word DP_MFD_455
.word DP_MFN_455

View File

@@ -43,9 +43,9 @@ void enable_usboh3_clk(unsigned char enable)
reg = __raw_readl(&imx_ccm->CCGR6);
if (enable)
reg |= MXC_CCM_CCGR_CG_MASK << MXC_CCM_CCGR0_CG0_OFFSET;
reg |= MXC_CCM_CCGR6_USBOH3_MASK;
else
reg &= ~(MXC_CCM_CCGR_CG_MASK << MXC_CCM_CCGR0_CG0_OFFSET);
reg &= ~(MXC_CCM_CCGR6_USBOH3_MASK);
__raw_writel(reg, &imx_ccm->CCGR6);
}
@@ -59,7 +59,9 @@ int enable_i2c_clk(unsigned char enable, unsigned i2c_num)
if (i2c_num > 2)
return -EINVAL;
mask = MXC_CCM_CCGR_CG_MASK << ((i2c_num + 3) << 1);
mask = MXC_CCM_CCGR_CG_MASK
<< (MXC_CCM_CCGR2_I2C1_SERIAL_OFFSET + (i2c_num << 1));
reg = __raw_readl(&imx_ccm->CCGR2);
if (enable)
reg |= mask;
@@ -108,7 +110,7 @@ static u32 get_mcu_main_clk(void)
reg = __raw_readl(&imx_ccm->cacrr);
reg &= MXC_CCM_CACRR_ARM_PODF_MASK;
reg >>= MXC_CCM_CACRR_ARM_PODF_OFFSET;
freq = decode_pll(PLL_SYS, CONFIG_SYS_MX6_HCLK);
freq = decode_pll(PLL_SYS, MXC_HCLK);
return freq / (reg + 1);
}
@@ -125,11 +127,11 @@ u32 get_periph_clk(void)
switch (reg) {
case 0:
freq = decode_pll(PLL_USBOTG, CONFIG_SYS_MX6_HCLK);
freq = decode_pll(PLL_USBOTG, MXC_HCLK);
break;
case 1:
case 2:
freq = CONFIG_SYS_MX6_HCLK;
freq = MXC_HCLK;
break;
default:
break;
@@ -141,7 +143,7 @@ u32 get_periph_clk(void)
switch (reg) {
case 0:
freq = decode_pll(PLL_BUS, CONFIG_SYS_MX6_HCLK);
freq = decode_pll(PLL_BUS, MXC_HCLK);
break;
case 1:
freq = PLL2_PFD2_FREQ;
@@ -237,7 +239,7 @@ static u32 get_emi_slow_clk(void)
root_freq = get_axi_clk();
break;
case 1:
root_freq = decode_pll(PLL_USBOTG, CONFIG_SYS_MX6_HCLK);
root_freq = decode_pll(PLL_USBOTG, MXC_HCLK);
break;
case 2:
root_freq = PLL2_PFD2_FREQ;
@@ -309,7 +311,7 @@ u32 imx_get_uartclk(void)
u32 imx_get_fecclk(void)
{
return decode_pll(PLL_ENET, CONFIG_SYS_MX6_HCLK);
return decode_pll(PLL_ENET, MXC_HCLK);
}
int enable_sata_clock(void)
@@ -321,7 +323,7 @@ int enable_sata_clock(void)
/* Enable sata clock */
reg = readl(&imx_ccm->CCGR5); /* CCGR5 */
reg |= MXC_CCM_CCGR5_CG2_MASK;
reg |= MXC_CCM_CCGR5_SATA_MASK;
writel(reg, &imx_ccm->CCGR5);
/* Enable PLLs */
@@ -355,6 +357,7 @@ unsigned int mxc_get_clock(enum mxc_clock clk)
case MXC_IPG_CLK:
return get_ipg_clk();
case MXC_IPG_PERCLK:
case MXC_I2C_CLK:
return get_ipg_per_clk();
case MXC_UART_CLK:
return get_uart_clk();
@@ -389,19 +392,21 @@ unsigned int mxc_get_clock(enum mxc_clock clk)
int do_mx6_showclocks(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
u32 freq;
freq = decode_pll(PLL_SYS, CONFIG_SYS_MX6_HCLK);
freq = decode_pll(PLL_SYS, MXC_HCLK);
printf("PLL_SYS %8d MHz\n", freq / 1000000);
freq = decode_pll(PLL_BUS, CONFIG_SYS_MX6_HCLK);
freq = decode_pll(PLL_BUS, MXC_HCLK);
printf("PLL_BUS %8d MHz\n", freq / 1000000);
freq = decode_pll(PLL_USBOTG, CONFIG_SYS_MX6_HCLK);
freq = decode_pll(PLL_USBOTG, MXC_HCLK);
printf("PLL_OTG %8d MHz\n", freq / 1000000);
freq = decode_pll(PLL_ENET, CONFIG_SYS_MX6_HCLK);
freq = decode_pll(PLL_ENET, MXC_HCLK);
printf("PLL_NET %8d MHz\n", freq / 1000000);
printf("\n");
printf("IPG %8d kHz\n", mxc_get_clock(MXC_IPG_CLK) / 1000);
printf("UART %8d kHz\n", mxc_get_clock(MXC_UART_CLK) / 1000);
#ifdef CONFIG_MXC_SPI
printf("CSPI %8d kHz\n", mxc_get_clock(MXC_CSPI_CLK) / 1000);
#endif
printf("AHB %8d kHz\n", mxc_get_clock(MXC_AHB_CLK) / 1000);
printf("AXI %8d kHz\n", mxc_get_clock(MXC_AXI_CLK) / 1000);
printf("DDR %8d kHz\n", mxc_get_clock(MXC_DDR_CLK) / 1000);

View File

@@ -20,6 +20,16 @@
#include <linux/linkage.h>
.macro init_arm_errata
/* ARM erratum ID #743622 */
mrc p15, 0, r10, c15, c0, 1 /* read diagnostic register */
orr r10, r10, #1 << 6 /* set bit #6 */
/* ARM erratum ID #751472 */
orr r10, r10, #1 << 11 /* set bit #11 */
mcr p15, 0, r10, c15, c0, 1 /* write diagnostic register */
.endm
ENTRY(lowlevel_init)
init_arm_errata
mov pc, lr
ENDPROC(lowlevel_init)

View File

@@ -31,17 +31,33 @@
#include <asm/arch/sys_proto.h>
#include <asm/imx-common/boot_mode.h>
struct scu_regs {
u32 ctrl;
u32 config;
u32 status;
u32 invalidate;
u32 fpga_rev;
};
u32 get_cpu_rev(void)
{
struct anatop_regs *anatop = (struct anatop_regs *)ANATOP_BASE_ADDR;
int reg = readl(&anatop->digprog);
u32 reg = readl(&anatop->digprog_sololite);
u32 type = ((reg >> 16) & 0xff);
/* Read mx6 variant: quad, dual or solo */
int system_rev = (reg >> 4) & 0xFF000;
/* Read mx6 silicon revision */
system_rev |= (reg & 0xFF) + 0x10;
if (type != MXC_CPU_MX6SL) {
reg = readl(&anatop->digprog);
type = ((reg >> 16) & 0xff);
if (type == MXC_CPU_MX6DL) {
struct scu_regs *scu = (struct scu_regs *)SCU_BASE_ADDR;
u32 cfg = readl(&scu->config) & 3;
return system_rev;
if (!cfg)
type = MXC_CPU_MX6SOLO;
}
}
reg &= 0xff; /* mx6 silicon revision */
return (type << 12) | (reg + 0x10);
}
void init_aips(void)
@@ -146,7 +162,7 @@ void imx_get_mac_from_fuse(int dev_id, unsigned char *mac)
void boot_mode_apply(unsigned cfg_val)
{
unsigned reg;
struct src_regs *psrc = (struct src_regs *)SRC_BASE_ADDR;
struct src *psrc = (struct src *)SRC_BASE_ADDR;
writel(cfg_val, &psrc->gpr9);
reg = readl(&psrc->gpr10);
if (cfg_val)

View File

@@ -25,9 +25,8 @@ include $(TOPDIR)/config.mk
LIB = $(obj)libomap-common.o
SOBJS := reset.o
COBJS := timer.o
COBJS := reset.o
COBJS += timer.o
COBJS += utils.o
ifneq ($(CONFIG_OMAP44XX)$(CONFIG_OMAP54XX),)

View File

@@ -21,6 +21,7 @@
#include <asm/omap_common.h>
#include <asm/arch/omap.h>
#include <asm/arch/mmc_host_def.h>
#include <asm/arch/sys_proto.h>
/*
* This is used to verify if the configuration header

View File

@@ -33,6 +33,8 @@
#include <asm/utils.h>
#include <linux/compiler.h>
static int emif1_enabled = -1, emif2_enabled = -1;
void set_lpmode_selfrefresh(u32 base)
{
struct emif_reg_struct *emif = (struct emif_reg_struct *)base;
@@ -1109,6 +1111,7 @@ void emif_post_init_config(u32 base)
void dmm_init(u32 base)
{
const struct dmm_lisa_map_regs *lisa_map_regs;
u32 i, section, valid;
#ifdef CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS
emif_get_dmm_regs(&lisa_map_regs);
@@ -1216,6 +1219,29 @@ void dmm_init(u32 base)
writel(lisa_map_regs->dmm_lisa_map_0,
&hw_lisa_map_regs->dmm_lisa_map_0);
}
/*
* EMIF should be configured only when
* memory is mapped on it. Using emif1_enabled
* and emif2_enabled variables for this.
*/
emif1_enabled = 0;
emif2_enabled = 0;
for (i = 0; i < 4; i++) {
section = __raw_readl(DMM_BASE + i*4);
valid = (section & EMIF_SDRC_MAP_MASK) >>
(EMIF_SDRC_MAP_SHIFT);
if (valid == 3) {
emif1_enabled = 1;
emif2_enabled = 1;
break;
} else if (valid == 1) {
emif1_enabled = 1;
} else if (valid == 2) {
emif2_enabled = 1;
}
}
}
/*
@@ -1255,15 +1281,20 @@ void sdram_init(void)
writel(CM_DLL_CTRL_NO_OVERRIDE, &prcm->cm_dll_ctrl);
}
do_sdram_init(EMIF1_BASE);
do_sdram_init(EMIF2_BASE);
if (!in_sdram)
dmm_init(DMM_BASE);
if (emif1_enabled)
do_sdram_init(EMIF1_BASE);
if (emif2_enabled)
do_sdram_init(EMIF2_BASE);
if (!(in_sdram || warm_reset())) {
emif_post_init_config(EMIF1_BASE);
emif_post_init_config(EMIF2_BASE);
if (emif1_enabled)
emif_post_init_config(EMIF1_BASE);
if (emif2_enabled)
emif_post_init_config(EMIF2_BASE);
}
/* for the shadow registers to take effect */

View File

@@ -47,6 +47,11 @@ SECTIONS
. = ALIGN(4);
.data : { *(SORT_BY_ALIGNMENT(.data*)) } >.sram
.u_boot_list : {
#include <u-boot.lst>
}
. = ALIGN(4);
__image_copy_end = .;
_end = .;

View File

@@ -38,6 +38,7 @@ endif
COBJS-$(CONFIG_DRIVER_TI_EMAC) += emac.o
COBJS-$(CONFIG_EMIF4) += emif4.o
COBJS-$(CONFIG_SDRC) += sdrc.o
COBJS-$(CONFIG_USB_MUSB_AM35X) += am35x_musb.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS) $(COBJS-y) $(SOBJS))

View File

@@ -0,0 +1,75 @@
/*
* This file configures the internal USB PHY in AM35X.
*
* Copyright (C) 2012 Ilya Yanok <ilya.yanok@gmail.com>
*
* Based on omap_phy_internal.c code from Linux by
* Hema HK <hemahk@ti.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc.
*
*/
#include <common.h>
#include <asm/io.h>
#include <asm/arch/am35x_def.h>
void am35x_musb_reset(void)
{
/* Reset the musb interface */
clrsetbits_le32(&am35x_scm_general_regs->ip_sw_reset,
0, USBOTGSS_SW_RST);
clrsetbits_le32(&am35x_scm_general_regs->ip_sw_reset,
USBOTGSS_SW_RST, 0);
}
void am35x_musb_phy_power(u8 on)
{
unsigned long start = get_timer(0);
if (on) {
/*
* Start the on-chip PHY and its PLL.
*/
clrsetbits_le32(&am35x_scm_general_regs->devconf2,
CONF2_RESET | CONF2_PHYPWRDN | CONF2_OTGPWRDN,
CONF2_PHY_PLLON);
debug("Waiting for PHY clock good...\n");
while (!(readl(&am35x_scm_general_regs->devconf2)
& CONF2_PHYCLKGD)) {
if (get_timer(start) > CONFIG_SYS_HZ / 10) {
printf("musb PHY clock good timed out\n");
break;
}
}
} else {
/*
* Power down the on-chip PHY.
*/
clrsetbits_le32(&am35x_scm_general_regs->devconf2,
CONF2_PHY_PLLON,
CONF2_PHYPWRDN | CONF2_OTGPWRDN);
}
}
void am35x_musb_clear_irq(void)
{
clrsetbits_le32(&am35x_scm_general_regs->lvl_intr_clr,
0, USBOTGSS_INT_CLR);
readl(&am35x_scm_general_regs->lvl_intr_clr);
}

View File

@@ -50,7 +50,9 @@ DECLARE_GLOBAL_DATA_PTR;
/* Declarations */
extern omap3_sysinfo sysinfo;
static void omap3_setup_aux_cr(void);
#ifndef CONFIG_SYS_L2CACHE_OFF
static void omap3_invalidate_l2_cache_secure(void);
#endif
static const struct gpio_bank gpio_bank_34xx[6] = {
{ (void *)OMAP34XX_GPIO1_BASE, METHOD_GPIO_24XX },
@@ -410,19 +412,6 @@ static void omap3_update_aux_cr_secure(u32 set_bits, u32 clear_bits)
}
}
static void omap3_update_aux_cr(u32 set_bits, u32 clear_bits)
{
u32 acr;
/* Read ACR */
asm volatile ("mrc p15, 0, %0, c1, c0, 1" : "=r" (acr));
acr &= ~clear_bits;
acr |= set_bits;
/* Write ACR - affects non-secure banked bits */
asm volatile ("mcr p15, 0, %0, c1, c0, 1" : : "r" (acr));
}
static void omap3_setup_aux_cr(void)
{
/* Workaround for Cortex-A8 errata: #454179 #430973
@@ -436,6 +425,19 @@ static void omap3_setup_aux_cr(void)
}
#ifndef CONFIG_SYS_L2CACHE_OFF
static void omap3_update_aux_cr(u32 set_bits, u32 clear_bits)
{
u32 acr;
/* Read ACR */
asm volatile ("mrc p15, 0, %0, c1, c0, 1" : "=r" (acr));
acr &= ~clear_bits;
acr |= set_bits;
/* Write ACR - affects non-secure banked bits */
asm volatile ("mcr p15, 0, %0, c1, c0, 1" : : "r" (acr));
}
/* Invalidate the entire L2 cache from secure mode */
static void omap3_invalidate_l2_cache_secure(void)
{
@@ -476,7 +478,7 @@ void omap3_outer_cache_disable(void)
*/
omap3_update_aux_cr(0, 0x2);
}
#endif
#endif /* !CONFIG_SYS_L2CACHE_OFF */
#ifndef CONFIG_SYS_DCACHE_OFF
void enable_caches(void)
@@ -484,4 +486,4 @@ void enable_caches(void)
/* Enable D-cache. I-cache is already enabled in start.S */
dcache_enable();
}
#endif
#endif /* !CONFIG_SYS_DCACHE_OFF */

View File

@@ -42,14 +42,7 @@ static const u32 gpmc_m_nand[GPMC_MAX_REG] = {
M_NAND_GPMC_CONFIG5,
M_NAND_GPMC_CONFIG6, 0
};
#if defined(CONFIG_ENV_IS_IN_NAND)
#define GPMC_CS 0
#else
#define GPMC_CS 1
#endif
#endif
#endif /* CONFIG_CMD_NAND */
#if defined(CONFIG_CMD_ONENAND)
static const u32 gpmc_onenand[GPMC_MAX_REG] = {
@@ -60,14 +53,7 @@ static const u32 gpmc_onenand[GPMC_MAX_REG] = {
ONENAND_GPMC_CONFIG5,
ONENAND_GPMC_CONFIG6, 0
};
#if defined(CONFIG_ENV_IS_IN_ONENAND)
#define GPMC_CS 0
#else
#define GPMC_CS 1
#endif
#endif
#endif /* CONFIG_CMD_ONENAND */
/********************************************************
* mem_ok() - test used to see if timings are correct

View File

@@ -113,18 +113,18 @@ u32 get_sdr_cs_offset(u32 cs)
* - Test CS to make sure it's OK for use
*/
static void write_sdrc_timings(u32 cs, struct sdrc_actim *sdrc_actim_base,
u32 mcfg, u32 ctrla, u32 ctrlb, u32 rfr_ctrl, u32 mr)
struct board_sdrc_timings *timings)
{
/* Setup timings we got from the board. */
writel(mcfg, &sdrc_base->cs[cs].mcfg);
writel(ctrla, &sdrc_actim_base->ctrla);
writel(ctrlb, &sdrc_actim_base->ctrlb);
writel(rfr_ctrl, &sdrc_base->cs[cs].rfr_ctrl);
writel(timings->mcfg, &sdrc_base->cs[cs].mcfg);
writel(timings->ctrla, &sdrc_actim_base->ctrla);
writel(timings->ctrlb, &sdrc_actim_base->ctrlb);
writel(timings->rfr_ctrl, &sdrc_base->cs[cs].rfr_ctrl);
writel(CMD_NOP, &sdrc_base->cs[cs].manual);
writel(CMD_PRECHARGE, &sdrc_base->cs[cs].manual);
writel(CMD_AUTOREFRESH, &sdrc_base->cs[cs].manual);
writel(CMD_AUTOREFRESH, &sdrc_base->cs[cs].manual);
writel(mr, &sdrc_base->cs[cs].mr);
writel(timings->mr, &sdrc_base->cs[cs].mr);
/*
* Test ram in this bank
@@ -143,7 +143,7 @@ static void write_sdrc_timings(u32 cs, struct sdrc_actim *sdrc_actim_base,
void do_sdrc_init(u32 cs, u32 early)
{
struct sdrc_actim *sdrc_actim_base0, *sdrc_actim_base1;
u32 mcfg, ctrla, ctrlb, rfr_ctrl, mr;
struct board_sdrc_timings timings;
sdrc_actim_base0 = (struct sdrc_actim *)SDRC_ACTIM_CTRL0_BASE;
sdrc_actim_base1 = (struct sdrc_actim *)SDRC_ACTIM_CTRL1_BASE;
@@ -158,7 +158,7 @@ void do_sdrc_init(u32 cs, u32 early)
* setup CS1.
*/
#ifdef CONFIG_SPL_BUILD
get_board_mem_timings(&mcfg, &ctrla, &ctrlb, &rfr_ctrl, &mr);
get_board_mem_timings(&timings);
#endif
if (early) {
/* reset sdrc controller */
@@ -177,11 +177,9 @@ void do_sdrc_init(u32 cs, u32 early)
writel(ENADLL | DLLPHASE_90, &sdrc_base->dlla_ctrl);
sdelay(0x20000);
#ifdef CONFIG_SPL_BUILD
write_sdrc_timings(CS0, sdrc_actim_base0, mcfg, ctrla, ctrlb,
rfr_ctrl, mr);
write_sdrc_timings(CS0, sdrc_actim_base0, &timings);
make_cs1_contiguous();
write_sdrc_timings(CS1, sdrc_actim_base1, mcfg, ctrla, ctrlb,
rfr_ctrl, mr);
write_sdrc_timings(CS1, sdrc_actim_base1, &timings);
#endif
}
@@ -193,14 +191,12 @@ void do_sdrc_init(u32 cs, u32 early)
* so we may be asked now to setup CS1.
*/
if (cs == CS1) {
mcfg = readl(&sdrc_base->cs[CS0].mcfg),
rfr_ctrl = readl(&sdrc_base->cs[CS0].rfr_ctrl);
ctrla = readl(&sdrc_actim_base0->ctrla),
ctrlb = readl(&sdrc_actim_base0->ctrlb);
mr = readl(&sdrc_base->cs[CS0].mr);
write_sdrc_timings(cs, sdrc_actim_base1, mcfg, ctrla, ctrlb,
rfr_ctrl, mr);
timings.mcfg = readl(&sdrc_base->cs[CS0].mcfg),
timings.rfr_ctrl = readl(&sdrc_base->cs[CS0].rfr_ctrl);
timings.ctrla = readl(&sdrc_actim_base0->ctrla);
timings.ctrlb = readl(&sdrc_actim_base0->ctrlb);
timings.mr = readl(&sdrc_base->cs[CS0].mr);
write_sdrc_timings(cs, sdrc_actim_base1, &timings);
}
}

View File

@@ -44,7 +44,7 @@
*/
#define printf(fmt, args...)
#define puts(s)
#endif
#endif /* !CONFIG_SPL_BUILD */
struct omap4_prcm_regs *const prcm = (struct omap4_prcm_regs *)0x4A004100;

View File

@@ -116,7 +116,7 @@ void do_io_settings(void)
if ((omap4_rev < OMAP4460_ES1_0) || !readl(&ctrl->control_efuse_2))
writel(CONTROL_EFUSE_2_OVERRIDE, &ctrl->control_efuse_2);
}
#endif
#endif /* CONFIG_SPL_BUILD */
/* dummy fuction for omap4 */
void config_data_eye_leveling_samples(u32 emif_base)
@@ -182,4 +182,4 @@ void v7_outer_cache_disable(void)
{
set_pl310_ctrl_reg(0);
}
#endif
#endif /* !CONFIG_SYS_L2CACHE_OFF */

View File

@@ -28,7 +28,6 @@ LIB = $(obj)libs5p-common.o
COBJS-y += cpu_info.o
COBJS-y += timer.o
COBJS-y += sromc.o
COBJS-y += wdt.o
COBJS-$(CONFIG_PWM) += pwm.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)

View File

@@ -21,7 +21,6 @@
#include <asm/utils.h>
#include <version.h>
#include <image.h>
#include <malloc.h>
#include <asm/arch/reset_manager.h>
#include <spl.h>
@@ -37,9 +36,6 @@ u32 spl_boot_device(void)
*/
void spl_board_init(void)
{
/* init timer for enabling delay function */
timer_init();
/* de-assert reset for peripherals and bridges based on handoff */
reset_deassert_peripherals_handoff();

View File

@@ -155,12 +155,7 @@ reset:
bl cpu_init_crit
#endif
/* Set stackpointer in internal RAM to call board_init_f */
call_board_init_f:
ldr sp, =(CONFIG_SYS_INIT_SP_ADDR)
bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
ldr r0,=0x00000000
bl board_init_f
bl _main
/*------------------------------------------------------------------------------*/
@@ -177,14 +172,10 @@ ENTRY(relocate_code)
mov r5, r1 /* save addr of gd */
mov r6, r2 /* save addr of destination */
/* Set up the stack */
stack_setup:
mov sp, r4
adr r0, _start
cmp r0, r6
moveq r9, #0 /* no relocation. relocation offset(r9) = 0 */
beq clear_bss /* skip relocation */
beq relocate_done /* skip relocation */
mov r1, r6 /* r1 <- scratch for copy_loop */
ldr r3, _image_copy_end_ofs
add r2, r0, r3 /* r2 <- source end address */
@@ -233,34 +224,22 @@ fixnext:
add r2, r2, #8 /* each rel.dyn entry is 8 bytes */
cmp r2, r3
blo fixloop
b clear_bss
relocate_done:
bx lr
_rel_dyn_start_ofs:
.word __rel_dyn_start - _start
_rel_dyn_end_ofs:
.word __rel_dyn_end - _start
_dynsym_start_ofs:
.word __dynsym_start - _start
ENDPROC(relocate_code)
clear_bss:
ldr r0, _bss_start_ofs
ldr r1, _bss_end_ofs
mov r4, r6 /* reloc addr */
add r0, r0, r4
add r1, r1, r4
mov r2, #0x00000000 /* clear */
#endif
clbss_l:cmp r0, r1 /* clear loop... */
bhs clbss_e /* if reached end of bss, exit */
str r2, [r0]
add r0, r0, #4
b clbss_l
clbss_e:
/*
* We are done. Do not return, instead branch to second part of board
* initialization, now running from RAM.
*/
jump_2_ram:
ENTRY(c_runtime_cpu_setup)
/*
* If I-cache is enabled invalidate it
*/
@@ -279,20 +258,9 @@ jump_2_ram:
mcr p15, 0, r0, c12, c0, 0 @Set VBAR
#endif /* !Tegra20 */
ldr r0, _board_init_r_ofs
adr r1, _start
add lr, r0, r1
add lr, lr, r9
/* setup parameters for board_init_r */
mov r0, r5 /* gd_t */
mov r1, r6 /* dest_addr */
/* jump to it ... */
mov pc, lr
bx lr
_board_init_r_ofs:
.word board_init_r - _start
ENDPROC(relocate_code)
#endif
ENDPROC(c_runtime_cpu_setup)
/*************************************************************************
*

View File

@@ -1,5 +1,7 @@
#
# (C) Copyright 2000-2006
# (C) Copyright 2010,2011 Nvidia Corporation.
#
# (C) Copyright 2000-2003
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# See file CREDITS for list of people who contributed to this
@@ -23,15 +25,17 @@
include $(TOPDIR)/config.mk
LIB = $(obj)lib$(BOARD).o
LIB = $(obj)libtegra-common.o
COBJS = $(BOARD).o flash.o atm.o
COBJS-$(CONFIG_CMD_ENTERRCM) += cmd_enterrcm.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
COBJS := $(COBJS-y)
SRCS := $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS))
SOBJS := $(addprefix $(obj),$(SOBJS))
$(LIB): $(obj).depend $(OBJS)
all: $(obj).depend $(LIB)
$(LIB): $(OBJS)
$(call cmd_link_o_target, $(OBJS))
#########################################################################

View File

@@ -40,8 +40,8 @@
*/
#include <common.h>
#include <asm/arch/tegra20.h>
#include <asm/arch/pmc.h>
#include <asm/arch/tegra.h>
#include <asm/arch-tegra/pmc.h>
static int do_enterrcm(cmd_tbl_t *cmdtp, int flag, int argc,
char * const argv[])

View File

@@ -28,7 +28,8 @@ include $(TOPDIR)/config.mk
LIB = $(obj)lib$(SOC).o
COBJS-$(CONFIG_USB_EHCI_TEGRA) += usb.o
COBJS-$(CONFIG_CMD_ENTERRCM) += cmd_enterrcm.o
COBJS-$(CONFIG_PWM_TEGRA) += pwm.o
COBJS-$(CONFIG_VIDEO_TEGRA) += display.o
COBJS := $(COBJS-y)
SRCS := $(COBJS:.o=.c)

View File

@@ -0,0 +1,409 @@
/*
* (C) Copyright 2010
* NVIDIA Corporation <www.nvidia.com>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#include <asm/io.h>
#include <asm/arch/clock.h>
#include <asm/arch/tegra.h>
#include <asm/arch/display.h>
#include <asm/arch/dc.h>
#include <asm/arch-tegra/clk_rst.h>
#include <asm/arch-tegra/timer.h>
static struct fdt_disp_config config;
static void update_window(struct dc_ctlr *dc, struct disp_ctl_win *win)
{
unsigned h_dda, v_dda;
unsigned long val;
val = readl(&dc->cmd.disp_win_header);
val |= WINDOW_A_SELECT;
writel(val, &dc->cmd.disp_win_header);
writel(win->fmt, &dc->win.color_depth);
clrsetbits_le32(&dc->win.byte_swap, BYTE_SWAP_MASK,
BYTE_SWAP_NOSWAP << BYTE_SWAP_SHIFT);
val = win->out_x << H_POSITION_SHIFT;
val |= win->out_y << V_POSITION_SHIFT;
writel(val, &dc->win.pos);
val = win->out_w << H_SIZE_SHIFT;
val |= win->out_h << V_SIZE_SHIFT;
writel(val, &dc->win.size);
val = (win->w * win->bpp / 8) << H_PRESCALED_SIZE_SHIFT;
val |= win->h << V_PRESCALED_SIZE_SHIFT;
writel(val, &dc->win.prescaled_size);
writel(0, &dc->win.h_initial_dda);
writel(0, &dc->win.v_initial_dda);
h_dda = (win->w * 0x1000) / max(win->out_w - 1, 1);
v_dda = (win->h * 0x1000) / max(win->out_h - 1, 1);
val = h_dda << H_DDA_INC_SHIFT;
val |= v_dda << V_DDA_INC_SHIFT;
writel(val, &dc->win.dda_increment);
writel(win->stride, &dc->win.line_stride);
writel(0, &dc->win.buf_stride);
val = WIN_ENABLE;
if (win->bpp < 24)
val |= COLOR_EXPAND;
writel(val, &dc->win.win_opt);
writel((unsigned long)win->phys_addr, &dc->winbuf.start_addr);
writel(win->x, &dc->winbuf.addr_h_offset);
writel(win->y, &dc->winbuf.addr_v_offset);
writel(0xff00, &dc->win.blend_nokey);
writel(0xff00, &dc->win.blend_1win);
val = GENERAL_ACT_REQ | WIN_A_ACT_REQ;
val |= GENERAL_UPDATE | WIN_A_UPDATE;
writel(val, &dc->cmd.state_ctrl);
}
static void write_pair(struct fdt_disp_config *config, int item, u32 *reg)
{
writel(config->horiz_timing[item] |
(config->vert_timing[item] << 16), reg);
}
static int update_display_mode(struct dc_disp_reg *disp,
struct fdt_disp_config *config)
{
unsigned long val;
unsigned long rate;
unsigned long div;
writel(0x0, &disp->disp_timing_opt);
write_pair(config, FDT_LCD_TIMING_REF_TO_SYNC, &disp->ref_to_sync);
write_pair(config, FDT_LCD_TIMING_SYNC_WIDTH, &disp->sync_width);
write_pair(config, FDT_LCD_TIMING_BACK_PORCH, &disp->back_porch);
write_pair(config, FDT_LCD_TIMING_FRONT_PORCH, &disp->front_porch);
writel(config->width | (config->height << 16), &disp->disp_active);
val = DE_SELECT_ACTIVE << DE_SELECT_SHIFT;
val |= DE_CONTROL_NORMAL << DE_CONTROL_SHIFT;
writel(val, &disp->data_enable_opt);
val = DATA_FORMAT_DF1P1C << DATA_FORMAT_SHIFT;
val |= DATA_ALIGNMENT_MSB << DATA_ALIGNMENT_SHIFT;
val |= DATA_ORDER_RED_BLUE << DATA_ORDER_SHIFT;
writel(val, &disp->disp_interface_ctrl);
/*
* The pixel clock divider is in 7.1 format (where the bottom bit
* represents 0.5). Here we calculate the divider needed to get from
* the display clock (typically 600MHz) to the pixel clock. We round
* up or down as requried.
*/
rate = clock_get_periph_rate(PERIPH_ID_DISP1, CLOCK_ID_CGENERAL);
div = ((rate * 2 + config->pixel_clock / 2) / config->pixel_clock) - 2;
debug("Display clock %lu, divider %lu\n", rate, div);
writel(0x00010001, &disp->shift_clk_opt);
val = PIXEL_CLK_DIVIDER_PCD1 << PIXEL_CLK_DIVIDER_SHIFT;
val |= div << SHIFT_CLK_DIVIDER_SHIFT;
writel(val, &disp->disp_clk_ctrl);
return 0;
}
/* Start up the display and turn on power to PWMs */
static void basic_init(struct dc_cmd_reg *cmd)
{
u32 val;
writel(0x00000100, &cmd->gen_incr_syncpt_ctrl);
writel(0x0000011a, &cmd->cont_syncpt_vsync);
writel(0x00000000, &cmd->int_type);
writel(0x00000000, &cmd->int_polarity);
writel(0x00000000, &cmd->int_mask);
writel(0x00000000, &cmd->int_enb);
val = PW0_ENABLE | PW1_ENABLE | PW2_ENABLE;
val |= PW3_ENABLE | PW4_ENABLE | PM0_ENABLE;
val |= PM1_ENABLE;
writel(val, &cmd->disp_pow_ctrl);
val = readl(&cmd->disp_cmd);
val |= CTRL_MODE_C_DISPLAY << CTRL_MODE_SHIFT;
writel(val, &cmd->disp_cmd);
}
static void basic_init_timer(struct dc_disp_reg *disp)
{
writel(0x00000020, &disp->mem_high_pri);
writel(0x00000001, &disp->mem_high_pri_timer);
}
static const u32 rgb_enb_tab[PIN_REG_COUNT] = {
0x00000000,
0x00000000,
0x00000000,
0x00000000,
};
static const u32 rgb_polarity_tab[PIN_REG_COUNT] = {
0x00000000,
0x01000000,
0x00000000,
0x00000000,
};
static const u32 rgb_data_tab[PIN_REG_COUNT] = {
0x00000000,
0x00000000,
0x00000000,
0x00000000,
};
static const u32 rgb_sel_tab[PIN_OUTPUT_SEL_COUNT] = {
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00210222,
0x00002200,
0x00020000,
};
static void rgb_enable(struct dc_com_reg *com)
{
int i;
for (i = 0; i < PIN_REG_COUNT; i++) {
writel(rgb_enb_tab[i], &com->pin_output_enb[i]);
writel(rgb_polarity_tab[i], &com->pin_output_polarity[i]);
writel(rgb_data_tab[i], &com->pin_output_data[i]);
}
for (i = 0; i < PIN_OUTPUT_SEL_COUNT; i++)
writel(rgb_sel_tab[i], &com->pin_output_sel[i]);
}
int setup_window(struct disp_ctl_win *win, struct fdt_disp_config *config)
{
win->x = 0;
win->y = 0;
win->w = config->width;
win->h = config->height;
win->out_x = 0;
win->out_y = 0;
win->out_w = config->width;
win->out_h = config->height;
win->phys_addr = config->frame_buffer;
win->stride = config->width * (1 << config->log2_bpp) / 8;
debug("%s: depth = %d\n", __func__, config->log2_bpp);
switch (config->log2_bpp) {
case 5:
case 24:
win->fmt = COLOR_DEPTH_R8G8B8A8;
win->bpp = 32;
break;
case 4:
win->fmt = COLOR_DEPTH_B5G6R5;
win->bpp = 16;
break;
default:
debug("Unsupported LCD bit depth");
return -1;
}
return 0;
}
struct fdt_disp_config *tegra_display_get_config(void)
{
return config.valid ? &config : NULL;
}
static void debug_timing(const char *name, unsigned int timing[])
{
#ifdef DEBUG
int i;
debug("%s timing: ", name);
for (i = 0; i < FDT_LCD_TIMING_COUNT; i++)
debug("%d ", timing[i]);
debug("\n");
#endif
}
/**
* Decode panel information from the fdt, according to a standard binding
*
* @param blob fdt blob
* @param node offset of fdt node to read from
* @param config structure to store fdt config into
* @return 0 if ok, -ve on error
*/
static int tegra_decode_panel(const void *blob, int node,
struct fdt_disp_config *config)
{
int front, back, ref;
config->width = fdtdec_get_int(blob, node, "xres", -1);
config->height = fdtdec_get_int(blob, node, "yres", -1);
config->pixel_clock = fdtdec_get_int(blob, node, "clock", 0);
if (!config->pixel_clock || config->width == -1 ||
config->height == -1) {
debug("%s: Pixel parameters missing\n", __func__);
return -FDT_ERR_NOTFOUND;
}
back = fdtdec_get_int(blob, node, "left-margin", -1);
front = fdtdec_get_int(blob, node, "right-margin", -1);
ref = fdtdec_get_int(blob, node, "hsync-len", -1);
if ((back | front | ref) == -1) {
debug("%s: Horizontal parameters missing\n", __func__);
return -FDT_ERR_NOTFOUND;
}
/* Use a ref-to-sync of 1 always, and take this from the front porch */
config->horiz_timing[FDT_LCD_TIMING_REF_TO_SYNC] = 1;
config->horiz_timing[FDT_LCD_TIMING_SYNC_WIDTH] = ref;
config->horiz_timing[FDT_LCD_TIMING_BACK_PORCH] = back;
config->horiz_timing[FDT_LCD_TIMING_FRONT_PORCH] = front -
config->horiz_timing[FDT_LCD_TIMING_REF_TO_SYNC];
debug_timing("horiz", config->horiz_timing);
back = fdtdec_get_int(blob, node, "upper-margin", -1);
front = fdtdec_get_int(blob, node, "lower-margin", -1);
ref = fdtdec_get_int(blob, node, "vsync-len", -1);
if ((back | front | ref) == -1) {
debug("%s: Vertical parameters missing\n", __func__);
return -FDT_ERR_NOTFOUND;
}
config->vert_timing[FDT_LCD_TIMING_REF_TO_SYNC] = 1;
config->vert_timing[FDT_LCD_TIMING_SYNC_WIDTH] = ref;
config->vert_timing[FDT_LCD_TIMING_BACK_PORCH] = back;
config->vert_timing[FDT_LCD_TIMING_FRONT_PORCH] = front -
config->vert_timing[FDT_LCD_TIMING_REF_TO_SYNC];
debug_timing("vert", config->vert_timing);
return 0;
}
/**
* Decode the display controller information from the fdt.
*
* @param blob fdt blob
* @param config structure to store fdt config into
* @return 0 if ok, -ve on error
*/
static int tegra_display_decode_config(const void *blob,
struct fdt_disp_config *config)
{
int node, rgb;
int bpp, bit;
/* TODO: Support multiple controllers */
node = fdtdec_next_compatible(blob, 0, COMPAT_NVIDIA_TEGRA20_DC);
if (node < 0) {
debug("%s: Cannot find display controller node in fdt\n",
__func__);
return node;
}
config->disp = (struct disp_ctlr *)fdtdec_get_addr(blob, node, "reg");
if (!config->disp) {
debug("%s: No display controller address\n", __func__);
return -1;
}
rgb = fdt_subnode_offset(blob, node, "rgb");
config->panel_node = fdtdec_lookup_phandle(blob, rgb, "nvidia,panel");
if (!config->panel_node < 0) {
debug("%s: Cannot find panel information\n", __func__);
return -1;
}
if (tegra_decode_panel(blob, config->panel_node, config)) {
debug("%s: Failed to decode panel information\n", __func__);
return -1;
}
bpp = fdtdec_get_int(blob, config->panel_node, "nvidia,bits-per-pixel",
-1);
bit = ffs(bpp) - 1;
if (bpp == (1 << bit))
config->log2_bpp = bit;
else
config->log2_bpp = bpp;
if (bpp == -1) {
debug("%s: Pixel bpp parameters missing\n", __func__);
return -FDT_ERR_NOTFOUND;
}
config->bpp = bpp;
config->valid = 1; /* we have a valid configuration */
return 0;
}
int tegra_display_probe(const void *blob, void *default_lcd_base)
{
struct disp_ctl_win window;
struct dc_ctlr *dc;
if (tegra_display_decode_config(blob, &config))
return -1;
config.frame_buffer = (u32)default_lcd_base;
dc = (struct dc_ctlr *)config.disp;
/*
* A header file for clock constants was NAKed upstream.
* TODO: Put this into the FDT and fdt_lcd struct when we have clock
* support there
*/
clock_start_periph_pll(PERIPH_ID_HOST1X, CLOCK_ID_PERIPH,
144 * 1000000);
clock_start_periph_pll(PERIPH_ID_DISP1, CLOCK_ID_CGENERAL,
600 * 1000000);
basic_init(&dc->cmd);
basic_init_timer(&dc->disp);
rgb_enable(&dc->com);
if (config.pixel_clock)
update_display_mode(&dc->disp, &config);
if (setup_window(&window, &config))
return -1;
update_window(dc, &window);
return 0;
}

View File

@@ -0,0 +1,101 @@
/*
* Tegra2 pulse width frequency modulator definitions
*
* Copyright (c) 2011 The Chromium OS Authors.
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#include <fdtdec.h>
#include <asm/io.h>
#include <asm/arch/clock.h>
#include <asm/arch/pwm.h>
struct pwm_info {
struct pwm_ctlr *pwm; /* Registers for our pwm controller */
int pwm_node; /* PWM device tree node */
} local;
void pwm_enable(unsigned channel, int rate, int pulse_width, int freq_divider)
{
u32 reg;
assert(channel < PWM_NUM_CHANNELS);
/* TODO: Can we use clock_adjust_periph_pll_div() here? */
clock_start_periph_pll(PERIPH_ID_PWM, CLOCK_ID_SFROM32KHZ, rate);
reg = PWM_ENABLE_MASK;
reg |= pulse_width << PWM_WIDTH_SHIFT;
reg |= freq_divider << PWM_DIVIDER_SHIFT;
writel(reg, &local.pwm[channel].control);
debug("%s: channel=%d, rate=%d\n", __func__, channel, rate);
}
int pwm_request(const void *blob, int node, const char *prop_name)
{
int pwm_node;
u32 data[3];
if (fdtdec_get_int_array(blob, node, prop_name, data,
ARRAY_SIZE(data))) {
debug("%s: Cannot decode PWM property '%s'\n", __func__,
prop_name);
return -1;
}
pwm_node = fdt_node_offset_by_phandle(blob, data[0]);
if (pwm_node != local.pwm_node) {
debug("%s: PWM property '%s' phandle %d not recognised"
"- expecting %d\n", __func__, prop_name, data[0],
local.pwm_node);
return -1;
}
if (data[1] >= PWM_NUM_CHANNELS) {
debug("%s: PWM property '%s': invalid channel %u\n", __func__,
prop_name, data[1]);
return -1;
}
/*
* TODO: We could maintain a list of requests, but it might not be
* worth it for U-Boot.
*/
return data[1];
}
int pwm_init(const void *blob)
{
local.pwm_node = fdtdec_next_compatible(blob, 0,
COMPAT_NVIDIA_TEGRA20_PWM);
if (local.pwm_node < 0) {
debug("%s: Cannot find device tree node\n", __func__);
return -1;
}
local.pwm = (struct pwm_ctlr *)fdtdec_get_addr(blob, local.pwm_node,
"reg");
if (local.pwm == (struct pwm_ctlr *)FDT_ADDR_T_NONE) {
debug("%s: Cannot find pwm reg address\n", __func__);
return -1;
}
debug("Tegra PWM at %p, node %d\n", local.pwm, local.pwm_node);
return 0;
}

View File

@@ -24,17 +24,25 @@
#include <common.h>
#include <asm/io.h>
#include <asm-generic/gpio.h>
#include <asm/arch/tegra20.h>
#include <asm/arch/clk_rst.h>
#include <asm/arch/clock.h>
#include <asm/arch/gpio.h>
#include <asm/arch/pinmux.h>
#include <asm/arch/sys_proto.h>
#include <asm/arch/uart.h>
#include <asm/arch/tegra.h>
#include <asm/arch/usb.h>
#include <usb/ulpi.h>
#include <asm/arch-tegra/clk_rst.h>
#include <asm/arch-tegra/sys_proto.h>
#include <asm/arch-tegra/uart.h>
#include <libfdt.h>
#include <fdtdec.h>
#ifdef CONFIG_USB_ULPI
#ifndef CONFIG_USB_ULPI_VIEWPORT
#error "To use CONFIG_USB_ULPI on Tegra Boards you have to also \
define CONFIG_USB_ULPI_VIEWPORT"
#endif
#endif
enum {
USB_PORTS_MAX = 4, /* Maximum ports we allow */
};
@@ -68,16 +76,17 @@ enum dr_mode {
struct fdt_usb {
struct usb_ctlr *reg; /* address of registers in physical memory */
unsigned utmi:1; /* 1 if port has external tranceiver, else 0 */
unsigned ulpi:1; /* 1 if port has external ULPI transceiver */
unsigned enabled:1; /* 1 to enable, 0 to disable */
unsigned has_legacy_mode:1; /* 1 if this port has legacy mode */
enum dr_mode dr_mode; /* dual role mode */
enum periph_id periph_id;/* peripheral id */
struct fdt_gpio_state vbus_gpio; /* GPIO for vbus enable */
struct fdt_gpio_state phy_reset_gpio; /* GPIO to reset ULPI phy */
};
static struct fdt_usb port[USB_PORTS_MAX]; /* List of valid USB ports */
static unsigned port_count; /* Number of available ports */
static int port_current; /* Current port (-1 = none) */
/*
* This table has USB timing parameters for each Oscillator frequency we
@@ -188,8 +197,8 @@ void usbf_reset_controller(struct fdt_usb *config, struct usb_ctlr *usbctlr)
*/
}
/* set up the USB controller with the parameters provided */
static int init_usb_controller(struct fdt_usb *config,
/* set up the UTMI USB controller with the parameters provided */
static int init_utmi_usb_controller(struct fdt_usb *config,
struct usb_ctlr *usbctlr, const u32 timing[])
{
u32 val;
@@ -298,18 +307,116 @@ static int init_usb_controller(struct fdt_usb *config,
if (!loop_count)
return -1;
return 0;
}
/* Disable ICUSB FS/LS transceiver */
clrbits_le32(&usbctlr->icusb_ctrl, IC_ENB1);
/* Select UTMI parallel interface */
clrsetbits_le32(&usbctlr->port_sc1, PTS_MASK,
PTS_UTMI << PTS_SHIFT);
clrbits_le32(&usbctlr->port_sc1, STS);
static void power_up_port(struct usb_ctlr *usbctlr)
{
/* Deassert power down state */
clrbits_le32(&usbctlr->utmip_xcvr_cfg0, UTMIP_FORCE_PD_POWERDOWN |
UTMIP_FORCE_PD2_POWERDOWN | UTMIP_FORCE_PDZI_POWERDOWN);
clrbits_le32(&usbctlr->utmip_xcvr_cfg1, UTMIP_FORCE_PDDISC_POWERDOWN |
UTMIP_FORCE_PDCHRP_POWERDOWN | UTMIP_FORCE_PDDR_POWERDOWN);
return 0;
}
#ifdef CONFIG_USB_ULPI
/* if board file does not set a ULPI reference frequency we default to 24MHz */
#ifndef CONFIG_ULPI_REF_CLK
#define CONFIG_ULPI_REF_CLK 24000000
#endif
/* set up the ULPI USB controller with the parameters provided */
static int init_ulpi_usb_controller(struct fdt_usb *config,
struct usb_ctlr *usbctlr)
{
u32 val;
int loop_count;
struct ulpi_viewport ulpi_vp;
/* set up ULPI reference clock on pllp_out4 */
clock_enable(PERIPH_ID_DEV2_OUT);
clock_set_pllout(CLOCK_ID_PERIPH, PLL_OUT4, CONFIG_ULPI_REF_CLK);
/* reset ULPI phy */
if (fdt_gpio_isvalid(&config->phy_reset_gpio)) {
fdtdec_setup_gpio(&config->phy_reset_gpio);
gpio_direction_output(config->phy_reset_gpio.gpio, 0);
mdelay(5);
gpio_set_value(config->phy_reset_gpio.gpio, 1);
}
/* Reset the usb controller */
clock_enable(config->periph_id);
usbf_reset_controller(config, usbctlr);
/* enable pinmux bypass */
setbits_le32(&usbctlr->ulpi_timing_ctrl_0,
ULPI_CLKOUT_PINMUX_BYP | ULPI_OUTPUT_PINMUX_BYP);
/* Select ULPI parallel interface */
clrsetbits_le32(&usbctlr->port_sc1, PTS_MASK, PTS_ULPI << PTS_SHIFT);
/* enable ULPI transceiver */
setbits_le32(&usbctlr->susp_ctrl, ULPI_PHY_ENB);
/* configure ULPI transceiver timings */
val = 0;
writel(val, &usbctlr->ulpi_timing_ctrl_1);
val |= ULPI_DATA_TRIMMER_SEL(4);
val |= ULPI_STPDIRNXT_TRIMMER_SEL(4);
val |= ULPI_DIR_TRIMMER_SEL(4);
writel(val, &usbctlr->ulpi_timing_ctrl_1);
udelay(10);
val |= ULPI_DATA_TRIMMER_LOAD;
val |= ULPI_STPDIRNXT_TRIMMER_LOAD;
val |= ULPI_DIR_TRIMMER_LOAD;
writel(val, &usbctlr->ulpi_timing_ctrl_1);
/* set up phy for host operation with external vbus supply */
ulpi_vp.port_num = 0;
ulpi_vp.viewport_addr = (u32)&usbctlr->ulpi_viewport;
if (ulpi_init(&ulpi_vp)) {
printf("Tegra ULPI viewport init failed\n");
return -1;
}
ulpi_set_vbus(&ulpi_vp, 1, 1);
ulpi_set_vbus_indicator(&ulpi_vp, 1, 1, 0);
/* enable wakeup events */
setbits_le32(&usbctlr->port_sc1, WKCN | WKDS | WKOC);
/* Enable and wait for the phy clock to become valid in 100 ms */
setbits_le32(&usbctlr->susp_ctrl, USB_SUSP_CLR);
for (loop_count = 100000; loop_count != 0; loop_count--) {
if (readl(&usbctlr->susp_ctrl) & USB_PHY_CLK_VALID)
break;
udelay(1);
}
if (!loop_count)
return -1;
clrbits_le32(&usbctlr->susp_ctrl, USB_SUSP_CLR);
return 0;
}
#else
static int init_ulpi_usb_controller(struct fdt_usb *config,
struct usb_ctlr *usbctlr)
{
printf("No code to set up ULPI controller, please enable"
"CONFIG_USB_ULPI and CONFIG_USB_ULPI_VIEWPORT");
return -1;
}
#endif
static void config_clock(const u32 timing[])
{
clock_start_pll(CLOCK_ID_USB,
@@ -328,53 +435,45 @@ static int add_port(struct fdt_usb *config, const u32 timing[])
struct usb_ctlr *usbctlr = config->reg;
if (port_count == USB_PORTS_MAX) {
debug("tegrausb: Cannot register more than %d ports\n",
printf("tegrausb: Cannot register more than %d ports\n",
USB_PORTS_MAX);
return -1;
}
if (init_usb_controller(config, usbctlr, timing)) {
debug("tegrausb: Cannot init port\n");
if (config->utmi && init_utmi_usb_controller(config, usbctlr, timing)) {
printf("tegrausb: Cannot init port\n");
return -1;
}
if (config->utmi) {
/* Disable ICUSB FS/LS transceiver */
clrbits_le32(&usbctlr->icusb_ctrl, IC_ENB1);
/* Select UTMI parallel interface */
clrsetbits_le32(&usbctlr->port_sc1, PTS_MASK,
PTS_UTMI << PTS_SHIFT);
clrbits_le32(&usbctlr->port_sc1, STS);
power_up_port(usbctlr);
if (config->ulpi && init_ulpi_usb_controller(config, usbctlr)) {
printf("tegrausb: Cannot init port\n");
return -1;
}
port[port_count++] = *config;
return 0;
}
int tegrausb_start_port(unsigned portnum, u32 *hccr, u32 *hcor)
int tegrausb_start_port(int portnum, u32 *hccr, u32 *hcor)
{
struct usb_ctlr *usbctlr;
if (portnum >= port_count)
return -1;
tegrausb_stop_port();
set_host_mode(&port[portnum]);
usbctlr = port[portnum].reg;
*hccr = (u32)&usbctlr->cap_length;
*hcor = (u32)&usbctlr->usb_cmd;
port_current = portnum;
return 0;
}
int tegrausb_stop_port(void)
int tegrausb_stop_port(int portnum)
{
struct usb_ctlr *usbctlr;
if (port_current == -1)
return -1;
usbctlr = port[port_current].reg;
usbctlr = port[portnum].reg;
/* Stop controller */
writel(0, &usbctlr->usb_cmd);
@@ -383,7 +482,7 @@ int tegrausb_stop_port(void)
/* Initiate controller reset */
writel(2, &usbctlr->usb_cmd);
udelay(1000);
port_current = -1;
return 0;
}
@@ -412,6 +511,7 @@ int fdt_decode_usb(const void *blob, int node, unsigned osc_frequency_mhz,
phy = fdt_getprop(blob, node, "phy_type", NULL);
config->utmi = phy && 0 == strcmp("utmi", phy);
config->ulpi = phy && 0 == strcmp("ulpi", phy);
config->enabled = fdtdec_get_is_enabled(blob, node);
config->has_legacy_mode = fdtdec_get_bool(blob, node,
"nvidia,has-legacy-mode");
@@ -421,10 +521,13 @@ int fdt_decode_usb(const void *blob, int node, unsigned osc_frequency_mhz,
return -FDT_ERR_NOTFOUND;
}
fdtdec_decode_gpio(blob, node, "nvidia,vbus-gpio", &config->vbus_gpio);
debug("enabled=%d, legacy_mode=%d, utmi=%d, periph_id=%d, vbus=%d, "
"dr_mode=%d\n", config->enabled, config->has_legacy_mode,
config->utmi, config->periph_id, config->vbus_gpio.gpio,
config->dr_mode);
fdtdec_decode_gpio(blob, node, "nvidia,phy-reset-gpio",
&config->phy_reset_gpio);
debug("enabled=%d, legacy_mode=%d, utmi=%d, ulpi=%d, periph_id=%d, "
"vbus=%d, phy_reset=%d, dr_mode=%d\n",
config->enabled, config->has_legacy_mode, config->utmi,
config->ulpi, config->periph_id, config->vbus_gpio.gpio,
config->phy_reset_gpio.gpio, config->dr_mode);
return 0;
}
@@ -459,7 +562,6 @@ int board_usb_init(const void *blob)
return -1;
set_host_mode(&config);
}
port_current = -1;
return 0;
}

View File

@@ -245,12 +245,7 @@ reset:
orr r0,r0,#0x13
msr cpsr,r0
/* Set initial stackpointer in SDRAM to call board_init_f */
call_board_init_f:
ldr sp, =(CONFIG_SYS_INIT_SP_ADDR)
bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
ldr r0,=0x00000000
bl board_init_f
bl _main
/*------------------------------------------------------------------------------*/
@@ -267,14 +262,10 @@ relocate_code:
mov r5, r1 /* save addr of gd */
mov r6, r2 /* save addr of destination */
/* Set up the stack */
stack_setup:
mov sp, r4
adr r0, _start
cmp r0, r6
moveq r9, #0 /* no relocation. relocation offset(r9) = 0 */
beq clear_bss /* skip relocation */
beq relocate_done /* skip relocation */
mov r1, r6 /* r1 <- scratch for copy_loop */
ldr r3, _bss_start_ofs
add r2, r0, r3 /* r2 <- source end address */
@@ -326,42 +317,9 @@ fixnext:
blo fixloop
#endif
clear_bss:
#ifndef CONFIG_SPL_BUILD
ldr r0, _bss_start_ofs
ldr r1, _bss_end_ofs
mov r4, r6 /* reloc addr */
add r0, r0, r4
add r1, r1, r4
mov r2, #0x00000000 /* clear */
relocate_done:
clbss_l:cmp r0, r1 /* clear loop... */
bhs clbss_e /* if reached end of bss, exit */
str r2, [r0]
add r0, r0, #4
b clbss_l
clbss_e:
bl coloured_LED_init
bl red_led_on
#endif
/*
* We are done. Do not return, instead branch to second part of board
* initialization, now running from RAM.
*/
ldr r0, _board_init_r_ofs
adr r1, _start
add lr, r0, r1
add lr, lr, r9
/* setup parameters for board_init_r */
mov r0, r5 /* gd_t */
mov r1, r6 /* dest_addr */
/* jump to it ... */
mov pc, lr
_board_init_r_ofs:
.word board_init_r - _start
bx lr
_rel_dyn_start_ofs:
.word __rel_dyn_start - _start
@@ -370,6 +328,11 @@ _rel_dyn_end_ofs:
_dynsym_start_ofs:
.word __dynsym_start - _start
.globl c_runtime_cpu_setup
c_runtime_cpu_setup:
bx lr
/****************************************************************************/
/* */
/* Interrupt handling */

View File

@@ -46,9 +46,11 @@ SECTIONS
. = ALIGN(4);
. = .;
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
. = ALIGN(4);
.u_boot_list : {
#include <u-boot.lst>
}
. = ALIGN(4);

View File

@@ -1,33 +0,0 @@
#
# (C) Copyright 2002
# Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
#
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
PLATFORM_RELFLAGS += -fno-common -ffixed-r8 -msoft-float
PLATFORM_CPPFLAGS += -march=armv4
# =========================================================================
#
# Supply options according to compiler version
#
# ========================================================================
PF_RELFLAGS_SLB_AT := $(call cc-option,-mshort-load-bytes,$(call cc-option,-malignment-traps,))
PLATFORM_RELFLAGS += $(PF_RELFLAGS_SLB_AT)

View File

@@ -1,83 +0,0 @@
/*
* (C) Copyright 2001-2004
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* (C) Copyright 2002
* David Mueller, ELSOFT AG, d.mueller@elsoft.ch
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#include <lh7a40x.h>
/* ------------------------------------------------------------------------- */
/* NOTE: This describes the proper use of this file.
*
* CONFIG_SYS_CLK_FREQ should be defined as the input frequency of the PLL.
*
* get_FCLK(), get_HCLK(), get_PCLK() return the clock of
* the specified bus in HZ.
*/
/* ------------------------------------------------------------------------- */
ulong get_PLLCLK (void)
{
return CONFIG_SYS_CLK_FREQ;
}
/* return FCLK frequency */
ulong get_FCLK (void)
{
lh7a40x_csc_t* csc = LH7A40X_CSC_PTR;
ulong maindiv1, maindiv2, prediv, ps;
/*
* from userguide 6.1.1.2
*
* FCLK = ((MAINDIV1 +2) * (MAINDIV2 +2) * 14.7456MHz) /
* ((PREDIV+2) * (2^PS))
*/
maindiv2 = (csc->clkset & CLKSET_MAINDIV2) >> 11;
maindiv1 = (csc->clkset & CLKSET_MAINDIV1) >> 7;
prediv = (csc->clkset & CLKSET_PREDIV) >> 2;
ps = (csc->clkset & CLKSET_PS) >> 16;
return (((maindiv2 + 2) * (maindiv1 + 2) * CONFIG_SYS_CLK_FREQ) /
((prediv + 2) * (1 << ps)));
}
/* return HCLK frequency */
ulong get_HCLK (void)
{
lh7a40x_csc_t* csc = LH7A40X_CSC_PTR;
return (get_FCLK () / ((csc->clkset & CLKSET_HCLKDIV) + 1));
}
/* return PCLK frequency */
ulong get_PCLK (void)
{
lh7a40x_csc_t* csc = LH7A40X_CSC_PTR;
return (get_HCLK () /
(1 << (((csc->clkset & CLKSET_PCLKDIV) >> 16) + 1)));
}

View File

@@ -1,506 +0,0 @@
/*
* armboot - Startup Code for ARM920 CPU-core
*
* Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
* Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
* Copyright (c) 2002 Gary Jennejohn <garyj@denx.de>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <asm-offsets.h>
#include <config.h>
#include <version.h>
/*
*************************************************************************
*
* Jump vector table as in table 3.1 in [1]
*
*************************************************************************
*/
.globl _start
_start: b reset
ldr pc, _undefined_instruction
ldr pc, _software_interrupt
ldr pc, _prefetch_abort
ldr pc, _data_abort
ldr pc, _not_used
ldr pc, _irq
ldr pc, _fiq
_undefined_instruction: .word undefined_instruction
_software_interrupt: .word software_interrupt
_prefetch_abort: .word prefetch_abort
_data_abort: .word data_abort
_not_used: .word not_used
_irq: .word irq
_fiq: .word fiq
.balignl 16,0xdeadbeef
/*
*************************************************************************
*
* Startup Code (reset vector)
*
* do important init only if we don't start from memory!
* relocate armboot to ram
* setup stack
* jump to second stage
*
*************************************************************************
*/
.globl _TEXT_BASE
_TEXT_BASE:
.word CONFIG_SYS_TEXT_BASE
/*
* These are defined in the board-specific linker script.
* Subtracting _start from them lets the linker put their
* relative position in the executable instead of leaving
* them null.
*/
.globl _bss_start_ofs
_bss_start_ofs:
.word __bss_start - _start
.globl _bss_end_ofs
_bss_end_ofs:
.word __bss_end__ - _start
.globl _end_ofs
_end_ofs:
.word _end - _start
#ifdef CONFIG_USE_IRQ
/* IRQ stack memory (calculated at run-time) */
.globl IRQ_STACK_START
IRQ_STACK_START:
.word 0x0badc0de
/* IRQ stack memory (calculated at run-time) */
.globl FIQ_STACK_START
FIQ_STACK_START:
.word 0x0badc0de
#endif
/* IRQ stack memory (calculated at run-time) + 8 bytes */
.globl IRQ_STACK_START_IN
IRQ_STACK_START_IN:
.word 0x0badc0de
/*
* the actual reset code
*/
reset:
/*
* set the cpu to SVC32 mode
*/
mrs r0,cpsr
bic r0,r0,#0x1f
orr r0,r0,#0xd3
msr cpsr,r0
#define pWDTCTL 0x80001400 /* Watchdog Timer control register */
#define pINTENC 0x8000050C /* Interrupt-Controller enable clear register */
#define pCLKSET 0x80000420 /* clock divisor register */
/* disable watchdog, set watchdog control register to
* all zeros (default reset)
*/
ldr r0, =pWDTCTL
mov r1, #0x0
str r1, [r0]
/*
* mask all IRQs by setting all bits in the INTENC register (default)
*/
mov r1, #0xffffffff
ldr r0, =pINTENC
str r1, [r0]
/* FCLK:HCLK:PCLK = 1:2:2 */
/* default FCLK is 200 MHz, using 14.7456 MHz fin */
ldr r0, =pCLKSET
ldr r1, =0x0004ee39
@ ldr r1, =0x0005ee39 @ 1: 2: 4
str r1, [r0]
/*
* we do sys-critical inits only at reboot,
* not when booting from ram!
*/
#ifndef CONFIG_SKIP_LOWLEVEL_INIT
bl cpu_init_crit
#endif
/* Set stackpointer in internal RAM to call board_init_f */
call_board_init_f:
ldr sp, =(CONFIG_SYS_INIT_SP_ADDR)
bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
ldr r0,=0x00000000
bl board_init_f
/*------------------------------------------------------------------------------*/
/*
* void relocate_code (addr_sp, gd, addr_moni)
*
* This "function" does not return, instead it continues in RAM
* after relocating the monitor code.
*
*/
.globl relocate_code
relocate_code:
mov r4, r0 /* save addr_sp */
mov r5, r1 /* save addr of gd */
mov r6, r2 /* save addr of destination */
/* Set up the stack */
stack_setup:
mov sp, r4
adr r0, _start
cmp r0, r6
moveq r9, #0 /* no relocation. relocation offset(r9) = 0 */
beq clear_bss /* skip relocation */
mov r1, r6 /* r1 <- scratch for copy_loop */
ldr r3, _bss_start_ofs
add r2, r0, r3 /* r2 <- source end address */
copy_loop:
ldmia r0!, {r9-r10} /* copy from source address [r0] */
stmia r1!, {r9-r10} /* copy to target address [r1] */
cmp r0, r2 /* until source end address [r2] */
blo copy_loop
#ifndef CONFIG_SPL_BUILD
/*
* fix .rel.dyn relocations
*/
ldr r0, _TEXT_BASE /* r0 <- Text base */
sub r9, r6, r0 /* r9 <- relocation offset */
ldr r10, _dynsym_start_ofs /* r10 <- sym table ofs */
add r10, r10, r0 /* r10 <- sym table in FLASH */
ldr r2, _rel_dyn_start_ofs /* r2 <- rel dyn start ofs */
add r2, r2, r0 /* r2 <- rel dyn start in FLASH */
ldr r3, _rel_dyn_end_ofs /* r3 <- rel dyn end ofs */
add r3, r3, r0 /* r3 <- rel dyn end in FLASH */
fixloop:
ldr r0, [r2] /* r0 <- location to fix up, IN FLASH! */
add r0, r0, r9 /* r0 <- location to fix up in RAM */
ldr r1, [r2, #4]
and r7, r1, #0xff
cmp r7, #23 /* relative fixup? */
beq fixrel
cmp r7, #2 /* absolute fixup? */
beq fixabs
/* ignore unknown type of fixup */
b fixnext
fixabs:
/* absolute fix: set location to (offset) symbol value */
mov r1, r1, LSR #4 /* r1 <- symbol index in .dynsym */
add r1, r10, r1 /* r1 <- address of symbol in table */
ldr r1, [r1, #4] /* r1 <- symbol value */
add r1, r1, r9 /* r1 <- relocated sym addr */
b fixnext
fixrel:
/* relative fix: increase location by offset */
ldr r1, [r0]
add r1, r1, r9
fixnext:
str r1, [r0]
add r2, r2, #8 /* each rel.dyn entry is 8 bytes */
cmp r2, r3
blo fixloop
#endif
clear_bss:
#ifndef CONFIG_SPL_BUILD
ldr r0, _bss_start_ofs
ldr r1, _bss_end_ofs
mov r4, r6 /* reloc addr */
add r0, r0, r4
add r1, r1, r4
mov r2, #0x00000000 /* clear */
clbss_l:cmp r0, r1 /* clear loop... */
bhs clbss_e /* if reached end of bss, exit */
str r2, [r0]
add r0, r0, #4
b clbss_l
clbss_e:
#endif
/*
* We are done. Do not return, instead branch to second part of board
* initialization, now running from RAM.
*/
ldr r0, _board_init_r_ofs
adr r1, _start
add lr, r0, r1
add lr, lr, r9
/* setup parameters for board_init_r */
mov r0, r5 /* gd_t */
mov r1, r6 /* dest_addr */
/* jump to it ... */
mov pc, lr
_board_init_r_ofs:
.word board_init_r - _start
_rel_dyn_start_ofs:
.word __rel_dyn_start - _start
_rel_dyn_end_ofs:
.word __rel_dyn_end - _start
_dynsym_start_ofs:
.word __dynsym_start - _start
/*
*************************************************************************
*
* CPU_init_critical registers
*
* setup important registers
* setup memory timing
*
*************************************************************************
*/
cpu_init_crit:
/*
* flush v4 I/D caches
*/
mov r0, #0
mcr p15, 0, r0, c7, c7, 0 /* flush v3/v4 cache */
mcr p15, 0, r0, c8, c7, 0 /* flush v4 TLB */
/*
* disable MMU stuff and caches
*/
mrc p15, 0, r0, c1, c0, 0
bic r0, r0, #0x00002300 @ clear bits 13, 9:8 (--V- --RS)
bic r0, r0, #0x00000087 @ clear bits 7, 2:0 (B--- -CAM)
orr r0, r0, #0x00000002 @ set bit 2 (A) Align
orr r0, r0, #0x00001000 @ set bit 12 (I) I-Cache
orr r0, r0, #0x40000000 @ set bit 30 (nF) notFastBus
mcr p15, 0, r0, c1, c0, 0
/*
* before relocating, we have to setup RAM timing
* because memory timing is board-dependend, you will
* find a lowlevel_init.S in your board directory.
*/
mov ip, lr
bl lowlevel_init
mov lr, ip
mov pc, lr
/*
*************************************************************************
*
* Interrupt handling
*
*************************************************************************
*/
@
@ IRQ stack frame.
@
#define S_FRAME_SIZE 72
#define S_OLD_R0 68
#define S_PSR 64
#define S_PC 60
#define S_LR 56
#define S_SP 52
#define S_IP 48
#define S_FP 44
#define S_R10 40
#define S_R9 36
#define S_R8 32
#define S_R7 28
#define S_R6 24
#define S_R5 20
#define S_R4 16
#define S_R3 12
#define S_R2 8
#define S_R1 4
#define S_R0 0
#define MODE_SVC 0x13
#define I_BIT 0x80
/*
* use bad_save_user_regs for abort/prefetch/undef/swi ...
* use irq_save_user_regs / irq_restore_user_regs for IRQ/FIQ handling
*/
.macro bad_save_user_regs
sub sp, sp, #S_FRAME_SIZE
stmia sp, {r0 - r12} @ Calling r0-r12
ldr r2, IRQ_STACK_START_IN
ldmia r2, {r2 - r3} @ get pc, cpsr
add r0, sp, #S_FRAME_SIZE @ restore sp_SVC
add r5, sp, #S_SP
mov r1, lr
stmia r5, {r0 - r3} @ save sp_SVC, lr_SVC, pc, cpsr
mov r0, sp
.endm
.macro irq_save_user_regs
sub sp, sp, #S_FRAME_SIZE
stmia sp, {r0 - r12} @ Calling r0-r12
add r8, sp, #S_PC
stmdb r8, {sp, lr}^ @ Calling SP, LR
str lr, [r8, #0] @ Save calling PC
mrs r6, spsr
str r6, [r8, #4] @ Save CPSR
str r0, [r8, #8] @ Save OLD_R0
mov r0, sp
.endm
.macro irq_restore_user_regs
ldmia sp, {r0 - lr}^ @ Calling r0 - lr
mov r0, r0
ldr lr, [sp, #S_PC] @ Get PC
add sp, sp, #S_FRAME_SIZE
subs pc, lr, #4 @ return & move spsr_svc into cpsr
.endm
.macro get_bad_stack
ldr r13, IRQ_STACK_START_IN @ setup our mode stack
str lr, [r13] @ save caller lr / spsr
mrs lr, spsr
str lr, [r13, #4]
mov r13, #MODE_SVC @ prepare SVC-Mode
@ msr spsr_c, r13
msr spsr, r13
mov lr, pc
movs pc, lr
.endm
.macro get_irq_stack @ setup IRQ stack
ldr sp, IRQ_STACK_START
.endm
.macro get_fiq_stack @ setup FIQ stack
ldr sp, FIQ_STACK_START
.endm
/*
* exception handlers
*/
.align 5
undefined_instruction:
get_bad_stack
bad_save_user_regs
bl do_undefined_instruction
.align 5
software_interrupt:
get_bad_stack
bad_save_user_regs
bl do_software_interrupt
.align 5
prefetch_abort:
get_bad_stack
bad_save_user_regs
bl do_prefetch_abort
.align 5
data_abort:
get_bad_stack
bad_save_user_regs
bl do_data_abort
.align 5
not_used:
get_bad_stack
bad_save_user_regs
bl do_not_used
#ifdef CONFIG_USE_IRQ
.align 5
irq:
get_irq_stack
irq_save_user_regs
bl do_irq
irq_restore_user_regs
.align 5
fiq:
get_fiq_stack
/* someone ought to write a more effiction fiq_save_user_regs */
irq_save_user_regs
bl do_fiq
irq_restore_user_regs
#else
.align 5
irq:
get_bad_stack
bad_save_user_regs
bl do_irq
.align 5
fiq:
get_bad_stack
bad_save_user_regs
bl do_fiq
#endif
.align 5
.globl reset_cpu
reset_cpu:
bl disable_interrupts
/* Disable watchdog */
ldr r1, =pWDTCTL
mov r3, #0
str r3, [r1]
/* reset counter */
ldr r3, =0x00001984
str r3, [r1, #4]
/* Enable the watchdog */
mov r3, #1
str r3, [r1]
_loop_forever:
b _loop_forever

Some files were not shown because too many files have changed in this diff Show More