Prepare v2016.01

Signed-off-by: Tom Rini <trini@konsulko.com>
dm: test: usb: Update the USB tests so that they all pass
2026-06-04 10:46:40 +03:00 · 2016-01-12 09:06:54 -05:00 · 2016-01-11 15:29:31 -05:00 · 2016-01-11 11:22:43 -05:00 · 2016-01-10 09:17:52 -05:00 · 2016-01-10 10:51:43 +01:00
63 changed files with 298 additions and 272 deletions
--- a/.mailmap
+++ b/.mailmap
@@ -12,7 +12,7 @@ Allen Martin <amartin@nvidia.com>
 Andreas Bießmann <andreas.devel@googlemail.com>
 Aneesh V <aneesh@ti.com>
 Dirk Behme <dirk.behme@googlemail.com>
-Fabio Estevam <fabio.estevam@freescale.com>
+Fabio Estevam <fabio.estevam@nxp.com>
 Jagan Teki <402jagan@gmail.com>
 Jagan Teki <jaganna@gmail.com>
 Jagan Teki <jaganna@xilinx.com>
@@ -28,4 +28,5 @@ Stefano Babic <sbabic@denx.de>
 TsiChung Liew <Tsi-Chung.Liew@freescale.com>
 Wolfgang Denk <wdenk>
 York Sun <yorksun@freescale.com>
+York Sun <york.sun@nxp.com>
 Łukasz Majewski <l.majewski@samsung.com>
--- a/6
+++ b/6
@@ -239,7 +239,7 @@ S:	Maintained
 T:	git git://git.denx.de/u-boot-freebsd.git

 FREESCALE QORIQ
-M:	York Sun <yorksun@freescale.com>
+M:	York Sun <york.sun@nxp.com>
 S:	Maintained
 T:	git git://git.denx.de/u-boot-fsl-qoriq.git

@@ -308,13 +308,13 @@ F:	arch/powerpc/cpu/mpc83xx/
 F:	arch/powerpc/include/asm/arch-mpc83xx/

 POWERPC MPC85XX
-M:	York Sun <yorksun@freescale.com>
+M:	York Sun <york.sun@nxp.com>
 S:	Maintained
 T:	git git://git.denx.de/u-boot-mpc85xx.git
 F:	arch/powerpc/cpu/mpc85xx/

 POWERPC MPC86XX
-M:	York Sun <yorksun@freescale.com>
+M:	York Sun <york.sun@nxp.com>
 S:	Maintained
 T:	git git://git.denx.de/u-boot-mpc86xx.git
 F:	arch/powerpc/cpu/mpc86xx/
--- a/4
+++ b/4
@@ -5,7 +5,7 @@
 VERSION = 2016
 PATCHLEVEL = 01
 SUBLEVEL =
-EXTRAVERSION = -rc4
+EXTRAVERSION =
 NAME =

 # *DOCUMENTATION*
@@ -1136,7 +1136,7 @@ spl/u-boot-spl.pbl: spl/u-boot-spl.bin FORCE
 	$(call if_changed,mkimage)

 ifeq ($(ARCH),arm)
-ifdef CONFIG_DM
+ifdef CONFIG_OF_CONTROL
 UBOOT_BINLOAD := u-boot-dtb.img
 else
 UBOOT_BINLOAD := u-boot.img
--- a/128
+++ b/128
@@ -34,12 +34,14 @@ In general, all boards for which a configuration option exists in the
 Makefile have been tested to some extent and can be considered
 "working". In fact, many of them are used in production systems.

-In case of problems see the CHANGELOG and CREDITS files to find out
-who contributed the specific port. The boards.cfg file lists board
-maintainers.
+In case of problems see the CHANGELOG file to find out who contributed
+the specific port. In addition, there are various MAINTAINERS files
+scattered throughout the U-Boot source identifying the people or
+companies responsible for various boards and subsystems.

-Note: There is no CHANGELOG file in the actual U-Boot source tree;
-it can be created dynamically from the Git log using:
+Note: As of August, 2010, there is no longer a CHANGELOG file in the
+actual U-Boot source tree; however, it can be created dynamically
+from the Git log using:

 	make CHANGELOG

@@ -48,7 +50,7 @@ Where to get help:
 ==================

 In case you have questions about, problems with or contributions for
-U-Boot you should send a message to the U-Boot mailing list at
+U-Boot, you should send a message to the U-Boot mailing list at
 <u-boot@lists.denx.de>. There is also an archive of previous traffic
 on the mailing list - please search the archive before asking FAQ's.
 Please see http://lists.denx.de/pipermail/u-boot and
@@ -58,7 +60,7 @@ http://dir.gmane.org/gmane.comp.boot-loaders.u-boot
 Where to get source code:
 =========================

-The U-Boot source code is maintained in the git repository at
+The U-Boot source code is maintained in the Git repository at
 git://www.denx.de/git/u-boot.git ; you can browse it online at
 http://www.denx.de/cgi-bin/gitweb.cgi?p=u-boot.git;a=summary

@@ -133,79 +135,24 @@ Directory Hierarchy:

 /arch			Architecture specific files
  /arc			Files generic to ARC architecture
-    /cpu		CPU specific files
-      /arc700		Files specific to ARC 700 CPUs
-    /lib		Architecture specific library files
  /arm			Files generic to ARM architecture
-    /cpu		CPU specific files
-      /arm720t		Files specific to ARM 720 CPUs
-      /arm920t		Files specific to ARM 920 CPUs
-	/at91		Files specific to Atmel AT91RM9200 CPU
-	/imx		Files specific to Freescale MC9328 i.MX CPUs
-	/s3c24x0	Files specific to Samsung S3C24X0 CPUs
-      /arm926ejs	Files specific to ARM 926 CPUs
-      /arm1136		Files specific to ARM 1136 CPUs
-      /pxa		Files specific to Intel XScale PXA CPUs
-      /sa1100		Files specific to Intel StrongARM SA1100 CPUs
-    /lib		Architecture specific library files
  /avr32		Files generic to AVR32 architecture
-    /cpu		CPU specific files
-    /lib		Architecture specific library files
  /blackfin		Files generic to Analog Devices Blackfin architecture
-    /cpu		CPU specific files
-    /lib		Architecture specific library files
  /m68k			Files generic to m68k architecture
-    /cpu		CPU specific files
-      /mcf52x2		Files specific to Freescale ColdFire MCF52x2 CPUs
-      /mcf5227x		Files specific to Freescale ColdFire MCF5227x CPUs
-      /mcf532x		Files specific to Freescale ColdFire MCF5329 CPUs
-      /mcf5445x		Files specific to Freescale ColdFire MCF5445x CPUs
-      /mcf547x_8x	Files specific to Freescale ColdFire MCF547x_8x CPUs
-    /lib		Architecture specific library files
  /microblaze		Files generic to microblaze architecture
-    /cpu		CPU specific files
-    /lib		Architecture specific library files
  /mips			Files generic to MIPS architecture
-    /cpu		CPU specific files
-      /mips32		Files specific to MIPS32 CPUs
-      /mips64		Files specific to MIPS64 CPUs
-    /lib		Architecture specific library files
  /nds32		Files generic to NDS32 architecture
-    /cpu		CPU specific files
-      /n1213		Files specific to Andes Technology N1213 CPUs
-    /lib		Architecture specific library files
  /nios2		Files generic to Altera NIOS2 architecture
-    /cpu		CPU specific files
-    /lib		Architecture specific library files
  /openrisc		Files generic to OpenRISC architecture
-    /cpu		CPU specific files
-    /lib		Architecture specific library files
  /powerpc		Files generic to PowerPC architecture
-    /cpu		CPU specific files
-      /mpc5xx		Files specific to Freescale MPC5xx CPUs
-      /mpc5xxx		Files specific to Freescale MPC5xxx CPUs
-      /mpc8xx		Files specific to Freescale MPC8xx CPUs
-      /mpc8260		Files specific to Freescale MPC8260 CPUs
-      /mpc85xx		Files specific to Freescale MPC85xx CPUs
-      /ppc4xx		Files specific to AMCC PowerPC 4xx CPUs
-    /lib		Architecture specific library files
+  /sandbox		Files generic to HW-independent "sandbox"
  /sh			Files generic to SH architecture
-    /cpu		CPU specific files
-      /sh2		Files specific to sh2 CPUs
-      /sh3		Files specific to sh3 CPUs
-      /sh4		Files specific to sh4 CPUs
-    /lib		Architecture specific library files
  /sparc		Files generic to SPARC architecture
-    /cpu		CPU specific files
-      /leon2		Files specific to Gaisler LEON2 SPARC CPU
-      /leon3		Files specific to Gaisler LEON3 SPARC CPU
-    /lib		Architecture specific library files
  /x86			Files generic to x86 architecture
-    /cpu		CPU specific files
-    /lib		Architecture specific library files
 /api			Machine/arch independent API for external apps
 /board			Board dependent files
 /common			Misc architecture independent functions
+/configs		Board default configuration files
 /disk			Code for disk drive partition handling
 /doc			Documentation (don't expect too much)
 /drivers		Commonly used device drivers
@@ -213,13 +160,12 @@ Directory Hierarchy:
 /examples		Example code for standalone applications, etc.
 /fs			Filesystem code (cramfs, ext2, jffs2, etc.)
 /include		Header Files
-/lib			Files generic to all architectures
-  /libfdt		Library files to support flattened device trees
-  /lzma			Library files to support LZMA decompression
-  /lzo			Library files to support LZO decompression
+/lib			Library routines generic to all architectures
+/Licenses		Various license files
 /net			Networking code
 /post			Power On Self Test
-/spl			Secondary Program Loader framework
+/scripts		Various build scripts and Makefiles
+/test			Various unit test files
 /tools			Tools to build S-Record or U-Boot images, etc.

 Software Configuration:
@@ -239,11 +185,11 @@ There are two classes of configuration variables:
  you don't know what you're doing; they have names beginning with
  "CONFIG_SYS_".

-Later we will add a configuration tool - probably similar to or even
-identical to what's used for the Linux kernel. Right now, we have to
-do the configuration by hand, which means creating some symbolic
-links and editing some configuration files. We use the TQM8xxL boards
-as an example here.
+Previously, all configuration was done by hand, which involved creating
+symbolic links and editing configuration files manually. More recently,
+U-Boot has added the Kbuild infrastructure used by the Linux kernel,
+allowing you to use the "make menuconfig" command to configure your
+build.


 Selection of Processor Architecture and Board Type:
@@ -257,10 +203,9 @@ Example: For a TQM823L module type:
 	cd u-boot
 	make TQM823L_defconfig

-For the Cogent platform, you need to specify the CPU type as well;
-e.g. "make cogent_mpc8xx_defconfig". And also configure the cogent
-directory according to the instructions in cogent/README.
-
+Note: If you're looking for the default configuration file for a board
+you're sure used to be there but is now missing, check the file
+doc/README.scrapyard for a list of no longer supported boards.

 Sandbox Environment:
 --------------------
@@ -277,13 +222,25 @@ Board Initialisation Flow:
 --------------------------

 This is the intended start-up flow for boards. This should apply for both
-SPL and U-Boot proper (i.e. they both follow the same rules). At present SPL
-mostly uses a separate code path, but the funtion names and roles of each
-function are the same. Some boards or architectures may not conform to this.
-At least most ARM boards which use CONFIG_SPL_FRAMEWORK conform to this.
+SPL and U-Boot proper (i.e. they both follow the same rules).

-Execution starts with start.S with three functions called during init after
-that. The purpose and limitations of each is described below.
+Note: "SPL" stands for "Secondary Program Loader," which is explained in
+more detail later in this file.
+
+At present, SPL mostly uses a separate code path, but the function names
+and roles of each function are the same. Some boards or architectures
+may not conform to this.  At least most ARM boards which use
+CONFIG_SPL_FRAMEWORK conform to this.
+
+Execution typically starts with an architecture-specific (and possibly
+CPU-specific) start.S file, such as:
+
+	- arch/arm/cpu/armv7/start.S
+	- arch/powerpc/cpu/mpc83xx/start.S
+	- arch/mips/cpu/start.S
+
+and so on. From there, three functions are called; the purpose and
+limitations of each of these functions are described below.

 lowlevel_init():
 	- purpose: essential init to permit execution to reach board_init_f()
@@ -6630,7 +6587,8 @@ it:

 * A CHANGELOG entry as plaintext (separate from the patch)

-* For major contributions, your entry to the CREDITS file
+* For major contributions, add a MAINTAINERS file with your
+  information and associated file and directory references.

 * When you add support for a new board, don't forget to add a
  maintainer e-mail address to the boards.cfg file, too.
--- a/arch/arm/cpu/armv7/am33xx/board.c
+++ b/arch/arm/cpu/armv7/am33xx/board.c
@@ -64,8 +64,31 @@ U_BOOT_DEVICES(am33xx_uarts) = {
 #   endif
 #  endif
 };
-#endif

+#ifdef CONFIG_DM_GPIO
+static const struct omap_gpio_platdata am33xx_gpio[] = {
+	{ 0, AM33XX_GPIO0_BASE },
+	{ 1, AM33XX_GPIO1_BASE },
+	{ 2, AM33XX_GPIO2_BASE },
+	{ 3, AM33XX_GPIO3_BASE },
+#ifdef CONFIG_AM43XX
+	{ 4, AM33XX_GPIO4_BASE },
+	{ 5, AM33XX_GPIO5_BASE },
+#endif
+};
+
+U_BOOT_DEVICES(am33xx_gpios) = {
+	{ "gpio_omap", &am33xx_gpio[0] },
+	{ "gpio_omap", &am33xx_gpio[1] },
+	{ "gpio_omap", &am33xx_gpio[2] },
+	{ "gpio_omap", &am33xx_gpio[3] },
+#ifdef CONFIG_AM43XX
+	{ "gpio_omap", &am33xx_gpio[4] },
+	{ "gpio_omap", &am33xx_gpio[5] },
+#endif
+};
+#endif
+#endif

 #ifndef CONFIG_DM_GPIO
 static const struct gpio_bank gpio_bank_am33xx[] = {
--- a/arch/powerpc/cpu/mpc5xxx/start.S
+++ b/arch/powerpc/cpu/mpc5xxx/start.S
@@ -91,6 +91,7 @@ _start:
 	li	r5,GD_SIZE	/* parameter 3:	 count			*/
 	bl	memset

+	li	r3, 0		/* parameter 1:	 bootflag		*/
 	bl	board_init_f	/* run 1st part of board init code (in Flash)*/
 	/* NOTREACHED - board_init_f() does not return */
 #else
@@ -169,6 +170,7 @@ lowboot_reentry:
 	/* r3: IMMR */
 	bl	cpu_init_f	/* run low-level CPU init code (in Flash)*/

+	li	r3, 0		/* parameter 1:	 bootflag		*/
 	bl	board_init_f	/* run 1st part of board init code (in Flash)*/

 	/* NOTREACHED - board_init_f() does not return */
--- a/arch/powerpc/cpu/mpc83xx/ecc.c
+++ b/arch/powerpc/cpu/mpc83xx/ecc.c
@@ -37,7 +37,7 @@ void ecc_print_status(void)
 	printf("Memory Error Disable:\n");
 	printf("  Multiple-Bit Error Disable: %d\n",
 	       (ddr->err_disable & ECC_ERROR_DISABLE_MBED) ? 1 : 0);
-	printf("  Sinle-Bit Error Disable: %d\n",
+	printf("  Single-Bit Error Disable: %d\n",
 	       (ddr->err_disable & ECC_ERROR_DISABLE_SBED) ? 1 : 0);
 	printf("  Memory Select Error Disable: %d\n\n",
 	       (ddr->err_disable & ECC_ERROR_DISABLE_MSED) ? 1 : 0);
@@ -273,7 +273,7 @@ int do_ecc(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
 			count = simple_strtoul(argv[3], NULL, 16);

 			if ((u32) addr % 8) {
-				printf("Address not alligned on "
+				printf("Address not aligned on "
 				       "double word boundary\n");
 				return 1;
 			}
@@ -312,7 +312,7 @@ int do_ecc(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
 			count = simple_strtoul(argv[3], NULL, 16);

 			if ((u32) addr % 8) {
-				printf("Address not alligned on "
+				printf("Address not aligned on "
 				       "double word boundary\n");
 				return 1;
 			}
--- a/arch/powerpc/cpu/mpc83xx/pci.c
+++ b/arch/powerpc/cpu/mpc83xx/pci.c
@@ -123,7 +123,7 @@ void mpc83xx_pci_init(int num_buses, struct pci_region **reg)
 	int i;

 	if (num_buses > MAX_BUSES) {
-		printf("%d PCI buses requsted, %d supported\n",
+		printf("%d PCI buses requested, %d supported\n",
 		       num_buses, MAX_BUSES);

 		num_buses = MAX_BUSES;
--- a/arch/powerpc/cpu/mpc83xx/qe_io.c
+++ b/arch/powerpc/cpu/mpc83xx/qe_io.c
@@ -23,7 +23,7 @@ void qe_config_iopin(u8 port, u8 pin, int dir, int open_drain, int assign)
 	volatile immap_t	*im = (volatile immap_t *)CONFIG_SYS_IMMR;
 	volatile qepio83xx_t	*par_io = (volatile qepio83xx_t *)&im->qepio;

-	/* Caculate pin location and 2bit mask and dir */
+	/* Calculate pin location and 2bit mask and dir */
 	pin_2bit_mask = (u32)(0x3 << (NUM_OF_PINS-(pin%(NUM_OF_PINS/2)+1)*2));
 	pin_2bit_dir = (u32)(dir << (NUM_OF_PINS-(pin%(NUM_OF_PINS/2)+1)*2));

--- a/arch/powerpc/cpu/mpc83xx/spd_sdram.c
+++ b/arch/powerpc/cpu/mpc83xx/spd_sdram.c
@@ -599,7 +599,7 @@ long int spd_sdram()

 	/*
 	 * Empirically set ~MCAS-to-preamble override for DDR 2.
-	 * Your milage will vary.
+	 * Your mileage will vary.
 	 */
 	cpo = 0;
 	if (spd.mem_type == SPD_MEMTYPE_DDR2) {
@@ -843,7 +843,7 @@ long int spd_sdram()

 #if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
 /*
- * Use timebase counter, get_timer() is not availabe
+ * Use timebase counter, get_timer() is not available
 * at this point of initialization yet.
 */
 static __inline__ unsigned long get_tbms (void)
--- a/arch/powerpc/cpu/mpc83xx/speed.c
+++ b/arch/powerpc/cpu/mpc83xx/speed.c
@@ -170,7 +170,7 @@ int get_clocks(void)
 		tsec1_clk = csb_clk / 3;
 		break;
 	default:
-		/* unkown SCCR_TSEC1CM value */
+		/* unknown SCCR_TSEC1CM value */
 		return -2;
 	}
 #endif
@@ -191,7 +191,7 @@ int get_clocks(void)
 		usbdr_clk = csb_clk / 3;
 		break;
 	default:
-		/* unkown SCCR_USBDRCM value */
+		/* unknown SCCR_USBDRCM value */
 		return -3;
 	}
 #endif
@@ -212,7 +212,7 @@ int get_clocks(void)
 		tsec2_clk = csb_clk / 3;
 		break;
 	default:
-		/* unkown SCCR_TSEC2CM value */
+		/* unknown SCCR_TSEC2CM value */
 		return -4;
 	}
 #elif defined(CONFIG_MPC8313)
@@ -239,7 +239,7 @@ int get_clocks(void)
 		usbmph_clk = csb_clk / 3;
 		break;
 	default:
-		/* unkown SCCR_USBMPHCM value */
+		/* unknown SCCR_USBMPHCM value */
 		return -5;
 	}

@@ -266,7 +266,7 @@ int get_clocks(void)
 		enc_clk = csb_clk / 3;
 		break;
 	default:
-		/* unkown SCCR_ENCCM value */
+		/* unknown SCCR_ENCCM value */
 		return -7;
 	}
 #endif
@@ -286,7 +286,7 @@ int get_clocks(void)
 		sdhc_clk = csb_clk / 3;
 		break;
 	default:
-		/* unkown SCCR_SDHCCM value */
+		/* unknown SCCR_SDHCCM value */
 		return -8;
 	}
 #endif
@@ -305,7 +305,7 @@ int get_clocks(void)
 		tdm_clk = csb_clk / 3;
 		break;
 	default:
-		/* unkown SCCR_TDMCM value */
+		/* unknown SCCR_TDMCM value */
 		return -8;
 	}
 #endif
@@ -345,7 +345,7 @@ int get_clocks(void)
 		pciexp1_clk = csb_clk / 3;
 		break;
 	default:
-		/* unkown SCCR_PCIEXP1CM value */
+		/* unknown SCCR_PCIEXP1CM value */
 		return -9;
 	}

@@ -363,7 +363,7 @@ int get_clocks(void)
 		pciexp2_clk = csb_clk / 3;
 		break;
 	default:
-		/* unkown SCCR_PCIEXP2CM value */
+		/* unknown SCCR_PCIEXP2CM value */
 		return -10;
 	}
 #endif
@@ -383,7 +383,7 @@ int get_clocks(void)
 		sata_clk = csb_clk / 3;
 		break;
 	default:
-		/* unkown SCCR_SATACM value */
+		/* unknown SCCR_SATA1CM value */
 		return -11;
 	}
 #endif
@@ -413,7 +413,7 @@ int get_clocks(void)

 	corecnf_tab_index = ((corepll & 0x1F) << 2) | ((corepll & 0x60) >> 5);
 	if (corecnf_tab_index > (sizeof(corecnf_tab) / sizeof(corecnf_t))) {
-		/* corecnf_tab_index is too high, possibly worng value */
+		/* corecnf_tab_index is too high, possibly wrong value */
 		return -11;
 	}
 	switch (corecnf_tab[corecnf_tab_index].core_csb_ratio) {
@@ -435,7 +435,7 @@ int get_clocks(void)
 		core_clk = 3 * csb_clk;
 		break;
 	default:
-		/* unkown core to csb ratio */
+		/* unknown core to csb ratio */
 		return -13;
 	}

--- a/arch/powerpc/cpu/mpc83xx/spl_minimal.c
+++ b/arch/powerpc/cpu/mpc83xx/spl_minimal.c
@@ -47,7 +47,7 @@ void cpu_init_f (volatile immap_t * im)
 			   (CONFIG_SYS_SPCR_OPT << SPCR_OPT_SHIFT);
 #endif

-	/* Enable Time Base & Decrimenter (so we will have udelay()) */
+	/* Enable Time Base & Decrementer (so we will have udelay()) */
 	im->sysconf.spcr |= SPCR_TBEN;

 	/* DDR control driver register */
--- a/arch/sandbox/dts/test.dts
+++ b/arch/sandbox/dts/test.dts
@@ -279,6 +279,11 @@
 			0x38 8>;
 	};

+	timer {
+		compatible = "sandbox,timer";
+		clock-frequency = <1000000>;
+	};
+
 	uart0: serial {
 		compatible = "sandbox,serial";
 		u-boot,dm-pre-reloc;
--- a/board/congatec/cgtqmx6eval/README
+++ b/board/congatec/cgtqmx6eval/README
@@ -25,11 +25,15 @@ host PC (/tftpboot , for example).

 => sf probe

+=> setenv serverip <server_ip_address>
+
+=> setenv ipaddr <board_ip_address>
+
 => tftp 0x12000000 SPL

 => sf erase 0x0 0x10000

-=> sf write 0x12000000 0x400 0x100
+=> sf write 0x12000000 0x400 0x10000

 => tftp 0x12000000 u-boot.img

--- a/board/freescale/common/pfuze.c
+++ b/board/freescale/common/pfuze.c
@@ -13,7 +13,8 @@
 int pfuze_mode_init(struct pmic *p, u32 mode)
 {
 	unsigned char offset, i, switch_num;
-	u32 id, ret;
+	u32 id;
+	int ret;

 	pmic_reg_read(p, PFUZE100_DEVICEID, &id);
 	id = id & 0xf;
--- a/board/freescale/ls2080a/MAINTAINERS
+++ b/board/freescale/ls2080a/MAINTAINERS
@@ -1,5 +1,5 @@
 LS2080A BOARD
-M:	York Sun <yorksun@freescale.com>
+M:	York Sun <york.sun@nxp.com>
 S:	Maintained
 F:	board/freescale/ls2080a/
 F:	include/configs/ls2080a_emu.h
--- a/board/freescale/mpc8572ds/MAINTAINERS
+++ b/board/freescale/mpc8572ds/MAINTAINERS
@@ -1,5 +1,5 @@
 MPC8572DS BOARD
-M:	York Sun <yorksun@freescale.com>
+M:	York Sun <york.sun@nxp.com>
 S:	Maintained
 F:	board/freescale/mpc8572ds/
 F:	include/configs/MPC8572DS.h
--- a/board/freescale/mx25pdk/MAINTAINERS
+++ b/board/freescale/mx25pdk/MAINTAINERS
@@ -1,5 +1,5 @@
 MX25PDK BOARD
-M:	Fabio Estevam <fabio.estevam@freescale.com>
+M:	Fabio Estevam <fabio.estevam@nxp.com>
 S:	Maintained
 F:	board/freescale/mx25pdk/
 F:	include/configs/mx25pdk.h
--- a/board/freescale/mx28evk/MAINTAINERS
+++ b/board/freescale/mx28evk/MAINTAINERS
@@ -1,5 +1,5 @@
 MX28EVK BOARD
-M:	Fabio Estevam <fabio.estevam@freescale.com>
+M:	Fabio Estevam <fabio.estevam@nxp.com>
 S:	Maintained
 F:	board/freescale/mx28evk/
 F:	include/configs/mx28evk.h
--- a/board/freescale/mx53ard/MAINTAINERS
+++ b/board/freescale/mx53ard/MAINTAINERS
@@ -1,5 +1,5 @@
 MX53ARD BOARD
-M:	Fabio Estevam <fabio.estevam@freescale.com>
+M:	Fabio Estevam <fabio.estevam@nxp.com>
 S:	Maintained
 F:	board/freescale/mx53ard/
 F:	include/configs/mx53ard.h
--- a/board/freescale/mx53smd/MAINTAINERS
+++ b/board/freescale/mx53smd/MAINTAINERS
@@ -1,5 +1,5 @@
 MX53SMD BOARD
-M:	Fabio Estevam <fabio.estevam@freescale.com>
+M:	Fabio Estevam <fabio.estevam@nxp.com>
 S:	Maintained
 F:	board/freescale/mx53smd/
 F:	include/configs/mx53smd.h
--- a/board/freescale/mx6qsabreauto/MAINTAINERS
+++ b/board/freescale/mx6qsabreauto/MAINTAINERS
@@ -1,5 +1,5 @@
 MX6QSABREAUTO BOARD
-M:	Fabio Estevam <fabio.estevam@freescale.com>
+M:	Fabio Estevam <fabio.estevam@nxp.com>
 M:	Peng Fan <Peng.Fan@freescale.com>
 S:	Maintained
 F:	board/freescale/mx6qsabreauto/
--- a/board/freescale/mx6sabresd/MAINTAINERS
+++ b/board/freescale/mx6sabresd/MAINTAINERS
@@ -1,5 +1,5 @@
 MX6SABRESD BOARD
-M:	Fabio Estevam <fabio.estevam@freescale.com>
+M:	Fabio Estevam <fabio.estevam@nxp.com>
 S:	Maintained
 F:	board/freescale/mx6sabresd/
 F:	include/configs/mx6sabresd.h
--- a/board/freescale/mx6sabresd/mx6sabresd.c
+++ b/board/freescale/mx6sabresd/mx6sabresd.c
@@ -94,8 +94,9 @@ static void setup_iomux_enet(void)

 	/* Reset AR8031 PHY */
 	gpio_direction_output(IMX_GPIO_NR(1, 25) , 0);
-	udelay(500);
+	mdelay(10);
 	gpio_set_value(IMX_GPIO_NR(1, 25), 1);
+	udelay(100);
 }

 static iomux_v3_cfg_t const usdhc2_pads[] = {
@@ -340,39 +341,6 @@ int board_mmc_init(bd_t *bis)
 }
 #endif

-int mx6_rgmii_rework(struct phy_device *phydev)
-{
-	unsigned short val;
-
-	/* To enable AR8031 ouput a 125MHz clk from CLK_25M */
-	phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x7);
-	phy_write(phydev, MDIO_DEVAD_NONE, 0xe, 0x8016);
-	phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x4007);
-
-	val = phy_read(phydev, MDIO_DEVAD_NONE, 0xe);
-	val &= 0xffe3;
-	val |= 0x18;
-	phy_write(phydev, MDIO_DEVAD_NONE, 0xe, val);
-
-	/* introduce tx clock delay */
-	phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x5);
-	val = phy_read(phydev, MDIO_DEVAD_NONE, 0x1e);
-	val |= 0x0100;
-	phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, val);
-
-	return 0;
-}
-
-int board_phy_config(struct phy_device *phydev)
-{
-	mx6_rgmii_rework(phydev);
-
-	if (phydev->drv->config)
-		phydev->drv->config(phydev);
-
-	return 0;
-}
-
 #if defined(CONFIG_VIDEO_IPUV3)
 static void disable_lvds(struct display_info_t const *dev)
 {
--- a/board/freescale/mx6slevk/MAINTAINERS
+++ b/board/freescale/mx6slevk/MAINTAINERS
@@ -1,5 +1,5 @@
 MX6SLEVK BOARD
-M:	Fabio Estevam <fabio.estevam@freescale.com>
+M:	Fabio Estevam <fabio.estevam@nxp.com>
 M:	Peng Fan <Peng.Fan@freescale.com>
 S:	Maintained
 F:	board/freescale/mx6slevk/
--- a/board/freescale/mx6sxsabresd/MAINTAINERS
+++ b/board/freescale/mx6sxsabresd/MAINTAINERS
@@ -1,5 +1,5 @@
 MX6SXSABRESD BOARD
-M:	Fabio Estevam <fabio.estevam@freescale.com>
+M:	Fabio Estevam <fabio.estevam@nxp.com>
 S:	Maintained
 F:	board/freescale/mx6sxsabresd/
 F:	include/configs/mx6sxsabresd.h
--- a/board/solidrun/mx6cuboxi/MAINTAINERS
+++ b/board/solidrun/mx6cuboxi/MAINTAINERS
@@ -1,5 +1,5 @@
 MX6CUBOXI BOARD
-M:	Fabio Estevam <fabio.estevam@freescale.com>
+M:	Fabio Estevam <fabio.estevam@nxp.com>
 S:	Maintained
 F:	board/solidrun/mx6cuboxi/
 F:	include/configs/mx6cuboxi.h
--- a/board/solidrun/mx6cuboxi/mx6cuboxi.c
+++ b/board/solidrun/mx6cuboxi/mx6cuboxi.c
@@ -143,8 +143,9 @@ static void setup_iomux_enet(void)
 	SETUP_IOMUX_PADS(enet_pads);

 	gpio_direction_output(ETH_PHY_RESET, 0);
-	mdelay(2);
+	mdelay(10);
 	gpio_set_value(ETH_PHY_RESET, 1);
+	udelay(100);
 }

 int board_phy_config(struct phy_device *phydev)
@@ -594,10 +595,6 @@ static void gpr_init(void)
 	writel(0x007F007F, &iomux->gpr[7]);
 }

-/*
- * This section requires the differentiation between Solidrun mx6 boards, but
- * for now, it will configure only for the mx6dual hummingboard version.
- */
 static void spl_dram_init(int width)
 {
 	struct mx6_ddr_sysinfo sysinfo = {
--- a/board/udoo/MAINTAINERS
+++ b/board/udoo/MAINTAINERS
@@ -1,5 +1,5 @@
 UDOO BOARD
-M:	Fabio Estevam <fabio.estevam@freescale.com>
+M:	Fabio Estevam <fabio.estevam@nxp.com>
 S:	Maintained
 F:	board/udoo/
 F:	include/configs/udoo.h
--- a/board/wandboard/MAINTAINERS
+++ b/board/wandboard/MAINTAINERS
@@ -1,5 +1,5 @@
 WANDBOARD BOARD
-M:	Fabio Estevam <fabio.estevam@freescale.com>
+M:	Fabio Estevam <fabio.estevam@nxp.com>
 S:	Maintained
 F:	board/wandboard/
 F:	include/configs/wandboard.h
--- a/board/wandboard/wandboard.c
+++ b/board/wandboard/wandboard.c
@@ -121,8 +121,9 @@ static void setup_iomux_enet(void)

 	/* Reset AR8031 PHY */
 	gpio_direction_output(ETH_PHY_RESET, 0);
-	udelay(500);
+	mdelay(10);
 	gpio_set_value(ETH_PHY_RESET, 1);
+	udelay(100);
 }

 static struct fsl_esdhc_cfg usdhc_cfg[2] = {
@@ -187,39 +188,6 @@ int board_mmc_init(bd_t *bis)
 	return 0;
 }

-static int mx6_rgmii_rework(struct phy_device *phydev)
-{
-	unsigned short val;
-
-	/* To enable AR8031 ouput a 125MHz clk from CLK_25M */
-	phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x7);
-	phy_write(phydev, MDIO_DEVAD_NONE, 0xe, 0x8016);
-	phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x4007);
-
-	val = phy_read(phydev, MDIO_DEVAD_NONE, 0xe);
-	val &= 0xffe3;
-	val |= 0x18;
-	phy_write(phydev, MDIO_DEVAD_NONE, 0xe, val);
-
-	/* introduce tx clock delay */
-	phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x5);
-	val = phy_read(phydev, MDIO_DEVAD_NONE, 0x1e);
-	val |= 0x0100;
-	phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, val);
-
-	return 0;
-}
-
-int board_phy_config(struct phy_device *phydev)
-{
-	mx6_rgmii_rework(phydev);
-
-	if (phydev->drv->config)
-		phydev->drv->config(phydev);
-
-	return 0;
-}
-
 #if defined(CONFIG_VIDEO_IPUV3)
 struct i2c_pads_info mx6q_i2c2_pad_info = {
 	.scl = {
--- a/common/cmd_mem.c
+++ b/common/cmd_mem.c
@@ -931,7 +931,7 @@ static ulong mem_test_alt(vu_long *buf, ulong start_addr, ulong end_addr,
 		addr[offset] = 0;
 	}

-	return 0;
+	return errs;
 }

 static ulong mem_test_quick(vu_long *buf, ulong start_addr, ulong end_addr,
@@ -990,7 +990,7 @@ static ulong mem_test_quick(vu_long *buf, ulong start_addr, ulong end_addr,
 		val += incr;
 	}

-	return 0;
+	return errs;
 }

 /*
--- a/common/fdt_support.c
+++ b/common/fdt_support.c
@@ -952,8 +952,7 @@ void fdt_del_node_and_alias(void *blob, const char *alias)
 /* Max address size we deal with */
 #define OF_MAX_ADDR_CELLS	4
 #define OF_BAD_ADDR	FDT_ADDR_T_NONE
-#define OF_CHECK_COUNTS(na, ns)	((na) > 0 && (na) <= OF_MAX_ADDR_CELLS && \
-			(ns) > 0)
+#define OF_CHECK_COUNTS(na)	((na) > 0 && (na) <= OF_MAX_ADDR_CELLS)

 /* Debug utility */
 #ifdef DEBUG
@@ -1121,7 +1120,7 @@ static u64 __of_translate_address(void *blob, int node_offset, const fdt32_t *in

 	/* Cound address cells & copy address locally */
 	bus->count_cells(blob, parent, &na, &ns);
-	if (!OF_CHECK_COUNTS(na, ns)) {
+	if (!OF_CHECK_COUNTS(na)) {
 		printf("%s: Bad cell count for %s\n", __FUNCTION__,
 		       fdt_get_name(blob, node_offset, NULL));
 		goto bail;
@@ -1148,7 +1147,7 @@ static u64 __of_translate_address(void *blob, int node_offset, const fdt32_t *in
 		/* Get new parent bus and counts */
 		pbus = &of_busses[0];
 		pbus->count_cells(blob, parent, &pna, &pns);
-		if (!OF_CHECK_COUNTS(pna, pns)) {
+		if (!OF_CHECK_COUNTS(pna)) {
 			printf("%s: Bad cell count for %s\n", __FUNCTION__,
 				fdt_get_name(blob, node_offset, NULL));
 			break;
--- a/common/usb_kbd.c
+++ b/common/usb_kbd.c
@@ -611,6 +611,41 @@ static int usb_kbd_probe(struct udevice *dev)
 	return ret;
 }

+static int usb_kbd_remove(struct udevice *dev)
+{
+	struct usb_device *udev = dev_get_parent_priv(dev);
+	struct usb_kbd_pdata *data;
+	struct stdio_dev *sdev;
+	int ret;
+
+	sdev = stdio_get_by_name(DEVNAME);
+	if (!sdev) {
+		ret = -ENXIO;
+		goto err;
+	}
+	data = udev->privptr;
+	if (stdio_deregister_dev(sdev, true)) {
+		ret = -EPERM;
+		goto err;
+	}
+#ifdef CONFIG_CONSOLE_MUX
+	if (iomux_doenv(stdin, getenv("stdin"))) {
+		ret = -ENOLINK;
+		goto err;
+	}
+#endif
+#ifdef CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE
+	destroy_int_queue(udev, data->intq);
+#endif
+	free(data->new);
+	free(data);
+
+	return 0;
+err:
+	printf("%s: warning, ret=%d", __func__, ret);
+	return ret;
+}
+
 static const struct udevice_id usb_kbd_ids[] = {
 	{ .compatible = "usb-keyboard" },
 	{ }
@@ -621,6 +656,7 @@ U_BOOT_DRIVER(usb_kbd) = {
 	.id	= UCLASS_KEYBOARD,
 	.of_match = usb_kbd_ids,
 	.probe = usb_kbd_probe,
+	.remove = usb_kbd_remove,
 };

 static const struct usb_device_id kbd_id_table[] = {
--- a/common/usb_storage.c
+++ b/common/usb_storage.c
@@ -65,7 +65,7 @@ static const unsigned char us_direction[256/8] = {
 static ccb usb_ccb __attribute__((aligned(ARCH_DMA_MINALIGN)));
 static __u32 CBWTag;

-#define USB_MAX_STOR_DEV 5
+#define USB_MAX_STOR_DEV 7
 static int usb_max_devs; /* number of highest available usb device */

 static block_dev_desc_t usb_dev_desc[USB_MAX_STOR_DEV];
--- a/configs/chromebook_jerry_defconfig
+++ b/configs/chromebook_jerry_defconfig
@@ -27,7 +27,9 @@ CONFIG_RESET=y
 CONFIG_DM_MMC=y
 CONFIG_ROCKCHIP_DWMMC=y
 CONFIG_PINCTRL=y
+# CONFIG_PINCTRL_FULL is not set
 CONFIG_SPL_PINCTRL=y
+# CONFIG_SPL_PINCTRL_FULL is not set
 CONFIG_ROCKCHIP_PINCTRL=y
 CONFIG_DM_PMIC=y
 CONFIG_PMIC_ACT8846=y
@@ -41,5 +43,7 @@ CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_SHIFT=2
 CONFIG_SYS_NS16550=y
 CONFIG_USE_PRIVATE_LIBGCC=y
+CONFIG_USE_TINY_PRINTF=y
 CONFIG_CMD_DHRYSTONE=y
 CONFIG_ERRNO_STR=y
+CONFIG_ROCKCHIP_SPI=y
--- a/doc/README.rockchip
+++ b/doc/README.rockchip
@@ -135,9 +135,10 @@ Booting from SPI

 To write an image that boots from SPI flash (e.g. for the Haier Chromebook):

-   ./chromebook_jerry/tools/mkimage -n rk3036 -T rkspi -d chromebook_jerry/spl/u-boot-spl-dtb.bin out
-   dd if=spl.bin of=out.bin bs=128K conv=sync
-   cat chromebook_jerry/u-boot-dtb.img out.bin
+   ./chromebook_jerry/tools/mkimage -n rk3288 -T rkspi \
+	-d chromebook_jerry/spl/u-boot-spl-dtb.bin spl.bin && \
+   dd if=spl.bin of=spl-out.bin bs=128K conv=sync && \
+   cat spl-out.bin chromebook_jerry/u-boot-dtb.img >out.bin && \
   dd if=out.bin of=out.bin.pad bs=4M conv=sync

 This converts the SPL image to the required SPI format by adding the Rockchip
--- a/drivers/bootcount/bootcount.c
+++ b/drivers/bootcount/bootcount.c
@@ -31,16 +31,14 @@

 #if defined(CONFIG_MPC8260)
 #include <asm/cpm_8260.h>
-
 #define CONFIG_SYS_BOOTCOUNT_ADDR	(CONFIG_SYS_IMMR + CPM_BOOTCOUNT_ADDR)
 #endif /* defined(CONFIG_MPC8260) */

 #if defined(CONFIG_QE)
 #include <linux/immap_qe.h>
-
 #define CONFIG_SYS_BOOTCOUNT_ADDR	(CONFIG_SYS_IMMR + 0x110000 + \
 					 QE_MURAM_SIZE - 2 * sizeof(u32))
-#endif /* defined(CONFIG_MPC8360) */
+#endif /* defined(CONFIG_QE) */

 #if defined(CONFIG_4xx)
 #define CONFIG_SYS_BOOTCOUNT_ADDR	(CONFIG_SYS_OCM_DATA_ADDR + \
@@ -60,7 +58,7 @@ __weak void bootcount_store(ulong a)
 #else
 	raw_bootcount_store(reg, a);
 	raw_bootcount_store(reg + 4, BOOTCOUNT_MAGIC);
-#endif
+#endif /* defined(CONFIG_SYS_BOOTCOUNT_SINGLEWORD */
 }

 __weak ulong bootcount_load(void)
@@ -79,6 +77,6 @@ __weak ulong bootcount_load(void)
 		return 0;
 	else
 		return raw_bootcount_load(reg);
-#endif
+#endif /* defined(CONFIG_SYS_BOOTCOUNT_SINGLEWORD) */
 }
-#endif
+#endif /* defined(CONFIG_SYS_BOOTCOUNT_ADDR) */
--- a/drivers/gpio/mxs_gpio.c
+++ b/drivers/gpio/mxs_gpio.c
@@ -114,3 +114,18 @@ int gpio_free(unsigned gpio)
 {
 	return 0;
 }
+
+int name_to_gpio(const char *name)
+{
+	unsigned bank, pin;
+	char *end;
+
+	bank = simple_strtoul(name, &end, 10);
+
+	if (!*end || *end != ':')
+		return bank;
+
+	pin = simple_strtoul(end + 1, NULL, 10);
+
+	return (bank << MXS_PAD_BANK_SHIFT) | (pin << MXS_PAD_PIN_SHIFT);
+}
--- a/drivers/mtd/spi/spi_flash.c
+++ b/drivers/mtd/spi/spi_flash.c
@@ -767,8 +767,8 @@ int stm_unlock(struct spi_flash *flash, u32 ofs, size_t len)
 		return ret;

 	/* Cannot unlock; would unlock larger region than requested */
-	if (stm_is_locked_sr(flash, status_old, ofs - flash->erase_size,
-			     flash->erase_size))
+	if (stm_is_locked_sr(flash, ofs - flash->erase_size, flash->erase_size,
+			     status_old))
 		return -EINVAL;
 	/*
 	 * Need largest pow such that:
--- a/drivers/net/phy/atheros.c
+++ b/drivers/net/phy/atheros.c
@@ -51,7 +51,7 @@ static struct phy_driver AR8031_driver =  {
 	.uid = 0x4dd074,
 	.mask = 0xffffffef,
 	.features = PHY_GBIT_FEATURES,
-	.config = ar8021_config,
+	.config = ar8035_config,
 	.startup = genphy_startup,
 	.shutdown = genphy_shutdown,
 };
--- a/drivers/net/sandbox.c
+++ b/drivers/net/sandbox.c
@@ -157,7 +157,7 @@ static int sb_eth_recv(struct udevice *dev, int flags, uchar **packetp)
 	struct eth_sandbox_priv *priv = dev_get_priv(dev);

 	if (skip_timeout) {
-		sandbox_timer_add_offset(10000UL);
+		sandbox_timer_add_offset(11000UL);
 		skip_timeout = false;
 	}

--- a/drivers/pci/pcie_imx.c
+++ b/drivers/pci/pcie_imx.c
@@ -381,7 +381,7 @@ static int imx_pcie_read_config(struct pci_controller *hose, pci_dev_t d,
 	ret = imx_pcie_addr_valid(d);
 	if (ret) {
 		*val = 0xffffffff;
-		return ret;
+		return 0;
 	}

 	va_address = get_bus_address(d, where);
--- a/drivers/pci/pcie_layerscape.c
+++ b/drivers/pci/pcie_layerscape.c
@@ -314,7 +314,7 @@ static int ls_pcie_read_config(struct pci_controller *hose, pci_dev_t d,

 	if (ls_pcie_addr_valid(hose, d)) {
 		*val = 0xffffffff;
-		return -EINVAL;
+		return 0;
 	}

 	if (PCI_BUS(d) == hose->first_busno) {
--- a/drivers/serial/serial_zynq.c
+++ b/drivers/serial/serial_zynq.c
@@ -192,7 +192,7 @@ U_BOOT_DRIVER(serial_zynq) = {
 };

 #ifdef CONFIG_DEBUG_UART_ZYNQ
-void _debug_uart_init(void)
+static inline void _debug_uart_init(void)
 {
 	struct uart_zynq *regs = (struct uart_zynq *)CONFIG_DEBUG_UART_BASE;

--- a/drivers/spi/fsl_qspi.c
+++ b/drivers/spi/fsl_qspi.c
@@ -25,7 +25,7 @@ DECLARE_GLOBAL_DATA_PTR;
 #define TX_BUFFER_SIZE		0x40
 #endif

-#define OFFSET_BITS_MASK	GENMASK(24, 0)
+#define OFFSET_BITS_MASK	GENMASK(23, 0)

 #define FLASH_STATUS_WEL	0x02

--- a/drivers/thermal/imx_thermal.c
+++ b/drivers/thermal/imx_thermal.c
@@ -130,7 +130,7 @@ static int read_cpu_temperature(struct udevice *dev)
 #elif defined(CONFIG_MX7)
 static int read_cpu_temperature(struct udevice *dev)
 {
-	unsigned int reg, tmp, start;
+	unsigned int reg, tmp;
 	unsigned int raw_25c, te1;
 	int temperature;
 	unsigned int *priv = dev_get_priv(dev);
@@ -169,18 +169,25 @@ static int read_cpu_temperature(struct udevice *dev)
 	writel(TEMPMON_HW_ANADIG_TEMPSENSE1_FINISHED_MASK, &ccm_anatop->tempsense1_clr);
 	writel(TEMPMON_HW_ANADIG_TEMPSENSE1_MEASURE_TEMP_MASK, &ccm_anatop->tempsense1_set);

-	start = get_timer(0);
-	/* Wait max 100ms */
-	do {
-		/*
-		 * Since we can not rely on finish bit, use 1ms delay to get
-		 * temperature. From RM, 17us is enough to get data, but
-		 * to gurantee to get the data, delay 100ms here.
-		 */
+	if (soc_rev() >= CHIP_REV_1_1) {
+		while ((readl(&ccm_anatop->tempsense1) &
+		       TEMPMON_HW_ANADIG_TEMPSENSE1_FINISHED_MASK) == 0)
+			;
 		reg = readl(&ccm_anatop->tempsense1);
 		tmp = (reg & TEMPMON_HW_ANADIG_TEMPSENSE1_TEMP_VALUE_MASK)
 		       >> TEMPMON_HW_ANADIG_TEMPSENSE1_TEMP_VALUE_SHIFT;
-	} while (get_timer(0) < (start + 100));
+	} else {
+		/*
+		 * Since we can not rely on finish bit, use 10ms
+		 * delay to get temperature. From RM, 17us is
+		 * enough to get data, but to gurantee to get
+		 * the data, delay 10ms here.
+		 */
+		udelay(10000);
+		reg = readl(&ccm_anatop->tempsense1);
+		tmp = (reg & TEMPMON_HW_ANADIG_TEMPSENSE1_TEMP_VALUE_MASK)
+		       >> TEMPMON_HW_ANADIG_TEMPSENSE1_TEMP_VALUE_SHIFT;
+	}

 	writel(TEMPMON_HW_ANADIG_TEMPSENSE1_FINISHED_MASK, &ccm_anatop->tempsense1_clr);

--- a/drivers/watchdog/imx_watchdog.c
+++ b/drivers/watchdog/imx_watchdog.c
@@ -43,7 +43,7 @@ void reset_cpu(ulong addr)
 {
 	struct watchdog_regs *wdog = (struct watchdog_regs *)WDOG1_BASE_ADDR;

-	clrsetbits_le16(&wdog->wcr, 0, WCR_WDE);
+	clrsetbits_le16(&wdog->wcr, WCR_WT_MSK, WCR_WDE);

 	writew(0x5555, &wdog->wsr);
 	writew(0xaaaa, &wdog->wsr);	/* load minimum 1/2 second timeout */
--- a/fs/fs.c
+++ b/fs/fs.c
@@ -427,6 +427,7 @@ int do_load(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[],
 	}
 	puts("\n");

+	setenv_hex("fileaddr", addr);
 	setenv_hex("filesize", len_read);

 	return 0;
--- a/include/configs/chromebook_jerry.h
+++ b/include/configs/chromebook_jerry.h
@@ -13,5 +13,6 @@
 #define CONFIG_SPL_SPI_SUPPORT
 #define CONFIG_SPL_SPI_FLASH_SUPPORT
 #define CONFIG_SPL_SPI_LOAD
+#define CONFIG_SPI_FLASH_GIGADEVICE

 #endif
--- a/include/configs/cyrus.h
+++ b/include/configs/cyrus.h
@@ -476,6 +476,7 @@
 #define CONFIG_CMD_EXT2
 #define CONFIG_EHCI_IS_TDI
 #define CONFIG_USB_KEYBOARD
+#define CONFIG_SYS_STDIO_DEREGISTER
 #define CONFIG_SYS_USB_EVENT_POLL
 /* _VIA_CONTROL_EP  */
 #define CONFIG_CONSOLE_MUX
--- a/include/configs/mx6ul_14x14_evk.h
+++ b/include/configs/mx6ul_14x14_evk.h
@@ -241,6 +241,7 @@

 #define CONFIG_IMX_THERMAL

+#ifndef CONFIG_SPL_BUILD
 #define CONFIG_VIDEO
 #ifdef CONFIG_VIDEO
 #define CONFIG_CFB_CONSOLE
@@ -257,5 +258,6 @@
 #define CONFIG_VIDEO_BMP_LOGO
 #define MXS_LCDIF_BASE MX6UL_LCDIF1_BASE_ADDR
 #endif
+#endif

 #endif
--- a/include/configs/vexpress_aemv8a.h
+++ b/include/configs/vexpress_aemv8a.h
@@ -189,7 +189,7 @@
 #define CONFIG_EXTRA_ENV_SETTINGS	\
 				"kernel_name=norkern\0"	\
 				"kernel_alt_name=Image\0"	\
-				"kernel_addr=0x80000000\0" \
+				"kernel_addr=0x80080000\0" \
 				"initrd_name=ramdisk.img\0"	\
 				"initrd_addr=0x84000000\0"	\
 				"fdt_name=board.dtb\0" \
@@ -233,7 +233,7 @@
 #elif CONFIG_TARGET_VEXPRESS64_BASE_FVP
 #define CONFIG_EXTRA_ENV_SETTINGS	\
 				"kernel_name=Image\0"		\
-				"kernel_addr=0x80000000\0"	\
+				"kernel_addr=0x80080000\0"	\
 				"initrd_name=ramdisk.img\0"	\
 				"initrd_addr=0x88000000\0"	\
 				"fdt_name=devtree.dtb\0"	\
--- a/include/fsl_wdog.h
+++ b/include/fsl_wdog.h
@@ -16,3 +16,4 @@ struct watchdog_regs {
 #define WCR_WDT		0x08
 #define WCR_SRS		0x10
 #define SET_WCR_WT(x)	(x << 8)
+#define WCR_WT_MSK	SET_WCR_WT(0xFF)
--- a/include/misc.h
+++ b/include/misc.h
@@ -32,7 +32,7 @@ int misc_write(struct udevice *dev, int offset, void *buf, int size);
 *
 * @dev: the device
 * @request: command to be sent to the device
- * @buf: pointer to buffer related to the requset
+ * @buf: pointer to buffer related to the request
 * @return: 0 if OK, -ve on error
 */
 int misc_ioctl(struct udevice *dev, unsigned long request, void *buf);
@@ -70,7 +70,7 @@ struct misc_ops {
 	 *
 	 * @dev: the device
 	 * @request: command to be sent to the device
-	 * @buf: pointer to buffer related to the requset
+	 * @buf: pointer to buffer related to the request
 	 * @return: 0 if OK, -ve on error
 	 */
 	int (*ioctl)(struct udevice *dev, unsigned long request, void *buf);
--- a/include/usb.h
+++ b/include/usb.h
@@ -227,7 +227,7 @@ int board_usb_cleanup(int index, enum usb_init_type init);

 #ifdef CONFIG_USB_STORAGE

-#define USB_MAX_STOR_DEV 5
+#define USB_MAX_STOR_DEV 7
 block_dev_desc_t *usb_stor_get_dev(int index);
 int usb_stor_scan(int mode);
 int usb_stor_info(void);
--- a/net/eth.c
+++ b/net/eth.c
@@ -337,14 +337,30 @@ U_BOOT_ENV_CALLBACK(ethaddr, on_ethaddr);

 int eth_init(void)
 {
-	struct udevice *current;
+	char *ethact = getenv("ethact");
+	char *ethrotate = getenv("ethrotate");
+	struct udevice *current = NULL;
 	struct udevice *old_current;
 	int ret = -ENODEV;

-	current = eth_get_dev();
+	/*
+	 * When 'ethrotate' variable is set to 'no' and 'ethact' variable
+	 * is already set to an ethernet device, we should stick to 'ethact'.
+	 */
+	if ((ethrotate != NULL) && (strcmp(ethrotate, "no") == 0)) {
+		if (ethact) {
+			current = eth_get_dev_by_name(ethact);
+			if (!current)
+				return -EINVAL;
+		}
+	}
+
 	if (!current) {
-		printf("No ethernet found.\n");
-		return -ENODEV;
+		current = eth_get_dev();
+		if (!current) {
+			printf("No ethernet found.\n");
+			return -ENODEV;
+		}
 	}

 	old_current = current;
@@ -761,8 +777,6 @@ int eth_write_hwaddr(struct eth_device *dev, const char *base_name,
 	} else if (is_valid_ethaddr(dev->enetaddr)) {
 		eth_setenv_enetaddr_by_index(base_name, eth_number,
 					     dev->enetaddr);
-		printf("\nWarning: %s using MAC address from net device\n",
-		       dev->name);
 	} else if (is_zero_ethaddr(dev->enetaddr)) {
 #ifdef CONFIG_NET_RANDOM_ETHADDR
 		net_random_ethaddr(dev->enetaddr);
@@ -1039,6 +1053,17 @@ int eth_receive(void *packet, int length)
 static void eth_current_changed(void)
 {
 	char *act = getenv("ethact");
+	char *ethrotate;
+
+	/*
+	 * The call to eth_get_dev() below has a side effect of rotating
+	 * ethernet device if uc_priv->current == NULL. This is not what
+	 * we want when 'ethrotate' variable is 'no'.
+	 */
+	ethrotate = getenv("ethrotate");
+	if ((ethrotate != NULL) && (strcmp(ethrotate, "no") == 0))
+		return;
+
 	/* update current ethernet name */
 	if (eth_get_dev()) {
 		if (act == NULL || strcmp(act, eth_get_name()) != 0)
--- a/net/net.c
+++ b/net/net.c
@@ -542,6 +542,9 @@ restart:
 #ifdef CONFIG_SHOW_ACTIVITY
 		show_activity(1);
 #endif
+		if (arp_timeout_check() > 0)
+			time_start = get_timer(0);
+
 		/*
 		 *	Check the ethernet for a new packet.  The ethernet
 		 *	receive routine will process it.
@@ -570,10 +573,6 @@ restart:
 			goto done;
 		}

-		if (arp_timeout_check() > 0) {
-		    time_start = get_timer(0);
-		}
-
 		/*
 		 *	Check for a timeout, and run the timeout handler
 		 *	if we have one.
--- a/scripts/get_maintainer.pl
+++ b/scripts/get_maintainer.pl
@@ -298,7 +298,7 @@ sub read_maintainers {
    while (<$maint>) {
 	my $line = $_;

-	if ($line =~ m/^(\C):\s*(.*)/) {
+	if ($line =~ m/^([A-Z]):\s*(.*)/) {
 	    my $type = $1;
 	    my $value = $2;

@@ -533,7 +533,7 @@ sub range_is_maintained {

    for (my $i = $start; $i < $end; $i++) {
 	my $line = $typevalue[$i];
-	if ($line =~ m/^(\C):\s*(.*)/) {
+	if ($line =~ m/^([A-Z]):\s*(.*)/) {
 	    my $type = $1;
 	    my $value = $2;
 	    if ($type eq 'S') {
@@ -551,7 +551,7 @@ sub range_has_maintainer {

    for (my $i = $start; $i < $end; $i++) {
 	my $line = $typevalue[$i];
-	if ($line =~ m/^(\C):\s*(.*)/) {
+	if ($line =~ m/^([A-Z]):\s*(.*)/) {
 	    my $type = $1;
 	    my $value = $2;
 	    if ($type eq 'M') {
@@ -600,7 +600,7 @@ sub get_maintainers {

 	    for ($i = $start; $i < $end; $i++) {
 		my $line = $typevalue[$i];
-		if ($line =~ m/^(\C):\s*(.*)/) {
+		if ($line =~ m/^([A-Z]):\s*(.*)/) {
 		    my $type = $1;
 		    my $value = $2;
 		    if ($type eq 'X') {
@@ -615,7 +615,7 @@ sub get_maintainers {
 	    if (!$exclude) {
 		for ($i = $start; $i < $end; $i++) {
 		    my $line = $typevalue[$i];
-		    if ($line =~ m/^(\C):\s*(.*)/) {
+		    if ($line =~ m/^([A-Z]):\s*(.*)/) {
 			my $type = $1;
 			my $value = $2;
 			if ($type eq 'F') {
@@ -917,7 +917,7 @@ sub find_first_section {

    while ($index < @typevalue) {
 	my $tv = $typevalue[$index];
-	if (($tv =~ m/^(\C):\s*(.*)/)) {
+	if (($tv =~ m/^([A-Z]):\s*(.*)/)) {
 	    last;
 	}
 	$index++;
@@ -931,7 +931,7 @@ sub find_starting_index {

    while ($index > 0) {
 	my $tv = $typevalue[$index];
-	if (!($tv =~ m/^(\C):\s*(.*)/)) {
+	if (!($tv =~ m/^([A-Z]):\s*(.*)/)) {
 	    last;
 	}
 	$index--;
@@ -945,7 +945,7 @@ sub find_ending_index {

    while ($index < @typevalue) {
 	my $tv = $typevalue[$index];
-	if (!($tv =~ m/^(\C):\s*(.*)/)) {
+	if (!($tv =~ m/^([A-Z]):\s*(.*)/)) {
 	    last;
 	}
 	$index++;
@@ -971,7 +971,7 @@ sub get_maintainer_role {

    for ($i = $start + 1; $i < $end; $i++) {
 	my $tv = $typevalue[$i];
-	if ($tv =~ m/^(\C):\s*(.*)/) {
+	if ($tv =~ m/^([A-Z]):\s*(.*)/) {
 	    my $ptype = $1;
 	    my $pvalue = $2;
 	    if ($ptype eq "S") {
@@ -1030,7 +1030,7 @@ sub add_categories {

    for ($i = $start + 1; $i < $end; $i++) {
 	my $tv = $typevalue[$i];
-	if ($tv =~ m/^(\C):\s*(.*)/) {
+	if ($tv =~ m/^([A-Z]):\s*(.*)/) {
 	    my $ptype = $1;
 	    my $pvalue = $2;
 	    if ($ptype eq "L") {
@@ -1072,7 +1072,7 @@ sub add_categories {
 		if ($name eq "") {
 		    if ($i > 0) {
 			my $tv = $typevalue[$i - 1];
-			if ($tv =~ m/^(\C):\s*(.*)/) {
+			if ($tv =~ m/^([A-Z]):\s*(.*)/) {
 			    if ($1 eq "P") {
 				$name = $2;
 				$pvalue = format_email($name, $address, $email_usename);
--- a/test/dm/Makefile
+++ b/test/dm/Makefile
@@ -27,8 +27,8 @@ obj-y += regmap.o
 obj-$(CONFIG_REMOTEPROC) += remoteproc.o
 obj-$(CONFIG_RESET) += reset.o
 obj-$(CONFIG_DM_RTC) += rtc.o
-obj-$(CONFIG_DM_SPI_FLASH) += sf.o
-obj-$(CONFIG_DM_SPI) += spi.o
+#obj-$(CONFIG_DM_SPI_FLASH) += sf.o
+#obj-$(CONFIG_DM_SPI) += spi.o
 obj-y += syscon.o
 obj-$(CONFIG_DM_USB) += usb.o
 obj-$(CONFIG_DM_PMIC) += pmic.o
--- a/test/dm/usb.c
+++ b/test/dm/usb.c
@@ -108,9 +108,9 @@ static int dm_test_usb_remove(struct unit_test_state *uts)
 	ut_assertok(uclass_get_device(UCLASS_MASS_STORAGE, 0, &dev));
 	ut_assertok(uclass_get_device(UCLASS_MASS_STORAGE, 1, &dev));
 	ut_assertok(uclass_get_device(UCLASS_MASS_STORAGE, 2, &dev));
-	ut_asserteq(5, count_usb_devices());
+	ut_asserteq(6, count_usb_devices());
 	ut_assertok(usb_stop());
-	ut_asserteq(5, count_usb_devices());
+	ut_asserteq(6, count_usb_devices());

 	/* Remove the second emulation device */
 	ut_assertok(uclass_find_device_by_name(UCLASS_USB_EMUL, "flash-stick@1",
@@ -128,9 +128,9 @@ static int dm_test_usb_remove(struct unit_test_state *uts)

 	ut_asserteq(-ENODEV, uclass_get_device(UCLASS_MASS_STORAGE, 2, &dev));

-	ut_asserteq(4, count_usb_devices());
+	ut_asserteq(5, count_usb_devices());
 	ut_assertok(usb_stop());
-	ut_asserteq(4, count_usb_devices());
+	ut_asserteq(5, count_usb_devices());

 	return 0;
 }
@@ -147,7 +147,10 @@ const char usb_tree_base[] =
 "  |    sandbox flash flash-stick@1\n"
 "  |  \n"
 "  |\b+-4  Mass Storage (12 Mb/s, 100mA)\n"
-"       sandbox flash flash-stick@2\n"
+"  |    sandbox flash flash-stick@2\n"
+"  |  \n"
+"  |\b+-5  Human Interface (12 Mb/s, 100mA)\n"
+"       sandbox keyboard keyb@3\n"
 "     \n";

 /* test that the 'usb tree' command output looks correct */
@@ -178,7 +181,10 @@ const char usb_tree_remove[] =
 "  |    sandbox flash flash-stick@0\n"
 "  |  \n"
 "  |\b+-3  Mass Storage (12 Mb/s, 100mA)\n"
-"       sandbox flash flash-stick@2\n"
+"  |    sandbox flash flash-stick@2\n"
+"  |  \n"
+"  |\b+-4  Human Interface (12 Mb/s, 100mA)\n"
+"       sandbox keyboard keyb@3\n"
 "     \n";

 /*
@@ -220,7 +226,10 @@ const char usb_tree_reorder[] =
 "  |\b+-3  Mass Storage (12 Mb/s, 100mA)\n"
 "  |    sandbox flash flash-stick@2\n"
 "  |  \n"
-"  |\b+-4  Mass Storage (12 Mb/s, 100mA)\n"
+"  |\b+-4  Human Interface (12 Mb/s, 100mA)\n"
+"  |    sandbox keyboard keyb@3\n"
+"  |  \n"
+"  |\b+-5  Mass Storage (12 Mb/s, 100mA)\n"
 "       sandbox flash flash-stick@1\n"
 "     \n";

--- a/tools/Makefile
+++ b/tools/Makefile
@@ -64,7 +64,7 @@ RSA_OBJS-$(CONFIG_FIT_SIGNATURE) := $(addprefix lib/rsa/, \
 					rsa-sign.o rsa-verify.o rsa-checksum.o \
 					rsa-mod-exp.o)

-ROCKCHIP_OBS = lib/rc4.o rkcommon.o rkimage.o rksd.o
+ROCKCHIP_OBS = lib/rc4.o rkcommon.o rkimage.o rksd.o rkspi.o

 # common objs for dumpimage and mkimage
 dumpimage-mkimage-objs := aisimage.o \
--- a/tools/rkspi.c
+++ b/tools/rkspi.c
@@ -54,7 +54,7 @@ static void rkspi_set_header(void *buf, struct stat *sbuf, int ifd,
 	 * boot ROM. Its rationale is unknown.
 	 */
 	for (sector = size / RKSPI_SECT_LEN - 1; sector >= 0; sector--) {
-		printf("sector %u\n", sector);
+		debug("sector %u\n", sector);
 		memmove(buf + sector * RKSPI_SECT_LEN * 2,
 			buf + sector * RKSPI_SECT_LEN,
 			RKSPI_SECT_LEN);
Author	SHA1	Message	Date
Tom Rini	fa85e826c1	Prepare v2016.01 Signed-off-by: Tom Rini <trini@konsulko.com>	2016-01-12 09:06:54 -05:00
Simon Glass	a57a817406	dm: test: usb: Update the USB tests so that they all pass Due to a limitation removed in an earlier patch, USB tests were not seeing all the devices. Update the tests to pass now that all devices are visible. Signed-off-by: Simon Glass <sjg@chromium.org>	2016-01-11 15:29:31 -05:00
Fabio Estevam	c5f18a0b69	MAINTAINERS/mailmap: Update my email address Update my email address to the NXP account. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>	2016-01-11 11:22:43 -05:00
Tom Rini	e6c516a973	Merge branch 'master' of git://www.denx.de/git/u-boot-imx	2016-01-10 09:17:52 -05:00
Otavio Salvador	b5e7c1e754	cgtqmx6eval: README: Fix parameter of 'sf write' command 'sf command' should receive the length in sector boundaries, so fix it accordingly. Also, show the steps to set the server and board IP addresses for making the steps clearer. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>	2016-01-10 10:51:43 +01:00
Fabio Estevam	70f27e7f2a	mx6cuboxi: Remove obsolete comment We currently support various versions of Solidrun mx6 boards, so remove the obsolete comment. Reported-by: Jon Nettleton <jon.nettleton@gmail.com> Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Stefano Babic <sbabic@denx.de>	2016-01-10 10:50:53 +01:00
Fabio Estevam	4b421d4ea1	mx6cuboxi: Fix the reset delay for the AR8035 PHY Since commit `59370f3fcd` ("net: phy: delay only if reset handler is registered") Ethernet is no longer functional: Booting from net ... FEC Waiting for PHY auto negotiation to complete......... TIMEOUT ! BOOTP broadcast 1 BOOTP broadcast 2 BOOTP broadcast 3 BOOTP broadcast 4 This commit does not have an issue in itself, but it revelead a problem with the Ethernet initialization. As per the AR8035 datasheet: "For a reliable power on reset, suggest to keep asserting the reset low long enough (10ms) to ensure the clock is stable and clock-to-reset 1ms requirement is satisfied." So do as suggested and keep the reset low for 10ms. Also add a 100us delay after deasserting the reset line to guarantee that the PHY ID can be read correctly and the Atheros PHY can be loaded as per Troy Kisky's suggestion. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Tested-by: Tom Rini <trini@konsulko.com>	2016-01-10 10:50:24 +01:00
Tom Rini	d77a092dd3	Merge git://git.denx.de/u-boot-rockchip	2016-01-08 14:19:24 -05:00
Tom Rini	b685c7348c	Merge branch 'master' of git://www.denx.de/git/u-boot-imx	2016-01-08 10:18:18 -05:00
Bin Meng	7ba34ff09f	pci: layerscape: Adjust the return value when ls_pcie_addr_valid() fails When trying to access non-existent/unsupported PCI devices in ls_pcie_read_config(), when ls_pcie_addr_valid() fails it returns error code and fills in the result with 0xffffffff manually. But it really should return zero to upper layer codes. Signed-off-by: Bin Meng <bmeng.cn@gmail.com>	2016-01-08 10:15:49 -05:00
Bin Meng	9642b78cdf	pci: imx: Adjust the return value when imx_pcie_addr_valid() fails When trying to access non-existent/unsupported PCI devices in imx_pcie_read_config(), when imx_pcie_addr_valid() fails it returns error code and fills in the result with 0xffffffff manually. But it really should return zero to upper layer codes. Reported-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Fabio Estevam <fabio.estevam@nxp.com>	2016-01-08 10:15:49 -05:00
David Müller (ELSOFT AG)	e9cdf3b85e	fs: handle the fileaddr variable in the same way as in the network case Signed-off-by: David Müller <d.mueller@elsoft.ch>	2016-01-08 10:15:48 -05:00
Heiko Schocher	35729218b8	get_maintainer: fix perl 5.22/5.24 deprecated/incompatible "\C" use from linux commit ce8155f7a3d5: Perl 5.22 emits a deprecated message when "\C" is used in a regex. Perl 5.24 will disallow it altogether. Fix it by using [A-Z] instead of \C. >From linux adapted to U-Boot by: Signed-off-by: Heiko Schocher <hs@denx.de> Reviewed-by: Andre Przywara <andre.przywara@arm.com>	2016-01-08 10:15:47 -05:00
Rasmus Villemoes	fea6730e1c	fix always succesful memory test Since `51209b1f42` ("Use common mtest iteration counting"), do_mem_mtest has always reported 0 errors and hence returned 0, even if errors were detected. Fix the helpers mem_test_alt() and mem_test_quick() to return the number of errors found. Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>	2016-01-08 10:15:47 -05:00
Andy Fleming	9d243b1481	cyrus: Enable STDIO deregister If CONFIG_SYS_STDIO_DEREGISTER is not enabled, usb reset will fail every time. Enabling it allows usb reset to work. Signed-off-by: Andy Fleming <afleming@gmail.com>	2016-01-08 10:15:47 -05:00
York Sun	2f231025bc	MAINTAINERS, .mailmap: Update my email address Change from yorksun@freescale.com to york.sun@nxp.com. Signed-off-by: York Sun <york.sun@nxp.com>	2016-01-08 10:15:46 -05:00
Tom Rini	90345c92a8	am33xx/am43xx: Add platform data for GPIOs On these platforms we have many cases of boards that enable device model and GPIO support but do not enable OF_CONTROL and pass in a device tree with the binary. We need to bring in the platform data here as well. Tested on Beaglebone Black. Reported-by: Robert Nelson <robertcnelson@gmail.com> Reported-by: Francisco Aguerre <franciscoaguerre@gmail.com> Reported-by: Jason Kridner <jkridner@beagleboard.org> Signed-off-by: Tom Rini <trini@konsulko.com>	2016-01-08 10:15:45 -05:00
Michal Simek	80dc99972b	serial: zynq: Use static inline for _debug_uart_init() Mark _debug_uart_init() as static to avoid sparse warning and inline it to debug_uart_init(). Reported-by: Thomas Chou <thomas@wytron.com.tw> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Thomas Chou <thomas@wytron.com.tw> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>	2016-01-08 10:15:45 -05:00
Andre Przywara	821fec0ceb	net: remove scary warning about EEPROM provided MAC address In many parts of the computing world having a unique MAC address sitting in some on-NIC storage is considered the normal case. Remove the warning to not scare the user unnecessarily. This applies to Highbank/Midway and ARM's Juno, for instance. Besides that this fixes the formatting on Midway, for instance, which currently looks like: ... Net: xgmac0 Warning: xgmac0 using MAC address from net device , xgmac1 Warning: xgmac1 using MAC address from net device ... Signed-off-by: Andre Przywara <andre.przywara@arm.com>	2016-01-08 10:15:44 -05:00
Andre Przywara	7babe48252	arm64: Juno/FVP: adjust kernel load address The default kernel load offset for an arm64 kernel is 0x80000, so U-Boot takes cares of moving the loaded kernel to a matching memory location just before booting it. Since we run with caches off, this takes a while for any decently sized kernel - with no output explaining the reason for the delay (unless one uses a DEBUG build). By adjusting the default load offset for Juno and VFP to be 512K aligned in the first place we can skip this copying and boot much faster. Tested on Juno. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Tested-by: Ryan Harkin <ryan.harkin@linaro.org>	2016-01-08 10:15:44 -05:00
Aneesh Bansal	c2b233cbec	arm, Makefile: correct compilation flag for u-boot-dtb The compilation of u-boot-dtb.img should be controlled by CONFIG_OF_CONTROL and not CONFIG_DM. CONFIG_DM may be defined even without Device Tree requirement. This was added in commit `947cee1127`. Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com> Signed-off-by: Aneesh Bansal <aneesh.bansal@freescale.com> CC: Alison Wang <alison.wang@freescale.com>	2016-01-08 10:15:43 -05:00
Robert P. J. Day	76765375d7	bootcount: Correct #endif comment to match, other aesthetics Correct mismatched comment on #endif to agree with its #if defined(). Also add some missing #endif comments for consistency, take out extraneous blank lines for readability. rday	2016-01-08 10:15:43 -05:00
Robert P. J. Day	7207b366d5	doc: Tidy up first part of top-level README file First (small) pass at tidying up the README file, including: * remove references to obsolete CREDITS file * remove (some) references to obsolete boards.cfg file * remove at least one reference to a "scrapped" board * cut down unnecessarily detailed directory hierarchy * bunch of grammar and spelling tweaks Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>	2016-01-08 10:15:43 -05:00
Robert P. J. Day	d7b4ca2b6f	powerpc: Various typo fixes under arch/powerpc/cpu/mpc83xx Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>	2016-01-08 10:15:43 -05:00
Robert P. J. Day	f5abb40997	include: Correct "requset" typoes in misc.h Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca> Acked-by: Thomas Chou <thomas@wytron.com.tw>	2016-01-08 10:15:42 -05:00
Tom Rini	8c20dc4074	Merge git://git.denx.de/u-boot-dm	2016-01-08 10:02:25 -05:00
Simon Glass	dd8e42900b	rockchip: Fix the configuration for chromebook_jerry Various updates did not make it through to this board. Also the instructions for building a SPI image are no-longer correct. Fix these so that Jerry can boot to a prompt again. Signed-off-by: Simon Glass <sjg@chromium.org>	2016-01-08 07:59:07 -07:00
Simon Glass	25525ebe31	rockchip: Drop a debug message when outputing SPI images There is an unnecessary sector count displayed. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org>	2016-01-08 07:59:06 -07:00
Simon Glass	9b03701a10	rockchip: Enable generation of SPI images This feature was dropped at some point. Restore it. Signed-off-by: Simon Glass <sjg@chromium.org>	2016-01-08 07:59:00 -07:00
Joe Hershberger	c5a75339cf	net: Fix delay in net_retry test Introduced in `45b4773` (net/arp: account for ARP delay, avoid duplicate packets on timeout) Check the arp timeout and adjust the timeout start time before the call to eth_recv() so that the sandbox driver has the opportunity to adjust the sandbox timer after the new start time has been recorded. Also, change the adjustment amount by 11 seconds instead of exactly the 10 seconds that the ping timout is expecting since the timeout check is looking for the time elapsed to be greater than but not equal to the specified delay. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Stefan Brüns <stefan.bruens@rwth-aachen.de> Acked-by: Simon Glass <sjg@chromium.org>	2016-01-07 12:18:58 -07:00
Przemyslaw Marczak	71105f50fe	fdt: fix address cell count checking in fdt_translate_address() Commit: dm: core: Enable optional use of fdt_translate_address() Enables use of this function as default, but after this it's not possible to get dev address for the case in which: '#size-cells == 0' This causes errors when getting address for some GPIOs, for which the '#size-cells' is set to 0. Example error: '__of_translate_address: Bad cell count for gpx0' Allowing for that case by modifying the macro 'OF_CHECK_COUNTS', (called from )__of_translate_address(), fixes the issue. Now, this macro doesn't check, that '#size-cells' is greater than 0. This is possible from the specification point of view, but I'm not sure that it doesn't introduce a regression for other configs. Please test and share the results. Tested-on: Odroid U3, Odroid X2, Odroid XU3, Sandbox. Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Lukasz Majewski <l.majewski@samsung.com> Cc: Jaehoon Chung <jh80.chung@samsung.com> Cc: Stefan Roese <sr@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Marek Vasut <marex@denx.de> Tested-by: Jaehoon Chung <jh80.chung@samsung.com> Tested-by: Lukasz Majewski <l.majewski@samsung.com>	2016-01-07 11:28:04 -07:00
Simon Glass	8a83487030	dm: usb: Add a remove() method for USB keyboards At present USB keyboards are not properly removed with driver model. Add the code to handle this. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Marek Vasut <marex@denx.de>	2016-01-07 11:28:03 -07:00
Tom Rini	67ecb84ccb	Merge branch 'master' of git://git.denx.de/u-boot-spi	2016-01-07 12:41:57 -05:00
Simon Glass	70caa97108	usb: Allow up to 7 storage devices The current limit of 5 is not enough for the driver model USB tests. Really we should not have a limit but the driver model code still uses the usb_dev_desc[] array, which has a limit. Increasing the limit by 2 should not bother anyone. Adjust it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Marek Vasut <marex@denx.de>	2016-01-07 10:27:07 -07:00
Simon Glass	b042566dcf	dm: Disable all SPI and SPI flash tests This subsystem has been broken since commit: `4efad20a` sf: Update status reg check in spi_flash_cmd_wait_ready There has so far been no response from the maintainer, and a release is imminent. For now, let's just disable the tests. Signed-off-by: Simon Glass <sjg@chromium.org>	2016-01-07 10:27:07 -07:00
Bin Meng	4cdc2c8cc0	dm: eth: Stick to 'ethact' when 'ethrotate' is 'no' in eth_init() When 'ethrotate' variable is set to 'no' and 'ethact' variable is already set to an ethernet device, we should stick to 'ethact'. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>	2016-01-07 10:27:07 -07:00
Bin Meng	a671c4f2be	dm: eth: Test 'ethrotate' before changing current ethernet device In eth_current_changed(), the call to eth_get_dev() below has a side effect of rotating ethernet device if uc_priv->current == NULL. This is not what we want when 'ethrotate' variable is 'no'. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>	2016-01-07 10:27:07 -07:00
Thomas Chou	e7cc8d11ad	test: add sandbox timer to test.dts Add missing sandbox timer to test.dts, so that test-dm works. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>	2016-01-07 10:27:07 -07:00
Andrey Skvortsov	587c3f8ebe	imx_watchdog: always set minimal timeout in reset_cpu The problem is that timeout bits in WCR register were leaved unchanged. So previously set timeout value was applied and therefore 'reset' command takes any value up to two minutes, depending on previous watchdog settings, instead of minimal 0.5 seconds. Signed-off-by: Andrey Skvortsov <andrej.skvortzov@gmail.com>	2016-01-07 17:54:53 +01:00
Måns Rullgård	88f91d1375	gpio: mxs: add name_to_gpio() function Override the default name_to_gpio() function with one that accepts strings of the form bank:pin. If a colon is present in the provided name, it behaves like the default version. This lets the "gpio" command work with sane names rather than requiring the user to enter the bank/pin composite in decimal. Signed-off-by: Mans Rullgard <mans@mansr.com> Reviewed-by: Stefano Babic <sbabic@denx.de>	2016-01-07 17:54:16 +01:00
Peng Fan	fcbe8c5674	imx: mx7: fix the temperature checking for Rev1.1 To TO1.0, we can not rely on finish bit to read temperature. But to TO1.1, the issue was fixed by IC, we can rely on finish bit for temperature reading for TO1.1. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Tim Harvey <tharvey@gateworks.com> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Adrian Alonso <aalonso@freescale.com>	2016-01-07 17:53:11 +01:00
Peng Fan	ce2190f525	imx: mx6ul: disable VIDEO for SPL With DEBUG macro enabled, SPL build failure: " arch/arm/cpu/armv7/built-in.o: In function `reset_misc': ~/uboot/arch/arm/cpu/armv7/mx6/soc.c:406: undefined reference to `lcdif_power_down' scripts/Makefile.spl:244: recipe for target 'spl/u-boot-spl' failed " Wrap VIDEO settings with ifndef CONFIG_SPL_BUILD Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Reviewed-by: Stefano Babic <sbabic@denx.de>	2016-01-07 17:51:47 +01:00
Ye.Li	7ea191aa10	pfuze: Fix unsigned variable for less-than-zero comparison According to the Coverity result, a unsigned int variable is used fo less- than-zero comparison, the result is never true. Need to fix the variable type to signed int. Signed-off-by: Ye.Li <B37916@freescale.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Przemyslaw Marczak <p.marczak@samsung.com> Cc: Stefano Babic <sbabic@denx.de> Reviewed-by: Stefano Babic <sbabic@denx.de>	2016-01-07 17:48:25 +01:00
Fabio Estevam	59a6ca54f5	wandboard: Simplify the Ethernet PHY configuration As per the AR8031 datasheet: "For a reliable power on reset, suggest to keep asserting the reset low long enough (10ms) to ensure the clock is stable and clock-to-reset 1ms requirement is satisfied." So do as suggested and also add a 100us delay after deasserting the reset line to guarantee that the PHY ID can be read correctly and the Atheros 8031 PHY driver can be loaded automatically. This results in a simpler code. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>	2016-01-07 17:47:33 +01:00
Fabio Estevam	a307760ab4	mx6sabresd: Simplify the Ethernet PHY configuration As per the AR8031 datasheet: "For a reliable power on reset, suggest to keep asserting the reset low long enough (10ms) to ensure the clock is stable and clock-to-reset 1ms requirement is satisfied." So do as suggested and also add a 100us delay after deasserting the reset line to guarantee that the PHY ID can be read correctly and the Atheros 8031 PHY driver can be loaded automatically. This results in a simpler code. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>	2016-01-07 17:47:12 +01:00
Fabio Estevam	d584c68ce0	phy: atheros: Use ar8035_config for AR8031 Commit `08ad9b068a` (" ar8031: modify the config func of ar8031 to ar8021_config") selected 'ar8021_config' as the configuration function for AR8031. The correct would be to use 'ar8035_config' instead as AR8031/AR8035 have the same programming model and even share the same phy driver in the linux kernel: drivers/net/phy/at803x.c. Tested on a mx6qsabresd and wandboard, which now can work without any PHY setup code in the board files. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>	2016-01-07 17:46:47 +01:00
Tom Rini	3861d784b1	Merge git://git.denx.de/u-boot-mpc85xx	2016-01-07 11:24:27 -05:00
Gong Qianyu	8770413f38	spi: fsl_qspi: fix an error of using GENMASK This commit fixes the change of below commit "spi: fsl_qspi: Use GENMASK" (sha1 :bad490a24212c068c5b718b9189f47ea4075d078) Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> Reviewed-by: Jagan Teki <jteki@openedev.com>	2016-01-07 20:29:33 +05:30
Fabio Estevam	5092158359	spi: spi_flash: Fix the arguments of stm_is_locked_sr() stm_is_locked_sr() takes the status register (SR) value as the last parameter, not the second. Based on a patch from Brian Norris for the linux kernel: http://git.infradead.org/linux-mtd.git/commit/a32d5b726ff8cf32bf491522b0ac8ae2545a063e Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Jagan Teki <jteki@openedev.com>	2016-01-07 20:29:33 +05:30
Heiko Schocher	6a655d8e34	powerpc, mpc5xxx: fix missing bootflag init since: commit: `f05ad9ba` "Add a way to skip relocation" tqm5200s board fails to boot. Reason is that board_init_f has a function parameter bootflag, which is not setup in in arch/powerpc/cpu/mpc5xxx/start.S _start So board_init_f gets a undefined bootflag, currently the gd pointer address. Unfortunately this address sets the GD_FLG_SKIP_RELOC bit, so u-boot code gets not relocated and u-boot does not boot ... Init bootflag with 0, and tqm5200 boots fine again. Signed-off-by: Heiko Schocher <hs@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: York Sun <yorksun@freescale.com>	2016-01-05 08:33:44 -08:00