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313 Commits

Author SHA1 Message Date
Tom Rini
8537ddd769 Prepare v2017.03
Signed-off-by: Tom Rini <trini@konsulko.com>
2017-03-13 13:54:16 -04:00
Tom Rini
20a17b7fc6 scripts/config_whitelist.txt: Regenerate
Signed-off-by: Tom Rini <trini@konsulko.com>
2017-03-13 13:52:33 -04:00
Tom Rini
8728c97eff configs: Re-sync
Signed-off-by: Tom Rini <trini@konsulko.com>
2017-03-13 13:52:33 -04:00
Matthijs van Duin
c9592e3c5c arm: omap-common: Fix typo in CONFIG_OMAP54XX guard
Some initialization was unintentionally being skipped on omap5.

Fixes: f5af0827f2 ("arm: omap-common: Guard some parts of the code with CONFIG_OMAP44XX/OMAP54XX")
Signed-off-by: Matthijs van Duin <matthijsvanduin@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2017-03-11 22:30:29 -05:00
Jörg Krause
66a7a24648 tools: binman: change shebang from python into python2
This tool does not work with Python 3. Change the shebang to make sure the
script is run by a Python 2 interpreter.

Signed-off-by: Jörg Krause <joerg.krause@embedded.rocks>
2017-03-11 22:30:28 -05:00
Ladislav Michl
50075153fe arm: OMAP2+: nandecc: propagate error to command return status
Currently nandecc returns zero even if underlaying
omap_nand_switch_ecc function fails. Fix that by
propagating error returned to command return value.

Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2017-03-11 22:30:25 -05:00
Tom Rini
e5bda8a2d8 Merge branch 'pmic' of git://git.denx.de/u-boot-mmc 2017-03-09 19:52:57 -05:00
Tom Rini
8dda2e2f9e ARM: Migrate errata to Kconfig
This moves all of the current ARM errata from various header files and in to
Kconfig.  This allows for a minor amount of cleanup as we had some instances
where both a general common header file was enabling errata as well as the
board config.  We now just select these once at the higher level in Kconfig

Signed-off-by: Tom Rini <trini@konsulko.com>
2017-03-09 19:52:50 -05:00
Tom Rini
0f12f10117 omap4: Migrate to using imply
Move the default y options under arch/arm/mach-omap2/omap4/Kconfig to be
using imply instead in arch/arm/Kconfig

Signed-off-by: Tom Rini <trini@konsulko.com>
2017-03-09 19:52:16 -05:00
Tom Rini
7551dcf980 omap3: Migrate to using imply
Move the default y options under arch/arm/mach-omap2/omap3/Kconfig to be
using imply instead in arch/arm/Kconfig

Signed-off-by: Tom Rini <trini@konsulko.com>
2017-03-09 19:52:16 -05:00
Tom Rini
9d4f7a311f TI: Migrate board/ti/common/Kconfig to imply
The option that we had set in board/ti/common/Kconfig as default y are
best done with imply under the appropriate main Kconfig option instead.

Signed-off-by: Tom Rini <trini@konsulko.com>
2017-03-09 19:52:15 -05:00
Tom Rini
48dce3bfd9 am335x_evm: Switch to using imply keyword
These particular SPL options are part of what the ROM provides, but for
compatibility with how we have previously used them, move them to being
implied by the board being selected.

Signed-off-by: Tom Rini <trini@konsulko.com>
2017-03-09 19:52:15 -05:00
Tom Rini
d036107a1f kconfiglib.py: Kludge in 'imply' support
Currently upstream does not yet understand the imply keyword.  For what
we use kconfiglib.py for today, this is OK.  We only need to be able to
evaluate in order to make boards.cfg and none of those choices will
depend on how imply evaluates out.

Signed-off-by: Tom Rini <trini@konsulko.com>
2017-03-09 19:52:14 -05:00
Ryan Harkin
072c8c4ced do_smhload: fix return code
do_smhload was using a ulong to store the return value from
smh_load_file. That returns an int, where -1 indicates an error. As a
ulong will never be negative, smh_load_file errors were not detected and
so_smhload always returned zero.

Also, when errors were spotted, do_smhload was returning 1, rather than
the enumeration CMD_RET_FAILURE (which is also 1).

Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
2017-03-09 19:52:14 -05:00
Tom Rini
285226785e Freescale/NXP: Migrate CONFIG_FSL_CAAM to defconfigs
In some cases this is absolutely required, so select this for some secure
features.  This also requires migration of RSA_FREESCALE_EXP

Cc: Ruchika Gupta <ruchika.gupta@nxp.com>
Cc: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Cc: Naveen Burmi <NaveenBurmi@freescale.com>
Cc: Po Liu <po.liu@freescale.com>
Cc: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Cc: Priyanka Jain <Priyanka.Jain@freescale.com>
Cc: Sumit Garg <sumit.garg@nxp.com>
Cc: Shaohui Xie <Shaohui.Xie@freescale.com>
Cc: Chunhe Lan <Chunhe.Lan@freescale.com>
Cc: Feng Li <feng.li_2@nxp.com>
Cc: Alison Wang <alison.wang@freescale.com>
Cc: Mingkai Hu <Mingkai.Hu@freescale.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Saksham Jain <saksham.jain@nxp.freescale.com>
Cc: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2017-03-09 11:37:24 -05:00
Patrick Delaunay
8f42a2b647 tools: Remove CONFIG_SYS_TEXT_BASE in Makefile
This define is not used in tools sources and can be removed
to avoid unnecessary link between tools and defconfig

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-03-09 11:31:40 -05:00
Masahiro Yamada
4b83f0d98a kbuild: turn of dtc unit address warnings by default
DTC 1.4.2 or later checks DT unit-address without reg property and
vice-versa, and generates lots of warnings.  Fixing DT files will
take for a while.  Until then, let's turn off the check unless
building with W=*.

Introduce a new helper dtc-option to check if the option is supported
in order to suppress warnings on older versions.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2017-03-09 11:31:39 -05:00
Rask Ingemann Lambertsen
3cc293e26f sunxi: power: axp809.c: Fix aldo1-2 being disabled for mvolt != 0
The execution flow is currently like this for aldo_num == 1 or 2:

int axp_set_aldo(int aldo_num, unsigned int mvolt)
{
...
	if (mvolt == 0)
		return pmic_bus_clrbits(AXP809_OUTPUT_CTRL1,
				AXP809_OUTPUT_CTRL1_ALDO1_EN << (aldo_num - 1));
...
	return pmic_bus_clrbits(AXP809_OUTPUT_CTRL1,
 				AXP809_OUTPUT_CTRL1_ALDO1_EN << (aldo_num - 1));
 }

I.e. aldo1 and aldo2 will always be disabled. This patch fixes it by
setting (rather than clearing) the enable bit when mvolt != 0.

Signed-off-by: Rask Ingemann Lambertsen <rask@formelder.dk>
Fixes: 795857df41 ("sunxi: power: add AXP809 support")
2017-03-09 11:26:02 +09:00
Tom Rini
0574f786d3 Merge branch 'master' of git://git.denx.de/u-boot-video 2017-03-08 07:14:21 -05:00
Tom Rini
866bd1cc73 Merge branch 'master' of git://git.denx.de/u-boot-net 2017-03-08 07:14:18 -05:00
Adam Ford
ae29c3d4f4 omap3_logic: Move SPL Stack into SDRAM
A previous patch broke the board. This patch will add missing part
from the previous patch and also move the SPL Stack into SDRAM at
0x82000000.

Tested with GCC 4.8.2 and GCC 6.2

Fixes: 0959649dc6 ("omap3_logic: Switch to simple malloco in SPL")

Signed-off-by: Adam Ford <aford173@gmail.com>

Changes in V2:
  - Keep CONFIG_SPL_SYS_MALLOC_SIMPLE
  - Add CONFIG_SYS_MALLOC_F_LEN=0x2000 (8 MB)
2017-03-08 07:13:55 -05:00
Andre Przywara
1d4ed26faf video: cfb_console: fix 32-bit display on 64-bit architectures
"unsigned long" is a lousy data type when it comes to match peripheral
hardware registers with a fixed size.
Just do the obvious and match a 32-bit display format with an "u32"
data type for casting.
This fixes the logo display on 64-bit architectures, which produced
a black line on the right side of the logo with non-black backgrounds.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2017-03-07 21:18:23 +01:00
Nathan Rossi
2c2ab8d65f net: zynq_gem: Fix masking of supported phydev features
When the zynq_gem driver initializes the phy it sets the supported
features that the phy can support and advertise. However instead of
masking the supported features such that it limits the available
features it sets the phy to have the exact supported features of the
zynq_gem. This is problematic as it will enable features that a phy does
not have or cannot advertise.

Specifically this appears as an issue when using a phy that is only
capable of 10/100, but the zynq_gem driver will override this and try to
enable and advertise 10/100/1000.

Reported-by: Arno Steffens <star@gmx.li>
Fixes: 80243528ef ("net: gem: Fix gem driver on 1Gbps LAN")
Signed-off-by: Nathan Rossi <nathan@nathanrossi.com>
Tested-by: Arno Steffens <star@gmx.li>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
2017-03-07 11:27:33 -06:00
Wenyou Yang
3fd2b3aa19 net: macb: Fix ETH not found when clock not support
For the boards such as smartweb on which the clock driver isn't
supported, the ethernet fail to be found when booting up with
the below log.
---8<---
Net:   No ethernet found.
--->8---

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Tested-by: Heiko Schocher <hs@denx.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2017-03-01 21:28:39 -05:00
Philipp Tomsich
7a70c9985c armv8: spl: Call spl_relocate_stack_gd for ARMv8
As part of the startup process for boards using the SPL, we need to
call spl_relocate_stack_gd. This is needed to set up malloc with its
DRAM buffer.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-03-01 21:28:34 -05:00
Albert ARIBAUD
6b4e942683 armv5te: make 'ret lr' produce iinterworking 'bx lr'
Current ARM assembler helper for the 'return to caller' pseudo-instruction
turns 'ret lr' into 'mov pc, lr' for ARMv5TE. This causes the core to remain
in its current ARM state even when the routine doing the 'ret' was called
from Thumb-1 state, triggering an undefined instruction exception.

This causes early run-time failures in all boards compiled using the Thumb-1
instruction set (for instance the Open-RD family).

ARMv5TE supports 'bx lr' which properly implements interworking and thus
correctly returns to Thumb-1 state from ARM state.

This change makes 'ret lr' turn into 'bx lr' for ARMv5TE.

Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
2017-03-01 21:28:31 -05:00
Tom Rini
ee6fb217cb Prepare v2017-rc3
Signed-off-by: Tom Rini <trini@konsulko.com>
2017-02-27 17:36:21 -05:00
Andrew F. Davis
4f65ee3813 arm: mach-omap2: Flush cache after FIT post-processing image
After we authenticate/decrypt an image we need to flush the caches
as they may still contain bits of the encrypted image. This will
cause failures if we attempt to jump to this image.

Reported-by: Yogesh Siraswar<yogeshs@ti.com>
Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2017-02-27 12:14:59 -05:00
Tom Rini
7131d2d06b drivers/net/Kconfig: Correct use of apostrophe
Signed-off-by: Tom Rini <trini@konsulko.com>
2017-02-27 12:14:58 -05:00
Tom Rini
34a93bfb26 Merge branch 'master' of git://www.denx.de/git/u-boot-imx 2017-02-27 12:10:05 -05:00
Nickey Yang Nickey Yang
94412745cd rockchip: video: fix 83500000 clock mistake in rockchip HDMI
There is one "0" too many in 83500000 mpixelclock in rockchip_mpll_cfg[].
fix it.

Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>
2017-02-27 16:10:45 +01:00
Jonathan Golder
3cc6e7070d splash: Prevent splash_load_fs from writing to 0x0
Passing NULL to fs_read() for actread value results in hanging U-Boot
at least on our ARM plattform (TI AM335x). Since fs_read() and
following functions do not catch nullpointers, writing to 0x0 occurs.

Passing a local dummy var instead of NULL solves this issue.

Signed-off-by: Jonathan Golder <jonathan.golder@kurz-elektronik.de>
Cc: Anatolij Gustschin <agust@denx.de>
2017-02-27 16:08:06 +01:00
Tom Rini
a0f3e3df4a travis-ci: Temporarily disable using a newer device tree compiler
For a long while dtc has warned about various constructs.  This is now
leading to log file size being exceeded in travis, and as the majority
of these errors need to be fixed in the kernel, switch to using the
stock device-tree-compiler package.

Signed-off-by: Tom Rini <trini@konsulko.com>
2017-02-26 15:25:30 -05:00
Tom Rini
87fcdca6be Merge branch 'master' of git://git.denx.de/u-boot-usb 2017-02-26 11:56:54 -05:00
Felipe Balbi
9bf9e81358 usb: gadget: f_dfu: set serial number if serial# is valid
With this patch, USB Command Verifier is happy with our DFU
implementation on Chapter 9 tests.

Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2017-02-26 13:24:30 +01:00
Felipe Balbi
949bf79e73 usb: gadget: g_dnl: fix g_dnl_set_serialnumber()
instead of only copying if strlen(s) is less than 32 characters, let's
just copy at most 31 characters regardless of the size of
serial#. This will guarantee that we always have a serial number if
serial# environment variable is set to anything.

Note that without a proper serial number, USB Command Verifier fails
our test of Device Descriptor since we will claim to have a serial
number without really providing one when requested.

Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2017-02-26 13:24:30 +01:00
Felipe Balbi
00e9d69629 usb: gadget: f_dfu: write req->actual bytes
If last packet is short, we shouldn't write req->length bytes to
non-volatile media, we should write only what's available to us, which
is held in req->actual.

Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2017-02-26 13:24:30 +01:00
Patrick Delaunay
d428776657 usb: gadget: dfu: add result for handle_getstatus()
harmonize result with other handle_XXX() functions: return int for size
remove the define RET_STAT_LEN : no more necessary

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay73@gmail.com>
2017-02-26 13:24:30 +01:00
Patrick Delaunay
f11bb25245 usb: gadget: dfu: correct size for USB_REQ_DFU_GETSTATE result
return the correct size for DFU_GETSTATE result (1 byte in DFU 1.1 spec)
to avoid issue in USB protocol and the variable "value" is propagated
to req->lenght as all the in the other request with answer
- DFU_GETSTATUS
- DFU_DNLOAD
- DFU_UPLOAD
Then the buffer is correctly treated in USB driver

NB: it was the only request witch directly change "req->actual"

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay73@gmail.com>
2017-02-26 13:24:30 +01:00
Patrick Delaunay
8987012fe5 usb: gadget: dfu: add functional descriptor in descriptor set
The "DFU descriptor set" must contain the "DFU functional descriptor"
but it is missing today in U-Boot code
(cf: DFU spec 1.1, chapter 4.2 DFU Mode Descriptor Set)
This patch only allocate buffer and copy DFU functional descriptor
after interfaces.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay73@gmail.com>
2017-02-26 13:24:30 +01:00
Vincent Tinelli
282b72082f usb: dwc3: gadget: Remove unused header inclusion
Remove sys_proto.h inclusion which is not used by the driver.

Signed-off-by: Vincent Tinelli <vincent.tinelli@intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2017-02-26 13:24:30 +01:00
Tom Rini
d38de7cb03 Merge branch 'master' of git://git.denx.de/u-boot-uniphier
- Fix regressions caused by the previous reworks
  - Add pin configuration support
  - Re-work SPL code
  - Update DRAM and PLL setup code
  - Enable needed configs, disable unneeded configs
2017-02-23 10:12:41 -05:00
Masahiro Yamada
bc64795804 ARM: uniphier: set up charge pump current for MPLL of LD11 SoC
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-02-23 09:00:16 +09:00
Masahiro Yamada
9d35873161 ARM: uniphier: add simple eMMC load APIs instead of ROM API
Re-use of routines embedded in the Boot ROM requires a function
pointer table for each SoC.  This is not nice in terms of the
maintainability in a long run.

Implement simple eMMC load APIs that are commonly used for LD11,
LD20, and hopefully future SoCs.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-02-23 09:00:16 +09:00
Masahiro Yamada
2af94aafa5 ARM: uniphier: enable CONFIG_CMD_CONFIG
This command is useful to see which config options are enabled on
the running U-Boot image.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-02-23 08:39:48 +09:00
Masahiro Yamada
c05a59d294 ARM: uniphier: enable CONFIG_CMD_GPT
Enable CONFIG_CMD_GPT, keeping CONFIG_SPL_EFI_PARTITION because the
SPL for UniPhier platform does not recognize any partitions.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-02-23 08:37:56 +09:00
Masahiro Yamada
6012c3b659 ARM: uniphier: disable CONFIG_SPL_DOS_PARTITION
The SPL for UniPhier platform does not recognize any partitions.
Do not compile unneeded features.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-02-23 08:37:56 +09:00
Masahiro Yamada
c21f58548c ARM: uniphier: deassert RST_n of eMMC device for LD11/LD20
For LD11 and LD20 SoCs, the RST_n pin is asserted by default.  If
the EXT_CSD[162], bit[1:0] (RST_n_ENABLE) is fused, the eMMC device
would stay in the reset state until its RST_n pin is deasserted by
software.

Currently, this is cared by an ad-hoc way because the eMMC hardware
reset provider is not supported in U-Boot for now.  This code should
be re-written once the "mmc-pwrseq-emmc" binding is supported.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-02-23 08:37:56 +09:00
Kotaro Hayashi
04f3da3936 ARM: uniphier: add DRAM PHY clock duty adjustment for LD20 SoC
If the DRAM clock duty does not meet the allowable tolerance,
it is marked in an efuse register.  If the register is fused,
the boot code should compensate for the DRAM clock duty error.

Signed-off-by: Kotaro Hayashi <hayashi.kotaro@socionext.com>
[masahiro: simplify code, add git-log]
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-02-23 08:37:56 +09:00
Masahiro Yamada
dd38374d2f ARM: uniphier: remove dram_nr_ch from board parameters
This parameter is redundant because we can know the number of
channels by checking if dram_ch[2].size is zero.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-02-23 08:37:56 +09:00
Masahiro Yamada
784548efb2 ARM: uniphier: rework spl_boot_device() and related code
The current implementation has ugly switch statements here and there,
and duplicates similar code.  Rework it using table lookups for SoC
data and reduce code duplication.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-02-23 08:37:56 +09:00
Masahiro Yamada
81c847bf38 ARM: uniphier: move spl_boot_mode() to a separate file
The spl_boot_mode() is unrelated to the other code in this file.
Besides, this function is only called from common/spl/spl_mmc.c,
so it is reasonable to guard with CONFIG_SPL_MMC_SUPPORT.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-02-23 08:37:56 +09:00
Masahiro Yamada
e5957e8d69 ARM: uniphier: move MMC code to a separate file
Currently, arch/arm/mach-uniphier/boot-mode/boot-mode.c is messed up
with unrelated code; there is no reason why the "mmcsetn" command
must be placed in this file.

Split out the MMC code into arch/arm/mach-uniphier/mmc-first-dev.c.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-02-23 08:37:56 +09:00
Masahiro Yamada
5c8c6da132 ARM: uniphier: disable CONFIG_MTD_NOR_FLASH
This feature is seldom used these days on UniPhier boards.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-02-23 08:37:56 +09:00
Masahiro Yamada
c276953885 ARM: dts: uniphier: drop u-boot, dm-pre-reloc from system-bus pinctrl node
Since commit 26b09c022a ("ARM: uniphier: move SBC and Support Card
init code to U-Boot proper"), SPL does not need pin-mux settings for
the System Bus.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-02-23 08:37:56 +09:00
Masahiro Yamada
7728f0c68d ARM: uniphier: rename second stage loader name
For the memory footprint reason, the Boot ROM can not load the ARM
Trusted Firmware BL1 directly when Trusted Board Boot is enabled.
The second stage loader is Socionext's own firmware, so rename it
for clarification.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-02-23 08:37:56 +09:00
Masahiro Yamada
6a6b9d5dfd pinctrl: uniphier: support pin configuration
Support the following DT properties:
  "bias-disable"
  "bias-pull-up"
  "bias-pull-down"
  "bias-pull-pin-default"
  "input-enable"
  "input-disable"

My main motivation is to support pull up/down biasing.  For Pro5 and
later SoCs, the pupdctrl register number is the same as the pinmux
number, so this feature can be supported without having big pin
tables.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-02-23 08:37:56 +09:00
Masahiro Yamada
1b280978c0 ARM: uniphier: enable generic EHCI driver for uniphier_v8_defconfig
The LD11 SoC is equipped with USB EHCI controllers.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-02-23 08:37:56 +09:00
Masahiro Yamada
04cd4e7215 ARM: uniphier: remove DRAM base address from board parameters
The base address of each DRAM channel can be calculated from other
parameters, so does not need hard-coding.  What we need is the size
of each DRAM channel and DRAM_SPARSE flag to decide the start address
of DRAM channel 1.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-02-23 08:37:56 +09:00
Masahiro Yamada
cf3175bcd8 ARM: uniphier: update README.uniphier for latest build instruction
Since commit c0efc3140e ("ARM: uniphier: change CONFIG_SPL_PAD_TO
to 128KB"), the u-boot.bin should be burned at the offset 0x20000.
I missed to update README.uniphier in that commit.  Now updating.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-02-23 08:37:56 +09:00
Masahiro Yamada
6fc849148a ARM: uniphier: print Support Card info very late
Since commit 26b09c022a ("ARM: uniphier: move SBC and Support Card
init code to U-Boot proper"), the System Bus is initialized by
board_init().  The show_board_info() is called from board_init_f()
by default, so the revision register of the Micro Support Card may
not be accessed at this point.  Show its revision after the System
Bus is initialized.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-02-23 08:37:56 +09:00
Masahiro Yamada
87c3308cbf ARM: uniphier: skip memreserve of unused DRAM bank of LD20
Now the "for" loop here iterates on the detected memory banks.
It must skip unused DRAM banks.

Fixes: c995f3a3c5 ("ARM: uniphier: use gd->bd->bi_dram for memory reserve on LD20 SoC")
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-02-23 08:37:56 +09:00
Masahiro Yamada
0f5bf09cf1 ARM: uniphier: correct spelling of "invalid"
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-02-23 08:37:56 +09:00
Masahiro Yamada
bed1624d0d ARM: uniphier: skip MEMCONF ch2 parsing if CH2_DISABLE bit is set
If SG_MEMCONF_CH2_DISABLE bit is set, the DRAM channel 2 is unused.
The register settings for the ch2 should be ignored.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-02-23 08:37:56 +09:00
Masahiro Yamada
14bb7a4e37 ARM: uniphier: revive accidentally removed dcache_disable()
Commit a8e6300d48 ("ARM: uniphier: refactor spl_init_board()")
accidentally dropped dcache_disable() call.  Since then, the SPL of
LD11 and LD20 failed to load U-Boot proper.

Fixes: a8e6300d48 ("ARM: uniphier: refactor spl_init_board()")
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-02-23 08:37:56 +09:00
Fabio Estevam
b24cf8540a video: mxsfb: Fix reset hang when videomode variable is not present
Currently the system hangs when the 'videomode' variable is not present
and a reset command is issued:

=> setenv videomode
=> saveenv
=> reset

(Board hangs)

lcdif_power_down() assumes that the LCDIF controller has been properly
configured and enabled, which may not be true.

To fix this issue check whether panel.frameAdrs has been initialized and
in case it has not been initialized, do not continue with the LCDIF
powerdown sequence.

Tested on a imx7dsabresd board.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Acked-by: Anatolij Gustschin <agust@denx.de>
2017-02-22 21:47:59 +01:00
Tom Rini
4d6f9e0d21 Merge git://git.denx.de/u-boot-x86 2017-02-22 10:27:37 -05:00
Andy Shevchenko
308c75e08d x86: Intel MID platforms has no microcode update
There is no microcode update available for SoCs used on Intel MID
platforms.

Use conditional to bypass it.

Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2017-02-21 15:10:56 +08:00
Vincent Tinelli
20bfac0599 x86: zImage: add Intel MID platforms support
Intel MID platform boards have special treatment, such as boot parameter
setting.

Assign hardware_subarch accordingly if CONFIG_INTEL_MID is set.

Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Vincent Tinelli <vincent.tinelli@intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2017-02-21 15:10:50 +08:00
Andy Shevchenko
7a96fd8ef0 x86: Introduce INTEL_MID quirk option
Intel Mobile Internet Device (MID) platforms have special treatment in
some cases, such as CPU enumeration or boot parameters configuration.

Besides that several drivers are specifically developed for the IP
blocks found on Intel MID platforms. Those drivers will be dependent to
this option.

Here we introduce specific quirk option for such cases.

It is supposed to be selected by Intel MID platform boards, for example,
Intel Edison.

Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2017-02-21 15:10:46 +08:00
J. Tang
3c03f4928e x86: Force 32-bit jumps in interrupt handlers
Depending upon the compiler used, IRQ entries could vary in sizes. With
GCC 5.x, the code generator will use short jumps for some IRQ entries
but near jumps for others. For example, GCC 5.4.0 generates the
following:

$ objdump -d interrupt.o
<snip>
00000207 <irq_18>:
207:   6a 12                   push   $0x12
209:   eb 85                   jmp    190 <irq_common_entry>

0000020b <irq_19>:
20b:   6a 13                   push   $0x13
20d:   eb 81                   jmp    190 <irq_common_entry>

0000020f <irq_20>:
20f:   6a 14                   push   $0x14
211:   e9 7a ff ff ff          jmp    190 <irq_common_entry>

00000216 <irq_21>:
216:   6a 15                   push   $0x15
218:   e9 73 ff ff ff          jmp    190 <irq_common_entry>

This causes a problem in cpu_init_interrupts(), because the IDT setup
assumed same sizes for all IRQ entries. GCC 4.x always generated 32-bit
jumps, so this previously was not a problem.

The fix is to force 32-bit near jumps for all entries within the
inline assembly. This works for GCC 5.x, and 4.x was already using
that form of jumping.

Signed-off-by: Jason Tang <tang@jtang.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-02-21 14:53:29 +08:00
Markus Niebel
dc05e47a10 tqma6: [cosmetic] sanitize environment defines
Signed-off-by: Markus Niebel <Markus.Niebel@tq-group.com>
2017-02-19 17:16:51 +01:00
Markus Niebel
e7203d77f6 tqma6: fix rounding in env
need to add before div in mmc update scripts. Otherwise we could
write one block more ba acident

Signed-off-by: Markus Niebel <Markus.Niebel@tq-group.com>
2017-02-19 17:16:51 +01:00
Markus Niebel
34713901ad mx6: tqma6: add rootfsmode environment for mmc / sd
Signed-off-by: Markus Niebel <Markus.Niebel@tq-group.com>
2017-02-19 17:16:51 +01:00
Markus Niebel
0b14f1a615 mx6: tqma6: fix typo in env
there was a double bracketed var ref. fix this.

Signed-off-by: Markus Niebel <Markus.Niebel@tq-group.com>
2017-02-19 17:16:51 +01:00
Markus Niebel
dd9908da3f imx6: tqma6: rely on default setting for tftp and nfs
Playing with USB-to-Ethernet dongles it turns out,
that these will not work with special settings

Signed-off-by: Markus Niebel <Markus.Niebel@tq-group.com>
2017-02-19 17:16:51 +01:00
Markus Niebel
9e9846a484 arm: imx6: tqma6: add configurable CMA size
depending on the use case different CMA sizes are
needed for linux. Add env var to enable passing CMA size
via kernel command line

Signed-off-by: Markus Niebel <Markus.Niebel@tq-group.com>
2017-02-19 17:16:51 +01:00
Andrey Yurovsky
f78038dc0d mtd: nand: build MXS driver for MX7 as well
The i.MX7 has the same GPMI controller as i.MX6 and is covered by the MXS
driver. Tell Kconfig that we can use this driver on the MX7 platform (the MXS
driver already has the few i.MX7-specific changes needed for basic operation
and the board itself sets the pinmux correctly).

Tested on i.MX7D with the Sabre board and a NAND Flash soldered to U12.

Signed-off-by: Andrey Yurovsky <yurovsky@gmail.com>
2017-02-19 16:20:28 +01:00
Peter Robinson
774eb2dbc0 mx6sx: udoo_neo: Enable distro boot options in config
The include/configs/udoo_neo.h already includes the distro defaults
include files so it seems the board was missed in the move to the
config file, whether that in initial commit or conversion, so
enable the option now and remove duplicated settings.

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
2017-02-19 16:19:54 +01:00
Peter Robinson
276ad0650c mx6sx: udoo_neo: use different load address for ramdisk
The fdt_addr and ramdisk_addr_r are currently both defined to
0x83000000 and that's not going to work well for anyone. Move
the ramdisk_addr_r to 0x84000000.

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
2017-02-19 16:19:41 +01:00
Peter Robinson
f902802f65 mx6sx: udoo_neo: Define the default serial console
Standard boot processes including distro boot generally expect the
default console to be defined.

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Tested-by: Breno Lima <breno.lima@nxp.com>
2017-02-19 16:19:26 +01:00
Tom Rini
79be18a60f Drop CONFIG_ENABLE_VBOOT
This is no longer used anywhere.

Signed-off-by: Tom Rini <trini@konsulko.com>
2017-02-17 19:47:53 -05:00
Andrew F. Davis
66c246cce7 ARM: DRA7xx: Fix memory allocation overflow
When using early malloc the allocated memory can overflow into the SRAM
scratch space, move NON_SECURE_SRAM_IMG_END down a bit to allow more
dynamic allocation at the expense of a slightly smaller maximum image
size.

Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2017-02-17 17:24:35 -05:00
ahaslam@baylibre.com
4aac44be11 da850: Add instructions to copy AIS image to an MMC card
The da850 soc's can boot from a external mmc card, but
the AIS image should be written to the correct sector.

Add instructions to copy the AIS image to a MMC card.

Signed-off-by: Axel Haslam <ahaslam@baylibre.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2017-02-17 17:24:35 -05:00
Semen Protsenko
7a2af751a0 arm: am57xx: Set serial# variable
serial# variable is used to correctly display device ID in
"fastboot devices". It also can be used further for displaying device ID
in "adb devices" (should be passed as "androidboot.serialno" to kernel
cmdline, via "bootargs" variable).

Serial number generating algorithm is described at [1].

[1] http://lists.denx.de/pipermail/u-boot/2015-March/207462.html

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2017-02-17 17:24:34 -05:00
Dalon Westergreen
949123e30a SPL: Move SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION to Kconfig
Added SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION and
SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION to Kconfig.

Due to SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION being moved to
Kconfig the board defconfigs for db-88f6820-gp_defconfig
kc1_defconfig and sniper_defconfig need to be updated.

Signed-off-by: Dalon Westergreen <dwesterg@gmail.com>
2017-02-17 14:15:15 -05:00
Dalon Westergreen
f0fb4fa7d5 SPL: add support to boot from a partition type
the socfpga bootrom supports mmc booting from either a raw image
starting at 0x0, or from a partition of type 0xa2.  This patch
adds support for locating the boot image in the first type 0xa2
partition found.

Assigned a partition number of -1 will cause a search for a
partition of type CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION_TYPE
and use it to find the u-boot image

Signed-off-by: Dalon Westergreen <dwesterg@gmail.com>
2017-02-17 14:15:14 -05:00
Andrew F. Davis
bc1e0dd947 arm: omap5: Fix generation of reserved-memory DT node
When the node 'reserved-memory' is not defined in the DT we fail
to add needed properties. We also fail to move 'offs' to point to
the new node. Fix these here.

Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2017-02-17 14:15:12 -05:00
Tom Rini
645cb46e2b fsl_i2c.c: Fix warning on gcc-6.x
With gcc-6.x we see:
drivers/i2c/fsl_i2c.c:86:3: warning: ‘fsl_i2c_speed_map’ defined but not
used [-Wunused-const-variable=]

The easy way to fix this is that since we only use fsl_i2c_speed_map at
all on __M68K__ move the existing guards around slightly.

Reported-by: Thomas Schaefer <Thomas.Schaefer@kontron.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Heiko Schocher <hs@denx.de>
2017-02-17 14:15:12 -05:00
Chris Packham
93f4877935 tools: kwboot: don't adjust destaddr when patching the image
Commit 94084eea3b ("tools: kwbimage: Fix dest addr") changed kwbimage
to do this adjustment. So now the adjustment in kwboot is not needed
(and would prevent UART booting for images generated by the new
kwbimage). Remove the destaddr adjustment in kwboot.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2017-02-17 10:15:56 +01:00
Mario Six
1f6c8a5733 tools: kwbimage: Fix unchecked return value and fd leak
The return value of fstat was not checked in kwbimage, and in the case
of an error, the already open file was not closed. Fix both errors.

Reported-by: Coverity (CID: 155971)
Reported-by: Coverity (CID: 155969)
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
2017-02-17 10:15:21 +01:00
Tom Rini
85d0bea153 Prepare v2017.03-rc2
Signed-off-by: Tom Rini <trini@konsulko.com>
2017-02-13 11:47:45 -05:00
Tom Rini
a8d052b500 Merge tag 'xilinx-fixes-for-v2017.03' of git://www.denx.de/git/u-boot-microblaze
Xilinx fixes for v2017.03

- defconfig alignment
- Topic.nl board updates
- Minor microblaze comment fix
2017-02-13 09:35:40 -05:00
Masahiro Yamada
c77c7db58e i2c: sandbox: remove code snippet from Kconfig help
With the Kconfig re-sync with Linux 4.10, characters such as
'}', ';' in Kconfig help message cause warnings:

$ make defconfig
*** Default configuration is based on 'sandbox_defconfig'
drivers/i2c/Kconfig:132:warning: ignoring unsupported character '}'
drivers/i2c/Kconfig:132:warning: ignoring unsupported character ';'

Drop the Device Tree fragment from the help.

Acked-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-02-13 07:18:25 -05:00
Masahiro Yamada
bf7ab1e70f kconfig: re-sync with Linux 4.10
Re-sync all files under the scripts/kconfig directory with
Linux 4.10.

Some parts include U-Boot own modification.  I made sure to not
revert the following commits:

 5b8031ccb4 ("Add more SPDX-License-Identifier tags")
 192bc6948b ("Fix GCC format-security errors and convert sprintfs.")
 da58dec866 ("Various Makefiles: Add SPDX-License-Identifier tags")
 20c20826ef ("Kconfig: Enable usage of escape char '\' in string values")

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-02-12 14:31:25 -05:00
Masahiro Yamada
554c73c025 flash: compile common/flash.c iif CONFIG_MTD_NO_FLASH is enabled
The whole of common/flash.c is guarded by #if defined() ... #endif.
Move the conditional to common/Makefile.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-02-12 14:30:31 -05:00
Masahiro Yamada
e856bdcfb4 flash: complete CONFIG_SYS_NO_FLASH move with renaming
We repeated partial moves for CONFIG_SYS_NO_FLASH, but this is
not completed. Finish this work by the tool.

During this move, let's rename it to CONFIG_MTD_NOR_FLASH.
Actually, we have more instances of "#ifndef CONFIG_SYS_NO_FLASH"
than those of "#ifdef CONFIG_SYS_NO_FLASH".  Flipping the logic will
make the code more readable.  Besides, negative meaning symbols do
not fit in obj-$(CONFIG_...) style Makefiles.

This commit was created as follows:

[1] Edit "default n" to "default y" in the config entry in
    common/Kconfig.

[2] Run "tools/moveconfig.py -y -r HEAD SYS_NO_FLASH"

[3] Rename the instances in defconfigs by the following:
  find . -path './configs/*_defconfig' | xargs sed -i \
  -e '/CONFIG_SYS_NO_FLASH=y/d' \
  -e 's/# CONFIG_SYS_NO_FLASH is not set/CONFIG_MTD_NOR_FLASH=y/'

[4] Change the conditionals by the following:
  find . -name '*.[ch]' | xargs sed -i \
  -e 's/ifndef CONFIG_SYS_NO_FLASH/ifdef CONFIG_MTD_NOR_FLASH/' \
  -e 's/ifdef CONFIG_SYS_NO_FLASH/ifndef CONFIG_MTD_NOR_FLASH/' \
  -e 's/!defined(CONFIG_SYS_NO_FLASH)/defined(CONFIG_MTD_NOR_FLASH)/' \
  -e 's/defined(CONFIG_SYS_NO_FLASH)/!defined(CONFIG_MTD_NOR_FLASH)/'

[5] Modify the following manually
  - Rename the rest of instances
  - Remove the description from README
  - Create the new Kconfig entry in drivers/mtd/Kconfig
  - Remove the old Kconfig entry from common/Kconfig
  - Remove the garbage comments from include/configs/*.h

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-02-12 14:30:25 -05:00
Tom Rini
a931e9975b Merge git://git.denx.de/u-boot-samsung 2017-02-11 10:38:40 -05:00
Tom Rini
b16f6804b4 Merge git://git.denx.de/u-boot-rockchip 2017-02-11 10:38:21 -05:00
Michal Simek
1d82e2c15c microblaze: Fix endif macro command
Use correct name in endif comment.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-02-10 13:59:36 +01:00
Mike Looijmans
1520fe60d9 configs/topic_miami.h: Correct kernel_size in default environment
The kernel partition in QSPI is 0x440000 large, not 0x400000. Fix this
in the environment, otherwise the kernel will fail to boot if it occupies
more space.

Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-02-10 13:59:17 +01:00
Mike Looijmans
c38e981707 topic_miami(plus) defconfig: Enable DFU RAM support
Allow sending firmware to RAM. Without this, the DFU support was not
of much use.

Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-02-10 13:59:17 +01:00
Mike Looijmans
d018db40a3 topic_miami_defconfig: Remove NFS and NET support
On the miami board, ethernet is accessed via logic. To use it, one
would have to program logic first and then set up the rgmii conversion
block as well. Not likely to ever be used, so disable network support
by default to save some space.

Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-02-10 13:58:25 +01:00
Michal Simek
2e0583b67e xilinx: Align defconfig with current Kconfig order
Keep all defconfig sorted to ensure the smallest diff.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-02-10 13:57:35 +01:00
Simon Glass
5d3be0f81c exynos: Drop large alignment for SDRAM parameters
We don't ever search for these so there is no need for a 4KB alignment.
It just wastes space.

Drop this and use the standard 4-byte alignment.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2017-02-10 18:51:51 +09:00
Tom Rini
f1cc97764b Merge branch 'master' of git://git.denx.de/u-boot-video 2017-02-09 14:54:09 -05:00
Eddie Cai
6f27976455 rockchip: rename miniarm to tinker board
Miniarm is the internal project code. Now it is officially named Tinker board.
So rename it.

Signed-off-by: Eddie Cai <eddie.cai@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-02-09 12:10:59 -07:00
Romain Perier
1caec07e5c rockchip: Enable ETH address randomization for the firefly-rk3288
This commit enables ethernet MAC address randomization on the
firefly-rk3288. It removes the error at startup 'ethernet@ff290000
address not set'.

Signed-off-by: Romain Perier <romain.perier@collabora.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-02-09 12:10:59 -07:00
Jacob Chen
5235753d15 rockchip: firefly: configs: use spl back to brom
Keep it same with other boards otherwise i have to write special script for it..

Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-02-09 12:10:59 -07:00
Jacob Chen
3d1bf166bf rockchip: configs: move env offset to common header
To reduce redundant code.

Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-02-09 12:10:59 -07:00
Simon Glass
f568ac219c rockchip: Correct MAINTAINER entry for chromebook_minnie
This is wrong at present, so genboardscfg.py gives the following warnings:

WARNING: no status info for 'chromebook_minnie'
WARNING: no maintainers for 'chromebook_minnie'

Fix it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-02-09 12:10:59 -07:00
Jacob Chen
a8830a1247 rockchip: dts: rk3288: correct sdram setting for miniarm
miniarm board use lpddr3

Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
Added 'rockchip:' prefix to subject:
Signed-off-by: Simon Glass <sjg@chromium.org>

Change-Id: I84c3679dab2dbd8d01c1ebfd22220946d07c03cd
2017-02-09 12:10:59 -07:00
Tom Rini
2a48b3a2c4 omap_hsmmc.c: Fix build warning on non-omap3
It was incorrect to always include "asm/arch-omap3/mux.h" constantly.
This introduced warnings on non-omap3 where certain values will conflict
between the various families.  Conditionally guard the inclusion in
order to correct the problem.

Fixes: 6aca17c9b7 ("drivers: mmc: omap_hsmmc: Fix IO Buffer on OMAP36xx")
Signed-off-by: Tom Rini <trini@konsulko.com>
2017-02-09 13:41:28 -05:00
Tom Rini
e1a71f8b33 Merge branch 'master' of git://git.denx.de/u-boot-net 2017-02-09 11:56:35 -05:00
Tom Rini
6f57b19857 Merge branch 'master' of git://git.denx.de/u-boot-mmc 2017-02-09 11:56:19 -05:00
Tom Rini
0959649dc6 omap3_logic: Switch to simple malloco in SPL
To save more space, switch to simple malloc here.

Signed-off-by: Tom Rini <trini@konsulko.com>
2017-02-09 11:55:57 -05:00
Tom Rini
e0dff9b860 qemu-x86_64_defconfig: Disable CONFIG_BOARD_EARLY_INIT_F
The qemu-x86* targets do not want to enable this.

Signed-off-by: Tom Rini <trini@konsulko.com>
2017-02-09 08:52:18 -05:00
Fiach Antaw
a0269bb6e8 mmc: init mmc block devices on probe
MMC devices accessed exclusively via the driver model were not
being initialized before being exposed as block devices, causing
issues in scenarios where the MMC device is first accessed via the
uclass block interface.

Signed-off-by: Fiach Antaw <fiach.antaw@uqconnect.edu.au>
2017-02-09 20:37:06 +09:00
Adam Ford
6aca17c9b7 drivers: mmc: omap_hsmmc: Fix IO Buffer on OMAP36xx
On the OMAP36xx/37xx the CONTROL_WKUP_CTRL register has
a field (bit 6) named GPIO_IO_PWRDNZ.  If 0, the IO buffers which
are related to GPIO_126, 127 and 129 are disabled. Some boards may
need this for MMC. After the PBIAS is configured, this bit should
be set high to enable these GPIO pins.

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2017-02-09 20:37:06 +09:00
Jaehoon Chung
d14f1d511a mmc: ftsdc021_sdhci: remove the ftsdc021_sdhci.c
ftsdc021_sdhci.c is dead file.
There is no reason to maintain this host controller.
Removes the entire ftsdc021_sdhci.c.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2017-02-09 20:37:05 +09:00
Jaehoon Chung
02ad33aa3a mmc: mmc-uclass: use the fixed devnum with alias node
If there are alias nodes as "mmc", use the devnum as alias index
number.
This patch is for fixing a problem of Exynos4 series.
Problem is the below thing.

Current legacy mode:
EXYNOS DWMMC: 0, SAMSUNG SDHCI: 1

After using DM:
SAMSUNG SDHCI: 0, EXYNOS DWMMC: 1

Dev index is swapped.
Then u-boot can't find the kernel image..because it is already set to 0 as mmcdev.
If change from legacy to DM, also needs to touch all exynos4 config file.
For using simply, just supporting the fixed devnum with alias node is better than it.

Usage:
alaise {
	....
	mmc0 = &sdhci2; /* eMMC */
	mmc1 = &sdhci1; /* SD */
	...
}

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-02-09 20:37:05 +09:00
Jaehoon Chung
22940af121 arm: dts: trats: add the pmic node for using DM
To use driver-model adds the pmic node for max8997.
This is used as kernel device-tree in Linux.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-02-09 14:28:53 +09:00
Jaehoon Chung
1a5a05dade power: pmic: add the max8997 controller for DM
Add the max8997 controller for Driver model.
Exynos4210 is using max8997 pmic controller.
(pmic_max8997.c should be deprecated.)

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-02-09 14:28:37 +09:00
Tom Rini
576a085c1d Merge branch 'master' of git://git.denx.de/u-boot-socfpga 2017-02-08 22:04:32 -05:00
John Haechten
a5fd13ad19 net: phy: MSCC Add Support for VSC8530-VSC8531-VSC8540-VSC8541
Signed-off-by: John Haechten <john.haechten@microsemi.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2017-02-08 16:32:58 -06:00
Tom Rini
21342d4aed Merge git://git.denx.de/u-boot-dm 2017-02-08 16:24:44 -05:00
Robert P. J. Day
7582ddce13 GPIO: Correct doc typo "confguration" -> "configuration"
Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
2017-02-08 16:24:29 -05:00
Lars Poeschel
55c854c612 Remove unused symbol CONGIG_CMD_STORAGE from board configs
Albeit it's a typo, neither CONGIG_CMD_STORAGE nor CONFIG_CMD_STORAGE
are used anywhere, so remove the define from the board configs.

Signed-off-by: Lars Poeschel <poeschel@lemonage.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
2017-02-08 16:24:28 -05:00
Masahiro Yamada
e9d33e7326 cmd: move CONFIG_CMD_UNZIP and CONFIG_CMD_ZIP to Kconfig
CONFIG_CMD_ZIP is not defined by any board.  I am moving
CONFIG_CMD_UNZIP to defconfig files except UniPhier SoC family.

I am the maintainer of UniPhier platform, so I know "select CMD_UNZIP"
is better for this platform.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Stefan Roese <sr@denx.de>
Acked-by: Ryan Harkin <ryan.harkin@linaro.org>
Tested-by: Ryan Harkin <ryan.harkin@linaro.org>
2017-02-08 16:24:28 -05:00
Masahiro Yamada
1f4f5e52e5 arm64: fix comment in relocate_64.S
There are two typos in the comment "invalide i-cache is enabled".
We can fix it by
  invalide -> invalidate
  is       -> if

Or, if we want to match the comment to the code, we can say
"skip invalidating i-cache if disabled".

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-02-08 16:24:27 -05:00
Phil Edworthy
8ccdba8b8c keystone2: Rename local CONFIG_ symbol
CONFIG_SPL_STACK_SIZE is not a config option, so rename it.

Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
2017-02-08 16:24:27 -05:00
Keerthy
3064aa7009 regulator: palmas: Fix smps6 - smps9 indices
The array indices used currently are dispalaced by 1 for
SMPS6 through SMPS10 in the respective places of voltage and ctrl
arrays hence fix the same as to assign the right voltage and ctrl
registers.

Signed-off-by: Keerthy <j-keerthy@ti.com>
2017-02-08 16:24:27 -05:00
Masahiro Yamada
4985012b73 pwm: remove unneeded ifdef CONFIG_DM_PWM ... endif
Both CONFIG_PWM_TEGRA and CONFIG_PWM_EXYNOS depend on CONFIG_DM_PWM,
i.e. they are already guarded by Kconfig correctly.  Remove unneeded
ifdef CONFIG_DM_PWM ... endif.

While we are here, let's tidy up alignment and sort the lines
alphabetically in Makefile.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-02-08 16:24:26 -05:00
Jean-Jacques Hiblot
2e4e5ad4c8 common: env_sf: Use CONFIG_SF_DEFAULT_xxx as the default value for CONFIG_ENV_SPI_xxx
The default values for the configuration defines CONFIG_ENV_SPI_xxx are
arbitrary values. It makes more sense to set them to the values used by
the sf command.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2017-02-08 16:24:26 -05:00
Albert ARIBAUD \(3ADEV\)
db74cbfc09 pcm052: fix DDR initialization sequence
The sequence erroneously launched the DDR controller
initialization before the pad muxing was done, causing
DRAM size computation to hang.

Configuring the pads first then launching DDR controller
initialization prevents the DRAM hanging.

Signed-off-by: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr>
2017-02-08 16:24:25 -05:00
Lokesh Vutla
e9ced147bc drivers: net: cpsw: Fix reading of mac address for am43 SoCs
cpsw driver tries to get macid for am43xx SoCs using the compatible
ti,am4372. But not all variants of am43x uses this complatible like
epos evm uses ti,am438x. So use a generic compatible ti,am43 to get
macid for all am43 based platforms.

Tested-by: Aparna Balasubramanian <aparnab@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2017-02-08 16:24:25 -05:00
Grygorii Strashko
dbe7881de0 cmd: bootm: fix build when CONFIG_CMD_IMLS_NAND
Now when CONFIG_CMD_IMLS_NAND is enabled the u-boot build will fail,
because nand_read_skip_bad() function has been changed to accept more
parameters, hence fix it.

 CC      cmd/bootm.o
cmd/bootm.c: In function 'nand_imls_legacyimage':
cmd/bootm.c:390:8: error: too few arguments to function 'nand_read_skip_bad'
  ret = nand_read_skip_bad(mtd, off, &len, imgdata);
        ^
In file included from cmd/bootm.c:18:0:
include/nand.h:101:5: note: declared here
 int nand_read_skip_bad(struct mtd_info *mtd, loff_t offset, size_t *length,
     ^
 LD      drivers/block/built-in.o

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-02-08 15:56:32 -05:00
Dan Murphy
c10e0f5b38 checkpatch: Port spelling to checkpatch
Pick commit 66b47b4a9dad0 checkpatch: look for common misspellings
from the Linux kernel for spelling check from Kees Cook

In addition pulled in additional changes
commit ebfd7d6237531 checkpatch: add optional --codespell dictionary to find more typos
from the Linux kernel for codespell from Joe Perches

commit f1a63678554f8 checkpatch: remove local from codespell path
from the Linux kernel for dictionary path from Maxim Uvarov

Signed-off-by: Dan Murphy <dmurphy@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2017-02-08 15:56:31 -05:00
Emmanuel Vadot
b569048357 api: Convert to Kconfig
Now that we have a Kconfig for the API, convert the two boards that
are using this to Kconfig and remove CONFIG_API from the whitelist.

Signed-off-by: Emmanuel Vadot <manu@bidouilliste.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-02-08 15:56:31 -05:00
Emmanuel Vadot
4db98d3d92 kconfig: Add API kconfig file
Add kconfig file to enable API support

Signed-off-by: Emmanuel Vadot <manu@bidouilliste.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-02-08 15:56:31 -05:00
Masahiro Yamada
1bdd942b6d kbuild: beautify the log of config whitelist check
Use the kbuild style log.

Prior to this commit:

./scripts/check-config.sh u-boot.cfg \
	./scripts/config_whitelist.txt . 1>&2

With this commit:

  CFGCHK  u-boot.cfg

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-02-08 15:56:30 -05:00
Lokesh Vutla
f0a3f3492a ARM: dts: k2*: Rename the k2* files to keystone-k2* files
As reported in [1], rename the k2* dts files to keystone-* files
this will force consistency throughout.

Script for the same (and hand modified for Makefile and config
files):
for i in arch/arm/dts/k2*
do
	b=`basename $i`;
	git mv $i arch/arm/dts/keystone-$b;
	sed -i -e "s/$b/keystone-$b/g" arch/arm/dts/*[si]
done

This is similar to linux kernel commit 5edafc29829bc ("ARM: dts: k2*: Rename
the k2* files to keystone-k2* files")

[1] http://marc.info/?l=linux-arm-kernel&m=145637407804754&w=2

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2017-02-08 15:56:30 -05:00
maxims@google.com
d5ce357461 aspeed: ast2500: Fix H-PLL and M-PLL clock rate calculation
Fix H-PLL and M-PLL rate calculation in ast2500 clock driver.
Without this fix, valid setting can lead to division by zero
when requesting the rate of H-PLL or M-PLL clocks.

Signed-off-by: Maxim Sloyko <maxims@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-02-08 15:56:30 -05:00
Vincent Tinelli
e163a931af cmd: gpt: backup boot code before writing MBR
On some cases the first 440 bytes of MBR are used to keep an additional
information for ROM boot loader. 'gpt write' command doesn't preserve
that area and makes boot code gone.

Preserve boot code area when run 'gpt write' command.

Signed-off-by: Vincent Tinelli <vincent.tinelli@intel.com>
Signed-off-by: Brennan Ashton <brn@deako.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-02-08 15:56:29 -05:00
Masahiro Yamada
d726f225f5 cmd: rework "license" command
The previous commit ("add a new command to show .config contents")
improves the basic infrastructure of "embed a compressed file into
the U-Boot image, and print it by a command".  The same pattern for
the "license" command.

This commit reworks the command to improve the following:

[1] Improve log style

Kbuild style log

  GZIP    cmd/license_data.gz
  CHK     cmd/license_data_gz.h
  UPD     cmd/license_data_gz.h
  CHK     cmd/license_data_size.h
  UPD     cmd/license_data_size.h

instead of the bare Make log:

cat ./Licenses/gpl-2.0.txt | gzip -9 -c | \
		tools/bin2header license_gzip > ./include/license.h

[2] Collect related code into the "cmd" directory

Prior to this commit, the license.h was created by tools/Makefile,
placed under the "include" directory, included from cmd/license.c,
and deleted by the top-level Makefile.  It is not a good idea to
scatter related code.

[3] Drop the fixed-malloc size LICENSE_MAX

Just allocate the minimum required size of buffer because we know
the size of the original gpl-2.0.txt.

[4] Fix more issues

Terminate the buffer with zero to prevent puts() from over-running.
Add "static" to do_license.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-02-08 15:56:28 -05:00
Masahiro Yamada
61304dbec3 cmd: add a new command "config" to show .config contents
This feature is inspired by /proc/config.gz of Linux.  In Linux,
if CONFIG_IKCONFIG is enabled, the ".config" file contents are
embedded in the kernel image.  If CONFIG_IKCONFIG_PROC is also
enabled, the ".config" contents are exposed to /proc/config.gz.
Users can do "zcat /proc/config.gz" to check which config options
are enabled on the running kernel image.

The idea is almost the same here; if CONFIG_CMD_CONFIG is enabled,
the ".config" contents are compressed and saved in the U-Boot image,
then printed by the new command "config".

The usage is quite simple.  Enable CONFIG_CMD_CONFIG, then run
 > config
from the command line interface.  The ".config" contents will be
printed on the console.

This feature increases the U-Boot image size by about 4KB (this is
mostly due to the gzip-compressed .config file).  By default, it is
enabled only for Sandbox because we do not care about the memory
footprint on it.  Of course, this feature is architecture agnostic,
so you can enable it on any board if the image size increase is
acceptable for you.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-02-08 15:56:26 -05:00
Masahiro Yamada
6fb631ecde scripts: import bin2c.c from Linux 4.10-rc6
Import scripts/basic/bin2c.c of Linux.

In Linux Kernel, this file was moved to scripts/basic directory by
commit 8370edea81e3 ("bin2c: move bin2c in scripts/basic").

In U-Boot, we do not need to follow that commit.  Just put it in the
original directory "scripts".

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-02-08 15:56:19 -05:00
Masahiro Yamada
07a63c7e7d arm64: use store with auto-increment
Save one instruction.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-02-08 09:17:31 -05:00
Masahiro Yamada
b913c3f079 arm64: use xzr to zero-out the bss section
AArch64 has a zero register (xzr).  Use it instead of x2.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-02-08 09:17:30 -05:00
Chris Packham
f11a0af713 patman: Handle non-ascii characters in names
When gathering addresses for the Cc list patman would encounter a
UnicodeDecodeError due to non-ascii characters in the author name.
Address this by explicitly using utf-8 when building the Cc list.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
2017-02-08 06:12:16 -07:00
Simon Glass
8d7523c55c buildman: Allow showing the list of boards with -n
As well as showing the number of boards, allow showing the actual list of
boards that would be built, if -v is provided.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-02-08 06:12:16 -07:00
Moritz Fischer
147f785f67 cros_ec: i2c: Add support for version 3 of the EC protocol
Add support for version 3 of the ec protocol. It basically works by
stitching some additional header in front (special command code),
and having a result and packet_length stitched on for the reply.

Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: u-boot@lists.denx.de
Acked-by: Simon Glass <sjg@chromium.org>
Tested on snow:
Tested-by: Simon Glass <sjg@chromium.org>
2017-02-08 06:12:16 -07:00
Kever Yang
6943ee14e5 simple-bus: enable support for of-platdata
Just do nothing in post_bind if of-platdata enabled,
for there is no dm_scan_fdt_dev().

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Fixed subject line typo:
Signed-off-by: Simon Glass <sjg@chromium.org>
2017-02-08 06:12:16 -07:00
Simon Glass
e160f7d430 dm: core: Replace of_offset with accessor
At present devices use a simple integer offset to record the device tree
node associated with the device. In preparation for supporting a live
device tree, which uses a node pointer instead, refactor existing code to
access this field through an inline function.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-02-08 06:12:14 -07:00
Simon Glass
8aa41363eb patman: Format checkpatch messages for IDE throwback
It is convenient to be able to deal with checkpatch warnings in the same
way as build warnings. Tools such as emacs and kate can quickly locate
the source file and line automatically.

To achieve this, adjust the format to match the C compiler, and output to
stderr.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-02-08 06:07:35 -07:00
Simon Glass
6b6024a3a2 dtoc: Replace dot with underscore to avoid compiler errors
If there is a '.' in a compatible string, then dtoc will produce a struct
with a name containing a '.'. This won't work, so replace it with '_'.

Also add a suitable test to the sandbox device tree to catch this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-02-08 06:07:35 -07:00
Moritz Fischer
e9b25f2ea1 cros_ec: i2c: Group i2c write / read into single transaction
Replace dm_i2c_write() / dm_i2c_read() with transaction using
struct i2c_msg[2] in order to allow for i2c controller to detect
write/read cycle to emit a repeated start condition.

Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: u-boot@lists.denx.de
Acked-by: Simon Glass <sjg@chromium.org>
Tested on snow:
Tested-by: Simon Glass <sjg@chromium.org>
2017-02-08 06:07:13 -07:00
Ladislav Michl
136026f18e common: fdt_support: Remove check for mtdparts in fdt_fixup_mtdparts
fdt_fixup_mtdparts currently does nothing when partition info is
runtime-generated or compiled-in defaults are used.

Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Fix nits in commit message:
Signed-off-by: Simon Glass <sjg@chromium.org>
2017-02-08 05:34:52 -07:00
Dinh Nguyen
a45526aaa0 arm: socfpga: set the mpuclk divider in the Altera group register
The mpuclk register in the Altera group of the clock manager
divides the mpu_clk that is generated from the C0 output of the main
pll.

Without this patch, the default value of the register is 1, so the mpuclk
will always get divided by 2 if the correct value is not set. For example,
on the Arria5 socdk board, the MPU clock is only 525 MHz, and it should be
1.05 GHz.

Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2017-02-08 02:19:11 +01:00
Alex
af2cbfd6b9 drivers: net: Provide Kconfig menu for PHYLIB
Provide the necessary Kconfig symbols so that PHYLIB support may be
enabled in Kconfig, as opposed to needing to #define these symbols in
C source headers.

BITBANGMII and MV88E6352_SWITCH are left out of the PHYLIB submenu as
they don't seem to explicitly depend on it (i.e. they do not use the
phy_driver class).

Signed-off-by: Alexandru Gagniuc <alex.g@adaptrum.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2017-02-07 11:05:03 -06:00
Joe Hershberger
93cc2959cf net: phy: Improve the Marvell 151x constants
Use some constants for the phy configuration instead of so many magic
numbers.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
2017-02-07 10:54:35 -06:00
Daniel Strnad
5ad9204fa9 net: fec_mxc: Fix corruption of device tree blob
Modifying content of dev->name leads to the device tree corruption
because it points to the node name located there.

Signed-off-by: Daniel Strnad <strnadda@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2017-02-07 10:54:34 -06:00
Heiner Kallweit
655217d968 net: designware: Fix for use with current Linux device tree for Meson GX
In Uboot for Meson GX the compatible string in meson-gxbb.dtsi so far is:
compatible = "amlogic,meson6-dwmac", "snps,dwmac";

On Linux in the same dt file it's
compatible = "amlogic,meson-gx-dwmac", "amlogic,meson-gxbb-dwmac", "snps,dwmac";

To avoid breaking ethernet with the next DT synch from Linux to U-Boot
(planned as prerequisite for adding Meson GX MMC driver to U-Boot) add
"amlogic,meson-gx-dwmac" to the compatibility list in the designware
driver.

Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2017-02-07 10:54:34 -06:00
Mugunthan V N
6463170064 net: phy: dp83867: Add support for MAC impedance configuration
Add support for programmable MAC impedance configuration and
fix typo in DT impedance parameters names.

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Tested-by: Lokesh Vutla <lokeshvutla@ti.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2017-02-07 10:54:34 -06:00
Phil Edworthy
3b5f52801d net: phy: vitesse: Fix cis8204 RGMII_ID code
Commit 79e86ccb37 "vitesse: remove duplicated
argument to ||" correctly removed a redundant check.

However, I believe that the original code was simply wrong, and should have
been checking against RGMII_ID.

To fix this and avoid similar problems in the future, use the
phy_interface_is_rgmii helper function.

Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2017-02-07 10:54:34 -06:00
Phil Edworthy
24d98cb424 net: phy: Marvell: Use phy_interface_is_rgmii helper function
Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2017-02-07 10:54:34 -06:00
Phil Edworthy
998640b478 net: phy: Add support for Marvell M88E1512
This device also works with the 88E1518 code, so we just adjust
the UID mask accordingly.

Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2017-02-07 10:54:33 -06:00
Phil Edworthy
83cfbeb0df net: phy: Fix mask so that we can identify Marvell 88E1518
The mask for the 88E1510 meant that the 88E1518 code would never be
used.

Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2017-02-07 10:54:33 -06:00
Phil Edworthy
8abdeadc5c net: phy: ti: Fix dp83867 RGMII_TXID interface path
There is code that is specifically for RGMII_TXID interface, but this
will never get used because the code checks that the RGMII interface
is RGMII_ID to RGMII_RXID; RGMII_TXID is after this.

To fix this and avoid similar problems in the future, use the
phy_interface_is_rgmii helper function.

Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2017-02-07 10:54:33 -06:00
oliver@schinagl.nl
c25f01a63a tools: Add tool to add crc8 to a mac address
This patch adds a little tool that takes a generic MAC address and
generates a CRC byte for it. The output is the full MAC address without
any separators, ready written into an EEPROM.

Signed-off-by: Olliver Schinagl <o.schinagl@ultimaker.com>
Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2017-02-07 10:54:33 -06:00
oliver@schinagl.nl
1d3c539239 tools: Allow crc8 to be used
This patch enables crc8 to be used from within the tools directory using
u-boot/crc.h.

Signed-off-by: Olliver Schinagl <o.schinagl@ultimaker.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
2017-02-07 10:54:32 -06:00
oliver@schinagl.nl
26d40b0a17 net: core: cosmetic: A MAC address is not limited to SROM
Currently, we print that the MAC from the SROM does not match. It can be
many forms of ROM, so lets drop the S.

Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2017-02-07 10:54:32 -06:00
oliver@schinagl.nl
2c07c32994 net: cosmetic: Define ethernet name length
There are various places where the ethernet device name is defined to
several different sizes. Lets add a define and start using it.

Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2017-02-07 10:54:32 -06:00
oliver@schinagl.nl
9f455bcb34 net: cosmetic: Make the MAC address string less magical
In u-boot printf has been extended with the %pM formatter to allow
printing of MAC addresses. However buffers that want to store a MAC
address cannot safely get the size. Add a define for this case so the
string of a MAC address can be reliably obtained.

Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2017-02-07 10:54:32 -06:00
oliver@schinagl.nl
a40db6d511 net: cosmetic: Do not use magic values for ARP_HLEN
Commit 674bb24982 ("net: cosmetic: Replace magic numbers in arp.c with
constants") introduced a nice define to replace the magic value 6 for
the ethernet hardware address. Replace more hardcoded instances of 6
which really reference the ARP_HLEN (iow the MAC/Hardware/Ethernet
address).

Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2017-02-07 10:54:32 -06:00
Wenyou Yang
6d2c1d26ee net: macb: Remove redundant #ifdef CONFIG_DM_ETH
Remove the redundant #ifdef CONFIG_DM_ETH/#endif.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2017-02-07 10:54:31 -06:00
Wenyou Yang
577aa3b358 net: macb: Add the clock support
Due to introducing the at91 clock driver, add the clock support.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2017-02-07 10:54:31 -06:00
Wenyou Yang
ebcb40a5a0 net: Kconfig: Add CONFIG_MACB option
Add CONFIG_MACB option in KConfig to be used to select the Cadence
MACB Ethernet driver.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
2017-02-07 10:54:31 -06:00
Andy Shevchenko
446d4e048e x86: make LOAD_FROM_32_BIT visible for platforms
This option is useful not only for development, but for the platforms
where U-Boot is run from custom ROM bootloader. For example, Intel
Edison is that board.

Make this option visible that platforms can select it if needed.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-02-07 13:36:50 +08:00
Bin Meng
bda40d5634 x86: qemu: Add a config for 64-bit U-Boot
Add a new board config which uses 64-bit U-Boot. Supported features
are the same as the other 64-bit board (Google Chromebook Link).
It is a start for us to test 64-bit U-Boot easily without the need
to access a real hardware.

Note CONFIG_SPL_ENV_SUPPORT is required for QEMU 64-bit as without
this the SPL build fails at the end. This is just a workaround as
CONFIG_SPL_ENV_SUPPORT is not needed at all.

common/built-in.o:(.data.env_htab+0xc): undefined reference to 'env_flags_validate'
lib/built-in.o: In function `hsearch_r':
lib/hashtable.c:380: undefined reference to 'env_callback_init'
lib/hashtable.c:382: undefined reference to 'env_flags_init'
make[1]: *** [spl/u-boot-spl] Error 1

Except those SPL options required by 64-bit, compared to 32-bit
config, the following options are different:

- CONFIG_SYS_MALLOC_F_LEN has to be increased to 0x1000 for SPL.
- CONFIG_DEBUG_UART has to be included due to the weird issue.
  See TODO comments in arch/x86/cpu/x86_64/cpu.c:arch_setup_gd().
  Once this issue gets fixed, debug uart can be optional.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-02-07 13:34:10 +08:00
Bin Meng
73d2de2b59 x86: qemu: Add build options for SPL
If SPL is used we want to use the generic SPL framework and boot
from SPI via a board-specific means. Add these options to the
board config file.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-02-07 13:34:07 +08:00
Bin Meng
8149d114a9 x86: qemu: Add a text base for 64-bit U-Boot
Set up the 64-bit U-Boot text base if building for that target.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-02-07 13:34:05 +08:00
Bin Meng
9d1adf0484 tools: binman: Handle optional microcode case in SPL image
On platforms which do not require microcode in SPL, handle such
case like U-Boot proper.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-02-07 13:27:20 +08:00
Bin Meng
cdfc0a055d tools: binman: Call correct init for Entry_u_boot_spl_with_ucode_ptr
u_boot_spl_with_ucode_ptr is derived from u_boot_with_ucode_ptr,
hence it should call its parent's init.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-02-07 13:27:17 +08:00
Bin Meng
399de922ff x86: qemu: Mark ucode as optional for SPL in u-boot.dtsi
QEMU does not need ucode and this is indicated in u-boot.dtsi
for U-Boot proper. Now add the same for SPL.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-02-07 13:27:13 +08:00
Bin Meng
2cffd90f14 x86: qemu: Set up device tree for SPL
Add the correct pre-relocation tag so that the required device tree
nodes are present in the SPL device tree.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-02-07 13:27:11 +08:00
Bin Meng
63767071d9 x86: qemu: Fix compiler warnings for 64-bit
This fixes compiler warnings for QEMU in 64-bit.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-02-07 13:27:08 +08:00
Bin Meng
e760feb19f x86: qemu: Hide arch_cpu_init() and print_cpuinfo() for U-Boot proper
arch_cpu_init() and print_cpuinfo() should be only available in SPL
build.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-02-07 13:23:42 +08:00
Bin Meng
d8f25c2a5a x86: Compile irq.c for 64-bit
There is no reason not to compile irq.c for 64-bit.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-02-07 13:23:39 +08:00
Bin Meng
8f60ea0039 x86: spl: Add weak arch_cpu_init_dm()
arch_cpu_init_dm() might not be implemented by every platform.
Implement a weak version for SPL.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-02-07 13:23:36 +08:00
Bin Meng
020a5d4f63 x86: Wrap print_ch() with config option
print_ch() should not be used if DEBUG_UART is off.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-02-07 13:23:07 +08:00
Bin Meng
45ffa122f2 x86: qemu: Add missing DECLARE_GLOBAL_DATA_PTR in e820.c
DECLARE_GLOBAL_DATA_PTR is missing which causes 64-bit build error.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-02-07 13:22:01 +08:00
Simon Glass
fda4eb48e6 x86: link: Add a config for 64-bit U-Boot
Add a new board config which uses 64-bit U-Boot. This is not fully
functional but is it a start. Missing features:

- SDRAM sizing
- Booting linux
- EFI support
- SCSI device init
(and others)

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-02-07 13:16:27 +08:00
Simon Glass
3a03703afc x86: Update compile/link flags to support 64-bit U-Boot
Update config.mk settings to support both 32-bit and 64-bit U-Boot.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-02-07 13:14:54 +08:00
Simon Glass
c17c422854 x86: link: Add build options for SPL
If SPL is used we want to use the generic SPL framework and boot from SPI
via a board-specific means. Add these options to the board config file.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-02-07 13:11:04 +08:00
Simon Glass
6935dc1b7d x86: link: Set up device tree for SPL
Add the correct pre-relocation tag so that the required device tree nodes
are present in the SPL device tree.

On x86 it doesn't make a lot of sense to have a separate SPL device tree.
Since everything is in the same ROM we might as well just use the main
device tree in both SPL and U-Boot proper. But we haven't implemented that,
so this is a good first step.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-02-07 13:10:59 +08:00
Simon Glass
164f0414da x86: link: Add SPL declarations to the binman image
When building for 64-bit we need to put an SPL binary into the image. Update
the binman image description to reflect this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-02-07 13:10:56 +08:00
Simon Glass
19f8b32cea x86: link: Add a text base for 64-bit U-Boot
Set up the 64-bit U-Boot text base if building for that target.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-02-07 13:10:53 +08:00
Simon Glass
c780069f1e x86: Add a dummy setjmp implementation for x86_64
We don't have the code for this yet. Add a dummy version for now, so that
EFI builds correctly.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-02-07 13:10:50 +08:00
Simon Glass
4d3ac6c326 x86: Move setjmp to the i386 directory
This code is only used in 32-bit mode. Move it so that it does not get
built with 64-bit U-Boot.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-02-07 13:07:36 +08:00
Simon Glass
8cfc966c77 x86: Move call64 to the i386 directory
This code is only used in 32-bit mode. Move it so that it does not get
built with 64-bit U-Boot.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-02-07 13:07:33 +08:00
Simon Glass
337705833c x86: Change irq_already_routed to a local variable
This avoids using BSS before SDRAM is set up in SPL.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-02-07 13:07:30 +08:00
Simon Glass
a0c75f9080 x86: Move turbo_state to global_data
To avoid using BSS in SPL before SDRAM is set up, move this field to
global_data.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-02-07 13:07:26 +08:00
Simon Glass
1bff83637f x86: Move pirq_routing_table to global_data
To avoid using BSS in SPL before SDRAM is set up, move this field to
global_data.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-02-07 13:07:23 +08:00
Simon Glass
fa5fcb3bc6 x86: Support jumping from SPL to U-Boot
Add a rough function to handle jumping from 32-bit SPL to 64-bit U-Boot.
This still needs work to clean it up.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-02-06 11:38:46 +08:00
Simon Glass
c2bf0dfaa3 x86: Drop interrupt support in 64-bit mode
This is not currently supported, so drop the code.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-02-06 11:38:46 +08:00
Simon Glass
ca5114f9af x86: Don't try to boot Linux from SPL
Booting into linux from 64-bit U-Boot is not yet supported. Avoid bringing
in the bootm code until it is implemented.

Of course 32-bit U-Boot still supports booting into both 32- and 64-bit
kernels.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-02-06 11:38:46 +08:00
Simon Glass
e1b610b084 x86: Don't build 32-bit efi files on x86_64
These cannot be built in this mode, so drop them.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-02-06 11:38:46 +08:00
Simon Glass
fb355619b2 x86: Don't build cpu files which are not supported on 64-bit
Some files cannot be built with 64-bit and mostly don't make sense in that
context. Disable them.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-02-06 11:38:46 +08:00
Simon Glass
23b89d4d6e x86: Don't build call64 and setjmp on 64-bit
These are currently not supported. Calling 64-bit code from 64-bit U-Boot is
much simpler, so this code is not needed. setjmp() is not yet implemented for
64-bit.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-02-06 11:38:46 +08:00
Simon Glass
05cbd985c0 x86: Don't try to run the VGA BIOS in 64-bit mode
This is not supported, so disable it for now.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-02-06 11:38:46 +08:00
Simon Glass
1b4086307e x86: ivybridge: Provide a dummy SDRAM init for 64-bit
We don't support SDRAM init in 64-bit mode since it is essentially
impossible to get into that mode before SDRAM set up. Provide dummy functions
for now. At some point we will need to pass the SDRAM parameters through from
SPL.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-02-06 11:38:46 +08:00
Simon Glass
45cc9e4cc5 x86: ivybridge: Skip SATA init in SPL
This doesn't work at present. Disable it for now.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-02-06 11:38:46 +08:00
Simon Glass
db357236e3 x86: Fix up type sizes for 64-bit
Adjust types as needed to support 64-bit compilation.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-02-06 11:38:46 +08:00
Simon Glass
4b57414a62 x86: Drop flag_is_changable() on x86_64
This doesn't build at present and is not used in a 64-bit build. Disable it
for now.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-02-06 11:38:46 +08:00
Simon Glass
9097805067 x86: Fix up byteorder.h for x86_64
Remove the very old x86 code and add support for 64-bit.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-02-06 11:38:46 +08:00
Simon Glass
84547b4e66 x86: Add SPL build rules for start-up code
When SPL is used we need to build the 16-bit start-up code. Add Makefile
rules to handle this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-02-06 11:38:46 +08:00
Simon Glass
3c2dd537c7 x86: Add a link script for SPL
If SPL is used it is always build in 32-bit mode. Add a link script to
handle the correct placement of the sections.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-02-06 11:38:46 +08:00
Simon Glass
3742d7a851 x86: Add a link script for 64-bit x86
This needs a different image format from 32-bit x86, so add a new link
script.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-02-06 11:38:46 +08:00
Simon Glass
34722da68a x86: Fix up CONFIG_X86_64 check
When SPL and U-Boot proper have different settings for this flag, we need to
use the correct one. Fix this up in the interrupt code.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-02-06 11:38:46 +08:00
Simon Glass
a160092a61 x86: Support global_data on x86_64
At present this is just an ordinary variable. We may consider making it a
fixed register in the future.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-02-06 11:38:46 +08:00
Simon Glass
93031595ed x86: Add cpu code for x86_64
There is not much needed at present, but set up a separate directory to put
this code as it grows.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-02-06 11:38:46 +08:00
Simon Glass
be059e8813 x86: Move the i386 code into its own directory
Much of the cpu and interrupt code cannot be compiled on 64-bit x86. Move it
into its own directory and build it only in 32-bit mode.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-02-06 11:38:46 +08:00
Simon Glass
4bbc02454f x86: Add an SPL implementation
SPL needs to set up the machine ready for loading 64-bit U-Boot and jumping
to it. Call the existing init routines in order to accomplish this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-02-06 11:38:46 +08:00
Simon Glass
f196bd21be x86: Tidy up use of size_t in relocation
Addresses should not be cast to size_t. Use uintptr_t instead.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-02-06 11:38:46 +08:00
Simon Glass
b50b1633c0 x86: Add support for 64-bit relocation
Add a 64-bit relocation function. SPL loads U-Boot into RAM at a fixed
address and runs it. U-Boot then relocates itself to the top of RAM using
this relocation function.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-02-06 11:38:46 +08:00
Simon Glass
dc7e21339e x86: Refactor relocation to prepare for 64-bit
Move the core relocation code into a separate function so that the checking
code can be used for 64-bit relocation also.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-02-06 11:38:46 +08:00
Simon Glass
6bda55a38c x86: Do relocation before clearing BSS
The BSS region may overlap with relocations. If we clear BSS we will
overwrite the start of the relocation area. This doesn't matter when running
from SPI flash, since it is read-only. But when relocating 64-bit U-Boot
from one place in RAM to another, relocation will fail because some of its
relocations have been zeroed.

To fix this, put the ELF fixup call before the BSS clearing call.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-02-06 11:38:46 +08:00
Simon Glass
fb92308b98 x86: board_r: Set the global data pointer after relocation
Since 'gd' is just a normal variable on 64-bit x86, it is relocated by the
time we get to board_init_r(). The old 'gd' variable is passed in as
parameter to board_init_r(), presumably for this situation.

Assign it on 64-bit x86 so that gd points to the correct data.

Options to improve this:
- Make gd a fixed register and remove the board_init_r() parameter
- Make all archs use this board_init_r() parameter

The second has a TODO in the code. The first has a TODO in a future commit
('x86: Support global_data on x86_64')

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-02-06 11:38:46 +08:00
Simon Glass
4acff45247 board_f/r: Use static const for the init sequences
These tables should be declared static const. Unfortunately the table in
board_r is updated on machines with manual relocation.

Update them.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-02-06 11:38:46 +08:00
Simon Glass
530f27eab5 x86: board_f: Update init sequence for 64-bit startup
Adjust the code so that 64-bit startup works. Since we don't need to do CAR
changes in U-Boot proper anymore (they are done in SPL) we can simplify the
flow and return normally from board_init_f().

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-02-06 11:38:46 +08:00
Simon Glass
dca9220c35 x86: Add 64-bit start-up code
Add code to start up U-Boot in 64-bit mode. It is fairly simple since we are
running from RAM and SPL has done the low-level init.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-02-06 11:38:46 +08:00
Simon Glass
987116f7f6 x86: ivybridge: Allow 32-bit init to move to SPL
Update the Makefile so that some 32-bit init can be built into SPL rather
than U-Boot proper.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-02-06 11:38:46 +08:00
Simon Glass
2eff989585 x86: Use X86_32BIT_INIT instead of X86_RESET_VECTOR
Use this new option to control the location of 32-bit init. This will allow
us to place this in SPL if needed.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-02-06 11:38:46 +08:00
Simon Glass
972188b3a8 x86: Use X86_16BIT_INIT instead of X86_RESET_VECTOR
Use this new option to control the location of 16-bit init. This will allow
us to place this in SPL if needed.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-02-06 11:38:46 +08:00
Simon Glass
13f1dc64fd x86: Kconfig: Add location options for 16/32-bit init
At present all 16/32-bit init is controlled by CONFIG_X86_RESET_VECTOR. If
this is enabled, then U-Boot is the 'first' boot loader and handles execution
from the reset vector through to U-Boot's command prompt. If it is not
enabled then U-Boot starts at the 32-bit entry and skips most of its init,
assuming that the previous boot loader has done this already.

With the move to suport 64-bit operation, we have more cases to consider.
The 16-bit and 32-bit init may be in SPL rather than in U-Boot proper.

Add Kconfig options which control the location of the 16-bit and the 32-bit
init. These are not intended to be user-setting except for experimentation.
Their values should be determined by whether 64-bit U-Boot is used.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-02-06 11:38:46 +08:00
Simon Glass
a66ad67ff2 x86: Add Kconfig options to build 64-bit U-Boot
Add a new CONFIG_X86_64 option which will eventually cause U-Boot to be
built as a 64-bit application, with SPL doing the 16/32-bit init.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-02-06 11:38:46 +08:00
Simon Glass
113e75592a x86: lib: Fix types and casts for 64-bit compilation
Fix various compiler warnings in the x86 library code.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-02-06 11:38:46 +08:00
Simon Glass
beb4d65e92 x86: fsp: Fix cast for 64-bit compilation
Fix a cast in get_next_hob() that causes warnings on 64-bit machines.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-02-06 11:38:46 +08:00
Simon Glass
f9d275b2bd x86: dts: Mark serial as needed before relocation
We almost always need the serial port before relocation, so mark it as such.
This will ensure that it appears in the device tree for SPL, if used.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-02-06 11:38:46 +08:00
Simon Glass
c7ccb2c032 x86: ivybridge: Fix types for 64-bit compilation
Fix a few types that causes warnings on 64-bit machines.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-02-06 11:38:46 +08:00
Simon Glass
8d8f3acda9 x86: ivybridge: Add more debugging for failures
Add various debug() messages in places where errors occur. This aids with
debugging.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-02-06 11:38:46 +08:00
Simon Glass
05af050e9f x86: ivybridge: Declare global data where it is used
Some files are missing this declaration. Add it to avoid build errors when
we actually need the declaration.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-02-06 11:38:46 +08:00
Simon Glass
e71ffd0951 x86: Update mpspec to build on 64-bit machines
At present this uses u32 to store an address. We should use unsigned long
and avoid special types in function return values and parameters unless
necessary. This makes the code more portable.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-02-06 11:38:46 +08:00
Simon Glass
42fd8c19b5 x86: Use unsigned long for address in table generation
We should use unsigned long rather than u32 for addresses. Update this so
that the table-generation code builds correctly on 64-bit machines.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-02-06 11:38:46 +08:00
Simon Glass
0ec28e0266 spl: Don't create a BSS padding when it is separate
When BSS does not immediate follow the SPL image we don't need padding
before the device tree. Remove it in this case.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-02-06 11:38:46 +08:00
Simon Glass
bbe41abf7f spl: Allow PCH drivers to be used in SPL
Add an option for building Platorm Controller Hub drivers in SPL.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-02-06 11:38:46 +08:00
Simon Glass
4a6c81ff42 spl: Allow timer drivers to be used in SPL
Add a new Kconfig option to allow timer drivers to be used in SPL.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-02-06 11:38:46 +08:00
Simon Glass
30bf8a0dae spl: Allow RTC drivers to be used in SPL
Add a new Kconfig option to allow RTC drivers to be used in SPL.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-02-06 11:38:46 +08:00
Simon Glass
2446b6b8f7 spl: Allow PCI drivers to be used in SPL
Add a new Kconfig option to allow PCI drivers to be used in SPL.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-02-06 11:38:46 +08:00
Simon Glass
5e148df952 spl: Allow CPU drivers to be used in SPL
Add a new Kconfig option to allow CPU drivers to be used in SPL.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-02-06 11:38:46 +08:00
Simon Glass
d688bd728f spl: Makefile: Define SPL_ earlier
This Makefile variable can be used in the architecture's main Makefile but
at present it is not set up until later. Set it just before this Makefile is
included.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-02-06 11:38:46 +08:00
Simon Glass
a704490034 spl: spi: Add a debug message if loading fails
This currently fails silently. Add a debug message to aid debugging.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-02-06 11:38:46 +08:00
Simon Glass
b026542946 console: Don't enable CONFIG-CONSOLE_MUX, etc. in SPL
CONFIG_CONSOLE_MUX and CONFIG_SYS_CONSOLE_IS_IN_ENV are not applicable
for SPL. Update the console code to use CONFIG_IS_ENABLED(), so that these
options will be inactive in SPL.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-02-06 11:38:46 +08:00
Andy Shevchenko
7cbaddd4ad x86: Synchronize list of x86 subarchitectures (update bootparam.h)
Basically rename X86_SUBARCH_MRST to X86_SUBARCH_INTEL_MID to be more specific.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-02-06 11:38:46 +08:00
Tom Rini
c83a824e62 Merge git://git.denx.de/u-boot-fsl-qoriq
Signed-off-by: Tom Rini <trini@konsulko.com>

Conflicts:
	configs/ls1046aqds_defconfig
	configs/ls1046aqds_nand_defconfig
	configs/ls1046aqds_qspi_defconfig
	configs/ls1046aqds_sdcard_ifc_defconfig
	configs/ls1046aqds_sdcard_qspi_defconfig
	configs/ls1046ardb_emmc_defconfig
	configs/ls1046ardb_qspi_defconfig
	configs/ls1046ardb_sdcard_defconfig
2017-02-03 20:33:42 -05:00
Prabhakar Kushwaha
add63f94a9 arch: powerpc: update the eLBC IP input clock
eLBC IP clock is always a constant divisor of platform clock
pre-defined per SoC. Clock ratio register (LCRR) used in
current implementation governs eLBC IP output cloc.

Update sys_info->freq_localbus to represent eLBC input clock with
value constant divisor of platform clock.

Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2017-02-03 14:31:45 -08:00
Prabhakar Kushwaha
068789773d arch: powerpc: Move CONFIG_FSL_ELBC to Kconfig
Enable ELBC from Kconfig.

Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2017-02-03 14:31:25 -08:00
Prabhakar Kushwaha
8e63ed518d arch: arm: update the IFC IP input clock
IFC IP clock is always a constant divisor of platform clock
pre-defined per SoC. Clock control register (CCR) used in
current implementation governs IFC IP output clock.

Update sys_info->freq_localbus to represent IFC input clock with
value constant divisor of platform clock.

Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2017-02-03 14:31:19 -08:00
Prabhakar Kushwaha
1c40707e3f arch: powerpc: update the IFC IP input clock
IFC IP clock is always a constant divisor of platform clock
pre-defined per SoC. Clock control register (CCR) used in
current implementation governs IFC IP output clock.

Update sys_info->freq_localbus to represent IFC input clock with
value constant divisor of platform clock.

Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2017-02-03 14:31:11 -08:00
Prabhakar Kushwaha
d98b98d62e arch: powerpc: Move CONFIG_FSL_IFC to Kconfig
Enable IFC from Kconfig.

Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2017-02-03 14:31:02 -08:00
Prabhakar Kushwaha
5b404be671 armv8: ls1012a: Add support of PPA
The PPA implements PSCI which requires for power managment.

Added support of PPA for LS1012AQDS, LS1012ARDB and LS1012AFRDM.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2017-02-03 14:30:47 -08:00
Prabhakar Kushwaha
7d559604d0 board: freescale: ls1012a: Enable secure DDR on LS1012A platforms
PPA binary needs to be relocated on secure DDR, hence marking out
a portion of DDR as secure if CONFIG_SYS_MEM_RESERVE_SECURE flag
is set

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2017-02-03 14:30:28 -08:00
Robert P. J. Day
9b23bafb4f drivers/video/cfb_console.c: Correct "COFNIG_NDS32" typo.
Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
2017-02-03 13:27:23 +01:00
Tom Rini
0ff27d4a94 Merge git://git.denx.de/u-boot-mpc85xx 2017-02-01 16:34:36 -05:00
Tom Rini
43ade93bdb Merge branch 'master' of git://www.denx.de/git/u-boot-imx 2017-02-01 16:34:25 -05:00
Mark Marshall
de8c9317a8 powerpc: mpc5200: Correct return value of memcpy function
The memcpy() function returns a pointer to trg.

Signed-off-by: Mark Marshall <Mark.Marshall@omicron.at>
Reviewed-by: Thomas Graziadei <thomas.graziadei@omicronenergy.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Reviewed-by: York Sun <york.sun@nxp.com>
2017-02-01 08:14:39 -08:00
Tom Rini
f77309d343 Merge git://www.denx.de/git/u-boot-marvell 2017-02-01 06:57:35 -05:00
Mario Six
a1b6b0a9c1 arm: mvebu: Implement secure boot
The patch implements secure booting for the mvebu architecture.

This includes:
- The addition of secure headers and all needed signatures and keys in
  mkimage
- Commands capable of writing the board's efuses to both write the
  needed cryptographic data and enable the secure booting mechanism
- The creation of convenience text files containing the necessary
  commands to write the efuses

The KAK and CSK keys are expected to reside in the files kwb_kak.key and
kwb_csk.key (OpenSSL 2048 bit private keys) in the top-level directory.

Signed-off-by: Reinhard Pfau <reinhard.pfau@gdsys.cc>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Stefan Roese <sr@denx.de>
2017-02-01 09:04:18 +01:00
Mario Six
4991b4f7f1 tools: kwbimage: Refactor line parsing and fix error
The function image_create_config_parse_oneline is pretty complex, and
since more parameters will be added to support secure booting, we
refactor the function to make it more readable.

Also, when a line contained just a keyword without any parameters,
strtok_r returned NULL, which was then indiscriminately fed into atoi,
causing a segfault. To correct this, we add a NULL check before feeding
the extracted token to atoi, and print an error message in case the
token is NULL.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2017-02-01 09:04:11 +01:00
Mario Six
79066ef8c9 tools: kwbimage: Factor out add_binary_header_v1
In preparation of adding the creation of secure headers, we factor the
add_binary_header_v1 function out of the image_create_v1 function.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2017-02-01 09:04:06 +01:00
Mario Six
e93cf53f14 tools: kwbimage: Remove unused parameter
The parameter 'params' of the image_headersz_v1 function is never used
by the function.

Hence, remove it.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2017-02-01 09:03:59 +01:00
Mario Six
e89016c44b tools: kwbimage: Reduce scope of variables
This patch reduces the scope of some variables.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2017-02-01 09:03:54 +01:00
Mario Six
885fba155c tools: kwbimage: Fix arithmetic with void pointers
Arithmetic with void pointers, e.g. a - b where both a and b are void
pointers, is undefined in the C standard. Since we are operating with
byte data here, we switch the void pointers to uint8_t pointers, and add
the necessary casts.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2017-02-01 09:03:48 +01:00
Mario Six
94490a4a70 tools: kwbimage: Fix style violations
Fix some style violations:

- nine instances of missing blank lines after declarations
- one overly long line
- one split string (which also rewords an error message more concisely)
- two superfluous else

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2017-02-01 09:03:41 +01:00
Mario Six
94084eea3b tools: kwbimage: Fix dest addr
To enable secure boot, we need to jump back into the BootROM to continue
the SoC's boot process instead of letting the SPL load and run the main
U-Boot image.

But, since the u-boot-spl.img (including the 64 byte header) is loaded
by the SoC as the main image, we need to compensate for the header
length to get a correct entry point.

Thus, we subtract the header size from the destination address, so that
the execution address points at the actual entry point of the image.

The current boards ignore both parameters anyway, so this change shouldn't
concern them.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2017-02-01 09:03:15 +01:00
Mario Six
7690be35de lib: tpm: Add command to flush resources
This patch adds a function to the TPM library, which allows U-Boot to
flush resources, e.g. keys, from the TPM.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Stefan Roese <sr@denx.de>
2017-02-01 09:02:57 +01:00
Reinhard Pfau
3add68c996 arm: mvebu: spl.c: Remove useless gd declaration
ddaa905 ("arm: mvebu: Add DM (driver model) support") removed the
assignment of the gd pointer, but kept the (now superfluous) declaration
of the gd pointer.

Remove this declaration.

Signed-off-by: Reinhard Pfau <pfau@gdsys.de>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2017-02-01 09:02:49 +01:00
Mario Six
2ad4309441 mvebu: Add board_pex_config()
Allow boards to do some initialization when PCIe comes up.

Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2017-02-01 09:02:14 +01:00
Dirk Eibach
c52d428dcc net: phy: Support Marvell 88E1680
Add support for Marvell 88E1680 Integrated Octal
10/100/1000 Mbps Energy Efficient Ethernet Transceiver.

Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2017-02-01 09:01:46 +01:00
Dirk Eibach
882d3fa6dd pci: mvebu: Fix Armada 38x support
Armada 38x has four PCI ports, not three.

The optimization in pci_init_board() seems to assume that every port has
three lanes. This is obviously wrong, and breaks support for Armada 38x.

Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2017-02-01 09:01:19 +01:00
Stefan Roese
143199081b phy: comphy_a3700: Change SD/MMC compatible DT node to match the updates
Now that the SD/SDIO/MMC DT properties are updated in the Marvell
A3700 and A7/8k DT files, we need to match the checks for compatible
node in the PHY driver as well.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Kostya Porotchkin <kostap@marvell.com>
Cc: Nadav Haklai <nadavh@marvell.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2017-02-01 08:50:42 +01:00
Mark Marshall
2ec70961e7 powerpc: mpc85xx: Use symbolic names for cache control bits
We should use the symbolic names for the cache control bits.

Signed-off-by: Mark Marshall <Mark.Marshall@omicron.at>
Reviewed-by: Thomas Graziadei <thomas.graziadei@omicronenergy.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2017-01-31 17:51:34 -08:00
mario.six@gdsys.cc
dbcb2c0e2b powerpc: mpc83xx: Enable pre-relocation malloc
To enable DM on MPC83xx, we need pre-relocation malloc, which is
implemented in this patch.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
[York S: Fixed compiling warning for unused variable 'i']
Reviewed-by: York Sun <york.sun@nxp.com>
2017-01-31 17:50:35 -08:00
mario.six@gdsys.cc
e80311a5f0 powerpc: mpc83xx: Minimize r1 modification
The r1 register is modified several times during the cache-ram setup of
the MPC83xx SoCs.

Since this SP modification confuses debuggers, we use a general purpose
register to compute the new stack pointer value, and only set the SP
once after all computations are done.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Joakim Tjernlund <Joakim.Tjernlund@infinera.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2017-01-31 09:35:06 -08:00
York Sun
0ae7050c25 armv8: ls1046a: Enable workaround for erratum A-008336
Erratum A-008336 applies to LS1046A per latest SoC document.

Signed-off-by: York Sun <york.sun@nxp.com>
CC: Shengzhou Liu <Shengzhou.Liu@nxp.com>
2017-01-31 09:25:22 -08:00
York Sun
e9866cf759 armv7: ls1021aqds: Set cpo_sample for erratum A-009942
Set cpo_sample as suggested by the driver
"WARN: pls set popts->cpo_sample = 0x58 in <board>/ddr.c to optimize
cpo".

Signed-off-by: York Sun <york.sun@nxp.com>
CC: Shengzhou Liu <Shengzhou.Liu@nxp.com>
2017-01-31 09:25:22 -08:00
Bogdan Purcareata
5707dfb02e drivers: net: fsl-mc: Fixup MAC addresses in DPC
Fixup port_mac_address property in MC DPC with values from the u-boot
environment. Since u-boot already reads the environment MAC addresses
when probing the PHYs, use these values.

The u-boot environment MAC addresses take precedence over any eventual
ones defined in the DPC, except for the case where they are randomly
assigned (no u-boot env value declared for port).

The patch assumes the "/board_info/ports/" node is present in the DPC.

Signed-off-by: Bogdan Purcareata <bogdan.purcareata@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
[York S: Fix several indentations]
Reviewed-by: York Sun <york.sun@nxp.com>
2017-01-31 09:25:21 -08:00
Masahiro Yamada
dd3b64eb56 mmc: atmel: rename CONFIG_ATMEL_SDHCI to CONFIG_MMC_SDHCI_ATMEL
Make the naming scheme consistent; all SDHCI-base drivers prefixed
with CONFIG_MMC_SDHCI_.

While we are here, add "depends on ARCH_AT91".

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-01-31 21:50:47 +09:00
Masahiro Yamada
1b85877060 mmc: pic32: rename CONFIG_PIC32_SDHCI to CONFIG_MMC_SDHCI_PIC32
Make the naming scheme consistent; all SDHCI-base drivers prefixed
with CONFIG_MMC_SDHCI_.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-01-31 21:50:47 +09:00
Masahiro Yamada
360c67d591 mmc: msm: rename CONFIG_MSM_SDHCI to CONFIG_MMC_SDHCI_MSM
Make the naming scheme consistent; all SDHCI-base drivers prefixed
with CONFIG_MMC_SDHCI_.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-01-31 21:50:47 +09:00
Masahiro Yamada
facc805809 mmc: rockchip: rename CONFIG_ROCKCHIP_SDHCI to CONFIG_MMC_SDHCI_ROCKCHIP
Make the naming scheme consistent; all SDHCI-base drivers prefixed
with CONFIG_MMC_SDHCI_.

While we are here, add "depends on ARCH_ROCKCHIP".

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-01-31 21:50:47 +09:00
Masahiro Yamada
08aa0334c6 mmc: zynq: rename CONFIG_ZYNQ_SDHCI to CONFIG_MMC_SDHCI_ZYNQ
Make the naming scheme consistent; all SDHCI-base drivers prefixed
with CONFIG_MMC_SDHCI_.

While we are here, add "depends on ARCH_ZYNQ || ARCH_ZYNQMP".

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-01-31 21:50:47 +09:00
Masahiro Yamada
a5995a5d7b mmc: sandbox: rename CONFIG, fix dependency, and use it in Makefile
[1] Rename CONFIG_SANDBOX_MMC to CONFIG_MMC_SANDBOX for consistency
    I want all MMC driver options prefixed with CONFIG_MMC_.

[2] Fix dependency
    Add necessary depends on to avoid compile error.
    Instead "depends on MMC" is unneeded because this config entry
    resides inside of "if MMC".

[3] Currently, this config symbol is not referenced at all.
    Use it to enable/disable the driver in Makefile.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-01-31 21:50:47 +09:00
Masahiro Yamada
54925327fa mmc: move CONFIG_GENERIC_MMC to Kconfig
Now, CONFIG_GENERIC_MMC seems equivalent to CONFIG_MMC.

Let's create an entry for "config GENERIC_MMC" with "default MMC",
then convert all macro defines in headers to Kconfig.  Almost all
of the defines will go away.

I see only two exceptions:
  configs/blanche_defconfig
  configs/sandbox_noblk_defconfig

They define CONFIG_GENERIC_MMC, but not CONFIG_MMC.  Something
might be wrong with these two boards, so should be checked later.

Anyway, this is the output of the moveconfig tool.

This commit was created as follows:

[1] create a config entry in drivers/mmc/Kconfig

[2] tools/moveconfig.py -r HEAD GENERIC_MMC

[3] manual clean-up of garbage comments in doc/README.* and
    include/configs/*.h

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2017-01-31 21:50:47 +09:00
Lukasz Majewski
11bd5e7b62 BOARD: MCCMON6: Provide support for iMX6q based mccmon6 board
This patch provides u-boot support for Liebherr (LWN) mccmon6 board.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
2017-01-30 16:24:47 +01:00
Patrick Bruenn
355ed4b431 arm: dts: imx53-cx9020: fix packetloss on fec_mxc
The pinmuxing for i.MX53 FEC ethernet copied from
<kernel>/arch/arm/boot/dts/imx53-qsb-common.dtsi (at least until v4.9)
was bad. It is different from the manual pinmuxing in
<u-boot>/board/freescale/mx53loco/mx53loco.c which was used in
cx9020 implementation previously before mainlining into u-boot.
It seems the bug in imx53-qsb kernel device tree is hidden for so long,
because it was never used, by the kernel driver.

Signed-off-by: Patrick Bruenn <p.bruenn@beckhoff.com>
2017-01-30 16:24:19 +01:00
Tang Yuantian
6b91aa4bd8 armv8: ls1046a: enable usb in defconfig
Signed-off-by: Tang Yuantian <yuantian.tang@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2017-01-27 12:47:29 -08:00
Tang Yuantian
272a24fe8d armv8: ls1046a: added usb nodes in dts
The LS1046A processor has three integrated USB 3.0 controllers
(USB1, USB2, and USB3) that allow direct connection to the USB
ports with appropriate protection circuitry and power supplies.
USB1 and USB2 ports are powered by a NX5P2190UK device, which
supplies 5v power at up to 1.2 A. The power enable and
power-fault-detect pins are connected to the LS1046A processor
via CPLD for individual port management.

Signed-off-by: Tang Yuantian <yuantian.tang@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2017-01-27 12:47:10 -08:00
Tang Yuantian
70d3287e0c armv8: ls1046aqds: added usb feature support
The LS1046AQDS processor has three integrated USB 3.0 controllers
(USB1, USB2, and USB3) that allow direct connection to the USB
ports with appropriate protection circuitry and power supplies.
USB1 and USB2 ports are powered by a NX5P2190UK device, which
supplies 5v power at up to 1.2 A. The power enable and
power-fault-detect pins are connected to the LS1046A processor
via CPLD for individual port management.

Signed-off-by: Tang Yuantian <yuantian.tang@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2017-01-27 12:46:44 -08:00
Peng Fan
e389033f72 imx: mx6sxsabreauto: enable more dm drivers
Enable MMC/I2C/GPIO/PMIC/REGULATOR/PCA953X DM drivers
for mx6sxsabreauto board. Drop non-DM code.

Note:
The i.MX DM drivers has such dependency.
  MXC GPIO -> MXC I2C -> PFUZE/REGULATOR
  MXC GPIO -> PCA953X
  MXC GPIO -> FSL_USDHC

So the drivers needs to be enabled all to avoid
compiling error.

The uboot dm tree log:
=> dm tree
 Class       Probed   Name
 ----------------------------------------
  root        [ + ]    root_driver
  thermal     [   ]    |-- imx_thermal
  simple_bus  [ + ]    |-- soc
  simple_bus  [ + ]    |   |-- aips-bus@02000000
  simple_bus  [   ]    |   |   |-- spba-bus@02000000
  gpio        [ + ]    |   |   |-- gpio@0209c000
  gpio        [ + ]    |   |   |-- gpio@020a0000
  gpio        [ + ]    |   |   |-- gpio@020a4000
  gpio        [ + ]    |   |   |-- gpio@020a8000
  gpio        [ + ]    |   |   |-- gpio@020ac000
  gpio        [ + ]    |   |   |-- gpio@020b0000
  gpio        [ + ]    |   |   |-- gpio@020b4000
  simple_bus  [   ]    |   |   |-- anatop@020c8000
  simple_bus  [   ]    |   |   |-- snvs@020cc000
  pinctrl     [ + ]    |   |   `-- iomuxc@020e0000
  pinconfig   [ + ]    |   |       `-- imx6x-sabreauto
  pinconfig   [ + ]    |   |           |-- i2c2grp-1
  pinconfig   [ + ]    |   |           |-- i2c3grp-2
  pinconfig   [   ]    |   |           |-- uart1grp
  pinconfig   [ + ]    |   |           |-- usdhc3grp
  pinconfig   [   ]    |   |           |-- usdhc3grp-100mhz
  pinconfig   [   ]    |   |           |-- usdhc3grp-200mhz
  pinconfig   [ + ]    |   |           |-- usdhc4grp
  pinconfig   [ + ]    |   |           `-- vccsd3grp
  simple_bus  [ + ]    |   |-- aips-bus@02100000
  mmc         [ + ]    |   |   |-- usdhc@02198000
  mmc         [ + ]    |   |   |-- usdhc@0219c000
  i2c         [ + ]    |   |   |-- i2c@021a4000
  i2c_generic [ + ]    |   |   |   |-- generic_8
  i2c_generic [ + ]    |   |   |   `-- generic_4e
  i2c         [ + ]    |   |   `-- i2c@021a8000
  gpio        [ + ]    |   |       |-- gpio@30
  gpio        [ + ]    |   |       `-- gpio@32
  simple_bus  [   ]    |   `-- aips-bus@02200000
  simple_bus  [   ]    |       `-- spba-bus@02200000
  simple_bus  [ + ]    `-- regulators
  regulator   [ + ]        `-- regulator@0

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
2017-01-27 10:53:14 +01:00
Peng Fan
caf2578f65 imx: dts: mx6sxsabreauto: enable i2c2/3
Enable i2c2/3, add pinctrl settings.
Add max7310 for i2c3.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
2017-01-27 10:53:05 +01:00
Peng Fan
689d8f990a imx: mx6sxsabreauto: enable pinctrl driver
Enable pinctrl driver for mx6sxsabreauto board.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
2017-01-27 10:52:53 +01:00
Peng Fan
6301e6570b imx: mx6sx: add dts for mx6sxsabreauto board
Add dts for mx6sxsabreauto board.
dts related files imported fro Linux (commit e5517c2a5a4).

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
2017-01-27 10:52:10 +01:00
Marcin Niestroj
d4b1b52737 ARM: imx6ul: Move liteSOM source to SoC directory
Moving arch/arm/mach-litesom/ to arch/arm/cpu/armv7/mx6/ was requested
in [1] during discussion of chiliSOM support patches.

[1] http://lists.denx.de/pipermail/u-boot/2017-January/279137.html

Suggested-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2017-01-27 10:48:07 +01:00
Breno Lima
5f8c4d4419 udoo_neo: Remove ramdiskaddr environment variable
Remove unused ramdiskaddr environment variable.

Suggested-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Breno Lima <breno.lima@nxp.com>
2017-01-27 10:44:16 +01:00
Breno Lima
d8e13887f6 udoo_neo: Remove trailing semicolon and space
Remove the trailing semicolon and space.
It's not necessary to have it on the last condition.

Suggested-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Breno Lima <breno.lima@nxp.com>
2017-01-27 10:43:43 +01:00
Breno Lima
8df93b1a17 udoo_neo: Add fdt_addr_r environment variable
According to doc/README.distro:
"fdt_addr_r:
Mandatory. The location in RAM where the DTB will be loaded or copied to when
processing the fdtdir/devicetreedir or fdt/devicetree options in
extlinux.conf."

So add the fdt_addr_r environment variable.

Suggested-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Breno Lima <breno.lima@nxp.com>
2017-01-27 10:43:27 +01:00
Stefan Agner
ac0a93fd21 imx_common: check for bmode Serial Downloader
Before commit 81c4eccb55 ("imx: mx6: fix USB bmode to use
reserved value") a non-reserved value has been used to trigger
Serial Downloader using bmode, which translated to a GPR9 value
of 0x10. However, on some boards the non-reserved value lead to
unreliable bmode command. With the above mentioned commit, U-boot
switched to use [7:4] b0001, which translates to GPR9 0x10 for
Serial Downloader mode. Check for the new value and classify it
as Serial Downloader mode.

Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
CC: Stefano Babic <sbabic@denx.de>
CC: Tim Harvey <tharvey@gateworks.com>
CC: Fabio Estevam <Fabio.Estevam@freescale.com>
CC: Eric Nelson <eric.nelson@boundarydevices.com>
2017-01-27 10:40:16 +01:00
Gary Bisson
1c3e62d690 imx: nitrogen6x: fix USB host initialization
USB Host scanning has been broken since v2016.05.

This is due to all the USB changes that happened between v2016.03
and v2016.05, especially:
2ef117fe4f usb: Remove 200 ms delay in usb_hub_port_connect_change()
a22a264ec3 usb: Change power-on / scanning timeout handling

So we need to increase the init delay to 2s using the usb_pgood_delay
environment variable.

Signed-off-by: Gary Bisson <gary.bisson@boundarydevices.com>
2017-01-27 10:38:26 +01:00
Fabio Estevam
7a037cc91f README: mxc_hab: Adapt the CONFIG_SECURE_BOOT text to Kconfig
Commit 6e1f4d2652 ("arm: imx-common: add SECURE_BOOT option to
Kconfig") moved the CONFIG_SECURE_BOOT option to Kconfig, so update
the mxc_hab README file to reflect that.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Gary Bisson <gary.bisson@boundarydevices.com>
2017-01-27 10:34:14 +01:00
Fabio Estevam
565cfcf0e1 mx6qsabreauto: Pass the correct parallel NOR width
On mx6qsabreauto the parallel NOR width is 16 bits, so pass configure
CONFIG_SYS_FLASH_CFI_WIDTH correctly so that the CFI driver does not
use 8 bits by default.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
2017-01-27 10:30:53 +01:00
Martin Kaiser
97f17fa627 tools: imximage: refactor header length calculations for imximage v1
We can use the same header length calculations for both imximage v1 and
v2. This addresses TODO comments about imximage v1 in the current code.

With this patch applied, *header_size_ptr in imximage_set_header() will
have the correct value for both imximage v1 and v2. This is necessary
for people wanting to add proprietary data behind the created imximage.

Signed-off-by: Martin Kaiser <martin@kaiser.cx>
Cc: sbabic@denx.de
2017-01-27 10:27:32 +01:00
1916 changed files with 16788 additions and 7353 deletions

View File

@@ -28,11 +28,12 @@ addons:
- grub-efi-ia32-bin
- rpm2cpio
- wget
- device-tree-compiler
install:
# install latest device tree compiler
- git clone --depth=1 git://git.kernel.org/pub/scm/utils/dtc/dtc.git /tmp/dtc
- make -j4 -C /tmp/dtc
#- git clone --depth=1 git://git.kernel.org/pub/scm/utils/dtc/dtc.git /tmp/dtc
#- make -j4 -C /tmp/dtc
# Clone uboot-test-hooks
- git clone --depth=1 git://github.com/swarren/uboot-test-hooks.git /tmp/uboot-test-hooks
- ln -s travis-ci /tmp/uboot-test-hooks/bin/`hostname`

View File

@@ -308,6 +308,8 @@ config ARCH_FIXUP_FDT_MEMORY
endmenu # Boot images
source "api/Kconfig"
source "common/Kconfig"
source "cmd/Kconfig"
@@ -325,3 +327,5 @@ source "fs/Kconfig"
source "lib/Kconfig"
source "test/Kconfig"
source "scripts/Kconfig"

View File

@@ -5,7 +5,7 @@
VERSION = 2017
PATCHLEVEL = 03
SUBLEVEL =
EXTRAVERSION = -rc1
EXTRAVERSION =
NAME =
# *DOCUMENTATION*
@@ -371,7 +371,7 @@ export ARCH CPU BOARD VENDOR SOC CPUDIR BOARDDIR
export CONFIG_SHELL HOSTCC HOSTCFLAGS HOSTLDFLAGS CROSS_COMPILE AS LD CC
export CPP AR NM LDR STRIP OBJCOPY OBJDUMP
export MAKE AWK PERL PYTHON
export HOSTCXX HOSTCXXFLAGS DTC CHECK CHECKFLAGS
export HOSTCXX HOSTCXXFLAGS CHECK CHECKFLAGS DTC DTC_FLAGS
export KBUILD_CPPFLAGS NOSTDINC_FLAGS UBOOTINCLUDE OBJCOPYFLAGS LDFLAGS
export KBUILD_CFLAGS KBUILD_AFLAGS
@@ -482,6 +482,13 @@ else
# Build targets only - this includes vmlinux, arch specific targets, clean
# targets and others. In general all targets except *config targets.
# Additional helpers built in scripts/
# Carefully list dependencies so we do not try to build scripts twice
# in parallel
PHONY += scripts
scripts: scripts_basic include/config/auto.conf
$(Q)$(MAKE) $(build)=$(@)
ifeq ($(dot-config),1)
# Read in config
-include include/config/auto.conf
@@ -829,6 +836,10 @@ cmd_pad_cat = $(cmd_objcopy) && $(append) || rm -f $@
cfg: u-boot.cfg
quiet_cmd_cfgcheck = CFGCHK $2
cmd_cfgcheck = $(srctree)/scripts/check-config.sh $2 \
$(srctree)/scripts/config_whitelist.txt $(srctree)
all: $(ALL-y)
ifeq ($(CONFIG_DM_I2C_COMPAT)$(CONFIG_SANDBOX),y)
@echo "===================== WARNING ======================"
@@ -840,8 +851,7 @@ endif
@# Check that this build does not use CONFIG options that we do not
@# know about unless they are in Kconfig. All the existing CONFIG
@# options are whitelisted, so new ones should not be added.
$(srctree)/scripts/check-config.sh u-boot.cfg \
$(srctree)/scripts/config_whitelist.txt ${srctree} 1>&2
$(call cmd,cfgcheck,u-boot.cfg)
PHONY += dtbs
dtbs: dts/dt.dtb
@@ -883,7 +893,7 @@ u-boot.hex u-boot.srec: u-boot FORCE
$(call if_changed,objcopy)
OBJCOPYFLAGS_u-boot-nodtb.bin := -O binary \
$(if $(CONFIG_X86_RESET_VECTOR),-R .start16 -R .resetvec)
$(if $(CONFIG_X86_16BIT_INIT),-R .start16 -R .resetvec)
binary_size_check: u-boot-nodtb.bin FORCE
@file_size=$(shell wc -c u-boot-nodtb.bin | awk '{print $$1}') ; \
@@ -957,7 +967,8 @@ MKIMAGEFLAGS_u-boot.kwb = -n $(srctree)/$(CONFIG_SYS_KWD_CONFIG:"%"=%) \
-T kwbimage -a $(CONFIG_SYS_TEXT_BASE) -e $(CONFIG_SYS_TEXT_BASE)
MKIMAGEFLAGS_u-boot-spl.kwb = -n $(srctree)/$(CONFIG_SYS_KWD_CONFIG:"%"=%) \
-T kwbimage -a $(CONFIG_SYS_TEXT_BASE) -e $(CONFIG_SYS_TEXT_BASE)
-T kwbimage -a $(CONFIG_SYS_TEXT_BASE) -e $(CONFIG_SYS_TEXT_BASE) \
$(if $(KEYDIR),-k $(KEYDIR))
MKIMAGEFLAGS_u-boot.pbl = -n $(srctree)/$(CONFIG_SYS_FSL_PBL_RCW:"%"=%) \
-R $(srctree)/$(CONFIG_SYS_FSL_PBL_PBI:"%"=%) -T pblimage
@@ -1076,8 +1087,9 @@ quiet_cmd_ldr = LD $@
cmd_ldr = $(LD) $(LDFLAGS_$(@F)) \
$(filter-out FORCE,$^) -o $@
u-boot.rom: u-boot-x86-16bit.bin u-boot.bin FORCE \
$(if $(CONFIG_HAVE_REFCODE),refcode.bin)
u-boot.rom: u-boot-x86-16bit.bin u-boot.bin \
$(if $(CONFIG_SPL_X86_16BIT_INIT),spl/u-boot-spl.bin) \
$(if $(CONFIG_HAVE_REFCODE),refcode.bin) FORCE
$(call if_changed,binman)
OBJCOPYFLAGS_u-boot-x86-16bit.bin := -O binary -j .start16 -j .resetvec
@@ -1416,7 +1428,7 @@ CLEAN_DIRS += $(MODVERDIR) \
$(foreach d, spl tpl, $(patsubst %,$d/%, \
$(filter-out include, $(shell ls -1 $d 2>/dev/null))))
CLEAN_FILES += include/bmp_logo.h include/bmp_logo_data.h include/license.h \
CLEAN_FILES += include/bmp_logo.h include/bmp_logo_data.h \
boot* u-boot* MLO* SPL System.map
# Directories & files removed with 'make mrproper'
@@ -1537,11 +1549,6 @@ tests:
$(Q)$(MAKE) $(build)=scripts build_docproc
$(Q)$(MAKE) $(build)=doc/DocBook $@
# Dummies...
PHONY += prepare scripts
prepare: ;
scripts: ;
endif #ifeq ($(config-targets),1)
endif #ifeq ($(mixed-targets),1)

52
README
View File

@@ -504,6 +504,12 @@ The following options need to be configured:
CONFIG_SYS_FSL_IFC_LE
Defines the IFC controller register space as Little Endian
CONFIG_SYS_FSL_IFC_CLK_DIV
Defines divider of platform clock(clock input to IFC controller).
CONFIG_SYS_FSL_LBC_CLK_DIV
Defines divider of platform clock(clock input to eLBC controller).
CONFIG_SYS_FSL_PBL_PBI
It enables addition of RCW (Power on reset configuration) in built image.
Please refer doc/README.pblimage for more details
@@ -594,21 +600,6 @@ The following options need to be configured:
Thumb2 this flag will result in Thumb2 code generated by
GCC.
CONFIG_ARM_ERRATA_716044
CONFIG_ARM_ERRATA_742230
CONFIG_ARM_ERRATA_743622
CONFIG_ARM_ERRATA_751472
CONFIG_ARM_ERRATA_761320
CONFIG_ARM_ERRATA_773022
CONFIG_ARM_ERRATA_774769
CONFIG_ARM_ERRATA_794072
If set, the workarounds for these ARM errata are applied early
during U-Boot startup. Note that these options force the
workarounds to be applied; no CPU-type/version detection
exists, unlike the similar options in the Linux kernel. Do not
set these options unless they apply!
COUNTER_FREQUENCY
Generic timer clock source frequency.
@@ -617,15 +608,6 @@ The following options need to be configured:
different from COUNTER_FREQUENCY, and can only be determined
at run time.
NOTE: The following can be machine specific errata. These
do have ability to provide rudimentary version and machine
specific checks, but expect no product checks.
CONFIG_ARM_ERRATA_430973
CONFIG_ARM_ERRATA_454179
CONFIG_ARM_ERRATA_621766
CONFIG_ARM_ERRATA_798870
CONFIG_ARM_ERRATA_801819
- Tegra SoC options:
CONFIG_TEGRA_SUPPORT_NON_SECURE
@@ -1457,9 +1439,6 @@ The following options need to be configured:
CONFIG_SH_MMCIF_CLK
Define the clock frequency for MMCIF
CONFIG_GENERIC_MMC
Enable the generic MMC driver
CONFIG_SUPPORT_EMMC_BOOT
Enable some additional features of the eMMC boot partitions.
@@ -1768,12 +1747,6 @@ The following options need to be configured:
can be displayed via the splashscreen support or the
bmp command.
- Do compressing for memory range:
CONFIG_CMD_ZIP
If this option is set, it would use zlib deflate method
to compress the specified memory at its best effort.
- Compression support:
CONFIG_GZIP
@@ -2783,19 +2756,6 @@ The following options need to be configured:
this is instead controlled by the value of
/config/load-environment.
- Parallel Flash support:
CONFIG_SYS_NO_FLASH
Traditionally U-Boot was run on systems with parallel NOR
flash. This option is used to disable support for parallel NOR
flash. This option should be defined if the board does not have
parallel flash.
If this option is not defined one of the generic flash drivers
(e.g. CONFIG_FLASH_CFI_DRIVER or CONFIG_ST_SMI) must be
selected or the board must provide an implementation of the
flash API (see include/flash.h).
- DataFlash Support:
CONFIG_HAS_DATAFLASH

9
api/Kconfig Normal file
View File

@@ -0,0 +1,9 @@
menu "API"
config API
bool "Enable U-Boot API"
default n
help
This option enables the U-Boot API. See api/README for more information.
endmenu

View File

@@ -19,6 +19,72 @@ config HAS_VBAR
config HAS_THUMB2
bool
# If set, the workarounds for these ARM errata are applied early during U-Boot
# startup. Note that in general these options force the workarounds to be
# applied; no CPU-type/version detection exists, unlike the similar options in
# the Linux kernel. Do not set these options unless they apply! Also note that
# the following can be machine specific errata. These do have ability to
# provide rudimentary version and machine specific checks, but expect no
# product checks:
# CONFIG_ARM_ERRATA_430973
# CONFIG_ARM_ERRATA_454179
# CONFIG_ARM_ERRATA_621766
# CONFIG_ARM_ERRATA_798870
# CONFIG_ARM_ERRATA_801819
config ARM_ERRATA_430973
bool
config ARM_ERRATA_454179
bool
config ARM_ERRATA_621766
bool
config ARM_ERRATA_716044
bool
config ARM_ERRATA_742230
bool
config ARM_ERRATA_743622
bool
config ARM_ERRATA_751472
bool
config ARM_ERRATA_761320
bool
config ARM_ERRATA_773022
bool
config ARM_ERRATA_774769
bool
config ARM_ERRATA_794072
bool
config ARM_ERRATA_798870
bool
config ARM_ERRATA_801819
bool
config ARM_ERRATA_826974
bool
config ARM_ERRATA_828024
bool
config ARM_ERRATA_829520
bool
config ARM_ERRATA_833069
bool
config ARM_ERRATA_833471
bool
config CPU_ARM720T
bool
select SYS_CACHE_SHIFT_5
@@ -569,16 +635,56 @@ config TARGET_MX53SMD
config OMAP34XX
bool "OMAP34XX SoC"
select ARCH_OMAP2
select ARM_ERRATA_430973
select ARM_ERRATA_454179
select ARM_ERRATA_621766
select USE_TINY_PRINTF
imply SPL_EXT_SUPPORT
imply SPL_FAT_SUPPORT
imply SPL_GPIO_SUPPORT
imply SPL_I2C_SUPPORT
imply SPL_LIBCOMMON_SUPPORT
imply SPL_LIBDISK_SUPPORT
imply SPL_LIBGENERIC_SUPPORT
imply SPL_MMC_SUPPORT
imply SPL_NAND_SUPPORT
imply SPL_POWER_SUPPORT
imply SPL_SERIAL_SUPPORT
config OMAP44XX
bool "OMAP44XX SoC"
select ARCH_OMAP2
select USE_TINY_PRINTF
imply SPL_DISPLAY_PRINT
imply SPL_EXT_SUPPORT
imply SPL_FAT_SUPPORT
imply SPL_GPIO_SUPPORT
imply SPL_I2C_SUPPORT
imply SPL_LIBCOMMON_SUPPORT
imply SPL_LIBDISK_SUPPORT
imply SPL_LIBGENERIC_SUPPORT
imply SPL_MMC_SUPPORT
imply SPL_NAND_SUPPORT
imply SPL_POWER_SUPPORT
imply SPL_SERIAL_SUPPORT
config OMAP54XX
bool "OMAP54XX SoC"
select ARCH_OMAP2
select ARM_ERRATA_798870
imply SPL_DISPLAY_PRINT
imply SPL_ENV_SUPPORT
imply SPL_EXT_SUPPORT
imply SPL_FAT_SUPPORT
imply SPL_GPIO_SUPPORT
imply SPL_I2C_SUPPORT
imply SPL_LIBCOMMON_SUPPORT
imply SPL_LIBDISK_SUPPORT
imply SPL_LIBGENERIC_SUPPORT
imply SPL_MMC_SUPPORT
imply SPL_NAND_SUPPORT
imply SPL_POWER_SUPPORT
imply SPL_SERIAL_SUPPORT
config AM43XX
bool "AM43XX SoC"
@@ -633,6 +739,7 @@ config ARCH_SOCFPGA
select ENABLE_ARM_SOC_BOOT0_HOOK
select ARCH_EARLY_INIT_R
select ARCH_MISC_INIT
select SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
config TARGET_CM_T43
bool "Support cm_t43"
@@ -1032,8 +1139,6 @@ source "arch/arm/mach-keystone/Kconfig"
source "arch/arm/mach-kirkwood/Kconfig"
source "arch/arm/mach-litesom/Kconfig"
source "arch/arm/mach-mvebu/Kconfig"
source "arch/arm/cpu/armv7/ls102xa/Kconfig"

View File

@@ -59,7 +59,6 @@ machine-$(CONFIG_ARCH_HIGHBANK) += highbank
machine-$(CONFIG_ARCH_KEYSTONE) += keystone
# TODO: rename CONFIG_KIRKWOOD -> CONFIG_ARCH_KIRKWOOD
machine-$(CONFIG_KIRKWOOD) += kirkwood
machine-$(CONFIG_LITESOM) += litesom
machine-$(CONFIG_ARCH_MESON) += meson
machine-$(CONFIG_ARCH_MVEBU) += mvebu
# TODO: rename CONFIG_TEGRA -> CONFIG_ARCH_TEGRA

View File

@@ -19,10 +19,6 @@ DECLARE_GLOBAL_DATA_PTR;
void get_sys_info(struct sys_info *sys_info)
{
struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
#ifdef CONFIG_FSL_IFC
struct fsl_ifc ifc_regs = {(void *)CONFIG_SYS_IFC_ADDR, (void *)NULL};
u32 ccr;
#endif
struct ccsr_clk *clk = (void *)(CONFIG_SYS_FSL_LS1_CLK_ADDR);
unsigned int cpu;
const u8 core_cplx_pll[6] = {
@@ -74,10 +70,7 @@ void get_sys_info(struct sys_info *sys_info)
}
#if defined(CONFIG_FSL_IFC)
ccr = in_be32(&ifc_regs.gregs->ifc_ccr);
ccr = ((ccr & IFC_CCR_CLK_DIV_MASK) >> IFC_CCR_CLK_DIV_SHIFT) + 1;
sys_info->freq_localbus = sys_info->freq_systembus / ccr;
sys_info->freq_localbus = sys_info->freq_systembus;
#endif
}

View File

@@ -3,6 +3,10 @@ if ARCH_MX6
config MX6
bool
default y
select ARM_ERRATA_743622 if !MX6UL
select ARM_ERRATA_751472 if !MX6UL
select ARM_ERRATA_761320 if !MX6UL
select ARM_ERRATA_794072 if !MX6UL
config MX6D
bool
@@ -35,6 +39,13 @@ config MX6UL
select ROM_UNIFIED_SECTIONS
bool
config MX6UL_LITESOM
bool
select MX6UL
select DM
select DM_THERMAL
select SUPPORT_SPL
config MX6ULL
bool
select MX6UL
@@ -125,6 +136,10 @@ config TARGET_KOSAGI_NOVENA
select BOARD_LATE_INIT
select SUPPORT_SPL
config TARGET_MCCMON6
bool "mccmon6"
select SUPPORT_SPL
config TARGET_MX6CUBOXI
bool "Solid-run mx6 boards"
select BOARD_LATE_INIT
@@ -248,7 +263,7 @@ config TARGET_PICO_IMX6UL
config TARGET_LITEBOARD
bool "Grinn liteBoard (i.MX6UL)"
select BOARD_LATE_INIT
select LITESOM
select MX6UL_LITESOM
config TARGET_PLATINUM_PICON
bool "platinum-picon"
@@ -361,6 +376,7 @@ source "board/phytec/pcm058/Kconfig"
source "board/gateworks/gw_ventana/Kconfig"
source "board/kosagi/novena/Kconfig"
source "board/samtec/vining_2000/Kconfig"
source "board/liebherr/mccmon6/Kconfig"
source "board/seco/Kconfig"
source "board/solidrun/mx6cuboxi/Kconfig"
source "board/technexion/pico-imx6ul/Kconfig"

View File

@@ -10,3 +10,4 @@
obj-y := soc.o clock.o
obj-$(CONFIG_SPL_BUILD) += ddr.o
obj-$(CONFIG_MP) += mp.o
obj-$(CONFIG_MX6UL_LITESOM) += litesom.o

View File

@@ -1463,7 +1463,7 @@ void select_ldb_di_clock_source(enum ldb_di_clock clk)
}
#endif
#ifndef CONFIG_SYS_NO_FLASH
#ifdef CONFIG_MTD_NOR_FLASH
void enable_eim_clk(unsigned char enable)
{
u32 reg;

View File

@@ -34,6 +34,7 @@ config ARCH_LS1046A
select SYS_FSL_DDR
select SYS_FSL_DDR_BE
select SYS_FSL_DDR_VER_50
select SYS_FSL_ERRATUM_A008336
select SYS_FSL_ERRATUM_A008511
select SYS_FSL_ERRATUM_A009801
select SYS_FSL_ERRATUM_A009803
@@ -48,6 +49,10 @@ config ARCH_LS1046A
config ARCH_LS2080A
bool
select ARMV8_SET_SMPEN
select ARM_ERRATA_826974
select ARM_ERRATA_828024
select ARM_ERRATA_829520
select ARM_ERRATA_833471
select FSL_LSCH3
select SYS_FSL_DDR
select SYS_FSL_DDR_LE

View File

@@ -22,10 +22,6 @@ DECLARE_GLOBAL_DATA_PTR;
void get_sys_info(struct sys_info *sys_info)
{
struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
#ifdef CONFIG_FSL_IFC
struct fsl_ifc ifc_regs = {(void *)CONFIG_SYS_IFC_ADDR, (void *)NULL};
u32 ccr;
#endif
#if (defined(CONFIG_FSL_ESDHC) &&\
defined(CONFIG_FSL_ESDHC_USE_PERIPHERAL_CLK)) ||\
defined(CONFIG_SYS_DPAA_FMAN)
@@ -156,10 +152,8 @@ void get_sys_info(struct sys_info *sys_info)
#endif
#if defined(CONFIG_FSL_IFC)
ccr = ifc_in32(&ifc_regs.gregs->ifc_ccr);
ccr = ((ccr & IFC_CCR_CLK_DIV_MASK) >> IFC_CCR_CLK_DIV_SHIFT) + 1;
sys_info->freq_localbus = sys_info->freq_systembus / ccr;
sys_info->freq_localbus = sys_info->freq_systembus /
CONFIG_SYS_FSL_IFC_CLK_DIV;
#endif
}

View File

@@ -26,10 +26,6 @@ DECLARE_GLOBAL_DATA_PTR;
void get_sys_info(struct sys_info *sys_info)
{
struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
#ifdef CONFIG_FSL_IFC
struct fsl_ifc ifc_regs = {(void *)CONFIG_SYS_IFC_ADDR, (void *)NULL};
u32 ccr;
#endif
struct ccsr_clk_cluster_group __iomem *clk_grp[2] = {
(void *)(CONFIG_SYS_FSL_CH3_CLK_GRPA_ADDR),
(void *)(CONFIG_SYS_FSL_CH3_CLK_GRPB_ADDR)
@@ -128,10 +124,8 @@ void get_sys_info(struct sys_info *sys_info)
}
#if defined(CONFIG_FSL_IFC)
ccr = ifc_in32(&ifc_regs.gregs->ifc_ccr);
ccr = ((ccr & IFC_CCR_CLK_DIV_MASK) >> IFC_CCR_CLK_DIV_SHIFT) + 1;
sys_info->freq_localbus = sys_info->freq_systembus / ccr;
sys_info->freq_localbus = sys_info->freq_systembus /
CONFIG_SYS_FSL_IFC_CLK_DIV;
#endif
}

View File

@@ -36,7 +36,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
rk3288-rock2-square.dtb \
rk3288-evb.dtb \
rk3288-fennec.dtb \
rk3288-miniarm.dtb \
rk3288-tinker.dtb \
rk3288-popmetal.dtb \
rk3399-evb.dtb
dtb-$(CONFIG_ARCH_MESON) += \
@@ -315,14 +315,15 @@ dtb-$(CONFIG_MX6) += imx6ull-14x14-evk.dtb \
imx6dl-icore-rqs.dtb \
imx6q-icore.dtb \
imx6q-icore-rqs.dtb \
imx6sx-sabreauto.dtb \
imx6ul-geam-kit.dtb
dtb-$(CONFIG_MX7) += imx7-colibri.dtb
dtb-$(CONFIG_SOC_KEYSTONE) += k2hk-evm.dtb \
k2l-evm.dtb \
k2e-evm.dtb \
k2g-evm.dtb
dtb-$(CONFIG_SOC_KEYSTONE) += keystone-k2hk-evm.dtb \
keystone-k2l-evm.dtb \
keystone-k2e-evm.dtb \
keystone-k2g-evm.dtb
dtb-$(CONFIG_TARGET_SAMA5D2_XPLAINED) += \
at91-sama5d2_xplained.dtb

View File

@@ -67,7 +67,7 @@
ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>;
ti,tx-internal-delay = <DP83867_RGMIIDCTL_250_PS>;
ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>;
ti,min-output-imepdance;
ti,min-output-impedance;
};
dp83867_1: ethernet-phy@3 {
@@ -75,6 +75,6 @@
ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>;
ti,tx-internal-delay = <DP83867_RGMIIDCTL_250_PS>;
ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>;
ti,min-output-imepdance;
ti,min-output-impedance;
};
};

View File

@@ -19,14 +19,6 @@
};
aliases {
i2c0 = "/i2c@13860000";
i2c1 = "/i2c@13870000";
i2c2 = "/i2c@13880000";
i2c3 = "/i2c@13890000";
i2c4 = "/i2c@138a0000";
i2c5 = "/i2c@138b0000";
i2c6 = "/i2c@138c0000";
i2c7 = "/i2c@138d0000";
serial0 = "/serial@13800000";
console = "/serial@13820000";
mmc0 = "/sdhci@12510000";
@@ -122,3 +114,145 @@
status = "disabled";
};
};
&i2c_5 {
clock-frequency = <100000>;
status = "okay";
max8997-pmic@66 {
compatible = "maxim,max8997";
reg = <0x66 0 0>;
voltage-regulators {
valive_reg: LDO2 {
regulator-name = "VALIVE_1.1V_C210";
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1100000>;
regulator-always-on;
};
vusb_reg: LDO3 {
regulator-name = "VUSB_1.1V_C210";
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1100000>;
};
vmipi_reg: LDO4 {
regulator-name = "VMIPI_1.8V";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
vpda_reg: LDO6 {
regulator-name = "VCC_1.8V_PDA";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
};
vcam_reg: LDO7 {
regulator-name = "CAM_ISP_1.8V";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
vusbdac_reg: LDO8 {
regulator-name = "VUSB+VDAC_3.3V_C210";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
vccpda_reg: LDO9 {
regulator-name = "VCC_2.8V_PDA";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
regulator-always-on;
};
vpll_reg: LDO10 {
regulator-name = "VPLL_1.1V_C210";
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1100000>;
regulator-always-on;
};
vtcam_reg: LDO12 {
regulator-name = "VT_CAM_1.8V";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
vcclcd_reg: LDO13 {
regulator-name = "VCC_3.3V_LCD";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
vlcd_reg: LDO15 {
regulator-name = "VLCD_2.2V";
regulator-min-microvolt = <2200000>;
regulator-max-microvolt = <2200000>;
};
camsensor_reg: LDO16 {
regulator-name = "CAM_SENSOR_IO_1.8V";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
vddq_reg: LDO21 {
regulator-name = "VDDQ_M1M2_1.2V";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-always-on;
};
varm_breg: BUCK1 {
/*
* HACK: The real name is VARM_1.2V_C210,
* but exynos-cpufreq does not support
* DT-based regulator lookup yet.
*/
regulator-name = "vdd_arm";
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <1350000>;
regulator-always-on;
};
vint_breg: BUCK2 {
regulator-name = "VINT_1.1V_C210";
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <1100000>;
regulator-always-on;
};
camisp_breg: BUCK4 {
regulator-name = "CAM_ISP_CORE_1.2V";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
};
vmem_breg: BUCK5 {
regulator-name = "VMEM_1.2V_C210";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-always-on;
};
vccsub_breg: BUCK7 {
regulator-name = "VCC_SUB_2.0V";
regulator-min-microvolt = <2000000>;
regulator-max-microvolt = <2000000>;
regulator-always-on;
};
safe1_sreg: ESAFEOUT1 {
regulator-name = "SAFEOUT1";
};
safe2_sreg: ESAFEOUT2 {
regulator-name = "SAFEOUT2";
regulator-boot-on;
};
};
};
};

View File

@@ -217,6 +217,27 @@
status = "disabled";
};
usb0: usb@2f00000 {
compatible = "fsl,layerscape-dwc3";
reg = <0x0 0x2f00000 0x0 0x10000>;
interrupts = <0 60 4>;
dr_mode = "host";
};
usb1: usb@3000000 {
compatible = "fsl,layerscape-dwc3";
reg = <0x0 0x3000000 0x0 0x10000>;
interrupts = <0 61 4>;
dr_mode = "host";
};
usb2: usb@3100000 {
compatible = "fsl,layerscape-dwc3";
reg = <0x0 0x3100000 0x0 0x10000>;
interrupts = <0 63 4>;
dr_mode = "host";
};
pcie@3400000 {
compatible = "fsl,ls-pcie", "snps,dw-pcie";
reg = <0x00 0x03400000 0x0 0x80000 /* dbi registers */

View File

@@ -114,16 +114,16 @@
MX53_PAD_SD2_CMD__ESDHC2_CMD 0x1d5
MX53_PAD_SD2_CLK__ESDHC2_CLK 0x1d5
MX53_PAD_FEC_MDC__FEC_MDC 0x80000000
MX53_PAD_FEC_MDIO__FEC_MDIO 0x80000000
MX53_PAD_FEC_REF_CLK__FEC_TX_CLK 0x80000000
MX53_PAD_FEC_RX_ER__FEC_RX_ER 0x80000000
MX53_PAD_FEC_CRS_DV__FEC_RX_DV 0x80000000
MX53_PAD_FEC_RXD1__FEC_RDATA_1 0x80000000
MX53_PAD_FEC_RXD0__FEC_RDATA_0 0x80000000
MX53_PAD_FEC_TX_EN__FEC_TX_EN 0x80000000
MX53_PAD_FEC_TXD1__FEC_TDATA_1 0x80000000
MX53_PAD_FEC_TXD0__FEC_TDATA_0 0x80000000
MX53_PAD_FEC_MDC__FEC_MDC 0x4
MX53_PAD_FEC_MDIO__FEC_MDIO 0x1fc
MX53_PAD_FEC_REF_CLK__FEC_TX_CLK 0x180
MX53_PAD_FEC_RX_ER__FEC_RX_ER 0x180
MX53_PAD_FEC_CRS_DV__FEC_RX_DV 0x180
MX53_PAD_FEC_RXD1__FEC_RDATA_1 0x180
MX53_PAD_FEC_RXD0__FEC_RDATA_0 0x180
MX53_PAD_FEC_TX_EN__FEC_TX_EN 0x4
MX53_PAD_FEC_TXD1__FEC_TDATA_1 0x4
MX53_PAD_FEC_TXD0__FEC_TDATA_0 0x4
MX53_PAD_CSI0_DAT8__I2C1_SDA 0x400001ec
MX53_PAD_CSI0_DAT9__I2C1_SCL 0x400001ec

File diff suppressed because it is too large Load Diff

View File

@@ -0,0 +1,188 @@
/*
* Copyright (C) 2014 Freescale Semiconductor, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
/dts-v1/;
#include "imx6sx.dtsi"
/ {
model = "Freescale i.MX6 SoloX Sabre Auto Board";
compatible = "fsl,imx6sx-sabreauto", "fsl,imx6sx";
memory {
reg = <0x80000000 0x80000000>;
};
regulators {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
vcc_sd3: regulator@0 {
compatible = "regulator-fixed";
reg = <0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_vcc_sd3>;
regulator-name = "VCC_SD3";
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
gpio = <&gpio2 11 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
};
};
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1>;
status = "okay";
};
&usdhc3 {
pinctrl-names = "default", "state_100mhz", "state_200mhz";
pinctrl-0 = <&pinctrl_usdhc3>;
pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
bus-width = <8>;
cd-gpios = <&gpio7 10 GPIO_ACTIVE_LOW>;
wp-gpios = <&gpio3 19 GPIO_ACTIVE_HIGH>;
keep-power-in-suspend;
wakeup-source;
vmmc-supply = <&vcc_sd3>;
status = "okay";
};
&usdhc4 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc4>;
bus-width = <8>;
cd-gpios = <&gpio7 11 GPIO_ACTIVE_LOW>;
no-1-8-v;
keep-power-in-suspend;
wakeup-source;
status = "okay";
};
&i2c2 {
clock-frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c2_1>;
status = "okay";
};
&i2c3 {
clock-frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c3_2>;
status = "okay";
max7310_a: gpio@30 {
compatible = "maxim,max7310";
reg = <0x30>;
gpio-controller;
#gpio-cells = <2>;
};
max7310_b: gpio@32 {
compatible = "maxim,max7310";
reg = <0x32>;
gpio-controller;
#gpio-cells = <2>;
};
};
&iomuxc {
imx6x-sabreauto {
pinctrl_i2c2_1: i2c2grp-1 {
fsl,pins = <
MX6SX_PAD_GPIO1_IO03__I2C2_SDA 0x4001b8b1
MX6SX_PAD_GPIO1_IO02__I2C2_SCL 0x4001b8b1
>;
};
pinctrl_i2c3_2: i2c3grp-2 {
fsl,pins = <
MX6SX_PAD_KEY_ROW4__I2C3_SDA 0x4001b8b1
MX6SX_PAD_KEY_COL4__I2C3_SCL 0x4001b8b1
>;
};
pinctrl_uart1: uart1grp {
fsl,pins = <
MX6SX_PAD_GPIO1_IO04__UART1_TX 0x1b0b1
MX6SX_PAD_GPIO1_IO05__UART1_RX 0x1b0b1
>;
};
pinctrl_usdhc3: usdhc3grp {
fsl,pins = <
MX6SX_PAD_SD3_CMD__USDHC3_CMD 0x17059
MX6SX_PAD_SD3_CLK__USDHC3_CLK 0x10059
MX6SX_PAD_SD3_DATA0__USDHC3_DATA0 0x17059
MX6SX_PAD_SD3_DATA1__USDHC3_DATA1 0x17059
MX6SX_PAD_SD3_DATA2__USDHC3_DATA2 0x17059
MX6SX_PAD_SD3_DATA3__USDHC3_DATA3 0x17059
MX6SX_PAD_SD3_DATA4__USDHC3_DATA4 0x17059
MX6SX_PAD_SD3_DATA5__USDHC3_DATA5 0x17059
MX6SX_PAD_SD3_DATA6__USDHC3_DATA6 0x17059
MX6SX_PAD_SD3_DATA7__USDHC3_DATA7 0x17059
MX6SX_PAD_KEY_COL0__GPIO2_IO_10 0x17059 /* CD */
MX6SX_PAD_KEY_ROW0__GPIO2_IO_15 0x17059 /* WP */
>;
};
pinctrl_usdhc3_100mhz: usdhc3grp-100mhz {
fsl,pins = <
MX6SX_PAD_SD3_CMD__USDHC3_CMD 0x170b9
MX6SX_PAD_SD3_CLK__USDHC3_CLK 0x100b9
MX6SX_PAD_SD3_DATA0__USDHC3_DATA0 0x170b9
MX6SX_PAD_SD3_DATA1__USDHC3_DATA1 0x170b9
MX6SX_PAD_SD3_DATA2__USDHC3_DATA2 0x170b9
MX6SX_PAD_SD3_DATA3__USDHC3_DATA3 0x170b9
MX6SX_PAD_SD3_DATA4__USDHC3_DATA4 0x170b9
MX6SX_PAD_SD3_DATA5__USDHC3_DATA5 0x170b9
MX6SX_PAD_SD3_DATA6__USDHC3_DATA6 0x170b9
MX6SX_PAD_SD3_DATA7__USDHC3_DATA7 0x170b9
>;
};
pinctrl_usdhc3_200mhz: usdhc3grp-200mhz {
fsl,pins = <
MX6SX_PAD_SD3_CMD__USDHC3_CMD 0x170f9
MX6SX_PAD_SD3_CLK__USDHC3_CLK 0x100f9
MX6SX_PAD_SD3_DATA0__USDHC3_DATA0 0x170f9
MX6SX_PAD_SD3_DATA1__USDHC3_DATA1 0x170f9
MX6SX_PAD_SD3_DATA2__USDHC3_DATA2 0x170f9
MX6SX_PAD_SD3_DATA3__USDHC3_DATA3 0x170f9
MX6SX_PAD_SD3_DATA4__USDHC3_DATA4 0x170f9
MX6SX_PAD_SD3_DATA5__USDHC3_DATA5 0x170f9
MX6SX_PAD_SD3_DATA6__USDHC3_DATA6 0x170f9
MX6SX_PAD_SD3_DATA7__USDHC3_DATA7 0x170f9
>;
};
pinctrl_usdhc4: usdhc4grp {
fsl,pins = <
MX6SX_PAD_SD4_CMD__USDHC4_CMD 0x17059
MX6SX_PAD_SD4_CLK__USDHC4_CLK 0x10059
MX6SX_PAD_SD4_DATA0__USDHC4_DATA0 0x17059
MX6SX_PAD_SD4_DATA1__USDHC4_DATA1 0x17059
MX6SX_PAD_SD4_DATA2__USDHC4_DATA2 0x17059
MX6SX_PAD_SD4_DATA3__USDHC4_DATA3 0x17059
MX6SX_PAD_SD4_DATA7__GPIO6_IO_21 0x17059 /* CD */
MX6SX_PAD_SD4_DATA6__GPIO6_IO_20 0x17059 /* WP */
>;
};
pinctrl_vcc_sd3: vccsd3grp {
fsl,pins = <
MX6SX_PAD_KEY_COL1__GPIO2_IO_11 0x17059
>;
};
};
};

1298
arch/arm/dts/imx6sx.dtsi Normal file

File diff suppressed because it is too large Load Diff

View File

@@ -10,7 +10,7 @@
/dts-v1/;
#include "keystone.dtsi"
#include "k2e.dtsi"
#include "keystone-k2e.dtsi"
/ {
compatible = "ti,k2e-evm","ti,keystone";

View File

@@ -41,7 +41,7 @@
};
soc {
/include/ "k2e-clocks.dtsi"
/include/ "keystone-k2e-clocks.dtsi"
usb: usb@2680000 {
interrupts = <GIC_SPI 152 IRQ_TYPE_EDGE_RISING>;
@@ -142,6 +142,6 @@
clock-names = "fck";
bus_freq = <2500000>;
};
/include/ "k2e-netcp.dtsi"
/include/ "keystone-k2e-netcp.dtsi"
};
};

View File

@@ -1,7 +1,7 @@
/*
* Copyright 2014 Texas Instruments, Inc.
*
* Keystone 2 Galileo EVM device tree
* Device Tree Source for K2G EVM
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
@@ -9,11 +9,11 @@
*/
/dts-v1/;
#include "k2g.dtsi"
#include "keystone-k2g.dtsi"
/ {
compatible = "ti,k2g-evm","ti,keystone";
model = "Texas Instruments Keystone 2 Galileo EVM";
model = "Texas Instruments K2G General Purpose EVM";
chosen {
stdout-path = &uart0;

View File

@@ -1,5 +1,5 @@
/*
* Device Tree Source for Keystone 2 Galileo Netcp driver
* Device Tree Source for K2G Netcp driver
*
* Copyright 2015 Texas Instruments, Inc.
*

View File

@@ -1,7 +1,7 @@
/*
* Copyright 2014 Texas Instruments, Inc.
*
* Keystone 2 Galileo soc device tree
* Device Tree Source for K2G SOC
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
@@ -12,7 +12,7 @@
#include "skeleton.dtsi"
/ {
model = "Texas Instruments Keystone 2 SoC";
model = "Texas Instruments K2G SoC";
#address-cells = <1>;
#size-cells = <1>;
interrupt-parent = <&gic>;
@@ -98,7 +98,7 @@
status = "disabled";
};
#include "k2g-netcp.dtsi"
#include "keystone-k2g-netcp.dtsi"
pmmc: pmmc@2900000 {
compatible = "ti,power-processor";

View File

@@ -10,7 +10,7 @@
/dts-v1/;
#include "keystone.dtsi"
#include "k2hk.dtsi"
#include "keystone-k2hk.dtsi"
/ {
compatible = "ti,k2hk-evm","ti,keystone";

View File

@@ -41,7 +41,7 @@
};
soc {
/include/ "k2hk-clocks.dtsi"
/include/ "keystone-k2hk-clocks.dtsi"
dspgpio0: keystone_dsp_gpio@02620240 {
compatible = "ti,keystone-dsp-gpio";
@@ -109,6 +109,6 @@
clock-names = "fck";
bus_freq = <2500000>;
};
/include/ "k2hk-netcp.dtsi"
/include/ "keystone-k2hk-netcp.dtsi"
};
};

View File

@@ -10,7 +10,7 @@
/dts-v1/;
#include "keystone.dtsi"
#include "k2l.dtsi"
#include "keystone-k2l.dtsi"
/ {
compatible = "ti,k2l-evm","ti,keystone";

View File

@@ -29,7 +29,7 @@
};
soc {
/include/ "k2l-clocks.dtsi"
/include/ "keystone-k2l-clocks.dtsi"
uart2: serial@02348400 {
compatible = "ns16550a";
@@ -89,7 +89,7 @@
clock-names = "fck";
bus_freq = <2500000>;
};
/include/ "k2l-netcp.dtsi"
/include/ "keystone-k2l-netcp.dtsi"
};
};

View File

@@ -1,58 +0,0 @@
/*
* (C) Copyright 2016 Rockchip Electronics Co., Ltd
*
* SPDX-License-Identifier: GPL-2.0+ X11
*/
/dts-v1/;
#include "rk3288-miniarm.dtsi"
/ {
model = "Miniarm-RK3288";
compatible = "rockchip,rk3288-miniarm", "rockchip,rk3288";
chosen {
stdout-path = &uart2;
};
};
&dmc {
rockchip,pctl-timing = <0x29a 0xc8 0x1f8 0x42 0x4e 0x4 0xea 0xa
0x5 0x0 0xa 0x7 0x19 0x24 0xa 0x7
0x5 0xa 0x5 0x200 0x5 0x10 0x40 0x0
0x1 0x7 0x7 0x4 0xc 0x43 0x100 0x0
0x5 0x0>;
rockchip,phy-timing = <0x48f9aab4 0xea0910 0x1002c200
0xa60 0x40 0x10 0x0>;
rockchip,sdram-params = <0x30B25564 0x627 3 666000000 3 9 1>;
};
&pinctrl {
u-boot,dm-pre-reloc;
};
&pwm1 {
status = "okay";
};
&uart2 {
u-boot,dm-pre-reloc;
reg-shift = <2>;
};
&sdmmc {
u-boot,dm-pre-reloc;
};
&emmc {
u-boot,dm-pre-reloc;
};
&gpio3 {
u-boot,dm-pre-reloc;
};
&gpio8 {
u-boot,dm-pre-reloc;
};

View File

@@ -0,0 +1,58 @@
/*
* (C) Copyright 2016 Rockchip Electronics Co., Ltd
*
* SPDX-License-Identifier: GPL-2.0+ X11
*/
/dts-v1/;
#include "rk3288-tinker.dtsi"
/ {
model = "Tinker-RK3288";
compatible = "rockchip,rk3288-tinker", "rockchip,rk3288";
chosen {
stdout-path = &uart2;
};
};
&dmc {
rockchip,pctl-timing = <0x215 0xc8 0x0 0x35 0x26 0x2 0x70 0x2000d
0x6 0x0 0x8 0x4 0x17 0x24 0xd 0x6
0x4 0x8 0x4 0x76 0x4 0x0 0x30 0x0
0x1 0x2 0x2 0x4 0x0 0x0 0xc0 0x4
0x8 0x1f4>;
rockchip,phy-timing = <0x48d7dd93 0x187008d8 0x121076
0x0 0xc3 0x6 0x2>;
rockchip,sdram-params = <0x20d266a4 0x5b6 2 533000000 6 9 0>;
};
&pinctrl {
u-boot,dm-pre-reloc;
};
&pwm1 {
status = "okay";
};
&uart2 {
u-boot,dm-pre-reloc;
reg-shift = <2>;
};
&sdmmc {
u-boot,dm-pre-reloc;
};
&emmc {
u-boot,dm-pre-reloc;
};
&gpio3 {
u-boot,dm-pre-reloc;
};
&gpio8 {
u-boot,dm-pre-reloc;
};

View File

@@ -71,7 +71,3 @@
&pinctrl_uart0 {
u-boot,dm-pre-reloc;
};
&pinctrl_system_bus {
u-boot,dm-pre-reloc;
};

View File

@@ -59,7 +59,3 @@
&pinctrl_uart0 {
u-boot,dm-pre-reloc;
};
&pinctrl_system_bus {
u-boot,dm-pre-reloc;
};

View File

@@ -28,6 +28,7 @@ config USE_IMXIMG_PLUGIN
config SECURE_BOOT
bool "Support i.MX HAB features"
depends on ARCH_MX7 || ARCH_MX6 || ARCH_MX5
select FSL_CAAM
help
This option enables the support for secure boot (HAB).
See doc/README.mxc_hab for more details.

View File

@@ -27,8 +27,7 @@ u32 spl_boot_device(void)
* Check for BMODE if serial downloader is enabled
* BOOT_MODE - see IMX6DQRM Table 8-1
*/
if ((((bmode >> 24) & 0x03) == 0x01) || /* Serial Downloader */
(gpr10_boot && (reg == 1)))
if (((bmode >> 24) & 0x03) == 0x01) /* Serial Downloader */
return BOOT_DEVICE_UART;
/* BOOT_CFG1[7:4] - see IMX6DQRM Table 8-8 */
switch ((reg & 0x000000FF) >> 4) {
@@ -40,6 +39,9 @@ u32 spl_boot_device(void)
else
return BOOT_DEVICE_NOR;
break;
/* Reserved: Used to force Serial Downloader */
case 0x1:
return BOOT_DEVICE_UART;
/* SATA: See 8.5.4, Table 8-20 */
case 0x2:
return BOOT_DEVICE_SATA;

View File

@@ -29,7 +29,7 @@ void sdelay(unsigned long);
void gpmc_init(void);
void enable_gpmc_cs_config(const u32 *gpmc_config, const struct gpmc_cs *cs, u32 base,
u32 size);
void omap_nand_switch_ecc(uint32_t, uint32_t);
int omap_nand_switch_ecc(uint32_t, uint32_t);
void set_uart_mux_conf(void);
void set_mux_conf_regs(void);

View File

@@ -114,12 +114,6 @@
#define CONFIG_SYS_FSL_ERRATUM_A008751
/* ARM A57 CORE ERRATA */
#define CONFIG_ARM_ERRATA_826974
#define CONFIG_ARM_ERRATA_828024
#define CONFIG_ARM_ERRATA_829520
#define CONFIG_ARM_ERRATA_833471
#define CONFIG_SYS_FSL_MAX_NUM_OF_SEC 1
#elif defined(CONFIG_FSL_LSCH2)
#define CONFIG_SYS_FSL_OCRAM_BASE 0x10000000 /* initial RAM */
@@ -192,6 +186,9 @@
#define GICD_BASE 0x01401000
#define GICC_BASE 0x01402000
#define CONFIG_SYS_DDR_BLOCK1_SIZE ((phys_size_t)2 << 30)
#define CONFIG_MAX_MEM_MAPPED CONFIG_SYS_DDR_BLOCK1_SIZE
#elif defined(CONFIG_ARCH_LS1046A)
#define CONFIG_SYS_FMAN_V3
#define CONFIG_SYS_NUM_FMAN 1

View File

@@ -4,8 +4,8 @@
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __ARCH_ARM_MACH_LITESOM_SOM_H__
#define __ARCH_ARM_MACH_LITESOM_SOM_H__
#ifndef __ARCH_ARM_MX6UL_LITESOM_H__
#define __ARCH_ARM_MX6UL_LITESOM_H__
int litesom_mmc_init(bd_t *bis);

View File

@@ -68,7 +68,7 @@ u32 wait_on_value(u32, u32, void *, u32);
void cancel_out(u32 *num, u32 *den, u32 den_limit);
void sdelay(unsigned long);
void make_cs1_contiguous(void);
void omap_nand_switch_ecc(uint32_t, uint32_t);
int omap_nand_switch_ecc(uint32_t, uint32_t);
void power_init_r(void);
void do_omap3_emu_romcode_call(u32 service_id, u32 parameters);
void omap3_set_aux_cr_secure(u32 acr);

View File

@@ -188,7 +188,7 @@ struct s32ktimer {
#if defined(CONFIG_DRA7XX)
#define NON_SECURE_SRAM_START 0x40300000
#define NON_SECURE_SRAM_END 0x40380000 /* Not inclusive */
#define NON_SECURE_SRAM_IMG_END 0x4037E000
#define NON_SECURE_SRAM_IMG_END 0x4037C000
#else
#define NON_SECURE_SRAM_START 0x40300000
#define NON_SECURE_SRAM_END 0x40320000 /* Not inclusive */

View File

@@ -59,7 +59,7 @@
.irp c,,eq,ne,cs,cc,mi,pl,vs,vc,hi,ls,ge,lt,gt,le,hs,lo
.macro ret\c, reg
#if defined(__ARM_ARCH_5E__) || defined(__ARM_ARCH_5TE__)
#if defined(__ARM_ARCH_5E__)
mov\c pc, \reg
#else
.ifeqs "\reg", "lr"

View File

@@ -12,11 +12,6 @@
#define CONFIG_FSL_SEC_MON
#define CONFIG_SHA_HW_ACCEL
#define CONFIG_SHA_PROG_HW_ACCEL
#define CONFIG_RSA_FREESCALE_EXP
#ifndef CONFIG_FSL_CAAM
#define CONFIG_FSL_CAAM
#endif
#define CONFIG_SPL_BOARD_INIT
#ifdef CONFIG_SPL_BUILD

View File

@@ -109,18 +109,26 @@ relocation_return:
*/
bl c_runtime_cpu_setup /* still call old routine */
#endif /* !CONFIG_SPL_BUILD */
/* TODO: For SPL, call spl_relocate_stack_gd() to alloc stack relocation */
#if defined(CONFIG_SPL_BUILD)
bl spl_relocate_stack_gd /* may return NULL */
/*
* Perform 'sp = (x0 != NULL) ? x0 : sp' while working
* around the constraint that conditional moves can not
* have 'sp' as an operand
*/
mov x1, sp
cmp x0, #0
csel x0, x0, x1, ne
mov sp, x0
#endif
/*
* Clear BSS section
*/
ldr x0, =__bss_start /* this is auto-relocated! */
ldr x1, =__bss_end /* this is auto-relocated! */
mov x2, #0
clear_loop:
str x2, [x0]
add x0, x0, #8
str xzr, [x0], #8
cmp x0, x1
b.lo clear_loop

View File

@@ -68,7 +68,7 @@ relocate_done:
b 0f
1: mrs x0, sctlr_el1
0: tbz w0, #2, 5f /* skip flushing cache if disabled */
tbz w0, #12, 4f /* invalide i-cache is enabled */
tbz w0, #12, 4f /* skip invalidating i-cache if disabled */
ic iallu /* i-cache invalidate all */
isb sy
4: ldp x0, x1, [sp, #16]

View File

@@ -186,7 +186,7 @@ static int do_smhload(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
if (argc == 3 || argc == 4) {
ulong load_addr;
ulong end_addr = 0;
ulong ret;
int ret;
char end_str[64];
load_addr = simple_strtoul(argv[2], NULL, 16);
@@ -195,7 +195,7 @@ static int do_smhload(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
ret = smh_load_file(argv[1], load_addr, &end_addr);
if (ret < 0)
return 1;
return CMD_RET_FAILURE;
/* Optionally save returned end to the environment */
if (argc == 4) {

View File

@@ -392,7 +392,7 @@ static int ast2500_sdrammc_ofdata_to_platdata(struct udevice *dev)
priv->regs = regmap_get_range(map, 0);
priv->phy = regmap_get_range(map, 1);
priv->clock_rate = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
priv->clock_rate = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev),
"clock-frequency", 0);
if (!priv->clock_rate) {

View File

@@ -82,6 +82,8 @@ config TARGET_ODROID_XU3
config TARGET_ARNDALE
bool "Exynos5250 Arndale board"
select ARM_ERRATA_773022
select ARM_ERRATA_774769
select CPU_V7_HAS_NONSEC
select CPU_V7_HAS_VIRT
select SUPPORT_SPL

View File

@@ -1,6 +0,0 @@
config LITESOM
bool
select MX6UL
select DM
select DM_THERMAL
select SUPPORT_SPL

View File

@@ -1,6 +0,0 @@
# (C) Copyright 2016 Grinn
#
# SPDX-License-Identifier: GPL-2.0+
#
obj-y := litesom.o

View File

@@ -1,5 +1,9 @@
if ARCH_MVEBU
config HAVE_MVEBU_EFUSE
bool
default n
config ARMADA_32BIT
bool
select CPU_V7
@@ -23,6 +27,7 @@ config ARMADA_375
config ARMADA_38X
bool
select ARMADA_32BIT
select HAVE_MVEBU_EFUSE
config ARMADA_XP
bool
@@ -146,4 +151,34 @@ config SYS_VENDOR
config SYS_SOC
default "mvebu"
config MVEBU_EFUSE
bool "Enable eFuse support"
default n
depends on HAVE_MVEBU_EFUSE
help
Enable support for reading and writing eFuses on mvebu SoCs.
config MVEBU_EFUSE_FAKE
bool "Fake eFuse access (dry run)"
default n
depends on MVEBU_EFUSE
help
This enables a "dry run" mode where eFuses are not really programmed.
Instead the eFuse accesses are emulated by writing to and reading
from a memory block.
This is can be used for testing prog scripts.
config SECURED_MODE_IMAGE
bool "Build image for trusted boot"
default false
depends on 88F6820
help
Build an image that employs the ARMADA SoC's trusted boot framework
for securely booting images.
config SECURED_MODE_CSK_INDEX
int "Index of active CSK"
default 0
depends on SECURED_MODE_IMAGE
endif

View File

@@ -27,6 +27,7 @@ ifndef CONFIG_SPL_BUILD
obj-$(CONFIG_ARMADA_375) += ../../../drivers/ddr/marvell/axp/xor.o
obj-$(CONFIG_ARMADA_38X) += ../../../drivers/ddr/marvell/a38x/xor.o
obj-$(CONFIG_ARMADA_XP) += ../../../drivers/ddr/marvell/axp/xor.o
obj-$(CONFIG_MVEBU_EFUSE) += efuse.o
endif # CONFIG_SPL_BUILD
obj-y += gpio.o
obj-y += mbus.o

264
arch/arm/mach-mvebu/efuse.c Normal file
View File

@@ -0,0 +1,264 @@
/*
* Copyright (C) 2015-2016 Reinhard Pfau <reinhard.pfau@gdsys.cc>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <config.h>
#include <common.h>
#include <errno.h>
#include <asm/io.h>
#include <asm/arch/cpu.h>
#include <asm/arch/efuse.h>
#include <asm/arch/soc.h>
#include <linux/mbus.h>
#if defined(CONFIG_MVEBU_EFUSE_FAKE)
#define DRY_RUN
#else
#undef DRY_RUN
#endif
#define MBUS_EFUSE_BASE 0xF6000000
#define MBUS_EFUSE_SIZE BIT(20)
#define MVEBU_EFUSE_CONTROL (MVEBU_REGISTER(0xE4008))
enum {
MVEBU_EFUSE_CTRL_PROGRAM_ENABLE = (1 << 31),
};
struct mvebu_hd_efuse {
u32 bits_31_0;
u32 bits_63_32;
u32 bit64;
u32 reserved0;
};
#ifndef DRY_RUN
static struct mvebu_hd_efuse *efuses =
(struct mvebu_hd_efuse *)(MBUS_EFUSE_BASE + 0xF9000);
#else
static struct mvebu_hd_efuse efuses[EFUSE_LINE_MAX + 1];
#endif
static int efuse_initialised;
static struct mvebu_hd_efuse *get_efuse_line(int nr)
{
if (nr < 0 || nr > 63 || !efuse_initialised)
return NULL;
return efuses + nr;
}
static void enable_efuse_program(void)
{
#ifndef DRY_RUN
setbits_le32(MVEBU_EFUSE_CONTROL, MVEBU_EFUSE_CTRL_PROGRAM_ENABLE);
#endif
}
static void disable_efuse_program(void)
{
#ifndef DRY_RUN
clrbits_le32(MVEBU_EFUSE_CONTROL, MVEBU_EFUSE_CTRL_PROGRAM_ENABLE);
#endif
}
static int do_prog_efuse(struct mvebu_hd_efuse *efuse,
struct efuse_val *new_val, u32 mask0, u32 mask1)
{
struct efuse_val val;
val.dwords.d[0] = readl(&efuse->bits_31_0);
val.dwords.d[1] = readl(&efuse->bits_63_32);
val.lock = readl(&efuse->bit64);
if (val.lock & 1)
return -EPERM;
val.dwords.d[0] |= (new_val->dwords.d[0] & mask0);
val.dwords.d[1] |= (new_val->dwords.d[1] & mask1);
val.lock |= new_val->lock;
writel(val.dwords.d[0], &efuse->bits_31_0);
mdelay(1);
writel(val.dwords.d[1], &efuse->bits_63_32);
mdelay(1);
writel(val.lock, &efuse->bit64);
mdelay(5);
return 0;
}
static int prog_efuse(int nr, struct efuse_val *new_val, u32 mask0, u32 mask1)
{
struct mvebu_hd_efuse *efuse;
int res = 0;
res = mvebu_efuse_init_hw();
if (res)
return res;
efuse = get_efuse_line(nr);
if (!efuse)
return -ENODEV;
if (!new_val)
return -EINVAL;
/* only write a fuse line with lock bit */
if (!new_val->lock)
return -EINVAL;
/* according to specs ECC protection bits must be 0 on write */
if (new_val->bytes.d[7] & 0xFE)
return -EINVAL;
if (!new_val->dwords.d[0] && !new_val->dwords.d[1] && (mask0 | mask1))
return 0;
enable_efuse_program();
res = do_prog_efuse(efuse, new_val, mask0, mask1);
disable_efuse_program();
return res;
}
int mvebu_efuse_init_hw(void)
{
int ret;
if (efuse_initialised)
return 0;
ret = mvebu_mbus_add_window_by_id(
CPU_TARGET_SATA23_DFX, 0xA, MBUS_EFUSE_BASE, MBUS_EFUSE_SIZE);
if (ret)
return ret;
efuse_initialised = 1;
return 0;
}
int mvebu_read_efuse(int nr, struct efuse_val *val)
{
struct mvebu_hd_efuse *efuse;
int res;
res = mvebu_efuse_init_hw();
if (res)
return res;
efuse = get_efuse_line(nr);
if (!efuse)
return -ENODEV;
if (!val)
return -EINVAL;
val->dwords.d[0] = readl(&efuse->bits_31_0);
val->dwords.d[1] = readl(&efuse->bits_63_32);
val->lock = readl(&efuse->bit64);
return 0;
}
int mvebu_write_efuse(int nr, struct efuse_val *val)
{
return prog_efuse(nr, val, ~0, ~0);
}
int mvebu_lock_efuse(int nr)
{
struct efuse_val val = {
.lock = 1,
};
return prog_efuse(nr, &val, 0, 0);
}
/*
* wrapper funcs providing the fuse API
*
* we use the following mapping:
* "bank" -> eFuse line
* "word" -> 0: bits 0-31
* 1: bits 32-63
* 2: bit 64 (lock)
*/
static struct efuse_val prog_val;
static int valid_prog_words;
int fuse_read(u32 bank, u32 word, u32 *val)
{
struct efuse_val fuse_line;
int res;
if (bank < EFUSE_LINE_MIN || bank > EFUSE_LINE_MAX || word > 2)
return -EINVAL;
res = mvebu_read_efuse(bank, &fuse_line);
if (res)
return res;
if (word < 2)
*val = fuse_line.dwords.d[word];
else
*val = fuse_line.lock;
return res;
}
int fuse_sense(u32 bank, u32 word, u32 *val)
{
/* not supported */
return -ENOSYS;
}
int fuse_prog(u32 bank, u32 word, u32 val)
{
int res = 0;
/*
* NOTE: Fuse line should be written as whole.
* So how can we do that with this API?
* For now: remember values for word == 0 and word == 1 and write the
* whole line when word == 2.
* This implies that we always require all 3 fuse prog cmds (one for
* for each word) to write a single fuse line.
* Exception is a single write to word 2 which will lock the fuse line.
*
* Hope that will be OK.
*/
if (bank < EFUSE_LINE_MIN || bank > EFUSE_LINE_MAX || word > 2)
return -EINVAL;
if (word < 2) {
prog_val.dwords.d[word] = val;
valid_prog_words |= (1 << word);
} else if ((valid_prog_words & 3) == 0 && val) {
res = mvebu_lock_efuse(bank);
valid_prog_words = 0;
} else if ((valid_prog_words & 3) != 3 || !val) {
res = -EINVAL;
} else {
prog_val.lock = val != 0;
res = mvebu_write_efuse(bank, &prog_val);
valid_prog_words = 0;
}
return res;
}
int fuse_override(u32 bank, u32 word, u32 val)
{
/* not supported */
return -ENOSYS;
}

View File

@@ -36,7 +36,9 @@ enum cpu_target {
CPU_TARGET_ETH01 = 0x7,
CPU_TARGET_PCIE13 = 0x8,
CPU_TARGET_SASRAM = 0x9,
CPU_TARGET_SATA01 = 0xa, /* A38X */
CPU_TARGET_NAND = 0xd,
CPU_TARGET_SATA23_DFX = 0xe, /* A38X */
};
enum cpu_attrib {

View File

@@ -0,0 +1,69 @@
/*
* Copyright (C) 2015 Reinhard Pfau <reinhard.pfau@gdsys.cc>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef _MVEBU_EFUSE_H
#define _MVEBU_EFUSE_H
#include <common.h>
struct efuse_val {
union {
struct {
u8 d[8];
} bytes;
struct {
u16 d[4];
} words;
struct {
u32 d[2];
} dwords;
};
u32 lock;
};
#if defined(CONFIG_ARMADA_38X)
enum efuse_line {
EFUSE_LINE_SECURE_BOOT = 24,
EFUSE_LINE_PUBKEY_DIGEST_0 = 26,
EFUSE_LINE_PUBKEY_DIGEST_1 = 27,
EFUSE_LINE_PUBKEY_DIGEST_2 = 28,
EFUSE_LINE_PUBKEY_DIGEST_3 = 29,
EFUSE_LINE_PUBKEY_DIGEST_4 = 30,
EFUSE_LINE_CSK_0_VALID = 31,
EFUSE_LINE_CSK_1_VALID = 32,
EFUSE_LINE_CSK_2_VALID = 33,
EFUSE_LINE_CSK_3_VALID = 34,
EFUSE_LINE_CSK_4_VALID = 35,
EFUSE_LINE_CSK_5_VALID = 36,
EFUSE_LINE_CSK_6_VALID = 37,
EFUSE_LINE_CSK_7_VALID = 38,
EFUSE_LINE_CSK_8_VALID = 39,
EFUSE_LINE_CSK_9_VALID = 40,
EFUSE_LINE_CSK_10_VALID = 41,
EFUSE_LINE_CSK_11_VALID = 42,
EFUSE_LINE_CSK_12_VALID = 43,
EFUSE_LINE_CSK_13_VALID = 44,
EFUSE_LINE_CSK_14_VALID = 45,
EFUSE_LINE_CSK_15_VALID = 46,
EFUSE_LINE_FLASH_ID = 47,
EFUSE_LINE_BOX_ID = 48,
EFUSE_LINE_MIN = 0,
EFUSE_LINE_MAX = 63,
};
#endif
int mvebu_efuse_init_hw(void);
int mvebu_read_efuse(int nr, struct efuse_val *val);
int mvebu_write_efuse(int nr, struct efuse_val *val);
int mvebu_lock_efuse(int nr);
#endif

View File

@@ -67,6 +67,7 @@
#define MVEBU_REG_PCIE_BASE (MVEBU_REGISTER(0x40000))
#define MVEBU_AXP_USB_BASE (MVEBU_REGISTER(0x50000))
#define MVEBU_USB20_BASE (MVEBU_REGISTER(0x58000))
#define MVEBU_REG_PCIE0_BASE (MVEBU_REGISTER(0x80000))
#define MVEBU_AXP_SATA_BASE (MVEBU_REGISTER(0xa0000))
#define MVEBU_SATA0_BASE (MVEBU_REGISTER(0xa8000))
#define MVEBU_NAND_BASE (MVEBU_REGISTER(0xd0000))

View File

@@ -13,6 +13,11 @@
#include "ctrl_pex.h"
#include "sys_env_lib.h"
__weak void board_pex_config(void)
{
/* nothing in this weak default implementation */
}
int hws_pex_config(const struct serdes_map *serdes_map, u8 count)
{
u32 pex_idx, tmp, next_busno, first_busno, temp_pex_reg,
@@ -77,6 +82,9 @@ int hws_pex_config(const struct serdes_map *serdes_map, u8 count)
/* Support gen1/gen2 */
DEBUG_INIT_FULL_S("Support gen1/gen2\n");
board_pex_config();
next_busno = 0;
mdelay(150);

View File

@@ -83,4 +83,6 @@ int pex_local_bus_num_set(u32 pex_if, u32 bus_num);
int pex_local_dev_num_set(u32 pex_if, u32 dev_num);
u32 pex_config_read(u32 pex_if, u32 bus, u32 dev, u32 func, u32 reg_off);
void board_pex_config(void);
#endif

View File

@@ -13,8 +13,6 @@
#include <asm/arch/cpu.h>
#include <asm/arch/soc.h>
DECLARE_GLOBAL_DATA_PTR;
static u32 get_boot_device(void)
{
u32 val;

View File

@@ -15,6 +15,20 @@ config TARGET_AM335X_EVM
select DM_SERIAL
select DM_GPIO
select TI_I2C_BOARD_DETECT
imply SPL_ENV_SUPPORT
imply SPL_EXT_SUPPORT
imply SPL_FAT_SUPPORT
imply SPL_GPIO_SUPPORT
imply SPL_I2C_SUPPORT
imply SPL_LIBCOMMON_SUPPORT
imply SPL_LIBDISK_SUPPORT
imply SPL_LIBGENERIC_SUPPORT
imply SPL_MMC_SUPPORT
imply SPL_NAND_SUPPORT
imply SPL_POWER_SUPPORT
imply SPL_SERIAL_SUPPORT
imply SPL_WATCHDOG_SUPPORT
imply SPL_YMODEM_SUPPORT
help
This option specifies support for the AM335x
GP and HS EVM development platforms. The AM335x
@@ -101,19 +115,24 @@ endif
if AM43XX
config SPL_EXT_SUPPORT
default y
config SPL_GPIO_SUPPORT
default y
config SPL_I2C_SUPPORT
default y
config TARGET_AM43XX_EVM
bool "Support am43xx_evm"
select BOARD_LATE_INIT
select TI_I2C_BOARD_DETECT
imply SPL_ENV_SUPPORT
imply SPL_EXT_SUPPORT
imply SPL_FAT_SUPPORT
imply SPL_GPIO_SUPPORT
imply SPL_I2C_SUPPORT
imply SPL_LIBCOMMON_SUPPORT
imply SPL_LIBDISK_SUPPORT
imply SPL_LIBGENERIC_SUPPORT
imply SPL_MMC_SUPPORT
imply SPL_NAND_SUPPORT
imply SPL_POWER_SUPPORT
imply SPL_SERIAL_SUPPORT
imply SPL_WATCHDOG_SUPPORT
imply SPL_YMODEM_SUPPORT
help
This option specifies support for the AM43xx
GP and HS EVM development platforms.The AM437x

View File

@@ -1195,7 +1195,7 @@ static void do_sdram_init(u32 base)
ddr3_init(base, regs);
#endif
}
#ifdef CONFIG_OMAP54X
#ifdef CONFIG_OMAP54XX
if (warm_reset() && (emif_sdram_type(regs->sdram_config) ==
EMIF_SDRAM_TYPE_DDR3) && !is_dra7xx()) {
set_lpmode_selfrefresh(base);

View File

@@ -1,38 +1,5 @@
if OMAP34XX
config SPL_EXT_SUPPORT
default y
config SPL_FAT_SUPPORT
default y
config SPL_GPIO_SUPPORT
default y
config SPL_I2C_SUPPORT
default y
config SPL_LIBCOMMON_SUPPORT
default y
config SPL_LIBDISK_SUPPORT
default y
config SPL_LIBGENERIC_SUPPORT
default y
config SPL_MMC_SUPPORT
default y
config SPL_NAND_SUPPORT
default y
config SPL_POWER_SUPPORT
default y
config SPL_SERIAL_SUPPORT
default y
choice
prompt "OMAP3 board select"
optional

View File

@@ -269,38 +269,34 @@ void abort(void)
*****************************************************************************/
static int do_switch_ecc(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{
int hw, strength = 1;
if (argc < 2 || argc > 3)
goto usage;
if (strncmp(argv[1], "hw", 2) == 0) {
if (argc == 2) {
omap_nand_switch_ecc(1, 1);
} else {
if (strncmp(argv[2], "hamming", 7) == 0)
omap_nand_switch_ecc(1, 1);
else if (strncmp(argv[2], "bch8", 4) == 0)
omap_nand_switch_ecc(1, 8);
hw = 1;
if (argc == 3) {
if (strncmp(argv[2], "bch8", 4) == 0)
strength = 8;
else if (strncmp(argv[2], "bch16", 5) == 0)
omap_nand_switch_ecc(1, 16);
else
strength = 16;
else if (strncmp(argv[2], "hamming", 7) != 0)
goto usage;
}
} else if (strncmp(argv[1], "sw", 2) == 0) {
if (argc == 2) {
omap_nand_switch_ecc(0, 1);
} else {
if (strncmp(argv[2], "hamming", 7) == 0)
omap_nand_switch_ecc(0, 1);
else if (strncmp(argv[2], "bch8", 4) == 0)
omap_nand_switch_ecc(0, 8);
else
hw = 0;
if (argc == 3) {
if (strncmp(argv[2], "bch8", 4) == 0)
strength = 8;
else if (strncmp(argv[2], "hamming", 7) != 0)
goto usage;
}
} else {
goto usage;
}
return 0;
return -omap_nand_switch_ecc(hw, strength);
usage:
printf ("Usage: nandecc %s\n", cmdtp->usage);

View File

@@ -1,41 +1,5 @@
if OMAP44XX
config SPL_EXT_SUPPORT
default y
config SPL_FAT_SUPPORT
default y
config SPL_GPIO_SUPPORT
default y
config SPL_I2C_SUPPORT
default y
config SPL_LIBCOMMON_SUPPORT
default y
config SPL_LIBDISK_SUPPORT
default y
config SPL_LIBGENERIC_SUPPORT
default y
config SPL_MMC_SUPPORT
default y
config SPL_NAND_SUPPORT
default y
config SPL_POWER_SUPPORT
default y
config SPL_SERIAL_SUPPORT
default y
config SPL_DISPLAY_PRINT
default y
choice
prompt "OMAP4 board select"
optional

View File

@@ -1,41 +1,5 @@
if OMAP54XX
config SPL_EXT_SUPPORT
default y
config SPL_FAT_SUPPORT
default y
config SPL_GPIO_SUPPORT
default y
config SPL_I2C_SUPPORT
default y
config SPL_LIBCOMMON_SUPPORT
default y
config SPL_LIBDISK_SUPPORT
default y
config SPL_LIBGENERIC_SUPPORT
default y
config SPL_MMC_SUPPORT
default y
config SPL_NAND_SUPPORT
default y
config SPL_POWER_SUPPORT
default y
config SPL_SERIAL_SUPPORT
default y
config SPL_DISPLAY_PRINT
default y
choice
prompt "OMAP5 board select"
optional

View File

@@ -161,6 +161,7 @@ static int ft_hs_fixup_dram(void *fdt, bd_t *bd)
u32 sec_mem_start = CONFIG_TI_SECURE_EMIF_REGION_START;
u32 sec_mem_size = CONFIG_TI_SECURE_EMIF_TOTAL_REGION_SIZE;
fdt64_t temp[2];
fdt32_t two;
/* If start address is zero, place at end of DRAM */
if (0 == sec_mem_start)
@@ -181,7 +182,7 @@ static int ft_hs_fixup_dram(void *fdt, bd_t *bd)
debug("Node %s not found\n", path);
path = "/";
subpath = "reserved-memory";
fdt_path_offset(fdt, path);
offs = fdt_path_offset(fdt, path);
offs = fdt_add_subnode(fdt, offs, subpath);
if (offs < 0) {
printf("Could not create %s%s node.\n", path, subpath);
@@ -189,6 +190,10 @@ static int ft_hs_fixup_dram(void *fdt, bd_t *bd)
}
path = "/reserved-memory";
offs = fdt_path_offset(fdt, path);
two = cpu_to_fdt32(2);
fdt_setprop(fdt, offs, "#address-cells", &two, sizeof(two));
fdt_setprop(fdt, offs, "#size-cells", &two, sizeof(two));
fdt_setprop(fdt, offs, "ranges", NULL, 0);
}
subpath = "secure_reserved";

View File

@@ -120,6 +120,12 @@ int secure_boot_verify_image(void **image, size_t *size)
result = secure_rom_call(
API_HAL_KM_VERIFYCERTIFICATESIGNATURE_INDEX, 0, 0,
4, cert_addr, cert_size, sig_addr, 0xFFFFFFFF);
/* Perform cache writeback on output buffer */
flush_dcache_range(
(u32)*image,
(u32)*image + roundup(*size, ARCH_DMA_MINALIGN));
auth_exit:
if (result != 0) {
printf("Authentication failed!\n");

View File

@@ -60,7 +60,7 @@ int rk3288_qos_init(void)
writel(val, CPU_AXI_QOS_PRIORITY + VIO1_VOP_QOS);
if (!fdt_node_check_compatible(gd->fdt_blob, 0,
"rockchip,rk3288-miniarm"))
"rockchip,rk3288-tinker"))
{
/* set isp qos to higher priority */
writel(val, CPU_AXI_QOS_PRIORITY + VIO1_ISP_R_QOS);

View File

@@ -37,11 +37,11 @@ config TARGET_POPMETAL_RK3288
2GB DDR3. Expansion connectors provide access to I2C, SPI, UART,
GPIOs and display interface.
config TARGET_MINIARM_RK3288
bool "miniarm-RK3288"
select BOARD_LATE_INIT
config TARGET_TINKER_RK3288
bool "Tinker-RK3288"
select BOARD_LATE_INIT
help
Miniarm is a RK3288-based development board with 2 USB ports, HDMI,
Tinker is a RK3288-based development board with 2 USB ports, HDMI,
micro-SD card, audio, Gigabit Ethernet. It also includes on-board
8GB eMMC and 2GB of SDRAM. Expansion connectors provide access to
I2C, SPI, UART, GPIOs.
@@ -124,6 +124,6 @@ source "board/rockchip/evb_rk3288/Kconfig"
source "board/rockchip/fennec_rk3288/Kconfig"
source "board/rockchip/miniarm_rk3288/Kconfig"
source "board/rockchip/tinker_rk3288/Kconfig"
endif

View File

@@ -1016,7 +1016,7 @@ static int rk3288_dmc_ofdata_to_platdata(struct udevice *dev)
#if !CONFIG_IS_ENABLED(OF_PLATDATA)
struct rk3288_sdram_params *params = dev_get_platdata(dev);
const void *blob = gd->fdt_blob;
int node = dev->of_offset;
int node = dev_of_offset(dev);
int ret;
/* Rk3288 supports dual-channel, set default channel num to 2 */

View File

@@ -27,6 +27,12 @@ config SPL_SPI_SUPPORT
config SPL_WATCHDOG_SUPPORT
default y
config SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
default y
config SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION_TYPE
default 0xa2
config TARGET_SOCFPGA_ARRIA5
bool
select TARGET_SOCFPGA_GEN5

View File

@@ -167,6 +167,9 @@ void cm_basic_init(const struct cm_config * const cfg)
/* main mpu */
writel(cfg->mpuclk, &clock_manager_base->main_pll.mpuclk);
/* altera group mpuclk */
writel(cfg->altera_grp_mpuclk, &clock_manager_base->altera.mpuclk);
/* main main clock */
writel(cfg->mainclk, &clock_manager_base->main_pll.mainclk);

View File

@@ -55,6 +55,9 @@ struct cm_config {
uint32_t ddr2xdqsclk;
uint32_t ddrdqclk;
uint32_t s2fuser2clk;
/* altera group */
uint32_t altera_grp_mpuclk;
};
void cm_basic_init(const struct cm_config * const cfg);

View File

@@ -116,6 +116,9 @@ static const struct cm_config cm_default_cfg = {
CLKMGR_SDRPLLGRP_S2FUSER2CLK_PHASE_OFFSET) |
(CONFIG_HPS_SDRPLLGRP_S2FUSER2CLK_CNT <<
CLKMGR_SDRPLLGRP_S2FUSER2CLK_CNT_OFFSET),
/* altera group */
CONFIG_HPS_ALTERAGRP_MPUCLK,
};
const struct cm_config * const cm_get_default_config(void)

View File

@@ -65,10 +65,15 @@ choice
config TEGRA20
bool "Tegra20 family"
select ARM_ERRATA_716044
select ARM_ERRATA_742230
select ARM_ERRATA_751472
select TEGRA_ARMV7_COMMON
config TEGRA30
bool "Tegra30 family"
select ARM_ERRATA_743622
select ARM_ERRATA_751472
select TEGRA_ARMV7_COMMON
config TEGRA114

View File

@@ -13,6 +13,7 @@ config ARCH_UNIPHIER_32BIT
config ARCH_UNIPHIER_64BIT
bool
select ARM64
select CMD_UNZIP
select SPL_SEPARATE_BSS if SPL
select ARMV8_MULTIENTRY if SPL
select ARMV8_SPIN_TABLE if SPL

View File

@@ -8,6 +8,7 @@ obj-y += boards.o
obj-y += spl_board_init.o
obj-y += memconf.o
obj-y += bcu/
obj-$(CONFIG_SPL_MMC_SUPPORT) += mmc-boot-mode.o
else
@@ -19,11 +20,12 @@ obj-y += reset.o
obj-$(CONFIG_MICRO_SUPPORT_CARD) += sbc/ micro-support-card.o
obj-y += pinctrl-glue.o
obj-$(CONFIG_MMC) += mmc-first-dev.o
endif
obj-y += soc-info.o
obj-y += boot-mode/
obj-y += boot-device/
obj-y += clk/
obj-y += dram/

View File

@@ -24,7 +24,7 @@ void uniphier_ld4_bcu_init(const struct uniphier_board_data *bd)
writel(0x11111111, BCSCR5); /* 0xe0000000-0Xffffffff: IPPC/IPPD-bus */
/* Specify DDR channel */
shift = (bd->dram_ch[1].base - bd->dram_ch[0].base) / 0x04000000 * 4;
shift = bd->dram_ch[0].size / 0x04000000 * 4;
writel(ch(shift), BCIPPCCHR2); /* 0x80000000-0x9fffffff */
shift -= 32;

View File

@@ -28,7 +28,7 @@ void uniphier_sld3_bcu_init(const struct uniphier_board_data *bd)
writel(0x24440000, BCSCR5);
/* Specify DDR channel */
shift = (bd->dram_ch[1].base - bd->dram_ch[0].base) / 0x04000000 * 4;
shift = bd->dram_ch[0].size / 0x04000000 * 4;
writel(ch(shift), BCIPPCCHR2); /* 0x80000000-0x9fffffff */
shift -= 32;

View File

@@ -165,6 +165,7 @@ static const struct uniphier_initdata uniphier_initdata[] = {
.nand_2cs = false,
.sbc_init = uniphier_ld11_sbc_init,
.pll_init = uniphier_ld20_pll_init,
.clk_init = uniphier_ld20_clk_init,
.misc_init = uniphier_ld20_misc_init,
},
#endif

View File

@@ -13,7 +13,7 @@
#include <linux/io.h>
#include <../drivers/mtd/nand/denali.h>
#include "boot-mode/boot-device.h"
#include "init.h"
static void nand_denali_wp_disable(void)
{
@@ -62,7 +62,7 @@ int board_late_init(void)
{
puts("MODE: ");
switch (spl_boot_device_raw()) {
switch (uniphier_boot_device_raw()) {
case BOOT_DEVICE_MMC1:
printf("eMMC Boot\n");
setenv("bootmode", "emmcboot");

View File

@@ -16,36 +16,30 @@ DECLARE_GLOBAL_DATA_PTR;
#if defined(CONFIG_ARCH_UNIPHIER_SLD3)
static const struct uniphier_board_data uniphier_sld3_data = {
.dram_freq = 1600,
.dram_nr_ch = 3,
.dram_ch[0] = {
.base = 0x80000000,
.size = 0x20000000,
.width = 32,
},
.dram_ch[1] = {
.base = 0xc0000000,
.size = 0x20000000,
.width = 16,
},
.dram_ch[2] = {
.base = 0xc0000000,
.size = 0x10000000,
.width = 16,
},
.flags = UNIPHIER_BD_DRAM_SPARSE,
};
#endif
#if defined(CONFIG_ARCH_UNIPHIER_LD4)
static const struct uniphier_board_data uniphier_ld4_data = {
.dram_freq = 1600,
.dram_nr_ch = 2,
.dram_ch[0] = {
.base = 0x80000000,
.size = 0x10000000,
.width = 16,
},
.dram_ch[1] = {
.base = 0x90000000,
.size = 0x10000000,
.width = 16,
},
@@ -57,14 +51,11 @@ static const struct uniphier_board_data uniphier_ld4_data = {
/* 1GB RAM board */
static const struct uniphier_board_data uniphier_pro4_data = {
.dram_freq = 1600,
.dram_nr_ch = 2,
.dram_ch[0] = {
.base = 0x80000000,
.size = 0x20000000,
.width = 32,
},
.dram_ch[1] = {
.base = 0xa0000000,
.size = 0x20000000,
.width = 32,
},
@@ -73,14 +64,11 @@ static const struct uniphier_board_data uniphier_pro4_data = {
/* 2GB RAM board */
static const struct uniphier_board_data uniphier_pro4_2g_data = {
.dram_freq = 1600,
.dram_nr_ch = 2,
.dram_ch[0] = {
.base = 0x80000000,
.size = 0x40000000,
.width = 32,
},
.dram_ch[1] = {
.base = 0xc0000000,
.size = 0x40000000,
.width = 32,
},
@@ -90,14 +78,11 @@ static const struct uniphier_board_data uniphier_pro4_2g_data = {
#if defined(CONFIG_ARCH_UNIPHIER_SLD8)
static const struct uniphier_board_data uniphier_sld8_data = {
.dram_freq = 1333,
.dram_nr_ch = 2,
.dram_ch[0] = {
.base = 0x80000000,
.size = 0x10000000,
.width = 16,
},
.dram_ch[1] = {
.base = 0x90000000,
.size = 0x10000000,
.width = 16,
},
@@ -108,14 +93,11 @@ static const struct uniphier_board_data uniphier_sld8_data = {
#if defined(CONFIG_ARCH_UNIPHIER_PRO5)
static const struct uniphier_board_data uniphier_pro5_data = {
.dram_freq = 1866,
.dram_nr_ch = 2,
.dram_ch[0] = {
.base = 0x80000000,
.size = 0x20000000,
.width = 32,
},
.dram_ch[1] = {
.base = 0xa0000000,
.size = 0x20000000,
.width = 32,
},
@@ -125,19 +107,15 @@ static const struct uniphier_board_data uniphier_pro5_data = {
#if defined(CONFIG_ARCH_UNIPHIER_PXS2)
static const struct uniphier_board_data uniphier_pxs2_data = {
.dram_freq = 2133,
.dram_nr_ch = 3,
.dram_ch[0] = {
.base = 0x80000000,
.size = 0x40000000,
.width = 32,
},
.dram_ch[1] = {
.base = 0xc0000000,
.size = 0x20000000,
.width = 32,
},
.dram_ch[2] = {
.base = 0xe0000000,
.size = 0x20000000,
.width = 16,
},
@@ -147,19 +125,15 @@ static const struct uniphier_board_data uniphier_pxs2_data = {
#if defined(CONFIG_ARCH_UNIPHIER_LD6B)
static const struct uniphier_board_data uniphier_ld6b_data = {
.dram_freq = 1866,
.dram_nr_ch = 3,
.dram_ch[0] = {
.base = 0x80000000,
.size = 0x40000000,
.width = 32,
},
.dram_ch[1] = {
.base = 0xc0000000,
.size = 0x20000000,
.width = 32,
},
.dram_ch[2] = {
.base = 0xe0000000,
.size = 0x20000000,
.width = 16,
},
@@ -169,14 +143,11 @@ static const struct uniphier_board_data uniphier_ld6b_data = {
#if defined(CONFIG_ARCH_UNIPHIER_LD11)
static const struct uniphier_board_data uniphier_ld11_data = {
.dram_freq = 1600,
.dram_nr_ch = 2,
.dram_ch[0] = {
.base = 0x80000000,
.size = 0x20000000,
.width = 16,
},
.dram_ch[1] = {
.base = 0xa0000000,
.size = 0x20000000,
.width = 16,
},
@@ -186,19 +157,15 @@ static const struct uniphier_board_data uniphier_ld11_data = {
#if defined(CONFIG_ARCH_UNIPHIER_LD20)
static const struct uniphier_board_data uniphier_ld20_ref_data = {
.dram_freq = 1866,
.dram_nr_ch = 3,
.dram_ch[0] = {
.base = 0x80000000,
.size = 0x40000000,
.width = 32,
},
.dram_ch[1] = {
.base = 0xc0000000,
.size = 0x40000000,
.width = 32,
},
.dram_ch[2] = {
.base = 0x100000000UL,
.size = 0x40000000,
.width = 32,
},
@@ -207,19 +174,15 @@ static const struct uniphier_board_data uniphier_ld20_ref_data = {
static const struct uniphier_board_data uniphier_ld20_data = {
.dram_freq = 1866,
.dram_nr_ch = 3,
.dram_ch[0] = {
.base = 0x80000000,
.size = 0x40000000,
.width = 32,
},
.dram_ch[1] = {
.base = 0xc0000000,
.size = 0x40000000,
.width = 32,
},
.dram_ch[2] = {
.base = 0x100000000UL,
.size = 0x40000000,
.width = 32,
},
@@ -228,14 +191,11 @@ static const struct uniphier_board_data uniphier_ld20_data = {
static const struct uniphier_board_data uniphier_ld21_data = {
.dram_freq = 1866,
.dram_nr_ch = 2,
.dram_ch[0] = {
.base = 0x80000000,
.size = 0x20000000,
.width = 32,
},
.dram_ch[1] = {
.base = 0xc0000000,
.size = 0x40000000,
.width = 32,
},

View File

@@ -0,0 +1,19 @@
#
# SPDX-License-Identifier: GPL-2.0+
#
obj-y += boot-device.o
obj-$(CONFIG_ARCH_UNIPHIER_SLD3) += boot-device-sld3.o
obj-$(CONFIG_ARCH_UNIPHIER_LD4) += boot-device-ld4.o
obj-$(CONFIG_ARCH_UNIPHIER_PRO4) += boot-device-ld4.o
obj-$(CONFIG_ARCH_UNIPHIER_SLD8) += boot-device-ld4.o
obj-$(CONFIG_ARCH_UNIPHIER_PRO5) += boot-device-pro5.o
obj-$(CONFIG_ARCH_UNIPHIER_PXS2) += boot-device-pxs2.o
obj-$(CONFIG_ARCH_UNIPHIER_LD6B) += boot-device-pxs2.o
obj-$(CONFIG_ARCH_UNIPHIER_LD11) += boot-device-ld11.o
obj-$(CONFIG_ARCH_UNIPHIER_LD20) += boot-device-ld11.o
ifdef CONFIG_SPL_BUILD
obj-$(CONFIG_SPL_BOARD_LOAD_IMAGE) += spl_board.o
endif

View File

@@ -8,12 +8,11 @@
#include <common.h>
#include <spl.h>
#include <linux/io.h>
#include <linux/kernel.h>
#include "../sg-regs.h"
#include "../soc-info.h"
#include "boot-device.h"
static struct boot_device_info boot_device_table[] = {
const struct uniphier_boot_device uniphier_ld11_boot_device_table[] = {
{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 128KB, Addr 4)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 128KB, Addr 4)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 128KB, Addr 5)"},
@@ -48,48 +47,23 @@ static struct boot_device_info boot_device_table[] = {
{BOOT_DEVICE_NOR, "NOR (XECS1)"},
};
static int get_boot_mode_sel(void)
const unsigned uniphier_ld11_boot_device_count =
ARRAY_SIZE(uniphier_ld11_boot_device_table);
int uniphier_ld11_boot_device_is_usb(u32 pinmon)
{
return (readl(SG_PINMON0) >> 1) & 0x1f;
return !!(~pinmon & 0x00000080);
}
u32 uniphier_ld20_boot_device(void)
int uniphier_ld20_boot_device_is_usb(u32 pinmon)
{
int boot_mode;
u32 usb_boot_mask;
switch (uniphier_get_soc_id()) {
#if defined(CONFIG_ARCH_UNIPHIER_LD11)
case UNIPHIER_LD11_ID:
usb_boot_mask = 0x00000080;
break;
#endif
#if defined(CONFIG_ARCH_UNIPHIER_LD20)
case UNIPHIER_LD20_ID:
usb_boot_mask = 0x00000780;
break;
#endif
default:
BUG();
}
if (~readl(SG_PINMON0) & usb_boot_mask)
return BOOT_DEVICE_USB;
boot_mode = get_boot_mode_sel();
return boot_device_table[boot_mode].type;
return !!(~pinmon & 0x00000780);
}
void uniphier_ld20_boot_mode_show(void)
unsigned int uniphier_ld11_boot_device_fixup(unsigned int mode)
{
int mode_sel, i;
if (mode == BOOT_DEVICE_MMC1 || mode == BOOT_DEVICE_USB)
mode = BOOT_DEVICE_BOARD;
mode_sel = get_boot_mode_sel();
puts("Boot Mode Pin:\n");
for (i = 0; i < ARRAY_SIZE(boot_device_table); i++)
printf(" %c %02x %s\n", i == mode_sel ? '*' : ' ', i,
boot_device_table[i].info);
return mode;
}

View File

@@ -1,5 +1,7 @@
/*
* Copyright (C) 2014-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
* Copyright (C) 2014 Panasonic Corporation
* Copyright (C) 2015-2017 Socionext Inc.
* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
@@ -7,11 +9,11 @@
#include <common.h>
#include <spl.h>
#include <linux/io.h>
#include <linux/kernel.h>
#include "../sg-regs.h"
#include "boot-device.h"
struct boot_device_info boot_device_table[] = {
const struct uniphier_boot_device uniphier_ld4_boot_device_table[] = {
{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 128KB, Addr 4)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 128KB, Addr 5)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 128KB, Addr 5)"},
@@ -46,29 +48,5 @@ struct boot_device_info boot_device_table[] = {
{BOOT_DEVICE_NOR, "NOR (XECS0)"},
};
static int get_boot_mode_sel(void)
{
return (readl(SG_PINMON0) >> 1) & 0x1f;
}
u32 uniphier_ld4_boot_device(void)
{
int boot_mode;
boot_mode = get_boot_mode_sel();
return boot_device_table[boot_mode].type;
}
void uniphier_ld4_boot_mode_show(void)
{
int mode_sel, i;
mode_sel = get_boot_mode_sel();
puts("Boot Mode Pin:\n");
for (i = 0; i < ARRAY_SIZE(boot_device_table); i++)
printf(" %c %02x %s\n", i == mode_sel ? '*' : ' ', i,
boot_device_table[i].info);
}
const unsigned uniphier_ld4_boot_device_count =
ARRAY_SIZE(uniphier_ld4_boot_device_table);

View File

@@ -1,5 +1,6 @@
/*
* Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com>
* Copyright (C) 2015-2017 Socionext Inc.
* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
@@ -7,11 +8,11 @@
#include <common.h>
#include <spl.h>
#include <linux/io.h>
#include <linux/kernel.h>
#include "../sg-regs.h"
#include "boot-device.h"
static struct boot_device_info boot_device_table[] = {
const struct uniphier_boot_device uniphier_pro5_boot_device_table[] = {
{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, EraseSize 128KB, Addr 5)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, EraseSize 128KB, Addr 5)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, EraseSize 256KB, Addr 5)"},
@@ -44,32 +45,7 @@ static struct boot_device_info boot_device_table[] = {
{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 128KB, Addr 5)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 256KB, Addr 5)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 256KB, Addr 5)"},
{ /* sentinel */ }
};
static int get_boot_mode_sel(void)
{
return (readl(SG_PINMON0) >> 1) & 0x1f;
}
u32 uniphier_pro5_boot_device(void)
{
int boot_mode;
boot_mode = get_boot_mode_sel();
return boot_device_table[boot_mode].type;
}
void uniphier_pro5_boot_mode_show(void)
{
int mode_sel, i;
mode_sel = get_boot_mode_sel();
puts("Boot Mode Pin:\n");
for (i = 0; i < ARRAY_SIZE(boot_device_table); i++)
printf(" %c %02x %s\n", i == mode_sel ? '*' : ' ', i,
boot_device_table[i].info);
}
const unsigned uniphier_pro5_boot_device_count =
ARRAY_SIZE(uniphier_pro5_boot_device_table);

View File

@@ -1,5 +1,6 @@
/*
* Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com>
* Copyright (C) 2015-2017 Socionext Inc.
* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
@@ -7,11 +8,11 @@
#include <common.h>
#include <spl.h>
#include <linux/io.h>
#include <linux/kernel.h>
#include "../sg-regs.h"
#include "boot-device.h"
static struct boot_device_info boot_device_table[] = {
const struct uniphier_boot_device uniphier_pxs2_boot_device_table[] = {
{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 128KB, Addr 4)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 128KB, Addr 5)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 128KB, Addr 5)"},
@@ -46,32 +47,18 @@ static struct boot_device_info boot_device_table[] = {
{BOOT_DEVICE_NONE, "Reserved"},
};
static int get_boot_mode_sel(void)
const unsigned uniphier_pxs2_boot_device_count =
ARRAY_SIZE(uniphier_pxs2_boot_device_table);
int uniphier_pxs2_boot_device_is_usb(u32 pinmon)
{
return (readl(SG_PINMON0) >> 1) & 0x1f;
return !!(pinmon & 0x00000040);
}
u32 uniphier_pxs2_boot_device(void)
unsigned int uniphier_pxs2_boot_device_fixup(unsigned int mode)
{
int boot_mode;
if (mode == BOOT_DEVICE_USB)
return BOOT_DEVICE_NOR;
if (readl(SG_PINMON0) & BIT(6))
return BOOT_DEVICE_USB;
boot_mode = get_boot_mode_sel();
return boot_device_table[boot_mode].type;
}
void uniphier_pxs2_boot_mode_show(void)
{
int mode_sel, i;
mode_sel = get_boot_mode_sel();
puts("Boot Mode Pin:\n");
for (i = 0; i < ARRAY_SIZE(boot_device_table); i++)
printf(" %c %02x %s\n", i == mode_sel ? '*' : ' ', i,
boot_device_table[i].info);
return mode;
}

View File

@@ -1,5 +1,7 @@
/*
* Copyright (C) 2014-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
* Copyright (C) 2014 Panasonic Corporation
* Copyright (C) 2015-2017 Socionext Inc.
* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
@@ -7,11 +9,11 @@
#include <common.h>
#include <spl.h>
#include <linux/io.h>
#include <linux/kernel.h>
#include "../sg-regs.h"
#include "boot-device.h"
static struct boot_device_info boot_device_table[] = {
const struct uniphier_boot_device uniphier_sld3_boot_device_table[] = {
{BOOT_DEVICE_NOR, "NOR (XECS0)"},
{BOOT_DEVICE_NONE, "External Master"},
{BOOT_DEVICE_NONE, "Reserved"},
@@ -78,29 +80,5 @@ static struct boot_device_info boot_device_table[] = {
{BOOT_DEVICE_NONE, "Reserved"},
};
static int get_boot_mode_sel(void)
{
return readl(SG_PINMON0) & 0x3f;
}
u32 uniphier_sld3_boot_device(void)
{
int boot_mode;
boot_mode = get_boot_mode_sel();
return boot_device_table[boot_mode].type;
}
void uniphier_sld3_boot_mode_show(void)
{
int mode_sel, i;
mode_sel = get_boot_mode_sel();
puts("Boot Mode Pin:\n");
for (i = 0; i < ARRAY_SIZE(boot_device_table); i++)
printf(" %c %02x %s\n", i == mode_sel ? '*' : ' ', i,
boot_device_table[i].info);
}
const unsigned uniphier_sld3_boot_device_count =
ARRAY_SIZE(uniphier_sld3_boot_device_table);

View File

@@ -0,0 +1,206 @@
/*
* Copyright (C) 2015-2017 Socionext Inc.
* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <spl.h>
#include <linux/log2.h>
#include "../init.h"
#include "../sbc/sbc-regs.h"
#include "../sg-regs.h"
#include "../soc-info.h"
#include "boot-device.h"
struct uniphier_boot_device_info {
unsigned int soc_id;
unsigned int boot_device_sel_shift;
const struct uniphier_boot_device *boot_device_table;
const unsigned int *boot_device_count;
int (*boot_device_is_usb)(u32 pinmon);
unsigned int (*boot_device_fixup)(unsigned int mode);
};
static const struct uniphier_boot_device_info uniphier_boot_device_info[] = {
#if defined(CONFIG_ARCH_UNIPHIER_SLD3)
{
.soc_id = UNIPHIER_SLD3_ID,
.boot_device_sel_shift = 0,
.boot_device_table = uniphier_sld3_boot_device_table,
.boot_device_count = &uniphier_sld3_boot_device_count,
},
#endif
#if defined(CONFIG_ARCH_UNIPHIER_LD4)
{
.soc_id = UNIPHIER_LD4_ID,
.boot_device_sel_shift = 1,
.boot_device_table = uniphier_ld4_boot_device_table,
.boot_device_count = &uniphier_ld4_boot_device_count,
},
#endif
#if defined(CONFIG_ARCH_UNIPHIER_PRO4)
{
.soc_id = UNIPHIER_PRO4_ID,
.boot_device_sel_shift = 1,
.boot_device_table = uniphier_ld4_boot_device_table,
.boot_device_count = &uniphier_ld4_boot_device_count,
},
#endif
#if defined(CONFIG_ARCH_UNIPHIER_SLD8)
{
.soc_id = UNIPHIER_SLD8_ID,
.boot_device_sel_shift = 1,
.boot_device_table = uniphier_ld4_boot_device_table,
.boot_device_count = &uniphier_ld4_boot_device_count,
},
#endif
#if defined(CONFIG_ARCH_UNIPHIER_PRO5)
{
.soc_id = UNIPHIER_PRO5_ID,
.boot_device_sel_shift = 1,
.boot_device_table = uniphier_pro5_boot_device_table,
.boot_device_count = &uniphier_pro5_boot_device_count,
},
#endif
#if defined(CONFIG_ARCH_UNIPHIER_PXS2)
{
.soc_id = UNIPHIER_PXS2_ID,
.boot_device_sel_shift = 1,
.boot_device_table = uniphier_pxs2_boot_device_table,
.boot_device_count = &uniphier_pxs2_boot_device_count,
.boot_device_is_usb = uniphier_pxs2_boot_device_is_usb,
.boot_device_fixup = uniphier_pxs2_boot_device_fixup,
},
#endif
#if defined(CONFIG_ARCH_UNIPHIER_LD6B)
{
.soc_id = UNIPHIER_LD6B_ID,
.boot_device_sel_shift = 1,
.boot_device_table = uniphier_pxs2_boot_device_table,
.boot_device_count = &uniphier_pxs2_boot_device_count,
.boot_device_is_usb = uniphier_pxs2_boot_device_is_usb,
.boot_device_fixup = uniphier_pxs2_boot_device_fixup,
},
#endif
#if defined(CONFIG_ARCH_UNIPHIER_LD11)
{
.soc_id = UNIPHIER_LD11_ID,
.boot_device_sel_shift = 1,
.boot_device_table = uniphier_ld11_boot_device_table,
.boot_device_count = &uniphier_ld11_boot_device_count,
.boot_device_is_usb = uniphier_ld11_boot_device_is_usb,
.boot_device_fixup = uniphier_ld11_boot_device_fixup,
},
#endif
#if defined(CONFIG_ARCH_UNIPHIER_LD20)
{
.soc_id = UNIPHIER_LD20_ID,
.boot_device_sel_shift = 1,
.boot_device_table = uniphier_ld11_boot_device_table,
.boot_device_count = &uniphier_ld11_boot_device_count,
.boot_device_is_usb = uniphier_ld20_boot_device_is_usb,
.boot_device_fixup = uniphier_ld11_boot_device_fixup,
},
#endif
};
UNIPHIER_DEFINE_SOCDATA_FUNC(uniphier_get_boot_device_info,
uniphier_boot_device_info)
static unsigned int __uniphier_boot_device_raw(
const struct uniphier_boot_device_info *info)
{
u32 pinmon;
unsigned int boot_sel;
if (boot_is_swapped())
return BOOT_DEVICE_NOR;
pinmon = readl(SG_PINMON0);
if (info->boot_device_is_usb && info->boot_device_is_usb(pinmon))
return BOOT_DEVICE_USB;
boot_sel = pinmon >> info->boot_device_sel_shift;
BUG_ON(!is_power_of_2(*info->boot_device_count));
boot_sel &= *info->boot_device_count - 1;
return info->boot_device_table[boot_sel].boot_device;
}
unsigned int uniphier_boot_device_raw(void)
{
const struct uniphier_boot_device_info *info;
info = uniphier_get_boot_device_info();
if (!info) {
pr_err("unsupported SoC\n");
return BOOT_DEVICE_NONE;
}
return __uniphier_boot_device_raw(info);
}
u32 spl_boot_device(void)
{
const struct uniphier_boot_device_info *info;
u32 raw_mode;
info = uniphier_get_boot_device_info();
if (!info) {
pr_err("unsupported SoC\n");
return BOOT_DEVICE_NONE;
}
raw_mode = __uniphier_boot_device_raw(info);
return info->boot_device_fixup ?
info->boot_device_fixup(raw_mode) : raw_mode;
}
#ifndef CONFIG_SPL_BUILD
static int do_pinmon(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
const struct uniphier_boot_device_info *info;
u32 pinmon;
unsigned int boot_device_count, boot_sel;
int i;
info = uniphier_get_boot_device_info();
if (!info) {
pr_err("unsupported SoC\n");
return CMD_RET_FAILURE;
}
printf("Boot Swap: %s\n\n", boot_is_swapped() ? "ON" : "OFF");
pinmon = readl(SG_PINMON0);
if (info->boot_device_is_usb)
printf("USB Boot: %s\n\n",
info->boot_device_is_usb(pinmon) ? "ON" : "OFF");
boot_device_count = *info->boot_device_count;
boot_sel = pinmon >> info->boot_device_sel_shift;
boot_sel &= boot_device_count - 1;
printf("Boot Mode Sel:\n");
for (i = 0; i < boot_device_count; i++)
printf(" %c %02x %s\n", i == boot_sel ? '*' : ' ', i,
info->boot_device_table[i].desc);
return CMD_RET_SUCCESS;
}
U_BOOT_CMD(
pinmon, 1, 1, do_pinmon,
"pin monitor",
""
);
#endif /* !CONFIG_SPL_BUILD */

View File

@@ -0,0 +1,35 @@
/*
* Copyright (C) 2017 Socionext Inc.
* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef _UNIPHIER_BOOT_DEVICE_H_
#define _UNIPHIER_BOOT_DEVICE_H_
struct uniphier_boot_device {
unsigned int boot_device;
const char *desc;
};
extern const struct uniphier_boot_device uniphier_sld3_boot_device_table[];
extern const struct uniphier_boot_device uniphier_ld4_boot_device_table[];
extern const struct uniphier_boot_device uniphier_pro5_boot_device_table[];
extern const struct uniphier_boot_device uniphier_pxs2_boot_device_table[];
extern const struct uniphier_boot_device uniphier_ld11_boot_device_table[];
extern const unsigned int uniphier_sld3_boot_device_count;
extern const unsigned int uniphier_ld4_boot_device_count;
extern const unsigned int uniphier_pro5_boot_device_count;
extern const unsigned int uniphier_pxs2_boot_device_count;
extern const unsigned int uniphier_ld11_boot_device_count;
int uniphier_pxs2_boot_device_is_usb(u32 pinmon);
int uniphier_ld11_boot_device_is_usb(u32 pinmon);
int uniphier_ld20_boot_device_is_usb(u32 pinmon);
unsigned int uniphier_pxs2_boot_device_fixup(unsigned int mode);
unsigned int uniphier_ld11_boot_device_fixup(unsigned int mode);
#endif /* _UNIPHIER_BOOT_DEVICE_H_ */

View File

@@ -0,0 +1,262 @@
/*
* Copyright (C) 2017 Socionext Inc.
* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <spl.h>
#include <linux/bitops.h>
#include <linux/compat.h>
#include <linux/io.h>
#include <asm/processor.h>
#include "../soc-info.h"
#define MMC_CMD_SWITCH 6
#define MMC_CMD_SELECT_CARD 7
#define MMC_CMD_SEND_CSD 9
#define MMC_CMD_READ_MULTIPLE_BLOCK 18
#define EXT_CSD_PART_CONF 179 /* R/W */
#define MMC_RSP_PRESENT BIT(0)
#define MMC_RSP_136 BIT(1) /* 136 bit response */
#define MMC_RSP_CRC BIT(2) /* expect valid crc */
#define MMC_RSP_BUSY BIT(3) /* card may send busy */
#define MMC_RSP_OPCODE BIT(4) /* response contains opcode */
#define MMC_RSP_NONE (0)
#define MMC_RSP_R1 (MMC_RSP_PRESENT | MMC_RSP_CRC | MMC_RSP_OPCODE)
#define MMC_RSP_R1b (MMC_RSP_PRESENT | MMC_RSP_CRC | MMC_RSP_OPCODE | \
MMC_RSP_BUSY)
#define MMC_RSP_R2 (MMC_RSP_PRESENT | MMC_RSP_136 | MMC_RSP_CRC)
#define MMC_RSP_R3 (MMC_RSP_PRESENT)
#define MMC_RSP_R4 (MMC_RSP_PRESENT)
#define MMC_RSP_R5 (MMC_RSP_PRESENT | MMC_RSP_CRC | MMC_RSP_OPCODE)
#define MMC_RSP_R6 (MMC_RSP_PRESENT | MMC_RSP_CRC | MMC_RSP_OPCODE)
#define MMC_RSP_R7 (MMC_RSP_PRESENT | MMC_RSP_CRC | MMC_RSP_OPCODE)
#define SDHCI_DMA_ADDRESS 0x00
#define SDHCI_BLOCK_SIZE 0x04
#define SDHCI_MAKE_BLKSZ(dma, blksz) ((((dma) & 0x7) << 12) | ((blksz) & 0xFFF))
#define SDHCI_BLOCK_COUNT 0x06
#define SDHCI_ARGUMENT 0x08
#define SDHCI_TRANSFER_MODE 0x0C
#define SDHCI_TRNS_DMA BIT(0)
#define SDHCI_TRNS_BLK_CNT_EN BIT(1)
#define SDHCI_TRNS_ACMD12 BIT(2)
#define SDHCI_TRNS_READ BIT(4)
#define SDHCI_TRNS_MULTI BIT(5)
#define SDHCI_COMMAND 0x0E
#define SDHCI_CMD_RESP_MASK 0x03
#define SDHCI_CMD_CRC 0x08
#define SDHCI_CMD_INDEX 0x10
#define SDHCI_CMD_DATA 0x20
#define SDHCI_CMD_ABORTCMD 0xC0
#define SDHCI_CMD_RESP_NONE 0x00
#define SDHCI_CMD_RESP_LONG 0x01
#define SDHCI_CMD_RESP_SHORT 0x02
#define SDHCI_CMD_RESP_SHORT_BUSY 0x03
#define SDHCI_MAKE_CMD(c, f) ((((c) & 0xff) << 8) | ((f) & 0xff))
#define SDHCI_RESPONSE 0x10
#define SDHCI_HOST_CONTROL 0x28
#define SDHCI_CTRL_DMA_MASK 0x18
#define SDHCI_CTRL_SDMA 0x00
#define SDHCI_BLOCK_GAP_CONTROL 0x2A
#define SDHCI_SOFTWARE_RESET 0x2F
#define SDHCI_RESET_CMD 0x02
#define SDHCI_RESET_DATA 0x04
#define SDHCI_INT_STATUS 0x30
#define SDHCI_INT_RESPONSE BIT(0)
#define SDHCI_INT_DATA_END BIT(1)
#define SDHCI_INT_ERROR BIT(15)
#define SDHCI_SIGNAL_ENABLE 0x38
/* RCA assigned by Boot ROM */
#define UNIPHIER_EMMC_RCA 0x1000
struct uniphier_mmc_cmd {
unsigned int cmdidx;
unsigned int resp_type;
unsigned int cmdarg;
unsigned int is_data;
};
static int uniphier_emmc_send_cmd(void __iomem *host_base,
struct uniphier_mmc_cmd *cmd)
{
u32 mode = 0;
u32 mask = SDHCI_INT_RESPONSE;
u32 stat, flags;
writel(U32_MAX, host_base + SDHCI_INT_STATUS);
writel(0, host_base + SDHCI_SIGNAL_ENABLE);
writel(cmd->cmdarg, host_base + SDHCI_ARGUMENT);
if (cmd->is_data)
mode = SDHCI_TRNS_DMA | SDHCI_TRNS_BLK_CNT_EN |
SDHCI_TRNS_ACMD12 | SDHCI_TRNS_READ |
SDHCI_TRNS_MULTI;
writew(mode, host_base + SDHCI_TRANSFER_MODE);
if (!(cmd->resp_type & MMC_RSP_PRESENT))
flags = SDHCI_CMD_RESP_NONE;
else if (cmd->resp_type & MMC_RSP_136)
flags = SDHCI_CMD_RESP_LONG;
else if (cmd->resp_type & MMC_RSP_BUSY)
flags = SDHCI_CMD_RESP_SHORT_BUSY;
else
flags = SDHCI_CMD_RESP_SHORT;
if (cmd->resp_type & MMC_RSP_CRC)
flags |= SDHCI_CMD_CRC;
if (cmd->resp_type & MMC_RSP_OPCODE)
flags |= SDHCI_CMD_INDEX;
if (cmd->is_data)
flags |= SDHCI_CMD_DATA;
if (cmd->resp_type & MMC_RSP_BUSY || cmd->is_data)
mask |= SDHCI_INT_DATA_END;
writew(SDHCI_MAKE_CMD(cmd->cmdidx, flags), host_base + SDHCI_COMMAND);
do {
stat = readl(host_base + SDHCI_INT_STATUS);
if (stat & SDHCI_INT_ERROR)
return -EIO;
} while ((stat & mask) != mask);
return 0;
}
static int uniphier_emmc_switch_part(void __iomem *host_base, int part_num)
{
struct uniphier_mmc_cmd cmd = {};
cmd.cmdidx = MMC_CMD_SWITCH;
cmd.resp_type = MMC_RSP_R1b;
cmd.cmdarg = (EXT_CSD_PART_CONF << 16) | (part_num << 8) | (3 << 24);
return uniphier_emmc_send_cmd(host_base, &cmd);
}
static int uniphier_emmc_is_over_2gb(void __iomem *host_base)
{
struct uniphier_mmc_cmd cmd = {};
u32 csd40, csd72; /* CSD[71:40], CSD[103:72] */
int ret;
cmd.cmdidx = MMC_CMD_SEND_CSD;
cmd.resp_type = MMC_RSP_R2;
cmd.cmdarg = UNIPHIER_EMMC_RCA << 16;
ret = uniphier_emmc_send_cmd(host_base, &cmd);
if (ret)
return ret;
csd40 = readl(host_base + SDHCI_RESPONSE + 4);
csd72 = readl(host_base + SDHCI_RESPONSE + 8);
return !(~csd40 & 0xffc00380) && !(~csd72 & 0x3);
}
static int uniphier_emmc_load_image(void __iomem *host_base, u32 dev_addr,
unsigned long load_addr, u32 block_cnt)
{
struct uniphier_mmc_cmd cmd = {};
u8 tmp;
WARN_ON(load_addr >> 32);
writel(load_addr, host_base + SDHCI_DMA_ADDRESS);
writew(SDHCI_MAKE_BLKSZ(7, 512), host_base + SDHCI_BLOCK_SIZE);
writew(block_cnt, host_base + SDHCI_BLOCK_COUNT);
tmp = readb(host_base + SDHCI_HOST_CONTROL);
tmp &= ~SDHCI_CTRL_DMA_MASK;
tmp |= SDHCI_CTRL_SDMA;
writeb(tmp, host_base + SDHCI_HOST_CONTROL);
tmp = readb(host_base + SDHCI_BLOCK_GAP_CONTROL);
tmp &= ~1; /* clear Stop At Block Gap Request */
writeb(tmp, host_base + SDHCI_BLOCK_GAP_CONTROL);
cmd.cmdidx = MMC_CMD_READ_MULTIPLE_BLOCK;
cmd.resp_type = MMC_RSP_R1;
cmd.cmdarg = dev_addr;
cmd.is_data = 1;
return uniphier_emmc_send_cmd(host_base, &cmd);
}
static int spl_board_load_image(struct spl_image_info *spl_image,
struct spl_boot_device *bootdev)
{
u32 dev_addr = CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR;
void __iomem *host_base = (void __iomem *)0x5a000200;
struct uniphier_mmc_cmd cmd = {};
int ret;
/*
* deselect card before SEND_CSD command.
* Do not check the return code. It fails, but it is OK.
*/
cmd.cmdidx = MMC_CMD_SELECT_CARD;
cmd.resp_type = MMC_RSP_R1;
uniphier_emmc_send_cmd(host_base, &cmd); /* CMD7 (arg=0) */
/* reset CMD Line */
writeb(SDHCI_RESET_CMD | SDHCI_RESET_DATA,
host_base + SDHCI_SOFTWARE_RESET);
while (readb(host_base + SDHCI_SOFTWARE_RESET))
cpu_relax();
ret = uniphier_emmc_is_over_2gb(host_base);
if (ret < 0)
return ret;
if (ret) {
debug("card is block addressing\n");
} else {
debug("card is byte addressing\n");
dev_addr *= 512;
}
cmd.cmdarg = UNIPHIER_EMMC_RCA << 16;
/* select card again */
ret = uniphier_emmc_send_cmd(host_base, &cmd);
if (ret)
printf("failed to select card\n");
/* Switch to Boot Partition 1 */
ret = uniphier_emmc_switch_part(host_base, 1);
if (ret)
printf("failed to switch partition\n");
ret = uniphier_emmc_load_image(host_base, dev_addr,
CONFIG_SYS_TEXT_BASE, 1);
if (ret) {
printf("failed to load image\n");
return ret;
}
ret = spl_parse_image_header(spl_image, (void *)CONFIG_SYS_TEXT_BASE);
if (ret)
return ret;
ret = uniphier_emmc_load_image(host_base, dev_addr,
spl_image->load_addr,
spl_image->size / 512);
if (ret) {
printf("failed to load image\n");
return ret;
}
return 0;
}
SPL_LOAD_IMAGE_METHOD("eMMC", 0, BOOT_DEVICE_BOARD, spl_board_load_image);

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