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5324 Commits

Author SHA1 Message Date
Tom Rini
892f93de61 Prepare v2018.11-rc2
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-10-15 20:26:22 -04:00
Michal Simek
658954cb47 Revert "fdt: fdtdec_setup_memory_banksize() use livetree"
This reverts commit c35a7d375e.
This commit is breaking SPL on zc706.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Patrice Chotard <patrice.chotard@st.com> [on STM32F746-disco]
2018-10-15 16:22:49 -04:00
Tom Rini
6e7a186dc5 Merge tag 'arc-more-updates-for-2018.11-rc2-2' of git://git.denx.de/u-boot-arc
More fixes and improvements for ARC here:

Fixes (this time included for real):
 * Take care of global uninitialized variables
   They used to be put right after .bss section and were never
   zeroed as they should be. Now merged with normal .bss

Improvements:
 * Print more verbose CPU info for boards built on real silicon
 * Add support for SD-card detection on all ARC boards
 * Quite a few fixes for IoT DK
   - Support reset by command
   - Print of CPU freq on boot
   - Link for eFlash etc
2018-10-15 07:20:07 -04:00
Alexey Brodkin
6e63314f43 ARC: Don't use COMMON section for global not-initialized variables
By default GCC puts global non-initialized variables in COMMON section.
And we used to ignore existence of COMMON section in our linker
scripts though smart LD silently appended it right after .bss.

And the problem here is variables from COMMON section even though
require zeroing in run-time were not zeroed as they were placed
right after __bss_end symbol.

It was a pure luck we never faced serious problem due to this,
but now it is fixed.

Now as for some other architectures we'll just force GCC to put
those global variables in normal .bss section.

This solution is much nicer than adding COMMON section to each and
every linker script.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-10-15 13:35:17 +03:00
Tom Rini
19ca29f3ff Merge git://git.denx.de/u-boot-sunxi
[trini: Convert da850evm_nand defconfig now to to SPL_DM]
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-10-12 15:21:24 -04:00
Tom Rini
e6cd05e502 Merge branch 'master' of git://git.denx.de/u-boot-spi 2018-10-12 11:54:13 -04:00
Alexey Brodkin
a211091855 iot_dk: Link for eFlash
That's what we'll have in production.
But note it won't work for loading via JTAG as
eFlash is not directly writable, one needs to use
prebootloader to flash uboot.bin from SD-card into eFlash.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-10-12 15:14:41 +03:00
Alexey Brodkin
9f87d47088 axs10x/emdk/hsdk/iot_dk: Implement board_mmc_getcd()
So now we may detect MMC/SD-card existence and
instead of completely misleading message on missing card:
------------------------>8-----------------------
Loading Environment from FAT... Card did not respond to voltage select!
------------------------>8-----------------------

we now get very clear one:
------------------------>8-----------------------
Loading Environment from FAT... MMC: no card present
------------------------>8-----------------------

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-10-12 15:14:41 +03:00
Alexey Brodkin
8a8f32d8ff iot_dk: Save CPU clock value to gd->cpu_clk
Since gd->cpu_clk is a global item we may once populate it from .dtb
ans use it then in other places like for printing CPU info etc.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-10-12 15:14:41 +03:00
Alexey Brodkin
031154fe8f iot_dk: Add support of 136 MHz clock
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-10-12 15:14:41 +03:00
Alexey Brodkin
7d388add55 iot_dk: Implement board reset
It is done by writing some magic sequence in a special register.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-10-12 15:14:41 +03:00
Alexey Brodkin
5b86ca96d0 iot_dk/hsdk: Implement its own print_cpuinfo()
ARC IDENTITY register only encodes major architecture
type and version while for a particular board/silicon we
may know better which template was used and so we may identify
CPU more precise, which exactly we do here.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-10-12 15:14:41 +03:00
Alexey Brodkin
ba9f56f3d4 ARC: make generic print_cpuinfo() weak
This allows board to override print_cpuinfo() because
they might know better which ARChitect template was used.
This way we may not only derive base architecture type and
version but more meaningful things like "ARC EM7D" instead of
simple "ARC EM", "ARC HS36" instead of "ARC HS".

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-10-12 15:14:40 +03:00
Alexey Brodkin
18e8923f6c iot_dk: Disable networking support
There's no Ethernet controller on the board so no point in having
networking support. This also saves us 5.5 kB of precious memory.

| # bloat-o-meter u-boot.net u-boot.no_net_regex | tail -1
| Total: Before=127892, After=122334, chg -4.35%

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-10-12 15:14:40 +03:00
Alexey Brodkin
8d0a4968d7 iot_dk: Add localversion string
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-10-12 15:14:40 +03:00
Tom Rini
15f22ac2ee ldpaa_eth.c: Fix warning when PHYLIB is not enabled
We need to #ifdef some variables to avoid warning about them being
unused.

Fixes: 1a048cd656 ("driver: net: fsl-mc: Add support of multiple phys for dpmac")
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-10-12 07:41:24 -04:00
Ashish Kumar
5c391486b4 sf: Add MICRON manufacturer id
NOR flash name MT35X_QLKA and MT25Q_** used on NXP board has
manufacturer id as 0x2C, which are rather for newer flashes
after the split of Micron from ST.

So macro for this micron manufacturer id.

Signed-off-by: Suresh Gupta <suresh.gupta@nxp.com>
Signed-off-by: Yogesh Gaur <yogeshnarayan.gaur@nxp.com>
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
[jagan: updated commit message]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-10-12 11:37:49 +05:30
Tom Rini
0223462b37 Merge branch 'master' of git://git.denx.de/u-boot-net 2018-10-11 15:28:32 -04:00
Pankaj Bansal
1a048cd656 driver: net: fsl-mc: Add support of multiple phys for dpmac
Till now we have had cases where we had one phy device per dpmac.
Now, with the upcoming products (LX2160AQDS), we have cases, where there
are sometimes two phy devices for one dpmac. One phy for TX lanes and
one phy for RX lanes. to handle such cases, add the support for multiple
phys in ethernet driver. The ethernet link is up if all the phy devices
connected to one dpmac report link up. also the link capabilities are
limited by the weakest phy device.

i.e. say if there are two phys for one dpmac. one operates at 10G without
autoneg and other operate at 1G with autoneg. Then the ethernet interface
will operate at 1G without autoneg.

Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-10-10 12:45:28 -05:00
Pankaj Bansal
1ed19a1421 driver: net: fsl-mc: initialize dpmac irrespective of phy
The dpmac initalization should not depend on phy.
As the phy is not necessary to be present for dpmac to function.
Therefore, remove dpmac initialization dependency from phy.

Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-10-10 12:45:23 -05:00
Pankaj Bansal
a3cb5340f1 driver: net: fsl-mc: Modify the dpmac link detection method
when there is no phy present for a dpmac, a dummy phy device is created.
when we move to multiple phy method, we need to create as many dummy phy
devices.

Change this method so that we don't need to create dummy phy devices.
We always report linkup if no phy is present.

Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-10-10 12:45:01 -05:00
Pankaj Bansal
f259c43d89 driver: net: fsl-mc: fix error handing in init_phy
if an error occurs during init_phy, we should free the phydev structure
which has been allocated by phy_connect.

Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-10-10 12:43:18 -05:00
Pankaj Bansal
d75e81d9e0 driver: net: fsl-mc: remove unused strcture elements
The phydev structure is present in both ldpaa_eth_priv and
wriop_dpmac_info. the phydev in wriop_dpmac_info is not being used

As the phydev is created based on phy_addr and bus members of
wriop_dpmac_info, it is appropriate to keep phydev in wriop_dpmac_info.

Also phy_regs is not being used, therefore remove it

Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-10-10 12:36:34 -05:00
Tom Rini
3d5ced9e22 Merge tag 'dm-9oct18' of git://git.denx.de/u-boot-dm
Test improvements to tidy up output and drop duplicate tests
Sandbox SPL/TPL support
Various dm-related improvements
2018-10-10 13:35:17 -04:00
Tom Rini
98068b3be5 Merge branch 'master' of git://git.denx.de/u-boot-sh 2018-10-10 13:35:14 -04:00
Patrick Delaunay
606f3a74e6 arm: remove duplicated prototypes in u-boot.arm.h
Remove the function prototypes duplicated between u-boot.arm.h
and init.h/common.h

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-10-10 13:35:10 -04:00
Patrick Delaunay
6180ea7e66 arm: remove prototype for get_timer_masked
The interruption support had be removed for ARM architecture and
the function get_timer_masked() is no more used except in some
the timer.c files.

This patch clean each timer.c which implement this function and
remove the associated prototype in u-boot-arm.h

For timer.c, I don't verify if the weak version of get_timer
(in lib/time.c) can be used

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-10-10 13:35:09 -04:00
Patrick Delaunay
aa33fe8695 arm: remove prototype for udelay_masked
The interruption support had be removed for ARM architecture and
the function udelay_masked() is no more used except in some timer.c
files  and have the same content than udelay() or __udelay().

This patch update each timer.c implementing this function and
remove the associated prototype in u-boot-arm.h.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-10-10 13:35:09 -04:00
Patrick Delaunay
aad5b4a351 arm: remove prototype for reset_timer_masked
Remove prototype for function only used in one file

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-10-10 13:35:09 -04:00
Patrick Delaunay
1c8e9fae16 arm: remove prototype for arch_interrupt_init
Remove prototype for no more existing function

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-10-10 13:35:09 -04:00
Marek Vasut
fd3d1212a2 bootm: Add board specific OS preboot hook
Add board-specific hook which is executed before the code hands over
control to the OS. This lets the board perform some last-minute clean
ups.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2018-10-10 13:35:09 -04:00
Andrew F. Davis
81089a5430 arm: K3: am654: Add support for getting boot mode
Read the boot mode register to find the boot mode. Only use eMMC boot0
mode when the mode is eMMC boot (called BOOT_DEVICE_MMC1 currently due
to current conflating of boot mode and boot device), and not iff the
boot device is MMC port 0.

Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-10-10 13:35:08 -04:00
Andrew F. Davis
b5700efbc8 arm: K3: am654: Choose MMC boot device based on boot port
For most devices the boot mode maps directly to the boot
device. For MMC this is not the case as we have two MMC
boot modes and two MMC boot devices (ports). Check the
boot port to determine which MMC device was our boot
device. Make this change for both primary and secondary
boot modes.

Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-10-10 13:35:08 -04:00
Keerthy
0f3cf2b3e5 gpio: da8xx: Push generic defines of gpio.h out of mach-davinci
Push generic defines of gpio.h out of mach-davinci to drivers/gpio
now that non-davinci architectures are beginning to use this IP.

Signed-off-by: Keerthy <j-keerthy@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
[trini: Fix calimain build]
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-10-10 13:35:03 -04:00
Keerthy
401d74cb2c gpio: da8xx: Add k2g compatible
Add k2g compatible so that k3 SoCs can be supported

Signed-off-by: Keerthy <j-keerthy@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-10-10 13:32:41 -04:00
Nicholas Faustini
442faf61ab board: ks2: move uinitrd fixup logic inside ft_board_setup_ex
The uinitrd fixup logic should be executed after the FDT /chosen
node has been properly populated by fdt_initrd()

Signed-off-by: Nicholas Faustini <nicholas.faustini@azcomtech.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-10-10 13:32:41 -04:00
Nicholas Faustini
2c76d311a4 fdt: add call to ft_board_setup_ex() for ks2 boards
When updating the board FDT, some of the operations
are performed by ft_board_setup_ex() and should be
executed also by the fdt command.

Signed-off-by: Nicholas Faustini <nicholas.faustini@azcomtech.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-10-10 13:32:41 -04:00
Loic Devulder
8afd4ea5b9 ARM: meson: Add Khadas VIM2 board support
This adds platform code for the Khadas VIM2 board based on a
Meson GXM (S912) SoC with the Meson GXM configuration.

This initial submission supports UART, MMC/SDCard and Ethernet.
USB is partially supported.

All the code is from Neil Armstrong! I just rebased the code, do
some cleanup and tested on my board.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Loic Devulder <ldevulder@suse.de>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
2018-10-10 13:32:40 -04:00
Loic Devulder
2058b7395e ARM: meson: Add Khadas VIM2 board DT
This adds Device Tree for the Khadas VIM2 board.

The meson-gxm-khadas-vim2.dts is synchronized from Linux 4.18.10.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Loic Devulder <ldevulder@suse.de>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
2018-10-10 13:32:40 -04:00
Patrice Chotard
1c547bf732 ARM: dts: stm32mp1: Add usbotg_hs regulator for stm32mp157c-ev1
Add usbotg_hs regulator to allow to use the USB mass-storage
feature on OTG usb port.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-10-10 13:32:40 -04:00
Pankaj Bansal
afd6c6b470 driver: net: fsl-mc: modify the label name
The goto label name is misspelled it should be DPMAC not DPAMC

Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-10-10 12:30:28 -05:00
Duncan Hare
5d457ecbef net: Consolidate UDP header functions
Make it possible to add TCP versions of the same, while reusing
IP portions. This patch should not change any behavior.

Signed-off-by: Duncan Hare <DH@Synoia.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-10-10 12:29:02 -05:00
Joe Hershberger
ac3f26cc15 net: Don't overwrite waiting packets with asynchronous replies
Peter originally sent a fix, but it breaks a number of other things.
This addresses the original reported issue in a different way.

That report was:

> U-Boot has 1 common buffer to send Ethernet frames, pointed to by
> net_tx_packet.  When sending to an IP address without knowing the MAC
> address, U-Boot makes an ARP request (using the arp_tx_packet buffer)
> to find out the MAC address of the IP addressr. When a matching ARP
> reply is received, U-Boot continues sending the frame stored in the
> net_tx_packet buffer.
>
> However, in the mean time, if U-Boot needs to send out any network
> packets (e.g. replying ping packets or ARP requests for its own IP
> address etc.), it will use the net_tx_packet buffer to prepare the
> new packet. Thus this buffer is no longer the original packet meant
> to be transmitted after the ARP reply. The original packet will be
> lost.

This instead uses the ARP tx buffer to send async replies in the case
where we are actively waiting for an ARP reply.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>

Reported-by: Tran Tien Dat <peter.trantiendat@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2018-10-10 12:29:01 -05:00
Joe Hershberger
72ff004258 test: eth: Add a test for the target being pinged
The target will respond to pings while doing other network handling.
Make sure that the response happens and is correct.

This currently corrupts the ongoing operation of the device if it
happens to be awaiting an ARP reply of its own to whatever serverip it
is attempting to communicate with. In the test, add an expectation that
the user operation (ping, in this case) will fail. A later patch will
address this problem.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2018-10-10 12:29:00 -05:00
Joe Hershberger
45988dae4c test: eth: Add a test for ARP requests
This tests that ARP requests made to this target's IP address are
responded-to by the target when it is doing other networking operations.

This currently corrupts the ongoing operation of the device if it
happens to be awaiting an ARP reply of its own to whatever serverip it
is attempting to communicate with. In the test, add an expectation that
the user operation (ping, in this case) will fail. A later patch will
address this problem.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2018-10-10 12:29:00 -05:00
Joe Hershberger
9cbe5972c3 net: sandbox: Add a priv ptr for tests to use
Tests need to be able to pass their "unit test state" to the handlers
where asserts are evaluated. Add a function that allows the tests to set
this private data on the sandbox eth device.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2018-10-10 12:28:59 -05:00
Joe Hershberger
3f02c98bd1 net: Add an accessor to know if waiting for ARP
This single-sources the state of the ARP.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2018-10-10 12:28:58 -05:00
Joe Hershberger
c67a420781 net: sandbox: Allow fake eth to handle more than 1 packet response
Use up to the max allocated receive buffers so as to be able to test
more complex situations.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2018-10-10 12:28:58 -05:00
Joe Hershberger
76a503439e net: sandbox: Share the priv structure with tests
If tests want to implement tx handlers, they will likely need access to
the details in the priv structure.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2018-10-10 12:28:57 -05:00
Joe Hershberger
c7eb733d60 net: sandbox: Make the fake eth driver response configurable
Make the send handler registerable so tests can check for different
things.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2018-10-10 12:28:57 -05:00
Joe Hershberger
e95bb16110 net: sandbox: Refactor sandbox send function
Make the behavior of the send function reusable.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2018-10-10 12:28:56 -05:00
Joe Hershberger
e4ab9a6508 net: sandbox: Move disabled flag into priv struct
Store the per-device data with the device.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2018-10-10 12:28:56 -05:00
Priyanka Jain
5b72398608 phy: Add 25G_AUI, XLAUI, CAUI2, CAUI4 related macros
NXP SoCs like LX2160A can support new ethernet modes
which are 25G_AUI(25G), XLAUI(40G), CAUI2(50G)
and CAUI4(100G)
Add corresponding macros definitions in phy_interface.h

Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-10-10 12:28:55 -05:00
Janine Hagemann
0f347a0096 net: phy: ti: Add binding for the CLK_OUT pin muxing
The DP83867 has a muxing option for the CLK_OUT pin. It is possible
to set CLK_OUT for different channels.
Create a binding to select a specific clock for CLK_OUT pin.

Based on commit 9708fb630d19 ("net: phy: dp83867: Add binding for
the CLK_OUT pin muxing option") of mainline linux kernel.

Signed-off-by: Janine Hagemann <j.hagemann@phytec.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-10-10 12:28:54 -05:00
Janine Hagemann
be71a74c59 net: phy: ti: Recover from "port mirroring" N/A MODE4
The DP83867 when not properly bootstrapped - especially with LED_0 pin -
can enter N/A MODE4 for "port mirroring" feature.

To provide normal operation of the PHY, one needs not only to explicitly
disable the port mirroring feature, but as well stop some IC internal
testing (which disables RGMII communication).

To do that the STRAP_STS1 (0x006E) register must be read and RESERVED bit
11 examined. When it is set, the another RESERVED bit (11) at PHYCR
(0x0010) register must be clear to disable testing mode and enable RGMII
communication.

Thorough explanation of the problem can be found at following e2e thread:
"DP83867IR: Problem with RESERVED bits in PHY Control Register (PHYCR) -
Linux driver"

https://e2e.ti.com/support/interface/ethernet/f/903/p/571313/2096954#2096954

Based on commit ac6e058b75be ("net: phy: dp83867: Recover from "port mirroring"
N/A MODE4") of mainline linux kernel.

Signed-off-by: Janine Hagemann <j.hagemann@phytec.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Acked-by: Lukasz Majewski <lukma@denx.de>
2018-10-10 12:28:54 -05:00
Janine Hagemann
fba725f410 net: phy: ti: Add lane swapping support in the DP83867 TI's PHY driver
This patch adds support for enabling or disabling the lane swapping
(called "port mirroring" in PHY's CFG4 register) feature of the DP83867
TI's PHY device.

One use case is when bootstrap configuration enables this feature (because
of e.g. LED_0 wrong wiring) so then one needs to disable it in software
(at u-boot/Linux).

Based on commit fc6d39c39581 ("net: phy: dp83867: Add lane swapping
support in the DP83867 TI's PHY driver") of mainline linux kernel.

Signed-off-by: Janine Hagemann <j.hagemann@phytec.de>
Acked-by: Lukasz Majewski <lukma@denx.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-10-10 12:28:53 -05:00
Bin Meng
883b5302fc linux/if_ether.h: Add VLAN related macros
There are VLAN related macros defined in include/linux/if_vlan.h
in Linux kernel, as well as some kernel useful structures and inline
functions. Instead of a complete import from kernel, let's add these
VLAN macros to U-Boot's include/linux/if_ether.h.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-10-10 12:28:53 -05:00
Bin Meng
dda5251037 net.h: Include linux/if_ether.h to avoid duplication
There are plenty of existing drivers that have macros like ETH_ALEN
defined in their own source files. Now that we imported the kernel's
if_ether.h to U-Boot we can reduce some duplication.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-10-10 12:28:52 -05:00
Bin Meng
2240d763e5 linux/if_ether.h: Initial import from Linux kernel v4.17
This imports include/uapi/linux/if_ether.h from Linux kernel v4.17.
It can be very helpful When porting Linux ethernet driver to U-Boot.

Note it is not exactly the same as the kernel one, as checkpatch
issues are fixed.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-10-10 12:28:51 -05:00
Icenowy Zheng
90de3969be sunxi: fix DRAM gate/reset sequence of H6
Currently the DRAM bus gate and reset is changed at the same time in
H6 DRAM initialization code, which disobeys the user manual's
programming guide.

Fix the sequence by follow the sequence suggested by the user manual
(ungate the bus clock after release the reset signal).

By some experiments it seems to fix the DRAM size detection failure that
rarely happens.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2018-10-10 12:04:07 +05:30
Jagan Teki
cb19c29398 board: da8xxevm: Add SPL DM for serial, spi
This patch add SPL DM support for da8xxevm boards
with SPL serial, SPI drivers supported via platdata.

Cc: Adam Ford <aford173@gmail.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Adam Ford <aford173@gmail.com> #da850evm
2018-10-10 11:53:55 +05:30
Jagan Teki
ba3c22bf18 spi: davinci: Add platdata support
Davanci spi driver has DM support already, this patch
add support for platdata so-that SPL can use it for
low foot-print.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Adam Ford <aford173@gmail.com>
2018-10-10 11:35:06 +05:30
Adam Ford
c8602061a7 mtd: uboot: Fix hanging during mtd list command
Some boards (like omap3_logic) hang when trying to access
address 0. This happens when executing the new 'mtd list' command.
This patch enhances the checks for conditions that would
preclude mtd_probe_devices() from operating.

Fixes: 5db66b3aee ("cmd: mtd: add 'mtd' command")
Suggested-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com>
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-10-10 11:34:10 +05:30
Bin Meng
339613eba5 net: pch_gbe: Make probe/remove static
These two routines are internal to pch_gbe driver.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-10-09 14:18:21 -05:00
Bin Meng
b06d76f9ae linux/compat.h: Add netdev_### log macros
Currently there are two ethernet drivers (mvneta.c and mvpp2.c) that
has netdev_### (eg: netdev_dbg) log macros defined in its own driver
file. This adds these log macros in a common place linux/compat.h.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-10-09 14:18:17 -05:00
Bin Meng
145663991f linux/mdio.h: Sync with Linux kernel v4.17
This syncs U-Boot's include/linux/mdio.h with Linux kernel v4.17
include/uapi/linux/mdio.h.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-10-09 14:18:12 -05:00
Bin Meng
8da35245ab linux/mii.h: Sync with Linux kernel v4.17
This syncs U-Boot's include/linux/mii.h with Linux kernel v4.17
include/uapi/linux/mii.h.

While we are here, this also fixes some style issues.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-10-09 14:18:07 -05:00
Marek Vasut
ae400fde75 ARM: dts: rmobile: Reinstate missing CPLD on ULCB
The CPLD is used to reset the ULCB and it was removed
during DT sync with Linux 4.17. Reinstate it.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-10-09 17:21:44 +02:00
Marek Vasut
beced53a74 mmc: tmio: Limit DMA to 32bit on R-Car Gen3
The internal DMAC on Gen3 is 32bit only, limit the DMA address
range to 32bit.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-10-09 17:21:44 +02:00
Marek Vasut
92bde154ec mmc: tmio: Pass full address to tmio_sd_addr_is_dmaable()
Pass the entire source data pointer to tmio_sd_addr_is_dmaable()
so we don't have to apply casts throughout the code.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-10-09 17:21:43 +02:00
Simon Glass
41b781ddf1 dtoc: Fix the value of SetInt()
This does not set the correct value at present. Fix it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-10-09 04:40:27 -06:00
Simon Glass
8c466ed380 video: Tidy up a few comments in video.o
Add a little more information to one comment and update the guard comment
to be more accurate.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
2018-10-09 04:40:27 -06:00
Simon Glass
9949ee876d video: at91: Adjust vidconsole_position_cursor() to use char pos
At present this function uses pixels but it seems more useful for it to
position in terms of characters on the screen. This also matches the
comment to the function. Update this.

Unfortunately there is one user of this function (at91). Have a crack at
fixing this, since I cannot test it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
2018-10-09 04:40:27 -06:00
Simon Glass
751fed426f sysreset: Add a way to find the last reset
We have a method to return the last reset as a string for humans, but not
a method that allows it to be used programmatically. Add a new method that
returns the last reset as an enum.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-10-09 04:40:27 -06:00
Simon Glass
eb517315a6 sysreset: Tidy up a few comments and logging
Some comments are incorrect or missing pieces. Fix these and use logging
to print the error.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-10-09 04:40:27 -06:00
Simon Glass
595aac9824 pci: Add a little more debugging to pci_rom
Add some logging on failure.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2018-10-09 04:40:27 -06:00
Simon Glass
44093a1554 fdt: Allow C++ comments in link scripts and DT files
At present // in a device-tree file or link script causes a warning. But
this is used in the standard license header. Update the compiler flags to
use C99, which permits this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-10-09 04:40:27 -06:00
Simon Glass
07bc873c73 ctags: Minor changes to fix ctags output
At present ctags emits lines with unmatched quotes which means that the
output file is invalid. This is with exuberant-ctags version 5.9~svn201103
but I also see it with plain ctags. I am not sure that it is a bug though.

Make a few minor changes in the source code to fix this problem.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-10-09 04:40:27 -06:00
Simon Glass
a4f737a9c3 panel: Expand the backlight support
At present the panel can be turned on but not off, and the brightness
cannot be controlled at run-time. Add a new API function to both the panel
and backlight uclasses to handle this. Enhance the PWM backlight driver
to deal with custom levels properly and allow the backlight to be turned
on and off.

Update the test to cover thes new features.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-10-09 04:40:27 -06:00
Simon Glass
5d9a88f44a test: panel: Add a test for the panel uclass
At present this uclass has no tests. Add a simple one which checks the PWM
configuration, regulator and GPIO.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-10-09 04:40:27 -06:00
Simon Glass
d07b6e145e cros_ec: Add support for v3 messages on LPC
At present version 3 messages are only supported on SPI. Add support for
using LPC as well, as used on samus.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-10-09 04:40:27 -06:00
Simon Glass
a12ef7e26a cros_ec: Update cros_ec_read_hash() to specify the image
Allow selection of which EC image to hash.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-10-09 04:40:27 -06:00
Simon Glass
590cee8315 x86: Update mtrr functions to allow leaving cache alone
At present the mtrr functions disable the cache before making changes and
enable it again afterwards. This is fine in U-Boot, but does not work if
running in CAR (such as we are in SPL).

Update the functions so that the caller can request that caches be left
alone.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2018-10-09 04:40:27 -06:00
Simon Glass
6f1c0430e8 cros: Update ec_commands to latest version
This file has changed quite a bit in the last 5 years as the capabilities
of the ECs have grown. Sync it up with the copy in coreboot commit
b9141f2215.

The only change is the addition of EC_VBNV_BLOCK_SIZE_V2. This is needed
because U-Boot uses the new v2 vboot API and this is not currently fully
supported by Chromium OS firmware.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-10-09 04:40:27 -06:00
Simon Glass
67b9052264 Rename GPT_HEADER_SIGNATURE to avoid conflict
The current name conflicts with the Chrome OS verified boot library, which
prevents it being built. That library uses a string whereas U-Boot uses a
64-bit hex value. Rename this in U-Boot.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-10-09 04:40:27 -06:00
Simon Glass
109860ff3e Add a header file for strings
Add a string.h header for libraries that expect this to be available, now
that U-Boot's version has moved to include/linux.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-10-09 04:40:27 -06:00
Simon Glass
0bf964592a log: Add comments to the rest of the log categories
At present some of the log categories are missing comments. Add them.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-10-09 04:40:27 -06:00
Simon Glass
741f2d620c binman: Move to three-digit test-file numbers
We now have 99 tests. Before adding any more, rename everything to three
digits. This helps to preserve the ordering of tests and makes it easier
to find things.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-10-09 04:40:27 -06:00
Simon Glass
6e64ec1256 tpm: Add a few new commands for v1
These are needed for the 2018 version of Chromium OS vboot. Add an
implementation for TPM v1, with v2 to come later.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-10-09 04:40:27 -06:00
Simon Glass
34a5e8a2f1 tpm: Tidy up logging in tpm-common.c
At present this file uses logging but it should use the new macros. Update
it and add a log message for an error.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-10-09 04:40:27 -06:00
Simon Glass
c89d32a7b1 tpm: Use livetree and allow children
Adjust the TPM drivers to use livetree (only one does not). Also,
sometimes TPMs can have child devices if they provide a service to the
system (such as storing secure data), so permit that.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-10-09 04:40:27 -06:00
Simon Glass
c6ebd011bb video: Adjust video_clear() to return an error
All driver-model operation should return an error code. Adjust this
function to do so also.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
2018-10-09 04:40:27 -06:00
Simon Glass
25a3845d2b fdt: Remove fdtdec_decode_region() function
This function is not used in U-Boot now. Remove it along with its 'memory'
version.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-10-09 04:40:27 -06:00
Simon Glass
5e24a2ef8b dm: spi: Add logging of some return values
When SPI flash operations fail it is helpful to be able to see the error
codes and where they are generated. Add logging to capture this
information for read operations.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-10-09 04:40:27 -06:00
Simon Glass
42116f644b cros: Adjust board_get_cros_ec_dev() to return a udevice
Rather than returning what is effectively an internal data structure,
return the cros EC device itself.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-10-09 04:40:27 -06:00
Simon Glass
6322a7b63f cros: Update cros_ec code to use struct udevice
At present we pass around a private pointer to specify the cros_ec device.
With driver model it makes more sense to pass the device. Update the code
to do this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-10-09 04:40:27 -06:00
Simon Glass
5592a633a0 fdt: Allow libfdt in TPL
In some cases (e.g. sandbox with verified boot) it is useful to support
libfdt in TPL. Update the Kconfig to handle this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-10-09 04:40:27 -06:00
Simon Glass
aa0ffe8eb9 serial: Allow serial to be absent in TPL
At present this option applies to SPL, but it should be available in TPL
also, and separately. Change to using CONFIG_IS_ENABLED(), add a new
Kconfig option and fix up hang().

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-10-09 04:40:27 -06:00
Simon Glass
6307896c17 tpm: Add support for SPL and TPL
At present the tpm can only be used in U-Boot proper. Updated it to work
in SPL and TPL also.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-10-09 04:40:27 -06:00
Simon Glass
06f94461a9 fdt: Allow indicating a node is for U-Boot proper only
At present it is not possible to specify that a node should be used before
relocation (in U-Boot proper) without it also ending up in SPL and TPL
device trees. Add a new "u-boot,dm-pre-proper" boolean property for this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-10-09 04:40:27 -06:00
Simon Glass
a15a7aa47b doc: Update docs for device tree in SPL, TPL
Make a few small updates to indicate that device tree can be used in SPL
and TPL.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-10-09 04:40:27 -06:00
Simon Glass
343864afd7 fdt: Document the fact that dtc is now built
This documentation is out of date now that U-Boot builds dtc
automatically. Update it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-10-09 04:40:27 -06:00
Simon Glass
380d4f787a rtc: Allow use of RTC in SPL and TPL
Add Kconfig options so that the RTC can be used in SPL and TPL. This is
helpful for accessing the contents of CMOS RAM, for example.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-10-09 04:40:27 -06:00
Simon Glass
107610775b Kconfig: Convert CONFIG_RTC_MC146818 to Kconfig
Move this option to Kconfig and tidy up the two boards which use it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-10-09 04:40:27 -06:00
Simon Glass
ef39151583 blk: Support block drivers in TPL
At present it is not possible to enable/disable block drivers in TPL. This
is needed to provide sandbox support. Add a Kconfig option and adjust the
Makefile.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-10-09 04:40:27 -06:00
Simon Glass
2c5eac1e18 Makefile: Add a warning if SPL/TPL cannot be built
At present the build fails in strange ways if CONFIG_SPL is defined by
CONFIG_SUPPORT_SPL is not. Add a warning for this case as it can be very
confusing to debug.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-10-09 04:40:27 -06:00
Simon Glass
985ca3945f spl: input: Allow input in SPL and TPL
In some cases it is necessary to read the keyboard in early phases of
U-Boot. Update the config to allow this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-10-09 04:40:27 -06:00
Simon Glass
97f57109bb sf: Avoid allocating memory on every read operation
At present spi_flash_cmd_read_ops() allocates and frees a few bytes of
memory every time it is called. It is faster to use the stack for this
and this is now supported by the minimum GCC version required by U-Boot.

Remove the allocation and use a variable-sized array instead.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-10-09 04:40:27 -06:00
Simon Glass
e6c5c94a79 dm: core: Update ofnode to read binman-style flash entry
At present ofnode_read_fmap_entry() reads a flash map entry in a format
which is not supported by binman. To allow use to use binman-format
descriptions, update this function.

Also add a simple test.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-10-09 04:40:27 -06:00
Simon Glass
cdb6aa0afb dm: core: Add a function to find the first inactive child
Some devices have children and want to press an existing inactive child
into service when needed. Add a function to help with this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-10-09 04:40:27 -06:00
Simon Glass
9f15cc14bf dm: core: Update some functions to use const
Quite a few functions do not actually modify the device that is passed in.
Update the function signatures to reflect that.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-10-09 04:40:27 -06:00
Simon Glass
c7a3accc3f dm: core: Alloc uclass-private data to be cache-aligned
There is no reason why this feature should not be supported for uclass-
private data. Update the code accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-10-09 04:40:27 -06:00
Simon Glass
4af3e9ad8a sandbox: Restore blocking I/O on exit
At present sandbox sets non-blocking I/O as soon as any input is read
from the terminal. However it does not restore the previous state on
exit. Fix this and drop the old os_read_no_block() function.

This means that we always enable blocking I/O in sandbox (if input is a
terminal) whereas previously it would only happen on the first call to
tstc() or getc(). However, the difference is likely not important.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-10-09 04:40:27 -06:00
Simon Glass
66613f5dd2 dm: spi: Clean up detection of sandbox SPI emulator
Now that we don't have to deal with the command-line flag we can simplify
the code for detecting the emulator. Remove the lookup based on the SPI
specification, relying just on the device tree to locate the emulator.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-10-09 04:40:27 -06:00
Simon Glass
ef8a25006d sandbox: tpm: Enhance to support the latest Chromium OS
This driver was originally written against Chromium OS circa 2012. A few
new features have been added. Enhance the TPM driver to match. This mostly
includes a few new messages and properly modelling whether a particular
'space' is present or not.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-10-09 04:40:27 -06:00
Simon Glass
998af31903 sandbox: tpm: Tidy up enums and return values
Use an enum for command values instead of open-coding them. This removes
the need for comments. Also make sure the driver returns proper error
numbers instead of -1.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-10-09 04:40:27 -06:00
Simon Glass
114b60a7e6 serial: sandbox: Allow serial output without device tree
At present sandbox assumes that device-tree control is active, but this
may not be the case in SPL or TPL. Add some conditions to handle this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-10-09 04:40:27 -06:00
Simon Glass
ee4417644c sandbox: Add a debug UART
Add support for the debug UART so that sandbox provides build testing for
this feature.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-10-09 04:40:27 -06:00
Simon Glass
55d39911c0 sandbox: video: Speed up video output
At present there are many situations where sandbox syncs the display to
the SDL frame buffer. This is a very expensive operation but is only
needed every now and then. Update video_sync() so that we can specify
whether this operation is really needed.

At present this flag is not used on other architectures. It could also
be used for reducing writeback-cache flushes but the benefit of that would
need to be investigated.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
2018-10-09 04:40:27 -06:00
Simon Glass
c3aed5db59 sandbox: spi: Add more logging
Add logging to aid debugging features in these drivers. Also drop some
code in sandbox_spi_xfer() which is not used.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-10-09 04:40:27 -06:00
Simon Glass
1c5a81d803 sandbox: Remove the old memory file later
When debugging sandbox it is sometimes annoying that the memory file is
deleted early on. If sandbox later crashes or we quit (using the
debugger), it is not possible to run it again with the same state since
the memory file is gone.

Remove the old memory file when sandbox exits, instead. Also add debugging
showing the memory filename.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-10-09 04:40:26 -06:00
Simon Glass
2b1dc29a12 sandbox: Add a flag to set the default log level
It is useful to be able to set the default log level from the command line
when running sandbox. Add a new -L command-line flag for this. The log
level is set using the enum log_level_t in log.h. At present a number must
be specified, e.g. -L7 for debug.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-10-09 04:40:26 -06:00
Simon Glass
69bc15d5ff sandbox: Support booting from TPL to SPL
At present we support booting from SPL to U-Boot proper. Add support for
the previous stage too, so sandbox can be started with TPL.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-10-09 04:40:26 -06:00
Simon Glass
1289e96797 sandbox: spi: Drop command-line SPI option
At present we support specifying SPI flash devices to use in the device
tree and on the command line. Drop the second option, since it is a pain
to support nicely with driver model, and unnecessary.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-10-09 04:40:26 -06:00
Simon Glass
056a5cea31 sandbox: Add a way to write data to the host filesystem
For debugging it is sometimes useful to write out data for inspection
using an external tool. Add a function which can write this data to a
given file.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-10-09 04:40:26 -06:00
Simon Glass
50b288aca3 sandbox: Support file truncation with os_open()
At present files are not truncated on writing. This is a useful feature.
Add support for this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-10-09 04:40:26 -06:00
Simon Glass
cdd140af5c log: Add helpers for common log levels
At present to output a log message you need something like:

   log(UCLASS_SPI, LOCL_INFO, "message1");
   log(UCLASS_SPI, LOCL_INFO, "message2");

but many files use the same category throughout. Also it is helpful to
shorten the length of log names, providing helpers for common logging
levels. Add some macros so that it is possible to do:

   (top of file, before #includes)
   #define LOG_CATEGORY UCLASS_SPI

   (later in the file)
   log_info("message1");
   log_debug("message2");
   log_err("message3");

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-10-09 04:40:26 -06:00
Patrick Delaunay
2023000aed cmd: pxe: add support for FIT config selection
Add a way in configuration files (exlinux.conf for sysboot command)
to select a specific FIT configuration. The configuration is selected
with a string added after the FIT filename in the label "KERNEL" or
"LINUX", using the same format than bootm command:

KERNEL [Filename]#<conf>[#<extra-conf[#...]]

This configuration string, beginning by '#', is directly appended
to bootm argument 1 after <kernel_addr_r>.

bootm [<kernel_addr_r>]#<conf>[#<extra-conf[#...]]

see doc/uImage.FIT/command_syntax_extensions.txt for details

Example :
 KERNEL /fit.itb#cfg1
 KERNEL /fit.itb#cfg2

Configuration can be use also for overlay management :
 KERNEL /fit.itb#cfg1#dtbo1#dtbo3

see doc/uImage.FIT/overlay-fdt-boot.txt for details

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-10-08 14:45:02 -04:00
Loic Devulder
c45414b542 ARM: meson: Extend mem_map to support 3GiB of RAM
The current mem_map definition for Meson SoCs has support for up
to 2GiB of RAM. According to S905, S905X, S912 and S805X datasheets
the DDR region is set from 0x00000000 to 0xBFFFFFFF, so mem_map's
definition should be changed accordingly.

It is also needed to be able to boot Khadas VIM2 board with S912
SoC.

Signed-off-by: Loic Devulder <ldevulder@suse.de>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Acked-by: Marek Vasut <marek.vasut@gmail.com>
2018-10-08 14:45:02 -04:00
Yevgeny Popovych
5b781cf08d fs: btrfs: Fix tree traversal with btrfs_next_slot()
When traversing slots in a btree (via btrfs_path) with btrfs_next_slot(),
we didn't correctly identify that the last slot in the leaf was reached
and we should jump to the next leaf.

This could lead to any kind of runtime errors or corruptions, like:
* file data not being read at all, or is read partially
* file is read but is corrupted
* (any) metadata being corrupted or not read at all, etc

The easiest way to reproduce this is to read a large enough file that
its EXTENT_DATA items don't fit into a single leaf.

Signed-off-by: Yevgeny Popovych <yevgenyp@pointgrab.com>
Cc: Marek Behun <marek.behun@nic.cz>
Tested-by: Marek Behún <marek.behun@nic.cz>
2018-10-08 14:45:02 -04:00
Trent Piepho
4a094725b4 rtc: Add read8 and write8 support to isl1208 driver
This can be used for device register access from board code.

This allows access to capabilities in the RTC chip not abstracted in
U-Boot's RTC class.  E.g., device NVRAM or a tamper detection circuit.

Cc: Klaus Goger <klaus.goger@theobroma-systems.com>
Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Trent Piepho <tpiepho@impinj.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-10-08 14:45:02 -04:00
Simon Glass
fbcf37e48e log: Correct definition of log_msg_ret()
This macro should have two parameters, not one. Fix it so that it
correctly resolves to _ret when logging is disabled.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-10-08 08:30:22 -06:00
Marek Vasut
a6a45cd325 ofnode: Add missing address translation into ofnode_get_addr_size()
Of CONFIG_OF_TRANSLATE is enabled, this function still returns
untranslated bogus results. Add the missing translation.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-10-08 07:34:34 -06:00
Marek Vasut
51cb927504 ofnode: Replace of_n_addr_cells with of_n_size_cells
The size should be decoded using of_n_size_cells(), make it so.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-10-08 07:34:34 -06:00
Simon Glass
11ae93eef4 binman: Run tests concurrently
At present the tests run one after the other using a single CPU. This is
not very efficient. Bring in the concurrencytest module and run the tests
concurrently, using one process for each CPU by default. A -P option
allows this to be overridden, which is necessary for code-coverage to
function correctly.

This requires fixing a few tests which are currently not fully
independent.

At some point we might consider doing this across all pytests in U-Boot.
There is a pytest version that supports specifying the number of processes
to use, but it did not work for me.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-10-08 07:34:34 -06:00
Simon Glass
2673afe221 test: Reduce the number of tests run with sandbox_flattree
We only need to run driver-model tests with this config, since this is the
only thing that is different when CONFIG_OF_LIVE is not defined. Filter
out the other tests to same time.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-10-08 07:34:34 -06:00
Simon Glass
008b030009 patman: Don't clear progress in tout unless it was used
At present calling Uninit() always called ClearProgress() which outputs
a \r character as well as spaces to remove any progress information on the
line. This can mess up the normal output of binman and other tools. Fix
this by outputing this only when progress information has actually been
previous written.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-10-08 07:34:34 -06:00
Simon Glass
1fda18205f tools: Set an initial value for indir
This variable is not documented or set up in the module. Fix this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-10-08 07:34:34 -06:00
Simon Glass
4b4bc06ef4 buildman: dtoc: Suppress unwanted output from test
There are a few test cases which print output. Suppress this so that tests
can run silently in the normal case.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-10-08 07:34:34 -06:00
Simon Glass
86af511d89 binman: Separate out testSplBssPad()
At present this test runs binman twice, which means that the temporary
files from the first run do not get cleaned up. Split this into two tests
to fix this problem.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-10-08 07:34:34 -06:00
Simon Glass
e0e6275f4c binman: Fix up removal of temporary directories
At present 'make check' leaves some temporary directories around. Part of
this is because we call tools.PrepareOutputDir() twice in some cases,
without calling tools.FinaliseOutputDir() in between.

Fix this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-10-08 07:34:34 -06:00
Simon Glass
ed59e005e6 binman: Add a default path to libfdt.py
This module is often available in the sandbox_spl build created by
'make check'. Use this as a default path so that just typing 'binman -t'
(without setting PYTHONPATH) will generally run the tests.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-10-08 07:34:34 -06:00
Simon Glass
3bc11e818c test: Tidy up comments and variable name
The 'result' variable counts the number of failures in running the tests.
Rename it to 'failures' to make this more obvious. Also tidy up a few
comments.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-10-08 07:34:34 -06:00
Simon Glass
c9adb3559c test: Print the name of each test before running it
At present the tests are run without any indication of what is running.
For the tests which start with a build this is pretty obvious, but for
tools it is not.

Add a name for each test we run, and print it before starting the test.
Signed-off-by: Simon Glass <sjg@chromium.org>
2018-10-08 07:34:34 -06:00
Simon Glass
734f3de924 test: Simplify the PATH setup
Use 'export' to avoid repeating the path setup for each command.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-10-08 07:34:34 -06:00
Simon Glass
a3a3f5d531 Makefile: Add a 'check' target for make
At present we use 'make tests' to run the tests. For many projects
'make check' is more common, so support that as well. Also add some help
to 'make help'.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-10-08 07:34:34 -06:00
Simon Glass
da753e35cb buildman: Make the toolchain test more forgiving
The filenames of the toolchains on kernel.org changes every now and then.
Fix it for the current change, and make the test use a regex so that it
has a better chance of passing with future changes too.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-10-08 07:34:34 -06:00
Simon Glass
87b05ee3a9 test/py: Fix unicode handling for log filtering
At present the unicode filtering seems to get confused at times with
this error:

  UnicodeDecodeError: 'ascii' codec can't decode byte 0x80 in position
     32: ordinal not in range(128)

It seems to be due to self._nonprint being interpreted as UTF-8. Fix it
by using ordinals instead of characters, changing the string to set.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Michal Simek <michal.simek@xilinx.com>
2018-10-08 07:34:34 -06:00
Simon Glass
ec9e0f4712 patman: Handle unicode in _ProjectConfigParser tests
With Python 2.7.15rc1, ConfigParser.SafeConfigParser has unfortunately
started returning unicode, for unknown reasons. Adjust the code to handle
this by converting everything to unicode. We cannot convert things to
ASCII since email addresses may be encoded with UTF-8.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-10-08 07:34:34 -06:00
Simon Glass
9f8037ea9c sandbox: Unprotect DATA regions in bus tests
On my Ubuntu 18.04.1 machine two driver-model bus tests have started
failing recently. The problem appears to be that the DATA region of the
executable is protected. This does not seem correct, but perhaps there
is a reason.

To work around it, unprotect the regions in these tests before accessing
them.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-10-08 07:34:34 -06:00
Jens Wiklander
0a60a81ba3 Kconfig: sandbox: enable cmd_avb and dependencies
Enables cmd_avb and its dependencies need to run the AVB tests.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
[trini: Disable for sandbox_noblk]
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-10-07 13:34:19 -04:00
Jens Wiklander
bbddbef998 avb_verify: support sandbox configuration
Change get_sector_buf() to use map_sysmem() to get a pointer to the
CONFIG_FASTBOOT_BUF_ADDR in memory.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-10-07 11:07:26 -04:00
Jens Wiklander
07cbae7672 test_avb: Update pymark.buildconfigspec information for the AVB tests
Update the pymark.buildconfigspec to depend on 'cmd_mmc' in addition to
'cmd_avb' for those tests that needs more a more complete MMC
implementation or the "mmc" command.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
2018-10-07 11:07:26 -04:00
Jens Wiklander
6663e07478 avb_verify: support using OP-TEE TA AVB
With CONFIG_OPTEE_TA_AVB use the trusted application AVB provided by
OP-TEE to manage rollback indexes and device-lock status.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
2018-10-07 11:07:25 -04:00
Jens Wiklander
a6ab4245d1 test: tee: test TEE uclass
Tests the TEE uclass with a sandbox tee driver.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
[trini: initialize session to 0 in dm_test_tee]
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-10-07 11:07:05 -04:00
Jens Wiklander
eadf26f183 tee: add sandbox driver
Adds a sandbox tee driver which emulates a generic TEE with the OP-TEE
AVB TA.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
[trini: Fix printf warnings in ta_avb_invoke_func, slots is uint]
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-10-07 11:04:01 -04:00
Jens Wiklander
fe39e8e0ee sandbox: imply CONFIG_TEE (TEE uclass)
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
2018-10-07 10:48:26 -04:00
Jens Wiklander
fa830ae1e4 sandbox: dt: add sandbox_tee node
Adds a sandbox_tee node to enable the sandbox tee driver in all the
sandbox dts files.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
2018-10-07 10:48:26 -04:00
Jens Wiklander
1cc8cc4e67 tee: optee: support AVB trusted application
Adds configuration option OPTEE_TA_AVB and a header file describing the
interface to the Android Verified Boot 2.0 (AVB) trusted application
provided by OP-TEE.

Tested-by: Igor Opaniuk <igor.opaniuk@linaro.org>
Reviewed-by: Igor Opaniuk <igor.opaniuk@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-10-07 10:47:38 -04:00
Jens Wiklander
232cfd6d91 optee: support routing of rpmb data frames to mmc
Adds support in optee supplicant to route signed (MACed) RPMB frames
from OP-TEE Secure OS to MMC and vice versa to manipulate the RPMB
partition.

Tested-by: Igor Opaniuk <igor.opaniuk@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-10-07 10:47:38 -04:00
Jens Wiklander
7ab5630a42 arm: dt: hikey: Add optee node
Sync with 14e21cb8f811 ("arm64: dt: hikey: Add optee node"
from Linux kernel.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
2018-10-07 10:47:38 -04:00
Jens Wiklander
1ea3fbe318 Documentation: tee uclass and op-tee driver
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
2018-10-07 10:47:38 -04:00
Jens Wiklander
d4bd3d25d8 tee: add OP-TEE driver
Adds a OP-TEE driver.

* Targets ARM and ARM64
* Supports using any U-Boot memory as shared memory
* Probes OP-TEE version using SMCs
* Uses OPTEE message protocol version 2 to communicate with secure world

Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Igor Opaniuk <igor.opaniuk@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
2018-10-07 10:47:38 -04:00
Jens Wiklander
53b6aac7b1 dt/bindings: add bindings for optee
Sync with c8bfafb15944 ("dt/bindings: add bindings for optee")
from Linux kernel.

Introduces linaro prefix and adds bindings for ARM TrustZone based OP-TEE
implementation.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
2018-10-07 10:47:38 -04:00
Jens Wiklander
9ff4a31175 Add UCLASS_TEE for Trusted Execution Environment
Adds a uclass to interface with a TEE (Trusted Execution Environment).

A TEE driver is a driver that interfaces with a trusted OS running in
some secure environment, for example, TrustZone on ARM cpus, or a
separate secure co-processor etc.

The TEE subsystem can serve a TEE driver for a Global Platform compliant
TEE, but it's not limited to only Global Platform TEEs.

The over all design is based on the TEE subsystem in the Linux kernel,
tailored for U-Boot.

Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Igor Opaniuk <igor.opaniuk@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
2018-10-07 10:47:38 -04:00
Jens Wiklander
4853ad3e13 mmc: rpmb: add mmc_rpmb_route_frames()
Adds mmc_rpmb_route_frames() to route RPMB data frames from/to an
external entity.

Tested-by: Igor Opaniuk <igor.opaniuk@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-10-07 10:47:38 -04:00
Jens Wiklander
6d89902d7a cmd: avb: print error message if command fails
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
2018-10-07 10:47:38 -04:00
Jens Wiklander
ab2d738239 cmd: avb read_rb: print rb_idx in hexadecimal
Prior to this patch was do_avb_write_rb() reading supplied rb_idx as a
hexadecimal number while do_avb_read_rb() printed the read out rb_idx as
decimal number. For consistency change do_avb_read_rb() to print rb_idx
as a hexadecimal number too.

Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Igor Opaniuk <igor.opaniuk@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
2018-10-07 10:47:38 -04:00
Jens Wiklander
747558d014 dm: fdt: scan for devices under /firmware too
Just as /chosen may contain devices /firmware may contain devices, scan
for devices under /firmware too.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
2018-10-07 10:47:38 -04:00
Michal Simek
51c12319b4 spl: spi: Do not hardcode fixed size for header
Find out size directly from header structure.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-10-06 14:09:42 -04:00
Michal Simek
83a64560dd spl: ram: Fix u_boot_pos calculation
The patch:
"spl: Weed out CONFIG_SYS_TEXT_BASE usage"
(sha1: 04ce5427bd)
introduced bug where assigning to u_boot_pos variable wasn't done
which end up in situation where SPL wasn't able to find out
image on the selected address.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-10-06 14:09:41 -04:00
Patrice Chotard
362612df53 mach-stm32: Set MPU SDRAM size to 512MB for STM32F7/H7
This allows to boot all STM32F7 and STM32H7 boards independently
of the amount of embedded SDRAM.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Vikas Manocha <vikas.manocha@st.com>
2018-10-06 14:09:41 -04:00
Heinrich Schuchardt
f105fe7bc5 fs: fat: fix set_cluster()
Avoid CoverityScan warning SIGN_EXTENSION by changing the type of
parameter size of set_cluster().

Avoid leaking stack content when writing an incomplete last sector.

Reported-by: Coverity (CID: 184096)
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-10-06 14:09:41 -04:00
Heinrich Schuchardt
0d532e911c fs: fat: memory leak in fat_unlink()
Do not leak filename_copy in case of error.
Catch out of memory when calling strdup.

Reported-by: Coverity (CID: 184086)
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-10-06 14:09:41 -04:00
Adam Ford
46580f2fd5 ARM: LogicPD: omap3logic: Remove Torpedo/SOM-LV autodection
With there now being four device tree files, and 4 separate
defconfig files, the code necessary to determine which board is
being used is no longer necessary as the corresponding pin-muxing
and board names are determined by the device tree.

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-10-06 14:09:40 -04:00
Adam Ford
5ad4212ce0 ARM: DTS: Add Logic PD OMAP35/DM37 SOM-LV and OMAP35 Torpedo
With the device trees doing most of the work of pin-muxing and
DM doing much of the peripheral initialization, this creates
new defconfig files for each of the Logic PD variants with
proper register settings/pin-muxing.

Signed-off-by: Adam Ford <aford173@gmail.com>
[trini: Update MAINTAINERS entry]
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-10-06 14:09:27 -04:00
Adam Ford
e2e30f50a9 ARM: DTS: Add support for Logic PD OMAP35 Torpedo & SOM-LV
The baseboards and SOM's are virtually identical to their DM37
counterparts, but OMAP36/37 and OMAP3 have some minor register
differences.  With the boards being mostly driven by device trees
now, this synchronizes their respective device trees with linux-omap
for-next branch destined for 4.20 (or whatever the version after 4.19
will be called)

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-10-06 09:04:18 -04:00
Adam Ford
c981cb8dda ARM: DTS: Remove unnecessary u-boot.dtsi options from omap3/36xx
With the introduction of the omap serial driver, the need for some
of these U-Boot specific modifications is gone.  This cleans up
this unnneeded stuff.

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-10-06 09:04:18 -04:00
Adam Ford
87555d1415 ARM: DTS: LogicPD-SOM-LV & Torpedo: Resync DTS with Kernel
The device tree entries are from linux-omap's for-next branch
destined to me put into 4.20 (or whatever the version is after 4.19)

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-10-06 09:04:18 -04:00
Liviu Dudau
0fabfeb2c7 misc: Add support for the Arm Versatile Express config bus
Add support for the Arm Versatile Express config bus that is
being used for exposing various subsystems via a generic
configuration bus. This driver adds support for generating
transactions on this configuration bus and can be used by
other drivers to abstract the communication with the actual
function providers.

Signed-off-by: Liviu Dudau <liviu.dudau@foss.arm.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2018-10-06 09:04:18 -04:00
Simon Goldschmidt
6c6add6029 configs: drop CONFIG_SYS_EXTRA_ENV_RELOC
Instead of manually specifying CONFIG_SYS_EXTRA_ENV_RELOC
for every board that needs it, it shouldn't hurt to let
initr_reloc_global_data() always relocate gd->env_addr
unless we know this pointer is outside the initial binary.

To achieve this, the relocation is omitted if
CONFIG_ENV_ADDR is defined (and ENV_IS_EMBEDDED is not).

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2018-10-06 09:04:18 -04:00
Akashi Takahiro
c906f372b2 test/py: test_fs: add docstring comments to helper functions
After Siomon's comment, add a descriptive comment (docstring) to each of
helper functions in conftest.py. No functionality changed.

Signed-off-by: Akashi Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-10-06 09:04:18 -04:00
Akashi Takahiro
e4040df555 test/py: test_fs: remove fs_type argument from umount_fs()
Since there is no use of fs_type in umount_fs(), just remove it.

Signed-off-by: Akashi Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-10-06 09:04:18 -04:00
Stephen Warren
dddea0d0d7 test/py: ignore console read exceptions after test failure
After a test has failed, test/py drains the U-Boot console log to ensure
that any relevant output is captured. At this point, we don't care about
detecting any additional errors, since the test is already known to have
failed, and U-Boot will be restarted. To ensure that the test cleanup code
is not interrupted, and can correctly terminate the log sections for the
failed test, ignore any exception that occurs while reading the U-Boot
console output during this limited period of time.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2018-10-06 09:04:18 -04:00
Tom Rini
14573fb78f Merge branch 'master' of git://git.denx.de/u-boot-sh 2018-10-05 21:17:35 -04:00
Tom Rini
1b484736ce Merge branch 'master' of git://git.denx.de/u-boot-socfpga 2018-10-05 21:17:21 -04:00
Tom Rini
a4b38fca7e Merge tag 'rockchip-for-v2018.11-rc2' of git://git.denx.de/u-boot-rockchip
Rockchip-focused changes for v2018.11-rc2:
 - fixes to rkimage for SPL boot via USB
 - fixes to make_fit_atf.py, incl. entry-point calculation and python3
   compatibility
 - OP-TEE support for ARMv7-based SoCs
 - fixes to RGMII/GMII selection on the RK3328

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-10-05 13:40:42 -04:00
Tom Rini
46031b3aa0 Merge tag 'arc-updates-for-2018.11-rc2' of git://git.denx.de/u-boot-arc
Here we do a couple of impovements for all ARC boards
as well as introduce yet another developemnt board.

1. Now for ARC boards we print CPU and board info
   which is useful for users and helps with
   analysis of logs "post-mortem".

2. Synopsys IoT development kit support is added
   This one might bw a bit too late as we're past RC1
   but:
    1) This doesn't affect any other arches etc
       as we change purely ARC code.
    2) I've got a chance to talk about U-Boot on
       IoT platforms during ELCE (my proposal was on
       a wait list and only this week I've got
       an update and invitation to talk) so it would
       be good to have this board as a primer in upstream
       code-base by the time of ELCE 2018.
    3) For complete support of IoT devkit I'm yet to
       significantly rework regmap subsystem in U-Boot
       but that's a different topic and hopefully it will
       be done sometime soon... though not this release
       cycle for sure.
2018-10-05 10:16:31 -04:00
Alexey Brodkin
5396e8b1dd arc: Add support for IoT development kit
The DesignWare ARC IoT Development Kit is a versatile platform
that includes the necessary hardware and software to accelerate
software development and debugging of sensor fusion,
voice recognition and face detection designs.

More information is avaialble here [1] and here [2].

The board is based on real silicon with
ARC EM9D-based Data Fusion IP Subsystem.

It sports a rich set of I/O including
 * DW USB OTG
 * DW MobileStorage (used for micro SD-card)
 * GPIO
 * multiple serial interface including DW APB UART
 * ADC, PWM and eFlash, SRAM and SPI Flash memory
 * Real-Time Clock (RTC)
 * Bluetooth module with worldwide regulatory compliance
   (FCC, IC, CE, ETSI, TELEC)
 * On-board 9-axis sensor (gyro, accelerometer and compass)

Extensible with Arduino, Pmod, mikroBUS connectors and a 2x18
extension header.

One of the most interesting features for developers is built-in
Digilent USB JTAG probe so only micro-USB cable is needed!

[1] https://www.synopsys.com/dw/ipdir.php?ds=arc_iot_development_kit
[2] https://www.synopsys.com/dw/doc.php/ds/cc/iot_dev_kit.pdf

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-10-05 16:57:00 +03:00
Alexey Brodkin
f31414a0ed ARC: Enable DISPLAY_CPUINFO & DISPLAY_BOARDINFO
With implemented print_cpuinfo() and model property in .dts
we're ready to print nice info about ARC cores and boards on boot.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-10-05 16:55:42 +03:00
Alexey Brodkin
7fe46b969d ARC: Implement print_cpuinfo()
Once we enable DISPLAY_CPUINFO for ARC we'll see
ARC core family and version printed on boot.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-10-05 16:55:42 +03:00
Alexey Brodkin
c3dcd508b6 ARC: Add model property to boards .dts
1. This way we sync with Linux kernel where we have model
   set for all ARC boards for quite some time, see [1]

2. Once we enable DISPLAY_BOARDINFO for ARC this info will
   be printed on boot givin some extra data-point about the board

[1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=618a9cd06dd471ac232f5b27325b24d26eba5571

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-10-05 16:55:42 +03:00
Alexey Brodkin
56ddae7d91 ARC: Don't pre-define CROSS_COMPILE
Even though arc-linux- prefix is used in ARC prebuilt tools and
in Buildroot there're other options like Linux distro cross-tools
etc where prefix is different so let's not rely on this default.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-10-05 16:55:42 +03:00
Daniel Gröber
f25c1755a7 rockchip: Fix rkimage format for SPL boot over USB
The 'rkimage' format used for booting rockchip boards over USB seems to
have been broken since commit 7bf274b9ca ("rockchip: mkimage: use
imagename to select spl hdr & spl size"). That commit adds an offset of
RK_SPL_HDR_START(=2048) to the location the 'RKxx' header is written
at. However the bootrom expects this header to be the first four bytes of
the image, not at offset 2048. This appears to have been a copy paste
error since the 'rksd' and 'rkspi' image types do require this offset.

Furthermore commit 111bcc4fb6 ("rockchip: mkimage: pad the header to
8-bytes (using a 'nop') for RK3399"), commit 3d54eabcaf ("rockchip:
spl: RK3399: use boot0 hook to create space for SPL magic") and
commit 3082775692 ("rockchip: mkimage: update rkimage to support
pre-padded payloads") changed the way the space for the 'RKxx' header is
allocated and written to the image without adjusting 'rkimage'.

This commit fixes those mistakes and makes it possible to load u-boot SPL
over USB once more.

(Tested on RK3399)

Signed-off-by: Daniel Gröber <daniel@dps.uibk.ac.at>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-10-04 22:55:47 +02:00
Andreas Färber
c29c1e611e rockchip: make_fit_atf.py depends on u-boot
u-boot.itb depends on u-boot-nodtb.bin, which in turn depends on u-boot.
u-boot.its from Rockchip make_fit_atf.py (used by {evb,firefly}-rk3399)
wants to read u-boot but is lacking this dependency, so that u-boot.itb
cannot be built in one go. Detect its use and add the missing dependency.

Reported-by: Yousaf Kaukab <yousaf.kaukab@suse.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-10-04 21:15:46 +02:00
Janine Hagemann
3d1bd5b590 net: gmac_rockchip: Add handling for RGMII_ID/RXID/TXID
Using PHY internal delays in combination with the phy-mode
rgmii-id/rxid/txid was not possible. Only rgmii was supported.

Now we can disable rockchip's gmac delay lines and also use
rgmii-id/rxid/txid.

Based on commit eaf70ad14cbb ("net: stmmac: dwmac-rk: Add
handling for RGMII_ID/RXID/TXID") for mainline linux kernel.

Signed-off-by: Janine Hagemann <j.hagemann@phytec.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: David Wu <david.wu@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-10-04 21:15:46 +02:00
Janine Hagemann
04acabd22c net: gmac_rockchip: Fix a register write in rk3328_gmac_set_to_rgmii
We have to use RK3328_RXCLK_DLY_ENA_GMAC_ENABLE instead of
RK3328_RXCLK_DLY_ENA_GMAC_MASK in rk3328_gmac_set_to_rgmii()
to enable the RX delay.
The MASK was used in a wrong way.

Signed-off-by: Janine Hagemann <j.hagemann@phytec.de>
Reviewed-by: Philipp Tomisch <philipp.tomisch@theobroma-systems.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-10-04 21:15:46 +02:00
Mian Yousaf Kaukab
7009eae890 rockchip: make_fit_atf: make python3 compatible
Make script python3 compatible. No functional changes intended.

Signed-off-by: Mian Yousaf Kaukab <yousaf.kaukab@suse.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-10-04 21:15:46 +02:00
Mian Yousaf Kaukab
e4011e8daa rockchip: make_fit_atf: use elf entry point
make_fit_atf.py uses physical address of first segment as the
entry point to bl31. It is incorrect and causes following abort
when bl31_entry() is called:

U-Boot SPL board initTrying to boot from MMC1
"Synchronous Abort" handler, esr 0x02000000
elr: 0000000000000000 lr : 00000000ff8c7e8c
x 0: 00000000ff8e0000 x 1: 0000000000000000
x 2: 0000000000000000 x 3: 00000000ff8e0180
x 4: 0000000000000000 x 5: 0000000000000000
x 6: 0000000000000030 x 7: 00000000ff8e0188
x 8: 00000000000001e0 x 9: 0000000000000000
x10: 000000000007fcdc x11: 00000000002881b8
x12: 00000000000001a2 x13: 0000000000000198
x14: 000000000007fdcc x15: 00000000002881b8
x16: 00000000003c0724 x17: 00000000003c0718
x18: 000000000007fe80 x19: 00000000ff8e0000
x20: 0000000000200000 x21: 00000000ff8e0000
x22: 0000000000000000 x23: 000000000007fe30
x24: 00000000ff8d1c3c x25: 00000000ff8d5000
x26: 00000000deadbeef x27: 00000000000004a0
x28: 000000000000009c x29: 000000000007fd90

Fix it by using the entry point from the elf header.

Signed-off-by: Mian Yousaf Kaukab <yousaf.kaukab@suse.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-10-04 21:15:46 +02:00
Kever Yang
aabb51da59 rockchip: add fit source file for pack itb with op-tee
We package U-Boot and OP-TEE into one itb file for SPL,
so that we can support OP-TEE in SPL.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-10-04 21:15:46 +02:00
Kever Yang
70fe287635 spl: add support to booting with OP-TEE
OP-TEE is an open source trusted OS, in armv7, its loading and
running are like this:
loading:
- SPL load both OP-TEE and U-Boot
running:
- SPL run into OP-TEE in secure mode;
- OP-TEE run into U-Boot in non-secure mode;

To make code simple, it would be fine to use IH_OS_TEE for the
os tyle in TPL(just like IH_OS_LINUX is using both in SPL and U-Boot).

Here is the diagram for SPL loading OP-TEE,
IH_OS_TEE:(make u-boot.itb for SPL)
    Non-Secure       Secure

                     BootROM
                       |
                       v
                      SPL
                       |
                       v
          ---------  OP-TEE
         |
         v
       U-Boot
         |
         V
       Linux
For other two king of OP-TEE loading/booting, see commit message:
45b55712d4 image: Add IH_OS_TEE for TEE chain-load boot

More detail:
https://github.com/OP-TEE/optee_os
and search for 'boot arguments' for detail entry parameter in:
core/arch/arm/kernel/generic_entry_a32.S

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Cc: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-10-04 21:15:46 +02:00
Kever Yang
f00273a3a3 rockchip: make_fit_atf: fix warning unit_address_vs_reg
Patch fix warning:
/builddir/BUILD/u-boot-2018.05-rc2/"arch/arm/mach-rockchip/make_fit_atf.py" \
arch/arm/dts/rk3399-firefly.dtb > u-boot.its
  ./tools/mkimage  -f u-boot.its -E u-boot.itb >/dev/null  && cat
/dev/null
u-boot.itb.tmp: Warning (unit_address_vs_reg): Node /images/uboot@1
has a unit name, but no reg property
u-boot.itb.tmp: Warning (unit_address_vs_reg): Node /images/atf@1 has
a unit name, but no reg property
u-boot.itb.tmp: Warning (unit_address_vs_reg): Node /images/atf@2 has
a unit name, but no reg property
u-boot.itb.tmp: Warning (unit_address_vs_reg): Node /images/atf@3 has
a unit name, but no reg property
u-boot.itb.tmp: Warning (unit_address_vs_reg): Node /images/fdt@1 has
a unit name, but no reg property
u-boot.itb.tmp: Warning (unit_address_vs_reg): Node
/configurations/config@1 has a unit name, but no reg property
make[1]: Leaving directory
'/builddir/BUILD/u-boot-2018.05-rc2/builds/firefly-rk3399'

Reported-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-10-04 21:15:46 +02:00
Tom Rini
ad8c9f6146 Merge branch 'master' of git://git.denx.de/u-boot-spi 2018-10-04 09:18:30 -04:00
Stefan Roese
5eee9dee41 spi: Add SPI driver for MT76xx SoCs
This patch adds the SPI driver for the MediaTek MT7688 SoC (and
derivates). Its been tested on the LinkIt Smart 7688 and the Gardena
Smart Gateway with and SPI NOR on CS0 and on the Gardena Smart
Gateway additionally with an SPI NAND on CS1.

Note that the SPI controller only supports a max transfer size of 32
bytes. This driver implementes a workaround to enable bigger xfer
sizes to speed up the transfer especially for the SPI NAND support.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Jagan Teki <jagan@openedev.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Piotr Dymacz <pepe2k@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-10-04 18:27:28 +05:30
Stefan Roese
9e5c2a755a mtd: nand: spi: Add Gigadevice SPI NAND support
This patch adds support for Gigadevices SPI NAND device to the new SPI
NAND infrastructure in U-Boot. Currently only the 128MiB GD5F1GQ4UC
device is supported.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Miquel Raynal <miquel.raynal@bootlin.com>
Cc: Boris Brezillon <boris.brezillon@bootlin.com>
Cc: Jagan Teki <jagan@openedev.com>
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
Acked-by: Jagan Teki <jagan@openedev.com>
2018-10-04 18:24:24 +05:30
Stefan Roese
881e4fc206 sf: Add XMC xm25qh64a and xm25qh128a entries
This patch adds support for 2 new XMC (Wuhan Xinxin Semiconductor
Manufacturing Corp) SPI NOR chips.

This support can be enabled by selecting the SPI_FLASH_XMC Kconfig
option.

Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-10-04 18:21:23 +05:30
Tom Rini
a1588ac822 Merge tag 'rockchip-for-v2018.11' of git://git.denx.de/u-boot-rockchip
Rockchip changes for 2018.11
2018-10-03 12:09:19 -04:00
Tom Rini
94228a9188 Merge git://git.denx.de/u-boot-riscv
- QEMU support
2018-10-03 08:09:53 -04:00
Tom Rini
e5145ad0e8 Merge branch 'master' of git://git.denx.de/u-boot-i2c
Add support for the Arm's Versatile Express I2C controller.
2018-10-03 08:09:22 -04:00
Ooi, Joyce
8be11fb3c1 arm: socfpga: stratix10: add sgmii in phymode setup
Additional sgmii phymode is added in socfpga_phymode_setup() along with
a minor fix for maximum number of GMACs.

Signed-off-by: Ooi, Joyce <joyce.ooi@intel.com>
2018-10-03 12:56:50 +02:00
Ley Foon Tan
74c78024a0 arm: socfpga: Remove unused function socfpga_emac_manage_reset()
Remove code from the reset manager that is never called.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2018-10-03 12:56:50 +02:00
Atsushi Nemoto
0ca8fd37ae tools: socfpga: fix sfp_verify_header
Fix sfp_verify_header to return correct version number.
This fixes "Not a sane SOCFPGA preloader" error message with v1 header.

Signed-off-by: Atsushi Nemoto <atsushi.nemoto@sord.co.jp>
2018-10-03 12:56:50 +02:00
Ley Foon Tan
86d56a5da5 gpio: dwapb_gpio: Change to use devm_kcalloc()
Change to use managed resource function devm_kcalloc(),
so it will auto free memory when driver is removed.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2018-10-03 12:56:50 +02:00
Marek Vasut
806df252c1 ARM: rmobile: Enable PHY framework on Gen3
Enable PHY framework on Gen3, this is required for USB EHCI PHY support.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-10-03 12:56:13 +02:00
Marek Vasut
6cfc3d664e phy: rcar: Add R-Car Gen3 PHY driver
Add a PHY driver for the R-Car Gen3 which allows configuring
USB OTG PHY on Gen3 into host mode and toggles VBUS in case a
dedicated regulator is present.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-10-03 12:56:13 +02:00
Marek Vasut
c1ec347638 ARM: rmobile: Mark 4-64GiB as DRAM on Gen3
Mark area 0x1_0000_0000 - 0x10_0000_0000 as DRAM on Gen3 as the
chip is capable of addressing that and U-Boot can make use of it.
This patch prevents exception when accessing those areas.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-10-03 12:56:13 +02:00
Marek Vasut
6f031302a0 ARM: rmobile: Repair TMU clock on Gen2
The CPfi/4 is derived from XTAL clock and is not fixed. Undo
the previous commit 7984ac8d1635aebd11175c96b07f937a39f0384d.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2018-10-03 12:56:12 +02:00
Marek Vasut
2da6d39e26 ARM: dts: rmobile: Reinstate missing i2c6 on Porter
The I2C6 is used to communicate with the PMIC and it was removed
during DT sync with Linux 4.17. Reinstate it.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-10-03 12:56:12 +02:00
Heinrich Schuchardt
5845f66123 riscv: allow native compilation
If environment variable CROSS_COMPILE is not set, this indicates native
compilation. In this case we should not set an arbitrary value which is
not applicable for 64bit anyway.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-10-03 17:49:44 +08:00
Rick Chen
9d9b3dc0d5 riscv: cosmetic: Reword do_reset() printf message.
The Sentence "reset unsupported yet" is not
grammatically correct and should say
"reset not supported yet" instead.

Suggested-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Signed-off-by: Rick Chen <rick@andestech.com>
2018-10-03 17:49:27 +08:00
Bin Meng
b984ddc2dd riscv: Move do_reset() to a common place
We don't have a reset method on any RISC-V board yet. Instead of
adding the same 'unsupported' message for each CPU variant it might
make more sense to add a generic do_reset function for all CPU
variants to lib/, similar to the one for ARM (arch/arm/lib/reset.c).

Suggested-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
2018-10-03 17:48:43 +08:00
Bin Meng
510e379c49 riscv: Add QEMU virt board support
This adds QEMU RISC-V 'virt' board target support, with the hope of
helping people easily test U-Boot on RISC-V.

The QEMU virt machine models a generic RISC-V virtual machine with
support for the VirtIO standard networking and block storage devices.
It has CLINT, PLIC, 16550A UART devices in addition to VirtIO and
it also uses device-tree to pass configuration information to guest
software. It implements RISC-V privileged architecture spec v1.10.

Both 32-bit and 64-bit builds are supported. Support is pretty much
preliminary, only booting to U-Boot shell with the UART driver on
a single core. Booting Linux is not supported yet.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
2018-10-03 17:48:37 +08:00
Bin Meng
cd1f45c21d riscv: kconfig: Imply DM support for some common drivers
This implies DM support for some common drivers that are used on
RISC-V.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
2018-10-03 17:48:31 +08:00
Bin Meng
bf6cc82c7c riscv: kconfig: Select DM and OF_CONTROL
RISC-V is a pretty new architecture and should support DM and
OF_CONTROL by default.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
2018-10-03 17:48:25 +08:00
Bin Meng
4694c93fef riscv: ae350: Clean up mixed tabs and spaces in the dts
There are quite a lot of mixed tabs and spaces in the ae350.dts.
Clean them up.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
2018-10-03 17:48:19 +08:00
Bin Meng
b5369c5813 riscv: Make start.S available for all targets
Currently start.S is inside arch/riscv/cpu/ax25/, but it can be
common for all RISC-V targets.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
2018-10-03 17:48:14 +08:00
Bin Meng
ed49ba4dcc riscv: bootm: Pass mhartid CSR value to kernel
So far this is hardcoded to zero, and we should read the value from
mhartid CSR and pass it to Linux kernel.

Suggested-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Rick Chen <rick@andestech.com>
2018-10-03 17:48:08 +08:00
Bin Meng
e5ea1e5860 riscv: Remove CSR read/write defines in encoding.h
There is no reason to keep two versions of CSR read/write defines
in encoding.h. We already have one set of defines in csr.h, which
is from Linux kernel, and let's drop the one in encoding.h.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Rick Chen <rick@andestech.com>
2018-10-03 17:48:02 +08:00
Bin Meng
2fab2e9c88 riscv: Add a helper routine to print CPU information
This adds a helper routine to print CPU information. Currently
it prints all the instruction set extensions that the processor
core supports.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
2018-10-03 17:47:55 +08:00
Bin Meng
ce7a8e0740 riscv: Explicitly pass -march and -mabi to the compiler
At present the compiler flag against which architecture and abi
variant the riscv image is built for is not explicitly indicated
which means the default compiler configuration is used. But this
does not work if we want to build a different target (eg: 32-bit
riscv images using a toolchain configured for 64-bit riscv).

Fix this by explicitly passing -march and -mabi to the compiler.
Since generically we don't use floating point in U-Boot, specify
the RV[32|64]IMA ISA and software floating ABI.

This also fix some alignment coding style issues.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
2018-10-03 17:47:43 +08:00
Bin Meng
3d6015651b riscv: Fix coding style issues in the linker script
There are several coding style issues in the linker script. Fix them.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
2018-10-03 17:47:37 +08:00
Bin Meng
dfb828ed1c riscv: Move the linker script to the CPU root directory
The linker script can be shared by all RISC-V targets. Move it to
a common place.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
2018-10-03 17:47:31 +08:00
Bin Meng
058b77a9b8 riscv: cmd: bdinfo: Print the relocation address
Add printing of U-Boot relocation address.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
2018-10-03 17:47:24 +08:00
Bin Meng
8cdc6b58d7 riscv: Remove mach type
Since the mach_id is not used by RISC-V, remove it.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
2018-10-03 17:47:19 +08:00
Bin Meng
4afeedf172 riscv: bootm: Correct the 1st kernel argument to hart id
The first argument of Linux kernel is the risc-v core hart id,
from which the kernel is booted from. It is not the mach_id,
which seems to be copied from arm.

While we are here, this also changes the Linux kernel entry
parameters' type to support both 32-bit and 64-bit.

Note the hart id is hardcoded to zero for now, and we should
change to fill in it with the value read from mhartid CSR of
the hart which this routine is currently running on.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Rick Chen <rick@andestech.com>
2018-10-03 17:46:51 +08:00
Bin Meng
3ad4866dd7 riscv: Remove setup.h
This was copied from ARM, and does not apply to RISC-V. While we
are here, bootm.h is eventually removed as its content is only
the inclusion of setup.h.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
2018-10-03 17:44:44 +08:00
Bin Meng
117a433d9e riscv: kconfig: Normalize architecture name spelling
It's RISC-V that is the official name, not RISCV.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Rick Chen <rick@andestech.com>
2018-10-03 17:44:38 +08:00
Liviu Dudau
86c83e8400 i2c: Add support for the Arm's Versatile Express I2C controller.
The Arm Versatile Express I2C controller is a simple register-based
controller that uses a register to control the state of the SCL and
SDA lines. Add support for it.

Signed-off-by: Liviu Dudau <liviu.dudau@foss.arm.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2018-10-03 06:08:06 +02:00
Tom Rini
592cd5defd Merge branch 'master' of git://git.denx.de/u-boot-spi
This is the PR for SPI-NAND changes along with few spi changes.

[trini: Re-sync changes for ls1012afrwy_qspi*_defconfig]
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-10-02 17:01:46 -04:00
Marek Vasut
b3bec25256 spi: sh_qspi: Add DM support to SH QSPI driver
Add DM support to the SH QSPI driver while retaining non-DM support.
The later is required as this driver is used in SPL which has a size
limitation of 16 kiB.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
[jagan: use proper commit head]
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-10-02 22:14:59 +05:30
Ashish Kumar
4ccb2f2115 driver/spi: fsl_qspi: Remove non-DM stuff
Convert fsl_qspi.c to complete DM mode.

Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Tested-by: Rajat Srivastava <rajat.srivastava@nxp.com>
Tested-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-10-02 22:13:58 +05:30
Ley Foon Tan
6ac5909f51 spi: designware_spi: Add reset ctrl to driver
Add code to reset all reset signals as in SPI DT node. A reset property
is an optional feature, so only print out a warning and do not fail if a
reset property is not present.

If a reset property is discovered, then use it to deassert, thus
bringing the IP out of reset.

Release reset when _remove().

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Acked-by: Marek Vasut <marex@denx.de>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-10-02 22:13:58 +05:30
Miquel Raynal
938db6fe5d cmd: mtdparts: describe as legacy
The 'mtdparts' command is not needed anymore. While the environment
variable is still valid (and useful, along with the 'mtdids' one), the
command has been replaced by 'mtd' which is much more close to the MTD
stack and do not add its own specific glue.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com>
2018-10-02 22:12:32 +05:30
Miquel Raynal
c58fb2cdb3 cmd: ubi: clean the partition handling
UBI should not mess with MTD partitions, now that the partitions are
handled in a clean way, clean the ubi command and avoid using this
uneeded extra-glue to reference the devices.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com>
2018-10-02 22:12:32 +05:30
Miquel Raynal
5db66b3aee cmd: mtd: add 'mtd' command
There should not be a 'nand' command, a 'sf' command and certainly not
a new 'spi-nand' command. Write a 'mtd' command instead to manage all
MTD devices/partitions at once. This should be the preferred way to
access any MTD device.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Acked-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com>
2018-10-02 22:12:32 +05:30
Miquel Raynal
2a74930da5 mtd: mtdpart: implement proper partition handling
Instead of collecting partitions in a flat list, create a hierarchy
within the mtd_info structure: use a partitions list to keep track of
the partitions of an MTD device (which might be itself a partition of
another MTD device), a pointer to the parent device (NULL when the MTD
device is the root one, not a partition).

By also saving directly in mtd_info the offset of the partition, we
can get rid of the mtd_part structure.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com>
2018-10-02 22:12:32 +05:30
Miquel Raynal
ff4afa8a98 mtd: uboot: search for an equivalent MTD name with the mtdids
Using an MTD device (resp. partition) name in mtdparts is simple and
straightforward. However, for a long time already, another name was
given in mtdparts to indicate a device (resp. partition) so the
"mtdids" environment variable was created to do the match.

Let's create a function that, from an MTD device (resp. partition)
name, search for the equivalent name in the "mtdparts" environment
variable thanks to the "mtdids" string.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com>
2018-10-02 22:12:32 +05:30
Miquel Raynal
21cc1fb5af mtd: mtdpart: add a generic mtdparts-like parser
The current parser is very specific to U-Boot mtdparts implementation.
It does not use MTD structures like mtd_info and mtd_partition. Copy
and adapt the current parser in drivers/mtd/mtd-uclass.c (to not break
the current use of mtdparts.c itself) and write some kind of a wrapper
around the current implementation to allow other commands to benefit
from this parsing in a user-friendly way.

This new function will allocate an mtd_partition array for each
successful call. This array must be freed after use by the caller.
The given 'mtdparts' buffer pointer will be moved forward to the next
MTD device (if any, it will point towards a '\0' character otherwise).

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Acked-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com>
2018-10-02 22:12:31 +05:30
Miquel Raynal
e9f62db64b mtd: uclass: add probe function
The user might want to trigger the probe of any MTD device, export these
functions so they can be called from a command source file.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Acked-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com>
2018-10-02 22:12:31 +05:30
Miquel Raynal
739def7253 dm: drop unused helper in MTD header
include/mtd.h might be included by files even if CONFIG_DM is not
enabled. In this case, the call to dev_get_uclass_priv() would trigger
a build error. Because this helper has no user, let's drop it off.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-10-02 22:12:21 +05:30
Heiko Stuebner
e4d5fa3db0 rockchip: rk3188: explicitly set vcc_sd0 pin to gpio on rk3188-radxarock
It is good practice to make the setting of gpio-pinctrls explicitly in the
devicetree, and in this case even necessary.
Rockchip boards start with iomux settings set to gpio for most pins and
while the linux pinctrl driver also implicitly sets the gpio function if
a pin is requested as gpio that is not necessarily true for other drivers.

The issue in question stems from uboot, where the sdmmc_pwr pin is set
to function 1 (sdmmc-power) by the bootrom when reading the 1st-stage
loader. The regulator controlled by the pin is active-low though, so
when the dwmmc hw-block sets its enabled bit, it actually disables the
regulator. By changing the pin back to gpio we fix that behaviour.

[picked from the identical linux patch
https://patchwork.kernel.org/patch/10609253/]
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-10-02 09:35:39 +02:00
Heiko Stuebner
598a26a8fb rockchip: rk3188: add u-boot-specific mmc properties
The dwmmc controllers on rk3188 do not have idma support, so need to
use the fifo-mode and it my tests they became confused and stopped
working if the frequency was to high.

While I only tested in somewhat bigger steps, 32MHz for example
hung the controller, while reducing it to 16MHz worked just fine
and is reasonably fast to load a kernel from mmc.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-10-02 09:35:19 +02:00
Heiko Stuebner
26a52f3473 rockchip: dwmmc: add rk2928-dw-mshc compatible
The rk3188 works nicely with the rockchip mmc driver, so we just need
to add the different compatible for it - as used in the Linux kernel.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-10-02 09:35:09 +02:00
Heiko Stuebner
05fa06b960 mmc: dw_mmc: check fifo status with a timeout in fifo mode
While trying to enable the dw_mmc on rk3188 I managed to confuse
and hang the dw_mmc controller into not delivering further data.
The fifo state never became ready and the driver was iterating in
the while loop reading 0-byte packets forever.

So inspired by how other implementations handle this, check the fifo-
state beforhand and add a timeout to catch any glaring fifo issues
without hanging uboot altogether.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-10-02 09:35:09 +02:00
Tom Rini
2ba8bf2074 Prepare v2018.11-rc1
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-10-01 20:32:03 -04:00
Eugen Hristev
2f812824c5 MAINTAINERS: at91: update entry for at91 boards
Updated the maintainership for the at91 boards.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2018-10-01 10:44:14 -04:00
Tom Rini
d24c1d0f4d Merge git://git.denx.de/u-boot-dm 2018-09-30 18:16:51 -04:00
Tom Rini
2c1e16b9d2 MAINTAINERS: Update some entries for missed boards
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-09-30 13:00:37 -04:00
Marek Vasut
c9795396ed fs: btrfs: Fix cache alignment bugs
The btrfs implementation passes cache-unaligned buffers into the
block layer, which triggers cache alignment problems down in the
block device drivers. Align the buffers to prevent this.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Marek Behun <marek.behun@nic.cz>
2018-09-30 13:00:37 -04:00
Ramon Fried
30b3241368 usb:ci_udc: don't overwrite configuration on pullup
change writel to writebits32 in ci_pullup() in order
to keep phy configuration in tact.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
2018-09-30 13:00:37 -04:00
Ramon Fried
aa043ee91a db410c: automatically launch fastboot
If during boot the key-vol-down press is detected
we'll fall back to fastboot.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
2018-09-30 13:00:37 -04:00
Ramon Fried
0a195b0135 DB410c: Enable fastboot support
Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
2018-09-30 13:00:37 -04:00
Ramon Fried
246670417c usb: ehci-msm: Add init_after_reset for CI_UDC
MSM uses the chipidea controller IP, however it requires
to reinit the phy after controller reset. in EHCI mode there's a
dedicated callback for it.
In device mode however there's no such callback.
Add implementaion of ci_init_after_reset() to implement the above
requirement in case CI_UDC driver is used.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
2018-09-30 13:00:37 -04:00
Ramon Fried
816495299d usb:ci_udc: Introduce init_after_reset phy function
MSM variant of Chipidea must reinitalize the phy
after controller reset.
Introduce ci_init_after_reset() weak function that
can be used to achieve the above init.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
2018-09-30 13:00:36 -04:00
Ramon Fried
0683b27ae3 ehci: msm: use init_type in probe
Change ehci_usb_probe() function to initialize the
USB according to the init_type provided.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
2018-09-30 13:00:36 -04:00
Ramon Fried
0ac0b6eb6a ehci: msm: switch to generic PHY uclass
All the underlying USB PHY was handled in the ehci driver.
Use the generic phy API instead.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
2018-09-30 13:00:36 -04:00
Ramon Fried
7846dbdf48 configs: db410c: Enable USB PHY
Enable USB PHY driver.
Also fixed the alphabetically ordering of the config.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
2018-09-30 13:00:36 -04:00
Ramon Fried
665e452515 dts: db410c: Add bindings for MSM USB phy
Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
2018-09-30 13:00:36 -04:00
Ramon Fried
92454e47bc phy: db410c: Add MSM USB PHY driver
Add a PHY driver for the Qualcomm dragonboard 410c which
allows switching on/off and resetting the phy connected
to the EHCI controllers and USBHS controller.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
2018-09-30 13:00:36 -04:00
Ramon Fried
2df573e6a5 db410c: serial# env using msm board serial
The serial# environment variable needs to be
defined so it will be used by fastboot as serial
for the endpoint descriptor.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
2018-09-30 13:00:35 -04:00
Ramon Fried
6b0861a942 dts: db410c: add alias for USB
Alias is required so req-seq will be filled.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
2018-09-30 13:00:35 -04:00
Ramon Fried
2df49234c6 ehci: msm: Add missing platdata
platdata_auto_alloc_size was not initialized in structure.
Caused null pointer dereference when configuring device as
gadget.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
2018-09-30 13:00:35 -04:00
Ramon Fried
cd8c3aec7f ehci: Replace board_prepare_usb with board_usb_init
Use standard board_usb_init() instead of the specific board_prepare_usb.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
2018-09-30 13:00:35 -04:00
Patrice Chotard
95a077217b serial: serial_stm32: Enable uart FIFO for STM32F7xx SoCs
Since commit 7b3b74d321 ("serial: serial_stm32: Enable overrun")
on STM32F7xx based boards, the first lines of serial output are
missing during boot (we no more see the U-Boot release version,
board model and DRAM size).

By enabling the uart FIFO on STM32F7, the complete U-boot log
can be sent correctly.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-09-30 13:00:35 -04:00
Neil Stainton
18f201ea20 u-boot: align cache flushes in load_elf_image_shdr to line boundaries
Prevent cache warning messages when using the 'bootelf' command on an
Arm target. Round down each section start address and round up the
respective section end to the nearest cache line.

Signed-off-by: Neil Stainton <nstainton@asl-control.co.uk>
[trini: Manually apply, rework whitespace]
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-09-30 13:00:34 -04:00
Masahiro Yamada
0c54411537 kbuild: fix # escaping in appending U-Boot own DT
The escape sequence '\#' does not work for the latest GNU Make from
the git tree.

Replace it with $(pound) as Linux did.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-09-30 13:00:34 -04:00
Rasmus Villemoes
e5e701c2b8 Kbuild: fix # escaping in .cmd files for future Make
[ commit 9564a8cf422d7b58f6e857e3546d346fa970191e in Linux ]

I tried building using a freshly built Make (4.2.1-69-g8a731d1), but
already the objtool build broke with

orc_dump.c: In function ‘orc_dump’:
orc_dump.c:106:2: error: ‘elf_getshnum’ is deprecated [-Werror=deprecated-declarations]
  if (elf_getshdrnum(elf, &nr_sections)) {

Turns out that with that new Make, the backslash was not removed, so cpp
didn't see a #include directive, grep found nothing, and
-DLIBELF_USE_DEPRECATED was wrongly put in CFLAGS.

Now, that new Make behaviour is documented in their NEWS file:

  * WARNING: Backward-incompatibility!
    Number signs (#) appearing inside a macro reference or function invocation
    no longer introduce comments and should not be escaped with backslashes:
    thus a call such as:
      foo := $(shell echo '#')
    is legal.  Previously the number sign needed to be escaped, for example:
      foo := $(shell echo '\#')
    Now this latter will resolve to "\#".  If you want to write makefiles
    portable to both versions, assign the number sign to a variable:
      C := \#
      foo := $(shell echo '$C')
    This was claimed to be fixed in 3.81, but wasn't, for some reason.
    To detect this change search for 'nocomment' in the .FEATURES variable.

This also fixes up the two make-cmd instances to replace # with $(pound)
rather than with \#. There might very well be other places that need
similar fixup in preparation for whatever future Make release contains
the above change, but at least this builds an x86_64 defconfig with the
new make.

Link: https://bugzilla.kernel.org/show_bug.cgi?id=197847
Cc: Randy Dunlap <rdunlap@infradead.org>
Signed-off-by: Rasmus Villemoes <linux@rasmusvillemoes.dk>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-09-30 13:00:34 -04:00
Alex Kiernan
aa608b6c99 spl: mmc: Report device number when we fail
If we fail to find the MMC boot device, report the number of the one
we were looking for in the error to aid diagnosis.

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
2018-09-30 13:00:34 -04:00
Liviu Dudau
a71e907c4d clk: Add support for Arm's Versatile Express OSC clock generators
The Arm Versatile Express and Juno development boards contain an
OSC clock generator that can be accessed through the Versatile
Express config bus. The generators are quite often being controlled
by some MCU and the config bus offers a uniform way of exposing them.

Signed-off-by: Liviu Dudau <liviu.dudau@foss.arm.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2018-09-30 13:00:34 -04:00
Neil Stainton
d71b029d1d cmd: env: Fix CRC calculation for 'env export -c -s'
Fix failure to reimport exported checksummed, size constrained data block.

'env export -c' command ignores optional -s size argument when calculating checksum causing subsequent 'env import -c' to fail.

Signed-off-by: Neil Stainton <nstainton@asl-control.co.uk>
2018-09-30 13:00:23 -04:00
Tom Rini
b592936d35 Merge branch 'master' of git://git.denx.de/u-boot-video
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-09-29 22:28:44 -04:00
Rajan Vaja
31b8217e83 dm: test: Add "/firmware" node scan test
Add a test which verifies that all subnodes under "/firmware"
nodes are scanned.

Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Added 'imply FIRMWARE' to sandbox Kconfig to fix test failures, fixed
ordering of lines in arch/sandbox/dts/test.dts and test/dm/Makefile,
updated #if condition in drivers/firmware/firmware-uclass.c:
Signed-off-by: Simon Glass <sjg@chromium.org>
2018-09-29 11:49:35 -06:00
Rajan Vaja
e7a52ba65b firmware: Add FIRMWARE config prompt string
There is no prompt string for FIRMWARE config. Without this,
FIRMWARE config cannot be enabled through menuconfing or
config file. Fix this by adding prompt summary.

Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-09-29 11:49:35 -06:00
Simon Glass
969c8f4d5a sandbox: Add an explanation of the sandbox variants
There are quite a few builds of sandbox now. Add information about these
to the README.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-09-29 11:49:35 -06:00
Simon Glass
e62a24ce27 buildman: Avoid hanging when the config changes
Something has changed in the last several month such that when buildman
builds U-Boot incrementally and a new CONFIG option has been added to the
Kconfig, the build hanges waiting for input:

    Test new config (NEW_CONFIG) [N/y/?] (NEW)

Since binamn does not connect the build's stdin to anything this waits on
stdin to the build thread, which never comes. Eventually I suspect all the
threads end up in this state and the build does not progress.

Fix this by passing /dev/null as input to the build. That way, if there is
a new CONFIG, the build will stop (and fail):

    Test new config (NEW_CONFIG) [N/y/?] (NEW)

    Error in reading or end of file.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-09-29 11:49:35 -06:00
Liviu Dudau
3eb992a481 include/dm.h: Remove duplicated include directive
Remove duplicated inclusion of dm/ofnode.h

Signed-off-by: Liviu Dudau <liviu.dudau@foss.arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
Drop period at end of commit subject:
Signed-off-by: Simon Glass <sjg@chromium.org>
2018-09-29 11:49:35 -06:00
Liviu Dudau
9bf8650677 include/clk.h: Fix the name of the clock uclass in comment
The comment references a structure name that doesn't exist. Use
the name of the actual uclass.

Signed-off-by: Liviu Dudau <liviu.dudau@foss.arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
Drop period at end of commit subject:
Signed-off-by: Simon Glass <sjg@chromium.org>
2018-09-29 11:49:35 -06:00
Jens Wiklander
c35a7d375e fdt: fdtdec_setup_memory_banksize() use livetree
Converts fdtdec_setup_memory_banksize() to use ofnode functions instead.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
2018-09-29 11:49:35 -06:00
Marek Vasut
ff8eee0330 cmd: clk: Add trivial implementation of clock dump for DM
Add trivial implementation of the clk dump in case DM is enabled.
This implementation just iterates over all the clock registered
with the CLK uclass and prints their rate.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
2018-09-29 11:49:35 -06:00
Mario Six
e6fd018108 test: Add tests for board uclass
Add tests for the new board uclass.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-09-29 11:49:35 -06:00
Mario Six
6238ae4d60 board: Add gazerbeam driver
Add a board driver for the upcoming gdsys Gazerbeam board.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-09-29 11:49:35 -06:00
Mario Six
5381c2856d drivers: Add board uclass
Since there is no canonical "board device" that can be used in board
files, it is difficult to use DM function for board initialization in
these cases.

Hence, add a uclass that implements a simple "board device", which can
hold devices not suitable anywhere else in the device tree, and is also
able to read encoded information, e.g. hard-wired GPIOs on a GPIO
expander, read-only memory ICs, etc. that carry information about the
hardware.

The devices of this uclass expose methods to read generic data types
(integers, strings, booleans) to encode the information provided by the
hardware.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-09-29 11:49:35 -06:00
Mario Six
172942a4a0 test: Add tests for dev_{enable, disable}_by_path
Add tests for the dev_{enable,disable}_by_path functions.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-09-29 11:49:35 -06:00
Mario Six
e4c98a59db core: Add dev_{disable,enable}_by_path
We cannot use device structures to disable devices, since getting
them with the API functions would bind and activate the device, which
would fail if the underlying device does not exist.
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-09-29 11:49:35 -06:00
Mario Six
2ea4d0db73 test: Add tests for DT-manipulation functions
Add tests for the ofnode_set_enabled, ofnode_write_string, and
ofnode_write_property functions.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-09-29 11:49:35 -06:00
Mario Six
e369e58df7 core: Add functions to set properties in live-tree
Implement a set of functions to manipulate properties in a live device
tree:

* ofnode_write_prop() to set generic properties of a node
* ofnode_write_string() to set string properties of a node
* ofnode_set_enabled() to either enable or disable a node

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-09-29 11:49:35 -06:00
Simon Glass
163ed6c342 binman: Allow writing a map file when something goes wrong
When we get a problem like overlapping regions it is sometimes hard to
figure what what is going on. At present we don't write the map file in
this case. However the file does provide useful information.

Catch any packing errors and write a map file (if enabled with -m) to aid
debugging.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-09-29 11:49:35 -06:00
Simon Glass
fe1ae3ecc3 binman: Support ELF files for U-Boot and SPL
For sandbox we want to put ELF files in the image since that is what we
need to execute. Add support for this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-09-29 11:49:35 -06:00
Simon Glass
f8f8df6eb8 binman: Correct fmap output on x86
Normally x86 platforms use the end-at-4gb option. This currently produces
an FMAP with positions which have a large offset. The use of end-at-4gb is
a useful convenience within binman, but we don't really want to export
a map with these offsets.

Fix this by subtracting the 'skip at start' parameter.

Also put the code which convers names to fmap format, for clarity.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-09-29 11:49:35 -06:00
Simon Glass
08723a7abb binman: Record the parent section of each section
At present sections have no record of their parent so it is not possible
to traverse up the tree to the root and figure out the position of a
section within the image.

Change the constructor to record this information.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-09-29 11:49:35 -06:00
Simon Glass
f025363543 binman: Support x86 microcode in TPL
When TPL is used on x86 we may want to program the microcode (at least for
the first CPU) early in boot. Add support for this by refactoring the
existing code to be more generic.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-09-29 11:49:35 -06:00
Simon Glass
e0e5df9310 binman: Support hashing entries
Sometimesi it us useful to be able to verify the content of entries with
a hash. Add an easy way to do this in binman. The hash information can be
retrieved from the device tree at run time.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-09-29 11:49:35 -06:00
Simon Glass
9c888cca5e binman: Mention section attributes in docs
Images and sections have the same attributes, since an image is mostly
just a top-level section. Update the docs to explain this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-09-29 11:49:35 -06:00
Simon Glass
ba64a0bbb7 binman: Support expanding entries
It is useful to have entries which can grow automatically to fill
available space. Add support for this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-09-29 11:49:35 -06:00
Simon Glass
0a98b28b06 binman: Support adding files
In some cases it is useful to add a group of files to the image and be
able to access them at run-time. Of course it is possible to generate
the binman config file with a set of blobs each with a filename. But for
convenience, add an entry type which can do this.

Add required support (for adding nodes and string properties) into the
state module.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-09-29 11:49:35 -06:00
Simon Glass
b4e1a38c29 binman: Allow zero-size sections
At present if there is only a zero-size entry in a section this is
reported as an error, e.g.:

   Offset 0x0 (0) is outside the section starting at 0x0 (0)

Adjust the logic in CheckEntries() to avoid this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-09-29 11:49:35 -06:00
Simon Glass
83d73c2f7c binman: Support compressed entries
Add support for compressing blob entries. This can help reduce image sizes
for many types of data. It requires that the firmware be able to
decompress the data at run-time.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-09-29 11:49:32 -06:00
Tom Rini
cc49e2bdb8 Merge branch 'master' of git://git.denx.de/u-boot-sunxi 2018-09-29 11:48:02 -04:00
Tom Rini
d29a583161 Merge tag 'mpc85xx-for-v2018.11-rc1' of git://git.denx.de/u-boot-mpc85xx
Use device tree for mpc85xx with binman. Enabled for T2080QDS.
2018-09-29 11:47:50 -04:00
Tom Rini
27f622d568 Merge tag 'fsl-qoriq-for-v2018.11-rc1' of git://git.denx.de/u-boot-fsl-qoriq
Switch to driver model for eSDHC on Layerscape SoCs including LS1021A,
LS1043A, LS1046A, LS1088A, LS2088A.
Switch to driver model for SATA on LS1021A and LS1043A.
Add support for LS1012AFRWY rev C board.
Enable SMMU for LS1043A.
2018-09-29 11:47:32 -04:00
Christian Gmeiner
83f6f608c2 Convert CONFIG_DISABLE_CONSOLE to Kconfig
This converts the following to Kconfig:
   CONFIG_DISABLE_CONSOLE

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2018-09-29 08:07:29 -04:00
Adam Ford
973fcc8dae ARM: da850evm_direct_nor_defconfig: Enable DM_SERIAL
With DM enabled, this patch enables DM_SERIAL and removes
the NS16550 initialization from da850_lowlevel since the driver
will take care of that itself.

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-09-29 08:07:28 -04:00
Adam Ford
42140dd096 ARM: omap3_logic: Remove non-DM MMC initialization
With DM_MMC working for both SPL and U-Boot, this patch removes
the legacy style of initializing the MMC driver.

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-09-29 08:07:28 -04:00
Adam Ford
2909abd0e0 ARM: omap3_logic: Remove some manual pin-muxing
With the pinctrl function enabled and the device tree setting up
the pins we want to use, this patch removes the manual pinmuxing
except for that which is not done by the device tree and minimal
pins necessary for SPL (like serial, GPMC, and MMC)

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-09-29 08:07:28 -04:00
Adam Ford
626a9ec58c ARM: am3517_evm: Enable TCA6416PW GPIO Expander
With DM_I2C and DM_GPIO working, this patch can enable the
GPIO expander on the I2C bus.  This GPIO expander is connected
to some of the DIP switches and can now read the status of these
pins.

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-09-29 08:07:27 -04:00
Adam Ford
5a5e55ba29 ARM: da850evm: Pinctrl for da850evm
The simple pin controller works for da850, so this patch enables
this to pin-mux the pins defined in the device tree for the da850evm.

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-09-29 08:07:27 -04:00
Adam Ford
5b3b429904 ARM: da850evm: Enable CMD_DM for da850evm
With DM enabled, this patch enables the 'dm' command to access
the dm tree, uclass and devres.

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-09-29 08:07:27 -04:00
Adam Ford
57dbf754e3 ARM: am3517_evm: Enable Pinctrl
The simple pinctrl driver currently available works with the omap3.
Enabling this will use the device tree to automatically set the
pin-muxing for various drivers.

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-09-29 08:07:26 -04:00
Adam Ford
577c40ae1d cmd: Relocate poweroff under Device access commands
Previously poweroff was located under boot.  It seems to make more
sense to have it located under the Device access commands.

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-09-29 08:07:26 -04:00
Adam Ford
96a82d33f8 ARM: DTS: various omap3: Remove cd-inverted from u-boot.dtsi
With the omap_mmc driver no longer supporting cd-inverted, this
patch removes all these references since they are not needed.

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-09-29 08:07:26 -04:00
Adam Ford
f4df405f0e mmc: omap_mmc: Remove invert references
With DM_GPIO and DM_MMC translating GPIO_ACTIVE_LOW, any boards
using the 'cd-invert' option will no longer need to do this.  This
patch removes the support for 'invert' from the MMC driver.

Signed-off-by: Adam Ford <aford173@gmail.com>
[trini: Fix warning over when !DM_GPIO]
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-09-29 08:06:56 -04:00
Eugen Hristev
57fb8b4654 ARM: dts: at91: sama5d4_xplained: add onewire connector for LCD eeprom
Add onewire node in device tree for TM series LCDs

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2018-09-28 20:22:44 -04:00
Eugen Hristev
db17fbfd96 ARM: dts: at91: sama5d2_ptc: add onewire connector for LCD eeprom
Add onewire node in device tree for TM series LCDs

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2018-09-28 20:22:43 -04:00
Eugen Hristev
d656875372 ARM: dts: at91: sama5d27_som1_ek: add onewire connector for LCD eeprom
Add onewire node in device tree for TM series LCDs

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2018-09-28 20:22:43 -04:00
Eugen Hristev
2b238c6cdb ARM: dts: at91: sama5d3_xplained: add onewire connector for LCD eeprom
Add onewire node in device tree for TM series LCDs

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2018-09-28 20:22:43 -04:00
Eugen Hristev
7f0110d47e ARM: dts: at91: sama5d2_xplained: add onewire connector for LCD eeprom
Add onewire node in device tree for TM series LCDs

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2018-09-28 20:22:42 -04:00
Eugen Hristev
d67d725457 configs: sama5d4_xplained: add fdt overlay support
Add commands for fdt overlay merging. This is required for the boot scripts
that detect PDAs and apply specific overlays to the DTB passed on to kernel.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2018-09-28 20:22:42 -04:00
Eugen Hristev
f3661f1b99 configs: sama5d27_som1_ek: add fdt overlay support
Add commands for fdt overlay merging. This is required for the boot scripts
that detect PDAs and apply specific overlays to the DTB passed on to kernel.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2018-09-28 20:22:42 -04:00
Eugen Hristev
9d432d9911 configs: sama5d2_ptc_ek: add fdt overlay support
Add commands for fdt overlay merging. This is required for the boot scripts
that detect PDAs and apply specific overlays to the DTB passed on to kernel.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2018-09-28 20:22:41 -04:00
Eugen Hristev
2188c9cdfa configs: sama5d3_xplained: add fdt overlay support
Add commands for fdt overlay merging. This is required for the boot scripts
that detect PDAs and apply specific overlays to the DTB passed on to kernel.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2018-09-28 20:22:41 -04:00
Eugen Hristev
f377f7040e configs: sama5d2_xplained: add fdt overlay support
Add commands for fdt overlay merging. This is required for the boot scripts
that detect PDAs and apply specific overlays to the DTB passed on to kernel.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2018-09-28 20:22:41 -04:00
Eugen Hristev
95501d5242 board: sama5d4_xplained: add pda detect call at init time
Call the PDA detection mechanism at boot time so we can have
the pda environment variable ready for use.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2018-09-28 20:22:41 -04:00
Eugen Hristev
cc1bdd23c0 board: sama5d2_ptc_ek: add pda detect call at init time
Call the PDA detection mechanism at boot time so we can have
the pda environment variable ready for use.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2018-09-28 20:22:40 -04:00
Eugen Hristev
67f551af89 board: sama5d27_som1_ek: add pda detect call at init time
Call the PDA detection mechanism at boot time so we can have
the pda environment variable ready for use.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2018-09-28 20:22:40 -04:00
Eugen Hristev
59e43c3291 board: sama5d3_xplained: add pda detect call at init time
Call the PDA detection mechanism at boot time so we can have
the pda environment variable ready for use.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2018-09-28 20:22:40 -04:00
Eugen Hristev
559ff9e875 board: sama5d2_xplained: add pda detect call at init time
Call the PDA detection mechanism at boot time so we can have
the pda environment variable ready for use.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2018-09-28 20:22:39 -04:00
Eugen Hristev
afaea1f56c board: atmel: add support for pda detection
This adds the support for PDA detection as common code for
Atmel boards.
Using the one wire interface over GPIO , an EEPROM memory is read
and compared to preprogrammed values for PDA screens TM4300, TM7000
and TM7000B.
Once the PDA is detected, an environment variable is set accordingly.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2018-09-28 20:22:39 -04:00
Eugen Hristev
e42561880c configs: sama5d4_xplained: add onewire and eeprom drivers
SAMA5D4 SoC can have extra clip boards (PDAs) connected, which have
an EEPROM memory for identification. A special GPIO can be used to read
this memory over 1wire protocol.
Enabling one wire and eeprom drivers for this memory.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2018-09-28 20:22:39 -04:00
Eugen Hristev
cd83bb371f configs: sama5d2_ptc_ek: add onewire and eeprom drivers
SAMA5D2 SoC can have extra clip boards (PDAs) connected, which have
an EEPROM memory for identification. A special GPIO can be used to read
this memory over 1wire protocol.
Enabling one wire and eeprom drivers for this memory.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2018-09-28 20:22:38 -04:00
Eugen Hristev
aadb42272e configs: sama5d27_som1_ek: add onewire and eeprom drivers
SAMA5D2 SoC can have extra clip boards (PDAs) connected, which have
an EEPROM memory for identification. A special GPIO can be used to read
this memory over 1wire protocol.
Enabling one wire and eeprom drivers for this memory.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2018-09-28 20:22:38 -04:00
Eugen Hristev
2db04401fb configs: sama5d3_xplained: add onewire and eeprom drivers
SAMA5D3 SoC can have extra clip boards (PDAs) connected, which have
an EEPROM memory for identification. A special GPIO can be used to read
this memory over 1wire protocol.
Enabling one wire and eeprom drivers for this memory.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2018-09-28 20:22:38 -04:00
Eugen Hristev
d3d286d38f configs: sama5d2_xplained: add onewire and eeprom drivers
SAMA5D2 SoC can have extra clip boards (PDAs) connected, which have
an EEPROM memory for identification. A special GPIO can be used to read
this memory over 1wire protocol.
Enabling one wire and eeprom drivers for this memory.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2018-09-28 20:22:38 -04:00
Eugen Hristev
426e0401f9 configs: sandbox: add onewire w1 and sandbox eeprom
To be able to test Dallas onewire protocol and one wire eeproms driver
and subsystem, add in sandbox defconfig the drivers' config.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2018-09-28 20:22:37 -04:00
Eugen Hristev
81b8e96511 sandbox: DTS: w1: add node for one wire interface on GPIO
Add a node for the one wire uclass and one wire gpio driver
in sandbox.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2018-09-28 20:22:37 -04:00
Eugen Hristev
0523a6c6f7 pinctrl: sandbox: add gpio onewire w1 group
Add onewire "w1" groups and pin function for onewire GPIOs in sandbox.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2018-09-28 20:22:37 -04:00
Eugen Hristev
d05266f7c5 w1: add command for onewire protocol
Add basic command for bus information and read for onewire
bus using Dallas 1-Wire protocol.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2018-09-28 20:22:36 -04:00
Eugen Hristev
6a984d66b1 dt-bindings: w1-eeprom: eep_sandbox: create bindings
Bindings for sandbox onewire eeprom driver

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2018-09-28 20:22:36 -04:00
Eugen Hristev
84e55bdd8b W1-EEPROM: add sandbox driver
Add a sandbox driver for a one wire EEPROM memory

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2018-09-28 20:22:36 -04:00
Eugen Hristev
0fb667ae19 dt-bindings: w1-eeprom: ds24xxx: create bindings
Bindings for Maxim's ds24 onewire EEPROM families driver

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2018-09-28 20:22:36 -04:00
Maxime Ripard
0749f646c3 W1-EEPROM: add support for Maxim DS24 eeprom families
Add a driver that supports Maxim 1 wire EEPROMs families
DS24B33 and DS2431.
Can be extended for other families as well.

Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
[eugen.hristev@microchip.com: reworked driver]
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2018-09-28 20:22:35 -04:00
Eugen Hristev
543b98c857 w1: identify devices with w1-eeprom uclass
When a new device is discovered, this may be a w1 eeprom device.
Attempt to find the proper node and driver from the w1-eeprom subsystem.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2018-09-28 20:22:35 -04:00
Maxime Ripard
c924ee25aa W1-EEPROM: Add an W1-EEPROM uclass for 1 wire EEPROMs
We might want to access data stored onto one wire EEPROMs.
Create a framework to provide a consistent API.

Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
[eugen.hristev@microchip.com: reworked patch]
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2018-09-28 20:22:35 -04:00
Eugen Hristev
e1721ba0e6 dt-bindings: W1: w1-gpio: added bindings for w1-gpio
Added bindings specification for bitbanged gpio driver for Dallas
one wire protocol

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2018-09-28 20:22:34 -04:00
Maxime Ripard
73aea285e3 w1: Add 1-Wire gpio driver
Add a bus driver for bitbanging a 1-Wire bus over a GPIO.

Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
[eugen.hristev@microchip.com: fixed some issues]
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2018-09-28 20:22:34 -04:00
Maxime Ripard
d3e19cf919 w1: Add 1-Wire uclass
We might want to use 1-Wire devices connected on boards such as EEPROMs in
U-Boot.

Provide a framework to be able to do that.

Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
[eugen.hristev@microchip.com: reworked]
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2018-09-28 20:22:34 -04:00
Tien Fong Chee
620300043c common: Generic loader for file system
This is file system generic loader which can be used to load
the file image from the storage into target such as memory.
The consumer driver would then use this loader to program whatever,
ie. the FPGA device.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
2018-09-28 20:22:33 -04:00
Tien Fong Chee
fc5ca3ab54 doc: dtbinding: Add file system firmware loader binding document
Add a document to describe file system firmware loader binding
information.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-09-28 20:22:33 -04:00
Tien Fong Chee
45029758be doc: Add new doc for file system firmware loader driver model
Provide information about

- overview of file system firmware loader driver model
- describe storage device and partition in device tree source
- describe fie system firmware loader API

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-09-28 20:22:33 -04:00
Tien Fong Chee
bc53d2637e block: Add a function to find block device descriptor
Add a function to find the block device descriptor of the parent
device.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
[trini: Move function declaration to avoid warning]
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-09-28 20:22:33 -04:00
Tien Fong Chee
14dfc6482a cmd: ubifs: Factor out some checking codes into cmd_ubifs_mount()
cmd_ubifs_mount() function would be called directly instead of
involving whole command machinery for mounting ubifs in
generic firmware loader, so some checking codes need to be factored out
into cmd_ubifs_mount() without breaking original functionality design.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Heiko Schocher <hs@denx.de>
2018-09-28 20:22:32 -04:00
Tien Fong Chee
10c2044062 cmd: ubifs: Move ubifs_initialized checking into cmd_ubifs_umount()
cmd_ubifs_umount() function would be called directly instead of involving
whole command machinery in generic firmware loader, so checking on
ubifs_initialized status need to be done in cmd_ubifs_umount() without
breaking original functionality design.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Heiko Schocher <hs@denx.de>
[trini: Fix conflicting type error in cmd/ubi.c]
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-09-28 20:21:47 -04:00
Liviu Dudau
c1a65a8c59 video: Add support for Arm's Mali Display Processors
Add support for Arm Mali Display Processors DP500, DP550 and DP650.
Only one layer is being used to display the console or boot logo,
even if more layers are supported in the hardware.

Signed-off-by: Liviu Dudau <liviu.dudau@foss.arm.com>
2018-09-28 19:11:44 +02:00
Simon Glass
04187a845c patman: Detect missing tools and report them
When tools are needed but not present, at present we just get an error
which can be confusing for the user. Try to be helpful by reporting the
tool as missing and suggesting a possible remedy.

Also update the Run() method to support this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-09-28 11:09:01 -06:00
Simon Glass
6ed45ba0a8 binman: Support updating all device tree files
Binman currently supports updating the main device tree with things like
the position of each entry. Extend this support to SPL and TPL as well,
since they may need (a subset of) this information.

Also adjust DTB output files to have a .out extension since this seems
clearer than having a .dtb extension with 'out' in the name somwhere.

Also add a few missing comments and update the DT setup code to use
ReadFile and WriteFile().

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-09-28 11:09:01 -06:00
Simon Glass
93d174135a binman: Allow control of whether a fake DT is used
We use a fake device tree in tests most of the time since tests don't
normally care about the actual data. For example, for U-Boot proper we use
U_BOOT_DTB_DATA which is just a four-character string. This makes testing
the image output against an expected value very easy.

However in some cases, such as when the test wants to check that the DT
output containing particular nodes, we do actually need the real DT. Add
support for this, along with a command-line option to select 'test mode'.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-09-28 11:09:01 -06:00
Simon Glass
539aece516 binman: Obtain the list of device trees from the config
We always have a device tree for U-Boot proper. But we may also have one
for SPL and TPL. Add a new Entry method to find out what DTs an entry
has, and use that list when updating DTs.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-09-28 11:09:01 -06:00
Simon Glass
f46621d255 binman: Centralise device-tree updates within binman
At present we have a few calls to device-tree functions in binman and plan
to add more as we add new entry types which need to report their results.

It makes sense to put this code in a central place so that we can make
sure all device trees are updated. At present we only have U-Boot proper,
but plan to add SPL and TPL too.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-09-28 11:09:01 -06:00
Simon Glass
2a72cc72ca binman: Move state logic into the state module
Rather than reaching into this module from control, move the code that
needs this info into state.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-09-28 11:09:01 -06:00
Simon Glass
c55a50f558 binman: Move state information into a new module
At present the control module has state information in it, since it is the
primary user of this. But it is a bit odd to have entries and other
modules importing control to obtain this information.

It seems better to have a dedicated state module, which control can use as
well. Create a new module using code from control and update other modules
to use it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-09-28 11:09:01 -06:00
Simon Glass
6c234bfbf7 binman: Add an entry method for getting the default filename
Various entry implementations provide a way to obtain the default filename
for an entry. But at present there is no base-class implementation for
this function. Add one so that the API is defined.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-09-28 11:09:01 -06:00
Simon Glass
746aee3f2f dtoc: Add a way to create an Fdt object from a data block
Support creating an Fdt object without having to write the data to a file
first.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-09-28 11:09:01 -06:00
Simon Glass
6434961b2b dtoc: Add methods for adding and updating properties
Add a few more functions which allow creating and modifying property
values. If only we could do this so easily in the real world.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-09-28 11:09:01 -06:00
Simon Glass
e21c27af47 dtoc: Support adding new nodes
Add a way to add new nodes and sync them back to the blob.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-09-28 11:09:01 -06:00
Simon Glass
af53f5aafc dtoc: Fixed endianness in Prop.GetEmpty()
This should be big endian, since that is what device tree uses. Fix it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-09-28 11:09:01 -06:00
Simon Glass
fa80c25c09 dtoc: Allow syncing of the device tree back to a file
At present we require the caller to manually update the device tree using
individual calls to libfdt functions. This is not ideal. It would be
better if we could make changes using the Python structure and then call a
Sync() function to write them back.

Add this feature to the Fdt class. Update binman and the tests to match.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-09-28 11:09:01 -06:00
Simon Glass
0bfa7b09ba binman: Support building a selection of images
Sometimes it is useful to build only a subset of the images provided by
the binman configuration. Add a -i option for this. It can be given
multiple times to build several images. If the option is not given, all
images are built.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-09-28 11:09:01 -06:00
Simon Glass
a326b495cd binman: Tidy up the vblock entry
At present if there are two vblock entries an image their contents are
written to the same file in the output directory. This prevents checking
the contents of each separately.

Fix this by adding part of the entry path to the filename, and add some
missing comments.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-09-28 11:09:01 -06:00
Simon Glass
35b384cbe5 binman: Add x86 support for starting TPL
Sometimes we want to include TPL for x86 platforms, such as when we want
to select between different SPL images (e.g. for Chrome OS verified boot).
Add support for this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-09-28 11:09:01 -06:00
Simon Glass
0b489364f9 binman: Generate an error when text is not provided
When the value of a text entry is not provided an execption is generated
talking about a None type. This is confusing. Add a more explanatory error
and a test for this case.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-09-28 11:09:01 -06:00
Simon Glass
d178eab8f9 binman: Allow 'fill' entry to have a size of 0
The check for this should be for None, not 0. Fix it and add a test.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-09-28 11:09:01 -06:00
Simon Glass
f069303852 binman: Move 'special properties' docs to README.entries
This information should be in the entry it relates to, not in the main
README. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-09-28 11:09:01 -06:00
Simon Glass
34967c2618 fdt: Add Python support for adding/removing nodes
Pull this support from these upstream commits:

   bfbfab0 pylibfdt: Add a means to add and delete notes
   9005f41 pylibfdt: Allow delprop() to return errors

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-09-28 11:09:01 -06:00
Liviu Dudau
055da186a1 video: Add support for NXP's TDA19988 HDMI encoder
Add support for the NXP TDA19988 HDMI encoder as used on the Juno
development board from Arm.

Signed-off-by: Liviu Dudau <liviu.dudau@foss.arm.com>
2018-09-28 18:44:50 +02:00
Jagan Teki
9ad93c0c96 ARM: dts: sun8i: Update A23/A33/r16 dts(i) files from Linux-v4.18-rc3
Update all A23/A33/r16 devicetree dtsi and dtsi files from
Linux-v4.18-rc3 with below commits.

A23:
commit bc3bd041fe766219a44688b182c260064007f0cc
Author: Miquel Raynal <miquel.raynal@bootlin.com>
Date:   Tue Apr 24 17:55:02 2018 +0200

    ARM: dts: sun8i: a23/a33: declare NAND pins

A33:
commit 88fe315d2c0a397ef42d7639addab0e021ae911d
Author: Maxime Ripard <maxime.ripard@bootlin.com>
Date:   Wed Apr 4 11:57:15 2018 +0200

    ARM: dts: sun8i: a33: Add the DSI-related nodes

r16:
commit 9621d0bd1b0d61167e1853ac68cf4869c31bcc96
Author: Miquel Raynal <miquel.raynal@bootlin.com>
Date:   Tue Apr 24 17:55:03 2018 +0200

    ARM: dts: nes: add Nintendo NES/SuperNES Classic Edition support

Note:
- Drop pinctrl from sun8i-r16-nintendo-nes-classic-edition.dts since
  sun8i-a23-a33.dtsi is added with Linux sync.
- Don't sync non U-Boot supported dts files
   sun8i-a23-ippo-q8h-v1.2.dts
   sun8i-a23-ippo-q8h-v5.dts
   sun8i-a33-et-q8-v1.6.dts
   sun8i-a33-ippo-q8h-v1.2.dts
   sun8i-r16-nintendo-nes-classic.dts
   sun8i-r16-nintendo-super-nes-classic.dts

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-09-28 22:09:24 +05:30
Jagan Teki
b9d59d08a6 ARM: dts: sun7i: Update A20 dts(i) files from Linux-v4.18-rc3
Update all A10 devicetree dtsi and dtsi files from Linux-v4.18-rc3
with below commit:
commit 5d9ef839f874f4e3923c8a9ae7b136c6c3912cd5
Author: Stefan Mavrodiev <stefan@olimex.com>
Date:   Wed May 16 14:38:08 2018 +0300

    ARM: dts: sun7i: Add Olimex A20-SOM-EVB-eMMC board

Note:
- Update sun7i-a20-primo73.dts as per Linux, since
  this dts is U-Boot specific.
- Drop sun7i-a20-olimex-som-evb-emmc.dts since no board
  added for this.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-09-28 22:09:24 +05:30
Jagan Teki
d1d4295aab ARM: dts: sun6i: Update A31/A31s dts(i) files from Linux-v4.18-rc3
Update all A31/A31s devicetree dtsi and dtsi files from
Linux-v4.18-rc3 with below commit:
commit b240b419db5d624ce7a5a397d6f62a1a686009ec
Merge: 9c2dd8405c0c 518d2f43c358
Author: Linus Torvalds <torvalds@linux-foundation.org>
Date:   Thu Apr 5 21:18:09 2018 -0700

    Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-09-28 22:09:24 +05:30
Jagan Teki
13b36face7 ARM: dts: sun5i: Update A10s/A13/gr8/r8 dts(i) files from Linux-v4.18-rc3
Update all A10s/A13/gr8/r8devicetree dtsi and dtsi files from
Linux-v4.18-rc3 with below commit:
commit 190e3138f9577885691540dca59c2f07540bde04
Merge: cafc87023b0d a7affb13b271
Author: Arnd Bergmann <arnd@arndb.de>
Date:   Tue Mar 27 14:58:00 2018 +0200

    Merge tag 'sunxi-h3-h5-for-4.17' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into next/dt

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-09-28 22:09:24 +05:30
Jagan Teki
3c92cca3cd ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3
Update all A10 devicetree dtsi and dtsi files from Linux-v4.18-rc3
with below commit:
commit 590b0c0cfc6162aeebbf43eaafb9753b56df1532
Author: Pascal Roeleven <dev@pascalroeleven.nl>
Date:   Fri Apr 20 12:21:12 2018 +0200

    ARM: dts: sun4i: Fix incorrect clocks for displays

Note: Update pinctrl-0 for sun4i-a10-inet-3f.dts, sun4i-a10-inet-3w.dts
like other dts file since there dts file are U-Boot specific.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-09-28 22:09:24 +05:30
Liviu Dudau
cc0dae08c6 include/video.h: Remove declaration of functions that don't exist.
video_init, video_putc and video_puts functions are not implemented
anywhere, remove their declaration from the header.

Signed-off-by: Liviu Dudau <liviu.dudau@foss.arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
2018-09-28 18:28:10 +02:00
Sébastien Szymanski
47b11c814e video: cfb_console: flush cache in display_rle8_bitmap
Otherwise BMP RLE8 images are not properly displayed.

Signed-off-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com>
2018-09-28 18:27:58 +02:00
Mario Six
3bf65cb56c cmd: Add osd commands
Add command to query information from and write text to on-screen
display (OSD) devices.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-09-28 18:27:33 +02:00
Mario Six
87be2fe6ec test: list: Add tests for hexdump.c
Add tests for the hex2bin, bin2hex, and hex_to_bin functions, which were
recently added to U-Boot.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-09-28 18:27:10 +02:00
Mario Six
41f67e3bf3 test: Add ut_asserteq_mem
Add a unit test assert-method, which compares two given memory areas for
byte-wise equality.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-09-28 18:27:01 +02:00
Mario Six
4eea531859 video_osd: Add osd sandbox driver and tests
Add sandbox driver and tests for the new OSD uclass.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-09-28 18:26:52 +02:00
Mario Six
9671f696e5 video_osd: Add ihs_video_out driver
Add a driver for IHS OSDs on IHS FPGAs.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-09-28 18:26:44 +02:00
Mario Six
39a336f116 drivers: Add OSD uclass
Some devices offer a text-based OSD (on-screen display) that can be
programmatically controlled (i.e. text displayed on).

Add a uclass to support such devices.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-09-28 18:26:32 +02:00
Heinrich Schuchardt
662f381aad dm: video: support more escape sequences
The EFI subsystems needs to know the size of the terminal. If the
environment variable

	stdout = serial,vidconsole

this size cannot be read from the video console. So the EFI subsystem
sends escape sequences to read the size. With this patch we get support
for the following escape sequences:

ESC "7"		Save cursor position
ESC "8"		Restore cursor position

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-09-28 18:25:39 +02:00
Heinrich Schuchardt
5cb4860f3d dm: video: adjust struct vidconsole_priv description
The third component of struct vidconsole_priv is ycur.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-09-28 18:25:18 +02:00
Heinrich Schuchardt
9cdbc90672 MAINTAINERS: assign include/video*.h
The include/video*.h files are part of the drivers in drivers/video. So it
makes sense to assign them to the same maintainer.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-09-28 18:25:06 +02:00
Jagdish Gediya
432054b947 powerpc: dts: Enable device tree support for T2080QDS
Add device tree for T2080QDS board and enable CONFIG_OF_CONTROL
so that device tree can be compiled.

Update board README for device tree usage.

Signed-off-by: Jagdish Gediya <jagdish.gediya@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-09-27 10:14:14 -07:00
Jagdish Gediya
3a2f59e244 powerpc: dts: Add u-boot.dtsi to use binman for MPC85xx boards
Signed-off-by: Jagdish Gediya <jagdish.gediya@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-09-27 10:14:06 -07:00
Jagdish Gediya
96699f097a powerpc: mpc85xx: Use binman to embed dtb inside U-Boot
Below is the sequence to embed dtb inside U-Boot,
1. Remove bootpg and resetvec section if needed
2. Append dtb
3. Append bootpg and resetvec section back if removed in step 1

Above procedure is required only when CONFIG_MPC85xx and
CONFIG_OF_SEPARATE are defined.

Add new config CONFIG_MPC85XX_HAVE_RESET_VECTOR to indicate that
image has resetvec section. Step 1 and step 3 described above are
required only if this config is y.

Signed-off-by: Jagdish Gediya <jagdish.gediya@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-09-27 10:13:59 -07:00
Jagdish Gediya
52fcb717b5 powerpc: mpc85xx: Select BINMAN by default
Signed-off-by: Jagdish Gediya <jagdish.gediya@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-09-27 10:13:55 -07:00
Jagdish Gediya
9d368f32bc binman: Add support for PowerPC mpc85xx 'bootpg + resetvec' entry
This entry contains the PowerPC mpc85xx boot page and resetvec
sections.

Signed-off-by: Jagdish Gediya <jagdish.gediya@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-09-27 10:13:51 -07:00
Jagdish Gediya
94b57db069 binman: Add a new "skip-at-start" property in Section class
Currently binman calculates '_skip_at_start' based on 'end-at-4gb'
property and it is used for x86 images.

For PowerPC mpc85xx based CPU, CONFIG_SYS_TEXT_BASE is the entry
offset of the first entry. It can be 0xeff40000 or 0xfff40000 for
nor flash boot, 0x201000 for sd boot etc, so "_skip_at_start"
should be set to CONFIG_SYS_TEXT_BASE.

'end-at-4gb' property is not applicable where CONFIG_SYS_TEXT_BASE +
Image size != 4gb.

Add new property 'skip-at-start' in Section class so that
'_skip_at_start' can be calculated either based on 'end-at-4gb'
or based on "skip-at-start".

Add a test case to check that 'skip-at-start' and 'end-at-4gb'
property can't be used together.

Signed-off-by: Jagdish Gediya <jagdish.gediya@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-09-27 10:13:43 -07:00
Jagdish Gediya
7d7a8e99e4 powerpc/dts: Makefile changes to clean and build dts
Signed-off-by: Jagdish Gediya <jagdish.gediya@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-09-27 10:13:38 -07:00
Jagdish Gediya
4d3294b1d5 powerpc/dts: Define '_end' symbol in mpc85xx U-Boot lds files
'board_fdt_blob_setup' function sets up fdt blob at '&_end' so
define '_end' symbol in mpc85xx lds files.

Signed-off-by: Jagdish Gediya <jagdish.gediya@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-09-27 10:13:24 -07:00
Ran Wang
26cbc0d663 armv7: ls102xa: Disable QE before enter deep sleep
Otherwise system will hang after executing wfi.

Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-09-27 10:01:28 -07:00
Ran Wang
247058b9b4 drivers: qe: Move CONFIG_U_QE to Kconfig
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
[York S: revised subject line and removed commit message]
Reviewed-by: York Sun <york.sun@nxp.com>
2018-09-27 10:01:27 -07:00
Zhao Qiang
db947fa038 net: fman: Support both new and legacy FMan Compatibles
Recently the FMan Port and MAC compatibles were changed. This patch
aligns the FMan Port and MAC compatibles to the new FMan device tree
binding document. The FMan device tree binding document can be found
in the Linux kernel version 3.18.0, commit
297d35fd2a7d3fbd4e5c0f0c1c18213117ba11ba
./Documentation/devicetree/bindings/powerpc/fsl/fman.txt

This patch doesn't affect legacy compatibles support.

Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
[York S: reformatted commit message]
Reviewed-by: York Sun <york.sun@nxp.com>
2018-09-27 10:01:27 -07:00
Priyanka Jain
aea5cd75e6 ls2080ardb: remove dhcp function from env as boot source
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-09-27 10:01:09 -07:00
Pramod Kumar
863e42e8b1 ls1088a: remove dhcp function from u-boot env as boot source
Signed-off-by: Pramod Kumar <pramod.kumar_1@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-09-27 08:58:53 -07:00
Pramod Kumar
7abf92327f ls1012a: remove debug info from u-boot log
Signed-off-by: Pramod Kumar <pramod.kumar_1@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-09-27 08:58:42 -07:00
Laurentiu Tudor
0c2255b5c7 armv8: ls1043a: enable icid setup for qman portals
Enable support for ICID setup of qman portals and the required device
tree fixups.

Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-09-27 08:58:33 -07:00
Laurentiu Tudor
dc29a4c177 armv8: ls1043a: add icid setup support
Reuse the existing ICID setup code done for LS1046A smmu enablement
and add the equivalent setup for LS1043A chips.

Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-09-27 08:58:15 -07:00
Laurentiu Tudor
2131079356 armv8: ls1043a: advertise QMan v3 in configuration
The QMan IP block in this SoC is version 3.2 so advertise
this in the SoC configuration header.

Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-09-27 08:58:03 -07:00
Laurentiu Tudor
6fae6a1fd6 armv8: fsl-layerscape: add missing qe base address define
Add define for QUICC Engine register block base address.

Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
[York S: revised commit message]
Reviewed-by: York Sun <york.sun@nxp.com>
2018-09-27 08:56:40 -07:00
Prabhakar Kushwaha
87519a9ece driver: net: fsl-mc: Memset MC reserve ram memory before usage
Memory reserved for Management Complex needs to be cleaned before any
usage.

Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
[York S: revised commit message]
Reviewed-by: York Sun <york.sun@nxp.com>
2018-09-27 08:55:21 -07:00
Nipun Gupta
a78df40cba u-boot: fixup the iommu-map property of fsl-mc node
The iommu-map property in the fsl-mc node is updated by
valid stream-ids by u-boot. This patch is to fixup this
property for LS208x and LS1088.

Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-09-27 08:55:05 -07:00
Pramod Kumar
1deae0c439 ls1012afrwy: Add ls1012afrwy revC board support.
LS1012AFRWY supports three board revisions.
Revision A and B board are collectively identified as revA/B,
Revision C board is identifies as revC.

Signed-off-by: Pramod Kumar <pramod.kumar_1@nxp.com>
[York S: revised commit message]
Reviewed-by: York Sun <york.sun@nxp.com>
2018-09-27 08:53:33 -07:00
Peng Ma
df983a76bf scsi: ceva: add ls1021a soc support.
Add ahci compatible support for ls1021a soc.

Signed-off-by: Peng Ma <peng.ma@nxp.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-09-27 08:53:27 -07:00
Peng Ma
c1523340cd arm: ls1021atwr: enable DM support for sata
Enable related configs to support sata DM feature.

Signed-off-by: Peng Ma <peng.ma@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-09-27 08:53:22 -07:00
Peng Ma
9ed5ec9b53 armv7: dts: fsl-ls1021a: add sata node support enable sata for ls1021a-qds and ls1021a-twr
Add sata node to support this feature.

Signed-off-by: Peng Ma <peng.ma@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-09-27 08:53:13 -07:00
Peng Ma
686203737e armv7: fsl: remove sata support
Remove the old implementation in order to enable DM for sata

Signed-off-by: Peng Ma <peng.ma@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-09-27 08:53:03 -07:00
Peng Ma
cf2250e787 arm64: ls1043aqds: enable DM support for sata
Enable related configs to support sata DM feature.

Signed-off-by: Peng Ma <peng.ma@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-09-27 08:52:25 -07:00
Peng Ma
822d060830 scsi: ceva: add ls1043a soc support
Add ahci compatible support for ls1043a soc.

Signed-off-by: Peng Ma <peng.ma@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-09-27 08:52:18 -07:00
Peng Ma
d92116566b armv8: dts: fsl-ls1043a: add sata node support
Add sata node to support ls1043a.

Signed-off-by: Peng Ma <peng.ma@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-09-27 08:52:11 -07:00
Yinbo Zhu
32284f638f Enable CONFIG_BLK and CONFIG_DM_MMC to Kconfig
This enables the folowing to Kconfig:
	CONFIG_BLK
	CONFIG_DM_MMC

Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-09-27 08:51:49 -07:00
Yinbo Zhu
46d471f5b8 armv7: ls1021a: enable esdhc
This patch is to enable eSDHC for ls1021a.

Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-09-27 08:51:36 -07:00
Yinbo Zhu
2fd425f8e3 armv8: ls1046a: add eSDHC node
This patch is to add eSDHC node for ls1046a.

Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-09-27 08:51:22 -07:00
Yinbo Zhu
bdccf12839 armv8: ls1043a: add eSDHC node
This patch is to add eSDHC node for ls1043a.

Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-09-27 08:51:16 -07:00
Yinbo Zhu
585d357522 armv8: ls1088a: add eSDHC node
This patch is to add eSDHC node for ls1088a.

Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-09-27 08:51:11 -07:00
Yinbo Zhu
99e0071df5 armv8: ls2088a: add eSDHC node
This patch is to add eSDHC node for ls2088a.

Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-09-27 08:50:39 -07:00
Yinbo Zhu
0fdf696721 armv8/ls1088a/ls2088a: esdhc: Add esdhc clock support
This patch adds esdhc clock support for ls1088a and ls2088a.

Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-09-27 08:50:26 -07:00
Yinbo Zhu
c3ced8a6ed ppa/fm/qe: use block layer in ppa/fm/qe driver
At present the MMC subsystem maintains its own list of MMC devices.
This cannot work with driver model when CONFIG_BLK is enabled, use
blk_dread to replace previous mmc read interface, use
mmc_get_blk_desc to get the mmc device property.

Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
[York S: reformatted commit message]
Reviewed-by: York Sun <york.sun@nxp.com>
2018-09-27 08:48:51 -07:00
Tom Rini
bbef20d479 Merge tag 'xilinx-for-v2018.11' of git://git.denx.de/u-boot-microblaze
Xilinx changes for v2018.11

- Handle BOARD_LATE_INIT via Kconfig

SPL:
- Enable GZIP for all partitions types(not only for kernel)

ZynqMP:
- Rearrange pmufw version handling
- Support newer PMUFW with improved fpga load sequence

Zynq:
- Cleanup config file
- Simplify zybo config by enabling option via Kconfig

net:
- Fix gems max-speed property reading
- Enable support for fixed-link phys
2018-09-27 08:29:10 -04:00
Michal Simek
3888c8d197 net: zynq_gem: Add support for fixed-link phy
Based on dt-specs fixed-link doesn't require phy-handle to be used.
Fix driver to only read phy related setting when phy-handle is found.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-09-27 07:59:26 +02:00
Tom Rini
0ae8dcfef7 Merge tag 'signed-efi-next' of git://github.com/agraf/u-boot
Patch queue for efi - 2018-09-26

A lot of goodness in this release. We're *very* close to running the
UEFI Shell and SCT natively. The only missing piece are HII protocols.

  - FAT write support (needed for SCT)
  - improved FAT directory support (needed for SCT)
  - RTC support with QEMU -M virt
  - Sandbox support (run UEFI binaries in Linux - yay)
  - Proper UTF-16 support
  - EFI_UNICODE_COLLATION_PROTOCOL support (for UEFI Shell)
  - EFI_SIMPLE_TEXT_INPUT_EX_PROTOCOL support (for UEFI Shell)
  - Fix window size determination
  - Fix Tegra by explicitly unmapping RAM
  - Clean up handle entanglement
  - Lots of generic code cleanup

[trini: Fixup merge conflict in include/configs/qemu-arm.h]
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-09-26 17:02:46 -04:00
Alexander Graf
eaac4fb296 sandbox: Fix set_working_fdt_addr users
When running sandbox with the new pointer sanitization we just recently
introduced, we're running into a case with FIT images where we end up
interpreting pointers as addresses.

What happened is that most callers of set_working_fdt_addr() simply
convert pointers into addresses without taking into account that they
might be 2 separate address spaces. Fix the callers up to map their
pointers into addresses.

This makes sandbox tests pass for me again.

Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-26 15:03:12 +02:00
Luis Araneda
50f56e50d0 arm: zynq: zybo: migrate CONFIG_DISPLAY to defconfig
Only add CONFIG_DISPLAY to defconfig because CONFIG_I2C_EDID
is automatically selected by CONFIG_DISPLAY

Signed-off-by: Luis Araneda <luaraneda@gmail.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-09-26 10:15:00 +02:00
Siva Durga Prasad Paladugu
f213dbbdec net: zynq_gem: Fix reading of max-speed property
max-speed property is part of phynode and it has to be
read using ofnode_read_u32_default(). This fixes the issue
of incorrect max-speed read from DT.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-09-26 10:15:00 +02:00
Michal Simek
975e789323 spl: fit: Enable GZIP compression also for no kernel partitions
There is no reason to limit gzip usage only for OS_BOOT and kernel image
type.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Tested-by: York Sun <york.sun@nxp.com>
2018-09-26 10:15:00 +02:00
Siva Durga Prasad Paladugu
fbf7fb0f9f fpga: zynqmp: Modify PL bitstream loading sequence
This patch modifies PL bitstream loading sequence as per
latest Xilfpga which supports all variants of bitstream images
generated from vivado and from bootgen. With this new change in
Xilfpga, uboot doesn't need to validate and swap bitstream as it will
be taken care inside Xilfpga. ZynqMP PL driver now checks for supporting
PMUFW version before skipping the validation and swap sequence as there
can be old PMUFW which doesn't supports this feature. In this case, driver
uses old way of PL bitstream loading sequence.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-09-26 10:15:00 +02:00
Siva Durga Prasad Paladugu
b94a8271cc arm64: zynqmp: Return pmufw version for zynqmp_pmufw_version()
Modify the zynqmp_pmufw_version() routine to return PMUFW version so
that it can be reused wherever required. Get PMUFW version from PMU
only once at bootup and later just return stored value.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-09-26 10:15:00 +02:00
Siva Durga Prasad Paladugu
fe68f2332d arm64: zynqmp: Move PM version related macros to .h
This patch moves the PM version related macros to .h file so that
they can be reused in other files.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-09-26 10:15:00 +02:00
Michal Simek
dba39b6c85 arm: zynq: Remove useless comments from config file
Moving options to Kconfig some comments are useless now.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-09-26 10:15:00 +02:00
Michal Simek
8eb55e1965 arm64: zynqmp: Handle CONFIG_BOARD_LATE_INIT via Kconfig
Disable BOARD_LATE_INIT via Kconfig.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-09-26 10:15:00 +02:00
Bin Meng
d8d81d4a5d config.mk: Remove duplicated -fno-strict-aliasing
Now that we already disable the "strict-aliasing" globally, remove
the duplicates in the nds32/riscv/x86 arch-specific Makefiles.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-09-25 21:50:34 -04:00
Bin Meng
5bc11922f1 Makefile: Use -fno-strict-aliasing globally
The -fstrict-aliasing option is implicitly enabled at levels -O2,
-O3, -Os by GCC. This option allows the compiler to assume the
strictest aliasing rules applicable to the language being compiled.
For example, the practice of reading from a different union member
than the one most recently written to (called "type-punning") is
common. In this case, "type-punning" only works if the memory is
accessed through the union type, but might not work by taking the
address, casting the resulting pointer and dereferencing the result,
which is an undefined behavior per the "strict aliasing rules".

GCC's -Wstrict-aliasing (included in -Wall) option does not catch
all cases, but does attempt to catch the more common pitfalls. So
there are cases that GCC does not report but the codes are violating
the "strict aliasing rules".

Given lots of codes that may be written to rely on "type-punning",
and Linux kernel disables it by -fno-strict-aliasing globally, since
U-Boot currently does this on nds32/riscv/x86 builds only, extend
this for all architecture builds.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-09-25 21:50:34 -04:00
Lokesh Vutla
c1523c65fc serial: omap: Add support for AM654 uart controller
AM654 uses a UART controller that is compatible (partially) with
existing OMAP UART, Introduce a compatible for adding support
for this controller.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-09-25 21:50:34 -04:00
Tuomas Tynkkynen
247b4f9f44 configs: Drop CONFIG_SYS_SCSI_MAXDEVICE
This option has never been used for anything. Drop it.

Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-09-25 21:49:18 -04:00
Tuomas Tynkkynen
1bc93b50e8 ata: Drop CONFIG_SYS_SCSI_MAX_* from boards using DM_SCSI
These options are not used or necessary when device model is being used
for SCSI. Just drop them.

Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-09-25 21:49:18 -04:00
Tuomas Tynkkynen
0545ac989d ata: ahci: Don't cap AHCI port count under CONFIG_DM_SCSI
When using device model this sort of hardcoded limits aren't used or
necessary.

Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-09-25 21:49:18 -04:00
Tuomas Tynkkynen
8bf207d242 ata: ahci: Loop over the actual number of ports, not the maximum
The loop in ahci_start_ports() is looping over the maximum number of
SCSI devices in the system, which can be larger than the amount of ports
a particular AHCI controller has. The extra looping isn't directly
harmful because the link_port_map bitmap won't have the bit set for a
nonexistent port, but it is wasteful. Replace the loop limit with the
port count of the AHCI controller instead.

Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-09-25 21:49:18 -04:00
Chris Packham
47cef9c805 xtensa: use asm-generic/atomic.h
Make use of asm-generic/atomic.h.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Acked-by: Max Filippov <jcmvbkbc@gmail.com>
2018-09-25 21:49:18 -04:00
Chris Packham
02df9c5a67 mips: use asm-generic/atomic.h
Make use of asm-generic/atomic.h.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
2018-09-25 21:49:18 -04:00
Chris Packham
4d9f7a014d ARM: use asm-generic/atomic.h
Make use of asm-generic/atomic.h retaining the smp_mb_... definitions.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-09-25 21:49:18 -04:00
Chris Packham
461f456817 Add include/asm-generic/atomic.h
The arm, xtensa and mips version of atomic.h were already very similar
(the mips one was a copy of xtensa). Combine these implementations
together to produce a generic atomic.h that can be included by these
architectures (and any others that need it in future).

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-09-25 21:49:18 -04:00
Heinrich Schuchardt
29cfc096a7 cmd: add conitrace command
The 'conitrace' command prints the codes received from the console input as
hexadecimal numbers.

This developer utility is useful for testing the handling of special keys
by keyboard drivers.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-09-25 21:49:18 -04:00
Adam Ford
03190a7888 mmc: omap_hsmmc: Fix pbias for omap3_logic to enable CD pin
The MMC card detect pin is connected to gpio127 on omap3_logic.
When setting up the pbias register for MMC, let's also enable
gpio_127 for the card detect.  As part of the package deal,
gpio_126 and gpio_129 are also enabled.

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-09-25 21:49:18 -04:00
Tom Rini
15416c86b4 dm: Update README.txt to clarify device tree usage
In the section about Device Trees add a paragraph at the end that
clarifies how we decide of a tree is valid or not.  We say that all
bindings must either be in the specification (link provided) or in our
device-tree-bindings directory.  We say that most of these come from the
Linux Kernel and as such some design decisions are made for us already,
but that in most cases we wish to retain compatibility.

Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-09-25 21:49:18 -04:00
Quentin Schulz
484a878273 arm: spear: fix enabling of SSP2 clock
The SSP2 clock is at bit 6 in the register, so the value is 0x40 unlike
the current 0x70 which enables the clock of UART2, SSP1 and SSP2.

Signed-off-by: Quentin Schulz <quentin.schulz@bootlin.com>
Acked-by: Stefan Roese <sr@denx.de>
2018-09-25 21:49:18 -04:00
Quentin Schulz
ac47fbee6d arm: spear: enable SSP1, 2 and 3 clocks when SPI controller driver is built
SPI controllers SSP1, 2 and 3 require to enable their respective clocks.
Let's enable them only when the SPI controller driver is built.

Signed-off-by: Quentin Schulz <quentin.schulz@bootlin.com>
2018-09-25 21:49:18 -04:00
Quentin Schulz
8a4791fa08 spi: add support for ARM PL022 SPI controller
This adds support for the ARM PL022 SPI controller for the standard
variant (0x00041022) which has a 16bit wide and 8 locations deep TX/RX
FIFO.

A few parts were borrowed from the Linux kernel driver.

Cc: Armando Visconti <armando.visconti@st.com>
Cc: Vipin Kumar <vipin.kumar@st.com>
Signed-off-by: Quentin Schulz <quentin.schulz@bootlin.com>
2018-09-25 21:49:18 -04:00
Sekhar Nori
8451942f7c configs: am335x_evm: enable OF_BOARD_SETUP
Enable CONFIG_OF_BOARD_SETUP as it is needed for Beaglebone
black to overwrite the Ethernet phy address present in DT
in case the phy latches on to a different address.

Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-09-25 21:49:18 -04:00
Sekhar Nori
20c37fb1bf board: ti: am335x: add support to fixup phy address
On beaglebone black, it can so happen that PHY address
is not latched correctly on reset and board boots with
PHY responding to a different address than that
programmed in device-tree. For example, see this report:

https://groups.google.com/d/msg/beagleboard/9mctrG26Mc8/1FuI_i5KW10J

Workaround this by fixing up device-tree passed to kernel
by using the PHY address detected in hardware.

Beaglebone itself uses only one ethernet port and its DT
currently uses phy_id (obsoleted). But the function has
been written to handle multiple ports and phy_id as well
as phy-handle to make the function more generically useful.

Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-09-25 21:49:18 -04:00
Sekhar Nori
e2597be5bc drivers: net: cpsw: add support to update phy address
On some boards using TI CPSW, it may be possible that
PHY address was not latched correctly, and the actual
address that the phy responds on is different from that
set in device-tree. For example, see this problem report
on beaglebone black:

https://groups.google.com/d/msg/beagleboard/9mctrG26Mc8/1FuI_i5KW10J

Add support to check for this condition and use the
detected phy address when its safe to do so.

Also, add a public API that exposes the phy address of
a given slave. This can be used to update device-tree that
is passed to Linux kernel.

Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-09-25 21:49:18 -04:00
Codrin Ciubotariu
4495680735 configs: sama5d27_som1_ek: Add defconfig for ENV/boot from uSD
This adds a defconfig for sama5d27_som1_ek board to get environment from
uSD. The defconfig is made from sama5d27_som1_ek_mmc_defconfig, with
'bootcmd' and 'bootargs' changed to kernel, device-tree and rootfs from
uSD. The environment is expected to be found in uSD's FAT partition.

Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
2018-09-25 21:49:18 -04:00
Codrin Ciubotariu
3549466e55 configs: sama5d27_som1_ek: Set CONFIG_BOOTARGS using Kconfig
CONFIG_BOOTARGS can be set using Kconfig, so we no longer need it
in the config files.

Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
2018-09-25 21:49:18 -04:00
Codrin Ciubotariu
f97bf157c5 configs: sama5d27_som1_ek: Remove unnecessary FAT_ENV_xxx macros
FAT_ENV_xxx options can now be set using Kconfig, so we no longer
need them in the config files.

Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
2018-09-25 21:48:43 -04:00
Codrin Ciubotariu
3f61f08636 configs: sama5d2_xplained: Add defconfig for ENV/boot from eMMC
This adds a defconfig for sama5d2_xplained board to get environment from
eMMC. The defconfig is made from sama5d2_xplained_mmc_defconfig, with
'bootcmd' and 'bootargs' changed to kernel, device-tree and rootfs from
eMMC. The environment is expected to be found in eMMC's FAT
partition.

Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
2018-09-25 21:48:43 -04:00
Marek Vasut
04ce5427bd spl: Weed out CONFIG_SYS_TEXT_BASE usage
The SPL loaders assume that the CONFIG_SYS_TEXT_BASE memory location
is available and can be corrupted by loading ie. uImage or fitImage
headers there. Sometimes it could be beneficial to load the headers
elsewhere, ie. if CONFIG_SYS_TEXT_BASE is not yet writable while we
still want to parse the image headers in some local onchip memory to
ie. extract firmware from that image.

Add the possibility to override the location where the headers get
loaded by introducing new function, spl_get_load_buffer() which takes
two arguments -- offset from the CONFIG_SYS_TEXT_BASE and size of the
data that are to be loaded there -- and returns a valid buffer address
or hangs the system. The default behavior is the same as before, add
the offset to CONFIG_SYS_TEXT_BASE and return that address. User can
override the weak spl_get_load_buffer() function though.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2018-09-25 21:48:43 -04:00
Patrice Chotard
4c834b965a board: st: stm32mp1: Add usb gadget support
Enable USB gadget support using DWC2 driver
Populate board_usb_init() to initialize clocks,
phy, reset and data needed for DWC2 IP.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-09-25 21:48:43 -04:00
Patrice Chotard
411bf0e17a configs: stm32mp15: Enable USB relative flags
Enable config USB relative flags in order to enable USB
EHCI, DWC2 gadget, download and mass_storage support.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-09-25 21:47:39 -04:00
Patrice Chotard
bad48a4062 ARM: dts: stm32mp1: Add EHCI support for stm32mp157c-ev1 board
Add DT nodes to enable EHCI support

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-09-25 21:47:39 -04:00
Patrice Chotard
8e9c94d766 ARM: dts: stm32mp1: Add usb gadget support for stm32mp157c-ev1 board
Add DT nodes to enable DWC2 gadget support

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-09-25 21:47:39 -04:00
Heinrich Schuchardt
c982874e93 efi_loader: refactor efi_setup_loaded_image()
Create the handle of loaded images and the EFI_LOADED_IMAGE_PROTOCOL
inside efi_setup_loaded_image(). Do not use local variables.

Currently we expect the loaded image handle to point to the loaded image
protocol. Additionally we have appended private fields to the protocol.

With the patch the handle points to a loaded image object and the private
fields are added here. This matches how we handle the net and the gop
object.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23 21:55:31 +02:00
AKASHI Takahiro
a47c1b5b87 arm: qemu-arm: enable RTC (PL031) by default
Virtual machine provided by qemu-arm has a ARM PL031 Real Time Clock
device. With this patch, the driver is enabled by default.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23 21:55:31 +02:00
AKASHI Takahiro
a370e429a7 rtc: pl031: convert the driver to driver model
With this patch, PL031 driver is converted to driver-model-compliant
driver. In addition, CONFIG_SYS_RTC_PL031_BASE is no longer valid.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23 21:55:31 +02:00
Alexander Graf
24638a1f21 efi_loader: Fix loaded_image handle passing from EL3
When running in EL3 mode on AArch64, we have to first drop to EL2
to execute a UEFI payload. When dropping down, the arguments to
the entry point have to stay identical to the ones for normal entry
though.

In commit ea54ad5928 ("efi_loader: pass handle of loaded image")
we incorrectly changed that logic and had the el3 entry path diverge.
Fix it up by syncing it back to what it's supposed to be.

Fixes: ea54ad5928 ("efi_loader: pass handle of loaded image")
Signed-off-by: Alexander Graf <agraf@suse.de>
Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
2018-09-23 21:55:31 +02:00
Alexander Graf
a729eb34e3 efi_loader: Disable efi selftest on sandbox for now
The EFI selftest does not succeed on Sandbox yet. The network support
seems to need some love to actually make our current tests succeed.

So let's disable running the selftest on sandbox for now until "make
tests" just works. Then we can have more amazing CI than ever.

Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23 21:55:31 +02:00
Heinrich Schuchardt
3170db63c4 efi_loader: remove efi_exit_caches()
Since GRUB patch d0c070179d4d ("arm/efi: Switch to arm64 linux loader",
2018-07-09) we do not need a workaround for GRUB on 32bit ARM anymore.

So let's eliminate function efi_exit_caches().

This will require Linux distributions to update grub-efi-arm to the GRUB
git HEAD (a tag containing the aforementioned GRUB patch is not available
yet).

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23 21:55:31 +02:00
Heinrich Schuchardt
4b985e0035 dm: video: check bounds for column and row
CSI H can be used to position the cursor. The calling application may
specify a location that is beyond the limits of the screen. This may
lead to an illegal memory access.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23 21:55:31 +02:00
Heinrich Schuchardt
9d08f6db2a efi_loader: remove redundant statement
ascii2unicode() always ends the u16 string with '\0'.
Remove redundant assignment.

Add description for efi_str_to_u16() and ascii2unicode().

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23 21:55:31 +02:00
Heinrich Schuchardt
4e6b5d6503 efi_loader: create root node
Currently we assign a lot of protocols to loaded images though
these protocols are not related to them. Instead they should be
installed on a separate handle. Via the device path it is the
parent to the devices like the network adapter.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23 21:55:31 +02:00
Heinrich Schuchardt
506dc52d5d efi_loader: avoid out of bound access in efi_get_variable()
In efi_get_variable() a string is longer than the allocated space which
results in overwriting the linked list of malloc().

The prefixes used for variables are 41 characters long, e.g.
efi_67029eb5-0af2-f6b1-da53-fcb566dd1ce6_

Change PREFIX_LEN to 41.

Fixes: faff21556748 ("efi_loader: remove limit on variable length")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23 21:55:31 +02:00
Heinrich Schuchardt
60ce592cd0 efi_selftest: test qemu-arm(64)_defconfig
We should run the EFI selftest on both a 32bit and a 64bit ARM platform on
Travis to catch possible errors.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23 21:55:30 +02:00
Heinrich Schuchardt
ea80885233 efi_driver: convert function descriptions to Sphinx style
Convert the function descriptions to Sphinx style.
efi_driver_init() is cCalled by efi_init_obj_list().

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23 21:55:30 +02:00
Heinrich Schuchardt
6bb591f704 efi_loader: query serial console size reliably
Not all terminals understand CSI [18t for querying the console size.
We should adhere to escape sequences documented in the console_codes
manpage and the ECMA-48 standard.

So here we follow a different approach. We position the cursor to the
bottom right and query its position. Before leaving the function we
restore the original cursor position.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23 21:55:30 +02:00
Alexander Graf
7b05667ce2 efi_loader: Merge memory map entries
We currently do not combine memory entries that are adjacent and have
the same attributes. The problem with that is that our memory map can
easily grow multiple hundreds of entries in a simple UEFI Shell
environment.

So let's make sure we always combine all entries to make the memory
map as small as possible. That way every other piece of code that
loops through it should also gain some nice speed ups.

Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23 21:55:30 +02:00
Heinrich Schuchardt
79276eb243 efi_loader: memory leak in efi_set_bootdev()
efi_set_bootdev() may be called repeatedly.
Free the memory allocated for device paths in previous calls.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23 21:55:30 +02:00
Heinrich Schuchardt
8887acc685 efi_loader: do not use local variable for handle
Do not use a local variable for the handle backing the memory device path.
Adjust relate comments.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23 21:55:30 +02:00
Heinrich Schuchardt
e102038641 efi_selftest: missing braces in efi_selftest_textinputex.c
gcc 4.8.4 wants to see all levels of braces when initializing a
structure to zeros.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23 21:55:30 +02:00
Heinrich Schuchardt
d3dce35aab efi_loader: check parameter new_handle of efi_file_open()
We should not check parameter file twice.
We should check parameter new_handle.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23 21:55:30 +02:00
Alexander Graf
6e6e4b2f73 sandbox: Allow to execute from RAM
With efi_loader, we may want to execute payloads from RAM. By default,
permissions on the RAM region don't allow us to execute from there though.

So let's change the default allocation scheme for RAM to also allow
execution from it. That way payloads that live in U-Boot RAM can be
directly executed.

Signed-off-by: Alexander Graf <agraf@suse.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23 21:55:30 +02:00
Alexander Graf
3fcb714758 sandbox: Fix setjmp/longjmp
In sandbox, longjmp returns to itself in an endless loop because
os_longjmp() calls into longjmp() which is provided by U-Boot which
again calls os_longjmp().

Setjmp on the other hand must not return because otherwise the
return freees up stack elements that we need during longjmp().

The only straight forward fix that doesn't involve nasty hacks I
could find is to directly link against the system setjmp/longjmp
implementations. That means we just provide the compiler with
hints that the symbol will be available and actually fill them
out with versions from libc.

This approach should be reasonably platform agnostic

Signed-off-by: Alexander Graf <agraf@suse.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23 21:55:30 +02:00
Heinrich Schuchardt
aaace4b086 efi_loader: terminal left upper corner is [1, 1]
For the VT102 and the Linux console the left upper corner is [1, 1].
EFI uses [0, 0] as left upper corner.

Check parameters of the SetCursorPosition() service.

Use CSI H like EDK2 for positioning.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23 21:55:30 +02:00
Heinrich Schuchardt
008fb489fa efi_loader: more debug info for efi_file_getinfo()
efi_file_getinfo() is called with a GUID. In EFI_ENTRY use %pUl as
format type. This way the GUID is printed in debug mode.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23 21:55:30 +02:00
Simon Glass
12ddfd4989 efi: sandbox: Enable selftest command
Enable this for sandbox since it almost passes now.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23 21:55:30 +02:00
Simon Glass
2ae843f732 efi: Correct the operation of efi_file_write()
We should not directly cast between pointers and addresses since it breaks
sandbox. Fix this and simplify the code in file_read().

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23 21:55:30 +02:00
Simon Glass
428aa0ca56 sandbox: Enhance map_to_sysmem() to handle foreign pointers
At present map_sysmem() maps an address into the sandbox RAM buffer,
return a pointer, while map_to_sysmem() goes the other way.

The mapping is currently just 1:1 since a case was not found where a more
flexible mapping was needed. PCI does have a separate and more complex
mapping, but uses its own mechanism.

However this arrange cannot handle one important case, which is where a
test declares a stack variable and passes a pointer to it into a U-Boot
function which uses map_to_sysmem() to turn it into a address. Since the
pointer is not inside emulated DRAM, this will fail.

Add a mapping feature which can handle any such pointer, mapping it to a
simple tag value which can be passed around in U-Boot as an address.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23 21:55:30 +02:00
Simon Glass
fe938fb0df sandbox: Add support for calling abort()
This function is useful to signal that the application needs to exit
immediate. It can be caught with a debugger (e.g. gdb). Add a stub for it
so that it can be called from within sandbox when an internal error
occurs.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23 21:55:30 +02:00
Simon Glass
613185023f sandbox: Align RAM buffer to the machine page size
At present the sandbox RAM buffer is not aligned to any particular
address boundary. This makes the internal pointers somewhat random with
respect to the associated RAM buffer addresses.

Align the buffer to the page size of the machine to help with this. Note
that there is a header at the start of the allocated pointer. To avoid
returning a pointer which is not aligned to a page boundary, we waste
almost an entire page of memory for each allocation.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23 21:55:30 +02:00
Simon Glass
a46714ffc3 efi: sandbox: Enable EFI loader build for sandbox
This allows this feature to build within sandbox. This is useful for
testing.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23 21:55:30 +02:00
Simon Glass
a4958a7101 efi: sandbox: Add distroboot support
With sandbox these values depend on the host system. Let's assume that it
is x86_64 for now.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23 21:55:30 +02:00
Heinrich Schuchardt
bd66588657 efi_loader: loosen check of parameters of efi_file_open()
The UEFI spec requires that attributes are only set for when
EFI_FILE_MODE_CREATE is set in open_mode.

The SCT tries to read a directory with EFI_FILE_DIRECTORY.

As EDK2 allows this we should not be more strict.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23 21:55:30 +02:00
Heinrich Schuchardt
1c381cebb7 fs: fat: unaligned buffers are not an error
The FAT driver supports unaligned reads and writes and EFI applications
will make use of these. So a misaligned buffer is only worth a debug
message.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23 21:55:30 +02:00
Heinrich Schuchardt
050cea770a efi_loader: provide description of file_open()
Replace urban slang by proper description.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23 21:55:30 +02:00
Heinrich Schuchardt
143acd1ef1 efi_loader: check parameters of efi_file_open()
Check the parameters of efi_file_open().

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23 21:55:30 +02:00
Heinrich Schuchardt
a90bf07afc efi_loader: unset CONFIG_EFI_UNICODE_CAPITALIZATION
Unset CONFIG_EFI_UNICODE_CAPITALIZATION on boards with tough size
restrictions.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23 21:55:30 +02:00
Heinrich Schuchardt
6dec87396e efi_selftest: test key notification functions
Use a key notification function to leave the
EFI_SIMPLE_TEXT_INPUT_EX_PROTOCOL test.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23 21:55:30 +02:00
Heinrich Schuchardt
4fdcf06648 efi_loader: implement key notify functions
Implement registering and unregistreing key notify functions in the
EFI_SIMPLE_TEXT_INPUT_EX_PROTOCOL.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23 21:55:30 +02:00
Heinrich Schuchardt
4f17d8d391 test/py: test EFI_SIMPLE_TEXT_INPUT_EX_PROTOCOL
Add a unit test for the EFI_SIMPLE_TEXT_INPUT_EX_PROTOCOL.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23 21:55:30 +02:00
Heinrich Schuchardt
3394f20021 efi_selftest: test EFI_SIMPLE_TEXT_INPUT_EX_PROTOCOL
Provide a unit test for the EFI_SIMPLE_TEXT_INPUT_EX_PROTOCOL.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23 21:55:30 +02:00
Heinrich Schuchardt
55fbdf9982 efi_loader: support modifiers for F1 - F4
Support modifiers for F1 - F4.
Add support for letters with ALT key.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23 21:55:30 +02:00
Heinrich Schuchardt
110c628058 efi_loader: EFI_SIMPLE_TEXT_INPUT_EX_PROTOCOL
This patch implements the EFI_SIMPLE_TEXT_INPUT_EX_PROTOCOL.

The implementation of notification functions is postponed to a later
patch.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23 21:55:30 +02:00
Heinrich Schuchardt
ca09f1df0c test/py: rework test_efi_selftest_text_input()
Use more precise regular expressions.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23 21:55:30 +02:00
Heinrich Schuchardt
1d69c8d850 efi_selftest: use WaitForKey to test text input
We should test the WaitForKey event.
Testing for EFI_NOT_READY can be done after resetting the console.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23 21:55:30 +02:00
Heinrich Schuchardt
0dfd13a4c8 efi_loader: rework event handling for console
Preread the next key in the console timer event.

The EFI_SIMPLE_TEXT_INPUT_EX_PROTOCOL requires to trigger registered key
notification functions based on the prefetched key.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23 21:55:30 +02:00
Heinrich Schuchardt
262ff411c2 efi_selftest: refactor text input test
Move reusable utility functions to efi_selftest_util.c.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23 21:55:30 +02:00
Heinrich Schuchardt
7d044886c9 test/py: Unicode w/ EFI_SIMPLE_TEXT_INPUT_PROTOCOL
Test that the Euro sign is correctly retrieved from the console via the
EFI_SIMPLE_TEXT_INPUT_PROTOCOL.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23 21:55:30 +02:00
Heinrich Schuchardt
35cbb796aa efi_loader: support Unicode text input
Up to now the EFI_TEXT_INPUT_PROTOCOL only supported ASCII characters.
With the patch it can consume UTF-8 from the console.

Currently only the serial console and the console can deliver UTF-8.
Local consoles are restricted to ASCII.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23 21:55:30 +02:00
Akashi, Takahiro
cce289a928 test/py: fs: add fstest/unlink test
In this commit, test cases for unlink interfaces are added as part of
"test_fs" test suite.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23 21:55:30 +02:00
AKASHI Takahiro
50ca19cca9 test/py: fs: add fstest/mkdir test
In this commit, test cases for mkdir interfaces are added as part of
"test_fs" test suite.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23 21:55:30 +02:00
AKASHI Takahiro
71f27af58e test/py: fs: add extended write operation test
In this commit and the following, test scripts for new filesystem
functionalities introduced by my patch set, "fs: fat: extend FAT write
operations," are provided.

In particular, this patch adds test cases for sub-directory write
and write with non-zero offset.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23 21:55:30 +02:00
AKASHI Takahiro
de8106c198 test/py: convert fs-test.sh to pytest
In this commit, the same set of test cases as in test/fs/fs-test.sh
is provided using pytest framework.
Actually, fs-test.sh provides three variants:"sb" (sb command), "nonfs"
(fatxx and etc.) and "fs" (hostfs), and this patch currently supports
only "nonfs" variant; So it is not a replacement of fs-test.sh for now.

Simple usage:
  $ py.test test/py/tests/test_fs [<other options>]

You may also specify filesystem types to be tested:
  $ py.test test/py/tests/test_fs --fs-type fat32 [<other options>]

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23 21:55:30 +02:00
AKASHI Takahiro
9461fcce37 fs-test: update the test result as of v2018.09
As far as this patch series has been applied, all the tests should
pass. So update the test result summary.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23 21:55:30 +02:00
AKASHI Takahiro
e75996ce54 fs-test: fix false positive error at Test Case 12
The error message to be matched is wrong. Fix it.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23 21:55:30 +02:00
AKASHI Takahiro
d39f6a617c efi_loader: implement a file delete
'Delete' will be implemented here by calling fs_unlink() which relies on
underlying file system's implementation.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23 21:55:30 +02:00
AKASHI Takahiro
d4b751e9f3 cmd: fat: add fatrm command
In this patch, a new command, fatrm, is added so as to delete a file
or directory.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23 21:55:30 +02:00
AKASHI Takahiro
f8240ce95d fs: fat: support unlink
In this patch, unlink support is added to FAT file system.
A directory can be deleted only if it is empty.

In this implementation, only a directory entry for a short file name
will be removed. So entries for a long file name can and should be
reclaimed with fsck.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23 21:55:30 +02:00
AKASHI Takahiro
e2519daf5c fs: add unlink interface
"unlink" interface is added to file operations.
This is a preparatory change as unlink support for FAT file system
will be added in next patch.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23 21:55:30 +02:00
AKASHI Takahiro
5bc84a1303 efi_loader: file: support creating a directory
In efi world, there is no obvious "mkdir" interface, instead, Open()
with EFI_FILE_MODE_CREATE in mode parameter and EFI_FILE_DIRECTORY
in attributes parameter creates a directory.

In this patch, efi_file_open() is extended so as to accept such
a combination of parameters and call u-boot's mkdir interface for
expected action.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23 21:55:30 +02:00
AKASHI Takahiro
0349da5100 cmd: fat: add fatmkdir command
In this patch, a new command, fatmkdir, is added.

Please note that, as there is no notion of "current directory" on u-boot,
a directory name specified must contains an absolute directory path as
a parent directory. Otherwise, "/" (root directory) is assumed.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23 21:55:30 +02:00
AKASHI Takahiro
31a18d570d fs: fat: support mkdir
In this patch, mkdir support is added to FAT file system.
A newly created directory contains only "." and ".." entries.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23 21:55:30 +02:00
AKASHI Takahiro
3a10e07234 fs: fat: remember the starting cluster number of directory
The starting cluster number of directory is needed to initialize ".."
(parent directory) entry when creating a new directory.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23 21:55:29 +02:00
AKASHI Takahiro
e7074cffb8 fs: add mkdir interface
"mkdir" interface is added to file operations.
This is a preparatory change as mkdir support for FAT file system
will be added in next patch.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23 21:55:29 +02:00
AKASHI Takahiro
cda40b2aea cmd: fat: add offset parameter to fatwrite
In this patch, fatwrite command is extended so as to accept an additional
parameter of file offset.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23 21:55:29 +02:00
AKASHI Takahiro
cb8af8af5b fs: fat: support write with non-zero offset
In this patch, all the necessary code for allowing for a file offset
at write is implemented. What plays a major roll here is get_set_cluster(),
which, in contrast to its counterpart, set_cluster(), only operates on
already-allocated clusters, overwriting with data.

So, with a file offset specified, set_contents() seeks and writes data
with set_get_cluster() until the end of a file, and, once it reaches
there, continues writing with set_cluster() for the rest.

Please note that a file will be trimmed as a result of write operation if
write ends before reaching file's end. This is an intended behavior
in order to maintain compatibility with the current interface.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23 21:55:29 +02:00
AKASHI Takahiro
704df6aa0a fs: fat: refactor write interface for a file offset
The current write implementation is quite simple: remove existing clusters
and then allocating new ones and filling them with data. This, inevitably,
enforces always writing from the beginning of a file.

As the first step to lift this restriction, fat_file_write() and
set_contents() are modified to accept an additional parameter, file offset
and further re-factored so that, in the next patch, all the necessary code
will be put into set_contents().

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23 21:55:29 +02:00
AKASHI Takahiro
4ced2039dc fs: fat: support write with sub-directory path
In this patch, write implementation is overhauled and rewritten by
making full use of directory iterator. The obvious bonus is that we are
now able to write to a file with a directory path, like /A/B/C/FILE.

Please note that, as there is no notion of "current directory" on u-boot,
a file name specified must contain an absolute directory path. Otherwise,
"/" (root directory) is assumed.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23 21:55:29 +02:00
AKASHI Takahiro
f1149cea16 fs: fat: write returns error code instead of -1
It would be good that FAT write function return error code instead of
just returning -1 as fat_read_file() does.
This patch attempts to address this issue although it is 'best effort
(or estimate)' for now.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23 21:55:29 +02:00
AKASHI Takahiro
25bb9dab14 fs: fat: check and normalize file name
FAT file system's long file name support is a bit complicated and has some
restrictions on its naming. We should be careful about it especially for
write as it may easily end up with wrong file system.

normalize_longname() check for the rules and normalize a file name
if necessary. Please note, however, that this function is yet to be
extended to fully comply with the standard.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23 21:55:29 +02:00
AKASHI Takahiro
881042ef02 Revert "fs: fat: cannot write to subdirectories"
This reverts commit 0dc1bfb730.
The succeeding patch series will supersede it.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23 21:55:29 +02:00
AKASHI Takahiro
f528c140c8 fs: fat: assure iterator's ->dent belongs to ->clust
In my attempt to re-work write operation, it was revealed that iterator's
"clust" does not always point to a cluster to which a current directory
entry ("dent") belongs.
This patch assures that it is always true by adding "next_clust" which is
used solely for dereferencing a cluster chain.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23 21:55:29 +02:00
AKASHI Takahiro
b94b6be543 fs: fat: handle "." and ".." of root dir correctly with fat_itr_resolve()
FAT's root directory does not have "." nor ".."
So care must be taken when scanning root directory with fat_itr_resolve().
Without this patch, any file path starting with "." or ".." will not be
resolved at all.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23 21:55:29 +02:00
AKASHI Takahiro
f23101f951 fs: fat: extend get_fs_info() for write use
get_fs_info() was introduced in major re-work of read operation by Rob.
We want to reuse this function in write operation by extending it with
additional members in fsdata structure.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23 21:55:29 +02:00
Heinrich Schuchardt
14d103bb27 efi_loader: typos in efi_console.c
Fix a few typos.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23 21:55:29 +02:00
Heinrich Schuchardt
04a0f56357 efi_loader: SPDX-License-Identifier for efi.h
Add the missing SPDX-License-Identifier based on Linux kernel commit
b24413180f56 ("License cleanup: add SPDX GPL-2.0 license identifier to
files with no license").

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23 21:55:29 +02:00
Heinrich Schuchardt
2e0d79a08e efi_loader: SPDX-License-Identifier for efi_api.h
Add the missing SPDX-License-Identifier based on Linux kernel commit
b24413180f56 ("License cleanup: add SPDX GPL-2.0 license identifier to
files with no license").

Correct formatting errors.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23 21:55:29 +02:00
Heinrich Schuchardt
3e603ec757 efi_loader: struct efi_simple_text_input_protocol
%s/efi_simple_input_interface/efi_simple_text_input_protocol/

We should be consistent in the naming of the EFI protocol interface
structures. The protocol is called EFI_SIMPLE_TEXT_INPUT_PROTOCOL.

%s/ExtendedVerification/extended_verification/

Use consistent naming of function parameters. Do not use CamelCase.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23 21:55:29 +02:00
Heinrich Schuchardt
da9ea5bb0d test/py: typo occured
%s/occured/occurred/

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23 21:55:29 +02:00
Heinrich Schuchardt
cb03ec06f5 test/py: test EFI_SIMPLE_TEXT_INPUT_PROTOCOL
Execute the EFI selftest for the EFI_SIMPLE_TEXT_INPUT_PROTOCOL.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23 21:55:29 +02:00
Heinrich Schuchardt
1d719e77ce efi_selftest: EFI_UNICODE_COLLATION_PROTOCOL
Provide a unit test for the EFI_UNICODE_COLLATION_PROTOCOL.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23 21:55:29 +02:00
Heinrich Schuchardt
0bc4b0da7b efi_loader: EFI_UNICODE_COLLATION_PROTOCOL
The patch implements the EFI_UNICODE_COLLATION_PROTOCOL.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23 21:55:29 +02:00
Heinrich Schuchardt
1a1012a1c6 test: tests for utf_to_lower() utf_to_upper().
Provide unit tests for utf_to_lower() utf_to_upper().

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23 21:55:29 +02:00
Heinrich Schuchardt
b5130a8125 lib: charset: upper/lower case conversion
Provide functions for upper and lower case conversion.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23 21:55:29 +02:00
Heinrich Schuchardt
5b2118a2ad efi_loader: capitalization table
This patch provides a define to initialize a table that maps lower to
capital letters for Unicode code point 0x0000 - 0xffff.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23 21:55:29 +02:00
Alexander Graf
40e3e75760 efi_loader: Add console handle references to in/out/err
We register the console in/out protocol on the loaded image handle, but
never tell anyone about it in the systab.

Because of this Shell.efi can not find the input protocol. So let's add
a proper reference.

Signed-off-by: Alexander Graf <agraf@suse.de>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-09-23 21:55:29 +02:00
Heinrich Schuchardt
0414359aa0 efi_loader: use correct documentation style
We have moved generating html documentation with Sphinx.

%s/Return Value/Return/g

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23 21:55:29 +02:00
Heinrich Schuchardt
cc0bfc0122 efi_loader: description efi_update_capsule()
Correct the description of efi_update_capsule().

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23 21:55:29 +02:00
Heinrich Schuchardt
250b3254c7 efi_loader: fix typos in efi_runtime.c
Fix multiple typos

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23 21:55:29 +02:00
Heinrich Schuchardt
b72aaa87f6 efi_loader: fix typos in efi_boottime.c
Fix numerous typos.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23 21:55:29 +02:00
Stephen Warren
14deb5e628 Revert "Revert "efi_loader: efi_allocate_pages is too restrictive""
This reverts commit ccfc78b820.

Now that the underlying issue is fixed, we can revert the revert and hence
restore the original EFI code.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23 21:55:29 +02:00
Stephen Warren
0797f7f0b7 ARM: tegra: reserve unmapped RAM so EFI doesn't use it
Tegra U-Boot ensures that board_get_usable_ram_top() never returns a value
over 4GB, since some peripherals can't access such addresses. However, on
systems with more than 2GB of RAM, RAM bank 1 does describe this extra
RAM, so that Linux (or whatever OS) can use it, subject to DMA
limitations. Since board_get_usable_ram_top() points at the top of RAM
bank 0, the memory locations describes by RAM bank 1 are not mapped by
U-Boot's MMU configuration, and so cannot be used for anything.

For some completely inexplicable reason, U-Boot's EFI support ignores the
value returned by board_get_usable_ram_top(), and EFI memory allocation
routines will return values above U-Boot's RAM top. This causes U-Boot to
crash when it accesses that RAM, since it isn't mapped by the MMU. One
use-case where this happens is TFTP download of a file on Jetson TX1
(p2371-2180).

This change explicitly tells the EFI code that this extra RAM should not
be used, thus avoiding the crash.

A previous attempt to make EFI honor board_get_usable_ram_top() was
rejected. So, this patch will need to be replicated for any board that
implements board_get_usable_ram_top().

Fixes: aa909462d0 ("efi_loader: efi_allocate_pages is too restrictive")
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23 21:55:29 +02:00
Stephen Warren
9b5e6396bf efi_loader: simplify ifdefs
Use CONFIG_IS_ENABLED(EFI_LOADER) to avoid explicitly checking CONFIG_SPL
too. This simplifies the conditional.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23 21:55:29 +02:00
Heinrich Schuchardt
75cb1cd248 lib: charset: remove obsolete functions
Remove functions:
- utf8_to_utf16()
- utf16_strcpy()
- utf16_strdup()

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23 21:55:29 +02:00
Heinrich Schuchardt
7086a71aa8 efi_loader: buffer size for load options
The number of bytes in an utf-8 string is an upper limit for the number of
words in the equivalent utf-16 string. In so far the inumbant coding works
correctly. For non-ASCII characters the utf-16 string is shorter. With the
patch only the necessary buffer size is allocated for the load options.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23 21:55:29 +02:00
Heinrich Schuchardt
ba7bd5c2ba efi_loader: don't use unlimited stack as buffer
The length of a string printed to the console by the
EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL is not limited by the UEFI spec.
Hence should not allocate a buffer for it on the stack.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23 21:55:29 +02:00
Heinrich Schuchardt
dcdb64f7f5 efi_loader: remove limit on variable length
The EFI spec does not provide a length limit for variables.

Reviewed-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23 21:55:29 +02:00
Heinrich Schuchardt
fbba2f6776 test: test printing Unicode
Test printing of Unicode strings

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23 21:55:29 +02:00
Heinrich Schuchardt
31bd711cd0 lib: vsprintf: correct printing of Unicode strings
The width and precision of the printf() function refer to the number of
characters not to the number of bytes printed.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23 21:55:29 +02:00
Heinrich Schuchardt
f11a164b58 test: unit tests for Unicode functions
Provide unit tests for Unicode functions.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23 21:55:29 +02:00
Heinrich Schuchardt
d8c28232c3 lib: charset: utility functions for Unicode
utf8_get() - get next UTF-8 code point from buffer
utf8_put() - write UTF-8 code point to buffer
utf8_utf16_strnlen() - length of a utf-8 string after conversion to utf-16
utf8_utf16_strncpy() - copy a utf-8 string to utf-16
utf16_get() - get next UTF-16 code point from buffer
utf16_put() - write UTF-16 code point to buffer
utf16_strnlen() - number of codes points in a utf-16 string
utf16_utf8_strnlen() - length of a utf-16 string after conversion to utf-8
utf16_utf8_strncpy() - copy a utf-16 string to utf-8

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23 21:55:29 +02:00
Heinrich Schuchardt
1dde0d57a5 efi_loader: rename utf16_strlen, utf16_strnlen
The function names utf16_strlen() and utf16_strnlen() are misnomers.
The functions do not count utf-16 characters but non-zero words.
So let's rename them to u16_strlen and u16_strnlen().

In utf16_dup() avoid assignment in if clause.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23 21:55:29 +02:00
Heinrich Schuchardt
fbb3ea806f lib: build charset.o only if needed
charset.o is only needed for the EFI subsystem

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23 21:55:29 +02:00
Heinrich Schuchardt
7a9e6ee6eb test: print_ut.c use #if CONFIG_IS_ENABLED(EFI_LOADER)
Using CONFIG_IS_ENABLED(EFI_LOADER) allows to simply the #if statements.

Suggested-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23 21:55:29 +02:00
Heinrich Schuchardt
4ddcc4e5d2 vsprintf.c: use #if CONFIG_IS_ENABLED(EFI_LOADER)
Using CONFIG_IS_ENABLED(EFI_LOADER) allows to simply the #if statements.

Suggested-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23 21:55:29 +02:00
Alexander Graf
d5a5a5a747 efi_loader: Pass address to fs_read()
The fs_read() function wants to get an address rather than the
pointer to a buffer.

So let's convert the passed buffer from pointer back a the address
to make efi_loader on sandbox happier.

Signed-off-by: Alexander Graf <agraf@suse.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23 21:55:28 +02:00
Simon Glass
9dff490089 efi: sandbox: Tidy up copy_fdt() to work with sandbox
At present this function takes a pointer as its argument, then passes this
to efi_allocate_pages(), which actually takes an address. It uses casts,
which are not supported on sandbox.

Also the function calculates the FDT size rounded up to the neared EFI
page size, then its caller recalculates the size and adds a bit more to
it.

This function is much better written as something that works with
addresses only, and returns both the address and the size of the relocated
FDT.

Also, copy_fdt() returns NULL on error, but really should propagate the
error from efi_allocate_pages(). To do this it needs to return an
efi_status_t, not a void *.

Update the code in this way, so that it is easier to follow, and also
supports sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23 21:55:28 +02:00
Simon Glass
baf70c0210 efi: Relocate FDT to 127MB instead of 128MB
Sandbox only has 128MB of memory so we cannot relocate the device tree up
to start at 128MB. Use 127MB instead, which should be safe.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23 21:55:28 +02:00
Heinrich Schuchardt
efe79a7c0d efi_selftest: test for loaded image protocol
Verify that the loaded image protocol is installed on the image handle.
Verify that the loaded image protocol points to the system table.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23 21:55:28 +02:00
Heinrich Schuchardt
7e1effcef6 efi_loader: pass system table in loaded image protocol
The system table must be passed as a pointer in the loaded image
protocol.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23 21:55:28 +02:00
Heinrich Schuchardt
e470efd2d9 efi_selftest: memory leak testing manage protocols
Remove memory leak in efi_selftest_manageprotocols.c.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23 21:55:28 +02:00
Tom Rini
284b27cf81 Merge branch 'master' of git://git.denx.de/u-boot-mips 2018-09-23 15:14:12 -04:00
Stefan Roese
fdd1a9ff78 mips: mt7628a.dtsi: Add SPI clock-frequency property
This patch adds the clock-frequency property to the SPI controller
DT node. It will be used by the SPI driver to calculate the baud rate.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-09-23 14:27:51 +02:00
Stefan Roese
41f6e6eb64 mips: mt76xx: Add sysreset support
This patch adds the necessary sysreset DT node and enables the required
drivers via Kconfig.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-09-23 14:27:51 +02:00
Stefan Roese
88dc409914 mips: Add Gardena Smart-Gateway board support
The Gardena Smart-Gateway boards have a MT7688 SoC with 128 MiB of RAM
and 8 MiB of flash (SPI NOR) and additional 128MiB SPI NAND storage.

This patch also includes 2 targets. One is the target that can be
programmed into the SPI NOR flash and a 2nd target "xxx-ram" is
added to support loading and booting via an already running U-Boot
version. This allows easy development and testing without the
need to flash the image each time.

Signed-off-by: Stefan Roese <sr@denx.de>
[fixed and regenerated defconfig files]
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-09-23 14:27:51 +02:00
Stefan Roese
b02f76a835 mips: Add LinkIt Smart 7688 support
The LinkIt Smart 7688 modules have a MT7688 SoC with 128 MiB of RAM
and 32 MiB of flash (SPI NOR).

This patch also includes 2 targets. One is the target that can be
programmed into the SPI NOR flash and a 2nd target "xxx-ram" is
added to support loading and booting via an already running U-Boot
version. This allows easy development and testing without the
need to flash the image each time.

Signed-off-by: Stefan Roese <sr@denx.de>
[fixed and regenerated defconfig files]
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-09-23 14:27:19 +02:00
Stefan Roese
4c835a607b mips: Add basic MediaTek MT7620/88 support
This patch adds basic support for the MediaTek MT7620/88 SoCs. Parts of
the code is copied from the MediaTek GitHub repository:

https://github.com/MediaTek-Labs/linkit-smart-uboot.git

The mt7628a.dtsi file is imported from Linux v4.17.

Support for the LinkIt Smart 7688 module and the Gardena Smart Gateway
both based on the MT7688 will be added in further patches.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-09-22 21:18:33 +02:00
Stefan Roese
503f6f759c mips: Add arch/mips/include/asm/atomic.h
This is needed for the UBIFS support. The file is a copy of
arch/xtensa/include/asm/atomic.h

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-09-22 21:17:54 +02:00
Daniel Schwierzeck
46203baf66 MIPS: cache: remove config option CONFIG_SYS_MIPS_CACHE_MODE
Caches should be configured to mode CONF_CM_CACHABLE_NONCOHERENT
(or CONF_CM_CACHABLE_COW when a CM is available). There is no
need to make this configurable.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-09-22 21:04:10 +02:00
Daniel Schwierzeck
5ef337a037 MIPS: cache: make index base address configurable
The index base address used for the cache initialisation is currently
hard-coded to CKSEG0. Make this value configurable if a MIPS system
needs to have a different address (e.g. in SRAM or ScratchPad RAM).

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-09-22 21:02:03 +02:00
Daniel Schwierzeck
b838586086 MIPS: cache: optimise changing of k0 CCA mode
Changing the Cache Coherency Algorithm (CCA) for kernel mode
requires executing from KSEG1. Thus do a jump from KSEG0 to KSEG1
before changing the CCA mode. Jump back to KSEG0 afterwards.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-09-22 21:02:03 +02:00
Daniel Schwierzeck
2f85c2be21 MIPS: cache: reimplement dcache_[status, enable, disable]
Those functions are not needed during cache init and can be
implemented in C. Only support the safe disabling of caches when
this is required for booting an OS. Reenabling caches is much
harder to implement if an optional coherency manager must be
supported. As there is no real use-case anyway, dcache_enable
is implemented with an error message.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-09-22 21:02:03 +02:00
Daniel Schwierzeck
d1c3d8bdfa MIPS: start.S: make boot config at offset 0x10 configurable
Some MIPS systems store some board-specific boot configuration
in the U-Boot binary at offset 0x10. This is used by Malta boards
and by Lantiq/Intel SoC's when booting from parallel NOR flash.

Convert the hard-coded values to Kconfig options to remove such
board-specific stuff out of the generic start.S code. This also
deprecates the config option CONFIG_SYS_XWAY_EBU_BOOTCFG.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-09-22 20:59:22 +02:00
Philippe Reynes
32f3179ae6 bcm968380gerg: enable pinctrl
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2018-09-22 20:49:59 +02:00
Philippe Reynes
e98a260eb5 dt: bcm6838: add pinctrl
Add pinctrl node and related syscon node for broadcom bcm6838 SoC.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2018-09-22 20:49:59 +02:00
Philippe Reynes
b3f8e88f3c pinctrl: bcm6838: add pinctrl support
Add pinctrl support for broadcom bcm6838 SoC.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2018-09-22 20:49:59 +02:00
Miquel Raynal
d60aea94e9 cmd: mtdparts: remove mandatory 'mtdparts=' prefix
All U-Boot users must define the mtdparts environment variable with:
setenv mtdparts mtdparts=...

While this may ease the partition declaration job to be passed to
Linux, this is a pure software limitation and forcing this prefix is a
complete non-sense. Let the user to declare manually the mtdparts
variable without the prefix.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Acked-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2018-09-20 20:11:01 +05:30
Miquel Raynal
00ac922db4 cmd: mtdparts: accept spi-nand devices
Let spi-nand devices be recognized by mtdparts. This is superfluous
but a full mtdparts rework would be very time-consuming.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Acked-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2018-09-20 20:11:01 +05:30
Miquel Raynal
b87b0d8d79 lib: strto: fix metric suffix parsing in strtoul[l]
While 1kB or 1kiB will be parsed correctly, 1k will return the right
amount, but the metric suffix will not be escaped once the char
pointer updated. Fix this situation by simplifying the move of the
endp pointer.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2018-09-20 20:11:01 +05:30
Miquel Raynal
a353e6aa8e lib: strto: parse all lowercase metric prefixes in ustrtoul[l]
Both ustrtoul and ustrtoull interpret 1k but not 1m or 1g. Even if the
SI symbols for Mega and Giga are 'M' and 'G', certain entries of
eg. mtdparts also use (wrongly) the metric prefix 'm' and 'g'.

I do not see how parsing lowercase prefixes could break anything, so
parse them like their uppercase counterpart.

Also, even though kiB is not equal to kB in general, lets not change
U-Boot behavior and always use kiB and kB (same applies for MiB vs. MB
and GiB vs. GB) as a representation for 1024 instead of 1000.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2018-09-20 20:11:01 +05:30
Miquel Raynal
2b9ace5527 cmd: mtdparts: add fallthrough in switch statement
Switch blocks for deriving size naturally use fallthrough between
'case' statements. Make it explicit.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-09-20 20:10:49 +05:30
Miquel Raynal
b01c146d18 cmd: ubi: delete useless and misleading definitions
These definitions are simply not used and are misleading because similar
definitions exist in jffs2/load_kernel.h and are used widely to define
MTD device types (which is, by the way, totally redundant with what the
MTD core does). Remove these definitions.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Acked-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com>
2018-09-20 20:10:49 +05:30
Miquel Raynal
b0036f7004 mtd: mtdpart: balance debug messages
Balance debug message in the partition allocation/removal process in
order to keep track of them more easily.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-09-20 20:10:49 +05:30
Miquel Raynal
4048a5c519 mtd: declare MTD_PARTITIONS symbol in Kconfig
UBI selects MTD_PARTITIONS which is the symbol to compile
drivers/mtd/mtdpart.c. Unfortunately, the symbol was not defined in
Kconfig and this worked only with board files defining it. Fix this by
adding a boolean in Kconfig so boards defined by defconfig files only
will work as expected.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com>
2018-09-20 20:10:49 +05:30
Boris Brezillon
0fa1fc43c8 dt-bindings: Add bindings for SPI NAND devices
Add bindings for SPI NAND chips.

Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Acked-by: Jagan Teki <jagan@openedev.com>
2018-09-20 20:10:49 +05:30
Miquel Raynal
515d021261 mtd: spinand: Add initial support for the MX35LF2GE4AB chip
Add support for the MX35LF2GE4AB chip, which is similar to its cousin
MX35LF1GE4AB, with two planes instead of one.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Acked-by: Jagan Teki <jagan@openedev.com>
2018-09-20 20:10:49 +05:30
Boris Brezillon
6f041ccabb mtd: spinand: Add initial support for the MX35LF1GE4AB chip
Add minimal support for the MX35LF1GE4AB SPI NAND chip.

Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Acked-by: Jagan Teki <jagan@openedev.com>
2018-09-20 20:10:49 +05:30
Frieder Schrempf
3181c0a622 mtd: spinand: Add initial support for Winbond W25M02GV
Add support for the W25M02GV chip.

Signed-off-by: Frieder Schrempf <frieder.schrempf@exceet.de>
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Acked-by: Jagan Teki <jagan@openedev.com>
2018-09-20 20:10:49 +05:30
Peter Pan
883d8778ae mtd: spinand: Add initial support for Micron MT29F2G01ABAGD
Add a basic driver for Micron SPI NANDs. Only one device is supported
right now, but the driver will be extended to support more devices
afterwards.

Signed-off-by: Peter Pan <peterpandong@micron.com>
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Acked-by: Jagan Teki <jagan@openedev.com>
2018-09-20 20:10:49 +05:30
Peter Pan
0a6d6bae03 mtd: nand: Add core infrastructure to support SPI NANDs
Add a SPI NAND framework based on the generic NAND framework and the
spi-mem infrastructure.

In its current state, this framework supports the following features:

- single/dual/quad IO modes
- on-die ECC

Signed-off-by: Peter Pan <peterpandong@micron.com>
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Acked-by: Jagan Teki <jagan@openedev.com>
2018-09-20 20:10:49 +05:30
Boris Brezillon
d13f5b254a spi: Extend the core to ease integration of SPI memory controllers
Some controllers are exposing high-level interfaces to access various
kind of SPI memories. Unfortunately they do not fit in the current
spi_controller model and usually have drivers placed in
drivers/mtd/spi-nor which are only supporting SPI NORs and not SPI
memories in general.

This is an attempt at defining a SPI memory interface which works for
all kinds of SPI memories (NORs, NANDs, SRAMs).

Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Acked-by: Jagan Teki <jagan@openedev.com>
2018-09-20 20:10:49 +05:30
Boris Brezillon
f86787280b mtd: nand: Pass mode information to nand_page_io_req
The NAND sub-layers are likely to need the MTD_OPS_XXX mode information
in order to decide if they should enable/disable ECC or how they should
place the OOB bytes in the provided OOB buffer.

Add a field to nand_page_io_req to pass this information.

Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-09-20 20:10:49 +05:30
Boris Brezillon
b95db8d33a mtd: nand: Add core infrastructure to deal with NAND devices
Add an intermediate layer to abstract NAND device interface so that
some logic can be shared between SPI NANDs, parallel/raw NANDs,
OneNANDs, ...

Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Acked-by: Jagan Teki <jagan@openedev.com>
2018-09-20 20:10:49 +05:30
Miquel Raynal
3657b2f4a3 mtd: rename nand into rawnand in Kconfig prompt
Sync the Kconfig raw NAND entry title with the code architecture.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-09-20 20:10:49 +05:30
Miquel Raynal
a430fa06a4 mtd: move NAND files into a raw/ subdirectory
NAND flavors, like serial and parallel, have a lot in common and would
benefit to share code. Let's move raw (parallel) NAND specific code in a
raw/ subdirectory, to ease the addition of a core file in nand/ and the
introduction of a spi/ subdirectory specific to SPI NANDs.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-09-20 20:10:49 +05:30
Miquel Raynal
ce9bdc8743 mtd: move all flash categories inside MTD submenu
There is no reason to have NAND, SPI flashes and UBI sections outside of
the MTD submenu in Kconfig.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-09-20 20:10:49 +05:30
Miquel Raynal
d02f1d36ec mtd: move definitions to enlarge their range
Some helpers might be useful in a future 'mtd' U-Boot command to parse
MTD device list.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-09-20 20:10:49 +05:30
Brian Norris
9bfc3fde9c mtd: add get/set of_node/flash_node helpers
We are going to begin using the mtd->dev.of_node field for MTD device
nodes, so let's add helpers for it. Also, we'll be making some
conversions on spi_nor (and nand_chip eventually) too, so get that ready
with their own helpers.

Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Reviewed-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-09-20 20:10:49 +05:30
Miquel Raynal
ca040d8512 mtd: Fallback to ->_read/write() when ->_read/write_oob() is missing
Some MTD sublayers/drivers are implementing ->_read/write() and
not ->_read/write_oob().

While for NAND devices both are usually valid, for NOR devices, using
the _oob variant has no real meaning. But, as the MTD layer is supposed
to hide as much as possible the flash complexity to the user, there is
no reason to error out while it is just a matter of rewritting things
internally.

Add a fallback on mtd->_read() (resp. mtd->_write()) when the user calls
mtd_read_oob() (resp. mtd_write_oob()) while mtd->_read_oob() (resp.
mtd->_write_oob) is not implemented. There is already a fallback on the
_oob variant if the former is used.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com>
2018-09-20 20:10:49 +05:30
Boris Brezillon
8fad769f1e mtd: Add sanity checks in mtd_write/read_oob()
Unlike what's done in mtd_read/write(), there are no checks to make sure
the parameters passed to mtd_read/write_oob() are consistent, which
forces implementers of ->_read/write_oob() to do it, which in turn leads
to code duplication and possibly errors in the logic.

Do general sanity checks, like ops fields consistency and range checking.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Cc: Peter Pan <peterpandong@micron.com>
Signed-off-by: Richard Weinberger <richard@nod.at>
[Miquel: squashed the fix about the chip's size check]
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-09-20 20:10:49 +05:30
Ezequiel Garcia
5f50d82d89 mtd: Uninline mtd_write_oob and move it to mtdcore.c
There's no reason for having mtd_write_oob inlined in mtd.h header.
Move it to mtdcore.c where it belongs.

Signed-off-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>
Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Jacek Anaszewski <j.anaszewski@samsung.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-09-20 20:10:49 +05:30
Boris Brezillon
596cf083da mtd: Fallback to ->_read/write_oob() when ->_read/write() is missing
Some MTD sublayers/drivers are implementing ->_read/write_oob() and
provide dummy wrappers for their ->_read/write() implementations.
Let the core handle this case instead of duplicating the logic.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Robert Jarzmik <robert.jarzmik@free.fr>
Acked-by: Brian Norris <computersforpeace@gmail.com>
Reviewed-by: Miquel Raynal <miquel.raynal@free-electrons.com>
Tested-by: Ladislav Michl <ladis@linux-mips.org>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-09-20 20:10:49 +05:30
Tom Rini
9dc8d155d4 Merge git://git.denx.de/u-boot-imx
- changes in pico-* boards
- fix imx6ull pinmux
2018-09-19 20:35:27 -04:00
Tom Rini
333279af23 Merge git://git.denx.de/u-boot-marvell
- Multiples updates to the turris boards / platform
- Changes / enhancements to the Marvell PHY drivers, mainly
  to support the turris platform
- Many fixes and enhancements to the pxa3xx NAND driver
- Fixes for the UART boot mode in kwboot
- Misc minor changes to other 32bit and 64bit boards
2018-09-19 20:35:05 -04:00
Baruch Siach
e32ac37119 arm: mvebu: clearfog: enable eMMC boot partitions support
The Clearfog SOM can optionally have eMMC installed. Enable support for
eMMC boot partitions by default.

Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-09-19 14:00:06 +02:00
Rabeeh Khoury
d13b740ca6 phy: marvell: add SATA comphy RX/TX polarity invert support
This patch adds support to Armada 7k/8k comphy RX/TX lane swap. The
'phy-invert' DT property defines the inverted signals.

Signed-off-by: Rabeeh Khoury <rabeeh@solid-run.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-09-19 13:54:27 +02:00
Konstantin Porotchkin
3c2a3897e8 fix: cmd: mvebu: Exclude mvebu commands from SPL builds
Exclude mvebu commands from SPL builds

Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Cc: Igal Liberman <igall@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-09-19 13:54:14 +02:00
Konstantin Porotchkin
d3c72c5dc1 fix: mvebu: Add SPI parameters for environment setup
Add definitions for CONFIG_ENV_SPI_BUS and CONFIG_ENV_SPI_CS
to Armada-388-GP board configuration

Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Cc: Igal Liberman <igall@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-09-19 09:02:34 +02:00
Konstantin Porotchkin
25a17652c9 fix: env: Fix the SPI flash device setup for DM mode
For some reason the spi_flash_probe_bus_cs() is called
inside the setup_flash_device() with zero values in place
of configurated SPI flash mode and maximum flash speed.
This code causes HALT error during startup environment
relocation on some platforms - namely Armada-38x-GP board.
Fix the function call by replacing zeros with the appropriate
values - CONFIG_ENV_SPI_MAX_HZ and CONFIG_ENV_SPI_MODE.

Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Cc: Igal Liberman <igall@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-09-19 09:02:34 +02:00
David Sniatkiwicz
e76afd8409 fix: nand: pxa3xx: Add WA for eliminating flash ready timeout
add delay before processing the status flags in pxa3xx_nand_irq().

Signed-off-by: David Sniatkiwicz <davidsn@marvell.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
Reviewed-by: Kostya Porotchkin <kostap@marvell.com>
c: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-09-19 09:02:34 +02:00
Konstantin Porotchkin
b7b3f2c8bb nand: pxa3xx: Add support for 8KB page 4 and 8 bit ECC NAND
Add support for NAND chips with 8KB page, 4 and 8 bit ECC (ONFI).

Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Reviewed-by: Ofer Heifetz <oferh@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-09-19 09:02:34 +02:00
Konstantin Porotchkin
e9a0777f85 nand: pxa3xx: cosmetic: add comments to the timing layout structures
Add comments with timing parameter names and some details about
nand layout fileds.
Remove unneeded definition.

Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-09-19 09:02:34 +02:00
Konstantin Porotchkin
2057eb0b16 fix: nand: Replace hardcoded page chunk size with calculated one
Replace the hardcoded value of page chink with value that
depends on flash page size and ECC strength.
This fixes nand access errors for 2K page flashes with 8-bit ECC.
Move the initial flash commannd function assignment past the ECC
structures initialization for eliminating usage of hardcoded page
chunk size value.

Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-09-19 09:02:34 +02:00
Konstantin Porotchkin
b0d7c106c9 mtd: nand: pxa3xx: add support for Toshiba flash
Add timings and device ID for Toshiba TC58NVG1S3HTA00 flash

Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-09-19 09:02:34 +02:00
Victor Axelrod
ac56a3b30c mtd: nand: pxa3xx: add support for 2KB 8-bit flash
Add support for 2KB page 8-bit ECC strength flash layout

Signed-off-by: Victor Axelrod <victora@marvell.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-09-19 09:02:34 +02:00
Boris Brezillon
f3d235702d mtd: nand: pxa3xx: Fix READOOB implementation
In the current driver, OOB bytes are accessed in raw mode, and when a
page access is done with NDCR_SPARE_EN set and NDCR_ECC_EN cleared, the
driver must read the whole spare area (64 bytes in case of a 2k page,
16 bytes for a 512 page). The driver was only reading the free OOB
bytes, which was leaving some unread data in the FIFO and was somehow
leading to a timeout.

We could patch the driver to read ->spare_size + ->ecc_size instead of
just ->spare_size when READOOB is requested, but we'd better make
in-band and OOB accesses consistent.
Since the driver is always accessing in-band data in non-raw mode (with
the ECC engine enabled), we should also access OOB data in this mode.
That's particularly useful when using the BCH engine because in this
mode the free OOB bytes are also ECC protected.

Fixes: 43bcfd2bb24a ("mtd: nand: pxa3xx: Add driver-specific ECC BCH support")
Cc: stable@vger.kernel.org
Reported-by: Sean Nyekjær <sean.nyekjaer@prevas.dk>
Tested-by: Willy Tarreau <w@1wt.eu>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>
Tested-by: Sean Nyekjaer <sean.nyekjaer@prevas.dk>
Acked-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Richard Weinberger <richard@nod.at>
Signed-off-by: Ofer Heifetz <oferh@marvell.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-09-19 09:02:34 +02:00
Ofer Heifetz
b47f677931 mtd: nand: pxa3xx_nand: add support for partial chunks
This commit is needed to properly support the 8-bits ECC configuration
with 4KB pages.

When pages larger than 2 KB are used on platforms using the PXA3xx
NAND controller, the reading/programming operations need to be split
in chunks of 2 KBs or less because the controller FIFO is limited to
about 2 KB (i.e a bit more than 2 KB to accommodate OOB data). Due to
this requirement, the data layout on NAND is a bit strange, with ECC
interleaved with data, at the end of each chunk.

When a 4-bits ECC configuration is used with 4 KB pages, the physical
data layout on the NAND looks like this:

| 2048 data | 32 spare | 30 ECC | 2048 data | 32 spare | 30 ECC |

So the data chunks have an equal size, 2080 bytes for each chunk,
which the driver supports properly.

When a 8-bits ECC configuration is used with 4KB pages, the physical
data layout on the NAND looks like this:

| 1024 data | 30 ECC | 1024 data | 30 ECC | 1024 data | 30 ECC | 1024 data | 30 ECC | 64 spare | 30 ECC |

So, the spare area is stored in its own chunk, which has a different
size than the other chunks. Since OOB is not used by UBIFS, the initial
implementation of the driver has chosen to not support reading this
additional "spare" chunk of data.

Unfortunately, Marvell has chosen to store the BBT signature in the
OOB area. Therefore, if the driver doesn't read this spare area, Linux
has no way of finding the BBT. It thinks there is no BBT, and rewrites
one, which U-Boot does not recognize, causing compatibility problems
between the bootloader and the kernel in terms of NAND usage.

To fix this, this commit implements the support for reading a partial
last chunk. This support is currently only useful for the case of 8
bits ECC with 4 KB pages, but it will be useful in the future to
enable other configurations such as 12 bits and 16 bits ECC with 4 KB
pages, or 8 bits ECC with 8 KB pages, etc. All those configurations
have a "last" chunk that doesn't have the same size as the other
chunks.

In order to implement reading of the last chunk, this commit:

 - Adds a number of new fields to the pxa3xx_nand_info to describe how
   many full chunks and how many chunks we have, the size of full
   chunks and partial chunks, both in terms of data area and spare
   area.

 - Fills in the step_chunk_size and step_spare_size variables to
   describe how much data and spare should be read/written for the
   current read/program step.

 - Reworks the state machine to accommodate doing the additional read
   or program step when a last partial chunk is used.

This commit is taken from Linux:
'commit c2cdace755b'
("mtd: nand: pxa3xx_nand: add support for partial chunks")

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Ofer Heifetz <oferh@marvell.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-09-19 09:00:39 +02:00
Ofer Heifetz
7efd95eacf mtd: pxa3xx_nand: Simplify pxa3xx_nand_scan
This commit simplifies the initial configuration performed
by pxa3xx_nand_scan. No functionality change is intended.

This commit is taken from Linux:
'commit 154f50fbde53'
("mtd: pxa3xx_nand: Simplify pxa3xx_nand_scan")

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Ofer Heifetz <oferh@marvell.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-09-19 09:00:39 +02:00
Ofer Heifetz
b87ae6f587 mtd: pxa3xx_nand: Fix initial controller configuration
The Data Flash Control Register (NDCR) contains two types
of parameters: those that are needed for device identification,
and those that can only be set after device identification.

Therefore, the driver can't set them all at once and instead
needs to configure the first group before nand_scan_ident()
and the second group later.

Let's split pxa3xx_nand_config in two halves, and set the
parameters that depend on the device geometry once this is known.

This commit is taken from Linux:
'commit 66e8e47eae65'
("mtd: pxa3xx_nand: Fix initial controller configuration")

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Ofer Heifetz <oferh@marvell.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-09-19 09:00:39 +02:00
Ofer Heifetz
6bbe7f681f mtd: pxa3xx_nand: Increase the initial chunk size
The chunk size represents the size of the data chunks, which
is used by the controllers that allow to split transferred data.

However, the initial chunk size is used in a non-split way,
during device identification. Therefore, it must be large enough
for all the NAND commands issued during device identification.
This includes NAND_CMD_PARAM which was recently changed to
transfer up to 2048 bytes (for the redundant parameter pages).

Thus, the initial chunk size should be 2048 as well.

On Armada 370/XP platforms (NFCv2) booted without the keep-config
devicetree property, this commit fixes a timeout on the NAND_CMD_PARAM
command:

  [..]
  pxa3xx-nand f10d0000.nand: This platform can't do DMA on this device
  pxa3xx-nand f10d0000.nand: Wait time out!!!
  nand: device found, Manufacturer ID: 0x2c, Chip ID: 0x38
  nand: Micron MT29F8G08ABABAWP
  nand: 1024 MiB, SLC, erase size: 512 KiB, page size: 4096, OOB size: 224

This commit is taken from Linux:
'commit c7f00c29aa8'
("mtd: pxa3xx_nand: Increase the initial chunk size")

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Ofer Heifetz <oferh@marvell.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-09-19 09:00:39 +02:00
Ofer Heifetz
94488612cb nand: pxa3xx: Increase READ_ID buffer and make the size static
The read ID count should be made as large as the maximum READ_ID size,
so there's no need to have dynamic size. This commit sets the hardware
maximum read ID count, which should be more than enough on all cases.
Also, we get rid of the read_id_bytes, and use a macro instead.

This commit is taken from Linux:
'commit b226eca2088'
("nand: pxa3xx: Increase READ_ID buffer and make the size static")

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Ofer Heifetz <oferh@marvell.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-09-19 09:00:39 +02:00
Ofer Heifetz
cd11b2b457 mtd: nand: pxa3xx-nand: fix random command timeouts
When 2 commands are submitted in a row, and the second is very quick,
the completion of the second command might never come. This happens
especially if the second command is quick, such as a status read
after an erase

This patch is taken from Linux:
'commit 21fc0ef9652f'
("mtd: nand: pxa3xx-nand: fix random command timeouts")

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Ofer Heifetz <oferh@marvell.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-09-19 09:00:39 +02:00
Ofer Heifetz
658999244a mtd: nand: pxa3xx_nand: fix early spurious interrupt
When the nand is first probe, and upon the first command start, the
status bits should be cleared before the interrupts are unmasked.

This commit is taken from Linux:
'commit 0b14392db2e'
("mtd: nand: pxa3xx_nand: fix early spurious interrupt")

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Ofer Heifetz <oferh@marvell.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-09-19 09:00:39 +02:00
Ofer Heifetz
d3859d1b53 mtd: nand: pxa3xx_nand: sync pxa3xx_nand_set_sdr_timing()
Since the pxa3xx_nand driver was added there has been a discrepancy in
pxa3xx_nand_set_sdr_timing() around the setting of tWP_min and tRP_min.
This brings us into line with the current Linux code.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Ofer Heifetz <oferh@marvell.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-09-19 09:00:39 +02:00
Ofer Heifetz
8cdcf672c5 mtd: nand: pxa3xx_nand: use nand_to_mtd()
Don't store struct mtd_info in struct pxa3xx_nand_host. Instead use the
one that is already part of struct nand_chip. This brings us in line
with current U-boot and Linux conventions.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Ofer Heifetz <oferh@marvell.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-09-19 09:00:39 +02:00
Ofer Heifetz
144532242e mtd: nand: pxa3xx_nand: Increase initial buffer size
The initial buffer is used for the initial commands used to detect
a flash device (STATUS, READID and PARAM).

ONFI param page is 256 bytes, and there are three redundant copies
to be read. JEDEC param page is 512 bytes, and there are also three
redundant copies to be read. Hence this buffer should be at least
512 x 3. This commits rounds the buffer size to 2048.

This commit is taken from Linux:
'commit c16340973fcb64614' ("nand: pxa3xx: Increase initial buffer size")

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Ofer Heifetz <oferh@marvell.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-09-19 09:00:39 +02:00
Marek Behún
863949e383 board: turris_mox: Fixup U-Boot's device tree if PCIe connected
If PCIe Mox module is connected we want to have PCIe node enabled
in U-Boot's device tree.

Signed-off-by: Marek Behun <marek.behun@nic.cz>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-09-19 09:00:39 +02:00
Baruch Siach
f26e379b31 dts: mvebu: mcbin: drop redundant SD slot node
Commit 61dccf73d3 (dts: mvebu: a80x0: Enable SD/eMMC interfaces) added
a redundant DT node for SD card slot. Drop it.

Cc: Konstantin Porotchkin <kostap@marvell.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-09-19 09:00:38 +02:00
Marek Behún
0f6686e228 arch/arm/dts: Update Turris Mox device tree
Remove smi_pins definition since it is already in armada-37xx.dtsi.
Add assigned-clocks definitions to spi0.

Signed-off-by: Marek Behun <marek.behun@nic.cz>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-09-19 09:00:38 +02:00
Marek Behún
c04a3d1157 board: turris_mox: Enable PCI in defconfig
Enable the pci-aardvark driver in defconfig for Turris Mox and also
enable the pci command.

Signed-off-by: Marek Behun <marek.behun@nic.cz>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-09-19 08:59:26 +02:00
Marek Behún
17445e9688 board: turris_mox: Fix watchdog macro name
The macro name CONFIG_WDT_ARMADA_3720 is called CONFIG_WDT_ARMADA_37XX
instead. Fix this so that watchdog really is enabled in board_init.

Signed-off-by: Marek Behun <marek.behun@nic.cz>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-09-19 08:59:26 +02:00
Marek Behún
de75fb09a1 clk: armada-37xx-periph: Support changing clock parent and rate
Add support for changing clock rate and parent clock for Armada 37xx
peripheral clocks.

Only clocks which can be disabled (.can_gate is true) can have parent
or rate changed.

This is needed so that Turris Mox can change SPI clock in device tree.

Signed-off-by: Marek Behun <marek.behun@nic.cz>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-09-19 08:59:26 +02:00
Marek Behún
4b8cb84327 phy: marvell: Support changing SERDES map in board file
This adds a weak definition of comphy_update_map to comphy_core,
which does nothing. If this function is defined elsewhere, for example
in board file, the board file can change some parameters of SERDES
configuration.

This is needed on Turris Mox, where the SERDES speed on lane 1 has to
be set differently when SFP module is connected and when Topaz Switch
module is connected.

This is a temporary solution. When the comphy driver for armada-3720
will be added to the kernel, the comphy driver in u-boot shall also be
updated and this should be done differently then.

Signed-off-by: Marek Behun <marek.behun@nic.cz>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-09-19 08:59:26 +02:00
Chris Packham
2fd4284051 ARM: mach-mvebu: handle fall-back to UART boot
The bootROM in the Armada-38x (and similar) SoC has two modes for UART
boot. The first is when the normal boot media is blank (or otherwise
missing the kwb header). The second is when the boot sequence has been
interrupted with the magic byte sequence on the UART lines.

In the first mode the bootROM routine and error code register will
indicate that there was an error booting from the configured media in
bits 7:0. In the second mode there is no error to indicate but the boot
source is provided via bits 31:28.

Handle both situations so that kwboot can be used for both boot
strapping a blank board and for intercepting a regular boot sequence.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Sean Nyekjaer <sean.nyekjaer@prevas.dk>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-09-19 08:59:26 +02:00
Chris Packham
e0977297e8 Revert "arm: mvebu: fix boot from UART when in fallback mode"
This reverts commit e83e2b3900. This
prevents kwboot from overriding the hardware strapped boot source.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-09-19 08:59:26 +02:00
Baruch Siach
7e1d32208e arm64: mvebu: armada-8k: support environment in SD/eMMC
Detect the SD/eMMC boot device at run-time. Load the environment from
the boot deice, as well as save to it.

Leave the environment offset the same as in the SPI flash.

Make SD/eMMC 0 the default environment device when the boot device is
not detected.

Cc: Konstantin Porotchkin <kostap@marvell.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-09-19 08:59:26 +02:00
Jon Nettleton
9ca6fae9d0 tools: kwboot: Make kwboot more robust on a38x
This patch accomplishes 2 things to make the kwboot procedure
on the a38x more reliable.

1)  We fill the tty with 1K of the magic bootparam.  This helps
with the timing of where the microcode picks up in the read of
the line to ensure we actually catch the break to go into recovery
mode

2)  Before starting the xmodem transfer we sleep for 2 seconds
and then flush the line.  This allows all the magic bootparam
to be flushed from the line and makes the xmodem transfer reliable
and removes the Bad message failures.

Signed-off-by: Jon Nettleton <jon@solid-run.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-09-19 08:59:26 +02:00
Baruch Siach
881e8478c1 doc/git-mailrc: add Stefan Roese to the kirkwood alias
Stefan is listed as a kirkwood maintainer since commit f822d8578b
(MAINTAINERS: Update Marvell custodianship).

Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-09-19 08:59:26 +02:00
Evgeni Dobrev
028280061a Kirkwood: NAS220: remove bootdelay from CONFIG_EXTRA_ENV_SETTINGS
The default bootdelay of 3 seconds is good enough and there is no need
to duplicate it in CONFIG_EXTRA_ENV_SETTINGS.

Signed-off-by: Evgeni Dobrev <evgeni@studio-punkt.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-09-19 08:59:26 +02:00
Tom Rini
4e710ebb44 Merge git://git.denx.de/u-boot-dm
- MPC83xx device tree additions (CPU and RAM)
- Fix sandbox build error
- Sync bitrev with Linux
- Various ofnode/DT improvements
2018-09-18 20:42:37 -04:00
Bin Meng
75629a2508 dm: uclass: Adding missing child_pre_probe description
The comment of child_pre_probe, one of the 'struct uclass_driver'
members, is currently missing.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-09-18 13:27:10 -06:00
Masahiro Yamada
138c8a7562 dm: fix alignment of help message of "dm" command
Currently, "help dm" shows as follows:

=> help dm
dm - Driver model low level access

Usage:
dm tree         Dump driver model tree ('*' = activated)
dm uclass        Dump list of instances for each uclass
dm devres        Dump list of device resources for each device

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2018-09-18 13:23:33 -06:00
Otavio Salvador
f7df8932cc pico-imx7d: Add a new defconfig with PICO-Hobbit selected
This adds a new defconfig which pre-selects the PICO-Hobbit baseboard
allowing a completely non-interactive boot process.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2018-09-18 16:55:21 +02:00
Otavio Salvador
130f03a7af pico-imx7d: Add PICO-Hobbit baseboard support
This adds the device tree to the DFU and bootmenu environment setting.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2018-09-18 16:55:21 +02:00
Otavio Salvador
f40d0e8b25 pico-imx7d: Fix TechNexion spelling on MAINTAINERS file
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2018-09-18 16:55:21 +02:00
Otavio Salvador
f4e5516bc1 pico-imx6ul: Add a new defconfig with PICO-Pi selected
This adds a new defconfig which pre-selects the PICO-Pi baseboard
allowing a completely non-interactive boot process.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2018-09-18 16:55:21 +02:00
Otavio Salvador
3a8932b6f6 pico-imx6ul: Add PICO-Pi baseboard support
This adds the device tree to the DFU and bootmenu environment setting.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2018-09-18 16:55:21 +02:00
Otavio Salvador
8854cf2591 pico-imx6ul: Fix TechNexion spelling on MAINTAINERS file
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2018-09-18 16:55:21 +02:00
Stefano Babic
0eee446ee8 Merge branch 'master' of git://git.denx.de/u-boot into master
Signed-off-by: Stefano Babic <sbabic@denx.de>
2018-09-18 16:53:55 +02:00
Michael Heimpold
383d2568a7 binman: fix a few typos in documentation
This fixes four small typos in the README file.

Signed-off-by: Michael Heimpold <mhei@heimpold.de>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-09-18 08:12:21 -06:00
Jens Wiklander
9bc7e96a7d test: ofnode: test ofnode_by_prop_value()
Test ofnode_by_prop_value()

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-09-18 08:12:21 -06:00
Jens Wiklander
61fba0faba ofnode: add ofnode_by_prop_value()
Adds ofnode_by_prop_value() to search for nodes with a given property
and value, an ofnode version of fdt_node_offset_by_prop_value().

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-09-18 08:12:21 -06:00
Cédric Le Goater
427ddd8420 dm: core: fix devfdt_remap_addr_index()
commit 30a90f56c3 ("dm: core: add functions to get memory-mapped I/O
addresses") introduced a devfdt_remap_addr_index() routine but it does
not make use of the index parameter.

Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-09-18 08:12:21 -06:00
Rajan Vaja
1712ca2192 dm: core: Scan "/firmware" node by default
All Linux firmware drivers are put under "/firmware" node
and it has support to populate "/firmware" node by default.

u-boot and Linux can share same DTB. In this case, driver
probe for devices under "/firmware" will not be invoked
as "/firmware" does not have its own "compatible" property.

This patch scans "/firmware" node by default like "/clocks".

Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-09-18 08:12:21 -06:00
Rajan Vaja
68d215d907 dm: core: Move "/clock" node scan into function
Create separate function for scanning node by path and
move "/clock" node scan code into that function.

This will be usable if scanning of more node is required.

Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-09-18 08:12:21 -06:00
Mario Six
d2166319df misc: Add MPC83xx serdes driver
Add a driver to configure the SerDes (Serializer/Deserializer) lanes on
the MPC83xx architecture.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-09-18 08:12:21 -06:00
Mario Six
19fbdca47b cpu: Add MPC83xx CPU driver
Add a CPU driver for the MPC83xx architecture.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-09-18 08:12:21 -06:00
Mario Six
fa44b53398 test: Add tests for CPU uclass
Add a sandbox CPU driver, and some tests for the CPU uclass.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-09-18 08:12:21 -06:00
Mario Six
57370de377 cpu: Add cpu_probe_all method
Add a method to probe all CPUs of the board.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-09-18 08:12:21 -06:00
Mario Six
50d188b955 cpu: Fix cpu.h documentation
Documentation in cpu.h is not in kernel-doc format. Change it to comply
with it.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-09-18 08:12:21 -06:00
Mario Six
c0434407b5 board_f: Use static print_cpuinfo if CONFIG_CPU is active
When the DM CPU drivers are active, printing information about a CPU
should be delegated to a matching driver.

Hence, add a static print_cpuinfo that implements this delegation when
DM CPU drivers are active.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Changed condition to CONFIG_IS_ENABLED(CPU):
Signed-off-by: Simon Glass <sjg@chromium.org>
2018-09-18 08:12:16 -06:00
Mario Six
dc145a7be3 init: Fix documentation
The documentation in init.h is not in kernel-doc format. Fix this.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-09-18 00:01:18 -06:00
Mario Six
138181a550 common: board_f: Sort includes
Includes should be sorted.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-09-18 00:01:18 -06:00
Mario Six
2c21749d71 timer: Add MPC83xx timer driver
Add a timer driver for the MPC83xx architecture.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-09-18 00:01:18 -06:00
Mario Six
d259f975d4 timer: Sort Makefile entries
Makefile entries should be sorted.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-09-18 00:01:18 -06:00
Mario Six
07d538d281 clk: Add MPC83xx clock driver
Add a clock driver for the MPC83xx architecture.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-09-18 00:01:18 -06:00
Mario Six
76fdad1f21 mpc83xx: Add sysreset driver
Add a sysreset driver for the MPC83xx platform.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-09-18 00:01:18 -06:00
Mario Six
23471aed5c board_f: Add reset status printing
To print the reset status during boot, add a method print_resetinfo to
board_f, which is called in init_sequence_f[], that gets the reset
information from the sysreset driver (assuming there is only one seems
reasonable), and prints it.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-09-18 00:01:18 -06:00
Mario Six
cda4688c5e test: Add tests for sysreset_get_status
Add some tests for sysreset_get_status.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-09-18 00:01:18 -06:00
Mario Six
245f5cda69 sysreset: Add get_status method
It's useful to have the reset status of the SoC printed out during reset
(e.g. to learn whether the reset was caused by software or a watchdog).

As a first step to implement this, add a get_status method to the
sysreset class, which enables the caller to get printable information
about the reset status (akin to get_desc in the CPU uclass).

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-09-18 00:01:18 -06:00
Mario Six
08f5b0b23a powerpc: Add read*_*/write*_* macros
Define the read*_*/write*_* macros for the PowerPC platform to be able
to use the macros in wait_bit.h.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-09-18 00:01:18 -06:00
Mario Six
e40615565d ram: Add driver for MPC83xx
Add a RAM driver for the MPC83xx architecture.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-09-18 00:01:18 -06:00
Bin Meng
0f1caa9880 sandbox: Enable bitrev library build
Imply CONFIG_BITREVERSE for Sandbox.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-09-18 00:01:18 -06:00
Bin Meng
9c2cb97e22 lib: bitrev: Sync with Linux kernel v4.17
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-09-18 00:01:18 -06:00
Andy Shevchenko
e599c4e7d8 sandbox: Build with -fPIC
Sandbox is not a real bootloader and it does require
a position independent code to be supported.

Thus, build it with -fPIC explicitly.

Fixes: 16940f720f9b ("Makefile: Don't generate position independent code")
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reported-by: Simon Glass <sjg@chromium.org>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
2018-09-18 00:01:18 -06:00
Tom Rini
b57f1895b6 Merge git://git.denx.de/u-boot-x86 2018-09-17 08:04:25 -04:00
Georgii Staroselskii
6321da5263 x86: cpu: add docstring to scu_ipc_command()
These comments were copied from the Linux kernel driver in
drivers/platform/x86/intel_scu_ipc.c

Signed-off-by: Georgii Staroselskii <georgii.staroselskii@emlid.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2018-09-17 17:35:53 +08:00
Georgii Staroselskii
f7ce2d6e65 x86: tangier: acpi: add I2C6 node
Now that we have I2C#6 working, it's time to add a corresponsing
ACPI binding.

Signed-off-by: Georgii Staroselskii <georgii.staroselskii@emlid.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2018-09-17 17:35:53 +08:00
Georgii Staroselskii
f26b260c69 x86: dts: edison: configure I2C#6 pins
Now that we have the pinctrl driver for Merrifield in place we can make
use of it and set I2C#6 pins appropriately.

Initial configuration came from the firmware.  Which quite likely has
been used in the phones, where that is not part of Atom peripheral, is
in use. Thus we need to override the leftover.

Signed-off-by: Georgii Staroselskii <georgii.staroselskii@emlid.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2018-09-17 17:35:52 +08:00
Georgii Staroselskii
355c9b757e x86: tangier: pinmux: add API to configure protected pins
This API is going to be used to configure some pins that are protected
for simple modification.

It's not a comprehensive pinctrl driver but can be turned into one
when we need this in the future. Now it is planned to be used only
in one place. So that's why I decided not to pollute the codebase with a
full-blown pinctrl-merrifield nobody will use.

This driver reads corresponding fields in DT and configures pins
accordingly.

The "protected" flag is used to distinguish configuration of SCU-owned
pins from the ordinary ones.

The code has been adapted from Linux work done by Andy Shevchenko
in pinctrl-merrfifield.c

Signed-off-by: Georgii Staroselskii <georgii.staroselskii@emlid.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: fix build warning]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2018-09-17 17:35:52 +08:00
Georgii Staroselskii
224742a390 x86: cpu: introduce scu_ipc_raw_command()
This interface will be used to configure properly some pins on
Merrifield that are shared with SCU.

scu_ipc_raw_command() writes SPTR and DPTR registers before sending
a command to SCU.

This code has been ported from Linux work done by Andy Shevchenko.

Signed-off-by: Georgii Staroselskii <georgii.staroselskii@emlid.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2018-09-17 14:34:15 +08:00
Christian Gmeiner
41f4e4302f x86: drop custom CONFIG_SYS_BAUDRATE_TABLE define
This will add support for a baud rate of 57600.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2018-09-17 14:31:48 +08:00
Tom Rini
40e44c8bf5 Merge branch 'master' of git://git.denx.de/u-boot-coldfire 2018-09-16 10:32:33 -04:00
Tom Rini
9e45008b39 Merge branch 'master' of git://git.denx.de/u-boot-socfpga 2018-09-16 10:30:16 -04:00
Tom Rini
ad17b970f7 Merge branch 'master' of git://git.denx.de/u-boot-usb 2018-09-16 10:29:47 -04:00
Tom Rini
589cf349f0 Merge branch 'master' of git://git.denx.de/u-boot-sh 2018-09-16 10:29:39 -04:00
Angelo Dureghello
2c92e4fbc6 m68k: ColdFire mcf5441x, add eSDHC support
This patch adds mcf5441x eSDHC support for the mcf5441x family.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>
2018-09-16 00:01:13 +02:00
Angelo Dureghello
faae49543a m68k: fix multiple memory accesses on swap operations
On a
	u32 val = __sw32(*addr);

multiple memory accesses are not welcome, since "addr" may
be an IO peripheral register address.
This patch changes __sw16/32 to perform a single memory
access for the source value.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>
2018-09-16 00:01:13 +02:00
Angelo Dureghello
a1ed3a83be m68k: fix mcf5441x total interrupt number
Signed-off-by: Angelo Dureghello <angelo@sysam.it>
2018-09-16 00:01:13 +02:00
Marek Vasut
e83da8e880 ARM: rmobile: Repair TMU clock on Gen2
The Gen2 TMU is fed with fixed 32.5 MHz signal from CP .
This is then divided by 4 in TMU. Fix the timer clock
setting in Gen2.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2018-09-15 03:19:07 +02:00
Marek Vasut
0e286c529f sh: tmu: Zap get_tbclk and timer_read_counter
Replace those two functions with generic ones by defining the
timer macros in include/config/*.h .

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2018-09-15 03:19:07 +02:00
Marek Vasut
f02c1f695e sh: tmu: Clean up register usage
The code uses all in all three TMU registers, drop the massive
register layout structures and just define the required timer
registers and use them throughout the code.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2018-09-15 03:19:07 +02:00
Marek Vasut
8b39df9e78 sh: tmu: Inline sh_tmu.h
The header contains only the TMU register layout, just inline it
into the TMU timer implementation and drop the header completely.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2018-09-15 03:19:07 +02:00
Marek Vasut
ccce3acfe7 sh: tmu: Clean up CONFIG_SH_TMU_CLK_FREQ
The R-Car Gen2 feeds the TMU with CONFIG_SYS_CLK_FREQ / 2,
while the old SH parts use CONFIG_SYS_CLK_FREQ directly.
Just put this into the TMU implementation and drop the
CONFIG_SH_TMU_CLK_FREQ config option.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2018-09-15 03:19:07 +02:00
Marek Vasut
ae59a9f8f7 sh: tmu: Inline get_tmu0_clk_rate()
This function just returns CONFIG_SH_TMU_CLK_FREQ, use the constant
directly instead.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2018-09-15 03:19:07 +02:00
Marek Vasut
15f11fc6d7 sh: tmu: Inline tmu_timer_{start,stop}()
These functions are always called for timer = 0, so drop the
timer check. Since these functions are called from one place
only and they are reduced to one line of code, just inline
them.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2018-09-15 03:19:07 +02:00
Marek Vasut
eb05dcfea2 sh: tmu: Simplify the tmu_bit math
The tmu_bit value evaluates to (ffs(4) >> 1) - 1 = (3 >> 1) - 1 = 0.
Just drop the tmu_bit completely as well as CONFIG_SYS_TMU_CLK_DIV.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2018-09-15 03:19:07 +02:00
Marek Vasut
d1da5d6cd8 sh: tmu: Clean up CONFIG_SYS_TMU_CLK_DIV
This constant is always 4 , for all boards that exist. Define it
once in arch/sh/lib/time.c and remove it from the configs.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2018-09-15 03:19:07 +02:00
Marek Vasut
2606deb22b sh: sh7724: Drop EDMR macro
Drop the macro as it is never used and it collides with sh_eth.h macros.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-09-15 03:19:06 +02:00
Marek Vasut
c5fcd9e583 sh: sh7723: ap325rxa: Drop duplicate HIZCRB macro
Drop the macro as it is defined in sh7723.h already.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-09-15 03:19:06 +02:00
Patrice Chotard
5c349e179d usb: ehci-generic: Add vbus-supply regulator support
Add vbus-supply regulator support.
On some board vbus is not controlled by the phy but by
an external regulator.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-09-15 03:17:43 +02:00
Dalon Westergreen
f6d600b39b arm: socfpga: stratix10: Add CONFIG_OF_EMBED
The dtb should be embedded in the u-boot-spl image so that
the CONFIG_SPL_TARGET of spl/u-boot-spl.hex includes it.

This also affects the main u-boot image, so adjust
CONFIG_SPL_FS_LOAD_PAYLOAD_NAME to u-boot.img which now
also includes the dtb.

Signed-off-by: Dalon Westergreen <dwesterg@gmail.com>
2018-09-15 03:17:01 +02:00
Dalon Westergreen
02d8d32591 socfpga: stratix10: fix sdram_calculate_size
Incorrect type of size variable results in 0 being
returned for sdram sizes greater than or equal to
4GB.

Signed-off-by: Dalon Westergreen <dwesterg@gmail.com>
2018-09-15 03:17:01 +02:00
Dalon Westergreen
3570469742 arm: socfpga: stratix10: add CONFIG_SPL_TARGET
Stratix10 combines the u-boot-spl image into the fpga configuration
bitstream so that the SDM can load the processors memory.  This
process requires a hex format of the u-boot-spl image.
CONFIG_SPL_TARGET is set to "spl/u-boot-spl.hex"

Signed-off-by: Dalon Westergreen <dwesterg@gmail.com>
2018-09-15 03:17:01 +02:00
Dalon Westergreen
2ff60af605 common: add spl/u-boot-spl.hex target
Some devices, namely Intel's stratix10 SoC, require u-boot-spl in
a hex format.  This patch adds spl/u-boot-spl.hex as a possible
target.

Signed-off-by: Dalon Westergreen <dwesterg@gmail.com>
2018-09-15 03:17:01 +02:00
Ley Foon Tan
9ea354444d gpio: dwapb_gpio: Change to use dev_read_addr()
This changes the driver to use dev_read_addr() which is safe both for
flat trees and live trees.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2018-09-15 03:17:01 +02:00
Ley Foon Tan
db6a158bc3 gpio: dwapb_gpio: Add reset ctrl to driver
Add code to reset all reset signals as in gpio DT node. A reset property
is an optional feature, so only print out a warning and do not fail if a
reset property is not present.

If a reset property is discovered, then use it to deassert, thus
bringing the IP out of reset.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2018-09-15 03:17:01 +02:00
Ley Foon Tan
71f2700b92 gpio: dwapb_gpio: Enable get_function support
Enabled get_function support for dwapb where the function will
return the state of GPIO port.

Signed-off-by: Chin Liang See <chin.liang.see@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2018-09-15 03:17:01 +02:00
Tom Rini
2976d3c150 Merge branch 'master' of git://git.denx.de/u-boot-ubi 2018-09-14 13:54:37 -04:00
Tom Rini
ecb10a41c9 Revert "ARM: da850evm_direct_nor_defconfig: Enable DM_SERIAL"
This commit is breaking several variants of da850, so:

This reverts commit 5f389201de.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-09-14 13:52:15 -04:00
Tom Rini
3a8f677822 am3517_evm: Drop inadvertently added line
I added in the CONFIG_MISC_INIT_R line by mistake when applying the
previous patch, fix.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-09-14 13:41:31 -04:00
Tom Rini
45ec3228f2 Merge branch 'master' of git://git.denx.de/u-boot-i2c 2018-09-14 09:33:01 -04:00
Fabio Estevam
d27748b7cb pico-imx6ul: Add instructions for booting in Falcon mode
Falcon mode allows the SPL to load and jump directly to the kernel,
without loading U-Boot proper.

Add detailed step by step on how to use Falcon mode on pico-imx6ul.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2018-09-14 15:22:52 +02:00
Otavio Salvador
9ddd1cd596 pico-imx6ul: Add Falcon mode support
Falcon mode boots the kernel directly from SPL, without loading
the full U-Boot.

As pico-imx6ul does not have a GPIO for selecting Falcon versus normal
mode, enter in Falcon mode when the customer selects the
CONFIG_SPL_OS_BOOT option in menuconfig.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2018-09-14 15:22:52 +02:00
Fabio Estevam
1b5f4dc9e6 wandboard: README: Include the mx6qp variant in the list
The mx6qp Wandboard variant is also supported, so add it to the list.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-09-14 15:22:52 +02:00
Lukasz Majewski
97657a8cb4 ARM: bootscript: For nfsargs only use rootpath (and remove not needed serverip)
The serverip part is provided from DHCP server with
'option root-path "192.168.3.1:/srv/tftp/rootfs";' parameter in dhcpd.conf

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2018-09-14 15:22:52 +02:00
Lukasz Majewski
7e6bba20f5 ARM: bootscript: Fix the nfsargs and addip in K+P's tpcboot.cmd
The quotes around ${bootargs} were missing as we elaborate those variables
twice - once when we "setenv" the command and secondly when we "run" it.
Without quotes we have just empty string in the second call.

Moreover there is an issue with line breaks - as the original commands
got truncated.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2018-09-14 15:22:52 +02:00
Lukasz Majewski
2d558da0d7 ARM: bootscript: Replace tftpboot with dhcp when downloading kernel
The 'dhcp' command is more versatile as it allows working with the DHCP
server to obtain serverip, ipaddress and other network parameters.

The configuration necessary to obtain the serverip (dhcpd.conf):
option option-150 code 150 = ip-address;

and in the subnet definition:
option option-150                     192.168.X.Y;

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2018-09-14 15:22:52 +02:00
Lukasz Majewski
21c22db014 ARM: bootscript: Remove hard-coded rootpath from K+P's tpcboot.cmd
The 'rootpath' can be provided by DHCP server. Removing this line prevents
from overwriting it.

To do that on the DHCP server side (isc-dhcp-server) modify dhcpd.conf
and add 'option root-path "192.168.X.Y:/srv/tftp/rootfs";'

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2018-09-14 15:22:52 +02:00
Heiko Schocher
df158705a8 imx: imx6ull: fix pinmux input_val for uart5 rx pin
just try to bring up an imx6ull board with console
on uart5 and found, that input_val for pin
MX6UL_PAD_UART5_RX_DATA__UART5_DCE_RX is 7 and
not 5 on imx6ull.

With this patch rx works now.

Signed-off-by: Heiko Schocher <hs@denx.de>
2018-09-14 15:22:52 +02:00
Otavio Salvador
ba5fd0af0f pico-imx6ul: Remove CONFIG_FSL_USDHC from .h
The CONFIG_FSL_USDHC is defined inside "mx6_common.h", which is
already included in this file.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2018-09-14 15:21:52 +02:00
Otavio Salvador
6dcd8918bb pico-imx6ul: Add new pico-hobbit config
The new config skips the boot menu which asks which board is in
use. This is useful to allow direct booting of image without user
iteration.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2018-09-14 15:04:24 +02:00
Otavio Salvador
978138fab8 pico-imx6ul: Sync README with pico-imx7d
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2018-09-14 15:04:24 +02:00
Otavio Salvador
313d02b6b4 pico-imx6ul: Improve default DFU settings
This rework the DFU settings so it supports the SPL and U-Boot image,
as well as the single partition layout we are using by default.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2018-09-14 15:04:24 +02:00
Otavio Salvador
f6d805504b pico-imx6ul: Add bootmenu to choose the baseboard
Currently the baseboards do not offer a way to autodetect which one is
in use, so we ask the user if no value has been set.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2018-09-14 15:04:24 +02:00
Otavio Salvador
136f460565 pico-imx6ul: Sync defconfig with new changes
Due the changes in previous commits, we need to resync the defconfig
to reduce noise in next commits.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2018-09-14 15:04:24 +02:00
Fabio Estevam
c97c9e0804 pico-imx6ul: Update the README file
Update the README file to take into accound the switch to SPL.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Fabio Berton <fabio.berton@ossystems.com.br>
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2018-09-14 15:04:24 +02:00
Fabio Estevam
000829fdb8 pico-imx6ul: Add support for the 512MB module
Currently only the module with 256MB of RAM is supported.

Add support for the 512MB of RAM variant as well.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Fabio Berton <fabio.berton@ossystems.com.br>
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2018-09-14 15:04:24 +02:00
Fabio Estevam
558a37ce85 pico-imx6ul: Add bmode support
The 'bmode' command is helpful for switching the boot media.

In the case of pico-imx6ul there are two possible boot media:
eMMC or USB.

To boot from eMMC:

=> bmode emmc

To boot from USB (via Serial Download Protocol):

=> bmode usb

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Fabio Berton <fabio.berton@ossystems.com.br>
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2018-09-14 15:04:24 +02:00
Fabio Estevam
3e8cdb990c pico-imx6ul: Add fastboot support
fastboot tool is a convenient way to flash the eMMC, so
add support for it.

Examples of usages:

On the pico-imx6ul U-Boot prompt:

=> fastboot 0

On the Linux PC connected via USB:

1. Retrieving the U-Boot version

$ sudo fastboot getvar bootloader-version -i 0x0525
bootloader-version: U-Boot 2018.07-rc2-00130-g0881835-dirty
finished. total time: 0.000s

2. Resetting the board

$ sudo fastboot reboot -i 0x0525

(this causes the pico-imx6ul to reboot)

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Fabio Berton <fabio.berton@ossystems.com.br>
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2018-09-14 15:04:24 +02:00
Fabio Estevam
82a8a93327 pico-imx6ul: Convert to SPL
There are two versions of imx6ul pico SOMs: one with 256MB and another
one with 512MB of RAM.

Convert to SPL so that both versions can be supported. This patch
doesn't rework the clock initialization to avoid changing the behavior
in this same patch, so it will be cleaned up in future.

Currently only the 256MB is tested/supported.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Fabio Berton <fabio.berton@ossystems.com.br>
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2018-09-14 15:04:24 +02:00
Fabio Estevam
636941ff4d pico-imx6ul: Convert to distro config
Instead of keeping a custom environment, use a more generic approach
by switching to distro config.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2018-09-14 15:04:17 +02:00
Stefan Roese
7236e24bc4 fs: ubifs: Add missing newlines in super.c
I just stumbled over some cluttered UBIFS messages. It seems some
newline chars are missing in the current U-Boot UBI source.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Heiko Schocher <hs@denx.de>
2018-09-14 06:31:54 +02:00
Tuomas Tynkkynen
ca1d6ca365 i2c: Drop CONFIG_SYS_I2C_MXS
Last user of this driver went away in May 2017, in
commit eb5ba3aefd ("i2c: Drop use of CONFIG_I2C_HARD")

Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
2018-09-14 06:30:29 +02:00
Adam Ford
04355de71d MMC: davinici_mmc: Enable CD and WP with DM and OF_CONTROL
When used with a device tree, this will extract the card detect
and write protect pins from the device tree and configure them
accordingly.  This assumes the GPIO_ACTIVE_LOW/HIGH is supported
by da8xx_gpio.

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-09-11 21:49:02 -04:00
Adam Ford
819ad5f625 ARM: am3517_evm: Disable DM_I2C_COMPAT
DM_I2C_COMPAT is somehow being enabled outside of Kconfig, so
this explicitly undefines it in the header file, and brackets
the I2C initialization around an #ifdef to not manually
initialize the I2C controller when the DM_I2C is enabled.

Signed-off-by: Adam Ford <aford173@gmail.com>
Tested-by: Derald D. Woods <woods.technical@gmail.com>
2018-09-11 21:48:04 -04:00
Adam Ford
8cd21a6346 Configs: am3517_evm: Remove TWL4030 reference
This SOM and kit do not nor have they ever had a twl4030 PMIC.
This patch removes the references to it.

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-09-11 21:44:06 -04:00
Adam Ford
a40d3cc845 ARM: omap3_logic: Enable DM_PMIC and DM_REGULATOR
Enabling DM_PMIC, DM_REGULATOR_FIXED, and DM_REGULATOR_GPIO
gives us the ability to better monitor voltages and enable
hardware through the device tree. The TL4030 (TPS65950) is
not yet migrated to DM, so this patch only enables the fixed
and GPIO controlled regulators.

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-09-11 21:43:26 -04:00
Adam Ford
5f389201de ARM: da850evm_direct_nor_defconfig: Enable DM_SERIAL
With DM enabled, this patch enables DM_SERIAL and removes
the NS16550 initialization from da850_lowlevel since the driver
will take care of that itself.

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-09-11 21:42:41 -04:00
Adam Ford
21af33ed03 ARM: davinci: omapl138_lcdk: Enable DM_MMC
With DM_MMC now available, this patch enables DM_MMC for the
omapl138_lcdk in U-Boot and keeps the older style for SPL.

Signed-off-by: Peter Howard <phoward@gme.net.au>
Signed-off-by: Adam Ford <aford173@gmail.com>
2018-09-11 21:41:48 -04:00
Adam Ford
4aeb939e77 ARM: davinci: da850evm: Support DM_MMC
With the updated driver available to support DM_MMC, this patch
enables DM_MMC for da850evm.

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-09-11 21:41:15 -04:00
Adam Ford
df6565c36c MMC: Enable DM_MMC for Davinci
With CONFIG_BLK becoming a requirement, the Davinci MMC driver
needs to be updated with DM_MMC support.  Since SPL is tiny and
many boards do not support DM in SPL, this retains the backwards
compatibility for those boards who need to initialize MMC manually
in SPL.

Signed-off-by: Peter Howard <phoward@gme.net.au>
Signed-off-by: Adam Ford <aford173@gmail.com>
2018-09-11 21:40:17 -04:00
Adam Ford
5c4689e43e ARM: omap3_logic: Enable Pinctrl
The simple pinctrl driver currently available works with the omap3.
Enabling this will use the device tree to automatically set the
pin-muxing for various drivers.

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-09-11 21:39:30 -04:00
Adam Ford
4869fa3f46 ARM: omap3_logic_defconfig: Convert to DM_SPL
The OF_CONTROL and OF_PLATDATA are not really useful without DM.
This patch supports DM_SPL, but it requires manual references
both Serial and MMC.

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-09-11 21:39:16 -04:00
Adam Ford
307a214329 mmc: omap_hsmmc: Make DM_GPIO calls dependent on DM_GPIO
The getcd and getwp functions when DM_MMC is enabled are
assumming the DM_GPIO is enabled.  In cases (like SPL) where
DM_GPIO may not be enabled, wrap these calls in an #ifdef

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-09-11 21:39:11 -04:00
Adam Ford
750df1979d DM: serial: ti_omap3_common: Don't define serial unless !DM_SERIAL
The serial port was being manually configured during SPL build,
however in preparation to allow DM in SPL, this needs to change
to be based on whether or not DM_SERIAL is enabled because, soon
the assumption that SPL means no DM may not be accurate.

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-09-11 21:39:06 -04:00
Adam Ford
668146128a ARM: mach-omap2: Don't initialize I2C if DM_I2C is enabled
boot-common.c checks to see if I2C is enabled in SPL, but
it doens't check for DM_I2C before initializing it.  This
will now only initialize the I2C is the DM_I2C is not enabled
to avoid initializing it more than once.

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-09-11 21:39:02 -04:00
Adam Ford
99571b41c6 DM: omap_gpio: Reduce overhead when used with OF_PLATDATA
Platforms with limited resources in SPL may enable OF_PLATDATA,
this limits some of the library functions and cannot extract data
from the device tree.  This patch adds additional wrappers around
these functions to only allow them when OF_CONTROL is enabled and
OF_PLATDATA is not.

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-09-11 21:38:52 -04:00
Adam Ford
410c505cc1 DM: OMAP24XX_I2C: Reduce overhead when used with OF_PLATDATA
Platforms with limited resources in SPL may enably OF_PLATDATA,
this limits some of the library functions and cannot extract data
from the device tree.  This patch adds additional wrappers around
these functions to only allow them when OF_CONTROL is enabled and
OF_PLATDATA is not.

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-09-11 21:38:47 -04:00
Adam Ford
afa8cdd607 DM: I2C: Reduce overhead when used with OF_PLATDATA
Platforms with limited resources in SPL may enably OF_PLATDATA,
this limits some of the library functions and cannot extract data
from the device tree.  This patch adds additional wrappers around
these functions to only allow them when OF_CONTROL is enabled and
OF_PLATDATA is not.

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-09-11 21:38:42 -04:00
Adam Ford
e5f7a261db regulator: pbias: Add additional compatible flags
The driver was developed with references for more than just
dra7, but never included.  At least for omap3, this appears
to be functional.

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-09-11 21:38:37 -04:00
Adam Ford
535f46dad9 GPIO: omap_gpio: Fix gpio name names with device tree
The GPIO bank numbers do not appear in the device tree, so this
patch makes the gpio name based on the address
(ie gpio@49054000_31 vs gpio4_31)

adam

Signed-off-by: Adam Ford <aford173@gmail.com>
Tested-by: Derald D. Woods <woods.technical@gmail.com>
2018-09-11 21:38:15 -04:00
Adam Ford
abb205ded1 ARM: dts: da850-evm-u-boot: Remove redundant entries
With the re-sync from Linux 4.18, several entries in
da850-evm-u-boot.dtsi are no longer necessary, so this patch
removes them.

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-09-11 21:38:08 -04:00
Adam Ford
8e12559193 arm: dts: da850: Re-sync da850-evm.dts from Linux 4.18
Signed-off-by: Adam Ford <aford173@gmail.com>
2018-09-11 21:38:04 -04:00
Adam Ford
9440b3d3d0 dm: gpio: da8xx_gpio: Add support for GPIO_ACTIVE_LOW/HIGH
With DM and device tree support, let's use the GPIO_ACTIVE_HIGH
and GPIO_ACTIVE_LOW from the device tree as they are intended.

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-09-11 21:38:00 -04:00
Adam Ford
1eddf54931 DM: GPIO: Fix da8xx GPIO indexing over GPIO 32
The GPIO banks are broken up into two 16-bit registers for each
bank set.  Unfortunately, the math that determines how to shift
blindly shifted by the number of the gpio.  This worked for gpio
numbers under 32, but higher gpio's are broken.  This fixes the
gpio index, so the bank is passed and the shift amount within
the register is passed now instead of the gpio number.

Fixes: 8e51c0f25406("dm: gpio: Add DM compatibility to
GPIO driver for Davinci")

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-09-11 21:37:50 -04:00
Adam Ford
93f3362762 ARM: configs: Add da850evm_nand to boot from NAND
The DA850-EVM supports booting from NAND when used with the
UI expander board.  da850evm_nand will create an ais file
that can be burned to NAND and booted while storing the env in
NAND along with some partitions tables for storing kernel,
dtb and rootfs in NAND.

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-09-11 21:37:31 -04:00
Adam Ford
23446cc34b ARM: da850evm_direct_nor: Enable CONFIG_BLK
At least for now, CONFIG_BLK is working, but this variant of
the da850evm doesn't need/support SPL so it's OK to enable it
here.

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-09-11 21:37:04 -04:00
Tom Rini
d1e15041ab Merge branch 'master' of git://git.denx.de/u-boot-uniphier 2018-09-11 08:50:10 -04:00
Tom Rini
89aa19d092 Merge tag 'fpga-for-v2018.11' of git://git.denx.de/u-boot-microblaze
FPGA changes for v2018.11

- add fpga tests to cover fpga commands
- fpga Kconfig cleanup
- fix cmd/fpga.c
- add support for missing fpga loadmk commands
- add fpga fragment to MAINTAINERS
2018-09-11 08:49:21 -04:00
Lokesh Vutla
f3f094617a configs: am65x_evm_a53: Add initial support
Add initial defconfig support for AM65x that runs on A53.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-09-11 08:32:55 -04:00
Lokesh Vutla
853f7f5018 arm64: dts: k3: Add u-boot specific nodes
Add the minimum dt nodes required to boot. These nodes
will get deleted as kernel gets these nodes added in the
main dts files.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-09-11 08:32:55 -04:00
Lokesh Vutla
ea8ad1d9b6 arm64: dts: k3: Add Support for AM654 SoC
Add initial DT support for AM654 EVM that runs on A53.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-09-11 08:32:55 -04:00
Andreas Dannenberg
1e5b116ed2 include: am654_evm: Establish initial environment for SD card boot
Create a basic U-Boot environment that allows the automatic loading
of a Linux Kernel located at /boot/Image and an associated device tree
blob located at /boot/k3-am654-base-board.dtb from the secondary
partition of an ext4-formatted SD card on the AM654x EVM. Furthermore
the boot.scr and uEnv.txt detection and loading schemes are supported
in a manner already known from other TI platforms.

Note that this is intended to be a starting point to enable initial
board use and will most certainly get extended and refactored as
different boot media become available.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-09-11 08:32:55 -04:00
Lokesh Vutla
0911d95263 board: ti: am654: a53: Add initial support for am654
Add initial support for AM654 based EVM running on A53. Enable
4GB of DDR available on the EVM so that kernel DTB file
can be updated accordingly.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
[Andreas: Added 4GB ddr support]
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
2018-09-11 08:32:55 -04:00
Lokesh Vutla
3980b16137 gpio: do not include <asm/arch/gpio.h> for ARCH_K3
As no gpio.h is defined in arch/arm/mach-k3/include/,
to avoid compilation failure, do not include asm/arch/gpio.h.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-09-11 08:32:55 -04:00
Lokesh Vutla
aaa449fb27 mmc: k3_arasan: Add sdhci driver support for K3 family SoCs
AM654 has an arasan sdhci controller and a mmc phy attached to it.
Add basic support for K3 specific arasan sdhci controller.

Cc: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-09-11 08:32:55 -04:00
Lokesh Vutla
08c45314a8 spl: Allow remoteproc drivers to be used within SPL
Add an option for building remoteproc drivers within SPL.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-09-11 08:32:55 -04:00
Lokesh Vutla
c365ed7d4b remoteproc: Introduce K3 remoteproc driver
Add support for K3 based remoteproc driver that
communicates with TISCI to start start a remote processor.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-09-11 08:32:55 -04:00
Lokesh Vutla
1ad190bf59 remoteproc: Introduce K3 system controller
K3 specific SoCs have a dedicated microcontroller for doing
resource management. Any HLOS/firmware on compute clusters should
load a firmware to this microcontroller before accessing any resource.
Adding support for loading this firmware.

After the K3 system controller got loaded with firmware and started
up it sends out a boot notification message through the secure proxy
facility using the TI SCI protocol. Intercept and receive this message
through the rproc start operation which will need to get invoked
explicitly after the firmware got loaded.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-09-11 08:32:55 -04:00
Lokesh Vutla
81ae6e6d00 remoteproc: Allow for individual remoteproc initialization
Existing rproc_init() api tries to initialize all available
remoteproc devices. This will fail when there is dependency
among available remoteprocs. So introduce a separate api
that allows to initialize remoteprocs individually based
on id.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-09-11 08:32:55 -04:00
Lokesh Vutla
880274192c spl: Allow mailbox drivers to be used within SPL
Add an option for building mailbox drivers within SPL.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-09-11 08:32:55 -04:00
Lokesh Vutla
f9aa41023b mailbox: Introduce K3 Secure Proxy Driver
Secure Proxy module manages hardware threads that are meant
for communication between the processor entities. Adding
support for this driver.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
2018-09-11 08:32:55 -04:00
Lokesh Vutla
600e46b08c mailbox: Allow attaching private data for mbox_chan
Sometimes mbox controllers wants to store private data in
mbox_chan so that it can be used at a later point of time.
Adding support for hooking private data.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-09-11 08:32:55 -04:00
Andreas Dannenberg
694b052401 sysreset: Add TI System Control Interface (TI SCI) sysreset driver
Devices from the TI K3 family of SoCs like the AM654x contain a Device
Management and Security Controller (SYSFW) that manages the low-level
device control (like clocks, resets etc) for the various hardware
modules present on the SoC. These device control operations are provided
to the host processor OS through a communication protocol called the TI
System Control Interface (TI SCI) protocol.

This patch adds a system reset driver that communicates to the system
controller over the TI SCI protocol for allowing to perform a system-
wide SoC reset.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-09-11 08:32:55 -04:00
Andreas Dannenberg
1a88a04e9f power domain: Introduce TI System Control Interface (TI SCI) power domain driver
Some TI Keystone 2 and K3 family of SoCs contain a system controller
(like the Power Management Micro Controller (PMMC) on 66AK2G SoCs and
the Device Management and Security Controller on AM65x SoCs) that manage
the low-level device control (like clocks, resets etc) for the various
hardware modules present on the SoC. These device control operations are
provided to the host processor OS through a communication protocol
called the TI System Control Interface (TI SCI) protocol.

This patch adds a power domain driver that communicates to the system
controller over the TI SCI protocol for performing power management of
various devices present on the SoC. Various power domain functionalities
are achieved by the means of different TI SCI device operations provided
by the TI SCI framework.

This code is loosely based on the drivers/soc/ti/ti_sci_pm_domains.c
driver of the Linux kernel.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-09-11 08:32:55 -04:00
Lokesh Vutla
2618cf3657 power domain: Add support for multiple powerdomains per device
There are cases where there are more than one power domain
attached to the device inorder to get the device functional.
So add support for enabling power domain based on the index.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-09-11 08:32:55 -04:00
Andreas Dannenberg
e585bef17f clk: Introduce TI System Control Interface (TI SCI) clock driver
Some TI Keystone 2 and K3 family of SoCs contain a system controller
(like the Power Management Micro Controller (PMMC) on 66AK2G SoCs and
the Device Management and Security Controller on AM65x SoCs) that manage
the low-level device control (like clocks, resets etc) for the various
hardware modules present on the SoC. These device control operations are
provided to the host processor OS through a communication protocol
called the TI System Control Interface (TI SCI) protocol.

This patch adds a clock driver that communicates to the system
controller over the TI SCI protocol for performing clock management of
various devices present on the SoC. Various clock functionality is
achieved by the means of different TI SCI device operations provided by
the TI SCI framework.

This code is loosely based on the drivers/clk/keystone/sci-clk.c driver
of the Linux kernel.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Signed-off-by: Vignesh R <vigneshr@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-09-11 08:32:55 -04:00
Andreas Dannenberg
3b3969bd36 clk: Extend clock control with an optional data field
Some systems require more than a single ID to identify and configure any
clock provider. For those scenarios add an optional data field to the
clock control structure.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-09-11 08:32:55 -04:00
Andreas Dannenberg
65c8a79811 reset: Introduce TI System Control Interface (TI SCI) reset driver
Some TI Keystone 2 and K3 family of SoCs contain a system controller
(like the Power Management Micro Controller (PMMC) on 66AK2G SoCs and
the Device Management and Security Controller on AM65x SoCs) that manage
the low-level device control (like clocks, resets etc) for the various
hardware modules present on the SoC. These device control operations are
provided to the host processor OS through a communication protocol
called the TI System Control Interface (TI SCI) protocol.

This patch adds a reset driver that communicates to the system
controller over the TI SCI protocol for performing reset management of
various devices present on the SoC. Various reset functionalities are
achieved by the means of different TI SCI device operations provided by
the TI SCI framework.

This code is loosely based on the drivers/reset/reset-ti-sci.c driver of
the Linux kernel.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-09-11 08:32:55 -04:00
Andreas Dannenberg
c72f9b707a reset: Extend reset control with an optional data field
Some systems require more than a single ID to identify and configure any
reset provider. For those scenarios add an optional data field to the
reset control structure.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-09-11 08:32:55 -04:00
Andreas Dannenberg
e7012e6e1f dm: reset: Update uclass to allow querying reset status
Add a reset operations function pointer to support querying the current
status of a reset control.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-09-11 08:32:55 -04:00
Andreas Dannenberg
aec99c9776 dm: firmware: Automatically bind child devices
To support scenarios where a firmware device node has subnodes that
have their own drivers automatically scan the DT and bind those when
the firmware device gets bound.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-09-11 08:32:55 -04:00
Lokesh Vutla
ccbc8b2fdd firmware: ti_sci: Add support for processor control services
TI-SCI message protocol provides support for controlling of various
physical cores available in SoC. In order to control which host is
capable of controlling a physical processor core, there is a processor
access control list that needs to be populated as part of the board
configuration data.

Introduce support for the set of TI-SCI message protocol apis that
provide us with this capability of controlling physical cores.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-09-11 08:32:55 -04:00
Andreas Dannenberg
f369b0f26c firmware: ti_sci: Add support for reboot core service
Since system controller now has control over SoC power management, it
needs to be explicitly requested to reboot the SoC. Add support for
it.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
2018-09-11 08:32:55 -04:00
Lokesh Vutla
9b87181fd2 firmware: ti_sci: Add support for clock control
In general, we expect to function at a device level of abstraction,
however, for proper operation of hardware blocks, many clocks directly
supplying the hardware block needs to be queried or configured.

Introduce support for the set of SCI message protocol support that
provide us with this capability.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
2018-09-11 08:32:55 -04:00
Andreas Dannenberg
7bc330452c firmware: ti_sci: Add support for device control
TI-SCI message protocol provides support for management of various
hardware entitites within the SoC. Introduce the fundamental
device management capability support to the driver protocol
as part of this change.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
2018-09-11 08:32:55 -04:00
Andreas Dannenberg
dcfc52ad69 firmware: ti_sci: Add support for board configuration
TI-SCI message protocol provides support for board configuration
to assign resources and other board related operations.
Introduce the board configuration capability support to the driver protocol
as part of this change.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-09-11 08:32:55 -04:00
Lokesh Vutla
32cd25128b firmware: Add basic support for TI System Control Interface (TI SCI) protocol
Texas Instrument's System Control Interface (TI SCI) message protocol is
used in Texas Instrument's System on Chip (SoC) such as those in the K3
family AM654 SoC to communicate between various compute processors with
a central system controller entity.

The TI SCI message protocol provides support for management of various
hardware entities within the SoC. Add support driver to allow
communication with system controller entity within the SoC using the
mailbox client.

This is mostly derived from the TI SCI driver in Linux located at
drivers/firmware/ti_sci.c.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
2018-09-11 08:32:55 -04:00
Lokesh Vutla
82f29fd513 armv8: K3: am654: Add support for generating build targets
Update Makefile to generate
- tispl.bin: First stage bootloader on ARMv8 core
- u-boot.img: Second stage bootloader on ARMv8 core.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-09-11 08:32:55 -04:00
Lokesh Vutla
9d4f8c42cb armv8: K3: am654: Introduce FIT generator script
Add a script that is capable of generating a FIT image
source file that combines ATF, SPL(64 bit) and DT.
This combined image is used by R5 SPL and start ATF
on ARMv8 core.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-09-11 08:32:55 -04:00
Lokesh Vutla
e091832f25 armv8: K3: am654: Add custom MMU support
Add MMU mappings for AM654 SoC.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-09-11 08:32:55 -04:00
Andreas Dannenberg
c68721d93a arm: K3: am654: Unlock control module registers during init
By default the device control module registers are locked,
preventing any writes to its registers.
Unlock those registers as part of the init flow.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-09-11 08:32:55 -04:00
Lokesh Vutla
e00646099f arm: K3: am654: Add support for boot device detection
AM654 allows for booting from primary or backup boot media.
Both media can be chosen individually based on switch settings.
ROM looks for a valid image in primary boot media, if not found
then looks in backup boot media. In order to pass this boot media
information to boot loader, ROM stores a value at a particular
address. Add support for reading this information and determining
the boot media correctly.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-09-11 08:32:55 -04:00
Lokesh Vutla
f70b72e353 arm: K3: Update _start instruction
On K3 family SoCs, once the ROM loads image on R5, M3 resets R5 and
expects to start executing from 0x0. In order to handle this ROM
updates the boot vector of R5 such that first 64 bytes of image load
address are mapped to 0x0.

In this case, it is SPL's responsibility to jump to the proper image
location. So, update the PC with address of reset vector(like how
other exception vectors are handled), instead of branching to reset.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-09-11 08:32:55 -04:00
Lokesh Vutla
ed0e605124 arm: K3: Add support for AM654 SoC definition
The AM654 device is designed for industrial automation and PLC
controller class platforms among other applications. Introduce
base support for AM654 SoC.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-09-11 08:32:55 -04:00
Lokesh Vutla
586bde93eb arm: K3: Add initial support for TI's K3 generation of SoCs
Add support for Texas Instruments' K3 Generation Processor
families.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-09-11 08:32:55 -04:00
Masahiro Yamada
e39eed8f47 ARM: uniphier: remove ad-hoc clock enabling for EHCI
The MIO clock is enabled by default, and the STDMAC clock is
enabled by the clk driver.  The ad-hoc way to enable the clock
is no longer needed.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-09-11 20:37:19 +09:00
Masahiro Yamada
c3ab1e118f mmc: uniphier-sd: sync with Linux
Sync with the driver code and the binding recently merged in Linux.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-09-11 20:37:18 +09:00
Masahiro Yamada
b07f6e9faf ARM: uniphier: enable CONFIG_CMD_UBI
Now that CONFIG_SYS_MONITOR_LEN increased, we have room for enabling
more options again.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-09-11 20:37:17 +09:00
Masahiro Yamada
1a4bd3a095 ARM: uniphier: increase CONFIG_SYS_MONITOR_LEN again
With the migration to distro-boot, the size of the U-Boot proper
image for uniphier_v7_defconfig exceeded the current limit, 576KB.
Increase it to 832KB.

CONFIG_SYS_UBOOT_BASE must be moved as well to avoid the image
over-wrap because the boot ROM of Pro4, Pro5, PXs2/LD6b loads
the SPL to the physical address 0x100000.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-09-11 20:37:16 +09:00
Masahiro Yamada
33aae6b5ed ARM: dts: uniphier: sync DT with Linux 4.19-rc1
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-09-11 20:37:16 +09:00
Michal Simek
7e16342bde MAINTAINERS: Add myself as the FPGA maintainer
FPGA subsystem requires special care that's why it should be maintained
via one tree.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-09-11 11:00:54 +02:00
Michal Simek
b5d19a9340 cmd: fpga: Fix loads command
Convert last loads command to fpga subcommands.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-09-11 11:00:54 +02:00
Michal Simek
a2d1033b20 cmd: fpga: Use CMD_RET_FAILURE instead of simple 1
Use standard return command failure macro.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-09-11 11:00:54 +02:00
Michal Simek
8c75f7943d cmd: fpga: Add support for missing fpga loadmk commands
There are ways how to call fpga loadmk

1. Full command
fpga loadmk [dev] [address]

2. Dev setup via variable
set fpga [dev]
fpga loadmk [address]

3. Address setup via variable
set fpgadata [address]
fpga loadmk [dev]

4. Dev and address setup via variables
set fpga [dev]
set fpgadata [address]
fpga loadmk

Before this patch only cases 1 and 3 are working but the part of code
was trying to support also cases 2 and 4.
This patch is adding support for cases 2 and 4 to have all of
combinations supported.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-09-11 11:00:54 +02:00
Michal Simek
2892fe801d cmd: fpga: Fix loadmk command
Convert loadmk command to fpga subcommands. Not all combinations are
working but they have never worked properly. This will be fixed later.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-09-11 11:00:54 +02:00
Michal Simek
49503f9afa cmd: fpga: Fix loadfs command
Convert loadfs command to fpga subcommands.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-09-11 11:00:53 +02:00
Michal Simek
857547959b cmd: fpga: Fix dump and all direct fpga load commands
Separate dump, load, loadb, loadp and loadbp commands to separate
functions to make it clear how they are called and what parameters they
need.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-09-11 11:00:49 +02:00
Michal Simek
f4c7a4aea2 cmd: fpga: Extract fpga info command to separate function
Move fpga info to U_BOOT_CMD_MKENT subcommand.
Also use strtol instead of simple_strtoul. The reason is that if -1 is
passed (or fpga info without "fpga" variable) the list of all fpgas is
shown.
This functionality is in the fpga core but it couldn't be performed.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-09-11 10:58:42 +02:00
Michal Simek
9657d97cf5 cmd: fpga: Create new do_fpga_wrapper for using u-boot subcommands
Create command wrapper to clean fpga subcommands.
The function logic is taken from cmd_dm.c

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-09-11 10:58:42 +02:00
Michal Simek
5cadab60fb cmd: fpga: Clean wrong_parms handling
There is no reason to check parameters in separate switch. Check them
directly when they are read. Also there is no reason to check loadmk
case separately because fpga_data address must be non zero too.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-09-11 10:58:42 +02:00
Michal Simek
aa93ac59dc cmd: fpga: Remove parameter checking from fpga loadfs command
Parameter checking is dead code because all the time there must be all
params assigned. If they are not assigned there is no 9th parameters
passed and checking before return CMD_RET_USAGE.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-09-11 10:58:42 +02:00
Michal Simek
44d839bd5f cmd: fpga: Move parameter checking for loadfs/loads
There is no reason to check parameters in separate switch before main
one. This patch is simplifying error path and checking parameters right
after assignment.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-09-11 10:58:41 +02:00
Michal Simek
ccd6520327 cmd: fpga: Cleanup error handling in connection to FPGA_NONE
Incorrect command is already handled and FPGA_NONE should be used only
one. In case of error CMD_RET_USAGE can be returned directly without any
addition logic around.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-09-11 10:58:41 +02:00
Michal Simek
323fe38e74 cmd: fpga: Move fpga_get_op to avoid local function declaration
Move fpga_get_op() to top of file to remove local function declaration
and also remove useless retyping.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-09-11 10:58:41 +02:00
Michal Simek
550109691e cmd: fpga: Move error handling to do_fpga()
Clean fpga_get_op() error handling by moving checking/print to do_fpga.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-09-11 10:58:41 +02:00
Michal Simek
65a6b3c2af test/py: Extend fpga command to test all fpga load types
Add support for info, load, loadp, loadb, loadbp, loadmk_legacy,
loadmk_legacy_gz, loadmk_fit, loadfs also with variable support.

There are probably missing failed tests.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-09-11 10:58:41 +02:00
Michal Simek
3cc9716476 cmd: fpga: Remove fit image support passed without fpga device
The patch applied in 2010
"cmd_fpga: cleanup help and check parameters"
(sha1: a790b5b2326be9d7c9ad9e3d9b51a8bfabc62d07"
was adding this checking

+       if (dev == FPGA_INVALID_DEVICE) {
+               puts("FPGA device not specified\n");
+               op = FPGA_NONE;
+       }

which simply broke one command flow which was
setenv fpga <dev>
fpga loadmk <addr> // legacy image
fpga loadmk <addr>:<fit_image_name> //fit image

Also this sequence for FIT image is completely broken
setenv fpga <dev>
setenv fpgadata <addr>:<fit_image_name>
fpga loadmk
(Note: For legacy images this is working fine).

even from code I don't think this has ever worked properly
for fit image (dev = FPGA_INVALID_DEVICE should be rejected
by fpga core). Fit image support was in 2008 added by:
"[new uImage] Add new uImage fromat support to fpga command"
(sha1: c28c4d193d)

Just a summary of these facts that none found this for pretty long time
it shouldn't be a problem to remove this flow (without fpga dev)
completely to simplify the code.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-09-11 10:58:41 +02:00
Michal Simek
a225f8100c fpga: Kconfig: Replace spaces with tabs
Trivial Kconfig cleanup. Use tabs instead of spaces.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-09-11 10:58:41 +02:00
Kever Yang
7e2951160f cmd: part: use MAX_SEARCH_PARTITIONS for part search
Use Macro instead of hard code.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-09-10 21:19:33 -04:00
Vikas Manocha
d22336aad9 arm: armv7m: clean up armv7m unified code compilation
unified syntax should be selected by config ARM_ASM_UNIFIED

Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
2018-09-10 21:19:33 -04:00
Vikas Manocha
680223a2da arm: armv7m: remove un-necessary If then instruction
With gas option -mimplicit-it=always, IT block is inserted by the assembler
for thumb2.

Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
2018-09-10 21:19:33 -04:00
Vikas Manocha
17d2887a9e arm: stm32: Remove redundant thumb build selection
All armv7m arch builds are thumb & SYS_THUMB_BUILD is already selected by
CPU_ARMV7M.

Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
2018-09-10 21:19:33 -04:00
Quentin Schulz
d2d908d258 arm: spear: enable GPIO3 and 4 clocks when the GPIO controller driver is built
There are multiple GPIOs that can be used with the same driver depending
on the CONFIG_GPIO_BASE defined in the controller driver.

GPIO3 and 4 require a clock to be enabled so let's enable them when the
driver is built.

Signed-off-by: Quentin Schulz <quentin.schulz@bootlin.com>
2018-09-10 21:19:32 -04:00
Mark Tomlinson
8961c8ad25 tools: mkimage: Ensure munmap unmaps the same length that was mapped
The set_header call in kwbimage.c adds a checksum to the end of the
image in addition to setting up the header. It 'helpfully' updates the
st_size to match the fact that the file is now longer. However, mkimage
uses this length in the munmap call. This can lead to unmapping an extra
page, of perhaps required data. When this happens, a SEGV can occur.

To prevent this from happening, the munmap call now uses the same length
that was passed to mmap. This could also have been fixed by not changing
the length in kwbimage.c, however changing it in the main file means
that other plugins will also not fall for the same trap.

Signed-off-by: Mark Tomlinson <mark.tomlinson@alliedtelesis.co.nz>
Signed-off-by: Chris Packham <judge.packham@gmail.com>
[cp: resolve checkpatch complaints]
Tested-by: Chris Packham <judge.packham@gmail.com>
2018-09-10 21:19:32 -04:00
Lokesh Vutla
5d754197a7 serial: omap: Introduce DM specific omap serial
Add driver model support for OMAP_SERIAL while reusing
the functions in ns16550.c

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Tested-by: Derald D. Woods <woods.technical@gmail.com>
2018-09-10 21:19:32 -04:00
Grazvydas Ignotas
8a86152db0 omap3: pandora: Enable DM_SERIAL
This patch enables DM_SERIAL for the pandora board. Verified that
the default kernel can still be booted with this.

Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
2018-09-10 21:19:31 -04:00
Thomas Fitzsimmons
3f20321ad8 board: arm: Add support for Broadcom BCM7260
Add support for loading U-Boot on the Broadcom 7260 SoC.  This port
assumes Broadcom's BOLT bootloader is acting as the second stage
bootloader, and U-Boot is acting as the third stage bootloader, loaded
as an ELF program by BOLT.

Signed-off-by: Thomas Fitzsimmons <fitzsim@fitzsim.org>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Cc: Florian Fainelli <f.fainelli@gmail.com>
2018-09-10 21:19:31 -04:00
Thomas Fitzsimmons
1210957304 arm: bcm7445: Change serial console index
Change the configured serial console index to reflect that it is the
first physical UART, reorder some defconfig lines and move some
environment configuration from bcmstb.h to bcm7445.h.

Signed-off-by: Thomas Fitzsimmons <fitzsim@fitzsim.org>
Cc: Florian Fainelli <f.fainelli@gmail.com>
2018-09-10 21:19:31 -04:00
Adam Ford
93b283d49f ARM: CPU: arm926ejs: Consolidate cache routines to common file
Four different boards had different options for enabling cache
that were virtually all the same.  This consolidates these
common functions into arch/arm/cpu/arm926ejs/cache.c

This also has the positive side-effect of enabling cache on
the Davinci (da850) boards.

Signed-off-by: Adam Ford <aford173@gmail.com>
[trini: Add mach-at91 to the list of consolidations]
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-09-10 21:19:16 -04:00
Lokesh Vutla
5f133bb7c5 serial: arm_dcc: Add DCC support for V7R based cores
DCC is supported on Cortex R series as well. Enable DCC support
for V7R.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-09-10 20:48:20 -04:00
Lokesh Vutla
5a07cf5e7a pinctrl: Fix build warning with ARM64
Following build warning appears when pinctrl-single is built for ARM64:

In file included from drivers/pinctrl/pinctrl-single.c:10:0:
drivers/pinctrl/pinctrl-single.c: In function ‘single_configure_pins’:
./arch/arm/include/asm/io.h:43:28: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
 #define __arch_getw(a)   (*(volatile unsigned short *)(a))

Fix this by using phys_addr_t for variable reg instead of u32

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-09-10 20:48:20 -04:00
Lokesh Vutla
84b4221cff dm: omap-timer: Update clock rate only if not populated
timer_pre_probe() tries to populate the clock rate from DT. omap
timer driver tries to overwrite this value irrespective of the value
populated fro DT. So update this value only when DT doesn't populate
the clock rate.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-09-10 20:48:19 -04:00
Lokesh Vutla
3ee15a5180 dm: omap-timer: Use 64bit for counter values
In order to handle counter overflows use 64 bit values for counter.
Also load the initial value during probe.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-09-10 20:48:19 -04:00
Peng Fan
c76382ff7f mmc: fsl_esdhc: enable HS400 feature
The strobe dll code is ported from Linux Kernel:
drivers/mmc/host/sdhci-esdhc-imx.c
The comments are from the above file,
"For HS400 eMMC, there is a data_strobe line. This signal is generated
by the device and used for data output and CRC status response output
in HS400 mode. The frequency of this signal follows the frequency of
CLK generated by host. The host receives the data which is aligned to the
edge of data_strobe line. Due to the time delay between CLK line and
data_strobe line, if the delay time is larger than one clock cycle,
then CLK and data_strobe line will be misaligned, read error shows up.
So when the CLK is higher than 100MHz, each clock cycle is short enough,
host should configure the delay target. "

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Stefano Babic <sbabic@denx.de>
2018-09-10 20:48:19 -04:00
Peng Fan
3dd2626f48 mmc: add HS400 support
Add HS400 support.
Selecting HS400 needs first select HS200 according to spec, so use
a dedicated function for HS400.
Add HS400 related macros.
Remove the restriction of only using the low 6 bits of
EXT_CSD_CARD_TYPE, using all the 8 bits.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Jean-Jacques Hiblot <jjhiblot@ti.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Kishon Vijay Abraham I <kishon@ti.com>
Cc: Faiz Abbas <faiz_abbas@ti.com>
Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2018-09-10 20:48:19 -04:00
Eugen Hristev
51330c72f0 at91: fix devicetree warnings
This commit fixes various devicetree warnings in the at91 devicetrees
like:
arch/arm/dts/sama5d36ek_cmp.dtb: Warning (avoid_unnecessary_addr_size): /gpio_keys: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property

These warnings make buildman report failed builds for most of at91 boards.
Thus, fixing it.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2018-09-10 20:48:18 -04:00
Eugen Hristev
6e18adaf11 ARM: dts: Makefile: fix build for at91family
For at91family, makefile was building unwanted DTBs
Moved them under specific target configuration.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2018-09-10 20:48:18 -04:00
Patrice Chotard
798cd708d5 gpio: stm32f7: replace ODR update by BSRR write
Replace clrsetbits on ODR register (2 operations: one read + one write)
by writing on the correct bit (SET or RESET) of the BSRR register
(only 1 write operation).

Moreover this register if safe for simultaneous access by 2 master on
the bus.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-09-10 20:48:18 -04:00
Neil Armstrong
c8e570167f clk: clk_meson: Add mux and div support for reparent and rate setting
This patch adds support for :
- Rate calculation through muxes and generic dividers
- Basic gate setting propagation
- Reparenting for muxes
- Clock rate setting through generic dividers without reparenting

Support is only added to the Composite VPU and VAPB clocks in order
to support the Video Processing Unit Power Domain clock setup.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2018-09-10 20:48:17 -04:00
Neil Armstrong
8d5579ceff power: domain: Add the VPU Power Domain driver
The Amlogic Meson SoCs embeds a specific Power Domain dedicated to the
Video Processing Unit.
This patch implements support for this power domain in preparation of the
future support for the Video display support in U-Boot.

This driver will depend on changes in the clock driver to handle the setup
of the VPU and VAPB clocks configured from DT using assigned-clocks entries.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2018-09-10 20:48:17 -04:00
Masahiro Yamada
dee37fc99d Remove <inttypes.h> includes and PRI* usages in printf() entirely
In int-ll64.h, we always use the following typedefs:

  typedef unsigned int         u32;
  typedef unsigned long        uintptr_t;
  typedef unsigned long long   u64;

This does not need to match to the compiler's <inttypes.h>.
Do not include it.

The use of PRI* makes the code super-ugly.  You can simply use
"l" for printing uintptr_t, "ll" for u64, and no modifier for u32.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-09-10 20:48:17 -04:00
Masahiro Yamada
3747bdbb2b arch: types.h: factor out fixed width typedefs to int-ll64.h
All architectures have the same definition for s8/16/32/64
and u8/16/32/64.

Factor out the duplicated code into <asm-generic/int-ll64.h>.

BTW, Linux unified the kernel space definition into int-ll64.h
a few years ago as you see in Linux commit 0c79a8e29b5f
("asm/types.h: Remove include/asm-generic/int-l64.h").

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-09-10 20:48:16 -04:00
Masahiro Yamada
9865543ae6 Remove CONFIG_USE_STDINT
You do not need to use the typedefs provided by compiler.

Our compilers are either IPL32 or LP64.  Hence, U-Boot can/should
always use int-ll64.h typedefs like Linux kernel, whatever the
typedefs the compiler internally uses.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-09-10 20:48:16 -04:00
Adam Ford
de39dc7162 arm: armv7-a: Compile and tune for armv7-a instead of armv5
arch/arm/Makefile references armv5 for backwards compatibility with
older compilers.  This patch removes those references to armv5,
since by now newer compilers are required which should have armv7
support enabled.

The Makefile also also has a list of options for mtune, but the
entry for CONFIG_CPU_V7A is empty, so this patch tunes the
CPU_V7A architecture to generic-armv7-a.

The following size changed apply to omap3_logic using GCC.

Stock
text data bss dec hex filename
50910 429 67580 118919 1d087 spl/u-boot-spl
540713 22700 327072 890485   d9675 u-boot

Without Armv5
text data bss dec hex filename
50916 429 67580 118925   1d08d spl/u-boot-spl
540719 22700 327064 890483   d9673 u-boot

mtune=generic-armv7-a
text data bss dec hex filename
50932 429 67580 118941   1d09d spl/u-boot-spl
540519 22700 327080 890299   d95bb u-boot

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-09-10 20:48:16 -04:00
Patrice Chotard
d7c09684d7 sandbox: Add serial test
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-09-10 20:48:12 -04:00
Patrice Chotard
ad060c052b dm: serial: Remove setparity ops
setparity users has been updated to use new setconfig ops,
so we can safely remove setparity ops

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-09-10 20:20:38 -04:00
Patrice Chotard
fbd5c72d76 serial: stm32: Replace setparity by setconfig
Replace stm32_serial_setparity by stm32_serial_setconfig
which allows to set serial bits number, parity and stop
bits number.
Only parity setting is implemented.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-09-10 20:20:38 -04:00
Patrice Chotard
cbf538831d dm: serial: Replace setparity by setconfig
Replace setparity by more generic setconfig ops
to allow uart parity, bits word length and stop bits
number change.

Adds SERIAL_GET_PARITY/BITS/STOP macros.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-09-10 20:20:38 -04:00
Patrick Delaunay
555e378ca7 cli: handle getch error
Handle getch error (when getch return 0x0) to avoid display issue
in the console.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-09-10 20:20:34 -04:00
Patrick Delaunay
273a12526c console: unify fgetc function when console MUX is deactivated
Unify the fgetc function when MUX is activated or not:
- always call tstc() : it is the normal behavior expected
  by serial uclass (call tstc then getc) and that avoids
  issue when SERIAL_RX_BUFFER is activated
- reload WATCHDOG in the char waiting loop

This patch allow to have the same behavior when CONSOLE_MUX is activated
or not and avoid regression when this feature is deactivated.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-09-10 20:20:34 -04:00
Patrick Delaunay
d3bb785854 serial: protect access to serial rx buffer
Add test to avoid access to rx buffer when this buffer is empty.
In this case directly call getc() function to avoid issue when tstc()
is not called.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-09-10 20:20:34 -04:00
Patrick Delaunay
fe852bc109 stm32mp1: activate serial rx buffer
Activate the serial rx buffer.
Prepare console MUX activation with vidconsole, and avoid console
performance issue (missing character for copy-paste).

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-09-10 20:20:34 -04:00
Matt Weber
e1df3fa364 include/version.h: workaround sysroot inc order
On some systems the host system or even the cross sysroot can
contain a version.h.  This leads to the wrong file being picked
up and a PLAIN_VERSION undefined error.

This workaround symlinks the version.h into the tool folder to
allow reordering of search folders.

Fixes
http://autobuild.buildroot.net/results/770/7702d5df36a6532aafdbe6e9e62709bbfa058b54/build-end.log
http://autobuild.buildroot.net/results/e34/e3401027d2fb3ce565ca9e2456a427afd3610a87/build-end.log
... additional can be found with these queries ...
http://autobuild.buildroot.net/?reason=uboot-tools-2018.03
http://autobuild.buildroot.net/?reason=uboot-tools-2018.05

Upstream: pending

Signed-off-by: Matthew Weber <matthew.weber@rockwellcollins.com>
2018-09-10 20:20:34 -04:00
Tom Rini
f88b6facb8 Prepare v2018.09
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-09-10 17:46:42 -04:00
Tuomas Tynkkynen
b5ddd0701f .travis.yml: Fix typo in sun7i job description
'builman' -> 'buildman'

Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
2018-09-10 17:08:08 -04:00
Masahiro Yamada
e8f65763ef mtd: nand: denali: fix unaligned cache operations on ARMv7 SoCs
If the OOB size is not multiple of the cache line size, the ARMv7
cache operation still prints "Misaligned operation at range".

=> nand info

Device 0: nand0, sector size 256 KiB
  Page size       4096 b
  OOB size         224 b
  Erase size    262144 b
  subpagesize     4096 b
  options     0x00104200
  bbt options 0x00060000
=> nand dump 0
CACHE: Misaligned operation at range [9fb15280, 9fb16360]
CACHE: Misaligned operation at range [9fb15280, 9fb16360]
CACHE: Misaligned operation at range [9fb15280, 9fb16360]
CACHE: Misaligned operation at range [9fb15280, 9fb16360]
  ...

The cache flushing operations won't happen in this case to cover all of
the range to fix this by making sure we have things aligned.

Reported-by: Marek Vasut <marex@denx.de>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
[trini: Reword the commit message to be clear this is a direct problem
rather than just a warning]
2018-09-10 14:08:22 -04:00
Marek Vasut
f850371997 fdt: fix get_next_memory_node()
The get_next_memory_node() always sets mem to -1 , which is incorrect,
because then every iteration of memory bank parsing will start from the
first memory bank instead of the previous one.

On systems with 1 memory bank defined in DT and CONFIG_NR_DRAM_BANKS=4 ,
like ie. r8a77965-salvator-x , this will result in U-Boot incorrectly
reporting four identical memory banks with the same memory configuration.

Fix this by setting mem to startoffset value, which restores the behavior
before the fixed patch was applied.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jens Wiklander <jens.wiklander@linaro.org>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Fixes: 452bc12102 ("fdt: fix fdtdec_setup_memory_banksize()")
Tested-by: Michal Simek <michal.simek@xilinx.com> [on ZynqMP}
2018-09-10 09:05:41 -04:00
Chen-Yu Tsai
792b204798 ARM: Specify aligned address for secure section instead of using attributes
In commit a1274cc94a ("ARM: Page align secure section only when it is
executed in situ"), we used output section attributes (the "ALIGN"
keyword after the colon) to specify the alignment requirements. Using
the constant "COMMONPAGE" there was recently broken in binutils 2.31 [1].

Binutils maintainer Alan Modra suggested the former method would still
work. Since both methods achieve the same result, this patch does just
that. This fixes the "reboot after bootm" issue we've been seeing on
sunxi when booting non-secure.

  [1] https://sourceware.org/bugzilla/show_bug.cgi?id=23571

Suggested-by: Alan Modra <amodra@gmail.com>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Jagan Teki <jagan@openedev.com>
2018-09-07 09:11:42 -04:00
Fabio Estevam
4cdeda511f pico-imx7d: Update the README file
Update the README file to take into accound the switch to SPL.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Fabio Berton <fabio.berton@ossystems.com.br>
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2018-09-06 09:19:13 -04:00
Bin Meng
b5135e4538 travis: Use kernel.org pre-built toolchain for riscv
This updates travis configuration to use kernel.org pre-built
toolchain for riscv.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2018-09-05 22:14:37 -04:00
Tuomas Tynkkynen
861b85c482 ARM: qemu-arm: Fix qemu_arm64_defconfig for QEMU 3.0
QEMU 3.0 introduced additional memory-mapped regions for PCI-E ECAM and
MMIO. Thus we need to add them to our MMU map or U-Boot will crash with
a Synchronous Abort during PCI-E probing when it tries to access the
unmapped ECAM memory area.

Reported-by: Jonathan Gray <jsg@jsg.id.au>
Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Tested-by: Jonathan Gray <jsg@jsg.id.au>
2018-09-05 22:14:37 -04:00
Heinrich Schuchardt
f2906e5f58 lib/slre: remove superfluous assignment
It makes no sense to assign a value to 'res' if the next use of the
variable is an assignment.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-09-05 16:02:34 -04:00
Jasper kcoding
a92e52137d amlogic: board p212: Fix Ethernet PHY init
Without this patch the Ethernet PHY on the p212 board does not get
fully configured.
When this happens Ethernet does not function.

The similar libretech-cc and khadas-vim boards have this code already.
That's why the Ethernet on these boards do work.

Signed-off-by: Jasper Kcoding <jasperkcoding@gmail.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
2018-09-05 16:02:34 -04:00
Alexander Graf
c330235597 qemu-arm: Enable DHCP distro target
When booting the QEMU virt machine with -net nic,model=e1000 we can already
support network boot just fine today.

So let's enable the default bootcmd to also evaluate DHCP responses properly.
That way we can enable network boot seamlessly with the virt target.

Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-05 16:01:22 -04:00
Adam Ford
548c35ff6e ARM: dts: logicpd-torpedo-37xx-devkit-u-boot: Fix MMC Card Detect
When re-syncing the DTS files from the kernel, something caused
the MMC driver to no longer detect the MMC card. Undoing the
CD-invert appears to fix the issue.

Fixes: e6ea2390cd ("ARM: DTS: Resync LogicPD-Torpedo-37xx-devkit
with Linux 4.18-RC4")

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-09-05 16:01:22 -04:00
Tom Rini
8a51db1d54 Merge tag 'arc-updates-for-2018.09' of git://git.denx.de/u-boot-arc
Minor changes for ARC

1. Fix CPU clock value in HSDK's .dts so time is counted properly.
2. Enable bootelf command on EMDK
2018-09-05 11:39:03 -04:00
Eugeniy Paltsev
13e57722fe ARC: HSDK: Fix timer frequency value
CPU (and hence cpu timers) on HSDK board runs at 500MHz after
preloader so fix wrong CPU frequency value in hsdk.dts

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
2018-09-05 18:11:45 +03:00
Alexey Brodkin
1a5da02c15 EMDK: Enable bootelf
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-09-05 18:10:59 +03:00
Tom Rini
b2f90c461e Merge branch 'master' of git://git.denx.de/u-boot-imx 2018-09-04 17:45:53 -04:00
Fabio Estevam
c1d1543ebc mx7dsabresd: Add the qspi target to the list of supported defconfigs
Add an entry for mx7dsabresd_qspi_defconfig to avoid the following
warnings:

WARNING: no status info for 'mx7dsabresd_qspi'
WARNING: no maintainers for 'mx7dsabresd_qspi'

Reported-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-09-04 08:47:23 +02:00
Stefano Babic
b8babd8050 imx: missing CONFIG_MII in mx7dsabresd_qspi_defconfig
CONFIG_CMD_MII is set without CONFIG_MII, build is broken.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2018-09-04 08:47:23 +02:00
Stefan Agner
a62c60610f colibri_imx7_emmc: add Colibri iMX7D 1GB (eMMC) module support
This commit adds support for the Toradex Colibri iMX7D 1GB Computer
on Module. The module is very similar to the Colibri iMX7D 512MB
but uses eMMC instead of raw NAND. This patch introduces a new
board specific Kconfig symbol to select between the two flash
options.

Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
2018-09-04 08:47:23 +02:00
Stefan Agner
bc53fb19fe board: toradex: common: fail gracefully on missing NAND chip
If the NAND chip is missing get_nand_dev_by_index() returns NULL. Fail
gracefully in this case.

Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
2018-09-04 08:47:23 +02:00
Anson Huang
57b620255e imx: mx7: add system suspend/resume support
This patch adds system suspend/resume support,
when linux kernel enters deep sleep mode, SoC will go
into below mode:

 - CA7 platform goes into STOP mode;
 - SoC goes into DSM mode;
 - DDR goes into self-refresh mode;
 - CPU0/SCU will be powered down.

When wake up event arrives:

 - SoC DSM mdoe exits;
 - CA7 platform exit STOP mode, SCU/CPU0 power up;
 - Invalidate L1 cache;
 - DDR exit self-refresh mode;
 - Do secure monitor mode related initialization;
 - Jump to linux kernel resume entry.

Belwo is the log of 1 iteration of system suspend/resume:

[  338.824862] PM: suspend entry (deep)
[  338.828853] PM: Syncing filesystems ... done.
[  338.834433] Freezing user space processes ... (elapsed 0.001 seconds) done.
[  338.842939] OOM killer disabled.
[  338.846182] Freezing remaining freezable tasks ... (elapsed 0.001 seconds) done.
[  338.869717] PM: suspend devices took 0.010 seconds
[  338.877846] Disabling non-boot CPUs ...
[  338.960301] Retrying again to check for CPU kill
[  338.964953] CPU1 killed.
[  338.968104] Enabling non-boot CPUs ...
[  338.973598] CPU1 is up
[  339.267155] mmc1: queuing unknown CIS tuple 0x80 (2 bytes)
[  339.275833] mmc1: queuing unknown CIS tuple 0x80 (7 bytes)
[  339.284158] mmc1: queuing unknown CIS tuple 0x80 (6 bytes)
[  339.385065] PM: resume devices took 0.400 seconds
[  339.389836] OOM killer enabled.
[  339.392986] Restarting tasks ... done.
[  339.398990] PM: suspend exit

The resume entry function has to initialize stack pointer before calling
C code, otherwise there will be an external abort occur, in additional,
invalidate L1 cache must be done in secure section as well, so this
patch also adds assembly code back and keep it as simple as possible.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Acked-by: Stefan Agner <stefan@agner.ch>
Tested-by: Stefan Agner <stefan@agner.ch>
2018-09-04 08:47:23 +02:00
Anson Huang
b059837850 imx: mx7: add gpc initialization for low power mode
Add i.MX7D GPC initialization for low power mode
support like system suspend/resume from linux kernel:

 - Pending IOMUXC IRQ to workaround GPC state machine issue;
 - Mask all GPC interrupts for M4/C0/C1;
 - Configure SCU timing;
 - Configure time slot ack;
 - Configure C0/C1 power up/down timing;
 - Configure wakeup source mechanism;
 - Disable DSM/RBC related settings.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
2018-09-04 08:47:23 +02:00
Anson Huang
11e52bca84 imx: mx7: psci: improve cpu hotplug flow
This patch improves cpu hotplug, previous cpu_off
implementation is NOT safe, a CPU can NOT power down
itself in runtime, it will cause system bus hang due
to pending transaction. So need to use other online
CPU to kill it when it is ready for killed.

Here use SRC parameter register and a magic number
of ~0 as handshake for killing a offline CPU,
when the online CPU checks the psci_affinity_info,
it will help kill the offline CPU according to
the magic number stored in SRC parameter register.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
2018-09-04 08:47:23 +02:00
Alex Kiernan
41b7b4b936 Cleanup CONFIG_BOOTDELAY on cl-som-imx7
CONFIG_BOOTDELAY has been migrated to Kconfig, but cl-som-imx7 was
missed. We can just delete the assignments as the config already has
the correct value.

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
2018-09-04 08:47:23 +02:00
Martin Kaiser
69f78cf840 watchdog: mx25: use the imx_watchdog driver for mx25
The existing imx_watchdog driver is compatible with mx25 chipsets.
Add a WDOG1_BASE_ADDR define for the base address and enable the driver
in watchdog's Makefile.

To use the driver, a board must define CONFIG_IMX_WATCHDOG and
CONFIG_HW_WATCHDOG.

This fixes an issue when booting an mx25 chip via usb/serial. In this
case, the boot rom will always enable the watchdog. If u-boot is running
in interactive mode and the watchdog is not serviced, the system is
rebooted when the watchdog expires.

Signed-off-by: Martin Kaiser <martin@kaiser.cx>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-09-04 08:47:23 +02:00
Ye Li
1a8c01995f imx: imx6ul_evk: Enable DM driver for iMX6UL EVK u-boot
Convert the codes and configurations to enable DM drivers in u-boot for
modules: i2c, PMIC, regulator, USB, Ethernet, SD/MMC, GPIO and QSPI

This patch does not change SPL, so it still uses non-DM driver for
UART, GPIO and SD/MMC.

Signed-off-by: Ye Li <ye.li@nxp.com>
2018-09-04 08:47:23 +02:00
Ye Li
25baafc44c dts: imx6ul_evk: Add DTS files for 14x14 EVK and 9x9 EVK boards
Add the board DTS files for 14x14 EVK and 9x9 EVK. They are necessary
for converting to use u-boot DM driver.

Two -u-boot.dtsi are added to modify compatible string of SPI flash
device to "spi-flash".

Signed-off-by: Ye Li <ye.li@nxp.com>
2018-09-04 08:47:23 +02:00
Ye Li
9e1e6f6fe8 dts: imx6ul: Update alias to support DM
Add spi0 alias for qspi for enabling DM SPI.
Change usb alias for usbotg1 and usbotg2 for enabling DM USB

Signed-off-by: Ye Li <ye.li@nxp.com>
2018-09-04 08:47:23 +02:00
Ye Li
3b82335015 imx: imx7d-sdb: Add DM QSPI support
On iMX7D SabreSD board, the QSPI has pins conflict with EPDC (default).
To use QSPI, users have to rework the board (de-populate R388-R391, R396-R399
populate R392-R395, R299, R300). So we add new DTS file and new defconfig
dedicated for QSPI.

Other changes to support the DM QSPI:
 - Add QSPI node and alias spi0.
 - Modify spi4 (spi-gpio) node and add alias spi5 for it to avoid req
   conflict
 - Add EPDC node in imx7d.dtsi and disable it in imx7d-sdb-qspi.dts to
   align with kernel and also present the conflict.
 - Add -u-boot.dtsi to modify compatible string of mx25l51245g@0 to
   "spi-flash"
 - Remove iomux settings of qspi in board codes which is not needed
   for DM driver.

Signed-off-by: Ye Li <ye.li@nxp.com>
2018-09-04 08:47:23 +02:00
Ye Li
0925ee2185 imx: imx6sx-sabreauto: convert to use DM QSPI driver
To support DM QSPI driver:
 - Add -u-boot.dtsi to modify n25q256a@0 and n25q256a@1 compatible string
   to "spi-flash" and add "num-cs" property.
 - Enable DM SPI and DM SPI FLASH configurations
 - Remove iomux settings of qspi1 in board codes which is not needed
   for DM driver.

Signed-off-by: Ye Li <ye.li@nxp.com>
2018-09-04 08:47:23 +02:00
Ye Li
536c5c7a33 imx: imx6sx-sdb: Enable DM QSPI driver
To support DM QSPI driver
 - Add spi0 and spi1 alias for qspi1 and qspi2.
 - Add -u-boot.dtsi to modify n25q256a@0 and n25q256a@1 compatible string
   to "spi-flash" and add "num-cs" property.
 - Enable DM SPI/QSPI relavent configurations
 - Remove iomux settings of qspi2 in board codes which is not needed
   for DM driver.
 - Add sf default settings. So running "sf probe" can detect the flash

Signed-off-by: Ye Li <ye.li@nxp.com>
2018-09-04 08:47:23 +02:00
Tom Rini
3005162a43 Prepare v2018.09-rc3
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-09-03 15:36:33 -04:00
Tom Rini
8c5cad05c9 configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-09-03 15:26:12 -04:00
Fabio Estevam
c3c19c2743 spl: Kconfig: Fix typo in 'Upgrade'
Correct the spelling of 'Upgrade'.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-08-31 11:59:44 -04:00
Masahiro Yamada
e3332e1a1a Make kmalloc'ed memory really DMA-safe
In Linux, the memory returned by kmalloc() is DMA-capable.
However, it is not true in U-Boot.

At a glance, kmalloc() in U-Boot returns address aligned with
ARCH_DMA_MINALIGN.  However, it never pads the allocated memory.
This half-way house is completely useless because calling kmalloc()
and malloc() in this order causes a cache sharing problem.

Change the implementation to call malloc_cache_aligned(), which
allocates really DMA-capable memory.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-08-31 11:59:44 -04:00
Heinrich Schuchardt
4b0a2d3aab test: fix typo in cmd_ut_category() description
argc = 1: all tests are run
argc > 1: only argv[1] is run

So we need argc >= 1.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-08-31 11:59:44 -04:00
Manivannan Sadhasivam
a81f663ff7 hisilicon: hikey: Update instructions based on latest source
Update the HiKey board instructions based on the latest source
available. These instructions are derived from the ATF platform doc.
While updating the instructions, some comments on ATF issue has been
removed since it is fixed in latest ATF source.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2018-08-31 11:59:44 -04:00
Tom Rini
26b068280f Merge branch 'master' of git://git.denx.de/u-boot-sh 2018-08-30 10:15:03 -04:00
Tom Rini
1b74e9ce50 Merge branch 'master' of git://git.denx.de/u-boot-usb 2018-08-30 10:06:29 -04:00
Tom Rini
4b69e870e9 Merge branch 'master' of git://git.denx.de/u-boot-rockchip 2018-08-30 10:06:19 -04:00
Tom Rini
284d201b4d Merge git://git.denx.de/u-boot-x86 2018-08-30 10:06:11 -04:00
Marek Vasut
65186977ee mmc: renesas-sdhi: Use priv directly
The dev_get_priv(dev) is used twice in the probe function.
Replace the second invocation with priv variable.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-08-30 15:32:59 +02:00
Bin Meng
e69cc6bc42 x86: zimage: Remove acpi_rsdp_addr propagation to kernel boot parameters
As of today, the proposal of adding "acpi_rsdp_addr" to the kernel
boot protocol does not make its way to the kernel mainline. This
creates some confusion if we leave it in the U-Boot code base.
Remove it for now until we have a clear picture with kernel upstream.

Note this eventually does a partial revert to commit 3469bf4274
("x86: zImage: Propagate acpi_rsdp_addr to kernel via boot parameters")

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-08-30 11:23:15 +08:00
Bin Meng
a0913cdf7b x86: efi: payload: Turn on acpi in the kernel command line
Now that we have full Linux kernel boot support on EFI payload,
avoid pass "acpi=off" to the kernel command line.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-08-30 11:23:14 +08:00
Bin Meng
1fdeacd32c x86: zimage: Support booting Linux kernel from an EFI payload
At present Linux kernel loaded from U-Boot as an EFI payload does
not boot. This fills in kernel's boot params structure with the
required critical EFI information like system table address and
memory map stuff so that kernel can obtain essential data like
runtime services and ACPI table to boot.

With this patch, now U-Boot as an EFI payload becomes much more
practical: it is another option of kernel bootloader, ie, can be
a replacement for grub.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-08-30 11:23:14 +08:00
Bin Meng
cbe503fbc1 efi: stub: Pass EFI system table address to U-Boot payload
This updates the EFI stub codes to pass UEFI BIOS's system table
address to U-Boot payload so that U-Boot can utilize it.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-08-30 11:23:07 +08:00
Bin Meng
aac79251c7 x86: efi: payload: Install E820 map from EFI memory map
This implements payload-specific install_e820_map() to get E820 map
from the EFI memory map descriptors.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-08-30 09:56:58 +08:00
Kever Yang
feb64f9d51 rockchip: dts: fix unnecessary '-cells' warning
Fix warning below:
unnecessary #address-cells/#size-cells without "ranges" or child "reg"
property

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-08-29 20:44:50 +02:00
Ley Foon Tan
88c34b8da6 usb: dwc2: Add reset ctrl to driver
Add code to reset all reset signals as in usb DT node. A reset property
is an optional feature, so only print out a warning and do not fail if a
reset property is not present.

If a reset property is discovered, then use it to deassert, thus
bringing the IP out of reset.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2018-08-29 03:10:30 +02:00
Marek Vasut
313360b13f pci: rmobile: Filter out device 1 and 2
Only PCI device 1 and 2 is populated on the R-Car Gen2 internal
PCIe controller. Ignore all other devices. This fix prevents a
duplication of OHCI controller response on slot 0 and 1.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2018-08-28 11:01:52 +02:00
Marek Vasut
1335e7745f usb: ehci: Add PHY support to ehci-pci
Add support for operating a PHY attached to ehci-pci. There are
systems where the EHCI controller is internally wired to a PCI
bus and has a PHY connected to it as well, ie. the R-Car Gen2.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2018-08-28 11:00:19 +02:00
Marek Vasut
b43cdf9b3f usb: ehci: Make the PHY handling generic
Pull out the EHCI PHY functions into the ehci-hcd.c to let other
EHCI drivers use them.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2018-08-28 11:00:18 +02:00
Marek Vasut
a265e5ef42 phy: Fix warning due to missing definition of structure
Fix this sort of warning if generic-phy.h is included:

include/generic-phy.h:52:42: warning: ‘struct ofnode_phandle_args’ declared inside parameter list will not be visible outside of this definition or declaration
  int (*of_xlate)(struct phy *phy, struct ofnode_phandle_args *args);

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2018-08-28 11:00:18 +02:00
Praneeth Bajjuri
11ed312896 configs: am57xx: change default board name to beagle_x15
beagleboard x15 is the first supported platform variant of am57xx
in AOSP (android open source project) now.

changing board name to stay in consistent with aosp target name.

Signed-off-by: Praneeth Bajjuri <praneeth@ti.com>
2018-08-26 12:26:16 -04:00
Masahiro Yamada
c6cca10b9c cmd: ubi: change 'default y' for SUNXI to 'imply' in Kconfig
It is not preferred to put SUNXI-specific code in the common place.

Change it to 'imply' property of ARCH_SUNXI.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-08-26 12:24:03 -04:00
Tom Rini
a376702f76 Merge branch 'master' of git://git.denx.de/u-boot-socfpga 2018-08-24 16:11:12 -04:00
Tom Rini
15fd1b7903 Merge branch 'master' of git://git.denx.de/u-boot-usb 2018-08-24 16:11:01 -04:00
Tom Rini
8b7f04f14a Merge branch 'master' of git://git.denx.de/u-boot-sunxi 2018-08-24 16:10:54 -04:00
Christian Amann
73e4ba9868 ARM: dts: am33xx: fix SLEWCTRL_FAST pinctrl binding
Copy missing Kernel patch to make SLEWCTRL_SLOW available in device tree
and to correct the value of SLEWCTRL_FAST.
After this patch, the Kernel and U-boot device tree settings for
SLEWCTRL have the same effect.

Original Kernel patch message:
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=424e0f039bfa8a51fb5c5178b6ece8baa4996469

"
According to AM335x TRM, Document spruh73l, Revised February 2015,
Section 9.2.2 Pad Control Registers, setting bit 6 of the pad control
registers actually sets the SLEWCTRL value to slow rather than fast as
the current macro indicates. Introduce a new macro, SLEWCTRL_SLOW, that
sets the bit, and modify SLEWCTRL_FAST to 0 but keep it for
completeness. Current users of the macro (i2c and mdio) are left
unmodified as SLEWCTRL_FAST was the macro used and actual desired state.
Tested on am335x-gp-evm with no difference in software performance seen.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
"

Signed-off-by: Christian Amann <Christian.Amann@de.bosch.com>
2018-08-24 16:00:48 -04:00
Marek Vasut
344ca79509 env: ubi: Add missing ENV_NAME
Add missing environment name for UBI, to prevent this NULL in output:
Loading Environment from <NULL>...
and rather have a valid UBI there:
Loading Environment from UBI...

Signed-off-by: Marek Vasut <marex@denx.de>
2018-08-24 16:00:48 -04:00
Neil Stainton
8744d6c504 u-boot: align cache flushes in load_elf_image_shdr to line boundaries
Prevent cache warning messages when using the 'bootelf' command on an
Arm target. Round down each section start address and round up the
respective section end to the nearest cache line.

Currently when using bootelf to load an image on Arm, several warnings
such as the following appear in the console:
  CACHE: Misaligned operation at range [87800000, 8783c5e0]
  CACHE: Misaligned operation at range [8783c5e0, 8784b3e0]

Signed-off-by: Neil Stainton <nstainton@asl-control.co.uk>
[trini: Reword commit message to include the info after the --- which
included the Signed-off-by line, and change ' at ' to '@']
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-08-24 15:59:33 -04:00
Lukasz Majewski
144c4e37db ARM: display5: Remove "factory procedure" from display5 board config
This code now is regarded as dead one and hence shall be removed.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2018-08-24 13:20:32 -04:00
Michal Simek
96ffe87011 dm: test: Fix typo in test-main comment
Trivial fix.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-08-24 13:20:19 -04:00
Simon Goldschmidt
f3da76ea8b malloc_simple: calloc: don't call memset if malloc failed
malloc_simple() can return 0 if out of memory. Don't call memset
from calloc() in this case but rely on the caller checking
the return value.

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Marek Vasut <marex@denx.de>
2018-08-24 13:20:19 -04:00
Thomas Fitzsimmons
a5e34fc0b6 board: arm: bcmstb: Declare get_ticks in timer.h
In an earlier proposed patch, bcmstb.c implemented timer_read_counter,
but it was updated to implement get_ticks instead.  This patch updates
the declaration in timer.h accordingly.

Signed-off-by: Thomas Fitzsimmons <fitzsim@fitzsim.org>
2018-08-24 13:20:19 -04:00
Beniamino Galvani
0b600918d5 boards: amlogic: remove ethernet gpio reset code from boards
The reset is already handled by the designware driver using
information from device tree.

Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
2018-08-24 13:19:53 -04:00
Eugeniu Rosca
e1904f4530 common: avb_verify: Fix division by zero in mmc_byte_io()
Compiling U-Boot with ubsan/asan libraries and running it in sandbox
may lead to below backtrace:

 => avb init 0
 => avb verify
 ## Android Verified Boot 2.0 version 1.1.0
read_is_device_unlocked not supported yet
common/avb_verify.c:407:31: runtime error: division by zero
AddressSanitizer:DEADLYSIGNAL
Reviewed-by: Igor Opaniuk <igor.opaniuk@linaro.org>

=================================================================
==9388==ERROR: AddressSanitizer: FPE on unknown address 0x0000004b467f \
    (pc 0x0000004b467f bp 0x000000000000 sp 0x7ffd899fe150 T0)
    #0 0x4b467e in mmc_byte_io common/avb_verify.c:407
    #1 0x4b4c47 in mmc_byte_io common/avb_verify.c:532
    #2 0x4b4c47 in read_from_partition common/avb_verify.c:533
    #3 0x69dc0d in load_and_verify_vbmeta lib/libavb/avb_slot_verify.c:560
    #4 0x6a1ee6 in avb_slot_verify lib/libavb/avb_slot_verify.c:1139
    #5 0x45dabd in do_avb_verify_part cmd/avb.c:245
    #6 0x4af77c in cmd_call common/command.c:499
    #7 0x4af77c in cmd_process common/command.c:538
    #8 0x46bafc in run_pipe_real common/cli_hush.c:1677
    #9 0x46bafc in run_list_real common/cli_hush.c:1875
    #10 0x46c780 in run_list common/cli_hush.c:2024
    #11 0x46c780 in parse_stream_outer common/cli_hush.c:3216
    #12 0x46d34b in parse_file_outer common/cli_hush.c:3299
    #13 0x4ad609 in cli_loop common/cli.c:217
    #14 0x4625ae in main_loop common/main.c:65
    #15 0x46f2d1 in run_main_loop common/board_r.c:648
    #16 0x640253 in initcall_run_list lib/initcall.c:30
    #17 0x46f9d0 in board_init_r common/board_r.c:879
    #18 0x40539b in main arch/sandbox/cpu/start.c:321
    #19 0x7fa94925f82f in __libc_start_main (/lib/x86_64-linux-gnu/libc.so.6+0x2082f)
    #20 0x408908 in _start (/srv/R/u-boot-master/u-boot+0x408908)

AddressSanitizer can not provide additional info.
SUMMARY: AddressSanitizer: FPE common/avb_verify.c:407 in mmc_byte_io
==9388==ABORTING

Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com>
2018-08-24 13:19:53 -04:00
Eugeniu Rosca
47e41631bb common: avb_verify: Fix never-occurring avb_free(ops_data)
Cppcheck (v1.85) reports w/o this patch:

[common/avb_verify.c:738] -> [common/avb_verify.c:741]: (warning) \
  Either the condition 'ops' is redundant or there is possible null \
  pointer dereference: ops.

Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@linaro.org>
2018-08-24 13:19:53 -04:00
Eugeniu Rosca
047bc5c755 common: avb_verify: Fix memory leaks
Cppcheck (v1.85) reports w/o this patch:

[common/avb_verify.c:351]: (error) Memory leak: part
[common/avb_verify.c:356]: (error) Memory leak: part
[common/avb_verify.c:361]: (error) Memory leak: part
[common/avb_verify.c:366]: (error) Memory leak: part

Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@linaro.org>
2018-08-24 13:19:53 -04:00
Eugeniu Rosca
55d56d2347 common: avb_verify: Make local data static
Fix sparse complaint:

common/avb_verify.c:14:21: warning: \
  symbol 'avb_root_pub' was not declared. Should it be static?

Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@linaro.org>
2018-08-24 13:19:53 -04:00
Eugeniu Rosca
87c814d4c7 common: kconfig: Mark AVB_VERIFY as dependent on PARTITION_UUIDS
Avoid below compiler [1] errors, reproduced with configuration [2]:

common/avb_verify.c: In function ‘get_unique_guid_for_partition’:
common/avb_verify.c:692:31: error: ‘disk_partition_t {aka struct disk_partition}’ has no member named ‘uuid’
  uuid_size = sizeof(part->info.uuid);
                               ^
common/avb_verify.c:696:29: error: ‘disk_partition_t {aka struct disk_partition}’ has no member named ‘uuid’
  memcpy(guid_buf, part->info.uuid, uuid_size);
                             ^
  LD      drivers/built-in.o
make[2]: *** [scripts/Makefile.build:278: common/avb_verify.o] Error 1

[1] aarch64-linux-gnu-gcc (Linaro GCC 7.2-2017.11)
[2] r8a7795_ulcb_defconfig, plus:
    CONFIG_AVB_VERIFY=y
    CONFIG_PARTITION_UUIDS=y
    CONFIG_UDP_FUNCTION_FASTBOOT=y
    CONFIG_LIBAVB=y

Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@linaro.org>
2018-08-24 13:19:53 -04:00
Eugeniu Rosca
2e2067b815 common: avb_verify: Fix invalid 'for' loop condition
Fix below compiler [1] warning:

common/avb_verify.c: In function ‘avb_find_dm_args’:
common/avb_verify.c:179:30: warning: left-hand operand of comma expression has no effect [-Wunused-value]
  for (i = 0; i < AVB_MAX_ARGS, args[i]; ++i) {

[1] aarch64-linux-gnu-gcc (Linaro GCC 7.2-2017.11)

Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@linaro.org>
2018-08-24 13:19:53 -04:00
Ievgen Maliarenko
ecc6f6bea6 libavb: Handle wrong hashtree_error_mode in avb_append_options()
Exit with AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_ARGUMENT
when hashtree_error_mode value passed to avb_append_options()
is unknown (not from AvbHashtreeErrorMode enum).

Otherwise, default value is not handled in the
switch(hashtree_error_mode), which causes below compile warning:

lib/libavb/avb_cmdline.c: In function ‘avb_append_options’:
lib/libavb/avb_cmdline.c:354:13: warning: ‘dm_verity_mode’ may be used uninitialized in this function [-Wmaybe-uninitialized]
     new_ret = avb_replace(
     ~~~~~~~~^~~~~~~~~~~~~~
         slot_data->cmdline, "$(ANDROID_VERITY_MODE)", dm_verity_mode);
         ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
lib/libavb/avb_cmdline.c:363:8: warning: ‘verity_mode’ may be used uninitialized in this function [-Wmaybe-uninitialized]
   if (!cmdline_append_option(
        ^~~~~~~~~~~~~~~~~~~~~~
           slot_data, "androidboot.veritymode", verity_mode)) {

Signed-off-by: Ievgen Maliarenko <ievgen.maliarenko@globallogic.com>
Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@linaro.org>
2018-08-24 13:19:53 -04:00
Marek Vasut
a029f540c5 ARM: dts: socfpga: Add missing NAND reset
The NAND reset is missing from DT, so the reset manager cannot unreset the NAND.
Add the missing DT reset entry.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
2018-08-24 12:05:21 +02:00
Marek Vasut
b67f80148e ARM: dts: socfpga: Drop ad-hoc UART clock frequency encoding from DT
The UART clock frequency can be obtained from the clock framework by the
ns16550 driver, so drop this redundant DT node.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
2018-08-24 12:05:21 +02:00
Marek Vasut
331c372210 ARM: socfpga: Convert Arria10 to timer framework
Switch the Arria10 from ad-hoc hardcoded timer to timer framework
and the DW APB timer driver. This allows the A10 to extract timer
information, like timer rate, from clock framework and thus DT
instead of having it hardcoded in U-Boot configuration files.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
2018-08-24 12:05:20 +02:00
Marek Vasut
cca9af63a3 ARM: dts: socfpga: Flag timer clock as pre-reloc
Flag timer clock as DM pre-reloc, so that a timer driver can be used and
it can extract information about it's clock rate using the clock framework.
This patch also moves some of the pre-reloc flags into the core dtsi file,
this is because the timer is not board specific, but rather is used on all
boards.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
2018-08-24 12:05:20 +02:00
Marek Vasut
66011a0883 timer: dw-apb: Add Designware APB timer driver
Add timer driver for the Designware APB Timer IP. This is present
for example on the Altera SoCFPGA chips.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
2018-08-24 12:05:20 +02:00
Marek Vasut
0b8f6378cb ARM: socfpga: Reorder Arria10 SPL
The Arria10 SPL is a complete mess of calls to functions which are
called in the wrong context and it is surprise it works at all. This
patch tries to clean that mess up by shuffling the function calls
around and moving the calls into the correct context. Due to the
delicate nature of the reordering, this is done in one huge patch.

The following changes happen in this patch:
- Security policy init and NIC301 happens first in board_init_f()
- The clock init happens very early in board_init_f() in SPL only
- arch_early_init_r() only registers the FPGA, just like on Gen5
- arch_early_init_r() is never called from any _f() function
- Dedicated FPGA pins are inited in board_init_f() as on Gen5

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
2018-08-24 12:05:20 +02:00
Ley Foon Tan
8497cb9b25 arm: socfpga: stratix10: Fix mailbox urgent command with urgent register
According to mailbox spec, software should send urgent command with
urgent register instead of COUT location. This patch write urgent
command index to urgent register.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2018-08-24 12:05:20 +02:00
Ley Foon Tan
db3b5e9898 arm: socfpga: stratix10: Enable EMAC to FPGA bridge based on handoff
Code checking and setting EMAC use fpga is in
populate_sysmgr_fpgaintf_module(). So, call to sysmgr_pinmux_init()
instead of populate_sysmgr_pinmux().
In sysmgr_pinmux_init(), it will call to both populate_sysmgr_pinmux()
and populate_sysmgr_fpgaintf_module().

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2018-08-24 12:05:20 +02:00
Tom Rini
3b1c0d89b9 Merge git://git.denx.de/u-boot-fsl-qoriq 2018-08-23 20:05:37 -04:00
Simon Glass
7bf07cf872 Partially revert "efi_loader: Rename sections to allow for implicit data"
This partially reverts commit 7e21fbca26.

That change broke sandbox EFI support for unknown reasons. It also changes
sandbox to use--gc-sections which we don't want.

For now I am just reverting the sandbox portion as presumably this change
is safe on other architectures.

Fixes: 7e21fbca26 (efi_loader: Rename sections to allow for implicit data)
Signed-off-by: Simon Glass <sjg@chromium.org>
2018-08-23 16:17:41 -04:00
Jagdish Gediya
4b5892c480 armv8: layerscape: Build u-boot-with-spl.bin for selected boards
This patch reverts the changes made for ls1088a and ls2080a
based boards in commit 18b6dd6cb0 ("armv8: layerscape: Drop
u-boot-with-spl.bin for selected boards").

u-boot-with-spl.bin is required for Gen3 based SoC where internal
ROM copy data in the internal memory

CC: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
CC: Priyanka Jain <priyanka.jain@nxp.com>
CC: Pramod Kumar <pramod.kumar_1@nxp.com>
CC: Ashish Kumar <ashish.kumar@nxp.com>
CC: York Sun <york.sun@nxp.com>
Signed-off-by: Jagdish Gediya <jagdish.gediya@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-08-23 08:17:35 -07:00
York Sun
50f566d6ee armv8: fsl-layerscape: Update README.falcon for compression
Update README.falcon to use "none" for compression property for
ramdisk image to avoid being uncompressed upon loading.

Signed-off-by: York Sun <york.sun@nxp.com>
2018-08-23 08:17:35 -07:00
Jagan Teki
12069bd046 usb: musb-new: Call musb_platform_exit from musb_stop
musb stop is musb core call during unregister or shutting down
gadget or host musb. For graceful exit add musb_platform_exit
on musb_stop so-that it can exit the musb platform driver as well.

Tested-by: Chen-Yu Tsai <wens@csie.org> # A33-OlinuXino
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-08-23 17:31:24 +05:30
Jagan Teki
14b6a07cf7 usb: musb-new: sunxi: Add proper musb exit support
musb have platform ops to do proper graceful exit,
so add the exit call and move musb platform exit code
instead of keeping it in driver remove.
This make proper shutdown of musb where .remove will
call disable, exit serially via musb_stop.

Tested-by: Chen-Yu Tsai <wens@csie.org> # A33-OlinuXino
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-08-23 17:31:24 +05:30
Jagan Teki
1034bcc26d musb-new: sunxi: Access ahb_reset0_cfg via ccm offset
reset0 is not available for sun4i, 5i and 7i so access
the reset0 offset from ccm via driver data for relevant
Allwinner SoC. this will eventually drop the existing
ifdef for SUN6I.

Tested-by: Chen-Yu Tsai <wens@csie.org> # A33-OlinuXino
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-08-23 17:31:24 +05:30
Jagan Teki
622fd2b98c usb: musb-new: sunxi: Allocate struct phy in private
Allocate struct phy in private structure instead of allocating
locally and assign it to a pointer. This eventually fix miss
alignment phy which is used in another functions.

Tested-by: Chen-Yu Tsai <wens@csie.org> # A33-OlinuXino
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-08-23 17:31:24 +05:30
Jagan Teki
8b8d59f323 usb: musb-new: Fix improper musb host pointer
When MUSB is operating in peripheral mode, probe registering
musb core using musb_register which intern return int value
for validation. so there is no scope to preserve struct musb
pointer but the same can be used in .remove musb_stop.
So fix this by return musb_register with struct musb pointer.

Cc: Igor Grinberg <grinberg@compulab.co.il>
Cc: Purna Chandra Mandal <purna.mandal@microchip.com>
Tested-by: Chen-Yu Tsai <wens@csie.org> # A33-OlinuXino
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-08-23 17:31:24 +05:30
Tom Rini
2418734ed4 Merge branch 'master' of git://git.denx.de/u-boot-tegra 2018-08-22 22:36:08 -04:00
Tom Rini
26699998e9 Merge tag 'signed-efi-2018.09' of git://github.com/agraf/u-boot
Patch queue for efi - 2018-08-21

A few fixes for 2018.09. Most noticable are:

  - unbreak x86 target (-fdata-section fallout)
  - fix undefined behavior in a few corner cases
  - make Jetson TX1 boot again
  - RTS fixes
  - implement reset for simple output
2018-08-21 13:15:21 -04:00
Stephen Warren
3d186cf3f3 ARM: tegra: avoid more operations in non-secure world
A secure monitor that runs before U-Boot, and hence causes U-Boot to run
in non-secure world, must implement a few operations that U-Boot
otherwise implements when running in secure world. Fix U-Boot to skip
these operations when running in non-secure world. In particular:

- The secure monitor must provide the LP0 resume code and own LP0
  configuration in order to maintain security, so must initialize all
  the PMC scratch registers used by the boot ROM during LP0 resume.
  Consequently, U-Boot should not attempt to clear those registers,
  since the register accesses will fail or cause an error.

- The secure monitor owns system security, and so is responsible for
  configuring security-related items such as the VPR.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2018-08-21 08:41:00 -07:00
Nicolas Chauvet
0de68cf3f8 arm: tegra: Restore host1x/dc dm-pre-reloc properties
Since commit f2faffecb0, tegra: Convert to use binman
the dm-pre-reloc properties are removed.

This leads U-Boot not to enable the display on paz00

This patch restore the dm-pre-reloc properties allowing
the bootloader to output to the display panel

v4: - Spell project name as appropriate
v3: - Fix few typos
v2: - Add more characters to commit hash

Signed-off-by: Nicolas Chauvet <kwizart@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2018-08-21 08:34:55 -07:00
Jean-Jacques Hiblot
49c752c93a cmd: Add bind/unbind commands to bind a device to a driver from the command line
In some cases it can be useful to be able to bind a device to a driver from
the command line.
The obvious example is for versatile devices such as USB gadget.
Another use case is when the devices are not yet ready at startup and
require some setup before the drivers are bound (ex: FPGA which bitsream is
fetched from a mass storage or ethernet)

usage example:

bind usb_dev_generic 0 usb_ether
unbind usb_dev_generic 0 usb_ether
or
unbind eth 1

bind /ocp/omap_dwc3@48380000/usb@48390000 usb_ether
unbind /ocp/omap_dwc3@48380000/usb@48390000

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-08-21 16:21:37 +02:00
Jean-Jacques Hiblot
3be9bcb048 device: expose the functions used to remove and unbind children of a device
Also add a 'drv' parameter to filter the children to remove/unbind.
Exporting those functions is a preparatory work for the addition of the
bind/unbind commands.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-08-21 16:21:37 +02:00
Jean-Jacques Hiblot
7ec9181d6a dm: convert device_get_global_by_of_offset() to device_get_global_by_ofnode()
Also add device_find_global_by_ofnode() that also find a device based on
the OF node, but doesn't probe the device.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-08-21 16:21:37 +02:00
Jean-Jacques Hiblot
999b204383 dm: print the index of the device when dumping the dm tree
Command "dm tree" dumps the devices with class, driver, name information.
Add the index of the device in the class too, because the information is
useful for the bind/unbind commands.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-08-21 16:21:37 +02:00
Jean-Jacques Hiblot
e7c865620e uclass: Add dev_get_uclass_index() to get the uclass/index of a device
This function is the reciprocal of uclass_find_device().
It will be used to print the index information in dm tree dump.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-08-21 16:21:37 +02:00
Jean-Jacques Hiblot
c3211708cf net: eth-uclass: Fix for DM USB ethernet support
When a USB ethernet device is halted, the device driver is removed. When
this happens the uclass private memory is freed and uclass_priv is set to
NULL. This causes a data abort when uclass_priv->state is then set to
ETH_STATE_PASSIVE.

Fix it by checking if uclass_priv is NULL before setting uclass_priv->state

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-08-21 16:21:37 +02:00
Jean-Jacques Hiblot
c73251eac1 usb: gadget: Add bcdDevice for the DWC3 USB Gadget Controller
Add an entry in usb_gadget_controller_number() for the DWC3 gadget
controller. Without it, it is not possible to bind the USB Ethernet driver.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-08-21 16:21:37 +02:00
Adam Ford
1a35526e1d usb: musb-new: omap2430: Enable DM_USB and OF support
With upcoming changes that require CONFIG_BLK, this broke
USB Mass Storage on the OMAP3 boards because if CONFIG_BLK is
enabled, it assumes that DM_USB is enabled, but it wasn't yet
available on omap3 and omap4 boards.

This patch converts the OMAP2430 MUSB glue to support DM_USB and
extracts the necessary information based on the device tree.

It's based on the ti-musb driver, but there are enough significant
differences in both the architecture and device tree entires between
am33xx and OMAP3/OMAP4, that I think it makes sense to continue to
keep the separate.

Per doc/driver-model/usb-info.txt, the USB gadget stuff hasn't
migrated to DM_USB yet, so this only supports USB Host for now.

Users wanting USB Gadgets will need to disable DM_USB and leave
it the old way for now.

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-08-21 16:21:37 +02:00
Adam Ford
10d5ed9a54 usb: musb-new: omap2430: Remove dead code
A bunch of code was encapsulated in #ifdef's whether or not
it is building or for U-Boot.  Since this code is always building
for U-Boot, this patch removes the dead code.

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-08-21 16:21:37 +02:00
Sam Protsenko
aa51579f9a cmd: fastboot: Validate user input
In case when user provides '-' as USB controller index, like this:

    => fastboot -

data abort occurs in strcmp() function in do_fastboot(), here:

    if (!strcmp(argv[1], "udp"))

(tested on BeagleBone Black).

That's because argv[1] is NULL when user types in the '-', and null
pointer dereference occurs in strcmp() (which is ok according to C
standard specification). So we must validate user input to prevent such
behavior.

While at it, check also the result of strtoul() function and handle
error cases properly.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
2018-08-21 16:21:37 +02:00
Eugeniu Rosca
dbb148b22c cmd: efi: Clarify calculation precedence for '&' and '?'
Fix cppcheck complaint:
[cmd/efi.c:173]: (style) Clarify calculation precedence for '&' and '?'.

Fixes: f1a0bafb58 ("efi: Add a command to display the memory map")
Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-08-21 00:04:24 +02:00
Eugeniu Rosca
c3a40cce2a efi: Add EFI_MEMORY_{NV, MORE_RELIABLE, RO} attributes
With this update, the memory attributes are in sync with Linux
kernel v4.18-rc4. They also match page 190 of UEFI 2.7 spec [1].

[1] http://www.uefi.org/sites/default/files/resources/UEFI_Spec_2_7.pdf

Suggested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-08-21 00:03:56 +02:00
Eugeniu Rosca
9b89183b97 efi: Fix truncation of constant value
Starting with commit 867a6ac86d ("efi: Add start-up library code"),
sparse constantly complains about truncated constant value in efi.h:

include/efi.h:176:35: warning: cast truncates bits from constant value (8000000000000000 becomes 0)

This can get quite noisy, preventing real issues to be noticed:

$ make defconfig
*** Default configuration is based on 'sandbox_defconfig'
$ make C=2 -j12 2>&1 | grep truncates | wc -l
441

After the patch is applied:
$ make C=2 -j12 2>&1 | grep truncates | wc -l
0
$ sparse --version
v0.5.2

Following the suggestion of Heinrich Schuchardt, instead of only
fixing the root-cause, I replaced the whole enum of _SHIFT values
by ULL defines. This matches both the UEFI 2.7 spec and the Linux
kernel implementation.

Some ELF size comparison before and after the patch (gcc 7.3.0):

efi-x86_payload64_defconfig:
text    data    bss     dec       hex   filename
407174  29432   278676  715282    aea12 u-boot.old
407152  29464   278676  715292    aea1c u-boot.new
-22     +32     0       +10

efi-x86_payload32_defconfig:
text    data    bss     dec       hex   filename
447075  30308   280076  757459    b8ed3 u-boot.old
447053  30340   280076  757469    b8edd u-boot.new
-22     +32     0       +10

Fixes: 867a6ac86d ("efi: Add start-up library code")
Suggested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-08-21 00:03:01 +02:00
Heinrich Schuchardt
9d12daff6c efi_loader: EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL.Reset()
Implement the reset service of the EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL.

This should resolve the error reported by the SCT in
Protocol/SimpleTextOut/BlackBoxTest/SimpleTextOutBBTestFunction_uefi.c:639

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-08-21 00:01:01 +02:00
Tom Rini
b71d9e8b38 Merge branch 'master' of git://git.denx.de/u-boot-sunxi 2018-08-20 13:41:56 -04:00
Tom Rini
3313e90844 Merge git://git.denx.de/u-boot-x86 2018-08-20 13:41:37 -04:00
Lukasz Majewski
f008e26008 display5: Introduce fitImg_fw_sz variable
This cosmetic change allow easy adjustment of the to-load kernel size if
needed.

Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Lukasz Majewski <lukma@denx.de>
2018-08-20 13:11:08 -04:00
Heinrich Schuchardt
54bfba2704 efi_selftest: correct block device unit test
The UEFI specification mandates that the create flag is only used in
conjunction with both the read and the write flag.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-08-20 14:47:07 +02:00
Heinrich Schuchardt
bcfb0e22a8 efi_loader: document runtime functions
Add comments for runtime service functions.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-08-20 14:43:31 +02:00
Heinrich Schuchardt
a39f39cdd8 efi_loader: update runtime services table crc32
The crc32 of the runtime services table must be updated after detaching.

efi_update_table_header_crc32() must be __efi_runtime. So move it to
efi_runtime.c

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-08-20 14:43:12 +02:00
Heinrich Schuchardt
483dbab9f9 lib: crc32: mark function crc32() as __efi_runtime
The function crc32() is needed by the EFI subsystem at runtime. So it has
to be linked into the runtime section together with all dependencies.

Eliminate empty defines local and ZEXPORT.

Mark variables as static which are not exported.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-08-20 14:42:36 +02:00
Heinrich Schuchardt
fa995d0d94 efi_loader: avoid NULL dereference in efi_get_memory_map()
We should only dereference parameter memory_map_size after checking that
it is valid.

Fixes: 8e835554b3 ("efi_loader: check parameters of GetMemoryMap")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-08-20 14:41:09 +02:00
Jagan Teki
d8024074e4 board: sunxi: Remove unused local variables
variables buf from board_mmc_init, and ret from misc_init_r
were unused on the functions, so remove it.

Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-08-20 18:10:43 +05:30
AKASHI Takahiro
3748ed908f efi_loader: fix a parameter check at CreateEvent()
The commit 21b3edfc96 ("efi_loader: check parameters of CreateEvent")
enforces a strict parameter check at CreateEvent(). On the other hand,
UEFI specification version 2.7, section 7.1, says:

    The EVT_NOTIFY_WAIT and EVT_NOTIFY_SIGNAL flags are exclusive. If
    neither flag is specified, the caller does not require any notification
    concerning the event and the NotifyTpl, NotifyFunction, and
    NotifyContext parameters are ignored.

So the check should be mitigated so as to comply with the specification.
Without this patch, EDK2's Shell.efi won't be started.

Fixes: 21b3edfc96 ("efi_loader: check parameters of CreateEvent")
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-08-20 14:39:35 +02:00
Alexander Graf
122347f366 riscv: Include bss subsections in linker script
When we build with -fdata-sections we may end up with bss subsections. Our
linker script explicitly lists only a single consecutive bss section though.

Adapt the statement to also include subsections.

Signed-off-by: Alexander Graf <agraf@suse.de>
2018-08-20 14:25:59 +02:00
Alexander Graf
1acbd0ea99 x86: Enable -fdata-sections always
We left -fdata-sections disabled for x86_64 before because we encountered
random bugs that were at that time inexplicable.

Turns out this really was just side effects of missing .bss* statements
in the linker scripts. With those fixed, we can enable data sections for all
targets.

Signed-off-by: Alexander Graf <agraf@suse.de>
2018-08-20 14:20:53 +02:00
Alexander Graf
6331cb2165 x86: Include bss subsections in linker script
When we build with -fdata-sections we may end up with bss subsections. Our
linker script explicitly lists only a single consecutive bss section though.

Adapt the statement to also include subsections.

This fixes booting efi-x86_app_defconfig.

Signed-off-by: Alexander Graf <agraf@suse.de>
2018-08-20 14:17:43 +02:00
Icenowy Zheng
7ac5f33483 sunxi: fix sid base address macro name for H6
In the current H6 CPU memory space code, the SUNXI in the macro name of
the SID address base is wrongly spelled as SNUXI, which leads to SID
readout not working.

Fix this macro name.

Fixes: 55f6b1c351c9 ("sunxi: add basic memory map definitions of H6 SoC")
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2018-08-20 17:22:59 +05:30
Jagan Teki
044fa00387 configs: sun7i: Fix to use emmc dts for OLinuXino_MICRO-eMMC
A20 OLinuXino Micro eMMC board has emmc with mmc2 slot
so use proper dts, sun7i-a20-olinuxino-micro-emmc.dts

Cc: Stefan Mavrodiev <stefan@olimex.com>
Cc: Hans de Goede <hdegoede@redhat.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-08-20 17:21:45 +05:30
Pierre-Jean Texier
612e99123b doc: FIT image: fix typo
Fix typo in beaglebone verified boot documentation.

Signed-off-by: Pierre-Jean Texier <texier.pj2@gmail.com>
2018-08-20 07:21:29 -04:00
Sam Protsenko
d03e76af5c cmd: Add dtimg command
dtimg command allows user to work with Android DTB/DTBO image format.
Such as, getting the address of desired DTB/DTBO file, printing the dump
of the image in U-Boot shell, etc.

This command is needed to provide Android boot with new Android DT image
format further.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-08-20 07:21:29 -04:00
Sam Protsenko
c044733457 common: Add support for Android DT image
Android documentation recommends new image format for storing DTB/DTBO
files: [1]. To support that format, this patch adds helper functions for
Android DTB/DTBO format. In image-android-dt.* files you can find helper
functions to work with Android DT image format, such us routines for:
    - printing the dump of image structure
    - getting the address and size of desired dtb/dtbo file

This patch uses dt_table.h file, that was added in commit 643cefa4d8
("Import Android's dt_table.h for DT image format") by Alex Deymo.

[1] https://source.android.com/devices/architecture/dto/partitions

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-08-20 07:21:29 -04:00
Andreas Dannenberg
287c04e11a fs/fat: debug-print file read position during file_fat_read_at()
In order to make the debug print in file_fat_read_at() a tad more useful,
show the offset the file is being read at alongside the filename.

Suggested-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-08-20 07:21:28 -04:00
Simon Goldschmidt
94cb986e5e spl: fix debug print in spl_common_init()
spl_common_init() debug-prints "spl_early_init()\n" but it is
called both from spl_early_init() and spl_init().

Fix this by moving the debug() statement to the calling functions
which now print their name.

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-08-20 07:21:28 -04:00
Adam Ford
09d841176d ARM: da8xxevm: README: Add NOR booting instructions
The da850evm with its UI expander board can boot XIP boot from
NOR flash.  This adds the instructions to the readme. file.

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-08-20 07:21:28 -04:00
Adam Ford
c4fa049a12 ARM: da850evm: Enable SPL_SYS_MALLOC_SIMPLE
The SPL space is limited.  In order to try to enable DM in SPL,
we need more space. When combined wtih TINY_PRINTF, this reduces
the size of SPL by 6.5k

Original:

   text	   data	    bss	    dec	    hex	filename
  20760	   1216	     80	  22056	   5628	spl/u-boot-spl

Tiny Printf
   text	   data	    bss	    dec	    hex	filename
  17947	   1216	     80	  19243	   4b2b	spl/u-boot-spl

Malloc Simple + Tiny Printf
   text	   data	    bss	    dec	    hex	filename
  15187	    176	     28	  15391	   3c1f	spl/u-boot-spl

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-08-20 07:21:27 -04:00
Adam Ford
f09d831557 ARM: da850evm: Enable USE_TINY_PRINTF
The SPL space is limited.  In order to try to enable DM in SPL,
we need more space. This reduces the size of SPL by ~2.7K

before:
   text	   data	    bss	    dec	    hex	filename
  20760	   1216	     80	  22056	   5628	spl/u-boot-spl
after:
   text	   data	    bss	    dec	    hex	filename
  17947	   1216	     80	  19243	   4b2b	spl/u-boot-spl

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-08-20 07:21:27 -04:00
Adam Ford
391328dc30 configs: da850evm: Remove DM_I2C_COMPAT
Since using DM_I2C_COMPAT throws a warning during compilation,
and it isn't really needed any longer, so this patch removes
this feature and shrinks the code a bit.

from:
   text	   data	    bss	    dec	    hex	filename
 343326	  13388	 123448	 480162	  753a2	u-boot

to:
   text	   data	    bss	    dec	    hex	filename
 342924	  13380	 123440	 479744	  75200	u-boot

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-08-20 07:21:27 -04:00
Heinrich Schuchardt
07240da293 efi_loader: relocate pointer to tables
When applying a virtual memory map we have to update the pointer to the
list of configuration tables.

Fixes: 4182a129ef ("efi_loader: allocate configuration table array")
Reported-by: Mark Kettenis <mark.kettenis@xs4all.nl>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Tested-by: Mark Kettenis <kettenis@openbsd.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-08-20 11:39:19 +02:00
Stephen Warren
ccfc78b820 Revert "efi_loader: efi_allocate_pages is too restrictive"
This reverts commit aa909462d0. This change
caused "dhcp filename" to crash the system on p2371-2180 (Jetson TX1), for
example when running test/py.

Reverting this change isn't optimal, but at least restores TX1 to a working
state. In the future, we should:

a) Fix whatever problem causes the crash with this patch applied. This
needs further discussion, so isn't something we can immediately do.

b) Undo the revert; re-apply the original patch to efi_allocate_pages.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-08-20 11:39:19 +02:00
Alexander Graf
18e684dd4c sandbox: Move BSS after EFI sections
Something went wrong when writing the sandbox linker scripts and so we
ended up with a .bss section marker right before the efi runtime sections.

That obviously is a terrible idea, as it may result in overwriting efi
runtime code and data. So let's move the .bss identifier behind the efi
sections.

Signed-off-by: Alexander Graf <agraf@suse.de>
2018-08-20 11:39:19 +02:00
Bin Meng
7bdf39cfaf x86: efi: payload: Add default TSC frequency in the device tree
It was observed sometimes U-Boot as the EFI payload fails to boot on
QEMU. This is because TSC calibration fails with no valid frequency.
This adds default TSC frequency in the device tree.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-08-20 13:52:49 +08:00
Bin Meng
864915561b x86: coreboot: Add default TSC frequency in the device tree
It was observed sometimes U-Boot as the coreboot payload fails to
boot on QEMU. This is because TSC calibration fails with no valid
frequency. This adds default TSC frequency in the device tree.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2018-08-20 13:52:49 +08:00
Bin Meng
165db7c426 x86: tsc: Try hardware calibration first
At present if TSC frequency is provided in the device tree, it takes
precedence over hardware calibration result. This swaps the order to
try hardware calibration first and uses device tree as last resort.

This can be helpful when a generic dts (eg: coreboot/efi payload) is
supposed to work on as many hardware as possible, including emulators
like QEMU where TSC hardware calibration sometimes fails.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2018-08-20 13:52:49 +08:00
Bin Meng
1cf6825a68 x86: dts: Remove coreboot_fb.dtsi
There is no need to keep a separate coreboot_fb.dtsi since now we
have a generic coreboot payload dts.

While we are here, this also remove the out-of-date description in
the documentation regarding to coreboot framebuffer driver with
U-Boot loaded as a payload from coreboot. As the testing result with
QEMU 2.5.0 shows, the driver just works like a charm.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-08-20 13:52:49 +08:00
Bin Meng
6e71a6ab2d x86: Remove support for Advantech SOM-6896
Now that we have generic coreboot payload support, remove the
dedicated support for Advantech SOM-6896.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2018-08-20 13:52:49 +08:00
Bin Meng
ceeee8f7b5 x86: coreboot: Add generic coreboot payload support
Currently building U-Boot as the coreboot payload requires user
to change the build configuration for a specific board during
menuconfig process. This uses the board's native device tree
to configure the hardware. For example, the device tree provides
PCI address range for the PCI host controller and U-Boot will
re-program all PCI devices' BAR to be within this range. In order
to make sure we don't mess up the hardware, we should guarantee
the range matches what coreboot programs the chipset.

But we really should make the coreboot payload support easier.
Just like EFI payload, we can create a generic coreboot payload
for all x86 boards as well. The payload is configured to include
as many generic drivers as possible. All stuff that touches low
level initialization are not allowed as such is the coreboot's
responsibility. Platform specific drivers (like gpio, spi, etc)
are not included.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2018-08-20 13:52:06 +08:00
Andy Shevchenko
6ace36e19a Makefile: Don't generate position independent code
Since gcc-8 the --enable-default-pie starts producing code which assembler
can't translate in case of U-Boot. The build fails with

  {standard input}: Assembler messages:
  {standard input}:21100: Error: junk at end of line, first unrecognized character is `@'
  {standard input}:21120: Error: junk at end of line, first unrecognized character is `@'

and so on.

This is usually the case for x86 platform because in many cases it uses host
compiler from the Linux distributions, where PIE is enabled by default.
Previously (gcc-7 and earlier) that was a potential issue due to absence of
constructions like

  .long   end.5561@gotoff-start.5558@gotoff

which are a cause of above error messages in gcc-8.

Fix all these by disabling PIE on Makefile level.

Reported-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Suggested-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Tested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2018-08-20 13:52:06 +08:00
Peng Fan
39dd00fc5d drivers: regulator: fixed: add u-boot, off-on-delay-us
Add u-boot,off-on-delay-us for fixed regulator.

Depends on board design, the gpio regulator sometimes
connects with a big capacitance. When need to off, then
on the regulator, if there is no enough delay,
the voltage does not drop to 0, so introduce this
property to handle such case.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-08-19 20:38:39 -04:00
Michal Simek
4aee624c92 env: Merge Rockchip, Sunxi, Zynq and ZynqMP
There is no reason to have the same Kconfig options for different SoCs
separately. The patch is merging them together.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
[trini: Fix ENV_SIZE around ENV_IS_NOWHERE]
Signed-off-by: Tom Rini <trini@konsulko.com>

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-08-19 12:14:38 -04:00
Adam Ford
9f8cf76be2 Convert CONFIG_SYS_I2C_DAVINCI to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_I2C_DAVINCI

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-08-17 15:43:38 -04:00
Adam Ford
9baa2bce28 Removed unused references to CONFIG_SERIALx
After creating CONS_INDEX and migrating a bunch of boards to it,
there are a bunch of defined references to CONFIG_SERIALx which
are not referenced in any C code or #ifdef, so they can now be
removed

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-08-17 15:43:32 -04:00
Adam Ford
cc3fedb204 Convert CONFIG_TWL4030_LED et al to Kconfig
This converts the following to Kconfig:
   CONFIG_TWL4030_LED
   CONFIG_TWL4030_INPUT

This also removes dead references to:
   CONFIG_TWL4030_KEYPAD

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-08-17 13:04:00 -04:00
Adam Ford
244eaea60b Convert CONFIG_VIDEO_OMAP3 to Kconfig
This converts the following to Kconfig:
   CONFIG_VIDEO_OMAP3

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-08-17 13:04:00 -04:00
Adam Ford
8ccf98b1cf Convert CONFIG_MISC_INIT_R to Kconfig
This converts the following to Kconfig:
   CONFIG_MISC_INIT_R

Signed-off-by: Adam Ford <aford173@gmail.com>
[trini: Update the defaults logic slightly]
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-08-17 13:04:00 -04:00
Alex Kiernan
ca0d535edc Migrate bootlimit to Kconfig
Migrate boards which set bootlimit in the environment to Kconfig.

We exclude gurnard_defconfig which includes a bootlimit=, but doesn't set
CONFIG_BOOTCOUNT_LIMIT, so we'd fail to include a bootlimit setting
if we migrated it.

display5_defconfig and display5_factory_defconfig share a SYS_CONFIG_NAME,
but only display5_defconfig enables CONFIG_BOOTCOUNT_LIMIT, so we fail to
set bootlimit= in display5_factory_defconfig. This is okay because the
display5_factory_defconfig doesn't need to have it set, as it is only
meant to prepare the board in the factory.

Environment changes for all modified configs as seen from buildman:

  boards.cfg is up to date. Nothing to do.
  Summary of 3 commits for 32 boards (8 threads, 1 job per thread)
  01: Merge git://git.denx.de/u-boot-x86
         arm:  +   draco etamin rastaban pxm2 display5 thuban rut
  02: Add BOOTCOUNT_BOOTLIMIT to set reboot limit
  03: Migrate bootlimit to Kconfig
     - display5_factory: bootlimit=3

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
2018-08-17 13:03:59 -04:00
Alex Kiernan
c9ad6bc235 Add BOOTCOUNT_BOOTLIMIT to set reboot limit
Add ability to set environment bootlimit from Kconfig

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
2018-08-17 13:03:59 -04:00
Adam Ford
d7869b2183 Convert CONFIG_MII et al to Kconfig
This converts the following to Kconfig:
   CONFIG_MII
   CONFIG_DRIVER_TI_EMAC

Signed-off-by: Adam Ford <aford173@gmail.com>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-08-17 13:03:54 -04:00
Michal Simek
4adc6605a9 dts: Fix typo in OF_LIVE Kconfig help
Fix typo in Kconfig description.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-08-17 09:22:35 -04:00
Simon Goldschmidt
004167048d kconfig: fix typo 'parition'
Replaced misspelled words "parition"/"paritioning" (missing 't') in two
Kconfig files by correct words "partition"/"partitioning"

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-08-17 09:22:35 -04:00
Tom Rini
8297e648b8 Merge branch 'master' of git://git.denx.de/u-boot-sh 2018-08-17 07:25:04 -04:00
Tom Rini
719afeb0b3 Merge branch 'master' of git://git.denx.de/u-boot-socfpga 2018-08-17 07:24:34 -04:00
Tom Rini
86cf1c8285 configs: Migrate CONFIG_NR_DRAM_BANKS
We have the following cases:
- CONFIG_NR_DRAM_BANKS was defined, migrate normally
- CONFIG_NR_DRAM_BANKS_MAX was defined and then used for
  CONFIG_NR_DRAM_BANKS after a check, just migrate it over now.
- CONFIG_NR_DRAM_BANKS was very oddly defined on p2771-0000-* (to 1024 +
  2), set this to 8.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-08-16 16:45:02 -04:00
Ramon Fried
999a772d9f Kconfig: Migrate CONFIG_NR_DRAM_BANKS
Move CONFIG_NR_DRAM_BANKS from headers to Kconfig.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
2018-08-16 16:45:02 -04:00
Ramon Fried
6b6f216f92 fdt_support: Use CONFIG_NR_DRAM_BANKS if necessary
If CONFIG_NR_DRAM_BANKS is bigger than the default
value (4) define MEMORY_BANKS_MAX as CONFIG_NR_DRAM_BANKS.

Fixes: 2a1f4f1758 ("Revert "fdt_support: Use CONFIG_NR_DRAM_BANKS if defined"")
Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
2018-08-16 16:45:02 -04:00
Tom Rini
0bdea7c430 CONFIG_SYS_GENERIC_BOARD: Finish migration
While we have long since migrated to CONFIG_SYS_GENERIC_BOARD being
enabled, we had just a few places left that still referenced or defined
it.  Update.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-08-16 16:45:02 -04:00
Ley Foon Tan
b0c0a715f9 arm: socfpga: Fix SYSMGR_FPGAINTF_EMACx bit mask
Bitmask for EMAC should be bit-0, EMAC1 bit-8 and EMAC2 bit-16.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2018-08-15 12:41:09 +02:00
Marek Vasut
4f10989280 ARM: rmobile: Enable USB PHY on Gen2
Enable support for USB PHY on the R-Car Gen2. This allows for both
of the USB host ports to be used on such boards.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-08-14 11:31:25 +02:00
Marek Vasut
664258887d phy: rcar: Add R-Car Gen2 PHY driver
Add a PHY driver for the R-Car Gen2 which allows configuring the mux
connected to the EHCI controllers and USBHS controller.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-08-14 11:31:19 +02:00
Marek Vasut
5e50adf667 phy: Fix off-by-one error when parsing DT PHY bindings
The code fails to copy the last PHY phandle argument, so it is
missing from the adjusted phandle args and the consumer cannot
use it to determine what the PHY should do.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
2018-08-14 11:31:19 +02:00
Tom Rini
92e738f555 Prepare v2018.09-rc2
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-08-13 21:20:57 -04:00
Tom Rini
323ba02d42 configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-08-13 20:05:58 -04:00
Marek Vasut
d81b5da3fe ARM: socfpga: clk: Convert to clock framework
Use clock framework functions to fetch clock information now that there
is a clock driver for Arria10, instead of custom coded register parsing.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
2018-08-13 22:35:42 +02:00
Marek Vasut
12ea13ad43 mmc: socfpga: Add clock framework support
Add support for fetching the clock frequency both using the legacy
method in case clock framework is disabled as well as via the clock
framework if it is enabled. This allows for migration to the clock
framework on platforms which supports it while not breaking legacy
platforms. That said, the legacy method must be removed eventually.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
2018-08-13 22:35:42 +02:00
Marek Vasut
f9f016adcd clk: socfpga: Add initial Arria10 clock driver
Add clock driver for the Arria10, which allows reading the clock
frequency from all the clock described in the DT. The driver also
allows enabling and disabling the clock. Reconfiguring frequency
is not supported thus far.

Since the DT bindings for the SoCFPGA clock are massively misdesigned
and the handoff DT adds additional incorrectly described entries to
the DT, the driver contains workarounds which attempt to rectify all
of those problems.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
2018-08-13 22:35:42 +02:00
Marek Vasut
ccc97432ad ARM: dts: socfpga: Add u-boot,dm-pre-reloc to necessary clock nodes
Add the pre-reloc DT markers to clock nodes needed in SPL and early
U-Boot stages. This is required to let the Arria10 clock driver start
early and provide clock information for UART and SDMMC.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
2018-08-13 22:35:42 +02:00
Marek Vasut
f4c3e0dcf5 ARM: socfpga: clk: Drop unused variables on Arria10
The variables removed in this patch are never used, they are only ever
assigned and then waste precious memory. Drop both the assignment and
the variables.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
2018-08-13 22:35:42 +02:00
Marek Vasut
49e508e962 ARM: socfpga: clk: Make L4SP and MMC clock calculation Gen5 only
The L4SP and MMC clock precalculation is specific to Gen5, it is not
needed on Arria10/Stratix10. Isolate it to Gen5 until there is a proper
clock driver for Gen5, at which point this will go away completely.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
2018-08-13 22:35:42 +02:00
Marek Vasut
934aec71d6 ARM: socfpga: clk: Obtain handoff base clock via DM
Bind fixed clock driver to the base clock instantiated in the handoff
DT and use DM clock framework to get their clock rate. This replaces
the ad-hoc DT parsing present thus far.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
2018-08-13 22:35:42 +02:00
Marek Vasut
2af5d51cc2 ARM: socfpga: Enable DM ethernet on A10
Enable DM ethernet framework on Arria10, so that the designware GMAC
can be probed from DT as it should be.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
2018-08-13 22:35:42 +02:00
Marek Vasut
d6a61da462 ARM: socfpga: Remove adhoc ethernet reset and configuration
Remove ad-hoc ethernet syscon registers configuration and reset support.
Reset is now handled by the reset framework and the syscon registers are
set in the dwmac_socfpga.c driver.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
2018-08-13 22:35:42 +02:00
Marek Vasut
6385a8a964 ARM: socfpga: Zap unused reset code
Remove code from the reset manager that is never called.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
2018-08-13 22:35:42 +02:00
Marek Vasut
215a06565a net: designware: socfpga: Add Arria10 extras
Add wrapper around the designware MAC driver to handle the SoCFPGA
specific configuration bits. On Arria10, this is configuration of
syscon phy_intf.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2018-08-13 22:35:42 +02:00
Marek Vasut
f9edeb32a9 ARM: socfpga: Zap all the UART handling complexity
The UART reset handling is now done via reset framework using the
SoCFPGA reset driver. The UART console assignment is done using the
DM and console framework. Nuke all this comlexity, since it is just
duplicating the same functionality, badly.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
2018-08-13 22:35:40 +02:00
Marek Vasut
fe88c2fea7 ARM: socfpga: Enable DM I2C framework on A10
Enable the DM I2C framework on Arria10, so that the DM capable
Designware I2C driver can handle the reset via DM reset framework.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
2018-08-13 22:35:17 +02:00
Marek Vasut
8145c1c299 ARM: socfpga: Enable DM reset framework on A10
Enable the DM reset framework and DM reset driver on Arria10 both
in U-Boot and in SPL. This lets U-Boot parse reset control from DT.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
2018-08-13 22:35:17 +02:00
Marek Vasut
c29508045f ARM: dts: socfpga: Add i2c alias to A10 SoCDK
The A10 SoCDK is missing the I2C bus alias, so DM I2C cannot assign
the I2C bus a bus number. Add the missing alias.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
2018-08-13 22:35:16 +02:00
Marek Vasut
3d8685f155 ARM: dts: socfpga: Add missing I2C resets
The I2Cx resets are missing from DT, so the reset manager
cannot control them. Add the missing DT reset entries.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
2018-08-13 22:35:16 +02:00
Marek Vasut
da61e50fc4 ARM: dts: socfpga: Fix Arria10 GMAC resets
Add the GMAC0,1 OCP resets, which must also be ungated for those GMACs
to work and add GMAC2 reset and OCP resets which were missing altogether.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
2018-08-13 22:35:16 +02:00
Marek Vasut
f5775e69cc ARM: dts: socfpga: Add missing UART resets
The UART0 and UART1 resets are missing from DT, so the reset manager
cannot control them. Add the missing DT reset entries.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
2018-08-13 22:35:16 +02:00
Marek Vasut
6f96ed7e20 ARM: dts: socfpga: Flag reset manager on A10 as pre-reloc
The Altera reset manager block must be available very early on, since
it controls ie. UART resets. Flag it as pre-reloc.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
2018-08-13 22:35:16 +02:00
Marek Vasut
af74658e04 ARM: socfpga: Register the FPGA on A10 in SPL again
The restructuring of the SPL dropped registration of the FPGA in SPL,
readd it.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
Fixes: c859f2a77d ("arm: socfpga: Restructure the SPL file")
2018-08-13 22:35:16 +02:00
Simon Goldschmidt
e4ff8420c5 arm: socfpga: gen5: combine some init code for SPL and U-Boot
Some of the code for low level system initialization in SPL's
board_init_f() and U-Boot's arch_early_init_r() is the same,
so let's combine it into a single function called from both.

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2018-08-13 22:35:06 +02:00
Simon Goldschmidt
79a436d568 arm: socfpga: fix device trees to work with DM serial
Device trees need to have the serial console device available
before relocation and require a stdout-path in chosen at least
for SPL to have a console.

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2018-08-13 22:35:06 +02:00
Patrice Chotard
f65b82ffbe MAINTAINERS: Update STM32MP fragments
Add new drivers
Add Christophe Kerello and myself as maintainers

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-08-13 14:04:04 -04:00
Patrick Delaunay
2deaf5cc63 ARM: dts: stm32f4: Fix DT dtc warnings
This patch fix the following warnings for for stm32f429
evaluation and discovery boards:

unnecessary #address-cells/#size-cells without "ranges" or
child "reg" property

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-08-13 14:04:04 -04:00
Patrice Chotard
638ee5af6b ARM: dts: stm32mp157: Add ADC DT node
Add ADC device tree node. This allows to get analog conversions on
stm32mp157.

Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-08-13 14:04:04 -04:00
Patrice Chotard
6effb56fbc ARM: dts: stm32: remove cd-inverted for stm32f746-disco
As cd-inverted property is no more used by arm_pl180_mmci driver,
remove it. Update cd-gpios active level accordingly.

Reported-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-08-13 14:04:04 -04:00
Patrice Chotard
4c55c83989 ARM: dts: stm32: remove cd-inverted for stm32f769-disco
As cd-inverted property is no more used by arm_pl180_mmci driver,
remove it. Update cd-gpios active level accordingly.

Reported-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-08-13 14:04:04 -04:00
Derald D. Woods
fe50a13b2f ARM: omap3: evm: Enable CONFIG_BLK and misc. cleanup
This commit enables CONFIG_BLK and removes USB_STORAGE which is awaiting
proper implementation for current U-Boot interfaces. Additionally the
console selection is now handled by Kconfig and no longer needs to be in
the config header. CONFIG_SYS_MALLOC_F_LEN=0x2000 was added to sync with
other boards. CONFIG_SPL_BLK and CONFIG_SPL_DM_MMC are disabled because
they currently do not allow the OMAP3-EVM (OMAP34XX) to actually boot.

Signed-off-by: Derald D. Woods <woods.technical@gmail.com>
2018-08-13 14:04:04 -04:00
Miquel Raynal
46703cd9f3 tpm: sandbox: fix wrong assignment with a simplification
The recv variable in sandbox_tpm2_fill_buf() is a pointer on a pointer
of a char array. It means accessing *recv is the char array pointer
itself while **recv is the first character of that array. There is no
need for such indirection here, so simplify the code.

Simplifying things will make the last assignment right: "*recv = NULL"
is now correct. The issue has been found by the following Coverity
Scan report:

    CID 183371:  Incorrect expression  (UNUSED_VALUE)
    Assigning value "4UL" to "*recv" here, but that stored value is overwritten before it can be used.
    232             *recv += sizeof(rc);
    233
    234             /* Add trailing \0 */
    235             *recv = NULL;

While at simplifying things, use '\0' instead of NULL when adding an
empty char at the end of the buffer.

Reported-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-08-13 14:04:04 -04:00
Miquel Raynal
fd973ca696 tpm: sandbox: fix wrong check on pcr_map
The second check on pcr_map in sandbox_tpm2_xfer() is wrong. It should
check for pcr_map not being empty. Instead, it is a pure copy/paste of
the first check which is redundant.

This has been found thanks to a Coverity Scan report:

    CID 183370:  Memory - illegal accesses  (UNINIT)
    Using uninitialized value "pcr_index".
        put_unaligned_be32(tpm->pcr_extensions[pcr_index], recv);

This is because pcr_index is initialized only if the user input is
correct, ie. at least one valid bit is set in pcr_map.

Fix the second check and also initialize pcr_index to 0 (which is
harmless in case of error) to make Coverity Scan happy.

Reported-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-08-13 14:04:04 -04:00
Ramon Fried
ce18baf911 MAINTAINERS: Add more sources to Arch Snapdragon
Add scattered driver files around the source tree
that belongs to Snapdragon arch. Not sure why they
were not included in the first place.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
2018-08-13 14:04:04 -04:00
Ramon Fried
6c1432baf2 db410c: add FIT support
1. Add FIT support for DB410c defconfig.
2. Don't overwrite bootargs (they're already
   defined in Linux device tree for DB410c.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
2018-08-13 14:04:04 -04:00
Ramon Fried
ff06dc2403 db410: alter WLAN/BT MAC address fixup
Change the way MAC address fixup is done:
1. Stop using LK handed device-tree and calculate
   the MAC address our own.
2. Allow overriding the generated MACS with environment variables:
   "wlanaddr" and  "btaddr".

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
2018-08-13 14:04:04 -04:00
Ramon Fried
e0b04a1525 snapdragon: added MAC generation functions
Add support for generation of unique MAC address
that is derived from board serial.
Algorithm for generation of MAC taken from LK.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
2018-08-13 14:04:04 -04:00
Ramon Fried
86e5e42946 snapdragon: added msm_board_serial() func
This commit adds a function to get the board
serial number.
In snapdragon it's actually the eMMC serial number.

Function added in a new file misc.c that will
include further snapdragon miscellaneous functions.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
2018-08-13 14:04:04 -04:00
Patrice Chotard
8ff21d6d9c stm32f7: board: Fix memory init
Commit 1473b12ad0 ("lib: fdtdec: Update ram_base to store ram start
adddress") brings regression on STM32F7 which can't boot.

Use fdtdec_setup_mem_size_base() to setup memory base and size.
Use fdtdec_setup_memory_banksize() to setup memory bank base and size.

Reported-by: Mark Olsson <mark@markolsson.se>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Cc: Mark Olsson <mark@markolsson.se>
Reviewed-by: Vikas Manocha <vikas.manocha@st.com>
2018-08-13 14:03:57 -04:00
Patrice Chotard
673c624cab configs: stm32f429-evaluation: Add DISTRO_DEFAULT support
Add DISTRO_DEFAULT support to be able to boot on mmc
by default on boot.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-08-13 14:03:57 -04:00
Patrice Chotard
82ec63a5a1 configs: stm32f469-discovery: Add DISTRO_DEFAULT support
Add DISTRO_DEFAULT support to be able to boot on mmc
by default on boot.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-08-13 14:03:57 -04:00
Patrice Chotard
20fc114314 configs: stm32h743-discovery: Add DISTRO_DEFAULT support
Add DISTRO_DEFAULT support to be able to boot on
mmc by default on boot.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-08-13 14:03:57 -04:00
Patrice Chotard
e2158a5fd8 configs: stm32h743-evaluation: Add DISTRO_DEFAULT support
Add DISTRO_DEFAULT support to be able to boot on mmc
by default on boot.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-08-13 14:03:57 -04:00
Patrice Chotard
e95c98182b configs: stm32f4xx: Remove CONFIG_SYS_RAM_FREQ_DIV
Since commit bfea69ad27 ("stm32f7: sdram: correct sdram
configuration as per micron sdram"), CONFIG_SYS_RAM_FREQ_DIV
flag is no more used, remove it.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-08-13 14:03:57 -04:00
Patrice Chotard
8e53ee1461 configs: stm32h7xx: Migrate CONFIG_CMD_CACHE to defconfig
Remove CONFIG_CMD_CACHE from include/configs/stm32h7xx.h
and enable it in stm32h7xx_defconfig

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-08-13 14:03:57 -04:00
Patrice Chotard
402d3db81e configs: stm32f746-disco: Migrate CONFIG_CMD_CACHE to defconfig
Remove CONFIG_CMD_CACHE from include/configs/stm32f746-disco.h
and enable it in stm32f746-disco_defconfig

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-08-13 14:03:57 -04:00
Patrice Chotard
ca38dc2ff5 configs: stm32f4xx: Enable ICACHE and DCACHE
Enable instruction and data caches.
Fix boot_sd command as since commit d409c96216 ("armv7m: disable
 icache before linux booting"), instruction cache is automatically
disable before linux booting. "icache off" from boot_sd command
becomes useless, remove it.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-08-13 14:03:57 -04:00
Patrice Chotard
042ac0881c configs: stm32f429-disco: Remove CONFIG_SYS_RAM_CS
This flag is not used, remove it.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-08-13 14:03:57 -04:00
Patrice Chotard
d91fb53903 configs: stm32fxxx: Remove CONFIG_SYS_CLK_FREQ
Since commit aa5e3e22f4 ("board: stm32: switch to DM STM32 timer")
SYS_CLK_FREQ is useless, remove it from stm32f4 and stm32f7 boards.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-08-13 14:03:57 -04:00
Patrice Chotard
725e09b823 board: stm32: use bi_dram[0].start instead of hardcoded value
Use gd->bd->bi_dram[0].start initialized from DT instead of using
hardcoded CONFIG_SYS_SDRAM_BASE from config file.

Remove unused CONFIG_SYS_RAM_BASE and CONFIG_SYS_SDRAM_BASE defines.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-08-13 14:03:57 -04:00
Eugen Hristev
e9cd3d7024 clk: at91: utmi: add timeout for utmi lock
In case the slow clock is not properly configured, the UTMI clock
cannot lock the PLL, because UPLLCOUNT will "wait X slow clock cycles".
In this case U-boot will loop indefinitely.
Added a timeout in this case, to start U-boot even if UTMI clock is
not enabled, so the user can use different media if needed, or investigate.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2018-08-13 14:03:57 -04:00
Thomas Fitzsimmons
1246040cda arm: bcm7445: Move config defines to bcm7445.h
Move some configuration #defines that do not apply to other bcmstb
boards from bcmstb.h to bcm7445.h.

Signed-off-by: Thomas Fitzsimmons <fitzsim@fitzsim.org>
2018-08-13 14:03:57 -04:00
Thomas Fitzsimmons
dc7685e2c5 arm: bcm7445: Fix parallel make race condition
Move the contents of prior_stage.h into bcmstb.h to prevent a build
failure when bcmstb.h is #include'ed before the asm/arch symbolic link
is present.

Signed-off-by: Thomas Fitzsimmons <fitzsim@fitzsim.org>
2018-08-13 14:03:57 -04:00
Caliph Nomble
7ac1a432a1 rsa: Fix LibreSSL before v2.7.0
Fix LibreSSL compilation for versions before v2.7.0.

Signed-off-by: Caliph Nomble <nomble@palism.com>
Reviewed-by: Jonathan Gray <jsg@jsg.id.au>
2018-08-13 14:03:57 -04:00
Heinrich Schuchardt
ca230b094e fs: fix typo 'dumm'
%s/dumm /dummy /

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-08-13 14:03:52 -04:00
Igor Opaniuk
7a5fbfe641 avb2.0: add get_size_of_partition()
Implement get_size_of_partition() operation,
which is required by the latest upstream libavb [1].

[1] https://android.googlesource.com/platform/external/avb/+/android-p-preview-5

Signed-off-by: Igor Opaniuk <igor.opaniuk@linaro.org>
Acked-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
2018-08-13 14:03:52 -04:00
Tom Rini
b8a1f47be3 Merge git://git.denx.de/u-boot-fsl-qoriq 2018-08-13 12:34:55 -04:00
Simon Goldschmidt
c0b4fc1a1b arm: socfpga: cyclone5: handle debug uart
If CONFIG_DEBUG_UART is enabled, correctly initialize
the debug uart before console is initialized to debug
early boot problems in SPL.

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2018-08-13 15:29:54 +02:00
Simon Goldschmidt
20905f5fa6 arm: socfpga: spl_gen5: clean up malloc_base assignment
In spl_gen5's board_init_f(), gd->malloc_base is manually assigned
at the end of the function to point to sdram.  This code is outdated
as by now, the heap is switched to sdram by the common function
spl_relocate_stack_gd() if the appropriate defines are set.

As it was, the value assigned manually was directly overwritten by
this common code, so remove the manual assignment.

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2018-08-13 15:29:54 +02:00
Simon Goldschmidt
40c36f8d49 arm: socfpga: fix SPL on gen5 after moving to DM serial
There were NULL pointers dereferenced because DM was used
too early without correct initialization:
- malloc_simple returned NULL when called from preloader_console_init()
  because gd->malloc_limit was 0
- uclass_add dereferenced gd->uclass_root members which were NULL because
  dm_init (or one of its relatives) has not been called.

All this is fixed by calling spl_early_init before calling
preloader_console_init.

This fixes commit 73172753f4 ("ARM: socfpga: Convert to DM serial")

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2018-08-13 15:29:54 +02:00
Andre Przywara
8094f0cb0c sunxi: A64: fix default DRAM_ODT_EN symbol
"default" lines in Kconfig are processed in order, the first hit will
stop considering subsequent lines. In the case of the DRAM_ODT_EN symbol
that means that everything following the first two lines will never be
checked:
------------
config DRAM_ODT_EN
	bool "sunxi dram odt enable"
	default n if !MACH_SUN8I_A23
	default y if MACH_SUN8I_A23
	default y if MACH_SUN8I_R40
	default y if MACH_SUN50I
------------

Assuming that the "default y" for the A64 and the R40 were a deliberate
choice, fix the Kconfig stanza to take this into account.
Also remove the now redundant lines from the respective defconfigs.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
[jagan: droped 'default n' on original change]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> # A64, R40
Tested-by: Chen-Yu Tsai <wens@csie.org> # A23
2018-08-13 16:47:38 +05:30
Jagan Teki
25b3d90b2c ARM: dts: sun8i: Update R40/V40 dts(i) files from Linux-v4.18-rc3
Update all R40/V40 devicetree dtsi and dtsi files from Linux-v4.18-rc3
with below commit:

R40:
commit c36fd5a48bd20820855e3e91a89297eeaa31836e
Author: Chen-Yu Tsai <wens@csie.org>
Date:   Wed May 2 00:12:25 2018 +0800

    ARM: dts: sun8i: r40: bananapi-m2-ultra: Enable GMAC ethernet controller

V40:
commit c5f0bb472795170ab5c33be12e29ce7465fb31ed
Author: Icenowy Zheng <icenowy@aosc.io>
Date:   Fri Apr 6 22:03:44 2018 +0800

    ARM: sun8i: v40: enable USB host ports for Banana Pi M2 Berry

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> # BPI-M2-Ultra, BPI-M2-Berry
2018-08-13 13:10:09 +05:30
Jagan Teki
0ca4d40cfe ARM: dts: sun8i: Update A83T dts(i) files from Linux-v4.18-rc3
Update all A83T devicetree dtsi and dtsi files from Linux-v4.18-rc3
with below commit:
commit 221cb9fd2ee3042689fe0e6613d0f34eb46a5af6
Author: Mylène Josserand <mylene.josserand@bootlin.com>
Date:   Fri May 4 21:05:44 2018 +0200

    ARM: dts: sun8i: Add enable-method for SMP support for the A83T SoC

Note: bananapi-m3 and cubietruck-plus board dts files has
usb_otg enabled in U-Boot which were not present in Linux.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-08-13 13:07:35 +05:30
Tom Rini
8fee226da3 Merge branch 'agust@denx.de' of git://git.denx.de/u-boot-staging 2018-08-11 19:49:29 -04:00
Tom Rini
282ce6454c Merge branch 'master' of git://git.denx.de/u-boot-video 2018-08-11 19:48:13 -04:00
Mario Six
7e86242b2b misc: Add gdsys_ioep driver
Add driver for the IHS IO endpoint on IHS FPGAs.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-08-11 16:00:50 +02:00
Mario Six
004e67c216 test: Add tests for misc uclass
Add a set of tests for the misc uclass.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-08-11 16:00:38 +02:00
Mario Six
440bc11f2e misc: uclass: Add enable/disable function
Add generic enable/disable function to the misc uclass.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-08-11 16:00:19 +02:00
Mario Six
3958bffeb3 misc: docs: Fix comments in misc.h
The comments in misc.h are not in kernel-doc format. Correct the format.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-08-11 16:00:09 +02:00
Mario Six
25a9f9747a video_display: Add Xilinx LogiCore DP TX
Add a driver for the Xilinx LogiCORE DisplayPort IP core, which is a
pure DP transmitter core for Xiling FPGA (no display capabilities).

Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-08-11 09:18:44 +02:00
Mario Six
77d512ff18 video: Sort Makefile entries
The entries of Makefiles should be sorted, which is not the case in the
video driver Makefile.

Sort the entries alphabetically as far as this makes sense.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-08-11 09:17:48 +02:00
Mario Six
37c4a5f6a5 cmd: Add axi command
Add a command to debug the AXI bus.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-08-11 09:16:08 +02:00
Mario Six
87940ec407 test: Add AXI test
Add tests for the AXI uclass.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-08-11 08:11:02 +02:00
Mario Six
957983e00b sandbox: Add and build AXI bus and device
Add test AXI drivers to the sandbox.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-08-11 08:10:07 +02:00
Mario Six
9a8bcabd8a axi: Add AXI sandbox driver and simple emulator
Add test infrastructure and tests for the AXI uclass.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-08-11 08:09:39 +02:00
Mario Six
9fc8706d65 axi: Add ihs_axi driver
Add a driver for the gdsys IHS AXI bus used on IHS FPGAs.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-08-11 08:08:59 +02:00
Mario Six
a63e54ab5f drivers: Add AXI uclass
Add a uclass for AXI (Advanced eXtensible Interface) busses, and a
driver for the gdsys IHS AXI bus on IHS FPGAs.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-08-11 08:07:36 +02:00
Stephen Warren
a032e0a6ae travis: give every job a name
Travis CI now supports giving jobs an explicit name. Do this for all jobs.
This allows more direct control over jobs names than the previous
automatic or implicit naming based on the environment variables or script
text.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
[trini: Update names for jobs added/changed since posting]
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-08-10 13:50:30 -04:00
Rob Bracero
2846ea81a0 elf: Add support for PPC64 ELF V1 ABI in bootelf
This update adds PPC64 ELF V1 ABI support to bootelf for both the
program header and section header options. Elf64 support was already
present for the program header option, but it was not handling the
PPC64 ELF V1 ABI case. For the PPC64 ELF V1 ABI, the e_entry field of
the elf header must be treated as function descriptor pointer instead
of a function address. The first doubleword of the function descriptor
is the function's entry address.

Signed-off-by: Rob Bracero <robbracero@gmail.com>
[trini: Fix whitespace issues]
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-08-10 13:50:15 -04:00
Ramon Fried
9beb490610 db410c: Fixup DRAM
Call the MSM DRAM detection and fixup function to support
dynamic detection of onboard memory.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
2018-08-10 13:45:35 -04:00
Ramon Fried
36adb7c9e8 snapdragon: Add DRAM detection & FDT fixup
Fixup the Linux FDT with the detection of onboard DRAM as
provided by SBL (Secondary boot loader) by reading
the shared-memory region.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
2018-08-10 13:45:35 -04:00
Sam Protsenko
8f690848b8 disk: part: Don't show redundant error message
Underlying API should already print some meaningful error message, so
this one is just brings more noise. E.g. we can see log like this:

    MMC: no card present
    ** Bad device mmc 0 **

Obviously, second error message is unwanted. Let's only print it in case
when DEBUG is defined to keep log short and clear.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
2018-08-10 13:45:34 -04:00
Sam Protsenko
13bbfb4a39 env: Don't show "Failed" error message
"Failed" error message from env_load() only clutters the log with
unnecessary details, as we already have all needed warnings by that
time. Example:

    Loading Environment from FAT... MMC: no card present
    ** Bad device mmc 0 **
    Failed (-5)

Let's only print it in case when DEBUG is defined to keep log clear.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
2018-08-10 13:45:34 -04:00
Christian Gmeiner
60a4df3262 smbios: fix checkstyle warning
Fixes the following checkstyle warning:

WARNING: Missing a blank line after declarations
+               int tmp = smbios_write_funcs[i]((ulong *)&addr, handle++);
+               max_struct_size = max(max_struct_size, tmp);

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-08-10 13:45:34 -04:00
Christian Gmeiner
5113ff8a91 smbios: fix checkstyle error
Fixes the following chechpatch -f error:

ERROR: "(foo*)" should be "(foo *)"
+               strncpy((char*)t->uuid, serial_str, sizeof(t->uuid));

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-08-10 13:45:34 -04:00
Simon Goldschmidt
fd15a9e256 doc: FIT image: clarify usage of "compression" property
Compressed images should have their compression property
set to "none" if U-Boot should leave them compressed.

This is especially the case for compressed ramdisks that
should be uncompressed by the kernel only.

Signed-off-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
2018-08-10 13:45:33 -04:00
Adam Ford
ea975fe16b configs: omap3_logic: Disable NAND ID during SPL
For these boards, the GPMC timings are more determined by
processor speed/type than the NAND/PoP memory.  This code
is never invoked, so disable the config option, so it doesn't
take the time to compile it in.

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-08-10 13:45:33 -04:00
Adam Ford
ab5814f992 configs: omap: Remove dead config CONFIG_SYS_NAND_ADDR
CONFIG_SYS_NAND_ADDR is defined and never referenced. This patch
removes the dead code.

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-08-10 13:45:33 -04:00
Heinrich Schuchardt
76a472dc44 doc: README.iscsi: make compatible with restructured text
The Sphinx documentation system uses restructured text.
Make the README.iscsi file compatible.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-08-10 13:45:32 -04:00
Heinrich Schuchardt
0445978806 doc: add structure to Sphinx generated docs
Create separate html pages for linker lists, the serial subsystem,
and the EFI subsystem.

Add a table of content.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-08-10 13:45:32 -04:00
Heinrich Schuchardt
1b04047a87 README: U_BOOT_ENV_CALLBACK functions
Describe the interface of environment variable callback functions.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-08-10 13:45:32 -04:00
Heinrich Schuchardt
938b05a5d7 drivers: serial: document on_baudrate()
Add parameter description.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-08-10 13:45:32 -04:00
Adam Ford
f43674cf82 omap3_logic: Fix CONS_INDEX
The console index for SPL should be 1 not 3 in order to see text during
SPL.

Fixes: 6f6b7cfa89 ("Convert all of CONFIG_CONS_INDEX to Kconfig")
Signed-off-by: Adam Ford <aford173@gmail.com>
2018-08-10 13:45:10 -04:00
Ran Wang
9add5a4b75 armv8: layerscape: Enable EHCI access for LS1012A
Program Central Security Unit (CSU) to grant access to USB 2.0
controller.

Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
[YS: rewrite commit message]
Reviewed-by: York Sun <york.sun@nxp.com>
2018-08-10 10:37:39 -07:00
Ran Wang
cd35855492 armv8: layerscape: move ns_dev[] define from h to c file.
Move ns_dev[] from header file to C file to avoid compiling warning
when header file is included by others.

Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
[YS: rewrite commit message]
Reviewed-by: York Sun <york.sun@nxp.com>
2018-08-10 10:36:03 -07:00
Darwin Dingel
1711add3dc mtd: nand: fsl_ifc: Fix handling of bitflips in erased pages
This is a fix made for the fsl_ifc_nand driver on linux kernel by
Pavel Machek and is applied to uboot. It is currently on applied on
linux-mtd.

https://patchwork.kernel.org/patch/9758117/

IFC always raises ECC errors on erased pages. It is only ignored when
the buffer is checked for all 0xFF by is_blank(). The problem is a
single bitflip will cause is_blank() and then mtd_read to fail. The fix
makes use of nand_check_erased_ecc_chunk() to check for empty pages
instead of is_blank(). This also makes sure that reads are made at ECC
page size granularity to get a proper bitflip count. If the number of
bitflips does not exceed the ECC strength, the page is considered empty
and the bitflips will be corrected when data is sent to the higher
layers (e.g. ubi).

Signed-off-by: Darwin Dingel <darwin.dingel@alliedtelesis.co.nz>
Cc: Pavel Machek <pavel@denx.de>
Cc: Scott Wood <oss@buserror.net>
Acked-by: Pavel Machek <pavel@denx.de>
[Kurt: Replaced dev_err by printf due to compiler warnings]
Tested-by: Kurt Kanzenbach <kurt@linutronix.de>
Signed-off-by: Kurt Kanzenbach <kurt@linutronix.de>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-08-10 10:35:51 -07:00
Laurentiu Tudor
5651f438f8 armv8: ls1046a: setup SEC ICIDs and fix up device tree
Add support for SEC ICID configuration and apply it for ls1046a.
Also add code to make the necessary device tree fixups.

Reviewed-by: Horia Geantă <horia.geanta@nxp.com>
Reviewed-by: Bharat Bhushan <bharat.bhushan@nxp.com>
Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-08-10 10:35:46 -07:00
Laurentiu Tudor
b50ff5e1b6 armv8: ls1046a: setup fman ports ICIDs and device tree
Add support for ICID setting of fman ports and the required device
tree fixups.

Reviewed-by: Bharat Bhushan <bharat.bhushan@nxp.com>
Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-08-10 10:35:42 -07:00
Laurentiu Tudor
599a97d49c armv8: ls1046a: add icid setup for qman portals
Add support for ICID setting of qman portals and the required device
tree fixups. Also fix an endiness issue in portal setup code.

Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-08-10 10:35:36 -07:00
Laurentiu Tudor
3cb4fe65f9 armv8: ls1046a: initial icid setup support
Add infrastructure for ICID setup and device tree fixup on ARM
platforms. This include basic ICID setup for several devices.

Reviewed-by: Bharat Bhushan <bharat.bhushan@nxp.com>
Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-08-10 10:35:33 -07:00
Laurentiu Tudor
703d18f7fe armv8: fsl-layerscape: add missing debug stream ID
Add a define with a value for the missing debug stream ID.

Reviewed-by: Bharat Bhushan <bharat.bhushan@nxp.com>
Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-08-10 10:35:29 -07:00
Laurentiu Tudor
92d2e89c8c misc: fsl_portals: setup QMAN_BAR{E} also on ARM platforms
QMAN_BAR{E} register setup was disabled on ARM platforms, however the
register does need to be set. Enable the code also on ARMs and fix the
CONFIG_SYS_QMAN_MEM_PHYS define to the correct value so that the newly
enabled code works.

Reviewed-by: Bharat Bhushan <bharat.bhushan@nxp.com>
Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-08-10 10:35:22 -07:00
Laurentiu Tudor
5bdfdb7d4f armv8: ls1046a: advertise QMan v3 in configuration
The QMan IP block in this SoC is version 3.2 so advertise
this in the SoC configuration header.

Reviewed-by: Bharat Bhushan <bharat.bhushan@nxp.com>
Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-08-10 10:35:11 -07:00
Laurentiu Tudor
fa0706ef92 armv8: fsl-layerscape: add missing register blocks base address defines
Add defines for the edma and qdma register block base addresses.

Reviewed-by: Bharat Bhushan <bharat.bhushan@nxp.com>
Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-08-10 10:34:42 -07:00
Troy Kisky
7e83f1d5e8 sata: fix sata_Probe return value check
sata_probe returns 1 for failure, so don't checkout for < 0

fixes: f19f1ecb60 dm: sata: Support driver model with the 'sata' command

Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-08-10 10:27:32 -04:00
Patrick Delaunay
17585e2dc3 sandbox: led: use new function to configure default state
Initialize the led with the default state defined in device tree
in board_init and solve issue with test for led default state.

Reviewed-by: Simon Glass <sjg@chromium.org>

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-08-10 10:27:32 -04:00
Patrick Delaunay
1f5118b4d3 stm32mp1: use new function led default state
Initialize the led with the default state defined in device tree.

Reviewed-by: Simon Glass <sjg@chromium.org>

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-08-10 10:27:32 -04:00
Patrick Delaunay
d7a435a2ce dm: led: move default state support in led uclass
This patch save common LED property "default-state" value
in post bind of LED uclass.
The configuration for this default state is only performed when
led_default_state() is called;
It can be called in your board_init()
or it could added in init_sequence_r[] in future.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-08-10 10:27:32 -04:00
Patrick Delaunay
1f6d81fe33 Revert "dm: led: auto probe() LEDs with "default-state""
This reverts commit bc882f5d5c.
because this patch adds the probe of LED driver during the
binding phasis. It is not allowed in driver model because
the drivers (clock, pincontrol) needed by the LED driver can
be also probed before the binding of all the device and
it is a source of problems.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-08-10 10:27:32 -04:00
Patrick Delaunay
8e1665102f stm32mp1: add gpio led support
This patch add the 4 LED available on the ED1 board and activated
gpio led driver.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-08-10 10:27:32 -04:00
Tom Rini
cdec3ea7e4 Merge branch 'master' of git://git.denx.de/u-boot-usb 2018-08-10 07:21:02 -04:00
Jagan Teki
cf68225742 clk: Kconfig: Ascending order to sub directiory kconfigs
sourcing of sub directiory kconfig files are not in
proper order, so keep them in ascending order.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
2018-08-10 11:42:35 +05:30
Tom Rini
f05ebbf47a bcm968380gerg: Add MAINTAINERS file
Add an initial MAINTAINERS file based on author of the code.

Cc: Philippe Reynes <philippe.reynes@softathome.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-08-09 11:48:39 -04:00
Tom Rini
b243f41f12 Merge git://git.denx.de/u-boot-dm 2018-08-09 11:10:41 -04:00
Tom Rini
9d17682a57 Merge branch 'master' of git://git.denx.de/u-boot-mips 2018-08-08 20:02:39 -04:00
Sam Protsenko
28a5c88043 dfu: Provide more verbose error message
It might be useful for user to see some human-readable root cause
message in addition to "configuration failed" message, so that the issue
can be fixed quickly.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
2018-08-08 22:22:08 +02:00
Sam Protsenko
87a8ca985b dfu: Fix memory leak in dfu_init_env_entities()
In case of error in dfu_init_env_entities(), env_bkp will leak. Fix it
by providing single return path.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
2018-08-08 22:22:08 +02:00
Sam Protsenko
feaa7856f5 dfu: Fix data abort in dfu_free_entities()
Commit 5d8fae7916 ("dfu: avoid memory leak") brings a regression which
described below. This patch is effectively reverting that commit, adding
corresponding comment to avoid such regressions in future.

In case of error in dfu_config_entities(), it frees "dfu" array, which
leads to "data abort" in dfu_free_entities(), which tries to free the
same array (and even tries to access it from linked list first). The
issue occurs e.g. when partition table on device does not match
$dfu_alt_info layout:

    => dfu 0 mmc 1
    Couldn't find part #2 on mmc device #1
    DFU entities configuration failed!
    data abort

To fix this issue, do not free "dfu" array in dfu_config_entities(). It
will be freed later in dfu_free_entities().

Tested on BeagleBone Black (where this regression was originally found).

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
2018-08-08 22:22:08 +02:00
Alberto Panizzo
92c7edae5e usb: rockchip: on K_FW_LBA_WRITE_10 remove magic block size of 512 bytes
As well as in K_FW_LBA_READ_10 and K_FW_LBA_ERASE_10 take device's
block size from f_rkusb->desc->blksz instead of the fixed 512 bytes.

Keep original behaviour of retry probing assigned block device on
every host request to manage late SDCard plugs.

Signed-off-by: Alberto Panizzo <alberto@amarulasolutions.com>
2018-08-08 22:22:08 +02:00
Alberto Panizzo
4f6dc4c893 usb: rockchip: fix printing csw debug info
Workstation tool was happy while console on device were printing
random numbers..

Signed-off-by: Alberto Panizzo <alberto@amarulasolutions.com>
2018-08-08 22:22:07 +02:00
Alberto Panizzo
11758a56ab usb: rockchip: be quiet on serial port while transferring data
While downloading or uploading megabytes of data we had thousands of
printf in console like:

transfer 0x10000 bytes done
OR
Uploading 0x1000 bytes

This because transfers are chunked and there is no way on target
side to know the overall transfer size (to print one string per
overall transfer).

All these prints on serial console do slow down significantly the
transfer and does not offer a significant information to the
developer: rkdeveloptool and Rockchip original tool do use small
chunks read/writes on big transfers. This allows on workstation
to print percentage of transfer complete and as well offers to
developer the information about: transfer is running OK.
On error, either the percentage will stop or an error will be shown
on workstation console.

Signed-off-by: Alberto Panizzo <alberto@amarulasolutions.com>
2018-08-08 22:22:07 +02:00
Alberto Panizzo
f68c8e827c usb: rockchip: implement K_FW_LBA_ERASE_10 command
This command is part of the write partition sequence performed by
rkdeveloptool: one partition is first completely erased and
than wrote.

Signed-off-by: Alberto Panizzo <alberto@amarulasolutions.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-08-08 22:22:07 +02:00
Alberto Panizzo
e11f9166f3 usb: rockchip: implement K_FW_LBA_READ_10 command
This patch implement reading blocks form selected device with
LBA addressing.

Corresponding command on workstation is:
rkdeveloptool rl <start_blk> <blk_cnt> <file>

While we support reading more than one blocks per K_FW_LBA_READ_10
request, rkdeveloptool and original rockchip tool do perform
chunk reads limiting the maximum size per chunk far lower
than max int values.

Signed-off-by: Alberto Panizzo <alberto@amarulasolutions.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-08-08 22:22:07 +02:00
Alberto Panizzo
e4b34a7634 usb: rockchip: implement skeleton for K_FW_GET_CHIP_VER command
Chip Version is a string saved in BOOTROM address space Little Endian.

Ex for rk3288: 0x33323041 0x32303134 0x30383133 0x56323030
which brings:  320A20140813V200

Note that memory version do invert MSB/LSB so printing the char
buffer would show: A02341023180002V

Signed-off-by: Alberto Panizzo <alberto@amarulasolutions.com>
2018-08-08 22:22:07 +02:00
Alberto Panizzo
cad66e324d usb: rockchip: fix command failed on host side due to missing data
Two consecutive rockusb_tx_write without waiting for request complete
do results in transfer reset of first request and thus no or incomplete
data transfer. This because rockusb_tx_write do use just one USB request
to keep serialization.

So calls like:
rockusb_tx_write_str(emmc_id);
rockusb_tx_write_csw(cbw->tag, cbw->data_transfer_length, CSW_GOOD);

was succeeding only when DEBUG was defined because the time spent
printing debug info was enough for transfer to complete.

This patch fixes the issue adding a simple request complete handler
called rockusb_tx_write_csw to be set as complete handler of in_req
when sending back simple payload + CSW replies to commands.

This new handler will always send CSW_GOOD replies because in case
of error the command callback itself must send back an error CSW as
unique reply to command.

This patch fixes execution of:
$ rkdeveloptool rfi
when DEBUG is not defined.

Signed-off-by: Alberto Panizzo <alberto@amarulasolutions.com>
2018-08-08 22:22:07 +02:00
Seung-Woo Kim
c194bdf226 gadget: f_thor: fix hang-up with ctrl-c
After the commit 6aae84769a ("gadget: f_thor: Fix memory leaks of
usb request and its buffer"), there is hang-up with ctrl-c in some
udc. It is because req of out_ep is freed before out_ep is disabled.
Fix hang-up with ctrl-c by disabling ep before free req of the ep.

Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
2018-08-08 22:22:07 +02:00
Pankaj Bansal
1666fa587b net: Increase ethernet name string size to 20 chars
The 16 char ethernet name size is inadequate to hold the name of ethernet
name "DPMAC17@rgmii-id", which is a valid name in LX2160AQDS/LX2160ARDB.

Therefore, increase the name string size to 20 chars.

Reported-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Suggested-by: Ioana Ciocoi Radulescu <ruxandra.radulescu@nxp.com>
Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-08-08 08:23:49 -07:00
Pankaj Bansal
c022ec039d fsl/mc: Limit the ethernet name to ETH_NAME_LEN
The ethernet name should be within the ETH_NAME_LEN, as this
is the buffer space allocated to ethernet name.

Otherwise, this causes buffer overflow.

Reported-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-08-08 08:23:49 -07:00
Joakim Tjernlund
6ce83fb3d6 FSL PCI: Configure PCIe reference ratio
Most FSL PCIe controllers expects 333 MHz PCI reference clock.
This clock is derived from the CCB but in many cases the ref.
clock is not 333 MHz and a divisor needs to be configured.

This adds PEX_CCB_DIV #define which can be defined for each
type of CPU/platform.

Signed-off-by: Joakim Tjernlund <joakim.tjernlund@infinera.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-08-08 08:23:48 -07:00
Simon Glass
41d7535cba patman: Correct unit test failure
A recent rename of the function did not rename the test file. Fix this.

Fixes: 12308b128f (lib: fdtdec: Rename routine fdtdec_setup_memory_size())

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-08-08 12:49:36 +01:00
Simon Glass
50c59522c2 libfdt: Update to latest pylibfdt implementation
The enhanced pylibfdt support in U-Boot needed for binman was a
placeholder while upstreaming of this work continued. This is now
complete, so bring in the changes and update the tools as needed.

There are quite a few changes since we decided to split the
implementation into three fdt classes instead of two.

The Fdt.del_node() method was unfortunately missed in this process and
will be dealt with later. It exists in U-Boot but not upstream.

Further syncing of libfdt probably needs to wait until we assess the
code-size impact of all the new checking code on SPL and possibly provide
a way to disable it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-08-08 12:49:36 +01:00
Bin Meng
95e11069b5 test: dm: pci: Add cases for finding PCI capability APIs
Add several PCI capability and extended capability ID registers
in the swap_case driver, so that we can add test case for
dm_pci_find_capability() and dm_pci_find_ext_capability().

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-08-08 12:49:31 +01:00
Bin Meng
dac01fd89d dm: pci: Add APIs to find capability and extended capability
This introduces two new APIs dm_pci_find_capability() and
dm_pci_find_ext_capability() to get PCI capability address and
PCI express extended capability address for a given PCI device.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-08-08 12:49:31 +01:00
Bin Meng
5d544f962f pci: Add all known capability and extended capability ids
Currently we don't have a complete list of capability and extended
capability ids. This adds them.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-08-08 12:49:31 +01:00
Bin Meng
3ed214ac9b test: dm: pci: Add tests for mixed static and dynamic devices on the same bus
In the Sandbox test configuration, PCI bus#0 only has static devices
while bus#1 only has dynamic devices. Create a bus#2 that has both
types of devices and test such.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-08-08 12:49:31 +01:00
Bin Meng
841f3216c2 pci: sandbox: emul: Rename priv structure
We have "struct sandbox_pci_priv" in pci_sandbox driver. To avoid
confusion, rename the emul's priv to "struct sandbox_pci_emul_priv".

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-08-08 12:49:31 +01:00
Bin Meng
82b3104308 test: dm: pci: Test driver binding with driver data provided
With struct pci_device_id, it's possible to pass a driver data for
bound driver to use. This adds a test case for this functionality.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-08-08 12:49:31 +01:00
Bin Meng
490d13a523 sandbox: Update test.dts for dynamic PCI device driver matching
At present we have two PCI buses in the test configuration. Both
buses have static device-tree config devices. Now we switch the
2nd bus to use dynamic PCI devices for testing.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-08-08 12:49:31 +01:00
Bin Meng
59a160e8b9 pci: sandbox: swap_case: Declare dynamic driver matching
This adds a U_BOOT_PCI_DEVICE() declaration to the swap_case driver.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-08-08 12:49:31 +01:00
Bin Meng
4345998ae9 pci: sandbox: Support dynamically binding device driver
At present all emulated sandbox pci devices must be present in the
device tree in order to be used. The real world pci uclass driver
supports pci device driver matching, and we should add such support
on sandbox too.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-08-08 12:49:31 +01:00
Bin Meng
ed698aa7de dm: pci: Assign correct driver data when binding a driver
The correct driver data comes from the matching 'id' instead of
'find_id' in pci_find_and_bind_driver().

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-08-08 12:49:31 +01:00
Bin Meng
b3f96b4f99 pci: sandbox: emul: Fix the call to pci_bus_find_devfn()
With the newly added test cases for PCI configuration access, we get:

  => ut dm pci_busdev
  Test: dm_test_pci_busdev: pci.c
  test/dm/pci.c:49, dm_test_pci_busdev(): SANDBOX_PCI_VENDOR_ID == vendor:
  Expected 4660, got 65535
  Test: dm_test_pci_busdev: pci.c (flat tree)
  test/dm/pci.c:49, dm_test_pci_busdev(): SANDBOX_PCI_VENDOR_ID == vendor:
  Expected 4660, got 65535
  Failures: 2

The bug only shows up when bus number is not equal to zero. This is
caused by the plain find_devfn parameter is passed to function call
pci_bus_find_devfn(), inside which find_devfn is compared to devfn
in the device's pplat structure. However pplat->devfn does not carry
the bus number. Fix this by passing find_devfn with bus number masked.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-08-08 12:49:31 +01:00
Bin Meng
3839b4e8b7 test: dm: pci: Add tests for configuration space access
So far we missed the testing for PCI configuration space access.
This adds tests for it, as well as removing some redundant asserts.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-08-08 12:49:31 +01:00
Bin Meng
dee4d752be test: dm: pci: Test more than one PCI host controller
So far there is only one PCI host controller in the sandbox test
configuration. This is normally the case for x86, but it can be
common on other architectures like ARM/PPC to have more than one
PCI host controller in the system.

This updates the case to cover such scenario.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-08-08 12:49:31 +01:00
Bin Meng
76330ae67d pci: sandbox: swap_case: Preserve space indicator bit in BAR registers
With the newly added testing of more than one device, we get:

  => ut dm pci_swapcase
  Test: dm_test_pci_swapcase: pci.c
  test/dm/pci.c:88, dm_test_pci_swapcase(): "tHIS IS A tESt" = ptr:
  Expected "tHIS IS A tESt", got "this is a test"
  Test: dm_test_pci_swapcase: pci.c (flat tree)
  test/dm/pci.c:88, dm_test_pci_swapcase(): "tHIS IS A tESt" = ptr:
  Expected "tHIS IS A tESt", got "this is a test"
  Failures: 2

The failure only happens on the 2nd swap_case device on the PCI bus.
The case passes on the 1st device.

It turns out the swap_case driver does not emulate bit#0 in BAR
registers as a read-only bit. This corrects the implementation.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-08-08 12:49:31 +01:00
Bin Meng
2db7f2b722 test: dm: pci: Test more than one device on the same bus
It's quite common to have more than one device on the same PCI bus.
This updates the test case to test such scenario.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-08-08 12:49:31 +01:00
Bin Meng
dd4808f9fa test: dm: pci: Remove unnecessary steps in dm_test_pci_swapcase()
The check on uclass_get_device() and device_active() is unnecessary
as the follow-up test operations will implicitly probe the driver.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-08-08 12:49:31 +01:00
Bin Meng
64e45f73bd dm: pci: Fix scanning multi-function device
The flag to control whether to scan multi-function device during
enumeration should be cleared at the beginning of each iteration
if the device's function number equals to zero.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-08-08 12:49:31 +01:00
Bin Meng
1f6b08b969 dm: pci: Extract vendor/device id in child_post_bind()
Currently only devfn is extracted in child_post_bind(). Now that
we have the live-tree version API to look up PCI vendor and device
id from the compatible string, let's extract and save them too.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-08-08 12:49:31 +01:00
Bin Meng
7b9cbaddd5 dm: core: Add ofnode function to read PCI vendor and device id
We don't have the live-tree version of fdtdec_get_pci_vendev().
This adds the API.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-08-08 12:49:31 +01:00
Bin Meng
d494131bc6 dm: Correct typos in uclass_first/next_device_check()
Correct typos in the comment block of uclass_first/next_device_check().

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-08-08 12:49:31 +01:00
Bin Meng
01259c9390 pci: Remove 440ep-specific macros
These macros should not be put in the generic pci.h header file.
Since they are not referenced anywhere, remove them completely.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-08-08 12:49:31 +01:00
Philippe Reynes
990cebf0a2 bcm968380gerg: add initial support
This add the initial support of the broadcom reference
board bcm968380gerg with a bcm68380 SoC.

This board has 512 MB of RAM, 128 MB of flash (nand),
2 USB port, 1 UART, 4 ethernet ports and BCM43217 (wifi).

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-08-08 13:38:17 +02:00
Philippe Reynes
341032d3f1 bcm6838: add initial support
This adds the initial support of the Broadcom BCM6838 SoC familly,
only cpu, dram, uart and leds are supported.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-08-08 13:38:17 +02:00
Philippe Reynes
3e4a68d32b bmips: ram: add an option to force the size of the ram
This adds an option to force the size of the ram, and
avoid the detection of ram size.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-08-08 13:34:27 +02:00
Tom Rini
481ea2e39d mips: au1x00: Remove support for these SoCs
The only platform left for the AU1x00 SoCs was the pb1x00 platform, an
apparent clone of the dbau1x00 platform.  As pb1x00 had no listed
maintainer I am assuming that it is also orphaned.  Remove this platform
and then remove the unused SoC support.

Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-08-08 13:34:27 +02:00
Tom Rini
215b4fae51 mips: dbau1x00: Remove this board
This platform has been marked as orphan since June of 2016 and should
have been removed some time ago.  Do so now.

Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-08-08 13:33:51 +02:00
Tom Rini
e966471562 configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-08-07 21:40:14 -04:00
Tom Rini
fc82e7684b Merge branch 'master' of git://git.denx.de/u-boot-samsung 2018-08-07 21:36:20 -04:00
Vinitha V Pillai
b2486b40dc Board: ls1088ardb: Enable PCIe config for Secure boot defconfigs
Signed-off-by: Vinitha V Pillai <vinitha.pillai@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-08-07 14:42:15 -07:00
Brendan Shanks
e784cf1bf2 arm: ls102xa: Fix RGMII phy-connection-type FDT fixup
In ft_fixup_enet_phy_connect_type(), use strlen() instead of sizeof()
on the pointer result of phy_string_for_interface(). sizeof() was
returning the size of the pointer (4 bytes), resulting in the
phy-connection-type being set to "rgmi" rather than "rgmii-id".

Signed-off-by: Brendan Shanks <brendan.shanks@teradek.com>
Cc: York Sun <york.sun@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-08-07 14:42:15 -07:00
Jagdish Gediya
3fa48f0a1a board: freescale: ls1012ardb: Add command to switch QSPI bank
Add command "boot_bank X" to switch the boot bank to either 1 or 2.

Signed-off-by: Jagdish Gediya <jagdish.gediya@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-08-07 14:42:15 -07:00
Tom Rini
b1aad8dbe2 zynqmp: Add avnet_ultra96_rev1_defconfig to the lits of boards
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-08-07 11:36:39 -04:00
Tom Rini
188ebc7b59 Merge tag 'xilinx-for-v2018.09-rc2' of git://git.denx.de/u-boot-microblaze
Xilinx fixes for v2018.09-rc2

xilinx:
- Add support for zybo z7 and ultra96
- Tune zynq and zynqmp mini configurations
- Move SYS_MALLOC_LEN to Kconfig

fdt
 - make static funcs

gpio:
- Fix soft gpio driver
- Fix Zynq gpio driver by using platdata

microblaze:
- Fix Kconfig entry

spi
- Move ISSI to Kconfig
2018-08-07 11:32:50 -04:00
Tom Rini
63d54c9c59 Merge git://git.denx.de/u-boot-marvell 2018-08-07 11:32:34 -04:00
Tom Rini
373413cce6 Merge branch 'master' of git://git.denx.de/u-boot-video 2018-08-07 07:15:20 -04:00
Tom Rini
cca7429ddd Merge branch 'agust@denx.de' of git://git.denx.de/u-boot-staging 2018-08-07 07:15:11 -04:00
Luis Araneda
a492fdffa3 arm: zynq: dts: add spi flash node to zedboard
Add a flash node to fix the detection of the memory IC.
With the changes introduced with commit 8fee8845e7
("enf_sf: reuse setup_flash_device instead of open coding it")
the SPI speed is now read from device-tree or a default value
is applied. This replaced the old behavior of setting the
SPI speed to CONFIG_ENV_SPI_MAX_HZ.

As this board didn't have a flash node, the default value
was applied to the SPI speed, producing an error when probing
the flash memory (speed too slow).

Signed-off-by: Luis Araneda <luaraneda@gmail.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-08-07 11:03:43 +02:00
Michal Simek
312dd1c55c gpio: xilinx: Add support for using label property
Add support for reading label property from DT and set up bank name
based on that. If label property is not present full device node name is
used.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Stefan Herbrechtsmeier <stefan@herbrechtsmeier.net>
2018-08-07 11:03:43 +02:00
Michal Simek
ac7f061398 gpio: xilinx: Return 0 from xilinx_gpio_set_value
.set_value functions have no specified return value and gpio_uclass is
not working with it too. But this patch is returning 0 to be in sync
with others DM gpio drivers.

Reported-by: Stefan Herbrechtsmeier <stefan@herbrechtsmeier.net>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Stefan Herbrechtsmeier <stefan@herbrechtsmeier.net>
2018-08-07 11:03:43 +02:00
Michal Simek
c714aeaec1 gpio: xilinx: Not read output values via regs
Reading registers for finding out output value is not working because
input value is read instead in case of tristate.

Reported-by: Stefan Herbrechtsmeier <stefan@herbrechtsmeier.net>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Stefan Herbrechtsmeier <stefan@herbrechtsmeier.net>
2018-08-07 11:03:43 +02:00
Michal Simek
cd1457d74e common: fdt: Make fdt_del_subnodes/fdt_del_partition static
These functions are only called in this file that's why make them static
to keep static analysers happy.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-08-07 11:03:43 +02:00
Michal Simek
642a860412 gpio: xilinx: Simplify logic in xilinx_gpio_set_value
There is no reason to do read/write for if/else separately.

Reported-by: Stefan Herbrechtsmeier <stefan@herbrechtsmeier.net>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Stefan Herbrechtsmeier <stefan@herbrechtsmeier.net>
2018-08-07 11:03:43 +02:00
Michal Simek
bf2a69de81 gpio: xilinx: Set value before changing direction
Set a value before changing gpio direction. This will ensure that the
old value is not propagated when direction has changed but new value is
not written yet.

Reported-by: Stefan Herbrechtsmeier <stefan@herbrechtsmeier.net>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Stefan Herbrechtsmeier <stefan@herbrechtsmeier.net>
2018-08-07 11:03:43 +02:00
Michal Simek
6f81ff0422 gpio: xilinx: Remove !DM driver
There is no user for !DM driver that's why remove it.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-08-07 11:03:43 +02:00
Michal Simek
ddd7b3fa33 gpio: xilinx: Find out bank before use in xilinx_gpio_get_function()
Call xilinx_gpio_get_bank_pin() before use.

Reported-by: Stefan Herbrechtsmeier <stefan@herbrechtsmeier.net>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Stefan Herbrechtsmeier <stefan@herbrechtsmeier.net>
2018-08-07 11:03:42 +02:00
Vladimir Vid
79a0188679 arm64: a37xx: add CONFIG_MTD_DEVICE and CONFIG_MTD_PARTITIONS
CONFIG_MTD_DEVICE is required for the mtdparts command and but it is missing from the mvebu_armada-37xx.h
CONFIG_MTD_PARTITIONS is needed for the ubi support. Some of the Marvell based devices may require this as well.

Signed-off-by: Vladimir Vid <vladimir.vid@sartura.hr>
Signed-off-by: Luka Perkov <luka.perkov@sartura.hr>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-08-07 10:53:52 +02:00
Willy Tarreau
4469bd7b53 tools: kwboot: properly quit when read() returns 0
When kwboot is attached to a terminal which disappears such as one
connected via an unplugged USB cable, read() returns 0, making kwboot
loop until a key is pressed in the terminal. The only case where read()
may return 0 here is when the terminal is closed anyway, so let's
properly handle this one and report is similar to other errors.

Signed-off-by: Willy Tarreau <w@1wt.eu>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-08-07 10:53:52 +02:00
Willy Tarreau
3475a71d4e tools: kwboot: unbreak terminal-only mode
Commit 84899e2 ("tools/kwboot: Sync with latest barebox version to
support Armada XP") accidently broke the terminal-only mode (-t) by
removing the test on the bootmsg. Thus even when trying to use kwboot
as a plain terminal, it asks to reboot the target.

This commit simply reintroduces the lost test so that it is possible
again to use kwboot to attach to the target system's console.

Signed-off-by: Willy Tarreau <w@1wt.eu>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-08-07 10:53:52 +02:00
Chris Packham
a6477f7cbc ARM: kirkwood: add SBx81LIFXCAT board
This is a series of line cards for Allied Telesis's SBx8100 chassis
switch. The CPU block is common to the SBx81GP24 and SBx81GT24 cards
cards collectively referred to as SBx81LIFXCAT in u-boot.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-08-07 10:53:52 +02:00
Jon Nettleton
14deee2081 arm: mvebu: clearfog: add u-boot, dm-spl tag for spi
This is required so SPL and u-boot can boot from spi
flash devices that use the dm drivers.

Signed-off-by: Jon Nettleton <jon@solid-run.com>
[baruch: use -u-boot.dtsi]
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-08-07 10:53:52 +02:00
Baruch Siach
69601ce003 arm: mvebu: helios4: remove duplicate sdhci pins node
The same pinctrl node appears in the solidrun-microsom dtsi. Use that
instead.

Cc: Dennis Gilmore <dennis@ausil.us>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Dennis Gilmore <dennis@ausil.us>
Tested-by: Dennis Gilmore <dennis@ausil.us>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-08-07 10:53:52 +02:00
Jon Nettleton
334eebefc2 arm: mvebu: Better align Clearfog dts file with Linux kernel
This makes changes so the u-boot dts file is structured more
similar to the mainline linux dtsi file.  It provides a minimal
common dts that can work for most boards based on the ClearFog
platform.  Ethernet support is only supported for eth0 however
all devices are left enabled so u-boot can generate and
provide mac addresses for all of the network interfaces.

Signed-off-by: Jon Nettleton <jon@solid-run.com>
[baruch: rebase on recent changes]
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Dennis Gilmore <dennis@ausil.us>
Tested-by: Dennis Gilmore <dennis@ausil.us>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-08-07 10:53:52 +02:00
Baruch Siach
a4adb1f576 arm: mvebu: clearfog: use the microsom .dtsi
Use hardware description from the recently introduced microsom .dtsi
file to reduce duplication.

Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Dennis Gilmore <dennis@ausil.us>
Tested-by: Dennis Gilmore <dennis@ausil.us>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-08-07 10:53:52 +02:00
Baruch Siach
bf3eaa3e5c arm: mvebu: solidrun-microsom: update SPI flash compatible
Add the "spi-flash" compatible string so that the generic sf_probe
driver can probe the SPI flash on the SolidRun SOM.

Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-08-07 10:53:52 +02:00
Chris Packham
b8ce90a8df configs: kirkwood: Move RTC_MV to DM and Kconfig
Now that there is DM support in the RTC_MV driver update board configs
to use it.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-08-07 10:51:19 +02:00
Chris Packham
70222a6beb configs: move RTC_MV config from mv-plug-common.h to boards
To aid in migrating CONFIG_RTC_MV to Kconfig move the definition of it
from mv-plug-common.h to the board config headers that nest it.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-08-07 10:51:19 +02:00
Chris Packham
f596efb749 configs: kirkwood: ds109: switch to DM_I2C
Enable DM_I2C and I2C_MVTSWI for the ds109 board.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-08-07 10:51:19 +02:00
Peng Fan
3d7690aec1 i2c: imx_lpi2c: add uclass api support
Use uclass clk api to get per clk when CONFIG_CLK enabled.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
2018-08-06 14:28:23 +02:00
Peng Fan
16f513ee78 i2c-mux: pca954x: support pca9646 i2c switch
Add the PCA9646 support, which is 2-wire bus switch and buffered 4-channel.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
2018-08-06 14:28:20 +02:00
Baruch Siach
4fe3f1bfdf mvebu: clearfog: use kconfig symbols to select boot device
This allows selection of the boot device at build time without source
code modification.

Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-08-06 14:07:23 +02:00
Baruch Siach
72c4e67d08 mvebu: support UART boot image
The kwboot utility can use the generated image to boot mvebu SoCs from
UART.

Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-08-06 14:07:23 +02:00
Baruch Siach
ca1a4c8632 mvebu: select boot device at SoC level
Move the gdsys Controlcenter DC specific build time kwbimage.cfg
generation code into the mach-mvebu/ directory to be shared by all 32bit
mvebu platforms.

Remove board specific kwbimage.cfg files, and use the generated one
instead. These files are all identical, with two exceptions. Clearfog
and Helios4 use the sdio boot device, whereas all others use spi. Update
the defconfigs for the exceptional boards to generate the same
kwbimage.cfg as before.

Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-08-06 14:07:23 +02:00
Baruch Siach
ad105f5f86 mvebu: consolidate SPL boot device config symbols
Use MVEBU_SPL_BOOT_DEVICE_* to select between SPI and MMC, instead of
board specific symbols. This commit enables the boot device selection
menu to all mvebu platforms, but it is only effective on Turris Omnia
and gdsys Controlcenter DC platforms. A following commit will enable
boot selection for other platforms.

Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-08-06 14:07:23 +02:00
Baruch Siach
d38f04f7c2 mvebu: a38x: drop duplicate platform id symbols
Use generic mvebu Kconfig symbols like all other mvebu boards.

Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-08-06 14:07:23 +02:00
Baruch Siach
f05062edc4 mvebu: turris_omnia: use u-boot-spl-dtb.bin
u-boot-spl.bin and u-boot-spl-dtb.bin are identical when building the
turris_omnia_defconfig. This commit makes Turris Omnia consistent with
all other mvebu boards.

Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-08-06 14:07:23 +02:00
Peng Fan
4624faadff dm: power-domain: query power domain after get device
This is to test power_domain_on in device_probe.
If the device has a power-domain property, enable it
when probe the device. So add the test to check
whether it is powered on or not.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-08-06 11:52:19 +02:00
Peng Fan
3ad3077848 dm: core: device: enable power domain in probe
Enable power domain associated with the device when probe.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-08-06 11:52:00 +02:00
Peng Fan
e13278c943 power: Add CONFIG_SPL_POWER_DOMAIN config
Add CONFIG_SPL_POWER_DOMAIN config entry.
Build drivers/power/domain if this config is selected.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-08-06 11:51:10 +02:00
Peng Fan
58d3de19bc power-domain: add dummy functions when CONFIG_POWER_DOMAIN not defined
Add dummy functions when CONFIG_POWER_DOMAIN not defined.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
2018-08-06 11:50:03 +02:00
Michal Simek
2570e12960 arm64: zynqmp: Add support for Avnet Ultra96
Avnet Ultra96 is rebranded Xilinx zcu100 revC/D. Add new defconfig files
and point to origin internal board name.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-08-06 08:44:35 +02:00
Luis Araneda
58f449676a arm: zynq: add support for the zybo z7 board
The board is manufactured by Digilent
Main features:
- Soc: XC7Z010 (Z7-10) or XC7Z020 (Z7-20)
- RAM: 1 GB DDR3L
- FLASH: 16 MB QSPI
- 1 Gbps Ethernet
- USB 2.0
- microSD slot
- Pcam camera connector
- HDMI Tx and Rx
- Audio codec: stereo out, stereo in, mic
- 5 (Z7-10) or 6 (Z7-20) Pmod ports
- 6 push-buttons, 4 switches, 5 LEDs
- 1 (Z7-10) or 2 (Z7-20) RGB LEDs

Signed-off-by: Luis Araneda <luaraneda@gmail.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-08-06 08:44:35 +02:00
Siva Durga Prasad Paladugu
01aa5b8f05 Kconfig: Move config SYS_MALLOC_LEN to Kconfig for zynq
This patch moves the the config SYS_MALLOC_LEN to
Kconfig. It will be just for Zynq arch and to do
will be for all other archs.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Vipul Kumar <vipul.kumar@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-08-06 08:44:35 +02:00
Michal Simek
d9961fa2a2 arm64: zynqmp: Enable soft gpio driver for zcu102 and zcu100
Enable soft gpio driver for zcu102 and zcu100.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-08-06 08:44:35 +02:00
Vipul Kumar
0f07257345 gpio: zynq: Used platdata structure for storing static data instead of priv
This patch used platdata structure instead of priv for storing static
information read from DT.

Signed-off-by: Vipul Kumar <vipul.kumar@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-08-06 08:44:35 +02:00
Michal Simek
8a32077ea6 microblaze: Add missing quotes around XILINX_MICROBLAZE0_HW_VER
This issue is reported by kconfiglib:
warning: style: quotes recommended around default value for string
symbol XILINX_MICROBLAZE0_HW_VER (defined at
board/xilinx/microblaze-generic/Kconfig:37)

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-08-06 08:44:35 +02:00
Michal Simek
df09969070 arm: zynq: Fix indentation for zynq-cse targets
Trivial DT style fixes.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-08-06 08:44:35 +02:00
Michal Simek
7996fcca9d arm: zynq: Remove fclk-enable property for cse-nor target
Mini cse NOR configuration is running without PL that's why there is no
reason to enable clock to PL.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-08-06 08:44:35 +02:00
Michal Simek
92226b5a6d arm: zynqmp: Fix sdhci clock in emmc1 mini configuration
Add missing clocks property with fix clock-names property to be aligned
with emmc0 configuration and binding doc.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-08-06 08:44:35 +02:00
Michal Simek
9410bb50a8 arm: zynqmp: Move NR_DRAM_BANKS for mini confiration
There is no reason to have the same setting in subsequent config if we
can have it only once in shared.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-08-06 08:44:35 +02:00
Michal Simek
13f451bf56 spi: Kconfig: Create ISSI Kconfig entry
Add ISSI to Kconfig to make it selectable via menuconfig.
Also convert all current platforms.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-08-06 08:44:35 +02:00
Minkyu Kang
972d8576d2 arm: spring: fix alias of mmc correctly
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2018-08-06 11:24:48 +09:00
Minkyu Kang
2f43135551 arm: exynos5: fix warning of dts
remove this warning: avoid_unnecessary_addr_size

Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2018-08-06 11:24:45 +09:00
Minkyu Kang
8d93a31014 arm: exynos4: fix warning of dts
remove this warning: avoid_unnecessary_addr_size

Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2018-08-06 11:24:42 +09:00
Lukasz Majewski
0acdb2cc8a ARM: Odroid XU3: Modify exynos dw_mmc driver to support Odroid XU3 in DM MMC
This commit enables support for Exynos Designware MMC driver based on DM.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Tested-by: Anand Moon <linux.amoon@gmail.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2018-08-06 10:53:53 +09:00
Lukasz Majewski
7c350a2a0f ARM: Odroid XU3: Fix the dwmci_exynos *priv data assignment for DM_MMC (sdr_timing)
By convention for DM_MMC the host->priv is used to store struct udevice
*dev pointer.

Unfortunately, the legacy Exynos DW MMC code uses this field to
store pointer to dwmci_exynos_priv_data struct
Hence, we do need to get data in other way - namely by using container_of
when host pointer is present.
In this way the sdr_timing data is properly accessed.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Tested-by: Anand Moon <linux.amoon@gmail.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2018-08-06 10:53:53 +09:00
Lukasz Majewski
54a1352a0d ARM: Odroid XU3: MAINTAINERS: Add a co-maintainer for OdroidXU3
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Tested-by: Anand Moon <linux.amoon@gmail.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2018-08-06 10:53:53 +09:00
Lukasz Majewski
a61a4a1db0 ARM: Odroid XU3: Adjust BOOT_TARGET_DEVICES to allow booting from SD card (mmc2)
This change is necessary to allow booting the Odroid XU3 from SD card
after enabling the DM_MMC support.

After this change the SD card mmc IP block is correctly enumerated as mmc2
(and not as mmc1 as in the legacy code).

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Tested-by: Anand Moon <linux.amoon@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2018-08-06 10:53:53 +09:00
Lukasz Majewski
30373ef0a1 ARM: Odroid XU3: Fix autoboot.cmd to use ${mmcbootdev} instead of hardcoded 0
This commit adjusts the autoboot.cmd file to use ${mmcbootdev} instead of
hardcoded value 0.

This is necessary to allow booting this board from the SD card.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Tested-by: Anand Moon <linux.amoon@gmail.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2018-08-06 10:53:53 +09:00
Lukasz Majewski
44601dbd89 ARM: Odroid XU3: Enable driver model support for MMC (DM_MMC)
This commit enables support for DW_MMC running with driver model.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Tested-by: Anand Moon <linux.amoon@gmail.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2018-08-06 10:53:53 +09:00
Lukasz Majewski
f68eb41cfa ARM: Odroid XU3: config: Disable SDHCI support in the Odroid XU3
The Exynos5422 is solely using DW MMC IP block to support eMMC/SD devices,
hence the SDHCI code doesn't need to be compiled it.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Tested-by: Anand Moon <linux.amoon@gmail.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2018-08-06 10:53:53 +09:00
Lukasz Majewski
b88c1efadb ARM: dw_mmc: Exclude dwmci Exynos priv_data allocation from exynos_dwmci_get_config()
This commit prevents memory leak when this function is used with DM_MMC
as the struct dwmci_exynos_priv_data is already allocated by DM.

It is necessary for NON DM aware devices to allocate this struct first.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Tested-by: Anand Moon <linux.amoon@gmail.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2018-08-06 10:53:53 +09:00
Tom Rini
bb694d4e89 Merge branch 'master' of git://git.denx.de/u-boot-spi 2018-08-04 19:41:43 -04:00
Tom Rini
0cba6e906a Merge branch 'master' of git://git.denx.de/u-boot-sunxi 2018-08-04 19:41:30 -04:00
Neil Armstrong
d64caaf77d clk: clk_set_default: accept no-op skip fields
The Assigned Clock parents and rates misses the fact that a "0" entry can
be passed to skip setting a parent or rate of an assigned clock as
described in the Linux clock bindings at [1].

This patch simply skips the clock reparenting if the DT parsing returns
-ENOENT and the clock rate setting if "0" is passed as clock rate.

[1] https://github.com/torvalds/linux/blob/master/Documentation/devicetree/bindings/clock/clock-bindings.txt#L135

Fixes: f4fcba5c5b "clk: implement clk_set_defaults()"
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-08-04 14:50:10 -04:00
Lukasz Majewski
314d3acd4d mailmap: Update mail address (lukma)
Update my e-mail address from samsung.com to denx.de

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2018-08-04 14:50:10 -04:00
Patrice Chotard
11c1b55827 ARM: dts: stm32: remove cd-inverted for stm32429i-eval
As cd-inverted property is no more used by arm_pl180_mmci driver,
remove it. Update cd-gpios active level accordingly.

Reported-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-08-03 19:53:54 -04:00
Patrice Chotard
fa91156165 mmc: arm_pl180_mmci: Remove cd_inverted host's struct field
As platform uses GPIOs for card detection, it's
simpler and more readable to use GPIO_ACTIVE_(LOW|HIGH)
in the gpio flags instead of using the cd-inverted
property.

Reported-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-08-03 19:53:54 -04:00
Patrice Chotard
43d36a0bae mmc: arm_pl180_mmci: Add missing clk_free
Add missing clk_free() call in case of failure
when enabling the clock.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-08-03 19:53:54 -04:00
Patrice Chotard
8015093874 mmc: arm_pl180_mmci: Update to support CONFIG_BLK
Config flag CONFIG_BLK becomes mandatory, update arm_pl180_mmci
to support this config.

This driver is used by STM32Fx and by Vexpress platforms.
Only STM32Fx are DM ready. No DM code is isolated and will be
removed easily when wexpress will be converted to DM.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-08-03 19:53:54 -04:00
Patrice Chotard
d78bc42801 configs: stm32f469-disco: Enable CONFIG_BLK
CONFIG_BLK config flag becomes mandatory, enable it.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-08-03 19:53:54 -04:00
Patrice Chotard
bfe24ae2f2 configs: stm32f746-disco: Enable CONFIG_BLK
CONFIG_BLK config flag becomes mandatory, enable it.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-08-03 19:53:54 -04:00
Patrice Chotard
69a8f4d273 configs: stm32f429-evaluation: Enable CONFIG_BLK
CONFIG_BLK config flag becomes mandatory, enable it.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-08-03 19:53:54 -04:00
Tom Rini
8e0d51f80a docproc: Remove
Now that we have moved to Sphinx documentation we don't need the docproc
app anymore, remove.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-08-03 19:53:54 -04:00
Alex Kiernan
fe9805fc7f bootcount: Fix misaligned cache operation
1947c2d2a0 introduces cache line flushes for the bootcounter, but if
the start address is not aligned then the flush causes warnings of
the form:

  CACHE: Misaligned operation at range [4030b7fc, 4030b83c]

Align both the start and end of the buffer (possibly crossing multiple
lines).

Fixes: 1947c2d2a0 ("bootcount: flush after storing the bootcounter")
Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
Acked-by: Stefano Babic <sbabic@denx.de>
2018-08-03 19:53:54 -04:00
Andre Przywara
1416e2d225 armv8: make SPL exception vectors optional
Even though the exception vector table is a fundamental part of the ARM
architecture, U-Boot mostly does not make real use of it, except when
crash dumping. But having it in takes up quite some space, partly due to
the architectural alignment requirement of 2KB. Since we don't take special
care of that, the compiler adds a more or less random amount of padding
space, which increases the image size quite a bit, especially for the SPL.

On a typical Allwinner build this is around 1.5KB of padding, plus 1KB
for the vector table (mostly padding space again), then some extra code
to do the actual handling. This amounts to almost 10% of the maximum image
size, which is quite a lot for a pure debugging feature.

Add a Kconfig symbol to allow the exception vector table to be left out
of the build for the SPL.
For now this is "default y" for everyone, but specific defconfigs,
platforms or .config files can opt out here at will, to mitigate the code
size pressure we see for some SPLs.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2018-08-03 19:53:54 -04:00
Andre Przywara
15b6184971 armv8: Reduce exception handling code
The arm64 exception handling code is quite big, mostly due to
architectural alignment requirements. Each exception entry spans 32
instructions, which sounds generous, but is too small to fit all of the
save/branch/restore code in there. So at the moment we use only four
instructions, branching into shared save and restore routines.
To not leave the space for those remaining 28 instructions wasted, let's
split the save and restore routines and stuff them into the gaps.
This saves about 250 bytes of code, which is helpful for those tight
SPLs.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2018-08-03 19:53:54 -04:00
Adam Ford
bdaf24f8a5 ti_omap3_common: Add CONFIG_SYS_NS16550_COMx entries
Several boards do not use the default UART3, so they do a check
for ifdef CONFIG_SPL_BUILD and enable the pointer for
CONFIG_SYS_NS16550_COMx to point to OMAP34XX_UARTx.

Let's consoldate this all into one place, and remove them from the
individual boards.

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-08-03 19:53:54 -04:00
Fabrice Gasnier
91570b5d0b configs: stm32mp15: enable ADC
Enable ADC on stm32mp15.
- CONFIG_CMD_ADC
- CONFIG_STM32_ADC

Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-08-03 19:53:28 -04:00
Fabrice Gasnier
a466ecec48 adc: Add driver for STM32 ADC
This patch adds support for STMicroelectronics STM32 ADC (analog to
digital converter). It's originally based on Linux kernel v4.18-rcs
drivers/iio/adc/stm32-adc*. It's composed of:
- core driver (UCLASS_SIMPLE_BUS) manages common resources (clk, regu).
- child drivers (UCLASS_ADC) declare each ADC, channels and handle
  conversions.
This driver currently supports STM32H7 and STM32MP1 ADC.

Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-08-03 19:53:10 -04:00
Fabrice Gasnier
fb4e674a4b dt-bindings: Document STM32 ADC DT bindings
This patch adds documentation of device tree bindings for the STM32 ADC.
It's based on linux-v4.18-rc* dt-bindings, at the time of writing:
- Documentation/devicetree/bindings/iio/adc/st,stm32-adc.txt

Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-08-03 19:53:10 -04:00
Fabrice Gasnier
a4a87f7b74 dm: adc: uclass: get reference regulator once
device_get_supply_regulator() only needs to be called once.
But each time there's call to adc_vxx_value() for instance, it calls
adc_vxx_platdata_update() -> device_get_supply_regulator().

So, move device_get_supply_regulator() to pre_probe() routine.

This also allows vdd_supply/vss_supply to be provided directly from
uc_pdata, e.g dt-binding variant like stm32-adc provide its own
'vref-supply'.

Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-08-03 19:53:10 -04:00
Fabrice Gasnier
1fe243a1e4 clk: add clk_valid()
Add clk_valid() to check for optional clocks are valid.
Call clk_valid() in test/dm/clk.c and add relevant test routine to
sandbox clk tests.

Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-08-03 19:53:10 -04:00
Michal Simek
14aa210c1d kconfig: Replace spaces with tabs
Trivial Kconfig cleanup. Use tabs instead of spaces.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
2018-08-03 19:53:10 -04:00
Koen Kooi
ad6054f1fe Add Beaglebone Enhanced support
The "Beaglebone Enhanced" by Sancloud is based on the Beaglebone Black,
but with the following differences:

 * Gigabit capable PHY
 * Extra USB hub, optional i2c control
 * lps3331ap barometer connected over i2c
 * MPU6050 6 axis MEMS accelerometer/gyro connected over i2c
 * 1GiB DDR3 RAM
 * RTL8723 Wifi/Bluetooth connected over USB

Signed-off-by: Koen Kooi <koen@dominion.thruhere.net>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-08-03 19:53:01 -04:00
Tom Rini
a30691a538 Merge git://git.denx.de/u-boot-dm 2018-08-03 10:08:13 -04:00
Stefan Mavrodiev
7f25d81797 arm: sunxi: Allwinner A10 SPI driver
Add spi driver for sun4i, sun5i and sun7i SoCs. The driver is
adapted from mailine kernel.

Signed-off-by: Stefan Mavrodiev <stefan@olimex.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-08-03 11:14:08 +05:30
Chris Packham
4f4dde0a62 spi: kirkwood: add orion-spi compatible string
This matches the compatible string used by the Linux kernel. This will
allow u-boot to use the same device tree files.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
[jagan: use armada instead of orion on .data]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-08-03 11:14:02 +05:30
Jagan Teki
f5ff46f6e5 spi: kirkwood: Get drvdata in .ofdata_to_platdata
Get the is_errata_50mhz_ac in .ofdata_to_platdata, and
reuse it in .set_mode this can eventually initialized
dt code at once and adding room to add platdata.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-08-03 11:09:53 +05:30
Clément Laigle
04d57b1d58 mtd: add spi flash id s25fl128l
Add support for SPANSION s25fl128l

Signed-off-by: Clément Laigle <c.laigle@catie.fr>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
[jagan: fixed , at the end of } ]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-08-03 11:09:53 +05:30
Stephen Warren
a839c3641e ARM: tegra: align carveout size
Align the size of the carveout region to 2M. This ensures that the size
can be accurately represented by an LPAE page table that uses sections.

This solves a bug (hang at boot time soon after printing the DRAM size)
that only shows up when the following two commits are merged together:
d32e86bde8 ARM: HYP/non-sec: enable ARMV7_LPAE if HYP mode is supported
6e584e633d ARM: tegra: avoid using secure carveout RAM

Cc: Mark Kettenis <kettenis@openbsd.org>
Cc: Alexander Graf <agraf@suse.de>
Acked-by: Tom Warren <twarren@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2018-08-01 20:06:10 -04:00
Simon Glass
cee02e6ff4 binman: Adjust _GetPropTree() parameters
At present this function takes a filename, but it is better to use an Fdt
object so that the caller can control this, perhaps obtainint the device
tree from a bytearray. Update the method accordingly and also fix a
confusing parameter name.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-08-01 16:30:48 -06:00
Simon Glass
15a587c9ce binman: Add a test to catch use of the old 'pos' property
This property has been changed to 'offset'. To help downstream users who
might still be using 'pos', add a check that this is not used by mistake.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-08-01 16:30:48 -06:00
Simon Glass
7e7c587760 binman: Rename ReadContents() to ReadBlobContents()
This function name is too generic for its purpose and is therefore
confusing. It actually only applies to blobs, so rename it to indicate
this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-08-01 16:30:48 -06:00
Simon Glass
1be70d20d8 binman: Show the image position in the map
At present the map only shows the offset and size for each region. The
image position provides the actual position of each entry in the image,
regardless of the section hierarchy.

Add the image position to the map.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-08-01 16:30:48 -06:00
Simon Glass
b8ef5b6bc8 binman: Add support for adding TPL binaries
Add support for U-Boot's TPL and TPL device tree. Also fix a few comments
in the other device-tree entries.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-08-01 16:30:48 -06:00
Simon Glass
24d0d3c30d binman: Add an entry for a Chromium vblock
This adds support for a Chromium verified boot block, used to sign a
read-write section of the image.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-08-01 16:30:48 -06:00
Simon Glass
94a7c603b4 dtoc: Add a function to obtain a list of phandles
Add a function which can decode a property containing a list of phandles.
This is useful for finding nodes linked to a property. Also provide a way
to look up a single phandle and get the Fdt object from a Node.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-08-01 16:30:48 -06:00
Simon Glass
4f5dea4543 patman: Show the current directory in GetInputFilename()
When this fails it is useful to see the current directory, since U-Boot's
build system will typically change into the output directory during the
build. Add this information to the error.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-08-01 16:30:48 -06:00
Simon Glass
0ef87aa332 binman: Add support for Chromium GBB
This entry contains a Google Binary Block, used to store keys and bitmaps
in a Chromium image.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-08-01 16:30:48 -06:00
Simon Glass
aeffc5e956 patman: Add a few more helpers to the tools library
Add functions to read and write a file, looking through a list of search
paths to find it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-08-01 16:30:48 -06:00
Simon Glass
2b19321ef9 patman: Allow test commands to fall back to real ones
Tests use the 'test_result' feature to return a predetermined command
result for particular commands. The avoids needing to have the real
command available just to run a test. It works by calling the function
provided by the test, to get the value.

However sometimes the test does need to run the real command. Allow it to
fall back to do this when the function does not return a result.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-08-01 16:30:48 -06:00
Simon Glass
1d85888cdc dtoc: Export the _FindNode() function
This is useful for clients that want to find a node. Export it so it can
be used by others.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-08-01 16:30:48 -06:00
Simon Glass
3af8e49cef binman: Add an entry filled with a repeating byte
It is sometimes useful to have an area of the image which is all zeroes,
or all 0xff. This can often be achieved by padding the size of an an
existing entry and setting the pad byte for an entry or image.

But it is useful to have an explicit means of adding blocks of repeating
data to the image. Add a 'fill' entry type to handle this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-08-01 16:30:48 -06:00
Simon Glass
ec127af042 binman: Add support for a cros_ec image
Add an entry type which can hold a Chrome OS EC.

To make this work a new entry type is created, which supports getting a
blob filename from the command line.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-08-01 16:30:48 -06:00
Simon Glass
11e36ccea1 binman: Add support for flashrom FMAP
Add an entry which can hold an FMAP region as used by flashrom, an
open-source flashing tool used on Linux x86 machines. This provides a
simplified non-hierarchical view of the entries in the image and has a
signature at the start to allow flashrom to find it in the image.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-08-01 16:30:48 -06:00
Simon Glass
5a5da7ce15 binman: Create README.entries
Create a new README containing documentation for the entry types supported
by binman. This provides an easy reference in one place. It is
automatically generated from the source-code documentation.

Add a reference to this from the binman README.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-08-01 16:30:48 -06:00
Simon Glass
fd8d1f7962 binman: Allow creation of entry documentation
Binman supports quite a number of different entries now. The operation of
these is not always obvious but at present the source code is the only
reference for understanding how an entry works.

Add a way to create documentation (from the source code) which can be put
in a new 'README.entries' file.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-08-01 16:30:48 -06:00
Simon Glass
3fb397bba0 binman: Expand documentation for entries
At present only the more complex entries are documented. It is useful to
have documentation for all entries in one place.

As a first step, add and expand the documentation to cover all entries.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-08-01 16:30:48 -06:00
Simon Glass
9b1a804d52 binman: Allow help to work without libfdt
At present binman needs libfdt.py to be available before it will do
anything, even print help. Import those modules later to avoid this, as it
is bad practice to fail to even show help on startup.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-08-01 16:30:47 -06:00
Simon Glass
bb74837c9a binman: Support an entry that holds text
It is useful to able to write an identifying string to the image within an
entry. Add a 'text' entry type to handle this. The actual text is
typically passed to binman on the command line. The text is not itself
nul-terminated but this can be achieved if required by setting the size of
the entry to something larger than the text.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-08-01 16:30:47 -06:00
Simon Glass
53af22a995 binman: Add support for passing arguments to entries
Sometimes it is useful to pass binman the value of an entry property from
the command line. For example some entries need access to files and it is
not always convenient to put these filenames in the image definition
(device tree).

Add a -a option which can be used like this:

   -a<prop>=<value>

where

   <prop> is the property to set
   <value> is the value to set it to

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-08-01 16:30:47 -06:00
Simon Glass
dc08ecc90c dtoc: Add missing comments to fdt_util
This module has a few missing comments. Add them.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-08-01 16:30:47 -06:00
Simon Glass
dbf6be9f7f binman: Add a new 'image-pos' property
At present each entry has an offset within its parent section. This is
useful for figuring out how entries relate to one another. However it
is sometimes necessary to locate an entry within an image, regardless
of which sections it is nested inside.

Add a new 'image-pos' property to provide this information. Also add
some documentation for the -u option binman provides, which updates the
device tree with final entry information.

Since the image position is a better symbol to use for the position of
U-Boot as obtained by SPL, update the SPL symbols to use this instead of
offset, which might be incorrect if hierarchical sections are used.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-08-01 16:30:45 -06:00
Simon Glass
8122f3967f binman: Enhance the map and fdt-update output
At present the .map file produced for each image does not include the
overall image size. This is useful information.

Update the code to generate it in the .map file as well as the updated
FDT. Also fix a few comments while we are here.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-08-01 16:30:07 -06:00
Simon Glass
ea6922e3d6 binman: Tidy up some comments in the tests
A few lines are commented out and can be removed. Also fix return-value
docs for _DoReadFile() and _DoReadFileDtb().

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-08-01 16:30:07 -06:00
Simon Glass
b2b0df8f39 binman: Add comments to elf_test
The purpose of some of the tests is not obvious from the function names.
Add a few comments to help with understanding.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-08-01 16:30:07 -06:00
Simon Glass
3ab9598df7 binman: Rename 'position' to 'offset'
After some thought, I believe there is an unfortunate naming flaw in
binman. Entries have a position and size, but now that we support
hierarchical sections it is unclear whether a position should be an
absolute position within the image, or a relative position within its
parent section.

At present 'position' actually means the relative position. This indicates
a need for an 'image position' for code that wants to find the location of
an entry without having to do calculations back through parents to
discover this image position.

A better name for the current 'position' or 'pos' is 'offset'. It is not
always an absolute position, but it is always an offset from its parent
offset.

It is unfortunate to rename this concept now, 18 months after binman was
introduced. However I believe it is the right thing to do. The impact is
mostly limited to binman itself and a few changes to in-tree users to
binman:

   tegra
   sunxi
   x86

The change makes old binman definitions (e.g. downstream or out-of-tree)
incompatible if they use the 'pos = <...>' property. Later work will
adjust binman to generate an error when it is used.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-08-01 16:30:06 -06:00
Simon Glass
46d61a2f2a binman: Don't depend on dict order in ELF testOutsideFile()
At present this test assumes that the symbols are returned in address
order. However, objdump can list symbols in any order and dictionaries do
not guarantee any particular order when iterating through item.

Update elf.GetSymbols() to return an OrderedDict, sorted by address, to
avoid any problems.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-08-01 16:27:28 -06:00
Yannick Fertré
28576f8182 dm: panel: get timings from panel
Get timings from panel instead of read device tree.

Signed-off-by: Yannick Fertré <yannick.fertre@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-08-01 18:03:58 +02:00
Tom Rini
61523dde17 Merge tag 'arc-updates-for-2018.09-rc2' of git://git.denx.de/u-boot-arc
That's a set of prety minor changes and fixes for ARC.

Among them:
 * Improvement in CREG GPIO driver used on ARC dev boards
   that allow us to re-use the driver for SPI's chip select

 * Enable SPI-flsh on AXS10x boards which allows to update
   U-Boot binary that gets loaded by boot-ROM

 * Fix accommodating always utilized unaligned access by
   GCC for ARC starting from 8.1.0
2018-08-01 09:26:15 -04:00
Luis Araneda
ba71ab8246 video: kconfig: remove DM_I2C dependency of I2C_EDID
Drop the DM_I2C dependency, as the library only implements
the parsing of EDID data and doesn't depend on any driver

One user of this library, the i2c command, implements
support for legacy and DM I2C drivers

Tested on a Zynq board, whose I2C driver is not ported
yet to DM

Signed-off-by: Luis Araneda <luaraneda@gmail.com>
2018-08-01 14:45:14 +02:00
Tom Rini
20a619c617 Merge git://git.denx.de/u-boot-mpc85xx 2018-07-31 20:01:30 -04:00
Tom Rini
ae5afc3720 .travis.yml: Exclude openrd platforms
The openrd platforms are currently orphaned, and are constantly on-edge
or overflowing their binary limit.  Exclude them from travis for now.

Cc: Vagrant Cascadian <vagrant@debian.org>
Cc: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-07-31 19:58:23 -04:00
Tom Rini
d150d6131c .travis.yml: Exclude kirkwood machines from the arm926ejs job
We have a specific job for kirkwood platforms so exclude them from this
job.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-07-31 19:58:23 -04:00
Tom Rini
e93db9b6ca openrd: Mark as Orphaned
After talking with Albert, mark these boards as orphaned as he no longer
has one.

Cc: Albert ARIBAUD <albert-u-boot@aribaud.net>
Cc: Vagrant Cascadian <vagrant@debian.org>
Cc: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-07-31 19:58:22 -04:00
Tom Rini
781e8f6cb1 ls1046ardb: Add qspi_spl variant to the MAINTAINERS file
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-07-31 14:53:18 -04:00
Tom Rini
275906dc1b pico-pi: Add Otavio as maintainer
Update the MAINTAINERS file to list Otavio Salvador as the maintainer
for this board.

Acked-by: Otavio Salvador <otavio@ossystems.com.br>
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-07-31 14:47:01 -04:00
Michal Simek
b3815fc4e5 dm: Fix CMD_DM enabling
The patch "dm: Change CMD_DM enabling"
(sha1: 08a00cba06) was incorrectly updated
and PICO_IMX7D is missing imply CMD_DM and WARP7 has it twice.
This patch is fixing it.

Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-07-31 14:46:22 -04:00
Ran Wang
9dcb9d763d Revert "powerpc/T104xRDB: Fix endian access issue on EHCI intinalization"
There was an EHCI endian accessor issue. Now it's fixed by commit
9829ce2ff2 ("usb: ehci: Fix accessors for big-endian platforms and
descriptors"). Revert commit e6a727fffe ("powerpc/T104xRDB: Fix
endian access issue on EHCI intinalization"). On T104x platform,
USB EHCI register use little endian.

Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
[YS: revised commit message]
Reviewed-by: York Sun <york.sun@nxp.com>
2018-07-31 10:19:42 -07:00
Ran Wang
9a21dc3726 Revert "powerpc/p1_p2_rdb_pc: Fix endian access issue on EHCI intinalization"
There was an EHCI endian accessor issue. Now it's fixed by commit
9829ce2ff2 ("usb: ehci: Fix accessors for big-endian platforms and
descriptors"). Revert commit 0f2296bab1 ("powerpc/p1_p2_rdb_pc:
Fix endian access issue on EHCI intinalization"). On P1 P2 platforms,
USB EHCI register use little endian.

Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
[YS: revised commit message]
Reviewed-by: York Sun <york.sun@nxp.com>
2018-07-31 10:17:18 -07:00
Jagan Teki
89a897fc4d board: sun50i: h6: Add OrangePi One Plus initial support
OrangePi One Plus is Allwinner H6 based open-source SBC,
which support:
- Allwinner H6 Quad-core 64-bit ARM Cortex-A53
- GPU Mali-T720
- 1GB LPDDR3 RAM
- AXP805 PMIC
- 1Gbps GMAC via RTL8211
- USB 2.0 Host, OTG
- HDMI port
- 5V/2A DC power supply

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-07-31 20:50:01 +05:30
Mylène Josserand
850bdafa50 mtd: nand: sunxi: Return on set_feature only when not ENOTSUPP
Return the error code of the set_features function only if
the error code is not ENOTSUPP. Otherwise, if this function
is not supported, it will return and fail to initialize the
NAND.

Signed-off-by: Mylène Josserand <mylene.josserand@bootlin.com>
Acked-by: Jagan Teki <jagan@openedev.com>
2018-07-31 20:45:50 +05:30
Mylène Josserand
cbe9ea26e3 mtd: nand: nand_base: Convert EINVAL into ENOTSUPP
Convert the EINVAL error into ENOTSUPP when the GET/SET_FEATURES
is not supported.

Signed-off-by: Mylène Josserand <mylene.josserand@bootlin.com>
Acked-by: Jagan Teki <jagan@openedev.com>
2018-07-31 20:45:42 +05:30
Jagan Teki
3362094733 configs: sunxi: Drop CONFIG_SUNXI_USB_PHYS
Now number of PHY on Allwinner is handling via dt data,
drivers at phy/allwinner/phy-sun4i-usb.c

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
2018-07-31 11:43:07 +05:30
Jagan Teki
69aa1b234e phy: sun4i-usb: Update PHY#3 rst_mask only for H3_H5
Only H3 and H5 have 4 PHYS so restrict rst_mask only for them
by checking PHY id as 3 and update the proper bits.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
2018-07-31 11:41:49 +05:30
Jagan Teki
52185b094d phy: sun4i-usb: Remove usb_clk_cfg set in probe
usb_clk_cfg is setting CTRL_PHYGATE bit value in probe
which is BIT 0 for sun4i, 6i and 8 for a83t but all
these were handling in phy ops init exit calls.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
2018-07-31 11:41:45 +05:30
Jagan Teki
0bfcb47aa0 phy: sun4i-usb: Call phy_passby even for PHY#0
On newer Allwinner SoC, there is a pair of EHCI/OHCI USB hosts
for OTG host mode. USB PHY passby must be configured for its
corresponding PHY. so we can call for PHY#0. on the other hand
in past usb-phy code the same thing can be restricted for
Lower SoC's, other than H3/H5/A64.

Now there is no need to restrict usb passby since the phy driver
is DT enabled, and the respective phy calls will trigger based
DT information initiated by the drivers.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
2018-07-31 11:41:41 +05:30
Icenowy Zheng
b29712e941 video: sunxi: de2: fix SimpleFB node creation when DE2 not probed
Sometimes when a monitor without EDID information is plugged, the DE2
won't be probed (because of lack of timing information), but the HDMI
node is probed, thus a SimpleFB node with invalid information will be
populated.

Also detect whether DE2 is probed when creating SimpleFB node.

Fixes: be5b96f0e4 ("sunxi: setup simplefb for Allwinner DE2")
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Acked-by: Jagan Teki <jagan@openedev.com>
2018-07-31 11:39:47 +05:30
Icenowy Zheng
a8407b5642 sunxi: add support for Pine H64 board
Pine H64 is a SBC with Allwinner H6 SoC produced by Pine64. It features
1GiB/2GiB/4GiB(3GiB usable) DRAM, two USB 2.0 ports, one USB 3.0 port
and a mPCIE slot.

Add support for it.

The device tree is from Linux next-20180720.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
2018-07-31 11:38:13 +05:30
Icenowy Zheng
6f796a9bb4 sunxi: add support for Allwinner H6 SoC
Allwinner H6 is a new SoC from Allwinner features USB3 and PCIe
interfaces.

This patch adds support for it.

The corresponding DTSI file, from Linux next-20180720, is also
introduced.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
2018-07-31 11:38:13 +05:30
Icenowy Zheng
da2616543a sunxi: add DRAM support to H6
The Allwinner H6 SoC comes with a set of new DRAM controller+PHY combo.
Both the controller and the PHY seem to be originate from DesignWare,
and are similar to the ones in ZynqMP SoCs.

This commit introduces an initial DRAM driver for H6, which contains
only LPDDR3 support. The currently known SBCs with H6 all come with
LPDDR3 memory, including Pine H64 and several Orange Pi's.

The BSP DRAM initialization code is closed source and violates GPL. Code
in this commit is written by experimenting, referring the code/document
of other users of the IPs (mainly the ZynqMP, as it's the only found PHY
reference) and disassebling the BSP blob.

Thanks for Jernej Skrabec for review and fix some issues in this driver
(including the most critical one which made it to work), and rewrite
some code from register dump!

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Acked-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
2018-07-31 11:38:13 +05:30
Icenowy Zheng
42956f1b85 sunxi: add MMC support for H6
The Allwinner H6 SoC has 3 MMC controllers like the ones in A64, with
the MMC2 come with the capability to do crypto by EMCE.

Add MMC support for H6. EMCE support is not added yet.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
2018-07-31 11:38:13 +05:30
Icenowy Zheng
7f51a4020e sunxi: add UART0 setup for H6
The UART0 on H6 is available at PH bank (and PF bank, but the PF one is
muxed with SD card).

Add pinmux configuration.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
2018-07-31 11:38:13 +05:30
Icenowy Zheng
10196c9627 sunxi: use sun6i-style watchdog for H6
The H6 SoC has a sun6i-style watchdog in its timer part.

Enable the usage of it.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
2018-07-31 11:38:13 +05:30
Icenowy Zheng
0558676d4b sunxi: add clock code for H6
The new Allwinner H6 SoC has a brand new CCU layout.

Add clock code for it.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
2018-07-31 11:38:13 +05:30
Icenowy Zheng
6958c30319 sunxi: change GIC address on H6
As the Allwinner H6 chip has a new memory map, its GIC MMIO address is
thus different.

Change the address on H6.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
2018-07-31 11:38:13 +05:30
Icenowy Zheng
e5715e712a sunxi: add config for SPL at 0x20000 on H6
On the new Allwinner H6 SoC, the SRAM A2 address (SPL load address) is
at 0x20000, which is different with any old Allwinner SoCs.

Add SPL position and size configuration for this.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
2018-07-31 11:38:13 +05:30
Icenowy Zheng
0a21fdd62b sunxi: change ATF position for H6
H6 has different SRAM A2 address, so the ATF load address is also
different.

Add judgment code to sunxi 64-bit FIT generation script. It will judge
the SoC by the device tree's name.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
2018-07-31 11:38:13 +05:30
Icenowy Zheng
80197801f4 sunxi: change RMR64's RVBAR address for H6
Allwinner H6 has a different RVBAR address with A64/H5.

Add conditional RVBAR configuration into the code which does RMR switch.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
2018-07-31 11:38:13 +05:30
Icenowy Zheng
e77b7496c6 sunxi: add basic memory map definitions of H6 SoC
The Allwinner H6 SoC come with a totally new memory map.

Add basical definition of the new memory map into a header file, and let
the cpu.h header include it in the situation of H6.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
2018-07-31 11:38:13 +05:30
Icenowy Zheng
cadc7c20e5 sunxi: change SUNXI_HIGH_SRAM option to SUNXI_SRAM_ADDRESS
The new Allwinner H6 SoC has its SRAM A1 at neither 0x0 nor 0x10000, but
it's at 0x20000. Thus the SUNXI_HIGH_SRAM option needs to be refactored
to support this new configuration.

Change it to SUNXI_SRAM_ADDRESS, which holds the real address of SRAM
A1 in the memory map.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
2018-07-31 11:38:13 +05:30
Simon Baatz
dddc4b4af3 sunxi: enable SATA on Banana Pi M2 Berry
Banana Pi M2 Ultra and M2 Berry are very similar boards.  SATA can be
enabled exactly the same as for M2 Ultra introduced in
commit daa8b75a55 ("sunxi: enable SATA on Banana Pi M2 Ultra").

Signed-off-by: Simon Baatz <gmbnomis@gmail.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-07-31 11:38:12 +05:30
Alexey Brodkin
8f590063ba ARC: Enable unaligned access in hardware if compiler uses it
Even if ARC core might handle unaligned access to data this
hardware feature by default is disabled.

But GCC starting from 8.1.0 unconditionally uses it for ARC HS cores.
Which leads to quite strange and fatal run-time failures like the one
below if HW is not configured properly:
| hsdk# sf probe
| Misaligned data access exception @ 0xbff794d4
| ECR:    0x000d0000
| RET:    0xbff794d4
| BLINK:  0xbff79644
| STAT32: 0x00000800
| GP: 0x1003e000   r25: 0xbfd58f08
| BTA: 0xbff794a4  SP: 0xbfd58cd4  FP: 0xbfd58ef0
| LPS: 0xbff90240 LPE: 0xbff90244 LPC: 0x00000000
| r00: 0x00000000 r01: 0x00000003 r02: 0x000026bf
| r03: 0x00000000 r04: 0x00000100 r05: 0x00000000
| r06: 0x00000001 r07: 0x00000000 r08: 0x1dcd6500
| r09: 0x00000000 r10: 0x00200000 r11: 0x00000000
| r12: 0x1b3d4440 r13: 0xbff9eca4 r14: 0xbfd59d68
| r15: 0xbfd60cd0 r16: 0x00000000 r17: 0x00000000
| r18: 0xbff9ed14 r19: 0xbfd59c78 r20: 0xbfd58d40
| r21: 0xbfd58d44 r22: 0x00000000 r23: 0x00000000
| r24: 0xbfd59ba8
| Resetting CPU ...

Now we're checking for __ARC_UNALIGNED__ define emitted by the
compiler if it's going to use unaligned access and then we
force-enable it in hardware too.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-07-31 07:49:47 +03:00
Alexey Brodkin
164abd1775 HSDK: Fixes and improvements in README
1. Explained prerequisites for "make bsp-generate" command.
2. Cleaned-up duplicates

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-07-31 07:49:47 +03:00
Alexey Brodkin
0552e104a5 ARC: AXS10x/HSDK: Use our own version of mkimage
Since U-Boot tools are being built anyways it's much nicer
to use them instead of relying on some of them bein installed
on build host (which might easily not be the case).

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-07-31 07:49:47 +03:00
Eugeniy Paltsev
817cd83435 ARC: AXS10x: add tool and make target to generate bsp
AXS10x boards have preloader that reads SPI flash pages and searches
special image header to fetch and load binary.

Add tool, make target (bsp-generate) to generate
update script and u-boot binary image with header for preloader.

Also add script to default environment to apply updates.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-07-31 07:49:47 +03:00
Eugeniy Paltsev
cdfe6913c1 AXS10x: add spi flash support
AXS10x boards have n25q512 spi flash IC, so add corresponding
nodes to device tree and enaple corresponding options in
defconfig.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-07-31 07:49:47 +03:00
Eugeniy Paltsev
7620ec4df6 CREG GPIO: add device tree bindings
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-07-31 07:49:47 +03:00
Eugeniy Paltsev
fe3eb7a887 GPIO: CREG: improve flexibility of hsdk-creg-gpio driver
CREG GPIO is a driver for weird soc-specific output ports, which are
controlled by some fields in memory mapped register.

Example:

31                 9        7        5           0   < bit number
|                  |        |        |           |
[     not used     | gpio-1 | gpio-0 | <-shift-> ]   < 32 bit register
                       ^        ^
                       |        |
                write 0x2 == set output to "1" (activate)
                write 0x3 == set output to "0" (deactivate)

As of tooday we only support fixed (hardcoded) bit per gpio line,
activate / deactivatei and shift values. Fix that by read them from
device tree to be able to use this driver for other boards.

Remove "hsdk" prefix from compatible string as this driver can be
used with different boards like HSDK, AXS101, AXS103, etc.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-07-31 07:49:47 +03:00
Tom Rini
5a0007d481 Prepare v2017.09-rc1
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-07-30 21:47:29 -04:00
Tom Rini
f437fea01c fs-test.sh: Update expected result output
Given 0dc1bfb730 ("fs: fat: cannot write to subdirectories") we have
changed how the FAT code works from creating the illegal file "./file"
and instead rejecting the path.  The correct behavior would be to write
"file" to "." but not writing an illegal file is a step in the right
direction.  For now, update the expected output to account for the
failure.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-07-30 19:56:44 -04:00
Tom Rini
406fd7e207 Merge tag 'signed-efi-next' of git://github.com/agraf/u-boot
Patch queue for efi - 2018-07-25

Highlights this time:

  - Many small fixes to improve spec compatibility (found by SCT)
  - Almost enough to run with sandbox target
  - GetTime() improvements
  - Enable EFI_LOADER and HYP entry on ARMv7 with NONSEC=y
2018-07-30 16:02:29 -04:00
Tom Rini
3a8c8bffd7 tpmv2: Make it select CMD_LOG
The TPMv2 code requires the log functionality, so select it.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-07-30 07:18:49 -04:00
Peng Fan
6080170265 tools: genboardscfg: move buildman path to first
To system which has kconfiglib installed, genboardscfg will
use system kconfiglib, we need it use U-Boot owned version,
so move the buildman path to first.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-07-30 07:18:49 -04:00
Michal Simek
58008cbab5 Kconfig: Sort bool, default, select and imply options
Another round of sorting Kconfig entries aplhabetically.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Alexey Brodkin <abrodkin@synopsys.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
2018-07-30 07:18:48 -04:00
Michal Simek
08a00cba06 dm: Change CMD_DM enabling
CMD_DM is used for debug purpose and it shouldn't be enabled by default
via Kconfig. Unfortunately this is in the tree for quite a long time
that's why solution is to use imply DM for all targets which are
enabling DM.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
2018-07-30 07:18:48 -04:00
Michal Simek
5ed063d10f Kconfig: Sort bool, default, select and imply options
Fix Kconfig bool, default, select and imply options to be
alphabetically sorted.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-07-30 07:18:48 -04:00
Michal Simek
6e7bdde4fe Kconfig: Replace spaces with tabs and missing newline
Trivial Kconfig cleanup. Use tabs instead of spaces and every Kconfig
entry should be separated by newline.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
2018-07-30 07:18:47 -04:00
Michal Simek
563273dfa9 common: Log should depends on DM not be selected by DM
Better use depends on instead of select.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-07-30 07:18:47 -04:00
Nicholas Faustini
d30ba2315a u-boot: remove driver lookup loop from env_save()
When called with ENVOP_SAVE, env_get_location() only returns the
gd->env_load_location variable without actually checking for
the environment location and priority.

This behaviour causes env_save() to fall into an infinite loop when
the low-level drv->save() call fails.

The env_save() function should not loop through the environment
location list but it should save the environment into the location
stored in gd->env_load_location by the last env_load() call.

Signed-off-by: Nicholas Faustini <nicholas.faustini@azcomtech.com>
Reviewed-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
2018-07-30 07:18:47 -04:00
Michal Simek
b8448051df Kconfig: Remove trailing whitespaces in prompt
Remove additional trailing whitespaces in prompt reported by kconfiglib:

warning: DM_PMIC_SANDBOX (defined at drivers/power/pmic/Kconfig:133) has
leading or trailing whitespace in its prompt
warning: <choice> (defined at dts/Kconfig:204) has leading or trailing
whitespace in its prompt

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Felix Brack <fb@ltec.ch>
2018-07-30 07:18:46 -04:00
Ramon Fried
2a1f4f1758 Revert "fdt_support: Use CONFIG_NR_DRAM_BANKS if defined"
This reverts commit 5e5745465c.

The reverted commit didn't support the scenario where there are less
DRAM banks in U-Boot than in Linux.
Also, it didn't introduce any new functionality, only limitaion.
User could just increase MEMORY_BANKS_MAX if it's too small.
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-07-28 11:58:10 -04:00
Adam Ford
725dcf5a67 configs: omap3_logic: Remove USB Storage and enable CONFIG_BLK
With the pending requirement for CONFIG_BLK, this patch removes
the USB_STORAGE option which assumes that DM_USB is enabled, but isn't
yet available for the omap2340 musb glue among other issues.  Once
the USB issues are resolved, a future patch can enable them again.

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-07-28 11:58:09 -04:00
Heinrich Schuchardt
c5b53baeaa drivers: rtc: correctly set week day for mc146818
The driver sets the weekday incorrectly when called by the
'date set' command.

Sunday is 1, Saturday is 7 unlike in U-Boot (see data sheet
https://www.nxp.com/docs/en/data-sheet/MC146818.pdf, table 3).

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-07-28 11:58:09 -04:00
Miquel Raynal
a92b794f32 sandbox: compile both TPM stack versions and drivers
Now that TPMv1 and TPMv2 can be compiled at the same time, let's compile
them both with Sandbox as well as both drivers (and, it is already
implied in Kconfig: both commands).

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-07-28 11:58:09 -04:00
Miquel Raynal
58233075f9 tpm: make TPM_V2 be compiled by default
TPM_V1 was already compiled by default. Now that both can be compiled
at the same time, compiled them both by default.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-07-28 11:58:09 -04:00
Miquel Raynal
d87434a2ba test/py: tpm2: switch from 'tpm' to 'tpm2' command
While using the 'tpm' command should work on most cases, this test suite
only works with TPMv2 and since the work to make both versions build at
the same time, we might end up having both 'tpm' (TPMv1) and 'tpm2'
(TPMv2) commands available at the same time. Ensure this test suite
always use the right one.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-07-28 11:58:08 -04:00
Miquel Raynal
2a2096ea60 tpm: allow TPM v1 and v2 to be compiled at the same time
While there is probably no reason to do so in a real life situation, it
will allow to compile test both stacks with the same sandbox defconfig.

As we cannot define two 'tpm' commands at the same time, the command for
TPM v1 is still called 'tpm' and the one for TPM v2 'tpm2'. While this
is the exact command name that must be written into eg. test files, any
user already using the TPM v2 stack can continue to do so by just writing
'tpm' because as long as TPM v1 support is not compiled, U-Boot prompt
will search for the closest command named after 'tpm'.

The command set can also be changed at runtime (not supported yet, but
ready to be), but as one can compile only either one stack or the other,
there is still one spot in the code where conditionals are used: to
retrieve the v1 or v2 command set.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
[trini: In sandbox_tpm2_fill_buf() use NULL not \0 to ensure NULL
terminated string due to LLVM warning]
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-07-28 11:57:38 -04:00
Miquel Raynal
8a7aa3e279 tpm: remove stale symbol in Kconfig
The TPM_DRIVER_SELECTED symbol was used in one of the initial series
about TPMv2 but its use has been dropped, making these selects
useless, remove them.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-07-28 11:55:32 -04:00
Miquel Raynal
a0cf1d0ce0 tpm: compile Sandbox driver by default
When Sandbox and the TPM stack are both selected, compile Sandbox TPM
driver by default.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-07-28 11:55:32 -04:00
Miquel Raynal
350988ff1a tpm: fix typo in kernel doc
The udevice given to the open() function of course must be opened,
not closed.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-07-28 11:55:31 -04:00
Tom Rini
0e8a8a3110 Merge git://git.denx.de/u-boot-fsl-qoriq 2018-07-27 13:09:30 -04:00
Tom Rini
11e409284e openrd: Once again shrink binary size
With some recent changes to relevant drivers here the openrd board
(openrd_client in this case) does not fit within its size constraint.
We can however drop the slightly extended baudrate table and then the
duplication of mtdparts/mtdids in the default environment.  These
defaults are set in the environment by the 'mtdparts' command and
otherwise referenced throughout the code.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-07-27 07:56:59 -04:00
Tom Rini
2ae23a280b Merge git://git.denx.de/u-boot-dm 2018-07-26 23:12:47 -04:00
Tom Rini
53885e76ce Merge branch 'master' of git://git.denx.de/u-boot-tegra 2018-07-26 23:12:39 -04:00
Vagrant Cascadian
d06ac6034d arm: odroid: Inherit default value for bootdelay from distro_bootcmd.
The default value with distro_bootcmd is 2 seconds, which is
reasonably fast, and provides a consistent experience across platforms
supporting distro_bootcmd.

The current bootdelay value of 0 seconds is a bit challenging to
interrupt when desired.

Acked-by: Lukasz Majewski <lukma@denx.de>

Signed-off-by: Vagrant Cascadian <vagrant@debian.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2018-07-27 11:19:55 +09:00
Vagrant Cascadian
ef41aea96e arm: odroid: Enable distro_bootcmd support.
Enable distro_bootcmd for a standardized boot process across multiple
platforms.

Acked-by: Lukasz Majewski <lukma@denx.de>
Signed-off-by: Vagrant Cascadian <vagrant@debian.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2018-07-27 11:19:55 +09:00
Vagrant Cascadian
22297aaa4f arm: odroid: Increase default env size in preparation for distro_bootcmd.
Adding distro_bootcmd support bumps the default environment size over
4500. Increase to SZ_16K to allow for room to grow in the future.

Acked-by: Lukasz Majewski <lukma@denx.de>

Signed-off-by: Vagrant Cascadian <vagrant@debian.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2018-07-27 11:19:55 +09:00
Vagrant Cascadian
93716afbbe arm: odroid: Use standard environment variable names kernel_addr_r, ramdisk_addr_r and fdt_addr_r.
Replace non-standard variable names kerneladdr, initrdaddr and fdtaddr
with kernel_addr_r, ramdisk_addr_r and fdt_addr_r, as documented in
u-boot README.

Acked-by: Lukasz Majewski <lukma@denx.de>
Signed-off-by: Vagrant Cascadian <vagrant@debian.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2018-07-27 11:19:55 +09:00
Guillaume GARDET
a53729456b snow: set fdtfile
Needed to boot with EFI distro boot.

Signed-off-by: Guillaume GARDET <guillaume.gardet@free.fr>

Cc: Akshay Saraswat <akshay.s@samsung.com>
Cc: Tom Rini <trini@konsulko.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2018-07-27 11:19:49 +09:00
Masahiro Yamada
ab948cd21d fdt_support: make FDT_FIXUP_PARTITIONS depend on CMD_MTDPARTS
fdt_fixup_mtdparts() calls mtdparts_init() and device_find(),
which are defined in cmd/mtdparts.c

The combination of FDT_FIXUP_PARTITIONS=y and CMD_MTDPARTS=n
emits the following link error:

  common/fdt_support.c:903: undefined reference to `mtdparts_init'
  common/fdt_support.c:914: undefined reference to `device_find'

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-07-26 14:20:27 -06:00
Jens Wiklander
452bc12102 fdt: fix fdtdec_setup_memory_banksize()
Prior to this patch is fdtdec_setup_memory_banksize() incorrectly
ignoring the "status" field. This patch fixes that by testing the status
with fdtdec_get_is_enabled() before using a memory node.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-07-26 14:19:38 -06:00
Chris Packham
09b8d67f31 doc: driver-model: Fix typo
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-07-26 14:18:38 -06:00
Adam Sampson
b8a48fbca3 patman: Split alias entries on arbitrary whitespace
Previously the first three words in a git-mailrc alias entry could only
be separated by spaces. git-send-email and Mutt both allow arbitrary
whitespace here.

Signed-off-by: Adam Sampson <ats@offog.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-07-26 14:18:38 -06:00
Adam Sampson
38d1ab4a85 git-mailrc: Replace tabs with spaces in alias entries
patman's _ReadAliasFile only splits on spaces, not tabs, so the entries
for dinh and maxime weren't being recognised as valid. I'll fix patman
in a separate patch, but this makes all the entries consistent.

Signed-off-by: Adam Sampson <ats@offog.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-07-26 14:18:38 -06:00
Tom Warren
2eea126916 tegra: beaver/apalis: Fix DTC warning
Fix warning when compiling tegra30-beaver/-apalis.dts with latest DTC:

  "Warning (avoid_unnecessary_addr_size): /pci/pch@1f,0: unnecessary
   #address-cells/#size-cells without "ranges" or child "reg" property"

Signed-off-by: Tom Warren <twarren@nvidia.com>
2018-07-26 13:15:31 -07:00
Stephen Warren
6e584e633d ARM: tegra: avoid using secure carveout RAM
If a secure carveout exists, U-Boot cannot use that memory. Fix
carveout_size() to reflect this, and hence transitively fix
usable_ram_size_below_4g() and board_get_usable_ram_top(). This change
ensures that when U-Boot copies the secure monitor code to install it, the
copy target is not in-use for U-Boot code/data.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2018-07-26 13:15:30 -07:00
Stephen Warren
74c69cdcc0 ARM: PSCI: Enable the PSCI node
When fixing up the DT to report PSCI support, explicitly enable the node.
DTs may ship with the node disabled in case a PSCI implementation is not
present, and expect any PSCI implementation to enable the node if they are
actually present.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2018-07-26 13:15:30 -07:00
Stephen Warren
326bd726d0 ARM: PSCI: Support PSCI v0.2
Enhance the PSCI DT editing code to allow setting a PSCI v0.2 compatible
value in the DT. The CONFIG_ option is added to the whitelist to match the
existing PSCI_1_0 option. While not adding new options to Kconfig isn't
ideal, I figure it's better to keep related options together.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2018-07-26 13:15:30 -07:00
Stephen Warren
3e3b2b4776 ARM: define MON_MODE
Add a MON_MODE define for ARM's monitor mode. This can be used later by
a secure monitor to avoid hard-coding mode IDs.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2018-07-26 13:15:30 -07:00
Bibek Basu
3cc7942a4a ARM: tegra: implement RAM repair
RAM repair has a few pre-requisites:
1) PMIC power supply (rail) enabled.
2) PMC CRAIL power partition powered.
3) Fuse clock active (it's the default).
4) PLLP reshift branch enabled (it's the default, when PLLP is active).

RAM repair also only need run whenever specific partitions are powered
(main SoC and CCPLEX respectively); RAM repair does not need to be
triggered when any other partition changes state.

start_cpu() needs to be re-ordered slightly to match these requirements.
Note that C0NC and CE0 aren't required for RAM repair to
operate, but they also do no harm, so the entire of powerup_cpus() is
moved rather than splitting it up. The call to remove_cpu_resets() is
moved last to ensure that all other actions complete before releasing
reset; since the PMC power partitions are now enabled early, releasing
reset is what causes the CPUs to start executing code, and RAM repair must
complete before the CPU boots.

Note that this commit is the result of squashing a numbmer of commits
in NVIDIA's downstream L4T branch, hence the multiple signoffs below.

Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Signed-off-by: Sandipan Patra <spatra@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2018-07-26 13:15:29 -07:00
Stephen Warren
daebd48fe8 Revert "tegra: Introduce SRAM repair on tegra124"
This reverts commit 701b7b1d2c. It will
be immediately replaced by a different implementation that is more
complete and runs are more targetted times.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2018-07-26 13:15:29 -07:00
Tom Rini
a57d45db90 Merge branch 'master' of git://git.denx.de/u-boot-net 2018-07-26 15:55:42 -04:00
Simon Glass
2547e91dc1 tegra: Indicate that binman makes all three output files
Use GNU make pattern rules to indicate that a single run of binman
produces all three Tegra output files. The avoids make running binman
three times (perhaps in parallel) and those instances inteferring with
each other.

See http://patchwork.ozlabs.org/patch/944611/ for the bug report.

Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Stephen Warren <swarren@nvidia.com>
2018-07-26 15:49:40 -04:00
Tom Rini
9f8aba7a0d MAINTAINERS: Mark NAND as Orphaned
Scott is no longer maintaining the NAND subsystem, mark as orphaned for
now.

Acked-by: Scott Wood <oss@buserror.net>
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-07-26 15:49:29 -04:00
Siva Durga Prasad Paladugu
26026e695a net: zynq_gem: convert to use livetree
This patch updates the zynq gem driver to support livetree.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Vipul Kumar <vipul.kumar@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-07-26 14:08:23 -05:00
Grygorii Strashko
41080e180c drivers: net: zynq_gem: fix phy dt node setting
Now zynq_gem driver will overwrite UCLASS_ETH node when PHY is
connected and configured which is not correct.
Use struct phydev->node instead.

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Tested-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
2018-07-26 14:08:23 -05:00
Grygorii Strashko
d4bb981700 drivers: net: cpsw: fix phy dt node setting
Now CPSW driver will overwrite UCLASS_ETH node when PHY is
connected and configured which is not correct.
Use struct phydev->node instead.

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-07-26 14:08:23 -05:00
Grygorii Strashko
aadbd97843 net: phy: xilinx: switch to use phy_get_ofnode()
Use PHY API phy_get_ofnode() helper to get PHY DT node.

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-07-26 14:08:22 -05:00
Grygorii Strashko
b8d7ec782f net: phy: dp83867: switch to use phy_get_ofnode()
Use PHY API phy_get_ofnode() helper to get PHY DT node.

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Tested-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
2018-07-26 14:08:22 -05:00
Grygorii Strashko
eef0b8a930 net: phy: add ofnode node to struct phy_device
Now the UCLASS_ETH device "node" field is owerwritten by some network drivers in
case of Ethernet PHYs which are linked to UCLASS_ETH device using
"phy-handle" DT property and when Ethernet PHY driver needs to read some
additional information from DT. In such cases following happens (in
general):

- network drivers
	priv->phydev = phy_connect(priv->bus, priv->phyaddr, dev,
				   priv->interface);
	<-- phydev is connected to dev which is UCLASS_ETH device

	if (priv->phy_of_handle > 0)
		dev_set_of_offset(priv->phydev->dev, priv->phy_of_handle);
	<-- phydev->dev->node is overwritten by phy-handle DT node

- PHY driver in .config() callback
	int node = dev_of_offset(dev);
	<-- PHY driver uses overwritten dev->node
        const void *fdt = gd->fdt_blob;

	 if (fdtdec_get_bool(fdt, node, "property"))
		...

As result, UCLASS_ETH device can't be used any more for DT accessing.

This patch adds additional ofnode node field to struct phy_device which can
be set explicitly by network drivers and used by PHY drivers, so
overwriting can be avoided. Also add helper function phy_get_ofnode()
which will check and return phy_device->node or dev_ofnode(phydev->dev) for
backward compatibility with existing drivers.

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-07-26 14:08:22 -05:00
Joe Hershberger
05b60ac549 net: phy: Clean up includes of common.h
We want to be able to include some other system headers in phy.h but
that requires us to have included common.h in the top-level first.

Also, common.h includes config.h as the first thing it does, so don't
include it directly.

Series-to: u-boot
Series-cc: Grygorii Strashko <grygorii.strashko@ti.com>
Seried-cc: ti
Series-process-log: sort, uniq
Cover-letter:
Prepare for net: phy: prevent uclass_eth device "node" field overwriting
Prepare for [1] so that it doesn't break the build for a bunch of
boards. There are a number of reasons this series broke the build
but none of them depend on changes in the series, so fix up those
situations ahead of applying that series.

[1] https://patchwork.ozlabs.org/cover/940104/
END
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
2018-07-26 14:08:22 -05:00
Joe Hershberger
f070b1a27a phy: Break include cycle
Because some phy wants to export some functions [1], export.h was
including the whole phy subsystem which pulls in lots of stuff that
causes some ordering and redefinition issues. Split out the only part
that is actually needed in export.h and include it there and in phy.h.

[1] commit 9527931507 ("board/ls2085rdb: Export functions for
			  standalone AQ FW load apps")

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
2018-07-26 14:08:22 -05:00
Joe Hershberger
9cce566321 arm: Prevent redefinition error in fsl-layerscape
The include/phy.h will start including dm.h, which pulls in
linux/compat.h after the attempted redefinition in
arch/arm/include/asm/armv8/mmu.h, so move this include to allow
redefinition.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
2018-07-26 14:08:21 -05:00
Grygorii Strashko
3ab75cf76e net: phy: dp83867: switch to use ofnode api
Switch to use more generic ofnode API instead of FDT API.

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Tested-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
2018-07-26 14:08:21 -05:00
Murali Karicheri
63d3192984 net: phy: dp83867: add workaround for incorrect RX_CTRL pin strap
The data manual for DP83867IR/CR, SNLS484E[1], revised march 2017,
advises that strapping RX_DV/RX_CTRL pin in mode 1 and 2 is not
supported (see note below Table 5 (4-Level Strap Pins)).

It further advises that if a board has this pin strapped in mode 1 and
mode 2, then bit[7] of Configuration Register 4 (address 0x0031) must
be cleared to 0. This is to ensure proper operation of PHY.

Since it is not possible to detect in software if RX_DV/RX_CTRL pin is
incorrectly strapped, add a device-tree property to advertise this and
allow corrective action in software.
[1] http://www.ti.com/lit/ds/snls484e/snls484e.pdf

Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Reviewed-by: Hannes Schmelzer <oe5hpm@oevsv.at>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Tested-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
2018-07-26 14:08:21 -05:00
Chris Packham
fb73107698 net: mvgbe: convert to DM
Add driver model support to the mvgbe driver. As a temporary measure
both DM and non-DM uses are supported. Once all the users have been
converted the non-DM support can be dropped.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Tested-by: Michael Walle <michael@walle.cc>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-07-26 14:08:21 -05:00
Chris Packham
e9bf75c9d3 net: mvgbe: prepare for conversion to driver model
Extract some function bodies to helper functions that can be reused in
the DM/non-DM implementations.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-07-26 14:08:20 -05:00
Andrew Thomas
f25ddca16c initialize net_mode.if_type
if_type is not correctly initialized

Failure to initialize if_type means that grub2/efinet sends
a bogus arp request. It therefore gets no response. On Raspberry Pi 3B+
this leads to a pause at:

lan78xx_eth Waiting for PHY auto negotiation to complete....... done
lan78xx_eth Waiting for PHY auto negotiation to complete....... done

Signed-off-by: Andrew Thomas <andrew.thomas@oracle.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-07-26 14:08:20 -05:00
Joe Hershberger
6ab1283092 net: Consolidate the parsing of bootfile
The same basic parsing was implemented in tftp and nfs, so add a helper
function to do the work once.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
2018-07-26 14:08:20 -05:00
Joe Hershberger
f43308fa0c net: Read bootfile from env on netboot_common()
Instead of depending on a env callback for bootfile, read it explicitly.

We do this because the bootfile can be specified on the command line and
if it is, we will overwrite the internal variable. If a netboot_common()
is called again with no bootfile parameter, we want to use the one in
the environment.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
2018-07-26 14:08:20 -05:00
Joe Hershberger
16cf145fd6 net: Make copy_filename() accept NULL src
Rather than crashing, check the src ptr and set dst to empty string.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
2018-07-26 14:08:20 -05:00
Joe Hershberger
3855cad623 net: Re-check prerequisites when autoloading
With net autoload, we check the prerequisites for the initial command,
but the greater prerequisites when autoloading are not checked.

If we would attempt to autoload, check those prerequisites too.

If we are not expecting a serverip from the server, then don't worry
about it not being set, but don't attempt to load if it isn't.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
2018-07-26 14:08:20 -05:00
Joe Hershberger
3a66fcb7c3 net: When checking prerequisites, consider boot_file_name
For net_boot_common, we allow the serverip to be specified as part of
the boot file name. For net commands that require serverip, include that
source as a valid specification of serverip.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Alexander Graf <agraf@suse.de>
2018-07-26 14:08:19 -05:00
Joe Hershberger
faecf84ab1 net: Always print basic info for nfs, just like tftp
nfs was only printing basic info about the transfer in the case of a
DEBUG build. Print the same level of detail as tftp always.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
2018-07-26 14:08:19 -05:00
Joe Hershberger
347e32b01d net: Check subnet against the actual ip address in use for nfs
The check for sending to the gateway was not using the correct variable
for comparison, so it was reporting that packets are sent to the gateway
when they were not.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
2018-07-26 14:08:19 -05:00
Joe Hershberger
2d114b83a7 net: Correct size of NFS buffers
Reported-by: Coverity (CID: 152888)
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
2018-07-26 14:08:19 -05:00
Joe Hershberger
f40a31e695 sandbox: eth-raw: Add a SIMPLE_BUS to enumerate host interfaces
Ask the OS for each of its interfaces and for each one, bind a U-Boot
device and then probe it. This will allocate the priv data structure
that is then populated.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-07-26 14:08:19 -05:00
Joe Hershberger
b96ced9cdb sandbox: eth-raw: Make random MAC addresses available to eth-raw
We don't necessarily know how many MAC addresses we'll need, so implement
a ROM read so we always have something valid.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-07-26 14:08:18 -05:00
Joe Hershberger
c9e2caff85 sandbox: eth-raw: Allow interface to be specified by index
With systemd stable interface names, eth0 will almost never exist.
Instead of using that name in the sandbox.dts, use an index.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-07-26 14:08:18 -05:00
Joe Hershberger
ac13270b49 sandbox: eth-raw: Add a function to ask the host about localhost
Instead of doing a simple string compare against "lo", look for the flag
that indicates a localhost interface.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-07-26 14:08:18 -05:00
Joe Hershberger
8c7988b6db net: sandbox-raw: Convert raw eth driver to livetree
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-07-26 14:08:18 -05:00
Joe Hershberger
b32dd183c2 net: sandbox: Convert sandbox mock eth driver to livetree
Use the dev_ functions to access DT properties.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-07-26 14:08:18 -05:00
Joe Hershberger
c25f40627f net: Correct comment in Kconfig
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-07-26 14:08:18 -05:00
Joe Hershberger
50ed0ef832 sandbox: eth-raw: Make sure descriptors are always initialized
If we let descriptors equal 0, we can end up closing STDIN. Make sure
they start out as -1.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-07-26 14:08:17 -05:00
Joe Hershberger
68acb51f44 net: Only call halt on a driver that has been init'ed
With driver model, we were not checking if the state of the device was
marked as active before calling the halt function. Check that the device
is probed and also marked as active. This avoids the case where we were
calling halt on the first device in net_init() and the driver would
operate on bogus data structures causing problems. In this case, the
priv was all 0, so halt() would close STDIN.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-07-26 14:08:17 -05:00
Joe Hershberger
c6fa51a499 sandbox: Fix format of fake-host-hwaddr in test.dts
test.dts specified the fake MAC address as a u32 array. Instead it
should be a u8 array.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-07-26 14:08:17 -05:00
Joe Hershberger
97367df109 sandbox: eth-raw: Correct valid socket test in send/recv
In open, the socket is correctly checked to be -1 in the error case.
In send and recv, we checked for 0, but that is a valid socket number.

Correct this by checking for -1 as a bad socket everywhere.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-07-26 14:08:17 -05:00
Joe Hershberger
82a115fdec sandbox: Don't disable ctrlc() on sandbox if in raw mode
In raw mode, handle ctrl-c as normal. This allows normal ctrl-c behavior
such as aborting a command that is timing out without completely
terminating the sandbox executable.

In [1], Simon disabled this.  His reason for it was that it interferes
with piping test scripts. Piping should be done in cooked mode, so this
change should still not interfere.

[1] commit 8969ea3e9f ("sandbox: Disable Ctrl-C")

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-07-26 14:08:17 -05:00
Joe Hershberger
b2f58d8ee0 console: Remember if ctrlc is disabled in console_tstc()
We don't necessarily want to re-enable ctrl-c if it was already disabled
when calling tstc().

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-07-26 14:08:16 -05:00
Jeremy Gebben
86b840b78d drivers/ddr/fsl: fix '__hwconfig without a buffer' messages
Pass an empty buffer instead of NULL if the hwconfig environment
variable isn't set.

Signed-off-by: Jeremy Gebben <jgebben@sweptlaser.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: York Sun <york.sun@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-07-26 11:54:00 -07:00
York Sun
038b965c2b armv8: ls1046ardb: Add falcon mode for for QSPI boot
A new defconfig is introduced to support SPL boot from QSPI NOR
flash. This is to support falcon mode for faster booting into
Linux.

Signed-off-by: York Sun <york.sun@nxp.com>
2018-07-26 11:51:23 -07:00
York Sun
9960609275 armv8: layerscape: spl: Initialize QSPI AHB for QSPI boot
To get full access of QSPI space, initialize AHB interface.

Signed-off-by: York Sun <york.sun@nxp.com>
2018-07-26 10:59:35 -07:00
York Sun
7550dbe38b spl: Add option SPL_PAYLOAD
Some legacy boards use RAW image for SPL boot. Add Kconfig option
SPL_PAYLOAD to set alternative image.

Signed-off-by: York Sun <york.sun@nxp.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-07-26 10:59:35 -07:00
York Sun
67b4f5302a powerpc: mpc85xx: Drop u-boot-with-spl.bin on selected boards
For SoCs with PBL, u-boot-with-spl-pbl.bin is the final image for
SPL boot. Drop unused u-boot-with-spl.bin.

Signed-off-by: York Sun <york.sun@nxp.com>
CC: Ashish Kumar <ashish.kumar@nxp.com>
CC: Ruchika Gupta <ruchika.gupta@nxp.com>
CC: Priyanka Jain <priyanka.jain@nxp.com>
CC: Shengzhou Liu <Shengzhou.Liu@nxp.com>
2018-07-26 10:59:35 -07:00
York Sun
18b6dd6cb0 armv8: layerscape: Drop u-boot-with-spl.bin for selected boards
For SPL boot with PBL, u-boot-with-spl-pbl.bin is the final image.
Drop unused u-boot-with-spl.bin.

Signed-off-by: York Sun <york.sun@nxp.com>
CC: Mingkai Hu <mingkai.hu@nxp.com>
CC: Ruchika Gupta <ruchika.gupta@nxp.com>
CC: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
CC: Udit Agarwal <udit.agarwal@nxp.com>
CC: Sumit Garg <sumit.garg@nxp.com>
CC: Priyanka Jain <priyanka.jain@nxp.com>
2018-07-26 10:59:35 -07:00
York Sun
80bec96ecf armv8: ls1046ardb: Enable IFC for SPL build
Commit a52ff334c5 ("armv8: ls1046ardb: SPL size reduction") reduced
image size for SPL. IFC was disabled. If PPA is loaded in SPL, MMU is
enabled as a result. Removing IFC skips IFC region in the MMU table,
causing later failure in RAM version U-boot when accessing CPLD
through IFC. Only disable IFC if PPA is not enabled for SPL.

Signed-off-by: York Sun <york.sun@nxp.com>
2018-07-26 10:59:35 -07:00
Yuantian Tang
1dc4dea75d arm64: ls1012a: enable DM support for sata
Enable related configs to support sata DM feature.

Signed-off-by: Tang Yuantian <andy.tang@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-07-26 10:59:35 -07:00
Yuantian Tang
79ed61e9f0 scsi: ceva: add ls1012a soc support
Make the code structure more general so that more socs can be
added easily and also remove speed limitation restriction.
Add the ls1012a sata support as well.

Signed-off-by: Tang Yuantian <andy.tang@nxp.com>
Reviewed-by: Michal Simek <michal.simek@xilinx.com>
Tested-by: Michal Simek <michal.simek@xilinx.com>
	(with and without CONFIG_OF_LIVE on zynqmp zcu102)
Reviewed-by: York Sun <york.sun@nxp.com>
2018-07-26 10:59:35 -07:00
Yuantian Tang
86bff2bb09 armv8: dts: fsl-ls1012a: add sata node support
One ls1012a, there is one SATA 3.0 advanced host controller interface
which is a high-performance SATA solution that delivers comprehensive
and fully-compliant generation 3 (1.5 Gb/s - 6.0 Gb/s) serial ATA
capabilities, in accordance with the serial ATA revision 3.0 of Serial
ATA International Organization.
Add sata node to support this feature.

Signed-off-by: Tang Yuantian <andy.tang@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-07-26 10:59:35 -07:00
Yuantian Tang
ed167eb1c7 armv8: fsl: remove sata support
Remove the old implementation in order to enable DM for sata.

Signed-off-by: Tang Yuantian <andy.tang@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-07-26 10:59:35 -07:00
York Sun
61ab8aac60 armv8: layerscape: Enabled I-cache for SPL boot
Enable I-cache for SPL boot to boost performance. Earlier MMU was
enabled only for LS2080A and has since been dropped by commit
f539c8a4a7 ("armv8: ls2080a: Drop early MMU for SPL build").

Signed-off-by: York Sun <york.sun@nxp.com>
2018-07-26 10:59:35 -07:00
York Sun
02d8dc9678 armv8: ls1046ardb: ls1046aqds: Move SPL macros to defconfig
Instead of defining Kconfig macros in header file, move them to
defconfig files.

Signed-off-by: York Sun <york.sun@nxp.com>
2018-07-26 10:59:35 -07:00
Ashish Kumar
32dab9100e armv8: ls2088ardb: Move CONFIG_SPI_FLASH, CONFIG_SPI_FLASH_SPANSION to defconfig
Move CONFIG_SPI_FLASH_SPANSION, CONFIG_SPI_FLASH, to defconfig.
Also disable disable 4K erase size option.

Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-07-26 10:59:35 -07:00
Ashish Kumar
e90cc47510 configs: Disable 4k erase sector size for spansion "s25fs512s" flash
4K erase size is used only in case of hydrid mode which is not
supported on any NXP platform with flash "s25fs512s".
Supported mode is uniform sector, with erase size 256kiB.

Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-07-26 10:59:35 -07:00
Vinitha V Pillai
fe6636f14c LS1088ARDB: Secure Boot:Change load address of dpl header in SD
Change address of DPL header in SD.

Signed-off-by: Vinitha V Pillai <vinitha.pillai@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-07-26 10:59:35 -07:00
Alison Wang
a7943fd4c8 armv8: ls2080ardb: update copyright claim
This patch updates the copyright claim for the issues reported by
legal review.

Signed-off-by: Alison Wang <alison.wang@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-07-26 10:59:35 -07:00
Vinitha V Pillai
d264fadac5 LS1043ARBD: Fix SD Boot issue with PPA
CONFIG_SPL_FSL_LS_PPA is needed only in case of falcon boot
Support for this is not present in PPA currently, so
removing the default option from defconfig

Signed-off-by: Vinitha V Pillai <vinitha.pillai@nxp.com>
Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-07-26 10:59:35 -07:00
Jagdish Gediya
f4ef476d20 armv8: ls1088a: change dpl load command from apply to lazyapply
use "fsl_mc lazyapply dpl addr" instead of "fsl_mc apply dpl addr"

change dpl load addr to 0x80001000 from 0x80200000 because dpl gets
corrupted at 0x80200000 during bootm command excecution.

Signed-off-by: Jagdish Gediya <jagdish.gediya@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-07-26 10:59:35 -07:00
Tom Rini
1341533778 cmd/ubi.c: Fix format warning
On 64bit platforms we would otherwise see:
../cmd/ubi.c: In function 'ubi_volume_read':
../cmd/ubi.c:359:16: warning: format '%u' expects argument of type 'unsigned int', but argument 2 has type 'size_t {aka long unsigned int}' [-Wformat=]

Fixes: 68c7025d99 ("cmd: ubi: print load size after establishing volume size")
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-07-26 11:43:30 -04:00
Tom Rini
ff6bef4852 Merge branch 'master' of git://git.denx.de/u-boot-socfpga 2018-07-26 11:43:26 -04:00
Tom Rini
de4b4ef36f Merge branch 'master' of git://git.denx.de/u-boot-sh 2018-07-26 11:43:23 -04:00
Tom Rini
08fcdd332f Makefile: Fix 'clean' target
Now that we have removed the DocBook files we need to not try and clean
that directory.

Reported-by: ericywl <midnight2903@gmail.com>
Reported-by: Jagan Teki <jagan@amarulasolutions.com>
Fixes: 78a88f7930 ("doc: Replace DocBook with sphinx-based docs")
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-07-26 07:12:31 -04:00
Heinrich Schuchardt
0b8a88ab6a MAINTAINERS: assign lib/charset.c
lib/charset.c is only used by the EFI subsystem.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-07-25 15:00:24 +02:00
Heinrich Schuchardt
8c588a5886 efi_selftest: unit test for GetTime()
Provide a unit test for the GetTime() runtime service.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-07-25 15:00:24 +02:00
Heinrich Schuchardt
42e2b563f6 efi_selftest: support printing leading zeroes
Allow specifying the precision when printing integers, e.g.

efi_st_printf("%.4u-%.2u-%.2u\n", year, month, day);

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-07-25 15:00:24 +02:00
Heinrich Schuchardt
49de24559d efi_loader: complete implementation of GetTime()
Implement the missing parts of the GetTime() runtime service.

Fill seconds.
Fill daylight saving time flag correctly.
Provide dummy values for capabilities.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-07-25 15:00:24 +02:00
Heinrich Schuchardt
197005ae2a efi_loader: remove unused efi_get_time_init()
Remove unused function efi_get_time_init().

Initialization of the RTC has to be done in board bring up not in the EFI
subsystem.

There is no RTC device in the UEFI spec. The RTC is only accessed through
the runtime services.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-07-25 15:00:24 +02:00
Heinrich Schuchardt
5d88902401 rtc: remove CONFIG_CMD_DATE dependency
The EFI subsystem accesses the real time clock and is enabled by default.
So we should drop any CONFIG_CMD_DATE dependency from the real time clock
drivers.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-07-25 15:00:24 +02:00
Heinrich Schuchardt
62045b0eb4 efi_selftest: unit test for CalculateCrc32()
This unit test checks the CalculateCrc32 bootservice and checks the
headers of the system table, the boot services tablle, and the runtime
services table before and after ExitBootServices().

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-07-25 15:00:24 +02:00
Heinrich Schuchardt
74fc044574 efi_selftest: check crc32 for InstallConfigurationTable
InstallConfigurationTable() may change the number of installed
configuration tables.

Check the crc32 of the system table.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-07-25 15:00:24 +02:00
Heinrich Schuchardt
55d8ee3b7b efi_loader: update crc32 in InstallConfigurationTable
If the number of installed tables is changed in
InstallConfigurationTable() update the crc32 of the system table.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-07-25 15:00:24 +02:00
Heinrich Schuchardt
8aa8360eca efi_loader: correct signature of CalculateCrc32()
Use const for the buffer. We are not changing the buffer.
Use efi_uintn_t where prescribed by the UEFI spec.
Prefer u32 over uint32_t.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-07-25 15:00:24 +02:00
Heinrich Schuchardt
9b30232bfc efi_selftest: test InstallConfigurationTable()
Provide a unit test for InstallConfigurationTable().

A table is installed, updated, removed. The table entry and the
triggering of events is checked.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-07-25 15:00:24 +02:00
Heinrich Schuchardt
4182a129ef efi_loader: allocate configuration table array
The system table contains a link to the list of configurations tables.
These include the device tree, SMBIOS table, and the ACPI table.

This array is currently statically linked. With the patch it is allocated
as EFI_RUNTIME_SERVICES_DATA. Due to the structure of the system table we
cannot work with a linked list here.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-07-25 15:00:24 +02:00
Heinrich Schuchardt
640adadf81 efi_loader: calculate crc32 for EFI tables
For the boot and runtime services tables and for the system table the
crc32 has to be set in the header.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-07-25 15:00:24 +02:00
Heinrich Schuchardt
0b386537a5 efi_loader: provide firmware revision
Provide a firmware revision in the system table using the Makefile
variables VERSION and PATCHLEVEL, e.g. 0x20180700 for v2018.07.

Correct the type of the firmware vendor. It is a u16* pointer.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-07-25 14:59:44 +02:00
Heinrich Schuchardt
71c846ab84 efi_loader: correct headersize EFI tables
The headersize field has to be set to the size of the whole table
including the header.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-07-25 14:59:44 +02:00
Heinrich Schuchardt
bdfb894a3e efi_loader: correct EFI_RUNTIME_SERVICES_SIGNATURE
The value for EFI_RUNTIME_SERVICES_SIGNATURE does not match the
UEFI spec 2.7.

Reported-by: Takahiro Akashi <takahiro.akashi@linaro.org>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-07-25 14:59:44 +02:00
Heinrich Schuchardt
112f243016 efi_loader: specify UEFI spec revision
Both in the boot and the runtime services tables we have to specify the
UEFI spec revision. The same value is already used for the system
table. So let's use a common constant.

In the boot services table we have to provide the header signature.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-07-25 14:59:44 +02:00
Heinrich Schuchardt
e67ff94ded efi_loader: clear screen has to reset cursor position
After clearing the screen the cursor position is row 0, column 0.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-07-25 14:59:44 +02:00
Heinrich Schuchardt
4f18789770 efi_loader: EFI_SIMPLE_TEXT_INPUT_PROTOCOL.Reset()
Implement the reset service of the EFI_SIMPLE_TEXT_INPUT_PROTOCOL.

This should resolve the error reported by the SCT in
Protocol/SimpleTextIn/BlackBoxTest/SimpleTextInBBTestFunction.c:193

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-07-25 14:59:44 +02:00
Heinrich Schuchardt
95147313a9 efi_loader: set revision in loaded image protocol
The revision number has to be set in the loaded image protocol.

The problem was detected by running the SCT in
Protocol/LoadedImage/BlackBoxTest/LoadedImageBBTestMain.c:890

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-07-25 14:59:44 +02:00
Heinrich Schuchardt
df76431b11 efi_driver: set DM_FLAG_NAME_ALLOCED flag
Set the DM_FLAG_NAME_ALLOCED flag to avoid a memory leak when the block
device is removed.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-07-25 14:59:44 +02:00
Heinrich Schuchardt
1bfb1579be efi_selftest: test writing to file
Provide a unit test for writing to a FAT file system.
Add some additional comments in block device unit test.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-07-25 14:59:44 +02:00
Heinrich Schuchardt
0dc1bfb730 fs: fat: cannot write to subdirectories
fs_fat_write() is not able to write to subdirectories.

Currently if a filepath with a leading slash is passed, the slash is
treated as part of the filename to be created in the root directory.

Strip leading (back-)slashes.

Check that the remaining filename does not contain any illegal characters
(<>:"/\|?*). This way we will throw an error when trying to write to a
subdirectory.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-07-25 14:59:44 +02:00
Heinrich Schuchardt
1fcb7ea284 efi_loader: check map_key in ExitBootServices
The UEFI spec requires that the memory map key is checked in
ExitBootServices().

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-07-25 14:59:44 +02:00
Heinrich Schuchardt
8e835554b3 efi_loader: check parameters of GetMemoryMap
Check the parameters of boottime service GetMemoryMap().
Return EFI_INVALID_PARAMETER where required by the UEFI spec.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-07-25 14:59:44 +02:00
Heinrich Schuchardt
4d5e071ee0 efi_loader: check parameters in memory allocation
If no pointer is provided throw an error.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-07-25 14:59:44 +02:00
Heinrich Schuchardt
21b3edfc96 efi_loader: check parameters of CreateEvent
Rigorously check the TPL level and the event type.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-07-25 14:59:44 +02:00
Alexander Graf
42a3d42688 x86: Add efi_loader bits to x86_64 linker script
The x86_64 linker script was missing efi runtime information. Add it.

Signed-off-by: Alexander Graf <agraf@suse.de>
2018-07-25 14:57:44 +02:00
Alexander Graf
7e21fbca26 efi_loader: Rename sections to allow for implicit data
Some times gcc may generate data that is then used within code that may
be part of an efi runtime section. That data could be jump tables,
constants or strings.

In order to make sure we catch these, we need to ensure that gcc emits
them into a section that we can relocate together with all the other
efi runtime bits. This only works if the -ffunction-sections and
-fdata-sections flags are passed and the efi runtime functions are
in a section that starts with ".text".

Up to now we had all efi runtime bits in sections that did not
interfere with the normal section naming scheme, but this forces
us to do so. Hence we need to move the efi_loader text/data/rodata
sections before the global *(.text*) catch-all section.

With this patch in place, we should hopefully have an easier time
to extend the efi runtime functionality in the future.

Signed-off-by: Alexander Graf <agraf@suse.de>
[agraf: Fix x86_64 breakage]
2018-07-25 14:57:44 +02:00
Simon Glass
416e07e2cf efi: Drop error return in efi_carve_out_dt_rsv()
This function currently returns an error code, but never uses it. There is
no function comment so it is not obvious why. Presuambly the error is not
important.

Update the function to explain its purpose and why it ignores the error.
Drop the useful error return value.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-07-25 14:57:44 +02:00
Simon Glass
bc9a638a10 efi: Tidy up device-tree-size calculation in copy_fdt()
This is a bit confusing at present since it adds 4KB to the pointer, then
rounds it up. It looks like a bug, but is not.

Move the 4KB addition into a separate statement and expand the comment.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-07-25 14:57:44 +02:00
Simon Glass
404ea59364 efi_selftest: Clean up a few comments and messages
Fix the 'amp' typo, expand on what 'steps' is and fix a few other minor
things.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-07-25 14:57:44 +02:00
Simon Glass
d7ae1609a9 vsprintf: Handle NULL with %pU
At present a NULL pointer passed to printf for a %pU argument will cause
U-Boot to access memory at 0. Fix this by adding a check, and print
"(null)" instead.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alexander Graf <agraf@suse.de>
[agraf: s/(null)/<NULL>/]
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-07-25 14:57:44 +02:00
Alexander Graf
282a06cbca efi_loader: Expose U-Boot addresses in memory map for sandbox
We currently expose host addresses in the EFI memory map. That can be
bad if we ever want to use sandbox to boot strap a real kernel, because
then the kernel would fetch its memory table from our host virtual address
map. But to make that use case work, we would need to have full control
over the address space the EFI application sees.

So let's expose only U-Boot addresses to the guest until we get to the
point of allocation. EFI's allocation functions are fun - they can take
U-Boot addresses as input values for hints and return host addresses as
allocation results through the same uint64_t * parameter. So we need to
be extra careful on what to pass in when.

With this patch I am successfully able to run the efi selftest suite as
well as grub.efi on aarch64.

Signed-off-by: Alexander Graf <agraf@suse.de>
2018-07-25 14:57:44 +02:00
Simon Glass
69259b8367 efi: sandbox: Adjust memory usage for sandbox
With sandbox the U-Boot code is not mapped into the sandbox memory range
so does not need to be excluded when allocating EFI memory. Update the EFI
memory init code to take account of that.

Signed-off-by: Simon Glass <sjg@chromium.org>
[agraf: Remove map_sysmem() call and header reference]
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-07-25 14:57:44 +02:00
Alexander Graf
b34662d03b efi_loader: Use common elf.h reloc defines
Now that elf.h contains relocation defines for all architectures
we care about, let's just include it unconditionally and refer to
the defines.

Signed-off-by: Alexander Graf <agraf@suse.de>
2018-07-25 14:57:43 +02:00
Alexander Graf
dae73c4cdc elf: Move x86 reloc defines to common elf.h
We need to know about x86 relocation definitions even in cases where
we don't officially build against the x86 target, such as with sandbox.

So let's move the x86 definitions into the common elf header, where all
other architectures already have them.

Signed-off-by: Alexander Graf <agraf@suse.de>
2018-07-25 14:57:43 +02:00
Alexander Graf
bc028919e4 efi_loader: Move to compiler based target architecture determination
Thanks to CONFIG_SANDBOX, we can not rely on config options to tell us
what CPU architecture we're running on.

The compiler however does know that, so let's just move the ifdefs over
to compiler based defines rather than kconfig based options.

Signed-off-by: Alexander Graf <agraf@suse.de>
2018-07-25 14:57:43 +02:00
Alexander Graf
beb077a2a8 efi_loader: Introduce ms abi vararg helpers
Varargs differ between sysv and ms abi. On x86_64 we have to follow the ms
abi though, so we also need to make sure we use x86_64 varargs helpers.

This patch introduces generic efi vararg helpers that adhere to the
respective EFI ABI. That way we can deal with them properly from efi
loader code and properly interpret variable arguments.

This fixes the InstallMultipleProtocolInterfaces tests in the efi selftests
on x86_64 for me.

Signed-off-by: Alexander Graf <agraf@suse.de>
2018-07-25 14:57:43 +02:00
Alexander Graf
c034bfab29 efi_loader: Disable miniapps on sandbox
In the sandbox environment we can not easily build efi stub binaries
right now, so let's disable the respective test cases for the efi
selftest suite.

Signed-off-by: Alexander Graf <agraf@suse.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-07-25 14:57:43 +02:00
Heinrich Schuchardt
aa909462d0 efi_loader: efi_allocate_pages is too restrictive
When running on the sandbox the stack is not necessarily at a higher memory
address than the highest free memory.

There is no reason why the checking of the highest memory address should be
more restrictive for EFI_ALLOCATE_ANY_PAGES than for
EFI_ALLOCATE_MAX_ADDRESS.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
[agraf: use -1ULL instead]
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-07-25 14:57:43 +02:00
Alexander Graf
62f3757870 efi_loader: Allow SMBIOS tables in highmem
We try hard to make sure that SMBIOS tables live in the lower 32bit.
However, when we can not find any space at all there, we should not
error out but instead just fall back to map them in the full address
space instead.

This can for example happen on systems that do not have any RAM mapped
in the lower 32bits of address space. In that case having any SMBIOS
tables at all is better than having none.

Signed-off-by: Alexander Graf <agraf@suse.de>
2018-07-25 14:57:43 +02:00
Alexander Graf
354264b31d efi_loader: Use map_sysmem() in bootefi command
The bootefi command gets a few addresses as values passed in. In sandbox,
these values are in U-Boot address space, so we need to make sure we
explicitly call map_sysmem() on them to be able to access them.

Signed-off-by: Alexander Graf <agraf@suse.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-07-25 14:57:43 +02:00
Alexander Graf
b59f69712b efi_loader: Use compiler constants for image loader
The EFI image loader tries to determine which target architecture we're
working with to only load PE binaries that match.

So far this has worked based on CONFIG defines, because the target CPU
was always indicated by a config define. With sandbox however, this is
not longer true as all sandbox targets only encompass a single CONFIG
option and so we need to use compiler defines to determine the CPU
architecture.

Signed-off-by: Alexander Graf <agraf@suse.de>
2018-07-25 14:57:43 +02:00
Mark Kettenis
c726913a98 Revert "efi_loader: no support for ARMV7_NONSEC=y"
This reverts commit c524997acb.

Booting ARMv7 in non-secure mode using bootefi works now.

Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-07-25 14:57:43 +02:00
Mark Kettenis
d32e86bde8 ARM: HYP/non-sec: enable ARMV7_LPAE if HYP mode is supported
ARMV7_LPAE is required in order to enable the MMU in HYP mode.
And we really want to enable the MMU in HYP mode such that we can
enable the the caches.  Otherwise U-Boot code (such as the EFI
implementation) that runs in HYP mode will run at a snils pace.

Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-07-25 14:57:43 +02:00
Mark Kettenis
f17f2001eb efi_loader: ARM: don't attempt to enter non-secure mode twice
Multiple EFI binaries may be executed in sequence.  So if we already
are in non-secure mode after running the first one we should skip
the switching code since it no longer works once we're non-secure.

Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-07-25 14:57:43 +02:00
Mark Kettenis
dc500c3694 efi_loader: ARM: run EFI payloads non-secure
If desired (and possible) switch into HYP mode or non-secure SVC mode
before calling the entry point of an EFI application.  This allows
U-Boot to provide a usable PSCI implementation and makes it possible
to boot kernels into hypervisor mode using an EFI bootloader.

Based on diffs from Heinrich Schuchardt and Alexander Graf.

Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
[agraf: Fix indentation]
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-07-25 14:57:43 +02:00
Mark Kettenis
907ee2945e ARM: HYP/non-sec: migrate stack
The current code that switches into HYP mode doesn't bother to set
up a stack for HYP mode.  This doesn't work for EFI applications
as they expect a usable stack.  Fix this by migrating the stack
pointer from SP_svc to SP_hyp while in Monitor mode.
This restores the stack pointer when we drop into HYP mode.

Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-07-25 14:57:43 +02:00
Heinrich Schuchardt
f260bd30e8 efi_selftest: update .gitignore
The following generated files should be ignored by git:
efi_miniapp_file_image_exit.h
efi_miniapp_file_image_return.h

*.so files are normally deleted during the build but should be
ignored too.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-07-25 14:57:43 +02:00
Tom Rini
73a555d12a Merge branch 'master' of git://git.denx.de/u-boot-uniphier 2018-07-24 22:46:50 -04:00
Masahiro Yamada
7ef5b1e7ed ARM: uniphier: enable distro boot
Switch to the distro boot for UniPhier platform.

 - Remove the environment vairalbes used to load images from raw
   block devices.

 - Keep the command to download images via tftp.  This will be
   useful to boot the kernel when no valid kernel image is ready
   yet in the file system.

 - Use root.cpio.gz instead of root.cpio.uboot because we always know
   the file size of the init ramdisk; it is loaded via either a file
   system or network.

 - Rename fit_addr_r to kernel_addr_r, which the distro command
   checks to get the load address of FIT image.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-07-25 08:47:53 +09:00
Masahiro Yamada
ae7a0d5b66 ARM: uniphier: enable MTD partition and UBI
Enable "mtdparts" and "ubi" commands for uniphier_v8_defconfig to
use UBI on NAND devices.

Enable only "mtdparts" for uniphier_{v7,ld4_sld8}_defconfig because
enabling UBI would increase 170KB, which would be memory footprint
problem.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-07-25 08:47:53 +09:00
Masahiro Yamada
bb04d2ec4d ARM: uniphier: support fdt_fixup_mtdparts
Propagate the "mtdparts" environment variable to the DT passed
in to OS.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-07-25 08:47:53 +09:00
Masahiro Yamada
65fce76301 ARM: uniphier: split ft_board_setup() out to a separate file
Prepare to add more fdt fixup code.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-07-25 08:47:53 +09:00
Masahiro Yamada
e968715302 ARM: uniphier: clean-up ft_board_setup()
The 'bd' is passed in ft_board_setup() as the second argument.
Replace 'gd->bd' with 'bd'.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-07-25 08:47:53 +09:00
Masahiro Yamada
b35fb6ace6 board: constify struct node_info array
Add 'const' (also 'static' in some places) to struct node_info
arrays to save memory footprint.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-07-25 08:47:52 +09:00
Masahiro Yamada
5f4e32d058 fdt_support: make fdt_fixup_mtdparts() prototype more specific
The second argument of fdt_fixup_mtdparts() is an opaque pointer,
'void *node_info', hence callers can pass any pointer.

Obviously, fdt_fixup_mtdparts() expects 'struct node_info *'
otherwise, it crashes run-time.

Change the prototype so that it is compile-time checked.

Also, add 'const' qualifier to it so that callers can constify
the struct node_info arrays.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-07-25 08:47:52 +09:00
Masahiro Yamada
4a610fada1 mtd: nand: denali: correct buffer alignment for DMA transfer
The NAND framework makes sure to pass in the buffer with at least
chip->buf_align alignment.  Currently, the Denali NAND driver only
requests 16 byte alignment.  This causes unaligned cache operations
for the DMA transfer.

[Error Example]

=> nand read 81000010 0 1000

NAND read: device 0 offset 0x0, size 0x1000
CACHE: Misaligned operation at range [81000010, 81001010]
CACHE: Misaligned operation at range [81000010, 81001010]
CACHE: Misaligned operation at range [81000010, 81001010]
CACHE: Misaligned operation at range [81000010, 81001010]
 4096 bytes read: OK

Reported-by: Marek Vasut <marex@denx.de>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-07-25 08:47:52 +09:00
Luis Araneda
0dc4addb91 kconfig: Avoid format overflow warning from GCC 8.1
cherry-pick kernel commit 2ae89c7 (2018-06-05)
to avoid warnings when compiling with GCC 8.1

In file included from scripts/kconfig/zconf.tab.c:2486:
scripts/kconfig/confdata.c: In function ‘conf_write’:
scripts/kconfig/confdata.c:771:22: warning: ‘%s’ directive writing likely 7 or more bytes into a region of size between 1 and 4097 [-Wformat-overflow=]
  sprintf(newname, "%s%s", dirname, basename);
                      ^~
scripts/kconfig/confdata.c:771:19: note: assuming directive output of 7 bytes
  sprintf(newname, "%s%s", dirname, basename);
                   ^~~~~~
scripts/kconfig/confdata.c:771:2: note: ‘sprintf’ output 1 or more bytes (assuming 4104) into a destination of size 4097
  sprintf(newname, "%s%s", dirname, basename);
  ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
scripts/kconfig/confdata.c:774:23: warning: ‘.tmpconfig.’ directive writing 11 bytes into a region of size between 1 and 4097 [-Wformat-overflow=]
   sprintf(tmpname, "%s.tmpconfig.%d", dirname, (int)getpid());
                       ^~~~~~~~~~~
scripts/kconfig/confdata.c:774:3: note: ‘sprintf’ output between 13 and 4119 bytes into a destination of size 4097
   sprintf(tmpname, "%s.tmpconfig.%d", dirname, (int)getpid());
   ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

Signed-off-by: Luis Araneda <luaraneda@gmail.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-07-25 08:47:52 +09:00
Marek Vasut
a6759e3dfc ARM: rmobile: gen2: Enable ACTLR[0] (Enable invalidates of BTB) to facilitate CVE_2017-5715 WA in OS
Enable CVE_2017_5715 mitigation on CPU0 on R-Car H2, M2W, M2N, V2H,
which all contain Cortex-A15 cores. R-Car E2 contains only Cortex-A7
cores and is not affected. Without this enabled, Linux kernel reports:

  CPU0: Spectre v2: firmware did not set auxiliary control register IBE bit, system vulnerable

With this enabled, Linux kernel reports:

  CPU0: Spectre v2: using ICIALLU workaround

NOTE: This by itself does not enable the workaround for other CPUs
      than CPU0 and may require additional kernel patches for the
      other CPUs in SMP configurations.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nishanth Menon <nm@ti.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-07-25 00:14:19 +02:00
Marek Vasut
64eeb15854 ARM: dts: socfpga: Adjust NAND register layout on Arria10
Adjust the NAND register size on Arria10 to reflect reality.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
2018-07-25 00:13:32 +02:00
Marek Vasut
42f4b83b52 ARM: socfpga: Init missing security policies on A10
The Arria10 requires proper configuration of the NOC firewall, otherwise
the access to certain areas of the LWHPS bridge fails in Linux. Add the
missing setup.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
2018-07-25 00:13:32 +02:00
Marek Vasut
937db7188e ARM: socfpga: Assure correct CPACR configuration
Make sure the ARM CPACR register is zeroed out, this is mandatory
on Arria10.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
2018-07-25 00:13:32 +02:00
Ley Foon Tan
00057eea66 arm: socfpga: Fixes: Rename CONFIG_SPL_RESET_SUPPORT to CONFIG_SPL_DM_RESET
Commit bfc6bae8fa

This commit rename CONFIG_SPL_RESET_SUPPORT to CONFIG_SPL_DM_RESET. Update
with new CONFIG name and enable CONFIG_SPL_DM_RESET when CONFIG_DM_RESET is enabled.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Acked-by: Marek Vasut <marex@denx.de>
2018-07-25 00:13:32 +02:00
Michal Simek
7ca264f045 mailmap: Fix broken email from fit_image.c
The patch
"tools/mkimage: Fix DTC run command to handle file names with space"
(sha1: a6e9810495) contains comma in name
which is confusing patman. Fix it by defining Mirza's email in mailmap.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-07-24 09:25:23 -04:00
Adam Ford
44d1b7deeb configs: am3517-evm: Setup NAND booting
The NAND offsets for the kernel and U-Boot were missing.
This patch sets up the offsets so the AM3517-EVM can boot from NAND
when DIP switches S7:1 and S7:4 are to the OFF position

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-07-24 09:25:23 -04:00
Adam Ford
a745a3369a ARM: AM3517-EVM: Update Maintainer
The previous e-mail pointing to Vaibhav Hiremath <hvaibhav@ti.com>
is bouncing and has for some time.  This updates it to myself and I
work for Logic PD the manufacturer of the AM3517-SOM and EVM

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-07-24 09:25:23 -04:00
Heinrich Schuchardt
0cd07a90a9 config: remove unused CONFIG_SPL_RELOC_STACK_SIZE
Symbol CONFIG_SPL_RELOC_STACK_SIZE is not used anywhere. So remove it.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-07-24 09:25:23 -04:00
Breno Lima
ad7061ed74 doc: Move device tree bindings documentation to doc/device-tree-bindings
Currently the U-Boot project contains 2 documentation directories:

- doc/
- Documentation/

The Documentation directory only contains device tree bindings related
content, so move the 3 files to doc/device-tree-bindings/.

Signed-off-by: Breno Lima <breno.lima@nxp.com>
2018-07-24 09:25:23 -04:00
Michal Simek
4a8b6e0101 mkimage: fit_image: Use macros from image.h
There is no reason not to use macros which are already defined.
It is also much easier for grepping.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-07-24 09:25:23 -04:00
Guillaume GARDET
69ca343906 omap3: beagle: re-enable EFI support after the following commit removed it by mistake:
commit d233ccb1d8
  ARM: omap3: beagle: Enable DM_SERIAL, update distro usage and NAND layout

Signed-off-by: Guillaume GARDET <guillaume.gardet@free.fr>
Cc: Derald D. Woods <woods.technical@gmail.com>
Cc: Tom Rini <trini@konsulko.com>
2018-07-24 09:25:23 -04:00
Paulo Zaneti
02db5488bc spl: remove dependency to "asm/utils.h"
Header file "asm/utils.h" is not required to compile "spl_ymodem.c".
So, removing this dependency allows other architectures to use this
booting device as "asm/utils.h" is only present in "arm" architecture.

Signed-off-by: Paulo Zaneti <paulo.zaneti@datacom.ind.br>
2018-07-24 09:25:23 -04:00
Zubair Lutfullah Kakakhel
f1b20acb4a hashtable: Fix length calculation in hexport_r
The length returned by hexport_r has a few redundant characters.
This appears as NULL characters at the end so seems harmless.

Remove the surplus counts in two places

totlen += strlen(ep->key) + 2;
I'm guessing the +2 here is for = and sep char. But there is another
totlen += 2; line that does that.

size = totletn + 1;
Doesn't make sense and isn't justified with any comment.

Signed-off-by: Zubair Lutfullah Kakakhel <zubair@resin.io>
2018-07-24 09:25:23 -04:00
Igor Opaniuk
e9ee7398d6 avb2.0: use block API in AVB ops
Use blk_dread()/blk_dwrite() in mmc_read()/mmc_write() AVB operation
implementations. This fixes compilation issues when CONFIG_BLK is
enabled.

Signed-off-by: Igor Opaniuk <igor.opaniuk@linaro.org>
Tested-by: Eugeniu Rosca <rosca.eugeniu@gmail.com>
2018-07-24 09:25:23 -04:00
Igor Opaniuk
b0aa74a264 avb2.0: add proper dependencies
1. Since libavb library alone is highly portable, introduce dedicated
Kconfig symbol for AVB bootloader-dependent operations, so it's possible
to build libavb separately. AVB bootloader-dependent operations include:
  * Helpers to process strings in order to build OS bootargs.
  * Helpers to access MMC, similar to drivers/fastboot/fb_mmc.c.
  * Helpers to alloc/init/free avb ops.
2. Add CONFIG_FASTBOOT dependency, as fastboot buffer is
re-used in partition verification operations.

Reported-by: Eugeniu Rosca <rosca.eugeniu@gmail.com>
Signed-off-by: Igor Opaniuk <igor.opaniuk@linaro.org>
Reviewed-by: Eugeniu Rosca <rosca.eugeniu@gmail.com>
Tested-by: Eugeniu Rosca <rosca.eugeniu@gmail.com>
2018-07-24 09:25:23 -04:00
Kay Potthoff
149c21b098 mtdparts: fixed buffer overflow bug
In the case that there was no name defined for a partition the
code assumes that name_len is 22 and therefore allocates exactly
that space for a dummy name. But the function sprintf() first
resolves "0x%08llx@0x%08llx" to a string that is longer than 22
bytes. This leads to a buffer overflow. The replacement function
snprintf() limits the copied bytes to name_len and therefore
avoids the buffer overflow.

Signed-off-by: Kay Potthoff <Kay.Potthoff@microsys.de>
2018-07-24 09:25:23 -04:00
Patrice Chotard
4807c40c2f board: STiH410-B2260: Set SYS_BOOTM_LEN to 16M
With recent kernel v4.18-rcx, uImage becomes bigger than 8MB.
Set SYS_BOOTM_LEN to 16MB, this fix the following error message:
"Fix Loading Kernel Image ... Image too large: increase
CONFIG_SYS_BOOTM_LEN"

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-07-24 09:25:23 -04:00
Miquel Raynal
980f65dc6c mtd: remove stale comment in mtd_oob_ops structure
A comment in the kernel doc of the mtd_oob_ops structure tells that it
is not possible to write more than one page with OOB. This was
probably true at some time in the past but today it is entirely wrong.

As one can see for instance in the nand_do_write_ops() helper available
in the NAND core, this implementation called by mtd->_write_oob()
simply loops over the pages until everything has been written.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-07-24 09:25:23 -04:00
AKASHI Takahiro
8cffb50ab3 rtc: compile date.c if DM_RTC
rtc_to_tm() and rtc_mktime() are required for some RTC drivers, at least
PL031. Without this patch, we also need to enable CONFIG_CMD_DATE even if
we don't want or need this command.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-07-24 09:25:23 -04:00
Rafał Miłecki
323a73adc9 mtd: nand: add new enum for storing ECC algorithm
Our nand_ecc_modes_t is already a bit abused by value NAND_ECC_SOFT_BCH.
This enum should store ECC mode only and putting algorithm details there
is a bad idea. It would result in too many values impossible to support
in a sane way.

To solve this problem let's add a new enum. We'll have to modify all
drivers to set it properly but once it's done it'll be possible to drop
NAND_ECC_SOFT_BCH. That will result in a cleaner design and more
possibilities like setting ECC algorithm for hardware ECC mode.

Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
[Linux commit: b0fcd8ab7b3c89b5da7fff5224d06ed73e7a33cc]
[Philippe Reynes: adapt code to u-boot]
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2018-07-23 14:33:21 -04:00
Adam Ford
d5674d62ce ARM: configs: omap3_logic: remove Legacy OMAP3 USB driver
Only the MUSB driver is currently supported on the omap3_logic
boards.  The driver is using the new-musb and not the legacy
version, so this patch removes the dead code references.

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-07-23 14:33:21 -04:00
Adam Ford
5d653afc17 Convert CONFIG_DA8XX_GPIO to Kconfig
This converts the following to Kconfig:
   CONFIG_DA8XX_GPIO

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-07-23 14:33:21 -04:00
Adam Ford
d7cc15bb53 ARM: DTS: am3517-evm-u-boot: Mark MMC1 with cd-inverted
In order to use the device tree for MMC, the card-detect pin
needs to be inverted.  This patch places this into the
am3517-evm-u-boot.dtsi file to keep the main DTS and DTSI files
clean and in-sync with Linux

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-07-23 14:33:21 -04:00
Adam Ford
972edd4930 ARM: dts: am3517-evm-uboot: Add reg-shift for UART
With the resync of the omap3.dtsi file, the reg-shift was removed
so it breaks the UART.  Adding the reg-shift into the
am3517-evm-u-boot.dtsi keeps the reg-shift for U-Boot, but keeps
the dts/dtsi files clean from Linux.

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-07-23 14:33:21 -04:00
Mario Six
78a88f7930 doc: Replace DocBook with sphinx-based docs
The Linux kernel moved to sphinx-based documentation and got rid of the
DocBook based documentation quite a while ago. Hence, the DocBook
documentation for U-Boot should be converted as well.

To achieve this, import the necessary files from Linux v4.17, and
convert the current DocBook documentation (three files altogether) to
sphinx/reStructuredText.

For now, all old DocBook documentation was merged into a single
handbook, tentatively named "U-Boot Hacker Manual".

For some source files, the documentation style was changed to comply
with kernel-doc; no functional changes were applied.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-07-23 14:33:21 -04:00
Adam Ford
5448ff33f2 ARM: DTS: Resync Logic PD SOM-LV 37xx devkit with Linux 4.18-RC4
There have been some significant changes to the DM37 SOM-LV device
tree.  This patch re-syncs it with Linux.

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-07-23 14:33:21 -04:00
Adam Ford
e6ea2390cd ARM: DTS: Resync LogicPD-Torpedo-37xx-devkit with Linux 4.18-RC4
There have been some refactoring of the DTS files for the Logic PD
DM37 Torpedo.  This patch re-sync's the DTS files with Linux

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-07-23 14:33:21 -04:00
Adam Ford
66dae3bbca ARM: dts: Resync OMAP3 and omap36xx with Linux 4.18-RC4
There have been several minor changes to the OMAP3.dtsi, so this
patch re-syncs it with Linux.  An addition include/dt-binding was
also brought with it.

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-07-23 14:33:21 -04:00
Adam Ford
b8dbec5fb6 ARM: DTS: Resync am3517-evm.dts with Linux 4.18-rc4
Several changes have been made to the AM3517-evm and the underlying
am3517.dtsi file.  This patch re-sync's the DTS and DTSI files with
Linux.

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-07-23 14:33:21 -04:00
Tom Rini
b740074ac4 m68k: m5253evbe: Remove this board
The m5253evbe board has been marked as orphan since June of 2014 and
should have been dropped a while ago.  Do so now.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-07-23 14:33:21 -04:00
Christophe Kerello
d68b6ad138 spi: stm32_qspi: rework mode management
This patch solves quad read issue with Macronix/Micron spi nor.

Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-07-23 14:33:21 -04:00
Christophe Kerello
ceff933e1e spi: stm32_qspi: assign functional operation mode in _stm32_qspi_gen_ccr
This patch assigns the functional operation mode in _stm32_qspi_gen_ccr
function.

Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-07-23 14:33:21 -04:00
Heinrich Schuchardt
f53424e650 bios_emulator: remove assignment without effect
Assigning a parameter which is not used afterwards has not effect.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-07-23 14:33:21 -04:00
Tom Rini
f0306a145b Merge branch 'master' of git://git.denx.de/u-boot-imx
trini: Update colibri-imx6ull to use Kconfig for mtdparts related
options.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-07-23 13:37:42 -04:00
Adam Ford
f97f167107 configs: imx6q_logic: Cleanup ramdiskaddr and fdtaddr
There are already definitions for ramdisk_addr_r and fdt_addr_r, so
having a duplicate copy called ramdiskaddr and fdtaddr is confusing.
This patch converts any references to ramdisk_addr_r and fdt_addr_r
and removes the duplicates.

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-07-23 11:05:54 +02:00
Martin Kaiser
0d38a5fd44 mx25: fix the offset between the USB ports' registers
The USBOH module on imx25 chips contains two USB controllers which are
called USB OTG Controller and USB Host Controller. Each one has its EHCI
root hub. The OTG Controller's EHCI registers start at offset 0, the Host
Controller's registers start at offset 0x400.

We set CONFIG_MXC_USB_PORT=0 to select the OTG Controller and 1 for the
Host Controller. Therefore, IMX_USB_PORT_OFFSET must be 0x400. Using
this setting, the Host Controller starts working on my imx25 board.

Please note that the imx25 reference manual claims that the Host
Controller's registers start at 0x200. This is not correct. The Linux
Kernel uses the correct offset 0x400 in imx25.dtsi.

Signed-off-by: Martin Kaiser <martin@kaiser.cx>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-07-23 11:05:04 +02:00
Holger Dengler
7e1a0483c3 tools/imximage: get HAB information from header
Signing parts of a u-boot imximage for image verification in High
Assurance Boot (HAB) in a post-build process, requires some
information from the imximage header. Currently, this information is
only provided during the image build, which makes the transfer of this
information to the post-build process harder than necessary.

The i.MX HAB information (start and length) can be calculated either
by using information from the image-configuration file, or from the
information in the flash header of the imximage.
The advantage of using information from flash header is, that they are
not only available during image creation, but also available if
existing images are processed.

Example:
$ tools/mkimage -l u-boot.imx
Image Type:   Freescale IMX Boot Image
Image Ver:    2 (i.MX53/6/7 compatible)
Mode:         DCD
Data Size:    483328 Bytes = 472.00 KiB = 0.46 MiB
Load Address: 877ff420
Entry Point:  87800000
HAB Blocks:   0x877ff400 0x00000000 0x00071c00
DCD Blocks:   0x00910000 0x0000002c 0x00000208

Signed-off-by: Holger Dengler <dengler@linutronix.de>
Tested-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
2018-07-23 11:04:22 +02:00
Ludwig Zenz
e16f2de0c4 ARM: dh_imx6: enable GigaDevice, Macronix, and Winbond SPI Flash support in Kconfig
In preparation for delivery bottlenecks, enable support for GigaDevice, Macronix, and Winbond nor flash chips.

Signed-off-by: Ludwig Zenz <lzenz@dh-electronics.de>
2018-07-23 11:03:45 +02:00
Adam Ford
bbbb50f9fd imx: i.mx6q: imx6q_logic: Migrate to SPL and enable SDP
Since the vast majority of i.MX6 boards are migrating to SPL,
this patch converts im6q_logic to SPL and enables the SDP for
loading SPL and u-boot.img over USB.  The Falcon mode only
supports NAND flash as of now due to limited space/RAM, but
all i.MX6D/Q SOM's from Logic PD have internal NAND from which
to boot.

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-07-23 11:03:20 +02:00
Ludwig Zenz
0481bef035 ARM: imx6: DHCOM i.MX6 PDK: ddr init for 32bit bus and 4GBit chips
Support 1GIB + 2GIB DDR3 with 64bit bus width and 512MIB + 1GIB with 32bit bus width

Signed-off-by: Ludwig Zenz <lzenz@dh-electronics.de>
2018-07-23 11:02:14 +02:00
Ludwig Zenz
659ca2dd08 ARM: imx6: configure ddrcode pins in spl DHCOM i.MX6 PDK
Preperation for conditional DDR3 initialization based on GPIO codes.

Signed-off-by: Ludwig Zenz <lzenz@dh-electronics.de>
2018-07-23 11:02:03 +02:00
Ludwig Zenz
3d81584d40 Revert "ARM: imx6: Disable DDR DRAM calibration DHCOM i.MX6 PDK"
This reverts commit a637fe6f27.

The DDR DRAM calibration was enhanced by write leveling correction code.
It can be used with T-topology now.

Signed-off-by: Ludwig Zenz <lzenz@dh-electronics.de>
2018-07-23 11:01:41 +02:00
Otavio Salvador
3a68ad4935 pico-imx7d: Add new pico-pi config
The new config skips the boot menu which asks which board is in
use. This is useful to allow direct booting of image without user
iteration.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2018-07-23 10:59:48 +02:00
Otavio Salvador
0a7b54f587 pico-imx7d: README: Drop old instructions about secure mode
Our default config already has the secure mode supported, so the
manual step is not required anymore.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2018-07-23 10:59:48 +02:00
Otavio Salvador
619fc167b6 pico-imx7d: README: Use dfu-util to flash U-Boot
The DFU allows a more user friendly use as the details where the
bootloader is installed are abstracted.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2018-07-23 10:59:48 +02:00
Otavio Salvador
190702af51 pico-imx7d: Enable auxiliary code support
This enables the "bootaux" command so a firmware can be loaded inside
the M4 MCU.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2018-07-23 10:59:48 +02:00
Otavio Salvador
4f96670104 pico-imx7d: Allow default fdtfile to be overridden by defconfig
This allow the addition of extra default configurations for each
baseboard, removing the boot menu when user boots for the first time.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2018-07-23 10:59:48 +02:00
Fabio Estevam
e5ccad5d00 pico-imx7d: Do not override addrmap5
The addrmap5 value is the same for the 512MB and 1GB variants,
so there is no need to override it.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2018-07-23 10:59:48 +02:00
Fabio Estevam
c6f69fe712 pico-imx7d: Enable CONFIG_ARMV7_BOOT_SEC_DEFAULT
Currently the CAAM driver fails to be probed:

caam 30900000.caam: Entropy delay = 3200
caam 30900000.caam: failed to acquire DECO 0
caam 30900000.caam: failed to instantiate RNG

CAAM needs to be initialized in secure world, so enable
CONFIG_ARMV7_BOOT_SEC_DEFAULT to allow the driver to
probe successfully.

Tested with kernel mainline version 4.17.2.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2018-07-23 10:59:48 +02:00
Fabio Estevam
78d30a1bc0 pico-imx7d: Add Falcon mode support
Falcon mode boots the kernel directly from SPL, without loading
the full U-Boot.

As pico-imx7d does not have a GPIO for selecting Falcon versus
normal mode, enter in Falcon mode when the customer selects
the CONFIG_SPL_OS_BOOT option in menuconfig.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2018-07-23 10:59:48 +02:00
Otavio Salvador
22dda6bd8b pico-imx7d: Add bootmenu to choose the baseboard
Currently the baseboards do not offer a way to autodetect which one is
in use, so we ask the user if no value has been set.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2018-07-23 10:59:48 +02:00
Fabio Berton
1e64642694 pico-imx7d: Add support for update SPL using DFU
Add spl entry on dfu_alt_info to be able to update U-Boot with SPL
for pico imx7d board.

Signed-off-by: Fabio Berton <fabio.berton@ossystems.com.br>
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2018-07-23 10:59:48 +02:00
Fabio Estevam
d5b7177f91 pico-imx7d: Add SPL support
Convert pico-imx7d to SPL support.

There are two variants of pico-imx7d SOMs:
- One with 512MB of RAM
- One with 1GB of RAM

The 512MB module contains two Hynix H5TC2G63GFR-PBA.
The 1GB module contains two Hynix H5TC4G63GFR-PBA.

The RAM size is determined in runtime by reading GPIO1_12.

While at it, also add USB Serial Download mode support as it
is very helpful for loading SPL and u-boot.img via imx_usb_loader.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2018-07-23 10:59:48 +02:00
Fabio Estevam
3fbbfed7a8 pico-imx7d: Add fastboot support
fastboot tool is a convenient way to flash the eMMC, so
add support for it.

Examples of usages:

On the pico-imx7d U-Boot prompt:

=> fastboot 0

On the Linux PC connected via USB:

1. Retrieving the U-Boot version

$ sudo fastboot getvar bootloader-version -i 0x0525
bootloader-version: U-Boot 2018.07-rc1-03888-gde846f9
finished. total time: 0.000s

2. Resetting the board

$ sudo fastboot reboot -i 0x0525

(this causes the pico-imx7d to reboot)

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2018-07-23 10:59:48 +02:00
Otavio Salvador
0676b6948d pico-imx7d: Add default DFU targets
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2018-07-23 10:59:48 +02:00
Otavio Salvador
4242de43bb pico-imx7d: Add GPT partitioning support
This allow the use of:

> run setup_emmc

inside of the U-Boot prompt to do the partitioning of the disk.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2018-07-23 10:59:48 +02:00
Otavio Salvador
7985987dc4 pico-imx7d: Fix common distro configuration behavior
This sets DISTRO_CONFIG and BOOTCOMMAND, as well as add a `finduuid`
environment helper to allow it to properly work with Yocto Project and
other distributions using extlinux autogenerated configuration files.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2018-07-23 10:59:48 +02:00
Fabio Estevam
7bbce215d8 pico-imx7d: Convert to distro config
Instead of keeping a custom environment, use a more generic approach
by switching to disto config.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2018-07-23 10:59:48 +02:00
Mark Jonas
9ea7519383 arm, imx6: add alternative PAD_CTL_DSE constants
Not all i.MX6 pads use the same drive strength table. So far only the
240 Ohm to 34 Ohm table was available. Because the constants used have
speaking names it can be confusing to use e.g. PAD_CTL_DSE_48ohm when
according to the reference manual 52 Ohm is the correct value. This
patch adds the 260 Ohm to 37 Ohm table.

For example, the IOMUXC_SW_PAD_CTL_PAD_SD2_CLK register (SD-card clock)
uses the added table.

Signed-off-by: Mark Jonas <mark.jonas@de.bosch.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
2018-07-23 10:57:39 +02:00
Stefan Agner
a19797b22c colibri_imx7: improve DDR3 timing
This makes sure that all Colibri iMX7 modules work with the
same timing. The changes are:
- Disable ODT on read (JEDEC standard JESD79-3F says in chapter
  5.2.3 ODT during Reads: "As the DDR3 SDRAM can not terminate
  and drive at the same time, RTT must be disabled at least half
  a clock cycle..." and also MX7D SABRESD is disabling it)
  This alone fixed memory issues for two Colibri iMX7 1GB modules
  which showed issues before
- Make sure tRFC(min) is at least 260ns
- Make sure tRC is >50.625ns
- tRP needs to be >13.125ns, we can lower from 18.75ns to 15ns
- tFAW is not relevant, leave at reset

Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2018-07-23 10:56:38 +02:00
Stefan Agner
e38adcecca colibri_imx7: add compatible string used in vanilla Linux
Device trees from vanilla Linux do not specify a i.MX 7 specific
compatible string. Make sure to set partitions also when booting
upstream Linux.

Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
2018-07-23 10:56:27 +02:00
Jon Nettleton
5531460895 mx6cuboxi: Move the default environment for all devices
Previously we had stored the environment right after the
u-boot.img on the disk.  I never liked this because with dtbs
being included and such the image could grow in size.  Instead
we move the environment to be negatively offset from the 1MB
mark.  Almost all our images start at 4MB's, and most standard
images start at 1MB, and all our storage devices are a minimum
1MB.  Therefore we can store env there for all classes of devices
and have plenty of space in case u-boot.img needs to grow.

Signed-off-by: Jon Nettleton <jon@solid-run.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-07-23 10:56:06 +02:00
Stefan Agner
f97df68898 imx: mx7: psci: implement MIGRATE_INFO_TYPE
Implement MIGRATE_INFO_TYPE. This informs Linux that no migration
for the trusted operating system is necessary:
  [    0.000000] psci: Trusted OS migration not required

Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
2018-07-23 10:54:32 +02:00
Stefan Agner
28a5af11f8 imx: mx7: psci: support CPU0 on/off
So far psci_cpu_(on|off) only worked for CPU1. Allow to control
CPU0 too. This allows to run the Linux PSCI checker successfully:
  [    2.213447] psci_checker: PSCI checker started using 2 CPUs
  [    2.219107] psci_checker: Starting hotplug tests
  [    2.223859] psci_checker: Trying to turn off and on again all CPUs
  [    2.267191] IRQ21 no longer affine to CPU0
  [    2.293266] Retrying again to check for CPU kill
  [    2.302269] CPU0 killed.
  [    2.311648] psci_checker: Trying to turn off and on again group 0 (CPUs 0-1)
  [    2.354354] IRQ21 no longer affine to CPU0
  [    2.383222] Retrying again to check for CPU kill
  [    2.392148] CPU0 killed.
  [    2.398063] psci_checker: Hotplug tests passed OK
  [    2.402910] psci_checker: Starting suspend tests (10 cycles per state)
  [    2.410019] psci_checker: cpuidle not available on CPU 0, ignoring
  [    2.416452] psci_checker: cpuidle not available on CPU 1, ignoring
  [    2.422757] psci_checker: Could not start suspend tests on any CPU
  [    2.429370] psci_checker: PSCI checker completed

Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
2018-07-23 10:54:23 +02:00
Stefan Agner
a89eb89b38 imx: mx7: psci: provide complete PSCI 1.0 implementation
PSCI 1.0 require PSCI_VERSION, PSCI_FEATURES, AFFINITY_INFO and
CPU_SUSPEND to be implemented. Commit 0ec3d98f76 ("mx7_common:
use psci 1.0 instead of 0.1") marked the i.MX 7 implementation to
be PSCI 1.0 compliant but failed to implement those functions.
Especially the missing PSCI version callback was noticeable when
booting Linux:

  [    0.000000] psci: probing for conduit method from DT.
  [    0.000000] psci: PSCIv65535.65535 detected in firmware.
  [    0.000000] psci: Using standard PSCI v0.2 function IDs
  [    0.000000] psci: MIGRATE_INFO_TYPE not supported.
  [    0.000000] psci: SMC Calling Convention v1.0

This patch provides a minimal implementation thereof. With this
patch applied Linux detects PSCI 1.0:

  [    0.000000] psci: probing for conduit method from DT.
  [    0.000000] psci: PSCIv1.0 detected in firmware.
  [    0.000000] psci: Using standard PSCI v0.2 function IDs
  [    0.000000] psci: MIGRATE_INFO_TYPE not supported.
  [    0.000000] psci: SMC Calling Convention v1.0

Fixes: 0ec3d98f76 ("mx7_common: use psci 1.0 instead of 0.1")
Suggested-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
2018-07-23 10:54:01 +02:00
Stefan Agner
cff38c5504 imx: mx7: psci: use C code exclusively
There is no need for assembly in the platform specific part of
the PSCI implementation.

Note that this does not make it a complete PSCI 1.0 implementation
yet but aids to do so in upcoming patches.

Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
2018-07-23 10:53:42 +02:00
Stefan Agner
77fcc2cc90 ARM: PSCI: initialize stack pointer on secondary CPUs
A proper stack is required to safely use C code in psci_arch_cpu_entry.

Fixes: 486daaa618 ("arm: psci: add a weak function psci_arch_cpu_entry")
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Patrick DELAUNAY <Patrick.delaunay@st.com>
Tested-by: Patrick DELAUNAY <Patrick.delaunay@st.com>
2018-07-23 10:53:12 +02:00
Uri Mashiach
353432419d arm: imx7d: cl-som-imx7: sf: support all SF types
Enable the support for all SPI flash types.

Signed-off-by: Uri Mashiach <uri.mashiach@compulab.co.il>
Signed-off-by: Yaniv Levinsky <yaniv.levinsky@compulab.co.il>
2018-07-23 10:51:41 +02:00
Michael Trimarchi
3058879982 i.MX6: engicam: gpr_init can be called only for some architecture
Fix an invalid usage of the gpr_init function for the imx6ul
architecture

Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
2018-07-23 10:51:14 +02:00
Michael Trimarchi
4a72abcb71 imx: imx6: Add comment to gpr_init function
This function can be used only for some of the nxp SoC. Make
it explicit in the comment. This adjust a bit commit
3aa4b703b4 ("imx: imx6: Move gpr_init() function to soc.c")

Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
2018-07-23 10:50:53 +02:00
Fabio Estevam
2756d31fae mx7: Remove BMODE support
i.MX7 does not support BMODE due to the erratum e10574 ("Watchdog:
A watchdog timeout or software trigger will not reset the SOC"), so
remove its support.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-07-23 10:50:00 +02:00
Michael Trimarchi
9236269de5 imx: mx6: Fix implementantion reset_misc
lcdif_power_down should not be included in spl build to avoid build
failure introduced by commit eb111bb31d

Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2018-07-23 10:31:52 +02:00
Michael Trimarchi
efd0b79106 eth: dm: fec: Add gpio phy reset binding
Add the missing gpio phy reset binding to the gpio and
reset time configuration

Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-07-23 10:28:01 +02:00
Jon Nettleton
824705d53c mx6cuboxi: Add emmc device tree suffix
Mainline and now the SolidRun 4.9 nxp based tree use the new
reorganization of device-tree files that separate out the emmc
into its own dtb.  u-boot will now look for -emmc in the device
tree name if one is detected.

Signed-off-by: Jon Nettleton <jon@solid-run.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
2018-07-23 10:17:04 +02:00
Jon Nettleton
19ed6063a5 mx6cuboxi: Use mmc_get_op_cond() to check for an eMMC
Previously we had just made broad assumptions with which of our
boards had an eMMC or not even though this is a manufacturing time
assembly option.  This takes the guessing away and actually checks for
the existence of an eMMC and sets up the has_emmc environment variable.

Signed-off-by: Jon Nettleton <jon@solid-run.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
2018-07-23 10:17:04 +02:00
Baruch Siach
c4abe2863a mx6cuboxi: drop CONFIG_SYS_FSL_USDHC_NUM
This macro is not used.

Signed-off-by: Baruch Siach <baruch@tkos.co.il>
2018-07-23 10:17:04 +02:00
Jon Nettleton
86e5a7fc13 mx6cuboxi: Add support for eMMC booting
The HB2 boards as well as rev 1.5 soms support eMMC
booting as well as SDHC.  Add the infrastructure to support
booting these devices.

Signed-off-by: Jon Nettleton <jon@solid-run.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
2018-07-23 10:17:04 +02:00
Jon Nettleton
6c09eba507 mmc: break out get_op_cond code to its own function
This code is useful for testing the existance of devices that
do not have card detect capabilities.  This breaks out the core
functionality and leaves the actual init logic and error reporting
in mmc_start_init().

Signed-off-by: Jon Nettleton <jon@solid-run.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Stefano Babic <sbabic@denx.de>
2018-07-23 10:17:04 +02:00
Baruch Siach
31d9500498 mmc: drop mention of IN_PROGRESS status
The IN_PROGRESS macro has been removed in commit bd47c13583 (mmc: Fix
splitting device initialization). Remove it from the mmc_start_init()
function description.

Signed-off-by: Baruch Siach <baruch@tkos.co.il>
2018-07-23 10:17:04 +02:00
Stefan Agner
31b1e17f44 board: toradex: add Colibri iMX6ULL support
Add support for the Colibri iMX6ULL module which comes with
on-board raw NAND.

Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
2018-07-23 10:12:00 +02:00
Stefan Agner
d826b87519 board: toradex: add new and upcoming SKUs
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
2018-07-23 10:12:00 +02:00
Stefan Agner
55f34f3a9e ARM: dts: imx6ull: use same compatible string as Linux is using
The GPMI NAND IP seems to be the same as used in i.MX 6Quad. Use
the fsl,imx6q-gpmi-nand compatible string like Linux devices trees
are.

Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
2018-07-23 10:12:00 +02:00
Stefan Agner
23eaf4180f imx: add macro to detect whether USB has been initialized
This macro allows to detect whether the boot ROM initialized USB
already (serial downloader). This is helpful to reliably detect
if the system has been recovered via USB serial downloader.

Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2018-07-23 10:12:00 +02:00
Stefan Agner
c7f367bc8d mtd: nand: mxs_nand: add device tree support for i.MX 6
Support i.MX 6 NAND GPMI driver data from device tree.

Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
2018-07-23 10:12:00 +02:00
Stefano Babic
1947c2d2a0 bootcount: flush after storing the bootcounter
If the bootcounter address is in a cached memory,
a flush of dcache must occur after updateing the bootcounter.

Issue found on i.MX6 where bootcounter is put into the internal
(cached) IRAM.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2018-07-23 09:55:20 +02:00
Adam Ford
9c5b00973b Convert CONFIG_MTD_PARTITIONS et al to Kconfig
This converts the following to Kconfig:
   CONFIG_MTD_PARTITIONS
   CONFIG_MTD_DEVICE

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-07-22 19:20:17 -04:00
Adam Ford
8d0d6bc121 configs: Convert CONFIG_USE_NAND to CONFIG_NAND
The DA850-EVM and OMAPL138_LCDK both use checks for CONFIG_USE_NAND.
This patch changes these checks to CONFIG_NAND which is already defined
in Kconfig.  Since the OMAPL138_LCDK already had CONFIG_NAND defined in its
defconfig, it can be deleted from configs/omapl138_lcdk.h.

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-07-21 22:26:59 -04:00
Adam Ford
9d04b5fe16 configs: Make NAND_BOOT and ONENAND_BOOT imply NAND
Some boards indicate support from booting NAND or
ONENAND booting, but don't enable the CONFIG_NAND.  This
makes those boards imply NAND which will make
enabling other flags that are dependent on CONFIG_NAND
possible and easier to migrate.

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-07-21 22:26:58 -04:00
Adam Ford
eba7f1ff6c Convert CONFIG_NAND_DAVINCI to Kconfig
This converts the following to Kconfig:
   CONFIG_NAND_DAVINCI

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-07-21 22:26:56 -04:00
Adam Ford
e7db856bf9 Convert CONFIG_NAND_ATMEL to Kconfig
This converts the following to Kconfig:
   CONFIG_NAND_ATMEL

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-07-21 22:26:28 -04:00
Adam Ford
d294335e5d Convert CONFIG_NAND_LPC32XX_SLC to Kconfig
This converts the following to Kconfig:
   CONFIG_NAND_LPC32XX_SLC

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-07-21 22:26:25 -04:00
York Sun
474ecd2c84 env: Simplify Makefile using $(SPL_TPL_)
Add Kconfig options SPL_ENV_* and TPL_ENV_* and simplify Makefile.
This allows SPL/TPL image has different environment setting from
full feature U-Boot.

Signed-off-by: York Sun <york.sun@nxp.com>
2018-07-21 12:24:31 -04:00
Heinrich Schuchardt
646f1ab4bc env: typo in description of ENV_IS_IN_REMOTE
%s/remove/remote/

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-07-21 12:24:31 -04:00
Tom Rini
83853366e3 Merge branch 'master' of git://git.denx.de/u-boot-rockchip 2018-07-20 22:35:49 -04:00
Klaus Goger
a2a5053a15 rockchip: utilize CONFIG_DEFAULT_FDT_FILE
Currently the fdtfile environment variable is set to
CONFIG_DEFAULT_DEVICE_TREE which is іnternally used as U-Boot devicetree
source. The OS can use a different filename and Kconfig gives us the
ability to select a default devicetree via CONFIG_DEFAULT_FDT_FILE.
This also gives user configuring U-Boot via menuconfig the behaviour
someone would expect.

Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com>
Tested-By: Vagrant Cascadian <vagrant@debian.org>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-07-21 01:56:59 +02:00
Carlo Caione
315ded9730 rockchip: veyron: Set vcc33_sd regulator value
On the veyron board the vcc33_sd regulator is used as vmmc-supply for
the SD card. This regulator is powered in the MMC core during power on
but its value is never actually set.

In the veyron platform the reset value for the LDO output is 1.8V while
the standard (min and max) value for this regulator defined in the DTS
is 3.3V. When the MMC core enable the regulator without setting its
value, the output is automatically set to 1.8V instead of 3.3V.

With this patch we preemptively set the value to 3.3V.

Signed-off-by: Carlo Caione <carlo@endlessm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-07-21 01:55:27 +02:00
Carlo Caione
389167c3c4 rk3288: Disable JTAG function from sdmmc0 IO
The GRF_SOC_CON0.grf_force_jtag bit is automatically set at boot and it
is preventing the SDMMC to work correctly. Disable the JTAG function on
the assumption that a working SD has higher priority over JTAG.

Signed-off-by: Carlo Caione <carlo@endlessm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-07-21 01:55:27 +02:00
Carlo Caione
0d4d5fd73c rk3288: veyron: Init boot-on regulators
Use regulators_enable_boot_on() to init all the regulators with
regulator-boot-on property.

Signed-off-by: Carlo Caione <carlo@endlessm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-07-21 01:55:27 +02:00
Jakob Unterwurzacher
abb8fad097 rockchip: board: lion-rk3368: increase phy autonegotiation timeout
The first dhcp command consistently fails with a timeout when
the lion-rk3368 board is connected to a Zyxel GS1100-24E
Gigabit Ethernet switch:

  ethernet@ff290000 Waiting for PHY auto negotiation to complete......... TIMEOUT !

Increasing PHY_ANEG_TIMEOUT from the default 4000 to 8000 makes the
first dhcp command work reliably.

Signed-off-by: Jakob Unterwurzacher <jakob.unterwurzacher@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-07-21 01:55:26 +02:00
Heinrich Schuchardt
9125947687 rockchip: rk3399: spl: add missing \n to output
Without the patch SPL (in case of an error) creates an output like:

	U-Boot SPL board initMissing DTB

The patch adds the missing line feed. So now we get:

	U-Boot SPL board init
	Missing DTB

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-07-21 01:55:26 +02:00
Heinrich Schuchardt
760b95789e rockchip: doc: clarify usage of CONFIG_SPL_ROCKCHIP_BACK_TO_BROM
Change the description relating to CONFIG_SPL_ROCKCHIP_BACK_TO_BROM to
clarify that both RK3288 and RK3036 use

	CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-07-21 01:55:26 +02:00
Heinrich Schuchardt
19ee1fae09 rockchip: evb-rk3399: correct README for board bring up
%s/rkflashtool/rkdeveloptool/

We are using rkdeveloptool not rkflashtool.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2018-07-21 01:55:26 +02:00
Klaus Goger
41826f6a34 rockchip: rk3399: change boot_target based on u-boot, spl-boot-device
The order distroboot searches for a boot.scr is fixed at compile time.
To make BIOS_DISABLE work as expected and boot from mmc1 instead of
mmc0 if enabled, we need to change the environment at runtime.
Especially as commit: 482cf22333 ("rockchip: rk3399-puma: add boot-on
regulator to override BIOS_DISABLE") enables the eMMC in U-Boot even
if BIOS_DISABLE is active.

Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com>
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-07-21 01:55:26 +02:00
Philipp Tomsich
e5f2ecc750 rockchip: rk3399: inject 'u-boot, spl-boot-device' for next-stage
This implements the new 'spl_perform_fixups' hook for RK3399-based
boards and injects the /chosen/u-boot,spl-boot-device with an ofpath
corresponding to the boot device used.

The intended usage is for the full U-Boot stage to evaluate this in
scripts and then adapt its boot-order when using distro-boot.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
2018-07-21 01:55:26 +02:00
Philipp Tomsich
2aa4abc1bd spl: document 'chosen/u-boot, spl-boot-device'
To let the full U-Boot know where it was booted from (i.e. which of
the entries in /chosen/u-boot,spl-boot-order' contained a valid
image), we define (and document) /chosen/u-boot,spl-boot-device as the
property that could/should automatically be injected by SPL.

This commit only contains a documentation change, which documents the
new property and the intended usage.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
2018-07-21 01:55:26 +02:00
Philipp Tomsich
de5dd4c4e3 spl: record boot_device into spl_image and call spl_perform_fixups
On some boards, we want to give the board/architecture-specific code a
chance to look at where the next image has been loaded from and
perform fixups before starting the next image.  This is of particular
importance, when we probe multiple devices for bootable payloads and
boot the first one found.

This change adds the following:
 - we record the boot_device used into the spl_image structure
 - we provide an extension-point for boards/architectures that can
   perform late fixups depending on a fully populated spl_image
   structure (i.e. we'll know the final boot_device and have info
   on the image type and operating system to be booted).

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
2018-07-21 01:55:26 +02:00
Philipp Tomsich
df253b8fca smartweb: use SPL_TINY_MEMSET
The SPL code for smartweb is close to its limit and adding a few extra
instructions to SPL will cause it to overrun its sram allotement (thus
causing build failures).  To allow adding the 'spl_perform_fixups'
extension point to SPL, we'll enable SPL_TINY_MEMSET for smartweb.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Series-cc: trini
2018-07-21 01:55:26 +02:00
Alexander Kochetkov
706afa46c7 rockchip: rk3188: add rk_board_late_init() hook
All other rockchip boards have rk_board_late_init() hook,
so add it to rk3188 boards also.

Signed-off-by: Alexander Kochetkov <al.kochet@gmail.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-07-21 01:55:25 +02:00
Alexander Kochetkov
5944bd9a25 rockchip: i2c: enable i2c controller for rk3066 and rk3188
rk3066 and rk3188 has two I2C controller implementations.
Current I2C driver wan't work with legacy implementation.
Switching between controllers is performed using a bit inside
GFR_SOC_CON1 register. The bit setting is performed by pinctrl
driver. The patch ask pinctrl to do settings.

Signed-off-by: Alexander Kochetkov <al.kochet@gmail.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
[fix warnings by including the rk3228 variant in the compatible-list]:
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-07-21 01:55:25 +02:00
Tom Rini
e0ed8332fa Merge git://git.denx.de/u-boot-x86 2018-07-20 19:31:30 -04:00
Tom Rini
0dd1fc09bb board/imgtec/boston: Add new defconfigs to the MAINTAINERS list
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-07-20 15:55:10 -04:00
Loic Devulder
f0fd307951 Fix README for Khadas VIM board
Explicitly add 'python' call for 'acs_tool.pyc', to avoid failed
execution on some OSes.

Signed-off-by: Loic Devulder <ldevulder@suse.de>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
2018-07-20 15:55:10 -04:00
Loic Devulder
aa984aa8d8 configs: Update Meson GX configs
Enable ADC support on the Khadas VIM board.

Signed-off-by: Loic Devulder <ldevulder@suse.de>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
2018-07-20 15:55:10 -04:00
Loic Devulder
77dd09211b ARM64: meson: Sync DT with Linux 4.17.5
Synchronize the Linux Device Tree for Amlogic Meson GX boards from Linux 4.17.5
(Linux commit 54fb3c180d05e9dfda892a93413514e99f0cbb19).

This will enable HDMI_5V for USB Amlogic Meson GXL P212 based boards.

Signed-off-by: Loic Devulder <ldevulder@suse.de>
2018-07-20 15:55:09 -04:00
Quentin Schulz
b7a7c4113c test/py: add test for whitelist of variables while importing environment
This tests that the importing of an environment with a specified
whitelist works as intended.

If there are variables passed as parameter to the env import command,
those only should be imported in the current environment.

For each variable passed as parameter, if
 - foo is bar in current env and bar2 in exported env, after importing
 exported env, foo shall be bar2,
 - foo does not exist in current env and foo is bar2 in exported env,
 after importing exported env, foo shall be bar2,
 - foo is bar in current env and does not exist in exported env (but is
 passed as parameter), after importing exported env, foo shall be empty
 ONLY if the -d option is passed to env import, otherwise foo shall be
 bar,

Any variable not passed as parameter should be left untouched.

Two other tests are made to test that size cannot be '-' if the checksum
protection is enabled.

Signed-off-by: Quentin Schulz <quentin.schulz@bootlin.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
2018-07-20 15:55:09 -04:00
Quentin Schulz
eaf734724f cmd: nvedit: env import can now import only variables passed as parameters
While the `env export` can take as parameters variables to be exported,
`env import` does not have such a mechanism of variable selection.

Let's add the ability to add parameters at the end of the command for
variables to be imported.

Every env variable from the env to be imported passed by parameter to
this command will override the value of the variable in the current env.

If a variable exists in the current env but not in the imported env, if
this variable is passed as a parameter to env import, the variable will
be unset ONLY if the -d option is passed to env import, otherwise the
current value of the variable is kept.

If a variable exists in the imported env, the variable in the current
env will be set to the value of the one from the imported env.

All the remaining variables are left untouched.

As the size parameter of env import is positional but optional, let's
add the possibility to use the sentinel '-' for when we don't want to
give the size parameter (when the env is '\0' terminated) but we pass a
list of variables at the end of the command.

env import addr
env import addr -
env import addr size
env import addr - foo1 foo2
env import addr size foo1 foo2

are all valid.

env import -c addr
env import -c addr -
env import -c addr - foo1 foo2

are all invalid because they don't pass the size parameter required for
checking, while the following are valid.

env import addr size
env import addr size foo1 foo2

Nothing's changed for the other parameters or the overall behaviour.

One of its use case could be to load a secure environment from the
signed U-Boot binary and load only a handful of variables from an
other, unsecure, environment without completely losing control of
U-Boot.

Signed-off-by: Quentin Schulz <quentin.schulz@bootlin.com>
Tested-by: Alex Kiernan <alex.kiernan@gmail.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
2018-07-20 15:55:09 -04:00
Quentin Schulz
d9fc9077eb hashtable: do not recreate whole hash table if vars are passed to himport_r
When vars are passed to the himport_r function with H_NOCLEAR flag,
those vars will be overridden in the current environment and if one of
those vars is not in the imported environment, it'll be deleted in the
current environment whatever the flag passed to himport_r.

The H_NOCLEAR flag is used to clear the whole environment whether vars
are passed to the function or not.

This leads to incoherent behaviour. If one passes vars to himport_r
with the H_NOCLEAR flag, if a var in vars is not in the imported env,
that var will be removed from the current env.

If one passes vars to himport_r without the H_NOCLEAR flag, the whole
environment will be removed and vars will be imported from the
environment in RAM.

It makes more sense to keep the variable that is in the current
environment but not in the imported environment if the H_NOCLEAR flag is
set and remove only that variable if the H_NOCLEAR flag is not set.

Let's clear the whole environment only if H_NOCLEAR and vars are not
passed to himport_r.

Let's remove variables that are in the current environment but not in
the imported env only if the H_NOCLEAR flag is not passed.

Suggested-by: Wolfgang Denk <wd@denx.de>
Signed-off-by: Quentin Schulz <quentin.schulz@bootlin.com>
2018-07-20 15:55:09 -04:00
Quentin Schulz
f4eef40b01 test/py: remove hacks for non-zero RAM base address in tests
Some functions have different behaviour when the given address is 0
(assumed to be NULL by the function).

find_ram_base() does not return 0 anymore so it's safe to remove those
offsets.

Suggested-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Quentin Schulz <quentin.schulz@bootlin.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
2018-07-20 15:55:08 -04:00
Quentin Schulz
abba76354a test/py: return a RAM address different from 0 as it can be interpreted as NULL
Some functions test that the given address is not NULL (0) and fail or
have a different behaviour if that's the case (e.g. hexport_r).

Let's make the RAM base address to be not zero by setting it to 2MiB if
that's the case.

2MiB is chosen because it represents the size of an ARM LPAE/v8 section.

Suggested-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Quentin Schulz <quentin.schulz@bootlin.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
2018-07-20 15:55:08 -04:00
Quentin Schulz
6c90f62338 env: add the same prefix to error messages to make it detectable by tests
The error message should start with `## Error: ` so that it's easily
detectable by tests without needing to have a complex regexp for
matching all possible error message patterns.

Let's add the `## Error: ` prefix to the error messages since it's the
one already in use.

Suggested-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Quentin Schulz <quentin.schulz@bootlin.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
2018-07-20 15:55:08 -04:00
Patrick Delaunay
d219415544 stm32mp1: clk: support digital bypass
HSE and LSE bypass shall support both analog and digital signals.
This patch add a way to select digital bypas case in the device tree
and set the associated bit DIGBYP in RCC_BDCR and RCC_OCEN register
during clock tree initialization.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-07-20 15:55:07 -04:00
Patrick Delaunay
5b25eb9f22 stm32mp1: clk: add ADC clock gating
Add ADC clock gating, that may be used by STM32 ADC.

Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-07-20 15:55:07 -04:00
Patrick Delaunay
04365530c0 stm32mp1: clk: update Ethernet clock gating
Alignment with kernel clock driver

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-07-20 15:55:07 -04:00
Patrick Delaunay
88fa34df9f stm32mp1: clk: add LDTC and DSI clock support
This patch add clk_enable/clk_disable/clk_get_rate support for
- DSI_PX
- LTDC_PX
- DSI_K (only get rate)

These clocks are needed for LTDC and DSI drivers with latest device tree.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-07-20 15:55:07 -04:00
Patrick Delaunay
6110503f8f stm32mp1: clk: add common function pll_get_fvco
the function compute the VCO PLL freq, used in
- stm32mp1_read_pll_freq()
- pll_set_rate()

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
# Conflicts:
#	drivers/clk/clk_stm32mp1.c
2018-07-20 15:55:06 -04:00
Patrick Delaunay
c2fa5dc82d stm32mp1: clk: define RCC_PLLNCFGR2_SHIFT macro
This patch define RCC_PLLNCFGR2_SHIFT to reuse it in
the pll function for set rate.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Vikas Manocha <vikas.manocha@st.com>
2018-07-20 15:55:06 -04:00
Patrick Delaunay
8a07d5bfe1 stm32mp1: clock tree update
Configure clock tree for all the devices.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-07-20 15:55:06 -04:00
Patrick Delaunay
aeac16af7c stm32mp1: activate FIXED regulator
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-07-20 15:55:06 -04:00
Patrick Delaunay
5f16f655cc stm32mp1: add support for stm32mp157c-ev1 board
Add support of stm32mp157c-ev1, the evaluation board with pmic stpmu1
(ev1 = mother board + daughter ed1) with device tree.
EV1 is the selected board by default in basic defconfig.

PS: CONFIG_PINCTRL_FULL activation avoid to increase
    SYS_MALLOC_F_LEN (Early malloc usage: 2034)

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-07-20 15:55:05 -04:00
Patrick Delaunay
bc06134e17 stm32mp1: activate MISC support in SPL
needed for RCC MISC driver and sysreset with syscon
in SPL

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-07-20 15:55:05 -04:00
Patrick Delaunay
d090cbab64 misc: stm32: Add STM32MP1 support
Following next kernel rcc bindings, we must use a MFD
RCC driver which is able to bind both clock and reset
drivers.

We can reuse and adapt RCC MFD driver already available
for MCU SoCs (F4/F7/H7).

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-07-20 15:55:05 -04:00
Patrick Delaunay
a674313c2c dts: import stm32mp1 device tree from linux kernel
This patch rebase the stm32mp1 device tree source from
linux kernel v4.18-rc1.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-07-20 15:55:05 -04:00
Patrick Delaunay
1f6ca3f42f sysreset: syscon: update regmap access to syscon
Use new API syscon_node_to_regmap in sysreset_syscon driver
for compatible "syscon-reboot"; that's avoid the need of explicit
syscon binding for "regmap" handle.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-07-20 15:55:04 -04:00
Heinrich Schuchardt
af95a3e7c0 drivers: rtc: correct week day for mc146818
For qemu-x86 the date command produces wrong days of the week:
Date: 2018-07-06 (Saturday)    Time: 18:02:03
Date: 2018-07-07 (unknown day)    Time: 21:02:06

According to a comment in the Linux driver the mc146818 only updates the
day of the week if the register value is non-zero.

Sunday is 1, saturday is 7 unlike in U-Boot (see data sheet
https://www.nxp.com/docs/en/data-sheet/MC146818.pdf).

So let's use our library function to determine the day of the week.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-07-20 15:55:04 -04:00
Alex Kiernan
b27dc8ec5c bootmenu: Extend BOOTDELAY help text
Extend BOOTDELAY help text to cover its additional usage within the
bootmenu command.

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
2018-07-20 15:37:45 -04:00
Alex Kiernan
57aa4d2066 env: Include bootdelay in environment if negative
The test for (CONFIG_BOOTDELAY >= 0) has been in U-Boot since the
beginning, but the meaning of it has changed over time. Allow the
default to be set for any value, including -ve ones. This allows
(for example) CONFIG_ENV_IS_NOWHERE to have values for bootdelay in
its compiled in environment.

The only thing this changes is where the default for bootdelay can be
fetched from; before this change you get a compiled in default, after
you'll pull it from the default value in the environment, but both values
will be the same. Also if there's a value set in the environment then
that will take precedence (as before).

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
2018-07-20 15:37:44 -04:00
Marek Behún
f8c173b6a0 fs: btrfs: Fix wrong comparison in logical to physical mapping
The comparison
  logical > item->logical + item->length
in btrfs_map_logical_to_physical is wrong and should be instead
  logical >= item->logical + item->length
For example, if
  item->logical = 4096
  item->length = 4096
and we are looking for logical = 8192, it is not part of item (item is
[4096, 8191]). But the comparison is false and we think we have found
the correct item, although we should be searing in the right subtree.

This fixes some bugs I encountered.

Signed-off-by: Marek Behun <marek.behun@nic.cz>
2018-07-20 15:37:44 -04:00
Michael Trimarchi
25dabd730a spl: Make the spl_nand_load_image static
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
2018-07-20 15:37:41 -04:00
York Sun
7267fbf734 spl: mmc: Skip RAW mode ARGS sectors if not defined
RAW mode ARGS sector doesn't have to be used for all falcon boot. Skip
loading ARGS sectors if not defined.

Signed-off-by: York Sun <york.sun@nxp.com>
2018-07-20 08:55:14 -04:00
Bin Meng
05855fd31a x86: acpi: Prevent acpi_table.h from being included more than once
The wrapper #ifndef is currently missing in acpi_table.h. Add it to
prevent it from being included multiple times.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-07-20 09:33:22 +08:00
Bin Meng
474a62bc74 x86: acpi: Don't touch ACPI hardware in write_acpi_tables()
write_acpi_tables() currently touches ACPI hardware to switch to
ACPI mode at the end. Move such operation out of this function,
so that it only does what the function name tells us.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2018-07-20 09:33:22 +08:00
Bin Meng
a0609a8d19 x86: acpi: Move APIs unrelated to ACPI tables generation to a separate library
acpi_find_fadt(), acpi_find_wakeup_vector() and enter_acpi_mode()
are something unrelated to ACPI tables generation. Move these to
a separate library.

This also fixes several style issues reported by checkpatch in the
original codes.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2018-07-20 09:33:22 +08:00
Bin Meng
b37b7b2063 x86: Switch to use DM sysreset driver
This converts all x86 boards over to DM sysreset.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2018-07-20 09:33:22 +08:00
Bin Meng
7bb6028768 x86: fsp: Eliminate the reset_cpu() call
In preparation for the reset driver conversion, eliminate the
reset_cpu() call in the FSP init path as it's too early for the
reset driver to work.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-07-20 09:33:22 +08:00
Bin Meng
406be398ed dm: sysreset: Add a standard message when doing reset
It's good to print a message when doing reset.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-07-20 09:33:22 +08:00
Bin Meng
4c99ccfe13 x86: tangier: Add a sysreset driver
This adds a reset driver for tangier processor.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2018-07-20 09:33:22 +08:00
Bin Meng
c81a8f5455 efi: app: Add a sysreset driver
This adds the DM sysreset driver for EFI application support.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-07-20 09:33:22 +08:00
Bin Meng
fabb2b4c7f dm: sysreset: x86: Add a sysreset driver
This adds a generic reset driver for x86 processor.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-07-20 09:33:22 +08:00
Bin Meng
1ac10ab9d7 x86: quark: acpi: Add full reset bit to the reset register value in FADT
This adds full reset bit in the reset register value in the ACPI FADT
table, so that kernel can do a thorough reboot.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-07-20 09:33:22 +08:00
Heinrich Schuchardt
992c1db455 drivers: rtc: resolve year 2038 problem in rtc_to_tm
Our implementation of rtc_to_tm() cannot handle dates of more than
0x7fffffff seconds after 1970-01-01.

Adopt the Linux kernel implementation.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-07-19 17:03:36 -04:00
Hannes Schmelzer
0938cff737 board/BuR/brppt1: add makerule for generating production files
Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at>
2018-07-19 17:03:35 -04:00
Hannes Schmelzer
fbc7c7decf board/BuR/brppt1: convert brppt1 boards to driver model
- add a devicetree for each variant (mmc, spi, nand)
- drop unneeded code from board and bur/common
- drop unneeded stuff from config header files
- minor adaptions to be compliant with driver model (requesting gpio,..)
- harmonize the commandset over all brppt1 targets

Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at>
2018-07-19 17:03:35 -04:00
Hannes Schmelzer
19aa4ac09d dts: am33xx: add u-boot, dm-spl to ocp bus
This is needed for having access to the devices below this bus, most
important is uart and boot-device (spi, mmc, ...) in SPL stage.

Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at>
2018-07-19 17:03:35 -04:00
Hannes Schmelzer
73e9db22ab board/BuR/brppt1: implement more flexible boot process
With this commit we do:

- set the bootdelay in all brppt1 defconfigs to 0, this makes
development easier, since we can break into serial console.

- move CONFIG_BOOTCOMMAND from header file to defconfig

- introduce b_mode variable for selecting the final boot-target.
This b_mode represents the boot-switch, which can found on most b&r
targets. On the brppt1 this boot-switch is derived from some gpio and
the bootcounter within the RTC block, making it so possible to force
a boot-target (as example for repair-case).

- refactor the environment for booting new flexible way
primary we want to get some bootscr.img within the mass-storage,
this script then loads everything needed for the boot.
For legacy reason we implement the t30lgcy#x boot targets, booting the
already delivered linux-images.

- make space for the cfgscr within mtdparts on brppt1_nand

Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at>
2018-07-19 17:03:35 -04:00
Hannes Schmelzer
d63f7130ce board/BuR/common: refactor ft_board_setup(...)
On other OS, not one provided by B&R, it is not guaranteed that there
are factory-settings within a devicetree. So we must not treat the
absence of them as error.
Further we've the fact that on different version of the device-tree
files there are different namings of the factory-settings, we consider
this with searching for an alternative name.

changing things as following:

- don't treat as error if the bootloader version cannot written into
devicetree.

- since the naming of the factory-settings are different in different
versions of the provided device-tree we search for the alternate name
"/fset"

Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at>
2018-07-19 17:03:34 -04:00
Hannes Schmelzer
1d46986601 board/BuR/brppt1: drop dead code (CONFIG_SPL_OS_BOOT)
The falcon mode was never used on this board, there is also no plan to
use it. So drop this dead code.

Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at>
2018-07-19 17:03:34 -04:00
Hannes Schmelzer
96cf89f86b board/BuR/common: fix PMIC mpu-pll setup
If a board-code calls the  pmicsetup(u32 mpupll) with a mpupll value
!= 0 it wants to force some frequency with the value provided by mpupll.
Setting up 1 GHz is wrong here.

Nobody did take notice about that yet, since every board calls this
function with zero.

Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at>
2018-07-19 17:03:34 -04:00
Hannes Schmelzer
2930941aee board/BuR/common: remove interface Label from summary screen
This interface names may vary over different products, to consider this
fact we replace the interface label "IF1" and "IF2" on the summary
screen with some more generic wording "MAC1" and "MAC2".

Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at>
2018-07-19 17:03:34 -04:00
Hannes Schmelzer
9596367970 board/BuR/brppt1: drop LCD-support
On this linux target long time ago the OS is using DRM driver for
handling video output, the pre initialization of u-boot and the display
summary screen is obsolete. With this patch we drop the LCD-support from
thisd board.

Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at>
2018-07-19 17:03:33 -04:00
Hannes Schmelzer
e22597048a board/BuR/common: make CONFIG_LCD optional
Since we're going to drop LCD-support on brppt1 boards, we have to make
this stuff here optional and remove the #error path.

We also move out the ft_board_setup(...) from this #ifdef because
there's no relationship with the LCD-code and on the other hand this is
still needed in future even with LCD-support off.

Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at>
2018-07-19 17:03:33 -04:00
Hannes Schmelzer
dc36b65795 board/BuR/common: drop simple-framebuffer setup
The linux systems running on the brppt1 targets are using modern DRM
drivers since long time ago. Further we are going to drop the LCD
support completely on this board, so the simple-framebuffer setup
becomes obsolete.

Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at>
2018-07-19 17:03:33 -04:00
Hannes Schmelzer
e31fb4db36 board/BuR: drop devicetree loading and lcd setup for linux-targets
This patch  drops the lcd-screen setup, the summary screen and getting
mac-addresses based on a previous loaded device-tree for linux targets.
Selecting those linux target is simple, since we have only the brppt1.

In detail we do:
- drop the common lcd-setup code which relys on a fdt_blob
- drop the common dtb loading mechanism
- drop the now obsolete CONFIG_USE_FDT from board header and whitelist.

Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at>
2018-07-19 17:03:33 -04:00
Ramon Fried
20e7705764 test: smem: add basic smem test
Add basic smem sandbox testing.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-07-19 17:03:28 -04:00
Ramon Fried
7fd7e2cf33 drivers: smem: sandbox
Add Sandbox driver for SMEM. mostly stub operations.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-07-19 16:31:38 -04:00
Ramon Fried
6621bedb96 dts: db820c: added smem nodes
Added necessary nodes for Qualcomm smem driver.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-07-19 16:31:38 -04:00
Ramon Fried
072787ddd5 dts: db410c: added smem nodes
Added necessary nodes for Qualcomm smem driver.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-07-19 16:31:37 -04:00
Ramon Fried
654dd4a84e soc: qualcomm: Add Shared Memory Manager driver
The Shared Memory Manager driver implements an interface for allocating
and accessing items in the memory area shared among all of the
processors in a Qualcomm platform.

Adapted from the Linux driver (4.17)

Changes from the original Linux driver:
* Removed HW spinlock mechanism, which is irrelevant
in U-boot particualar use case, which is just reading from the smem.
* Adapted from Linux driver model to U-Boot's.

Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-07-19 16:31:37 -04:00
Ramon Fried
7b384eccc7 dm: SMEM (Shared memory) uclass
This is a uclass for Shared memory manager drivers.

A Shared Memory Manager driver implements an interface for allocating
and accessing items in the memory area shared among all of the
processors.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>

Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-07-19 16:31:37 -04:00
Heinrich Schuchardt
b19886b946 ARM: qemu-arm: enable RTC
QEMU provides an emulated ARM AMBA PrimeCell PL031 RTC.

The patch sets the base address in the board include file according to the
definition in hw/arm/virt.c of the QEMU source. It defines the Kconfig
option for the existing driver, and enables the RTC driver in
qemu_arm64_defconfig and qemu_arm_defconfig as well as the date command.

We need an RTC to provide the GetTime() runtime service in the UEFI
subsystem.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Tested-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
2018-07-19 16:31:37 -04:00
Ivan Gorinov
b71bb87af9 riscv: Remove unused _relocate arguments
EFI image handle and system table are not used in _relocate().

Signed-off-by: Ivan Gorinov <ivan.gorinov@intel.com>
2018-07-19 16:31:37 -04:00
Ivan Gorinov
b966e5dc54 arm: Remove unused _relocate arguments
EFI image handle and system table are not used in _relocate().

Signed-off-by: Ivan Gorinov <ivan.gorinov@intel.com>
2018-07-19 16:31:36 -04:00
Ivan Gorinov
6250098655 x86: Remove unused _relocate arguments
EFI image handle and system table are not used in _relocate().

Signed-off-by: Ivan Gorinov <ivan.gorinov@intel.com>
2018-07-19 16:31:36 -04:00
Grygorii Strashko
960a63973b arm/arm64: bitops: fix find_next_zero_bit to be compat with arm64
Current implementation of find_next_zero_bit() is incompatible with arm64.
Hence fix it by using BITS_PER_LONG define instead of constants and
use generic ffz() implementation.

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
2018-07-19 16:31:36 -04:00
Neil Armstrong
c95848cdec boards: amlogic: Fix boards README
Fix typos and update the supported devices for all Amlogic boards.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2018-07-19 16:31:36 -04:00
Christophe Kerello
844f9bf1ee power: regulator: stpmu1: add power off delay
This patch adds a delay when regulators are disabled.
This delay is set to 5 ms to cover all use cases.
The worst use case actually seen is during a SD card power cycle.

Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-07-19 16:31:36 -04:00
Patrice Chotard
a1b2faed7c phy: Be able to get phy from PHY provider
In case of phy are provided from a PHY provider nodes as following:

usbphyc: usb-phy@5a006000 {
	compatible = "st,stm32mp1-usbphyc";
	reg = <0x5a006000 0x1000>;
	clocks = <&rcc_clk USBPHY_K>;
	resets = <&rcc_rst USBPHY_R>;
	#address-cells = <1>;
	#size-cells = <0>;

	usbphyc_port0: usb-phy@0 {
		reg = <0>;
		phy-supply = <&vdd_usb>;
		vdda1v1-supply = <&reg11>;
		vdda1v8-supply = <&reg18>
		#phy-cells = <0>;
	};

	usbphyc_port1: usb-phy@1 {
		reg = <1>;
		phy-supply = <&vdd_usb>;
		vdda1v1-supply = <&reg11>;
		vdda1v8-supply = <&reg18>
		#phy-cells = <1>;
	};
};

and PHY are called as following:

usbh_ehci: usbh-ehci@5800d000 {
	compatible = "generic-ehci";
	reg = <0x5800d000 0x1000>;
	clocks = <&rcc_clk USBH>;
	resets = <&rcc_rst USBH_R>;
	interrupts = <GIC_SPI 75 IRQ_TYPE_NONE>;
	companion = <&usbh_ohci>;
	phys = <&usbphyc_port0>;
	phy-names = "usb";
	status = "okay";
};

generic_phy_get_by_index() must be updated to first look for
PHY phandle as previously and in case of error looks for PHY
provider by finding the parent's current node which is the PHY
provider.
args (ofnode_phandle_args struct) must also be updated by inserting
the phy index into the PHY provider as args[0].

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-07-19 16:31:35 -04:00
Patrick Delaunay
7d118161bb mmc: stm32_sdmmc2: update pwron management
Correctly manage the SDMMC reset and card cycle power
to fully handle the power cycle added in the MMC uclass
and avoid issue with level-shifter with some uSDCARD.

3 states managed in driver:
  1/ reset: SDMMC disable, signal HiZ
  2/ power-cycle: SDMMC disable, signals drive to 0
  3/ power-on: SDMMC enabled

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-07-19 16:31:35 -04:00
York Sun
14acea0244 spl: nor: Skip CONFIG_SYS_FDT_BASE if not defined
If FIT image is used, CONFIG_SYS_FDT_BASE is not needed.

Signed-off-by: York Sun <york.sun@nxp.com>
2018-07-19 16:20:13 -04:00
York Sun
6ecd820f99 spl: nor: Add FIT support
Add support of loading FIT image from NOR flash.

Signed-off-by: York Sun <york.sun@nxp.com>
2018-07-19 16:20:13 -04:00
Thomas McKahan
eee45b4f54 boards: amlogic: Add FriendlyElec NanoPi K2 board support
This adds platform code for the FriendlyElec NanoPi K2 board based on a
Meson GXBB (S905) SoC with the Meson GXBB configuration.

This initial submission only supports:
- UART
- MMC/SDCard
- Ethernet
- Reset Controller
- Clock controller

Cc: Yuefei Tan <yftan@friendlyarm.com>
Signed-off-by: Thomas McKahan <tonymckahan@gmail.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2018-07-19 16:17:58 -04:00
Neil Armstrong
9c7ad1ed01 ARM: dts: sync meson-gxbb-nanopi-k2 from Linux 4.17
Get the meson-gxbb-nanopi-k2.dts file from Linux 4.17.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2018-07-19 16:17:58 -04:00
Yaniv Levinsky
c5d548a9f8 env: common: accept flags on reset to default env
The function set_default_env() sets the hashtable flags for import_r().
Formally set_default_env() doesn't accept flags from its callers. In
practice the caller can (un)set the H_INTERACTIVE flag, but it has to be
done using the first character of the function's string argument. Other
flags like H_FORCE can't be set by the caller.

Change the function to accept flags argument. The benefits are:
1. The caller will have to explicitly set the H_INTERACTIVE flag,
   instead of un-setting it using a special char in a string.
2. Add the ability to propagate flags from the caller to himport(),
   especially the H_FORCE flag from do_env_default() in nvedit.c that
   currently gets ignored for "env default -a -f" commands.
3. Flags and messages will not be coupled together. A caller will be
   able to set flags without passing a string and vice versa.

Please note:
The propagation of H_FORCE from do_env_default() does not introduce any
functional changes, because currently himport_r() is set to destroy the
old environment regardless if H_FORCE flag is set or not. More changes
are needed to utilize the propagation of H_FORCE.

Signed-off-by: Yaniv Levinsky <yaniv.levinsky@compulab.co.il>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
2018-07-19 16:17:58 -04:00
Yaniv Levinsky
5a04264ecf cmd: nvedit: set H_INTERACTIVE in do_env_default
The function set_default_vars() in common.c adds H_INTERACTIVE to the
h_import() flag, but the function has no way of telling if the command
actually was user directed like this flag suggest. The flag should be
set by the calling function do_env_default() in nvedit.c instead, where
the command is certainty user directed.

Move the H_INTERACTIVE flag from set_default_vars() to do_env_default().

Signed-off-by: Yaniv Levinsky <yaniv.levinsky@compulab.co.il>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
2018-07-19 16:17:58 -04:00
Yaniv Levinsky
477f8116d5 cmd: nvedit: propagate envflag to set_default_vars
The env_flag in do_env_default() doesn't get propagated and therefore
gets ignored by himport_r(). This breaks to ability to "forcibly" reset
variables to their default values using the environment command.

Scenario example of the problem:
	# setenv kernel uImage
	# setenv .flags kernel:so
	# env default -f kernel
	## Error: Can't overwrite "kernel"
	himport_r: can't insert "kernel=zImage" into hash table

Change the call path so it will pass the flag correctly.

Signed-off-by: Yaniv Levinsky <yaniv.levinsky@compulab.co.il>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
2018-07-19 16:17:58 -04:00
Yaniv Levinsky
30091494eb cmd: nvedit: rename flags in do_env_default
The naming convention for flags in nvedit.c is:
* The hashtable flag (defined in search.h) is named "env_flag"
* The command flag argument (defined in command.h) is named "flag"

This convention is kept in functions like do_env_print(), do_env_set()
and do_env_delete(), but not in do_env_default().

Rename the hashtable flag in do_env_default() from "flag" to "env_flag".
Rename the command flag in do_env_default() from "__flag" to "flag".

No functional change.

Signed-off-by: Yaniv Levinsky <yaniv.levinsky@compulab.co.il>
Reviewed-by: Igor Grinberg <grinberg@compulab.co.il>
2018-07-19 16:17:58 -04:00
Alex Kiernan
201d9cd2b3 cmd: fit_image: Add default property for FIT format scripts
When sourcing a FIT format script, if we've not been told the unit name
to use, look for a default property at the root of /images to work out
which unit we should use.

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-07-19 16:17:58 -04:00
Ramon Fried
8d54579072 test: Add ut_assertnull macro
Add ut_assertnull macro to include/test/ut.h
For testing of functions that returns NULL on errors.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-07-19 16:17:58 -04:00
Tom Rini
f7e48c54b2 Merge tag 'xilinx-for-v2018.09' of git://git.denx.de/u-boot-microblaze
Xilinx changes for v2018.09

clk:
- Fix zynqmp clock driver

common:
- Handle CMD_RET_USAGE in cmd_process_error
- Use return macros in cmd_process_error
- Fix duplication of CONFIG_SYS_PROMPT_HUSH_PS2
- Support watchdog in usb_kbd.c
- Fix name usage in usb_kbd.c
- Support systems with non zero memory start initialized from DT only

gpio:
- Add support for manual relocation in uclass
- zynq - use live tree
- zynq - fix match data reading
- zynq - setup bank name
- xilinx - convert driver to DM

microblaze:
- Use generic iounmap/ioremap implementations
- Redesign reset logic with sysreset features
- Use watchdog and gpio over DM
- Remove unused macros and fix some checkpatch issues
- Fix timer initialization not to be called twice

serial:
- zynq - Use platdata intead of priv data

sysreset:
- Add support for manual relocation in uclass
- Add gpio-restart driver
- Add microblaze soft reset driver

watchdog:
- Add support for aliases in uclass
- Add support for manual relocation in uclass
- Convert xilinx driver to DM
- cadence - update info in the driver and not stop wdt in probe

xilinx:
- Enable LED gpio for some targets with gpio-leds DT node
- Setup variables via Kconfig

zynq:
- Add support for watchdog aliases
- Add support for mini nand/nor configurations
- Wire FPGA initalization in SPL

zynqmp:
- Enable mass storage for zcu100
- Handle external pmufw files
- Add support for secure images
- Some Kconfig movements and alignments
- Add support for watchdog aliases
- Use subcommands style for platform command
- Add mmio_read/write platform commands
- DT updates
- Add support for mini qspi configuration
2018-07-19 11:48:33 -04:00
Luis Araneda
577012da71 arm: zynq: spl: fix FPGA initialization
commit 4aba5fb857 ("arm: zynq: Rework FPGA initialization")
moved FPGA initialization from board_init() to arch_early_init_r(),
which is not called as part of the SPL

Fix this by calling arch_early_init_r() in the spl_board_init()
function, so the FPGA is correctly initialized

Signed-off-by: Luis Araneda <luaraneda@gmail.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-07-19 10:49:57 +02:00
Luis Araneda
d600c4f6b0 drivers: fpga: zynqpl: fix compilation with SPL
Disable the use of function zynq_loadfs when compiling
the driver for the SPL, as the following filesystem
functions are not found by the linker:
- fs_set_blk_dev
- fs_read
- fs_set_blk_dev
- fs_read
- fs_read

Signed-off-by: Luis Araneda <luaraneda@gmail.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-07-19 10:49:57 +02:00
Luis Araneda
3907eef1a3 spl: fit: display a message when an FPGA image is loaded
A message should be displayed if an image is loaded
to an FPGA, because the hardware might have changed,
and the user should be informed

Signed-off-by: Luis Araneda <luaraneda@gmail.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-07-19 10:49:56 +02:00
Michal Simek
a133b3ac32 arm64: zynqmp: Setup ENV_SIZE via Kconfig for mini targets
Mini targets are using different ENV_SIZE then standard one that's why
defconfigs should be updated to simplify config files.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-07-19 10:49:56 +02:00
Siva Durga Prasad Paladugu
14ed50a4bf arm64: zynqmp: Add QSPI flash mini u-boot configuration
Add configuration files/dtses for mini u-boot configuration
which runs on smaller footprint of internal memory. This
configuration has only required qspi flash support and it
uses DCC as serial.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-07-19 10:49:56 +02:00
Michal Simek
bb8920ed77 arm: zynq: Setup ENV_SIZE via Kconfig
Simplify zynq_cse config by setting up ENV_SIZE via Kconfig.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-07-19 10:49:56 +02:00
Vipul Kumar
2a30809cae env: Added support to save env to spi through Kconfig
This patch added support to enable CONFIG_ENV_SIZE, CONFIG_ENV_OFFSET
and CONFIG_ENV_SECT_SIZE through Kconfig for Zynq and Zynqmp.

Signed-off-by: Vipul Kumar <vipul.kumar@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-07-19 10:49:56 +02:00
Siva Durga Prasad Paladugu
1c310aec67 arm: zynq: Add parallel NOR flash mini u-boot configuration for zynq
Add configuration files/dtses for mini u-boot configuration
which runs on smaller footprint OCM memory. This configuration
only has required parallel nor flash support.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-07-19 10:49:56 +02:00
Siva Durga Prasad Paladugu
6754fabe65 arm: zynq: Add Nand flash mini u-boot configuration for zynq
Add configuration files/dtses for mini u-boot configuration
which runs on smaller footprint of memory. This configuration
has only required nand flash support.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-07-19 10:49:56 +02:00
Siva Durga Prasad Paladugu
e4655aa240 arm: zynq: Dont define SDRAM_BASE and SDRAM_SIZE in .h
Remove the SDRAM_BASE and SDRAM_SIZE as it can now get these
details from DT.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-07-19 10:49:56 +02:00
Siva Durga Prasad Paladugu
12308b128f lib: fdtdec: Rename routine fdtdec_setup_memory_size()
This patch renames the routine fdtdec_setup_memory_size()
to fdtdec_setup_mem_size_base() as it now fills the
mem base as well along with size.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-07-19 10:49:56 +02:00
Siva Durga Prasad Paladugu
1473b12ad0 lib: fdtdec: Update ram_base to store ram start adddress
This patch updates the ram_base to store the start address of
the first bank DRAM and the use this ram_base to calculate ram_top
properly. This patch fixes the erroneous calculation of ram_top
incase of non zero ram start address.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-07-19 10:49:56 +02:00
Michal Simek
f4da871a7f microblaze: Remove XILINX_SPI_FLASH_BASEADDR logic
XILINX_SPI_FLASH_BASEADDR logic has been converted to DM that's why
there is no reason to depend on this address anymore.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-07-19 10:49:56 +02:00
Michal Simek
0bd83060c2 watchdog: cadence: Do not stop wdt in probe
Watchdog can be started before probe and u-boot should just take control
over it. That's why do not stop watchdog in probe to cover cases where
watchdog can expire before probe and start.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-07-19 10:49:56 +02:00
Vipul Kumar
0358cee595 arm64: zynqmp: Added support of mmio read and write commands
This patch added support of mmio read and write commands. These commands
can be used to read and write registers from the u-boot command line.
It can be useful in debugging.

Signed-off-by: Vipul Kumar <vipul.kumar@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-07-19 10:49:56 +02:00
Michal Simek
f5ed360585 xilinx: Enable led support for some boards
Enable led support for boards which have "gpio-leds" node.
And also for microblaze which is converted to DM_GPIO now.
Tested on zcu100.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-07-19 10:49:56 +02:00
Michal Simek
6c253be7ce watchdog: cdns: Add comment for expire_now function
IP itself has no reg/no bit which can be used for this functionality.
Add this note to the driver to make sure that none will be asking for
that. Current method is to setup 1s timeout and hang() which is done via
wdt_expire_now().

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-07-19 10:49:56 +02:00
Michal Simek
28a961aa0b microblaze: Do not force saving variables to flash
There is no reason to save variables to flash only.
Select option via Kconfig instead.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-07-19 10:49:55 +02:00
Michal Simek
4a69366967 microblaze: Convert generic platform to DM gpio
Converting GPIO to DM requires to do changes in reset subsystem
that's why support for Microblaze soft reset via sysreset and GPIO
sysreset support was added.
These two patches enables enabling GPIO DM.
Microblaze soft reset is bind at last reset method.

GPIO reset is handled via sysreset with adding this fragment to DT.

gpio-restart {
	compatible = "gpio-restart";
	gpios = <&reset_gpio 0 0 0>;
	/* 3rd cell ACTIVE_HIGH = 0, ACTIVE_LOW = 1 */
};

hard-reset-gpio property is not documented and also handled.
Conversion is required.

Unfortunately do_reset is required for SPL that's why use only soft
microblaze reset for now.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-07-19 10:49:55 +02:00
Michal Simek
c7e7948924 arm64: xilinx: Setup default number of chipselects for zcu100
There is only one chipselect on each connector.
Define it directly in board dts file.
There should be an option to use more chipselects via gpios.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-07-19 10:49:55 +02:00
Michal Simek
704849900a microblaze: Enable watchdog via defconfig
DM watchdog should be enabled by default.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-07-19 10:49:55 +02:00
Shreenidhi Shedi
e0e9caae6b watchdog: Convert Xilinx Axi watchdog driver to driver model
Xilinx Axi wdt driver conversion to driver model & Kconfig update
for the same.

Signed-off-by: Shreenidhi Shedi <yesshedi@gmail.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-07-19 10:49:55 +02:00
Shreenidhi Shedi
6ec6f5841d microblaze: Support for watchdog_reset in init
We should support watchdog reset so that WATCHDOG_RESET will function
properly.

Signed-off-by: Shreenidhi Shedi <yesshedi@gmail.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-07-19 10:49:55 +02:00
Shreenidhi Shedi
88811bb5a1 microblaze: Delete Xilinx watchdog related macros
These macros are not required anymore. These will be taken from
configuration file.

Signed-off-by: Shreenidhi Shedi <yesshedi@gmail.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-07-19 10:49:55 +02:00
Shreenidhi Shedi
35912528a8 microblaze: Cosmetic changes in Microblaze related files
Signed-off-by: Shreenidhi Shedi <yesshedi@gmail.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-07-19 10:49:55 +02:00
Vipul Kumar
8c258e6245 arm64: zynqmp: Changed zynqmp command to handle subcommands with U_BOOT_CMD_MKENT
This patch changed zynqmp command to handle subcommands with
U_BOOT_CMD_MKENT.

Signed-off-by: Vipul Kumar <vipul.kumar@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-07-19 10:49:55 +02:00
Michal Simek
10441ec922 gpio: xilinx: Convert driver to DM
This patch is enabling GPIO_DM support to have an option to use this
driver together with zynq gpio driver.
!DM part is kept there till Microblaze is cleanup which will be done
hopefully soon.

Just a note:
There is no reason to initialize uc-priv->name because it is completely
unused.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-07-19 10:49:55 +02:00
Michal Simek
cae39ae365 sysreset: Add support for Microblaze soft reset jump
Microblaze is storing reset vector at address 0x0.
It means soft reset can be done by just jumping to this address.
This code was in platform code but sysreset interface is providing
enough capabilities to have more options how to reset the system. It can
go from gpio reset through watchdog reset till soft reset.

The driver has not compatible string because this is cpu specific and DM
core is not able to detect compatible string in DT root that's why this
driver will be instantiated from platform code by calling
device_bind_driver(gd->dm_root, "mb_soft_reset", "reset_soft",
NULL);
It should be bind as the last reset method to ensure that hw reset is
called before this.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-07-19 10:49:55 +02:00
Michal Simek
0d832b3221 sysreset: Add support for gpio-restart
The Linux kernel has binding for gpio-restart node.
This patch is adding basic support without supporting any optional
properties.
This driver was tested on Microblaze system where gpio is connected to
SoC reset logic.
Output value is handled via gpios cells values.

In gpio_reboot_request() set_value is writing 1 because
dm_gpio_set_value() is capable to changing it when it is ACTIVE_LOW.
...
	if (desc->flags & GPIOD_ACTIVE_LOW)
		value = !value;
...

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-07-19 10:49:55 +02:00
Michal Simek
501fc50a29 arm: zynq: Try to enable the first watchdog via aliases
The same change as was done for zynqmp with this description:

Add support for enabling the first watchdog pointed via aliases.

DT fragment:
	aliases {
		...
		watchdog0= &watchdog0;
		watchdog1 = &watchdog_lpd;
		...
	};

<zynqmp example removed>

Till this patch the first watchdog found in DT was used and started
which is not enabling all possible configuration based on user request.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-07-19 10:49:55 +02:00
Michal Simek
1fbca0db5d arm64: zynqmp: Try to enable the first watchdog via aliases
Add support for enabling the first watchdog pointed via aliases.

DT fragment:
	aliases {
		...
		watchdog0 = &watchdog0;
		watchdog1 = &watchdog_lpd;
		...
	};

dm tree fragment for above configuration with patch applied:
ZynqMP> dm tree
 Class    index  Probed  Driver      Name
-----------------------------------------
...
 watchdog    0  [   ]   cdns_wdt    |   |-- watchdog@ff150000
 watchdog    1  [ + ]   cdns_wdt    |   `-- watchdog@fd4d0000
...

dm uclass fragment:
ZynqMP> dm uclass
...
uclass 75: watchdog
0   watchdog@ff150000 @ 7df02f40, seq -1, (req 1)
1 * watchdog@fd4d0000 @ 7df02ff0, seq 0, (req 0)
...

It is visible that index 1 is IP with seq 0 which means that FPD
watchdog (@fd4d0000) is in DT below LPD watchdog (@ff150000).

Till this patch the first watchdog found in DT was used and started
which is not enabling all possible configuration based on user request.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-07-19 10:49:55 +02:00
Michal Simek
0d6fabb82d gpio: zynq: Setup bank_name to dev->name
There should be proper bank name setup to distinguish between different
gpio drivers. Use dev->name for it.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-07-19 10:49:55 +02:00
Michal Simek
35670665d6 microblaze: Do not call timer init that early
Timer needs to be converted to DM but as of now it can't be called so
early because intc controller is not ready. Call it later in board_r.c.
Before this patch timer_init is called twice which is wrong.
The patch is blocking initialization before relocation.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-07-19 10:49:54 +02:00
Michal Simek
0df9bea434 gpio: zynq: Read of mach data in platdata with dev_get_driver_data
Remove bogus zynq_gpio_getplat_data() and read driver data directly.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-07-19 10:49:54 +02:00
Michal Simek
1b4c2aa25b gpio: dm: Support manual relocation for gpio
Relocate gpio ops as was done by:
"dm: Add support for all targets which requires MANUAL_RELOC"
(sha1: 484fdf5ba0)

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-07-19 10:49:54 +02:00
Michal Simek
758de97bb8 sysreset: dm: Support manual relocation for sysreset
Relocate sysreset ops as was done by:
"dm: Add support for all targets which requires MANUAL_RELOC"
(sha1: 484fdf5ba0)

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-07-19 10:49:54 +02:00
Michal Simek
946205a857 gpio: zynq: Fix typo in one error message
Just fix error message.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-07-19 10:49:54 +02:00
Michal Simek
71c52f2949 microblaze: Remove unused XILINX_BOARD_NAME macro
This macro is not used anywhere that's why remove it.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-07-19 10:49:54 +02:00
Michal Simek
b68e40e641 arm64: zynqmp: Sync defconfigs in connection to DEFINE_TCM_OCM_MMAP
CONFIG_MP was added to Kconfig with enabling CONFIG_DEFINE_TCM_OCM_MMAP=y
for zynqmp boards. This option is enabled by default that's why it
shouldn't be in defconfig.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-07-19 10:49:54 +02:00
Michal Simek
f238b3f0fb watchdog: dm: Support manual relocation for watchdogs
Relocate watchdog ops as was done by:
"dm: Add support for all targets which requires MANUAL_RELOC"
(sha1: 484fdf5ba0)

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-07-19 10:49:54 +02:00
Michal Simek
9713fac1eb watchdog: dm: Change uclass name to watchdog and enable DM_UC_FLAG_SEQ_ALIAS
uclass name is used by dev_read_alias_seq which return seq number when
aliases are used.

Code fragment:
168 int dev_read_alias_seq(struct udevice *dev, int *devnump)
169 {
170         ofnode node = dev_ofnode(dev);
171         const char *uc_name = dev->uclass->uc_drv->name;
172         int ret;
173
174         if (ofnode_is_np(node)) {
175                 ret = of_alias_get_id(ofnode_to_np(node), uc_name);

Also this patch enables DM_UC_FLAG_SEQ_ALIAS to be in sync with Linux
which is also using watchdog name for watchdog aliases.

drivers/watchdog/watchdog_core.c:215:
 ret = of_alias_get_id(wdd->parent->of_node, "watchdog");

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-07-19 10:49:54 +02:00
Michal Simek
3c3dee373a arm64: zcu100: Enable USB host ether and ASIX via defconfig
There is no reason to keep these configs in platform config file.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-07-19 10:49:54 +02:00
Michal Simek
d6c856c008 microblaze: Guard do_reset by CONFIG_SYSRESET
sysreset uclass have own do_reset function which should be used instead
of board/platform specific.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-07-19 10:49:54 +02:00
Michal Simek
4ab11ecaaa microblaze: Use default implementation from include/linux/io.h
There is no reason not to use default ioremap/iounmap io functions.
The patch remove Microblaze macros.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-07-19 10:49:54 +02:00
Siva Durga Prasad Paladugu
37e3a36a54 xilinx: zynq: Add support to secure images
This patch basically adds two new commands for loadig secure
images.
1. zynq rsa adds support to load secure image which can be both
   authenticated or encrypted or both authenticated and encrypted
   image in xilinx bootimage(BOOT.bin) format.
2. zynq aes command adds support to decrypt and load encrypted
   image back to DDR as per destination address. The image has
   to be encrypted using xilinx bootgen tool and to get only the
   encrypted image from tool use -split option while invoking
   bootgen.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-07-19 10:49:54 +02:00
Michal Simek
6bdf0a992c serial: zynq: Use platdata for storing static data instead of priv
Explanation from Simon Glass
"Private data is created when the device is probed and freed when the
device is removed.

Platform data is created when the device is bound, and survives
probe/remove cycles.

Strictly speaking, platform data should be used to hold the decoded
device tree properties. Private data should be used for run-time
things the device needs to keep track of."

Based on description the driver needs to be switch to use platdata
instead of priv.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-07-19 10:49:54 +02:00
Michal Simek
4fb67f47f1 usb_kdb: Get stdio_dev directly from sdev pointer
Driver supports only one instance of usb keyboard.
Remove the first dependency on generic usbkbd DEVNAME.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-07-19 10:49:54 +02:00
Michal Simek
f8f3e0e539 usb_kbd: Add support for watchdog
There is need to service watchdog in while loop or system will be
restarted when idlying.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-07-19 10:49:53 +02:00
Vipul Kumar
b4f015845a clk: zynqmp: Fixed the same if/else part error reported by coverity
This patch fixed the same if/else part error by adding the required
source select on the basis of is_pre_src check.

Signed-off-by: Vipul Kumar <vipul.kumar@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-07-19 10:49:53 +02:00
Luca Ceresoli
6da4f67ad0 arm/arm64: zynq/zynqmp: pass the PS init file as a kconfig variable
U-Boot needs to link ps7_init_gpl.c on Zynq or psu_init_gpl.c on
ZynqMP (PS init for short). The current logic to locate this file for
both platforms is:

 1. if a board-specific file exists in
    board/xilinx/zynq[mp]/$(CONFIG_DEFAULT_DEVICE_TREE)/ps?_init_gpl.c
    then use it
 2. otherwise use board/xilinx/zynq/ps?_init_gpl.c

In the latter case the file does not exist in the U-Boot sources and
must be copied in the source tree from the outside before starting the
build. This is typical when it is generated from Xilinx tools while
developing a custom hardware. However making sure that a
board-specific file is _not_ found (and used) requires some trickery
such as removing or overwriting all PS init files (e.g.: the current
meta-xilinx yocto layer).

This generates a few problems:

 * if the source tree is shared among different out-of-tree builds,
   they will pollute (and potentially corrupt) each other
 * the source tree cannot be read-only
 * any buildsystem must add a command to copy the PS init file binary
 * overwriting or deleting files in the source tree is ugly as hell

Simplify usage by allowing to pass the path to the desired PS init
file in kconfig variable XILINX_PS_INIT_FILE. It can be an absolute
path or relative to $(srctree). If the variable is set, the
user-specified file will always be used without being copied
around. If the the variable is left empty, for backward compatibility
fall back to the old behaviour.

Since the issue is the same for Zynq and ZynqMP, add one kconfig
variable in a common place and use it for both.

Also use the new kconfig help text to document all the ways to give
U-Boot the PS init file.

Build-tested with all combinations of:
 - platform: zynq or zynqmp
 - PS init file: from XILINX_PS_INIT_FILE (absolute, relative path,
   non-existing), in-tree board-specific, in board/xilinx/zynq[mp]/
 - building in-tree, in subdir, in other directory

Signed-off-by: Luca Ceresoli <luca@lucaceresoli.net>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Nathan Rossi <nathan@nathanrossi.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-07-19 10:49:53 +02:00
Michal Simek
5da7b8cb08 hush: Remove default CONFIG_SYS_PROMPT_HUSH_PS2 setting from board files
There is no reason to define default option for this macro which is
already done in common/cli_hush.c.

  86 #ifndef CONFIG_SYS_PROMPT_HUSH_PS2
  87 #define CONFIG_SYS_PROMPT_HUSH_PS2      "> "
  88 #endif

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-07-19 10:49:53 +02:00
Michal Simek
27eb7bce39 common: command: Handle USAGE failure separately
command_ret_t enum contains 3 return values but only two are handled
now. Extend cmd_process_error() and handle CMD_RET_USAGE separately.

These commands are affected by this change.
cmd/demo.c
cmd/efi.c
cmd/gpio.c
cmd/qfw.c
cmd/x86/fsp.c
test/dm/cmd_dm.c

And scripts shouldn't be affected because return value is not 0. But
every command implementation can choose what it is correct to pass.
I would expect that RET_USAGE is called when parameters are not
correctly passed (have incorrect value, missing parameters)
and RET_FAILURE when correct parameters are passed but command fails.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromum.org>
2018-07-19 10:49:53 +02:00
Michal Simek
3723324042 common: command: Use command_ret_t enum values instead of values
Use enum command_ret_t types in cmd_process_error().

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromum.org>
2018-07-19 10:49:53 +02:00
Michal Simek
24e2b20132 arm64: zynqmp: Enable usb mass storage command and functionality
Enable ums command for zcu100 to enable mass storage gadget.
Tested with ums 0 mmc 0 (for SD) and ums 0 usb 0 (for USB flashdisk).

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-07-19 10:49:53 +02:00
Michal Simek
d509f8dc5a gpio: zynq: Use live-tree function
Use live-tree function.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-07-19 10:49:53 +02:00
Tom Rini
1adbf2966a Merge branch 'master' of git://git.denx.de/u-boot-sunxi 2018-07-17 14:28:47 -04:00
Chen-Yu Tsai
32f67bb7a1 sunxi: Enable eMMC on Libre Computer Board ALL-H3-CC boards
The Libretech ALL-H3-CC has a high density connector for attaching
an eMMC module. The module form factor and connection is specific
to Libretech, and has provisions for split vmmc/vqmmc (core and I/O)
voltage supplies, but this board does not wire the vqmmc side. The
H2+/H3/H5 SoCs do not support alternate I/O voltages for eMMC either.
Only 3.3V is supported. A specific module that ties vqmmc to vmmc,
with both at 3.3V, must be used.

Given that a) eMMC is not designed to be hotplugged, b) power is
always provided on the pins, and c) MMC controllers can deal with
missing cards, we can enable this by default. If a module is attached
it will be picked up by the system.

The device tree change was also submitted to the Linux Kernel and
has already been queued up for 4.19.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-07-17 21:07:34 +05:30
Tom Rini
3aae92fcd1 Merge branch 'master' of git://git.denx.de/u-boot-spi 2018-07-16 09:13:45 -04:00
Ludwig Zenz
51b2411946 sf: add paired dev info for winbond w25q16jv
This commit adds paired dev info for winbond w25q16jv
(tested w25q16jvssiq with a i.mx6 board)

Signed-off-by: Ludwig Zenz <lzenz@dh-electronics.de>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-07-16 14:17:13 +05:30
Ludwig Zenz
70cff76c38 sf: add Macronix mx25l1633e entry
Add support for the Macronix mx25l1633e nor flash. (Tested on a imx6 board)

Signed-off-by: Ludwig Zenz <lzenz@dh-electronics.de>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-07-16 14:14:42 +05:30
Ludwig Zenz
b1360e2fc9 sf: add Gigadevice gd25q16c entry
Add support for the Gigadevice gd25q16c nor flash. (Tested on a imx6 board)

Signed-off-by: Ludwig Zenz <lzenz@dh-electronics.de>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-07-16 14:14:42 +05:30
Hannes Schmelzer
760b75564f spi_flash: add a bunch of winbond flashes to id-table
This commit adds the following flashes to the id-table

- W25Q16JV
- W25Q32JV
- W25Q64JV
- W25Q128JV
- W25Q256JV

Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-07-16 14:05:50 +05:30
Siva Durga Prasad Paladugu
76338e2a0c zynqmp: zcu102: Add qspi driver support for ZynqMP zcu102 boards
This patch adds qspi driver support for all ZynqMP ZCU102
boards.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-07-16 14:03:10 +05:30
Siva Durga Prasad Paladugu
22cca1730e spi: zynqmp_gqspi: Add support for ZynqMP qspi driver
This patch adds qspi driver support for ZynqMP SoC. This
driver is responsible for communicating with qspi flash
devices.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
[jagan: removed GQSPI_MIO_NUM_ macros]
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-07-16 14:01:47 +05:30
Vipul Kumar
6e9d9fcb4c spi: xilinx_spi: convert to livetree
Update the xilinx spi driver to support a live tree.

Signed-off-by: Vipul Kumar <vipul.kumar@xilinx.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-07-16 14:01:20 +05:30
Vipul Kumar
83ce646943 spi: xilinx_spi: Added support to read JEDEC-id twice at the boot time
This patch is for the startup block issue in the spi controller.
SPI clock is passing through STARTUP block to FLASH. STARTUP block
don't provide clock as soon as QSPI provides command. So, first
command fails.

This patch added support to read JEDEC id in xilinx_spi_xfer ().

Signed-off-by: Vipul Kumar <vipul.kumar@xilinx.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-07-16 14:01:20 +05:30
Vipul Kumar
0c0de58f7b spi: xilinx_spi: Modify transfer logic xilinx_spi_xfer() function
This patch modify xilinx_spi_xfer() function and add rxfifo() and
txfifo() functions to add the modularity so that these functions
can be used by other functions within the same file.

This patch also added support to read fifo_size from dts.

Signed-off-by: Vipul Kumar <vipul.kumar@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-07-16 14:01:20 +05:30
Michal Simek
4e7c1a2651 spi: xilinx: Read reg base address from DTS file
This patch added support to read register base address from DTS file.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Vipul Kumar <vipul.kumar@xilinx.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-07-16 14:01:20 +05:30
Lothar Felten
a8b36f22b2 configs: Bananapi_M2_Ultra: enable gigabit ethernet
Enable the gigabit ethernet for the Bananapi M2 Ultra board.
Tested on BananaPi M2 Berry (R40), custom board (V40)

Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Lothar Felten <lothar.felten@gmail.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@openedev.com>
2018-07-16 12:29:02 +05:30
Lothar Felten
3c2abf5019 sunxi: R40: add gigabit ethernet devicetree node
Add a device tree node for the Allwinner R40/V40 GMAC gigabit
ethernet interface.
The R40 SoC does not use the syscon register for GMAC settings.
The gigabit ethernet interface can only be routed to a fixed set of
pins.
Updated to match the Linux kernel's device tree.

Signed-off-by: Lothar Felten <lothar.felten@gmail.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@openedev.com>
2018-07-16 12:27:27 +05:30
Lothar Felten
e46d73fa96 net: sun8i-emac: support R40 GMAC
Add support for the GMAC found in the Allwinner R40/V40 SoC.

The R40 GMAC interface is not controlled by the syscon register but
has a separate configuration register in the CCU.
The clock gate and reset bits are in a different register compared
to the other SoCs supported by this driver.
The driver uses the -gmac suffix for the R40 because the R40 also
has a different 100 MBit MAC (EMAC).

Signed-off-by: Lothar Felten <lothar.felten@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@openedev.com>
2018-07-16 12:27:27 +05:30
Lothar Felten
c6a21d6615 net: sun8i-emac: set mux and clock by driver data
Use driver data->variant information to select device specific
pin mux and phy clock settings.

Suggested by Jagan Teki

Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@openedev.com>
Signed-off-by: Lothar Felten <lothar.felten@gmail.com>
2018-07-16 12:27:27 +05:30
Lothar Felten
2f15743633 net: sun8i-emac: fix printing NULL character
If the variant is not set and therefore NULL, do not attempt to print
the variant.

Signed-off-by: Lothar Felten <lothar.felten@gmail.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@openedev.com>
2018-07-16 12:27:27 +05:30
Lothar Felten
30e71ad5b7 sunxi: R40: add gigabit ethernet clocks
Add clock control entries for the gigabit interface of the Allwinner
R40/V40 CPU

Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@openedev.com>
Signed-off-by: Lothar Felten <lothar.felten@gmail.com>
2018-07-16 12:27:27 +05:30
Adam Sampson
df63fcc06f dm: sunxi: Use DM for MMC and SATA on all A10 boards
Use the driver model for MMC and SATA, in preparation for CONFIG_BLK
defaulting to y.

Tested on A10 Cubieboard.

Signed-off-by: Adam Sampson <ats@offog.org>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
2018-07-16 12:26:00 +05:30
Adam Sampson
979b239b4c dm: mmc: sunxi: Add A10/A20 compatible strings
Commit dd27918c22 ("dm: mmc: sunxi: Add support for driver model")
only added the allwinner,sun5i-a13-mmc compatible string for this
driver. The DM initialisation code here also works with (at least) A10
and A20, so add the appropriate compatible strings as per Linux 4.17's
driver.

Tested on A10 Cubieboard and A20 pcDuino3 Nano with CONFIG_DM_MMC.
(A20 worked already, because sun7i-a20.dtsi specifies both the A13 and
A20 strings.)

Signed-off-by: Adam Sampson <ats@offog.org>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
2018-07-16 12:25:47 +05:30
Andre Przywara
df3ebdc99a sunxi: DT: A64: add proper SoPine baseboard device tree
When the defconfig for the SoPine baseboard was added, there wasn't any
proper DT for the board yet, so we used the Pine64 DT as a placeholder.
Copy the DT file(s) meanwhile added in Linux over to U-Boot, and use
them in our defconfig.
This is as of v4.18-rc3, exactly Linux commit:
commit 7d556bfc49adddf2beb0d16c91945c3b8b783282
Author: Jagan Teki <jagannadh.teki@gmail.com>
Date:   Mon Dec 4 10:23:07 2017 +0530

    arm64: allwinner: a64-sopine: Fix to use dcdc1 regulator instead of vcc3v3

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
2018-07-16 12:03:34 +05:30
Andre Przywara
2d0c3d6b16 sunxi: DT: H3: update board .dts files from Linux
Update the .dts file for the various boards with an Allwinner H3 SoC.
This is as of v4.18-rc3, exactly Linux commit:
commit 721afaa2aeb860067decdddadc84ed16f42f2048 (HEAD)
Merge: 7c00e8ae041b 87815dda5593
Author: Linus Torvalds <torvalds@linux-foundation.org>
Date:   Mon Jun 11 17:57:38 2018 -0700

    Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

This also includes the OrangePi Zero .dts, which technically has an
Allwinner H2+ SoC.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
2018-07-16 12:03:16 +05:30
Andre Przywara
1caeae375f sunxi: DT: H5: update board .dts files from Linux
Update the .dts file for the various boards with an Allwinner H5 SoC.
This is as of v4.18-rc3, exactly Linux commit:
commit af5d05bdc99c211729cba0a3d5417bccfa308caf
Author: Neil Armstrong <narmstrong@baylibre.com>
Date:   Tue Apr 24 13:47:14 2018 +0200

    arm64: dts: allwinner: Add dts file for Libre Computer Board ALL-H3-CC H5 ver.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
2018-07-16 12:03:05 +05:30
Andre Przywara
7514ed33d2 sunxi: DT: update device tree files for Allwinner H3 and H5 SoCs
Update the device tree files from the Linux tree as of v4.18-rc3,
exactly Linux commit:
commit 55c5ba5e49a0a124ed416880e8227b493474495e
Author: Chen-Yu Tsai <wens@csie.org>
Date:   Tue Apr 24 19:34:22 2018 +0800

    arm64: dts: allwinner: h5: Add cpu0 label for first cpu

Since the H3 and H5 are very similar (aside from the actual ARM cores),
they share most the SoC .dtsi and thus have to be updated together.
One tiny change is the removal of the "arm/" prefix from the include
path in the sun50i-h5.dtsi, which is needed because we don't share the
same sophisticated DT directory layout of Linux.
Also we need to fix up the board .dts files already, since the .dtsi
removes some pins, so the .dts can't reference them anymore. This is to
maintain bisectability.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
2018-07-16 12:02:54 +05:30
Andre Przywara
68dd17c302 sunxi: DT: A64: update board .dts files from Linux
Update the .dts files for the various boards with an Allwinner A64 SoC.
This is as of v4.18-rc3, exactly Linux commit:
commit 818668055c9d588c9a9d151e3b258ed1adacba0b
Author: Jagan Teki <jagan@amarulasolutions.com>
Date:   Mon Apr 23 12:02:39 2018 +0530

    arm64: dts: allwinner: a64: bananapi-m64: add usb otg

It updates the existing DT files, adds the newly added axp803.dtsi and
removes our temporary kludge file to get Ethernet support in U-Boot.
I left the amarula-relic alone, as this DT has not reached mainline yet.
The changes are not critical anyway, and the next sync will fix this.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
2018-07-16 12:02:41 +05:30
Andre Przywara
62f3c12c4d sunxi: DT: A64: update device tree file for Allwinner A64 SoC
Updates the device tree file from the the Linux tree as of v4.18-rc3,
exactly Linux commit:
commit c1cff65f9b16b31e731e2e75bbe06638c86e1996
Author: Harald Geyer <harald@ccbib.org>
Date:   Thu Mar 15 16:25:08 2018 +0000

    arm64: dts: allwinner: a64: add simplefb for A64 SoC

This also pulls in the newly required include files for the clock and
reset bindings, also removes the now redundant part from our
*-u-boot.dtsi overlay file.
I kept the PWM node from U-Boot, as we recently gained this explicitly
for U-Boot's own usage and I don't want to regress here. This node is in
the queue for mainline Linux already, so the next sync will make it all
equal again.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
2018-07-16 12:01:58 +05:30
Ley Foon Tan
5e9a964581 mach-stm32: Rename CONFIG_SPL_RESET_SUPPORT to CONFIG_SPL_DM_RESET
CONFIG_SPL_RESET_SUPPORT has been renamed to CONFIG_SPL_DM_RESET, update
this Kconfig file.

Fixes: bfc6bae8fa ("reset: Rename CONFIG_SPL_RESET_SUPPORT to CONFIG_SPL_DM_RESET")
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2018-07-13 14:47:29 -04:00
Tom Rini
914bb7ea2f Merge branch 'master' of git://git.denx.de/u-boot-socfpga
- Update SPDX tag in arch/arm/mach-socfpga/spl_a10.c

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-07-13 14:47:04 -04:00
Tom Rini
f2df46e5d9 Merge branch 'master' of git://git.denx.de/u-boot-i2c 2018-07-12 10:35:33 -04:00
Ley Foon Tan
aa52966336 arm: socfpga: Fixes: include <debug_uart.h>
Fix compilation warning when enable CONFIG_DEBUG_UART.

arch/arm/mach-socfpga/spl_s10.c: In function ‘board_init_f’:
arch/arm/mach-socfpga/spl_s10.c:146:2: warning: implicit declaration of function ‘debug_uart_init’; did you mean ‘part_init’? [-Wimplicit-function-declaration]
  debug_uart_init();

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2018-07-12 16:03:35 +02:00
Ley Foon Tan
8c9f247a1a arm: socfpga: Fix: Compile MCR instruction on ARM 32-bit only
MCR instruction only available in ARM 32-bit. So, compile MCR instruction
when ARM 32-bit is enabled.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2018-07-12 16:03:35 +02:00
Ley Foon Tan
17b3f32dd0 arm: dts: socfpga: stratix10: Fix memory node
Commit 5dfd5607af2114047bd ("ARM: socfpga: Pull DRAM size from DT") get
memory size from DT. So, we need to update memory size in memory node.
Otherwise, it cause U-boot hang.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2018-07-12 16:03:35 +02:00
Tom Rini
62a69a6bbb Merge branch 'master' of git://git.denx.de/u-boot-ubi 2018-07-12 09:47:39 -04:00
Ye Li
971490c892 lpi2c: Add bus busy error handling
When doing "i2c dev 4; i2c probe" with ENET daughter card connected
on iMX8QXP MEK board, we met a i2c bus busy issue, that the BBF of
lpi2c always show busy, but the master is idle, and stop is detected
(SDF set).

This patch addes a handling to re-init the lpi2c master for this
case. Then the issue can be worked around.

Signed-off-by: Ye Li <ye.li@nxp.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2018-07-12 11:09:42 +02:00
Ye Li
d144f61ad3 lpi2c: Fix bus stop problem in xfer
In xfer function, both bus_i2c_read and bus_i2c_write will
send a STOP command.  This causes a problem when reading register
data from i2c device.

Generally two operations comprise the register data reading:
   1. Write the register address to i2c device.
      START | chip_addr | W | ACK | register_addr | ACK |

   2. Read the Data from i2c device.
      START | chip_addr | R | ACK | DATA          | NACK | STOP

The STOP command should happen at the end of the transfer, otherwise
we will always get data from register address 0

Signed-off-by: Ye Li <ye.li@nxp.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2018-07-12 11:09:23 +02:00
Gao Pan
a32effd283 imx: lpi2c: fix clock issue when NACK detected
For LPI2C IP, NACK is detected by the rising edge of the ninth clock.
In current uboot driver, once NACK is detected, it will reset and then
disable LPI2C master. As a result, we can never see the falling edge
of the ninth clock.

Signed-off-by: Gao Pan <pandy.gao@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2018-07-12 11:09:07 +02:00
Ye Li
9b2ebcc060 imx_lpi2c: Update lpi2c driver to support imx8
Add compatible string for i.MX8 and move imx_lpi2c.h from mx7ulp directory
to u-boot include directory as a common header file.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2018-07-12 11:08:41 +02:00
Marek Vasut
887a8b6ec2 ARM: socfpga: Assure correct ACTLR configuration
Make sure the ARM ACTLR register has correct configuration, otherwise
the Linux kernel refuses to boot. In particular, the "Write Full Line
of Zeroes" bit must be cleared.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
2018-07-12 09:22:13 +02:00
Marek Vasut
df78f016e8 ARM: socfpga: Make DRAM node available in SPL
The SPL can also parse the DRAM configuration node to figure out the
memory layout, make sure it is available.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
2018-07-12 09:22:13 +02:00
Marek Vasut
297b653bbf ARM: socfpga: Pull DRAM size from DT
Pull the DRAM size from DT instead of hardcoding it into U-Boot.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
2018-07-12 09:22:13 +02:00
Marek Vasut
07252f6f7e ddr: altera: Add ECC DRAM scrubbing support for Arria10
The SDRAM must first be rewritten by zeroes if ECC is used to initialize
the ECC metadata. Make the CPU overwrite the DRAM with zeroes in such a
case. This scrubbing implementation turns the caches on temporarily, then
overwrites the whole RAM with zeroes, flushes the caches and turns them
off again. This provides satisfactory performance.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
2018-07-12 09:22:12 +02:00
Marek Vasut
93a8ed8685 ddr: altera: Drop custom dram_bank_mmu_setup() on Arria10
This function was never used in SPL and the default implementation of
dram_bank_mmu_setup() does the same thing. The only difference is the
part which configures OCRAM as cachable, which doesn't really work as
it covers more than the OCRAM.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
2018-07-12 09:22:12 +02:00
Ley Foon Tan
2e1de5bd97 arm: socfpga: Add do_bridge_reset for Arria 10
Add do_bridge_reset() function for Arria 10, it is required by misc.c.

arch/arm/mach-socfpga/built-in.o: In function `do_bridge':
arch/arm/mach-socfpga/misc.c:221: undefined reference to `do_bridge_reset'
make[1]: *** [u-boot] Error 1

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2018-07-12 09:22:12 +02:00
Ley Foon Tan
a684729a15 arm: socfpga: stratix10: Enable Stratix10 SoC build
Add build support for Stratix SoC

Signed-off-by: Chin Liang See <chin.liang.see@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>

Conflicts:

	arch/arm/Kconfig
	arch/arm/mach-socfpga/Kconfig
2018-07-12 09:22:12 +02:00
Ley Foon Tan
f6b8345571 board: altera: stratix10: Add socdk board support for Stratix10 SoC
Add socdk board support for Stratix SoC

Signed-off-by: Chin Liang See <chin.liang.see@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2018-07-12 09:22:12 +02:00
Ley Foon Tan
0bc28b7cb8 ddr: altera: stratix10: Add DDR support for Stratix10 SoC
Add DDR support for Stratix SoC

Signed-off-by: Chin Liang See <chin.liang.see@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2018-07-12 09:22:12 +02:00
Ley Foon Tan
73aede596c arm: socfpga: stratix10: Add timer support for Stratix10 SoC
Add timer support for Stratix SoC

Signed-off-by: Chin Liang See <chin.liang.see@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Reviewed-by: Marek Vasut <marex@denx.de>
2018-07-12 09:22:12 +02:00
Ley Foon Tan
4765ddb0da arm: socfpga: stratix10: Add SPL driver for Stratix10 SoC
Add SPL driver support for Stratix SoC

Signed-off-by: Chin Liang See <chin.liang.see@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2018-07-12 09:22:12 +02:00
Ley Foon Tan
c859f2a77d arm: socfpga: Restructure the SPL file
Restructure the SPL so each devices such as CV, A10 and S10
will have their own dedicated SPL file. SPL file determine
the HW initialization flow which is device specific

Signed-off-by: Chin Liang See <chin.liang.see@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2018-07-12 09:22:11 +02:00
Ley Foon Tan
914a84e6ee arm: socfpga: stratix10: Add MMU support for Stratix10 SoC
Add MMU memory mapping table for Stratix SoC.

Signed-off-by: Chin Liang See <chin.liang.see@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Acked-by: Marek Vasut <marex@denx.de>
2018-07-12 09:22:11 +02:00
Ley Foon Tan
a280e9db64 arm: socfpga: stratix10: Add mailbox support for Stratix10 SoC
Add mailbox support for Stratix SoC

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Signed-off-by: Chin Liang See <chin.liang.see@intel.com>
Reviewed-by: Marek Vasut <marex@denx.de>
2018-07-12 09:22:11 +02:00
Ley Foon Tan
d559130e36 arm: socfpga: stratix10: Add misc support for Stratix10 SoC
Add misc support such as EMAC and cpu info printout for Stratix SoC

Signed-off-by: Chin Liang See <chin.liang.see@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2018-07-12 09:22:11 +02:00
Ley Foon Tan
10f9e4b1c8 arm: socfpga: misc: Move bridge command to misc common
Move bridge command to misc common driver, in preparation to used by
other platforms.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2018-07-12 09:22:11 +02:00
Ley Foon Tan
8b71e46cea spi: cadence_qspi: Fix warning cast from pointer to integer of different size
Use "%p" to print cmdbuf.

Compilation warning as below:

  CC      spl/drivers/spi/cadence_qspi_apb.o
  LD      spl/lib/built-in.o
drivers/spi/cadence_qspi_apb.c: In function ‘cadence_qspi_apb_indirect_write_setup’:
drivers/spi/cadence_qspi_apb.c:696:18: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast]
          cmdlen, (unsigned int)cmdbuf);

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Acked-by: Marek Vasut <marex@denx.de>
2018-07-12 09:22:11 +02:00
Ley Foon Tan
9bd39dd8e5 spi: cadence_qspi: Fix compilation warning
Use "%zu" for size_t data type.

Compilation warning as below:

In file included from include/linux/bug.h:7:0,
                 from include/common.h:26,
                 from drivers/spi/cadence_qspi.c:8:
drivers/spi/cadence_qspi.c: In function ‘cadence_spi_xfer’:
drivers/spi/cadence_qspi.c:211:8: warning: format ‘%d’ expects argument of type ‘int’, but argument 3 has type ‘size_t {aka long unsigned int}’ [-Wformat=]
  debug("%s: len=%d [bytes]\n", __func__, data_bytes);
        ^
include/linux/printk.h:37:21: note: in definition of macro ‘pr_fmt’
 #define pr_fmt(fmt) fmt
                     ^~~
include/log.h:142:2: note: in expansion of macro ‘debug_cond’
  debug_cond(_DEBUG, fmt, ##args)
  ^~~~~~~~~~
drivers/spi/cadence_qspi.c:211:2: note: in expansion of macro ‘debug’
  debug("%s: len=%d [bytes]\n", __func__, data_bytes);

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Acked-by: Marek Vasut <marex@denx.de>
2018-07-12 09:22:11 +02:00
Christophe Kerello
5a08cfee39 ubifs: remove useless code
By checking ubifs source code, s_instances parameter is not
used anymore. So, set this parameter and the associated source
code under __UBOOT__ compilation.

Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-07-12 07:27:34 +02:00
Stefan Roese
4a94e53b23 cmd: ubi: Add additional message upon UBI attach error
When trying to attach an UBI MTD partition via "ubi part", it may happen
that the MTD partition defined in U-Boot (via mtdparts) is not big
enough than the one, where the UBI device has been created on. This
may lead to errors, which are not really descriptive to debug and
solve this issue, like:

ubi0 error: vtbl_check: too large reserved_pebs 1982, good PEBs 1020
ubi0 error: vtbl_check: volume table check failed: record 0, error 9

or:

ubi0 error: init_volumes: not enough PEBs, required 1738, available 1020
ubi0 error: ubi_wl_init: no enough physical eraseblocks (-718, need 1)
ubi0 error: ubi_attach_mtd_dev: failed to attach mtd1, error -12

Lets add an additional message upon attach failure, to aid the U-Boot
user to solve this problem.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Heiko Schocher <hs@denx.de>
2018-07-12 07:26:18 +02:00
Stefan Agner
68c7025d99 cmd: ubi: print load size after establishing volume size
When using static volumes, the file size stored in the volume is
determined at runtime. Currently the ubi command prints the file
size specified on the console, which leads to a rather confusing
series of messages:
  # ubi read ${fdt_addr_r} testvol
  Read 0 bytes from volume testvol to 82000000
  No size specified -> Using max size (179924992)

Make sure to print the actual size read in any case:
  # ubi read ${fdt_addr_r} testvol
  No size specified -> Using max size (179924992)
  Read 179924992 bytes from volume testvol to 82000000

Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
2018-07-12 07:25:32 +02:00
Tom Rini
1612ff0dfb Merge branch 'master' of git://git.denx.de/u-boot-mips 2018-07-11 21:55:20 -04:00
Tom Rini
1703fbefd9 Merge git://git.denx.de/u-boot-dm 2018-07-11 09:40:38 -04:00
Philippe Reynes
c38abed509 led: bcm6328: read base address in the parent node
In the device tree, the address for the led is located
in the parent node (for exemple leds), not in the led node
(for exemple led@0).

The commit "led: bcm6328: convert to use live dt"
(sha1: 8994551760)
change this behaviour and read the address in the led node.

We fix this by reading the base address for led
in the parent node.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2018-07-11 14:23:55 +02:00
Philippe Reynes
cef1f0c7a4 cpu: bmips: fix probe to get the address
In the device tree, the address for cpu is located in
the node "cpus", not in the cpu node (for exemple cpu@0).
So when probing cpu, the cpu address must be read in the
cpu parent.

The commit "cpu: bmips: convert to use live dt"
(sha1: c444afbbef)
change this behaviour and read the address in the
cpu node when probing cpu.

We fix this by reading the address in the cpu parent.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2018-07-11 14:23:55 +02:00
Daniel Schwierzeck
d0626e0b3c MIPS: add MIPS Release 6 build coverage for Boston boards
Now that Travis CI is building with gcc-7.3.0, we can add
build coverage for all combinations of MIPS Release 6
instruction sets (MIPS32, MIPS64, Big Endian, Little Endian).

Add mew default configs for Boston board for all MIPS Release 6
variants.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-07-11 14:23:55 +02:00
Baruch Siach
421be6fca5 Makefile: drop mention of *.cfgtmp
Since commit f916757300 (imx: Create distinct pre-processed mkimage
config files), *.cfgtmp files are no longer generated. There is no need
to remove them on the 'clean' target anymore.

Rename the .gitignore glob to *.cfgout.

Cc: Trent Piepho <tpiepho@impinj.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
2018-07-10 16:56:00 -04:00
Alex Kiernan
795f452eef mkimage: fit_image: Add support for SOURCE_DATE_EPOCH in signatures
When generating timestamps in signatures, use imagetool_get_source_date()
so we can be overridden by SOURCE_DATE_EPOCH to generate reproducible
images.

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
Reviewed-by: Simon Glass <sjg@chromum.org>
2018-07-10 16:56:00 -04:00
Alex Kiernan
87925df2b3 mkimage: Refactor imagetool_get_source_date to take command name
So we can use imagetool_get_source_date() from callers who do not have
the image tool params struct, just pass in the command name for the error
message.

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
Reviewed-by: Simon Glass <sjg@chromum.org>
2018-07-10 16:56:00 -04:00
Tien Fong Chee
67a2616af1 common/memsize.c: Increase save array for supporting memory size > 4GB
In ARM 64-bits, memory size can be supported is more than 4GB,
hence increasing save array is needed to cope with testing larger memory.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
2018-07-10 16:55:59 -04:00
Siva Durga Prasad Paladugu
0fd2290cfc cmd: Kconfig: Move CONFIG_MP to Kconfig
This patch moves CONFIG_MP to Kconfig

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-07-10 16:55:59 -04:00
Baruch Siach
bf5dd78cd4 Makefile: drop unused cpp_cfg macro
Commit e19b0fb485 (kbuild: generate u-boot.cfg as a byproduct of
include/autoconf.mk) removed the use of the cpp_cfg macro in Makefile,
but forgot to remove its definition.

Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-07-10 16:55:59 -04:00
Adam Ford
e745782c25 omap3_logic: Change console from ttyO0 to ttyS0
Newer kernels have moved from ttyO0 to ttyS0, and when booting
it drops a notice:

  WARNING: Your 'console=ttyO0' has been replaced by 'ttyS0'
  This ensures that you still see kernel messages. Please
  update your kernel commandline.

This patch updates the console to use ttyS0 and eliminate the
chatter.

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-07-10 16:55:59 -04:00
Heinrich Schuchardt
3804f5bb4a common: print \n in initr_scsi()
Typically init_scsi() does not output anything. So initr_scsi() should
provide a \n or we may see borked output like

	SCSI:  Net:   No ethernet found.

as observed with sandbox_defconfig.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-07-10 16:55:58 -04:00
Adam Ford
6696de885e gpio: omap_gpio: Convert to auto-alloc feature when DT is supported
The omap_gpio driver has a TODO that says when every board is converted
to DM and DT, the omap_gpio_bind can stop using calloc and switch
to auto-alloc.

This patch converts this driver to auto-calloc when DT is enabled.

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-07-10 16:55:58 -04:00
Teddy Reed
7346c1e192 vboot: Do not use hashed-strings offset
The hashed-strings signature property includes two uint32_t values.
The first is unneeded as there should never be a start offset into the
strings region. The second, the size, is needed because the added
signature node appends to this region.

See tools/image-host.c, where a static 0 value is used for the offset.

Signed-off-by: Teddy Reed <teddy.reed@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-07-10 16:55:58 -04:00
Teddy Reed
72239fc85f vboot: Add FIT_SIGNATURE_MAX_SIZE protection
This adds a new config value FIT_SIGNATURE_MAX_SIZE, which controls the
max size of a FIT header's totalsize field. The field is checked before
signature checks are applied to protect from reading past the intended
FIT regions.

This field is not part of the vboot signature so it should be sanity
checked. If the field is corrupted then the structure or string region
reads may have unintended behavior, such as reading from device memory.
A default value of 256MB is set and intended to support most max storage
sizes.

Suggested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Teddy Reed <teddy.reed@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-07-10 16:55:58 -04:00
Thomas Fitzsimmons
894c3ad27f board: arm: Add support for Broadcom BCM7445
Add support for loading U-Boot on the Broadcom 7445 SoC.  This port
assumes Broadcom's BOLT bootloader is acting as the second stage
bootloader, and U-Boot is acting as the third stage bootloader, loaded
as an ELF program by BOLT.

Signed-off-by: Thomas Fitzsimmons <fitzsim@fitzsim.org>
Cc: Stefan Roese <sr@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Cc: Florian Fainelli <f.fainelli@gmail.com>
2018-07-10 16:55:57 -04:00
Ben Whitten
d154ca6003 spl: fit: verify images prior to post processing
Verification of hashes needs to take place before any image post
processing, thus matching full FIT image processing.
This allows mechanisms such as encryption be applied to images
prior to fit generation at the spl level.

Signed-off-by: Ben Whitten <ben.whitten@lairdtech.com>
2018-07-10 16:55:57 -04:00
Alex Kiernan
d673668964 configs: Remove empty #ifdef/#ifndef blocks from configs
Remove empty #ifdef/#ifndef..#endif blocks where the configuration they
guarded has been completely removed.

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
2018-07-10 16:55:57 -04:00
Marek Vasut
56419ea5f0 spl: fit: Fix support for loading FPGA bitstream
Move the FPGA loading from IS_ENABLED(CONFIG_SPL_OS_BOOT) &&
IS_ENABLED(CONFIG_SPL_GZIP) conditional. The FPGA loading can
be used without OS loading and GZIP support in SPL. This issue
was most likely induced by some merge conflict, so fix it.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Tom Rini <trini@konsulko.com>
2018-07-10 16:55:57 -04:00
Marek Vasut
26ad648ff4 spl: spi: Support full fitImage handling
Handle the case where the full fitImage support is enabled. In this
case, the whole fitImage must be loaded up front as some parts of the
fitImage code require memory-mapped access to the entire fitImage.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
Cc: Simon Glass <sjg@chromium.org>
2018-07-10 16:55:56 -04:00
Marek Vasut
8b1531f7bc spl: fat: Support full fitImage handling
Handle the case where the full fitImage support is enabled. In this
case, the whole fitImage must be loaded up front as some parts of the
fitImage code require memory-mapped access to the entire fitImage.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
Cc: Simon Glass <sjg@chromium.org>
2018-07-10 16:55:56 -04:00
Marek Vasut
078e558699 fit: Verify all configuration signatures
Rather than verifying configuration signature of the configuration node
containing the kernel image types, verify all configuration nodes, even
those that do not contain kernel images. This is useful when the nodes
contain ie. standalone OSes or U-Boot.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Cc: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-07-10 16:55:56 -04:00
Paul Burton
8793631ec1 test/py: vboot: Remove stderr redirect from openssl command
The openssl command specified in test_with_algo() ultimately ends up
being run by RunAndLog::run(), which uses it to construct a Popen object
with the default shell=False. The stderr redirect in the command is
therefore simply passed to openssl as an argument. With at least openssl
1.1.0f this causes openssl, and therefore test_vboot, to fail with:

  genpkey: Use -help for summary.
  Exit code: 1

Any stderr output ought to be captured & stored in the RunAndLog
object's output field and returned from run() via run_and_log() to
test_with_algo() which then ignores it anyway, so we can drop the
shell-like redirection with no ill effects. With this fix test_vboot now
passes for me.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
2018-07-10 14:50:50 -06:00
Paul Burton
9f9e8a4dda test/py: hush_if_test: Use open() in place of file()
In python 3.x the file() function has been removed. Use open() instead,
which works on both python 2.x & 3.x, and is described as the preferred
method of opening a file by python 2.x documentation anyway.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
2018-07-10 14:50:50 -06:00
Paul Burton
57bf9bea34 test/py: fit: Open files as binary files
The read_file() function in test_fit is used with files that are not
text files, as well as some that are. It is never used in a way that
requires it to decode text files to characters, so open all files in
binary mode such that read() doesn't attempt to decode characters for
files which are not text files.

Without this test_fit fails on python 3.x when reading an FDT in
run_fit_test() with:

  UnicodeDecodeError: 'utf-8' codec can't decode byte 0xd0 in position
                       0: invalid continuation byte

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
2018-07-10 14:50:50 -06:00
Paul Burton
052ca37daa test/py: Import 'configparser' lower case to be python 3.x safe
In python 3.x the configparser module is named with all lower case.
Import it as such in order to avoid errors when running on python 3.x,
and fall back to the CamelCase version in order to keep working with
python 2.x.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
2018-07-10 14:50:50 -06:00
Paul Burton
b8c455500a test/py: Use range() rather than xrange()
In python 3.x the xrange() function has been removed, and range()
returns an iterator much like Python 2.x's xrange(). Simply use range()
in place of xrange() in order to work on both python 2.x & 3.x. This
will mean a small cost on python 2.x since range() will return a list
there rather than an iterator, but the cost should be negligible.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
2018-07-10 14:50:50 -06:00
Paul Burton
dffd56d1d2 test/py: Make print statements python 3.x safe
In python 3.x print must be called as a function rather than used as a
statement. Update uses of print to the function call syntax in order to
be python 3.x safe.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
2018-07-10 14:50:50 -06:00
Tom Rini
e3396ffd72 Merge git://git.denx.de/u-boot-dm 2018-07-10 10:29:14 -04:00
Ley Foon Tan
495c70f9df net: designware: Add reset ctrl to driver
Add code to reset all reset signals as in Ethernet DT node. A reset
property is an optional feature, so only print out a warning and do not
fail if a reset property is not present.

If a reset property is discovered, then use it to deassert, thus
bringing the IP out of reset.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-07-09 15:28:28 -04:00
Ley Foon Tan
b051eecbda serial: ns16550: Add reset ctrl to driver
Add code to reset all reset signals as in serial DT node. A reset
property is an optional feature, so do not fail if a reset property is
not present.

If a reset property is discovered, then use it to deassert, thus
bringing the IP out of reset.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-07-09 15:28:28 -04:00
Ley Foon Tan
2d4d693772 mmc: dwmmc: socfpga: Add reset ctrl to driver
Add code to reset all reset signals as in mmc DT node. A reset property
is an optional feature, so only print out a warning and do not fail if a
reset property is not present.

If a reset property is discovered, then use it to deassert, thus
bringing the IP out of reset.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-07-09 15:28:24 -04:00
Ley Foon Tan
d99894dd3a include: reset: Change to use CONFIG_IS_ENABLED(DM_RESET)
Change to use CONFIG_IS_ENABLED(DM_RESET), so this can work in SPL
build (CONFIG_SPL_DM_RESET) and U-boot build (CONFIG_DM_RESET).

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-07-09 15:25:45 -04:00
Ley Foon Tan
bfc6bae8fa reset: Rename CONFIG_SPL_RESET_SUPPORT to CONFIG_SPL_DM_RESET
Rename CONFIG_SPL_RESET_SUPPORT to CONFIG_SPL_DM_RESET, so can use
CONFIG_IS_ENABLED(DM_RESET) checking in reset.h later.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-07-09 15:25:43 -04:00
Manivannan Sadhasivam
e2a1484c3b MAINTAINERS: Add entries for Actions Semi OWL family
Add myself as the Maintainer for Actions Semi OWL family and its
relevant board, drivers.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2018-07-09 15:25:41 -04:00
Manivannan Sadhasivam
6f9347f3bc serial: Add Actions Semi OWL UART support
This commit adds Actions Semi OWL family UART support. This driver
relies on baudrate configured by primary bootloaders.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-07-09 15:25:39 -04:00
Manivannan Sadhasivam
ca769a1394 arm: dts: bubblegum_96: Enable UART5 for serial console
This commit enables UART5 found in S900 SoC for serial console support.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2018-07-09 15:25:37 -04:00
Manivannan Sadhasivam
2a8afb44ba arm: dts: s900: Add UART node
This commit adds UART node for Actions Semi S900 SoC.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2018-07-09 15:25:35 -04:00
Manivannan Sadhasivam
ae485b540f clk: Add Actions Semi OWL clock support
This commit adds Actions Semi OWL family base clock and S900 SoC
specific clock support. For S900 peripheral clock support, only UART
clock has been added for now.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-07-09 15:25:31 -04:00
Manivannan Sadhasivam
69e62417c7 arm: dts: s900: Add Clock Management Unit (CMU) nodes
This commit adds Clock Management Unit (CMU) nodes for Actions Semi
S900 SoC.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2018-07-09 15:25:28 -04:00
Manivannan Sadhasivam
188d7aa4e2 dt-bindings: clock: Add S900 CMU register definitions
This commit adds Actions Semi S900 CMU register definitions to clock
bindings.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-07-09 15:25:26 -04:00
Manivannan Sadhasivam
eba6589f7e board: Add uCRobotics Bubblegum-96 board support
This commit adds uCRobotics Bubblegum-96 board support. This board is
one of the 96Boards Consumer Edition platform based on Actions Semi
S900 SoC.

Features:
- Actions Semi S900 SoC (4xCortex A53, Power VR G6230 GPU)
- 2GiB RAM
- 8GiB eMMC, uSD slot
- WiFi, Bluetooth and GPS module
- 2x Host, 1x Device USB port
- HDMI
- 20-pin low speed and 40-pin high speed expanders, 6 LED, 3 buttons

U-Boot will be loaded by ATF at EL2 execution level. Relevant driver
support will be added in further commits.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2018-07-09 15:25:23 -04:00
Manivannan Sadhasivam
97775d26c2 arm: Add support for Actions Semi OWL SoC family
This commit adds Actions Semi OWL SoC family support with S900 as the
first target SoC.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2018-07-09 15:25:15 -04:00
Tom Rini
3eae864a23 configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-07-09 15:13:08 -04:00
Simon Glass
16b8d6b769 binman: Support updating the device tree with calc'd info
It is useful to write the position and size of each entry back to the
device tree so that U-Boot can access this at runtime. Add a feature to
support this, along with associated tests.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-07-09 09:11:00 -06:00
Simon Glass
078ab1a2f5 binman: Add a SetCalculatedProperties() method
Once binman has packed the image, the position and size of each entry is
known. It is then possible for binman to update the device tree with these
positions. Since placeholder values have been added, this does not affect
the size of the device tree and therefore the packing does not need to be
performed again.

Add a new SetCalculatedProperties method to handle this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-07-09 09:11:00 -06:00
Simon Glass
ecab89737a binman: Add a ProcessFdt() method
Some entry types modify the device tree, e.g. to remove microcode or add a
property. So far this just modifies their local copy and does not affect
a 'shared' device tree.

Rather than doing this modification in the ObtainContents() method, and a
new ProcessFdt() method which is specifically designed to modify this
shared device tree.

Move the existing device-tree code over to use this method, reducing
ObtainContents() to the goal of just obtaining the contents without any
processing, even for device tree.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-07-09 09:11:00 -06:00
Simon Glass
0a4357c4c2 binman: Complete documentation of stages
At present one of the stages is badly numbered and not described. Fix
this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-07-09 09:11:00 -06:00
Simon Glass
116adecb5e dtoc: Add functions to add integer properties
Add a few simple functions to add a placeholder integer property, and
set its value.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-07-09 09:11:00 -06:00
Simon Glass
fe57c784ad dtoc: Avoid unwanted output during tests
At present some warnings are printed to indicate failures which are a
known part of running the tests. Suppress these.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-07-09 09:11:00 -06:00
Simon Glass
ef6f77a847 test: Enable cover-coverage tests for dtoc and fdt
Now that we have 100% code coverage we can enable these tests in the test
script also.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-07-09 09:11:00 -06:00
Simon Glass
8512ea2e35 dtoc: Increase code coverage to 100%
Add more tests to increase dtoc code coverage to 100%.

Correct a whitespace error in some test .dts files at the same time.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-07-09 09:11:00 -06:00
Simon Glass
c3f9454103 binman: Move capture_sys_output() to test_util
This function is useful in various tests. Move it into the common test
utility module.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-07-09 09:11:00 -06:00
Simon Glass
ba765217ed dtoc: Add a test for code coverage
Add a -T option to run a code-coverage test on dtoc. At present this is
about 96%. Future work will increase it to 100%.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-07-09 09:11:00 -06:00
Simon Glass
dfe5f5b97d dtoc: Fix some minor errors
Fix some comments and a printf string which is incorrect.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-07-09 09:11:00 -06:00
Simon Glass
760b7170c5 dtoc: Fix properties with a single zero-arg phandle
At present a property with a single phandle looks like an integer value
to dtoc. Correct this by adjusting it in the phandle-processing code.

Add a test for this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-07-09 09:11:00 -06:00
Simon Glass
b9066ffc13 dtoc: Fix Fdt.GetNode() to handle a missing node
At present the algortihm is not correct since it will return the root node
if the requested node is not found and there are no slashes in the
requested node name. Fix this and add a test.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-07-09 09:11:00 -06:00
Simon Glass
f9b88b3a5d dtoc: Keep track of property offsets
At present the Fdt class does not keep track of property offsets if they
change due to removal of properties. Update the code to handle this, and
add a test.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-07-09 09:11:00 -06:00
Simon Glass
2a2d91d0d6 dtoc: Update fdt tests to increase code coverage
At present only some of the fdt functionality is tested. Add more tests to
cover the rest of it. Also turn on test coverage, which is now 100% with
a small exclusion for a Python 3 feature.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-07-09 09:11:00 -06:00
Simon Glass
960662404f dtoc: Drop use of a local dtb buffer
At present the Fdt class has its own copy of the device tree. This is
confusing an unnecessary now that pylibfdt has its own. Drop it and
provide access functions to the buffer.

This allows us to move the rest of the implementation to use pylibfdt
methods instead of directly calling libfdt stubs.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-07-09 09:11:00 -06:00
Simon Glass
117f57b75a dtoc: Make use of the new pylibfdt methods
Now that pylibfdt supports a fuller API we don't need to directly call
the libfdt stubs. Update the code to use the Fdt methods instead.

Some other cases remain which will be tidied up in a later commit, since
they need larger changes.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-07-09 09:11:00 -06:00
Simon Glass
57f0bc428a dtoc: Update tests to write failures to /tmp
When a test fails due to an output mismatch (e.g. due to a new property
being adding to a test file) it is currently hard to update the test to
the new output. In particular the tabs in the file are written as \t in
the Python tests.

To make this easier, write both the expected and actual results to /tmp
to allow use of meld, and copying into the test.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-07-09 09:11:00 -06:00
Simon Glass
2ba9875312 dtoc: Add some tests for the fdt module
At present this module is tested via the dtoc tests. This is a bit painful
since the tests are at a higher level and so failures are more difficult
to diagnose.

Add some tests that exercise the fdt module directly.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-07-09 09:11:00 -06:00
Simon Glass
ff1fd6ccde binman: Move coverage logic into a new test_util file
At present only binman has the logic for determining Python test coverage
but this is useful for other tools also. Move it out into a separate file
so it can be used by other tools.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-07-09 09:11:00 -06:00
Simon Glass
c640ed0ce6 libfdt: Add get_property() and del_node()
Add support for these functions in the Python binding. This patch stands
in for a pending upstream change.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-07-09 09:11:00 -06:00
Simon Glass
a1e0085519 libfdt: Fix the Python pack() function
This currently fails to reduce the device-tree bytearray size. Fix this.

This stands in for a pending upstream change.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-07-09 09:11:00 -06:00
Simon Glass
3def0cf238 libfdt: Bring in proposed pylibfdt changes
This provides various patches sent to the devicetree-compiler mailing list
to enhance the Python bindings. A final version of this patch may be
created once upstreaming is complete, but if it takes too long, this can
act as a placeholder.

New pylibfdt features:
- Support for most remaining, relevant libfdt functions
- Support for sequential-write functions

Changes are applied to existing U-Boot tools as needed.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-07-09 09:11:00 -06:00
Simon Glass
5c890238c4 binman: Tidy up setting of entry contents
At present the contents of an entry are set in subclasses simply by
assigning to the data and content_size properties. Add some methods to do
this, so that we have more control. In particular, add a method to set the
contents without changing its size, so we can validate that case.

Add a test case for trying to change the size when this is not allowed.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-07-09 09:11:00 -06:00
Simon Glass
2cd01285b5 binman: Tidy up execution of tests
Move all the test execution into the same mechanism so that we can request
a particular test (from any suite) by passing it as an argument to
'binman -t'.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-07-09 09:11:00 -06:00
Simon Glass
736bb0aec8 binman: Correct operation of ObtainContents()
This method is supposed to return the contents of an entry. However at
present there is no check that it actually does. Also some implementations
do not return 'True' to indicate success, as required.

Add a check for things working as expected, and correct the
implementations.

This requires some additional test cases to cover things which were missed
originally. Add these at the same time.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-07-09 09:11:00 -06:00
Simon Glass
adc5701134 binman: Tidy up variables in _RunMicrocodeTest()
At present we call the three entries first, second and third. Rename them
to reflect their contents instead, for clarity.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-07-09 09:11:00 -06:00
Simon Glass
1835cd2264 binman: Make the operation of Entry__testing explicit
This fake entry is used for testing. At present it only has one behaviour
which is to return an invalid set of entry positions, to cause an error.

The fake entry will need to be used for other things too. Allow the test
.dts file to specify the behaviour of the fake entry, so we can control
its behaviour easily.

While we are here, drop the ReadContents() method, since this only applies
to subclasses of Entry_blob, which Entry__testing is not.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-07-09 09:11:00 -06:00
Tom Rini
16d836cd6f binman: Switch to 'python-coverage'
The most portable way to get access to coverage is to invoke it as
'python-coverage'.

Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
2018-07-09 09:11:00 -06:00
Simon Glass
31e60ffa05 dm: core: Add logging of some common errors
Add additional logging so that common errors when finding a device by
ofnode are easier to debug.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-07-09 09:11:00 -06:00
Simon Glass
964cadc445 dm: core: Add a function to decode a memory region
Add a way to decode a memory region, including the memory type (sram or
sdram) and its start address and size.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-07-09 09:11:00 -06:00
Simon Glass
5e0a7341cd dm: core: Update of_read_fmap_entry() for livetree
Update this function to take an ofnode so that it can work with livetree.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-07-09 09:11:00 -06:00
Simon Glass
008dcddf99 dm: spi: Update sandbox SPI emulation driver to use ofnode
Update the parameters sandbox_sf_bind_emul to support livetree.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-07-09 09:11:00 -06:00
Simon Glass
d677b00cb6 dm: core: Add a way to bind a device by ofnode
Add a new device_bind_ofnode() function which can bind a device given its
ofnode. This allows binding devices more easily with livetree nodes.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-07-09 09:11:00 -06:00
Simon Glass
b616cef97a log: Add a way to log a return value with a message
It is sometimes useful to show a message when logging an error return
value, perhaps to add a few details about the problem. Add a function to
support this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-07-09 09:11:00 -06:00
Simon Glass
c60f671b65 dm: core: Add a way to find an ofnode by compatible string
Add an ofnode_by_compatible() to allow iterating through ofnodes with a
given compatible string.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-07-09 09:11:00 -06:00
Simon Glass
c98ad4434c dm: core: Add comments to ofnode_read_resource() functoins
These functions are missing comments. Add some.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-07-09 09:11:00 -06:00
Simon Glass
fbe8d033fc dm: core: Fix a few ofnode function comments
Tidy up three return-value errors.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-07-09 09:11:00 -06:00
Simon Glass
7e5196c409 dm: core: Add ofnode function to read a 64-bit int
We have a 32-bit version of this function. Add a 64-bit version as well so
we can easily read 64-bit ints from the device tree.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-07-09 09:11:00 -06:00
Michael Pratt
90c08fa038 fdt: Add device tree memory bindings
Support a default memory bank, specified in reg, as well as
board-specific memory banks in subtree board-id nodes.

This allows memory information to be provided in the device tree,
rather than hard-coded in, which will make it simpler to handle
similar devices with different memory banks, as the board-id values
or masks can be used to match devices.

Signed-off-by: Michael Pratt <mpratt@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
2018-07-09 09:11:00 -06:00
Tom Rini
8c5d4fd0ec Prepare v2018.07
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-07-09 10:24:14 -04:00
Tom Rini
3f0492f207 Merge branch 'master' of git://git.denx.de/u-boot-video 2018-07-08 18:56:07 -04:00
Tom Rini
34d02ba4b9 Merge branch 'master' of git://git.denx.de/u-boot-tegra 2018-07-06 17:12:06 -04:00
Peter Robinson
84996795c2 tegra: nyan-big: Update CONFIG_SYS_TEXT to the default in README.chromium
To build U-Boot on a Nyan Big Chromebook the docs outline adjusting the Tegra124
defined CONFIG_SYS_TEXT_BASE but this has since been moved to individual config
files. We should have the default required for U-Boot chain loading on the
chromebook as the default CONFIG_SYS_TEXT_BASE and update the docs to remove
this now non required step.

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2018-07-06 09:12:39 -07:00
Tom Rini
ca962d32df Merge branch 'master' of git://git.denx.de/u-boot-usb 2018-07-06 08:55:09 -04:00
Andre Przywara
0bc846a769 sunxi: A64: OHCI: prevent turning off shared USB clock
On the A64 the clock for the first USB controller is actually the parent
of the clock for the second controller, so turning them off in that order
makes the system hang.
Fix this by only turning off *both* clocks when the *last* OHCI controller
is brought down. This covers the case when only one controller is used.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2018-07-05 11:25:50 +02:00
Emmanuel Vadot
ff5d5cc233 usb: dwc2: Add brcm,bcm2708-usb compatible
When using CONFIG_OF_BOARD on rpi to use the dtb provided by the
RaspberryPi Fundation, the compatible string isn't the same, resulting
in not-functional usb from u-boot.

Signed-off-by: Oleksandr Tymoshenko <gonzo@FreeBSD.org>
Signed-off-by: Emmanuel Vadot <manu@freebsd.org>
2018-07-05 11:25:49 +02:00
Tom Rini
4ac5df4b41 Merge branch 'master' of git://git.denx.de/u-boot-sunxi 2018-07-03 23:09:34 -04:00
Andre Przywara
be0d217952 arm: timer: sunxi: add Allwinner timer erratum workaround
The Allwinner A64 SoCs suffers from an arch timer implementation erratum,
where sometimes the lower 11 bits of the counter value erroneously
become all 0's or all 1's [1]. This leads to sudden jumps, both forwards and
backwards, with the latter one often showing weird behaviour.
Port the workaround proposed for Linux to U-Boot and activate it for all
A64 boards.
This fixes crashes when accessing MMC devices (SD cards), caused by a
recent change to actually use the counter value for timeout checks.

Fixes: 5ff8e54888 ("sunxi: improve throughput
in the sunxi_mmc driver")

[1] http://lists.infradead.org/pipermail/linux-arm-kernel/2018-May/576886.html

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Andreas Färber <afaerber@suse.de>
Tested-by: Guillaume Gardet <guillaume.gardet@free.fr>
2018-07-03 22:00:00 +05:30
Andre Przywara
38651588d3 arm: timer: factor out FSL arch timer erratum workaround
At the moment we have the workaround for the Freescale arch timer
erratum A-008585 merged into the generic timer_read_counter() routine.
Split those two up, so that we can add other errata workaround more
easily. Also add an explaining comment on the way.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Andreas Färber <afaerber@suse.de>
Tested-by: Guillaume Gardet <guillaume.gardet@free.fr>
2018-07-03 21:59:46 +05:30
Tom Rini
89c5c97619 Prepare v2018.07-rc3
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-07-02 23:23:15 -04:00
Tom Rini
d4c7a9348f Merge branch 'master' of git://git.denx.de/u-boot-net 2018-07-02 16:11:09 -04:00
Tom Rini
03b54997d5 board/aries: Remove
The various Aries Embedded boards have been orphaned for a year and no
one has come forward to take care of them.  Remove.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-07-02 15:52:50 -04:00
Alexander Graf
a9ea30d267 ax25: Switch to CONFIG_BOOTP_PREFER_SERVERIP
The ax25-ae350 target currently uses CONFIG_BOOTP_SERVERIP which means we
ignore the DHCP provided TFTP ip address. This breaks every case where we
do now provide a serverip environment variable.

Instead, let's use the new CONFIG_BOOT_PREFER_SERVERIP option to fall back
to the DHCP provided TFTP IP if no serverip environment variable is set.

Signed-off-by: Alexander Graf <agraf@suse.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Acked-by: Rick Chen <rick@andestech.com>
2018-07-02 14:14:21 -05:00
Alexander Graf
bdce340cc6 net: Add option to prefer bootp/dhcp serverip
Currently we can choose between 2 different types of behavior for the
serverip variable:

  1) Always overwrite it with the DHCP server IP address (default)
  2) Ignore what the DHCP server says (CONFIG_BOOTP_SERVERIP)

This patch adds a 3rd option:

  3) Use serverip from DHCP if no serverip is given
     (CONFIG_BOOTP_PREFER_SERVERIP)

With this new option, we can have the default case that a boot file gets
loaded from the DHCP provided TFTP server work while allowing users to
specify their own serverip variable to explicitly use a different tftp
server.

Signed-off-by: Alexander Graf <agraf@suse.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-07-02 14:14:21 -05:00
Alexander Graf
449312c1c0 net: Prefer command line arguments
We can call commands like dhcp and bootp without arguments or with
explicit command line arguments that really should tell the code where
to look for files instead.

Unfortunately, the current code simply overwrites command line arguments
in the dhcp case with dhcp values.

This patch allows the code to preserve the command line values if they
were set on the command line. That way the semantics are slightly more
intuitive.

The reason this patch does that by introducing a new variable is that we
can not rely on net_boot_file_name[0] being unset, as today it's
completely legal to call "dhcp" and afterwards run "tftp" and expect the
latter to repeat the same query as before. I would prefer not to break
that behavior in case anyone relies on it.

Signed-off-by: Alexander Graf <agraf@suse.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-07-02 14:14:20 -05:00
Lothar Felten
d8970dae27 net: Add new wol command - Wake on LAN
Add a new command 'wol': Wait for an incoming Wake-on-LAN packet or
time out if no WoL packed is received.
If the WoL packet contains a password, it is saved in the environment
variable 'wolpassword' using the etherwake format (dot or colon
separated decimals).

Intended use case: a networked device should boot an alternate image.
It's attached to a network on a client site, modifying the DHCP server
configuration or setup of a tftp server is not allowed.
After power on the device waits a few seconds for a WoL packet. If a
packet is received, the device boots the alternate image. Otherwise
it boots the default image.

This method is a simple way to interact with a system via network even
if only the MAC address is known. Tools to send WoL packets are
available on all common platforms.

Some Ethernet drivers seem to pad the incoming packet. The additional
padding bytes might be recognized as Wake-on-LAN password bytes.

By default enabled in pengwyn_defconfig.

Signed-off-by: Lothar Felten <lothar.felten@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-07-02 14:14:20 -05:00
Rabeeh Khoury
318b5d76b6 net: mvneta: zero Tx descriptors on init
Make the initialization sequence consistent with the Linux kernel
driver.

Reviewed-by: Stefan Roese <sr@denx.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Rabeeh Khoury <rabeeh@solid-run.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
2018-07-02 14:14:20 -05:00
Rabeeh Khoury
0f8888b763 net: mvneta: dcache flush TX descriptors at init
This fixes sporadic timeout on initial packet Tx (usually ARP), with an
error message like:

  timeout: packet not sent

Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Chris Packham <judge.packham@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Rabeeh Khoury <rabeeh@solid-run.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
2018-07-02 14:14:20 -05:00
Alex Kiernan
6dc73df73b net: fastboot: Fix build when FASTBOOT_FLASH is disabled
When building without FASTBOOT_FLASH we don't include the intermediate
update callback to keep the client alive, so ensure we don't try setting
it here.

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-07-02 14:14:20 -05:00
Michal Simek
d1b226b7d4 net: zynq_gem: Initialize val variable in zynq_gem_miiphy_read()
phyread can timeout and val will contain random value. Initialize it to
zero not to report random value in case of error.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-07-02 14:14:19 -05:00
Tom Rini
6c88079e24 Merge branch 'master' of git://git.denx.de/u-boot-spi 2018-07-02 14:40:03 -04:00
Emmanuel Vadot
425daac481 video: arm: rpi: Add brcm,bcm2708-fb compatible
When using CONFIG_OF_BOARD on rpi to use the dtb provided by the
RaspberryPi Fundation, the compatible string isn't the same, resulting
in not-functional video in u-boot.

Signed-off-by: Oleksandr Tymoshenko <gonzo@FreeBSD.org>
Signed-off-by: Emmanuel Vadot <manu@freebsd.org>
2018-07-02 15:23:50 +02:00
Tom Rini
ac378bb05f Merge git://git.denx.de/u-boot-x86 2018-07-01 22:13:34 -04:00
Tom Rini
168de20f3b Revert "fw_printenv: Don't bail out directly after one env read error"
As pointed out by Wolfgang Denk, the problem with this fix is that while
interactive users will see that we have found one part of the
environment failed and are using the other, progmatic use will not see
this and can lead to problems.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-07-01 22:10:33 -04:00
Bin Meng
40144260a9 doc: vxworks: Mention chain-loading an x86 kernel via 'bootefi'
This updates the doc to mention chain-loading an x86 kernel via
'bootefi' command, along with several typos fix.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alexander Graf <agraf@suse.de>
2018-07-02 09:23:28 +08:00
Bin Meng
73149164f4 x86: doc: Update EFI loader support
CONFIG_EFI_LOADER is fully supported on x86 now.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alexander Graf <agraf@suse.de>
2018-07-02 09:23:28 +08:00
Bin Meng
47cae019ef efi_loader: helloworld: Output ACPI configuration table
Output ACPI configuration table if it exists.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-07-02 09:23:28 +08:00
Bin Meng
86df34d42b efi_loader: Install ACPI configuration tables
ACPI tables can be passed via EFI configuration table to an EFI
application. This is only supported on x86 so far.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-07-02 09:23:28 +08:00
Bin Meng
bb68c7fba0 efi_loader: Increase number of configuration tables to 16
At present the number of configuration tables is set to 2. By
looking at which tables the Linux EFI stub or iPXE can process,
it looks 16 is a reasonable number.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-07-02 09:23:28 +08:00
Bin Meng
abe47ca728 x86: efi_loader: Build EFI memory map per E820 table
On x86 traditional E820 table is used to pass the memory information
to kernel. With EFI loader we can build the EFI memory map from it.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-07-02 09:23:28 +08:00
Ivan Gorinov
8199a145c4 x86: Use microcode update from device tree for all processors
Built without a ROM image with FSP (u-boot.rom), the U-Boot loader applies
the microcode update data block encoded in Device Tree to the bootstrap
processor but not passed to the other CPUs when multiprocessing is enabled.

If the bootstrap processor successfully performs a microcode update
from Device Tree, use the same data block for the other processors.

Signed-off-by: Ivan Gorinov <ivan.gorinov@intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: fixed build errors on edison and qemu-x86]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2018-07-02 09:23:28 +08:00
Bin Meng
fc48ebe6df x86: Add scsi command to coreboot and qemu
This adds the scsi command to coreboot and qemu, to be in consistent
with other x86 targets.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-07-02 09:23:28 +08:00
Bin Meng
94e72a6bd9 x86: timer: tsc: Allow specifying clock rate from device tree again
With the introduction of early timer support in the TSC driver,
the capability of getting clock rate from device tree was lost
unfortunately. Now we bring such functionality back, but with a
limitation that when TSC is used as early timer, specifying clock
rate from device tree does not work.

This fixes random boot failures seen on QEMU targets: printing "TSC
frequency is ZERO" and reset forever.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-07-02 09:23:28 +08:00
Tom Rini
3fcb00be25 Merge branch 'master' of git://git.denx.de/u-boot-usb 2018-06-30 08:52:06 -04:00
Fabio Estevam
ee322f3c79 mx5: Select ARM_CORTEX_A8_CVE_2017_5715
On a 4.18-rc1 kernel the following warning is seen on i.MX51 and
i.MX53:

CPU0: Spectre v2: firmware did not set auxiliary control register IBE bit, system vulnerable

Select the ARM_CORTEX_A8_CVE_2017_5715 workaround for i.MX51/i.MX53
to fix the problem.

With this patch applied the kernel reports:

CPU0: Spectre v2: using BPIALL workaround

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-06-30 08:49:55 -04:00
Heinrich Schuchardt
2121bbe49c lib: div64: fix typeo in include/div64.h
%s/reminder/remainder/

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-06-29 11:30:39 -04:00
Nishanth Menon
94c6a89a99 ARM: mach-omap2: omap3/am335x: Enable ACR::IBE on Cortex-A8 SoCs for CVE-2017-5715
Enable CVE-2017-5715 option to set the IBE bit. This enables kernel
workarounds necessary for the said CVE.

With this enabled, Linux reports:
CPU0: Spectre v2: using BPIALL workaround

This workaround may need to be re-applied in OS environment around low
power transition resume states where context of ACR would be lost (off-mode
etc).

Signed-off-by: Nishanth Menon <nm@ti.com>
2018-06-29 11:30:39 -04:00
Nishanth Menon
dbb7caf110 ARM: mach-omap2: omap5/dra7: Enable ACTLR[0] (Enable invalidates of BTB) to facilitate CVE_2017-5715 WA in OS
Enable CVE_2017_5715 and since we have our own v7_arch_cp15_set_acr
function to setup the bits, we are able to override the settings.

Without this enabled, Linux kernel reports:
CPU0: Spectre v2: firmware did not set auxiliary control register IBE bit, system vulnerable

With this enabled, Linux kernel reports:
CPU0: Spectre v2: using ICIALLU workaround

NOTE: This by itself does not enable the workaround for CPU1 (on
OMAP5 and DRA72/AM572 SoCs) and may require additional kernel patches.

Signed-off-by: Nishanth Menon <nm@ti.com>
2018-06-29 11:30:39 -04:00
Nishanth Menon
c2ca3fdfb9 ARM: Introduce ability to enable invalidate of BTB with ICIALLU on Cortex-A15 for CVE-2017-5715
As recommended by Arm in [1], ACTLR[0] (Enable invalidates of BTB)
needs to be set[2] for BTB to be invalidated on ICIALLU. This needs to
be done unconditionally for Cortex-A15 processors. Provide a config
option for platforms to enable this option based on impact analysis
for products.

NOTE: This patch in itself is NOT the final solution, this requires:
a) Implementation of v7_arch_cp15_set_acr on SoCs which may not
   provide direct access to ACR register.
b) Operating Systems such as Linux to provide adequate workaround in the
   right locations.
c) This workaround applies to only the boot processor. It is important
   to apply workaround as necessary (context-save-restore) around low
   power context loss OR additional processors as necessary in either
   firmware support OR elsewhere in OS.

[1] https://developer.arm.com/support/security-update
[2] http://infocenter.arm.com/help/topic/com.arm.doc.ddi0438c/BABGHIBG.html

Cc: Marc Zyngier <marc.zyngier@arm.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Robin Murphy <robin.murphy@arm.com>
Cc: Florian Fainelli <f.fainelli@gmail.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Christoffer Dall <christoffer.dall@linaro.org>
Cc: Andre Przywara <Andre.Przywara@arm.com>
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: Tom Rini <trini@konsulko.com>
Cc: Michael Nazzareno Trimarchi <michael@amarulasolutions.com>

Signed-off-by: Nishanth Menon <nm@ti.com>
Tested-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-06-29 11:30:39 -04:00
Nishanth Menon
7b37a9c732 ARM: Introduce ability to enable ACR::IBE on Cortex-A8 for CVE-2017-5715
As recommended by Arm in [1], IBE[2] has to be enabled unconditionally
for BPIALL to be functional on Cortex-A8 processors. Provide a config
option for platforms to enable this option based on impact analysis
for products.

NOTE: This patch in itself is NOT the final solution, this requires:
a) Implementation of v7_arch_cp15_set_acr on SoCs which may not
   provide direct access to ACR register.
b) Operating Systems such as Linux to provide adequate workaround in the right
   locations.
c) This workaround applies to only the boot processor. It is important
   to apply workaround as necessary (context-save-restore) around low
   power context loss OR additional processors as necessary in either
   firmware support OR elsewhere in OS.

[1] https://developer.arm.com/support/security-update
[2] http://infocenter.arm.com/help/topic/com.arm.doc.ddi0344k/Bgbffjhh.html

Cc: Marc Zyngier <marc.zyngier@arm.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Robin Murphy <robin.murphy@arm.com>
Cc: Florian Fainelli <f.fainelli@gmail.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Christoffer Dall <christoffer.dall@linaro.org>
Cc: Andre Przywara <Andre.Przywara@arm.com>
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: Tom Rini <trini@konsulko.com>
Cc: Michael Nazzareno Trimarchi <michael@amarulasolutions.com>

Signed-off-by: Nishanth Menon <nm@ti.com>
Tested-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-06-29 11:30:39 -04:00
Jagan Teki
9c22aec410 usb: sunxi: Use proper reg_mask for clock gate, reset
Masking clock gate, reset register bits based on the
probed controller is proper only due to the assumption
that masking should start with 0 even thought the controller
has separate PHY or shared between OTG.

unfortunately these are fixed due to lack of separate
clock, reset drivers.

Say for example EHCI1 - EHCI3 in the datasheet (EHCI0 is for the OTG)
so we need to start reg_mask 0 - 2.

This patch calculated the mask, based on the register base
so that we can get the proper bits to set with respect to
probed controller.

We even do this masking by using PHY index specifier from dt,
but dev_read_addr_size is failing for 64-bit boards.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-06-29 10:52:18 +02:00
Jagan Teki
9763df8b8a sunxi: Fix USB PHY index for H3
This patch update the USB PHY index for Allwinner H3.

Same change[1] initially sent, by 'Chen-Yu Tai' but missed
to apply due to recursive version changes on the same series.

[1] https://lists.denx.de/pipermail/u-boot/2018-January/318817.html

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-06-29 10:52:18 +02:00
Zeng Tao
11080bf6c7 usb: ohci: change the NUM_EDs from 8 to 32
For ohci, the maximam supported endpoint number is 32(in and out), and
now we have used (usb_pipeendpoint(pipe) << 1) to index the specified
endpoint descritor, usb_pipeendpoint(pipe) can reach 0xf, so we need
change the NUM_EDs from 8 to 32.

Signed-off-by: Zeng Tao <prime.zeng@hisilicon.com>
2018-06-29 10:52:12 +02:00
Vasily Khoruzhick
ebbc23a049 usb: sunxi: ohci: make ohci_t the first member in private data
ohci-hcd casts priv_data pointer to (ohci_t *), thus it must be
the first member in private data struct.

Fixes 831cc98b1 ("usb: sunxi: Simplify ccm reg base code")

Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
2018-06-29 10:52:07 +02:00
Marek Vasut
069b746ad9 sf: Enable FSR polling on N25Q256(A)
The N25Q256(A) datasheet clearly states that this device does have
a Flag Status Register and does update FSR PEC bit 7 during Program
and Erase cycles to indicate the cycle is in progress. Enable the
FSR PEC bit polling on this device to prevent data corruption.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Jagan Teki <jagan@openedev.com>
Cc: Tom Rini <trini@konsulko.com>
2018-06-28 19:58:40 +05:30
Hannes Schmelzer
c0eaffa039 spi: omap3: fix claim/release bus within DM
The claim/release bus function must not reset the whole SPI core because
settings regarding wordlen, clock-frequency and so on made by
set_wordlen, set_mode, set_speed get lost with this action. Resulting in
a non-functional SPI.

Without DM the failure didn't came up since after the spi_reset within
claim bus all the setup (wordlen, mode, ...) was called, in DM they are
called by the spi uclass.

We change now the things as following for having a working SPI instance
in DM:

- move the spi_reset(...) to the probe call in DM for having a known
hardware state after probe. Without DM we don't have a probe call, so we
issue the reset as before during the claim_bus call.

- in release bus we just reset the modulctrl to the reset-value (spi-
slave)

Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-06-28 19:54:10 +05:30
Tom Rini
fb77a9e353 Merge branch 'master' of git://git.denx.de/u-boot-spi 2018-06-28 09:04:41 -04:00
Andrew Thomas
af15946aa0 dwc2 USB controller hangs with lan78xx
This bug is the combination of dwc2 USB controller and lan78xx
USB ethernet controller, which is the combination in use on
the Raspberry Pi Model 3 B+.

When the host attempts to receive a packet, but a packet has not
arrived, the lan78xx controller responds by setting BIR
(Bulk-In Empty Response) to NAK. Unfortunately, this hangs
the USB controller and requires the USB controller to
be reset.

The fix proposed is to have the lan78xx controller respond
by setting BIR to ZLP.

Signed-off-by: Andrew Thomas <andrew.thomas@oracle.com>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Alexander Graf <agraf@suse.de>
2018-06-27 22:21:25 -04:00
Tom Rini
de76610545 Merge git://git.denx.de/u-boot-imx 2018-06-27 13:09:55 -04:00
Joe Hershberger
3925b2ac97 fw_printenv: Don't bail out directly after one env read error
When using a redundant environment a read error should simply mean to
not use that copy instead of giving up completely. The other copy may
be just fine.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Ioan-Adrian Ratiu <adrian.ratiu@ni.com>
2018-06-27 13:09:16 -04:00
Stefano Babic
b4cb809289 imx: bx50v3: fix Maintainers
This fixes the warnings:

WARNING: no status info for 'ge_bx50v3'
WARNING: no maintainers for 'ge_bx50v3

Signed-off-by: Stefano Babic <sbabic@denx.de>
2018-06-27 13:02:36 +02:00
Jörg Krause
4368f85359 mtd: nand: mxs_nand_spl: add mxs_flash_full_ident
For now, the existing SPL MXS NAND driver only supports to identify
ONFi-compliant NAND chips. In order to allow identifying
non-ONFi-compliant chips add `mxs_flash_full_ident()` which uses the
`nand_get_flash_type()` functionality from `nand_base.c` to lookup
for supported NAND chips in the chip ID list.

For compatibility reason the full identification support is only
available if the config option `CONFIG_SPL_NAND_IDENT` is enabled.

The lookup was tested on a custom i.MX6ULL board with a Toshiba
TC58NVG1S3HTAI0 NAND chip.

Signed-off-by: Jörg Krause <joerg.krause@embedded.rocks>
2018-06-27 12:20:55 +02:00
Jörg Krause
f3f2af3bdf mtd: nand: mxs_nand_spl: refactor mxs_flash_ident
The existing `mxs_flash_ident()` is limited to identify ONFi compliant
NAND chips only. In order to support non-ONFi NAND chips refactor the
function and rename it to `mxs_flash_onfi_ident()`.

A follow-up patch will add `mxs_flash_full_ident()` which allows to use
the chip ID list to lookup for supported NAND flashs.

Signed-off-by: Jörg Krause <joerg.krause@embedded.rocks>
2018-06-27 12:20:55 +02:00
Jörg Krause
15e207faa0 spl, nand: add option CONFIG_SPL_NAND_IDENT to lookup for supported NAND chips
Add the config option `CONFIG_SPL_NAND_IDENT` for using the NAND chip ID list
to identify the NAND flash in SPL.

Signed-off-by: Jörg Krause <joerg.krause@embedded.rocks>
2018-06-27 12:20:55 +02:00
Jörg Krause
da37d09682 mtd: nand: export nand_get_flash_type function
`nand_get_flash_type()` allows identification of supported NAND flashs.
The function is useful in SPL (like mxs_nand_spl.c) to lookup for a NAND
flash (which does not support ONFi) instead of using nand_simple.c and
hard-coding all required NAND parameters.

Signed-off-by: Jörg Krause <joerg.krause@embedded.rocks>
2018-06-27 12:20:55 +02:00
Fabio Estevam
02bbe2aaa2 cl-som-imx7: Remove CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
Since commit 1da1938d57 ("spl: Add default values for ARCH_MX7")
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is selected by default on
i.MX7 platforms, so remove it from the board defconfig.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-06-27 09:54:11 +02:00
Jagan Teki
18053a8505 imx6ul: geam: Fix fdt_file mismatch
fdt_file is looking for imx6ul-geam-kit.dtb but Linux
has imx6ul-geam.dtb, since Linux skipped -kit on file name
by below commit.
"ARM: dts: imx6ul-geam: Skip suffix -kit from dts name"
(sha1: 182de5ebce71e469cfa686fcdf08c9cbe11ece97)

So, due to this mismatch U-Boot failed to pick the
proper dtb which eventually break the Linux boot.

This patch fixed this mismatch by
- renaming dts files
- update config option to use new dtb file
- update fdt_file to new dtb file name

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-06-27 09:51:49 +02:00
Trent Piepho
7da7ff5491 power: pmic: Let PFUZE3000 see all 256 registers
The PFUZE3000 uses registers addresses up to 0xff.

The DM pfuze100 driver supports both pfuze100 and pfuze3000.  Allow it
to use the device type to return the correct number of registers.

Also rename the too generic PMIC_NUM_OF_REGS enumeration value for
pfuze3000 to match the other "PFUZE3000_" prefixed enumerations and the
pfuze100 enumeration value PFUZE100_NUM_OF_REGS.

Cc: Peng Fan <Peng.Fan@freescale.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Trent Piepho <tpiepho@impinj.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-06-27 09:47:46 +02:00
Stefan Agner
fd8c1fc943 arm: dts: imx7: colibri: add raw NAND support
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
2018-06-27 09:07:55 +02:00
Stefan Agner
aba6a0fb8f arm: dts: imx7: sync with Linux
Sync with Linux commit 60cc43fc8884 ("Linux 4.17-rc1").

Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
2018-06-27 09:07:55 +02:00
Stefan Agner
627544506f mtd: nand: mxs_nand: add support for specific ECC strength
Add support for specified ECC strength/size using device tree
properties nand-ecc-strength/nand-ecc-step-size.

This aligns behavior with the mainline driver, such that:
- If fsl,use-minimal-ecc is requested it will use data from
  data sheet/ONFI. If this is not available the driver will fail.
- If nand-ecc-strength/nand-ecc-step-size are specified those
  value will be used.
- By default maximum possible ECC strength is used

Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
2018-06-27 09:07:55 +02:00
Stefan Agner
f75e83bfae mtd: nand: mxs_nand: add device tree support
Support driver data from device tree. Also support fsl,use-minimal-ecc
similar to Linux' GPMI NAND driver.

Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
2018-06-27 09:07:55 +02:00
Stefan Agner
68748340c8 mtd: nand: mxs_nand: move structs into header file
Move structs into header file so we can use a separate compile
unit for device tree support.

Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
2018-06-27 09:07:55 +02:00
Stefan Agner
502bdc6b4f mtd: nand: mxs_nand: add use_minimum_ecc to struct
Add use_minimum_ecc as struct mxs_nand_info field in preparation
for device tree support.

Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
2018-06-27 09:07:55 +02:00
Stefan Agner
3b1328a0ad mtd: nand: mxs_nand: separate board/controller init
In preparation for device tree support separate board init
from controller init similar to other raw NAND drivers.

Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
2018-06-27 09:07:55 +02:00
Stefan Agner
0d4e9d8be2 mtd: nand: mxs_nand: use more precise function name
This function initializes DMA descriptors so mxs_nand_init_dma is
more precise. It also frees up the rather generic name mxs_nand_init.

Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
2018-06-27 09:07:55 +02:00
Stefan Agner
931747e517 mtd: nand: mxs_nand: move register structs to driver data
Move GPMI and BCH register structs to the driver struct mxs_nand_info
in prepartion for device tree support.

Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
2018-06-27 09:07:55 +02:00
Stefan Agner
984df7add1 mtd: nand: mxs_nand: add minimal ECC support
Add support for minimum ECC strength supported by the NAND chip.
This aligns with the behavior when using the fsl,use-minimum-ecc
device tree property in Linux.

Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
2018-06-27 09:07:55 +02:00
Stefan Agner
5c69dd0730 mtd: nand: mxs_nand: report correct ECC parameters
Report correct ECC parameters back to the stack. Do not report
bytes as we have it not immeaditly available and the Linux version
also does not report it. It seems to have no aversive effect.

Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
2018-06-27 09:07:55 +02:00
Stefan Agner
28897e8d21 mtd: nand: mxs_nand: use structure for BCH geometry
Calculate BCH geometry at start and store the information in
a structure. This avoids recalculation on every page access
and allows to calculate ECC relevant information in one place.
This patch does not change ECC layout or driver behavior in
any way.

The patch aligns the driver somewhat with the Linux GPMI NAND
driver which drives the same IP.

Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
2018-06-27 09:07:55 +02:00
Stefan Agner
dc0b69fa9f mtd: nand: mxs_nand: allow to enable BBT support
Add config option which allows to enable on flash bad block table
support. This has the same effect as when using the device tree
property "nand-on-flash-bbt" in Linux.

Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
2018-06-27 09:07:55 +02:00
Stefan Agner
5346c31e30 mtd: nand: mxs_nand: use self init
Instead of completing initialization via scan_bbt callback use
NAND self init to initialize the GPMI (MXS) NAND controller.

Suggested-by: Scott Wood <oss@buserror.net>
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
2018-06-27 09:07:55 +02:00
Stefan Agner
9345943b2b mtd: nand: mxs_nand: introduce SPL specific init
In preparation to convert the driver to use NAND self init
provide a new minimal init for SPL builds. As a side effect
this also reduces size of SPL by about 4KiB.

Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
2018-06-27 09:07:55 +02:00
Tom Rini
94905e1db8 Merge git://git.denx.de/u-boot-dm 2018-06-25 10:57:07 -04:00
Ashish Kumar
51dce7d2bf mtd: spi: Correct parameters for s25fs512s flash
Change sector size to 256KiB in table spi_flash_ids.

Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-06-25 15:50:33 +05:30
Hannes Schmelzer
9cddf70ead spi: omap3: fix set_speed and set_mode dm callbacks
commit 8480792287
("spi: omap3: Skip set_mode, set_speed from claim") did break SPI
support on my AM335x board.

The named commit:

- ignored the responsible arguments (speed, mode)
The set speed/mode function must use the supplied function arguments to
work properly. With this commit we take those arguments and transfer
them to the priv-data.

- used wrong udevice pointer for getting priv data
the udevice-pointer within function argument is already the spi-bus
device, so it is wrong looking here for some parent (ocp-bus in this
case) and getting priv-pointer from there.

Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-06-25 15:35:15 +05:30
Hannes Schmelzer
b1d2b529b4 spi: omap3: pre-initialize bus-speed with max. slave-speed
Otherwise the frequency is zero and the clock divider cannot be setup by
'omap3_spi_set_speed' function.

Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-06-25 15:35:01 +05:30
Michael Trimarchi
34ad749141 spi: mxc_spi: Fix chipselect on DM_SPI driver uclass
CS GPIO activation low/high is determinated by the device tree
so we don't need to take in accoung in cs_activate and cs_deactivate

Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-06-25 15:23:06 +05:30
Michael Trimarchi
618e8e20c2 spi: mxc: Fix compilation problem of DM_SPI class driver
drivers/spi/mxc_spi.c:507: undefined reference to `dev_get_addr'
linux-ld.bfd: BFD (GNU Binutils) 2.29.1 assertion fail elf32-arm.c:9509

Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-06-25 14:18:41 +05:30
Vipul Kumar
240cd7566e spi: zynq_qspi: Fixed incorrect return value error
This patch replaced "return 0" with "return status" to fix the
incorrect return value error reported by the coverity.

Reviewed-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Vipul Kumar <vipul.kumar@xilinx.com>
[jagan: rebased on master]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-06-25 14:13:57 +05:30
Tom Rini
90efca2539 Merge git://git.denx.de/u-boot-x86 2018-06-23 21:47:39 -04:00
Bin Meng
dd099ec44b cmd: efi: Fix wrong memory descriptor end address
Each entry of the EFI memory descriptors occupies map->desc_size,
not sizeof(struct efi_mem_desc).

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-24 08:56:33 +08:00
Bin Meng
598374729e x86: efi: payload: Count in conventional memory above 4GB in DRAM bank
At present in dram_init_banksize() it ignores conventional memory
above 4GB. This leads to wrong DRAM size is printed during boot.
Remove such limitation.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-24 08:56:25 +08:00
Bin Meng
1ffa447b8c x86: efi-x86_payload: Enable PRE_CONSOLE_BUFFER
Enable PRE_CONSOLE_BUFFER so that the full boot output can be viewed
on the video console for the EFI payload.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-24 08:56:04 +08:00
Bin Meng
7c98ca10ea efi: stub: Move the use_uart assignment immediately after exit_boot_services() call
The use_uart assignment should follow immediately after the call to
exit_boot_services(), in case we want some debug output after that.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-24 08:56:04 +08:00
Bin Meng
5460fd0762 x86: Change __kernel_size_t conditionals to use compiler provided defines
Since commit bb0bb91cf0 ("efi_stub: Use efi_uintn_t"), EFI x86
64-bit payload does not work anymore. The call to GetMemoryMap()
in efi_stub.c fails with return code EFI_INVALID_PARAMETER. Since
the payload itself is still 32-bit U-Boot, efi_uintn_t gets wrongly
interpreted as int, but it should actually be long in a 64-bit EFI
environment.

This changes the x86 __kernel_size_t conditionals to use compiler
provided defines instead. That way we always adhere to the build
environment we're in and the definitions adjust automatically.

Fixes: bb0bb91cf0 ("efi_stub: Use efi_uintn_t")
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-24 08:56:04 +08:00
Alexander Graf
0186644646 efi.h: Do not use config options
Currently efi.h determines a few bits of its environment according to
config options. This falls apart with the efi stub support which may
result in efi.h getting pulled into the stub as well as real U-Boot
code. In that case, one may be 32bit while the other one is 64bit.

This patch changes the conditionals to use compiler provided defines
instead. That way we always adhere to the build environment we're in
and the definitions adjust automatically.

Signed-off-by: Alexander Graf <agraf@suse.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: added some comments to describe the __x86_64__ check]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-24 08:56:04 +08:00
Bin Meng
1ab2c01087 x86: efi-x86_payload: Enable usb keyboard during boot
For boards that don't route serial port pins out, it's quite common
to attach a USB keyboard as the input device, along with a monitor.
However USB is not automatically started in the generic efi payload
codes. This uses a payload specific last_stage_init() to start the
USB bus, so that a USB keyboard can be used on the U-Boot shell.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-24 08:56:04 +08:00
Bin Meng
6d02cf0562 x86: efi-x86_payload: Enumerate PCI bus during early boot
The generic efi payload currently does not enumerate the PCI bus,
which means peripherals on the PCI bus are not discovered by their
drivers. This uses board_early_init_r() to do the PCI enumeration.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-24 08:56:04 +08:00
Bin Meng
ec15d5f6e5 board_r: Do not initialize IDE when DM BLK is on
With driver model philosophy, we should avoid explicitly calling
driver initialization routine during boot. This updates the ram
init sequence table to exclude the IDE initialization for DM BLK.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-24 08:56:04 +08:00
Bin Meng
d6fea4e283 x86: qemu: Change default vesa mode to 1024x768x32
The default vesa mode was changed since commit 55b4e1b7d9
("x86: Change default FRAMEBUFFER_VESA_MODE of some boards") for
better VxWorks compatibility but with the changes QEMU video console
no longer works. This is because QEMU's vgabios implements the VESA
mode 8:8:8 as 24bpp without an alpha channel, which U-Boot's video
console driver currently does not support yet.

We need change to real 32bpp in order to make it work again. QEMU
vgabios implements the custom 32bpp VESA mode starting from 0x140
(320x200x32) to 0x147 (1600x1200x32). Set it to 0x144 (1024x768x32).

Fixes: 55b4e1b7d9 ("x86: Change default FRAMEBUFFER_VESA_MODE of some boards")
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-24 08:56:04 +08:00
Ivan Gorinov
964927323f x86: Add 64-bit setjmp/longjmp implementation
Add setjmp/longjmp functions for x86_64.

Signed-off-by: Ivan Gorinov <ivan.gorinov@intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2018-06-24 08:56:04 +08:00
Heinrich Schuchardt
cbd29ef9f1 x86: qemu: do not build car.o with start64.o
car.o can only be used with start.o, not with start64.o.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2018-06-24 08:56:04 +08:00
Bin Meng
7ec2c21d87 x86: efi-x86_app: Update MAINTAINERS
Previous rename of efi-x86 target missed the MAINTAINERS update,
which caused the buildman warnings:

  WARNING: no status info for 'efi-x86_app'
  WARNING: no maintainers for 'efi-x86_app'

This updates the board MAINTAINERS to reflect the up-to-date info.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-24 08:56:04 +08:00
Simon Glass
a60aedfd31 patman: Support using a particular SMTP server
Some environments require providing the '--smtp-server' argument to
'git send-email'. Add support for this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-06-23 08:03:43 -06:00
Chris Packham
fe6ef1e9ba patman: add test for SPDX license
Add a test to exercise the check for a valid SPDX license.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-23 08:03:43 -06:00
Chris Packham
4fb3502972 patman: add option for limiting the Cc list
Many mailing-lists consider a long Cc list a sign of spam and will
either drop the message or mark it for moderation. Because patman
automatically invokes get_maintainer.pl the Cc list can expand
unexpectedly. Allow the user to specify a limit for the Cc list.

This limit is applied after removing any known bouncing addresses. By
default no limit is applied.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-23 08:03:43 -06:00
Tom Rini
77b5ba5d2b Merge branch 'master' of git://git.denx.de/u-boot-uniphier 2018-06-22 13:12:53 -04:00
Masahiro Yamada
9ef88391d0 ARM: dts: uniphier: enable SD card for PXs3 reference board
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-06-23 01:28:17 +09:00
Masahiro Yamada
e885c5a602 ARM: dts: uniphier: sync DT with Linux 4.18-rc1
Now that the clock-frequency information has been moved to the
driver, more DT sync is possible.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-06-23 01:28:16 +09:00
Masahiro Yamada
41bacb597e serial: uniphier: set clock rate without clock-frequency property
In Linux, the clock rate of the UART is given by the clock driver.

If you try to follow that in U-Boot, you would end up with adding
more u-boot,dm-pre-reloc properties, and also the clock driver would
be too big for SPL, which is used for UniPhier ARMv7 platform.

The current solution is to add 'clock-frequency' property to the
UART nodes, but it does not exist in the DT files in Linux.  I do
not want to let DT diverge for U-Boot.

Check the SoC compatible and set the clock rate according to it.
This will be helpful to sync DT between Linux and U-Boot.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-06-23 01:28:15 +09:00
Masahiro Yamada
157736a9ee serial: uniphier: rename struct uniphier_serial_private_data
Just for making it shorter.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-06-23 01:28:14 +09:00
Masahiro Yamada
25ed0fefa4 reset: uniphier: sync reset data with Linux 4.18-rc1
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-06-23 01:28:08 +09:00
Masahiro Yamada
b0e8bb4d01 ARM: uniphier: enable CONFIG_SNI_AVE and disable CONFIG_SMC911X
Enable the on-chip ethernet driver for uniphier_{v7,v8}_defconfig.
Disable the on-board SMC911x because it has not migrated to the
driver model yet - it is not possible to enable DM and non-DM
drivers at the same time.

The CONFIG_SMC911X for uniphier_ld4_sld8_defconfig is still kept
because the on-chip ethernet driver for LD4, sLD8 is not supported
yet.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-06-23 01:28:08 +09:00
Tom Rini
d4e5aff836 Merge tag 'signed-efi-2018.07' of git://github.com/agraf/u-boot
Patch queue for efi - 2018-06-21

A single urgent fix to make sure green and red are not swapped
in OSs that make use of EFI GOP frame buffers to display pictures
(such as efifb in Linux).
2018-06-22 08:14:49 -04:00
Alexander Graf
6fc2c704d4 efi_loader: Fix GOP 32bpp exposure
We store pixels as BGRA in memory, as can be seen from struct efi_gop_pixel.
So we need to expose the same format to UEFI payloads to actually have them
use the correct colors.

Reported-by: Fabian Vogt <fvogt@suse.com>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-06-21 17:18:18 +02:00
Tom Rini
dc7df68f21 Merge branch 'master' of git://git.denx.de/u-boot-sh 2018-06-21 09:02:35 -04:00
Tom Rini
8f08dfd133 Merge tag 'arc-updates-for-2018.07-rc3' of git://git.denx.de/u-boot-arc
Here we only add readme file for EMDK board
support of which was added in this release cycle.
2018-06-21 09:01:29 -04:00
Tom Rini
fa893990e9 Makefile: Ensure we build with -std=gnu11
As many targets are now commonly built with gcc-6 or later (which
defaults to a newer C standard than older compilers), certain C
constructs are now being used as they produce more readable code.  And
while all compilers that we support building with support the C11
standard (and GNU11) they do not default to that standard.  Ensure that
we pass along -std=gnu11 when building.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-06-21 08:58:50 -04:00
Alexey Brodkin
0921f9294b ARC: EMDK: Add readme
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-06-21 14:55:01 +03:00
Tom Rini
a5742efa20 Prepare v2018.07-rc2
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-06-19 19:39:44 -04:00
Tom Rini
4e899d868d test_avb: Add pymark.buildconfigspec information for the AVB tests
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-06-19 11:55:06 -04:00
Tom Rini
897a1d947e libavb: Update SPDX tag style
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-06-19 11:55:05 -04:00
Neil Armstrong
e3f7c4f851 configs: Update Meson GX configs
Enable USB on all Amlogic Meson GXL based board.
Enable Regulator support on all boards.
Enable ADC support on the LibreTech-CC board.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2018-06-19 07:31:47 -04:00
Beniamino Galvani
2e668af553 meson: use the clock driver
Use the clk framework to initialize clocks from drivers that need them
instead of having hardcoded frequencies and initializations from board
code.

Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2018-06-19 07:31:47 -04:00
Beniamino Galvani
c0fc1e215c clk: add Amlogic meson clock driver
Introduce a basic clock driver for Amlogic Meson SoCs which supports
enabling/disabling clock gates and getting their frequency.

Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2018-06-19 07:31:47 -04:00
Neil Armstrong
0ba089baab config: meson-gx-common: Enable USB boot
Add USB as boot target depending on the configuration.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2018-06-19 07:31:46 -04:00
Neil Armstrong
0421c9809a adc: meson-saradc: fix regmap_init_mem call
The SARADC driver was merged after the following commit :
commit d35812368a ("regmap: change regmap_init_mem() to take ofnode instead udevice")
Thus breaking build, this patch fixes the regmap_init_mem accordingly.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2018-06-19 07:31:46 -04:00
Ramon Fried
018e8637b8 configs: dragonboard410c: remove env partition offset
BOOT2 is not partitioned, no need for partition offset.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
2018-06-19 07:31:46 -04:00
Ramon Fried
b53777d28f configs: db410c: Set eMMC env partition to BOOT2
BOOT2 partition is empty and free for using to store the environment.
Use that instead of the default user partition.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
2018-06-19 07:31:46 -04:00
Michal Simek
20b016a336 common: Fix cpu nr type which is always unsigned type
cpu_cmd() is reading cpu number via simple_strtoul() which is always
unsigned type.
Platform code implementations are not expecting that nr can be negative
and there is not checking in the code for that too.

This patch is using u32 type for cpu number to make sure that platform
code get proper value range.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-06-19 07:31:45 -04:00
Marek Vasut
487b5fa6de bootm: Handle kernel_noload on arm64
The ARM64 has 2 MiB alignment requirement for the kernel. When using
fitImage, this requirement may by violated, the kernel will thus be
executed from unaligned address and fail to boot. Do what booti does
and run booti_setup() for kernel_noload images on arm64 to obtain a
suitable aligned address to which the image shall be relocated.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Bin Chen <bin.chen@linaro.org>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Tom Rini <trini@konsulko.com>
2018-06-19 07:31:45 -04:00
Marek Vasut
7f13b374fd ARM: image: Add option for ignoring ep bit 3
Add option to the booti_setup() which indicates to it that the caller
requires the image to be relocated to the beginning of the RAM and
that the information whether the image can be located anywhere in RAM
at 2 MiB aligned boundary or not is to be ignored. This is useful ie.
in case the Image is wrapped in another envelope, ie. fitImage and not
relocating it but moving it would corrupt the envelope.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Bin Chen <bin.chen@linaro.org>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Tom Rini <trini@konsulko.com>
Reviewed-By: Bin Chen <bin.chen@linaro.org>
2018-06-19 07:31:45 -04:00
Simon Glass
fe996ec066 sandbox: swap_case: Increase number of base address regs
At present the code overruns the bar[] array. Fix this.

At the same time, drop the leading / from the "/spl" path so that we can
run U-Boot SPL with:

   spl/u-boot-spl

rather than requiring:

   /path/to/spl/u-boot-spl

Reported-by: Coverity (CID: 131199)

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-06-19 07:31:44 -04:00
Simon Glass
fb95283931 spi: sandbox: Fix memory leak in sandbox_sf_bind_emul()
Move the strdup() call so that it is only done when we know we will bind
the device.

Reported-by: Coverity (CID: 131216)

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-06-19 07:31:44 -04:00
Simon Glass
8a682e03d7 rsa: Fix missing memory leak on error in fdt_add_bignum()
Thsi function can fail without freeing all its memory. Fix it.

Reported-by: Coverity (CID: 131217)
Signed-off-by: Simon Glass <sjg@chromium.org>
2018-06-19 07:31:44 -04:00
Simon Glass
dd0ee9ea85 fdtgrep: Separate out checking of two allocations
The current code might succeed on the first allocation and fail on the
second. Separate the checks to avoid this problem.

Of course, free() will never fail and the chances that (when allocating
two small areas) one will succeed and one will fail are just as remote.
But this keeps coverity happy.

Reported-by: Coverity (CID: 131226)

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-06-19 07:31:44 -04:00
Simon Glass
e178db1d77 fdtgrep: Fix logic of free() in do_fdtgrep()
This loop never actually exits, but the way the code is written this is
not obvious. Add an explicit error check.

Reported-by: Coverity (CID: 131280)
Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: Add explicit init of region to NULL per LLVM warning]
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-06-19 07:31:43 -04:00
Marek Vasut
2c84d5218e ARM: dts: rmobile: Add HS200 support to E3 Ebisu
Add regulator nodes and pinmux settings to the SDHI3 on E3 Ebisu
and enable HS200 mode on it.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-06-19 06:15:55 +02:00
Marek Vasut
ea273e8d72 ARM: dts: rmobile: Move the PHY reset GPIOs into PHY nodes
Both the RAVB and SH ether driver now support parsing the PHY reset
GPIOs from both the PHY nodes and the MAC nodes, move the reset GPIOs
back into the PHY nodes to minimize DT difference between U-Boot and
Linux.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-06-19 06:15:55 +02:00
Marek Vasut
159b329226 net: sh_eth: Support reset GPIO both in mac and phy node
The recent DTs have the PHY reset GPIO in the PHY node rather than
the ethernet MAC node, support extracting the PHY reset GPIO info
from both the PHY node and ethernet MAC node.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2018-06-19 06:15:55 +02:00
Marek Vasut
701db6e9c6 net: ravb: Support reset GPIO both in mac and phy node
The recent DTs have the PHY reset GPIO in the PHY node rather than
the ethernet MAC node, support extracting the PHY reset GPIO info
from both the PHY node and ethernet MAC node.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2018-06-19 06:15:55 +02:00
Marek Vasut
536fb5d47c net: ravb: Filter out supported PHY features
The RAVB only supports 100Full and 1000Full operation, it does not support
10Full or any Half-duplex modes. The PHY could still advertise those features
though, so filter out the PHY features accordingly.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2018-06-19 06:15:55 +02:00
Marek Vasut
c4a8d9ca04 net: ravb: Do not shut down clock in start callback
Do not stop the clock in the start callback in case of failure, keep
them running to also keep the PHY running. The failure could be ie.
PHY failing to negotiate link and if the clock get shut down, another
attempt at bringing the link up would fail. The clock right now are
started in probe function and stopped in remove function, which is
the correct behavior.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2018-06-19 06:15:55 +02:00
Marek Vasut
24417edfff ARM: dts: rmobile: Move the PHY reset GPIO back
The current state of RAVB driver expects the PHY reset GPIO in the
RAVB mode, move it back from the PHY node to avoid breakage.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-06-19 06:15:55 +02:00
Marek Vasut
27d290c46e ARM: rmobile: Adjust text base on V3M Eagle
The latest ATF puts the U-Boot at 0x50000000, just like on all the other
boards. Adjust the text base to reflect that change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-06-19 06:15:55 +02:00
Marek Vasut
5af6541972 pinctrl: renesas: Fix register usage in sh_pfc_{read,write}
The sh_pfc_{read,write}() must operate on the register address directly
rather than on an offset, fix this to prevent illegal access.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-06-19 06:15:55 +02:00
Simon Glass
af880e247d console: Fix handling of NULL global_data
Both putc() and puts() can be called before global_data is set up. Some of
the code paths don't handle this correctly. Add an explicit test before
any member is accessed.

Reported-by: Coverity (CID: 169030)
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-06-18 14:43:14 -04:00
Simon Glass
c2e4e7e631 log: Fix incorect range check in log_get_cat_name()
This allows access to an element after the end of the array. Fix it.

Reported-by: Coverity (CID: 173279)
Signed-off-by: Simon Glass <sjg@chromium.org>
2018-06-18 14:43:14 -04:00
Adam Ford
b4c3fb087b gpio: omap_gpio: Name GPIO's by bank and index with DM_GPIO
There are multiple GPIO banks with up to 32 pins / bank. When
using 'gpio status -a' to read the pins, this patch displays
both GPIO<bank>_<index> similar to how the device trees
display in addition to displaying  gpio_#

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-06-18 14:43:14 -04:00
Adam Ford
bd8a9c14c9 arm: mach-omap2/omap3/clock.c: Enable all GPIO with CMD_GPIO
When CMD_GPIO is enabled the command 'gpio status -a' can cause
a hang or reboot if GPIO banks are not enabled, because it scans
all banks.  This patch enables all GPIO banks so 'gpio status -a'
can fully execute.

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-06-18 14:43:13 -04:00
Adam Ford
6fef62cc47 block: Add SPL_BLOCK_CACHE and default n
When enabling BLOCK_CACHE on devices with limited RAM during SPL,
some devices may not boot.  This creates an option to enable
block caching in SPL by defaults off.  It is dependent on SPL_BLK

Fixes: 46960ad6d0 ("block: Have BLOCK_CACHE default to y in some cases")

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-06-18 14:43:13 -04:00
Andrew F. Davis
a1b73c1872 arm: Do not clear LR on exception in SPL
When an exception or interrupt occurs the link register (LR) may
contain the source of the exception, although we do not print the
value it may still be extracted with a debugger. When in SPL we
loop on getting and exception, but use a linking branch, which
over-writes the LR value, use a regular branch instruction here.

Signed-off-by: Andrew F. Davis <afd@ti.com>
2018-06-18 14:43:13 -04:00
Alex Kiernan
845936792b mmc: Remove hwpartition help text when command is disabled
When the `mmc hwpartition` command is disabled, remove the associated help
text.

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
2018-06-18 14:43:13 -04:00
Yevgeny Popovych
d146a7b9c6 fs: btrfs: Do not fail when all root_backups are empty
This is the case when reading freshly created filesystem.
The error message is like the following:
    btrfs_read_superblock: No valid root_backup found!

Since the data from super_roots/root_backups is not actually used -
decided to rework btrfs_newest_root_backup() into
btrfs_check_super_roots() that will only check if super_roots
array is valid and correctly handle empty scenario.

As a result:
* btrfs_read_superblock() now only checks if super_roots array is valid;
  the case when it is empty is considered OK.
* removed root_backup pointer from btrfs_info,
  which would be NULL in case of empty super_roots.
* btrfs_read_superblock() verifies number of devices from the superblock
  itself, not newest root_backup.

Signed-off-by: Yevgeny Popovych <yevgenyp@pointgrab.com>
Cc: Marek Behun <marek.behun@nic.cz>
Cc: Sergey Struzh <sergeys@pointgrab.com>
2018-06-18 14:43:12 -04:00
Masahiro Yamada
28b538b69d .gitignore: move *.dtb and *.dtb.S patterns to the top-level .gitignore
Follow Linux commit 10b62a2f785a (".gitignore: move *.dtb and *.dtb.S
patterns to the top-level .gitignore").

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-06-18 14:43:12 -04:00
Masahiro Yamada
3eb0fa4c93 .gitignore: sort normal pattern rules alphabetically
Follow Linux commit 1377dd3e2987 (".gitignore: sort normal pattern
rules alphabetically").

This would allow us to easily catch duplicated patterns if any.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-06-18 14:43:12 -04:00
Adam Ford
8e51c0f254 dm: gpio: Add DM compatibility to GPIO driver for Davinci
This adds DM_GPIO support for the davinici GPIO driver with
DT support.

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-06-18 14:43:12 -04:00
Ramon Fried
92a14a4772 MAINTAINERS: update ARM Snapdragon
Replace Mateusz as Maintainer for ARM Snapdragon arch.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Acked-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
2018-06-18 14:43:11 -04:00
Ramon Fried
95a773005c db410c: fix alignment of dts file
Alignment was wrong, missing one tab. fix it.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
2018-06-18 14:02:04 -04:00
Ramon Fried
e0212dfa13 iotrace: fix behaviour when buffer is full
Don't continue updating the offset when buffer is full.
When the buffer size exhausts and there's no space left to write
warn the user and update only the needed size and not both the
offset and needed size.

Add needed buffer size information in the iotrace command.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
2018-06-18 14:02:04 -04:00
Ramon Fried
501c89d330 cmd: iotrace: add dump trace command
Add dump trace command which dump all trace
buffer content in a much more readable fashion
than md.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-18 14:02:04 -04:00
Ramon Fried
7e9be3ea3a iotrace: move record definitons to header file
The header definitions are needed for reading
record information in cmd/iotrace.c

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-18 14:02:04 -04:00
Chris Packham
9508ecfbcb ARM: sunxi: remove empty #ifdef/endif block
Whatever code this was guarding has been removed so remove the guards
too.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
2018-06-18 14:02:03 -04:00
Chris Packham
1b65c86e87 m68k: Remove empty #ifdef/#ifndef block
Whatever code this was guarding has been removed so remove the guards
too.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
2018-06-18 14:02:03 -04:00
Chris Packham
af14d0dd24 configs: Remove empty #ifdef/#ifndef blocks
Remove empty #ifdef/#ifndef..#endif blocks where the configuration they
guarded has been completely removed.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
2018-06-18 14:02:03 -04:00
Igor Opaniuk
6d0043a623 doc: avb2.0: add README about AVB2.0 integration
Contains:
1. Overview of Android Verified Boot 2.0
2. Description of avb subset of commands
3. Examples of errors when boot/vendor/system/vbmeta partitions
are tampered
4. Examples of enabling AVB2.0 on your setup

Signed-off-by: Igor Opaniuk <igor.opaniuk@linaro.org>
2018-06-18 14:02:03 -04:00
Igor Opaniuk
f96c9482e6 test/py: avb2.0: add tests for avb commands
1. Run AVB 2.0 full verification chain, avb verify
2. Check if 'avb get_uuid' works, compare results with
'part list mmc 1' output
3. Test `avb read` commands, which reads N bytes from a partition
identified by a name

Signed-off-by: Igor Opaniuk <igor.opaniuk@linaro.org>
2018-06-18 14:02:02 -04:00
Igor Opaniuk
e883ffe00b am57xx_hs: avb2.0: add support of AVB 2.0
1. Add vbmeta partition info to android partition layout for TI
   platforms.
2. Add support of AVB 2.0 (including avb subset of commands) for am57xx HS

Signed-off-by: Igor Opaniuk <igor.opaniuk@linaro.org>
[trini: Move to include/environment/ti/boot.h, reword commit slightly]
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-06-18 14:01:21 -04:00
Igor Opaniuk
5d4fd87773 avb2.0: add boot states and dm-verity support
1. Add initial support of boot states mode (red, green, yellow)
2. Add functions for enforcing dm-verity configurations

Signed-off-by: Igor Opaniuk <igor.opaniuk@linaro.org>
2018-06-18 13:55:13 -04:00
Igor Opaniuk
60b2f9e7b9 cmd: avb2.0: avb command for performing verification
Enable a "avb" command to execute Android Verified
Boot 2.0 operations. It includes such subcommands:
  avb init - initialize avb2 subsystem
  avb read_rb - read rollback index
  avb write_rb - write rollback index
  avb is_unlocked - check device lock state
  avb get_uuid - read and print uuid of a partition
  avb read_part - read data from partition
  avb read_part_hex - read data from partition and output to stdout
  avb write_part - write data to partition
  avb verify - run full verification chain

Signed-off-by: Igor Opaniuk <igor.opaniuk@linaro.org>
2018-06-18 13:55:13 -04:00
Igor Opaniuk
3af30e4443 avb2.0: implement AVB ops
Implement AVB ops on top of existing mmc subsystem API. Currently there
is a full implementation of such operations, defined by [1]
AVB2.0 specification:

.read_from_partition() - reads N bytes from a partition identified by
a name.
.write_to_partition() - Writes N bytes to a partition identified by a name.
.validate_vbmeta_public_key() - checks if the given public ‘vbmeta’
partition is trusted.
.get_unique_guid_for_partition() - Gets the GUID for a partition identified
by a string name.

As [1] specification recommends to use tamper-evident storage for storing
rollback indexes and device state (LOCKED/UNLOCKED),
currently are only stubs instead of full implementation for these ops:
.read_rollback_index() - Gets the rollback index for a given index location
.write_rollback_index() - Sets the rollback index to a given location
.read_is_device_unlocked() - Gets where the device is unlocked

[1] https://android.googlesource.com/platform/external/avb/+/master/README.md

Signed-off-by: Igor Opaniuk <igor.opaniuk@linaro.org>
2018-06-18 13:55:13 -04:00
Igor Opaniuk
3330584d2c avb2.0: integrate avb 2.0 into the build system
Integrate libavb into the build system. Introduce CONFIG_LIBAVB
build option.

Signed-off-by: Igor Opaniuk <igor.opaniuk@linaro.org>
2018-06-18 13:55:13 -04:00
Igor Opaniuk
d8f9d2af96 avb2.0: add Android Verified Boot 2.0 library
Add libavb lib (3rd party library from AOSP), that implements support of
AVB 2.0. This library is used for integrity checking of Android partitions
on eMMC.

libavb was added as it is and minimal changes were introduced to reduce
maintenance cost, because it will be deviated from AOSP upstream in the future.

Changes:
- license headers changed to conform SPDX-style
- avb_crc32.c dropped
- updates in avb_sysdeps_posix.c/avb_sysdeps.h

For additional details check [1] AVB 2.0 README.

[1] https://android.googlesource.com/platform/external/avb/+/master/README.md

Signed-off-by: Igor Opaniuk <igor.opaniuk@linaro.org>
2018-06-18 13:55:13 -04:00
Tom Rini
378b29cbc6 Merge git://git.denx.de/u-boot-x86 2018-06-18 12:59:46 -04:00
Jon Nettleton
51f957adf7 mx6cuboxi: fix 4GB ddr memory detection
The soms with 4GB ddr have a rowaddr of 16 not 15, this allows
the detection mechanism to properly identify them as 4GB.
However these soms can be populated with whatever amount of
memory the customer requests therefor we need a ram stride test.
We can not use the get_ram_size() function because not all 4GB's
of DDR is addressable on a 32-bit architecture.  Therefore instead
we use a memory stride of 128MB's and look for the address that
the memory wraps.  This function is used for all som types to
catch most memory configurations.

This is a revised version of Rabeeh Khoury's original code.

Signed-off-by: Jon Nettleton <jon@solid-run.com>
Signed-off-by: Rabeeh Khoury <rabeeh@solid-run.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-06-18 16:50:55 +02:00
Jon Nettleton
73708200f0 mx6cuboxi: consolidate board detection and add som revision checking
In order to properly detect the board the checks need to be done
in a specific order.  Move these tests back into a single enum
function that will always return the proper the board it is checking.

This also adds the best test we have for detecting the rev 1.5 som,
and it simplifies the device-tree filename building.

Signed-off-by: Jon Nettleton <jon@solid-run.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-06-18 16:50:40 +02:00
Hannes Schmelzer
8fd05fccc8 drivers/gpio/mxc: fix MXC GPIO name in KConfig
The naming with "UART" is obviously wrong, we fix this here.

Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-06-18 16:50:07 +02:00
Jagan Teki
82e8ba056e board: engicam: spl: match icore-mipi fit-config
Match imx6q-icore-mipi and imx6dl-icore-mipi dtb in
board_fit_config_name_match.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-06-18 16:48:56 +02:00
Lukasz Majewski
76881bbf40 config: Update defconfig for imx53 K+P boards
This commit updates the defconfig for the HSC and DDC
boards.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2018-06-18 16:43:15 +02:00
Lukasz Majewski
61c16507d6 board: Remove not needed function for the K+P's imx53 board
The get_board_rev() is not needed anymore as a generic function
for the imx53 SoC has been used instead.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2018-06-18 16:42:04 +02:00
Lukasz Majewski
e8d2f286ae board: Silent out the console on the K+P's imx53 boards
Disable console output by default on imx53 based boards from
K+P.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2018-06-18 16:42:04 +02:00
Lukasz Majewski
0b35b2d117 board: Add support for KEY1 status detection on K+P's HSC|DDC boards
This code provides information if the K+P's imx53 boards had KEY1
pressed.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2018-06-18 16:42:04 +02:00
Lukasz Majewski
5ca614cae9 board: Adjust K+P script to run misc (per board) adjustments
This change gives the opportunity to adjust Linux command line for the
imx53 device with some legacy data.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2018-06-18 16:42:04 +02:00
Lukasz Majewski
642c1f519a board: imx53: Always disable display before starting kernel
This patch prevents from the situation where we may end up with garbage
displayed on the LCD panel.

Such situation occurs when one performs "reboot -f" in Linux and then
stop in U-boot (or observe the garbage on the screen during boot up).

To prevent from such situation - the PWM pin is configured as GPIO and set
to LOW.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2018-06-18 16:42:04 +02:00
Fabio Estevam
faab193ea2 pico-imx7d: Adjust the dtb name
Since kernel commit 41bbeadceb03 ("ARM: dts: imx7d-pico-pi: Separate
into cpu and baseboard dts") the dtb name has changed.

Fix it accordingly.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2018-06-18 16:40:16 +02:00
Fabio Estevam
1da1938d57 spl: Add default values for ARCH_MX7
ARCH_MX6 has default values for SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
and SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR.

Do the same for ARCH_MX7 so that users may have a consistent
experience through the i.MX families.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2018-06-18 16:40:00 +02:00
Otavio Salvador
97294a48c7 wandboard: Remove hardcoded baudrate from "console" variable
We should use the baudrate variable available inside U-Boot
environment to allow it to be changed dynamically.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2018-06-18 16:39:43 +02:00
Mans Rullgard
29b921b86c ARM: mxs: let boards override entire dram parameter table
If many values differ from the defaults, overriding the full table
is simpler and more space efficient than tweaking it through
mxs_adjust_memory_params().

Signed-off-by: Mans Rullgard <mans@mansr.com>
2018-06-18 16:24:57 +02:00
Ye Li
c5437e5b8a imx: Enable ACTLR.SMP bit for all i.MX cortex-a7 platforms
According to the Cortex-A7 TRM, for ACTLR.SMP bit "You must ensure this bit
is set to 1 before the caches and MMU are enabled, or any cache and TLB
maintenance operations are performed".
ROM sets this bit in normal boot flow, but when in serial download mode,
it is not set.
Here we add it in u-boot as a common flow for all i.MX cortex-a7 platforms,
including mx7d, mx6ul/ull and mx7ulp.

Signed-off-by: Ye Li <ye.li@nxp.com>
[fabio: adapted to U-Boot mainline codebase and make checkpatch happy]
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-06-18 16:21:25 +02:00
Lukasz Majewski
2c09dbf425 display5: Add missing environment.h include to avoid warning
Without this change the following warning shows up when building:

board/liebherr/display5/display5.c:270:3:
warning: implicit declaration of function ‘eth_env_set_enetaddr’ [-Wimplicit-function-declaration]

This commit fixes this issue.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2018-06-18 15:44:21 +02:00
Lukasz Majewski
0f05512d11 display5: config: Add GPT verification and restoration code on SWUpdate entry
If GPT gets broken, then after N boot attempts we will run the SWUpdate
restoration image.
On its enter we will check GPT and restore it if needed.

To test it:
display5 > mmc write 0x12000000 4 8

It will overwrite the primary GPT table.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2018-06-18 15:44:21 +02:00
Lukasz Majewski
bfb504bc7e display5: display5_defconfig: Enable support for gpt command (CMD_GPT) in production u-boot
After this change one can run 'gpt' command on production u-boot.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2018-06-18 15:44:21 +02:00
Lukasz Majewski
9fea1ca013 display5: config: Reduce rootfs2 (BACKUP) size from 1528M to 512M
Signed-off-by: Lukasz Majewski <lukma@denx.de>
2018-06-18 15:44:21 +02:00
Lukasz Majewski
5d9254098c display5: config: Add cma=256M to command line arguments
Signed-off-by: Lukasz Majewski <lukma@denx.de>
2018-06-18 15:44:21 +02:00
Lukasz Majewski
c451713abf display5: net: Add function to read ethaddr from iMX6 fuses
Signed-off-by: Lukasz Majewski <lukma@denx.de>
2018-06-18 15:44:21 +02:00
Lukasz Majewski
ea4584d73d display5: ddr: Enable support for DDR3 auto calibration
This code performs DDR3 memory calibration for display5 board.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2018-06-18 15:44:21 +02:00
Lukasz Majewski
b5f4543c92 display5: config: Update swupdate initramfs file name (now supporting ext4)
After moving to swupdate 2017.07, the default fs for swupdate rootfs
is ext4, not ext3.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2018-06-18 15:44:21 +02:00
Lukasz Majewski
18ccca59e3 display5: config: factory: Update BACKUP rootfs in factory mode
After splitting rootfs images to BACKUP and ACTIVE, the "factory"
u-boot also needs to update the former.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2018-06-18 15:44:21 +02:00
Lukasz Majewski
dd4ed88bf1 display5: config: Provide 'tftp_mmc_rootfs_bkp' command to write BACKUP rootfs
Signed-off-by: Lukasz Majewski <lukma@denx.de>
2018-06-18 15:44:21 +02:00
Lukasz Majewski
76d1d169f3 display5: wdt: Enable WDT support (both SPL and u-boot)
Test case:

The fitImage gets corrupted:

truncate -c -s 3M fitImage
run tftp_mmc_fitImg
setenv boot_os y
reset

[board shall hang in SPL with
"Trying to boot from MMC1" information]

Then after X seconds WDT is causing board to reset. After N boot attempts
we enter recovery mode.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2018-06-18 15:44:21 +02:00
Lukasz Majewski
27aede24bc display5: Support for the emergency PAD pressing
To enter the special mode, one needs to short cut two pads with e.g. screw
driver.

After power up the SPL will execute u-boot in which proper actions will be
taken.

It is worth noting that we do not alter envs (even the BOOT_FROM variable)
and unconditionally go to recovery.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2018-06-18 15:42:38 +02:00
Lukasz Majewski
cf74e0a96b display5: config: factory: Extend mtdparts to support LEG factory partition
This special partition has been added solely for production purpose.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2018-06-18 15:42:38 +02:00
Lukasz Majewski
1fa328f73a display5: config: Update SPI-NOR partition for larger swupdate-initramfs
The SPI-NOR partition information has been updated to store
swupdate-kernel-FIT just after envs as well as two times larger
swupdate-initramfs image.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2018-06-18 15:42:38 +02:00
Lukasz Majewski
b78e9c4f1e display5: config: Remove support for Linux initramfs recovery image boot
This is a prerequisite patch to combine SWUpdate and Linux recovery
initramfs images.

It removes the support for it.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2018-06-18 15:42:38 +02:00
Lukasz Majewski
1bcbf48f18 display5: config: Reset the board when bootm fails
Since display5 is now supporting boot counting, we can just reset the
board when bootm fails (i.e. it doesn't boot the fitImage kernel for
any reason).

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2018-06-18 15:42:38 +02:00
Lukasz Majewski
e087905a48 display5: spl: Check return code of the env_* functions
Force booting through u-boot proper when environment error encountered
(as a result of either broken SPI-NOR or erased envs).

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2018-06-18 15:42:38 +02:00
Lukasz Majewski
2f4372a101 display5: config: Provide command to flash the whole SPI-NOR memory
It may be necessary to update the content of the whole SPI-NOR memory at
once with using a single command (tftp_sf_img).

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2018-06-18 15:42:38 +02:00
Lukasz Majewski
86d759ea3c display5: config: Add "factory" (1MiB) SPI-NOR partition in u-boot
To test if this partition is present - one needs to write:
display5 > sf probe; mtdparts
display5 > sf erase factory +0x100000

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2018-06-18 15:42:38 +02:00
Lukasz Majewski
4864ba7f4a display5: config: factory: Setup IP config data according to LEG production setup
Signed-off-by: Lukasz Majewski <lukma@denx.de>
2018-06-18 15:42:38 +02:00
Lukasz Majewski
13e012f7b5 display5: factory: Add support for BOOT_FROM = FACTORY switch
When BOOT_FROM = FACTORY, then the LEG's factory setup is performed.

This code relies on boot_nfs u-boot command, so it shall be adjusted
appropriately (e.g. provide proper fitImage file).

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2018-06-18 15:42:38 +02:00
Bin Meng
0102023966 x86: efi: app: Display correct CPU info during boot
Currently when EFI application boots, it says:

  CPU: x86_64, vendor <invalid cpu vendor>, device 0h

Fix this by calling x86_cpu_init_f() in arch_cpu_init().

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-17 21:16:04 +08:00
Bin Meng
3ebd892fda x86: Rename efi-x86 target to efi-x86_app
To avoid confusion, let's rename the efi-x86 target to efi-x86_app.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-17 21:16:04 +08:00
Bin Meng
d441ec8298 x86: efi: payload: Add EFI framebuffer driver support
This turns on the EFI framebuffer driver support so that a graphics
console can be of additional help.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-17 21:16:04 +08:00
Bin Meng
4a08c74697 dm: video: Add an EFI framebuffer driver
This adds a DM video driver for U-Boot as the EFI payload. The driver
makes use of all necessary information from the passed EFI GOP info
to create a linear framebuffer device, as if it were initialized by
U-Boot itself.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
2018-06-17 21:16:04 +08:00
Bin Meng
d1fe992746 efi: stub: Pass EFI GOP information to U-Boot payload
If UEFI BIOS has the graphics output protocol (GOP), let's pass its
information to U-Boot payload so that U-Boot can utilize it (eg:
an EFI framebuffer driver).

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-17 21:16:04 +08:00
Bin Meng
252d41f1ae x86: baytrail: Drop EFI-specific test logics
Now that we have generic EFI payload support, drop EFI-specific test
logics in BayTrail Kconfig and codes, and all BayTrail boards too.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-17 21:16:04 +08:00
Bin Meng
93c7b879c7 x86: Drop QEMU-specific EFI payload support
Now that we have generic EFI payload support for all x86 boards,
drop the QEMU-specific one.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-17 21:16:04 +08:00
Bin Meng
32151d4017 x86: Add generic EFI payload support
It is possible to create a generic EFI payload for all x86 boards.
The payload is configured to include as many generic drivers as
possible. All stuff that touches low-level initialization are not
allowed as such is the EFI BIOS's responsibility. Platform specific
drivers (like gpio, spi, etc) are not included.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-17 21:16:04 +08:00
Bin Meng
3773c6a20a x86: efi: payload: Add arch_cpu_init()
This adds arch_cpu_init() to the payload codes, in preparation for
supporting a generic efi payload.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-17 21:16:04 +08:00
Bin Meng
4f1dacd43f x86: efi: Refactor the directory of EFI app and payload support
At present the EFI application and payload support codes in the x86
directory is distributed in a hybrid way. For example, the Kconfig
options for both app and payload are in arch/x86/lib/efi/Kconfig,
but the source codes in the same directory get built only for
CONFIG_EFI_STUB.

This refactors the codes by consolidating all the EFI support codes
into arch/x86/cpu/efi, just like other x86 targets.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-17 21:16:04 +08:00
Bin Meng
9efeb3f4db x86: doc: Fix reference to EFI doc in U-Boot
Since commit f3b5056c4e ("efi_loader: split README.efi into two
separate documents"), the original README.efi was renamed to
README.u-boot_on_efi, but x86 doc still refers to the old one.

This updates the x86 doc to reference both README.u-boot_on_efi and
README.uefi.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2018-06-17 21:16:04 +08:00
Ivan Gorinov
9f0b0113c9 x86: use EFI calling convention for efi_main on x86_64
UEFI specifies the calling convention used in Microsoft compilers;
first arguments of a function are passed in (%rcx, %rdx, %r8, %r9).

All other compilers use System V ABI by default, passing first integer
arguments of a function in (%rdi, %rsi, %rdx, %rcx, %r8, %r9).

These ABI also specify different sets of registers that must be preserved
across function calls (callee-saved).

GCC allows using the Microsoft calling convention by adding the ms_abi
attribute to a function declaration.

Current EFI implementation in U-Boot specifies EFIAPI for efi_main()
in the test apps but uses default calling convention in lib/efi.

Save efi_main() arguments in the startup code on x86_64;
use EFI calling convention for _relocate() on x86_64;
consistently use EFI calling convention for efi_main() everywhere.

Signed-off-by: Ivan Gorinov <ivan.gorinov@intel.com>
Reviewed-by: Alexander Graf <agraf@suse.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2018-06-17 21:16:04 +08:00
Bin Meng
e3ec0d03bb x86: cherryhill: Fix DTC warning
Fix warning when compiling cherryhill.dts with latest DTC:

  "Warning (avoid_unnecessary_addr_size): /pci/pch@1f,0: unnecessary
   #address-cells/#size-cells without "ranges" or child "reg" property"

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-17 21:16:04 +08:00
Tom Rini
103c45fb0d Merge branch 'master' of git://git.denx.de/u-boot-sh 2018-06-17 09:09:40 -04:00
Hauke Mehrtens
76d69eb01d sun50i: h5: Add initial Orange Pi Zero Plus support
Orange Pi Zero Plus is an open-source single-board computer
using the Allwinner H5 SOC.

H5 Orangepi Zero Plus has
 - Quad-core Cortex-A53
 - 512MB DDR3
 - micrSD slot
 - 16MBit SPI Nor flash
 - Debug TTL UART
 - 1GBit/s Ethernet (RTL8211E)
 - Wifi (RTL8189FTV)
 - USB 2.0 Host
 - USB 2.0 OTG + power supply

The device tree file is copied from the Linux kernel 4.17.

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-06-16 14:52:42 +05:30
Hauke Mehrtens
a6580dfd46 sun8i: h2: Add initial Orange Pi R1 support
Orange Pi R1 is an open-source single-board computer using the
Allwinner H2+ SOC.

H2+ Orange Pi R1 has
 - Quad-core Cortex-A7
 - 256MB DDR3
 - micrSD slot
 - 128MBit SPI Nor flash
 - Debug TTL UART
 - 100MBit/s Ethernet (H2+)
 - 100MBit/s Ethernet (RTL8152B)
 - Wifi (RTL8189ETV)
 - USB 2.0 OTG + power supply
This board is very similar to the Orange Pi Zero.

The device tree file is copied from the Linux kernel 4.17.

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-06-16 14:52:42 +05:30
Tom Rini
a715415bb5 Merge branch 'master' of git://git.denx.de/u-boot-usb 2018-06-16 00:07:37 -04:00
Marek Vasut
891bf67611 ARM: rmobile: Disable 4k SF sectors on V3M Eagle
The V3M Eagle uses flash with 128 kiB or 256 kiB sectors,
disable the 4k sector support.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-06-16 04:27:28 +02:00
Marek Vasut
75b573fe23 ARM: rmobile: Enable cache command on V3M Eagle
Turning the cache off can help when experimenting with bare metal
applications, enable the cache command on V3M Eagle to make that
easier.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-06-16 04:27:28 +02:00
Marek Vasut
c267952c41 ARM: rmobile: Fix CPGW address on V3M Eagle
Fix the CPGWPR/CPGWPCR register address on V3M Eagle to unlock
access to the CPG clock control registers.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-06-16 04:27:28 +02:00
Marek Vasut
6d82ed8d37 ARM: dts: rmobile: Add AVB PHY reset on V3M Eagle
Add EtherAVB PHY reset on V3M Eagle to let the AVB driver unreset the PHY.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-06-16 04:27:28 +02:00
Marek Vasut
29904b923e ARM: dts: rmobile: Add AVB pinmux on V3M Eagle
Add EtherAVB pinmux node on V3M Eagle to set the pinmux configuration.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-06-16 04:27:28 +02:00
Marek Vasut
bc19d28e6d ARM: dts: rmobile: Enable SDHI on E3 Ebisu
Enable SDHI on R8A77990 E3 Ebisu in DT.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-06-16 02:17:57 +02:00
Marek Vasut
ef6765ca62 ARM: dts: rmobile: Add initial SDHI nodes to R8A77990 E3
Add SDHI nodes to R8A77990 E3 SoC to allow SDHI operation.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-06-16 02:17:57 +02:00
Marek Vasut
65dcc809cd ARM: dts: rmobile: Add SCIF2 pinmux to E3 Ebisu
Add SCIF2 pinmux nodes to R8A77990 E3 Ebisu.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-06-16 02:17:57 +02:00
Marek Vasut
e183a6c7f2 ARM: dts: rmobile: Add Renesas RPC HF/QSPI DT node to R8A77990
Add device tree nodes for the Renesas RPC HF/QSPI controller
to R8A77990 E3.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-06-16 02:17:57 +02:00
Marek Vasut
c599de372f ARM: rmobile: Enable RPCHF on Draak
Enable the Renesas RPC HF driver on R8A77995 D3 Draak.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-06-16 02:17:57 +02:00
Marek Vasut
b08a704ddc ARM: rmobile: Fix environment placement on Draak
The environment on Draak is in the eMMC, card 0, place it so.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2018-06-16 02:17:57 +02:00
Tom Rini
f58e779513 Merge tag 'arc-updates-for-2018.07-rc2' of git://git.denx.de/u-boot-arc
Here we just add a tool for HSDK flashable images preparation
together with extensive documentation for HSDK board.

This will help real-life users to update U-Boot on the board.
2018-06-15 09:38:16 -04:00
Tom Rini
d94e89c765 Merge tag 'xilinx-for-v2018.07-rc2' of git://git.denx.de/u-boot-microblaze
Xilinx fixes for v2018.07-rc2

Zynq:
- Fix missing watchdog header
- DT fixes

ZynqMP:
- emmc configuration split
- Enable SPD
- Fix PMUFW_INIT_FILE logic
- Coverity fixes in SoC code

timer
- Add timer_get_boot_us

mmc:
- Fix MMC HS200 tuning command

serial:
- Fix scrabled chars with OF_LIVE
2018-06-15 09:38:06 -04:00
Alexey Brodkin
3b4410dde3 ARC: HSDK: Add readme
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-06-15 15:54:43 +03:00
Eugeniy Paltsev
9ddcfef6d4 ARC: HSDK: Add tool and make target to generate bsp
HSDK board has preloader that reads SPI flash pages and searches
for a special image header to fetch and load binary.

Add tool, make target (bsp-generate) to generate
update script and u-boot binary image with header for preloader.

Also add script to default environment to apply updates.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-06-15 15:54:43 +03:00
Michal Simek
b729ed0d95 serial: zynq: Make zynq_serial_setbrg static
This function is used only inside this driver that's why should be
static.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-15 08:54:05 +02:00
Michal Simek
a673025535 serial: zynq: Initialize uart only before relocation
This issue was found when OF_LIVE was enabled that there are scrambled
chars on the console like this:
Chip ID:	zu3eg
Watchdog: Started��j�   sdhci@ff160000: 0, sdhci@ff170000: 1
In:    serial@ff010000

I found a solution for this problem exactly the same as I found later in
serial_msm fixed by:
"serial: serial_msm: initialize uart only before relocation"
(sha1: 7e5ad796bc)

What it is happening is that output TX fifo still contains chars to be
sent and _uart_zynq_serial_init() resets TX fifo even in the middle of
transfer.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-15 08:54:05 +02:00
Michal Simek
e90d2659e4 serial: zynq: Write chars till output fifo is full
Change logic and put char to fifo till there is a space in output fifo.
Origin logic was that output fifo needs to be empty. It means only one
char was in output queue.
Also remove unused ZYNQ_UART_SR_TXEMPTY macro.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-15 08:54:05 +02:00
Michal Simek
c9a2c47b91 serial: zynq: Use BIT macros instead of shifts and full hex numbers
Coding style is checking to use BIT macros instead of shifts.
The patch is also fixing the rest of macros which should be BITs instead
of hex numbers.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-15 08:54:05 +02:00
Michal Simek
01fcf01e81 gpio: zynq_gpio: bank description should use unsigned type
Use u32 instead of int for max_bank, bank_min and bank_max. These values
can't be negative that's why no reason to use signed type.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-06-15 08:54:05 +02:00
Michal Simek
e3c26b8d95 arm64: zynqmp: Check return value in zynqmp_mmio_rawwrite()
There should be return value check from zynqmp_mmio_read() in
zynqmp_mmio_rawwrite() to make sure that errors are propagated properly.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-06-15 08:54:05 +02:00
Michal Simek
1e3e68f109 arm64: zynqmp: Check return value from calloc
calloc() can fail and return NULL. The patch is checking return value
and return in case of error.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-06-15 08:54:05 +02:00
Michal Simek
b6911780b5 mmc: zynq: Fix tuning_loop_counter type in arasan_sdhci_execute_tuning()
Code around tuning_loop_counter variable expects to go below zero.
That's why this variable can't use unsigned type.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-06-15 08:54:04 +02:00
Michal Simek
1471fadf69 gpio: zynq: Do not check unsigned type that is >= 0
There is no reason to check that unsigned type that is >= 0.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-06-15 08:54:04 +02:00
Siva Durga Prasad Paladugu
1a7414f626 mmc: sdhci: Fix MMC HS200 tuning command failures
This patch fixes the mmc tuning command failures
when tuning pattern data needs to read back for
comparision against the expected bit pattern.

Reported-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Tested-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-06-15 08:54:04 +02:00
Luca Ceresoli
c7df098a71 arm64: zynqmp: accept an absolute path for PMUFW_INIT_FILE
The value of PMUFW_INIT_FILE is prefixed with "$(srctree)/", thus
forcing it to be a relative path inside the U-Boot source tree. Since
the PMUFW is a binary file generated outside of U-Boot, the PMUFW
binary must be copied inside the U-Boot source tree before the
build.

This generates a few problems:

 * if the source tree is shared among different out-of-tree builds,
   they will pollute (and potentially corrupt) each other
 * the source tree cannot be read-only
 * any buildsystem must add a command to copy the PMUFW binary
 * putting an externally-generated binary in the source tree is ugly
   as hell

Avoid these problems by accepting an absolute path for
PMUFW_INIT_FILE. This would be as simple as removing the "$(srctree)/"
prefix, but in order to keep backward compatibility we rather use the
shell and readlink to get the absolute path even when starting from a
relative path.

Since 'readlink -f' produces an empty string if the file does not
exist, we also add a check to ensure the file configured in
PMUFW_INIT_FILE exists. Otherwise the build would exit successfully,
but produce a boot.bin without PMUFW as if PMUFW_INIT_FILE were empty.

Tested in the 12 possible combinations of:
 - PMUFW_INIT_FILE empty, relative, absolute, non-existing
 - building in-tree, in subdir, in other directory

Signed-off-by: Luca Ceresoli <luca@lucaceresoli.net>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Emmanuel Vadot <manu@bidouilliste.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-06-15 08:54:04 +02:00
Michal Simek
343671e483 arm64: zynqmp: Enable SPD ddr support for zcu102 targets
zcu102 contains DIMM with SPD on it at 0x51 address.
For example:
i2c dev 13
i2c sdram 51

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-06-15 08:06:31 +02:00
Michal Simek
56c0e646c4 timer: cadence: Implement timer_get_boot_us
This function is required for adding bootstage support.
Also enable it directly for ZynqMP R5 configuration.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-06-15 08:06:31 +02:00
Michal Simek
3c1eaec012 arm: zynq: Drop #address-cells and #size-cells from gpio-keys
dtc is showing some warnings and this change was also done in
the Linux kernel as "Input: gpio-keys - clean up device tree binding
example"
with this fragment in commit message
"Drop #address-cells and #size-cells, which are not required by the
gpio-keys binding documentation, as button sub-nodes are not devices."

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-06-15 08:06:31 +02:00
Siva Durga Prasad Paladugu
bc0f4ed133 arm64: zynqmp: Split emmc configuration into emmc0 and emmc1
This patch splits the current mini emmc configuration into emmc0
and emmc1 configurations because emmc is probed at boot time and on
systems which have only one interface mini configuration is failing on
unused interface. This patch also adds required clock node in dts and
enables CONFIG_MMC_SDHCI_ZYNQ through defconfig.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-06-15 08:06:31 +02:00
Michal Simek
0ecd14e636 arm: zynq: Add missing watchdog header
Add missing header detected by sparse.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-06-15 08:06:31 +02:00
Marek Vasut
4b334b6054 ARM: rmobile: Point load address to more sane area on Gen3
Point the $loadaddr variable and default load address to a more sane
area, 384 MiB from the start of RAM. This is to avoid all the reserved
memory at the beginning of RAM. The old behavior could still be easily
retained by "setenv loadaddr 0x48080000" . The new setup allows us to
use for example modern fitImage with kernel_noload, so use this as a
new preferred default.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-06-14 22:35:21 +02:00
Marek Vasut
910db6c3a1 ARM: rmobile: Point load address to more sane area on Gen2
Point the $loadaddr variable and default load address to a more sane
area, 256 MiB from the start of RAM. While it is convenient to use
uImage without copying, which is why the previous load address was
set the way it was, uImage is now legacy. This behavior could still
be easily retained by "setenv loadaddr 0x40007fc0" . The new setup
allows us to use for example modern fitImage with kernel_noload, so
use this as a new preferred default.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-06-14 22:35:21 +02:00
Marek Vasut
c29d2a2432 ARM: rmobile: Zap CONFIG_SYS_CLK_FREQ where applicable
The CONFIG_SYS_CLK_FREQ is not used on some of the Gen3 boards,
remove it. Moreover, on Ebisu this actually didn't match the
comment in the config file at all, but since it was not used,
there was no real problem.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-06-14 22:35:21 +02:00
Marek Vasut
2519a293d5 ARM: rmobile: Sync Gen3 DTS with Linux v4.17
Sync the DTs with Linux v4.17.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-06-14 22:35:21 +02:00
Marek Vasut
252c8b45c9 ARM: rmobile: Sync Gen2 DTS with Linux v4.17
Sync the DTs with Linux v4.17.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-06-14 22:35:21 +02:00
Marek Vasut
bf8d2dab38 pinctrl: renesas: Sync Gen3 PFC tables with Linux v4.17
Sync the PFC tables with Linux v4.17.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-06-14 22:35:21 +02:00
Tom Rini
9d0dc69235 Merge tag 'signed-efi-next' of git://github.com/agraf/u-boot
Patch queue for efi - 2018-06-14

A few minor fixes for the release:

  - Compile fixes
  - HI20 relocations for RISC-V
  - Fix bootefi without load path
  - Fix Runtime Services with certain compilers
2018-06-14 13:28:03 -04:00
Marek Vasut
2e975d8628 pinctrl: renesas: Sync Gen2 PFC tables with Linux v4.17
Sync the PFC tables with Linux v4.17.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-06-14 13:36:33 +02:00
Marek Vasut
6995fc3aca clk: rmobile: Add R8A77995 RPC clock
Add missing RPC entry into the R8A77995 clock driver tables.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-06-14 13:36:33 +02:00
Marek Vasut
0f4ab201fa clk: rmobile: Add R8A77990 RPC clock
Add missing RPC entry into the R8A77990 clock driver tables.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-06-14 13:36:33 +02:00
Marek Vasut
e1ccb2c34c dts: gpio: Sync header with Linux 4.17
Sync the gpio.h header with Linux 4.17, which contains new macros.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Tom Rini <trini@konsulko.com>
2018-06-14 13:36:33 +02:00
Tom Rini
606fddd76c Merge branch 'master' of git://git.denx.de/u-boot-net 2018-06-14 07:20:41 -04:00
Vasily Khoruzhick
b9f34757db usb: sunxi: access ahb_reset0_cfg in CCM using its offset
struct sunxi_ccm_reg doesn't have ahb_reset0_cfg on sun4i and sun5i,
thus compilation fails with:

drivers/usb/host/ohci-sunxi.c:96:26: error: 'struct sunxi_ccm_reg' has
no member named 'ahb_reset0_cfg'

Access this reg using its offset to fix this issue.

Fixes commit 1ed9c1118 ("usb: sunxi: ehci: get rid of ifdefs")
and commit 56830cee3 ("usb: sunxi: ohci: get rid of ifdefs")

Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
2018-06-14 12:57:19 +02:00
Alexander Graf
58bc69d20a efi_loader: Allocate memory handle for mem dp
When we boot using memdp (bootefi on an address without previous
load that populates the device path) then the memory device path
we pass in is not backed by any handle.

That can result in weird effects. For example grub gets very grumpy
about this inside the efi_net module and just loops endlessly.

So let's expose a simple handle that the memory device path is backed
on. That way any code that looks for the device the dp is on, finds
one.

Signed-off-by: Alexander Graf <agraf@suse.de>
2018-06-14 10:53:37 +02:00
Heinrich Schuchardt
2f61b13d6a efi_loader: avoid make race condition
When U-Boot is built with 'make -j' there is not guarantee that targets in
directory arch/ are built before targets in directory lib/. The current
build instruction for EFI binaries in lib/ rely on dependencies in arch/.
If $(EFI_CRT0) or $(EFI_RELOC) is not yet built before trying to build
%.efi an error
    *** No rule to make target '%.efi'
occurs.

With the patch separate copies of $(EFI_CRT0) and $(EFI_RELOC) named
efi_crt0.o and efi_reloc.o are built in lib/efi_loader and
lib/efi_selftest.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-06-14 10:52:14 +02:00
Heinrich Schuchardt
44ab2d325b efi_loader: avoid initializer element is not constant
When building with -pedantic the current definition of EFI_GUID() causes
an error 'initializer element is not constant'.

Currently EFI_GUID() is used both as an anonymous constant and as an
intializer. A conversion to efi_guid_t is not allowable when using
EFI_GUID() as an initializer. But it is needed when using it as an
anonymous constant.

We should not use EFI_GUID() for anything but an initializer. So let's
introduce a variable where needed and remove the conversion.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-06-14 10:52:14 +02:00
Simon Glass
2d2b5b2d00 efi: Add a comment about duplicated ELF constants
These constants are defined in arch-specific code but redefined here. Add
a TODO to clean this up.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-06-14 10:52:14 +02:00
Alexander Graf
e4679489c3 efi_loader: Convert runtime reset from switch to if statements
We currently handle the UEFI runtime reset / power off case handling via
a switch statement. Compilers (gcc in my case) may opt to handle these via
jump tables which they may conveniently put into .rodata which is not part
of the runtime section, so it will be unreachable when executed.

Fix this by just converting the switch statement into an if/else statement.
It produces smaller code that is faster and also correct because we no
longer refer .rodata from efi runtime code.

Reported-by: Andreas Färber <aferber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-06-14 10:52:14 +02:00
Alexander Graf
de452c04c3 riscv: Add support for HI20 PE relocations
The PE standard allows for HI20/LOW12 relocations. Within the efi_loader
target we always know that our relocation target is 4k aligned, so we
don't need to worry about the LOW12 part.

This patch adds support for the respective relocations. With this and a
few grub patches I have cooking in parallel I'm able to run grub on RISC-V.

Signed-off-by: Alexander Graf <agraf@suse.de>
2018-06-14 10:52:14 +02:00
Michal Simek
5b2c9a6ce3 net: gem: Check return value from memalign/malloc
Functions can return NULL in case of error that's why checking return
value is needed.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-06-13 13:59:04 -05:00
Michal Simek
7674b64d78 net: zynq_gem: Initialize phyreg variable
In case of phyread()/phy_setup_op() timeout code is working with
uninitialized phyreg variable. Initialize this variable to make sure
that code it not working with random value.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-06-13 13:54:18 -05:00
Michal Simek
b33d4a5fc7 net: zynq_gem: Fix return type for phy...()
wait_for_bit_le32 returns negative value on failure. Fix phy...() to
handle these failures properly.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-06-13 13:54:17 -05:00
Chris Packham
5194ed7edc net: mvgbe: extract common code for SMI wait
Combine repeated code from smi_reg_read/smi_reg_write into a common
function smi_wait_ready.

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-06-13 13:54:17 -05:00
Quentin Schulz
c61221948c net: designware: set the PS bit when resetting DMA bus in MII configuration
On the SPEAr600 SoC, which has the dwmac1000 variant of the IP block,
the DMA reset never succeeds when a MII PHY is used (no problem with a
GMII PHY). The designware_eth_init() function sets the
DMAMAC_SRST bit in the DMA_BUS_MODE register, and then
polls until this bit clears. When a MII PHY is used, with the current
driver, this bit never clears and the driver therefore doesn't work.

The reason is that the PS bit of the GMAC_CONTROL register should be
correctly configured for the DMA reset to work. When the PS bit is 0,
it tells the MAC we have a GMII PHY, when the PS bit is 1, it tells
the MAC we have a MII PHY.

Doing a DMA reset clears all registers, so the PS bit is cleared as
well. This makes the DMA reset work fine with a GMII PHY. However,
with MII PHY, the PS bit should be set.

We have identified this issue thanks to two SPEAr600 platform:

- One equipped with a GMII PHY, with which the existing driver was
working fine.

- One equipped with a MII PHY, where the current driver fails because
the DMA reset times out.

Note: Taken from https://www.spinics.net/lists/netdev/msg432578.html

Signed-off-by: Quentin Schulz <quentin.schulz@bootlin.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-06-13 13:54:17 -05:00
Chris Packham
3cb51dad0d net: phy: mv88e61xx: Force CPU port link up
When connecting to from a CPU direct to a 88e6097 typically RGMII is
used. In order for traffic to actually pass we need to force the link up
so the CPU MAC on the other end will see the link.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-06-13 13:54:17 -05:00
Jon Nettleton
199b27bb70 mvebu: neta: align DMA buffers
This makes sure the DMA buffers are properly aligned for the
hardware.

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Jon Nettleton <jon@solid-run.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-06-13 13:54:17 -05:00
Kunihiko Hayashi
a8927795ef net: add Socionext AVE ethernet driver support
Add driver for Socionext AVE ethernet controller that includes MAC and
MDIO bus supporting RGMII/RMII modes.
The driver behaves the ethernet driver model (DM_ETH) with devicetree.

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-06-13 13:54:17 -05:00
Kunihiko Hayashi
ff114e0f76 net: include/phy.h: add new mode for internal phy
Add the new mode to indicate a built-in PHY.
This will be used by UniPhier AVE ethernet driver.

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Reviewed-by: Marek Vasut <marek.vasut@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-06-13 13:54:16 -05:00
Radu Bulie
98017a1fb5 drivers/net/vsc9953: Initialize action RAM in VCAP complex
VCAP tables must be initialized even if no advanced classification
is used. If no initialization is performed, then ECC error will
be observed by the user when the first packet enters the l2switch.
The error is marked in MPIC_EISR0 -bit 29 which means - Internal RAM
multi-bit ECC error.
This patch fixes the aforementioned ECC error by performing the
initialization of VCAP tables.

Signed-off-by: Radu Bulie <radu-andrei.bulie@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-06-13 13:54:16 -05:00
Vasily Khoruzhick
d48d40a091 net: nfs: don't fail when nfs_read_reply returns -NFS_RPC_DROP
That can happen if duplicate UDP packet arrived, and that's not uncommon.
Anyway, we ignore packets with rpc_id lower than last we sent for other
requests, so it makes sense to do that for read request as well.

Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-06-13 13:54:16 -05:00
Alex Kiernan
286bea2e85 net: cpsw: ti: Reap completed packets before stopping interface
If you send a final packet just before stopping the interface (e.g. a final
ACK as part of the UDP fastboot protocol), then that packet isn't reliably
delivered onto the wire.

Reap packets prior to stopping the interface to ensure any which are
in-flight make it out. Also remove buffer and len from the call to
cpdma_process() as we weren't using them on their return.

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-06-13 13:54:16 -05:00
Leonid Iziumtsev
60177b2617 net: Protect net_state from reentrant net_loop()
Global variable "net_state" is used in net_loop() state-machine.
But it happens that some times the net_loop() can be called
multiple times in the same call stack. For example when the
netconsole is enabled and we print the message while some other
net protocol is in action. Netconsole will overwrite the "net_state"
and that will break the logic for earlier started protocol.

To protect the state save and restore "net_state" variable each
time when we enter and exit net_loop().

Signed-off-by: Leonid Iziumtsev <leonid.iziumtsev@se.atlascopco.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-06-13 13:54:16 -05:00
Vicentiu Galanopulo
552e7c57d0 net/phy/cortina: Add support for CS4223 PHY
Add support for Cortina CS4223 10G PHY
  - As per the CS4223 specs, an EEPROM module is
    connected to the PHY. At startup the PHY reads
    the firmware line and tries to load the firmware
    into the internal memory.
  - This driver reads the EEPROM status
    and checks if firmware has been loaded

Signed-off-by: Vicentiu Galanopulo <vicentiu.galanopulo@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-06-13 13:54:15 -05:00
Joe Hershberger
6e35686d89 net: sunxi: Correct MAC address register order
Put the enetaddr data in the same order as it was before the change in
commit ace1520cb5 ("net: sunxi-emac: Write HW address via function")

Reported-by: Udo Maslo <u.maslo@web.de>
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
2018-06-13 13:54:15 -05:00
Joe Hershberger
6f0dc0ca31 net: Express LINK_LOCAL dependency on LIB_RAND
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
2018-06-13 13:54:15 -05:00
Mario Six
5e9d9abe08 tsec: Fix reading phy registers from DT
Bus translations should be applied when reading the address of the sgmii
phy registers from the DT. Use ofnode_get_addr_index instead of the
plain ofnode_read_u32_default to fix this.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-06-13 13:54:15 -05:00
Mario Six
3ce4304205 net: Initialize as many ethernet devices as possible
On devices that have their first network interface provided by a FPGA,
the initialization of further interfaces will fail if the FPGA is not
yet programmed. This leads to problems during factory setup when the
data is supposed to be loaded over secondary netowork interfaces.

To avoid this, use the uclass_{first,next}_device_check functions to
initialize as many ethernet devices as possible.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-06-13 13:54:15 -05:00
Mario Six
2d8f25ed7b net: Always align tx packets
Make sure that TX packets are always cache-aligned.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-06-13 13:54:15 -05:00
Tom Rini
66398944f5 Merge git://git.denx.de/u-boot-x86 2018-06-13 11:43:59 -04:00
Adam Ford
acaee30608 ARM: DTS: resync a3517.dtsi with Linux 4.17
Linux 4.17 was just released with some minor changes to the
am3517.dtsi.  This patch re-syncs the file.

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-06-13 07:49:14 -04:00
Adam Ford
e3b1aaa4e0 ARM: am3517_evm: Enable SPL_OF_CONTROL and SPL_OF_PLATDATA
The SPL doesn't have much room, so in order to support OF_CONTROL
in SPL, we need the extra functionality of SPL_OF_PLATDATA.

Adding these features allows us to remove a small part of code without
losing the serial port during SPL.

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-06-13 07:49:14 -04:00
Tomi Valkeinen
eae8291913 dra76: fix HDMI HPD pinmux
The pin used for HDMI HPD should be set to GPIO mode on DRA76, similarly
to all the other DRA7 and AM5 SoCs.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
2018-06-13 07:49:14 -04:00
Tomi Valkeinen
32651e4fb8 dra7/am5: remove CEC pin pull-up
HDMI CEC pins are set to pull-up, but CEC requires no pull. Fix this.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
2018-06-13 07:49:13 -04:00
Alex Kiernan
8df430d09b env: Add !ENV_IS_IN_EXT4 dependency to ENV_IS_NOWHERE
If ENV_IS_IN_EXT4 is set you shouldn't be able to select ENV_IS_NOWHERE.

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Petr Vorel <petr.vorel@gmail.com>
2018-06-13 07:49:13 -04:00
Shyam Saini
919d25c920 u-boot: Fix several typos
's/environemnt/environment/' and
	's/Environemnt/Environment/'

Signed-off-by: Shyam Saini <shyam@amarulasolutions.com>
2018-06-13 07:49:13 -04:00
Alex Kiernan
94b233f443 tools: env: Use getline rather than fgets when reading config/script
When reading the config file, or a script file, use getline rather than
fgets so line lengths aren't limited by the size of a compiled in buffer
(128 characters for config, 1024 for scripts).

Rename 'dump' to 'line' so it's clear we're working with a line of text.

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
2018-06-13 07:49:12 -04:00
Adam Ford
2aa686775b AM3517_EVM: Fix Environmental location
The am3517-evm boards stores the environment in NAND, but after merging
various configs, the board was trying to load environment variables from
FAT which would ultimately fail and cause some chatter.

This patch removes the ENV_IS_IN_FAT flag to eliminate the noise.

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-06-13 07:49:12 -04:00
Alexey Brodkin
f8c987f8f1 lib: Add hexdump
Often during debugging session it's very interesting to see
what data we were dealing with. For example what we write or read
to/from memory or peripherals.

This change introduces functions that allow to dump binary
data with one simple function invocation like:
------------------->8----------------
print_hex_dump_bytes("", DUMP_PREFIX_OFFSET, buf, len);
------------------->8----------------

which gives us the following:
------------------->8----------------
00000000: f2 b7 c9 88 62 61 75 64 72 61 74 65 3d 31 31 35  ....baudrate=115
00000010: 32 30 30 00 62 6f 6f 74 61 72 67 73 3d 63 6f 6e  200.bootargs=con
00000020: 73 6f 6c 65 3d 74 74 79 53 33 2c 31 31 35 32 30  sole=ttyS3,11520
00000030: 30 6e 38 00 62 6f 6f 74 64 65 6c 61 79 3d 33 00  0n8.bootdelay=3.
00000040: 62 6f 6f 74 66 69 6c 65 3d 75 49 6d 61 67 65 00  bootfile=uImage.
00000050: 66 64 74 63 6f 6e 74 72 6f 6c 61 64 64 72 3d 39  fdtcontroladdr=9
00000060: 66 66 62 31 62 61 30 00 6c 6f 61 64 61 64 64 72  ffb1ba0.loadaddr
00000070: 3d 30 78 38 32 30 30 30 30 30 30 00 73 74 64 65  =0x82000000.stde
00000080: 72 72 3d 73 65 72 69 61 6c 30 40 65 30 30 32 32  rr=serial0@e0022
00000090: 30 30 30 00 73 74 64 69 6e 3d 73 65 72 69 61 6c  000.stdin=serial
000000a0: 30 40 65 30 30 32 32 30 30 30 00 73 74 64 6f 75  0@e0022000.stdou
000000b0: 74 3d 73 65 72 69 61 6c 30 40 65 30 30 32 32 30  t=serial0@e00220
000000c0: 30 30 00 00 00 00 00 00 00 00 00 00 00 00 00 00  00..............
...
------------------->8----------------

Source of hexdump.c was copied from Linux kernel v4.7-rc2.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Anatolij Gustschin <agust@denx.de>
Cc: Mario Six <mario.six@gdsys.cc>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Cc: Stefan Roese <sr@denx.de>
2018-06-13 07:49:12 -04:00
Yevgeny Popovych
f559180176 fs: btrfs: Fix not all CHUNK_ITEMs being read from CHUNK_TREE
This causes errors when translating logical addresses to physical:
  btrfs_map_logical_to_physical: Cannot map logical address <addr> to physical
  btrfs_file_read: Error reading extent

The behavior of btrfs_map_logical_to_physical() is to stop traversing
CHUNK_TREE when it encounters first non-CHUNK_ITEM, which makes
only some portion of CHUNK_ITEMs being read.
Change it to skip over non-chunk items.

Signed-off-by: Yevgeny Popovych <yevgenyp@pointgrab.com>
Cc: Marek Behun <marek.behun@nic.cz>
Cc: Sergey Struzh <sergeys@pointgrab.com>
Reviewed-by: Marek Behun <marek.behun@nic.cz>
2018-06-13 07:49:12 -04:00
Neil Armstrong
5b3da7fa12 ARM64: meson: Sync DT with Linux 4.17
Synchronize the Linux Device Tree for Amlogic Meson GX boards from Linux 4.17.0

This will enable USB on Amlogic Meson GXL Boards like Khadas VIM, P212 or
LibreTech-CC.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2018-06-13 07:49:11 -04:00
Seung-Woo Kim
6e2151c729 fs: fat: fix wrong casting to unsigned value of sect_to_cluster()
After the commit 265edc03d5 ("fs/fat: Clean up open-coded sector
<-> cluster conversions"), it is hung up writing new file to FAT16
disk with more than 19 files in armv7. It is because result value
of sect_to_cluster() is not proper by casting from signed value to
unsigned value. Fix the wrong casting of sect_to_cluster().

Reported-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
2018-06-13 07:49:11 -04:00
Vasily Khoruzhick
11bb62768d usb: sunxi: sun50i: enable OHCI0 clock when OHCI1 is in use
On A64 OHCI1 clock source is OHCI0 clock, so we need to enable OHCI0
clock when OHCI1 is in use.

Fixes commit dd3228170a ("usb: sunxi: Switch to use generic-phy")

Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
2018-06-13 07:33:42 +02:00
Vasily Khoruzhick
56830cee3a usb: sunxi: ohci: get rid of ifdefs
We can use compatibles instead.

Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
2018-06-13 07:33:42 +02:00
Vasily Khoruzhick
1ed9c11188 usb: sunxi: ehci: get rid of ifdefs
We can use compatibles instead.

Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
2018-06-13 07:33:42 +02:00
Vasily Khoruzhick
b62cdbdded sunxi: clock: Fix EHCI and OHCI clocks on A64
EHCI0 is bit 24, EHCI1 - 25, OHCI0 - 28, OHCI1 - 29

Fixes commit fef73766d9 ("sunxi: clock: Fix OHCI clock gating for H3/H5")

Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
2018-06-13 07:33:42 +02:00
Bin Meng
bee053e248 x86: cougarcanyon2: Add missing chipset interrupt information
Add Panther Point chipset interrupt pin/PIRQ information, and
enable the generation of PIRQ routing table and MP table.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-13 09:50:57 +08:00
Bin Meng
51050ff0a2 x86: irq: Support discrete PIRQ routing registers via device tree
Currently both pirq_reg_to_linkno() and pirq_linkno_to_reg() assume
consecutive PIRQ routing control registers. But this is not always
the case on some platforms. Introduce a new device tree property
intel,pirq-regmap to describe how the PIRQ routing register offset
is mapped to the link number and adjust the irq router driver to
utilize the mapping.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-13 09:50:57 +08:00
Bin Meng
dcec5d565a x86: irq: Parse number of PIRQ links from device tree
The "intel,pirq-link" property in Intel IRQ router's dt bindings
has two cells, where the second one represents the number of PIRQ
links on the platform. However current driver does not parse this
information from device tree. This adds the codes to do the parse
and save it for future use.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-13 09:50:57 +08:00
Bin Meng
558f3ed9c8 x86: efi: payload: Minor clean up on error message output
If GetMemoryMap() fails, we really want to know EFI_BITS_PER_LONG
instead of BITS_PER_LONG. A space and LF are added in places where
error message is output to improve readability.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-13 09:50:57 +08:00
Christian Gmeiner
6f95d89c71 dm: pci: Use a 1:1 mapping for bus <-> phy addresses
If U-Boot gets used as coreboot payload all pci resources got
assigned by coreboot. If a dts without any pci ranges gets used
the dm is not able to access pci device memory. To get things
working make use of a 1:1 mapping for bus <-> phy addresses.

This change makes it possible to get the e1000 U-Boot driver
working on a sandybridge device where U-Boot is used as coreboot
payload.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: fixed 'u-boot' in the commit message]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-13 09:50:57 +08:00
Christian Gmeiner
f2825f6ec0 dm: pci: Make ranges dt property optional
If we use U-Boot as coreboot payload with a generic dts without
any ranges specified we fail in pci pre_probe and our pci bus
is not usable.

So convert decode_regions(..) into a void function and do the simple
error handling there.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: fixed 'u-boot' in the commit message and checkpatch warning]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-13 09:50:57 +08:00
Bin Meng
16dde8945e x86: efi: payload: Enforce toolchain to generate 64-bit EFI payload stub codes
Attempting to use a toolchain that is preconfigured to generate code
for the 32-bit architecture (i386), for example, the i386-linux-gcc
toolchain on kernel.org, to compile the 64-bit EFI payload does not
build. This updates the makefile fragments to ensure '-m64' is passed
to toolchain when building the 64-bit EFI payload stub codes.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-13 09:50:57 +08:00
Bin Meng
b8038a1cdb x86: efi: app: Fix broken EFI application
The EFI application does not boot currently. It's due to the call
to syscon_get_by_driver_data() in cpu_init_r() maps to nowhere as
CONFIG_SYSCON is not included in the configuration.

EFI application is built as a shared library, so GCC won't complain
during the build process if some symbols are not found. GCC will
simply put these symbols into the .plt section and expect dynamic
loader to fix these up.

While we are here, remove some commands and drivers that are not
needed at present.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-13 09:50:57 +08:00
Bin Meng
fcfc8a82b1 x86: Conditionally build the pinctrl_ich6 driver
The pinctrl_ich6 driver is currently unconditionally built for all
x86 boards. Let's use a Kconfig option to control the build.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-13 09:50:57 +08:00
Bin Meng
594d089c8a x86: irq: Change LINK_V2N and LINK_N2V to inline functions
LINK_V2N and LINK_N2V are currently defines, so they cannot handle
complex logics. Change to inline functions for future extension.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-13 09:50:57 +08:00
Bin Meng
bc728b1bc0 x86: irq: Remove chipset specific irq router drivers
At present there are 3 irq router drivers. One is the common one
and the other two are chipset specific for queensbay and quark.
However these are really the same drivers as the core logic is
the same. The two chipset specific drivers configure some registers
that are outside the irq router block which should really be part
of the chipset initialization.

Now we remove these specific drivers and make all x86 boards use
the common one.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-13 09:50:57 +08:00
Bin Meng
0a6fb5b577 x86: cougarcanyon2: Enable CPU driver and SMP support
This enables the 206ax cpu driver on Intel Cougar Canyon 2 board,
so that SMP can be supported too.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-13 09:50:57 +08:00
Bin Meng
8407f5fcdc x86: chromebook_link: Remove dm-pre-reloc property in the cpu nodes
The 206ax cpu driver does not require pre-relocation flag to work.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-13 09:50:57 +08:00
Bin Meng
a8542ad81f x86: ivybridge: Drop CONFIG_USBDEBUG
This is not used anywhere. Clean this up.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-13 09:50:57 +08:00
Bin Meng
7d0bc172e5 x86: ivybridge: Enable 206ax cpu driver for FSP build
At present this 206ax cpu driver is only built when FSP is not used.
This updates the Makefile to enable the build for both cases.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-13 09:50:57 +08:00
Bin Meng
fb05f0b02b x86: cougarcanyon2: Remove CONFIG_HAVE_INTEL_ME
As README.x86 already mentions, there are two SPI flashes mounted
on Intel Cougar Canyon 2 board, called SPI-0 and SPI-1 respectively.
SPI-0 stores the flash descriptor and the ME firmware. SPI-1 stores
the actual BIOS image which is U-Boot. Building a single image with
both ME firmware and U-Boot does not make sense.

This also describes the exact flash location where the u-boot.rom
should be programmed in the documentation.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-13 09:50:57 +08:00
Bin Meng
80abc8165e x86: cougarcanyon2: Update dts for SPI lock down
It turns out that like Braswell, Intel FSP for IvyBridge requires
SPI controller settings to be locked down, as the U-Boot ICH SPI
driver fails with the following message on Cougar Canyon 2 board:

  "ICH SPI: Opcode 9f not found"

Update the SPI node property to indicate this fact.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-13 09:50:57 +08:00
Bin Meng
b173b4ea34 x86: ivybridge: Imply USB_XHCI_HCD
The Panther Point chipset connected to Ivybridge has xHC integrated,
imply it.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-13 09:50:57 +08:00
Bin Meng
9fddf6c7dd usb: xhci-pci: Fix compiler warning
This fixes the following compiler warning:

  "warning: cast from pointer to integer of different size
  [-Wpointer-to-int-cast]"

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-13 09:50:57 +08:00
Bin Meng
341dda352d x86: baytrail: Correct the comment of IACORE_VIDS bit ranges
The guaranteed vid bit ranges in IACORE_VIDS MSR is actually
[22:16]. This corrects the comment for it.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-13 09:50:57 +08:00
Andy Shevchenko
919c1c1204 x86: acpi: Adopt new version of iASL compiler
The commit

  f9a88a4c1cd0 ("iASL: Enhance the -tc option (create AML hex file in C)")

in ACPICA project changed a template of the variable that is used
in the generated C-file. Now, instead of hard coded "AmlCode" the
"%s_aml_code" is in use, where the prefix is a lowered case base
name of the output file. In our case it will be "dsdt" producing
a name as "dsdt_aml_code".

The quick solution is to call sed which replaces new name by the
old one to keep compatibility with old version of iASL.

The long term solution would be to modify code to use the new name
because it is more scalable.

Cc: Robert Moore <robert.moore@intel.com>
Cc: Sami Mujawar <sami.mujawar@arm.com>
Cc: Evan Lloyd <evan.lloyd@arm.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: fixed two sentences in the commit message]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2018-06-13 09:50:57 +08:00
Christian Gmeiner
acc2482fd8 x86: tsc: add support for reading CPU freq from cpuid
Starting with cpuid level 0x16 (Skylake-based processors)
it is possible to get CPU base freq via cpuid.

This fixes booting on a skylake based system.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: fixed wrong indention of labels]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2018-06-13 09:50:57 +08:00
Ramon Fried
920be88e92 include/linux/byteorder: Sync to latest Linux definitions
generic.h has changed in Linux and new addtionals functions were
added.

This commit takes the latest and greatest from Linux (v4.17-rc5)
to aid with porting drivers that utilize these functions.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
2018-06-12 18:44:00 -04:00
Baruch Siach
c511147cf4 doc: cmd: bubt: drop duplicated text
This commit removes text that is exact duplicated of the text above.

Cc: Konstantin Porotchkin <kostap@marvell.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Stefan Roese <sr@denx.de>
2018-06-12 18:44:00 -04:00
Matwey V. Kornilov
b75422f362 configs: pcm051: Use am335x-wega-rdk.dtb as fdtfile
In upstream Linux kernel, the fdtfile
for this specific board is called am335x-wega-rdk.dtb

Signed-off-by: Matwey V. Kornilov <matwey.kornilov@gmail.com>
2018-06-12 18:44:00 -04:00
Matwey V. Kornilov
ccad5e86e2 configs: pcm051: Use DEFAULT_LINUX_BOOT_ENV instead of hardcoded values
It appears that DEFAULT_LINUX_BOOT_ENV can be used to boot pcm051 board.

Signed-off-by: Matwey V. Kornilov <matwey.kornilov@gmail.com>
2018-06-12 18:44:00 -04:00
Matwey V. Kornilov
be9437fb49 configs: pcm051: Use DEFAULT_MMC_TI_ARGS instead of hardcoded duplicates
Signed-off-by: Matwey V. Kornilov <matwey.kornilov@gmail.com>
2018-06-12 18:44:00 -04:00
Matwey V. Kornilov
e7168819f4 configs: pcm051: Support distro bootcmds
Add support for distro bootcmds.

Signed-off-by: Matwey V. Kornilov <matwey.kornilov@gmail.com>
2018-06-12 18:44:00 -04:00
Tom Rini
7868909ed5 Merge git://git.denx.de/u-boot-fsl-qoriq 2018-06-12 13:25:24 -04:00
Tom Rini
7a4a3503d5 Merge git://git.denx.de/u-boot-marvell 2018-06-12 07:26:15 -04:00
Dennis Gilmore
ae28a5f830 arm: mvebu: Add Helios4 Armada 38x initial support
The helios4 is built on the SolidRun Armada 38x SOM.
The port os based on the ClearFog board, using information from
https://github.com/helios-4/u-boot-marvell as well as dtb input
from https://github.com/helios-4/linux-marvell

Signed-off-by: Dennis Gilmore <dennis@ausil.us>
Signed-off-by: Dennis Gilmore <dgilmore@redhat.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-06-12 13:17:19 +02:00
Vinitha V Pillai
2d91b53331 LS1012AFRWY: Add Secure Boot support
Added the following:
1. defconfig for LS1012AFRWY Secure boot
2. PfE Validation support

Signed-off-by: Vinitha V Pillai <vinitha.pillai@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-06-11 12:34:45 -07:00
Bhaskar Upadhaya
9629ccdde7 board: ls1012a: FRWY-LS1012A board support
FRWY-LS1012A belongs to LS1012A family with features 2 1G SGMII PFE
MAC, Micro SD, USB 3.0, DDR, QuadSPI, Audio, UART.

Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com>
[yorks: rebase and fix SPDX tag]
[yorks: fix board/freescale/ls1012afrdm/Kconfig]
Reviewed-by: York Sun <york.sun@nxp.com>
2018-06-11 12:34:45 -07:00
Bhaskar Upadhaya
7191d45348 board: Kconfig: Re-Arrangement of PPA firmware and header addresses
PPA firmware and header address may vary depending upon different
boards, configure ppa firmware and header address in board specific
Kconfig.

Signed-off-by: Vinitha V Pillai <vinitha.pillai@nxp.com>
Signed-off-by: Jagdish Gediya <jagdish.gediya@nxp.com>
Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-06-08 16:43:19 -07:00
Jagdish Gediya
73dc91f9c4 arm: ls1021aqds: config: enable CONFIG_ID_EEPROM for mac command
Signed-off-by: Jagdish Gediya <jagdish.gediya@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-06-08 16:43:19 -07:00
Priyanka Jain
4911948ec7 board/freescale,lsch3: Add entry for 0.9v
As per updated hardware documentation for
lsch3 based chips like LS2088A, 0.9v support
has been added in possible supported SoC volatges

Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-06-08 16:43:11 -07:00
Ran Wang
d93a18f77c armv8: ls1088a: Enable USB in ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-06-08 16:39:22 -07:00
Tom Rini
813d1fb56d Merge branch 'master' of git://git.denx.de/u-boot-ubi 2018-06-08 10:08:20 -04:00
Tom Rini
8da19df5b5 Merge branch 'master' of git://git.denx.de/u-boot-i2c 2018-06-08 10:00:46 -04:00
Tom Rini
8f48cf9f17 Merge git://git.denx.de/u-boot-dm 2018-06-08 07:20:08 -04:00
Seung-Woo Kim
71002b508a cmd: add missing line breaks for pr_err()
After the commit 9b643e312d ("treewide: replace with error() with
pr_err()"), there are some pr_err() with no line break. Add missing
line breaks.

Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
2018-06-07 20:06:29 -04:00
Seung-Woo Kim
5c890b1bc8 board: samsung: add missing line breaks for pr_err()
After the commit 9b643e312d ("treewide: replace with error() with
pr_err()"), there are some pr_err() with no line break. Add missing
line breaks.

Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
Reviewed-by: Minkyu Kang <mk7.kang@samsung.com>
2018-06-07 20:06:29 -04:00
Seung-Woo Kim
e94b93d5bb script: Make get_default_envs.sh script exclude tools/env
If building envtools, there is env directory in tools directory.
Mafe the get_default_envs.sh script exclude tools/env directory.

Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
2018-06-07 20:06:29 -04:00
Ramon Fried
b5e0e360fd common: iotrace: add timestamp to iotrace records
Add timestamp to each iotrace record to aid in debugging
of IO timing access bugs.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-07 17:08:07 -04:00
Ramon Fried
a74440b27b iotrace: add IO region limit
When dealing with a lot of IO regions, sometimes
it makes sense only to trace a specific one.
This patch adds support for region limits.
If region is not set, the iotrace works the same as it was.
If region is set, the iotrace only logs io operation that falls
in the defined region.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-07 17:08:06 -04:00
Ramon Fried
b559c4af80 cmd: iotrace: add set region command
Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-07 17:08:06 -04:00
Ramon Fried
948f32c856 bug.h: introduce WARN_ONCE
Add WARN_ONCE definition to allow single time notification
of warnings to the user.
Taken from Linux kernel (4.17) with slight changes
(Removed __section(.data.once))

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
[trini: Drop the musb and dwc3 compat versions]
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-06-07 17:08:06 -04:00
Simon Glass
844e5b20f2 binman: Mark 'align-end' as implemented
The documentation says this is not implemented, but it is. Update the
documentation, and clarify its operation.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-06-07 11:25:08 -08:00
Simon Glass
c8d48efb2b binman: Add support for adding a name prefix to entries
Sometimes we have several sections which repeat the same entries (e.g. for
a read-only and read-write version of the same section). It is useful to
be able to tell these entries apart by name.

Add a new 'name-prefix' property for sections, which causes all entries
within that section to have a given name prefix.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-06-07 11:25:08 -08:00
Simon Glass
3b0c3821d6 binman: Add support for outputing a map file
It is useful to be able to see a list of regions in each image produced by
binman. Add a -m option to output this information in a '.map' file
alongside the image file.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-06-07 11:25:08 -08:00
Simon Glass
7ae5f315b3 binman: Tidy up some docs and comments
Fix a few missing comments and tidy up some existing ones.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-06-07 11:25:08 -08:00
Simon Glass
084059a31f binman: Allow a single test to be executed
Provide an easy way to execute a single binman test by specifying it on
the command line.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-06-07 11:25:08 -08:00
Simon Glass
258fb0e677 binman: Add documentation for pos-unset property
This property is not documented. Add a note to the README.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-06-07 11:25:08 -08:00
Simon Glass
1854695bd8 binman: Add support for sections
It is useful to be able to split an image into multiple sections,
each with its own size and position, for cases where a flash device has
read-only and read-write portions.

Add support for this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-06-07 11:25:08 -08:00
Simon Glass
badf0ec6e4 binman: Avoid setting sys.path globally
At present we set the Python path at the start of binman so we can read
modules in the 'etype' directory. This is a bit messy since it affects
'import' statements through binman.

Adjust the code to set the path locally, just where it is needed. Move
the 'entry' module in with the other base modules to help with this. It
makes more sense here anyway since it does not implement an entry type.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-06-07 11:25:08 -08:00
Simon Glass
25ac0e61fe binman: Rename Entry property to 'section'
Entries are now passed a Section object rather than an Image. Rename this
property to avoid confusion.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-06-07 11:25:08 -08:00
Simon Glass
f55382b5e5 binman: Rename ELF parameters to 'section'
We now pass a Section object to these functions rather than an Image.
Rename the parameters to avoid confusion.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-06-07 11:25:07 -08:00
Simon Glass
8f1da50ccc binman: Refactor much of the image code into 'section'
We want to support multiple sections within a single image. To do this,
move most of the Image class implementation into a new Section class. An
Image contains only a single Section, but at some point we will support
a new 'section' entry, thus allowing Sections within Sections.

Use the name 'bsection' for the module so we can use 'section' for the
etype module.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-06-07 11:25:07 -08:00
Simon Glass
dd57c13bbc binman: Allow unit addresses for binaries
Allow the same binary to appear multiple times in an image by using the
device-tree unit-address feature (u-boot@0, u-boot@1).

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-06-07 11:25:07 -08:00
Alex Kiernan
48ae412424 buildman: Add support for environment delta in summary
When summarising the builds, add the -U option to emit delta lines for
the default environment built into U-Boot at each commit.

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-07 11:25:07 -08:00
Alex Kiernan
0ddc510ea3 buildman: Extract environment as part of each build
As we're building the boards, extract the default U-Boot environment to
uboot.env so we can interrogate it later.

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-07 11:25:07 -08:00
Simon Glass
bf6226c3c4 test: Fix sandbox_spl test filter
This filter does not match the test it is intended to anymore. Update it
so that it works again.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-06-07 11:25:07 -08:00
Simon Glass
4225a4e4a9 patman: Fix unit tests for SPDX
The format of this line has changed. Update the patman test to suit.

Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Alex Kiernan <alex.kiernan@gmail.com>
2018-06-07 11:25:03 -08:00
Tom Rini
46960ad6d0 block: Have BLOCK_CACHE default to y in some cases
When dealing with filesystems that come from block devices we can get a
noticeable performance gain in some use cases from having the block
cache enabled.  The code paths are valid in other cases when we have BLK
set and may provide wins in raw reads in some use cases, so have this be
default when BLK is enabled.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-06-07 09:12:26 -04:00
Mans Rullgard
66a00be287 ARM: orion5x: fix use of callee-saved registers in lowloevel_init
The lowlevel_init function uses r4 and r6 without preserving their
values as required by the AAPCS.  Use r0 and r2 instead as these
are call-clobbered.

Signed-off-by: Mans Rullgard <mans@mansr.com>
Reviewed-by: Chris Packham <judge.packham@gmail.com>
2018-06-07 09:12:26 -04:00
Baruch Siach
d78ecc7339 mvebu: turris_omnia: add note about i2c slave disable
Code that disables the i2c slave is now in the mvtwsi i2c driver.
Platform must enable DM_I2C to use that code. Add a comment in the code
as a reminder for the planned DM_I2C migration of Turris Omnia.

Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
2018-06-07 14:20:09 +02:00
Baruch Siach
173ec35191 i2c: mvtwsi: disable i2c slave on Armada 38x
Equivalent code that disables the hidden i2c0 slave already exists in
the Turris Omnia platform specific code. But this hidden i2c0 slave that
interferes the i2c bus is not board specific. Armada 38x SoCs and at
least some Kirkwood variants are affected as well. Add code to disable
this slave to the i2c bus driver to make it work on all affected
hardware.

Use the bind callback because we want this to always run at boot,
regardless of whether U-Boot uses the i2c bus.

Cc: Rabeeh Khoury <rabeeh@solid-run.com>
Cc: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
2018-06-07 14:19:55 +02:00
Tom Rini
3eceff642c Merge branch 'master' of git://git.denx.de/u-boot-samsung 2018-06-06 09:08:16 -04:00
Tom Rini
5b2e9a8cf9 Merge branch 'master' of git://git.denx.de/u-boot-spi 2018-06-06 07:16:43 -04:00
Stefan Roese
78306cba11 mtd: ubi: Add missing newlines in ubi_init()
I just stumbled over some cluttered UBI messages. It seems some newline
chars are missing in the current U-Boot UBI source. Lets fix this
in U-Boot as well (Linux has those fixes already).

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Heiko Schocher <hs@denx.de>
2018-06-06 10:25:13 +02:00
Patrice Chotard
6b6255cd8a mach-stm32: Enable SPL_RESET_SUPPORT flag
Since commit 0e373c0ade ("spl: add SPL_RESET_SUPPORT"),
reset is supported in SPL, enable this flag for STM32F SoCs family.

This allows to remove a specific case in RCC mfd driver.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-06-05 20:19:09 -04:00
Chris Packham
d3671dfcdb drivers/rtc: convert mvrtc to DM
Add DM support for the Marvell RTC driver.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2018-06-05 20:19:09 -04:00
Chris Packham
942bb6e2ad drivers/rtc: prepare mvrtc for DM conversion
Split the rtc_{get,set,reset} functions so that the bodies can be used
in a DM driver.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2018-06-05 20:19:08 -04:00
Alexey Brodkin
ff2b2ba845 board_f: Only reserve memory for U-Boot if we're going to relocate
In case of no relocation we'll just waste some space at the very end
of usable memory area. If target device has very limited amount of memory
(for example 256 kB) this loss will be pretty inconvenient.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: York Sun <york.sun@nxp.com>
Cc: Stefan Roese <sr@denx.de>
2018-06-05 20:19:08 -04:00
Riku Voipio
0899bd269e board: STiH410-B2260: Add pxefile_addr_r variable
Reading doc/README.distro , we see platform needs to set
pxefile_addr_r to support distro boot.

Signed-off-by: Riku Voipio <riku.voipio@linaro.org>
2018-06-05 20:19:08 -04:00
Masahiro Yamada
86fbad2492 menu: fix timeout duration
For distro-boot, the TIMEOUT directive in the boot script specifies
how long to pause in units of 1/10 sec. [1]

Commit 8594753ba0 ("menu: only timeout when menu is displayed")
corrected this by simply dividing the timeout value by 10 in
menu_interactive_choice().

I see two problems:

 - For example, "TIMEOUT 5" should wait for 0.5 sec, but the current
   implementation cannot handle the granularity of 1/10 sec.
   In fact, it never breaks because "m->timeout / 10" is zero,
   which means no timeout.

 - The menu API is used not only by cmd/pxe.c but also by
   common/autoboot.c .  For the latter case, the unit of the
   timeout value is _second_ because its default is associated
   with CONFIG_BOOTDELAY.

To fix the first issue, use DIV_ROUND_UP() so that the timeout value
is rounded up to the closest integer.

For the second issue, move the division to the boundary between
cmd/pxe.c and common/menu.c .  This is a more desirable place because
the comment of struct pxe_menu says:

 * timeout - time in tenths of a second to wait for a user key-press before
 *           booting the default label.

Then, the comment of menu_create() says:

 * timeout - A delay in seconds to wait for user input. If 0, timeout is
 * disabled, and the default choice will be returned unless prompt is 1.

[1] https://www.syslinux.org/wiki/index.php?title=SYSLINUX#TIMEOUT_timeout

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-06-05 20:19:08 -04:00
Sam Protsenko
955575c8dc disk: efi: Correct backing up the MBR boot code
In commit e163a931af ("cmd: gpt: backup boot code before writing MBR")
there was added the procedure for storing old boot code when doing "gpt
write". But instead of storing just backup code, the whole MBR was
stored, and only specific fields were replaced further, keeping
everything else intact. That's obviously not what we want.

Fix the code to actually store only old boot code and zero out
everything else. This fixes next testing case:

    => mmc write $loadaddr 0x0 0x7b
    => gpt write mmc 1 $partitions

In case when $loadaddr address and further memory contains 0xff, the
board was bricked (ROM-code probably didn't like partition entries that
were clobbered with 0xff). With this patch applied, commands above don't
brick the board.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Cc: Alejandro Hernandez <ajhernandez@ti.com>
Tested-by: Andy Shevchenko <andy.shevchenko@gmail.com>
2018-06-05 10:33:57 -04:00
David Lechner
f203a479e7 ARM: legoev3: update boot script to load uEnv.txt and .dtb
This updates the LEGO MINDSTORMS EV3 boot script to try loading a
uEnv.txt file and a da850-lego-ev3.dtb device tree during boot.

Signed-off-by: David Lechner <david@lechnology.com>
2018-06-05 10:33:57 -04:00
David Lechner
71eb63e7ee ARM: legoev3: remove unused configuration options
This removes the unused clock and RAM config options that were cargo-
culted when this board was copied from the DA850 EVM.

Signed-off-by: David Lechner <david@lechnology.com>
2018-06-05 10:33:57 -04:00
David Lechner
98ada4b3f0 ARM: legoev3: disable networking
This disables networking related items in the config. The EV3 does not have
any networking hardware, so this is wasted space.

Signed-off-by: David Lechner <david@lechnology.com>
2018-06-05 10:33:57 -04:00
David Lechner
648e87a1ec ARM: legoev3: Move UART enable to early init
This moves the UART init for LEGO MINDSTORMS EV3 to board_early_init_f().
Some console messages were not being printed because the UART was not
enabled until later in the init process.

Signed-off-by: David Lechner <david@lechnology.com>
2018-06-05 10:33:57 -04:00
David Lechner
1374d88bf3 ARM: legoev3: increase flash image sizes
This increases the kernel image to 4M and the rootfs image to 10M.

It is getting hard to get a kernel image to fit in 3M.

Signed-off-by: David Lechner <david@lechnology.com>
2018-06-05 10:33:57 -04:00
Tom Rini
89d811eee6 Merge git://git.denx.de/u-boot-marvell 2018-06-05 07:13:42 -04:00
Chris Packham
d4899b0f5d ARM: kirkwood: Enforce size limit for guruplug
The u-boot binary sits in flash immediately before the environment.
Don't allow the binary size to grow into the environment space.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-06-05 07:29:09 +02:00
Chris Packham
84035fccbe ARM: kirkwood: Enforce size limit for sheevaplug
The u-boot binary sits in flash immediately before the environment.
Don't allow the binary size to grow into the environment space.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-06-05 07:29:09 +02:00
Vagrant Cascadian
3789b3dd15 Enable thumb build to reduce build size of u-boot.kwb.
Without this, u-boot.kwb overlaps where the u-boot environment is
stored, and updating the environment can break u-boot and vice versa.

  https://bugs.debian.org/897671
  https://lists.denx.de/pipermail/u-boot/2018-May/327497.html

Signed-off-by: Vagrant Cascadian <vagrant@debian.org>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-06-05 07:29:09 +02:00
Chris Packham
54e3316ffa ARM: kirkwood: SBx81LIFKW: Enable network hardware
The SBx81LIFKW boards connect to the internal chassis management network
via a Marvell 88e6097 L2 switch. The chassis connections are direct
serdes on ports 8 and 9 with a RGMII interface on port 10 connected to
the CPU MAC.

For debugging purposes ports 0 and 1 are also taken out to headers on
the board. Because the debug interfaces are sometimes connected to with
straight ribbon cables we need to run them at 10Mbps.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-06-05 07:29:09 +02:00
Chris Packham
87a62bce28 ARM: add SBx81LIFKW board
This is a series of line cards for Allied Telesis's SBx8100 chassis
switch. The CPU block is common to the SBx81GS24a, SBx81XS6, SBx81XS16
and SBx81GT40 cards collectively referred to as SBx81LIFKW in u-boot.

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-06-05 07:29:09 +02:00
Chris Packham
2c3c6bc6fb ARM: kirkwood: remove automatic I2C config if DM_I2C is enabled
The mach/config.h file would helpfully define CONFIG_SYS_I2C and
CONFIG_SYS_I2C_MVTWSI if CONFIG_CMD_I2C was defined by the board. This
conflicts with the way DM_I2C works. As a transitional measure don't
automatically define these if CONFIG_DM_I2C is defined. It should be
possible to remove this once all kirkwood boards are migrated to DM.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-06-05 07:29:09 +02:00
Michael Walle
134a6b6884 arm: kirkwood: lsxl: Add SPI driver model support
This patch shows how to enable driver model support for the LS-CHLv2 and
LS-XHL boards.

There are a couple of open questions:
 - do I need the u-boot,dm-pre-reloc tags in the device tree?
 - should mach/config.h define CONFIG_DM_SEQ_ALIAS?
 - how can we split this patch or are there any other pending patches
   which does the same and I didn't catch these.

This patch is based on the http://git.denx.de/u-boot-marvell.git (master
branch) and needs the following patches, which are still pending:
  https://patchwork.ozlabs.org/patch/909618/
  https://patchwork.ozlabs.org/patch/909617/
  https://patchwork.ozlabs.org/patch/909973/

Signed-off-by: Michael Walle <michael@walle.cc>
Tested-by: Michael Walle <michael@walle.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-06-05 07:29:09 +02:00
Michael Walle
5886b77942 enable CONFIG_DISTRO_DEFAULTS for LS-CHLv2 board
Synchronize it with the LS-XHL board.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-06-05 07:29:09 +02:00
Jon Nettleton
4ea813d333 arm: mvebu: switch clearfog to use device-tree i2c and gpio
This switches the clearfog boards to use DM based gpio and i2c
drivers.  The io expanders are configured via their device-tree
entries.

Signed-off-by: Jon Nettleton <jon@solid-run.com>
[baruch: add DT i2c aliases]
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-06-05 07:29:09 +02:00
Jon Nettleton
d6db446f70 arm: mvebu: enable sata support for clearfog
The a38x sata interfaces run in ahci mode and can
be accessed via the scsi command.

Signed-off-by: Jon Nettleton <jon@solid-run.com>
[baruch: rebase on current upstream]
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-06-05 07:29:08 +02:00
Rabeeh Khoury
28be54dc59 mvebu: a38x: Force receiver detected on PCIe lanes
Some QCA988x based modules presence is not detected by the SERDES lanes,
so force this detection which will trigger the LTSSM state machine to
negotiate link.

An example of such a card is WLE900VX.

Signed-off-by: Rabeeh Khoury <rabeeh@solid-run.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Tested-by: Chris Packham <judge.packham@gmail.com>
Tested-by: Mario Six <mario.six@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-06-05 07:25:42 +02:00
Tom Rini
ee1855dc52 Prepare v2018.07-rc1
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-06-04 18:08:45 -04:00
Carlo Caione
b1f2b72e39 sf: Add support for gd25q32b gigadevice flash
This flash IC is used in some chromebook models
manufactured by Bitland.

Signed-off-by: Carlo Caione <carlo@endlessm.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-06-04 23:40:04 +05:30
Marek Vasut
8ff4130deb sf: Set current flash bank to 0 in clean_bar()
The clean_bar() function resets the SPI NOR BAR register to 0, but
does not set the flash->curr_bar to 0 , therefore those two can get
out of sync, which could ultimatelly result in corrupted flash content.

The simplest test case is this:

  => mw 0x10000000 0x1234abcd 0x4000
  => sf probe
  => sf erase 0x1000000 0x10000
  => sf write 0x10000000 0x1000000 0x10000

  => sf probe ; sf read 0x12000000 0 0x10000 ; md 0x12000000

That is, erase a sector above the 16 MiB boundary and write it with
random pre-configured data. What will actually happen without this
patch is the sector will be erased, but the data will be written to
BAR 0 offset 0x0 in the flash.

This is because the erase command will call write_bar()+clean_bar(),
which will leave flash->bank_curr = 1 while the hardware BAR registers
will be set to 0 through clean_bar(). The subsequent write will also
trigger write_bar()+clean_bar(), but write_bar checks if the target
bank == flash->bank_curr and if so, does NOT reconfigure the BAR in
the SPI NOR. Since flash->bank_curr is still 1 and out of sync with
the HW, the condition matches, BAR programming is skipped and write
ends up at address 0x0, thus corrupting flash content.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-06-04 23:31:37 +05:30
Ley Foon Tan
6c353674bd spi: cadence_qspi: Change to use devfdt_get_addr_index()
Change to use devfdt_get_addr_index() function to get fdt address.

Original code has compilation warning below:

drivers/spi/cadence_qspi.c: In function ‘cadence_spi_ofdata_to_platdata’:
drivers/spi/cadence_qspi.c:297:18: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
  plat->regbase = (void *)data[0];
                  ^
drivers/spi/cadence_qspi.c:298:18: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
  plat->ahbbase = (void *)data[2];
                  ^
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Acked-by: Marek Vasut <marex@denx.de>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-06-04 23:30:04 +05:30
Tom Rini
358b6a20e4 configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-06-04 11:57:37 -04:00
Ramon Fried
35ada864de MAINTAINERS: Take over DB410c maintainership
Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
2018-06-04 11:25:30 -04:00
Ramon Fried
77e0ecdb4a db410c: Added pre-relocation attribute to pinctrl
u-boot,dm-pre-reloc was missing from pinctrl and it's
children node. causing failure to configure pin mux
before relocation.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
2018-06-04 11:25:30 -04:00
Heinrich Schuchardt
6bfa0367a2 scripts: mailmapper: SPDX license identifier
If the SPDX license identifier is in the first line the shell does not
recognize which interpreter shall be used to execute the script.

Cf. https://www.kernel.org/doc/html/v4.16/process/license-rules.html
for scripts which require the '#!PATH_TO_INTERPRETER' in the first line
(...) the SPDX identifier goes into the second line.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-06-04 11:25:30 -04:00
Vagrant Cascadian
38cad04e2d Inherit default value for bootdelay from distro_bootcmd on odroid-xu3.
The default value with distro_bootcmd is 2 seconds, which is
reasonably fast, and provides a consistent experience across platforms
supporting distro_bootcmd.

The current bootdelay value of 0 seconds is a bit challenging to
interrupt when desired.

Signed-off-by: Vagrant Cascadian <vagrant@debian.org>
Acked-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: Marek Vasut <marex@denx.de>
2018-06-04 11:25:30 -04:00
Vagrant Cascadian
8664ab7deb Set time and umask on multi-dtb fit images to ensure reproducibile builds.
When building compressed (lzop, gzip) multi-dtb fit images, the
compression tool may embed the time or umask in the image.

Work around this by manually setting the time of the source file using
SOURCE_DATE_EPOCH and a hard-coded 0600 umask.

With gzip, this could be accomplished by using -n/--no-name, but lzop
has no current workaround:

  https://bugs.debian.org/896520

Signed-off-by: Vagrant Cascadian <vagrant@debian.org>
2018-06-04 11:25:30 -04:00
Michal Simek
dcd8a102ca xilinx: Sync symbols location in defconfigs
CONFIG_DEBUG_UART_BASE and CONFIG_DEBUG_UART_CLOCK have changed that's
why this sync.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-06-04 11:25:30 -04:00
Tom Rini
809e0e398a Merge branch 'master' of git://git.denx.de/u-boot-sunxi 2018-06-04 08:55:00 -04:00
Jagan Teki
2e8dbe14e7 board: sun50i: Add Amarula A64-Relic initial support
Amarula A64-Relic is A64 based IoT device, which support
- Allwinner A64 Cortex-A53
- Mali-400MP2 GPU
- AXP803 PMIC
- 1GB DDR3 RAM
- 8GB eMMC
- AP6330 Wifi/BLE
- MIPI-DSI
- CSI: OV5640 sensor
- USB OTG
- 12V DC power supply

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-06-04 18:09:25 +05:30
Tom Rini
b5351a4390 SPDX: Fixup tags from latest EFI PR
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-06-03 16:10:22 -04:00
Tom Rini
a0115ceb56 Merge tag 'signed-efi-next' of git://github.com/agraf/u-boot
Patch queue for efi - 2018-06-03

A number of fixes and feature completeness work this time around:

  - Fix sunxi GOP reservation
  - Fix cursor position
  - Fix efi_get_variable
  - Allow more selftest parts to build on x86_64
  - Allow unaligned memory access on armv7
  - Implement ReinstallProtocolInterface
  - More sandbox preparation
2018-06-03 12:27:56 -04:00
Tom Rini
22781fca1d Merge tag 'signed-rpi-next' of git://github.com/agraf/u-boot
Patch queue for rpi - 2018-06-03

This pull request only includes a single patch that was left
out in the last one: A fix to have the fdt stay at its original
location in RAM during boot.
2018-06-03 12:27:42 -04:00
Alexander Graf
80483b2ab6 efi_loader: Fix warning in raw/cols query
The code to determine rows / cols on the screen could potentially run
into a case where it doesn't know how big the screen is. In that case,
assume 80x25.

Signed-off-by: Alexander Graf <agraf@suse.de>
2018-06-03 15:51:19 +02:00
Tuomas Tynkkynen
722742598b rpi: Fix fdt_high & initrd_high for 64-bit builds
The magic value that disables relocation is dependent on the CPU word
size, so the current 'ffffffff' is doing the wrong thing on aarch64.

Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-06-03 15:31:32 +02:00
Heinrich Schuchardt
d29e7824d7 efi_loader: create handles from normal memory
Handles are not used at runtime. They are freed by the firmware when the
last protocol interface is uninstalled. So there is no reason to use EFI
memory when creating handles.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-06-03 15:27:21 +02:00
Heinrich Schuchardt
3282614081 efi_loader: efi_mem_carve_out should return s64
efi_mem_carve_out() is used to remove memory pages from a mapping.
As the number of pages to be removed is a 64bit type the return type
should be 64bit too.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-06-03 15:27:21 +02:00
Heinrich Schuchardt
e09159c867 efi_loader: avoid anonymous constants for AllocatePages
Do not use anonymous constants when calling efi_allocage_pages.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-06-03 15:27:21 +02:00
Ivan Gorinov
fe5bc23f43 efi_selftest: check for buffer overflow in efi_get_variable
Allocate a buffer on the stack instead of an array of uninitialized
pointers; check if GetVariable writes past the end of the buffer.

Signed-off-by: Ivan Gorinov <ivan.gorinov@intel.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-06-03 15:27:21 +02:00
Heinrich Schuchardt
7f474ef6cc Makefile: clean should delete *.so
Files *.so are generated files. So the clean target should delete them.

Reported-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-06-03 15:27:21 +02:00
Heinrich Schuchardt
03fb2691cb efi_selftest: imply FAT, FAT_WRITE
efi_selftest_block_device accesses a FAT file system.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-06-03 15:27:21 +02:00
Heinrich Schuchardt
6b03cd107e efi_loader: DocBook comments for boot services
With 'make htmldocs' we can generate a documentation if the function
comments follow the DocBook conventions.

This patch adjusts the comments for EFI boot services and provides the
DocBook template for the EFI subsystem.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-06-03 15:27:21 +02:00
Simon Glass
896019b18b Add a comment for board_quiesce_devices()
This exported function should have a comment describing what it does. Also
it should really be removed in favour of device_remove(), which handles
this sort of thing now. Add a comment with a TODO.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-06-03 15:27:21 +02:00
Simon Glass
329da4850c Define board_quiesce_devices() in a shared location
This undocumented function relies on arch-specific code to declare a nop
weak version. Add the weak function in common code instead to avoid having
to duplicate the same function in each arch.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-06-03 15:27:21 +02:00
Simon Glass
bb223b7f20 efi: sandbox: Add required linker sections
The EFI loader code requires certain linker sections to exist. Add these
for sandbox so that the EFI loader code will link.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-06-03 15:27:21 +02:00
Simon Glass
30eef21fa0 sandbox: Add a setjmp() implementation
Add an implementation of setjmp() and longjmp() which rely on the
underlying host C library. Since we cannot know how large the jump buffer
needs to be, pick something that should be suitable and check it at
runtime. At present we need access to the underlying struct as well.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-06-03 15:27:21 +02:00
Simon Glass
0864c565a2 efi: Update some comments related to smbios tables
Clarify the operation of this code with some additional comments.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-06-03 15:27:21 +02:00
Heinrich Schuchardt
85b469215f efi_selftest: test unaligned memory access
According to the UEFI spec unaligned memory access should be enabled on
CPUs supporting it.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-06-03 15:27:21 +02:00
Heinrich Schuchardt
78f90aaeec arm: armv7: allow unaligned memory access
The UEFI spec mandates that unaligned memory access should be enabled if
supported by the CPU architecture.

This patch implements the function unaligned_access() to reset the aligned
access flag in the system control register (SCTLR). It is called when the
bootefi command is invoked.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
[agraf: fix SPDX identifier]
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-06-03 15:27:21 +02:00
Heinrich Schuchardt
c3b11dea7c efi_loader: allow unaligned memory access
The UEFI spec mandates that unaligned memory access should be enabled if
supported by the CPU architecture.

This patch adds an empty weak function unaligned_access() that can be
overridden by an architecture specific routine.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-06-03 15:27:21 +02:00
Heinrich Schuchardt
fa241e2f19 efi_selftest: test ReinstallProtocolInterface
Add a test for ReinstallProtocolInterface to the controller selftest.

As ReinstallProtocolInterface has to connect controllers to the new
interface is does not fit to the manage protocols selftest.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-06-03 15:27:21 +02:00
Heinrich Schuchardt
e861a120e7 efi_loader: implement ReinstallProtocolInterface
The ReinstallProtocolInterface boot time service is implemented.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-06-03 15:27:21 +02:00
Heinrich Schuchardt
1f470e1790 efi_loader: check interface when uninstalling protocol
The interface has to be checked in UninstallProtocolInterface.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-06-03 15:27:21 +02:00
Heinrich Schuchardt
0d6ea050cc efi_selftest: correct efi_selftest_manageprotocols
Pass the correct interface when uninstalling a protocol.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-06-03 15:27:20 +02:00
Emmanuel Vadot
d9b63ea987 video: sunxi: de2: Reserve the fb region in the EFI memory map
If compile with support for the efi loader we need to mark the pages
allocated for the framebuffer as reserved so the kernel won't attempt
to use them for other uses.

Signed-off-by: Emmanuel Vadot <manu@freebsd.org>
Acked-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-06-03 15:27:20 +02:00
Ivan Gorinov
d73c8bc052 efi_loader: fix off-by-one bug in efi_get_variable
efi_get_variable() always stores an extra zero byte after the output data.
When the returned data size matches the output buffer size, the extra zero
byte is stored past the end of the output buffer.

Signed-off-by: Ivan Gorinov <ivan.gorinov@intel.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-06-03 15:27:20 +02:00
Heinrich Schuchardt
71cee4ce68 README.uefi: update list of missing functionality
Update the list of missing functionality for boottime and runtime services.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-06-03 15:27:20 +02:00
Heinrich Schuchardt
62217295d7 efi_loader: avoid using unitialized values as console size
If a request for the console size would be answered with a response
with less then three values, uninitialized stack memory would be
copied to the number of rows and columns of the terminal.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-06-03 15:27:20 +02:00
Heinrich Schuchardt
d799c67ad3 efi_selftest: unit test for variable services
Provide a unit test for variable services.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-06-03 15:27:20 +02:00
Heinrich Schuchardt
45c66f9cdf efi_loader: adjust definitions of variable services
The definitons of the variable services are adjusted:
- use efi_uintn_t instead of unsigned long
- use u16 * instead of s16 * for Unicode strings
- correct definition of QueryVariableInfo
- rename efi_get_next_variable to efi_get_next_variable_name

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-06-03 15:27:20 +02:00
Heinrich Schuchardt
e37aa7ada3 efi_selftest: do not call efi_init_obj_list() twice
Remove a superfluous call to efi_init_obj_list() invoked by
'bootefi selftest'.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-06-03 15:27:20 +02:00
Heinrich Schuchardt
c2d9097ac9 Makefile: clean should delete *.efi
Files *.efi are generated files. So the clean target should delete them.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-06-03 15:27:20 +02:00
Heinrich Schuchardt
f2560e2dea efi_loader: build CRT0 and RELOC on x86_64
The efi selftest and the hello application require CRT0 and RELOC to be
built.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-06-03 15:27:20 +02:00
Heinrich Schuchardt
508d856704 efi_selftest: allow building relocation code on x86_64
Variables EFI_RELOC and EFI_CRT0 have to be defined to build the
EFI unit tests. This patch ensures this for the x86 architecure.

If we compile with EFI_STUB, the bitness depends on CONFIG_EFI_STUB_64BIT.
Otherwise the bitness depends on CONFIG_X86_64.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-06-03 15:27:20 +02:00
Heinrich Schuchardt
a4aa7bef3c efi_loader: always check parameters in efi_cout_query_mode()
If we cannot determine the size of the serial terminal we still have
to check the parameters of efi_cout_query_mode().

Querying the size of the serial terminal drains the keyboard buffer.
So make sure we do this during the initialization and not in the midst
of an EFI application.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-06-03 15:27:20 +02:00
Heinrich Schuchardt
f2431415d6 efi_selftest: updating the cursor position
The test case for text output is updated to check correct updating
of the cursor position.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-06-03 15:27:20 +02:00
Heinrich Schuchardt
7ca7c3c0f9 efi_loader: updating the cursor position
The current coding advances the column by the number of UTF-8 bytes.
The column should be increased by one per unicode character.

The UEFI spec provides advance rules for U+0000, U+0008, U+000A,
and U000D. All other characters, including control characters
U+0007 (bel) and U+0009 (tab), have to increase the column by one.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-06-03 15:27:20 +02:00
Heinrich Schuchardt
1f0532ca15 efi_loader: remove unnecessary include
asm/global_data.h is already included via common.h.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-06-03 15:27:20 +02:00
Heinrich Schuchardt
503e04fab8 efi_loader: if EFI_LOADER is enabled, enable CFB_CONSOLE_ANSI
EFI applications like GRUB issue ANSI sequences for setting colors
and for positioning. So if the EFI subsystem is enabled, we should
also enable ANSI control sequences by default.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-06-03 15:27:20 +02:00
Ivan Gorinov
e2dc4229ad efi_loader: correctly apply relocations from the .reloc section
Instead of difference between preferred and actual image base, the
actual base is added to the fields specified in the .reloc section.

Use ImageBase from PE optional header to compute the delta,
exit early if the image is loaded at the preferred address.

Signed-off-by: Ivan Gorinov <ivan.gorinov@intel.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-06-03 15:27:20 +02:00
Tom Rini
040b2583c3 Merge branch 'master' of git://git.denx.de/u-boot-sh 2018-06-02 16:58:27 -04:00
Tom Rini
2a046ff5e9 Merge branch 'master' of git://git.denx.de/u-boot-mips 2018-06-01 16:46:39 -04:00
Tom Rini
582d97b6d3 Merge tag 'xilinx-for-v2018.07-2' of git://www.denx.de/git/u-boot-microblaze
Xilinx changes for v2018.07 second pull

zynqmp:
- Show reset reason
- Remove emulation platform
- Update pmufw version
- Simplify mmc bootmode
- Remove dc2 useless configuration file
- Cleanup mini config
- Defconfig syncup
- zcu100, zcu104 and zcu111 dts fixes

xilinx:
- Use live-tree functions in some drivers
- Add support for Avnet Minized and Antminer S9

fpga:
- Add secure bitstream loading support

mmc:
- Add hs200 mode support

usb xhci:
- Header fix
2018-06-01 13:50:15 -04:00
Álvaro Fernández Rojas
9ca33ebf1c phy: bcm6318-usbh: convert to use live dt
Also fix bad accents in my name.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-06-01 15:56:02 +02:00
Álvaro Fernández Rojas
25d8380f22 phy: bcm6368-usbh: convert to use live dt
Also fix bad accents in my name.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-06-01 15:56:02 +02:00
Álvaro Fernández Rojas
5a1ab87f53 phy: bcm6358-usbh: convert to use live dt
Also fix bad accents in my name.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-06-01 15:56:02 +02:00
Álvaro Fernández Rojas
50d16bcf33 phy: bcm6348-usbh: convert to use live dt
Also fix bad accents in my name.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-06-01 15:56:02 +02:00
Álvaro Fernández Rojas
c444afbbef cpu: bmips: convert to use live dt
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-06-01 15:56:02 +02:00
Álvaro Fernández Rojas
13a7bfe490 ram: bmips: convert to use live dt
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-06-01 15:56:02 +02:00
Álvaro Fernández Rojas
46689a94b2 spi: bcm63xx_hsspi: convert to use live dt
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-06-01 15:56:02 +02:00
Álvaro Fernández Rojas
85e1ddbaf0 spi: bcm63xx_spi: convert to use live dt
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-06-01 15:56:02 +02:00
Álvaro Fernández Rojas
34c0fc3fab power: domain: bcm6328: convert to use live dt
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-06-01 15:56:02 +02:00
Álvaro Fernández Rojas
8994551760 led: bcm6328: convert to use live dt
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-06-01 15:56:02 +02:00
Álvaro Fernández Rojas
a15c16f923 led: bcm6358: convert to use live dt
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-06-01 15:56:02 +02:00
Álvaro Fernández Rojas
e7e64fa0e6 gpio: bcm6345: convert to use live dt
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-06-01 15:56:02 +02:00
Álvaro Fernández Rojas
56d4b706d3 reset: bcm6345: convert to use live dt
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-06-01 15:56:02 +02:00
Álvaro Fernández Rojas
2902997b8b clk: bcm6345: convert to use live dt
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-06-01 15:56:02 +02:00
Álvaro Fernández Rojas
0f56993788 serial: bcm6345: convert to use live dt
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-06-01 15:56:02 +02:00
Álvaro Fernández Rojas
aa8f8250ac watchdog: bcm6345: convert to use live dt
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-06-01 15:56:02 +02:00
Álvaro Fernández Rojas
30a90f56c3 dm: core: add functions to get memory-mapped I/O addresses
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-01 15:56:02 +02:00
Tom Rini
caa2a2e5ab Merge branch 'master' of git://git.denx.de/u-boot-usb 2018-06-01 09:52:15 -04:00
Siva Durga Prasad Paladugu
a18d09ea38 fpga: zynqmp: Add secure bitstream loading for ZynqMP
This patch adds support for loading secure bitstreams on ZynqMP
platforms. The secure bitstream images has to be generated using
Xilinx bootgen tool.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-06-01 11:37:31 +02:00
Siva Durga Prasad Paladugu
cedd48e2cd cmd: fpga: Add support to load secure bitstreams
This patch adds support to load secure bitstreams(authenticated or
encrypted or both). As of now, this feature is added and tested only
for xilinx bitstreams and the secure bitstream was generated using
xilinx bootgen tool, but the command is defined in more generic way.

Command example to load authenticated and device key
encrypted bitstream is as follows
"fpga loads 0 100000 2000000 0 1"

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-06-01 11:37:31 +02:00
Siva Durga Prasad Paladugu
f5953610bf cmd: fpga: Reorder the arguments parsing code
This patch modifies the arguments parsing code by parsing
based on requested operation for fpga loadfs and then
parses the most common/basic args for other fpga load
commands. This makes it easy for new command extensions
or additions especially the commands with more args.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-06-01 11:37:31 +02:00
Marek Vasut
0bb5d24852 ARM: dts: rmobile: Sync R8A77990 Ebisu DTS with Linux
Import the R8A77990 and Ebisu DTS from linux-next to get the latest
version. This makes AVB ethernet work in U-Boot since the ethernet
node is now present in DT, as well as GPIOs.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-06-01 09:47:22 +02:00
Marek Vasut
63e22517a3 ARM: renesas: Add R8A77990 E3 Ebisu board
Add support for the R8A77990 Ebisu board.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-06-01 09:47:21 +02:00
Takeshi Kihara
031fa18f70 ARM: dts: rmobile: Add Renesas Ebisu board support
Basic support for the Renesas Ebisu board based on R-Car E3:
  - Memory,
  - Main crystal,
  - Serial console,

Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
[shimoda: rebase and add SPDX-License-Identifier]
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-06-01 09:47:02 +02:00
Yoshihiro Shimoda
19df5959d0 ARM: dts: rmobile: Add Renesas R8A77990 SoC support
This patch adds basic support for the Renesas R-Car E3 (R8A77990) SoC:
  - PSCI
  - CPU (single)
  - Cache controller
  - Main clocks and controller
  - Interrupt controller
  - Timer
  - PMU
  - Reset controller
  - Product register
  - System controller
  - UART for console

Inspried by a patch by Takeshi Kihara in the BSP.

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-06-01 09:47:02 +02:00
Marek Vasut
a0410a6ff2 ARM: renesas: Add R8A77990 E3 SoC ID
Add ID and Kconfig entry for the Renesas R8A77990 E3 SoC.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-06-01 09:47:02 +02:00
Marek Vasut
34f1dba983 net: ravb: Add R8A77990 E3 compatible
Add new compatible to the Ethernet AVB driver for R8A77990 E3 SoC.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-06-01 09:47:02 +02:00
Marek Vasut
d629152a9a mmc: renesas-sdhi: Add R8A77990 E3 compatible
Add new compatible to the Uniphier SD driver for R8A77990 E3 SoC.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-06-01 09:47:02 +02:00
Marek Vasut
60ae40c29e gpio: rmobile: Add R8A77990 E3 compatible
Add new compatible to the GPIO driver for R8A77990 E3 SoC.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-06-01 09:47:02 +02:00
Marek Vasut
cb13e46aeb pinctrl: renesas: Initial R8A77990 PFC support
This patch adds initial pinctrl driver to support for the R8A77990 SoC.

Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-06-01 09:47:02 +02:00
Takeshi Kihara
634f9f0d30 pinctrl: renesas: Add PORT_GP_11 helper macro
This follows the style of existion PORT_GP_X macros and
will be used by a follow-up patch for the r8a77990 SoC.

Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-06-01 09:47:01 +02:00
Marek Vasut
0d218efe2b clk: renesas: Add R8A77990 E3 clock tables
Add clock tables for R8A77990 E3 SoC .

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-06-01 09:47:01 +02:00
Marek Vasut
716d775286 clk: renesas: Add PE clock handling
The PE clock have two parents, add support for picking the correct
one and deriving the clock from it.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-06-01 09:42:13 +02:00
Marek Vasut
f0f1de75c9 clk: renesas: Add PLL1 and PLL3 dividers
Add and use the PLL1 and PLL3 dividers.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-06-01 09:42:13 +02:00
Marek Vasut
8376e0e6f7 clk: renesas: Pass clock rate around as 64bit number internally
The PLL rate could be in the GHz range, which could overflow a 32bit
data type. Since the hardware is 64bit anyway, pass the clock rates
as 64bit number internally to avoid this.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-06-01 09:42:13 +02:00
Marek Vasut
15e0918285 clk: renesas: Fix swapped arguments in debug message
The mul and div arguments were reported in reverse order in the debug
message, swap them to fix this.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-06-01 09:42:13 +02:00
Marek Vasut
1713dac439 ARM: rmobile: Represent SF partitioning with mtdparts on Stout
Add mtdparts description for the board.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-06-01 09:42:13 +02:00
Marek Vasut
44487f2ee6 ARM: rmobile: Represent SF partitioning with mtdparts on Silk
Add mtdparts description for the board.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-06-01 09:42:13 +02:00
Marek Vasut
0c1562e7ee ARM: rmobile: Represent SF partitioning with mtdparts on Porter
Add mtdparts description for the board.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-06-01 09:42:13 +02:00
Marek Vasut
1b53142bd0 ARM: rmobile: Represent SF partitioning with mtdparts on Lager
Add mtdparts description for the board.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-06-01 09:42:13 +02:00
Marek Vasut
684b34e7c3 ARM: rmobile: Represent SF partitioning with mtdparts on Koelsch
Add mtdparts description for the board.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-06-01 09:42:13 +02:00
Marek Vasut
e4d2232764 ARM: rmobile: Represent SF partitioning with mtdparts on Gose
Add mtdparts description for the board.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-06-01 09:42:13 +02:00
Marek Vasut
e68687bf3c ARM: rmobile: Represent SF partitioning with mtdparts on Alt
Add mtdparts description for the board.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-06-01 09:42:13 +02:00
Marek Vasut
20fccb944b ARM: rmobile: Enable MTD partitioning on Gen2 with SF
Enable MTD partitioning support on Gen2 boards with SPI NORs.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-06-01 09:42:12 +02:00
Tom Rini
c90c43cda8 Merge tag 'arc-updates-for-2018.07-rc1' of git://git.denx.de/u-boot-arc
Here we do a couple of minor fixes like:
 - Move .ivt section to the very beginning of the image
   by default which allows us to use that image put right
   at reset vector (usually 0x0)

 - Improve relocation fix-up which became required once
   we moved .ivt and understood a problem with existing implementation
   where we relied on a particular placement of sections.
   Now we don't care about placement because we just explicitly
   check for .text and in case of ARCompact .ivt sections

 - Re-implemnt do_reset() such that it calls reset_cpu() which
   could implmented for a particular board

And hte most important part we introduce support for yet another
devboard from Synopsys - EMDK.
2018-05-31 14:17:36 -04:00
Alexey Brodkin
2c3f9261c8 ARC: Add support for EM Development Kit board
Synopsys DesignWare ARC EM Development Kit (ARC EMDK) is
an FPGA-based development platform from Synopsys aimed to speed-up
development of software for ARC EM cores and entire subsystems based on
ARC EM like Data Fusion, Secure and Sensor & Control subsystems.

U-Boot is supposed to be used as a primary bootloader on EMDK allowing
users to easily load and start their application from micro-SD card.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-05-31 20:13:29 +03:00
Alexey Brodkin
7af51f12bc ARC: Use elf32-bigarc in case of -EB
As it is stated in LD manual [1] the second entry in OUTPUT_FORMAT
corresponds to "-EB" command-line option which for us is "elf32-bigarc".

[1] https://sourceware.org/binutils/docs/ld/Format-Commands.html#Format-Commands

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-05-31 20:13:29 +03:00
Alexey Brodkin
eb5c853938 ARC: Reset: Implement weak reset_cpu()
This will allow for board-specific implementation of reset.
Default version will just stop execution with help of BRK instruction.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-05-31 20:13:29 +03:00
Alexey Brodkin
8f187142e5 ARC: Reset: Use __builtin_arc_brk() instead of open-coded ASM
For quite some time we have a GCC's built-in which inserts BRK
instruction so let's use it instead of simple insertion of in-line
assembly.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-05-31 20:13:29 +03:00
Alexey Brodkin
ef2cd492ad ARC: Move .ivt section to the very beginning of the image
This is useful for cases when U-Boot image is put in ROM and
reset vector points to 0 where the very beginnign of the image reside.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-05-31 20:13:29 +03:00
Alexey Brodkin
ce3071287e ARC: Improve relocation fix-ups
We used to have the one and only linker script for all ARC boards
and so we relied on a particular order of symbols there.

Because of that we used __ivt_end as the marker of the end of all the
code which won't be true any longer if we move .ivt section to any other
place. That said we'd better check for each section separately.

A couple of other improvements:
 1. There's no point to include the marker of section end in interested
    range because its address is beyond the section, i.e. we should
    compare with "<" but not "<=".

 2. .ivt section for ARCv2 cores is just an array of 32-bit ints and
    they are not swapped even on little-endia cores while in case of
    ARCompact cores .ivt contains valid code so swapping is required.

 3. Just in case add check for ARC600 which is also ARCompact
    and its .ivt is normal code.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-05-31 20:13:29 +03:00
Alexey Brodkin
7530bb2175 ARC: Make sure .ivt section is not purged by garbage collector
Fixes commit fac4790491 ("arc: Eliminate unused code and data with GCC's garbage collector"),
see [1].

Since in case of ARCv2 .ivt only contains addrresses of
interrupt/exception handlers linker doesn't understand that this section
actually make a lot of sense and decides to get rid of it if we use
"--gc-sections".

And KEEP does exactly this, see [2].

[1] http://git.denx.de/?p=u-boot.git;a=commit;h=fac4790491f69b29755d92db2cad508849573ff7
[2] https://sourceware.org/binutils/docs/ld/Input-Section-Keep.html#Input-Section-Keep

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-05-31 20:13:29 +03:00
Alexey Brodkin
d0a5023a35 ARC: Cache: Don't compare I$ and D$ line lengths
We don't care much about I$ line length really as there're
no per-line ops on I$ instead we only do full invalidation of it
on occasion of relocation and right before jumping to the OS.

Also as compared to Linux kernel where we don't support different
lengths of I$ and D$ lines in U-Boot we have to deal with such an
exotic configs if the target board is not supposed to run Linux kernel.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-05-31 20:13:29 +03:00
Alexey Brodkin
b08b113e93 MAINTAINERS: Add board/synopsys/
As of today 'board/synopsys/' folder contains only Synopsys ARC
boards supported by the same people who support 'arch/arc'.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-05-31 19:25:19 +03:00
Tom Rini
680a52c350 tests: Make test_log.py tests depend on cmd_log not log
While the tests in this testcase are for the log subsystem they are only
able to be run if CONFIG_CMD_LOG is enabled as well as CONFIG_LOG, so
update the buildconfigspec requirement.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-31 08:53:11 -04:00
Heinrich Schuchardt
a903c9a04c Remove snapshot.commit
The file is not referenced anywhere.
To display a change log we have the 'git log' command.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-05-31 08:53:11 -04:00
Masahiro Yamada
43c908aaf6 gitignore: remove stale /LOG pattern
The /LOG directory was created by the old MAKEALL tool, which was
deleted by commit c8a3777c51 ("Drop the MAKEALL tool").

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-05-31 08:53:11 -04:00
Heinrich Schuchardt
1aef95a1aa logos: provide U-Boot logo
Provide a logo showing a submarine.

U-Boot currently lacks an icon identifying the project.
The German word U-Boot translates to submarine.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-05-31 08:53:11 -04:00
Eugeniu Rosca
507cef3d15 test: dm: Fix wrong aliases property names
After importing v4.17-rc1 Linux commit 9130ba884640 ("scripts/dtc:
Update to upstream version v1.4.6-9-gaadd0b65c987"), sandbox build
reports below warnings:

arch/sandbox/dts/test.dtb: Warning (alias_paths): /aliases: aliases property name must include only lowercase and '-'
arch/sandbox/dts/test.dtb: Warning (alias_paths): /aliases: aliases property name must include only lowercase and '-'
arch/sandbox/dts/test.dtb: Warning (alias_paths): /aliases: aliases property name must include only lowercase and '-'
arch/sandbox/dts/test.dtb: Warning (alias_paths): /aliases: aliases property name must include only lowercase and '-'

Silent them by applying the 's/_/-/' substitution in the names of the
'fdt_dummy0', 'fdt_dummy1', 'fdt_dummy2', 'fdt_dummy3' properties.

Similar DTC warnings have been recently fixed in Linux kernel, e.g. via
v4.17-rc1 commit d366c30d19f4 ("ARM: dts: STi: Fix aliases property name
for STi boards").

If done alone, the DTS update generates a failure of the
`ut dm fdt_translation` unit test in sandbox environment as seen below:

$ ./u-boot -d arch/sandbox/dts/test.dtb
---<-snip->---
=> ut dm fdt_translation
Test: dm_test_fdt_translation: test-fdt.c
test/dm/test-fdt.c:444, dm_test_fdt_translation(): 0 == uclass_find_device_by_seq(UCLASS_TEST_DUMMY, 0, 1, &dev): Expected 0, got -19
Test: dm_test_fdt_translation: test-fdt.c (flat tree)
test/dm/test-fdt.c:444, dm_test_fdt_translation(): 0 == uclass_find_device_by_seq(UCLASS_TEST_DUMMY, 0, 1, &dev): Expected 0, got -19
Failures: 2
---<-snip->---

Fix this issue in place, by updating the "name" string in the
UCLASS_DRIVER(fdt_dummy) definition, so that it matches the newly
updated aliases properties. After that, the test passes:

$ ./u-boot -d arch/sandbox/dts/test.dtb
---<-snip->---
=> ut dm fdt_translation
Test: dm_test_fdt_translation: test-fdt.c
Test: dm_test_fdt_translation: test-fdt.c (flat tree)
Failures: 0
---<-snip->---

Fixes: e8d5291824 ("core: ofnode: Fix translation for #size-cells == 0")
Reported-by: Petr Vorel <pvorel@suse.cz>
Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-05-31 08:53:11 -04:00
Eugeniu Rosca
82bca3625c scripts/dtc: Re-sync with Linux 4.17-rc4
To achieve a DTC state (more or less) equivalent to Linux 4.17-rc4,
backport the DTC-specific part from below Linux commits:

b23d1a241f4eb4 ("kbuild: add %.lex.c and %.tab.[ch] to 'targets' automatically")
9a8dfb394c0467 ("kbuild: clean up *.lex.c and *.tab.[ch] patterns from top-level Makefile")
59889300274569 (".gitignore: move *.lex.c *.tab.[ch] patterns to the top-level .gitignore")
e039139be8c251 ("scripts/dtc: generate lexer and parser during build instead of shipping")
b24413180f5600 ("License cleanup: add SPDX GPL-2.0 license identifier to files with no license")

With this commit, the diff between Linux and U-boot common DTC files is:
$ git diff --stat --diff-filter=M v4.17-rc4 <this-commit> -- scripts/dtc
  scripts/dtc/.gitignore | 2 +-
  scripts/dtc/Makefile   | 3 +++

The delta is coming from U-boot commits:
* v2017.11 de163ecedb ("scripts: dtc: Add .gitignore")
* v2018.01 15b97f5c5e ("pylibfdt: move pylibfdt to scripts/dtc/pylibfdt and refactor makefile")

Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-05-31 08:53:11 -04:00
Rob Herring
db405d1980 scripts/dtc: Update to upstream version v1.4.6-9-gaadd0b65c987
This adds the following commits from upstream:

aadd0b65c987 checks: centralize printing of property names in failure messages
88960e398907 checks: centralize printing of node path in check_msg
f1879e1a50eb Add limited read-only support for older (V2 and V3) device tree to libfdt.
37dea76e9700 srcpos: drop special handling of tab
65893da4aee0 libfdt: overlay: Add missing license
962a45ca034d Avoid installing pylibfdt when dependencies are missing
cd6ea1b2bea6 Makefile: Split INSTALL out into INSTALL_{PROGRAM,LIB,DATA,SCRIPT}
51b3a16338df Makefile.tests: Add LIBDL make(1) variable for portability sake
333d533a8f4d Attempt to auto-detect stat(1) being used if not given proper invocation
e54388015af1 dtc: Bump version to v1.4.6
a1fe86f380cb fdtoverlay: Switch from using alloca to malloc
c8d5472de3ff tests: Improve compatibility with other platforms
c81d389a10cc checks: add chosen node checks
e671852042a7 checks: add aliases node checks
d0c44ebe3f42 checks: check for #{size,address}-cells without child nodes
18a3d84bb802 checks: add string list check for *-names properties
8fe94fd6f19f checks: add string list check
6c5730819604 checks: add a string check for 'label' property
a384191eba09 checks: fix sound-dai phandle with arg property check
b260c4f610c0 Fix ambiguous grammar for devicetree rule
fe667e382bac tests: Add some basic tests for the pci_bridge checks
7975f6422260 Fix widespread incorrect use of strneq(), replace with new strprefixeq()
fca296445eab Add strstarts() helper function
cc392f089007 tests: Check non-matching cases for fdt_node_check_compatible()
bba26a5291c8 livetree: avoid assertion of orphan phandles with overlays
c8f8194d76cc implement strnlen for systems that need it
c8b38f65fdec libfdt: Remove leading underscores from identifiers
3b62fdaebfe5 Remove leading underscores from identifiers
2d45d1c5c65e Replace FDT_VERSION() with stringify()
2e6fe5a107b5 Fix some errors in comments
b0ae9e4b0ceb tests: Correct warning in sw_tree1.c

Commit c8b38f65fdec upstream ("libfdt: Remove leading underscores from
identifiers") changed the multiple inclusion define protection, so the
kernel's libfdt_env.h needs the corresponding update.

Signed-off-by: Rob Herring <robh@kernel.org>
[ Linux commit: 9130ba884640328bb78aaa4840e5ddf06ccafb1c ]
[erosca: - Fixup conflicts in include/linux/libfdt_env.h caused by v2018.03-rc4
           commit b08c8c4870 ("libfdt: move headers to <linux/libfdt.h>
	   and <linux/libfdt_env.h>")
	 - Fix build errors in lib/libfdt/fdt_ro.c, tools/libfdt/fdt_rw.c by:
	   - s/_fdt_mem_rsv/fdt_mem_rsv_/
	   - s/_fdt_offset_ptr/fdt_offset_ptr_/
	   - s/_fdt_check_node_offset/fdt_check_node_offset_/
	   - s/_fdt_check_prop_offset/fdt_check_prop_offset_/
	   - s/_fdt_find_add_string/fdt_find_add_string_/]
Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-05-31 08:53:11 -04:00
Rob Herring
072a2995bd scripts/dtc: Update to upstream version v1.4.5-6-gc1e55a5513e9
Pickup the fix for handling unresolved phandles in overlays.

This adds the following commits from upstream:

c1e55a5513e9 checks: fix handling of unresolved phandles for dts plugins
f8872e29ce06 tests: Avoid 64-bit arithmetic in assembler
48c91c08bcfa libfdt: add stringlist functions to linker script

Signed-off-by: Rob Herring <robh@kernel.org>
[ Linux commit: e45fe7f788dd1395befe5639149ad8dacfbd94ab ]
Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-05-31 08:53:11 -04:00
Eugeniu Rosca
ceddd3e9a5 board: eets: pdu001: Fix wrong default value in Kconfig
After importing linux v4.16-rc1 commit 2c37e08464a8 ("kconfig: Warn if
choice default is not in choice"), Kconfig complains:

scripts/kconfig/conf  --syncconfig Kconfig
board/eets/pdu001/Kconfig:22:warning:        \
  choice default symbol 'PDU001_RUN_LED_RED' \
  is not contained in the choice

This looks to be caused by a typo. Fix it.

Fixes: 85ab0452fe ("arm: add support for PDU001")
Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com>
Reviewed-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Felix Brack <fb@ltec.ch>
Tested-by: Felix Brack <fb@ltec.ch>
2018-05-31 08:53:11 -04:00
Eugeniu Rosca
e91610da7c kconfig: re-sync with Linux 4.17-rc4
Align Kconfig to Linux 4.17-rc4 with minimal impact on non-kconfig files.

Previous Kconfig sync was done by commit bf7ab1e70f ("kconfig:
re-sync with Linux 4.10") and it achieved almost perfect alignment with
a few (intended) exceptions, caused by below U-boot commits:

[A] v2015.04 5f9eb22075 ("kbuild: remove scripts/multiconfig.sh")
[B] v2015.07 20c20826ef ("Kconfig: Enable usage of escape char '\' in string values")
[C] v2016.01 da58dec866 ("Various Makefiles: Add SPDX-License-Identifier tags")
[D] v2016.03 5b8031ccb4 ("Add more SPDX-License-Identifier tags")
[E] v2016.03 192bc6948b ("Fix GCC format-security errors and convert sprintfs.")

Here is the list of Kconfig commits which followed the v4.10 alignment:

[F] v2018.01 0931ed3c0d ("kconfig/symbol.c: use correct pointer type argument for sizeof")
[G] v2018.03 1414e09b4f ("kconfig: revert change that was not needed for -Wformat-security")
[H] v2018.05 83d290c56f ("SPDX: Convert all of our single license tags to Linux Kernel style")

Commit [F] was subsequently applied to Linux kernel as commit [I]
with the same patch id, so it won't contribute to further misalignment.

[I] v4.15-rc1 88127dae6ed9 ("kconfig/symbol.c: use correct pointer type argument for sizeof")

Commit [G] is a Kconfig-specific revert of commit [E].
Commit [H] relocated and reformatted the license doing no functional change.

In summary, the only functional change that makes U-boot Kconfig
diverge from Linux Kconfig is commit [B]. After a brief analysis,
the purpose of [B] seems to be placing "\n" literals in string symbols
like CONFIG_AUTOBOOT_PROMPT="autoboot in %d seconds\n" in order to pass
them directly to printf and expect correct output at runtime. Currently,
Linux doesn't seem to have this requirement, so for the moment [B] looks
like a U-boot specific feature/fix. From point of view of further Kconfig
alignment and backporting efforts, it is highly desired that commits
like [B] are propagated to Linux and any Kconfig fixes/features are
contributed to Linux kernel first. This specific Kconfig re-sync just
keeps [B] in place.

Contrary to 4.10 Kconfig re-sync (which achieves zero non-kconfig
changes), 4.17-rc4 re-sync does some amount of updates in Kbuild
(striving to keep them at minimum), due to a number of reasons:
* Kbuild is affected by the removal of Kconfig "*shipped" files and now
  requires flex and bison pre-installed on the host.
* PYTHON{2,3} variables are defined in top-level Makefile as
  prerequisite for running the newly developed Kconfig unit tests.
* silentoldconfig becomes an "internal implementation detail" deprecated
  for external use, being renamed to syncconfig.

The exact non-kconfig files touched by this commit are:

$ git show --format="" --stat -- ':!scripts/kconfig'
 .gitignore             |  2 ++
 Makefile               |  9 +++++++--
 scripts/Makefile.build | 11 +++++++++++
 scripts/Makefile.lib   | 41 ++++++++++++-----------------------------

The imported Linux commits touching the above files are:

c054be10ffdbd5   ("remove gperf left-overs from build system")
73a4f6dbe70a1b   ("kbuild: add LEX and YACC variables")
033dba2ec06c47   ("kbuild: prepare to remove C files pre-generated by flex and bison")
eea199b445f64c   ("kbuild: remove unnecessary LEX_PREFIX and YACC_PREFIX")
e71de5ee08dcb0   ("kbuild: remove remaining use of undefined YACC_PREFIX")
d59fbbd09d5d6b   ("kbuild: replace hardcoded bison in cmd_bison_h with $(YACC)")
911a91c39cabcb H ("kconfig: rename silentoldconfig to syncconfig")
59889300274569   (".gitignore: move *.lex.c *.tab.[ch] patterns to the top-level .gitignore")
9a8dfb394c0467   ("kbuild: clean up *.lex.c and *.tab.[ch] patterns from top-level Makefile")
833e622459432e H ("genksyms: generate lexer and parser during build instead of shipping")
b23d1a241f4eb4 H ("kbuild: add %.lex.c and %.tab.[ch] to 'targets' automatically")
e9781b52d4e0e3 H ("kbuild: add PYTHON2 and PYTHON3 variables")

The commits marked with 'H' are assessed as "hard" (build will fail)
prerequisites and the rest of them are assessed as "soft" prerequisites
for the re-sync. In spite of relatively high number of non-H commits,
they belong to this Kconfig update topic-wise and decrease the number of
cherry pick conflicts for many commits in this series. Additional effort
can be put in eliminating the soft prerequisites, if really needed.

The commits which contributed to this Kconfig re-sync are listed below.
Whenever a conflict resolution has been performed (mostly by hand, but
sometimes automatically by git), it is revealed by the '!' sign in the
second column, which means a patch id mismatch between Linux and U-boot
commits:

9be3213b14d44f   ("gconfig: remove misleading parentheses around a condition")
ff85a1a80e0034   ("kconfig: Check for libncurses before menuconfig")
ad8181060788c8   ("kconfig: fix sparse warnings in nconfig")
cb77f0d623ff33 ! ("scripts: Switch to more portable Perl shebang")
bb3290d91695bb ! ("Remove gperf usage from toolchain")
c054be10ffdbd5   ("remove gperf left-overs from build system")
b24413180f5600 ! ("License cleanup: add SPDX GPL-2.0 license identifier to files with no license")
9059a3493efea6 ! ("kconfig: fix relational operators for bool and tristate symbols")
2c37e08464a850   ("kconfig: Warn if choice default is not in choice")
33ca1a24866373   ("kconfig: Document the 'menu' struct")
52aede4ba5efd1   ("kconfig: Document the 'symbol' struct")
c873443430ebd1   ("kconfig: Sync zconf.y with zconf.tab.c_shipped")
9a826842ff2fbd   ("kconfig: Rename menu_check_dep() to rewrite_m()")
fa8cedaef814ce   ("kconfig: Clarify expression rewriting")
f77850d3fe0c96   ("kconfig: Clean up modules handling and fix crash")
e3b03bf29d6b99   ("kconfig: display recursive dependency resolution hint just once")
73a4f6dbe70a1b ! ("kbuild: add LEX and YACC variables")
033dba2ec06c47 ! ("kbuild: prepare to remove C files pre-generated by flex and bison")
29c833061c1d8c   ("kconfig: generate lexer and parser during build instead of shipping")
26e47a3c11a25c   ("kconfig: Don't leak symbol names during parsing")
24161a6711c945   ("kconfig: Don't leak 'source' filenames during parsing")
bc28fe1d5ede88   ("kconfig: Don't leak 'option' arguments during parsing")
0724a7c32a54e3   ("kconfig: Don't leak main menus during parsing")
ae7440ef0c8013   ("kconfig: Fix automatic menu creation mem leak")
5b1374b3b3c2fc   ("kconfig: Fix expr_free() E_NOT leak")
7cf33f88e29410   ("kconfig: Fix choice symbol expression leak")
05cccce580456d   ("kconfig: Document automatic submenu creation code")
0735f7e5def2ab   ("kconfig: Document important expression functions")
df60f4b92d3d0b   ("kconfig: Remove menu_end_entry()")
b92d804a51796b   ("kconfig: drop 'boolean' keyword")
6479f327dea60d   ("kconfig: Warn if there is more than one help text")
52e58a3caeba5d   ("kconfig: make input_mode static")
5a3dc717b3c785   ("kconfig: make xfgets() really static")
84dd95d4f87a0d   ("kconfig: make conf_unsaved a local variable of conf_read()")
765f4cdef6f80d   ("kconfig: use default 'yy' prefix for lexer and parser")
eea199b445f64c   ("kbuild: remove unnecessary LEX_PREFIX and YACC_PREFIX")
e71de5ee08dcb0   ("kbuild: remove remaining use of undefined YACC_PREFIX")
d59fbbd09d5d6b ! ("kbuild: replace hardcoded bison in cmd_bison_h with $(YACC)")
3e41ba05b6d60c   ("kconfig: Document SYMBOL_OPTIONAL logic")
d3465af60f4471   ("kconfig: Clarify choice dependency propagation")
9d1a9e8bc18bea   ("kconfig: Document 'if' flattening logic")
b53688014e3325   ("kconfig: Clarify menu and 'if' dependency propagation")
d0fd0428ecf04b   ("kconfig: fix make xconfig when gettext is missing")
312ee68752faaa   ("kconfig: announce removal of oldnoconfig if used")
1ccb27143360bd   ("kconfig: make "Selected by:" and "Implied by:" readable")
cedd55d49dee94 ! ("kconfig: Remove silentoldconfig from help and docs; fix kconfig/conf's help")
1b9eda2e4892cb   ("kconfig: Warn if help text is blank")
cb67ab2cd2b8ab   ("kconfig: do not write choice values when their dependency becomes n")
4f208f392103e8   ("kconfig: show '?' prompt even if no help text is available")
cd58a91def2acc   ("kconfig: remove 'config*' pattern from .gitignnore")
d2a04648a5dbc3   ("kconfig: remove check_stdin()")
f3ff6fb5db68bc   ("kconfig: echo stdin to stdout if either is redirected")
9e3e10c725360b   ("kconfig: send error messages to stderr")
d717f24d8c6808   ("kconfig: add xrealloc() helper")
523ca58b7db2e3   ("kconfig: remove const qualifier from sym_expand_string_value()")
cd81fc82b93fa4   ("kconfig: add xstrdup() helper")
f4bc1eefc1608e   ("kconfig: set SYMBOL_AUTO to the symbol marked with defconfig_list")
bf0bbdcf100322   ("kconfig: Don't leak choice names during parsing")
1a90ce36c6eff6   ("kconfig: Update ncurses package names for menuconfig")
5ae6fcc4bb82bd   ("kconfig: fix line number in recursive inclusion error message")
07a422bb213adb ! ("kbuild: restore autoksyms.h touch to the top Makefile")
9a47ceec543bfb   ("kconfig: clean-up reverse dependency help implementation")
d9119b5925a03b   ("kconfig: Print reverse dependencies in groups")
f467c5640c29ad   ("kconfig: only write '# CONFIG_FOO is not set' for visible symbols")
59a80b5e892dde   ("kconfig: do not call check_conf() for olddefconfig")
4bb3a5b085cd6f   ("kconfig: remove unneeded input_mode test in conf()")
99f0b6578bab44   ("kconfig: remove redundant input_mode test for check_conf() loop")
2aad9b89621386   ("kconfig: hide irrelevant sub-menus for oldconfig")
81d2bc2273052e   ("kconfig: invoke oldconfig instead of silentoldconfig from local*config")
911a91c39cabcb ! ("kconfig: rename silentoldconfig to syncconfig")
2a61625835c7c8 ! ("kconfig: remove redundant streamline_config.pl prerequisite")
022a4bf6b59dfd   ("kconfig: tests: add framework for Kconfig unit testing")
1903c511905984   ("kconfig: tests: add basic choice tests")
49ac3c0c3aa3b7   ("kconfig: tests: test automatic submenu creation")
b76960c0f6b25d   ("kconfig: tests: test if new symbols in choice are asked")
930c429a656fdb   ("kconfig: tests: check unneeded "is not set" with unmet dependency")
ee236610653ede   ("kconfig: tests: check visibility of tristate choice values in y choice")
beaaddb625400e   ("kconfig: tests: test defconfig when two choices interact")
3e4888c2e3d77d   ("kconfig: tests: test randconfig for choice in choice")
29c434f367ea7b   ("kconfig: tests: test if recursive dependencies are detected")
e2c75e7667c737   ("kconfig: tests: test if recursive inclusion is detected")
f622f827958162   ("kconfig: warn unmet direct dependency of tristate symbols selected by y")
f8f69dc0b4e070   ("kconfig: make unmet dependency warnings readable")
26561514cc9def   ("kconfig: do not include both curses.h and ncurses.h for nconfig")
32a94b8b0c3e5a   ("kconfig: remove duplicated file name and lineno of recursive inclusion")
379a8eb8eb1a55   ("kconfig: detect recursive inclusion earlier")
18492685e479fd   ("kconfig: use yylineno option instead of manual lineno increments")
59889300274569 ! (".gitignore: move *.lex.c *.tab.[ch] patterns to the top-level .gitignore")
9a8dfb394c0467 ! ("kbuild: clean up *.lex.c and *.tab.[ch] patterns from top-level Makefile")
833e622459432e ! ("genksyms: generate lexer and parser during build instead of shipping")
b23d1a241f4eb4 ! ("kbuild: add %.lex.c and %.tab.[ch] to 'targets' automatically")
17baab68d337a0   ("kconfig: extend output of 'listnewconfig'")
e9781b52d4e0e3 ! ("kbuild: add PYTHON2 and PYTHON3 variables")

The current Kconfig update generates below build-time warnings:
  YACC    scripts/dtc/dtc-parser.tab.h
scripts/dtc/dtc-parser.y: warning: 3 shift/reduce conflicts [-Wconflicts-sr]
  YACC    scripts/dtc/dtc-parser.tab.c
scripts/dtc/dtc-parser.y: warning: 3 shift/reduce conflicts [-Wconflicts-sr]

This seems to happen because the Kbuild updates apparently didn't make
room for both "*shipped"-based builds and flex/bison-based builds. A
similar problem has been reported for genksyms parser in v4.17-rc1
commit 833e622459432e ("genksyms: generate lexer and parser during build
instead of shipping"). I have figured out empirically that the warnings
are healed after updating the in-tree U-boot DTC to upstream v1.4.6-9,
same as done by Linux v4.17-rc1 commit 9130ba88464032 ("scripts/dtc:
Update to upstream version v1.4.6-9-gaadd0b65c987"). Whether fixing the
DTC-related yacc warnings should be done together with the Kconfig
re-sync, I would like to hear from community.

My testing was limited to:
- make defconfig all
- make ARCH=arm CROSS_COMPILE=aarch64-linux-gnu- r8a7795_ulcb_defconfig all
- comparing .config before and after the re-sync
- running the newly imported Kconfig unit tests as seen below:

$ make testconfig
Tested-by: Petr Vorel <petr.vorel@gmail.com>

============================= test session starts =============================
scripts/kconfig/tests/auto_submenu/__init__.py::test PASSED             [  7%]
scripts/kconfig/tests/choice/__init__.py::test_oldask0 PASSED           [ 14%]
scripts/kconfig/tests/choice/__init__.py::test_oldask1 PASSED           [ 21%]
scripts/kconfig/tests/choice/__init__.py::test_allyes PASSED            [ 28%]
scripts/kconfig/tests/choice/__init__.py::test_allmod PASSED            [ 35%]
scripts/kconfig/tests/choice/__init__.py::test_allno PASSED             [ 42%]
scripts/kconfig/tests/choice/__init__.py::test_alldef PASSED            [ 50%]
scripts/kconfig/tests/choice_value_with_m_dep/__init__.py::test PASSED  [ 57%]
scripts/kconfig/tests/err_recursive_inc/__init__.py::test PASSED        [ 64%]
scripts/kconfig/tests/inter_choice/__init__.py::test PASSED             [ 71%]
scripts/kconfig/tests/new_choice_with_dep/__init__.py::test PASSED      [ 78%]
scripts/kconfig/tests/no_write_if_dep_unmet/__init__.py::test PASSED    [ 85%]
scripts/kconfig/tests/rand_nested_choice/__init__.py::test PASSED       [ 92%]
scripts/kconfig/tests/warn_recursive_dep/__init__.py::test PASSED       [100%]
========================== 14 passed in 0.34 seconds ==========================

Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com>
Reviewed-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Tested-by: Petr Vorel <petr.vorel@gmail.com>
2018-05-31 08:53:11 -04:00
Siva Durga Prasad Paladugu
843337089e mmc: zynqmp: Add HS200 modes support for ZynqMP
This patch adds HS200 suuport for ZynqMP and enables
the same for ZC1751 DC1 board which has eMMC on it.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-31 13:50:39 +02:00
Siva Durga Prasad Paladugu
434f9d454e mmc: sdhci: Update sdhci_send_command() to handle HS200
This patch updates sdhci_send_command() to handle MMC
HS200 tuning command.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-31 13:50:39 +02:00
Rajan Vaja
ecb4d7481e arm64: zynqmp: Add TTC clocks
PS clock(LPD_APB_CLK) is default clock for TTC. Add this clock
entry in TTC nodes.

Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-31 13:50:39 +02:00
Michal Simek
f0d56145d9 arm64: zynqmp: Disable WP on zcu111
On this board there is SD slot without WP connected.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-31 13:50:39 +02:00
Michal Simek
3e98a9c416 arm64: zynqmp: Remove broken-cd from zcu100-revC
Card detect bit was broken on revA and it is working fine with revC
board that's why this property can be removed.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-31 13:50:39 +02:00
Michal Simek
ce236dce56 arm64: zynqmp: Fix address for tca6416_u97 chip on zcu104
I2c address is not 0x21 but 0x20. This patch is fixing both revA and
revC boards.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-31 13:50:39 +02:00
Michal Simek
3705dae164 arm64: zynqmp: Add ina226 to zcu104 revC
Add new ina226 chip present on i2c bus which wasn't on revA.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-31 13:50:39 +02:00
Ezequiel Garcia
c66f5620e6 arm: zynq: Add support for Bitmain Antminer S9 control board
This is control board on Bitmain Antminer S9.
There are 3 board variables with 256MB, 512MB and 1024MB DDR.
DDR memory is automatically detected with using get_with using
get_ram_size().

Bitmain is using 16MB space for FPGA which is handled via
reserved-memory. Also U-Boot is allocating 16B for storing bootcounts.
Watchdog is started but never service in U-Boot.

SPL MMC is working. SPL NAND is not working because it is not supported
as of now.

Signed-off-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>
Signed-off-by: Michal Simek <monstr@monstr.eu>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-31 13:50:39 +02:00
Michal Simek
5dd84a3fbd arm64: zynqmp: Sync defconfigs with latest Kconfig layout
Sync defconfigs.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-31 13:50:39 +02:00
Ibai Erkiaga
7483969c55 arm: zynq: Add initial support for Avnet MiniZed
Initial support for Avnet MiniZed board. Tested UART1 (serial console),
QSPI(Flash), SDHCI1 (eMMC), USB.

Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-31 13:50:39 +02:00
Michal Simek
95d565fdc2 arm64: zynqmp: Remove CMD_UNZIP for mini configuration
CMD_UNZIP is already disabled via Kconfig.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-31 13:50:39 +02:00
Michal Simek
35f051ab66 arm64: zynqmp: Remove empty configuration file
There is no reason to keep empty config file in the tree that's why
remove it.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-31 13:50:39 +02:00
Michal Simek
72b88103bb timer: cadence: Use live-tree functions
Use live-tree functions.

Reported-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-05-31 13:50:39 +02:00
Michal Simek
f01ef0ae63 watchdog: cadence: Use live-tree functions
Use live-tree functions.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-05-31 13:50:39 +02:00
Michal Simek
458e8d8071 mmc: zynq: Use live-tree functions
Use live-tree functions.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-05-31 13:50:39 +02:00
Michal Simek
ce69030eb9 serial: zynq: Use live-tree functions
Use live-tree functions.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-05-31 13:50:39 +02:00
Michal Simek
2882b39d56 arm64: zynqmp: Setup the first boot_target at run time
Detect mmc alias at run time for setting up proper boot_targets sequence.
The first target has to correspond with boot mode.

The purpose of this patch is to get rid of CONFIG_ZYNQ_SDHCI0/1
parameters in full U-Boot.
Unfortunately this patch can't remove it because there is missing
mmc implementation for SPL_DM_SEQ_ALIAS.

Also xilinx_zynqmp.h only setup boot commands for mmc0 and mmc1.
It means using aliases with higher number won't work. But switching
between mmc0 and mmc1 should work properly.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Alexander Graf <agraf@suse.de>
2018-05-31 13:50:39 +02:00
Rajan Vaja
6189f76ae8 soc: zynqmp: Update required API version to 1.0
Existing EEMI version is to as 1.0 (available from xilinx v2018.1
version). Update required API version to match with EEMI API version.

New PMUFW version is required for operations with programmable logic.

Signed-off-by: Rajan Vaja <rajanv@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-31 13:50:39 +02:00
Michal Simek
8dd94a8fe5 arm64: zynqmp: Get rid of emulation platforms
ZynqMP emulation platforms are no longer tested and supported that's why
remove macros and code around.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-31 13:50:39 +02:00
Michal Simek
d348beaa63 arm64: zynqmp: Show reset reason
Read reset reason reg and show it in log and also save it as variable.
Clearing reset reason when it is read to show only one status

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-31 13:50:39 +02:00
Michal Simek
b168591c89 usb: xhci: zynqmp: Fix header location
There is no reason to specify header with full soc name.
Symlink is setup automatically (arch -> arch-zynqmp)

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-31 13:50:39 +02:00
Tom Rini
8ada17dde8 Merge branch 'master' of git://git.denx.de/u-boot-spi
- Fix a conflict in drivers/spi/atcspi200_spi.c related to the riscv
  tree fixing a warning.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-30 14:51:37 -04:00
Tom Rini
964d4f7211 Merge git://git.denx.de/u-boot-riscv 2018-05-30 08:43:04 -04:00
Alex Kiernan
277b1333b7 fastboot: Update fastboot documentation
Update fastboot documentation to reflect merged USB/UDP implementation.

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-05-30 11:59:21 +02:00
Alex Kiernan
65c96757fe usb: fastboot: Convert USB f_fastboot to shared fastboot
Convert USB fastboot code to use shared fastboot protocol.

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-05-30 11:59:21 +02:00
Alex Kiernan
3845b9065f fastboot: Add support for 'oem format' command
Introduce 'oem format' which matches the USB implementation, guard this
with CONFIG_FASTBOOT_CMD_OEM_FORMAT so that you can configure it out.

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-05-30 11:59:21 +02:00
Alex Kiernan
f73a7df984 net: fastboot: Merge AOSP UDP fastboot
Merge UDP fastboot support from AOSP:

  https://android.googlesource.com/platform/external/u-boot/+/android-o-mr1-iot-preview-8

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
Signed-off-by: Alex Deymo <deymo@google.com>
Signed-off-by: Jocelyn Bohr <bohr@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-05-30 11:59:21 +02:00
Alex Kiernan
c232d14d11 mmc: Separate "mmc swrite" from fastboot
Introduce CONFIG_IMAGE_SPARSE and CONFIG_CMD_MMC_SWRITE so the "mmc
swrite" command is separated from the fastboot code.

Move image-sparse from common to lib so it's clear it's library code.

Rename CONFIG_FASTBOOT_FLASH_FILLBUF_SIZE to CONFIG_IMAGE_SPARSE_FILLBUF_SIZE
and migrate it to Kconfig.

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
Acked-by: Jassi Brar <jaswinder.singh@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-05-30 11:59:21 +02:00
Alex Kiernan
4085b90303 fastboot: Migrate FASTBOOT_FLASH_NAND_TRIMFFS to Kconfig
Add FASTBOOT_FLASH_NAND_TRIMFFS to Kconfig; note there are no in-tree
users of it.

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-05-30 11:59:21 +02:00
Alex Kiernan
0d488e8f50 fs: Add fs_get_type_name to return current filesystem name
Add fs_get_type_name so we can get the current filesystem type.

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
2018-05-30 11:59:21 +02:00
Alex Kiernan
413b90777f ti: fastboot: Move weak overrides to board files
Overriding fastboot_set_reboot_flag() in arch/arm/mach-omap2/boot-common.c
leaves it applying all boards that derive from this, not just the ones which
have support for Android bootloader flow. Move the weak function override to
the relevant board files.

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-05-30 11:59:21 +02:00
Alex Kiernan
d1a119d4f0 fastboot: Rename public fb_ functions to fastboot_
Rename fb_mmc_flash_write/fb_mmc_erase/fb_nand_flash_write/fb_nand_erase to
fastboot_... as they form a public interface

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-05-30 11:59:21 +02:00
Alex Kiernan
1a28d38c39 fastboot: Extract common definitions from USB fastboot
Move FASTBOOT_VERSION to include/fastboot.h so when we merge the UDP code
we only have one definition.

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-05-30 11:59:21 +02:00
Alex Kiernan
8a65bd6372 fastboot: Rename fb_set_reboot_flag to fastboot_set_reboot_flag
Rename fb_set_reboot_flag to fastboot_set_reboot_flag so it matches
all other fastboot code in the global name space. Fix the guards around
them so that they're dependent on FASTBOOT, not just USB_FUNCTION_FASTBOOT.

Move the weak implementation of fastboot_set_reboot_flag to fb_common.c
so we can call it from non-USB fastboot code.

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-05-30 11:59:21 +02:00
Alex Kiernan
52fdf10708 fastboot: Fix parameter types in _fb_nand_write
Compiling on a 64 bit target the arguments to _fb_nand_write are
incompatible:

  drivers/fastboot/fb_nand.c: In function ‘_fb_nand_write’:
  drivers/fastboot/fb_nand.c:101:42: warning: passing argument 3 of ‘nand_write_skip_bad’ from incompatible pointer type [-Wincompatible-pointer-types]
    return nand_write_skip_bad(mtd, offset, &length, written,
                                          ^
  In file included from drivers/fastboot/fb_nand.c:16:0:
  include/nand.h:107:5: note: expected ‘size_t * {aka long unsigned int *}’ but argument is of type ‘unsigned int *’
   int nand_write_skip_bad(struct mtd_info *mtd, loff_t offset, size_t *length,
       ^~~~~~~~~~~~~~~~~~~

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-05-30 11:59:21 +02:00
Alex Kiernan
08f6bec456 fastboot: Remove FIXME for CONFIG_FASTBOOT_...NAME
CONFIG_FASTBOOT_GPT_NAME and CONFIG_FASTBOOT_MBR_NAME are always defined
by Kconfig if you're compiling this code, so remove these redundant
defaults.

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-05-30 11:59:21 +02:00
Alex Kiernan
1ad5facbdd fastboot: Add missing newlines
Add newlines so we format our output correctly.

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Jocelyn Bohr <bohr@google.com>
2018-05-30 11:59:21 +02:00
Alex Kiernan
42d8dd4424 fastboot: Correct dependencies in FASTBOOT_FLASH
Ensure that when selecting FASTBOOT_FLASH you end up with a buildable
configuration. Prior to this you could select NAND without MTDPARTS
and end up with an image which (surprisingly) excluded NAND.

Also fix dependencies on FASTBOOT_GPT_NAME/FASTBOOT_MBR_NAME which require
you have EFI_PARTITION/DOS_PARTITION enabled.

Delete redundant FASTBOOT_FLASH_NAND_DEV from Kconfig - it was only ever
used as a guard and the value was ignored in all cases, we're using
FASTBOOT_FLASH_NAND as the guard now.

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
2018-05-30 11:59:21 +02:00
Alex Kiernan
d2df2abbcd fastboot: Extract fastboot_okay/fail to fb_common.c
Add drivers/fastboot/fb_common.c, where fastboot_okay/fail are implemented
so we can call them from a non-USB implementation.

Introduce fastboot_response which takes varargs parameters so we can
use it to generate formatted response strings. Refactor fastboot_okay/fail
to use it.

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
2018-05-30 11:59:21 +02:00
Alex Kiernan
c4ded03ef6 fastboot: Refactor fastboot_okay/fail to take response
Add the response string as a parameter to fastboot_okay/fail, instead
of modifying a global, to match the contract expected by the AOSP
U-Boot code.

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
2018-05-30 11:59:21 +02:00
Alex Kiernan
312a10f16b fastboot: Move fastboot to drivers/fastboot
Separate CMD_FASTBOOT from FASTBOOT and move code and configuration to
drivers/fastboot.

Switch dependencies on FASTBOOT to USB_FUNCTION_FASTBOOT as anyone who wants
FASTBOOT before this series wants USB_FUNCTION_FASTBOOT. Split
USB_FUNCTION_FASTBOOT from FASTBOOT so they retain their existing
behaviour.

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-05-30 11:59:21 +02:00
Seung-Woo Kim
6aae84769a gadget: f_thor: Fix memory leaks of usb request and its buffer
There are memory leaks of usb request and its buffer for ep0,
in_ep, and out ep. Fix memory leaks of usb request and its buffer.

Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
2018-05-30 11:59:21 +02:00
Philipp Tomsich
afa314d3a3 rockchip: xhci: remove DTS parsing for PHY (which is unused)
The xhci wrapper-driver for Rockchip searches the DTS to find its
child node compatbile with 'rockchip,rk3399-usb3-phy' to retrieve the
base-address of the PHY.  However, this is currently broken (and
always has been), returning NULL.  However, the (wrongly) retrieved
base-address is never used.

We thus remove this code for now.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-05-30 11:59:10 +02:00
Bin Meng
e40406603f usb: xhci: Handle endianness in xhci_set_configuration()
In xhci_set_configuration(), 'Context Entries' field in the slot
context was cleared with mask LAST_CTX_MASK, but it should have
taken the endianness into consideration.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2018-05-30 11:59:10 +02:00
Bin Meng
eaaefb066c usb: xhci: Fix config fail of FS hub behind a HS hub with MTT
If a full speed hub connects to a high speed hub which supports MTT,
the MTT field of its slot context will be set to 1 when xHCI driver
setups an xHCI virtual device in xhci_setup_addressable_virt_dev().
Once usb core fetch its hub descriptor, and need to update the xHC's
internal data structures for the device, the HUB field of its slot
context will be set to 1 too, meanwhile MTT is also set before, this
will cause configure endpoint command fail. In the case, we should
clear MTT to 0 for full speed hub according to section 6.2.2.

This keeps in sync with Linux kernel commit:
  096b110: usb: xhci: fix config fail of FS hub behind a HS hub with MTT

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2018-05-30 11:59:10 +02:00
Bin Meng
ae751b060e usb: xhci: Initialize dev_state to 0 in the input slot context
Per xHCI spec chapter 6.2.2 table 6-7, as input, software shall
initialize the dev_state field to '0'. Though this does not seem
to cause any issue with most xHC implementations, let's do this
to conform with the spec.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Marek Vasut <marek.vasut@gmail.com>
Tested-by: Matthias Blankertz <matthias.blankertz@cetitec.com>
2018-05-30 11:59:10 +02:00
Bin Meng
793c819c6e usb: xhci: Set accurate add context flags when updating hub attributes
If a USB 3.0 hub is plugged into the root port of the xHC, the xHCI
driver will issue a 'Configure Endpoint' command to the xHC for it
to update its internal data structure for this hub device. The hub
attributes are in the slot context so we need tell xHC to update the
slot context by setting the add context flags of the input control
context to only cover the slot context.

At present the add context flags is or'ed with the slot context bit,
but it should really be accurately set to the slot context, as the
variable that holds the value of the add context flags comes from
whatever was set in the last command execution, which may contain
additional contexts that 'Configure Endpoint' command should not
touch. Some xHC implementations like x86 don't complain such, but
it was observed on Renesas RCar Gen3 platform that the RCar xHC
complains with a 'TRB error' completion codes as the response.

Reported-by: Marek Vasut <marek.vasut@gmail.com>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Marek Vasut <marek.vasut@gmail.com>
Tested-by: Matthias Blankertz <matthias.blankertz@cetitec.com>
2018-05-30 11:59:10 +02:00
Matthias Blankertz
3f48422679 usb: xhci-rcar: deregister before deactivating clock
During the execution of xhci_deregister xHCI registers are accessed. If
the clock is already deactivated when xhci_deregister is called this can
lead to undefined behavior. Change the order to deregister the device
before deactivating the clock.

Signed-off-by: Matthias Blankertz <matthias.blankertz@cetitec.com>
2018-05-30 11:59:10 +02:00
Rick Chen
6ffea11b89 travis.yml: Support RISC-V 64-bit
Fix riscv: ax25-ae350 build fail problem
https://travis-ci.org/trini/u-boot/jobs/385147373

...
Building current source for 1 boards (1 thread, 2 jobs per thread)
     riscv:  +   ax25-ae350
+arch/riscv/cpu/ax25/start.S: Assembler messages:
+arch/riscv/cpu/ax25/start.S:48: Error: unrecognized opcode `sd a2,0(t0)'
+arch/riscv/cpu/ax25/start.S:112: Error: unrecognized opcode `ld t5,0(t0)'
...

After apply the commit
configs: ax25-ae350: Set 64-bit as default configuration

Toolchain shall be also setuped with 64-bit in .travis.yml.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Reviewed-by: Chih-Mao Chen <cmchen@andestech.com>
Cc: Greentime Hu <green.hu@gmail.com>
2018-05-30 16:21:30 +08:00
Tom Rini
9c2369a554 Merge git://git.denx.de/u-boot-marvell 2018-05-29 11:01:46 -04:00
Tom Rini
add7aa9f97 Merge branch 'master' of git://git.denx.de/u-boot-ubi 2018-05-29 11:01:43 -04:00
Ramon Fried
f035526624 mach-snapdragon: increase size of malloc pool
Pool size must be increased to support new additionals
drivers.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
2018-05-29 11:01:37 -04:00
Ramon Fried
e9a1b65293 db820c: add dummy clock for uart node
The missing clock causes serial_msm driver probe to fail.
Added a dummy node so the probe succeeds, as the clock init
currently in db820c is empty.

Fixes: 11d59fe537 ("serial: serial_msm: fail probe if settings clocks fails")

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
2018-05-29 11:01:34 -04:00
Alex Deymo
643cefa4d8 Import Android's dt_table.h for DT image format
Android documentation defines the recommended image format for storing
DTB/DTBO files in a single dtbo.img image. This patch includes the
latest header file with the struct definitions for this format from
AOSP.

The header was adapted to U-Boot's coding style and the function
declarations were removed.

Signed-off-by: Alex Deymo <deymo@google.com>
[trini: Change SDPX tag location]
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-29 11:00:59 -04:00
Chris Packham
e85f490a47 configs: remove CONFIG_SYS_MVFS
This was being used by some Marvell boards to enable some file system
related features (many of which have already been moved to Kconfig).
Make the future migration of the final 2 or 3 config options easier by
expanding #define CONFIG_SYS_MVFS into the options that it enables and
remove CONFIG_SYS_MVFS.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-05-29 10:37:52 +02:00
Rick Chen
9171ab8836 mtd: ftsmc020: Drop unsed code
ftsmc020_init is not used anymore.
So it can be removed.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Cc: Greentime Hu <green.hu@gmail.com>
2018-05-29 14:45:04 +08:00
Rick Chen
44199ebc80 board: ax25-ae350: Support cfi flash
Add smc_init() to get register base from dts and
deal with atfsmc020 controler initialzation job.

Write protect is enabled by default. So WP shall
be disabled when startup, then cfi flash can be
detected and erasing and writing can be executed.

Adp-ae3xx and adp-ag101p both do smc initilize job
in lowlevel_init.S and get register base fron
CONFIG_FTSMC020_BASE. They also can be moved those
codes to board stage. Remind them as todo jobs.
After that CONFIG_FTSMC020_BASE can be removed.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Cc: Greentime Hu <green.hu@gmail.com>
2018-05-29 14:45:04 +08:00
Rick Chen
7286e46a79 riscv: dts: Support cfi flash
Add nor node for cfi-flash driver and smc node
for smc(aftsmc020) controller.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Cc: Greentime Hu <green.hu@gmail.com>
2018-05-29 14:45:04 +08:00
Rick Chen
c038fd0ea6 configs: ax25-ae350: Support cfi flash
Enable cfi flash driver and setup flash
parameters to support parallel nor flash
which type is JS28F00A-M29EWH.

Verification:
Size detection, data read, erase and write are all ok.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Cc: Greentime Hu <green.hu@gmail.com>
2018-05-29 14:45:03 +08:00
Rick Chen
cf3922dddc mmc: ftsdc010_mci: Sync compatible with DT mmc node
The compatible string of ftsdc010_mci.c is different from
the mmc driver in Linux Kernel. Modify it for consistency.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Cc: Greentime Hu <green.hu@gmail.com>
2018-05-29 14:45:03 +08:00
Rick Chen
c14e90e844 riscv: dts: Sync DT with Linux Kernel
Use same dts to boot U-Boot and RISC-V
Linux Kernel v4.16-rc2 in ax25-ae350 platform.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Cc: Greentime Hu <green.hu@gmail.com>
2018-05-29 14:45:03 +08:00
Rick Chen
28b52a6fb7 net: ftmac100: Fix compiler warning
Fix warnings as below when compile in 64-bit.

warning: cast from pointer to integer
of different size [-Wpointer-to-int-cast]

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Cc: Greentime Hu <green.hu@gmail.com>
2018-05-29 14:45:03 +08:00
Rick Chen
6083cf3883 spi: atcspi200: Fix compiler warning
Fix warning as below when compile in 64-bit.

warning: format '%u' expects argument of type
'unsigned int', but argument 6 has type 'size_t
{aka long unsigned int}

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Cc: Greentime Hu <green.hu@gmail.com>
2018-05-29 14:45:03 +08:00
Rick Chen
a2ed0dc866 configs: ax25-ae350: Set 64-bit as default configuration
Set 64-bit as default configuration for ax25-ae350.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Cc: Greentime Hu <green.hu@gmail.com>
2018-05-29 14:45:02 +08:00
Rick Chen
f981e66ed4 doc: ae250: Rename as ae350
Rename
 nx25 as ax25
 ae250 as ae350
 nx25-ae250 as ax25-ae350
 including filename, variable, string and definition.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Cc: Greentime Hu <green.hu@gmail.com>
2018-05-29 14:45:02 +08:00
Rick Chen
0b1a1adaeb configs: nx25-ae250:Rename as ax25-ae350
Rename
 nx25 as ax25
 ae250 as ae350
 nx25-ae250 as ax25-ae350
 including filename, variable, string and definition.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Cc: Greentime Hu <green.hu@gmail.com>
2018-05-29 14:45:02 +08:00
Rick Chen
28c6cf2677 board: nx25-ae250: Rename as ax25-ae350
Rename
 nx25 as ax25
 ae250 as ae350
 nx25-ae250 as ax25-ae350
 including filename, variable, string and definition.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Cc: Greentime Hu <green.hu@gmail.com>
2018-05-29 14:45:02 +08:00
Rick Chen
6f4dd62f33 riscv: cpu: nx25: Rename as ax25
Andes has rearranged the product combinations.
nx25 and ax25 both are RISC-V architecture cpu core.
But ax25 has MMU unit inside, and nx25 is not.

Cpu nx25 and platform ae250 are arranged in pairs.
Cpu ax25 and platform ae350 are arranged in pairs.

This patch will rename
nx25 as ax25
ae250 as ae350
nx25-ae250 as ax25-ae350
including filename, variable, string and definition.

Then u-boot can boot linux kernel in ae350
platform reasonably.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Cc: Greentime Hu <green.hu@gmail.com>
2018-05-29 14:45:02 +08:00
Rick Chen
7215787c4e SPDX: Convert single license tags to Linux Kernel style
Fix license tags problem after apply patchs about
riscv: Enable efi_loader support.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Cc: Greentime Hu <green.hu@gmail.com>
2018-05-29 14:44:21 +08:00
Rick Chen
6836adbe75 efi_loader: Enable RISC-V support
We have almost all pieces needed to support RISC-V UEFI binaries in place already.
The only missing piece are ELF relocations for runtime code and
data.

This patch adds respective support in the linker script and the runtime
relocation code. It also allows users to enable the EFI_LOADER configuration
switch on RISC-V platforms.

Signed-off-by: Alexander Graf <agraf@suse.de>
2018-05-29 14:43:12 +08:00
Alexander Graf
0979f7ce1e riscv: nx25: Enable distro boot
Distro boot allows for a common boot path on systems that allow distributions
to easily boot from a default configuration.

This patch enables distro boot for the nx25-ae250. Hopefully this can serve
as a good example for new boards, so they enable it as well.

Signed-off-by: Alexander Graf <agraf@suse.de>
2018-05-29 14:43:12 +08:00
Alexander Graf
2c6903fa7b distro: Extend with RISC-V defines
While we don't have UEFI naming conventions for RISC-V file paths yet,
we need to search for something. So let's copy the removable file paths
from the RISC-V edk2 port.

Also add the official VCI strings that contain the standardized RISC-V
architecture ID fields.

Signed-off-by: Alexander Graf <agraf@suse.de>
2018-05-29 14:43:12 +08:00
Alexander Graf
89aea43642 efi_loader: Use EFI_CACHELINE_SIZE in the image loader too
We were using our EFI_CACHELINE_SIZE define only in the runtime service
code, but left the image loader to use plain CONFIG_SYS_CACHELINE_SIZE.

This patch moves EFI_CACHELINE_SIZE into efi_loader.h and converts
the image loader to use it.

Signed-off-by: Alexander Graf <agraf@suse.de>
2018-05-29 14:43:12 +08:00
Alexander Graf
b66babda45 riscv: Add board_quiesce_devices stub
This patch adds an empty stub for board_quiesce_devices() which allows boards
to quiesce their devices before we boot into an OS in a platform agnostic way.

Signed-off-by: Alexander Graf <agraf@suse.de>
2018-05-29 14:43:12 +08:00
Alexander Graf
493d1e88b6 riscv: Add EFI application infrastructure
The hello world binary and a few selftests require to build EFI target
binaries, not just the EFI host environment.

This patch adds all required files to generate an EFI binary for
RISC-V.

Signed-off-by: Alexander Graf <agraf@suse.de>
2018-05-29 14:43:12 +08:00
Alexander Graf
6cc1a2af46 riscv: Enable function sections
The linker can remove sections that are never addressed, so it makes a lot
of sense to declare every function as an individual section.

This reduces the output U-Boot code size by ~30kb for me.

Signed-off-by: Alexander Graf <agraf@suse.de>
2018-05-29 14:43:12 +08:00
Alexander Graf
a7f99e5dd7 riscv: Add setjmp/longjmp code
To support efi_loader we need to have platform support for setjmp/longjmp.
Add it here.

Signed-off-by: Alexander Graf <agraf@suse.de>
2018-05-29 14:43:12 +08:00
Chris Packham
bba769d3ae configs: remove redundant comment sections
mv-common.h and mv-plug-common.h still had comments delimiting sections
of configuration options that have all been moved to Kconfig by previous
treewide efforts. Remove the redundant comment sections.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-05-29 08:33:05 +02:00
Chris Packham
a14b601652 configs: remove empty #ifdef block from mv-common.h
The last option guarded by this ifdef was removed in commit 68d5342017
("sf: Move SPI flash drivers to defconfig"). Remove the now empty
ifdef/endif block and the associated comment.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-05-29 08:33:05 +02:00
Ken Ma
6d7ea6d31a arm64: mvebu: defconfig: enable CONFIG_AHCI_MVEBU
This patch enables the new ahci mvebu driver for marvell arm64 platform
SOCs(A3k and A8k). And since AHCI_MVEBU selects SCSI_AHCI, so
"CONFIG_SCSI_AHCI=y" is removed from those default config files.

Signed-off-by: Ken Ma <make@marvell.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-05-29 08:33:05 +02:00
Ken Ma
6ac8538b0b ata: ahci_mvebu: add scsi support
Mvebu AHCI is AHCI driver which uses SCSI under the hood.
This patch adjusts AHCI setup to support SCSI by creating
a SCSI device as a child. Since the functions of creating
SCSI device need the kconfig option DM_SCSI, so let
AHCI_MVEBU select DM_SCSI.

Signed-off-by: Ken Ma <make@marvell.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-05-29 08:33:05 +02:00
David Sniatkiwicz
329dd3244f ata: ahci_mvebu: a8040 a0: remove bad port register offsets workarounds
This workaround was added for A8040/7040 A0.
A8040/7040 A0 is no longer supported so this workaround
can be removed.

Signed-off-by: David Sniatkiwicz <davidsn@marvell.com>
Signed-off-by: Ken Ma <make@marvell.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-05-29 08:33:05 +02:00
Ken Ma
592b4a7e97 ata: mvebu: move mvebu sata driver to drivers/ata directory
Currently mvebu sata driver is in arch/arm/mach_mvebu directory, this
patch moves it to drivers/ata directory with renaming "sata.c" to
"ahci_mvebu.c" which is aligned to Linux.
New ahci driver's kconfig option is added as AHCI_MVEBU which selects
SCSI_AHCI and is based on AHCI.

Signed-off-by: Ken Ma <make@marvell.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-05-29 08:33:05 +02:00
Konstantin Porotchkin
61dccf73d3 dts: mvebu: a80x0: Enable SD/eMMC interfaces
Enable SDHCI interface on AP and CP0 in A80x0 DTS files

Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Evan Wang <xswang@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-05-29 08:33:05 +02:00
Konstantin Porotchkin
f5db5979df mvebu: pinctrl: Add SD/eMMC PHY selector to the driver
When the pin control driver selects SD/eMMC function for
a pin group, there is additional configuration to be done
for this case - switch the PHY to work with SDHCI interface.
This patch adds the missing functionality into the pin
control driver.

Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Evan Wang <xswang@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-05-29 08:33:05 +02:00
Evan Wang
f246648d37 mvebu: pinctrl: sync compatible string with Linux 4.17-rc4
For pinctrl driver of mvebu, the compatible strings
supported are defined differently from Linux version.
The patch aligned the compatible string with
Linux 4.17-rc4.

Signed-off-by: Evan Wang <xswang@marvell.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-05-29 08:33:05 +02:00
Chris Packham
17afbbf944 ARM: kirkwood: Add device-tree for keymile
Import the dts files from Linux 4.17 and enable CONFIG_OF_CONTROL.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-05-29 08:33:03 +02:00
Chris Packham
04f5785ae3 ARM: kirkwood: Add device-tree for netspace & inetspace
Import the dts files from Linux 4.17 and enable CONFIG_OF_CONTROL.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-05-29 08:33:03 +02:00
Chris Packham
4a54e54c97 ARM: kirkwood: Add device-tree for lschlv2 & lsxhl
Import the dts files from Linux 4.17 and enable CONFIG_OF_CONTROL.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-05-29 08:33:03 +02:00
Chris Packham
6220ed46b5 ARM: kirkwood: Add device-tree for ds109
Import the dts files from Linux 4.17 and enable CONFIG_OF_CONTROL.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-05-29 08:33:03 +02:00
Chris Packham
4bb0dea519 ARM: kirkwood: Add device-tree for dreamplug
Import the dts file from Linux 4.17 and enable CONFIG_OF_CONTROL.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-05-29 08:33:03 +02:00
Chris Packham
fbe502e9ab ARM: kirkwood: Add device-tree for d2net_v2 & net2big_v2
Import the dts files from Linux 4.17 and enable CONFIG_OF_CONTROL.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-05-29 08:33:03 +02:00
Marek Behún
58d6f68e75 board: turris_mox: Add fixed regulator support to defconfig
Without this USB3 won't work in U-Boot.

Signed-off-by: Marek Behun <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-05-29 08:33:03 +02:00
Marek Vasut
a2569f12f0 sf: Add Macronix MX25U25635F ID
Add ID for the Macronix MX25U25635F flash.

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-05-29 10:05:52 +05:30
Marek Vasut
d8c16849a9 sf: Add Winbond W25Q256 ID
Add ID for the Winbond W25Q256 flash.

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-05-29 10:05:32 +05:30
Jagan Teki
dcdd595619 configs: orangepi-prime: Enable USB OTG peripheral mode
Enable USB_MUSB_GADGET which operate OTG in peripheral mode

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Jun Nie <jun.nie@linaro.org>
2018-05-28 16:40:43 +05:30
Jagan Teki
82843d8d52 arm64: allwinner: h5: orangepi-prime: Sync usb otg nodes from Linux
orangepi-prime has usb otg routed host with either EHCI0/OHCI0
sync the same from Linux.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Jun Nie <jun.nie@linaro.org>
2018-05-28 16:40:43 +05:30
Jagan Teki
937ddf2cdc configs: orangepi-pc2: Enable USB OTG peripheral mode
Enable USB_MUSB_GADGET which operate OTG in peripheral mode

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Jun Nie <jun.nie@linaro.org>
2018-05-28 16:40:43 +05:30
Jagan Teki
84c569ca2c arm64: allwinner: h5: orangepi-pc2: Sync usb otg nodes from Linux
orangepi-pc2 has usb otg routed host with either EHCI0/OHCI0
sync the same from Linux.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Jun Nie <jun.nie@linaro.org>
2018-05-28 16:40:43 +05:30
Jagan Teki
0107cd4ca7 arm64: allwinner: h5: orangepi-pc2: Order nodes in alphabetic
Order sun50i-h5-orangepi-pc2.dts nodes in alphabetic

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Jun Nie <jun.nie@linaro.org>
2018-05-28 16:40:43 +05:30
Jagan Teki
c9e27e0dd6 configs: bananapi-m2-plus: Enable USB OTG peripheral mode
Enable USB_MUSB_GADGET which operate OTG in peripheral mode

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Jun Nie <jun.nie@linaro.org>
2018-05-28 16:40:43 +05:30
Jagan Teki
426a234f5c ARM: dts: sun8i-h3: bananapi-m2-plus: Sync usb otg nodes from Linux
Bananapi-m2-plus has usb otg routed host with either EHCI0/OHCI0
sync the same from Linux.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Jun Nie <jun.nie@linaro.org>
2018-05-28 16:40:43 +05:30
Jagan Teki
90dd2756a0 arm64: allwinner: a64: bananapi-m64: Sync usb host nodes from Linux
Sync bananapi-m64 usb host nodes from Linux.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Jun Nie <jun.nie@linaro.org>
2018-05-28 16:40:43 +05:30
Jagan Teki
b622e5a373 ARM: dts: sun8i: a83t: Sync usbphy node from Linux
Sync sun8i-a83t usbphy node details from Linux.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Jun Nie <jun.nie@linaro.org>
2018-05-28 16:40:43 +05:30
Jagan Teki
aa64dc94d8 configs: bananapi-m64: Enable USB OTG peripheral mode
Enable USB_MUSB_GADGET which operate OTG in peripheral mode

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Jun Nie <jun.nie@linaro.org>
2018-05-28 16:40:43 +05:30
Jagan Teki
737fd73010 arm64: allwinner: a64: bananapi-m64: Sync usb_otg node from Linux
Sync bananapi-m64 usb_otg node from Linux.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Jun Nie <jun.nie@linaro.org>
2018-05-28 16:40:43 +05:30
Jun Nie
96c04aab58 sunxi: h3: Sync OTG and HCI nodes from Linux DT
Allwinner H3 have a dual-routed USB PHY0 -- routed to either OHCI/EHCI
or MUSB controller.

Signed-off-by: Jun Nie <jun.nie@linaro.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Acked-by: Jun Nie <jun.nie@linaro.org>
2018-05-28 16:40:43 +05:30
Jagan Teki
f5871a66fd sunxi: Drop legacy usb_phy.c
Allwinner PHY USB code is now part of generic-phy framework,
so drop existing legacy handling like arch/arm/mach-sunxi.c
and related code areas.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Jun Nie <jun.nie@linaro.org>
2018-05-28 16:40:43 +05:30
Jagan Teki
dd3228170a usb: sunxi: Switch to use generic-phy
Allwinner USB PHY handling can be done through driver-model
generic-phy so add the generic-phy ops to relevant places
on host and musb sunxi driver and enable them in respective
SOC's.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Jun Nie <jun.nie@linaro.org>
2018-05-28 16:40:43 +05:30
Jagan Teki
aa29b11b3f phy: sun4i-usb: Add a sunxi specific function for setting squelch-detect
The sunxi otg phy has a bug where it wrongly detects a high speed squelch
when reset on the root port gets de-asserted with a lo-speed device.

The workaround for this is to disable squelch detect before de-asserting
reset, and re-enabling it after the reset de-assert is done. Add a sunxi
specific phy function to allow the sunxi-musb glue to do this.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Jun Nie <jun.nie@linaro.org>
2018-05-28 16:40:43 +05:30
Jagan Teki
237050fc62 board: sunxi: Use generic-phy for board_usb_cable_connected
Allwinner PHY USB code is now part of generic-phy framework,
so use it in board_usb_cable_connected.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Jun Nie <jun.nie@linaro.org>
2018-05-28 16:40:43 +05:30
Jagan Teki
85187b8073 device-tree-bindings: phy: Sync sun4i-usb-phy bindings
Sync sun4i-usb-phy bindings from Linux, since the
drivers/phy/allwinner/phy-sun4i-usb.c follow similar.

Sync changes from Linux with below commit:
"phy: sun4i-usb: add support for R40 USB PHY"
(sha1: f3d96f8d23d8e6d0b7642ee946b9b2ac3418fb4d)

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Jun Nie <jun.nie@linaro.org>
2018-05-28 16:40:43 +05:30
Jagan Teki
194ccb9a34 phy: sun4i-usb: Add A23 USB PHY config
Allwinner A23 has 2 USB PHY's and 0x04 has phy ctrl offset.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Jun Nie <jun.nie@linaro.org>
2018-05-28 16:40:43 +05:30
Jagan Teki
61bf0ed5db phy: sun4i-usb: Add A33 USB PHY config
Allwinner A33 has 2 USB PHY's and 0x10 has phy ctrl offset.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Jun Nie <jun.nie@linaro.org>
2018-05-28 16:40:43 +05:30
Jagan Teki
bf986d1f60 phy: sun4i-usb: Add A31 PHY config
Allwinner A31 has 3 USB PHY's and rest similar to A10.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Jun Nie <jun.nie@linaro.org>
2018-05-28 16:40:43 +05:30
Jagan Teki
7f90b557c9 phy: sun4i-usb: Add A10/A13/A20 PHY config
Add PHY configs for Allwinner A10/A13/A20 which are SUN4I.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Jun Nie <jun.nie@linaro.org>
2018-05-28 16:40:43 +05:30
Jagan Teki
5f646bf1d7 phy: sun4i-usb: Add A83T USB PHY config
Unlike, other Allwinner SUN4I Phy supporting SOC, A83T has
2 USB PHY's and second one is HSIC. So phy control need to
configure to handle these HSIC and SIDDQ requirement.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Jun Nie <jun.nie@linaro.org>
2018-05-28 16:40:43 +05:30
Jagan Teki
bafe5e3061 phy: sun4i-usb: Add V3S PHY config
V3S has 1 USB PHY, rest are similar to A64.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Jun Nie <jun.nie@linaro.org>
2018-05-28 16:40:43 +05:30
Jagan Teki
43519c4da7 phy: sun4i-usb: Add H3/H5 PHY config
H3/H5 has 4 USB PHY, rest are similar to A64.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Jun Nie <jun.nie@linaro.org>
2018-05-28 16:40:43 +05:30
Jagan Teki
129c45c728 phy: sun4i-usb: Add id_detect and vbus_detect ops
ID and VBUS detection code require when musb changing
between Host and/or Peripheral modes.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Jun Nie <jun.nie@linaro.org>
2018-05-28 16:40:43 +05:30
Jagan Teki
6768594326 phy: Add Allwinner A64 USB PHY driver
USB PHY implementation for Allwinner SOC's can be handling
in to single driver with different phy configs.

This driver handle all Allwinner USB PHY's start from 4I to
50I(except 9I). Currently added A64 compatibility more will
add in next coming patches.

Current implementation is unable to get pinctrl, clock and reset
details from DT since the dm code on these will add it future.

Driver named as phy-sun4i-usb.c since the same PHY logic
work for all Allwinner SOC's start from 4I to A64 except 9I
with different phy configurations.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Jun Nie <jun.nie@linaro.org>
2018-05-28 16:40:43 +05:30
Jagan Teki
223278c6c9 musb: sunxi: Add support for H3/H5/A64
Like other Allwinner SoC, the H3/H5/A64 is missing the config register
from the musb hardware block. Use a known working value for it
like other SoC.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Jun Nie <jun.nie@linaro.org>
2018-05-28 16:40:43 +05:30
Chen-Yu Tsai
fef73766d9 sunxi: clock: Fix OHCI clock gating for H3/H5
Clock gating bits on H43/H5 were wrong, fix them.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Jun Nie <jun.nie@linaro.org>
2018-05-28 16:40:43 +05:30
Jagan Teki
5c5fe883e0 musb: sunxi: Use BIT instead of numerical shift
Use BIT is possible areas instead of numerical shift.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Jun Nie <jun.nie@linaro.org>
2018-05-28 16:40:43 +05:30
Jagan Teki
9d12a82ed3 musb: sunxi: Add OTG device clkgate and reset for H3/H5
Add OTG device clkgate and reset for H3/H5 through driver_data.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Jun Nie <jun.nie@linaro.org>
2018-05-28 16:40:43 +05:30
Jagan Teki
26fc4d6c51 sunxi: clock: Fix clock gating for H3/H5/A64
clock gating bits on a64 are different than H3_H5, so fixed
only required bits on clock_sun6i.h.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Jun Nie <jun.nie@linaro.org>
2018-05-28 16:40:43 +05:30
Jagan Teki
97202dd6ec musb: sunxi: Add fifo config
Unlike other Allwinner SOC's H3/H5/V3s OTG support 4 endpoints
with relevant fifo configs, rest all have 5 endpoints.
So add the fifo configs and defer them based on driver_data.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Jun Nie <jun.nie@linaro.org>
2018-05-28 16:40:43 +05:30
Jagan Teki
98424b7031 musb: sunxi: Use simple way to fill musb_hdrc pdata
Filling musb_hdrc pdata using structure will unnecessary
add extra ifdefs, so fill them inside probe call for
better code understanding and get rid ifdefs using
devicetree compatible.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Jun Nie <jun.nie@linaro.org>
2018-05-28 16:40:43 +05:30
Jagan Teki
ae8b78de30 musb: sunxi: Add proper macros instead of numericals
- add proper macros for musb_config members
- use bool 'true' for multipoint and dyn_fifo instead of numerical 1

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Jun Nie <jun.nie@linaro.org>
2018-05-28 16:40:43 +05:30
Jagan Teki
831cc98b1f usb: sunxi: Simplify ccm reg base code
Move struct sunxi_ccm_reg pointer to private structure
so-that accessing ccm reg base become more proper way
and avoid local initialization in each function.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Jun Nie <jun.nie@linaro.org>
2018-05-28 16:40:43 +05:30
Kelvin Cheung
c3c8638804 add FIT data-position & data-offset property support
Add FIT data-position & data-offset property support for bootm,
which were already supported in SPL.

Signed-off-by: Kelvin Cheung <keguang.zhang@gmail.com>
2018-05-26 18:19:19 -04:00
Ley Foon Tan
ee038c58d5 malloc: Use malloc simple before malloc is fully initialized in memalign()
Follow implementation in mALLOc(). Check GD_FLG_FULL_MALLOC_INIT flag and use
malloc_simple if GD_FLG_FULL_MALLOC_INIT is unset. Adjust the malloc bytes
to align with the requested alignment.

The original memalign() function will access mchunkptr struct to adjust the
alignment if there is misalignment happen, but mchunkptr struct is not being
initialized before full malloc is initialized. This cause the system crash.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Reviewed-by: Marek Vasut <marek.vasut@gmail.com>
2018-05-26 18:19:19 -04:00
Patrice Chotard
635159a090 mmc: stm32_sdmmc2: Fix stm32_sdmmc2_start_cmd()
SDMMC_CMD_CPSMEN bit is wrongly check and set in
SDMMC_ARG register instead of SDMMC_CMD register.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-05-26 18:19:19 -04:00
Patrick Delaunay
7f7deb0c72 stm32mp1: use OTP to configure MAC address and serial number
Use OTP57 and 58 for MAC address
- OTP57 = MAC address  bits [31:0]
- OTP58 = MAC address  bit  [47:32] stored in OTP  LSB's

Use manufacture information in OTP13 to OTP15 to build unique
chip id saved in env variable "serial#"
(used for USB device enumeration)

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-05-26 18:19:18 -04:00
Patrick Delaunay
c3600e1f92 stm32mp1: add FUSE command support
Add support of fuse command (read/write/program/sense)
on bank 0 to access to BSEC SAFMEM (4096 OTP bits).

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-05-26 18:19:18 -04:00
Patrick Delaunay
19f589923a stm32mp1: add bsec driver
Add a MISC driver with read and write access to BSEC IP
(Boot and Security and OTP control)
- offset 0: shadowed values
- offset 0x80000000: OTP fuse box values (SAFMEM)

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-05-26 18:19:18 -04:00
Patrick Delaunay
de20e43794 stm32mp1: remove the second TAMP_BOOT_CONTEXT update
The register TAMP_BOOT_CONTEXT is already updated in
get_bootmode() in cpu.c and no need to be done
twice.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-05-26 18:19:18 -04:00
Patrick Delaunay
320d266368 stm32mp1: Allow to activate CONFIG_DEBUG_UART
Add the needed information to enable the debug uart
to have printf before the serial driver probe
(so before probe for clock, pincontrol and reset drivers)

To enable the debug on uart 4 (default console):
+ CONFIG_DEBUG_UART=y
+ CONFIG_DEBUG_UART_STM32=y

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-05-26 18:19:18 -04:00
Patrick Delaunay
bc709a41ca serial: stm32: Add setparity support
Add possibility to update the serial parity used.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-05-26 18:19:18 -04:00
Patrick Delaunay
eae4764f1a dm: serial: Add setparity
Implements serial setparity ops to allow uart parity change.
It allows to select ODD, EVEN or NONE parity.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-05-26 18:19:17 -04:00
Patrice Chotard
be1a6f775e serial: stm32: Fix bits defines name
Rename USART_ISR_FLAG_xxx bits to USART_ISR_xxx bits and
USART_ICR_OREF to USART_ICR_ORECF in order to match datasheets.
Sort defines by descendant order.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-05-26 18:19:17 -04:00
Patrick Delaunay
215c8bed12 serial: stm32: Add debug uart support
Add support for early debug printf, before the availability of
driver model and device tree support.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-05-26 18:19:17 -04:00
Radoslaw Pietrzyk
246a5e5fc2 ram: stm32_sdram: Adds stm32f429-disco fixes for HardFault at booting
- adds reading FMC swap setting from DTB to SDRAM driver
- sets FMC swap for stm32f429-disco board
- changes ram start address to 0x90000000

Signed-off-by: Radoslaw Pietrzyk <radoslaw.pietrzyk@gmail.com>
Acked-by: Patrice Chotard <patrice.chotard@st.com>
2018-05-26 18:19:17 -04:00
Ramon Fried
b460b889e2 serial: serial_msm: added pinmux & config
Serial port configuration was missing from previous implementation.
It only worked because it was preconfigured by LK.
This patch configures the uart for 115200 8N1.
It also configures the pin mux for uart pins using DT bindings.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
2018-05-26 18:19:17 -04:00
Ramon Fried
9558ddab96 db410: added pinctrl node and serial bindings
Added TLMM pinctrl node for pin muxing & config.
Additionally, added a serial node for uart.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
2018-05-26 18:19:16 -04:00
Ramon Fried
ad97051b7f mach-snapdragon: Introduce pinctrl driver
This patch adds pinmux and pinctrl driver for TLMM
subsystem in snapdragon chipsets.
Currently, supporting only 8016, but implementation is
generic and 8096 can be added easily.

Driver is using the generic dt-bindings and doesn't
introduce any new bindings (yet).

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-05-26 18:19:16 -04:00
Ramon Fried
640dc34942 mach-snapdragon: Fix UART clock flow
UART clock enabling flow was wrong.
Changed the flow according to downstream implementation in LK.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
2018-05-26 18:19:11 -04:00
Ramon Fried
7e5ad796bc serial: serial_msm: initialize uart only before relocation
The uart is already initialized prior to relocation,
reinitialization after relocation is unnecessary.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-05-26 12:46:50 -04:00
Ramon Fried
11d59fe537 serial: serial_msm: fail probe if settings clocks fails
Failure to set the clocks will causes data abort exception when
trying to write to AHB uart registers.
This patch ensures that we don't touch these registers if clock
setting failed.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-05-26 12:46:50 -04:00
Ramon Fried
ffada23ca7 db820c: set clk node to be probed before relocation
The clock and serial nodes are needed before relocation.
This patch ensures that the msm-serial driver will probe
and provide uart output before relocation.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-05-26 12:46:50 -04:00
Chris Packham
0ed34aa741 Remove CONFIG_MVGBE from config_whitelist.txt
Now that there are more boards defining this it can be removed from the
whitelist.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-05-26 12:46:50 -04:00
Tuomas Tynkkynen
5ce9aca8a6 PCI: Document pciauto_region_allocate()
Add a doc comment for pciauto_region_allocate().

Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-05-26 12:46:50 -04:00
Tuomas Tynkkynen
d71975ae6e PCI: autoconfig: Don't allocate 64-bit addresses to 32-bit only resources
Currently, if we happen to allocate an address requiring 64 bits to a
device only supporting 32-bit BARs, the address eventually gets silently
truncated to 32 bits. Avoid this by adding a new flag to
pciauto_region_allocate() to bail out in such situations.

Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-05-26 12:46:50 -04:00
Tuomas Tynkkynen
ed12a89d07 PCI: Add newlines to debug prints in pci_auto_common.c
All of the debug output from this file is squished to one line. Fix
it.

Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-05-26 12:46:50 -04:00
Tuomas Tynkkynen
9792be7d93 doc: qemu-arm: Drop highmem=off references
Now that U-Boot works fine with highmem enabled, there is no need to
tell users to disable highmem.

Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-05-26 12:46:50 -04:00
Tuomas Tynkkynen
f37770c770 ARM: qemu-arm: Bump RAM size in AArch64 MMU table
Now that PCI devices work with highmem-enabled QEMU emulation, bump up
the RAM size in the MMU tables to gain access to the full 255 GB of RAM
potential instead of the puny 3 GB.

Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-05-26 12:46:50 -04:00
Tuomas Tynkkynen
52ba907328 PCI: dm: Ignore 64-bit memory regions if CONFIG_SYS_PCI_64BIT not set
Currently, qemu_arm_defconfig and qemu_arm64_defconfig only work with
the 'highmem=off' parameter passed to QEMU's virt machine. The reason is
that when 'highmem' is not disabled, QEMU appends 64-bit a memory
resource to the PCI controller's regions property in DT in addition to
the 32-bit PCI memory window in low memory. And the current DT parsing
code picks the last (thus the 64-bit one) memory resource, whose address
eventually gets silently truncated to 32 bits because
CONFIG_SYS_PCI_64BIT is not set, which obviously causes PCI to break.

Avoid this problem by ignoring memory regions whose addresses are above
the 32-bit boundary when CONFIG_SYS_PCI_64BIT is not set.

Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-05-26 12:46:50 -04:00
Miquel Raynal
2a8e80dfce configs: add TPMv2.x support in Sandbox
Enable the Sandbox TPMv2 driver in all possible configurations.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-05-25 20:13:01 -04:00
Miquel Raynal
b91ad16a69 sandbox: dts: add Sandbox TPMv2.x node
This node declares the presence of the Sandbox TPMv2.x emulated chip,
available for testing.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-05-25 20:13:00 -04:00
Miquel Raynal
31b106fc1c doc: device-tree-bindings: add Sandbox TPMv2.0 module info
Add Sandbox TPMv2.0 module bindings.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-05-25 20:13:00 -04:00
Miquel Raynal
2bae712f7a tpm: add a Sandbox TPMv2.x driver
This driver can emulate all the basic functionalities of a TPMv2.x
chip and should behave like them during regular testing.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-05-25 20:13:00 -04:00
Miquel Raynal
2dffe1c6ad test/py: add TPMv2.x test suite
Add tests for the TPMv2.x commands.
These commands may run both on a physical TPM and with the sandbox
driver.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-05-25 20:13:00 -04:00
Miquel Raynal
8ee59472cb doc: device-tree-bindings: add TIS TPMv2.0 SPI module info
Add TIS TPMv2.0 SPI module bindings.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-05-25 20:12:59 -04:00
Miquel Raynal
a174f0001f tpm2: tis_spi: add the possibility to reset the chip with a gpio
On some designs, the reset line could not be connected to the SoC reset
line, in this case, request the GPIO and ensure the chip gets reset.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-05-25 20:12:59 -04:00
Miquel Raynal
eb46910b4b tpm: add support for TPMv2.x SPI modules
Add the tpm2_tis_spi driver that should support any TPMv2 compliant
(SPI) module.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-05-25 20:12:59 -04:00
Miquel Raynal
b9dd4fabbe tpm: add PCR authentication commands support
Add support for the TPM2_PCR_SetAuthPolicy and
TPM2_PCR_SetAuthValue commands.

Change the command file and the help accordingly.

Note: These commands could not be tested because the TPMs available
do not support them, however they could be useful for someone else.
The user is warned by the command help.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-05-25 20:12:59 -04:00
Miquel Raynal
dc26e913a8 tpm: add TPM2_HierarchyChangeAuth command support
Add support for the TPM2_HierarchyChangeAuth command.

Change the command file and the help accordingly.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-05-25 20:12:58 -04:00
Miquel Raynal
da9c3392e6 tpm: add dictionary attack mitigation commands support
Add support for the TPM2_DictionaryAttackParameters and
TPM2_DictionaryAttackLockReset commands.

Change the command file and the help accordingly.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-05-25 20:12:58 -04:00
Miquel Raynal
69cd8f0681 tpm: add TPM2_GetCapability command support
Add support for the TPM2_GetCapability command.

Change the command file and the help accordingly.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-05-25 20:12:58 -04:00
Miquel Raynal
1c4ea8f496 tpm: add TPM2_PCR_Read command support
Add support for the TPM2_PCR_Read command.

Change the command file and the help accordingly.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-05-25 20:12:58 -04:00
Miquel Raynal
6284be5a90 tpm: add TPM2_PCR_Extend command support
Add support for the TPM2_PCR_Extend command.

Change the command file and the help accordingly.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-05-25 20:12:57 -04:00
Miquel Raynal
bad8ff569d tpm: add TPM2_Clear command support
Add support for the TPM2_Clear command.

Change the command file and the help accordingly.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-05-25 20:12:57 -04:00
Miquel Raynal
2dc6d97e1e tpm: add TPM2_SelfTest command support
Add support for the TPM2_Selftest command.

Change the command file and the help accordingly.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-05-25 20:12:57 -04:00
Miquel Raynal
1922df2010 tpm: add TPM2_Startup command support
Add support for the TPM2_Startup command.

Change the command file and the help accordingly.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-05-25 20:12:57 -04:00
Miquel Raynal
bcdf6b9f26 tpm: report driver error code to upper layer
Instead of returning a generic 'library' error, report back the actual
error code so it can be displayed to the user by the regular error path.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-05-25 20:12:56 -04:00
Miquel Raynal
aa643013e4 tpm: add possible traces to analyze buffers returned by the TPM
When debugging, it is welcome to get more information about what the TPM
returns. Add the possibility to print the packets received to show their
exact content.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-05-25 20:12:56 -04:00
Miquel Raynal
f6872816ce tpm: add macros to enhance TPM commands readability
TPM commands are much easier to read/write with these macros that will
transform words or integers into byte strings. This way, there is no
need to call pack_byte_string() while all variable length in a command
are known (and at must 4 bytes, which is a lot of them).

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-05-25 20:12:56 -04:00
Miquel Raynal
ff32245bb3 tpm: prepare support for TPMv2.x commands
Choice between v1 and v2 compliant functions is done with the
configuration.

Create the various files that will receive TPMv2-only code on the same
scheme as for the TPMv1 code.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-05-25 20:12:55 -04:00
Miquel Raynal
3219cf693a tpm: add missing parameter in private data structure description
Both parameters 'duration_ms' and 'retry_time_ms' of the tpm_chip_priv
structure are documented is the comment above the declaration but 'buf'
was forgotten. Add the missing description.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-05-25 20:12:55 -04:00
Miquel Raynal
d677bfe2f7 tpm: disociate TPMv1.x specific and generic code
There are no changes in this commit but a new organization of the code
as follow.

* cmd/ directory:
        > move existing code from cmd/tpm.c in cmd/tpm-common.c
	> move specific code in cmd/tpm-v1.c
	> create a specific header file with generic definitions for
	  commands only called cmd/tpm-user-utils.h

* lib/ directory:
        > move existing code from lib/tpm.c in lib/tpm-common.c
	> move specific code in lib/tpm-v1.c
	> create a specific header file with generic definitions for
	  the library itself called lib/tpm-utils.h

* include/ directory:
        > move existing code from include/tpm.h in include/tpm-common.h
	> move specific code in include/tpm-v1.h

Code designated as 'common' is compiled if TPM are used. Code designated
as 'specific' is compiled only if the right specification has been
selected.

All files include tpm-common.h.
Files in cmd/ include tpm-user-utils.h.
Files in lib/ include tpm-utils.h.
Depending on the specification, files may include either (not both)
tpm-v1.h or tpm-v2.h.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
[trini: Fix a few more cases of tpm.h -> tpm-v1.h, some Kconfig logic]
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-25 20:12:55 -04:00
Miquel Raynal
9f9ce3c369 tpm: prepare introduction of TPMv2.x support in Kconfig
Because both major revisions are not compatible at all, let's make them
mutually exclusive in Kconfig. This way we will be sure, when using a
command or a library function that it is supported by the right
revision.

Current drivers are currently prefixed by "tpm_", we will prefix TPMv2.x
files by "tpm2_" to make the distinction without moving everything.

The Kconfig menu about TPM drivers is now divided into two sections, one
for each specification. Compliant drivers with one specification will
only show up if this specification _only_ has been selected, otherwise a
comment is displayed.

Once a driver is selected by the user, it selects automatically a
boolean value, that is needed in order to activate the TPM commands.
Selecting the TPM commands will automatically select the right
command/library files.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
[trini: Rework deps as TPM_V1 and TPM_V2 depend on TPM,
        drop TPM_DRIVER_SELECTED]
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-25 20:12:33 -04:00
Miquel Raynal
06425aa087 tpm: add Revision ID field in the chip structure
TPM are shipped with a few read-only register from which we can retrieve
for instance:
- vendor ID
- product ID
- revision ID

Product and vendor ID share the same register and are already referenced
in the tpm_chip structure. Add the revision ID entry which is missing.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-05-25 08:12:40 -04:00
Miquel Raynal
96cc4e31fb tpm: add extra blank lines between declarations and code
Fix following checkpatch.pl issue in TPM-related code:

    WARNING: Missing a blank line after declarations

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-05-25 08:12:40 -04:00
Miquel Raynal
52da18a378 tpm: fix spelling
Fix following checkpatch.pl issues in TPM-related code:

    CHECK: '<x>' may be misspelled - perhaps '<y>'?

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-05-25 08:12:40 -04:00
Miquel Raynal
fded837fd9 tpm: use the BIT() macro where applicable
Fix following checkpatch.pl issue in TPM-related code:

    CHECK: Prefer using the BIT macro

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-05-25 08:12:40 -04:00
Miquel Raynal
c617918764 tpm: align arguments with open parenthesis
Fix following checkpatch.pl issue in TPM-related code:

    CHECK: Alignment should match open parenthesis

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-05-25 08:12:40 -04:00
Miquel Raynal
b9804e5bf3 tpm: substitute deprecated uint<x>_t types with their u<x> equivalent
Fix following checkpatch.pl issues in TPM-related code:

    CHECK: Prefer kernel type 'u8' over 'uint8_t'
    CHECK: Prefer kernel type 'u16' over 'uint16_t'
    CHECK: Prefer kernel type 'u32' over 'uint32_t'

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-05-25 08:12:40 -04:00
Miquel Raynal
fd0bc263d9 tpm: remove extra spaces between a function and its opening bracket
Fix following checkpatch.pl issue in TPM-related code:

    WARNING: space prohibited between function name and open
    parenthesis '('

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-05-25 08:12:40 -04:00
Miquel Raynal
ba4d2eca96 tpm: remove redundant blank line
Fix following checkpatch.pl issue in TPM-related code:

    CHECK: Please don't use multiple blank lines

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-05-25 08:12:40 -04:00
Maxime Ripard
3def2f8dbb Revert "sunxi: binman: Add U-Boot binary size check"
This reverts commit 819f1e081c.

This check was introduced in order to cope with the size limitation we had
when we were still using the raw environment in MMC. However, this
introduces padding as well, which can result in an overly huge binary if
one wants to flash the environment to some other location.

Since we now have a FAT-based environment, this check is not so useful
anymore, so we can just drop it.

Cc: Andre Przywara <andre.przywara@arm.com>
Cc: Måns Rullgård <mans@mansr.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-05-25 14:55:07 +05:30
Tom Rini
8730d012c9 Merge tag 'arc-uart-updates-for-2018.07-rc1' of git://git.denx.de/u-boot-arc
Add support for DEBUG_UART on ARC devboards

This required us to do 2 things:
 1) Insert a call to debug_uart_init() in early boot code
 2) Convert serial_arc to Kconfig

Once both items above are done we just patched defconfigs.
2018-05-24 09:54:25 -04:00
Tom Rini
7049f62000 Merge tag 'signed-rpi-next' of git://github.com/agraf/u-boot
Patch queue for rpi - 2018-05-24

Some minor fixes for the Raspberry Pi:

  - Fix SD writes on new sdhost controller
  - Sanitize default load addresses, allowing for better payload placement
2018-05-24 09:54:14 -04:00
Alexey Brodkin
0556b569e5 ARC: Enable debug UART on nSIM boards
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-05-24 15:59:17 +03:00
Alexey Brodkin
54705016ba serial/serial_arc: Implement debug serial
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-05-24 15:59:17 +03:00
Alexey Brodkin
d7ac185fd8 serial: Convert ARC_SERIAL to Kconfig
One step closer to completely Kconfig-driven target configuration in
U-Boot :)

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-05-24 15:59:17 +03:00
Eugeniy Paltsev
b271d366cc ARC: enable debug uart for HSDK and AXS10x boards
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-05-24 15:59:17 +03:00
Eugeniy Paltsev
429fa25e17 ARC: init debug uart in early common arc code
The debug UART is intended for use very early in U-Boot to debug
problems before serial drivers are up.

Call debug_uart_init right before board_init_f.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-05-24 15:59:17 +03:00
Tuomas Tynkkynen
385cbe298a rpi: Change load addresses to make more room for the kernel & DTB
As of Linux 4.16, a multiplatform AArch64 kernel with our distro config
takes 26M. The current space reservation leaves only 17M for the kernel
and if it goes over it, the initrd gets overwritten when loading the
kernel from the filesystem.

A similar problem happens on ARMv7 with the DTBs taken from the
downstream Raspberry Pi foundation kernel. I guess they compile them
with DT overlay support enabled which grows them just enough.

Fix both of these problems by rewriting the memory map, which now allows
kernels to be up to 36M and DTBs up to 1M. Also the comment block was
kind of obsolete ever since the introduction of AArch64 support and the
firmware-loaded DTB doesn't get placed at 0x100 anymore either, so that
is fixed as well.

Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-05-24 10:20:53 +02:00
Marek Vasut
8a9dc16e4d spl: Add full fitImage support
Add support for loading U-Boot and optionally FDT from a fitImage
in SPL by using the full fitImage support from U-Boot. While we do
have limited SPL loading support in SPL with a small footprint, it
is missing a lot of important features, like checking signatures.
This support has all the fitImage features, while the footprint is
obviously larger.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-05-23 22:06:42 -04:00
Marek Vasut
f919fbd350 pylibfdt: Add missing CC and LD to Makefile
Add missing CC and LDSHARED variables to the Makefile to pass the
correct C compiler and linker path to the build of _libfdt.so .

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-05-23 22:06:41 -04:00
Heinrich Schuchardt
02c3a3d09e scripts: add decodecode from Linux
The script decodecode can be used to disassemble the 'Code:' line  written
when an exception occurs.

The script is copied from Linux v4.16.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-05-23 22:06:41 -04:00
Heinrich Schuchardt
bd2a13f329 arm: print instructions pointed to by pc
If an exception occurs in a loaded image and the relocation offset is
unknown, it is helful to know the instructions pointed to by the
program counter. This patch adds the missing output.

A possible output is:
    Code: e1c560d0 e12fff1e e120077b e12fff1e (e7f7defb)

The parentheses indicate the instruction causing the exception.

The output can be disassembled using the decodecode script provided
by the Linux kernel project.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-05-23 22:06:41 -04:00
Michal Simek
d0f855f221 arm64: timer: Create timer_get_bootus for bootstage support
Implement timer_get_boot_us() based on available functions to support
bootstage command.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-23 22:06:41 -04:00
Philipp Tomsich
9de4f95929 Makefile: adopt --std=gnu11 for HOSTCFLAGS on Linux
Following the conversion of the SPDX license tags, a number of files
compiled with -pedantic now generate warnings similar to the following
for using C99-style '//' comments in ISO C90 code:

  tools/gen_eth_addr.c:1:1: warning: C++ style comments are not allowed in ISO C90
   // SPDX-License-Identifier: GPL-2.0+
   ^

The SPDX comment-style change means that these files have adopted C99,
so need to change the language-standard to --std=gnu99 or --std=gnu11
to let the compiler know this.

As we now require GCC 6 or newer for the cross-compiler, the project has
implicitly moved the project to GNU11: let older GCC versions on various
Linux distros know to treat our host tools as GNU11 as well.

References: commit 83d290c56f ("SPDX: Convert all of our single license tags to Linux Kernel style")
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-05-23 22:06:40 -04:00
Ladislav Michl
9b0888ced4 twister: Let SPL load U-Boot from MMC
MMC is not initialized in SPL, so it cannot load u-boot.img
preventing boot from MMC.

Also driver specific functions are guarded with generic
configuration options which leads to build failures when device
driver is not enabled in config. Fix that by using driver
specific defines.

Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Acked-by: Stefano Babic <sbabic@denx.de>
2018-05-23 22:06:40 -04:00
Marek Vasut
0298d20375 fit: Add standalone image type handling
Just add IH_TYPE_STANDALONE to fit_get_image_type_property().

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-05-23 22:06:40 -04:00
Marek Vasut
a3c43b129e fit: Add empty fit_print_contents() and fit_image_print()
These functions may be needed in SPL, so add empty variants of them
if CONFIG_SPL_FIT_PRINT is disabled.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-05-23 22:06:40 -04:00
Marek Vasut
b527b9c6c6 fit: Fix CONFIG_FIT_SPL_PRINT
Rename CONFIG_FIT_SPL_PRINT to CONFIG_SPL_FIT_PRINT and add Kconfig
entry for it.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-05-23 22:06:39 -04:00
Marek Vasut
26a642238b spl: fit: Add support for loading FPGA bitstream
Add support for loading FPGA into the SPL fitImage support. The
mechanism is flexible and allows user to override the actual
function for loading the FPGA itself. This is because on some
systems, the FPGA must be programmed to allow DRAM access, so
loading the full fitImage may not be possible if it contains
the bitstream. Instead, the spl_load_fpga_image() provides all
the tools to load the bitstream in parts while programming it
into the FPGA.

Signed-off-by: Marek Vasut <marex@denx.de>
[trini: Don't always have a branch to print out type]
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-23 22:05:54 -04:00
Alex Kiernan
b11ed7d602 bootcount: Add bootcount command
Add a command to manipulate the bootcounter. This is useful if you can
run device recovery from inside U-Boot and need to reset the bootcounter
after executing that process as part of altbootcmd.

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
2018-05-23 17:30:05 -04:00
Eugen Hristev
c4d7b7a6b8 configs: sama5d2_xplained: fix bootcmd/args for spi+emmc demo
For sama5d2_xplained_spiflash_defconfig, we have the demo layout
as presented on this link:
http://www.at91.com/linux4sam/bin/view/Linux4SAM/Sama5d2XplainedMainPage#SPI_eMMC_Flash_demo_Memory_map

on SPI Flash (4 Mbyte) we have Bootstrap (second level bootloader), U-boot + env

and kernel+dtb we keep on eMMC on single partition in /boot directory, formatted
with ext4.

Thus, changing the boot command to reflect this demo for the spiflash config,
and fixing up bootargs. Sama5d2_xplained does not have NAND flash, so the
bootargs were completely wrong.

Fixes: "5abc1a45": common: Move CONFIG_BOOTARGS to Kconfig
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2018-05-23 17:30:05 -04:00
Eugen Hristev
e75477e4f2 configs: sama5d2_xplained: set default FAT env location to SD-Card
For sama5d2_xplained_mmc_defconfig, we have the following layout for SD-Card:
partition 1: FAT: contains bootstrap binary (second level bootloader),
U-boot, U-boot env, kernel, dtb
partition 2: EXT4: Rootfs.

Add to defconfig CONFIG_ENV_FAT_DEVICE_AND_PART to have environment
by default on SD-Card, to align with our demo layout.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2018-05-23 17:30:04 -04:00
Heinrich Schuchardt
3d9640f55c doc: expand README.commands
Describe U_BOOT_CMD_COMPLETE.
Describe the arguments of U_BOOT_CMD and U_BOOT_CMD_COMPLETE.
Describe the arguments of the command function.
Describe the arguments of the completion function.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-05-23 17:30:04 -04:00
Eugen Hristev
78ccbd1395 test: fs: fs-test: Modified test 1 to do a ls to a nonexistent dir
Added a simple ls to a nonexistent directory for test 1.
In case the driver is broken for a nonexistent directory, U-boot
might crash.

Here is an example failed output:

=> # Test Case 1 - ls
=> ext4ls host 0:0
<DIR>       4096 .
<DIR>       4096 ..
<DIR>      16384 lost+found
<DIR>       4096 SUBDIR
      2621440000 2.5GB.file
         1048576 1MB.file
=> # In addition, test with a nonexistent directory to see if we crash.
=> ext4ls host 0:0 invalid_d
** Can not find directory. **
./test/fs/fs-test.sh: line 161: 25786 Segmentation fault      (core dumped) $UBOOT  <<EOF

Subsequent tests will fail if U-boot crashes.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-05-23 17:30:04 -04:00
Eugen Hristev
e71a969cea fs: ext4: fix crash on ext4ls
Found a crash while issuing ext4ls with a non-existent directory.
Crash test:

=> ext4ls mmc 0 1
** Can not find directory. **
data abort
pc : [<3fd7c2ec>]          lr : [<3fd93ed8>]
reloc pc : [<26f142ec>]    lr : [<26f2bed8>]
sp : 3f963338  ip : 3fdc3dc4     fp : 3fd6b370
r10: 00000004  r9 : 3f967ec0     r8 : 3f96db68
r7 : 3fdc99b4  r6 : 00000000     r5 : 3f96dc88  r4 : 3fdcbc8c
r3 : fffffffa  r2 : 00000000     r1 : 3f96e0bc  r0 : 00000002
Flags: nZCv  IRQs off  FIQs off  Mode SVC_32
Resetting CPU ...

resetting ...

Tested on SAMA5D2_Xplained board (sama5d2_xplained_mmc_defconfig)

Looks like crash is introduced by commit:
"fa9ca8a" fs/ext4/ext4fs.c: Free dirnode in error path of ext4fs_ls

Issue is that dirnode is not initialized, and then freed if the call
to ext4_ls fails. ext4_ls will not change the value of dirnode in this case
thus we have a crash with data abort.

I added initialization and a check for dirname being NULL.

Fixes: "fa9ca8a" fs/ext4/ext4fs.c: Free dirnode in error path of ext4fs_ls
Cc: Stefan Brüns <stefan.bruens@rwth-aachen.de>
Cc: Tom Rini <trini@konsulko.com>
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-05-23 17:30:04 -04:00
Tuomas Tynkkynen
2239690aca i2c: Drop CONFIG_SH_SH7734_I2C
Last user of this driver went away in May 2017 in commit
eb5ba3aefd ("i2c: Drop use of CONFIG_I2C_HARD").

Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
Acked-by: Heiko Schocher <hs@denx.de>
2018-05-23 17:30:04 -04:00
Tuomas Tynkkynen
d70c79fa89 i2c: Drop CONFIG_TSI108_I2C
Last user of this driver went away in June 2015 in commit
d928664f41 ("powerpc: 74xx_7xx: remove 74xx_7xx cpu support")

Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
Acked-by: Heiko Schocher <hs@denx.de>
2018-05-23 17:30:04 -04:00
Tuomas Tynkkynen
ed9072c797 net: Drop CONFIG_TSI108_ETH
Last user of this driver went away in June 2015 in commit
d928664f41 ("powerpc: 74xx_7xx: remove 74xx_7xx cpu support")

Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
2018-05-23 17:30:03 -04:00
Eugen Hristev
30db47a9b9 configs: sama5d2_xplained: enable ext4 command support
To support loading the zImage + DTB from the rootfs ext4 partitions,
enable the ext4 command support.

Based on original work by Wenyou Yang

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2018-05-23 17:30:03 -04:00
Eugen Hristev
649aa6cfe8 clk: at91: clk-h32mx: replace dm_warn with dev_dbg
dm_warn is too noisy, replace with dev_dbg for less noise.

Based on original work by Wenyou Yang

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2018-05-23 17:30:03 -04:00
Eugen Hristev
5415bf3a00 configs: at91sam9x5ek: updated mtdparts variable in bootargs
We have a new demo layout of our sama5 boards for the NAND Flash
memory.
According to this new layout, adjust the mtdparts variable in bootargs
to align with this, which is available at :
http://www.at91.com/linux4sam/bin/view/Linux4SAM/Sama5d3XplainedMainPage#NAND_Flash_demo_Memory_map,

Based on original work by Wenyou Yang

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2018-05-23 17:30:03 -04:00
Nicolas Ferre
7b8b19fbdc configs: at91: Adjust CONFIG_ENV_OFFSET to match sama5 address
In order to have a single ENV_OFFSET to manage, use the same as the sama5 one.
This address matches our NAND flash map available at:
http://www.at91.com/linux4sam/bin/view/Linux4SAM/Sama5d3XplainedMainPage#NAND_Flash_demo_Memory_map

Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
[eugen.hristev@microchip.com: rework on latest version of u-boot]
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2018-05-23 17:30:03 -04:00
Nicolas Ferre
e32f240630 configs: at91: sama5_common: Adjust CONFIG_ENV_OFFSET to match block alignment
Fix the unaligned environment address.
This address matches our NAND flash map available at:
http://www.at91.com/linux4sam/bin/view/Linux4SAM/Sama5d3XplainedMainPage#NAND_Flash_demo_Memory_map

Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
[eugen.hristev@microchip.com: rework on latest version of u-boot]
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2018-05-23 17:30:03 -04:00
Tom Rini
16c4b169af FIT: Make fit_conf_print() be a static function
We only call fit_conf_print from one place in the code, so mark it as
static and move it up to where we call it.  This in turn has us move a
few other already static functions up further as well.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-23 17:30:02 -04:00
Tom Rini
d405dae374 Licenses/README: Update some style and add explicit license to the document
- Add an SPDX license tag to the file, saying it's GPL-2.0.
- From the Linux Kernel v4.17-rc4, import the "License identifier
  syntax" section as-is from Documentation/process/license-rules.rst
  and then change it to be clearer about examples from the Linux Kernel
  vs examples found in U-Boot, and when we're talking about U-Boot.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-23 17:30:02 -04:00
Alex Kiernan
5a7b11e65a Convert CONFIG_SUPPORT_EMMC_RPMB to Kconfig
Convert CONFIG_SUPPORT_EMMC_RPMB to Kconfig. Split the command handling
from the underlying support and expose this through CMD_MMC_RPMB.

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
2018-05-23 17:30:02 -04:00
Alexander Graf
79fd08f745 mmc: Unirqify bcm2835_sdhost and fix writes
The bcm2835 sdhost driver has a problem with "write multiple" commands.
It seems to boil down to the fact that the controller dislikes its FIFO
to get drained at the end of a block when a write multiple blocks command
is in flight.

The easy fix is to simply get rid of all the IRQ driven logic and make
the driver push as much data into the FIFO as it can. That way we never
drain and we never run into the problem.

Reported-by: Jan Leonhardt <jan@cyberdesigner.net>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-05-23 22:31:42 +02:00
Alexander Graf
d295c3ec35 rpi: Adjust fdt_addr_r to a sane address
Back in the old days, 0x100 was used as the address to pass the device tree
from firmware into the kernel. This has since changed to a more dynamic
location, so using 0x100 actually breaks more things than it helps with.

Let's move the device tree default location for distro boot to a more sane
place that gives us enough head room in low memory.

Reported-by: Tuomas Tynkkynen <tuomas@tuxera.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-05-23 22:31:23 +02:00
Tom Rini
ea37f0b312 arm: armv7m: Clean up some thumb / compiler flag options
- The correct way to build with thumb mode is to select SYS_THUMB_BUILD
- We should be setting -march=armv7-m in arch/arm/Makefile not the
  sub-config.mk file.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-23 13:03:42 -04:00
Tom Rini
dca268a8f9 .travis.yml: Further optimizations
- Xilinx aarch64 is caught in the general xilinx arm job, exclude from
  the general aarch64 job.
- Give the generic aarch64 job a better name
- Re-sort the PowerPC jobs so that we can complete them a bit quicker.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-22 22:08:57 -04:00
Daniel Schwierzeck
4c58d273e0 buildman: support newer gcc versions from kernel.org
Add support for gcc versions 7.3.0, 6.4.0 and 4.9.4.

Also use a regex for matching the tarball names. Some gcc versions
use '-ARCH-' instead of '_ARCH-'.

As part of this, we switch TravisCI to also using these toolchains for
all platforms.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-22 22:08:57 -04:00
Tom Rini
f58e94602e at91: Minor tweaks to SPL logic for space savings on smartweb
- spl_board_init is empty on smartweb so drop that function
- When CONFIG_AT91SAM9_WATCHDOG is set we do not disable the watchdog in
  SPL and instead let full U-Boot handle it.  Instead of an empty
  function just do not call a function.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-22 22:08:57 -04:00
Tom Rini
668e309eff Merge branch 'master' of git://git.denx.de/u-boot-uniphier 2018-05-22 13:53:26 -04:00
Masahiro Yamada
c3d3e2a1ef ARM: dts: uniphier: sync with Linux 4.17-rc6
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-05-23 00:32:39 +09:00
Masahiro Yamada
8c09f1f4fc ARM: uniphier: rename environment variable fdt_file to fdtfile
For booting Linux in the generic distro mechanism, cmd/pxe.c
retrieves the FDT file name from "fdtfile" environment variable.

Rename "fdt_file" to "fdtfile" for easier migration to distro boot.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-05-23 00:32:39 +09:00
Kunihiko Hayashi
f6acbf88e4 ARM: dts: uniphier: change phy-mode to 'internal' for LD11
Change the phy-mode property to 'internal' that means to use a built-in PHY
implemented on LD11 SoC.

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-05-23 00:32:39 +09:00
Kunihiko Hayashi
3c0fa6ce13 ARM: dts: uniphier: add clock-names and reset-names to ethernet node
Add clock-names and reset-names because this node recognizes multiple
clocks and resets.  ("ether", and so on, for each)

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-05-23 00:32:39 +09:00
Kunihiko Hayashi
28cd3d2929 ARM: dts: uniphier: add required clocks and resets to Pro4 ethernet node
The GIO clock/reset, another MAC clock, and the PHY clock are required
for the ethernet of Pro4 SoC.

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-05-23 00:32:39 +09:00
Kunihiko Hayashi
69b3d4e930 ARM: dts: uniphier: add syscon-phy-mode property to each ethernet node
Add syscon-phy-mode property specifying a phandle of system controller
to each ethernet node.

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-05-23 00:32:39 +09:00
Patrice Chotard
65c3d25a6a ubi: fastmap: Implement produce_free_peb()
Since 'commit f82290afc8 ("mtd: ubi: Fix worker handling")',
when booting from NAND, on a fresh NAND just after being flashed (and
only in this case), we got the following log:

ubi0: default fastmap pool size: 200
ubi0: default fastmap WL pool size: 100
ubi0: attaching mtd2
ubi0: scanning is finished
ubi0 error: ubi_update_fastmap: could not find any anchor PEB
ubi0 error: ubi_update_fastmap: could not find any anchor PEB
ubi0 error: ubi_wl_get_peb: Unable to get a free PEB from user WL pool
ubi0 error: autoresize: cannot auto-resize volume 1
UBI error: cannot attach mtd2UBI error: cannot initialize UBI, error
-28UBI init error 28

After analysis, in ubi_wl_init(), when performing schedule_erase(),
thread_enabled flag is not yet set to 1, which forbids ubi_do_worker()
to execute pending works.

This has to effect to not populate ubi->free with free physical
eraseblocks.

Following Richard Weinberger's advice, this patch has been
backported from kernel tree :
'commit 1cb8f9776c7d ("ubi: fastmap: Implement produce_free_peb()")'

Tested-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Richard Weinberger <richard@nod.at>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Acked-by: Heiko Schocher <hs@denx.de>
2018-05-22 11:39:05 +02:00
Tom Rini
624d2cae34 SPDX: Fixup SPDX tags in a few new files
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-20 09:47:45 -04:00
Tom Rini
bea1649cd9 Merge branch 'master' of git://git.denx.de/u-boot-sh 2018-05-20 09:44:38 -04:00
Tom Rini
56932e84ea Merge branch 'master' of git://git.denx.de/u-boot-usb 2018-05-20 09:44:13 -04:00
Tom Rini
904e546970 Merge branch 'master' of git://git.denx.de/u-boot-socfpga 2018-05-20 09:44:05 -04:00
Marek Vasut
232a1a5f8f ARM: rmobile: Unify Gen2 Makefile entry
Drop per-SoC Makefile entries and replace them with one unified entry
now that the PFC tables are gone. Shuffle the Makefile around a bit
to make it more organized.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-05-20 12:06:55 +02:00
Marek Vasut
5ec1fd8e93 ARM: rmobile: Drop old R8A7794 PFC tables
All the boards use new modern PFC framework, the old PFC tables
are no longer used, so remove them.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-05-20 12:06:55 +02:00
Marek Vasut
a67a02d26d ARM: rmobile: Drop old R8A7793 PFC tables
All the boards use new modern PFC framework, the old PFC tables
are no longer used, so remove them.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-05-20 12:06:55 +02:00
Marek Vasut
be0fc10c07 ARM: rmobile: Drop old R8A7792 PFC tables
All the boards use new modern PFC framework, the old PFC tables
are no longer used, so remove them.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-05-20 12:06:55 +02:00
Marek Vasut
3bb2ff3426 ARM: rmobile: Drop old R8A7791 PFC tables
All the boards use new modern PFC framework, the old PFC tables
are no longer used, so remove them.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-05-20 12:06:55 +02:00
Marek Vasut
70b5de78ea ARM: rmobile: Drop old R8A7790 PFC tables
All the boards use new modern PFC framework, the old PFC tables
are no longer used, so remove them.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-05-20 12:06:55 +02:00
Marek Vasut
e9c891ff93 ARM: rmobile: Update V2H Blanche
The V2H Blanche port was broken since some time. This patch updates
the V2H Blanche port to use modern frameworks, DM, DT probing, SPL
for the preloading and puts it on par with the M2 Porter board.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-05-20 12:06:55 +02:00
Marek Vasut
decb5f66c3 ARM: rmobile: Enable DM capable RCar I2C driver on Silk
Enable the DM capable driver instead of the legacy one.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-05-20 12:06:54 +02:00
Marek Vasut
0a067f7178 ARM: rmobile: Enable DM capable RCar I2C driver on Lager
Enable the DM capable driver instead of the legacy one.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-05-20 12:06:54 +02:00
Marek Vasut
a06a0ac36d i2c: rcar_i2c: Add DM and DT capable I2C driver
Add derivative of the rcar_i2c driver which is capable of
probing itself from DM and uses DT.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-05-20 12:06:54 +02:00
Marek Vasut
a4d9aafadb i2c: rcar_i2c: Remove the driver
Remove the rcar_i2c driver, since it's no longer used by any
board and will be superseded by a DM and DT capable variant.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-05-20 12:06:54 +02:00
Tom Rini
855ff8e6dd Fixup various SPDX tags from the latest merge
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-18 17:56:50 -04:00
Mugunthan V N
0ad3f771b6 drivers: usb: dwc3: remove devm_zalloc from linux_compact
devm_zalloc() is already defined in dm/device.h header, so
devm_zalloc can be removed from linux_compact.h beader file.

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-18 13:37:02 +02:00
Michal Simek
d067624c47 usb: xhci: zynqmp: Remove support for !DM_USB
Switch to DM_USB was done and there is no need to keep !DM_USB code in
tree.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-05-18 13:23:15 +02:00
Michal Simek
b4af64fdfd arm64: zynqmp: Use DWC3 generic driver and DM_USB
Remove harcoded XHCI lists and detect mode, speed based on DT.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Serial-changes: 2
- Remove also XHCI macros from hardware.h
- Remove additional new line in zcu106
2018-05-18 13:23:15 +02:00
Michal Simek
41a3d4fda4 usb: xhci: zynqmp: Add support for DM_USB
The patch is adding support for DM_USB for xhci driver.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-18 13:23:13 +02:00
Michal Simek
49d674547c usb: dwc3: Add generic DWC3 glue logic driver
By enabling BLK by default this is the next driver which needs to get
support for DM_USB. Adding generic DWC3 glue logic which only
parse nodes and read device mode. Based on it probe proper
host/peripheral DWC3 drivers for it.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-18 13:23:10 +02:00
Mugunthan V N
59592b99d8 usb: common: add support to get maximum speed from dt
Add support to get maximum speed from dt so that usb drivers
makes use of it for DT parsing.

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
(rebase and fix errors)
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-05-18 13:23:10 +02:00
Mugunthan V N
23ba2d6372 usb: dwc3: Add dwc3_init/remove with DM_USB
The patch is preparing dwc3 core for enabling DM_USB with peripheral
driver with using driver model support.
The driver will be bound by the DWC3 wrapper driver based on the
dr_mode device tree entry.

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
(Remove dwc3-omap changes)
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-18 13:23:10 +02:00
Patrice Chotard
3b29121678 phy: add support for STM32 usb phy controller
This patch adds phy tranceiver driver for STM32 USB PHY
Controller (usbphyc) that provides dual port High-Speed
phy for OTG (single port) and EHCI/OHCI host controller
(two ports).
One port of the phy is shared between the two USB controllers
through a UTMI+ switch.

Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-05-18 13:17:31 +02:00
Seung-Woo Kim
1fe9ae76b1 gadget: f_thor: update to support more than 4GB file as thor 5.0
During file download, it only uses 32bit variable for file size and
it limits maximum file size less than 4GB. Update to support more
than 4GB file with using two 32bit variables for file size as thor
protocol 5.0.

Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
2018-05-18 13:17:30 +02:00
Seung-Woo Kim
f9e8dc0abd gadget: f_thor: fix filename overflow
The thor sender can send filename without null character and it is
used without consideration of overflow. Actually, character array
for filename is assigned with DEFINE_CACHE_ALIGN_BUFFER() and it
is bigger than size of memcpy, so there was no real overflow.
Fix filename overflow for code level integrity.

Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
2018-05-18 13:17:30 +02:00
Tom Rini
5f78786499 Merge git://git.denx.de/u-boot-imx 2018-05-18 07:11:11 -04:00
Ley Foon Tan
00f7ae6138 arm: dts: socfpga: stratix10: update dtsi and dts
Update dtsi and dts files for resets, phy node and other properties.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2018-05-18 10:30:48 +02:00
Ley Foon Tan
5fb033a336 arm: socfpga: misc: Add CONFIG_SYS_L2_PL310 switch
Preparation for Stratix 10 enablement. In ARM64, L2 cache controller is
accessed through processor registers. So, add CONFIG_SYS_L2_PL310 switch
conditional build in order this file can by shared across other SOCFPGAs.

Signed-off-by: Chin Liang See <chin.liang.see@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2018-05-18 10:30:48 +02:00
Ley Foon Tan
73175d04a9 arm: socfpga: stratix10: Add pinmux support for Stratix10 SoC
Add pinmux driver support for Stratix SoC

Signed-off-by: Chin Liang See <chin.liang.see@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2018-05-18 10:30:48 +02:00
Ley Foon Tan
3607a8084a arm: socfpga: stratix10: Add reset manager driver for Stratix10 SoC
Add Reset Manager driver support for Stratix SoC

Signed-off-by: Chin Liang See <chin.liang.see@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2018-05-18 10:30:47 +02:00
Ley Foon Tan
508791a035 arm: socfpga: stratix10: Add clock manager driver for Stratix10 SoC
Add Clock Manager driver support for Stratix SoC

Signed-off-by: Chin Liang See <chin.liang.see@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2018-05-18 10:30:47 +02:00
Ley Foon Tan
641f7470b6 arm: socfpga: stratix10: Add watchdog and firewall base addresses
Add the base address for watchdog and firewall.

Signed-off-by: Chin Liang See <chin.liang.see@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2018-05-18 10:30:47 +02:00
Ben Kalo
4916388a39 ARM: socfpga: Fix Documentation errors in scu_registers
According to ARM Cortex-A9 MPCore TRM section 2.2 - SCU registers
Access Control register offset is 0x50.

Signed-off-by: Ben Kalo <ben.h.kalo@gmail.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
2018-05-18 10:30:47 +02:00
Tien Fong Chee
011fa5f33d ARM: socfpga: Adding SoCFPGA info for both SPL and U-Boot
SoC FPGA info is required in both SPL and U-Boot.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
2018-05-18 10:30:47 +02:00
Tien Fong Chee
c960ef29cd ARM: socfpga: Adding clock frequency info for U-Boot
Clock frequency info is required in U-Boot because info would be erased
when transition from SPL to U-Boot.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
2018-05-18 10:30:47 +02:00
Tien Fong Chee
421a21c53a ARM: socfpga: Enable SPL memory allocation
Enable memory allocation in SPL for preparation to enable FAT
in SPL. Memory allocation is needed by FAT to work properly.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Reviewed-by: Dinh Nguyen <dinguyen@kernel.org>
2018-05-18 10:30:47 +02:00
Tien Fong Chee
901af3e903 configs: Add DDR Kconfig support for Arria 10
This patch enables DDR Kconfig support for Arria 10.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Reviewed-by: Dinh Nguyen <dinguyen@kernel.org>
2018-05-18 10:30:47 +02:00
Tien Fong Chee
5658a299bd ARM: socfpga: Add DDR driver for Arria 10
Add DDR driver support for Arria 10.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
2018-05-18 10:30:47 +02:00
Tien Fong Chee
53faef1e3f ARM: socfpga: Add DRAM bank size initialization function
Add function for both multiple DRAM bank and single DRAM bank size
initialization. This common functionality could be used by every single
SOCFPGA board.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Tested-by: Ley Foon Tan <ley.foon.tan@intel.com>
2018-05-18 10:30:47 +02:00
Tien Fong Chee
9ef9fe3455 ARM: socfpga: Rename the gen5 sdram driver to more specific name
Current sdram driver is only applied to gen5 device, hence it is better
to rename sdram driver to more specific name which is related to gen5
device.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
2018-05-18 10:30:47 +02:00
Marek Vasut
32f99757f4 ARM: socfpga: Repair A10 EMAC reset handling
The EMAC reset and PHY mode configuration was never working on the
Arria10 SoC, fix this. This patch pulls out the common code into
misc.c and passes the SoC-specific function call in as a function
pointer.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
2018-05-18 10:30:46 +02:00
Marek Vasut
6b49cdd27e ARM: socfpga: Synchronize Arria10 SoCDK SDMMC handoff
Regenerate Altera Arria 10 SoCDK SDMMC handoff file using latest
Quartus to get the new set of clock bindings in.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
2018-05-18 10:30:46 +02:00
Marek Vasut
cc21ed62f9 ARM: socfpga: Synchronize Arria10 DTs
Synchronize Altera Arria 10 DT sources with Linux 4.16.3 as of commit
ef8216d28a5920022cddcb694d2d75bd1f0035ca

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
2018-05-18 10:30:46 +02:00
Marek Vasut
474315f563 ARM: socfpga: Sort the DT Makefile
Sort the Makefile entries, no functional change.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
2018-05-18 10:30:46 +02:00
Marek Vasut
480f7f9c3e ARM: socfpga: Sync A10 clock manager binding parser
The A10 clock manager parsed DT bindings generated by Quartus the
bsp-editor to configure the A10 clocks. Sadly, those DT bindings
changed at some point. The clock manager patch used the old ones,
this patch replaces the bindings parser with one for the new set.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
2018-05-18 10:30:46 +02:00
Marek Vasut
73172753f4 ARM: socfpga: Convert to DM serial
Pull the serial port configuration from DT and use DM serial instead
of having the serial configuration in two places, DT and board config.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
2018-05-18 10:30:46 +02:00
Marek Vasut
48befc009f ARM: socfpga: Clean up Kconfig entries
Shuffle the default Kconfig entries around so it is not such a mess.
No functional change.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
2018-05-18 10:30:46 +02:00
Marek Vasut
f79173280c ARM: socfpga: Zap CONFIG_SOCFPGA_VIRTUAL_TARGET
This was never used, is not used anywhere and is just in the way
by adding annoying ifdeffery. Get rid of it.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
2018-05-18 10:30:46 +02:00
Marek Vasut
768f23dc8a ARM: socfpga: Put stack at the end of SRAM
The global data are in the .data section, so there's no point in
reserving any space for it above stack. Put stack at the end of
SRAM.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
2018-05-18 10:30:45 +02:00
Marek Vasut
19c8fc77e1 fdt: Add another Altera Arria10 clock init compatible
The DT bindings for the Arria10 clock init have changed, add another
compatible to make them work with U-Boot until a proper clock driver
gets written.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
2018-05-18 10:30:45 +02:00
Lukasz Majewski
ee94365557 arm: imx53: Add support for imx53 boards from K+P
This commit adds support for DDC and HSC boards from
K+P in u-boot.

Console output:

U-Boot 2018.05-rc2-00090-g752b7ed6f9 (Apr 26 2018 - 14:24:24 +0200)

CPU:   Freescale i.MX53 rev2.1 at 800 MHz
Reset cause: WDOG
Model: K+P iMX53
DRAM:  512 MiB
MMC:   FSL_SDHC: 0
Loading Environment from MMC... OK
In:    serial
Out:   serial
Err:   serial
Module EEPROM:
  ID: TQMa53-CB.0401
  SN: 63152762
  MAC: 00:0b:64:03:14:2a
BBoard:40x0 Rev:10
Net:   eth0: ethernet@63fec000
Hit any key to stop autoboot:  0

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2018-05-18 08:29:38 +02:00
Lukasz Majewski
3edf9ebea0 sandbox: tests: Add tests for mc34708 PMIC device
Following tests has been added for mc34708 device:

- get_test for mc34708 PMIC
- Check if proper number of registers is read
- Check if default (emulated via i2c device) value is properly read
- Check if value write/read operation is correct
- Perform tests to check if pmic_clrsetbits() is working correctly

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-05-18 08:27:26 +02:00
Lukasz Majewski
e4aab0e169 sandbox: tests: Exclude common test code (pmic_get) in test/dm/pmic.c
The common code can be excluded to be reused by tests for other PMIC.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-05-18 08:27:26 +02:00
Lukasz Majewski
7ddce7d7a6 sandbox: Enable MC34708 PMIC support
This MC34708 PMIC is somewhat special - it used single transfers (R/W) with
3 bytes size - up till now U-Boot's PMICs only used 1 byte.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-05-18 08:27:26 +02:00
Lukasz Majewski
686df498ef sandbox: Enable support for MC34708 PMIC in DTS
This commit also provides the default values of the emulated MC34708 PMIC
internal registers content.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-05-18 08:27:26 +02:00
Lukasz Majewski
a65e644033 sandbox: Rewrite i2c_pmic_emul.c to support PMIC with 3 bytes transmission
This change enables support for MC34708 PMIC in sandbox. Now we can
emulate the I2C transfers larger than 1 byte.

Notable changes for this driver:

- From now on the register number is not equal to index in the buffer,
  which emulates the PMIC registers

- The PMIC register's pool is now dynamically allocated up till
  64 regs * 3 bytes each = 192 B

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-05-18 08:27:26 +02:00
Lukasz Majewski
d4505c8e0d pmic: Rewrite the pmic command to not only work with single byte transmission
Up till now it was only possible to use 'pmic' command with a single byte
transmission.
The pmic_read|write functions has been replaced with ones, which don't need
the transmission length as a parameter.

Due to that it is possible now to read data from PMICs transmitting more
data than 1 byte at once (e.g. mc34708)

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-05-18 08:27:26 +02:00
Lukasz Majewski
c57a226ac4 pmic: dm: Add support for MC34708 for PMIC DM
This patch adds support for MC34708 PMIC, to be used with driver model
(DM).

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-05-18 08:27:26 +02:00
Lukasz Majewski
655b24cea6 pmic: dm: Rewrite pmic_reg_{read|write|clrsetbits} to support 3 bytes transmissions
This commit provides support for transmissions larger than 1 byte for
PMIC devices used with DM (e.g. MC34708 from NXP).

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-05-18 08:27:26 +02:00
Lukasz Majewski
b8a6d6777b pmic: Add support for setting transmission length in uclass private data
The struct uc_pmic_priv's trans_len field stores the number of types to
be transmitted per PMIC transfer.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-05-18 08:27:26 +02:00
Lukasz Majewski
9a84116b31 pmic: fsl: Define number of bytes sent at once by MC34708 PMIC
This patch adds definition of the number of bytes sent at once by the
MC34708 PMIC.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-05-18 08:27:26 +02:00
Lukasz Majewski
07dc39ae02 pmic: fsl: Provide some more definitions for MC34708 PMIC
This commit adds some more defines for MC34708 PMIC.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-05-18 08:27:26 +02:00
Jagan Teki
84a50745a6 configs: imx6dl-mamoj: Enable HAB
Enable Secure boot(HAB) for BTicino Mamoj board.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-05-18 08:23:43 +02:00
Jagan Teki
9e759ce904 configs: imx6dl-mamoj: Add Falcon mode support
Add Falcon mode support to boot Linux directly after SPL.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-05-18 08:23:43 +02:00
Jagan Teki
129ceda202 configs: imx6dl-mamoj: Add DFU support
Add DFU support for BTicino Mamoj board and update
the same steps in README.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Simone CIANNI <simone.cianni@bticino.it>
Signed-off-by: Raffaele RECALCATI <raffaele.recalcati@bticino.it>
2018-05-18 08:23:43 +02:00
Jagan Teki
ddff1def67 configs: imx6dl_mamoj: Enable fastboot and ums
Enable fastboot and ums for host to interact eMMC on
Mamoj board.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Simone CIANNI <simone.cianni@bticino.it>
Signed-off-by: Raffaele RECALCATI <raffaele.recalcati@bticino.it>
2018-05-18 08:23:43 +02:00
Jagan Teki
e810565e23 i.MX6DL: mamoj: Add PFUZE100 support
MX6DL Mamoj boards has Freescale PFUZE100 PMIC, add support
for it through DM_PMIC dt definition.

pmic log:
Reviewed-by: Stefano Babic <sbabic@denx.de>

========
=> pmic list
| Name                            | Parent name         | Parent uclass @ seq
| pfuze100@08                     | i2c@021f8000        | i2c @ 3
=> pmic dev pfuze100@08
dev: 0 @ pfuze100@08
=> pmic dump
Dump pmic: pfuze100@08 registers

0x00: 10 00 00 21 00 01 3f 01 00 7f 00 00 00 00 00 81
0x10: 00 00 3f 00 00 00 00 00 00 00 00 10 00 00 00 00
0x20: 2b 2b 2b 08 c4 00 00 00 00 00 00 00 00 00 2b 2b
0x30: 2b 08 c4 00 00 72 72 72 08 d4 00 00 2c 2c 2c 08
0x40: e4 00 00 2c 2c 2c 08 e4 00 00 6f 6f 6f 08 f4 00
0x50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0x60: 00 00 00 00 00 00 48 00 00 00 10 06 1e 1e 17 10
0x70: 1a 1f 00 00 00 00 00 00 00 00 00 00 00 00 00

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Simone CIANNI <simone.cianni@bticino.it>
Signed-off-by: Raffaele RECALCATI <raffaele.recalcati@bticino.it>
2018-05-18 08:23:43 +02:00
Jagan Teki
dda9892171 i.MX6DL: mamoj: Add I2C support
i.MX6DL Mamoj has i2c3 and i2c4 buses, add support
through DM_I2C with dt definition.

i2c log:
Reviewed-by: Stefano Babic <sbabic@denx.de>

=======
=> i2c bus
Bus 2:  i2c@021a8000
Bus 3:  i2c@021f8000
=> i2c dev 2
Setting bus to 2
=> i2c speed 400000
Setting bus speed to 400000 Hz
=> i2c probe
Valid chip addresses: 20 51 53
=> i2c md 53 0xff
00ff: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff    ................
=> i2c md 51 0xff
00ff: a8 08 40 50 09 43 46 52 42 18 80 8e ae a9 d0 53    ..@P.CFRB......S
=> i2c dev 3
Setting bus to 3
=> i2c speed 100000
Setting bus speed to 100000 Hz
=> i2c probe
Valid chip addresses: 08 40 48 4B
=> i2c md 08 0xff
00ff: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Simone CIANNI <simone.cianni@bticino.it>
Signed-off-by: Raffaele RECALCATI <raffaele.recalcati@bticino.it>
2018-05-18 08:23:43 +02:00
Jagan Teki
1494cc89cb i.MX6: board: Add BTicino i.MX6DL Mamoj initial support
Add initial support for i.MX6DL BTicino Mamoj board.

Mamoh board added:
- SPL
- SPL_DM
- SPL_OF_CONTROL
- DM for U-Boot proper
- OF_CONTROL for U-Boot proper
- eMMC
- FEC
- Boot from eMMC
- Boot from USB SDP

Signed-off-by: Simone CIANNI <simone.cianni@bticino.it>
Signed-off-by: Raffaele RECALCATI <raffaele.recalcati@bticino.it>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-05-18 08:23:43 +02:00
Jagan Teki
0f93f55c86 ARM: i.MX6: dts: Build dtb based on SOC type
Build dtb's based on SOC type instead building arch type.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-05-18 08:23:43 +02:00
Jagan Teki
9faa43c4b5 ARM: dts: i.MX6UL: U-Boot specific dts for u-boot, dm-spl
u-boot,dm-spl property is specific to U-Boot, so move it into
*u-boot.dtsi files for relevant i.MX6UL files.

This make syncing Linux dts files straight forward.

Also update the MAINTAINERS file for dts files.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-05-18 08:23:43 +02:00
Jagan Teki
067a9daeb5 ARM: dts: imx6ul-isiot: Move usdhc2 into dtsi
Move usdhc2 node along with pinctrl to imx6ul-isiot.dts
from imx6ul-isiot-emmc.dts

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-05-18 08:23:43 +02:00
Jagan Teki
2175637843 ARM: dts: i.MX6QDL: U-Boot specific dts for u-boot, dm-spl
u-boot,dm-spl property is specific to U-Boot, so move it into
*u-boot.dtsi files for relevant i.MX6QDL files.

This make syncing Linux dts files straight forward.

Also update the MAINTAINERS file for dts files.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-05-18 08:23:43 +02:00
Guillaume GARDET
a18e93d050 imx6: sabrelite: update defconfig to use distro defaults
Boot tested with boot.scr script and EFI/Grub2 on mmc0 and mmc1 slots on sabrelite board.

Signed-off-by: Guillaume GARDET <guillaume.gardet@free.fr>
Cc: Troy Kisky <troy.kisky@boundarydevices.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Gary Bisson <gary.bisson@boundarydevices.com>
2018-05-17 19:10:08 +02:00
Guillaume GARDET
cc5d7dcb61 imx6: Convert sabrelite and nitrogen6x boards to distro boot support
Boot tested on sabrelite board.

Signed-off-by: Guillaume GARDET <guillaume.gardet@free.fr>
Cc: Troy Kisky <troy.kisky@boundarydevices.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Gary Bisson <gary.bisson@boundarydevices.com>
Tested-by: Denis Pynkin <denis.pynkin@collabora.com>
2018-05-17 19:10:07 +02:00
Tom Rini
233719cc40 Merge git://www.denx.de/git/u-boot-marvell 2018-05-17 12:38:30 -04:00
Chris Packham
f6e62ee04c net: MVGBE don't automatically select PHYLIB
When Kconfig support was added for MVGBE it included automatically
selected PHYLIB support. But MVGBE does not need PHYLIB it will build
fine without it. Commit ed52ea507f ("net: add Kconfig for MVGBE")
should have been a no-op in terms of build size but because of the
selecting PHYLIB the openrd configs increased in size.

Remove the automatic selection of PHYLIB, boards that need it will have
already enabled it in their config header file.

Fixes: commit ed52ea507f ("net: add Kconfig for MVGBE")
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-05-17 17:38:31 +02:00
Chris Packham
6a9f797623 ARM: kirkwood: Add device-tree for sheevaplug
Import the dts files from Linux 4.17 and enable device tree control in
u-boot.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-05-17 17:35:26 +02:00
Chris Packham
72f4013e95 ARM: kirkwood: Add device-tree for pogo_e02
Import the dts files from Linux 4.17 and enable CONFIG_OF_CONTROL.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-05-17 17:35:26 +02:00
Chris Packham
e800ace560 ARM: kirkwood: Add device-tree for openrd
Import the dts files from Linux 4.17 and enable CONFIG_OF_CONTROL.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-05-17 17:35:25 +02:00
Chris Packham
122b821189 ARM: kirkwood: Add device-tree for nas220
Import the dts file from Linux 4.17 and enable CONFIG_OF_CONTROL.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-05-17 17:35:25 +02:00
Chris Packham
519944e3c5 ARM: kirkwood: Add device-tree for iconnect
Import the dts files from Linux 4.17 and enable CONFIG_OF_CONTROL.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-05-17 17:35:25 +02:00
Chris Packham
c8faf97e9a ARM: kirkwood: Add device-tree for ib62x0
Import the dts files from Linux 4.17 and enable CONFIG_OF_CONTROL.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-05-17 17:35:25 +02:00
Chris Packham
3f023b2c81 ARM: kirkwood: Add device-tree for guruplug
Import the dts files from Linux 4.17 and enable CONFIG_OF_CONTROL.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-05-17 17:35:25 +02:00
Chris Packham
0b28f86545 ARM: kirkwood: Add device-tree for goflexhome
Import the dts files from Linux 4.17 and enable CONFIG_OF_CONTROL.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-05-17 17:35:25 +02:00
Chris Packham
f1f41dd770 ARM: kirkwood: Add device-tree for dockstar
Import the dts files from Linux 4.17 and enable CONFIG_OF_CONTROL.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-05-17 17:35:25 +02:00
Chris Packham
07076ac5f3 ARM: kirkwood: Add device-tree for dns325
Import the dts files from Linux 4.17 and enable CONFIG_OF_CONTROL.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-05-17 17:35:25 +02:00
Chris Packham
060c85d41c ARM: add devicetree files for kirkwood SoC
These files are taken verbatim from the Linux kernel 4.17

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-05-17 17:35:25 +02:00
Lukasz Majewski
768cce8b79 dts: pinctrl: Provide IMX_PAD_SION definition for imx53 pinctrl
The SION pin must be set for proper operation of I2C when DM is enabled.

When legacy I2C is used, this bit is set implicitly in the u-boot code:
arch/arm/include/asm/arch-mx5/iomux-mx53.h:92:
MX53_PAD_KEY_ROW3__I2C2_SDA = IOMUX_PAD(0x368, 0x040, 4 |
	IOMUX_CONFIG_SION, 0x820, 0, NO_PAD_CTRL),

The Linux kernel uses similar approach with:
arch/arm/boot/dts/imx53-tqma53.dtsi:182:
	MX53_PAD_KEY_ROW3__I2C2_SDA             0xc0000000

After applying this patch it is possible to have the I2C working with DM
on imx53 devices:

MX53_PAD_KEY_ROW3__I2C2_SDA (0x1ee | IMX_PAD_SION)

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2018-05-17 12:13:00 +02:00
Lukasz Majewski
0a107afde6 dts: imx53: Add gpio and i2c nodes to imx53.dtsi file
Those DTS nodes has been ported from Linux kernel (v4.16)

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2018-05-17 12:12:45 +02:00
Sebastian Reichel
499efc08b0 ge: ppd: move CONFIG_ENV_IS_IN_MMC to defconfig
CONFIG_ENV_IS_IN_MMC must be declared in defconfig to properly
support "env save".

Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
2018-05-17 12:09:41 +02:00
Peter Robinson
30e44c8e0a mx6: remove duplicated BOUNCE_BUFFER defines
The mx6_common.h file already defines BOUNCE_BUFFER so no need to
definit it again in specific configs.

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Acked-by: Lukasz Majewski <lukma@denx.de>
2018-05-17 12:05:07 +02:00
Peter Robinson
02ada2d958 mx6: Select CONFIG_MP with MX6_SMP
It makes sense to select the MP multi processor option at the same time we
select the other SMP options needed for SMP capable i.MX6 SoCs.

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
2018-05-17 12:04:22 +02:00
Peter Robinson
5bbf1a7856 mx7: remove empty ifndef statement
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
2018-05-17 12:03:56 +02:00
Peter Robinson
8f5b794394 mx6 common: remove dangling comment
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
2018-05-17 12:03:29 +02:00
Magnus Lilja
71720d6793 mx31: Convert MX31_HCLK_FREQ and MX31_CLK32 to Kconfig.
Also remove the #ifdef's from clock.h since the Kconfig values defaults
the to old default values in clock.h.

Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-05-17 12:02:28 +02:00
Magnus Lilja
3159ec64f5 mx31pdk: Convert CONFIG_MX31 flag to use Kconfig.
Move CONFIG_MX31 from mx31pdk.h to mx31pdk_defconfig and introduce
necessary Kconfig changes as well.

Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-05-17 12:02:24 +02:00
Ian Ray
51a42bea52 board: ge: bx50v3: remove redundant targets
This replaces TARGET_GE_B{4,6,8}50V3 with common TARGET_GE_BX50V3.
The boards are identified automatically at runtime.

Signed-off-by: Ian Ray <ian.ray@ge.com>
Signed-off-by: Nandor Han <nandor.han@ge.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
2018-05-17 11:58:48 +02:00
Ian Ray
06a3e4389c board: ge: bx50v3: configure video arguments using VPD
Configure video arguments at run-time instead of at compile-time.

Signed-off-by: Ian Ray <ian.ray@ge.com>
Signed-off-by: Nandor Han <nandor.han@ge.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
2018-05-17 11:54:24 +02:00
Ian Ray
7927ff7a3a board: ge: bx50v3: use VPD instead of compile-time checks
B{46}50v3s have an internal LCD that needs to be configured,
in comparison with B850v3 which has only external displays.

Use VPD instead of `CONFIG_TARGET_GE_B{4,6,8}50V3' compile-time
checks to correct initialize video based on the monitor type.

Signed-off-by: Ian Ray <ian.ray@ge.com>
Signed-off-by: Nandor Han <nandor.han@ge.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
2018-05-17 11:54:24 +02:00
Nandor Han
5e604e2ce7 board: ge: bx50v3: detect the monitor type by reading VPD earlier
Move the VPD reading earlier in order to establish the monitor
type as soon as possible.

The configuration of the specific environment variables needs to be
done later after the environment is configured.

Signed-off-by: Nandor Han <nandor.han@ge.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
2018-05-17 11:54:24 +02:00
Ian Ray
70168a7366 board: ge: bx50v3: fix display support for b{46}50v3
Enable Video PLL to fix non-working display support for Bx50v3
internal displays.

Signed-off-by: Ian Ray <ian.ray@ge.com>
Signed-off-by: Nandor Han <nandor.han@ge.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
2018-05-17 11:54:24 +02:00
Nandor Han
5ce9a1c84f board: ge: bx50v3: unify two switch statements
Simplify process_vpd() by unifying the switch statements handling
product specific configurations.

Signed-off-by: Nandor Han <nandor.han@ge.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
2018-05-17 11:54:24 +02:00
Ian Ray
63f0ec57f2 board: ge: bx50v3: rename detect_baseboard function
The detect_baseboard() function actually determines whether there is an
internal LCD panel or not.  Rename for clarity.

Signed-off-by: Ian Ray <ian.ray@ge.com>
Signed-off-by: Nandor Han <nandor.han@ge.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
2018-05-17 11:54:24 +02:00
Ian Ray
4f92529fa3 board: ge: bx50v3: add winbond SPI NOR support
Add winbond SPI NOR support, which is being used by newer hardware.

Signed-off-by: Ian Ray <ian.ray@ge.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
2018-05-17 11:52:24 +02:00
Tom Rini
00ef2cd6c7 Merge git://git.denx.de/u-boot-dm 2018-05-16 17:32:59 -04:00
Chris Packham
f2d0f5e7ab ARM: re-enable MVGBE for edminiv2
This was unintentionally disabled when moving MVGBE to Kconfig.

Fixes: commit ed52ea507f ("net: add Kconfig for MVGBE")
Signed-off-by: Chris Packham <judge.packham@gmail.com>
2018-05-16 11:38:08 -04:00
Heinrich Schuchardt
4bcd88a2d8 spi: fsl_qspi: remove superfluous assignment
In

	void *rx_addr = NULL;
	rx_add = A;

the first assignment has no effect. Remove it.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-05-16 19:19:24 +05:30
Heinrich Schuchardt
266580612f spi: lpc32xx: simplify logical expression
A & A & B == A & B

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-05-16 19:19:06 +05:30
Heinrich Schuchardt
8fad5e0b11 spi: atcspi200: avoid NULL dereference
For SPI_XFER_BEGIN | SPI_XFER_END the code sets data_out = NULL.
In the debug statement we should not dereference this value.
As we do not transfer any data the debug statement is not needed in this
case anyway.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-05-16 19:18:41 +05:30
Ashish Kumar
4eaa2fa169 sf: Default page size Spansion flash "S25FS512S" is 256b
page size for JEDEC EXT starting 0x4d00 is 512b,
except JEDEC ID 0x215, 0x216 and 0x220

Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
[jagan: added proper commit message]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-05-16 18:56:49 +05:30
Kimmo Rautkoski
39b9e9bc72 sf: Add support for ISSI is25wp
Added support for is25wp032, is25wp064 and is25wp128.

Signed-off-by: Kimmo Rautkoski <ext-kimmo.rautkoski@vaisala.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-05-16 18:50:25 +05:30
Patrice Chotard
9938e068fa ARM: dts: stm32: Update qspi bindings for stm32f746
Align qspi bindings following kernel dt-bindings
Documentation/devicetree/bindings/mtd/stm32-quadspi.txt
from kernel v4.17-rc1.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-05-16 18:41:21 +05:30
Patrice Chotard
9582100eee ARM: dts: stm32: Add quadspi reset for stm32f746
Add missing reset property in quadspi node.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-05-16 18:41:21 +05:30
Patrice Chotard
5e46123bf3 spi: stm32_qspi: Add reset support
In some situation, QSPI controller is already configured by an early
boot stage, adding reset support will insure that QSPI controller is
started from a pristine state.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-05-16 18:41:21 +05:30
Patrice Chotard
2a6ca73691 spi: stm32_qspi: Use dev_read_xxx API
Use dev_read_xxx() instead of old manner fdt_xxx() API

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-05-16 18:41:21 +05:30
Christophe Kerello
495f3b2ae5 spi: stm32_qspi: Add chip select management
Quad-SPI interface is able to manage 2 spi nor devices.
FSEL bit selects the flash memory to be addressed in single flash mode.

Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-05-16 18:41:21 +05:30
Christophe Kerello
76afe56a44 spi: stm32_qspi: Add st, stm32f469-qspi compatible string
Add "st,stm32f469-qspi" compatible which is used on kernel side.
This will be necessary when DT will be synchronised from kernel.

Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-05-16 18:41:21 +05:30
Christophe Kerello
09e1772067 spi: stm32_qspi: Align reg-names with kernel 4.12 RC1
Align qspi bindings following kernel dt-bindings
Documentation/devicetree/bindings/mtd/stm32-quadspi.txt
from kernel v4.12-rc1.

Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-05-16 18:41:21 +05:30
Patrice Chotard
8c4592d278 spi: stm32_qspi: Sort include files alphabetically
Sort include files by alphabetical order

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-05-16 18:41:21 +05:30
Patrick Delaunay
936abadac8 spi: stm32_qspi: Solve issue detected by checkpatch
Fix parameters function alingemnt
Fix variable declaration

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-05-16 18:41:21 +05:30
Patrice Chotard
12e7c91a0b spi: stm32_qspi: Remove CONFIG_CLK flag
As all platforms which uses this driver have CONFIG_CLK flag
enable in their defconfig, we can remove it from driver code.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-05-16 18:41:21 +05:30
Kever Yang
f717b4c8e7 pinctrl: do not set_state for device without valid ofnode
Not all the udevice have a available DT node, eg. rksdmmc@ff500000.blk
which add by mmc_bind(), these device do not have/need set pinctrl
state.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-05-16 00:25:19 -06:00
Lothar Waßmann
409fc029c4 tools: buildman: Don't use the working dir as build dir
When the U-Boot base directory happens to have the same name as the branch
that buildman is directed to use via the '-b' option and no output
directory is specified with '-o', buildman happily starts removing the
whole U-Boot sources eventually only stopped with the error message:

OSError: [Errno 20] Not a directory: '../<branch-name>/boards.cfg

Add a check to avoid this and also deal with the case where '-o' points
to the source directory, or any subdirectory of it.

Finally, tidy up the confusing logic for removing the old tree when using
-b. This is only done when building a branch.

Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Lothar Waßmann <LW@KARO-electronics.de>
2018-05-16 00:25:19 -06:00
Jaehoon Chung
105e3d84e5 ARM: dts: exynos5: add the interrupt-parent property
Add the interrupt-parent property as gic.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Anand Moon <linux.amoon@gmail.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2018-05-16 11:25:12 +09:00
Jaehoon Chung
631bacefb3 ARM: dts: exynos5: remove the duplicated nodes
Remove the duplicated gic and combiner nodes in exynos5.dtsi.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Anand Moon <linux.amoon@gmail.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2018-05-16 11:25:12 +09:00
Bryan O'Donoghue
31dd8efeb6 usb: composite convert __set_bit to generic_set_bit
Compiling the f_mass_storage driver for an x86 target results in a
compilation error as set_bit and clear_bit are provided by bitops.h

To address that situation we discussed on the list moving to
genetic_set_bit() instead.

Doing a quick grep for similar situations in drivers/usb shows that the
composite device is using __set_bit().

This patch switches over to generic_set_bit to maintain consistency between
the two gadget drivers.

Signed-off-by: Bryan O'Donoghue <pure.logic@nexus-software.ie>
Cc: Lukasz Majewski <lukma@denx.de>
Cc: Marek Vasut <marex@denx.de>
2018-05-15 21:44:05 -04:00
Bryan O'Donoghue
5ac73f6879 usb: f_mass_storage: Fix set_bit and clear_bit usage
Compiling the f_mass_storage driver for an x86 target results in a
compilation error as set_bit and clear_bit are provided by bitops.h

Looking at the provenance of the current u-boot code and the git change
history in the kernel, it looks like we have a local copy of set_bit and
clear_bit as a hold-over from porting the Linux driver into u-boot.

These days __set_bit and __clear_bit are optionally provided by an arch and
can be used as inputs to generic_bit_set and generic_bit_clear.

This patch switches over to generic_set_bit and generic_clear_bit to
accommodate.

Tested on i.MX WaRP7 and Intel Edison

Signed-off-by: Bryan O'Donoghue <pure.logic@nexus-software.ie>
Cc: Lukasz Majewski <lukma@denx.de>
Cc: Marek Vasut <marex@denx.de>
2018-05-15 21:44:05 -04:00
Bryan O'Donoghue
73171c8d53 nds32: Define PLATFORM__CLEAR_BIT for generic_clear_bit()
nds2 bitops.h provides a __clear_bit() but does not define
PLATFORM__CLEAR_BIT as a result generic_clear_bit() is used instead of the
architecturally provided __clear_bit().

This patch defines PLATFORM__CLEAR_BIT which means that __clear_bit() in
nds32 bitops.h will be called whenever generic_clear_bit() is called - as
opposed to the default cross-platform generic_clear_bit().

Signed-off-by: Bryan O'Donoghue <pure.logic@nexus-software.ie>
Cc: Macpaul Lin <macpaul@andestech.com>
2018-05-15 21:44:05 -04:00
Bryan O'Donoghue
76b916f233 nds32: Define PLATFORM__SET_BIT for generic_set_bit()
nds32 bitops.h provides a __set_bit() but does not define PLATFORM__SET_BIT
as a result generic_set_bit() is used instead of the architecturally
provided __set_bit().

This patch defines PLATFORM__SET_BIT which means that __set_bit() in nds32
bitops.h will be called whenever generic_set_bit() is called - as opposed
to the default cross-platform generic_set_bit().

Signed-off-by: Bryan O'Donoghue <pure.logic@nexus-software.ie>
Cc: Macpaul Lin <macpaul@andestech.com>
2018-05-15 21:44:05 -04:00
Bryan O'Donoghue
ff83066cc7 nios2: Define PLATFORM__CLEAR_BIT for generic_clear_bit()
nios2 bitops.h provides a __clear_bit() but does not define
PLATFORM__CLEAR_BIT as a result generic_clear_bit() is used instead of the
architecturally provided __clear_bit().

This patch defines PLATFORM__CLEAR_BIT which means that __clear_bit() in
nios2 bitops.h will be called whenever generic_clear_bit() is called - as
opposed to the default cross-platform generic_clear_bit().

Signed-off-by: Bryan O'Donoghue <pure.logic@nexus-software.ie>
Cc: Thomas Chou <thomas@wytron.com.tw>
2018-05-15 21:44:05 -04:00
Bryan O'Donoghue
7ed4370bb9 nios2: Define PLATFORM__SET_BIT for generic_set_bit()
nios2 bitops.h provides a __set_bit() but does not define PLATFORM__SET_BIT
as a result generic_set_bit() is used instead of the architecturally
provided __set_bit().

This patch defines PLATFORM__SET_BIT which means that __set_bit() in nios2
bitops.h will be called whenever generic_set_bit() is called - as opposed
to the default cross-platform generic_set_bit().

Signed-off-by: Bryan O'Donoghue <pure.logic@nexus-software.ie>
Cc: Thomas Chou <thomas@wytron.com.tw>
2018-05-15 21:44:05 -04:00
Bryan O'Donoghue
accdce5f86 riscv: Define PLATFORM__CLEAR_BIT for generic_clear_bit()
riscv bitops.h provides a __clear_bit() but does not define
PLATFORM__CLEAR_BIT as a result generic_clear_bit() is used instead of the
architecturally provided __clear_bit().

This patch defines PLATFORM__CLEAR_BIT which means that __clear_bit() in
riscv bitops.h will be called whenever generic_clear_bit() is called - as
opposed to the default cross-platform generic_clear_bit().

Signed-off-by: Bryan O'Donoghue <pure.logic@nexus-software.ie>
Cc: Rick Chen <rick@andestech.com>
Cc: Greentime Hu <green.hu@gmail.com>
2018-05-15 21:44:05 -04:00
Bryan O'Donoghue
820cba2ce8 riscv: Define PLATFORM__SET_BIT for generic_set_bit()
riscv bitops.h provides a __set_bit() but does not define PLATFORM__SET_BIT
as a result generic_set_bit() is used instead of the architecturally
provided __set_bit().

This patch defines PLATFORM__SET_BIT which means that __set_bit() in x86
bitops.h will be called whenever generic_set_bit() is called - as opposed
to the default cross-platform generic_set_bit().

Signed-off-by: Bryan O'Donoghue <pure.logic@nexus-software.ie>
Cc: Rick Chen <rick@andestech.com>
Cc: Greentime Hu <green.hu@gmail.com>
2018-05-15 21:44:05 -04:00
Bryan O'Donoghue
30fe8b05b3 x86: Define PLATFORM__SET_BIT for generic_set_bit()
x86 bitops.h provides a __set_bit() but does not define PLATFORM__SET_BIT
as a result generic_set_bit() is used instead of the architecturally
provided __set_bit().

This patch defines PLATFORM__SET_BIT which means that __set_bit() in x86
bitops.h will be called whenever generic_set_bit() is called - as opposed
to the default cross-platform generic_set_bit().

Signed-off-by: Bryan O'Donoghue <pure.logic@nexus-software.ie>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
2018-05-15 21:44:05 -04:00
Chris Packham
0315d6959f ARM: mvebu: a38x: Add missing SPDX license identfier
mv_ddr_build_message.c is generated in Marvell's standalone mv_ddr code.
When imported into u-boot we need to add the appropriate SPDX tag and
re-format it slightly.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
2018-05-15 09:08:00 -04:00
Tom Rini
c75990889d Merge branch 'master' of git://git.denx.de/u-boot-video 2018-05-15 08:29:24 -04:00
Vasily Khoruzhick
3ecec5aadd dts: sunxi: add PWM node for sun50i
Add PWM definition to sun50i-a64.dtsi

Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
2018-05-15 08:18:14 +02:00
Vasily Khoruzhick
1c353aea2b pwm: sunxi: add support for PWM found on Allwinner A64
This commit adds basic support for PWM found on Allwinner A64.
It can be used for pwm_backlight driver (e.g. for Pinebook)

Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
2018-05-15 08:18:09 +02:00
Vasily Khoruzhick
1005e4e5f6 video: dw_hdmi: fix HSYNC and VSYNC polarity settings
Currently dw_hdmi configures HSYNC polarity using VSYNC setting from
EDID and vice versa. Fix it, since it breaks displays where HSYNC
and VSYNC polarity differs

Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@siol.net>
2018-05-15 08:03:42 +02:00
Vasily Khoruzhick
c7cb17e892 sunxi: video: HDMI: use correct bits for HSYNC and VSYNC polarity.
HSYNC is bit 8, and VSYNC is bit 9.

Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@siol.net>
2018-05-15 08:03:04 +02:00
Ramon Fried
b70fe965bb mmc: sdhci: Check that ops are defined
The check is necessary to avoid NULL pointer dereference.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Michal Simek <michal.simek@xilinx.com>
2018-05-14 21:28:38 -04:00
Chris Packham
ed52ea507f net: add Kconfig for MVGBE
Add Kconfig for MVGBE and update boards to select this.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2018-05-14 21:28:38 -04:00
Chris Packham
edcf7eacbd net: mvgbe: remove CONFIG_DOVE
Nothing defines CONFIG_DOVE so remove the code that uses it.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-05-14 21:28:38 -04:00
Chris Packham
4b4dc5211e net: bootp: Fix compile error processing ntpserver option
When the following configuration is set

  # CONFIG_CMD_DHCP is not set
  CONFIG_CMD_BOOTP=y
  CONFIG_BOOTP_NTPSERVER=y

The following compile error is observed

  error: used struct type value where scalar is required
    if (net_ntp_server)
        ^~~~~~~~~~~~~~

Resolve this by checking net_ntp_server.s_addr instead.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-05-14 21:28:38 -04:00
Chris Packham
9b23c73d5e net: Add Kconfig option for BOOTP_NTPSERVER
Add a Kconfig option for BOOTP_NTPSERVER to enable the DHCP/BOOTP option
to configure the sntp server address.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-05-14 21:28:38 -04:00
Mario Six
a8ca5c8adb treewide: Move CONFIG_PHY_MARVELL to Kconfig
The CONFIG_PHY_MARVELL has already been migrated to Kconfig (some boards
already had it in their Kconfig), but had not been moved for older
boards.

Move it to the defconfigs for all boards.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-05-14 21:28:38 -04:00
Tom Rini
db6b0281ec Merge branch 'master' of git://git.denx.de/u-boot-rockchip 2018-05-14 18:13:59 -04:00
Jonathan Gray
ed1030e152 rockchip: clk: rk3288: handle clk_enable requests for GMAC
Since b0ba1e7e9d
(rockchip: clk: rk3288: add clk_enable function and support USB HOST0/HSIC)
Ethernet no longer probes on RK3288.

Add no-ops for GMAC clocks observed to be requested which match the
clk_enable cases in RK3368 and RK3399.

Signed-off-by: Jonathan Gray <jsg@jsg.id.au>
Cc: Wadim Egorov <w.egorov@phytec.de>
Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-05-14 17:30:40 +02:00
Jonathan Gray
b1959bd0b0 rockchip: set SYS_NS16550_MEM32 for all SoCs
Add back part of patch send out as
'rockchip: enable SYS_NS16550 for all SoCs by default' that seems to have
gotten lost when it got merged to set SYS_NS16550_MEM32.

Allows serial output to work on tinker-rk3288 again after
c3c0331db1.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Jonathan Gray <jsg@jsg.id.au>
Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-05-14 17:30:39 +02:00
Tom Rini
ca70cbabdc Merge git://git.denx.de/u-boot-marvell 2018-05-14 08:52:48 -04:00
Marek Behún
ca734a875d phy: marvell: a3700: Fix compatible string for ehci
The DTS file for armada-37xx uses the string "marvell,armada3700-ehci",
but the code searched for "marvell,armada-3700-ehci".

Signed-off-by: Marek Behun <marek.behun@nic.cz>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-05-14 10:01:56 +02:00
Chris Packham
db363dbce7 ARM: mvebu: a38x: use non-zero size for ddr scrubbing
Make ddr3_calc_mem_cs_size() global scope and use it in
ddr3_new_tip_ecc_scrub to correctly initialize all of DDR memory.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-05-14 10:01:56 +02:00
Chris Packham
e6f61622d3 ARM: mvebu: a38x: restore support for setting timing
This restores support for configuring the timing mode based on the
ddr_topology. This was originally implemented in commit 90bcc3d38d
("driver/ddr: Add support for setting timing in hws_topology_map") but
was removed as part of the upstream sync.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-05-14 10:01:56 +02:00
Chris Packham
2b4ffbf6b4 ARM: mvebu: a38x: sync ddr training code with upstream
This syncs drivers/ddr/marvell/a38x/ with the mv_ddr-armada-17.10 branch
of https://github.com/MarvellEmbeddedProcessors/mv-ddr-marvell.git.

The upstream code is incorporated omitting the ddr4 and apn806 and
folding the nested a38x directory up one level. After that a
semi-automated step is used to drop unused features with unifdef

  find drivers/ddr/marvell/a38x/ -name '*.[ch]' | \
    xargs unifdef -m -UMV_DDR -UMV_DDR_ATF -UCONFIG_DDR4 \
		-UCONFIG_APN806 -UCONFIG_MC_STATIC \
		-UCONFIG_MC_STATIC_PRINT -UCONFIG_PHY_STATIC \
		-UCONFIG_64BIT

INTER_REGS_BASE is updated to be defined as SOC_REGS_PHY_BASE.

Some now empty files are removed and the ternary license is replaced
with a SPDX GPL-2.0+ identifier.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-05-14 10:01:56 +02:00
Chris Packham
00a7767766 ARM: mvebu: a38x: remove some unused code
No in-tree code defines SUPPORT_STATIC_DUNIT_CONFIG or
STATIC_ALGO_SUPPORT. Remove ddr3_a38x_mc_static.h and use unifdef to
remove unused sections in the rest of the ddr/marvell/a38x code.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-05-14 10:01:56 +02:00
Chris Packham
c4195d5553 ARM: mvebu: a38x: move sys_env_device_rev_get
Move sys_env_device_rev_get() from the ddr training code to
sys_env_lib.c (which currently resides with the serdes code). This
brings sys_env_device_rev_get() into line with sys_env_device_id_get()
and sys_env_model_get().

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-05-14 10:01:56 +02:00
Chris Packham
e6fce12d14 ARM: mvebu: a38x: move definition of PEX_CFG_DIRECT_ACCESS
PEX_CFG_DIRECT_ACCESS was defined in ddr3_hws_hw_training_def.h despite
only being used in the serdes code. Move this definition to ctrl_pex.h
where all the other PEX defines are. Also remove the duplicate
definition of PEX_DEVICE_AND_VENDOR_ID which is already defined in
ctrl_pex.h.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-05-14 10:01:56 +02:00
Marek Behún
80af1a9ef6 arm64: mvebu: Add basic support for the Turris Mox board
This adds basic support for the Turris Mox board from CZ.NIC, which is
currently being crowdfunded on Indiegogo.

Turris Mox is as modular router based on the Armada 3720 SOC (same as
EspressoBin).

The basic module can be extended by different modules. The device tree
binary for the kernel can be dependent on which modules are connected,
and in what order. Because of this, the board specific code creates
in U-Boot a variable called module_topology, which carries this
information.

Signed-off-by: Marek Behun <marek.behun@nic.cz>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-05-14 10:00:15 +02:00
Marek Behún
2b69a67389 watchdog: Add support for Armada 37xx CPU watchdog
This adds support for the CPU watchdog found on Marvell Armada 37xx
SoCs.

There are 4 counters which can be set as CPU watchdog counters.
This driver uses the second counter (ID 1, counting from 0)
(Marvell's Linux also uses second counter by default).
In the future it could be adapted to use other counters, with
definition in the device tree.

Signed-off-by: Marek Behun <marek.behun@nic.cz>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-05-14 10:00:15 +02:00
Marek Behún
cf2cf8510a net: mvneta: Fix fault when wrong device tree
The driver does not check id phy_connect failed (for example on wrong
property name in device tree). In such a case a fault occurs and the
CPU is restarted.

Signed-off-by: Marek Behun <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-05-14 10:00:15 +02:00
Marek Behún
2d7a0f4399 phy: marvell: core: Cosmetic fixes
Move the reg_set* functions into comphy.h as static inline functions.
Change return type of get_*_string to const char *.

Signed-off-by: Marek Behun <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-05-14 10:00:15 +02:00
Marek Behún
dd77690c43 clk: armada-37xx: Support soc_clk_dump
Add support for the clk dump command on Armada 37xx.

Signed-off-by: Marek Behun <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-05-14 10:00:15 +02:00
Marek Behún
dbbd5bdd27 spi: mvebu_a3700_spi: Use Armada 37xx clk driver for SPI clock frequency
Since now we have driver for clocks on Armada 37xx, use it to determine
SQF clock frequency for the SPI driver.

Also change the default config files for Armada 37xx devices so that
the clock driver is enabled by default, otherwise the SPI driver cannot
be enabled.

Signed-off-by: Marek Behun <marek.behun@nic.cz>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-05-14 10:00:15 +02:00
Marek Behún
82a248df9a driver: clk: Add support for clocks on Armada 37xx
The drivers are based on Linux driver by Gregory Clement.

The TBG clocks support only the .get_rate method.
  - since setting rate is not supported, the driver computes the rates
    when probing and so subsequent calls to the .get_rate method do not
    read the corresponding registers again

The peripheral clocks support methods .get_rate, .enable and .disable.

  - the .set_parent method theoretically could be supported on some clocks
    (the parent would have to be one of the TBG clocks)

  - the .set_rate method would have to try all the divider values to find
    the best approximation of a given rate, and it doesn't seem like
    this should be needed in U-Boot, therefore not implemented

Signed-off-by: Marek Behun <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-05-14 10:00:15 +02:00
Marek Behún
7288182aa6 phy: marvell: a3700: Save/restore selector reg in SGMII init
In SGMII initialization PIN_PIPE_SEL has to be zero when resetting
the PHY. Since comphy_mux already set the selector register to
correct values, we have to store it's value before setting it to 0
and restore it after SGMII init.

Signed-off-by: Marek Behun <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-05-14 10:00:15 +02:00
Marek Behún
22f418935b phy: marvell: a3700: Use comphy_mux on Armada 37xx.
Lane 0 supports SGMII1 and USB3.
Lane 1 supports SGMII0 and PEX0.
Lane 2 supports SATA0 and USB3.

This is needed for Armada 37xx.

This introduces new device tree bindings. AFAIK there is currently no
driver for Armada 37xx comphy in Linux. When such a driver will be
pushed into Linux, this will need to be rewritten accordingly.

Signed-off-by: Marek Behun <marek.behun@nic.cz>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-05-14 10:00:15 +02:00
Marek Behún
3282a3e75f phy: marvell: a3700: Fix SGMII cfg and stat register addresses
The register addresses on lanes 0 and 1 are switched, first comes 1 and
then 0.

Signed-off-by: Marek Behun <marek.behun@nic.cz>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-05-14 10:00:15 +02:00
Marek Behún
7586ac2b49 phy: marvell: mux: Support nontrivial node order in selector register
Currently comphy_mux supports only trivial order of nodes in pin
selector register, that is lane N on position N*bitcount.

Add support for nontrivial order, with map stored in device tree
property mux-lane-order.

This is needed for Armada 37xx.

As far as I know, there is no driver for Armada 37xx comphy in the
kernel. When such a driver comes, this will need to be rewritten to
support the device tree bindings from the kernel.

Signed-off-by: Marek Behun <marek.behun@nic.cz>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-05-14 10:00:15 +02:00
zachary
7d7f22fbd3 phy: marvell: a3700: revise the USB3 comphy setting during power on
This commit is based on commit d9899826 by
  zachary <zhangzg@marvell.com>
from u-boot-marvell, see
github.com/MarvellEmbeddedProcessors/u-boot-marvell/commit/d9899826

- According to design specification, the transmitter should be set to high
  impedence mode during electrical idle. Thus transmitter should detect RX
  at high impedence mode also, and delay is needed to accommodate high
  impedence off latency. Otherwise the USB3 will have detection issue that
  most of the time the USB3 device can not be detected at all, or be
  detected as USB2 device sometimes.
  Modified registers: RD005C302h (R181h) (0051h) Lane Configuration 1
  Bit 6: set to 1 to let Tx detect Rx at HiZ mode
  Bit [3:4]: set to 2 to be delayed by 2 clock cycles
  Bit 0: set to 1 to set transmitter to high impedance mode during idle.
- USB3 De-emphasize level of -3.5dB is mandatory, but USB3 MAC selects 0x2
  (emphasize disabled) in the MAC_PHY_TXDEEMPH [1:0], while it is supposed
  to select 0x1(3.5dB emphasize). Thus need to override what comes from
  the MAC(by setting register 0x1c2 bit2 to 0x1) and to configure the
  overridded values of MAC_PHY_TXDEEMPH [1:0] to 0x1(bit15 of register
  0x181 and bit0 of register 0x180).
- According to USB3 application note, need to update below comphy
  registers:
  Set max speed generation to USB3.0 5Gbps(set RD005C04Ah bit[11:10] to 1)
  Set capacitor value to 0xF(set RF005C224 bit[3:0] to 0xF)

Signed-off-by: Marek Behun <marek.behun@nic.cz>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-05-14 10:00:15 +02:00
Marek Behún
de49bd0e73 phy: marvell: a3700: Set USB3 RX wait depending on ref clock
According to specification, CFG_PM_RXDLOZ_WAIT should be set to 0x7
when reference clock is at 25 MHz. The specification (at least the
version I have) does not mentoin the setting for 40 MHz reference
clock, but Marvell's U-Boot sets 0xC in that case.

Signed-off-by: Marek Behun <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-05-14 10:00:15 +02:00
Marek Behún
8609358261 phy: marvell: a3700: Access USB3 register indirectly on lane 2
When USB3 is on comphy lane 2 on the Armada 37xx, the registers
have to be accessed indirectly via SATA indirect access.

This is the case of the Turris Mox board from CZ.NIC.

Signed-off-by: Marek Behun <marek.behun@nic.cz>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-05-14 10:00:15 +02:00
Marek Behún
a2745c8803 phy: marvell: a3700: Use reg_set_indirect istead of 2 reg_sets
Create a special function for indirect register setting,
reg_set_indirect, and use it instead of the two calls to reg_set.

Signed-off-by: Marek Behun <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-05-14 10:00:15 +02:00
Marek Behún
1a9283ace5 phy: marvell: a3700: Use (!ret) instead of (ret == 0)
In U-Boot it is usually written this way.

Signed-off-by: Marek Behun <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-05-14 10:00:15 +02:00
Marek Behún
52f026e224 phy: marvell: a3700: Use same timeout for all register polling
The timeout is set to PLL_LOCK_TIMEOUT in every call to
comphy_poll_reg. Remove this parameter from the function.

Signed-off-by: Marek Behun <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-05-14 10:00:15 +02:00
Marek Behún
210f4aae81 phy: marvell: a3700: Don't create functional macro for each register
Currently there is for each register special functional macro, ie:
  LANE_CFG1_ADDR(u)
  GLOB_CLK_SRC_LO_ADDR(u)
  ...
where can be either PCIE or USB3.

Change this to one function PHY_ADDR(unit, addr). The code becomes:
  phy_addr(PCIE, LANE_CFG1)
  phy_addr(PCIE, GLOB_CLK_SRC_LO)
  ...

Signed-off-by: Marek Behun <marek.behun@nic.cz>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-05-14 10:00:15 +02:00
Marek Behún
63cfff9fde phy: marvell: a3700: Use reg_set16 instead of phy_write16
The macro phy_write16 is not used by the rest of the code,
phy_read16 is not used at all.
We also change the macro SGMIIPHY_ADDR to a static inline function.

Signed-off-by: Marek Behun <marek.behun@nic.cz>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-05-14 10:00:15 +02:00
Marek Behún
fae82c8f83 phy: marvell: a3700: Change return type of macro MVEBU_REG
All the calls to reg_set and friends have to cast the first argument
to void __iomem *. Lets change the return type of the MVEBU_REG macro
instead.

Signed-off-by: Marek Behun <marek.behun@nic.cz>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-05-14 10:00:15 +02:00
Marek Vasut
62d77cea31 mmc: Improve tinification
Drop all the extra content from the MMC core, so that tiny MMC support
is really tiny, no fancy anything. That means the tiny MMC support does
only 1-bit transfers at default speed settings. Moreover, this patch
drops duplicate instance of struct mmc mmc_static, which wasted about
360 bytes. Furthermore, since MMC tiny supports only one controller
at all times, get rid of mallocating the ext csd backup and replace
it with static array. All in all, this patch saves ~4 kiB of bloat
from the MMC core, which on platforms with severe limitations can be
beneficial.

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
[trini: Fixup checkpatch.pl style warnings]
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-13 07:57:32 -04:00
Tom Rini
9a66328a37 Merge git://git.denx.de/u-boot-tegra 2018-05-11 15:22:36 -04:00
Tom Rini
57a72d0560 SPDX: Correct SPDX tags from recent xilinx merge
Correct the SPDX tag format.

Fixes: 3b52847a45 ("Merge tag 'xilinx-for-v2018.07' of git://www.denx.de/git/u-boot-microblaze")
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-11 14:54:57 -04:00
Tom Rini
3b52847a45 Merge tag 'xilinx-for-v2018.07' of git://www.denx.de/git/u-boot-microblaze
Xilinx changes for v2018.07

microblaze:
- Align defconfig

zynq:
- Rework fpga initialization and cpuinfo handling

zynqmp:
- Add ZynqMP R5 support
- Wire and enable watchdog on zcu100-revC
- Setup MMU map for DDR at run time
- Show board info based on DT and cleanup IDENT_STRING

zynqmp tools:
- Add read partition support
- Add initial support for Xilinx bif format for boot.bin generation

mmc:
- Fix get_timer usage on 64bit cpus
- Add support for SD3.0 UHS mode

nand-zynq:
- Add support for 16bit buswidth
- Use address cycles from onfi params

scsi:
- convert ceva sata to UCLASS_AHCI

timer:
- Add Cadence TTC for ZynqMP r5

watchdog:
- Minor cadence driver cleanup
2018-05-11 11:45:28 -04:00
Tom Rini
c590e62d3b Merge git://git.denx.de/u-boot-fsl-qoriq 2018-05-11 07:09:21 -04:00
Siva Durga Prasad Paladugu
4b87f2d500 arm64: zynqmp: Enable UHS support for ZCU102 Rev1.0 board
This patch enables UHS support for ZynqMP zcu102 rev 1.0
board.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11 11:13:54 +02:00
Siva Durga Prasad Paladugu
d1f4e39d58 mmc: zynq_sdhci: Add support for SD3.0
This patch adds support of SD3.0 for ZynqMP.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11 11:13:51 +02:00
Siva Durga Prasad Paladugu
b8e25ef16a mmc: sdhci: Read capabilities register1 and update host caps
This patch reads the capabilities register1 and update the host
caps accordingly for mmc layer usage. This patch mainly reads
for UHS capabilities inorder to support SD3.0.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11 10:22:26 +02:00
Siva Durga Prasad Paladugu
ca992e82e4 mmc: sdhci: Invoke platform specific tuning and delay routines
This patch adds support to invoke any platform specific tuning
and delay routines if available.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11 09:38:27 +02:00
Siva Durga Prasad Paladugu
2fc3ed5d06 sdhci: Add new sdhci ops for platform specific tuning and delays
This patch adds new hooks for any platform specific tuning and
tap delays programing. These are needed for supporting
SD3.0.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11 09:38:27 +02:00
Siva Durga Prasad Paladugu
b88a7a4c56 mmc: sdhci: Handle execute tuning command in sdhci_send_command
This patch upadted sdhci_send_command to handle execute tuning
command.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11 09:38:27 +02:00
Siva Durga Prasad Paladugu
2a2d7efe77 mmc: sdhci: Add support for disabling clock
This patch adds support to disable clock if clk_disable
was set and then enable or set clock if the clock was changed
or clock was disabled when clock needs to be enabled.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11 09:38:27 +02:00
Vipul Kumar
36332b6e4b mmc: Changed the datatype of the variable to handle 64-bit arch
This patch changed the datatype of variable "start" from uint to ulong
to work properly on 64-bit machines as well. Also the return type of
get_timer() function is ulong.

Signed-off-by: Vipul Kumar <vipul.kumar@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11 09:38:27 +02:00
Michal Simek
1d6c54ecb3 arm: zynqmp: Add ZynqMP minimal R5 support
Xilinx ZynqMP also contains dual Cortex R5 which can run U-Boot.
This patch is adding minimal support to get U-Boot boot.
U-Boot on R5 runs out of DDR with default configuration that's why
DDR needs to be partitioned if there is something else running on arm64.
Console is done via Cadence uart driver and the first Cadence Triple
Timer Counter is used for time.

This configuration with uart1 was tested on zcu100-revC.

U-Boot 2018.05-rc2-00021-gd058a08d907d (Apr 18 2018 - 14:11:27 +0200)

Model: Xilinx ZynqMP R5
DRAM:  512 MiB
WARNING: Caches not enabled
MMC:
In:    serial@ff010000
Out:   serial@ff010000
Err:   serial@ff010000
Net:   Net Initialization Skipped
No ethernet found.
ZynqMP r5>

There are two ways how to run this on ZynqMP.
1. Run from ZynqMP arm64
tftpb 20000000 u-boot-r5.elf
setenv autostart no && bootelf -p 20000000
cpu 4 disable && cpu 4 release 10000000 lockstep
or
cpu 4 disable && cpu 4 release 10000000 split

2. Load via jtag when directly to R5

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11 09:38:23 +02:00
Alexander Graf
6915dcf359 tools: zynqmpimage: Add bif support
The officially described way to generate boot.bin files for ZynqMP is to
describe the contents of the target binary using a file of the "bif"
format.  This file then links to other files that all get packed into a
bootable image.

This patch adds support to read such a .bif file and generate a respective
ZynqMP boot.bin file that can include the normal image and pmu files, but
also supports image partitions now. This makes it a handy replacement for
the proprietary "bootgen" utility that is currently used to generate
boot.bin files with FSBL.

Signed-off-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11 09:23:44 +02:00
Alexander Graf
b123aff26f MAINTAINERS: Declare tools/zynqmp* as Xilinx maintained
The zynqmpimage.c and the new zynqmpbif.c files are all maintained by
Xilinx for the Zynq platforms. Let's match them accordingly
in the MAINTAINERS file.

Signed-off-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11 09:23:43 +02:00
Alexander Graf
e384cdf873 tools: zynqmpimage: Move defines to header
We will add support for ZynqMP bif input files later, so let's move
all structure definitions into a header file that can be used by that
one as well.

Signed-off-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11 09:23:43 +02:00
Alexander Graf
e9dbfb32ed tools: zynqmpimage: Add partition read support
The zynqmp image format has support for inline partitions which are
used by FSBL to describe payloads that are loaded by FSBL itself.

While we can't create images that contain partitions (yet), we should
still at least be able to examine them and show the user what's inside
when we analyze an image created by bootgen.

Signed-off-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11 09:23:43 +02:00
Michal Simek
ffdf528007 arm64: zynqmp: Show model information instead of custom IDENT_STRING
DISPLAY_BOARDINFO in OF case show model identification string from DT.
Enable this feature instead of custom IDENT_STRING which does the same
thing.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Alexander Graf <agraf@suse.de>
2018-05-11 09:23:43 +02:00
Michal Simek
0478b0b9b6 arm64: zynqmp: Simplify boot_target variable composition
Call calloc for space allocation only at one location and include if/else
to sprintf. This will simplify run time device adding based on id aliases.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Alexander Graf <agraf@suse.de>
2018-05-11 09:23:43 +02:00
Nitin Jain
0678941ae5 arm64: zynqmp: Setup MMU map for DDR at run time
This patch fills the MMU map for DDR at run time based on information read
from Device Tree or automatically detected from static configuration.

The patch is needed because for systems which has for example 1GB of memory
but MMU map is 2GB there could be spurious accesses which was seen in past
when mapping is not fitting with actual memory installed.

Signed-off-by: Nitin Jain <nitin.jain@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11 09:23:43 +02:00
Michal Simek
767afebbcd arm64: zynqmp: Enable cadence WDT for zcu100
Enable watchdog on zcu100 to make sure if there is a bug in the u-boot
there is proper reset.
Watchdog expires and PMU fw is informed and based on setting proper
action is taken.

The patch is enabling reset-on-timeout feature and also fixing fixed
clock rate for watchdog where 100MHz is max (and also default) clock value.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11 09:23:43 +02:00
Michal Simek
4490e013ee arm64: zynqmp: Wire watchdog internals
Enable watchdog in full U-Boot.

Similar changes were done by:
"arm: zynq: Wire watchdog internals"
(sha1: e6cc3b25d7)

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11 09:23:43 +02:00
Michal Simek
5b410deac6 watchdog: cadence: Show used timeout value
Debug message was showing timeout value which was passed to start
function but there is a checking if this value can be setup.
The patch is moving this debug printf function below checking.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11 09:23:43 +02:00
Michal Simek
e00656b2a9 arm64: zynqmp: Reset FPD Watchdog on zcu100
Low level configuration didn't reset FPD Watchdog that's why accessing
it caused u-boot hang.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11 09:23:43 +02:00
Siva Durga Prasad Paladugu
9fdde6c4bb nand: zynq: Send address cycles as per onfi parameter page
Send address cycles as per value read from onfi parameter
page for Read and write commands instead of using a
hard coded value. This may vary for different parts and
hence use it from onfi parameter page value.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11 09:23:43 +02:00
Siva Durga Prasad Paladugu
9ca8388059 nand: zynq: Add support for 16-bit buswidth
This patch adds support for 16-bit buswidth by determining
the bus width based on mio configuration.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11 09:23:43 +02:00
Michal Simek
6de7a5b907 MAINTAINERS: zynqmp: Point to proper zynqmp folder
Point to Zynqmp arm64 cpu folder not to Zynq arm32.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11 09:23:43 +02:00
Michal Simek
d93c666c4c serial: zynq: Remove header depedency on arm header structure
There is no need to have arm hardware header in this driver.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11 09:23:43 +02:00
Michal Simek
72c37d1221 timer: Add Cadence TTC timer counter support
This driver was tested on Xilinx ZynqMP SoC.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11 09:23:43 +02:00
Siva Durga Prasad Paladugu
83ec537dfb microblaze: Dont enable UBI support by default
This patch removes UBI support from defconfig and it can
be enabled from menuconfig as per need.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11 09:23:43 +02:00
Siva Durga Prasad Paladugu
04ab29ab25 arm64: zynqmp: Add new defconfig for zc1275 revB
This patch enables support zc1275 revB board. It has
SD added compared to revA. The same configuration will
work for RevC boards aswell.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11 09:23:43 +02:00
Michal Simek
c3898a8891 scsi: ceva: Convert driver to use UCLASS_AHCI instead of SCSI
In v2018 the patch
"dm: ahci: Correct uclass private data"
(sha1: bfc1c6b483)
was causing an issue for ceva_sata.
But this issue is not in v2018.05-rc1 but still converting to
UCLASS_AHCI would make more sense.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11 09:23:43 +02:00
Michal Simek
0b4b82ad14 arm: zynq: Remove checkboard and enable DISPLAY_CPUINFO
Now that showing silicon version is part of the CPU
info display, let's remove checkboard().

Note that the generic show_board_info() will still
show the DT 'model' property. For instance:

U-Boot 2018.05-rc2-00025-g611b3ee0159b (Apr 19 2018 - 11:23:12 +0200)

CPU:   Zynq 7z045
Silicon: v1.0
Model: Zynq ZC706 Development Board
I2C:   ready

Based on patches from Ariel D'Alessandro <ariel@vanguardiasur.com.ar>,
and Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>

mini configuration doesn't need to show this information.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11 09:23:43 +02:00
Michal Simek
4aba5fb857 arm: zynq: Rework FPGA initialization
This commit moves the FPGA descriptor definition
to mach-zynq, where it makes more sense.

Based on patches from Ariel D'Alessandro <ariel@vanguardiasur.com.ar>
and Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11 09:23:43 +02:00
Michal Simek
57213c5f37 arm: zynq: Enable debug_uart_init in spl when enabled
In past this code was commented and was used for debug purpose.
But there is no reason not to enabled it based on macros.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11 09:23:43 +02:00
Tom Rini
3aba3fd654 Merge git://git.denx.de/u-boot-socfpga 2018-05-10 22:57:41 -04:00
Tom Rini
f739fcd831 SPDX: Convert a few files that were missed before
As part of the main conversion a few files were missed.  These files had
additional whitespace after the '*' and before the SPDX tag and my
previous regex was too strict.  This time I did a grep for all SPDX tags
and then filtered out anything that matched the correct styles.

Fixes: 83d290c56f ("SPDX: Convert all of our single license tags to Linux Kernel style")
Reported-by: Heinrich Schuchardt <xypron.debian@gmx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-10 20:38:35 -04:00
Heinrich Schuchardt
b14619ba62 tools/file2include: avoid incorrect comments
Avoid creating incorrect comments like /* ...*/... */ by printing
'.' instead of '*' inside comments.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-05-10 20:38:34 -04:00
Heinrich Schuchardt
4a8e72954e include: update log2 header from the Linux kernel
Without the patch gcc 8 produces:
warning: ignoring attribute ‘noreturn’ because it conflicts with
attribute ‘const’ [-Wattributes]
 int ____ilog2_NaN(void);

So let's update the include from Linux kernel v4.16.

This removes static checks of ilog2() arguments.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-05-10 20:38:34 -04:00
Heinrich Schuchardt
23c648982b xyz-modem: va_start() must be matched by va_end()
Every va_start() call must be matched by a va_end() call.

scripts/checkpatch.pl required reformatting the complete function
zm_dprintf().

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-05-10 20:38:34 -04:00
Heinrich Schuchardt
e75ac7039a tools/file2include: create Linux style SPDX header
file2include is used to convert a binary file to a C include.
With the patch the SPDX header is written to the first line as
expected by scripts/checkpatch.pl.

Cf. https://www.kernel.org/doc/html/v4.16/process/license-rules.html

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-05-10 20:38:34 -04:00
Hannes Schmelzer
7f1cb1d588 bootm: fix 'memory-fixup' for vxWorks boot
The check for having a memory node within the fdt blob is made wrong, we
fix this here.

Signed-off-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
2018-05-10 20:38:34 -04:00
Alex Kiernan
8140816eea Fix Ymodem build when DEBUG and CONFIG_USE_TINY_PRINTF are selected
Attempting to build with both DEBUG and CONFIG_USE_TINY_PRINTF along
with CONFIG_SPL_YMODEM_SUPPORT fails at link time:

  common/built-in.o: In function `zm_dprintf':
  common/xyzModem.c:190: undefined reference to `vsprintf'

Disable Ymodem debug if we don't have full vsprintf support.

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
2018-05-10 20:38:33 -04:00
Fabio Estevam
53deb24dda board/freescale: Remove invalid fsl email addresses
These fsl email addresses are no longer valid and they do not have a
correspondent nxp.com entry.

Remove all invalid fsl email addresses and mark the boards as orphan.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-05-10 20:38:33 -04:00
Fabio Estevam
ba74491e24 p1022ds: Change Timur's email address
timur@freescale.com is not a valid email for quite some time, so change
it to Timur's updated email.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Acked-by: Timur Tabi <timur@tabi.org>
2018-05-10 20:38:33 -04:00
Lukasz Majewski
4c0d0ffd4c bootcount: display5: config: Enable boot count feature in the display5 board
The boot count is enabled in both SPL and proper u-boot.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
2018-05-10 20:38:33 -04:00
Lukasz Majewski
2dbd5cd966 bootcount: display5: spl: Extend DISPLAY5 board SPL to support bootcount checking
This patch is necessary for providing basic bootcount checking in the case
of using "falcon" boot mode in that board.

It forces u-boot proper boot, when we exceed the number of errors.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
2018-05-10 20:38:32 -04:00
Lukasz Majewski
a8be249463 bootcount: spl: Extend SPL to support bootcount incrementation
This patch adds support for incrementation of the bootcount in SPL.
Such feature is necessary when we do want to use this feature with
'falcon' boot mode (which loads OS directly in SPL).

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-05-10 20:38:32 -04:00
Lukasz Majewski
bc8c440fa4 bootcount: Rewrite autoboot to use wrapper functions from bootcount.h
The code has been refactored to use common wrappers from bootcount.h
header.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Alex Kiernan <alex.kiernan@gmail.com>
2018-05-10 20:38:25 -04:00
Lukasz Majewski
0da7041218 bootcount: Add function wrappers to handle bootcount increment and error checking
Those two functions can be used to provide easy bootcount management.

Signed-off-by: Lukasz Majewski <lukma@denx.de>

Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2018-05-10 20:37:05 -04:00
Lukasz Majewski
c1cd21db62 bootcount: Add include guards into bootcount.h file
This patch adds missing include guards for bootcount.h file.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Alex Kiernan <alex.kiernan@gmail.com>
2018-05-10 20:37:05 -04:00
Lukasz Majewski
afa9609eca bootcount: spl: Enable bootcount support in SPL
New, SPL related config option - CONFIG_SPL_BOOTCOUNT_LIMIT has been
added to allow drivers/bootcount code re-usage in SPL.

This code is necessary to use and setup bootcount in SPL in the case of
falcon boot mode.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Alex Kiernan <alex.kiernan@gmail.com>
2018-05-10 20:37:05 -04:00
Marcel Ziswiler
71cb3d7c78 apalis_t30: fix optional pcie port reset for reliable pcie operation
Allow optionally bringing up the Apalis type specific 4 lane PCIe port
as well as the PCIe switch as found on the Apalis Evaluation board. In
order to avoid violating the PCIe reset timing do this by overriding the
tegra_pcie_board_port_reset() function. Note however that both the
Apalis type specific 4 lane PCIe port as well as the regular Apalis PCIe
port are also left disabled in the device tree by default.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2018-05-10 16:34:30 -07:00
Marcel Ziswiler
b4f9010428 apalis_t30: fix pcie port 0 and 1 pin muxing
Fix optional Apalis type specific 4 lane PCIe port 0 and Apalis PCIe
port 1 pin muxing.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2018-05-10 16:34:30 -07:00
Marcel Ziswiler
6ab8a2b0ee apalis_t30: describe pcie ports
Add some more comments describing the various PCIe ports available.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2018-05-10 16:34:30 -07:00
Marcel Ziswiler
f1333417e8 apalis-tk1: fix pcie reset for reliable gigabit ethernet operation
It turns out that the current PCIe reset implementation in the PCIe
board init function is not quite working reliably due to PCIe reset
timing violations. Fix this by overriding the
tegra_pcie_board_port_reset() function.

Also allow optionally bringing up the PCIe switch as found on the Apalis
Evaluation board. Note however that the Apalis PCIe port is also left
disabled in the device tree by default.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2018-05-10 16:34:21 -07:00
Marcel Ziswiler
de42975141 power: as3722: add as3722_ldo_set_voltage signature to header file
Just like the already present as3722_sd_set_voltage() add the currently
missing signature of the as3722_ldo_set_voltage() function to its header
file.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2018-05-10 16:34:21 -07:00
Marcel Ziswiler
355560d588 pci: tegra: introduce weak tegra_pcie_board_port_reset() function
Introduce a weak tegra_pcie_board_port_reset() function by default
calling the existing tegra_pcie_port_reset() function. Additionally add
a tegra_pcie_port_index_of_port() function to retrieve the specific PCIe
port index if required. This allows overriding the PCIe port reset
functionality from board specific code as e.g. required for Apalis T30
and Apalis TK1.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2018-05-10 16:34:21 -07:00
Marcel Ziswiler
4616e33b6a power: as3722: fix ldo_get/set_enable for ldo index bigger than 7
Fix ldo_get_enable() and ldo_set_enable() functions for LDOs with an
index > 7. Turns out there are actually two separate AS3722_LDO_CONTROL
registers AS3722_LDO_CONTROL0 and AS3722_LDO_CONTROL1. Actually make use
of both. While at it also actually use the enable parameter of the
ldo_set_enable() function which now truly allows disabling as opposed to
only enabling LDOs.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2018-05-10 16:34:20 -07:00
Marcel Ziswiler
c0cb8c8e86 apalis-tk1: add missing as3722 gpio0 configuration
As the AS3722 GPIO0 is also a not connected on our Apalis TK1 module
explicitly configure it to high-impedance as well.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2018-05-10 16:34:20 -07:00
Sanchayan Maity
1c1238f1e1 configs: apalis-tk1: fix boot failure using ext4 rootfs
Trying to boot from an ext4 rootfs fails due to us defaulting to ext3.
While the downstream T20/T30 L4T kernel has issues with ext4 later TK1
L4T should work just fine with it. Hence enable ext4 for sdboot and
usbboot on TK1.

Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2018-05-10 16:34:20 -07:00
Marcel Ziswiler
51cd5a147d configs: colibri_t20: enable mtd
Enable CONFIG_MTD as well to make sure UCLASS_MTD is available

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2018-05-10 16:34:10 -07:00
Marcel Ziswiler
fa91fda8c3 configs: harmony: enable live tree, mtd and ubi
U-Boot on Harmony recently got broken by ongoing driver model resp. live
tree migration work:

U-Boot 2018.03-rc3 (Feb 21 2018 - 15:43:08 +0100)

TEGRA20
Model: NVIDIA Tegra20 Harmony evaluation board
Board: NVIDIA Harmony
DRAM:  1 GiB
Video device 'dc@54200000' cannot allocate frame buffer memory -ensure
the device is set up before relocation
Error binding driver 'tegra_lcd': -28
Some drivers failed to bind
Error binding driver 'generic_simple_bus': -28
Some drivers failed to bind
initcall sequence 3ffa86d0 failed at call 00121dc0 (err=-28)

This commit fixes this by enabling live tree, MTD and UBI for Harmony as
well.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2018-05-10 16:34:10 -07:00
Marcel Ziswiler
4b11a6296a mtd: nand: tegra: convert to driver model and live tree
The Tegra NAND driver recently got broken by ongoing driver model resp.
live tree migration work:

NAND:  Could not decode nand-flash in device tree
Tegra NAND init failed
0 MiB

A patch for NAND uclass support was proposed about a year ago:
https://patchwork.ozlabs.org/patch/722282/

It was not merged and I do not see on-going work for this.

This commit just provides a driver model probe hook to retrieve further
configuration from the live device tree. As there is no NAND ulass as of
yet (ab)using UCLASS_MTD. Once UCLASS_NAND is supported, it would be
possible to migrate to it.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2018-05-10 16:34:10 -07:00
Tom Rini
da342f06b3 Merge git://git.denx.de/u-boot-ubi 2018-05-10 07:17:14 -04:00
Tom Rini
e8f80a5a58 Merge git://git.denx.de/u-boot-sunxi 2018-05-09 12:58:06 -04:00
Yogesh Gaur
a6f2a6eafe driver: net: fsl-mc: updated copyright info
Updated copyright info for the issues reported after running
check-legal test.

Signed-off-by: Yogesh Gaur <yogeshnarayan.gaur@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-05-09 09:17:51 -05:00
Jagdish Gediya
e8c669a3e6 mtd: nand: fsl_ifc: Fix nand waitfunc return value
As per the IFC hardware manual, Most significant byte in nand_fsr
register is the outcome of NAND READ STATUS command.

So status value need to be shifted as per the nand framework
requirement.

Signed-off-by: Jagdish Gediya <jagdish.gediya@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-05-09 09:17:51 -05:00
Hou Zhiqiang
8b40f22900 armv8/fsl-lsch2: make the workaround for PIN MUX erratum A010539 robust
Mask HRESET_B after cleared the the RCW_SRC, because in the workaround
we override the RCW_SRC and if HRESET_B is issued after the override
then SoC cannot find valid RCW as the RCW_SRC was overwritten and
result in hang. So we need to mask HRESET_B in case user asserts it,
and the PORESET_B should be asserted which leads to resampling of
cfg_rcw_src pins and loading of correct RCW_SRC.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-05-09 09:17:51 -05:00
Hou Zhiqiang
945fad57be armv8/fsl-lsch2: correct QMAN clock
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-05-09 09:17:51 -05:00
Sumit Garg
8044900a5b armv8: sec_firmware: Add support for multiple loadables
Enable support for multiple loadable images in SEC firmware FIT image.
Also add example "sec_firmware_ppa.its" file.

Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-05-09 09:17:51 -05:00
Takuma Ueba
6a265aba30 powerpc: mpc85xx: Improve Work-around for Erratum A005125
Work-around for Erratum A005125 must be applied to all cores.

Signed-off-by: Yoshihisa Morizumi <yoshi.morizumi@jp.fujitsu.com>
Signed-off-by: Takuma Ueba <ueba.takuma@jp.fujitsu.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-05-09 09:17:51 -05:00
Ashish Kumar
7d3a532d5d armv8: ls1088: Update 1900MT/s DDR timing to bring consistency
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-05-09 09:17:51 -05:00
Ashish Kumar
11d5f7d895 armv8: ls1088aqds: Enable mdio commands on u-boot prompt
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-05-09 09:17:51 -05:00
Ruchika Gupta
b6bb93de75 armv8: sec_firmware: Remove JR3 from device tree node in all cases
JR3 was getting removed from device tree only if random number
generation was successful. However, if SEC firmware is present,
JR3 should be removed from device tree node irrespective of the
random seed generation as SEC firmware reserves it for it's use.
Not removing it in case of random number generation failure causes
the kernel to crash.

Random number generation was being called twice. This is not
required. If SEC firmware is running, SIP call can be made to the SEC
firmware to get the random number. This call itself would return
failure if function is not supported. Duplicate calling of random
number generation function has been removed.

Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-05-09 09:17:51 -05:00
Ashish Kumar
1cb551cf6a armv8: ls1088a: Move CONFIG_BOOTARGS and CONFIG_CMD_GREPENV to defconfig
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-05-09 09:17:51 -05:00
Sriram Dash
bda33d3c6c armv8: layerscape: Avoid code duplication for TZASC Instantiation
TZASC controller configurations are similar. Put them in a macro and
avoid code duplication.

Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Sriram Dash <sriram.dash@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-05-09 09:17:51 -05:00
Jagdish Gediya
f195fad178 mtd: nand: fsl_ifc: Fix eccstat array overflow for IFC ver >= 2.0.0
Number of ECC status registers i.e. (ECCSTATx) has been increased in
IFC version 2.0.0 due to increase in SRAM size. This is causing
eccstat array to over flow.

So, replace eccstat array with u32 variable to make it fail-safe and
independent of number of ECC status registers or SRAM size.

Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Signed-off-by: Jagdish Gediya <jagdish.gediya@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-05-09 09:17:51 -05:00
Rajat Srivastava
1f55356411 spi: fsl_qspi: Introduce is_controller_busy function
Some SoCs have different endianness of QSPI IP if compared
to endianness of core. The function is_controller_busy()
checks if the QSPI controller is busy or not, considering
the endianness of the QSPI IP.

Signed-off-by: Rajat Srivastava <rajat.srivastava@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-05-09 09:17:51 -05:00
Patrice Chotard
87deefeccc ubifs: avoid assert failed in ubifs.c
This patch solves assert failed displayed in the console during a boot.
The root cause is that the ubifs_inode is not already allocated when
ubifs_printdir and ubifs_finddir functions are called.

Trace showing the issue:
feed 'boot.scr.uimg', ino 94, new f_pos 0x17b40ece
dent->ch.sqnum '7132', creat_sqnum 3886945402880
UBIFS assert failed in ubifs_finddir at 436
INODE ALLOCATION: creat_sqnum '7129'
Found U-Boot script /boot.scr.uimg

Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-05-09 11:53:55 +02:00
Tom Rini
cc95535867 bootm.c: Correct the flush_len used in bootm_load_os()
In do_bootm_states when doing BOOTM_STATE_LOADOS we use load_end
uninitialized and Coverity notes this now.  This however leads down
another interesting path.  We pass this pointer to bootm_load_os and
that in turn uses this uninitialized value immediately to calculate the
flush length, and is wrong.  We do not know what load_end will be until
after bootm_decomp_image is called, so we must only set flush_len after
that.  All of this also makes it clear that the only reason we pass a
pointer for load_end to bootm_load_os is so that we can call lmb_reserve
on success.  Rather than initialize load_end to 0 in do_bootm_states we
can just call lmb_reserve ourself.

Reported-by: Coverity (CID: 175572)
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-05-08 18:50:24 -04:00
Clément Péron
71412d7231 image: fit: Show signatures and hashes for configurations
The signature/hash information are displayed for images but nor for
configurations.

Add subnodes printing in fit_conf_print() like it's done in fit_image_print()

Signed-off-by: Clément Péron <peron.clem@gmail.com>
[trini: Add guards around fit_conf_print to avoid warnings]
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-08 18:50:24 -04:00
Grygorii Strashko
218ac107c5 arm: bitops: fix find_next_zero_bit() for case size < 32
find_next_zero_bit() incorrectly handles cases when:
- total bitmap size < 32
- rest of bits to process

static inline int find_next_zero_bit(void *addr, int size, int offset)
{
	unsigned long *p = ((unsigned long *)addr) + (offset >> 5);
	unsigned long result = offset & ~31UL;
	unsigned long tmp;

	if (offset >= size)
		return size;
	size -= result;
	offset &= 31UL;
	if (offset) {
		tmp = *(p++);
		tmp |= ~0UL >> (32-offset);
		if (size < 32)
[1]
			goto found_first;
		if (~tmp)
			goto found_middle;
		size -= 32;
		result += 32;
	}
	while (size & ~31UL) {
		tmp = *(p++);
		if (~tmp)
			goto found_middle;
		result += 32;
		size -= 32;
	}
[2]
	if (!size)
		return result;
	tmp = *p;

found_first:
[3]  tmp |= ~0UL >> size;

^^^ algo can reach above line from from points:
 [1] offset > 0 and size < 32, tmp[offset-1..0] bits set to 1
 [2] size < 32 - rest of bits to process
 in both cases bits to search are tmp[size-1..0], but line [3] will simply
 set all tmp[31-size..0] bits to 1 and ffz(tmp) below will fail.

example: bitmap size = 16, offset = 0, bitmap is empty.
 code will go through the point [2], tmp = 0x0
 after line [3] => tmp = 0xFFFF and ffz(tmp) will return 16.

found_middle:
	return result + ffz(tmp);
}

Fix it by correctly seting tmp[31..size] bits to 1 in the above case [3].

Fixes: 81e9fe5a29 ("arm: implement find_next_zero_bit function")
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
2018-05-08 18:50:23 -04:00
Neil Armstrong
051ebe3228 cmd: add ADC cli commands
Add an 'adc' cli command to get information from adc devices and to read
"single shot" data.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2018-05-08 18:50:23 -04:00
Mario Six
e097ce4304 pci: Don't use pci_indirect when DM is active
Declaration of indirect PCI bridges is not compatible with DM: Both
define PCI operations, but in different ways. Hence, don't use indirect
bridges if DM is active.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-05-08 18:50:23 -04:00
Mario Six
86da8c12ef gdsys: drivers: Add gdsys_rxaui_ctrl driver
Add a driver for RXAUI control on IHS FPGAs.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-05-08 18:50:23 -04:00
Mario Six
f0bcbe6c18 clk: Add ICS8N3QV01 driver
Add a driver for the ICS8N3QV01 Quad-Frequency Programmable VCXO.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-05-08 18:50:23 -04:00
Mario Six
9a519dfe8a ihs_mdio: Make DM-compatible
Make the ihs_mdio driver DM-compatible, while retaining the old
functionality for not-yet-converted boards.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-05-08 18:50:23 -04:00
Mario Six
9139ac9d49 ihs_mdio: Encapsulate register access
To prepare for DM conversion, encapsulate all register accesses in
function calls.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-05-08 18:50:22 -04:00
Ramon Fried
707e6ef964 db410c: set clk node to be probed before relocation
The clock node is used by the serial driver and it's needed
before relocation.
This patch ensures that the msm-serial driver can actually
use the clock node.

Signed-off-by: Ramon Fried <ramon.fried@linaro.org>
2018-05-08 18:50:22 -04:00
Patrice Chotard
da33b0a1ca ARM: dts: sti: Add stih410-b2260-u-boot.dtsi
STiH410 has 2 PHYs wired on the DWC3 IP, USB2 and USB3 PHYs.
As currently no U-boot driver is available for the USB3 PHY and to avoid
issue during DWC3 drive probe, we use DWC3 IP with only USB2 PHY
using stih410-b2260-u-boot.dtsi file.

Fixes: 2fd4242cc5 ("ubs: xhci-dwc3: Enable USB3 PHY when available")

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-05-08 18:50:22 -04:00
Sam Protsenko
c90a760ffd arm: ti: boot: Extract PARTS_DEFAULT to boot.h
Eliminate code duplication: the same PARTS_DEFAULT was defined in
am57xx_evm.h and in dra7xx_evm.h. Extract it to environment/boot.h and
use in all OMAP5-based boards.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
2018-05-08 18:50:22 -04:00
Marek Vasut
792557d111 spl: socfpga: Generate Arria10 SFP header V1
Generate SoCFPGA boot header version 1 instead of version 0 for Arria10.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Chin Liang See <chin.liang.see@intel.com>
2018-05-08 21:08:42 +02:00
Marek Vasut
cece78fafe tools: socfpga: Add SFP image V1 support
Add support for the SoCFPGA header v1 , which is used on Arria 10.
Thus far the mkimage-socfpga image only supported header format v0
used on Cyclone V and Arria V, but is not supported on Arria 10.
The layout of the v0 and v1 header is similar, yet there are a few
differences, see the patch body for details.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Chin Liang See <chin.liang.see@intel.com>
2018-05-08 21:08:42 +02:00
Marek Vasut
9f0021a50b tools: socfpga: Stop using global struct socfpga_image
The structure is passed around correctly, create local instances
where necessary and zap the global struct socfpga_image instance.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Chin Liang See <chin.liang.see@intel.com>
2018-05-08 21:08:42 +02:00
Marek Vasut
662abc4fc5 image: socfpga: Add SFP image version 1 definition
Add support for the SoCFPGA header v1, which is used on Arria 10.
The layout of the v0 and v1 header is similar, yet there are a few
differences which make it incompatible with previous v0 header, so
add a new entry.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Chin Liang See <chin.liang.see@intel.com>
2018-05-08 21:08:42 +02:00
Marek Vasut
34fc2a6edf ARM: socfpga: Add boot trampoline for Arria10
The Arria10 uses slightly different boot image header than the Gen5 SoCs,
in particular the header itself contains an offset from the start of the
header to which the Arria10 jumps. This offset must not be negative, yet
the header is placed at offset 0x40 of the bootable binary. Therefore, to
jump into U-Boot, add a trampoline just past the Arria10 boot header and
point to this trampoline at fixed offset from the header generated using
the mkimage -T socfpgaimage_v1 . Note that it is not needed to jump back
to offset 0x0 of the image, it is possible to jump directly at the reset
label and save processing two instructions.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Chin Liang See <chin.liang.see@intel.com>
2018-05-08 21:08:42 +02:00
Tom Rini
14249635b6 Merge git://git.denx.de/u-boot-mmc 2018-05-08 13:47:39 -04:00
Tom Rini
1ccd3f14ca Merge git://git.denx.de/u-boot-uniphier 2018-05-08 13:47:26 -04:00
Tom Rini
6417572efa lib/Kconfig: Mark OF_LIBFDT_OVERLAY as depending on OF_LIBFDT
The overlay code is only useful when OF_LIBFDT is set, so mark it as
depending on that first.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-08 09:07:41 -04:00
Neil Armstrong
59beb238d5 adc: add Amlogic Meson SAR ADC driver
This patch adds the driver for the Amlogic Meson Successive Approximation
Register (SAR) A/D Converter based on the Linux IIO driver thanks to the
great work of Martin Blumenstingl.
The driver has been adapted to U-Boot and the ADC UClass.

This patch depends on the regmap "regmap: add regmap_update_bits() helper"
patch and has been tested using the newly introducted "adc" CLI command
in the "cmd: add ADC cli commands" patch.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2018-05-08 09:07:40 -04:00
Neil Armstrong
e068512ca6 test: regmap: add read/modify/write test
Add calls to regmap_read/modify_bits/write even if the proper memory
read/write calls are not executed in sandbox.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-05-08 09:07:40 -04:00
Neil Armstrong
285cbcf97f regmap: add regmap_update_bits() helper
Add the regmap_update_bits() to simply the read/modify/write of registers
in a single command. The function is taken from Linux regmap
implementation.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-05-08 09:07:40 -04:00
Patrice Chotard
dbe2fcb87d ARM: dts: stm32mp157: Add vrefbuf DT node
Add vrefbuf device tree node. This allows to get
a voltage reference for ADCs.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-05-08 09:07:40 -04:00
Fabrice Gasnier
fd92ea0d8b configs: stm32mp15: Enable STM32_VREFBUF flag
Enable vrefbuf on stm32mp15, to be used by ADC.

Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-05-08 09:07:39 -04:00
Fabrice Gasnier
f198bbac66 clk: stm32mp1: Add VREF clock gating
Add VREF clock gating, that may be used by STM32 VREFBUF regulator.

Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-05-08 09:07:39 -04:00
Fabrice Gasnier
93cf0ae775 power: regulator: Add support for stm32-vrefbuf
Add regulator driver for STM32 voltage reference buffer which can be
used as voltage reference for ADCs, DACs and external components through
dedicated VREF+ pin.

Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-05-08 09:07:39 -04:00
Patrice Chotard
743f6c4ae1 configs: stm32mp15_basic: Set regulator relative flags
Enable DM_REGULATOR_STPMU1 flag to activate regulator
driver for STM32MP15 SoC and CMD_REGULATOR flag to be
able to set/get regulator state int U-boot command line.

Disable PMIC_CHILDREN as this flag is not needed in SPL
for STM32MP1.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-05-08 09:07:39 -04:00
Patrice Chotard
21299d3a68 ARM: dts: stm32mp157c-ed1: Add regulator node
Add regulator nodes needed by stpmu1 regulator driver
Add vmmc-supply and vqmmc-supply regulator property for
sdmmc1 and sdmmc2.

Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-05-08 09:07:39 -04:00
Patrice Chotard
1f0dfa1fa0 power: pmic: stpmu1: Add regulator bindings
Add regulator bindings to get access to regulator managed
by drivers/power/regulator/stpmu1.c regulator driver.

Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-05-08 09:07:38 -04:00
Christophe Kerello
069f0b6354 power: regulator: stpmu1: Introduce stpmu1 driver
Enable support for the regulator functions of the STPMU1X PMIC. The
driver implements get/set api for the various BUCKS and LDOs supported
by the PMIC device. This driver is controlled by a device tree node
which includes voltage limits.

Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-05-08 09:07:38 -04:00
Patrice Chotard
7c339bbae6 ARM: dts: stm32mp157: Add SoC pwr regulator entry
Add SoC power regulator entry for reg11, reg18 and usb33
regulator.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-05-08 09:07:38 -04:00
Patrick Delaunay
e8b85e810a stm32mp: regulator: add SoC pwr regulator support
This driver binds and manages the following regulator of
SoC's PWR block :
  - reg11
  - reg18
  - usb33

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-05-08 09:07:38 -04:00
Mario Six
cb61c9ec64 arm: controlcenterdc: Add spi-flash compatible strings
Since kirkwook SPI was recently converted to DM, add compatible strings
to the SPI flash devices to make them work with the new driver.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-05-08 09:07:37 -04:00
Praneeth Bajjuri
b2031ff766 env: ti: android: boot with FIT Image
Boot android over emmc by default thru FIT image

Signed-off-by: Praneeth Bajjuri <praneeth@ti.com>
Suggested-by: Andrew F.Davis <afd@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
2018-05-08 09:07:37 -04:00
Praneeth Bajjuri
58a46f88af configs: TI: Enable FIT Library overlay support
Enable the FDT library overlay support for all TI SOC family.

Without this option, when Loading fdt from FIT image, the
following warning is seen.

"config with overlays but CONFIG_OF_LIBFDT_OVERLAY not set".

Signed-off-by: Praneeth Bajjuri <praneeth@ti.com>
Suggested-by: Andrew F.Davis <afd@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
2018-05-08 09:07:37 -04:00
Praneeth Bajjuri
cd30f3fc9e arm: dra76: fastboot: extend cpu type for getvar command
'commit dda0bd674481 ("arm: dra762: Add support for device package identification")'
introduces ABZ and ACD package identification.

This patch is to extend usage of "fastboot getvar cpu" for
DRA76x ABZ and ACD devices.

Helps in fixing the boot warning.

Warning: fastboot.cpu: unknown CPU rev: 123863298
on
CPU  : DRA762-GP ES1.0 ABZ package
Model: TI AM5748 IDK
Board: AM574x IDK REV 1.0A

Signed-off-by: Praneeth Bajjuri <praneeth@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-05-08 09:07:37 -04:00
Ludovic Desroches
eb85cc10b4 defconfig: at91-sama5d2_ptc_ek: remove unused SYS_EXTRA_OPTIONS
Remove SYS_USE_NANDFLASH, SYS_USE_MMC as they are deprecated and
unused.
The board configurations already use CONFIG_SD_BOOT and
CONFIG_NAND_BOOT respectively.

Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com>
[eugen.hristev@microchip.com: rework on latest u-boot]
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2018-05-08 09:07:36 -04:00
Eugen Hristev
528a42a795 board: sama5d27_som1_ek: Fix the USB vbus power
According to the REVB schematic, fix the USB vbus power enable pin.

Based on original work by Wenyou Yang

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2018-05-08 09:07:36 -04:00
Eugen Hristev
72281cbcf8 configs: at91: sama5: updated mtdparts variable in bootargs
We have a new demo layout of our sama5 boards for the NAND Flash
memory.
According to this new layout, adjust the mtdparts variable in bootargs
to align with this, which is available at :
http://www.at91.com/linux4sam/bin/view/Linux4SAM/Sama5d3XplainedMainPage#NAND_Flash_demo_Memory_map,

Based on original work by Wenyou Yang

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2018-05-08 09:07:36 -04:00
Eugen Hristev
23dd6015ce board: sama5d2_ptc_ek: adjust the smc timings of nand
To fix the issue of write the rootfs.ubi, adjust the smc timings
configuration of the nand controller.

Based on original work by Wenyou Yang

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2018-05-08 09:07:36 -04:00
Ludovic Desroches
8ee54672df gpio: atmel_pio4: give a full configuration when muxing pins
When a pin is muxed to a peripheral or as a GPIO, the only
configuration that can be set is the pullup. It is too restrictive
so this patch allows to give a full configuration.

Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com>
2018-05-08 09:07:36 -04:00
Ludovic Desroches
9ab66d0d20 board: atmel: sama5d2_ptc_ek: update pin configuration for NAND
The drive strength has to be set to medium for the NAND data lines.
With a low drive, we can get some data corruption.

Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com>
2018-05-08 09:07:35 -04:00
Ludovic Desroches
cbccb33584 gpio: atmel_pio4: add drive strength macros
Macros for drive strength configuration were missing.

Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com>
2018-05-08 09:07:35 -04:00
Ley Foon Tan
7c45862f22 pci: intel: Add Intel FPGA PCIe controller driver
Add PCIe driver for Intel FPGA PCIe IP. This driver operates the PCIe IP in
rootport mode only, the EP mode is not supported. The driver is tested
with the Intel e1000e NIC driver.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2018-05-08 09:07:35 -04:00
Michalis Pappas
666028fc7c arm64: Add SMC and HVC commands
This patch adds smc and hvc commands, that allow issuing Secure Monitor
Calls and Hypervisor Calls conforming to the ARM SMC Calling Convention.

Add Kconfig items to allow each command can be individually enabled.

Signed-off-by: Michalis Pappas <mpappas@fastmail.fm>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-05-08 09:07:35 -04:00
Neil Armstrong
42de652272 pinctrl: meson: Update pinmux with new Linux bindings
The pinctrl bindings has changed for Amlogic Meson SoCs since Linux 4.13,
update the pinctrl driver to take this in account.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2018-05-08 09:07:34 -04:00
Neil Armstrong
7d750c3520 ARM64: meson: Sync DT and Bindings with Linux 4.16
Synchronize the Linux Device Tree for Amlogic Meson GX boards from Linux 4.16.0.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2018-05-08 09:07:34 -04:00
Neil Armstrong
f0f3762cb7 ARM: meson: rename GXBB to GX
Taking into account the Amlogic Family name starts with GX, including
the GXBB, GXL and GXM SoCs.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2018-05-08 09:07:34 -04:00
Patrice Chotard
8b41464547 clk: clk_stm32f: Use PLLSAIP as USB 48MHz clock
On all STM32F4 and F7 SoCs  family (except STM32F429), PLLSAI
output P can be used as 48MHz clock source for USB and SDMMC.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Tested By: Bruno Herrera <bruherrera@gmail.com>
2018-05-08 09:07:34 -04:00
Patrick Bruenn
274fb461f4 dm: led: add testcase for "default-state" property
Add two more gpio-leds to sandbox test device tree with default-state
property set to "on"/"off".
Add dm_test_led_default_state() to check that these new LED's are set to
LEDST_ON and LEDST_OFF.

dm: led: add testcase for "default-state" property

Add two more gpio-leds to sandbox test device tree with default-state
property set to "on"/"off".
Add dm_test_led_default_state() to check that these new LED's are set to
LEDST_ON and LEDST_OFF.

Signed-off-by: Patrick Bruenn <p.bruenn@beckhoff.com>
2018-05-08 09:07:33 -04:00
Patrick Bruenn
bc882f5d5c dm: led: auto probe() LEDs with "default-state"
To avoid board specificy LED activation code, automatically
activate gpio-leds with "default-state" property during bind().

Signed-off-by: Patrick Bruenn <p.bruenn@beckhoff.com>
2018-05-08 09:07:33 -04:00
Patrick Bruenn
d90f0d4cae dm: led: Support "default-state" property
Add support for the device tree property "default-state". This feature
might be useful for LEDs indicating "power on" or similar states.

Note: Even with this commit gpio-leds remain in reset state. That's
because the led_gpio is not probed until DM_FLAG_ACTIVATED is set.

Signed-off-by: Patrick Bruenn <p.bruenn@beckhoff.com>
2018-05-08 09:07:33 -04:00
Jassi Brar
732bc7ce3f mmc: support writing sparse images
Provide an alternate path for sparse-images to be
written to MMC. For example, via tftp on platforms
that don't support fastboot protocol. Or when an
image is to written at some offset, rather than the
start of a partition.

Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
[trini: Guard with CONFIG_FASTBOOT_FLASH tests, use LBAF for lbaint_t
        printing]
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-08 09:06:33 -04:00
Andy Yan
e1fd9e6bb8 power: pwm regulator: support live tree
Use live tree compatible api for pwm regulator.

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2018-05-08 13:12:33 +09:00
Patrick Bruenn
55118ec90c dm: mmc: socfpga: call dwmci_probe()
On a socfpga_cyclone5 based board the SD card, was never powered up. For
other dw_mmc based SoCs dwmci_probe() is called in the platform specific
probe(). It seems this call is missing for socfpga_dw_mmc.

With this change DWMCI_PWREN is set by dmwci_init().

Signed-off-by: Patrick Bruenn <p.bruenn@beckhoff.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2018-05-08 13:12:33 +09:00
Jaehoon Chung
72b5a0371d mmc: Kconfig: add the MMC_TRACE config in Kconfig
Add the MMC_TRACE config in Kconfig.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
2018-05-08 13:12:33 +09:00
Jaehoon Chung
d2faadb59c mmc: add the debug message in mmc_set_clock
Add the debug message for checking the mmc clock status.
It's helpful to debug the controlling clock.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
2018-05-08 13:12:33 +09:00
Jaehoon Chung
6511718254 mmc: add the MMC_CLK_ENABLE/DISABLE macro in mmc.h
mmc_set_clock() function has the disable argument as bool type.
When mmc_set_clock is called, it might be passed to "true" or "false".
But it's too confusion whether clock is enabled or disabled with only
"true" and "false".
To prevent the confusion, replace to MMC_CLK_ENABLE/DISABLE macro from
true/false.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
2018-05-08 13:12:33 +09:00
Jaehoon Chung
817669231c lib: fdtdec: drop the old compatible about max77686
Drop the old compatible about max77686.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Acked-by: Lukasz Majewski <lukma@denx.de>
2018-05-08 13:12:33 +09:00
Jaehoon Chung
9c67c4491e power: pmic_max77686: remove the old pmic_max77686 file
max77686 pmic is supporting with max77686.c under pmic/ and regulator/
direnctroy. Remove pmic_max77686.c what didn't use anywhere.
Instead, enable CONFIG_DM_REGULATOR_MAX77686 and
CONFIG_DM_PMIC_MAX77686.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
2018-05-08 13:12:33 +09:00
Jaehoon Chung
8823845547 configs: trats2: enable the max77686 regulator config
Enable the CONFIG_DM_REGULATOR_MAX77686 for using regulator driver.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
2018-05-08 13:11:53 +09:00
Masahiro Yamada
079b54f29e ARM: uniphier: enable CONFIG_PINCONF
Enable the pin configuration feature for UniPhier 64 bit SoCs.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-05-08 10:25:15 +09:00
Masahiro Yamada
57a6c1bf87 pinctrl: uniphier: add ethernet TX pin data for LD20
These are necessary to optimize the drive-strength of the pins.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-05-08 10:25:15 +09:00
Masahiro Yamada
150997a44b pinctrl: uniphier: support drive-strength configuration
This allows our DT to specify drive-strength property.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-05-08 10:25:15 +09:00
Masahiro Yamada
603fd9ead6 pinctrl: uniphier: support per-pin configuration via DT
Currently, the UniPhier pinctrl drivers expose only the pin-group
interface to device tree.

Provide .get_pins_count, .get_pin_name, .pinconf_set hooks to support
pin configuration via 'pins' DT property.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-05-08 10:25:15 +09:00
Masahiro Yamada
03cfc80134 pinctrl: uniphier: include <linux/build_bug.h> instead of <linux/bug.h>
The #include <linux/bug.h> is here to use BUILD_BUG_ON_ZERO().

By replacing it with <linux/build_bug.h>, we can reduce the number of
headers pulled in.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-05-08 10:25:14 +09:00
Masahiro Yamada
7629d0b9bc pinctrl: uniphier: replace printf() with dev_err()
dev_err() is more suitable for printing error messages.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-05-08 10:25:14 +09:00
Masahiro Yamada
d5c0d9a12a pinctrl: uniphier: remove unneeded pin data of LD6b SoC
Since commit f73cfb4d0d ("pinctrl: uniphier: simplify input enable
and delete pin arrays"), these data are no longer used in any useful
way.  Remove.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-05-08 10:25:11 +09:00
Jassi Brar
2f83f219bf fastboot: sparse: make write_sparse_image useable for non-fastboot
write_sparse_image could be useful for non-fastboot users.
For ex a platform, without usb-device/fastboot support, could
get sparse images over tftp and write using the mmc command.
Or non-android systems could also leverage the sparse format.

Towards that, this patch removes anything fastboot specific from
the write_sparse_image implementation. Which includes making the
function return integer as error code and calls for fastboot logging
via an optional callback function 'mssg'.

Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2018-05-07 20:57:51 -04:00
Jassi Brar
32d3154e5c fastboot: sparse: remove redundant argument to write_sparse_image
'sz' has no use for write_sparse_image, remove it simplifying the api.

Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2018-05-07 20:57:51 -04:00
Lokesh Vutla
a43d46a73c arm: v7R: Add support for enabling caches
Cache maintenance procedure is same for v7A and v7R
processors. So re-use cache-cp15.c file except for
mmu parts.

Tested-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-05-07 15:53:29 -04:00
Lokesh Vutla
f2ef204312 arm: v7R: Add support for MPU
The Memory Protection Unit(MPU) allows to partition memory into regions
and set individual protection attributes for each region. In absence
of MPU a default map[1] will take effect. Add support for configuring
MPU on Cortex-R, by reusing the existing support for Cortex-M processor.

[1] http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0460d/I1002400.html

Tested-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-05-07 15:53:29 -04:00
Michal Simek
4bbd6b1d94 arm: v7R: Add initial support
The Cortex-R* processors are a mid-range CPUs for use in deeply-embedded,
real-time systems. It implements the ARMv7-R architecture, and includes
Thumb-2 technology for optimum code density and processing throughput.

Except for MPU(Memory Protection Unit) and few CP15 registers, most of the
features are compatible with v7 architecture. So,reuse the same armv7
folder and introduce a new config CPU_V7R in order to differentiate
from v7 based platforms.

Tested-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-05-07 15:53:28 -04:00
Lokesh Vutla
f4bcd767bd arm: v7: Kconfig: Introduce SYS_ARM_CACHE_CP15
Certain ARM architectures like ARMv7-A, ARMv7-R has support for
enabling caches using CP15 registers. To have a common support
for all these architectures, introduce a Kconfig symbol
SYS_ARM_CACHE_CP15 that selects cache-cp15.c

Tested-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-05-07 15:53:28 -04:00
Lokesh Vutla
7240b80ee0 arm: v7: Kconfig: Add entry for MMU
Add a Kconfig entry for MMU and imply for all platforms using
cache-cp15.c containing MMU setup. Using imply instead of select so that
MMU can be disabled by defconfigs when not needed.

Tested-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-05-07 15:53:28 -04:00
Lokesh Vutla
acf1500138 arm: v7: Kconfig: Rename CPU_V7 as CPU_V7A
Currently CPU_V7 kconfig symbol supports only ARMv7A architectures under
armv7 folder. This led to a misconception of creating separate folders
for armv7m and armv7r. There is no reason to create separate folder for
other armv7 based architectures when it can co-exist with few Kconfig
symbols.

As a first step towards a common folder, rename CPU_V7 as CPUV7A. Later
separate Kconfig symbols can be added for CPU_V7R and CPU_V7M and
can co exist in the same folder.

Reviewed-by: Tom Rini <trini@konsulko.com>
Tested-by: Michal Simek <michal.simek@xilinx.com>
Suggested-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-05-07 15:53:24 -04:00
Lokesh Vutla
2a5180535c arm: v7: Update VBAR only if available
Not all ARM V7 based cpus has VBAR for remapping
vector base address. So, update VBAR only if it available.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-05-07 15:49:52 -04:00
Masahiro Yamada
04ca871459 test: ofnode: test ofnode_device_is_compatible()
Test ofnode_device_is_compatible(), and also ofnode_path().

Requested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-05-07 15:49:52 -04:00
Masahiro Yamada
99552c3435 test: regmap: test Linux-compatible syscon_node_to_regmap()
Like Linux, syscon_node_to_regmap() allows a node to work as a syscon
provider without binding it to a syscon driver.  Test this.

Requested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-05-07 15:49:52 -04:00
Masahiro Yamada
e151a1c288 syscon: add Linux-compatible syscon API
The syscon implementation in U-Boot is different from that in Linux.
Thus, DT files imported from Linux do not work for U-Boot.

In U-Boot driver model, each node is bound to a dedicated driver
that is the most compatible to it.  This design gets along with the
concept of DT, and the syscon in Linux originally worked like that.

However, Linux commit bdb0066df96e ("mfd: syscon: Decouple syscon
interface from platform devices") changed the behavior because it is
useful to let a device bind to another driver, but still work as a
syscon provider.

That change had happened before U-Boot initially supported the syscon
driver by commit 6f98b7504f ("dm: Add support for generic system
controllers (syscon)").  So, the U-Boot's syscon works differently
from the beginning.  I'd say this is mis-implementation given that
DT is not oriented to a particular project, but Linux is the canon
of DT in practice.

The problem typically arises in the combination of "syscon" and
"simple-mfd" compatibles.

In Linux, they are orthogonal, i.e., the order between "syscon" and
"simple-mfd" does not matter at all.

Assume the following compatible.

   compatible = "foo,bar-syscon", "syscon", "simple-mfd";

In U-Boot, this device node is bound to the syscon driver
(driver/core/syscon-uclass.c) since the "syscon" is found to be the
most compatible.  Then, syscon_get_regmap() succeeds.

However,

   compatible = "foo,bar-syscon", "simple-mfd", "syscon";

does not work because this node is bound to the simple-bus driver
(drivers/core/simple-bus.c) in favor of "simple-mfd" compatible.
The compatible string "syscon" is just dismissed.

Moreover,

   compatible = "foo,bar-syscon", "syscon";

works like the first case because the syscon driver populates the
child devices.  This is wrong because populating children is the job
of "simple-mfd" (or "simple-bus").

This commit ports syscon_node_to_regmap() from Linux.  This API
does not require the given node to be bound to a driver in any way.

Reported-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-05-07 15:49:52 -04:00
Masahiro Yamada
d35812368a regmap: change regmap_init_mem() to take ofnode instead udevice
Currently, regmap_init_mem() takes a udevice. This requires the node
has already been associated with a device. It prevents syscon/regmap
from behaving like those in Linux.

Change the first argumenet to take a device node.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-05-07 15:49:51 -04:00
Masahiro Yamada
5ccc2c2130 dm: ofnode: add ofnode_device_is_compatible() helper
device_is_compatible() takes udevice, but there is no such a helper
that takes ofnode.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-05-07 15:49:51 -04:00
Masahiro Yamada
8c1de5e08b regmap: clean up regmap allocation
Putting zero length array at the end of struct is a common technique
to embed arbitrary length of members.  There is no good reason to let
regmap_alloc_count() branch by "if (count <= 1)".

As far as I understood the code, regmap->base is an alias of
regmap->ranges[0].start, but it is not helpful but make the code
just ugly.

Rename regmap_alloc_count() to regmap_alloc() because the _count
suffix seems pointless.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
[trini: fixup cpu_info-rcar.c]
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-07 15:15:27 -04:00
Patrick Delaunay
9ce751a6f5 psci: arm: remove armv7 function psci_save_target_pc
This function is no more used, and replaced by psci_save
which save also context id as requested by PSCI requirements.

Even if the context id is not used by Linux, it should be saved
and restored in r0 when the CPU_ON is performed.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-05-07 11:52:55 -04:00
Patrick Delaunay
9622c7e65d sunxi: psci: save context id in cpu_on command
Replace the psci_save_target_pc call by the new function
psci_save(cpu, pc,context_id)

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-05-07 11:52:55 -04:00
Patrick Delaunay
4f7dc2e603 uniphier: psci: save context id in cpu_on command
Replace the psci_save_target_pc call by the new function
psci_save(cpu, pc,context_id)

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-05-07 11:52:55 -04:00
Patrick Delaunay
4c6fe075ce tegra: psci: save context id in cpu_on command
Replace the psci_save_target_pc call by the new function
psci_save(cpu, pc,context_id)

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
2018-05-07 11:52:55 -04:00
Patrick Delaunay
47ec6b4ea3 imx7: psci: save context id in cpu_on command
Replace the psci_save_target_pc call by the new function
psci_save(cpu, pc,context_id)

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-05-07 11:52:55 -04:00
Patrick Delaunay
60599c1c08 ls102xa: psci: save context id in cpu_on command
Replace the psci_save_target_pc call by the new function
psci_save(cpu, pc,context_id)

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-05-07 11:52:54 -04:00
Patrick Delaunay
41c79775f0 arm: stm32mp1: add PSCI support
Add PSCI v1.0 support for Linux and manage PSCI state
for each CPU (affinity 0 level) with all mandatory functions:
- PSCI_VERSION
- CPU_SUSPEND
- CPU_OFF
- CPU_ON
- AFFINITY_INFO
- SYSTEM_OFF
- SYSTEM_RESET
- PSCI_FEATURES
and 1 optional to avoid Linux warning
- MIGRATE_INFO_TYPE

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: CITOOLS <smet-aci-reviews@lists.codex.cro.st.com>
2018-05-07 11:52:48 -04:00
Patrick Delaunay
486daaa618 arm: psci: add a weak function psci_arch_cpu_entry
The added function psci_arch_cpu_entry() is called
during psci_cpu_entry() and can be used by arch to handle
PSCI state transition from ON_PENDING to ON.

The default weak function is empty: not behavior change.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-05-07 11:45:15 -04:00
Patrick Delaunay
1a047c23f9 arm: psci: save context id for cpu_on PSCI command
Save and use the 3rd parameter of PSCI CPU_ON request: context_id.

The context_id parameter is only meaningful to the caller.
U-Boot PSCI preserves a copy of the value passed in this parameter.
Following wakeup from a  powerdown state, U-BOOT PSCI places
this value in R0 when it first enters the OS.

NB: this context id is not (yet?) used by Linux but it is mandatory
    to be PSCI compliant.

update armv7 psci functions:
- psci_save_target_pc(): keep for backward compatibility with
  current platform (only save PC and force context id to 0)
  => should be removed when all platform migrate to the new API

- psci_save(): new API to use by ARMv7 platform with PSCI,
  save pc (= entry_point_address) and context_id

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-05-07 11:45:15 -04:00
Tom Rini
890e79f2b1 Prepare v2018.05
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-07 11:32:36 -04:00
Tom Rini
068f86eb6d git-mailrc: Update some addresses and aliases
- Based on commit 08ae21af96 ("MAINTAINERS: Switch nxp.com domain")
  update or drop some formerly Freescale addresses.
- Update a few aliases to reflect current custodians

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-07 11:32:08 -04:00
Tom Rini
4549e789c1 SPDX: Convert all of our multiple license tags to Linux Kernel style
When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from.  So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry.  Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.

In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.

This commit changes all instances where we have multiple licenses (in
these cases, dual license) declared in the SPDX-License-Identifier tag.
In this case we change from listing "LICENSE-A LICENSE-B" or "LICENSE-A
or LICENSE-B" or "(LICENSE-A OR LICENSE-B)" to "LICENSE-A OR LICENSE-B"
as per the Linux Kernel style document.  Note that parenthesis are
allowed so when they were used before we continue to use them.

Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-07 10:24:31 -04:00
Tom Rini
83d290c56f SPDX: Convert all of our single license tags to Linux Kernel style
When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from.  So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry.  Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.

In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.

This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents.  There's also a few places where I found we did not have a tag
and have introduced one.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-07 09:34:12 -04:00
Jagan Teki
f3df7758b5 board: sunxi: sun8i-v40: Add Bananapi M2 Berry support
Banana Pi BPI-M2 Berry is a quad-core mini single board computer
built with Allwinner V40 SoC. It features
- Quad Core ARM Cortex A7 CPU V40
- 1GB of RAM .
- microSD/SATA port..
- onboard WiFi and BT
- 4 USB A 2.0 ports
- 1 USB OTG port
- 1 HDMI port
- 1 audio jack
- DC power port

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-05-07 11:33:19 +05:30
Jagan Teki
842cc8e094 ARM: dts: sun8i: Sync r40 dtsi from Linux
Sync sun8i-r40.dtsi changes from Linux with

Merge: a406778618d0 088345fc3553
Author: Stephen Rothwell <sfr@canb.auug.org.au>
Date:   Tue Apr 24 14:15:02 2018 +1000

    Merge branch 'akpm/master'

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-05-07 11:31:43 +05:30
Lokesh Vutla
7ce85318cf arm: mach-omap2: cache: Explicitly enable I cache
omap-common cache enabling sequence relies on cpu_init_cp15()
(inside start.S) for enabling I-caches. But cpu_init_cp15()
can be skipped if CONFIG_SKIP_LOWLEVEL_INIT is defined. So
enable I-caches if not enabled already.

Debugged-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Tested-by: Steve Kipisz <s-kipisz2@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Tested-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-05-06 13:35:40 -04:00
Kelvin Cheung
535adee869 Kconfig: Add dependency on HASH to verified boot
Building with verified boot support requires hash, add that
dependency here. Otherwise the following build error will come out
without crc command.

      LD      u-boot
lib/built-in.o: In function `hash_calculate':
lib/rsa/rsa-checksum.c:29: undefined reference to
`hash_progressive_lookup_algo'
...
make[1]: *** [u-boot] Error 1

Signed-off-by: Kelvin Cheung <keguang.zhang@gmail.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
2018-05-06 13:35:40 -04:00
Keerthy
ebf48500df board: ti: am43: Fix DCDC3 voltage for epos-evm
A common voltage of 1.35V was being programmed for all am43 board
versions. EPOS-EVM Needs 1.20V for LPDDR2.

Fixes: fc69d47262 (“board: ti: AM43XX: Add ddr voltage rail configuration”)
Reported-by: James Doublesin <doublesin@ti.com>
Signed-off-by: Keerthy <j-keerthy@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-05-06 13:35:40 -04:00
Trevor Woerner
1f154a6318 README.sandbox: small typos
Signed-off-by: Trevor Woerner <twoerner@gmail.com>
2018-05-06 13:35:40 -04:00
Tom Rini
27b4225b3c stdio_names: Ensure MAX_NAMES is defined before use, don't use 3 directly
With tighter build flags the fact that <stdio_dev.h> doesn't have a
reference back to MAX_NAMES causes an error.  Include <stdio.h> here and
then in common/console.c use MAX_NAMES rather than 3 when working with
stdio_names.

Reported-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
2018-05-06 13:35:16 -04:00
Tom Rini
dba8070f44 stdio_dev.h: Drop the video section as it is unused
With tighter build flags the fact that this header referenced
uchar/ushort without including what typedefs it causes an error.  Rather
than add another include here, drop the section in question as it is
unused.

Reported-by: Peter Robinson <pbrobinson@gmail.com>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-06 13:34:37 -04:00
Tom Rini
db13e05dda Merge git://git.denx.de/u-boot-usb 2018-05-03 09:20:13 -04:00
Tom Rini
9f881a590f Merge git://git.denx.de/u-boot-sh 2018-05-03 09:20:02 -04:00
Marek Vasut
74c8cb02a4 ARM: rmobile: Zap #undef DEBUG
The DEBUG macro is never defined unless explicitly enabled.
Drop useless #undef DEBUG in the board configs so it won't
spread any further.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-05-02 11:55:57 +02:00
Marek Vasut
699e831e15 ARM: rmobile: Contain CONFIG_ARCH_RMOBILE_BOARD_STRING
Pull the symbol from the boards and zap struct rmobile_sysinfo as they
are rather useless. The entire purpose of that whole machinery was to
print board name in the CONFIG_ARCH_RMOBILE_BOARD_STRING. Do that in a
far simpler and more contained manner.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-05-02 11:51:56 +02:00
Marek Vasut
83a64bebe4 ARM: rmobile: Convert CONFIG_ARCH_RMOBILE_BOARD_STRING to Kconfig
Convert the symbol to Kconfig, no functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-05-02 11:51:53 +02:00
Marek Vasut
3ce88cd7e1 ARM: rmobile: Fix CONFIG_RMOBILE_BOARD_STRING
Rename CONFIG_RMOBILE_BOARD_STRING to CONFIG_ARCH_RMOBILE_BOARD_STRING
to make things consistent, no functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-05-02 11:42:05 +02:00
Marek Vasut
b081454575 doc: rmobile: Update the README
Synchronize the README with the current state of U-Boot, unify
the build instructions to avoid duplication.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-05-02 10:52:00 +02:00
Marek Vasut
424060dae4 clk: renesas: Drop USB extal from the R8A7792 clock driver
The R8A7792 does not have the USB extal, so drop it.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-05-02 10:49:58 +02:00
Tom Rini
8b4a610af9 Merge git://git.denx.de/u-boot-mmc 2018-05-01 22:38:18 -04:00
Fabio Estevam
08ae21af96 MAINTAINERS: Switch nxp.com domain
freescale.com domain is no longer reachable, so switch the
maintainers' emails to nxp.com domain instead.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-05-01 22:38:10 -04:00
Heinrich Schuchardt
4bf225aa87 drivers:power:max77693: remove redundant logical constraint
As ret is not set when calling max77693_get_vcell() there is no
need to check ret again.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-05-02 10:57:43 +09:00
Hannes Schmelzer
4781921630 mmc: zynq_sdhci: use correct quirk if CONFIG_ZYNQ_HISPD_BROKEN is defined
The 'SDHCI_QUIRK_NO_HISPD_BIT' is used wrong here. The purpose of this
quirk is to tell the sdhci-driver that the IP-core doesn't have a "high-
speed-enable" bit in its registers.

With this commit we change this to the correct quirk:
SDHCI_QUIRK_BROKEN_HISPD_MODE

Signed-off-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
2018-05-02 10:57:43 +09:00
Hannes Schmelzer
88a57125fa mmc: sdhci: add SDHCI_QUIRK_BROKEN_HISPD_MODE
Some IP-core implementations of the SDHCI have different troubles on the
silicon where they are placed.

On ZYNQ platform for example Xilinx doesn't accept the hold timing of an
eMMC chip which operates in High-Speed mode and must be forced to
operate in non high-speed mode. To get rid of this
"SDHCI_QUIRK_BROKEN_HISPD_MODE" is introduced.

For more details about this refer to the Xilinx answer-recor #59999
https://www.xilinx.com/support/answers/59999.html

This commit:
- doesn't set HISPD bit on the host-conroller
- reflects this fact within the host-controller capabilities

Upon this the layer above (mmc-driver) can setup the card correctly.

Otherwise the MMC card will be switched into high-speed mode and causes
possible timing violation on the host-controller side.

Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at>

Signed-off-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
2018-05-02 10:57:43 +09:00
Peng Fan
0a4c2b099e mmc: fix return value check condition
sd_read_ssr returns 0, means no error.
Fixes: 5b2e72f32721484("mmc: read ssr only if MMC write support is enabled")

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-05-02 10:57:43 +09:00
Jaehoon Chung
4f0a8bf669 samsung: board: init the s2mps11 pmic during booting time
Exynos5422 board has s2mps11 pmic.
If CONFIG_PMIC_S2MPS11 is enabled, it can initialize PMIC and Regulators
during booting time.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Tested-by: Anand Moon <linux.amoon@gmail.com>
2018-05-02 10:57:43 +09:00
Tom Rini
ec1754f091 Prepare v2018.05-rc3
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-01 09:09:31 -04:00
Chen-Yu Tsai
9b9ceba03d sunxi: Sort dts Makefile entries for H3
The dts Makefile entries for the H3 are not ordered correctly.
Move the Nano Pi entries before the Orange Pi so they are.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-05-01 10:15:59 +05:30
Chen-Yu Tsai
e9392b373a sunxi: Add Libre Computer Board ALL-H3-CC H5 ver.
This patch adds a device tree file for the H5 version of the Libre
Computer Board ALL-H3-CC. It is the same board first introduced in
commit afe2754412 ("sunxi: Add support for Libre Computer Board
ALL-H3-CC H3 ver."), with the H3 SoC replaced with the H5 SoC, and
has 4Gb DDR3 chips instead of 2Gb ones.

The device tree utilizes the common board design file for ALL-H3-CC,
providing just the model strings and SoC specifics.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-05-01 10:15:58 +05:30
Chen-Yu Tsai
ad34951708 sunxi: Add Libre Computer Board ALL-H3-CC H2+ ver.
This patch adds a device tree file for the H2+ version of the Libre
Computer Board ALL-H3-CC. It is the same board first introduced in
commit afe2754412 ("sunxi: Add support for Libre Computer Board
ALL-H3-CC H3 ver."), with the H3 SoC replaced with the H2+ SoC, and
has only two 2Gb DDR3 chips instead of four.

The device tree utilizes the common board design file for ALL-H3-CC,
providing just the model strings and SoC specifics.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-05-01 10:15:58 +05:30
Chen-Yu Tsai
d7b17f1c24 sunxi: Split out common board design for ALL-H3-CC device tree
The Libre Computer Project ALL-H3-CC has three models, all using the
same board design, but with different pin compatible SoCs and amount of
DRAM.

Currently only the H3 1GB DRAM variant is supported. To support the two
other variants, first split the original device tree into a common board
design part and an SoC specific part.

The SoC part only defines which SoC is used and model name, and includes
the SoC specific dtsi file and the common design dtsi file.

Also fix up the SPDX identifier line to use the correct comment style,
and place it on the first line.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-05-01 10:15:58 +05:30
Chen-Yu Tsai
dccff21312 sunxi: Disable R_I2C for Libre Computer Board ALL-H3-CC H3 ver.
The Libre Computer Board ALL-H3-CC does not have an I2C controllable
regulator. Having R_I2C and SPL_I2C enabled serves no purpose.

Disable them.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-05-01 10:15:58 +05:30
Heinrich Schuchardt
48cdfa2f81 usb: f_mass_storage: simplify logical expression
An unsigned int is always >= 0.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-04-30 19:38:09 +02:00
Heinrich Schuchardt
fa9da8ee60 usb: gadget: remove duplicate assignment.
We should not make the same assignement twice.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-04-30 19:38:09 +02:00
Tom Rini
b25f8e2112 Merge git://git.denx.de/u-boot-imx 2018-04-30 07:14:05 -04:00
Tom Rini
abeb9d7897 Merge git://git.denx.de/u-boot-sunxi 2018-04-30 06:52:32 -04:00
Alex Kiernan
8c84287a0f tools: mkimage: Check for datafile when type is script
If generating a script image and no datafile has been passed in, mkimage
dies with SIGSEGV:

  #0  __strchr_sse2 () at ../sysdeps/x86_64/multiarch/../strchr.S:32
  #1  0x0000000000403818 in main
      at tools/mkimage.c:503

Add explicit test for datafile to fix this.

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
2018-04-28 18:32:25 -04:00
Alexander Dahl
c3b115f4b7 tools: mkenvimage: Fix possible segfault on stdin input
The size of 'filebuf' was not increased as more and more bytes are read
from stdin, but 'filebuf' was always reallocated to the same fix size.
This works as long as only less bytes than the initial buffer size come
in, for more input this will segfault. (It actually does, I tested
that.) So for each loop cycle the buffer size has to be increased by the
number of bytes we want to read.

Signed-off-by: Alexander Dahl <ada@thorsis.com>
2018-04-28 18:32:24 -04:00
Alexander Dahl
3559028cb2 tools: mkenvimage: Fix read() stdin error handling
On success read() returns the number of bytes read or zero for EOF. On
error -1 is returned and errno is set, so the right way to test if read
had failed is to test the return value instead of errno.

Signed-off-by: Alexander Dahl <ada@thorsis.com>
2018-04-28 18:32:24 -04:00
Patrice Chotard
8dc4e1fbf4 serial: serial_stm32: Rename status register flags
Uart status register is named USART_ISR on STM32F7, STM32H7
and STM32MP1 SoCs family, but USART_SR only on STM32F4 SoCs.

Use USART_ISR_ prefix instead of USART_SR_ .

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-04-28 18:32:24 -04:00
Patrice Chotard
7b3b74d321 serial: serial_stm32: Enable overrun
Enable uart overrun feature which allows to benefits of uart
FIFO usage.

Previously overrun management was disabled, this has to effect
to bypassed the uart FIFO usage even if FIFO was enabled.
In particular configuration, for example when video console is
enabled, copy/pasting a long command line in console results in
corruption. This is due to the fact that a lot of time is consumed
in flushing the cache during frame buffer update, so uart chars are
not read fast enough.

By using uart FIFO and managing overrun, long command line can by
copy/paste in console without being corrupted.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-04-28 18:32:24 -04:00
Alex Kiernan
ab9e12f651 spl: disk: usb: Add dependencies to sprintf/strto*
If SPL serial support is disabled nothing brings in sprintf, snprintf
or simple_strtoul:

  env/built-in.o: In function `regex_callback':
  env/attr.c:128: undefined reference to `sprintf'
  disk/built-in.o: In function `blk_get_device_by_str':
  disk/part.c:386: undefined reference to `simple_strtoul'
  disk/part.c:395: undefined reference to `simple_strtoul'
  disk/built-in.o: In function `blk_get_device_part_str':
  disk/part.c:522: undefined reference to `simple_strtoul'
  disk/built-in.o: In function `part_set_generic_name':
  disk/part.c:704: undefined reference to `sprintf'
  drivers/built-in.o: In function `init_peripheral_ep':
  drivers/usb/musb-new/musb_gadget.c:1826: undefined reference to `sprintf'
  drivers/built-in.o: In function `musb_core_init':
  drivers/usb/musb-new/musb_core.c:1451: undefined reference to `snprintf'

Add those dependencies here.

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
2018-04-28 18:32:24 -04:00
Alex Kiernan
e21c03be6d Consolidate __assert_failed into one implementation
We had two implementations of __assert_failed which were almost identical,
combine them into one.

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
2018-04-28 18:32:23 -04:00
Alex Kiernan
4f1eed7527 spl: Disable printf if not required
Now we have a guard for printf, disable it in the build if it's not
selected.

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
2018-04-28 18:32:23 -04:00
Alex Kiernan
14ad44ab46 spl: Split sprintf, strto* from SPL serial in Kconfig
When SPL serial is disabled, callers who need sprintf or strtoul fail
because their inclusion is guarded by CONFIG_SPL_SERIAL_SUPPORT/
CONFIG_TPL_SERIAL_SUPPORT.

Split printf, sprintf and strto into their own entries and then select
all of them if SERIAL_SUPPORT is enabled to match the current behaviour.

Include panic.o unconditionally as it can be called from anywhere which
uses BUG_ON().

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
2018-04-28 18:32:23 -04:00
Alex Kiernan
d4bb3b3762 spl: ti: Avoid serial calls when serial support is disabled
If CONFIG_SPL_SERIAL_SUPPORT is not set, then the build will fail:

board/ti/am335x/built-in.o: In function `spl_start_uboot':
board/ti/am335x/board.c:247: undefined reference to `serial_tstc'
board/ti/am335x/board.c:247: undefined reference to `serial_getc'

Avoid the calls to the serial functions in that case.

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
2018-04-28 18:32:23 -04:00
Alex Kiernan
3bac19ce23 spl: Add dependency on serial to Ymodem
Building with Ymodem support requires serial in SPL/TPL, add that
dependency here.

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
2018-04-28 18:32:23 -04:00
Alex Kiernan
eedecb0fe8 Cleanup CONFIG_SPL_SERIAL_SUPPORT migration
CONFIG_SPL_SERIAL_SUPPORT had already been migrated to Kconfig, but
existed in some include files; fix those up here.

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
2018-04-28 18:32:22 -04:00
Alex Kiernan
117a0e02be spl: ti: Avoid preloader_console_init if !CONFIG_SPL_SERIAL_SUPPORT
If CONFIG_SPL_SERIAL_SUPPORT is disabled then the build fails because
serial_init is undefined. Guard preloader_console_init() appropriately
to fix this.

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
2018-04-28 18:32:22 -04:00
Masahiro Yamada
30d313688f test: dm: regmap: fix license header
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-04-28 18:32:22 -04:00
Andre Przywara
7842b6a91e arm: move SYS_ARCH_TIMER to KConfig
SYS_ARCH_TIMER guards the usage of the ARM Generic Timer (aka arch
timer) in U-Boot.
At the moment it is mandatory for ARMv8 and used by a few ARMv7 boards.
Add a proper Kconfig symbol to express this dependency properly,
allowing certain board configuration to later disable arch timer in case
there are any problems with it.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
[tuomas: rebase + fix conflicts and resync with moveconfig & use select]
Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
2018-04-28 18:30:43 -04:00
Tuomas Tynkkynen
1a164ad304 ARM: qemu-arm: Dynamically determine timer frequency
After commit 46fc679ede ("arm: timer: get frequency for arch timer
armv7 in cp15 cntfrq") the ARM architected timer driver knows how to
determine the timer frequency at runtime by reading the CNTFRQ register,
so we don't need to hardcode the timer frequency anymore.

Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
2018-04-28 18:30:43 -04:00
Tom Rini
37dc72f5a5 configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-04-28 10:48:10 -04:00
Masahiro Yamada
c4f668320a distro: select CMD_ENV_EXISTS
'env exists' is used for scripting in include/config_distro_bootcmd.h
This command is available only when CONFIG_CMD_ENV_EXISTS is enabled.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Alexander Graf <agraf@suse.de>
2018-04-28 10:42:35 -04:00
Masahiro Yamada
7325f6cfdc distro: use imply to enable DISTRO_DEFAULTS as SoC default
The default of DISTRO_DEFAULTS is messy.  Using the 'imply' keyword
is equivalent and cleaner.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-04-28 10:42:35 -04:00
Heinrich Schuchardt
b60cfb6a01 powerpc: fix typo in kgdb.c
%s/alingment/alignment/

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-04-28 10:42:35 -04:00
Eugeniu Rosca
39883af3f0 lib/rsa: Kconfig: Remove superfluous 'depends on RSA'
RSA_SOFTWARE_EXP and RSA_FREESCALE_EXP are wrapped inside:

if RSA
	...
endif

So, remove the redundant "depends on RSA" from their depends expression.
In addition, move SPL_RSA into the same "if RSA ... endif" block, since
its only direct dependeny is CONFIG_RSA. This tidies up and simplifies
reading of lib/rsa/Kconfig.

No functional change intended.

Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-04-28 10:42:35 -04:00
Alex Kiernan
002c3234e6 Migrate IMAGE_FORMAT_LEGACY to Kconfig
This converts IMAGE_FORMAT_LEGACY to Kconfig

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-04-28 10:42:35 -04:00
Heinrich Schuchardt
83a1f933d1 cmd: CONFIG_CMD_LOG select CONFIG_LOG
CONFIG_CMD_LOG without CONFIG_LOG leads to a build error:
‘gd_t {aka volatile struct global_data}’ has no member named
‘default_log_level’

So CMD_LOG should select LOG.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-04-28 10:42:35 -04:00
Heinrich Schuchardt
9adc78d278 log: CONFIG_LOG should select CONFIG_DM
Compling with CONFIG_LOG and without CONFIG_DM results in
common/log.c:47: undefined reference to `uclass_get_name'

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-04-28 10:42:35 -04:00
Masahiro Yamada
1eb2e71edd kbuild: use -fmacro-prefix-map to make __FILE__ a relative path
The __FILE__ macro is used everywhere in U-Boot to locate the file
printing the log message, such as WARN_ON(), etc.  If U-Boot is
built out of tree, this can be a long absolute path.

This is because Kbuild runs in the objtree instead of the srctree,
then __FILE__ is expanded to a file path prefixed with $(srctree)/.

A brand-new option from GCC, -fmacro-prefix-map, solves this problem.
If your compiler supports it, __FILE__ is the relative path from the
srctree regardless of O= option.  This provides more readable log,
more reproducible builds, and smaller image size.

[ Linux commit: a73619a845d5625079cc1b3b820f44c899618388 ]

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-04-28 10:42:35 -04:00
Tuomas Tynkkynen
fac379e1ea serial: Migrate CONFIG_FSL_LINFLEXUART to Kconfig
Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
2018-04-28 10:42:35 -04:00
Tuomas Tynkkynen
76dd0f2c3d ARM: s32v234evb: Set CONFIG_DM & CONFIG_DM_SERIAL in Kconfig
These symbols are declared in Kconfig, so it's wrong to set them in
header files.

Note that this is not size-neutral - some 'default y' options will now
get turned on by Kconfig, such as CONFIG_CMD_DM=y and CONFIG_DM_STDIO=y.

Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
2018-04-28 10:42:05 -04:00
Tom Rini
ec5c4a8fd6 configs: Drop CONFIG_NET_MULTI
We have not had CONFIG_NET_MULTI be meaningful for quite some time, drop
the last remnants.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-04-27 14:54:49 -04:00
Tom Rini
3b6407b8ed clang: Update documentation
As of clang-5.0, things have changed a bit.  First, we cannot
automatically guess -target values as if we do not pass one with CC then
cc-option will fail.  Second, to disable movt/movw relocations the
argument has become -mno-movt.

Related to the target part, we cannot use arm-none-eabi as that ends up
being too generic of an ARM target for things like say rpi_3_32b to
work.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-04-27 14:54:49 -04:00
Tom Rini
4760fe26c7 Makefile: Update clang warning disables from Linux
Re-sync the logic about which clang warnings to disable from v4.17-rc1.
Note that we don't disable all of the same ones as for now we haven't
run into any cases of warnings from clang in code from upstream Linux.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-04-27 14:54:48 -04:00
Tom Rini
d024236e5a Remove unnecessary instances of DECLARE_GLOBAL_DATA_PTR
We have a large number of places where while we historically referenced
gd in the code we no longer do, as well as cases where the code added
that line "just in case" during development and never dropped it.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-04-27 14:54:48 -04:00
Adam Ford
f1b1f77060 Convert CONFIG_SPI to Kconfig
This converts the following to Kconfig:
   CONFIG_SPI

This partly involves updating code that assumes that CONFIG_SPI implies
things that are specific to the MPC8xx SPI driver.  For now, just update
the CONFIG tests.  This also involves reworking the default for
CONFIG_SYS_DEF_EEPROM_ADDR so that we don't set it when we cannot make a
reasonable default, as it does not cause any compile failures.

Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-04-27 14:54:11 -04:00
Mans Rullgard
07a8f79ee8 ARM: mxs: support full SPL framework
This allows using the full SPL framework on mxs devices.  In this
mode, the u-boot.sb image loaded by the boot ROM contains only the
SPL which then loads U-Boot proper or a kernel in falcon mode.

Signed-off-by: Mans Rullgard <mans@mansr.com>
2018-04-27 09:32:54 +02:00
Mans Rullgard
33ea119382 ARM: mxs: move spl data
With full SPL enabled, the loaded image overwrites the mxs_spl_data
location.  Moving it a slightly lower address fixes this.

Signed-off-by: Mans Rullgard <mans@mansr.com>
2018-04-27 09:32:54 +02:00
Mans Rullgard
68f835557c ARM: spl: include arm/thumb glue sections
When building in Thumb mode, the linker might generate mode switching
stubs in .glue sections.  Include these in the final link.

Signed-off-by: Mans Rullgard <mans@mansr.com>
2018-04-27 09:32:54 +02:00
Mans Rullgard
da372af6e4 ARM: arm926ejs: fix lowlevel_init call
The code attempts to preserve the value of LR by storing it in R12/IP
across the lowevel_init() call.  However, this register is not saved
by the callee.  Use a register that guaranteed to be preserved instead.

Signed-off-by: Mans Rullgard <mans@mansr.com>
2018-04-27 09:32:54 +02:00
Mans Rullgard
9482aeda66 ARM: mxs: make lowlevel_init() weak
With the full SPL framework enabled, lowlevel_init() is required.
Make the empty stub weak so boards can override it.

Signed-off-by: Mans Rullgard <mans@mansr.com>
2018-04-27 09:32:54 +02:00
Tom Rini
ec37f05ec0 Merge git://git.denx.de/u-boot-usb 2018-04-26 22:09:11 -04:00
Tom Rini
10cd229ec0 Merge git://git.denx.de/u-boot-socfpga 2018-04-26 22:09:03 -04:00
Tom Rini
641bce2635 Merge git://git.denx.de/u-boot-sh 2018-04-26 22:08:58 -04:00
Tien Fong Chee
4ae87a83a6 arm: socfpga: Fix with the correct polling on bit is set
Commit 2baa997240 ("arm: socfpga: Add FPGA driver support for Arria 10")
Polling on wrong cleared bit. Fix with correct polling on bit is set.

Fixes: 2baa997240 ("arm: socfpga: Add FPGA driver support for Arria 10")

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
2018-04-27 01:04:08 +02:00
Christophe Kerello
d57ed4d9f2 usb: gadget: composite: fix NULL pointer when a non standard request is received
In case usb configuration is unknown (cdev->config == NULL), non standard
request should not be processed.
Remove also the cdev->config check below which will never happen.

This issue was seen using ums feature.

Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-04-26 15:15:07 +02:00
Neil Armstrong
003659bda9 usb: host: dwc3: fix phys init
When no PHYs are declared in the dwc3 node, the phy init fails.
This patch checks if the "phys" property is presend and reports
the error returned by dev_count_phandle_with_args().

This patchs also fixes the styles issues added in last commit.

This patch should fix the DWC3 support on the UniPhier SoC family.

Fixes: 7c839ea70c ("usb: host: dwc3: Add support for multiple PHYs")
Reported-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2018-04-26 14:03:13 +02:00
Marek Vasut
fe537802f1 ARM: rmobile: Fix PMIC address on E2 Silk
The PMIC is at 0x5a, fix the address.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-04-26 13:56:57 +02:00
Marek Vasut
bb6d2ff2ac ARM: rmobile: Update E2 Alt
The E2 Alt port was broken since some time. This patch updates
the E2 Alt port to use modern frameworks, DM, DT probing, SPL
for the preloading and puts it on par with the M2 Porter board.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-04-26 13:54:39 +02:00
Marek Vasut
49aefe300a ARM: rmobile: Update M2-N Gose
The M2-N Gose port was broken since some time. This patch updates
the M2-N Gose port to use modern frameworks, DM, DT probing, SPL
for the preloading and puts it on par with the M2 Porter board.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-04-26 13:54:39 +02:00
Marek Vasut
e6027e6f45 ARM: rmobile: Update H2 Lager
The H2 Lager port was broken since some time. This patch updates
the H2 Lager port to use modern frameworks, DM, DT probing, SPL
for the preloading and puts it on par with the M2 Porter board.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-04-26 13:54:39 +02:00
Marek Vasut
1d0cb86eb9 ARM: rmobile: Enable HS200 support on M3N Salvator-X
Enable the HS200 support on M3N Salvator-X .

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-04-26 13:54:39 +02:00
Tom Rini
d2a1f120cf Merge git://git.denx.de/u-boot-rockchip 2018-04-26 07:21:41 -04:00
Sébastien Szymanski
ea77217828 imx6ul: opos6ul: in Serial Downloader boot mode use ymodem
When booting in Serial Downloader mode load the U-Boot image using
ymodem.

Signed-off-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com>
2018-04-26 09:34:16 +02:00
Sébastien Szymanski
30754ef77c imx6ul: opos6ul: add SPL_DM support
Since commit commit 152038ea18 ("i.MX6UL: icore: Add SPL_OF_CONTROL
support") the OPOS6UL board doesn't boot anymore. Adding SPL_DM support
makes the board boot again.

Fixes: commit 152038ea18 ("i.MX6UL: icore: Add SPL_OF_CONTROL support")
Signed-off-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com>
2018-04-26 09:34:00 +02:00
Bryan O'Donoghue
e426e19353 warp7: defconfig: Fix CAAM on boot with tip-of-tree
Booting the following image with tip-of-tree we get a CAAM DECO error (and
subsequent crash due to a kernel bug in 4.1).

http://freescale.github.io/#download -> BoardsWaRPboard community - WaRP -
Wearable Reference PlatformFSL Community BSP 2.3fsl-image-multimediawayland

Image: fsl-image-multimedia-imx7s-warp-20180323-90.rootfs.sdcard

Error:
caam 30900000.caam: Entropy delay = 3200
caam 30900000.caam: failed to acquire DECO 0
<snip>
caam 30900000.caam: failed to acquire DECO 0
caam 30900000.caam: Entropy delay = 12400
caam 30900000.caam: failed to acquire DECO 0
caam 30900000.caam: failed to instantiate RNG
------------[ cut here ]------------
WARNING: CPU: 0 PID: 1 at
/home/jenkins/workspace/fsl-community-bsp-pyro_xwayland_2/build/tmp/work-shared/imx7s-warp/kernel-source/mm/vmalloc.c:1465
caam_remove+0x6)
Trying to vfree() nonexistent vm area (88047000)
Modules linked in:
CPU: 0 PID: 1 Comm: swapper/0 Not tainted
4.1.36-4.1-1.0.x-imx-warp7+ga543d1b #1
Hardware name: Freescale i.MX7 Dual (Device Tree)
[<80015d54>] (unwind_backtrace) from [<80012688>] (show_stack+0x10/0x14)
[<80012688>] (show_stack) from [<8076e810>] (dump_stack+0x78/0x8c)
[<8076e810>] (dump_stack) from [<800346a0>]
(warn_slowpath_common+0x80/0xb0)
[<800346a0>] (warn_slowpath_common) from [<80034700>]
(warn_slowpath_fmt+0x30/0x40)
[<80034700>] (warn_slowpath_fmt) from [<8054c278>] (caam_remove+0x6c/0x3f4)
[<8054c278>] (caam_remove) from [<8054ce74>] (caam_probe+0x874/0xfa8)
[<8054ce74>] (caam_probe) from [<80382a7c>] (platform_drv_probe+0x48/0xa4)
[<80382a7c>] (platform_drv_probe) from [<80381328>]
(driver_probe_device+0x174/0x2a8)
[<80381328>] (driver_probe_device) from [<8038152c>]
(__driver_attach+0x8c/0x90)
[<8038152c>] (__driver_attach) from [<8037f9d4>]
(bus_for_each_dev+0x68/0x9c)
[<8037f9d4>] (bus_for_each_dev) from [<80380a68>]
(bus_add_driver+0xf4/0x1e8)
[<80380a68>] (bus_add_driver) from [<80381b38>] (driver_register+0x78/0xf4)
[<80381b38>] (driver_register) from [<80009738>]
(do_one_initcall+0x8c/0x1d0)
[<80009738>] (do_one_initcall) from [<80a66dac>]
(kernel_init_freeable+0x140/0x1d0)
[<80a66dac>] (kernel_init_freeable) from [<8076aa38>]
(kernel_init+0x8/0xe8)
[<8076aa38>] (kernel_init) from [<8000f468>] (ret_from_fork+0x14/0x2c)
---[ end trace d5f941204ed8cb28 ]---
caam: probe of 30900000.caam failed with error -11
Unable to handle kernel NULL pointer dereference at virtual address
00000004
pgd = 80004000
[00000004] *pgd=00000000
Internal error: Oops: 805 [#1] PREEMPT SMP ARM
<snip>
[<8055cdf8>] (caam_sm_startup) from [<80aa83c8>] (caam_sm_init+0x50/0x58)
[<80aa83c8>] (caam_sm_init) from [<80009738>] (do_one_initcall+0x8c/0x1d0)
[<80009738>] (do_one_initcall) from [<80a66dac>]
(kernel_init_freeable+0x140/0x1d0)
[<80a66dac>] (kernel_init_freeable) from [<8076aa38>]
(kernel_init+0x8/0xe8)
[<8076aa38>] (kernel_init) from [<8000f468>] (ret_from_fork+0x14/0x2c)
Code: e59d300c e2832010 e5843008 e5834068 (e58a2004)
---[ end trace d5f941204ed8cb29 ]---
Kernel panic - not syncing: Attempted to kill init! exitcode=0x0000000b

Fix: Enable the CAAM correctly by setting CONFIG_ARMV7_BOOT_SEC_DEFAULT=y
in the upstream defconfig.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Tested-by: Breno Lima <breno.lima@nxp.com>
2018-04-26 09:32:25 +02:00
Bryan O'Donoghue
8273209bd9 warp7: secure_defconfig: Remove secure_defconfig
This patch removes warp7_secure_defconfig. A previous patch set
CONFIG_ARMV7_BOOT_SEC_DEFAULT=y on the unsecure WaRP7 config. Fabio asked
if I could confirm that the NXP and upstream kernels will boot on the WaRP7
with CONFIG_ARMV7_BOOT_SEC_DEFAULT=y. I can confirm that this is the case,
so there's no need to support the secure defconfig - drop it now.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Suggested-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-04-26 09:31:20 +02:00
Lukasz Majewski
948239ea16 dts: dm: fec: imx53: Provide proper compatible string for imx53 fec driver
After this change the DM FEC ETH driver can be also reused on some imx53
devices.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2018-04-26 09:28:49 +02:00
Lukasz Majewski
178d4f0099 eth: dm: fec: Change FEC PHY mask setting from CONFIG_PHYLIB to CONFIG_FEC_MXC_PHYADDR
Without this commit we do have an explicit dependency on CONFIG_PHYLIB
when one wants to set PHY ADDR on a iMX board (FEC + driver model).

This shall be changed to CONFIG_FEC_MXC_PHYADDR, as only when we do have
it set, we shall mask out other devices.

As a side effect, when CONFIG_FEC_MXC_PHYADDR is not set, we scan PHY bus
for connected PHY devices.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2018-04-26 09:27:22 +02:00
Fabio Estevam
f3c326287e Revert "imximage: Remove failure when no IVT offset is found"
This reverts commit b5b0e4e351.

Commit f916757300 ("imx: Create distinct pre-processed mkimage
config files") provided a proper fix for the parallel mkimage
config files build failure, so the original workaround can be
safely reverted now.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
2018-04-26 09:00:44 +02:00
Fabio Estevam
feb14c6348 mx7dsabresd: Remove the mx7dsabresd_secure_defconfig target
mx7dsabresd_secure_defconfig was introduced to allow booting NXP kernel
that has CAAM support and needs to boot in secure mode.

Instead of keeping two different config targets for the same board,
remove mx7dsabresd_secure_defconfig and select
CONFIG_ARMV7_BOOT_SEC_DEFAULT inside mx7dsabresd_defconfig so that
this target could be used to boot both mainline and the vendor kernel.

This makes maintenance task easier and avoid potentially confusion
for the end user.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Acked-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
2018-04-26 08:57:52 +02:00
Mark Jonas
5ebf9ad96c arm,imx6: fix PAD_CTL_SPEED_LOW constant
For most i.MX6 processors the PAD_CTL_SPEED_LOW constant is the same.
Only the i.MX6 SoloLite is an exemption. So far the code did not
consider that. Additionally, for a few i.MX6 processors the code used
the wrong value for the constant.

This patch fixes the PAD_CTL_SPEED_LOW constant for:
 - i.MX6 Solo [1]
 - i.MX6 DualLite [1]
 - i.MX6 Dual [2]
 - i.MX6 Quad [2]
 - i.MX6 DualPlus [3]
 - i.MX6 QuadPlus [3]

Before, it was already correct for:
 - i.MX6 SoloLite [4]
 - i.MX6 SoloX [5]
 - i.MX6 UtraLite [6]
 - i.MX6 ULL [7]

[1] https://www.nxp.com/docs/en/reference-manual/IMX6SDLRM.pdf
[2] https://www.nxp.com/docs/en/reference-manual/IMX6DQRM.pdf
[3] https://www.nxp.com/docs/en/reference-manual/iMX6DQPRM.pdf
[4] https://www.nxp.com/docs/en/reference-manual/IMX6SLRM.pdf
[5] https://www.nxp.com/docs/en/reference-manual/IMX6SXRM.pdf
[6] https://www.nxp.com/docs/en/reference-manual/IMX6ULRM.pdf
[7] https://www.nxp.com/docs/en/reference-manual/IMX6ULLRM.pdf

Signed-off-by: Mark Jonas <mark.jonas@de.bosch.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2018-04-26 08:55:42 +02:00
Bryan O'Donoghue
bb96a08d5b warp7: Add support for automated secure boot.scr verification
This patch adds support for verifying a signed boot.scr. With this in place
it's possible for run-time Linux to update boot.scr to set different
variables such as switching between different boot partitions, pointing to
different kernels etc and for u-boot to verify these changes via the HAB
prior to executing the commands contained in boot.scr.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Tested-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-04-26 08:54:18 +02:00
Bryan O'Donoghue
baea5ecd26 warp7: defconfig: Enable CMD_SETEXPR
setexpr allows us to do arithmetic for env variables - something that is
both useful and required when doing HAB authentication without hard-coding
HAB load addresses.

This patch enables CMD_SETEXPR for the WaRP7 defconfig.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Tested-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-04-26 08:54:02 +02:00
Bryan O'Donoghue
d9cb9aec74 warp7: hab: Set environment variable indicating IVT offset
This patch introduces the environment variable ivt_offset. When we define a
load address for Linux or DTB or any file the IVT associated with that file
is prepended. We extract the actual load addresses from u-boot.cfg and feed
these values into the code-signing process - hence we want u-boot to have
the real load addresses exported in uboot.cfg.

ivt_offset represents the addition or subtraction from the load address
that must happen to find an IVT header.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Tested-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-04-26 08:54:02 +02:00
Bryan O'Donoghue
c0df0caeb8 warp7: add warp7_auth_or_fail
Doing secure boot on the WaRP7 using a common image format and the same
variable to represent the base address for each call means we can reduce
down the command to a single environment command.

This patch adds warp7_auth_or_fail as a wrapper around
"hab_auth_img_or_fail ${hab_ivt_addr} ${filesize} 0".

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Tested-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-04-26 08:53:42 +02:00
Bryan O'Donoghue
e4514051fc warp7: Define the name of a signed boot-script file
We need to know the name of a signed boot-script, its better to have a
separate variable for this then to simply append some fixed string to an
existing image name.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Tested-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-04-26 08:53:22 +02:00
Bryan O'Donoghue
2948089815 warp7: select uuid partition based on rootpart
Assigning the UUID discovery path to a tweakable environment variable means
that later steps in the boot process - particularly a boot script can
change the target root partition of a particular Linux boot.

Retargeting the rootfs is an important feature when doing ping/pong
upgrades allowing a boot script to select ping or pong as necessary without
reprogramming the bootloader.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Tested-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-04-26 08:53:22 +02:00
Bryan O'Donoghue
95b649f27d warp7: Add Kconfig WARP7_ROOT_PART
Adding CONFIG_WARP7_ROOT_PART allows a defconfig to specify which partition
is use as the root partition on WaRP7, this is a desirable change in order
to support a different partitioning schemes. The default is the current
partition #2.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Tested-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-04-26 08:53:22 +02:00
Bryan O'Donoghue
56eca404e1 warp7: Make CONFIG_SYS_FDT_ADDR a define
In order to sign images with the IMX code-signing-tool (CST) we need to
know the load address of a given image. The best way to derive this load
address is to make it into a define - so that u-boot.cfg contains the
address - which we can then parse when generating the IMX CST headers.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Reviewed-by: Ryan Harkin <ryan.harkin@linaro.org>
Tested-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-04-26 08:53:22 +02:00
Bryan O'Donoghue
42fcabdb26 warp7: defconfig: Enable CONFIG_BOOTM_TEE
This patch enables CONFIG_BOOTM_TEE. Once enabled its possible to
chain-load Linux through OPTEE.

Loading kernel to 0x80800000
=> run loadimage

Load FDT to 0x83000000
=> run loadfdt

Load OPTEE to 0x84000000
=> fatload mmc 0:5 0x84000000 /lib/firmware/uTee.optee

Then chain-load to the kernel via OPTEE

=> bootm 0x84000000 - 0x83000000

   Image Name:
   Image Type:   ARM Trusted Execution Environment Kernel Image (uncompressed)
   Data Size:    249844 Bytes = 244 KiB
   Load Address: 9dffffe4
   Entry Point:  9e000000
   Verifying Checksum ... OK
   Loading Kernel Image ... OK

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Tested-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-04-26 08:53:22 +02:00
Bryan O'Donoghue
9fb2c1faa1 warp7: defconfig: Enable CONFIG_SECURE_BOOT
Various function associated with booting the WaRP7 in High Assurance Boot
(HAB) mode are enabled by switching on CONFIG_SECURE_BOOT.

This patch enables CONFIG_SECURE_BOOT for the WaRP7 defconfig.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Tested-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-04-26 08:53:22 +02:00
Bryan O'Donoghue
4bcbfcf458 warp7: Specify CONFIG_OPTEE_LOAD_ADDR
In order to sign images with the IMX code-signing-tool (CST) we need to
know the load address of a given image. The best way to derive this load
address is to make it into a define - so that u-boot.cfg contains the
address - which we can then parse when generating the IMX CST headers.

This patch makes the OPTEE_LOAD_ADDR available via u-boot.cfg for further
parsing by external tools.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Reviewed-by: Ryan Harkin <ryan.harkin@linaro.org>
Tested-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-04-26 08:52:51 +02:00
Bryan O'Donoghue
fbbf44af31 warp7: Print out the OPTEE DRAM region
Right now a region of 0x300000 bytes is allocated at the end of DRAM for
the purposes of loading an OPTEE firmware inside of it. This patch adds the
printout of the relevant address ranges.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Tested-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-04-26 08:52:51 +02:00
Bryan O'Donoghue
7175ef4a71 warp7: Allocate specific region of memory to OPTEE
Subtracts CONFIG_OPTEE_TZDRAM_SIZE from the available DRAM size.

On WaRP7 we simply define the OPTEE region as from the maximum DRAM address
minus CONFIG_OPTEE_TZDRAM_SIZE bytes.

Note the OPTEE boot process will itself subtract the DRAM region it lives
in from the memory map passed to Linux.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Tested-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-04-26 08:52:51 +02:00
Bryan O'Donoghue
c727bba74a warp7: defconfig: Enable OPTEE for WaRP7
Requires setting CONFIG_OPTEE=y and setting an OPTEE TrustZone DRAM base in
include/configs/warp7.h.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Tested-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-04-26 08:52:51 +02:00
Bryan O'Donoghue
a2accd843b warp7: hab: Set environment variable indicating HAB enable
This patch adds an environment variable called "hab_enabled" which gets set
to a boolean status indicating whether HAB is enabled or not.

Subsequent patches can use this environment variable to determine if its
necessary to run a given binary through the hab_auth_img console command.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Tested-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-04-26 08:52:51 +02:00
Bryan O'Donoghue
9c260e862f warp7: hab: Add a CSF location definition
In order to correctly produce an image with a IVT/DCD header we need to
define a CSF in imximage.cfg. We just use the mx7 default here.

All we have to do with this option switched on is "make u-boot.imx" and we
then will get

- u-boot.imx
- u-boot.imx.log

The log file is really important because it gives the addresses for the HAB
that we will require to sign the u-boot image using the CST. Since the
addresses can change this logfile is a critical output.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Tested-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-04-26 08:52:51 +02:00
Bryan O'Donoghue
69f0695067 imximage: Specify default IVT offset in IMX image
This patch adds BOOTROM_IVT_HDR_OFFSET at 0xC00. The BootROM expects to
find the IVT header at a particular offset in an i.MX image.

Defining the expected offset of the IVT header in the first-stage BootROM
image format is of use of later stage authentication routines where those
routines continue to follow the first-stage authentication layout.

This patch defines the first stage offset which later patch make use of.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Utkarsh Gupta <utkarsh.gupta@nxp.com>
Cc: Breno Lima <breno.lima@nxp.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Tested-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-04-26 08:52:51 +02:00
Bryan O'Donoghue
af1b492dfa tools/imximage: Fix fruity lack of 0x prefix in DCD Blocks
commit 8519c9c98a ("tools/imximage: use 0x prefix in HAB Blocks line")
adds an 0x prefix to each HAB Block number to make it easier for host tools
to process the HAB Block output, however it neglects to apply the same
prefix to the DCD Blocks directive. You need the DCD Blocks directive if
you are making a u-boot recovery image which the BootROM will accept via
the USB upload utility.

This disparity results in a fruity output like this with HAB Blocks
prefixed but DCD Blocks not prefixed - which is pretty inconsistent.

This patch fixes the difference assuming the original commit was a
legitimate change.

Old:
Image Type:   Freescale IMX Boot Image
Image Ver:    2 (i.MX53/6/7 compatible)
Mode:         DCD
Data Size:    430080 Bytes = 420.00 KiB = 0.41 MiB
Load Address: 877ff420
Entry Point:  87800000
HAB Blocks:   0x877ff400 0x00000000 0x00066c00
DCD Blocks:   00910000 0000002c 000001d4

New:
Image Type:   Freescale IMX Boot Image
Image Ver:    2 (i.MX53/6/7 compatible)
Mode:         DCD
Data Size:    430080 Bytes = 420.00 KiB = 0.41 MiB
Load Address: 877ff420
Entry Point:  87800000
HAB Blocks:   0x877ff400 0x00000000 0x00066c00
DCD Blocks:   0x00910000 0x0000002c 0x000001d4

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Breno Lima <breno.lima@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-04-26 08:52:51 +02:00
Pierre-Jean TEXIER
0803bcf8a9 warp7: configs: enable CONFIG_CMD_FS_GENERIC
This enable generic file system commands (load, ls).

Signed-off-by: Pierre-Jean TEXIER <texier.pj2@gmail.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Acked-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
2018-04-26 08:51:36 +02:00
Pierre-Jean TEXIER
206426aa0b warp7: include/configs: use generic fs commands in CONFIG_EXTRA_ENV_SETTINGS
use the generic filesystem command 'load' rather
than 'fatload' to avoid per-fs specific commands.

Signed-off-by: Pierre-Jean TEXIER <texier.pj2@gmail.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Acked-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
2018-04-26 08:50:45 +02:00
Tom Rini
a61f9d1fbb Merge git://git.denx.de/u-boot-spi 2018-04-25 20:50:28 -04:00
Kever Yang
eb3d707e99 rockchip: defconfig: remove CONFIG_SYS_NS16550
We have enable NS16550 in Kconfig, do not need enable at defconfig

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-04-25 22:20:07 +02:00
Kever Yang
c3c0331db1 rockchip: enable SYS_NS16550 for all SoCs by default
All rockchip SoCs can use ns16550 driver, enable it for all
and set SYS_NS16550_MEM32 for all SoCs.

Version-changes: 2
- use imply instead of select

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-04-25 22:20:07 +02:00
Kever Yang
932b2c98eb Revert "rockchip: firefly: Add "usb start" to auto-start USB device"
This reverts commit a1903c18db.

It's really bad idea to add "usb start" in preboot, it will spend
a lot of time to scan usb bus, and most of people do not need this
feature.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-04-25 22:20:07 +02:00
Kever Yang
cb7116afe8 rockchip: rk322x: update MACRO for back-to-brom
The MACRO has been update after:
ee14d29 rockchip: back-to-bootrom: split BACK_TO_BOOTROM for TPL/SPL
We need to update the C code for it.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-04-25 22:20:07 +02:00
Kever Yang
4749436da2 rockchip: rk322x: update TPL_TEXT_BASE
The boot0 hook including the 4-byte TAG which is at the beginning
of the TEXT_BASE, now we can use a aligned TEXT BASE.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-04-25 22:20:07 +02:00
Kever Yang
c877ef3ac1 rockchip: rv1108: add ofdata_to_platdata() method for driver
Parse of data in dedicated api instead of in probe().

The clk_set_rate() may be called before the clk driver is probed,
after core support set default clock.
This patch fix system abort issue since:
f4fcba5 clk: implement clk_set_defaults()

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-sytems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-sytems.com>
2018-04-25 22:20:07 +02:00
Kever Yang
d2e938d993 rockchip: rk3128: add ofdata_to_platdata() method for driver
Parse of data in dedicated api instead of in probe().

The clk_set_rate() may be called before the clk driver is probed,
after core support set default clock.
This patch fix system abort issue since:
f4fcba5 clk: implement clk_set_defaults()

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-sytems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-sytems.com>
2018-04-25 22:20:06 +02:00
Kever Yang
accaaea5cc rockchip: rk3036: add ofdata_to_platdata() method for driver
Parse of data in dedicated api instead of in probe().

The clk_set_rate() may be called before the clk driver is probed,
after core support set default clock.
This patch fix system abort issue since:
f4fcba5 clk: implement clk_set_defaults()

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-04-25 22:20:06 +02:00
Peter Robinson
239a25aef1 config: evb-rk3399: enable make uboot.itb
Similar to firefly 3399 enable the ability to create a FIT image
with combined arm-trusted-firmware.

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-04-25 22:20:06 +02:00
Patrick Uiterwijk
ced3c10fd2 arm: rockchip: make_fit_atf: remove unneeded imports
These imports are entirely unused in the entire script.

Signed-off-by: Patrick Uiterwijk <patrick@puiterwijk.org>
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-04-25 22:20:06 +02:00
Kever Yang
fd9e0fe0e3 rockchip: rk3188: use DM timer instead of rk_timer
Disable rk_timer as SYS timer and use DM timer instead,
so that we can get a better timer framework, the rk_timer
is going to be clean after we conver to use DM timer or
ARM arch/generic timer.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-04-25 22:20:06 +02:00
Kever Yang
f9ef544786 rockchip: rk3188: add timer3 node
Add dts node for timer3.
Because of the rockchip timer can only KNOWN "dtd_rockchip_rk3368_timer"
with OF_PLATDATA enable, so we override its compatible to
"rockchip,rk3368-timer".

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-04-25 22:20:05 +02:00
Kever Yang
7abb7e8fcb rockchip: rk3188: add -u-boot.dtsi for rock-rk3188
We should a -u-boot.dtsi for those config need by U-Boot only,
and other part sync with kernel.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-04-25 22:20:05 +02:00
Philipp Tomsich
e0e1d3f98c rockchip: timer: add compatible strings for rk3188 and rk3288
The DM driver for ockchip timer blocks is also applicable to the
RK3188 and RK3288 timer blocks: add 'rockchip,rk3188-timer' and
'rockchip,rk3288-timer' to its compatible list to support devices
claiming compatibility with these.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-04-25 22:20:05 +02:00
Klaus Goger
82a8e6c614 rockchip: defconfig: puma-rk3399: enable RTC
commit: 52280315a4 ("rtc: rewrite isl1208 to support DM") enables us to
use the on-module RTC emulation with the rk3399 device model i2c driver.

Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-04-25 18:25:21 +02:00
Heinrich Schuchardt
2144c74f68 rockchip: rk3288: provide ${fdtfile}
All rk3288 default configs define CONFIG_DEFAULT_DEVICE_TREE.
So we can use it to define ${fdtfile} in rk3288_common.h.

This variable is needed by the distro boot command.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-04-25 18:25:21 +02:00
Wadim Egorov
b0ba1e7e9d rockchip: clk: rk3288: add clk_enable function and support USB HOST0/HSIC
The generic ehci-driver (ehci-generic.c) will try to enable the clocks
listed in the DTSI. If this fails (e.g. due to clk_enable not being
implemented in a driver and -ENOSYS being returned by the clk-uclass),
the driver will bail our and print an error message.

This implements a minimal clk_enable for the RK3288 and supports the
clocks mandatory for the EHCI controllers; as these are enabled by
default we simply return success.

Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-04-25 14:05:09 +02:00
Philipp Tomsich
5ff8e54888 sunxi: improve throughput in the sunxi_mmc driver
Throughput tests have shown the sunxi_mmc driver to take over 10s to
read 10MB from a fast eMMC device due to excessive delays in polling
loops.

This commit restructures the main polling loops to use get_timer(...)
to determine whether a (millisecond) timeout has expired.  We choose
not to use the wait_bit function, as we don't need interruptability
with ctrl-c and have at least one case where two bits (one for an
error condition and another one for completion) need to be read and
using wait_bit would have not added to the clarity.

The observed speedup in testing on a A31 is greater than 10x (e.g. a
10MB write decreases from 9.302s to 0.884s).

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Tested-by: Mylène Josserand <mylene.josserand@bootlin.com>
Acked-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-04-25 10:29:38 +05:30
Tom Rini
5512f5ccf1 Merge git://git.denx.de/u-boot-video 2018-04-24 20:27:43 -04:00
Tom Rini
751641814c video-uclass: Fix logical-not-parentheses warning
With clang-4.0 and later we see:
warning: logical not is only applied to the left hand side of this bitwise
operator [-Wlogical-not-parentheses]
        if ((!gd->flags & GD_FLG_RELOC))
             ^          ~

And while the compiler suggests adding parenthesis around gd->flags, a
reading of the code says that we want to know when GD_FLG_RELOC is not
set and then return.

Cc: Simon Glass <sjg@chromium.org>
Cc: Anatolij Gustschin <agust@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-04-24 20:57:14 +02:00
Tom Rini
49f8849de9 Merge tag 'signed-efi-2018.05' of git://github.com/agraf/u-boot
Patch queue for efi - 2018-04-23

Some last minute fixes for 2018.05. Most of them are minor fixes. On
top we have some functional improvements for the device path logic
which should also help us be more compatible.
2018-04-23 16:17:36 -04:00
Marek Vasut
ec360e6486 mmc: Staticize sd_select_bus_width
Staticize the function since it's only used in mmc.c .

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Tom Rini <trini@konsulko.com>
2018-04-23 16:07:46 -04:00
Heinrich Schuchardt
e83222bfc3 efi_selftest: test EFI_DEVICE_PATH_UTILITIES_PROTOCOL
Provide unit tests for the EFI_DEVICE_PATH_UTILITIES_PROTOCOL.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-04-23 21:34:28 +02:00
Heinrich Schuchardt
3acef5da40 efi_loader: complete EFI_DEVICE_PATH_UTILITIES_PROTOCOL
The missing services of the EFI_DEVICE_PATH_UTILITIES_PROTOCOL are
implemented.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-04-23 21:34:28 +02:00
Heinrich Schuchardt
f6dd3f359c efi_loader: correcty determine total device path length
Device paths may consist of multiple instances. Up to now we have only
considered the size of the first instance. For the services of the
EFI_DEVICE_PATH_UTILITIES_PROTOCOL in most cases the total length of the
device path is relevant.

So let's rename efi_dp_size() to efi_dp_instance_size() and create a new
function efi_dp_size() that calculates the total device path length.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-04-23 21:34:28 +02:00
Heinrich Schuchardt
adb575124d efi_loader: correctly determine length of empty device path
efi_dp_size() is meant to return the device path length without the end
node.

The length of a device path containing only an end node was incorrectly
reported as 4.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-04-23 21:34:28 +02:00
Heinrich Schuchardt
07836345ba efi_loader: fix AppendDevicePath
The logic of the AppendDevicePath service of the
EFI_DEVICE_PATH_UTILITIES_PROTOCOL is incorrectly implemented:

* if both paths are NULL an end node has to be returned
* if both paths are not NULL the end node of the second device path has to
  be kept

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-04-23 21:34:28 +02:00
Heinrich Schuchardt
211314c107 efi_loader: implement CreateDeviceNode
Implement the CreateDeviceNode service of the device path utility protocol.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-04-23 21:34:28 +02:00
Heinrich Schuchardt
065a8eca69 efi_selftest: fix typo in efi_selftest_devicepath.c
%s/provice/provide/

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-04-23 21:34:28 +02:00
Heinrich Schuchardt
b5cd6878e4 efi_selftest: do not execute test if setup failed
Executing a test after failed setup may lead to unexpected behavior like
an illegal memory access. So after a setup failure we should skip to
teardown.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-04-23 21:34:28 +02:00
Heinrich Schuchardt
c524997acb efi_loader: no support for ARMV7_NONSEC=y
We do not support bootefi booting ARMv7 in non-secure mode.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-04-23 21:34:28 +02:00
Heinrich Schuchardt
d8d8997bbc log: fix typo LOGL_EFI
According to the documentation the EFI log category is called LOGC_EFI.
All other categories start with LOGC_. So let's fix it.

Fixes: 1973b381a1 ("log: add category LOGC_EFI")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-04-23 21:34:28 +02:00
Tom Rini
3853c650e4 Merge git://git.denx.de/u-boot-uniphier 2018-04-23 12:21:20 -04:00
Masahiro Yamada
3ce5b1a8d8 ARM: uniphier: move SPL stack address
Currently, the address region, 0xf8000 - 0x100000, is used for SPL
stack for the 32bit SoCs.  Because the U-Boot proper image starts
from 0x70000, the maximum size of the U-Boot proper image is 544KB
(0x70000 - 0xf8000) for the NOR boot mode.  Now uniphier_v7_defconfig
is almost hitting this size limit.  Changing CONFIG_SPL_STACK can
raise the size limit with less impact.  With this, the size limit
will increase to 576KB (0x70000 - 0x100000).  If we need to increase
it even more, we would be able to change CONFIG_SYS_UBOOT_BASE at the
cost of the flashing command changes.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-04-24 00:35:35 +09:00
Masahiro Yamada
fbe73dc88d ARM: uniphier: select a correct mmc device before flashing images
Some boards support an SD card and an eMMC device at the same time.
Since both belong to 'mmc', they are identified by a device number.
When the device number of the eMMC is 1 instead 0, "mmc dev" command
must be performed to switch the target device before flashing images.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-04-24 00:35:35 +09:00
Masahiro Yamada
045e4fcb44 clk: uniphier: disable SPL_CLK
The last clock consumer in SPL, SD/eMMC driver, gave up using the
clock driver.  The clock driver is only used in U-Boot proper.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-04-24 00:35:35 +09:00
Masahiro Yamada
2a819b9085 ARM: dts: uniphier: drop u-boot, dm-pre-reloc from SD/eMMC clock node
Now that the SD/eMMC driver does not use the clock driver in SPL,
remove u-boot,dm-pre-reloc properties to let the fdtgrep tool drop
the unnecessary nodes.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-04-24 00:35:34 +09:00
Masahiro Yamada
fc2d0302b6 mmc: uniphier-sd: skip clock set-up for SPL
The size of SPL is hitting the limit (64KB) for uniphier_v7_defconfig.
When booting from SD/eMMC, obviously its clock has been properly set up
by the boot ROM.  Acutually, no need to re-initialize the clock in SPL.

Using a clock driver would generalize the SoC specific code, but
solving the memory footprint problem would win.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-04-24 00:35:34 +09:00
Masahiro Yamada
30b5d9aa9a mmc: tmio: move clk_enable() to each driver's probe function
I need to differentiate the clock handling for uniphier-sd.  Move it
to each driver's probe function from the tmio common code so that
renesas-sdhi will not be affected.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-04-24 00:35:34 +09:00
Masahiro Yamada
58d702274c ARM: uniphier: increase CONFIG_SYS_MONITOR_LEN
With the recent changes, the size of the U-Boot proper image for
uniphier_v7_defconfig exceeded the current limit, 512KB, then SPL
fails to load the whole of the U-Boot proper.  Increase the size.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-04-24 00:33:57 +09:00
Tom Rini
ff719a73d9 Merge tag 'xilinx-for-v2018.05-rc3' of git://git.denx.de/u-boot-microblaze
Xilinx fixes for v2018.05-rc3

- Fix nand initialization
- Runtime ddr detection for static DDR setting
- Enable rewriting env locations
- Sync defconfig for zc770 xm011
- Remove useless ioremap in watchdog
- Check return value from soc_clk_dump()
2018-04-23 10:50:38 -04:00
Heinrich Schuchardt
f6549c8541 mmc: avoid division by zero in meson_mmc_config_clock
The Odroid C2 fails to read from mmc with U-Boot v2018.03.
The change avoids a division by zero.

The fix was suggested by Jaehoon in
https://lists.denx.de/pipermail/u-boot/2018-January/318577.html

Reported-by: Vagrant Cascadian <vagrant@debian.org>
Suggested-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Tested-by: Vagrant Cascadian <vagrant@debian.org>
2018-04-23 10:49:58 -04:00
Michal Simek
ebc675b98d cmd: clk: Check return value from soc_clk_dump
In case of error in soc_clk_dump function are returned different values
then CMD return values (-1, 0, 1).

For example:
ZynqMP> clk dump
exit not allowed from main input shel

The patch is checking all negative return values and return
CMD_RET_FAILURE which is proper reaction for these cases.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-23 13:15:32 +02:00
Michal Simek
811c7bdebe watchdog: cadence: Remove useless ioremap
There is no need to call ioremap. Also reg pointer is completely unused
in the driver.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-23 13:15:32 +02:00
Michal Simek
6afedb90dd arm: zynq: Sync zc770 xm011 defconfigs
x8 and x16 configurations should be in sync.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-23 13:15:32 +02:00
Michal Simek
237dff2265 arm: zynq: Make ENV_SIZE and ENV_OFFSET optional via board file
Boards have an option to rewrite variable locations in their own board
files. This is necessary for qspi and nand configurations where boot
image can be bigger then 896k(current limit).

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-23 13:15:32 +02:00
Michal Simek
61dc92a29d arm: zynq: Wire automatic ddr detection for Zynq and ZynqMP case
When static memory configuration is used U-Boot has capability to detect
memory size in setup range. Enable this feature for static
configuration.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-23 13:15:32 +02:00
Michal Simek
3b2b2ccac7 arm: zynq: Enable setup board name for different boards
There is no need to use zynq name as SYS_BOARD for all boards.
The patch is adding an option to change it.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-23 13:15:32 +02:00
Ezequiel Garcia
41b7d7f241 nand: zynq: Cleanup initialization
CONFIG_NAND_ZYNQ selects CONFIG_SYS_NAND_SELF_INIT, so the
driver doesn't have to play any ifdef game.

Also, we can mark zynq_nand_init() as static and get rid
of the mach-specific nand.h header.

This is really a revert of:
"mtd: zynq: nand: Move board_nand_init() function to board.c"
(sha1: 310995d9f9)

Signed-off-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>
Reviewed-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-23 13:15:30 +02:00
Ezequiel Garcia
07c5cbbd1e nand: zynq: Fix driver initialization
This driver is currently broken, refusing to initialize properly.

The reason is that get_nand_dev_by_index() was being called before
nand_register(), thus returning a pointer into uninitialized memory.
In other words, the struct mtd_info used by the driver is total junk.

Fix it by getting the correct struct mtd_info, via nand_to_mtd()
on the driver's struct nand_chip.

Tested on a custom board, where the CPU is halted without this patch.

Signed-off-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>
Reviewed-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-23 13:15:27 +02:00
Stefan Mavrodiev
4744d81cc0 sunxi: mmc: Fix phase delays
U-boot driver for sunxi-mmc uses PLL6, unlike linux kernel where
PLL5 is used, with clock rates respectively 600MHz and 768MHz.
Thus there are different phase degree steps - 24 for the kernel and
30 for u-boot.

In the kernel driver the phase is set 90 deg for output and 120 for
sample. Dividing by 30 will result values 3 and 4. Those are the
values set in the u-boot driver.

However, the condition defining delays is wrong. MMC core driver
requests clock of 52MHz, sunxi-driver sets clock of 50MHz, but
phase is set 30 deg for output and 120 deg for sample.

Apparently this works for most cards.
On A20-SOM204-EVB-eMMC there is eMMC card (KLMAG2GEND) which complains
about it. Maybe there is other boards with similar problem?
So the fix is to match delays for both u-boot and kernel.

Signed-off-by: Stefan Mavrodiev <stefan@olimex.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-04-23 12:12:56 +05:30
Eugeniy Paltsev
9b14ac5cc2 spi: dw: invert wait condition in dw_spi_xfer
While switching to readl_poll_timeout macros from custom code
the waiting condition was accidently inverted, so it was pure
luck that this code works at least in some conditions.

Fix that by inverting exit condition for readl_poll_timeout.

Fixes: c6b4f031d9 ("DW SPI: fix tx data loss on FIFO flush")

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-04-23 11:16:41 +05:30
Tom Rini
275d80a4c2 Merge git://git.denx.de/u-boot-usb 2018-04-22 09:30:36 -04:00
Tom Rini
d335a9e722 Merge git://git.denx.de/u-boot-sh 2018-04-22 09:30:29 -04:00
Neil Armstrong
38276090ee usb: dwc3-of-simple: fix error check of clk_get_bulk when disabled
The disabled clk API returns -ENOSYS unlike the reset API returning -ENOTSUPP.

Fixes: ca7fdc8b12 ("usb: host: Add simple of glue driver for DWC3 USB Controllers integration")
Reported-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2018-04-21 18:38:56 +02:00
Jean-Jacques Hiblot
cc73ba97c0 usb: dwc3-of-simple: Add support for DRA7/AM57 platforms.
Add the compatibility with "ti,dwc3" and enable it by default if DM_USB
is enabled.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-04-21 18:38:56 +02:00
Jean-Jacques Hiblot
103774b71c usb: dwc3-of-simple: Fix dependencies
This simple glue layer does not require CONFIG_MISC, but it does require
CONFIG_DM_USB.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-04-21 18:38:56 +02:00
Marek Vasut
f7aa3cd4a8 ARM: rmobile: Update E2 Silk
The E2 Silk port was broken since some time. This patch updates
the E2 Silk port to use modern frameworks, DM, DT probing, SPL
for the preloading and puts it on par with the M2 Porter board.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
---
NOTE: The port is missing support for I2C1 for DA9063 reset, since the
      I2C driver needs to be converted to DM and DT probing. That's not
      an issue for this patch though, since the reset was broken on Silk
      since forever.
2018-04-21 18:33:31 +02:00
Marek Vasut
1ddbcf46bf mmc: sh_mmcif: Migrate configs to CONFIG_SH_MMCIF
Migrate the U-Boot configs to Kconfig CONFIG_SH_MMCIF .

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
2018-04-21 18:33:31 +02:00
Marek Vasut
f3dca4aac6 mmc: sh_mmcif: Add Kconfig entry
Add Kconfig entry for SH MMCIF driver.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
2018-04-21 18:33:30 +02:00
Marek Vasut
48f54a2d74 mmc: sh_mmcif: Add DM and DT probing support
Add MMC DM and DT probing support into the SH MMCIF driver.
This patch abstracts out the common bits of the send command
and set ios functions, so they can be used both by DM and non
DM setups and adds the DM probe support.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
2018-04-21 18:33:19 +02:00
Marek Vasut
010bbe7331 clk: renesas: Minor clean up of the R8A7794 clock driver
The initconst is not used in U-Boot, drop it. The r8a7794_crit_mod_clks
is also not used in U-Boot, so drop it too.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-04-21 18:00:00 +02:00
Marek Vasut
841feae985 clk: renesas: Minor clean up of the R8A7792 clock driver
The initconst is not used in U-Boot, drop it. The r8a7792_crit_mod_clks
is also not used in U-Boot, so drop it too.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-04-21 18:00:00 +02:00
Sean Nyekjaer
4d95ed39a1 sf: Add Spansion s25fl208k entry
Add entry for Spansion s25fl208k part.

Signed-off-by: Sean Nyekjaer <sean.nyekjaer@prevas.dk>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-04-19 16:57:19 +05:30
Eugeniy Paltsev
a19e97157c mtd: sf: add support for sst26wf016, sst26wf032, sst26wf064
This commit adds support for the SST sst26wf016, sst26wf032
and sst26wf064 flash IC.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-04-19 16:54:25 +05:30
Eugeniy Paltsev
3d4fed87a5 mtd: sf: Add support of sst26wf* flash ICs protection ops
sst26wf flash series block protection implementation differs
from other SST series, so add specific implementation
flash_lock/flash_unlock/flash_is_locked functions for sst26wf
flash ICs.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2018-04-19 16:54:01 +05:30
Tom Rini
a35747b5e1 Merge git://git.denx.de/u-boot-uniphier 2018-04-18 16:24:26 -04:00
Tom Rini
8bc51b6e17 Merge git://git.denx.de/u-boot-sh 2018-04-18 16:24:14 -04:00
Kunihiko Hayashi
f8c08ab409 reset: uniphier: add ethernet reset control support
Add reset lines for ethernet controller on each SoC.

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-04-18 23:42:33 +09:00
Kunihiko Hayashi
461766cb69 clk: uniphier: add ethernet clock control support
Add clock control for ethernet controller on each SoC.

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-04-18 23:42:25 +09:00
Masahiro Yamada
3e98fc1236 ARM: dts: uniphier: sync DT with Linux 4.17-rc1
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-04-18 23:34:36 +09:00
Tom Rini
40df6b3e18 Merge git://git.denx.de/u-boot-socfpga 2018-04-17 17:45:28 -04:00
Tom Rini
f4df1f7678 Merge tag 'arc-for-2018.05-rc3' of git://git.denx.de/u-boot-arc
Subtle ARC fixes for v2018.05-RC3

These are only very subtle clean-ups here and there including:

 * Correctly specified CPU freq for HSDK
   (production boards are all shipped with 500MHZ as opposed
    to early batch running at 1GHz)

 * Addition of SNPS internal group email to MAINTAINERS file
 * Switch to Hush shell on AXS10x boards
2018-04-17 17:45:18 -04:00
Neil Armstrong
1dd181ff2b reset: fix bulk API when DM_RESET is disabled
In the commit "reset: Add get/assert/deassert/release for bulk of reset signals"
the disabled reset_release_bulk() and reset_get_bulk() used the wrong
struct clk_bulk instead of struct reset_ctl_bulk.

Fixes: 0c28233903 ("reset: Add get/assert/deassert/release for bulk of reset signals")
Reported-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-04-17 17:45:08 -04:00
Bryan O'Donoghue
bbac9222dc bootm: Align cache flush begin address
commit b4d956f6bc ("bootm: Align cache flush end address correctly")
aligns the end address of the cache flush operation to a cache-line size to
ensure lower-layers in the code accept the range provided and flush.

A similar action should be taken for the begin address of a cache flush
operation. The load address may not be aligned to a cache-line boundary, so
ensure the passed address is aligned.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Reported-by: Breno Matheus Lima <brenomatheus@gmail.com>
Suggested-by: Tom Rini <trini@konsulko.com>
Cc: Simon Glass <sjg@chromium.org>
Tested-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-04-17 17:45:08 -04:00
Neil Armstrong
721881c417 clk: fix clk_get_bulk when phandle error
This fixes the Coverity Defect CID 175347 when dev_count_phandle_with_args()
returns a negative value.

Fixes: a855be87da ("clk: Add get/enable/disable/release for a bulk of clocks")
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2018-04-17 17:45:08 -04:00
Neil Armstrong
895a82ce90 reset: fix reset_get_bulk when phandle error
This fixes the Coverity Defect CID 175348 when dev_count_phandle_with_args()
returns a negative value.

Fixes: 0c28233903 ("reset: Add get/assert/deassert/release for bulk of reset signals")
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2018-04-17 17:45:08 -04:00
Marek Vasut
7d0299cd8f ARM: rmobile: Update M2 Koelsch
The M2 Koelsch port was broken since some time. This patch updates
the M2 Koelsch port to use modern frameworks, DM, DT probing, SPL
for the preloading and puts it on par with the M2 Porter board.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-04-17 20:19:57 +02:00
Eugeniy Paltsev
474e9312a8 ARC: Remove unused DECLARE_GLOBAL_DATA_PTR from init_helpers.c
"Global data" structure "gd" is not used in init_helpers.c
thus DECLARE_GLOBAL_DATA_PTR might be safely removed.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-04-17 20:52:17 +03:00
Eugeniy Paltsev
4006200d49 ARC: Update ARC architecture maintainers
Update ARC architecture maintainers and add
uboot-snps-arc@synopsys.com mailing list.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-04-17 20:52:17 +03:00
Eugeniy Paltsev
9249d74781 ARC: AXS10x: Enable hush shell
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-04-17 20:52:17 +03:00
Eugeniy Paltsev
9289b15aec ARC: HSDK: Fix CPU frequency value
CPU on HSDK board runs at 500MHz after preloader so fix
wrong CPU frequency value in hsdk_defconfig.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-04-17 20:50:49 +03:00
Tom Rini
34b3722e38 configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-04-17 10:10:47 -04:00
Tom Rini
50b9782c83 Merge git://git.denx.de/u-boot-marvell 2018-04-17 09:14:33 -04:00
Dinh Nguyen
f369e1564c configs: socfpga: disable EFI and ISO partition types
None of the SoCFPGA platforms will support EFI/ISO partition types that
is needed for DISTRO_DEFAULTS. SoCFPGA bootroom will only support 0xa2
partition type.

This is needed to help limit the size of the SPL to within the 64k limit
that is required for SoCFPGA.

Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2018-04-17 11:39:50 +02:00
Dinh Nguyen
a8c2dcf098 configs: socfpga: add DM_RESET
Add the DM reset driver to socfpga defconfigs.

Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2018-04-17 11:39:50 +02:00
Dinh Nguyen
622597dee4 i2c: designware: add reset ctrl to driver
Add code to look for a reset manager property. Specifically, look for the
reset-names of 'i2c'. A reset property is an optional feature, so only print
out a warning and do not fail if a reset property is not present.

If a reset property is discovered, then use it to deassert, thus bringing the
IP out of reset.

Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2018-04-17 11:39:49 +02:00
Dinh Nguyen
449ff9c431 arm: dts: socfpga: add reset property
Add reset dts property to the i2c nodes.

Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2018-04-17 11:39:49 +02:00
Dinh Nguyen
67e4436e88 arm: dts: socfpga: enables i2c0 in socfpga_de0_nano
Add all the appropriate i2c alias in the base socfpga dtsi and enables
the i2c node on the DE0 NANO board.

Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2018-04-17 11:39:49 +02:00
Dinh Nguyen
2878942aa2 configs: socfpga: convert i2c to dm
Enable DM I2C driver on SoCFPGA platforms.

Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2018-04-17 11:39:49 +02:00
Dinh Nguyen
2ac718821a reset: socfpga: add reset driver for SoCFPGA platform
Add a DM compatible reset driver for the SoCFPGA platform.

Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2018-04-17 11:39:49 +02:00
Dinh Nguyen
81577a3b04 ARM: dts: stratix10: Add base dtsi and devkit dts
From the Linux v4.16-rc4, add the base dtsi and devkit dts files for
the Stratix10 SoCFPGA platform.

Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2018-04-17 11:39:49 +02:00
Dinh Nguyen
e74c15bc81 ARM64: stratix10: add reset manager includes
Pulled from linux v4.16-rc4.

Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2018-04-17 11:39:48 +02:00
Chin Liang See
8faeab9304 arm: socfpga: stratix10: Add base address map for Statix10 SoC
Add the base address map for Stratix10 SoC

Signed-off-by: Chin Liang See <chin.liang.see@intel.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2018-04-17 11:39:48 +02:00
Marek Vasut
f2b6f82b9d ARM: rmobile: Ignore U-Boot env when started via JTAG on Porter
When U-Boot is started via JTAG, ignore the installed environment
as it may interfere with the recovery of the board.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-04-17 11:38:56 +02:00
Marek Vasut
a3c159b9c3 ARM: rmobile: Ignore U-Boot env when started via JTAG on Stout
When U-Boot is started via JTAG, ignore the installed environment
as it may interfere with the recovery of the board.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-04-17 11:38:56 +02:00
Marek Vasut
1a6e8dda49 ARM: rmobile: Enable fitImage support on Gen3
Enable fitImage support to be on the right side of the millenium.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-04-17 11:38:55 +02:00
Marek Vasut
de7496667a ARM: rmobile: Disable SDHI on R8A77970 V3M Eagle
The SDHI is not routed to a slot on the Eagle, so disable it.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-04-17 11:38:55 +02:00
Marek Vasut
5e7f63db92 ARM: rmobile: Enable RPC QSPI on R8A77970 V3M Eagle
Enable the RPC QSPI driver on R8A77970 V3M Eagle and configure
the environment layout to match that used by old U-Boot.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-04-17 11:38:55 +02:00
Marek Vasut
93365eff60 ARM: rmobile: Add Renesas RPC HF/QSPI DT nodes
Add device tree nodes for the Renesas RPC HF/QSPI controller.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-04-17 11:38:55 +02:00
Matt Pelland
ca4e7d674e mmc: mv_sdhci: zero out sdhci_host structure
The mv_sdhci driver was not zeroing the sdhci_host structure it
allocates causing random access violations in parts of the mmc core
where the "ops" member pointers are checked and called if not NULL.

Signed-off-by: Matt Pelland <mpelland@starry.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-04-17 10:39:30 +02:00
Tom Rini
8c0a17be0a Prepare v2018.05-rc2
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-04-16 20:00:14 -04:00
Patrice Chotard
e376040f29 serial: Remove duplicated line in Makefile
The line "-obj-$(CONFIG_STM32_SERIAL) += serial_stm32.o"
is found twice in Makefile.

Fixes: ae74de0dfd ("serial: stm32: Rename serial_stm32x7.c to serial_stm32.c"

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Acked-by: Vikas Manocha <vikas.manocha@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-04-16 18:45:35 -04:00
Lukasz Majewski
7f4279c043 doc: Update git-mailrc entry for lukma (lukma@denx.de)
Signed-off-by: Lukasz Majewski <lukma@denx.de>
2018-04-16 18:45:35 -04:00
Heinrich Schuchardt
95058fbb97 env: mmc/fat/ext4: undefined reference to `mmc_initialize'
For CONFIG_ENV_FAT_INTERFACE != 'mmc' a link error
env/fat.c:93: undefined reference to `mmc_initialize'
occurs if CONFIG_MMC_SUPPORT is not enabled.

Fixes: 26862b4a40 ("env: mmc/fat/ext4: make sure that the MMC sub-system
is initialized before using it")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-04-16 18:45:35 -04:00
Siva Durga Prasad Paladugu
7bcdf19572 env: Relocate env drivers if manual reloc is required
Relocate env drivers if manual relocation is enabled. This
patch fixes the issue of u-boot hang incase if env is
present in any of the flash devices.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-04-16 18:45:35 -04:00
Sjoerd Simons
90e407ae01 Kconfig: Enlarge default SYS_MALLOC_F_LEN for AM33XX
Since commit 8e14ba7bd5 ("gpio: omap_gpio: Add DM_FLAG_PRE_RELOC
flag") omap GPIO gets bound before relocation.  Unfortunately due to
this, on at least the beaglebone black, the pre-relocation memory pool
gets exhausted before probing the serial port. This then causes u-boot
to panic as CONFIG_REQUIRE_SERIAL_CONSOLE is set...

Resolve this by resizing the default size of the pre-relocation malloc
pool for AM335X platforms.

Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
2018-04-16 18:45:35 -04:00
Alexander Graf
4f67b93fb7 part: Disable CONFIG_SPL_ISO_PARTITION by default
We enabled CONFIG_ISO_PARTITION by default for distro boot, so that U-Boot
could load distro images that usually get shipped as iso images. These images
usually come with a board agnostic boot environment.

However, there is very little point in having ISO support enabled (for anyone
really) in SPL, as the whole idea of SPL is to load U-Boot proper which again
is board specific. So the fact that we enable ISO support in U-Boot proper does
not mean at all that we want ISO support in U-Boot SPL.

Hence, let's remove the Kconfig dependency. Along the way, let's also clean up
all those default configs that disabled SPL ISO support.

Signed-off-by: Alexander Graf <agraf@suse.de>
2018-04-16 18:45:35 -04:00
Tom Rini
9d24b01ce0 Merge git://git.denx.de/u-boot-x86 2018-04-16 13:24:20 -04:00
Simon Glass
d5032392ba x86: Rename coreboot-x86 to coreboot
We only use coreboot as a target on x86 platforms, since on ARM platforms
U-Boot always runs as the primary boot loader. Rename the coreboot-x86
platform to reflect this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2018-04-16 22:38:53 +08:00
Bin Meng
7d9974a2be doc: vxworks: Update x86 specific instructions
This updates the doc of booting VxWorks, like loading an x64 kernel,
and how to make VxWorks graphics console driver work.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2018-04-16 22:38:53 +08:00
Bin Meng
79c584e559 bootvx: x86: Assign bootaddr based on kernel memory base
On VxWorks x86 its bootline address is at a pre-defined offset @
0x1200. If 'bootaddr' is not passed via environment variable, we
assign its value based on the kernel memory base address.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2018-04-16 22:38:53 +08:00
Bin Meng
ced71a2f72 bootvx: Exit if bootline address is not specified
Exit the 'bootvx' command if bootline address is not specified.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2018-04-16 22:38:53 +08:00
Bin Meng
7824ad6ad4 bootvx: Refactor the bootline copy codes a little bit
There is a small duplication in do_bootvx() that does the bootline
copy. Refactor this a little bit to make it simpler.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-04-16 22:38:52 +08:00
Bin Meng
447ae4f7ad bootvx: x86: Make VxWorks EFI console driver happy
When booting from EFI BIOS, VxWorks bootloader stores the EFI GOP
framebuffer info at a pre-defined offset @ 0x6100. When VxWorks
kernel boots up, its EFI console driver tries to find such a block
and if the signature matches, the framebuffer information will be
used to initialize the driver.

However it is not necessary to prepare an EFI environment for
VxWorks's EFI console driver to function (eg: EFI loader in
U-Boot). If U-Boot has already initialized the graphics card and
set it to a VESA mode that is compatible with EFI GOP, we can
simply prepare such a block for VxWorks.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-04-16 22:38:52 +08:00
Bin Meng
611309383d pci: video: Only print out when everything is OK
If video initialization fails, the "Video:" output message will be
mixed with the next console log. Change to print out such message
only when everything is OK, which improves the boot log readability.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-04-16 22:38:52 +08:00
Bin Meng
55b4e1b7d9 x86: Change default FRAMEBUFFER_VESA_MODE of some boards
This changes some boards' default FRAMEBUFFER_VESA_MODE to use 32-bit
pixel format for better VxWorks compatibility.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-04-16 22:38:52 +08:00
Bin Meng
17b07d70be video: vesa: Change default FRAMEBUFFER_VESA_MODE
This changes the default FRAMEBUFFER_VESA_MODE to use 32-bit pixel
format for better VxWorks compatibility.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-04-16 22:38:51 +08:00
Bin Meng
ca5eb0c5fb bios: vesa: Guard setting vesa mode with CONFIG_FRAMEBUFFER_SET_VESA_MODE
If CONFIG_FRAMEBUFFER_SET_VESA_MODE is not set, don't switch
graphics card to VESA mode. This applies to both native mode
and emulator mode of running the VGA BIOS.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-04-16 22:38:35 +08:00
Tom Rini
282f15804b Merge git://git.denx.de/u-boot-cfi-flash 2018-04-16 08:31:17 -04:00
Bin Meng
839c4e9c5b elf: Add a very simple ELF64 loader
This adds a very simple ELF64 loader via program headers, similar
to load_elf_image_phdr() that we already have.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-04-16 16:54:51 +08:00
Bin Meng
2bce3f595d elf: Add ELF64 related structure defines
This adds ELF header, program header and section header structure
defines for the 64-bit ELF image.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-04-16 16:54:51 +08:00
Bin Meng
df635df2e0 elf: Clean up the ELF header file
Fix various style violations in elf.h
- use correct comment format if the comment fits in just one line
- remove the ending period for the one-line comment
- use tab for the indention instead of space
- put the opening brace at the same line of a typedef/union
- remove <name> in a 'typedef struct' for consistency

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2018-04-16 16:54:51 +08:00
Bin Meng
45519924a0 x86: Rename e820entry to e820_entry
This changes 'struct e820entry' to 'struct e820_entry' to conform
with the coding style.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2018-04-16 16:54:51 +08:00
Bin Meng
87af71c2ea x86: Use 'unsigned int' in install_e820_map() functions
This fixes the following checkpatch warning:

  warning: Prefer 'unsigned int' to bare use of 'unsigned'

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2018-04-16 16:54:51 +08:00
Bin Meng
fa5e91f778 vxworks: x86: Rename e820info to e820_info
This changes 'struct e820info' to 'struct e820_info' to conform
with the coding style.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2018-04-16 16:54:51 +08:00
Bin Meng
1351700cf2 bootvx: x86: Explicitly clear the bootloader image size
VxWorks bootloader stores its size at a pre-defined offset @ 0x5004.
Later when VxWorks kernel boots up and system memory information is
retrieved from the E820 table, the bootloader size will be subtracted
from the total system memory size to calculate the size of available
memory for the OS.

Explicitly clear the bootloader image size otherwise if memory
at this offset happens to contain some garbage data, the final
available memory size for the kernel is insane.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-04-16 16:54:51 +08:00
Bin Meng
2902be86c1 bootvx: x86: Prepare e820 related stuff from the given kernel memory base address
At present two environment variables 'e820data'/'e820info' are required
to boot a VxWorks x86 kernel, but this is superfluous. The offset of
these two tables are actually at a fixed offset from the kernel memory
base address and we can provide the kernel memory base address to U-Boot
via only one variable 'vx_phys_mem_base'.

Note as it name indicates, the physical address should be provided.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2018-04-16 16:54:51 +08:00
Bin Meng
2ad3d088d2 doc: vxworks: Minor update for clarity
This corrects a typo and updates several places for clarity.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2018-04-16 16:54:51 +08:00
Lukasz Majewski
014d7b13ae x86: Update the io.h file to use {out|in}_{be|le}X macros
The commit 3f70a6f577 ("x86: Add clr/setbits functions")
introduced the {read|write}_ macros to manipulate data.

Those macros are not used by any code in the u-boot project (despite the
io.h itself). Other architectures use io.h with {in|out}_* macros.

This commit brings some unification across u-boot supported architectures.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2018-04-16 16:54:51 +08:00
Ivan Gorinov
53cabe3d8e x86: Add 64-bit memory-mapped I/O functions
Add readq() and writeq() definitions for x86.

Please note: in 32-bit code readq/writeq will generate two 32-bit
memory access instructions instead of one atomic 64-bit operation.

Signed-off-by: Ivan Gorinov <ivan.gorinov@intel.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2018-04-16 16:54:51 +08:00
Mario Six
8bfeb33c46 mtd: cfi_flash: Make live-tree compatible
Make the cfi_flash driver compatible with a live device tree.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-04-16 09:55:59 +02:00
Tom Rini
ebca902aeb Merge git://git.denx.de/u-boot-imx
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-04-15 08:43:50 -04:00
Tom Rini
df13a44377 Merge git://git.denx.de/u-boot-net 2018-04-15 08:42:37 -04:00
Tom Rini
6d0409f256 Merge git://git.denx.de/u-boot-sh 2018-04-15 08:42:08 -04:00
Jon Nettleton
b4e9bdcd05 mx6cuboxi: Fix some memory configuration errors
These changes bring mainline back into line with the configurations
that were originally set in our stable BSP.

Signed-off-by: Jon Nettleton <jon@solid-run.com>
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-04-15 11:56:21 +02:00
Trent Piepho
f916757300 imx: Create distinct pre-processed mkimage config files
Each imx image is created by a separate sub-make and during this process
the mkimage config file is run though cpp.

The cpp output is to the same file no matter what imx image is being
created.

This means if two imx images are generated in parallel they will attempt
to independently produce the same pre-processed mkimage config file at
the same time.

Avoid the problem by making the pre-processed config file name unique
based on the imx image it will be used in.  This way each image will
create a unique config file and they won't clobber each other when run
in parallel.

This should fixed the build bug referenced in b5b0e4e3 ("imximage:
Remove failure when no IVT offset is found").

Cc: Breno Lima <breno.lima@nxp.com>
Cc: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Trent Piepho <tpiepho@impinj.com>
Tested-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-04-15 11:55:23 +02:00
Tom Rini
448fc44fb8 mx31ads: Delete
This platform has been marked as orphaned since September 2013, remove.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-04-15 11:54:02 +02:00
Tom Rini
bcca8aa9ee imx31_phycore: Delete
This platform has been marked as orphaned since September 2013, remove.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-04-15 11:52:39 +02:00
Vanessa Maegima
ebca6013c0 pico-imx7d: Replace fatload command
Replace fatload with the fs generic loading interface ('load' command).

Signed-off-by: Vanessa Maegima <vanessa.maegima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-04-15 11:49:29 +02:00
Bryan O'Donoghue
723f8359c1 imx: mx7: snvs: Add an SNVS init routine
Working with HAB on the i.MX7 we've encountered a case where a board that
successfully authenticates u-boot when booting Linux via OPTEE subsequently
fails to properly bring up the RTC.

The RTC registers live in the low-power block of the Secure Non-Volatile
Storage (SNVS) block.

The root cause of the error has been traced to the HAB handing off the
SNVS-RTC in a state where HPCOMR::NPSWA_EN = 0 in other words where the
Non-Privileged Software Access Enable bit is zero. In ordinary
circumstances this is OK since we typically do not run in TZ mode, however
when we boot via HAB and enablng TrustZone, it is required to set
HPCOMR::NPSWA_EN = 1 in order for the upstream Linux driver to have
sufficient permissions to manipulate the SNVS-LP block.

On our reference board it is the difference between Linux doing this:

root@imx7s-warp-mbl:~# dmesg | grep rtc
snvs_rtc_enable read 0x00000000 from SNVS_LPLR @ 0x00000034
snvs_rtc_enable read 0x00000021 from SNVS_LPCR @ 0x00000038
snvs_rtc_enable read 0x00000000 from SNVS_HPLR @ 0x00000000
snvs_rtc_enable read 0x80002100 from SNVS_HPCOMR @ 0x00000004
snvs_rtc 30370000.snvs:snvs-rtc-lp: rtc core: registered
         30370000.snvs:snvs-rtc-lp as rtc0
snvs_rtc 30370000.snvs:snvs-rtc-lp: setting system clock to2018-04-01 00:51:04 UTC (1522543864)

and doing this:

root@imx7s-warp-mbl:~# dmesg | grep rtc
snvs_rtc_enable read 0x00000000 from SNVS_LPLR @ 0x00000034
snvs_rtc_enable read 0x00000020 from SNVS_LPCR @ 0x00000038
snvs_rtc_enable read 0x00000001 from SNVS_HPLR @ 0x00000000
snvs_rtc_enable read 0x00002020 from SNVS_HPCOMR @ 0x00000004
snvs_rtc 30370000.snvs:snvs-rtc-lp: failed to enable rtc -110
snvs_rtc: probe of 30370000.snvs:snvs-rtc-lp failed with error -110
hctosys: unable to open rtc device (rtc0)

Note bit 1 of LPCR is not set in the second case and is set in the first
case and that bit 31 of HPCOMR is set in the second case but not in the
first.

Setting NPSWA_EN in HPCOMR allows us to boot through enabling TrustZone
and continue onto the kernel. The kernel then has the necessary permissions
to set LPCR::SRTC_ENV (RTC enable in the LP command register) whereas in
contrast - in the failing case the non-privileged kernel cannot do so.

This patch adds a simple init_snvs() call which sets the permission-bit
called from soc.c for the i.MX7. It may be possible, safe and desirable to
perform this on other i.MX processors but for now this is only tested on
i.MX7 as working.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
2018-04-15 11:48:44 +02:00
Lukasz Majewski
b04ff9bf0f boot: script: The boot.scr file for K+P's boards
By using this file one can avoid cluttering <board>.h file with u-boot
HUSH commands necessary for booting target device.

With such approach the commands are stored only in one place and can be
reused if needed.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Stefano Babic <sbabic@denx.de>
2018-04-15 11:47:35 +02:00
Lukasz Majewski
dd4671cb3f imx: board: Add support for the K+P's kp_imx6q_tpc board
This commit provides support for Kieback & Peter GmbH IMX6Q based
TPC board.

U-boot console output:

U-Boot SPL 2018.05-rc1-00005-g631e2d01fd (Apr 04 2018 - 21:16:24 +0200)
Trying to boot from MMC1

U-Boot 2018.05-rc1-00005-g631e2d01fd (Apr 04 2018 - 21:16:24 +0200)

CPU:   Freescale i.MX6Q rev1.5 996 MHz (running at 792 MHz)
CPU:   Extended Commercial temperature grade (-20C to 105C) at 37C
Reset cause: POR
Board: K+P KP_IMX6Q_TPC i.MX6Q
       Watchdog enabled
I2C:   ready
DRAM:  2 GiB
MMC:   FSL_SDHC: 0, FSL_SDHC: 1
Loading Environment from MMC... OK
In:    serial
Out:   serial
Err:   serial
Net:   FEC [PRIME]
Autoboot in 3 seconds
2018-04-15 11:47:19 +02:00
Ian Ray
6c0e6b45f9 board: ge: bx50v3: enable backlight on demand
Enable display backlight only if a message needs to be displayed.
The kernel re-initializes the backlight, which results in some
unwanted artifacts.

Signed-off-by: Ian Ray <ian.ray@ge.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
2018-04-15 11:46:20 +02:00
Ken Lin
7a0ce1f797 arm: imx: Add Winbond SPI-NOR support for Advantech DMS-BA16 board
Windbond's been in the AVL list and need to enable the support

Signed-off-by: Ken Lin <yungching0725@gmail.com>
2018-04-15 11:45:09 +02:00
Bryan O'Donoghue
49e6242673 imx: hab: Provide hab_auth_img_or_fail command
This patch adds hab_auth_img_or_fail() a command line function that
encapsulates a common usage of authenticate and failover, namely if
authenticate image fails, then drop to BootROM USB recovery mode.

For secure-boot systems, this type of locked down behavior is important to
ensure no unsigned images can be run.

It's possible to script this logic but, when done over and over again the
environment starts get very complex and repetitive, reducing that script
repetition down to a command line function makes sense.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Utkarsh Gupta <utkarsh.gupta@nxp.com>
Cc: Breno Lima <breno.lima@nxp.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Tested-by: Breno Lima <breno.lima@nxp.com>
2018-04-15 11:44:13 +02:00
Bryan O'Donoghue
f4d8fccd38 imximage: Encase majority of header in __ASSEMBLY__ declaration
Subsequent patches will want to include imageimage.h but in doing so
include it on an assembly compile path causing a range of compile errors.
Fix the errors pre-emptively by encasing the majority of the declarations
in imximage.h inside an ifdef __ASSEMBLY__ block.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Utkarsh Gupta <utkarsh.gupta@nxp.com>
Cc: Breno Lima <breno.lima@nxp.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Tested-by: Breno Lima <breno.lima@nxp.com>
2018-04-15 11:44:13 +02:00
Bryan O'Donoghue
852cc548b3 warp7: Set u-boot serial# based on OTP value
u-boot has a standard "serial#" environment variable that is suitable
for storing the iSerial number we will supply via the USB device
descriptor. serial# is automatically picked up by the disk subsystem in
u-boot - thus providing a handy unique identifier in /dev/disk/by-id as
detailed below.

Storing the hardware serial identifier in serial# means we can change the
serial# if we want before USB enumeration - thus making iSerial automatic
via OTP but overridable if necessary.

This patch reads the defined OTP fuse and sets environment variable
"serial#" to the value read.

With this patch in place the USB mass storage device will appear in
/dev/disk/by-id with a unique name based on the OTP value. For example

/dev/disk/by-id/usb-Linux_UMS_disk_0_WaRP7-0xf42400d3000001d4-0:0

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Rui Miguel Silva <rui.silva@linaro.org>
Cc: Ryan Harkin <ryan.harkin@linaro.org>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-04-15 11:44:13 +02:00
Bryan O'Donoghue
1ab1ffded4 imx: mx7: Add comment to describe OTP TESTER registers
The tester registers provide a unique chip-level identifier which
get_board_serial() returns in a "struct tag_serialnr".

This patch documents the properties of the registers; in summary.

31:0 OCOTP_TESTER0 (most significant)
- FSL-wide unique, encoded LOT ID STD II/SJC CHALLENGE/ Unique ID

OCOTP_TESTER1 (least significant)
31:24
- The X-coordinate of the die location on the wafer/SJC CHALLENGE/ Unique
  ID
23:16
- The Y-coordinate of the die location on the wafer/SJC CHALLENGE/ Unique
  ID
15:11
- The wafer number of the wafer on which the device was fabricated/SJC
  CHALLENGE/ Unique ID
10:0
- FSL-wide unique, encoded LOT ID STD II/SJC CHALLENGE/ Unique ID

The 64 bits of data generate a unique serial number per-chip.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-04-15 11:44:13 +02:00
Bryan O'Donoghue
ca83182226 imx: mx7: Fix CONFIG_SERIAL_TAG compilation
Currently when we define CONFIG_SERIAL_TAG we will barf with a failure to
define "struct tag_serialnr".

This structure is defined in <asm/setup.h>, this patch includes
<asm/setup.h> to fix.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-04-15 11:44:13 +02:00
Marek Vasut
14eeb683a8 ARM: mx6: ddr: Add write leveling correction code
When the DDR calibration is enabled, a situation may happen that it
will fail on a few select boards out of a whole production lot. In
particular, after the first write leveling stage, the MPWLDECTRLx
registers will contain a value 0x1nn , for nn usually being 0x7f or
slightly lower.

What this means is that the HW write leveling detected that the DQS
rising edge on one or more bundles arrives slightly _after_ CLK and
therefore when the DDR DRAM samples CLK on the DQS rising edge, the
CLK signal is already high (cfr. AN4467 rev2 Figure 7 on page 18).

The HW write leveling then ends up adding almost an entire cycle (thus
the 0x17f) to the DQS delay, which indeed aligns it, but also triggers
subsequent calibration failure in DQS gating due to this massive offset.

There are two observations here:
- If the MPWLDECTRLx value is corrected from 0x17f to 0x0 , then the
  DQS gating passes, the entire calibration passes as well and the
  DRAM is perfectly stable even under massive load.
- When using the NXP DRAM calibrator for iMX6/7, the value 0x17f or so
  in MPWLDECTRx register is not there, but it is replaced by 0x0 as one
  would expect.

Someone from NXP finally explains why, quoting [1]:

    "
    Having said all that, the DDR Stress Test does something that we
    do not advertise to the users. The Stress Test iself looks at the
    values of the MPWLDECTRL0/1 fields before reporting results, and
    if it sees any filed with a value greater than 200/256 delay
    (reported as half-cycle = 0x1 and ABS_OFFSET > 0x48), the DDR
    Stress test will reset the Write Leveling delay for this lane
    to 0x000 and not report it in the log.

    The reason that the DDR Stress test does this is because a delay
    of more than 78% a clock cycle means that the DQS edge is arriving
    within the JEDEC tolerence of 25% of the clock edge. In most cases,
    DQS is arriving < 5% tCK of the SDCLK edge in the early case, and
    it does not make sense to delay the DQS strobe almost a full clock
    cycle and add extra latency to each Write burst just to make the
    two edges align exactly. In this case, we are guilty of making a
    decision for the customer without telling them we are doing it so
    that we don't have to provide the above explanation to every customer.
    They don't need to know it.
    "

This patch adds the correction described above, that is if the MPWLDECTRx
value is over 0x148, the value is corrected back to 0x0.

[1] https://community.nxp.com/thread/456246

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Eric Nelson <eric@nelint.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
2018-04-15 11:39:23 +02:00
Rasmus Villemoes
8519c9c98a tools/imximage: use 0x prefix in HAB Blocks line
The u-boot-ivt.img.log file contains 0x prefixes in the HAB Blocks line,
while the SPL.log does not. For consistency, and to make it easier to
extract and put into a .csf file for use with NXP's code signing tool,
add 0x prefixes here.

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Tested-by: Breno Lima <breno.lima@nxp.com>
2018-04-15 11:35:21 +02:00
Rasmus Villemoes
0658761733 Makefile: always preserve output for images that can contain HAB Blocks
The current makefile logic disables creation of the
SPL.log/u-boot-ivt.img.log etc. files when V=1 is given on the command
line, the rationale presumably being that the user wants and gets the
information on the console.

However, from general principles, I don't think a higher V= level
should affect which build artifacts get generated (and certainly
shouldn't produce fewer). Concretely, it's also a problem that when
doing a V=1 build in a terminal, the relevant HAB blocks lines easily
drown in all the other V=1 output.

Moreover, build systems such as Yocto by default pass V=1, so in that
case the information gets hidden away in the do_compile log file, making
it nigh impossible to create a recipe for creating signed U-boot images
- I don't want to disable V=1, because having verbose output in the log
file is valuable when things go wrong, but OTOH trying to go digging in
the do_compile log file (and getting exactly the right lines) is not
pleasant to even think about.

So change the logic so that for V=0, the mkimage output is redirected
to MKIMAGEOUTPUT (which is also the current behaviour), while for any
other value of V, we _additionally_ write the information to make's
stdout, whatever that might be.

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Tested-by: Breno Lima <breno.lima@nxp.com>
2018-04-15 11:35:04 +02:00
Marek Vasut
cb0b6b035a mmc: tmio: Rename Matsushita to TMIO
Synchronize the naming with Linux, call the common code TMIO.
No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-04-14 00:03:30 +02:00
Marek Vasut
76af7e51e1 ARM: rmobile: Zap CONFIG_MMC_RENESAS_TUNING
Drop the CONFIG_MMC_RENESAS_TUNING symbol from Gen3 configs.
This symbol is no longer used after the Matsushita SDHI driver,
instead the renesas-sdhi driver uses CONFIG_MMC_HS200_SUPPORT
to discern whether the tuning support should be compiled in.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
--
V2: Submit this on top of configs which are actually in mainline
2018-04-14 00:03:30 +02:00
Marek Vasut
0e592d0759 ARM: rmobile: Convert TPL to SPL
There is currently no use for building the SPL anymore, since the
SPI loader can easily be replaced by TPL and TPL does load U-Boot
directly. Upgrade TPL to SPL and replace what used to be SPL with
it. This way we build the U-Boot sources only twice, not thrice.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-04-13 23:41:45 +02:00
Marek Vasut
98a100e9a3 ARM: rmobile: Shrink the TPL
Shrink the TPL by using tiny printf and tiny memset by default.
This removes the biggest symbol -- vsnprintf_internal -- from
the TPL and reduces the text segment by about 2 kiB.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-04-13 23:41:45 +02:00
Marek Vasut
ec7113fbb4 ARM: rmobile: Update H2 Stout
The H2 Stout port was broken since some time. This patch updates
the H2 Stout port to use modern frameworks, DM, DT probing, SPL
and TPL for the preloading and puts it on par with the M2 Porter
board.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-04-13 23:41:45 +02:00
Marek Vasut
68b83cb76b ARM: rmobile: Fix LBSC programming offset on M2 Porter
The offset of CSWCRx starts at 0x30, fix this.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-04-13 23:41:45 +02:00
Marek Vasut
27d7f04a47 ARM: rmobile: Enable SCIFA0 early on H2 Stout
The H2 Stout uses SCIFA0 for serial console, make sure it is
available very early on when probing from DT.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-04-13 23:41:44 +02:00
Marek Vasut
451e22fa33 serial: sh: Add SCIFA0 address entry
Add the SCIFA0 address entry so it can be used in TPL if needed
due to size restrictions.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-04-13 23:41:44 +02:00
Marek Vasut
d526801bf4 net: sh_eth: Add remaining Gen2 DT compatible
Add compatible strings for R8A7790, R8A7793 and R8A7794, since the
contemporary DTs use those don't have a generic match value.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2018-04-13 23:41:44 +02:00
Marek Vasut
cc64a51546 clk: renesas: Minor clean up of the R8A7790 clock driver
The initconst is not used in U-Boot, drop it. The r8a7790_crit_mod_clks
is also not used in U-Boot, so drop it too.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-04-13 23:41:44 +02:00
Heinrich Schuchardt
901b77b9c8 vexpress: fix syntax error in armv7_boot_nonsec_default()
With CONFIG_ARMV7_BOOT_SEC_DEFAULT=y a syntax error occurs.
Add the missing semicolon.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-04-13 17:06:16 -04:00
Tom Rini
d291d8235b configs: Fixup some CPSW-related items
- For am335x_pdu001 we do not want the CPSW driver, drop it
- Re-sync the defconfig for am43xx_evm_rtconly as it came in after the
  patch that converted CPSW to Kconfig was posted but before it was
  applied.
- Drop empty section / comments from pengwyn
- Drop empty section / comments from baltos and drop unused
  CONFIG_SPL_NET_VCI_STRING (it does not enable CONFIG_SPL_NET_SUPPORT
  currently and SPL_NET_VCI_STRING has been migrated already).

Cc: Felix Brack <fb@ltec.ch>
Cc: Lokesh Vutla <lokeshvutla@ti.com>
Cc: Yegor Yefremov <yegorslists@googlemail.com>
Cc: Lothar Felten <lothar.felten@gmail.com>
Fixes: f02b8d1761 ("Migrate CONFIG_DRIVER_TI_CPSW to Kconfig")
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Felix Brack <fb@ltec.ch>
Tested-by: Felix Brack <fb@ltec.ch>
2018-04-13 17:06:16 -04:00
Vasyl Vavrychuk
3194daa10b vxworks: fixed cpu enable using PSCI on armv8
Without armv8_setup_psci register VBAR_EL3 is not set up property which
makes SMC calls jump to invalid location.

smp_kick_all_cpus is required to make slave cpus leave gic_wait_for_interrupt.
Without this they will never pursue booting process.

Fix was applied to the two ways of booting VxWorks: bootvx and bootm commands.

This implementation is very similar to what is done in boot_jump_linux
in arch/arm/lib/bootm.c file.

Tested on VxWorks 7 release SR0520 2017-12-08 Intel Stratix 10 SX SoC
Development Kit board.

Signed-off-by: Vasyl Vavrychuk <vasyl.vavrychuk@globallogic.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2018-04-13 17:06:05 -04:00
Joe Hershberger
16879cd25a net: phy: Don't limit phy addresses by default
Some boards expect to find more than one phy while other boards are old
and need to be limited to a specific phy address. Only limit the phy
address for boards that opt in.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-04-13 15:56:47 -05:00
Joe Hershberger
86271b3f29 xilinx: Only enable dist boot pxe when DHCP is enabled
Otherwise, we see this:
In file included from include/configs/zynq-common.h:183:0,
                 from include/config.h:5,
                 from include/common.h:21,
                 from env/common.c:11:
include/config_distro_bootcmd.h:319:2: error: expected ?}? before ?BOOT_TARGET_DEVICES_references_PXE_without_CONFIG_CMD_DHCP_or_PXE?
  BOOT_TARGET_DEVICES_references_PXE_without_CONFIG_CMD_DHCP_or_PXE
  ^
include/config_distro_bootcmd.h:319:2: note: in definition of macro ?BOOTENV_DEV_NAME_PXE?

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
2018-04-13 15:48:38 -05:00
Joe Hershberger
092f2f35b5 Revert "Kconfig: cmd: Make networking command dependent on NET"
This reverts the parts of commit 3b3ea2c56e
where it changed the EFI dependency on NET.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>

Reviewed-by: Duncan Hare <dh@synoia.com>
2018-04-13 15:48:34 -05:00
Joe Hershberger
5f967c0493 net: Make core net code depend on NET instead of CMD_NET
No commands are necessary to have a network stack.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>

Reviewed-by: Duncan Hare <dh@synoia.com>
2018-04-13 15:48:30 -05:00
Joe Hershberger
3dfbc53bd6 net: Make the BOOTP options default
The BOOTP options used to be and should still be default for all boards
with CMD_NET enabled. One should not be forced to use DISTRO_DEFAULTS to
get them.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>

Reviewed-by: Duncan Hare <dh@synoia.com>
2018-04-13 15:48:25 -05:00
Joe Hershberger
2b9f486bf5 net: Improve BOOTP PXE config option
Improve the documentation and correct the listed dependencies.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>

Reviewed-by: Duncan Hare <dh@synoia.com>
2018-04-13 15:48:21 -05:00
Joe Hershberger
80449c032c net: Add the BOOTP_DNS2 option to Kconfig
Commit 3b3ea2c56e ("Kconfig: cmd: Make networking command dependent on NET")
removed the help documentation from the README but didn't add it back to Kconfig.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Duncan Hare <dh@synoia.com>
2018-04-13 15:48:17 -05:00
Joe Hershberger
8df69d9063 net: Improve menu options and help for BOOTP options
The options were pretty unhelpful, so improve them some.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Chris Packham <judge.packham@gmail.com>
2018-04-13 15:48:13 -05:00
Joe Hershberger
e88b2563dd net: Move the DHCP command below the BOOTP command
Move DHCP to directly follow BOOTP so that Kconfig can show the
dependency as a hierarchy.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>

Reviewed-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Duncan Hare <dh@synoia.com>
2018-04-13 15:48:09 -05:00
Joe Hershberger
92fa44d58f net: Move net command options to the cmd menu
Options that controlled the tftp and bootp commands depended on their
commands, but lived in the net menu.

Move them so they are in a consistent location.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Chris Packham <judge.packham@gmail.com>
2018-04-13 15:48:05 -05:00
Joe Hershberger
ba6288557d net: Fix distro default dependencies
PING requires CMD_NET, not NET.
Also, CMD_NET already depends on NET, so no need to directly depend
on it.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
2018-04-13 15:48:01 -05:00
Joe Hershberger
d7a45eafda net: Make CMD_NET a menuconfig
Previously, CMD_NET was an alias for 2 commands (bootp and tftpboot) and
they we not able to be disabled. Separate out those 2 commands and move
CMD_NET up to the menu level, which more accurately represents the code.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>

Reviewed-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Duncan Hare <dh@synoia.com>
2018-04-13 15:47:57 -05:00
Marek Vasut
b107fd5bab net: sh_eth: Add remaining Gen2 DT compatible
Add compatible strings for R8A7790, R8A7793 and R8A7794, since the
contemporary DTs use those don't have a generic match value.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-04-13 15:47:52 -05:00
Siva Durga Prasad Paladugu
69065e8ff4 net: zynq_gem: Use max-speed property from dt
Add support to use max-speed property from dt for
determining the supported speed. Use 1000Mbps as
default.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-04-13 15:47:48 -05:00
Ye Li
2087eac257 net: fec: Fix issue in DM probe timeout
Since the probe function has changed to reset FEC controller prior than
setup PHY. If reset FEC controller timeout, the priv->phydev is not
initialized, so can't free it.

Signed-off-by: Ye Li <ye.li@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-04-13 15:47:39 -05:00
Peng Fan
979e0fc862 net: fex_mxc: add i.MX6UL/SX/SL compatible
Add i.MX6UL/SX/SL compatible.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-04-13 15:47:39 -05:00
Peng Fan
fbada4855d net: fec: sharing MDIO for two enet controllers
On i.MX6SX, 6UL and 7D, there are two enet controllers each has a
MDIO port. But Some boards share one MDIO port for the two enets. So
introduce a configuration CONFIG_FEC_MXC_MDIO_BASE to indicate
the MDIO port for sharing.
In Kconfig, user needs enable CONFIG_FEC_MXC_SHARE_MDIO first to enter
the CONFIG_FEC_MXC_MDIO_BASE.

To i.MX28, adapt to use the new config

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
2018-04-13 15:47:38 -05:00
Peng Fan
8b20386356 net: fec: set dev->seq to priv->dev_id
To platforms has two enet interface, using dev->seq could
avoid conflict.

i.MX6UL/ULL evk board net get the wrong MAC address from fuse,
eth1 get MAC0 address, eth0 get MAC1 address from fuse. Set the
priv->dev_id to device->seq as the real net interface alias id then
.fec_get_hwaddr() read the related MAC address from fuse.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-04-13 15:47:38 -05:00
Peng Fan
1bcabd7921 net: fec_mxc: simplify fec_get_miibus
No need to provide two prototype for this function.
Use ulong for the first parameter, then this function
could be shared for DM/non DM case.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-04-13 15:47:37 -05:00
Ye Li
07763ac928 net: fec_mxc: Fix DM driver issue in recv
When using ethernet DM driver, the recv interface has a
change with non-DM interface, that driver needs to set
the packet pointer and provide it to upper layer to process.

In fec driver, the fecmxc_recv functions does not handle the
packet pointer parameter. This may cause crash in upper layer
processing because the packet pointer is not set.

This patch allocates a buffer for the packet pointer and free it
through free_pkt interface.

Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-04-13 15:47:37 -05:00
Matt Pelland
0a85f024c5 net: mvneta: support setting hardware address
mvneta already supports setting the MAC address but this was only done
internally when some other part of U-Boot tries to actually use the
interface. This commit exposes this functionality to the ethernet core
code so that the MAC addresses of all interfaces are configured
correctly even if they are not used before loading Linux.

Signed-off-by: Matt Pelland <mpelland@starry.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-04-13 15:47:31 -05:00
Christian Gmeiner
52ff8020d0 kconfig: add CONFIG_CC_COVERAGE
Make it possible to use gcc code coverage analysis.

v1 -> v2:
 - Kconfig: remove not needed 'default n'
 - Makefile: use consistent spacing

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-04-13 13:02:50 -04:00
Jean-Jacques Hiblot
cd5d274252 configs: dra7xx_evm/dra7xx_hs_evm: Enable AHCI and PIPE3
Those options are required to enable support for SATA on DRA7 platforms.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-04-13 13:02:50 -04:00
Jean-Jacques Hiblot
64563f5333 dwc_ahci: Fix breakage
The dwc_ahci has been broken for quite some time now. The breakage has been
introduced by the series "dm: scsi: Enhance SCSI support for driver model"

Use ahci_bind_scsi() and ahci_probe_scsi() to properly bind and probe the
driver.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-04-13 13:02:50 -04:00
Tom Rini
93cb6142c1 Merge git://git.denx.de/u-boot-sh 2018-04-13 09:23:53 -04:00
Tom Rini
c8a0126f88 Merge git://git.denx.de/u-boot-usb 2018-04-13 09:22:56 -04:00
Marek Vasut
97ed677831 ARM: rmobile: Set maximum kernel size to 64 MiB on Gen3
The Gen3 kernel images are often above 8 MiB, increase the
maximum kernel size to 64 MiB to future-proof it, just like
many other ARM64 boards do.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-04-11 23:19:52 +02:00
Marek Vasut
7beccc52a1 ARM: rmobile: Fix the memory map on Gen3
Fix up the memory map on Gen3 to match datasheet properly.
This simplifies the memory map setup as well, since we do
no longer need this massive complexity.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-04-11 23:19:52 +02:00
Marek Vasut
ea5512eb09 spi: sh_qspi: Make use of the 32byte FIFO
The QSPI controller on RCar Gen2 has 32byte FIFO. Instead of doing
the SPI transmission 1 byte at time, if there is a 32byte chunk of
data to be transferred, fill the FIFO completely and then transfer
the data to/from the FIFO. This increases the SPI NOR access speed
significantly.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
2018-04-11 23:19:51 +02:00
Marek Vasut
9573db654d spi: sh_qspi: Replace ad hoc waiting with wait_for_bit
Replace the ad-hoc endless loops with wait_for_bit() with
reasonable timeout. Note that the loops had internal 10uS
delays, although there is no reason for those on this HW,
so they are dropped.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
2018-04-11 23:19:51 +02:00
Marek Vasut
1182264952 spi: sh_qspi: Drop SPBDCR wait
Waiting for SPBDCR == 1 is not required and is covered by the
subsequent wait for SPSR_SPRFF, so drop this.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
2018-04-11 23:19:51 +02:00
Marek Vasut
0e6fa20b14 spi: sh_qspi: Replace data types with short ones
Just replace unsigned {char,short,long} with u{8,16,32},
no functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
2018-04-11 23:19:50 +02:00
Marek Vasut
fbebea27e1 mtd: spi: Add Renesas RPC SPI-flash driver
Add driver for the RPC block in SPI-flash mode. This driver allows
access to a SPI NOR flash attached to the RPC block and does not
support RPC in Hyperflash mode. Note that this block is extremely
selective when communicating with the SPI NOR.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-04-11 23:12:01 +02:00
Marek Vasut
a405a55ba8 mtd: rpc: Add Renesas RPC Hyperflash driver
Add driver for the RPC block in Hyperflash mode. This driver allows
access to a CFI Hyperflash attached to the RPC block and does not
support RPC in SPI mode.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-04-11 23:12:00 +02:00
Marek Vasut
cf39f3f304 mmc: renesas-sdhi: Wait after reconfiguring pins
The IP requires some time to recuperate after the IO pin
properties were changed. Add a delay to assure this.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-04-11 23:12:00 +02:00
Marek Vasut
5ee7c9dc77 mmc: matsushita-common: Add missing else
Fix minor rebase omission, the else was missing which triggered
two accesses to the register on 64bit variant of the IP.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-04-11 23:12:00 +02:00
Marek Vasut
f23b208ebe mmc: matsushita-common: Wait for command completion
Make sure to wait for the command to complete altogether, including
the trailing 8 clock cycles. This prevents the driver for accidentally
writing the CMD register too fast before the previous command fully
completed.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-04-11 23:12:00 +02:00
Marek Vasut
8dc9a10e49 mmc: matsushita-common: Correctly set mode in 16bit
The HOST_MODE register must be set to 0 when the IP is operated in 16bit
mode, otherwise 16bit access to the data FIFO may fail.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-04-11 23:12:00 +02:00
Marek Vasut
01c0151a36 mmc: matsushita-common: Special case only select registers in 16bit
There are only a few registerse used in the 16bit mode which are
32bit internally. Special-case only those in the IO accessors and
always write both halves. Any other register access is protected
from accidentally overwriting neighboring register.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-04-11 23:11:59 +02:00
Marek Vasut
8af6737d45 ARM: rmobile: Enable HS200 mode on RCar Gen3
Enable the HS200 on RCar Gen3 platforms, since the SDHI core supports it.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-04-11 23:11:59 +02:00
Marek Vasut
f63968ba26 mmc: renesas-sdhi: Add Renesas SDR104/HS200 tuning support
Add code for PHY tuning required for SDR104/HS200 support on Renesas RCar.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-04-11 23:11:59 +02:00
Marek Vasut
0e2bd5aa49 mmc: matsushita-common: Export register access functions
Export the matsu_sd_{read,write}l() common register access
functions, so that they can be used by other drivers sharing
the common code.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-04-11 23:11:59 +02:00
Marek Vasut
e10422f108 mmc: matsushita-common: Properly handle pin voltage configuration
Factor out the regulator handling into set_ios and add support for
selecting pin configuration based on the voltage to support UHS modes.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-04-11 23:11:59 +02:00
Marek Vasut
58c35b17aa mmc: matsushita-common: Always check controller version
Handle the controller version even if quirks are set. The controller in
Renesas Gen3 SoCs does provide the version register, which indicates a
controller v10 and the controller does support internal DMA and /1024
divider.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-04-11 23:11:59 +02:00
Marek Vasut
a7b7401c78 mmc: matsushita-common: Handle bus width 0
Handle bus width 0 as 1-bit bus to assure valid content of
MATSU_SD_OPTION register WIDTH field.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-04-11 23:11:58 +02:00
Marek Vasut
635ae6fefa mmc: matsushita-common: Handle DMA completion flag differences
The DMA READ completion flag position differs on Socionext and Renesas
SoCs. It is bit 20 on Socionext SoCs and using bit 17 is a hardware bug
and forbidden. It is bit 17 on Renesas SoCs and bit 20 does not work on
them.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-04-11 23:11:58 +02:00
Marek Vasut
78773f1467 mmc: matsushita-common: Handle Renesas div-by-1
On the Renesas version of the IP, the /1 divider is realized by
setting the clock register [7:0] to 0xff instead of setting bit
10 of the register. Check the quirk and handle accordingly.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-04-11 23:11:58 +02:00
Marek Vasut
f98833dbe6 mmc: matsushita-common: Add Renesas RCar quirks
Add a quirk to identify that the controller is Renesas RCar variant
of the Matsushita SD IP and another quirk indicating it can support
Renesas RCar HS200/HS400/SDR104 modes.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-04-11 23:11:58 +02:00
Marek Vasut
147169d9c9 mmc: matsushita-common: Use mmc_of_parse()
Drop the ad-hoc DT caps parsing in favor of common framework function.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-04-11 23:11:58 +02:00
Marek Vasut
7cf7ef81ed mmc: renesas-sdhi: Handle 16bit IP
The Renesas RCar Gen2 chips have a mix of 32bit and 16bit variants
of the IP. There is no DT property which allows discerning those,
so what Linux does is it checks the size of the register area and
if it is 0x100, the IP is 16bit, otherwise the IP is 32bit. Handle
the distinction the same way.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-04-11 23:11:57 +02:00
Marek Vasut
c769e60990 mmc: uniphier: Allow passing quirks to the probe function
Certain instances of the SD IP require more elaborate digging
in the DT to figure out which variant of the SD IP is in use.
Allow explicit passing of the quirks into the probe function.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-04-11 23:11:57 +02:00
Marek Vasut
db1266d696 mmc: uniphier: Add support for 16bit variant
Add support for 16bit mutation of the Matsushita SD IP. Since some
registers are internally 32bit, the matsu_sd_{read,write}l() has
to special-case this 16bit variant a bit.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-04-11 23:11:57 +02:00
Marek Vasut
620fd85c0b mmc: uniphier: Drop useless check
Drop useless check in matsu_sd_{read,write}q(), this is only ever
called to read the data from FIFO and only when 64bit variant of
the block is used anyway.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-04-11 23:11:57 +02:00
Marek Vasut
12a510e23f mmc: uniphier: Factor out FIFO accessors
Add macros to generate the FIFO accessors, since the code is almost
the same with only minor differences. This is done in preparation
for adding 16bit variant of the IP.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-04-11 23:11:56 +02:00
Marek Vasut
33f65ec83e ARM: rmobile: Switch to CONFIG_RENESAS_SDHI
Since the Renesas SDHI has it's own custom driver sharing the
common code with Uniphier one, adjust the Kconfig entries.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-04-11 23:11:56 +02:00
Marek Vasut
7dfddc099d mmc: renesas-sdhi: Add Renesas SDHI Kconfig entry
Add Kconfig entry for the Renesas SDHI variant of the controller
and split the Makefile entries accordingly.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-04-11 23:11:56 +02:00
Marek Vasut
e94cad93b7 mmc: uniphier: Split out SoC specific bits from the driver
Factor out common code from the uniphier SD driver, change the prefix
of the functions from uniphier_sd_ to matsu_sd_ and create separate
renesas-sdhi.c driver. Thus far, all the code is still compiled when
CONFIG_UNIPHIER_MMC is selected and there is no functional change.
This patch is a preparation for further split of the SoC specific
parts of the Matsushita SD driver, used both on Uniphier and R-Car.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-04-11 23:11:56 +02:00
Marek Vasut
78bf3f2180 ARM: rmobile: Enable HUSH on M2 Porter
Enable the HUSH shell, since it is far more capable.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-04-11 23:11:55 +02:00
Marek Vasut
82239aa7cd ARM: rmobile: Add JTAG recovery support for M2 Porter
Add JTAG recovery support into the M2 Porter TPL. This allows the
TPL to be loaded over JTAG, initialize the system, wait for the
JTAG debugger to load U-Boot image into RAM and then resume and
start U-Boot from RAM.

The procedure is as follows:
1) Load u-boot-tpl.bin to 0xe6300000
2) Write magic number 0x1337c0de to 0xe6300020
   TPL checks for this particular magic and starts JTAG recovery
   if this number is present. This is not present by default.
3) Start U-Boot TPL from 0xe6300000
4) Wait for a message from TPL on UART indicating JTAG boot:
   "JTAG boot detected!"
5) Halt the system in JTAG debugger
6) Load U-Boot image (u-boot.img) to 0x4fffffc0
7) Write magic number 0xb33fc0de to 0xe6300024
   TPL checks for this particular magic to verify that the U-Boot
   image was loaded into DRAM by the JTAG debugger.
8) Resume the system in JTAG debugger

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-04-11 23:11:55 +02:00
Marek Vasut
9a5483e9df ARM: rmobile: Add TPL support on R8A7791 M2 Porter
Add and enable TPL on M2 Porter. The TPL must fit into 16 kiB due
to the Gen2 BootROM restriction. The TPL is running from MERAM and
is capable of performing the initial initialization of PFC, Clock,
GPIO, LBSC, DBSC and QSPI NOR. DBSC is responsible for bringing up
the DDR DRAM access. The TPL is capable of loading the next stage,
U-Boot, from either SPI NOR or UART as a fallback. If either does
provide a valid U-Boot uImage, the system stops, which allows the
operator to load U-Boot ie. via JTAG and start it manually.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-04-11 23:11:55 +02:00
Marek Vasut
c670607331 ARM: rmobile: Do not init caches in TPL before DRAM
Skip the cache initialization, which can be done later on in U-Boot
proper, since this interferes with early DRAM initialization in TPL.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-04-11 23:11:54 +02:00
Marek Vasut
ce19d4ca7d ARM: rmobile: Split U-Boot and SPL sources on Porter
Pull the SPL code from porter.c into a separate file in
preparation for the addition of system initialization code.
No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-04-11 23:11:54 +02:00
Tom Rini
1a7cdb88f5 Merge git://git.denx.de/u-boot-i2c 2018-04-11 17:00:52 -04:00
Marek Vasut
d79dfd4519 spl: ram: Add TPL Kconfig symbols
Add TPL config symbols for RAM loading matching the SPL ones.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Tom Rini <trini@konsulko.com>
2018-04-11 13:22:06 -04:00
Marek Vasut
49132610d1 spl: ram: Convert to CONFIG_IS_ENABLED
This patch is a preparation for adding TPL support for RAM loading.
CONFIG_IS_ENABLED allows for proper handling of the U-Boot/SPL/TPL
differences in config symbol names.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Tom Rini <trini@konsulko.com>
2018-04-11 13:22:06 -04:00
Marek Vasut
a821a77aa7 ARM: Fix Makefile during SPL and TPL build
The tiny variants of memset and memcpy implementations can be
built for TPL as well, check whether a TPL build is in progress
and avoid including the default variants.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
2018-04-11 13:22:06 -04:00
Marek Vasut
a9d7990dc4 serial: Fix Makefile during SPL and TPL build
This patch fixes a situation where CONFIG_DM_SERIAL is enabled for
regular U-Boot and SPL, but not for TPL. In that case, the build
will try to include serial-uclass into the TPL nonetheless, because
CONFIG_DM_SERIAL is set.

The solution is to check if the build is for SPL or TPL and in that
case, check if CONFIG_$(SPL_TPL_)DM_SERIAL is also set. Only in that
case, include serial-uclass.c . If the build is for regular U-Boot,
CONFIG_BUILD is not set, so only check if CONFIG_DM_SERIAL is set
and if so, include serial-uclass.c

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
2018-04-11 13:22:05 -04:00
Marek Vasut
6ce3d67c70 tpl: ymodem: Add CONFIG_TPL_YMODEM_SUPPORT to Kconfig
Add Kconfig entry for CONFIG_TPL_YMODEM_SUPPORT symbol to match the SPL one.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Tom Rini <trini@konsulko.com>
2018-04-11 13:22:05 -04:00
Marek Vasut
1e725e27eb tpl: spi: Add CONFIG_TPL_SPI_LOAD to Kconfig
Add Kconfig entry for CONFIG_TPL_SPI_LOAD symbol to match the SPL one.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Tom Rini <trini@konsulko.com>
2018-04-11 13:22:05 -04:00
Marek Vasut
555004381e spl: spi: Move CONFIG_SPL_SPI_LOAD to Kconfig
Add Kconfig entry for CONFIG_SPL_SPI_LOAD symbol and move all
configurations using it to Kconfig.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Tom Rini <trini@konsulko.com>
2018-04-11 13:22:00 -04:00
Neil Armstrong
2960e27e38 phy: Add Amlogic Meson USB2 & USB3 Generic PHY drivers
The Amlogic Meson GXL and GXM (simple variant) embeds up to 3 USB2 PHYs
and an USB3 PHY. This patch adds drivers for these for the standard generic
PHY interface and supports the power-on/off calls and set the Host mode by
default.
They are based on the excellent work from Martin Blumenstingl merged in linux.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2018-04-11 17:22:07 +02:00
Neil Armstrong
7c839ea70c usb: host: dwc3: Add support for multiple PHYs
DWC3 Ips can have more than 1 PHY for USB2 and 1 PHY for USB3, add support
for a generic number of PHYs and adapt the code to handle a generic
number of PHYs.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2018-04-11 17:22:07 +02:00
Neil Armstrong
ca7fdc8b12 usb: host: Add simple of glue driver for DWC3 USB Controllers integration
This is a port of the dwc3-of-simple driver from Linux to enable/deassert
clock and resets of a simple DWC3 Controller HW glue.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2018-04-11 17:22:07 +02:00
Tom Rini
c4446b1d6c Merge git://git.denx.de/u-boot-ubi 2018-04-11 10:05:41 -04:00
Mario Six
e5c762f5a7 i2c: fsl: Add option to get clock from DT
Add an option to get the clock speed from the device tree, hence adding
compatibility with DM clock drivers.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-04-11 11:34:55 +02:00
Mario Six
d934832de6 i2c: fsl: Use dev_read_addr
Since bus translations are now fully supported, use a plain
"dev_read_addr" to get the device address from the device tree.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-04-11 11:34:46 +02:00
Mario Six
2df71d6d6a i2c: ihs_i2c: Use new fpgamap interface
The fpgamap interface has been switched to a "single function + data
size" interface. Reflect this change in the IHS I2C driver.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-04-11 11:34:37 +02:00
Alexander Kochetkov
aa54192d4a dm: i2c: implement gpio-based I2C deblock
The commit implement a gpio-based software deblocking. The code
extract I2C pins description from device tree, switch pins to GPIO
mode, toggle SCL until slave release SDA, send I2C stop and switch
I2C pins back to I2C mode.

Signed-off-by: Alexander Kochetkov <al.kochet@gmail.com>
2018-04-11 11:34:27 +02:00
Alexander Kochetkov
df8dcac8a3 dm: i2c: dts: Add gpios and pinctrl device tree properties
The commit describe usage of gpios and pinctrl device tree
properties in order to enable gpio-based software deblocking.

Signed-off-by: Alexander Kochetkov <al.kochet@gmail.com>
2018-04-11 11:34:17 +02:00
Bradley Bolen
05ea83b67e ubifs: Change value of mutex_is_locked()
The mutex lock and unlock functions are stubbed out and mutex_is_locked
was 0.  This caused asserts to fail in ubifs code when checking that the
mutex was locked.  For example,

UBIFS assert failed in ubifs_change_lp at 540
UBIFS assert failed in ubifs_release_lprops at 278

Assume that the "mutex" is locked since that is the normal case when it
is checked in the ubifs code.

Signed-off-by: Bradley Bolen <bradleybolen@gmail.com>
2018-04-11 11:27:07 +02:00
Heinrich Schuchardt
c398f2df7c checkpatch.pl: update from Linux kernel v4.16
Update scripts/checkpatch.pl from upstream.

One of the many corrections is not creating an error for cover-letters.

Reintroduce U-Boot's
5c761ce586
checkpatch.pl: Add warning for new __packed additions

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-04-10 15:19:15 -04:00
Kristian Amlie
8a0b827b1a fw_printenv: Fix crash due to incorrect size for malloc'ed string.
Using sizeof gives the size of the pointer only, not the string. This
could easily lead to crashes when using -l argument.

Signed-off-by: Kristian Amlie <kristian.amlie@northern.tech>
2018-04-10 15:19:15 -04:00
Heinrich Schuchardt
2f8ffb0655 get_maintainer.pl: update from Linux kernel v4.16
The most significant change is the addition of the --self-test option
which allows to run a consistency check on all MAINTAINERS files.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-04-10 15:19:14 -04:00
Heinrich Schuchardt
b57aaa07f2 MAINTAINERS: ARM STM STM32MP: correct file paths
Provide correct file paths.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-04-10 15:19:14 -04:00
Neil Armstrong
65388d0dc5 clk: add sandbox test for bulk API
This patch adds the bulk clock API tests for the sandbox test suite.

It's very similar to the main test but only uses the _bulk() API and
checks if the clocks are correctly enabled/disabled.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-04-10 15:18:56 -04:00
Neil Armstrong
a855be87da clk: Add get/enable/disable/release for a bulk of clocks
This patch adds a "bulk" API to the clock API in order to get/enable/disable
/release a group of clocks associated with a device.

This bulk API will avoid adding a copy of the same code to manage
a group of clocks in drivers.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-04-10 11:52:16 -04:00
Neil Armstrong
91f5f8b73c reset: add sandbox test for bulk API
This patch adds the bulk reset API tests for the sandbox test suite.

Unlike the main test, it also check the "other" reset signal using the bulk API
and checks if the resets are correctly asserted/deasserted.

To allow the bulk API to work, and avoid changing the DT, the number of resets
of the sandbox reset controller has been bumped to 101 for the "other" reset
line to be valid.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-04-10 11:52:16 -04:00
Neil Armstrong
0c28233903 reset: Add get/assert/deassert/release for bulk of reset signals
This patch adds a "bulk" API to the reset API in order to get/deassert/
assert/release a group of reset signals associated with a device.

This bulk API will avoid adding a copy of the same code to manage
a group of reset signals in drivers.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-04-10 11:52:16 -04:00
Simon Glass
b71ac16063 log: Add units to code-size stats in README.log
Without the units these numbers are confusing. Add a comment about the
unit being 'bytes' and mention 'buildman' as the source.

Suggested-by: Lukasz Majewski <lukma@denx.de>
Signed-off-by: Simon Glass <sjg@chromium.org>
2018-04-10 11:52:16 -04:00
Simon Glass
45fac9fc18 log: Correct missing free() on error in log_add_filter()
If there is a problem with the parameters to log_add_filter(), the memory
allocated is currently not freed. Fix this.

Reported-by: Coverity (CID: 171962)

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-04-10 11:52:16 -04:00
Guillaume GARDET
004d00914a mkimage: do not fail if there is no print_header function
Commit 253c60a breaks the exit value of 'mkimage -T rkimage'
and print the following  error:
  mkimage: Can't print header for Rockchip Boot Image support: Success

It is not a failure to not print headers, so just display the warning message,
and finish the function properly.

Signed-off-by: Guillaume GARDET <guillaume.gardet@free.fr>

Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-04-10 11:52:16 -04:00
Patrice Chotard
d409c96216 armv7m: disable icache before linux booting
Similarly to ARMV7, on ARMV7M instruction cache memory needs
to be disabled before running linux kernel to avoid kernel to
be stuck.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-04-10 11:52:16 -04:00
Neil Armstrong
e1e1e85203 serial: meson: Update compatible with new Linux bindings
The Amlogic Meson SoCs serial bindings were not written when serial
support was pushed into Linux and U-Boot.
A clean bindings document has been merged into Linux tree to correctly
handle the multiple clocks feeding the serial peripheral.
This update the U-Boot serial_meson driver with the new compatible
string for Amlogic Meson GX Socs.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-04-10 11:52:16 -04:00
Neil Armstrong
20367bb560 reset: Add Amlogic Meson Reset Controller
The Amlogic Meson SoCs embeds up to 256 reset lines, add the corresponding
driver.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2018-04-10 11:52:16 -04:00
Álvaro Fernández Rojas
060690663d sysreset: syscon: convert to use live dt
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-04-10 11:52:16 -04:00
Tom Rini
2600df4f8e Merge tag 'xilinx-for-v2018.05-rc2' of git://git.denx.de/u-boot-microblaze
Xilinx changes for v2018.05-rc2

- Various DT changes and sync with mainline kernel
- Various defconfig updates
- Add SPL init for zcu102 revA
- Add new zynqmp boards zcu100/zcu104/zcu106/zcu111/zc12XX
  and zc1751-dc3
- Net fixes - xlnx,phy-type
- 64bit axi ethernet support
- arasan: Fix nand write issue
- fpga fixes
- Maintainer file updates
2018-04-09 11:06:21 -04:00
Tom Rini
844fb498cc Merge tag 'signed-efi-next' of git://github.com/agraf/u-boot
Patch queue for efi - 2018-04-09

Highlights this time around:

  - Lots of minor spec compliance fixes
  - Support full range of GOP BLT commands
  - More fine grained error checking
  - Network fixes (init, DP)
  - Lots of other bug fixes...
2018-04-09 11:05:44 -04:00
Fabio Estevam
02325c7bfd treewide: fix up files incorrectly marked executable
Inspired by the following kernel commit:

"commit 90fda63fa1156ec1bcfd7f9ca384cec221f70a21
Author: Linus Torvalds <torvalds@linux-foundation.org>
Date:   Sat Apr 7 13:31:23 2018 -0700

treewide: fix up files incorrectly marked executable

Joe Perches noted that we have a few source files that for some
inexplicable reason (read: I'm too lazy to even go look at the history)
are marked executable:

drivers/gpu/drm/amd/amdgpu/vce_v4_0.c
drivers/net/ethernet/cadence/macb_ptp.c

A simple git command line to show executable C/asm/header files is this:

   git ls-files -s '*.[chsS]' | grep '^100755'

and then you can fix them up with scripting by just feeding that output
into:

  | cut -f2 | xargs chmod -x

and commit it.

Which is exactly what this commit does.

Reported-by: Joe Perches <joe@perches.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>"

Do the same in the U-Boot source tree.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-04-09 15:16:31 +02:00
Michal Simek
f190eaf002 arm64: zynqmp: Add support for Xilinx zcu111-revA
Xilinx zcu111 is a customer board. It is reusing some parts from zcu102.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09 12:14:53 +02:00
Michal Simek
cf0bcd7d02 arm64: zynqmp: Add support for Xilinx zcu106-revA
Xilinx zcu106 is a customer board. It is reusing some parts from zcu102.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09 12:14:52 +02:00
Michal Simek
f7c8e491e9 arm64: zynqmp: Add support for zcu104 customer board
Xilinx zcu104 is another customer board. It is sort of zcu102 clone with
some differences.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09 12:14:52 +02:00
Michal Simek
85231c087e arm64: zynqmp: Add support for zc12xx boards
Add support for zc12xx boards. All of them are internal boards for
silicon validation and share very similar base platforms.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09 12:14:52 +02:00
Michal Simek
10aaa3584b arm64: zynqmp: Add support for zc1751 dc3
zc1751 is based board with dc3 extenstion card which is used for silicon
validation.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09 12:14:52 +02:00
Michal Simek
6d0340931e arm64: zynqmp: Add support for zcu100 aka Ultra96 board
Add support for Xilinx zcu100.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09 12:14:52 +02:00
Michal Simek
949ec53c34 arm64: zynqmp: Get 200MHz clock early for MMC
SPL MMC boot requires to have clock early.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09 12:14:52 +02:00
Michal Simek
704744f81b arm64: zynqmp: Remove pinctrl settings
This part hasn't been pushed to mainline yet that's why remove it.
The patch can be reverted in future when this is pushed there.

Reported-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Alexander Graf <agraf@suse.de>
2018-04-09 12:14:52 +02:00
Michal Simek
aedd54739f arm64: zynqmp: Remove power domain description
This part hasn't been pushed to mainline yet that's why remove it.
The patch can be reverted in future when this is pushed there.

Reported-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Alexander Graf <agraf@suse.de>
2018-04-09 12:14:52 +02:00
Michal Simek
8314bfe5c7 arm64: zynqmp: Add low level initialization for zc1751
Add psu init for zc1751 dc cards.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09 12:14:51 +02:00
Michal Simek
979707baa9 arm64: zynqmp: Add low level initialization for zcu102-revA
Add psu init for zcu102-revA.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09 12:14:51 +02:00
Michal Simek
cd1c2fa5f7 arm64: zynqmp: Enable Fixed link support
This patch enables the fixed link support for
all ZynqMP boards.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09 12:14:51 +02:00
Michal Simek
4b148959da arm64: zynqmp: Enable mac address randomization for zc1751 dc5
There is no memory which stores mac address that's why generate it.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09 12:14:51 +02:00
Michal Simek
c7e36de6a7 arm64: zynqmp: Enable ethernet phys for zc1751 dc5
Enable ethernet phys for zc1751 dc5.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09 12:14:51 +02:00
Luca Ceresoli
5e3cac50cc arm64: zynqmp: Enable booting to ATF
U-Boot is now able to boot to ARM Trusted Firmware (ATF). The boot
flow is SPL(EL3) loads ATF and full u-boot and jump to ATF(EL3) which
pass control to full u-boot(EL2). This has been tested on zcu106, so
enable it in this defconfig.

To generate an image that triggers this booting flow, you need to pass
'-O arm-trusted-firmware' to mkimage.

Signed-off-by: Luca Ceresoli <luca@lucaceresoli.net>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09 12:14:51 +02:00
Michal Simek
1a82f59b31 arm64: zynqmp: Enable pxe and dhcp if commands are enabled
Targets without net can't use pxe or dhcp boot methods.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09 12:14:51 +02:00
Siva Durga Prasad Paladugu
c643c491b9 net: phy: xilinx_phy: Read phytype using property xlnx,phy-type
This patch reads phytype from property "xlnx,phy-type" instead
od simply looking for "phy-type". This is to be inline with
Linux and also fixes the issue of detecting it wrongly in
u-boot.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-04-09 12:14:51 +02:00
Vipul Kumar
047f3bf828 axi: ethernet: Added support for 64 bit addressing for axi-ethernet
This patch uses writeq() function to enable greater than 32 bit
addressing of axi-ethernet for the ZynqMP devices.

Signed-off-by: Vipul Kumar <vipulk@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-04-09 12:14:50 +02:00
Vipul Kumar
6fbbe2d8f6 nand: arasan_nfc: Fixed NAND write issue
In commit 2453c69518 ("arm64: zynqmp: nand: Fixed NAND erase issue for
size 1GiB or more"), ARASAN_NAND_MEM_ADDR1_PAGE_MASK macro changed
to 0xFFFF and the same macro is used in nand write and so that getting
nand write error.
This patch reverted this macro to the 0xFFFF0000 and used
ARASAN_NAND_MEM_ADDR1_COL_MASK in the nand erase function
which is equal to 0xFFFF.

Signed-off-by: Vipul Kumar <vipulk@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09 12:14:50 +02:00
Siva Durga Prasad Paladugu
71723aaec5 fpga: zynq: Add delay after PCFG_PROG_B change
There is delay needed after PCFG_PROGB change if
AES key source is efuse. This fixes the issue of
encrypted bitstream loading with AES efuse as key
source.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09 12:14:50 +02:00
Siva Durga Prasad Paladugu
31bcb3444c fpga: zynqmp: Fix the nonsecure bitstream loading issue
Xilfpga library expects the size of bitstream in a pointer
but currenly we are passing the size as a value. This patch
fixes this issue.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Nava kishore Manne <navam@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09 12:14:50 +02:00
Siva Durga Prasad Paladugu
19ed4b697b fpga: zynqmp: Update zynqmp_load() as per latest xilfpga
Latest xilfpga expects to set BIT5 of flags for nonsecure
bitsream and also expects length in bytes instead of words
This patch does the same.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
2018-04-09 12:14:50 +02:00
Nitin Jain
b32e11a715 fpga: zynqmp: Add support to get the PCAP status for fpga info command
This patch adds support for ZynqMP platform to print FPGA PCAP status
for "fpga status" command.

Signed-off-by: Nitin Jain <nitinj@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09 12:14:50 +02:00
Michal Simek
969dd4c7db clk: zynqmp: Add new compatible string for clock driver
New and old clk drivers are sharing IDs and descriptions.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09 12:14:50 +02:00
Michal Simek
5510d63786 arm: zynq: Use fixed partitions for spi flash for zc770 xm010
Sync with mainline.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09 12:14:50 +02:00
Michal Simek
99a2e34d77 arm: zynq: Fix eeprom dt nodes
- Use eeprom for node name
- Use atmel compatible string instead of at.
- Add missing labels

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09 12:14:49 +02:00
Javier Martinez Canillas
a3e10642da ARM: dts: zynq: Add generic compatible string for I2C EEPROM
The at24 driver allows to register I2C EEPROM chips using different vendor
and devices, but the I2C subsystem does not take the vendor into account
when matching using the I2C table since it only has device entries.

But when matching using an OF table, both the vendor and device has to be
taken into account so the driver defines only a set of compatible strings
using the "atmel" vendor as a generic fallback for compatible I2C devices.

So add this generic fallback to the device node compatible string to make
the device to match the driver using the OF device ID table.

Signed-off-by: Javier Martinez Canillas <javier@dowhile0.org>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09 12:14:49 +02:00
Michal Simek
c78a80ad13 arm: zynq: Use i2c-mux instead of i2cswitch for pca9548
i2c muxes should described like this.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09 12:14:49 +02:00
Michal Simek
051a8ad7bb arm: zynq: Sync up licenses with mainline kernel
Use different location for SPDX line. Also update dates for new mainline
DTS files.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09 12:14:49 +02:00
Michal Simek
03bc69dec9 arm: zynq: Remove 0x prefixes from cc108
The patch fixing issues reported by DTC:
zynq-cc108.dtb: Warning (unit_address_format): Node
/amba/spi@e000d000/flash@0/partition@0x400000 unit name should not have
leading "0x"
zynq-cc108.dtb: Warning (unit_address_format): Node
/amba/spi@e000d000/flash@0/partition@0x800000 unit name should not have
leading "0x"
zynq-cc108.dtb: Warning (unit_address_format): Node
/amba/spi@e000d000/flash@0/partition@0xc00000 unit name should not have
leading "0x"
zynq-cc108.dtb: Warning (unit_address_format): Node
/amba/spi@e000d000/flash@0/partition@0xd00000 unit name should not have
leading "0x"
zynq-cc108.dtb: Warning (unit_address_format): Node
/amba/spi@e000d000/flash@0/partition@0xf00000 unit name should not have
leading "0x"

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09 12:14:49 +02:00
Michal Simek
5208a3a46a arm64: zynqmp: Remove double spaces from dts file
There is no reason to have double spaces for indentation.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09 12:14:49 +02:00
Michal Simek
bbe5c7252d arm64: zynqmp: Add silabs prefix to u69 for zcu102
Add vendor prefix to si5341.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09 12:14:49 +02:00
Michal Simek
147ae1f210 arm64: zynqmp: Remove number from clock-generator node name
There shouldn't be a number appended based on spec.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09 12:14:49 +02:00
Michal Simek
95f7d6419d arm64: zynqmp: Remove u-boot commands from dts files
U-Boot commands shouldn't be the part of kernel DTS files.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09 12:14:48 +02:00
Srinivas Goud
1077dc2889 arm64: zynqmp: Update sd properties for dc5
This patch adds no-1-8-v below properties to sd node for dc5 board dts.

Signed-off-by: Srinivas Goud <srinivas.goud@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09 12:14:48 +02:00
Michal Simek
470f09c912 arm64: zynqmp: Enable ttcs for zc1751 dc5
Enable TTCs for this target as is done in Linux kernel.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09 12:14:48 +02:00
Michal Simek
43bf439472 arm64: zynqmp: Add eeprom reference to eeprom nodes
eeprom can contain information which can be used by nvmem drivers.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09 12:14:48 +02:00
Michal Simek
098505f500 arm64: zynqmp: Use atmel prefix instead of at
This changes was done in mainline and this patch is just following it.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09 12:14:48 +02:00
Michal Simek
ba9da60c4b arm64: zynqmp: Fix spi flash partition definition for zc1751 dc2
Using different node name and label partitions as data.
Also use latest compatible strings based on mainline review.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09 12:14:48 +02:00
Michal Simek
d13d97bb95 arm64: zynqmp: Use s/_/-/g in node name for zcu102 rev1.0
Follow spec for node names.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09 12:14:48 +02:00
Michal Simek
9d928f0418 arm64: zynqmp: Use keycode from input/input.h
Instead of hardcoding numbers.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09 12:14:48 +02:00
Michal Simek
52af7e3e81 arm64: zynqmp: Remove additional comments from dts files
Remove additional comments which were removed as the part of upstreaming.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09 12:14:48 +02:00
Michal Simek
18a952ce7f arm64: zynqmp: Sync up license with mainline kernel
Mainline Linux kernel has adopted SPDX header license in a different
format then was used before. This patch is syncing it up.

Also update years in License text and remove Nathalie's email because it
is no longer valid.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09 12:14:47 +02:00
Michal Simek
ba7b6dfae1 arm64: zynqmp: Use i2c-mux instead of i2cswitch instead
Based on review from mainline i2c-mux is standard name for i2c switches.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09 12:14:47 +02:00
Michal Simek
a16e578639 arm64: zynqmp: Use maxim prefix for all maxim chips
Use vendor prefix for Maxim chips.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09 12:14:47 +02:00
Michal Simek
680e9976c9 arm64: zynqmp: Sync alignment with mainline
Sync pcie and lpd_dma nodes with mainline version.
Incorrect locations are causing diff in statistics that's why
synchronizations are needed.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09 12:14:47 +02:00
Heinrich Schuchardt
f4cf153a48 efi_loader: correctly set the machine type in the PE header
The portable executable header has a field describing the machine type.
The machine type should match the binary. So on i386 we should use
IMAGE_FILE_MACHINE_I386 and on x86_64 we should use
IMAGE_FILE_MACHINE_AMD64. The actual value is issued by the objcopy
command invoked in scripts/Makefile.lib in depdendence of the value of
EFI_TARGET.

The value is used both for EFI_STUB and for EFI_LOADER.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-04-09 10:20:59 +02:00
Heinrich Schuchardt
23e7e6b6b9 MAINTAINERS: ZYNQMP: correct entries
Replace references to non-existent file.

Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Michal Simek <monstr@monstr.eu>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09 08:02:50 +02:00
Michal Simek
3d14228f1b MAINTAINERS: Fix zynqmp clock driver path
Fix c&p error from Zynq.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09 08:02:50 +02:00
Michal Simek
7ad6d9a4ad arm: zynq: Handle ENXIO error return value properly
zynq_clk_get_rate() is also returning ENXIO which is not handled now.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09 08:02:50 +02:00
Anton Gerasimov
1d4fc9ef1f ARM: dts: zynq: Rename dts for Z-turn board
Makes naming in line with other Zynq boards.

Signed-off-by: Anton Gerasimov <tossel@gmail.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09 08:02:50 +02:00
Anton Gerasimov
6fb7b75673 ARM: dts: zynq: Update dts for Z-turn board
Delete devices implemented in PL, stylistic changes.

Signed-off-by: Anton Gerasimov <tossel@gmail.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09 08:02:50 +02:00
Alex Kiernan
3404a0b382 Cleanup CONFIG_VERSION_VARIABLE migration
CONFIG_VERSION_VARIABLE had already been mostly migrated to Kconfig,
but two headers still referenced it. Also set defaults so that
most of the defconfigs inherit the default rather than needing it
to be set explicitly.

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
Reviewed-by: Petr Vorel <petr.vorel@gmail.com>
2018-04-08 23:05:58 -04:00
Alex Kiernan
d91013034a Migrate CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG to Kconfig
Convert CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG to Kconfig

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Petr Vorel <petr.vorel@gmail.com>
Reviewed-by: Petr Vorel <petr.vorel at gmail.com>
2018-04-08 23:05:58 -04:00
Alex Kiernan
9925f1dbc3 net: Move enetaddr env access code to env config instead of net config
In order that we can use eth_env_* even when CONFIG_NET isn't set, move
these functions to environment code from net code.

This fixes failures such as:

  board/ti/am335x/built-in.o: In function `board_late_init':
  board/ti/am335x/board.c:752: undefined reference to `eth_env_set_enetaddr'
  u-boot/board/ti/am335x/board.c:766: undefined reference to `eth_env_set_enetaddr'

which caters for use cases such as:

commit f411b5cca4 ("board: am335x: Always set eth/eth1addr environment
variable")

when Ethernet is required in Linux, but not U-Boot.

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
2018-04-08 23:00:58 -04:00
Alex Kiernan
8cf2f3602e ti: am335x: Fix build when networking is disabled
When compiling without CONFIG_CLOCK_SYNTHESIZER (which is implied by
CONFIG_DRIVER_TI_CPSW for am335x_evm), exclude the network setup for
AM335x-ICEv2 to avoid link time failures:

  board/ti/am335x/board.c:683: undefined reference to `setup_clock_synthesizer'

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
2018-04-08 23:00:58 -04:00
Alex Kiernan
a18d1064db usb: gadget: USB_ETHER requires network support
In order to compile the USB Ethernet gadget support we require that NET
is enabled, add that dependency here.

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-04-08 23:00:58 -04:00
Alex Kiernan
4f38592f9f ti: am335x: Fix bootargs when building without NET
If DHCP/PXE commands are disabled then the compilation fails due to
bootargs attempting to use them:

  include/config_distro_bootcmd.h:319:2: error: expected ‘}’ before ‘BOOT_TARGET_DEVICES_references_PXE_without_CONFIG_CMD_DHCP_or_PXE’

Ensure that if the command aren't enabled, we don't try and use them.

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-04-08 23:00:58 -04:00
Alex Kiernan
f02b8d1761 Migrate CONFIG_DRIVER_TI_CPSW to Kconfig
This converts CONFIG_DRIVER_TI_CPSW to Kconfig

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-04-08 23:00:58 -04:00
Mario Six
5bc0543df3 treewide: Convert CONFIG_HOSTNAME to a string option
CONFIG_HOSTNAME is defined as a "plain" preprocessor string, but every
use is couched by __stringify(...).

Hence, convert it to a proper string option.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-04-08 18:31:09 -04:00
Mario Six
07dea2e737 treewide: Migrate CONFIG_FSL_ESDHC to Kconfig
Migrate the CONFIG_FSL_ESDHC option to Kconfig.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-04-08 18:31:05 -04:00
Mario Six
171510522e treewide: Migrate CONFIG_TSEC_ENET to Kconfig
Migrate the CONFIG_TSEC_ENET option to Kconfig.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-04-08 15:12:53 -04:00
Mario Six
78eba69d98 treewide: Migrate CONFIG_DISPLAY_BOARDINFO_LATE to Kconfig
Migrate the CONFIG_DISPLAY_BOARDINFO_LATE option to Kconfig.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
[trini: Re-run migration]
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-04-08 15:12:09 -04:00
Mario Six
2aeb22d9ab treewide: Migrate CONFIG_LAST_STAGE_INIT to Kconfig
Migrate the CONFIG_LAST_STAGE_INIT option to Kconfig.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-04-08 14:52:54 -04:00
Mario Six
02ddc1477c treewide: Migrate CONFIG_BOARD_EARLY_INIT_R to Kconfig
Migrate the CONFIG_BOARD_EARLY_INIT_R option to Kconfig.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-04-08 14:52:54 -04:00
Mario Six
e89f8aae3d treewide: Migrate CONFIG_SYS_ALT_MEMTEST to Kconfig
Migrate the CONFIG_SYS_ALT_MEMTEST option to Kconfig.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
[trini: Re-run migration after also including CMD_MEMTEST]
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-04-08 14:52:45 -04:00
Tom Rini
c9542eae0b configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-04-07 20:37:13 -04:00
Tom Rini
df0370bc41 configs: Finish migration of CONFIG_ATMEL_SPI
With the previous temporary reverts, we need to re-complete the
migration of CONFIG_ATMEL_SPI here now.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-04-07 13:11:01 -04:00
Tom Rini
e80fa2c2c0 Revert "spi: atmel: Drop non-dm code"
As we aren't quite able to convert some platforms with a very small size
limit in SPL yet, we need to revert this for now.

This reverts commit 7b09477873.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-04-07 09:19:00 -04:00
Tom Rini
5270df2836 Revert "spi: atmel: Drop atmel_spi.h"
As we aren't quite able to convert some platforms with a very small size
limit in SPL yet, we need to revert this for now.

This reverts commit 37434db29b.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-04-07 09:18:26 -04:00
Mario Six
55b2556115 cmd: Add command for calculating binary operations
This patch adds a command that enables the calculation of bit operations
(AND, OR, XOR) on binary data from the command line. Memory locations as
well as the contents of environment variables are eligible as sources
and destination of the binary data used in the operations.

The possible applications are manifold: Setting specific bits in
registers using the regular read-OR-write pattern, masking out bits in
bit values, implementation of simple OTP encryption using the XOR
operation, etc.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-04-06 20:45:44 -04:00
Mario Six
8354aa2781 cmd: ximg: Respect cache line size for flushing
Make sure that the cache line size if respected when flushing the cache.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-04-06 20:45:44 -04:00
Mario Six
b053dd7c5a gpio: uclass: Fix debug string
A debug string still has the old name of a function being called; update
it.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-04-06 20:45:44 -04:00
Michal Simek
3b17e19918 watchdog: Fix Kconfig alignment for WDT_SANDBOX
Fix Kconfig alignment which should be <tab><space><space>.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-04-06 20:45:44 -04:00
Michal Simek
6faf4622a9 image: fit: Show information about OS type in firwmare case too
SPL ATF implementation requires FIT image with partitions where the one
is Firmware/ATF and another one Firmware/U-Boot. OS field is used for
recording that difference that's why make sense to show values there for
Firmware types.

For example:
 Image 0 (atf)
  Description:  ATF bl31.bin
  Created:      Mon Mar 26 15:58:14 2018
  Type:         Firmware
  Compression:  uncompressed
  Data Size:    51152 Bytes = 49.95 KiB = 0.05 MiB
  Architecture: ARM
  OS:           ARM Trusted Firmware
  Load Address: 0xfffe0000
  Hash algo:    md5
  Hash value:   36a4212bbb698126bf5a248f0f4b5336
 Image 1 (uboot)
  Description:  u-boot.bin
  Created:      Mon Mar 26 15:58:14 2018
  Type:         Firmware
  Compression:  uncompressed
  Data Size:    761216 Bytes = 743.38 KiB = 0.73 MiB
  Architecture: ARM
  OS:           U-Boot
  Load Address: 0x08000000
  Hash algo:    md5
  Hash value:   f22960fe429be72296dc8dc59a47d566

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jun Nie <jun.nie@linaro.org>
2018-04-06 20:45:44 -04:00
Michal Simek
1f8e4bf55e image: fit: Show firmware configuration property if present
SPL ATF support requires to have firmware property which should be also
listed by mkimage -l when images is created.

The patch is also using this macro in spl_fit to match keyword.

When image is created:
 Default Configuration: 'config'
 Configuration 0 (config)
  Description:  ATF with full u-boot
  Kernel:       unavailable
  Firmware:     atf
  FDT:          dtb

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jun Nie <jun.nie@linaro.org>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-04-06 20:45:44 -04:00
Vignesh R
c7aead1100 configs: am43xx_evm_qspiboot_defconfig: Move to DM
Move am43xx_evm_qspiboot_defconfig to DM. This is required as SPI core
and TI QSPI driver no longer supports non DM interfaces.

Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-04-06 20:45:44 -04:00
Vignesh R
7d83803b49 ARM: dts: Add new "generic" am4372 device tree file.
With U-boot runtime board detect for DTB selection a "default" dtb needs
to be created. This will be used temporarily until the "proper" dtb is
selected.

Also, add -u-boot.dtsi for AM437x SK and IDK to enable I2C for
board detection via DM_I2C.

Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-04-06 20:45:44 -04:00
Vignesh R
5375a9b566 board: ti: am43xx: Define embedded_dtb_select for runtime DTB selection in U-boot
AM437x QSPI boot is a single stage boot and hence needs runtime DTB
selection to support AM437x-SK and AM437x-IDK with DM enabled. This is
required to move am43xx_evm_qspiboot_defconfig to use DM/DT.

Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-04-06 20:45:44 -04:00
Sjoerd Simons
d48b8d1138 env: Properly check for BLK support
Use CONFIG_IS_ENABLED to see if CONFIG_BLK is enabled. Otherwise
SPL compilation breaks on boards which do have CONFIG_BLK enabled but
not DM_MMC for the SPL as follows:

env/mmc.c: In function ‘init_mmc_for_env’:
env/mmc.c:164:6: warning: implicit declaration of function ‘blk_get_from_parent’; did you mean ‘efi_get_ram_base’? [-Wimplicit-function-declaration]
  if (blk_get_from_parent(mmc->dev, &dev))
      ^~~~~~~~~~~~~~~~~~~
      efi_get_ram_base
env/mmc.c:164:29: error: ‘struct mmc’ has no member named ‘dev’
  if (blk_get_from_parent(mmc->dev, &dev))
                             ^~

Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-04-06 20:45:44 -04:00
Andrew F. Davis
4abd9cecee configs: k2hk_hs_evm: Resync defconfig with non-HS defconfig
Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Lokesh vutla <lokeshvutla@ti.com>
2018-04-06 20:45:44 -04:00
Andrew F. Davis
9b7a6fdf42 configs: k2e_hs_evm: Resync defconfig with non-HS defconfig
Signed-off-by: Andrew F. Davis <afd@ti.com>
2018-04-06 20:45:44 -04:00
Andrew F. Davis
24f521d61e configs: k2g_hs_evm: Resync defconfig with non-HS defconfig
Signed-off-by: Andrew F. Davis <afd@ti.com>
2018-04-06 20:45:44 -04:00
Chris Packham
402c8fd514 rtc: rx8025: remove redundant code in rtc_reset
As of commit 1a1fa24066 ("rtc: Set valid date after reset") the
command "date reset" will set the date/time to 2000-01-01 0:00:00 after
calling rtc_reset(). This means that the rx8025 implementation of
rtc_reset() does not need to call rtc_set().

Signed-off-by: Chris Packham <judge.packham@gmail.com>
2018-04-06 20:45:44 -04:00
Chris Packham
05d63d8bce rtc: rs5c372: remove redundant code in rtc_reset
As of commit 1a1fa24066 ("rtc: Set valid date after reset") the
command "date reset" will set the date/time to 2000-01-01 0:00:00 after
calling rtc_reset(). This means that the rs5c372 implementation of
rtc_reset() does not need to call rtc_set().

Signed-off-by: Chris Packham <judge.packham@gmail.com>
2018-04-06 20:45:44 -04:00
Chris Packham
fbd8179cba rtc: mx27rtc: remove redundant code in rtc_reset
As of commit 1a1fa24066 ("rtc: Set valid date after reset") the
command "date reset" will set the date/time to 2000-01-01 0:00:00 after
calling rtc_reset(). This means that the mx27rtc implementation of
rtc_reset() can be an empty stub function.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
2018-04-06 20:45:44 -04:00
Chris Packham
a6bf689a70 rtc: ds1374: remove redundant code in rtc_reset
As of commit 1a1fa24066 ("rtc: Set valid date after reset") the
command "date reset" will set the date/time to 2000-01-01 0:00:00 after
calling rtc_reset(). This means that the ds1374 implementation of
rtc_reset() doesn't need to call rtc_set().

Signed-off-by: Chris Packham <judge.packham@gmail.com>
2018-04-06 20:45:44 -04:00
Chris Packham
c1a2afa408 rtc: ds1307: remove redundant code in rtc_reset
As of commit 1a1fa24066 ("rtc: Set valid date after reset") the
command "date reset" will set the date/time to 2000-01-01 0:00:00 after
calling rtc_reset(). This means that the ds1307 implementation of
rtc_reset() doesn't need to call rtc_set().

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-04-06 20:45:44 -04:00
Christian Gmeiner
476c2fcd28 bootvx: use program header for loading
The section header address is a VMA whereas the address found in
the program header is a physical one. With this change it is
possible to load and start a vx7 intel generic based image.

$ readelf -l /tmp/vx7

Elf file type is EXEC (Executable file)
Entry point 0x408000
There are 2 program headers, starting at offset 52

Program Headers:
  Type           Offset   VirtAddr   PhysAddr   FileSiz MemSiz  Flg Align
  LOAD           0x001000 0x00408000 0x00408000 0x04000 0x04000 RWE 0x1000
  LOAD           0x005000 0xe040c000 0x0040c000 0x583a84 0x5ccc70 RWE 0x1000

 Section to Segment mapping:
  Segment Sections...
   00     .text.locore .data.locore
   01     .text .eh_frame .wrs_build_vars .data .tls_data .tls_vars .bss

$ readelf -S /tmp/vx7
There are 13 section headers, starting at offset 0x588af8:

Section Headers:
  [Nr] Name              Type            Addr     Off    Size   ES Flg Lk Inf Al
  [ 0]                   NULL            00000000 000000 000000 00      0   0  0
  [ 1] .text.locore      PROGBITS        00408000 001000 00011e 00  AX  0   0 16
  [ 2] .data.locore      PROGBITS        00409000 002000 003000 00  WA  0   0 4096
  [ 3] .text             PROGBITS        e040c000 005000 4802a0 00 WAX  0   0 32
  [ 4] .eh_frame         PROGBITS        e088c2a0 4852a0 0a1ed0 00   A  0   0  4
  [ 5] .wrs_build_vars   PROGBITS        e092e170 527170 000190 00  Ax  0   0  1
  [ 6] .data             PROGBITS        e092f000 528000 060a70 00  WA  0   0 4096
  [ 7] .tls_data         PROGBITS        e098fa70 588a70 000004 00   A  0   0  4
  [ 8] .tls_vars         PROGBITS        e098fa78 588a78 00000c 00  WA  0   0  4
  [ 9] .bss              NOBITS          e098faa0 588a84 0491d0 00  WA  0   0 32
  [10] .shstrtab         STRTAB          00000000 588a84 000074 00      0   0  1
  [11] .symtab           SYMTAB          00000000 588d00 056ee0 10     12 9758  4
  [12] .strtab           STRTAB          00000000 5dfbe0 05f48a 00      0   0  1
Key to Flags:
  W (write), A (alloc), X (execute), M (merge), S (strings)
  I (info), L (link order), G (group), T (TLS), E (exclude), x (unknown)
  O (extra OS processing required) o (OS specific), p (processor specific)

For completeness here are the same information for an old vx5 based image. After
this change it is possible to boot vx5 and vx7 (intel generic) images.

$ readelf -l /tmp/vx5

Elf file type is EXEC (Executable file)
Entry point 0x308000
There are 1 program headers, starting at offset 52

Program Headers:
 Type           Offset   VirtAddr   PhysAddr   FileSiz MemSiz  Flg Align
 LOAD           0x000060 0x00308000 0x00308000 0x3513a0 0x757860 RWE 0x20

Section to Segment mapping:
 Segment Sections...
  00     .text .data .bss
[christian@chgm-pc ~]$ readelf -S /tmp/vx5
There are 12 section headers, starting at offset 0x356580:

Section Headers:
 [Nr] Name              Type            Addr     Off    Size   ES Flg Lk Inf Al
 [ 0]                   NULL            00000000 000000 000000 00      0   0  0
 [ 1] .text             PROGBITS        00308000 000060 319b10 00 WAX  0   0 32
 [ 2] .data             PROGBITS        00621b20 319b80 037880 00  WA  0   0 32
 [ 3] .bss              NOBITS          006593a0 351400 4064c0 00  WA  0   0 16
 [ 4] .debug_aranges    PROGBITS        00000000 351400 000060 00      0   0  1
 [ 5] .debug_pubnames   PROGBITS        00000000 351460 00018b 00      0   0  1
 [ 6] .debug_info       PROGBITS        00000000 3515eb 003429 00      0   0  1
 [ 7] .debug_abbrev     PROGBITS        00000000 354a14 000454 00      0   0  1
 [ 8] .debug_line       PROGBITS        00000000 354e68 0016a4 00      0   0  1
 [ 9] .shstrtab         STRTAB          00000000 35650c 000071 00      0   0  1
 [10] .symtab           SYMTAB          00000000 356760 0440e0 10     11 8574  4
 [11] .strtab           STRTAB          00000000 39a840 03e66c 00      0   0  1
Key to Flags:
 W (write), A (alloc), X (execute), M (merge), S (strings)
 I (info), L (link order), G (group), T (TLS), E (exclude), x (unknown)
 O (extra OS processing required) o (OS specific), p (processor specific)

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2018-04-06 20:45:44 -04:00
Patrick Delaunay
86634a93b4 stm32mp: handle SYSRESET
Add support of sysreset with generic driver "syscon-reboot"
provided by RCC, for U-boot and for SPL.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-04-06 20:45:44 -04:00
Patrick Delaunay
e16750ff0e stm32mp: add syscon for STGEN
Add STGEN as SYSCON device: allow access to device address
defined in device tree

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-04-06 20:45:28 -04:00
Patrick Delaunay
b90f0e7c37 stm32mp1: change STGEN clock source to HSE
No more use static frequency HSI = 64MHz for STGEN clock
but HSE (with higher accurency) by default.

Need to remove CONFIG_SYS_HZ_CLOCK as arch timer frequency
is provided at boot by BootRom and cp15 cntfrq and modified
during clock tree initialization if needed.

When HSI is no more used by any device, this internal
oscillator can be switched off to reduce consumption.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-04-06 20:45:28 -04:00
Patrick Delaunay
938e0e3f6e clock: stm32mp1: add stgen clock source change support
The STGEN is the clock source for the Cortex A7 arch timer.
So after modification of its frequency, CP15 cntfreq is updated
and a new timer init is performed.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-04-06 20:45:28 -04:00
Patrick Delaunay
46fc679ede arm: timer: get frequency for arch timer armv7 in cp15 cntfrq
Manage dynamic value for armv7 arch clock timer,
when CONFIG_SYS_HZ_CLOCK is not defined.
Get frequency from CP15 cntfrq information, initialized for example
by first boot stage, clock driver or by BootRom.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-04-06 20:45:28 -04:00
Rasmus Villemoes
f3d8f7dd73 Allow providing default environment from file
Modifying the default environment via CONFIG_EXTRA_ENV_SETTINGS is
somewhat inflexible, partly because the cpp language does not allow
appending to an existing macro. This prevents reuse of "environment
fragments" for different boards, which in turn makes maintaining that
environment consistently tedious and error-prone.

This implements a Kconfig option for allowing one to define the entire
default environment in an external file, which can then, for example, be
generated programmatically as part of a Yocto recipe, or simply be kept
in version control separately from the U-boot repository.

Tested-by: Sean Nyekjaer <sean.nyekjaer@prevas.dk>
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
2018-04-06 20:45:28 -04:00
Patrick Delaunay
11dfd1a331 stm32mp1: select boot device and partition
Bootrom loads SPL from SDCARD or eMMC
according BootPin selection.

Then SPL loads U-Boot on the same mmc device
with the following predefined GPT partitioning:

on SDCARD: gpt partitioning
  1: SPL
  2: SPL#2
  3: U-Boot
  4: bootable partition

on eMMC:
  The 2 boot partitions are used for SPL (2 copy)
    boot1: SPL
    boot2: SPL#2
  The user partition use gpt partitioning
    1: U-Boot
    2: bootable partition

This patch select the correct SPL partition
(3 for SDCARD on mmc0 and 1 for eMMC on mmc1)
according the BootRom information saved in TAMP register
and based on configuration flasg:
- CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION
  => for BOOT_DEVICE_MMC1 or mmc 0 in U-Boot
- CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION_MMC2 (new)
  => for BOOT_DEVICE_MMC2 or mmc 1 in U-Boot

And the correct boot_targets is selected according the environment
variables boot_device and boot_instance, with preboot command,
to search the bootable partition with kernel on this device
(generic distro support).

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-04-06 20:45:28 -04:00
Patrick Delaunay
08772f6e79 stm32mp1: get boot mode from BootRom
SPL copy BootRom boot mode information
in TAMP register 21.

This TAMP register information is used
after relocation to set 2 env variables
- boot_device
- boot_instance

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-04-06 20:45:28 -04:00
Patrick Delaunay
0ed232b153 stm32mp1: add eMMC support for ED1
Add command GPT support
Add EMMC boot support
Add the 2 other SDMMC instances for ED1:
- SDMMC2 = mmc 1, eMMC on the ED1 board
- SDMMC3 = extension connector, deactivated by default

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-04-06 20:45:28 -04:00
Patrick Delaunay
35a66960cd spl: spl_mmc: provide one weak function spl_boot_partition
The spl_boot_partition function has been added in order to have
the possibility to boot on a same binary from different mmc devices
with different partitions.

By default keep the current behavior, SPL use the partition defined
by CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Christophe KERELLO <christophe.kerello@st.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
2018-04-06 20:45:28 -04:00
Klaus Goger
52280315a4 rtc: rewrite isl1208 to support DM
Adds devicemodel support to the ISL1208 driver.
This patch drops the non-dm API as no board was using it anyway.
Also add it to Kconfig.

Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-04-06 20:45:28 -04:00
Patrick Delaunay
96583cdc2d stm32mp: add check of cpu identifier
Add support of DBGMCU_IDC for cpu identifier
and revision

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-04-06 20:45:28 -04:00
Patrick Delaunay
cda3dcb670 stm32mp: cleanup cpu.c
Move all defines at the beginning of the file

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-04-06 20:45:28 -04:00
Hauke Mehrtens
c5b0bca4c3 tools/mxsimage: Support building with LibreSSL
The mxsimage utility fails to compile against LibreSSL version < 2.7.0
because LibreSSL says it is OpenSSL 2.0, but it does not support the
complete OpenSSL 1.1 interface.

LibreSSL defines OPENSSL_VERSION_NUMBER with 0x20000000L and therefor
claims to have an API compatible with OpenSSL 2.0, but it implements
EVP_MD_CTX_new(), EVP_MD_CTX_free() and EVP_CIPHER_CTX_reset() only
starting with version 2.7.0, which is not yet released. OpenSSL
implements this function since version 1.1.0.

This commit will activate the compatibility code meant for
OpenSSL < 1.1.0 also for LibreSSL version < 2.7.0.

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Reviewed-by: Jonathan Gray <jsg@jsg.id.au>
2018-04-06 20:45:28 -04:00
Heinrich Schuchardt
c57b6b7090 regulator: pbias: don't evaluate variable before assignment
We should not evaluate the value of reg before its value is set.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-04-06 20:45:28 -04:00
Adam Ford
62896dcbf3 omap3_logic: Fix FDT ADDR for ramdisk booting
The boot scripts for booting from ramdisk are using
${fdtimage} when they really should be using ${fdtaddr}

This patch will fix it so the RAMdisk bootscripts operate
correctly.

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-04-06 17:04:33 -04:00
Simon Glass
b79b9f198b input: Drop PS/2 keyboard support
This is not used by any current board and has not been converted to driver
model. Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-04-06 17:04:33 -04:00
Marek Behún
22fc7b6cd6 fs: btrfs: Remove unused debug code left from development
Signed-off-by: Marek Behun <marek.behun@nic.cz>
2018-04-06 17:04:33 -04:00
Russ Dill
025a0d40e1 ARM: am33xx: Inhibit re-initialization of DDR during RTC-only
This inhibits the re-inititialization of DDR during an RTC-only resume. If
this is not done, an L3 NOC error is produced as the DDR gets accessed
before the re-init has time to complete. Tested on AM437x GP EVM.

Signed-off-by: Russ Dill <Russ.Dill@ti.com>
[j-keerthy@ti.com Ported to Latest Master branch]
Signed-off-by: Keerthy <j-keerthy@ti.com>
2018-04-06 17:04:33 -04:00
Dave Gerlach
e18945ad22 am43xx: Do not allow EMIF to control DDR_RESET in rtconly config
Prevent EMIF control of DDR_RESET line on DDR3 am43xx platforms for
am43xx_evm_rtconly_config. Without this DDR is unstable and can become
corrupted after multiple iterations of RTC+DDR mode.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
[j-keerthy@ti.com Ported to latest master branch]
Signed-off-by: Keerthy <j-keerthy@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-04-06 17:04:33 -04:00
Tero Kristo
7619badb9c ARM: AM43xx: Add support for RTC only + DDR in self-refresh mode
Kernel stores information to the RTC_SCRATCH0 and RTC_SCRATCH1 registers
for wakeup from RTC-only mode with DDR in self-refresh. Parse these
registers during SPL boot and jump to the kernel resume vector if the
device is waking up from RTC-only modewith DDR in Self-refresh.

The RTC scratch register layout used is:

SCRATCH0 : bits00-31 : kernel resume address
SCRATCH1 : bits00-15 : RTC magic value used to detect valid config
SCRATCH1 : bits16-31 : board type information populated by bootloader

During the normal boot path the SCRATCH1 : bits16-31 are updated with
the eeprom read board type data. In the rtc_only boot path the rtc
scratchpad register is read and the board type is determined and
correspondingly ddr dpll parameters are set. This is done so as to avoid
costly i2c read to eeprom.

RTC-only +DRR in self-refresh mode support is currently only enabled for
am43xx_evm_rtconly_config.
This is not to be used with epos evm builds.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
[j-keerthy@ti.com Rebased to latest u-boot master branch]
Signed-off-by: Keerthy <j-keerthy@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-04-06 17:04:33 -04:00
Christophe Leroy
3f151eb6cf drivers: serial: remove nonexisting initialisation functions
This patch removes call of serial initialisation functions that
are not implemented anymore.

Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
2018-04-06 17:04:33 -04:00
Jason Kridner
72566261d8 am335x: am335x_evm_usbspl_defconfig: NETCONSOLE
Enable NETCONSOLE by default. Still requires changes to the boot
environment to enable on the platform.

Signed-of-by: Jason Kridner <jdk@ti.com>
Cc: Tom Rini <trini@konsulko.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-04-06 17:04:33 -04:00
Jason Kridner
99761e536c Handle NETCONSOLE and SPL enabled
NETCONSOLE isn't compiled in with SPL, so the include file needs to recognize that.

Signed-off-by: Jason Kridner <jdk@ti.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-04-06 17:04:33 -04:00
Jason Kridner
eff0c977b3 Add support for BeagleBoard.org PocketBeagle
Texas Instruments AM3358 based low-cost board using Octavo Systems OSD3358 SIP
with built-in TPS65217 PMIC and 512MB DDR3. Board features small 35mm x
55mm size, high-speed USB OTG, microSD and 72 0.1" expansion header
pins with 2xSPI, 2xI2C, 2xUART, USB, 8xADC, up-to-44 GPIO, PRU pins and much more.

https://beagleboard.org/pocket

This was tested using the am335x_evm_usbspl_defconfig.

Note that MII pins are enabled despite not having Ethernet on this
board. This avoids an issue where otherwise many timeout errors would be
generated. See https://e2e.ti.com/support/arm/sitara_arm/f/791/t/298976
for some related discussion.

Signed-off-by: Jason Kridner <jdk@ti.com>
Cc: Tom Rini <trini@konsulko.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-04-06 17:04:33 -04:00
Alex Kiernan
3bf5f13c0c Migrate CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC
This converts CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC to Kconfig

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
2018-04-06 17:04:33 -04:00
Christophe Leroy
c0bc2a7e06 powerpc: mpc8xx: move watchdog into drivers/watchdog
In preparation of DM watchdog, move basic actions into drivers/watchdog

Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
2018-04-06 16:31:11 -04:00
Christophe Leroy
5c5da4318b powerpc: mpc8xx: cleaning up watchdog
In preparation of migration to DM watchdog, clean up a bit.

The 8xx watchdog really is a HW watchdog, so declare it as is
then it goes through Kconfig

And the watchdog reset doesn't mind getting interrupted, so
no need to disable interrupts

Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
2018-04-06 16:30:37 -04:00
Christophe Leroy
ab0d819258 powerpc: mpc8xx: refactorise reginfo
reginfo is redundant with some of the commands in immap.c, so
move reginfo into that file and remove duplicated info.

Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
2018-04-06 16:30:37 -04:00
Christophe Leroy
0fb6220565 board: MCR3000: Use smaller flash sector for environment
Latest versions of u-boot have increased in size and require more
than the 256kb allocated to it.

The MCR3000 board is equipped with an AM29LV160DB boot flash which
is organised as follows:
- One 16kb block
- Two 8kb block
- One 32kb block
- Thirty one 64kb blocks

At the time being, u-boot is a single piece occupying the 256 first
kbytes, then the environment is stored in the following 64kb block

The environment being quite tiny, we save one 64kb block by embedding
the environment in the first 8kb block, hence allowing to increase
the monitor size to 320kb.

Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
2018-04-06 16:30:37 -04:00
Christophe Leroy
23ac79ff80 common: env_embedded: allow fine placement of environment object
Commit 7653942b10 ("common/env_embedded.c: drop support for
CONFIG_SYS_USE_PPCENV") dropped the .ppcenv section which was
used in linking scripts to allow fine placement of embedded
environment sections.

This implies that GCC randomly places objects from env/embedded.o
and environment is not guaranteed to be located at the correct address:

04003df8 g     F .text  00000038 mii_init
04004000 g     O .text  00000004 env_size
04004004 g     O .text  00002000 environment
04006004 g     F .text  00000040 .hidden __lshrdi3

This patch restores this capability by allocating each object marked
with __UBOOT_ENV_SECTION__ into a different section. Hence
'environment' will be alone in .text.environment, allowing a
fine placement in u-boot.lds with:

		. = DEFINED(env_offset) ? env_offset : .;
		env/embedded.o			(.text.environment)

Fixes: 7653942b10 ("common/env_embedded.c: drop support for CONFIG_SYS_USE_PPCENV")
Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
2018-04-06 16:30:37 -04:00
Christophe Leroy
b3ede33170 board: MCR3000: cleanup config
Some config is redundant with Kconfig. Fix it.
Also remove unused configs
Move SDRAM_MAX_SIZE in the only place it is used

include/environment.h already defines CONFIG_ENV_SIZE
from CONFIG_ENV_SECT_SIZE and defines CONFIG_ENV_ADDR as
(CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET)

remove BOOTARGS as bootargs is set by the different boot commands

Fix CONFIG_SYS_INIT_RAM_ADDR and CONFIG_SYS_INIT_RAM_SIZE to be in
line with CPM DPRAM organisation

Remove CONFIG_SYS_GBL_DATA_SIZE, CONFIG_SYS_GBL_DATA_OFFSET and
CONFIG_SYS_INIT_SP_OFFSET which are unused

Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
2018-04-06 16:30:37 -04:00
Christophe Leroy
3949d2a716 board: MCR3000: replace mtd->priv by mtd_to_nand()
Since commit 17cb4b8f32 ("mtd: nand: Add+use mtd_to/from_nand and
nand_get/set_controller_data"), mtd_to_nand() has to be used instead
of mtd->priv

Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
2018-04-06 16:30:37 -04:00
Christophe Leroy
872807b1e5 powerpc: mpc8xx: initialisation of initial RAM
u-boot requires some RAM at startup, to store global data structure.
RAM is also needed when we migrate to DM for some initial malloc

This patch implements the proper init of that RAM by calling
board_init_f_alloc_reserve() and board_init_f_init_reserve()

Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
2018-04-06 16:30:37 -04:00
Christophe Leroy
b1d62424cb powerpc: mpc8xx: redistribute data in CPM dpram
Some malloc memory is needed at startup for DM model.
Lets reorganise the use of the CPM dpram.

The MPC866/885 dpram, we have 8kbytes dual port RAM, which is usable as:
IMMR + 0x2000..0x2800: BD/Data/Microcode
IMMR + 0x2800..0x2e00: BD/Data
IMMR + 0x2e00..0x3800: BD/Data/Microcode
IMMR + 0x3800..0x3a00: BD/Data
IMMR + 0x3a00..0x3c00: BD/Data/Microcode
IMMR + 0x3c00..0x4000: Parameters for the Peripheral Controllers

Lets reallocate all BDs in the 3800..3a00 area and give the full
2800..2e00 for dynamic RAM allocation including global data

That way, the microcode areas remain available if needed one day.

Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
2018-04-06 16:30:37 -04:00
Christophe Leroy
18f8d4c60d powercp: mpc8xx: move commproc.h
include/commproc.h is dedicated to the 8xx, rename it cpm_8xx.h and
move it into arch/powerpc/include/asm

Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
2018-04-06 16:30:37 -04:00
Christophe Leroy
ee1e600c13 powerpc: mpc8xx: Change CONFIG_8xx to CONFIG_MPC8xx
CONFIG_8xx doesn't mean much outside of arch/powerpc/
This patch renames it CONFIG_MPC8xx just like CONFIG_MPC85xx etc ...
It also renames 8xx_immap.h to immap_8xx.h to be consistent with
other file names.

Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
2018-04-06 16:30:37 -04:00
Christophe Leroy
0ebb5388b4 powerpc: mpc8xx: remove get_immr() argument
get_immr() is always called with 0 as an argument, so it is useless.

Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
2018-04-06 16:30:37 -04:00
Christophe Leroy
14119901fd powerpc: mpc8xx: make get_immr() independent of CONFIG_8xx
SPRN_IMMR is defined regardless of the CPU. Therefore, there
is no point in enclosing get_immr() inside a #ifdef CONFIG_8xx

As it a static inline function, it will in any case only be
compiled in functons using it.

Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
2018-04-06 16:30:37 -04:00
Christophe Leroy
fdef3895a0 powerpc: mpc8xx: get rid of the multiple PVR_ values
Avoid hardcoding the PVR values in C since they are defined
in processor.h

At the same time, remove those multiple PVR values for 8xx and
keep only one that we call PVR_8xx

Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
2018-04-06 16:30:37 -04:00
Christophe Leroy
374a0e306e powerpc: mpc8xx: harmonise initialisation of the immap local pointer
In most places, immap local pointer is defined as
	immap_t __iomem *immap = (immap_t __iomem *)CONFIG_SYS_IMMR;
In a few places, it is defined as
	immap_t __iomem *immap = (immap_t __iomem *)(immr & 0xFFFF0000);

This patch replaces the few of the latest form by the other one.

The two are fully equivalent since SPRN_IMMR is set with CONFIG_SYS_IMMR
very early in start.S

Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
2018-04-06 16:30:37 -04:00
Christophe Leroy
f110892f3d soft_i2c: cleanup - no mpc8xx support
commit 907208c452 ("powerpc: Partialy restore core of mpc8xx")
didn't bring back support for I2C on the mpc8xx

Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
2018-04-06 16:30:37 -04:00
Jagan Teki
89d4fc153b spi: atmel: default y if DM_SPI && ARCH_AT91
ATMEL_SPI is now fully converted to driver-model and
respective boards switch to DM_SPI as well,
so make default y for ARCH_AT91

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Wenyou Yang <wenyouya@gmail.com>
2018-04-06 16:11:09 -04:00
Jagan Teki
37434db29b spi: atmel: Drop atmel_spi.h
atmel_spi.h has register offsets, and atmel_spi_slave
structure, move it into .c file for better readability
and drop atmel_spi.h

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Wenyou Yang <wenyouya@gmail.com>
2018-04-06 16:11:09 -04:00
Jagan Teki
7b09477873 spi: atmel: Drop non-dm code
All board configs are now enabled DM_SPI for SPL and
U-Boot proper, so now its time to drop non-dm code.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Wenyou Yang <wenyouya@gmail.com>
2018-04-06 16:11:09 -04:00
Jagan Teki
5a6eab8ab0 at91: ma5d4evk: Enable SPL_DM and SPL_OF_CONTROL
Enable SPL Driver model and FDT support for AT91 ma5d4evk boards.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-04-06 16:11:09 -04:00
Jagan Teki
4dc04ebfa3 at91: ma5d4evk: Enable DM_SPI
AT91 ma5d4evk board uses atmel spi driver, enable DM_SPI to
use dm functionality.

Kept few functions related to non-dm and gpio on board
files for reference and will be remove once code moved
to relevant drivers.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-04-06 16:11:09 -04:00
Jagan Teki
ca57bd6718 at91: ma5d4evk: Add FDT support
Sync DTS from Linux and add FDT support for AT91 ma5d4evk board.

usb0, usb1, usb2 and hlcdc_pwm nodes removed, since there is no support it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-04-06 16:11:09 -04:00
Jagan Teki
4d42f16b9f at91: ma5d4evk: Enable DM
Enable Driver model for AT91 ma5d4evk boards.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-04-06 16:11:09 -04:00
Jagan Teki
c60bfe9b0c at91: vinco: Enable DM_SPI
AT91 Vinco board uses atmel spi driver, enable DM_SPI to
use dm functionality.

Cc: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-04-06 16:11:09 -04:00
Jagan Teki
1e85626788 at91: vinco: Add FDT support
Sync DTS from Linux and add FDT support for AT91 vinco board.

usb0, usb1, and usb2 nodes removed, since there is no support it.

Cc: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-04-06 16:11:09 -04:00
Jagan Teki
1a2131ce05 at91: vinco: Enable DM
Enable Driver model for AT91 Vinco boards.

Cc: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-04-06 16:11:09 -04:00
Jagan Teki
8b562ef388 at91: taurus: Enable DM_SPI
Enable DM_SPI for atmel SPI driver on taurus board.

Kept few functions related to non-dm and gpio on board
files for reference and will be remove once code moved
to relevant drivers.

Cc: Heiko Schocher <hs@denx.de>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-04-06 16:11:09 -04:00
Jagan Teki
153b070fc0 configs: gurnard: Move CONFIG_ATMEL_SPI to defconfigs
Now CONFIG_ATMEL_SPI is defined in Kconfig, so move the
same into defconfig file.

Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Wenyou Yang <wenyouya@gmail.com>
2018-04-06 16:11:09 -04:00
Jagan Teki
08afabc157 at91: gurnard: Enable DM_SPI
Enable DM_SPI for atmel SPI driver on gurnard board.

Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-04-06 16:11:09 -04:00
Jagan Teki
9bf48e2ee8 spi: atmel: Add ifdef for DM_GPIO code
Few boards are configuring gpio directly from board instead
using drivers/gpio so add ifdef for DM_GPIO to compatible
for both the cases.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Wenyou Yang <wenyouya@gmail.com>
2018-04-06 16:11:09 -04:00
Tom Rini
6074c3879c Merge tag 'signed-rpi-next' of git://github.com/agraf/u-boot
Patch queue for rpi - 2018-04-06

Highlights this time around:

  - Support for new RPi3 B+ model
  - Fix for some SD cards on newer RPi firmware
2018-04-06 08:30:10 -04:00
Jonathan Gray
91e1bc53c4 rpi: Complete table of models with new revision code scheme
In the model table for the new revision code encoding documented in
https://www.raspberrypi.org/documentation/hardware/raspberrypi/revision-codes/README.md
add the entries for old models with the new scheme and add CM3 which
only appears in the new scheme.

A device tree for CM3 is not currently upstreamed in linux.  When that
happens the name will likely have to be adjusted in the table.

Signed-off-by: Jonathan Gray <jsg@jsg.id.au>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-04-06 11:04:29 +02:00
Alexander Graf
806d2fa8e3 efi_loader: Respect DT reserved regions
With legacy boot (booti, bootz), people can declare memory regions as
reserved using device tree memory reservations. This feature is some
times used to indicate memory regions that should not be touched.

Since in a UEFI world, the DT memory reservations do not get honored,
let's copy them into the UEFI memory map so everyone has a coherent
view of the world and we give people the chance to add reservations
on demand.

Signed-off-by: Alexander Graf <agraf@suse.de>
2018-04-06 09:40:53 +02:00
Ivan Gorinov
61a5ced6ad efi_loader: Check machine type in the image header
Check FileHeader.Machine to make sure the EFI executable image is built
for the same architecture. For example, 32-bit U-Boot on x86 will print
an error message instead of loading an x86_64 image and crashing.

Signed-off-by: Ivan Gorinov <ivan.gorinov@intel.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-04-06 09:28:01 +02:00
Heinrich Schuchardt
0c5d2a3dac efi_loader: completely initialize network
Add missing network initialization code.

Before the patch the network was only usable if a network command like
dhcp or tftp had beed executed.

This was visible when interrupting the console countdown and executing
bootefi selftest for vexpress_ca15_tc2_defconfig.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-04-05 18:09:31 +02:00
Heinrich Schuchardt
99b8db7291 arm: print information about loaded UEFI images
If an exception occurs in a UEFI loaded image we need the start address of
the image to determine the relocation offset.

This patch adds the necessary lines after the registers in the crash dump.
A possible output would be:

UEFI image [0xbffe6000:0xbffe631f] pc=0x138 '/\snp.efi'

With the offset 0x138 we can now find the relevant instruction in the
disassembled 'snp.efi' binary.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-04-05 15:24:01 +02:00
Heinrich Schuchardt
c9a63f44b5 efi_loader: new functions to print loaded image information
Introduce functions to print information about loaded images.

If we want to analyze an exception in an EFI image we need the offset
between the PC and the start of the loaded image.

With efi_print_image_info() we can print the necessary information for a
single image, e.g.

UEFI image [0xbffe6000:0xbffe631f] pc=0x138 '/\snp.efi'

efi_print_image_infos() provides output for all loaded images.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-04-05 15:23:55 +02:00
Jonathan Gray
8ae1f82988 mmc: use core clock frequency in bcm2835 sdhost
In raspberrypi-firmware 7fdcd00e00a42a1c91e8bd6f5eb8352fe9358557 and
later start.elf now sets the EMMC clock to 200 MHz.

According to Phil Elwell in
https://github.com/raspberrypi/firmware/issues/953
the SDHost controller shares the core/VPU clock and doesn't use
the EMMC clock.

Use the core clock id when determining the frequency to allow
U-Boot to work with recent versions of raspberrypi-firmware.
Otherwise U-Boot hangs at:

U-Boot 2018.03 (Mar 14 2018 - 20:36:00 +1100)

DRAM:  948 MiB
RPI 3 Model B (0xa02082)
MMC:   mmc@7e202000: 0, sdhci@7e300000: 1
Loading Environment from FAT...

Signed-off-by: Jonathan Gray <jsg@jsg.id.au>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-04-05 13:17:43 +02:00
Peter Robinson
79153ff0c4 rpi3_32b: Enable lan78xx driver
The new Raspberry Pi B 3+ has a lan78xx device attached to it. Let's add
driver support in U-Boot for it.

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-04-05 11:41:18 +02:00
Alexander Graf
7fe77226aa rpi: Add identifier for the new RPi3 B+
The Raspberr Pi Foundation released a new RPi3 version which we want
to detect as well, so we can enable ethernet on it and know the correct
device tree file name.

Add an identifier for it.

Signed-off-by: Alexander Graf <agraf@suse.de>
2018-04-05 11:38:43 +02:00
Alexander Graf
0d1a6c5e52 rpi3: Enable lan78xx driver
The new Raspberry Pi B 3+ has a lan78xx device attached to it. Let's add
driver support in U-Boot for it.

Signed-off-by: Alexander Graf <agraf@suse.de>
2018-04-05 11:38:25 +02:00
Alexander Graf
065dcacf39 rpi: Allow to boot without serial
When we enable CONFIG_OF_BOARD on Raspberry Pis, we may end up without
serial console support in early boot. Hence we need to make the serial
port optional, otherwise we will never get to the point where serial
would be probed.

Signed-off-by: Alexander Graf <agraf@suse.de>
2018-04-05 11:36:24 +02:00
Heinrich Schuchardt
1348c17ab2 efi_selftest: test getinfo(EFI_FILE_SYSTEM_INFO)
Check that the getinfo() service of the file protocol correctly
returns the partion label.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-04-05 10:02:01 +02:00
Heinrich Schuchardt
db851c84c9 efi_selftest: partition label for test image
efi_selftest_disk_image.h contains a disk image. We use it to test the
EFI_FILE_PROTOCOL. The patch sets the partition label to 'U-BOOT TEST'.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-04-05 10:01:54 +02:00
Heinrich Schuchardt
9e6835e6ba efi_loader: implement EFI_FILE_SYSTEM_INFO
Implement the information type EFI_FILE_SYSTEM_INFO in the service
GetInfo() of the EFI_FILE_PROTOCOL.

The volume label is not available in U-Boot. As a work-around use the
partition name instead.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-04-05 10:01:45 +02:00
Heinrich Schuchardt
c412166de2 efi_loader: ascii2unicode(): add trailing \0
When converting an ASCII string to UTF-16 don't forget to copy the
trailing \0.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-04-05 10:01:38 +02:00
Heinrich Schuchardt
9c9021e245 efi_loader: use const for GUIDs in the EFI_FILE_PROTOCOL
Use const efi_guid_t* when passing GUIDs.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-04-05 10:01:32 +02:00
Tom Rini
e294ba0678 Merge git://git.denx.de/u-boot-sunxi
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-04-04 14:10:39 -04:00
Heinrich Schuchardt
2db1eba1c3 efi_loader: correctly determine the boot partition
The device path of the loaded image should be set to the partition
from which the image was loaded. This requires using the same logic as
the load command.

Without the patch the device path pointed to the whole disk after executing

	load mmc 0: 0x43000000 FILE

and not to the boot partition from which the file was actually loaded.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-04-04 13:14:33 +02:00
Heinrich Schuchardt
b6dd577737 efi_loader: use correct types in EFI_FILE_PROTOCOL
In the EFI_FILE_PROTOCOL buffer sizes and positions are passed as UINTN and
not as u64.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-04-04 11:39:27 +02:00
Heinrich Schuchardt
43dace5d89 efi_loader: correct types for EFI_LOADED_IMAGE_PROTOCOL
We should not use void * but specific types for
* device_handle
* file_path

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-04-04 11:37:47 +02:00
Heinrich Schuchardt
82786754b9 efi_loader: ImageSize must be multiple of SectionAlignment
According to the Portable Executable and Common Object File Format
Specification the image size must be a multiple of the alignment
of sections.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-04-04 11:37:40 +02:00
Heinrich Schuchardt
84b40b40ad efi_loader: save image relocation address and size
For analyzing crash output the relocation address and size are needed.
Save them in the loaded image info.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-04-04 11:37:34 +02:00
Heinrich Schuchardt
7fb96a10b3 efi_loader: use efi_uintn_t for LoadImage
We generally use efi_uintn_t where the UEFI spec uses UINTN.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-04-04 11:36:08 +02:00
Patrick Wildt
eab2dc37ee efi_loader: initialize device path on alloc
Since the backing memory for a new device path can contain stale
data we have to make sure that we zero the buffer.  Otherwise some
code paths that don't set all fields in a structure backed by this
device path might contain unwanted stale data.

Signed-off-by: Patrick Wildt <patrick@blueri.se>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-04-04 11:22:35 +02:00
Patrick Wildt
e274235866 efi_loader: complete efi_pxe_mode struct definition
The efi_pxe_mode struct which represents the PXE_BASE_CODE_PROTOCOL
Replace the placeholder paddings in the efi_pxe_mode struct with the
actual fields as defined in UEFI's PXE Base Code Protocol.  Since
our efi_ip_address is a simple char array set a specific alignment
to the efi_ip_address fields, as expected by the UEFI spec.

Signed-off-by: Patrick Wildt <patrick@blueri.se>
[agraf: s/pxe_discovervalid/pxe_discover_valid]
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-04-04 11:21:29 +02:00
Alexander Graf
f9cfad1a61 efi_loader: Fix network DP with DM_ETH
When CONFIG_DM_ETH is set, we assemble the device path properly with a
full device hierarchy. Our helper function dp_fill() even put the MAC
node itself in it for us.

However, for non-DM compatibility we also have code in that added the
MAC node manually. That code now runs on top of the existing MAC node:

  Handle 0x3db2f6b0
    /HardwareVendor(e61d73b9-a384-4acc-aeab-82e828f3628b)[0: ]
    /USBClass(0,0,9,0,0)/USBClass(424,9514,9,0,2)/MacAddr(b8:27:eb:e1:81:47,1)
    /MacAddr(b8:27:eb:e1:81:47,57)/EndEntire

We obviously don't need the additional node and in fact, grub chokes on
it and fails to match the DP against the ethernet device node. So this
patch moves the additional MAC node into the non-DM code path:

  Handle 0x3db3fde0
    /HardwareVendor(e61d73b9-a384-4acc-aeab-82e828f3628b)[0: ]
    /USBClass(0,0,9,0,0)/USBClass(424,9514,9,0,2)/MacAddr(b8:27:eb:e1:81:47,1)
    /EndEntire

While at it, we also mark the non-DM MAC node as ethernet.

Fixes: b66c60dde9 ("efi_loader: add device-path utils")
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-04-04 11:09:18 +02:00
Alexander Graf
813468cdbd efi_loader: Fix return value for efi_add_runtime_mmio
The efi_add_runtime_mmio function incorrectly returned the added
address as return value rather than EFI_SUCCESS. Fix it by checking
the return value of efi_add_memory_map properly.

Fixes: f057cfef5dc ("efi_loader: exit status for efi_reset_system_init")
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-04-04 11:09:06 +02:00
Alexander Graf
8e47506409 efi_loader: Optimize GOP more
The GOP path was optimized, but still not as fast as it should be. Let's
push it even further by trimming the hot path into simple 32bit load/store
operations for buf->vid 32bpp operations.

Signed-off-by: Alexander Graf <agraf@suse.de>
2018-04-04 11:08:59 +02:00
Alexander Graf
ba718e67a2 efi_loader: Optimize GOP switch
We usually try to compile for size, not for speed. Unfortunately with the
more powerful GOP infrastructure to handle all sorts of GOP operations, we
end up slowing down our copying hot path quite a lot.

So this patch moves the 4 possible GOP operation modes into separate
functions which call a common function again. The end result of that is
more optimized code that can properly do constant propagation throughout
its switch() statements and thus removes compares in the hot path.

Signed-off-by: Alexander Graf <agraf@suse.de>
2018-04-04 11:08:47 +02:00
Heinrich Schuchardt
90b658b4cc efi_loader: use __always_inline for pixel conversion
We optimize for size using -Os so gcc might ignore 'inline'.
Pixel conversions are called so often that we always want to inline them.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-04-04 11:05:28 +02:00
Heinrich Schuchardt
0f7fcc7256 efi_loader: RestoreTPL should execute queued events
When the TPL is lowered queued events may become eligible for execution.

iPXE uses the following pattern to request event execution:

	bs->RestoreTPL ( TPL_APPLICATION );
	bs->RaiseTPL ( TPL_CALLBACK );

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-04-04 11:04:00 +02:00
Heinrich Schuchardt
ee3db4fc04 efi_loader: use TPL_NOTIFY for network timer event
We use a timer to poll the network.

iPXE is used for booting from iSCSI drives. It has been changed to run at
TPL_CALLBACK most of the time (which is not what the UEFI spec
recommends).

By changing our timer to TPL_NOTIFY we can ensure that it is nevertheless
executed.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-04-04 11:03:37 +02:00
Alexander Graf
0176330ee5 git: mailrc: Add myself and efi to list
I wasn't listed in the mailrc before, let's fix that.

Signed-off-by: Alexander Graf <agraf@suse.de>
2018-04-04 11:00:07 +02:00
Heinrich Schuchardt
51a0f45122 efi_loader: correctly support parameter delta in Blt
In the Blt service of the EFI_GRAPHICS_OUTPUT_PROTOCOL the parameter delta
is measured in bytes and not in pixels.

The coding only supports delta being a multiple of four. The UEFI
specification does not explicitly require this but as pixels have a size of
four bytes we should be able to assume four byte alignment.

The corresponding unit test is corrected, too. It can be launched with

	setenv efi_selftest block image transfer
	bootefi selftest

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-04-04 11:00:07 +02:00
Heinrich Schuchardt
6fc901c538 efi_selftest: unit test for event groups
Supply a unit test for event groups.

Create multiple events in an event group. Signal each event once and check
that all events are notified once in each round.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-04-04 11:00:07 +02:00
Heinrich Schuchardt
9967adb71d efi_selftest: fix device tree unit test
Include libfdt.h was moved by commit b08c8c4870 ("libfdt: move headers to
<linux/libfdt.h> and <linux/libfdt_env.h>")

Fixes: e236200c7fa6 ("efi_selftest: check installation of the
       device tree")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-04-04 11:00:07 +02:00
Simon Glass
bdecaebd5d efi: Correct header order in efi_memory
The headers are not in the correct order. Fix this. Also drop libfdt_env.h
since it is not needed.

Signed-off-by: Simon Glass <sjg@chromium.org>
Rebased
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-04-04 11:00:07 +02:00
Heinrich Schuchardt
7c92fd69b1 efi_loader: use constants in efi_allocate_pages()
Using the existing predefined constants is less error prone and
makes the code easier to read.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-04-04 11:00:07 +02:00
Heinrich Schuchardt
f7c342f413 efi_loader: show UEFI revision in helloworld
Output the UEFI revision number in helloworld.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-04-04 11:00:07 +02:00
Heinrich Schuchardt
0aa2da788b efi_selftest: unit test for EFI_SIMPLE_TEXT_INPUT_PROTOCOL
Provide a unit test for the EFI_SIMPLE_TEXT_INPUT_PROTOCOL.

The unicode character and the scan code are printed for text
input.

To run the test:

	setenv efi_selftest text input
	bootefi selftest

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-04-04 11:00:07 +02:00
Heinrich Schuchardt
482fc90c0a efi_loader: add missing EFI_RESET_PLATFORM_SPECIFIC
EFI_RESET_PLATFORM_SPECIFIC is one of the values that can be used for the
EFI service ResetSystem. The missing definition is added. The value has to
handled in efi_reset_system().

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-04-04 11:00:07 +02:00
Heinrich Schuchardt
b944e47111 efi_selftest: test gop bitblt
The test checks all block image transfer operations of the graphical output
protocol. An animated submarine is shown.

To run the test:

setenv efi_selftest bock image transfer
bootefi selftest

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-04-04 11:00:07 +02:00
Heinrich Schuchardt
0e0a3ceb50 efi_loader: implement missing bit blit operations in gop
With the patch all block image transfer operations of the
EFI_GRAPHICS_OUTPUT_PROTOCOL are supported.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-04-04 11:00:07 +02:00
Heinrich Schuchardt
b095f3c85f efi_loader: implement event groups
If an event of a group event is signaled all other events of the same
group are signaled too.

Function efi_signal_event is renamed to efi_queue_event.
A new function efi_signal_event is introduced that checks if an event
belongs to a group and than signals all events of the group.
Event group notifciation is implemented for ExitBootServices,
InstallConfigurationTable, and ResetSystem.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-04-04 11:00:07 +02:00
Heinrich Schuchardt
a3a28f5f0c efi_loader: define GUIDS for event groups
Event groups are used to signal multiple events at the same time.
They are identified by GUIDs. This patch provided the predefined
GUIDs of UEFI specification 2.7.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-04-04 11:00:06 +02:00
Heinrich Schuchardt
43bce44262 efi_loader: manage events in a linked list
Lift the limit on the number of events by using a linked list.

This also allows to have events with type == 0.

This patch is based on Rob's patch
efi_loader: fix events
https://lists.denx.de/pipermail/u-boot/2017-October/309348.html

Suggested-by: Rob Clark <robdclark@gmail.com>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-04-04 11:00:06 +02:00
Heinrich Schuchardt
ab9efa979c efi_loader: fix formatting errors
Fix formatting errors in efi_boottime.c indicated by
scripts/checkpatch.py.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-04-04 11:00:06 +02:00
Heinrich Schuchardt
7069515e7f efi_loader: clear signaled state in CheckEvent
CheckEvent must clear the signaled state.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-04-04 11:00:06 +02:00
Heinrich Schuchardt
eb68b4ef31 efi_loader: check parameter in InstallConfigurationTable
Check that parameter guid is not NULL. This avoids a possible NULL
pointer exception.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-04-04 11:00:06 +02:00
Heinrich Schuchardt
0fb4169e28 efi_loader: correct input of special keys
Don't set unicode_char if scan_code is set.
Add support for page up, page down, and insert.
Correct input of function keys.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-04-04 11:00:06 +02:00
Heinrich Schuchardt
06c3d5b989 efi_selftest: check installation of the device tree
The unit test checks if a device tree is installed. It requires that the
'compatible' property of the root node exists. If available it prints the
'serial-number' property.

The serial-number property is derived from the environment variable
'serial#'. This can be used to check if the image_setup_libfdt() function
is executed.

A Python test is supplied. It sets a value for serial# and checks that the
selftest shows this as serial-number.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-04-04 11:00:06 +02:00
Heinrich Schuchardt
bc4f9133ed efi_loader: support device tree for bootefi selftest
The second argument of the bootefi command should always be usable to
specify a device tree. This was missing for bootefi selftest and
bootefi hello.

Proper error handling is added.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-04-04 11:00:06 +02:00
Heinrich Schuchardt
fc225e6082 efi_loader: check initialization of EFI subsystem is successful
Up to now errors in the initialization of the EFI subsystems was not
checked.

If any initialization fails, leave the bootefi command.

We do not retry initialization because this would require to undo all prior
initalization steps.

Suggested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-04-04 11:00:06 +02:00
Heinrich Schuchardt
45204b1025 efi_loader: do_bootefi_exec should always return an EFI status code
The return type of do_bootefi_exec() is efi_status_t. So in case
of an error we should always return an EFI status code.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-04-04 11:00:06 +02:00
Heinrich Schuchardt
14ad49d100 efi_loader: efi_get_time_init should return status code
All EFI initialization functions should return a status code.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-04-04 11:00:06 +02:00
Heinrich Schuchardt
22c793e6a2 efi_loader: exit status for efi_reset_system_init
efi_reset_system_init provides the architecture or board specific
initialization of the EFI subsystem. Errors should be caught and
signalled by a return code.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-04-04 11:00:06 +02:00
Heinrich Schuchardt
098a6cdd1c efi_loader: simplify calling efi_init_obj_list
efi_init_obj_list() should be executed only once.

Rather than having the caller check this variable and the callee set it,
move all access to the variable inside the function. This reduces the
logic needed to call efi_init_obj_list().

Suggested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-04-04 11:00:06 +02:00
Heinrich Schuchardt
d7b181d57d efi_loader: consistently return efi_status_t efi_watchdog_register
efi_watchdog_register() should always return a status code and not
a boolean value.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-04-04 11:00:06 +02:00
Heinrich Schuchardt
075d425d65 efi_loader: return efi_status_t from efi_net_register
Consistently return status codes form efi_net_register().

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-04-04 11:00:06 +02:00
Heinrich Schuchardt
80ea9b0990 efi_loader: return efi_status_t from efi_gop_register
All initialization routines should return a status code instead of
a boolean.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
[agraf: Convert warnings to debug() prints]
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-04-04 11:00:06 +02:00
Heinrich Schuchardt
7657152bdd efi_loader: efi_smbios_register should have a return value
Errors may occur inside efi_smbios_register().

- Return a status code.
- Remove unused variables.
- Use constants where applicable.

Suggested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-04-04 11:00:06 +02:00
Heinrich Schuchardt
1914e5b5d8 efi_loader: provide new doc/README.uefi
Provides information about

- usage of the bootefi command
- overview of UEFI
- interaction between U-Boot and EFI drivers

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Acked-by: Leif Lindholm <leif.lindholm@linaro.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-04-04 11:00:06 +02:00
Heinrich Schuchardt
e1214151e8 efi_loader: delete doc/README.efi
Delete README.efi. It is replaced by a further patch.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-04-04 11:00:06 +02:00
Leif Lindholm
e70f8dfa2c efi_loader: Initial EFI_DEVICE_PATH_UTILITIES_PROTOCOL
Not complete, but enough for Shell.efi and SCT.efi.  We'll implement the
rest as needed or once we have SCT running properly so there is a way to
validate the interface against the conformance test suite.

Initial skeleton written by Leif, and then implementation by Rob.

Signed-off-by: Leif Lindholm <leif.lindholm@linaro.org>
[Fill initial skeleton]
Signed-off-by: Rob Clark <robdclark@gmail.com>
[Rebase on v2018.03-rc1]
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-04-04 11:00:06 +02:00
Heinrich Schuchardt
8396e3fd63 efi_loader: remove deprecated ConsoleControlProtocol
The console control protocol is not defined in the UEFI standard.

It exists in EDK2's EdkCompatiblityPkg package. But this package
is deprecated according to
https://github.com/tianocore/tianocore.github.io/wiki/Differences-between-EDK-and-EDK-II

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-04-04 11:00:06 +02:00
Heinrich Schuchardt
28a4fd46e7 efi_loader: parameter checks for LoadImage
Add parameter checks in efi_load_image().
Check memory allocation is successful in efi_load_image().

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-04-04 11:00:06 +02:00
Andre Przywara
f3fed05e09 Revert "sunxi: Pine64: temporarily remove extra Pine64 non-plus DT"
Now with the MMC environment gone, we have enough space to accommodate
the Pine64 "non-plus" .dtb again.

This reverts commit 47952b8e42.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-04-04 14:15:40 +05:30
Andre Przywara
d14db11d76 sunxi: revert disabling of features
In January some commits were introduced to mitigate the U-Boot image
size issues we encountered on sunxi builds.
Now with the MMC environment removed we can bring them back, as we
practically don't have a size limit anymore.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-04-04 14:15:40 +05:30
Andre Przywara
901fb09d01 sunxi: disable direct MMC environment
Since the dawn of time for the Allwinner support in mainline U-Boot
we store the environment to the SD card and write directly at
544KB from the beginning of the device. This leads to problems when
the U-Boot proper image grows beyond 504KB and eventually overlaps.
With one release of having the environment preferably in a FAT
partition, let's now turn off the MMC variant fallback, so we get back
all the space we need to implement features.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-04-04 14:15:32 +05:30
Andre Przywara
ecd0cec04c net: sun8i-emac: remove support for old binding
The original DT binding used by U-Boot's sun8i-emac driver was not really
agreed upon, and deviated from the "official" binding now used by the
kernel. Since now all U-Boot users have been converted to the new
binding, we can remove support for the old DT nodes from the driver.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-04-04 11:31:35 +05:30
Andre Przywara
0bb48ef243 arm: dts: sunxi: update H5 to new EMAC binding
The U-Boot driver for the sun8i-emac was using some preliminary DT
binding. Now since Linux got its own driver in v4.15 and our driver
can now cope with both bindings, let's convert the DT nodes used by the
OrangePi PC2 over to the new bindings used by the kernel.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-04-04 11:31:35 +05:30
Andre Przywara
e88d2a57f3 arm: dts: sunxi: update H3 to new EMAC binding
The U-Boot driver for the sun8i-emac was using some preliminary DT
binding. Now since Linux got its own driver in v4.15 and our driver
can now cope with both bindings, let's convert the DT nodes used by the
various H3 boards over to the new bindings used by the kernel.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-04-04 11:31:35 +05:30
Andre Przywara
06a57f656b arm: dts: sunxi: update A64 to new EMAC binding
The U-Boot driver for the sun8i-emac was using some preliminary DT
binding. Now since Linux got its own driver in v4.15 and our driver
can now cope with both bindings, let's convert the DT nodes used for the
Pine64+ board over to the new bindings used by the kernel.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-04-04 11:31:35 +05:30
Andre Przywara
12afd95711 net: sun8i-emac: add support for new EMAC DT binding
The Ethernet MAC used in newer Allwinner SoCs (H3, A64, H5) got an
upstream Linux driver in v4.15.
This one uses a slightly different binding from the original one used
by the U-Boot driver.
The differences to the old binding are:
- The "syscon" address is held in a separate node, referenced via a
  phandle in the "syscon" property.
- The reference to the PHY is held in a property called "phy-handle",
  not "phy".
- The PHY register is at offset 0x30 in the syscon device, not at 0.
- The internal PHY is activated when the node, which phy-handle points
  to, is a child node of an "allwinner,sun8i-h3-mdio-internal" node.

Teach the U-Boot driver how to find its resources in a "new-style" DT,
so that we can use a Linux kernel compatible DT for U-Boot as well.
This keeps support for the old binding for now, to allow a smooth
transition.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-04-04 11:31:35 +05:30
Andre Przywara
c034117302 net: sun8i-emac: support new pinctrl DT bindings
The Linux kernel driver for the Allwinner pin controller gained support
for generic properties, which are now also used in the DTs.
The sun8i-emac Ethernet driver for new Allwinner MACs reads the pins from
the DT, but so far only supported the old binding.
Update the parsing routine to cope with both the old and new bindings,
so that the newer DTs can be used with U-Boot and its Ethernet driver.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-04-04 11:31:35 +05:30
Andre Przywara
381996c5ed sunxi: gpio: add missing compatible strings
The sunxi GPIO driver is missing some compatible strings for recent
SoCs. While most of the sunxi GPIO code seems to not rely on this (and
so works anyway), the sunxi_name_to_gpio() function does and fails at
the moment (for instance when resolving the MMC CD pin name).
Add the compatible strings for the A64 and V3s, which were missing
from the list. This now covers all pinctrl nodes in our own DTs.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-04-04 11:31:35 +05:30
Andre Przywara
35debf8a45 sunxi: README.sunxi64: Add hint about non-debug of ARM Trusted Firmware
As we are running into issues where the final U-Boot FIT image file is
exceeding our size limit, add a hint to the README.sunxi64 file
to point out the possibility of building non-debug versions of the ATF
binary. These are about 12KB smaller than the standard debug build, and
so allow successful U-Boot builds for many boards with the Allwinner H5
SoC.
Please note that under normal circumstances the debug build is still
recommended, as it gives valuable clues in case something goes wrong in
the ATF.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-04-04 11:31:35 +05:30
Alexey Brodkin
948071bab4 Makefile: Disable stack-usage check for ARC
With the most recent tools for ARC (arc-2017.09) in case of
"naked" function compiler throws a warning:
---------------------------------->8-----------------------------
board/synopsys/hsdk/hsdk.c: In function 'hsdk_core_init_f':
board/synopsys/hsdk/hsdk.c:345:1: warning: stack usage computation not supported for this target
 }
 ^
---------------------------------->8-----------------------------

That happens because the compiler doesn't handle "naked" functions
as a special case where stack calculation shouldn't be done.

But for now until this is fixed in GCC to get clean buildman output
we're disabling stack-usage check for ARC.

See https://lists.denx.de/pipermail/u-boot/2018-April/324455.html
for more background.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Tom Rini <trini@konsulko.com>
2018-04-03 08:35:33 -04:00
Tom Rini
e63d142f6f Merge tag 'arc-for-2018.05' of git://git.denx.de/u-boot-arc
More ARC changes and fixes for v2018.05

 * Update of ARC tools to the most recent arc-2017.09
 * Fix for compile-time warning for AXS10x
 * Add support of platform-specific commands for HSDK
 * Add support for on-board SPI flash on HSDK
   Note though that for write support another series [1]
   is required. I hope that Jagan will be able to review and
   act on SPI flash improvement series before we get beyond RC1.

   Also note that to get clean build for HSDK we need to disable
   stack-usage check [2] as our current GCC erroneously tries to calculate
   stack-usage on a naked function which leads to warning.

[1] https://patchwork.ozlabs.org/project/uboot/list/?series=35796
[2] https://patchwork.ozlabs.org/patch/894139/
2018-04-03 08:33:15 -04:00
Miquel Raynal
e71553fe75 configs: add NAND support for NES Classic
Add NAND parameters to the Nintendo NES Classic configuration file which
features a Macronix NAND flash chip with 128kiB blocks of 2kiB pages
plus 64 OOB bytes.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-04-03 12:13:36 +02:00
Miquel Raynal
748b5b34d3 sunxi: move the NAND parameters to Kconfig
Move the NAND parameters from defconfig files to Kconfig for SUNXI
architecture only. Fort now only the CHIP pro is migrated.

It would have been better to convert this defconfig entry to Kconfig for
all supported machines/architectures but it has been abandoned due to a
fairly high amount of errors reported by the moveconfig.py tool. This is
due to defines quite often being multiplications of values/other defines
not correctly handled.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-04-03 12:13:32 +02:00
Miquel Raynal
b56052f4ca sunxi: make NAND_SUNXI use ARCH_SUNXI as default in Kconfig
Remove NAND_SUNXI from the CHIP pro defconfig to be automatically
selected depending on the state of ARCH_SUNXI.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-04-03 12:13:27 +02:00
Miquel Raynal
6d094d535c sunxi: automatically select SPL_NAND_SUPPORT in Kconfig
Make SUNXI_NAND select SPL_NAND_SUPPORT in Kconfig, this limit the
number of entries to add in defconfig files when adding NAND support.

For now, the only board using it is the CHIP pro.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-04-03 12:13:06 +02:00
Miquel Raynal
491feffa88 sunxi: dts: enable NAND on NES classic
Let the Nintendo NES Classic use the Macronix NAND chip on it.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-04-03 12:11:56 +02:00
Miquel Raynal
663e8a9b54 sunxi: allow NAND support to be compiled for sun8i platforms
Add some clocks/PLL definitions as well as the dependency on MACH_SUN8I
in Kconfig.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-04-03 12:11:52 +02:00
Miquel Raynal
136e325933 sunxi: spl: remove DMA related settings of the NAND controller
Code has been changed to do not use DMA anymore with the NAND
controller, instead PIO is used. Then, DMA-specific initialization may
be dropped.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-04-03 12:11:48 +02:00
Miquel Raynal
6ddbb1e936 spl: nand: sunxi: use PIO instead of DMA
SPL support was first written to support only the earlier generations of
Allwinner SoCs, and was only really enabled on the A13 / GR8. However,
those old SoCs had a DMA engine that has been replaced since the A31 by
another DMA controller that is no longer compatible.

Since the code directly uses that DMA controller, it cannot operate
properly on the later SoCs, while the NAND controller has not changed.

There's two paths forward, the first one would have been to add support
for that DMA controller too, the second to just remove the DMA usage
entirely and rely on PIO.

The later has been chosen because CPU overload at this stage is not an
issue and it makes the driver more generic, and easier to understand.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Acked-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-04-03 12:11:43 +02:00
Miquel Raynal
7440bd7885 spl: nand: sunxi: declare the ecc_bytes array globally
Move the ecc_bytes array out of nand_max_ecc_strength() for future use
by nand_read_page().

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Acked-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-04-03 12:11:38 +02:00
Miquel Raynal
ba1c98bae2 sunxi: spl: deassert the NAND controller reset line
Ensure the NAND controller reset line is deasserted before use.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-04-03 12:11:32 +02:00
Miquel Raynal
22f0aa0528 spl: nand: sunxi: make the reset column helper more generic
Prepare the future use of an helper to move the data pointer (the
column) of the NAND chip by renaming nand_reset_column() to
nand_change_column(). Resetting the column is just a matter of giving 0
as argument.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Acked-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-04-03 12:11:28 +02:00
Miquel Raynal
4dac80a5e9 spl: nand: sunxi: ensure enough time has passed after changing the column
When changing the column, the ONFI specification states that a minimum
time of tCCS (Change Column Setup time) must elapse between the last
address cycle is asserted on the bus and the first data cycle is
clocked. An usual value for average NANDs is 500 nanoseconds. Round it
up to 1 microsecond to be safe.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Acked-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-04-03 12:11:22 +02:00
Miquel Raynal
a084cb6664 spl: nand: sunxi: create an helper to handle command execution
Executing a command is matter of always doing the following sequence:
  * Waiting for the FIFO to be empty so we can fill it with the new
    command.
  * Clearing the status register.
  * Writing the command in the FIFO.
  * Waiting for the command to finish.

Add a nand_exec_cmd() helper to handle this instead of repeating the
logic through the various functions.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Acked-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-04-03 12:11:17 +02:00
Miquel Raynal
781e70cff1 spl: nand: sunxi: add missing status clear
It is best practice to always clear the status register before executing
a command to be sure that the status read afterwards is relevant.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Acked-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-04-03 12:11:13 +02:00
Miquel Raynal
60fb179133 spl: nand: sunxi: introduce the nand_wait_cmd_fifo_empty() helper
One bit in the control registers indicates if the NAND controller is
ready to receive a new command. Otherwise, the command FIFO is full and
we should wait for this bit to flip. It then states that the last
command has been processed and the FIFO is now free to welcome another
command.

Add this sanity check before starting any new command.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Acked-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-04-03 12:11:07 +02:00
Miquel Raynal
28f7a9d375 spl: nand: sunxi: introduce the nand_wait_int() helper
The pattern of polling on a status register until a bit is set or a
timeout occurs is repeated multiple times in the driver. Mutualize the
code by introducing the nand_wait_int() helper that does wait for the
bit to flip or returns an error in case of timeout.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Acked-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-04-03 12:11:04 +02:00
Miquel Raynal
802f766994 spl: nand: sunxi: fix typo on register name
Change NFC_SEND_ADR to NFC_SEND_ADDR.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Acked-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-04-03 12:10:59 +02:00
Miquel Raynal
a0a984e14a spl: nand: sunxi: fix second case of modulo by zero error
In the nand_read_buffer() step, the seed is calculated by doing a modulo
by conf->nseeds which is always zero when not using the randomizer (most
of SLC NANDs).

This situation turns out to lead to a run time freeze with certain
toolchains.

Derive this seed only when the randomizer is enabled (and conf->nseeds
logically not zero), exactly like what has been done before with an
identical situation, see commit ea3f750c73 ("nand: sunxi: Fix modulo
by zero error").

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Acked-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-04-03 12:10:55 +02:00
Miquel Raynal
f3aff37689 mtd: nand: sunxi: fix ECC strength choice
When the requested ECC strength does not exactly match the strengths
supported by the ECC engine, the driver is selecting the closest
strength meeting the 'selected_strength > requested_strength'
constraint. Fix the fact that, in this particular case, ecc->strength
value was not updated to match the 'selected_strength'.

For instance, one can encounter this issue when no ECC requirement is
filled in the device tree while the NAND chip minimum requirement is not
a strength/step_size combo natively supported by the ECC engine.

Suggested-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Acked-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-04-03 12:10:46 +02:00
Miquel Raynal
55fe0e2b54 spl: fix binman_sym output check
A previous commit introduced the use of binman in the SPL.

After the binman_sym call over the 'pos' symbol, the output value is
checked against BINMAN_SYM_MISSING (-1UL). According to the
documentation (tools/binman/README), when it comes to the 'pos'
attribute:

pos:
	This sets the position of an entry within the image. The first
	byte of the image is normally at position 0. If 'pos' is not
	provided, binman sets it to the end of the previous region, or
	the start of the image's entry area (normally 0) if there is no
	previous region.

So instead of checking if the return value is BINMAN_SYM_MISSING, we
should also check if the value is not null.

The failure happens when using both the SPL file and the U-Boot file
independently instead of the concatenated file (SPL + padding + U-Boot).
This is because the U-Boot binary file alone does not have the U-Boot
header while it is present in the concatenation file. Not having the
header forces the SPL to discover where it should load U-Boot. The
binman_sym call is supposed to do that but fails. Because of the wrong
check, the destination address was set to 0 while it should have been
somewhere in RAM. This, obviously, stalls the board.

Fixes: 8bee2d251a ("binman: Add binman symbol support to SPL")
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-04-03 12:10:24 +02:00
Tom Rini
645b5afbb8 Prepare v2018.05-rc1
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-04-02 20:31:36 -04:00
Eugeniy Paltsev
f770b3ee18 ARC: HSDK: Enable SPI flash support
HSDK board has sst26wf016 SPI flash IC which we want to support.

Add SPI controller, CS-gpio and SPI flash nodes to hsdk device tree.
Enable corresponding options in hsdk defconfig.

For SPI write functionality to work we need [1] which
adds support of sst26xxx ICs.

[1] https://patchwork.ozlabs.org/project/uboot/list/?series=35796

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-04-02 12:27:56 +03:00
Eugeniy Paltsev
ada8affdfe ARC: HSDK: Add platform-specific commands
This patch add support of hsdk platform-specific commands:

hsdk_clock set - set clock from axi_freq, cpu_freq and tun_freq
environment variables/command line arguments

hsdk_clock get - save clock frequencies to axi_freq, cpu_freq
and tun_freq environment variables

hsdk_clock print - show CPU, AXI, DDR and TUNNEL current
clock frequencies.

hsdk_clock print_all - show all currently used clock frequencies.

hsdk_init - setup board HW in one of pre-defined configuration
(hsdk_hs34 / hsdk_hs36 / hsdk_hs36_ccm / hsdk_hs38 /
hsdk_hs38_ccm / hsdk_hs38x2 / hsdk_hs38x3 / hsdk_hs38x4)

hsdk_go - run baremetal application on hsdk configured
by hsdk_init command.

This patch changes default behaviour of 'bootm' command:
now we are able to set number of CPUs to be kicked by setting
'core_mask' environment variable before 'bootm' command run.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-04-02 12:27:56 +03:00
Alexey Brodkin
1e43118560 ARC: Bump ARC tools used in TravisCI to the most recent release arc-2017.09
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-04-02 12:27:56 +03:00
Eugeniy Paltsev
bdc9f02fab ARC: AXS10x: DTS: Remove unused interrupt properties
Some device tree nodes (like ethernet, ohci, ehci) in axs10x_mb.dtsi
were copied from linux device tree, so they have interrupts properties.
As we don't use interrupts in uboot we don't have interrupt controller
node in AXS10x device tree. In result we get warnings when we compile
such device tree.

So remove unused interrupts properties to get rid of this warnings.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-04-02 12:26:13 +03:00
Tom Rini
0e5d3e3111 Merge git://git.denx.de/u-boot-dm 2018-04-01 20:36:39 -04:00
Masahiro Yamada
641599a63d image.h: add forward declaration of struct fdt_region
This header needs to know 'fdt_region' is a struct for the
fit_region_make_list() prototype.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-04-01 22:19:10 +08:00
Masahiro Yamada
414e2dbbf2 fdt_region: remove unneeded fdt_internal.h inclusion
fdt_region.c does not depend on anything in libfdt_internal.h

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-04-01 22:19:10 +08:00
Masahiro Yamada
c960a68e20 libfdt: move FDT_RAMDISK_OVERHEAD to image-fdt.c
This macro is locally referenced in common/image-fdt.c

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-04-01 22:19:10 +08:00
Mario Six
e8d5291824 core: ofnode: Fix translation for #size-cells == 0
Commit 286ede6 ("drivers: core: Add translation in live tree case") made
dev_get_addr always use proper bus translations for addresses read from
the device tree. But this leads to problems with certain busses, e.g.
I2C busses, which run into an error during translation, and hence stop
working.

It turns out that of_translate_address() and fdt_translate_address()
stop the address translation with an error when they're asked to
translate addresses for busses where #size-cells == 0 (comment from
drivers/core/of_addr.c):

 * Note: We consider that crossing any level with #size-cells == 0 to mean
 * that translation is impossible (that is we are not dealing with a value
 * that can be mapped to a cpu physical address). This is not really specified
 * that way, but this is traditionally the way IBM at least do things

To fix this case, we check in both the live-tree and non-live tree-case,
whether the bus of the device whose address is about to be translated
has size-cell size zero. If this is the case, we just read the address
as a plain integer and return it, and only apply bus translations if the
size-cell size if greater than zero.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Signed-off-by: Martin Fuzzey <mfuzzey@parkeon.com>
Reported-by: Martin Fuzzey <mfuzzey@parkeon.com>
Fixes: 286ede6 ("drivers: core: Add translation in live tree case")
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-04-01 22:19:10 +08:00
Andy Yan
bcfdf055f8 dm: core: make fixed-clock dt scan live dt compatible
dm_scan_fdt_node can't work when live dt is active,
we should use dm_scan_fdt_live instead.

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-04-01 22:15:11 +08:00
Andre Heider
44683170f8 fs: cbfs: fix locating the cbfs header
The value at the end of the rom is not a pointer, it is an offset
relative to the end of rom.

Signed-off-by: Andre Heider <a.heider@gmail.com>
2018-03-31 16:00:03 +08:00
Andre Heider
33222c8a2c cmd: cbfs: fix reading the end_of_rom pointer for 64bit archs
The cast breaks the pointer on 64bit archs, so lets get rid of it.

Signed-off-by: Andre Heider <a.heider@gmail.com>
Reviewed-by: Alexander Graf <agraf@suse.de>
2018-03-31 16:00:03 +08:00
Kever Yang
1e656ad08c pinctrl-uclass: convert to use live dt
Use live dt interface for pinctrl_select_state_full()

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-31 15:59:59 +08:00
Kever Yang
d255fade66 core: add uclass_get_device_by_phandle_id() api
Add api for who can not get phandle from a device property.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-31 15:59:59 +08:00
Tom Rini
f3b623fa52 Merge git://git.denx.de/u-boot-marvell 2018-03-30 18:18:22 -04:00
Tom Rini
80a66a55fa Merge git://git.denx.de/u-boot-x86 2018-03-30 18:17:23 -04:00
Tom Rini
0ca0a546b1 Merge git://git.denx.de/u-boot-riscv 2018-03-30 18:16:56 -04:00
Ken Ma
25db371e17 arm64: a37xx: defconfigs: enable PCI_CMD and E1000 driver
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Ken Ma <make@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-03-30 12:52:49 +02:00
Wilson Ding
9734104fe4 arm64: a37xx: dts: enable pcie port
This patch enabled PCIe port on both devel-board
and espressobin board.

Cc: Simon Glass <sjg@chromium.org>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Wilson Ding <dingwei@marvell.com>
Signed-off-by: Ken Ma <make@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-03-30 12:52:49 +02:00
Wilson Ding
f38c098043 arm64: a37xx: defconfigs: enable aardvark pcie driver
Signed-off-by: Wilson Ding <dingwei@marvell.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Ken Ma <make@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-03-30 12:52:49 +02:00
Wilson Ding
e51f2b14c4 arm64: a37xx: pci: add support for aardvark pcie driver
This patch introduced the Aardvark PCIe driver based
driver model.
The PCIe driver is supposed to work in Root Complex
mode. It only supports X1 lane width.

Signed-off-by: Wilson Ding <dingwei@marvell.com>
Reviewed-on: http://vgitil04.il.marvell.com:8080/38725
Reviewed-by: Victor Gu <xigu@marvell.com>
Reviewed-by: Hua Jing <jinghua@marvell.com>
Tested-by: Hua Jing <jinghua@marvell.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Ken Ma <make@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-03-30 12:52:49 +02:00
Wilson Ding
92e7a6814c arm64: a37xx: populate pcie memory region
This patch added a new region of 32MiB AT 0xe800.0000
to Armada37x0's memory map. This region is supposed to
be mapped in MMU in order to enable the access to the
PCI I/O or MEM resources.

Signed-off-by: Wilson Ding <dingwei@marvell.com>
Reviewed-on: http://vgitil04.il.marvell.com:8080/38724
Tested-by: iSoC Platform CI <ykjenk@marvell.com>
Reviewed-by: Victor Gu <xigu@marvell.com>
Signed-off-by: Ken Ma <make@marvell.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-03-30 12:52:49 +02:00
Ken Ma
d6aed541b6 arm64: a37xx: remove old pinctrl implementation
Since the new pinctrl/gpio driver is used, so this patch removes
the old board specific pin control settings.

Cc: Simon Glass <sjg@chromium.org>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Ken Ma <make@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-03-30 12:52:48 +02:00
Ken Ma
fd81eb9edf Revert "arm64: a37xx: dts: Add pin control nodes to DT"
The commit "arm64: mvebu: Add pinctrl nodes for Armada 3700" has
added new pinctrl nodes.
This reverts commit f7cab0f95b.

Cc: Simon Glass <sjg@chromium.org>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Ken Ma <make@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-03-30 12:52:48 +02:00
Ken Ma
65b2e66881 doc: a37xx: Introduce pinctrl device tree binding
Reviewed-on: http://vgitil04.il.marvell.com:8080/43289
Tested-by: iSoC Platform CI <ykjenk@marvell.com>
Reviewed-by: Kostya Porotchkin <kostap@marvell.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Ken Ma <make@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-03-30 12:52:48 +02:00
Ken Ma
30aecc02f7 arm64: a37xx: dts: Correct mpp definitions
This patch corrects below mpp definitions for armada 3720 DB board
and ESPRESSOBin board:
- "smi" pins group is added and "smi" function is set for eth0;
- Now pcie pins are used as gpio to implement PCIe function in
  hardware, so "pcie" group function is changed to "gpio".

Reviewed-on: http://vgitil04.il.marvell.com:8080/43287
Reviewed-by: Hua Jing <jinghua@marvell.com>
Tested-by: iSoC Platform CI <ykjenk@marvell.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Ken Ma <make@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-03-30 12:52:48 +02:00
Ken Ma
dc36235abe arm64: a37xx: pinctrl: Correct mpp definitions
This patch corrects below mpp definitions:
 - The sdio_sb group is composed of 6 pins and not 5;
 - The rgmii group contains pins mpp2[17:6] and not mpp2[19:6];
 - Pin of group "pmic0" is mpp1[6] but not mpp1[16];
 - Pin of group "pmic1" is mpp1[7] but not mpp1[17];
 - A new group "smi" is added in A0 with 2 pins - mpp2[19:18], its
   bitmask is bit4;
 - Group "pcie1" has 3 pins in A0 - mpp2[5:3], its bit mask is
   bit5 | bit9 | bit10 but not bit4;
 - Group "ptp" has 3 pins in A0 as Z1, but its bitmask is changed to
   bit11 | bit12 | bit13.

Reviewed-on: http://vgitil04.il.marvell.com:8080/43288
Tested-by: iSoC Platform CI <ykjenk@marvell.com>
Reviewed-by: Hua Jing <jinghua@marvell.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Ken Ma <make@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-03-30 12:52:48 +02:00
Ken Ma
0237448a71 arm64: a37xx: pinctrl: Fix gpio pin offset in register
For armada_37xx_update_reg(), the parameter offset should be pointer so
that it can be updated, otherwise offset will keep old value, and then
when offset is larger than or equal to 32 the mask calculated by
"BIT(offset)" will be 0 in gpio chip hook functions, it's an error,
this patch set offset parameter of armada_37xx_update_reg() as pointer.

Reviewed-on: http://vgitil04.il.marvell.com:8080/43287
Reviewed-by: Hua Jing <jinghua@marvell.com>
Tested-by: iSoC Platform CI <ykjenk@marvell.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Ken Ma <make@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-03-30 12:52:48 +02:00
Ken Ma
23626cac4b arm64: a37xx: pinctrl: Fix the pin 23 on south bridge
Pin 23 on South bridge does not belong to the rgmii group. It belongs to
a separate group which can have 3 functions.

Due to this the fix also have to update the way the functions are
managed. Until now each groups used NB_FUNCS(which was 2) functions. For
the mpp23, 3 functions are available but it is the only group which needs
it, so on the loop involving NB_FUNCS an extra test was added to handle
only the functions added.

The bug was visible when the gpio regulator used the gpio 23, the whole
rgmii group was setup to gpio which broke the Ethernet support on the
Armada 3720 DB board. Thanks to this patch, the UHS SD cards (which need
the vqmmc) _and_ the Ethernet work again.

Reviewed-on: http://vgitil04.il.marvell.com:8080/43284
Reviewed-by: Hua Jing <jinghua@marvell.com>
Tested-by: iSoC Platform CI <ykjenk@marvell.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Ken Ma <make@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-03-30 12:52:48 +02:00
Ken Ma
8aecbcd166 arm64: a37xx: dts: Fix the number of GPIO on south bridge
The number of pins in South Bridge is 30 and not 29. There is a fix for
the driver for the pinctrl, but a fix is also need at device tree level
for the GPIO.

Reviewed-on: http://vgitil04.il.marvell.com:8080/43286
Reviewed-by: Hua Jing <jinghua@marvell.com>
Tested-by: iSoC Platform CI <ykjenk@marvell.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Ken Ma <make@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-03-30 12:52:48 +02:00
Ken Ma
44ac747bdf arm64: a37xx: pinctrl: Fix number of pin in south bridge
On the south bridge we have pin from 0 to 29, so it gives 30 pins (and
not 29).

Reviewed-on: http://vgitil04.il.marvell.com:8080/43285
Tested-by: iSoC Platform CI <ykjenk@marvell.com>
Reviewed-by: Hua Jing <jinghua@marvell.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Ken Ma <make@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-03-30 12:52:48 +02:00
Ken Ma
4382e53e96 arm64: a37xx: dts: Add additional pinctrl definition
Add mmc pins, pcie pins and sdio pins definition and do these pins'
configuration for DB board and espressobin board;
Add uart2 pins configuration for DB board.

Reviewed-on: http://vgitil04.il.marvell.com:8080/40914
Reviewed-by: Wilson Ding <dingwei@marvell.com>
Tested-by: Wilson Ding <dingwei@marvell.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Ken Ma <make@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-03-30 12:52:48 +02:00
Ken Ma
d7d3ee5d64 arm64: a37xx: dts: Add pinctrl configuration for ESPRESSOBin board
Reviewed-on: http://vgitil04.il.marvell.com:8080/40913
Reviewed-by: Wilson Ding <dingwei@marvell.com>
Tested-by: Wilson Ding <dingwei@marvell.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Ken Ma <make@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-03-30 12:52:48 +02:00
Ken Ma
e732a5ef36 arm64: a37xx: defconfig: Enable PINCTRL and GPIO support for ESPRESSOBin board
This patch enable the PINCTRL and GPIO support, including the GPIO
command on the Armada 3720 espressobin board.

Reviewed-on: http://vgitil04.il.marvell.com:8080/40746
Tested-by: iSoC Platform CI <ykjenk@marvell.com>
Reviewed-by: Wilson Ding <dingwei@marvell.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Ken Ma <make@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-03-30 12:52:48 +02:00
Ken Ma
d13d8ba1e4 arm64: a37xx: dts: add gpio head file including
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Ken Ma <make@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-03-30 12:52:48 +02:00
Mark Kettenis
bdca661ecc arm64: mvebu: a8k: Add distro boot support
The various load address values are taken from the a37xx configuration
and match the dowstream 'u-boot-2017.03-armada-17.10' release where
appropriate.

Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-03-30 12:52:48 +02:00
Alexander Graf
6cd5678c45 kwbimage: Fix out of bounds access
The kwbimage format is reading beyond its header structure if it
misdetects a Xilinx Zynq image and tries to read it. Fix it by
sanity checking that the header we want to read fits inside our
file size.

Signed-off-by: Alexander Graf <agraf@suse.de>
Tested-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-03-30 12:52:48 +02:00
Baruch Siach
bc8cb152d8 configs: clearfog: enable random random MAC address
This makes the network devices usable when booting a blank board over
UART, with no pre-configured MAC address stored in the environment area.

Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-03-30 12:52:48 +02:00
Igal Liberman
b8478fcd04 dm: pcie: designware: add correct ATU handling
Currently, ATU (address translation unit) implementation doesn't
support translate addresses > 32 bits.

This patch allows to configure ATU correctly for different
memory accesses (memory, configuration and IO).
The same approach is used in Linux Kernel.

Signed-off-by: Igal Liberman <igall@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-03-30 12:52:48 +02:00
Ivan Gorinov
5d73292cf8 x86: zImage: Pass working device tree data to the kernel
On x86 platforms, U-Boot does not pass Device Tree data to the kernel.
This prevents the kernel from using FDT loaded by U-Boot.

Read the working FDT address from the "fdtaddr" environment variable
and add a copy of the FDT data to the kernel setup_data list.

Signed-off-by: Ivan Gorinov <ivan.gorinov@intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: add #include <linux/libfdt.h> to zimage.c to fix build error]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2018-03-30 16:06:58 +08:00
Bernhard Messerklinger
0851f344d7 x86: mmc: Fix mapping of BAR memory
Use dm_pci_map_bar function for BAR mapping. This has the advantage
of clearing BAR flags and and only accepting mapped memory.

Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com>
Reviewed-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2018-03-30 16:05:08 +08:00
Bin Meng
ee1109bb45 dm: pci: Avoid setting a PCI region that has 0 size
It makes no sense to set a PCI region that has 0 size.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-03-30 16:05:08 +08:00
Bin Meng
1eaf7800b6 dm: pci: Check board information pointer in decode_regions()
PCI enumeration may happen very early on an x86 board. The board
information pointer should have been checked in decode_regions()
as its space may not be allocated yet.

With this commit, Intel Galileo board boots again.

Fixes: 664758c ("pci: Fix decode regions for memory banks")
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-03-30 16:05:08 +08:00
Alexander Graf
14d61d4e57 efi_stub: Fix GDT_NOTSYS check
The get_codeseg32() wants to know if a passed in descriptor has
flag GDT_NOTSYS set (desc & GDT_NOTSYS), not whether desc and
GDT_NOTSYS are not != 0 (desk && GDT_NOTSYS).

This is an obvious typo. Fix it up.

Signed-off-by: Alexander Graf <agraf@suse.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2018-03-30 16:05:07 +08:00
Rick Chen
d58717e425 riscv: ae250: Support DT provided by the board at runtime
Enable CONFIG_OF_BOAD to support delivery dtb to u-boot
at run time instead of embedded.

There are two methods to delivery dtb.
 1 Pass from loader:
   When u-boot boot from RAM, gdb or loader can pass dtb
   via a2 to u-boot dynamically. Of course gdb or loader
   shall be in charge of dtb delivery.

 2 Configure CONFIG_SYS_FDT_BASE:
   It can be configured as RAM or ROM base statically,
   no mater u-boot boot from RAM or ROM.
   If it was configured as ROM base, dtb can be burned
   into ROM(spi flash) by spi driver.

Meanwhile remove CONFIG_SKIP_LOWLEVEL_INIT which is
useless in nx25-ae250 configuration.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Cc: Greentime Hu <green.hu@gmail.com>
2018-03-30 13:13:56 +08:00
Rick Chen
2bc5bea9e1 configs: Drop CONFIG_MMC_NDS32
Remove CONFIG_MMC_NDS32 from the three config
(adp-ae3xx_defconfig, adp-ag101p_defconfig, nx25-ae250_defconfig).

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Cc: Greentime Hu <green.hu@gmail.com>
2018-03-30 13:13:45 +08:00
Rick Chen
bf9ba4dbb0 mmc: ftsdc010: Merge nds32_mmc to ftsdc010
nsd32_mmc was created to support ftsdc010 dm.
It is not necessary to separate both, so merge it
to ftsdc010.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Cc: Greentime Hu <green.hu@gmail.com>
2018-03-30 13:13:45 +08:00
Rick Chen
095c9f35d5 mmc: ftsdc010: Migrate CONFIG_FTSDC010_SDIO to Kconfig
Convert CONFIG_FTSDC010_SDIO to Kconfig.
So CONFIG_FTSDC010_SDIO can also be
removed from config_whitelist.txt.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Cc: Greentime Hu <green.hu@gmail.com>
2018-03-30 13:13:45 +08:00
Rick Chen
88a0b7694f Drop CONFIG_FTSDC010_NUMBER
CONFIG_FTSDC010_NUMBER was not used anymore,
can be removed now.

So CONFIG_FTSDC010_NUMBER
can also be removed from config_whitelist.txt.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Cc: Greentime Hu <green.hu@gmail.com>
2018-03-30 13:13:45 +08:00
Rick Chen
ebce73f0af Drop CONFIG_FTSDC010_BASE
After drop non-dm code of ftsdc010, the sd register
base definition can be droppped now.

So CONFIG_FTSDC010_BASE and CONFIG_FTSDC010_BASE_LIST both
can be removed from config_whitelist.txt

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Cc: Greentime Hu <green.hu@gmail.com>
2018-03-30 13:13:45 +08:00
Rick Chen
5ff6b3de6d board: Drop ftsdc010 non-dm code
Remove board_mmc_init() in adp-ag101p, adp-ae3xx
and nx25-ae250 boards.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Cc: Greentime Hu <green.hu@gmail.com>
2018-03-30 13:13:45 +08:00
Rick Chen
cf52231a93 mmc: ftsdc010: Drop non-dm code
Only three defconfig(adp-ag101p_defconfig,
adp-ae3xx_defconfig, nx25-ae250_defconfig)
set CONFIG_FTSDC010=y. And they all also
enable CONFIG_DM_MMC. So the non-dm code
of ftsdc010 can be dropped now.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Cc: Greentime Hu <green.hu@gmail.com>
2018-03-30 13:13:45 +08:00
Rick Chen
2060a69100 nds32: dts: AG101P support sd High-Speed mode
Enable High-Speed mode with cap-sd-highspeed in dts

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
2018-03-30 13:13:34 +08:00
Rick Chen
177c16c933 riscv: dts: AE250 support sd High-Speed mode
Enable High-Speed mode with cap-sd-highspeed in dts.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
2018-03-30 13:13:34 +08:00
Rick Chen
7459c887c5 mmc: ftsdc010: Support High-Speed mode
ftsdc010 dm driver has been disable High-Speed mode
as default to work around Andes AE3XX platform's problem,
because of it does not support High-Speed mode in
commit id 73cd56b2df.

But other platforms or SoCs maybe support this function.
So High-Speed mode can be enabled from dts with
cap-mmc-highspeed or cap-sd-highspeed property.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
2018-03-30 13:13:34 +08:00
Rick Chen
fcc7a077c4 doc: ae250: Describe riscv-linux booting via u-boot
Simply record riscv-linux booting steps and messages
from bbl via u-boot on QEMU in README.ae250.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
2018-03-30 13:13:29 +08:00
Rick Chen
86aa65a0cd tools: mkimage: Support RISC-V arch
Add riscv uimage arch to support riscv-linux booting.
It can Convert riscv-linux to image which can be
booted by bootm command.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
2018-03-30 13:13:29 +08:00
Rick Chen
22b7e6fbd3 riscv: bootm: Remove ATAGS
ATAGS is not supported and will be replaced
by DT in riscv-linux. So can be removed now.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
2018-03-30 13:13:29 +08:00
Rick Chen
0462358b62 riscv: bootm: Support to boot riscv-linux
riscv-linux should use BBL (Berkeley bootloader) for
loading the Linux kernel.

U-Boot can play as FSBL(first stage bootloader)
to boot BBL and riscv-linux.

In BBL's init_first_hart(), it will pass dtb with a1.
So implement bootm to pass arguments to BBL correctly.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
2018-03-30 13:13:29 +08:00
Rick Chen
22e8c0f02b riscv: checkpatch: Fix static const char * array declarations
It is reported by checkpatch.pl
WARNING: static const char * array
should probably be static const char * const

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
2018-03-30 13:13:22 +08:00
Rick Chen
b9076495db riscv: checkpatch: Fix missing a blank line after declarations
It is reported by checkpatch.pl
WARNING: Missing a blank line after declarations.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
2018-03-30 13:13:22 +08:00
Rick Chen
45fc937576 riscv: checkpatch: Fix alignment should match open parenthesis
It is reported by checkpatch.pl.
CHECK: Alignment should match open parenthesis

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
2018-03-30 13:13:22 +08:00
Rick Chen
40717eb849 riscv: checkpatch: Fix use of volatile
It is reported by checkpatch.pl
WARNING: Use of volatile is usually wrong: see
Documentation/process/volatile-considered-harmful.rst

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
2018-03-30 13:13:22 +08:00
Rick Chen
bc0818a6a9 riscv: checkpatch: Fix Macro argument reuse
It is CHECK reported by checkpatch.pl
CHECK: Macro argument reuse 'PTE' - possible side-effects?

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
2018-03-30 13:13:22 +08:00
Heinrich Schuchardt
8761e98141 wandboard: remove superfluous include
No definition provided by input.h is used in the board file.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-03-29 17:34:31 +02:00
Eran Matityahu
0fe69adc8f imx7: spl: Check for Serial Downloader in spl_boot_device
Similarly to imx6, before reading the boot device, first check
bmode to see if the serial downloader has been selected
explicitly, then check whether the serial downloader has been
activated due to unbootable primary boot devices (e.g. empty eMMC).

If the serial downloader is activated, return BOOT_DEVICE_BOARD.
This allows SPL with SDP support to wait for the U-Boot image
to be loaded via the serial download protocol using imx_usb_loader.

Signed-off-by: Eran Matityahu <eran.m@variscite.com>
2018-03-29 17:33:12 +02:00
Eran Matityahu
03858f8ec6 imx7: Add src_base structure define macro
Add src_base structure global define macro, similarly to imx6

Signed-off-by: Eran Matityahu <eran.m@variscite.com>
2018-03-29 17:32:52 +02:00
Eran Matityahu
0004b7aa8a Makefile: Build firmware-ivt image type for HAB verification also for mx7
Create u-boot-ivt.img and u-boot-ivt.img.log when building U-Boot
with SPL and Secure Boot enabled for imx7 (like it is done for imx6).

See commit d21bd69b6e for more info.

Signed-off-by: Eran Matityahu <eran.m@variscite.com>
2018-03-29 17:29:55 +02:00
Eran Matityahu
dad75e241c mx7_common: Fix SPL compilation with secure boot support enabled
The SPL MISC driver support must be enabled, so that the driver can use OTP fuse
to check if HAB is enabled.

Signed-off-by: Eran Matityahu <eran.m@variscite.com>
2018-03-29 17:29:38 +02:00
Jörg Krause
7906ed4fdd ARM: dts: imx6ull: add wdog3
The i.MX6ULL has a WDOG3 located at start address 0x021E0000 in the
AIPS-2 memory region [1].

[1] i.MX 6ULL Applications Processor Reference Manual, Rev. 1, 11/2017,
    Table 2-3. AIPS-2 memory map, p. 178

Signed-off-by: Jörg Krause <joerg.krause@embedded.rocks>
2018-03-29 17:29:11 +02:00
Jörg Krause
e73edcf18c ARM: dts: imx6ul: add wdog3
The i.MX6UL has a WDOG3 located at start address 0x021E0000 in the
AIPS-2 memory region [1].

[1] i.MX 6UltraLite Applications Processor Reference Manual, Rev. 1,
    04/2016, Table-2-3 AIPS-2 memory map, p. 166

Signed-off-by: Jörg Krause <joerg.krause@embedded.rocks>
2018-03-29 17:28:55 +02:00
Nandor Han
d8b3ec4d1a board: ge: ppd: Fix environment variable location
This fixes environment variable location to avoid overlapping with
U-Boot itself. Also more space for environment variables has been
reserved to prevent future issues.

Signed-off-by: Nandor Han <nandor.han@ge.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
2018-03-29 17:28:05 +02:00
Anatolij Gustschin
7adafc146f imx: fix CAAM base for i.MX6UL
HW accelerated "hash sha256 ..." command doesn't work on i.MX6UL, we get
"CAAM was not setup properly or it is faulty" error message.

This is due to wrong CAAM base 0x02100000, on i.MX6UL the CAAM base
address is 0x02140000. Fix it.

Note: with this patch applied the "hash sha256" commant still has some
issues on i.MX6UL ("Invalid KEY Command" or other errors). With data
cache off the "hash sha256" command works as expected.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-03-29 17:22:49 +02:00
Sriram Dash
fa452192cb drivers: i2c: mxc: Update support to 8 I2C controllers
Existing driver supports upto 4 I2C controllers.
But some of future NXPs SoCs like lx2160a has
eight I2C controllers.

Update MXC driver to support upto 8 I2C controllers

Signed-off-by: Sriram Dash <sriram.dash@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2018-03-29 17:21:06 +02:00
Sriram Dash
942ecc8bd8 drivers: i2c: mxc: Update SYS_I2C_MXC_I2C support in Kconfig
NXP layerscape platforms like ls1088a, ls2088a
uses MXC I2C Controller.
-Remove dependency of MX6 for the same.

Update related configs to use Kconfig file.
-Add SYS_I2C_MXC_I2C1,_I2C2,_I2C3,_I2C4 in Kconfig
-Add CONFIG_SYS_MXC_I2C1_SPEED,_I2C2_,_I2C3_,_I2C4_ in Kconfig
-Add CONFIG_SYS_MXC_I2C1_SLAVE,_I2C2_,_I2C3_,_I2C4_ in Kconfig

Signed-off-by: Sriram Dash <sriram.dash@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2018-03-29 17:20:42 +02:00
Tom Rini
2476d26fd3 Merge git://git.denx.de/u-boot-rockchip 2018-03-29 08:25:56 -04:00
Philipp Tomsich
6837c58666 rockchip: sdhci: support 8bit bus-width
The Rockchip-specific SDHCI wrapper does not process the 'bus-width'
property in the SDHCI node. Consequently, the bus is always kept in
4bit mode, even if 8bit wide operation is available, supported and
requested in the DTS.

This change adds processing of the 'bus-width' property and sets the
host capability flag for an 8bit wide bus, if set to 8. As the logic
in sdhci.c does not support clearing the 4bit capability, we assume
that 4bit operation is always supported.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-28 23:47:08 +02:00
Philipp Tomsich
47b8583f58 rockchip: mmc: update MAINTAINERS
The Rockchip-specific wrappers to the DW-MMC and the SDHCI driver
were not covered as part of what's maintained by the architecture
maintainers.  Add them here.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-28 23:47:07 +02:00
Philipp Tomsich
f0f7178e6b rockchip: defconfig: puma-rk3399: enable DMA for SDHCI controller
For the RK3399-Q7, we have a fast eMMC connected in an 8 bit wide
configuration to the SDHCI controller (sdhci@fe330000).  Enable DMA
within the SDHCI driver to get the best performance out of it.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-28 23:47:06 +02:00
Mark Kettenis
d928695ed6 rockchip: rk3399: set fdtfile
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-28 23:44:59 +02:00
Alexander Kochetkov
6b0c26fa05 rockchip: clk: rk3188: update dpll settings to make EMAC work
The patch set dpll settings for 300MHz to values used by binary
blob[1]. With new values dpll still generate 300MHz clock, but
EMAC work. Probably with new values dpll generate more stable clock.

dpll on rk3188 provide clocks to DDR and EMAC. With current
dpll settings EMAC doesn't work on radxa rock. EMAC sends packets
to network, but it doesn't receive anything. ifconfig shows a lot
of framing errors.

[1] https://github.com/linux-rockchip/u-boot-rockchip/blob/u-boot-rk3288/
    tools/rk_tools/3188_LPDDR2_300MHz_DDR3_300MHz_20130830.bin

Signed-off-by: Alexander Kochetkov <al.kochet@gmail.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-28 23:44:59 +02:00
Punit Agrawal
6e60779156 video: rk3288_mipi: Combine NULL check into IS_ERR_OR_NULL()
Signed-off-by: Punit Agrawal <punit.agrawal@arm.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-28 23:44:58 +02:00
Heinrich Schuchardt
0ea91c3240 video: rk3288_mipi: check in rk_mipi_ofdata_to_platdata
The error checking should also catch the case that no range has beeen
defined.
syscon_get_first_range() returns NULL if no range is defined.
cf. rk3399_mipi.c

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-28 23:44:58 +02:00
Punit Agrawal
a89c725d2c video: rk3399_mipi: Combine NULL check into IS_ERR_OR_NULL()
Signed-off-by: Punit Agrawal <punit.agrawal@arm.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-28 23:44:58 +02:00
Heinrich Schuchardt
fca10453cf video: rk3399_mipi: correct error checking
Pointers are never negative. Use macro IS_ERR() for checking.
cf. rk3288_mipi.c

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-28 23:30:31 +02:00
Heinrich Schuchardt
e56a713eac usb: rockchip: remove duplicate assignement.
Assigning f_rkusb->reboot_flag twice doesn't make sense.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-28 23:30:31 +02:00
Heinrich Schuchardt
2ebc80e83c driver: ram: rockchip: rk3399: missing counter increment
If we want to check the duration we need to increment the counter.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-28 23:30:31 +02:00
Alexander Kochetkov
7a6d7d3e12 rockchip: pinctrl: rk3188: Move the iomux definitions into pinctrl-driver
Clean the iomux definitions at grf_rk3188.h, and move them into
pinctrl-driver for resolving the compiling error of redefinition.

Signed-off-by: Alexander Kochetkov <al.kochet@gmail.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-28 23:30:30 +02:00
Alexander Kochetkov
b1d093d256 rockchip: pinctrl: rk3036: Move the iomux definitions into pinctrl-driver
Clean the iomux definitions at grf_rk3036.h, and move them into
pinctrl-driver for resolving the compiling error of redefinition.

Signed-off-by: Alexander Kochetkov <al.kochet@gmail.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-28 23:30:30 +02:00
Philipp Tomsich
41837e8a6b rockchip: pinctrl: rk3399: add support for I2C[123467]
This adds support for the (to date unsupported) I2C controllers 1~4
and 6~7 (i.e. now all controllers except I2C5, which is not accessible
on the RK3399-Q7, are supported by pinctrl).

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-28 23:30:30 +02:00
Philipp Tomsich
339267a08d rockchip: pinctrl: rk3399: fix GPIO2B1 and GPIO2B2 shift value
The shift values for GPIO2B1 and GPIO2B2 had in fact referred to
GPIO2B0 and GPIO2B1, respectively.  This substitutes the correct
values.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-28 23:30:30 +02:00
Tom Rini
81cf7c8d45 Merge git://git.denx.de/u-boot-ubi 2018-03-25 12:02:13 -04:00
Tom Rini
2dc5165ee0 Merge git://git.denx.de/u-boot-spi 2018-03-25 12:01:44 -04:00
Tom Rini
f7c9e76fb8 Merge git://git.denx.de/u-boot-i2c 2018-03-25 12:00:48 -04:00
Tom Rini
89a650e0ff Merge tag 'xilinx-for-v2018.05' of git://git.denx.de/u-boot-microblaze
Xilinx changes for v2018.05

- Fix mkimage recognition
- Update all my fragments

ZynqMP:
- Use clk driver
- Support loading elfs in el1
- Various DTS and defconfig changes
- Enable newer pmufw versions
- Support more clocks
- Remove ep108
- Secure image support
- Fix memtest setup

Zynq:
- Enabling watchdog driver
- Support more clocks
- defconfig changes

fpga:
- Simplify error path

net:
- GMII case update
2018-03-25 12:00:00 -04:00
Petr Vorel
c0ce4ceaba Convert CONFIG_UBI_SILENCE_MSG to Kconfig
Signed-off-by: Petr Vorel <petr.vorel@gmail.com>
2018-03-24 06:37:25 +01:00
Petr Vorel
afb6fda2ae Convert CONFIG_UBIFS_SILENCE_MSG to Kconfig
Introduce another difference from upstream (kernel) source in
fs/ubifs/super.c: adding preprocessor condition as y variable in
mount_ubifs() depends on CONFIG_UBIFS_SILENCE_MSG:
fs/ubifs/super.c:1337:15: error: variable ?y? set but not used [-Werror=unused-but-set-variable]
  long long x, y;

Not setting CONFIG_UBIFS_SILENCE_MSG in am335x_igep003x_defconfig and
igep0032_defconfig. Although it was defined in their config headers, it
depends on CMD_UBIFS which is not set for them.

Signed-off-by: Petr Vorel <petr.vorel@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Heiko Schocher <hs@denx.de>
2018-03-24 06:37:10 +01:00
Petr Vorel
e995128158 ubifs: Reintroduce using CONFIG_UBIFS_SILENCE_MSG
Use of CONFIG_UBIFS_SILENCE_MSG was added in
147162dac6 ("ubi: ubifs: Turn off verbose prints")

Then it was removed in
ff94bc40af ("mtd, ubi, ubifs: resync with Linux-3.14")

Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Heiko Schocher <hs@denx.de>
Signed-off-by: Petr Vorel <petr.vorel@gmail.com>
2018-03-24 06:36:54 +01:00
Sjoerd Simons
63018a3edd omap3: spi: Correct ti, pindir-d0-out-d1-in parsing
The ti,pindir-d0-out-d1-in property is not expected to have a value
according to the device-tree binding, so treat it as a boolean not a
uint property.

Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-03-23 23:03:29 +05:30
Tom Rini
423effc04a Merge git://git.denx.de/u-boot-arc
Alexey:
 1. Significantly rework cache-related functionality.
    In particular that fixes coherency problems in some corner-cases,
    allows us to enable and disable caches in run-time and still
    have properly running system, finally support execution from
    real flash (before we used to run from DDR from the very beginning).

 2. Remove string routines implemented in assembly.
    That allows us to build and run U-Boot on wide range of ARC cores
    with different configurations. I.e. whatever tuning is used on GCC's
    command-line we'll get code for desired flavor of ARC.
    Otherwise for each and every corner-case we would need to add ifdefs
    in assembly code to accommodate missing instructions etc.

 3. Get use of GCC's garbage collector which helps to slim-down resulting image
    quite a bit.

 4. Also now we may disable U-Boot self-relocation for ARC if needed either
    by platform or for debugging purposes.
2018-03-23 09:31:24 -04:00
Eugeniy Paltsev
f665c14f04 ARC: bootm: Refactor GO and PREP subcommands implementation
Refactor GO and PREP subcommands implementation for a simpler
override in the boards platform code.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-03-23 15:57:51 +03:00
Michal Simek
8ae3d0b50c MAINTAINERS: Fix Zynq/ZynqMP and Microblaze fragments
Fix my fragments to list all files in the repo.

Also fix path to for Xilinx Zynq SoC (mach-zynq)
It should be the part of
"ARM: zynq: move SoC sources to mach-zynq"
(sha1: 0107f24036)

And cover dts files in board MAINTAINERS files.

Reported-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-23 09:36:15 +01:00
Michal Simek
d28baea078 tools: xilinx: Fix zynq/zynqmp image recognition
There is an issue to recognize zynq or zynqmp image because header
checking is just the same. That's why zynqmp images are recognized as
zynq one.
Check unused fields which are initialized to zero in zynq format
(__reserved1 0x38 and __reserved2 0x44) which are initialized for
zynqmp. This should ensure that images are properly recognized by:
./tools/mkimage -l spl/boot.bin

Also show image type as ZynqMP instead of Zynq which is confusing.

Reported-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Tested-by: Alexander Graf <agraf@suse.de>
2018-03-23 09:36:15 +01:00
Siva Durga Prasad Paladugu
c436bf92f6 arm64: zynqmp: Add support for verifying secure images
This patch adds new command "zynqmp" to handle zynqmp
specific commands like "zynqmp secure". This secure command is
used for verifying zynqmp specific secure images. The secure
image can either be authenticated or encrypted or both encrypted
and authenticated. The secure image is prepared using bootgen
and will be in xilinx specific BOOT.BIN format. The optional
key can be used for decryption of encrypted image if user
key was specified while creation BOOT.BIN.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-23 09:36:15 +01:00
Michal Simek
348dbf4368 arm64: zynqmp: Remove ep108 board
ZynqMP Emulation board is no longer tested and there is no reason to
keep maintaining it.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-23 09:34:59 +01:00
Siva Durga Prasad Paladugu
83bf2ff03d arm64: zynqmp: Correct EG/EV part detection logic
The vcu disable bit in efuse ipdisable register is valid only
if PL powered up so, consider PL powerup status for determing
EG/EV part. If PL is not powered up, ignore EG/EV part of string.
The PL powerup status will be filled by pmufw based on PL PROGB
status in the 9th bit of version field.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-23 09:34:44 +01:00
Vipul Kumar
a79b590f78 arm64: zynqmp: Print the value of pl clocks and wdt clock using clk dump
This patch print pl clocks (pl0...pl3) and watchdog
clock using clk dump.

Signed-off-by: Vipul Kumar <vipulk@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-23 09:34:44 +01:00
Vipul Kumar
2453c69518 arm64: zynqmp: nand: Fixed NAND erase issue for size 1GiB or more
NAND erase was not happening for size 1GiB or more. Erase
command was executing successfully but in actual, it was not
erasing.
This patch fixed erase issue for 1 GiB or more size nand.

Signed-off-by: Vipul Kumar <vipulk@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-23 09:34:44 +01:00
Michal Simek
2950e0b5a6 arm: zynq: Remove OF_EMBED configuration for zc770 xm011 x16
Use appended dtb which is default option for zynq boards.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-23 09:34:44 +01:00
Michal Simek
a587b501fa arm: zynq: Setup the same bootcommand as for zc770 xm011 x8
The same command should be used for x16 configuration.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-23 09:34:44 +01:00
Vipul Kumar
fce0a6b521 arm64: zynqmp: Changed scratch address used by the alternate memory test
This patch changed CONFIG_SYS_MEMTEST_SCRATCH address to the
accessible DDR address used by alternate memory test.
Before this, 0xfffc0000 address was used, which is the OCM
address and not enabled in MMU table. So, whenever trying
to access 0xfffc0000 address, got Synchronous Abort exception.

After changing CONFIG_SYS_MEMTEST_SCRATCH address, alternate
memory test is working fine.

Signed-off-by: Vipul Kumar <vipulk@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-23 09:34:44 +01:00
Michal Simek
f5e2943b8b arm: zynq: Enable cadence driver on zc706
Enable watchdog with reset-on-timeout feature.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-23 09:34:43 +01:00
Michal Simek
e6cc3b25d7 arm: zynq: Wire watchdog internals
Watchdog is only enabled in full u-boot. Adoption for SPL should be also
done because that's the right place where watchdog should be enabled.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-23 09:34:43 +01:00
Shreenidhi Shedi
42537ca4c8 watchdog: Add Cadence watchdog driver
This IP can be found on Zynq and ZynqMP devices.
The driver was tested with reset-on-timeout; feature.

Also adding WATCHDOG symbol to Kconfig because it is required.

Signed-off-by: Shreenidhi Shedi <imshedi@gmail.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-23 09:34:43 +01:00
Michal Simek
58afff43e3 clk: zynq: Show watchdog clock rate properly
watchdog clock is also connected to cpu 1X clocksource.

Zynq> clk dump
...

Before:
      swdt          4294967290
After:
      swdt           111111110

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-23 09:34:43 +01:00
Michal Simek
1cf6cac4d1 arm64: zynqmp: Enable newer pmufw versions
As of now newer pmufw is keeping old interfaces. That's why permit
u-boot to run on newer version. Recommended version will be setup later.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-23 09:34:43 +01:00
Siva Durga Prasad Paladugu
d77081cf50 net: zynq_gem: Dont run any phy detection logic for GMII case
This patch bypasses phy detection logic for GMII interface
and just depend on phy address received from DT. This patch
is required as phy detection logic is different for some phys
like xilinx phy which can be connected over SGMII and GMII
interface.
This fixes the issue of ethernet failures when xilinx phy is
connected over GMII interface.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-03-23 09:34:42 +01:00
Nitin Jain
51916864b3 arm64: zynqmp: Add support to load an app at EL1
This patch is adding support to switch to EL1 while loading an EL1
application with u-boot running at EL above EL1 in aarch64 mode.

Signed-off-by: Nitin Jain <nitinj@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-23 09:34:42 +01:00
Siva Durga Prasad Paladugu
429f0b9e14 arm: zynq: Enable debug uart on Zedboard
It helps with debugging.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-23 09:34:42 +01:00
Michal Simek
12e6c06921 arm64: zynqmp: Enable ethernet driver for zc1751-dc5
Enable missing driver on this board.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-23 09:34:42 +01:00
Michal Simek
cda1e3fb0f fpga: Simplify error path in fpga_add
Check !desc earlier to simplify code.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
Reviewed-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
2018-03-23 09:34:42 +01:00
Michal Simek
734bf172e9 xilinx: Sync defconfigs with latest Kconfig updates
Make defconfigs up2date with current location.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-23 09:34:00 +01:00
Michal Simek
ee4983f73a arm64: zynqmp: Convert board to use zynqmp-clk driver
Use zynqmp clock driver instead of fixed clocks.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-23 09:30:44 +01:00
Heinrich Schuchardt
d45c2f392e i2c: lpi2c: remove superfluous assignments
In

	lpi2c_status_t result = A;
	result = B;

the first assignment has no effect. Let's remove it.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-03-23 08:28:49 +01:00
Tom Rini
b0af10443a Merge git://git.denx.de/u-boot-net 2018-03-22 16:35:43 -04:00
Lokesh Vutla
d6d8c4d4cc configs: omapl138: Enable DM and DT
Enable Driver Model and Device-tree support for omapl138 board
in U-Boot. Also enable DM_SERIAL and DM_I2C.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-03-22 16:32:31 -04:00
Lokesh Vutla
459353d43a ARM: dts: da850-lcdk: Sync from Linux 4.16
Sync dts from Linux 4.16 and also add u-boot specific
dtsi for OMAPl138 board.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-03-22 16:32:31 -04:00
Lokesh Vutla
891ab74b1f davinci: Enable DDR_INIT for DA8XX
Commit 6aa4ad8e38 ("Convert CONFIG_SOC_DA8XX et al to Kconfig")
converted SOC_DA8XX to Kconfig but missed enabling DDR_INIT for
SOC_DA8XX, which broke OMAPL138 to boot.

Commit 2e87980580 ("davinci: Fix omapl138_lcdk builds") disabled
DDR_INIT for all DA850 SoCs. This failed all DA850 boards to boot
as ddr is not being initialized.

Enable SYS_DA850_DDR_INIT for DA8XX so that all DA850 and OMAPL138
will have ddr initialized

Fixes: 2e87980580 ("davinci: Fix omapl138_lcdk builds")
Fixes: 6aa4ad8e38 ("Convert CONFIG_SOC_DA8XX et al to Kconfig")
Reported-by: Sekhar Nori <nsekhar@ti.com>
Tested-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: David Lechner <david@lechnology.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-03-22 16:32:31 -04:00
Faiz Abbas
5bd1facf5f configs: am335x_evm: Increase SPL_SYS_MALLOC_F_LEN to accomodate gpio_devices
With gpio devices getting created in SPL, the size of the heap is
no longer sufficient. Therefore, increase SPL_SYS_MALLOC_F_LEN
to 0x1000.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-03-22 16:32:31 -04:00
Faiz Abbas
8e14ba7bd5 gpio: omap_gpio: Add DM_FLAG_PRE_RELOC flag
With DM enabled in SPL, DM_FLAG_PRE_RELOC is required for
the omap_gpio driver to be bound to the gpio devices.

Therefore, add DM_FLAG_PRE_RELOC flag to the omap_gpio driver.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-03-22 16:32:30 -04:00
Luca Ceresoli
f69dce5081 scripts/check-config.sh: fix "command not found" error handling
scripts/check-config.sh exits successfully and silently without doing
any checks when the 'comm' command is not found.

The problem triggers from the command around line 39:

  comm -23 ${suspects} ${ok} >${new_adhoc}

This statement fails when 'comm' is not in $PATH, creating an empty
${new_adhoc} file. But the script continues and the following line,
which is supposed to detect an error:

  if [ -s ${new_adhoc} ]; then

will always be false since the file is empty, and the script will exit
successfully as if everything were OK.

The case where 'comm' in not in $PATH is not theoretical. It used to
happen on yocto until a recent fix [0], and still happens on the
current stable branch (rocko).

Fix by setting the errexit flag to exit with error when a statement
fails, so that at least the problem is noticed.

For additional safety also set the nounset flag to detect expansion
errors.

[0] http://git.yoctoproject.org/cgit/cgit.cgi/poky/commit/?id=fe0b4cb5b48580d4a3f3c0eb82bfa6f1b13801e4

Signed-off-by: Luca Ceresoli <luca@lucaceresoli.net>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-03-22 16:32:30 -04:00
David Lechner
dc73483a12 davinci: omapl138_lcdk: fix PLL0 frequency
commit 1601dd97ed ("davinci: omapl138_lcdk: increase PLL0 frequency")
changed the PLL0 frequency to 456MHz, which is needed for the LCDC IP
block. However, in doing so, it caused the PLLOUT clock to be outside
of the allowable specifications given in the OMAP-L138 data sheet. (It
says PLLOUT must be 600MHz max). It also uses a PLLM value outside of
the range given in the TRM (it says PLLM must in the range 0 to 0x1f).

So here is what we have currently:

PLLOUT = 24 / (0 + 1) * (37 + 1) = 912MHz (out of spec)
         ^     ^         ^
       CLKIN PREDIV    PLLM (out of spec)

input to PLLDIVn = 912 / (1 + 1) = 456MHz (desired result)
                    ^     ^
                 PLLOUT POSTDIV

This changes the PLLM value to 18 and the POSTDIV value to 0 so that
PLLOUT is now within specification but we still get the desired
result.

PLLOUT = 24 / (0 + 1) * (18 + 1) = 456MHz (within spec)
         ^     ^         ^
       CLKIN PREDIV     PLLM

input to PLLDIVn = 456 / (0 + 1) = 456MHz (desired result)
                    ^     ^
                 PLLOUT POSTDIV

Fixes: 1601dd97ed ("davinci: omapl138_lcdk: increase PLL0 frequency")
Signed-off-by: David Lechner <david@lechnology.com>
Reported-by: Sekhar Nori <nsekhar@ti.com>
Tested-by: Sekhar Nori <nsekhar@ti.com>
2018-03-22 16:32:24 -04:00
Liam Beguin
7f9b50a27c test/py: add spi_flash tests
Add basic tests for the spi_flash subsystem.

Signed-off-by: Liam Beguin <liambeguin@gmail.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
2018-03-22 16:32:20 -04:00
Tuomas Tynkkynen
d04791dfa5 net: Drop CONFIG_ENC28J60
Last user of this driver went away in October 2014 in
commit d58a9451e7 ("ppc/arm: zap EMK boards").

Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-03-22 15:05:32 -05:00
Heinrich Schuchardt
6cdf072d9e net: macb: remove superfluous logical constraint
In

	if (a > =0) {...}
	else (a < 0) {...}

the second logical constraint is superfluous.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-03-22 15:05:32 -05:00
Heinrich Schuchardt
4b23d3c864 drivers: net: cpsw: remove superfluous assignment.
In

	int ret = A;
	ret = B;

the first assignment has not effect.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-03-22 15:05:32 -05:00
Alexander Graf
f24534307e lan7xxx: Require phylib
The lan75xx and lan78xx drivers need to drive their phy via the generic
phylib framework. Let's reflect that dependency in Kconfig, so that we
don't get build errors when phylib does not get selected.

Signed-off-by: Alexander Graf <agraf@suse.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-03-22 15:05:31 -05:00
Alexander Graf
a532e2f2e5 net: Only access network devices after init
In the efi_loader main loop we call eth_rx() occasionally. This rx function
might end up calling into devices that haven't been initialized yet,
potentially resulting in a lot of transfer timeouts.

Instead, let's make sure the ethernet device is actually initialized before
reading from or writing to it.

Signed-off-by: Alexander Graf <agraf@suse.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-03-22 15:05:31 -05:00
Leonid Iziumtsev
17d413b253 net: Fix netretry condition
The "net_try_count" counter starts from "1".
And the "retrycnt" contains requested amount of retries.

With current logic, that means that the actual retry amount
will be one time less then what we set in "netretry" env.
For example setting "netretry" to "once" will make "retrycnt"
equal "1", so no retries will be triggered at all.

Fix the logic by changing the statement of "if" condition.

Signed-off-by: Leonid Iziumtsev <leonid.iziumtsev@se.atlascopco.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-03-22 15:05:31 -05:00
Priyanka Jain
b321c44ac9 net/phy/cortina: Add No firmware upload option
Current Cortina phy driver assumes that firmware upload
is required during initialization and is dependent
on presence of corresponding macros like CONFIG_CORTINA_FW_ADDR
for compilation.

But Cortina phy has provision to store phy firmware in
attached dedicated EEPROM. And boards designed with such
EEPROM does not require firmware upload.

Add CORTINA_NO_FW_UPLOAD option in cortina.c to support
such boards.

Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-03-22 15:05:31 -05:00
Priyanka Jain
af5484acb0 net/phy/cortina.c: Update get_phy_id implementation
Update get_phy_id() implementation in cortina.c to check
for Cortina_phy by comparing device phy_id with cortina phy_id
instead of relying on presence of CORTINA macros.

This will allow get_phy_id to work with non-cortina phy devices
which might have same phy address as Cortina device but on
different  bus.

Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-03-22 15:05:31 -05:00
Calvin Johnson
a802d1e268 configs: ls1012a: add pfe configuration for LS1012A
Add configurations for PFE.

Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-03-22 15:05:31 -05:00
Calvin Johnson
ac0ba47b9c armv8: layerscape: csu: enable ns access to PFE registers
Enable all types of non-secure access to PFE block registers.

Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-03-22 15:05:30 -05:00
Calvin Johnson
c4dc68b02f armv8: fsl-lsch2: configure pfe's DDR and HDBUS interfaces and ECC
1. Set AWCACHE0 attribute of PFE DDR and HDBUS master interfaces
to bufferable.
2. Set RD/WR QoS for PFE DDR and HDBUS AXI master interfaces.
3. Disable ECC detection for PFE.

Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-03-22 15:05:30 -05:00
Calvin Johnson
c44f8125bc armv8: fsl-lsch2: add pfe macros and update ccsr_scfg structure
SoC specific PFE macros are defined and structure ccsr_scfg
is updated with members defined for PFE.

Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-03-22 15:05:30 -05:00
Calvin Johnson
28e3c39e53 board: freescale: ls1012a2g5rdb: enable network support on ls1012a2g5rdb
This patch enables ethernet support for ls1012a2g5rdb.

Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-03-22 15:05:30 -05:00
Calvin Johnson
7ab16479e1 board: freescale: ls1012ardb: enable network support on ls1012ardb
This patch enables ethernet support for ls1012ardb.

Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-03-22 15:05:30 -05:00
Calvin Johnson
a141f33af5 board: freescale: ls1012afrdm: enable network support on ls1012afrdm
This patch enables ethernet support for ls1012afrdm.

Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-03-22 15:05:29 -05:00
Calvin Johnson
7a8df8ba33 board: freescale: ls1012aqds: enable network support on ls1012aqds
This patch enables ethernet support for ls1012aqds.

Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-03-22 15:05:29 -05:00
Calvin Johnson
cf4c34486d drivers: net: pfe_eth: LS1012A PFE headers
Contains all the pfe header files.

Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-03-22 15:05:28 -05:00
Calvin Johnson
6281a769b3 drivers: net: pfe_eth: provide pfe commands
pfe_command provides command line support for several features that
support pfe, like starting or stopping the pfe, checking the health
of the processor engines and checking status of different units inside
pfe.

Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-03-22 15:05:28 -05:00
Calvin Johnson
a4a4043749 drivers: net: pfe_eth: LS1012A PFE driver introduction
This patch adds PFE driver to U-Boot

Following are the main driver files:-
pfe_hw.c: provides low level helper functions to initialize PFE
internal processor engines and other hardware blocks
pfe_driver.c: provides initialization functions
and packet send and receive functions
pfe_eth.c: provides high level gemac initialization functions
pfe_firmware.c: provides functions to load firmware into PFE
internal processor engines.
pfe_mdio.c: provides functions to initialize phy and mdio.

Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-03-22 15:05:28 -05:00
Prabhakar Kushwaha
6b1373f245 armv8: fsl-layerscape: Add support of GPIO structure
Layerscape Gen2 SoC supports GPIO registers to control GPIO
signals. Adding support of GPIO structure to access GPIO
registers.

Signed-off-by: Pratiyush Srivastava <pratiyush.srivastava@nxp.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-03-22 15:05:28 -05:00
Calvin Johnson
365108ef52 drivers: net: phy: Fix aquantia compilation with DM
With CONFIG_DM_ETH enabled, aquantia driver compilation fails with
below error. This patch fixes the issue by including dm.h.

drivers/net/phy/aquantia.c: In function ‘aquantia_startup’:
drivers/net/phy/aquantia.c:73:21: error: dereferencing pointer to
incomplete
type ‘struct udevice’
          phydev->dev->name);
		     ^~

Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-03-22 15:05:28 -05:00
Heinrich Schuchardt
b24b1e4b1d net: mvpp2x: add check after calloc
After allocating plat the pointer is checked.
Afterwards name is allocated and not checked.

Add the missing check to avoid a possible NULL dereference.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-03-22 15:05:28 -05:00
kevans@FreeBSD.org
dfa1a74045 Configs: Use the newly added PHY_RTL8211E_PINE64_GIGABIT_FIX
The Pine64+ uses a generic PHY driver, so flip it over to using the
Realtek PHY driver to actually apply the RTL8211e fix.

Signed-off-by: Kyle Evans <kevans@FreeBSD.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-03-22 15:05:27 -05:00
kevans@FreeBSD.org
66526e7038 net: phy: Add PHY_RTL8211E_PINE64_GIGABIT_FIX for realtek phys
Setting PHY_RTL8211E_PINE64_GIGABIT_FIX forces internal rx/tx delays off
on the PHY, as well as flipping some magical undocumented bits. The
magic number comes from the Pine64 engineering team, presumably as a
proxy from Realtek. This configuration fixes the throughput on some
Pine64 models. Packet loss of up to 60-70% has been observed without
this.

Signed-off-by: Kyle Evans <kevans@FreeBSD.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-03-22 15:05:27 -05:00
Eugeniy Paltsev
4b5f6c52e7 DW SPI: use 32 bit access instead of 16 and 32 bit mix
Current DW SPI driver uses 32 bit access for some registers and
16 bit access for others. So if DW SPI IP is connected via bus
which doesn't support 16 bit access we will get bus error.

Fix that by switching to 32 bit access only instead of 16 and 32 bit mix

Additional Documentation to Support this Change:
The DW_apb_ssi databook states:
"All registers in the DW_apb_ssi are addressed at 32-bit boundaries
to remain consistent with the AHB bus. Where the physical size of
any register is less than 32-bits wide, the upper unused bits of
the 32-bit boundary are reserved. Writing to these bits has no
effect; reading from these bits returns 0." [1]

[1] Section 6.1 of dw_apb_ssi.pdf (version 3.22a)

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-03-22 23:01:35 +05:30
Eugeniy Paltsev
bcdcb3e61e DW SPI: add option to use external gpio for chip select
DW SPI internal chip select management has limitation:
it hold CS line in active state only when the FIFO is not
empty. If the FIFO freed before we add new data the SPI transaction will
be broken.

So add option to use external gpio for chip select. Gpio can be added
via device tree using standard gpio bindings.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-03-22 23:01:35 +05:30
Eugeniy Paltsev
d3d8aaec74 DW SPI: refactor poll_transfer functions
There is no sense in waiting for RX data in dw_reader function:
there is no chance that RX data will appear in RX FIFO if
RX FIFO is empty after previous TX write in dw_writer function.
So get rid of this waiting. After that we can get rid of dw_reader
return value and make it returning void. After that we can get rid
of dw_reader return value check in poll_transfer function.

With these changes we're getting closer to Linux DW SPI driver.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-03-22 23:01:35 +05:30
Eugeniy Paltsev
fc282c7bcb DW SPI: fix transmit only mode
In current implementation we get -ETIMEDOUT error when we try to use
transmit only mode (SPI_TMOD_TO)
This happens because in transmit only mode input FIFO never gets any data
which breaks our logic in dw_reader(): we are waiting until RX data will be
ready in dw_reader, but this newer happens, so we return with error.

Fix that by using SPI_TMOD_TR instead of SPI_TMOD_TO which allows to use
RX FIFO.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-03-22 23:01:35 +05:30
Eugeniy Paltsev
c6b4f031d9 DW SPI: fix tx data loss on FIFO flush
In current implementation if some data still exists in Tx FIFO it
can be silently flushed, i.e. dropped on disabling of the controller,
which happens when writing 0 to DW_SPI_SSIENR (it happens in the
beginning of new transfer)

So add wait for current transmit operation to complete to be sure
that current transmit operation is finished before new one.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-03-22 23:01:35 +05:30
Liam Beguin
c3342cd58f test/py: add generic CRC32 function
Add a generic function which can be used to compute the CRC32 value of
a region of RAM.

Signed-off-by: Liam Beguin <liambeguin@gmail.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
2018-03-22 13:25:20 -04:00
Liam Beguin
64a2cebb6e test/py: do not import pytest multiple times
Signed-off-by: Liam Beguin <liambeguin@gmail.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
2018-03-22 13:25:20 -04:00
Liam Beguin
be91691d08 test/py: README: add HOSTNAME to PYTHONPATH
As opposed to PATH, HOSTNAME is not appended to PYTHONPATH
automatically. Lets add it to the examples to make it more
obvious to new users.

Signed-off-by: Liam Beguin <liambeguin@gmail.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
2018-03-22 13:25:20 -04:00
Liam Beguin
0e5dd786e9 test/py: README: fix typo
Fix a minor typo causing vim (and possibly other) to get confused with
coloring.

Signed-off-by: Liam Beguin <liambeguin@gmail.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
2018-03-22 13:25:20 -04:00
Liam Beguin
10f087f73f cmd: sf: fix map_physmem check
Make sure 0x00 is a valid address to read to. If `addr` is 0x00 then
map_physmem() will return 0 which should be a valid address.

Signed-off-by: Liam Beguin <liambeguin@gmail.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
2018-03-22 13:25:20 -04:00
Liam Beguin
aa1ced7f09 spi: spi_flash: do not fail silently on bad user input
Make sure the user is notified instead of silently returning an error.

Signed-off-by: Liam Beguin <liambeguin@gmail.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
2018-03-22 13:25:20 -04:00
Tuomas Tynkkynen
5473eb6d15 tools: Make kwboot build if HOST_TOOLS_ALL=y
The kwboot tool for Marvell devices isn't currently being built even if
HOST_TOOLS_ALL is set. It doesn't appear to depend on any CONFIG_
options, so it seems appropriate to enable building it here.

Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
2018-03-22 13:25:20 -04:00
Tom Rini
2511930193 Merge git://git.denx.de/u-boot-mips 2018-03-21 18:58:03 -04:00
Álvaro Fernández Rojas
358daa5b22 mips: bmips: add ar-5315 usb support
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2018-03-21 23:23:13 +01:00
Álvaro Fernández Rojas
ee1f79b738 mips: bmips: add support for bcm6318 usb
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2018-03-21 23:23:13 +01:00
Álvaro Fernández Rojas
8e948c6ff1 phy: add support for bcm6318 usbh phy
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-03-21 23:23:13 +01:00
Álvaro Fernández Rojas
485d2cd3d6 mips: bmips: add vr-3032u usb support
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2018-03-21 23:23:13 +01:00
Álvaro Fernández Rojas
35e03f0011 mips: bmips: add support for bcm63268 usb
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2018-03-21 23:23:13 +01:00
Álvaro Fernández Rojas
ddc5dc5a1b mips: bmips: add dgnd3700v2 usb support
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2018-03-21 23:23:13 +01:00
Álvaro Fernández Rojas
ad7f6ed41e mips: bmips: add support for bcm6362 usb
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2018-03-21 23:23:13 +01:00
Álvaro Fernández Rojas
56928dd570 mips: bmips: add ar-5387un usb support
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2018-03-21 23:23:13 +01:00
Álvaro Fernández Rojas
f94e360614 mips: bmips: add support for bcm6328 usb
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2018-03-21 23:23:13 +01:00
Álvaro Fernández Rojas
b8841ce18a mips: bmips: add wap-5813n usb support
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2018-03-21 23:23:13 +01:00
Álvaro Fernández Rojas
fc5cf3a0c7 mips: bmips: add support for bcm6368 usb
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2018-03-21 23:23:13 +01:00
Álvaro Fernández Rojas
f55c1538bf phy: add support for bcm6368 usbh phy
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-03-21 23:23:13 +01:00
Álvaro Fernández Rojas
e39f6c0b67 mips: bmips: add nb4-ser usb support
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2018-03-21 23:23:13 +01:00
Álvaro Fernández Rojas
465d6971e9 mips: bmips: add hg556a usb support
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2018-03-21 23:23:13 +01:00
Álvaro Fernández Rojas
e8dad2e739 mips: bmips: add support for bcm6358 usb
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2018-03-21 23:23:13 +01:00
Álvaro Fernández Rojas
190c36b975 phy: add support for bcm6358 usbh phy
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-03-21 23:23:13 +01:00
Álvaro Fernández Rojas
0975a61513 mips: bmips: add ct-5361 usb support
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2018-03-21 23:23:13 +01:00
Álvaro Fernández Rojas
d51aaf84cb mips: bmips: add support for bcm6348 usb
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2018-03-21 23:23:13 +01:00
Álvaro Fernández Rojas
bcb9b502d5 phy: add support for bcm6348 usbh phy
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-03-21 23:23:13 +01:00
Heinrich Schuchardt
dbf4b7669c mips: micronas/vct: check array bounds before access
If we check an index against array bounds, we should do so before
accessing the array and not afterwards.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-03-21 23:23:13 +01:00
Álvaro Fernández Rojas
d3611c991e mips: bmips: select OF_EMBED for all boards
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2018-03-21 23:23:13 +01:00
Álvaro Fernández Rojas
9d466f2fe1 MIPS: add BMIPS Netgear DGND3700v2 board
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2018-03-21 23:23:13 +01:00
Álvaro Fernández Rojas
8f240a3b45 MIPS: add support for Broadcom MIPS BCM6362 SoC family
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2018-03-21 23:23:13 +01:00
Álvaro Fernández Rojas
1b075ba016 dm: cpu: bmips: add BCM6362 support
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2018-03-21 23:23:13 +01:00
Eugeniy Paltsev
6b85b26e4b ARC: Cache: Refactor arc_ioc_setup()
Move all checks before cache flush and IOC setup.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-03-21 17:06:55 +03:00
Eugeniy Paltsev
9f0253c61a ARC: Cache: Add missing cache cleanup before cache disable
Add missing cache cleanup before cache disable:
 * Flush and invalidate L1 D$ before disabling. Flush and invalidate
   SLC before L1 D$ disabling (as it will be bypassed for data)
   Otherwise we can lose some data when we disable L1 D$ if this data
   isn't flushed to next level cache. Or we can get wrong data if L1 D$
   has some entries after enable which we modified when the L1 D$ was
   disabled.
 * Invalidate L1 I$ before disabling. Otherwise we can execute wrong
   instructions after L1 I$ enable if we modified any code when
   L1 I$ was disabled.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-03-21 17:06:55 +03:00
Eugeniy Paltsev
7241944a5b ARC: Cache: Add more HW configuration checks
Add additional cache configuration checks and note about
supported configurations.

It is unlikely to face some configuration in real life but
it's better to be prepared and refuse to work on those.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-03-21 17:06:55 +03:00
Eugeniy Paltsev
375945bac2 ARC: Implement a function to sync and cleanup caches
Implement specialized function to clenup caches (and therefore
sync instruction and data caches) which can be used for cleanup before linux
launch or to sync caches during U-Boot self-relocation.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-03-21 17:06:54 +03:00
Eugeniy Paltsev
95336738f1 ARC: Cache: Fix SLC operations when SLC is bypassed for data
If L1 D$ is disabled SLC is bypassed for data and all
load/store requests are sent directly to main memory.

If L1 I$ is disabled SLC is NOT bypassed for instructions
and all instruction requests are fetched through SLC.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-03-21 17:06:54 +03:00
Eugeniy Paltsev
c75eeb0bcb ARC: Cache: Implement [i,d]cache_enabled() as separate functions
Implement icache_enabled() and dcache_enabled() as separate functions
which can be used with "inline" attribute. This is a preparation to
make them always_inline.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-03-21 17:06:54 +03:00
Eugeniy Paltsev
48b04832d8 ARC: Move IOC enabling to compile-time options
Use CONFIG_ARC_DBG_IOC_ENABLE Kconfig option instead of
ioc_enable global variable.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-03-21 17:06:54 +03:00
Eugeniy Paltsev
246ba284ec ARC: Cache: Move PAE exists check into slc_upper_region_init()
Move check for PAE existence into slc_upper_region_init()
instead of its caller as more appropriate place.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-03-21 17:06:54 +03:00
Eugeniy Paltsev
bf8974eda4 ARC: Move cache global variables to arch_global_data
There is a problem with current implementation if we start U-Boot
from ROM, as we use global variables before ther initialization,
so these variables get overwritten when we copy .data section
from ROM.

Instead we move these global variables into our "global data"
structure so that we may really start from ROM.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-03-21 17:06:54 +03:00
Eugeniy Paltsev
7579087320 ARC: Cache: Get rid of [slc,pae,icache,dcache]_exists global variables
There is a problem with current implementation if we start U-Boot
from ROM, as we use global variables before ther initialization,
so these variables get overwritten when we copy .data section
from ROM.

Instead we'll use icache_exists(), dcache_exists(), slc_exists(), pae_exists()
functions which directly check BCRs every time.

In U-Boot case ops are used only during self-relocation and DMA
so we shouldn't be hit by noticeable performance degradation.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-03-21 17:06:54 +03:00
Eugeniy Paltsev
ea9f6f1e87 ARC: Cache: Move SLC status check into slc_entire_op() and slc_rgn_op()
As of today we check SLC status before each call of __slc_rgn_op()
or __slc_entire_op(). So move status check into __slc_rgn_op()
and __slc_entire_op().

As we need to check status before *each* function execution and we
call slc_entire_op() and slc_rgn_op() from different places we add
this check directly into SLC entire/line functions instead of
their callers to avoid code duplication.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-03-21 17:06:54 +03:00
Eugeniy Paltsev
05c6a26a04 ARC: Cache: Use is_isa_arcv2() instead of CONFIG_ISA_ARCV2 ifdef
Use is_isa_arcv2() function where it is possible instead of
CONFIG_ISA_ARCV2 define check to make code cleaner at the same time
keeping pretty much the same functionality - code in branches
under "if (is_isa_arcv2())" won't be compiled if CONFIG_ISA_ARCV2
is not defined, still we need a couple of CONFIG_ISA_ARCV2
ifdefs to make compiler happy. That's because code in
!is_isa_x() branch gets compiled and only then gets optimized
away.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-03-21 17:06:54 +03:00
Eugeniy Paltsev
c877a8911d ARC: Cache: Allways check D$ status before entire/line ops
As we are planning to get rid of dozens of ifdef's in cache.c we
would better check D$ status before each entire/line operation
then check CONFIG_SYS_DCACHE_OFF config option.

This makes the code cleaner as well as D$ entire/line functions
remain functional even if we enable or disable D$ in run-time.

As we need to check status before *each* function execution and we
call D$ entire/line functions from different places we add
this check directly into D$ entire/line functions instead of
their callers to avoid code duplication.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-03-21 17:06:54 +03:00
Eugeniy Paltsev
88ae27eda3 ARC: Move BCR encodings to separate header file
We're starting to use more and more BCRs and having their
definitions in-lined in sources becomes a bit annoying
so we move it all to a separate header.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-03-21 17:06:54 +03:00
Eugeniy Paltsev
a6f557c4e0 ARC: Cache: Move IOC initialization to a separate function
Move IOC initialization from cache_init() to a separate function.

This is the preparation for the next patch where we'll switch
to is_isa_arcv2() function usage instead of "CONFIG_ISA_ARCV2"
ifdef.

Also it makes cache_init function a bit cleaner.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-03-21 17:06:49 +03:00
Eugeniy Paltsev
c27814be33 ARC: Flush & invalidate D$ with a single command
We don't implement separate flush_dcache_all() intentionally as
entire data cache invalidation is dangerous operation even if we flush
data cache right before invalidation.

There is the real example:
We may get stuck in the following code if we store any context (like
BLINK register) on stack in invalidate_dcache_all() function.

BLINK register is the register where return address is automatically saved
when we do function call with instructions like 'bl'.

void flush_dcache_all() {
	__dc_entire_op(OP_FLUSH);
	// Other code //
}

void invalidate_dcache_all() {
	__dc_entire_op(OP_INV);
	// Other code //
}

void foo(void) {
	flush_dcache_all();
	invalidate_dcache_all();
}

Now let's see what really happens during that code execution:

foo()
  |->> call flush_dcache_all
  	[return address is saved to BLINK register]
  	[push BLINK] (save to stack)              ![point 1]
  	|->> call __dc_entire_op(OP_FLUSH)
  		[return address is saved to BLINK register]
  		[flush L1 D$]
  		return [jump to BLINK]
  	<<------
  	[other flush_dcache_all code]
  	[pop BLINK] (get from stack)
  	return [jump to BLINK]
  <<------
  |->> call invalidate_dcache_all
  	[return address is saved to BLINK register]
  	[push BLINK] (save to stack)               ![point 2]
  	|->> call __dc_entire_op(OP_FLUSH)
  		[return address is saved to BLINK register]
  		[invalidate L1 D$]                 ![point 3]
  		// Oops!!!
  		// We lose return address from invalidate_dcache_all function:
  		// we save it to stack and invalidate L1 D$ after that!
  		return [jump to BLINK]
  	<<------
  	[other invalidate_dcache_all code]
  	[pop BLINK] (get from stack)
  	// we don't have this data in L1 dcache as we invalidated it in [point 3]
  	// so we get it from next memory level (for example DDR memory)
  	// but in the memory we have value which we save in [point 1], which
  	// is return address from flush_dcache_all function (instead of
  	// address from current invalidate_dcache_all function which we
  	// saved in [point 2] !)
  	return [jump to BLINK]
  <<------
  // As BLINK points to invalidate_dcache_all, we call it again and
  // loop forever.

Fortunately we may do flush and invalidation of D$ with a single one
instruction which automatically mitigates a situation described above.

And because invalidate_dcache_all() isn't used in common U-Boot code we
implement "flush and invalidate dcache all" instead.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-03-21 17:06:49 +03:00
Eugeniy Paltsev
5e0c68edad ARC: Introduce is_isa_X() functions
Introduce is_isa_arcv2() and is_isa_arcompact() functions.

These functions only check configuration options and return
compile-time constant so they can be used instead of #ifdef's to
to write cleaner code.

Now we can write:
-------------->8---------------
if (is_isa_arcv2())
	ioc_configure();
-------------->8---------------
instead of:
-------------->8---------------
ifdef CONFIG_ISA_ARCV2
	ioc_configure();
endif
-------------->8---------------

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-03-21 17:06:49 +03:00
Eugeniy Paltsev
5d7a24d646 ARC: Cache: Add support for FLUSH_N_INV D$ operations
As of today __dc_line_op() and __dc_entire_op() support
only separate flush (OP_FLUSH) and invalidate (OP_INV) operations.

Add support of combined flush and invalidate (OP_FLUSH_N_INV)
operation which we planing to use in subsequent patches.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-03-21 17:06:44 +03:00
Eugeniy Paltsev
c4ef14d2cc ARC: Cache: Remove per-line I$ operations as unused
__cache_line_loop() function was copied from Linux kernel
where per-line instruction cache operations are really used.

In U-Boot we use only entire I$ ops, so we can drop support of
per-line I$ ops from __cache_line_loop() because __cache_line_loop()
is never called with OP_INV_IC parameter.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-03-21 17:06:37 +03:00
Eugeniy Paltsev
16aeee81d9 ARC: Cache: Move I$ entire operation to a separate function
Move instruction cache entire operation to a separate function
because we are planing to use it in other places like
sync_icache_dcache_all().

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-03-21 17:06:29 +03:00
Alexey Brodkin
71621525c3 arc: Fine-tune implementation of memory barriers
We improve on 2 things:
 1. Only ARC HS family has "dmb" instructions so do compile-time
    check for automatically defined macro __ARCHS__.
    Previous check for ARCv2 ISA was not good enough because ARC EM
    family is v2 ISA as well but still "dmb" instaruction is not
    supported in EM family.

 2. Still if there's no dedicated instruction for memory barrier
    let's at least insert compile-time barrier to make sure
    compiler deosn't reorder critical memory operations.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-03-21 16:21:34 +03:00
Alexey Brodkin
264d298fda arc: Introduce a possibility to not relocate U-boot
Disabling relocation might be useful on ARC for 2 reasons:
 a) For advanced debugging with Synopsys proprietary MetaWare debugger
    which is capable of accessing much more specific hardware resources
    compared to gdb. For example it may show contents of L1 and L2 caches,
    internal states of some hardware blocks etc.

    But on the downside MetaWare debugger still cannot work with PIE.
    Even though that limitation could be work-arounded with change of ELF's
    header and stripping down all debug info but with it we won't have
    debug info for source-level debugging which is quite inconvenient.

 b) Some platforms which might benefit from usage of U-Boot basically
    don't have enough RAM to accommodate relocation of U-Boot so we
    keep code in flash and use as much of RAM as possible for more
    interesting things.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: York Sun <york.sun@nxp.com>
Cc: Stefan Roese <sr@denx.de>
2018-03-21 16:21:34 +03:00
Alexey Brodkin
fac4790491 arc: Eliminate unused code and data with GCC's garbage collector
Finally GCC's garbage collector works on ARC so let's use it.
That's what I may see for HSDK:

Before:
   text	   data	    bss	    dec	    hex	filename
 290153	  10068	 222616	 522837	  7fa55	u-boot

After:
   text	   data	    bss	    dec	    hex	filename
 261999	   9460	 222360	 493819	  788fb	u-boot

Overall ~5% of memory footprint saved.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-03-21 16:21:34 +03:00
Alexey Brodkin
0a097ba54b arc: Don't halt slaves
This commit basically reverts two commits:
 1. cf628f772e ("arc: arcv1: Disable master/slave check")
 2. 6cba327bd9 ("arcv2: Halt non-master cores")

With mentioned commits in-place we experience more trouble than
benefits. In case of SMP Linux kernel this is really required as
we have all the cores running from the very beginning and then we
need to allow master core to do some preparatory work while slaves
are not getting in the way.

In case of U-Boot we:
 a) Don't really run more than 1 core in parallel
 b) We may use whatever core for that

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-03-21 16:21:34 +03:00
Alexey Brodkin
2178817c4a arc: Get rid of handwritten string routines
U-Boot is a bit special piese of software because it is being
only executed once on power-on as compared to operating system
for example. That's why we don't care much about performance
optimizations instead we're more concerned about size. And up-to-date
compilers might produce much smaller code compared to
performance-optimized routines copy-pasted from the Linux kernel.

Here's an example:
------------------------------->8--------------------------
--- size_asm_strings.txt
+++ size_c_strings.txt
@@ -1,2 +1,2 @@
    text	   data	    bss	    dec	    hex	filename
- 121260	   3784	   3308	 128352	  1f560	u-boot
+ 120448	   3784	   3308	 127540	  1f234	u-boot
------------------------------->8--------------------------

See we were able to shave off ~800 bytes of .text section.

Also usage of string routines implemented in C gives us an ability
to support more HW flavors for free: generated instructions will match
our target as long as correct compiler option is used.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-03-21 16:21:34 +03:00
Tom Rini
9c0e2f6ed3 Merge git://git.denx.de/u-boot-fsl-qoriq 2018-03-20 18:39:27 -04:00
Vinitha V Pillai
3386c73d46 LS2088ARDB: Secure Boot: Fix fall back option failure
Fix NOR, SD and QSPI fallback option in case of secure boot failure.

Signed-off-by: Vinitha V Pillai <vinitha.pillai@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-03-20 08:30:52 -07:00
Ashish Kumar
c1c597e8a8 armv8: ls1088aqds: Add IFC-NOR as boot source for LS1088
IFC-NOR and QSPI-NOR pins are multiplexed on SoC, so they cannot be
accessed simultaneously. IFC-NOR can be accessed along with SD-BOOT.

Ls1088aqds_sdcard_ifc_defconfig is default config for SD boot and
IFC-NOR to be used as flash. This allows writing to IFC-NOR flash.
QSPI and DSPI cannot be accessed in this defconfig.
IFC-NOR image is generated using ls1088aqds_defconfig.

Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-03-20 08:27:13 -07:00
Ashish Kumar
169d493bb7 armv8: ls1088a: Add i2c_early_init() func for LS1088AQDS
This function is required for enabling access to early i2c function
for correct usage of QIXIS_READ and QIXIS_WRITE.

Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-03-20 08:26:52 -07:00
Ashish Kumar
d12b166a00 armv8: ls1088a: Add clock related function in CONFIG_SPL_BUILD
get_board_ddr_clk(), get_board_sys_clk() and if_board_diff_clk() is
now available for SPL build.

Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-03-20 08:26:02 -07:00
Ashish Kumar
b555e293b3 armv8: ls1088qds: Remove CONFIG_ from local defines for FPGA
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-03-20 08:25:34 -07:00
Tom Rini
da773532cd Merge git://git.denx.de/u-boot-usb 2018-03-19 20:10:15 -04:00
Tom Rini
c17848a798 Merge git://git.denx.de/u-boot-sunxi 2018-03-19 18:39:14 -04:00
Bryan O'Donoghue
c225e7cf54 bootm: optee: Add a bootm command for type IH_OS_TEE
This patch makes it possible to verify the contents and location of an
OPTEE image in DRAM prior to handing off control to that image. If image
verification fails we won't try to boot any further.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Suggested-by: Andrew F. Davis <afd@ti.com>
Cc: Harinarayan Bhatta <harinarayan@ti.com>
Cc: Andrew F. Davis <afd@ti.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Kever Yang <kever.yang@rock-chips.com>
Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Cc: Peng Fan <peng.fan@nxp.com>
2018-03-19 16:14:25 -04:00
Bryan O'Donoghue
45b55712d4 image: Add IH_OS_TEE for TEE chain-load boot
This patch adds a new type IH_OS_TEE. This new OS type will be used for
chain-loading to Linux via a TEE.

With this patch in-place you can generate a bootable OPTEE image like this:

mkimage -A arm -T kernel -O tee -C none -d tee.bin uTee.optee

where "tee.bin" is the input binary prefixed with an OPTEE header and
uTee.optee is the output prefixed with a u-boot wrapper header.

This image type "-T kernel -O tee" is differentiated from the existing
IH_TYPE_TEE "-T tee" in that the IH_TYPE is installed by u-boot (flow
control returns to u-boot) whereas for the new IH_OS_TEE control passes to
the OPTEE firmware and the firmware chainloads onto Linux.

Andrew Davis gave the following ASCII diagram:

IH_OS_TEE: (mkimage -T kernel -O tee)
Non-Secure       Secure

                 BootROM
                   |
      -------------
     |
     v
    SPL
     |
     v
   U-Boot ------>
          <-----  OP-TEE
      |
      V
    Linux

IH_TYPE_TEE: (mkimage -T tee)
Non-Secure       Secure

                 BootROM
                   |
      -------------
     |
     v
    SPL ------->
         <-----  OP-TEE
     |
     v
   U-Boot
      |
      V
    Linux

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Suggested-by: Andrew F. Davis <afd@ti.com>
Cc: Harinarayan Bhatta <harinarayan@ti.com>
Cc: Andrew F. Davis <afd@ti.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Kever Yang <kever.yang@rock-chips.com>
Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Cc: Peng Fan <peng.fan@nxp.com>
Link: http://mrvan.github.io/optee-imx6ul
2018-03-19 16:14:25 -04:00
Bryan O'Donoghue
6ffc420045 optee: Add error printout
When encountering an error in OPTEE verification print out various details
of the OPTEE header to aid in further debugging of encountered errors.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Harinarayan Bhatta <harinarayan@ti.com>
Cc: Andrew F. Davis <afd@ti.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Kever Yang <kever.yang@rock-chips.com>
Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Cc: Peng Fan <peng.fan@nxp.com>
Tested-by: Peng Fan <peng.fan@nxp.com>
2018-03-19 16:14:25 -04:00
Bryan O'Donoghue
c5a6e8bd00 optee: Add optee_verify_bootm_image()
This patch adds optee_verify_bootm_image() which will be subsequently used
to verify the parameters encoded in the OPTEE header match the memory
allocated to the OPTEE region, OPTEE header magic and version prior to
handing off control to the OPTEE image.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Harinarayan Bhatta <harinarayan@ti.com>
Cc: Andrew F. Davis <afd@ti.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Kever Yang <kever.yang@rock-chips.com>
Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Cc: Peng Fan <peng.fan@nxp.com>
2018-03-19 16:14:24 -04:00
Bryan O'Donoghue
dd5a12e287 optee: Add optee_image_get_load_addr()
This patch adds optee_image_get_load_addr() a helper function used to
calculate the load-address of an OPTEE image based on the lower
entry-point address given in the OPTEE header.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Harinarayan Bhatta <harinarayan@ti.com>
Cc: Andrew F. Davis <afd@ti.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Kever Yang <kever.yang@rock-chips.com>
Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Cc: Peng Fan <peng.fan@nxp.com>
Tested-by: Peng Fan <peng.fan@nxp.com>
2018-03-19 16:14:24 -04:00
Bryan O'Donoghue
f79443684b optee: Add optee_image_get_entry_point()
Add a helper function for extracting the least significant 32 bits from the
OPTEE entry point address, which will be good enough to load OPTEE binaries
up to (2^32)-1 bytes.

We may need to extend this out later on but for now (2^32)-1 should be
fine.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Harinarayan Bhatta <harinarayan@ti.com>
Cc: Andrew F. Davis <afd@ti.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Kever Yang <kever.yang@rock-chips.com>
Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Cc: Peng Fan <peng.fan@nxp.com>
Tested-by: Peng Fan <peng.fan@nxp.com>
2018-03-19 16:14:24 -04:00
Bryan O'Donoghue
f25006b96e optee: Add CONFIG_OPTEE_LOAD_ADDR
CONFIG_OPTEE_LOAD_ADDR is used to tell u-boot where to load the OPTEE
binary into memory prior to handing off control to OPTEE.

We need to pull this value out of u-boot in order to produce an IMX IVT/CSF
signed pair for the purposes of secure boot. The best way to do that is to
have CONFIG_OPTEE_LOAD_ADDR appear in u-boot.cfg.

Adding new CONFIG entires to u-boot should be kconfig driven so this patch
does just that.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Reviewed-by: Ryan Harkin <ryan.harkin@linaro.org>
2018-03-19 16:14:24 -04:00
Bryan O'Donoghue
35499baf3b optee: Add CONFIG_OPTEE_TZDRAM_BASE
OPTEE is currently linked to a specific area of memory called the TrustZone
DRAM. This patch adds a CONFIG entry for the default address of TrustZone
DRAM that a board-port can over-ride. The region that U-Boot sets aside for
the OPTEE run-time should be verified before attempting to hand off to the
OPTEE run-time. Each board-port should carefully ensure that the TZDRAM
address specified in the OPTEE build and the TZDRAM address specified in
U-Boot match-up.

Further patches will use TZDRAM address with other defines and variables to
carry out a degree of automated verification in U-Boot prior to trying to
boot an OPTEE image.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Harinarayan Bhatta <harinarayan@ti.com>
Cc: Andrew F. Davis <afd@ti.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Kever Yang <kever.yang@rock-chips.com>
Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-19 16:14:24 -04:00
Bryan O'Donoghue
d89a5aa6d0 optee: Add CONFIG_OPTEE_TZDRAM_SIZE
OPTEE is currently linked to a specific area of memory called the TrustZone
DRAM. This patch adds a CONFIG entry for the default size of TrustZone DRAM
that a board-port can over-ride. The region that U-Boot sets aside for the
OPTEE run-time should be verified before attempting to hand off to the
OPTEE run-time. Each board-port should carefully ensure that the TZDRAM
size specified in the OPTEE build and the TZDRAM size specified in U-Boot
match-up.

Further patches will use TZDRAM size with other defines and variables to
carry out a degree of automated verification in U-Boot prior to trying to
boot an OPTEE image.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Harinarayan Bhatta <harinarayan@ti.com>
Cc: Andrew F. Davis <afd@ti.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Kever Yang <kever.yang@rock-chips.com>
Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Cc: Peng Fan <peng.fan@nxp.com>
Tested-by: Peng Fan <peng.fan@nxp.com>
2018-03-19 16:14:23 -04:00
Bryan O'Donoghue
32ce6179fb optee: Add lib entries for sharing OPTEE code across ports
This patch adds code to lib to enable sharing of useful OPTEE code between
board-ports and architectures. The code on lib/optee/optee.c comes from the
TI omap2 port. Eventually the OMAP2 code will be patched to include the
shared code. The intention here is to add more useful OPTEE specific code
as more functionality gets added.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Harinarayan Bhatta <harinarayan@ti.com>
Cc: Andrew F. Davis <afd@ti.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Kever Yang <kever.yang@rock-chips.com>
Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Cc: Peng Fan <peng.fan@nxp.com>
Tested-by: Peng Fan <peng.fan@nxp.com>
2018-03-19 16:14:23 -04:00
Stefan Roese
5cf32518ea MAINTAINERS: Remove unused ppc4xx entry
ppc4xx support was removed some time ago. Lets remove the now unused
entry in MAINTAINERS as well.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-03-19 16:14:23 -04:00
Stefan Roese
ed68ccbf42 pci: Remove unused ppc4xx variable from struct pci_controller
ppc4xx support was removed some time ago. Lets remove the now unused
"pci_fb" variable from "struct pci_controller" as well.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
2018-03-19 16:14:23 -04:00
Stefan Roese
ec9c80d643 nand: Remove unused ppc4xx NAND driver and references
ppc4xx support was removed some time ago. Lets remove the now unused
NAND driver and all its references for this platform as well.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Cc: Scott Wood <oss@buserror.net>
2018-03-19 16:14:23 -04:00
Patrick Delaunay
f8598d9815 board: st: add generic board for STM32MP1 family
Add first support for STM32MP157C-ED1 board with "Basic" boot chain
1/ Boot Rom: load SPL with STM32 image header in SYSRAM
2/ SPL: power up and initialize the DDR and load U-Boot image
        from SDCARD in DDR
3/ U-Boot: search and load extlinux.conf in SDCARD
           (DISTRO activated)

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-03-19 16:14:22 -04:00
Patrick Delaunay
3d2d115a30 dts: add device tree for STM32MP157C-ED1 board
Add minimal devicetree for STM32MP157C-ED1 board,
with only the devices to allow boot from SDCARD:
- RCC for clock and reset
- UART4 for console
- I2C and PMIC
- DDR
- SDMMC0 for SDCard

Waiting Kernel upstream for alignment.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-03-19 16:14:22 -04:00
Patrick Delaunay
266fa4df00 clk: stm32mp1: add clock tree initialization
add binding and code for clock tree initialization from device tree

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-03-19 16:14:22 -04:00
Patrick Delaunay
a6151916cb clk: add driver for stm32mp1
add RCC clock driver for STMP32MP157
- base on driver model = UCLASS_CLK
- support ops to enable, disable and get rate
  of all SOC clock needed by U-Boot

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-03-19 16:14:22 -04:00
Patrick Delaunay
a7519b3324 reset: stm32: adapt driver for stm32mp1
- move to livetree and allow to get address to parent
- add stm32mp1 compatible for probe

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-03-19 16:14:22 -04:00
Patrick Delaunay
8aeba629cc pinctrl: stm32: update pincontrol for stmp32mp157
- add the 2 new compatible used by STM32MP157
	"st,stm32mp157-pinctrl"
	"st,stm32mp157-z-pinctrl"
- update the mask for the port

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-03-19 16:14:21 -04:00
Patrick Delaunay
5d0c74e624 pmic: add stpmu1 support
This driver implements register read/write operations for STPMU1.

The STPMU1 PMIC provides 4 BUCKs, 6 LDOs, 1 VREF
and 2 power switches. It is accessed via an I2C interface.
This device is used with STM32MP1 SoCs.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-03-19 16:14:21 -04:00
Patrick Delaunay
e70f70aa65 ram: stm32mp1: add driver
Add driver and binding for stm32mp1 ddr controller and phy

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-03-19 16:14:21 -04:00
Patrick Delaunay
2514c2d0e6 arm: stm32: add new architecture for STM32MP family
- add new arch stm32mp for STM32 MPU/Soc based on Cortex A
- support for stm32mp157 SOC
- SPL is used as first boot stage loader
- using driver model for all the drivers, even in SPL
- all security feature are deactivated (ETZC and TZC)
- reused STM32 MCU drivers when it is possible

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-03-19 16:14:21 -04:00
Patrick Delaunay
35746c0138 stm32mp: stm32f7_i2c: use calloc instead of kmalloc
Kmalloc is using memalign allocation function. It is not necessary to
align this structure so to save bytes, we move to calloc.

And kmalloc function can't be used in SPL early stage (in board_init_f())

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-03-19 16:14:21 -04:00
Patrick Delaunay
f11c308ac2 gpio: stm32f7_gpio: handle node ngpios
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-03-19 16:14:20 -04:00
Patrick Delaunay
d876eaf2be dm: gpio: Convert stm32f7 driver to livetree
Update the GPIO driver to support a live device tree.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-03-19 16:14:20 -04:00
Patrick Delaunay
77aace579a arm: armv7: solve issue for timer_rate_hz in arch timer
The current value timer_rate_hz causes a problem with function
timer_get_us() from lib time and then an issue with
readx_poll_timeout() function.

With corrected value for tbclk() = timer_rate_hz = CONFIG_SYS_HZ_CLOCK
the weak functions in lib timer can be used:
- get_timer()
- __udelay()
So the specific function in this file are removed.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-03-19 16:14:20 -04:00
Patrick Delaunay
0e373c0ade spl: add SPL_RESET_SUPPORT
Add option to include RESET driver and uclass in SPL.
That can be useful to handle IP reset with same driver
in U-Boot and in SPL.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-03-19 16:14:20 -04:00
Patrick Delaunay
81260e3331 tools/mkimage: add support for STM32 image format
STM32MP157 bootrom needs a specific header for first boot stage.
This patch adds support of this header in mkimage.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-03-19 16:14:19 -04:00
Alex Kiernan
dbc3432379 tools: env: Implement atomic replace for filesystem
If the U-Boot environment is stored in a regular file and redundant
operation isn't set, then write to a temporary file and perform an
atomic rename.

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
2018-03-19 16:14:19 -04:00
Alex Kiernan
899b5338fa tools: env: Refactor write path of flash_io()
Extract write path of flash_io() into a separate function. This patch
should be a functional no-op.

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
2018-03-19 16:14:19 -04:00
Alex Kiernan
2deb3cac08 tools: env: Fix CamelCasing style violation
Replace HaveRedundEnv with have_redund_env to fix style violation.

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
2018-03-19 16:14:19 -04:00
Alex Kiernan
c7f52c4b6e tools: env: Pass through indent
Pass tools/env/fw_env.c through indent to correct style violations. This
commit consists of only one non-whitespace change:

  tools/env/fw_env.c:549: error: do not use assignment in if condition

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
2018-03-19 16:14:19 -04:00
Jun Nie
5c643db4cc SPL: Add signature verification when loading image
U-boot proper signature is not verified by SPL on most platforms
even config SPL_FIT_SIGNATURE is enabled. Only fsl-layerscape
platform support secure boot in platform specific code. So
verified boot cannot be achieved if u-boot proper is loaded by
SPL.

This patch add signature verification to u-boot proper images
when loading FIT image in SPL. It is tested on Allwinner bananapi
zero board with H2+ SoC.

Signed-off-by: Jun Nie <jun.nie@linaro.org>
2018-03-19 09:59:32 -04:00
Tom Rini
50905b55c7 Merge git://git.denx.de/u-boot-video 2018-03-19 09:56:34 -04:00
Jagan Teki
0354f4bef0 sunxi: Add DRAM_SUN8I_A83T kconfig entry
Add proper and simple kconfig option for dram_sun8i_a83t.c
instead of using MACH type on Makefile.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-03-19 16:46:47 +05:30
Jagan Teki
c335e9903c sunxi: Add DRAM_SUN8I_A33 kconfig entry
Add proper and simple kconfig option for dram_sun8i_a33.c
instead of using MACH type on Makefile.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-03-19 16:46:44 +05:30
Jagan Teki
af30393cb5 sunxi: Add DRAM_SUN8I_A23 kconfig entry
Add proper and simple kconfig option for dram_sun8i_a23.c
instead of using MACH type on Makefile.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-03-19 16:46:41 +05:30
Jagan Teki
7d0b165d5e sunxi: Add DRAM_SUN9I kconfig entry
Add proper and simple kconfig option for dram_sun9i.c
instead of using MACH type on Makefile.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-03-19 16:46:37 +05:30
Jagan Teki
dd928bfbb6 sunxi: Add DRAM_SUN4I kconfig entry
Add proper and simple kconfig option for dram_sun4i.c
instead of using MACH type on Makefile.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-03-19 16:46:14 +05:30
Jagan Teki
fdfa934e6e sunxi: add DRAM_SUN6I kconfig
Add proper and simple kconfig option for dram_sun6i.c
instead of using MACH type on Makefile.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-03-19 15:37:20 +05:30
Jagan Teki
735fb25202 sunxi: Add AXP_PMIC_BUS kconfig entry
Add simple and meaningful kconfig option for pmic_bus.c
instead of using MACH type on Makefile.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-03-19 15:37:20 +05:30
Jagan Teki
6f6f883949 sunxi: Add SUN8I_RSB kconfig entry
Add simple and meaningful kconfig option for rsb.c
instead of using MACH type on Makefile.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-03-19 15:37:20 +05:30
Jagan Teki
63928fa6dd sunxi: Use SUN6I_PRCM if used
SUN6I_PRCM is also used for SUN8I and SUN9I, so
select the same on respective MACH types.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-03-19 15:37:20 +05:30
Jagan Teki
71d9edf47a sunxi: Add SUN6I_P2WI kconfig entry
Add simple and meaningful kconfig option for p2wi.c
instead of using MACH type on Makefile.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-03-19 15:37:20 +05:30
Jagan Teki
2aa697a494 sunxi: Add SUN6I_PRCM kconfig entry
Add simple and meaningful kconfig option for prcm.c
instead of using MACH type on Makefile.

PRCM (Power/Reset/Clock Management) is considered as a
Multi-Functional Device, so used the same on Kconfig definition.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-03-19 15:37:20 +05:30
yannick fertre
cc1b0e7b8e board: Add display to STM32F746 SoC discovery board
Signed-off-by: yannick fertre <yannick.fertre@st.com>
2018-03-19 11:01:43 +01:00
yannick fertre
92eac5848f stm32f7: board: add splash screen
Support several pixel format (8bits, 16bits, 24bits & 32bits).
Add new file st_logo_data.h which contains logo
stmicroelectronics_uboot_logo_8bit_rle.bmp.

Signed-off-by: yannick fertre <yannick.fertre@st.com>
2018-03-19 11:01:04 +01:00
yannick fertre
455141636f arm: dts: stm32: add display for STM32F746 disco board
Enable the display controller, panel & backlight.
Set panel display timings & set the RGB data bus.

Signed-off-by: yannick fertre <yannick.fertre@st.com>
2018-03-19 11:00:23 +01:00
Philippe CORNU
0e75aa4d1d arm: dts: stm32: add ltdc for STM32F746
Add display controller node in device-tree.

Signed-off-by: yannick fertre <yannick.fertre@st.com>
[agust: rebased on master]
Signed-off-by: Anatolij Gustschin <agust@denx.de>
2018-03-19 10:58:16 +01:00
yannick fertre
e6194ce612 video: stm32: stm32_ltdc: set the blending factor
Set the blending factor regarding the pixel format

Signed-off-by: yannick fertre <yannick.fertre@st.com>
2018-03-19 10:52:30 +01:00
yannick fertre
75fa711ac8 video: stm32: stm32_ltdc: missing set of line interrupt position
Set LIPCR (line interrupt position conf) register with line length.

Signed-off-by: yannick fertre <yannick.fertre@st.com>
2018-03-19 10:52:09 +01:00
yannick fertre
2a0e878460 video: stm32: stm32_ltdc: set rate of the pixel clock
pxclk is useless to set pixel clock.

Signed-off-by: yannick fertre <yannick.fertre@st.com>
2018-03-19 10:51:58 +01:00
yannick fertre
c4c33e9d8b video: stm32: stm32_ltdc: update file header & footer
Modified copyright & driver name.

Signed-off-by: yannick fertre <yannick.fertre@st.com>
2018-03-19 10:51:38 +01:00
yannick fertre
c0fb2fc045 video: stm32: stm32_ltdc: add reset
Add reset of LTDC display controller.

Signed-off-by: yannick fertre <yannick.fertre@st.com>
2018-03-19 10:50:25 +01:00
Heinrich Schuchardt
1ef9aed92a video: exynos: remove redundant assignments
No need to initialize variables if the next usage is an assignment.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-03-19 10:02:05 +01:00
Heinrich Schuchardt
c16b342d90 video, da8xx-fb: fix time out in wait_for_event()
If an event does not occur the current coding stays in an endless loop.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-03-19 09:49:20 +01:00
Heinrich Schuchardt
348f044fda video: stb_truetype: simplify expression
Eliminate (x2 - x2) which is always zero.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-03-19 09:47:02 +01:00
Heinrich Schuchardt
41ec127016 video: cfb_console: simplify logical constraint
(A || !A && B) == (A || B)

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-03-19 09:35:57 +01:00
Patrice Chotard
ac6c796c3f usb: dwc2: Replace printf, pr_err by dev_info, dev_err
Replace printf() call by dev_info() and pr_err() by dev_err()

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-03-17 03:23:09 +01:00
Christophe Kerello
c2e4c86569 usb: dwc2: increase timeout in wait_for_chhltd
This patch increases timeout to 2s.
It was seen on 2 USB devices (Verbatim STORE N GO 070B4AED0FB22358 and
USB DISK 2.0 9000729BA41DDF40) that the request sense command takes
between 1.3s and and 1.5s.

Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-03-17 03:23:09 +01:00
Christophe Kerello
82e7975b85 usb: dwc2: disable external vbus supply when the device is removed
This patch adds an interface to disable the power in dwc2 driver.
This new interface is called when the device is removed.

Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-03-17 03:23:09 +01:00
Patrice Chotard
6048d42fa7 usb: ohci-generic: replace pr_err() by dev_err()
As we get access to struct udevice, use dev_err() instead
of pr_err().

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-03-17 03:20:53 +01:00
Patrice Chotard
cab4d48a93 usb: ohci-generic: factorize PHY operation
Factorize PHY get/init/poweron and PHY poweroff/exit operations
into separate function, it simplify the error path.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-03-17 03:20:53 +01:00
Patrice Chotard
633e1ec6bf usb: ohci-generic: handle phy power on/off
Add generic_phy_power_on() and generic_phy_power_off()
calls to switch ON/OFF phy during probe and remove functions.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-03-17 03:20:53 +01:00
Patrice Chotard
df7777ab43 usb: ehci-generic: replace pr_err() by dev_err()
As we get access to struct udevice, use dev_err() instead
of pr_err().

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-03-17 03:20:53 +01:00
Patrice Chotard
20f06a4833 usb: ehci-generic: factorize PHY operation
Factorize PHY get/init/poweron and PHY poweroff/exit operations
into separate function, it simplify the error path.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-03-17 03:20:53 +01:00
Patrice Chotard
a800a6793f usb: ehci-generic: handle phy power on/off
Add generic_phy_power_on() and generic_phy_power_off()
calls to switch ON/OFF phy during probe and remove functions.

Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-03-17 03:20:53 +01:00
Stefan Roese
2715e32ce1 usb: Remove unused ppc4xx EHCI host driver
ppc4xx support was removed some time ago. Lets remove the now unused
EHCI driver and all its references for this platform as well.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Cc: Marek Vasut <marex@denx.de>
2018-03-17 03:20:15 +01:00
Vignesh R
2fd4242cc5 ubs: xhci-dwc3: Enable USB3 PHY when available
DWC3 USB3 controllers will need USB3 PHY to be enabled, in addition to
USB2 PHY, to be functional. Therefore enable USB3 PHY when available.

Signed-off-by: Vignesh R <vigneshr@ti.com>
2018-03-17 03:19:09 +01:00
Vignesh R
3fc2635d3d usb: xhci-dwc3: Refractor PHY operations into separate function
Refractor PHY get/init/poweron and PHY poweroff/exit operations into
separate function so that its easy to support multiple PHYs.

Signed-off-by: Vignesh R <vigneshr@ti.com>
2018-03-17 03:19:08 +01:00
Vignesh R
7d4e4d3063 usb: xhci-dwc3: Power on USB PHY before using
It is wrong that expect .phy_init() to also power on the PHY. Therefore,
explicitly, call generic_phy_power_on() after generic_phy_power_init() in
order to power on PHY before using it.

Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2018-03-17 03:19:08 +01:00
Alexey Brodkin
42637fdae8 usb: dwc2: Allow selection of data buffer size
If we use hardware with very small RAM (let's consider just a couple
of hundreds of kB but not megabytes) it is not super convenient to lose
64kB for statically allocated bufer which most probably won't be used
as big as it is. Typically we'll have much shorter data packages to
excahnge and in the worst case longer packets will be split on separate
transactions.

For those corner-cases user will be able to set his buffer size of
choice via USB_DWC2_BUFFER_SIZE option in menuconfig.

By default we'll use 64 kB as it was hard-coeded before so existing
users shouldn't be affected at all.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Marek Vasut <marex@denx.de>
2018-03-17 03:15:18 +01:00
Patrick Delaunay
b8aa55cb64 common: move init_helpers.h prototypes in init.h
Merge init_helpers.h in the new file init.h
with only prototypes for init_cache_f_r
used in common/board_f.c

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-03-16 14:56:59 -04:00
Patrick Delaunay
fc22ee215a common: move board_info.c prototypes in init.h
Move function prototype for common/init/board_init.c
from common.h to init.h

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-03-16 14:56:59 -04:00
Patrick Delaunay
e2c219cd71 common: move board_r.c prototypes in init.h
Move function prototypes used in common/board_r.c
from common.h to init.h

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-03-16 14:56:59 -04:00
Patrick Delaunay
11f86cbaff common: move board_init.c prototypes in init.h
Move function prototypes for common/init/board_init.c
from common.h to init.h

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-03-16 14:56:00 -04:00
Patrick Delaunay
d6f8771239 common: move board_f.c prototypes in init.h
Move prototypes for function used in common/board_f.c
from common.h to init.h
Remove weak for arch_reserve_stacks in prototype
(checkpatch issue)

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-03-16 14:56:00 -04:00
Michal Simek
71b7564479 ppc: Remove orphan xilinx_irq.h file
This file is completely unused and it should be removed as the part of
ppc405/ppc440 xilinx platform removal.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-16 14:54:14 -04:00
Heinrich Schuchardt
02c5e891a3 MAINTAINERS: TI SYSTEM SECURITY: remove invalid file
Remove a link to a non-existent file.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: Andrew F. Davis <afd@ti.com>
2018-03-16 14:54:14 -04:00
Heinrich Schuchardt
c133915eb2 MAINTAINERS: ARM TI: remove invalid paths
Remove non-existing paths.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-03-16 14:54:14 -04:00
Heinrich Schuchardt
cbc4423e87 MAINTAINERS: ARM SAMSUNG: remove invalid paths
Remove non-existing directories.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: Minkyu Kang <mk7.kang@samsung.com>
2018-03-16 14:54:14 -04:00
Heinrich Schuchardt
18fa6230ce MAINTAINERS: FLATTENED DEVICE TREE: correct maintained path
Change due to commit b08c8c4870 ("libfdt: move headers to
<linux/libfdt.h> and <linux/libfdt_env.h>")

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-03-16 14:54:14 -04:00
Heinrich Schuchardt
0f8525f5c1 MAINTAINERS: ARM HISILICON: correct maintained path
Fix an incorrect path.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-03-16 14:54:14 -04:00
Heinrich Schuchardt
f7b2849a47 MAINTAINERS: ARM FREESCALE IMX: remove invalid path
arch/arm/cpu/armv7/mx*/ does not relate to any existing directory.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-03-16 14:54:14 -04:00
Patrick Delaunay
f7bd1c3c97 post: remove reference to power functions
The 2 functions board_power_mode and board_poweroff
are no more existing in U-Boot code (check with grep)
This patch updates the documentation and removes
the unnecessary prototypes.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-03-16 14:54:14 -04:00
Patrick Delaunay
e6e92170a4 common: remove unused prototypes
Remove the prototypes for 4 functions no more existing
in U-Boot code (checked by grep):
- checkflash
- checkdram
- mdm_init
- setup_board_extra

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-03-16 14:54:14 -04:00
Patrick Delaunay
dafa84d27c common: add a prototype for mach_cpu_init()
Add a new file init.h with the prototype for arch_cpu_init
Add a prototype for mach_cpu_init() to avoid a warning:
no previous prototype for ‘mach_cpu_init’

It is a first step to move all the functions prototype
used during U-Boot initialization (board_f.c / board_r.c)
from common.h to init.h

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-03-16 14:54:14 -04:00
Tom Rini
6f6b7cfa89 Convert all of CONFIG_CONS_INDEX to Kconfig
This converts the following to Kconfig:
   CONFIG_CONS_INDEX

We have existing entries for this option in a number of places, with
different guards on them.  They're also sometimes used for things not
directly inside of the serial driver.  First, introduce a new symbol to
guard the use of CONFIG_CONS_INDEX, so that in the case where we don't
need this for the serial driver, but for some other use, we can still do
it.  Next, consolidate all of these into the single entry in
drivers/serial/Kconfig.  Finally, introduce CONS_INDEX_[023456] so that
we can imply a correct value here to make the defconfig side of this
smaller.

Signed-off-by: Adam Ford <aford173@gmail.com>
[trini: Rework a lot of the logic here, such that I took authorship from
Adam, but kept his S-o-B line]
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-03-16 10:28:52 -04:00
Tom Rini
7dc7a38c79 dra7xx: Always enable UART1 and UART3 in early_padconf
It is safe to always setup the pinmux for UART1 and UART3 to be used in
early_padconf and then if these pins are needed later on, they will be
re-muxed.  This allows us to drop the usage of CONFIG_CONS_INDEX here.

Cc: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-03-16 10:26:14 -04:00
Jagan Teki
c4e68d3aa8 dm: MIGRATION: Add migration plan for DM_SPI & DM_SPI_FLASH
Due to adding various new functionalities with SPI and SPI-FLASH
subsystems which are rounding in Mailing list for year these long
term supporting spi driver which never seen any update with
driver-model conversion.

So added migration plan for DM_SPI and DM_SPI_FLASH with
deadline v2018.09

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-03-16 10:26:14 -04:00
Madan Srinivas
f274f26566 defconfig: k2l_hs_evm: Add k2l_hs_evm_defconfig
Adds a dedicated defconfig to build TI K2L secure
devices and updates MAINTAINERS.

k2l_hs_evm_defconfig is created from the k2l_evm_defconfig
and removes support for SPL, as SPL is not supported on K2
HS devices. Corrects SYS_TEXT_BASE for HS devices.

Also adds TI_SECURE_DEVICE and FIT_IMAGE_POST_PROCESS to
include support for secure image creation and authentication

Signed-off-by: Madan Srinivas <madans@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Andrew F. Davis <afd@ti.com>
2018-03-16 09:42:41 -04:00
Madan Srinivas
1c49caf34c configs: k2l: Updates u-boot env to install secure boot monitor
This patch updates the default u-boot env for K2L HS devices
to install the secure boot monitor and load the fitImage during
boot.

Signed-off-by: Madan Srinivas <madans@ti.com>
Acked-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-03-16 09:42:39 -04:00
Ruslan Bilovol
87c692cbc1 watchdog: omap_wdt: improve watchdog reset path
Remove busy looping during watchdog reset.
Each polling of W_PEND_WTGR bit ("finish posted
write") after watchdog reset takes 120-140us
on BeagleBone Black board. Current U-Boot code
has watchdog resets in random places and often
there is situation when watchdog is reset
few times in a row in nested functions.
This adds extra delays and slows the whole system.

Instead of polling W_PEND_WTGR bit, we skip
watchdog reset if the bit is set. Anyway, watchdog
is in the middle of reset *right now*, so we can
just return.

This noticeably increases performance of the
system. Below are some measurements on BBB:
 - DFU upload over USB                 15% faster
 - fastboot image upload               3x times faster
 - USB ep0 transfers with 4k packets   20% faster

Signed-off-by: Ruslan Bilovol <ruslan.bilovol@gmail.com>
Tested-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Tested-by: Alex Kiernan <alex.kiernan@gmail.com>
2018-03-16 09:42:38 -04:00
Sam Protsenko
fc228dc96c board: am335x: Set serial# variable
serial# variable is needed to show the device correctly in "fastboot
devices" output. It's useful when we have several devices (in fastboot
mode) connected to single host and want to choose which one to flash.

We can't use omap_die_id_serial() for this, because AM335x lacks
DIE_ID, as can be seen from AM335x TRM. Let's do next:
 - reuse board_serial variable (obtained from EEPROM in
   set_board_info_env() function) to set serial#
 - if board_serial is "unknown", reuse ethaddr variable to set serial#

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-03-16 09:42:24 -04:00
Wenyou Yang
162a7de5e5 clk: at91: clk-system: add set/get_rate operations
To support set/get the clock rate, add set/get_rate operations.

Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
2018-03-16 07:30:04 -04:00
Wenyou Yang
fed0509c92 clk: at91: add PLLADIV driver
As said in the SAMA5D2 datasheet, the PLLA clock must be divided
by 2 by writing the PLLADIV2 bit in PMC_MCKR, if the ratio between
PCK and MCK is 3 (MDIV = 3). This is the purpose of the driver.

Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
2018-03-16 07:30:04 -04:00
Wenyou Yang
cb0cb1b0cf clk: at91: add USB Host clock driver
Add USB clock driver to configure the input clock and the divider
in the PMC_USB register to generate a 48MHz and a 12MHz signal to
the USB Host OHCI.

Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
2018-03-16 07:30:04 -04:00
Tom Rini
735f397c14 Merge git://git.denx.de/u-boot-uniphier 2018-03-15 09:58:30 -04:00
Masahiro Yamada
46820e3f67 ARM: dts: uniphier: sync with Linux 4.16-rc5
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-03-15 22:43:47 +09:00
Masahiro Yamada
27fbdcdefd ARM: uniphier: change load addresses for bigger kernel image
The kernel size is getting bigger and bigger.  Because the Android
common kernel is even bigger than the vanilla one, so images overlap
in the current memory layout.

Adjust the load address for a bigger kernel image.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-03-15 22:43:35 +09:00
Masahiro Yamada
34be347999 ARM: uniphier: increase the firmware size in update command environment
If a bigger EL32 is used, fip.bin can be larger than the currently
assumed boot firmware size.  Adjust the update commands.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-03-15 22:41:31 +09:00
Tom Rini
3fa9bc7969 Merge git://git.denx.de/u-boot-spi 2018-03-15 08:27:27 -04:00
Tom Rini
706f077577 .travis.yml: Add lzop
We need lzop now in order to make some FIT images that use LZO
compression on the contents.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-03-14 14:02:49 -04:00
Adam Ford
4d1dd69e5f omap3_logic: Enable DM_SPI
With the introduction of ("Boards,Need,to,Switch,DM] spi: omap3_spi:
Full dm conversion"), Driver Model for McSPI is now available on the
omap3.  This enables the config by default on omap3_logic boards.

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-03-14 23:19:31 +05:30
Jagan Teki
b2b41d2777 spi: omap3: Fix redeclared error
omap3_spi_set_speed|mode redeclared bus symbol, fix the same.

error:
drivers/spi/omap3_spi.c: In function ‘omap3_spi_set_speed’:
drivers/spi/omap3_spi.c:650:18: error: ‘bus’ redeclared as different kind of symbol
  struct udevice *bus = dev->parent;

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-03-14 23:19:31 +05:30
Tom Rini
b75643ad0a Merge git://git.denx.de/u-boot-sunxi 2018-03-14 13:27:14 -04:00
Andre Przywara
341c058654 sunxi: move CONFIG_SYS_TEXT_BASE out of defconfigs
Commit 278b90ce78 ("configs: Migrate CONFIG_SYS_TEXT_BASE") made
CONFIG_SYS_TEXT_BASE a proper Kconfig variable, with the consequence
of moving the common definition shared by almost every sunxi board
into 123 individual defconfig files. But the U-Boot start address
for Allwinner boards is a platform decision which has been around for
ages, so defining it in each *board* config file seems a bit over the
top.
Define the standard values (160MB into DRAM for most SoCs, with two
SoC exceptions) if ARCH_SUNXI is selected, and delete the lines from
the individual defconfigs.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-03-14 10:45:37 +05:30
Patrick Delaunay
218da804ef common/memsize.c: restore content of the base address
For the last return of function get_ram_size(),
when size=maxsize, restore the base address (*base)
content.

Add comment for the remaining case to avoid regression:
this case is already correctly handled.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-03-13 21:59:30 -04:00
Patrick Delaunay
c5da05cd41 common/memsize.c: prepare get_ram_size update
Save the content of the base address in a new variable
in stack (save_base) to prepare restore this content.

This patch don't modified code behavior and stack usage.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-03-13 21:59:30 -04:00
Sam Protsenko
79717c8047 configs: am335x_boneblack: Enable fastboot flash capability
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Acked-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-03-13 21:59:29 -04:00
Sam Protsenko
7a390c0e25 omap: Fix AM335x build with enabled fastboot flash
When enabling CONFIG_FASTBOOT_FLASH in am335x_boneblack_defconfig, next
build errors and warnings occur:

    arch/arm/mach-omap2/utils.c: In function ‘omap_set_fastboot_cpu’:
    arch/arm/mach-omap2/utils.c:26:16: warning: implicit declaration of
              function ‘omap_revision’ [-Wimplicit-function-declaration]
              u32 cpu_rev = omap_revision();
                            ^~~~~~~~~~~~~
    arch/arm/mach-omap2/utils.c:29:7: error: ‘DRA762_ES1_0’ undeclared
              (first use in this function)

Include asm/omap_common.h explicitly to avoid those.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Acked-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-03-13 21:59:29 -04:00
Jean-Jacques Hiblot
938c3cfb80 ARM: dts: dra7x: Make pinctrl and IOdelays for MMC2 available in SPL
The SPL can't use high speed MMC modes if the associated pinctrl and
IOdelays are described in the DTS.
Make them available in SPL by tagging the nodes with 'u-boot,dm-spl;'

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-03-13 21:59:29 -04:00
Jean-Jacques Hiblot
3f0996291b configs: dra7xx_evm: Enable support for the HS200 mmc mode in the SPL
Beside enabling the support for HS200 in mmc core, enabling the HS200
support in the SPL requires multi-dtb support in the SPL because pinctrl
and IOdelays vary across SOCs.

Also we need to make sure that the pinctrl properties arenot removed from
the dts by setting CONFIG_OF_SPL_REMOVE_PROPS to remove only clocks and
interrupts properties.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-03-13 21:59:29 -04:00
Jean-Jacques Hiblot
a7b704a0b6 ARM: dts: dra76-evm: shift to using common IOdelay data
Now that we have a device-tree include file with common
MMC/SD IOdelay data for DRA76x SoC, shift the EVM device-tree
file to using that.
Also fix the name of the IO voltage regulator for mmc1.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-03-13 21:59:28 -04:00
Jean-Jacques Hiblot
cb608ccb03 ARM: dts: dra76x: create a common file with MMC/SD IOdelay data
Add a common device-tree include file with MMC/SD IOdelay data
for DRA76x SoC based on the linux DTSI file.

In the most common case, IOdelay data available in datamanual
can directly be used. This file caters to that common case.

Data is based on DRA76x datamanual, SPRS993A, revised July 2017.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-03-13 21:59:28 -04:00
Derald D. Woods
b6e2543cf9 ARM: omap3: evm: Sync with omap3_beagle configuration
This commit does the following for OMAP3 EVM:

- Track omap3_beagle changes where possible
- Remove CONFIG_SYS_MPUCLK and CONFIG_MTD which are not needed for the
  default board configuration to work.
- Remove CONFIG_SPL_SYS_MALLOC_SIMPLE and CONFIG_SYS_MALLOC_F_LEN from
  default config. CONFIG_SYS_MALLOC_F_LEN=0x400 is set by configuration
  automatically. [allows board to boot with SERIAL_SEARCH_ALL=y]
- Use updated NAND layout:

	device nand0 <omap2-nand.0>, # parts = 6

	#: name		size			offset
	-------------------------------------------------
	0: spl		0x00080000(512k)	0x00000000
	1: u-boot	0x001e0000(1920k)	0x00080000
	2: u-boot-env	0x00020000(128k)	0x00260000
	3: dtb		0x00020000(128k)	0x00280000
	4: kernel	0x00600000(6m)		0x002a0000
	5: rootfs	0x0f760000(-)		0x008a0000
	-------------------------------------------------

Signed-off-by: Derald D. Woods <woods.technical@gmail.com>
2018-03-13 21:59:28 -04:00
Derald D. Woods
d233ccb1d8 ARM: omap3: beagle: Enable DM_SERIAL, update distro usage and NAND layout
This commit does the following for BeagleBoard{-xM}:

- Enable DM_SERIAL which also enables SPL_DM_SERIAL
- Misc. config updates in support of DM_SERIAL
- Use updated NAND layout (BeagleBoard):

	device nand0 <omap2-nand.0>, # parts = 6

	#: name		size			offset
	-------------------------------------------------
	0: spl		0x00080000(512k)	0x00000000
	1: u-boot	0x001e0000(1920k)	0x00080000
	2: u-boot-env	0x00020000(128k)	0x00260000
	3: dtb		0x00020000(128k)	0x00280000
	4: kernel	0x00600000(6m)		0x002a0000
	5: rootfs	0x0f760000(-)		0x008a0000
	-------------------------------------------------

- Use MMC and UBIFS support from config_distro_bootcmd.h
- Use LEGACY_MMC and NAND support defined in omap3_beagle.h

[MMC(0:1)/extlinux/extlinux.conf]
---8<-------------------------------------------------------------------
default omap3-beagle-mmc-fat
label omap3-beagle-mmc-fat
	kernel /zImage
	fdt /omap3-beagle.dtb
	append console=ttyO2,115200n8 root=/dev/mmcblk0p2 rw rootfstype=ext4 rootwait
---8<-------------------------------------------------------------------

[LEGACY_MMC(0:2)/boot/extlinux/extlinux.conf]
---8<-------------------------------------------------------------------
default omap3-beagle-mmc-ext4
label omap3-beagle-mmc-ext4
	kernel /boot/zImage
	fdt /boot/omap3-beagle.dtb
	append console=ttyO2,115200n8 root=/dev/mmcblk0p2 rw rootfstype=ext4 rootwait
---8<-------------------------------------------------------------------

[UBIFS(ubi0:rootfs)/boot/extlinux/extlinux.conf]
---8<-------------------------------------------------------------------
default omap3-beagle-nand-ubifs
label omap3-beagle-nand-ubifs
	kernel /boot/zImage
	fdt /boot/omap3-beagle.dtb
	append console=ttyO2,115200n8 root=ubi0:rootfs rw ubi.mtd=rootfs rootfstype=ubifs rootwait
---8<-------------------------------------------------------------------

The board's 'bootcmd' can also be overridden with:

	CONFIG_BOOTCOMMAND="run findfdt; run mmcboot"
	CONFIG_BOOTCOMMAND="run findfdt; run nandboot"
	CONFIG_BOOTCOMMAND="run findfdt; run ramboot"

		or

	CONFIG_BOOTCOMMAND="run findfdt; run somethingelse"

The use of 'run findfdt' is required.

Signed-off-by: Derald D. Woods <woods.technical@gmail.com>
2018-03-13 21:59:27 -04:00
Derald D. Woods
ebf6e265ac ARM: omap3: beagle: Set 'mtdids' and 'mtdparts' in board file
BeagleBoard 'xM' does not really have NAND. CONFIG_MTDIDS_DEFAULT and
CONFIG_MTDPARTS_DEFAULT can/should be empty for 'xM'. This commit sets
the defined values if they exist.

Signed-off-by: Derald D. Woods <woods.technical@gmail.com>
2018-03-13 21:59:27 -04:00
Sam Protsenko
2c9afab9ac env: ti: boot: Get rid of magic numbers
Get the start address and the size of partitions using partition names
rather than partition numbers. This way we can change the partition
table further without changing the boot code.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
2018-03-13 21:59:27 -04:00
Sam Protsenko
64e6a49a11 cmd: part: Extract common code to separate function
Refactor the code for "part start" and "part size" commands to avoid
code duplication.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
2018-03-13 21:59:27 -04:00
Sam Protsenko
36df616a2d cmd: part: Allow passing partition name to start and size
Allow passing the partition name to "part start" and "part size"
commands, so we can avoid magic numbers in the environment.

Consider one real use-case: in include/environment/ti/boot.h we have
commands like these:

    setenv boot_part 9
    part start mmc ${mmcdev} ${boot_part} boot_start
    part size mmc ${mmcdev} ${boot_part} boot_size
    mmc read ${loadaddr} ${boot_start} ${boot_size}

Now suppose that we have changed the partition table and boot_part now
is 10. We will need to fix commands above. And anyone who relies on
these boot commands, will need to change them accordingly, too (this was
an actual case in our lab while testing Linux boot on Android
environment).

By providing the option to pass partition name instead, we fix mentioned
issue, by eliminating the necessity to use magic numbers.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
2018-03-13 21:59:26 -04:00
Stephen Warren
32090e5070 test/py: highlight warnings in the log summary
Currently, if a test emits a warning message but otherwise passes, there's
no indication of this in the log summary, which can lead to warnings being
missed. Enhance the test logic to explicitly mention warnings in otherwise
passing tests, and not to collapse the log sections for tests with
warnings, so that they're more easily seen when scanning the log.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2018-03-13 21:59:26 -04:00
Stephen Warren
4bdc90f9c7 test/py: add MMC/SD block read test
Add a standalone MMC block read test. This allows direct testing of MMC
access rather than relying on doing so as a side-effect of e.g. DFU or
UMS testing, which may not be enabled on all platforms.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2018-03-13 21:59:26 -04:00
Kever Yang
56670d6fb8 disk: part: use common api to lookup part driver
Do not need to scan disk every time when we get part info
by name.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
[trini: Fix build in !CONFIG_HAVE_BLOCK_DEVICE case]
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-03-13 21:58:45 -04:00
Kever Yang
d472926919 disk: part: scan the disk if the part_type is unknown
If a DUT do not have partition table, and we write one with 'gpt write'
cmd, we should able to list the partition with 'part list' cmd.
It's reasonable to scan the disk again if the initial part_type is
unknown in case we just write a new one into disk.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2018-03-13 21:46:05 -04:00
Patrice Chotard
f5bd13ed57 mach-stm32: Use default memory map as background region
On linux kernel side, on STM32F7 and STM32H7 SoCs, DMA requires
uncachable regions. These regions are defined in DT.
Since kernel linux v4.15, on ARMv7-M Cortex, kernel is able
to configure MPU regions depending on DT settings.

As kernel is able to configure MPU, this allows to remove
MPU region settings in bootloader.

On Cortex M processors, MPU allows to use a default memory map.
(see B3.5.4 MPU Control Register, MPU_CTRL in
https://developer.arm.com/products/architecture/m-profile/docs/ddi0403/latest/armv7-m-architecture-reference-manual)
Use the default memory map as background region for all STM32 SoCs
family with an additional MPU region corresponding to the SDRAM area.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-03-13 21:45:37 -04:00
Patrice Chotard
227cefe02c configs: stm32: Enable DOS_PARTITION for STM32F4/F7 boards
Enable DOS_PARTITION for boards STM32F429-eval, STM32F469-disco
and STM32F746-disco.
This allows to read FAT partition on mmc.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-03-13 21:45:37 -04:00
Patrice Chotard
d0d6451587 ARM: dts: Add support for stm32f746-evaluation board support
This board offers:
  _ STM32F746NGH6 microcontroller with 1 Mbyte Flash and 320+4 Kbytes RAM
  _ Six 5 V power supply options:
        Power jack
        ST-LINK/V2-1 USB connector
        User USB HS connector
        User USB FS1 connector
        User USB FS2 connector
        Daughterboard
  _ SAI Audio DAC, stereo audio jack which supports headset with microphone
  _ Stereo digital microphone, audio jack connector used to connect
    external speakers
  _ 2 Gbytes (or more) SDMMC interface microSD card
  _ RF-EEPROM on I2C compatible serial interface
  _ RS-232 communication
  _ IrDA transceiver
  _ JTAG/SWD and ETM trace debug support, ST-LINK/V2-1 embedded
  _ IEEE-802.3-2002 compliant Ethernet connector
  _ Camera module
  _ 8Mx32 bit SDRAM, 1Mx16 bit SRAM & 8Mx16 bit Nor Flash
  _ 512 Mbits QuadSPI Nor Flash
  _ 5.7 inch 640x480 pixel TFT color LCD with capacitive touch panel
  _ Joystick with 4-direction control and selector
  _ Reset, WakeUp/Tamper or key button
  _ 4 color user LEDs
  _ Extension connectors & memory connectors for daughterboard or
    wrapping board
  _ USB OTG HS and FS with Micro-AB connectors
  _ RTC with backup battery
  _ CAN 2.0A/B compliant connection
  _ Potentiometer
  _ Motor control connector

More detailed information are available here :
http://www.st.com/en/evaluation-tools/stm32746g-eval.html

To compile stm32f746-eval board, use same defconfig as
stm32f746-disco, the only difference is to pass
"DEVICE_TREE=stm32746g-eval".

Signed-off-by: Christophe Priouzeau <christophe.priouzeau@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Acked-by: Vikas Manocha <vikas.manocha@st.com>
2018-03-13 21:45:37 -04:00
Patrice Chotard
585beebd05 arch-stm32: Clean arch-stm32f7/syscfg.h
Remove all unused defines

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-03-13 21:45:37 -04:00
Patrice Chotard
1b76a7333a arch-stm32: Remove stm32_periph.h
Remove arch/arm/include/asm/arch-stm32fx/stm32_periph.h
as all defines or enums are no more used.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-03-13 21:45:37 -04:00
Patrice Chotard
2536f18bfa arch-stm32: Factorize stm32.h for STM32F4 and F7
For STM32F4 and F7 SoCx family, a specific stm32.h file exists.
Some common defines are duplicated or even unused in each of
these stm32.h.

Factorize all common definition in arch/arm/include/asm/stm32f.h and keep
specific definitions in each arch/arm/include/asm/arch-stm32fx/stm32.h.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-03-13 21:45:37 -04:00
Patrice Chotard
f36bcf2390 arch-stm32: Move gpio.h for STM32 SoCs in include/asm/
Instead to have 3 identical gpio.h for all STM32 SoCs,
migrate them in one file in include/asm.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-03-13 21:45:37 -04:00
Patrice Chotard
bb43fe6e45 arch-stm32f4: Remove fmc.h file
fmc.h file is no more used, remove it.
All FMC related defines are declared in drivers/ram/stm32_sdram.c
which is common to all STM32 SoCs.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-03-13 21:45:37 -04:00
Patrice Chotard
dd1e3e799a ARM: dts: stm32: limit sdio frequency to 14Mhz for stm32f429i-eval
This avoids the following errors while reading on mmc:
  Read data bytes CRC error: 0x2
  switch to partitions #0, OK
  mmc0 is current device
  Read data bytes CRC error: 0x82002
  ** Unrecognized filesystem type **

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-03-13 21:45:37 -04:00
Patrice Chotard
6243c88448 clk: clk_stm32f: Add DSI clock support
DSI clock is available on STM32F769-disco and
STM32F469-disco board.

Signed-off-by: Yannick Fertre <yannick.fertre@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-03-13 21:45:37 -04:00
Patrice Chotard
5e993508cb clk: clk_stm32f: Add set_rate for LTDC clock
Implement set_rate() for LTDC clock only, set_rate for other
clocks will be added if needed. This is needed by future LTDC driver
improvements.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-03-13 21:45:37 -04:00
Patrice Chotard
e8fb9ed254 clk: clk_stm32f: Configure SAI PLL to generate LTDC pixel clock
Configure SAI PLL configuration to generate LTDC pixel clock on
the PLLSAIR output.

PLLSAI is enabled only if CONFIG_VIDEO_STM32 flag is set.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-03-13 21:45:37 -04:00
Patrice Chotard
1038e033e1 clk: clk_stm32f: Rework SDMMC stm32_clk_get_rate() part
Rework the way SDMMC clock get rate is done in a more
generic way :

_ Add stm32_clk_get_pllsai_rate() which give the PLLSAI
  indicated output rate.

_ Add stm32_clk_get_pllsai_vco_rate() which give the VCO
  internal rate.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-03-13 21:45:37 -04:00
Patrice Chotard
651a70e8d5 clk: clk_stm32f: No more need of 48Mhz from PLL_SAI
Initially, 48Mhz for SDIO clock was generated from SAI pll for
STM32F469 and STM32F746 SoCs, but this solution was not suitable
for STM32F429 SoCs.

A generic solution is to used the PLL_Q output as 48Mhz clock
for all STM32F SOCs family.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-03-13 21:45:37 -04:00
Patrice Chotard
526aa92960 clk: clk_stm32f: Fix RCC_PLLSAICFGR mask defines
Use the correct name for RCC_PLLSAICFGR_PLLSAIx_MASK masks.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-03-13 21:45:37 -04:00
Patrice Chotard
aa230be4bf clk: clk_stm32f: Fix stm32_clk_get_rate()
Wrong parameter was passed to stm32_clk_pll48clk_rate().
sysclk (PLL_p output value) was passed instead of VCO value.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-03-13 21:45:37 -04:00
Patrick Delaunay
167f2c90f6 mmc: stm32: sdmmc2: add support for st, pin-ckinsdmmc_ckin
This patch adds "st,pin-ckin" support to activate sdmmc_ckin feature.
When using an external driver (a voltage switch transceiver),
it's advised to select SDMMC_CKIN feedback clock input to sample
the received data.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-03-13 21:45:37 -04:00
Patrick Delaunay
a72dd8ed95 mmc: stm32: sdmmc2: add hardware flow control support
The hardware flow control functionality is used to avoid
FIFO underrun (TX mode) and overrun (RX mode) errors.
The behavior is to stop SDMMC_CK during data transfer and
freeze the SDMMC state machines.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-03-13 21:45:37 -04:00
Patrice Chotard
aa5e3e22f4 board: stm32: switch to DM STM32 timer
Use available DM stm32_timer driver instead of dedicated
mach-stm32/stm32fx/timer.c.

Remove all defines or files previously used for timer usage in
arch/arm/include/asm/arch-stm32fx and in arch/arm/mach-stm32/stm32fx

Enable DM STM32_TIMER for STM32F4/F7 and H7.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-03-13 21:45:37 -04:00
Patrice Chotard
cd389c03f2 ARM: dts: stm32: Add timer support for STM32F7
Add missing timer node to enable timer5 for STM32F7 SoCs family

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-03-13 21:45:37 -04:00
Patrice Chotard
09b335a675 clk: clk_stm32h7: Fix prescaler for Domain 3
d1cfgr register was used to calculate the domain 3
prescaler value instead of d3cfgr.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-03-13 21:45:37 -04:00
Patrice Chotard
b43679482b clk: clk_stm32h7: Fix stm32_clk_get_rate() for timer
For timer clock, an additional prescaler is used which
was not taken into account previously.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-03-13 21:45:37 -04:00
Patrice Chotard
61803a95a1 clk: clk_stm32f: Fix stm32_clk_get_rate() for timer
For timer clock, an additionnal prescaler is used which was
not taken into account previously.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-03-13 21:45:37 -04:00
Patrice Chotard
5120a083e7 timer: stm32: Add timer support for STM32 SoCs family
This timer driver is using GPT Timer (General Purpose Timer)
available on all STM32 SOCs family.
This driver can be used on STM32F4/F7 and H7 SoCs family

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-03-13 21:45:37 -04:00
Tom Rini
cc66dcdd16 Merge git://git.denx.de/u-boot-rockchip 2018-03-13 19:00:29 -04:00
Tom Rini
ee5f24909f Merge branch 'next' of git://git.denx.de/u-boot-video 2018-03-13 17:32:47 -04:00
Jagan Teki
1e84e44cfe rk3288: vyasa: Add eMMC boot support
RK3288 Vyasa has eMMC boot support, with JP4 open.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-13 18:12:36 +01:00
Jagan Teki
159916f4e8 ARM: dts: rockchip: Add usb otg for rk3288-vyasa
Add usb otg support for rk3288-vyasa, board support usb1 otg
power through otg_vbus_drv and naming conversion followed
as per schematic.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-13 18:12:36 +01:00
Jagan Teki
fd0d7f9345 ARM: dts: rockchip: Add usb host for rk3288-vyasa
Add usb host support for rk3288-vyasa, board support hub power
through phy_pwr_en and usb2 host power through usb2_pwr_en and
naming conversion followed as per schematic.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-13 18:12:36 +01:00
Jagan Teki
7d07b83618 rockchip: rk3288-vyasa: defconfig: Enable gmac support
Enable gmac support for rk3288-vyasa board.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-13 18:12:36 +01:00
Jagan Teki
0d3193415d ARM: dts: rockchip: Add gmac support for rk3288-vyasa board
Sync gmac dts node from Linux.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-13 18:12:36 +01:00
Jagan Teki
ad6c965529 ARM: dts: rockchip: Add regulators for rk3288-vyasa
Add supporting regulators for rk3288-vyasa board, dc12_vbat is
parent regulatorand followed regulators as are child regulators.
regulator naming conversion followed as per schematic for better
readability and easy for identification.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-13 18:12:35 +01:00
Jagan Teki
58b3f26fd7 ARM: dts: rockchip: rk3288-vyasa: Use vmmc-supply from PMIC
rk808, SWITCH_REG1 has configured for sdmmc regulator as vcc_sd,
so use the same by renaming vcc33_sd to vcc_sd(as per schematic)
and drop explicit regulator definition from root.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-13 18:12:35 +01:00
Jagan Teki
764a94d90c ARM: dts: rockchip: rk3288-vyasa: Remove vdd_log from rk808, DCDC_REG1
vdd_log, never used on DCDC_REG1 of rk808 from latest schematic so
remove the same and update the regulator-name as 'vdd_arm' to sync
with existing rk3288 board dts files.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-13 18:12:35 +01:00
Jagan Teki
d11455f56a ARM: dts: rockchip: Sync rk3288-vyasa dts from Linux
Sync rk3288-vyasa board dts from Linux for proper updates and maintenance
- rk3288-vyasa.dts: Similar to Linux dts
- rk3288-vyasa-u-boot.dtsi: u-boot dts changes

Also updated MAINTAINERS for these dts files.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-13 18:12:35 +01:00
Klaus Goger
0c8e0b319f rockchip: add text_offset to kernel_addr_r on aarch64 platforms
Booting a aarch64 Linux kernel requires the image to be placed
text_offset bytes from a 2MB aligned address.
See https://www.kernel.org/doc/Documentation/arm64/booting.txt

booti_setup() takes care about this alignment and will relocate the
image if not properly aligned with memmove(). This can require up
to double the size of the loaded image and therefore accidentally
overwrite content placed there (i.e ramdisk_addr_r) for large kernel
images.

By adding text_offset to the default kernel_addr_r we can prevent that
from happening for kernels larger 18MB and also save a few cycles.

We can assume a text_offset of 0x80000 for most cases, all others will be
handled by booti_setup() anyway.

Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-13 18:12:35 +01:00
Kever Yang
f9326ec318 rockchip: pwm: convert to use live dt
use live dt api to get base addr

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-13 18:12:35 +01:00
Kever Yang
bbfef40f92 rockchip: clk: rk1108: convert to use live dt
Use live dt api to get cru base addr.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-13 18:12:35 +01:00
Kever Yang
08516431cf rockchip: clk: rk3328: convert to use live dt
Use live dt api to get cru base addr.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-13 18:12:35 +01:00
Kever Yang
995cde1f9c rockchip: clk: rk3288: convert to use live dt
Use live dt api to get cru base addr.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-13 18:12:35 +01:00
Kever Yang
99b8553cb8 rockchip: clk: rk322x: convert to use live dt
Use live dt api to get cru base addr.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-13 18:12:34 +01:00
Kever Yang
aca456471f rockchip: clk: rk3188: convert to use live dt
Use live dt api to get cru base addr.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-13 18:12:34 +01:00
Kever Yang
7ae028b669 rockchip: clk: rk3036: convert to use live dt
Use live dt api to get cru base addr.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-13 18:12:34 +01:00
Stefan Mavrodiev
d682cff440 sunxi: Add A20-SOM204-EVB-eMMC board
A20-SOM204 board has option with onboard 16GB eMMC. The chip is wired
to MMC2 slot.

This patch adds defconfig and dts files for this board. The dts is same
with mainline kernel.

Signed-off-by: Stefan Mavrodiev <stefan@olimex.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-03-13 22:40:35 +05:30
Stefan Mavrodiev
8dd6497d9c sunxi: Add A20-SOM204-EVB board
This is new System-On-Module platform with universal dimm socket for
easy insertation. The EVB board is designed to be universal with
future modules.

Base features of A20-SOM204 board includes:
	* 1GB DDR3 RAM
	* AXP209 PMU
	* KSZ9031 Gigabit PHY
	* AT24C16 EEPROM
	* Status LED
	* LCD connector
	* GPIO connector

There will be variants with the following options:
	* Second LAN8710A Megabit PHY
	* 16MB SPI Flash memory
	* eMMC card
	* ATECC508 crypto device

The EVB board has:
	* Debug UART
	* MicroSD card connector
	* USB-OTG connector
	* Two USB host
	* RTL8723BS WiFi/BT combo
	* IrDA transceiver/receiver
	* HDMI connector
	* VGA connector
	* Megabit ethernet transceiver
	* Gigabit ethernet transceiver
	* SATA connector
	* CAN driver
	* CSI camera
	* MIC and HP connectors
	* PCIe x4 connector
	* USB3 connector
	* Two UEXT connectors
	* Two user LEDs

Some of the features are multiplexed and cannot be used the same time:
CAN and Megabit PHY. Others are not usable with A20 SoC: PCIe and USB3.

This patch adds defconfig and dts files for this board. The dts is same
with mainline kernel, except some nodes are removed to make file
compatible with existing dtsi file.

Signed-off-by: Stefan Mavrodiev <stefan@olimex.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-03-13 22:38:58 +05:30
Stefan Mavrodiev
b30c419040 Move CONFIG_PHY_ADDR to Kconfig
CONFIG_PHY_ADDR is used for old-style configuration. This makes
impossible changing the PHY address, if multiple boards share a same
config header file (for example include/configs/sunxi-common.h).

Moving this to Kconfig helps overcoming this issue. It's defined
as entry inside PHYLIB section.

After the implemention, moveconfig was run. The issues are:
	- edb9315a	- CONFIG_PHYLIB is not enabled. Entry is
			  deleted.

	- ds414		- CONFIG_PHYLIB is in incompatible format:
			  { 0x1, 0x0 }. This entry is also deleted.

	- devkit3250	- The PHY_ADDR is in hex format (0x1F).
			  Manually CONFIG_PHY_ADDR=31 is added in
			  the defconfig.

After the changes the suspicious defconfigs passes building.

Signed-off-by: Stefan Mavrodiev <stefan@olimex.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
[jagan: rebased on master]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-03-13 22:36:33 +05:30
Samuel Holland
2d53018a0e net: sun8i_emac: Fix PHY initialization
The previous code tried to update the PHY parameters without waiting for
autonegotiation to complete. This caused wrong values to be written to
the EMAC in sun8i_adjust_link(). As a result, any commands that called
eth_start() before autonegotiation completed would find the network
nonfunctional. Fix this by using the correct function to start up the
PHY.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-03-13 21:16:51 +05:30
Tuomas Tynkkynen
b0b0d22f1a ARM: sunxi: Build u-boot-sunxi-with-spl.bin on ARM64 as well
In README.sunxi64 we tell the user how to optionally create
u-boot-sunxi-with-spl.bin by manually running cat. Instead, have the
build system create the file automatically just like it does for 32-bit
sunxi boards.

Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-03-13 20:36:51 +05:30
Tuomas Tynkkynen
155b116907 ARM: sunxi: Move u-boot-sunxi-with-spl.bin rule to Makefile
We're going to need this logic for 64-bit builds as well, so move it
out from under arch/arm/cpu/armv7.

Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-03-13 20:36:16 +05:30
Heinrich Schuchardt
8be4e61d01 mmc: sunxi: support cd-inverted
With CONFIG_DM_MMC the BananaPi does not detect SD cards.

The sunxi device trees use the cd-inverted property to indicate that
the card detect is inverted.

This property is documented in Linux kernel devicetree/bindings/mmc/mmc.txt
The property is not marked as deprecated.

A similar patch was posted by Tuomas but is in status "Changes Requested".
https://patchwork.ozlabs.org/patch/850377/

This patch is a stripped down version of his patch.

Suggested-by: Tuomas Tynkkynen <tuomas@tuxera.com>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-03-13 20:12:31 +05:30
Chen-Yu Tsai
1bcfba537e sunxi: Add reg property for USB OTG node in sun8i-a83t.dtsi
When the OTG node was added, its reg property for its address space was
missing. With commit f4f9896ac3 ("musb: sunxi: Use base address from
device tree"), the OTG controller's address is derived from the device
tree exclusively. The missing property results in U-boot crashing when
MUSB is initialized.

Fixes: b0bea66789 ("sunxi: Add USB and R_PIO nodes to sun8i-a83t.dtsi")
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@openedev.com>
2018-03-13 20:03:45 +05:30
Andre Przywara
47952b8e42 sunxi: Pine64: temporarily remove extra Pine64 non-plus DT
With the merge of the new u-boot.itb size check now the build for
pine64_plus_defconfig breaks, as this file gets too large:
=============
u-boot.itb exceeds file size limit:
  limit:  516096 bytes
  actual: 521852 bytes
  excess: 5756 bytes
make: *** [u-boot.itb] Error 1
=============
One easily fixable reason is that we actually have two .dtbs in our FIT
image, one for the regular Pine64+ board, and one for the non-plus version.
The only difference U-Boot cares about is the 100Mbit Ethernet PHY used
on the non-plus version, however Ethernet isn't enabled in the non-plus
DT anyway.
So we could avoid the non-plus special handling, and remove that extra
.dtb from the FIT image, which saves a few KBs and brings us back below the
limit. The Pine64 would boot with a Pine64+ .dtb, and would fail to
enable Ethernet. Given that it didn't work in the first place, this is not
a regression.
Once we switch to a non-MMC environment, we can bring this back, then
with a proper .dtb and hopefully working Ethernet.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-03-13 20:03:45 +05:30
Jagan Teki
c2a7a7ef86 arm: sunxi: Move spl spi sunxi code to mach-sunxi
This SUNXI variant SPL SPI code doesn't use either SPI or
SPL_FLASG subsystems due to size constraints and also placing
this code in drivers/mtd/spi will unnecessary build SPI_FLASH
code(if defined) which never required, hence moved to arch area.

And also renamed the file according to kconfig which resembles
proper name.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-03-13 19:50:10 +05:30
Jagan Teki
8480792287 spi: omap3: Skip set_mode, set_speed from claim
set_mode, set_seed functions has separate function pointers
in dm_spi_ops, so use them in relevent one instead of
calling from claim_bus.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-03-13 19:50:10 +05:30
Jagan Teki
15927aef02 spi: atcspi200: Drop non-dm code
Boards adp-ae3xx_defconfig, nx25-ae250_defconfig
already enabled DM_SPI, so non-dm code make no use
of it hence droped.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-03-13 19:50:10 +05:30
Tom Rini
f95ab1fb6e Prepare v2018.03
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-03-13 08:02:19 -04:00
Bryan O'Donoghue
ca89df7dd4 imx: hab: Convert DCD non-NULL error to warning
commit 8c4037a09a ("imx: hab: Ensure the IVT DCD pointer is Null prior
to calling HAB authenticate function.") makes the DCD field being NULL a
dependency.

This change though will break loading and executing of existing pre-signed
binaries on a u-boot update i.e. if this change is deployed on a board you
will be forced to redo all images on that board to NULL out the DCD.

There is no prior guidance from NXP that the DCD must be NULL similarly
public guidance on usage of the HAB doesn't call out this NULL dependency
(see boundary devices link).

Since later SoCs will reject a non-NULL DCD there's no reason to make a
NULL DCD a requirement, however if there is an actual dependency for later
SoCs the appropriate fix would be to do SoC version checking.

Earlier SoCs are capable (and happy) to authenticate images with non-NULL
DCDs, we should not be forcing this change on downstream users -
particularly if it means those users now must rewrite their build systems
and/or redeploy signed images in the field.

Fixes: 8c4037a09a ("imx: hab: Ensure the IVT DCD pointer is Null prior
to calling HAB authenticate function.")

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Utkarsh Gupta <utkarsh.gupta@nxp.com>
Cc: Breno Lima <breno.lima@nxp.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Link: https://boundarydevices.com/high-assurance-boot-hab-dummies
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-03-13 07:51:32 -04:00
Breno Lima
6d7403bf72 doc: mxc_hab: Update i.MX HAB documentation
The README.mxc_hab is outdated and need improvements, add the following
modifications:

- Reorganize document and remove duplicate content
- Add CST download link
- Update CST package name
- Align command lines with CST v2.3.3
- Update U-Boot binary name
- Remove CSF padding since is not documented in AN4581

Signed-off-by: Breno Lima <breno.lima@nxp.com>
2018-03-11 16:00:21 +01:00
Breno Lima
b887f0a68e doc: mxc_hab: Move HAB related info to the appropriate doc
Currently the High Assurance Boot procedure is documented in two
places:

- doc/README.imx6
- doc/README.mxc_hab

It is better to consolidate all HAB related information into
README.mxc_hab file, so move the content from README.imx6 to
README.mxc_hab.

Signed-off-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-03-11 16:00:16 +01:00
Bryan O'Donoghue
f0d5bd4ba5 imx: hab: Make usage of packed attribute consistent
commit cd2d46003c ("arm: imx: hab: Add IVT header definitions") declares
struct ivt_header as "__attribute__((packed))".

commit ed286bc80e ("imx: hab: Check if CSF is valid before
authenticating image") declares struct hab_hdr with __packed.

This patch makes the __packed convention consistent.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Utkarsh Gupta <utkarsh.gupta@nxp.com>
Cc: Breno Lima <breno.lima@nxp.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-03-11 16:00:00 +01:00
Bryan O'Donoghue
ffab61f4aa imx: hab: Fix usage of packed attribute
commit ed286bc80e ("imx: hab: Check if CSF is valid before authenticating
image") makes use of "__packed" as a prefix to the "struct hab_hdr"
declaration.

With my compiler "gcc version 7.2.1 20171011 (Linaro GCC 7.2-2017.11)" we
get:

./arch/arm/include/asm/mach-imx/hab.h:42:25: error: expected ‘=’, ‘,’, ‘;’,
‘asm’ or ‘__attribute__’ before ‘{’ token
 struct __packed hab_hdr {

Fix this problem by including <linux/compiler.h>

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Utkarsh Gupta <utkarsh.gupta@nxp.com>
Cc: Breno Lima <breno.lima@nxp.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-03-11 15:59:51 +01:00
Jagan Teki
2b0bc47661 ARM: dts: imx6dl-icore-rqs: Fix to include correct dtsi
This patch fixes the wrongly included dtsi file which was
breaking mainline support for Engicam i.CoreM6 DualLite/Solo RQS.

Linux commit details for the same change as
"ARM: dts: imx6dl: Include correct dtsi file for Engicam i.CoreM6
DualLite/Solo RQS"
(sha1: c0c6bb2322964bd264b4ddedaa5776f40c709f0c)

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-03-11 15:59:43 +01:00
Jagan Teki
85e1f6be03 ARM: dts: imx6qdl-icore-rqs: Sync usdhc4 node from Linux
usdhc4 node need to update pinctrl, bus-width and non-removable
properties, sync the same from Linux.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-03-11 15:59:34 +01:00
Tom Rini
2e5c42c630 Merge git://git.denx.de/u-boot-imx 2018-03-09 13:29:58 -05:00
Tom Rini
48ba1f3c38 configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-03-09 12:31:08 -05:00
Stefan Theil
63f881d46a tools/mkimage: Use proper output parameter in dtc-system call
The system call used by mkimage to run dtc redirects stdout to a
temporary file. This can cause problems on Windows (with a MinGW
cross-compiled version). Using the "-o" dtc parameter avoids
this problem.

Signed-off-by: Stefan Theil <stefan.theil@mixed-mode.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-03-09 12:31:07 -05:00
Marek Behún
51be471663 fs: ext4: Do not print mount fail message when not ext4 filesystem
Other filesystem drivers don't do this.

Signed-off-by: Marek Behun <marek.behun@nic.cz>
2018-03-09 12:31:07 -05:00
Heinrich Schuchardt
b7d6e0abab MAINTAINERS: bring sections into alphabetic order
NETWORK should be after NAND_FLASH.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-03-09 12:31:07 -05:00
Heinrich Schuchardt
4320e2fda4 scripts/coccinelle: add some more coccinelle tests
kmerr: verify that malloc and calloc are followed by a check to verify
that we are not out of memory.

badzero: Compare pointer-typed values to NULL rather than 0

Both checks are copied from the Linux kernel archive.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-03-09 12:31:07 -05:00
Heinrich Schuchardt
428e60e079 yaffs2: iterator variable cannot be NULL
The iterator of list_for_each() is never NULL.

Identified with coccinelle.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-03-09 12:31:06 -05:00
Alexander Graf
c9bf43dd9d bcm283x_pl011: Flush RX queue after setting baud rate
After the UART was initialized, we may still have bogus data in the
RX queue if it was enabled with incorrect pin muxing before.

So let's flush the RX queue whenever we initialize baud rates.

This fixes a regression with the dynamic pinmuxing code when enable_uart=1
is not set in config.txt on Raspberry Pis that use pl011 for serial.

Fixes: caf2233b28 ("bcm283x: Add pinctrl driver")
Reported-by: Göran Lundberg <goran@lundberg.email>
Reported-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
Tested-by: Tuomas Tynkkynen <tuomas@tuxera.com>
2018-03-09 12:31:04 -05:00
Alexander Graf
293b9814d7 serial_bcm283x_mu: Flush RX queue after setting baud rate
After the UART was initialized, we may still have bogus data in the
RX queue if it was enabled with incorrect pin muxing before.

So let's flush the RX queue whenever we initialize baud rates.

This fixes a regression with the dynamic pinmuxing code when enable_uart=1
is not set in config.txt.

Fixes: caf2233b28 ("bcm283x: Add pinctrl driver")
Reported-by: Göran Lundberg <goran@lundberg.email>
Reported-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
Tested-by: Tuomas Tynkkynen <tuomas@tuxera.com>
2018-03-09 12:26:47 -05:00
Heinrich Schuchardt
d06717f853 sunxi: video: mark framebuffer as EFI reserved memory
Inform the EFI subsystem that the framebuffer memory is reserved.

Without the patch the AllocatePool boot service allocates memory from the
framebuffer which will will be overwritten by screen output.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-03-09 18:24:49 +01:00
Tuomas Tynkkynen
b996b7d426 ARM: Drop unreferenced CONFIG_* defines named after boards
The following config symbols are only defined once and never referenced
anywhere else:

CONFIG_AT91SAM9263EK
CONFIG_AT91SAM9RLEK
CONFIG_BARIX_IPAM390
CONFIG_BOARD_H2200
CONFIG_EP9301
CONFIG_KZM_A9_GT
CONFIG_PICOSAM
CONFIG_PLATINUM_PICON
CONFIG_PLATINUM_TITANIUM
CONFIG_PM9261
CONFIG_PM9263
CONFIG_PM9G45
CONFIG_SIEMENS_DRACO
CONFIG_SIEMENS_PXM2
CONFIG_SIEMENS_RUT
CONFIG_SMDKC100
CONFIG_SMDKV310
CONFIG_STM32F4DISCOVERY

Most of them are config symbols named after the respective boards which
seems to have been a standard practice at some point.

Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
2018-03-09 09:23:10 -05:00
Tuomas Tynkkynen
17796171be ARM: Drop unreferenced CONFIG_* defines named after SoCs
The following config symbols are only defined once and never referenced
anywhere else:

CONFIG_ARM926EJS
CONFIG_CPUAT91
CONFIG_EXYNOS5800
CONFIG_SYS_CORTEX_R4

Most of them are config symbols named after the respective SoCs which
seems to have been a standard practice at some point.

Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
2018-03-09 09:23:10 -05:00
Tuomas Tynkkynen
c604f47a80 MIPS: Drop unreferenced CONFIG_* defines
The following config symbols are only defined once and never referenced
anywhere else:

CONFIG_DBAU1X00
CONFIG_PB1X00

Most of them are config symbols named after the respective boards which
seems to have been a standard practice at some point.

Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
2018-03-09 09:23:10 -05:00
Mario Six
d38826a3dc treewide: Fix gdsys mail addresses
The @gdsys.cc addresses are supposed to be used for mailing lists.
Switch all occurrences of @gdsys.de mail addresses to their @gdsys.cc
equivalent.

Also, Dirk's address was wrong in one place; fix that as well.

Signed-off-by: Mario Six <six@gdsys.cc>
2018-03-09 09:23:10 -05:00
Tuomas Tynkkynen
b771f0b126 ARM: qemu-arm: Increase CONFIG_SYS_CBSIZE
CONFIG_SYS_CBSIZE determines the maximum length of the kernel command
line, and the default value of 256 is too small for booting some Linux
images in the wild.

Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
2018-03-09 09:23:10 -05:00
Yasushi SHOJI
314d9f7e3e imx: syscounter: make sure asm is volatile
Without the volatile attribute, compilers are entitled to optimize out
the same asm().  In the case of __udelay() in syscounter.c, it calls
`get_ticks()` twice, one for the starting time and the second in the
loop to check the current time.  When compilers inline `get_ticks()`
they see the same `mrrc` instructions and optimize out the second one.
This leads to infinite loop since we don't get updated value from the
system counter.

Here is a portion of the disassembly of __udelay:

  88:	428b      	cmp	r3, r1
  8a:	f8ce 20a4 	str.w	r2, [lr, #164]	; 0xa4
  8e:	bf08      	it	eq
  90:	4282      	cmpeq	r2, r0
  92:	f8ce 30a0 	str.w	r3, [lr, #160]	; 0xa0
  96:	d3f7      	bcc.n	88 <__udelay+0x88>
  98:	e8bd 8cf0 	ldmia.w	sp!, {r4, r5, r6, r7, sl, fp, pc}

Note that final jump / loop at 96 to 88, we don't have any `mrrc`.

With a volatile attribute, the above changes to this:

  8a:	ec53 2f0e 	mrrc	15, 0, r2, r3, cr14
  8e:	42ab      	cmp	r3, r5
  90:	f8c1 20a4 	str.w	r2, [r1, #164]	; 0xa4
  94:	bf08      	it	eq
  96:	42a2      	cmpeq	r2, r4
  98:	f8c1 30a0 	str.w	r3, [r1, #160]	; 0xa0
  9c:	d3f5      	bcc.n	8a <__udelay+0x8a>
  9e:	e8bd 8cf0 	ldmia.w	sp!, {r4, r5, r6, r7, sl, fp, pc}
  a2:	bf00      	nop

I'm advised[1] to put volatile on all asm(), so this commit also adds it
to the asm() in timer_init().

[1]: https://lists.denx.de/pipermail/u-boot/2018-March/322062.html

Signed-off-by: Yasushi SHOJI <yasushi.shoji@gmail.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-03-09 13:06:14 +01:00
Fabio Estevam
b5b0e4e351 imximage: Remove failure when no IVT offset is found
Sometimes imximage throws the following error:

  CFGS    board/freescale/vf610twr/imximage.cfg.cfgtmp
  CFGS    board/freescale/vf610twr/imximage.cfg.cfgtmp
  MKIMAGE u-boot-dtb.imx
Error: No BOOT_FROM tag in board/freescale/vf610twr/imximage.cfg.cfgtmp
arch/arm/mach-imx/Makefile💯 recipe for target 'u-boot-dtb.imx' failed

Later on, when running mkimage for the u-boot.imx it will succeed in
finding the IVT offset.

Looks like some race condition happening during parallel build when
processing mkimage for u-boot-dtb.imx and u-boot.imx.

A proper fix still needs to be implemented, but as a workaround let's
remove the error when the IVT offset is not found.

It is useful to have such message, especially during bring-up phase,
but the build error that it causes is severe, so better avoid the
build error for now.

The error checking can be re-implemented later when we have a proper
fix.

Reported-by: Breno Lima <breno.lima@nxp.com>
Reported-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-03-09 13:04:02 +01:00
Heinrich Schuchardt
5fba532954 video: indicate code page of bitmap fonts
Add comments clarifying that the bitmap fonts support code page 437.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-03-06 10:22:37 +01:00
Kever Yang
19f124d829 pwm-backlight: make power-supply as option
Some pwm backlight may not need 'power-supply', let's make it as option
in pwm-backlight driver.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-06 10:17:15 +01:00
Heinrich Schuchardt
9ffa4d12a8 dm: video: support increased intensity (bold)
Support special rendition code 0 - reset attributes.
Support special rendition code 1 - increased intensity (bold).

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-03-06 10:05:49 +01:00
Heinrich Schuchardt
5c30fbb8ec dm: video: use constants to refer to colors
Use constants to refer to colors.
Adjust initialization of foreground and background color to avoid
setting reserved bits.
Consistently u32 instead of unsigned for color bit mask.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-03-06 10:03:20 +01:00
Heinrich Schuchardt
d7a75d3cd7 dm: video: correctly clean background in 16bit mode
In 16 bit mode we have to copy two bytes per pixels repeatedly and not
four. Otherwise we will see a striped pattern.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-03-06 10:01:40 +01:00
Heinrich Schuchardt
3aeb0cbe12 dm: video: show correct colors in graphical console
Get RGB sequence in pixels right (swap blue and red).
Do not set reserved bits.

qemu-system-i386 -display sdl -vga virtio and
qemu-system-i386 -display sdl -vga cirrus
now display the similar colors (highlighting still missing) as
qemu-system-i386 -nographic

Testing is possible via

	setenv efi_selftest test output
	bootefi selftest

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-03-06 10:00:32 +01:00
Tom Rini
5e62f82825 Prepare v2018.03-rc4
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-03-05 20:27:08 -05:00
Tom Rini
81f077f40f Merge git://git.denx.de/u-boot-sh 2018-03-05 20:24:17 -05:00
Tom Rini
3cbd5ff18d Devboards.de DBM-SoC1 BOARD: Add S line
This was missing the 'S' line causing a warning from genboardscfg.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-03-05 10:20:46 -05:00
Adam Ford
7f586d6fc4 ARM: DTS: Re-sync logicpd-som-lv with Linux 4.16-rc3
This should clean up a warning about a missing phy-cells

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-03-05 10:16:30 -05:00
Heinrich Schuchardt
4ef17f9cbe MAINTAINERS: bring sections into alphabetic order
POWER should be after ONENAND

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-03-05 10:16:30 -05:00
Fabio Estevam
7c0764b436 scripts/spelling.txt: Sync script with kernel 4.16-rc4
Keep spelling.txt in sync with the version from kernel 4.16-rc4.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-03-05 10:16:30 -05:00
Adam Ford
61ec4e0742 omap3_logic: Remove unnecessary undefs
Due to evolution of the MMC driver and better support, let's
remove unnecessary undefs.

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-03-05 10:16:29 -05:00
Adam Ford
24c9309254 ti_armv7_omap: Remove comment remnant
With the migration to Kconfig, the I2C block no longer exists in here.
Let's clean up the comment.

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-03-05 10:16:29 -05:00
Ed Bartosh
1bb34c8b89 MPC8315ERDB: Enable DHCP support
Enable DHCP support for this board.

Signed-off-by: Ed Bartosh <ed.bartosh@linux.intel.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-03-05 10:16:29 -05:00
Masahiro Yamada
b08c8c4870 libfdt: move headers to <linux/libfdt.h> and <linux/libfdt_env.h>
Thomas reported U-Boot failed to build host tools if libfdt-devel
package is installed because tools include libfdt headers from
/usr/include/ instead of using internal ones.

This commit moves the header code:
  include/libfdt.h         -> include/linux/libfdt.h
  include/libfdt_env.h     -> include/linux/libfdt_env.h

and replaces include directives:
  #include <libfdt.h>      -> #include <linux/libfdt.h>
  #include <libfdt_env.h>  -> #include <linux/libfdt_env.h>

Reported-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-03-05 10:16:28 -05:00
Paul Kocialkowski
e0d20dc152 tools: Include U-Boot libfdt headers from their actual path
There are no headers for libfdt in lib/libfdt, as they are instead
located in scripts/dtc/libfdt. Specifying lib/libfdt for headers
inclusion in host tools results in using the system libfdt headers,
which is not what we want. Change this to the proper path.

Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
2018-03-05 10:16:28 -05:00
Heinrich Schuchardt
a84f559262 input: indicate that code page 437 is used
Add a comment indicating that the German key map assumes code page 437.

Add support for character ² (square sign) in the German key map.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-03-05 10:06:05 -05:00
Marek Behún
de2069c761 pinctrl: Kconfig: Fix typo
Signed-off-by: Marek Behun <marek.behun@nic.cz>
2018-03-05 10:06:05 -05:00
Mario Six
1e5f89881a gpio: pca953x_gpio: Support label setting from DT
The PCA953x driver uses "gpio@%x_" as the GPIO bank name, where "%x" is
instantiated with the I2C address of the chip. While this works, it
becomes very confusing if a board has multiple PCAs with the same
address on different I2C busses, and it also becomes an issue when a
GPIO's value is to be set via the 'gpio' command, because this command
only ever sets the value of the first device it encounters, leaving the
other devices inaccessible to the command.

As to not break boards that rely on this naming scheme, we introduce a
new device tree string property "label" for the driver. If it exists, it
is used to build a bank name of the form "%s@%x_" (where %x is still
instantiated with the I2C address). If it does not exist, the legacy
labeling scheme is used.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-03-05 10:06:05 -05:00
Faiz Abbas
b432b1ebdf spl: Kconfig: Rename SPL_USBETH_SUPPORT to SPL_USB_ETHER to match with the U-boot CONFIG
Rename CONFIG_SPL_USBETH_SUPPORT to CONFIG_SPL_USB_ETHER.

This enables users to block text using CONFIG_IS_ENABLED() instead
of resorting to #if ladders with SPL and non-SPL cases.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
2018-03-05 10:06:05 -05:00
Stefan Agner
cd655514aa tools/env: allow equal sign as key value separation
Treat the first equal sign as a key/value separation too. This makes
the script files compatible with mkenvimage input file format. It
won't support variables with equal signs anymore, but this seems not
really like a loss.

Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
2018-03-05 10:05:36 -05:00
Jeremy Boone
b3f4070340 Atmel TPM: Fix potential buffer overruns
Ensure that the Atmel TPM driver performs sufficient
validation of the length returned in the TPM response header.
This patch prevents memory corruption if the header contains a
length value that is larger than the destination buffer.

Signed-off-by: Jeremy Boone <jeremy.boone@nccgroup.trust>
2018-03-05 10:05:36 -05:00
Jeremy Boone
afe0e6bddf Infineon TPM: Fix potential buffer overruns
Ensure that the Infineon I2C and SPI TPM driver performs adequate
validation of the length extracted from the TPM response header.
This patch prevents integer underflow when the length was too small,
which could lead to memory corruption.

Signed-off-by: Jeremy Boone <jeremy.boone@nccgroup.trust>
2018-03-05 10:05:36 -05:00
Jeremy Boone
12e0ab327d STMicro TPM: Fix potential buffer overruns
This patch prevents integer underflow when the length was too small,
which could lead to memory corruption.

Signed-off-by: Jeremy Boone <jeremy.boone@nccgroup.trust>
2018-03-05 10:05:36 -05:00
Marek Vasut
b2c38dc3d3 ARM: dts: rmobile: Add PHY reset GPIO
This patch got dropped during the update of DTs to 4.14, re-add it
back. This adds reset GPIOs to the ethernet PHYs.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-03-05 11:48:53 +01:00
Marek Vasut
33ba5b3d1d ARM: dts: rmobile: Make PFC and RST available early on Gen2 only
These do not need to be available early on Gen3 , so move them to
the respective DT files.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-03-05 10:59:41 +01:00
Marek Vasut
60299e0d4e ARM: rmobile: Add R8A77965 Salvator-XS board support
Add R8A77965 M3N Salvator-XS development kit support. This kit is
similar to the other Salvator-X(S) ones, except is has M3N SoC on
it.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-03-05 10:59:38 +01:00
Marek Vasut
89fcfd1f58 ARM: dts: rmobile: Add SDHI nodes to R8A77965 M3N DT
Add SDHI nodes to r8a77965.dtsi to get eMMC and SD slots operational.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-03-05 10:59:38 +01:00
Marek Vasut
4610343950 ARM: dts: rmobile: Add xHCI node to R8A77965 M3N DT
Add xHCI node to r8a77965.dtsi to get xHCI USB operational.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-03-05 10:59:38 +01:00
Marek Vasut
cce09d2676 ARM: dts: rmobile: Add EHCI nodes to R8A77965 M3N DT
Add generic EHCI nodes to r8a77965.dtsi to get EHCI USB operational.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-03-05 10:59:38 +01:00
Marek Vasut
beb84f921a ARM: dts: rmobile: Add RAVB node to R8A77965 M3N DT
Add RAVB node to r8a77965.dtsi to get ethernet operational.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-03-05 10:59:38 +01:00
Marek Vasut
50e031efa4 ARM: dts: rmobile: Import R8A77965 M3N DT files from Linux
Import the R8A77965 M3N DT from Linux 4.16-rc1 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-03-05 10:59:38 +01:00
Marek Vasut
4f0533ffcd usb: xhci-rcar: Add R8A77965 M3N entries
Add entries for the R8A77965 M3N SoC.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-03-05 10:59:38 +01:00
Marek Vasut
d1fe3182fa pinctrl: rmobile: Add R8A77965 M3N entries
Add entries for the R8A77965 M3N SoC.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-03-05 10:59:38 +01:00
Marek Vasut
7a7081e6f3 net: ravb: Add R8A77965 M3N entries
Add entries for the R8A77965 M3N SoC.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2018-03-05 10:59:37 +01:00
Marek Vasut
d6eb25c2f1 mmc: uniphier-sd: Add R8A77965 M3N entries
Add entries for the R8A77965 M3N SoC.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-03-05 10:59:37 +01:00
Marek Vasut
76ed8f0542 gpio: rcar: Add R8A77965 M3N entries
Add entries for the R8A77965 M3N SoC.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-03-05 10:59:37 +01:00
Marek Vasut
c6d99986f0 clk: renesas: Add R8A77965 M3N entries
Add entries for the R8A77965 M3N SoC.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-03-05 10:59:37 +01:00
Marek Vasut
f295a5697e ARM: rmobile: Add R8A77965 M3N IDs
Add CPU and PRR IDs for R8A77965 M3N SoC.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-03-05 10:59:37 +01:00
Tom Rini
77bba970e2 Merge branch 'master' of git://git.denx.de/u-boot-socfpga 2018-03-01 15:50:52 -05:00
Tom Rini
e1541b1d7f Merge branch 'master' of git://git.denx.de/u-boot-sh 2018-03-01 15:50:43 -05:00
Tom Rini
6256b02db3 Merge tag 'xilinx-kconfig-for-v2018.03' of git://www.denx.de/git/u-boot-microblaze
Xilinx Kconfig changes for v2018.03

- Moving some macros to Kconfig

# gpg: Signature made Thu 01 Mar 2018 10:45:58 AM EST using DSA key ID 294A0C21
# gpg: Good signature from "Michal Simek <monstr@monstr.eu>"
# gpg:                 aka "Michal Simek (Xilinx) <michals@xilinx.com>"
# gpg:                 aka "Michal Simek (Xilinx) <michal.simek@xilinx.com>"
2018-03-01 12:41:21 -05:00
Vipul Kumar
3ccc207a30 mmc: Added Kconfig support for CONFIG_ZYNQ_SDHCI_MIN_FREQ
This patch added Kconfig support for CONFIG_ZYNQ_SDHCI_MIN_FREQ
and enabled it in respective defconfig.

Signed-off-by: Vipul Kumar <vipulk@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-01 16:44:10 +01:00
Vipul Kumar
5dc5a53c5e mmc: Added Kconfig support for CONFIG_ZYNQ_SDHCI_MAX_FREQ
This patch added Kconfig support for CONFIG_ZYNQ_SDHCI_MAX_FREQ
and enabled it in respective defconfig.

Signed-off-by: Vipul Kumar <vipulk@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-01 16:44:10 +01:00
Vipul Kumar
71d5a14204 microblaze: Added Kconfig support for CONFIG_XILINX_GPIO
This patch added Kconfig support for CONFIG_XILINX_GPIO
and enabled it in respective defconfig.

Signed-off-by: Vipul Kumar <vipulk@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-01 15:43:45 +01:00
Vipul Kumar
e885b4255f i2c: Added kconfig support for CONFIG_ZYNQ_I2C0 and CONFIG_ZYNQ_I2C1
This patch added Kconfig support for CONFIG_ZYNQ_I2C0 and
CONFIG_ZYNQ_I2C1 and enabled it in respective defconfig.

Signed-off-by: Vipul Kumar <vipulk@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-01 08:03:01 +01:00
Vipul Kumar
5c32de202b i2c: Added Kconfig support for CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET
This patch added Kconfig support for CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET
and enabled it in respective defconfig.

Signed-off-by: Vipul Kumar <vipulk@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-01 08:03:01 +01:00
Vipul Kumar
ce3c9a59af i2c: Added Kconfig support for CONFIG_SYS_I2C_ZYNQ_SPEED
This patch added Kconfig support for CONFIG_SYS_I2C_ZYNQ_SPEED
and set it to default value 100000.

Signed-off-by: Vipul Kumar <vipulk@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-01 08:03:01 +01:00
Vipul Kumar
e7affad190 i2c: Added Kconfig support for CONFIG_SYS_I2C_ZYNQ_SLAVE
This patch added Kconfig support for CONFIG_SYS_I2C_ZYNQ_SLAVE
and set it default to 0.

Signed-off-by: Vipul Kumar <vipulk@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-01 08:03:01 +01:00
Vipul Kumar
fc3a6f1c53 i2c: Enabled CONFIG_SYS_I2C_ZYNQ in the respective defconfig
This patch enabled CONFIG_SYS_I2C_ZYNQ in the respective
defconfig.

Signed-off-by: Vipul Kumar <vipulk@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-01 08:03:01 +01:00
Vipul Kumar
38a69e96b3 i2c: Added Kconfig support for CONFIG_SYS_I2C_ZYNQ
This patch added Kconfig support for CONFIG_SYS_I2C_ZYNQ.

Signed-off-by: Vipul Kumar <vipulk@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-01 08:03:00 +01:00
Vipul Kumar
3990c9d627 arm: zynq: fpga: Added Kconfig support for CONFIG_FPGA_ZYNQPL
This patch added Kconfig support for CONFIG_FPGA_ZYNQPL and migrates the
values over to the defconfigs.

Signed-off-by: Vipul Kumar <vipulk@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
2018-02-28 13:00:25 -05:00
Vipul Kumar
f415834608 fpga: Added Kconfig support for FPGA_SPARTAN3
This patch added Kconfig support for FPGA_SPARTAN3 and migrates the
values over to the defconfigs.

Signed-off-by: Vipul Kumar <vipulk@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
2018-02-28 13:00:04 -05:00
Tom Rini
d231182441 Merge git://git.denx.de/u-boot-net 2018-02-27 20:10:28 -05:00
Michal Simek
3b3ea2c56e Kconfig: cmd: Make networking command dependent on NET
Enable networking command only when NET is enabled.
And remove selecting NET for CMD_NET

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-02-27 16:25:30 -05:00
Marek Vasut
44c5580f1c ARM: rmobile: Build u-boot-spl.srec on Gen2
The u-boot-spl.srec is needed for the minimon update on Gen2 SoCs,
conveniently generate this file if SPL is enabled.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Tom Rini <trini@konsulko.com>
2018-02-27 21:05:35 +01:00
Marek Vasut
3ee58ea425 Makefile: add u-boot-spl.srec target
The u-boot-spl.srec is needed for some platforms, add target to generate this file.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Tom Rini <trini@konsulko.com>
2018-02-27 21:05:35 +01:00
Masaru Nagai
b691c9a668 ARM: rmobile: Build u-boot-elf.srec on Gen3
The u-boot-elf.srec is needed for the minimon update on Gen3 SoCs,
conveniently generate this file.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-02-27 21:05:35 +01:00
Masaru Nagai
341ca90560 Makefile: add u-boot-elf.srec target
The u-boot-elf.srec is needed for some platforms, add target to generate this file.

Signed-off-by: Masaru Nagai <masaru.nagai.vx@renesas.com>
Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-02-27 21:05:35 +01:00
Chin Liang See
92afd7ecf9 arm: socfpga: cyclone5: Enable Macronix flash support
Enable Macronix flash support for Cyclone5 SoC

Signed-off-by: Chin Liang See <chin.liang.see@intel.com>
2018-02-27 20:45:45 +01:00
Arno Steffens
a0fd381fc6 net: phy: smsc: Add SMSC LAN8741 support
Signed-off-by: Arno Steffens <star@gmx.li>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-02-26 15:51:37 -06:00
Bernhard Messerklinger
8f5672ea9d net: e1000: Fix e1000_igb semaphore handling
Fix commit f1bcad22dd ("net: e1000: add support for writing to
EEPROM").

Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-02-26 15:51:36 -06:00
Eugeniy Paltsev
1693a577be NET: designware: fix clock enable
After commit ba1f966725 ("net: designware: add clock support")
we got NET broken on axs101 and axs103 platforms.

Some clock don't support gating so their clock drivers don't
implement .enable/.disable callbacks. In such case clk_enable
returns -ENOSYS.
Also some clock drivers implement .enable/.disable callbacks not for all
clock IDs and return -ENOSYS (or -ENOTSUPP) for others.

If we have such clock in 'clocks' list of designware ethernet controller
node we fail to probe designware ethernet.

Fix it.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-02-26 15:49:26 -06:00
Mario Six
8d6312032e phy: Fix style violations
Fix some style violations in the generic PHY management code.

Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-02-26 15:48:55 -06:00
Mario Six
c550389881 cmd: mdio: Fix style violations
Fix some style violations in the MDIO command.

Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-02-26 15:47:43 -06:00
Mario Six
431be621c6 net: phy: marvell 88e151x: Fix handling of bare RGMII interface type
Commit 68e6ecadc5 ("net: phy: marvell 88e151x: Fix handling of RGMII
interface types") fixed the initialization of 88e151x phys, but made it
so that interfaces of type PHY_INTERFACE_MODE_RGMII had both RX and TX
delay bits cleared. The default (like in m88e1111s_config) is to have
both bits set.

Hence, this patch changes the behavior in the PHY_INTERFACE_MODE_RGMII
case so that both bits are set.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-02-26 15:47:07 -06:00
Mario Six
76f11d3adf net: phy: marvell: Fix style violations
Fix some style violations (mostly wrong indentions) in the Marvell PHY
driver.

Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-02-26 15:46:09 -06:00
Mario Six
1313aaf031 net: tsec: Make live-tree compatible
Make the tsec ethernet driver compatible with a live device tree.

Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-02-26 15:45:56 -06:00
Mario Six
5775f00e12 net: tsec: Fix memory leak in error path
tsec_initialize allocates a private driver structure using malloc.
Should the memory allocation of this private structure fail, the
function execution is aborted with a return 0, but the previously
allocated device structure is never freed, hence leaked.

Free the device structure in the error case.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-02-26 15:28:43 -06:00
Mario Six
d38de3380d net: tsec: Fix style violations
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-02-26 15:28:39 -06:00
Marek Vasut
2155a7981d ARM: dts: rmobile: Import proper DTS for H2 Stout
Replace the placeholder DTS for R8A7790 H2 Stout with a proper
DTS from Linux next .

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-02-26 20:00:01 +01:00
Marek Vasut
7fb464302e ARM: socfpga: Add new CycloneV SoC Devboards DBM-SoC1 board
Add support for a new boards from devboards.de , the DBM-SoC1 .
This board has one ethernet port, one USB OTG port and USB UART.

Signed-off-by: Marek Vasut <marex@denx.de>
2018-02-26 14:06:02 +01:00
Tom Rini
4bafceff0e Merge git://git.denx.de/u-boot-mmc 2018-02-25 22:28:59 -05:00
Jean-Jacques Hiblot
beac7d33d9 mmc: omap_hsmmc: use a default 52MHz max clock rate if none is specified
mmc_of_parse() doesn't set a default value if none is available in DT.
In that case, use a default 52MHz clock rate.

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Tested-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-02-26 10:52:15 +09:00
Jean-Jacques Hiblot
27a4b3bc4c mmc: omap_hsmmc: make it possible to compile out ADMA support
Some platforms don't have ADMA controllers. For those platforms, compiling
it out reduces the size of the binary by about 600 bytes.
Leaving the support in doesn't break things as the driver checks at runtime
if the ADMA2 controller is present.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Tested-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-02-26 10:52:15 +09:00
Jean-Jacques Hiblot
c7d08d80c3 mmc: omap_hsmmc: compile out write support if not needed
This reduces the size of the binary by about 196 bytes.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Tested-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-02-26 10:52:15 +09:00
Jean-Jacques Hiblot
45530e3943 mmc: omap_hsmmc: do not embed struct mmc in struct omap_hsmmc_plat
The area for struct mmc can be allocated dynamically. It greatly reduces
the size of struct omap_hsmmc_plat. This is useful in cases where the board
level code declares one or two struct omap_hsmmc_plat because it doesn't
use the Driver Model.

This saves around 740 bytes for the am335x_evm SPL.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Tested-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-02-26 10:52:15 +09:00
Tom Rini
85447f785c Merge git://git.denx.de/u-boot-rockchip 2018-02-25 15:39:10 -05:00
Tom Rini
e12546de54 Merge git://git.denx.de/u-boot-imx 2018-02-25 15:38:42 -05:00
Tom Rini
39bcbb7740 bootcount: Migrate CONFIG_SYS_BOOTCOUNT_ADDR
Migrate the users of CONFIG_SYS_BOOTCOUNT_ADDR to Kconfig.  We can
provide a default for BOOTCOUNT_AM33XX as that's a specific part of the
RTC in use.  We can also provide a default for ARCH_LS1043A and
ARCH_LS1021A as they had been previously calculated and their symbols
are in Kconfig.  In the case of other QE-enabled platforms, they are not
so we must update the relevant defconfig files.  The previous default
only applied in some cases, even on a specific SoC family.

Reviewed-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Alex Kiernan <alex.kiernan@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-02-25 13:41:54 -05:00
Fabio Estevam
0339086bd9 imx: spl: Partially revert "spl: eMMC/SD: Provide one __weak spl_boot_mode() function"
Commit d695d66278 ("spl: eMMC/SD: Provide one __weak spl_boot_mode()
function") breaks the boot on several i.MX6 boards,
such as cuboxi and wandboard:

U-Boot SPL 2018.03-rc1-00212-g48914fc119 (Feb 10 2018 - 11:04:33 +1300)
Trying to boot from MMC1
Failed to mount ext2 filesystem...
spl_load_image_ext: ext4fs mount err - 0

Partially revert it so that we can boot U-Boot again on these
i.MX6 platforms.

Reported-by: Jonathan Gray <jsg@jsg.id.au>
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Tested-by: Breno Lima <breno.lima@nxp.com>
2018-02-24 19:33:32 +01:00
Philipp Tomsich
434d5a00a4 rockchip: clk: rk3399: handle set_rate/get_rate for PLL_PPLL
The device-tree node for the PMU clk controller assigns to its parent
(i.e. PLL_PPLL) even though this clock currently is set up statically
by an init-function.

In order to avoid unexpected failures, a simple implementation of
set_rate (which accepts requests, but notifies the caller of the
preset frequency in its return value) and get_rate (which always
returns the preset frequency) are added.

Note that this is required for the RK808 PMIC to probe successfully on
the RK3399-Q7, following the support for the assigned-clocks property.

References: commit f4fcba5c5b ("clk: implement clk_set_defaults()")
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
2018-02-24 18:50:03 +01:00
Jagan Teki
33554fcec9 rockchip: rk3288: Fix wrong TPL_TEXT_BASE
TPL offset 0xff704004 is unaligned address which is adding nearest
8-bytes for next instruction, So  0xff704004 is adding 0x20 for
proper alignment which is causing the next instruction data
0xefffffff is moved.

Hexdump with overlaped bytes:
-----------------------------
0000000 0000 0000 0000 0000 0000 0000 0000 0000
0000010 0000 0000 0000 0000 0000 0000 ffff eaff

So, Fix the TEXT_BASE for proper aligned address 0xff704000

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-02-24 18:47:23 +01:00
Jagan Teki
849f672bdb rockchip: rk3288: Add TPL_LDSCRIPT
Due to size limitations in SPL by adding falcon mode,
rk3288 support TPL. In order to not overlap SPL_TEXT_BASE
add TPL_TEXT_BASE with u-boot-tpl.lds that intern call
u-boot-spl.lds with proper TEXT_BASE values.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-02-24 18:47:22 +01:00
Philipp Tomsich
35a69a3b01 rockchip: clk: rk3368: handle clk_enable requests for GMAC
Since commit ba1f966725 ("net: designware: add clock support"), the
designware GMAC driver enables all referenced clocks. While this is a
no-op for the RK3368 during boot-up (reset behaviour has all the clock
gates open anyway), we still need to handle the clock-ids passed in
the enable op of the clock-driver and return a success.

This change extends the RK3368 clk driver to:
(a) provide a enable op
(b) signals success to the caller when the clocks for the GMAC are
    enabled (no actual action is necessary as the gates are open
    after reset)

References: commit ba1f966725 ("net: designware: add clock support")
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
2018-02-24 18:46:45 +01:00
Philipp Tomsich
a9bdd67653 rockchip: clk: rk3399: handle clk_enable requests for GMAC
Since commit ba1f966725 ("net: designware: add clock support"), the
designware GMAC driver enables all referenced clocks. While this is a
no-op for the RK3399 during boot-up (reset behaviour has all the clock
gates open anyway), we still need to handle the clock-ids passed in
the enable op of the clock-driver and return a success.

This change extends the enable-op of the rk3399 clk driver to signal
success to the caller when the clocks for the GMAC are enabled.

References: commit ba1f966725 ("net: designware: add clock support")
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
2018-02-24 18:46:45 +01:00
Jagan Teki
520d822632 ARM: dts: i.MX6QDL: icore-rqs: Fix eMMC detection during SPL
usdhc4 has eMMC on icore-rqs boards, SPL is not detecting
it becuase of u-boot,dm-spl flag so add it to make eMMC working.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-02-24 17:19:09 +01:00
Alex Kiernan
e9a98ba312 Remove CONFIG_SYS_BOOTCOUNT_SINGLEWORD
Tidy up CONFIG_SYS_BOOTCOUNT_SINGLEWORD from the whitelist as there's
no remaining uses of it left.

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
2018-02-24 08:43:45 -05:00
Alex Kiernan
4bc4f8a67a Migrate CONFIG_BOOTCOUNT_ALEN to Kconfig
Convert CONFIG_BOOTCOUNT_ALEN to Kconfig
Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
2018-02-24 08:43:45 -05:00
Alex Kiernan
aa5a863283 Migrate generic bootcount to Kconfig
Make generate boot counter selected in the same way as other boot count
drivers

Reviewed-by: Lukasz Majewski <lukma@denx.de>
Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
2018-02-24 08:43:42 -05:00
Alex Kiernan
bec8c647bc Integrate AT91 bootcount driver
Integrate Boot counter for Atmel AT91SAM9XE into Kconfig

Reviewed-by: Lukasz Majewski <lukma@denx.de>
Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
2018-02-24 08:43:42 -05:00
Alex Kiernan
8981433f4d Convert CONFIG_BOOTCOUNT_EXT to Kconfig
This converts the following to Kconfig:
  CONFIG_BOOTCOUNT_EXT

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
2018-02-24 08:43:42 -05:00
Alex Kiernan
6cdd70eb52 Convert CONFIG_BOOTCOUNT_I2C to Kconfig
This converts the following to Kconfig:
  CONFIG_BOOTCOUNT_I2C

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
2018-02-24 08:43:42 -05:00
Alex Kiernan
ff5410d34b Convert CONFIG_BOOTCOUNT_RAM to Kconfig
This converts the following to Kconfig:
  CONFIG_BOOTCOUNT_RAM

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
2018-02-24 08:43:39 -05:00
Alex Kiernan
04c96ed2a6 Convert CONFIG_BOOTCOUNT_ENV to Kconfig
This converts the following to Kconfig:
  CONFIG_BOOTCOUNT_ENV

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
2018-02-24 08:43:36 -05:00
Alex Kiernan
c35e2d91a9 Convert CONFIG_BOOTCOUNT_AM33XX to Kconfig
This converts the following to Kconfig:
  CONFIG_BOOTCOUNT_AM33XX

Reviewed-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
Acked-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
2018-02-24 08:43:31 -05:00
Alex Kiernan
c1e1c1eca1 Prepare for multiple bootcount drivers
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
2018-02-24 08:43:11 -05:00
Alex Kiernan
3dccc10ee1 Merge CONFIG_BOOTCOUNT and CONFIG_BOOTCOUNT_LIMIT
CONFIG_BOOTCOUNT was only used in mx53ppd, merge it with
CONFIG_BOOTCOUNT_LIMIT

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Ian Ray <ian.ray@ge.com>
2018-02-24 08:43:11 -05:00
Tom Rini
0bb430c849 Merge git://git.denx.de/u-boot-video 2018-02-24 08:02:17 -05:00
Adam Ford
ba8bf9481b Remove config_distro_defaults.h
With the contents of config_distro_defaults.h migrated to Kconfig,
we can remove this header file completely

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-02-23 21:44:22 -05:00
Adam Ford
d021e94210 Convert CONFIG_BOOTP_BOOTPATH et al to Kconfig
This converts the following to Kconfig:
   CONFIG_BOOTP_BOOTPATH
   CONFIG_BOOTP_DNS
   CONFIG_BOOTP_GATEWAY
   CONFIG_BOOTP_HOSTNAME
   CONFIG_BOOTP_PXE
   CONFIG_BOOTP_SUBNETMASK
   CONFIG_CMDLINE_EDITING
   CONFIG_AUTO_COMPLETE
   CONFIG_SYS_LONGHELP
   CONFIG_SUPPORT_RAW_INITRD
   CONFIG_ENV_VARS_UBOOT_CONFIG

Signed-off-by: Adam Ford <aford173@gmail.com>
[trini: Re-run the migration]
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-02-23 21:41:49 -05:00
Philipp Tomsich
3f56552227 rockchip: video: update MAINTAINERS
The video drivers (VOP, HDMI encoder, LVDS encoder, MIPI encoder) for
Rockchip SOCs are self-contained and are mainly impacted by other
changes in the architecture support (e.g. pinctrl, clocking, etc).

Let's add these to the list of files maintained as part of the
Rockchip port.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
2018-02-23 20:49:07 +01:00
Philipp Tomsich
5de0b5a36a rockchip: video: rk_vop: migrate to livetree
This migrates rk_vop (the shared functions used by multiple VOP
mini-drivers) to be compatible with a live tree.

Unfortunately, there's
(i)  a lot of tree traversal needed for a VOP (as each active VOP
     vnode references back to the endpoints in the encoders and vice
     versa) to configure the connection between VOPs and encoders;
(ii) the DTS binding is not too sane and one needs to walk a node's
     parents (the original code just assumed that the device would
     live 3 levels above the property linked through a phandle) until
     a UCLASS_DISPLAY device can be found.

As part of the migration, the code for finding the enclosing display
device has been changed to not assume a specific depth of nesting
(i.e. we walk until we reach the root or find a matching device) and
to use the newly introduced (in the same series) ofnode_get_parent()
function.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
2018-02-23 20:48:48 +01:00
Philipp Tomsich
18e48776a6 rockchip: video: rk_hdmi: migrate to livetree
The rk_hdmi (shared functions for multiple HDMI mini-drivers) has been
using devfdt_get_addr() to read the HDMI controller's IO base address.
This will cause a failure with a live tree.

This changes the driver to use dev_read_addr() which is safe both for
flat trees and live trees.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
2018-02-23 20:48:31 +01:00
Kever Yang
b4f20767b1 core: add ofnode_get_by_phandle() api
We need to get ofnode from a phandle, add interface to support
both live dt and fdt.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-02-23 20:48:09 +01:00
Philipp Tomsich
e2d5997ffd core: ofnode: add ofnode_get_parent function
The Rockchip video drivers need to walk the ofnode-parrents to find
an enclosing device that has a UCLASS_DISPLAY driver bound.  This
adds a ofnode_get_parent()-function that returns the parent-node.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
2018-02-23 20:47:47 +01:00
Tom Rini
0c0eaee562 Merge git://git.denx.de/u-boot-sh 2018-02-23 13:05:03 -05:00
Tom Rini
1c124d379d Merge git://git.denx.de/u-boot-usb 2018-02-23 13:04:48 -05:00
Masahiro Yamada
9ab81fcc8a config_whitelist: remove false-positive CONFIG options
U-Boot pulled in several core makefiles from Linux.  The following
are not used in U-Boot:

  - CONFIG_DEBUG_SECTION_MISMATCH
  - CONFIG_FTRACE_MCOUNT_RECORD
  - CONFIG_GCOV_KERNEL
  - CONFIG_GCOV_PROFILE_ALL
  - CONFIG_KASAN
  - CONFIG_MODVERSIONS

We can remove the unused code if we like. (although it will get the
scripts out of sync)

CONFIG_BOOM and CONFIG_HIS_DRIVER are just mentioned in the comment
block of scripts/basic/fixdep.c

CONFIG_SHELL is not configuration, but a variable for internal-use.
It is just a historical misnomer in Kbuild.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-02-23 10:57:36 -05:00
Adam Ford
2a5945eee6 omap3_logic: Fix Environmental location
For the omap3_logic boards, the environment is always in NAND.
This removes the ENV_IS_IN_FAT flag to eliminate the extra chatter.

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-02-23 10:40:52 -05:00
Marek Vasut
0a84925974 sf: Add ISSI IS25LP256 entry
Add entry for ISSI IS25LP256 part.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Jagan Teki <jagan@openedev.com>
2018-02-23 10:40:52 -05:00
Alexey Brodkin
1022807c21 Makefile: Don't mess with .text section location for selected arches
Most of architectures have .text section situated in the very beginning
of U-Boot binary and thus it is very logical that CONFIG_SYS_TEXT_BASE
is used on final linkage step to specify where U-Boot gets linked to.

For that we pass the following construction to the LD:
---------------------------->8-----------------------
xxx-ld ...  -Ttext $(CONFIG_SYS_TEXT_BASE) ...
---------------------------->8-----------------------

But there could be exceptions. For example:
 1. In case of ARCv2 we want to put vectors table in its own section
    .ivt in front of .text section which means we need either add an
    offset to CONFIG_SYS_TEXT_BASE to compensate for .ivt or don't
    pass "-Ttext" to the LD at all and specify link base in linker
    script directly.

 2. Some architectures even though have .text section in the very
    beginning of the U-Boot image still use different symbols to
    specify link-base:
       * NIOS2: CONFIG_SYS_MONITOR_BASE (which I really like because
         that exactly what makes sense - where out image starts but not
         beginning of its .text section which just happened to match the
         whole image beginning)
       * EXTENSA: CONFIG_SYS_TEXT_ADDR
       * X86: Which doesn't use CONFIG_SYS_MONITOR_BASE in case of EFI
         otherwise sets explicit link base in u-boot.lds

I think that's good to allow for flexibility and don't require each and
every architecture or even platform to specify CONFIG_SYS_TEXT_BASE as well
as use it to set .text section location.

So let's only pass "-Ttext xxx" for those architectures who don't set
link-base explicitly in their linker scripts.

This patch iaddresses comments for previously sent
https://patchwork.ozlabs.org/patch/867540/.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Max Filippov <jcmvbkbc@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
2018-02-23 10:40:51 -05:00
Karl Beldan
fa7b8eae7c arm64: show_regs: Dump the LRs HW values
These were dropped in [1], after relocation, for their values offset by
reloc_off.
Unconditionally show the HW values and add a '(reloc)' hint for the
offset values showed after relocation.
Also, the LRs' dumps are now formatted the same way the other regs' are.

[1] Commit 082693f4 ("arm64 :show_regs: show the address before relocation")

Signed-off-by: Karl Beldan <karl.beldan+oss@gmail.com>
2018-02-23 10:40:51 -05:00
Jonathan Gray
a2d5efd74f tools/kwbimage: fix LibreSSL build
Fix build after addition of RSA_get0_key() to LibreSSL.
Patch from Theo Buehler and Stuart Henderson.

Signed-off-by: Theo Buehler <tb@openbsd.org>
Signed-off-by: Stuart Henderson <sthen@openbsd.org>
2018-02-23 10:40:51 -05:00
Michal Simek
744247de29 net: Remove Xilinx ll_temac driver
ll_temac driver was used by Xilinx Microblaze big endian and
Xilinx ppc405/ppc440 SoCs.

ppc support was removed by: "powerpc: remove 4xx support"
(sha1: 98f705c9ce)
and Microblaze BE is not tested for a long time that's why this driver
can be removed because none is going to updated it to DM anyway.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-02-23 10:40:51 -05:00
Faiz Abbas
e293542c1f configs: am335x_evm_usbspl: Add CONFIG_SPL_NET_VCI_STRING
Add CONFIG_SPL_NET_VCI_STRING to enable USB-Ethernet boot mode
support.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-02-23 10:40:50 -05:00
Thierry Reding
ed5af03f9b fdt: Fixup only valid memory banks
Memory banks with address 0 and size 0 are empty and should not be
passed to the OS via device tree.

Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-02-23 10:40:50 -05:00
Bernhard Messerklinger
78b7d37b1b ns16550: Fix mem mapped endian check
Do a explicit check for CONFIG_SYS_BIG_ENDIAN and
CONFIG_SYS_LITTLE_ENDIAN to avoid errors on platforms where both
are undefined (x86).

Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com>
Reviewed-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
2018-02-23 10:40:50 -05:00
Bernhard Messerklinger
664758c3dd pci: Fix decode regions for memory banks
Since memory banks may not be located behind each other we need to add
them separately.

Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com>
Reviewed-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
2018-02-23 10:40:50 -05:00
Andrew F. Davis
4be9f1f25d defconfig: k2x_hs_evm: Re-enable TI_SECURE_DEVICE in HS K2x parts
These got removed in config re-syncs due to a Kconfig bug. Add these
back here.

Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-02-23 10:22:40 -05:00
Andrew F. Davis
952c346272 env: Fix missed getenv_ulong to env_get_ulong conversion
This seems to have been missed, possibly due to the inability to
enable TI_SECURE_DEVICE on Keystone2 devices previously.

Fixes: bfebc8c965 ("env: Rename getenv_hex(), getenv_yesno(), getenv_ulong()")
Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-02-23 10:21:41 -05:00
Andrew F. Davis
5fbed8f2c6 ARM: Kconfig: Move TI_SECURE_DEVICE to a common area
TI_SECURE_DEVICE is used by both OMAP2+ and Keystone2 family devices,
and so when ARCH_OMAP2PLUS was used to gate off the OMAP2+ Kconfig
Keystone2 family devices lost this config option.

Move this option out of mach-omap2 Kconfig to a spot accessible by both
families. We picked arch/arm/Kconfig over the TI specific board/ti/
location as this option is not specific to our boards but rather our
architecture.

Plus at some point this option can be changed to just
SECURE_DEVICE, as having secure parts is not exclusive to TI and
so other vendors can interpret this option as needed by their device
configurations.

Fixes: a93fbf4a78 ("ARM: omap2+: rename config to ARCH_OMAP2PLUS and consolidate Kconfig")
Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-02-23 10:21:41 -05:00
Max Filippov
10117a2985 xtensa: clean up CONFIG_SYS_TEXT_ADDR
Drop CONFIG_SYS_MEMORY_TOP. Rename CONFIG_SYS_TEXT_ADDR to
XTENSA_SYS_TEXT_ADDR.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2018-02-23 10:21:41 -05:00
Tom Rini
fa2c14676c configs: Re-sync with CONFIG_DISTRO_DEFAULTS
A number of platforms include config_distro_defaults.h but do not enable
CONFIG_DISTRO_DEFAULTS.  As they plainly intended to, set that flag and
re-sync config files.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-02-23 10:21:41 -05:00
Alexander Kochetkov
76584e3398 mmc: fix off-by-one bug in mmc_startup_v4()
MMC card with EXT_CSD_REV value 9 will trigger off-by-one
bug while accessing mmc_versions array. The patch fix that.

Signed-off-by: Alexander Kochetkov <al.kochet@gmail.com>
2018-02-23 15:57:41 +09:00
Faiz Abbas
8a856db238 mmc: Drop unnecessary case for mmc_probe()
Drop the unnecessary empty function case for mmc_probe().

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
2018-02-23 15:56:33 +09:00
Marek Vasut
0b75cc3f13 mmc: uniphier-sd: Add compatible strings for RCar Gen2
Add DT compatible strings for RCar Gen2 SoCs, so that this driver
can bind with them. Unlike Gen3, which uses 64bit FIFO, the Gen2
uses 16bit FIFO.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-02-23 00:06:05 +01:00
Tom Rini
b2a3372138 sh: Do not provide strncmp
With modern GCC, we get warnings such as:
cmd/jffs2.c: In function 'mtdparts_init':
arch/sh/include/asm/string.h:110:38:
warning: array subscript is above array bounds [-Warray-bounds]
   : "0" (__cs), "1" (__ct), "r" (__cs+__n)
                                  ~~~~^~~~

This results in a small size reduction as well.

Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-02-23 00:06:05 +01:00
Jagan Teki
3d40915350 imx6q: engicam: Use SPL_LOAD_FIT for MMC boards
Currently SPL_LOAD_FIT is unable to boot from nand on
i.MX6QDL platform, so enable only for MMC boards.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-02-22 14:51:01 +01:00
Jagan Teki
ac738a4a7b imx6: engicam: Drop SPL_EXT_SUPPORT
i.MX6 boards still using raw MMC write for SPL and
u-boot-dtb.img along with Falcon mode configurations,
so drop filesystem based write through SPL_EXT_SUPPORT.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-02-22 14:40:00 +01:00
Jagan Teki
b0fcd8ef60 imx6ul: engicam: Drop isiot-mmc defconfig
Engicam Is.IoT has eMMC and NAND cpu modules where MMC
is common for both, so remove explicit mmc defconfig.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-02-22 14:39:45 +01:00
Breno Lima
7b889baf29 arm: imx: hab: Define HAB_RVT_BASE according to the processor version
Currently the following devices are using a different definition for ROM
Vector Table addresses:

- i.MX6DQP =  All rev
- i.MX6DQ >= rev 1.5
- i.MX6SDL >= rev 1.2

There is no need to create a new RVT macros since the only update were the
RVT base address. Remove HAB_RVT_*_NEW macros and define a new RVT base
address.

More details about RVT base address can be found on processors Reference
Manual and in the following documents:

EB803: i.MX 6Dual/6Quad Applications Processor Silicon Revision 1.2 to 1.3
Comparison

EB804: i.MX 6Solo/6DualLite Application Processor Silicon Revision 1.1
to 1.2/1.3 Comparison

Signed-off-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-02-22 14:36:06 +01:00
Utkarsh Gupta
20fa1dd386 imx: hab: Check if CSF contains deprecated commands
Write, Check and Set MID commands have been deprecated from the Code
Signing Tool (CST) v2.3.3 and will not be implemented in newer versions
of HAB, hence the following features are no longer available:

- Write Data
- Clear Mask
- Set Mask
- Check All Clear
- Check All Set
- Check Any Clear
- Check Any Set
- Set MID

The inappropriate use of Write Data command may lead to an incorrect
authentication boot flow. Since no specific application has been identified
that requires the use of any of these features, it is highly recommended to
add this check.

Signed-off-by: Utkarsh Gupta <utkarsh.gupta@nxp.com>
Signed-off-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-02-22 14:35:57 +01:00
Utkarsh Gupta
ed286bc80e imx: hab: Check if CSF is valid before authenticating image
For proper authentication the HAB code must check if the CSF is valid.
Users must call the csf_is_valid() function to parse the CSF prior to
authenticating any additional images. The function will return a failure
if any of the following invalid conditions are met:

- CSF pointer is NULL
- CSF Header does not exist
- CSF does not lie within the image bounds
- CSF command length zero

Signed-off-by: Utkarsh Gupta <utkarsh.gupta@nxp.com>
Signed-off-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-02-22 14:35:42 +01:00
Utkarsh Gupta
8c4037a09a imx: hab: Ensure the IVT DCD pointer is Null prior to calling HAB authenticate function.
DCD commands should only be present in the initial boot image loaded by
the SoC ROM. DCD should not be present in images that will be verified
by software using HAB RVT authentication APIs. Newer versions of HAB
will generate an error if a DCD pointer is present in an image being
authenticated by calling the HAB RVT API. Older versions of HAB will
process and run DCD if it is present, and this could lead to an incorrect
authentication boot flow.

It is highly recommended this check is in place to ensure additional HAB
verified images do not include a DCD table.

Signed-off-by: Utkarsh Gupta <utkarsh.gupta@nxp.com>
Signed-off-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-02-22 14:35:32 +01:00
Breno Lima
669f2d189e imx: hab: Keep CAAM clock enabled after authenticating additional images
Currently it is not possible to run CMD_DEK on i.MX SPL targets:

=> dek_blob 0x12000000 0x12001000 128

The system hangs after running dek_blob because the CAAM clock is being
disabled by the HAB code. There is no need to disable CAAM clock after
authenticating additional boot images, thus keep CAAM clock enabled to
address this issue.

Signed-off-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-02-22 14:35:20 +01:00
Maxim Yu. Osipov
d247cf5069 Revert "mx6: ddr: Allow changing REFSEL and REFR fields"
This reverts commit edf0093732 for
cm_fx6 iMX.6 Solo module as it causes frequent (around 10 percent of
power cycles) board's hangs.

These hangs happen in SPL when BSS is being initialized in SDRAM -
it appear that variables from BSS contain trash values which lead to board
hangs. Looks like that SDRAM doesn't yet finish initialization in these
cases.

Signed-off-by: Maxim Yu. Osipov <mosipov@ilbers.de>
Reviewed-by: Stefano Babic <sbabic@denx.de>
2018-02-22 14:30:53 +01:00
Tom Rini
036c9679d2 sh: Use -m2a-nofpu only
Based on reading over the GCC manual, passing both -m2a and -m2a-nofpu
are redundant, as -m2a-nofpu will provide functional code for both.  As
-m2a-nofpu functions with more toolchains and does what is expected,
switch.

Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-02-21 23:42:47 +01:00
Patrick Delaunay
b0cce3f90f cmd: fastboot: Kconfig: solve config issue
When FASTBOOT is activated, only one the supported device is supported in
code at the same time
- CONFIG_FASTBOOT_FLASH_MMC_DEV
- CONFIG_FASTBOOT_FLASH_NAND_DEV

But Today the choice is not exclusive in Kconfig
and that cause Kconfig issue when :
- CONFIG_FASTBOOT, CONFIG_MMC, CONFIG_NAND are activated
- CONFIG_FASTBOOT_FLASH_MMC_DEV = 0
- CONFIG_FASTBOOT_FLASH_NAND_DEV is not activated

The patch add a choice in Kconfig to select the FLASH provider
- CONFIG_FASTBOOT_FLASH_MMC
- CONFIG_FASTBOOT_FLASH_NAND

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2018-02-21 20:28:15 +01:00
Marek Vasut
36dd7e7e25 dfu: tftp: Fix arm64 build warnings
Fix two build warnings when building for arm64:

drivers/dfu/dfu_tftp.c: In function ‘dfu_tftp_write’:
drivers/dfu/dfu_tftp.c:59:37: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
  ret = dfu_write_from_mem_addr(dfu, (void *)addr, len);
                                     ^
and

drivers/dfu/dfu_tftp.c: In function ‘dfu_tftp_write’:
drivers/dfu/dfu_tftp.c:41:8: warning: format ‘%u’ expects argument of type ‘unsigned int’, but argument 4 has type ‘__kernel_size_t {aka long unsigned int}’ [-Wformat=]
  debug("%s: image name: %s strlen: %u\n", __func__, sb, strlen(sb));
        ^

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Lukasz Majewski <lukma@denx.de>
2018-02-21 20:28:15 +01:00
Marek Vasut
bb4059a53b dfu: Rename _FUNCTION_DFU to DFU_OVER_
Do the following to make the symbol names less confusing.

sed -i "s/\([TU][^_]\+\)_FUNCTION_DFU/DFU_OVER_\1/g" \
	`git grep _FUNCTION_DFU | cut -d ":" -f 1 | sort -u`

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Lukasz Majewski <lukma@denx.de>
2018-02-21 20:28:15 +01:00
Marek Vasut
0f44d33536 dfu: Fix up the Kconfig mess
Clean up the screaming mess of configuration options that DFU is.
It was impossible to configure DFU such that TFTP is enabled and
USB is not, this patch fixes that and assures that DFU TFTP and
DFU USB can be enabled separatelly and that the correct pieces
of code are compiled in.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Lukasz Majewski <lukma@denx.de>
2018-02-21 20:28:15 +01:00
Heinrich Schuchardt
462c117ce0 usb: kbd: select SYS_STDIO_DEREGISTER
If SYS_STDIO_DEREGISTER is not selected and USB_KEYBOARD is selected
U-Boot cannot be built due to missing function stdio_deregister_dev.

So USB_KEYBOARD should select SYS_STDIO_DEREGISTER.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-02-21 20:28:15 +01:00
Andre Heider
a64a614db7 usb: gadget: sdp: fix pointer cast warnings for 64bit archs
The SDP protocol contains multiple 32bit pointers. Add a helper function
to get a valid pointer from these values and use it.

This fixes the following warnings:

drivers/usb/gadget/f_sdp.c: In function ‘sdp_rx_data_complete’:
drivers/usb/gadget/f_sdp.c:347:10: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
   memcpy((void *)sdp->dnl_address, req->buf + 1, datalen);
          ^
drivers/usb/gadget/f_sdp.c: In function ‘sdp_jump_imxheader’:
drivers/usb/gadget/f_sdp.c:625:10: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
  entry = (void *)headerv2->entry;
          ^
drivers/usb/gadget/f_sdp.c: In function ‘sdp_handle_in_ep’:
drivers/usb/gadget/f_sdp.c:668:20: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
   memcpy(&data[1], (void *)sdp_func->dnl_address, datalen);
                    ^
drivers/usb/gadget/f_sdp.c:679:31: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
   status = sdp_jump_imxheader((void *)sdp_func->jmp_address);
                               ^

Signed-off-by: Andre Heider <a.heider@gmail.com>
2018-02-21 20:28:15 +01:00
Andre Heider
24ccd0c8fd usb: gadget: sdp: add missing line breaks
Cosmetic change.

Signed-off-by: Andre Heider <a.heider@gmail.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Acked-by: Stefan Agner <stefan.agner@toradex.com>
2018-02-21 20:28:15 +01:00
Jaehoon Chung
1b313aa3e3 mmc: synchronize the sequence with enum bus_mode in mmc.h
If some configs are disabled, number of freqs array will not assigned to
correct value with bus_mode.
Synchornize the ordering with enum bus_mode in mmc.h.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
2018-02-21 18:04:25 +09:00
Tom Rini
f0f6917188 Prepare v2018.03-rc3
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-02-20 16:51:56 -05:00
Lukasz Majewski
0778e7c50b script: Make the get_default_envs.sh script working with newest u-boot
This commit fixes several issues:

- After moving env related code to ./env directory the env_common.o file
is no longer present in the system (has been replaced with built-in.o).

- Use ${OBJCOPY} if available, fallback to system default's objcopy if not
present.

- Extend the script to accept different build directory than current one.
It is extremely handy with OE usage, where source code is separated from
build.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Tested-by: Alex Kiernan <alex.kiernan@gmail.com>
2018-02-20 08:21:30 -05:00
Faiz Abbas
26862b4a40 env: mmc/fat/ext4: make sure that the MMC sub-system is initialized before using it
When booting from a non-MMC device, the MMC sub-system may not be
initialized when the environment is first accessed.
We need to make sure that the MMC sub-system is ready in even a non-MMC
boot case.

Therefore, initialize mmc before loading environment from it.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
2018-02-20 08:21:30 -05:00
Tom Rini
7b1cfec317 Merge git://git.denx.de/u-boot-mmc 2018-02-19 23:01:05 -05:00
Tom Rini
d884c58f0c Merge git://git.denx.de/u-boot-dm 2018-02-19 11:39:39 -05:00
Tom Rini
ede52d0482 Merge git://git.denx.de/u-boot-ubi 2018-02-19 09:50:37 -05:00
Tom Rini
60a53351fb Merge git://git.denx.de/u-boot-i2c 2018-02-19 09:50:18 -05:00
Tom Rini
3ffa5288c8 Merge git://git.denx.de/u-boot-sh 2018-02-19 09:50:15 -05:00
Linus Walleij
116b49cfc4 vexpress: Sign up as maintainer
These ARM boards are in nice shape and still being used a lot
with e.g. QEMU, so I can maintain them.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-02-19 09:49:20 -05:00
Alex Kiernan
4a41fec589 mmc: Fix uninitialised priv member
When using omap_hsmmc without the device model then the allocation
of mmc->priv ends up uninitialised.

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
Tested-by: Robert Nelson <robertcnelson@gmail.com>
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
2018-02-19 17:00:33 +09:00
Jean-Jacques Hiblot
ace1bed327 mmc: fix bug in mmc_startup_v4()
The correspondence between mmc versions as used in u-boot and the version
numbers reported in register EXT_CSD_REV is wrong for versions above and
including MMC_VERSION_4_41. All those versions were shifted by one:
real 4.5 hardware appeared to be MMC_VERSION_5_0.

Fix this by adding the missing version in the correspondence table.

Reported-by: eil Eilmsteiner Heribert <eil@keba.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
2018-02-19 16:59:33 +09:00
Jean-Jacques Hiblot
a0276f3eee mmc: Fix bug in sd_set_card_speed()
After settings the speed of the sd with the switch command, a check is
done to make sure that the new speed has been set. The current check has a
masking error: speed are encoded on 4 bits only.
Fix it by masking the upper bits.

This fixes a problem seen with QEmu emulating a vexpress-a15.

Reported-by: Jonathan Gray <jsg@jsg.id.au>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Tested-by: Jonathan Gray <jsg@jsg.id.au>
2018-02-19 16:59:21 +09:00
Jean-Jacques Hiblot
127a6011ee configs: dra7xx_evm/dra7xx_hs_evm: Enable MMC HS200 and SD UHS support
By default UHS and HS200 are not enabled.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19 16:58:55 +09:00
Kishon Vijay Abraham I
c413baa95c ARM: DRA7x/AM57x: Add MMC/SD fixups for rev1.0 and rev 1.1
Since DRA7xx/AM57xx SR1.1 and SR1.0 has errata to limit the frequency of
MMC1 to 96MHz and frequency of MMC2 to 48MHz for AM572x SR1.1, limit the
frequency and disable higher speed modes for those revision.
Also use the recommended IO delays (those tagged with "rev11")

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19 16:58:55 +09:00
Jean-Jacques Hiblot
e74adafb04 dts: am57xx-idk: disable HS200 support
HS200 cannot be supported on mmc2, because the IO lines of mmc2 are
connected to 3.3v.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19 16:58:55 +09:00
Jean-Jacques Hiblot
4db25fe7fa dts: am57xx-beagle-x15: disable UHS and HS200 support
The UHS modes are not supported in beagle-x15 because it's not possible to
switch the IO lines supply voltage to 1.8v.
Also HS200 cannot be supported on mmc2, because the IO lines of mmc2 are
connected to 3.3v.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19 16:58:55 +09:00
Jean-Jacques Hiblot
2adee41db9 ARM: dts: dra7: Add supported MMC/SD modes in MMC dt nodes
On DRA7 family SoCs, MMC1 controller supports SDR104,
SDR50, DDR50, SDR25 and SDR12 UHS modes.

MMC2 controller supports HS200 and DDR modes.

MMC3 controller supports SDR12, SDR25 and SDR50 modes.

MMC4 controller supports SDR12 and SDR25 modes.

Add these supported modes in device-tree file.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19 16:58:55 +09:00
Kishon Vijay Abraham I
6ba41e5dc3 ARM: dts: DRA7: use new dra7-specific compatible string
Use the new compatible string "ti,dra7-hsmmc" that was specifically
added for dra7 and dra72. This is required since for dra7 and dra72
processors iodelay values has to be set unlike other processors.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19 16:58:55 +09:00
Kishon Vijay Abraham I
2022270c7d ARM: OMAP5: set mmc clock frequency to 192MHz
Now that omap_hsmmc has support for hs200 mode, change the clock
frequency to 192MHz. Also change the REFERENCE CLOCK frequency to
192MHz based on which the internal mmc clock divider is calculated.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19 16:58:55 +09:00
Jean-Jacques Hiblot
04f9f8be83 mmc: omap_hsmmc: add signal voltage selection support
I/O data lines of UHS SD card operates at 1.8V when in UHS speed
mode (same is true for eMMC in DDR and HS200 modes). Add support
to switch signal voltage to 1.8V in order to support
UHS cards and eMMC HS200 and DDR modes.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19 16:58:55 +09:00
Kishon Vijay Abraham I
90321dce0d mmc: omap_hsmmc: allow mmc clock to be gated
mmc core has defined a new parameter *clk_disable* to gate the clock.
Disable the clock here if *clk_disable* is set.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19 16:58:55 +09:00
Jean-Jacques Hiblot
42182c9b9c mmc: omap_hsmmc: implement send_init_stream callback
This callback is used to send the 74 clock cycles after power up.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19 16:58:55 +09:00
Jean-Jacques Hiblot
3149c13ac3 mmc: omap_hsmmc: update mmc->clock with the actual bus speed
When the clock is applied, compute the actual value of the clock. It may be
slightly different from the requested value (max freq, divisor threshold)

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19 16:58:55 +09:00
Jean-Jacques Hiblot
bcc6bd84d4 mmc: omap_hsmmc: allow the simple HS modes to use the default pinctrl
The default configuration is usually working fine for the the HS modes.
Don't enforce the presence of a dedicated pinmux for the HS modes.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19 16:58:55 +09:00
Kishon Vijay Abraham I
2d28eeda33 mmc: omap_hsmmc: Add support to get pinctrl values and max frequency for different hw revisions
AM572x SR1.1 requires different IODelay values to be used than that used
in AM572x SR2.0. These values are populated in device tree. Add
capability in omap_hsmmc driver to extract IOdelay values for different
silicon revision. The maximum frequency is also reduced when using a ES1.1.
To keep the ability to boot both revsions with the same dtb, those values
can be provided by the platform code.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19 16:58:55 +09:00
Kishon Vijay Abraham I
33c1d77f4a mmc: omap_hsmmc: Add support to set IODELAY values
The data manual of J6/J6 Eco recommends to set different IODELAY values
depending on the mode in which the MMC/SD is enumerated in order to
ensure IO timings are met.

Add support to parse mux values and iodelay values from device tree
and set these depending on the enumerated MMC mode.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19 16:58:55 +09:00
Kishon Vijay Abraham I
6a27333ba3 ARM: OMAP5/DRA7: Enable iodelay recalibration to be done from uboot
Add a new API to perform iodelay recalibration without isolate
io to be used in uboot.

The data manual of J6/J6 Eco recommends to set different IODELAY values
depending on the mode in which the MMC/SD is enumerated in order to
ensure IO timings are met. The MMC driver can use the new API to
set the IO delay values depending on the MMC mode.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19 16:58:55 +09:00
Kishon Vijay Abraham I
2d7482cf79 mmc: omap_hsmmc: use mmc_of_parse to populate mmc_config
Use the mmc_of_parse library function to populate mmc_config instead of
repeating the same code in host controller driver.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19 16:58:55 +09:00
Jean-Jacques Hiblot
a4efd73773 mmc: omap_hsmmc: Reduce the max timeout for reset controller fsm
>From OMAP3 SoCs (OMAP3, OMAP4, OMAP5, AM572x, AM571x), the DAT/CMD lines
reset procedure section in TRM suggests to first poll the SRD/SRC bit
until it is set to 0x1. But looks like that bit is never set to 1 and there
is an observable delay of 1sec everytime the driver tries to reset DAT/CMD.
(The same is observed in linux kernel).

Reduce the time the driver waits for the controller to set the SRC/SRD bits
to 1 so that there is no observable delay.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19 16:58:54 +09:00
Jean-Jacques Hiblot
2faa1a302b mmc: omap_hsmmc: Workaround for errata id i802
According to errata i802, DCRC error interrupts
(MMCHS_STAT[21] DCRC=0x1) can occur during the tuning procedure.

The DCRC interrupt, occurs when the last tuning block fails
(the last ratio tested). The delay from CRC check until the
interrupt is asserted is bigger than the delay until assertion
of the tuning end flag. Assertion of tuning end flag is what
masks the interrupts. Because of this race, an erroneous DCRC
interrupt occurs.

The suggested  workaround is to disable DCRC interrupts during
the tuning procedure which is implemented here.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19 16:58:54 +09:00
Jean-Jacques Hiblot
14761caeee mmc: omap_hsmmc: Add tuning support
HS200/SDR104 requires tuning command to be sent to the card. Use
the mmc_send_tuning library function to send the tuning
command and configure the internal DLL.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19 16:58:54 +09:00
Kishon Vijay Abraham I
9b3fc21837 mmc: omap_hsmmc: Enable DDR mode support
In order to enable DDR mode, Dual Data Rate mode bit has to be set in
MMCHS_CON register. Set it here.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19 16:58:54 +09:00
Jean-Jacques Hiblot
8fc238bfad mmc: omap_hsmmc: set MMC mode in the UHSMS bit field
Use the timing parameter set in the MMC core to set the
mode in UHSMS  bit field. This is in preparation for
adding HS200 support in omap hsmmc driver.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19 16:58:54 +09:00
Kishon Vijay Abraham I
b594481709 mmc: omap_hsmmc: add support to set default io voltage
"ti,dual-volt" is used in linux kernel to set the voltage capabilities.
For host controller dt nodes that doesn't have "ti,dual-volt",
it's assumed 1.8v is the io voltage. This is not always true (like in
the case of beagle-x15 where the io lines are connected to 3.3v).
Hence if "no-1-8-v" property is set, io voltage will be set to 3v.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19 16:58:54 +09:00
Kishon Vijay Abraham I
48a2f11443 mmc: omap_hsmmc: cleanup omap_hsmmc_set_ios
No functional change. Move bus width configuration setting to a
separate function and invoke it only if there is a change in the
bus width.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19 16:58:54 +09:00
Jean-Jacques Hiblot
5baf543e52 mmc: omap_hsmmc: cleanup clock configuration
Add a separate function for starting the clock, stopping the clock and
setting the clock. Starting the clock and stopping the clock can
be used irrespective of setting the clock (For example during iodelay
recalibration).
Also set the clock only if there is a change in frequency.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19 16:58:54 +09:00
Masahiro Yamada
d4d64889b0 mmc: use pr_* log functions
Use pr_* log functions from Linux.  They can be enabled/disabled
via CONFIG_LOGLEVEL.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2018-02-19 16:56:54 +09:00
Richard Weinberger
f82290afc8 mtd: ubi: Fix worker handling
Fixes a bug found on thuban boards, which were for 2 years in
a long-term test with varying temperatures. They showed
problems in u-boot when attaching the ubi partition:

U-Boot# run flash_self_test
Booting from nand
set A...
UBI: attaching mtd1 to ubi0
UBI: scanning is finished
data abort
pc : [<87f97c3c>]          lr : [<87f97c28>]
reloc pc : [<8012cc3c>]    lr : [<8012cc28>]
sp : 85f686e8  ip : 00000020     fp : 000001f7
r10: 8605ce40  r9 : 85f68ef8     r8 : 0001f000
r7 : 00000001  r6 : 00000006     r5 : 0001f000  r4 : 85f6ecc0
r3 : 00000000  r2 : 44e35000     r1 : 87fcbcd4  r0 : 87fc755b
Flags: nZCv  IRQs off  FIQs on  Mode SVC_32
Resetting CPU ...

Reason is, that accidentially the U-Boot implementation
from __schedule_ubi_work() did not check the flag
ubi->thread_enabled and started with wearleveling work,
but ubi did not have setup all structures at this point
and crashes.

Solve this problem by splitting work scheduling and processing.

Signed-off-by: Richard Weinberger <richard@nod.at>
Signed-off-by: Heiko Schocher <hs@denx.de>
2018-02-19 08:22:58 +01:00
Stefan Mavrodiev
004b4cdaec i2c: mvtwsi.c: Fix set speed
Previous patch for this driver breaks i2c initialization.

commit 8bcf12ccce ("i2c: mvtwsi.c: Avoid NULL dereference")

If actual_speed is passed as NULL in this function:
static void __twsi_i2c_init(struct mvtwsi_registers *twsi, int speed,
			    int slaveadd, uint *actual_speed)
than __twsi_i2c_set_bus_speed never get called. This causes i2c clock
to run on default speed - 2MHz (measured with oscilloscope). This is issue
on some boards, sunxi for example, since on I2C0 bus PMU is connected.

The bootlogs with and without the patch are as follows:

Wihtout the patch:
U-Boot SPL 2018.03-rc2 (Feb 13 2018 - 09:23:17 +0200)
DRAM: 1024 MiB
Failed to set core voltage! Can't set CPU frequency
Trying to boot from FEL

U-Boot 2018.03-rc2 (Feb 13 2018 - 09:23:17 +0200) Allwinner Technology

CPU:   Allwinner A20 (SUN7I)
Model: Olimex A20-OLinuXino-LIME2
I2C:   ready
DRAM:  1 GiB
MMC:   SUNXI SD/MMC: 0

With the patch:
U-Boot SPL 2018.03-rc2-00001-g838ff85 (Feb 13 2018 - 09:24:34 +0200)
DRAM: 1024 MiB
CPU: 912000000Hz, AXI/AHB/APB: 3/2/2
Trying to boot from FEL

U-Boot 2018.03-rc2-00001-g838ff85 (Feb 13 2018 - 09:24:34 +0200) Allwinner Technology

CPU:   Allwinner A20 (SUN7I)
Model: Olimex A20-OLinuXino-LIME2
I2C:   ready
DRAM:  1 GiB
MMC:   SUNXI SD/MMC: 0

Signed-off-by: Stefan Mavrodiev <stefan@olimex.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2018-02-19 08:21:38 +01:00
Mario Six
c6b89f3180 sandbox: Add 64-bit sandbox
To debug device tree issues involving 32- and 64-bit platforms, it is useful to
have a generic 64-bit platform available.

Add a version of the sandbox that uses 64-bit integers for its physical
addresses as well as a modified device tree.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Added CONFIG_SYS_TEXT_BASE to configs/sandbox64_defconfig
Signed-off-by: Simon Glass <sjg@chromium.org>
2018-02-18 15:53:48 -07:00
Simon Glass
995b60b593 sandbox: Rename 'num-gpios' property to avoid dtc warning
At present dtc produces these warnings when compiling sandbox:

arch/sandbox/dts/test.dtb: Warning (gpios_property):
	Could not get phandle node for /base-gpios:num-gpios(cell 0)
arch/sandbox/dts/test.dtb: Warning (gpios_property):
	Missing property '#gpio-cells' in node /reset-ctl or bad phandle
	(referred from /extra-gpios:num-gpios[0])

Both are due to it assuming that the 'num-gpios' property holds a phandle
pointing to a GPIO node.

To avoid these warnings, rename the sandbox property so that it does not
include the string 'gpios'.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-02-18 15:53:32 -07:00
Simon Glass
7e87816caa sandbox: Correct dtc warning in /chosen node
At present dtc produces these warnings when compiling sandbox:

arch/sandbox/dts/test.dtb: Warning (reg_format): "reg" property in /chosen/chosen-test has invalid length (8 bytes) (#address-cells == 2, #size-cells == 1)
arch/sandbox/dts/test.dtb: Warning (avoid_default_addr_size): Relying on default #address-cells value for /chosen/chosen-test
arch/sandbox/dts/test.dtb: Warning (avoid_default_addr_size): Relying on default #size-cells value for /chosen/chosen-test

Add the missing properties to avoid this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Fixes: f200680 (dm: core: parse chosen node)
2018-02-18 12:53:38 -07:00
Thierry Reding
6d29cc7dcf fdt: Fixup only valid memory banks
Memory banks with address 0 and size 0 are empty and should not be
passed to the OS via device tree.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
2018-02-18 12:53:38 -07:00
Alexey Brodkin
4280342adb fdt: Implement weak arch_fixup_fdt()
Only ARM and in some configs MIPS really implement arch_fixup_fdt().
Others just use the same boilerplate which is not good by itself,
but what's worse if we try to build with disabled CONFIG_CMD_BOOTM
and enabled CONFIG_OF_LIBFDT we'll hit an unknown symbol which was
apparently implemented in arch/xxx/lib/bootm.c.

Now with weak arch_fixup_fdt() right in image-fdt.c where it is
used we get both items highlighted above fixed.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: York Sun <york.sun@nxp.com>
Cc: Stefan Roese <sr@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-02-18 12:53:38 -07:00
Fabio Estevam
04a03b240f mx6sabresd: Select the CONFIG_EFI_PARTITION option
With fastboot support enabled, it is useful to be able to list
the eMMC EFI partitions, so select the CONFIG_EFI_PARTITION option.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-02-18 12:43:51 +01:00
Stefano Babic
0fb1a8a469 mx6: fix MAINTAINERS for Engicam i.CoreM6 1.5 MIPI
Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Jagan Teki <jagan@amarulasolutions.com>
2018-02-18 12:42:41 +01:00
Marek Vasut
5abcbd7847 net: sh_eth: Fix DT base address fetching
Drop the whole map/unmap_physmem stuff and just use the address
already obtained from DT in ofdata_to_platdata(), instead of
repeating that, wrongly, in probe.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2018-02-18 11:20:18 +01:00
Marek Vasut
5262767ded net: sh_eth: Fix checkpatch warning
Fix minor checkpatch warning about udelay(3000) being too long
and should be replaced by mdelay(3).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2018-02-18 11:20:18 +01:00
Marek Vasut
60279b5757 net: sh_eth: Return directly from sh_eth_recv_start
Drop the len variable, it's useless.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2018-02-18 11:20:18 +01:00
Marek Vasut
3c5a7b7547 net: sh_eth: Zap port variable
Inline this variable which is quite useless.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2018-02-18 11:20:17 +01:00
Tom Rini
02b0895c21 Merge git://git.denx.de/u-boot-sh 2018-02-17 16:06:59 -05:00
Marek Vasut
25f6dc8955 ARM: rmobile: Fix broken reset code on Porter
The 'reset' command did not work on Porter because the reset code
was accessing the wrong PMIC address over broken I2C bus driver.
Replace the code with DM-aware code and fix up the PMIC address.
This makes the 'reset' command work again.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-02-17 22:00:25 +01:00
Marek Vasut
a6e50da0d5 ARM: rmobile: Replace SH I2C with IIC on Porter
Get rid of the SH I2C driver on Porter and enable the IIC driver
instead . The old SH I2C is completely broken on Porter anyway
and the DM/DT capable IIC driver allows access to the PMIC too.
Use the DM/DT capable driver instead.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-02-17 22:00:25 +01:00
Marek Vasut
88306dbb5a ARM: dts: rmobile: Enable I2C6 on Porter
Enable I2C6 bus on Porter to access the PMIC , ie. to reset the board.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-02-17 21:59:22 +01:00
Marek Vasut
f51155eced i2c: rcar_iic: Allow IIC on RCar Gen2
The IIC on Gen2 is compatible with this driver as well, allow it.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-02-17 21:59:22 +01:00
Marek Vasut
7b8eeb4060 ARM: rmobile: Set FDT/initramfs limits on Porter
Set those limits to inform U-Boot about FDT and initramfs placement.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-02-17 21:59:22 +01:00
Marek Vasut
a05dab4e76 ARM: rmobile: Enable convenient commands on Porter
Enable cache and time commands, which are convenience tools for
doing benchmarks and various boot tests. Also enable FIT support
for booting fitImage.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-02-17 21:59:21 +01:00
Marek Vasut
cd07358c04 ARM: rmobile: Reset ethernet PHY
Toggle the PHY reset GPIO to bring the ethernet PHY out of reset properly.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
---
NOTE: This should be moved to the SH ethernet driver, but it's quite
      late in the cycle, so this is something to be done in 2018.05.
2018-02-17 21:59:21 +01:00
Marek Vasut
8a41f68870 ARM: dts: rmobile: Move the u-boot,dm-pre-reloc into u-boot DTS on porter
Fix ommission where the u-boot,dm-pre-reloc DT bit was pulled into the
common DT, not the U-Boot specific DT part. Move it to U-Boot DT part.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-02-17 21:59:20 +01:00
Tom Rini
bd650cd404 Merge git://git.denx.de/u-boot-sh 2018-02-16 13:56:02 -05:00
Tom Rini
7961b9f6db Merge git://git.denx.de/u-boot-socfpga 2018-02-16 13:55:51 -05:00
Tom Rini
fee626c449 Merge git://git.denx.de/u-boot-usb 2018-02-16 13:55:41 -05:00
Goldschmidt Simon
b2cdef4861 env: restore old env_get_char() behaviour
With multiple environments, the 'get_char' callback for env
drivers does not really make sense any more because it is
only supported by two drivers (eeprom and nvram).

To restore single character loading for these drivers,
override 'env_get_char_spec'.

Signed-off-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-02-16 11:12:42 -05:00
York Sun
e1caa5841e env: Fix env_load_location
Commit 7d714a24d7 ("env: Support multiple environments") added
static variable env_load_location. When saving environmental
variables, this variable is presumed to have the value set before.
In case the value was set before relocation and U-Boot runs from a
NOR flash, this variable wasn't writable. This causes failure when
saving the environment. To save this location, global data must be
used instead.

Signed-off-by: York Sun <york.sun@nxp.com>
CC: Maxime Ripard <maxime.ripard@free-electrons.com>
2018-02-16 11:12:41 -05:00
Marek Vasut
5b6ae550a8 ARM: rmobile: Enable autocompletion on Gen2
This makes the shell so much more pleasant to use, so enable it.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-02-16 16:43:11 +01:00
Marek Vasut
7ee37d0e0c ARM: rmobile: Convert Porter to SPL
Due to size limitations of the MERAM, switch U-Boot to SPL.
The SPL is loaded by the SPI_LOADER into MERAM and then loads
U-Boot proper into DRAM. This way U-Boot can freely grow in
size in DRAM, as there is plenty of it.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
---
NOTE: To update U-Boot, first install u-boot.img to 0x140000 in SPI NOR,
      then use the Minimon to flash u-boot-spl.srec using ls,2,e6304000.
      To generate u-boot-spl.srec, use objcopy:
        arm-linux-gnueabi-objcopy -O srec spl/u-boot-spl u-boot-spl.srec
2018-02-16 16:43:11 +01:00
Marek Vasut
8a8d300005 ARM: dts: rmobile: Make PFC and RST available before reloc
Those two nodes are needed to configure pinmux before relocation
and to configure clock before relocation, since CPG/MSSR needs
access to RST node. This is not noticable on Gen3, but on Gen2
this causes problems in SPL if they are not available early.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-02-16 16:43:11 +01:00
Marek Vasut
ccb947f2ce ARM: dts: rmobile: Make scif0 available before reloc on Porter
Make the SCIF available before relocation and in SPL on R8A7791 Porter.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-02-16 16:43:11 +01:00
Marek Vasut
5c44ddcb13 serial: Replace CONFIG_ with CONFIG_IS_ENABLED
Cosmetic change, replace CONFIG_* with CONFIG_IS_ENABLED(*) .

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-02-16 16:43:10 +01:00
Marek Vasut
974147b437 ARM: rmobile: Enable autocompletion on Gen3
This makes the shell so much more pleasant to use, so enable it.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-02-16 16:43:09 +01:00
Marek Vasut
74caed0e33 ARM: rmobile: Enable DTO support on Gen3
Enable support for applying DT overlays on Gen3. This is convenient
for handling extra additional hardware, like ie. the Kingfisher.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-02-16 16:43:09 +01:00
Marek Vasut
d64c789414 net: ravb: Initialize PHY in probe() once
Reset and initialize the PHY once in the probe() function rather than
doing it over and over again is start() function. This requires us to
keep the clock enabled while the driver is in use. This significantly
reduces the time between transfers as the PHY doesn't have to restart
autonegotiation between transfers, which takes forever.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Geert Uytterhoeven <geert+renesas@glider.be>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2018-02-16 16:43:09 +01:00
Marek Vasut
fd5577ce26 clk: rmobile: Assure SD-IF clock are configured correctly
The SD driver calls clk_set_rate() before clk_enable(), yet clk_set_rate()
implementation in the clock driver does not set the SD-IF divider. Fix it.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-02-16 16:43:09 +01:00
Tom Rini
32fe36574e Merge git://git.denx.de/u-boot-arc 2018-02-15 14:07:04 -05:00
Alexander Graf
f116634cd1 RPi: Add myself as board maintainer
Commit 958d55f26c ("MAINTAINERS: Take over BCM2835 maintainership") put
me in as maintainer for the RPi soc, but forgot to update the board
MAINTAINERS file.

Add me there too.

Signed-off-by: Alexander Graf <agraf@suse.de>
2018-02-15 10:08:14 -05:00
Simon Goldschmidt
fef4a545b6 arm: socfpga: use imply instead of select where applicable
Kconfig should only 'select' features that are required for an arch.
Standard features that can be disabled without breaking board support
should use 'imply' instead, to allow users to disable it.

These options are changed for mach-socfpga:
- DM_SPI & DM_SPI_FLASH: only required with QSPI support enabled
- SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION: the boot rom supports a
  partitionless mode also, where SPL is located at address 0
- HW_WATCHDOG: while all mainline board defconfigs use it, U-Boot
  should still work without it.

Signed-off-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
2018-02-15 13:45:16 +01:00
Lukasz Majewski
21a9f435f3 Convert socfpga: select CONFIG_HW_WATCHDOG support for ARCH_SOCFPGA
All Socfpga boards from ./include/configs/socfpga_* define
CONFIG_HW_WATCHDOG.
To ease CONFIG_HW_WATCHDOG conversion to Kconfig select it in
config ARCH_SOCFPGA (arch/arm/Kconfig) section.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Signed-off-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
2018-02-15 13:45:16 +01:00
Simon Goldschmidt
a6fbf94550 arm: socfpga: fix qspi flash compatible (add "spi-flash")
This patch adds "spi-flash" to the compatible list of the qspi flash
chip for all socfpga boards. This is required to make qspi work on
these boards on top of the recent fixes. Without the "spi-flash"
compatible string for the flash chip, the speed cannot be read and a
speed of 0Hz is used (which results in a divide-by-zero on these
boards).

Signed-off-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
2018-02-15 13:45:15 +01:00
Alexey Brodkin
d53b128df4 arc: Fix final linkage with Elf32 tools
ARC Elf32 tools by default enable usage of so-called "small data"
section or in ARC PRM parlance "GP-relative addressing".

The idea is to put up to 2kB of frequently used data into a separate
location and use indirect addressing via dedicated core register (GP).
Where GP is used as a base for offset calculation.

And so if "-msdata" toggle is passed to the compiler either explicitly
or implicitly (that's Elf32 tools case) it will try to put some data
in that "small data" area and then to calculate real offset from GP
to be encoded in instructions we need to know the base value which
liker gets from __SDATA_BEGIN__ symbol in hte linker script.

In U-Boot we don't use that feature and linker script doesn't define
__SDATA_BEGIN__ which gives us the following linkage error if we use
Elf32 tools:
------------------------->8-------------------
  LD      u-boot
.../bin/arc-elf32-ld.bfd: Error: Linker symbol __SDATA_BEGIN__ not found
.../bin/arc-elf32-ld.bfd: final link failed: Bad value
------------------------->8-------------------

Note if uClibc or glibc tools are used that problem doesn't happen
because usage of "small data section" is disabled by default as not very
useful for bigger executables. Moreover GP is just another name of r26
so we're loosing 1 core register which is not used by the compiler as a
generic register with "-msdata".

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-02-15 15:44:47 +03:00
Faiz Abbas
b16c129c22 usb: host: xhci-omap: Remove redundant board_usb_init and board_usb_cleanup functions
board_usb_init()/_cleanup() should be in board files and don't have
a place in the xhci-omap driver. Weak versions for
board_usb_init()/_cleanup() already exist in common/usb.c
(for host mode) and drivers/usb/gadget/g_dnl.c (for gadget mode).

Therefore, remove init and cleanup functions from xhci-omap and
implement them in the board files.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2018-02-15 13:44:30 +01:00
Alexey Brodkin
163f8858ae usb: dwc2: Rename CONFIG_DWC2_UTMI_PHY_WIDTH to CONFIG_DWC2_UTMI_WIDTH
For some reason from day one we used to have both CONFIG_DWC2_UTMI_WIDTH
mentioned in dwc2.h and in scripts/config_whitelist.txt but never really used
and CONFIG_DWC2_UTMI_PHY_WIDTH used in real code in dwc2.c (but never
defined).

Moreover even though CONFIG_DWC2_UTMI_WIDTH might be either 8 or 16
depending on hardware (and the same is said in a comment for it in
dwc2.h) but then 8 is hardcoded in the header leaving no ability to
override this value in board's configuration.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Marek Vasut <marex@denx.de>
2018-02-15 13:44:27 +01:00
Lukasz Majewski
04e2cead60 Convert CONFIG_SYS_BOOTCOUNT_SINGLEWORD to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_BOOTCOUNT_SINGLEWORD

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Tested-by: Alex Kiernan <alex.kiernan@gmail.com>
Reviewed-by: Ian Ray <ian.ray@ge.com>
2018-02-15 07:20:53 -05:00
Lukasz Majewski
d1ec9461f2 Convert CONFIG_BOOTCOUNT_LIMIT to Kconfig
This converts the following to Kconfig:
   CONFIG_BOOTCOUNT_LIMIT

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Tested-by: Alex Kiernan <alex.kiernan@gmail.com>
Reviewed-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
Acked-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
2018-02-15 07:20:53 -05:00
Tom Rini
0c502b6c17 configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-02-14 21:34:50 -05:00
Tom Rini
ac727577f0 Revert "drivers/ddr/fsl: Dual-license DDR driver"
Upon further review, not all code authors are in favour of this change.
This reverts commit ee3556bcaf.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-02-14 21:34:05 -05:00
Simon Goldschmidt
d693742b25 spl: unbreak CONFIG_SPL_MULTI_DTB_FIT after fixing CONFIG_OF_EMBED
With commit 9bd76b8076 ("spl: make CONFIG_OF_EMBED pass dts through
fdtgrep"), CONFIG_SPL_MULTI_DTB_FIT has been broken because
cmd_fdtgrep was now unknown in scripts/Makefile.spl after moving
it to dts/Makefile. This bug has been introduced with v2018.01.

This patch moves cmd_fdtgrep from dts/Makefile to scripts/Makefile.lib
and includes scripts/Makefile.lib in scripts/Makefile.spl.

Fixes: 9bd76b8076 ("spl: make CONFIG_OF_EMBED pass dts through fdtgrep")
Reported-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-02-14 12:14:16 -05:00
Heinrich Schuchardt
0c3fecd0bf cmd: scsi: move CMD_SCSI to device access commands
Configuration option CMD_SCSI should be placed in the same submenu as
CMD_SATA and CMD_MMC.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-02-14 12:14:16 -05:00
Andre Heider
678382c73a arm/PSCI: support PSCI versions greater than 1.0
ATF recently began announcing PSCI v1.1. Since that version is unknown
to u-boot, the PSCI device nodes were not updated.

Switch from the case statement to a greater/less-than comparison so that
v1.1, as well as future versions, get at least the compatible nodes of
known versions.

PSCI v1.1 doesn't seem to have introduced a new corresponding compatible.

Signed-off-by: Andre Heider <a.heider@gmail.com>
2018-02-14 12:14:15 -05:00
Alex Kiernan
d877a6c50e Fix --noheader on fw_printenv
The single argument `--noheader' is expecting isn't taken from getopt
parsing, but instead from the remaining argv arguments.

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
2018-02-14 12:14:15 -05:00
Sam Protsenko
beffc170f2 am335x_evm: Consolidate eMMC partitions with DFU info
>From DFU_ALT_INFO_EMMC (include/environment/ti/dfu.h) we can see that
rootfs will be flashed to second partition on eMMC. But at the moment we
have only one partition in $partitions environment variable. Let's add
"bootloader" partition prior to "rootfs", so that DFU works correctly.
This also fixes eMMC boot, which looks for rootfs on second partition.

"bootloader" partition start corresponds to "u-boot.img.raw" in DFU
eMMC info, which is 0x300 sector (384 KiB offset from eMMC start).

rootfs start address can be also found from DFU eMMC info.
bootloader-related area is finished at 0x1500 sector (2688 KiB offset
from eMMC start). This should be the start address for rootfs in
$partitions environment variable.

While at it, fix U-Boot environment address to be the same as for
AM57x EVM, so that it doesn't clash with other partitions.

So now eMMC layout looks like this:

    ===============================================================

    0       +------------------------+
            | MBR/GPT header         |   128           -
    128     +------------------------+
            | MLO                    |   256           -
    384     +------------------------+
            | u-boot.img             |   1792          bootloader
    2176    +------------------------+
            | //////// hole //////// |   256           -
    2432    +------------------------+
            | U-Boot environment     |   128           -
    2560    +------------------------+
            | U-Boot environment     |   128           -
            | (redundant)            |
    2688    +------------------------+
            | rootfs                 |   remaining     rootfs
    end     +------------------------+

    ===============================================================

"hole" area can be used further for storing U-Boot environment (like
it's done in AM57x EVM config file) or for increasing u-boot.img area
(in case u-boot.img size increased, e.g. if new dtbs were added).

This commit conforms with Linux partition table from f6d245b8c5
("arm: am57xx: Fix Linux boot from eMMC") commit, making things in
uniform way.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-02-14 12:14:14 -05:00
Tom Rini
75670c81e4 configs: Migrate CONFIG_SPL_FRAMEWORK
Migrate the option CONFIG_SPL_FRAMEWORK and make this gate most of the
current set of options we have in Kconfig.  We will need to have some
options available for SPL and !SPL_FRAMEWORK so this is important.  In a
few cases we re-order existing options so that we have less escapes from
the SPL_FRAMEWORK guard.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-02-14 12:14:13 -05:00
Tom Rini
7a88afd080 configs: Drop unused CONFIG_SPL_MMC_MINIMAL
The option CONFIG_SPL_MMC_MINIMAL is unused in code, drop it.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-02-14 12:14:13 -05:00
Faiz Abbas
d8aed6fae8 configs: am335x_evm: Add DYNAMIC_CRC_TABLE
Add CONFIG_DYNAMIC_CRC_TABLE to am335x_evm_defconfig to reduce the
size of the image.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
2018-02-14 12:14:12 -05:00
Faiz Abbas
36c1877c5c lib: Kconfig: Move DYNAMIC_CRC_TABLE to Kconfig
Add CONFIG prefix to DYNAMIC_CRC_TABLE and implement it in
Kconfig.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
2018-02-14 12:14:11 -05:00
Faiz Abbas
7e63ba2f49 configs: am335x_evm: Disable ISO and EFI partitions in SPL
ISO and EFI partition configs in SPL are selected by default.
However, they are not being used.

Therefore, remove ISO and EFI partition support in SPL.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-02-14 12:05:55 -05:00
Simon Goldschmidt
7d531e8a4f arm: update Kconfig help for ENABLE_ARM_SOC_BOOT0_HOOK
When this config is enabled, <asm/arch/boot0.h> is included,
but the Kconfig help says this should be a define
(ARM_SOC_BOOT0_HOOK).

The code for this in arch/arm/lib/vectors.s was changed on
01/02/2017 with commit ce62e57fc5 ("ARM: boot0 hook: remove macro,
include whole header file").

Signed-off-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
2018-02-13 23:24:22 -05:00
Masahiro Yamada
6becd9de6b ARM: image: indent with tab instead of 4 spaces
Commit 6808ef9ac2 ("move booti_setup to arch/arm/lig/image.c")
not only moved the code, but also replaced a tab with 4 spaces
to break the Linux coding style.

Restore tab indentation.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Bin Chen <bin.chen@linaro.org>
2018-02-13 23:24:22 -05:00
Masahiro Yamada
bf14d9a7e1 cmd: booti: fix invalid image address in debug message
With commit 6808ef9ac2 ("move booti_setup to arch/arm/lig/image.c"),
images->ep has not been set at this point.

Fixes: 6808ef9ac2 ("move booti_setup to arch/arm/lig/image.c")
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Bin Chen <bin.chen@linaro.org>
2018-02-13 23:24:22 -05:00
Heinrich Schuchardt
0850d7f7bf efi_driver: comment struct efi_driver_ops
Provide description for struct efi_driver_ops.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-02-13 23:24:22 -05:00
Heinrich Schuchardt
80ee4fc504 dm: core: fix typo in comment (device.h)
%s/Indentiies/Identifies/g

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-02-13 23:24:22 -05:00
Simon Goldschmidt
9095d5b894 fix spelling of 'functions' in 2 places (was 'funtcions')
Signed-off-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
2018-02-13 23:24:22 -05:00
Tom Rini
34a5c4257a SystemACE: Remove
This driver is no longer used on any supported platform in U-Boot and
there is no interest in maintaining it further from people that have
used it historically.

Cc: Simon Glass <sjg@chromium.org>
Cc: Michal Simek <michal.simek@xilinx.com>
c: Alexey Brodkin <alexey.brodkin@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
2018-02-13 23:24:22 -05:00
Tuomas Tynkkynen
fbca0e66cc spi: Migrate CONFIG_CF_SPI to Kconfig
Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
2018-02-13 23:01:44 -05:00
Tuomas Tynkkynen
4a942f49b8 spi: Migrate CONFIG_KIRKWOOD_SPI to Kconfig
Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
2018-02-13 23:01:44 -05:00
Tuomas Tynkkynen
2c4b096b4c spi: Migrate CONFIG_LPC32XX_SSP to Kconfig
Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
2018-02-13 23:01:44 -05:00
Tuomas Tynkkynen
bbdf38698e spi: Migrate CONFIG_MPC8XXX_SPI to Kconfig
Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
2018-02-13 23:01:44 -05:00
Tuomas Tynkkynen
60e5456291 spi: Migrate CONFIG_MXC_SPI to Kconfig
Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
2018-02-13 23:01:44 -05:00
Tuomas Tynkkynen
7b819b569e spi: Migrate CONFIG_MXS_SPI to Kconfig
Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
2018-02-13 23:00:53 -05:00
Tuomas Tynkkynen
a5dfabea19 spi: Migrate CONFIG_SH_QSPI to Kconfig
Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
2018-02-13 23:00:47 -05:00
Tuomas Tynkkynen
95d3877a58 spi: Migrate CONFIG_SH_SPI to Kconfig
Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
2018-02-13 23:00:29 -05:00
Max Filippov
4d69009462 .travis.yml: test xtensa xtfpga board in QEMU
This allows running tests on emulated KC705 board with DC233C xtensa
core. It expects to find conf.xtfpga_qemu in the uboot-test-hooks.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2018-02-13 23:00:29 -05:00
Max Filippov
64c26fee05 xtfpga: enable hush parser
Remove CONFIG_BOOT_RETRY_TIME as it doesn't do much good and enable
CONFIG_HUSH_PARSER in xtfpga_defconfig.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2018-02-13 23:00:29 -05:00
Max Filippov
b6f3a12ef8 .travis.yml: download xtensa prebuilt toolchain
xtensa toolchains are core-specific, so give full toolchain name and
download corresponding prebuilt toolchain from the github release.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2018-02-13 23:00:29 -05:00
Bin Meng
244ce78a04 microblaze: bootm: Fix compiler warning
Fix build warning in arch/microblaze/lib/bootm.c with gcc 7.3.0:

  warning: this 'if' clause does not guard... [-Wmisleading-indentation]

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Michal Simek <michal.simek@xilinx.com>
2018-02-13 20:34:07 -05:00
Bin Meng
d679a529a4 arm: omap2: Fix compiler warning
Fix build warning in arch/arm/mach-omap2/emif-common.c and
arch/arm/mach-omap2/omap4/emif.c with gcc 7.3.0:

  warning: duplicate 'const' declaration specifier [-Wduplicate-decl-specifier]

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-02-13 20:34:07 -05:00
Bin Meng
e48be29ef3 video: ivybridge_igd: Fix compiler warning
Fix build warning in drivers/video/ivybridge_igd.c with gcc 7.3.0:

  warning: 'ivb_pm_gt2' defined but not used [-Wunused-const-variable=]

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-02-13 20:34:07 -05:00
Marek Vasut
175c3e3ade tftp: update: Include missing cfi_flash.h header
Add the missing header, otherwise CONFIG_SYS_MAX_FLASH_BANKS
may be undeclared.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Tom Rini <trini@konsulko.com>
2018-02-13 20:34:07 -05:00
Marek Vasut
b254c5291d cmd: fitupd: Convert CONFIG_UPDATE_TFTP and co.
Convert the CONFIG_UPDATE_TFTP and related symbols to Kconfig.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Tom Rini <trini@konsulko.com>
2018-02-13 20:34:07 -05:00
Marek Vasut
ac08432a4c cmd: fitupd: Convert CONFIG_CMD_FITUPD
Convert the CONFIG_CMD_FITUPD symbol to Kconfig.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Tom Rini <trini@konsulko.com>
2018-02-13 20:34:07 -05:00
Tom Rini
85f855cf02 Merge git://git.denx.de/u-boot-rockchip 2018-02-13 10:51:00 -05:00
Philipp Tomsich
a5af51a703 spl: fit: move fdt_record_loadable out of ARCH_FIXUP_FDT_MEMORY guard
The fdt_record_loadable()-function was wedged between other functions
that were guarded by ARCH_FIXUP_FDT_MEMORY.  This could lead to linker
errors on some configurations.

With this change, fdt_record_loadable() is moved out of the
ARCH_FIXUP_FDT_MEMORY guard (plus I tried to retain alphabetical
ordering for functions by placing it appropriately).

References: 9f45aeb ("spl: fit: implement fdt_record_loadable")
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reported-by: Michal Simek <michal.simek@xilinx.com>
Tested-by: Michal Simek <michal.simek@xilinx.com>
2018-02-13 12:52:57 +01:00
Heinrich Schuchardt
6e5308c4b8 rockchip: gpio: remove dead code
In the following statements
if (a) return a; if (a) return c;
the second return can never be executed.

Identified by cppcheck.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-02-13 12:52:47 +01:00
Tom Rini
ebdb098c67 Prepare v2018.03-rc2
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-02-12 18:52:31 -05:00
Alex Kiernan
cda87ec558 Fix misaligned buffer in env_fat_save
When saving the environment on a platform which has DMA alignment
larger than the natural alignment, env_fat_save triggers a debug
message in file_fat_write:

  Saving Environment to FAT... writing uboot.env
  FAT: Misaligned buffer address (9df1c8e0)
  OK

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
2018-02-12 15:31:18 -05:00
Tom Rini
f3177d02f3 Merge git://git.denx.de/u-boot-fsl-qoriq 2018-02-12 12:08:32 -05:00
Tom Rini
278b90ce78 configs: Migrate CONFIG_SYS_TEXT_BASE
On the NIOS2 and Xtensa architectures, we do not have
CONFIG_SYS_TEXT_BASE set.  This is a strict migration of the current
values into the defconfig and removing them from the headers.

I did not attempt to add more default values in and for now will leave
that to maintainers.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-02-11 09:30:09 -05:00
Tom Rini
7c8f00e484 configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-02-10 20:29:02 -05:00
Tom Rini
f59ab6c659 Merge tag 'signed-efi-v2018.03' of git://github.com/agraf/u-boot
Patch queue for efi in 2018.03 - 2018-02-10

This time we have a few important bug fixes. Most noticable are:

  - Fix OpenBSD loader with CONFIG_BLK=n
  - Fix builds on various circumstances
  - Add missing stubs so callers don't call NULL
  - Bump UEFI revision to 2.7
2018-02-10 17:04:13 -05:00
Heinrich Schuchardt
df9cf561b0 efi_loader: correct efi_disk_register
efi_disk_register should return as status code (efi_status_t).

Disks with zero blocks should be reported as 'not ready' without throwing
an error.

This patch solves a problem running OpenBSD on system configured with
CONFIG_BLK=n (e.g. i.MX6).

Reported-by: Jonathan Gray <jsg@jsg.id.au>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Tested-by: Jonathan Gray <jsg@jsg.id.au>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-02-10 00:25:49 +01:00
Heinrich Schuchardt
0c2307431e efi_loader: add missing runtime services stubs
Add stubs for UpdateCapsule, QueryCapsuleCapabilities, and
QueryVariableInfo.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-02-10 00:25:49 +01:00
Heinrich Schuchardt
f3b5056c4e efi_loader: split README.efi into two separate documents
README.efi describes two different concepts:
* U-Boot exposing the UEFI API
* U-Boot running on top of UEFI.

This patch splits the document in two.
Religious references are removed.

The separation of the concepts makes sense before detailing the internals
of U-Boot exposing the UEFI API in a future patch.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-02-10 00:24:00 +01:00
Heinrich Schuchardt
038782a27a efi_driver: return type of efi_driver_init()
Change the return type of efi_driver_init() to efi_status_t.

efi_driver_init() calls efi_add_driver() which returns an efi_status_t
value. efi_driver_init() should not subject this value to a conversion to
int losing high bits on 64bit systems.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-02-10 00:24:00 +01:00
Heinrich Schuchardt
f19a95a40b efi_loader: do not use 2.0.5 as UEFI revision number
Currently the UEFI revision number in the system table header is set to
2.0.5. This version number does not refer to any existing version of the
UEFI standard.

Set the revision number to 2.7.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-02-10 00:24:00 +01:00
Heinrich Schuchardt
9f0930e5d9 efi_loader: create stub for CreateEventEx
Currently we set the function pointer for the CreateEventEx boot service
to NULL. When called this would lead to an immediate failure.

A function stub is provided which handles the case that the boot service
is called without an event group and returns EFI_UNSUPPORTED otherwise.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-02-10 00:24:00 +01:00
Heinrich Schuchardt
ae86b6be12 efi_selftest: use correct compiler flags for miniapps
For EFI binaries we need special CFLAGS.

They were specified for an object file that since has been replaced.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-02-10 00:24:00 +01:00
Heinrich Schuchardt
f623e07f0c efi_loader: fix the online help for bootefi bootmgr
The bootefi command is missing in the online help for
bootefi bootmgr.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-02-10 00:24:00 +01:00
Heinrich Schuchardt
268ec6e00e efi_loader: fix building crt0 on arm
Before the patch an undefined constant EFI_SUBSYSTEM was used in the
crt0 code. The current version of binutils does not swallow the error.

https://bugs.debian.org/cgi-bin/bugreport.cgi?bug=888403

The necessary constant IMAGE_SUBSYSTEM_EFI_APPLICATION is already
defined in pe.h. So let's factor out asm-generic/pe.h for the
image subsystem constants and use it in our assembler code.

IMAGE_SUBSYSTEM_SAL_RUNTIME_DRIVER does not exist in the specification
let's use IMAGE_SUBSYSTEM_EFI_ROM instead.

The include pe.h is only used in code maintained by Alex so let him be the
maintainer here too.

Reported-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Tested-by: Vagrant Cascadian <vagrant@debian.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-02-10 00:24:00 +01:00
York Sun
ee3556bcaf drivers/ddr/fsl: Dual-license DDR driver
To make this driver easier to be reused, dual-license DDR driver.

Signed-off-by: York Sun <york.sun@nxp.com>
CC: Simon Glass <sjg@chromium.org>
CC: Tom Rini <trini@konsulko.com>
CC: Heinrich Schuchardt <xypron.glpk@gmx.de>
CC: Thomas Schaefer <thomas.schaefer@kontron.com>
CC: Masahiro Yamada <yamada.masahiro@socionext.com>
CC: Robert P. J. Day <rpjday@crashcourse.ca>
CC: Alexander Merkle <alexander.merkle@lauterbach.com>
CC: Joakim Tjernlund <joakim.tjernlund@transmode.se>
CC: Curt Brune <curt@cumulusnetworks.com>
CC: Valentin Longchamp <valentin.longchamp@keymile.com>
CC: Wolfgang Denk <wd@denx.de>
CC: Anatolij Gustschin <agust@denx.de>
CC: Ira W. Snyder <iws@ovro.caltech.edu>
CC: Marek Vasut <marek.vasut@gmail.com>
CC: Kyle Moffett <Kyle.D.Moffett@boeing.com>
CC: Sebastien Carlier <sebastien.carlier@gmail.com>
CC: Stefan Roese <sr@denx.de>
CC: Peter Tyser <ptyser@xes-inc.com>
CC: Paul Gortmaker <paul.gortmaker@windriver.com>
CC: Peter Tyser <ptyser@xes-inc.com>
CC: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2018-02-09 08:36:40 -08:00
Zhao Qiang
990d06b0bc PowerPC: phy: enable all phylib drivers when use phylib and tsec enet
config_phylib_all_drivers.h should be included when CONFIG_PHYLIB and
CONFIG_TSEC_ENET are defined.

Fixes: 3146f0c017 ("Move PHYLIB to Kconfig")
Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-02-09 08:35:59 -08:00
Lukas Auer
dfaec76029 crypto/fsl: instantiate all rng state handles
Extend the instantiate_rng() function and the corresponding CAAM job
descriptor to instantiate all RNG state handles. This moves the RNG
instantiation code in line with the CAAM kernel driver.

Previously, only the first state handle was instantiated. The second
one was instantiated by the CAAM kernel driver. This works if the
kernel runs in secure mode, but fails in non-secure mode since the
kernel driver uses DEC0 directly instead of over the job ring
interface. Instantiating all RNG state handles in u-boot removes the
need for using DEC0 in the kernel driver, making it possible to use
the CAAM in non-secure mode.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Tested-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-02-09 08:34:34 -08:00
Vinitha Pillai-B57223
c883f351e6 armv8: ls1012ardb: Add distro secure boot support
Enable validation of boot.scr script prior to its execution dependent
on "secureboot" flag in environment. Enable fall back option to
qspi boot in case of secure boot.

Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Signed-off-by: Vinitha Pillai <vinitha.pillai@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-02-09 08:34:33 -08:00
Sriram Dash
30cf7f818d armv8: Remove dependency of SERDES for LSCH2 and LSCH3
Remove dependency of SYS_HAS_SERDES for Layerscape Chasis 2 and
Layerscape Chasis 3.

Signed-off-by: Sriram Dash <sriram.dash@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-02-09 08:33:21 -08:00
Rajat Srivastava
ccd6849031 armv8: ls1088a: qspi: Enable XIP mode above 16 MB addresses
Currently in LS1088A, XIP mode in QSPI works up to 16 MB
addresses. This patch enables QSPI support in XIP mode for
addresses above 16 MB as well.

Signed-off-by: Rajat Srivastava <rajat.srivastava@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-02-09 08:33:21 -08:00
Hou Zhiqiang
31cbcb5ddd ARMv8: ls1046a: Enable PCIe and E1000 in lpuart defconfig
Enable PCIe and E1000 in ls1046aqds lpuart defconfig.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-02-09 08:32:07 -08:00
Adam Ford
1811a928c6 Move most CONFIG_HAVE_BLOCK_DEVICE to Kconfig
config_fallbacks.h has some logic that sets HAVE_BLOCK_DEVICE
based on a list of enabled options.  Moving HAVE_BLOCK_DEVICE to
Kconfig allows us to drastically shrink the logic in
config_fallbacks.h

Signed-off-by: Adam Ford <aford173@gmail.com>
[trini: Rename HAVE_BLOCK_DEVICE to CONFIG_BLOCK_DEVICE]
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-02-08 19:09:03 -05:00
Tom Rini
560eeee8c2 block: Migrate SystemACE chip to Kconfig
Migrate the base and sub-options to Kconfig.  Note that we only enable
this in the base sandbox config now.

Cc: Alexey Brodkin <alexey.brodkin@gmail.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
---
Is this driver still used anywhere?  It's fishy that it's only enabled
in sandbox anymore.
2018-02-08 19:08:41 -05:00
Adam Ford
a451bc27c9 Convert LIB_UUID to Kconfig
config_fallback.h has some logic that checks a variety of options
and selects LIB_UUID if it hasn't already been selected.  This
will all LIB_UUID in Kconfig and select this option for the list
of options to allow us to remove the logic from fallbacks

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-02-08 19:08:39 -05:00
Adam Ford
a5a37567c4 Convert CONFIG LIB_HW_RAND to Kconfig
config_fallbacks.h had some logic to automatically select
LIB_RAND if RANDOM_UUID or CMD_UUID were set if LIB_HW_RAND wasn't
already selected.  By migrating LIB_HW_RAND to Kconfig, we can
remove this check from config_fallbacks.h and put it into Kconfig

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
[trini: Turn into a choice, add NET_RANDOM_ETHADDR]
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-02-08 12:48:22 -05:00
Adam Ford
99bec1aead Convert CONFIG_APBH_DMA et al to Kconfig
This converts the following to Kconfig:
   CONFIG_APBH_DMA
   CONFIG_APBH_DMA_BURST
   CONFIG_APBH_DMA_BURST8

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Stefan Agner <stefan.agner@toradex.com>
[trini: Add in MMC as well]
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-02-08 12:48:11 -05:00
Michal Simek
99dcbdd8a3 Kconfig: Select networking commands only when NET is enabled
There is no reason to unconditially select network commands as distro
defaults without networking enable.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-02-08 12:48:11 -05:00
Michal Simek
c946b0e9fd Kconfig: net: phylib: Phylib should depends on NET
There is no value to enable phylib without networking support.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-02-08 12:48:10 -05:00
Michal Simek
389366f99a omap4: sdp4430: Enable CONFIG_NET for this platform
Distro default configuration contains also dhcp and pxe setting which
can't working without enabling CONFIG_NET.
EFI is not required that's why it is not enabled.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-02-08 12:48:10 -05:00
Patrice Chotard
4c82b03c12 configs: stm32: Enable CONFIG_ENV_VARS_UBOOT_CONFIG
Enable CONFIG_ENV_VARS_UBOOT_CONFIG for all STM32 boards
It allows to retrieve the SoC name into the "soc" environment
variable.

Signed-off-by: Christophe Priouzeau <christophe.priouzeau@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Vikas Manocha <vikas.manocha@st.com>
2018-02-08 10:17:17 -05:00
Stefan Agner
c87c81186c Convert CONFIG_NAND_MXS to Kconfig
This converts CONFIG_NAND_MXS to Kconfig.

Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
2018-02-08 10:17:17 -05:00
Stefan Agner
ac4605ae64 spl: use ARCH_MX23/28 to specify SPL_LDSCRIPT
Simplify SPL_LDSCRIPT config by using the new arch Kconfig
configurations ARCH_MX23 and ARCH_MX28.

Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
2018-02-08 10:17:17 -05:00
Stefan Agner
25c5b4e1bf arm: imx: mx28: Move MX28 selection to Kconfig
The motivation for moving MX28 selection to Kconfig is to be able
to better handle NAND MXS selection through Kconfig.

This selection method also aligns with the way other i.MX SoCs are
selected in U-Boot.

Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
2018-02-08 10:17:17 -05:00
Stefan Agner
c5343d4e11 arm: imx: mx23: Move MX23 selection to Kconfig
The motivation for moving MX23 selection to Kconfig is to be able
to better handle NAND MXS selection through Kconfig.

This selection method also aligns with the way other i.MX SoCs are
selected in U-Boot.

Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
2018-02-08 10:17:16 -05:00
Adam Ford
8bbff6a70e Convert CONFIG_MXC_GPIO to Kconfig
This converts the following to Kconfig:
   CONFIG_MXC_GPIO

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-02-08 10:17:16 -05:00
Adam Ford
f1754f0810 configs: imx6q_logic: Move CONFIG_PHY_SMSC to defconfig
Since CONFIG_PHY_SMSC was already in Kconfig, move this from
header file to defconfig

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-02-08 10:16:54 -05:00
Adam Ford
71abe5ac00 configs: imx6q_logic: Move CONFIG_MXC_UART to Kconfig
Since CONFIG_MXC_UART is already in Kconfig, move this from
the header to imx6q_logic_defconfig

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
2018-02-08 07:27:52 -05:00
Lukasz Majewski
5030eaa499 doc: watchdog: Remove Blackfin related documentation entry
This commit cleans up the README.watchdog by removing the reminescent of
ADI's Blackfin architecture removed some time ago.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2018-02-07 22:06:19 -05:00
Derald D. Woods
cbebe7a0f5 ARM: omap3: evm: Remove CONFIG_SYS_NS16550_REG_SIZE undefine
This commit removes an attempt to workaround a previous compilation
warning that is is now fixed in "include/configs/ti_omap3_common.h".

Signed-off-by: Derald D. Woods <woods.technical@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-02-07 22:06:19 -05:00
Derald D. Woods
313ed5d505 ARM: omap3: ti_omap3_common: Fix CONFIG_SYS_NS16550_REG_SIZE compiler warning
This commit fixes the following compiler warnings when DM_SERIAL is
enabled.

---8<-------------------------------------------------------------------
...

  CC      spl/board/ti/evm/evm.o
In file included from /solution/scm/u-boot-master/board/ti/evm/evm.c:16:0:
/solution/scm/u-boot-master/include/ns16550.h:31:0: warning: "CONFIG_SYS_NS16550_REG_SIZE" redefined
 #define CONFIG_SYS_NS16550_REG_SIZE (-1)

In file included from /solution/scm/u-boot-master/include/configs/omap3_evm.h:22:0,
                 from include/config.h:5,
                 from /solution/scm/u-boot-master/include/common.h:21,
                 from /solution/scm/u-boot-master/board/ti/evm/evm.c:14:
/solution/scm/u-boot-master/include/configs/ti_omap3_common.h:33:0: note: this is the location of the previous definition
 # define CONFIG_SYS_NS16550_REG_SIZE (-4)

  LD      spl/board/ti/evm/built-in.o

...

  CC      spl/drivers/serial/ns16550.o
In file included from /solution/scm/u-boot-master/drivers/serial/ns16550.c:11:0:
/solution/scm/u-boot-master/include/ns16550.h:31:0: warning: "CONFIG_SYS_NS16550_REG_SIZE" redefined
 #define CONFIG_SYS_NS16550_REG_SIZE (-1)

In file included from /solution/scm/u-boot-master/include/configs/omap3_evm.h:22:0,
                 from include/config.h:5,
                 from /solution/scm/u-boot-master/include/common.h:21,
                 from /solution/scm/u-boot-master/drivers/serial/ns16550.c:7:
/solution/scm/u-boot-master/include/configs/ti_omap3_common.h:33:0: note: this is the location of the previous definition
 # define CONFIG_SYS_NS16550_REG_SIZE (-4)

  LD      spl/drivers/serial/built-in.o

...
---8<-------------------------------------------------------------------

Signed-off-by: Derald D. Woods <woods.technical@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-02-07 22:06:18 -05:00
Lukasz Majewski
d695d66278 spl: eMMC/SD: Provide one __weak spl_boot_mode() function
The goal of this patch is to clean up the code related to choosing SPL
MMC boot mode.

The spl_boot_mode() now is called only in spl_mmc_load_image() function,
which is only compiled in if CONFIG_SPL_MMC_SUPPORT is enabled.

To achieve the goal, all per mach/arch implementations eligible for
unification has been replaced with one __weak implementation.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Acked-by: Michal Simek <michal.simek@xilinx.com> (For ZynqMP)
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-02-07 22:06:18 -05:00
Vignesh R
492322992b ARM: dts: keystone-k2g-ice: Add support for QSPI
K2G ICE has a s25fl256s1 QSPI NOR flash connected to QSPI at CS0. Add DT
entries for the same.

Signed-off-by: Vignesh R <vigneshr@ti.com>
2018-02-07 22:06:18 -05:00
Vignesh R
a47506ff8f ARM: k2g: Add pinmux data for QSPI on K2G ICE
Add pinmux for QSPI pins on K2G ICE board.

Signed-off-by: Vignesh R <vigneshr@ti.com>
2018-02-07 22:06:18 -05:00
Heinrich Schuchardt
923837e159 atcspi200: avoid possible NULL dereference
Check if ns before and not after dereferencing it.

Indicated by cppcheck.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-02-07 22:06:18 -05:00
Alexey Brodkin
8639e34d2c part: Allocate only one legacy_mbr buffer
Commit ff98cb9051 ("part: extract MBR signature from partitions")
blindly switched allocated by ALLOC_CACHE_ALIGN_BUFFER buffer type from
"unsigned char" to "legacy_mbr" which caused allocation of size =
(typeof(legacy_mbr) * dev_desc->blksize) instead of just space enough
for "legacy_mbr" structure.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Rob Clark <robdclark@gmail.com>
Cc: Peter Jones <pjones@redhat.com>
Cc: Alexander Graf <agraf@suse.de>
Cc: Tom Rini <trini@konsulko.com>
2018-02-07 22:06:17 -05:00
Bin Chen
6808ef9ac2 move booti_setup to arch/arm/lig/image.c
Follow bootz's pattern by moving the booti_setup to arch/arm/lib.
This allows to use booti_setup in other paths, e.g booting
an Android image containing Image format.

Note that kernel relocation is move out of booti_setup and it is the
caller's responsibility to do it and allows them do it differently. say,
cmd/booti.c just do a manually, while in the bootm path, we can use
bootm_load_os(with some changes).

Signed-off-by: Bin Chen <bin.chen@linaro.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-02-07 22:06:11 -05:00
Bin Chen
104816142f parse the second area of android image
The second area of android image was intended to put a 2nd stage
bootloader but in practice were rarely used (in my knowledge).

An proposal was made to the AOSP to (re)use the second area as the dtb[1],
This patch itself doesn't depend on that proposal being accepted but it won't
be that helpful as well if that proposal won't be accepted. But don't do
any harm as well.

[1] https://android-review.googlesource.com/#/c/417447/
Signed-off-by: Bin Chen <bin.chen@linaro.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2018-02-07 21:58:26 -05:00
Tom Rini
e24bd1e79e Merge git://git.denx.de/u-boot-ubi 2018-02-06 12:17:00 -05:00
Tom Rini
ea0211b61f Merge git://git.denx.de/u-boot-i2c 2018-02-06 12:16:46 -05:00
Martin Townsend
2d2d306f79 ubi: Ensure no fastmap flush after uif_close
On detach UBI attempts to update fastmap after closing user interfaces
but at this point UBI volumes have already been free()'ed and fastmap
can no longer access these data structures.

Signed-off-by: Martin Townsend <mtownsend1973@gmail.com>
Cc: hs@denx.de
Cc: kmpark@infradead.org
Cc: richard@sigma-star.at
2018-02-06 07:05:57 +01:00
Heinrich Schuchardt
8bcf12ccce i2c: mvtwsi.c: Avoid NULL dereference
For '#ifndef CONFIG_DM_I2C' twsi_i2c_init() passes NULL as
4th parameter to __twsi_i2c_init().

Identified with cppcheck.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-02-06 07:02:32 +01:00
Mario Six
9cef983d1c i2c: ihs_i2c: Factor out send_buffer method
Simplify the driver logic by extracting a common send_buffer method.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-02-06 07:02:11 +01:00
Mario Six
92164216a7 i2c: ihs_i2c: Make DM compatible
Make the ihs_i2c driver DM-compatible; for legacy boards, the old functions are
retained within #ifdefs.

No board uses the new DM driver yet; this patch only lays the foundation for
future support.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-02-06 07:01:06 +01:00
Mario Six
64ef094bc5 i2c: ihs_i2c: Prepare DM conversion
Prepare the function interface of the ihs_i2c driver for DM conversion
in a future patch.

While we're at it, fix some style violations, and make the code more readable.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-02-06 07:00:33 +01:00
Mario Six
84a4d34e96 i2c: fsl_i2c: Make live-tree compatible
Make the fsl_i2c driver compatible with a live device tree.

Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-02-06 06:59:59 +01:00
Mario Six
d4f422f886 i2c: fsl_i2c: Remove inline declarations
Some functions in the fsl_i2c driver are declared as inline, even though
they are quite large, which needlessly increases the size of the
resulting binary.

This patch removes the inline declarations.

Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-02-06 06:59:34 +01:00
Mario Six
a059de11c9 i2c: fsl_i2c: Fix style violations
Fix some style violations in the fsl_i2c I2C driver, and use shorter
type names for variables in some cases.

Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-02-06 06:59:15 +01:00
Ulf Magnusson
a43aebee89 usb: ulpi: kconfig: Remove meaningless choice default
'default' on a choice refers to the symbol selected by default, not to
the choice mode, so 'default n' is meaningless.

No functional changes. Optional choices implicitly default to n mode
(and there is no way to make them default to another mode).

Discovered in Kconfiglib (https://github.com/ulfalizer/Kconfiglib),
which prints the following warning:

	warning: the default selection n (undefined) of <choice> (defined at drivers/usb/ulpi/Kconfig:3) is not contained in the choice

I've added a corresponding warning to the C tools too, which is
currently in linux-next: https://patchwork.kernel.org/patch/9983667/

Signed-off-by: Ulf Magnusson <ulfalizer@gmail.com>
2018-02-05 20:58:12 -05:00
Ulf Magnusson
c631e150fe am335x, shc: kconfig: Fix misspelled choice default
There is no EMMC symbol in the "enable different boot versions for the
shc board" choice. SHC_EMMC was probably intended.

No functional changes. Kconfig choices fall back on using the first
(visible) symbol in the choice as the default if the default symbol is
not visible.

Discovered in Kconfiglib (https://github.com/ulfalizer/Kconfiglib),
which prints the following warning:

	warning: the default selection EMMC (undefined) of <choice> (defined at board/bosch/shc/Kconfig:15) is not contained in the choice

I've added a corresponding warning to the C tools too, which is
currently in linux-next: https://patchwork.kernel.org/patch/9983667/

Signed-off-by: Ulf Magnusson <ulfalizer@gmail.com>
2018-02-05 20:58:11 -05:00
Justin Hibbits
f29aa23b54 Fix FreeBSD endian checks
FreeBSD, like OpenBSD, uses BIG_ENDIAN, LITTLE_ENDIAN, and BYTE_ORDER,
whereas Linux and compatibles use __-prefixed names.  Define the names
the same as the OpenBSD block below it.
2018-02-05 20:58:11 -05:00
Tuomas Tynkkynen
a4fa811463 cmd: Make CONFIG_CMD_FPGA depend on CONFIG_FPGA
cmd/Makefile has:

ifdef CONFIG_FPGA
obj-$(CONFIG_CMD_FPGA) += fpga.o
endif

which means that if CONFIG_FPGA is not set, CONFIG_CMD_FPGA silently
does nothing. Let's remove that Makefile conditional and instead express
this equivalent dependency in Kconfig, so a lot of redundant

 # CONFIG_CMD_FPGA is not set

can be removed from board defconfigs that don't actually have an FPGA.

Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
2018-02-05 20:58:11 -05:00
Tuomas Tynkkynen
86c2f1e75b fpga: Resync various CONFIG_FPGA_* symbols
These are declared in Kconfig, but some #defines have crept in.

CONFIG_FPGA
CONFIG_FPGA_ALTERA
CONFIG_FPGA_CYCLON2
CONFIG_FPGA_SOCFPGA
CONFIG_FPGA_XILINX
CONFIG_FPGA_ZYNQMPPL

Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
2018-02-05 20:58:11 -05:00
Tom Rini
a4d403290e usb: dwc2: make casts of ep->dma_buf consistent
In most places in the code we cast this to an unsigned long, but in one
place we cast to an unsigned int.  For consistency and to fix a warning
on 64bit targets, always cast this to unsigned long.  For the long term
we should however change the declaration of dma_buf.

Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Lukasz Majewski <lukma@denx.de>
Acked-by: Marek Vasut <marex@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-02-05 12:09:43 -05:00
Jorge Ramirez-Ortiz
7e13f1d08f MAINTAINERS: board: qcom: db410c, db820c: update email.
Update email address.

Signed-off-by: Jorge Ramirez-Ortiz <jramirez@baylibre.com>
2018-02-04 22:55:34 -05:00
Daniel Schwierzeck
329f5ef51d travis.yml: run buildman with option -E
This forces all compiler warnings to be treated as errors.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-02-04 22:55:34 -05:00
Daniel Schwierzeck
38314d0e64 travis.yml: fix 'set +e' in build script
The build script should not manipulate shell flags (especially '-e').
A non-zero exit value can also be catched with 'cmd || ret=$?'.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-02-04 22:55:34 -05:00
Daniel Schwierzeck
2371d1bcbf buildman: add option -E for treating compiler warnings as errors
Add a new option '-E' for treating all compiler warnings as errors.
Eventually this will pass 'KCFLAGS=-Werror' to Kbuild.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-02-04 22:55:34 -05:00
Daniel Schwierzeck
215bb1c147 README: add doc for how to supply user specific compiler flags to Kbuild
Probably not all users are aware of this possibility, thus add a
pointer to the README. Also add a useful example.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-02-04 22:55:34 -05:00
Maxime Ripard
bf8f4c4400 MAINTAINERS: Update email address for Maxime Ripard
Free Electrons is no more and is now known as Bootlin, change my email
address accordingly.

Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-02-04 19:21:00 -05:00
Tom Rini
211a3a23b9 Merge git://git.denx.de/u-boot-dm 2018-02-04 08:30:31 -05:00
Tom Rini
ab1af91093 Merge git://git.denx.de/u-boot-imx 2018-02-04 08:30:13 -05:00
Bryan O'Donoghue
d1ceb0c488 imx: mx7: run sec_init for CAAM RNG
This patch adds a sec_init call into arch_misc_init(). Doing so in
conjunction with the patch "drivers/crypto/fsl: assign job-rings to
non-TrustZone" enables use of the CAAM in Linux when OPTEE/TrustZone is
active.

u-boot will initialise the RNG and assign ownership of the job-ring
registers to a non-TrustZone context. With recent changes by Lukas Auer to
fully initialize the RNG in sec_init() this means that u-boot will hand-off
the CAAM in a state that Linux then can use the CAAM without touching the
reserved DECO registers.

This change is safe both for the OPTEE/TrustZone boot path and the regular
non-OPTEE/TrustZone boot path.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Marco Franchi <marco.franchi@nxp.com>
Cc: Vanessa Maegima <vanessa.maegima@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Tested-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-02-04 12:14:11 +01:00
Bryan O'Donoghue
22191ac353 drivers/crypto/fsl: assign job-rings to non-TrustZone
After enabling TrustZone various parts of the CAAM silicon become
inaccessible to non TrustZone contexts. The job-ring registers are designed
to allow non TrustZone contexts like Linux to still submit jobs to CAAM
even after TrustZone has been enabled.

The default job-ring permissions after the BootROM look like this for
job-ring zero.

ms=0x00008001 ls=0x00008001

The MS field is JRaMIDR_MS (job ring MID most significant).

Referring to "Security Reference Manual for i.MX 7Dual and 7Solo
Applications Processors, Rev. 0, 03/2017" section 8.10.4 we see that
JROWN_NS controls whether or not a job-ring is accessible from non
TrustZone.

Bit 15 (TrustZone) is the logical inverse of bit 3 hence the above value of
0x8001 shows that JROWN_NS=0 and TrustZone=1.

Clearly then as soon as TrustZone becomes active the job-ring registers are
no longer accessible from Linux, which is not what we want.

This patch explicitly sets all job-ring registers to JROWN_NS=1 (non
TrustZone) by default and to the Non-Secure MID 001. Both settings are
required to successfully assign a job-ring to non-secure mode. If a piece
of TrustZone firmware requires ownership of job-ring registers it can unset
the JROWN_NS bit itself.

This patch in conjunction with a modification of the Linux kernel to skip
HWRNG initialisation makes CAAM usable to Linux with TrustZone enabled.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Alex Porosanu <alexandru.porosanu@nxp.com>
Cc: Ruchika Gupta <ruchika.gupta@nxp.com>
Cc: Aneesh Bansal <aneesh.bansal@nxp.com>
Link: https://github.com/OP-TEE/optee_os/issues/1408
Link: https://tinyurl.com/yam5gv9a
Tested-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
2018-02-04 12:14:11 +01:00
Eran Matityahu
a1ffd9e2e6 i2c: imx: Take mx6dqp in consideration in the I2C_PADS_INFO macro
We should take the MX6DP and MX6QP options in consideration
in the I2C_PADS_INFO macro.

Based on a patch by Pierluigi Passaro <pierluigi.p@variscite.com>

Signed-off-by: Eran Matityahu <eran.m@variscite.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-02-04 12:14:11 +01:00
Eran Matityahu
03073a6665 iomux-v3: Take mx6dqp in consideration for imx_iomux_v3_setup_pad()
We should take the MX6DP and MX6QP options in consideration
when defining imx_iomux_v3_setup_pad().

Based on a patch by Pierluigi Passaro <pierluigi.p@variscite.com>

Signed-off-by: Eran Matityahu <eran.m@variscite.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-02-04 12:14:10 +01:00
Fabio Estevam
79d0802953 doc: mxc_hab: Improve the config option list
The original text is from the time that the config options were not
converted to Kconfig.

After the conversion to Kconfig only CONFIG_SECURE_BOOT and
CONFIG_CMD_DEKBLOB need to be selected by the user.

The other config options are automatically selected by the Kconfig
logic.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Breno Lima <breno.lima@nxp.com>
2018-02-04 12:14:10 +01:00
Stefan Agner
8955519bb3 arm: dts: imx6ull: move input include to base device tree
The input keycode KEY_POWER is used in the imx6ull.dtsi file,
hence include the input header where used.

Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
2018-02-04 12:14:10 +01:00
Fabio Estevam
78804518e4 mx6sabresd: Add fastboot support
fastboot tool is a convenient way to flash the eMMC, so
add support for it.

Examples of usages:

On the mx6sabresd:

=> fastboot 0

On the Linux PC connected via USB:

$ sudo fastboot getvar bootloader-version -i 0x0525
bootloader-version: U-Boot 2018.01-00550-g7517cfe
finished. total time: 0.000s

$ sudo fastboot reboot -i 0x0525

(this causes the mx6sabresd to reboot)

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Tested-by: Shawn Guo <shawn.guo@linaro.org>
2018-02-04 12:14:10 +01:00
Fabio Estevam
11f3090532 mx6sabresd: Select CONFIG_CMD_USB_MASS_STORAGE
Select CONFIG_CMD_USB_MASS_STORAGE so that the 'ums' can be used.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-02-04 12:14:04 +01:00
Fabio Estevam
e705e2cd5b mx6sabre_common: Allow building CONFIG_USB_FUNCTION_MASS_STORAGE
Selecting CONFIG_USB_FUNCTION_MASS_STORAGE=y in the defconfig leads to
the following error:

cmd/built-in.o: In function `do_usb_mass_storage':
cmd/usb_mass_storage.c:217: undefined reference to `fsg_main_thread'
cmd/usb_mass_storage.c:170: undefined reference to `fsg_init'

CONFIG_USB_FUNCTION_MASS_STORAGE option is built only for
the non-SPL case as per the logic in drivers/usb/gadget/Makefile,
so remove the incorrect CONFIG_SPL ifdefery to fix the build
failure.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Tested-by: Shawn Guo <shawn.guo@linaro.org>
2018-02-04 12:02:35 +01:00
Soeren Moch
c12737cea0 board: tbs2910: add private imx config
Add board specific imx config file with recommended IPU Qos settings
and adapted DDR configuration.

Signed-off-by: Soeren Moch <smoch@web.de>
2018-02-04 12:00:58 +01:00
Michael Trimarchi
77e04034ec imx: mx25: Remove SION bit in all pin-mux that are safe
SION bit should be used in the situation that we need
to read back the value of a pin and should not be set by
default macro.

We get some malfunction as raised by following thread

https://www.spinics.net/lists/linux-usb/msg162574.html

As reported by this application note:
https://www.nxp.com/docs/en/application-note/AN5078.pdf

The software input on (SION) bit is an option to force an input
path to be active regardless of the value driven by the
corresponding module. It is used when the nature direction
of a pin depending on selected alternative function is an output,
but it is needed to read the real logic value on a pin.

The SION bit can be used in:
• Loopback: the module of a selected alternative function drives
the pad and also receives the pad value as an input
• GPIO capture: the module of a selected alternative function
drives the pin and the value is captured by the GPIO

SION bit is not necessary when the pin is configured as a peripheral
apart specific silicon bug. If an application needs to have this
set, this should be done in board file or in dts file

Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed-by: Benoît Thébaudeau <benoit.thebaudeau.dev@gmail.com>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-02-04 12:00:58 +01:00
Peng Fan
c966c7b977 imx: mx7dsabresd: enable UHS and HS200
Enable UHS and HS200 for mx7dsabresd.

Read Speed improvement:
Kingston SD10VG2/16GB SDHC 3.0 card
22.2MB/s -> 73.7MB/s
eMMC5.0 MTFC8GACAEAM:
68MB/s -> 87MB/s

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
2018-02-04 12:00:58 +01:00
Peng Fan
51313b49f2 mmc: fsl_esdhc: support SDR104 and HS200
Introduce SDR104 and HS200 support
The implementation takes linux kernel sdhci.c and sdhci-esdhc-imx.c
as reference.
 - Implement esdhc_change_pinstate to dynamically change pad settings
 - Implement esdhc_set_timing
 - Implement esdhc_set_voltage to switch voltage
 - Implement fsl_esdhc_execute_tuning to execute time process
 - Enlarge the cfg->f_max to 200MHz.
 - Parse fsl,tuning-step, fsl,tuning-start-tap and
   fsl,strobe-dll-delay-target from device tree.
 - Parse no-1-8-v property
 - Introduce esdhc_soc_data to indicate the flags and caps

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2018-02-04 12:00:58 +01:00
Peng Fan
893d98d9aa ARM: dts: add pinmux and tuning settings for HS200/SDR104
The pinmux and tuning settings are from
https://source.codeaurora.org/external/imx/linux-imx/tree/arch/
arm/boot/dts/imx7s.dtsi?h=imx_4.9.11_1.0.0_ga
https://source.codeaurora.org/external/imx/linux-imx/tree/arch/
arm/boot/dts/imx7d-sdb.dts?h=imx_4.9.11_1.0.0_ga

To support HS200 and SDR104, we need change pinmux settings dynamically.
And configure tuning step and start tuning tap, otherwise you may
see tuning failure.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
2018-02-04 12:00:58 +01:00
Peng Fan
59d3782cda mmc: fsl_esdhc: add strobe and tuning entry
Add entries that will be used for tuning control.
The whole layout not changed, just expand reserved3[84] and
rename other reservedx in sequence.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2018-02-04 12:00:58 +01:00
Eric Nelson
d8acc9deec mx6memcal: fix comment in board header file
The board header file included a reference to the starting point
from nitrogen6x.h, but since so much changed, the file bears
little resemblance to that file.

Signed-off-by: Eric Nelson <eric@nelint.com>
2018-02-04 12:00:58 +01:00
Eric Nelson
0093b3fcd8 mx6memcal: enable SDP support
The initial implementation of mx6memcal reset the CPU after
running the memory calibration procedure because the generic
board has no information about which boot devices are available.

Now that we have SDP support in SPL, use it to allow a full
U-Boot to be uploaded (i.e. to use "mtest").

Signed-off-by: Eric Nelson <eric@nelint.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-02-04 12:00:58 +01:00
Eric Nelson
cc9467ef7e mx6memcal: launder through savedefconfig
This patch just changes the order of configuration items in
mx6memcal_defconfig to match the Kconfig layout, making it easier
to track changes made using menuconfig.

Signed-off-by: Eric Nelson <eric@nelint.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-02-04 12:00:58 +01:00
Patrick Bruenn
55e83d2e36 arm: imx: mx53loco: remove usage of mx53_dram_size
Static variables are not available during board_init_f().
'static uint32_t mx53_dram_size[2];' was used in board specific
dram_init(), dram_init_banksize() and get_effective_memsize() to avoid
multiple calls to get_ram_size().

Reused dram initialization functions from arch/arm/mach-imx/mx5/mx53_dram.c

Signed-off-by: Patrick Bruenn <p.bruenn@beckhoff.com>
2018-02-04 12:00:58 +01:00
Patrick Bruenn
9d9baacb90 arm: imx: m53evk: remove usage of mx53_dram_size
Static variables are not available during board_init_f().
'static uint32_t mx53_dram_size[2];' was used in board specific
dram_init(), dram_init_banksize() and get_effective_memsize() to avoid
multiple calls to get_ram_size().

Reused dram initialization functions from arch/arm/mach-imx/mx5/mx53_dram.c

Signed-off-by: Patrick Bruenn <p.bruenn@beckhoff.com>
2018-02-04 12:00:58 +01:00
Patrick Bruenn
daebb796ff arm: imx: cx9020: move dram init into common place
Move dram_init(), dram_init_banksize() and get_effective_memsize() to
arch/arm/mach-imx/mx5/mx53_dram.c, where it can be reused by m53evk and
mx53loco.

Signed-off-by: Patrick Bruenn <p.bruenn@beckhoff.com>
2018-02-04 12:00:58 +01:00
Patrick Bruenn
a75a3ef305 arm: imx: cx9020: remove usage of mx53_dram_size
Static variables are not available during board_init_f().
'static uint32_t mx53_dram_size[2];' was used in board specific
dram_init(), dram_init_banksize() and get_effective_memsize() to avoid
multiple calls to get_ram_size().

However multiple calls are better than undefined behavior...
This fixes:
https://lists.denx.de/pipermail/u-boot/2017-November/313214.html
https://lists.denx.de/pipermail/u-boot/2017-December/314480.html

Signed-off-by: Patrick Bruenn <p.bruenn@beckhoff.com>
2018-02-04 12:00:58 +01:00
Nandor Han
886678fcf7 board,ge,bx50v3 - rtc time validation
Validate the time at startup:
 - in case rtc error add to kernel command line RTC_ERROR
 - clamp date to 1-Jan-2036

Signed-off-by: Nandor Han <nandor.han@ge.com>
Signed-off-by: Martyn Welch <martyn.welch@collabora.co.uk>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
2018-02-04 12:00:58 +01:00
Ian Ray
9e41b54a2e configs: ge_bx50v3: automatic partition selection and video output failure message
The exact definition of a successful boot is defined by user-space.
Determine the boot partition automatically.  A partition is selected if
file `/boot/bootcause/firstboot' exists (meaning that the partition has
freshly installed software) OR if file `/boot/fitImage' exists.

When userspace determines that new software was successfully installed,
it must (1) delete `/boot/fitImage' on the _inactive_ partition and (2)
remove `/boot/bootcause/firstboot'.

Enable video, but do not display logos or other version information.
Silence kernel console logging by default.

Print a message to VGA screen in case of boot failure and reset bootcount
to allow the user to attempt boot again.

Signed-off-by: Ian Ray <ian.ray@ge.com>
Signed-off-by: Martyn Welch <martyn.welch@collabora.co.uk>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
2018-02-04 12:00:58 +01:00
Hannu Lounento
f41a45830b board: ge: bx50v3: mount rootfs read-only
Change the kernel command line to mount the root filesystem read-only in
order to be able to run filesystem check on it on boot.

Signed-off-by: Hannu Lounento <hannu.lounento@ge.com>
Signed-off-by: Martyn Welch <martyn.welch@collabora.co.uk>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
2018-02-04 12:00:58 +01:00
Ian Ray
44395c8504 configs: ge_bx50v3: enable bootcount
Enable bootcount using an EXT file.

Signed-off-by: Ian Ray <ian.ray@ge.com>
Signed-off-by: Martyn Welch <martyn.welch@collabora.co.uk>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
2018-02-04 12:00:58 +01:00
Ian Ray
78ca33508d config: ge_bx50v3: read boot script
Read boot script from shared partition, if available.

Signed-off-by: Ian Ray <ian.ray@ge.com>
Signed-off-by: Martyn Welch <martyn.welch@collabora.co.uk>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
2018-02-04 12:00:58 +01:00
Ian Ray
f07b3148d7 board: ge: bx50v3: Support FIT and select configuration based on VPD
Modify configuration to support FIT. Set variable `confidx' from VPD,
in order to load the correct device tree. Modify/simplify U-Boot
environment to support loading FIT image.

Signed-off-by: Ian Ray <ian.ray@ge.com>
Signed-off-by: Martyn Welch <martyn.welch@collabora.co.uk>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
2018-02-04 12:00:58 +01:00
Martyn Welch
6d6564957c board: ge: bx50v3: Enable hardware watchdog
Enable the hardware watchdog on bx50v3 to cause it to reset in the event
the board hangs.

Configure GPIO_9 pin as WDOG1_B so that a watchdog timeout results in a
full system reset.

The watchdog is used and reconfigured by systemd approximately 1.7 seconds
into boot. Adding a few seconds for U-Boot and a few more seconds as a
safety margin.

Note that the PCIe controller is _not_ put back into a safe state prior
to board reset.  This is a problem if board reset is implemented as CPU
reset.

Signed-off-by: Ian Ray <ian.ray@ge.com>
Signed-off-by: Martyn Welch <martyn.welch@collabora.co.uk>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
2018-02-04 12:00:58 +01:00
Hannu Lounento
2850645cab board: ge: bx50v3: program MAC address to I210
There are two I210s on the b850v3 and one on the b450v3 and b650v3.
One is connected to Marvell 88e6240 which is already programmed.

Follow the flow documented in doc/README.enetaddr: set the
enet[0-9]*addr environment variable and let the driver program the
hardware.

The mapping from the driver's index to the environment variable's name
is documented in README: Note for Redundant Ethernet Interfaces. It is
assumed that eth_devices for the controllers on the board are always
indexed in the same order.

The environment variables are removed after programming the hardware
because the variables seem to influence MAC addresses also after U-Boot.
Specifically the MAC address of FEC (MC interface) would be incorrectly
set: 'ethaddr', which maps to the first I210 chip and is set to I210's
default address read from the driver by eth_write_hwaddr in eth_legacy.c
because the variable is undefined (not set even by bx50v3.c), would
result in the eth0 interface's MAC address to be set to I210's default
address.

Signed-off-by: Hannu Lounento <hannu.lounento@ge.com>
Signed-off-by: Ian Ray <ian.ray@ge.com>
Signed-off-by: Martyn Welch <martyn.welch@collabora.co.uk>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
2018-02-04 12:00:58 +01:00
Martyn Welch
cf678b31ac board: ge: bx50v3: move FEC MAC address programming to driver
Instead of programming the hardware directly in the board
implementation, follow the flow documented in doc/README.enetaddr: set
the enet[0-9]*addr environment variable and let the driver program the
hardware.

This avoids duplicating the implementation as it already exists in the
driver (drivers/net/fec_mxc.c: fec_set_hwaddr).

The mapping from the driver's index to the environment variable's name
is documented in README: Note for Redundant Ethernet Interfaces. It is
assumed that eth_devices for the controllers on the board are always
indexed in the same order, i.e. FEC always has the index 2.

The FEC driver does *not* set the flag Set MAC Address on Transmit (bit
set_eth0_mac_address used to do but this is unnecessary as the Linux
networking stack fills in the MAC address.

Signed-off-by: Hannu Lounento <hannu.lounento@ge.com>
Signed-off-by: Ian Ray <ian.ray@ge.com>
Signed-off-by: Martyn Welch <martyn.welch@collabora.co.uk>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
2018-02-04 12:00:58 +01:00
Ian Ray
3414913c24 configs: Add network device support for bx50v3 products
Modify b450v3, b650v3 and b850v3 defconfigs to enable the network devices
found in these products.

Signed-off-by: Ian Ray <ian.ray@ge.com>
Signed-off-by: Martyn Welch <martyn.welch@collabora.co.uk>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
2018-02-04 12:00:58 +01:00
Martyn Welch
87da89e803 board: ge: Enable access to i2c bus 1 and 2
The change in i2c configuration added to support access to the VPD has
inadvertantly caused access to i2c buses 1 & 2 to be lost. This has
resulted in the configuration for the PMIC to be attempted on the wrong
bus and thus isn't taking effect.

Add the required configuration to return access to buses 1 & 2. In order
to ensure that any users of the bus numbering prior to addition in VPD
patches work, add buses before configuration related to mux on bus 0 and
tweak VPD bus usage to fit new numbering scheme.

Signed-off-by: Martyn Welch <martyn.welch@collabora.co.uk>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
2018-02-04 12:00:58 +01:00
Nandor Han
958a2106f5 rtc: adding RX8010SJ rtc driver
Add a new driver for RX8010SJ rtc chip. The driver implements both
formats of U-Boot driver model.

Signed-off-by: Nandor Han <nandor.han@ge.com>
Signed-off-by: Martyn Welch <martyn.welch@collabora.co.uk>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
2018-02-04 12:00:58 +01:00
Hannu Lounento
8d9bde0dbb net: e1000: implement eth_write_hwaddr
Implement programming MAC address to the hardware, i.e. external flash
seen as EEPROM.

MAC address is only written if it differs from what is already stored in
flash or if reading the current MAC address fails.

Signed-off-by: Hannu Lounento <hannu.lounento@ge.com>
CC: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Martyn Welch <martyn.welch@collabora.co.uk>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
2018-02-04 12:00:58 +01:00
Hannu Lounento
e0a75fed9e net: e1000: split e1000_read_mac_addr
Split the implementation of e1000_read_mac_addr into eeprom and register
versions called by e1000_read_mac_addr.

This allows for calling e1000_read_mac_addr when MAC address is needed
with no constraints where it is read from, and for calling the register
and, especially, the eeprom version directly in order to specify where
to read the address from.

Signed-off-by: Hannu Lounento <hannu.lounento@ge.com>
CC: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Martyn Welch <martyn.welch@collabora.co.uk>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
2018-02-04 12:00:58 +01:00
Hannu Lounento
f1bcad22dd net: e1000: add support for writing to EEPROM
Port functions for writing to EEPROM, updating the checksum and
committing data to flash from the Linux kernel igb driver.

Functions were ported from Linux 4.8-rc2 (694d0d0bb20).

Signed-off-by: Hannu Lounento <hannu.lounento@ge.com>
CC: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Martyn Welch <martyn.welch@collabora.co.uk>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
2018-02-04 12:00:58 +01:00
Peng Fan
a61b65ffb5 imx: mx8m: add ddr controller memory map
Add ddrc memory map and enum types used in ddr initialization.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
2018-02-04 12:00:58 +01:00
Peng Fan
a35332fa28 power: pmic/regulator allow dm be omitted by SPL
Allow the dm driver be omitted by SPL.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2018-02-04 12:00:58 +01:00
Peng Fan
52df705c96 imx: imx8mq: add dtsi file
Add dtsi file for i.MX8MQ.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
2018-02-04 12:00:58 +01:00
Ye Li
f24e482ae0 net: fec: fix build warnings for 64bits support
When building for 64bits system, we get some warnings about type
cast between pointer and integer. This patch eliminates the warnings
by using ulong/long type which is 32bits on 32bits system or 64bits on
64bits system.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-02-04 12:00:58 +01:00
Peng Fan
238a53c710 net: fec: do not access reserved register for i.MX8M
The MIB RAM and FIFO receive start register does not exist on
i.MX8M. Accessing these register will cause system hang.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
2018-02-04 12:00:58 +01:00
Peng Fan
8953d86664 gpio: mxc: add i.MX8M support
Add i.MX8M GPIO support.
There are 4 GPIO banks on i.MX8M.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Stefano Babic <sbabic@denx.de>
2018-02-04 12:00:58 +01:00
Peng Fan
3baa9ec44a imx: lcdif: include i.MX8M
Include i.MX8M in lcdif register layout map.
Also included i.MX7ULP in this patch, since share same with i.MX8M.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-02-04 12:00:58 +01:00
Peng Fan
eec2d43795 mmc: fsl_esdhc: support i.MX8M
Support i.MX8M in fsl esdhc driver.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-02-04 12:00:58 +01:00
Peng Fan
8a099b6860 misc: ocotp: add i.MX8M support
i.MX8M OCOTP follow same flow as i.MX6Q, but it has 64 banks
and each bank 4 words.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-02-04 12:00:58 +01:00
Peng Fan
e0e4e53375 imx: makefile: compile files for i.MX8M
Compile files for i.MX8M

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
2018-02-04 12:00:58 +01:00
Peng Fan
fcdbde7ce0 imx: mx8m: add soc related settings and files
Add SoC level initialization code
 - arch_cpu_init
 - mmu table
 - detect cpu revision
 - reset cpu and wdog settings
 - timer init
 - wdog settings
 - lowlevel init to save/restore registers
 - a few dummy header file to avoid build failure
 - ft_system_setup

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
2018-02-04 12:00:58 +01:00
Peng Fan
c1ef486327 imx: mx7: move mmc env code to mmc_env.c
The mx7 mmc env code is shared by i.MX8M, so move it to mmc_env.c.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2018-02-04 12:00:58 +01:00
Peng Fan
80ebf86d9b imx: cpu: support get_boot_device for i.MX8M
Enable get_boot_device for i.MX8M, it supports boot type USB.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
2018-02-04 12:00:58 +01:00
Peng Fan
770611f21e imx: mx7: move get_boot_device to cpu.c
Move get_boot_device to cpu.c to prepare adding i.MX8M support,
because i.MX8M share same code with i.MX7.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
2018-02-04 12:00:58 +01:00
Peng Fan
ecd7ab5628 imx: bootaux: support i.MX8M
Add i.MX8M support. Because i.MX8M use SiP call trap
to Arm Trusted Firmware to handle M4, so use #ifdef
to avoid build error on i.MX6/7.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2018-02-04 12:00:58 +01:00
Peng Fan
8cf223133c imx: cleanup bootaux
Move i.MX6/7 bootaux code to imx_bootaux.c.
The i.MX6/7 has different src layout, so define M4 reg offset
to ease the cleanup. Redefine the M4 related BIT for share
common code.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
2018-02-04 12:00:58 +01:00
Peng Fan
6ce8b10b87 imx: refactor imx_get_mac_from_fuse
Move imx_get_mac_from_fuse to a new mac.c for i.MX6/7.
Since fuse regs structure are different for i.MX6/7, use mac
address offset in code and define a new local struture
imx_mac_fuse.

Also sort the config order.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
2018-02-04 12:00:58 +01:00
Peng Fan
e56d9d79e5 imx: cpu: add cpu speed/grade for i.MX8M
Use more general enum types for speed grade.
Refine get_cpu_speed_grade_hz to support i.MX8M.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
2018-02-04 12:00:58 +01:00
Peng Fan
423e84bc72 imx: cpu: move speed/temp to common cpu
The i.MX7 cpu speed/temp code could be reused on i.MX8M,
so move them to common cpu code.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
2018-02-04 12:00:58 +01:00
Peng Fan
995e9fef8f imx: add pad settings bit definition for i.MX8M
Add pad settings bit definition for i.MX8M.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Stefano Babic <sbabic@denx.de>
2018-02-04 12:00:58 +01:00
Peng Fan
4fdffb9856 imx: add i.MX8MQ SoC Revision and is_mx8m helper
Add i.MX8MQ SoC Revision
Add is_mx8m helper
The 7ULP is a dummy number, so use 0xEx.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Stefano Babic <sbabic@denx.de>
2018-02-04 12:00:58 +01:00
Peng Fan
d7cb10a05f imx: spl: implement spl_boot_device for i.MX8M
Implement spl_boot_device for i.MX8M.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Stefano Babic <sbabic@denx.de>
2018-02-04 12:00:58 +01:00
Peng Fan
7537e93290 imx: cpu: update cpu file to support i.MX8M
Update get_reset_cause to reflect i.MX8M
Compile out get_ahb_clk and set_chipselect_size for i.MX8M

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
2018-02-04 12:00:58 +01:00
Peng Fan
912d97b108 imx: boot_mode: add USB_BOOT entry
Add USB_BOOT entry.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-02-04 12:00:58 +01:00
Peng Fan
de274663f5 imx: add sip function
Add SiP (Silicon Provider) services function to issue
SMC call to Arm Trusted Firmware.

More SiP information could be found in
  https://github.com/ARM-software/arm-trusted-firmware/blob/master/
  docs/arm-sip-service.rst

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
2018-02-04 12:00:58 +01:00
Peng Fan
bb0fabe42d imx: mx8m: add clock driver
Add clock driver to support i.MX8M.

There are two kind PLLs, FRAC pll and SSCG pll. ROM already
configured SYS PLL1/2, we only need to configure the output.
ocotp/i2c/pll decoding and configuration/usdhc/lcdif/dram pll/
enet clock are configured in the code.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
2018-02-04 12:00:58 +01:00
Peng Fan
80fd219ec7 imx: mx8m: add pin header file
Add pin header file for i.MX8M

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Stefano Babic <sbabic@denx.de>
2018-02-04 12:00:58 +01:00
Peng Fan
3e4aeebcdb imx: mx8m: add register definition header file
Add register definition header file for i.MX8M

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Stefano Babic <sbabic@denx.de>
2018-02-04 12:00:58 +01:00
Peng Fan
7a7391fd7e imx: add i.MX8M into Kconfig
Add i.MX8M into Kconfig, create a new folder mx8m
dedicated for i.MX8M.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Stefano Babic <sbabic@denx.de>
2018-02-04 12:00:58 +01:00
Jagan Teki
b9d984ea16 configs: icore: enable nand on mmc defconfig
Enable nand on mmc defconfig, so-that preparing nand
for writing/updating bootimage, Linux becomes easy.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-02-04 12:00:58 +01:00
Jagan Teki
c282eae07c configs: enable spl support wrt env device
nand device needed for mmc config to access nand
for write and update so enabling SPL_SUPPORT to mmc
or nand is wrt to env device rather nand driver check.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-02-04 12:00:58 +01:00
Anson Huang
4f0cd03723 imx: mx7: psci: add system power off support
Add i.MX7 PSCI system power off support, linux
kernel can use "poweroff" command to power off
system via SNVS, PMIC power will be disabled.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
2018-02-04 12:00:58 +01:00
Anson Huang
169c20e903 imx: mx7: psci: add system reset support
Add i.MX7 PSCI system reset support, linux
kernel can use "reboot" command to reset
system even wdog driver is disabled in kernel.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
2018-02-04 12:00:58 +01:00
Anson Huang
0ec3d98f76 mx7_common: use psci 1.0 instead of 0.1
Use PSCI 1.0 instead of 0.1 to support more power
management feature like system reset, power off etc..

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
2018-02-04 12:00:58 +01:00
Jagan Teki
04c28a7810 board: i.MX6QDL: add Engicam i.CoreM6 1.5 QDL MIPI starter kit
i.CoreM6 1.5 is an another i.CoreM6 QDL cpu modules which can be connected
to EDIMM starter kit design with eMMC and MIPI-CSI interfaces suitable for
Android and video capture application.

notable features:
CPU			NXP i.MX6 S/DL/D/Q, Up to 4 x Cortex-A9@800MHz
Memory  		Up to 2 GB DDR3-1066
Video Interfaces	Up to 1 Parallel Up to 2 LVDS HDMI 1.4
			port 8 bit CSI INPUT MIPI-CSI INPUT
1 x 10/100 Ethernet interface, 2 x USB, 1 x PCIe, 1 x I2S etc

This patch adds support for Quad/Dual and DualLite/Solo SOM's on
MIPI starter kit with boot from SD and eMMC.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-02-04 12:00:58 +01:00
Heinrich Schuchardt
1973b381a1 log: add category LOGC_EFI
The EFI implementation does not fit into any of the existing categories.

Provide LOGC_EFI so that EFI related message can be filtered.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-02-03 10:09:28 -07:00
Simon Glass
3707c6ee0d log: Add a way to log error-return values
When functions return an error it propagates up the stack to the point
where it is reported. Often the error code provides enough information
about the root cause of the error that this is obvious what went wrong.

However in some cases the error may be hard to trace. For example if a
driver uses several devices to perform an operation, it may not be
obvious which one failed.

Add a log_ret() macro to help with this. This can be used to wrap any
error-return value. The logging system will then output a log record when
the original error is generated, making it easy to trace the call stack
of the error.

This macro can significantly impact code size, so its use is controlled
by a Kconfig option, which is enabled for sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-02-03 10:09:27 -07:00
Simon Glass
8cb7c04248 log: Add documentation for commands and formatting
Add some notes about recent new features.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-02-03 10:09:27 -07:00
Simon Glass
aa4e0e005b log: Add tests for the new log features
Add a test of the 'log format' and 'log rec' commands. This also covers
things like log_get_cat_by_name(), since they are used by these commands.
Fix a style nit in the tests also.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-02-03 10:09:27 -07:00
Simon Glass
3fd24fa9ed log: Add a command to output a log record
Add a 'log rec' command which allows a log record to be manually output.
This is useful for scripts which want full control over what is logged. It
also permits easy testing of the log system.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-02-03 10:09:27 -07:00
Simon Glass
ad0e503991 log: Add a command to control the log output format
Add a 'log format' command which can display or change the log output
format. This is useful for changing how much information is displayed. The
ordering of the fields is fixed.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-02-03 10:09:27 -07:00
Simon Glass
deca50fbd5 log: Update log_console to honour the log format
At present this just outputs the message. Update it to output whatever the
format requests.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-02-03 10:09:27 -07:00
Simon Glass
3b73e8d067 log: Add control over log formatting
It is useful to be able to control the output format of log records on the
console. As a starting point, add definitions for controlling which
elements of the log record are displayed. Use function and message as the
default, since these are the most useful fields.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-02-03 10:09:27 -07:00
Simon Glass
f941c8d76c log: Add functions to convert IDs to/from names
Category and level both use an enum for their ID values. Add functions to
convert these IDs to strings and vice versa. This will allow the log to
output the strings instead of the (inscrutable) values.

At the same time, add a new 'driver-model' category, to cover core
driver-model functions and fix an incorrect value for LOGL_MAX.

Tests will be added with the new 'log' subcommands.

Signed-off-by: Simon Glass <sjg@chromium.org>
(Updated to correct clang warnings)
2018-02-03 10:09:13 -07:00
Simon Glass
6e43d1b199 dm: core: Add a function to look up a uclass by name
Each uclass has a driver name which we can use to look up the uclass. This
is useful for logging, where the uclass ID is used as the category.

Add a function to handle this, as well as a test.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-02-03 10:08:40 -07:00
Lukasz Majewski
b2153075f4 Kconfig: usb: rockchip: Remove not needed *_defconfig USB/gadget entries
After moving some USB gadget configs (USB_FUNCTIONS_*) to Kconfig it
turned out that following *_defconfig entries for RockChip are not
needed.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2018-02-02 07:13:48 -05:00
Lukasz Majewski
e4d4604a7b usb: ums: Kconfig: Select USB_FUNCTION_MASS_STORAGE when enabling 'ums' command
The CONFIG_USB_FUNCTION_MASS_STORAGE must be selected when one enables
support for ums command.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2018-02-02 07:13:48 -05:00
Lukasz Majewski
4f60e5d3a8 Kconfig: gadget: Move CONFIG_USB_FUNCTION_MASS_STORAGE to Kconfig
This commit moves USB_FUNCTION_MASS_STORAGE config to Kconfig.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2018-02-02 07:13:48 -05:00
Lukasz Majewski
c6c1ca100f Kconfig: gadget: Move CONFIG_USB_FUNCTION_THOR to Kconfig
This commit moves USB_FUNCTION_THOR config to Kconfig.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2018-02-02 07:13:48 -05:00
Lukasz Majewski
b76965958c Kconfig: usb: Sort USB_FUNCTION_* entries
Lets provide alphabetical order for USB_FUNCTION_* entries of
USB_GADGET_DOWNLOAD

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2018-02-02 07:13:48 -05:00
Simon Goldschmidt
80719938c9 env: sf: use env_import_redund to simplify env_sf_load
For the redundant environment configuration, env_sf_load still
contained duplicate code instead of using env_import_redund().

Simplify the code by only executing the load twice and delegating
everything else to env_import_redund.

Signed-off-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2018-02-01 08:05:53 -05:00
Simon Goldschmidt
2166ebf783 env: make env drivers propagate env_import return value
For multiple env drivers to correctly implement fallback when
one environment fails to load (e.g. crc error), the return value
of env_import has to be propagated by all env driver's load
function.

Without this change, the first driver that succeeds to load an
environment with an invalid CRC return 0 (success) and no other
drivers are checked.

Signed-off-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2018-02-01 08:05:53 -05:00
Simon Goldschmidt
31f044bd91 env: move more common code to env_import_redund
There is more common code in mmc, nand and ubi env drivers that
can be shared by moving to env_import_redund.

For this, a status/error value whether the buffers were loaded
are passed as additional parameters to env_import_redund.
Ideally, these are already returned to the env driver by the
storage driver. This is the case for mmc, nand and ubi, so for
this change, code deduplicated.

Signed-off-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2018-02-01 08:05:49 -05:00
Simon Goldschmidt
42a1820bbc env: make env_import(_redund) return 0 on success, not 1
env_import (and env_import_redund) currently return 1 on success
and 0 on error. However, they are only used from functions
returning 0 on success or a negative value on error.

Let's clean this up by making env_import and env_import_redund
return 0 on success and -EIO on error (as was the case for all
users before).

Users that cared for the return value are also updated. Funny
enough, this only affects onenand.c and sf.c

Signed-off-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2018-01-31 18:45:10 -05:00
Simon Goldschmidt
87c7fb396a cmd: nvedit: env_get_f must check for env_get_char error codes
env_get_f calls env_get_char to load single characters from the
environment. However, the return value of env_get_char was not
checked for errors. Now if the env driver does not support the
.get_char call, env_get_f did not notice this and looped over the
whole size of the environment, calling env_get_char over 8000
times with the default settings, just to return an error in the
end.

Fix this by checking if env_get_char returns < 0.

Signed-off-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2018-01-31 18:45:10 -05:00
Tom Rini
48f58a5973 Merge git://git.denx.de/u-boot-fsl-qoriq 2018-01-31 18:44:31 -05:00
Tom Rini
2e87980580 davinci: Fix omapl138_lcdk builds
The omapl138_lcdk platform is not a DA850 SoC so we need to select
SOC_DA8XX and not SOC_DA850, as it was before.  It does however point
out a bit of a misnomer in how all of these PLL defines are named as
they are generic to DA8xx, not DA850 centric.  Remove the 'if SOC_DA850'
under the defaults as these are simply the defaults.  As SOC_DA8XX will
select SYS_DA850_DDR_INIT when needed, we do not need it under both SOC
options.

Fixes: 76e22222d3 ("Convert CONFIG_SYS_DV_CLKMODE et al to Kconfig")
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-01-31 15:44:58 -05:00
Tom Rini
ab21ecef7a Merge tag 'xilinx-for-v2018.03' of git://git.denx.de/u-boot-microblaze
Xilinx changes for v2018.03

- Several Kconfig fixes (also moving configs to defconfigs)
- Some DTS updates
- ZynqMP psu rework based on Zynq concept
- Add low level initialization for zc770 and zcu102
- Add support for Zynq zc770 x16 nand configuration
- Add mini nand/emmc ZynqMP targets
- Some arasan nand changes
2018-01-31 07:10:55 -05:00
Adam Ford
11d2e98d7e Convert CONFIG_SYS_OMAP24_I2C_SLAVE et al to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_OMAP24_I2C_SLAVE
   CONFIG_SYS_OMAP24_I2C_SPEED

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Paul Kocialkowski <contact@paulk.fr>
2018-01-30 14:59:32 -05:00
Adam Ford
76e22222d3 Convert CONFIG_SYS_DV_CLKMODE et al to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_DV_CLKMODE
   CONFIG_SYS_DA850_PLL0_POSTDIV
   CONFIG_SYS_DA850_PLL0_PLLDIV1
   CONFIG_SYS_DA850_PLL0_PLLDIV2
   CONFIG_SYS_DA850_PLL0_PLLDIV3
   CONFIG_SYS_DA850_PLL0_PLLDIV4
   CONFIG_SYS_DA850_PLL0_PLLDIV5
   CONFIG_SYS_DA850_PLL0_PLLDIV6
   CONFIG_SYS_DA850_PLL0_PLLDIV7
   CONFIG_SYS_DA850_PLL1_POSTDIV
   CONFIG_SYS_DA850_PLL1_PLLDIV1
   CONFIG_SYS_DA850_PLL1_PLLDIV2
   CONFIG_SYS_DA850_PLL1_PLLDIV3

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-01-30 12:52:57 -05:00
Derald D. Woods
405fc8305b Convert CONFIG_SYS_BOOT_GET_{CMDLINE, KBD} to Kconfig
This converts the following to Kconfig:
	CONFIG_SYS_BOOT_GET_CMDLINE
	CONFIG_SYS_BOOT_GET_KBD

Signed-off-by: Derald D. Woods <woods.technical@gmail.com>
2018-01-30 12:52:57 -05:00
York Sun
58932ec68c armv8: ls2088ardb: Add 3DS RDIMM support
Tested with MTA72ASS8G72PSZ-2S6G1. This is 3DS RDIMM module with x4
DDR chips. LS2088ARDB needs to be modified to connect all DQS signals.
Some of them are grounded by default for x8 chips. Tested with RDIMM
MTA18ASF2G72PDZ on main memory controllers. DP-DDR doesn't support
RDIMM. Dropped related timing table.

Signed-off-by: York Sun <york.sun@nxp.com>
2018-01-30 09:14:07 -08:00
York Sun
f513de6c82 armv8: ls1046ardb: Add RDIMM support
This adds 2Rx8 RDIMM on LS1046ARDB board. Tested with RDIMM
MTA18ASF2G72PDZ and MTA9ASF1G72PZ.

Signed-off-by: York Sun <york.sun@nxp.com>
2018-01-30 09:14:07 -08:00
York Sun
140ad2d899 drivers/ddr/fsl: Cleanup unused variable
Variable "row_density" is no longer used. Drop it from DIMM structure.

Signed-off-by: York Sun <york.sun@nxp.com>
2018-01-30 09:14:07 -08:00
York Sun
944537c56e drivers/ddr/fsl: Modify binding registers to save time on data init
DDR controllers always use binding register to determine the memory
space to perform data initialization. In case of controller interleaving,
the space is doubled, resulting twice long wait. It wasn't too bad until
the memory capacity increases. To reduce the wait time, reduce the
binding space to half and restore it after data initialization.
Three-way interleaving is no longer used and is removed.

Signed-off-by: York Sun <york.sun@nxp.com>
2018-01-30 09:14:07 -08:00
York Sun
564e9383e5 drivers/ddr/fsl: Add calculation of register control words
DDR4 RDIMM has some information in SPD to be used to calculate the
control words for register chip. The rest can be found from JEDEC
spec DDR4RCD02.

Signed-off-by: York Sun <york.sun@nxp.com>
2018-01-30 09:14:07 -08:00
York Sun
c0c32af0b2 drivers/ddr/fsl: Add 3DS RDIMM support
On top of RDIMM support, add new register calculation to support
3DS RDIMMs. Only symmetrical 3DS is supported at this time.

Signed-off-by: York Sun <york.sun@nxp.com>
2018-01-30 09:14:07 -08:00
York Sun
d46ec0bbaf drivers/ddr/fsl: Fix workaround for A009803
Wrong field was masked in this workaround due to wrong endianness. The
impacted SoCs have big-endian.

Signed-off-by: York Sun <york.sun@nxp.com>
2018-01-30 09:14:06 -08:00
York Sun
426230a65f drivers/ddr/fsl: Fix DDR4 RDIMM support
For DDR4, command/address delay in mode registers and parity latency
in timing config register are only needed for UDIMMs, but not RDIMMs.
Add additional register rcw_3 for DDR4 RDIMM. Fix mirrored bit for
dual rank RDIMMs. Set sdram_cfg_3[DIS_MRS_PAR] for RDIMMs. Fix
calculation of timing config registers. Use hexadecimal format for
printing RCW (register control word) registers.

Signed-off-by: York Sun <york.sun@nxp.com>
2018-01-30 09:14:06 -08:00
Ashish Kumar
a9b1c2164a armv8: ls1088a: Add CONFIG_SPI_FLASH_SPANSION to sdcard defconfigs
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-30 09:13:45 -08:00
Yogesh Gaur
f9747a5a5d driver: fsl-mc: Perform fsl-mc fdt fixup for lazyapply dpl
For for case of lazyapply method, API fdt_fixup_board_enet() gets
invoked before DPL being deployed. This leads to an issue that
fsl-mc fdt fixup status marked as fail and dprc driver didn't get
registered in linux boot.

Fixes this issue by calling fdt_fixup_board_enet() for case when
DPL is deployed successfully in lazyapply method.

Signed-off-by: Yogesh Gaur <yogeshnarayan.gaur@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-30 09:13:32 -08:00
Tom Rini
f1554b28d3 Merge git://git.denx.de/u-boot-x86 2018-01-30 10:09:01 -05:00
Ulf Magnusson
e21b04fec4 x86: kconfig: Remove meaningless 'select n'
'select n' selects a constant symbol, which is meaningless and has no
effect. Maybe this was meant to be a 'default n', though bool and
tristate symbols already implicitly default to n.

Discovered in Kconfiglib (https://github.com/ulfalizer/Kconfiglib),
which does more strict checking here:

	kconfiglib.KconfigSyntaxError: board/google/Kconfig:34: Couldn't parse '	select n': expected nonconstant symbol

Signed-off-by: Ulf Magnusson <ulfalizer@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2018-01-30 22:34:38 +08:00
Tom Rini
d0c0752add x86: quark: Fix unused warnings
The variable t_rfc is never used, so drop it.  The variables ddr_wctl
and ddr_wcmd are only used in certain manual instances, so guard their
declaration by the same check as their use.

Cc: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2018-01-30 22:34:38 +08:00
Heinrich Schuchardt
ca92ad4f68 cmd/bdinfo: print relocation info on X86
For debugging U-Boot in qemu-x86 the relocation address is needed.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2018-01-30 22:34:38 +08:00
Bin Meng
2d1c661915 x86: qemu: qfw: Implement acpi_get_rsdp_addr()
U-Boot on QEMU does not build ACPI table by ourself, instead it uses
the prebuilt ACPI table via the qfw interface. This implements the
qfw version of acpi_get_rsdp_addr() for setup_zimage().

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2018-01-30 22:34:37 +08:00
Bin Meng
45410da714 x86: acpi: Use an API to get the ACPI RSDP table address
At present the acpi_rsdp_addr variable is directly referenced in
setup_zimage(). This changes to use an API for better encapsulation
and extension.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2018-01-30 22:34:37 +08:00
Ulf Magnusson
e7563c204e arm64: zynqmp: Fix misspelled choice default
There is no JTAG symbol in the "Boot mode" choice. JTAG_MODE was
probably intended.

No functional changes. Kconfig choices fall back on using the first
(visible) symbol in the choice as the default if the default symbol is
not visible.

Discovered in Kconfiglib (https://github.com/ulfalizer/Kconfiglib),
which prints the following warning:

	warning: the default selection JTAG (undefined) of <choice> (defined at arch/arm/cpu/armv8/zynqmp/Kconfig:107) is not contained in the choice

I've added a corresponding warning to the C tools too, which is
currently in linux-next: https://patchwork.kernel.org/patch/9983667/

Signed-off-by: Ulf Magnusson <ulfalizer@gmail.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-30 14:29:52 +01:00
Vipul Kumar
aae7422b45 arm64: zynqmp: Moved ethernet PHY configs of ZynqMP boards to defconfig
This patch moved ethernet PHY configs of ZynqMP boards
to respective defconfig.

Signed-off-by: Vipul Kumar <vipulk@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-30 14:29:52 +01:00
Vipul Kumar
bd5a8e5850 microblaze: Moved ethernet PHY configs of Microblaze board to defconfig
This patch moved ethernet PHY configs of Microblaze board to
respective defconfig.

Signed-off-by: Vipul Kumar <vipulk@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-30 14:29:52 +01:00
Vipul Kumar
77217c4b5f arm: zynq: Moved ethernet PHY configs of Zynq boards to defconfig
This patch moved ethernet PHY configs of Zynq boards
to respective defconfig.

Signed-off-by: Vipul Kumar <vipulk@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-30 14:29:48 +01:00
Michal Simek
c239f49f8a arm: zynq: Remove ethernet alias for topic-miami
Ethernet is not enabled that's why this alias should be completely
unused.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-30 14:29:41 +01:00
Michal Simek
d78b4ae06a arm: zynq: Mark cc108 uart to be initialized before relocation
The same change is done for others zynq boards to get uart as early as
possible.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-30 14:29:37 +01:00
Michal Simek
3e1b61de58 arm: zynq: Update years in copyright to reflect latest changes
Updating year in zynq files. Also add missing Copyright to board.c.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-30 14:29:32 +01:00
Michal Simek
6c45abe709 arm64: zynqmp: Add psu_init for zcu102-rev1.0
Add low level initialization for zcu102-rev1.0.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-30 14:29:24 +01:00
Michal Simek
2ad341ed7d arm64: zynqmp: Prepare psu_init rework
Move generic functions to common location psu_spl_init.c. Function
declarations are added to private header.
These changes are done in connection to the fact that still files from
HDF can be copied over and compilation should pass.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-30 14:29:18 +01:00
Michal Simek
88f05a926d arm64: zynqmp: Call psu_init() only when ZYNQMP_PSU_INIT_ENABLED
Remove SPL_BUILD dependency from zynqmp.c and move it to header file.
Use only one symbol for including psu_init.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-30 14:29:12 +01:00
Michal Simek
9753c4f886 arm64: zynqmp: Remove unused empty functions
Remove functions which are no longer renerated by PCW.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-30 14:29:08 +01:00
Ezequiel Garcia
d55c8159bd nand: arasan: Select CONFIG_SYS_NAND_SELF_INIT
The Arasan NFC driver requires the self-init mode,
so it should select it.

Instead of having the config header define the macro,
it's cleaner to select the option at the Kconfig level.

Signed-off-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-30 14:29:07 +01:00
Siva Durga Prasad Paladugu
f25ac66c52 nand: arasan_nfc: Use the calculated ecc address for updating ecc register
This patch corrects the ecc address calculation before updating
to ecc register. The ecc address has to be calculated based on
page, oob and ecc sizes of the device.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-30 14:29:07 +01:00
Siva Durga Prasad Paladugu
cacb8a029f nand: arasan_nfc: Add support for ondie ecc
This patch adds support for ondie ecc. As of now
this adds support for micron parts which supports
ondie ecc.
Didn't found any better way to detect ondie ecc
support by a device except sorting out with
manufacture and device id's.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-30 14:29:07 +01:00
Siva Durga Prasad Paladugu
b08fc34f3f nand: arasan_nfc: Move common ecc struct initialization init routine
Move common part of ecc structure initialization to
arasan_nand_init() routine.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-30 14:29:07 +01:00
Siva Durga Prasad Paladugu
2678059ec8 xilinx: zynqmp: Add new target with only emmc enabled
This patch adds new target which is called as mini configuration
with only emmc functionality and other required basic features enabled.
This will be used to run in system with small footprint and needs
emmc support.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-30 14:29:07 +01:00
Siva Durga Prasad Paladugu
c8a6bade5b xilinx: zynqmp: Add new target with only nand enabled
This patch adds new target which is called as mini configuration
with only nand functionality and other required basic features enabled.
This will be used to run in system with small footprint and needs
nand support.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-30 14:29:07 +01:00
Siva Durga Prasad Paladugu
3b644a3c2f arm64: zynqmp: Provide a config to not map DDR region in MMU table
DDR less systems are possible for configuration like mini qspi
and making DDR region as normal memory may cause speculative
access which results u-boot hang if DDR is absent. So, this
patch fixes the issue by not making DDR memory region
entry into MMU table.

Future solution is to prepare MMU table per memory node in dts instead
of hard code DDR addresses.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-30 14:29:03 +01:00
Michal Simek
f32e79f159 arm64: zynqmp: Propagate error value from psu_init()
psu_init() returns int which wasn't declared and checked.
The patch is fixing function declarations and code to handle return
values properly.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-30 14:28:59 +01:00
Michal Simek
7109930a70 arm64: zynqmp: Remove whitespaces in psu_init() comment
Remove additional spaces before comment.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-30 14:28:58 +01:00
Michal Simek
427d568c31 arm: zynq: Fix pmu register description coding style
Drop the space before/after '<' and '>'; and
separate the entries to be a bit more readable.

Reported-by: Julia Cartwright <julia@ni.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-30 14:28:54 +01:00
Michal Simek
a587051f5d arm: zynq: Enable distro defaults setting
BOOTCOMMAND is composed with distro_bootcmd but this variable is not
present. Enabling distro defaults setting is fixing it.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-30 14:28:50 +01:00
Michal Simek
83144cd336 arm: zynq: Move bootcommand to defconfig
It will cleanup generic config and enable option to change it for every
board.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-30 14:28:45 +01:00
Michal Simek
93561a327b arm: zynq: Enable DM_GPIO when needed
There are two reasons for doing this change.
There is still !DM driver for xilinx soft gpio IP and especially it is
saving some space for memory constrained boards like cse (almost ~400B).

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-30 14:28:44 +01:00
Michal Simek
c4a142f4a6 arm: zynq: Enable DM_ETH and DM_MMC only if subsystem is enabled
Do not enable DM_ETH/MMC if subsystems are not enabled.
This saves memory for memory constrained boards like cse.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-30 14:28:44 +01:00
Michal Simek
099b9ae7b7 arm: zynq: Enable BLK when needed
There is no reason to enable BLK by default for all boards which is just
increasing memory footprint for memory contrained boards like cse.
zc770s are also saving some space.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-30 14:28:44 +01:00
Michal Simek
92dde1a7cc arm: zynq: Disable networking for zc770 xm011
Ethernet cable is not connected for xm011 that's why disable all
ethernet related configurations.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-30 14:28:44 +01:00
Michal Simek
df7810863f arm: zynq: Enable debug console for zc770 xm011
Wire debug console which is useful for early debugging.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-30 14:28:44 +01:00
Michal Simek
0732d7cd86 arm: zynq: Add identification string to Xilinx boards
It is good to see this string to make sure that u-boot which runs on the
board is the same which should run there.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-30 14:28:44 +01:00
Anders Hedlund
501fbc6744 armv8: zynqmp: Map PCIe High as device memory
Set the 8GB PCIe High area as device memory.
Also extend the DDR High area to cover the full 32GB range.

Signed-off-by: Anders Hedlund <anders.j.hedlund@gmail.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-30 14:28:40 +01:00
Siva Durga Prasad Paladugu
01c42d3d74 xilinx: zynqmp: Use strlen only if env_get doesn't return null
Add check if boot_targets exists in environment and then
generate new_targets env accordingly. Performing strlen on
null address causes it to fail with exception if isolation
is enabled with DDR address zero as secure. It works with out
isolation enabled as zero is valid address but it may lead to
junk values in boot_targets.
This patch fixes the issue by checking return value of env_get
so that it generate boot_targets properly.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-30 14:28:35 +01:00
Masahiro Yamada
3c0e607c31 ARM: zynq: remove unused CONFIG_ZC770_XM01* options
These are defined, but not referenced at all.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-30 14:28:34 +01:00
Michal Simek
5a60a548f7 arm: zynq: Fix types in ps7_spl_init
The patch is fixing the following Warning:
arch/arm/mach-zynq/ps7_spl_init.c:133:24: warning: comparison between
signed and unsigned integer expressions [-Wsign-compare]
    while (ioread(addr) < delay)
                        ^

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-30 14:28:31 +01:00
Michal Simek
77cbd9536e arm: zynq: Add support for zc770-xm011-x16 configuration
zc770-xm011 is x8 width configuration. This FMC card has also x16
variant which requires different ps7_init configuration. This patch adds
it.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-30 14:28:25 +01:00
Michal Simek
b9b2724111 arm: zynq: Add zc770-xm013 spl configuration
Simplify ps7_init* initialization.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-30 14:28:24 +01:00
Michal Simek
7f6a0d4688 arm: zynq: Add zc770-xm012 spl configuration
Simplify ps7_init* initialization.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-30 14:28:24 +01:00
Michal Simek
7ad2a5b8fb arm: zynq: Add zc770-xm011 spl configuration
Simplify ps7_init* initialization.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-30 14:28:24 +01:00
Michal Simek
ecd69c3e36 arm: zynq: Add zc770-xm010 spl configuration
Simplify ps7_init* initialization.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-30 14:28:24 +01:00
Michal Simek
546a496ffd doc: zynq: Describe status of zc770-xm011
zc770-xm011 is also added and supported. Reflect this in README.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-30 14:28:19 +01:00
Andy Shevchenko
3469bf4274 x86: zImage: Propagate acpi_rsdp_addr to kernel via boot parameters
New field acpi_rsdp_addr, which has been introduced in boot protocol
v2.14 [1], in boot parameters tells kernel the exact address of RDSP
ACPI table. Knowing it increases robustness of the kernel by avoiding
in some cases traversal through a part of physical memory.
It will slightly reduce boot time by the same reason.

[1] See Linux kernel commit

  2f74cbf ("x86/boot: Add the ACPI RSDP address to struct setup_header::acpi_rdsp_addr")
  @ https://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git/commit/?id=2f74cbf

for the details.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: updated the kernel commit git URL and fixed one style issue]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2018-01-30 14:29:07 +08:00
Andy Shevchenko
378960d8c2 x86: zImage: Move subarch assignment out of cmd_line check
The commit

  20bfac0599 ("x86: zImage: add Intel MID platforms support")

introduced an assignment of subarch field in boot parameters, though
missed the right place of doing that. It doesn't matter if we have or
not a kernel command line supplied, we just set that field. Although
guard it by protocol version which supports it.

Fixes: 20bfac0599 ("x86: zImage: add Intel MID platforms support")
Cc: Vincent Tinelli <vincent.tinelli@intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2018-01-30 14:29:07 +08:00
Andy Shevchenko
7b36dbdec7 x86: Fix reference to QEMU variant of write_acpi_tables()
The commit

  eece493a7a ("cmd: qfw: bring ACPI generation code into qfw core")

moves ACPI related code to another file and missed an update of
references in acpi_table.c.

Do it now.

Fixes: eece493a7a ("cmd: qfw: bring ACPI generation code into qfw core")
Cc: Miao Yan <yanmiaobest@gmail.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2018-01-30 14:29:07 +08:00
Andy Shevchenko
3ffb33d636 x86: tangier: Make _CRS for BTH0 Serialized to avoid warning
ASL compiler warns:

  ASL     board/intel/edison/dsdt.asl
  board/intel/edison/dsdt.asl.tmp    238:             Method (_CRS, 0, NotSerialized)
  Remark   2120 -      Control Method should be made Serialized ^  (due to creation of named objects within)

Do as suggested by ASL compiler.

Fixes: 5d8c4ebd95 ("x86: tangier: Add Bluetooth to ACPI table")
Reported-by: Ferry Toth <fntoth@gmail.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2018-01-30 14:29:07 +08:00
Heinrich Schuchardt
368e86d983 configs: x86: allow to override CONFIG_BOOTCOMMAND
Allow to override CONFIG_BOOTCOMMAND in .config.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2018-01-30 14:29:07 +08:00
Tom Rini
eef11aceba Prepare v2018.03-rc1
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-01-29 20:12:33 -05:00
Klaus Goger
0b674a3120 spl: include timezone in banner
Include the timezone in the SPL banner so the timestamp matches with
that from u-boot proper.

Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-01-29 12:50:13 -05:00
Андрей Мозжухин
af09eba64f aes: Allow non-zero initialization vector
AES encryption in CBC mode, in most cases, must be used with random
initialization vector. Using the same key and initialization vector several
times is weak and must be avoided.

Added iv parameter to the aes_cbc_encrypt_blocks and aes_cbc_decrypt_blocks
functions for passing initialization vector.

Command 'aes' now also require the initialization vector parameter.

Signed-off-by: Andrey Mozzhuhin <amozzhuhin@yandex.ru>
2018-01-29 12:50:13 -05:00
Masahiro Yamada
1414e09b4f kconfig: revert change that was not needed for -Wformat-security
Recent GCC versions warn if the format string is not a literal
because the compiler cannot check the argument validity at compile
time.

Commit 192bc6948b ("Fix GCC format-security errors and convert
sprintfs.") blindly replaced sprintf() with strcpy(), including
many cases where the format parameter is a string literal.

For the kconfig change:

    sprintf(header, "   ");

..., here the format parameter is a string literal "   ", so it is
definitely equivalent to:

    strcpy(header, "   ");

Of course, if the 'header' did not have enough length for containing
"   ", it would be a security problem, but another problem.  (in this
case, the 'header' is 4 byte length buffer, so it is not a problem at
all.)

The kconfig code is kept as synced with Linux as possible, but this
change made the code out-of-sync for nothing.  Just reverting.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-01-29 12:50:13 -05:00
Tom Rini
f39bfec230 fs: btrfs: Fix printf format character warning
When printing a size_t value we need to use %zu for portability between
32bit and 64bit targets.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Marek Behun <marek.behun@nic.cz>
2018-01-29 12:50:08 -05:00
Tom Rini
c5e6e9b3d6 mvpp2: Fix warning over 32bit vs 64bit targets
When we have a driver that is used on both 32bit and 64bit targets and
we are talking about address space we cannot use u64 nor u32 and instead
need to use phys_addr_t.

Fixes: 377883f16d ("net: mvpp2x: fix phy connected to wrong mdio issue")
Cc: Stefan Chulski <stefanc@marvell.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
2018-01-29 12:48:34 -05:00
Patrice Chotard
05e23dd489 clk: clk_stm32: Add .set_rate callback
Since 'commit f4fcba5c5b ("clk: implement clk_set_defaults()")'
STM32F4 family board can't boot.

Above patch calls clk_set_rate() for all nodes with assigned-clock-rates
property. Clock driver for STM32F family doesn't implement .set_rate
callback which make clk_set_defaults() exit on error and prevent board
to boot.

Fixes: f4fcba5c5b ("clk: implement clk_set_defaults()")
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-01-29 12:48:33 -05:00
Patrice Chotard
a70c05f10a board: stm32: Fix stm32f746-disco boot
Since 'commit af2f44267 ("fdc spl: use different BOARD_INIT MACRO for spl and tpl")'
board stm32f746-disco can't boot.

The macro CONFIG_IS_ENABLED() can't evaluate the value of
CONFIG_SPL_BOARD_INIT as it was defined in include/configs/stm32f746-disco.h
without attributed value.

Moving CONFIG_SPL_BOARD_INIT from stm32f746-disco.h to mach-stm32/Kconfig
fixes this issue.

Fixes: af2f44267 ("fdc spl: use different BOARD_INIT MACRO for spl and tpl")
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-01-29 12:48:30 -05:00
Alexander Graf
ae5326a6b3 serial: Make full device search optional
Commit 608b0c4ad4 ("serial: Use next serial device if probing fails")
added code to search for more serial devices if the default one was not
probed correctly.

Unfortunately, that breaks omap3_evm. So while investigating why that is
the case, let's disable the full search for everyone but bcm283x where it
is needed.

Fixes: 608b0c4ad4 ("serial: Use next serial device if probing fails")
Reported-by: Derald D. Woods <woods.technical@gmail.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-29 08:18:02 -05:00
Tom Rini
06bfb9f37c Merge git://git.denx.de/u-boot-marvell 2018-01-29 08:17:28 -05:00
Tom Rini
3703526f1e Merge git://git.denx.de/u-boot-cfi-flash 2018-01-29 08:17:13 -05:00
Andreas Färber
ceb3281803 tools/mrvl_uart.sh: Tidy script output
Fix a typo in help output (awailable -> available).
Tidy the grammar - not the board connects to a port, we do.

While at it, be consistent in upper-casing the comments.

Fixes: eee4835d22 ("tools: Add Marvell recovery image download script")
Cc: Konstantin Porotchkin <kostap@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Igal Liberman <igall@marvell.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Konstantin Porotchkin <kostap@marvell.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-01-29 13:36:32 +01:00
Andreas Färber
3e00c48ef0 tools/mrvl_uart.sh: Fix minicom baudrate
minicom doesn't inherit the baudrate from stty but uses its own
defaults, such as for example 57600, whereas we expect 115200 here.
Explicitly tell minicom which baudrate to use.

Fixes: eee4835d22 ("tools: Add Marvell recovery image download script")
Cc: Konstantin Porotchkin <kostap@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Igal Liberman <igall@marvell.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Konstantin Porotchkin <kostap@marvell.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-01-29 13:36:32 +01:00
Mario Six
d9a356972b cfi_flash: Always define cfi_flash_num_flash_banks
The variable cfi_flash_num_flash_banks is defined iff
CONFIG_SYS_MAX_FLASH_BANKS_DETECT is defined, but it is used
unconditionally in the function cfi_flash_init_dm. This leads to a
undefined variable compile error when CONFIG_SYS_MAX_FLASH_BANKS_DETECT
is not defined, but DM is enabled.

Fix this by always defining the cfi_flash_num_flash_banks variable.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-01-29 07:48:59 +01:00
Mario Six
c0350fbf4c cfi_flash: Fix indention
When long expressions surrounded by parentheses are split into multiple
lines, each consecutive line should be aligned with the corresponding
parenthesis. Fix all instances where this occurs.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-01-29 07:48:59 +01:00
Mario Six
ddcf05403d cfi_flash: Fix long lines
Long lines (>80 characters) should be avoided where possible. Break up
some long lines where it's not detrimental to readability.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-01-29 07:48:59 +01:00
Mario Six
5701ba8289 cfi_flash: Bound-check index before array access
In a while loop in cfi_flash.c the array "start" is accessed at the index
"sector" before the index variable "sector" is bounds-checked, which
might lead to accesses beyond the bounds of the array.

Swap the order of the checks in the "&&" expression, so that the
short-circuit evaluation prevents out-of-bounds array accesses.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-01-29 07:48:59 +01:00
Mario Six
9dbaebcf9f flash: Fix spelling of "ERR_TIMOUT"
checkpatch.pl complains about the spelling of ERR_TIMOUT. Since the
error is only used in a handful of files, we rename the error to
ERR_TIMEOUT.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-01-29 07:48:59 +01:00
Mario Six
c8a9a82c10 cfi_flash: Rename camel-case variables
Camel-case naming should be avoided. Rename two camel-case variables,
and fix their usage accordingly.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-01-29 07:48:58 +01:00
Mario Six
876c52f3c3 cfi_flash: Fix strings split across lines
Strings should not be split accross multiple lines. Where possible and
not detrimental to readability, fix the instances where this occurs.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-01-29 07:48:58 +01:00
Mario Six
5312838dd5 cfi_flash: Use u8 pointers instead of void pointers
According to the C standard, pointer arithmetic for pointers of type
void is undefined behavior (the assumption that they're 8-bit wide is a
GCC-specific assumption). In the interest of keeping the code
standards-compliant, and also better communicate intent, switch all
void* variables where pointer arithmetic is used to u8* variables.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-01-29 07:48:58 +01:00
Mario Six
d3525b6bb0 cfi_flash: Remove assignments from if conditions
The condition in if statements should not be used for variable
assignment. Instead, the assignment should be done in a separate step
beforehand. Fix all instances where this occurs.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-01-29 07:48:58 +01:00
Mario Six
ab61cfb857 cfi_flash: Remove return from void function
void functions don't need an explicit return at the end.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-01-29 07:48:58 +01:00
Mario Six
0cec0a12f9 cfi_flash: Fix placement of brace
The opening brace of block statements should be attached to the
statement itself, and not be on a separate line.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-01-29 07:48:58 +01:00
Mario Six
9860137fbc cfi_flash: Fix else after break
If in a loop, the if block in a if/else statement ends in a break, the
statements in the else blockcan be extracted, since the break stops the
execution.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-01-29 07:48:58 +01:00
Mario Six
9f720216b7 cfi_flash: Fix spelling of "Unknown"
"Unkown" should be spelled "Unknown".

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-01-29 07:48:58 +01:00
Mario Six
12d7fed9b9 cfi_flash: Add missing braces in blocks
In if/else statements, either both blocks (if and else) should have
braces or both blocks should not have braces, but mixed configurations
are discouraged. Fix all instances where this occurs.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-01-29 07:48:58 +01:00
Mario Six
4f89da49e7 cfi_flash: Remove unnecessary braces
"==" and "!=" bind tighter than the boolean operators, so parentheses
around them in compound logical statements are unnecessary. Fix all
instances where this occurs.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-01-29 07:48:58 +01:00
Mario Six
a6d18f27c3 cfi_flash: Fix comment style
Comment blocks should end with a "*/" on a separate line, not with the
"*/" attached to the end of the last line of text. Fix all instances
where this occurs.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-01-29 07:48:58 +01:00
Mario Six
38d2831d3b cfi_flash: Use __func__ macro instead of function name
printf/debug statements should not include the file name as a hardcoded
string, but instead use the __func__ macro. Fix all instances where this
occurs.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-01-29 07:48:58 +01:00
Mario Six
88ecd8bf7c cfi_flash: Fix logical continuations
When splitting long logical statements across multiple lines, the
logical operators should be at the end of the lines. Fix all instances
where this occurs.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-01-29 07:48:58 +01:00
Mario Six
0412e903e4 cfi_flash: Remove braces for single-statement blocks
Blocks with a single statement should not be enclosed in braces. Fix all
instances where this occurs.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-01-29 07:48:58 +01:00
Mario Six
7223a8cb27 cfi_flash: Fix missing/superfluous lines
There should be no consecutive blank lines, and no blank lines at the
end of blocks. But there should be blank lines between variable
declarations and code. Fix all instances where either occurs.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-01-29 07:48:58 +01:00
Mario Six
640f4e35de cfi_flash: Fix spacing around casts/operators
There should be spaces around operators, and no spaces between a cast
and the variable its being applied to. Fix all instances where this
occurs.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-01-29 07:48:58 +01:00
Mario Six
dde0913b85 cfi_flash: Fix indent of case statements
case statements should be at the same level of indent as the switch
keyword. Fix all instances where this occurs.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-01-29 07:48:58 +01:00
Mario Six
db91bb242f cfi_flash: Fix whitespace with casting
When casting to a pointer type, the asterisk should be attached to the
type name, not separated by a space. Fix all instances where this
occurs.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-01-29 07:48:58 +01:00
Mario Six
b168386ba9 cfi_flash: Fix Parenthesis spacing
There should not be additional spaces when nesting parentheses
("( (...) )"). Fix all instances where this occurs.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-01-29 07:48:58 +01:00
Mario Six
ca2b07a8d4 cfi_flash: Fix style of pointer declarations
In a pointer declaration there should not be a space between the
asterisk and the pointer name. Fix all instances where this occurs.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-01-29 07:48:58 +01:00
Mario Six
188a55651f cfi_flash: Fix space between function name and parenthesis
There should not be a space between a function name and a parenthesis
("func (...)"). Fix all instances where this occurs.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-01-29 07:48:58 +01:00
Tom Rini
bd39d86420 Merge tag 'signed-efi-next' of git://github.com/agraf/u-boot
Patch queue for efi - 2018-01-28

This is the second part of patches for 2018.03-rc1, fixing
a few minor issues and adding a readme file for iSCSI booting.
2018-01-28 18:26:00 -05:00
Heinrich Schuchardt
29a8a2828e efi_loader: add a README.iscsi describing booting via iSCSI
The appended README explains how U-Boot and iPXE can be used
to boot a diskless system from an iSCSI SAN.

The maintainer for README.efi and README.iscsi is set.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
[agraf: s/Adress/Address/]
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-28 21:37:13 +01:00
Heinrich Schuchardt
4a8b5e7900 efi_loader: consistently use %pD to print device paths
Now that we have %pD support in vsprintf we should avoid separate
logic for printing device paths in other places.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-28 21:37:13 +01:00
Heinrich Schuchardt
7df5af6f3a efi_loader: do not install NULL as device path
In an image is loaded from memory we do not have a device path.
Do not install NULL as device path in this case.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-28 21:37:13 +01:00
Heinrich Schuchardt
5f1ce1d4ca vsprintf.c: correct printing of a NULL device path
When printing '%pD' with a value of NULL we want to output
'<NULL>'. But this requires copying to buf. Leave this
to string16.

A unit test is supplied which relies on EFI support in the sandbox.

The development for EFI support in the sandbox is currently in branch
u-boot-dm/efi-working. The branch lacks commit 6ea8b580f0 ("efi_loader:
correct DeviceNodeToText for media types"). Ater rebasing the aforementioned
branch on U-Boot v2018.01 and adding 256060e425 and this patch the test
is executed successfully.

Fixes: 256060e425 (vsprintf.c: add EFI device path printing)
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-28 21:37:13 +01:00
Alexander Graf
56672bf52e efi_loader: Call Exit() on return from payload in StartImage()
When a UEFI payload just returns instead of calling the Exit() callback,
we handle that in efi_do_enter() and call Exit on its behalf, so that
the loaded_image->exit_status value is correct.

We were missing that logic in StartImage(). Call it there too.

Reported-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-28 21:37:13 +01:00
Heinrich Schuchardt
c8df80c514 efi_loader: fix comments in indent_string()
Provide a better description for indent_string.
Fix a typo.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-28 21:37:13 +01:00
Heinrich Schuchardt
49db1cb8c3 efi_loader: catch misspelled bootefi subcommand
If 'bootefi hello' or 'bootefi selftest' can be executed depends on the
configuration.

If an invalid non-numeric 1st argument is passed to bootefi, e.g.
'bootefi hola', this string is converted to 0 and U-Boot jumps to
this typically invalid address.

With the patch the online help is shown instead.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-28 21:37:13 +01:00
Alexander Graf
c6fa5df6aa efi_loader: Always use EFIAPI instead of asmlinkage
EFI calls are usually defined as asmlinkage. That means we pass all parameters
to functions via the stack x86_32.

On x86_64 however, we need to also stick to the MS ABI calling conventions,
which the EFIAPI define conveniently handles for us. Most EFI functions were
also marked with EFIAPI, except for the entry call.

So this patch adjusts all entry calls to use EFIAPI instead of the manual
asmlinkage attribute.

While at it, we also change the prototype of the entry point to return
efi_status_t instead of ulong, as this is the correct prototype definition.

Signed-off-by: Alexander Graf <agraf@suse.de>

---

v1 -> v2:

  - Use efi_status_t in all occurences
2018-01-28 21:37:13 +01:00
Alexander Graf
6698bb343f efi: Conflict efi_loader with different stub bitness
We have 2 users of the EFI headers: efi_loader and the EFI stub. Efi_loader
always expects that the bitness of the definitions it uses is identical to
the execution.

The EFI stub however allows to run x86_64 U-Boot on 32bit EFI and the other
way around, so it allows for different bitness of EFI definitions and U-Boot
environment.

This patch explicitly requests via Kconfig that efi_loader can only be enabled
if the bitness is identical. Because we can run efi_loader on x86_64 without
EFI stub enabled, it also ensures that this case propagates the correct ABI
constraints.

Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-28 21:37:13 +01:00
Tom Rini
f2ee915018 Merge git://git.denx.de/u-boot-rockchip 2018-01-28 13:56:19 -05:00
Adam Ford
4f6c7b12ed omap3_logic: Clean up I2C pin muxing.
The SOM has external pull-up resistors, so let's turn these off.
It was helping reduce some errors when running I2C1 @ 2.6MHz.

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-01-28 12:27:37 -05:00
Anatolij Gustschin
0292bc0d13 spl: add option to disable SPL banner output
Selecting this option will reduce SPL boot time by approx. 6 ms
(e. g. with 70 bytes long banner string at 115200 baud).

Signed-off-by: Anatolij Gustschin <agust@denx.de>
Tested-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-01-28 12:27:36 -05:00
Alexander Graf
9821636b64 bcm2835_pinctrl: Probe pre-reloc
The serial drivers now depend on the pinctrl driver to determine whether
they are enabled. That means if a serial device wants to be used pre-reloc,
we also need the pinctrl device pre-reloc.

Adapt the pinctrl driver as well as dts overlay accordingly.

Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-28 12:27:36 -05:00
Alexander Graf
6001985f92 bcm2835_pl011_serial: Add BCM2835 specific serial driver
On bcm2835 we need to ensure we only access serial devices that are
muxed to the serial output pins of the pin header. To achieve this
for the pl011 device, add a bcm2835 specific pl011 wrapper device
that does this check but otherwise behaves like a pl011 device.

Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-28 12:27:36 -05:00
Alexander Graf
958d55f26c MAINTAINERS: Take over BCM2835 maintainership
It seems as if I have more interest in BCM2835 support than most others,
so I'll bite the bullet and declare myself maintainer. It'd be a shame
to leave that platform orphaned.

Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-28 12:27:36 -05:00
Alexander Graf
fa4875942a bcm2835_mu_serial: Convert to Kconfig
Setting config options using headers is deprecated. This patch converts
the BCM2835 Mini-UART to Kconfig.

Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-28 12:27:36 -05:00
Alexander Graf
cf2c7784bd pl01x: Convert CONFIG_PL01X_SERIAL to Kconfig
We want to use Kconfig logic to depend on whether pl01x devices
are built in, so let's convert their inclusion selection to Kconfig.

This round goes to pl01x.

Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-28 12:27:35 -05:00
Alexander Graf
d10fc50f78 pl011: Convert CONFIG_PL011_SERIAL to Kconfig
We want to use Kconfig logic to depend on whether pl01x devices
are built in, so let's convert their inclusion selection to Kconfig.

This round goes to pl011.

Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-28 12:27:35 -05:00
Alexander Graf
884f901368 pl010: Convert CONFIG_PL010_SERIAL to Kconfig
We want to use Kconfig logic to depend on whether pl01x devices
are built in, so let's convert their inclusion selection to Kconfig.

This round goes to pl010.

Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-28 12:27:35 -05:00
Alexander Graf
b31116308c pl01x: Convert to dev_read
The fdtdec API is deprecated, convert the pl010 and pl011 devices to
use the dev_read API instead.

Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-28 12:27:34 -05:00
Alexander Graf
9dfeffe2f9 serial_bcm283x_mu: Fail loading if not muxed
The bcm283x mini-uart is only really usable as U-Boot serial output
when it is muxed to the UART pins of the RPi pin header.

So fail probing in case it is not muxed correctly, as in that case
firmware did not initialize it properly either.

Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-28 12:27:34 -05:00
Alexander Graf
bceab8d569 serial_bcm283x_mu: Always skip init
The serial initialization doesn't always quite work for me, so let's
always skip it for now. We know that firmware on the RPi initializes
us properly already.

Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-28 12:27:34 -05:00
Alexander Graf
80d5001c30 serial_bcm283x_mu: Convert to dev_read
The fdtdec API got deprecated in favor of dev_read calls.
Use those instead.

Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-28 12:27:34 -05:00
Alexander Graf
71fc2e1459 rpi: Determine PL011/Mini-UART availability at runtime
Firmware on the Raspberry Pi family of devices can dynamically configure either
the PL011, Mini-UART or no device at all to be routed to the user accessible
UART pins.

That means we need to always include both drivers, because we can never be sure
which of the two serial devices firmware actually chooses to use.

Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-28 12:27:33 -05:00
Alexander Graf
fc8523a147 serial: bcm283x_mu: Remove support for post-init disabling
We are switching to a model where a serial device doesn't even get probed when
it's not muxed properly, so we don't need device specific disabling
functionality anymore.

Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-28 12:27:33 -05:00
Alexander Graf
55b8a2ddaa rpi: Remove runtime disabling support for serial
We are switching to a model where our board file can directly fail probing
of serial devices when they're not usable, so remove the current runtime
hack we have.

Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-28 12:27:33 -05:00
Alexander Graf
608b0c4ad4 serial: Use next serial device if probing fails
Currently our serial device search chokes on the fact that the serial
probe function could fail. If it does, instead of searching for the next
usable serial device, it just quits.

This patch changes the fallback logic so that even when a serial device
was not probed correctly, we just try the next ones until we find one that
works.

Signed-off-by: Alexander Graf <agraf@suse.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-28 12:27:33 -05:00
Faiz Abbas
b442e16b87 am33xx: board: Call spl_early_init() to support sdram_init()
With driver model enabled in SPL, sdram_init() requires device tree
and malloc to be initialized.
Therefore call spl_early_init() in early_system_init().

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-01-28 12:27:33 -05:00
Felix Brack
85ab0452fe arm: add support for PDU001
This patch adds support for the PDU001 board.

Signed-off-by: Felix Brack <fb@ltec.ch>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-01-28 12:27:32 -05:00
Alexander Graf
c8a73a26d6 mmc: Add bcm2835 sdhost controller
The BCM2835 family of SoCs has 2 different SD controllers: One based on
the SDHCI spec and a custom, home-grown one.

This patch implements a driver for the latter based on the Linux driver.
This is needed so that we can make use of device trees that assume driver
presence of both SD controllers.

Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-28 12:27:32 -05:00
Alexander Graf
caf2233b28 bcm283x: Add pinctrl driver
The bcm283x family of SoCs have a GPIO controller that also acts as
pinctrl controller.

This patch introduces a new pinctrl driver that can actually properly mux
devices into their device tree defined pin states and is now the primary
owner of the gpio device. The previous GPIO driver gets moved into a
subdevice of the pinctrl driver, bound to the same OF node.

That way whenever a device asks for pinctrl support, it gets it
automatically from the pinctrl driver and GPIO support is still available
in the normal command line phase.

Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-28 12:27:32 -05:00
Tuomas Tynkkynen
8996975ff8 powerpc: Drop CONFIG_WALNUT and other related dead code
CONFIG_WALNUT was dropped in June 2017 in:
commit 98f705c9ce ("powerpc: remove 4xx support")

While at it, the related CONFIG_MACH_SPECIFIC and the have_of
and _machine variables are unused as well, so drop them too.

Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
2018-01-28 12:27:32 -05:00
Masahiro Yamada
662282203a libfdt: migrate include/libfdt_env.h to a wrapper
libfdt_env.h is supposed to provide system-dependent defines.

scripts/dtc/libfdt/libfdt_env.h from upstream DTC is suitable
for user-space, so we should use this for USE_HOSTCC case.

For compiling U-Boot, we need to override such system-dependent
defines, so use <linux/libfdt_env.h> imported from Linux.

<libfdt.h> selects a proper one.  Maybe, we should split header
inclusion completely, but I do not want too many patches at one.

I can rip off the include/libfdt_env.h from HOST_EXTRACFLAGS.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-28 12:27:31 -05:00
Masahiro Yamada
144fbea969 libfdt: migrate libfdt.h to a wrapper + U-Boot own code
There is tons of code duplication between lib/libfdt/libfdt.h and
scripts/dtc/libfdt/libfdt.h.  Evacuate the U-Boot own code to
include/libfdt.h and remove lib/libfdt/libfdt.h.

For host tools, <libfdt.h> should include scripts/dtc/libfdt/libfdt.h,
which is already suitable for user-space.

For compiling U-Boot, <linux/libfdt.h> should be included because we
need a different libfdt_env.h .

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-01-28 12:27:31 -05:00
Masahiro Yamada
25ad202dd3 libfdt: move working_fdt and FDT_RAMDISK_OVERHEAD to include/libfdt.h
libfdt_env.h exists to contain system-dependent defines:

  - typedef of fdt*_t
  - fdt*_to_cpu(), cpu_to_fdt*

working_fdt and FDT_RAMDISK_OVERHEAD are unrelated to the environment,
so they must get out of this header.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-28 12:27:31 -05:00
Masahiro Yamada
d2bf1152c0 tools: include necessary headers explicitly
Several host-tools use "bool" type without including <stdbool.h>.
This relies on the crappy header inclusion chain.

tools/Makefile has the following line:

  HOST_EXTRACFLAGS += -include $(srctree)/include/libfdt_env.h \

All host-tools are forced to include libfdt_env.h even if they are
totally unrelated to FDT.  Then, <stdbool.h> is indirectly included
as follows:

     include/libfdt_env.h
  -> include/linux/types.h
  -> <stdbool.h>

I am fixing this horrible crap.  In advance, I need to add necessary
include directives explicitly.  tools/fdtgrep.c needs more; <fctl.h>
for open() and <errno.h> for errno.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-28 12:27:31 -05:00
Masahiro Yamada
b0bd96c858 libfdt: fix <linux/libfdt.h>
I do not remember why, but this is apparently a file-copy mistake.
The file name is libfdt.h, but its content is that of libfdt_env.h

Re-import it from upstream Linux.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-28 12:27:30 -05:00
Masahiro Yamada
ae9ace7089 libfdt: migrate fdt_rw.c to a wrapper of scripts/dtc/libfdt/fdt_rw.c
The only difference between scripts/dtc/libfdt/fdt_rw.c and
lib/libfdt/fdt_rw.c is fdt_remove_unused_strings().

It is only used by fdtgrep, so we do not need to compile it for U-Boot
image.  Move it to tools/libfdt/fdw_rw.c so that lib/libfdt/fdt_rw.c
can be a wrapper of scripts/dtc/libfdt/fdt_rw.c.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-28 12:27:30 -05:00
Masahiro Yamada
94b13bbae9 host-tools: use python2 explicitly for shebang
All of these host tools are apparently written for Python2,
not Python3.

Use 'python2' in the shebang line according to PEP 394
(https://www.python.org/dev/peps/pep-0394/).

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-28 12:27:30 -05:00
Derald D. Woods
56d1dded62 ARM: omap3: evm: Fix distro bootcmd UBIFS and MMC support
The omap3_evm board does not boot when commit:
    a47ca2cf67 ("ARM: omap3: evm: Add kernel image loading from UBIFS and EXT4")
is applied after commit:
    3dde8f2037 ("Merge git://git.denx.de/u-boot-mmc")

This commit reduces the CONFIG_EXTRA_ENV_SETTINGS size and better
leverages the existing distro bootcmd infrastructure.

- Use updated UBIFS support from config_distro_bootcmd.h
- Use LEGACY_MMC naming found in am335x_evm.h and ti_omap4_common.h
- Remove extra environment content that is no longer needed

[MMC(0:1)/extlinux/extlinux.conf]
---8<-------------------------------------------------------------------
default omap3-evm-mmc-fat
label omap3-evm-mmc-fat
	kernel /zImage
	fdt /omap3-evm.dtb
	append console=ttyO0,115200n8 root=/dev/mmcblk0p2 rw rootfstype=ext4 rootwait
---8<-------------------------------------------------------------------

[MMC(0:2)/boot/extlinux/extlinux.conf]
---8<-------------------------------------------------------------------
default omap3-evm-mmc-ext4
label omap3-evm-mmc-ext4
	kernel /boot/zImage
	fdt /boot/omap3-evm.dtb
	append console=ttyO0,115200n8 root=/dev/mmcblk0p2 rw rootfstype=ext4 rootwait
---8<-------------------------------------------------------------------

[NAND(ubi0:rootfs)/boot/extlinux/extlinux.conf]
---8<-------------------------------------------------------------------
default omap3-evm-nand-ubifs
label omap3-evm-nand-ubifs
	kernel /boot/zImage
	fdt /boot/omap3-evm.dtb
	append console=ttyO0,115200n8 root=ubi0:rootfs rw ubi.mtd=rootfs noinitrd rootfstype=ubifs rootwait
---8<-------------------------------------------------------------------

Fixes: a47ca2cf67 ("ARM: omap3: evm: Add kernel image loading from UBIFS and EXT4")
Signed-off-by: Derald D. Woods <woods.technical@gmail.com>
2018-01-28 12:27:30 -05:00
Derald D. Woods
6e1364fe45 distro bootcmd: Allow board defined UBI partition and volume names
This commit allows overriding the default assumption that the boot UBI
MTD partition is named 'UBI' and the UBI volume is 'boot'. A board
desiring to use a legacy or alternative NAND layout can now define the
following two extra environment variables:

	bootubipart=<some_ubi_partition_name>
	bootubivol=<some_ubi_volume_name>

EXAMPLE:

[include/configs/some_board.h]
---8<-------------------------------------------------------------------
[...]
	#include <config_distro_defaults.h>

	#define MEM_LAYOUT_ENV_SETTINGS \
		DEFAULT_LINUX_BOOT_ENV

	#define BOOT_TARGET_DEVICES(func) \
		func(UBIFS, ubifs, 0)

	#include <config_distro_bootcmd.h>
[...]
	#define CONFIG_EXTRA_ENV_SETTINGS \
		MEM_LAYOUT_ENV_SETTINGS \
		"bootubivol=rootfs\0" \
		"bootubipart=rootfs\0" \
		BOOTENV
[...]
---8<-------------------------------------------------------------------

Signed-off-by: Derald D. Woods <woods.technical@gmail.com>
2018-01-28 12:27:29 -05:00
Kever Yang
af2f44267f spl: use different BOARD_INIT MACRO for spl and tpl
SPL and TPL may not always need spl_board_init() at the same time.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-01-28 12:27:29 -05:00
Alberto Sánchez Molero
2021f083ed fs: btrfs: Fix unaligned memory accesses
Loading files stored with lzo compression from a btrfs filesystem was
producing unaligned memory accesses, which were causing a data abort
and a reset on an Orange Pi Zero.

The change in hash.c is not triggered by any error but follows the
same pattern. Please confirm.

Fixed according to doc/README.unaligned-memory-access.txt

Signed-off-by: Alberto Sánchez Molero <alsamolero@gmail.com>
Tested-by: Robert Nelson <robertcnelson@gmail.com>
2018-01-28 12:27:12 -05:00
Kever Yang
0289e291a5 spl: atf: pass NULL for bl32_ep pc
ATF use bl32_ep_info->pc to decide if thre is an available bl32,
let's mark it as NULL first.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-01-28 17:12:39 +01:00
Eddie Cai
451dcf5cd0 rockchip: rk3036: enable rockusb support on rk3036 based device
Rockchip Rockusb driver already merged. So we enable rockusb
support on rk3036 based device.

Signed-off-by: Eddie Cai <eddie.cai.linux@gmail.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-01-28 17:12:39 +01:00
Kever Yang
2147c0d253 rockchip: dts: rk3128: update pwm-cell for pwm0
The backlight pwm-cell is 3.

This remove the warning in buildman:
arch/arm/dts/rk3126-evb.dtb: Warning (pwms_property): Property 'pwms', cell 3 is not a phandle reference in /backlight
arch/arm/dts/rk3126-evb.dtb: Warning (pwms_property): Missing property '#pwm-cells' in node /sram@10080400 or bad phandle (referred from /backlight:pwms[3])

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-01-28 17:12:39 +01:00
Philipp Tomsich
75b381aae8 rockchip: clk: guard set_parent implementations against OF_PLATDATA
The set_parent implementations do not make sense when OF_PLATDATA is
enabled.  We guard these against OF_PLATDATA and don't populate the
set_parent-op when this is the case.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-01-28 17:12:39 +01:00
David Wu
64a12202ed clk: rockchip: clk_rk3368: Implement "assign-clock-parent"
Implement the setting parent for gmac clock, and add internal
pll div set for mac clk.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-01-28 17:12:39 +01:00
David Wu
01c60eafbb clk: rockchip: clk_rk3288: Implement "assign-clock-parent" and "assign-clock-rate"
The RK3288 CRU-node assigns rates to a number of clocks that are not
implemented in the RK3288 clock-driver (but which have been
sufficiently initialised from rkclk_init()): for these clocks, we
implement the gmac clock set parent, but simply ignore the
others' set_rate() operation and return 0 to signal success.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-01-28 17:12:39 +01:00
David Wu
c513e9e1e6 ARM: dts: rk3288: Remove unused LCDC clock assigned
The LCDC assigned rate is 0, it will make boot error,
error log:"pll_para_config: the frequency can not be
 0 Hz". Remove them, and the lcdc driver will do the
correct clock rate setting.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-01-28 17:12:38 +01:00
David Wu
a50e5c9e33 config: evb-rk3229: Enable rk gmac configs
Add gmac config support for rk3229 evb.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-01-28 17:12:38 +01:00
David Wu
d12d7c09eb net: gmac_rockchip: Add support for the RK3228 GMAC
The GMAC in the RK3228 once again is identical to the incarnation in
the RK3288 and the RK3399, except for where some of the configuration
and control registers are located in the GRF.

This adds the RK3368-specific logic necessary to reuse this driver.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-01-28 17:12:38 +01:00
David Wu
5bb616c6e2 clk: rockchip: Add rk322x gamc clock support
Assuming mac_clk is fed by an external clock, set clk_rmii_src
clock select control register from IO for rgmii interface.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-01-28 17:12:38 +01:00
David Wu
20ee0fd825 rockchip: pinctrl: Add rk322x gmac pinctrl support
Set gmac pins iomux and rgmii tx pins to 12ma drive-strength,
clean others to 2ma.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-01-28 17:12:38 +01:00
David Wu
424324d3ca rockchip: pinctrl: rk322x: Move the iomux definitions into pinctrl-driver
Clean the iomux definitions at grf_rk322x.h, and move them into
pinctrl-driver for resolving the compiling error of redefinition.
After that, define the uart2 iomux at rk322x-board file.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-01-28 17:12:38 +01:00
David Wu
c132f38d24 rockchip: dts: rk3328-evb: Enable gmac2io for rk3328-evb
Add rk3328-evb gmac support.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-01-28 17:12:38 +01:00
David Wu
832762c145 rockchip: dts: rk3328: Add gmac2io support
Add basic dts configuration for rk3328 gmac2io.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-01-28 17:12:37 +01:00
David Wu
37cf651f6e rockchip: configs: Enable GMAC configs for evb-rk3328
Enable GMAC configs for evb-rk3328

Signed-off-by: David Wu <david.wu@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-01-28 17:12:37 +01:00
David Wu
b3d2a6df30 net: gmac_rockchip: Add rk3328 gmac support
The GMAC2IO in the RK3328 once again is identical to the incarnation in
the RK3288 and the RK3399, except for where some of the configuration
and control registers are located in the GRF.

This adds the RK3328-specific logic necessary to reuse this driver.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-01-28 17:12:37 +01:00
David Wu
7cd4ebab2b clk: rockchip: Add rk3328 gamc clock support
The rk3328 soc has two gmac controllers, one is gmac2io,
the other is gmac2phy. We use the gmac2io rgmii interface
for 1000M phy here.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-01-28 17:12:37 +01:00
David Wu
dfb886d4f2 rockchip: pinctrl: Add rk3328 gmac pinctrl support
Need to set gmac m1 pins iomux, gmac m0 tx pins, select bit2
and bit10 at com iomux register. After that, set rgmii m1 tx
pins to 12ma drive-strength, and clean others to 2ma.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-01-28 17:12:37 +01:00
David Wu
301fff4e57 rockchip: pinctrl: rk3328: Move the iomux definitions into pinctrl-driver
Clean the iomux definitions at grf_rk3328.h, and move them into
pinctrl-driver for resolving the compiling error of redefinition.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-01-28 17:12:37 +01:00
David Wu
caf746172b net: gmac_rockchip: Add support for the RV1108 GMAC
The rv1108 GMAC only support rmii interface, so need to add the
set_rmii() ops. Use the phy current interface to set rmii or
rgmii ops. At the same time, need to set the mac clock rate of
rmii with 50M, the clock rate of rgmii with 125M.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-01-28 17:12:37 +01:00
David Wu
77c4261130 rockchip: pinctrl: rv1108: Move the iomux definitions into pinctrl-driver
If we include both the rk3288_grf.h and rv1108_grf.h, it will cause the
conflicts of redefinition. Clean the iomux definitions at grf_rv1108.h,
and move them into pinctrl-driver.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-01-28 17:12:36 +01:00
David Wu
0788a31e03 rockchip: grf_rv1108.h: Fix the grf offsets
The last 4 grf registers offset of rv1108 are wrong, fix them
for correct usage.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-01-28 17:12:36 +01:00
David Wu
c422c4fa31 rockchip: configs: Enable CONFIG_NET_RANDOM_ETHADDR for rk3288-evb
If the Ethernet address is not set, the network can't work,
enable the random address config for default use.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-01-28 17:12:36 +01:00
David Wu
dc5b201384 rockchip: dts: rk3399-evb: Change the tx/rx delay value for transmission quality
Give the mac controller the correct tx-delay and rx-delay value
for the rgmii mode transmission. If they are not matched, there
would be Ethernet packets lost, the net feature may not work.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-01-28 17:12:36 +01:00
Philipp Tomsich
d2f1f1abaf rockchip: clk: rk3399: accept all assigned-clocks from the 'cru'-node
The RK3399 CRU-node assigns rates to a number of clocks that are not
implemented in the RK3399 clock-driver (but which have been
sufficiently initialised from rkclk_init()): for these clocks, we
simply ignore the set_rate() operation and return 0 to signal success.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: David Wu <david.wu@rock-chips.com>

Series-changes: 2
- Fixed David's email address.
2018-01-28 17:12:36 +01:00
Philipp Tomsich
f4fcba5c5b clk: implement clk_set_defaults()
Linux uses the properties 'assigned-clocks', 'assigned-clock-parents'
and 'assigned-clock-rates' to configure the clock subsystem for use
with various peripheral nodes.

This implements clk_set_defaults() and hooks it up with the general
device probibin in drivers/core/device.c: when a new device is probed,
clk_set_defaults() will be called for it and will process the
properties mentioned above.

Note that this functionality is designed to fail gracefully (i.e. if a
clock-driver does not implement set_parent(), we simply accept this
and ignore the error) as not to break existing board-support.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: David Wu <david.wu@rock-chips.com>

Series-changes: 2
- Fixed David's email address.

Series-version: 2

Cover-letter:
clk: support assigned-clock, assigned-clock-parents, assigned-clock-rates

For various peripherals on Rockchip SoCs (e.g. for the Ethernet GMAC),
the parent-clock needs to be set via the DTS.  This adds the required
plumbing and implements the GMAC case for the RK3399.
END
2018-01-28 17:12:36 +01:00
Philipp Tomsich
a45f17e8b9 rockchip: clk: rk3399: implement set_parent() operation
This implements the (newly added) set_parent() operation for the
RK3399 with a focus on allowing the RGMII clock parent to be
configured via the assigned-clock-parents property of the GMAC node.

This implementation supports only the GMAC (in fact only the RGMII
clock parent) and allows to set this clock's parent either to the
internal SCLK_GMAC or to an external clock input (identifiable by it
providing a 'clock-output-name' of "gmac_clkin").

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: David Wu <david.wu@rock-chips.com>

Series-changes: 2
- Fixed David's email address.
2018-01-28 17:12:36 +01:00
Philipp Tomsich
95f9a7e595 clk: refactor clk_get_by_index() into clk_get_by_indexed_prop()
The logic in clk_get_by_index() may be useful for other properties
than 'clocks': e.g. 'assigned-clocks' and 'assigned-clock-parents'
follows the same model.

This commit refactors clk_get_by_index() by introducing an internal
function clk_get_by_indexed_prop() that allows to specify the name
of the property to process.  The original clk_get_by_index() call
is simply directed through this helper function with the property
name fixed to "clocks".

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: David Wu <david.wu@rock-chips.com>

Series-changes: 2
- Fixed David's email address.
2018-01-28 17:12:35 +01:00
Philipp Tomsich
f7d1046da1 clk: add clk_set_parent()
Clocks may support multiple parents: this change introduces an
optional operation on the clk-uclass to set a clock's parent.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: David Wu <david.wu@rock-chips.com>

Series-changes: 2
- Fixed David's email address.
2018-01-28 17:12:35 +01:00
Patrice Chotard
990dba6498 clk: clk_stm32f: Fix PLLSAICFGR_PLLSAIP_4 divider value
PLLSAIP divider uses 2 bits (bits 16 and 17) into RCC_PLLSAICFGR
register, available combination are :
  00: PLLSAIP = 2
  01: PLLSAIP = 4
  10: PLLSAIP = 6
  11: PLLSAIP = 8

Previously, the divider value was incorrectly set to 6.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-01-28 09:39:15 -05:00
Faiz Abbas
a93feb2edc ARM: AM43XX: Call hw_data_init() again after relocation to update *ctrl
hw_data_init() is called before relocation to initialise hardware data.
Since ctrl is initialized to OMAP_SRAM_SCRATCH_SYS_CTRL in
arch/arm/mach-omap2/am33xx/hw_data.c, the pointer *ctrl will not be
updated during relocation and will hold a stale value.

Therefore call hw_data_init() again after relocation to
reinitialize *ctrl.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
2018-01-28 09:39:15 -05:00
Faiz Abbas
ded509b44c configs: Replace CONFIG_ISW_ENTRY_ADDR with CONFIG_SYS_TEXT_BASE
Since 7e0ed13 ("Convert ARCH_OMAP2PLUS boards' CONFIG_SYS_TEXT_BASE to
Kconfig"), a default SYS_TEXT_BASE was set for all ARCH_OMAP2PLUS devices.
CONFIG_ISW_ENTRY_ADDR is used to set SYS_TEXT_BASE in qspi boot.

Simplify this by directly assigning SYS_TEXT_BASE in the defconfig.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
2018-01-28 09:39:15 -05:00
Jelle van der Waa
9e82087cef tools: remove unused ret
Remove unused ret from fw_env_flush.

Signed-off-by: Jelle van der Waa <jelle@vdwaa.nl>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-28 09:39:15 -05:00
Patrice Chotard
20fe38e75a clk: clk_stm32f: Move SYSCFG clock setup into configure_clocks()
Move SYSCFG clock setup into configure_clocks() instead of calling
clock_setup() from board file.

As this clock is only needed in case of ethernet enabled and as
both stm32f4 and stm32f7 are using the Designware ethernet IP,
we use CONFIG_ETH_DESIGNWARE to only enable this clock if needed.

Move the RMII setup from board_early_init_f() to board_init()
to insure that RMII bit is set only when clock driver is initialized.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-01-28 09:39:15 -05:00
Patrice Chotard
68a69ed2a4 clk: clk_stm32f: Remove STMMAC clock setup
Thanks to 'commit ba1f966725 ("net: designware: add clock support")'
we don't need anymore to setup the STMMAC clock in board.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Vikas Manocha <vikas.manocha@st.com>
2018-01-28 09:39:15 -05:00
Patrice Chotard
1e130558ab ARM: dts: stm32: Add STMMAC clocks for stm32f746
Add ETHMAC, ETHMACRX and ETHMACTX clocks for STMMAC.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Vikas Manocha <vikas.manocha@st.com>
2018-01-28 09:39:15 -05:00
Bradley Bolen
9c3264ce40 atomic-long: Fix warnings on arm64
Several inline functions in this file reference undefined functions in
U-Boot.  For example:

atomic-long.h:73:9: warning: implicit declaration of function
'atomic64_sub_and_test'
atomic-long.h:80:9: warning: implicit declaration of function
'atomic64_dec_and_test'
atomic-long.h:87:9: warning: implicit declaration of function
'atomic64_inc_and_test'

Handle this the same as the 32 bit build by wrapping these functions in
a __UBOOT__ check.

Signed-off-by: Bradley Bolen <bradleybolen@gmail.com>
2018-01-28 09:39:05 -05:00
Patrice Chotard
2d58dddf7a ARM: dts: stm32: add stm32429-eval-u-boot dts file
_ Add gpio compatible and aliases for stm32f469
   _ Add FMC sdram node
   _ Add "u-boot,dm-pre-reloc" for rcc, fmc, fixed-clock, pinctrl,
     pwrcfg and gpio nodes.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-01-28 09:39:05 -05:00
Patrice Chotard
c7ea4b0e09 ARM: dts: stm32: Add STM32F429 Evaluation board support
This DT file comes from kernel v4.15, this board offers :

   _ STM32F429NIH6 microcontroller
   _ 4.3” color TFT LCD with resistive touchscreen (480 x 272 pixels)
   _ Six 5 V power supply options:
        Power jack
        ST-LINK/V2 USB connector
        User USB HS connector
        User USB FS1 connector
        User USB FS2 connector
        Daughterboard
   _ SAI Audio DAC, stereo audio jack which supports headset with
     microphone
   _ Stereo digital microphone, audio terminal connector used to connect
     external speakers
   _ 2 GBytes (or more) SDIO interface MicroSD card
   _ RF EEPROM on I2 C compatible serial interface
   _ RS-232 communication
   _ IrDA transceiver
   _ JTAG/SWD and ETM trace debug support, ST-LINK/V2 embedded
   _ IEEE-802.3-2002 compliant Ethernet connector
   _ Camera module
   _ 8M x 32-bit SDRAM, 1M x 16-bit SRAM and 8M x 16-bit NOR Flash
   _ Joystick with 4-directional control and selector
   _ Reset, Wakeup and Tamper buttons
   _ 4 color user LEDs
   _ Extension connectors & memory connectors for daughterboard or
     wrapping board
   _ USB OTG HS and FS with Micro-AB connectors
   _ RTC with backup battery
   _ CAN2.0A/B compliant connection
   _ Potentiometer
   _ Motor control connector

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-01-28 09:39:05 -05:00
Patrice Chotard
e23b19f4a8 board: stm32: Add stm32f429-evaluation board support
Add stm32f429-evaluation board support.
For more information, please visit:
http://www.st.com/en/evaluation-tools/stm32429i-eval.html

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-01-28 09:39:05 -05:00
Patrice Chotard
09b9f649d0 configs: stm32f: Remove STM32_HSE_HZ for all STM32F series
As clk_stm32f driver is able to retrieve HSE frequency from DT,
CONFIG_STM32_HSE_HZ becomes useless.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-01-28 09:39:05 -05:00
Patrice Chotard
cb97ff9d3d clk: stm32: retrieve external oscillator frequency from DT
All current STM32F4 supported boards uses a 8MHz external oscillator.
All current STM32F7 supported boards uses a 25MHz external oscillator.

In order to introduce the new stm32f429-evaluation board which uses a
25MHz external oscillator without creating a dedicated struct
stm32_clk_info for this board, retrieve the external oscillator
frequency from DT and set pll_m accordingly to obtain 1MHz for the VCO.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-01-28 09:39:05 -05:00
Patrice Chotard
baf20a7d1a ARM: dts: stm32: add "u-boot, dm-pre-reloc" for clk_hse in stm32f7-u-boot
In order to retrieve the clk_hse fixed clock phandle in clk_stm32f driver,
add "u-boot,dm-pre-reloc" property in Uboot specific DT file.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-01-28 09:39:05 -05:00
Heiko Schocher
020da843fc arm: bootm-fdt.c: fix compiler warning
compiling U-Boot with bosch_mpcxxxxd_sd_defconfig
drops warning:

arch/arm/lib/bootm-fdt.c: In function ‘arch_fixup_fdt’:
arch/arm/lib/bootm-fdt.c:37:6: warning: unused variable ‘ret’ [-Wunused-variable]
  int ret = 0;
      ^~~

Fix it.

Signed-off-by: Heiko Schocher <hs@denx.de>
2018-01-28 09:39:05 -05:00
Andrew F. Davis
60013a2cf6 arm: mach-omap2: Pass args to secure ROM in SRAM in SPL
When in early SPL we make some secure ROM calls that can effect
DRAM, due to this it is more stable to store the args for these
calls in SRAM, but uninitialized and zero'd globals are placed
in BSS, located in DRAM. Force our args into the data section
which is in SRAM during SPL.

Signed-off-by: Andrew F. Davis <afd@ti.com>
2018-01-28 09:39:05 -05:00
Mario Six
92f84b67e5 common: board_r: Fix style violations
Fix some style violations in the board_r file.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-01-28 09:39:05 -05:00
Mario Six
16ef147425 common: board_f: Fix style violations
Fix some style violations in the board_f file.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-01-28 09:36:28 -05:00
Mario Six
4dbf9bed18 serial: ns16550: Fix style violation
Clarify the computation precedence in two ternary operator
constructions.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-01-28 09:36:28 -05:00
Mario Six
7ba50418b9 include: dm: Fix 'devioe'/'devuce' typos
There are some typos in the documentation of some functions in read.h;
fix those.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-28 09:36:28 -05:00
Mario Six
f5ac4f2ea0 gpio: mpc8xxx: Make live-tree compatible
Make the MPC8xxx GPIO driver compatible with a live device tree.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-01-28 09:36:28 -05:00
Mario Six
f9c7fde260 gpio: mpc8xxx: Make compatible with more SoCs
Finally, make the mpc8xxx driver capable of handling more GPIO devices;
this entails adding a special case for the MPC5121 SoC, and adding a set
of new compatible strings.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-01-28 09:36:28 -05:00
Mario Six
3c21683480 gpio: mpc8xxx: Rename Kconfig option, structures, and functions
Rename the Kconfig option, structures (and their members), as well as
functions of the mpc85xx driver to include mpc8xxx to reflect the more
generic usage.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-01-28 09:36:28 -05:00
Mario Six
76d00cc9cb gpio: mpc85xx: Rename driver file to mpc8xxx
In preparation to making the MPC85xx GPIO driver useable for a broader
range of SoCs, rename the driver file.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-01-28 09:36:28 -05:00
Mario Six
aadc5e67ee gpio: mpc85xx_gpio: Fix style violations
Fix some style violations in the MPC85XX GPIO driver.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-01-28 09:36:28 -05:00
Mario Six
f62ca2cd2a gpio: pca953x_gpio: Make live-tree compatible
Make the pca953x_gpio driver compatible with a live device tree.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-01-28 09:36:28 -05:00
Mario Six
fb01e07a95 gpio: pca953x_gpio: Fix style violations
Fix some style violations in the pca953x_gpio driver.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-01-28 09:36:28 -05:00
Martin Etnestad
2d06fd839d Initialize SHA buffer size var in passwd_abort
The call to hash_block in passwd_abort fails with error ENOSPC on some
systems. The reason is that the variable which specifies the size of the
buffer to contain the computed hash does not get initialized.

This patch initializes the variable with the size of the buffer.

Signed-off-by: Martin Etnestad <martin.etnestad@appeartv.com>
2018-01-28 09:36:28 -05:00
Tom Rini
5b893baf08 Merge git://git.denx.de/u-boot-usb 2018-01-28 09:21:53 -05:00
Tom Rini
40b61180c1 usb: host: Drop unused hcd_name from r8a66597-hcd.c
The variable hcd_name is unsued, drop.

Cc: Marek Vasut <marex@denx.de>
Cc: Chris Brandt <chris.brandt@renesas.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-01-28 04:00:59 +01:00
Tom Rini
1c0ae0097b usb: Remove isp116x-hcd support
The isp116x-hcd driver is extremely long unused, so just remove it.

Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-01-28 04:00:59 +01:00
Tom Rini
1a7f6d4597 Merge git://git.denx.de/u-boot-uniphier 2018-01-27 21:55:04 -05:00
Tom Rini
9c486e7cb0 Merge branch 'rmobile-mx' of git://git.denx.de/u-boot-sh 2018-01-27 18:25:00 -05:00
Masahiro Yamada
7d8cca7be6 ARM: uniphier: enable HS200 support for uniphier_v8_defconfig
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2018-01-28 06:32:50 +09:00
Tom Rini
f95a4b3a55 Merge git://git.denx.de/u-boot-usb 2018-01-27 14:48:52 -05:00
Tom Rini
d61639e39a Merge git://git.denx.de/u-boot-socfpga 2018-01-27 14:48:41 -05:00
Marek Vasut
789edf694c ARM: rmobile: Convert R8A7791 Porter board to DM and DT
Convert the R8A7791 Porter board to DM and DT. This implies mostly
enabling the necessary configuration options and plucking out the
ad-hoc configuration from the board file. Moreover, the pre-reloc
malloc size was increased to allow the clock driver to start up
early without running out of malloc space and the early stack was
moved further up in the DRAM to avoid rewriting U-Boot itself.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-27 20:38:54 +01:00
Marek Vasut
bb834b6247 ARM: rmobile: Enable OF_CONTROL on RCar Gen2
Since the DTs are now in place, enable OF control so that they get
bundled into the U-Boot.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-27 20:38:54 +01:00
Marek Vasut
30ceb10c4c ARM: dts: rmobile: Add SoC and board U-Boot DT extras
Add U-Boot DT extras for each SoC and board. This marks the required
nodes with u-boot,dm-pre-reloc to start clock and PRR early on while
avoiding modification of the DTs imported from Linux.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-27 20:38:54 +01:00
Marek Vasut
a500e4e570 ARM: dts: rmobile: Add rudimentary R8A7790 Stout DT
The Stout board is not supported in Linux, so add a rudimentary DTS
for H2 Stout as a placeholder for when a proper DTS is available.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
---
NOTE: The Stout is already being shipped over, so proper DTS for both
      U-Boot and Linux will happen once it's delivered :-)
2018-01-27 20:38:54 +01:00
Marek Vasut
9a26fc5a73 ARM: dts: rmobile: Import R8A7794 DTS from Linux 4.15-rc8
Import the Renesas R8A7794 DTS and headers from upstream Linux kernel v4.15-rc8,
commit bebc6082da0a9f5d47a1ea2edc099bf671058bd4 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-27 20:38:54 +01:00
Marek Vasut
92aa099592 ARM: dts: rmobile: Import R8A7793 DTS from Linux 4.15-rc8
Import the Renesas R8A7793 DTS and headers from upstream Linux kernel v4.15-rc8,
commit bebc6082da0a9f5d47a1ea2edc099bf671058bd4 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-27 20:38:54 +01:00
Marek Vasut
a3fb9ff3b3 ARM: dts: rmobile: Import R8A7792 DTS from Linux 4.15-rc8
Import the Renesas R8A7792 DTS and headers from upstream Linux kernel v4.15-rc8,
commit bebc6082da0a9f5d47a1ea2edc099bf671058bd4 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-27 20:38:54 +01:00
Marek Vasut
edd15fcffb ARM: dts: rmobile: Import R8A7791 DTS from Linux 4.15-rc8
Import the Renesas R8A7791 DTS and headers from upstream Linux kernel v4.15-rc8,
commit bebc6082da0a9f5d47a1ea2edc099bf671058bd4 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-27 20:38:54 +01:00
Marek Vasut
16b6e4aa37 ARM: dts: rmobile: Import R8A7790 DTS from Linux 4.15-rc8
Import the Renesas R8A7790 DTS and headers from upstream Linux kernel v4.15-rc8,
commit bebc6082da0a9f5d47a1ea2edc099bf671058bd4 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-27 20:38:53 +01:00
Marek Vasut
319202640a net: sh_eth: Add DM and DT support
Add DM capable code into the SH ethernet driver and support probing
both from DT and pdata. The legacy non-DM, non-DT support is retained
as there are still systems in the tree which are not DM or DT capable.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2018-01-27 20:38:53 +01:00
Marek Vasut
a220784b14 net: sh_eth: Clump legacy functions together
Move the legacy functions around, so that they can be wrapped in a
massive ifdef CONFIG_DM_ETH once DM support is added. No functional
change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2018-01-27 20:38:53 +01:00
Marek Vasut
013af64f8f net: sh_eth: Split sh_eth_init
Split sh_eth_init() function into smaller chunks, which can
be called from both DM and non-DM code while handling the
specifics of both configurations.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2018-01-27 20:38:53 +01:00
Marek Vasut
68ac92e937 net: sh_eth: Separate out MAC address programming
Pull out the code for writing MAC address into the NIC into a
separate function, so it can be reused by both DM and non-DM
code. This is done in preparation for DM support, which handles
MAC address programming separately.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2018-01-27 20:38:53 +01:00
Marek Vasut
52c15e220b net: sh_eth: Split sh_eth_recv
Split sh_eth_recv into two functions, one which checks whether
a packet was received and one which handles the received packet.
This is done in preparation for DM support, which handles these
two parts separately.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2018-01-27 20:38:53 +01:00
Marek Vasut
dca221bd92 net: sh_eth: Pass sh_eth_dev around
Pass sh_eth_dev structure around instead of eth_device, since the
later is specific to the legacy networking support. This change is
done in preparation for the DM addition.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2018-01-27 20:38:53 +01:00
Marek Vasut
effb79027e net: sh_eth: Unify CONFIG_R8A779[01234] as CONFIG_RCAR_GEN2
Use the common RCAR_GEN2 config option instead of enumerating
each SoC and having a lengthy ifdef clause. No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2018-01-27 20:38:53 +01:00
Marek Vasut
e3105eacf5 net: ravb: staticize ravb_start
Cosmetic fix, make ravb_start() static.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2018-01-27 20:38:53 +01:00
Marek Vasut
5f14f7d783 pci: rmobile: Add RCar Gen2 PCIe controller driver
Add driver for the Renesas RCar PCIe controller present on Gen2 SoCs.
The PCIe on Gen2 is used both to connect external PCIe peripherals as
well as access the on-SoC USB EHCI controller.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2018-01-27 20:38:53 +01:00
Marek Vasut
8b05436ff5 gpio: rmobile: Add RCar Gen2 compatible string
Add DT compatible string for RCar Gen2.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-27 20:38:53 +01:00
Maxime Ripard
0163c9186b env: sunxi: Enable FAT-based environment support by default
Now that we have everything in place to implement the transition scheme,
let's enable it by default.

Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2018-01-27 09:23:32 -05:00
Maxime Ripard
b39117cad9 sunxi: Transition from the MMC to a FAT-based environment
The current environment has been hardcoded to an offset that starts to be
an issue given the current size of our main U-Boot binary.

By implementing a custom environment location routine, we can always favor
the FAT-based environment, and fallback to the MMC if we don't find
something in the FAT partition. We also implement the same order when
saving the environment, so that hopefully we can slowly migrate the users
over to FAT-based environment and away from the raw MMC one.

Eventually, and hopefully before we reach that limit again, we will have
most of our users using that setup, and we'll be able to retire the raw
environment, and gain more room for the U-Boot binary.

Reviewed-by: Lukasz Majewski <lukma@denx.de>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2018-01-27 09:23:22 -05:00
Maxime Ripard
40c08a68b9 env: Mark env_get_location as weak
Allow boards and architectures to override the default environment lookup
code by overriding env_get_location.

Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2018-01-27 09:23:22 -05:00
Maxime Ripard
fb69464eae env: Allow to build multiple environments in Kconfig
Now that we have everything in place in the code, let's allow to build
multiple environments backend through Kconfig.

Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2018-01-27 09:23:22 -05:00
Maxime Ripard
d282a1db6a env: mmc: depends on the MMC framework
The raw MMC environment directly calls into the MMC framework. Make sure
it's enabled before we can select it.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2018-01-27 09:21:57 -05:00
Maxime Ripard
1d4460871b env: Initialise all the environments
Since we want to have multiple environments, we will need to initialise
all the environments since we don't know at init time what drivers might
fail when calling load.

Let's init all of them, and only consider for further operations the ones
that have not reported any errors at init time.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2018-01-27 09:21:57 -05:00
Maxime Ripard
7d714a24d7 env: Support multiple environments
Now that we have everything in place to support multiple environment, let's
make sure the current code can use it.

The priority used between the various environment is the same one that was
used in the code previously.

At read / init times, the highest priority environment is going to be
detected, and we'll use the same one without lookup during writes. This
should implement the same behaviour than we currently have.

Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2018-01-27 09:21:57 -05:00
Maxime Ripard
58ae9990c0 env: common: Make the debug messages play a little nicer
Since we have global messages to indicate what's going on, the custom
messages in the environment drivers only make the output less readable.

Make the common code play a little nicer by removing all the extra output
in the standard case.

Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2018-01-27 09:19:11 -05:00
Maxime Ripard
29b8f21053 env: mmc: Make the debug messages play a little nicer
Since we have global messages to indicate what's going on, the custom
messages in the environment drivers only make the output less readable.

Make MMC play a little nicer by removing all the extra \n and formatting
that is redundant with the global output.

Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2018-01-27 09:19:11 -05:00
Maxime Ripard
d0816da54f env: fat: Make the debug messages play a little nicer
Since we have global messages to indicate what's going on, the custom
messages in the environment drivers only make the output less readable.

Make FAT play a little nicer by removing all the extra \n and formatting
that is redundant with the global output.

Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2018-01-27 09:19:11 -05:00
Maxime Ripard
3574ba019e env: Make it explicit where we're loading our environment from
Since we can have multiple environments now, it's better to provide a
decent indication on what environments were tried and which were the one to
fail and succeed.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2018-01-27 09:19:11 -05:00
Maxime Ripard
9efac3c805 env: Make the env save message a bit more explicit
Since we'll soon have support for multiple environments, the environment
saving message might end up being printed multiple times if the higher
priority environment cannot be used.

That might confuse the user, so let's make it explicit if the operation
failed or not.

Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2018-01-27 09:19:11 -05:00
Maxime Ripard
8a3a7e2270 env: Pass additional parameters to the env lookup function
In preparation for the multiple environment support, let's introduce two
new parameters to the environment driver lookup function: the priority and
operation.

The operation parameter is meant to identify, obviously, the operation you
might want to perform on the environment.

The priority is a number passed to identify the environment priority you
want to retrieve. The lowest priority parameter (0) will be the primary
source.

Combining the two parameters allow you to support multiple environments
through different priorities, and to change those priorities between read
and writes operations.

This is especially useful to implement migration mechanisms where you want
to always use the same environment first, be it to read or write, while the
common case is more likely to use the same environment it has read from to
write it to.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2018-01-27 09:19:11 -05:00
Maxime Ripard
52746c43d6 env: Rename env_driver_lookup_default and env_get_default_location
The env_driver_lookup_default and env_get_default_location functions are
about to get refactored to support loading from multiple environment.

The name is therefore not really well suited anymore. Drop the default
part to be a bit more relevant.

Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2018-01-27 09:19:11 -05:00
Maxime Ripard
9c24dfb2b8 cmd: nvedit: Get rid of the env lookup
The nvedit command is the only user of env_driver_lookup_default outside of
the environment code itself, and it uses it only to print the environment
it's about to save to during env save.

As we're about to rework the environment to be able to handle multiple
environment sources, we might not have an idea of what environment backend
is going to be used before trying (and possibly failing for some).

Therefore, it makes sense to remove that message and move it to the
env_save function itself. As a side effect, we also can get rid of the call
to env_driver_lookup_default that is also about to get refactored.

Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2018-01-27 09:19:11 -05:00
Tom Rini
748277c415 Merge git://git.denx.de/u-boot-sunxi 2018-01-26 13:22:40 -05:00
Tom Rini
ab12aa24e6 ARM: socfpga: Convert callers of cm_write_with_phase for wait_for_bit_le32
Now that we have and use wait_for_bit_le32() available, the callers of
cm_write_with_phase() should not be casting values to u32 and instead we
expect a const void *, so provide that directly.

Fixes: 48263504c8 ("wait_bit: use wait_for_bit_le32 and remove wait_for_bit")
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-01-26 13:08:03 -05:00
Chris Blake
a6968ecb0a gpio: sunxi: Add compatible string for H5 PIO
Add allwinner,sun50i-h5-pinctrl compatible for H5 boards.

Signed-off-by: Chris Blake <chrisrblake93@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
[jagan: remove external link and format commit message]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-01-26 20:02:33 +05:30
Maxime Ripard
9921966408 sunxi: Add limit with the MMC environment
The MMC environment offset is getting very close to the end of the U-Boot
binary now. Since we want to make sure this will not overflow, add a size
limit in the board for arm64. arm32 has already that limit enforced in our
custom image generation.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-26 20:02:33 +05:30
Maxime Ripard
e89f5591f4 Makefile: Add size check to the u-boot.itb make target
The make macro to check if the binary exceeds the board size limit is not
called. Make sure that is the case.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-26 20:02:33 +05:30
Andre Heider
eff264d731 sunxi: imply CONFIG_OF_LIBFDT_OVERLAY
fdt overlay support is useful for all sunxi boards, enable per default
and remove it from sunxi defconfigs.

Signed-off-by: Andre Heider <a.heider@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-26 20:02:33 +05:30
Maxime Ripard
acd4d3343f net: regex: Disable by default on sunXi
The sunXi arm64 build has overflown, leading to the main U-boot binary
overwriting the environment when flashing the new image, or even worse,
overwriting itself when we're calling saveenv.

Disable this option that is not critical until we can adress the issue
properly.

Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-26 20:02:33 +05:30
Maxime Ripard
0a319b610b video: bpp16: Disable by default on sunXi
The sunXi arm64 build has overflown, leading to the main U-boot binary
overwriting the environment when flashing the new image, or even worse,
overwriting itself when we're calling saveenv.

Disable this command that is not critical until we can adress the issue
properly.

Reviewed-by: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-26 20:02:33 +05:30
Maxime Ripard
2e8f1dd608 video: bpp8: Disable by default on sunXi
The sunXi arm64 build has overflown, leading to the main U-boot binary
overwriting the environment when flashing the new image, or even worse,
overwriting itself when we're calling saveenv.

Disable this command that is not critical until we can adress the issue
properly.

Reviewed-by: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-26 20:02:33 +05:30
Maxime Ripard
07dc22dd85 cmd: misc: Disable by default on sunXi
The sunXi arm64 build has overflown, leading to the main U-boot binary
overwriting the environment when flashing the new image, or even worse,
overwriting itself when we're calling saveenv.

Disable this command that is not critical until we can adress the issue
properly.

Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-26 20:02:33 +05:30
Maxime Ripard
e302ede73c cmd: loads: Disable by default on sunXi
The sunXi arm64 build has overflown, leading to the main U-boot binary
overwriting the environment when flashing the new image, or even worse,
overwriting itself when we're calling saveenv.

Disable this command that is not critical until we can adress the issue
properly.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-26 20:02:33 +05:30
Maxime Ripard
197e0be744 cmd: loadb: Disable by default on sunXi
The sunXi arm64 build has overflown, leading to the main U-boot binary
overwriting the environment when flashing the new image, or even worse,
overwriting itself when we're calling saveenv.

Disable this command that is not critical until we can adress the issue
properly.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-26 20:02:33 +05:30
Maxime Ripard
3b50382ab5 cmd: unzip: Disable by default on sunXi
The sunXi arm64 build has overflown, leading to the main U-boot binary
overwriting the environment when flashing the new image, or even worse,
overwriting itself when we're calling saveenv.

Disable this command that is not critical until we can adress the issue
properly.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-26 20:02:33 +05:30
Maxime Ripard
b02436089a cmd: crc32: Disable by default on sunXi
The sunXi arm64 build has overflown, leading to the main U-boot binary
overwriting the environment when flashing the new image, or even worse,
overwriting itself when we're calling saveenv.

Disable this command that is not critical until we can adress the issue
properly.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-26 20:02:33 +05:30
Maxime Ripard
70c56c138f dfu: select HASH
The DFU code relies on the HASH config option. Make sure it is always there
by selecting it.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-26 20:02:33 +05:30
Tom Rini
fc04bd84b3 Merge git://git.denx.de/u-boot-mips 2018-01-26 07:46:47 -05:00
Tom Rini
1d12a7c8cd Merge git://git.denx.de/u-boot-spi 2018-01-26 07:46:34 -05:00
Álvaro Fernández Rojas
664ec31db7 MIPS: add BMIPS Comtrend AR-5315u board
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-01-26 12:38:13 +01:00
Álvaro Fernández Rojas
3483f28ebf MIPS: add support for Broadcom MIPS BCM6318 SoC family
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-01-26 12:38:13 +01:00
Álvaro Fernández Rojas
a80bf5e46e dm: ram: bmips: add BCM6318 support
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-01-26 12:38:13 +01:00
Álvaro Fernández Rojas
70d30d8684 dm: cpu: bmips: add BCM6318 support
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-01-26 12:38:13 +01:00
Álvaro Fernández Rojas
c320b923f5 MIPS: add BMIPS Comtrend WAP-5813n board
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-01-26 12:35:22 +01:00
Álvaro Fernández Rojas
43b7ab99ec MIPS: add support for Broadcom MIPS BCM6368 SoC family
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-01-26 12:35:22 +01:00
Álvaro Fernández Rojas
8c8ef2e825 dm: cpu: bmips: add BCM6368 support
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-01-26 12:35:22 +01:00
Eugeniy Paltsev
58c125b9e2 DW SPI: Get clock value from Device Tree
Add option to set spi controller clock frequency via device tree
using standard clock bindings.

Define dw_spi_get_clk function as 'weak' as some targets
(like SOCFPGA_GEN5 and SOCFPGA_ARRIA10) don't use standard clock API
and implement dw_spi_get_clk their own way in their clock manager.

Get rid of clock_manager.h include as we don't use
cm_get_spi_controller_clk_hz function anymore. (we use redefined
dw_spi_get_clk in SOCFPGA clock managers instead)

Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-26 11:26:16 +05:30
Eugeniy Paltsev
21143ce127 SOCFPGA: clock manager: implement dw_spi_get_clk function
Implement dw_spi_get_clk function to override its weak
implementation in designware_spi.c driver.

We need this change to get rid of cm_get_spi_controller_clk_hz
function and clock_manager.h include in designware_spi.c driver.

Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-26 11:25:49 +05:30
Daniel Schwierzeck
6f7c92db4c usb: ehci: mxs: fix swapped argument in ehci_writel()
ehci_writel() swaps the arguments for address and value. One call
in ehci-mxs ignores that.

This fixes the warning:

drivers/usb/host/ehci-mxs.c: In function ?ehci_hcd_stop?:
drivers/usb/host/ehci-mxs.c:159:19: error: initialization makes integer from pointer without a cast [-Werror=int-conversion]
  ehci_writel(tmp, &hcor->or_usbcmd);
                   ^
arch/arm/include/asm/io.h:117:34: note: in definition of macro ?writel?
 #define writel(v,c) ({ u32 __v = v; __iowmb(); __arch_putl(__v,c); __v; })
                                  ^
drivers/usb/host/ehci-mxs.c:159:2: note: in expansion of macro ?ehci_writel?
  ^~~~~~~~~~~

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-01-25 20:59:20 +01:00
Gustavo A. R. Silva
eacccbda43 usb: xhci: Fix bool initialization in xhci_bulk_tx
Bool initializations should use true and false.

This issue was detected with the help of Coccinelle.

Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Marek Vasut <marex@denx.de>
2018-01-25 20:59:16 +01:00
Álvaro Fernández Rojas
cd1cc31fe1 mips: bmips: increment SYS_MALLOC_F_LEN
This prevents the following ENOMEM:
Error binding driver 'bmips_cpu': -12

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-01-25 17:40:42 +01:00
Paul Burton
b2f815bb5f boston: Pad binary in .mcs to a multiple of 16 bytes
When flashing U-Boot on a Boston board using Xilinx Vivado tools, the
final 0x00 byte which ends the .relocs section seems to be skipped &
left in flash as 0xff unless the data contained in the .mcs is padded
out to a 16 byte boundary. Without our final zero byte relocation will
fail with an error about a spurious reloc:

Avoid this problem by padding out the data in the .mcs file to a 16 byte
boundary using srec_cat's -range-pad functionality.

Signed-off-by: Paul Burton <paul.burton@mips.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-01-25 17:40:42 +01:00
Goldschmidt Simon
92962b3caf ddr: altera: silence PHY calibration unless in debug mode
This driver has been using printf() including filename since it was
added. Convert to using debug() instead.

Signed-off-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
2018-01-25 09:59:37 +01:00
Simon Goldschmidt
1c7fa79314 arm: socfpga: allow configs without network support
Currently, socfpga_common.h does not allow configurations without
network support. This is because CONFIG_CMD_PXE is defined in this
file and distro mode has DHCP hard-coded as available.

Fix this by moving CONFIG_CMD_PXE and CONFIG_MENU to the defconfigs
and by making DHCP optional in BOOT_TARGET_DEVICES(func).

Signed-off-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
2018-01-25 09:59:37 +01:00
Tom Rini
a3f77c810b Merge branch 'master' of git://git.denx.de/u-boot-coldfire 2018-01-24 22:08:00 -05:00
Marek Vasut
34e93605ae pinctrl: rmobile: Import R8A7794 E2 PFC tables
Import PFC tables for R8A7794 E2 SoC from upstream Linux kernel v4.15-rc8,
commit bebc6082da0a9f5d47a1ea2edc099bf671058bd4 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-24 23:27:23 +01:00
Marek Vasut
ab2d09b4be pinctrl: rmobile: Import R8A7792 V2H PFC tables
Import PFC tables for R8A7792 V2H SoC from upstream Linux kernel v4.15-rc8,
commit bebc6082da0a9f5d47a1ea2edc099bf671058bd4 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-24 23:27:23 +01:00
Marek Vasut
427c75df5a pinctrl: rmobile: Import R8A7791/R8A7793 M2 PFC tables
Import PFC tables for R8A7791 M2W and R8A7793 M2N SoC from upstream Linux
kernel v4.15-rc8, commit bebc6082da0a9f5d47a1ea2edc099bf671058bd4 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-24 23:27:23 +01:00
Marek Vasut
7547ad4ca0 pinctrl: rmobile: Import R8A7790 H2 PFC tables
Import PFC tables for R8A7790 H2 SoC from upstream Linux kernel v4.15-rc8,
commit bebc6082da0a9f5d47a1ea2edc099bf671058bd4 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-24 23:27:22 +01:00
Marek Vasut
19b1a8b7a7 clk: renesas: Import R8A7794 E2 clock tables
Import clock tables for R8A7794 E2 SoC from upstream Linux kernel v4.15-rc8,
commit bebc6082da0a9f5d47a1ea2edc099bf671058bd4 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-24 23:27:22 +01:00
Marek Vasut
ce43893d4d clk: renesas: Import R8A7792 V2H clock tables
Import clock tables for R8A7792 V2H SoC from upstream Linux kernel v4.15-rc8,
commit bebc6082da0a9f5d47a1ea2edc099bf671058bd4 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-24 23:27:22 +01:00
Marek Vasut
67dbebe203 clk: renesas: Import R8A7791/R8A7793 M2 clock tables
Import clock tables for R8A7791 M2W and R8A7793 M2N SoC from upstream Linux
kernel v4.15-rc8, commit bebc6082da0a9f5d47a1ea2edc099bf671058bd4 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-24 23:27:22 +01:00
Marek Vasut
75a5096da4 clk: renesas: Import R8A7790 H2 clock tables
Import clock tables for R8A7790 H2 SoC from upstream Linux kernel v4.15-rc8,
commit bebc6082da0a9f5d47a1ea2edc099bf671058bd4 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-24 23:27:22 +01:00
Marek Vasut
dedb60fb5b clk: renesas: Add Gen2 clock core
Add common clock code for Renesas RCar Gen2 platforms.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-24 23:27:22 +01:00
Marek Vasut
28b8f225b4 clk: renesas: Add DIV6P1 clock type
Add macros for the DIV6P1 clock type, which is used on Gen2
and optionally also on Gen3.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-24 23:27:22 +01:00
Marek Vasut
d26286715f clk: renesas: Split out code shared between Gen2 and Gen3
Pull code which is common for RCar Gen2 and RCar Gen3 into
separate source file. No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-24 23:27:22 +01:00
Marek Vasut
65f1bbf678 clk: renesas: Make clock tables Kconfig configurable
Add Kconfig entries for each SoC clock table, so they can be
compiled in or out at build time. This can reduce the size of
the binary if desired.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-24 23:27:22 +01:00
Marek Vasut
ff50b323b3 clk: renesas: Split SMSTPCR and RMSTPCR tables
The Gen2 requires setting RMSTPCR before booting, while on Gen3 this
is thus far always zero. Split the tables so the RMSTPCR can be set
too.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-24 23:27:22 +01:00
Marek Vasut
58f1788f47 clk: renesas: Pull Gen3 specific bits into separate header
Extract the macros specific to Gen3 clock into a separate header.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-24 23:27:22 +01:00
Marek Vasut
7c88556323 clk: renesas: Make PLL configurations per-SoC
Not all SoCs have the same PLL configuration options,
so make those PLL configuraion tables per-SoC.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-24 23:27:21 +01:00
Marek Vasut
f11c9679ab clk: renesas: Make clk_ids per-driver
Not all drivers use the same IDs, so make those IDs per-driver.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-24 23:27:21 +01:00
Marek Vasut
f77b5a4cd1 clk: renesas: Split RCar Gen3 driver
Split the massive driver into smaller per-SoC drivers and pull the
common code into a separate file. This would allow configuring out
unnecessary clock drivers once the Kconfig changes are in and also
allow adding more clock tables easily.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-24 23:27:21 +01:00
Chris Brandt
8591ac8b16 serial: sh: Add support for R7S72100 (RZ/A1)
Add support for RZ/A1 series SoCs.

Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
2018-01-24 23:27:21 +01:00
Marek Vasut
a6e25b2e12 serial: sh: Unify CONFIG_R8A779[01234] as CONFIG_RCAR_GEN2
Use the common RCAR_GEN2 config option instead of enumerating
each SoC and having a lengthy ifdef clause. No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-24 23:27:21 +01:00
Marek Vasut
c493756ab4 serial: sh: Replace fdtdec_get_addr() with devfdt_get_addr()
Replace fdtdec_get_addr() with devfdt_get_addr() as the later one is
the current recommended practice.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-24 23:27:21 +01:00
Marek Vasut
b606e1bbc3 ARM: rmobile: Convert CONFIG_R8A77xx to Kconfig
Convert these configuration options to Kconfig, update board defconfigs
and drop them from whitelist.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-24 23:27:21 +01:00
Marek Vasut
34df58a95e ARM: dts: rmobile: Factor out U-Boot extras
Pull out u-boot extras into dtsi files to make synchronization of DTS
from Linux kernel as easy as a simple copy. All the U-Boot extras are
now in *-u-boot.dts* files instead.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-24 23:27:21 +01:00
Marek Vasut
62b2bb5374 ARM: dts: rmobile: Update DTS to match Linux 4.14
Import the RCar Gen3 DTS and headers from upstream Linux kernel v4.14,
commit bebc6082da0a9f5d47a1ea2edc099bf671058bd4 . This includes both M3
and H3 ULCB and Salvator-X boards.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-24 23:27:21 +01:00
Tom Rini
fb4413295c Merge git://git.denx.de/u-boot-mmc 2018-01-24 11:28:44 -05:00
Ezequiel Garcia
fe3dfb2324 doc: Update the zynq u-boot status
NAND and QSPI devices are now supported, so mark
them as such.

Cc: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-24 11:45:06 +01:00
Ezequiel Garcia
578d95e99f arm: zynq: Enable SPL_CLK only if SPL is enabled
Setup proper dependency in Kconfig for SPL_CLK.
If SPL is not enabled, SPL_CLK shouldn't be selected.

Cc: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-24 11:45:06 +01:00
Jun Nie
2f516e4aa2 mmc: Poll for broken card detection case
Poll for broken card detection case instead of return
no card detected.

Signed-off-by: Jun Nie <jun.nie@linaro.org>
2018-01-24 16:12:03 +09:00
Jaehoon Chung
c0fafe64a5 mmc: fix to assign to correct clock value when clock is enabling
When clock is enabling, it's assigned to 0 as mmc->clock.
Then it can't initialize any card.
Fix to assign to correct clock value as mmc->cfg->f_min or f_max.

Fixes: 9546eb92cb ("mmc: fix the wrong disabling clock")
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Tested-by: Guillaume GARDET <guillaume.gardet@free.fr>
Tested-by: Anand Moon <linux.amoon@gmail.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
2018-01-24 16:08:27 +09:00
Jaehoon Chung
f35cdb7135 configs: odroid-xu3: enable the configs relevant to regulator
Enable the CONFIG_CMD_REGULATOR and CONFIG_DM_REGULATOR_S2MPS11.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Anand Moon <linux.amoon@gmail.com>
2018-01-24 16:07:52 +09:00
Jaehoon Chung
173f023f46 power: pmic: s2mps11: probe the regulator driver
Add the probe function to support the s2mps11 regulator driver.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Anand Moon <linux.amoon@gmail.com>
2018-01-24 16:07:35 +09:00
Jaehoon Chung
60599ea6cd power: regulator: s2mps11: add a regulator driver for s2mps11
exynos5422 has the s2mps11 PMIC.
s2mps11 pmic has the 10-BUCK and 38-LDO regulators.
Each IP and devices in exynos5422 can be controlled by each regulators.
This patch is support for s2mps11 regulator driver.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Anand Moon <linux.amoon@gmail.com>
2018-01-24 16:07:19 +09:00
Vignesh R
aaa21d3ffc spi: cadence_qspi_apb: Make flash writes 32 bit aligned
Make flash writes 32 bit aligned by using bounce buffers to deal with
non 32 bit aligned buffers.
This is required because as per TI K2G TRM[1], the external master is
only permitted to issue 32-bit data interface writes until the last word
of an indirect transfer. Otherwise indirect writes is known to fail
sometimes.

[1] http://www.ti.com/lit/ug/spruhy8g/spruhy8g.pdf

Signed-off-by: Vignesh R <vigneshr@ti.com>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
Reviewed-by: Jason Rush <jarush@gmail.com>
Acked-by: Jason Rush <jarush@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-24 12:11:36 +05:30
Vignesh R
a743e2ba38 Revert "spi: cadence_qspi_apb: Use 32 bit indirect write transaction when possible"
This reverts commit 57897c13de.

Using bounce_buf.c to handle non-DMA alignment problems is bad as
bounce_buf.c does cache manipulations which is not required. Therefore
revert this patch in favour of local bounce buffer solution in the next
patch.

Signed-off-by: Vignesh R <vigneshr@ti.com>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
Reviewed-by: Jason Rush <jarush@gmail.com>
Acked-by: Jason Rush <jarush@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-24 12:11:36 +05:30
Goldschmidt Simon
948ad4f075 Revert "spi: cadence_qspi_apb: Use 32 bit indirect read transaction when possible"
This reverts commit b63b46313e.

This commit changed cadence_qspi_apb to use bouncebuf.c, which invalidates
the data cache after reading. This is meant for dma transfers only and
breaks the cadence_qspi driver which copies via cpu only: data that is
copied by the cpu is in cache only and the cache invalidation at the end
throws away this data.

Signed-off-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
Signed-off-by: Vignesh R <vigneshr@ti.com>
Acked-by: Marek Vasut <marex@denx.de>
Reviewed-by: Jason Rush <jarush@gmail.com>
Acked-by: Jason Rush <jarush@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-24 12:11:36 +05:30
Jason Rush
c58f300628 dts: cadence_spi: Update documentation for DT bindings
Update documentation to reflect adopting the Linux DT bindings.

Tested on TI K2G platform:
Tested-by: Vignesh R <vigneshr@ti.com>

Tested on a socfpga-cyclonev board:
Tested-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>

Signed-off-by: Jason Rush <jarush@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Acked-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
Acked-by: Marek Vasut <marex@denx.de>
2018-01-24 12:07:50 +05:30
Jason Rush
5a15ec19c8 config: cadence_spi: Remove defines read from DT
Cleanup unused #define values that are read from the DT.

Tested on TI K2G platform:
Tested-by: Vignesh R <vigneshr@ti.com>

Tested on a socfpga-cyclonev board:
Tested-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>

Signed-off-by: Jason Rush <jarush@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Acked-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
Acked-by: Marek Vasut <marex@denx.de>
2018-01-24 12:07:50 +05:30
Jason Rush
6e62b178e1 dts: cadence_spi: Sync DT bindings with Linux
Adopt the Linux DT bindings and clean-up duplicate
and unused values.

Fix indentation of the QSPI node in the keystone k2g
device tree.

Tested on TI K2G platform:
Tested-by: Vignesh R <vigneshr@ti.com>

Tested on a socfpga-cyclonev board:
Tested-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>

Signed-off-by: Jason Rush <jarush@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Acked-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
Acked-by: Marek Vasut <marex@denx.de>
2018-01-24 12:07:50 +05:30
Jason Rush
15a70a5da3 spi: cadence_spi: Sync DT bindings with Linux
Adopt the Linux DT bindings. This also fixes an issue
with the indaddrtrig register on the Cadence QSPI
device being programmed with the wrong value for the
socfpga arch.

Tested on TI K2G platform:
Tested-by: Vignesh R <vigneshr@ti.com>

Tested on a socfpga-cyclonev board:
Tested-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>

Signed-off-by: Jason Rush <jarush@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Acked-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
Acked-by: Marek Vasut <marex@denx.de>
2018-01-24 12:07:50 +05:30
Chris Packham
df16881cea spi: kirkwood_spi: implement workaround for FE-9144572
Erratum NO. FE-9144572: The device SPI interface supports frequencies of
up to 50 MHz.  However, due to this erratum, when the device core clock
is 250 MHz and the SPI interfaces is configured for 50MHz SPI clock and
CPOL=CPHA=1 there might occur data corruption on reads from the SPI
device.

Implement the workaround by setting the TMISO_SAMPLE value to 0x2
in the timing1 register.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-24 12:04:08 +05:30
Mario Six
36890ff0d0 sf_probe: Merge spi_flash_probe_tail into spi_flash_probe
spi_flash_probe_tail is now only called from spi_flash_probe, hence we
can merge its body into spi_flash_probe.

Reviewed-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-01-24 12:04:08 +05:30
Mario Six
24fc1ec2ee spi: spi-uclass: Fix style violations
Remove a superfluous newline, and reduce the scope of a variable.

Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-01-24 12:04:08 +05:30
Mario Six
a3e32c5038 spi: sf_probe: Fix style violations
Fix two indention-related style violations.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-24 12:04:08 +05:30
Mario Six
8ceb40c752 spi: Remove CONFIG_OF_SPI_FLASH
Previous patches removed the last usages of this config variable, so
that it is now obsolete.

This patch removes it from the whitelist.

Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-01-24 12:04:07 +05:30
Mario Six
184fa1c8da spi: Remove spi_setup_slave_fdt
A previous patch removed the spi_flash_probe_fdt function, which
contained the last call of the spi_setup_slave_fdt function, which is
now equally obsolete.

This patch removes the function.

Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-01-24 12:04:07 +05:30
Mario Six
74ea6e82f8 spi: Remove spi_flash_probe_fdt
Commit ba45756 ("dm: x86: spi: Convert ICH SPI driver to driver model")
removed the last usage of the spi_flash_probe_fdt function, rendering it
obsolete.

This patch removes the function.

Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-01-24 12:04:07 +05:30
Mario Six
c5b88f29ba spi: Remove obsolete spi_base_setup_slave_fdt
0efc024 ("spi_flash: Add spi_flash_probe_fdt() to locate SPI by FDT
node") added a helper function spi_base_setup_slave_fdt to to set up a
SPI slave from a given FDT blob. The only user was the exynos SPI
driver.

But commit 73186c9 ("dm: exynos: Convert SPI to driver model") removed
the use of this function, hence rendering it obsolete.

Remove this function, as well as the CONFIG_OF_SPI option, which guarded
only this function.

Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-01-24 12:04:07 +05:30
Mario Six
547bcc3d18 spi: Fix style violation and improve code
This patch fixes a printf specifier style violation, reduces the scope
of a variable, and turns a void pointer that is used with pointer
arithmetic into a u8 pointer.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-24 12:04:07 +05:30
Álvaro Fernández Rojas
1312906416 mips: bmips: enable the SPI flash on the Comtrend AR-5387un
It's a Macronix (mx25l12805d) 16 MB SPI flash.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-24 12:04:07 +05:30
Álvaro Fernández Rojas
727839b491 mips: bmips: add bcm63xx-hsspi driver support for BCM63268
This driver manages the high speed SPI controller present on this SoC.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-24 12:04:07 +05:30
Álvaro Fernández Rojas
80be057c72 mips: bmips: add bcm63xx-hsspi driver support for BCM6328
This driver manages the SPI controller present on this SoC.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-24 12:04:07 +05:30
Álvaro Fernández Rojas
29cc4368ad dm: spi: add BCM63xx HSSPI driver
This driver is a simplified version of linux/drivers/spi/spi-bcm63xx-hsspi.c

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-24 12:04:06 +05:30
Álvaro Fernández Rojas
46fe9dcfff mips: bmips: enable the SPI flash on the Netgear CG3100D
It's a Spansion (s25fl064a) 8 MB SPI flash.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-24 12:03:43 +05:30
Álvaro Fernández Rojas
e4a06fa330 mips: bmips: enable the SPI flash on the Sagem F@ST1704
It's a Winbond (w25x32) 4 MB SPI flash.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-24 12:03:43 +05:30
Álvaro Fernández Rojas
26cee0ecc7 mips: bmips: add bcm63xx-spi driver support for BCM63268
This driver manages the low speed SPI controller present on this SoC.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-24 12:03:43 +05:30
Álvaro Fernández Rojas
1c2479a5fa mips: bmips: add bcm63xx-spi driver support for BCM3380
This driver manages the SPI controller present on this SoC.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-24 12:03:43 +05:30
Álvaro Fernández Rojas
076c1aacba mips: bmips: add bcm63xx-spi driver support for BCM6358
This driver manages the SPI controller present on this SoC.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-24 12:03:43 +05:30
Álvaro Fernández Rojas
ff159286a7 mips: bmips: add bcm63xx-spi driver support for BCM6348
This driver manages the SPI controller present on this SoC.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-24 12:03:43 +05:30
Álvaro Fernández Rojas
0adfb199ce mips: bmips: add bcm63xx-spi driver support for BCM6338
This driver manages the SPI controller present on this SoC.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-24 12:03:43 +05:30
Álvaro Fernández Rojas
5ac07d2969 dm: spi: add BCM63xx SPI driver
This driver is a simplified version of linux/drivers/spi/spi-bcm63xx.c

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-24 12:03:43 +05:30
Álvaro Fernández Rojas
6c94bd12c4 drivers: spi: consider command bytes when sending transfers
Command bytes are part of the written bytes and they should be taken into
account when sending a spi transfer.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-24 12:03:43 +05:30
Álvaro Fernández Rojas
8af74edc30 drivers: spi: allow limiting reads
For some SPI controllers it's not possible to keep the CS active between
transfers and they are limited to a known number of bytes.
This splits spi_flash reads into different iterations in order to respect
the SPI controller limits.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-24 12:03:43 +05:30
Álvaro Fernández Rojas
48263504c8 wait_bit: use wait_for_bit_le32 and remove wait_for_bit
wait_for_bit callers use the 32 bit LE version

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-24 12:03:43 +05:30
Álvaro Fernández Rojas
91fe458bbf wait_bit: add 8/16/32 BE/LE versions of wait_for_bit
Add 8/16/32 bits and BE/LE versions of wait_for_bit.
This is needed for reading registers that are not aligned to 32 bits, and for
Big Endian platforms.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-24 12:03:43 +05:30
Tom Rini
1612128018 Merge git://git.denx.de/u-boot-fsl-qoriq 2018-01-23 21:48:53 -05:00
Angelo Dureghello
b9153fe308 common/board_f.c: align m68k arch to use CONFIG_DISPLAY_CPUINFO
Change all coldfire arch files to use CONFIG_DISPLAY_CPUINFO.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>
Reviewed-by: Tom Rini <trini@konsulko.com>
---
Changes for v2:
   - update common/Kconfig to add M68K to the default y list
2018-01-23 23:47:02 +01:00
Ashish Kumar
6c8945ec41 armv8: ls1088a: Add IFC and eMMC as qixis boot sources
Add macro QIXIS_LBMAP_EMMC, QIXIS_LBMAP_IFC, QIXIS_RCW_SRC_IFC,
QIXIS_RCW_SRC_EMMC to enable IFC and eMMC as boot sources for
qixis commands.

Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
[YS: Modify subject and add commit message]
Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-23 11:26:21 -08:00
Ashish Kumar
fe997689c3 fsl: common: qixis: Add ifc and emmc switching via qixis
Currently only SD, NAND can be secondary boot sources controlled
by FPGA/CPLD via qixis commands. For SoC like LS1088 IFC-NOR
can be secondary boot source, while QSPI-NOR is the primary.
Add options in qixis to switch to other boot sources including
ifc and emmc.

Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-23 11:22:12 -08:00
Breno Lima
d7af2baa49 crypto/fsl: Fix HW accelerated hash commands
The hash command function were not flushing the dcache before passing data
to CAAM/DMA and not invalidating the dcache when getting data back.

Due the data cache incoherency, HW accelerated hash commands used to fail
with CAAM errors like "Invalid KEY Command".

Check if pbuf and pout buffers are properly aligned to the cache line size
and flush/invalidate the memory regions to address this issue.

This solution is based in a previous work from Clemens Gruber in
commit 598e9dccc7 ("crypto/fsl: fix BLOB encapsulation and
decapsulation")

Reported-by: Anatolij Gustschin <agust@denx.de>
Signed-off-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-23 11:21:20 -08:00
Pankaj Bansal
6d48d1c4b4 ARM: dts: Freescale: re-license device tree files under GPLv2+/X11
The current GPL only licensing on the device trees makes it very
impractical for other software components licensed under another
license.

To make it easier to reuse them, re-license the the device trees for
Freescale (now NXP) SoCs and boards under GPLv2+/X11 dual license.

Same trend is followed in linux.

Cc: Priyanka Jain <priyanka.jain@nxp.com>
Cc: Mingkai Hu <mingkai.hu@nxp.com>
Cc: York Sun <york.sun@nxp.com>
Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-23 11:21:10 -08:00
Rajesh Bhagat
980d61a270 armv8: ls1088a: vid: Compiling VID specific functions for SPL
Enables and compiles VID specific functions for SPL.

Signed-off-by: Pankit Garg <pankit.garg@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-23 11:21:00 -08:00
Rajesh Bhagat
ef0789b7c6 ls1088a: Add VID support for QDS and RDB platforms
This patch adds the support for VID on LS1088AQDS and LS1088ARDB systems.
It reads the fusesr register and changes the VDD accordingly by adjusting
the voltage via LTC3882 regulator.

This patch also takes care of the special case of 0.9V VDD is present in
fusesr register. In that case,it also changes the SERDES voltage by
disabling the SERDES, changing the SVDD and then re-enabling SERDES.

Signed-off-by: Raghav Dogra <raghav.dogra@nxp.com>
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: Amrita Kumari <amrita.kumari@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-23 11:20:53 -08:00
Rajesh Bhagat
1fab98fb90 common: board_f: vid: Add VID specific API to adjust core voltage
Adds a VID specific API in init_sequence_f and spl code flow
namely init_func_vid which is required to adjust core voltage.

VID specific code is required in spl, hence moving flag CONFIG_VID
out of spl flags.

Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-23 11:20:46 -08:00
Rajesh Bhagat
75ad48153f ls1088a: ddr: configure DDR for 0.9v for VID support
When VID feature is supported, check the contents of fuse register
and configure DDR operate at 0.9v.

Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-23 11:20:28 -08:00
Rajesh Bhagat
554d33f3db ddr: fsl: set cdr1 first in case 0.9v VDD is enabled for some SoCs
Sets DDR configuration parameter cdr1 before all other settings
to support case 0.9v VDD is enabled for some SoCs

Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-23 11:20:03 -08:00
Rajesh Bhagat
23a12cb3d0 board: common: vid: Add support for LTC3882 voltage regulator chip
Restructures common driver to support LTC3882 voltage regulator
chip.

Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-23 11:19:56 -08:00
Rajesh Bhagat
6f2d0a5020 Kconfig: Add LTC3882 voltage regulator config
Adds below LTC3882 voltage regulator config:
CONFIG_VOL_MONITOR_LTC3882_READ
CONFIG_VOL_MONITOR_LTC3882_SET

Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-23 11:19:49 -08:00
Rajesh Bhagat
9458316a3a board: common: vid: Move IR chip specific code in flag
Moves IR chip (IR36021) specific code in flag to resolve
compilation issue where it is not present. For example,
LS1088A is having a new LTC3882 voltage chip.

Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-23 11:19:38 -08:00
Rajesh Bhagat
3607570b11 board: common: vid: Add board specific vdd adjust API
Adds a board specific API namely board_adjust_vdd which
is required to define the board VDD adjust settings.

Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-23 11:19:25 -08:00
Rajesh Bhagat
c535ad4e91 board: common:vid: Add LS1088A VID Supported voltage values
Adds below voltage values supported by LS1088A Soc:
1.025V(default), 0.9875V, 0.9750V, 0.9V, 1.0V, 1.0125V, 1.0250V.

Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-23 11:18:35 -08:00
Rajesh Bhagat
a1f95ff7d7 armv8: lsch3: Add serdes and DDR voltage setup
Adds SERDES voltage and reset SERDES lanes API and makes
enable/disable DDR controller support 0.9V API common.

Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-23 11:18:12 -08:00
Tom Rini
a516416d75 Merge tag 'signed-efi-next' of git://github.com/agraf/u-boot
Patch queue for efi - 2018-01-23

This time around we have a lot of EFI patches from Heinrich.
Highlights are:

  - Allow EFI applications to register as drivers
  - Allow exposure of U-Boot block devices from an EFI payload
  - Compatibility improvements
2018-01-23 07:59:43 -05:00
Tom Rini
c761a7e29d Revert "travis-ci: Add qemu-x86_64 target"
This reverts commit 998ae28799.

This continues to fail in travis itself, so remove for now.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-01-22 21:06:41 -05:00
Adam Ford
6aa4ad8e38 Convert CONFIG_SOC_DA8XX et al to Kconfig
This converts the following to Kconfig:
   CONFIG_SOC_DA8XX
   CONFIG_SOC_DA850
   CONFIG_DA850_LOWLEVEL
   CONFIG_MACH_DAVINCI_DA850_EVM
   CONFIG_SYS_DA850_PLL_INIT
   CONFIG_SYS_DA850_DDR_INIT

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: David Lechner <david@lechnology.com>
[trini: Rework CONFIG_SYS_DA850_PLL_INIT so it's selected on SOC_DA8XX]
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-01-22 20:09:26 -05:00
Heinrich Schuchardt
003876d469 efi_selftest: reduce noise in test output for device trees
Some messages are only useful if an error occurs.
Fix a use after free.
Add a missing free.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-22 23:10:20 +01:00
Heinrich Schuchardt
9dfd84da8c efi_loader: allow creation of more device part nodes
Create device path nodes for UCLASS_ETH udevices.
Create device path nodes of block device children of UCLASS_MMC udevices.
Consistently use debug for unsupported nodes.
Set the log level to error.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
[agraf: Fix build failure by adding #ifdef CONFIG_DM_ETH]
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-22 23:10:05 +01:00
Heinrich Schuchardt
f768619239 efi_selftest: provide a test for block io
This test checks the driver for block IO devices.
A disk image is created in memory.
A handle is created for the new block IO device.
The block I/O protocol is installed on the handle.
ConnectController is used to setup partitions and to install the simple
file protocol.
A known file is read from the file system and verified.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-22 23:09:14 +01:00
Heinrich Schuchardt
05ef48a248 efi_driver: EFI block driver
This patch provides
* a uclass for EFI drivers
* a EFI driver for block devices

For each EFI driver the uclass
* creates a handle
* adds the driver binding protocol

The uclass provides the bind, start, and stop entry points for the driver
binding protocol.

In bind() and stop() it checks if the controller implements the protocol
supported by the EFI driver. In the start() function it calls the bind()
function of the EFI driver. In the stop() function it destroys the child
controllers.

The EFI block driver binds to controllers implementing the block io
protocol.

When the bind function of the EFI block driver is called it creates a
new U-Boot block device. It installs child handles for all partitions and
installs the simple file protocol on these.

The read and write functions of the EFI block driver delegate calls to the
controller that it is bound to.

A usage example is as following:

U-Boot loads the iPXE snp.efi executable. iPXE connects an iSCSI drive and
exposes a handle with the block IO protocol. It calls ConnectController.

Now the EFI block driver installs the partitions with the simple file
protocol.

iPXE uses the simple file protocol to load Grub or the Linux Kernel.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
[agraf: add comment on calloc len]
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-22 23:09:14 +01:00
Heinrich Schuchardt
ba45c9e4e1 efi_selftest: add missing LF in test output
The output of the minicapps lacks a line feed.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-22 23:09:14 +01:00
Heinrich Schuchardt
17ff6f02f5 efi_loader: store DT in EFI_RUNTIME_SERVICES_DATA memory
The device tree is needed at runtime. So we have to store it in
EFI_RUNTIME_SERVICES_DATA memory.

The UEFI spec recommends to store all configuration tables in
EFI_RUNTIME_SERVICES_DATA memory.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-22 23:09:14 +01:00
Heinrich Schuchardt
8218f7b5fc efi_selftest: test start image
This pair of tests checks the StartImage boot service.

Each test loads an EFI application into memory and starts it.
One returns by calling the Exit boot service. The other returns directly.

The tests are not built on x86_64 because the relocation code for the efi
binary cannot be created.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-22 23:09:14 +01:00
Heinrich Schuchardt
cc20ed03f9 efi_loader: fix ExitBootServices
This patch lets the implementation of ExitBootServices conform to
the UEFI standard.

The timer events must be disabled before calling the notification
functions of the exit boot services events.

The boot services must be disabled in the system table.

The handles in the system table should be defined as efi_handle_t.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-22 23:09:14 +01:00
Heinrich Schuchardt
9bc9664d5e efi_loader: add check_tpl parameter to efi_signal_event
In ExitBootServices we need to signal events irrespective of the current
TPL level. A new parameter check_tpl is added to efi_signal_event().

Function efi_console_timer_notify() gets some comments.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-22 23:09:14 +01:00
Heinrich Schuchardt
65436f91c5 efi_loader: provide function to get last node of a device path
On a block device and its partitions the same protocols can be
installed. To tell the apart we can use the type of the last
node of the device path which is not the end node.

The patch provides a utility function to find this last node.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-22 23:09:14 +01:00
Heinrich Schuchardt
4f94865b30 efi_loader: correct EFI_BLOCK_IO_PROTOCOL definitions
Add the revision constants.
Depending on the revision additional fields are needed in the
media descriptor.
Use efi_uintn_t for number of bytes to read or write.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-22 23:09:14 +01:00
Heinrich Schuchardt
64e4db0f11 efi_loader: make efi_disk_create_partitions a global symbol
Up to now we have been using efi_disk_create_partitions() to create
partitions for block devices that existed before starting an EFI
application.

We need to call it for block devices created by EFI
applications at run time. The EFI application will define the
handle for the block device and install a device path protocol
on it. We have to use this device path as stem for the partition
device paths.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-22 23:09:14 +01:00
Heinrich Schuchardt
98d48bdf41 efi_loader: provide a function to create a partition node
Provide new function efi_dp_part_node() to create a device
node for a partition.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-22 23:09:14 +01:00
Heinrich Schuchardt
b3dd14b6b1 efi_loader: make efi_block_io_guid a global symbol
The GUID of the EFI_BLOCK_IO_PROTOCOL is needed in different code
parts. To avoid duplication make efi_block_io_guid a global symbol.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-22 23:09:14 +01:00
Heinrich Schuchardt
9bfca9f98a efi_loader: efi_disk_register: correctly determine if_type_name
The interface type name can be used to look up the interface type.
Don't confound it with the driver name which may be different.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-22 23:09:14 +01:00
Heinrich Schuchardt
5e55543e65 efi_loader: fix StartImage bootservice
The calling convention for the entry point of an EFI image
is always 'asmlinkage'.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-22 23:09:13 +01:00
Heinrich Schuchardt
0aaabbb2c8 efi_loader: check tables in helloworld.efi
Check if the device tree and the SMBIOS table are available.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-22 23:09:13 +01:00
Heinrich Schuchardt
36b41a3ced efi_loader: allocate correct memory type for EFI image
The category of memory allocated for an EFI image should depend on
its type (application, bootime service driver, runtime service driver).

Our helloworld.efi built on arm64 has an illegal image type. Treat it
like an EFI application.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-22 23:09:13 +01:00
Heinrich Schuchardt
476ed96e01 efi_loader: print device path when entering efi_load_image
Use %pD to print the device path instead of its address when
entering efi_load_image.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-22 23:09:13 +01:00
Heinrich Schuchardt
110d80a1f2 efi_loader: correct find simple file system protocol
In contrast to the description the code did not split the device
path into device part and file part.

The code should use the installed protocol and not refer to the
internal structure of the the disk object.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-22 23:09:13 +01:00
Heinrich Schuchardt
22de1de905 efi_loader: address of the simple file system protocol
When installing the the simple file system protocol we have to path
the address of the structure and not the address of a pointer to the
structure.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-22 23:09:13 +01:00
Heinrich Schuchardt
04298686a4 efi_loader: return NULL from device path functions
For the construction of device paths we need to call the
AllocatePool service. We should not ignore if it fails due to an
out of memory situation.

This patch changes the device path functions to return NULL if
the memory allocation fails.

Additional patches will be needed to fix the callers.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-22 23:09:13 +01:00
Heinrich Schuchardt
2074f70064 efi_loader: consistently use efi_handle_t for handles
We should consistently use the efi_handle_t typedef when
referring to handles.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-22 23:09:13 +01:00
Heinrich Schuchardt
fb83350952 efi_selftest: test for (Dis)ConnectController
This unit test checks the following protocol services:
ConnectController, DisconnectController,
InstallProtocol, UninstallProtocol,
OpenProtocol, CloseProtcol, OpenProtocolInformation

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-22 23:09:13 +01:00
Heinrich Schuchardt
8d7cf39090 efi_selftest: remove todo in device path test
The installation of UninstallProtocol is functional now.
So we do not expect errors when calling it.

Call UninstallProtocol with correct level of indirection
for parameter handle.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-22 23:09:13 +01:00
Heinrich Schuchardt
77425e73b8 efi_selftest: remove todo in manage protocols
The installation of UninstallProtocols is functional now.
So we do not expect errors when calling it.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-22 23:09:13 +01:00
Heinrich Schuchardt
ad97373ba9 efi_loader: disconnect controllers in UninstallProtocol
The UninstallProtocol boot service should first try to
disconnect controllers that have been connected with
EFI_OPEN_PROTOCOL_BY_DRIVER.

If the protocol is still opened by an agent, it should be
closed.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-22 23:09:13 +01:00
Heinrich Schuchardt
3f9b00425a efi_loader: implement DisconnectController
Unfortunately we need a forward declaration because both
OpenProtocol and CloseProtocol have to call DisconnectController.
And DisconnectController calls both OpenProtcol and CloseProtocol.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-22 23:09:13 +01:00
Heinrich Schuchardt
3ebcd0071f efi_loader: fix signature of efi_disconnect_controller
Handles should be passed as efi_handle_t and not as void *.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-22 23:09:13 +01:00
Heinrich Schuchardt
f0959dbee2 efi_loader: implement ConnectController
Implement the ConnectController boot service.

A unit test is supplied in a subsequent patch.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-22 23:09:13 +01:00
Heinrich Schuchardt
d550414434 efi_loader: debug output installed device path
When a device path protocol is installed write the device
path to the console in debug mode.

For printing the new macro EFI_PRINT is used, which can be reused
for future diagnostic output.

Remove unused EFI_PRINT_GUID macro

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-22 23:09:13 +01:00
Heinrich Schuchardt
e3fbbc36f2 efi_loader: implement OpenProtocolInformation
efi_open_protocol_information provides the agent and controller
handles as well as the attributes and open count of an protocol
on a handle.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
[agraf: fix counting error]
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-22 23:09:13 +01:00
Heinrich Schuchardt
3b8a489c9f efi_loader: open_info in CloseProtocol
efi_open_protocol and efi_close_protocol have to keep track of
opened protocols.

Check if the protocol was opened for the same agent and
controller.

Remove all open protocol information for this pair.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-22 23:09:13 +01:00
Heinrich Schuchardt
191a41cc32 efi_loader: open_info in OpenProtocol
efi_open_protocol has to keep track of opened protocols.

OpenProtocol enters the agent and controller handle
information into this list.

A unit test is supplied with a subsequent patch.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-22 23:09:13 +01:00
Heinrich Schuchardt
fe1599daf5 efi_loader: list of open protocol infos
Add a list of open protocol infos to each protocol of a handle.

Provide helper functions to access the list items.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-22 23:09:13 +01:00
Heinrich Schuchardt
5be9744ae7 efi_selftest: do not try to close device path protocol
CloseProtocol cannot be called without agent handle.

There is no need to close the device path protocol if
it has been opened without agent handle.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-22 23:09:12 +01:00
Heinrich Schuchardt
32e6fed6e9 efi_loader: simplify efi_remove_all_protocols
Replace list_for_each_safe() and list_entry() by
list_for_each_entry_safe().

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-22 23:09:12 +01:00
Heinrich Schuchardt
853540c84f efi_selftest: colored test output
Add color coding to output:
test section    blue
success         green
errors          red
todo            yellow
summary         white
others          light gray

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
[agraf: Fold in move of set_attribute before the print]
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-22 23:09:12 +01:00
Heinrich Schuchardt
ac02019616 tools: provide a tool to convert a binary file to an include
For testing EFI disk management we need an in-memory image of
a disk.

The tool file2include converts a file to a C include. The file
is separated into strings of 8 bytes. Only the non-zero strings
are written to the include. The output format has been designed
to maintain readability.

 #define EFI_ST_DISK_IMG { 0x00010000, { \
  {0x000001b8, "\x94\x37\x69\xfc\x00\x00\x00\x00"}, /* .7i..... */ \
  {0x000001c0, "\x02\x00\x83\x02\x02\x00\x01\x00"}, /* ........ */ \
  {0x000001c8, "\x00\x00\x7f\x00\x00\x00\x00\x00"}, /* ........ */ \
  {0x000001f8, "\x00\x00\x00\x00\x00\x00\x55\xaa"}, /* ......U. */ \
 ...
  {0x00006000, "\x48\x65\x6c\x6c\x6f\x20\x77\x6f"}, /* Hello wo */ \
  {0x00006008, "\x72\x6c\x64\x21\x0a\x00\x00\x00"}, /* rld!.... */ \
  {0, NULL} } }

As the disk image needed for testing contains mostly zeroes a high
compression ratio can be attained.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-22 23:09:12 +01:00
Heinrich Schuchardt
727a1afb34 efi_loader: correctly call images
Avoid a failed assertion when an EFI app calls an EFI app.

Avoid that the indent level increases when calling 'bootefi hello'
repeatedly.

Avoid negative indent level when an EFI app calls an EFI app that
calls an EFI app (e.g. iPXE loads grub which starts the kernel).

Return the status code of a loaded image that returns without
calling the Exit boot service.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-22 23:09:12 +01:00
Heinrich Schuchardt
256060e425 vsprintf.c: add EFI device path printing
For debugging efi_loader we need the capability to print EFI
device paths. With this patch we can write:

    debug("device path: %pD", dp);

A possible output would be

    device path: /MemoryMapped(0x0,0x3ff93a82,0x3ff93a82)

This enhancement is not available when building without EFI support
and neither in the SPL nor in the API example.

A test is provided. It can be executed in the sandbox with command
ut_print.

The development for EFI support in the sandbox is currently in
branch u-boot-dm/efi-working. The branch currently lacks
commit 6ea8b580f0 ("efi_loader: correct DeviceNodeToText
for media types"). Ater rebasing the aforementioned branch on
U-Boot v2018.01 the test is executed successfully.

Without EFI support in the sandbox the test is simply skipped.

Suggested-by: Rob Clark <robdclark@gmail.com>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-22 23:09:12 +01:00
Heinrich Schuchardt
3c950b3178 efi_loader: text output for device path end node
Without the patch a device path consisting only of an end node is
displayed as '/UNKNOWN(007f,00ff)'. It should be displayed as '/'.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-22 23:09:12 +01:00
Heinrich Schuchardt
bc0bd77ed4 MAINTAINERS: correct entry for lib/efi*/
lib/efi* indicates files efi* in directory lib.
lib/efi*/ indicates all files in directories lib/efi*.

Fixes: 623b3a5797 efi_selftest: provide an EFI selftest application
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-22 23:09:12 +01:00
Heinrich Schuchardt
e0abeaccef efi_selftest: do not cut off u16 strings when printing
Device paths can be very long. Due to a limited output buffer
the output for device paths is cut off. We can avoid this by
directly calling the boottime service with the the device path
string.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
[agraf: Remove coloring code change]
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-22 23:09:12 +01:00
Heinrich Schuchardt
6a380e5b66 efi_selftest: avoid superfluous messages for task priority levels
In the task priority levels test debug output is written even if no
failure is detected.

Remove this distracting output.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-22 23:09:12 +01:00
Heinrich Schuchardt
ad50dcf8c7 efi_selftest: avoid superfluous messages for event services
In the event services test debug output is written even if no
failure is detected.

Remove this distracting output.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-22 23:09:12 +01:00
Heinrich Schuchardt
e540c48636 efi_loader: use correct format string for unsigned long
virt_size is of type unsigned long.
So it should be printed with %ul.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-22 23:09:12 +01:00
Heinrich Schuchardt
474a6f5aa1 efi_loader: add comments to memory functions
Add comments describing memory functions.

Fix the formatting of a function declaration.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-22 23:09:12 +01:00
Heinrich Schuchardt
05b6f56ead efi_loader: use wide string do define firmware vendor
As the U-Boot is compiled with -fshort-wchar we can define
the firmware vendor constant as wide string.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-22 23:09:12 +01:00
Heinrich Schuchardt
af3106a12d efi_loader: support device path for IDE and SCSI disks
Correctly create the device path for IDE and SCSI disks.

Support for SATA remains to be done in a future patch.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-22 23:09:12 +01:00
Heinrich Schuchardt
2bc61b8352 efi_loader: create full device path for block devices
When creating the device path of a block device it has to
comprise the block device itself and should not end at
its parent.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-22 23:09:12 +01:00
Tuomas Tynkkynen
8bad6cb176 fs: fat: Drop CONFIG_SUPPORT_VFAT
fat.h unconditionally defines CONFIG_SUPPORT_VFAT (and has done since
2003), so as a result VFAT support is always enabled regardless of
whether a board config defines it or not. Drop this unnecessary option.

Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
2018-01-22 16:43:31 -05:00
Tuomas Tynkkynen
e8df14d216 fs: FAT: Fix typo in FS_FAT_MAX_CLUSTSIZE description
Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
2018-01-22 16:43:31 -05:00
Tuomas Tynkkynen
3cd084d364 env: ENV_IS_IN_FAT improvements
Make it select FS_FAT as well, because if it's not selected, enabling
ENV_IS_IN_FAT causes a Kconfig warning:

warning: (ENV_IS_IN_FAT) selects FAT_WRITE which has unmet direct dependencies (FS_FAT)

This also allows dropping some code from config_fallbacks.

Also drop the unnecessary help text about having to enable
CONFIG_FAT_WRITE - Kconfig automatically handles that.

Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
2018-01-22 16:43:31 -05:00
Tuomas Tynkkynen
f1698a8cf5 ARM: poplar: Use Kconfig to enable CONFIG_FAT_WRITE
The symbol's been converted to Kconfig for a while, poplar is the only
one #defining it.

Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
2018-01-22 16:43:31 -05:00
Tuomas Tynkkynen
3d22bae57f fs: Migrate ext4 to Kconfig
Migrate the following symbols to Kconfig:

CONFIG_FS_EXT4
CONFIG_EXT4_WRITE

The definitions in config_fallbacks.h can now be expressed in Kconfig.

Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
2018-01-22 16:43:30 -05:00
Adam Ford
6574864df8 Convert CONFIG_ROCKCHIP_USB2_PHY to Kconfig
This converts the following to Kconfig:
   CONFIG_ROCKCHIP_USB2_PHY

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-01-22 16:43:30 -05:00
Adam Ford
b9b500b0f9 Convert CONFIG_OMAP_USB_PHY to Kconfig
This converts the following to Kconfig:
   CONFIG_OMAP_USB_PHY

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-01-22 16:43:30 -05:00
Adam Ford
3b9e2a2520 Convert CONFIG_TWL4030_USB to Kconfig
This converts the following to Kconfig:
   CONFIG_TWL4030_USB

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-01-22 16:43:30 -05:00
Adam Ford
26410c1517 Convert CONFIG_DAVINCI_SPI to Kconfig
This converts the following to Kconfig:
   CONFIG_DAVINCI_SPI

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-01-22 16:43:30 -05:00
Adam Ford
e13a9dc370 Convert CONFIG_USB_MUSB_HCD et al to Kconfig
This converts the following to Kconfig:
   CONFIG_USB_MUSB_HCD
   CONFIG_USB_MUSB_UDC
   CONFIG_USB_DAVINCI
   CONFIG_USB_OMAP3
   CONFIG_USB_DA8XX
   CONFIG_USB_AM35X

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-01-22 16:43:29 -05:00
Adam Ford
86362221fc Convert CONFIG_USB_MUSB_OMAP2PLUS et al to Kconfig
This converts the following to Kconfig:
   CONFIG_USB_MUSB_OMAP2PLUS
   CONFIG_USB_MUSB_AM35X
   CONFIG_USB_MUSB_DSPS
   CONFIG_USB_MUSB_PIO_ONLY

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-01-22 16:43:29 -05:00
Adam Ford
6931ab2fb4 ARM: omap3_logic: Enable SPL_OF_CONTROL and SPL_OF_PLATDATA
The SPL doesn't have much room, so in order to support OF_CONTROL
in SPL, we need the extra functionality of SPL_OF_PLATDATA.

Adding these features allows us to remove a small part of code without
losing the serial port during SPL.

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-01-22 10:27:13 -05:00
Tom Rini
998ae28799 travis-ci: Add qemu-x86_64 target
Add qemu-x86_64 to the list of targets we use for test.py runs.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-01-22 10:27:13 -05:00
Giulio Benetti
3900b45125 sunxi: Fix display timing flags
flags member of struct timing was not initialized,
this took to unpredictable behaviour of display flags,
such DISPLAY_FLAGS_HSYNC_HIGH instead of _LOW etc.

Init timing->flags = 0

Signed-off-by: Giulio Benetti <giulio.benetti@micronovasrl.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-22 13:53:08 +05:30
Benoît Thébaudeau
b9b4f146c9 mmc: fsl_esdhc: Fix i.MX53 eSDHCv3 clock
Commit 4f425280fa ("mmc: fsl_esdhc: Allow all supported prescaler
values") made it possible to set SYSCTL.SDCLKFS to 0 in SDR mode on
i.MX, thus bypassing the SD clock frequency prescaler, in order to be
able to get higher SD clock frequencies in some contexts. However, that
commit missed the fact that this value is illegal on the eSDHCv3
instance of the i.MX53. This seems to be the only exception on i.MX,
this value being legal even for the eSDHCv2 instances of the i.MX53.

Fix this issue by changing the minimum prescaler value for the single
instance of the i.MX53 eSDHCv3 controller.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau.dev@gmail.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-01-22 14:17:13 +09:00
Jaehoon Chung
9546eb92cb mmc: fix the wrong disabling clock
When power is off, clock is not disabling.
Because it's passed to 1, mmc->clock should be set to f_min value.
Some drivers can't initialize the eMMC/SD card with current status.

This patch is to fix the disabling clock value to 0.

Fixes: 2e7410d76a ("mmc: disable the mmc clock during power off")

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Tested-by: Guillaume GARDET <guillaume.gardet@free.fr>
Tested-by: Anand Moon <linux.amoon@gmail.com>
2018-01-22 14:15:34 +09:00
Masahiro Yamada
61f2e5ee12 mmc: sdhci: change data transfer failure into debug message
During the tuning, drivers repeat data transfer, changing timing
parameters in the controller hardware.  So, the tuning commands
(CMD19 for SD, CMD21 for eMMC) fail, and this is not a problem
at all.

Showing "Error detected..." in normal operation just make users
upset.  This should not be shown.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-01-22 14:11:58 +09:00
Masahiro Yamada
dd43e2a6bd mmc: sdhci-cadence: add HS200 support
Add HS200 timing setting and the MMC tuning callback.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
2018-01-22 14:11:58 +09:00
Masahiro Yamada
4041bf7f8a mmc: sdhci-cadence: call mmc_of_parse()
This is needed to parse more capabilities such as mmc-hs200-1_8v.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-01-22 14:11:58 +09:00
Masahiro Yamada
954a963146 mmc: sdhci-cadence: use bitfield access macros for cleanup
This driver is a counterpart from the one in Linux.  Follow the
clean-up I did in Linux.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-01-22 14:11:58 +09:00
Masahiro Yamada
be165fbbf1 mmc: sdhci: do not overwrite host_caps in sdhci_setup_cfg()
This line overwrites host_cap that has been set by drivers and/or
helpers like mmc_of_parse().  Accumulate capabilities flags.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-01-22 14:11:58 +09:00
Masahiro Yamada
4b28f7bc93 mmc: let mmc_of_parse() fail for insane bus-width value
You must fix your DT if it specifies insane bus-width, for example,
  bus-width = <3>;

debug() is not displayed in usual configuration, so people will not
even notice weirdness.  Use dev_err() instead, then let it fail.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-01-22 14:11:58 +09:00
Masahiro Yamada
c42ee367fd mmc: do not overwrite cfg->f_max if "max-frequency" if missing
mmc_of_parse() in U-Boot is a pussy helper; it sets cfg->f_max to
52MHz even if DT does not provide "max-frequency" at all.  This can
overwrite cfg->f_max that may have been set to a reasonable default.

As the DT binding says, "max-frequency" is an optional property.
Do nothing if DT does not specify it.  This is the behavior of
mmc_of_parse() in Linux.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-01-22 14:11:58 +09:00
Masahiro Yamada
3ab48f6223 dm: add dev_read_u32()
dev_read_u32_default() always returns something even when the property
is missing.  So, it is impossible to do nothing in the case.  One
solution is to use ofnode_read_u32() instead, but adding dev_read_u32()
will be helpful.

BTW, Linux has an equvalent function, device_property_read_u32();
it is clearer that it reads a property.  I cannot understand the
behavior of dev_read_u32() from its name.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-01-22 14:11:58 +09:00
Tom Rini
485c13c753 Merge git://git.denx.de/u-boot-dm 2018-01-21 20:13:29 -05:00
Mario Six
b79221a7d9 lib: fdtdec: Fix some style violations
Fix some style violations in fdtdec.c, and reduce the scope of some
variables.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-01-21 10:01:02 -07:00
Mario Six
2e38662dc6 lib: fdtdec: Fix whitespace style violations
Fix some whitespace-related style violations in fdtdec.c.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-01-21 10:01:02 -07:00
Mario Six
29d11b8838 core: Make device_is_compatible live-tree compatible
Judging from its name and parameters, device_is_compatible looks like it
is compatible with a live device tree, but it actually isn't.

Make it compatible with a live device tree.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-01-21 10:01:02 -07:00
Mario Six
147c607448 core: Add {ofnode, dev}_translate_address functions
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-01-21 10:01:02 -07:00
Mario Six
83a462a5e3 core: read: Fix style violations
There are some whitespace-related style violations in read.c; fix those.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-01-21 10:01:02 -07:00
Mario Six
51db287a14 core: ofnode: Fix style violations
There are some style violations in ofnode.c; fix those.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-01-21 10:01:02 -07:00
Mario Six
fcca9db819 clk: Makefile: Sort entries alphabetically
The Makefile entries in the clk driver directory were not alphabetically
sorted. Correct this.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-01-21 10:01:02 -07:00
Mario Six
7fe1b063d8 clk: Remove superfluous gd declarations
The clk uclass was converted to support a live device tree recently,
hence the global data pointer declarations are no longer needed.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-01-21 10:01:02 -07:00
Mario Six
e2db9e7a06 clk: clk_fixed_rate: Fix style violation
Fix a mis-indented function call in clk_fixed_rate.c

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-01-21 10:01:02 -07:00
Mario Six
268453be7c clk: clk-uclass: Fix style violations
checkpatch.pl complains that the clk_ops structures used in clk-uclass.c
ought to be const, so we mark them as const.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-01-21 10:01:02 -07:00
Peng Fan
0fe4e41825 dm: pinctrl: sync with Linux to use pin_config_param
Sync with Linux commit 30a7acd573899fd8b("Linux 4.15-rc6")
to use enum pin_config_param.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-21 10:01:02 -07:00
Stefan Brüns
d1ccaa4760 patman: Unquote output from get_maintainer.pl
get_maintainer.pl quotes names which it considers unsafe, i.e. anything
containing [^a-zA-Z0-9_ \-]. This confuses patman, it will duplicate
addresses which are also in Series-to/cc. Strip the quotes.

Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-21 10:01:02 -07:00
Mario Six
286ede6515 drivers: core: Add translation in live tree case
The function dev_read_addr calls ofnode_get_addr_index in the live tree
case, which does not apply bus translations to the address read from the
device tree. This results in illegal addresses on boards that rely on
bus translations being applied.

Fix this situation by applying bus translations in the live tree case as
well.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Tested-by: Stephen Warren <swarren@nvidia.com>
2018-01-21 10:01:02 -07:00
Heinrich Schuchardt
fa9335a89c dm: fix typo falback
%s/falback/fallback/g

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-21 10:01:02 -07:00
Tom Rini
557767ed29 Merge git://git.denx.de/u-boot-marvell 2018-01-20 08:39:47 -05:00
Tom Rini
c4cb6e64bf Merge git://git.denx.de/u-boot-arc 2018-01-19 16:07:36 -05:00
Faiz Abbas
e8b9fdced6 configs: keystone2: env: Fix burn_uboot_spi command
Now the u-boot spi image is greater than 0x90000, increase the same in
env during spi erase.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-01-19 15:49:33 -05:00
Tom Rini
cd87c4e3ef checkpatch: Ignore 'short' Kconfig help entries
A 2 line help entry for a new Kconfig entry is, at this time, sufficient
in some cases, so lets drop that warning for now.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-01-19 15:49:33 -05:00
Tuomas Tynkkynen
7dd97af523 powerpc: Drop unreferenced CONFIG_* defines
The following config symbols are only defined once and never referenced
anywhere else:

CONFIG_CYRUS
CONFIG_IDS8313
CONFIG_MPC8308_P1M
CONFIG_MPC8308RDB
CONFIG_MPC8349EMDS
CONFIG_MPC8349ITXGP
CONFIG_SBC8349
CONFIG_SBC8548
CONFIG_SBC8641D
CONFIG_TQM834X
CONFIG_VE8313
CONFIG_XPEDITE5140
CONFIG_XPEDITE5200
CONFIG_XPEDITE550X

Most of them are config symbols named after the respective boards which
seems to have been a standard practice at some point.

Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
Acked-by: Mario Six <mario.six@gdsys.cc>
2018-01-19 15:49:32 -05:00
Patrice Chotard
aea0af8993 configs: stm32: move config flag from defconfig to Kconfig
Move system flags from defconfig to mach-stm32/Kconfig

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Vikas Manocha <vikas.manocha@st.com>
2018-01-19 15:49:32 -05:00
Patrice Chotard
ae74de0dfd serial: stm32: Rename serial_stm32x7.c to serial_stm32.c
Now this driver is used across stm32f4, stm32f7 and stm32h7
SoCs family, give it a generic name.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Vikas Manocha <vikas.manocha@st.com>
2018-01-19 15:49:32 -05:00
Tuomas Tynkkynen
e6e5ecc5e2 m68k: Drop unreferenced CONFIG_* defines
The following config symbols are only defined once and never referenced
anywhere else:

CONFIG_AMCORE
CONFIG_ASTRO5373L
CONFIG_M52277EVB
CONFIG_M5253DEMO
CONFIG_M5253EVBE
CONFIG_M5275EVB
CONFIG_M54418TWR
CONFIG_STMARK2

Most of them are config symbols named after the respective boards which
seems to have been a standard practice at some point.

Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
2018-01-19 15:49:32 -05:00
Tuomas Tynkkynen
557017386b nds32: Drop unreferenced CONFIG_ADP_AG101P
Seems to be again one of those CONFIG_ symbols named after a board, with
nothing referencing it.

Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
2018-01-19 15:49:31 -05:00
Tuomas Tynkkynen
7e477755b1 pcmcia: Drop a bunch of unused CONFIG_SYS_PCMCIA_ macros
Last users of the following macros (for n = 0..7) were removed in
commit 5b8e76c35e ("powerpc, 8xx: remove support for 8xx"):

CONFIG_SYS_PCMCIA_PBRn
CONFIG_SYS_PCMCIA_PORn

Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
2018-01-19 15:49:31 -05:00
Tuomas Tynkkynen
a5bee50720 Travis-CI: Add job for running test.py on qemu_arm64
The corresponding changes in the uboot-test-hooks repo are:

https://github.com/swarren/uboot-test-hooks/pull/15

Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-01-19 15:49:31 -05:00
Tuomas Tynkkynen
1b012a3e7b Travis-CI: Download ARM64 version of GRUB as well
For preparation of adding AArch64 test.py jobs.

Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-01-19 15:49:31 -05:00
Tuomas Tynkkynen
e7ba41c653 ARM: Document AArch64 version of qemu-arm
It's mostly obvious, except that QEMU is annoying and requires an
explicit '-cpu cortex-a57' (or some other 64-bit core) to actually run
in 64-bit mode.

While at it, remove the references to setting the ARCH environment
variable; that is not used in U-Boot.

Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-01-19 15:49:31 -05:00
Tuomas Tynkkynen
ddcca73051 ARM: qemu-arm: Add support for AArch64
This adds support for '-machine virt' on AArch64. This is rather simple:
we just add TARGET_QEMU_ARM_xxBIT to select a few different Kconfig
symbols, provide the ARMv8 memory map from the board file and add a new
defconfig based on the 32-bit defconfig.

Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-01-19 15:49:30 -05:00
Andrew F. Davis
6b3d4f3def arm: mach-omap2: Remove secure certificate name printing
The signing certificate name is always 15 chars long, but need not be
null terminated. One solution is then to use printf precision modifiers
to only print this many chars ("%.15s"), but tiny printf does not support
this, so lets just drop printing the cert name for now.

Signed-off-by: Andrew F. Davis <afd@ti.com>
2018-01-19 15:49:30 -05:00
Madan Srinivas
fbd23b9b94 arm: am33xx: security: Fix size calculation on header
Fix the size calculation in the verify boot. The header size
should be subtracted from the image size, not be assigned to
the image size.

Fixes: 0830d72bb9 ("arm: am33xx: security: adds auth support for encrypted images")
Signed-off-by: Madan Srinivas <madans@ti.com>
Signed-off-by: Dan Murphy <dmurphy@ti.com>
Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-01-19 15:49:30 -05:00
Drew Moseley
0d8c1df8d8 rpi_0_w: Add configs consistent with RpI3
CONFIG_OF_EMBED in particular is needed to allow the Raspberry Pi
firmware to pass the DTB to U-Boot and on to the kernel.

Signed-off-by: Drew Moseley <drew.moseley@northern.tech>
2018-01-19 15:49:30 -05:00
Derald D. Woods
a47ca2cf67 ARM: omap3: evm: Add kernel image loading from UBIFS and EXT4
This commit adds UBIFS_NAND to BOOT_TARGET_DEVICES. This will
allow the kernel zImage to be loaded from '/boot/zImage' in UBIFS
(ubi0:rootfs).

Additionally update the *_MMC devices to also load kernel image from
the MMC 0:2 EXT4 file system.

DISTRO_DEFAULTS Setup

=====================

[primary] Check MMC 0:1 for /extlinux/extlinux.conf and boot
[fallback 1] Check MMC 0:2 /boot/zImage and run mmcbootz
[fallback 2] Check MMC 0:2 /boot/uImage and run mmcboot
[fallback 3] Check NAND UBIFS /boot/zImage and run nandbootubifs
[fallback 4] Check NAND partitions and run nandboot

The following "extlinux.conf" can be used to load images in the
top-level of the MMC 0:1 FAT partition.

[MMC(0:1)/extlinux/extlinux.conf]
---8<-------------------------------------------------------------------
default omap3-evm
label omap3-evm
	kernel /zImage
	fdt /omap3-evm.dtb
	append console=ttyO0,115200n8 root=/dev/mmcblk0p2 rw rootfstype=ext4 rootwait
---8<-------------------------------------------------------------------

Signed-off-by: Derald D. Woods <woods.technical@gmail.com>
2018-01-19 15:49:30 -05:00
Heinrich Schuchardt
7341714d6e board_r: remove superfluous #ifdef CONFIG_PRAM
initr_mem() is already enclosed by
	#if defined(CONFIG_PRAM)
	#endif

So there is no need to check CONFIG_PRAM again inside the
function.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-19 15:49:29 -05:00
Tom Rini
bb2277b3ee GPIO: tca642x: Rework to not include commands in SPL
The command portion of the GPIO driver can only be used in full SPL so
re-work to guard the command related portions and mark it as static.

Cc: Dan Murphy <dmurphy@ti.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-01-19 15:49:29 -05:00
Tom Rini
0d097b774d GPIO: pca953x: Rework to not include commands in SPL
The command portion of the GPIO driver can only be used in full SPL so
re-work to guard the command related portions and mark it as static.

Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-19 15:49:29 -05:00
Klaus Goger
7e37a88465 cmd: pmic: update help description
Change help description to match the style of the other U-Boot commands
and get rid of the leading whitespace.

Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
2018-01-19 15:49:29 -05:00
Heinrich Schuchardt
d2f7158028 fs/fat: remove distractive message in file_fat_read_at()
The message "reading %s\n" may be interesting when
debugging but otherwise it is superfluous.

Only output the message when debugging.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-19 15:49:28 -05:00
Heinrich Schuchardt
a327bde783 fs: remove distractive message in fs_read()
The message
"** %s shorter than offset + len **\n"
may be interesting when debugging but it does not indicate an
error.

So we should not write it if we are not in debug mode.

Fixes: 7a3e70cfd8 fs/fs.c: read up to EOF when len would read past EOF
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-19 15:49:28 -05:00
Adam Ford
3cf0061ab5 DA850evm: Remove dead code
There is an #ifdef and #endif with nothing in between.  This patch simply
removes this dead/useless code.

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-01-19 15:49:28 -05:00
Derald D. Woods
4b37928d35 ARM: dts: omap3-beagle{-xm}: Enable DM and devicetree for BeagleBoard
This commit updates the configuration files needed to support OF_CONTROL
on the OMAP3 BeagleBoard(s).
2018-01-19 15:49:28 -05:00
Derald D. Woods
3ff0d80181 ARM: dts: omap3-beagle{-xm}: Add support for BeagleBoard
This commit adds OMAP3 BeagleBoard devicetree files from
Linux v4.15-rc5. This includes standard OMAP34XX board revisions as
well as the 'xM' which is OMAP36XX.

Signed-off-by: Derald D. Woods <woods.technical@gmail.com>
2018-01-19 15:49:28 -05:00
Lokesh Vutla
3741c044cb env: ti: Select dtb name for dra76x and am574
Select dtb name for am574x-idk and dra76x evm with acd package.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-01-19 15:49:27 -05:00
Lokesh Vutla
b4185e4fef ARM: dts: am574x-idk: Add initial support
Add initial dts support for am574x-idk

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-01-19 15:49:27 -05:00
Lokesh Vutla
1f126897d8 board: ti: am57xx: Enable CMD_DDR3
Enable CMD_DDR3 on all am57xx based platforms.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-01-19 15:49:27 -05:00
Lokesh Vutla
443b0df361 board: ti: am574x-idk: Update pinmux using latest PMT
Update the board pinmux for AM574x-IDK board using latest PMT[1] and the
board files named am574x_idk_v1p3b_sr2p0 that were auto generated on
13th October, 2017 by "Ahmad Rashed <a-rashed@ti.com>".

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-01-19 15:49:27 -05:00
Lokesh Vutla
7b16de8595 board: ti: am574x-idk: Add ddr data support
AM574x-idk has the following DDR parts attached:
EMIF1: MT41K256M16HA (1GB with ECC)
EMIF2: MT41K256M16HA (1GB without ECC)

Enabling 2GB DDR without interleaving between EMIFs. And
enabling ECC on EMIF1.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Krunal Bhargav <k-bhargav@ti.com>
2018-01-19 15:49:27 -05:00
Lokesh Vutla
10f430f3f1 board: ti: am574x-idk: Add hw data support
Update prcm, voltages and pinmux support for am574x-idk.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-01-19 15:49:26 -05:00
Lokesh Vutla
9646b95f64 board: ti: am574x-idk: Add epprom support
am574x-idk is a board based on TI's am574 processor
Add eeprom support.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-01-19 15:49:26 -05:00
Lokesh Vutla
941f2fcc5b arm: dra762: Add support for device package identification
DRA762 comes in two packages:
- ABZ: Pin compatible package with DRA742 with DDR@1333MHz
- ACD: High performance(OPP_PLUS) package with new IPs

Both the above packages uses the same IDCODE hence needs to
differentiate using package information in DIE_ID_2.
Add support for the same. Also update clock, ddr, emif information.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-01-19 15:49:26 -05:00
Lokesh Vutla
8a8af8a2fd cmd: ti: Generalize cmd_ddr3 command
Keystone and DRA7 based TI platforms uses same
EMIF memory controller. cmd_ddr3 command is customized
for keystone platforms, make it generic so that it can
be re used for DRA7  platforms.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-01-19 15:49:26 -05:00
Lokesh Vutla
5cd9661dc6 arm: keystone: Move cmd_ddr3 to a common place
Move cmd_ddr3 to cmd/ti in order to make
it build for non-keystone TI platforms.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
[trini: Rename to ddr3.c not cmd_ddr3.c]
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-01-19 15:49:26 -05:00
Lokesh Vutla
650fda93c8 arm: emif-common: Add suppport for enabling ECC
For data integrity, the EMIF1 supports ECC on the data
written or read from the SDRAM. Add support for enabling
ECC support in EMIF1.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Krunal Bhargav <k-bhargav@ti.com>
2018-01-19 15:49:25 -05:00
Lokesh Vutla
e18cd3d796 arm: emif-common: Add ecc specific emif registers
This is a slight difference in emif_ddr_phy_status register offsets for
DRA7xx EMIF and older versions. And ecc registers are available only
in DRA7xx EMIC. Add support for this difference and ecc registers.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-01-19 15:49:25 -05:00
Tero Kristo
72b7af5a04 drivers: dma: ti-edma3: add support for memory fill
Add support for simple memory fill operation. With large data sizes
it is much faster to use EDMA for memory fill rather than CPU.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
2018-01-19 15:49:25 -05:00
Felix Brack
445277b9d1 dt-bindings: leds: adopt Linux PCA9532 binding constants
I'm working on a v2 patch to add support for a board named pdu001. Its
Linux DTS file uses the include file added by this patch. To keep Linux
and U-Boot DTS files in sync U-Boot requires a copy of this file,
although there is no driver for NXP's PCA9532 i2c LED driver chip (yet).

Signed-off-by: Felix Brack <fb@ltec.ch>
2018-01-19 15:49:25 -05:00
Lokesh Vutla
f1627bdc19 board: ti: k2g: Make ddr3* declarations as static
All ddr3_emif declarations are not used outside ddr3_k2g.c
file. So make all of them as static.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-01-19 15:49:25 -05:00
Tomi Valkeinen
8d0dcbf212 board: ti: dra76: mux wakeup2 as gpio1_2
gpio1_2 is used for HPD interrupt with DRA76's DVI add-on board, so mux
the pin as gpio and PIN_INPUT.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
2018-01-19 15:49:24 -05:00
Lokesh Vutla
9b88a4bda2 arm: am33xx: Avoid writing into reserved DPLL divider
DPLL DRR doesn't have an M4 divider. But the clock driver is trying
to configure M4 divider as 4(writing into a reserved register).
Fixing it by making M4 divider as -1.

Reported-by: Steve Kipisz <s-kipisz2@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-01-19 15:49:24 -05:00
Lokesh Vutla
3a0e70f181 tools: omapimage: Fix mismatch of image size in header
The size field in GP header that is expected by ROM is size of the
image + size of the header. But omapimage tool is updating size
as image size + 2 * header size. Remove this extra header size bytes.

Reported-by: Denys Dmytriyenko <denys@ti.com>
Debugged-by: Madan Srinivas <madans@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-01-19 15:49:24 -05:00
Rex Chang
4849d95407 board: ti: K2G FC SoC 1GHz and DDR3 1066 MT/s support
Added support for K2G EVM with FlipChip SoC of which
ARM/DDR3 runs at 1GHz/1066 MT/s. The patch is also
backward compatible with old revision EVM and EVM
with WireBond SoC. Their ARM/DDR3 run at 600MHz/800 MT/s.

The new SoC supports 2 different speeds at 1GHz and 600MHz.
Modyfied the CPU Name to show which SoC is used in the EVM.
Modified the DDR3 configuration to reflect New SoC supports
2 different CPU and DDR3 speeds, 1GHz/1066MT and 600MHz/800MT.

Added new inline function board_it_k2g_g1() for the new FlipChip 1GHz,
and set the u-boot env variable board_name accordingly.

Modified findfdt script in u-boot environment variable to include new k2g board type.

Signed-off-by: Rex Chang <rchang@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-01-19 15:49:24 -05:00
Lokesh Vutla
19f3feaed1 configs: k2g_evm: Allocate more space for u-boot
Now that we have multi dtb enabled in u-boot allocate
128K space for u-boot.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-01-19 15:49:24 -05:00
Vignesh R
e36edcec0a board: ti: dra7xx: Select MCAN instead of DCAN on DRA76 EVM
MCAN can be accessed via DCAN1 or DCAN2. Determining which DCAN instance
to use if any at all is done through
CTRL_CORE_CONTROL_SPARE_RW.SEL_ALT_MCAN. Since general pinmuxing is
handled in U-boot. Handle this additional pinmuxing requirement in U-boot
to ensure that MCAN is used by default via the DCAN1 pins.

Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Vignesh R <vigneshr@ti.com>
[fcooper@ti.com: Update commit message and use DCAN1 not DCAN2 for MCAN]
Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
2018-01-19 15:49:23 -05:00
Kishon Vijay Abraham I
29171dcfaa mmc: omap_hsmmc: Fix incorrect bit operations for disabling a bit
omap_hsmmc driver uses "|" in a couple of places for disabling a bit.
While it's okay to use it in "mmc_reg_out" (since mmc_reg_out has a
_mask_ argument to take care of resetting a bit), it's incorrectly used
for resetting flags in "omap_hsmmc_send_cmd".

Fix it here by using "&= ~()" to reset a bit.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-01-19 15:49:23 -05:00
Kishon Vijay Abraham I
866bb98468 mmc: omap_hsmmc: Enable Auto command (CMD12) enable
Instead of sending STOP TRANSMISSION command from MMC core, enable
the auto command feature so that the Host Controller issues CMD12
automatically when last block transfer is completed.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-01-19 15:49:23 -05:00
Kishon Vijay Abraham I
f0d53e88a6 mmc: omap_hsmmc: Add support for DMA (ADMA2)
The omap hsmmc host controller can have the ADMA2 feature. It brings better
read and write throughput.
On most SOC, the capability is read from the hl_hwinfo register. On OMAP3,
DMA support is compiled out.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-01-19 15:49:17 -05:00
Chris Packham
672e559830 ddr: marvell: update ddr controller init and freq
Update the calculation for tWR and tPD. This improves the DDR refresh
interval and brings the initialization into line with the binary blobs
currently being supplied by Marvell.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-01-19 16:30:29 +01:00
Chris Packham
8bddf678db ddr: marvell: update additional ODT setting
The RD_SAMPLE_DELAY field is 5 bits so it needs to be masked with 0x1f
instead of 0xf. Rather than checking the read sample delay for all DDR
chip selects use the values for the chip selects that are actually
configured. Finally continue searching for the max_phase value even if the
current read_sample is the same as the max_read_sample.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-01-19 16:30:29 +01:00
Chris Packham
2efd27f76a ddr: marvell: use correct TREFI value
The ternary operation had the HIGH/LOW values the
wrong way round. Update it to use the correct value.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-01-19 16:30:29 +01:00
Chris Packham
dbaf09590d ddr: marvell: only assert M_ODT[0] on write for a single CS
When using only a single DDR chip select only assert M_ODT[0] on write.
Do not assert it on read and do not assert M_ODT[1] at all. Also set
tODT_OFF_WR to 0x9 which contradicts the recommendation from the
functional spec but is what Marvell's binary training blob does and
seems to give better results when ODT is active during writes.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-01-19 16:30:29 +01:00
Alexey Brodkin
8f44e1ee79 ARC: devboards: Allow huge uImages (up to 128 MiB)
Even though in production uImage usually is quite small as
it contains just Linux kernel image during development it might
be pretty convenient to have root-FS built into the same image.

That makes uImage much larger but given on our dev platforms we have
quite a lot of DDR (> 512 MiB) we may afford loading huge uImages.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-01-19 17:59:35 +03:00
Eugeniy Paltsev
c0e6769a82 ARC: Invalidate instruction and data caches early on boot
This is useful to make sure no stale data exists in caches after bootloaders.

The worst thing could be some lines of cache were locked in a bootloader
for example during DDR recalibration and never unlocked. This may lead
to really unpredictable issues later down the line.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-01-19 17:59:35 +03:00
Eugeniy Paltsev
7897f4e54c ARC: HSDK: DTS: Add cgu-clk node
Add cgu-clk (clock generation unit) node to HSDK device tree.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-01-19 17:59:35 +03:00
Eugeniy Paltsev
320c8a1a86 ARC: HSDK: CGU: Add 'Hz' when printing clock frequency
Add 'Hz' when printing clock frequency in error messages.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-01-19 17:59:35 +03:00
Eugeniy Paltsev
f6d7812d8d ARC: HSDK: CGU: Use plat data instead of priv data
Correctly allocate hsdk_cgu_clk private data structure using
priv_auto_alloc_size instead of platdata_auto_alloc_size.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-01-19 17:59:35 +03:00
Eugeniy Paltsev
075cbae163 ARC: HSDK: CGU: Update AXI, TUN, ARC clock options
Update default AXI, TUN, ARC clock set options:
instead of changing only IDIV divider settings adjust also domain PLL
settings.

Add support of TUN_ROM and TUN_PWM clocks (subclocks of TUNN_PLL)

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-01-19 17:59:35 +03:00
Eugeniy Paltsev
5aec2569a6 ARC: HSDK: Hang on panic
As HSDK is a development board it is better to hang on panic instead of
reset the board when panic occurs. That way we preserve a state of HW
for possibility to do post-mortem debug via JTAG.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-01-19 17:59:35 +03:00
Eugeniy Paltsev
19b10a42f6 ARC: Cache: Fix style violations reported by checkpatch
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-01-19 17:59:35 +03:00
Eugeniy Paltsev
b0146f9e29 ARC: Cache: Disable IOC by default
We'd like to keep IOC HW at the same state as t is right after reset when we
start Linux kernel so there will be no re-configuration of IOC on the go.

The point is U-Boot doesn't benefit a lot from IOC as it doesn't do a
lot of DMA operations especially on multiple cores simultaneously.

At the same time re-configuration of IOC in run-time might become quite
a tricky experience because we need to make sure there're no DMA
trannsactions in flight otherwise unexpected consequencses might affect
us much later and debugging those kinds of issues will be a real
nightmare.

That said let's make our life easier a little bit.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-01-19 17:59:34 +03:00
Eugeniy Paltsev
41cada4d24 ARC: ARCv2: Cache: Fixed operation without IOC
Previous SLC management implementation is broken. Seems like it was
never sufficiently tested probably because most of the time IOC was used
instead (i.e. no manual cache operations were done).

Now if we disable IOC in U-boot we'll get a lot of errors while using
DMA-enabled peripherals.

This time we fix it by substitution of broken per-line SLC operations
region operations as it is done in the Linux kernel (we took it from
v4.14 which is the latest stable as of today).

Among other things this implementation might be a bit faster because
instead of iteration over each and every cache line we're taking care
about entire region in one go.

Main changes:
 * Replaced __slc_line_op (per line operations) by __slc_rgn_op
   (region operations).

 * Reworked __slc_entire_op to get rid of __after_slc_op and
   __before_slc_op functions.
   Note flush fix (flush only instead of flush-n-inv when OP_FLUSH is
   used, see [1] for more details) is already incorporated here.

 * Added SLC invalidation to invalidate_icache_all().

 * Added (start >= end) check to invalidate_dcache_range() and
   flush_dcache_range() as some buggy drivers pass region start == end.

 * Added read-out of MMU BCR so we may know if PAE40 exists in HW and then
   act on a particular AUX regs accordingly.

[1] http://lists.infradead.org/pipermail/linux-snps-arc/2018-January/003357.html

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-01-19 17:59:34 +03:00
Jean-Jacques Hiblot
f844d5f4e6 omap: Update the base address of the MMC controllers
Align the base address defined in header files with the base address used
in the DTS. This will facilitate the introduction of the DMA support.

Of all HSMMC users, only omap3 doesn't have the 0x100 reserved region at
the top. This region will be used to determine if the controller supports
DMA transfers

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-01-18 22:04:21 -05:00
Jean-Jacques Hiblot
741726ae4c Revert "omap_hsmmc: update struct hsmmc to accommodate omap3 from DT"
This reverts commit 46831c1a4c.
This reserved area at the beginning of struct hsmm, will be used later to
support ADMA

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-01-18 22:04:21 -05:00
Tom Rini
086ebcd40e Merge git://git.denx.de/u-boot-fsl-qoriq 2018-01-17 13:48:35 -05:00
Ashish Kumar
2eb2dbd457 armv8: ls1088ardb: Add environment variable address location for QSPI-NOR
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-17 10:30:54 -08:00
Ashish Kumar
b500c92b70 env: sf: Add support for env init for QSPI-NOR
ENV variables can now be used before relocation.

Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-17 10:30:54 -08:00
Ashish Kumar
134200a5ef armv8: ls1088: Add USB and PCI configs in SD-BOOT defconfig
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-17 10:30:54 -08:00
Yuantian Tang
ae02cf03bc arm64: ls1012a: Add sata distro boot support
Sata is equipped on ls1012a and can be a boot source. Add sata boot
support as an option if available.

Signed-off-by: Tang Yuantian <andy.tang@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-17 10:30:54 -08:00
Yuantian Tang
f216ef252e arm64: ls1046a: Add sata distro boot support
Sata is equipped on ls1046a and can be a boot source. Add sata boot
support as an option if available.

Signed-off-by: Tang Yuantian <andy.tang@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-17 10:30:54 -08:00
Tom Rini
1f0ce3259e freescale: Ensure common commands are not included in SPL binary
Both the "qixis_reset" and esbc_validate" commands can only be used in
full U-Boot so do not build them in SPL.  As part of this rework the
qixis code to declare things as static and make use of __weak for
function aliases.

Cc; York Sun <york.sun@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-17 10:30:45 -08:00
Tom Rini
3759df0c08 tools: Update python "help" tests to cope with "more" oddities
In some cases when "more" is told to page a given file it will prepend
the output with:
::::::::::::::
/PATH/TO/THE/FILE
::::::::::::::

And when this happens the output will not match the expected length.
Further, if we use a different pager we will instead fail the coverage
tests as we will not have 100% coverage.  Update the help test to remove
the string in question.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-01-16 16:15:25 -05:00
Tom Rini
23b4cf32b7 Merge git://git.denx.de/u-boot-i2c 2018-01-16 10:13:38 -05:00
Tom Rini
da54e7e5a9 Merge git://git.denx.de/u-boot-dm 2018-01-16 10:12:40 -05:00
Peng Fan
fb0128736b i2c: mxc_i2c: Use or operation
The operation should be OR, not BIT OR.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
2018-01-16 06:59:39 +01:00
Peng Fan
34b0af8390 imx: mx7ulp: modify lpi2c seq number
Modify the lpi2c alias seq number to align with device.
Then no need to add 4 to get the device index.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2018-01-16 06:59:15 +01:00
Peng Fan
0074d4bf2d i2c: lpi2c: do not add 4 for bus seq
The number 4 is dedicated on i.MX7ULP, but lpi2c will be reused on i.MX8,
4 is not valid. The seq number could be configured by alias node.

The following patch will use i2c4 as the begin for i.MX7ULP.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2018-01-16 06:58:59 +01:00
Simon Glass
ed772fe79b test: Set the DTC environment variable
Set this to our own device-tree compiler since we know it is new enough to
run the tests.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-01-15 18:29:21 -07:00
Simon Glass
3ed0de31b4 dtoc: Allow DTC environment variable to provide path to dtc
The system device-tree compiler may not be new enough to run the tests we
use in U-Boot (e.g. with binman). Allow use of a DTC environment variable
to point to the correct dtc. If not defined, the dtc on the default PATH
is used.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-01-15 18:29:21 -07:00
Andre Przywara
4d4db83d18 armv8: secure firmware: fix incorrect unit address in node name
The DT spec demands a unit-address in a node name to match the "reg"
property in that node. Newer dtc versions will throw warnings if this is
not the case.
Remove the unit address from the config node name when U-Boot deals with
secure firmware FIT images.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2018-01-15 18:29:21 -07:00
Andre Przywara
2eda8e9aad tools: fix incorrect usage of DT node unit address
The DT spec demands a unit-address in a node name to match the "reg"
property in that node. Newer dtc versions will throw warnings if this is
not the case.
Correct the generated unit names when U-Boot's mkimage creates a FIT
image.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2018-01-15 18:29:21 -07:00
Andre Przywara
8837af154c sunxi: arm64: correct usage of DT node address in FIT generation
The DT spec demands a unit-address in a node name to match the "reg"
property in that node. Newer dtc versions will throw warnings if this is
not the case.
Adjust the FIT build script for 64-bit Allwinner boards to remove the
bogus addresses from the node names and avoid the warnings.
This avoids a warning with recent versions of the dtc tool.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2018-01-15 18:29:21 -07:00
Andre Przywara
b2267e8a22 fix incorrect usage of DT node unit address in comments
The DT spec demands a unit-address in a node name to match the "reg"
property in that node. Newer dtc versions will throw warnings if this is
not the case.
Fix all occurences in the tree where node names were mentioned in
comments, to not give bad examples to the reader.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2018-01-15 18:29:21 -07:00
Andre Przywara
971a54193c doc: fix incorrect usage of DT node unit address
The DT spec demands a unit-address in a node name to match the "reg"
property in that node. Newer dtc versions will throw warnings if this is
not the case.
Fix all occurences in various documentation files where this was not
observed, to not give bad examples to the reader.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2018-01-15 18:29:21 -07:00
Andre Przywara
b8790ebeec doc: FIT image: fix incorrect examples of DT node unit address
The DT spec demands a unit-address of a node name to match the "reg"
property in that node. Newer dtc versions will throw warnings if this is
not the case.
Fix all occurences in the FIT image example files where this was not
observed, to not give bad examples to the reader.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2018-01-15 18:29:21 -07:00
Andre Przywara
838404054e doc: FIT image: fix incorrect description of DT node unit address
The DT spec demands a unit-address in a node name to match the "reg"
property in that node. Newer dtc versions will throw warnings if this is
not the case.
Fix all occurences in the FIT image documentation files where this was not
observed, to not give bad examples to the reader.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2018-01-15 18:29:21 -07:00
Simon Glass
30d704c645 binman: Run code coverage tests
Binman has 100% test coverage for the code as it is at present. To
encourage it to stay that way, run the code-coverage test as part of the
normal U-Boot tests.

This is RFC because it requires the Python code coverage tools to be
available.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-01-15 18:29:21 -07:00
Simon Glass
f2d0778885 travis.yml: Run tests for tools
Run tests for the Python tools used by U-Boot.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-01-15 18:29:21 -07:00
Simon Glass
00f6c800b5 test: Run dtoc tests
Update the test script to run the dtoc tests also.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-01-15 18:29:21 -07:00
Simon Glass
34ba7d777d test: Run buildman tests
Update the test script to run the buildman tests also.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-01-15 18:29:21 -07:00
Simon Glass
adb5b61612 test: Run patman tests
Update the test script to run the patman tests also.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-01-15 18:29:21 -07:00
Simon Glass
72d8172be0 test: Run binman tests
Update the test script to run the binman tests also.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-01-15 18:29:21 -07:00
Tom Rini
fdb6c3232f Merge git://git.denx.de/u-boot-net 2018-01-15 19:01:23 -05:00
Tom Rini
8e9801c283 Merge git://git.denx.de/u-boot-imx 2018-01-15 16:44:18 -05:00
Rob Clark
a970ee2257 db410c: on aarch64 the fdtfile is in per-vendor subdirectory
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-01-15 16:29:04 -05:00
Rob Clark
35bdd839d0 db410c: add reserved-memory node to dts
If lk lights up display and populates simple-framebuffer node, it will
also setup a reserved-memory node (needed by simplefb on linux).  But
it isn't clever enough to cope when the reserved-memory node is not
present.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-01-15 16:29:04 -05:00
Jorge Ramirez-Ortiz
9337dfb434 db410c: use the device tree parsed by the lk loader.
We dont need to keep copies of the properties that we are going to
fixup since we will be using the dtb provided by the firmware.

Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
2018-01-15 16:29:03 -05:00
Rob Clark
3b595da441 fdtdec: allow board to provide fdt for CONFIG_OF_SEPARATE
Similar to CONFIG_OF_BOARD, but in this case the fdt is still built by
u-boot build.  This allows the board to patch the fdt, etc.

In the specific case of dragonboard 410c, we pass the u-boot generated
fdt to the previous stage of bootloader (by embedding it in the
u-boot.img that is loaded by lk/aboot), which patches the fdt and passes
it back to u-boot.

Signed-off-by: Rob Clark <robdclark@gmail.com>
[trini: Update board_fdt_blob_setup #if check]
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-01-15 16:29:03 -05:00
Jorge Ramirez-Ortiz
0689eb7470 db410c: replace reset driver with psci
this should be the norm for armv8 platforms.

Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
2018-01-15 16:29:03 -05:00
Jorge Ramirez-Ortiz
e2beb872f7 db410c: update wlan and bt mac addresses from firmware
The firmware that runs before u-boot modifies u-boot's device tree
adding the local-mac-address and local-bd-address properties for the
compatibles "qcom,wcnss-bt" and "qcom,wcnss-wlan".

This commit reads that firmware, retrieves the properties and fixups
the device tree that is passed to the kernel before booting.

Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
2018-01-15 16:29:03 -05:00
Jorge Ramirez-Ortiz
5bef39982a db410c: configs: increase gunzip buffer size for the kernel
the kernel fails to boot when it goes over the limit.

Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
2018-01-15 16:29:03 -05:00
Jorge Ramirez-Ortiz
100fb0bd99 db820c: stop autoboot when vol- pressed
Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
2018-01-15 16:29:02 -05:00
Jorge Ramirez-Ortiz
e0cc0b6c6d db820c: enable pmic gpios for pm8994
Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
2018-01-15 16:29:02 -05:00
Jorge Ramirez-Ortiz
4b684a6b82 db820c: add qualcomm dragonboard 820C support
This commit adds support for 96Boards Dragonboard820C.

The board is based on APQ8086 Qualcomm Soc, complying with the
96Boards specification.

Features
 - 4x Kyro CPU (64 bit) up to 2.15GHz
 - USB2.0
 - USB3.0
 - ISP
 - Qualcomm Hexagon DSP
 - SD 3.0 (UHS-I)
 - UFS 2.0
 - Qualcomm Adreno 530 GPU
 - GPS
 - BT 4.2
 - Wi-Fi 2.4GHz, 5GHz (802.11ac)
 - PCIe 2.0
 - MIPI-CSI, MIPI-DSI
 - I2S

U-Boot boots chained from LK (LK implements the fastboot protocol) in
64-bit mode.

For detailed build instructions see readme.txt in the board directory.

Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
2018-01-15 16:29:02 -05:00
Jorge Ramirez-Ortiz
7c75f7f1b2 arm: mach-snapdragon: refactor clock driver
In preparation to add support for the Dragonboard820c (APQ8096),
refactor the current Snapdragon clock driver.

No new functionality has been added.

Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
2018-01-15 16:29:02 -05:00
Jorge Ramirez-Ortiz
1087a7942c env: enable accessing the environment in an EXT4 partition
For example to store the environment in a file named "/uboot.env" in MMC
"0", where partition "1" contains the EXT4 filesystem, the following
configs should be added to the board's default config:

  CONFIG_ENV_IS_IN_EXT4=y
  CONFIG_ENV_EXT4_DEVICE_AND_PART="0:1"
  CONFIG_ENV_EXT4_FILE="/uboot.env"
  CONFIG_ENV_EXT4_INTERFACE="mmc"

Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
[trini: Fix some line over 80 chars issues]
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-01-15 16:28:57 -05:00
Tom Rini
68ae7772af arm: ls1021atwr: Rework local commands to not be included in SPL
Move some of the code for the "lane_bank" and "cpld" code local
commands so that they are not built for SPL as they can only be
used in full U-Boot.  This means we can mark a few functions as
static as well now.

Cc: Alison Wang <alison.wang@freescale.com>
Cc: Sumit Garg <sumit.garg@nxp.com>
Cc: York Sun <york.sun@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Alison Wang <alison.wang@nxp.com>
Tested-by: Alison Wang <alison.wang@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-15 12:44:24 -08:00
Tom Rini
3a72a0efcc powerpc: P1010RDB: Rework local command to not be included in SPL
Add a CONFIG_SPL_BUILD guard around the code for the "mux" command so
it is not included in SPL.

Cc: Qiang Zhao <qiang.zhao@nxp.com>
Cc: York Sun <york.sun@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Reviewed-by: Qiang Zhao <qiang.zhao@nxp.com>
2018-01-15 12:44:24 -08:00
Priyanka Jain
da28a03ed4 board/ls2081ard: Correct code to get QMAP value in checkboard
QMAP value contains information about QSPI chip-selects. These bits
are used to display information of boot device in checkboard()
function.

QMAP value is stored in most significant 3-bits of 8-bit register
brdcfg[0] in Qixis, this patch corrects code to get QMAP bits using
below logic:
	(brdcfg[0] >> 5) & 0x7

Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-15 12:44:23 -08:00
Priyanka Jain
f436fbfeb1 board/ls2081ardb: Update board related prints
Remove Board Arch print as its value is always constant '1' and does
not contain any important information to display during boot.
Add print to display Board FPGA version.

Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-15 12:44:23 -08:00
Sumit Garg
86c773fe83 configs: SECURE_BOOT: Enable CONFIG_CMD_EXT4_WRITE
As part of chain of trust with confidentiality along with distro
boot, linux kernel image needs to be stored in encrypted form on
ext4 boot partition. So enable CONFIG_CMD_EXT4_WRITE in case of
Secure boot on ARM based platforms.

Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-15 12:44:23 -08:00
Zhang Ying-22455
958b2ed526 armv8/ls1088a: configure PMU's PCTBENR to enable WDT
The SP805-WDT module on LS1088A requires configuration of PMU's
PCTBENR register to enable watchdog counter decrement and reset
signal generation. The watchdog clock needs to be enabled first.

Signed-off-by: Zhang Ying-22455 <ying.zhang22455@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-15 12:44:23 -08:00
Sriram Dash
a2bbfc5480 serial: lpuart: Proper device identification
Identify and distinguish between platform device type of MX7ULP
and LS1021A.

This is a fix to commit 7edf5c45("serial: lpuart: add i.MX7ULP
support").

Signed-off-by: Sriram Dash <sriram.dash@nxp.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-15 12:44:09 -08:00
Bhaskar Upadhaya
b0ce187b1f board: ls1012a: LS1012A-2G5RDB board support
LS1012A-2G5RDB belongs to LS1012A family with features 2 2.5G SGMII
PFE MAC, SATA, USB 2.0/3.0, WiFi DDR, eMMC, QuadSPI, UART.

Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-15 11:56:33 -08:00
Bhaskar Upadhaya
bdc48ec61e armv8/kconfig: Align boards of same family at one place
Align boards belonging to LS1012A, LS2080A SoC at one place.

Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-15 11:55:54 -08:00
Zhao Qiang
1e2d2597a6 phy: atheros: set auto-negotiation for AR8021
Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-01-15 12:05:27 -06:00
Nobuhiro Iwamatsu
dcd18eaf61 net: sh-eth: Add to Kconfig and convert
This adds SH_ETHER to drivers/net/Kconfig and convert to Kconfig.

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-01-15 12:05:26 -06:00
Nobuhiro Iwamatsu
aae5d237b9 net: sh-eth: Fix misaligned cache operation warning
When we using network on board using sh-eth, it prints a lot of
"CACHE: Misaligned operation at range" messages.
This commit fixes this problem.

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-01-15 12:05:26 -06:00
Nobuhiro Iwamatsu
fbfb511548 net: sh-eth: Change read/write() param to struct sh_eth_info
This changes Change structure used in sh_eth_read and sh_eth_write function
from struct sh_eth_dev to struct sh_eth_info. This is necessary to convert
to Driver Model.

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-01-15 12:05:25 -06:00
Nobuhiro Iwamatsu
9b5f9ecf6e net: sh-eth: Remove bd_t from sh_eth_config()
bd_t is not used in sh_eth_config(). This deletes bd_t from sh_eth_config()

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-01-15 12:05:24 -06:00
Nobuhiro Iwamatsu
dc14867d0f net: sh-eth: Fix coding style checked by checkpatch.pl
This fixes the chord style checked by checkpatch.pl.
Details of change details are as follows:

 - Fix typo
    Change from alligned to aligned.
 - Remove whitespace before ','
 - Add spaces preferred around that '|'
 - Fix missing a blank line after declarations
 - Remove space after a cast declaration
 - Fix format of block comments
 - Add a blank line after function/struct/union/enum declarations

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-01-15 12:05:24 -06:00
Joe Hershberger
2099b9f27c net: dhcp: Allow "MAY_FAIL" to still try each adapter
This change allows the "MAY_FAIL" DHCP option to still attempt to
contact a DHCP server on each adapter and only give up once each
adapter has failed once.  To get the existing behavior, set the
already-existing ethrotate=no variable.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Cc: Keng Soon Cheah <keng.soon.cheah@ni.com>
Cc: Chen Yee Chew <chen.yee.chew@ni.com>
2018-01-15 12:05:23 -06:00
Florian Fainelli
d5d5757291 configs: Update Lamobo_R1 with B53 switch options
Enable CONFIG_B53_SWITCH, define the CPU/management port number (8) and
enable all 5 ports of the switch to be usable.

Reviewed-by: Stefan Roese <sr@denx.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2018-01-15 12:05:22 -06:00
Florian Fainelli
f3d78fbfaf net: phy: b53: Add b53_reg read/write commands
Add a b53_reg read/write command which allows inspecting the switch
registers. Because the Broadcom BCM53xx registers have different sizes,
we need to split the accesses in 8, 16, 32, 48 or 64 bits to obtain
expected results.

Reviewed-by: Stefan Roese <sr@denx.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2018-01-15 12:05:22 -06:00
Florian Fainelli
7a9ca9db40 net: designware: Pad small packets
Make sure that we pad small packets to a minimum length of 60 bytes
(without FCS). This is necessary to interface with Ethernet switches
that will reject RUNT frames unless padded correctly.

Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2018-01-15 12:05:21 -06:00
Florian Fainelli
137963d71a net: phy: Add Broadcom BCM53xx switch driver
Add a minimalistic Broadcom BCM53xx (roboswitch) switch driver similar
to the Marvell MV88E617x. This takes care of configuring the minimum
amount out of the switch hardware such that each user visible port
(configurable) and the CPU port can forward packets between each other
while preserving isolation with other ports.

This is useful for e.g: the Lamobo R1 board featuring a Broadcom
BCM53125 switch.

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2018-01-15 12:05:21 -06:00
Patrice Chotard
ba1f966725 net: designware: add clock support
This implementation manages several clocks, disable and
free all of them in case of error during probe and in remove
callback.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-01-15 12:05:20 -06:00
Patrice Chotard
ea8cd652a7 dm: core: add missing dev_count_phandle_with_args()
Add missing dev_count_phandle_with_args() to avoid
compilation issue.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
2018-01-15 12:05:19 -06:00
Jason Brown
32ac8b0bba net: mvneta - Fixed recv() when multiple packets have arrived.
This patch fixes a problem in the mvneta driver where if more than
one packet arrives between calls to mvneta_recv(), the additional
descriptors will be marked as free even though only one descriptor
has been read and processed from the receive queue.  This causes
the additional packet(s) to be delayed until the next packet arrives.
>From this point on all packets will be delayed because the receive
queue will contain unprocessed packets but the hardware shows no
busy descriptors.

Signed-off-by: Jason Brown <jason.brown@apcon.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-01-15 12:05:19 -06:00
Chris Brandt
33bab10457 net: miiphybb: fix casting error
Since the return value is a signed int, if the leading MSB of rdreg is a 1,
it will get signed extended and will return a negative value which is an
error even though we read the correct value.

Fixes: dfcc496ed7 ("net: mii: Changes not made by spatch")
Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Acked-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-01-15 12:05:17 -06:00
Chris Brandt
f6ac626c8a net: sh-eth: remove sh_eth_offset_rz table
First, this table could never be included in the build anyway because
SH_ETH_TYPE_RZ is not defined until later in the file.
Second, the register PIR was missing, so PHY MDIO never worked.
Third, after adding the PIR register, the table is EXACTLY the same as
sh_eth_offset_gigabit, so there is no value to it.

Therefore, just delete it use the gigabit one.

Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Acked-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-01-15 12:05:17 -06:00
Chris Brandt
5ad565b0d1 net: sh-eth: fix inl and outl definitions
The macros inl and outl maybe already be defined from file
arch/arm/include/asm/io.h so there may be no reason to define them.
And if you do try defined them here, you get a redefined complier warning.

Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Acked-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-01-15 12:05:16 -06:00
Lukasz Majewski
ce27eb9b40 net: phy: marvell: Add functions to read PHY's extended registers
This commit allows extended Marvell registers to be read with:

foo > mdio rx FEC 3.10
Reading from bus FEC
PHY at address 0:
3.16 - 0x1063
foo > mdio wx FEC 3.10 0x1011

The above code changes the way ETH connector LEDs blink.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: York Sun <york.sun@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-01-15 12:05:16 -06:00
Joe Hershberger
765a159cf5 net: Remove nfs.h include from bootp.c
Nothing from this header is used there, so remove it.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
2018-01-15 12:05:15 -06:00
Joe Hershberger
3cacc6a772 net: Fix buffer overrun error in netconsole
Need to not access the byte after the input_buffer.

Reported-by: Coverity (CID: 144423)
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
2018-01-15 12:05:14 -06:00
Wilson Lee
4bf56913d0 net: macb: Add support for Xilinx Zynq SoC
Although Xilinx Zynq SoC was using MACB similar hardware. However,
U-boot MACB driver was not supporting Xilinx Zynq SoC. This patch is
to add support for the Xilinx Zynq SoC to the existing MACB network
driver.

This patch is to add Zynq GEM DMA Config, provide callback
function for different linkspeed for case of using Xilinx Zynq
Programmable Logic as GMII to RGMII converter.

This patch convert the return value to use error codes.

Signed-off-by: Wilson Lee <wilson.lee@ni.com>
Cc: Chen Yee Chew <chen.yee.chew@ni.com>
Cc: Keng Soon Cheah <keng.soon.cheah@ni.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Wenyou Yang <wenyou.yang@atmel.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-01-15 12:05:14 -06:00
Rob Clark
f2006808f0 dm: core: parse chosen node
This is the node that would contain, for example, the framebuffer setup
by an earlier stage.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-01-15 11:35:38 -05:00
Jorge Ramirez-Ortiz
42091fa9e8 poplar: configs: increase gunzip buffer size for the kernel
Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
2018-01-15 11:35:37 -05:00
Jorge Ramirez-Ortiz
210d959294 spmi: msm: display the PMIC Arb version (debug)
Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
2018-01-15 11:35:37 -05:00
Tom Rini
3dde8f2037 Merge git://git.denx.de/u-boot-mmc 2018-01-14 22:26:38 -05:00
Bryan O'Donoghue
9587b0d611 arm: imx: hab: Add hab_failsafe console command
hab_failsafe when called puts the part into BootROM recovery mode.
This will allow u-boot scripts to script the dropping down into recovery
mode.

=> hab_failsafe

Shows the i.MX7 appear as "hiddev0,hidraw5: USB HID v1.10 Device [Freescale
SemiConductor Inc  SP Blank ULT1] " in a Linux dmesg thus allowing download
of a new image via the BootROM USB download protocol routine.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Sven Ebenfeld <sven.ebenfeld@gmail.com>
Cc: George McCollister <george.mccollister@gmail.com>
Cc: Breno Matheus Lima <brenomatheus@gmail.com>
Tested-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-01-14 17:26:30 +01:00
Bryan O'Donoghue
317956e82c arm: imx: hab: Implement hab_rvt_failsafe
This patch implements the basic callback hooks for
hab_rvt_check_failsafe for BootROM code using the older BootROM address
layout - in my test case the i.MX7. Code based on new BootROM callbacks
will just do nothing and there's definitely a TODO to implement that extra
functionality on the alternative BootROM API.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Sven Ebenfeld <sven.ebenfeld@gmail.com>
Cc: George McCollister <george.mccollister@gmail.com>
Cc: Breno Matheus Lima <brenomatheus@gmail.com>
Tested-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-01-14 17:26:30 +01:00
Bryan O'Donoghue
aeae70fac5 arm: imx: hab: Define rvt_failsafe()
The hab_rvt_failsafe() callback according to the HABv4 documentation:

"This function provides a safe path when image authentication has failed
and all possible boot paths have been exhausted. It is intended for use by
post-ROM boot stage components, via the ROM Vector Table."

Once invoked the part will drop down to its BootROM USB recovery mode.
Should it be the case that the part is in secure boot mode - only an
appropriately signed binary will be accepted by the ROM and subsequently
executed.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Sven Ebenfeld <sven.ebenfeld@gmail.com>
Cc: George McCollister <george.mccollister@gmail.com>
Cc: Breno Matheus Lima <brenomatheus@gmail.com>
Tested-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-01-14 17:26:30 +01:00
Bryan O'Donoghue
07eefaf16e arm: imx: hab: Make imx_hab_is_enabled global
It will be helpful to boot commands to know if the HAB is enabled. Export
imx_hab_is_enabled() now to facilitate further work with this data-point in
a secure-boot context.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Sven Ebenfeld <sven.ebenfeld@gmail.com>
Cc: George McCollister <george.mccollister@gmail.com>
Cc: Breno Matheus Lima <brenomatheus@gmail.com>
Tested-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-01-14 17:26:30 +01:00
Bryan O'Donoghue
4467ae6c28 arm: imx: hab: Make authenticate_image() return zero on open boards
The BootROM will not successfully process a HAB image passed by u-boot
unless the board has been set into locked mode. Some of the existing usages
of authenticate_image() expect and rely on unlocked boards doing the
following

1. Not calling into the BootROM authenticate_image() callback
2. Returning a pass status for authenticate_image() calls anyway

A previous patch removed the necessity to call into imx_hab_is_enabled()
twice. This patch ensures the reliance on authenticate_image() returning
zero is maintained.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Suggested-by: Breno Matheus Lima <brenomatheus@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Sven Ebenfeld <sven.ebenfeld@gmail.com>
Cc: George McCollister <george.mccollister@gmail.com>
Tested-by: Breno Lima <breno.lima@nxp.com>
2018-01-14 17:26:30 +01:00
Bryan O'Donoghue
e5b30e4ac1 arm: imx: hab: Rename is_hab_enabled imx_hab_is_enabled
Understanding if the HAB is enabled is something that we want to
interrogate and report on outside of the HAB layer. First step to that is
renaming the relevant function to match the previously introduced external
naming convention imx_hab_function()

The name imx_hab_is_hab_enabled() is a tautology. A more logical name is
imx_hab_is_enabled().

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Sven Ebenfeld <sven.ebenfeld@gmail.com>
Cc: George McCollister <george.mccollister@gmail.com>
Cc: Breno Matheus Lima <brenomatheus@gmail.com>
Tested-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-01-14 17:26:30 +01:00
Bryan O'Donoghue
57f6548606 arm: imx: hab: Prefix authenticate_image with imx_hab
Tidy up the HAB namespace a bit by prefixing external functions with
imx_hab. All external facing functions past this point will be prefixed in
the same way to make the fact we are doing IMX HAB activities clear from
reading the code. authenticate_image() could mean anything
imx_hab_authenticate_image() is on the other hand very explicit.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Sven Ebenfeld <sven.ebenfeld@gmail.com>
Cc: George McCollister <george.mccollister@gmail.com>
Cc: Breno Matheus Lima <brenomatheus@gmail.com>
Tested-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-01-14 17:26:30 +01:00
Bryan O'Donoghue
58bebfb753 arm: imx: hab: Make internal functions and data static
There is no need to export these functions and data structures externally.
Make them all static now.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Sven Ebenfeld <sven.ebenfeld@gmail.com>
Cc: George McCollister <george.mccollister@gmail.com>
Cc: Breno Matheus Lima <brenomatheus@gmail.com>
Tested-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-01-14 17:26:30 +01:00
Bryan O'Donoghue
2c6c68d282 arm: imx: hab: Print HAB event log only after calling ROM
The current flow of authenticate_image() will print the HAB event log even
if we reject an element of the IVT header before ever calling into the ROM.
This can be confusing.

This patch changes the flow of the code so that the HAB event log is only
printed out if we have called into the ROM and received some sort of status
code.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Suggested-by: Cc: Breno Matheus Lima <brenomatheus@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Sven Ebenfeld <sven.ebenfeld@gmail.com>
Cc: George McCollister <george.mccollister@gmail.com>
Tested-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-01-14 17:26:30 +01:00
Bryan O'Donoghue
b7c3cae7d3 arm: imx: hab: Add a hab_rvt_check_target to image auth
Add a hab_rvt_check_target() step to authenticate_image() as a sanity
check for the target memory region authenticate_image() will run over,
prior to making the BootROM authentication callback itself.

This check is recommended by the HAB documentation so it makes sense to
adhere to the guidance and perform that check as directed.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Sven Ebenfeld <sven.ebenfeld@gmail.com>
Cc: George McCollister <george.mccollister@gmail.com>
Cc: Breno Matheus Lima <brenomatheus@gmail.com>
Tested-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-01-14 17:26:30 +01:00
Bryan O'Donoghue
c0a55b7344 arm: imx: hab: Implement hab_rvt_check_target
This patch implements the basic callback hooks for hab_rvt_check_target()
for BootROM code using the older BootROM address layout - in my test case
the i.MX7. Code based on new BootROM callbacks will just have HAB_SUCCESS
as a result code. Adding support for the new BootROM callbacks is a TODO.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Sven Ebenfeld <sven.ebenfeld@gmail.com>
Cc: George McCollister <george.mccollister@gmail.com>
Cc: Breno Matheus Lima <brenomatheus@gmail.com>
Tested-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-01-14 17:26:30 +01:00
Bryan O'Donoghue
1addedadc4 arm: imx: hab: Define rvt_check_target()
The hab_rvt_check_target() callback according to the HABv4 documentation:

"This function reports whether or not a given target region is allowed for
 either peripheral configuration or image loading in memory. It is intended
 for use by post-ROM boot stage components, via the ROM Vector Table, in
 order to avoid configuring security-sensitive peripherals, or loading
 images over sensitive memory regions or outside recognized memory devices
 in the address map."

It is a useful function to support as a precursor to calling into
authenticate_image() to validate the target memory region is good.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Sven Ebenfeld <sven.ebenfeld@gmail.com>
Cc: George McCollister <george.mccollister@gmail.com>
Cc: Breno Matheus Lima <brenomatheus@gmail.com>
Tested-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-01-14 17:26:30 +01:00
Bryan O'Donoghue
824ef302f3 arm: imx: hab: Print additional IVT elements during debug
This patch enables printout of the IVT entry, dcd and csf data fields.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Sven Ebenfeld <sven.ebenfeld@gmail.com>
Cc: George McCollister <george.mccollister@gmail.com>
Cc: Breno Matheus Lima <brenomatheus@gmail.com>
Tested-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-01-14 17:26:30 +01:00
Bryan O'Donoghue
fd15fe5f84 arm: imx: hab: Print CSF based on IVT descriptor
The IVT gives the absolute address of the CSF. There is no requirement for
the CSF to be located adjacent to the IVT so lets use the address provided
in the IVT header instead of the hard-coded fixed CSF offset currently in
place.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Sven Ebenfeld <sven.ebenfeld@gmail.com>
Cc: George McCollister <george.mccollister@gmail.com>
Cc: Breno Matheus Lima <brenomatheus@gmail.com>
Tested-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-01-14 17:26:30 +01:00
Bryan O'Donoghue
04099e9ced arm: imx: hab: Only call ROM once headers are verified
Previous patches added IVT header verification steps. We shouldn't call
hab_rvt_entry() until we have done the basic header verification steps.

This patch changes the time we make the hab_rvt_entry() call so that it
only takes place if we are happy with the IVT header sanity checks.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Sven Ebenfeld <sven.ebenfeld@gmail.com>
Cc: George McCollister <george.mccollister@gmail.com>
Cc: Breno Matheus Lima <brenomatheus@gmail.com>
Tested-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-01-14 17:26:30 +01:00
Bryan O'Donoghue
e59eb9e00f arm: imx: hab: Verify IVT self matches calculated address
The IVT is a self-describing structure which contains a self field. The
self field is the absolute physical base address the IVT ought to be at in
memory. Use the IVT self field to validate the calculated ivt_addr bugging
out if the two values differ.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Sven Ebenfeld <sven.ebenfeld@gmail.com>
Cc: George McCollister <george.mccollister@gmail.com>
Cc: Breno Matheus Lima <brenomatheus@gmail.com>
Tested-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-01-14 17:26:30 +01:00
Bryan O'Donoghue
49b6d05882 arm: imx: hab: Add IVT header verification
The IVT header contains a magic number, fixed length and one of two version
identifiers. Validate these settings before doing anything with a putative
IVT binary.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Sven Ebenfeld <sven.ebenfeld@gmail.com>
Cc: George McCollister <george.mccollister@gmail.com>
Cc: Breno Matheus Lima <brenomatheus@gmail.com>
Tested-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-01-14 17:26:30 +01:00
Bryan O'Donoghue
cd2d46003c arm: imx: hab: Add IVT header definitions
The various i.MX BootROMs containing the High Assurance Boot (HAB) block
rely on a data structure called the Image Vector Table (IVT) to describe to
the BootROM where to locate various data-structures used by HAB during
authentication.

This patch adds a definition of the IVT header for use in later patches,
where we will break the current incorrect dependence on fixed offsets in
favour of an IVT described parsing of incoming binaries.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Sven Ebenfeld <sven.ebenfeld@gmail.com>
Cc: George McCollister <george.mccollister@gmail.com>
Cc: Breno Matheus Lima <brenomatheus@gmail.com>
Tested-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-01-14 17:26:30 +01:00
Bryan O'Donoghue
c5800b2541 arm: imx: hab: Fix authenticate_image input parameters
u-boot command "hab_auth_img" tells a user that it takes

- addr - image hex address
- offset - hex offset of IVT in the image

but in fact the callback hab_auth_img makes to authenticate_image treats
the second 'offset' parameter as an image length.

Furthermore existing code requires the IVT header to be appended to the end
of the image which is not actually a requirement of HABv4.

This patch fixes this situation by

1: Adding a new parameter to hab_auth_img
   - addr   : image hex address
   - length : total length of the image
   - offset : offset of IVT from addr

2: Updates the existing call into authenticate_image() in
   arch/arm/mach-imx/spl.c:jump_to_image_no_args() to pass
   addr, length and IVT offset respectively.

This allows then hab_auth_img to actually operate the way it was specified
in the help text and should still allow existing code to work.

It has the added advantage that the IVT header doesn't have to be appended
to an image given to HAB - it can be prepended for example.

Note prepending the IVT is what u-boot will do when making an IVT for the
BootROM. It should be possible for u-boot properly authenticate images
made by mkimage via HAB.

This patch is the first step in making that happen subsequent patches will
focus on removing hard-coded offsets to the IVT, which again is not
mandated to live at the end of a .imx image.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Sven Ebenfeld <sven.ebenfeld@gmail.com>
Cc: George McCollister <george.mccollister@gmail.com>
Cc: Breno Matheus Lima <brenomatheus@gmail.com>
Tested-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-01-14 17:26:30 +01:00
Bryan O'Donoghue
08a81cad2f arm: imx: hab: Move CSF_PAD_SIZE to hab.h
CSF_PAD_SIZE should be defined in hab.h, move it to that location now.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Sven Ebenfeld <sven.ebenfeld@gmail.com>
Cc: George McCollister <george.mccollister@gmail.com>
Cc: Breno Matheus Lima <brenomatheus@gmail.com>
Tested-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-01-14 17:26:30 +01:00
Bryan O'Donoghue
191d8bd509 arm: imx: hab: Move IVT_SIZE to hab.h
The size of the IVT header should be defined in hab.h move it there now.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Sven Ebenfeld <sven.ebenfeld@gmail.com>
Cc: George McCollister <george.mccollister@gmail.com>
Cc: Breno Matheus Lima <brenomatheus@gmail.com>
Tested-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-01-14 17:26:30 +01:00
Bryan O'Donoghue
53c8a510e7 arm: imx: hab: Optimise flow of authenticate_image on hab_entry fail
The current code disjoins an entire block of code on hab_entry pass/fail
resulting in a large chunk of authenticate_image being offset to the right.

Fix this by checking hab_entry() pass/failure and exiting the function
directly if in an error state.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Sven Ebenfeld <sven.ebenfeld@gmail.com>
Cc: George McCollister <george.mccollister@gmail.com>
Cc: Breno Matheus Lima <brenomatheus@gmail.com>
Tested-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-01-14 17:26:30 +01:00
Bryan O'Donoghue
d2c61800fc arm: imx: hab: Optimise flow of authenticate_image on is_enabled fail
There is no need to call is_enabled() twice in authenticate_image - it does
nothing but add an additional layer of indentation.

We can check for is_enabled() at the start of the function and return the
result code directly.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Sven Ebenfeld <sven.ebenfeld@gmail.com>
Cc: George McCollister <george.mccollister@gmail.com>
Cc: Breno Matheus Lima <brenomatheus@gmail.com>
Tested-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-01-14 17:26:30 +01:00
Bryan O'Donoghue
9535b3975f arm: imx: hab: Fix authenticate_image result code
authenticate_image returns 1 for success and 0 for failure. That result
code is mapped directly to the result code for the command line function
hab_auth_img - which means when hab_auth_img succeeds it is returning
CMD_RET_FAILURE (1) instead of CMD_RET_SUCCESS (0).

This patch fixes this behaviour by making authenticate_image() return 0 for
success and 1 for failure. Both users of authenticate_image() as a result
have some minimal churn. The upshot is once done when hab_auth_img is
called from the command line we set $? in the standard way for scripting
functions to act on.

Fixes: 36c1ca4d46 ("imx: Support i.MX6 High Assurance Boot
authentication")

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Sven Ebenfeld <sven.ebenfeld@gmail.com>
Cc: George McCollister <george.mccollister@gmail.com>
Cc: Breno Matheus Lima <brenomatheus@gmail.com>
Tested-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-01-14 17:26:30 +01:00
Bryan O'Donoghue
adbb051f08 arm: imx: hab: Make authenticate_image return int
Both usages of authenticate_image treat the result code as a simple binary.
The command line usage of authenticate_image directly returns the result
code of authenticate_image as a success/failure code.

Right now when calling hab_auth_img and test the result code in a shell a
passing hab_auth_img will appear to the shell as a fail.

The first step in fixing this behaviour is to fix-up the result code return
by authenticate_image() itself, subsequent patches fix the interpretation
of authenticate_image so that zero will return CMD_RET_SUCCESS and non-zero
will return CMD_RET_FAILURE.

The first step is fixing the return type in authenticate_image() so do that
now.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Sven Ebenfeld <sven.ebenfeld@gmail.com>
Cc: George McCollister <george.mccollister@gmail.com>
Cc: Breno Matheus Lima <brenomatheus@gmail.com>
Tested-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-01-14 17:26:30 +01:00
Tom Rini
18af965798 Merge git://git.denx.de/u-boot-tegra 2018-01-12 14:18:34 -05:00
Stephen Warren
5fed97af20 Makefile: ensure DTB doesn't overflow into initial stack
With CONFIG_SYS_INIT_SP_BSS_OFFSET enabled, the initial (pre-relocation)
stack is placed some distance after bss_start. The control DTB is appended
to the U-Boot binary at bss_start. If the DTB is too large, or the SP BSS
offset too small, then the initial stack could corrupt the DTB. Enhance
the Makefile to check whether this is likely to occur.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2018-01-12 10:12:32 -07:00
Stephen Warren
e43effc1d8 ARM: Tegra: p2771-0000: use calculate env var feature
Request that all environment variables containing hard-coded address be
calculated at boot time instead.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2018-01-12 10:12:32 -07:00
Stephen Warren
026a8b96bd ARM: Tegra186: calculate load addresses at boot
In the presence of potentially fragemented memory, we cannot hard-code
addresses into environment variables such as kernel_addr_r. Instead, we
must calculate those addresses at run-time based on available memory
locations. Implement the code to perform such runtime calculation, based
on requirements described in environment variables, to allow the user
full control over the allocation.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2018-01-12 10:12:32 -07:00
Stephen Warren
cdcf55584e ARM: Tegra186: don't map memory not in RAM banks
Tegra186 currently restricts its DRAM usage to entries in the /memory node
in the DTB passed to it. However, the MMU configuration always maps the
entire first 2GB of RAM. This could allow the CPU to speculatively access
RAM that isn't part of the in-use banks. This patch switches to runtime
construction of the table that's used to construct the MMU translation
tables, and thus prevents access to RAM that's not part of a valid bank.

Note: This patch is intended to prevent access to RAM regions which U-Boot
does not need to access, with the primary purpose of avoiding theoretical
speculative access to physical regions for which the HW will throw errors
(e.g. carve-outs that the CPU has no permission to access at a bus level,
bad ECC pages, etc.). In particular, this patch is not deliberately
related to the speculation-related security issues that were recently
announced. The apparent similarity is a coincidence.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2018-01-12 10:12:32 -07:00
Stephen Warren
a9819b9e33 ARM: tegra: p2771-000: increase max DRAM bank count
On this platform, there may be up to 1024 unusable chunks of memory.
Increase CONFIG_NR_DRAM_BANKS so that U-Boot can remember all the banks
required to represent such fragmented memory.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2018-01-12 10:12:31 -07:00
Stephen Warren
d5859255d9 ARM: Tegra186: search for best RAM bank
In the future, the list of DRAM regions passed to U-Boot in the DTB may
be quite long and fragmented. Due to this, U-Boot must search through the
regions to find the best region to relocate into, rather than relying on
the current assumption that the top of bank 0 is a reasonable relocation
target. This change implements such searching.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2018-01-12 10:12:31 -07:00
Stephen Warren
15751403b6 ARM: bootm: don't assume sp is in DRAM bank 0
arch_lmb_reserve() currently assumes that the stack pointer is within DRAM
bank 0. This is not necessarily true. Enhance the code to search through
DRAM banks until the bank that does contain SP is found, and then reserve
the tail of that bank.

Fixes: 2d1916e48b ("ARM: add flat device tree support")
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2018-01-12 10:12:31 -07:00
Stephen Warren
f697471217 ARM: Tegra186: mem parsing fixes from downstream
Apply a few small fixes for the DTB /memory node parsing from NVIDIA's
downstream U-Boot:

- Allow arbitrary number of DRAM banks.
- Correctly calculate the number of DRAM banks.
- Clip PCIe memory in the same way as U-Boot CPU memory use.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2018-01-12 09:52:11 -07:00
Stephen Warren
ddecaaf3b9 ARM: tegra: use LINUX_KERNEL_IMAGE_HEADER
Enable CONFIG_LINUX_KERNEL_IMAGE_HEADER for all 64-bit Tegra boards.
cboot (the boot SW that runs before U-Boot) will eventually use this
information.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2018-01-12 09:52:11 -07:00
Stephen Warren
8163faf952 ARMv8: add optional Linux kernel image header
Allow placing a Linux kernel image header at the start of the U-Boot
binary. This is useful since the image header reports the amount of memory
(BSS and similar) that U-Boot needs to use, but that isn't part of the
binary size. This can be used by the code that loads U-Boot into memory to
determine where to load U-Boot, based on other users of memory.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2018-01-12 09:52:11 -07:00
Stephen Warren
f097532d27 ARM: tegra: use CONFIG_SYS_INIT_SP_BSS_OFFSET
Enable CONFIG_SYS_INIT_SP_BSS_OFFSET for all 64-bit Tegra boards. Place
the stack/... 512KiB from the end of the U-Boot binary. This should be
plenty to accommodate the current DTBs (max 64 KiB), early malloc region
(6KiB), stack usage, and plenty of slack, while still not placing it too
far away from the U-Boot binary.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2018-01-12 09:52:11 -07:00
Stephen Warren
e6c904489a ARMv8: Allow dynamic early stack pointer
U-Boot typically uses a hard-coded value for the stack pointer before
relocation. Implement option SYS_INIT_SP_BSS_OFFSET to instead calculate
the initial SP at run-time. This is useful to avoid hard-coding addresses
into U-Boot, so that can be loaded and executed at arbitrary addresses and
thus avoid using arbitrary addresses at runtime. This option's value is
the offset added to &_bss_start in order to calculate the stack pointer.
This offset should be large enough so that the early malloc region, global
data (gd), and early stack usage do not overlap any appended DTB.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2018-01-12 09:52:11 -07:00
Stephen Warren
0d1bd150f0 ARM: tegra: remove SPL config for non-SPL SoCs
No 64-bit Tegra uses SPL. Remove various unused definitions from config
headers.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2018-01-12 09:52:10 -07:00
Stephen Warren
3cdb5fa08a ARM: tegra: don't use CONFIG_SPL_TEXT_BASE when no SPL
64-bit Tegra don't use SPL, and soon won't define CONFIG_SPL_TEXT_BASE
when building. Fix the binman .dts file so that it doesn't use undefined
values.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2018-01-12 09:52:10 -07:00
Peng Fan
db359efd59 mmc: fsl_esdhc: Fix eMMC 1.8v setting issue
Current USDHC driver will reset VSELECT to 0 (3.3v) during mmc init,
then set to 1 for 1.8v eMMC I/O. When booting from eMMC, since ROM has
already set VSELECT to 1.8v before running the u-boot. This reset in
USDHC driver causes a short 2.2v pulse on CMD pin.

Fix this issue by not reset VSELECT to 0 when 1.8v flag is set.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2018-01-13 00:08:44 +09:00
Tom Rini
8c0bb85824 power: Rearrange code to guard power command with CONFIG_SPL_BUILD guard
In order to discard this code when unused in SPL we need to guard the
command with a check for CONFIG_SPL_BUILD and we rearrange the code
slightly to make this cleaner.

Cc: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-01-13 00:07:57 +09:00
Christopher Spinrath
edc57f1df8 ARM: imx: cm_fx6: env: try to determine dtb to use
Some distributions like Fedora expect U-Boot to select a proper
devicetree. Since there are several variants of the cm-fx6 module
featuring different SoC variants and the module can be paired with
several baseboards, it is not viable to hardcode a filename.

Instead, follow the lead of other i.MX6 based devices and try to
determine the devicetree to use with the help of the board name
and the SoC variant exported by the board code, before calling the
distro bootcommand.

For now, only for the Utilite Pro a proper devicetree filename is
known but further variants of the Utilite Computer or other devices
based on the cm-fx6 module may be added in the future.

Signed-off-by: Christopher Spinrath <christopher.spinrath@rwth-aachen.de>
2018-01-12 14:28:04 +01:00
Christopher Spinrath
dbeaa1d131 ARM: imx: cm_fx6: export board and soc info to env
Like many other i.MX6 based boards, there are multiple variants of
the cm-fx6 module featuring different SoC variants. Furthermore, the
module can be paired with multiple baseboards.

At the same time modern distribution like Fedora require U-Boot to
select a proper devicetree which depends on the SoC variant and the
baseboard.

Thus, export the SoC variant and the actual board to the environment
following the conventions of other i.MX6 devices (e.g. the NXP boards)
such that the environment can select a devicetree file to load.

For now, we only know for sure that the cm-fx6 module and the SB-fx6m
baseboard amount to a Utilite Computer variant (depending on the SoC).
Further combinations may be added in the future; e.g. CompuLab's
evaluation board once someone can verify the identification string
stored in its eeprom.

Signed-off-by: Christopher Spinrath <christopher.spinrath@rwth-aachen.de>
Reviewed-by: Stefano Babic <sbabic@denx.de>
2018-01-12 14:28:04 +01:00
Koen Vandeputte
f57263ee9b drivers: pci: imx: fix enumeration logic error
By default, the subordinate is set equally to the secondary bus (1) when
the RC boots, and does not alter afterwards.

This means that theoretically, the highest bus reachable downstream is
bus 1.

Force the PCIe RC subordinate to 0xff, otherwise no downstream
devices will be detected behind bus 1 if the booting OS does not allow
enumerating a higher busnr than the subordinate value of the primary
bus.

Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
2018-01-12 14:28:04 +01:00
Fabio Estevam
0f194018f2 mx6memcal: spl: Disambiguate the error message
Currently mmdc_do_dqs_calibration() and mmdc_do_write_level_calibration()
show the same error message, which is confusing for debugging.

Disambiguate the mmdc_do_dqs_calibration() error message.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-01-12 14:28:04 +01:00
Fabio Estevam
941fcabfa7 mx6memcal: spl: Also take i.MX6ULL into account
i.MX6ULL also does not support 64-bit DDR bus, so add it to the
check logic.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-01-12 14:28:04 +01:00
Fabio Estevam
db00e921fd mx6memcal: Fix the UART ports for mx6sabresd/auto boards
mx6sabresd board uses the following pins for console:

PAD_CSI0_DAT10__UART1_TX_DATA
PAD_CSI0_DAT11__UART1_RX_DATA

,so put it in the same config option as wandboard.

mx6sabreauto board uses the following pins for console:

PAD_KEY_COL0__UART4_TX_DATA
PAD_KEY_ROW0__UART4_RX_DATA

So do not mention sabreauto board as part of the UART1_SD3_DAT6_7 option.

The config option for sabreauto can be added later when needed.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-01-12 14:28:04 +01:00
Tom Rini
64c7abf023 toradex: imx6: Rework PF0100 fuse programming commands to not be in SPL
The code for programming the OTP fuses on the PMIC PF0100 can only be
used in full U-Boot, so do not build / link it into SPL.

Cc: Max Krummenacher <max.krummenacher@toradex.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Tested-by: Max Krummenacher <max.krummenacher@toradex.com>
2018-01-12 14:28:04 +01:00
Tom Rini
bf52330a50 imx: ventana: Rework CONFIG_CMD_GSC code to not be included in SPL
The command can only be used from full U-Boot, so do not build it into
SPL.

Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-01-12 14:28:04 +01:00
Tom Rini
c10b1c43fd imx: ventana: Rework CONFIG_CMD_EECONFIG code to not be included in SPL
The command can only be used from full U-Boot, so do not build it into
SPL.

Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-01-12 14:28:04 +01:00
Tom Rini
20b9f2eaf5 arm: imx: Rework i.MX specific commands to be excluded from SPL
The "clocks" and "bootaux" commands are only usable in full U-Boot, not
SPL, so do not link them inside of SPL.  Rework a little of the bootaux
related code to make use of __weak and declare parts of it static as
it's local to the file.

Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-01-12 14:28:04 +01:00
Eran Matityahu
e7528a3d74 imx7: spl: Add support for MMC3, SD3 and NAND boot devices
Signed-off-by: Eran Matityahu <eran.m@variscite.com>
2018-01-12 14:28:04 +01:00
Eran Matityahu
cd9f3ff651 imx7: spl: Use SPL boot device MMC1 for all of the SOCs MMC/SD boot devices
Use only one SPL MMC device, similarly to the iMX6 code

Signed-off-by: Eran Matityahu <eran.m@variscite.com>
2018-01-12 14:28:04 +01:00
Peng Fan
a3cc43551f imx: mx6ull-14x14-evk: enable DM QSPI driver
To support QSPI DM driver
 - Add spi0 alias for qspi node. Which is used for bus number 0.
 - Modify the n25q256a@0 compatible property to "spi-flash".
 - Modify spi4 (gpio_spi) node to spi5
 - Define DM SPI/QSPI related config to enable QSPI

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2018-01-12 14:28:04 +01:00
Peng Fan
afe8e1b033 spi: fsl_qspi: support i.MX6UL/6ULLL/7D
The QSPI module on i.MX7D is modified from i.MX6SX. The module used on
i.MX6UL/6ULL is reused from i.MX7D. They share same tx buffer size.

The endianness is not set at qspi driver initialization. So if we don't
boot from QSPI, we will get wrong endianness when accessing from AHB
address directly.

Add the compatible entry for 6ul/7d.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2018-01-12 14:28:04 +01:00
Fabio Estevam
6a2ccd64c3 mx6: ddr: Do not access MMDC_P1_BASE_ADDR on i.MX6ULL
i.MX6ULL also does not have a MMDC_P1_BASE_ADDR, so do not try to
access it.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Stefano Babic <ssbabic@denx.de>
2018-01-12 14:28:04 +01:00
Peng Fan
67b71df277 pci: imx: request gpio before use
Before use GPIO, we need to request gpio first. Free gpio after use.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Stefano Babic <ssbabic@denx.de>
2018-01-12 14:28:04 +01:00
Peng Fan
d9523fdd11 imx: mx6sxsabresd: enlarge ENV offset
The u-boot-dtb.imx size is about 519KB, so 8 * 64KB conflicts
with u-boot-dtb.imx. Enlarge the offset to 14 * 64KB to fix it.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
2018-01-12 14:28:04 +01:00
Peng Fan
e80f9e1a37 imx: mx6sxsabresd: config wdog pinmux
Because kernel set WDOG_B mux before pad with the common pinctrl
framwork now and wdog reset will be triggered once set WDOG_B mux
with default pad setting, we set pad setting here to workaround this.
Since imx_iomux_v3_setup_pad also set mux before pad setting, we set
as GPIO mux firstly here to workaround it.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
2018-01-12 14:28:04 +01:00
Peng Fan
5dfc9d3766 imx: mx6sxsabresd: Enable DM driver
Enable I2C/MMC/GPIO/REGUALTOR/PMIC/USB DM drivers.
There are some dependency, such as when DM MMC enabled, USB compile error.
Also the i.MX I2C MMC DM driver does not support legacy GPIO interface.
So enable them all together.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
2018-01-12 14:28:04 +01:00
Peng Fan
f8e450a7f6 board: freescale: common: add pfuze dm code
Add pfuze dm code, this code could be enabled with CONFIG_DM_PMIC_PFUZE100.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
2018-01-12 14:28:04 +01:00
Peng Fan
83fccaf1f9 ARM: imx: Enable dts for i.MX6SX-SDB
Enable DTS and OF_CONTROL for i.MX6SX-SDB.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
2018-01-12 14:28:04 +01:00
Peng Fan
220e88787a ARM: imx: Introduce dts for i.MX6SX-SDB
Introduce dts from Kernel commit
commit 71ee203389f7cb1c("Merge tag 'scsi-fixes' of
git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi")

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
2018-01-12 14:28:04 +01:00
Peng Fan
8df42bee0e misc: mxc_ocotp: check fuse word before programming on i.MX7ULP
On i.MX7ULP, the fuse words (except bank 0 and 1) only supports to
write once, because they use ECC mode. Multiple writes may damage
the ECC value and cause a wrong fuse value decoded when reading.
This patch adds a checking before the fuse word programming, only
can write when the word value is 0.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2018-01-12 14:28:04 +01:00
Stefano Babic
fb8cac9366 mx6: Support SKS-Kinkel sksimx6 Board
Board  has 1GB RAM and boots from SD Card

U-Boot SPL 2018.01-rc3-00005-ga1898b8 (Jan 02 2018 - 13:48:54)
BT_FUSE_SEL already fused, will do nothing
Trying to boot from MMC1

U-Boot 2018.01-rc3-00005-ga1898b8 (Jan 02 2018 - 13:48:54 +0100)

CPU:   Freescale i.MX6DL rev1.2 996 MHz (running at 792 MHz)
CPU:   Commercial temperature grade (0C to 95C) at 40C
Reset cause: POR
I2C:   ready
DRAM:  1 GiB
MMC:   FSL_SDHC: 0
In:    serial
Out:   serial
Err:   serial
Net:   FEC [PRIME]

Signed-off-by: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-01-12 14:28:04 +01:00
Rick Chen
b6896fcbeb travis.yml: Support RISC-V
Enable travis-ci support with a link having built.

Signed-off-by: Chih-Mao Chen <cmchen@andestech.com>
Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Signed-off-by: Greentime Hu <green.hu@gmail.com>
2018-01-12 08:05:12 -05:00
Rick Chen
3fafced74d riscv: doc: Add relative doc to describe RISC-V
Add documents to describe NX25 and AE250.
Also update other documents for RISC-V.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Signed-off-by: Greentime Hu <green.hu@gmail.com>
2018-01-12 08:05:12 -05:00
Rick Chen
068feb9b86 riscv: Modify generic codes to support RISC-V
Support common commands bdinfo and image format,
also modify common generic flow for RISC-V.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Signed-off-by: Greentime Hu <green.hu@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-01-12 08:05:12 -05:00
Rick Chen
c7d7e80acd riscv: Support standalone
Run hello_world successfully.

U-Boot 2018.01-rc2-00033-gb265b91-dirty (Dec 22 2017 - 13:54:21 +0800)

DRAM:  1 GiB
MMC:   mmc@f0e00000: 0
SF: Detected mx25u1635e with page size 256 Bytes, erase size 4 KiB, total 2 MiB
In:    serial@f0300000
Out:   serial@f0300000
Err:   serial@f0300000
Net:
Warning: mac@e0100000 (eth0) using random MAC address - 0a:47:9b:f8:b4:f2
eth0: mac@e0100000
RISC-V # mmc rescan
RISC-V # fatls mmc 0:1
318907   u-boot-ae250-64.bin
1252   hello_world_ae250_32.bin
328787   u-boot-ae250-32.bin

3 file(s), 0 dir(s)

RISC-V # fatload mmc 0:1 0x600000 hello_world_ae250_32.bin
reading hello_world_ae250_32.bin
1252 bytes read in 23 ms (52.7 KiB/s)
RISC-V # go 0x600000
Example expects ABI version 9
Actual U-Boot ABI version 9
Hello World
argc = 1
argv[0] = "0x600000"
argv[1] = "$B@"
Hit any key to exit ...

RISC-V #

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Signed-off-by: Greentime Hu <green.hu@gmail.com>
2018-01-12 08:05:12 -05:00
Rick Chen
42ac26f2b0 riscv: tools: Prelink u-boot
Add prelink-riscv to arrange .rela.dyn and .rela.got
in compile time. So that u-boot can be directly
executed without fixup.

Signed-off-by: Chih-Mao Chen <cmchen@andestech.com>
Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Signed-off-by: Greentime Hu <green.hu@gmail.com>
2018-01-12 08:05:12 -05:00
Rick Chen
3dafc016c1 riscv: defconfig: Add nx25-ae250 defconfig to support RISC-V
Add nx25-ae250 default configuration for RISC-V

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Signed-off-by: Greentime Hu <green.hu@gmail.com>
2018-01-12 08:05:12 -05:00
Rick Chen
56a4ca8f72 riscv: configs: Add nx25-ae250.h to support RISC-V
Add nx25-ae250 board configuartion options for RISC-V

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Signed-off-by: Greentime Hu <green.hu@gmail.com>
2018-01-12 08:05:12 -05:00
Rick Chen
7885ea8568 riscv: board: Add nx25-ae250 to support RISC-V
Add nx25-ae250 board to do platform initializations.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Signed-off-by: Greentime Hu <green.hu@gmail.com>
2018-01-12 08:05:12 -05:00
Rick Chen
f94c44e51e riscv: Add Kconfig to support RISC-V
Add Kconfig and makefile for RISC-V
Also modify MAINTAINERS for it.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Signed-off-by: Greentime Hu <green.hu@gmail.com>
Cc: Padmarao Begari <Padmarao.Begari@microsemi.com>
2018-01-12 08:05:12 -05:00
Rick Chen
6020faf62c riscv: nx25: include: Add header files to support RISC-V
Add header files for RISC-V.
Cache, ptregs, data type and other definitions are included.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Signed-off-by: Greentime Hu <green.hu@gmail.com>
2018-01-12 08:05:12 -05:00
Rick Chen
039ed7c572 riscv: nx25: dts: Add AE250 dts to support RISC-V
AE250 is the Soc using NX25 cpu core base on RISC-V arch.
Details please see the doc/README.ae250.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Signed-off-by: Greentime Hu <green.hu@gmail.com>
2018-01-12 08:05:12 -05:00
Rick Chen
8bbb2909cb riscv: nx25: lib: Add relative lib funcs to support RISC-V
Add makefile, interrupts.c and boot.c,... functions
to support RISC-V arch.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Signed-off-by: Greentime Hu <green.hu@gmail.com>
Cc: Padmarao Begari <Padmarao.Begari@microsemi.com>
2018-01-12 08:05:12 -05:00
Rick Chen
e8e39597a3 riscv: cpu: Add nx25 to support RISC-V
Add Andes nx25 cpu core (called AndesStar V5) to support RISC-V arch

Verifications:
1. startup and relocation ok.
2. boot from rom or ram both ok.
2. timer driver ok.
3. uart driver ok
4. mmc driver ok
5. spi driver ok.
6. 32/64 bit both ok.

Detail verification message please see doc/README.ae250.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Signed-off-by: Greentime Hu <green.hu@gmail.com>
Cc: Padmarao Begari <Padmarao.Begari@microsemi.com>
2018-01-12 08:05:12 -05:00
Jean-Jacques Hiblot
b7a6e2c9c3 mmc: remove hc_wp_grp_size from struct mmc if not needed
hc_wp_grp_size is needed only if hardware partitionning is used.
On ARM removing it saves about 30 bytes of code space.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-12 18:11:24 +09:00
Jean-Jacques Hiblot
173c06dfcc mmc: don't read the size of eMMC enhanced user data area in SPL
This information is only used by the "mmc info" command.
On ARM removing this information from SPL saves about 140 of code space.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-12 18:11:24 +09:00
Jean-Jacques Hiblot
e6fa5a5461 mmc: compile out erase and write mmc commands if write operations are not enabled
Also remove erase_grp_size and write_bl_len from struct mmc as they are
not used anymore. On ARM, removing them saves about 100 bytes of code
space in SPL.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-12 18:11:24 +09:00
Jean-Jacques Hiblot
5b2e72f327 mmc: read ssr only if MMC write support is enabled
The content of ssr is useful only for erase operations.
on ARM, removing sd_read_ssr() saves around 300 bytes.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-12 18:11:24 +09:00
Jean-Jacques Hiblot
d6400c3f85 mmc: add a Kconfig option to enable the support for MMC write operations
This allows using CONFIG_IS_ENABLED(MMC_WRITE) to compile out code
needed only if write support is required.
The option is added for u-boot and for SPL

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-12 18:11:24 +09:00
Jean-Jacques Hiblot
58a6fb7b04 mmc: reworked version lookup in mmc_startup_v4
Using a table versus a switch() structure saves a bit of space

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-12 18:11:24 +09:00
Jean-Jacques Hiblot
baef2070a4 mmc: compile out more code if support for UHS and HS200 is not enabled
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-12 18:11:23 +09:00
Jean-Jacques Hiblot
9b79dbd201 mmc: atmel: when sending a data command, use the provided block size
struct mmc_data contains the block size to use for the data transfer.
Use this information instead of using the default value or the block length
information stored in struct mmc.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-12 18:11:23 +09:00
Jean-Jacques Hiblot
d0e443786c common: do not compile common fastboot code when building the SPL
This is not required as fastboot can't be started from SPL.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-12 18:11:23 +09:00
Tom Rini
dc80373299 am335x_hs_evm: Trim options in SPL to reduce binary size
The am335x_hs_evm runs into size constraint problems at times with
various toolchains as changes come in due to the config have a large
number of options in SPL (to showcase what is possible) while also
having rather constrained binary limits.  Gain some of this room back by
lowering the loglevel, disabling HW partition support and switching over
to the tiny FIT image support.

Cc: Andrew F. Davis <afd@ti.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
---
I'd really appreciate a run-time test of this patch if at all possible
as I'm a little worried about TINY_FIT being incompatible with all of
the security options.  Thanks!
2018-01-12 18:11:04 +09:00
Jean-Jacques Hiblot
49f89252ed dm: mmc: sandbox: Update SD card emulation
The SDcard initialization procedure does a few more things than it did earlier:
* switch the bus width even for 1-bit bus width
* check that speed has been properly set (in resp[4] of SD_CMD_SWITCH_FUNC)

Update the SD simulator to handle those requests gracefully.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2018-01-12 18:11:04 +09:00
Jean-Jacques Hiblot
c9d3f34e77 configs: omapl138_lcdk: decrease the loglevel to reduce the size of the SPL
The changes in the MMC stack have increased its footprint up to the point
were its breaks the generation of the SPL for this platform.
Fix this by reducing the loglevel.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Peter Howard <phoward@gme.net.au>
2018-01-12 18:11:04 +09:00
Jean-Jacques Hiblot
33678bd7f5 configs: openrd: removed support for eMMC hardware partitioning
builds are broken because the size of the binary exceeds the limit.
Make some space by removing support for hardware partitioning as those
boards don't have any eMMC.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-12 18:11:04 +09:00
Jean-Jacques Hiblot
cf17789e07 mmc: make optional the support for eMMC hardware partitioning
Not all boards have an eMMC and not all users have a need for this.
Allow to compile it out. By default it is still included.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-12 18:11:04 +09:00
Jean-Jacques Hiblot
f99c2efe56 mmc: make UHS and HS200 optional
Supporting USH and HS200 increases the code size as it brings in IO voltage
control, tuning and fatter data structures.
Use Kconfig configuration to select which of those features should be
built in.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-12 18:11:04 +09:00
Jean-Jacques Hiblot
d8e3d42089 mmc: convert most of printf() to pr_err() and pr_warn()
This allows to compile out the log message by tweaking the LOGLEVEL.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-01-12 18:11:04 +09:00
Jean-Jacques Hiblot
f7d5dffc65 mmc: don't use malloc_cache_aligned()
Not using this function reduces the size of the binary. It's replaces by
a standard malloc() and the alignment requirement is handled by an
intermediate buffer on the stack.

Also make sure that the allocated buffer is freed in case of error.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-12 18:11:04 +09:00
Jean-Jacques Hiblot
1de06b9fa5 mmc: fix for old MMCs (below version 4)
The ext_csd is allocated only for MMC above version 4. The compare will
crash or fail for older MMCs.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-12 18:11:04 +09:00
Jean-Jacques Hiblot
1da8eb598f mmc: all hosts support 1-bit bus width and legacy timings
Make sure that those basic capabilities are advertised by the host.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-12 18:11:04 +09:00
Jean-Jacques Hiblot
00e446fa04 mmc: Fixed a problem with old sd or mmc that do not support High speed
As the legacy modes were not added to the list of supported modes, old
cards that do not support other modes could not be used.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-12 18:11:04 +09:00
Jean-Jacques Hiblot
7abff2c3b3 dm: mmc: update mmc_of_parse()
* convert to livetree API
* don't fail because of an invalid bus-width, instead default to 1-bit.
* recognize 1.2v DDR and 1.2v HS200 flags

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-12 18:11:04 +09:00
Jean-Jacques Hiblot
52d241dfba mmc: dump card and host capabilities if debug is enabled
This is a useful information while debugging the initialization process or
performance issues.
Also dump this information with the other mmc info if the verbose option
is selected

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-12 18:11:04 +09:00
Jaehoon Chung
ef1614acf8 mmc: meson_gx_mmc: fix the complie error
mmc_set_clock() is changed.
This patch is for fixing complie error.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
2018-01-12 18:11:04 +09:00
Kishon Vijay Abraham I
9215ef5ed5 dm: mmc: Add a library function to parse generic dt binding
Add a new function to parse host controller dt node and
set mmc_config. This function can be used by mmc controller
drivers to set the generic mmc_config.
This function can be extended to set other UHS mode caps
once UHS mode support is added.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-12 18:11:04 +09:00
Jean-Jacques Hiblot
9815e3ba80 mmc: add a library function to send tuning command
HS200/SDR104 requires tuning command to be sent to the card.
Add a simple function to send tuning command and to read and
compare the received data with the tuning block pattern.
This function can be used by platform driver to perform DLL
tuning.
This patch is similar to
commit 996903de92f0 ("mmc: core: add core-level function for
sending tuning commands") added in linux kernel.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-12 18:11:04 +09:00
Jean-Jacques Hiblot
bc1e3272ff mmc: use the right voltage level for MMC DDR and HS200 modes
HS200 only supports 1.2v and 1.8v signal voltages. DDR52 supports 3.3v/1.8v
or 1.2v signal voltages.
Select the lowest voltage available when using those modes.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-12 18:11:04 +09:00
Kishon Vijay Abraham I
83dc42271f mmc: Retry some MMC cmds on failure
With certain SD cards like Kingston 8GB/16GB UHS card, it is seen that
MMC_CMD_ALL_SEND_CID cmd fails on first attempt, but succeeds
subsequently. Therefore, retry MMC_CMD_ALL_SEND_CID cmd a few time
as done in Linux kernel.
Similarly, it is seen that MMC_CMD_SET_BLOCKLEN may fail on first
attempt, therefore retry this cmd a few times as done in kernel.

To make it clear that those are optionnal workarounds, a new Kconfig
option 'MMC_QUIRKS' is added (enabled by default).

Signed-off-by: Vignesh R <vigneshr@ti.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-12 18:11:04 +09:00
Jean-Jacques Hiblot
01298da31d mmc: Change mode when switching to a boot partition
Boot partitions do not support HS200. Changing to a lower performance mode
is required to access them.
mmc_select_mode_and_width() and sd_select_mode_and_width() are modified to
make it easier to call them outside of the initialization context.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-12 18:11:04 +09:00
Jean-Jacques Hiblot
04a2ea248f mmc: disable UHS modes if Vcc cannot be switched on and off
If a power cycle cannot be done on Vcc, it is safer not to try the UHS
modes because we wouldn't be able to recover from an error occurring
during the UHS initialization.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-12 18:11:04 +09:00
Jean-Jacques Hiblot
c10b85d6c2 mmc: Add support for UHS modes
Add UHS modes to the list of supported modes, get the UHS capabilites of
the SDcard and implement the procedure to switch the voltage (UHS modes
use 1v8 IO lines)
During the voltage switch procedure, DAT0 is used by the card to signal
when it's ready. The optional card_busy() callback can be used to get this
information from the host driver.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-12 18:11:04 +09:00
Kishon Vijay Abraham I
634d484940 mmc: add HS200 support in MMC core
Add HS200 to the list of supported modes and introduce tuning in the MMC
startup process.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-12 18:11:04 +09:00
Kishon Vijay Abraham I
ec841209a7 mmc: Add a execute_tuning() callback to the mmc operations.
Tuning is a mandatory step in the initialization of SDR104 and HS200 modes.
This callback execute the tuning process.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-12 18:11:04 +09:00
Kishon Vijay Abraham I
2e7410d76a mmc: disable the mmc clock during power off
There is no point in having the mmc clock enabled during
power off. Disable the mmc clock. This is similar to how it's
programmed in Linux Kernel.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Vignesh R <vigneshr@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-12 18:11:04 +09:00
Kishon Vijay Abraham I
35f6782055 mmc: add a new mmc parameter to disable mmc clock
mmc clock has to be disabled in certain cases like during
the voltage switch sequence. Modify mmc_set_clock function
to take disable as an argument that signifies if the
clock has to be enabled or disabled.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-12 18:11:04 +09:00
Kishon Vijay Abraham I
fb7c3beb51 mmc: add power cyle support in mmc core
mmc/sd specification requires vdd to be disabled for 1 ms
and then enabled again during power cycle. Add a
function in mmc core to perform power cycle and set
the io signal to it's initial state.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-12 18:11:04 +09:00
Jean-Jacques Hiblot
318a7a576b mmc: Add a new callback function to perform the 74 clocks cycle sequence
Add a new callback function *send_init_stream* which start a sequence of
at least 74 clock cycles.
The mmc core uses *mmc_send_init_stream* in order to invoke the callback
function. This will be used during power cycle where the specification
requires such a sequence after power up.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-12 18:11:04 +09:00
Kishon Vijay Abraham I
aff5d3c83f mmc: Enable signal voltage to be selected from mmc core
Add a new function *mmc_set_signal_voltage* in mmc core
which can be used during mmc initialization to select the
signal voltage. Platform driver should use the set_ios
callback function to select the signal voltage.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-12 18:11:04 +09:00
Kishon Vijay Abraham I
2a4d212f71 mmc: make mmc_set_ios() return status
set_ios callback has a return value of 'int' but the mmc_set_ios()
function ignore this. Modify mmc_set_ios() and the callers of mmc_set_ios() to
to return the error status.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-12 18:11:04 +09:00
Jean-Jacques Hiblot
3862b85474 mmc: refactor MMC startup to make it easier to support new modes
The MMC startup process currently handles 4 modes. To make it easier to
add support for more modes, let's make the process more generic and use a
list of the modes to try.
The major functional change is that when a mode fails we try the next one.
Not all modes are tried, only those supported by the card and the host.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-12 18:11:04 +09:00
Jean-Jacques Hiblot
d0c221fe73 mmc: refactor SD startup to make it easier to support new modes
The SDcard startup process currently handles only 2 modes. To make it
easier to add support for more modes, let's make the process more generic
and use a list of the modes to try.
The major functional change is that when a mode fails we try the next one.
Not all modes are tried, only those supported by the card and the host.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-12 18:11:04 +09:00
Jean-Jacques Hiblot
7a96ec7459 cmd: mmc: display the mode name and current bus speed in the mmc info
Display the mode name when the user execute 'mmc info'. Also instead of
displaying tran_speed, display the actual bus speed.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-12 18:11:04 +09:00
Jean-Jacques Hiblot
05038576e0 mmc: use mmc modes to select the correct bus speed
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-12 18:11:04 +09:00
Jean-Jacques Hiblot
4c9d2aaa7e mmc: Add a function to dump the mmc capabilities
This adds a simple helper function to display information (bus width and
mode) based on a capability mask. Useful for debug.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-12 18:11:03 +09:00
Jean-Jacques Hiblot
35f9e196f9 mmc: introduce mmc modes
no functionnal changes.
In order to add the support for the high speed SD and MMC modes, it is
useful to track this information.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-12 18:11:03 +09:00
Jean-Jacques Hiblot
7382e691ca mmc: add a function to read and test the ext csd (mmc >= 4)
This will be reused later in the selection of high speed and ddr modes.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-12 18:11:03 +09:00
Jean-Jacques Hiblot
dfda9d88e5 mmc: make ext_csd part of struct mmc
The ext csd is used for comparison many times. Keep a reference content
of the ext csd in the struct mmc to avoid reading multiple times

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-12 18:11:03 +09:00
Jean-Jacques Hiblot
c744b6f6dc mmc: move the MMC startup for version above v4.0 in a separate function
no functionnal change. This is only to further reduce the size o
mmc_startup().

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-12 18:11:03 +09:00
Jean-Jacques Hiblot
8ac8a26304 mmc: split mmc_startup()
No functionnal change here. The function is really big and can be split.
The part related to bus configuration are put in 2 separate functions: one
for MMC and one for SD.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-12 18:11:03 +09:00
Jean-Jacques Hiblot
06ec045fee mmc: dm: get the IO-line and main voltage regulators from the dts
Get a reference to the regulator devices from the dts and store them
in the struct mmc for later use.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-12 18:11:03 +09:00
Heinrich Schuchardt
bb7b4ef370 mmc: sdhci: do not compare pointer to 0
data is defined as struct mmc_data *data.
So it should not be compared to 0.

Problem identified with Coccinelle.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2018-01-12 18:11:03 +09:00
Jorge Ramirez-Ortiz
713e6815d9 mmc: sdhci: don't clear SDHCI_INT_STATUS register during CMD_INHIBIT
Fixes emmc initialization regression on the db410c platform.

Clearing this register while SDHCI_PRESENT_STATE reports
SDHCI_CMD_INHIBIT leads to undefined behaviour on the db410c.

When commit 7dde50 was merged (mmc: sdhci: Wait for SDHCI_INT_DATA_END
when transferring), SDHCI transfers transitioned to wait for bit
SDHCI_INT_DATA_END before flagging transfers done.

Without this patch, the db410 platform fails to initialize its eMMC
due to all of its transfers timing out (SDHCI_INT_DATA_END is never
raised after all the blocks have been transferred).

Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
2018-01-12 18:11:03 +09:00
Felix Brack
339d578900 mmc: sanitize includes for DM i2c
This patch fixes some warnings when building boards that do not define
DM_I2C_COMPAT i.e. boards that entirely rely on the new i2c layer.
Signed-off-by: Felix Brack <fb@ltec.ch>
2018-01-12 18:11:03 +09:00
Suniel Mahesh
0e1746acac drivers: mmc: Avoid memory leak in case of failure
priv pointer should be freed before returning with an error value
from exynos_dwmci_get_config().

Signed-off-by: Suniel Mahesh <sunil.m@techveda.org>
Signed-off-by: Raghu Bharadwaj <raghu@techveda.org>
2018-01-12 18:11:03 +09:00
Suniel Mahesh
18e7c8f6aa drivers: mmc: Change buffer type in ALLOC_CACHE_ALIGN_BUFFER macro
__be32_to_cpu() accepts argument of type __be32. This patch changes
type of the buffer in ALLOC_CACHE_ALIGN_BUFFER macro to __be32, which
is then passed to __be32_to_cpu().
This prevents sparse build warnings.
drivers/mmc/mmc.c: warning: cast to restricted __be32

Signed-off-by: Suniel Mahesh <sunil.m@techveda.org>
Signed-off-by: Karthik Tummala <karthik@techveda.org>
2018-01-12 18:11:03 +09:00
Tom Rini
373b900341 Merge git://git.denx.de/u-boot-sunxi 2018-01-11 14:14:19 -05:00
Jagan Teki
00425e63f6 configs: sun50i: Enable eMMC on a64-olinuxino
a64-olinuxino has 8GiB eMMC, enable it.

Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-01-12 00:28:29 +05:30
Tom Rini
1a62f8597c Merge git://git.denx.de/u-boot-video 2018-01-11 13:43:36 -05:00
Tom Rini
6bf634223a Merge git://git.denx.de/u-boot-fsl-qoriq 2018-01-11 11:18:49 -05:00
Tom Rini
2ff1da9453 Merge git://git.denx.de/u-boot-socfpga 2018-01-11 11:18:41 -05:00
Tom Rini
e38c66edae Merge git://git.denx.de/u-boot-usb 2018-01-11 11:18:29 -05:00
Hannes Schmelzer
193f6fb9e8 board/BuR: drop LCDC clock manipulation from board code
The clock selection is done now from the am335x-fb code, so there is no
more need doing this in the board code.

Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
2018-01-11 15:20:30 +01:00
Hannes Schmelzer
0fcec57752 board/BuR: provide real clock-frequency instead a divider
Actual am335x-fb implementation takes now a real clock frequency instead
a divider. So this component doesn't need to know anymore some base
frequency of the LCDC, we simply provide the pixel-clock frequency.

Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
2018-01-11 15:19:51 +01:00
Hannes Schmelzer
8a094f508c am335x-fb: setup display PLL
The LCDC IP-core an be feed from several clock sources, one of those is
a dedicated DPLL for generating a dividable base-clock for this IP-core.

The TRM specifies the maximum input frequency for the LCCD with 200 MHz,
so we must not exceed this value with the PLL frequency (which can lock
much higher).

This patch tries every combination of multipliers and divisors of the
PLL and the IP-core itself for getting as near as possible the the
requested panel->pxl_clk.

Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
2018-01-11 15:19:12 +01:00
Hannes Schmelzer
0d8a7d6fa8 am335x-fb: cosmetic: fix coding style
Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
2018-01-11 15:18:28 +01:00
Hannes Schmelzer
e880a5e219 am335x-fb: cosmetic: update-copyright
Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
2018-01-11 15:17:09 +01:00
Hannes Schmelzer
3215192922 mach-omap2: add AM335x Display PLL register definition
Adds the register definition of the Display DPLL

Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
2018-01-11 15:16:34 +01:00
Sumit Garg
1cabeb88eb ls1088ardb: Add SD Secure boot target support
Signed-off-by: Udit Agarwal <udit.agarwal@nxp.com>
Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
[YS: run moveconfig.py -s]
Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-10 12:32:45 -08:00
Sumit Garg
10e7eaf04a armv8: ls1088a: SPL size reduction
Using changes in this patch we were able to reduce approx 8k
size of u-boot-spl.bin image. Following is breif description of
changes to reduce SPL size:
1. Changes in board/freescale/ls1088a/Makefile to remove
   compilation of eth.c and cpld.c in case of SPL build.
2. Changes in board/freescale/ls1088a/ls1088a.c to keep
   board_early_init_f funcations in case of SPL build.
3. Changes in ls1088a_common.h & ls1088ardb.h to remove driver
   specific macros due to which static data was being compiled in
   case of SPL build.

Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-10 12:31:31 -08:00
Sumit Garg
dcb081ba95 armv8: fsl-layerscape: SPL size reduction
Compile-off mp.c and libfdt.c in case of SPL build. SPL size reduces
by approx 2k.

Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-10 12:31:19 -08:00
Bao Xiaowei
7abcd0c018 Powerpc: T208xQDS: Modify the comment of the CONFIG_FSL_PCIE_RESET macro
Remove duplicate macro CONFIG_FSL_PCIE_RESET and update its comment.
It enables PCIe reset to fix link width 2x - 4x.

Signed-off-by: Bao Xiaowei <xiaowei.bao@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-10 12:30:50 -08:00
Alison Wang
ab0ab54e49 armv8: Implement workaround for Cortex-A53 erratum 855873
855873: An eviction might overtake a cache clean operation
Workaround: The erratum can be avoided by upgrading cache clean by
address operations to cache clean and invalidate operations. For
Cortex-A53 r0p3 and later release, this can be achieved by setting
CPUACTLR.ENDCCASCI to 1.

This patch is to implement the workaround for this erratum.

Signed-off-by: Alison Wang <alison.wang@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-10 12:29:57 -08:00
Ahmed Mansour
541d57663f configs: Move SYS_DPAA_QBMAN to Kconfig
The CONFIG_SYS_DPAA_QBMAN define is used by DPAA1 freescale SOCs to
add device tree fixups that allow deep sleep in Linux. The define was
placed in header files included by a number of boards, but was not
explicitly documented in any of the Kconfigs. A description was added
to the drivers/networking menuconfig and default selection for
current SOCs that have this part

Signed-off-by: Ahmed Mansour <ahmed.mansour@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-10 12:28:58 -08:00
Ahmed Mansour
44262327aa drivers/misc: Share qbman init between archs
This patch adds changes necessary to move functionality present in
PowerPC folders with ARM architectures that have DPAA1 QBMan hardware

- Create new board/freescale/common/fsl_portals.c to house shared
  device tree fixups for DPAA1 devices with ARM and PowerPC cores
- Add new header file to top includes directory to allow files in
  both architectures to grab the function prototypes
- Port inhibit_portals() from PowerPC to ARM. This function is used in
  setup to disable interrupts on all QMan and BMan portals. It is
  needed because the interrupts are enabled by default for all portals
  including unused/uninitialised portals. When the kernel attempts to
  go to deep sleep the unused portals prevent it from doing so

Signed-off-by: Ahmed Mansour <ahmed.mansour@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-10 12:28:47 -08:00
Yuantian Tang
1b76f3b8ab armv8: layerscape: sata: refine port register configuration
Sata registers PP2C and PP3C are used to control the configuration
of the PHY control OOB timing for the COMINIT/COMWAKE parameters
respectively. Calculate those parameters from port clock frequency.
Overwrite those registers with calculated values to get better OOB
timing.

Signed-off-by: Tang Yuantian <andy.tang@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-10 12:28:14 -08:00
Ashish Kumar
fa60abc6e6 armv8: ls1088 : MC alignment should always be fixed to 512MB
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-10 12:27:36 -08:00
Tom Rini
084edbb689 Merge git://git.denx.de/u-boot-marvell 2018-01-10 08:05:57 -05:00
Tom Rini
ec75fab302 build: Drop CONFIG_SPL_BUILD guards in some cases
Given gcc-6.1 and later we can now safely have strings discarded when
the functions are unused.  This lets us drop certain cases of not
building something so that we don't have the strings brought in when the
code was discarded.  Simplify the code now by dropping guards we don't
need now.

Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Chander Kashyap <k.chander@samsung.com>
Cc: Thomas Abraham <thomas.ab@samsung.com>
Cc: Vipin Kumar <vipin.kumar@st.com>
Cc: Wenyou Yang <wenyou.yang@microchip.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-01-10 08:05:52 -05:00
Jean-Jacques Hiblot
2c33b0c7d8 fat write: Fixed a problem with the case of file names when writing files
commit 21a24c3bf3 ("fs/fat: fix case for FAT shortnames") made it
possible that get_name() returns file names with some upper cases.
find_directory_entry() must be updated to take this account, and use
case-insensitive functions to compare file names.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-10 08:05:51 -05:00
Masahiro Yamada
75db00eea0 linux/kernel.h: Add ALIGN_DOWN macro
Follow Linux commit ed067d4a859f ("linux/kernel.h: Add ALIGN_DOWN
macro").

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-01-10 08:05:51 -05:00
Tuomas Tynkkynen
e7dd4f9b0c sh: Drop unreferenced CONFIG_* defines
The following config symbols are only defined once and never referenced
anywhere else:

CONFIG_AP325RXA
CONFIG_AP_SH4A_4A
CONFIG_CPU_SH_TYPE_R
CONFIG_ECOVEC
CONFIG_ESPT
CONFIG_MIGO_R
CONFIG_MPR2
CONFIG_MS7720SE
CONFIG_MS7722SE
CONFIG_MS7750SE
CONFIG_R0P7734
CONFIG_R2DPLUS
CONFIG_RSK7203
CONFIG_RSK7264
CONFIG_RSK7269
CONFIG_SH7752EVB
CONFIG_SH7753EVB
CONFIG_SH7757LCR
CONFIG_SH7763RDP
CONFIG_SH7785LCR

Most of them are config symbols named after the respective boards which
seems to have been a standard practice at some point.

Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
2018-01-10 08:05:51 -05:00
Tuomas Tynkkynen
cfb8462aae ARM: Drop unreferenced CONFIG_MACH_* defines
These macros are all defined once and never checked or used anywhere:

CONFIG_MACH_ASPENITE
CONFIG_MACH_DAVINCI_CALIMAIN
CONFIG_MACH_DOCKSTAR
CONFIG_MACH_EDMINIV2
CONFIG_MACH_GOFLEXHOME
CONFIG_MACH_GONI
CONFIG_MACH_GURUPLUG
CONFIG_MACH_KM_KIRKWOOD
CONFIG_MACH_OPENRD_BASE
CONFIG_MACH_SHEEVAPLUG

Almost all of them were only used for the mach_is_foo() logic in
arch/arm/asm/mach-types.h that were dropped in
commit f9dadaef8b ("arm: Re-sync asm/mach-types.h with
Linux Kernel v4.9")

Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
2018-01-10 08:05:50 -05:00
Sekhar Nori
b5914419eb configs: am57xx_evm: fix ethernet phy configuration
Configure AM57xx EVMs for the exact PHY part that is
present on the various boards. This makes U-Boot apply
configurations needed for this PHY like centering the
FLP timing.

For configurations to take effect, DM_ETH needs to be
enabled. Do that too.

Tested on BeagleBoard x15 and AM571x IDK.

Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2018-01-10 08:05:50 -05:00
Philipp Tomsich
9464dd56dc Travis-CI: Split 't208xrdb t4qds t102*'-job into separate jobs
The 't208xrdb t4qds t102*' job is close to the time limit and
sometimes fails, so this splits it into 3 separate jobs.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-01-10 08:05:50 -05:00
Tuomas Tynkkynen
55acf49eab PCI: Drop CONFIG_TSI108_PCI
Last user of this option went away in 2015 in commit:
d928664f41 ("powerpc: 74xx_7xx: remove 74xx_7xx cpu support")

Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
2018-01-10 08:05:49 -05:00
Henry Zhang
a8798a6114 BCM283x ALT5 function for JTAG pins
BCM2835 ARM Peripherals doc shows gpio pins 4, 5, 6, 12 and 13 carry altenate
function, ALT5 for ARM JTAG

Signed-off-by: Henry Zhang <henryzhang62@yahoo.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-10 08:05:49 -05:00
Patrice Chotard
8a71138da3 configs: stm32f746-disco: enable MMC related flags
STM32F469-disco embeds an arm_pl180 mmc IP, so
enable CMD_MMC, DM_MMC and ARM_PL180_MMCI flags.

Also enables all filesystem command related flags :
  _ CMD_EXT2
  _ CMD_EXT4
  _ CMD_FAT
  _ CMD_FS_GENERIC
  _ CMD_GPT
  _ CMD_BOOTZ

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-10 08:05:49 -05:00
Patrice Chotard
77729bd744 ARM: DTS: stm32: add MMC nodes for stm32f746-disco and stm32f769-disco
Add DT nodes to enable ARM_PL180_MMCI IP support for STM32F746
and STM32F769 discovery boards

There is a hardware issue on these boards, it misses a pullup on the GPIO line
used as card detect to allow correct SD card detection.
As workaround, cd-gpios property is not present in DT.
So SD card is always considered present in the slot.

Signed-off-by: Christophe Priouzeau <christophe.priouzeau@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-10 08:05:48 -05:00
Patrice Chotard
45be08822f ARM: DTS: stm32: add SDIO controller support for stm32f469-disco
STM32F469 SoC uses an arm_pl180_mmci SDIO controller.

Signed-off-by: Andrea Merello <andrea.merello@gmail.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-01-10 08:05:48 -05:00
Patrice Chotard
c0cdd5adc8 board: stm32: add stm32f469-discovery board support
This board offers :

 _ STM32F469NIH6 microcontroller featuring 2 Mbytes of Flash memory
   and 324 Kbytes of RAM in BGA216 package
 _ On-board ST-LINK/V2-1 SWD debugger, supporting USB reenumeration capability:
     _ Mbed-enabled (mbed.org)
     _ USB functions: USB virtual COM port, mass storage, debug port
 _ 4 inches 800x480 pixel TFT color LCD with MIPI DSI interface and capacitive
   touch screen
 _ SAI Audio DAC, with a stereo headphone output jack
 _ 3 MEMS microphones
 _ MicroSD card connector
 _ I2C extension connector
 _ 4Mx32bit SDRAM
 _ 128-Mbit Quad-SPI NOR Flash
 _ Reset and wake-up buttons
 _ 4 color user LEDs
 _ USB OTG FS with Micro-AB connector
 _ Three power supply options:
 _ Expansion connectors and Arduino™ UNO V3 connectors

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-01-10 08:05:47 -05:00
Patrice Chotard
d95faab201 ARM: DTS: stm32: add stm32f469-disco-u-boot dts file
_ Add gpio compatible and aliases for stm32f469

  _ Add FMC sdram node

  _ Add "u-boot,dm-pre-reloc" for rcc, fmc, fixed-clock, pinctrl,
    pwrcfg and gpio nodes.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-01-10 08:05:47 -05:00
Patrice Chotard
003b4c1e76 ARM: DTS: add STM32F469 Discovery board support
This DT file comes from kernel v4.15-rc1

stm32f469-pinctrl.dtsi header has been updated with correct
STMicroelectronics Copyright.

Remove the paragraph about writing to the Free Software
Foundation's mailing address as requested by checkpatch.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-01-10 08:05:47 -05:00
Patrice Chotard
0b3f789ad1 ram: stm32: add memory mapping selection support
This allows to controls the memory internal mapping at
address 0x0000 0000.
We can either map at 0x0000 0000 :
  _ main flash memory
  _ system flash memory
  _ FMC bank1 (NOR/PSRAM 1 and 2)
  _ embedded SRAM
  _ FMC/SDRAM bank1

This is needed for future STM32F469-disco board

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-01-10 08:05:47 -05:00
Patrice Chotard
c8f787760e board: stm32f429-disco: switch to DM STM32 pinctrl and gpio driver
Use available DM stm32f7_gpio.c and pinctrl_stm32.c drivers
instead of board GPIO initialization.

Remove stm32_gpio.c which is no more used and migrate
structs stm32_gpio_regs and stm32_gpio_priv into
arch-stm32f4/gpio.h to not break compilation.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-01-10 08:05:46 -05:00
Patrice Chotard
4a56fd484a board: stm32f429-disco: switch to DM STM32 clock driver
Use available DM clk_stm32f.c driver instead of dedicated
mach-stm32/stm32f4/clock.c.

Migrate periph_clock defines from stm32_periph.h directly in
CLK driver. These periph_clock defines will be removed when STMMAC,
TIMER2 and SYSCFG drivers will support DM CLK.

Enable also CLK flag.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-01-10 08:05:46 -05:00
Patrice Chotard
dcb11959d8 mach-stm32: stmf32f4: timer: remove clock_get() call
In order to use common clock driver between STM32F4 and
STM32F7, remove clock_get() call
As APB_PSC is always set to 2, only case when
clock_get(CLOCK_AHB) != clock_get(CLOCK_APB1) is kept

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-01-10 08:05:46 -05:00
Patrice Chotard
2d18d72858 board: stm32f429-disco: switch to DM STM32 serial driver
Remove serial_stm32.c driver and uart init from board file,
use available DM serial_stm32x7.c driver compatible for
STM32F4/F7 and H7 SoCs.

The serial_stm32x7.c driver will be renamed later with a more
generic name as it's shared with all STM32 Socs.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-01-10 08:05:46 -05:00
Patrice Chotard
a05707004d configs: stm32f429-disco: enable MISC, STM32_RCC, DM_RESET and STM32_RESET
This allows to support rcc MFD driver.
By enabling all these flags, we need to increase malloc area to avoid
crash during early stage.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-01-10 08:05:46 -05:00
Patrice Chotard
98693c22d9 pinctrl: stm32: add stm32f4 pinctrl compatible strings
STM32F4 SoCs uses the same pinctrl block as found into
STM32F7 and H7 SoCs.
We can add "st,stm32f429-pinctrl" and "st,stm32f469-pinctrl"
compatible string into pinctrl_stm32.c.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-01-10 08:05:45 -05:00
Patrice Chotard
7fd65ef552 board: stm32f429-discovery: switch to DM STM32 sdram driver
Use available DM stm32_sdram.c driver instead of board
SDRAM initialization.
For that, enable OF_CONTROL, OF_EMBED and STM32_SDRAM flags.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-01-10 08:05:45 -05:00
Patrice Chotard
791651e390 ARM: DTS: stm32: add stm32f429-disco-u-boot dts file
_ Add gpio compatible and aliases for stm32f429

_ Add FMC sdram node with associated new bindings value to
  manage second bank (ie bank 1).

_ Add "u-boot,dm-pre-reloc" for rcc, fmc, fixed-clock, pinctrl,
  pwrcfg and gpio nodes.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-01-10 08:05:45 -05:00
Patrice Chotard
46b1e54b18 ARM: DTS: stm32: add STM32F429 SoC and its Discovery board support
All these files comes from kernel v4.15-rc1.

Update some header with correct STMicroelectronics Copyright.

Remove the paragraph about writing to the Free Software
Foundation's mailing address as requested by checkpatch.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-01-10 08:05:45 -05:00
Chris Packham
0a05bf42b4 ARM: mvebu: correct reference for "ethernet1" on DB-88F6820-AMC
The DB-88F6820-AMC connects ethernet@34000 and ethernet@70000 which are
labeled as eth2 and eth0 in armada-38x.dts. The ethernet@30000 (eth1) is
not used on the AMC board.

This eliminates the following bootup message

  Device 'ethernet@70000': seq 0 is in use by 'ethernet@34000'

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-01-10 12:36:52 +01:00
Eddie Cai
c3d098e762 rockchip: rk3288: enable rockusb support on rk3288 based device
this patch enable rockusb support on rk3288 based device.

Signed-off-by: Eddie Cai <eddie.cai.linux@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-10 11:11:06 +01:00
Eddie Cai
1c977772a6 rockchip:usb: add a simple readme for rockusb
add a simple readme to introduce rockusb and tell people how to use it

Signed-off-by: Eddie Cai <eddie.cai.linux@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-10 11:11:06 +01:00
Eddie Cai
453c95e01a usb: rockchip: add rockusb command
this patch add rockusb command. the usage is
rockusb <USB_controller> <devtype> <dev[:part]>
e.g. rockusb 0 mmc 0

Signed-off-by: Eddie Cai <eddie.cai.linux@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-10 11:11:06 +01:00
Eddie Cai
bf2b72bef1 usb: rockchip: add the rockusb gadget
this patch implement rockusb protocol on the device side. this is based on
USB download gadget infrastructure. the rockusb function implements the rd,
wl, rid commands. it can work with rkdeveloptool

Signed-off-by: Eddie Cai <eddie.cai.linux@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-10 11:11:05 +01:00
Chen-Yu Tsai
f4f9896ac3 musb: sunxi: Use base address from device tree
Now that the musb sunxi glue driver is completely device model / device
tree driven, we should use the base address from the device tree,
instead of hard-coding it in the source code.

Fixes: 3a61b080ac ("musb: sunxi: switch to the device model")
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
2018-01-10 11:11:05 +01:00
Miquel Raynal
32466c445c doc: bindings: soft-spi: update documentation to match the code
Linux bindings have been introduced in the code (removing the U-Boot
specific ones) without documentation update. Compatible string has
changed, as well as the four GPIO properties. Reflect this by updating
the soft-spi.txt documentation.

Fixes: 102412c415 ("dm: spi: soft_spi: switch to use linux compatible string")
Signed-off-by: Miquel Raynal <miquel.raynal@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2018-01-10 12:06:15 +05:30
Tuomas Tynkkynen
34439f73d9 ARM: sunxi: Remove left-over cd-inverted property from pcDuino3
Commit 8620f38409 ("dm: sunxi: Linksprite_pcDuino3: Correct polarity
of MMC card detect") claims that the Pcduino3 device tree had an
incorrect polarity for the card detect pin and thus changed the polarity
flag of the cd-gpios from GPIO_ACTIVE_HIGH to GPIO_ACTIVE_LOW.

Actually the DT was correct since according to the mmc binding, a
combination of GPIO_ACTIVE_HIGH + cd-inverted results in an active-low
polarity. But because the U-Boot driver lacks the code to look at the
cd-inverted property (unlike the Linux driver) it interpreted the
polarity of active-high. Thus, after that commit the DT is actually
wrong from the binding/Linux point of view.

To make both Linux and U-Boot interpret the DT in the same way, just
drop the left-over cd-inverted property. I've sent a Linux patch to
switch all sunxi DTs over to not using the cd-inverted property, so
eventually all sunxi boards in U-Boot will be consistent in not using
cd-inverted.

Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2018-01-10 11:37:09 +05:30
Maxime Ripard
3afdfd8ddc sunxi: maintainers: Add myself for the TBS A711
Support for that board got introduced recently without the maintainers
part. Let's fix that.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2018-01-10 11:30:49 +05:30
Chen-Yu Tsai
afe2754412 sunxi: Add support for Libre Computer Board ALL-H3-CC H3 ver.
The Libre Computer Board ALL-H3-CC from Libre Technology is a Raspberry
Pi B+ form factor single board computer based on the Allwinner H3 SoC.
The board has 1GB DDR3 SDRAM, provided by 4 2Gb chips. The mounting holes
and connectors are in the exact same position as on the Raspberry Pi B+.

Raspberry Pi B+ like peripherals supported on this board include:

  - Power input through micro-USB connector (without USB OTG)
  - Native 100 Mbps ethernet using the internal PHY, as opposed to
    USB-based on the RPi
  - 4x USB 2.0 host ports, directly connected to the SoC, as opposed to
    being connected through a USB 2.0 hub on the RPi
  - TV and audio output on a 3.5mm TRRS jack
  - HDMI output
  - Micro-SD card slot
  - Standard RPi B+ GPIO header, with the standard peripherals routed to
    the same pins.

    * 5V, 3.3V power, and ground
    * I2C0 on the H3 is routed to I2C1 pins on the RPi header
    * I2C1 on the H3 is routed to I2C0 pins on the RPi header
    * UART1 on the H3 is routed to UART0 pins on the RPi header
    * SPI0 on the H3 is routed to SPI0 pins on the RPi header,
      with GPIO pin PA17 replacing the missing Chip Select 1
    * I2S1 on the H3 is routed to PCM pins on the RPi header

  - Additional peripherals from the H3 are available on different pins.
    These include I2S0, JTAG, PWM1, SPDIF, SPI1, and UART3

In addition, there are a number of new features:

  - Console UART header
  - Consumer IR receiver
  - Camera interface (not compatible with RPi)
  - Onboard microphone
  - eMMC expansion module port
  - Heatsink mounting holes

This patch adds defconfig and dts files for this board. The dts file is
the same as the one submitted for inclusion in Linux, with some minor
revisions to match the dtsi file and old EMAC bindings in U-boot.

Since the OTG controller is wired to a USB host port, and the H3 has
proper USB hosts to handle host mode, the MUSB driver is not enabled.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2018-01-10 11:27:41 +05:30
Siarhei Siamashka
d852600ef0 arm: Exercise v7_arch_cp15_set_acr even without errata fixups
By applying this patch, we are ensuring that the code paths
responsible for applying errata workarounds are also exercised
on CPU revisions, which actually don't need these workarounds.

Only CONFIG_ARM_ERRATA_621766, CONFIG_ARM_ERRATA_454179,
CONFIG_ARM_ERRATA_725233 and CONFIG_ARM_ERRATA_430973 are
covered by this patch (Cortex-A8).

This improves code coverage when testing U-Boot builds
on newer hardware. In particular, the problematic commit
00bbe96eba ("arm: omap: Unify get_device_type() function")
would break both BeageBoard and BeagleBoard XM rather than
just older BeagleBoard.

As an additional bonus, we need fewer instructins and the SPL
size is reduced.

Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-01-09 15:31:14 -05:00
Tom Rini
98691a60ab Merge git://git.denx.de/u-boot-rockchip 2018-01-09 13:28:51 -05:00
Miquel Raynal
3f3946d30d pinctrl: mvebu: Make drivers depend on the pinctrl framework
Armada pinctrl drivers shall not be compiled without the entire pinctrl
framework and thus lack a "depends on" condition, otherwise the driver
will simply not be probed.

Signed-off-by: Miquel Raynal <miquel.raynal@free-electrons.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-01-09 16:41:00 +01:00
Miquel Raynal
e7ab2ccd15 ARM: mvebu: Allow MVNETA to be selected with Armada 3700 SoCs
Until now, Armada 3700 SoCs could not enable the mvneta driver, and thus
did not benefit from Ethernet support. Add ARMADA_3700 in the
"depends on" list of the MVNETA Kconfig entry.

Signed-off-by: Miquel Raynal <miquel.raynal@free-electrons.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-01-09 16:41:00 +01:00
Florian Klink
0f70d705cf arm: mvebu: ClearFog: document boot selection switches, update UART
Signed-off-by: Florian Klink <flokli@flokli.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-01-09 16:41:00 +01:00
Andre Heider
6779d65b9f arm64: a37xx: use distro bootcmd
Signed-off-by: Andre Heider <a.heider@gmail.com>
Reviewed-by: Konstantin Porotchkin <kostap@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-01-09 16:41:00 +01:00
Andre Heider
e4e18a8acb arm64: a37xx: defconfigs: enable CONFIG_DISTRO_DEFAULTS
Signed-off-by: Andre Heider <a.heider@gmail.com>
Reviewed-by: Konstantin Porotchkin <kostap@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-01-09 16:41:00 +01:00
Andre Heider
e1489ba89d arm64: a37xx: add distro compatible env vars
the values of dt_addr_r/kernel_addr_r/ramdisk_addr_r are taken from
the downstream 'u-boot-2017.03-armada-17.10' release.

the chosen values of scriptaddr and pxefile_addr_r are below fdt_addr_r,
in 1MB steps.

Signed-off-by: Andre Heider <a.heider@gmail.com>
Reviewed-by: Konstantin Porotchkin <kostap@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-01-09 16:41:00 +01:00
Andre Heider
d7da570770 arm64: a37xx: use disto defaults
Signed-off-by: Andre Heider <a.heider@gmail.com>
Reviewed-by: Konstantin Porotchkin <kostap@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-01-09 16:41:00 +01:00
Konstantin Porotchkin
eee4835d22 tools: Add Marvell recovery image download script
Introduce the recovery image download script for usage with
Marvell Armada SoC families (excepting 37xx family).
Since Marvell BootROM uses a sliding window in UART buffer
for detecting escape sequence during the boot, it's easier
to interrupt the normal boot flow by sending a long stream
of chained escape sequences to the serial port instead of
periodically sending a single escape sequence as it is done
by kwboot utility.
Additional benefit of using this script is the ability to
adjust the escape sequence stream length withoiut need for
compilation.

Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Igal Liberman <igall@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-01-09 16:41:00 +01:00
Tom Rini
8c9e6f2817 Merge git://git.denx.de/u-boot-uniphier 2018-01-09 08:45:02 -05:00
Masahiro Yamada
a322eb9ff6 ARM: uniphier: hide memory top by platform hook instead of CONFIG
I do not see a good reason to do this by a CONFIG option that affects
all SoCs.  The ram_size can be adjusted by dram_init() at run-time.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-01-09 21:58:19 +09:00
Masahiro Yamada
3281532ab2 ARM: uniphier: enable CONFIG_MMC_SDHCI_SDMA for ARMv8 SoCs
I did not enable SDMA when I added sdhci-cadence support because LD20
boards are equipped with a large amount memory beyond 32 bit address
range, but SDMA does not support the 64bit address.  U-Boot relocates
itself to the end of effectively available RAM.  This would make the
MMC enumeration fail because the buffer for EXT_CSD allocated in the
stack would go too high, then SDMA would fail to transfer data.

Recent SDHCI-compatible controllers support ADMA, but unfortunately
U-Boot does not support ADMA.

In the previous commit, I hided the DRAM area that exceeds the 32 bit
address range.  Now, I can enable CONFIG_MMC_SDHCI_SDMA.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-01-09 21:58:18 +09:00
Masahiro Yamada
be893a5c09 ARM: uniphier: do not use RAM that exceeds 32 bit address range
LD20 / PXs3 boards are equipped with a large amount of memory beyond
the 32 bit address range.  U-Boot relocates itself to the end of the
available RAM.

This is a problem for DMA engines that only support 32 bit physical
address, like the SDMA of SDHCI controllers.

In fact, U-Boot does not need to run at the very end of RAM.  It is
rather troublesome for drivers with DMA engines because U-Boot does
not have API like dma_set_mask(), so DMA silently fails, making the
driver debugging difficult.

Hide the memory region that exceeds the 32 bit address range.  It can
be done by simply carving out gd->ram_size.  It would also possible to
override get_effective_memsize() or to define CONFIG_MAX_MEM_MAPPED,
but dram_init() is a good enough place to do this job.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-01-09 21:58:17 +09:00
Tom Rini
b4b9814f1c arm: socfpga: Guard commands with CONFIG_SPL_BUILD tests
In order for these commands to not be included in SPL we need to guard
compilation with CONFIG_SPL_BUILD checks.  Reorganize some sections of
code slightly in order to avoid new warnings and mark the command
functions as static as they should have been before.

Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-01-09 12:38:55 +01:00
Andrey Zhizhikin
08cc52abc9 ARM: socfpga: Enable part command for socfpga platform
Enable CONFIG_CMD_PART item, as default environment requires it
and complains this command in unknown.

Signed-off-by: Andrey Zhizhikin <andrey.z@gmail.com>
2018-01-09 12:38:55 +01:00
Ran Wang
91f4fb9b89 arm64: layerscape: Move CONFIG_HAS_FSL_DR_USB to Kconfig
Rename to USB_EHCI_FSL, use Kconfig to select ehci accordingly.

Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
2018-01-09 12:37:15 +01:00
Ran Wang
be3872ea81 usb: ehci: fsl: Fix some compile warnings.
When enable CONFIG_HAS_FSL_DR_USB, we might encounter below compile
warning, apply this patch can fix it:

drivers/usb/host/ehci-fsl.c:109:4: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast]
   ((u32)hccr + HC_LENGTH(ehci_readl(&hccr->cr_capbase)));
    ^
drivers/usb/host/ehci-fsl.c:108:9: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
  hcor = (struct ehci_hcor *)
         ^
drivers/usb/host/ehci-fsl.c:115:8: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast]
        (u32)hccr, (u32)hcor,
        ^
include/log.h:131:26: note: in definition of macro 'debug_cond'
    printf(pr_fmt(fmt), ##args); \
                          ^~~~
drivers/usb/host/ehci-fsl.c:114:2: note: in expansion of macro 'debug'
  debug("ehci-fsl: init hccr %x and hcor %x hc_length %d\n",
  ^~~~~
drivers/usb/host/ehci-fsl.c:115:19: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast]
        (u32)hccr, (u32)hcor,
                   ^
include/log.h:131:26: note: in definition of macro 'debug_cond'
    printf(pr_fmt(fmt), ##args); \
                          ^~~~
drivers/usb/host/ehci-fsl.c:114:2: note: in expansion of macro 'debug'
  debug("ehci-fsl: init hccr %x and hcor %x hc_length %d\n",
  ^~~~~

Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
2018-01-09 12:37:15 +01:00
Ran Wang
8d9c3c2253 armv8: ls1012a: Add USB 2.0 controller phy type for ls1012aqds board
Without this propertiy, U-Boot will pop warning of 'USB phy type not
defined' when select CONFIG_HAS_FSL_DR_USB.

Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
2018-01-09 12:37:15 +01:00
Elaine Zhang
538f67c332 rockchip: clk: bind reset driver
Bind rockchip reset to clock-controller with rockchip_reset_bind().

Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-01-09 11:13:32 +01:00
Elaine Zhang
760188c1aa rockchip: reset: support a (common) rockchip reset drivers
Create driver to support the soft reset (i.e. peripheral)
of all Rockchip SoCs.

Example of usage:
i2c driver:
	ret = reset_get_by_name(dev, "i2c", &reset_ctl);
	if (ret) {
		error("reset_get_by_name() failed: %d\n", ret);
	}

	reset_assert(&reset_ctl);
	udelay(50);
	reset_deassert(&reset_ctl);

i2c dts node:
resets = <&cru SRST_P_I2C1>, <&cru SRST_I2C1>;
reset-names = "p_i2c", "i2c";

Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
[Fixed commit tag:]
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-01-09 11:13:32 +01:00
11741 changed files with 365373 additions and 135460 deletions

View File

@@ -25,3 +25,6 @@
# Ignore "WARNING: Prefer ether_addr_copy() over memcpy() if the Ethernet
# addresses are __aligned(2)".
--ignore PREFER_ETHER_ADDR_COPY
# A bit shorter of a description is OK with us.
--min-conf-desc-length=2

31
.gitignore vendored
View File

@@ -3,26 +3,30 @@
# subdirectories here. Add them in the ".gitignore" file
# in that subdirectory instead.
#
# Normal rules
# Normal rules (sorted alphabetically)
#
.*
*.a
*.bin
*.cfgout
*.dtb
*.dtb.S
*.elf
*.exe
*.gcda
*.gcno
*.i
*.lex.c
*.lst
*.mod.c
*.o
*.o.*
*.a
*.order
*.patch
*.s
*.su
*.mod.c
*.i
*.lst
*.order
*.elf
*.swp
*.bin
*.patch
*.cfgtmp
# host programs on Cygwin
*.exe
*.tab.[ch]
# Build tree
/build-*
@@ -46,7 +50,6 @@ fit-dtb.blob
#
# Generated files
#
/LOG
/spl/
/tpl/
/defconfig

View File

@@ -34,3 +34,5 @@ Wolfgang Denk <wdenk>
York Sun <yorksun@freescale.com>
York Sun <york.sun@nxp.com>
Łukasz Majewski <l.majewski@samsung.com>
Lukasz Majewski <lukma@denx.de>
Mirza <Taimoor_Mirza@mentor.com>

View File

@@ -1,5 +1,5 @@
# SPDX-License-Identifier: GPL-2.0+
# Copyright Roger Meier <r.meier@siemens.com>
# SPDX-License-Identifier: GPL-2.0+
# build U-Boot on Travis CI - https://travis-ci.org/
@@ -21,12 +21,18 @@ addons:
- python-virtualenv
- swig
- libpython-dev
- gcc-powerpc-linux-gnu
- iasl
- grub-efi-ia32-bin
- rpm2cpio
- wget
- device-tree-compiler
- lzop
- liblz4-tool
before_install:
- sudo add-apt-repository ppa:ubuntu-toolchain-r/test -y
- sudo apt-get update -q
- sudo apt-get install libisl15 -y
install:
# Clone uboot-test-hooks
@@ -35,17 +41,18 @@ install:
- ln -s travis-ci /tmp/uboot-test-hooks/py/`hostname`
# prepare buildman environment
- echo -e "[toolchain]\nroot = /usr" > ~/.buildman
- echo -e "aarch64 = /tmp/gcc-linaro-6.3.1-2017.02-x86_64_aarch64-linux-gnu" >> ~/.buildman
- echo -e "arm = /tmp/gcc-linaro-6.3.1-2017.02-x86_64_arm-linux-gnueabihf" >> ~/.buildman
- echo -e "arc = /tmp/arc_gnu_2016.09_prebuilt_uclibc_le_archs_linux_install" >> ~/.buildman
- echo -e "\n[toolchain-alias]\nsh = sh4\nopenrisc = or32" >> ~/.buildman
- echo -e "arc = /tmp/arc_gnu_2017.09_prebuilt_uclibc_le_archs_linux_install" >> ~/.buildman
- echo -e "\n[toolchain-alias]\nsh = sh2\n" >> ~/.buildman
- cat ~/.buildman
- virtualenv /tmp/venv
- . /tmp/venv/bin/activate
- pip install pytest
- pip install python-subunit
- grub-mkimage -o ~/grub_x86.efi -O i386-efi normal echo lsefimmap lsefi lsefisystab efinet tftp minicmd
- mkdir ~/grub2-arm
- ( cd ~/grub2-arm; wget -O - http://download.opensuse.org/ports/armv7hl/distribution/leap/42.2/repo/oss/suse/armv7hl/grub2-arm-efi-2.02~beta2-87.1.armv7hl.rpm | rpm2cpio | cpio -di )
- mkdir ~/grub2-arm64
- ( cd ~/grub2-arm64; wget -O - http://download.opensuse.org/ports/aarch64/distribution/leap/42.2/repo/oss/suse/aarch64/grub2-arm64-efi-2.02~beta2-87.1.aarch64.rpm | rpm2cpio | cpio -di )
env:
global:
@@ -61,22 +68,29 @@ before_script:
- if [[ "${TOOLCHAIN}" == *microblaze* ]]; then ./tools/buildman/buildman --fetch-arch microblaze ; fi
- if [[ "${TOOLCHAIN}" == *mips* ]]; then ./tools/buildman/buildman --fetch-arch mips ; fi
- if [[ "${TOOLCHAIN}" == *or32* ]]; then ./tools/buildman/buildman --fetch-arch or32 ; fi
- if [[ "${TOOLCHAIN}" == *sh4* ]]; then ./tools/buildman/buildman --fetch-arch sh4 ; fi
- if [[ "${TOOLCHAIN}" == *sh* ]]; then ./tools/buildman/buildman --fetch-arch sh2 ; fi
- if [[ "${TOOLCHAIN}" == *x86_64* ]]; then
./tools/buildman/buildman --fetch-arch x86_64;
echo -e "\n[toolchain-prefix]\nx86 = ${HOME}/.buildman-toolchains/gcc-4.9.0-nolibc/x86_64-linux/bin/x86_64-linux-" >> ~/.buildman;
echo -e "\n[toolchain-prefix]\nx86 = ${HOME}/.buildman-toolchains/gcc-7.3.0-nolibc/x86_64-linux/bin/x86_64-linux-" >> ~/.buildman;
fi
- if [[ "${TOOLCHAIN}" == arc ]]; then
wget https://github.com/foss-for-synopsys-dwc-arc-processors/toolchain/releases/download/arc-2016.09-release/arc_gnu_2016.09_prebuilt_uclibc_le_archs_linux_install.tar.gz &&
tar -C /tmp -xf arc_gnu_2016.09_prebuilt_uclibc_le_archs_linux_install.tar.gz;
wget https://github.com/foss-for-synopsys-dwc-arc-processors/toolchain/releases/download/arc-2017.09-release/arc_gnu_2017.09_prebuilt_uclibc_le_archs_linux_install.tar.gz &&
tar -C /tmp -xf arc_gnu_2017.09_prebuilt_uclibc_le_archs_linux_install.tar.gz;
fi
- if [[ "${TOOLCHAIN}" == *xtensa* ]]; then
wget https://github.com/foss-xtensa/toolchain/releases/download/2018.02/x86_64-2018.02-${TOOLCHAIN}.tar.gz &&
tar -C /tmp -xf x86_64-2018.02-${TOOLCHAIN}.tar.gz &&
echo -e "\n[toolchain-prefix]\nxtensa = /tmp/2018.02/${TOOLCHAIN}/bin/${TOOLCHAIN}-" >> ~/.buildman;
fi
- if [[ "${TOOLCHAIN}" == *xtensa* ]]; then ./tools/buildman/buildman --fetch-arch xtensa ; fi
# If TOOLCHAIN is unset, we're on some flavour of ARM.
- if [[ "${TOOLCHAIN}" == "" ]]; then
wget http://releases.linaro.org/components/toolchain/binaries/6.3-2017.02/aarch64-linux-gnu/gcc-linaro-6.3.1-2017.02-x86_64_aarch64-linux-gnu.tar.xz &&
wget http://releases.linaro.org/components/toolchain/binaries/6.3-2017.02/arm-linux-gnueabihf/gcc-linaro-6.3.1-2017.02-x86_64_arm-linux-gnueabihf.tar.xz &&
tar -C /tmp -xf gcc-linaro-6.3.1-2017.02-x86_64_aarch64-linux-gnu.tar.xz &&
tar -C /tmp -xf gcc-linaro-6.3.1-2017.02-x86_64_arm-linux-gnueabihf.tar.xz;
./tools/buildman/buildman --fetch-arch arm &&
./tools/buildman/buildman --fetch-arch aarch64;
fi
- if [[ "${TOOLCHAIN}" == "powerpc" ]]; then ./tools/buildman/buildman --fetch-arch powerpc; fi
- if [[ "${TOOLCHAIN}" == "riscv" ]]; then
./tools/buildman/buildman --fetch-arch riscv64;
echo -e "\n[toolchain-alias]\nriscv = riscv64" >> ~/.buildman;
fi
- if [[ "${QEMU_TARGET}" != "" ]]; then
git clone git://git.qemu.org/qemu.git /tmp/qemu;
@@ -94,9 +108,8 @@ script:
#
# Exit code 129 means warnings only.
- if [[ "${BUILDMAN}" != "" ]]; then
set +e;
tools/buildman/buildman -P ${BUILDMAN};
ret=$?;
ret=0;
tools/buildman/buildman -P -E ${BUILDMAN} || ret=$?;
if [[ $ret -ne 0 && $ret -ne 129 ]]; then
tools/buildman/buildman -sdeP ${BUILDMAN};
exit $ret;
@@ -109,246 +122,307 @@ script:
- export UBOOT_TRAVIS_BUILD_DIR=`cd .. && pwd`/.bm-work/${TEST_PY_BD};
cp ~/grub_x86.efi $UBOOT_TRAVIS_BUILD_DIR/;
cp ~/grub2-arm/usr/lib/grub2/arm-efi/grub.efi $UBOOT_TRAVIS_BUILD_DIR/grub_arm.efi;
cp ~/grub2-arm64/usr/lib/grub2/arm64-efi/grub.efi $UBOOT_TRAVIS_BUILD_DIR/grub_arm64.efi;
if [[ "${TEST_PY_BD}" != "" ]]; then
./test/py/test.py --bd ${TEST_PY_BD} ${TEST_PY_ID}
-k "${TEST_PY_TEST_SPEC:-not a_test_which_does_not_exist}"
--build-dir "$UBOOT_TRAVIS_BUILD_DIR";
ret=$?;
if [[ $ret -ne 0 ]]; then
exit $ret;
fi;
fi;
if [[ -n "${TEST_PY_TOOLS}" ]]; then
PYTHONPATH="${UBOOT_TRAVIS_BUILD_DIR}/scripts/dtc/pylibfdt"
PATH="${UBOOT_TRAVIS_BUILD_DIR}/scripts/dtc:${PATH}"
./tools/binman/binman -t &&
./tools/patman/patman --test &&
./tools/buildman/buildman -t &&
PYTHONPATH="${UBOOT_TRAVIS_BUILD_DIR}/scripts/dtc/pylibfdt"
PATH="${UBOOT_TRAVIS_BUILD_DIR}/scripts/dtc:${PATH}"
./tools/dtoc/dtoc -t;
fi
matrix:
include:
# we need to build by vendor due to 50min time limit for builds
# each env setting here is a dedicated build
- env:
- name: "buildman arc"
env:
- BUILDMAN="arc"
TOOLCHAIN="arc"
- env:
- BUILDMAN="arm11"
- env:
- BUILDMAN="arm7"
- env:
- BUILDMAN="arm920t"
- env:
- name: "buildman arm11 arm7 arm920t arm946es"
env:
- BUILDMAN="arm11 arm7 arm920t arm946es"
- name: "buildman arm926ejs (non-mx,siemens,atmel,kirkwood)"
env:
- JOB="arm926ejs"
BUILDMAN="arm926ejs -x mx,siemens,atmel"
- env:
- BUILDMAN="arm946es"
- env:
BUILDMAN="arm926ejs -x mx,siemens,atmel,kirkwood"
- name: "buildman atmel"
env:
- BUILDMAN="atmel"
- env:
- BUILDMAN="aries"
- env:
- JOB="Boundary Devices"
BUILDMAN="boundary"
- env:
- JOB="engicam"
BUILDMAN="engicam"
- env:
- JOB="Freescale ARM32"
BUILDMAN="freescale -x powerpc,m68k,aarch64"
- env:
- JOB="Freescale AArch64"
BUILDMAN="freescale&aarch64"
- env:
- JOB="i.MX6 (non-Freescale)"
BUILDMAN="mx6 -x freescale,toradex,boundary,engicam"
- env:
- JOB="i.MX (non-Freescale, non-i.MX6)"
BUILDMAN="mx -x freescale,mx6,toradex"
- env:
- name: "buildman boundary engicam toradex"
env:
- BUILDMAN="boundary engicam toradex"
- name: "buildman Freescale ARM32"
env:
- BUILDMAN="freescale -x powerpc,m68k,aarch64"
- name: "buildman Freescale AArch64"
env:
- BUILDMAN="freescale&aarch64"
- name: "buildman i.MX6 (non-Freescale)"
env:
- BUILDMAN="mx6 -x freescale,toradex,boundary,engicam"
- name: "buildman i.MX (non-Freescale,i.MX6,toradex)"
env:
- BUILDMAN="mx -x freescale,mx6,toradex"
- name: "buildman k2"
env:
- BUILDMAN="k2"
- env:
- BUILDMAN="samsung"
- env:
- BUILDMAN="socfpga"
- env:
- name: "buildman samsung socfpga"
env:
- BUILDMAN="samsung socfpga"
- name: "buildman sun4i"
env:
- BUILDMAN="sun4i"
- env:
- name: "buildman sun5i"
env:
- BUILDMAN="sun5i"
- env:
- name: "buildman sun6i"
env:
- BUILDMAN="sun6i"
- env:
- name: "buildman sun7i"
env:
- BUILDMAN="sun7i"
- env:
- name: "buildman sun8i"
env:
- BUILDMAN="sun8i"
- env:
- name: "buildman sun9i"
env:
- BUILDMAN="sun9i"
- env:
- name: "buildman sun50i"
env:
- BUILDMAN="sun50i"
- env:
- JOB="Catch-all ARM"
BUILDMAN="arm -x arm11,arm7,arm9,aarch64,atmel,aries,freescale,kirkwood,mvebu,siemens,tegra,uniphier,mx,samsung,sunxi,am33xx,omap3,omap4,omap5,pxa,rockchip,toradex,socfpga,k2,xilinx"
- env:
- name: "buildman catch-all ARM"
env:
- BUILDMAN="arm -x arm11,arm7,arm9,aarch64,atmel,freescale,kirkwood,mvebu,siemens,tegra,uniphier,mx,samsung,sunxi,am33xx,omap,pxa,rockchip,toradex,socfpga,k2,xilinx"
- name: "buildman sandbox x86"
env:
- BUILDMAN="sandbox x86"
TOOLCHAIN="x86_64"
- env:
- BUILDMAN="toradex"
- env:
- BUILDMAN="kirkwood"
- env:
- name: "buildman kirkwood (excluding openrd)"
env:
- BUILDMAN="kirkwood -x openrd"
- name: "buildman mvebu"
env:
- BUILDMAN="mvebu"
- env:
- JOB="PXA"
- name: "buildman PXA (non-toradex)"
env:
- BUILDMAN="pxa -x toradex"
- env:
- name: "buildman m68k"
env:
- BUILDMAN="m68k"
TOOLCHAIN="m68k"
- env:
- name: "buildman microblaze"
env:
- BUILDMAN="microblaze"
TOOLCHAIN="microblaze"
- env:
- name: "buildman mips"
env:
- BUILDMAN="mips"
TOOLCHAIN="mips"
- env:
- BUILDMAN="mpc83xx"
- env:
- BUILDMAN="mpc85xx -x freescale"
- env:
- BUILDMAN="mpc85xx -x t208xrdb -x t4qds -x t102* -x p1_p2_rdb_pc -x p1010rdb -x corenet_ds -x b4860qds -x sbc8548 -x bsc91*"
- env:
- BUILDMAN="t208xrdb t4qds t102*"
- env:
- name: "buildman non-Freescale PowerPC"
env:
- BUILDMAN="powerpc -x freescale"
TOOLCHAIN="powerpc"
- name: "buildman mpc85xx&freescale (excluding many)"
env:
- BUILDMAN="mpc85xx&freescale -x t208xrdb -x t4qds -x t102* -x p1_p2_rdb_pc -x p1010rdb -x corenet_ds -x b4860qds -x bsc91*"
TOOLCHAIN="powerpc"
- name: "buildman t208xrdb corenet_ds"
env:
- BUILDMAN="t208xrdb corenet_ds"
TOOLCHAIN="powerpc"
- name: "buildman Freescale PowerPC"
env:
- BUILDMAN="t4qds b4860qds mpc83xx&freescale mpc86xx&freescale"
TOOLCHAIN="powerpc"
- name: "buildman t102*"
env:
- BUILDMAN="t102*"
TOOLCHAIN="powerpc"
- name: "buildman p1_p2_rdb_pc"
env:
- BUILDMAN="p1_p2_rdb_pc"
- env:
- BUILDMAN="p1010rdb"
- env:
- BUILDMAN="corenet_ds b4860qds sbc8548 bsc91*"
- env:
- BUILDMAN="mpc86xx"
- env:
- BUILDMAN="mpc8xx"
- env:
TOOLCHAIN="powerpc"
- name: "buildman p1010rdb bsc91"
env:
- BUILDMAN="p1010rdb bsc91"
TOOLCHAIN="powerpc"
- name: "buildman siemens"
env:
- BUILDMAN="siemens"
- env:
- JOB="tegra"
BUILDMAN="tegra -x toradex"
- env:
- JOB="am33xx"
BUILDMAN="am33xx -x siemens"
- env:
- BUILDMAN="omap3"
- env:
- BUILDMAN="omap4"
- env:
- BUILDMAN="omap5"
- env:
- name: "buildman tegra"
env:
- BUILDMAN="tegra -x toradex"
- name: "buildman am33xx (no siemens)"
env:
- BUILDMAN="am33xx -x siemens"
- name: "buildman omap"
env:
- BUILDMAN="omap"
- name: "buildman uniphier"
env:
- BUILDMAN="uniphier"
- env:
- JOB="aarch64"
BUILDMAN="aarch64 -x tegra,freescale,mvebu,uniphier,sunxi,samsung,rockchip"
- env:
- name: "buildman catch-all AArch64"
env:
- BUILDMAN="aarch64 -x tegra,freescale,mvebu,uniphier,sunxi,samsung,rockchip,xilinx"
- name: "buildman rockchip"
env:
- BUILDMAN="rockchip"
- env:
- BUILDMAN="sh4"
TOOLCHAIN="sh4"
- env:
- JOB="Xilinx (ARM)"
BUILDMAN="xilinx -x microblaze"
- env:
- name: "buildman sh"
env:
- BUILDMAN="sh -x arm"
TOOLCHAIN="sh"
- name: "buildman Xilinx (ARM)"
env:
- BUILDMAN="xilinx -x microblaze"
- name: "buildman xtensa"
env:
- BUILDMAN="xtensa"
TOOLCHAIN="xtensa"
TOOLCHAIN="xtensa-dc233c-elf"
- name: "buildman riscv"
env:
- BUILDMAN="riscv"
TOOLCHAIN="riscv"
# QA jobs for code analytics
# static code analysis with cppcheck (we can add --enable=all later)
- env:
- JOB="cppcheck"
- name: "cppcheck"
script:
- cppcheck --force --quiet --inline-suppr .
# search for TODO within source tree
- env:
- JOB="grep TODO"
- name: "grep TODO"
script:
- grep -r TODO .
# search for FIXME within source tree
- env:
- JOB="grep FIXME HACK"
- name: "grep FIXME HACK"
script:
- grep -r FIXME .
# search for HACK within source tree and ignore HACKKIT board
script:
- grep -r HACK . | grep -v HACKKIT
# some statistics about the code base
- env:
- JOB="sloccount"
- name: "sloccount"
script:
- sloccount .
# test/py
- env:
- name: "test/py sandbox"
env:
- TEST_PY_BD="sandbox"
BUILDMAN="^sandbox$"
TOOLCHAIN="x86_64"
- env:
- name: "test/py sandbox_spl"
env:
- TEST_PY_BD="sandbox_spl"
TEST_PY_TEST_SPEC="test_ofplatdata"
BUILDMAN="^sandbox$"
TOOLCHAIN="x86_64"
- env:
TEST_PY_TOOLS="yes"
- name: "test/py sandbox_flattree"
env:
- TEST_PY_BD="sandbox_flattree"
BUILDMAN="^sandbox_flattree$"
TOOLCHAIN="x86_64"
- env:
- name: "test/py vexpress_ca15_tc2"
env:
- TEST_PY_BD="vexpress_ca15_tc2"
TEST_PY_ID="--id qemu"
QEMU_TARGET="arm-softmmu"
BUILDMAN="^vexpress_ca15_tc2$"
- env:
- name: "test/py vexpress_ca9x4"
env:
- TEST_PY_BD="vexpress_ca9x4"
TEST_PY_ID="--id qemu"
QEMU_TARGET="arm-softmmu"
BUILDMAN="^vexpress_ca9x4$"
- env:
- name: "test/py integratorcp_cm926ejs"
env:
- TEST_PY_BD="integratorcp_cm926ejs"
TEST_PY_TEST_SPEC="not sleep"
TEST_PY_ID="--id qemu"
QEMU_TARGET="arm-softmmu"
BUILDMAN="^integratorcp_cm926ejs$"
- env:
- name: "test/py qemu_arm"
env:
- TEST_PY_BD="qemu_arm"
TEST_PY_TEST_SPEC="not sleep"
QEMU_TARGET="arm-softmmu"
BUILDMAN="^qemu_arm$"
- env:
- name: "test/py qemu_arm64"
env:
- TEST_PY_BD="qemu_arm64"
TEST_PY_TEST_SPEC="not sleep"
QEMU_TARGET="aarch64-softmmu"
BUILDMAN="^qemu_arm64$"
- name: "test/py qemu_mips"
env:
- TEST_PY_BD="qemu_mips"
TEST_PY_TEST_SPEC="not sleep"
QEMU_TARGET="mips-softmmu"
BUILDMAN="^qemu_mips$"
TOOLCHAIN="mips"
- env:
- name: "test/py qemu_mipsel"
env:
- TEST_PY_BD="qemu_mipsel"
TEST_PY_TEST_SPEC="not sleep"
QEMU_TARGET="mipsel-softmmu"
BUILDMAN="^qemu_mipsel$"
TOOLCHAIN="mips"
- env:
- name: "test/py qemu_mips64"
env:
- TEST_PY_BD="qemu_mips64"
TEST_PY_TEST_SPEC="not sleep"
QEMU_TARGET="mips64-softmmu"
BUILDMAN="^qemu_mips64$"
TOOLCHAIN="mips"
- env:
- name: "test/py qemu_mips64el"
env:
- TEST_PY_BD="qemu_mips64el"
TEST_PY_TEST_SPEC="not sleep"
QEMU_TARGET="mips64el-softmmu"
BUILDMAN="^qemu_mips64el$"
TOOLCHAIN="mips"
- env:
- name: "test/py qemu-ppce500"
env:
- TEST_PY_BD="qemu-ppce500"
TEST_PY_TEST_SPEC="not sleep"
QEMU_TARGET="ppc-softmmu"
BUILDMAN="^qemu-ppce500$"
- env:
TOOLCHAIN="powerpc"
- name: "test/py qemu-x86"
env:
- TEST_PY_BD="qemu-x86"
TEST_PY_TEST_SPEC="not sleep"
QEMU_TARGET="i386-softmmu"
BUILDMAN="^qemu-x86$"
TOOLCHAIN="x86_64"
BUILD_ROM="yes"
- env:
- name: "test/py zynq_zc702"
env:
- TEST_PY_BD="zynq_zc702"
TEST_PY_TEST_SPEC="not sleep"
QEMU_TARGET="arm-softmmu"
TEST_PY_ID="--id qemu"
BUILDMAN="^zynq_zc702$"
- name: "test/py xtfpga"
env:
- TEST_PY_BD="xtfpga"
TEST_PY_TEST_SPEC="not sleep"
QEMU_TARGET="xtensa-softmmu"
TEST_PY_ID="--id qemu"
BUILDMAN="^xtfpga$"
TOOLCHAIN="xtensa-dc233c-elf"
# TODO make it perfect ;-r

2
Documentation/.gitignore vendored Normal file
View File

@@ -0,0 +1,2 @@
output
*.pyc

124
Documentation/Makefile Normal file
View File

@@ -0,0 +1,124 @@
# -*- makefile -*-
# Makefile for Sphinx documentation
#
subdir-y :=
# You can set these variables from the command line.
SPHINXBUILD = sphinx-build
SPHINXOPTS =
SPHINXDIRS = .
_SPHINXDIRS = $(patsubst $(srctree)/Documentation/%/conf.py,%,$(wildcard $(srctree)/Documentation/*/conf.py))
SPHINX_CONF = conf.py
PAPER =
BUILDDIR = $(obj)/output
PDFLATEX = xelatex
LATEXOPTS = -interaction=batchmode
# User-friendly check for sphinx-build
HAVE_SPHINX := $(shell if which $(SPHINXBUILD) >/dev/null 2>&1; then echo 1; else echo 0; fi)
ifeq ($(HAVE_SPHINX),0)
.DEFAULT:
$(warning The '$(SPHINXBUILD)' command was not found. Make sure you have Sphinx installed and in PATH, or set the SPHINXBUILD make variable to point to the full path of the '$(SPHINXBUILD)' executable.)
@echo
@./scripts/sphinx-pre-install
@echo " SKIP Sphinx $@ target."
else # HAVE_SPHINX
# User-friendly check for pdflatex
HAVE_PDFLATEX := $(shell if which $(PDFLATEX) >/dev/null 2>&1; then echo 1; else echo 0; fi)
# Internal variables.
PAPEROPT_a4 = -D latex_paper_size=a4
PAPEROPT_letter = -D latex_paper_size=letter
KERNELDOC = $(srctree)/scripts/kernel-doc
KERNELDOC_CONF = -D kerneldoc_srctree=$(srctree) -D kerneldoc_bin=$(KERNELDOC)
ALLSPHINXOPTS = $(KERNELDOC_CONF) $(PAPEROPT_$(PAPER)) $(SPHINXOPTS)
# the i18n builder cannot share the environment and doctrees with the others
I18NSPHINXOPTS = $(PAPEROPT_$(PAPER)) $(SPHINXOPTS) .
# commands; the 'cmd' from scripts/Kbuild.include is not *loopable*
loop_cmd = $(echo-cmd) $(cmd_$(1)) || exit;
# $2 sphinx builder e.g. "html"
# $3 name of the build subfolder / e.g. "media", used as:
# * dest folder relative to $(BUILDDIR) and
# * cache folder relative to $(BUILDDIR)/.doctrees
# $4 dest subfolder e.g. "man" for man pages at media/man
# $5 reST source folder relative to $(srctree)/$(src),
# e.g. "media" for the linux-tv book-set at ./Documentation/media
quiet_cmd_sphinx = SPHINX $@ --> file://$(abspath $(BUILDDIR)/$3/$4)
cmd_sphinx = $(MAKE) BUILDDIR=$(abspath $(BUILDDIR)) $(build)=Documentation/media $2 && \
PYTHONDONTWRITEBYTECODE=1 \
BUILDDIR=$(abspath $(BUILDDIR)) SPHINX_CONF=$(abspath $(srctree)/$(src)/$5/$(SPHINX_CONF)) \
$(SPHINXBUILD) \
-b $2 \
-c $(abspath $(srctree)/$(src)) \
-d $(abspath $(BUILDDIR)/.doctrees/$3) \
-D version=$(KERNELVERSION) -D release=$(KERNELRELEASE) \
$(ALLSPHINXOPTS) \
$(abspath $(srctree)/$(src)/$5) \
$(abspath $(BUILDDIR)/$3/$4)
htmldocs:
@+$(foreach var,$(SPHINXDIRS),$(call loop_cmd,sphinx,html,$(var),,$(var)))
linkcheckdocs:
@$(foreach var,$(SPHINXDIRS),$(call loop_cmd,sphinx,linkcheck,$(var),,$(var)))
latexdocs:
@+$(foreach var,$(SPHINXDIRS),$(call loop_cmd,sphinx,latex,$(var),latex,$(var)))
ifeq ($(HAVE_PDFLATEX),0)
pdfdocs:
$(warning The '$(PDFLATEX)' command was not found. Make sure you have it installed and in PATH to produce PDF output.)
@echo " SKIP Sphinx $@ target."
else # HAVE_PDFLATEX
pdfdocs: latexdocs
$(foreach var,$(SPHINXDIRS), $(MAKE) PDFLATEX=$(PDFLATEX) LATEXOPTS="$(LATEXOPTS)" -C $(BUILDDIR)/$(var)/latex || exit;)
endif # HAVE_PDFLATEX
epubdocs:
@+$(foreach var,$(SPHINXDIRS),$(call loop_cmd,sphinx,epub,$(var),epub,$(var)))
xmldocs:
@+$(foreach var,$(SPHINXDIRS),$(call loop_cmd,sphinx,xml,$(var),xml,$(var)))
endif # HAVE_SPHINX
# The following targets are independent of HAVE_SPHINX, and the rules should
# work or silently pass without Sphinx.
refcheckdocs:
$(Q)cd $(srctree);scripts/documentation-file-ref-check
cleandocs:
$(Q)rm -rf $(BUILDDIR)
$(Q)$(MAKE) BUILDDIR=$(abspath $(BUILDDIR)) $(build)=Documentation/media clean
dochelp:
@echo ' Linux kernel internal documentation in different formats from ReST:'
@echo ' htmldocs - HTML'
@echo ' latexdocs - LaTeX'
@echo ' pdfdocs - PDF'
@echo ' epubdocs - EPUB'
@echo ' xmldocs - XML'
@echo ' linkcheckdocs - check for broken external links (will connect to external hosts)'
@echo ' refcheckdocs - check for references to non-existing files under Documentation'
@echo ' cleandocs - clean all generated files'
@echo
@echo ' make SPHINXDIRS="s1 s2" [target] Generate only docs of folder s1, s2'
@echo ' valid values for SPHINXDIRS are: $(_SPHINXDIRS)'
@echo
@echo ' make SPHINX_CONF={conf-file} [target] use *additional* sphinx-build'
@echo ' configuration. This is e.g. useful to build with nit-picking config.'
@echo
@echo ' Default location for the generated documents is Documentation/output'

528
Documentation/conf.py Normal file
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@@ -0,0 +1,528 @@
# -*- coding: utf-8 -*-
#
# The U-Boot documentation build configuration file, created by
# sphinx-quickstart on Fri Feb 12 13:51:46 2016.
#
# This file is execfile()d with the current directory set to its
# containing dir.
#
# Note that not all possible configuration values are present in this
# autogenerated file.
#
# All configuration values have a default; values that are commented out
# serve to show the default.
import sys
import os
import sphinx
# Get Sphinx version
major, minor, patch = sphinx.version_info[:3]
# If extensions (or modules to document with autodoc) are in another directory,
# add these directories to sys.path here. If the directory is relative to the
# documentation root, use os.path.abspath to make it absolute, like shown here.
sys.path.insert(0, os.path.abspath('sphinx'))
from load_config import loadConfig
# -- General configuration ------------------------------------------------
# If your documentation needs a minimal Sphinx version, state it here.
needs_sphinx = '1.3'
# Add any Sphinx extension module names here, as strings. They can be
# extensions coming with Sphinx (named 'sphinx.ext.*') or your custom
# ones.
extensions = ['kerneldoc', 'rstFlatTable', 'kernel_include', 'cdomain', 'kfigure']
# The name of the math extension changed on Sphinx 1.4
if major == 1 and minor > 3:
extensions.append("sphinx.ext.imgmath")
else:
extensions.append("sphinx.ext.pngmath")
# Add any paths that contain templates here, relative to this directory.
templates_path = ['_templates']
# The suffix(es) of source filenames.
# You can specify multiple suffix as a list of string:
# source_suffix = ['.rst', '.md']
source_suffix = '.rst'
# The encoding of source files.
#source_encoding = 'utf-8-sig'
# The master toctree document.
master_doc = 'index'
# General information about the project.
project = 'Das U-Boot'
copyright = 'The U-Boot development community'
author = 'The U-Boot development community'
# The version info for the project you're documenting, acts as replacement for
# |version| and |release|, also used in various other places throughout the
# built documents.
#
# In a normal build, version and release are are set to KERNELVERSION and
# KERNELRELEASE, respectively, from the Makefile via Sphinx command line
# arguments.
#
# The following code tries to extract the information by reading the Makefile,
# when Sphinx is run directly (e.g. by Read the Docs).
try:
makefile_version = None
makefile_patchlevel = None
for line in open('../Makefile'):
key, val = [x.strip() for x in line.split('=', 2)]
if key == 'VERSION':
makefile_version = val
elif key == 'PATCHLEVEL':
makefile_patchlevel = val
if makefile_version and makefile_patchlevel:
break
except:
pass
finally:
if makefile_version and makefile_patchlevel:
version = release = makefile_version + '.' + makefile_patchlevel
else:
version = release = "unknown version"
# The language for content autogenerated by Sphinx. Refer to documentation
# for a list of supported languages.
#
# This is also used if you do content translation via gettext catalogs.
# Usually you set "language" from the command line for these cases.
language = None
# There are two options for replacing |today|: either, you set today to some
# non-false value, then it is used:
#today = ''
# Else, today_fmt is used as the format for a strftime call.
#today_fmt = '%B %d, %Y'
# List of patterns, relative to source directory, that match files and
# directories to ignore when looking for source files.
exclude_patterns = ['output']
# The reST default role (used for this markup: `text`) to use for all
# documents.
#default_role = None
# If true, '()' will be appended to :func: etc. cross-reference text.
#add_function_parentheses = True
# If true, the current module name will be prepended to all description
# unit titles (such as .. function::).
#add_module_names = True
# If true, sectionauthor and moduleauthor directives will be shown in the
# output. They are ignored by default.
#show_authors = False
# The name of the Pygments (syntax highlighting) style to use.
pygments_style = 'sphinx'
# A list of ignored prefixes for module index sorting.
#modindex_common_prefix = []
# If true, keep warnings as "system message" paragraphs in the built documents.
#keep_warnings = False
# If true, `todo` and `todoList` produce output, else they produce nothing.
todo_include_todos = False
primary_domain = 'c'
highlight_language = 'none'
# -- Options for HTML output ----------------------------------------------
# The theme to use for HTML and HTML Help pages. See the documentation for
# a list of builtin themes.
# The Read the Docs theme is available from
# - https://github.com/snide/sphinx_rtd_theme
# - https://pypi.python.org/pypi/sphinx_rtd_theme
# - python-sphinx-rtd-theme package (on Debian)
try:
import sphinx_rtd_theme
html_theme = 'sphinx_rtd_theme'
html_theme_path = [sphinx_rtd_theme.get_html_theme_path()]
except ImportError:
sys.stderr.write('Warning: The Sphinx \'sphinx_rtd_theme\' HTML theme was not found. Make sure you have the theme installed to produce pretty HTML output. Falling back to the default theme.\n')
# Theme options are theme-specific and customize the look and feel of a theme
# further. For a list of options available for each theme, see the
# documentation.
#html_theme_options = {}
# Add any paths that contain custom themes here, relative to this directory.
#html_theme_path = []
# The name for this set of Sphinx documents. If None, it defaults to
# "<project> v<release> documentation".
#html_title = None
# A shorter title for the navigation bar. Default is the same as html_title.
#html_short_title = None
# The name of an image file (relative to this directory) to place at the top
# of the sidebar.
#html_logo = None
# The name of an image file (within the static path) to use as favicon of the
# docs. This file should be a Windows icon file (.ico) being 16x16 or 32x32
# pixels large.
#html_favicon = None
# Add any paths that contain custom static files (such as style sheets) here,
# relative to this directory. They are copied after the builtin static files,
# so a file named "default.css" will overwrite the builtin "default.css".
html_static_path = ['sphinx-static']
html_context = {
'css_files': [
'_static/theme_overrides.css',
],
}
# Add any extra paths that contain custom files (such as robots.txt or
# .htaccess) here, relative to this directory. These files are copied
# directly to the root of the documentation.
#html_extra_path = []
# If not '', a 'Last updated on:' timestamp is inserted at every page bottom,
# using the given strftime format.
#html_last_updated_fmt = '%b %d, %Y'
# If true, SmartyPants will be used to convert quotes and dashes to
# typographically correct entities.
#html_use_smartypants = True
# Custom sidebar templates, maps document names to template names.
#html_sidebars = {}
# Additional templates that should be rendered to pages, maps page names to
# template names.
#html_additional_pages = {}
# If false, no module index is generated.
#html_domain_indices = True
# If false, no index is generated.
#html_use_index = True
# If true, the index is split into individual pages for each letter.
#html_split_index = False
# If true, links to the reST sources are added to the pages.
#html_show_sourcelink = True
# If true, "Created using Sphinx" is shown in the HTML footer. Default is True.
#html_show_sphinx = True
# If true, "(C) Copyright ..." is shown in the HTML footer. Default is True.
#html_show_copyright = True
# If true, an OpenSearch description file will be output, and all pages will
# contain a <link> tag referring to it. The value of this option must be the
# base URL from which the finished HTML is served.
#html_use_opensearch = ''
# This is the file name suffix for HTML files (e.g. ".xhtml").
#html_file_suffix = None
# Language to be used for generating the HTML full-text search index.
# Sphinx supports the following languages:
# 'da', 'de', 'en', 'es', 'fi', 'fr', 'h', 'it', 'ja'
# 'nl', 'no', 'pt', 'ro', 'r', 'sv', 'tr'
#html_search_language = 'en'
# A dictionary with options for the search language support, empty by default.
# Now only 'ja' uses this config value
#html_search_options = {'type': 'default'}
# The name of a javascript file (relative to the configuration directory) that
# implements a search results scorer. If empty, the default will be used.
#html_search_scorer = 'scorer.js'
# Output file base name for HTML help builder.
htmlhelp_basename = 'TheUBootdoc'
# -- Options for LaTeX output ---------------------------------------------
latex_elements = {
# The paper size ('letterpaper' or 'a4paper').
'papersize': 'a4paper',
# The font size ('10pt', '11pt' or '12pt').
'pointsize': '8pt',
# Latex figure (float) alignment
#'figure_align': 'htbp',
# Don't mangle with UTF-8 chars
'inputenc': '',
'utf8extra': '',
# Additional stuff for the LaTeX preamble.
'preamble': '''
% Use some font with UTF-8 support with XeLaTeX
\\usepackage{fontspec}
\\setsansfont{DejaVu Serif}
\\setromanfont{DejaVu Sans}
\\setmonofont{DejaVu Sans Mono}
'''
}
# Fix reference escape troubles with Sphinx 1.4.x
if major == 1 and minor > 3:
latex_elements['preamble'] += '\\renewcommand*{\\DUrole}[2]{ #2 }\n'
if major == 1 and minor <= 4:
latex_elements['preamble'] += '\\usepackage[margin=0.5in, top=1in, bottom=1in]{geometry}'
elif major == 1 and (minor > 5 or (minor == 5 and patch >= 3)):
latex_elements['sphinxsetup'] = 'hmargin=0.5in, vmargin=1in'
latex_elements['preamble'] += '\\fvset{fontsize=auto}\n'
# Customize notice background colors on Sphinx < 1.6:
if major == 1 and minor < 6:
latex_elements['preamble'] += '''
\\usepackage{ifthen}
% Put notes in color and let them be inside a table
\\definecolor{NoteColor}{RGB}{204,255,255}
\\definecolor{WarningColor}{RGB}{255,204,204}
\\definecolor{AttentionColor}{RGB}{255,255,204}
\\definecolor{ImportantColor}{RGB}{192,255,204}
\\definecolor{OtherColor}{RGB}{204,204,204}
\\newlength{\\mynoticelength}
\\makeatletter\\newenvironment{coloredbox}[1]{%
\\setlength{\\fboxrule}{1pt}
\\setlength{\\fboxsep}{7pt}
\\setlength{\\mynoticelength}{\\linewidth}
\\addtolength{\\mynoticelength}{-2\\fboxsep}
\\addtolength{\\mynoticelength}{-2\\fboxrule}
\\begin{lrbox}{\\@tempboxa}\\begin{minipage}{\\mynoticelength}}{\\end{minipage}\\end{lrbox}%
\\ifthenelse%
{\\equal{\\py@noticetype}{note}}%
{\\colorbox{NoteColor}{\\usebox{\\@tempboxa}}}%
{%
\\ifthenelse%
{\\equal{\\py@noticetype}{warning}}%
{\\colorbox{WarningColor}{\\usebox{\\@tempboxa}}}%
{%
\\ifthenelse%
{\\equal{\\py@noticetype}{attention}}%
{\\colorbox{AttentionColor}{\\usebox{\\@tempboxa}}}%
{%
\\ifthenelse%
{\\equal{\\py@noticetype}{important}}%
{\\colorbox{ImportantColor}{\\usebox{\\@tempboxa}}}%
{\\colorbox{OtherColor}{\\usebox{\\@tempboxa}}}%
}%
}%
}%
}\\makeatother
\\makeatletter
\\renewenvironment{notice}[2]{%
\\def\\py@noticetype{#1}
\\begin{coloredbox}{#1}
\\bf\\it
\\par\\strong{#2}
\\csname py@noticestart@#1\\endcsname
}
{
\\csname py@noticeend@\\py@noticetype\\endcsname
\\end{coloredbox}
}
\\makeatother
'''
# With Sphinx 1.6, it is possible to change the Bg color directly
# by using:
# \definecolor{sphinxnoteBgColor}{RGB}{204,255,255}
# \definecolor{sphinxwarningBgColor}{RGB}{255,204,204}
# \definecolor{sphinxattentionBgColor}{RGB}{255,255,204}
# \definecolor{sphinximportantBgColor}{RGB}{192,255,204}
#
# However, it require to use sphinx heavy box with:
#
# \renewenvironment{sphinxlightbox} {%
# \\begin{sphinxheavybox}
# }
# \\end{sphinxheavybox}
# }
#
# Unfortunately, the implementation is buggy: if a note is inside a
# table, it isn't displayed well. So, for now, let's use boring
# black and white notes.
# Grouping the document tree into LaTeX files. List of tuples
# (source start file, target name, title,
# author, documentclass [howto, manual, or own class]).
# Sorted in alphabetical order
latex_documents = [
('index', 'u-boot-hacker-manual.tex', 'U-Boot Hacker Manual',
'The U-Boot development community', 'manual'),
]
# The name of an image file (relative to this directory) to place at the top of
# the title page.
#latex_logo = None
# For "manual" documents, if this is true, then toplevel headings are parts,
# not chapters.
#latex_use_parts = False
# If true, show page references after internal links.
#latex_show_pagerefs = False
# If true, show URL addresses after external links.
#latex_show_urls = False
# Documents to append as an appendix to all manuals.
#latex_appendices = []
# If false, no module index is generated.
#latex_domain_indices = True
# -- Options for manual page output ---------------------------------------
# One entry per manual page. List of tuples
# (source start file, name, description, authors, manual section).
man_pages = [
(master_doc, 'dasuboot', 'The U-Boot Documentation',
[author], 1)
]
# If true, show URL addresses after external links.
#man_show_urls = False
# -- Options for Texinfo output -------------------------------------------
# Grouping the document tree into Texinfo files. List of tuples
# (source start file, target name, title, author,
# dir menu entry, description, category)
texinfo_documents = [
(master_doc, 'DasUBoot', 'The U-Boot Documentation',
author, 'DasUBoot', 'One line description of project.',
'Miscellaneous'),
]
# Documents to append as an appendix to all manuals.
#texinfo_appendices = []
# If false, no module index is generated.
#texinfo_domain_indices = True
# How to display URL addresses: 'footnote', 'no', or 'inline'.
#texinfo_show_urls = 'footnote'
# If true, do not generate a @detailmenu in the "Top" node's menu.
#texinfo_no_detailmenu = False
# -- Options for Epub output ----------------------------------------------
# Bibliographic Dublin Core info.
epub_title = project
epub_author = author
epub_publisher = author
epub_copyright = copyright
# The basename for the epub file. It defaults to the project name.
#epub_basename = project
# The HTML theme for the epub output. Since the default themes are not
# optimized for small screen space, using the same theme for HTML and epub
# output is usually not wise. This defaults to 'epub', a theme designed to save
# visual space.
#epub_theme = 'epub'
# The language of the text. It defaults to the language option
# or 'en' if the language is not set.
#epub_language = ''
# The scheme of the identifier. Typical schemes are ISBN or URL.
#epub_scheme = ''
# The unique identifier of the text. This can be a ISBN number
# or the project homepage.
#epub_identifier = ''
# A unique identification for the text.
#epub_uid = ''
# A tuple containing the cover image and cover page html template filenames.
#epub_cover = ()
# A sequence of (type, uri, title) tuples for the guide element of content.opf.
#epub_guide = ()
# HTML files that should be inserted before the pages created by sphinx.
# The format is a list of tuples containing the path and title.
#epub_pre_files = []
# HTML files that should be inserted after the pages created by sphinx.
# The format is a list of tuples containing the path and title.
#epub_post_files = []
# A list of files that should not be packed into the epub file.
epub_exclude_files = ['search.html']
# The depth of the table of contents in toc.ncx.
#epub_tocdepth = 3
# Allow duplicate toc entries.
#epub_tocdup = True
# Choose between 'default' and 'includehidden'.
#epub_tocscope = 'default'
# Fix unsupported image types using the Pillow.
#epub_fix_images = False
# Scale large images.
#epub_max_image_width = 0
# How to display URL addresses: 'footnote', 'no', or 'inline'.
#epub_show_urls = 'inline'
# If false, no index is generated.
#epub_use_index = True
#=======
# rst2pdf
#
# Grouping the document tree into PDF files. List of tuples
# (source start file, target name, title, author, options).
#
# See the Sphinx chapter of http://ralsina.me/static/manual.pdf
#
# FIXME: Do not add the index file here; the result will be too big. Adding
# multiple PDF files here actually tries to get the cross-referencing right
# *between* PDF files.
pdf_documents = [
('uboot-documentation', u'U-Boot', u'U-Boot', u'J. Random Bozo'),
]
# kernel-doc extension configuration for running Sphinx directly (e.g. by Read
# the Docs). In a normal build, these are supplied from the Makefile via command
# line arguments.
kerneldoc_bin = '../scripts/kernel-doc'
kerneldoc_srctree = '..'
# ------------------------------------------------------------------------------
# Since loadConfig overwrites settings from the global namespace, it has to be
# the last statement in the conf.py file
# ------------------------------------------------------------------------------
loadConfig(globals())

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@@ -0,0 +1,22 @@
gdsys AXI busses of IHS FPGA devices
Certain gdsys IHS FPGAs offer a interface to their built-in AXI bus with which
the connected devices (usually IP cores) can be controlled via software.
Required properties:
- compatible: must be "gdsys,ihs_axi"
- reg: describes the address and length of the AXI bus's register map (within
the FPGA's register space)
Example:
fpga0_axi_video0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "gdsys,ihs_axi";
reg = <0x170 0x10>;
axi_dev_1 {
...
};
};

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gdsys Gazerbeam board driver
This driver provides capabilities to access the gdsys Gazerbeam board's device
information. Furthermore, phandles to some internal devices are provided for
the board files.
Required properties:
- compatible: should be "gdsys,board_gazerbeam"
- csb: phandle to the board's coherent system bus (CSB) device node
- rxaui[0-3]: phandles to the rxaui control device nodes
- fpga[0-1]: phandles to the board's gdsys FPGA device nodes
- ioep[0-1]: phandles to the board's IO endpoint device nodes
- ver-gpios: GPIO list to read the hardware version from
- var-gpios: GPIO list to read the hardware variant information from
- reset-gpios: GPIO list for the board's reset GPIOs
Example:
board {
compatible = "gdsys,board_gazerbeam";
csb = <&board_soc>;
serdes = <&SERDES>;
rxaui0 = <&RXAUI0>;
rxaui1 = <&RXAUI1>;
rxaui2 = <&RXAUI2>;
rxaui3 = <&RXAUI3>;
fpga0 = <&FPGA0>;
fpga1 = <&FPGA1>;
ioep0 = <&IOEP0>;
ioep1 = <&IOEP1>;
ver-gpios = <&PPCPCA 12 0
&PPCPCA 13 0
&PPCPCA 14 0
&PPCPCA 15 0>;
/* MC2/SC-Board */
var-gpios-mc2 = <&GPIO_VB0 0 0 /* VAR-MC_SC */
&GPIO_VB0 11 0>; /* VAR-CON */
/* MC4-Board */
var-gpios-mc4 = <&GPIO_VB1 0 0 /* VAR-MC_SC */
&GPIO_VB1 11 0>; /* VAR-CON */
reset-gpios = <&gpio0 1 0 &gpio0 2 1>;
};

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MPC83xx system clock devices
MPC83xx SoCs supply a variety of clocks to drive various components of a
system.
Required properties:
- compatible: must be one of "fsl,mpc8308-clk",
"fsl,mpc8309-clk",
"fsl,mpc8313-clk",
"fsl,mpc8315-clk",
"fsl,mpc832x-clk",
"fsl,mpc8349-clk",
"fsl,mpc8360-clk",
"fsl,mpc8379-clk"
depending on which SoC is employed
- #clock-cells: Must be 1
Example:
socclocks: clocks {
compatible = "fsl,mpc832x-clk";
#clock-cells = <1>;
};

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MPC83xx CPU devices
MPC83xx SoCs contain a e300 core as their main processor.
Required properties:
- compatible: must be one of "fsl,mpc83xx",
"fsl,mpc8308",
"fsl,mpc8309",
"fsl,mpc8313",
"fsl,mpc8315",
"fsl,mpc832x",
"fsl,mpc8349",
"fsl,mpc8360",
"fsl,mpc8379"
- clocks: has to have two entries, which must be the core clock at index 0 and
the CSB (Coherent System Bus) clock at index 1. Both are given by a suitable
"fsl,mpc83xx-clk" device
Example:
socclocks: clocks {
compatible = "fsl,mpc8315-clk";
#clock-cells = <1>;
};
cpus {
compatible = "cpu_bus";
PowerPC,8315@0 {
compatible = "fsl,mpc8315";
clocks = <&socclocks MPC83XX_CLK_CORE
&socclocks MPC83XX_CLK_CSB>;
};
};

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MPC83xx SerDes controller devices
MPC83xx SoCs contain a built-in SerDes controller that determines which
protocols (SATA, PCI Express, SGMII, ...) are used on the system's serdes lines
and how the lines are configured.
Required properties:
- compatible: must be "fsl,mpc83xx-serdes"
- reg: must point to the serdes controller's register map
- proto: selects for which protocol the serdes lines are configured. One of
"sata", "pex", "pex-x2", "sgmii"
- serdes-clk: determines the frequency the serdes lines are configured for. One
of 100, 125, 150.
- vdd: determines whether 1.0V core VDD is used or not
Example:
SERDES: serdes@e3000 {
reg = <0xe3000 0x200>;
compatible = "fsl,mpc83xx-serdes";
proto = "pex";
serdes-clk = <100>;
vdd;
};

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gdsys IO endpoint of IHS FPGA devices
The IO endpoint of IHS FPGA devices is a packet-based transmission interface
that allows interconnected gdsys devices to send and receive data over the
FPGA's main ethernet connection.
Required properties:
- compatible: must be "gdsys,io-endpoint"
- reg: describes the address and length of the endpoint's register map (within
the FPGA's register space)
Example:
fpga0_ep0 {
compatible = "gdsys,io-endpoint";
reg = <0x020 0x10
0x320 0x10
0x340 0x10
0x360 0x10>;
};

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@@ -0,0 +1,314 @@
MPC83xx RAM controller
This driver supplies support for the embedded RAM controller on MCP83xx-series
SoCs.
For static configuration mode, each controller node should have child nodes
describing the actual RAM modules installed.
Controller node
===============
Required properties:
- compatible: Must be "fsl,mpc83xx-mem-controller"
- reg: The address of the RAM controller's register space
- #address-cells: Must be 2
- #size-cells: Must be 1
- driver_software_override: DDR driver software override is enabled (1) or
disabled (0)
- p_impedance_override: DDR driver software p-impedance override; possible
values:
* DSO_P_IMPEDANCE_HIGHEST_Z
* DSO_P_IMPEDANCE_MUCH_HIGHER_Z
* DSO_P_IMPEDANCE_HIGHER_Z
* DSO_P_IMPEDANCE_NOMINAL
* DSO_P_IMPEDANCE_LOWER_Z
- n_impedance_override: DDR driver software n-impedance override; possible
values:
* DSO_N_IMPEDANCE_HIGHEST_Z
* DSO_N_IMPEDANCE_MUCH_HIGHER_Z
* DSO_N_IMPEDANCE_HIGHER_Z
* DSO_N_IMPEDANCE_NOMINAL
* DSO_N_IMPEDANCE_LOWER_Z
- odt_termination_value: ODT termination value for I/Os; possible values:
* ODT_TERMINATION_75_OHM
* ODT_TERMINATION_150_OHM
- ddr_type: Selects voltage level for DDR pads; possible
values:
* DDR_TYPE_DDR2_1_8_VOLT
* DDR_TYPE_DDR1_2_5_VOLT
- mvref_sel: Determine where MVREF_SEL signal is generated;
possible values:
* MVREF_SEL_EXTERNAL
* MVREF_SEL_INTERNAL_GVDD
- m_odr: Disable memory transaction reordering; possible
values:
* M_ODR_ENABLE
* M_ODR_DISABLE
- clock_adjust: Clock adjust; possible values:
* CLOCK_ADJUST_025
* CLOCK_ADJUST_05
* CLOCK_ADJUST_075
* CLOCK_ADJUST_1
- ext_refresh_rec: Extended refresh recovery time; possible values:
0, 16, 32, 48, 64, 80, 96, 112
- read_to_write: Read-to-write turnaround; possible values:
0, 1, 2, 3
- write_to_read: Write-to-read turnaround; possible values:
0, 1, 2, 3
- read_to_read: Read-to-read turnaround; possible values:
0, 1, 2, 3
- write_to_write: Write-to-write turnaround; possible values:
0, 1, 2, 3
- active_powerdown_exit: Active powerdown exit timing; possible values:
1, 2, 3, 4, 5, 6, 7
- precharge_powerdown_exit: Precharge powerdown exit timing; possible values:
1, 2, 3, 4, 5, 6, 7
- odt_powerdown_exit: ODT powerdown exit timing; possible values:
0, 1, 2, 3, 4, 5, 6, 7, 8,
9, 10, 11, 12, 13, 14, 15
- mode_reg_set_cycle: Mode register set cycle time; possible values:
1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15
- precharge_to_activate: Precharge-to-acitvate interval; possible values:
1, 2, 3, 4, 5, 6, 7
- activate_to_precharge: Activate to precharge interval; possible values:
4, 5, 6, 7, 8, 9, 10, 11, 12,
13, 14, 15, 16, 17, 18, 19
- activate_to_readwrite: Activate to read/write interval for SDRAM;
possible values:
1, 2, 3, 4, 5, 6, 7
- mcas_latency: MCAS latency from READ command; possible values:
* CASLAT_20
* CASLAT_25
* CASLAT_30
* CASLAT_35
* CASLAT_40
* CASLAT_45
* CASLAT_50
* CASLAT_55
* CASLAT_60
* CASLAT_65
* CASLAT_70
* CASLAT_75
* CASLAT_80
- refresh_recovery: Refresh recovery time; possible values:
8, 9, 10, 11, 12, 13, 14, 15,
16, 17, 18, 19, 20, 21, 22, 23
- last_data_to_precharge: Last data to precharge minimum interval; possible
values:
1, 2, 3, 4, 5, 6, 7
- activate_to_activate: Activate-to-activate interval; possible values:
1, 2, 3, 4, 5, 6, 7
- last_write_data_to_read: Last write data pair to read command issue
interval; possible values:
1, 2, 3, 4, 5, 6, 7
- additive_latency: Additive latency; possible values:
0, 1, 2, 3, 4, 5
- mcas_to_preamble_override: MCAS-to-preamble-override; possible values:
* READ_LAT
* READ_LAT_PLUS_1_4
* READ_LAT_PLUS_1_2
* READ_LAT_PLUS_3_4
* READ_LAT_PLUS_1
* READ_LAT_PLUS_5_4
* READ_LAT_PLUS_3_2
* READ_LAT_PLUS_7_4
* READ_LAT_PLUS_2
* READ_LAT_PLUS_9_4
* READ_LAT_PLUS_5_2
* READ_LAT_PLUS_11_4
* READ_LAT_PLUS_3
* READ_LAT_PLUS_13_4
* READ_LAT_PLUS_7_2
* READ_LAT_PLUS_15_4
* READ_LAT_PLUS_4
* READ_LAT_PLUS_17_4
* READ_LAT_PLUS_9_2
* READ_LAT_PLUS_19_4
- write_latency: Write latency; possible values:
1, 2, 3, 4, 5, 6, 7
- read_to_precharge: Read to precharge; possible values:
1, 2, 3, 4
- write_cmd_to_write_data: Write command to write data strobe timing
adjustment; possible values:
* CLOCK_DELAY_0
* CLOCK_DELAY_1_4
* CLOCK_DELAY_1_2
* CLOCK_DELAY_3_4
* CLOCK_DELAY_1
* CLOCK_DELAY_5_4
* CLOCK_DELAY_3_2
- minimum_cke_pulse_width: Minimum CKE pulse width; possible values:
1, 2, 3, 4
- four_activates_window: Window for four activates; possible values:
1, 2, 3, 4 8, 9, 10, 11, 12,
13, 14, 15, 16, 17, 18, 19
- self_refresh: Self refresh (during sleep); possible values:
* SREN_DISABLE
* SREN_ENABLE
- ecc: Support for ECC; possible values:
* ECC_DISABLE
* ECC_ENABLE
- registered_dram: Support for registered DRAM; possible values:
* RD_DISABLE
* RD_ENABLE
- sdram_type: Type of SDRAM device to be used; possible values:
* TYPE_DDR1
* TYPE_DDR2
- dynamic_power_management: Dynamic power management mode; possible values:
* DYN_PWR_DISABLE
* DYN_PWR_ENABLE
- databus_width: DRAM data bus width; possible values
* DATA_BUS_WIDTH_16
* DATA_BUS_WIDTH_32
- nc_auto_precharge: Non-concurrent auto-precharge; possible values:
* NCAP_DISABLE
* NCAP_ENABLE
- timing_2t: 2T timing; possible values:
* TIMING_1T
* TIMING_2T
- bank_interleaving_ctrl: Bank (chip select) interleaving control; possible
values:
* INTERLEAVE_NONE
* INTERLEAVE_1_AND_2
- precharge_bit_8: Precharge bin 8; possible values
* PRECHARGE_MA_10
* PRECHARGE_MA_8
- half_strength: Global half-strength override; possible values:
* STRENGTH_FULL
* STRENGTH_HALF
- bypass_initialization: Bypass initialization; possible values:
* INITIALIZATION_DONT_BYPASS
* INITIALIZATION_BYPASS
- force_self_refresh: Force self refresh; possible values:
* MODE_NORMAL
* MODE_REFRESH
- dll_reset: DLL reset; possible values:
* DLL_RESET_ENABLE
* DLL_RESET_DISABLE
- dqs_config: DQS configuration; possible values:
* DQS_TRUE
- odt_config: ODT configuration; possible values:
* ODT_ASSERT_NEVER
* ODT_ASSERT_WRITES
* ODT_ASSERT_READS
* ODT_ASSERT_ALWAYS
- posted_refreshes: Number of posted refreshes
1, 2, 3, 4, 5, 6, 7, 8
- sdmode: Initial value loaded into the DDR SDRAM mode
register
- esdmode: Initial value loaded into the DDR SDRAM extended
mode register
- esdmode2: Initial value loaded into the DDR SDRAM extended
mode 2 register
- esdmode3: Initial value loaded into the DDR SDRAM extended
mode 3 register
- refresh_interval: Refresh interval; possible values:
0 - 65535
- precharge_interval: Precharge interval; possible values:
0 - 16383
RAM module node:
================
Required properties:
- reg: A triple <cs addr size>, which consists of:
* cs - the chipselect used to drive this RAM module
* addr - the address where this RAM module's memory is map
to in the global memory space
* size - the size of the RAM module's memory in bytes
- auto_precharge: Chip select auto-precharge; possible values:
* AUTO_PRECHARGE_ENABLE
* AUTO_PRECHARGE_DISABLE
- odt_rd_cfg: ODT for reads configuration; possible values:
* ODT_RD_NEVER
* ODT_RD_ONLY_CURRENT
* ODT_RD_ONLY_OTHER_CS
* ODT_RD_ONLY_OTHER_DIMM
* ODT_RD_ALL
- odt_wr_cfg: ODT for writes configuration; possible values:
* ODT_WR_NEVER
* ODT_WR_ONLY_CURRENT
* ODT_WR_ONLY_OTHER_CS
* ODT_WR_ONLY_OTHER_DIMM
* ODT_WR_ALL
- bank_bits: Number of bank bits for SDRAM on chip select; possible
values:
2, 3
- row_bits: Number of row bits for SDRAM on chip select; possible values:
12, 13, 14
- col_bits: Number of column bits for SDRAM on chip select; possible
values:
8, 9, 10, 11
Example:
memory@2000 {
#address-cells = <2>;
#size-cells = <1>;
compatible = "fsl,mpc83xx-mem-controller";
reg = <0x2000 0x1000>;
device_type = "memory";
u-boot,dm-pre-reloc;
driver_software_override = <DSO_ENABLE>;
p_impedance_override = <DSO_P_IMPEDANCE_NOMINAL>;
n_impedance_override = <DSO_N_IMPEDANCE_NOMINAL>;
odt_termination_value = <ODT_TERMINATION_150_OHM>;
ddr_type = <DDR_TYPE_DDR2_1_8_VOLT>;
clock_adjust = <CLOCK_ADJUST_05>;
read_to_write = <0>;
write_to_read = <0>;
read_to_read = <0>;
write_to_write = <0>;
active_powerdown_exit = <2>;
precharge_powerdown_exit = <6>;
odt_powerdown_exit = <8>;
mode_reg_set_cycle = <2>;
precharge_to_activate = <2>;
activate_to_precharge = <6>;
activate_to_readwrite = <2>;
mcas_latency = <CASLAT_40>;
refresh_recovery = <17>;
last_data_to_precharge = <2>;
activate_to_activate = <2>;
last_write_data_to_read = <2>;
additive_latency = <0>;
mcas_to_preamble_override = <READ_LAT_PLUS_1_2>;
write_latency = <3>;
read_to_precharge = <2>;
write_cmd_to_write_data = <CLOCK_DELAY_1_2>;
minimum_cke_pulse_width = <3>;
four_activates_window = <5>;
self_refresh = <SREN_ENABLE>;
sdram_type = <TYPE_DDR2>;
databus_width = <DATA_BUS_WIDTH_32>;
force_self_refresh = <MODE_NORMAL>;
dll_reset = <DLL_RESET_ENABLE>;
dqs_config = <DQS_TRUE>;
odt_config = <ODT_ASSERT_READS>;
posted_refreshes = <1>;
refresh_interval = <2084>;
precharge_interval = <256>;
sdmode = <0x0242>;
esdmode = <0x0440>;
ram@0 {
reg = <0x0 0x0 0x8000000>;
compatible = "nanya,nt5tu64m16hg";
odt_rd_cfg = <ODT_RD_NEVER>;
odt_wr_cfg = <ODT_WR_ONLY_CURRENT>;
bank_bits = <3>;
row_bits = <13>;
col_bits = <10>;
};
};

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MPC83xx timer devices
MPC83xx SoCs offer a decrementer interrupt that can be used to implement delay
functionality, and periodically triggered actions.
Required properties:
- compatible: must be "fsl,mpc83xx-timer"
- clocks: must be a reference to the system's CSB (coherent system bus) clock,
provided by one of the "fsl,mpc83xx-clk" devices
Example:
socclocks: clocks {
compatible = "fsl,mpc832x-clk";
#clock-cells = <1>;
};
timer {
compatible = "fsl,mpc83xx-timer";
clocks = <&socclocks MPC83XX_CLK_CSB>;
};

16
Documentation/efi.rst Normal file
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.. SPDX-License-Identifier: GPL-2.0+
EFI subsystem
=============
Boot services
-------------
.. kernel-doc:: lib/efi_loader/efi_boottime.c
:internal:
Runtime services
----------------
.. kernel-doc:: lib/efi_loader/efi_runtime.c
:internal:

11
Documentation/index.rst Normal file
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.. SPDX-License-Identifier: GPL-2.0+
#######################
U-Boot Developer Manual
#######################
.. toctree::
efi
linker_lists
serial

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.. SPDX-License-Identifier: GPL-2.0+
Linker-Generated Arrays
=======================
A linker list is constructed by grouping together linker input
sections, each containing one entry of the list. Each input section
contains a constant initialized variable which holds the entry's
content. Linker list input sections are constructed from the list
and entry names, plus a prefix which allows grouping all lists
together. Assuming _list and _entry are the list and entry names,
then the corresponding input section name is
::
.u_boot_list_ + 2_ + @_list + _2_ + @_entry
and the C variable name is
::
_u_boot_list + _2_ + @_list + _2_ + @_entry
This ensures uniqueness for both input section and C variable name.
Note that the names differ only in the first character, "." for the
section and "_" for the variable, so that the linker cannot confuse
section and symbol names. From now on, both names will be referred
to as
::
%u_boot_list_ + 2_ + @_list + _2_ + @_entry
Entry variables need never be referred to directly.
The naming scheme for input sections allows grouping all linker lists
into a single linker output section and grouping all entries for a
single list.
Note the two '_2_' constant components in the names: their presence
allows putting a start and end symbols around a list, by mapping
these symbols to sections names with components "1" (before) and
"3" (after) instead of "2" (within).
Start and end symbols for a list can generally be defined as
::
%u_boot_list_2_ + @_list + _1_...
%u_boot_list_2_ + @_list + _3_...
Start and end symbols for the whole of the linker lists area can be
defined as
::
%u_boot_list_1_...
%u_boot_list_3_...
Here is an example of the sorted sections which result from a list
"array" made up of three entries : "first", "second" and "third",
iterated at least once.
::
.u_boot_list_2_array_1
.u_boot_list_2_array_2_first
.u_boot_list_2_array_2_second
.u_boot_list_2_array_2_third
.u_boot_list_2_array_3
If lists must be divided into sublists (e.g. for iterating only on
part of a list), one can simply give the list a name of the form
'outer_2_inner', where 'outer' is the global list name and 'inner'
is the sub-list name. Iterators for the whole list should use the
global list name ("outer"); iterators for only a sub-list should use
the full sub-list name ("outer_2_inner").
Here is an example of the sections generated from a global list
named "drivers", two sub-lists named "i2c" and "pci", and iterators
defined for the whole list and each sub-list:
::
%u_boot_list_2_drivers_1
%u_boot_list_2_drivers_2_i2c_1
%u_boot_list_2_drivers_2_i2c_2_first
%u_boot_list_2_drivers_2_i2c_2_first
%u_boot_list_2_drivers_2_i2c_2_second
%u_boot_list_2_drivers_2_i2c_2_third
%u_boot_list_2_drivers_2_i2c_3
%u_boot_list_2_drivers_2_pci_1
%u_boot_list_2_drivers_2_pci_2_first
%u_boot_list_2_drivers_2_pci_2_second
%u_boot_list_2_drivers_2_pci_2_third
%u_boot_list_2_drivers_2_pci_3
%u_boot_list_2_drivers_3
.. kernel-doc:: include/linker_lists.h
:internal:

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# Rules to convert a .h file to inline RST documentation
SRC_DIR=$(srctree)/Documentation/media
PARSER = $(srctree)/Documentation/sphinx/parse-headers.pl
API = $(srctree)/include
FILES = linker_lists.h.rst
TARGETS := $(addprefix $(BUILDDIR)/, $(FILES))
gen_rst = \
echo ${PARSER} $< $@ $(SRC_DIR)/$(notdir $@).exceptions; \
${PARSER} $< $@ $(SRC_DIR)/$(notdir $@).exceptions
quiet_gen_rst = echo ' PARSE $(patsubst $(srctree)/%,%,$<)'; \
${PARSER} $< $@ $(SRC_DIR)/$(notdir $@).exceptions
silent_gen_rst = ${gen_rst}
$(BUILDDIR)/linker_lists.h.rst: ${API}/linker_lists.h ${PARSER} $(SRC_DIR)/linker_lists.h.rst.exceptions
@$($(quiet)gen_rst)
# Media build rules
.PHONY: all html epub xml latex
all: $(IMGDOT) $(BUILDDIR) ${TARGETS}
html: all
epub: all
xml: all
latex: $(IMGPDF) all
linkcheck:
clean:
-rm -f $(DOTTGT) $(IMGTGT) ${TARGETS} 2>/dev/null
$(BUILDDIR):
$(Q)mkdir -p $@

7
Documentation/serial.rst Normal file
View File

@@ -0,0 +1,7 @@
.. SPDX-License-Identifier: GPL-2.0+
Serial system
=============
.. kernel-doc:: drivers/serial/serial.c
:internal:

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@@ -0,0 +1,89 @@
/* -*- coding: utf-8; mode: css -*-
*
* Sphinx HTML theme customization: read the doc
*
*/
/* Interim: Code-blocks with line nos - lines and line numbers don't line up.
* see: https://github.com/rtfd/sphinx_rtd_theme/issues/419
*/
div[class^="highlight"] pre {
line-height: normal;
}
.rst-content .highlight > pre {
line-height: normal;
}
@media screen {
/* content column
*
* RTD theme's default is 800px as max width for the content, but we have
* tables with tons of columns, which need the full width of the view-port.
*/
.wy-nav-content{max-width: none; }
/* table:
*
* - Sequences of whitespace should collapse into a single whitespace.
* - make the overflow auto (scrollbar if needed)
* - align caption "left" ("center" is unsuitable on vast tables)
*/
.wy-table-responsive table td { white-space: normal; }
.wy-table-responsive { overflow: auto; }
.rst-content table.docutils caption { text-align: left; font-size: 100%; }
/* captions:
*
* - captions should have 100% (not 85%) font size
* - hide the permalink symbol as long as link is not hovered
*/
.toc-title {
font-size: 150%;
font-weight: bold;
}
caption, .wy-table caption, .rst-content table.field-list caption {
font-size: 100%;
}
caption a.headerlink { opacity: 0; }
caption a.headerlink:hover { opacity: 1; }
/* Menu selection and keystrokes */
span.menuselection {
color: blue;
font-family: "Courier New", Courier, monospace
}
code.kbd, code.kbd span {
color: white;
background-color: darkblue;
font-weight: bold;
font-family: "Courier New", Courier, monospace
}
/* fix bottom margin of lists items */
.rst-content .section ul li:last-child, .rst-content .section ul li p:last-child {
margin-bottom: 12px;
}
/* inline literal: drop the borderbox, padding and red color */
code, .rst-content tt, .rst-content code {
color: inherit;
border: none;
padding: unset;
background: inherit;
font-size: 85%;
}
.rst-content tt.literal,.rst-content tt.literal,.rst-content code.literal {
color: inherit;
}
}

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@@ -0,0 +1,165 @@
# -*- coding: utf-8; mode: python -*-
# pylint: disable=W0141,C0113,C0103,C0325
u"""
cdomain
~~~~~~~
Replacement for the sphinx c-domain.
:copyright: Copyright (C) 2016 Markus Heiser
:license: GPL Version 2, June 1991 see Linux/COPYING for details.
List of customizations:
* Moved the *duplicate C object description* warnings for function
declarations in the nitpicky mode. See Sphinx documentation for
the config values for ``nitpick`` and ``nitpick_ignore``.
* Add option 'name' to the "c:function:" directive. With option 'name' the
ref-name of a function can be modified. E.g.::
.. c:function:: int ioctl( int fd, int request )
:name: VIDIOC_LOG_STATUS
The func-name (e.g. ioctl) remains in the output but the ref-name changed
from 'ioctl' to 'VIDIOC_LOG_STATUS'. The function is referenced by::
* :c:func:`VIDIOC_LOG_STATUS` or
* :any:`VIDIOC_LOG_STATUS` (``:any:`` needs sphinx 1.3)
* Handle signatures of function-like macros well. Don't try to deduce
arguments types of function-like macros.
"""
from docutils import nodes
from docutils.parsers.rst import directives
import sphinx
from sphinx import addnodes
from sphinx.domains.c import c_funcptr_sig_re, c_sig_re
from sphinx.domains.c import CObject as Base_CObject
from sphinx.domains.c import CDomain as Base_CDomain
__version__ = '1.0'
# Get Sphinx version
major, minor, patch = sphinx.version_info[:3]
def setup(app):
app.override_domain(CDomain)
return dict(
version = __version__,
parallel_read_safe = True,
parallel_write_safe = True
)
class CObject(Base_CObject):
"""
Description of a C language object.
"""
option_spec = {
"name" : directives.unchanged
}
def handle_func_like_macro(self, sig, signode):
u"""Handles signatures of function-like macros.
If the objtype is 'function' and the the signature ``sig`` is a
function-like macro, the name of the macro is returned. Otherwise
``False`` is returned. """
if not self.objtype == 'function':
return False
m = c_funcptr_sig_re.match(sig)
if m is None:
m = c_sig_re.match(sig)
if m is None:
raise ValueError('no match')
rettype, fullname, arglist, _const = m.groups()
arglist = arglist.strip()
if rettype or not arglist:
return False
arglist = arglist.replace('`', '').replace('\\ ', '') # remove markup
arglist = [a.strip() for a in arglist.split(",")]
# has the first argument a type?
if len(arglist[0].split(" ")) > 1:
return False
# This is a function-like macro, it's arguments are typeless!
signode += addnodes.desc_name(fullname, fullname)
paramlist = addnodes.desc_parameterlist()
signode += paramlist
for argname in arglist:
param = addnodes.desc_parameter('', '', noemph=True)
# separate by non-breaking space in the output
param += nodes.emphasis(argname, argname)
paramlist += param
return fullname
def handle_signature(self, sig, signode):
"""Transform a C signature into RST nodes."""
fullname = self.handle_func_like_macro(sig, signode)
if not fullname:
fullname = super(CObject, self).handle_signature(sig, signode)
if "name" in self.options:
if self.objtype == 'function':
fullname = self.options["name"]
else:
# FIXME: handle :name: value of other declaration types?
pass
return fullname
def add_target_and_index(self, name, sig, signode):
# for C API items we add a prefix since names are usually not qualified
# by a module name and so easily clash with e.g. section titles
targetname = 'c.' + name
if targetname not in self.state.document.ids:
signode['names'].append(targetname)
signode['ids'].append(targetname)
signode['first'] = (not self.names)
self.state.document.note_explicit_target(signode)
inv = self.env.domaindata['c']['objects']
if (name in inv and self.env.config.nitpicky):
if self.objtype == 'function':
if ('c:func', name) not in self.env.config.nitpick_ignore:
self.state_machine.reporter.warning(
'duplicate C object description of %s, ' % name +
'other instance in ' + self.env.doc2path(inv[name][0]),
line=self.lineno)
inv[name] = (self.env.docname, self.objtype)
indextext = self.get_index_text(name)
if indextext:
if major == 1 and minor < 4:
# indexnode's tuple changed in 1.4
# https://github.com/sphinx-doc/sphinx/commit/e6a5a3a92e938fcd75866b4227db9e0524d58f7c
self.indexnode['entries'].append(
('single', indextext, targetname, ''))
else:
self.indexnode['entries'].append(
('single', indextext, targetname, '', None))
class CDomain(Base_CDomain):
"""C language domain."""
name = 'c'
label = 'C'
directives = {
'function': CObject,
'member': CObject,
'macro': CObject,
'type': CObject,
'var': CObject,
}

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#!/usr/bin/env python3
# -*- coding: utf-8; mode: python -*-
# pylint: disable=R0903, C0330, R0914, R0912, E0401
u"""
kernel-include
~~~~~~~~~~~~~~
Implementation of the ``kernel-include`` reST-directive.
:copyright: Copyright (C) 2016 Markus Heiser
:license: GPL Version 2, June 1991 see linux/COPYING for details.
The ``kernel-include`` reST-directive is a replacement for the ``include``
directive. The ``kernel-include`` directive expand environment variables in
the path name and allows to include files from arbitrary locations.
.. hint::
Including files from arbitrary locations (e.g. from ``/etc``) is a
security risk for builders. This is why the ``include`` directive from
docutils *prohibit* pathnames pointing to locations *above* the filesystem
tree where the reST document with the include directive is placed.
Substrings of the form $name or ${name} are replaced by the value of
environment variable name. Malformed variable names and references to
non-existing variables are left unchanged.
"""
# ==============================================================================
# imports
# ==============================================================================
import os.path
from docutils import io, nodes, statemachine
from docutils.utils.error_reporting import SafeString, ErrorString
from docutils.parsers.rst import directives
from docutils.parsers.rst.directives.body import CodeBlock, NumberLines
from docutils.parsers.rst.directives.misc import Include
__version__ = '1.0'
# ==============================================================================
def setup(app):
# ==============================================================================
app.add_directive("kernel-include", KernelInclude)
return dict(
version = __version__,
parallel_read_safe = True,
parallel_write_safe = True
)
# ==============================================================================
class KernelInclude(Include):
# ==============================================================================
u"""KernelInclude (``kernel-include``) directive"""
def run(self):
path = os.path.realpath(
os.path.expandvars(self.arguments[0]))
# to get a bit security back, prohibit /etc:
if path.startswith(os.sep + "etc"):
raise self.severe(
'Problems with "%s" directive, prohibited path: %s'
% (self.name, path))
self.arguments[0] = path
#return super(KernelInclude, self).run() # won't work, see HINTs in _run()
return self._run()
def _run(self):
"""Include a file as part of the content of this reST file."""
# HINT: I had to copy&paste the whole Include.run method. I'am not happy
# with this, but due to security reasons, the Include.run method does
# not allow absolute or relative pathnames pointing to locations *above*
# the filesystem tree where the reST document is placed.
if not self.state.document.settings.file_insertion_enabled:
raise self.warning('"%s" directive disabled.' % self.name)
source = self.state_machine.input_lines.source(
self.lineno - self.state_machine.input_offset - 1)
source_dir = os.path.dirname(os.path.abspath(source))
path = directives.path(self.arguments[0])
if path.startswith('<') and path.endswith('>'):
path = os.path.join(self.standard_include_path, path[1:-1])
path = os.path.normpath(os.path.join(source_dir, path))
# HINT: this is the only line I had to change / commented out:
#path = utils.relative_path(None, path)
path = nodes.reprunicode(path)
encoding = self.options.get(
'encoding', self.state.document.settings.input_encoding)
e_handler=self.state.document.settings.input_encoding_error_handler
tab_width = self.options.get(
'tab-width', self.state.document.settings.tab_width)
try:
self.state.document.settings.record_dependencies.add(path)
include_file = io.FileInput(source_path=path,
encoding=encoding,
error_handler=e_handler)
except UnicodeEncodeError as error:
raise self.severe('Problems with "%s" directive path:\n'
'Cannot encode input file path "%s" '
'(wrong locale?).' %
(self.name, SafeString(path)))
except IOError as error:
raise self.severe('Problems with "%s" directive path:\n%s.' %
(self.name, ErrorString(error)))
startline = self.options.get('start-line', None)
endline = self.options.get('end-line', None)
try:
if startline or (endline is not None):
lines = include_file.readlines()
rawtext = ''.join(lines[startline:endline])
else:
rawtext = include_file.read()
except UnicodeError as error:
raise self.severe('Problem with "%s" directive:\n%s' %
(self.name, ErrorString(error)))
# start-after/end-before: no restrictions on newlines in match-text,
# and no restrictions on matching inside lines vs. line boundaries
after_text = self.options.get('start-after', None)
if after_text:
# skip content in rawtext before *and incl.* a matching text
after_index = rawtext.find(after_text)
if after_index < 0:
raise self.severe('Problem with "start-after" option of "%s" '
'directive:\nText not found.' % self.name)
rawtext = rawtext[after_index + len(after_text):]
before_text = self.options.get('end-before', None)
if before_text:
# skip content in rawtext after *and incl.* a matching text
before_index = rawtext.find(before_text)
if before_index < 0:
raise self.severe('Problem with "end-before" option of "%s" '
'directive:\nText not found.' % self.name)
rawtext = rawtext[:before_index]
include_lines = statemachine.string2lines(rawtext, tab_width,
convert_whitespace=True)
if 'literal' in self.options:
# Convert tabs to spaces, if `tab_width` is positive.
if tab_width >= 0:
text = rawtext.expandtabs(tab_width)
else:
text = rawtext
literal_block = nodes.literal_block(rawtext, source=path,
classes=self.options.get('class', []))
literal_block.line = 1
self.add_name(literal_block)
if 'number-lines' in self.options:
try:
startline = int(self.options['number-lines'] or 1)
except ValueError:
raise self.error(':number-lines: with non-integer '
'start value')
endline = startline + len(include_lines)
if text.endswith('\n'):
text = text[:-1]
tokens = NumberLines([([], text)], startline, endline)
for classes, value in tokens:
if classes:
literal_block += nodes.inline(value, value,
classes=classes)
else:
literal_block += nodes.Text(value, value)
else:
literal_block += nodes.Text(text, text)
return [literal_block]
if 'code' in self.options:
self.options['source'] = path
codeblock = CodeBlock(self.name,
[self.options.pop('code')], # arguments
self.options,
include_lines, # content
self.lineno,
self.content_offset,
self.block_text,
self.state,
self.state_machine)
return codeblock.run()
self.state_machine.insert_input(include_lines, path)
return []

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# coding=utf-8
#
# Copyright © 2016 Intel Corporation
#
# Permission is hereby granted, free of charge, to any person obtaining a
# copy of this software and associated documentation files (the "Software"),
# to deal in the Software without restriction, including without limitation
# the rights to use, copy, modify, merge, publish, distribute, sublicense,
# and/or sell copies of the Software, and to permit persons to whom the
# Software is furnished to do so, subject to the following conditions:
#
# The above copyright notice and this permission notice (including the next
# paragraph) shall be included in all copies or substantial portions of the
# Software.
#
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
# IN THE SOFTWARE.
#
# Authors:
# Jani Nikula <jani.nikula@intel.com>
#
# Please make sure this works on both python2 and python3.
#
import codecs
import os
import subprocess
import sys
import re
import glob
from docutils import nodes, statemachine
from docutils.statemachine import ViewList
from docutils.parsers.rst import directives, Directive
from sphinx.ext.autodoc import AutodocReporter
__version__ = '1.0'
class KernelDocDirective(Directive):
"""Extract kernel-doc comments from the specified file"""
required_argument = 1
optional_arguments = 4
option_spec = {
'doc': directives.unchanged_required,
'functions': directives.unchanged_required,
'export': directives.unchanged,
'internal': directives.unchanged,
}
has_content = False
def run(self):
env = self.state.document.settings.env
cmd = [env.config.kerneldoc_bin, '-rst', '-enable-lineno']
filename = env.config.kerneldoc_srctree + '/' + self.arguments[0]
export_file_patterns = []
# Tell sphinx of the dependency
env.note_dependency(os.path.abspath(filename))
tab_width = self.options.get('tab-width', self.state.document.settings.tab_width)
# FIXME: make this nicer and more robust against errors
if 'export' in self.options:
cmd += ['-export']
export_file_patterns = str(self.options.get('export')).split()
elif 'internal' in self.options:
cmd += ['-internal']
export_file_patterns = str(self.options.get('internal')).split()
elif 'doc' in self.options:
cmd += ['-function', str(self.options.get('doc'))]
elif 'functions' in self.options:
for f in str(self.options.get('functions')).split():
cmd += ['-function', f]
for pattern in export_file_patterns:
for f in glob.glob(env.config.kerneldoc_srctree + '/' + pattern):
env.note_dependency(os.path.abspath(f))
cmd += ['-export-file', f]
cmd += [filename]
try:
env.app.verbose('calling kernel-doc \'%s\'' % (" ".join(cmd)))
p = subprocess.Popen(cmd, stdout=subprocess.PIPE, stderr=subprocess.PIPE)
out, err = p.communicate()
out, err = codecs.decode(out, 'utf-8'), codecs.decode(err, 'utf-8')
if p.returncode != 0:
sys.stderr.write(err)
env.app.warn('kernel-doc \'%s\' failed with return code %d' % (" ".join(cmd), p.returncode))
return [nodes.error(None, nodes.paragraph(text = "kernel-doc missing"))]
elif env.config.kerneldoc_verbosity > 0:
sys.stderr.write(err)
lines = statemachine.string2lines(out, tab_width, convert_whitespace=True)
result = ViewList()
lineoffset = 0;
line_regex = re.compile("^#define LINENO ([0-9]+)$")
for line in lines:
match = line_regex.search(line)
if match:
# sphinx counts lines from 0
lineoffset = int(match.group(1)) - 1
# we must eat our comments since the upset the markup
else:
result.append(line, filename, lineoffset)
lineoffset += 1
node = nodes.section()
buf = self.state.memo.title_styles, self.state.memo.section_level, self.state.memo.reporter
self.state.memo.reporter = AutodocReporter(result, self.state.memo.reporter)
self.state.memo.title_styles, self.state.memo.section_level = [], 0
try:
self.state.nested_parse(result, 0, node, match_titles=1)
finally:
self.state.memo.title_styles, self.state.memo.section_level, self.state.memo.reporter = buf
return node.children
except Exception as e: # pylint: disable=W0703
env.app.warn('kernel-doc \'%s\' processing failed with: %s' %
(" ".join(cmd), str(e)))
return [nodes.error(None, nodes.paragraph(text = "kernel-doc missing"))]
def setup(app):
app.add_config_value('kerneldoc_bin', None, 'env')
app.add_config_value('kerneldoc_srctree', None, 'env')
app.add_config_value('kerneldoc_verbosity', 1, 'env')
app.add_directive('kernel-doc', KernelDocDirective)
return dict(
version = __version__,
parallel_read_safe = True,
parallel_write_safe = True
)

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# -*- coding: utf-8; mode: python -*-
# pylint: disable=C0103, R0903, R0912, R0915
u"""
scalable figure and image handling
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Sphinx extension which implements scalable image handling.
:copyright: Copyright (C) 2016 Markus Heiser
:license: GPL Version 2, June 1991 see Linux/COPYING for details.
The build for image formats depend on image's source format and output's
destination format. This extension implement methods to simplify image
handling from the author's POV. Directives like ``kernel-figure`` implement
methods *to* always get the best output-format even if some tools are not
installed. For more details take a look at ``convert_image(...)`` which is
the core of all conversions.
* ``.. kernel-image``: for image handling / a ``.. image::`` replacement
* ``.. kernel-figure``: for figure handling / a ``.. figure::`` replacement
* ``.. kernel-render``: for render markup / a concept to embed *render*
markups (or languages). Supported markups (see ``RENDER_MARKUP_EXT``)
- ``DOT``: render embedded Graphviz's **DOC**
- ``SVG``: render embedded Scalable Vector Graphics (**SVG**)
- ... *developable*
Used tools:
* ``dot(1)``: Graphviz (http://www.graphviz.org). If Graphviz is not
available, the DOT language is inserted as literal-block.
* SVG to PDF: To generate PDF, you need at least one of this tools:
- ``convert(1)``: ImageMagick (https://www.imagemagick.org)
List of customizations:
* generate PDF from SVG / used by PDF (LaTeX) builder
* generate SVG (html-builder) and PDF (latex-builder) from DOT files.
DOT: see http://www.graphviz.org/content/dot-language
"""
import os
from os import path
import subprocess
from hashlib import sha1
import sys
from docutils import nodes
from docutils.statemachine import ViewList
from docutils.parsers.rst import directives
from docutils.parsers.rst.directives import images
import sphinx
from sphinx.util.nodes import clean_astext
from six import iteritems
PY3 = sys.version_info[0] == 3
if PY3:
_unicode = str
else:
_unicode = unicode
# Get Sphinx version
major, minor, patch = sphinx.version_info[:3]
if major == 1 and minor > 3:
# patches.Figure only landed in Sphinx 1.4
from sphinx.directives.patches import Figure # pylint: disable=C0413
else:
Figure = images.Figure
__version__ = '1.0.0'
# simple helper
# -------------
def which(cmd):
"""Searches the ``cmd`` in the ``PATH`` environment.
This *which* searches the PATH for executable ``cmd`` . First match is
returned, if nothing is found, ``None` is returned.
"""
envpath = os.environ.get('PATH', None) or os.defpath
for folder in envpath.split(os.pathsep):
fname = folder + os.sep + cmd
if path.isfile(fname):
return fname
def mkdir(folder, mode=0o775):
if not path.isdir(folder):
os.makedirs(folder, mode)
def file2literal(fname):
with open(fname, "r") as src:
data = src.read()
node = nodes.literal_block(data, data)
return node
def isNewer(path1, path2):
"""Returns True if ``path1`` is newer than ``path2``
If ``path1`` exists and is newer than ``path2`` the function returns
``True`` is returned otherwise ``False``
"""
return (path.exists(path1)
and os.stat(path1).st_ctime > os.stat(path2).st_ctime)
def pass_handle(self, node): # pylint: disable=W0613
pass
# setup conversion tools and sphinx extension
# -------------------------------------------
# Graphviz's dot(1) support
dot_cmd = None
# ImageMagick' convert(1) support
convert_cmd = None
def setup(app):
# check toolchain first
app.connect('builder-inited', setupTools)
# image handling
app.add_directive("kernel-image", KernelImage)
app.add_node(kernel_image,
html = (visit_kernel_image, pass_handle),
latex = (visit_kernel_image, pass_handle),
texinfo = (visit_kernel_image, pass_handle),
text = (visit_kernel_image, pass_handle),
man = (visit_kernel_image, pass_handle), )
# figure handling
app.add_directive("kernel-figure", KernelFigure)
app.add_node(kernel_figure,
html = (visit_kernel_figure, pass_handle),
latex = (visit_kernel_figure, pass_handle),
texinfo = (visit_kernel_figure, pass_handle),
text = (visit_kernel_figure, pass_handle),
man = (visit_kernel_figure, pass_handle), )
# render handling
app.add_directive('kernel-render', KernelRender)
app.add_node(kernel_render,
html = (visit_kernel_render, pass_handle),
latex = (visit_kernel_render, pass_handle),
texinfo = (visit_kernel_render, pass_handle),
text = (visit_kernel_render, pass_handle),
man = (visit_kernel_render, pass_handle), )
app.connect('doctree-read', add_kernel_figure_to_std_domain)
return dict(
version = __version__,
parallel_read_safe = True,
parallel_write_safe = True
)
def setupTools(app):
u"""
Check available build tools and log some *verbose* messages.
This function is called once, when the builder is initiated.
"""
global dot_cmd, convert_cmd # pylint: disable=W0603
app.verbose("kfigure: check installed tools ...")
dot_cmd = which('dot')
convert_cmd = which('convert')
if dot_cmd:
app.verbose("use dot(1) from: " + dot_cmd)
else:
app.warn("dot(1) not found, for better output quality install "
"graphviz from http://www.graphviz.org")
if convert_cmd:
app.verbose("use convert(1) from: " + convert_cmd)
else:
app.warn(
"convert(1) not found, for SVG to PDF conversion install "
"ImageMagick (https://www.imagemagick.org)")
# integrate conversion tools
# --------------------------
RENDER_MARKUP_EXT = {
# The '.ext' must be handled by convert_image(..) function's *in_ext* input.
# <name> : <.ext>
'DOT' : '.dot',
'SVG' : '.svg'
}
def convert_image(img_node, translator, src_fname=None):
"""Convert a image node for the builder.
Different builder prefer different image formats, e.g. *latex* builder
prefer PDF while *html* builder prefer SVG format for images.
This function handles output image formats in dependence of source the
format (of the image) and the translator's output format.
"""
app = translator.builder.app
fname, in_ext = path.splitext(path.basename(img_node['uri']))
if src_fname is None:
src_fname = path.join(translator.builder.srcdir, img_node['uri'])
if not path.exists(src_fname):
src_fname = path.join(translator.builder.outdir, img_node['uri'])
dst_fname = None
# in kernel builds, use 'make SPHINXOPTS=-v' to see verbose messages
app.verbose('assert best format for: ' + img_node['uri'])
if in_ext == '.dot':
if not dot_cmd:
app.verbose("dot from graphviz not available / include DOT raw.")
img_node.replace_self(file2literal(src_fname))
elif translator.builder.format == 'latex':
dst_fname = path.join(translator.builder.outdir, fname + '.pdf')
img_node['uri'] = fname + '.pdf'
img_node['candidates'] = {'*': fname + '.pdf'}
elif translator.builder.format == 'html':
dst_fname = path.join(
translator.builder.outdir,
translator.builder.imagedir,
fname + '.svg')
img_node['uri'] = path.join(
translator.builder.imgpath, fname + '.svg')
img_node['candidates'] = {
'*': path.join(translator.builder.imgpath, fname + '.svg')}
else:
# all other builder formats will include DOT as raw
img_node.replace_self(file2literal(src_fname))
elif in_ext == '.svg':
if translator.builder.format == 'latex':
if convert_cmd is None:
app.verbose("no SVG to PDF conversion available / include SVG raw.")
img_node.replace_self(file2literal(src_fname))
else:
dst_fname = path.join(translator.builder.outdir, fname + '.pdf')
img_node['uri'] = fname + '.pdf'
img_node['candidates'] = {'*': fname + '.pdf'}
if dst_fname:
# the builder needs not to copy one more time, so pop it if exists.
translator.builder.images.pop(img_node['uri'], None)
_name = dst_fname[len(translator.builder.outdir) + 1:]
if isNewer(dst_fname, src_fname):
app.verbose("convert: {out}/%s already exists and is newer" % _name)
else:
ok = False
mkdir(path.dirname(dst_fname))
if in_ext == '.dot':
app.verbose('convert DOT to: {out}/' + _name)
ok = dot2format(app, src_fname, dst_fname)
elif in_ext == '.svg':
app.verbose('convert SVG to: {out}/' + _name)
ok = svg2pdf(app, src_fname, dst_fname)
if not ok:
img_node.replace_self(file2literal(src_fname))
def dot2format(app, dot_fname, out_fname):
"""Converts DOT file to ``out_fname`` using ``dot(1)``.
* ``dot_fname`` pathname of the input DOT file, including extension ``.dot``
* ``out_fname`` pathname of the output file, including format extension
The *format extension* depends on the ``dot`` command (see ``man dot``
option ``-Txxx``). Normally you will use one of the following extensions:
- ``.ps`` for PostScript,
- ``.svg`` or ``svgz`` for Structured Vector Graphics,
- ``.fig`` for XFIG graphics and
- ``.png`` or ``gif`` for common bitmap graphics.
"""
out_format = path.splitext(out_fname)[1][1:]
cmd = [dot_cmd, '-T%s' % out_format, dot_fname]
exit_code = 42
with open(out_fname, "w") as out:
exit_code = subprocess.call(cmd, stdout = out)
if exit_code != 0:
app.warn("Error #%d when calling: %s" % (exit_code, " ".join(cmd)))
return bool(exit_code == 0)
def svg2pdf(app, svg_fname, pdf_fname):
"""Converts SVG to PDF with ``convert(1)`` command.
Uses ``convert(1)`` from ImageMagick (https://www.imagemagick.org) for
conversion. Returns ``True`` on success and ``False`` if an error occurred.
* ``svg_fname`` pathname of the input SVG file with extension (``.svg``)
* ``pdf_name`` pathname of the output PDF file with extension (``.pdf``)
"""
cmd = [convert_cmd, svg_fname, pdf_fname]
# use stdout and stderr from parent
exit_code = subprocess.call(cmd)
if exit_code != 0:
app.warn("Error #%d when calling: %s" % (exit_code, " ".join(cmd)))
return bool(exit_code == 0)
# image handling
# ---------------------
def visit_kernel_image(self, node): # pylint: disable=W0613
"""Visitor of the ``kernel_image`` Node.
Handles the ``image`` child-node with the ``convert_image(...)``.
"""
img_node = node[0]
convert_image(img_node, self)
class kernel_image(nodes.image):
"""Node for ``kernel-image`` directive."""
pass
class KernelImage(images.Image):
u"""KernelImage directive
Earns everything from ``.. image::`` directive, except *remote URI* and
*glob* pattern. The KernelImage wraps a image node into a
kernel_image node. See ``visit_kernel_image``.
"""
def run(self):
uri = self.arguments[0]
if uri.endswith('.*') or uri.find('://') != -1:
raise self.severe(
'Error in "%s: %s": glob pattern and remote images are not allowed'
% (self.name, uri))
result = images.Image.run(self)
if len(result) == 2 or isinstance(result[0], nodes.system_message):
return result
(image_node,) = result
# wrap image node into a kernel_image node / see visitors
node = kernel_image('', image_node)
return [node]
# figure handling
# ---------------------
def visit_kernel_figure(self, node): # pylint: disable=W0613
"""Visitor of the ``kernel_figure`` Node.
Handles the ``image`` child-node with the ``convert_image(...)``.
"""
img_node = node[0][0]
convert_image(img_node, self)
class kernel_figure(nodes.figure):
"""Node for ``kernel-figure`` directive."""
class KernelFigure(Figure):
u"""KernelImage directive
Earns everything from ``.. figure::`` directive, except *remote URI* and
*glob* pattern. The KernelFigure wraps a figure node into a kernel_figure
node. See ``visit_kernel_figure``.
"""
def run(self):
uri = self.arguments[0]
if uri.endswith('.*') or uri.find('://') != -1:
raise self.severe(
'Error in "%s: %s":'
' glob pattern and remote images are not allowed'
% (self.name, uri))
result = Figure.run(self)
if len(result) == 2 or isinstance(result[0], nodes.system_message):
return result
(figure_node,) = result
# wrap figure node into a kernel_figure node / see visitors
node = kernel_figure('', figure_node)
return [node]
# render handling
# ---------------------
def visit_kernel_render(self, node):
"""Visitor of the ``kernel_render`` Node.
If rendering tools available, save the markup of the ``literal_block`` child
node into a file and replace the ``literal_block`` node with a new created
``image`` node, pointing to the saved markup file. Afterwards, handle the
image child-node with the ``convert_image(...)``.
"""
app = self.builder.app
srclang = node.get('srclang')
app.verbose('visit kernel-render node lang: "%s"' % (srclang))
tmp_ext = RENDER_MARKUP_EXT.get(srclang, None)
if tmp_ext is None:
app.warn('kernel-render: "%s" unknown / include raw.' % (srclang))
return
if not dot_cmd and tmp_ext == '.dot':
app.verbose("dot from graphviz not available / include raw.")
return
literal_block = node[0]
code = literal_block.astext()
hashobj = code.encode('utf-8') # str(node.attributes)
fname = path.join('%s-%s' % (srclang, sha1(hashobj).hexdigest()))
tmp_fname = path.join(
self.builder.outdir, self.builder.imagedir, fname + tmp_ext)
if not path.isfile(tmp_fname):
mkdir(path.dirname(tmp_fname))
with open(tmp_fname, "w") as out:
out.write(code)
img_node = nodes.image(node.rawsource, **node.attributes)
img_node['uri'] = path.join(self.builder.imgpath, fname + tmp_ext)
img_node['candidates'] = {
'*': path.join(self.builder.imgpath, fname + tmp_ext)}
literal_block.replace_self(img_node)
convert_image(img_node, self, tmp_fname)
class kernel_render(nodes.General, nodes.Inline, nodes.Element):
"""Node for ``kernel-render`` directive."""
pass
class KernelRender(Figure):
u"""KernelRender directive
Render content by external tool. Has all the options known from the
*figure* directive, plus option ``caption``. If ``caption`` has a
value, a figure node with the *caption* is inserted. If not, a image node is
inserted.
The KernelRender directive wraps the text of the directive into a
literal_block node and wraps it into a kernel_render node. See
``visit_kernel_render``.
"""
has_content = True
required_arguments = 1
optional_arguments = 0
final_argument_whitespace = False
# earn options from 'figure'
option_spec = Figure.option_spec.copy()
option_spec['caption'] = directives.unchanged
def run(self):
return [self.build_node()]
def build_node(self):
srclang = self.arguments[0].strip()
if srclang not in RENDER_MARKUP_EXT.keys():
return [self.state_machine.reporter.warning(
'Unknown source language "%s", use one of: %s.' % (
srclang, ",".join(RENDER_MARKUP_EXT.keys())),
line=self.lineno)]
code = '\n'.join(self.content)
if not code.strip():
return [self.state_machine.reporter.warning(
'Ignoring "%s" directive without content.' % (
self.name),
line=self.lineno)]
node = kernel_render()
node['alt'] = self.options.get('alt','')
node['srclang'] = srclang
literal_node = nodes.literal_block(code, code)
node += literal_node
caption = self.options.get('caption')
if caption:
# parse caption's content
parsed = nodes.Element()
self.state.nested_parse(
ViewList([caption], source=''), self.content_offset, parsed)
caption_node = nodes.caption(
parsed[0].rawsource, '', *parsed[0].children)
caption_node.source = parsed[0].source
caption_node.line = parsed[0].line
figure_node = nodes.figure('', node)
for k,v in self.options.items():
figure_node[k] = v
figure_node += caption_node
node = figure_node
return node
def add_kernel_figure_to_std_domain(app, doctree):
"""Add kernel-figure anchors to 'std' domain.
The ``StandardDomain.process_doc(..)`` method does not know how to resolve
the caption (label) of ``kernel-figure`` directive (it only knows about
standard nodes, e.g. table, figure etc.). Without any additional handling
this will result in a 'undefined label' for kernel-figures.
This handle adds labels of kernel-figure to the 'std' domain labels.
"""
std = app.env.domains["std"]
docname = app.env.docname
labels = std.data["labels"]
for name, explicit in iteritems(doctree.nametypes):
if not explicit:
continue
labelid = doctree.nameids[name]
if labelid is None:
continue
node = doctree.ids[labelid]
if node.tagname == 'kernel_figure':
for n in node.next_node():
if n.tagname == 'caption':
sectname = clean_astext(n)
# add label to std domain
labels[name] = docname, labelid, sectname
break

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@@ -0,0 +1,32 @@
# -*- coding: utf-8; mode: python -*-
# pylint: disable=R0903, C0330, R0914, R0912, E0401
import os
import sys
from sphinx.util.pycompat import execfile_
# ------------------------------------------------------------------------------
def loadConfig(namespace):
# ------------------------------------------------------------------------------
u"""Load an additional configuration file into *namespace*.
The name of the configuration file is taken from the environment
``SPHINX_CONF``. The external configuration file extends (or overwrites) the
configuration values from the origin ``conf.py``. With this you are able to
maintain *build themes*. """
config_file = os.environ.get("SPHINX_CONF", None)
if (config_file is not None
and os.path.normpath(namespace["__file__"]) != os.path.normpath(config_file) ):
config_file = os.path.abspath(config_file)
if os.path.isfile(config_file):
sys.stdout.write("load additional sphinx-config: %s\n" % config_file)
config = namespace.copy()
config['__file__'] = config_file
execfile_(config_file, config)
del config['__file__']
namespace.update(config)
else:
sys.stderr.write("WARNING: additional sphinx-config not found: %s\n" % config_file)

View File

@@ -0,0 +1,401 @@
#!/usr/bin/perl
use strict;
use Text::Tabs;
use Getopt::Long;
use Pod::Usage;
my $debug;
my $help;
my $man;
GetOptions(
"debug" => \$debug,
'usage|?' => \$help,
'help' => \$man
) or pod2usage(2);
pod2usage(1) if $help;
pod2usage(-exitstatus => 0, -verbose => 2) if $man;
pod2usage(2) if (scalar @ARGV < 2 || scalar @ARGV > 3);
my ($file_in, $file_out, $file_exceptions) = @ARGV;
my $data;
my %ioctls;
my %defines;
my %typedefs;
my %enums;
my %enum_symbols;
my %structs;
require Data::Dumper if ($debug);
#
# read the file and get identifiers
#
my $is_enum = 0;
my $is_comment = 0;
open IN, $file_in or die "Can't open $file_in";
while (<IN>) {
$data .= $_;
my $ln = $_;
if (!$is_comment) {
$ln =~ s,/\*.*(\*/),,g;
$is_comment = 1 if ($ln =~ s,/\*.*,,);
} else {
if ($ln =~ s,^(.*\*/),,) {
$is_comment = 0;
} else {
next;
}
}
if ($is_enum && $ln =~ m/^\s*([_\w][\w\d_]+)\s*[\,=]?/) {
my $s = $1;
my $n = $1;
$n =~ tr/A-Z/a-z/;
$n =~ tr/_/-/;
$enum_symbols{$s} = "\\ :ref:`$s <$n>`\\ ";
$is_enum = 0 if ($is_enum && m/\}/);
next;
}
$is_enum = 0 if ($is_enum && m/\}/);
if ($ln =~ m/^\s*#\s*define\s+([_\w][\w\d_]+)\s+_IO/) {
my $s = $1;
my $n = $1;
$n =~ tr/A-Z/a-z/;
$ioctls{$s} = "\\ :ref:`$s <$n>`\\ ";
next;
}
if ($ln =~ m/^\s*#\s*define\s+([_\w][\w\d_]+)\s+/) {
my $s = $1;
my $n = $1;
$n =~ tr/A-Z/a-z/;
$n =~ tr/_/-/;
$defines{$s} = "\\ :ref:`$s <$n>`\\ ";
next;
}
if ($ln =~ m/^\s*typedef\s+([_\w][\w\d_]+)\s+(.*)\s+([_\w][\w\d_]+);/) {
my $s = $2;
my $n = $3;
$typedefs{$n} = "\\ :c:type:`$n <$s>`\\ ";
next;
}
if ($ln =~ m/^\s*enum\s+([_\w][\w\d_]+)\s+\{/
|| $ln =~ m/^\s*enum\s+([_\w][\w\d_]+)$/
|| $ln =~ m/^\s*typedef\s*enum\s+([_\w][\w\d_]+)\s+\{/
|| $ln =~ m/^\s*typedef\s*enum\s+([_\w][\w\d_]+)$/) {
my $s = $1;
$enums{$s} = "enum :c:type:`$s`\\ ";
$is_enum = $1;
next;
}
if ($ln =~ m/^\s*struct\s+([_\w][\w\d_]+)\s+\{/
|| $ln =~ m/^\s*struct\s+([[_\w][\w\d_]+)$/
|| $ln =~ m/^\s*typedef\s*struct\s+([_\w][\w\d_]+)\s+\{/
|| $ln =~ m/^\s*typedef\s*struct\s+([[_\w][\w\d_]+)$/
) {
my $s = $1;
$structs{$s} = "struct :c:type:`$s`\\ ";
next;
}
}
close IN;
#
# Handle multi-line typedefs
#
my @matches = ($data =~ m/typedef\s+struct\s+\S+?\s*\{[^\}]+\}\s*(\S+)\s*\;/g,
$data =~ m/typedef\s+enum\s+\S+?\s*\{[^\}]+\}\s*(\S+)\s*\;/g,);
foreach my $m (@matches) {
my $s = $m;
$typedefs{$s} = "\\ :c:type:`$s`\\ ";
next;
}
#
# Handle exceptions, if any
#
my %def_reftype = (
"ioctl" => ":ref",
"define" => ":ref",
"symbol" => ":ref",
"typedef" => ":c:type",
"enum" => ":c:type",
"struct" => ":c:type",
);
if ($file_exceptions) {
open IN, $file_exceptions or die "Can't read $file_exceptions";
while (<IN>) {
next if (m/^\s*$/ || m/^\s*#/);
# Parsers to ignore a symbol
if (m/^ignore\s+ioctl\s+(\S+)/) {
delete $ioctls{$1} if (exists($ioctls{$1}));
next;
}
if (m/^ignore\s+define\s+(\S+)/) {
delete $defines{$1} if (exists($defines{$1}));
next;
}
if (m/^ignore\s+typedef\s+(\S+)/) {
delete $typedefs{$1} if (exists($typedefs{$1}));
next;
}
if (m/^ignore\s+enum\s+(\S+)/) {
delete $enums{$1} if (exists($enums{$1}));
next;
}
if (m/^ignore\s+struct\s+(\S+)/) {
delete $structs{$1} if (exists($structs{$1}));
next;
}
if (m/^ignore\s+symbol\s+(\S+)/) {
delete $enum_symbols{$1} if (exists($enum_symbols{$1}));
next;
}
# Parsers to replace a symbol
my ($type, $old, $new, $reftype);
if (m/^replace\s+(\S+)\s+(\S+)\s+(\S+)/) {
$type = $1;
$old = $2;
$new = $3;
} else {
die "Can't parse $file_exceptions: $_";
}
if ($new =~ m/^\:c\:(data|func|macro|type)\:\`(.+)\`/) {
$reftype = ":c:$1";
$new = $2;
} elsif ($new =~ m/\:ref\:\`(.+)\`/) {
$reftype = ":ref";
$new = $1;
} else {
$reftype = $def_reftype{$type};
}
$new = "$reftype:`$old <$new>`";
if ($type eq "ioctl") {
$ioctls{$old} = $new if (exists($ioctls{$old}));
next;
}
if ($type eq "define") {
$defines{$old} = $new if (exists($defines{$old}));
next;
}
if ($type eq "symbol") {
$enum_symbols{$old} = $new if (exists($enum_symbols{$old}));
next;
}
if ($type eq "typedef") {
$typedefs{$old} = $new if (exists($typedefs{$old}));
next;
}
if ($type eq "enum") {
$enums{$old} = $new if (exists($enums{$old}));
next;
}
if ($type eq "struct") {
$structs{$old} = $new if (exists($structs{$old}));
next;
}
die "Can't parse $file_exceptions: $_";
}
}
if ($debug) {
print Data::Dumper->Dump([\%ioctls], [qw(*ioctls)]) if (%ioctls);
print Data::Dumper->Dump([\%typedefs], [qw(*typedefs)]) if (%typedefs);
print Data::Dumper->Dump([\%enums], [qw(*enums)]) if (%enums);
print Data::Dumper->Dump([\%structs], [qw(*structs)]) if (%structs);
print Data::Dumper->Dump([\%defines], [qw(*defines)]) if (%defines);
print Data::Dumper->Dump([\%enum_symbols], [qw(*enum_symbols)]) if (%enum_symbols);
}
#
# Align block
#
$data = expand($data);
$data = " " . $data;
$data =~ s/\n/\n /g;
$data =~ s/\n\s+$/\n/g;
$data =~ s/\n\s+\n/\n\n/g;
#
# Add escape codes for special characters
#
$data =~ s,([\_\`\*\<\>\&\\\\:\/\|\%\$\#\{\}\~\^]),\\$1,g;
$data =~ s,DEPRECATED,**DEPRECATED**,g;
#
# Add references
#
my $start_delim = "[ \n\t\(\=\*\@]";
my $end_delim = "(\\s|,|\\\\=|\\\\:|\\;|\\\)|\\}|\\{)";
foreach my $r (keys %ioctls) {
my $s = $ioctls{$r};
$r =~ s,([\_\`\*\<\>\&\\\\:\/]),\\\\$1,g;
print "$r -> $s\n" if ($debug);
$data =~ s/($start_delim)($r)$end_delim/$1$s$3/g;
}
foreach my $r (keys %defines) {
my $s = $defines{$r};
$r =~ s,([\_\`\*\<\>\&\\\\:\/]),\\\\$1,g;
print "$r -> $s\n" if ($debug);
$data =~ s/($start_delim)($r)$end_delim/$1$s$3/g;
}
foreach my $r (keys %enum_symbols) {
my $s = $enum_symbols{$r};
$r =~ s,([\_\`\*\<\>\&\\\\:\/]),\\\\$1,g;
print "$r -> $s\n" if ($debug);
$data =~ s/($start_delim)($r)$end_delim/$1$s$3/g;
}
foreach my $r (keys %enums) {
my $s = $enums{$r};
$r =~ s,([\_\`\*\<\>\&\\\\:\/]),\\\\$1,g;
print "$r -> $s\n" if ($debug);
$data =~ s/enum\s+($r)$end_delim/$s$2/g;
}
foreach my $r (keys %structs) {
my $s = $structs{$r};
$r =~ s,([\_\`\*\<\>\&\\\\:\/]),\\\\$1,g;
print "$r -> $s\n" if ($debug);
$data =~ s/struct\s+($r)$end_delim/$s$2/g;
}
foreach my $r (keys %typedefs) {
my $s = $typedefs{$r};
$r =~ s,([\_\`\*\<\>\&\\\\:\/]),\\\\$1,g;
print "$r -> $s\n" if ($debug);
$data =~ s/($start_delim)($r)$end_delim/$1$s$3/g;
}
$data =~ s/\\ ([\n\s])/\1/g;
#
# Generate output file
#
my $title = $file_in;
$title =~ s,.*/,,;
open OUT, "> $file_out" or die "Can't open $file_out";
print OUT ".. -*- coding: utf-8; mode: rst -*-\n\n";
print OUT "$title\n";
print OUT "=" x length($title);
print OUT "\n\n.. parsed-literal::\n\n";
print OUT $data;
close OUT;
__END__
=head1 NAME
parse_headers.pl - parse a C file, in order to identify functions, structs,
enums and defines and create cross-references to a Sphinx book.
=head1 SYNOPSIS
B<parse_headers.pl> [<options>] <C_FILE> <OUT_FILE> [<EXCEPTIONS_FILE>]
Where <options> can be: --debug, --help or --man.
=head1 OPTIONS
=over 8
=item B<--debug>
Put the script in verbose mode, useful for debugging.
=item B<--usage>
Prints a brief help message and exits.
=item B<--help>
Prints a more detailed help message and exits.
=back
=head1 DESCRIPTION
Convert a C header or source file (C_FILE), into a ReStructured Text
included via ..parsed-literal block with cross-references for the
documentation files that describe the API. It accepts an optional
EXCEPTIONS_FILE with describes what elements will be either ignored or
be pointed to a non-default reference.
The output is written at the (OUT_FILE).
It is capable of identifying defines, functions, structs, typedefs,
enums and enum symbols and create cross-references for all of them.
It is also capable of distinguish #define used for specifying a Linux
ioctl.
The EXCEPTIONS_FILE contain two rules to allow ignoring a symbol or
to replace the default references by a custom one.
Please read Documentation/doc-guide/parse-headers.rst at the Kernel's
tree for more details.
=head1 BUGS
Report bugs to Mauro Carvalho Chehab <mchehab@kernel.org>
=head1 COPYRIGHT
Copyright (c) 2016 by Mauro Carvalho Chehab <mchehab+samsung@kernel.org>.
License GPLv2: GNU GPL version 2 <http://gnu.org/licenses/gpl.html>.
This is free software: you are free to change and redistribute it.
There is NO WARRANTY, to the extent permitted by law.
=cut

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@@ -0,0 +1,3 @@
docutils==0.12
Sphinx==1.4.9
sphinx_rtd_theme

View File

@@ -0,0 +1,376 @@
#!/usr/bin/env python3
# -*- coding: utf-8; mode: python -*-
# pylint: disable=C0330, R0903, R0912
u"""
flat-table
~~~~~~~~~~
Implementation of the ``flat-table`` reST-directive.
:copyright: Copyright (C) 2016 Markus Heiser
:license: GPL Version 2, June 1991 see linux/COPYING for details.
The ``flat-table`` (:py:class:`FlatTable`) is a double-stage list similar to
the ``list-table`` with some additional features:
* *column-span*: with the role ``cspan`` a cell can be extended through
additional columns
* *row-span*: with the role ``rspan`` a cell can be extended through
additional rows
* *auto span* rightmost cell of a table row over the missing cells on the
right side of that table-row. With Option ``:fill-cells:`` this behavior
can changed from *auto span* to *auto fill*, which automaticly inserts
(empty) cells instead of spanning the last cell.
Options:
* header-rows: [int] count of header rows
* stub-columns: [int] count of stub columns
* widths: [[int] [int] ... ] widths of columns
* fill-cells: instead of autospann missing cells, insert missing cells
roles:
* cspan: [int] additionale columns (*morecols*)
* rspan: [int] additionale rows (*morerows*)
"""
# ==============================================================================
# imports
# ==============================================================================
import sys
from docutils import nodes
from docutils.parsers.rst import directives, roles
from docutils.parsers.rst.directives.tables import Table
from docutils.utils import SystemMessagePropagation
# ==============================================================================
# common globals
# ==============================================================================
# The version numbering follows numbering of the specification
# (Documentation/books/kernel-doc-HOWTO).
__version__ = '1.0'
PY3 = sys.version_info[0] == 3
PY2 = sys.version_info[0] == 2
if PY3:
# pylint: disable=C0103, W0622
unicode = str
basestring = str
# ==============================================================================
def setup(app):
# ==============================================================================
app.add_directive("flat-table", FlatTable)
roles.register_local_role('cspan', c_span)
roles.register_local_role('rspan', r_span)
return dict(
version = __version__,
parallel_read_safe = True,
parallel_write_safe = True
)
# ==============================================================================
def c_span(name, rawtext, text, lineno, inliner, options=None, content=None):
# ==============================================================================
# pylint: disable=W0613
options = options if options is not None else {}
content = content if content is not None else []
nodelist = [colSpan(span=int(text))]
msglist = []
return nodelist, msglist
# ==============================================================================
def r_span(name, rawtext, text, lineno, inliner, options=None, content=None):
# ==============================================================================
# pylint: disable=W0613
options = options if options is not None else {}
content = content if content is not None else []
nodelist = [rowSpan(span=int(text))]
msglist = []
return nodelist, msglist
# ==============================================================================
class rowSpan(nodes.General, nodes.Element): pass # pylint: disable=C0103,C0321
class colSpan(nodes.General, nodes.Element): pass # pylint: disable=C0103,C0321
# ==============================================================================
# ==============================================================================
class FlatTable(Table):
# ==============================================================================
u"""FlatTable (``flat-table``) directive"""
option_spec = {
'name': directives.unchanged
, 'class': directives.class_option
, 'header-rows': directives.nonnegative_int
, 'stub-columns': directives.nonnegative_int
, 'widths': directives.positive_int_list
, 'fill-cells' : directives.flag }
def run(self):
if not self.content:
error = self.state_machine.reporter.error(
'The "%s" directive is empty; content required.' % self.name,
nodes.literal_block(self.block_text, self.block_text),
line=self.lineno)
return [error]
title, messages = self.make_title()
node = nodes.Element() # anonymous container for parsing
self.state.nested_parse(self.content, self.content_offset, node)
tableBuilder = ListTableBuilder(self)
tableBuilder.parseFlatTableNode(node)
tableNode = tableBuilder.buildTableNode()
# SDK.CONSOLE() # print --> tableNode.asdom().toprettyxml()
if title:
tableNode.insert(0, title)
return [tableNode] + messages
# ==============================================================================
class ListTableBuilder(object):
# ==============================================================================
u"""Builds a table from a double-stage list"""
def __init__(self, directive):
self.directive = directive
self.rows = []
self.max_cols = 0
def buildTableNode(self):
colwidths = self.directive.get_column_widths(self.max_cols)
if isinstance(colwidths, tuple):
# Since docutils 0.13, get_column_widths returns a (widths,
# colwidths) tuple, where widths is a string (i.e. 'auto').
# See https://sourceforge.net/p/docutils/patches/120/.
colwidths = colwidths[1]
stub_columns = self.directive.options.get('stub-columns', 0)
header_rows = self.directive.options.get('header-rows', 0)
table = nodes.table()
tgroup = nodes.tgroup(cols=len(colwidths))
table += tgroup
for colwidth in colwidths:
colspec = nodes.colspec(colwidth=colwidth)
# FIXME: It seems, that the stub method only works well in the
# absence of rowspan (observed by the html buidler, the docutils-xml
# build seems OK). This is not extraordinary, because there exists
# no table directive (except *this* flat-table) which allows to
# define coexistent of rowspan and stubs (there was no use-case
# before flat-table). This should be reviewed (later).
if stub_columns:
colspec.attributes['stub'] = 1
stub_columns -= 1
tgroup += colspec
stub_columns = self.directive.options.get('stub-columns', 0)
if header_rows:
thead = nodes.thead()
tgroup += thead
for row in self.rows[:header_rows]:
thead += self.buildTableRowNode(row)
tbody = nodes.tbody()
tgroup += tbody
for row in self.rows[header_rows:]:
tbody += self.buildTableRowNode(row)
return table
def buildTableRowNode(self, row_data, classes=None):
classes = [] if classes is None else classes
row = nodes.row()
for cell in row_data:
if cell is None:
continue
cspan, rspan, cellElements = cell
attributes = {"classes" : classes}
if rspan:
attributes['morerows'] = rspan
if cspan:
attributes['morecols'] = cspan
entry = nodes.entry(**attributes)
entry.extend(cellElements)
row += entry
return row
def raiseError(self, msg):
error = self.directive.state_machine.reporter.error(
msg
, nodes.literal_block(self.directive.block_text
, self.directive.block_text)
, line = self.directive.lineno )
raise SystemMessagePropagation(error)
def parseFlatTableNode(self, node):
u"""parses the node from a :py:class:`FlatTable` directive's body"""
if len(node) != 1 or not isinstance(node[0], nodes.bullet_list):
self.raiseError(
'Error parsing content block for the "%s" directive: '
'exactly one bullet list expected.' % self.directive.name )
for rowNum, rowItem in enumerate(node[0]):
row = self.parseRowItem(rowItem, rowNum)
self.rows.append(row)
self.roundOffTableDefinition()
def roundOffTableDefinition(self):
u"""Round off the table definition.
This method rounds off the table definition in :py:member:`rows`.
* This method inserts the needed ``None`` values for the missing cells
arising from spanning cells over rows and/or columns.
* recount the :py:member:`max_cols`
* Autospan or fill (option ``fill-cells``) missing cells on the right
side of the table-row
"""
y = 0
while y < len(self.rows):
x = 0
while x < len(self.rows[y]):
cell = self.rows[y][x]
if cell is None:
x += 1
continue
cspan, rspan = cell[:2]
# handle colspan in current row
for c in range(cspan):
try:
self.rows[y].insert(x+c+1, None)
except: # pylint: disable=W0702
# the user sets ambiguous rowspans
pass # SDK.CONSOLE()
# handle colspan in spanned rows
for r in range(rspan):
for c in range(cspan + 1):
try:
self.rows[y+r+1].insert(x+c, None)
except: # pylint: disable=W0702
# the user sets ambiguous rowspans
pass # SDK.CONSOLE()
x += 1
y += 1
# Insert the missing cells on the right side. For this, first
# re-calculate the max columns.
for row in self.rows:
if self.max_cols < len(row):
self.max_cols = len(row)
# fill with empty cells or cellspan?
fill_cells = False
if 'fill-cells' in self.directive.options:
fill_cells = True
for row in self.rows:
x = self.max_cols - len(row)
if x and not fill_cells:
if row[-1] is None:
row.append( ( x - 1, 0, []) )
else:
cspan, rspan, content = row[-1]
row[-1] = (cspan + x, rspan, content)
elif x and fill_cells:
for i in range(x):
row.append( (0, 0, nodes.comment()) )
def pprint(self):
# for debugging
retVal = "[ "
for row in self.rows:
retVal += "[ "
for col in row:
if col is None:
retVal += ('%r' % col)
retVal += "\n , "
else:
content = col[2][0].astext()
if len (content) > 30:
content = content[:30] + "..."
retVal += ('(cspan=%s, rspan=%s, %r)'
% (col[0], col[1], content))
retVal += "]\n , "
retVal = retVal[:-2]
retVal += "]\n , "
retVal = retVal[:-2]
return retVal + "]"
def parseRowItem(self, rowItem, rowNum):
row = []
childNo = 0
error = False
cell = None
target = None
for child in rowItem:
if (isinstance(child , nodes.comment)
or isinstance(child, nodes.system_message)):
pass
elif isinstance(child , nodes.target):
target = child
elif isinstance(child, nodes.bullet_list):
childNo += 1
cell = child
else:
error = True
break
if childNo != 1 or error:
self.raiseError(
'Error parsing content block for the "%s" directive: '
'two-level bullet list expected, but row %s does not '
'contain a second-level bullet list.'
% (self.directive.name, rowNum + 1))
for cellItem in cell:
cspan, rspan, cellElements = self.parseCellItem(cellItem)
if target is not None:
cellElements.insert(0, target)
row.append( (cspan, rspan, cellElements) )
return row
def parseCellItem(self, cellItem):
# search and remove cspan, rspan colspec from the first element in
# this listItem (field).
cspan = rspan = 0
if not len(cellItem):
return cspan, rspan, []
for elem in cellItem[0]:
if isinstance(elem, colSpan):
cspan = elem.get("span")
elem.parent.remove(elem)
continue
if isinstance(elem, rowSpan):
rspan = elem.get("span")
elem.parent.remove(elem)
continue
return cspan, rspan, cellItem[:]

154
Kconfig
View File

@@ -59,30 +59,69 @@ config CC_OPTIMIZE_FOR_SIZE
This option is enabled by default for U-Boot.
config CC_COVERAGE
bool "Enable code coverage analysis"
depends on SANDBOX
help
Enabling this option will pass "--coverage" to gcc to compile
and link code instrumented for coverage analysis.
config DISTRO_DEFAULTS
bool "Select defaults suitable for booting general purpose Linux distributions"
default y if ARCH_SUNXI || TEGRA
default y if ARCH_LS2080A
default y if ARCH_MESON
default y if ARCH_ROCKCHIP
default n
imply USE_BOOTCOMMAND
select CMD_BOOTZ if ARM && !ARM64
select AUTO_COMPLETE
select CMDLINE_EDITING
select CMD_BOOTI if ARM64
select CMD_DHCP
select CMD_PXE
select CMD_BOOTZ if ARM && !ARM64
select CMD_DHCP if CMD_NET
select CMD_ENV_EXISTS
select CMD_EXT2
select CMD_EXT4
select CMD_FAT
select CMD_FS_GENERIC
select CMD_MII
select CMD_PING
select CMD_PART
select CMD_PART if PARTITIONS
select CMD_PING if CMD_NET
select CMD_PXE if NET
select ENV_VARS_UBOOT_CONFIG
select HUSH_PARSER
select SUPPORT_RAW_INITRD
select SYS_LONGHELP
imply CMD_MII if NET
imply USE_BOOTCOMMAND
help
Select this to enable various options and commands which are suitable
for building u-boot for booting general purpose Linux distributions.
config ENV_VARS_UBOOT_CONFIG
bool "Add arch, board, vendor and soc variables to default environment"
help
Define this in order to add variables describing the
U-Boot build configuration to the default environment.
These will be named arch, cpu, board, vendor, and soc.
Enabling this option will cause the following to be defined:
- CONFIG_SYS_ARCH
- CONFIG_SYS_CPU
- CONFIG_SYS_BOARD
- CONFIG_SYS_VENDOR
- CONFIG_SYS_SOC
config NR_DRAM_BANKS
int "Number of DRAM banks"
default 4
help
This defines the number of DRAM banks.
config SYS_BOOT_GET_CMDLINE
bool "Enable kernel command line setup"
help
Enables allocating and saving kernel cmdline in space between
"bootm_low" and "bootm_low" + BOOTMAPSZ.
config SYS_BOOT_GET_KBD
bool "Enable kernel board information setup"
help
Enables allocating and saving a kernel copy of the bd_info in
space between "bootm_low" and "bootm_low" + BOOTMAPSZ.
config SYS_MALLOC_F
bool "Enable malloc() pool before relocation"
default y if DM
@@ -95,6 +134,7 @@ config SYS_MALLOC_F
config SYS_MALLOC_F_LEN
hex "Size of malloc() pool before relocation"
depends on SYS_MALLOC_F
default 0x1000 if AM33XX
default 0x400
help
Before relocation, memory is very limited on many platforms. Still,
@@ -102,25 +142,32 @@ config SYS_MALLOC_F_LEN
particular needs this to operate, so that it can allocate the
initial serial device and any others that are needed.
config SYS_MALLOC_LEN
hex "Define memory for Dynamic allocation"
depends on ARCH_ZYNQ
help
This defines memory to be allocated for Dynamic allocation
TODO: Use for other architectures
config SPL_SYS_MALLOC_F_LEN
hex "Size of malloc() pool in SPL before relocation"
depends on SYS_MALLOC_F
default SYS_MALLOC_F_LEN
help
Before relocation, memory is very limited on many platforms. Still,
we can provide a small malloc() pool if needed. Driver model in
particular needs this to operate, so that it can allocate the
initial serial device and any others that are needed.
hex "Size of malloc() pool in SPL before relocation"
depends on SYS_MALLOC_F
default SYS_MALLOC_F_LEN
help
Before relocation, memory is very limited on many platforms. Still,
we can provide a small malloc() pool if needed. Driver model in
particular needs this to operate, so that it can allocate the
initial serial device and any others that are needed.
config TPL_SYS_MALLOC_F_LEN
hex "Size of malloc() pool in TPL before relocation"
depends on SYS_MALLOC_F
default SYS_MALLOC_F_LEN
help
Before relocation, memory is very limited on many platforms. Still,
we can provide a small malloc() pool if needed. Driver model in
particular needs this to operate, so that it can allocate the
initial serial device and any others that are needed.
hex "Size of malloc() pool in TPL before relocation"
depends on SYS_MALLOC_F
default SYS_MALLOC_F_LEN
help
Before relocation, memory is very limited on many platforms. Still,
we can provide a small malloc() pool if needed. Driver model in
particular needs this to operate, so that it can allocate the
initial serial device and any others that are needed.
menuconfig EXPERT
bool "Configure standard U-Boot features (expert users)"
@@ -203,8 +250,8 @@ if FIT
config FIT_ENABLE_SHA256_SUPPORT
bool "Support SHA256 checksum of FIT image contents"
select SHA256
default y
select SHA256
help
Enable this to support SHA256 checksum of FIT image contents. A
SHA256 checksum is a 256-bit (32-byte) hash value used to check that
@@ -218,6 +265,7 @@ config FIT_ENABLE_SHA256_SUPPORT
config FIT_SIGNATURE
bool "Enable signature verification of FIT uImages"
depends on DM
select HASH
select RSA
help
This option enables signature verification of FIT uImages,
@@ -232,6 +280,16 @@ config FIT_SIGNATURE
format support in this case, enable it using
CONFIG_IMAGE_FORMAT_LEGACY.
config FIT_SIGNATURE_MAX_SIZE
hex "Max size of signed FIT structures"
depends on FIT_SIGNATURE
default 0x10000000
help
This option sets a max size in bytes for verified FIT uImages.
A sane value of 256MB protects corrupted DTB structures from overlapping
device memory. Assure this size does not extend past expected storage
space.
config FIT_VERBOSE
bool "Show verbose messages when FIT images fail"
help
@@ -270,6 +328,12 @@ config SPL_FIT
depends on SPL
select SPL_OF_LIBFDT
config SPL_FIT_PRINT
bool "Support FIT printing within SPL"
depends on SPL_FIT
help
Support printing the content of the fitImage in a verbose manner in SPL.
config SPL_FIT_SIGNATURE
bool "Enable signature verification of FIT firmware within SPL"
depends on SPL_DM
@@ -287,6 +351,17 @@ config SPL_LOAD_FIT
particular it can handle selecting from multiple device tree
and passing the correct one to U-Boot.
config SPL_LOAD_FIT_FULL
bool "Enable SPL loading U-Boot as a FIT"
select SPL_FIT
help
Normally with the SPL framework a legacy image is generated as part
of the build. This contains U-Boot along with information as to
where it should be loaded. This option instead enables generation
of a FIT (Flat Image Tree) which provides more flexibility. In
particular it can handle selecting from multiple device tree
and passing the correct one to U-Boot.
config SPL_FIT_IMAGE_POST_PROCESS
bool "Enable post-processing of FIT artifacts after loading by the SPL"
depends on SPL_LOAD_FIT
@@ -323,6 +398,16 @@ endif # SPL
endif # FIT
config IMAGE_FORMAT_LEGACY
bool "Enable support for the legacy image format"
default y if !FIT_SIGNATURE
help
This option enables the legacy image format. It is enabled by
default for backward compatibility, unless FIT_SIGNATURE is
set where it is disabled so that unsigned images cannot be
loaded. If a board needs the legacy image format support in this
case, enable it here.
config OF_BOARD_SETUP
bool "Set up board-specific details in device tree before boot"
depends on OF_LIBFDT
@@ -366,15 +451,16 @@ config SYS_EXTRA_OPTIONS
new boards should not use this option.
config SYS_TEXT_BASE
depends on ARC || X86 || ARCH_UNIPHIER || ARCH_ZYNQMP || \
(M68K && !TARGET_ASTRO_MCF5373L) || MICROBLAZE || MIPS || \
ARCH_ZYNQ || ARCH_KEYSTONE || ARCH_OMAP2PLUS
depends on !NIOS2 && !XTENSA
depends on !EFI_APP
default 0x80800000 if ARCH_OMAP2PLUS || ARCH_K3
default 0x4a000000 if ARCH_SUNXI && !MACH_SUN9I && !MACH_SUN8I_V3S
default 0x2a000000 if ARCH_SUNXI && MACH_SUN9I
default 0x42e00000 if ARCH_SUNXI && MACH_SUN8I_V3S
hex "Text Base"
help
TODO: Move CONFIG_SYS_TEXT_BASE for all the architecture
The address in memory that U-Boot will be running from, initially.
default 0x80800000 if ARCH_OMAP2PLUS
config SYS_CLK_FREQ

View File

@@ -1,3 +1,5 @@
SPDX-License-Identifier: GPL-2.0
U-Boot is Free Software. It is copyrighted by Wolfgang Denk and
many others who contributed code (see the actual source code and the
git commit messages for details). You can redistribute U-Boot and/or
@@ -31,27 +33,107 @@ information, ...) which makes automatic processing a nightmare.
To make this easier, such license headers in the source files will be
replaced with a single line reference to Unique License Identifiers
as defined by the Linux Foundation's SPDX project [1]. For example,
in a source file the full "GPL v2.0 or later" header text will be
replaced by a single line:
SPDX-License-Identifier: GPL-2.0+
Ideally, the license terms of all files in the source tree should be
defined by such License Identifiers; in no case a file can contain
more than one such License Identifier list.
as defined by the Linux Foundation's SPDX project [1].
If a "SPDX-License-Identifier:" line references more than one Unique
License Identifier, then this means that the respective file can be
used under the terms of either of these licenses, i. e. with
SPDX-License-Identifier: GPL-2.0+ BSD-3-Clause
SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
you can choose between GPL-2.0+ and BSD-3-Clause licensing.
We use the SPDX Unique License Identifiers here; these are available
at [2].
License identifier syntax
-------------------------
1. Placement:
The SPDX license identifier in U-Boot files shall be added at the first
possible line in a file which can contain a comment. For the majority
or files this is the first line, except for scripts which require the
'#!PATH_TO_INTERPRETER' in the first line. For those scripts the SPDX
identifier goes into the second line.
|
2. Style:
The SPDX license identifier is added in form of a comment. The comment
style depends on the file type::
C source: // SPDX-License-Identifier: <SPDX License Expression>
C header: /* SPDX-License-Identifier: <SPDX License Expression> */
ASM: /* SPDX-License-Identifier: <SPDX License Expression> */
scripts: # SPDX-License-Identifier: <SPDX License Expression>
.rst: .. SPDX-License-Identifier: <SPDX License Expression>
.dts{i}: // SPDX-License-Identifier: <SPDX License Expression>
If a specific tool cannot handle the standard comment style, then the
appropriate comment mechanism which the tool accepts shall be used. This
is the reason for having the "/\* \*/" style comment in C header
files. There was build breakage observed with generated .lds files where
'ld' failed to parse the C++ comment. This has been fixed by now, but
there are still older assembler tools which cannot handle C++ style
comments.
|
3. Syntax:
A <SPDX License Expression> is either an SPDX short form license
identifier found on the SPDX License List, or the combination of two
SPDX short form license identifiers separated by "WITH" when a license
exception applies. When multiple licenses apply, an expression consists
of keywords "AND", "OR" separating sub-expressions and surrounded by
"(", ")" .
License identifiers for licenses like [L]GPL with the 'or later' option
are constructed by using a "+" for indicating the 'or later' option.::
// SPDX-License-Identifier: GPL-2.0+
// SPDX-License-Identifier: LGPL-2.1+
WITH should be used when there is a modifier to a license needed.
For example, the linux kernel UAPI files use the expression::
// SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note
// SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note
Other examples using WITH exceptions found in the linux kernel are::
// SPDX-License-Identifier: GPL-2.0 WITH mif-exception
// SPDX-License-Identifier: GPL-2.0+ WITH GCC-exception-2.0
Exceptions can only be used with particular License identifiers. The
valid License identifiers are listed in the tags of the exception text
file.
OR should be used if the file is dual licensed and only one license is
to be selected. For example, some dtsi files are available under dual
licenses::
// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
Examples from U-Boot for license expressions in dual licensed files::
// SPDX-License-Identifier: GPL-2.0 OR MIT
// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
AND should be used if the file has multiple licenses whose terms all
apply to use the file. For example, if code is inherited from another
project and permission has been given to put it in U-Boot, but the
original license terms need to remain in effect::
// SPDX-License-Identifier: (GPL-2.0 WITH Linux-syscall-note) AND MIT
Another other example where both sets of license terms need to be
adhered to is::
// SPDX-License-Identifier: GPL-1.0+ AND LGPL-2.1+
[1] http://spdx.org/
[2] http://spdx.org/licenses/

View File

@@ -55,15 +55,12 @@ Maintainers List (try to look for most precise areas first)
-----------------------------------
ARC
M: Alexey Brodkin <alexey.brodkin@synopsys.com>
S: Maintained
T: git git://git.denx.de/u-boot-arc.git
F: arch/arc/
ARC HSDK CREG GPIO
M: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
S: Maintained
L: uboot-snps-arc@synopsys.com
F: drivers/gpio/hsdk-creg-gpio.c
T: git git://git.denx.de/u-boot-arc.git
F: arch/arc/
F: board/synopsys/
ARC HSDK CGU CLOCK
M: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
@@ -73,6 +70,13 @@ F: drivers/clk/clk-hsdk-cgu.c
F: include/dt-bindings/clock/snps,hsdk-cgu.h
F: doc/device-tree-bindings/clock/snps,hsdk-cgu.txt
ARC HSDK CREG GPIO
M: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
S: Maintained
L: uboot-snps-arc@synopsys.com
F: doc/device-tree-bindings/gpio/snps,creg-gpio.txt
F: drivers/gpio/hsdk-creg-gpio.c
ARM
M: Albert Aribaud <albert.u.boot@aribaud.net>
S: Maintained
@@ -92,14 +96,27 @@ T: git git://git.denx.de/u-boot-atmel.git
F: arch/arm/mach-at91/
ARM BROADCOM BCM283X
#M: Stephen Warren <swarren@wwwdotorg.org>
S: Orphaned (Since 2017-07)
M: Alexander Graf <agraf@suse.de>
S: Maintained
F: arch/arm/mach-bcm283x/
F: drivers/gpio/bcm2835_gpio.c
F: drivers/mmc/bcm2835_sdhci.c
F: drivers/mmc/bcm2835_sdhost.c
F: drivers/serial/serial_bcm283x_mu.c
F: drivers/serial/serial_bcm283x_pl011.c
F: drivers/video/bcm2835.c
F: include/dm/platform_data/serial_bcm283x_mu.h
F: drivers/pinctrl/broadcom/
ARM BROADCOM BCMSTB
M: Thomas Fitzsimmons <fitzsim@fitzsim.org>
S: Maintained
F: arch/arm/mach-bcmstb/
F: board/broadcom/bcmstb/
F: configs/bcm7*_defconfig
F: doc/README.bcm7xxx
F: drivers/mmc/bcmstb_sdhci.c
F: drivers/spi/bcmstb_spi.c
ARM FREESCALE IMX
M: Stefano Babic <sbabic@denx.de>
@@ -108,7 +125,6 @@ S: Maintained
T: git git://git.denx.de/u-boot-imx.git
F: arch/arm/cpu/arm1136/mx*/
F: arch/arm/cpu/arm926ejs/mx*/
F: arch/arm/cpu/armv7/mx*/
F: arch/arm/cpu/armv7/vf610/
F: arch/arm/mach-imx/
F: arch/arm/include/asm/arch-imx/
@@ -121,9 +137,9 @@ ARM HISILICON
M: Peter Griffin <peter.griffin@linaro.org>
S: Maintained
F: arch/arm/cpu/armv8/hisilicon
F: arm/include/asm/arch-hi6220/
F: arch/arm/include/asm/arch-hi6220/
ARM MARVELL KIRKWOOD ARMADA-XP ARMADA-38X
ARM MARVELL KIRKWOOD ARMADA-XP ARMADA-38X ARMADA-37XX
M: Prafulla Wadaskar <prafulla@marvell.com>
M: Luka Perkov <luka.perkov@sartura.hr>
M: Stefan Roese <sr@denx.de>
@@ -131,6 +147,8 @@ S: Maintained
T: git git://git.denx.de/u-boot-marvell.git
F: arch/arm/mach-kirkwood/
F: arch/arm/mach-mvebu/
F: drivers/ata/ahci_mvebu.c
F: drivers/phy/marvell/
ARM MARVELL PXA
M: Marek Vasut <marex@denx.de>
@@ -139,6 +157,15 @@ T: git git://git.denx.de/u-boot-pxa.git
F: arch/arm/cpu/pxa/
F: arch/arm/include/asm/arch-pxa/
ARM OWL
M: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
S: Maintained
F: arch/arm/include/asm/arch-owl/
F: arch/arm/mach-owl/
F: board/ucRobotics/
F: drivers/clk/owl/
F: drivers/serial/serial_owl.c
ARM RENESAS RMOBILE/R-CAR
M: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
M: Marek Vasut <marek.vasut+renesas@gmail.com>
@@ -157,9 +184,12 @@ F: board/rockchip/
F: drivers/clk/rockchip/
F: drivers/gpio/rk_gpio.c
F: drivers/misc/rockchip-efuse.c
F: drivers/mmc/rockchip_sdhci.c
F: drivers/mmc/rockchip_dw_mmc.c
F: drivers/pinctrl/rockchip/
F: drivers/ram/rockchip/
F: drivers/sysreset/sysreset_rockchip.c
F: drivers/video/rockchip/
F: tools/rkcommon.c
F: tools/rkcommon.h
F: tools/rkimage.c
@@ -170,16 +200,26 @@ ARM SAMSUNG
M: Minkyu Kang <mk7.kang@samsung.com>
S: Maintained
T: git git://git.denx.de/u-boot-samsung.git
F: arch/arm/cpu/arm920t/s3c24x0/
F: arch/arm/mach-exynos/
F: arch/arm/mach-s5pc1xx/
F: arch/arm/cpu/armv7/s5p-common/
F: arch/arm/include/asm/arch-s3c24x0/
ARM SNAPDRAGON
M: Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
M: Ramon Fried <ramon.fried@gmail.com>
S: Maintained
F: arch/arm/mach-snapdragon/
F: drivers/gpio/msm_gpio.c
F: drivers/mmc/msm_sdhci.c
F: drivers/phy/msm8916-usbh-phy.c
F: drivers/serial/serial_msm.c
F: drivers/smem/msm_smem.c
F: drivers/usb/host/ehci-msm.c
ARM STI
M: Patrice Chotard <patrice.chotard@st.com>
S: Maintained
F: arch/arm/mach-sti/
F: arch/arm/include/asm/arch-sti*/
ARM STM SPEAR
#M: Vipin Kumar <vipin.kumar@st.com>
@@ -188,21 +228,33 @@ T: git git://git.denx.de/u-boot-stm.git
F: arch/arm/cpu/arm926ejs/spear/
F: arch/arm/include/asm/arch-spear/
ARM STM STM32MP
M: Patrick Delaunay <patrick.delaunay@st.com>
M: Christophe Kerello <christophe.kerello@st.com>
M: Patrice Chotard <patrice.chotard@st.com>
S: Maintained
F: arch/arm/mach-stm32mp
F: drivers/clk/clk_stm32mp1.c
F: drivers/i2c/stm32f7_i2c.c
F: drivers/misc/stm32mp_fuse.c
F: drivers/mmc/stm32_sdmmc2.c
F: drivers/phy/phy-stm32-usbphyc.c
F: drivers/pinctrl/pinctrl_stm32.c
F: drivers/power/regulator/stm32-vrefbuf.c
F: drivers/ram/stm32mp1/
F: drivers/misc/stm32_rcc.c
F: drivers/reset/stm32-reset.c
F: drivers/spi/stm32_qspi.c
ARM STM STV0991
M: Vikas Manocha <vikas.manocha@st.com>
S: Maintained
F: arch/arm/cpu/armv7/stv0991/
F: arch/arm/include/asm/arch-stv0991/
ARM STI
M: Patrice Chotard <patrice.chotard@st.com>
S: Maintained
F: arch/arm/mach-sti/
F: arch/arm/include/asm/arch-sti*/
ARM SUNXI
M: Jagan Teki <jagan@openedev.com>
M: Maxime Ripard <maxime.ripard@free-electrons.com>
M: Maxime Ripard <maxime.ripard@bootlin.com>
S: Maintained
T: git git://git.denx.de/u-boot-sunxi.git
F: arch/arm/cpu/armv7/sunxi/
@@ -222,9 +274,8 @@ M: Tom Rini <trini@konsulko.com>
S: Maintained
T: git git://git.denx.de/u-boot-ti.git
F: arch/arm/mach-davinci/
F: arch/arm/mach-k3/
F: arch/arm/mach-keystone/
F: arch/arm/cpu/arm926ejs/omap/
F: arch/arm/cpu/armv7/omap*/
F: arch/arm/include/asm/arch-omap*/
F: arch/arm/include/asm/ti-common/
@@ -236,17 +287,68 @@ F: arch/arm/mach-uniphier/
F: configs/uniphier_*_defconfig
N: uniphier
ARM VERSATILE EXPRESS DRIVERS
M: Liviu Dudau <liviu.dudau@foss.arm.com>
S: Maintained
T: git git://github.com/ARM-software/u-boot.git
F: drivers/misc/vexpress_config.c
N: vexpress
ARM ZYNQ
M: Michal Simek <monstr@monstr.eu>
S: Maintained
F: arch/arm/cpu/armv7/zynq/
F: arch/arm/include/asm/arch-zynq/
T: git git://git.denx.de/u-boot-microblaze.git
F: arch/arm/mach-zynq/
F: drivers/clk/clk_zynq.c
F: drivers/fpga/zynqpl.c
F: drivers/gpio/zynq_gpio.c
F: drivers/i2c/i2c-cdns.c
F: drivers/i2c/muxes/pca954x.c
F: drivers/i2c/zynq_i2c.c
F: drivers/mmc/zynq_sdhci.c
F: drivers/mtd/nand/raw/zynq_nand.c
F: drivers/net/phy/xilinx_phy.c
F: drivers/net/zynq_gem.c
F: drivers/serial/serial_zynq.c
F: drivers/spi/zynq_qspi.c
F: drivers/spi/zynq_spi.c
F: drivers/usb/host/ehci-zynq.c
F: drivers/watchdog/cdns_wdt.c
F: include/zynqpl.h
F: tools/zynqimage.c
N: zynq
ARM ZYNQMP
M: Michal Simek <michal.simek@xilinx.com>
S: Maintained
T: git git://git.denx.de/u-boot-microblaze.git
F: arch/arm/cpu/armv8/zynqmp/
F: arch/arm/include/asm/arch-zynqmp/
F: drivers/clk/clk_zynqmp.c
F: drivers/fpga/zynqpl.c
F: drivers/gpio/zynq_gpio.c
F: drivers/i2c/i2c-cdns.c
F: drivers/i2c/muxes/pca954x.c
F: drivers/i2c/zynq_i2c.c
F: drivers/mmc/zynq_sdhci.c
F: drivers/mtd/nand/raw/zynq_nand.c
F: drivers/net/phy/xilinx_phy.c
F: drivers/net/zynq_gem.c
F: drivers/serial/serial_zynq.c
F: drivers/spi/zynq_qspi.c
F: drivers/spi/zynq_spi.c
F: drivers/timer/cadence-ttc.c
F: drivers/usb/host/ehci-zynq.c
F: drivers/watchdog/cdns_wdt.c
F: include/zynqmppl.h
F: tools/zynqmp*
N: ultra96
N: zynqmp
ARM ZYNQMP R5
M: Michal Simek <michal.simek@xilinx.com>
S: Maintained
T: git git://git.denx.de/u-boot-microblaze.git
F: arch/arm/mach-zynqmp-r5/
BUILDMAN
M: Simon Glass <sjg@chromium.org>
@@ -261,7 +363,7 @@ F: drivers/mtd/cfi_flash.c
F: drivers/mtd/jedec_flash.c
COLDFIRE
M: Huan Wang <alison.wang@freescale.com>
M: Huan Wang <alison.wang@nxp.com>
M: Angelo Dureghello <angelo@sysam.it>
S: Maintained
T: git git://git.denx.de/u-boot-coldfire.git
@@ -286,10 +388,29 @@ EFI PAYLOAD
M: Alexander Graf <agraf@suse.de>
S: Maintained
T: git git://github.com/agraf/u-boot.git
F: doc/README.uefi
F: doc/README.iscsi
F: Documentation/efi.rst
F: include/capitalization.h
F: include/cp1250.h
F: include/cp437.h
F: include/efi*
F: lib/efi*
F: include/pe.h
F: include/asm-generic/pe.h
F: lib/charset.c
F: lib/efi*/
F: test/py/tests/test_efi*
F: test/unicode_ut.c
F: cmd/bootefi.c
F: tools/file2include.c
FPGA
M: Michal Simek <michal.simek@xilinx.com>
S: Maintained
T: git git://git.denx.de/u-boot-microblaze.git
F: drivers/fpga/
F: cmd/fpga.c
F: include/fpga.h
FLATTENED DEVICE TREE
M: Simon Glass <sjg@chromium.org>
@@ -298,7 +419,7 @@ T: git git://git.denx.de/u-boot-fdt.git
F: lib/fdtdec*
F: lib/libfdt/
F: include/fdt*
F: include/libfdt*
F: include/linux/libfdt*
F: cmd/fdt.c
F: common/fdt_support.c
@@ -327,11 +448,26 @@ F: cmd/log.c
F: test/log/log_test.c
F: test/py/tests/test_log.py
MALI DISPLAY PROCESSORS
M: Liviu Dudau <liviu.dudau@foss.arm.com>
S: Supported
T: git git://github.com/ARM-software/u-boot.git
F: drivers/video/mali_dp.c
MICROBLAZE
M: Michal Simek <monstr@monstr.eu>
S: Maintained
T: git git://git.denx.de/u-boot-microblaze.git
F: arch/microblaze/
F: cmd/mfsl.c
F: drivers/gpio/xilinx_gpio.c
F: drivers/net/xilinx_axi_emac.c
F: drivers/net/xilinx_emaclite.c
F: drivers/serial/serial_xuartlite.c
F: drivers/spi/xilinx_spi.c
F: drivers/sysreset/sysreset_gpio.c
F: drivers/watchdog/xilinx_tb_wdt.c
N: xilinx
MIPS
M: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
@@ -345,11 +481,48 @@ S: Maintained
T: git git://git.denx.de/u-boot-mmc.git
F: drivers/mmc/
NAND FLASH
#M: Scott Wood <oss@buserror.net>
S: Orphaned (Since 2018-07)
T: git git://git.denx.de/u-boot-nand-flash.git
F: drivers/mtd/nand/raw/
NDS32
M: Macpaul Lin <macpaul@andestech.com>
S: Maintained
T: git git://git.denx.de/u-boot-nds32.git
F: arch/nds32/
NETWORK
M: Joe Hershberger <joe.hershberger@ni.com>
S: Maintained
T: git git://git.denx.de/u-boot-net.git
F: drivers/net/
F: net/
NIOS
M: Thomas Chou <thomas@wytron.com.tw>
S: Maintained
T: git git://git.denx.de/u-boot-nios.git
F: arch/nios2/
ONENAND
#M: Lukasz Majewski <l.majewski@majess.pl>
S: Orphaned (Since 2017-01)
T: git git://git.denx.de/u-boot-onenand.git
F: drivers/mtd/onenand/
PATMAN
M: Simon Glass <sjg@chromium.org>
S: Maintained
F: tools/patman/
POWER
M: Jaehoon Chung <jh80.chung@samsung.com>
S: Maintained
T: git git://git.denx.de/u-boot-pmic.git
F: drivers/power/
POWERPC
M: Wolfgang Denk <wd@denx.de>
S: Maintained
@@ -365,6 +538,17 @@ POWERPC MPC83XX
M: Mario Six <mario.six@gdsys.cc>
S: Maintained
T: git git://git.denx.de/u-boot-mpc83xx.git
F: drivers/ram/mpc83xx_sdram.c
F: include/dt-bindings/memory/mpc83xx-sdram.h
F: drivers/sysreset/sysreset_mpc83xx.c
F: drivers/sysreset/sysreset_mpc83xx.h
F: drivers/clk/mpc83xx_clk.c
F: drivers/clk/mpc83xx_clk.h
F: include/dt-bindings/clk/mpc83xx-clk.h
F: drivers/timer/mpc83xx_timer.c
F: drivers/cpu/mpc83xx_cpu.c
F: drivers/cpu/mpc83xx_cpu.h
F: drivers/misc/mpc83xx_serdes.c
F: arch/powerpc/cpu/mpc83xx/
F: arch/powerpc/include/asm/arch-mpc83xx/
@@ -380,48 +564,19 @@ S: Maintained
T: git git://git.denx.de/u-boot-mpc86xx.git
F: arch/powerpc/cpu/mpc86xx/
POWERPC PPC4XX
M: Stefan Roese <sr@denx.de>
RISC-V
M: Rick Chen <rick@andestech.com>
S: Maintained
T: git git://git.denx.de/u-boot-ppc4xx.git
F: arch/powerpc/cpu/ppc4xx/
T: git git://git.denx.de/u-boot-riscv.git
F: arch/riscv/
F: tools/prelink-riscv.c
POWER
M: Jaehoon Chung <jh80.chung@samsung.com>
ROCKUSB
M: Eddie Cai <eddie.cai.linux@gmail.com>
S: Maintained
T: git git://git.denx.de/u-boot-pmic.git
F: drivers/power/
NETWORK
M: Joe Hershberger <joe.hershberger@ni.com>
S: Maintained
T: git git://git.denx.de/u-boot-net.git
F: drivers/net/
F: net/
NAND FLASH
M: Scott Wood <oss@buserror.net>
S: Maintained
T: git git://git.denx.de/u-boot-nand-flash.git
F: drivers/mtd/nand/
NDS32
M: Macpaul Lin <macpaul@andestech.com>
S: Maintained
T: git git://git.denx.de/u-boot-nds32.git
F: arch/nds32/
NIOS
M: Thomas Chou <thomas@wytron.com.tw>
S: Maintained
T: git git://git.denx.de/u-boot-nios.git
F: arch/nios2/
ONENAND
#M: Lukasz Majewski <l.majewski@majess.pl>
S: Orphaned (Since 2017-01)
T: git git://git.denx.de/u-boot-onenand.git
F: drivers/mtd/onenand/
F: drivers/usb/gadget/f_rockusb.c
F: cmd/rockusb.c
F: doc/README.rockusb
SANDBOX
M: Simon Glass <sjg@chromium.org>
@@ -448,11 +603,15 @@ S: Maintained
F: drivers/spmi/
F: include/spmi/
TDA19988 HDMI ENCODER
M: Liviu Dudau <liviu.dudau@foss.arm.com>
S: Maintained
F: drivers/video/tda19988.c
TI SYSTEM SECURITY
M: Andrew F. Davis <afd@ti.com>
S: Supported
F: arch/arm/mach-omap2/omap5/sec_entry_cpu1.S
F: arch/arm/mach-omap2/omap5/sec-fxns.c
F: arch/arm/mach-omap2/sec-common.c
F: arch/arm/mach-omap2/config_secure.mk
F: configs/am335x_hs_evm_defconfig
@@ -463,12 +622,20 @@ F: configs/dra7xx_hs_evm_defconfig
F: configs/k2hk_hs_evm_defconfig
F: configs/k2e_hs_evm_defconfig
F: configs/k2g_hs_evm_defconfig
F: configs/k2l_hs_evm_defconfig
TQ GROUP
#M: Martin Krause <martin.krause@tq-systems.de>
S: Orphaned (Since 2016-02)
T: git git://git.denx.de/u-boot-tq-group.git
TEE
M: Jens Wiklander <jens.wiklander@linaro.org>
S: Maintained
F: drivers/tee/
F: include/tee.h
F: include/tee/
UBI
M: Kyungmin Park <kmpark@infradead.org>
M: Heiko Schocher <hs@denx.de>
@@ -495,6 +662,7 @@ T: git git://git.denx.de/u-boot-video.git
F: drivers/video/
F: common/lcd*.c
F: include/lcd*.h
F: include/video*.h
X86
M: Simon Glass <sjg@chromium.org>

212
Makefile
View File

@@ -1,11 +1,9 @@
#
# SPDX-License-Identifier: GPL-2.0+
#
# SPDX-License-Identifier: GPL-2.0+
VERSION = 2018
PATCHLEVEL = 01
PATCHLEVEL = 11
SUBLEVEL =
EXTRAVERSION =
EXTRAVERSION = -rc2
NAME =
# *DOCUMENTATION*
@@ -260,6 +258,16 @@ HOSTCFLAGS = -Wall -Wstrict-prototypes -O2 -fomit-frame-pointer \
$(if $(CONFIG_TOOLS_DEBUG),-g)
HOSTCXXFLAGS = -O2
# With the move to GCC 6, we have implicitly upgraded our language
# standard to GNU11 (see https://gcc.gnu.org/gcc-5/porting_to.html).
# Some Linux distributions (including RHEL7, SLES13, Debian 8) still
# have older compilers as their default, so we make it explicit for
# these that our host tools are GNU11 (i.e. C11 w/ GNU extensions).
CSTD_FLAG := -std=gnu11
ifeq ($(HOSTOS),linux)
HOSTCFLAGS += $(CSTD_FLAG)
endif
ifeq ($(HOSTOS),cygwin)
HOSTCFLAGS += -ansi
endif
@@ -346,9 +354,13 @@ LDR = $(CROSS_COMPILE)ldr
STRIP = $(CROSS_COMPILE)strip
OBJCOPY = $(CROSS_COMPILE)objcopy
OBJDUMP = $(CROSS_COMPILE)objdump
LEX = flex
YACC = bison
AWK = awk
PERL = perl
PYTHON ?= python
PYTHON2 = python2
PYTHON3 = python3
DTC ?= $(objtree)/scripts/dtc/dtc
CHECK = sparse
@@ -359,10 +371,14 @@ KBUILD_CPPFLAGS := -D__KERNEL__ -D__UBOOT__
KBUILD_CFLAGS := -Wall -Wstrict-prototypes \
-Wno-format-security \
-fno-builtin -ffreestanding
KBUILD_CFLAGS += -fshort-wchar
-fno-builtin -ffreestanding $(CSTD_FLAG)
KBUILD_CFLAGS += -fshort-wchar -fno-strict-aliasing
KBUILD_AFLAGS := -D__ASSEMBLY__
# Don't generate position independent code
KBUILD_CFLAGS += $(call cc-option,-fno-PIE)
KBUILD_AFLAGS += $(call cc-option,-fno-PIE)
# Read UBOOTRELEASE from include/config/uboot.release (if it exists)
UBOOTRELEASE = $(shell cat include/config/uboot.release 2> /dev/null)
UBOOTVERSION = $(VERSION)$(if $(PATCHLEVEL),.$(PATCHLEVEL)$(if $(SUBLEVEL),.$(SUBLEVEL)))$(EXTRAVERSION)
@@ -371,7 +387,7 @@ export VERSION PATCHLEVEL SUBLEVEL UBOOTRELEASE UBOOTVERSION
export ARCH CPU BOARD VENDOR SOC CPUDIR BOARDDIR
export CONFIG_SHELL HOSTCC HOSTCFLAGS HOSTLDFLAGS CROSS_COMPILE AS LD CC
export CPP AR NM LDR STRIP OBJCOPY OBJDUMP
export MAKE AWK PERL PYTHON
export MAKE LEX YACC AWK PERL PYTHON PYTHON2 PYTHON3
export HOSTCXX HOSTCXXFLAGS CHECK CHECKFLAGS DTC DTC_FLAGS
export KBUILD_CPPFLAGS NOSTDINC_FLAGS UBOOTINCLUDE OBJCOPYFLAGS LDFLAGS
@@ -423,6 +439,7 @@ endif
version_h := include/generated/version_autogenerated.h
timestamp_h := include/generated/timestamp_autogenerated.h
defaultenv_h := include/generated/defaultenv_autogenerated.h
no-dot-config-targets := clean clobber mrproper distclean \
help %docs check% coccicheck \
@@ -506,7 +523,7 @@ $(KCONFIG_CONFIG) include/config/auto.conf.cmd: ;
# if auto.conf.cmd is missing then we are probably in a cleaned tree so
# we execute the config step to be sure to catch updated Kconfig files
include/config/%.conf: $(KCONFIG_CONFIG) include/config/auto.conf.cmd
$(Q)$(MAKE) -f $(srctree)/Makefile silentoldconfig
$(Q)$(MAKE) -f $(srctree)/Makefile syncconfig
@# If the following part fails, include/config/auto.conf should be
@# deleted so "make silentoldconfig" will be re-run on the next build.
$(Q)$(MAKE) -f $(srctree)/scripts/Makefile.autoconf || \
@@ -594,17 +611,31 @@ endif
KBUILD_CFLAGS += $(call cc-option,-fno-stack-protector)
KBUILD_CFLAGS += $(call cc-option,-fno-delete-null-pointer-checks)
# change __FILE__ to the relative path from the srctree
KBUILD_CFLAGS += $(call cc-option,-fmacro-prefix-map=$(srctree)/=)
KBUILD_CFLAGS += -g
# $(KBUILD_AFLAGS) sets -g, which causes gcc to pass a suitable -g<format>
# option to the assembler.
KBUILD_AFLAGS += -g
# Report stack usage if supported
# ARC tools based on GCC 7.1 has an issue with stack usage
# with naked functions, see commit message for more details
ifndef CONFIG_ARC
ifeq ($(shell $(CONFIG_SHELL) $(srctree)/scripts/gcc-stack-usage.sh $(CC)),y)
KBUILD_CFLAGS += -fstack-usage
endif
endif
KBUILD_CFLAGS += $(call cc-option,-Wno-format-nonliteral)
ifeq ($(cc-name),clang)
KBUILD_CPPFLAGS += $(call cc-option,-Qunused-arguments,)
KBUILD_CFLAGS += $(call cc-disable-warning, format-invalid-specifier)
KBUILD_CFLAGS += $(call cc-disable-warning, gnu)
KBUILD_CFLAGS += $(call cc-disable-warning, address-of-packed-member)
KBUILD_CFLAGS += $(call cc-option, -fcatch-undefined-behavior)
endif
# turn jbsr into jsr for m68k
ifeq ($(ARCH),m68k)
@@ -658,7 +689,7 @@ libs-y += drivers/dma/
libs-y += drivers/gpio/
libs-y += drivers/i2c/
libs-y += drivers/mtd/
libs-$(CONFIG_CMD_NAND) += drivers/mtd/nand/
libs-$(CONFIG_CMD_NAND) += drivers/mtd/nand/raw/
libs-y += drivers/mtd/onenand/
libs-$(CONFIG_CMD_UBI) += drivers/mtd/ubi/
libs-y += drivers/mtd/spi/
@@ -720,6 +751,12 @@ else
PLATFORM_LIBGCC := -L $(shell dirname `$(CC) $(c_flags) -print-libgcc-file-name`) -lgcc
endif
PLATFORM_LIBS += $(PLATFORM_LIBGCC)
ifdef CONFIG_CC_COVERAGE
KBUILD_CFLAGS += --coverage
PLATFORM_LIBGCC += -lgcov
endif
export PLATFORM_LIBS
export PLATFORM_LIBGCC
@@ -781,8 +818,12 @@ ALL-$(CONFIG_SPL) += spl/u-boot-spl.bin
ifeq ($(CONFIG_MX6)$(CONFIG_SECURE_BOOT), yy)
ALL-$(CONFIG_SPL_FRAMEWORK) += u-boot-ivt.img
else
ifeq ($(CONFIG_MX7)$(CONFIG_SECURE_BOOT), yy)
ALL-$(CONFIG_SPL_FRAMEWORK) += u-boot-ivt.img
else
ALL-$(CONFIG_SPL_FRAMEWORK) += u-boot.img
endif
endif
ALL-$(CONFIG_TPL) += tpl/u-boot-tpl.bin
ALL-$(CONFIG_OF_SEPARATE) += u-boot.dtb
ifeq ($(CONFIG_SPL_FRAMEWORK),y)
@@ -800,6 +841,11 @@ ifneq ($(BUILD_ROM)$(CONFIG_BUILD_ROM),)
ALL-$(CONFIG_X86_RESET_VECTOR) += u-boot.rom
endif
# Build a combined spl + u-boot image for sunxi
ifeq ($(CONFIG_ARCH_SUNXI)$(CONFIG_SPL),yy)
ALL-y += u-boot-sunxi-with-spl.bin
endif
# enable combined SPL/u-boot/dtb rules for tegra
ifeq ($(CONFIG_TEGRA)$(CONFIG_SPL),yy)
ALL-y += u-boot-tegra.bin u-boot-nodtb-tegra.bin
@@ -811,12 +857,20 @@ ifneq ($(CONFIG_BUILD_TARGET),)
ALL-y += $(CONFIG_BUILD_TARGET:"%"=%)
endif
ifneq ($(CONFIG_SYS_INIT_SP_BSS_OFFSET),)
ALL-y += init_sp_bss_offset_check
endif
ifeq ($(CONFIG_MPC85xx)$(CONFIG_OF_SEPARATE),yy)
ALL-y += u-boot-with-dtb.bin
endif
LDFLAGS_u-boot += $(LDFLAGS_FINAL)
# Avoid 'Not enough room for program headers' error on binutils 2.28 onwards.
LDFLAGS_u-boot += $(call ld-option, --no-dynamic-linker)
ifneq ($(CONFIG_SYS_TEXT_BASE),)
ifeq ($(CONFIG_ARC)$(CONFIG_NIOS2)$(CONFIG_X86)$(CONFIG_XTENSA),)
LDFLAGS_u-boot += -Ttext $(CONFIG_SYS_TEXT_BASE)
endif
@@ -836,11 +890,11 @@ MKIMAGEOUTPUT ?= /dev/null
quiet_cmd_mkimage = MKIMAGE $@
cmd_mkimage = $(objtree)/tools/mkimage $(MKIMAGEFLAGS_$(@F)) -d $< $@ \
$(if $(KBUILD_VERBOSE:1=), >$(MKIMAGEOUTPUT))
>$(MKIMAGEOUTPUT) $(if $(KBUILD_VERBOSE:0=), && cat $(MKIMAGEOUTPUT))
quiet_cmd_mkfitimage = MKIMAGE $@
cmd_mkfitimage = $(objtree)/tools/mkimage $(MKIMAGEFLAGS_$(@F)) -f $(U_BOOT_ITS) -E $@ \
$(if $(KBUILD_VERBOSE:1=), >$(MKIMAGEOUTPUT))
>$(MKIMAGEOUTPUT) $(if $(KBUILD_VERBOSE:0=), && cat $(MKIMAGEOUTPUT))
quiet_cmd_cat = CAT $@
cmd_cat = cat $(filter-out $(PHONY), $^) > $@
@@ -922,8 +976,24 @@ OBJCOPYFLAGS_u-boot.srec := -O srec
u-boot.hex u-boot.srec: u-boot FORCE
$(call if_changed,objcopy)
OBJCOPYFLAGS_u-boot-elf.srec := $(OBJCOPYFLAGS_u-boot.srec)
u-boot-elf.srec: u-boot.elf FORCE
$(call if_changed,objcopy)
OBJCOPYFLAGS_u-boot-spl.srec = $(OBJCOPYFLAGS_u-boot.srec)
spl/u-boot-spl.srec: spl/u-boot-spl FORCE
$(call if_changed,objcopy)
OBJCOPYFLAGS_u-boot-nodtb.bin := -O binary \
$(if $(CONFIG_X86_16BIT_INIT),-R .start16 -R .resetvec)
$(if $(CONFIG_X86_16BIT_INIT),-R .start16 -R .resetvec) \
$(if $(CONFIG_MPC85XX_HAVE_RESET_VECTOR),-R .bootpg -R .resetvec)
OBJCOPYFLAGS_u-boot-spl.hex = $(OBJCOPYFLAGS_u-boot.hex)
spl/u-boot-spl.hex: spl/u-boot-spl FORCE
$(call if_changed,objcopy)
binary_size_check: u-boot-nodtb.bin FORCE
@file_size=$(shell wc -c u-boot-nodtb.bin | awk '{print $$1}') ; \
@@ -939,6 +1009,33 @@ binary_size_check: u-boot-nodtb.bin FORCE
fi \
fi
ifneq ($(CONFIG_SYS_INIT_SP_BSS_OFFSET),)
ifneq ($(CONFIG_SYS_MALLOC_F_LEN),)
subtract_sys_malloc_f_len = space=$$(($${space} - $(CONFIG_SYS_MALLOC_F_LEN)))
else
subtract_sys_malloc_f_len = true
endif
# The 1/4 margin below is somewhat arbitrary. The likely initial SP usage is
# so low that the DTB could probably use 90%+ of the available space, for
# current values of CONFIG_SYS_INIT_SP_BSS_OFFSET at least. However, let's be
# safe for now and tweak this later if space becomes tight.
# A rejected alternative would be to check that some absolute minimum stack
# space was available. However, since CONFIG_SYS_INIT_SP_BSS_OFFSET is
# deliberately build-specific, to take account of build-to-build stack usage
# differences due to different feature sets, there is no common absolute value
# to check against.
init_sp_bss_offset_check: u-boot.dtb FORCE
@dtb_size=$(shell wc -c u-boot.dtb | awk '{print $$1}') ; \
space=$(CONFIG_SYS_INIT_SP_BSS_OFFSET) ; \
$(subtract_sys_malloc_f_len) ; \
quarter_space=$$(($${space} / 4)) ; \
if [ $${dtb_size} -gt $${quarter_space} ]; then \
echo "u-boot.dtb is larger than 1 quarter of " >&2 ; \
echo "(CONFIG_SYS_INIT_SP_BSS_OFFSET - CONFIG_SYS_MALLOC_F_LEN)" >&2 ; \
exit 1 ; \
fi
endif
u-boot-nodtb.bin: u-boot FORCE
$(call if_changed,objcopy)
$(call DO_STATIC_RELA,$<,$@,$(CONFIG_SYS_TEXT_BASE))
@@ -970,11 +1067,6 @@ ifndef CONFIG_SYS_UBOOT_START
CONFIG_SYS_UBOOT_START := 0
endif
# Create a file containing the configuration options the image was built with
quiet_cmd_cpp_cfg = CFG $@
cmd_cpp_cfg = $(CPP) -Wp,-MD,$(depfile) $(cpp_flags) $(LDPPFLAGS) -ansi \
-DDO_DEPS_ONLY -D__ASSEMBLY__ -x assembler-with-cpp -P -dM -E -o $@ $<
# Boards with more complex image requirments can provide an .its source file
# or a generator script
ifneq ($(CONFIG_SPL_FIT_SOURCE),"")
@@ -982,7 +1074,10 @@ U_BOOT_ITS = $(subst ",,$(CONFIG_SPL_FIT_SOURCE))
else
ifneq ($(CONFIG_SPL_FIT_GENERATOR),"")
U_BOOT_ITS := u-boot.its
$(U_BOOT_ITS): FORCE
ifeq ($(CONFIG_SPL_FIT_GENERATOR),"arch/arm/mach-rockchip/make_fit_atf.py")
U_BOOT_ITS_DEPS += u-boot
endif
$(U_BOOT_ITS): $(U_BOOT_ITS_DEPS) FORCE
$(srctree)/$(CONFIG_SPL_FIT_GENERATOR) \
$(patsubst %,arch/$(ARCH)/dts/%.dtb,$(subst ",,$(CONFIG_OF_LIST))) > $@
endif
@@ -1022,6 +1117,7 @@ u-boot-dtb.img u-boot.img u-boot.kwb u-boot.pbl u-boot-ivt.img: \
u-boot.itb: u-boot-nodtb.bin dts/dt.dtb $(U_BOOT_ITS) FORCE
$(call if_changed,mkfitimage)
$(BOARD_SIZE_CHECK)
u-boot-spl.kwb: u-boot.img spl/u-boot-spl.bin FORCE
$(call if_changed,mkimage)
@@ -1032,8 +1128,8 @@ u-boot.sha1: u-boot.bin
u-boot.dis: u-boot
$(OBJDUMP) -d $< > $@
ifdef CONFIG_TPL
SPL_PAYLOAD := tpl/u-boot-with-tpl.bin
ifneq ($(CONFIG_SPL_PAYLOAD),)
SPL_PAYLOAD := $(CONFIG_SPL_PAYLOAD:"%"=%)
else
SPL_PAYLOAD := u-boot.bin
endif
@@ -1119,6 +1215,18 @@ u-boot-with-spl.sfp: spl/u-boot-spl.sfp u-boot.img FORCE
$(call if_changed,socboot)
endif
ifeq ($(CONFIG_MPC85xx)$(CONFIG_OF_SEPARATE),yy)
u-boot-with-dtb.bin: u-boot.bin u-boot.dtb \
$(if $(CONFIG_MPC85XX_HAVE_RESET_VECTOR), u-boot-br.bin) FORCE
$(call if_changed,binman)
ifeq ($(CONFIG_MPC85XX_HAVE_RESET_VECTOR),y)
OBJCOPYFLAGS_u-boot-br.bin := -O binary -j .bootpg -j .resetvec
u-boot-br.bin: u-boot FORCE
$(call if_changed,objcopy)
endif
endif
# x86 uses a large ROM. We fill it with 0xff, put the 16-bit stuff (including
# reset vector) at the top, Intel ME descriptor at the bottom, and U-Boot in
# the middle. This is handled by binman based on an image description in the
@@ -1144,14 +1252,20 @@ u-boot-x86-16bit.bin: u-boot FORCE
endif
ifneq ($(CONFIG_ARCH_SUNXI),)
ifeq ($(CONFIG_ARM64),)
u-boot-sunxi-with-spl.bin: spl/sunxi-spl.bin u-boot.img u-boot.dtb FORCE
$(call if_changed,binman)
else
u-boot-sunxi-with-spl.bin: spl/sunxi-spl.bin u-boot.itb FORCE
$(call if_changed,cat)
endif
endif
ifneq ($(CONFIG_TEGRA),)
ifneq ($(CONFIG_BINMAN),)
u-boot-dtb-tegra.bin u-boot-tegra.bin u-boot-nodtb-tegra.bin: \
spl/u-boot-spl u-boot.bin FORCE
# Makes u-boot-dtb-tegra.bin u-boot-tegra.bin u-boot-nodtb-tegra.bin
%-dtb-tegra.bin %-tegra.bin %-nodtb-tegra.bin: \
spl/%-spl %.bin FORCE
$(call if_changed,binman)
else
OBJCOPYFLAGS_u-boot-nodtb-tegra.bin = -O binary --pad-to=$(CONFIG_SYS_TEXT_BASE)
@@ -1207,8 +1321,12 @@ spl/u-boot-spl.pbl: spl/u-boot-spl.bin FORCE
ifeq ($(ARCH),arm)
UBOOT_BINLOAD := u-boot.img
else
ifeq ($(CONFIG_MPC85xx)$(CONFIG_OF_SEPARATE),yy)
UBOOT_BINLOAD := u-boot-with-dtb.bin
else
UBOOT_BINLOAD := u-boot.bin
endif
endif
OBJCOPYFLAGS_u-boot-with-spl-pbl.bin = -I binary -O binary --pad-to=$(CONFIG_SPL_PAD_TO) \
--gap-fill=0xff
@@ -1264,6 +1382,10 @@ ifeq ($(CONFIG_KALLSYMS),y)
$(call cmd,u-boot__) common/system_map.o
endif
ifeq ($(CONFIG_RISCV),y)
@tools/prelink-riscv $@ 0
endif
quiet_cmd_sym ?= SYM $@
cmd_sym ?= $(OBJDUMP) -t $< > $@
u-boot.sym: u-boot FORCE
@@ -1331,6 +1453,10 @@ ifeq ($(wildcard $(LDSCRIPT)),)
@/bin/false
endif
ifeq ($(CONFIG_USE_DEFAULT_ENV_FILE),y)
prepare1: $(defaultenv_h)
endif
archprepare: prepare1 scripts_basic
prepare0: archprepare FORCE
@@ -1378,16 +1504,27 @@ define filechk_timestamp.h
fi)
endef
define filechk_defaultenv.h
(grep -v '^#' | \
grep -v '^$$' | \
tr '\n' '\0' | \
sed -e 's/\\\x0/\n/' | \
xxd -i ; echo ", 0x00" ; )
endef
$(version_h): include/config/uboot.release FORCE
$(call filechk,version.h)
$(timestamp_h): $(srctree)/Makefile FORCE
$(call filechk,timestamp.h)
$(defaultenv_h): $(CONFIG_DEFAULT_ENV_FILE:"%"=%) FORCE
$(call filechk,defaultenv.h)
# ---------------------------------------------------------------------------
quiet_cmd_cpp_lds = LDS $@
cmd_cpp_lds = $(CPP) -Wp,-MD,$(depfile) $(cpp_flags) $(LDPPFLAGS) \
-D__ASSEMBLY__ -x assembler-with-cpp -P -o $@ $<
-D__ASSEMBLY__ -x assembler-with-cpp -std=c99 -P -o $@ $<
u-boot.lds: $(LDSCRIPT) prepare FORCE
$(call if_changed_dep,cpp_lds)
@@ -1500,24 +1637,25 @@ clean: rm-files := $(CLEAN_FILES)
clean-dirs := $(foreach f,$(u-boot-alldirs),$(if $(wildcard $(srctree)/$f/Makefile),$f))
clean-dirs := $(addprefix _clean_, $(clean-dirs) doc/DocBook)
clean-dirs := $(addprefix _clean_, $(clean-dirs))
PHONY += $(clean-dirs) clean archclean
$(clean-dirs):
$(Q)$(MAKE) $(clean)=$(patsubst _clean_%,%,$@)
# TODO: Do not use *.cfgtmp
clean: $(clean-dirs)
$(call cmd,rmdirs)
$(call cmd,rmfiles)
@find $(if $(KBUILD_EXTMOD), $(KBUILD_EXTMOD), .) $(RCS_FIND_IGNORE) \
\( -name '*.[oas]' -o -name '*.ko' -o -name '.*.cmd' \
-o -name '*.ko.*' -o -name '*.su' -o -name '*.cfgtmp' \
-o -name '*.ko.*' -o -name '*.su' \
-o -name '.*.d' -o -name '.*.tmp' -o -name '*.mod.c' \
-o -name '*.lex.c' -o -name '*.tab.[ch]' \
-o -name '*.symtypes' -o -name 'modules.order' \
-o -name modules.builtin -o -name '.tmp_*.o.*' \
-o -name 'dsdt.aml' -o -name 'dsdt.asl.tmp' -o -name 'dsdt.c' \
-o -name '*.gcno' \) -type f -print | xargs rm -f
-o -name '*.efi' -o -name '*.gcno' -o -name '*.so' \) \
-type f -print | xargs rm -f
# mrproper - Delete all generated files, including .config
#
@@ -1560,6 +1698,10 @@ help:
@echo 'Configuration targets:'
@$(MAKE) -f $(srctree)/scripts/kconfig/Makefile help
@echo ''
@echo 'Test targets:'
@echo ''
@echo ' check - Run all automated tests that use sandbox'
@echo ''
@echo 'Other generic targets:'
@echo ' all - Build all necessary images depending on configuration'
@echo ' tests - Build U-Boot for sandbox and run tests'
@@ -1581,7 +1723,7 @@ help:
@echo ' coccicheck - Execute static code analysis with Coccinelle'
@echo ''
@echo 'Documentation targets:'
@$(MAKE) -f $(srctree)/doc/DocBook/Makefile dochelp
@$(MAKE) -f $(srctree)/Documentation/Makefile dochelp
@echo ''
@echo ' make V=0|1 [targets] 0 => quiet build (default), 1 => verbose build'
@echo ' make V=2 [targets] 2 => give reason for rebuild of target'
@@ -1598,14 +1740,16 @@ help:
@echo 'Execute "make" or "make all" to build all targets marked with [*] '
@echo 'For further info see the ./README file'
tests:
tests check:
$(srctree)/test/run
# Documentation targets
# ---------------------------------------------------------------------------
%docs: scripts_basic FORCE
$(Q)$(MAKE) $(build)=scripts build_docproc
$(Q)$(MAKE) $(build)=doc/DocBook $@
DOC_TARGETS := xmldocs latexdocs pdfdocs htmldocs epubdocs cleandocs \
linkcheckdocs dochelp refcheckdocs
PHONY += $(DOC_TARGETS)
$(DOC_TARGETS): scripts_basic FORCE
$(Q)$(MAKE) $(build)=Documentation $@
endif #ifeq ($(config-targets),1)
endif #ifeq ($(mixed-targets),1)

260
README
View File

@@ -1,9 +1,7 @@
# SPDX-License-Identifier: GPL-2.0+
#
# (C) Copyright 2000 - 2013
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# SPDX-License-Identifier: GPL-2.0+
#
Summary:
========
@@ -143,6 +141,7 @@ Directory Hierarchy:
/nios2 Files generic to Altera NIOS2 architecture
/openrisc Files generic to OpenRISC architecture
/powerpc Files generic to PowerPC architecture
/riscv Files generic to RISC-V architecture
/sandbox Files generic to HW-independent "sandbox"
/sh Files generic to SH architecture
/x86 Files generic to x86 architecture
@@ -332,11 +331,6 @@ The following options need to be configured:
- Board Type: Define exactly one, e.g. CONFIG_MPC8540ADS.
- Marvell Family Member
CONFIG_SYS_MVFS - define it if you want to enable
multiple fs option at one time
for marvell soc family
- 85xx CPU Options:
CONFIG_SYS_PPC64
@@ -534,25 +528,6 @@ The following options need to be configured:
pointer. This is needed for the temporary stack before
relocation.
CONFIG_SYS_MIPS_CACHE_MODE
Cache operation mode for the MIPS CPU.
See also arch/mips/include/asm/mipsregs.h.
Possible values are:
CONF_CM_CACHABLE_NO_WA
CONF_CM_CACHABLE_WA
CONF_CM_UNCACHED
CONF_CM_CACHABLE_NONCOHERENT
CONF_CM_CACHABLE_CE
CONF_CM_CACHABLE_COW
CONF_CM_CACHABLE_CUW
CONF_CM_CACHABLE_ACCELERATED
CONFIG_SYS_XWAY_EBU_BOOTCFG
Special option for Lantiq XWAY SoCs for booting from NOR flash.
See also arch/mips/cpu/mips32/start.S.
CONFIG_XWAY_SWAP_BYTES
Enable compilation of tools/xway-swap-bytes needed for Lantiq
@@ -712,22 +687,6 @@ The following options need to be configured:
as a convenience, when switching between booting from
RAM and NFS.
- Bootcount:
CONFIG_BOOTCOUNT_LIMIT
Implements a mechanism for detecting a repeating reboot
cycle, see:
http://www.denx.de/wiki/view/DULG/UBootBootCountLimit
CONFIG_BOOTCOUNT_ENV
If no softreset save registers are found on the hardware
"bootcount" is stored in the environment. To prevent a
saveenv on all reboots, the environment variable
"upgrade_available" is used. If "upgrade_available" is
0, "bootcount" is always 0, if "upgrade_available" is
1 "bootcount" is incremented in the environment.
So the Userspace Applikation must set the "upgrade_available"
and "bootcount" variable to 0, if a boot was successfully.
- Pre-Boot Commands:
CONFIG_PREBOOT
@@ -827,14 +786,6 @@ The following options need to be configured:
CONFIG_AT91_HW_WDT_TIMEOUT
specify the timeout in seconds. default 2 seconds.
- U-Boot Version:
CONFIG_VERSION_VARIABLE
If this variable is defined, an environment variable
named "ver" is created by U-Boot showing the U-Boot
version as printed by the "version" command.
Any change to this variable will be reverted at the
next reset.
- Real-Time Clock:
When CONFIG_CMD_DATE is selected, the type of the RTC
@@ -904,9 +855,6 @@ The following options need to be configured:
CONFIG_EFI_PARTITION GPT partition table, common when EFI is the
bootloader. Note 2TB partition limit; see
disk/part_efi.c
CONFIG_MTD_PARTITIONS Memory Technology Device partition table.
If IDE or SCSI support is enabled (CONFIG_IDE or
CONFIG_SCSI) you must configure support for at
least one non-MTD partition type as well.
@@ -1010,9 +958,6 @@ The following options need to be configured:
Define this to use i/o functions instead of macros
(some hardware wont work with macros)
CONFIG_DRIVER_TI_EMAC
Support for davinci emac
CONFIG_SYS_DAVINCI_EMAC_PHY_COUNT
Define this if you have more then 3 PHYs.
@@ -1197,12 +1142,8 @@ The following options need to be configured:
CONFIG_SUPPORT_EMMC_BOOT
Enable some additional features of the eMMC boot partitions.
CONFIG_SUPPORT_EMMC_RPMB
Enable the commands for reading, writing and programming the
key for the Replay Protection Memory Block partition in eMMC.
- USB Device Firmware Update (DFU) class support:
CONFIG_USB_FUNCTION_DFU
CONFIG_DFU_OVER_USB
This enables the USB portion of the DFU USB class
CONFIG_DFU_MMC
@@ -1435,10 +1376,6 @@ The following options need to be configured:
be at least 4MB.
- MII/PHY support:
CONFIG_PHY_ADDR
The address of PHY on MII bus.
CONFIG_PHY_CLOCK_FREQ (ppc4xx)
The clock frequency of the MII bus
@@ -1542,14 +1479,8 @@ The following options need to be configured:
You can fine tune the DHCP functionality by defining
CONFIG_BOOTP_* symbols:
CONFIG_BOOTP_SUBNETMASK
CONFIG_BOOTP_GATEWAY
CONFIG_BOOTP_HOSTNAME
CONFIG_BOOTP_NISDOMAIN
CONFIG_BOOTP_BOOTPATH
CONFIG_BOOTP_BOOTFILESIZE
CONFIG_BOOTP_DNS
CONFIG_BOOTP_DNS2
CONFIG_BOOTP_SEND_HOSTNAME
CONFIG_BOOTP_NTPSERVER
CONFIG_BOOTP_TIMEOFFSET
@@ -1565,15 +1496,6 @@ The following options need to be configured:
to Link-local IP address configuration if the DHCP server
is not available.
CONFIG_BOOTP_DNS2 - If a DHCP client requests the DNS
serverip from a DHCP server, it is possible that more
than one DNS serverip is offered to the client.
If CONFIG_BOOTP_DNS2 is enabled, the secondary DNS
serverip will be stored in the additional environment
variable "dnsip2". The first DNS serverip is always
stored in the variable "dnsip", when CONFIG_BOOTP_DNS
is defined.
CONFIG_BOOTP_SEND_HOSTNAME - Some DHCP servers are capable
to do a dynamic update of a DNS server. To do this, they
need the hostname of the DHCP requester.
@@ -2000,11 +1922,6 @@ The following options need to be configured:
SPI EEPROM, also an instance works with Crystal A/D and
D/As on the SACSng board)
CONFIG_SH_SPI
Enables the driver for SPI controller on SuperH. Currently
only SH7757 is supported.
CONFIG_SOFT_SPI
Enables a software (bit-bang) SPI driver rather than
@@ -2023,11 +1940,6 @@ The following options need to be configured:
Currently supported on some MPC8xxx processors. For an
example, see include/configs/mpc8349emds.h.
CONFIG_MXC_SPI
Enables the driver for the SPI controllers on i.MX and MXC
SoCs. Currently i.MX31/35/51 are supported.
CONFIG_SYS_SPI_MXC_WAIT
Timeout for waiting until spi transfer completed.
default: (CONFIG_SYS_HZ/100) /* 10 ms */
@@ -2196,10 +2108,6 @@ The following options need to be configured:
#define CONFIG_NFS_TIMEOUT 10000UL
- Command Interpreter:
CONFIG_AUTO_COMPLETE
Enable auto completion of commands using TAB.
CONFIG_SYS_PROMPT_HUSH_PS2
This defines the secondary prompt string, which is
@@ -2228,12 +2136,6 @@ The following options need to be configured:
symbols.
- Command Line Editing and History:
CONFIG_CMDLINE_EDITING
Enable editing and History functions for interactive
command line input operations
- Command Line PS1/PS2 support:
CONFIG_CMDLINE_PS_SUPPORT
Enable support for changing the command prompt string
@@ -2267,26 +2169,6 @@ The following options need to be configured:
the environment like the "source" command or the
boot command first.
CONFIG_ENV_VARS_UBOOT_CONFIG
Define this in order to add variables describing the
U-Boot build configuration to the default environment.
These will be named arch, cpu, board, vendor, and soc.
Enabling this option will cause the following to be defined:
- CONFIG_SYS_ARCH
- CONFIG_SYS_CPU
- CONFIG_SYS_BOARD
- CONFIG_SYS_VENDOR
- CONFIG_SYS_SOC
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
Define this in order to add variables describing certain
run-time determined information about the hardware to the
environment. These will be named board_name, board_rev.
CONFIG_DELAY_ENVIRONMENT
Normally the environment is loaded when the board is
@@ -2310,18 +2192,6 @@ The following options need to be configured:
CONFIG_SF_DEFAULT_MODE (see include/spi.h)
CONFIG_SF_DEFAULT_SPEED in Hz
CONFIG_SYSTEMACE
Adding this option adds support for Xilinx SystemACE
chips attached via some sort of local bus. The address
of the chip must also be defined in the
CONFIG_SYS_SYSTEMACE_BASE macro. For example:
#define CONFIG_SYSTEMACE
#define CONFIG_SYS_SYSTEMACE_BASE 0xf0000000
When SystemACE support is added, the "ace" device type
becomes available to the fat commands, i.e. fatls.
- TFTP Fixed UDP Port:
CONFIG_TFTP_PORT
@@ -2343,32 +2213,6 @@ The following options need to be configured:
A better solution is to properly configure the firewall,
but sometimes that is not allowed.
- bootcount support:
CONFIG_BOOTCOUNT_LIMIT
This enables the bootcounter support, see:
http://www.denx.de/wiki/DULG/UBootBootCountLimit
CONFIG_AT91SAM9XE
enable special bootcounter support on at91sam9xe based boards.
CONFIG_SOC_DA8XX
enable special bootcounter support on da850 based boards.
CONFIG_BOOTCOUNT_RAM
enable support for the bootcounter in RAM
CONFIG_BOOTCOUNT_I2C
enable support for the bootcounter on an i2c (like RTC) device.
CONFIG_SYS_I2C_RTC_ADDR = i2c chip address
CONFIG_SYS_BOOTCOUNT_ADDR = i2c addr which is used for
the bootcounter.
CONFIG_BOOTCOUNT_ALEN = address len
CONFIG_BOOTCOUNT_EXT
enable support for the bootcounter in EXT filesystem
CONFIG_SYS_BOOTCOUNT_ADDR = RAM address used for read
and write.
CONFIG_SYS_BOOTCOUNT_EXT_INTERFACE = interface
CONFIG_SYS_BOOTCOUNT_EXT_DEVPART = device and part
CONFIG_SYS_BOOTCOUNT_EXT_NAME = filename
- Show boot progress:
CONFIG_SHOW_BOOT_PROGRESS
@@ -2533,19 +2377,6 @@ FIT uImage format:
-150 common/cmd_nand.c Incorrect FIT image format
151 common/cmd_nand.c FIT image format OK
- legacy image format:
CONFIG_IMAGE_FORMAT_LEGACY
enables the legacy image format support in U-Boot.
Default:
enabled if CONFIG_FIT_SIGNATURE is not defined.
CONFIG_DISABLE_IMAGE_LEGACY
disable the legacy image format
This define is introduced, as the legacy image format is
enabled per default for backward compatibility.
- Standalone program support:
CONFIG_STANDALONE_LOAD_ADDR
@@ -2577,23 +2408,6 @@ FIT uImage format:
for a more detailed description refer to doc/README.update.
- MTD Support (mtdparts command, UBI support)
CONFIG_MTD_DEVICE
Adds the MTD device infrastructure from the Linux kernel.
Needed for mtdparts command support.
CONFIG_MTD_PARTITIONS
Adds the MTD partitioning infrastructure from the Linux
kernel. Needed for UBI support.
- UBI support
CONFIG_UBI_SILENCE_MSG
Make the verbose messages from UBI stop printing. This leaves
warnings and errors enabled.
CONFIG_MTD_UBI_WL_THRESHOLD
This parameter defines the maximum difference between the highest
erase counter value and the lowest erase counter value of eraseblocks
@@ -2655,12 +2469,6 @@ FIT uImage format:
Enable UBI fastmap debug
default: 0
- UBIFS support
CONFIG_UBIFS_SILENCE_MSG
Make the verbose messages from UBIFS stop printing. This leaves
warnings and errors enabled.
- SPL framework
CONFIG_SPL
Enable building of SPL globally.
@@ -2725,11 +2533,6 @@ FIT uImage format:
CONFIG_SYS_SPL_MALLOC_SIZE
The size of the malloc pool used in SPL.
CONFIG_SPL_FRAMEWORK
Enable the SPL framework under common/. This framework
supports MMC, NAND and YMODEM loading of U-Boot and NAND
NAND loading of the Linux Kernel.
CONFIG_SPL_OS_BOOT
Enable booting directly to an OS from SPL.
See also: doc/README.falcon
@@ -2786,6 +2589,10 @@ FIT uImage format:
CONFIG_SPL_NAND_DRIVERS
SPL uses normal NAND drivers, not minimal drivers.
CONFIG_SPL_NAND_IDENT
SPL uses the chip ID list to identify the NAND flash.
Requires CONFIG_SPL_NAND_BASE.
CONFIG_SPL_NAND_ECC
Include standard software ECC in the SPL
@@ -2847,7 +2654,7 @@ FIT uImage format:
use an arch-specific makefile fragment instead, for
example if more than one image needs to be produced.
CONFIG_FIT_SPL_PRINT
CONFIG_SPL_FIT_PRINT
Printing information about a FIT image adds quite a bit of
code to SPL. So this is normally disabled in SPL. Use this
option to re-enable it. This will affect the output of the
@@ -2925,9 +2732,6 @@ Configuration Settings:
Begin and End addresses of the area used by the
simple memory test.
- CONFIG_SYS_ALT_MEMTEST:
Enable an alternate, more extensive memory test.
- CONFIG_SYS_MEMTEST_SCRATCH:
Scratch address used by the alternate memory test
You only need to set this if address zero isn't writeable
@@ -3192,11 +2996,6 @@ Configuration Settings:
If defined, don't allow the -f switch to env set override variable
access flags.
- CONFIG_USE_STDINT
If stdint.h is available with your toolchain you can define this
option to enable it. You can provide option 'USE_STDINT=1' when
building U-Boot to enable this.
The following definitions that deal with the placement and management
of environment data (variable area); in general, we support the
following configurations:
@@ -3438,8 +3237,8 @@ Low Level (hardware related) configuration options:
a 16 bit bus.
Not all NAND drivers use this symbol.
Example of drivers that use it:
- drivers/mtd/nand/ndfc.c
- drivers/mtd/nand/mxc_nand.c
- drivers/mtd/nand/raw/ndfc.c
- drivers/mtd/nand/raw/mxc_nand.c
- CONFIG_SYS_NDFC_EBC0_CFG
Sets the EBC0_CFG register for the NDFC. If not defined
@@ -3510,7 +3309,7 @@ Low Level (hardware related) configuration options:
globally (CONFIG_CMD_MEMORY).
- CONFIG_SKIP_LOWLEVEL_INIT
[ARM, NDS32, MIPS only] If this variable is defined, then certain
[ARM, NDS32, MIPS, RISC-V only] If this variable is defined, then certain
low level initializations (like setting up the memory
controller) are omitted and/or U-Boot does not
relocate itself into RAM.
@@ -3553,13 +3352,10 @@ Low Level (hardware related) configuration options:
If defined, the x86 reset vector code is included. This is not
needed when U-Boot is running from Coreboot.
- CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC:
Enables the RTC32K OSC on AM33xx based plattforms
- CONFIG_SYS_NAND_NO_SUBPAGE_WRITE
Option to disable subpage write in NAND driver
driver that uses this:
drivers/mtd/nand/davinci_nand.c
drivers/mtd/nand/raw/davinci_nand.c
Freescale QE/FMAN Firmware Support:
-----------------------------------
@@ -3718,6 +3514,11 @@ this behavior and build U-Boot to some external directory:
Note that the command line "O=" setting overrides the KBUILD_OUTPUT environment
variable.
User specific CPPFLAGS, AFLAGS and CFLAGS can be passed to the compiler by
setting the according environment variables KCPPFLAGS, KAFLAGS and KCFLAGS.
For example to treat all compiler warnings as errors:
make KCFLAGS=-Werror
Please be aware that the Makefiles assume you are using GNU make, so
for instance on NetBSD you might need to use "gmake" instead of
@@ -4115,6 +3916,17 @@ If CONFIG_REGEX is defined, the variable_name above is evaluated as a
regular expression. This allows multiple variables to be connected to
the same callback without explicitly listing them all out.
The signature of the callback functions is:
int callback(const char *name, const char *value, enum env_op op, int flags)
* name - changed environment variable
* value - new value of the environment variable
* op - operation (create, overwrite, or delete)
* flags - attributes of the environment variable change, see flags H_* in
include/search.h
The return value is 0 if the variable change is accepted and 1 otherwise.
Command Line Parsing:
=====================
@@ -4964,6 +4776,22 @@ On NDS32, the following registers are used:
NOTE: DECLARE_GLOBAL_DATA_PTR must be used with file-global scope,
or current versions of GCC may "optimize" the code too much.
On RISC-V, the following registers are used:
x0: hard-wired zero (zero)
x1: return address (ra)
x2: stack pointer (sp)
x3: global pointer (gp)
x4: thread pointer (tp)
x5: link register (t0)
x8: frame pointer (fp)
x10-x11: arguments/return values (a0-1)
x12-x17: arguments (a2-7)
x28-31: temporaries (t3-6)
pc: program counter (pc)
==> U-Boot will use gp to hold a pointer to the global data
Memory Management:
------------------

View File

@@ -1,8 +1,6 @@
# SPDX-License-Identifier: GPL-2.0+
#
# (C) Copyright 2007 Semihalf
#
# SPDX-License-Identifier: GPL-2.0+
#
obj-y += api.o api_display.o api_net.o api_storage.o
obj-$(CONFIG_ARM) += api_platform-arm.o

View File

@@ -1,9 +1,8 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* (C) Copyright 2007 Semihalf
*
* Written by: Rafal Jaworowski <raj@semihalf.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <config.h>

View File

@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (c) 2011 The Chromium OS Authors.
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>

View File

@@ -1,9 +1,8 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* (C) Copyright 2007 Semihalf
*
* Written by: Rafal Jaworowski <raj@semihalf.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <config.h>
@@ -12,8 +11,6 @@
#include <linux/types.h>
#include <api_public.h>
DECLARE_GLOBAL_DATA_PTR;
#define DEBUG
#undef DEBUG

View File

@@ -1,10 +1,9 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* (C) Copyright 2007 Semihalf
*
* Written by: Rafal Jaworowski <raj@semihalf.com>
*
* SPDX-License-Identifier: GPL-2.0+
*
* This file contains routines that fetch data from ARM-dependent sources
* (bd_info etc.)
*/

View File

@@ -1,8 +1,7 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* (C) Copyright 2007 Stanislav Galabov <sgalabov@gmail.com>
*
* SPDX-License-Identifier: GPL-2.0+
*
* This file contains routines that fetch data from bd_info sources
*/

View File

@@ -1,10 +1,9 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* (C) Copyright 2007 Semihalf
*
* Written by: Rafal Jaworowski <raj@semihalf.com>
*
* SPDX-License-Identifier: GPL-2.0+
*
* This file contains routines that fetch data from PowerPC-dependent sources
* (bd_info etc.)
*/
@@ -30,7 +29,7 @@ int platform_sys_info(struct sys_info *si)
si->clk_bus = gd->bus_clk;
si->clk_cpu = gd->cpu_clk;
#if defined(CONFIG_8xx) || defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
#if defined(CONFIG_MPC8xx) || defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
#define bi_bar bi_immr_base
#elif defined(CONFIG_MPC83xx)
#define bi_bar bi_immrbar

View File

@@ -1,9 +1,8 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* (C) Copyright 2007 Semihalf
*
* Written by: Rafal Jaworowski <raj@semihalf.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef _API_PRIVATE_H_

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@@ -1,9 +1,8 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* (C) Copyright 2007-2008 Semihalf
*
* Written by: Rafal Jaworowski <raj@semihalf.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <config.h>

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@@ -10,12 +10,12 @@ choice
config ARC
bool "ARC architecture"
select ARCH_EARLY_INIT_R
select ARC_TIMER
select CLK
select HAVE_PRIVATE_LIBGCC
select SUPPORT_OF_CONTROL
select ARCH_EARLY_INIT_R
select CLK
select TIMER
select ARC_TIMER
config ARM
bool "ARM architecture"
@@ -26,6 +26,8 @@ config ARM
config M68K
bool "M68000 architecture"
select HAVE_PRIVATE_LIBGCC
select SYS_BOOT_GET_CMDLINE
select SYS_BOOT_GET_KBD
config MICROBLAZE
bool "MicroBlaze architecture"
@@ -44,41 +46,70 @@ config NDS32
config NIOS2
bool "Nios II architecture"
select SUPPORT_OF_CONTROL
select OF_CONTROL
select DM
select CPU
select DM
select OF_CONTROL
select SUPPORT_OF_CONTROL
imply CMD_DM
config PPC
bool "PowerPC architecture"
select HAVE_PRIVATE_LIBGCC
select SUPPORT_OF_CONTROL
select SYS_BOOT_GET_CMDLINE
select SYS_BOOT_GET_KBD
config RISCV
bool "RISC-V architecture"
select SUPPORT_OF_CONTROL
select OF_CONTROL
select DM
imply DM_SERIAL
imply DM_ETH
imply DM_MMC
imply DM_SPI
imply DM_SPI_FLASH
imply BLK
imply CLK
imply MTD
imply TIMER
imply CMD_DM
config SANDBOX
bool "Sandbox"
select BOARD_LATE_INIT
select SUPPORT_OF_CONTROL
select DM
select DM_KEYBOARD
select DM_SPI_FLASH
select DM_SERIAL
select DM_I2C
select DM_SPI
select DM_GPIO
select DM_I2C
select DM_KEYBOARD
select DM_MMC
select DM_SERIAL
select DM_SPI
select DM_SPI_FLASH
select HAVE_BLOCK_DEVICE
select LZO
select SPI
select SUPPORT_OF_CONTROL
imply BITREVERSE
imply CMD_DM
imply CMD_GETTIME
imply CMD_HASH
imply CMD_IO
imply CMD_IOTRACE
imply CMD_LZMADEC
imply CMD_SATA
imply CMD_SF_TEST
imply CRC32_VERIFY
imply FAT_WRITE
imply FIRMWARE
imply HASH_VERIFY
imply LZMA
imply SCSI
imply CMD_SATA
imply CMD_SF_TEST
imply TEE
imply AVB_VERIFY
imply LIBAVB
imply CMD_AVB
imply UDP_FUNCTION_FASTBOOT
config SH
bool "SuperH architecture"
@@ -87,27 +118,17 @@ config SH
config X86
bool "x86 architecture"
select CREATE_ARCH_SYMLINK
select HAVE_PRIVATE_LIBGCC
select USE_PRIVATE_LIBGCC
select SUPPORT_OF_CONTROL
select OF_CONTROL
select DM
select DM_PCI
select HAVE_PRIVATE_LIBGCC
select OF_CONTROL
select PCI
select SUPPORT_OF_CONTROL
select TIMER
select USE_PRIVATE_LIBGCC
select X86_TSC_TIMER
imply BLK
imply DM_ETH
imply DM_GPIO
imply DM_KEYBOARD
imply DM_MMC
imply DM_RTC
imply DM_SERIAL
imply DM_SCSI
imply DM_SPI
imply DM_SPI_FLASH
imply DM_USB
imply DM_VIDEO
imply CMD_DM
imply CMD_FPGA_LOADMK
imply CMD_GETTIME
imply CMD_IO
@@ -115,9 +136,22 @@ config X86
imply CMD_PCI
imply CMD_SF_TEST
imply CMD_ZBOOT
imply USB_HOST_ETHER
imply DM_ETH
imply DM_GPIO
imply DM_KEYBOARD
imply DM_MMC
imply DM_RTC
imply DM_SCSI
imply DM_SERIAL
imply DM_SPI
imply DM_SPI_FLASH
imply DM_USB
imply DM_VIDEO
imply SYSRESET
imply SYSRESET_X86
imply USB_ETHER_ASIX
imply USB_ETHER_SMSC95XX
imply USB_HOST_ETHER
config XTENSA
bool "Xtensa architecture"
@@ -194,3 +228,4 @@ source "arch/sandbox/Kconfig"
source "arch/sh/Kconfig"
source "arch/x86/Kconfig"
source "arch/xtensa/Kconfig"
source "arch/riscv/Kconfig"

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@@ -31,36 +31,36 @@ choice
config CPU_ARC750D
bool "ARC 750D"
select ARC_MMU_V2
depends on ISA_ARCOMPACT
select ARC_MMU_V2
help
Choose this option to build an U-Boot for ARC750D CPU.
config CPU_ARC770D
bool "ARC 770D"
select ARC_MMU_V3
depends on ISA_ARCOMPACT
select ARC_MMU_V3
help
Choose this option to build an U-Boot for ARC770D CPU.
config CPU_ARCEM6
bool "ARC EM6"
select ARC_MMU_ABSENT
depends on ISA_ARCV2
select ARC_MMU_ABSENT
help
Next Generation ARC Core based on ISA-v2 ISA without MMU.
config CPU_ARCHS36
bool "ARC HS36"
select ARC_MMU_ABSENT
depends on ISA_ARCV2
select ARC_MMU_ABSENT
help
Next Generation ARC Core based on ISA-v2 ISA without MMU.
config CPU_ARCHS38
bool "ARC HS38"
select ARC_MMU_V4
depends on ISA_ARCV2
select ARC_MMU_V4
help
Next Generation ARC Core based on ISA-v2 ISA with MMU.
@@ -116,6 +116,24 @@ config SYS_DCACHE_OFF
bool "Do not use Data Cache"
default n
menuconfig ARC_DBG
bool "ARC debugging"
default n
if ARC_DBG
config ARC_DBG_IOC_ENABLE
bool "Enable IO coherency unit"
depends on CPU_ARCHS38
default n
help
Enable IO coherency unit to debug problems with caches and
DMA peripherals.
NOTE: as of today linux will not work properly if this option
is enabled in u-boot!
endif
choice
prompt "Target select"
default TARGET_AXS103
@@ -132,14 +150,24 @@ config TARGET_AXS101
config TARGET_AXS103
bool "Support Synopsys Designware SDP board AXS103"
config TARGET_EMDK
bool "Synopsys EM Development kit"
select CPU_ARCEM6
config TARGET_HSDK
bool "Support Synpsys HS DevelopmentKit board"
config TARGET_IOT_DEVKIT
bool "Synopsys Brite IoT Development kit"
select CPU_ARCEM6
endchoice
source "board/abilis/tb100/Kconfig"
source "board/synopsys/Kconfig"
source "board/synopsys/axs10x/Kconfig"
source "board/synopsys/emdk/Kconfig"
source "board/synopsys/hsdk/Kconfig"
source "board/synopsys/iot_devkit/Kconfig"
endmenu

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@@ -1,6 +1,4 @@
#
# SPDX-License-Identifier: GPL-2.0+
#
# SPDX-License-Identifier: GPL-2.0+
libs-y += arch/arc/cpu/$(CPU)/
libs-y += arch/arc/lib/

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@@ -1,8 +1,6 @@
# SPDX-License-Identifier: GPL-2.0+
#
# Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
#
# SPDX-License-Identifier: GPL-2.0+
#
ifndef CONFIG_CPU_BIG_ENDIAN
CONFIG_SYS_LITTLE_ENDIAN = 1
@@ -11,21 +9,15 @@ CONFIG_SYS_BIG_ENDIAN = 1
endif
ifdef CONFIG_SYS_LITTLE_ENDIAN
ARC_CROSS_COMPILE := arc-linux-
PLATFORM_LDFLAGS += -EL
PLATFORM_CPPFLAGS += -mlittle-endian
endif
ifdef CONFIG_SYS_BIG_ENDIAN
ARC_CROSS_COMPILE := arceb-linux-
PLATFORM_LDFLAGS += -EB
PLATFORM_CPPFLAGS += -mbig-endian
endif
ifeq ($(CROSS_COMPILE),)
CROSS_COMPILE := $(ARC_CROSS_COMPILE)
endif
ifdef CONFIG_ARC_MMU_VER
CONFIG_MMU = 1
endif
@@ -50,10 +42,11 @@ ifdef CONFIG_CPU_ARCHS38
PLATFORM_CPPFLAGS += -mcpu=archs
endif
PLATFORM_CPPFLAGS += -ffixed-r25 -D__ARC__ -gdwarf-2
PLATFORM_CPPFLAGS += -ffixed-r25 -D__ARC__ -gdwarf-2 -mno-sdata
PLATFORM_RELFLAGS += -ffunction-sections -fdata-sections -fno-common
# Needed for relocation
LDFLAGS_FINAL += -pie
LDFLAGS_FINAL += -pie --gc-sections
# Load address for standalone apps
CONFIG_STANDALONE_LOAD_ADDR ?= 0x82000000

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@@ -1,7 +1,5 @@
# SPDX-License-Identifier: GPL-2.0+
#
# Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
#
# SPDX-License-Identifier: GPL-2.0+
#
obj-y += ivt.o

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@@ -1,7 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
.section .ivt, "ax",@progbits

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@@ -1,7 +1,5 @@
# SPDX-License-Identifier: GPL-2.0+
#
# Copyright (C) 2013-2015 Synopsys, Inc. All rights reserved.
#
# SPDX-License-Identifier: GPL-2.0+
#
obj-y += ivt.o

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@@ -1,7 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2013-2015 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
.section .ivt, "a",@progbits

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@@ -1,18 +1,26 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <config.h>
OUTPUT_FORMAT("elf32-littlearc", "elf32-littlearc", "elf32-littlearc")
OUTPUT_FORMAT("elf32-littlearc", "elf32-bigarc", "elf32-littlearc")
OUTPUT_ARCH(arc)
ENTRY(_start)
SECTIONS
{
. = CONFIG_SYS_TEXT_BASE;
__image_copy_start = .;
. = ALIGN(1024);
__ivt_start = .;
.ivt :
{
KEEP(*(.ivt))
}
__ivt_end = .;
. = ALIGN(1024);
__text_start = .;
.text : {
arch/arc/lib/start.o (.text*)
@@ -20,14 +28,6 @@ SECTIONS
}
__text_end = .;
. = ALIGN(1024);
__ivt_start = .;
.ivt :
{
*(.ivt)
}
__ivt_end = .;
. = ALIGN(4);
.rodata : {
*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))

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@@ -1 +0,0 @@
*.dtb

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@@ -1,12 +1,12 @@
#
# SPDX-License-Identifier: GPL-2.0+
#
# SPDX-License-Identifier: GPL-2.0+
dtb-$(CONFIG_TARGET_AXS101) += axs101.dtb
dtb-$(CONFIG_TARGET_AXS103) += axs103.dtb
dtb-$(CONFIG_TARGET_NSIM) += nsim.dtb
dtb-$(CONFIG_TARGET_TB100) += abilis_tb100.dtb
dtb-$(CONFIG_TARGET_EMDK) += emdk.dtb
dtb-$(CONFIG_TARGET_HSDK) += hsdk.dtb
dtb-$(CONFIG_TARGET_IOT_DEVKIT) += iot_devkit.dtb
targets += $(dtb-y)

View File

@@ -1,13 +1,14 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2015 Synopsys, Inc. (www.synopsys.com)
*
* SPDX-License-Identifier: GPL-2.0+
*/
/dts-v1/;
#include "skeleton.dtsi"
/ {
model = "abilis,tb100";
aliases {
console = &uart0;
};

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@@ -1,7 +1,6 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2017 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
/include/ "skeleton.dtsi"

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@@ -1,7 +1,6 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2017 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
/include/ "skeleton.dtsi"

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@@ -1,7 +1,6 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2017 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
/dts-v1/;
@@ -10,6 +9,8 @@
/ {
model = "snps,axs101";
chosen {
stdout-path = &uart0;
};

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@@ -1,7 +1,6 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2017 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
/dts-v1/;
@@ -10,6 +9,8 @@
/ {
model = "snps,axs103";
chosen {
stdout-path = &uart0;
};

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@@ -1,10 +1,13 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2017 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
/ {
aliases {
spi0 = &spi0;
};
axs10x_mb@e0000000 {
compatible = "simple-bus";
#address-cells = <1>;
@@ -31,11 +34,8 @@
};
ethernet@18000 {
#interrupt-cells = <1>;
compatible = "altr,socfpga-stmmac";
reg = < 0x18000 0x2000 >;
interrupts = < 25 >;
interrupt-names = "macirq";
phy-mode = "gmii";
snps,pbl = < 32 >;
clocks = <&apbclk>;
@@ -46,13 +46,11 @@
ehci@0x40000 {
compatible = "generic-ehci";
reg = < 0x40000 0x100 >;
interrupts = < 8 >;
};
ohci@0x60000 {
compatible = "generic-ohci";
reg = < 0x60000 0x100 >;
interrupts = < 8 >;
};
uart0: serial0@22000 {
@@ -62,5 +60,35 @@
reg-shift = <2>;
reg-io-width = <4>;
};
spi0: spi@0 {
compatible = "snps,dw-apb-ssi";
reg = <0x0 0x100>;
#address-cells = <1>;
#size-cells = <0>;
spi-max-frequency = <4000000>;
clocks = <&apbclk>;
clock-names = "spi_clk";
cs-gpio = <&cs_gpio 0>;
spi_flash@0 {
compatible = "spi-flash";
reg = <0>;
spi-max-frequency = <4000000>;
};
};
cs_gpio: gpio@11218 {
compatible = "snps,creg-gpio";
reg = <0x11218 0x4>;
gpio-controller;
#gpio-cells = <1>;
gpio-bank-name = "axs-spi-cs";
gpio-count = <1>;
gpio-first-shift = <0>;
gpio-bit-per-line = <2>;
gpio-activate-val = <1>;
gpio-deactivate-val = <3>;
gpio-default-val = <1>;
};
};
};

35
arch/arc/dts/emdk.dts Normal file
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@@ -0,0 +1,35 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2018 Synopsys, Inc. All rights reserved.
*/
/dts-v1/;
#include "skeleton.dtsi"
/ {
model = "snps,emdk";
#address-cells = <1>;
#size-cells = <1>;
aliases {
console = &uart0;
};
cpu_card {
core_clk: core_clk {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <40000000>;
u-boot,dm-pre-reloc;
};
};
uart0: serial0@f0004000 {
compatible = "snps,dw-apb-uart";
clock-frequency = <100000000>;
reg = <0xf0004000 0x1000>;
reg-shift = <2>;
reg-io-width = <4>;
};
};

View File

@@ -1,29 +1,67 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2017 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
/dts-v1/;
#include "skeleton.dtsi"
#include "dt-bindings/clock/snps,hsdk-cgu.h"
/ {
model = "snps,hsdk";
#address-cells = <1>;
#size-cells = <1>;
aliases {
console = &uart0;
spi0 = &spi0;
};
cpu_card {
core_clk: core_clk {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <1000000000>;
clock-frequency = <500000000>;
u-boot,dm-pre-reloc;
};
};
clk-fmeas {
clocks = <&cgu_clk CLK_ARC_PLL>, <&cgu_clk CLK_SYS_PLL>,
<&cgu_clk CLK_TUN_PLL>, <&cgu_clk CLK_DDR_PLL>,
<&cgu_clk CLK_ARC>, <&cgu_clk CLK_HDMI_PLL>,
<&cgu_clk CLK_TUN_TUN>, <&cgu_clk CLK_HDMI>,
<&cgu_clk CLK_SYS_APB>, <&cgu_clk CLK_SYS_AXI>,
<&cgu_clk CLK_SYS_ETH>, <&cgu_clk CLK_SYS_USB>,
<&cgu_clk CLK_SYS_SDIO>, <&cgu_clk CLK_SYS_HDMI>,
<&cgu_clk CLK_SYS_GFX_CORE>, <&cgu_clk CLK_SYS_GFX_DMA>,
<&cgu_clk CLK_SYS_GFX_CFG>, <&cgu_clk CLK_SYS_DMAC_CORE>,
<&cgu_clk CLK_SYS_DMAC_CFG>, <&cgu_clk CLK_SYS_SDIO_REF>,
<&cgu_clk CLK_SYS_SPI_REF>, <&cgu_clk CLK_SYS_I2C_REF>,
<&cgu_clk CLK_SYS_UART_REF>, <&cgu_clk CLK_SYS_EBI_REF>,
<&cgu_clk CLK_TUN_ROM>, <&cgu_clk CLK_TUN_PWM>;
clock-names = "cpu-pll", "sys-pll",
"tun-pll", "ddr-clk",
"cpu-clk", "hdmi-pll",
"tun-clk", "hdmi-clk",
"apb-clk", "axi-clk",
"eth-clk", "usb-clk",
"sdio-clk", "hdmi-sys-clk",
"gfx-core-clk", "gfx-dma-clk",
"gfx-cfg-clk", "dmac-core-clk",
"dmac-cfg-clk", "sdio-ref-clk",
"spi-clk", "i2c-clk",
"uart-clk", "ebi-clk",
"rom-clk", "pwm-clk";
};
cgu_clk: cgu-clk@f0000000 {
compatible = "snps,hsdk-cgu-clock";
reg = <0xf0000000 0x10>, <0xf00014B8 0x4>;
#clock-cells = <1>;
};
uart0: serial0@f0005000 {
compatible = "snps,dw-apb-uart";
reg = <0xf0005000 0x1000>;
@@ -47,4 +85,34 @@
compatible = "generic-ohci";
reg = <0xf0060000 0x100>;
};
spi0: spi@f0020000 {
compatible = "snps,dw-apb-ssi";
reg = <0xf0020000 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
spi-max-frequency = <4000000>;
clocks = <&cgu_clk CLK_SYS_SPI_REF>;
clock-names = "spi_clk";
cs-gpio = <&cs_gpio 0>;
spi_flash@0 {
compatible = "spi-flash";
reg = <0>;
spi-max-frequency = <4000000>;
};
};
cs_gpio: gpio@f00014b0 {
compatible = "snps,creg-gpio";
reg = <0xf00014b0 0x4>;
gpio-controller;
#gpio-cells = <1>;
gpio-bank-name = "hsdk-spi-cs";
gpio-count = <1>;
gpio-first-shift = <0>;
gpio-bit-per-line = <2>;
gpio-activate-val = <2>;
gpio-deactivate-val = <3>;
gpio-default-val = <1>;
};
};

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@@ -0,0 +1,45 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2018 Synopsys, Inc. All rights reserved.
*/
/dts-v1/;
#include "skeleton.dtsi"
/ {
#address-cells = <1>;
#size-cells = <1>;
aliases {
console = &uart0;
};
cpu_card {
core_clk: core_clk {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <144000000>;
u-boot,dm-pre-reloc;
};
};
uart0: serial0@80014000 {
compatible = "snps,dw-apb-uart";
clock-frequency = <16000000>;
reg = <0x80014000 0x1000>;
reg-shift = <2>;
reg-io-width = <4>;
};
usb: usb@f0040000 {
compatible = "snps,dwc2";
reg = <0xf0040000 0x10000>;
phys = <&usbphy>;
phy-names = "usb2-phy";
};
usbphy: phy {
compatible = "nop-phy";
#phy-cells = <0>;
};
};

View File

@@ -1,13 +1,14 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2015-2016 Synopsys, Inc. (www.synopsys.com)
*
* SPDX-License-Identifier: GPL-2.0+
*/
/dts-v1/;
#include "skeleton.dtsi"
/ {
model = "snps,nsim";
aliases {
console = &arcuart0;
};

View File

@@ -0,0 +1,77 @@
/*
* ARC Build Configuration Registers, with encoded hardware config
*
* Copyright (C) 2018 Synopsys
* Author: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
#ifndef __ARC_BCR_H
#define __ARC_BCR_H
#ifndef __ASSEMBLY__
#include <config.h>
union bcr_di_cache {
struct {
#ifdef CONFIG_CPU_BIG_ENDIAN
unsigned int pad:12, line_len:4, sz:4, config:4, ver:8;
#else
unsigned int ver:8, config:4, sz:4, line_len:4, pad:12;
#endif
} fields;
unsigned int word;
};
union bcr_slc_cfg {
struct {
#ifdef CONFIG_CPU_BIG_ENDIAN
unsigned int pad:24, way:2, lsz:2, sz:4;
#else
unsigned int sz:4, lsz:2, way:2, pad:24;
#endif
} fields;
unsigned int word;
};
union bcr_generic {
struct {
#ifdef CONFIG_CPU_BIG_ENDIAN
unsigned int pad:24, ver:8;
#else
unsigned int ver:8, pad:24;
#endif
} fields;
unsigned int word;
};
union bcr_clust_cfg {
struct {
#ifdef CONFIG_CPU_BIG_ENDIAN
unsigned int pad:7, c:1, num_entries:8, num_cores:8, ver:8;
#else
unsigned int ver:8, num_cores:8, num_entries:8, c:1, pad:7;
#endif
} fields;
unsigned int word;
};
union bcr_mmu_4 {
struct {
#ifdef CONFIG_CPU_BIG_ENDIAN
unsigned int ver:8, sasid:1, sz1:4, sz0:4, res:2, pae:1,
n_ways:2, n_entry:2, n_super:2, u_itlb:3, u_dtlb:3;
#else
/* DTLB ITLB JES JE JA */
unsigned int u_dtlb:3, u_itlb:3, n_super:2, n_entry:2, n_ways:2,
pae:1, res:2, sz0:4, sz1:4, sasid:1, ver:8;
#endif
} fields;
unsigned int word;
};
#endif /* __ASSEMBLY__ */
#endif /* __ARC_BCR_H */

View File

@@ -1,13 +1,13 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef _ASM_ARC_ARCREGS_H
#define _ASM_ARC_ARCREGS_H
#include <asm/cache.h>
#include <config.h>
/*
* ARC architecture has additional address space - auxiliary registers.
@@ -19,6 +19,9 @@
#define ARC_AUX_IDENTITY 0x04
#define ARC_AUX_STATUS32 0x0a
/* STATUS32 Bits Positions */
#define STATUS_AD_BIT 19 /* Enable unaligned access */
/* Instruction cache related auxiliary registers */
#define ARC_AUX_IC_IVIC 0x10
#define ARC_AUX_IC_CTRL 0x11
@@ -63,8 +66,15 @@
#define ARC_AUX_SLC_INVALIDATE 0x905
#define ARC_AUX_SLC_IVDL 0x910
#define ARC_AUX_SLC_FLDL 0x912
#define ARC_AUX_SLC_RGN_START 0x914
#define ARC_AUX_SLC_RGN_START1 0x915
#define ARC_AUX_SLC_RGN_END 0x916
#define ARC_AUX_SLC_RGN_END1 0x917
#define ARC_BCR_CLUSTER 0xcf
/* MMU Management regs */
#define ARC_AUX_MMU_BCR 0x06f
/* IO coherency related auxiliary registers */
#define ARC_AUX_IO_COH_ENABLE 0x500
#define ARC_AUX_IO_COH_PARTIAL 0x501
@@ -81,6 +91,16 @@
/* ARCNUM [15:8] - field to identify each core in a multi-core system */
#define CPU_ID_GET() ((read_aux_reg(ARC_AUX_IDENTITY) & 0xFF00) >> 8)
static const inline int is_isa_arcv2(void)
{
return IS_ENABLED(CONFIG_ISA_ARCV2);
}
static const inline int is_isa_arcompact(void)
{
return IS_ENABLED(CONFIG_ISA_ARCOMPACT);
}
#endif /* __ASSEMBLY__ */
#endif /* _ASM_ARC_ARCREGS_H */

View File

@@ -1,7 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __ASM_ARC_BITOPS_H

View File

@@ -1,7 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __ASM_ARC_BYTEORDER_H

View File

@@ -1,7 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __ASM_ARC_CACHE_H
@@ -30,6 +29,13 @@
#ifndef __ASSEMBLY__
void cache_init(void);
void flush_n_invalidate_dcache_all(void);
void sync_n_cleanup_cache_all(void);
static const inline int is_ioc_enabled(void)
{
return IS_ENABLED(CONFIG_ARC_DBG_IOC_ENABLE);
}
#endif /* __ASSEMBLY__ */

View File

@@ -1,7 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __ASM_ARC_CONFIG_H_

View File

@@ -1,15 +1,20 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __ASM_ARC_GLOBAL_DATA_H
#define __ASM_ARC_GLOBAL_DATA_H
#include <config.h>
#ifndef __ASSEMBLY__
/* Architecture-specific global data */
struct arch_global_data {
int l1_line_sz;
#if defined(CONFIG_ISA_ARCV2)
int slc_line_sz;
#endif
};
#endif /* __ASSEMBLY__ */

View File

@@ -1,7 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __ASM_ARC_IO_H
@@ -10,7 +9,7 @@
#include <linux/types.h>
#include <asm/byteorder.h>
#ifdef CONFIG_ISA_ARCV2
#ifdef __ARCHS__
/*
* ARCv2 based HS38 cores are in-order issue, but still weakly ordered
@@ -42,12 +41,12 @@
#define mb() asm volatile("sync\n" : : : "memory")
#endif
#ifdef CONFIG_ISA_ARCV2
#ifdef __ARCHS__
#define __iormb() rmb()
#define __iowmb() wmb()
#else
#define __iormb() do { } while (0)
#define __iowmb() do { } while (0)
#define __iormb() asm volatile("" : : : "memory")
#define __iowmb() asm volatile("" : : : "memory")
#endif
static inline void sync(void)

View File

@@ -1,7 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2004, 2007-2010, 2011-2015 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __ASM_ARC_LINKAGE_H

View File

@@ -1,7 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __ASM_ARC_POSIX_TYPES_H

View File

@@ -1,7 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2015 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef _ASM_ARC_PROCESSOR_H

View File

@@ -1,7 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __ASM_ARC_PTRACE_H

View File

@@ -1,7 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __ASM_ARC_SECTIONS_H

View File

@@ -1,27 +1 @@
/*
* Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __ASM_ARC_STRING_H
#define __ASM_ARC_STRING_H
#define __HAVE_ARCH_MEMSET
#define __HAVE_ARCH_MEMCPY
#define __HAVE_ARCH_MEMCMP
#define __HAVE_ARCH_STRCHR
#define __HAVE_ARCH_STRCPY
#define __HAVE_ARCH_STRCMP
#define __HAVE_ARCH_STRLEN
extern void *memset(void *ptr, int, __kernel_size_t);
extern void *memcpy(void *, const void *, __kernel_size_t);
extern void memzero(void *ptr, __kernel_size_t n);
extern int memcmp(const void *, const void *, __kernel_size_t);
extern char *strchr(const char *s, int c);
extern char *strcpy(char *dest, const char *src);
extern int strcmp(const char *cs, const char *ct);
extern __kernel_size_t strlen(const char *);
#endif /* __ASM_ARC_STRING_H */

View File

@@ -1,48 +1,15 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __ASM_ARC_TYPES_H
#define __ASM_ARC_TYPES_H
#include <asm-generic/int-ll64.h>
typedef unsigned short umode_t;
/*
* __xx is ok: it doesn't pollute the POSIX namespace. Use these in the
* header files exported to user space
*/
typedef __signed__ char __s8;
typedef unsigned char __u8;
typedef __signed__ short __s16;
typedef unsigned short __u16;
typedef __signed__ int __s32;
typedef unsigned int __u32;
#if defined(__GNUC__) && !defined(__STRICT_ANSI__)
typedef __signed__ long long __s64;
typedef unsigned long long __u64;
#endif
/*
* These aren't exported outside the kernel to avoid name space clashes
*/
typedef signed char s8;
typedef unsigned char u8;
typedef signed short s16;
typedef unsigned short u16;
typedef signed int s32;
typedef unsigned int u32;
typedef signed long long s64;
typedef unsigned long long u64;
#define BITS_PER_LONG 32
/* Dma addresses are 32-bits wide. */

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@@ -1,7 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2014 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __ASM_ARC_U_BOOT_ARC_H__

View File

@@ -1,7 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __ASM_ARC_U_BOOT_H__

View File

@@ -1,8 +1,6 @@
# SPDX-License-Identifier: GPL-2.0+
#
# Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
#
# SPDX-License-Identifier: GPL-2.0+
#
extra-y = start.o
head-y := start.o
@@ -10,13 +8,6 @@ obj-y += cache.o
obj-y += cpu.o
obj-y += interrupts.o
obj-y += relocate.o
obj-y += strchr-700.o
obj-y += strcmp.o
obj-y += strcpy-700.o
obj-y += strlen.o
obj-y += memcmp.o
obj-y += memcpy-700.o
obj-y += memset.o
obj-y += reset.o
obj-y += ints_low.o
obj-y += init_helpers.o

View File

@@ -1,7 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 1995, 1997, 2007-2013 Free Software Foundation, Inc.
*
* SPDX-License-Identifier: GPL-2.0+
*/
/* ANSI concatenation macros. */

View File

@@ -1,9 +1,9 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <asm/cache.h>
#include <common.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -37,49 +37,55 @@ void arch_lmb_reserve(struct lmb *lmb)
lmb_reserve(lmb, sp, (CONFIG_SYS_SDRAM_BASE + gd->ram_size - sp));
}
int arch_fixup_fdt(void *blob)
{
return 0;
}
static int cleanup_before_linux(void)
{
disable_interrupts();
flush_dcache_all();
invalidate_icache_all();
sync_n_cleanup_cache_all();
return 0;
}
__weak int board_prep_linux(bootm_headers_t *images) { return 0; }
/* Subcommand: PREP */
static void boot_prep_linux(bootm_headers_t *images)
static int boot_prep_linux(bootm_headers_t *images)
{
if (image_setup_linux(images))
hang();
int ret;
ret = image_setup_linux(images);
if (ret)
return ret;
return board_prep_linux(images);
}
__weak void smp_set_core_boot_addr(unsigned long addr, int corenr) {}
__weak void smp_kick_all_cpus(void) {}
/* Generic implementation for single core CPU */
__weak void board_jump_and_run(ulong entry, int zero, int arch, uint params)
{
void (*kernel_entry)(int zero, int arch, uint params);
kernel_entry = (void (*)(int, int, uint))entry;
kernel_entry(zero, arch, params);
}
/* Subcommand: GO */
static void boot_jump_linux(bootm_headers_t *images, int flag)
{
void (*kernel_entry)(int zero, int arch, uint params);
ulong kernel_entry;
unsigned int r0, r2;
int fake = (flag & BOOTM_STATE_OS_FAKE_GO);
kernel_entry = (void (*)(int, int, uint))images->ep;
kernel_entry = images->ep;
debug("## Transferring control to Linux (at address %08lx)...\n",
(ulong) kernel_entry);
kernel_entry);
bootstage_mark(BOOTSTAGE_ID_RUN_OS);
printf("\nStarting kernel ...%s\n\n", fake ?
"(fake run for tracing)" : "");
bootstage_mark_name(BOOTSTAGE_ID_BOOTM_HANDOFF, "start_kernel");
cleanup_before_linux();
if (IMAGE_ENABLE_OF_LIBFDT && images->ft_len) {
r0 = 2;
r2 = (unsigned int)images->ft_addr;
@@ -88,11 +94,10 @@ static void boot_jump_linux(bootm_headers_t *images, int flag)
r2 = (unsigned int)env_get("bootargs");
}
if (!fake) {
smp_set_core_boot_addr((unsigned long)kernel_entry, -1);
smp_kick_all_cpus();
kernel_entry(r0, 0, r2);
}
cleanup_before_linux();
if (!fake)
board_jump_and_run(kernel_entry, r0, 0, r2);
}
int do_bootm_linux(int flag, int argc, char *argv[], bootm_headers_t *images)
@@ -101,17 +106,13 @@ int do_bootm_linux(int flag, int argc, char *argv[], bootm_headers_t *images)
if ((flag & BOOTM_STATE_OS_BD_T) || (flag & BOOTM_STATE_OS_CMDLINE))
return -1;
if (flag & BOOTM_STATE_OS_PREP) {
boot_prep_linux(images);
return 0;
}
if (flag & BOOTM_STATE_OS_PREP)
return boot_prep_linux(images);
if (flag & (BOOTM_STATE_OS_GO | BOOTM_STATE_OS_FAKE_GO)) {
boot_jump_linux(images, flag);
return 0;
}
boot_prep_linux(images);
boot_jump_linux(images, flag);
return 0;
return -1;
}

View File

@@ -1,7 +1,6 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <config.h>
@@ -10,304 +9,528 @@
#include <linux/kernel.h>
#include <linux/log2.h>
#include <asm/arcregs.h>
#include <asm/arc-bcr.h>
#include <asm/cache.h>
/*
* [ NOTE 1 ]:
* Data cache (L1 D$ or SL$) entire invalidate operation or data cache disable
* operation may result in unexpected behavior and data loss even if we flush
* data cache right before invalidation. That may happens if we store any context
* on stack (like we store BLINK register on stack before function call).
* BLINK register is the register where return address is automatically saved
* when we do function call with instructions like 'bl'.
*
* There is the real example:
* We may hang in the next code as we store any BLINK register on stack in
* invalidate_dcache_all() function.
*
* void flush_dcache_all() {
* __dc_entire_op(OP_FLUSH);
* // Other code //
* }
*
* void invalidate_dcache_all() {
* __dc_entire_op(OP_INV);
* // Other code //
* }
*
* void foo(void) {
* flush_dcache_all();
* invalidate_dcache_all();
* }
*
* Now let's see what really happens during that code execution:
*
* foo()
* |->> call flush_dcache_all
* [return address is saved to BLINK register]
* [push BLINK] (save to stack) ![point 1]
* |->> call __dc_entire_op(OP_FLUSH)
* [return address is saved to BLINK register]
* [flush L1 D$]
* return [jump to BLINK]
* <<------
* [other flush_dcache_all code]
* [pop BLINK] (get from stack)
* return [jump to BLINK]
* <<------
* |->> call invalidate_dcache_all
* [return address is saved to BLINK register]
* [push BLINK] (save to stack) ![point 2]
* |->> call __dc_entire_op(OP_FLUSH)
* [return address is saved to BLINK register]
* [invalidate L1 D$] ![point 3]
* // Oops!!!
* // We lose return address from invalidate_dcache_all function:
* // we save it to stack and invalidate L1 D$ after that!
* return [jump to BLINK]
* <<------
* [other invalidate_dcache_all code]
* [pop BLINK] (get from stack)
* // we don't have this data in L1 dcache as we invalidated it in [point 3]
* // so we get it from next memory level (for example DDR memory)
* // but in the memory we have value which we save in [point 1], which
* // is return address from flush_dcache_all function (instead of
* // address from current invalidate_dcache_all function which we
* // saved in [point 2] !)
* return [jump to BLINK]
* <<------
* // As BLINK points to invalidate_dcache_all, we call it again and
* // loop forever.
*
* Fortunately we may fix that by using flush & invalidation of D$ with a single
* one instruction (instead of flush and invalidation instructions pair) and
* enabling force function inline with '__attribute__((always_inline))' gcc
* attribute to avoid any function call (and BLINK store) between cache flush
* and disable.
*
*
* [ NOTE 2 ]:
* As of today we only support the following cache configurations on ARC.
* Other configurations may exist in HW (for example, since version 3.0 HS
* supports SL$ (L2 system level cache) disable) but we don't support it in SW.
* Configuration 1:
* ______________________
* | |
* | ARC CPU |
* |______________________|
* ___|___ ___|___
* | | | |
* | L1 I$ | | L1 D$ |
* |_______| |_______|
* on/off on/off
* ___|______________|____
* | |
* | main memory |
* |______________________|
*
* Configuration 2:
* ______________________
* | |
* | ARC CPU |
* |______________________|
* ___|___ ___|___
* | | | |
* | L1 I$ | | L1 D$ |
* |_______| |_______|
* on/off on/off
* ___|______________|____
* | |
* | L2 (SL$) |
* |______________________|
* always must be on
* ___|______________|____
* | |
* | main memory |
* |______________________|
*
* Configuration 3:
* ______________________
* | |
* | ARC CPU |
* |______________________|
* ___|___ ___|___
* | | | |
* | L1 I$ | | L1 D$ |
* |_______| |_______|
* on/off must be on
* ___|______________|____ _______
* | | | |
* | L2 (SL$) |-----| IOC |
* |______________________| |_______|
* always must be on on/off
* ___|______________|____
* | |
* | main memory |
* |______________________|
*/
DECLARE_GLOBAL_DATA_PTR;
/* Bit values in IC_CTRL */
#define IC_CTRL_CACHE_DISABLE (1 << 0)
#define IC_CTRL_CACHE_DISABLE BIT(0)
/* Bit values in DC_CTRL */
#define DC_CTRL_CACHE_DISABLE (1 << 0)
#define DC_CTRL_INV_MODE_FLUSH (1 << 6)
#define DC_CTRL_FLUSH_STATUS (1 << 8)
#define CACHE_VER_NUM_MASK 0xF
#define SLC_CTRL_SB (1 << 2)
#define DC_CTRL_CACHE_DISABLE BIT(0)
#define DC_CTRL_INV_MODE_FLUSH BIT(6)
#define DC_CTRL_FLUSH_STATUS BIT(8)
#define OP_INV 0x1
#define OP_FLUSH 0x2
#define OP_INV_IC 0x3
#define OP_INV BIT(0)
#define OP_FLUSH BIT(1)
#define OP_FLUSH_N_INV (OP_FLUSH | OP_INV)
/* Bit val in SLC_CONTROL */
#define SLC_CTRL_DIS 0x001
#define SLC_CTRL_IM 0x040
#define SLC_CTRL_BUSY 0x100
#define SLC_CTRL_RGN_OP_INV 0x200
#define CACHE_LINE_MASK (~(gd->arch.l1_line_sz - 1))
/*
* By default that variable will fall into .bss section.
* But .bss section is not relocated and so it will be initilized before
* relocation but will be used after being zeroed.
* We don't want to use '__always_inline' macro here as it can be redefined
* to simple 'inline' in some cases which breaks stuff. See [ NOTE 1 ] for more
* details about the reasons we need to use always_inline functions.
*/
int l1_line_sz __section(".data");
bool dcache_exists __section(".data") = false;
bool icache_exists __section(".data") = false;
#define inlined_cachefunc inline __attribute__((always_inline))
#define CACHE_LINE_MASK (~(l1_line_sz - 1))
static inlined_cachefunc void __ic_entire_invalidate(void);
static inlined_cachefunc void __dc_entire_op(const int cacheop);
#ifdef CONFIG_ISA_ARCV2
int slc_line_sz __section(".data");
bool slc_exists __section(".data") = false;
bool ioc_exists __section(".data") = false;
static unsigned int __before_slc_op(const int op)
static inline bool pae_exists(void)
{
unsigned int reg = reg;
/* TODO: should we compare mmu version from BCR and from CONFIG? */
#if (CONFIG_ARC_MMU_VER >= 4)
union bcr_mmu_4 mmu4;
if (op == OP_INV) {
/*
* IM is set by default and implies Flush-n-inv
* Clear it here for vanilla inv
*/
reg = read_aux_reg(ARC_AUX_SLC_CTRL);
write_aux_reg(ARC_AUX_SLC_CTRL, reg & ~DC_CTRL_INV_MODE_FLUSH);
}
mmu4.word = read_aux_reg(ARC_AUX_MMU_BCR);
return reg;
if (mmu4.fields.pae)
return true;
#endif /* (CONFIG_ARC_MMU_VER >= 4) */
return false;
}
static void __after_slc_op(const int op, unsigned int reg)
static inlined_cachefunc bool icache_exists(void)
{
if (op & OP_FLUSH) { /* flush / flush-n-inv both wait */
/*
* Make sure "busy" bit reports correct status,
* see STAR 9001165532
*/
read_aux_reg(ARC_AUX_SLC_CTRL);
while (read_aux_reg(ARC_AUX_SLC_CTRL) &
DC_CTRL_FLUSH_STATUS)
;
}
union bcr_di_cache ibcr;
/* Switch back to default Invalidate mode */
if (op == OP_INV)
write_aux_reg(ARC_AUX_SLC_CTRL, reg | DC_CTRL_INV_MODE_FLUSH);
ibcr.word = read_aux_reg(ARC_BCR_IC_BUILD);
return !!ibcr.fields.ver;
}
static inline void __slc_line_loop(unsigned long paddr, unsigned long sz,
const int op)
static inlined_cachefunc bool icache_enabled(void)
{
unsigned int aux_cmd;
int num_lines;
if (!icache_exists())
return false;
#define SLC_LINE_MASK (~(slc_line_sz - 1))
aux_cmd = op & OP_INV ? ARC_AUX_SLC_IVDL : ARC_AUX_SLC_FLDL;
sz += paddr & ~SLC_LINE_MASK;
paddr &= SLC_LINE_MASK;
num_lines = DIV_ROUND_UP(sz, slc_line_sz);
while (num_lines-- > 0) {
write_aux_reg(aux_cmd, paddr);
paddr += slc_line_sz;
}
return !(read_aux_reg(ARC_AUX_IC_CTRL) & IC_CTRL_CACHE_DISABLE);
}
static inline void __slc_entire_op(const int cacheop)
static inlined_cachefunc bool dcache_exists(void)
{
int aux;
unsigned int ctrl_reg = __before_slc_op(cacheop);
union bcr_di_cache dbcr;
if (cacheop & OP_INV) /* Inv or flush-n-inv use same cmd reg */
aux = ARC_AUX_SLC_INVALIDATE;
dbcr.word = read_aux_reg(ARC_BCR_DC_BUILD);
return !!dbcr.fields.ver;
}
static inlined_cachefunc bool dcache_enabled(void)
{
if (!dcache_exists())
return false;
return !(read_aux_reg(ARC_AUX_DC_CTRL) & DC_CTRL_CACHE_DISABLE);
}
static inlined_cachefunc bool slc_exists(void)
{
if (is_isa_arcv2()) {
union bcr_generic sbcr;
sbcr.word = read_aux_reg(ARC_BCR_SLC);
return !!sbcr.fields.ver;
}
return false;
}
static inlined_cachefunc bool slc_data_bypass(void)
{
/*
* If L1 data cache is disabled SL$ is bypassed and all load/store
* requests are sent directly to main memory.
*/
return !dcache_enabled();
}
static inline bool ioc_exists(void)
{
if (is_isa_arcv2()) {
union bcr_clust_cfg cbcr;
cbcr.word = read_aux_reg(ARC_BCR_CLUSTER);
return cbcr.fields.c;
}
return false;
}
static inline bool ioc_enabled(void)
{
/*
* We check only CONFIG option instead of IOC HW state check as IOC
* must be disabled by default.
*/
if (is_ioc_enabled())
return ioc_exists();
return false;
}
static inlined_cachefunc void __slc_entire_op(const int op)
{
unsigned int ctrl;
if (!slc_exists())
return;
ctrl = read_aux_reg(ARC_AUX_SLC_CTRL);
if (!(op & OP_FLUSH)) /* i.e. OP_INV */
ctrl &= ~SLC_CTRL_IM; /* clear IM: Disable flush before Inv */
else
aux = ARC_AUX_SLC_FLUSH;
ctrl |= SLC_CTRL_IM;
write_aux_reg(aux, 0x1);
write_aux_reg(ARC_AUX_SLC_CTRL, ctrl);
__after_slc_op(cacheop, ctrl_reg);
if (op & OP_INV) /* Inv or flush-n-inv use same cmd reg */
write_aux_reg(ARC_AUX_SLC_INVALIDATE, 0x1);
else
write_aux_reg(ARC_AUX_SLC_FLUSH, 0x1);
/* Make sure "busy" bit reports correct stataus, see STAR 9001165532 */
read_aux_reg(ARC_AUX_SLC_CTRL);
/* Important to wait for flush to complete */
while (read_aux_reg(ARC_AUX_SLC_CTRL) & SLC_CTRL_BUSY);
}
static inline void __slc_line_op(unsigned long paddr, unsigned long sz,
const int cacheop)
static void slc_upper_region_init(void)
{
unsigned int ctrl_reg = __before_slc_op(cacheop);
__slc_line_loop(paddr, sz, cacheop);
__after_slc_op(cacheop, ctrl_reg);
}
#else
#define __slc_entire_op(cacheop)
#define __slc_line_op(paddr, sz, cacheop)
#endif
/*
* ARC_AUX_SLC_RGN_START1 and ARC_AUX_SLC_RGN_END1 register exist
* only if PAE exists in current HW. So we had to check pae_exist
* before using them.
*/
if (!pae_exists())
return;
/*
* ARC_AUX_SLC_RGN_END1 and ARC_AUX_SLC_RGN_START1 are always == 0
* as we don't use PAE40.
*/
write_aux_reg(ARC_AUX_SLC_RGN_END1, 0);
write_aux_reg(ARC_AUX_SLC_RGN_START1, 0);
}
static void __slc_rgn_op(unsigned long paddr, unsigned long sz, const int op)
{
#ifdef CONFIG_ISA_ARCV2
unsigned int ctrl;
unsigned long end;
if (!slc_exists())
return;
/*
* The Region Flush operation is specified by CTRL.RGN_OP[11..9]
* - b'000 (default) is Flush,
* - b'001 is Invalidate if CTRL.IM == 0
* - b'001 is Flush-n-Invalidate if CTRL.IM == 1
*/
ctrl = read_aux_reg(ARC_AUX_SLC_CTRL);
/* Don't rely on default value of IM bit */
if (!(op & OP_FLUSH)) /* i.e. OP_INV */
ctrl &= ~SLC_CTRL_IM; /* clear IM: Disable flush before Inv */
else
ctrl |= SLC_CTRL_IM;
if (op & OP_INV)
ctrl |= SLC_CTRL_RGN_OP_INV; /* Inv or flush-n-inv */
else
ctrl &= ~SLC_CTRL_RGN_OP_INV;
write_aux_reg(ARC_AUX_SLC_CTRL, ctrl);
/*
* Lower bits are ignored, no need to clip
* END needs to be setup before START (latter triggers the operation)
* END can't be same as START, so add (l2_line_sz - 1) to sz
*/
end = paddr + sz + gd->arch.slc_line_sz - 1;
/*
* Upper addresses (ARC_AUX_SLC_RGN_END1 and ARC_AUX_SLC_RGN_START1)
* are always == 0 as we don't use PAE40, so we only setup lower ones
* (ARC_AUX_SLC_RGN_END and ARC_AUX_SLC_RGN_START)
*/
write_aux_reg(ARC_AUX_SLC_RGN_END, end);
write_aux_reg(ARC_AUX_SLC_RGN_START, paddr);
/* Make sure "busy" bit reports correct stataus, see STAR 9001165532 */
read_aux_reg(ARC_AUX_SLC_CTRL);
while (read_aux_reg(ARC_AUX_SLC_CTRL) & SLC_CTRL_BUSY);
#endif /* CONFIG_ISA_ARCV2 */
}
static void arc_ioc_setup(void)
{
/* IOC Aperture start is equal to DDR start */
unsigned int ap_base = CONFIG_SYS_SDRAM_BASE;
/* IOC Aperture size is equal to DDR size */
long ap_size = CONFIG_SYS_SDRAM_SIZE;
/* Unsupported configuration. See [ NOTE 2 ] for more details. */
if (!slc_exists())
panic("Try to enable IOC but SLC is not present");
/* Unsupported configuration. See [ NOTE 2 ] for more details. */
if (!dcache_enabled())
panic("Try to enable IOC but L1 D$ is disabled");
if (!is_power_of_2(ap_size) || ap_size < 4096)
panic("IOC Aperture size must be power of 2 and bigger 4Kib");
/* IOC Aperture start must be aligned to the size of the aperture */
if (ap_base % ap_size != 0)
panic("IOC Aperture start must be aligned to the size of the aperture");
flush_n_invalidate_dcache_all();
/*
* IOC Aperture size decoded as 2 ^ (SIZE + 2) KB,
* so setting 0x11 implies 512M, 0x12 implies 1G...
*/
write_aux_reg(ARC_AUX_IO_COH_AP0_SIZE,
order_base_2(ap_size / 1024) - 2);
write_aux_reg(ARC_AUX_IO_COH_AP0_BASE, ap_base >> 12);
write_aux_reg(ARC_AUX_IO_COH_PARTIAL, 1);
write_aux_reg(ARC_AUX_IO_COH_ENABLE, 1);
}
static void read_decode_cache_bcr_arcv2(void)
{
union {
struct {
#ifdef CONFIG_CPU_BIG_ENDIAN
unsigned int pad:24, way:2, lsz:2, sz:4;
#else
unsigned int sz:4, lsz:2, way:2, pad:24;
#endif
} fields;
unsigned int word;
} slc_cfg;
#ifdef CONFIG_ISA_ARCV2
union {
struct {
#ifdef CONFIG_CPU_BIG_ENDIAN
unsigned int pad:24, ver:8;
#else
unsigned int ver:8, pad:24;
#endif
} fields;
unsigned int word;
} sbcr;
union bcr_slc_cfg slc_cfg;
sbcr.word = read_aux_reg(ARC_BCR_SLC);
if (sbcr.fields.ver) {
if (slc_exists()) {
slc_cfg.word = read_aux_reg(ARC_AUX_SLC_CONFIG);
slc_exists = true;
slc_line_sz = (slc_cfg.fields.lsz == 0) ? 128 : 64;
gd->arch.slc_line_sz = (slc_cfg.fields.lsz == 0) ? 128 : 64;
/*
* We don't support configuration where L1 I$ or L1 D$ is
* absent but SL$ exists. See [ NOTE 2 ] for more details.
*/
if (!icache_exists() || !dcache_exists())
panic("Unsupported cache configuration: SLC exists but one of L1 caches is absent");
}
union {
struct bcr_clust_cfg {
#ifdef CONFIG_CPU_BIG_ENDIAN
unsigned int pad:7, c:1, num_entries:8, num_cores:8, ver:8;
#else
unsigned int ver:8, num_cores:8, num_entries:8, c:1, pad:7;
#endif
} fields;
unsigned int word;
} cbcr;
cbcr.word = read_aux_reg(ARC_BCR_CLUSTER);
if (cbcr.fields.c)
ioc_exists = true;
#endif /* CONFIG_ISA_ARCV2 */
}
#endif
void read_decode_cache_bcr(void)
{
int dc_line_sz = 0, ic_line_sz = 0;
union bcr_di_cache ibcr, dbcr;
union {
struct {
#ifdef CONFIG_CPU_BIG_ENDIAN
unsigned int pad:12, line_len:4, sz:4, config:4, ver:8;
#else
unsigned int ver:8, config:4, sz:4, line_len:4, pad:12;
#endif
} fields;
unsigned int word;
} ibcr, dbcr;
/*
* We don't care much about I$ line length really as there're
* no per-line ops on I$ instead we only do full invalidation of it
* on occasion of relocation and right before jumping to the OS.
* Still we check insane config with zero-encoded line length in
* presense of version field in I$ BCR. Just in case.
*/
ibcr.word = read_aux_reg(ARC_BCR_IC_BUILD);
if (ibcr.fields.ver) {
icache_exists = true;
l1_line_sz = ic_line_sz = 8 << ibcr.fields.line_len;
ic_line_sz = 8 << ibcr.fields.line_len;
if (!ic_line_sz)
panic("Instruction exists but line length is 0\n");
}
dbcr.word = read_aux_reg(ARC_BCR_DC_BUILD);
if (dbcr.fields.ver){
dcache_exists = true;
l1_line_sz = dc_line_sz = 16 << dbcr.fields.line_len;
if (dbcr.fields.ver) {
gd->arch.l1_line_sz = dc_line_sz = 16 << dbcr.fields.line_len;
if (!dc_line_sz)
panic("Data cache exists but line length is 0\n");
}
if (ic_line_sz && dc_line_sz && (ic_line_sz != dc_line_sz))
panic("Instruction and data cache line lengths differ\n");
}
void cache_init(void)
{
read_decode_cache_bcr();
#ifdef CONFIG_ISA_ARCV2
read_decode_cache_bcr_arcv2();
if (is_isa_arcv2())
read_decode_cache_bcr_arcv2();
if (ioc_exists) {
/* IOC Aperture start is equal to DDR start */
unsigned int ap_base = CONFIG_SYS_SDRAM_BASE;
/* IOC Aperture size is equal to DDR size */
long ap_size = CONFIG_SYS_SDRAM_SIZE;
if (is_isa_arcv2() && ioc_enabled())
arc_ioc_setup();
flush_dcache_all();
invalidate_dcache_all();
if (!is_power_of_2(ap_size) || ap_size < 4096)
panic("IOC Aperture size must be power of 2 and bigger 4Kib");
/*
* IOC Aperture size decoded as 2 ^ (SIZE + 2) KB,
* so setting 0x11 implies 512M, 0x12 implies 1G...
*/
write_aux_reg(ARC_AUX_IO_COH_AP0_SIZE,
order_base_2(ap_size/1024) - 2);
/* IOC Aperture start must be aligned to the size of the aperture */
if (ap_base % ap_size != 0)
panic("IOC Aperture start must be aligned to the size of the aperture");
write_aux_reg(ARC_AUX_IO_COH_AP0_BASE, ap_base >> 12);
write_aux_reg(ARC_AUX_IO_COH_PARTIAL, 1);
write_aux_reg(ARC_AUX_IO_COH_ENABLE, 1);
}
#endif
if (is_isa_arcv2() && slc_exists())
slc_upper_region_init();
}
int icache_status(void)
{
if (!icache_exists)
return 0;
if (read_aux_reg(ARC_AUX_IC_CTRL) & IC_CTRL_CACHE_DISABLE)
return 0;
else
return 1;
return icache_enabled();
}
void icache_enable(void)
{
if (icache_exists)
if (icache_exists())
write_aux_reg(ARC_AUX_IC_CTRL, read_aux_reg(ARC_AUX_IC_CTRL) &
~IC_CTRL_CACHE_DISABLE);
}
void icache_disable(void)
{
if (icache_exists)
write_aux_reg(ARC_AUX_IC_CTRL, read_aux_reg(ARC_AUX_IC_CTRL) |
IC_CTRL_CACHE_DISABLE);
if (!icache_exists())
return;
__ic_entire_invalidate();
write_aux_reg(ARC_AUX_IC_CTRL, read_aux_reg(ARC_AUX_IC_CTRL) |
IC_CTRL_CACHE_DISABLE);
}
#ifndef CONFIG_SYS_DCACHE_OFF
void invalidate_icache_all(void)
/* IC supports only invalidation */
static inlined_cachefunc void __ic_entire_invalidate(void)
{
if (!icache_enabled())
return;
/* Any write to IC_IVIC register triggers invalidation of entire I$ */
if (icache_status()) {
write_aux_reg(ARC_AUX_IC_IVIC, 1);
/*
* As per ARC HS databook (see chapter 5.3.3.2)
* it is required to add 3 NOPs after each write to IC_IVIC.
*/
__builtin_arc_nop();
__builtin_arc_nop();
__builtin_arc_nop();
read_aux_reg(ARC_AUX_IC_CTRL); /* blocks */
}
write_aux_reg(ARC_AUX_IC_IVIC, 1);
/*
* As per ARC HS databook (see chapter 5.3.3.2)
* it is required to add 3 NOPs after each write to IC_IVIC.
*/
__builtin_arc_nop();
__builtin_arc_nop();
__builtin_arc_nop();
read_aux_reg(ARC_AUX_IC_CTRL); /* blocks */
}
#else
void invalidate_icache_all(void)
{
__ic_entire_invalidate();
/*
* If SL$ is bypassed for data it is used only for instructions,
* so we need to invalidate it too.
* TODO: HS 3.0 supports SLC disable so we need to check slc
* enable/disable status here.
*/
if (is_isa_arcv2() && slc_data_bypass())
__slc_entire_op(OP_INV);
}
#endif
int dcache_status(void)
{
if (!dcache_exists)
return 0;
if (read_aux_reg(ARC_AUX_DC_CTRL) & DC_CTRL_CACHE_DISABLE)
return 0;
else
return 1;
return dcache_enabled();
}
void dcache_enable(void)
{
if (!dcache_exists)
if (!dcache_exists())
return;
write_aux_reg(ARC_AUX_DC_CTRL, read_aux_reg(ARC_AUX_DC_CTRL) &
@@ -316,84 +539,77 @@ void dcache_enable(void)
void dcache_disable(void)
{
if (!dcache_exists)
if (!dcache_exists())
return;
__dc_entire_op(OP_FLUSH_N_INV);
/*
* As SLC will be bypassed for data after L1 D$ disable we need to
* flush it first before L1 D$ disable. Also we invalidate SLC to
* avoid any inconsistent data problems after enabling L1 D$ again with
* dcache_enable function.
*/
if (is_isa_arcv2())
__slc_entire_op(OP_FLUSH_N_INV);
write_aux_reg(ARC_AUX_DC_CTRL, read_aux_reg(ARC_AUX_DC_CTRL) |
DC_CTRL_CACHE_DISABLE);
}
#ifndef CONFIG_SYS_DCACHE_OFF
/*
* Common Helper for Line Operations on {I,D}-Cache
*/
static inline void __cache_line_loop(unsigned long paddr, unsigned long sz,
const int cacheop)
/* Common Helper for Line Operations on D-cache */
static inline void __dcache_line_loop(unsigned long paddr, unsigned long sz,
const int cacheop)
{
unsigned int aux_cmd;
#if (CONFIG_ARC_MMU_VER == 3)
unsigned int aux_tag;
#endif
int num_lines;
if (cacheop == OP_INV_IC) {
aux_cmd = ARC_AUX_IC_IVIL;
#if (CONFIG_ARC_MMU_VER == 3)
aux_tag = ARC_AUX_IC_PTAG;
#endif
} else {
/* d$ cmd: INV (discard or wback-n-discard) OR FLUSH (wback) */
aux_cmd = cacheop & OP_INV ? ARC_AUX_DC_IVDL : ARC_AUX_DC_FLDL;
#if (CONFIG_ARC_MMU_VER == 3)
aux_tag = ARC_AUX_DC_PTAG;
#endif
}
/* d$ cmd: INV (discard or wback-n-discard) OR FLUSH (wback) */
aux_cmd = cacheop & OP_INV ? ARC_AUX_DC_IVDL : ARC_AUX_DC_FLDL;
sz += paddr & ~CACHE_LINE_MASK;
paddr &= CACHE_LINE_MASK;
num_lines = DIV_ROUND_UP(sz, l1_line_sz);
num_lines = DIV_ROUND_UP(sz, gd->arch.l1_line_sz);
while (num_lines-- > 0) {
#if (CONFIG_ARC_MMU_VER == 3)
write_aux_reg(aux_tag, paddr);
write_aux_reg(ARC_AUX_DC_PTAG, paddr);
#endif
write_aux_reg(aux_cmd, paddr);
paddr += l1_line_sz;
paddr += gd->arch.l1_line_sz;
}
}
static unsigned int __before_dc_op(const int op)
static inlined_cachefunc void __before_dc_op(const int op)
{
unsigned int reg;
unsigned int ctrl;
if (op == OP_INV) {
/*
* IM is set by default and implies Flush-n-inv
* Clear it here for vanilla inv
*/
reg = read_aux_reg(ARC_AUX_DC_CTRL);
write_aux_reg(ARC_AUX_DC_CTRL, reg & ~DC_CTRL_INV_MODE_FLUSH);
}
ctrl = read_aux_reg(ARC_AUX_DC_CTRL);
return reg;
/* IM bit implies flush-n-inv, instead of vanilla inv */
if (op == OP_INV)
ctrl &= ~DC_CTRL_INV_MODE_FLUSH;
else
ctrl |= DC_CTRL_INV_MODE_FLUSH;
write_aux_reg(ARC_AUX_DC_CTRL, ctrl);
}
static void __after_dc_op(const int op, unsigned int reg)
static inlined_cachefunc void __after_dc_op(const int op)
{
if (op & OP_FLUSH) /* flush / flush-n-inv both wait */
while (read_aux_reg(ARC_AUX_DC_CTRL) & DC_CTRL_FLUSH_STATUS)
;
/* Switch back to default Invalidate mode */
if (op == OP_INV)
write_aux_reg(ARC_AUX_DC_CTRL, reg | DC_CTRL_INV_MODE_FLUSH);
while (read_aux_reg(ARC_AUX_DC_CTRL) & DC_CTRL_FLUSH_STATUS);
}
static inline void __dc_entire_op(const int cacheop)
static inlined_cachefunc void __dc_entire_op(const int cacheop)
{
int aux;
unsigned int ctrl_reg = __before_dc_op(cacheop);
if (!dcache_enabled())
return;
__before_dc_op(cacheop);
if (cacheop & OP_INV) /* Inv or flush-n-inv use same cmd reg */
aux = ARC_AUX_DC_IVDC;
@@ -402,45 +618,54 @@ static inline void __dc_entire_op(const int cacheop)
write_aux_reg(aux, 0x1);
__after_dc_op(cacheop, ctrl_reg);
__after_dc_op(cacheop);
}
static inline void __dc_line_op(unsigned long paddr, unsigned long sz,
const int cacheop)
{
unsigned int ctrl_reg = __before_dc_op(cacheop);
__cache_line_loop(paddr, sz, cacheop);
__after_dc_op(cacheop, ctrl_reg);
if (!dcache_enabled())
return;
__before_dc_op(cacheop);
__dcache_line_loop(paddr, sz, cacheop);
__after_dc_op(cacheop);
}
#else
#define __dc_entire_op(cacheop)
#define __dc_line_op(paddr, sz, cacheop)
#endif /* !CONFIG_SYS_DCACHE_OFF */
void invalidate_dcache_range(unsigned long start, unsigned long end)
{
#ifdef CONFIG_ISA_ARCV2
if (!ioc_exists)
#endif
if (start >= end)
return;
/*
* ARCv1 -> call __dc_line_op
* ARCv2 && L1 D$ disabled -> nothing
* ARCv2 && L1 D$ enabled && IOC enabled -> nothing
* ARCv2 && L1 D$ enabled && no IOC -> call __dc_line_op; call __slc_rgn_op
*/
if (!is_isa_arcv2() || !ioc_enabled())
__dc_line_op(start, end - start, OP_INV);
#ifdef CONFIG_ISA_ARCV2
if (slc_exists && !ioc_exists)
__slc_line_op(start, end - start, OP_INV);
#endif
if (is_isa_arcv2() && !ioc_enabled() && !slc_data_bypass())
__slc_rgn_op(start, end - start, OP_INV);
}
void flush_dcache_range(unsigned long start, unsigned long end)
{
#ifdef CONFIG_ISA_ARCV2
if (!ioc_exists)
#endif
if (start >= end)
return;
/*
* ARCv1 -> call __dc_line_op
* ARCv2 && L1 D$ disabled -> nothing
* ARCv2 && L1 D$ enabled && IOC enabled -> nothing
* ARCv2 && L1 D$ enabled && no IOC -> call __dc_line_op; call __slc_rgn_op
*/
if (!is_isa_arcv2() || !ioc_enabled())
__dc_line_op(start, end - start, OP_FLUSH);
#ifdef CONFIG_ISA_ARCV2
if (slc_exists && !ioc_exists)
__slc_line_op(start, end - start, OP_FLUSH);
#endif
if (is_isa_arcv2() && !ioc_enabled() && !slc_data_bypass())
__slc_rgn_op(start, end - start, OP_FLUSH);
}
void flush_cache(unsigned long start, unsigned long size)
@@ -448,22 +673,47 @@ void flush_cache(unsigned long start, unsigned long size)
flush_dcache_range(start, start + size);
}
void invalidate_dcache_all(void)
/*
* As invalidate_dcache_all() is not used in generic U-Boot code and as we
* don't need it in arch/arc code alone (invalidate without flush) we implement
* flush_n_invalidate_dcache_all (flush and invalidate in 1 operation) because
* it's much safer. See [ NOTE 1 ] for more details.
*/
void flush_n_invalidate_dcache_all(void)
{
__dc_entire_op(OP_INV);
__dc_entire_op(OP_FLUSH_N_INV);
#ifdef CONFIG_ISA_ARCV2
if (slc_exists)
__slc_entire_op(OP_INV);
#endif
if (is_isa_arcv2() && !slc_data_bypass())
__slc_entire_op(OP_FLUSH_N_INV);
}
void flush_dcache_all(void)
{
__dc_entire_op(OP_FLUSH);
#ifdef CONFIG_ISA_ARCV2
if (slc_exists)
if (is_isa_arcv2() && !slc_data_bypass())
__slc_entire_op(OP_FLUSH);
#endif
}
/*
* This is function to cleanup all caches (and therefore sync I/D caches) which
* can be used for cleanup before linux launch or to sync caches during
* relocation.
*/
void sync_n_cleanup_cache_all(void)
{
__dc_entire_op(OP_FLUSH_N_INV);
/*
* If SL$ is bypassed for data it is used only for instructions,
* and we shouldn't flush it. So invalidate it instead of flush_n_inv.
*/
if (is_isa_arcv2()) {
if (slc_data_bypass())
__slc_entire_op(OP_INV);
else
__slc_entire_op(OP_FLUSH_N_INV);
}
__ic_entire_invalidate();
}

View File

@@ -1,7 +1,6 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
* Copyright (C) 2013-2014, 2018 Synopsys, Inc. All rights reserved.
*/
#include <common.h>
@@ -34,3 +33,36 @@ int dram_init(void)
{
return 0;
}
#ifdef CONFIG_DISPLAY_CPUINFO
const char *decode_identity(void)
{
int arcver = read_aux_reg(ARC_AUX_IDENTITY) & 0xff;
switch (arcver) {
/* ARCompact cores */
case 0x32: return "ARC 700 v4.4-4.5";
case 0x33: return "ARC 700 v4.6-v4.9";
case 0x34: return "ARC 700 v4.10";
case 0x35: return "ARC 700 v4.11";
/* ARCv2 cores */
case 0x41: return "ARC EM v1.1a";
case 0x42: return "ARC EM v3.0";
case 0x43: return "ARC EM v4.0";
case 0x50: return "ARC HS v1.0";
case 0x51: return "ARC EM v2.0";
case 0x52: return "ARC EM v2.1";
case 0x53: return "ARC HS v3.0";
case 0x54: return "ARC HS v4.0";
default: return "Unknown ARC core";
}
}
__weak int print_cpuinfo(void)
{
printf("CPU: %s\n", decode_identity());
return 0;
}
#endif /* CONFIG_DISPLAY_CPUINFO */

View File

@@ -1,17 +1,14 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2013-2015 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <asm/cache.h>
#include <common.h>
DECLARE_GLOBAL_DATA_PTR;
int init_cache_f_r(void)
{
#ifndef CONFIG_SYS_DCACHE_OFF
flush_dcache_all();
#endif
sync_n_cleanup_cache_all();
return 0;
}

View File

@@ -1,7 +1,6 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>

View File

@@ -1,7 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2013-2015 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <linux/linkage.h>

View File

@@ -1,7 +1,6 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 1989-2013 Free Software Foundation, Inc.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include "libgcc2.h"

View File

@@ -1,7 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 1989-2013 Free Software Foundation, Inc.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __ASM_LIBGCC_H

View File

@@ -1,123 +0,0 @@
/*
* Copyright (C) 2004, 2007-2010, 2011-2014 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifdef __LITTLE_ENDIAN__
#define WORD2 r2
#define SHIFT r3
#else /* __BIG_ENDIAN__ */
#define WORD2 r3
#define SHIFT r2
#endif /* _ENDIAN__ */
.global memcmp
.align 4
memcmp:
or %r12, %r0, %r1
asl_s %r12, %r12, 30
sub %r3, %r2, 1
brls %r2, %r12, .Lbytewise
ld %r4, [%r0, 0]
ld %r5, [%r1, 0]
lsr.f %lp_count, %r3, 3
lpne .Loop_end
ld_s WORD2, [%r0, 4]
ld_s %r12, [%r1, 4]
brne %r4, %r5, .Leven
ld.a %r4, [%r0, 8]
ld.a %r5, [%r1, 8]
brne WORD2, %r12, .Lodd
nop
.Loop_end:
asl_s SHIFT, SHIFT, 3
bhs_s .Last_cmp
brne %r4, %r5, .Leven
ld %r4, [%r0, 4]
ld %r5, [%r1, 4]
#ifdef __LITTLE_ENDIAN__
nop_s
/* one more load latency cycle */
.Last_cmp:
xor %r0, %r4, %r5
bset %r0, %r0, SHIFT
sub_s %r1, %r0, 1
bic_s %r1, %r1, %r0
norm %r1, %r1
b.d .Leven_cmp
and %r1, %r1, 24
.Leven:
xor %r0, %r4, %r5
sub_s %r1, %r0, 1
bic_s %r1, %r1, %r0
norm %r1, %r1
/* slow track insn */
and %r1, %r1, 24
.Leven_cmp:
asl %r2, %r4, %r1
asl %r12, %r5, %r1
lsr_s %r2, %r2, 1
lsr_s %r12, %r12, 1
j_s.d [%blink]
sub %r0, %r2, %r12
.balign 4
.Lodd:
xor %r0, WORD2, %r12
sub_s %r1, %r0, 1
bic_s %r1, %r1, %r0
norm %r1, %r1
/* slow track insn */
and %r1, %r1, 24
asl_s %r2, %r2, %r1
asl_s %r12, %r12, %r1
lsr_s %r2, %r2, 1
lsr_s %r12, %r12, 1
j_s.d [%blink]
sub %r0, %r2, %r12
#else /* __BIG_ENDIAN__ */
.Last_cmp:
neg_s SHIFT, SHIFT
lsr %r4, %r4, SHIFT
lsr %r5, %r5, SHIFT
/* slow track insn */
.Leven:
sub.f %r0, %r4, %r5
mov.ne %r0, 1
j_s.d [%blink]
bset.cs %r0, %r0, 31
.Lodd:
cmp_s WORD2, %r12
mov_s %r0, 1
j_s.d [%blink]
bset.cs %r0, %r0, 31
#endif /* _ENDIAN__ */
.balign 4
.Lbytewise:
breq %r2, 0, .Lnil
ldb %r4, [%r0, 0]
ldb %r5, [%r1, 0]
lsr.f %lp_count, %r3
lpne .Lbyte_end
ldb_s %r3, [%r0, 1]
ldb %r12, [%r1, 1]
brne %r4, %r5, .Lbyte_even
ldb.a %r4, [%r0, 2]
ldb.a %r5, [%r1, 2]
brne %r3, %r12, .Lbyte_odd
nop
.Lbyte_end:
bcc .Lbyte_even
brne %r4, %r5, .Lbyte_even
ldb_s %r3, [%r0, 1]
ldb_s %r12, [%r1, 1]
.Lbyte_odd:
j_s.d [%blink]
sub %r0, %r3, %r12
.Lbyte_even:
j_s.d [%blink]
sub %r0, %r4, %r5
.Lnil:
j_s.d [%blink]
mov %r0, 0

View File

@@ -1,63 +0,0 @@
/*
* Copyright (C) 2004, 2007-2010, 2011-2014 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
.global memcpy
.align 4
memcpy:
or %r3, %r0, %r1
asl_s %r3, %r3, 30
mov_s %r5, %r0
brls.d %r2, %r3, .Lcopy_bytewise
sub.f %r3, %r2, 1
ld_s %r12, [%r1, 0]
asr.f %lp_count, %r3, 3
bbit0.d %r3, 2, .Lnox4
bmsk_s %r2, %r2, 1
st.ab %r12, [%r5, 4]
ld.a %r12, [%r1, 4]
.Lnox4:
lppnz .Lendloop
ld_s %r3, [%r1, 4]
st.ab %r12, [%r5, 4]
ld.a %r12, [%r1, 8]
st.ab %r3, [%r5, 4]
.Lendloop:
breq %r2, 0, .Last_store
ld %r3, [%r5, 0]
#ifdef __LITTLE_ENDIAN__
add3 %r2, -1, %r2
/* uses long immediate */
xor_s %r12, %r12, %r3
bmsk %r12, %r12, %r2
xor_s %r12, %r12, %r3
#else /* __BIG_ENDIAN__ */
sub3 %r2, 31, %r2
/* uses long immediate */
xor_s %r3, %r3, %r12
bmsk %r3, %r3, %r2
xor_s %r12, %r12, %r3
#endif /* _ENDIAN__ */
.Last_store:
j_s.d [%blink]
st %r12, [%r5, 0]
.balign 4
.Lcopy_bytewise:
jcs [%blink]
ldb_s %r12, [%r1, 0]
lsr.f %lp_count, %r3
bhs_s .Lnox1
stb.ab %r12, [%r5, 1]
ldb.a %r12, [%r1, 1]
.Lnox1:
lppnz .Lendbloop
ldb_s %r3, [%r1, 1]
stb.ab %r12, [%r5, 1]
ldb.a %r12, [%r1, 2]
stb.ab %r3, [%r5, 1]
.Lendbloop:
j_s.d [%blink]
stb %r12, [%r5, 0]

View File

@@ -1,62 +0,0 @@
/*
* Copyright (C) 2004, 2007-2010, 2011-2014 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#define SMALL 7 /* Must be at least 6 to deal with alignment/loop issues. */
.global memset
.align 4
memset:
mov_s %r4, %r0
or %r12, %r0, %r2
bmsk.f %r12, %r12, 1
extb_s %r1, %r1
asl %r3, %r1, 8
beq.d .Laligned
or_s %r1, %r1, %r3
brls %r2, SMALL, .Ltiny
add %r3, %r2, %r0
stb %r1, [%r3, -1]
bclr_s %r3, %r3, 0
stw %r1, [%r3, -2]
bmsk.f %r12, %r0, 1
add_s %r2, %r2, %r12
sub.ne %r2, %r2, 4
stb.ab %r1, [%r4, 1]
and %r4, %r4, -2
stw.ab %r1, [%r4, 2]
and %r4, %r4, -4
.balign 4
.Laligned:
asl %r3, %r1, 16
lsr.f %lp_count, %r2, 2
or_s %r1, %r1, %r3
lpne .Loop_end
st.ab %r1, [%r4, 4]
.Loop_end:
j_s [%blink]
.balign 4
.Ltiny:
mov.f %lp_count, %r2
lpne .Ltiny_end
stb.ab %r1, [%r4, 1]
.Ltiny_end:
j_s [%blink]
/*
* memzero: @r0 = mem, @r1 = size_t
* memset: @r0 = mem, @r1 = char, @r2 = size_t
*/
.global memzero
.align 4
memzero:
/* adjust bzero args to memset args */
mov %r2, %r1
mov %r1, 0
/* tail call so need to tinker with blink */
b memset

View File

@@ -1,7 +1,6 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
@@ -9,7 +8,9 @@
#include <asm-generic/sections.h>
extern ulong __image_copy_start;
extern ulong __ivt_start;
extern ulong __ivt_end;
extern ulong __text_end;
DECLARE_GLOBAL_DATA_PTR;
@@ -17,6 +18,9 @@ int copy_uboot_to_ram(void)
{
size_t len = (size_t)&__image_copy_end - (size_t)&__image_copy_start;
if (gd->flags & GD_FLG_SKIP_RELOC)
return 0;
memcpy((void *)gd->relocaddr, (void *)&__image_copy_start, len);
return 0;
@@ -40,10 +44,13 @@ int do_elf_reloc_fixups(void)
Elf32_Rela *re_src = (Elf32_Rela *)(&__rel_dyn_start);
Elf32_Rela *re_end = (Elf32_Rela *)(&__rel_dyn_end);
if (gd->flags & GD_FLG_SKIP_RELOC)
return 0;
debug("Section .rela.dyn is located at %08x-%08x\n",
(unsigned int)re_src, (unsigned int)re_end);
Elf32_Addr *offset_ptr_rom, *last_offset = NULL;
Elf32_Addr *offset_ptr_rom;
Elf32_Addr *offset_ptr_ram;
do {
@@ -52,15 +59,28 @@ int do_elf_reloc_fixups(void)
/* Check that the location of the relocation is in .text */
if (offset_ptr_rom >= (Elf32_Addr *)&__image_copy_start &&
offset_ptr_rom > last_offset) {
unsigned int val;
offset_ptr_rom < (Elf32_Addr *)&__image_copy_end) {
unsigned int val, do_swap = 0;
/* Switch to the in-RAM version */
offset_ptr_ram = (Elf32_Addr *)((ulong)offset_ptr_rom +
gd->reloc_off);
debug("Patching value @ %08x (relocated to %08x)\n",
#ifdef __LITTLE_ENDIAN__
/* If location in ".text" section swap value */
if (((u32)offset_ptr_rom >= (u32)&__text_start &&
(u32)offset_ptr_rom <= (u32)&__text_end)
#if defined(__ARC700__) || defined(__ARC600__)
|| ((u32)offset_ptr_rom >= (u32)&__ivt_start &&
(u32)offset_ptr_rom <= (u32)&__ivt_end)
#endif
)
do_swap = 1;
#endif
debug("Patching value @ %08x (relocated to %08x)%s\n",
(unsigned int)offset_ptr_rom,
(unsigned int)offset_ptr_ram);
(unsigned int)offset_ptr_ram,
do_swap ? ", middle-endian encoded" : "");
/*
* Use "memcpy" because target location might be
@@ -70,28 +90,45 @@ int do_elf_reloc_fixups(void)
*/
memcpy(&val, offset_ptr_ram, sizeof(int));
#ifdef __LITTLE_ENDIAN__
/* If location in ".text" section swap value */
if ((unsigned int)offset_ptr_rom <
(unsigned int)&__ivt_end)
if (do_swap)
val = (val << 16) | (val >> 16);
#endif
/* Check that the target points into executable */
if (val >= (unsigned int)&__image_copy_start && val <=
(unsigned int)&__image_copy_end) {
val += gd->reloc_off;
#ifdef __LITTLE_ENDIAN__
/* If location in ".text" section swap value */
if ((unsigned int)offset_ptr_rom <
(unsigned int)&__ivt_end)
val = (val << 16) | (val >> 16);
#endif
memcpy(offset_ptr_ram, &val, sizeof(int));
if (val < (unsigned int)&__image_copy_start ||
val > (unsigned int)&__image_copy_end) {
/* TODO: Use panic() instead of debug()
*
* For some reason GCC might generate
* fake relocation even for LD/SC of constant
* inderectly. See an example below:
* ----------------------->8--------------------
* static int setup_mon_len(void)
* {
* gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE;
* return 0;
* }
* ----------------------->8--------------------
*
* And that's what we get in the binary:
* ----------------------->8--------------------
* 10005cb4 <setup_mon_len>:
* 10005cb4: 193c 3f80 0003 2f80 st 0x32f80,[r25,60]
* 10005cb8: R_ARC_RELATIVE *ABS*-0x10000000
* 10005cbc: 7fe0 j_s.d [blink]
* 10005cbe: 700c mov_s r0,0
* ----------------------->8--------------------
*/
debug("Relocation target %08x points outside of image\n",
val);
}
}
last_offset = offset_ptr_rom;
val += gd->reloc_off;
if (do_swap)
val = (val << 16) | (val >> 16);
memcpy(offset_ptr_ram, &val, sizeof(int));
}
} while (++re_src < re_end);
return 0;

View File

@@ -1,19 +1,22 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <command.h>
#include <common.h>
__weak void reset_cpu(ulong addr)
{
/* Stop debug session here */
__builtin_arc_brk();
}
int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
{
printf("Put your restart handler here\n");
printf("Resetting the board...\n");
reset_cpu(0);
#ifdef DEBUG
/* Stop debug session here */
__asm__("brk");
#endif
return 0;
}

View File

@@ -1,7 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <asm-offsets.h>
@@ -10,26 +9,6 @@
#include <asm/arcregs.h>
ENTRY(_start)
; ARCompact devices are not supposed to be SMP so master/slave check
; makes no sense.
#ifdef CONFIG_ISA_ARCV2
; Non-masters will be halted immediately, they might be kicked later
; by platform code right before passing control to the Linux kernel
; in bootm.c:boot_jump_linux().
lr r5, [identity]
lsr r5, r5, 8
bmsk r5, r5, 7
cmp r5, 0
mov.nz r0, r5
bz .Lmaster_proceed
flag 1
nop
nop
nop
.Lmaster_proceed:
#endif
/* Setup interrupt vector base that matches "__text_start" */
sr __ivt_start, [ARC_AUX_INTR_VEC_BASE]
@@ -44,6 +23,14 @@ ENTRY(_start)
#endif
sr r5, [ARC_AUX_IC_CTRL]
mov r5, 1
sr r5, [ARC_AUX_IC_IVIC]
; As per ARC HS databook (see chapter 5.3.3.2)
; it is required to add 3 NOPs after each write to IC_IVIC.
nop
nop
nop
1:
; Disable/enable D-cache according to configuration
lr r5, [ARC_BCR_DC_BUILD]
@@ -57,6 +44,10 @@ ENTRY(_start)
#endif
sr r5, [ARC_AUX_DC_CTRL]
mov r5, 1
sr r5, [ARC_AUX_DC_IVDC]
1:
#ifdef CONFIG_ISA_ARCV2
; Disable System-Level Cache (SLC)
@@ -70,6 +61,15 @@ ENTRY(_start)
1:
#endif
#ifdef __ARC_UNALIGNED__
/*
* Enable handling of unaligned access in the CPU as by default
* this HW feature is disabled while GCC starting from 8.1.0
* unconditionally uses it for ARC HS cores.
*/
flag 1 << STATUS_AD_BIT
#endif
/* Establish C runtime stack and frame */
mov %sp, CONFIG_SYS_INIT_SP_ADDR
mov %fp, %sp
@@ -84,9 +84,20 @@ ENTRY(_start)
/* Initialize reserved area - note: r0 already contains address */
bl board_init_f_init_reserve
#ifdef CONFIG_DEBUG_UART
/* Earliest point to set up early debug uart */
bl debug_uart_init
#endif
/* Zero the one and only argument of "board_init_f" */
mov_s %r0, 0
j board_init_f
bl board_init_f
/* We only get here if relocation is disabled by GD_FLG_SKIP_RELOC */
/* Make sure we don't lose GD overwritten by zero new GD */
mov %r0, %r25
mov %r1, 0
bl board_init_r
ENDPROC(_start)
/*

View File

@@ -1,141 +0,0 @@
/*
* Copyright (C) 2004, 2007-2010, 2011-2014 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
/*
* ARC700 has a relatively long pipeline and branch prediction, so we want
* to avoid branches that are hard to predict. On the other hand, the
* presence of the norm instruction makes it easier to operate on whole
* words branch-free.
*/
.global strchr
.align 4
strchr:
extb_s %r1, %r1
asl %r5, %r1, 8
bmsk %r2, %r0, 1
or %r5, %r5, %r1
mov_s %r3, 0x01010101
breq.d %r2, %r0, .Laligned
asl %r4, %r5, 16
sub_s %r0, %r0, %r2
asl %r7, %r2, 3
ld_s %r2, [%r0]
#ifdef __LITTLE_ENDIAN__
asl %r7, %r3, %r7
#else /* __BIG_ENDIAN__ */
lsr %r7, %r3, %r7
#endif /* _ENDIAN__ */
or %r5, %r5, %r4
ror %r4, %r3
sub %r12, %r2, %r7
bic_s %r12, %r12, %r2
and %r12, %r12, %r4
brne.d %r12, 0, .Lfound0_ua
xor %r6, %r2, %r5
ld.a %r2, [%r0, 4]
sub %r12, %r6, %r7
bic %r12, %r12, %r6
#ifdef __LITTLE_ENDIAN__
and %r7, %r12, %r4
/* For speed, we want this branch to be unaligned. */
breq %r7, 0, .Loop
/* Likewise this one */
b .Lfound_char
#else /* __BIG_ENDIAN__ */
and %r12, %r12, %r4
/* For speed, we want this branch to be unaligned. */
breq %r12, 0, .Loop
lsr_s %r12, %r12, 7
bic %r2, %r7, %r6
b.d .Lfound_char_b
and_s %r2, %r2, %r12
#endif /* _ENDIAN__ */
/* We require this code address to be unaligned for speed... */
.Laligned:
ld_s %r2, [%r0]
or %r5, %r5, %r4
ror %r4, %r3
/* ... so that this code address is aligned, for itself and ... */
.Loop:
sub %r12, %r2, %r3
bic_s %r12, %r12, %r2
and %r12, %r12, %r4
brne.d %r12, 0, .Lfound0
xor %r6, %r2, %r5
ld.a %r2, [%r0, 4]
sub %r12, %r6, %r3
bic %r12, %r12, %r6
and %r7, %r12, %r4
breq %r7, 0, .Loop
/*
*... so that this branch is unaligned.
* Found searched-for character.
* r0 has already advanced to next word.
*/
#ifdef __LITTLE_ENDIAN__
/*
* We only need the information about the first matching byte
* (i.e. the least significant matching byte) to be exact,
* hence there is no problem with carry effects.
*/
.Lfound_char:
sub %r3, %r7, 1
bic %r3, %r3, %r7
norm %r2, %r3
sub_s %r0, %r0, 1
asr_s %r2, %r2, 3
j.d [%blink]
sub_s %r0, %r0, %r2
.balign 4
.Lfound0_ua:
mov %r3, %r7
.Lfound0:
sub %r3, %r6, %r3
bic %r3, %r3, %r6
and %r2, %r3, %r4
or_s %r12, %r12, %r2
sub_s %r3, %r12, 1
bic_s %r3, %r3, %r12
norm %r3, %r3
add_s %r0, %r0, 3
asr_s %r12, %r3, 3
asl.f 0, %r2, %r3
sub_s %r0, %r0, %r12
j_s.d [%blink]
mov.pl %r0, 0
#else /* __BIG_ENDIAN__ */
.Lfound_char:
lsr %r7, %r7, 7
bic %r2, %r7, %r6
.Lfound_char_b:
norm %r2, %r2
sub_s %r0, %r0, 4
asr_s %r2, %r2, 3
j.d [%blink]
add_s %r0, %r0, %r2
.Lfound0_ua:
mov_s %r3, %r7
.Lfound0:
asl_s %r2, %r2, 7
or %r7, %r6, %r4
bic_s %r12, %r12, %r2
sub %r2, %r7, %r3
or %r2, %r2, %r6
bic %r12, %r2, %r12
bic.f %r3, %r4, %r12
norm %r3, %r3
add.pl %r3, %r3, 1
asr_s %r12, %r3, 3
asl.f 0, %r2, %r3
add_s %r0, %r0, %r12
j_s.d [%blink]
mov.mi %r0, 0
#endif /* _ENDIAN__ */

View File

@@ -1,97 +0,0 @@
/*
* Copyright (C) 2004, 2007-2010, 2011-2014 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
/*
* This is optimized primarily for the ARC700.
* It would be possible to speed up the loops by one cycle / word
* respective one cycle / byte by forcing double source 1 alignment, unrolling
* by a factor of two, and speculatively loading the second word / byte of
* source 1; however, that would increase the overhead for loop setup / finish,
* and strcmp might often terminate early.
*/
.global strcmp
.align 4
strcmp:
or %r2, %r0, %r1
bmsk_s %r2, %r2, 1
brne %r2, 0, .Lcharloop
mov_s %r12, 0x01010101
ror %r5, %r12
.Lwordloop:
ld.ab %r2, [%r0, 4]
ld.ab %r3, [%r1, 4]
nop_s
sub %r4, %r2, %r12
bic %r4, %r4, %r2
and %r4, %r4, %r5
brne %r4, 0, .Lfound0
breq %r2 ,%r3, .Lwordloop
#ifdef __LITTLE_ENDIAN__
xor %r0, %r2, %r3 /* mask for difference */
sub_s %r1, %r0, 1
bic_s %r0, %r0, %r1 /* mask for least significant difference bit */
sub %r1, %r5, %r0
xor %r0, %r5, %r1 /* mask for least significant difference byte */
and_s %r2, %r2, %r0
and_s %r3, %r3, %r0
#endif /* _ENDIAN__ */
cmp_s %r2, %r3
mov_s %r0, 1
j_s.d [%blink]
bset.lo %r0, %r0, 31
.balign 4
#ifdef __LITTLE_ENDIAN__
.Lfound0:
xor %r0, %r2, %r3 /* mask for difference */
or %r0, %r0, %r4 /* or in zero indicator */
sub_s %r1, %r0, 1
bic_s %r0, %r0, %r1 /* mask for least significant difference bit */
sub %r1, %r5, %r0
xor %r0, %r5, %r1 /* mask for least significant difference byte */
and_s %r2, %r2, %r0
and_s %r3, %r3, %r0
sub.f %r0, %r2, %r3
mov.hi %r0, 1
j_s.d [%blink]
bset.lo %r0, %r0, 31
#else /* __BIG_ENDIAN__ */
/*
* The zero-detection above can mis-detect 0x01 bytes as zeroes
* because of carry-propagateion from a lower significant zero byte.
* We can compensate for this by checking that bit0 is zero.
* This compensation is not necessary in the step where we
* get a low estimate for r2, because in any affected bytes
* we already have 0x00 or 0x01, which will remain unchanged
* when bit 7 is cleared.
*/
.balign 4
.Lfound0:
lsr %r0, %r4, 8
lsr_s %r1, %r2
bic_s %r2, %r2, %r0 /* get low estimate for r2 and get ... */
bic_s %r0, %r0, %r1 /* <this is the adjusted mask for zeros> */
or_s %r3, %r3, %r0 /* ... high estimate r3 so that r2 > r3 will */
cmp_s %r3, %r2 /* ... be independent of trailing garbage */
or_s %r2, %r2, %r0 /* likewise for r3 > r2 */
bic_s %r3, %r3, %r0
rlc %r0, 0 /* r0 := r2 > r3 ? 1 : 0 */
cmp_s %r2, %r3
j_s.d [%blink]
bset.lo %r0, %r0, 31
#endif /* _ENDIAN__ */
.balign 4
.Lcharloop:
ldb.ab %r2,[%r0,1]
ldb.ab %r3,[%r1,1]
nop_s
breq %r2, 0, .Lcmpend
breq %r2, %r3, .Lcharloop
.Lcmpend:
j_s.d [%blink]
sub %r0, %r2, %r3

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