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287 Commits

Author SHA1 Message Date
Tom Rini
f95ab1fb6e Prepare v2018.03
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-03-13 08:02:19 -04:00
Bryan O'Donoghue
ca89df7dd4 imx: hab: Convert DCD non-NULL error to warning
commit 8c4037a09a ("imx: hab: Ensure the IVT DCD pointer is Null prior
to calling HAB authenticate function.") makes the DCD field being NULL a
dependency.

This change though will break loading and executing of existing pre-signed
binaries on a u-boot update i.e. if this change is deployed on a board you
will be forced to redo all images on that board to NULL out the DCD.

There is no prior guidance from NXP that the DCD must be NULL similarly
public guidance on usage of the HAB doesn't call out this NULL dependency
(see boundary devices link).

Since later SoCs will reject a non-NULL DCD there's no reason to make a
NULL DCD a requirement, however if there is an actual dependency for later
SoCs the appropriate fix would be to do SoC version checking.

Earlier SoCs are capable (and happy) to authenticate images with non-NULL
DCDs, we should not be forcing this change on downstream users -
particularly if it means those users now must rewrite their build systems
and/or redeploy signed images in the field.

Fixes: 8c4037a09a ("imx: hab: Ensure the IVT DCD pointer is Null prior
to calling HAB authenticate function.")

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Utkarsh Gupta <utkarsh.gupta@nxp.com>
Cc: Breno Lima <breno.lima@nxp.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Link: https://boundarydevices.com/high-assurance-boot-hab-dummies
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-03-13 07:51:32 -04:00
Breno Lima
6d7403bf72 doc: mxc_hab: Update i.MX HAB documentation
The README.mxc_hab is outdated and need improvements, add the following
modifications:

- Reorganize document and remove duplicate content
- Add CST download link
- Update CST package name
- Align command lines with CST v2.3.3
- Update U-Boot binary name
- Remove CSF padding since is not documented in AN4581

Signed-off-by: Breno Lima <breno.lima@nxp.com>
2018-03-11 16:00:21 +01:00
Breno Lima
b887f0a68e doc: mxc_hab: Move HAB related info to the appropriate doc
Currently the High Assurance Boot procedure is documented in two
places:

- doc/README.imx6
- doc/README.mxc_hab

It is better to consolidate all HAB related information into
README.mxc_hab file, so move the content from README.imx6 to
README.mxc_hab.

Signed-off-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-03-11 16:00:16 +01:00
Bryan O'Donoghue
f0d5bd4ba5 imx: hab: Make usage of packed attribute consistent
commit cd2d46003c ("arm: imx: hab: Add IVT header definitions") declares
struct ivt_header as "__attribute__((packed))".

commit ed286bc80e ("imx: hab: Check if CSF is valid before
authenticating image") declares struct hab_hdr with __packed.

This patch makes the __packed convention consistent.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Utkarsh Gupta <utkarsh.gupta@nxp.com>
Cc: Breno Lima <breno.lima@nxp.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-03-11 16:00:00 +01:00
Bryan O'Donoghue
ffab61f4aa imx: hab: Fix usage of packed attribute
commit ed286bc80e ("imx: hab: Check if CSF is valid before authenticating
image") makes use of "__packed" as a prefix to the "struct hab_hdr"
declaration.

With my compiler "gcc version 7.2.1 20171011 (Linaro GCC 7.2-2017.11)" we
get:

./arch/arm/include/asm/mach-imx/hab.h:42:25: error: expected ‘=’, ‘,’, ‘;’,
‘asm’ or ‘__attribute__’ before ‘{’ token
 struct __packed hab_hdr {

Fix this problem by including <linux/compiler.h>

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Utkarsh Gupta <utkarsh.gupta@nxp.com>
Cc: Breno Lima <breno.lima@nxp.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-03-11 15:59:51 +01:00
Jagan Teki
2b0bc47661 ARM: dts: imx6dl-icore-rqs: Fix to include correct dtsi
This patch fixes the wrongly included dtsi file which was
breaking mainline support for Engicam i.CoreM6 DualLite/Solo RQS.

Linux commit details for the same change as
"ARM: dts: imx6dl: Include correct dtsi file for Engicam i.CoreM6
DualLite/Solo RQS"
(sha1: c0c6bb2322964bd264b4ddedaa5776f40c709f0c)

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-03-11 15:59:43 +01:00
Jagan Teki
85e1f6be03 ARM: dts: imx6qdl-icore-rqs: Sync usdhc4 node from Linux
usdhc4 node need to update pinctrl, bus-width and non-removable
properties, sync the same from Linux.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-03-11 15:59:34 +01:00
Tom Rini
2e5c42c630 Merge git://git.denx.de/u-boot-imx 2018-03-09 13:29:58 -05:00
Tom Rini
48ba1f3c38 configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-03-09 12:31:08 -05:00
Stefan Theil
63f881d46a tools/mkimage: Use proper output parameter in dtc-system call
The system call used by mkimage to run dtc redirects stdout to a
temporary file. This can cause problems on Windows (with a MinGW
cross-compiled version). Using the "-o" dtc parameter avoids
this problem.

Signed-off-by: Stefan Theil <stefan.theil@mixed-mode.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-03-09 12:31:07 -05:00
Marek Behún
51be471663 fs: ext4: Do not print mount fail message when not ext4 filesystem
Other filesystem drivers don't do this.

Signed-off-by: Marek Behun <marek.behun@nic.cz>
2018-03-09 12:31:07 -05:00
Heinrich Schuchardt
b7d6e0abab MAINTAINERS: bring sections into alphabetic order
NETWORK should be after NAND_FLASH.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-03-09 12:31:07 -05:00
Heinrich Schuchardt
4320e2fda4 scripts/coccinelle: add some more coccinelle tests
kmerr: verify that malloc and calloc are followed by a check to verify
that we are not out of memory.

badzero: Compare pointer-typed values to NULL rather than 0

Both checks are copied from the Linux kernel archive.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-03-09 12:31:07 -05:00
Heinrich Schuchardt
428e60e079 yaffs2: iterator variable cannot be NULL
The iterator of list_for_each() is never NULL.

Identified with coccinelle.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-03-09 12:31:06 -05:00
Alexander Graf
c9bf43dd9d bcm283x_pl011: Flush RX queue after setting baud rate
After the UART was initialized, we may still have bogus data in the
RX queue if it was enabled with incorrect pin muxing before.

So let's flush the RX queue whenever we initialize baud rates.

This fixes a regression with the dynamic pinmuxing code when enable_uart=1
is not set in config.txt on Raspberry Pis that use pl011 for serial.

Fixes: caf2233b28 ("bcm283x: Add pinctrl driver")
Reported-by: Göran Lundberg <goran@lundberg.email>
Reported-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
Tested-by: Tuomas Tynkkynen <tuomas@tuxera.com>
2018-03-09 12:31:04 -05:00
Alexander Graf
293b9814d7 serial_bcm283x_mu: Flush RX queue after setting baud rate
After the UART was initialized, we may still have bogus data in the
RX queue if it was enabled with incorrect pin muxing before.

So let's flush the RX queue whenever we initialize baud rates.

This fixes a regression with the dynamic pinmuxing code when enable_uart=1
is not set in config.txt.

Fixes: caf2233b28 ("bcm283x: Add pinctrl driver")
Reported-by: Göran Lundberg <goran@lundberg.email>
Reported-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
Tested-by: Tuomas Tynkkynen <tuomas@tuxera.com>
2018-03-09 12:26:47 -05:00
Tuomas Tynkkynen
b996b7d426 ARM: Drop unreferenced CONFIG_* defines named after boards
The following config symbols are only defined once and never referenced
anywhere else:

CONFIG_AT91SAM9263EK
CONFIG_AT91SAM9RLEK
CONFIG_BARIX_IPAM390
CONFIG_BOARD_H2200
CONFIG_EP9301
CONFIG_KZM_A9_GT
CONFIG_PICOSAM
CONFIG_PLATINUM_PICON
CONFIG_PLATINUM_TITANIUM
CONFIG_PM9261
CONFIG_PM9263
CONFIG_PM9G45
CONFIG_SIEMENS_DRACO
CONFIG_SIEMENS_PXM2
CONFIG_SIEMENS_RUT
CONFIG_SMDKC100
CONFIG_SMDKV310
CONFIG_STM32F4DISCOVERY

Most of them are config symbols named after the respective boards which
seems to have been a standard practice at some point.

Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
2018-03-09 09:23:10 -05:00
Tuomas Tynkkynen
17796171be ARM: Drop unreferenced CONFIG_* defines named after SoCs
The following config symbols are only defined once and never referenced
anywhere else:

CONFIG_ARM926EJS
CONFIG_CPUAT91
CONFIG_EXYNOS5800
CONFIG_SYS_CORTEX_R4

Most of them are config symbols named after the respective SoCs which
seems to have been a standard practice at some point.

Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
2018-03-09 09:23:10 -05:00
Tuomas Tynkkynen
c604f47a80 MIPS: Drop unreferenced CONFIG_* defines
The following config symbols are only defined once and never referenced
anywhere else:

CONFIG_DBAU1X00
CONFIG_PB1X00

Most of them are config symbols named after the respective boards which
seems to have been a standard practice at some point.

Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
2018-03-09 09:23:10 -05:00
Mario Six
d38826a3dc treewide: Fix gdsys mail addresses
The @gdsys.cc addresses are supposed to be used for mailing lists.
Switch all occurrences of @gdsys.de mail addresses to their @gdsys.cc
equivalent.

Also, Dirk's address was wrong in one place; fix that as well.

Signed-off-by: Mario Six <six@gdsys.cc>
2018-03-09 09:23:10 -05:00
Tuomas Tynkkynen
b771f0b126 ARM: qemu-arm: Increase CONFIG_SYS_CBSIZE
CONFIG_SYS_CBSIZE determines the maximum length of the kernel command
line, and the default value of 256 is too small for booting some Linux
images in the wild.

Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
2018-03-09 09:23:10 -05:00
Yasushi SHOJI
314d9f7e3e imx: syscounter: make sure asm is volatile
Without the volatile attribute, compilers are entitled to optimize out
the same asm().  In the case of __udelay() in syscounter.c, it calls
`get_ticks()` twice, one for the starting time and the second in the
loop to check the current time.  When compilers inline `get_ticks()`
they see the same `mrrc` instructions and optimize out the second one.
This leads to infinite loop since we don't get updated value from the
system counter.

Here is a portion of the disassembly of __udelay:

  88:	428b      	cmp	r3, r1
  8a:	f8ce 20a4 	str.w	r2, [lr, #164]	; 0xa4
  8e:	bf08      	it	eq
  90:	4282      	cmpeq	r2, r0
  92:	f8ce 30a0 	str.w	r3, [lr, #160]	; 0xa0
  96:	d3f7      	bcc.n	88 <__udelay+0x88>
  98:	e8bd 8cf0 	ldmia.w	sp!, {r4, r5, r6, r7, sl, fp, pc}

Note that final jump / loop at 96 to 88, we don't have any `mrrc`.

With a volatile attribute, the above changes to this:

  8a:	ec53 2f0e 	mrrc	15, 0, r2, r3, cr14
  8e:	42ab      	cmp	r3, r5
  90:	f8c1 20a4 	str.w	r2, [r1, #164]	; 0xa4
  94:	bf08      	it	eq
  96:	42a2      	cmpeq	r2, r4
  98:	f8c1 30a0 	str.w	r3, [r1, #160]	; 0xa0
  9c:	d3f5      	bcc.n	8a <__udelay+0x8a>
  9e:	e8bd 8cf0 	ldmia.w	sp!, {r4, r5, r6, r7, sl, fp, pc}
  a2:	bf00      	nop

I'm advised[1] to put volatile on all asm(), so this commit also adds it
to the asm() in timer_init().

[1]: https://lists.denx.de/pipermail/u-boot/2018-March/322062.html

Signed-off-by: Yasushi SHOJI <yasushi.shoji@gmail.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-03-09 13:06:14 +01:00
Fabio Estevam
b5b0e4e351 imximage: Remove failure when no IVT offset is found
Sometimes imximage throws the following error:

  CFGS    board/freescale/vf610twr/imximage.cfg.cfgtmp
  CFGS    board/freescale/vf610twr/imximage.cfg.cfgtmp
  MKIMAGE u-boot-dtb.imx
Error: No BOOT_FROM tag in board/freescale/vf610twr/imximage.cfg.cfgtmp
arch/arm/mach-imx/Makefile💯 recipe for target 'u-boot-dtb.imx' failed

Later on, when running mkimage for the u-boot.imx it will succeed in
finding the IVT offset.

Looks like some race condition happening during parallel build when
processing mkimage for u-boot-dtb.imx and u-boot.imx.

A proper fix still needs to be implemented, but as a workaround let's
remove the error when the IVT offset is not found.

It is useful to have such message, especially during bring-up phase,
but the build error that it causes is severe, so better avoid the
build error for now.

The error checking can be re-implemented later when we have a proper
fix.

Reported-by: Breno Lima <breno.lima@nxp.com>
Reported-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-03-09 13:04:02 +01:00
Tom Rini
5e62f82825 Prepare v2018.03-rc4
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-03-05 20:27:08 -05:00
Tom Rini
81f077f40f Merge git://git.denx.de/u-boot-sh 2018-03-05 20:24:17 -05:00
Tom Rini
3cbd5ff18d Devboards.de DBM-SoC1 BOARD: Add S line
This was missing the 'S' line causing a warning from genboardscfg.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-03-05 10:20:46 -05:00
Adam Ford
7f586d6fc4 ARM: DTS: Re-sync logicpd-som-lv with Linux 4.16-rc3
This should clean up a warning about a missing phy-cells

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-03-05 10:16:30 -05:00
Heinrich Schuchardt
4ef17f9cbe MAINTAINERS: bring sections into alphabetic order
POWER should be after ONENAND

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-03-05 10:16:30 -05:00
Fabio Estevam
7c0764b436 scripts/spelling.txt: Sync script with kernel 4.16-rc4
Keep spelling.txt in sync with the version from kernel 4.16-rc4.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-03-05 10:16:30 -05:00
Adam Ford
61ec4e0742 omap3_logic: Remove unnecessary undefs
Due to evolution of the MMC driver and better support, let's
remove unnecessary undefs.

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-03-05 10:16:29 -05:00
Adam Ford
24c9309254 ti_armv7_omap: Remove comment remnant
With the migration to Kconfig, the I2C block no longer exists in here.
Let's clean up the comment.

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-03-05 10:16:29 -05:00
Ed Bartosh
1bb34c8b89 MPC8315ERDB: Enable DHCP support
Enable DHCP support for this board.

Signed-off-by: Ed Bartosh <ed.bartosh@linux.intel.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-03-05 10:16:29 -05:00
Masahiro Yamada
b08c8c4870 libfdt: move headers to <linux/libfdt.h> and <linux/libfdt_env.h>
Thomas reported U-Boot failed to build host tools if libfdt-devel
package is installed because tools include libfdt headers from
/usr/include/ instead of using internal ones.

This commit moves the header code:
  include/libfdt.h         -> include/linux/libfdt.h
  include/libfdt_env.h     -> include/linux/libfdt_env.h

and replaces include directives:
  #include <libfdt.h>      -> #include <linux/libfdt.h>
  #include <libfdt_env.h>  -> #include <linux/libfdt_env.h>

Reported-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-03-05 10:16:28 -05:00
Paul Kocialkowski
e0d20dc152 tools: Include U-Boot libfdt headers from their actual path
There are no headers for libfdt in lib/libfdt, as they are instead
located in scripts/dtc/libfdt. Specifying lib/libfdt for headers
inclusion in host tools results in using the system libfdt headers,
which is not what we want. Change this to the proper path.

Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
2018-03-05 10:16:28 -05:00
Heinrich Schuchardt
a84f559262 input: indicate that code page 437 is used
Add a comment indicating that the German key map assumes code page 437.

Add support for character ² (square sign) in the German key map.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-03-05 10:06:05 -05:00
Marek Behún
de2069c761 pinctrl: Kconfig: Fix typo
Signed-off-by: Marek Behun <marek.behun@nic.cz>
2018-03-05 10:06:05 -05:00
Mario Six
1e5f89881a gpio: pca953x_gpio: Support label setting from DT
The PCA953x driver uses "gpio@%x_" as the GPIO bank name, where "%x" is
instantiated with the I2C address of the chip. While this works, it
becomes very confusing if a board has multiple PCAs with the same
address on different I2C busses, and it also becomes an issue when a
GPIO's value is to be set via the 'gpio' command, because this command
only ever sets the value of the first device it encounters, leaving the
other devices inaccessible to the command.

As to not break boards that rely on this naming scheme, we introduce a
new device tree string property "label" for the driver. If it exists, it
is used to build a bank name of the form "%s@%x_" (where %x is still
instantiated with the I2C address). If it does not exist, the legacy
labeling scheme is used.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-03-05 10:06:05 -05:00
Faiz Abbas
b432b1ebdf spl: Kconfig: Rename SPL_USBETH_SUPPORT to SPL_USB_ETHER to match with the U-boot CONFIG
Rename CONFIG_SPL_USBETH_SUPPORT to CONFIG_SPL_USB_ETHER.

This enables users to block text using CONFIG_IS_ENABLED() instead
of resorting to #if ladders with SPL and non-SPL cases.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
2018-03-05 10:06:05 -05:00
Stefan Agner
cd655514aa tools/env: allow equal sign as key value separation
Treat the first equal sign as a key/value separation too. This makes
the script files compatible with mkenvimage input file format. It
won't support variables with equal signs anymore, but this seems not
really like a loss.

Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
2018-03-05 10:05:36 -05:00
Jeremy Boone
b3f4070340 Atmel TPM: Fix potential buffer overruns
Ensure that the Atmel TPM driver performs sufficient
validation of the length returned in the TPM response header.
This patch prevents memory corruption if the header contains a
length value that is larger than the destination buffer.

Signed-off-by: Jeremy Boone <jeremy.boone@nccgroup.trust>
2018-03-05 10:05:36 -05:00
Jeremy Boone
afe0e6bddf Infineon TPM: Fix potential buffer overruns
Ensure that the Infineon I2C and SPI TPM driver performs adequate
validation of the length extracted from the TPM response header.
This patch prevents integer underflow when the length was too small,
which could lead to memory corruption.

Signed-off-by: Jeremy Boone <jeremy.boone@nccgroup.trust>
2018-03-05 10:05:36 -05:00
Jeremy Boone
12e0ab327d STMicro TPM: Fix potential buffer overruns
This patch prevents integer underflow when the length was too small,
which could lead to memory corruption.

Signed-off-by: Jeremy Boone <jeremy.boone@nccgroup.trust>
2018-03-05 10:05:36 -05:00
Marek Vasut
b2c38dc3d3 ARM: dts: rmobile: Add PHY reset GPIO
This patch got dropped during the update of DTs to 4.14, re-add it
back. This adds reset GPIOs to the ethernet PHYs.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-03-05 11:48:53 +01:00
Marek Vasut
33ba5b3d1d ARM: dts: rmobile: Make PFC and RST available early on Gen2 only
These do not need to be available early on Gen3 , so move them to
the respective DT files.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-03-05 10:59:41 +01:00
Marek Vasut
60299e0d4e ARM: rmobile: Add R8A77965 Salvator-XS board support
Add R8A77965 M3N Salvator-XS development kit support. This kit is
similar to the other Salvator-X(S) ones, except is has M3N SoC on
it.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-03-05 10:59:38 +01:00
Marek Vasut
89fcfd1f58 ARM: dts: rmobile: Add SDHI nodes to R8A77965 M3N DT
Add SDHI nodes to r8a77965.dtsi to get eMMC and SD slots operational.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-03-05 10:59:38 +01:00
Marek Vasut
4610343950 ARM: dts: rmobile: Add xHCI node to R8A77965 M3N DT
Add xHCI node to r8a77965.dtsi to get xHCI USB operational.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-03-05 10:59:38 +01:00
Marek Vasut
cce09d2676 ARM: dts: rmobile: Add EHCI nodes to R8A77965 M3N DT
Add generic EHCI nodes to r8a77965.dtsi to get EHCI USB operational.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-03-05 10:59:38 +01:00
Marek Vasut
beb84f921a ARM: dts: rmobile: Add RAVB node to R8A77965 M3N DT
Add RAVB node to r8a77965.dtsi to get ethernet operational.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-03-05 10:59:38 +01:00
Marek Vasut
50e031efa4 ARM: dts: rmobile: Import R8A77965 M3N DT files from Linux
Import the R8A77965 M3N DT from Linux 4.16-rc1 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-03-05 10:59:38 +01:00
Marek Vasut
4f0533ffcd usb: xhci-rcar: Add R8A77965 M3N entries
Add entries for the R8A77965 M3N SoC.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-03-05 10:59:38 +01:00
Marek Vasut
d1fe3182fa pinctrl: rmobile: Add R8A77965 M3N entries
Add entries for the R8A77965 M3N SoC.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-03-05 10:59:38 +01:00
Marek Vasut
7a7081e6f3 net: ravb: Add R8A77965 M3N entries
Add entries for the R8A77965 M3N SoC.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2018-03-05 10:59:37 +01:00
Marek Vasut
d6eb25c2f1 mmc: uniphier-sd: Add R8A77965 M3N entries
Add entries for the R8A77965 M3N SoC.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-03-05 10:59:37 +01:00
Marek Vasut
76ed8f0542 gpio: rcar: Add R8A77965 M3N entries
Add entries for the R8A77965 M3N SoC.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-03-05 10:59:37 +01:00
Marek Vasut
c6d99986f0 clk: renesas: Add R8A77965 M3N entries
Add entries for the R8A77965 M3N SoC.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-03-05 10:59:37 +01:00
Marek Vasut
f295a5697e ARM: rmobile: Add R8A77965 M3N IDs
Add CPU and PRR IDs for R8A77965 M3N SoC.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-03-05 10:59:37 +01:00
Tom Rini
77bba970e2 Merge branch 'master' of git://git.denx.de/u-boot-socfpga 2018-03-01 15:50:52 -05:00
Tom Rini
e1541b1d7f Merge branch 'master' of git://git.denx.de/u-boot-sh 2018-03-01 15:50:43 -05:00
Tom Rini
6256b02db3 Merge tag 'xilinx-kconfig-for-v2018.03' of git://www.denx.de/git/u-boot-microblaze
Xilinx Kconfig changes for v2018.03

- Moving some macros to Kconfig

# gpg: Signature made Thu 01 Mar 2018 10:45:58 AM EST using DSA key ID 294A0C21
# gpg: Good signature from "Michal Simek <monstr@monstr.eu>"
# gpg:                 aka "Michal Simek (Xilinx) <michals@xilinx.com>"
# gpg:                 aka "Michal Simek (Xilinx) <michal.simek@xilinx.com>"
2018-03-01 12:41:21 -05:00
Vipul Kumar
3ccc207a30 mmc: Added Kconfig support for CONFIG_ZYNQ_SDHCI_MIN_FREQ
This patch added Kconfig support for CONFIG_ZYNQ_SDHCI_MIN_FREQ
and enabled it in respective defconfig.

Signed-off-by: Vipul Kumar <vipulk@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-01 16:44:10 +01:00
Vipul Kumar
5dc5a53c5e mmc: Added Kconfig support for CONFIG_ZYNQ_SDHCI_MAX_FREQ
This patch added Kconfig support for CONFIG_ZYNQ_SDHCI_MAX_FREQ
and enabled it in respective defconfig.

Signed-off-by: Vipul Kumar <vipulk@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-01 16:44:10 +01:00
Vipul Kumar
71d5a14204 microblaze: Added Kconfig support for CONFIG_XILINX_GPIO
This patch added Kconfig support for CONFIG_XILINX_GPIO
and enabled it in respective defconfig.

Signed-off-by: Vipul Kumar <vipulk@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-01 15:43:45 +01:00
Vipul Kumar
e885b4255f i2c: Added kconfig support for CONFIG_ZYNQ_I2C0 and CONFIG_ZYNQ_I2C1
This patch added Kconfig support for CONFIG_ZYNQ_I2C0 and
CONFIG_ZYNQ_I2C1 and enabled it in respective defconfig.

Signed-off-by: Vipul Kumar <vipulk@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-01 08:03:01 +01:00
Vipul Kumar
5c32de202b i2c: Added Kconfig support for CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET
This patch added Kconfig support for CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET
and enabled it in respective defconfig.

Signed-off-by: Vipul Kumar <vipulk@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-01 08:03:01 +01:00
Vipul Kumar
ce3c9a59af i2c: Added Kconfig support for CONFIG_SYS_I2C_ZYNQ_SPEED
This patch added Kconfig support for CONFIG_SYS_I2C_ZYNQ_SPEED
and set it to default value 100000.

Signed-off-by: Vipul Kumar <vipulk@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-01 08:03:01 +01:00
Vipul Kumar
e7affad190 i2c: Added Kconfig support for CONFIG_SYS_I2C_ZYNQ_SLAVE
This patch added Kconfig support for CONFIG_SYS_I2C_ZYNQ_SLAVE
and set it default to 0.

Signed-off-by: Vipul Kumar <vipulk@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-01 08:03:01 +01:00
Vipul Kumar
fc3a6f1c53 i2c: Enabled CONFIG_SYS_I2C_ZYNQ in the respective defconfig
This patch enabled CONFIG_SYS_I2C_ZYNQ in the respective
defconfig.

Signed-off-by: Vipul Kumar <vipulk@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-01 08:03:01 +01:00
Vipul Kumar
38a69e96b3 i2c: Added Kconfig support for CONFIG_SYS_I2C_ZYNQ
This patch added Kconfig support for CONFIG_SYS_I2C_ZYNQ.

Signed-off-by: Vipul Kumar <vipulk@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-01 08:03:00 +01:00
Vipul Kumar
3990c9d627 arm: zynq: fpga: Added Kconfig support for CONFIG_FPGA_ZYNQPL
This patch added Kconfig support for CONFIG_FPGA_ZYNQPL and migrates the
values over to the defconfigs.

Signed-off-by: Vipul Kumar <vipulk@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
2018-02-28 13:00:25 -05:00
Vipul Kumar
f415834608 fpga: Added Kconfig support for FPGA_SPARTAN3
This patch added Kconfig support for FPGA_SPARTAN3 and migrates the
values over to the defconfigs.

Signed-off-by: Vipul Kumar <vipulk@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
2018-02-28 13:00:04 -05:00
Tom Rini
d231182441 Merge git://git.denx.de/u-boot-net 2018-02-27 20:10:28 -05:00
Michal Simek
3b3ea2c56e Kconfig: cmd: Make networking command dependent on NET
Enable networking command only when NET is enabled.
And remove selecting NET for CMD_NET

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-02-27 16:25:30 -05:00
Marek Vasut
44c5580f1c ARM: rmobile: Build u-boot-spl.srec on Gen2
The u-boot-spl.srec is needed for the minimon update on Gen2 SoCs,
conveniently generate this file if SPL is enabled.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Tom Rini <trini@konsulko.com>
2018-02-27 21:05:35 +01:00
Marek Vasut
3ee58ea425 Makefile: add u-boot-spl.srec target
The u-boot-spl.srec is needed for some platforms, add target to generate this file.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Tom Rini <trini@konsulko.com>
2018-02-27 21:05:35 +01:00
Masaru Nagai
b691c9a668 ARM: rmobile: Build u-boot-elf.srec on Gen3
The u-boot-elf.srec is needed for the minimon update on Gen3 SoCs,
conveniently generate this file.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-02-27 21:05:35 +01:00
Masaru Nagai
341ca90560 Makefile: add u-boot-elf.srec target
The u-boot-elf.srec is needed for some platforms, add target to generate this file.

Signed-off-by: Masaru Nagai <masaru.nagai.vx@renesas.com>
Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-02-27 21:05:35 +01:00
Chin Liang See
92afd7ecf9 arm: socfpga: cyclone5: Enable Macronix flash support
Enable Macronix flash support for Cyclone5 SoC

Signed-off-by: Chin Liang See <chin.liang.see@intel.com>
2018-02-27 20:45:45 +01:00
Arno Steffens
a0fd381fc6 net: phy: smsc: Add SMSC LAN8741 support
Signed-off-by: Arno Steffens <star@gmx.li>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-02-26 15:51:37 -06:00
Bernhard Messerklinger
8f5672ea9d net: e1000: Fix e1000_igb semaphore handling
Fix commit f1bcad22dd ("net: e1000: add support for writing to
EEPROM").

Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-02-26 15:51:36 -06:00
Eugeniy Paltsev
1693a577be NET: designware: fix clock enable
After commit ba1f966725 ("net: designware: add clock support")
we got NET broken on axs101 and axs103 platforms.

Some clock don't support gating so their clock drivers don't
implement .enable/.disable callbacks. In such case clk_enable
returns -ENOSYS.
Also some clock drivers implement .enable/.disable callbacks not for all
clock IDs and return -ENOSYS (or -ENOTSUPP) for others.

If we have such clock in 'clocks' list of designware ethernet controller
node we fail to probe designware ethernet.

Fix it.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-02-26 15:49:26 -06:00
Mario Six
8d6312032e phy: Fix style violations
Fix some style violations in the generic PHY management code.

Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-02-26 15:48:55 -06:00
Mario Six
c550389881 cmd: mdio: Fix style violations
Fix some style violations in the MDIO command.

Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-02-26 15:47:43 -06:00
Mario Six
431be621c6 net: phy: marvell 88e151x: Fix handling of bare RGMII interface type
Commit 68e6ecadc5 ("net: phy: marvell 88e151x: Fix handling of RGMII
interface types") fixed the initialization of 88e151x phys, but made it
so that interfaces of type PHY_INTERFACE_MODE_RGMII had both RX and TX
delay bits cleared. The default (like in m88e1111s_config) is to have
both bits set.

Hence, this patch changes the behavior in the PHY_INTERFACE_MODE_RGMII
case so that both bits are set.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-02-26 15:47:07 -06:00
Mario Six
76f11d3adf net: phy: marvell: Fix style violations
Fix some style violations (mostly wrong indentions) in the Marvell PHY
driver.

Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-02-26 15:46:09 -06:00
Mario Six
1313aaf031 net: tsec: Make live-tree compatible
Make the tsec ethernet driver compatible with a live device tree.

Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-02-26 15:45:56 -06:00
Mario Six
5775f00e12 net: tsec: Fix memory leak in error path
tsec_initialize allocates a private driver structure using malloc.
Should the memory allocation of this private structure fail, the
function execution is aborted with a return 0, but the previously
allocated device structure is never freed, hence leaked.

Free the device structure in the error case.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-02-26 15:28:43 -06:00
Mario Six
d38de3380d net: tsec: Fix style violations
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-02-26 15:28:39 -06:00
Marek Vasut
2155a7981d ARM: dts: rmobile: Import proper DTS for H2 Stout
Replace the placeholder DTS for R8A7790 H2 Stout with a proper
DTS from Linux next .

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-02-26 20:00:01 +01:00
Marek Vasut
7fb464302e ARM: socfpga: Add new CycloneV SoC Devboards DBM-SoC1 board
Add support for a new boards from devboards.de , the DBM-SoC1 .
This board has one ethernet port, one USB OTG port and USB UART.

Signed-off-by: Marek Vasut <marex@denx.de>
2018-02-26 14:06:02 +01:00
Tom Rini
4bafceff0e Merge git://git.denx.de/u-boot-mmc 2018-02-25 22:28:59 -05:00
Jean-Jacques Hiblot
beac7d33d9 mmc: omap_hsmmc: use a default 52MHz max clock rate if none is specified
mmc_of_parse() doesn't set a default value if none is available in DT.
In that case, use a default 52MHz clock rate.

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Tested-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-02-26 10:52:15 +09:00
Jean-Jacques Hiblot
27a4b3bc4c mmc: omap_hsmmc: make it possible to compile out ADMA support
Some platforms don't have ADMA controllers. For those platforms, compiling
it out reduces the size of the binary by about 600 bytes.
Leaving the support in doesn't break things as the driver checks at runtime
if the ADMA2 controller is present.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Tested-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-02-26 10:52:15 +09:00
Jean-Jacques Hiblot
c7d08d80c3 mmc: omap_hsmmc: compile out write support if not needed
This reduces the size of the binary by about 196 bytes.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Tested-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-02-26 10:52:15 +09:00
Jean-Jacques Hiblot
45530e3943 mmc: omap_hsmmc: do not embed struct mmc in struct omap_hsmmc_plat
The area for struct mmc can be allocated dynamically. It greatly reduces
the size of struct omap_hsmmc_plat. This is useful in cases where the board
level code declares one or two struct omap_hsmmc_plat because it doesn't
use the Driver Model.

This saves around 740 bytes for the am335x_evm SPL.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Tested-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-02-26 10:52:15 +09:00
Tom Rini
85447f785c Merge git://git.denx.de/u-boot-rockchip 2018-02-25 15:39:10 -05:00
Tom Rini
e12546de54 Merge git://git.denx.de/u-boot-imx 2018-02-25 15:38:42 -05:00
Tom Rini
39bcbb7740 bootcount: Migrate CONFIG_SYS_BOOTCOUNT_ADDR
Migrate the users of CONFIG_SYS_BOOTCOUNT_ADDR to Kconfig.  We can
provide a default for BOOTCOUNT_AM33XX as that's a specific part of the
RTC in use.  We can also provide a default for ARCH_LS1043A and
ARCH_LS1021A as they had been previously calculated and their symbols
are in Kconfig.  In the case of other QE-enabled platforms, they are not
so we must update the relevant defconfig files.  The previous default
only applied in some cases, even on a specific SoC family.

Reviewed-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Alex Kiernan <alex.kiernan@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-02-25 13:41:54 -05:00
Fabio Estevam
0339086bd9 imx: spl: Partially revert "spl: eMMC/SD: Provide one __weak spl_boot_mode() function"
Commit d695d66278 ("spl: eMMC/SD: Provide one __weak spl_boot_mode()
function") breaks the boot on several i.MX6 boards,
such as cuboxi and wandboard:

U-Boot SPL 2018.03-rc1-00212-g48914fc119 (Feb 10 2018 - 11:04:33 +1300)
Trying to boot from MMC1
Failed to mount ext2 filesystem...
spl_load_image_ext: ext4fs mount err - 0

Partially revert it so that we can boot U-Boot again on these
i.MX6 platforms.

Reported-by: Jonathan Gray <jsg@jsg.id.au>
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Tested-by: Breno Lima <breno.lima@nxp.com>
2018-02-24 19:33:32 +01:00
Philipp Tomsich
434d5a00a4 rockchip: clk: rk3399: handle set_rate/get_rate for PLL_PPLL
The device-tree node for the PMU clk controller assigns to its parent
(i.e. PLL_PPLL) even though this clock currently is set up statically
by an init-function.

In order to avoid unexpected failures, a simple implementation of
set_rate (which accepts requests, but notifies the caller of the
preset frequency in its return value) and get_rate (which always
returns the preset frequency) are added.

Note that this is required for the RK808 PMIC to probe successfully on
the RK3399-Q7, following the support for the assigned-clocks property.

References: commit f4fcba5c5b ("clk: implement clk_set_defaults()")
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
2018-02-24 18:50:03 +01:00
Jagan Teki
33554fcec9 rockchip: rk3288: Fix wrong TPL_TEXT_BASE
TPL offset 0xff704004 is unaligned address which is adding nearest
8-bytes for next instruction, So  0xff704004 is adding 0x20 for
proper alignment which is causing the next instruction data
0xefffffff is moved.

Hexdump with overlaped bytes:
-----------------------------
0000000 0000 0000 0000 0000 0000 0000 0000 0000
0000010 0000 0000 0000 0000 0000 0000 ffff eaff

So, Fix the TEXT_BASE for proper aligned address 0xff704000

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-02-24 18:47:23 +01:00
Jagan Teki
849f672bdb rockchip: rk3288: Add TPL_LDSCRIPT
Due to size limitations in SPL by adding falcon mode,
rk3288 support TPL. In order to not overlap SPL_TEXT_BASE
add TPL_TEXT_BASE with u-boot-tpl.lds that intern call
u-boot-spl.lds with proper TEXT_BASE values.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-02-24 18:47:22 +01:00
Philipp Tomsich
35a69a3b01 rockchip: clk: rk3368: handle clk_enable requests for GMAC
Since commit ba1f966725 ("net: designware: add clock support"), the
designware GMAC driver enables all referenced clocks. While this is a
no-op for the RK3368 during boot-up (reset behaviour has all the clock
gates open anyway), we still need to handle the clock-ids passed in
the enable op of the clock-driver and return a success.

This change extends the RK3368 clk driver to:
(a) provide a enable op
(b) signals success to the caller when the clocks for the GMAC are
    enabled (no actual action is necessary as the gates are open
    after reset)

References: commit ba1f966725 ("net: designware: add clock support")
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
2018-02-24 18:46:45 +01:00
Philipp Tomsich
a9bdd67653 rockchip: clk: rk3399: handle clk_enable requests for GMAC
Since commit ba1f966725 ("net: designware: add clock support"), the
designware GMAC driver enables all referenced clocks. While this is a
no-op for the RK3399 during boot-up (reset behaviour has all the clock
gates open anyway), we still need to handle the clock-ids passed in
the enable op of the clock-driver and return a success.

This change extends the enable-op of the rk3399 clk driver to signal
success to the caller when the clocks for the GMAC are enabled.

References: commit ba1f966725 ("net: designware: add clock support")
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
2018-02-24 18:46:45 +01:00
Jagan Teki
520d822632 ARM: dts: i.MX6QDL: icore-rqs: Fix eMMC detection during SPL
usdhc4 has eMMC on icore-rqs boards, SPL is not detecting
it becuase of u-boot,dm-spl flag so add it to make eMMC working.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-02-24 17:19:09 +01:00
Alex Kiernan
e9a98ba312 Remove CONFIG_SYS_BOOTCOUNT_SINGLEWORD
Tidy up CONFIG_SYS_BOOTCOUNT_SINGLEWORD from the whitelist as there's
no remaining uses of it left.

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
2018-02-24 08:43:45 -05:00
Alex Kiernan
4bc4f8a67a Migrate CONFIG_BOOTCOUNT_ALEN to Kconfig
Convert CONFIG_BOOTCOUNT_ALEN to Kconfig
Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
2018-02-24 08:43:45 -05:00
Alex Kiernan
aa5a863283 Migrate generic bootcount to Kconfig
Make generate boot counter selected in the same way as other boot count
drivers

Reviewed-by: Lukasz Majewski <lukma@denx.de>
Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
2018-02-24 08:43:42 -05:00
Alex Kiernan
bec8c647bc Integrate AT91 bootcount driver
Integrate Boot counter for Atmel AT91SAM9XE into Kconfig

Reviewed-by: Lukasz Majewski <lukma@denx.de>
Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
2018-02-24 08:43:42 -05:00
Alex Kiernan
8981433f4d Convert CONFIG_BOOTCOUNT_EXT to Kconfig
This converts the following to Kconfig:
  CONFIG_BOOTCOUNT_EXT

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
2018-02-24 08:43:42 -05:00
Alex Kiernan
6cdd70eb52 Convert CONFIG_BOOTCOUNT_I2C to Kconfig
This converts the following to Kconfig:
  CONFIG_BOOTCOUNT_I2C

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
2018-02-24 08:43:42 -05:00
Alex Kiernan
ff5410d34b Convert CONFIG_BOOTCOUNT_RAM to Kconfig
This converts the following to Kconfig:
  CONFIG_BOOTCOUNT_RAM

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
2018-02-24 08:43:39 -05:00
Alex Kiernan
04c96ed2a6 Convert CONFIG_BOOTCOUNT_ENV to Kconfig
This converts the following to Kconfig:
  CONFIG_BOOTCOUNT_ENV

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
2018-02-24 08:43:36 -05:00
Alex Kiernan
c35e2d91a9 Convert CONFIG_BOOTCOUNT_AM33XX to Kconfig
This converts the following to Kconfig:
  CONFIG_BOOTCOUNT_AM33XX

Reviewed-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
Acked-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
2018-02-24 08:43:31 -05:00
Alex Kiernan
c1e1c1eca1 Prepare for multiple bootcount drivers
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
2018-02-24 08:43:11 -05:00
Alex Kiernan
3dccc10ee1 Merge CONFIG_BOOTCOUNT and CONFIG_BOOTCOUNT_LIMIT
CONFIG_BOOTCOUNT was only used in mx53ppd, merge it with
CONFIG_BOOTCOUNT_LIMIT

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Ian Ray <ian.ray@ge.com>
2018-02-24 08:43:11 -05:00
Tom Rini
0bb430c849 Merge git://git.denx.de/u-boot-video 2018-02-24 08:02:17 -05:00
Adam Ford
ba8bf9481b Remove config_distro_defaults.h
With the contents of config_distro_defaults.h migrated to Kconfig,
we can remove this header file completely

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-02-23 21:44:22 -05:00
Adam Ford
d021e94210 Convert CONFIG_BOOTP_BOOTPATH et al to Kconfig
This converts the following to Kconfig:
   CONFIG_BOOTP_BOOTPATH
   CONFIG_BOOTP_DNS
   CONFIG_BOOTP_GATEWAY
   CONFIG_BOOTP_HOSTNAME
   CONFIG_BOOTP_PXE
   CONFIG_BOOTP_SUBNETMASK
   CONFIG_CMDLINE_EDITING
   CONFIG_AUTO_COMPLETE
   CONFIG_SYS_LONGHELP
   CONFIG_SUPPORT_RAW_INITRD
   CONFIG_ENV_VARS_UBOOT_CONFIG

Signed-off-by: Adam Ford <aford173@gmail.com>
[trini: Re-run the migration]
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-02-23 21:41:49 -05:00
Philipp Tomsich
3f56552227 rockchip: video: update MAINTAINERS
The video drivers (VOP, HDMI encoder, LVDS encoder, MIPI encoder) for
Rockchip SOCs are self-contained and are mainly impacted by other
changes in the architecture support (e.g. pinctrl, clocking, etc).

Let's add these to the list of files maintained as part of the
Rockchip port.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
2018-02-23 20:49:07 +01:00
Philipp Tomsich
5de0b5a36a rockchip: video: rk_vop: migrate to livetree
This migrates rk_vop (the shared functions used by multiple VOP
mini-drivers) to be compatible with a live tree.

Unfortunately, there's
(i)  a lot of tree traversal needed for a VOP (as each active VOP
     vnode references back to the endpoints in the encoders and vice
     versa) to configure the connection between VOPs and encoders;
(ii) the DTS binding is not too sane and one needs to walk a node's
     parents (the original code just assumed that the device would
     live 3 levels above the property linked through a phandle) until
     a UCLASS_DISPLAY device can be found.

As part of the migration, the code for finding the enclosing display
device has been changed to not assume a specific depth of nesting
(i.e. we walk until we reach the root or find a matching device) and
to use the newly introduced (in the same series) ofnode_get_parent()
function.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
2018-02-23 20:48:48 +01:00
Philipp Tomsich
18e48776a6 rockchip: video: rk_hdmi: migrate to livetree
The rk_hdmi (shared functions for multiple HDMI mini-drivers) has been
using devfdt_get_addr() to read the HDMI controller's IO base address.
This will cause a failure with a live tree.

This changes the driver to use dev_read_addr() which is safe both for
flat trees and live trees.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
2018-02-23 20:48:31 +01:00
Kever Yang
b4f20767b1 core: add ofnode_get_by_phandle() api
We need to get ofnode from a phandle, add interface to support
both live dt and fdt.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-02-23 20:48:09 +01:00
Philipp Tomsich
e2d5997ffd core: ofnode: add ofnode_get_parent function
The Rockchip video drivers need to walk the ofnode-parrents to find
an enclosing device that has a UCLASS_DISPLAY driver bound.  This
adds a ofnode_get_parent()-function that returns the parent-node.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
2018-02-23 20:47:47 +01:00
Tom Rini
0c0eaee562 Merge git://git.denx.de/u-boot-sh 2018-02-23 13:05:03 -05:00
Tom Rini
1c124d379d Merge git://git.denx.de/u-boot-usb 2018-02-23 13:04:48 -05:00
Masahiro Yamada
9ab81fcc8a config_whitelist: remove false-positive CONFIG options
U-Boot pulled in several core makefiles from Linux.  The following
are not used in U-Boot:

  - CONFIG_DEBUG_SECTION_MISMATCH
  - CONFIG_FTRACE_MCOUNT_RECORD
  - CONFIG_GCOV_KERNEL
  - CONFIG_GCOV_PROFILE_ALL
  - CONFIG_KASAN
  - CONFIG_MODVERSIONS

We can remove the unused code if we like. (although it will get the
scripts out of sync)

CONFIG_BOOM and CONFIG_HIS_DRIVER are just mentioned in the comment
block of scripts/basic/fixdep.c

CONFIG_SHELL is not configuration, but a variable for internal-use.
It is just a historical misnomer in Kbuild.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-02-23 10:57:36 -05:00
Adam Ford
2a5945eee6 omap3_logic: Fix Environmental location
For the omap3_logic boards, the environment is always in NAND.
This removes the ENV_IS_IN_FAT flag to eliminate the extra chatter.

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-02-23 10:40:52 -05:00
Marek Vasut
0a84925974 sf: Add ISSI IS25LP256 entry
Add entry for ISSI IS25LP256 part.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Jagan Teki <jagan@openedev.com>
2018-02-23 10:40:52 -05:00
Alexey Brodkin
1022807c21 Makefile: Don't mess with .text section location for selected arches
Most of architectures have .text section situated in the very beginning
of U-Boot binary and thus it is very logical that CONFIG_SYS_TEXT_BASE
is used on final linkage step to specify where U-Boot gets linked to.

For that we pass the following construction to the LD:
---------------------------->8-----------------------
xxx-ld ...  -Ttext $(CONFIG_SYS_TEXT_BASE) ...
---------------------------->8-----------------------

But there could be exceptions. For example:
 1. In case of ARCv2 we want to put vectors table in its own section
    .ivt in front of .text section which means we need either add an
    offset to CONFIG_SYS_TEXT_BASE to compensate for .ivt or don't
    pass "-Ttext" to the LD at all and specify link base in linker
    script directly.

 2. Some architectures even though have .text section in the very
    beginning of the U-Boot image still use different symbols to
    specify link-base:
       * NIOS2: CONFIG_SYS_MONITOR_BASE (which I really like because
         that exactly what makes sense - where out image starts but not
         beginning of its .text section which just happened to match the
         whole image beginning)
       * EXTENSA: CONFIG_SYS_TEXT_ADDR
       * X86: Which doesn't use CONFIG_SYS_MONITOR_BASE in case of EFI
         otherwise sets explicit link base in u-boot.lds

I think that's good to allow for flexibility and don't require each and
every architecture or even platform to specify CONFIG_SYS_TEXT_BASE as well
as use it to set .text section location.

So let's only pass "-Ttext xxx" for those architectures who don't set
link-base explicitly in their linker scripts.

This patch iaddresses comments for previously sent
https://patchwork.ozlabs.org/patch/867540/.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Max Filippov <jcmvbkbc@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
2018-02-23 10:40:51 -05:00
Karl Beldan
fa7b8eae7c arm64: show_regs: Dump the LRs HW values
These were dropped in [1], after relocation, for their values offset by
reloc_off.
Unconditionally show the HW values and add a '(reloc)' hint for the
offset values showed after relocation.
Also, the LRs' dumps are now formatted the same way the other regs' are.

[1] Commit 082693f4 ("arm64 :show_regs: show the address before relocation")

Signed-off-by: Karl Beldan <karl.beldan+oss@gmail.com>
2018-02-23 10:40:51 -05:00
Jonathan Gray
a2d5efd74f tools/kwbimage: fix LibreSSL build
Fix build after addition of RSA_get0_key() to LibreSSL.
Patch from Theo Buehler and Stuart Henderson.

Signed-off-by: Theo Buehler <tb@openbsd.org>
Signed-off-by: Stuart Henderson <sthen@openbsd.org>
2018-02-23 10:40:51 -05:00
Michal Simek
744247de29 net: Remove Xilinx ll_temac driver
ll_temac driver was used by Xilinx Microblaze big endian and
Xilinx ppc405/ppc440 SoCs.

ppc support was removed by: "powerpc: remove 4xx support"
(sha1: 98f705c9ce)
and Microblaze BE is not tested for a long time that's why this driver
can be removed because none is going to updated it to DM anyway.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-02-23 10:40:51 -05:00
Faiz Abbas
e293542c1f configs: am335x_evm_usbspl: Add CONFIG_SPL_NET_VCI_STRING
Add CONFIG_SPL_NET_VCI_STRING to enable USB-Ethernet boot mode
support.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-02-23 10:40:50 -05:00
Thierry Reding
ed5af03f9b fdt: Fixup only valid memory banks
Memory banks with address 0 and size 0 are empty and should not be
passed to the OS via device tree.

Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-02-23 10:40:50 -05:00
Bernhard Messerklinger
78b7d37b1b ns16550: Fix mem mapped endian check
Do a explicit check for CONFIG_SYS_BIG_ENDIAN and
CONFIG_SYS_LITTLE_ENDIAN to avoid errors on platforms where both
are undefined (x86).

Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com>
Reviewed-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
2018-02-23 10:40:50 -05:00
Bernhard Messerklinger
664758c3dd pci: Fix decode regions for memory banks
Since memory banks may not be located behind each other we need to add
them separately.

Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com>
Reviewed-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
2018-02-23 10:40:50 -05:00
Andrew F. Davis
4be9f1f25d defconfig: k2x_hs_evm: Re-enable TI_SECURE_DEVICE in HS K2x parts
These got removed in config re-syncs due to a Kconfig bug. Add these
back here.

Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-02-23 10:22:40 -05:00
Andrew F. Davis
952c346272 env: Fix missed getenv_ulong to env_get_ulong conversion
This seems to have been missed, possibly due to the inability to
enable TI_SECURE_DEVICE on Keystone2 devices previously.

Fixes: bfebc8c965 ("env: Rename getenv_hex(), getenv_yesno(), getenv_ulong()")
Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-02-23 10:21:41 -05:00
Andrew F. Davis
5fbed8f2c6 ARM: Kconfig: Move TI_SECURE_DEVICE to a common area
TI_SECURE_DEVICE is used by both OMAP2+ and Keystone2 family devices,
and so when ARCH_OMAP2PLUS was used to gate off the OMAP2+ Kconfig
Keystone2 family devices lost this config option.

Move this option out of mach-omap2 Kconfig to a spot accessible by both
families. We picked arch/arm/Kconfig over the TI specific board/ti/
location as this option is not specific to our boards but rather our
architecture.

Plus at some point this option can be changed to just
SECURE_DEVICE, as having secure parts is not exclusive to TI and
so other vendors can interpret this option as needed by their device
configurations.

Fixes: a93fbf4a78 ("ARM: omap2+: rename config to ARCH_OMAP2PLUS and consolidate Kconfig")
Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-02-23 10:21:41 -05:00
Max Filippov
10117a2985 xtensa: clean up CONFIG_SYS_TEXT_ADDR
Drop CONFIG_SYS_MEMORY_TOP. Rename CONFIG_SYS_TEXT_ADDR to
XTENSA_SYS_TEXT_ADDR.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2018-02-23 10:21:41 -05:00
Tom Rini
fa2c14676c configs: Re-sync with CONFIG_DISTRO_DEFAULTS
A number of platforms include config_distro_defaults.h but do not enable
CONFIG_DISTRO_DEFAULTS.  As they plainly intended to, set that flag and
re-sync config files.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-02-23 10:21:41 -05:00
Alexander Kochetkov
76584e3398 mmc: fix off-by-one bug in mmc_startup_v4()
MMC card with EXT_CSD_REV value 9 will trigger off-by-one
bug while accessing mmc_versions array. The patch fix that.

Signed-off-by: Alexander Kochetkov <al.kochet@gmail.com>
2018-02-23 15:57:41 +09:00
Faiz Abbas
8a856db238 mmc: Drop unnecessary case for mmc_probe()
Drop the unnecessary empty function case for mmc_probe().

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
2018-02-23 15:56:33 +09:00
Marek Vasut
0b75cc3f13 mmc: uniphier-sd: Add compatible strings for RCar Gen2
Add DT compatible strings for RCar Gen2 SoCs, so that this driver
can bind with them. Unlike Gen3, which uses 64bit FIFO, the Gen2
uses 16bit FIFO.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-02-23 00:06:05 +01:00
Tom Rini
b2a3372138 sh: Do not provide strncmp
With modern GCC, we get warnings such as:
cmd/jffs2.c: In function 'mtdparts_init':
arch/sh/include/asm/string.h:110:38:
warning: array subscript is above array bounds [-Warray-bounds]
   : "0" (__cs), "1" (__ct), "r" (__cs+__n)
                                  ~~~~^~~~

This results in a small size reduction as well.

Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-02-23 00:06:05 +01:00
Jagan Teki
3d40915350 imx6q: engicam: Use SPL_LOAD_FIT for MMC boards
Currently SPL_LOAD_FIT is unable to boot from nand on
i.MX6QDL platform, so enable only for MMC boards.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-02-22 14:51:01 +01:00
Jagan Teki
ac738a4a7b imx6: engicam: Drop SPL_EXT_SUPPORT
i.MX6 boards still using raw MMC write for SPL and
u-boot-dtb.img along with Falcon mode configurations,
so drop filesystem based write through SPL_EXT_SUPPORT.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-02-22 14:40:00 +01:00
Jagan Teki
b0fcd8ef60 imx6ul: engicam: Drop isiot-mmc defconfig
Engicam Is.IoT has eMMC and NAND cpu modules where MMC
is common for both, so remove explicit mmc defconfig.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-02-22 14:39:45 +01:00
Breno Lima
7b889baf29 arm: imx: hab: Define HAB_RVT_BASE according to the processor version
Currently the following devices are using a different definition for ROM
Vector Table addresses:

- i.MX6DQP =  All rev
- i.MX6DQ >= rev 1.5
- i.MX6SDL >= rev 1.2

There is no need to create a new RVT macros since the only update were the
RVT base address. Remove HAB_RVT_*_NEW macros and define a new RVT base
address.

More details about RVT base address can be found on processors Reference
Manual and in the following documents:

EB803: i.MX 6Dual/6Quad Applications Processor Silicon Revision 1.2 to 1.3
Comparison

EB804: i.MX 6Solo/6DualLite Application Processor Silicon Revision 1.1
to 1.2/1.3 Comparison

Signed-off-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-02-22 14:36:06 +01:00
Utkarsh Gupta
20fa1dd386 imx: hab: Check if CSF contains deprecated commands
Write, Check and Set MID commands have been deprecated from the Code
Signing Tool (CST) v2.3.3 and will not be implemented in newer versions
of HAB, hence the following features are no longer available:

- Write Data
- Clear Mask
- Set Mask
- Check All Clear
- Check All Set
- Check Any Clear
- Check Any Set
- Set MID

The inappropriate use of Write Data command may lead to an incorrect
authentication boot flow. Since no specific application has been identified
that requires the use of any of these features, it is highly recommended to
add this check.

Signed-off-by: Utkarsh Gupta <utkarsh.gupta@nxp.com>
Signed-off-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-02-22 14:35:57 +01:00
Utkarsh Gupta
ed286bc80e imx: hab: Check if CSF is valid before authenticating image
For proper authentication the HAB code must check if the CSF is valid.
Users must call the csf_is_valid() function to parse the CSF prior to
authenticating any additional images. The function will return a failure
if any of the following invalid conditions are met:

- CSF pointer is NULL
- CSF Header does not exist
- CSF does not lie within the image bounds
- CSF command length zero

Signed-off-by: Utkarsh Gupta <utkarsh.gupta@nxp.com>
Signed-off-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-02-22 14:35:42 +01:00
Utkarsh Gupta
8c4037a09a imx: hab: Ensure the IVT DCD pointer is Null prior to calling HAB authenticate function.
DCD commands should only be present in the initial boot image loaded by
the SoC ROM. DCD should not be present in images that will be verified
by software using HAB RVT authentication APIs. Newer versions of HAB
will generate an error if a DCD pointer is present in an image being
authenticated by calling the HAB RVT API. Older versions of HAB will
process and run DCD if it is present, and this could lead to an incorrect
authentication boot flow.

It is highly recommended this check is in place to ensure additional HAB
verified images do not include a DCD table.

Signed-off-by: Utkarsh Gupta <utkarsh.gupta@nxp.com>
Signed-off-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-02-22 14:35:32 +01:00
Breno Lima
669f2d189e imx: hab: Keep CAAM clock enabled after authenticating additional images
Currently it is not possible to run CMD_DEK on i.MX SPL targets:

=> dek_blob 0x12000000 0x12001000 128

The system hangs after running dek_blob because the CAAM clock is being
disabled by the HAB code. There is no need to disable CAAM clock after
authenticating additional boot images, thus keep CAAM clock enabled to
address this issue.

Signed-off-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-02-22 14:35:20 +01:00
Maxim Yu. Osipov
d247cf5069 Revert "mx6: ddr: Allow changing REFSEL and REFR fields"
This reverts commit edf0093732 for
cm_fx6 iMX.6 Solo module as it causes frequent (around 10 percent of
power cycles) board's hangs.

These hangs happen in SPL when BSS is being initialized in SDRAM -
it appear that variables from BSS contain trash values which lead to board
hangs. Looks like that SDRAM doesn't yet finish initialization in these
cases.

Signed-off-by: Maxim Yu. Osipov <mosipov@ilbers.de>
Reviewed-by: Stefano Babic <sbabic@denx.de>
2018-02-22 14:30:53 +01:00
Tom Rini
036c9679d2 sh: Use -m2a-nofpu only
Based on reading over the GCC manual, passing both -m2a and -m2a-nofpu
are redundant, as -m2a-nofpu will provide functional code for both.  As
-m2a-nofpu functions with more toolchains and does what is expected,
switch.

Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-02-21 23:42:47 +01:00
Patrick Delaunay
b0cce3f90f cmd: fastboot: Kconfig: solve config issue
When FASTBOOT is activated, only one the supported device is supported in
code at the same time
- CONFIG_FASTBOOT_FLASH_MMC_DEV
- CONFIG_FASTBOOT_FLASH_NAND_DEV

But Today the choice is not exclusive in Kconfig
and that cause Kconfig issue when :
- CONFIG_FASTBOOT, CONFIG_MMC, CONFIG_NAND are activated
- CONFIG_FASTBOOT_FLASH_MMC_DEV = 0
- CONFIG_FASTBOOT_FLASH_NAND_DEV is not activated

The patch add a choice in Kconfig to select the FLASH provider
- CONFIG_FASTBOOT_FLASH_MMC
- CONFIG_FASTBOOT_FLASH_NAND

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2018-02-21 20:28:15 +01:00
Marek Vasut
36dd7e7e25 dfu: tftp: Fix arm64 build warnings
Fix two build warnings when building for arm64:

drivers/dfu/dfu_tftp.c: In function ‘dfu_tftp_write’:
drivers/dfu/dfu_tftp.c:59:37: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
  ret = dfu_write_from_mem_addr(dfu, (void *)addr, len);
                                     ^
and

drivers/dfu/dfu_tftp.c: In function ‘dfu_tftp_write’:
drivers/dfu/dfu_tftp.c:41:8: warning: format ‘%u’ expects argument of type ‘unsigned int’, but argument 4 has type ‘__kernel_size_t {aka long unsigned int}’ [-Wformat=]
  debug("%s: image name: %s strlen: %u\n", __func__, sb, strlen(sb));
        ^

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Lukasz Majewski <lukma@denx.de>
2018-02-21 20:28:15 +01:00
Marek Vasut
bb4059a53b dfu: Rename _FUNCTION_DFU to DFU_OVER_
Do the following to make the symbol names less confusing.

sed -i "s/\([TU][^_]\+\)_FUNCTION_DFU/DFU_OVER_\1/g" \
	`git grep _FUNCTION_DFU | cut -d ":" -f 1 | sort -u`

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Lukasz Majewski <lukma@denx.de>
2018-02-21 20:28:15 +01:00
Marek Vasut
0f44d33536 dfu: Fix up the Kconfig mess
Clean up the screaming mess of configuration options that DFU is.
It was impossible to configure DFU such that TFTP is enabled and
USB is not, this patch fixes that and assures that DFU TFTP and
DFU USB can be enabled separatelly and that the correct pieces
of code are compiled in.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Lukasz Majewski <lukma@denx.de>
2018-02-21 20:28:15 +01:00
Heinrich Schuchardt
462c117ce0 usb: kbd: select SYS_STDIO_DEREGISTER
If SYS_STDIO_DEREGISTER is not selected and USB_KEYBOARD is selected
U-Boot cannot be built due to missing function stdio_deregister_dev.

So USB_KEYBOARD should select SYS_STDIO_DEREGISTER.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-02-21 20:28:15 +01:00
Andre Heider
a64a614db7 usb: gadget: sdp: fix pointer cast warnings for 64bit archs
The SDP protocol contains multiple 32bit pointers. Add a helper function
to get a valid pointer from these values and use it.

This fixes the following warnings:

drivers/usb/gadget/f_sdp.c: In function ‘sdp_rx_data_complete’:
drivers/usb/gadget/f_sdp.c:347:10: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
   memcpy((void *)sdp->dnl_address, req->buf + 1, datalen);
          ^
drivers/usb/gadget/f_sdp.c: In function ‘sdp_jump_imxheader’:
drivers/usb/gadget/f_sdp.c:625:10: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
  entry = (void *)headerv2->entry;
          ^
drivers/usb/gadget/f_sdp.c: In function ‘sdp_handle_in_ep’:
drivers/usb/gadget/f_sdp.c:668:20: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
   memcpy(&data[1], (void *)sdp_func->dnl_address, datalen);
                    ^
drivers/usb/gadget/f_sdp.c:679:31: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
   status = sdp_jump_imxheader((void *)sdp_func->jmp_address);
                               ^

Signed-off-by: Andre Heider <a.heider@gmail.com>
2018-02-21 20:28:15 +01:00
Andre Heider
24ccd0c8fd usb: gadget: sdp: add missing line breaks
Cosmetic change.

Signed-off-by: Andre Heider <a.heider@gmail.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Acked-by: Stefan Agner <stefan.agner@toradex.com>
2018-02-21 20:28:15 +01:00
Jaehoon Chung
1b313aa3e3 mmc: synchronize the sequence with enum bus_mode in mmc.h
If some configs are disabled, number of freqs array will not assigned to
correct value with bus_mode.
Synchornize the ordering with enum bus_mode in mmc.h.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
2018-02-21 18:04:25 +09:00
Tom Rini
f0f6917188 Prepare v2018.03-rc3
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-02-20 16:51:56 -05:00
Lukasz Majewski
0778e7c50b script: Make the get_default_envs.sh script working with newest u-boot
This commit fixes several issues:

- After moving env related code to ./env directory the env_common.o file
is no longer present in the system (has been replaced with built-in.o).

- Use ${OBJCOPY} if available, fallback to system default's objcopy if not
present.

- Extend the script to accept different build directory than current one.
It is extremely handy with OE usage, where source code is separated from
build.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Tested-by: Alex Kiernan <alex.kiernan@gmail.com>
2018-02-20 08:21:30 -05:00
Faiz Abbas
26862b4a40 env: mmc/fat/ext4: make sure that the MMC sub-system is initialized before using it
When booting from a non-MMC device, the MMC sub-system may not be
initialized when the environment is first accessed.
We need to make sure that the MMC sub-system is ready in even a non-MMC
boot case.

Therefore, initialize mmc before loading environment from it.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
2018-02-20 08:21:30 -05:00
Tom Rini
7b1cfec317 Merge git://git.denx.de/u-boot-mmc 2018-02-19 23:01:05 -05:00
Tom Rini
d884c58f0c Merge git://git.denx.de/u-boot-dm 2018-02-19 11:39:39 -05:00
Tom Rini
ede52d0482 Merge git://git.denx.de/u-boot-ubi 2018-02-19 09:50:37 -05:00
Tom Rini
60a53351fb Merge git://git.denx.de/u-boot-i2c 2018-02-19 09:50:18 -05:00
Tom Rini
3ffa5288c8 Merge git://git.denx.de/u-boot-sh 2018-02-19 09:50:15 -05:00
Linus Walleij
116b49cfc4 vexpress: Sign up as maintainer
These ARM boards are in nice shape and still being used a lot
with e.g. QEMU, so I can maintain them.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-02-19 09:49:20 -05:00
Alex Kiernan
4a41fec589 mmc: Fix uninitialised priv member
When using omap_hsmmc without the device model then the allocation
of mmc->priv ends up uninitialised.

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
Tested-by: Robert Nelson <robertcnelson@gmail.com>
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
2018-02-19 17:00:33 +09:00
Jean-Jacques Hiblot
ace1bed327 mmc: fix bug in mmc_startup_v4()
The correspondence between mmc versions as used in u-boot and the version
numbers reported in register EXT_CSD_REV is wrong for versions above and
including MMC_VERSION_4_41. All those versions were shifted by one:
real 4.5 hardware appeared to be MMC_VERSION_5_0.

Fix this by adding the missing version in the correspondence table.

Reported-by: eil Eilmsteiner Heribert <eil@keba.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
2018-02-19 16:59:33 +09:00
Jean-Jacques Hiblot
a0276f3eee mmc: Fix bug in sd_set_card_speed()
After settings the speed of the sd with the switch command, a check is
done to make sure that the new speed has been set. The current check has a
masking error: speed are encoded on 4 bits only.
Fix it by masking the upper bits.

This fixes a problem seen with QEmu emulating a vexpress-a15.

Reported-by: Jonathan Gray <jsg@jsg.id.au>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Tested-by: Jonathan Gray <jsg@jsg.id.au>
2018-02-19 16:59:21 +09:00
Jean-Jacques Hiblot
127a6011ee configs: dra7xx_evm/dra7xx_hs_evm: Enable MMC HS200 and SD UHS support
By default UHS and HS200 are not enabled.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19 16:58:55 +09:00
Kishon Vijay Abraham I
c413baa95c ARM: DRA7x/AM57x: Add MMC/SD fixups for rev1.0 and rev 1.1
Since DRA7xx/AM57xx SR1.1 and SR1.0 has errata to limit the frequency of
MMC1 to 96MHz and frequency of MMC2 to 48MHz for AM572x SR1.1, limit the
frequency and disable higher speed modes for those revision.
Also use the recommended IO delays (those tagged with "rev11")

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19 16:58:55 +09:00
Jean-Jacques Hiblot
e74adafb04 dts: am57xx-idk: disable HS200 support
HS200 cannot be supported on mmc2, because the IO lines of mmc2 are
connected to 3.3v.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19 16:58:55 +09:00
Jean-Jacques Hiblot
4db25fe7fa dts: am57xx-beagle-x15: disable UHS and HS200 support
The UHS modes are not supported in beagle-x15 because it's not possible to
switch the IO lines supply voltage to 1.8v.
Also HS200 cannot be supported on mmc2, because the IO lines of mmc2 are
connected to 3.3v.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19 16:58:55 +09:00
Jean-Jacques Hiblot
2adee41db9 ARM: dts: dra7: Add supported MMC/SD modes in MMC dt nodes
On DRA7 family SoCs, MMC1 controller supports SDR104,
SDR50, DDR50, SDR25 and SDR12 UHS modes.

MMC2 controller supports HS200 and DDR modes.

MMC3 controller supports SDR12, SDR25 and SDR50 modes.

MMC4 controller supports SDR12 and SDR25 modes.

Add these supported modes in device-tree file.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19 16:58:55 +09:00
Kishon Vijay Abraham I
6ba41e5dc3 ARM: dts: DRA7: use new dra7-specific compatible string
Use the new compatible string "ti,dra7-hsmmc" that was specifically
added for dra7 and dra72. This is required since for dra7 and dra72
processors iodelay values has to be set unlike other processors.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19 16:58:55 +09:00
Kishon Vijay Abraham I
2022270c7d ARM: OMAP5: set mmc clock frequency to 192MHz
Now that omap_hsmmc has support for hs200 mode, change the clock
frequency to 192MHz. Also change the REFERENCE CLOCK frequency to
192MHz based on which the internal mmc clock divider is calculated.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19 16:58:55 +09:00
Jean-Jacques Hiblot
04f9f8be83 mmc: omap_hsmmc: add signal voltage selection support
I/O data lines of UHS SD card operates at 1.8V when in UHS speed
mode (same is true for eMMC in DDR and HS200 modes). Add support
to switch signal voltage to 1.8V in order to support
UHS cards and eMMC HS200 and DDR modes.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19 16:58:55 +09:00
Kishon Vijay Abraham I
90321dce0d mmc: omap_hsmmc: allow mmc clock to be gated
mmc core has defined a new parameter *clk_disable* to gate the clock.
Disable the clock here if *clk_disable* is set.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19 16:58:55 +09:00
Jean-Jacques Hiblot
42182c9b9c mmc: omap_hsmmc: implement send_init_stream callback
This callback is used to send the 74 clock cycles after power up.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19 16:58:55 +09:00
Jean-Jacques Hiblot
3149c13ac3 mmc: omap_hsmmc: update mmc->clock with the actual bus speed
When the clock is applied, compute the actual value of the clock. It may be
slightly different from the requested value (max freq, divisor threshold)

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19 16:58:55 +09:00
Jean-Jacques Hiblot
bcc6bd84d4 mmc: omap_hsmmc: allow the simple HS modes to use the default pinctrl
The default configuration is usually working fine for the the HS modes.
Don't enforce the presence of a dedicated pinmux for the HS modes.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19 16:58:55 +09:00
Kishon Vijay Abraham I
2d28eeda33 mmc: omap_hsmmc: Add support to get pinctrl values and max frequency for different hw revisions
AM572x SR1.1 requires different IODelay values to be used than that used
in AM572x SR2.0. These values are populated in device tree. Add
capability in omap_hsmmc driver to extract IOdelay values for different
silicon revision. The maximum frequency is also reduced when using a ES1.1.
To keep the ability to boot both revsions with the same dtb, those values
can be provided by the platform code.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19 16:58:55 +09:00
Kishon Vijay Abraham I
33c1d77f4a mmc: omap_hsmmc: Add support to set IODELAY values
The data manual of J6/J6 Eco recommends to set different IODELAY values
depending on the mode in which the MMC/SD is enumerated in order to
ensure IO timings are met.

Add support to parse mux values and iodelay values from device tree
and set these depending on the enumerated MMC mode.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19 16:58:55 +09:00
Kishon Vijay Abraham I
6a27333ba3 ARM: OMAP5/DRA7: Enable iodelay recalibration to be done from uboot
Add a new API to perform iodelay recalibration without isolate
io to be used in uboot.

The data manual of J6/J6 Eco recommends to set different IODELAY values
depending on the mode in which the MMC/SD is enumerated in order to
ensure IO timings are met. The MMC driver can use the new API to
set the IO delay values depending on the MMC mode.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19 16:58:55 +09:00
Kishon Vijay Abraham I
2d7482cf79 mmc: omap_hsmmc: use mmc_of_parse to populate mmc_config
Use the mmc_of_parse library function to populate mmc_config instead of
repeating the same code in host controller driver.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19 16:58:55 +09:00
Jean-Jacques Hiblot
a4efd73773 mmc: omap_hsmmc: Reduce the max timeout for reset controller fsm
>From OMAP3 SoCs (OMAP3, OMAP4, OMAP5, AM572x, AM571x), the DAT/CMD lines
reset procedure section in TRM suggests to first poll the SRD/SRC bit
until it is set to 0x1. But looks like that bit is never set to 1 and there
is an observable delay of 1sec everytime the driver tries to reset DAT/CMD.
(The same is observed in linux kernel).

Reduce the time the driver waits for the controller to set the SRC/SRD bits
to 1 so that there is no observable delay.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19 16:58:54 +09:00
Jean-Jacques Hiblot
2faa1a302b mmc: omap_hsmmc: Workaround for errata id i802
According to errata i802, DCRC error interrupts
(MMCHS_STAT[21] DCRC=0x1) can occur during the tuning procedure.

The DCRC interrupt, occurs when the last tuning block fails
(the last ratio tested). The delay from CRC check until the
interrupt is asserted is bigger than the delay until assertion
of the tuning end flag. Assertion of tuning end flag is what
masks the interrupts. Because of this race, an erroneous DCRC
interrupt occurs.

The suggested  workaround is to disable DCRC interrupts during
the tuning procedure which is implemented here.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19 16:58:54 +09:00
Jean-Jacques Hiblot
14761caeee mmc: omap_hsmmc: Add tuning support
HS200/SDR104 requires tuning command to be sent to the card. Use
the mmc_send_tuning library function to send the tuning
command and configure the internal DLL.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19 16:58:54 +09:00
Kishon Vijay Abraham I
9b3fc21837 mmc: omap_hsmmc: Enable DDR mode support
In order to enable DDR mode, Dual Data Rate mode bit has to be set in
MMCHS_CON register. Set it here.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19 16:58:54 +09:00
Jean-Jacques Hiblot
8fc238bfad mmc: omap_hsmmc: set MMC mode in the UHSMS bit field
Use the timing parameter set in the MMC core to set the
mode in UHSMS  bit field. This is in preparation for
adding HS200 support in omap hsmmc driver.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19 16:58:54 +09:00
Kishon Vijay Abraham I
b594481709 mmc: omap_hsmmc: add support to set default io voltage
"ti,dual-volt" is used in linux kernel to set the voltage capabilities.
For host controller dt nodes that doesn't have "ti,dual-volt",
it's assumed 1.8v is the io voltage. This is not always true (like in
the case of beagle-x15 where the io lines are connected to 3.3v).
Hence if "no-1-8-v" property is set, io voltage will be set to 3v.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19 16:58:54 +09:00
Kishon Vijay Abraham I
48a2f11443 mmc: omap_hsmmc: cleanup omap_hsmmc_set_ios
No functional change. Move bus width configuration setting to a
separate function and invoke it only if there is a change in the
bus width.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19 16:58:54 +09:00
Jean-Jacques Hiblot
5baf543e52 mmc: omap_hsmmc: cleanup clock configuration
Add a separate function for starting the clock, stopping the clock and
setting the clock. Starting the clock and stopping the clock can
be used irrespective of setting the clock (For example during iodelay
recalibration).
Also set the clock only if there is a change in frequency.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19 16:58:54 +09:00
Masahiro Yamada
d4d64889b0 mmc: use pr_* log functions
Use pr_* log functions from Linux.  They can be enabled/disabled
via CONFIG_LOGLEVEL.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2018-02-19 16:56:54 +09:00
Richard Weinberger
f82290afc8 mtd: ubi: Fix worker handling
Fixes a bug found on thuban boards, which were for 2 years in
a long-term test with varying temperatures. They showed
problems in u-boot when attaching the ubi partition:

U-Boot# run flash_self_test
Booting from nand
set A...
UBI: attaching mtd1 to ubi0
UBI: scanning is finished
data abort
pc : [<87f97c3c>]          lr : [<87f97c28>]
reloc pc : [<8012cc3c>]    lr : [<8012cc28>]
sp : 85f686e8  ip : 00000020     fp : 000001f7
r10: 8605ce40  r9 : 85f68ef8     r8 : 0001f000
r7 : 00000001  r6 : 00000006     r5 : 0001f000  r4 : 85f6ecc0
r3 : 00000000  r2 : 44e35000     r1 : 87fcbcd4  r0 : 87fc755b
Flags: nZCv  IRQs off  FIQs on  Mode SVC_32
Resetting CPU ...

Reason is, that accidentially the U-Boot implementation
from __schedule_ubi_work() did not check the flag
ubi->thread_enabled and started with wearleveling work,
but ubi did not have setup all structures at this point
and crashes.

Solve this problem by splitting work scheduling and processing.

Signed-off-by: Richard Weinberger <richard@nod.at>
Signed-off-by: Heiko Schocher <hs@denx.de>
2018-02-19 08:22:58 +01:00
Stefan Mavrodiev
004b4cdaec i2c: mvtwsi.c: Fix set speed
Previous patch for this driver breaks i2c initialization.

commit 8bcf12ccce ("i2c: mvtwsi.c: Avoid NULL dereference")

If actual_speed is passed as NULL in this function:
static void __twsi_i2c_init(struct mvtwsi_registers *twsi, int speed,
			    int slaveadd, uint *actual_speed)
than __twsi_i2c_set_bus_speed never get called. This causes i2c clock
to run on default speed - 2MHz (measured with oscilloscope). This is issue
on some boards, sunxi for example, since on I2C0 bus PMU is connected.

The bootlogs with and without the patch are as follows:

Wihtout the patch:
U-Boot SPL 2018.03-rc2 (Feb 13 2018 - 09:23:17 +0200)
DRAM: 1024 MiB
Failed to set core voltage! Can't set CPU frequency
Trying to boot from FEL

U-Boot 2018.03-rc2 (Feb 13 2018 - 09:23:17 +0200) Allwinner Technology

CPU:   Allwinner A20 (SUN7I)
Model: Olimex A20-OLinuXino-LIME2
I2C:   ready
DRAM:  1 GiB
MMC:   SUNXI SD/MMC: 0

With the patch:
U-Boot SPL 2018.03-rc2-00001-g838ff85 (Feb 13 2018 - 09:24:34 +0200)
DRAM: 1024 MiB
CPU: 912000000Hz, AXI/AHB/APB: 3/2/2
Trying to boot from FEL

U-Boot 2018.03-rc2-00001-g838ff85 (Feb 13 2018 - 09:24:34 +0200) Allwinner Technology

CPU:   Allwinner A20 (SUN7I)
Model: Olimex A20-OLinuXino-LIME2
I2C:   ready
DRAM:  1 GiB
MMC:   SUNXI SD/MMC: 0

Signed-off-by: Stefan Mavrodiev <stefan@olimex.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2018-02-19 08:21:38 +01:00
Mario Six
c6b89f3180 sandbox: Add 64-bit sandbox
To debug device tree issues involving 32- and 64-bit platforms, it is useful to
have a generic 64-bit platform available.

Add a version of the sandbox that uses 64-bit integers for its physical
addresses as well as a modified device tree.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Added CONFIG_SYS_TEXT_BASE to configs/sandbox64_defconfig
Signed-off-by: Simon Glass <sjg@chromium.org>
2018-02-18 15:53:48 -07:00
Simon Glass
995b60b593 sandbox: Rename 'num-gpios' property to avoid dtc warning
At present dtc produces these warnings when compiling sandbox:

arch/sandbox/dts/test.dtb: Warning (gpios_property):
	Could not get phandle node for /base-gpios:num-gpios(cell 0)
arch/sandbox/dts/test.dtb: Warning (gpios_property):
	Missing property '#gpio-cells' in node /reset-ctl or bad phandle
	(referred from /extra-gpios:num-gpios[0])

Both are due to it assuming that the 'num-gpios' property holds a phandle
pointing to a GPIO node.

To avoid these warnings, rename the sandbox property so that it does not
include the string 'gpios'.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-02-18 15:53:32 -07:00
Simon Glass
7e87816caa sandbox: Correct dtc warning in /chosen node
At present dtc produces these warnings when compiling sandbox:

arch/sandbox/dts/test.dtb: Warning (reg_format): "reg" property in /chosen/chosen-test has invalid length (8 bytes) (#address-cells == 2, #size-cells == 1)
arch/sandbox/dts/test.dtb: Warning (avoid_default_addr_size): Relying on default #address-cells value for /chosen/chosen-test
arch/sandbox/dts/test.dtb: Warning (avoid_default_addr_size): Relying on default #size-cells value for /chosen/chosen-test

Add the missing properties to avoid this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Fixes: f200680 (dm: core: parse chosen node)
2018-02-18 12:53:38 -07:00
Thierry Reding
6d29cc7dcf fdt: Fixup only valid memory banks
Memory banks with address 0 and size 0 are empty and should not be
passed to the OS via device tree.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
2018-02-18 12:53:38 -07:00
Alexey Brodkin
4280342adb fdt: Implement weak arch_fixup_fdt()
Only ARM and in some configs MIPS really implement arch_fixup_fdt().
Others just use the same boilerplate which is not good by itself,
but what's worse if we try to build with disabled CONFIG_CMD_BOOTM
and enabled CONFIG_OF_LIBFDT we'll hit an unknown symbol which was
apparently implemented in arch/xxx/lib/bootm.c.

Now with weak arch_fixup_fdt() right in image-fdt.c where it is
used we get both items highlighted above fixed.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: York Sun <york.sun@nxp.com>
Cc: Stefan Roese <sr@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-02-18 12:53:38 -07:00
Fabio Estevam
04a03b240f mx6sabresd: Select the CONFIG_EFI_PARTITION option
With fastboot support enabled, it is useful to be able to list
the eMMC EFI partitions, so select the CONFIG_EFI_PARTITION option.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-02-18 12:43:51 +01:00
Stefano Babic
0fb1a8a469 mx6: fix MAINTAINERS for Engicam i.CoreM6 1.5 MIPI
Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Jagan Teki <jagan@amarulasolutions.com>
2018-02-18 12:42:41 +01:00
Marek Vasut
5abcbd7847 net: sh_eth: Fix DT base address fetching
Drop the whole map/unmap_physmem stuff and just use the address
already obtained from DT in ofdata_to_platdata(), instead of
repeating that, wrongly, in probe.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2018-02-18 11:20:18 +01:00
Marek Vasut
5262767ded net: sh_eth: Fix checkpatch warning
Fix minor checkpatch warning about udelay(3000) being too long
and should be replaced by mdelay(3).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2018-02-18 11:20:18 +01:00
Marek Vasut
60279b5757 net: sh_eth: Return directly from sh_eth_recv_start
Drop the len variable, it's useless.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2018-02-18 11:20:18 +01:00
Marek Vasut
3c5a7b7547 net: sh_eth: Zap port variable
Inline this variable which is quite useless.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2018-02-18 11:20:17 +01:00
Tom Rini
02b0895c21 Merge git://git.denx.de/u-boot-sh 2018-02-17 16:06:59 -05:00
Marek Vasut
25f6dc8955 ARM: rmobile: Fix broken reset code on Porter
The 'reset' command did not work on Porter because the reset code
was accessing the wrong PMIC address over broken I2C bus driver.
Replace the code with DM-aware code and fix up the PMIC address.
This makes the 'reset' command work again.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-02-17 22:00:25 +01:00
Marek Vasut
a6e50da0d5 ARM: rmobile: Replace SH I2C with IIC on Porter
Get rid of the SH I2C driver on Porter and enable the IIC driver
instead . The old SH I2C is completely broken on Porter anyway
and the DM/DT capable IIC driver allows access to the PMIC too.
Use the DM/DT capable driver instead.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-02-17 22:00:25 +01:00
Marek Vasut
88306dbb5a ARM: dts: rmobile: Enable I2C6 on Porter
Enable I2C6 bus on Porter to access the PMIC , ie. to reset the board.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-02-17 21:59:22 +01:00
Marek Vasut
f51155eced i2c: rcar_iic: Allow IIC on RCar Gen2
The IIC on Gen2 is compatible with this driver as well, allow it.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-02-17 21:59:22 +01:00
Marek Vasut
7b8eeb4060 ARM: rmobile: Set FDT/initramfs limits on Porter
Set those limits to inform U-Boot about FDT and initramfs placement.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-02-17 21:59:22 +01:00
Marek Vasut
a05dab4e76 ARM: rmobile: Enable convenient commands on Porter
Enable cache and time commands, which are convenience tools for
doing benchmarks and various boot tests. Also enable FIT support
for booting fitImage.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-02-17 21:59:21 +01:00
Marek Vasut
cd07358c04 ARM: rmobile: Reset ethernet PHY
Toggle the PHY reset GPIO to bring the ethernet PHY out of reset properly.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
---
NOTE: This should be moved to the SH ethernet driver, but it's quite
      late in the cycle, so this is something to be done in 2018.05.
2018-02-17 21:59:21 +01:00
Marek Vasut
8a41f68870 ARM: dts: rmobile: Move the u-boot,dm-pre-reloc into u-boot DTS on porter
Fix ommission where the u-boot,dm-pre-reloc DT bit was pulled into the
common DT, not the U-Boot specific DT part. Move it to U-Boot DT part.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-02-17 21:59:20 +01:00
Tom Rini
bd650cd404 Merge git://git.denx.de/u-boot-sh 2018-02-16 13:56:02 -05:00
Tom Rini
7961b9f6db Merge git://git.denx.de/u-boot-socfpga 2018-02-16 13:55:51 -05:00
Tom Rini
fee626c449 Merge git://git.denx.de/u-boot-usb 2018-02-16 13:55:41 -05:00
Goldschmidt Simon
b2cdef4861 env: restore old env_get_char() behaviour
With multiple environments, the 'get_char' callback for env
drivers does not really make sense any more because it is
only supported by two drivers (eeprom and nvram).

To restore single character loading for these drivers,
override 'env_get_char_spec'.

Signed-off-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-02-16 11:12:42 -05:00
York Sun
e1caa5841e env: Fix env_load_location
Commit 7d714a24d7 ("env: Support multiple environments") added
static variable env_load_location. When saving environmental
variables, this variable is presumed to have the value set before.
In case the value was set before relocation and U-Boot runs from a
NOR flash, this variable wasn't writable. This causes failure when
saving the environment. To save this location, global data must be
used instead.

Signed-off-by: York Sun <york.sun@nxp.com>
CC: Maxime Ripard <maxime.ripard@free-electrons.com>
2018-02-16 11:12:41 -05:00
Marek Vasut
5b6ae550a8 ARM: rmobile: Enable autocompletion on Gen2
This makes the shell so much more pleasant to use, so enable it.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-02-16 16:43:11 +01:00
Marek Vasut
7ee37d0e0c ARM: rmobile: Convert Porter to SPL
Due to size limitations of the MERAM, switch U-Boot to SPL.
The SPL is loaded by the SPI_LOADER into MERAM and then loads
U-Boot proper into DRAM. This way U-Boot can freely grow in
size in DRAM, as there is plenty of it.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
---
NOTE: To update U-Boot, first install u-boot.img to 0x140000 in SPI NOR,
      then use the Minimon to flash u-boot-spl.srec using ls,2,e6304000.
      To generate u-boot-spl.srec, use objcopy:
        arm-linux-gnueabi-objcopy -O srec spl/u-boot-spl u-boot-spl.srec
2018-02-16 16:43:11 +01:00
Marek Vasut
8a8d300005 ARM: dts: rmobile: Make PFC and RST available before reloc
Those two nodes are needed to configure pinmux before relocation
and to configure clock before relocation, since CPG/MSSR needs
access to RST node. This is not noticable on Gen3, but on Gen2
this causes problems in SPL if they are not available early.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-02-16 16:43:11 +01:00
Marek Vasut
ccb947f2ce ARM: dts: rmobile: Make scif0 available before reloc on Porter
Make the SCIF available before relocation and in SPL on R8A7791 Porter.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-02-16 16:43:11 +01:00
Marek Vasut
5c44ddcb13 serial: Replace CONFIG_ with CONFIG_IS_ENABLED
Cosmetic change, replace CONFIG_* with CONFIG_IS_ENABLED(*) .

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-02-16 16:43:10 +01:00
Marek Vasut
974147b437 ARM: rmobile: Enable autocompletion on Gen3
This makes the shell so much more pleasant to use, so enable it.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-02-16 16:43:09 +01:00
Marek Vasut
74caed0e33 ARM: rmobile: Enable DTO support on Gen3
Enable support for applying DT overlays on Gen3. This is convenient
for handling extra additional hardware, like ie. the Kingfisher.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-02-16 16:43:09 +01:00
Marek Vasut
d64c789414 net: ravb: Initialize PHY in probe() once
Reset and initialize the PHY once in the probe() function rather than
doing it over and over again is start() function. This requires us to
keep the clock enabled while the driver is in use. This significantly
reduces the time between transfers as the PHY doesn't have to restart
autonegotiation between transfers, which takes forever.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Geert Uytterhoeven <geert+renesas@glider.be>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2018-02-16 16:43:09 +01:00
Marek Vasut
fd5577ce26 clk: rmobile: Assure SD-IF clock are configured correctly
The SD driver calls clk_set_rate() before clk_enable(), yet clk_set_rate()
implementation in the clock driver does not set the SD-IF divider. Fix it.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-02-16 16:43:09 +01:00
Tom Rini
32fe36574e Merge git://git.denx.de/u-boot-arc 2018-02-15 14:07:04 -05:00
Alexander Graf
f116634cd1 RPi: Add myself as board maintainer
Commit 958d55f26c ("MAINTAINERS: Take over BCM2835 maintainership") put
me in as maintainer for the RPi soc, but forgot to update the board
MAINTAINERS file.

Add me there too.

Signed-off-by: Alexander Graf <agraf@suse.de>
2018-02-15 10:08:14 -05:00
Simon Goldschmidt
fef4a545b6 arm: socfpga: use imply instead of select where applicable
Kconfig should only 'select' features that are required for an arch.
Standard features that can be disabled without breaking board support
should use 'imply' instead, to allow users to disable it.

These options are changed for mach-socfpga:
- DM_SPI & DM_SPI_FLASH: only required with QSPI support enabled
- SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION: the boot rom supports a
  partitionless mode also, where SPL is located at address 0
- HW_WATCHDOG: while all mainline board defconfigs use it, U-Boot
  should still work without it.

Signed-off-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
2018-02-15 13:45:16 +01:00
Lukasz Majewski
21a9f435f3 Convert socfpga: select CONFIG_HW_WATCHDOG support for ARCH_SOCFPGA
All Socfpga boards from ./include/configs/socfpga_* define
CONFIG_HW_WATCHDOG.
To ease CONFIG_HW_WATCHDOG conversion to Kconfig select it in
config ARCH_SOCFPGA (arch/arm/Kconfig) section.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Signed-off-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
2018-02-15 13:45:16 +01:00
Simon Goldschmidt
a6fbf94550 arm: socfpga: fix qspi flash compatible (add "spi-flash")
This patch adds "spi-flash" to the compatible list of the qspi flash
chip for all socfpga boards. This is required to make qspi work on
these boards on top of the recent fixes. Without the "spi-flash"
compatible string for the flash chip, the speed cannot be read and a
speed of 0Hz is used (which results in a divide-by-zero on these
boards).

Signed-off-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
2018-02-15 13:45:15 +01:00
Alexey Brodkin
d53b128df4 arc: Fix final linkage with Elf32 tools
ARC Elf32 tools by default enable usage of so-called "small data"
section or in ARC PRM parlance "GP-relative addressing".

The idea is to put up to 2kB of frequently used data into a separate
location and use indirect addressing via dedicated core register (GP).
Where GP is used as a base for offset calculation.

And so if "-msdata" toggle is passed to the compiler either explicitly
or implicitly (that's Elf32 tools case) it will try to put some data
in that "small data" area and then to calculate real offset from GP
to be encoded in instructions we need to know the base value which
liker gets from __SDATA_BEGIN__ symbol in hte linker script.

In U-Boot we don't use that feature and linker script doesn't define
__SDATA_BEGIN__ which gives us the following linkage error if we use
Elf32 tools:
------------------------->8-------------------
  LD      u-boot
.../bin/arc-elf32-ld.bfd: Error: Linker symbol __SDATA_BEGIN__ not found
.../bin/arc-elf32-ld.bfd: final link failed: Bad value
------------------------->8-------------------

Note if uClibc or glibc tools are used that problem doesn't happen
because usage of "small data section" is disabled by default as not very
useful for bigger executables. Moreover GP is just another name of r26
so we're loosing 1 core register which is not used by the compiler as a
generic register with "-msdata".

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-02-15 15:44:47 +03:00
Faiz Abbas
b16c129c22 usb: host: xhci-omap: Remove redundant board_usb_init and board_usb_cleanup functions
board_usb_init()/_cleanup() should be in board files and don't have
a place in the xhci-omap driver. Weak versions for
board_usb_init()/_cleanup() already exist in common/usb.c
(for host mode) and drivers/usb/gadget/g_dnl.c (for gadget mode).

Therefore, remove init and cleanup functions from xhci-omap and
implement them in the board files.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2018-02-15 13:44:30 +01:00
Alexey Brodkin
163f8858ae usb: dwc2: Rename CONFIG_DWC2_UTMI_PHY_WIDTH to CONFIG_DWC2_UTMI_WIDTH
For some reason from day one we used to have both CONFIG_DWC2_UTMI_WIDTH
mentioned in dwc2.h and in scripts/config_whitelist.txt but never really used
and CONFIG_DWC2_UTMI_PHY_WIDTH used in real code in dwc2.c (but never
defined).

Moreover even though CONFIG_DWC2_UTMI_WIDTH might be either 8 or 16
depending on hardware (and the same is said in a comment for it in
dwc2.h) but then 8 is hardcoded in the header leaving no ability to
override this value in board's configuration.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Marek Vasut <marex@denx.de>
2018-02-15 13:44:27 +01:00
Lukasz Majewski
04e2cead60 Convert CONFIG_SYS_BOOTCOUNT_SINGLEWORD to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_BOOTCOUNT_SINGLEWORD

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Tested-by: Alex Kiernan <alex.kiernan@gmail.com>
Reviewed-by: Ian Ray <ian.ray@ge.com>
2018-02-15 07:20:53 -05:00
Lukasz Majewski
d1ec9461f2 Convert CONFIG_BOOTCOUNT_LIMIT to Kconfig
This converts the following to Kconfig:
   CONFIG_BOOTCOUNT_LIMIT

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Tested-by: Alex Kiernan <alex.kiernan@gmail.com>
Reviewed-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
Acked-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
2018-02-15 07:20:53 -05:00
Tom Rini
0c502b6c17 configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-02-14 21:34:50 -05:00
Tom Rini
ac727577f0 Revert "drivers/ddr/fsl: Dual-license DDR driver"
Upon further review, not all code authors are in favour of this change.
This reverts commit ee3556bcaf.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-02-14 21:34:05 -05:00
Simon Goldschmidt
d693742b25 spl: unbreak CONFIG_SPL_MULTI_DTB_FIT after fixing CONFIG_OF_EMBED
With commit 9bd76b8076 ("spl: make CONFIG_OF_EMBED pass dts through
fdtgrep"), CONFIG_SPL_MULTI_DTB_FIT has been broken because
cmd_fdtgrep was now unknown in scripts/Makefile.spl after moving
it to dts/Makefile. This bug has been introduced with v2018.01.

This patch moves cmd_fdtgrep from dts/Makefile to scripts/Makefile.lib
and includes scripts/Makefile.lib in scripts/Makefile.spl.

Fixes: 9bd76b8076 ("spl: make CONFIG_OF_EMBED pass dts through fdtgrep")
Reported-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-02-14 12:14:16 -05:00
Heinrich Schuchardt
0c3fecd0bf cmd: scsi: move CMD_SCSI to device access commands
Configuration option CMD_SCSI should be placed in the same submenu as
CMD_SATA and CMD_MMC.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-02-14 12:14:16 -05:00
Andre Heider
678382c73a arm/PSCI: support PSCI versions greater than 1.0
ATF recently began announcing PSCI v1.1. Since that version is unknown
to u-boot, the PSCI device nodes were not updated.

Switch from the case statement to a greater/less-than comparison so that
v1.1, as well as future versions, get at least the compatible nodes of
known versions.

PSCI v1.1 doesn't seem to have introduced a new corresponding compatible.

Signed-off-by: Andre Heider <a.heider@gmail.com>
2018-02-14 12:14:15 -05:00
Alex Kiernan
d877a6c50e Fix --noheader on fw_printenv
The single argument `--noheader' is expecting isn't taken from getopt
parsing, but instead from the remaining argv arguments.

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
2018-02-14 12:14:15 -05:00
Sam Protsenko
beffc170f2 am335x_evm: Consolidate eMMC partitions with DFU info
>From DFU_ALT_INFO_EMMC (include/environment/ti/dfu.h) we can see that
rootfs will be flashed to second partition on eMMC. But at the moment we
have only one partition in $partitions environment variable. Let's add
"bootloader" partition prior to "rootfs", so that DFU works correctly.
This also fixes eMMC boot, which looks for rootfs on second partition.

"bootloader" partition start corresponds to "u-boot.img.raw" in DFU
eMMC info, which is 0x300 sector (384 KiB offset from eMMC start).

rootfs start address can be also found from DFU eMMC info.
bootloader-related area is finished at 0x1500 sector (2688 KiB offset
from eMMC start). This should be the start address for rootfs in
$partitions environment variable.

While at it, fix U-Boot environment address to be the same as for
AM57x EVM, so that it doesn't clash with other partitions.

So now eMMC layout looks like this:

    ===============================================================

    0       +------------------------+
            | MBR/GPT header         |   128           -
    128     +------------------------+
            | MLO                    |   256           -
    384     +------------------------+
            | u-boot.img             |   1792          bootloader
    2176    +------------------------+
            | //////// hole //////// |   256           -
    2432    +------------------------+
            | U-Boot environment     |   128           -
    2560    +------------------------+
            | U-Boot environment     |   128           -
            | (redundant)            |
    2688    +------------------------+
            | rootfs                 |   remaining     rootfs
    end     +------------------------+

    ===============================================================

"hole" area can be used further for storing U-Boot environment (like
it's done in AM57x EVM config file) or for increasing u-boot.img area
(in case u-boot.img size increased, e.g. if new dtbs were added).

This commit conforms with Linux partition table from f6d245b8c5
("arm: am57xx: Fix Linux boot from eMMC") commit, making things in
uniform way.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-02-14 12:14:14 -05:00
Tom Rini
75670c81e4 configs: Migrate CONFIG_SPL_FRAMEWORK
Migrate the option CONFIG_SPL_FRAMEWORK and make this gate most of the
current set of options we have in Kconfig.  We will need to have some
options available for SPL and !SPL_FRAMEWORK so this is important.  In a
few cases we re-order existing options so that we have less escapes from
the SPL_FRAMEWORK guard.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-02-14 12:14:13 -05:00
Tom Rini
7a88afd080 configs: Drop unused CONFIG_SPL_MMC_MINIMAL
The option CONFIG_SPL_MMC_MINIMAL is unused in code, drop it.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-02-14 12:14:13 -05:00
Faiz Abbas
d8aed6fae8 configs: am335x_evm: Add DYNAMIC_CRC_TABLE
Add CONFIG_DYNAMIC_CRC_TABLE to am335x_evm_defconfig to reduce the
size of the image.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
2018-02-14 12:14:12 -05:00
Faiz Abbas
36c1877c5c lib: Kconfig: Move DYNAMIC_CRC_TABLE to Kconfig
Add CONFIG prefix to DYNAMIC_CRC_TABLE and implement it in
Kconfig.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
2018-02-14 12:14:11 -05:00
Faiz Abbas
7e63ba2f49 configs: am335x_evm: Disable ISO and EFI partitions in SPL
ISO and EFI partition configs in SPL are selected by default.
However, they are not being used.

Therefore, remove ISO and EFI partition support in SPL.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-02-14 12:05:55 -05:00
Simon Goldschmidt
7d531e8a4f arm: update Kconfig help for ENABLE_ARM_SOC_BOOT0_HOOK
When this config is enabled, <asm/arch/boot0.h> is included,
but the Kconfig help says this should be a define
(ARM_SOC_BOOT0_HOOK).

The code for this in arch/arm/lib/vectors.s was changed on
01/02/2017 with commit ce62e57fc5 ("ARM: boot0 hook: remove macro,
include whole header file").

Signed-off-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
2018-02-13 23:24:22 -05:00
Masahiro Yamada
6becd9de6b ARM: image: indent with tab instead of 4 spaces
Commit 6808ef9ac2 ("move booti_setup to arch/arm/lig/image.c")
not only moved the code, but also replaced a tab with 4 spaces
to break the Linux coding style.

Restore tab indentation.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Bin Chen <bin.chen@linaro.org>
2018-02-13 23:24:22 -05:00
Masahiro Yamada
bf14d9a7e1 cmd: booti: fix invalid image address in debug message
With commit 6808ef9ac2 ("move booti_setup to arch/arm/lig/image.c"),
images->ep has not been set at this point.

Fixes: 6808ef9ac2 ("move booti_setup to arch/arm/lig/image.c")
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Bin Chen <bin.chen@linaro.org>
2018-02-13 23:24:22 -05:00
Heinrich Schuchardt
0850d7f7bf efi_driver: comment struct efi_driver_ops
Provide description for struct efi_driver_ops.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-02-13 23:24:22 -05:00
Heinrich Schuchardt
80ee4fc504 dm: core: fix typo in comment (device.h)
%s/Indentiies/Identifies/g

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-02-13 23:24:22 -05:00
Simon Goldschmidt
9095d5b894 fix spelling of 'functions' in 2 places (was 'funtcions')
Signed-off-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
2018-02-13 23:24:22 -05:00
Tom Rini
34a5c4257a SystemACE: Remove
This driver is no longer used on any supported platform in U-Boot and
there is no interest in maintaining it further from people that have
used it historically.

Cc: Simon Glass <sjg@chromium.org>
Cc: Michal Simek <michal.simek@xilinx.com>
c: Alexey Brodkin <alexey.brodkin@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
2018-02-13 23:24:22 -05:00
Tuomas Tynkkynen
fbca0e66cc spi: Migrate CONFIG_CF_SPI to Kconfig
Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
2018-02-13 23:01:44 -05:00
Tuomas Tynkkynen
4a942f49b8 spi: Migrate CONFIG_KIRKWOOD_SPI to Kconfig
Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
2018-02-13 23:01:44 -05:00
Tuomas Tynkkynen
2c4b096b4c spi: Migrate CONFIG_LPC32XX_SSP to Kconfig
Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
2018-02-13 23:01:44 -05:00
Tuomas Tynkkynen
bbdf38698e spi: Migrate CONFIG_MPC8XXX_SPI to Kconfig
Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
2018-02-13 23:01:44 -05:00
Tuomas Tynkkynen
60e5456291 spi: Migrate CONFIG_MXC_SPI to Kconfig
Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
2018-02-13 23:01:44 -05:00
Tuomas Tynkkynen
7b819b569e spi: Migrate CONFIG_MXS_SPI to Kconfig
Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
2018-02-13 23:00:53 -05:00
Tuomas Tynkkynen
a5dfabea19 spi: Migrate CONFIG_SH_QSPI to Kconfig
Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
2018-02-13 23:00:47 -05:00
Tuomas Tynkkynen
95d3877a58 spi: Migrate CONFIG_SH_SPI to Kconfig
Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
2018-02-13 23:00:29 -05:00
Max Filippov
4d69009462 .travis.yml: test xtensa xtfpga board in QEMU
This allows running tests on emulated KC705 board with DC233C xtensa
core. It expects to find conf.xtfpga_qemu in the uboot-test-hooks.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2018-02-13 23:00:29 -05:00
Max Filippov
64c26fee05 xtfpga: enable hush parser
Remove CONFIG_BOOT_RETRY_TIME as it doesn't do much good and enable
CONFIG_HUSH_PARSER in xtfpga_defconfig.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2018-02-13 23:00:29 -05:00
Max Filippov
b6f3a12ef8 .travis.yml: download xtensa prebuilt toolchain
xtensa toolchains are core-specific, so give full toolchain name and
download corresponding prebuilt toolchain from the github release.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2018-02-13 23:00:29 -05:00
Bin Meng
244ce78a04 microblaze: bootm: Fix compiler warning
Fix build warning in arch/microblaze/lib/bootm.c with gcc 7.3.0:

  warning: this 'if' clause does not guard... [-Wmisleading-indentation]

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Michal Simek <michal.simek@xilinx.com>
2018-02-13 20:34:07 -05:00
Bin Meng
d679a529a4 arm: omap2: Fix compiler warning
Fix build warning in arch/arm/mach-omap2/emif-common.c and
arch/arm/mach-omap2/omap4/emif.c with gcc 7.3.0:

  warning: duplicate 'const' declaration specifier [-Wduplicate-decl-specifier]

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-02-13 20:34:07 -05:00
Bin Meng
e48be29ef3 video: ivybridge_igd: Fix compiler warning
Fix build warning in drivers/video/ivybridge_igd.c with gcc 7.3.0:

  warning: 'ivb_pm_gt2' defined but not used [-Wunused-const-variable=]

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-02-13 20:34:07 -05:00
Marek Vasut
175c3e3ade tftp: update: Include missing cfi_flash.h header
Add the missing header, otherwise CONFIG_SYS_MAX_FLASH_BANKS
may be undeclared.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Tom Rini <trini@konsulko.com>
2018-02-13 20:34:07 -05:00
Marek Vasut
b254c5291d cmd: fitupd: Convert CONFIG_UPDATE_TFTP and co.
Convert the CONFIG_UPDATE_TFTP and related symbols to Kconfig.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Tom Rini <trini@konsulko.com>
2018-02-13 20:34:07 -05:00
Marek Vasut
ac08432a4c cmd: fitupd: Convert CONFIG_CMD_FITUPD
Convert the CONFIG_CMD_FITUPD symbol to Kconfig.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Tom Rini <trini@konsulko.com>
2018-02-13 20:34:07 -05:00
Tom Rini
85f855cf02 Merge git://git.denx.de/u-boot-rockchip 2018-02-13 10:51:00 -05:00
Philipp Tomsich
a5af51a703 spl: fit: move fdt_record_loadable out of ARCH_FIXUP_FDT_MEMORY guard
The fdt_record_loadable()-function was wedged between other functions
that were guarded by ARCH_FIXUP_FDT_MEMORY.  This could lead to linker
errors on some configurations.

With this change, fdt_record_loadable() is moved out of the
ARCH_FIXUP_FDT_MEMORY guard (plus I tried to retain alphabetical
ordering for functions by placing it appropriately).

References: 9f45aeb ("spl: fit: implement fdt_record_loadable")
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reported-by: Michal Simek <michal.simek@xilinx.com>
Tested-by: Michal Simek <michal.simek@xilinx.com>
2018-02-13 12:52:57 +01:00
Heinrich Schuchardt
6e5308c4b8 rockchip: gpio: remove dead code
In the following statements
if (a) return a; if (a) return c;
the second return can never be executed.

Identified by cppcheck.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-02-13 12:52:47 +01:00
1669 changed files with 9188 additions and 6710 deletions

View File

@@ -72,7 +72,11 @@ before_script:
wget https://github.com/foss-for-synopsys-dwc-arc-processors/toolchain/releases/download/arc-2016.09-release/arc_gnu_2016.09_prebuilt_uclibc_le_archs_linux_install.tar.gz &&
tar -C /tmp -xf arc_gnu_2016.09_prebuilt_uclibc_le_archs_linux_install.tar.gz;
fi
- if [[ "${TOOLCHAIN}" == *xtensa* ]]; then ./tools/buildman/buildman --fetch-arch xtensa ; fi
- if [[ "${TOOLCHAIN}" == *xtensa* ]]; then
wget https://github.com/foss-xtensa/toolchain/releases/download/2018.02/x86_64-2018.02-${TOOLCHAIN}.tar.gz &&
tar -C /tmp -xf x86_64-2018.02-${TOOLCHAIN}.tar.gz &&
echo -e "\n[toolchain-prefix]\nxtensa = /tmp/2018.02/${TOOLCHAIN}/bin/${TOOLCHAIN}-" >> ~/.buildman;
fi
# If TOOLCHAIN is unset, we're on some flavour of ARM.
- if [[ "${TOOLCHAIN}" == "" ]]; then
wget http://releases.linaro.org/components/toolchain/binaries/6.3-2017.02/aarch64-linux-gnu/gcc-linaro-6.3.1-2017.02-x86_64_aarch64-linux-gnu.tar.xz &&
@@ -271,7 +275,7 @@ matrix:
BUILDMAN="xilinx -x microblaze"
- env:
- BUILDMAN="xtensa"
TOOLCHAIN="xtensa"
TOOLCHAIN="xtensa-dc233c-elf"
- env:
- BUILDMAN="riscv"
TOOLCHAIN="riscv"
@@ -384,5 +388,12 @@ matrix:
QEMU_TARGET="arm-softmmu"
TEST_PY_ID="--id qemu"
BUILDMAN="^zynq_zc702$"
- env:
- TEST_PY_BD="xtfpga"
TEST_PY_TEST_SPEC="not sleep"
QEMU_TARGET="xtensa-softmmu"
TEST_PY_ID="--id qemu"
BUILDMAN="^xtfpga$"
TOOLCHAIN="xtensa-dc233c-elf"
# TODO make it perfect ;-r

32
Kconfig
View File

@@ -69,20 +69,44 @@ config DISTRO_DEFAULTS
imply USE_BOOTCOMMAND
select CMD_BOOTZ if ARM && !ARM64
select CMD_BOOTI if ARM64
select CMD_DHCP if NET
select CMD_PXE if NET
select CMD_DHCP if NET && CMD_NET
select CMD_PXE if NET && CMD_NET
select CMD_EXT2
select CMD_EXT4
select CMD_FAT
select CMD_FS_GENERIC
select CMD_MII if NET
imply CMD_MII if NET
select CMD_PING if NET
select CMD_PART
select CMD_PART if PARTITIONS
select HUSH_PARSER
select BOOTP_BOOTPATH if NET && CMD_NET
select BOOTP_DNS if NET && CMD_NET
select BOOTP_GATEWAY if NET && CMD_NET
select BOOTP_HOSTNAME if NET && CMD_NET
select BOOTP_PXE if NET && CMD_NET
select BOOTP_SUBNETMASK if NET && CMD_NET
select CMDLINE_EDITING
select AUTO_COMPLETE
select SYS_LONGHELP
select SUPPORT_RAW_INITRD
select ENV_VARS_UBOOT_CONFIG
help
Select this to enable various options and commands which are suitable
for building u-boot for booting general purpose Linux distributions.
config ENV_VARS_UBOOT_CONFIG
bool "Add arch, board, vendor and soc variables to default environment"
help
Define this in order to add variables describing the
U-Boot build configuration to the default environment.
These will be named arch, cpu, board, vendor, and soc.
Enabling this option will cause the following to be defined:
- CONFIG_SYS_ARCH
- CONFIG_SYS_CPU
- CONFIG_SYS_BOARD
- CONFIG_SYS_VENDOR
- CONFIG_SYS_SOC
config SYS_BOOT_GET_CMDLINE
bool "Enable kernel command line setup"
help

View File

@@ -59,12 +59,6 @@ S: Maintained
T: git git://git.denx.de/u-boot-arc.git
F: arch/arc/
ARC HSDK CREG GPIO
M: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
S: Maintained
L: uboot-snps-arc@synopsys.com
F: drivers/gpio/hsdk-creg-gpio.c
ARC HSDK CGU CLOCK
M: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
S: Maintained
@@ -73,6 +67,12 @@ F: drivers/clk/clk-hsdk-cgu.c
F: include/dt-bindings/clock/snps,hsdk-cgu.h
F: doc/device-tree-bindings/clock/snps,hsdk-cgu.txt
ARC HSDK CREG GPIO
M: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
S: Maintained
L: uboot-snps-arc@synopsys.com
F: drivers/gpio/hsdk-creg-gpio.c
ARM
M: Albert Aribaud <albert.u.boot@aribaud.net>
S: Maintained
@@ -163,6 +163,7 @@ F: drivers/misc/rockchip-efuse.c
F: drivers/pinctrl/rockchip/
F: drivers/ram/rockchip/
F: drivers/sysreset/sysreset_rockchip.c
F: drivers/video/rockchip/
F: tools/rkcommon.c
F: tools/rkcommon.h
F: tools/rkimage.c
@@ -184,6 +185,12 @@ M: Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
S: Maintained
F: arch/arm/mach-snapdragon/
ARM STI
M: Patrice Chotard <patrice.chotard@st.com>
S: Maintained
F: arch/arm/mach-sti/
F: arch/arm/include/asm/arch-sti*/
ARM STM SPEAR
#M: Vipin Kumar <vipin.kumar@st.com>
S: Orphaned (Since 2016-02)
@@ -197,12 +204,6 @@ S: Maintained
F: arch/arm/cpu/armv7/stv0991/
F: arch/arm/include/asm/arch-stv0991/
ARM STI
M: Patrice Chotard <patrice.chotard@st.com>
S: Maintained
F: arch/arm/mach-sti/
F: arch/arm/include/asm/arch-sti*/
ARM SUNXI
M: Jagan Teki <jagan@openedev.com>
M: Maxime Ripard <maxime.ripard@bootlin.com>
@@ -353,11 +354,48 @@ S: Maintained
T: git git://git.denx.de/u-boot-mmc.git
F: drivers/mmc/
NAND FLASH
M: Scott Wood <oss@buserror.net>
S: Maintained
T: git git://git.denx.de/u-boot-nand-flash.git
F: drivers/mtd/nand/
NDS32
M: Macpaul Lin <macpaul@andestech.com>
S: Maintained
T: git git://git.denx.de/u-boot-nds32.git
F: arch/nds32/
NETWORK
M: Joe Hershberger <joe.hershberger@ni.com>
S: Maintained
T: git git://git.denx.de/u-boot-net.git
F: drivers/net/
F: net/
NIOS
M: Thomas Chou <thomas@wytron.com.tw>
S: Maintained
T: git git://git.denx.de/u-boot-nios.git
F: arch/nios2/
ONENAND
#M: Lukasz Majewski <l.majewski@majess.pl>
S: Orphaned (Since 2017-01)
T: git git://git.denx.de/u-boot-onenand.git
F: drivers/mtd/onenand/
PATMAN
M: Simon Glass <sjg@chromium.org>
S: Maintained
F: tools/patman/
POWER
M: Jaehoon Chung <jh80.chung@samsung.com>
S: Maintained
T: git git://git.denx.de/u-boot-pmic.git
F: drivers/power/
POWERPC
M: Wolfgang Denk <wd@denx.de>
S: Maintained
@@ -394,43 +432,6 @@ S: Maintained
T: git git://git.denx.de/u-boot-ppc4xx.git
F: arch/powerpc/cpu/ppc4xx/
POWER
M: Jaehoon Chung <jh80.chung@samsung.com>
S: Maintained
T: git git://git.denx.de/u-boot-pmic.git
F: drivers/power/
NETWORK
M: Joe Hershberger <joe.hershberger@ni.com>
S: Maintained
T: git git://git.denx.de/u-boot-net.git
F: drivers/net/
F: net/
NAND FLASH
M: Scott Wood <oss@buserror.net>
S: Maintained
T: git git://git.denx.de/u-boot-nand-flash.git
F: drivers/mtd/nand/
NDS32
M: Macpaul Lin <macpaul@andestech.com>
S: Maintained
T: git git://git.denx.de/u-boot-nds32.git
F: arch/nds32/
NIOS
M: Thomas Chou <thomas@wytron.com.tw>
S: Maintained
T: git git://git.denx.de/u-boot-nios.git
F: arch/nios2/
ONENAND
#M: Lukasz Majewski <l.majewski@majess.pl>
S: Orphaned (Since 2017-01)
T: git git://git.denx.de/u-boot-onenand.git
F: drivers/mtd/onenand/
RISC-V
M: Rick Chen <rick@andestech.com>
S: Maintained
@@ -438,6 +439,13 @@ T: git git://git.denx.de/u-boot-riscv.git
F: arch/riscv/
F: tools/prelink-riscv.c
ROCKUSB
M: Eddie Cai <eddie.cai.linux@gmail.com>
S: Maintained
F: drivers/usb/gadget/f_rockusb.c
F: cmd/rockusb.c
F: doc/README.rockusb
SANDBOX
M: Simon Glass <sjg@chromium.org>
S: Maintained
@@ -503,13 +511,6 @@ S: Maintained
T: git git://git.denx.de/u-boot-usb.git topic-xhci
F: drivers/usb/host/xhci*
ROCKUSB
M: Eddie Cai <eddie.cai.linux@gmail.com>
S: Maintained
F: drivers/usb/gadget/f_rockusb.c
F: cmd/rockusb.c
F: doc/README.rockusb
VIDEO
M: Anatolij Gustschin <agust@denx.de>
S: Maintained

View File

@@ -5,7 +5,7 @@
VERSION = 2018
PATCHLEVEL = 03
SUBLEVEL =
EXTRAVERSION = -rc2
EXTRAVERSION =
NAME =
# *DOCUMENTATION*
@@ -820,7 +820,7 @@ LDFLAGS_u-boot += $(LDFLAGS_FINAL)
# Avoid 'Not enough room for program headers' error on binutils 2.28 onwards.
LDFLAGS_u-boot += $(call ld-option, --no-dynamic-linker)
ifneq ($(CONFIG_SYS_TEXT_BASE),)
ifeq ($(CONFIG_ARC)$(CONFIG_NIOS2)$(CONFIG_X86)$(CONFIG_XTENSA),)
LDFLAGS_u-boot += -Ttext $(CONFIG_SYS_TEXT_BASE)
endif
@@ -926,6 +926,16 @@ OBJCOPYFLAGS_u-boot.srec := -O srec
u-boot.hex u-boot.srec: u-boot FORCE
$(call if_changed,objcopy)
OBJCOPYFLAGS_u-boot-elf.srec := $(OBJCOPYFLAGS_u-boot.srec)
u-boot-elf.srec: u-boot.elf FORCE
$(call if_changed,objcopy)
OBJCOPYFLAGS_u-boot-spl.srec = $(OBJCOPYFLAGS_u-boot.srec)
spl/u-boot-spl.srec: spl/u-boot-spl FORCE
$(call if_changed,objcopy)
OBJCOPYFLAGS_u-boot-nodtb.bin := -O binary \
$(if $(CONFIG_X86_16BIT_INIT),-R .start16 -R .resetvec)

98
README
View File

@@ -713,22 +713,6 @@ The following options need to be configured:
as a convenience, when switching between booting from
RAM and NFS.
- Bootcount:
CONFIG_BOOTCOUNT_LIMIT
Implements a mechanism for detecting a repeating reboot
cycle, see:
http://www.denx.de/wiki/view/DULG/UBootBootCountLimit
CONFIG_BOOTCOUNT_ENV
If no softreset save registers are found on the hardware
"bootcount" is stored in the environment. To prevent a
saveenv on all reboots, the environment variable
"upgrade_available" is used. If "upgrade_available" is
0, "bootcount" is always 0, if "upgrade_available" is
1 "bootcount" is incremented in the environment.
So the Userspace Applikation must set the "upgrade_available"
and "bootcount" variable to 0, if a boot was successfully.
- Pre-Boot Commands:
CONFIG_PREBOOT
@@ -1203,7 +1187,7 @@ The following options need to be configured:
key for the Replay Protection Memory Block partition in eMMC.
- USB Device Firmware Update (DFU) class support:
CONFIG_USB_FUNCTION_DFU
CONFIG_DFU_OVER_USB
This enables the USB portion of the DFU USB class
CONFIG_DFU_MMC
@@ -1543,14 +1527,8 @@ The following options need to be configured:
You can fine tune the DHCP functionality by defining
CONFIG_BOOTP_* symbols:
CONFIG_BOOTP_SUBNETMASK
CONFIG_BOOTP_GATEWAY
CONFIG_BOOTP_HOSTNAME
CONFIG_BOOTP_NISDOMAIN
CONFIG_BOOTP_BOOTPATH
CONFIG_BOOTP_BOOTFILESIZE
CONFIG_BOOTP_DNS
CONFIG_BOOTP_DNS2
CONFIG_BOOTP_SEND_HOSTNAME
CONFIG_BOOTP_NTPSERVER
CONFIG_BOOTP_TIMEOFFSET
@@ -1566,15 +1544,6 @@ The following options need to be configured:
to Link-local IP address configuration if the DHCP server
is not available.
CONFIG_BOOTP_DNS2 - If a DHCP client requests the DNS
serverip from a DHCP server, it is possible that more
than one DNS serverip is offered to the client.
If CONFIG_BOOTP_DNS2 is enabled, the secondary DNS
serverip will be stored in the additional environment
variable "dnsip2". The first DNS serverip is always
stored in the variable "dnsip", when CONFIG_BOOTP_DNS
is defined.
CONFIG_BOOTP_SEND_HOSTNAME - Some DHCP servers are capable
to do a dynamic update of a DNS server. To do this, they
need the hostname of the DHCP requester.
@@ -2001,11 +1970,6 @@ The following options need to be configured:
SPI EEPROM, also an instance works with Crystal A/D and
D/As on the SACSng board)
CONFIG_SH_SPI
Enables the driver for SPI controller on SuperH. Currently
only SH7757 is supported.
CONFIG_SOFT_SPI
Enables a software (bit-bang) SPI driver rather than
@@ -2024,11 +1988,6 @@ The following options need to be configured:
Currently supported on some MPC8xxx processors. For an
example, see include/configs/mpc8349emds.h.
CONFIG_MXC_SPI
Enables the driver for the SPI controllers on i.MX and MXC
SoCs. Currently i.MX31/35/51 are supported.
CONFIG_SYS_SPI_MXC_WAIT
Timeout for waiting until spi transfer completed.
default: (CONFIG_SYS_HZ/100) /* 10 ms */
@@ -2197,10 +2156,6 @@ The following options need to be configured:
#define CONFIG_NFS_TIMEOUT 10000UL
- Command Interpreter:
CONFIG_AUTO_COMPLETE
Enable auto completion of commands using TAB.
CONFIG_SYS_PROMPT_HUSH_PS2
This defines the secondary prompt string, which is
@@ -2229,12 +2184,6 @@ The following options need to be configured:
symbols.
- Command Line Editing and History:
CONFIG_CMDLINE_EDITING
Enable editing and History functions for interactive
command line input operations
- Command Line PS1/PS2 support:
CONFIG_CMDLINE_PS_SUPPORT
Enable support for changing the command prompt string
@@ -2268,20 +2217,6 @@ The following options need to be configured:
the environment like the "source" command or the
boot command first.
CONFIG_ENV_VARS_UBOOT_CONFIG
Define this in order to add variables describing the
U-Boot build configuration to the default environment.
These will be named arch, cpu, board, vendor, and soc.
Enabling this option will cause the following to be defined:
- CONFIG_SYS_ARCH
- CONFIG_SYS_CPU
- CONFIG_SYS_BOARD
- CONFIG_SYS_VENDOR
- CONFIG_SYS_SOC
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
Define this in order to add variables describing certain
@@ -2332,32 +2267,6 @@ The following options need to be configured:
A better solution is to properly configure the firewall,
but sometimes that is not allowed.
- bootcount support:
CONFIG_BOOTCOUNT_LIMIT
This enables the bootcounter support, see:
http://www.denx.de/wiki/DULG/UBootBootCountLimit
CONFIG_AT91SAM9XE
enable special bootcounter support on at91sam9xe based boards.
CONFIG_SOC_DA8XX
enable special bootcounter support on da850 based boards.
CONFIG_BOOTCOUNT_RAM
enable support for the bootcounter in RAM
CONFIG_BOOTCOUNT_I2C
enable support for the bootcounter on an i2c (like RTC) device.
CONFIG_SYS_I2C_RTC_ADDR = i2c chip address
CONFIG_SYS_BOOTCOUNT_ADDR = i2c addr which is used for
the bootcounter.
CONFIG_BOOTCOUNT_ALEN = address len
CONFIG_BOOTCOUNT_EXT
enable support for the bootcounter in EXT filesystem
CONFIG_SYS_BOOTCOUNT_ADDR = RAM address used for read
and write.
CONFIG_SYS_BOOTCOUNT_EXT_INTERFACE = interface
CONFIG_SYS_BOOTCOUNT_EXT_DEVPART = device and part
CONFIG_SYS_BOOTCOUNT_EXT_NAME = filename
- Show boot progress:
CONFIG_SHOW_BOOT_PROGRESS
@@ -2714,11 +2623,6 @@ FIT uImage format:
CONFIG_SYS_SPL_MALLOC_SIZE
The size of the malloc pool used in SPL.
CONFIG_SPL_FRAMEWORK
Enable the SPL framework under common/. This framework
supports MMC, NAND and YMODEM loading of U-Boot and NAND
NAND loading of the Linux Kernel.
CONFIG_SPL_OS_BOOT
Enable booting directly to an OS from SPL.
See also: doc/README.falcon

View File

@@ -50,7 +50,7 @@ ifdef CONFIG_CPU_ARCHS38
PLATFORM_CPPFLAGS += -mcpu=archs
endif
PLATFORM_CPPFLAGS += -ffixed-r25 -D__ARC__ -gdwarf-2
PLATFORM_CPPFLAGS += -ffixed-r25 -D__ARC__ -gdwarf-2 -mno-sdata
# Needed for relocation
LDFLAGS_FINAL += -pie

View File

@@ -37,11 +37,6 @@ void arch_lmb_reserve(struct lmb *lmb)
lmb_reserve(lmb, sp, (CONFIG_SYS_SDRAM_BASE + gd->ram_size - sp));
}
int arch_fixup_fdt(void *blob)
{
return 0;
}
static int cleanup_before_linux(void)
{
disable_interrupts();

View File

@@ -287,9 +287,8 @@ config ENABLE_ARM_SOC_BOOT0_HOOK
bool "prepare BOOT0 header"
help
If the SoC's BOOT0 requires a header area filled with (magic)
values, then choose this option, and create a define called
ARM_SOC_BOOT0_HOOK which contains the required assembler
preprocessor code.
values, then choose this option, and create a file included as
<asm/arch/boot0.h> which contains the required assembler code.
config ARM_CORTEX_CPU_IS_UP
bool
@@ -699,16 +698,17 @@ config ARCH_SOCFPGA
select OF_CONTROL
select SPL_OF_CONTROL
select DM
select DM_SPI_FLASH
select DM_SPI
select ENABLE_ARM_SOC_BOOT0_HOOK
select ARCH_EARLY_INIT_R
select ARCH_MISC_INIT
select SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
select SYS_THUMB_BUILD
imply CMD_MTDPARTS
imply CRC32_VERIFY
imply DM_SPI
imply DM_SPI_FLASH
imply FAT_WRITE
imply HW_WATCHDOG
imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
config ARCH_SUNXI
bool "Support sunxi (Allwinner) SoCs"
@@ -1190,6 +1190,16 @@ config ARCH_ASPEED
endchoice
config TI_SECURE_DEVICE
bool "HS Device Type Support"
depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS
help
If a high secure (HS) device type is being used, this config
must be set. This option impacts various aspects of the
build system (to create signed boot images that can be
authenticated) and the code. See the doc/README.ti-secure
file for further details.
source "arch/arm/mach-aspeed/Kconfig"
source "arch/arm/mach-at91/Kconfig"

View File

@@ -5,7 +5,7 @@
*/
#include <common.h>
#include <libfdt.h>
#include <linux/libfdt.h>
#include <fdt_support.h>
#include <asm/io.h>
#include <asm/processor.h>

View File

@@ -21,7 +21,7 @@
#include <linux/ctype.h>
#include <linux/types.h>
#include <asm/global_data.h>
#include <libfdt.h>
#include <linux/libfdt.h>
#include <fdt_support.h>
#include <asm/armv7.h>
#include <asm/psci.h>

View File

@@ -6,7 +6,7 @@
#include <common.h>
#include <efi_loader.h>
#include <libfdt.h>
#include <linux/libfdt.h>
#include <fdt_support.h>
#include <phy.h>
#ifdef CONFIG_FSL_LSCH3

View File

@@ -6,7 +6,7 @@
*/
#include <common.h>
#include <libfdt.h>
#include <linux/libfdt.h>
#include <asm/spin_table.h>
int spin_table_update_dt(void *fdt)

View File

@@ -96,6 +96,9 @@ config SPL_ZYNQMP_ALT_BOOTMODE_ENABLED
Overwrite bootmode selected via boot mode pins to tell SPL what should
be the next boot device.
config ZYNQ_SDHCI_MAX_FREQ
default 200000000
config SPL_ZYNQMP_ALT_BOOTMODE
hex
default 0x0 if JTAG_MODE

View File

@@ -177,6 +177,7 @@ dtb-$(CONFIG_ARCH_SOCFPGA) += \
socfpga_cyclone5_is1.dtb \
socfpga_cyclone5_mcvevk.dtb \
socfpga_cyclone5_socdk.dtb \
socfpga_cyclone5_dbm_soc1.dtb \
socfpga_cyclone5_de0_nano_soc.dtb \
socfpga_cyclone5_de1_soc.dtb \
socfpga_cyclone5_de10_nano.dtb \
@@ -396,7 +397,6 @@ dtb-$(CONFIG_MX6) += imx6ull-14x14-evk.dtb \
imx6sx-sdb.dtb \
imx6ul-geam-kit.dtb \
imx6ul-isiot-emmc.dtb \
imx6ul-isiot-mmc.dtb \
imx6ul-isiot-nand.dtb \
imx6ul-opos6uldev.dtb
@@ -410,6 +410,7 @@ dtb-$(CONFIG_RCAR_GEN3) += \
r8a7795-salvator-x.dtb \
r8a7796-m3ulcb.dtb \
r8a7796-salvator-x.dtb \
r8a77965-salvator-x.dtb \
r8a77970-eagle.dtb \
r8a77995-draak.dtb

View File

@@ -25,6 +25,11 @@
pinctrl-1 = <&mmc1_pins_hs>;
vmmc-supply = <&ldo1_reg>;
/delete-property/ sd-uhs-sdr104;
/delete-property/ sd-uhs-sdr50;
/delete-property/ sd-uhs-ddr50;
/delete-property/ sd-uhs-sdr25;
/delete-property/ sd-uhs-sdr12;
};
&mmc2 {
@@ -32,6 +37,7 @@
pinctrl-0 = <&mmc2_pins_default>;
pinctrl-1 = <&mmc2_pins_hs>;
pinctrl-2 = <&mmc2_pins_ddr_3_3v_rev11 &mmc2_iodelay_ddr_3_3v_rev11_conf>;
/delete-property/ mmc-hs200-1_8v;
};
/* errata i880 "Ethernet RGMII2 Limited to 10/100 Mbps" */

View File

@@ -413,6 +413,8 @@
bus-width = <8>;
ti,non-removable;
max-frequency = <96000000>;
no-1-8-v;
/delete-property/ mmc-hs200-1_8v;
};
&dcan1 {

View File

@@ -1056,7 +1056,7 @@
};
mmc1: mmc@4809c000 {
compatible = "ti,omap4-hsmmc";
compatible = "ti,dra7-hsmmc", "ti,omap4-hsmmc";
reg = <0x4809c000 0x400>;
interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "mmc1";
@@ -1067,10 +1067,15 @@
status = "disabled";
pbias-supply = <&pbias_mmc_reg>;
max-frequency = <192000000>;
sd-uhs-sdr104;
sd-uhs-sdr50;
sd-uhs-ddr50;
sd-uhs-sdr25;
sd-uhs-sdr12;
};
mmc2: mmc@480b4000 {
compatible = "ti,omap4-hsmmc";
compatible = "ti,dra7-hsmmc", "ti,omap4-hsmmc";
reg = <0x480b4000 0x400>;
interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "mmc2";
@@ -1079,10 +1084,14 @@
dma-names = "tx", "rx";
status = "disabled";
max-frequency = <192000000>;
sd-uhs-sdr25;
sd-uhs-sdr12;
mmc-hs200-1_8v;
mmc-ddr-1_8v;
};
mmc3: mmc@480ad000 {
compatible = "ti,omap4-hsmmc";
compatible = "ti,dra7-hsmmc", "ti,omap4-hsmmc";
reg = <0x480ad000 0x400>;
interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "mmc3";
@@ -1092,10 +1101,13 @@
status = "disabled";
/* Errata i887 limits max-frequency of MMC3 to 64 MHz */
max-frequency = <64000000>;
sd-uhs-sdr12;
sd-uhs-sdr25;
sd-uhs-sdr50;
};
mmc4: mmc@480d1000 {
compatible = "ti,omap4-hsmmc";
compatible = "ti,dra7-hsmmc", "ti,omap4-hsmmc";
reg = <0x480d1000 0x400>;
interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "mmc4";
@@ -1104,6 +1116,8 @@
dma-names = "tx", "rx";
status = "disabled";
max-frequency = <192000000>;
sd-uhs-sdr12;
sd-uhs-sdr25;
};
mmu0_dsp1: mmu@40d01000 {

View File

@@ -41,7 +41,7 @@
/dts-v1/;
#include "imx6q.dtsi"
#include "imx6dl.dtsi"
#include "imx6qdl-icore-rqs.dtsi"
/ {

View File

@@ -114,9 +114,14 @@
};
&usdhc4 {
pinctrl-names = "default";
u-boot,dm-spl;
pinctrl-names = "default", "state_100mhz", "state_200mhz";
pinctrl-0 = <&pinctrl_usdhc4>;
pinctrl-1 = <&pinctrl_usdhc4_100mhz>;
pinctrl-2 = <&pinctrl_usdhc4_200mhz>;
bus-witdh = <8>;
no-1-8-v;
non-removable;
status = "okay";
};
@@ -183,6 +188,7 @@
};
pinctrl_usdhc4: usdhc4grp {
u-boot,dm-spl;
fsl,pins = <
MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17070
MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10070
@@ -196,4 +202,35 @@
MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17070
>;
};
pinctrl_usdhc4_100mhz: usdhc4grp_100mhz {
fsl,pins = <
MX6QDL_PAD_SD4_CMD__SD4_CMD 0x170B1
MX6QDL_PAD_SD4_CLK__SD4_CLK 0x100B1
MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x170B1
MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x170B1
MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x170B1
MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x170B1
MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x170B1
MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x170B1
MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x170B1
MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x170B1
>;
};
pinctrl_usdhc4_200mhz: usdhc4grp_200mhz {
fsl,pins = <
MX6QDL_PAD_SD4_CMD__SD4_CMD 0x170F9
MX6QDL_PAD_SD4_CLK__SD4_CLK 0x100F9
MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x170F9
MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x170F9
MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x170F9
MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x170F9
MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x170F9
MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x170F9
MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x170F9
MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x170F9
>;
};
};

View File

@@ -1,50 +0,0 @@
/*
* Copyright (C) 2016 Amarula Solutions B.V.
* Copyright (C) 2016 Engicam S.r.l.
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This file is distributed in the hope that it will be useful
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
/dts-v1/;
#include "imx6ul-isiot.dtsi"
/ {
model = "Engicam Is.IoT MX6UL MMC Starterkit";
compatible = "engicam,imx6ul-isiot", "fsl,imx6ul";
};

View File

@@ -33,11 +33,12 @@
hsusb2_phy: hsusb2_phy {
compatible = "usb-nop-xceiv";
reset-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; /* gpio_4 */
#phy-cells = <0>;
};
};
&gpmc {
ranges = <0 0 0x00000000 0x1000000>; /* CS0: 16MB for NAND */
ranges = <0 0 0x30000000 0x1000000>; /* CS0: 16MB for NAND */
nand@0,0 {
compatible = "ti,omap2-nand";
@@ -66,38 +67,11 @@
gpmc,device-width = <2>;
#address-cells = <1>;
#size-cells = <1>;
/* u-boot uses mtdparts=omap2-nand.0:512k(x-loader),1920k(u-boot),128k(u-boot-env),4m(kernel),-(fs) */
x-loader@0 {
label = "x-loader";
reg = <0 0x80000>;
};
bootloaders@80000 {
label = "u-boot";
reg = <0x80000 0x1e0000>;
};
bootloaders_env@260000 {
label = "u-boot-env";
reg = <0x260000 0x20000>;
};
kernel@280000 {
label = "kernel";
reg = <0x280000 0x400000>;
};
filesystem@680000 {
label = "fs";
reg = <0x680000 0>; /* 0 = MTDPART_SIZ_FULL */
};
};
};
&i2c1 {
clock-frequency = <400000>;
clock-frequency = <2600000>;
twl: twl@48 {
reg = <0x48>;
@@ -121,7 +95,7 @@
&mmc3 {
interrupts-extended = <&intc 94 &omap3_pmx_core2 0x46>;
pinctrl-0 = <&mmc3_pins>;
pinctrl-0 = <&mmc3_pins &wl127x_gpio>;
pinctrl-names = "default";
vmmc-supply = <&wl12xx_vmmc>;
non-removable;
@@ -132,8 +106,8 @@
wlcore: wlcore@2 {
compatible = "ti,wl1273";
reg = <2>;
interrupt-parent = <&gpio5>;
interrupts = <24 IRQ_TYPE_LEVEL_HIGH>; /* gpio 152 */
interrupt-parent = <&gpio1>;
interrupts = <2 IRQ_TYPE_LEVEL_HIGH>; /* gpio 2 */
ref-clock-frequency = <26000000>;
};
};
@@ -157,8 +131,6 @@
OMAP3_CORE1_IOPAD(0x2166, PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc2_dat5.sdmmc3_dat1 */
OMAP3_CORE1_IOPAD(0x2168, PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc2_dat6.sdmmc3_dat2 */
OMAP3_CORE1_IOPAD(0x216a, PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc2_dat6.sdmmc3_dat3 */
OMAP3_CORE1_IOPAD(0x2184, PIN_INPUT_PULLUP | MUX_MODE4) /* mcbsp4_clkx.gpio_152 */
OMAP3_CORE1_IOPAD(0x2a0c, PIN_OUTPUT | MUX_MODE4) /* sys_boot1.gpio_3 */
OMAP3_CORE1_IOPAD(0x21d0, PIN_INPUT_PULLUP | MUX_MODE3) /* mcspi1_cs1.sdmmc3_cmd */
OMAP3_CORE1_IOPAD(0x21d2, PIN_INPUT_PULLUP | MUX_MODE3) /* mcspi1_cs2.sdmmc_clk */
>;
@@ -228,6 +200,12 @@
OMAP3_WKUP_IOPAD(0x2a0e, PIN_OUTPUT | MUX_MODE4) /* sys_boot2.gpio_4 */
>;
};
wl127x_gpio: pinmux_wl127x_gpio_pin {
pinctrl-single,pins = <
OMAP3_WKUP_IOPAD(0x2a0c, PIN_INPUT | MUX_MODE4) /* sys_boot0.gpio_2 */
OMAP3_WKUP_IOPAD(0x2a0c, PIN_OUTPUT | MUX_MODE4) /* sys_boot1.gpio_3 */
>;
};
};
&omap3_pmx_core2 {

View File

@@ -8,19 +8,112 @@
/dts-v1/;
#include "r8a7790.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
model = "Stout";
compatible = "renesas,stout", "renesas,r8a7790";
aliases {
serial0 = &scif0;
serial0 = &scifa0;
};
chosen {
bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
stdout-path = "serial0:115200n8";
};
memory@40000000 {
device_type = "memory";
reg = <0 0x40000000 0 0x40000000>;
};
leds {
compatible = "gpio-leds";
led1 {
gpios = <&gpio4 22 GPIO_ACTIVE_LOW>;
};
led2 {
gpios = <&gpio4 23 GPIO_ACTIVE_LOW>;
};
led3 {
gpios = <&gpio5 17 GPIO_ACTIVE_LOW>;
};
led5 {
gpios = <&gpio4 24 GPIO_ACTIVE_LOW>;
};
};
fixedregulator3v3: regulator-3v3 {
compatible = "regulator-fixed";
regulator-name = "fixed-3.3V";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
regulator-always-on;
};
vcc_sdhi0: regulator-vcc-sdhi0 {
compatible = "regulator-fixed";
regulator-name = "SDHI0 Vcc";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpio5 24 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
hdmi-out {
compatible = "hdmi-connector";
type = "a";
port {
hdmi_con_out: endpoint {
remote-endpoint = <&adv7511_out>;
};
};
};
osc1_clk: osc1-clock {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <148500000>;
};
osc4_clk: osc4-clock {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <12000000>;
};
};
&du {
pinctrl-0 = <&du_pins>;
pinctrl-names = "default";
status = "okay";
clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>, <&cpg CPG_MOD 722>,
<&cpg CPG_MOD 726>, <&cpg CPG_MOD 725>,
<&osc1_clk>;
clock-names = "du.0", "du.1", "du.2", "lvds.0", "lvds.1", "dclkin.0";
ports {
port@0 {
endpoint {
remote-endpoint = <&adv7511_in>;
};
};
port@1 {
lvds_connector0: endpoint {
};
};
port@2 {
lvds_connector1: endpoint {
};
};
};
};
&extal_clk {
@@ -28,22 +121,128 @@
};
&pfc {
pinctrl-0 = <&scif_clk_pins>;
pinctrl-names = "default";
scif0_pins: scif0 {
groups = "scif0_data";
function = "scif0";
du_pins: du {
groups = "du_rgb888", "du_sync_1", "du_clk_out_0";
function = "du";
};
scifa0_pins: scifa0 {
groups = "scifa0_data_b";
function = "scifa0";
};
scif_clk_pins: scif_clk {
groups = "scif_clk";
function = "scif_clk";
};
ether_pins: ether {
groups = "eth_link", "eth_mdio", "eth_rmii";
function = "eth";
};
phy1_pins: phy1 {
groups = "intc_irq1";
function = "intc";
};
sdhi0_pins: sd0 {
groups = "sdhi0_data4", "sdhi0_ctrl";
function = "sdhi0";
power-source = <3300>;
};
qspi_pins: qspi {
groups = "qspi_ctrl", "qspi_data4";
function = "qspi";
};
iic2_pins: iic2 {
groups = "iic2_b";
function = "iic2";
};
iic3_pins: iic3 {
groups = "iic3";
function = "iic3";
};
usb0_pins: usb0 {
groups = "usb0";
function = "usb0";
};
};
&scif0 {
pinctrl-0 = <&scif0_pins>;
&ether {
pinctrl-0 = <&ether_pins &phy1_pins>;
pinctrl-names = "default";
phy-handle = <&phy1>;
renesas,ether-link-active-low;
status = "okay";
phy1: ethernet-phy@1 {
reg = <1>;
interrupt-parent = <&irqc0>;
interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
micrel,led-mode = <1>;
};
};
&cmt0 {
status = "okay";
};
&qspi {
pinctrl-0 = <&qspi_pins>;
pinctrl-names = "default";
status = "okay";
flash: flash@0 {
compatible = "spansion,s25fl512s", "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <30000000>;
spi-tx-bus-width = <4>;
spi-rx-bus-width = <4>;
spi-cpha;
spi-cpol;
m25p,fast-read;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "loader";
reg = <0x00000000 0x00080000>;
read-only;
};
partition@80000 {
label = "uboot";
reg = <0x00080000 0x00040000>;
read-only;
};
partition@c0000 {
label = "uboot-env";
reg = <0x000c0000 0x00040000>;
read-only;
};
partition@100000 {
label = "flash";
reg = <0x00100000 0x03f00000>;
};
};
};
};
&scifa0 {
pinctrl-0 = <&scifa0_pins>;
pinctrl-names = "default";
status = "okay";
@@ -52,3 +251,114 @@
&scif_clk {
clock-frequency = <14745600>;
};
&sdhi0 {
pinctrl-0 = <&sdhi0_pins>;
pinctrl-names = "default";
vmmc-supply = <&vcc_sdhi0>;
cd-gpios = <&gpio3 6 GPIO_ACTIVE_LOW>;
status = "okay";
};
&cpu0 {
cpu0-supply = <&vdd_dvfs>;
};
&iic2 {
status = "okay";
pinctrl-0 = <&iic2_pins>;
pinctrl-names = "default";
clock-frequency = <100000>;
hdmi@39 {
compatible = "adi,adv7511w";
reg = <0x39>;
interrupt-parent = <&gpio1>;
interrupts = <15 IRQ_TYPE_LEVEL_LOW>;
clocks = <&osc4_clk>;
clock-names = "cec";
adi,input-depth = <8>;
adi,input-colorspace = "rgb";
adi,input-clock = "1x";
adi,input-style = <1>;
adi,input-justification = "evenly";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
adv7511_in: endpoint {
remote-endpoint = <&du_out_rgb>;
};
};
port@1 {
reg = <1>;
adv7511_out: endpoint {
remote-endpoint = <&hdmi_con_out>;
};
};
};
};
};
&iic3 {
pinctrl-names = "default";
pinctrl-0 = <&iic3_pins>;
status = "okay";
pmic@58 {
compatible = "dlg,da9063";
reg = <0x58>;
interrupt-parent = <&irqc0>;
interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
interrupt-controller;
rtc {
compatible = "dlg,da9063-rtc";
};
wdt {
compatible = "dlg,da9063-watchdog";
};
};
vdd_dvfs: regulator@68 {
compatible = "dlg,da9210";
reg = <0x68>;
interrupt-parent = <&irqc0>;
interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1000000>;
regulator-boot-on;
regulator-always-on;
};
vdd: regulator@70 {
compatible = "dlg,da9210";
reg = <0x70>;
interrupt-parent = <&irqc0>;
interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1000000>;
regulator-boot-on;
regulator-always-on;
};
};
&pci0 {
status = "okay";
pinctrl-0 = <&usb0_pins>;
pinctrl-names = "default";
};
&usbphy {
status = "okay";
};

View File

@@ -11,3 +11,11 @@
&usb_extal_clk {
u-boot,dm-pre-reloc;
};
&pfc {
u-boot,dm-pre-reloc;
};
&rst {
u-boot,dm-pre-reloc;
};

View File

@@ -8,3 +8,7 @@
#include "r8a7791-porter.dts"
#include "r8a7791-u-boot.dtsi"
&scif0 {
u-boot,dm-pre-reloc;
};

View File

@@ -351,6 +351,11 @@
};
};
&i2c6 {
status = "okay";
clock-frequency = <400000>;
};
&sata0 {
status = "okay";
};

View File

@@ -11,3 +11,11 @@
&usb_extal_clk {
u-boot,dm-pre-reloc;
};
&pfc {
u-boot,dm-pre-reloc;
};
&rst {
u-boot,dm-pre-reloc;
};

View File

@@ -7,3 +7,11 @@
*/
#include "r8a779x-u-boot.dtsi"
&pfc {
u-boot,dm-pre-reloc;
};
&rst {
u-boot,dm-pre-reloc;
};

View File

@@ -11,3 +11,11 @@
&usb_extal_clk {
u-boot,dm-pre-reloc;
};
&pfc {
u-boot,dm-pre-reloc;
};
&rst {
u-boot,dm-pre-reloc;
};

View File

@@ -11,3 +11,11 @@
&usb_extal_clk {
u-boot,dm-pre-reloc;
};
&pfc {
u-boot,dm-pre-reloc;
};
&rst {
u-boot,dm-pre-reloc;
};

View File

@@ -0,0 +1,10 @@
/*
* Device Tree Source extras for U-Boot for the M3N Salvator-XS board
*
* Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
*
* SPDX-License-Identifier: GPL-2.0
*/
#include "r8a77965-salvator-x.dts"
#include "r8a77965-u-boot.dtsi"

View File

@@ -0,0 +1,21 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Device Tree Source for the Salvator-X board with R-Car M3-N
*
* Copyright (C) 2018 Jacopo Mondi <jacopo+renesas@jmondi.org>
*/
/dts-v1/;
#include "r8a77965.dtsi"
#include "salvator-x.dtsi"
/ {
model = "Renesas Salvator-X board based on r8a77965";
compatible = "renesas,salvator-x", "renesas,r8a77965";
memory@48000000 {
device_type = "memory";
/* first 128MB is reserved for secure area. */
reg = <0x0 0x48000000 0x0 0x78000000>;
};
};

View File

@@ -0,0 +1,13 @@
/*
* Device Tree Source extras for U-Boot on RCar R8A77965 SoC
*
* Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
*
* SPDX-License-Identifier: GPL-2.0
*/
#include "r8a779x-u-boot.dtsi"
&extalr_clk {
u-boot,dm-pre-reloc;
};

818
arch/arm/dts/r8a77965.dtsi Normal file
View File

@@ -0,0 +1,818 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Device Tree Source for the r8a77965 SoC
*
* Copyright (C) 2018 Jacopo Mondi <jacopo+renesas@jmondi.org>
*
* Based on r8a7796.dtsi
* Copyright (C) 2016 Renesas Electronics Corp.
*/
#include <dt-bindings/clock/renesas-cpg-mssr.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#define CPG_AUDIO_CLK_I 10
/ {
compatible = "renesas,r8a77965";
#address-cells = <2>;
#size-cells = <2>;
psci {
compatible = "arm,psci-1.0", "arm,psci-0.2";
method = "smc";
};
cpus {
#address-cells = <1>;
#size-cells = <0>;
a57_0: cpu@0 {
compatible = "arm,cortex-a57", "arm,armv8";
reg = <0x0>;
device_type = "cpu";
power-domains = <&sysc 0>;
next-level-cache = <&L2_CA57>;
enable-method = "psci";
};
a57_1: cpu@1 {
compatible = "arm,cortex-a57","arm,armv8";
reg = <0x1>;
device_type = "cpu";
power-domains = <&sysc 1>;
next-level-cache = <&L2_CA57>;
enable-method = "psci";
};
L2_CA57: cache-controller-0 {
compatible = "cache";
reg = <0>;
power-domains = <&sysc 12>;
cache-unified;
cache-level = <2>;
};
};
extal_clk: extal {
compatible = "fixed-clock";
#clock-cells = <0>;
/* This value must be overridden by the board */
clock-frequency = <0>;
};
extalr_clk: extalr {
compatible = "fixed-clock";
#clock-cells = <0>;
/* This value must be overridden by the board */
clock-frequency = <0>;
};
/*
* The external audio clocks are configured as 0 Hz fixed frequency
* clocks by default.
* Boards that provide audio clocks should override them.
*/
audio_clk_a: audio_clk_a {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
};
audio_clk_b: audio_clk_b {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
};
audio_clk_c: audio_clk_c {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
};
/* External CAN clock - to be overridden by boards that provide it */
can_clk: can {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
};
/* External SCIF clock - to be overridden by boards that provide it */
scif_clk: scif {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
};
/* External PCIe clock - can be overridden by the board */
pcie_bus_clk: pcie_bus {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
};
/* External USB clocks - can be overridden by the board */
usb3s0_clk: usb3s0 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
};
usb_extal_clk: usb_extal {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
};
timer {
compatible = "arm,armv8-timer";
interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
<&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
<&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
<&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
};
pmu_a57 {
compatible = "arm,cortex-a57-pmu";
interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
<&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
interrupt-affinity = <&a57_0>,
<&a57_1>;
};
soc {
compatible = "simple-bus";
interrupt-parent = <&gic>;
#address-cells = <2>;
#size-cells = <2>;
ranges;
gic: interrupt-controller@f1010000 {
compatible = "arm,gic-400";
#interrupt-cells = <3>;
#address-cells = <0>;
interrupt-controller;
reg = <0x0 0xf1010000 0 0x1000>,
<0x0 0xf1020000 0 0x20000>,
<0x0 0xf1040000 0 0x20000>,
<0x0 0xf1060000 0 0x20000>;
interrupts = <GIC_PPI 9
(GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
clocks = <&cpg CPG_MOD 408>;
clock-names = "clk";
power-domains = <&sysc 32>;
resets = <&cpg 408>;
};
pfc: pin-controller@e6060000 {
compatible = "renesas,pfc-r8a77965";
reg = <0 0xe6060000 0 0x50c>;
};
cpg: clock-controller@e6150000 {
compatible = "renesas,r8a77965-cpg-mssr";
reg = <0 0xe6150000 0 0x1000>;
clocks = <&extal_clk>, <&extalr_clk>;
clock-names = "extal", "extalr";
#clock-cells = <2>;
#power-domain-cells = <0>;
#reset-cells = <1>;
};
rst: reset-controller@e6160000 {
compatible = "renesas,r8a77965-rst";
reg = <0 0xe6160000 0 0x0200>;
};
prr: chipid@fff00044 {
compatible = "renesas,prr";
reg = <0 0xfff00044 0 4>;
};
sysc: system-controller@e6180000 {
compatible = "renesas,r8a77965-sysc";
reg = <0 0xe6180000 0 0x0400>;
#power-domain-cells = <1>;
};
gpio0: gpio@e6050000 {
compatible = "renesas,gpio-r8a77965",
"renesas,rcar-gen3-gpio";
reg = <0 0xe6050000 0 0x50>;
interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
#gpio-cells = <2>;
gpio-controller;
gpio-ranges = <&pfc 0 0 16>;
#interrupt-cells = <2>;
interrupt-controller;
clocks = <&cpg CPG_MOD 912>;
power-domains = <&sysc 32>;
resets = <&cpg 912>;
};
gpio1: gpio@e6051000 {
compatible = "renesas,gpio-r8a77965",
"renesas,rcar-gen3-gpio";
reg = <0 0xe6051000 0 0x50>;
interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
#gpio-cells = <2>;
gpio-controller;
gpio-ranges = <&pfc 0 32 29>;
#interrupt-cells = <2>;
interrupt-controller;
clocks = <&cpg CPG_MOD 911>;
power-domains = <&sysc 32>;
resets = <&cpg 911>;
};
gpio2: gpio@e6052000 {
compatible = "renesas,gpio-r8a77965",
"renesas,rcar-gen3-gpio";
reg = <0 0xe6052000 0 0x50>;
interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
#gpio-cells = <2>;
gpio-controller;
gpio-ranges = <&pfc 0 64 15>;
#interrupt-cells = <2>;
interrupt-controller;
clocks = <&cpg CPG_MOD 910>;
power-domains = <&sysc 32>;
resets = <&cpg 910>;
};
gpio3: gpio@e6053000 {
compatible = "renesas,gpio-r8a77965",
"renesas,rcar-gen3-gpio";
reg = <0 0xe6053000 0 0x50>;
interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
#gpio-cells = <2>;
gpio-controller;
gpio-ranges = <&pfc 0 96 16>;
#interrupt-cells = <2>;
interrupt-controller;
clocks = <&cpg CPG_MOD 909>;
power-domains = <&sysc 32>;
resets = <&cpg 909>;
};
gpio4: gpio@e6054000 {
compatible = "renesas,gpio-r8a77965",
"renesas,rcar-gen3-gpio";
reg = <0 0xe6054000 0 0x50>;
interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
#gpio-cells = <2>;
gpio-controller;
gpio-ranges = <&pfc 0 128 18>;
#interrupt-cells = <2>;
interrupt-controller;
clocks = <&cpg CPG_MOD 908>;
power-domains = <&sysc 32>;
resets = <&cpg 908>;
};
gpio5: gpio@e6055000 {
compatible = "renesas,gpio-r8a77965",
"renesas,rcar-gen3-gpio";
reg = <0 0xe6055000 0 0x50>;
interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
#gpio-cells = <2>;
gpio-controller;
gpio-ranges = <&pfc 0 160 26>;
#interrupt-cells = <2>;
interrupt-controller;
clocks = <&cpg CPG_MOD 907>;
power-domains = <&sysc 32>;
resets = <&cpg 907>;
};
gpio6: gpio@e6055400 {
compatible = "renesas,gpio-r8a77965",
"renesas,rcar-gen3-gpio";
reg = <0 0xe6055400 0 0x50>;
interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
#gpio-cells = <2>;
gpio-controller;
gpio-ranges = <&pfc 0 192 32>;
#interrupt-cells = <2>;
interrupt-controller;
clocks = <&cpg CPG_MOD 906>;
power-domains = <&sysc 32>;
resets = <&cpg 906>;
};
gpio7: gpio@e6055800 {
compatible = "renesas,gpio-r8a77965",
"renesas,rcar-gen3-gpio";
reg = <0 0xe6055800 0 0x50>;
interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
#gpio-cells = <2>;
gpio-controller;
gpio-ranges = <&pfc 0 224 4>;
#interrupt-cells = <2>;
interrupt-controller;
clocks = <&cpg CPG_MOD 905>;
power-domains = <&sysc 32>;
resets = <&cpg 905>;
};
intc_ex: interrupt-controller@e61c0000 {
/* placeholder */
};
dmac0: dma-controller@e6700000 {
compatible = "renesas,dmac-r8a77965",
"renesas,rcar-dmac";
reg = <0 0xe6700000 0 0x10000>;
interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "error",
"ch0", "ch1", "ch2", "ch3",
"ch4", "ch5", "ch6", "ch7",
"ch8", "ch9", "ch10", "ch11",
"ch12", "ch13", "ch14", "ch15";
clocks = <&cpg CPG_MOD 219>;
clock-names = "fck";
power-domains = <&sysc 32>;
resets = <&cpg 219>;
#dma-cells = <1>;
dma-channels = <16>;
};
dmac1: dma-controller@e7300000 {
compatible = "renesas,dmac-r8a77965",
"renesas,rcar-dmac";
reg = <0 0xe7300000 0 0x10000>;
interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "error",
"ch0", "ch1", "ch2", "ch3",
"ch4", "ch5", "ch6", "ch7",
"ch8", "ch9", "ch10", "ch11",
"ch12", "ch13", "ch14", "ch15";
clocks = <&cpg CPG_MOD 218>;
clock-names = "fck";
power-domains = <&sysc 32>;
resets = <&cpg 218>;
#dma-cells = <1>;
dma-channels = <16>;
};
dmac2: dma-controller@e7310000 {
compatible = "renesas,dmac-r8a77965",
"renesas,rcar-dmac";
reg = <0 0xe7310000 0 0x10000>;
interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "error",
"ch0", "ch1", "ch2", "ch3",
"ch4", "ch5", "ch6", "ch7",
"ch8", "ch9", "ch10", "ch11",
"ch12", "ch13", "ch14", "ch15";
clocks = <&cpg CPG_MOD 217>;
clock-names = "fck";
power-domains = <&sysc 32>;
resets = <&cpg 217>;
#dma-cells = <1>;
dma-channels = <16>;
};
scif0: serial@e6e60000 {
compatible = "renesas,scif-r8a77965",
"renesas,rcar-gen3-scif", "renesas,scif";
reg = <0 0xe6e60000 0 64>;
interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 207>,
<&cpg CPG_CORE 20>,
<&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac1 0x51>, <&dmac1 0x50>,
<&dmac2 0x51>, <&dmac2 0x50>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc 32>;
resets = <&cpg 207>;
status = "disabled";
};
scif1: serial@e6e68000 {
compatible = "renesas,scif-r8a77965",
"renesas,rcar-gen3-scif", "renesas,scif";
reg = <0 0xe6e68000 0 64>;
interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 206>,
<&cpg CPG_CORE 20>,
<&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac1 0x53>, <&dmac1 0x52>,
<&dmac2 0x53>, <&dmac2 0x52>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc 32>;
resets = <&cpg 206>;
status = "disabled";
};
scif2: serial@e6e88000 {
compatible = "renesas,scif-r8a77965",
"renesas,rcar-gen3-scif", "renesas,scif";
reg = <0 0xe6e88000 0 64>;
interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 310>,
<&cpg CPG_CORE 20>,
<&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
power-domains = <&sysc 32>;
resets = <&cpg 310>;
status = "disabled";
};
scif3: serial@e6c50000 {
compatible = "renesas,scif-r8a77965",
"renesas,rcar-gen3-scif", "renesas,scif";
reg = <0 0xe6c50000 0 64>;
interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 204>,
<&cpg CPG_CORE 20>,
<&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac0 0x57>, <&dmac0 0x56>;
dma-names = "tx", "rx";
power-domains = <&sysc 32>;
resets = <&cpg 204>;
status = "disabled";
};
scif4: serial@e6c40000 {
compatible = "renesas,scif-r8a77965",
"renesas,rcar-gen3-scif", "renesas,scif";
reg = <0 0xe6c40000 0 64>;
interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 203>,
<&cpg CPG_CORE 20>,
<&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac0 0x59>, <&dmac0 0x58>;
dma-names = "tx", "rx";
power-domains = <&sysc 32>;
resets = <&cpg 203>;
status = "disabled";
};
scif5: serial@e6f30000 {
compatible = "renesas,scif-r8a77965",
"renesas,rcar-gen3-scif", "renesas,scif";
reg = <0 0xe6f30000 0 64>;
interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 202>,
<&cpg CPG_CORE 20>,
<&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac1 0x5b>, <&dmac1 0x5a>,
<&dmac2 0x5b>, <&dmac2 0x5a>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc 32>;
resets = <&cpg 202>;
status = "disabled";
};
avb: ethernet@e6800000 {
compatible = "renesas,etheravb-r8a77965",
"renesas,etheravb-rcar-gen3";
reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
clocks = <&cpg CPG_MOD 812>;
power-domains = <&sysc 32>;
resets = <&cpg 812>;
phy-mode = "rgmii-txid";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
csi20: csi2@fea80000 {
/* placeholder */
};
csi40: csi2@feaa0000 {
/* placeholder */
};
vin0: video@e6ef0000 {
/* placeholder */
};
vin1: video@e6ef1000 {
/* placeholder */
};
vin2: video@e6ef2000 {
/* placeholder */
};
vin3: video@e6ef3000 {
/* placeholder */
};
vin4: video@e6ef4000 {
/* placeholder */
};
vin5: video@e6ef5000 {
/* placeholder */
};
vin6: video@e6ef6000 {
/* placeholder */
};
vin7: video@e6ef7000 {
/* placeholder */
};
ohci0: usb@ee080000 {
/* placeholder */
};
ehci0: usb@ee080100 {
compatible = "generic-ehci";
reg = <0 0xee080100 0 0x100>;
interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 703>;
phys = <&usb2_phy0>;
phy-names = "usb";
companion= <&ohci0>;
power-domains = <&sysc 32>;
resets = <&cpg 703>;
status = "disabled";
};
usb2_phy0: usb-phy@ee080200 {
compatible = "renesas,usb2-phy-r8a77965",
"renesas,rcar-gen3-usb2-phy";
reg = <0 0xee080200 0 0x700>;
interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 703>;
power-domains = <&sysc 32>;
resets = <&cpg 703>;
#phy-cells = <0>;
status = "disabled";
};
ohci1: usb@ee0a0000 {
/* placeholder */
};
ehci1: usb@ee0a0100 {
compatible = "generic-ehci";
reg = <0 0xee0a0100 0 0x100>;
interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 702>;
phys = <&usb2_phy1>;
phy-names = "usb";
companion= <&ohci1>;
power-domains = <&sysc 32>;
resets = <&cpg 702>;
status = "disabled";
};
i2c0: i2c@e6500000 {
/* placeholder */
};
i2c1: i2c@e6508000 {
/* placeholder */
};
i2c2: i2c@e6510000 {
/* placeholder */
};
i2c3: i2c@e66d0000 {
/* placeholder */
};
i2c4: i2c@e66d8000 {
/* placeholder */
};
i2c5: i2c@e66e0000 {
/* placeholder */
};
i2c6: i2c@e66e8000 {
/* placeholder */
};
i2c_dvfs: i2c@e60b0000 {
/* placeholder */
};
pwm0: pwm@e6e30000 {
/* placeholder */
};
pwm1: pwm@e6e31000 {
/* placeholder */
};
pwm2: pwm@e6e32000 {
/* placeholder */
};
pwm3: pwm@e6e33000 {
/* placeholder */
};
pwm4: pwm@e6e34000 {
/* placeholder */
};
pwm5: pwm@e6e35000 {
/* placeholder */
};
pwm6: pwm@e6e36000 {
/* placeholder */
};
du: display@feb00000 {
/* placeholder */
ports {
port@0 {
reg = <0>;
du_out_rgb: endpoint {
};
};
port@1 {
reg = <1>;
du_out_hdmi0: endpoint {
};
};
port@2 {
reg = <2>;
du_out_lvds0: endpoint {
};
};
};
};
hsusb: usb@e6590000 {
/* placeholder */
};
pciec0: pcie@fe000000 {
/* placeholder */
};
pciec1: pcie@ee800000 {
/* placeholder */
};
rcar_sound: sound@ec500000 {
/* placeholder */
rcar_sound,dvc {
dvc0: dvc-0 {
};
dvc1: dvc-1 {
};
};
rcar_sound,src {
src0: src-0 {
};
src1: src-1 {
};
};
rcar_sound,ssi {
ssi0: ssi-0 {
};
ssi1: ssi-1 {
};
};
};
usb2_phy1: usb-phy@ee0a0200 {
compatible = "renesas,usb2-phy-r8a77965",
"renesas,rcar-gen3-usb2-phy";
reg = <0 0xee0a0200 0 0x700>;
clocks = <&cpg CPG_MOD 702>;
power-domains = <&sysc 32>;
resets = <&cpg 702>;
#phy-cells = <0>;
status = "disabled";
};
sdhi0: sd@ee100000 {
compatible = "renesas,sdhi-r8a77965";
reg = <0 0xee100000 0 0x2000>;
interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 314>;
max-frequency = <200000000>;
power-domains = <&sysc 32>;
resets = <&cpg 314>;
status = "disabled";
};
sdhi1: sd@ee120000 {
compatible = "renesas,sdhi-r8a77965";
reg = <0 0xee120000 0 0x2000>;
interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 313>;
max-frequency = <200000000>;
power-domains = <&sysc 32>;
resets = <&cpg 313>;
status = "disabled";
};
sdhi2: sd@ee140000 {
compatible = "renesas,sdhi-r8a77965";
reg = <0 0xee140000 0 0x2000>;
interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 312>;
max-frequency = <200000000>;
power-domains = <&sysc 32>;
resets = <&cpg 312>;
status = "disabled";
};
sdhi3: sd@ee160000 {
compatible = "renesas,sdhi-r8a77965";
reg = <0 0xee160000 0 0x2000>;
interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 311>;
max-frequency = <200000000>;
power-domains = <&sysc 32>;
resets = <&cpg 311>;
status = "disabled";
};
usb3_phy0: usb-phy@e65ee000 {
/* placeholder */
};
usb3_peri0: usb@ee020000 {
/* placeholder */
};
xhci0: usb@ee000000 {
compatible = "renesas,xhci-r8a77965",
"renesas,rcar-gen3-xhci";
reg = <0 0xee000000 0 0xc00>;
interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 328>;
power-domains = <&sysc 32>;
resets = <&cpg 328>;
status = "disabled";
};
wdt0: watchdog@e6020000 {
/* placeholder */
};
};
};

View File

@@ -257,6 +257,7 @@
pinctrl-names = "default";
renesas,no-ether-link;
phy-handle = <&phy0>;
reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>;
status = "okay";
phy0: ethernet-phy@0 {

View File

@@ -88,7 +88,7 @@
u-boot,dm-pre-reloc;
#address-cells = <1>;
#size-cells = <1>;
compatible = "n25q00";
compatible = "n25q00", "spi-flash";
reg = <0>; /* chip select */
spi-max-frequency = <50000000>;
m25p,fast-read;

View File

@@ -0,0 +1,59 @@
/*
* Copyright (C) 2018 Marek Vasut <marex@denx.de>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include "socfpga_cyclone5.dtsi"
/ {
model = "Devboards.de DBM-SoC1";
compatible = "altr,socfpga-cyclone5", "altr,socfpga";
chosen {
bootargs = "console=ttyS0,115200";
};
aliases {
ethernet0 = &gmac1;
udc0 = &usb1;
};
memory {
name = "memory";
device_type = "memory";
reg = <0x0 0x40000000>; /* 1GB */
};
soc {
u-boot,dm-pre-reloc;
};
};
&gmac1 {
status = "okay";
phy-mode = "rgmii";
};
&gpio0 {
status = "okay";
};
&gpio1 {
status = "okay";
};
&gpio2 {
status = "okay";
};
&mmc0 {
status = "okay";
bus-width = <4>;
u-boot,dm-pre-reloc;
};
&usb1 {
disable-over-current;
status = "okay";
};

View File

@@ -87,7 +87,7 @@
u-boot,dm-pre-reloc;
#address-cells = <1>;
#size-cells = <1>;
compatible = "n25q00";
compatible = "n25q00", "spi-flash";
reg = <0>; /* chip select */
spi-max-frequency = <100000000>;
m25p,fast-read;

View File

@@ -98,7 +98,7 @@
u-boot,dm-pre-reloc;
#address-cells = <1>;
#size-cells = <1>;
compatible = "n25q00";
compatible = "n25q00", "spi-flash";
reg = <0>; /* chip select */
spi-max-frequency = <100000000>;
m25p,fast-read;

View File

@@ -68,7 +68,7 @@
flash0: n25q00@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "n25q00";
compatible = "n25q00", "spi-flash";
reg = <0>; /* chip select */
spi-max-frequency = <50000000>;
m25p,fast-read;

View File

@@ -156,6 +156,7 @@
pinctrl-names = "default";
renesas,no-ether-link;
phy-handle = <&phy0>;
reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>;
status = "okay";
phy0: ethernet-phy@0 {

View File

@@ -135,7 +135,7 @@
/* CM_L3INIT_HSMMCn_CLKCTRL */
#define HSMMC_CLKCTRL_CLKSEL_MASK (1 << 24)
#define HSMMC_CLKCTRL_CLKSEL_DIV_MASK (1 << 25)
#define HSMMC_CLKCTRL_CLKSEL_DIV_MASK (3 << 25)
/* CM_L3INIT_SATA_CLKCTRL */
#define SATA_CLKCTRL_OPTFCLKEN_MASK (1 << 8)

View File

@@ -83,6 +83,9 @@
void __recalibrate_iodelay(struct pad_conf_entry const *pad, int npads,
struct iodelay_cfg_entry const *iodelay,
int niodelays);
void late_recalibrate_iodelay(struct pad_conf_entry const *pad, int npads,
struct iodelay_cfg_entry const *iodelay,
int niodelays);
int __recalibrate_iodelay_start(void);
void __recalibrate_iodelay_end(int ret);

View File

@@ -35,6 +35,12 @@ struct pad_conf_entry {
u32 val;
};
struct mmc_platform_fixups {
const char *hw_rev;
u32 unsupported_caps;
u32 max_freq;
};
struct omap_sysinfo {
char *board_string;
};
@@ -71,6 +77,7 @@ void force_emif_self_refresh(void);
void get_ioregs(const struct ctrl_ioregs **regs);
void srcomp_enable(void);
void setup_warmreset_time(void);
const struct mmc_platform_fixups *platform_fixups_mmc(uint32_t addr);
static inline u32 div_round_up(u32 num, u32 den)
{

View File

@@ -9,6 +9,7 @@
#define __SECURE_MX6Q_H__
#include <linux/types.h>
#include <linux/compiler.h>
/*
* IVT header definitions
@@ -21,11 +22,11 @@
#define IVT_HEADER_V1 0x40
#define IVT_HEADER_V2 0x41
struct ivt_header {
struct __packed ivt_header {
uint8_t magic;
uint16_t length;
uint8_t version;
} __attribute__((packed));
};
struct ivt {
struct ivt_header hdr; /* IVT header above */
@@ -38,6 +39,12 @@ struct ivt {
uint32_t reserved2; /* Reserved should be zero */
};
struct __packed hab_hdr {
u8 tag; /* Tag field */
u8 len[2]; /* Length field in bytes (big-endian) */
u8 par; /* Parameters field */
};
/* -------- start of HAB API updates ------------*/
/* The following are taken from HAB4 SIS */
@@ -162,7 +169,14 @@ typedef void hapi_clock_init_t(void);
#ifdef CONFIG_ROM_UNIFIED_SECTIONS
#define HAB_RVT_BASE 0x00000100
#else
#define HAB_RVT_BASE 0x00000094
#define HAB_RVT_BASE_NEW 0x00000098
#define HAB_RVT_BASE_OLD 0x00000094
#define HAB_RVT_BASE ((is_mx6dqp()) ? \
HAB_RVT_BASE_NEW : \
(is_mx6dq() && (soc_rev() >= CHIP_REV_1_5)) ? \
HAB_RVT_BASE_NEW : \
(is_mx6sdl() && (soc_rev() >= CHIP_REV_1_2)) ? \
HAB_RVT_BASE_NEW : HAB_RVT_BASE_OLD)
#endif
#define HAB_RVT_ENTRY (*(uint32_t *)(HAB_RVT_BASE + 0x04))
@@ -173,15 +187,15 @@ typedef void hapi_clock_init_t(void);
#define HAB_RVT_REPORT_STATUS (*(uint32_t *)(HAB_RVT_BASE + 0x24))
#define HAB_RVT_FAILSAFE (*(uint32_t *)(HAB_RVT_BASE + 0x28))
#define HAB_RVT_REPORT_EVENT_NEW (*(uint32_t *)0x000000B8)
#define HAB_RVT_REPORT_STATUS_NEW (*(uint32_t *)0x000000BC)
#define HAB_RVT_AUTHENTICATE_IMAGE_NEW (*(uint32_t *)0x000000A8)
#define HAB_RVT_ENTRY_NEW (*(uint32_t *)0x0000009C)
#define HAB_RVT_EXIT_NEW (*(uint32_t *)0x000000A0)
#define HAB_CID_ROM 0 /**< ROM Caller ID */
#define HAB_CID_UBOOT 1 /**< UBOOT Caller ID*/
#define HAB_CMD_HDR 0xD4 /* CSF Header */
#define HAB_CMD_WRT_DAT 0xCC /* Write Data command tag */
#define HAB_CMD_CHK_DAT 0xCF /* Check Data command tag */
#define HAB_CMD_SET 0xB1 /* Set command tag */
#define HAB_PAR_MID 0x01 /* MID parameter value */
#define IVT_SIZE 0x20
#define CSF_PAD_SIZE 0x2000

View File

@@ -39,7 +39,9 @@ struct hsmmc {
unsigned int sysstatus; /* 0x14 */
unsigned char res2[0x14];
unsigned int con; /* 0x2C */
unsigned char res3[0xD4];
unsigned int pwcnt; /* 0x30 */
unsigned int dll; /* 0x34 */
unsigned char res3[0xcc];
unsigned int blk; /* 0x104 */
unsigned int arg; /* 0x108 */
unsigned int cmd; /* 0x10C */
@@ -53,9 +55,11 @@ struct hsmmc {
unsigned int sysctl; /* 0x12C */
unsigned int stat; /* 0x130 */
unsigned int ie; /* 0x134 */
unsigned char res4[0x8];
unsigned char res4[0x4];
unsigned int ac12; /* 0x13C */
unsigned int capa; /* 0x140 */
unsigned char res5[0x10];
unsigned int capa2; /* 0x144 */
unsigned char res5[0xc];
unsigned int admaes; /* 0x154 */
unsigned int admasal; /* 0x158 */
};
@@ -63,8 +67,10 @@ struct hsmmc {
struct omap_hsmmc_plat {
struct mmc_config cfg;
struct hsmmc *base_addr;
struct mmc mmc;
struct mmc *mmc;
bool cd_inverted;
u32 controller_flags;
const char *hw_rev;
};
/*
@@ -87,6 +93,7 @@ struct omap_hsmmc_plat {
#define WPP_ACTIVEHIGH (0x0 << 8)
#define RESERVED_MASK (0x3 << 9)
#define CTPL_MMC_SD (0x0 << 11)
#define DDR (0x1 << 19)
#define DMA_MASTER (0x1 << 20)
#define BLEN_512BYTESLEN (0x200 << 0)
#define NBLK_STPCNT (0x0 << 16)
@@ -124,8 +131,10 @@ struct omap_hsmmc_plat {
#define DTW_8_BITMODE (0x1 << 5) /* CON[DW8]*/
#define SDBP_PWROFF (0x0 << 8)
#define SDBP_PWRON (0x1 << 8)
#define SDVS_MASK (0x7 << 9)
#define SDVS_1V8 (0x5 << 9)
#define SDVS_3V0 (0x6 << 9)
#define SDVS_3V3 (0x7 << 9)
#define DMA_SELECT (0x2 << 3)
#define ICE_MASK (0x1 << 0)
#define ICE_STOP (0x0 << 0)
@@ -159,8 +168,20 @@ struct omap_hsmmc_plat {
#define IE_CERR (0x01 << 28)
#define IE_BADA (0x01 << 29)
#define VS30_3V0SUP (1 << 25)
#define VS18_1V8SUP (1 << 26)
#define VS33_3V3SUP BIT(24)
#define VS30_3V0SUP BIT(25)
#define VS18_1V8SUP BIT(26)
#define AC12_ET BIT(22)
#define AC12_V1V8_SIGEN BIT(19)
#define AC12_SCLK_SEL BIT(23)
#define AC12_UHSMC_MASK (7 << 16)
#define AC12_UHSMC_DDR50 (4 << 16)
#define AC12_UHSMC_SDR104 (3 << 16)
#define AC12_UHSMC_SDR50 (2 << 16)
#define AC12_UHSMC_SDR25 (1 << 16)
#define AC12_UHSMC_SDR12 (0 << 16)
#define AC12_UHSMC_RES (0x7 << 16)
/* Driver definitions */
#define MMCSD_SECTOR_SIZE 512
@@ -172,15 +193,43 @@ struct omap_hsmmc_plat {
#define CLK_400KHZ 1
#define CLK_MISC 2
#define CLKD_MAX 0x3FF /* max clock divisor: 1023 */
#define RSP_TYPE_NONE (RSP_TYPE_NORSP | CCCE_NOCHECK | CICE_NOCHECK)
#define MMC_CMD0 (INDEX(0) | RSP_TYPE_NONE | DP_NO_DATA | DDIR_WRITE)
/* Clock Configurations and Macros */
#ifdef CONFIG_OMAP54XX
#define MMC_CLOCK_REFERENCE 192 /* MHz */
#else
#define MMC_CLOCK_REFERENCE 96 /* MHz */
#endif
/* DLL */
#define DLL_SWT BIT(20)
#define DLL_FORCE_SR_C_SHIFT 13
#define DLL_FORCE_SR_C_MASK 0x7f
#define DLL_FORCE_VALUE BIT(12)
#define DLL_CALIB BIT(1)
#define MAX_PHASE_DELAY 0x7c
/* CAPA2 */
#define CAPA2_TSDR50 BIT(13)
#define mmc_reg_out(addr, mask, val)\
writel((readl(addr) & (~(mask))) | ((val) & (mask)), (addr))
#define INT_EN_MASK (IE_BADA | IE_CERR | IE_DEB | IE_DCRC |\
IE_DTO | IE_CIE | IE_CEB | IE_CCRC | IE_ADMAE | IE_CTO |\
IE_BRR | IE_BWR | IE_TC | IE_CC)
#define CON_CLKEXTFREE BIT(16)
#define CON_PADEN BIT(15)
#define PSTATE_CLEV BIT(24)
#define PSTATE_DLEV (0xF << 20)
#define PSTATE_DLEV_DAT0 (0x1 << 20)
int omap_mmc_init(int dev_index, uint host_caps_mask, uint f_max, int cd_gpio,
int wp_gpio);

View File

@@ -19,7 +19,7 @@
#include <image.h>
#include <u-boot/zlib.h>
#include <asm/byteorder.h>
#include <libfdt.h>
#include <linux/libfdt.h>
#include <mapmem.h>
#include <fdt_support.h>
#include <asm/bootm.h>

View File

@@ -15,63 +15,63 @@ DECLARE_GLOBAL_DATA_PTR;
/* See Documentation/arm64/booting.txt in the Linux kernel */
struct Image_header {
uint32_t code0; /* Executable code */
uint32_t code1; /* Executable code */
uint64_t text_offset; /* Image load offset, LE */
uint64_t image_size; /* Effective Image size, LE */
uint64_t flags; /* Kernel flags, LE */
uint64_t res2; /* reserved */
uint64_t res3; /* reserved */
uint64_t res4; /* reserved */
uint32_t magic; /* Magic number */
uint32_t res5;
uint32_t code0; /* Executable code */
uint32_t code1; /* Executable code */
uint64_t text_offset; /* Image load offset, LE */
uint64_t image_size; /* Effective Image size, LE */
uint64_t flags; /* Kernel flags, LE */
uint64_t res2; /* reserved */
uint64_t res3; /* reserved */
uint64_t res4; /* reserved */
uint32_t magic; /* Magic number */
uint32_t res5;
};
int booti_setup(ulong image, ulong *relocated_addr, ulong *size)
{
struct Image_header *ih;
uint64_t dst;
uint64_t image_size, text_offset;
struct Image_header *ih;
uint64_t dst;
uint64_t image_size, text_offset;
*relocated_addr = image;
*relocated_addr = image;
ih = (struct Image_header *)map_sysmem(image, 0);
ih = (struct Image_header *)map_sysmem(image, 0);
if (ih->magic != le32_to_cpu(LINUX_ARM64_IMAGE_MAGIC)) {
puts("Bad Linux ARM64 Image magic!\n");
return 1;
}
if (ih->magic != le32_to_cpu(LINUX_ARM64_IMAGE_MAGIC)) {
puts("Bad Linux ARM64 Image magic!\n");
return 1;
}
/*
* Prior to Linux commit a2c1d73b94ed, the text_offset field
* is of unknown endianness. In these cases, the image_size
* field is zero, and we can assume a fixed value of 0x80000.
*/
if (ih->image_size == 0) {
puts("Image lacks image_size field, assuming 16MiB\n");
image_size = 16 << 20;
text_offset = 0x80000;
} else {
image_size = le64_to_cpu(ih->image_size);
text_offset = le64_to_cpu(ih->text_offset);
}
/*
* Prior to Linux commit a2c1d73b94ed, the text_offset field
* is of unknown endianness. In these cases, the image_size
* field is zero, and we can assume a fixed value of 0x80000.
*/
if (ih->image_size == 0) {
puts("Image lacks image_size field, assuming 16MiB\n");
image_size = 16 << 20;
text_offset = 0x80000;
} else {
image_size = le64_to_cpu(ih->image_size);
text_offset = le64_to_cpu(ih->text_offset);
}
*size = image_size;
*size = image_size;
/*
* If bit 3 of the flags field is set, the 2MB aligned base of the
* kernel image can be anywhere in physical memory, so respect
* images->ep. Otherwise, relocate the image to the base of RAM
* since memory below it is not accessible via the linear mapping.
*/
if (le64_to_cpu(ih->flags) & BIT(3))
dst = image - text_offset;
else
dst = gd->bd->bi_dram[0].start;
/*
* If bit 3 of the flags field is set, the 2MB aligned base of the
* kernel image can be anywhere in physical memory, so respect
* images->ep. Otherwise, relocate the image to the base of RAM
* since memory below it is not accessible via the linear mapping.
*/
if (le64_to_cpu(ih->flags) & BIT(3))
dst = image - text_offset;
else
dst = gd->bd->bi_dram[0].start;
*relocated_addr = ALIGN(dst, SZ_2M) + text_offset;
*relocated_addr = ALIGN(dst, SZ_2M) + text_offset;
unmap_sysmem(ih);
unmap_sysmem(ih);
return 0;
return 0;
}

View File

@@ -30,13 +30,12 @@ void show_regs(struct pt_regs *regs)
{
int i;
if (gd->flags & GD_FLG_RELOC) {
printf("ELR: %lx\n", regs->elr - gd->reloc_off);
printf("LR: %lx\n", regs->regs[30] - gd->reloc_off);
} else {
printf("ELR: %lx\n", regs->elr);
printf("LR: %lx\n", regs->regs[30]);
}
if (gd->flags & GD_FLG_RELOC)
printf("elr: %016lx lr : %016lx (reloc)\n",
regs->elr - gd->reloc_off,
regs->regs[30] - gd->reloc_off);
printf("elr: %016lx lr : %016lx\n", regs->elr, regs->regs[30]);
for (i = 0; i < 29; i += 2)
printf("x%-2d: %016lx x%-2d: %016lx\n",
i, regs->regs[i], i+1, regs->regs[i+1]);

View File

@@ -5,7 +5,7 @@
*/
#include <common.h>
#include <libfdt.h>
#include <linux/libfdt.h>
#include <fdt_support.h>
#include <linux/sizes.h>
#include <linux/kernel.h>
@@ -69,22 +69,25 @@ init_psci_node:
#elif defined(CONFIG_ARMV7_PSCI_1_0) || defined(CONFIG_ARMV8_PSCI)
psci_ver = ARM_PSCI_VER_1_0;
#endif
switch (psci_ver) {
case ARM_PSCI_VER_1_0:
if (psci_ver >= ARM_PSCI_VER_1_0) {
tmp = fdt_setprop_string(fdt, nodeoff,
"compatible", "arm,psci-1.0");
if (tmp)
return tmp;
case ARM_PSCI_VER_0_2:
}
if (psci_ver >= ARM_PSCI_VER_0_2) {
tmp = fdt_appendprop_string(fdt, nodeoff,
"compatible", "arm,psci-0.2");
if (tmp)
return tmp;
default:
}
#ifndef CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT
/*
* The Secure firmware framework isn't able to support PSCI version 0.1.
*/
#ifndef CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT
if (psci_ver < ARM_PSCI_VER_0_2) {
tmp = fdt_appendprop_string(fdt, nodeoff,
"compatible", "arm,psci");
if (tmp)
@@ -105,9 +108,8 @@ init_psci_node:
ARM_PSCI_FN_MIGRATE);
if (tmp)
return tmp;
#endif
break;
}
#endif
tmp = fdt_setprop_string(fdt, nodeoff, "method", "smc");
if (tmp)

View File

@@ -13,96 +13,6 @@
#include <asm/arch/sys_proto.h>
#include <asm/mach-imx/hab.h>
/* -------- start of HAB API updates ------------*/
#define hab_rvt_report_event_p \
( \
(is_mx6dqp()) ? \
((hab_rvt_report_event_t *)HAB_RVT_REPORT_EVENT_NEW) : \
(is_mx6dq() && (soc_rev() >= CHIP_REV_1_5)) ? \
((hab_rvt_report_event_t *)HAB_RVT_REPORT_EVENT_NEW) : \
(is_mx6sdl() && (soc_rev() >= CHIP_REV_1_2)) ? \
((hab_rvt_report_event_t *)HAB_RVT_REPORT_EVENT_NEW) : \
((hab_rvt_report_event_t *)HAB_RVT_REPORT_EVENT) \
)
#define hab_rvt_report_status_p \
( \
(is_mx6dqp()) ? \
((hab_rvt_report_status_t *)HAB_RVT_REPORT_STATUS_NEW) :\
(is_mx6dq() && (soc_rev() >= CHIP_REV_1_5)) ? \
((hab_rvt_report_status_t *)HAB_RVT_REPORT_STATUS_NEW) :\
(is_mx6sdl() && (soc_rev() >= CHIP_REV_1_2)) ? \
((hab_rvt_report_status_t *)HAB_RVT_REPORT_STATUS_NEW) :\
((hab_rvt_report_status_t *)HAB_RVT_REPORT_STATUS) \
)
#define hab_rvt_authenticate_image_p \
( \
(is_mx6dqp()) ? \
((hab_rvt_authenticate_image_t *)HAB_RVT_AUTHENTICATE_IMAGE_NEW) : \
(is_mx6dq() && (soc_rev() >= CHIP_REV_1_5)) ? \
((hab_rvt_authenticate_image_t *)HAB_RVT_AUTHENTICATE_IMAGE_NEW) : \
(is_mx6sdl() && (soc_rev() >= CHIP_REV_1_2)) ? \
((hab_rvt_authenticate_image_t *)HAB_RVT_AUTHENTICATE_IMAGE_NEW) : \
((hab_rvt_authenticate_image_t *)HAB_RVT_AUTHENTICATE_IMAGE) \
)
#define hab_rvt_entry_p \
( \
(is_mx6dqp()) ? \
((hab_rvt_entry_t *)HAB_RVT_ENTRY_NEW) : \
(is_mx6dq() && (soc_rev() >= CHIP_REV_1_5)) ? \
((hab_rvt_entry_t *)HAB_RVT_ENTRY_NEW) : \
(is_mx6sdl() && (soc_rev() >= CHIP_REV_1_2)) ? \
((hab_rvt_entry_t *)HAB_RVT_ENTRY_NEW) : \
((hab_rvt_entry_t *)HAB_RVT_ENTRY) \
)
#define hab_rvt_exit_p \
( \
(is_mx6dqp()) ? \
((hab_rvt_exit_t *)HAB_RVT_EXIT_NEW) : \
(is_mx6dq() && (soc_rev() >= CHIP_REV_1_5)) ? \
((hab_rvt_exit_t *)HAB_RVT_EXIT_NEW) : \
(is_mx6sdl() && (soc_rev() >= CHIP_REV_1_2)) ? \
((hab_rvt_exit_t *)HAB_RVT_EXIT_NEW) : \
((hab_rvt_exit_t *)HAB_RVT_EXIT) \
)
static inline void hab_rvt_failsafe_new(void)
{
}
#define hab_rvt_failsafe_p \
( \
(is_mx6dqp()) ? \
((hab_rvt_failsafe_t *)hab_rvt_failsafe_new) : \
(is_mx6dq() && (soc_rev() >= CHIP_REV_1_5)) ? \
((hab_rvt_failsafe_t *)hab_rvt_failsafe_new) : \
(is_mx6sdl() && (soc_rev() >= CHIP_REV_1_2)) ? \
((hab_rvt_failsafe_t *)hab_rvt_failsafe_new) : \
((hab_rvt_failsafe_t *)HAB_RVT_FAILSAFE) \
)
static inline enum hab_status hab_rvt_check_target_new(enum hab_target target,
const void *start,
size_t bytes)
{
return HAB_SUCCESS;
}
#define hab_rvt_check_target_p \
( \
(is_mx6dqp()) ? \
((hab_rvt_check_target_t *)hab_rvt_check_target_new) : \
(is_mx6dq() && (soc_rev() >= CHIP_REV_1_5)) ? \
((hab_rvt_check_target_t *)hab_rvt_check_target_new) : \
(is_mx6sdl() && (soc_rev() >= CHIP_REV_1_2)) ? \
((hab_rvt_check_target_t *)hab_rvt_check_target_new) : \
((hab_rvt_check_target_t *)HAB_RVT_CHECK_TARGET) \
)
#define ALIGN_SIZE 0x1000
#define MX6DQ_PU_IROM_MMU_EN_VAR 0x009024a8
#define MX6DLS_PU_IROM_MMU_EN_VAR 0x00901dd0
@@ -344,8 +254,9 @@ static int get_hab_status(void)
hab_rvt_report_event_t *hab_rvt_report_event;
hab_rvt_report_status_t *hab_rvt_report_status;
hab_rvt_report_event = hab_rvt_report_event_p;
hab_rvt_report_status = hab_rvt_report_status_p;
hab_rvt_report_event = (hab_rvt_report_event_t *)HAB_RVT_REPORT_EVENT;
hab_rvt_report_status =
(hab_rvt_report_status_t *)HAB_RVT_REPORT_STATUS;
if (imx_hab_is_enabled())
puts("\nSecure boot enabled\n");
@@ -424,7 +335,7 @@ static int do_hab_failsafe(cmd_tbl_t *cmdtp, int flag, int argc,
return 1;
}
hab_rvt_failsafe = hab_rvt_failsafe_p;
hab_rvt_failsafe = (hab_rvt_failsafe_t *)HAB_RVT_FAILSAFE;
hab_rvt_failsafe();
return 0;
@@ -453,6 +364,103 @@ U_BOOT_CMD(
#endif /* !defined(CONFIG_SPL_BUILD) */
/* Get CSF Header length */
static int get_hab_hdr_len(struct hab_hdr *hdr)
{
return (size_t)((hdr->len[0] << 8) + (hdr->len[1]));
}
/* Check whether addr lies between start and
* end and is within the length of the image
*/
static int chk_bounds(u8 *addr, size_t bytes, u8 *start, u8 *end)
{
size_t csf_size = (size_t)((end + 1) - addr);
return (addr && (addr >= start) && (addr <= end) &&
(csf_size >= bytes));
}
/* Get Length of each command in CSF */
static int get_csf_cmd_hdr_len(u8 *csf_hdr)
{
if (*csf_hdr == HAB_CMD_HDR)
return sizeof(struct hab_hdr);
return get_hab_hdr_len((struct hab_hdr *)csf_hdr);
}
/* Check if CSF is valid */
static bool csf_is_valid(struct ivt *ivt, ulong start_addr, size_t bytes)
{
u8 *start = (u8 *)start_addr;
u8 *csf_hdr;
u8 *end;
size_t csf_hdr_len;
size_t cmd_hdr_len;
size_t offset = 0;
if (bytes != 0)
end = start + bytes - 1;
else
end = start;
/* Verify if CSF pointer content is zero */
if (!ivt->csf) {
puts("Error: CSF pointer is NULL\n");
return false;
}
csf_hdr = (u8 *)ivt->csf;
/* Verify if CSF Header exist */
if (*csf_hdr != HAB_CMD_HDR) {
puts("Error: CSF header command not found\n");
return false;
}
csf_hdr_len = get_hab_hdr_len((struct hab_hdr *)csf_hdr);
/* Check if the CSF lies within the image bounds */
if (!chk_bounds(csf_hdr, csf_hdr_len, start, end)) {
puts("Error: CSF lies outside the image bounds\n");
return false;
}
do {
struct hab_hdr *cmd;
cmd = (struct hab_hdr *)&csf_hdr[offset];
switch (cmd->tag) {
case (HAB_CMD_WRT_DAT):
puts("Error: Deprecated write command found\n");
return false;
case (HAB_CMD_CHK_DAT):
puts("Error: Deprecated check command found\n");
return false;
case (HAB_CMD_SET):
if (cmd->par == HAB_PAR_MID) {
puts("Error: Deprecated Set MID command found\n");
return false;
}
default:
break;
}
cmd_hdr_len = get_csf_cmd_hdr_len(&csf_hdr[offset]);
if (!cmd_hdr_len) {
puts("Error: Invalid command length\n");
return false;
}
offset += cmd_hdr_len;
} while (offset < csf_hdr_len);
return true;
}
bool imx_hab_is_enabled(void)
{
struct imx_sec_config_fuse_t *fuse =
@@ -485,10 +493,11 @@ int imx_hab_authenticate_image(uint32_t ddr_start, uint32_t image_size,
struct ivt_header *ivt_hdr;
enum hab_status status;
hab_rvt_authenticate_image = hab_rvt_authenticate_image_p;
hab_rvt_entry = hab_rvt_entry_p;
hab_rvt_exit = hab_rvt_exit_p;
hab_rvt_check_target = hab_rvt_check_target_p;
hab_rvt_authenticate_image =
(hab_rvt_authenticate_image_t *)HAB_RVT_AUTHENTICATE_IMAGE;
hab_rvt_entry = (hab_rvt_entry_t *)HAB_RVT_ENTRY;
hab_rvt_exit = (hab_rvt_exit_t *)HAB_RVT_EXIT;
hab_rvt_check_target = (hab_rvt_check_target_t *)HAB_RVT_CHECK_TARGET;
if (!imx_hab_is_enabled()) {
puts("hab fuse not enabled\n");
@@ -507,18 +516,26 @@ int imx_hab_authenticate_image(uint32_t ddr_start, uint32_t image_size,
/* Verify IVT header bugging out on error */
if (verify_ivt_header(ivt_hdr))
goto hab_caam_clock_disable;
goto hab_authentication_exit;
/* Verify IVT body */
if (ivt->self != ivt_addr) {
printf("ivt->self 0x%08x pointer is 0x%08x\n",
ivt->self, ivt_addr);
goto hab_caam_clock_disable;
goto hab_authentication_exit;
}
/* Verify if IVT DCD pointer is NULL */
if (ivt->dcd)
puts("Warning: DCD pointer should be NULL\n");
start = ddr_start;
bytes = image_size;
/* Verify CSF */
if (!csf_is_valid(ivt, start, bytes))
goto hab_authentication_exit;
if (hab_rvt_entry() != HAB_SUCCESS) {
puts("hab entry function fail\n");
goto hab_exit_failure_print_status;
@@ -591,8 +608,7 @@ hab_exit_failure_print_status:
get_hab_status();
#endif
hab_caam_clock_disable:
hab_caam_clock_enable(0);
hab_authentication_exit:
if (load_addr != 0)
result = 0;

View File

@@ -238,7 +238,6 @@ config TARGET_MX6Q_ENGICAM
select DM_MMC
select DM_THERMAL
select SUPPORT_SPL
select SPL_LOAD_FIT
select SPL_DM if SPL
select SPL_OF_CONTROL if SPL
select SPL_SEPARATE_BSS if SPL

View File

@@ -77,7 +77,7 @@ int litesom_mmc_init(bd_t *bis)
#endif
#ifdef CONFIG_SPL_BUILD
#include <libfdt.h>
#include <linux/libfdt.h>
#include <spl.h>
#include <asm/arch/mx6-ddr.h>

View File

@@ -154,7 +154,7 @@ int dram_init(void)
#ifdef CONFIG_SPL_BUILD
#include <asm/arch/mx6-ddr.h>
#include <asm/arch/opos6ul.h>
#include <libfdt.h>
#include <linux/libfdt.h>
#include <spl.h>
#define USDHC_PAD_CTRL ( \

View File

@@ -132,6 +132,29 @@ int g_dnl_bind_fixup(struct usb_device_descriptor *dev, const char *name)
}
#endif
#if defined(CONFIG_SPL_MMC_SUPPORT)
/* called from spl_mmc to see type of boot mode for storage (RAW or FAT) */
u32 spl_boot_mode(const u32 boot_device)
{
switch (spl_boot_device()) {
/* for MMC return either RAW or FAT mode */
case BOOT_DEVICE_MMC1:
case BOOT_DEVICE_MMC2:
#if defined(CONFIG_SPL_FAT_SUPPORT)
return MMCSD_MODE_FS;
#elif defined(CONFIG_SUPPORT_EMMC_BOOT)
return MMCSD_MODE_EMMCBOOT;
#else
return MMCSD_MODE_RAW;
#endif
break;
default:
puts("spl: ERROR: unsupported device\n");
hang();
}
}
#endif
#if defined(CONFIG_SECURE_BOOT)
/*

View File

@@ -62,7 +62,7 @@ int timer_init(void)
unsigned long val, freq;
freq = CONFIG_SC_TIMER_CLK;
asm("mcr p15, 0, %0, c14, c0, 0" : : "r" (freq));
asm volatile("mcr p15, 0, %0, c14, c0, 0" : : "r" (freq));
writel(freq, &sctr->cntfid0);
@@ -82,7 +82,7 @@ unsigned long long get_ticks(void)
{
unsigned long long now;
asm("mrrc p15, 0, %Q0, %R0, c14" : "=r" (now));
asm volatile("mrrc p15, 0, %Q0, %R0, c14" : "=r" (now));
gd->arch.tbl = (unsigned long)(now & 0xffffffff);
gd->arch.tbu = (unsigned long)(now >> 32);

View File

@@ -61,7 +61,6 @@
*/
#ifdef CONFIG_CMD_SF
#define CONFIG_HARD_SPI 1
#define CONFIG_KIRKWOOD_SPI 1
#ifndef CONFIG_ENV_SPI_BUS
# define CONFIG_ENV_SPI_BUS 0
#endif

View File

@@ -5,7 +5,7 @@
*/
#include <common.h>
#include <libfdt.h>
#include <linux/libfdt.h>
#include <linux/err.h>
#include <asm/arch/gxbb.h>
#include <asm/arch/sm.h>

View File

@@ -7,7 +7,7 @@
#include <common.h>
#include <dm.h>
#include <fdtdec.h>
#include <libfdt.h>
#include <linux/libfdt.h>
#include <pci.h>
#include <asm/io.h>
#include <asm/system.h>

View File

@@ -7,7 +7,7 @@
#include <common.h>
#include <dm.h>
#include <fdtdec.h>
#include <libfdt.h>
#include <linux/libfdt.h>
#include <asm/io.h>
#include <asm/system.h>
#include <asm/arch/cpu.h>

View File

@@ -7,7 +7,7 @@
#include <common.h>
#include <dm.h>
#include <fdtdec.h>
#include <libfdt.h>
#include <linux/libfdt.h>
#include <asm/io.h>
#include <asm/system.h>
#include <asm/arch/cpu.h>

View File

@@ -56,7 +56,6 @@
* SPI Flash configuration
*/
#ifdef CONFIG_CMD_SF
#define CONFIG_KIRKWOOD_SPI
#ifndef CONFIG_ENV_SPI_BUS
# define CONFIG_ENV_SPI_BUS 0
#endif

View File

@@ -133,16 +133,6 @@ config SYS_MPUCLK
help
Defines the MPU clock speed (in MHz).
config TI_SECURE_DEVICE
bool "HS Device Type Support"
depends on OMAP54XX || AM43XX || AM33XX || ARCH_KEYSTONE
help
If a high secure (HS) device type is being used, this config
must be set. This option impacts various aspects of the
build system (to create signed boot images that can be
authenticated) and the code. See the doc/README.ti-secure
file for further details.
config TI_SECURE_EMIF_REGION_START
hex "Reserved EMIF region start address"
depends on TI_SECURE_DEVICE

View File

@@ -5,7 +5,7 @@
*/
#include <common.h>
#include <libfdt.h>
#include <linux/libfdt.h>
#include <fdt_support.h>
#include <malloc.h>

View File

@@ -99,7 +99,7 @@ void save_omap_boot_params(void)
sys_boot_device = 1;
break;
#endif
#if defined(BOOT_DEVICE_USBETH) && !defined(CONFIG_SPL_USBETH_SUPPORT)
#if defined(BOOT_DEVICE_USBETH) && !defined(CONFIG_SPL_USB_ETHER)
case BOOT_DEVICE_USBETH:
sys_boot_device = 1;
break;

View File

@@ -599,7 +599,7 @@ s8 addressing_table_index(u8 type, u8 density, u8 width)
* tables of the device using DDR clock frequency
*/
static const struct lpddr2_ac_timings *get_timings_table(const struct
lpddr2_ac_timings const *const *device_timings,
lpddr2_ac_timings *const *device_timings,
u32 freq)
{
u32 i, temp, freq_nearest;

View File

@@ -5,7 +5,7 @@
*/
#include <common.h>
#include <libfdt.h>
#include <linux/libfdt.h>
#include <fdt_support.h>
#include <asm/omap_common.h>

View File

@@ -90,8 +90,7 @@ static const struct lpddr2_min_tck min_tck_jedec = {
.tFAW = 8
};
static const struct lpddr2_ac_timings const*
jedec_ac_timings[MAX_NUM_SPEEDBINS] = {
static const struct lpddr2_ac_timings *jedec_ac_timings[MAX_NUM_SPEEDBINS] = {
&timings_jedec_200_mhz,
&timings_jedec_400_mhz
};

View File

@@ -272,3 +272,33 @@ err:
__recalibrate_iodelay_end(ret);
}
void late_recalibrate_iodelay(struct pad_conf_entry const *pad, int npads,
struct iodelay_cfg_entry const *iodelay,
int niodelays)
{
int ret = 0;
/* unlock IODELAY CONFIG registers */
writel(CFG_IODELAY_UNLOCK_KEY, (*ctrl)->iodelay_config_base +
CFG_REG_8_OFFSET);
ret = calibrate_iodelay((*ctrl)->iodelay_config_base);
if (ret)
goto err;
ret = update_delay_mechanism((*ctrl)->iodelay_config_base);
/* Configure Mux settings */
do_set_mux32((*ctrl)->control_padconf_core_base, pad, npads);
/* Configure Manual IO timing modes */
ret = do_set_iodelay((*ctrl)->iodelay_config_base, iodelay, niodelays);
if (ret)
goto err;
err:
/* lock IODELAY CONFIG registers */
writel(CFG_IODELAY_LOCK_KEY, (*ctrl)->iodelay_config_base +
CFG_REG_8_OFFSET);
}

View File

@@ -5,7 +5,7 @@
*/
#include <common.h>
#include <libfdt.h>
#include <linux/libfdt.h>
#include <fdt_support.h>
#include <malloc.h>

View File

@@ -438,17 +438,17 @@ void enable_basic_clocks(void)
setbits_le32((*prcm)->cm_l4per_gpio4_clkctrl,
GPIO4_CLKCTRL_OPTFCLKEN_MASK);
/* Enable 96 MHz clock for MMC1 & MMC2 */
/* Enable 192 MHz clock for MMC1 & MMC2 */
setbits_le32((*prcm)->cm_l3init_hsmmc1_clkctrl,
HSMMC_CLKCTRL_CLKSEL_MASK);
setbits_le32((*prcm)->cm_l3init_hsmmc2_clkctrl,
HSMMC_CLKCTRL_CLKSEL_MASK);
/* Set the correct clock dividers for mmc */
setbits_le32((*prcm)->cm_l3init_hsmmc1_clkctrl,
HSMMC_CLKCTRL_CLKSEL_DIV_MASK);
setbits_le32((*prcm)->cm_l3init_hsmmc2_clkctrl,
HSMMC_CLKCTRL_CLKSEL_DIV_MASK);
clrbits_le32((*prcm)->cm_l3init_hsmmc1_clkctrl,
HSMMC_CLKCTRL_CLKSEL_DIV_MASK);
clrbits_le32((*prcm)->cm_l3init_hsmmc2_clkctrl,
HSMMC_CLKCTRL_CLKSEL_DIV_MASK);
/* Select 32KHz clock as the source of GPTIMER1 */
setbits_le32((*prcm)->cm_wkup_gptimer1_clkctrl,

View File

@@ -70,6 +70,8 @@ config TARGET_PORTER
bool "Porter board"
select DM
select DM_SERIAL
select SUPPORT_SPL
select SPL_DM if SPL
config TARGET_STOUT
bool "Stout board"

View File

@@ -61,6 +61,7 @@ static const struct {
{ RMOBILE_CPU_TYPE_R8A7794, "R8A7794" },
{ RMOBILE_CPU_TYPE_R8A7795, "R8A7795" },
{ RMOBILE_CPU_TYPE_R8A7796, "R8A7796" },
{ RMOBILE_CPU_TYPE_R8A77965, "R8A77965" },
{ RMOBILE_CPU_TYPE_R8A77970, "R8A77970" },
{ RMOBILE_CPU_TYPE_R8A77995, "R8A77995" },
{ 0x0, "CPU" },

View File

@@ -33,6 +33,7 @@
#define RMOBILE_CPU_TYPE_R8A7794 0x4C
#define RMOBILE_CPU_TYPE_R8A7795 0x4F
#define RMOBILE_CPU_TYPE_R8A7796 0x52
#define RMOBILE_CPU_TYPE_R8A77965 0x55
#define RMOBILE_CPU_TYPE_R8A77970 0x54
#define RMOBILE_CPU_TYPE_R8A77995 0x58

View File

@@ -100,6 +100,7 @@ void rcar_gen3_memmap_fixup(void)
mem_map = r8a7795_mem_map;
break;
case RMOBILE_CPU_TYPE_R8A7796:
case RMOBILE_CPU_TYPE_R8A77965:
mem_map = r8a7796_mem_map;
break;
case RMOBILE_CPU_TYPE_R8A77970:

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@@ -72,6 +72,16 @@ config ROCKCHIP_RK3288
and video codec support. Peripherals include Gigabit Ethernet,
USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
if ROCKCHIP_RK3288
config TPL_LDSCRIPT
default "arch/arm/mach-rockchip/rk3288/u-boot-tpl.lds"
config TPL_TEXT_BASE
default 0xff704000
endif
config ROCKCHIP_RK3328
bool "Support Rockchip RK3328"
select ARM64

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@@ -0,0 +1,10 @@
/*
* Copyright (C) 2018 Jagan Teki <jagan@amarulasolutions.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#undef CONFIG_SPL_TEXT_BASE
#define CONFIG_SPL_TEXT_BASE CONFIG_TPL_TEXT_BASE
#include "../../cpu/u-boot-spl.lds"

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@@ -69,6 +69,10 @@ config TARGET_SOCFPGA_ARIES_MCVEVK
bool "Aries MCVEVK (Cyclone V)"
select TARGET_SOCFPGA_CYCLONE5
config TARGET_SOCFPGA_DEVBOARDS_DBM_SOC1
bool "Devboards DBM-SoC1 (Cyclone V)"
select TARGET_SOCFPGA_CYCLONE5
config TARGET_SOCFPGA_EBV_SOCRATES
bool "EBV SoCrates (Cyclone V)"
select TARGET_SOCFPGA_CYCLONE5
@@ -108,6 +112,7 @@ config SYS_BOARD
default "arria5-socdk" if TARGET_SOCFPGA_ARRIA5_SOCDK
default "arria10-socdk" if TARGET_SOCFPGA_ARRIA10_SOCDK
default "cyclone5-socdk" if TARGET_SOCFPGA_CYCLONE5_SOCDK
default "dbm-soc1" if TARGET_SOCFPGA_DEVBOARDS_DBM_SOC1
default "de0-nano-soc" if TARGET_SOCFPGA_TERASIC_DE0_NANO
default "de1-soc" if TARGET_SOCFPGA_TERASIC_DE1_SOC
default "de10-nano" if TARGET_SOCFPGA_TERASIC_DE10_NANO
@@ -123,6 +128,7 @@ config SYS_VENDOR
default "altera" if TARGET_SOCFPGA_ARRIA10_SOCDK
default "altera" if TARGET_SOCFPGA_CYCLONE5_SOCDK
default "aries" if TARGET_SOCFPGA_ARIES_MCVEVK
default "devboards" if TARGET_SOCFPGA_DEVBOARDS_DBM_SOC1
default "ebv" if TARGET_SOCFPGA_EBV_SOCRATES
default "samtec" if TARGET_SOCFPGA_SAMTEC_VINING_FPGA
default "terasic" if TARGET_SOCFPGA_TERASIC_DE0_NANO
@@ -137,6 +143,7 @@ config SYS_CONFIG_NAME
default "socfpga_arria5_socdk" if TARGET_SOCFPGA_ARRIA5_SOCDK
default "socfpga_arria10_socdk" if TARGET_SOCFPGA_ARRIA10_SOCDK
default "socfpga_cyclone5_socdk" if TARGET_SOCFPGA_CYCLONE5_SOCDK
default "socfpga_dbm_soc1" if TARGET_SOCFPGA_DEVBOARDS_DBM_SOC1
default "socfpga_de0_nano_soc" if TARGET_SOCFPGA_TERASIC_DE0_NANO
default "socfpga_de1_soc" if TARGET_SOCFPGA_TERASIC_DE1_SOC
default "socfpga_de10_nano" if TARGET_SOCFPGA_TERASIC_DE10_NANO

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@@ -8,7 +8,7 @@
#include <asm/io.h>
#include <errno.h>
#include <fdtdec.h>
#include <libfdt.h>
#include <linux/libfdt.h>
#include <altera.h>
#include <miiphy.h>
#include <netdev.h>

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@@ -8,7 +8,7 @@
#include <asm/io.h>
#include <errno.h>
#include <fdtdec.h>
#include <libfdt.h>
#include <linux/libfdt.h>
#include <altera.h>
#include <miiphy.h>
#include <netdev.h>

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@@ -8,7 +8,7 @@
#include <common.h>
#include <spl.h>
#include <libfdt.h>
#include <linux/libfdt.h>
#include <nand.h>
#include <stdio.h>
#include <linux/io.h>

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@@ -6,7 +6,7 @@
*/
#include <common.h>
#include <libfdt.h>
#include <linux/libfdt.h>
#include <linux/kernel.h>
#include "init.h"

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@@ -63,4 +63,7 @@ config BOOT_INIT_FILE
Add register writes to boot.bin format (max 256 pairs).
Expect a table of register-value pairs, e.g. "0x12345678 0x4321"
config ZYNQ_SDHCI_MAX_FREQ
default 52000000
endif

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@@ -17,11 +17,6 @@
DECLARE_GLOBAL_DATA_PTR;
int arch_fixup_fdt(void *blob)
{
return 0;
}
int do_bootm_linux(int flag, int argc, char * const argv[],
bootm_headers_t *images)
{
@@ -62,11 +57,12 @@ int do_bootm_linux(int flag, int argc, char * const argv[],
of_flat_tree = (char *)simple_strtoul(argv[1], NULL, 16);
/* fixup the initrd now that we know where it should be */
if (images->rd_start && images->rd_end && of_flat_tree)
if (images->rd_start && images->rd_end && of_flat_tree) {
ret = fdt_initrd(of_flat_tree, images->rd_start,
images->rd_end);
if (ret)
return 1;
}
#ifdef DEBUG
printf("## Transferring control to Linux (at address 0x%08lx) ",

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@@ -253,17 +253,15 @@ static int boot_reloc_fdt(bootm_headers_t *images)
#endif
}
#if CONFIG_IS_ENABLED(MIPS_BOOT_FDT) && CONFIG_IS_ENABLED(OF_LIBFDT)
int arch_fixup_fdt(void *blob)
{
#if CONFIG_IS_ENABLED(MIPS_BOOT_FDT) && CONFIG_IS_ENABLED(OF_LIBFDT)
u64 mem_start = virt_to_phys((void *)gd->bd->bi_memstart);
u64 mem_size = gd->ram_size;
return fdt_fixup_memory_banks(blob, &mem_start, &mem_size, 1);
#else
return 0;
#endif
}
#endif
static int boot_setup_fdt(bootm_headers_t *images)
{

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@@ -15,12 +15,6 @@
DECLARE_GLOBAL_DATA_PTR;
int arch_fixup_fdt(void *blob)
{
return 0;
}
#if defined(CONFIG_SETUP_MEMORY_TAGS) || \
defined(CONFIG_CMDLINE_TAG) || \
defined(CONFIG_INITRD_TAG) || \

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@@ -15,7 +15,7 @@
#include <command.h>
#include <mpc83xx.h>
#include <asm/processor.h>
#include <libfdt.h>
#include <linux/libfdt.h>
#include <tsec.h>
#include <netdev.h>
#include <fsl_esdhc.h>

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@@ -8,7 +8,7 @@
*/
#include <common.h>
#include <libfdt.h>
#include <linux/libfdt.h>
#include <fdt_support.h>
#include <asm/processor.h>

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@@ -11,7 +11,7 @@
#include <pci.h>
#if defined(CONFIG_OF_LIBFDT)
#include <libfdt.h>
#include <linux/libfdt.h>
#include <fdt_support.h>
#endif

View File

@@ -8,7 +8,7 @@
*/
#include <common.h>
#include <libfdt.h>
#include <linux/libfdt.h>
#include <fdt_support.h>
#include <asm/processor.h>
#include <linux/ctype.h>

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@@ -5,7 +5,7 @@
*/
#include <common.h>
#include <libfdt.h>
#include <linux/libfdt.h>
#include <fdt_support.h>
#include <asm/immap_85xx.h>

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@@ -5,7 +5,7 @@
*/
#include <common.h>
#include <libfdt.h>
#include <linux/libfdt.h>
#include <fdt_support.h>
#include <asm/processor.h>

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@@ -5,7 +5,7 @@
*/
#include <common.h>
#include <libfdt.h>
#include <linux/libfdt.h>
#include <fdt_support.h>
#include <asm/mp.h>

View File

@@ -28,7 +28,7 @@
#include <asm/io.h>
#if defined(CONFIG_OF_LIBFDT)
#include <libfdt.h>
#include <linux/libfdt.h>
#include <fdt_support.h>
#endif

View File

@@ -7,7 +7,7 @@
*/
#include <common.h>
#include <libfdt.h>
#include <linux/libfdt.h>
#include <fdt_support.h>
DECLARE_GLOBAL_DATA_PTR;

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@@ -8,7 +8,7 @@
*/
#include <common.h>
#include <libfdt.h>
#include <linux/libfdt.h>
#include <fdt_support.h>
#include <asm/mp.h>
#include <asm/fsl_serdes.h>

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@@ -22,7 +22,7 @@
#include <vxworks.h>
#if defined(CONFIG_OF_LIBFDT)
#include <libfdt.h>
#include <linux/libfdt.h>
#include <fdt_support.h>
#endif
@@ -40,11 +40,6 @@ static void set_clocks_in_mhz (bd_t *kbd);
#define CONFIG_SYS_LINUX_LOWMEM_MAX_SIZE (768*1024*1024)
#endif
int arch_fixup_fdt(void *blob)
{
return 0;
}
static void boot_jump_linux(bootm_headers_t *images)
{
void (*kernel)(bd_t *, ulong r4, ulong r5, ulong r6,

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@@ -10,6 +10,11 @@ config SYS_BOARD
config SYS_CPU
default "sandbox"
config SANDBOX64
bool "Use 64-bit addresses"
select PHYS_64BIT
select HOST_64BIT
config SANDBOX_SPL
bool "Enable SPL for sandbox"
select SUPPORT_SPL
@@ -20,24 +25,25 @@ config SYS_CONFIG_NAME
choice
prompt "Run sandbox on 32/64-bit host"
default SANDBOX_64BIT
default HOST_64BIT
help
Sandbox can be built on 32-bit and 64-bit hosts.
The default is to build on a 64-bit host and run
on a 64-bit host. If you want to run sandbox on
a 32-bit host, change it here.
config SANDBOX_32BIT
config HOST_32BIT
bool "32-bit host"
depends on !PHYS_64BIT
config SANDBOX_64BIT
config HOST_64BIT
bool "64-bit host"
endchoice
config SANDBOX_BITS_PER_LONG
int
default 32 if SANDBOX_32BIT
default 64 if SANDBOX_64BIT
default 32 if HOST_32BIT
default 64 if HOST_64BIT
endmenu

View File

@@ -6,7 +6,7 @@
#include <common.h>
#include <dm.h>
#include <errno.h>
#include <libfdt.h>
#include <linux/libfdt.h>
#include <os.h>
#include <asm/io.h>
#include <asm/state.h>
@@ -76,7 +76,7 @@ void *map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags)
if (enable_pci_map && !pci_map_physmem(paddr, &len, &map_dev, &ptr)) {
if (plen != len) {
printf("%s: Warning: partial map at %x, wanted %lx, got %lx\n",
__func__, paddr, len, plen);
__func__, (uint)paddr, len, plen);
}
map_len = len;
return ptr;

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@@ -153,7 +153,7 @@ int sandbox_read_state(struct sandbox_state *state, const char *fname)
return ret;
}
/* Call all the state read funtcions */
/* Call all the state read functions */
got_err = false;
blob = state->state_fdt;
io = ll_entry_start(struct sandbox_state_io, state_io);

View File

@@ -2,7 +2,11 @@
# SPDX-License-Identifier: GPL-2.0+
#
ifdef CONFIG_SANDBOX64
dtb-$(CONFIG_SANDBOX) += sandbox64.dtb
else
dtb-$(CONFIG_SANDBOX) += sandbox.dtb
endif
dtb-$(CONFIG_UT_DM) += test.dtb
targets += $(dtb-y)

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