commit 8c4037a09a ("imx: hab: Ensure the IVT DCD pointer is Null prior
to calling HAB authenticate function.") makes the DCD field being NULL a
dependency.
This change though will break loading and executing of existing pre-signed
binaries on a u-boot update i.e. if this change is deployed on a board you
will be forced to redo all images on that board to NULL out the DCD.
There is no prior guidance from NXP that the DCD must be NULL similarly
public guidance on usage of the HAB doesn't call out this NULL dependency
(see boundary devices link).
Since later SoCs will reject a non-NULL DCD there's no reason to make a
NULL DCD a requirement, however if there is an actual dependency for later
SoCs the appropriate fix would be to do SoC version checking.
Earlier SoCs are capable (and happy) to authenticate images with non-NULL
DCDs, we should not be forcing this change on downstream users -
particularly if it means those users now must rewrite their build systems
and/or redeploy signed images in the field.
Fixes: 8c4037a09a ("imx: hab: Ensure the IVT DCD pointer is Null prior
to calling HAB authenticate function.")
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Utkarsh Gupta <utkarsh.gupta@nxp.com>
Cc: Breno Lima <breno.lima@nxp.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Link: https://boundarydevices.com/high-assurance-boot-hab-dummies
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
The README.mxc_hab is outdated and need improvements, add the following
modifications:
- Reorganize document and remove duplicate content
- Add CST download link
- Update CST package name
- Align command lines with CST v2.3.3
- Update U-Boot binary name
- Remove CSF padding since is not documented in AN4581
Signed-off-by: Breno Lima <breno.lima@nxp.com>
Currently the High Assurance Boot procedure is documented in two
places:
- doc/README.imx6
- doc/README.mxc_hab
It is better to consolidate all HAB related information into
README.mxc_hab file, so move the content from README.imx6 to
README.mxc_hab.
Signed-off-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
commit ed286bc80e ("imx: hab: Check if CSF is valid before authenticating
image") makes use of "__packed" as a prefix to the "struct hab_hdr"
declaration.
With my compiler "gcc version 7.2.1 20171011 (Linaro GCC 7.2-2017.11)" we
get:
./arch/arm/include/asm/mach-imx/hab.h:42:25: error: expected ‘=’, ‘,’, ‘;’,
‘asm’ or ‘__attribute__’ before ‘{’ token
struct __packed hab_hdr {
Fix this problem by including <linux/compiler.h>
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Utkarsh Gupta <utkarsh.gupta@nxp.com>
Cc: Breno Lima <breno.lima@nxp.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
This patch fixes the wrongly included dtsi file which was
breaking mainline support for Engicam i.CoreM6 DualLite/Solo RQS.
Linux commit details for the same change as
"ARM: dts: imx6dl: Include correct dtsi file for Engicam i.CoreM6
DualLite/Solo RQS"
(sha1: c0c6bb2322964bd264b4ddedaa5776f40c709f0c)
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
usdhc4 node need to update pinctrl, bus-width and non-removable
properties, sync the same from Linux.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
The system call used by mkimage to run dtc redirects stdout to a
temporary file. This can cause problems on Windows (with a MinGW
cross-compiled version). Using the "-o" dtc parameter avoids
this problem.
Signed-off-by: Stefan Theil <stefan.theil@mixed-mode.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
kmerr: verify that malloc and calloc are followed by a check to verify
that we are not out of memory.
badzero: Compare pointer-typed values to NULL rather than 0
Both checks are copied from the Linux kernel archive.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
After the UART was initialized, we may still have bogus data in the
RX queue if it was enabled with incorrect pin muxing before.
So let's flush the RX queue whenever we initialize baud rates.
This fixes a regression with the dynamic pinmuxing code when enable_uart=1
is not set in config.txt on Raspberry Pis that use pl011 for serial.
Fixes: caf2233b28 ("bcm283x: Add pinctrl driver")
Reported-by: Göran Lundberg <goran@lundberg.email>
Reported-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
Tested-by: Tuomas Tynkkynen <tuomas@tuxera.com>
After the UART was initialized, we may still have bogus data in the
RX queue if it was enabled with incorrect pin muxing before.
So let's flush the RX queue whenever we initialize baud rates.
This fixes a regression with the dynamic pinmuxing code when enable_uart=1
is not set in config.txt.
Fixes: caf2233b28 ("bcm283x: Add pinctrl driver")
Reported-by: Göran Lundberg <goran@lundberg.email>
Reported-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
Tested-by: Tuomas Tynkkynen <tuomas@tuxera.com>
The following config symbols are only defined once and never referenced
anywhere else:
CONFIG_AT91SAM9263EK
CONFIG_AT91SAM9RLEK
CONFIG_BARIX_IPAM390
CONFIG_BOARD_H2200
CONFIG_EP9301
CONFIG_KZM_A9_GT
CONFIG_PICOSAM
CONFIG_PLATINUM_PICON
CONFIG_PLATINUM_TITANIUM
CONFIG_PM9261
CONFIG_PM9263
CONFIG_PM9G45
CONFIG_SIEMENS_DRACO
CONFIG_SIEMENS_PXM2
CONFIG_SIEMENS_RUT
CONFIG_SMDKC100
CONFIG_SMDKV310
CONFIG_STM32F4DISCOVERY
Most of them are config symbols named after the respective boards which
seems to have been a standard practice at some point.
Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
The following config symbols are only defined once and never referenced
anywhere else:
CONFIG_ARM926EJS
CONFIG_CPUAT91
CONFIG_EXYNOS5800
CONFIG_SYS_CORTEX_R4
Most of them are config symbols named after the respective SoCs which
seems to have been a standard practice at some point.
Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
The following config symbols are only defined once and never referenced
anywhere else:
CONFIG_DBAU1X00
CONFIG_PB1X00
Most of them are config symbols named after the respective boards which
seems to have been a standard practice at some point.
Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
The @gdsys.cc addresses are supposed to be used for mailing lists.
Switch all occurrences of @gdsys.de mail addresses to their @gdsys.cc
equivalent.
Also, Dirk's address was wrong in one place; fix that as well.
Signed-off-by: Mario Six <six@gdsys.cc>
CONFIG_SYS_CBSIZE determines the maximum length of the kernel command
line, and the default value of 256 is too small for booting some Linux
images in the wild.
Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Without the volatile attribute, compilers are entitled to optimize out
the same asm(). In the case of __udelay() in syscounter.c, it calls
`get_ticks()` twice, one for the starting time and the second in the
loop to check the current time. When compilers inline `get_ticks()`
they see the same `mrrc` instructions and optimize out the second one.
This leads to infinite loop since we don't get updated value from the
system counter.
Here is a portion of the disassembly of __udelay:
88: 428b cmp r3, r1
8a: f8ce 20a4 str.w r2, [lr, #164] ; 0xa4
8e: bf08 it eq
90: 4282 cmpeq r2, r0
92: f8ce 30a0 str.w r3, [lr, #160] ; 0xa0
96: d3f7 bcc.n 88 <__udelay+0x88>
98: e8bd 8cf0 ldmia.w sp!, {r4, r5, r6, r7, sl, fp, pc}
Note that final jump / loop at 96 to 88, we don't have any `mrrc`.
With a volatile attribute, the above changes to this:
8a: ec53 2f0e mrrc 15, 0, r2, r3, cr14
8e: 42ab cmp r3, r5
90: f8c1 20a4 str.w r2, [r1, #164] ; 0xa4
94: bf08 it eq
96: 42a2 cmpeq r2, r4
98: f8c1 30a0 str.w r3, [r1, #160] ; 0xa0
9c: d3f5 bcc.n 8a <__udelay+0x8a>
9e: e8bd 8cf0 ldmia.w sp!, {r4, r5, r6, r7, sl, fp, pc}
a2: bf00 nop
I'm advised[1] to put volatile on all asm(), so this commit also adds it
to the asm() in timer_init().
[1]: https://lists.denx.de/pipermail/u-boot/2018-March/322062.html
Signed-off-by: Yasushi SHOJI <yasushi.shoji@gmail.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Sometimes imximage throws the following error:
CFGS board/freescale/vf610twr/imximage.cfg.cfgtmp
CFGS board/freescale/vf610twr/imximage.cfg.cfgtmp
MKIMAGE u-boot-dtb.imx
Error: No BOOT_FROM tag in board/freescale/vf610twr/imximage.cfg.cfgtmp
arch/arm/mach-imx/Makefile💯 recipe for target 'u-boot-dtb.imx' failed
Later on, when running mkimage for the u-boot.imx it will succeed in
finding the IVT offset.
Looks like some race condition happening during parallel build when
processing mkimage for u-boot-dtb.imx and u-boot.imx.
A proper fix still needs to be implemented, but as a workaround let's
remove the error when the IVT offset is not found.
It is useful to have such message, especially during bring-up phase,
but the build error that it causes is severe, so better avoid the
build error for now.
The error checking can be re-implemented later when we have a proper
fix.
Reported-by: Breno Lima <breno.lima@nxp.com>
Reported-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Keep spelling.txt in sync with the version from kernel 4.16-rc4.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Thomas reported U-Boot failed to build host tools if libfdt-devel
package is installed because tools include libfdt headers from
/usr/include/ instead of using internal ones.
This commit moves the header code:
include/libfdt.h -> include/linux/libfdt.h
include/libfdt_env.h -> include/linux/libfdt_env.h
and replaces include directives:
#include <libfdt.h> -> #include <linux/libfdt.h>
#include <libfdt_env.h> -> #include <linux/libfdt_env.h>
Reported-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
There are no headers for libfdt in lib/libfdt, as they are instead
located in scripts/dtc/libfdt. Specifying lib/libfdt for headers
inclusion in host tools results in using the system libfdt headers,
which is not what we want. Change this to the proper path.
Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Add a comment indicating that the German key map assumes code page 437.
Add support for character ² (square sign) in the German key map.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
The PCA953x driver uses "gpio@%x_" as the GPIO bank name, where "%x" is
instantiated with the I2C address of the chip. While this works, it
becomes very confusing if a board has multiple PCAs with the same
address on different I2C busses, and it also becomes an issue when a
GPIO's value is to be set via the 'gpio' command, because this command
only ever sets the value of the first device it encounters, leaving the
other devices inaccessible to the command.
As to not break boards that rely on this naming scheme, we introduce a
new device tree string property "label" for the driver. If it exists, it
is used to build a bank name of the form "%s@%x_" (where %x is still
instantiated with the I2C address). If it does not exist, the legacy
labeling scheme is used.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Rename CONFIG_SPL_USBETH_SUPPORT to CONFIG_SPL_USB_ETHER.
This enables users to block text using CONFIG_IS_ENABLED() instead
of resorting to #if ladders with SPL and non-SPL cases.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Treat the first equal sign as a key/value separation too. This makes
the script files compatible with mkenvimage input file format. It
won't support variables with equal signs anymore, but this seems not
really like a loss.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Ensure that the Atmel TPM driver performs sufficient
validation of the length returned in the TPM response header.
This patch prevents memory corruption if the header contains a
length value that is larger than the destination buffer.
Signed-off-by: Jeremy Boone <jeremy.boone@nccgroup.trust>
Ensure that the Infineon I2C and SPI TPM driver performs adequate
validation of the length extracted from the TPM response header.
This patch prevents integer underflow when the length was too small,
which could lead to memory corruption.
Signed-off-by: Jeremy Boone <jeremy.boone@nccgroup.trust>
This patch prevents integer underflow when the length was too small,
which could lead to memory corruption.
Signed-off-by: Jeremy Boone <jeremy.boone@nccgroup.trust>
This patch got dropped during the update of DTs to 4.14, re-add it
back. This adds reset GPIOs to the ethernet PHYs.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Add R8A77965 M3N Salvator-XS development kit support. This kit is
similar to the other Salvator-X(S) ones, except is has M3N SoC on
it.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Xilinx Kconfig changes for v2018.03
- Moving some macros to Kconfig
# gpg: Signature made Thu 01 Mar 2018 10:45:58 AM EST using DSA key ID 294A0C21
# gpg: Good signature from "Michal Simek <monstr@monstr.eu>"
# gpg: aka "Michal Simek (Xilinx) <michals@xilinx.com>"
# gpg: aka "Michal Simek (Xilinx) <michal.simek@xilinx.com>"
This patch added Kconfig support for CONFIG_ZYNQ_SDHCI_MIN_FREQ
and enabled it in respective defconfig.
Signed-off-by: Vipul Kumar <vipulk@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This patch added Kconfig support for CONFIG_ZYNQ_SDHCI_MAX_FREQ
and enabled it in respective defconfig.
Signed-off-by: Vipul Kumar <vipulk@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This patch added Kconfig support for CONFIG_XILINX_GPIO
and enabled it in respective defconfig.
Signed-off-by: Vipul Kumar <vipulk@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This patch added Kconfig support for CONFIG_ZYNQ_I2C0 and
CONFIG_ZYNQ_I2C1 and enabled it in respective defconfig.
Signed-off-by: Vipul Kumar <vipulk@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This patch added Kconfig support for CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET
and enabled it in respective defconfig.
Signed-off-by: Vipul Kumar <vipulk@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This patch added Kconfig support for CONFIG_SYS_I2C_ZYNQ_SPEED
and set it to default value 100000.
Signed-off-by: Vipul Kumar <vipulk@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This patch added Kconfig support for CONFIG_SYS_I2C_ZYNQ_SLAVE
and set it default to 0.
Signed-off-by: Vipul Kumar <vipulk@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This patch added Kconfig support for CONFIG_FPGA_ZYNQPL and migrates the
values over to the defconfigs.
Signed-off-by: Vipul Kumar <vipulk@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
This patch added Kconfig support for FPGA_SPARTAN3 and migrates the
values over to the defconfigs.
Signed-off-by: Vipul Kumar <vipulk@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Enable networking command only when NET is enabled.
And remove selecting NET for CMD_NET
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
The u-boot-elf.srec is needed for the minimon update on Gen3 SoCs,
conveniently generate this file.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
After commit ba1f966725 ("net: designware: add clock support")
we got NET broken on axs101 and axs103 platforms.
Some clock don't support gating so their clock drivers don't
implement .enable/.disable callbacks. In such case clk_enable
returns -ENOSYS.
Also some clock drivers implement .enable/.disable callbacks not for all
clock IDs and return -ENOSYS (or -ENOTSUPP) for others.
If we have such clock in 'clocks' list of designware ethernet controller
node we fail to probe designware ethernet.
Fix it.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Commit 68e6ecadc5 ("net: phy: marvell 88e151x: Fix handling of RGMII
interface types") fixed the initialization of 88e151x phys, but made it
so that interfaces of type PHY_INTERFACE_MODE_RGMII had both RX and TX
delay bits cleared. The default (like in m88e1111s_config) is to have
both bits set.
Hence, this patch changes the behavior in the PHY_INTERFACE_MODE_RGMII
case so that both bits are set.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Fix some style violations (mostly wrong indentions) in the Marvell PHY
driver.
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
tsec_initialize allocates a private driver structure using malloc.
Should the memory allocation of this private structure fail, the
function execution is aborted with a return 0, but the previously
allocated device structure is never freed, hence leaked.
Free the device structure in the error case.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Add support for a new boards from devboards.de , the DBM-SoC1 .
This board has one ethernet port, one USB OTG port and USB UART.
Signed-off-by: Marek Vasut <marex@denx.de>
mmc_of_parse() doesn't set a default value if none is available in DT.
In that case, use a default 52MHz clock rate.
Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Tested-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Some platforms don't have ADMA controllers. For those platforms, compiling
it out reduces the size of the binary by about 600 bytes.
Leaving the support in doesn't break things as the driver checks at runtime
if the ADMA2 controller is present.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Tested-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
The area for struct mmc can be allocated dynamically. It greatly reduces
the size of struct omap_hsmmc_plat. This is useful in cases where the board
level code declares one or two struct omap_hsmmc_plat because it doesn't
use the Driver Model.
This saves around 740 bytes for the am335x_evm SPL.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Tested-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Migrate the users of CONFIG_SYS_BOOTCOUNT_ADDR to Kconfig. We can
provide a default for BOOTCOUNT_AM33XX as that's a specific part of the
RTC in use. We can also provide a default for ARCH_LS1043A and
ARCH_LS1021A as they had been previously calculated and their symbols
are in Kconfig. In the case of other QE-enabled platforms, they are not
so we must update the relevant defconfig files. The previous default
only applied in some cases, even on a specific SoC family.
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Alex Kiernan <alex.kiernan@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Commit d695d66278 ("spl: eMMC/SD: Provide one __weak spl_boot_mode()
function") breaks the boot on several i.MX6 boards,
such as cuboxi and wandboard:
U-Boot SPL 2018.03-rc1-00212-g48914fc119 (Feb 10 2018 - 11:04:33 +1300)
Trying to boot from MMC1
Failed to mount ext2 filesystem...
spl_load_image_ext: ext4fs mount err - 0
Partially revert it so that we can boot U-Boot again on these
i.MX6 platforms.
Reported-by: Jonathan Gray <jsg@jsg.id.au>
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Tested-by: Breno Lima <breno.lima@nxp.com>
The device-tree node for the PMU clk controller assigns to its parent
(i.e. PLL_PPLL) even though this clock currently is set up statically
by an init-function.
In order to avoid unexpected failures, a simple implementation of
set_rate (which accepts requests, but notifies the caller of the
preset frequency in its return value) and get_rate (which always
returns the preset frequency) are added.
Note that this is required for the RK808 PMIC to probe successfully on
the RK3399-Q7, following the support for the assigned-clocks property.
References: commit f4fcba5c5b ("clk: implement clk_set_defaults()")
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
TPL offset 0xff704004 is unaligned address which is adding nearest
8-bytes for next instruction, So 0xff704004 is adding 0x20 for
proper alignment which is causing the next instruction data
0xefffffff is moved.
Hexdump with overlaped bytes:
-----------------------------
0000000 0000 0000 0000 0000 0000 0000 0000 0000
0000010 0000 0000 0000 0000 0000 0000 ffff eaff
So, Fix the TEXT_BASE for proper aligned address 0xff704000
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Due to size limitations in SPL by adding falcon mode,
rk3288 support TPL. In order to not overlap SPL_TEXT_BASE
add TPL_TEXT_BASE with u-boot-tpl.lds that intern call
u-boot-spl.lds with proper TEXT_BASE values.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Since commit ba1f966725 ("net: designware: add clock support"), the
designware GMAC driver enables all referenced clocks. While this is a
no-op for the RK3368 during boot-up (reset behaviour has all the clock
gates open anyway), we still need to handle the clock-ids passed in
the enable op of the clock-driver and return a success.
This change extends the RK3368 clk driver to:
(a) provide a enable op
(b) signals success to the caller when the clocks for the GMAC are
enabled (no actual action is necessary as the gates are open
after reset)
References: commit ba1f966725 ("net: designware: add clock support")
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
Since commit ba1f966725 ("net: designware: add clock support"), the
designware GMAC driver enables all referenced clocks. While this is a
no-op for the RK3399 during boot-up (reset behaviour has all the clock
gates open anyway), we still need to handle the clock-ids passed in
the enable op of the clock-driver and return a success.
This change extends the enable-op of the rk3399 clk driver to signal
success to the caller when the clocks for the GMAC are enabled.
References: commit ba1f966725 ("net: designware: add clock support")
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
usdhc4 has eMMC on icore-rqs boards, SPL is not detecting
it becuase of u-boot,dm-spl flag so add it to make eMMC working.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Tidy up CONFIG_SYS_BOOTCOUNT_SINGLEWORD from the whitelist as there's
no remaining uses of it left.
Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
Make generate boot counter selected in the same way as other boot count
drivers
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
This converts the following to Kconfig:
CONFIG_BOOTCOUNT_I2C
Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
This converts the following to Kconfig:
CONFIG_BOOTCOUNT_RAM
Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
This converts the following to Kconfig:
CONFIG_BOOTCOUNT_ENV
Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
CONFIG_BOOTCOUNT was only used in mx53ppd, merge it with
CONFIG_BOOTCOUNT_LIMIT
Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Ian Ray <ian.ray@ge.com>
With the contents of config_distro_defaults.h migrated to Kconfig,
we can remove this header file completely
Signed-off-by: Adam Ford <aford173@gmail.com>
This converts the following to Kconfig:
CONFIG_BOOTP_BOOTPATH
CONFIG_BOOTP_DNS
CONFIG_BOOTP_GATEWAY
CONFIG_BOOTP_HOSTNAME
CONFIG_BOOTP_PXE
CONFIG_BOOTP_SUBNETMASK
CONFIG_CMDLINE_EDITING
CONFIG_AUTO_COMPLETE
CONFIG_SYS_LONGHELP
CONFIG_SUPPORT_RAW_INITRD
CONFIG_ENV_VARS_UBOOT_CONFIG
Signed-off-by: Adam Ford <aford173@gmail.com>
[trini: Re-run the migration]
Signed-off-by: Tom Rini <trini@konsulko.com>
The video drivers (VOP, HDMI encoder, LVDS encoder, MIPI encoder) for
Rockchip SOCs are self-contained and are mainly impacted by other
changes in the architecture support (e.g. pinctrl, clocking, etc).
Let's add these to the list of files maintained as part of the
Rockchip port.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
This migrates rk_vop (the shared functions used by multiple VOP
mini-drivers) to be compatible with a live tree.
Unfortunately, there's
(i) a lot of tree traversal needed for a VOP (as each active VOP
vnode references back to the endpoints in the encoders and vice
versa) to configure the connection between VOPs and encoders;
(ii) the DTS binding is not too sane and one needs to walk a node's
parents (the original code just assumed that the device would
live 3 levels above the property linked through a phandle) until
a UCLASS_DISPLAY device can be found.
As part of the migration, the code for finding the enclosing display
device has been changed to not assume a specific depth of nesting
(i.e. we walk until we reach the root or find a matching device) and
to use the newly introduced (in the same series) ofnode_get_parent()
function.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
The rk_hdmi (shared functions for multiple HDMI mini-drivers) has been
using devfdt_get_addr() to read the HDMI controller's IO base address.
This will cause a failure with a live tree.
This changes the driver to use dev_read_addr() which is safe both for
flat trees and live trees.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
The Rockchip video drivers need to walk the ofnode-parrents to find
an enclosing device that has a UCLASS_DISPLAY driver bound. This
adds a ofnode_get_parent()-function that returns the parent-node.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
U-Boot pulled in several core makefiles from Linux. The following
are not used in U-Boot:
- CONFIG_DEBUG_SECTION_MISMATCH
- CONFIG_FTRACE_MCOUNT_RECORD
- CONFIG_GCOV_KERNEL
- CONFIG_GCOV_PROFILE_ALL
- CONFIG_KASAN
- CONFIG_MODVERSIONS
We can remove the unused code if we like. (although it will get the
scripts out of sync)
CONFIG_BOOM and CONFIG_HIS_DRIVER are just mentioned in the comment
block of scripts/basic/fixdep.c
CONFIG_SHELL is not configuration, but a variable for internal-use.
It is just a historical misnomer in Kbuild.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
For the omap3_logic boards, the environment is always in NAND.
This removes the ENV_IS_IN_FAT flag to eliminate the extra chatter.
Signed-off-by: Adam Ford <aford173@gmail.com>
Most of architectures have .text section situated in the very beginning
of U-Boot binary and thus it is very logical that CONFIG_SYS_TEXT_BASE
is used on final linkage step to specify where U-Boot gets linked to.
For that we pass the following construction to the LD:
---------------------------->8-----------------------
xxx-ld ... -Ttext $(CONFIG_SYS_TEXT_BASE) ...
---------------------------->8-----------------------
But there could be exceptions. For example:
1. In case of ARCv2 we want to put vectors table in its own section
.ivt in front of .text section which means we need either add an
offset to CONFIG_SYS_TEXT_BASE to compensate for .ivt or don't
pass "-Ttext" to the LD at all and specify link base in linker
script directly.
2. Some architectures even though have .text section in the very
beginning of the U-Boot image still use different symbols to
specify link-base:
* NIOS2: CONFIG_SYS_MONITOR_BASE (which I really like because
that exactly what makes sense - where out image starts but not
beginning of its .text section which just happened to match the
whole image beginning)
* EXTENSA: CONFIG_SYS_TEXT_ADDR
* X86: Which doesn't use CONFIG_SYS_MONITOR_BASE in case of EFI
otherwise sets explicit link base in u-boot.lds
I think that's good to allow for flexibility and don't require each and
every architecture or even platform to specify CONFIG_SYS_TEXT_BASE as well
as use it to set .text section location.
So let's only pass "-Ttext xxx" for those architectures who don't set
link-base explicitly in their linker scripts.
This patch iaddresses comments for previously sent
https://patchwork.ozlabs.org/patch/867540/.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Max Filippov <jcmvbkbc@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
These were dropped in [1], after relocation, for their values offset by
reloc_off.
Unconditionally show the HW values and add a '(reloc)' hint for the
offset values showed after relocation.
Also, the LRs' dumps are now formatted the same way the other regs' are.
[1] Commit 082693f4 ("arm64 :show_regs: show the address before relocation")
Signed-off-by: Karl Beldan <karl.beldan+oss@gmail.com>
Fix build after addition of RSA_get0_key() to LibreSSL.
Patch from Theo Buehler and Stuart Henderson.
Signed-off-by: Theo Buehler <tb@openbsd.org>
Signed-off-by: Stuart Henderson <sthen@openbsd.org>
ll_temac driver was used by Xilinx Microblaze big endian and
Xilinx ppc405/ppc440 SoCs.
ppc support was removed by: "powerpc: remove 4xx support"
(sha1: 98f705c9ce)
and Microblaze BE is not tested for a long time that's why this driver
can be removed because none is going to updated it to DM anyway.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Memory banks with address 0 and size 0 are empty and should not be
passed to the OS via device tree.
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
These got removed in config re-syncs due to a Kconfig bug. Add these
back here.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
This seems to have been missed, possibly due to the inability to
enable TI_SECURE_DEVICE on Keystone2 devices previously.
Fixes: bfebc8c965 ("env: Rename getenv_hex(), getenv_yesno(), getenv_ulong()")
Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
TI_SECURE_DEVICE is used by both OMAP2+ and Keystone2 family devices,
and so when ARCH_OMAP2PLUS was used to gate off the OMAP2+ Kconfig
Keystone2 family devices lost this config option.
Move this option out of mach-omap2 Kconfig to a spot accessible by both
families. We picked arch/arm/Kconfig over the TI specific board/ti/
location as this option is not specific to our boards but rather our
architecture.
Plus at some point this option can be changed to just
SECURE_DEVICE, as having secure parts is not exclusive to TI and
so other vendors can interpret this option as needed by their device
configurations.
Fixes: a93fbf4a78 ("ARM: omap2+: rename config to ARCH_OMAP2PLUS and consolidate Kconfig")
Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
A number of platforms include config_distro_defaults.h but do not enable
CONFIG_DISTRO_DEFAULTS. As they plainly intended to, set that flag and
re-sync config files.
Signed-off-by: Tom Rini <trini@konsulko.com>
MMC card with EXT_CSD_REV value 9 will trigger off-by-one
bug while accessing mmc_versions array. The patch fix that.
Signed-off-by: Alexander Kochetkov <al.kochet@gmail.com>
With modern GCC, we get warnings such as:
cmd/jffs2.c: In function 'mtdparts_init':
arch/sh/include/asm/string.h:110:38:
warning: array subscript is above array bounds [-Warray-bounds]
: "0" (__cs), "1" (__ct), "r" (__cs+__n)
~~~~^~~~
This results in a small size reduction as well.
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Currently SPL_LOAD_FIT is unable to boot from nand on
i.MX6QDL platform, so enable only for MMC boards.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
i.MX6 boards still using raw MMC write for SPL and
u-boot-dtb.img along with Falcon mode configurations,
so drop filesystem based write through SPL_EXT_SUPPORT.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Engicam Is.IoT has eMMC and NAND cpu modules where MMC
is common for both, so remove explicit mmc defconfig.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Currently the following devices are using a different definition for ROM
Vector Table addresses:
- i.MX6DQP = All rev
- i.MX6DQ >= rev 1.5
- i.MX6SDL >= rev 1.2
There is no need to create a new RVT macros since the only update were the
RVT base address. Remove HAB_RVT_*_NEW macros and define a new RVT base
address.
More details about RVT base address can be found on processors Reference
Manual and in the following documents:
EB803: i.MX 6Dual/6Quad Applications Processor Silicon Revision 1.2 to 1.3
Comparison
EB804: i.MX 6Solo/6DualLite Application Processor Silicon Revision 1.1
to 1.2/1.3 Comparison
Signed-off-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Write, Check and Set MID commands have been deprecated from the Code
Signing Tool (CST) v2.3.3 and will not be implemented in newer versions
of HAB, hence the following features are no longer available:
- Write Data
- Clear Mask
- Set Mask
- Check All Clear
- Check All Set
- Check Any Clear
- Check Any Set
- Set MID
The inappropriate use of Write Data command may lead to an incorrect
authentication boot flow. Since no specific application has been identified
that requires the use of any of these features, it is highly recommended to
add this check.
Signed-off-by: Utkarsh Gupta <utkarsh.gupta@nxp.com>
Signed-off-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
For proper authentication the HAB code must check if the CSF is valid.
Users must call the csf_is_valid() function to parse the CSF prior to
authenticating any additional images. The function will return a failure
if any of the following invalid conditions are met:
- CSF pointer is NULL
- CSF Header does not exist
- CSF does not lie within the image bounds
- CSF command length zero
Signed-off-by: Utkarsh Gupta <utkarsh.gupta@nxp.com>
Signed-off-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
DCD commands should only be present in the initial boot image loaded by
the SoC ROM. DCD should not be present in images that will be verified
by software using HAB RVT authentication APIs. Newer versions of HAB
will generate an error if a DCD pointer is present in an image being
authenticated by calling the HAB RVT API. Older versions of HAB will
process and run DCD if it is present, and this could lead to an incorrect
authentication boot flow.
It is highly recommended this check is in place to ensure additional HAB
verified images do not include a DCD table.
Signed-off-by: Utkarsh Gupta <utkarsh.gupta@nxp.com>
Signed-off-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Currently it is not possible to run CMD_DEK on i.MX SPL targets:
=> dek_blob 0x12000000 0x12001000 128
The system hangs after running dek_blob because the CAAM clock is being
disabled by the HAB code. There is no need to disable CAAM clock after
authenticating additional boot images, thus keep CAAM clock enabled to
address this issue.
Signed-off-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
This reverts commit edf0093732 for
cm_fx6 iMX.6 Solo module as it causes frequent (around 10 percent of
power cycles) board's hangs.
These hangs happen in SPL when BSS is being initialized in SDRAM -
it appear that variables from BSS contain trash values which lead to board
hangs. Looks like that SDRAM doesn't yet finish initialization in these
cases.
Signed-off-by: Maxim Yu. Osipov <mosipov@ilbers.de>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Based on reading over the GCC manual, passing both -m2a and -m2a-nofpu
are redundant, as -m2a-nofpu will provide functional code for both. As
-m2a-nofpu functions with more toolchains and does what is expected,
switch.
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
When FASTBOOT is activated, only one the supported device is supported in
code at the same time
- CONFIG_FASTBOOT_FLASH_MMC_DEV
- CONFIG_FASTBOOT_FLASH_NAND_DEV
But Today the choice is not exclusive in Kconfig
and that cause Kconfig issue when :
- CONFIG_FASTBOOT, CONFIG_MMC, CONFIG_NAND are activated
- CONFIG_FASTBOOT_FLASH_MMC_DEV = 0
- CONFIG_FASTBOOT_FLASH_NAND_DEV is not activated
The patch add a choice in Kconfig to select the FLASH provider
- CONFIG_FASTBOOT_FLASH_MMC
- CONFIG_FASTBOOT_FLASH_NAND
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Fix two build warnings when building for arm64:
drivers/dfu/dfu_tftp.c: In function ‘dfu_tftp_write’:
drivers/dfu/dfu_tftp.c:59:37: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
ret = dfu_write_from_mem_addr(dfu, (void *)addr, len);
^
and
drivers/dfu/dfu_tftp.c: In function ‘dfu_tftp_write’:
drivers/dfu/dfu_tftp.c:41:8: warning: format ‘%u’ expects argument of type ‘unsigned int’, but argument 4 has type ‘__kernel_size_t {aka long unsigned int}’ [-Wformat=]
debug("%s: image name: %s strlen: %u\n", __func__, sb, strlen(sb));
^
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Lukasz Majewski <lukma@denx.de>
Do the following to make the symbol names less confusing.
sed -i "s/\([TU][^_]\+\)_FUNCTION_DFU/DFU_OVER_\1/g" \
`git grep _FUNCTION_DFU | cut -d ":" -f 1 | sort -u`
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Lukasz Majewski <lukma@denx.de>
Clean up the screaming mess of configuration options that DFU is.
It was impossible to configure DFU such that TFTP is enabled and
USB is not, this patch fixes that and assures that DFU TFTP and
DFU USB can be enabled separatelly and that the correct pieces
of code are compiled in.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Lukasz Majewski <lukma@denx.de>
If SYS_STDIO_DEREGISTER is not selected and USB_KEYBOARD is selected
U-Boot cannot be built due to missing function stdio_deregister_dev.
So USB_KEYBOARD should select SYS_STDIO_DEREGISTER.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
The SDP protocol contains multiple 32bit pointers. Add a helper function
to get a valid pointer from these values and use it.
This fixes the following warnings:
drivers/usb/gadget/f_sdp.c: In function ‘sdp_rx_data_complete’:
drivers/usb/gadget/f_sdp.c:347:10: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
memcpy((void *)sdp->dnl_address, req->buf + 1, datalen);
^
drivers/usb/gadget/f_sdp.c: In function ‘sdp_jump_imxheader’:
drivers/usb/gadget/f_sdp.c:625:10: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
entry = (void *)headerv2->entry;
^
drivers/usb/gadget/f_sdp.c: In function ‘sdp_handle_in_ep’:
drivers/usb/gadget/f_sdp.c:668:20: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
memcpy(&data[1], (void *)sdp_func->dnl_address, datalen);
^
drivers/usb/gadget/f_sdp.c:679:31: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
status = sdp_jump_imxheader((void *)sdp_func->jmp_address);
^
Signed-off-by: Andre Heider <a.heider@gmail.com>
If some configs are disabled, number of freqs array will not assigned to
correct value with bus_mode.
Synchornize the ordering with enum bus_mode in mmc.h.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
This commit fixes several issues:
- After moving env related code to ./env directory the env_common.o file
is no longer present in the system (has been replaced with built-in.o).
- Use ${OBJCOPY} if available, fallback to system default's objcopy if not
present.
- Extend the script to accept different build directory than current one.
It is extremely handy with OE usage, where source code is separated from
build.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Tested-by: Alex Kiernan <alex.kiernan@gmail.com>
When booting from a non-MMC device, the MMC sub-system may not be
initialized when the environment is first accessed.
We need to make sure that the MMC sub-system is ready in even a non-MMC
boot case.
Therefore, initialize mmc before loading environment from it.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
These ARM boards are in nice shape and still being used a lot
with e.g. QEMU, so I can maintain them.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The correspondence between mmc versions as used in u-boot and the version
numbers reported in register EXT_CSD_REV is wrong for versions above and
including MMC_VERSION_4_41. All those versions were shifted by one:
real 4.5 hardware appeared to be MMC_VERSION_5_0.
Fix this by adding the missing version in the correspondence table.
Reported-by: eil Eilmsteiner Heribert <eil@keba.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
After settings the speed of the sd with the switch command, a check is
done to make sure that the new speed has been set. The current check has a
masking error: speed are encoded on 4 bits only.
Fix it by masking the upper bits.
This fixes a problem seen with QEmu emulating a vexpress-a15.
Reported-by: Jonathan Gray <jsg@jsg.id.au>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Tested-by: Jonathan Gray <jsg@jsg.id.au>
Since DRA7xx/AM57xx SR1.1 and SR1.0 has errata to limit the frequency of
MMC1 to 96MHz and frequency of MMC2 to 48MHz for AM572x SR1.1, limit the
frequency and disable higher speed modes for those revision.
Also use the recommended IO delays (those tagged with "rev11")
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
The UHS modes are not supported in beagle-x15 because it's not possible to
switch the IO lines supply voltage to 1.8v.
Also HS200 cannot be supported on mmc2, because the IO lines of mmc2 are
connected to 3.3v.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Use the new compatible string "ti,dra7-hsmmc" that was specifically
added for dra7 and dra72. This is required since for dra7 and dra72
processors iodelay values has to be set unlike other processors.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Now that omap_hsmmc has support for hs200 mode, change the clock
frequency to 192MHz. Also change the REFERENCE CLOCK frequency to
192MHz based on which the internal mmc clock divider is calculated.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
I/O data lines of UHS SD card operates at 1.8V when in UHS speed
mode (same is true for eMMC in DDR and HS200 modes). Add support
to switch signal voltage to 1.8V in order to support
UHS cards and eMMC HS200 and DDR modes.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
mmc core has defined a new parameter *clk_disable* to gate the clock.
Disable the clock here if *clk_disable* is set.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
When the clock is applied, compute the actual value of the clock. It may be
slightly different from the requested value (max freq, divisor threshold)
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
The default configuration is usually working fine for the the HS modes.
Don't enforce the presence of a dedicated pinmux for the HS modes.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
AM572x SR1.1 requires different IODelay values to be used than that used
in AM572x SR2.0. These values are populated in device tree. Add
capability in omap_hsmmc driver to extract IOdelay values for different
silicon revision. The maximum frequency is also reduced when using a ES1.1.
To keep the ability to boot both revsions with the same dtb, those values
can be provided by the platform code.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
The data manual of J6/J6 Eco recommends to set different IODELAY values
depending on the mode in which the MMC/SD is enumerated in order to
ensure IO timings are met.
Add support to parse mux values and iodelay values from device tree
and set these depending on the enumerated MMC mode.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Add a new API to perform iodelay recalibration without isolate
io to be used in uboot.
The data manual of J6/J6 Eco recommends to set different IODELAY values
depending on the mode in which the MMC/SD is enumerated in order to
ensure IO timings are met. The MMC driver can use the new API to
set the IO delay values depending on the MMC mode.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Use the mmc_of_parse library function to populate mmc_config instead of
repeating the same code in host controller driver.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
>From OMAP3 SoCs (OMAP3, OMAP4, OMAP5, AM572x, AM571x), the DAT/CMD lines
reset procedure section in TRM suggests to first poll the SRD/SRC bit
until it is set to 0x1. But looks like that bit is never set to 1 and there
is an observable delay of 1sec everytime the driver tries to reset DAT/CMD.
(The same is observed in linux kernel).
Reduce the time the driver waits for the controller to set the SRC/SRD bits
to 1 so that there is no observable delay.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
According to errata i802, DCRC error interrupts
(MMCHS_STAT[21] DCRC=0x1) can occur during the tuning procedure.
The DCRC interrupt, occurs when the last tuning block fails
(the last ratio tested). The delay from CRC check until the
interrupt is asserted is bigger than the delay until assertion
of the tuning end flag. Assertion of tuning end flag is what
masks the interrupts. Because of this race, an erroneous DCRC
interrupt occurs.
The suggested workaround is to disable DCRC interrupts during
the tuning procedure which is implemented here.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
HS200/SDR104 requires tuning command to be sent to the card. Use
the mmc_send_tuning library function to send the tuning
command and configure the internal DLL.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
In order to enable DDR mode, Dual Data Rate mode bit has to be set in
MMCHS_CON register. Set it here.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Use the timing parameter set in the MMC core to set the
mode in UHSMS bit field. This is in preparation for
adding HS200 support in omap hsmmc driver.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
"ti,dual-volt" is used in linux kernel to set the voltage capabilities.
For host controller dt nodes that doesn't have "ti,dual-volt",
it's assumed 1.8v is the io voltage. This is not always true (like in
the case of beagle-x15 where the io lines are connected to 3.3v).
Hence if "no-1-8-v" property is set, io voltage will be set to 3v.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
No functional change. Move bus width configuration setting to a
separate function and invoke it only if there is a change in the
bus width.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Add a separate function for starting the clock, stopping the clock and
setting the clock. Starting the clock and stopping the clock can
be used irrespective of setting the clock (For example during iodelay
recalibration).
Also set the clock only if there is a change in frequency.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Fixes a bug found on thuban boards, which were for 2 years in
a long-term test with varying temperatures. They showed
problems in u-boot when attaching the ubi partition:
U-Boot# run flash_self_test
Booting from nand
set A...
UBI: attaching mtd1 to ubi0
UBI: scanning is finished
data abort
pc : [<87f97c3c>] lr : [<87f97c28>]
reloc pc : [<8012cc3c>] lr : [<8012cc28>]
sp : 85f686e8 ip : 00000020 fp : 000001f7
r10: 8605ce40 r9 : 85f68ef8 r8 : 0001f000
r7 : 00000001 r6 : 00000006 r5 : 0001f000 r4 : 85f6ecc0
r3 : 00000000 r2 : 44e35000 r1 : 87fcbcd4 r0 : 87fc755b
Flags: nZCv IRQs off FIQs on Mode SVC_32
Resetting CPU ...
Reason is, that accidentially the U-Boot implementation
from __schedule_ubi_work() did not check the flag
ubi->thread_enabled and started with wearleveling work,
but ubi did not have setup all structures at this point
and crashes.
Solve this problem by splitting work scheduling and processing.
Signed-off-by: Richard Weinberger <richard@nod.at>
Signed-off-by: Heiko Schocher <hs@denx.de>
Previous patch for this driver breaks i2c initialization.
commit 8bcf12ccce ("i2c: mvtwsi.c: Avoid NULL dereference")
If actual_speed is passed as NULL in this function:
static void __twsi_i2c_init(struct mvtwsi_registers *twsi, int speed,
int slaveadd, uint *actual_speed)
than __twsi_i2c_set_bus_speed never get called. This causes i2c clock
to run on default speed - 2MHz (measured with oscilloscope). This is issue
on some boards, sunxi for example, since on I2C0 bus PMU is connected.
The bootlogs with and without the patch are as follows:
Wihtout the patch:
U-Boot SPL 2018.03-rc2 (Feb 13 2018 - 09:23:17 +0200)
DRAM: 1024 MiB
Failed to set core voltage! Can't set CPU frequency
Trying to boot from FEL
U-Boot 2018.03-rc2 (Feb 13 2018 - 09:23:17 +0200) Allwinner Technology
CPU: Allwinner A20 (SUN7I)
Model: Olimex A20-OLinuXino-LIME2
I2C: ready
DRAM: 1 GiB
MMC: SUNXI SD/MMC: 0
With the patch:
U-Boot SPL 2018.03-rc2-00001-g838ff85 (Feb 13 2018 - 09:24:34 +0200)
DRAM: 1024 MiB
CPU: 912000000Hz, AXI/AHB/APB: 3/2/2
Trying to boot from FEL
U-Boot 2018.03-rc2-00001-g838ff85 (Feb 13 2018 - 09:24:34 +0200) Allwinner Technology
CPU: Allwinner A20 (SUN7I)
Model: Olimex A20-OLinuXino-LIME2
I2C: ready
DRAM: 1 GiB
MMC: SUNXI SD/MMC: 0
Signed-off-by: Stefan Mavrodiev <stefan@olimex.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
To debug device tree issues involving 32- and 64-bit platforms, it is useful to
have a generic 64-bit platform available.
Add a version of the sandbox that uses 64-bit integers for its physical
addresses as well as a modified device tree.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Added CONFIG_SYS_TEXT_BASE to configs/sandbox64_defconfig
Signed-off-by: Simon Glass <sjg@chromium.org>
At present dtc produces these warnings when compiling sandbox:
arch/sandbox/dts/test.dtb: Warning (gpios_property):
Could not get phandle node for /base-gpios:num-gpios(cell 0)
arch/sandbox/dts/test.dtb: Warning (gpios_property):
Missing property '#gpio-cells' in node /reset-ctl or bad phandle
(referred from /extra-gpios:num-gpios[0])
Both are due to it assuming that the 'num-gpios' property holds a phandle
pointing to a GPIO node.
To avoid these warnings, rename the sandbox property so that it does not
include the string 'gpios'.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present dtc produces these warnings when compiling sandbox:
arch/sandbox/dts/test.dtb: Warning (reg_format): "reg" property in /chosen/chosen-test has invalid length (8 bytes) (#address-cells == 2, #size-cells == 1)
arch/sandbox/dts/test.dtb: Warning (avoid_default_addr_size): Relying on default #address-cells value for /chosen/chosen-test
arch/sandbox/dts/test.dtb: Warning (avoid_default_addr_size): Relying on default #size-cells value for /chosen/chosen-test
Add the missing properties to avoid this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Fixes: f200680 (dm: core: parse chosen node)
Memory banks with address 0 and size 0 are empty and should not be
passed to the OS via device tree.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Only ARM and in some configs MIPS really implement arch_fixup_fdt().
Others just use the same boilerplate which is not good by itself,
but what's worse if we try to build with disabled CONFIG_CMD_BOOTM
and enabled CONFIG_OF_LIBFDT we'll hit an unknown symbol which was
apparently implemented in arch/xxx/lib/bootm.c.
Now with weak arch_fixup_fdt() right in image-fdt.c where it is
used we get both items highlighted above fixed.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: York Sun <york.sun@nxp.com>
Cc: Stefan Roese <sr@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
With fastboot support enabled, it is useful to be able to list
the eMMC EFI partitions, so select the CONFIG_EFI_PARTITION option.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Drop the whole map/unmap_physmem stuff and just use the address
already obtained from DT in ofdata_to_platdata(), instead of
repeating that, wrongly, in probe.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Joe Hershberger <joe.hershberger@ni.com>
The 'reset' command did not work on Porter because the reset code
was accessing the wrong PMIC address over broken I2C bus driver.
Replace the code with DM-aware code and fix up the PMIC address.
This makes the 'reset' command work again.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Get rid of the SH I2C driver on Porter and enable the IIC driver
instead . The old SH I2C is completely broken on Porter anyway
and the DM/DT capable IIC driver allows access to the PMIC too.
Use the DM/DT capable driver instead.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Enable cache and time commands, which are convenience tools for
doing benchmarks and various boot tests. Also enable FIT support
for booting fitImage.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Toggle the PHY reset GPIO to bring the ethernet PHY out of reset properly.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
---
NOTE: This should be moved to the SH ethernet driver, but it's quite
late in the cycle, so this is something to be done in 2018.05.
Fix ommission where the u-boot,dm-pre-reloc DT bit was pulled into the
common DT, not the U-Boot specific DT part. Move it to U-Boot DT part.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
With multiple environments, the 'get_char' callback for env
drivers does not really make sense any more because it is
only supported by two drivers (eeprom and nvram).
To restore single character loading for these drivers,
override 'env_get_char_spec'.
Signed-off-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Commit 7d714a24d7 ("env: Support multiple environments") added
static variable env_load_location. When saving environmental
variables, this variable is presumed to have the value set before.
In case the value was set before relocation and U-Boot runs from a
NOR flash, this variable wasn't writable. This causes failure when
saving the environment. To save this location, global data must be
used instead.
Signed-off-by: York Sun <york.sun@nxp.com>
CC: Maxime Ripard <maxime.ripard@free-electrons.com>
Due to size limitations of the MERAM, switch U-Boot to SPL.
The SPL is loaded by the SPI_LOADER into MERAM and then loads
U-Boot proper into DRAM. This way U-Boot can freely grow in
size in DRAM, as there is plenty of it.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
---
NOTE: To update U-Boot, first install u-boot.img to 0x140000 in SPI NOR,
then use the Minimon to flash u-boot-spl.srec using ls,2,e6304000.
To generate u-boot-spl.srec, use objcopy:
arm-linux-gnueabi-objcopy -O srec spl/u-boot-spl u-boot-spl.srec
Those two nodes are needed to configure pinmux before relocation
and to configure clock before relocation, since CPG/MSSR needs
access to RST node. This is not noticable on Gen3, but on Gen2
this causes problems in SPL if they are not available early.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Enable support for applying DT overlays on Gen3. This is convenient
for handling extra additional hardware, like ie. the Kingfisher.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Reset and initialize the PHY once in the probe() function rather than
doing it over and over again is start() function. This requires us to
keep the clock enabled while the driver is in use. This significantly
reduces the time between transfers as the PHY doesn't have to restart
autonegotiation between transfers, which takes forever.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Geert Uytterhoeven <geert+renesas@glider.be>
Cc: Joe Hershberger <joe.hershberger@ni.com>
The SD driver calls clk_set_rate() before clk_enable(), yet clk_set_rate()
implementation in the clock driver does not set the SD-IF divider. Fix it.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Commit 958d55f26c ("MAINTAINERS: Take over BCM2835 maintainership") put
me in as maintainer for the RPi soc, but forgot to update the board
MAINTAINERS file.
Add me there too.
Signed-off-by: Alexander Graf <agraf@suse.de>
Kconfig should only 'select' features that are required for an arch.
Standard features that can be disabled without breaking board support
should use 'imply' instead, to allow users to disable it.
These options are changed for mach-socfpga:
- DM_SPI & DM_SPI_FLASH: only required with QSPI support enabled
- SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION: the boot rom supports a
partitionless mode also, where SPL is located at address 0
- HW_WATCHDOG: while all mainline board defconfigs use it, U-Boot
should still work without it.
Signed-off-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
All Socfpga boards from ./include/configs/socfpga_* define
CONFIG_HW_WATCHDOG.
To ease CONFIG_HW_WATCHDOG conversion to Kconfig select it in
config ARCH_SOCFPGA (arch/arm/Kconfig) section.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Signed-off-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
This patch adds "spi-flash" to the compatible list of the qspi flash
chip for all socfpga boards. This is required to make qspi work on
these boards on top of the recent fixes. Without the "spi-flash"
compatible string for the flash chip, the speed cannot be read and a
speed of 0Hz is used (which results in a divide-by-zero on these
boards).
Signed-off-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
ARC Elf32 tools by default enable usage of so-called "small data"
section or in ARC PRM parlance "GP-relative addressing".
The idea is to put up to 2kB of frequently used data into a separate
location and use indirect addressing via dedicated core register (GP).
Where GP is used as a base for offset calculation.
And so if "-msdata" toggle is passed to the compiler either explicitly
or implicitly (that's Elf32 tools case) it will try to put some data
in that "small data" area and then to calculate real offset from GP
to be encoded in instructions we need to know the base value which
liker gets from __SDATA_BEGIN__ symbol in hte linker script.
In U-Boot we don't use that feature and linker script doesn't define
__SDATA_BEGIN__ which gives us the following linkage error if we use
Elf32 tools:
------------------------->8-------------------
LD u-boot
.../bin/arc-elf32-ld.bfd: Error: Linker symbol __SDATA_BEGIN__ not found
.../bin/arc-elf32-ld.bfd: final link failed: Bad value
------------------------->8-------------------
Note if uClibc or glibc tools are used that problem doesn't happen
because usage of "small data section" is disabled by default as not very
useful for bigger executables. Moreover GP is just another name of r26
so we're loosing 1 core register which is not used by the compiler as a
generic register with "-msdata".
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
board_usb_init()/_cleanup() should be in board files and don't have
a place in the xhci-omap driver. Weak versions for
board_usb_init()/_cleanup() already exist in common/usb.c
(for host mode) and drivers/usb/gadget/g_dnl.c (for gadget mode).
Therefore, remove init and cleanup functions from xhci-omap and
implement them in the board files.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
For some reason from day one we used to have both CONFIG_DWC2_UTMI_WIDTH
mentioned in dwc2.h and in scripts/config_whitelist.txt but never really used
and CONFIG_DWC2_UTMI_PHY_WIDTH used in real code in dwc2.c (but never
defined).
Moreover even though CONFIG_DWC2_UTMI_WIDTH might be either 8 or 16
depending on hardware (and the same is said in a comment for it in
dwc2.h) but then 8 is hardcoded in the header leaving no ability to
override this value in board's configuration.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Marek Vasut <marex@denx.de>
This converts the following to Kconfig:
CONFIG_SYS_BOOTCOUNT_SINGLEWORD
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Tested-by: Alex Kiernan <alex.kiernan@gmail.com>
Reviewed-by: Ian Ray <ian.ray@ge.com>
With commit 9bd76b8076 ("spl: make CONFIG_OF_EMBED pass dts through
fdtgrep"), CONFIG_SPL_MULTI_DTB_FIT has been broken because
cmd_fdtgrep was now unknown in scripts/Makefile.spl after moving
it to dts/Makefile. This bug has been introduced with v2018.01.
This patch moves cmd_fdtgrep from dts/Makefile to scripts/Makefile.lib
and includes scripts/Makefile.lib in scripts/Makefile.spl.
Fixes: 9bd76b8076 ("spl: make CONFIG_OF_EMBED pass dts through fdtgrep")
Reported-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
ATF recently began announcing PSCI v1.1. Since that version is unknown
to u-boot, the PSCI device nodes were not updated.
Switch from the case statement to a greater/less-than comparison so that
v1.1, as well as future versions, get at least the compatible nodes of
known versions.
PSCI v1.1 doesn't seem to have introduced a new corresponding compatible.
Signed-off-by: Andre Heider <a.heider@gmail.com>
The single argument `--noheader' is expecting isn't taken from getopt
parsing, but instead from the remaining argv arguments.
Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
>From DFU_ALT_INFO_EMMC (include/environment/ti/dfu.h) we can see that
rootfs will be flashed to second partition on eMMC. But at the moment we
have only one partition in $partitions environment variable. Let's add
"bootloader" partition prior to "rootfs", so that DFU works correctly.
This also fixes eMMC boot, which looks for rootfs on second partition.
"bootloader" partition start corresponds to "u-boot.img.raw" in DFU
eMMC info, which is 0x300 sector (384 KiB offset from eMMC start).
rootfs start address can be also found from DFU eMMC info.
bootloader-related area is finished at 0x1500 sector (2688 KiB offset
from eMMC start). This should be the start address for rootfs in
$partitions environment variable.
While at it, fix U-Boot environment address to be the same as for
AM57x EVM, so that it doesn't clash with other partitions.
So now eMMC layout looks like this:
===============================================================
0 +------------------------+
| MBR/GPT header | 128 -
128 +------------------------+
| MLO | 256 -
384 +------------------------+
| u-boot.img | 1792 bootloader
2176 +------------------------+
| //////// hole //////// | 256 -
2432 +------------------------+
| U-Boot environment | 128 -
2560 +------------------------+
| U-Boot environment | 128 -
| (redundant) |
2688 +------------------------+
| rootfs | remaining rootfs
end +------------------------+
===============================================================
"hole" area can be used further for storing U-Boot environment (like
it's done in AM57x EVM config file) or for increasing u-boot.img area
(in case u-boot.img size increased, e.g. if new dtbs were added).
This commit conforms with Linux partition table from f6d245b8c5
("arm: am57xx: Fix Linux boot from eMMC") commit, making things in
uniform way.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Migrate the option CONFIG_SPL_FRAMEWORK and make this gate most of the
current set of options we have in Kconfig. We will need to have some
options available for SPL and !SPL_FRAMEWORK so this is important. In a
few cases we re-order existing options so that we have less escapes from
the SPL_FRAMEWORK guard.
Signed-off-by: Tom Rini <trini@konsulko.com>
ISO and EFI partition configs in SPL are selected by default.
However, they are not being used.
Therefore, remove ISO and EFI partition support in SPL.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
When this config is enabled, <asm/arch/boot0.h> is included,
but the Kconfig help says this should be a define
(ARM_SOC_BOOT0_HOOK).
The code for this in arch/arm/lib/vectors.s was changed on
01/02/2017 with commit ce62e57fc5 ("ARM: boot0 hook: remove macro,
include whole header file").
Signed-off-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
Commit 6808ef9ac2 ("move booti_setup to arch/arm/lig/image.c")
not only moved the code, but also replaced a tab with 4 spaces
to break the Linux coding style.
Restore tab indentation.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Bin Chen <bin.chen@linaro.org>
With commit 6808ef9ac2 ("move booti_setup to arch/arm/lig/image.c"),
images->ep has not been set at this point.
Fixes: 6808ef9ac2 ("move booti_setup to arch/arm/lig/image.c")
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Bin Chen <bin.chen@linaro.org>
This allows running tests on emulated KC705 board with DC233C xtensa
core. It expects to find conf.xtfpga_qemu in the uboot-test-hooks.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Remove CONFIG_BOOT_RETRY_TIME as it doesn't do much good and enable
CONFIG_HUSH_PARSER in xtfpga_defconfig.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
xtensa toolchains are core-specific, so give full toolchain name and
download corresponding prebuilt toolchain from the github release.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Fix build warning in arch/microblaze/lib/bootm.c with gcc 7.3.0:
warning: this 'if' clause does not guard... [-Wmisleading-indentation]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Michal Simek <michal.simek@xilinx.com>
Fix build warning in arch/arm/mach-omap2/emif-common.c and
arch/arm/mach-omap2/omap4/emif.c with gcc 7.3.0:
warning: duplicate 'const' declaration specifier [-Wduplicate-decl-specifier]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Fix build warning in drivers/video/ivybridge_igd.c with gcc 7.3.0:
warning: 'ivb_pm_gt2' defined but not used [-Wunused-const-variable=]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
The fdt_record_loadable()-function was wedged between other functions
that were guarded by ARCH_FIXUP_FDT_MEMORY. This could lead to linker
errors on some configurations.
With this change, fdt_record_loadable() is moved out of the
ARCH_FIXUP_FDT_MEMORY guard (plus I tried to retain alphabetical
ordering for functions by placing it appropriately).
References: 9f45aeb ("spl: fit: implement fdt_record_loadable")
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reported-by: Michal Simek <michal.simek@xilinx.com>
Tested-by: Michal Simek <michal.simek@xilinx.com>
When saving the environment on a platform which has DMA alignment
larger than the natural alignment, env_fat_save triggers a debug
message in file_fat_write:
Saving Environment to FAT... writing uboot.env
FAT: Misaligned buffer address (9df1c8e0)
OK
Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
On the NIOS2 and Xtensa architectures, we do not have
CONFIG_SYS_TEXT_BASE set. This is a strict migration of the current
values into the defconfig and removing them from the headers.
I did not attempt to add more default values in and for now will leave
that to maintainers.
Signed-off-by: Tom Rini <trini@konsulko.com>
Patch queue for efi in 2018.03 - 2018-02-10
This time we have a few important bug fixes. Most noticable are:
- Fix OpenBSD loader with CONFIG_BLK=n
- Fix builds on various circumstances
- Add missing stubs so callers don't call NULL
- Bump UEFI revision to 2.7
efi_disk_register should return as status code (efi_status_t).
Disks with zero blocks should be reported as 'not ready' without throwing
an error.
This patch solves a problem running OpenBSD on system configured with
CONFIG_BLK=n (e.g. i.MX6).
Reported-by: Jonathan Gray <jsg@jsg.id.au>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Tested-by: Jonathan Gray <jsg@jsg.id.au>
Signed-off-by: Alexander Graf <agraf@suse.de>
Add stubs for UpdateCapsule, QueryCapsuleCapabilities, and
QueryVariableInfo.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
README.efi describes two different concepts:
* U-Boot exposing the UEFI API
* U-Boot running on top of UEFI.
This patch splits the document in two.
Religious references are removed.
The separation of the concepts makes sense before detailing the internals
of U-Boot exposing the UEFI API in a future patch.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Change the return type of efi_driver_init() to efi_status_t.
efi_driver_init() calls efi_add_driver() which returns an efi_status_t
value. efi_driver_init() should not subject this value to a conversion to
int losing high bits on 64bit systems.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Currently the UEFI revision number in the system table header is set to
2.0.5. This version number does not refer to any existing version of the
UEFI standard.
Set the revision number to 2.7.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
Currently we set the function pointer for the CreateEventEx boot service
to NULL. When called this would lead to an immediate failure.
A function stub is provided which handles the case that the boot service
is called without an event group and returns EFI_UNSUPPORTED otherwise.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
For EFI binaries we need special CFLAGS.
They were specified for an object file that since has been replaced.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
The bootefi command is missing in the online help for
bootefi bootmgr.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Before the patch an undefined constant EFI_SUBSYSTEM was used in the
crt0 code. The current version of binutils does not swallow the error.
https://bugs.debian.org/cgi-bin/bugreport.cgi?bug=888403
The necessary constant IMAGE_SUBSYSTEM_EFI_APPLICATION is already
defined in pe.h. So let's factor out asm-generic/pe.h for the
image subsystem constants and use it in our assembler code.
IMAGE_SUBSYSTEM_SAL_RUNTIME_DRIVER does not exist in the specification
let's use IMAGE_SUBSYSTEM_EFI_ROM instead.
The include pe.h is only used in code maintained by Alex so let him be the
maintainer here too.
Reported-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Tested-by: Vagrant Cascadian <vagrant@debian.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
config_phylib_all_drivers.h should be included when CONFIG_PHYLIB and
CONFIG_TSEC_ENET are defined.
Fixes: 3146f0c017 ("Move PHYLIB to Kconfig")
Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Extend the instantiate_rng() function and the corresponding CAAM job
descriptor to instantiate all RNG state handles. This moves the RNG
instantiation code in line with the CAAM kernel driver.
Previously, only the first state handle was instantiated. The second
one was instantiated by the CAAM kernel driver. This works if the
kernel runs in secure mode, but fails in non-secure mode since the
kernel driver uses DEC0 directly instead of over the job ring
interface. Instantiating all RNG state handles in u-boot removes the
need for using DEC0 in the kernel driver, making it possible to use
the CAAM in non-secure mode.
Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Tested-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Reviewed-by: York Sun <york.sun@nxp.com>
Enable validation of boot.scr script prior to its execution dependent
on "secureboot" flag in environment. Enable fall back option to
qspi boot in case of secure boot.
Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Signed-off-by: Vinitha Pillai <vinitha.pillai@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Remove dependency of SYS_HAS_SERDES for Layerscape Chasis 2 and
Layerscape Chasis 3.
Signed-off-by: Sriram Dash <sriram.dash@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Currently in LS1088A, XIP mode in QSPI works up to 16 MB
addresses. This patch enables QSPI support in XIP mode for
addresses above 16 MB as well.
Signed-off-by: Rajat Srivastava <rajat.srivastava@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
config_fallbacks.h has some logic that sets HAVE_BLOCK_DEVICE
based on a list of enabled options. Moving HAVE_BLOCK_DEVICE to
Kconfig allows us to drastically shrink the logic in
config_fallbacks.h
Signed-off-by: Adam Ford <aford173@gmail.com>
[trini: Rename HAVE_BLOCK_DEVICE to CONFIG_BLOCK_DEVICE]
Signed-off-by: Tom Rini <trini@konsulko.com>
Migrate the base and sub-options to Kconfig. Note that we only enable
this in the base sandbox config now.
Cc: Alexey Brodkin <alexey.brodkin@gmail.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
---
Is this driver still used anywhere? It's fishy that it's only enabled
in sandbox anymore.
config_fallback.h has some logic that checks a variety of options
and selects LIB_UUID if it hasn't already been selected. This
will all LIB_UUID in Kconfig and select this option for the list
of options to allow us to remove the logic from fallbacks
Signed-off-by: Adam Ford <aford173@gmail.com>
config_fallbacks.h had some logic to automatically select
LIB_RAND if RANDOM_UUID or CMD_UUID were set if LIB_HW_RAND wasn't
already selected. By migrating LIB_HW_RAND to Kconfig, we can
remove this check from config_fallbacks.h and put it into Kconfig
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
[trini: Turn into a choice, add NET_RANDOM_ETHADDR]
Signed-off-by: Tom Rini <trini@konsulko.com>
This converts the following to Kconfig:
CONFIG_APBH_DMA
CONFIG_APBH_DMA_BURST
CONFIG_APBH_DMA_BURST8
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Stefan Agner <stefan.agner@toradex.com>
[trini: Add in MMC as well]
Signed-off-by: Tom Rini <trini@konsulko.com>
There is no reason to unconditially select network commands as distro
defaults without networking enable.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Distro default configuration contains also dhcp and pxe setting which
can't working without enabling CONFIG_NET.
EFI is not required that's why it is not enabled.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Enable CONFIG_ENV_VARS_UBOOT_CONFIG for all STM32 boards
It allows to retrieve the SoC name into the "soc" environment
variable.
Signed-off-by: Christophe Priouzeau <christophe.priouzeau@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Vikas Manocha <vikas.manocha@st.com>
Simplify SPL_LDSCRIPT config by using the new arch Kconfig
configurations ARCH_MX23 and ARCH_MX28.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
The motivation for moving MX28 selection to Kconfig is to be able
to better handle NAND MXS selection through Kconfig.
This selection method also aligns with the way other i.MX SoCs are
selected in U-Boot.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
The motivation for moving MX23 selection to Kconfig is to be able
to better handle NAND MXS selection through Kconfig.
This selection method also aligns with the way other i.MX SoCs are
selected in U-Boot.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Since CONFIG_MXC_UART is already in Kconfig, move this from
the header to imx6q_logic_defconfig
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
This commit cleans up the README.watchdog by removing the reminescent of
ADI's Blackfin architecture removed some time ago.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
This commit removes an attempt to workaround a previous compilation
warning that is is now fixed in "include/configs/ti_omap3_common.h".
Signed-off-by: Derald D. Woods <woods.technical@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
This commit fixes the following compiler warnings when DM_SERIAL is
enabled.
---8<-------------------------------------------------------------------
...
CC spl/board/ti/evm/evm.o
In file included from /solution/scm/u-boot-master/board/ti/evm/evm.c:16:0:
/solution/scm/u-boot-master/include/ns16550.h:31:0: warning: "CONFIG_SYS_NS16550_REG_SIZE" redefined
#define CONFIG_SYS_NS16550_REG_SIZE (-1)
In file included from /solution/scm/u-boot-master/include/configs/omap3_evm.h:22:0,
from include/config.h:5,
from /solution/scm/u-boot-master/include/common.h:21,
from /solution/scm/u-boot-master/board/ti/evm/evm.c:14:
/solution/scm/u-boot-master/include/configs/ti_omap3_common.h:33:0: note: this is the location of the previous definition
# define CONFIG_SYS_NS16550_REG_SIZE (-4)
LD spl/board/ti/evm/built-in.o
...
CC spl/drivers/serial/ns16550.o
In file included from /solution/scm/u-boot-master/drivers/serial/ns16550.c:11:0:
/solution/scm/u-boot-master/include/ns16550.h:31:0: warning: "CONFIG_SYS_NS16550_REG_SIZE" redefined
#define CONFIG_SYS_NS16550_REG_SIZE (-1)
In file included from /solution/scm/u-boot-master/include/configs/omap3_evm.h:22:0,
from include/config.h:5,
from /solution/scm/u-boot-master/include/common.h:21,
from /solution/scm/u-boot-master/drivers/serial/ns16550.c:7:
/solution/scm/u-boot-master/include/configs/ti_omap3_common.h:33:0: note: this is the location of the previous definition
# define CONFIG_SYS_NS16550_REG_SIZE (-4)
LD spl/drivers/serial/built-in.o
...
---8<-------------------------------------------------------------------
Signed-off-by: Derald D. Woods <woods.technical@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
The goal of this patch is to clean up the code related to choosing SPL
MMC boot mode.
The spl_boot_mode() now is called only in spl_mmc_load_image() function,
which is only compiled in if CONFIG_SPL_MMC_SUPPORT is enabled.
To achieve the goal, all per mach/arch implementations eligible for
unification has been replaced with one __weak implementation.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Acked-by: Michal Simek <michal.simek@xilinx.com> (For ZynqMP)
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Commit ff98cb9051 ("part: extract MBR signature from partitions")
blindly switched allocated by ALLOC_CACHE_ALIGN_BUFFER buffer type from
"unsigned char" to "legacy_mbr" which caused allocation of size =
(typeof(legacy_mbr) * dev_desc->blksize) instead of just space enough
for "legacy_mbr" structure.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Rob Clark <robdclark@gmail.com>
Cc: Peter Jones <pjones@redhat.com>
Cc: Alexander Graf <agraf@suse.de>
Cc: Tom Rini <trini@konsulko.com>
Follow bootz's pattern by moving the booti_setup to arch/arm/lib.
This allows to use booti_setup in other paths, e.g booting
an Android image containing Image format.
Note that kernel relocation is move out of booti_setup and it is the
caller's responsibility to do it and allows them do it differently. say,
cmd/booti.c just do a manually, while in the bootm path, we can use
bootm_load_os(with some changes).
Signed-off-by: Bin Chen <bin.chen@linaro.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
The second area of android image was intended to put a 2nd stage
bootloader but in practice were rarely used (in my knowledge).
An proposal was made to the AOSP to (re)use the second area as the dtb[1],
This patch itself doesn't depend on that proposal being accepted but it won't
be that helpful as well if that proposal won't be accepted. But don't do
any harm as well.
[1] https://android-review.googlesource.com/#/c/417447/
Signed-off-by: Bin Chen <bin.chen@linaro.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
On detach UBI attempts to update fastmap after closing user interfaces
but at this point UBI volumes have already been free()'ed and fastmap
can no longer access these data structures.
Signed-off-by: Martin Townsend <mtownsend1973@gmail.com>
Cc: hs@denx.de
Cc: kmpark@infradead.org
Cc: richard@sigma-star.at
For '#ifndef CONFIG_DM_I2C' twsi_i2c_init() passes NULL as
4th parameter to __twsi_i2c_init().
Identified with cppcheck.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Make the ihs_i2c driver DM-compatible; for legacy boards, the old functions are
retained within #ifdefs.
No board uses the new DM driver yet; this patch only lays the foundation for
future support.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Prepare the function interface of the ihs_i2c driver for DM conversion
in a future patch.
While we're at it, fix some style violations, and make the code more readable.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Some functions in the fsl_i2c driver are declared as inline, even though
they are quite large, which needlessly increases the size of the
resulting binary.
This patch removes the inline declarations.
Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Fix some style violations in the fsl_i2c I2C driver, and use shorter
type names for variables in some cases.
Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
'default' on a choice refers to the symbol selected by default, not to
the choice mode, so 'default n' is meaningless.
No functional changes. Optional choices implicitly default to n mode
(and there is no way to make them default to another mode).
Discovered in Kconfiglib (https://github.com/ulfalizer/Kconfiglib),
which prints the following warning:
warning: the default selection n (undefined) of <choice> (defined at drivers/usb/ulpi/Kconfig:3) is not contained in the choice
I've added a corresponding warning to the C tools too, which is
currently in linux-next: https://patchwork.kernel.org/patch/9983667/
Signed-off-by: Ulf Magnusson <ulfalizer@gmail.com>
There is no EMMC symbol in the "enable different boot versions for the
shc board" choice. SHC_EMMC was probably intended.
No functional changes. Kconfig choices fall back on using the first
(visible) symbol in the choice as the default if the default symbol is
not visible.
Discovered in Kconfiglib (https://github.com/ulfalizer/Kconfiglib),
which prints the following warning:
warning: the default selection EMMC (undefined) of <choice> (defined at board/bosch/shc/Kconfig:15) is not contained in the choice
I've added a corresponding warning to the C tools too, which is
currently in linux-next: https://patchwork.kernel.org/patch/9983667/
Signed-off-by: Ulf Magnusson <ulfalizer@gmail.com>
FreeBSD, like OpenBSD, uses BIG_ENDIAN, LITTLE_ENDIAN, and BYTE_ORDER,
whereas Linux and compatibles use __-prefixed names. Define the names
the same as the OpenBSD block below it.
cmd/Makefile has:
ifdef CONFIG_FPGA
obj-$(CONFIG_CMD_FPGA) += fpga.o
endif
which means that if CONFIG_FPGA is not set, CONFIG_CMD_FPGA silently
does nothing. Let's remove that Makefile conditional and instead express
this equivalent dependency in Kconfig, so a lot of redundant
# CONFIG_CMD_FPGA is not set
can be removed from board defconfigs that don't actually have an FPGA.
Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
These are declared in Kconfig, but some #defines have crept in.
CONFIG_FPGA
CONFIG_FPGA_ALTERA
CONFIG_FPGA_CYCLON2
CONFIG_FPGA_SOCFPGA
CONFIG_FPGA_XILINX
CONFIG_FPGA_ZYNQMPPL
Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
In most places in the code we cast this to an unsigned long, but in one
place we cast to an unsigned int. For consistency and to fix a warning
on 64bit targets, always cast this to unsigned long. For the long term
we should however change the declaration of dma_buf.
Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Lukasz Majewski <lukma@denx.de>
Acked-by: Marek Vasut <marex@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
The build script should not manipulate shell flags (especially '-e').
A non-zero exit value can also be catched with 'cmd || ret=$?'.
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Add a new option '-E' for treating all compiler warnings as errors.
Eventually this will pass 'KCFLAGS=-Werror' to Kbuild.
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Probably not all users are aware of this possibility, thus add a
pointer to the README. Also add a useful example.
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
This patch adds a sec_init call into arch_misc_init(). Doing so in
conjunction with the patch "drivers/crypto/fsl: assign job-rings to
non-TrustZone" enables use of the CAAM in Linux when OPTEE/TrustZone is
active.
u-boot will initialise the RNG and assign ownership of the job-ring
registers to a non-TrustZone context. With recent changes by Lukas Auer to
fully initialize the RNG in sec_init() this means that u-boot will hand-off
the CAAM in a state that Linux then can use the CAAM without touching the
reserved DECO registers.
This change is safe both for the OPTEE/TrustZone boot path and the regular
non-OPTEE/TrustZone boot path.
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Marco Franchi <marco.franchi@nxp.com>
Cc: Vanessa Maegima <vanessa.maegima@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Tested-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
After enabling TrustZone various parts of the CAAM silicon become
inaccessible to non TrustZone contexts. The job-ring registers are designed
to allow non TrustZone contexts like Linux to still submit jobs to CAAM
even after TrustZone has been enabled.
The default job-ring permissions after the BootROM look like this for
job-ring zero.
ms=0x00008001 ls=0x00008001
The MS field is JRaMIDR_MS (job ring MID most significant).
Referring to "Security Reference Manual for i.MX 7Dual and 7Solo
Applications Processors, Rev. 0, 03/2017" section 8.10.4 we see that
JROWN_NS controls whether or not a job-ring is accessible from non
TrustZone.
Bit 15 (TrustZone) is the logical inverse of bit 3 hence the above value of
0x8001 shows that JROWN_NS=0 and TrustZone=1.
Clearly then as soon as TrustZone becomes active the job-ring registers are
no longer accessible from Linux, which is not what we want.
This patch explicitly sets all job-ring registers to JROWN_NS=1 (non
TrustZone) by default and to the Non-Secure MID 001. Both settings are
required to successfully assign a job-ring to non-secure mode. If a piece
of TrustZone firmware requires ownership of job-ring registers it can unset
the JROWN_NS bit itself.
This patch in conjunction with a modification of the Linux kernel to skip
HWRNG initialisation makes CAAM usable to Linux with TrustZone enabled.
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Alex Porosanu <alexandru.porosanu@nxp.com>
Cc: Ruchika Gupta <ruchika.gupta@nxp.com>
Cc: Aneesh Bansal <aneesh.bansal@nxp.com>
Link: https://github.com/OP-TEE/optee_os/issues/1408
Link: https://tinyurl.com/yam5gv9a
Tested-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
We should take the MX6DP and MX6QP options in consideration
when defining imx_iomux_v3_setup_pad().
Based on a patch by Pierluigi Passaro <pierluigi.p@variscite.com>
Signed-off-by: Eran Matityahu <eran.m@variscite.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
The original text is from the time that the config options were not
converted to Kconfig.
After the conversion to Kconfig only CONFIG_SECURE_BOOT and
CONFIG_CMD_DEKBLOB need to be selected by the user.
The other config options are automatically selected by the Kconfig
logic.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Breno Lima <breno.lima@nxp.com>
The input keycode KEY_POWER is used in the imx6ull.dtsi file,
hence include the input header where used.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
fastboot tool is a convenient way to flash the eMMC, so
add support for it.
Examples of usages:
On the mx6sabresd:
=> fastboot 0
On the Linux PC connected via USB:
$ sudo fastboot getvar bootloader-version -i 0x0525
bootloader-version: U-Boot 2018.01-00550-g7517cfe
finished. total time: 0.000s
$ sudo fastboot reboot -i 0x0525
(this causes the mx6sabresd to reboot)
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Tested-by: Shawn Guo <shawn.guo@linaro.org>
Selecting CONFIG_USB_FUNCTION_MASS_STORAGE=y in the defconfig leads to
the following error:
cmd/built-in.o: In function `do_usb_mass_storage':
cmd/usb_mass_storage.c:217: undefined reference to `fsg_main_thread'
cmd/usb_mass_storage.c:170: undefined reference to `fsg_init'
CONFIG_USB_FUNCTION_MASS_STORAGE option is built only for
the non-SPL case as per the logic in drivers/usb/gadget/Makefile,
so remove the incorrect CONFIG_SPL ifdefery to fix the build
failure.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Tested-by: Shawn Guo <shawn.guo@linaro.org>
SION bit should be used in the situation that we need
to read back the value of a pin and should not be set by
default macro.
We get some malfunction as raised by following thread
https://www.spinics.net/lists/linux-usb/msg162574.html
As reported by this application note:
https://www.nxp.com/docs/en/application-note/AN5078.pdf
The software input on (SION) bit is an option to force an input
path to be active regardless of the value driven by the
corresponding module. It is used when the nature direction
of a pin depending on selected alternative function is an output,
but it is needed to read the real logic value on a pin.
The SION bit can be used in:
• Loopback: the module of a selected alternative function drives
the pad and also receives the pad value as an input
• GPIO capture: the module of a selected alternative function
drives the pin and the value is captured by the GPIO
SION bit is not necessary when the pin is configured as a peripheral
apart specific silicon bug. If an application needs to have this
set, this should be done in board file or in dts file
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed-by: Benoît Thébaudeau <benoit.thebaudeau.dev@gmail.com>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Introduce SDR104 and HS200 support
The implementation takes linux kernel sdhci.c and sdhci-esdhc-imx.c
as reference.
- Implement esdhc_change_pinstate to dynamically change pad settings
- Implement esdhc_set_timing
- Implement esdhc_set_voltage to switch voltage
- Implement fsl_esdhc_execute_tuning to execute time process
- Enlarge the cfg->f_max to 200MHz.
- Parse fsl,tuning-step, fsl,tuning-start-tap and
fsl,strobe-dll-delay-target from device tree.
- Parse no-1-8-v property
- Introduce esdhc_soc_data to indicate the flags and caps
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
The board header file included a reference to the starting point
from nitrogen6x.h, but since so much changed, the file bears
little resemblance to that file.
Signed-off-by: Eric Nelson <eric@nelint.com>
The initial implementation of mx6memcal reset the CPU after
running the memory calibration procedure because the generic
board has no information about which boot devices are available.
Now that we have SDP support in SPL, use it to allow a full
U-Boot to be uploaded (i.e. to use "mtest").
Signed-off-by: Eric Nelson <eric@nelint.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
This patch just changes the order of configuration items in
mx6memcal_defconfig to match the Kconfig layout, making it easier
to track changes made using menuconfig.
Signed-off-by: Eric Nelson <eric@nelint.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Static variables are not available during board_init_f().
'static uint32_t mx53_dram_size[2];' was used in board specific
dram_init(), dram_init_banksize() and get_effective_memsize() to avoid
multiple calls to get_ram_size().
Reused dram initialization functions from arch/arm/mach-imx/mx5/mx53_dram.c
Signed-off-by: Patrick Bruenn <p.bruenn@beckhoff.com>
Static variables are not available during board_init_f().
'static uint32_t mx53_dram_size[2];' was used in board specific
dram_init(), dram_init_banksize() and get_effective_memsize() to avoid
multiple calls to get_ram_size().
Reused dram initialization functions from arch/arm/mach-imx/mx5/mx53_dram.c
Signed-off-by: Patrick Bruenn <p.bruenn@beckhoff.com>
Move dram_init(), dram_init_banksize() and get_effective_memsize() to
arch/arm/mach-imx/mx5/mx53_dram.c, where it can be reused by m53evk and
mx53loco.
Signed-off-by: Patrick Bruenn <p.bruenn@beckhoff.com>
The exact definition of a successful boot is defined by user-space.
Determine the boot partition automatically. A partition is selected if
file `/boot/bootcause/firstboot' exists (meaning that the partition has
freshly installed software) OR if file `/boot/fitImage' exists.
When userspace determines that new software was successfully installed,
it must (1) delete `/boot/fitImage' on the _inactive_ partition and (2)
remove `/boot/bootcause/firstboot'.
Enable video, but do not display logos or other version information.
Silence kernel console logging by default.
Print a message to VGA screen in case of boot failure and reset bootcount
to allow the user to attempt boot again.
Signed-off-by: Ian Ray <ian.ray@ge.com>
Signed-off-by: Martyn Welch <martyn.welch@collabora.co.uk>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
Modify configuration to support FIT. Set variable `confidx' from VPD,
in order to load the correct device tree. Modify/simplify U-Boot
environment to support loading FIT image.
Signed-off-by: Ian Ray <ian.ray@ge.com>
Signed-off-by: Martyn Welch <martyn.welch@collabora.co.uk>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
Enable the hardware watchdog on bx50v3 to cause it to reset in the event
the board hangs.
Configure GPIO_9 pin as WDOG1_B so that a watchdog timeout results in a
full system reset.
The watchdog is used and reconfigured by systemd approximately 1.7 seconds
into boot. Adding a few seconds for U-Boot and a few more seconds as a
safety margin.
Note that the PCIe controller is _not_ put back into a safe state prior
to board reset. This is a problem if board reset is implemented as CPU
reset.
Signed-off-by: Ian Ray <ian.ray@ge.com>
Signed-off-by: Martyn Welch <martyn.welch@collabora.co.uk>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
There are two I210s on the b850v3 and one on the b450v3 and b650v3.
One is connected to Marvell 88e6240 which is already programmed.
Follow the flow documented in doc/README.enetaddr: set the
enet[0-9]*addr environment variable and let the driver program the
hardware.
The mapping from the driver's index to the environment variable's name
is documented in README: Note for Redundant Ethernet Interfaces. It is
assumed that eth_devices for the controllers on the board are always
indexed in the same order.
The environment variables are removed after programming the hardware
because the variables seem to influence MAC addresses also after U-Boot.
Specifically the MAC address of FEC (MC interface) would be incorrectly
set: 'ethaddr', which maps to the first I210 chip and is set to I210's
default address read from the driver by eth_write_hwaddr in eth_legacy.c
because the variable is undefined (not set even by bx50v3.c), would
result in the eth0 interface's MAC address to be set to I210's default
address.
Signed-off-by: Hannu Lounento <hannu.lounento@ge.com>
Signed-off-by: Ian Ray <ian.ray@ge.com>
Signed-off-by: Martyn Welch <martyn.welch@collabora.co.uk>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
Instead of programming the hardware directly in the board
implementation, follow the flow documented in doc/README.enetaddr: set
the enet[0-9]*addr environment variable and let the driver program the
hardware.
This avoids duplicating the implementation as it already exists in the
driver (drivers/net/fec_mxc.c: fec_set_hwaddr).
The mapping from the driver's index to the environment variable's name
is documented in README: Note for Redundant Ethernet Interfaces. It is
assumed that eth_devices for the controllers on the board are always
indexed in the same order, i.e. FEC always has the index 2.
The FEC driver does *not* set the flag Set MAC Address on Transmit (bit
set_eth0_mac_address used to do but this is unnecessary as the Linux
networking stack fills in the MAC address.
Signed-off-by: Hannu Lounento <hannu.lounento@ge.com>
Signed-off-by: Ian Ray <ian.ray@ge.com>
Signed-off-by: Martyn Welch <martyn.welch@collabora.co.uk>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
The change in i2c configuration added to support access to the VPD has
inadvertantly caused access to i2c buses 1 & 2 to be lost. This has
resulted in the configuration for the PMIC to be attempted on the wrong
bus and thus isn't taking effect.
Add the required configuration to return access to buses 1 & 2. In order
to ensure that any users of the bus numbering prior to addition in VPD
patches work, add buses before configuration related to mux on bus 0 and
tweak VPD bus usage to fit new numbering scheme.
Signed-off-by: Martyn Welch <martyn.welch@collabora.co.uk>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
Implement programming MAC address to the hardware, i.e. external flash
seen as EEPROM.
MAC address is only written if it differs from what is already stored in
flash or if reading the current MAC address fails.
Signed-off-by: Hannu Lounento <hannu.lounento@ge.com>
CC: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Martyn Welch <martyn.welch@collabora.co.uk>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
Split the implementation of e1000_read_mac_addr into eeprom and register
versions called by e1000_read_mac_addr.
This allows for calling e1000_read_mac_addr when MAC address is needed
with no constraints where it is read from, and for calling the register
and, especially, the eeprom version directly in order to specify where
to read the address from.
Signed-off-by: Hannu Lounento <hannu.lounento@ge.com>
CC: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Martyn Welch <martyn.welch@collabora.co.uk>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
When building for 64bits system, we get some warnings about type
cast between pointer and integer. This patch eliminates the warnings
by using ulong/long type which is 32bits on 32bits system or 64bits on
64bits system.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
The MIB RAM and FIFO receive start register does not exist on
i.MX8M. Accessing these register will cause system hang.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Include i.MX8M in lcdif register layout map.
Also included i.MX7ULP in this patch, since share same with i.MX8M.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
i.MX8M OCOTP follow same flow as i.MX6Q, but it has 64 banks
and each bank 4 words.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Add i.MX8M support. Because i.MX8M use SiP call trap
to Arm Trusted Firmware to handle M4, so use #ifdef
to avoid build error on i.MX6/7.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Move i.MX6/7 bootaux code to imx_bootaux.c.
The i.MX6/7 has different src layout, so define M4 reg offset
to ease the cleanup. Redefine the M4 related BIT for share
common code.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Move imx_get_mac_from_fuse to a new mac.c for i.MX6/7.
Since fuse regs structure are different for i.MX6/7, use mac
address offset in code and define a new local struture
imx_mac_fuse.
Also sort the config order.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Add clock driver to support i.MX8M.
There are two kind PLLs, FRAC pll and SSCG pll. ROM already
configured SYS PLL1/2, we only need to configure the output.
ocotp/i2c/pll decoding and configuration/usdhc/lcdif/dram pll/
enet clock are configured in the code.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Enable nand on mmc defconfig, so-that preparing nand
for writing/updating bootimage, Linux becomes easy.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
nand device needed for mmc config to access nand
for write and update so enabling SPL_SUPPORT to mmc
or nand is wrt to env device rather nand driver check.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Add i.MX7 PSCI system power off support, linux
kernel can use "poweroff" command to power off
system via SNVS, PMIC power will be disabled.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Add i.MX7 PSCI system reset support, linux
kernel can use "reboot" command to reset
system even wdog driver is disabled in kernel.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Use PSCI 1.0 instead of 0.1 to support more power
management feature like system reset, power off etc..
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
i.CoreM6 1.5 is an another i.CoreM6 QDL cpu modules which can be connected
to EDIMM starter kit design with eMMC and MIPI-CSI interfaces suitable for
Android and video capture application.
notable features:
CPU NXP i.MX6 S/DL/D/Q, Up to 4 x Cortex-A9@800MHz
Memory Up to 2 GB DDR3-1066
Video Interfaces Up to 1 Parallel Up to 2 LVDS HDMI 1.4
port 8 bit CSI INPUT MIPI-CSI INPUT
1 x 10/100 Ethernet interface, 2 x USB, 1 x PCIe, 1 x I2S etc
This patch adds support for Quad/Dual and DualLite/Solo SOM's on
MIPI starter kit with boot from SD and eMMC.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
The EFI implementation does not fit into any of the existing categories.
Provide LOGC_EFI so that EFI related message can be filtered.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
When functions return an error it propagates up the stack to the point
where it is reported. Often the error code provides enough information
about the root cause of the error that this is obvious what went wrong.
However in some cases the error may be hard to trace. For example if a
driver uses several devices to perform an operation, it may not be
obvious which one failed.
Add a log_ret() macro to help with this. This can be used to wrap any
error-return value. The logging system will then output a log record when
the original error is generated, making it easy to trace the call stack
of the error.
This macro can significantly impact code size, so its use is controlled
by a Kconfig option, which is enabled for sandbox.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a test of the 'log format' and 'log rec' commands. This also covers
things like log_get_cat_by_name(), since they are used by these commands.
Fix a style nit in the tests also.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a 'log rec' command which allows a log record to be manually output.
This is useful for scripts which want full control over what is logged. It
also permits easy testing of the log system.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a 'log format' command which can display or change the log output
format. This is useful for changing how much information is displayed. The
ordering of the fields is fixed.
Signed-off-by: Simon Glass <sjg@chromium.org>
It is useful to be able to control the output format of log records on the
console. As a starting point, add definitions for controlling which
elements of the log record are displayed. Use function and message as the
default, since these are the most useful fields.
Signed-off-by: Simon Glass <sjg@chromium.org>
Category and level both use an enum for their ID values. Add functions to
convert these IDs to strings and vice versa. This will allow the log to
output the strings instead of the (inscrutable) values.
At the same time, add a new 'driver-model' category, to cover core
driver-model functions and fix an incorrect value for LOGL_MAX.
Tests will be added with the new 'log' subcommands.
Signed-off-by: Simon Glass <sjg@chromium.org>
(Updated to correct clang warnings)
Each uclass has a driver name which we can use to look up the uclass. This
is useful for logging, where the uclass ID is used as the category.
Add a function to handle this, as well as a test.
Signed-off-by: Simon Glass <sjg@chromium.org>
After moving some USB gadget configs (USB_FUNCTIONS_*) to Kconfig it
turned out that following *_defconfig entries for RockChip are not
needed.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
The CONFIG_USB_FUNCTION_MASS_STORAGE must be selected when one enables
support for ums command.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
For the redundant environment configuration, env_sf_load still
contained duplicate code instead of using env_import_redund().
Simplify the code by only executing the load twice and delegating
everything else to env_import_redund.
Signed-off-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
For multiple env drivers to correctly implement fallback when
one environment fails to load (e.g. crc error), the return value
of env_import has to be propagated by all env driver's load
function.
Without this change, the first driver that succeeds to load an
environment with an invalid CRC return 0 (success) and no other
drivers are checked.
Signed-off-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
There is more common code in mmc, nand and ubi env drivers that
can be shared by moving to env_import_redund.
For this, a status/error value whether the buffers were loaded
are passed as additional parameters to env_import_redund.
Ideally, these are already returned to the env driver by the
storage driver. This is the case for mmc, nand and ubi, so for
this change, code deduplicated.
Signed-off-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
env_import (and env_import_redund) currently return 1 on success
and 0 on error. However, they are only used from functions
returning 0 on success or a negative value on error.
Let's clean this up by making env_import and env_import_redund
return 0 on success and -EIO on error (as was the case for all
users before).
Users that cared for the return value are also updated. Funny
enough, this only affects onenand.c and sf.c
Signed-off-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
env_get_f calls env_get_char to load single characters from the
environment. However, the return value of env_get_char was not
checked for errors. Now if the env driver does not support the
.get_char call, env_get_f did not notice this and looped over the
whole size of the environment, calling env_get_char over 8000
times with the default settings, just to return an error in the
end.
Fix this by checking if env_get_char returns < 0.
Signed-off-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The omapl138_lcdk platform is not a DA850 SoC so we need to select
SOC_DA8XX and not SOC_DA850, as it was before. It does however point
out a bit of a misnomer in how all of these PLL defines are named as
they are generic to DA8xx, not DA850 centric. Remove the 'if SOC_DA850'
under the defaults as these are simply the defaults. As SOC_DA8XX will
select SYS_DA850_DDR_INIT when needed, we do not need it under both SOC
options.
Fixes: 76e22222d3 ("Convert CONFIG_SYS_DV_CLKMODE et al to Kconfig")
Signed-off-by: Tom Rini <trini@konsulko.com>
Xilinx changes for v2018.03
- Several Kconfig fixes (also moving configs to defconfigs)
- Some DTS updates
- ZynqMP psu rework based on Zynq concept
- Add low level initialization for zc770 and zcu102
- Add support for Zynq zc770 x16 nand configuration
- Add mini nand/emmc ZynqMP targets
- Some arasan nand changes
This converts the following to Kconfig:
CONFIG_SYS_OMAP24_I2C_SLAVE
CONFIG_SYS_OMAP24_I2C_SPEED
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Paul Kocialkowski <contact@paulk.fr>
This converts the following to Kconfig:
CONFIG_SYS_DV_CLKMODE
CONFIG_SYS_DA850_PLL0_POSTDIV
CONFIG_SYS_DA850_PLL0_PLLDIV1
CONFIG_SYS_DA850_PLL0_PLLDIV2
CONFIG_SYS_DA850_PLL0_PLLDIV3
CONFIG_SYS_DA850_PLL0_PLLDIV4
CONFIG_SYS_DA850_PLL0_PLLDIV5
CONFIG_SYS_DA850_PLL0_PLLDIV6
CONFIG_SYS_DA850_PLL0_PLLDIV7
CONFIG_SYS_DA850_PLL1_POSTDIV
CONFIG_SYS_DA850_PLL1_PLLDIV1
CONFIG_SYS_DA850_PLL1_PLLDIV2
CONFIG_SYS_DA850_PLL1_PLLDIV3
Signed-off-by: Adam Ford <aford173@gmail.com>
Tested with MTA72ASS8G72PSZ-2S6G1. This is 3DS RDIMM module with x4
DDR chips. LS2088ARDB needs to be modified to connect all DQS signals.
Some of them are grounded by default for x8 chips. Tested with RDIMM
MTA18ASF2G72PDZ on main memory controllers. DP-DDR doesn't support
RDIMM. Dropped related timing table.
Signed-off-by: York Sun <york.sun@nxp.com>
DDR controllers always use binding register to determine the memory
space to perform data initialization. In case of controller interleaving,
the space is doubled, resulting twice long wait. It wasn't too bad until
the memory capacity increases. To reduce the wait time, reduce the
binding space to half and restore it after data initialization.
Three-way interleaving is no longer used and is removed.
Signed-off-by: York Sun <york.sun@nxp.com>
DDR4 RDIMM has some information in SPD to be used to calculate the
control words for register chip. The rest can be found from JEDEC
spec DDR4RCD02.
Signed-off-by: York Sun <york.sun@nxp.com>
On top of RDIMM support, add new register calculation to support
3DS RDIMMs. Only symmetrical 3DS is supported at this time.
Signed-off-by: York Sun <york.sun@nxp.com>
For DDR4, command/address delay in mode registers and parity latency
in timing config register are only needed for UDIMMs, but not RDIMMs.
Add additional register rcw_3 for DDR4 RDIMM. Fix mirrored bit for
dual rank RDIMMs. Set sdram_cfg_3[DIS_MRS_PAR] for RDIMMs. Fix
calculation of timing config registers. Use hexadecimal format for
printing RCW (register control word) registers.
Signed-off-by: York Sun <york.sun@nxp.com>
For for case of lazyapply method, API fdt_fixup_board_enet() gets
invoked before DPL being deployed. This leads to an issue that
fsl-mc fdt fixup status marked as fail and dprc driver didn't get
registered in linux boot.
Fixes this issue by calling fdt_fixup_board_enet() for case when
DPL is deployed successfully in lazyapply method.
Signed-off-by: Yogesh Gaur <yogeshnarayan.gaur@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
'select n' selects a constant symbol, which is meaningless and has no
effect. Maybe this was meant to be a 'default n', though bool and
tristate symbols already implicitly default to n.
Discovered in Kconfiglib (https://github.com/ulfalizer/Kconfiglib),
which does more strict checking here:
kconfiglib.KconfigSyntaxError: board/google/Kconfig:34: Couldn't parse ' select n': expected nonconstant symbol
Signed-off-by: Ulf Magnusson <ulfalizer@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
The variable t_rfc is never used, so drop it. The variables ddr_wctl
and ddr_wcmd are only used in certain manual instances, so guard their
declaration by the same check as their use.
Cc: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
U-Boot on QEMU does not build ACPI table by ourself, instead it uses
the prebuilt ACPI table via the qfw interface. This implements the
qfw version of acpi_get_rsdp_addr() for setup_zimage().
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
At present the acpi_rsdp_addr variable is directly referenced in
setup_zimage(). This changes to use an API for better encapsulation
and extension.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
There is no JTAG symbol in the "Boot mode" choice. JTAG_MODE was
probably intended.
No functional changes. Kconfig choices fall back on using the first
(visible) symbol in the choice as the default if the default symbol is
not visible.
Discovered in Kconfiglib (https://github.com/ulfalizer/Kconfiglib),
which prints the following warning:
warning: the default selection JTAG (undefined) of <choice> (defined at arch/arm/cpu/armv8/zynqmp/Kconfig:107) is not contained in the choice
I've added a corresponding warning to the C tools too, which is
currently in linux-next: https://patchwork.kernel.org/patch/9983667/
Signed-off-by: Ulf Magnusson <ulfalizer@gmail.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This patch moved ethernet PHY configs of ZynqMP boards
to respective defconfig.
Signed-off-by: Vipul Kumar <vipulk@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This patch moved ethernet PHY configs of Microblaze board to
respective defconfig.
Signed-off-by: Vipul Kumar <vipulk@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This patch moved ethernet PHY configs of Zynq boards
to respective defconfig.
Signed-off-by: Vipul Kumar <vipulk@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Move generic functions to common location psu_spl_init.c. Function
declarations are added to private header.
These changes are done in connection to the fact that still files from
HDF can be copied over and compilation should pass.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Remove SPL_BUILD dependency from zynqmp.c and move it to header file.
Use only one symbol for including psu_init.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
The Arasan NFC driver requires the self-init mode,
so it should select it.
Instead of having the config header define the macro,
it's cleaner to select the option at the Kconfig level.
Signed-off-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This patch corrects the ecc address calculation before updating
to ecc register. The ecc address has to be calculated based on
page, oob and ecc sizes of the device.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This patch adds support for ondie ecc. As of now
this adds support for micron parts which supports
ondie ecc.
Didn't found any better way to detect ondie ecc
support by a device except sorting out with
manufacture and device id's.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Move common part of ecc structure initialization to
arasan_nand_init() routine.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This patch adds new target which is called as mini configuration
with only emmc functionality and other required basic features enabled.
This will be used to run in system with small footprint and needs
emmc support.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This patch adds new target which is called as mini configuration
with only nand functionality and other required basic features enabled.
This will be used to run in system with small footprint and needs
nand support.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
DDR less systems are possible for configuration like mini qspi
and making DDR region as normal memory may cause speculative
access which results u-boot hang if DDR is absent. So, this
patch fixes the issue by not making DDR memory region
entry into MMU table.
Future solution is to prepare MMU table per memory node in dts instead
of hard code DDR addresses.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
psu_init() returns int which wasn't declared and checked.
The patch is fixing function declarations and code to handle return
values properly.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Drop the space before/after '<' and '>'; and
separate the entries to be a bit more readable.
Reported-by: Julia Cartwright <julia@ni.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
BOOTCOMMAND is composed with distro_bootcmd but this variable is not
present. Enabling distro defaults setting is fixing it.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
There are two reasons for doing this change.
There is still !DM driver for xilinx soft gpio IP and especially it is
saving some space for memory constrained boards like cse (almost ~400B).
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Do not enable DM_ETH/MMC if subsystems are not enabled.
This saves memory for memory constrained boards like cse.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
There is no reason to enable BLK by default for all boards which is just
increasing memory footprint for memory contrained boards like cse.
zc770s are also saving some space.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Ethernet cable is not connected for xm011 that's why disable all
ethernet related configurations.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
It is good to see this string to make sure that u-boot which runs on the
board is the same which should run there.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Set the 8GB PCIe High area as device memory.
Also extend the DDR High area to cover the full 32GB range.
Signed-off-by: Anders Hedlund <anders.j.hedlund@gmail.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Add check if boot_targets exists in environment and then
generate new_targets env accordingly. Performing strlen on
null address causes it to fail with exception if isolation
is enabled with DDR address zero as secure. It works with out
isolation enabled as zero is valid address but it may lead to
junk values in boot_targets.
This patch fixes the issue by checking return value of env_get
so that it generate boot_targets properly.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
The patch is fixing the following Warning:
arch/arm/mach-zynq/ps7_spl_init.c:133:24: warning: comparison between
signed and unsigned integer expressions [-Wsign-compare]
while (ioread(addr) < delay)
^
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
zc770-xm011 is x8 width configuration. This FMC card has also x16
variant which requires different ps7_init configuration. This patch adds
it.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
New field acpi_rsdp_addr, which has been introduced in boot protocol
v2.14 [1], in boot parameters tells kernel the exact address of RDSP
ACPI table. Knowing it increases robustness of the kernel by avoiding
in some cases traversal through a part of physical memory.
It will slightly reduce boot time by the same reason.
[1] See Linux kernel commit
2f74cbf ("x86/boot: Add the ACPI RSDP address to struct setup_header::acpi_rdsp_addr")
@ https://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git/commit/?id=2f74cbf
for the details.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: updated the kernel commit git URL and fixed one style issue]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
The commit
20bfac0599 ("x86: zImage: add Intel MID platforms support")
introduced an assignment of subarch field in boot parameters, though
missed the right place of doing that. It doesn't matter if we have or
not a kernel command line supplied, we just set that field. Although
guard it by protocol version which supports it.
Fixes: 20bfac0599 ("x86: zImage: add Intel MID platforms support")
Cc: Vincent Tinelli <vincent.tinelli@intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
The commit
eece493a7a ("cmd: qfw: bring ACPI generation code into qfw core")
moves ACPI related code to another file and missed an update of
references in acpi_table.c.
Do it now.
Fixes: eece493a7a ("cmd: qfw: bring ACPI generation code into qfw core")
Cc: Miao Yan <yanmiaobest@gmail.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
ASL compiler warns:
ASL board/intel/edison/dsdt.asl
board/intel/edison/dsdt.asl.tmp 238: Method (_CRS, 0, NotSerialized)
Remark 2120 - Control Method should be made Serialized ^ (due to creation of named objects within)
Do as suggested by ASL compiler.
Fixes: 5d8c4ebd95 ("x86: tangier: Add Bluetooth to ACPI table")
Reported-by: Ferry Toth <fntoth@gmail.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
AES encryption in CBC mode, in most cases, must be used with random
initialization vector. Using the same key and initialization vector several
times is weak and must be avoided.
Added iv parameter to the aes_cbc_encrypt_blocks and aes_cbc_decrypt_blocks
functions for passing initialization vector.
Command 'aes' now also require the initialization vector parameter.
Signed-off-by: Andrey Mozzhuhin <amozzhuhin@yandex.ru>
Recent GCC versions warn if the format string is not a literal
because the compiler cannot check the argument validity at compile
time.
Commit 192bc6948b ("Fix GCC format-security errors and convert
sprintfs.") blindly replaced sprintf() with strcpy(), including
many cases where the format parameter is a string literal.
For the kconfig change:
sprintf(header, " ");
..., here the format parameter is a string literal " ", so it is
definitely equivalent to:
strcpy(header, " ");
Of course, if the 'header' did not have enough length for containing
" ", it would be a security problem, but another problem. (in this
case, the 'header' is 4 byte length buffer, so it is not a problem at
all.)
The kconfig code is kept as synced with Linux as possible, but this
change made the code out-of-sync for nothing. Just reverting.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
When printing a size_t value we need to use %zu for portability between
32bit and 64bit targets.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Marek Behun <marek.behun@nic.cz>
When we have a driver that is used on both 32bit and 64bit targets and
we are talking about address space we cannot use u64 nor u32 and instead
need to use phys_addr_t.
Fixes: 377883f16d ("net: mvpp2x: fix phy connected to wrong mdio issue")
Cc: Stefan Chulski <stefanc@marvell.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
Since 'commit f4fcba5c5b ("clk: implement clk_set_defaults()")'
STM32F4 family board can't boot.
Above patch calls clk_set_rate() for all nodes with assigned-clock-rates
property. Clock driver for STM32F family doesn't implement .set_rate
callback which make clk_set_defaults() exit on error and prevent board
to boot.
Fixes: f4fcba5c5b ("clk: implement clk_set_defaults()")
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Since 'commit af2f44267 ("fdc spl: use different BOARD_INIT MACRO for spl and tpl")'
board stm32f746-disco can't boot.
The macro CONFIG_IS_ENABLED() can't evaluate the value of
CONFIG_SPL_BOARD_INIT as it was defined in include/configs/stm32f746-disco.h
without attributed value.
Moving CONFIG_SPL_BOARD_INIT from stm32f746-disco.h to mach-stm32/Kconfig
fixes this issue.
Fixes: af2f44267 ("fdc spl: use different BOARD_INIT MACRO for spl and tpl")
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Commit 608b0c4ad4 ("serial: Use next serial device if probing fails")
added code to search for more serial devices if the default one was not
probed correctly.
Unfortunately, that breaks omap3_evm. So while investigating why that is
the case, let's disable the full search for everyone but bcm283x where it
is needed.
Fixes: 608b0c4ad4 ("serial: Use next serial device if probing fails")
Reported-by: Derald D. Woods <woods.technical@gmail.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
Fix a typo in help output (awailable -> available).
Tidy the grammar - not the board connects to a port, we do.
While at it, be consistent in upper-casing the comments.
Fixes: eee4835d22 ("tools: Add Marvell recovery image download script")
Cc: Konstantin Porotchkin <kostap@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Igal Liberman <igall@marvell.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Konstantin Porotchkin <kostap@marvell.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
minicom doesn't inherit the baudrate from stty but uses its own
defaults, such as for example 57600, whereas we expect 115200 here.
Explicitly tell minicom which baudrate to use.
Fixes: eee4835d22 ("tools: Add Marvell recovery image download script")
Cc: Konstantin Porotchkin <kostap@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Igal Liberman <igall@marvell.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Konstantin Porotchkin <kostap@marvell.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
The variable cfi_flash_num_flash_banks is defined iff
CONFIG_SYS_MAX_FLASH_BANKS_DETECT is defined, but it is used
unconditionally in the function cfi_flash_init_dm. This leads to a
undefined variable compile error when CONFIG_SYS_MAX_FLASH_BANKS_DETECT
is not defined, but DM is enabled.
Fix this by always defining the cfi_flash_num_flash_banks variable.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
When long expressions surrounded by parentheses are split into multiple
lines, each consecutive line should be aligned with the corresponding
parenthesis. Fix all instances where this occurs.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
Long lines (>80 characters) should be avoided where possible. Break up
some long lines where it's not detrimental to readability.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
In a while loop in cfi_flash.c the array "start" is accessed at the index
"sector" before the index variable "sector" is bounds-checked, which
might lead to accesses beyond the bounds of the array.
Swap the order of the checks in the "&&" expression, so that the
short-circuit evaluation prevents out-of-bounds array accesses.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
checkpatch.pl complains about the spelling of ERR_TIMOUT. Since the
error is only used in a handful of files, we rename the error to
ERR_TIMEOUT.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
Camel-case naming should be avoided. Rename two camel-case variables,
and fix their usage accordingly.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
Strings should not be split accross multiple lines. Where possible and
not detrimental to readability, fix the instances where this occurs.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
According to the C standard, pointer arithmetic for pointers of type
void is undefined behavior (the assumption that they're 8-bit wide is a
GCC-specific assumption). In the interest of keeping the code
standards-compliant, and also better communicate intent, switch all
void* variables where pointer arithmetic is used to u8* variables.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
The condition in if statements should not be used for variable
assignment. Instead, the assignment should be done in a separate step
beforehand. Fix all instances where this occurs.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
The opening brace of block statements should be attached to the
statement itself, and not be on a separate line.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
If in a loop, the if block in a if/else statement ends in a break, the
statements in the else blockcan be extracted, since the break stops the
execution.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
In if/else statements, either both blocks (if and else) should have
braces or both blocks should not have braces, but mixed configurations
are discouraged. Fix all instances where this occurs.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
"==" and "!=" bind tighter than the boolean operators, so parentheses
around them in compound logical statements are unnecessary. Fix all
instances where this occurs.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
Comment blocks should end with a "*/" on a separate line, not with the
"*/" attached to the end of the last line of text. Fix all instances
where this occurs.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
printf/debug statements should not include the file name as a hardcoded
string, but instead use the __func__ macro. Fix all instances where this
occurs.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
When splitting long logical statements across multiple lines, the
logical operators should be at the end of the lines. Fix all instances
where this occurs.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
Blocks with a single statement should not be enclosed in braces. Fix all
instances where this occurs.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
There should be no consecutive blank lines, and no blank lines at the
end of blocks. But there should be blank lines between variable
declarations and code. Fix all instances where either occurs.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
There should be spaces around operators, and no spaces between a cast
and the variable its being applied to. Fix all instances where this
occurs.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
case statements should be at the same level of indent as the switch
keyword. Fix all instances where this occurs.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
When casting to a pointer type, the asterisk should be attached to the
type name, not separated by a space. Fix all instances where this
occurs.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
There should not be additional spaces when nesting parentheses
("( (...) )"). Fix all instances where this occurs.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
In a pointer declaration there should not be a space between the
asterisk and the pointer name. Fix all instances where this occurs.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
There should not be a space between a function name and a parenthesis
("func (...)"). Fix all instances where this occurs.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
Patch queue for efi - 2018-01-28
This is the second part of patches for 2018.03-rc1, fixing
a few minor issues and adding a readme file for iSCSI booting.
The appended README explains how U-Boot and iPXE can be used
to boot a diskless system from an iSCSI SAN.
The maintainer for README.efi and README.iscsi is set.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
[agraf: s/Adress/Address/]
Signed-off-by: Alexander Graf <agraf@suse.de>
Now that we have %pD support in vsprintf we should avoid separate
logic for printing device paths in other places.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
In an image is loaded from memory we do not have a device path.
Do not install NULL as device path in this case.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
When printing '%pD' with a value of NULL we want to output
'<NULL>'. But this requires copying to buf. Leave this
to string16.
A unit test is supplied which relies on EFI support in the sandbox.
The development for EFI support in the sandbox is currently in branch
u-boot-dm/efi-working. The branch lacks commit 6ea8b580f0 ("efi_loader:
correct DeviceNodeToText for media types"). Ater rebasing the aforementioned
branch on U-Boot v2018.01 and adding 256060e425 and this patch the test
is executed successfully.
Fixes: 256060e425 (vsprintf.c: add EFI device path printing)
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
When a UEFI payload just returns instead of calling the Exit() callback,
we handle that in efi_do_enter() and call Exit on its behalf, so that
the loaded_image->exit_status value is correct.
We were missing that logic in StartImage(). Call it there too.
Reported-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Provide a better description for indent_string.
Fix a typo.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
If 'bootefi hello' or 'bootefi selftest' can be executed depends on the
configuration.
If an invalid non-numeric 1st argument is passed to bootefi, e.g.
'bootefi hola', this string is converted to 0 and U-Boot jumps to
this typically invalid address.
With the patch the online help is shown instead.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
EFI calls are usually defined as asmlinkage. That means we pass all parameters
to functions via the stack x86_32.
On x86_64 however, we need to also stick to the MS ABI calling conventions,
which the EFIAPI define conveniently handles for us. Most EFI functions were
also marked with EFIAPI, except for the entry call.
So this patch adjusts all entry calls to use EFIAPI instead of the manual
asmlinkage attribute.
While at it, we also change the prototype of the entry point to return
efi_status_t instead of ulong, as this is the correct prototype definition.
Signed-off-by: Alexander Graf <agraf@suse.de>
---
v1 -> v2:
- Use efi_status_t in all occurences
We have 2 users of the EFI headers: efi_loader and the EFI stub. Efi_loader
always expects that the bitness of the definitions it uses is identical to
the execution.
The EFI stub however allows to run x86_64 U-Boot on 32bit EFI and the other
way around, so it allows for different bitness of EFI definitions and U-Boot
environment.
This patch explicitly requests via Kconfig that efi_loader can only be enabled
if the bitness is identical. Because we can run efi_loader on x86_64 without
EFI stub enabled, it also ensures that this case propagates the correct ABI
constraints.
Signed-off-by: Alexander Graf <agraf@suse.de>
The SOM has external pull-up resistors, so let's turn these off.
It was helping reduce some errors when running I2C1 @ 2.6MHz.
Signed-off-by: Adam Ford <aford173@gmail.com>
Selecting this option will reduce SPL boot time by approx. 6 ms
(e. g. with 70 bytes long banner string at 115200 baud).
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Tested-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
The serial drivers now depend on the pinctrl driver to determine whether
they are enabled. That means if a serial device wants to be used pre-reloc,
we also need the pinctrl device pre-reloc.
Adapt the pinctrl driver as well as dts overlay accordingly.
Signed-off-by: Alexander Graf <agraf@suse.de>
On bcm2835 we need to ensure we only access serial devices that are
muxed to the serial output pins of the pin header. To achieve this
for the pl011 device, add a bcm2835 specific pl011 wrapper device
that does this check but otherwise behaves like a pl011 device.
Signed-off-by: Alexander Graf <agraf@suse.de>
It seems as if I have more interest in BCM2835 support than most others,
so I'll bite the bullet and declare myself maintainer. It'd be a shame
to leave that platform orphaned.
Signed-off-by: Alexander Graf <agraf@suse.de>
Setting config options using headers is deprecated. This patch converts
the BCM2835 Mini-UART to Kconfig.
Signed-off-by: Alexander Graf <agraf@suse.de>
We want to use Kconfig logic to depend on whether pl01x devices
are built in, so let's convert their inclusion selection to Kconfig.
This round goes to pl01x.
Signed-off-by: Alexander Graf <agraf@suse.de>
We want to use Kconfig logic to depend on whether pl01x devices
are built in, so let's convert their inclusion selection to Kconfig.
This round goes to pl011.
Signed-off-by: Alexander Graf <agraf@suse.de>
We want to use Kconfig logic to depend on whether pl01x devices
are built in, so let's convert their inclusion selection to Kconfig.
This round goes to pl010.
Signed-off-by: Alexander Graf <agraf@suse.de>
The bcm283x mini-uart is only really usable as U-Boot serial output
when it is muxed to the UART pins of the RPi pin header.
So fail probing in case it is not muxed correctly, as in that case
firmware did not initialize it properly either.
Signed-off-by: Alexander Graf <agraf@suse.de>
The serial initialization doesn't always quite work for me, so let's
always skip it for now. We know that firmware on the RPi initializes
us properly already.
Signed-off-by: Alexander Graf <agraf@suse.de>
Firmware on the Raspberry Pi family of devices can dynamically configure either
the PL011, Mini-UART or no device at all to be routed to the user accessible
UART pins.
That means we need to always include both drivers, because we can never be sure
which of the two serial devices firmware actually chooses to use.
Signed-off-by: Alexander Graf <agraf@suse.de>
We are switching to a model where a serial device doesn't even get probed when
it's not muxed properly, so we don't need device specific disabling
functionality anymore.
Signed-off-by: Alexander Graf <agraf@suse.de>
We are switching to a model where our board file can directly fail probing
of serial devices when they're not usable, so remove the current runtime
hack we have.
Signed-off-by: Alexander Graf <agraf@suse.de>
Currently our serial device search chokes on the fact that the serial
probe function could fail. If it does, instead of searching for the next
usable serial device, it just quits.
This patch changes the fallback logic so that even when a serial device
was not probed correctly, we just try the next ones until we find one that
works.
Signed-off-by: Alexander Graf <agraf@suse.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
With driver model enabled in SPL, sdram_init() requires device tree
and malloc to be initialized.
Therefore call spl_early_init() in early_system_init().
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
The BCM2835 family of SoCs has 2 different SD controllers: One based on
the SDHCI spec and a custom, home-grown one.
This patch implements a driver for the latter based on the Linux driver.
This is needed so that we can make use of device trees that assume driver
presence of both SD controllers.
Signed-off-by: Alexander Graf <agraf@suse.de>
The bcm283x family of SoCs have a GPIO controller that also acts as
pinctrl controller.
This patch introduces a new pinctrl driver that can actually properly mux
devices into their device tree defined pin states and is now the primary
owner of the gpio device. The previous GPIO driver gets moved into a
subdevice of the pinctrl driver, bound to the same OF node.
That way whenever a device asks for pinctrl support, it gets it
automatically from the pinctrl driver and GPIO support is still available
in the normal command line phase.
Signed-off-by: Alexander Graf <agraf@suse.de>
CONFIG_WALNUT was dropped in June 2017 in:
commit 98f705c9ce ("powerpc: remove 4xx support")
While at it, the related CONFIG_MACH_SPECIFIC and the have_of
and _machine variables are unused as well, so drop them too.
Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
libfdt_env.h is supposed to provide system-dependent defines.
scripts/dtc/libfdt/libfdt_env.h from upstream DTC is suitable
for user-space, so we should use this for USE_HOSTCC case.
For compiling U-Boot, we need to override such system-dependent
defines, so use <linux/libfdt_env.h> imported from Linux.
<libfdt.h> selects a proper one. Maybe, we should split header
inclusion completely, but I do not want too many patches at one.
I can rip off the include/libfdt_env.h from HOST_EXTRACFLAGS.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
There is tons of code duplication between lib/libfdt/libfdt.h and
scripts/dtc/libfdt/libfdt.h. Evacuate the U-Boot own code to
include/libfdt.h and remove lib/libfdt/libfdt.h.
For host tools, <libfdt.h> should include scripts/dtc/libfdt/libfdt.h,
which is already suitable for user-space.
For compiling U-Boot, <linux/libfdt.h> should be included because we
need a different libfdt_env.h .
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
libfdt_env.h exists to contain system-dependent defines:
- typedef of fdt*_t
- fdt*_to_cpu(), cpu_to_fdt*
working_fdt and FDT_RAMDISK_OVERHEAD are unrelated to the environment,
so they must get out of this header.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Several host-tools use "bool" type without including <stdbool.h>.
This relies on the crappy header inclusion chain.
tools/Makefile has the following line:
HOST_EXTRACFLAGS += -include $(srctree)/include/libfdt_env.h \
All host-tools are forced to include libfdt_env.h even if they are
totally unrelated to FDT. Then, <stdbool.h> is indirectly included
as follows:
include/libfdt_env.h
-> include/linux/types.h
-> <stdbool.h>
I am fixing this horrible crap. In advance, I need to add necessary
include directives explicitly. tools/fdtgrep.c needs more; <fctl.h>
for open() and <errno.h> for errno.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
I do not remember why, but this is apparently a file-copy mistake.
The file name is libfdt.h, but its content is that of libfdt_env.h
Re-import it from upstream Linux.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The only difference between scripts/dtc/libfdt/fdt_rw.c and
lib/libfdt/fdt_rw.c is fdt_remove_unused_strings().
It is only used by fdtgrep, so we do not need to compile it for U-Boot
image. Move it to tools/libfdt/fdw_rw.c so that lib/libfdt/fdt_rw.c
can be a wrapper of scripts/dtc/libfdt/fdt_rw.c.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This commit allows overriding the default assumption that the boot UBI
MTD partition is named 'UBI' and the UBI volume is 'boot'. A board
desiring to use a legacy or alternative NAND layout can now define the
following two extra environment variables:
bootubipart=<some_ubi_partition_name>
bootubivol=<some_ubi_volume_name>
EXAMPLE:
[include/configs/some_board.h]
---8<-------------------------------------------------------------------
[...]
#include <config_distro_defaults.h>
#define MEM_LAYOUT_ENV_SETTINGS \
DEFAULT_LINUX_BOOT_ENV
#define BOOT_TARGET_DEVICES(func) \
func(UBIFS, ubifs, 0)
#include <config_distro_bootcmd.h>
[...]
#define CONFIG_EXTRA_ENV_SETTINGS \
MEM_LAYOUT_ENV_SETTINGS \
"bootubivol=rootfs\0" \
"bootubipart=rootfs\0" \
BOOTENV
[...]
---8<-------------------------------------------------------------------
Signed-off-by: Derald D. Woods <woods.technical@gmail.com>
Loading files stored with lzo compression from a btrfs filesystem was
producing unaligned memory accesses, which were causing a data abort
and a reset on an Orange Pi Zero.
The change in hash.c is not triggered by any error but follows the
same pattern. Please confirm.
Fixed according to doc/README.unaligned-memory-access.txt
Signed-off-by: Alberto Sánchez Molero <alsamolero@gmail.com>
Tested-by: Robert Nelson <robertcnelson@gmail.com>
The backlight pwm-cell is 3.
This remove the warning in buildman:
arch/arm/dts/rk3126-evb.dtb: Warning (pwms_property): Property 'pwms', cell 3 is not a phandle reference in /backlight
arch/arm/dts/rk3126-evb.dtb: Warning (pwms_property): Missing property '#pwm-cells' in node /sram@10080400 or bad phandle (referred from /backlight:pwms[3])
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
The set_parent implementations do not make sense when OF_PLATDATA is
enabled. We guard these against OF_PLATDATA and don't populate the
set_parent-op when this is the case.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
The RK3288 CRU-node assigns rates to a number of clocks that are not
implemented in the RK3288 clock-driver (but which have been
sufficiently initialised from rkclk_init()): for these clocks, we
implement the gmac clock set parent, but simply ignore the
others' set_rate() operation and return 0 to signal success.
Signed-off-by: David Wu <david.wu@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
The GMAC in the RK3228 once again is identical to the incarnation in
the RK3288 and the RK3399, except for where some of the configuration
and control registers are located in the GRF.
This adds the RK3368-specific logic necessary to reuse this driver.
Signed-off-by: David Wu <david.wu@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
The GMAC2IO in the RK3328 once again is identical to the incarnation in
the RK3288 and the RK3399, except for where some of the configuration
and control registers are located in the GRF.
This adds the RK3328-specific logic necessary to reuse this driver.
Signed-off-by: David Wu <david.wu@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
The rv1108 GMAC only support rmii interface, so need to add the
set_rmii() ops. Use the phy current interface to set rmii or
rgmii ops. At the same time, need to set the mac clock rate of
rmii with 50M, the clock rate of rgmii with 125M.
Signed-off-by: David Wu <david.wu@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
The RK3399 CRU-node assigns rates to a number of clocks that are not
implemented in the RK3399 clock-driver (but which have been
sufficiently initialised from rkclk_init()): for these clocks, we
simply ignore the set_rate() operation and return 0 to signal success.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: David Wu <david.wu@rock-chips.com>
Series-changes: 2
- Fixed David's email address.
Linux uses the properties 'assigned-clocks', 'assigned-clock-parents'
and 'assigned-clock-rates' to configure the clock subsystem for use
with various peripheral nodes.
This implements clk_set_defaults() and hooks it up with the general
device probibin in drivers/core/device.c: when a new device is probed,
clk_set_defaults() will be called for it and will process the
properties mentioned above.
Note that this functionality is designed to fail gracefully (i.e. if a
clock-driver does not implement set_parent(), we simply accept this
and ignore the error) as not to break existing board-support.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: David Wu <david.wu@rock-chips.com>
Series-changes: 2
- Fixed David's email address.
Series-version: 2
Cover-letter:
clk: support assigned-clock, assigned-clock-parents, assigned-clock-rates
For various peripherals on Rockchip SoCs (e.g. for the Ethernet GMAC),
the parent-clock needs to be set via the DTS. This adds the required
plumbing and implements the GMAC case for the RK3399.
END
This implements the (newly added) set_parent() operation for the
RK3399 with a focus on allowing the RGMII clock parent to be
configured via the assigned-clock-parents property of the GMAC node.
This implementation supports only the GMAC (in fact only the RGMII
clock parent) and allows to set this clock's parent either to the
internal SCLK_GMAC or to an external clock input (identifiable by it
providing a 'clock-output-name' of "gmac_clkin").
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: David Wu <david.wu@rock-chips.com>
Series-changes: 2
- Fixed David's email address.
The logic in clk_get_by_index() may be useful for other properties
than 'clocks': e.g. 'assigned-clocks' and 'assigned-clock-parents'
follows the same model.
This commit refactors clk_get_by_index() by introducing an internal
function clk_get_by_indexed_prop() that allows to specify the name
of the property to process. The original clk_get_by_index() call
is simply directed through this helper function with the property
name fixed to "clocks".
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: David Wu <david.wu@rock-chips.com>
Series-changes: 2
- Fixed David's email address.
Clocks may support multiple parents: this change introduces an
optional operation on the clk-uclass to set a clock's parent.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: David Wu <david.wu@rock-chips.com>
Series-changes: 2
- Fixed David's email address.
PLLSAIP divider uses 2 bits (bits 16 and 17) into RCC_PLLSAICFGR
register, available combination are :
00: PLLSAIP = 2
01: PLLSAIP = 4
10: PLLSAIP = 6
11: PLLSAIP = 8
Previously, the divider value was incorrectly set to 6.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
hw_data_init() is called before relocation to initialise hardware data.
Since ctrl is initialized to OMAP_SRAM_SCRATCH_SYS_CTRL in
arch/arm/mach-omap2/am33xx/hw_data.c, the pointer *ctrl will not be
updated during relocation and will hold a stale value.
Therefore call hw_data_init() again after relocation to
reinitialize *ctrl.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Since 7e0ed13 ("Convert ARCH_OMAP2PLUS boards' CONFIG_SYS_TEXT_BASE to
Kconfig"), a default SYS_TEXT_BASE was set for all ARCH_OMAP2PLUS devices.
CONFIG_ISW_ENTRY_ADDR is used to set SYS_TEXT_BASE in qspi boot.
Simplify this by directly assigning SYS_TEXT_BASE in the defconfig.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Move SYSCFG clock setup into configure_clocks() instead of calling
clock_setup() from board file.
As this clock is only needed in case of ethernet enabled and as
both stm32f4 and stm32f7 are using the Designware ethernet IP,
we use CONFIG_ETH_DESIGNWARE to only enable this clock if needed.
Move the RMII setup from board_early_init_f() to board_init()
to insure that RMII bit is set only when clock driver is initialized.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Thanks to 'commit ba1f966725 ("net: designware: add clock support")'
we don't need anymore to setup the STMMAC clock in board.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Vikas Manocha <vikas.manocha@st.com>
Several inline functions in this file reference undefined functions in
U-Boot. For example:
atomic-long.h:73:9: warning: implicit declaration of function
'atomic64_sub_and_test'
atomic-long.h:80:9: warning: implicit declaration of function
'atomic64_dec_and_test'
atomic-long.h:87:9: warning: implicit declaration of function
'atomic64_inc_and_test'
Handle this the same as the 32 bit build by wrapping these functions in
a __UBOOT__ check.
Signed-off-by: Bradley Bolen <bradleybolen@gmail.com>
This DT file comes from kernel v4.15, this board offers :
_ STM32F429NIH6 microcontroller
_ 4.3” color TFT LCD with resistive touchscreen (480 x 272 pixels)
_ Six 5 V power supply options:
Power jack
ST-LINK/V2 USB connector
User USB HS connector
User USB FS1 connector
User USB FS2 connector
Daughterboard
_ SAI Audio DAC, stereo audio jack which supports headset with
microphone
_ Stereo digital microphone, audio terminal connector used to connect
external speakers
_ 2 GBytes (or more) SDIO interface MicroSD card
_ RF EEPROM on I2 C compatible serial interface
_ RS-232 communication
_ IrDA transceiver
_ JTAG/SWD and ETM trace debug support, ST-LINK/V2 embedded
_ IEEE-802.3-2002 compliant Ethernet connector
_ Camera module
_ 8M x 32-bit SDRAM, 1M x 16-bit SRAM and 8M x 16-bit NOR Flash
_ Joystick with 4-directional control and selector
_ Reset, Wakeup and Tamper buttons
_ 4 color user LEDs
_ Extension connectors & memory connectors for daughterboard or
wrapping board
_ USB OTG HS and FS with Micro-AB connectors
_ RTC with backup battery
_ CAN2.0A/B compliant connection
_ Potentiometer
_ Motor control connector
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
As clk_stm32f driver is able to retrieve HSE frequency from DT,
CONFIG_STM32_HSE_HZ becomes useless.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
All current STM32F4 supported boards uses a 8MHz external oscillator.
All current STM32F7 supported boards uses a 25MHz external oscillator.
In order to introduce the new stm32f429-evaluation board which uses a
25MHz external oscillator without creating a dedicated struct
stm32_clk_info for this board, retrieve the external oscillator
frequency from DT and set pll_m accordingly to obtain 1MHz for the VCO.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
In order to retrieve the clk_hse fixed clock phandle in clk_stm32f driver,
add "u-boot,dm-pre-reloc" property in Uboot specific DT file.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
compiling U-Boot with bosch_mpcxxxxd_sd_defconfig
drops warning:
arch/arm/lib/bootm-fdt.c: In function ‘arch_fixup_fdt’:
arch/arm/lib/bootm-fdt.c:37:6: warning: unused variable ‘ret’ [-Wunused-variable]
int ret = 0;
^~~
Fix it.
Signed-off-by: Heiko Schocher <hs@denx.de>
When in early SPL we make some secure ROM calls that can effect
DRAM, due to this it is more stable to store the args for these
calls in SRAM, but uninitialized and zero'd globals are placed
in BSS, located in DRAM. Force our args into the data section
which is in SRAM during SPL.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Clarify the computation precedence in two ternary operator
constructions.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
There are some typos in the documentation of some functions in read.h;
fix those.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>
Finally, make the mpc8xxx driver capable of handling more GPIO devices;
this entails adding a special case for the MPC5121 SoC, and adding a set
of new compatible strings.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Rename the Kconfig option, structures (and their members), as well as
functions of the mpc85xx driver to include mpc8xxx to reflect the more
generic usage.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
In preparation to making the MPC85xx GPIO driver useable for a broader
range of SoCs, rename the driver file.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Make the pca953x_gpio driver compatible with a live device tree.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
The call to hash_block in passwd_abort fails with error ENOSPC on some
systems. The reason is that the variable which specifies the size of the
buffer to contain the computed hash does not get initialized.
This patch initializes the variable with the size of the buffer.
Signed-off-by: Martin Etnestad <martin.etnestad@appeartv.com>
Convert the R8A7791 Porter board to DM and DT. This implies mostly
enabling the necessary configuration options and plucking out the
ad-hoc configuration from the board file. Moreover, the pre-reloc
malloc size was increased to allow the clock driver to start up
early without running out of malloc space and the early stack was
moved further up in the DRAM to avoid rewriting U-Boot itself.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Add U-Boot DT extras for each SoC and board. This marks the required
nodes with u-boot,dm-pre-reloc to start clock and PRR early on while
avoiding modification of the DTs imported from Linux.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
The Stout board is not supported in Linux, so add a rudimentary DTS
for H2 Stout as a placeholder for when a proper DTS is available.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
---
NOTE: The Stout is already being shipped over, so proper DTS for both
U-Boot and Linux will happen once it's delivered :-)
Import the Renesas R8A7794 DTS and headers from upstream Linux kernel v4.15-rc8,
commit bebc6082da0a9f5d47a1ea2edc099bf671058bd4 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Import the Renesas R8A7793 DTS and headers from upstream Linux kernel v4.15-rc8,
commit bebc6082da0a9f5d47a1ea2edc099bf671058bd4 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Import the Renesas R8A7792 DTS and headers from upstream Linux kernel v4.15-rc8,
commit bebc6082da0a9f5d47a1ea2edc099bf671058bd4 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Import the Renesas R8A7791 DTS and headers from upstream Linux kernel v4.15-rc8,
commit bebc6082da0a9f5d47a1ea2edc099bf671058bd4 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Import the Renesas R8A7790 DTS and headers from upstream Linux kernel v4.15-rc8,
commit bebc6082da0a9f5d47a1ea2edc099bf671058bd4 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Add DM capable code into the SH ethernet driver and support probing
both from DT and pdata. The legacy non-DM, non-DT support is retained
as there are still systems in the tree which are not DM or DT capable.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Move the legacy functions around, so that they can be wrapped in a
massive ifdef CONFIG_DM_ETH once DM support is added. No functional
change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Split sh_eth_init() function into smaller chunks, which can
be called from both DM and non-DM code while handling the
specifics of both configurations.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Pull out the code for writing MAC address into the NIC into a
separate function, so it can be reused by both DM and non-DM
code. This is done in preparation for DM support, which handles
MAC address programming separately.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Split sh_eth_recv into two functions, one which checks whether
a packet was received and one which handles the received packet.
This is done in preparation for DM support, which handles these
two parts separately.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Pass sh_eth_dev structure around instead of eth_device, since the
later is specific to the legacy networking support. This change is
done in preparation for the DM addition.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Add driver for the Renesas RCar PCIe controller present on Gen2 SoCs.
The PCIe on Gen2 is used both to connect external PCIe peripherals as
well as access the on-SoC USB EHCI controller.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
The current environment has been hardcoded to an offset that starts to be
an issue given the current size of our main U-Boot binary.
By implementing a custom environment location routine, we can always favor
the FAT-based environment, and fallback to the MMC if we don't find
something in the FAT partition. We also implement the same order when
saving the environment, so that hopefully we can slowly migrate the users
over to FAT-based environment and away from the raw MMC one.
Eventually, and hopefully before we reach that limit again, we will have
most of our users using that setup, and we'll be able to retire the raw
environment, and gain more room for the U-Boot binary.
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Since we want to have multiple environments, we will need to initialise
all the environments since we don't know at init time what drivers might
fail when calling load.
Let's init all of them, and only consider for further operations the ones
that have not reported any errors at init time.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Now that we have everything in place to support multiple environment, let's
make sure the current code can use it.
The priority used between the various environment is the same one that was
used in the code previously.
At read / init times, the highest priority environment is going to be
detected, and we'll use the same one without lookup during writes. This
should implement the same behaviour than we currently have.
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Since we have global messages to indicate what's going on, the custom
messages in the environment drivers only make the output less readable.
Make the common code play a little nicer by removing all the extra output
in the standard case.
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Since we have global messages to indicate what's going on, the custom
messages in the environment drivers only make the output less readable.
Make MMC play a little nicer by removing all the extra \n and formatting
that is redundant with the global output.
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Since we have global messages to indicate what's going on, the custom
messages in the environment drivers only make the output less readable.
Make FAT play a little nicer by removing all the extra \n and formatting
that is redundant with the global output.
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Since we can have multiple environments now, it's better to provide a
decent indication on what environments were tried and which were the one to
fail and succeed.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Since we'll soon have support for multiple environments, the environment
saving message might end up being printed multiple times if the higher
priority environment cannot be used.
That might confuse the user, so let's make it explicit if the operation
failed or not.
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
In preparation for the multiple environment support, let's introduce two
new parameters to the environment driver lookup function: the priority and
operation.
The operation parameter is meant to identify, obviously, the operation you
might want to perform on the environment.
The priority is a number passed to identify the environment priority you
want to retrieve. The lowest priority parameter (0) will be the primary
source.
Combining the two parameters allow you to support multiple environments
through different priorities, and to change those priorities between read
and writes operations.
This is especially useful to implement migration mechanisms where you want
to always use the same environment first, be it to read or write, while the
common case is more likely to use the same environment it has read from to
write it to.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The env_driver_lookup_default and env_get_default_location functions are
about to get refactored to support loading from multiple environment.
The name is therefore not really well suited anymore. Drop the default
part to be a bit more relevant.
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The nvedit command is the only user of env_driver_lookup_default outside of
the environment code itself, and it uses it only to print the environment
it's about to save to during env save.
As we're about to rework the environment to be able to handle multiple
environment sources, we might not have an idea of what environment backend
is going to be used before trying (and possibly failing for some).
Therefore, it makes sense to remove that message and move it to the
env_save function itself. As a side effect, we also can get rid of the call
to env_driver_lookup_default that is also about to get refactored.
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Now that we have and use wait_for_bit_le32() available, the callers of
cm_write_with_phase() should not be casting values to u32 and instead we
expect a const void *, so provide that directly.
Fixes: 48263504c8 ("wait_bit: use wait_for_bit_le32 and remove wait_for_bit")
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
The MMC environment offset is getting very close to the end of the U-Boot
binary now. Since we want to make sure this will not overflow, add a size
limit in the board for arm64. arm32 has already that limit enforced in our
custom image generation.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
The make macro to check if the binary exceeds the board size limit is not
called. Make sure that is the case.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
The sunXi arm64 build has overflown, leading to the main U-boot binary
overwriting the environment when flashing the new image, or even worse,
overwriting itself when we're calling saveenv.
Disable this option that is not critical until we can adress the issue
properly.
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
The sunXi arm64 build has overflown, leading to the main U-boot binary
overwriting the environment when flashing the new image, or even worse,
overwriting itself when we're calling saveenv.
Disable this command that is not critical until we can adress the issue
properly.
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
The sunXi arm64 build has overflown, leading to the main U-boot binary
overwriting the environment when flashing the new image, or even worse,
overwriting itself when we're calling saveenv.
Disable this command that is not critical until we can adress the issue
properly.
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
The sunXi arm64 build has overflown, leading to the main U-boot binary
overwriting the environment when flashing the new image, or even worse,
overwriting itself when we're calling saveenv.
Disable this command that is not critical until we can adress the issue
properly.
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
The sunXi arm64 build has overflown, leading to the main U-boot binary
overwriting the environment when flashing the new image, or even worse,
overwriting itself when we're calling saveenv.
Disable this command that is not critical until we can adress the issue
properly.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
The sunXi arm64 build has overflown, leading to the main U-boot binary
overwriting the environment when flashing the new image, or even worse,
overwriting itself when we're calling saveenv.
Disable this command that is not critical until we can adress the issue
properly.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
The sunXi arm64 build has overflown, leading to the main U-boot binary
overwriting the environment when flashing the new image, or even worse,
overwriting itself when we're calling saveenv.
Disable this command that is not critical until we can adress the issue
properly.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
The sunXi arm64 build has overflown, leading to the main U-boot binary
overwriting the environment when flashing the new image, or even worse,
overwriting itself when we're calling saveenv.
Disable this command that is not critical until we can adress the issue
properly.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
The DFU code relies on the HASH config option. Make sure it is always there
by selecting it.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Add option to set spi controller clock frequency via device tree
using standard clock bindings.
Define dw_spi_get_clk function as 'weak' as some targets
(like SOCFPGA_GEN5 and SOCFPGA_ARRIA10) don't use standard clock API
and implement dw_spi_get_clk their own way in their clock manager.
Get rid of clock_manager.h include as we don't use
cm_get_spi_controller_clk_hz function anymore. (we use redefined
dw_spi_get_clk in SOCFPGA clock managers instead)
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Implement dw_spi_get_clk function to override its weak
implementation in designware_spi.c driver.
We need this change to get rid of cm_get_spi_controller_clk_hz
function and clock_manager.h include in designware_spi.c driver.
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
ehci_writel() swaps the arguments for address and value. One call
in ehci-mxs ignores that.
This fixes the warning:
drivers/usb/host/ehci-mxs.c: In function ?ehci_hcd_stop?:
drivers/usb/host/ehci-mxs.c:159:19: error: initialization makes integer from pointer without a cast [-Werror=int-conversion]
ehci_writel(tmp, &hcor->or_usbcmd);
^
arch/arm/include/asm/io.h:117:34: note: in definition of macro ?writel?
#define writel(v,c) ({ u32 __v = v; __iowmb(); __arch_putl(__v,c); __v; })
^
drivers/usb/host/ehci-mxs.c:159:2: note: in expansion of macro ?ehci_writel?
^~~~~~~~~~~
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Bool initializations should use true and false.
This issue was detected with the help of Coccinelle.
Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Marek Vasut <marex@denx.de>
This prevents the following ENOMEM:
Error binding driver 'bmips_cpu': -12
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
When flashing U-Boot on a Boston board using Xilinx Vivado tools, the
final 0x00 byte which ends the .relocs section seems to be skipped &
left in flash as 0xff unless the data contained in the .mcs is padded
out to a 16 byte boundary. Without our final zero byte relocation will
fail with an error about a spurious reloc:
Avoid this problem by padding out the data in the .mcs file to a 16 byte
boundary using srec_cat's -range-pad functionality.
Signed-off-by: Paul Burton <paul.burton@mips.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
This driver has been using printf() including filename since it was
added. Convert to using debug() instead.
Signed-off-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
Currently, socfpga_common.h does not allow configurations without
network support. This is because CONFIG_CMD_PXE is defined in this
file and distro mode has DHCP hard-coded as available.
Fix this by moving CONFIG_CMD_PXE and CONFIG_MENU to the defconfigs
and by making DHCP optional in BOOT_TARGET_DEVICES(func).
Signed-off-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
Pull code which is common for RCar Gen2 and RCar Gen3 into
separate source file. No functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Add Kconfig entries for each SoC clock table, so they can be
compiled in or out at build time. This can reduce the size of
the binary if desired.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
The Gen2 requires setting RMSTPCR before booting, while on Gen3 this
is thus far always zero. Split the tables so the RMSTPCR can be set
too.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Not all SoCs have the same PLL configuration options,
so make those PLL configuraion tables per-SoC.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Split the massive driver into smaller per-SoC drivers and pull the
common code into a separate file. This would allow configuring out
unnecessary clock drivers once the Kconfig changes are in and also
allow adding more clock tables easily.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Use the common RCAR_GEN2 config option instead of enumerating
each SoC and having a lengthy ifdef clause. No functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Replace fdtdec_get_addr() with devfdt_get_addr() as the later one is
the current recommended practice.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Convert these configuration options to Kconfig, update board defconfigs
and drop them from whitelist.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Pull out u-boot extras into dtsi files to make synchronization of DTS
from Linux kernel as easy as a simple copy. All the U-Boot extras are
now in *-u-boot.dts* files instead.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Import the RCar Gen3 DTS and headers from upstream Linux kernel v4.14,
commit bebc6082da0a9f5d47a1ea2edc099bf671058bd4 . This includes both M3
and H3 ULCB and Salvator-X boards.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
When clock is enabling, it's assigned to 0 as mmc->clock.
Then it can't initialize any card.
Fix to assign to correct clock value as mmc->cfg->f_min or f_max.
Fixes: 9546eb92cb ("mmc: fix the wrong disabling clock")
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Tested-by: Guillaume GARDET <guillaume.gardet@free.fr>
Tested-by: Anand Moon <linux.amoon@gmail.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
exynos5422 has the s2mps11 PMIC.
s2mps11 pmic has the 10-BUCK and 38-LDO regulators.
Each IP and devices in exynos5422 can be controlled by each regulators.
This patch is support for s2mps11 regulator driver.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Anand Moon <linux.amoon@gmail.com>
Make flash writes 32 bit aligned by using bounce buffers to deal with
non 32 bit aligned buffers.
This is required because as per TI K2G TRM[1], the external master is
only permitted to issue 32-bit data interface writes until the last word
of an indirect transfer. Otherwise indirect writes is known to fail
sometimes.
[1] http://www.ti.com/lit/ug/spruhy8g/spruhy8g.pdf
Signed-off-by: Vignesh R <vigneshr@ti.com>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
Reviewed-by: Jason Rush <jarush@gmail.com>
Acked-by: Jason Rush <jarush@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
This reverts commit 57897c13de.
Using bounce_buf.c to handle non-DMA alignment problems is bad as
bounce_buf.c does cache manipulations which is not required. Therefore
revert this patch in favour of local bounce buffer solution in the next
patch.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
Reviewed-by: Jason Rush <jarush@gmail.com>
Acked-by: Jason Rush <jarush@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
This reverts commit b63b46313e.
This commit changed cadence_qspi_apb to use bouncebuf.c, which invalidates
the data cache after reading. This is meant for dma transfers only and
breaks the cadence_qspi driver which copies via cpu only: data that is
copied by the cpu is in cache only and the cache invalidation at the end
throws away this data.
Signed-off-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
Signed-off-by: Vignesh R <vigneshr@ti.com>
Acked-by: Marek Vasut <marex@denx.de>
Reviewed-by: Jason Rush <jarush@gmail.com>
Acked-by: Jason Rush <jarush@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Adopt the Linux DT bindings. This also fixes an issue
with the indaddrtrig register on the Cadence QSPI
device being programmed with the wrong value for the
socfpga arch.
Tested on TI K2G platform:
Tested-by: Vignesh R <vigneshr@ti.com>
Tested on a socfpga-cyclonev board:
Tested-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
Signed-off-by: Jason Rush <jarush@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Acked-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
Acked-by: Marek Vasut <marex@denx.de>
Erratum NO. FE-9144572: The device SPI interface supports frequencies of
up to 50 MHz. However, due to this erratum, when the device core clock
is 250 MHz and the SPI interfaces is configured for 50MHz SPI clock and
CPOL=CPHA=1 there might occur data corruption on reads from the SPI
device.
Implement the workaround by setting the TMISO_SAMPLE value to 0x2
in the timing1 register.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Jagan Teki <jagan@openedev.com>
spi_flash_probe_tail is now only called from spi_flash_probe, hence we
can merge its body into spi_flash_probe.
Reviewed-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Previous patches removed the last usages of this config variable, so
that it is now obsolete.
This patch removes it from the whitelist.
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
A previous patch removed the spi_flash_probe_fdt function, which
contained the last call of the spi_setup_slave_fdt function, which is
now equally obsolete.
This patch removes the function.
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Commit ba45756 ("dm: x86: spi: Convert ICH SPI driver to driver model")
removed the last usage of the spi_flash_probe_fdt function, rendering it
obsolete.
This patch removes the function.
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
0efc024 ("spi_flash: Add spi_flash_probe_fdt() to locate SPI by FDT
node") added a helper function spi_base_setup_slave_fdt to to set up a
SPI slave from a given FDT blob. The only user was the exynos SPI
driver.
But commit 73186c9 ("dm: exynos: Convert SPI to driver model") removed
the use of this function, hence rendering it obsolete.
Remove this function, as well as the CONFIG_OF_SPI option, which guarded
only this function.
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
This patch fixes a printf specifier style violation, reduces the scope
of a variable, and turns a void pointer that is used with pointer
arithmetic into a u8 pointer.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Command bytes are part of the written bytes and they should be taken into
account when sending a spi transfer.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
For some SPI controllers it's not possible to keep the CS active between
transfers and they are limited to a known number of bytes.
This splits spi_flash reads into different iterations in order to respect
the SPI controller limits.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Add 8/16/32 bits and BE/LE versions of wait_for_bit.
This is needed for reading registers that are not aligned to 32 bits, and for
Big Endian platforms.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Change all coldfire arch files to use CONFIG_DISPLAY_CPUINFO.
Signed-off-by: Angelo Dureghello <angelo@sysam.it>
Reviewed-by: Tom Rini <trini@konsulko.com>
---
Changes for v2:
- update common/Kconfig to add M68K to the default y list
Add macro QIXIS_LBMAP_EMMC, QIXIS_LBMAP_IFC, QIXIS_RCW_SRC_IFC,
QIXIS_RCW_SRC_EMMC to enable IFC and eMMC as boot sources for
qixis commands.
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
[YS: Modify subject and add commit message]
Reviewed-by: York Sun <york.sun@nxp.com>
Currently only SD, NAND can be secondary boot sources controlled
by FPGA/CPLD via qixis commands. For SoC like LS1088 IFC-NOR
can be secondary boot source, while QSPI-NOR is the primary.
Add options in qixis to switch to other boot sources including
ifc and emmc.
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
The hash command function were not flushing the dcache before passing data
to CAAM/DMA and not invalidating the dcache when getting data back.
Due the data cache incoherency, HW accelerated hash commands used to fail
with CAAM errors like "Invalid KEY Command".
Check if pbuf and pout buffers are properly aligned to the cache line size
and flush/invalidate the memory regions to address this issue.
This solution is based in a previous work from Clemens Gruber in
commit 598e9dccc7 ("crypto/fsl: fix BLOB encapsulation and
decapsulation")
Reported-by: Anatolij Gustschin <agust@denx.de>
Signed-off-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
The current GPL only licensing on the device trees makes it very
impractical for other software components licensed under another
license.
To make it easier to reuse them, re-license the the device trees for
Freescale (now NXP) SoCs and boards under GPLv2+/X11 dual license.
Same trend is followed in linux.
Cc: Priyanka Jain <priyanka.jain@nxp.com>
Cc: Mingkai Hu <mingkai.hu@nxp.com>
Cc: York Sun <york.sun@nxp.com>
Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
This patch adds the support for VID on LS1088AQDS and LS1088ARDB systems.
It reads the fusesr register and changes the VDD accordingly by adjusting
the voltage via LTC3882 regulator.
This patch also takes care of the special case of 0.9V VDD is present in
fusesr register. In that case,it also changes the SERDES voltage by
disabling the SERDES, changing the SVDD and then re-enabling SERDES.
Signed-off-by: Raghav Dogra <raghav.dogra@nxp.com>
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: Amrita Kumari <amrita.kumari@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Adds a VID specific API in init_sequence_f and spl code flow
namely init_func_vid which is required to adjust core voltage.
VID specific code is required in spl, hence moving flag CONFIG_VID
out of spl flags.
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
When VID feature is supported, check the contents of fuse register
and configure DDR operate at 0.9v.
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Sets DDR configuration parameter cdr1 before all other settings
to support case 0.9v VDD is enabled for some SoCs
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Moves IR chip (IR36021) specific code in flag to resolve
compilation issue where it is not present. For example,
LS1088A is having a new LTC3882 voltage chip.
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Adds a board specific API namely board_adjust_vdd which
is required to define the board VDD adjust settings.
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Adds SERDES voltage and reset SERDES lanes API and makes
enable/disable DDR controller support 0.9V API common.
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Patch queue for efi - 2018-01-23
This time around we have a lot of EFI patches from Heinrich.
Highlights are:
- Allow EFI applications to register as drivers
- Allow exposure of U-Boot block devices from an EFI payload
- Compatibility improvements
This converts the following to Kconfig:
CONFIG_SOC_DA8XX
CONFIG_SOC_DA850
CONFIG_DA850_LOWLEVEL
CONFIG_MACH_DAVINCI_DA850_EVM
CONFIG_SYS_DA850_PLL_INIT
CONFIG_SYS_DA850_DDR_INIT
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: David Lechner <david@lechnology.com>
[trini: Rework CONFIG_SYS_DA850_PLL_INIT so it's selected on SOC_DA8XX]
Signed-off-by: Tom Rini <trini@konsulko.com>
Some messages are only useful if an error occurs.
Fix a use after free.
Add a missing free.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Create device path nodes for UCLASS_ETH udevices.
Create device path nodes of block device children of UCLASS_MMC udevices.
Consistently use debug for unsupported nodes.
Set the log level to error.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
[agraf: Fix build failure by adding #ifdef CONFIG_DM_ETH]
Signed-off-by: Alexander Graf <agraf@suse.de>
This test checks the driver for block IO devices.
A disk image is created in memory.
A handle is created for the new block IO device.
The block I/O protocol is installed on the handle.
ConnectController is used to setup partitions and to install the simple
file protocol.
A known file is read from the file system and verified.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
This patch provides
* a uclass for EFI drivers
* a EFI driver for block devices
For each EFI driver the uclass
* creates a handle
* adds the driver binding protocol
The uclass provides the bind, start, and stop entry points for the driver
binding protocol.
In bind() and stop() it checks if the controller implements the protocol
supported by the EFI driver. In the start() function it calls the bind()
function of the EFI driver. In the stop() function it destroys the child
controllers.
The EFI block driver binds to controllers implementing the block io
protocol.
When the bind function of the EFI block driver is called it creates a
new U-Boot block device. It installs child handles for all partitions and
installs the simple file protocol on these.
The read and write functions of the EFI block driver delegate calls to the
controller that it is bound to.
A usage example is as following:
U-Boot loads the iPXE snp.efi executable. iPXE connects an iSCSI drive and
exposes a handle with the block IO protocol. It calls ConnectController.
Now the EFI block driver installs the partitions with the simple file
protocol.
iPXE uses the simple file protocol to load Grub or the Linux Kernel.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
[agraf: add comment on calloc len]
Signed-off-by: Alexander Graf <agraf@suse.de>
The device tree is needed at runtime. So we have to store it in
EFI_RUNTIME_SERVICES_DATA memory.
The UEFI spec recommends to store all configuration tables in
EFI_RUNTIME_SERVICES_DATA memory.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
This pair of tests checks the StartImage boot service.
Each test loads an EFI application into memory and starts it.
One returns by calling the Exit boot service. The other returns directly.
The tests are not built on x86_64 because the relocation code for the efi
binary cannot be created.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
This patch lets the implementation of ExitBootServices conform to
the UEFI standard.
The timer events must be disabled before calling the notification
functions of the exit boot services events.
The boot services must be disabled in the system table.
The handles in the system table should be defined as efi_handle_t.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
In ExitBootServices we need to signal events irrespective of the current
TPL level. A new parameter check_tpl is added to efi_signal_event().
Function efi_console_timer_notify() gets some comments.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
On a block device and its partitions the same protocols can be
installed. To tell the apart we can use the type of the last
node of the device path which is not the end node.
The patch provides a utility function to find this last node.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Add the revision constants.
Depending on the revision additional fields are needed in the
media descriptor.
Use efi_uintn_t for number of bytes to read or write.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Up to now we have been using efi_disk_create_partitions() to create
partitions for block devices that existed before starting an EFI
application.
We need to call it for block devices created by EFI
applications at run time. The EFI application will define the
handle for the block device and install a device path protocol
on it. We have to use this device path as stem for the partition
device paths.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Provide new function efi_dp_part_node() to create a device
node for a partition.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
The GUID of the EFI_BLOCK_IO_PROTOCOL is needed in different code
parts. To avoid duplication make efi_block_io_guid a global symbol.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
The interface type name can be used to look up the interface type.
Don't confound it with the driver name which may be different.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
The calling convention for the entry point of an EFI image
is always 'asmlinkage'.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Check if the device tree and the SMBIOS table are available.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
The category of memory allocated for an EFI image should depend on
its type (application, bootime service driver, runtime service driver).
Our helloworld.efi built on arm64 has an illegal image type. Treat it
like an EFI application.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Use %pD to print the device path instead of its address when
entering efi_load_image.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
In contrast to the description the code did not split the device
path into device part and file part.
The code should use the installed protocol and not refer to the
internal structure of the the disk object.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
When installing the the simple file system protocol we have to path
the address of the structure and not the address of a pointer to the
structure.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
For the construction of device paths we need to call the
AllocatePool service. We should not ignore if it fails due to an
out of memory situation.
This patch changes the device path functions to return NULL if
the memory allocation fails.
Additional patches will be needed to fix the callers.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
We should consistently use the efi_handle_t typedef when
referring to handles.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
This unit test checks the following protocol services:
ConnectController, DisconnectController,
InstallProtocol, UninstallProtocol,
OpenProtocol, CloseProtcol, OpenProtocolInformation
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
The installation of UninstallProtocol is functional now.
So we do not expect errors when calling it.
Call UninstallProtocol with correct level of indirection
for parameter handle.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
The installation of UninstallProtocols is functional now.
So we do not expect errors when calling it.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
The UninstallProtocol boot service should first try to
disconnect controllers that have been connected with
EFI_OPEN_PROTOCOL_BY_DRIVER.
If the protocol is still opened by an agent, it should be
closed.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Unfortunately we need a forward declaration because both
OpenProtocol and CloseProtocol have to call DisconnectController.
And DisconnectController calls both OpenProtcol and CloseProtocol.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Handles should be passed as efi_handle_t and not as void *.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Implement the ConnectController boot service.
A unit test is supplied in a subsequent patch.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
When a device path protocol is installed write the device
path to the console in debug mode.
For printing the new macro EFI_PRINT is used, which can be reused
for future diagnostic output.
Remove unused EFI_PRINT_GUID macro
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
efi_open_protocol_information provides the agent and controller
handles as well as the attributes and open count of an protocol
on a handle.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
[agraf: fix counting error]
Signed-off-by: Alexander Graf <agraf@suse.de>
efi_open_protocol and efi_close_protocol have to keep track of
opened protocols.
Check if the protocol was opened for the same agent and
controller.
Remove all open protocol information for this pair.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
efi_open_protocol has to keep track of opened protocols.
OpenProtocol enters the agent and controller handle
information into this list.
A unit test is supplied with a subsequent patch.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Add a list of open protocol infos to each protocol of a handle.
Provide helper functions to access the list items.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
CloseProtocol cannot be called without agent handle.
There is no need to close the device path protocol if
it has been opened without agent handle.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
Replace list_for_each_safe() and list_entry() by
list_for_each_entry_safe().
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
Add color coding to output:
test section blue
success green
errors red
todo yellow
summary white
others light gray
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
[agraf: Fold in move of set_attribute before the print]
Signed-off-by: Alexander Graf <agraf@suse.de>
For testing EFI disk management we need an in-memory image of
a disk.
The tool file2include converts a file to a C include. The file
is separated into strings of 8 bytes. Only the non-zero strings
are written to the include. The output format has been designed
to maintain readability.
#define EFI_ST_DISK_IMG { 0x00010000, { \
{0x000001b8, "\x94\x37\x69\xfc\x00\x00\x00\x00"}, /* .7i..... */ \
{0x000001c0, "\x02\x00\x83\x02\x02\x00\x01\x00"}, /* ........ */ \
{0x000001c8, "\x00\x00\x7f\x00\x00\x00\x00\x00"}, /* ........ */ \
{0x000001f8, "\x00\x00\x00\x00\x00\x00\x55\xaa"}, /* ......U. */ \
...
{0x00006000, "\x48\x65\x6c\x6c\x6f\x20\x77\x6f"}, /* Hello wo */ \
{0x00006008, "\x72\x6c\x64\x21\x0a\x00\x00\x00"}, /* rld!.... */ \
{0, NULL} } }
As the disk image needed for testing contains mostly zeroes a high
compression ratio can be attained.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Avoid a failed assertion when an EFI app calls an EFI app.
Avoid that the indent level increases when calling 'bootefi hello'
repeatedly.
Avoid negative indent level when an EFI app calls an EFI app that
calls an EFI app (e.g. iPXE loads grub which starts the kernel).
Return the status code of a loaded image that returns without
calling the Exit boot service.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
For debugging efi_loader we need the capability to print EFI
device paths. With this patch we can write:
debug("device path: %pD", dp);
A possible output would be
device path: /MemoryMapped(0x0,0x3ff93a82,0x3ff93a82)
This enhancement is not available when building without EFI support
and neither in the SPL nor in the API example.
A test is provided. It can be executed in the sandbox with command
ut_print.
The development for EFI support in the sandbox is currently in
branch u-boot-dm/efi-working. The branch currently lacks
commit 6ea8b580f0 ("efi_loader: correct DeviceNodeToText
for media types"). Ater rebasing the aforementioned branch on
U-Boot v2018.01 the test is executed successfully.
Without EFI support in the sandbox the test is simply skipped.
Suggested-by: Rob Clark <robdclark@gmail.com>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
Without the patch a device path consisting only of an end node is
displayed as '/UNKNOWN(007f,00ff)'. It should be displayed as '/'.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
lib/efi* indicates files efi* in directory lib.
lib/efi*/ indicates all files in directories lib/efi*.
Fixes: 623b3a5797 efi_selftest: provide an EFI selftest application
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Device paths can be very long. Due to a limited output buffer
the output for device paths is cut off. We can avoid this by
directly calling the boottime service with the the device path
string.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
[agraf: Remove coloring code change]
Signed-off-by: Alexander Graf <agraf@suse.de>
In the task priority levels test debug output is written even if no
failure is detected.
Remove this distracting output.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
In the event services test debug output is written even if no
failure is detected.
Remove this distracting output.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
virt_size is of type unsigned long.
So it should be printed with %ul.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Add comments describing memory functions.
Fix the formatting of a function declaration.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
As the U-Boot is compiled with -fshort-wchar we can define
the firmware vendor constant as wide string.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Correctly create the device path for IDE and SCSI disks.
Support for SATA remains to be done in a future patch.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
When creating the device path of a block device it has to
comprise the block device itself and should not end at
its parent.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
fat.h unconditionally defines CONFIG_SUPPORT_VFAT (and has done since
2003), so as a result VFAT support is always enabled regardless of
whether a board config defines it or not. Drop this unnecessary option.
Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
Make it select FS_FAT as well, because if it's not selected, enabling
ENV_IS_IN_FAT causes a Kconfig warning:
warning: (ENV_IS_IN_FAT) selects FAT_WRITE which has unmet direct dependencies (FS_FAT)
This also allows dropping some code from config_fallbacks.
Also drop the unnecessary help text about having to enable
CONFIG_FAT_WRITE - Kconfig automatically handles that.
Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
Migrate the following symbols to Kconfig:
CONFIG_FS_EXT4
CONFIG_EXT4_WRITE
The definitions in config_fallbacks.h can now be expressed in Kconfig.
Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
This converts the following to Kconfig:
CONFIG_USB_MUSB_HCD
CONFIG_USB_MUSB_UDC
CONFIG_USB_DAVINCI
CONFIG_USB_OMAP3
CONFIG_USB_DA8XX
CONFIG_USB_AM35X
Signed-off-by: Adam Ford <aford173@gmail.com>
This converts the following to Kconfig:
CONFIG_USB_MUSB_OMAP2PLUS
CONFIG_USB_MUSB_AM35X
CONFIG_USB_MUSB_DSPS
CONFIG_USB_MUSB_PIO_ONLY
Signed-off-by: Adam Ford <aford173@gmail.com>
The SPL doesn't have much room, so in order to support OF_CONTROL
in SPL, we need the extra functionality of SPL_OF_PLATDATA.
Adding these features allows us to remove a small part of code without
losing the serial port during SPL.
Signed-off-by: Adam Ford <aford173@gmail.com>
flags member of struct timing was not initialized,
this took to unpredictable behaviour of display flags,
such DISPLAY_FLAGS_HSYNC_HIGH instead of _LOW etc.
Init timing->flags = 0
Signed-off-by: Giulio Benetti <giulio.benetti@micronovasrl.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Commit 4f425280fa ("mmc: fsl_esdhc: Allow all supported prescaler
values") made it possible to set SYSCTL.SDCLKFS to 0 in SDR mode on
i.MX, thus bypassing the SD clock frequency prescaler, in order to be
able to get higher SD clock frequencies in some contexts. However, that
commit missed the fact that this value is illegal on the eSDHCv3
instance of the i.MX53. This seems to be the only exception on i.MX,
this value being legal even for the eSDHCv2 instances of the i.MX53.
Fix this issue by changing the minimum prescaler value for the single
instance of the i.MX53 eSDHCv3 controller.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau.dev@gmail.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
When power is off, clock is not disabling.
Because it's passed to 1, mmc->clock should be set to f_min value.
Some drivers can't initialize the eMMC/SD card with current status.
This patch is to fix the disabling clock value to 0.
Fixes: 2e7410d76a ("mmc: disable the mmc clock during power off")
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Tested-by: Guillaume GARDET <guillaume.gardet@free.fr>
Tested-by: Anand Moon <linux.amoon@gmail.com>
During the tuning, drivers repeat data transfer, changing timing
parameters in the controller hardware. So, the tuning commands
(CMD19 for SD, CMD21 for eMMC) fail, and this is not a problem
at all.
Showing "Error detected..." in normal operation just make users
upset. This should not be shown.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
This line overwrites host_cap that has been set by drivers and/or
helpers like mmc_of_parse(). Accumulate capabilities flags.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
You must fix your DT if it specifies insane bus-width, for example,
bus-width = <3>;
debug() is not displayed in usual configuration, so people will not
even notice weirdness. Use dev_err() instead, then let it fail.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
mmc_of_parse() in U-Boot is a pussy helper; it sets cfg->f_max to
52MHz even if DT does not provide "max-frequency" at all. This can
overwrite cfg->f_max that may have been set to a reasonable default.
As the DT binding says, "max-frequency" is an optional property.
Do nothing if DT does not specify it. This is the behavior of
mmc_of_parse() in Linux.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
dev_read_u32_default() always returns something even when the property
is missing. So, it is impossible to do nothing in the case. One
solution is to use ofnode_read_u32() instead, but adding dev_read_u32()
will be helpful.
BTW, Linux has an equvalent function, device_property_read_u32();
it is clearer that it reads a property. I cannot understand the
behavior of dev_read_u32() from its name.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Fix some style violations in fdtdec.c, and reduce the scope of some
variables.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Judging from its name and parameters, device_is_compatible looks like it
is compatible with a live device tree, but it actually isn't.
Make it compatible with a live device tree.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
There are some whitespace-related style violations in read.c; fix those.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
The Makefile entries in the clk driver directory were not alphabetically
sorted. Correct this.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
The clk uclass was converted to support a live device tree recently,
hence the global data pointer declarations are no longer needed.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
checkpatch.pl complains that the clk_ops structures used in clk-uclass.c
ought to be const, so we mark them as const.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Sync with Linux commit 30a7acd573899fd8b("Linux 4.15-rc6")
to use enum pin_config_param.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
get_maintainer.pl quotes names which it considers unsafe, i.e. anything
containing [^a-zA-Z0-9_ \-]. This confuses patman, it will duplicate
addresses which are also in Series-to/cc. Strip the quotes.
Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
The function dev_read_addr calls ofnode_get_addr_index in the live tree
case, which does not apply bus translations to the address read from the
device tree. This results in illegal addresses on boards that rely on
bus translations being applied.
Fix this situation by applying bus translations in the live tree case as
well.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Tested-by: Stephen Warren <swarren@nvidia.com>
Now the u-boot spi image is greater than 0x90000, increase the same in
env during spi erase.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
A 2 line help entry for a new Kconfig entry is, at this time, sufficient
in some cases, so lets drop that warning for now.
Signed-off-by: Tom Rini <trini@konsulko.com>
The following config symbols are only defined once and never referenced
anywhere else:
CONFIG_CYRUS
CONFIG_IDS8313
CONFIG_MPC8308_P1M
CONFIG_MPC8308RDB
CONFIG_MPC8349EMDS
CONFIG_MPC8349ITXGP
CONFIG_SBC8349
CONFIG_SBC8548
CONFIG_SBC8641D
CONFIG_TQM834X
CONFIG_VE8313
CONFIG_XPEDITE5140
CONFIG_XPEDITE5200
CONFIG_XPEDITE550X
Most of them are config symbols named after the respective boards which
seems to have been a standard practice at some point.
Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
Acked-by: Mario Six <mario.six@gdsys.cc>
Now this driver is used across stm32f4, stm32f7 and stm32h7
SoCs family, give it a generic name.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Vikas Manocha <vikas.manocha@st.com>
The following config symbols are only defined once and never referenced
anywhere else:
CONFIG_AMCORE
CONFIG_ASTRO5373L
CONFIG_M52277EVB
CONFIG_M5253DEMO
CONFIG_M5253EVBE
CONFIG_M5275EVB
CONFIG_M54418TWR
CONFIG_STMARK2
Most of them are config symbols named after the respective boards which
seems to have been a standard practice at some point.
Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
Last users of the following macros (for n = 0..7) were removed in
commit 5b8e76c35e ("powerpc, 8xx: remove support for 8xx"):
CONFIG_SYS_PCMCIA_PBRn
CONFIG_SYS_PCMCIA_PORn
Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
It's mostly obvious, except that QEMU is annoying and requires an
explicit '-cpu cortex-a57' (or some other 64-bit core) to actually run
in 64-bit mode.
While at it, remove the references to setting the ARCH environment
variable; that is not used in U-Boot.
Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Reviewed-by: Tom Rini <trini@konsulko.com>
This adds support for '-machine virt' on AArch64. This is rather simple:
we just add TARGET_QEMU_ARM_xxBIT to select a few different Kconfig
symbols, provide the ARMv8 memory map from the board file and add a new
defconfig based on the 32-bit defconfig.
Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Reviewed-by: Tom Rini <trini@konsulko.com>
The signing certificate name is always 15 chars long, but need not be
null terminated. One solution is then to use printf precision modifiers
to only print this many chars ("%.15s"), but tiny printf does not support
this, so lets just drop printing the cert name for now.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Fix the size calculation in the verify boot. The header size
should be subtracted from the image size, not be assigned to
the image size.
Fixes: 0830d72bb9 ("arm: am33xx: security: adds auth support for encrypted images")
Signed-off-by: Madan Srinivas <madans@ti.com>
Signed-off-by: Dan Murphy <dmurphy@ti.com>
Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
CONFIG_OF_EMBED in particular is needed to allow the Raspberry Pi
firmware to pass the DTB to U-Boot and on to the kernel.
Signed-off-by: Drew Moseley <drew.moseley@northern.tech>
This commit adds UBIFS_NAND to BOOT_TARGET_DEVICES. This will
allow the kernel zImage to be loaded from '/boot/zImage' in UBIFS
(ubi0:rootfs).
Additionally update the *_MMC devices to also load kernel image from
the MMC 0:2 EXT4 file system.
DISTRO_DEFAULTS Setup
=====================
[primary] Check MMC 0:1 for /extlinux/extlinux.conf and boot
[fallback 1] Check MMC 0:2 /boot/zImage and run mmcbootz
[fallback 2] Check MMC 0:2 /boot/uImage and run mmcboot
[fallback 3] Check NAND UBIFS /boot/zImage and run nandbootubifs
[fallback 4] Check NAND partitions and run nandboot
The following "extlinux.conf" can be used to load images in the
top-level of the MMC 0:1 FAT partition.
[MMC(0:1)/extlinux/extlinux.conf]
---8<-------------------------------------------------------------------
default omap3-evm
label omap3-evm
kernel /zImage
fdt /omap3-evm.dtb
append console=ttyO0,115200n8 root=/dev/mmcblk0p2 rw rootfstype=ext4 rootwait
---8<-------------------------------------------------------------------
Signed-off-by: Derald D. Woods <woods.technical@gmail.com>
initr_mem() is already enclosed by
#if defined(CONFIG_PRAM)
#endif
So there is no need to check CONFIG_PRAM again inside the
function.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
The command portion of the GPIO driver can only be used in full SPL so
re-work to guard the command related portions and mark it as static.
Cc: Dan Murphy <dmurphy@ti.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Change help description to match the style of the other U-Boot commands
and get rid of the leading whitespace.
Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
The message "reading %s\n" may be interesting when
debugging but otherwise it is superfluous.
Only output the message when debugging.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
The message
"** %s shorter than offset + len **\n"
may be interesting when debugging but it does not indicate an
error.
So we should not write it if we are not in debug mode.
Fixes: 7a3e70cfd8 fs/fs.c: read up to EOF when len would read past EOF
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
This commit adds OMAP3 BeagleBoard devicetree files from
Linux v4.15-rc5. This includes standard OMAP34XX board revisions as
well as the 'xM' which is OMAP36XX.
Signed-off-by: Derald D. Woods <woods.technical@gmail.com>
Update the board pinmux for AM574x-IDK board using latest PMT[1] and the
board files named am574x_idk_v1p3b_sr2p0 that were auto generated on
13th October, 2017 by "Ahmad Rashed <a-rashed@ti.com>".
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
AM574x-idk has the following DDR parts attached:
EMIF1: MT41K256M16HA (1GB with ECC)
EMIF2: MT41K256M16HA (1GB without ECC)
Enabling 2GB DDR without interleaving between EMIFs. And
enabling ECC on EMIF1.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Krunal Bhargav <k-bhargav@ti.com>
DRA762 comes in two packages:
- ABZ: Pin compatible package with DRA742 with DDR@1333MHz
- ACD: High performance(OPP_PLUS) package with new IPs
Both the above packages uses the same IDCODE hence needs to
differentiate using package information in DIE_ID_2.
Add support for the same. Also update clock, ddr, emif information.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Keystone and DRA7 based TI platforms uses same
EMIF memory controller. cmd_ddr3 command is customized
for keystone platforms, make it generic so that it can
be re used for DRA7 platforms.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Move cmd_ddr3 to cmd/ti in order to make
it build for non-keystone TI platforms.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
[trini: Rename to ddr3.c not cmd_ddr3.c]
Signed-off-by: Tom Rini <trini@konsulko.com>
For data integrity, the EMIF1 supports ECC on the data
written or read from the SDRAM. Add support for enabling
ECC support in EMIF1.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Krunal Bhargav <k-bhargav@ti.com>
This is a slight difference in emif_ddr_phy_status register offsets for
DRA7xx EMIF and older versions. And ecc registers are available only
in DRA7xx EMIC. Add support for this difference and ecc registers.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Add support for simple memory fill operation. With large data sizes
it is much faster to use EDMA for memory fill rather than CPU.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
I'm working on a v2 patch to add support for a board named pdu001. Its
Linux DTS file uses the include file added by this patch. To keep Linux
and U-Boot DTS files in sync U-Boot requires a copy of this file,
although there is no driver for NXP's PCA9532 i2c LED driver chip (yet).
Signed-off-by: Felix Brack <fb@ltec.ch>
All ddr3_emif declarations are not used outside ddr3_k2g.c
file. So make all of them as static.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
gpio1_2 is used for HPD interrupt with DRA76's DVI add-on board, so mux
the pin as gpio and PIN_INPUT.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
DPLL DRR doesn't have an M4 divider. But the clock driver is trying
to configure M4 divider as 4(writing into a reserved register).
Fixing it by making M4 divider as -1.
Reported-by: Steve Kipisz <s-kipisz2@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
The size field in GP header that is expected by ROM is size of the
image + size of the header. But omapimage tool is updating size
as image size + 2 * header size. Remove this extra header size bytes.
Reported-by: Denys Dmytriyenko <denys@ti.com>
Debugged-by: Madan Srinivas <madans@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Added support for K2G EVM with FlipChip SoC of which
ARM/DDR3 runs at 1GHz/1066 MT/s. The patch is also
backward compatible with old revision EVM and EVM
with WireBond SoC. Their ARM/DDR3 run at 600MHz/800 MT/s.
The new SoC supports 2 different speeds at 1GHz and 600MHz.
Modyfied the CPU Name to show which SoC is used in the EVM.
Modified the DDR3 configuration to reflect New SoC supports
2 different CPU and DDR3 speeds, 1GHz/1066MT and 600MHz/800MT.
Added new inline function board_it_k2g_g1() for the new FlipChip 1GHz,
and set the u-boot env variable board_name accordingly.
Modified findfdt script in u-boot environment variable to include new k2g board type.
Signed-off-by: Rex Chang <rchang@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
MCAN can be accessed via DCAN1 or DCAN2. Determining which DCAN instance
to use if any at all is done through
CTRL_CORE_CONTROL_SPARE_RW.SEL_ALT_MCAN. Since general pinmuxing is
handled in U-boot. Handle this additional pinmuxing requirement in U-boot
to ensure that MCAN is used by default via the DCAN1 pins.
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Vignesh R <vigneshr@ti.com>
[fcooper@ti.com: Update commit message and use DCAN1 not DCAN2 for MCAN]
Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
omap_hsmmc driver uses "|" in a couple of places for disabling a bit.
While it's okay to use it in "mmc_reg_out" (since mmc_reg_out has a
_mask_ argument to take care of resetting a bit), it's incorrectly used
for resetting flags in "omap_hsmmc_send_cmd".
Fix it here by using "&= ~()" to reset a bit.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Instead of sending STOP TRANSMISSION command from MMC core, enable
the auto command feature so that the Host Controller issues CMD12
automatically when last block transfer is completed.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
The omap hsmmc host controller can have the ADMA2 feature. It brings better
read and write throughput.
On most SOC, the capability is read from the hl_hwinfo register. On OMAP3,
DMA support is compiled out.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Update the calculation for tWR and tPD. This improves the DDR refresh
interval and brings the initialization into line with the binary blobs
currently being supplied by Marvell.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
The RD_SAMPLE_DELAY field is 5 bits so it needs to be masked with 0x1f
instead of 0xf. Rather than checking the read sample delay for all DDR
chip selects use the values for the chip selects that are actually
configured. Finally continue searching for the max_phase value even if the
current read_sample is the same as the max_read_sample.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
The ternary operation had the HIGH/LOW values the
wrong way round. Update it to use the correct value.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
When using only a single DDR chip select only assert M_ODT[0] on write.
Do not assert it on read and do not assert M_ODT[1] at all. Also set
tODT_OFF_WR to 0x9 which contradicts the recommendation from the
functional spec but is what Marvell's binary training blob does and
seems to give better results when ODT is active during writes.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Even though in production uImage usually is quite small as
it contains just Linux kernel image during development it might
be pretty convenient to have root-FS built into the same image.
That makes uImage much larger but given on our dev platforms we have
quite a lot of DDR (> 512 MiB) we may afford loading huge uImages.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
This is useful to make sure no stale data exists in caches after bootloaders.
The worst thing could be some lines of cache were locked in a bootloader
for example during DDR recalibration and never unlocked. This may lead
to really unpredictable issues later down the line.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Update default AXI, TUN, ARC clock set options:
instead of changing only IDIV divider settings adjust also domain PLL
settings.
Add support of TUN_ROM and TUN_PWM clocks (subclocks of TUNN_PLL)
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
As HSDK is a development board it is better to hang on panic instead of
reset the board when panic occurs. That way we preserve a state of HW
for possibility to do post-mortem debug via JTAG.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
We'd like to keep IOC HW at the same state as t is right after reset when we
start Linux kernel so there will be no re-configuration of IOC on the go.
The point is U-Boot doesn't benefit a lot from IOC as it doesn't do a
lot of DMA operations especially on multiple cores simultaneously.
At the same time re-configuration of IOC in run-time might become quite
a tricky experience because we need to make sure there're no DMA
trannsactions in flight otherwise unexpected consequencses might affect
us much later and debugging those kinds of issues will be a real
nightmare.
That said let's make our life easier a little bit.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Previous SLC management implementation is broken. Seems like it was
never sufficiently tested probably because most of the time IOC was used
instead (i.e. no manual cache operations were done).
Now if we disable IOC in U-boot we'll get a lot of errors while using
DMA-enabled peripherals.
This time we fix it by substitution of broken per-line SLC operations
region operations as it is done in the Linux kernel (we took it from
v4.14 which is the latest stable as of today).
Among other things this implementation might be a bit faster because
instead of iteration over each and every cache line we're taking care
about entire region in one go.
Main changes:
* Replaced __slc_line_op (per line operations) by __slc_rgn_op
(region operations).
* Reworked __slc_entire_op to get rid of __after_slc_op and
__before_slc_op functions.
Note flush fix (flush only instead of flush-n-inv when OP_FLUSH is
used, see [1] for more details) is already incorporated here.
* Added SLC invalidation to invalidate_icache_all().
* Added (start >= end) check to invalidate_dcache_range() and
flush_dcache_range() as some buggy drivers pass region start == end.
* Added read-out of MMU BCR so we may know if PAE40 exists in HW and then
act on a particular AUX regs accordingly.
[1] http://lists.infradead.org/pipermail/linux-snps-arc/2018-January/003357.html
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Align the base address defined in header files with the base address used
in the DTS. This will facilitate the introduction of the DMA support.
Of all HSMMC users, only omap3 doesn't have the 0x100 reserved region at
the top. This region will be used to determine if the controller supports
DMA transfers
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
This reverts commit 46831c1a4c.
This reserved area at the beginning of struct hsmm, will be used later to
support ADMA
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Sata is equipped on ls1012a and can be a boot source. Add sata boot
support as an option if available.
Signed-off-by: Tang Yuantian <andy.tang@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Sata is equipped on ls1046a and can be a boot source. Add sata boot
support as an option if available.
Signed-off-by: Tang Yuantian <andy.tang@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Both the "qixis_reset" and esbc_validate" commands can only be used in
full U-Boot so do not build them in SPL. As part of this rework the
qixis code to declare things as static and make use of __weak for
function aliases.
Cc; York Sun <york.sun@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: York Sun <york.sun@nxp.com>
In some cases when "more" is told to page a given file it will prepend
the output with:
::::::::::::::
/PATH/TO/THE/FILE
::::::::::::::
And when this happens the output will not match the expected length.
Further, if we use a different pager we will instead fail the coverage
tests as we will not have 100% coverage. Update the help test to remove
the string in question.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
The number 4 is dedicated on i.MX7ULP, but lpi2c will be reused on i.MX8,
4 is not valid. The seq number could be configured by alias node.
The following patch will use i2c4 as the begin for i.MX7ULP.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
The system device-tree compiler may not be new enough to run the tests we
use in U-Boot (e.g. with binman). Allow use of a DTC environment variable
to point to the correct dtc. If not defined, the dtc on the default PATH
is used.
Signed-off-by: Simon Glass <sjg@chromium.org>
The DT spec demands a unit-address in a node name to match the "reg"
property in that node. Newer dtc versions will throw warnings if this is
not the case.
Remove the unit address from the config node name when U-Boot deals with
secure firmware FIT images.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
The DT spec demands a unit-address in a node name to match the "reg"
property in that node. Newer dtc versions will throw warnings if this is
not the case.
Correct the generated unit names when U-Boot's mkimage creates a FIT
image.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
The DT spec demands a unit-address in a node name to match the "reg"
property in that node. Newer dtc versions will throw warnings if this is
not the case.
Adjust the FIT build script for 64-bit Allwinner boards to remove the
bogus addresses from the node names and avoid the warnings.
This avoids a warning with recent versions of the dtc tool.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
The DT spec demands a unit-address in a node name to match the "reg"
property in that node. Newer dtc versions will throw warnings if this is
not the case.
Fix all occurences in the tree where node names were mentioned in
comments, to not give bad examples to the reader.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
The DT spec demands a unit-address in a node name to match the "reg"
property in that node. Newer dtc versions will throw warnings if this is
not the case.
Fix all occurences in various documentation files where this was not
observed, to not give bad examples to the reader.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
The DT spec demands a unit-address of a node name to match the "reg"
property in that node. Newer dtc versions will throw warnings if this is
not the case.
Fix all occurences in the FIT image example files where this was not
observed, to not give bad examples to the reader.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
The DT spec demands a unit-address in a node name to match the "reg"
property in that node. Newer dtc versions will throw warnings if this is
not the case.
Fix all occurences in the FIT image documentation files where this was not
observed, to not give bad examples to the reader.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Binman has 100% test coverage for the code as it is at present. To
encourage it to stay that way, run the code-coverage test as part of the
normal U-Boot tests.
This is RFC because it requires the Python code coverage tools to be
available.
Signed-off-by: Simon Glass <sjg@chromium.org>
If lk lights up display and populates simple-framebuffer node, it will
also setup a reserved-memory node (needed by simplefb on linux). But
it isn't clever enough to cope when the reserved-memory node is not
present.
Signed-off-by: Rob Clark <robdclark@gmail.com>
We dont need to keep copies of the properties that we are going to
fixup since we will be using the dtb provided by the firmware.
Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
Similar to CONFIG_OF_BOARD, but in this case the fdt is still built by
u-boot build. This allows the board to patch the fdt, etc.
In the specific case of dragonboard 410c, we pass the u-boot generated
fdt to the previous stage of bootloader (by embedding it in the
u-boot.img that is loaded by lk/aboot), which patches the fdt and passes
it back to u-boot.
Signed-off-by: Rob Clark <robdclark@gmail.com>
[trini: Update board_fdt_blob_setup #if check]
Signed-off-by: Tom Rini <trini@konsulko.com>
The firmware that runs before u-boot modifies u-boot's device tree
adding the local-mac-address and local-bd-address properties for the
compatibles "qcom,wcnss-bt" and "qcom,wcnss-wlan".
This commit reads that firmware, retrieves the properties and fixups
the device tree that is passed to the kernel before booting.
Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
This commit adds support for 96Boards Dragonboard820C.
The board is based on APQ8086 Qualcomm Soc, complying with the
96Boards specification.
Features
- 4x Kyro CPU (64 bit) up to 2.15GHz
- USB2.0
- USB3.0
- ISP
- Qualcomm Hexagon DSP
- SD 3.0 (UHS-I)
- UFS 2.0
- Qualcomm Adreno 530 GPU
- GPS
- BT 4.2
- Wi-Fi 2.4GHz, 5GHz (802.11ac)
- PCIe 2.0
- MIPI-CSI, MIPI-DSI
- I2S
U-Boot boots chained from LK (LK implements the fastboot protocol) in
64-bit mode.
For detailed build instructions see readme.txt in the board directory.
Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
In preparation to add support for the Dragonboard820c (APQ8096),
refactor the current Snapdragon clock driver.
No new functionality has been added.
Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
For example to store the environment in a file named "/uboot.env" in MMC
"0", where partition "1" contains the EXT4 filesystem, the following
configs should be added to the board's default config:
CONFIG_ENV_IS_IN_EXT4=y
CONFIG_ENV_EXT4_DEVICE_AND_PART="0:1"
CONFIG_ENV_EXT4_FILE="/uboot.env"
CONFIG_ENV_EXT4_INTERFACE="mmc"
Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
[trini: Fix some line over 80 chars issues]
Signed-off-by: Tom Rini <trini@konsulko.com>
QMAP value contains information about QSPI chip-selects. These bits
are used to display information of boot device in checkboard()
function.
QMAP value is stored in most significant 3-bits of 8-bit register
brdcfg[0] in Qixis, this patch corrects code to get QMAP bits using
below logic:
(brdcfg[0] >> 5) & 0x7
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Remove Board Arch print as its value is always constant '1' and does
not contain any important information to display during boot.
Add print to display Board FPGA version.
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
As part of chain of trust with confidentiality along with distro
boot, linux kernel image needs to be stored in encrypted form on
ext4 boot partition. So enable CONFIG_CMD_EXT4_WRITE in case of
Secure boot on ARM based platforms.
Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: York Sun <york.sun@nxp.com>
The SP805-WDT module on LS1088A requires configuration of PMU's
PCTBENR register to enable watchdog counter decrement and reset
signal generation. The watchdog clock needs to be enabled first.
Signed-off-by: Zhang Ying-22455 <ying.zhang22455@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Identify and distinguish between platform device type of MX7ULP
and LS1021A.
This is a fix to commit 7edf5c45("serial: lpuart: add i.MX7ULP
support").
Signed-off-by: Sriram Dash <sriram.dash@nxp.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
LS1012A-2G5RDB belongs to LS1012A family with features 2 2.5G SGMII
PFE MAC, SATA, USB 2.0/3.0, WiFi DDR, eMMC, QuadSPI, UART.
Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Align boards belonging to LS1012A, LS2080A SoC at one place.
Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
This adds SH_ETHER to drivers/net/Kconfig and convert to Kconfig.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
When we using network on board using sh-eth, it prints a lot of
"CACHE: Misaligned operation at range" messages.
This commit fixes this problem.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
This changes Change structure used in sh_eth_read and sh_eth_write function
from struct sh_eth_dev to struct sh_eth_info. This is necessary to convert
to Driver Model.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
bd_t is not used in sh_eth_config(). This deletes bd_t from sh_eth_config()
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
This fixes the chord style checked by checkpatch.pl.
Details of change details are as follows:
- Fix typo
Change from alligned to aligned.
- Remove whitespace before ','
- Add spaces preferred around that '|'
- Fix missing a blank line after declarations
- Remove space after a cast declaration
- Fix format of block comments
- Add a blank line after function/struct/union/enum declarations
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
This change allows the "MAY_FAIL" DHCP option to still attempt to
contact a DHCP server on each adapter and only give up once each
adapter has failed once. To get the existing behavior, set the
already-existing ethrotate=no variable.
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Cc: Keng Soon Cheah <keng.soon.cheah@ni.com>
Cc: Chen Yee Chew <chen.yee.chew@ni.com>
Enable CONFIG_B53_SWITCH, define the CPU/management port number (8) and
enable all 5 ports of the switch to be usable.
Reviewed-by: Stefan Roese <sr@denx.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Add a b53_reg read/write command which allows inspecting the switch
registers. Because the Broadcom BCM53xx registers have different sizes,
we need to split the accesses in 8, 16, 32, 48 or 64 bits to obtain
expected results.
Reviewed-by: Stefan Roese <sr@denx.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Make sure that we pad small packets to a minimum length of 60 bytes
(without FCS). This is necessary to interface with Ethernet switches
that will reject RUNT frames unless padded correctly.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Add a minimalistic Broadcom BCM53xx (roboswitch) switch driver similar
to the Marvell MV88E617x. This takes care of configuring the minimum
amount out of the switch hardware such that each user visible port
(configurable) and the CPU port can forward packets between each other
while preserving isolation with other ports.
This is useful for e.g: the Lamobo R1 board featuring a Broadcom
BCM53125 switch.
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
This implementation manages several clocks, disable and
free all of them in case of error during probe and in remove
callback.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
This patch fixes a problem in the mvneta driver where if more than
one packet arrives between calls to mvneta_recv(), the additional
descriptors will be marked as free even though only one descriptor
has been read and processed from the receive queue. This causes
the additional packet(s) to be delayed until the next packet arrives.
>From this point on all packets will be delayed because the receive
queue will contain unprocessed packets but the hardware shows no
busy descriptors.
Signed-off-by: Jason Brown <jason.brown@apcon.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Since the return value is a signed int, if the leading MSB of rdreg is a 1,
it will get signed extended and will return a negative value which is an
error even though we read the correct value.
Fixes: dfcc496ed7 ("net: mii: Changes not made by spatch")
Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Acked-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
First, this table could never be included in the build anyway because
SH_ETH_TYPE_RZ is not defined until later in the file.
Second, the register PIR was missing, so PHY MDIO never worked.
Third, after adding the PIR register, the table is EXACTLY the same as
sh_eth_offset_gigabit, so there is no value to it.
Therefore, just delete it use the gigabit one.
Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Acked-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
The macros inl and outl maybe already be defined from file
arch/arm/include/asm/io.h so there may be no reason to define them.
And if you do try defined them here, you get a redefined complier warning.
Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Acked-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
This commit allows extended Marvell registers to be read with:
foo > mdio rx FEC 3.10
Reading from bus FEC
PHY at address 0:
3.16 - 0x1063
foo > mdio wx FEC 3.10 0x1011
The above code changes the way ETH connector LEDs blink.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: York Sun <york.sun@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Although Xilinx Zynq SoC was using MACB similar hardware. However,
U-boot MACB driver was not supporting Xilinx Zynq SoC. This patch is
to add support for the Xilinx Zynq SoC to the existing MACB network
driver.
This patch is to add Zynq GEM DMA Config, provide callback
function for different linkspeed for case of using Xilinx Zynq
Programmable Logic as GMII to RGMII converter.
This patch convert the return value to use error codes.
Signed-off-by: Wilson Lee <wilson.lee@ni.com>
Cc: Chen Yee Chew <chen.yee.chew@ni.com>
Cc: Keng Soon Cheah <keng.soon.cheah@ni.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Wenyou Yang <wenyou.yang@atmel.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
The hab_rvt_failsafe() callback according to the HABv4 documentation:
"This function provides a safe path when image authentication has failed
and all possible boot paths have been exhausted. It is intended for use by
post-ROM boot stage components, via the ROM Vector Table."
Once invoked the part will drop down to its BootROM USB recovery mode.
Should it be the case that the part is in secure boot mode - only an
appropriately signed binary will be accepted by the ROM and subsequently
executed.
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Sven Ebenfeld <sven.ebenfeld@gmail.com>
Cc: George McCollister <george.mccollister@gmail.com>
Cc: Breno Matheus Lima <brenomatheus@gmail.com>
Tested-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
The BootROM will not successfully process a HAB image passed by u-boot
unless the board has been set into locked mode. Some of the existing usages
of authenticate_image() expect and rely on unlocked boards doing the
following
1. Not calling into the BootROM authenticate_image() callback
2. Returning a pass status for authenticate_image() calls anyway
A previous patch removed the necessity to call into imx_hab_is_enabled()
twice. This patch ensures the reliance on authenticate_image() returning
zero is maintained.
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Suggested-by: Breno Matheus Lima <brenomatheus@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Sven Ebenfeld <sven.ebenfeld@gmail.com>
Cc: George McCollister <george.mccollister@gmail.com>
Tested-by: Breno Lima <breno.lima@nxp.com>
The hab_rvt_check_target() callback according to the HABv4 documentation:
"This function reports whether or not a given target region is allowed for
either peripheral configuration or image loading in memory. It is intended
for use by post-ROM boot stage components, via the ROM Vector Table, in
order to avoid configuring security-sensitive peripherals, or loading
images over sensitive memory regions or outside recognized memory devices
in the address map."
It is a useful function to support as a precursor to calling into
authenticate_image() to validate the target memory region is good.
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Sven Ebenfeld <sven.ebenfeld@gmail.com>
Cc: George McCollister <george.mccollister@gmail.com>
Cc: Breno Matheus Lima <brenomatheus@gmail.com>
Tested-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
The various i.MX BootROMs containing the High Assurance Boot (HAB) block
rely on a data structure called the Image Vector Table (IVT) to describe to
the BootROM where to locate various data-structures used by HAB during
authentication.
This patch adds a definition of the IVT header for use in later patches,
where we will break the current incorrect dependence on fixed offsets in
favour of an IVT described parsing of incoming binaries.
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Sven Ebenfeld <sven.ebenfeld@gmail.com>
Cc: George McCollister <george.mccollister@gmail.com>
Cc: Breno Matheus Lima <brenomatheus@gmail.com>
Tested-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
u-boot command "hab_auth_img" tells a user that it takes
- addr - image hex address
- offset - hex offset of IVT in the image
but in fact the callback hab_auth_img makes to authenticate_image treats
the second 'offset' parameter as an image length.
Furthermore existing code requires the IVT header to be appended to the end
of the image which is not actually a requirement of HABv4.
This patch fixes this situation by
1: Adding a new parameter to hab_auth_img
- addr : image hex address
- length : total length of the image
- offset : offset of IVT from addr
2: Updates the existing call into authenticate_image() in
arch/arm/mach-imx/spl.c:jump_to_image_no_args() to pass
addr, length and IVT offset respectively.
This allows then hab_auth_img to actually operate the way it was specified
in the help text and should still allow existing code to work.
It has the added advantage that the IVT header doesn't have to be appended
to an image given to HAB - it can be prepended for example.
Note prepending the IVT is what u-boot will do when making an IVT for the
BootROM. It should be possible for u-boot properly authenticate images
made by mkimage via HAB.
This patch is the first step in making that happen subsequent patches will
focus on removing hard-coded offsets to the IVT, which again is not
mandated to live at the end of a .imx image.
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Sven Ebenfeld <sven.ebenfeld@gmail.com>
Cc: George McCollister <george.mccollister@gmail.com>
Cc: Breno Matheus Lima <brenomatheus@gmail.com>
Tested-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
authenticate_image returns 1 for success and 0 for failure. That result
code is mapped directly to the result code for the command line function
hab_auth_img - which means when hab_auth_img succeeds it is returning
CMD_RET_FAILURE (1) instead of CMD_RET_SUCCESS (0).
This patch fixes this behaviour by making authenticate_image() return 0 for
success and 1 for failure. Both users of authenticate_image() as a result
have some minimal churn. The upshot is once done when hab_auth_img is
called from the command line we set $? in the standard way for scripting
functions to act on.
Fixes: 36c1ca4d46 ("imx: Support i.MX6 High Assurance Boot
authentication")
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Sven Ebenfeld <sven.ebenfeld@gmail.com>
Cc: George McCollister <george.mccollister@gmail.com>
Cc: Breno Matheus Lima <brenomatheus@gmail.com>
Tested-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Both usages of authenticate_image treat the result code as a simple binary.
The command line usage of authenticate_image directly returns the result
code of authenticate_image as a success/failure code.
Right now when calling hab_auth_img and test the result code in a shell a
passing hab_auth_img will appear to the shell as a fail.
The first step in fixing this behaviour is to fix-up the result code return
by authenticate_image() itself, subsequent patches fix the interpretation
of authenticate_image so that zero will return CMD_RET_SUCCESS and non-zero
will return CMD_RET_FAILURE.
The first step is fixing the return type in authenticate_image() so do that
now.
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Sven Ebenfeld <sven.ebenfeld@gmail.com>
Cc: George McCollister <george.mccollister@gmail.com>
Cc: Breno Matheus Lima <brenomatheus@gmail.com>
Tested-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
With CONFIG_SYS_INIT_SP_BSS_OFFSET enabled, the initial (pre-relocation)
stack is placed some distance after bss_start. The control DTB is appended
to the U-Boot binary at bss_start. If the DTB is too large, or the SP BSS
offset too small, then the initial stack could corrupt the DTB. Enhance
the Makefile to check whether this is likely to occur.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Request that all environment variables containing hard-coded address be
calculated at boot time instead.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
In the presence of potentially fragemented memory, we cannot hard-code
addresses into environment variables such as kernel_addr_r. Instead, we
must calculate those addresses at run-time based on available memory
locations. Implement the code to perform such runtime calculation, based
on requirements described in environment variables, to allow the user
full control over the allocation.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Tegra186 currently restricts its DRAM usage to entries in the /memory node
in the DTB passed to it. However, the MMU configuration always maps the
entire first 2GB of RAM. This could allow the CPU to speculatively access
RAM that isn't part of the in-use banks. This patch switches to runtime
construction of the table that's used to construct the MMU translation
tables, and thus prevents access to RAM that's not part of a valid bank.
Note: This patch is intended to prevent access to RAM regions which U-Boot
does not need to access, with the primary purpose of avoiding theoretical
speculative access to physical regions for which the HW will throw errors
(e.g. carve-outs that the CPU has no permission to access at a bus level,
bad ECC pages, etc.). In particular, this patch is not deliberately
related to the speculation-related security issues that were recently
announced. The apparent similarity is a coincidence.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
On this platform, there may be up to 1024 unusable chunks of memory.
Increase CONFIG_NR_DRAM_BANKS so that U-Boot can remember all the banks
required to represent such fragmented memory.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
In the future, the list of DRAM regions passed to U-Boot in the DTB may
be quite long and fragmented. Due to this, U-Boot must search through the
regions to find the best region to relocate into, rather than relying on
the current assumption that the top of bank 0 is a reasonable relocation
target. This change implements such searching.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
arch_lmb_reserve() currently assumes that the stack pointer is within DRAM
bank 0. This is not necessarily true. Enhance the code to search through
DRAM banks until the bank that does contain SP is found, and then reserve
the tail of that bank.
Fixes: 2d1916e48b ("ARM: add flat device tree support")
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Apply a few small fixes for the DTB /memory node parsing from NVIDIA's
downstream U-Boot:
- Allow arbitrary number of DRAM banks.
- Correctly calculate the number of DRAM banks.
- Clip PCIe memory in the same way as U-Boot CPU memory use.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Enable CONFIG_LINUX_KERNEL_IMAGE_HEADER for all 64-bit Tegra boards.
cboot (the boot SW that runs before U-Boot) will eventually use this
information.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Allow placing a Linux kernel image header at the start of the U-Boot
binary. This is useful since the image header reports the amount of memory
(BSS and similar) that U-Boot needs to use, but that isn't part of the
binary size. This can be used by the code that loads U-Boot into memory to
determine where to load U-Boot, based on other users of memory.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Enable CONFIG_SYS_INIT_SP_BSS_OFFSET for all 64-bit Tegra boards. Place
the stack/... 512KiB from the end of the U-Boot binary. This should be
plenty to accommodate the current DTBs (max 64 KiB), early malloc region
(6KiB), stack usage, and plenty of slack, while still not placing it too
far away from the U-Boot binary.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
U-Boot typically uses a hard-coded value for the stack pointer before
relocation. Implement option SYS_INIT_SP_BSS_OFFSET to instead calculate
the initial SP at run-time. This is useful to avoid hard-coding addresses
into U-Boot, so that can be loaded and executed at arbitrary addresses and
thus avoid using arbitrary addresses at runtime. This option's value is
the offset added to &_bss_start in order to calculate the stack pointer.
This offset should be large enough so that the early malloc region, global
data (gd), and early stack usage do not overlap any appended DTB.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
No 64-bit Tegra uses SPL. Remove various unused definitions from config
headers.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
64-bit Tegra don't use SPL, and soon won't define CONFIG_SPL_TEXT_BASE
when building. Fix the binman .dts file so that it doesn't use undefined
values.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Current USDHC driver will reset VSELECT to 0 (3.3v) during mmc init,
then set to 1 for 1.8v eMMC I/O. When booting from eMMC, since ROM has
already set VSELECT to 1.8v before running the u-boot. This reset in
USDHC driver causes a short 2.2v pulse on CMD pin.
Fix this issue by not reset VSELECT to 0 when 1.8v flag is set.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
In order to discard this code when unused in SPL we need to guard the
command with a check for CONFIG_SPL_BUILD and we rearrange the code
slightly to make this cleaner.
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Some distributions like Fedora expect U-Boot to select a proper
devicetree. Since there are several variants of the cm-fx6 module
featuring different SoC variants and the module can be paired with
several baseboards, it is not viable to hardcode a filename.
Instead, follow the lead of other i.MX6 based devices and try to
determine the devicetree to use with the help of the board name
and the SoC variant exported by the board code, before calling the
distro bootcommand.
For now, only for the Utilite Pro a proper devicetree filename is
known but further variants of the Utilite Computer or other devices
based on the cm-fx6 module may be added in the future.
Signed-off-by: Christopher Spinrath <christopher.spinrath@rwth-aachen.de>
Like many other i.MX6 based boards, there are multiple variants of
the cm-fx6 module featuring different SoC variants. Furthermore, the
module can be paired with multiple baseboards.
At the same time modern distribution like Fedora require U-Boot to
select a proper devicetree which depends on the SoC variant and the
baseboard.
Thus, export the SoC variant and the actual board to the environment
following the conventions of other i.MX6 devices (e.g. the NXP boards)
such that the environment can select a devicetree file to load.
For now, we only know for sure that the cm-fx6 module and the SB-fx6m
baseboard amount to a Utilite Computer variant (depending on the SoC).
Further combinations may be added in the future; e.g. CompuLab's
evaluation board once someone can verify the identification string
stored in its eeprom.
Signed-off-by: Christopher Spinrath <christopher.spinrath@rwth-aachen.de>
Reviewed-by: Stefano Babic <sbabic@denx.de>
By default, the subordinate is set equally to the secondary bus (1) when
the RC boots, and does not alter afterwards.
This means that theoretically, the highest bus reachable downstream is
bus 1.
Force the PCIe RC subordinate to 0xff, otherwise no downstream
devices will be detected behind bus 1 if the booting OS does not allow
enumerating a higher busnr than the subordinate value of the primary
bus.
Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
Currently mmdc_do_dqs_calibration() and mmdc_do_write_level_calibration()
show the same error message, which is confusing for debugging.
Disambiguate the mmdc_do_dqs_calibration() error message.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
mx6sabresd board uses the following pins for console:
PAD_CSI0_DAT10__UART1_TX_DATA
PAD_CSI0_DAT11__UART1_RX_DATA
,so put it in the same config option as wandboard.
mx6sabreauto board uses the following pins for console:
PAD_KEY_COL0__UART4_TX_DATA
PAD_KEY_ROW0__UART4_RX_DATA
So do not mention sabreauto board as part of the UART1_SD3_DAT6_7 option.
The config option for sabreauto can be added later when needed.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
The "clocks" and "bootaux" commands are only usable in full U-Boot, not
SPL, so do not link them inside of SPL. Rework a little of the bootaux
related code to make use of __weak and declare parts of it static as
it's local to the file.
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
To support QSPI DM driver
- Add spi0 alias for qspi node. Which is used for bus number 0.
- Modify the n25q256a@0 compatible property to "spi-flash".
- Modify spi4 (gpio_spi) node to spi5
- Define DM SPI/QSPI related config to enable QSPI
Signed-off-by: Peng Fan <peng.fan@nxp.com>
The QSPI module on i.MX7D is modified from i.MX6SX. The module used on
i.MX6UL/6ULL is reused from i.MX7D. They share same tx buffer size.
The endianness is not set at qspi driver initialization. So if we don't
boot from QSPI, we will get wrong endianness when accessing from AHB
address directly.
Add the compatible entry for 6ul/7d.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
i.MX6ULL also does not have a MMDC_P1_BASE_ADDR, so do not try to
access it.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Stefano Babic <ssbabic@denx.de>
The u-boot-dtb.imx size is about 519KB, so 8 * 64KB conflicts
with u-boot-dtb.imx. Enlarge the offset to 14 * 64KB to fix it.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Because kernel set WDOG_B mux before pad with the common pinctrl
framwork now and wdog reset will be triggered once set WDOG_B mux
with default pad setting, we set pad setting here to workaround this.
Since imx_iomux_v3_setup_pad also set mux before pad setting, we set
as GPIO mux firstly here to workaround it.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Enable I2C/MMC/GPIO/REGUALTOR/PMIC/USB DM drivers.
There are some dependency, such as when DM MMC enabled, USB compile error.
Also the i.MX I2C MMC DM driver does not support legacy GPIO interface.
So enable them all together.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
On i.MX7ULP, the fuse words (except bank 0 and 1) only supports to
write once, because they use ECC mode. Multiple writes may damage
the ECC value and cause a wrong fuse value decoded when reading.
This patch adds a checking before the fuse word programming, only
can write when the word value is 0.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Add documents to describe NX25 and AE250.
Also update other documents for RISC-V.
Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Signed-off-by: Greentime Hu <green.hu@gmail.com>
Add prelink-riscv to arrange .rela.dyn and .rela.got
in compile time. So that u-boot can be directly
executed without fixup.
Signed-off-by: Chih-Mao Chen <cmchen@andestech.com>
Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Signed-off-by: Greentime Hu <green.hu@gmail.com>
Add header files for RISC-V.
Cache, ptregs, data type and other definitions are included.
Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Signed-off-by: Greentime Hu <green.hu@gmail.com>
AE250 is the Soc using NX25 cpu core base on RISC-V arch.
Details please see the doc/README.ae250.
Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Signed-off-by: Greentime Hu <green.hu@gmail.com>
Add Andes nx25 cpu core (called AndesStar V5) to support RISC-V arch
Verifications:
1. startup and relocation ok.
2. boot from rom or ram both ok.
2. timer driver ok.
3. uart driver ok
4. mmc driver ok
5. spi driver ok.
6. 32/64 bit both ok.
Detail verification message please see doc/README.ae250.
Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Signed-off-by: Greentime Hu <green.hu@gmail.com>
Cc: Padmarao Begari <Padmarao.Begari@microsemi.com>
hc_wp_grp_size is needed only if hardware partitionning is used.
On ARM removing it saves about 30 bytes of code space.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
This information is only used by the "mmc info" command.
On ARM removing this information from SPL saves about 140 of code space.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Also remove erase_grp_size and write_bl_len from struct mmc as they are
not used anymore. On ARM, removing them saves about 100 bytes of code
space in SPL.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
The content of ssr is useful only for erase operations.
on ARM, removing sd_read_ssr() saves around 300 bytes.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
This allows using CONFIG_IS_ENABLED(MMC_WRITE) to compile out code
needed only if write support is required.
The option is added for u-boot and for SPL
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
struct mmc_data contains the block size to use for the data transfer.
Use this information instead of using the default value or the block length
information stored in struct mmc.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
The am335x_hs_evm runs into size constraint problems at times with
various toolchains as changes come in due to the config have a large
number of options in SPL (to showcase what is possible) while also
having rather constrained binary limits. Gain some of this room back by
lowering the loglevel, disabling HW partition support and switching over
to the tiny FIT image support.
Cc: Andrew F. Davis <afd@ti.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
---
I'd really appreciate a run-time test of this patch if at all possible
as I'm a little worried about TINY_FIT being incompatible with all of
the security options. Thanks!
The SDcard initialization procedure does a few more things than it did earlier:
* switch the bus width even for 1-bit bus width
* check that speed has been properly set (in resp[4] of SD_CMD_SWITCH_FUNC)
Update the SD simulator to handle those requests gracefully.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
The changes in the MMC stack have increased its footprint up to the point
were its breaks the generation of the SPL for this platform.
Fix this by reducing the loglevel.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Peter Howard <phoward@gme.net.au>
builds are broken because the size of the binary exceeds the limit.
Make some space by removing support for hardware partitioning as those
boards don't have any eMMC.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Not all boards have an eMMC and not all users have a need for this.
Allow to compile it out. By default it is still included.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Supporting USH and HS200 increases the code size as it brings in IO voltage
control, tuning and fatter data structures.
Use Kconfig configuration to select which of those features should be
built in.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
This allows to compile out the log message by tweaking the LOGLEVEL.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Not using this function reduces the size of the binary. It's replaces by
a standard malloc() and the alignment requirement is handled by an
intermediate buffer on the stack.
Also make sure that the allocated buffer is freed in case of error.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
The ext_csd is allocated only for MMC above version 4. The compare will
crash or fail for older MMCs.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Make sure that those basic capabilities are advertised by the host.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
As the legacy modes were not added to the list of supported modes, old
cards that do not support other modes could not be used.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
* convert to livetree API
* don't fail because of an invalid bus-width, instead default to 1-bit.
* recognize 1.2v DDR and 1.2v HS200 flags
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
This is a useful information while debugging the initialization process or
performance issues.
Also dump this information with the other mmc info if the verbose option
is selected
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Add a new function to parse host controller dt node and
set mmc_config. This function can be used by mmc controller
drivers to set the generic mmc_config.
This function can be extended to set other UHS mode caps
once UHS mode support is added.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
HS200/SDR104 requires tuning command to be sent to the card.
Add a simple function to send tuning command and to read and
compare the received data with the tuning block pattern.
This function can be used by platform driver to perform DLL
tuning.
This patch is similar to
commit 996903de92f0 ("mmc: core: add core-level function for
sending tuning commands") added in linux kernel.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
HS200 only supports 1.2v and 1.8v signal voltages. DDR52 supports 3.3v/1.8v
or 1.2v signal voltages.
Select the lowest voltage available when using those modes.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
With certain SD cards like Kingston 8GB/16GB UHS card, it is seen that
MMC_CMD_ALL_SEND_CID cmd fails on first attempt, but succeeds
subsequently. Therefore, retry MMC_CMD_ALL_SEND_CID cmd a few time
as done in Linux kernel.
Similarly, it is seen that MMC_CMD_SET_BLOCKLEN may fail on first
attempt, therefore retry this cmd a few times as done in kernel.
To make it clear that those are optionnal workarounds, a new Kconfig
option 'MMC_QUIRKS' is added (enabled by default).
Signed-off-by: Vignesh R <vigneshr@ti.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Boot partitions do not support HS200. Changing to a lower performance mode
is required to access them.
mmc_select_mode_and_width() and sd_select_mode_and_width() are modified to
make it easier to call them outside of the initialization context.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
If a power cycle cannot be done on Vcc, it is safer not to try the UHS
modes because we wouldn't be able to recover from an error occurring
during the UHS initialization.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Add UHS modes to the list of supported modes, get the UHS capabilites of
the SDcard and implement the procedure to switch the voltage (UHS modes
use 1v8 IO lines)
During the voltage switch procedure, DAT0 is used by the card to signal
when it's ready. The optional card_busy() callback can be used to get this
information from the host driver.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add HS200 to the list of supported modes and introduce tuning in the MMC
startup process.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tuning is a mandatory step in the initialization of SDR104 and HS200 modes.
This callback execute the tuning process.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
There is no point in having the mmc clock enabled during
power off. Disable the mmc clock. This is similar to how it's
programmed in Linux Kernel.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Vignesh R <vigneshr@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
mmc clock has to be disabled in certain cases like during
the voltage switch sequence. Modify mmc_set_clock function
to take disable as an argument that signifies if the
clock has to be enabled or disabled.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
mmc/sd specification requires vdd to be disabled for 1 ms
and then enabled again during power cycle. Add a
function in mmc core to perform power cycle and set
the io signal to it's initial state.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Add a new callback function *send_init_stream* which start a sequence of
at least 74 clock cycles.
The mmc core uses *mmc_send_init_stream* in order to invoke the callback
function. This will be used during power cycle where the specification
requires such a sequence after power up.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Add a new function *mmc_set_signal_voltage* in mmc core
which can be used during mmc initialization to select the
signal voltage. Platform driver should use the set_ios
callback function to select the signal voltage.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
set_ios callback has a return value of 'int' but the mmc_set_ios()
function ignore this. Modify mmc_set_ios() and the callers of mmc_set_ios() to
to return the error status.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The MMC startup process currently handles 4 modes. To make it easier to
add support for more modes, let's make the process more generic and use a
list of the modes to try.
The major functional change is that when a mode fails we try the next one.
Not all modes are tried, only those supported by the card and the host.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The SDcard startup process currently handles only 2 modes. To make it
easier to add support for more modes, let's make the process more generic
and use a list of the modes to try.
The major functional change is that when a mode fails we try the next one.
Not all modes are tried, only those supported by the card and the host.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Display the mode name when the user execute 'mmc info'. Also instead of
displaying tran_speed, display the actual bus speed.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This adds a simple helper function to display information (bus width and
mode) based on a capability mask. Useful for debug.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
no functionnal changes.
In order to add the support for the high speed SD and MMC modes, it is
useful to track this information.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This will be reused later in the selection of high speed and ddr modes.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The ext csd is used for comparison many times. Keep a reference content
of the ext csd in the struct mmc to avoid reading multiple times
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
no functionnal change. This is only to further reduce the size o
mmc_startup().
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
No functionnal change here. The function is really big and can be split.
The part related to bus configuration are put in 2 separate functions: one
for MMC and one for SD.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Get a reference to the regulator devices from the dts and store them
in the struct mmc for later use.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
data is defined as struct mmc_data *data.
So it should not be compared to 0.
Problem identified with Coccinelle.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Fixes emmc initialization regression on the db410c platform.
Clearing this register while SDHCI_PRESENT_STATE reports
SDHCI_CMD_INHIBIT leads to undefined behaviour on the db410c.
When commit 7dde50 was merged (mmc: sdhci: Wait for SDHCI_INT_DATA_END
when transferring), SDHCI transfers transitioned to wait for bit
SDHCI_INT_DATA_END before flagging transfers done.
Without this patch, the db410 platform fails to initialize its eMMC
due to all of its transfers timing out (SDHCI_INT_DATA_END is never
raised after all the blocks have been transferred).
Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
This patch fixes some warnings when building boards that do not define
DM_I2C_COMPAT i.e. boards that entirely rely on the new i2c layer.
Signed-off-by: Felix Brack <fb@ltec.ch>
priv pointer should be freed before returning with an error value
from exynos_dwmci_get_config().
Signed-off-by: Suniel Mahesh <sunil.m@techveda.org>
Signed-off-by: Raghu Bharadwaj <raghu@techveda.org>
__be32_to_cpu() accepts argument of type __be32. This patch changes
type of the buffer in ALLOC_CACHE_ALIGN_BUFFER macro to __be32, which
is then passed to __be32_to_cpu().
This prevents sparse build warnings.
drivers/mmc/mmc.c: warning: cast to restricted __be32
Signed-off-by: Suniel Mahesh <sunil.m@techveda.org>
Signed-off-by: Karthik Tummala <karthik@techveda.org>
The clock selection is done now from the am335x-fb code, so there is no
more need doing this in the board code.
Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Actual am335x-fb implementation takes now a real clock frequency instead
a divider. So this component doesn't need to know anymore some base
frequency of the LCDC, we simply provide the pixel-clock frequency.
Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
The LCDC IP-core an be feed from several clock sources, one of those is
a dedicated DPLL for generating a dividable base-clock for this IP-core.
The TRM specifies the maximum input frequency for the LCCD with 200 MHz,
so we must not exceed this value with the PLL frequency (which can lock
much higher).
This patch tries every combination of multipliers and divisors of the
PLL and the IP-core itself for getting as near as possible the the
requested panel->pxl_clk.
Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Using changes in this patch we were able to reduce approx 8k
size of u-boot-spl.bin image. Following is breif description of
changes to reduce SPL size:
1. Changes in board/freescale/ls1088a/Makefile to remove
compilation of eth.c and cpld.c in case of SPL build.
2. Changes in board/freescale/ls1088a/ls1088a.c to keep
board_early_init_f funcations in case of SPL build.
3. Changes in ls1088a_common.h & ls1088ardb.h to remove driver
specific macros due to which static data was being compiled in
case of SPL build.
Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Compile-off mp.c and libfdt.c in case of SPL build. SPL size reduces
by approx 2k.
Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Remove duplicate macro CONFIG_FSL_PCIE_RESET and update its comment.
It enables PCIe reset to fix link width 2x - 4x.
Signed-off-by: Bao Xiaowei <xiaowei.bao@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
855873: An eviction might overtake a cache clean operation
Workaround: The erratum can be avoided by upgrading cache clean by
address operations to cache clean and invalidate operations. For
Cortex-A53 r0p3 and later release, this can be achieved by setting
CPUACTLR.ENDCCASCI to 1.
This patch is to implement the workaround for this erratum.
Signed-off-by: Alison Wang <alison.wang@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
The CONFIG_SYS_DPAA_QBMAN define is used by DPAA1 freescale SOCs to
add device tree fixups that allow deep sleep in Linux. The define was
placed in header files included by a number of boards, but was not
explicitly documented in any of the Kconfigs. A description was added
to the drivers/networking menuconfig and default selection for
current SOCs that have this part
Signed-off-by: Ahmed Mansour <ahmed.mansour@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
This patch adds changes necessary to move functionality present in
PowerPC folders with ARM architectures that have DPAA1 QBMan hardware
- Create new board/freescale/common/fsl_portals.c to house shared
device tree fixups for DPAA1 devices with ARM and PowerPC cores
- Add new header file to top includes directory to allow files in
both architectures to grab the function prototypes
- Port inhibit_portals() from PowerPC to ARM. This function is used in
setup to disable interrupts on all QMan and BMan portals. It is
needed because the interrupts are enabled by default for all portals
including unused/uninitialised portals. When the kernel attempts to
go to deep sleep the unused portals prevent it from doing so
Signed-off-by: Ahmed Mansour <ahmed.mansour@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Sata registers PP2C and PP3C are used to control the configuration
of the PHY control OOB timing for the COMINIT/COMWAKE parameters
respectively. Calculate those parameters from port clock frequency.
Overwrite those registers with calculated values to get better OOB
timing.
Signed-off-by: Tang Yuantian <andy.tang@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Given gcc-6.1 and later we can now safely have strings discarded when
the functions are unused. This lets us drop certain cases of not
building something so that we don't have the strings brought in when the
code was discarded. Simplify the code now by dropping guards we don't
need now.
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Chander Kashyap <k.chander@samsung.com>
Cc: Thomas Abraham <thomas.ab@samsung.com>
Cc: Vipin Kumar <vipin.kumar@st.com>
Cc: Wenyou Yang <wenyou.yang@microchip.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
commit 21a24c3bf3 ("fs/fat: fix case for FAT shortnames") made it
possible that get_name() returns file names with some upper cases.
find_directory_entry() must be updated to take this account, and use
case-insensitive functions to compare file names.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
The following config symbols are only defined once and never referenced
anywhere else:
CONFIG_AP325RXA
CONFIG_AP_SH4A_4A
CONFIG_CPU_SH_TYPE_R
CONFIG_ECOVEC
CONFIG_ESPT
CONFIG_MIGO_R
CONFIG_MPR2
CONFIG_MS7720SE
CONFIG_MS7722SE
CONFIG_MS7750SE
CONFIG_R0P7734
CONFIG_R2DPLUS
CONFIG_RSK7203
CONFIG_RSK7264
CONFIG_RSK7269
CONFIG_SH7752EVB
CONFIG_SH7753EVB
CONFIG_SH7757LCR
CONFIG_SH7763RDP
CONFIG_SH7785LCR
Most of them are config symbols named after the respective boards which
seems to have been a standard practice at some point.
Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
These macros are all defined once and never checked or used anywhere:
CONFIG_MACH_ASPENITE
CONFIG_MACH_DAVINCI_CALIMAIN
CONFIG_MACH_DOCKSTAR
CONFIG_MACH_EDMINIV2
CONFIG_MACH_GOFLEXHOME
CONFIG_MACH_GONI
CONFIG_MACH_GURUPLUG
CONFIG_MACH_KM_KIRKWOOD
CONFIG_MACH_OPENRD_BASE
CONFIG_MACH_SHEEVAPLUG
Almost all of them were only used for the mach_is_foo() logic in
arch/arm/asm/mach-types.h that were dropped in
commit f9dadaef8b ("arm: Re-sync asm/mach-types.h with
Linux Kernel v4.9")
Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
Configure AM57xx EVMs for the exact PHY part that is
present on the various boards. This makes U-Boot apply
configurations needed for this PHY like centering the
FLP timing.
For configurations to take effect, DM_ETH needs to be
enabled. Do that too.
Tested on BeagleBoard x15 and AM571x IDK.
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
The 't208xrdb t4qds t102*' job is close to the time limit and
sometimes fails, so this splits it into 3 separate jobs.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Last user of this option went away in 2015 in commit:
d928664f41 ("powerpc: 74xx_7xx: remove 74xx_7xx cpu support")
Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
BCM2835 ARM Peripherals doc shows gpio pins 4, 5, 6, 12 and 13 carry altenate
function, ALT5 for ARM JTAG
Signed-off-by: Henry Zhang <henryzhang62@yahoo.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add DT nodes to enable ARM_PL180_MMCI IP support for STM32F746
and STM32F769 discovery boards
There is a hardware issue on these boards, it misses a pullup on the GPIO line
used as card detect to allow correct SD card detection.
As workaround, cd-gpios property is not present in DT.
So SD card is always considered present in the slot.
Signed-off-by: Christophe Priouzeau <christophe.priouzeau@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This board offers :
_ STM32F469NIH6 microcontroller featuring 2 Mbytes of Flash memory
and 324 Kbytes of RAM in BGA216 package
_ On-board ST-LINK/V2-1 SWD debugger, supporting USB reenumeration capability:
_ Mbed-enabled (mbed.org)
_ USB functions: USB virtual COM port, mass storage, debug port
_ 4 inches 800x480 pixel TFT color LCD with MIPI DSI interface and capacitive
touch screen
_ SAI Audio DAC, with a stereo headphone output jack
_ 3 MEMS microphones
_ MicroSD card connector
_ I2C extension connector
_ 4Mx32bit SDRAM
_ 128-Mbit Quad-SPI NOR Flash
_ Reset and wake-up buttons
_ 4 color user LEDs
_ USB OTG FS with Micro-AB connector
_ Three power supply options:
_ Expansion connectors and Arduino™ UNO V3 connectors
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
This DT file comes from kernel v4.15-rc1
stm32f469-pinctrl.dtsi header has been updated with correct
STMicroelectronics Copyright.
Remove the paragraph about writing to the Free Software
Foundation's mailing address as requested by checkpatch.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
This allows to controls the memory internal mapping at
address 0x0000 0000.
We can either map at 0x0000 0000 :
_ main flash memory
_ system flash memory
_ FMC bank1 (NOR/PSRAM 1 and 2)
_ embedded SRAM
_ FMC/SDRAM bank1
This is needed for future STM32F469-disco board
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Use available DM stm32f7_gpio.c and pinctrl_stm32.c drivers
instead of board GPIO initialization.
Remove stm32_gpio.c which is no more used and migrate
structs stm32_gpio_regs and stm32_gpio_priv into
arch-stm32f4/gpio.h to not break compilation.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Use available DM clk_stm32f.c driver instead of dedicated
mach-stm32/stm32f4/clock.c.
Migrate periph_clock defines from stm32_periph.h directly in
CLK driver. These periph_clock defines will be removed when STMMAC,
TIMER2 and SYSCFG drivers will support DM CLK.
Enable also CLK flag.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
In order to use common clock driver between STM32F4 and
STM32F7, remove clock_get() call
As APB_PSC is always set to 2, only case when
clock_get(CLOCK_AHB) != clock_get(CLOCK_APB1) is kept
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Remove serial_stm32.c driver and uart init from board file,
use available DM serial_stm32x7.c driver compatible for
STM32F4/F7 and H7 SoCs.
The serial_stm32x7.c driver will be renamed later with a more
generic name as it's shared with all STM32 Socs.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
This allows to support rcc MFD driver.
By enabling all these flags, we need to increase malloc area to avoid
crash during early stage.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
STM32F4 SoCs uses the same pinctrl block as found into
STM32F7 and H7 SoCs.
We can add "st,stm32f429-pinctrl" and "st,stm32f469-pinctrl"
compatible string into pinctrl_stm32.c.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Use available DM stm32_sdram.c driver instead of board
SDRAM initialization.
For that, enable OF_CONTROL, OF_EMBED and STM32_SDRAM flags.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
_ Add gpio compatible and aliases for stm32f429
_ Add FMC sdram node with associated new bindings value to
manage second bank (ie bank 1).
_ Add "u-boot,dm-pre-reloc" for rcc, fmc, fixed-clock, pinctrl,
pwrcfg and gpio nodes.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
All these files comes from kernel v4.15-rc1.
Update some header with correct STMicroelectronics Copyright.
Remove the paragraph about writing to the Free Software
Foundation's mailing address as requested by checkpatch.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
The DB-88F6820-AMC connects ethernet@34000 and ethernet@70000 which are
labeled as eth2 and eth0 in armada-38x.dts. The ethernet@30000 (eth1) is
not used on the AMC board.
This eliminates the following bootup message
Device 'ethernet@70000': seq 0 is in use by 'ethernet@34000'
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
add a simple readme to introduce rockusb and tell people how to use it
Signed-off-by: Eddie Cai <eddie.cai.linux@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
this patch add rockusb command. the usage is
rockusb <USB_controller> <devtype> <dev[:part]>
e.g. rockusb 0 mmc 0
Signed-off-by: Eddie Cai <eddie.cai.linux@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
this patch implement rockusb protocol on the device side. this is based on
USB download gadget infrastructure. the rockusb function implements the rd,
wl, rid commands. it can work with rkdeveloptool
Signed-off-by: Eddie Cai <eddie.cai.linux@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Now that the musb sunxi glue driver is completely device model / device
tree driven, we should use the base address from the device tree,
instead of hard-coding it in the source code.
Fixes: 3a61b080ac ("musb: sunxi: switch to the device model")
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Linux bindings have been introduced in the code (removing the U-Boot
specific ones) without documentation update. Compatible string has
changed, as well as the four GPIO properties. Reflect this by updating
the soft-spi.txt documentation.
Fixes: 102412c415 ("dm: spi: soft_spi: switch to use linux compatible string")
Signed-off-by: Miquel Raynal <miquel.raynal@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Commit 8620f38409 ("dm: sunxi: Linksprite_pcDuino3: Correct polarity
of MMC card detect") claims that the Pcduino3 device tree had an
incorrect polarity for the card detect pin and thus changed the polarity
flag of the cd-gpios from GPIO_ACTIVE_HIGH to GPIO_ACTIVE_LOW.
Actually the DT was correct since according to the mmc binding, a
combination of GPIO_ACTIVE_HIGH + cd-inverted results in an active-low
polarity. But because the U-Boot driver lacks the code to look at the
cd-inverted property (unlike the Linux driver) it interpreted the
polarity of active-high. Thus, after that commit the DT is actually
wrong from the binding/Linux point of view.
To make both Linux and U-Boot interpret the DT in the same way, just
drop the left-over cd-inverted property. I've sent a Linux patch to
switch all sunxi DTs over to not using the cd-inverted property, so
eventually all sunxi boards in U-Boot will be consistent in not using
cd-inverted.
Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
The Libre Computer Board ALL-H3-CC from Libre Technology is a Raspberry
Pi B+ form factor single board computer based on the Allwinner H3 SoC.
The board has 1GB DDR3 SDRAM, provided by 4 2Gb chips. The mounting holes
and connectors are in the exact same position as on the Raspberry Pi B+.
Raspberry Pi B+ like peripherals supported on this board include:
- Power input through micro-USB connector (without USB OTG)
- Native 100 Mbps ethernet using the internal PHY, as opposed to
USB-based on the RPi
- 4x USB 2.0 host ports, directly connected to the SoC, as opposed to
being connected through a USB 2.0 hub on the RPi
- TV and audio output on a 3.5mm TRRS jack
- HDMI output
- Micro-SD card slot
- Standard RPi B+ GPIO header, with the standard peripherals routed to
the same pins.
* 5V, 3.3V power, and ground
* I2C0 on the H3 is routed to I2C1 pins on the RPi header
* I2C1 on the H3 is routed to I2C0 pins on the RPi header
* UART1 on the H3 is routed to UART0 pins on the RPi header
* SPI0 on the H3 is routed to SPI0 pins on the RPi header,
with GPIO pin PA17 replacing the missing Chip Select 1
* I2S1 on the H3 is routed to PCM pins on the RPi header
- Additional peripherals from the H3 are available on different pins.
These include I2S0, JTAG, PWM1, SPDIF, SPI1, and UART3
In addition, there are a number of new features:
- Console UART header
- Consumer IR receiver
- Camera interface (not compatible with RPi)
- Onboard microphone
- eMMC expansion module port
- Heatsink mounting holes
This patch adds defconfig and dts files for this board. The dts file is
the same as the one submitted for inclusion in Linux, with some minor
revisions to match the dtsi file and old EMAC bindings in U-boot.
Since the OTG controller is wired to a USB host port, and the H3 has
proper USB hosts to handle host mode, the MUSB driver is not enabled.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
By applying this patch, we are ensuring that the code paths
responsible for applying errata workarounds are also exercised
on CPU revisions, which actually don't need these workarounds.
Only CONFIG_ARM_ERRATA_621766, CONFIG_ARM_ERRATA_454179,
CONFIG_ARM_ERRATA_725233 and CONFIG_ARM_ERRATA_430973 are
covered by this patch (Cortex-A8).
This improves code coverage when testing U-Boot builds
on newer hardware. In particular, the problematic commit
00bbe96eba ("arm: omap: Unify get_device_type() function")
would break both BeageBoard and BeagleBoard XM rather than
just older BeagleBoard.
As an additional bonus, we need fewer instructins and the SPL
size is reduced.
Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Armada pinctrl drivers shall not be compiled without the entire pinctrl
framework and thus lack a "depends on" condition, otherwise the driver
will simply not be probed.
Signed-off-by: Miquel Raynal <miquel.raynal@free-electrons.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Until now, Armada 3700 SoCs could not enable the mvneta driver, and thus
did not benefit from Ethernet support. Add ARMADA_3700 in the
"depends on" list of the MVNETA Kconfig entry.
Signed-off-by: Miquel Raynal <miquel.raynal@free-electrons.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Stefan Roese <sr@denx.de>
the values of dt_addr_r/kernel_addr_r/ramdisk_addr_r are taken from
the downstream 'u-boot-2017.03-armada-17.10' release.
the chosen values of scriptaddr and pxefile_addr_r are below fdt_addr_r,
in 1MB steps.
Signed-off-by: Andre Heider <a.heider@gmail.com>
Reviewed-by: Konstantin Porotchkin <kostap@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Introduce the recovery image download script for usage with
Marvell Armada SoC families (excepting 37xx family).
Since Marvell BootROM uses a sliding window in UART buffer
for detecting escape sequence during the boot, it's easier
to interrupt the normal boot flow by sending a long stream
of chained escape sequences to the serial port instead of
periodically sending a single escape sequence as it is done
by kwboot utility.
Additional benefit of using this script is the ability to
adjust the escape sequence stream length withoiut need for
compilation.
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Igal Liberman <igall@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
I do not see a good reason to do this by a CONFIG option that affects
all SoCs. The ram_size can be adjusted by dram_init() at run-time.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
I did not enable SDMA when I added sdhci-cadence support because LD20
boards are equipped with a large amount memory beyond 32 bit address
range, but SDMA does not support the 64bit address. U-Boot relocates
itself to the end of effectively available RAM. This would make the
MMC enumeration fail because the buffer for EXT_CSD allocated in the
stack would go too high, then SDMA would fail to transfer data.
Recent SDHCI-compatible controllers support ADMA, but unfortunately
U-Boot does not support ADMA.
In the previous commit, I hided the DRAM area that exceeds the 32 bit
address range. Now, I can enable CONFIG_MMC_SDHCI_SDMA.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
LD20 / PXs3 boards are equipped with a large amount of memory beyond
the 32 bit address range. U-Boot relocates itself to the end of the
available RAM.
This is a problem for DMA engines that only support 32 bit physical
address, like the SDMA of SDHCI controllers.
In fact, U-Boot does not need to run at the very end of RAM. It is
rather troublesome for drivers with DMA engines because U-Boot does
not have API like dma_set_mask(), so DMA silently fails, making the
driver debugging difficult.
Hide the memory region that exceeds the 32 bit address range. It can
be done by simply carving out gd->ram_size. It would also possible to
override get_effective_memsize() or to define CONFIG_MAX_MEM_MAPPED,
but dram_init() is a good enough place to do this job.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
In order for these commands to not be included in SPL we need to guard
compilation with CONFIG_SPL_BUILD checks. Reorganize some sections of
code slightly in order to avoid new warnings and mark the command
functions as static as they should have been before.
Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Enable CONFIG_CMD_PART item, as default environment requires it
and complains this command in unknown.
Signed-off-by: Andrey Zhizhikin <andrey.z@gmail.com>
When enable CONFIG_HAS_FSL_DR_USB, we might encounter below compile
warning, apply this patch can fix it:
drivers/usb/host/ehci-fsl.c:109:4: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast]
((u32)hccr + HC_LENGTH(ehci_readl(&hccr->cr_capbase)));
^
drivers/usb/host/ehci-fsl.c:108:9: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
hcor = (struct ehci_hcor *)
^
drivers/usb/host/ehci-fsl.c:115:8: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast]
(u32)hccr, (u32)hcor,
^
include/log.h:131:26: note: in definition of macro 'debug_cond'
printf(pr_fmt(fmt), ##args); \
^~~~
drivers/usb/host/ehci-fsl.c:114:2: note: in expansion of macro 'debug'
debug("ehci-fsl: init hccr %x and hcor %x hc_length %d\n",
^~~~~
drivers/usb/host/ehci-fsl.c:115:19: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast]
(u32)hccr, (u32)hcor,
^
include/log.h:131:26: note: in definition of macro 'debug_cond'
printf(pr_fmt(fmt), ##args); \
^~~~
drivers/usb/host/ehci-fsl.c:114:2: note: in expansion of macro 'debug'
debug("ehci-fsl: init hccr %x and hcor %x hc_length %d\n",
^~~~~
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
Without this propertiy, U-Boot will pop warning of 'USB phy type not
defined' when select CONFIG_HAS_FSL_DR_USB.
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
It is not much needed to print nand size in SPL during nand boot,
and most of nand spl drivers doesn't print the same.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
board/icorem6_rqs/ is forgot to remove while moving
common board files together in
(sha1: 52aaddd6f4)
"i..MX6: engicam: Add imx6q/imx6ul boards for existing boards"
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
The i.MX 6UL/ULL feature a Cortex-A7 CPU which suppor the ARM
generic timer. This change makes use of the ARM generic timer in
U-Boot.
This is crucial to make the ARM generic timers usable in Linux since
timer_init() initalizes the system counter module, which is necessary
to use the generic timers CP15 registers.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Introduce a new config symbol to select the i.MX
General Purpose Timer (GPT).
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
The blob_encap and blob_decap functions were not flushing the dcache
before passing data to CAAM/DMA and not invalidating the dcache when
getting data back.
Therefore, blob encapsulation and decapsulation failed with errors like
the following due to data cache incoherency:
"40000006: DECO: desc idx 0: Invalid KEY command"
To ensure coherency, we require the key_mod, src and dst buffers to be
aligned to the cache line size and flush/invalidate the memory regions.
The same requirements apply to the job descriptor.
Tested on an i.MX6Q board.
Reviewed-by: Sumit Garg <sumit.garg@nxp.com>
Signed-off-by: Clemens Gruber <clemens.gruber@pqgruber.com>
As defined on reference board followed by Intel Edison a Bluetooth
device is attached to HSU0, i.e. PCI 0000:04.1.
Describe it in ACPI accordingly.
Note, we use BCM2E95 ID here as one most suitable for such device based
on the description in commit message of commit 89ab37b489d1
("Bluetooth: hci_bcm: Add support for BCM2E95 and BCM2E96")
in the Linux kernel source tree.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The recent commit 03c4749dd6c7
("gpio / ACPI: Drop unnecessary ACPI GPIO to Linux GPIO translation")
in the Linux kernel reveals the issue we have in ACPI tables here,
i.e. we must use hardware numbers for GPIO resources and,
taking into consideration that GPIO and pin control are *different* IPs
on Intel Tangier, we need to supply numbers properly.
Besides that, it improves user experience since the official documentation
for Intel Edison board is referring to GPIO hardware numbering scheme.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
We only need to compile and link these files when building for full
U-Boot. Move them to under cmd/x86/ to make sure they aren't linked in
and undiscarded due to u_boot_list_2_cmd_* being included).
Cc: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Since commit 051ba9e082 ("Kconfig: mx6ull: Deselect MX6UL from
CONFIG_MX6ULL") CONFIG_MX6ULL does not select CONFIG_MX6UL anymore, so
take this into consideration in all the checks for CONFIG_MX6UL.
This fixes a boot regression.
Reported-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Stefan Agner <stefan@agner.ch>
Tested-by: Breno Lima <breno.lima@nxp.com>
Tested-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Tested-by: Jörg Krause <joerg.krause@embedded.rocks>
Boot scripts located in the root directory of the first partition of
USB, mmc, and SATA drives are executed twice: first by the distro boot
command and then by the legacy boot command. This may have weird side
effects if those scripts only change or extend the environment
(including parts of the boot command itself).
Removing the script execution from the legacy boot command has its own
caveats. For instance, the distro boot command may execute the boot.scr
on the mmc drive, then the boot.scr on the SATA drive, before the
legacy boot command actually boots from the mmc drive. However, the
current behavior would only execute the boot.scr once more before the
actual boot, but it does not prevent the script located on the SATA
drive from being executed, and thus, both scripts from being mixed up.
Considering that the legacy boot command is only in place to boot old
(standard) installations, let's go with the resolution having less
custom code and remove the script execution from the legacy boot
command.
Signed-off-by: Christopher Spinrath <christopher.spinrath@rwth-aachen.de>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
The current default environment of the cm_fx6 is not suitable for
booting modern distributions.
Instead of extending the custom environment, let's use the distro
boot command, which has been developed for precisely this use case.
If the distro boot command fails, fall back to the old behavior
(except for USB drives where the old behaviour is completely covered
by the distro boot command). That way it is still possible to create
"rescue SD cards" for old installations (e.g. if one messes up the
on-flash environment).
Signed-off-by: Christopher Spinrath <christopher.spinrath@rwth-aachen.de>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
In preparation for supporting the distro boot command, introduce the
standard variables for specifying load addresses, which are documented
in README and doc/README.distro, and replace the custom variables
used so far with them.
Since the current address layout disregards an address for an initramfs,
also switch to the load addresses used and proven by other imx6 boards
(e.g. the wandboard and nitrogen6x), instead of going on with our own
way.
Signed-off-by: Christopher Spinrath <christopher.spinrath@rwth-aachen.de>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
The Rockchip-released ATF for the Firefly apparently (i.e. Kever
reported this) does not tolerate a FDT being passed as the platform
parameter and will run into a hard stop.
To work around this limitation in the ATF parameter handling, we
enable SPL_ATF_NO_PLATFORM_PARAM (which will force passing NULL for
the platform parameters).
Note that this only affects this platform, as the ATF releases for the
RK3368 and RK3399 have always either ignored the platform parameter
(i.e. before the FDT-based parameters were supported) or support
receiving a pointer to a FDT.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
While we expect to call a pointer to a valid FDT (or NULL) as the
platform parameter to an ATF, some ATF versions are not U-Boot aware
and have an insufficiently robust (or an overzealour) parameter
validation: either way, this may cause a hard-stop with uncooperative
ATF versions.
This change adds the option to suppress passing a platform parameter
and will always pass NULL.
Debug output from ATF w/ this option disabled (i.e. default):
INFO: plat_param_from_bl2: 0x291450
Debug output from ATF w/ this option enabled:
INFO: plat_param_from_bl2: 0
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
commit 20f1471416 ("imx: spl: Update NAND bootmode detection bit")
broke the NAND bootmode detection by checking if
BOOT_CFG1[7:4] == 0x8 for NAND boot mode.
This commit essentially reverts it, while using the IMX6_BMODE_*
macros that were introduced since.
Tables 8-7 & 8-10 from IMX6DQRM say the NAND boot mode selection
is done when BOOT_CFG1[7] is 1, but BOOT_CFG1[6:4] is not
necessarily 0x0 in this case.
Actually, NAND boot mode is when 0x8 <= BOOT_CFG1[7:4] <= 0xf,
like it was in the code before.
Signed-off-by: Eran Matityahu <eran.m@variscite.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Jagan Teki <jagan@openedev.com>
Cc: Tim Harvey <tharvey@gateworks.com>
This is a virtual "board" that uses configuration files and
Kconfig to define the memory layout used by a real board during
the board bring-up process.
It generates an SPL image that can be loaded using imx_usb or
SB_LOADER.exe.
When run, it will generate a set of calibration constants for
use in either or both a DCD configuration file for boards that
use u-boot.imx or struct mx6_mmdc_calibration for boards that
boot via SPL.
In essence, it is a configurable, open-source variant of the
Freescale ddr-stress tool.
https://community.nxp.com/docs/DOC-105652
File mx6memcal_defconfig configures the board for use with
mx6sabresd or mx6qsabreauto.
Signed-off-by: Eric Nelson <eric@nelint.com>
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
The calculation of left space for version string is not correct, should
use VIDEO_COLS not VIDEO_LINE_LEN / 2, otherwise we will get larger space
than actual have and cause string to overlay logo picture.
Also current version string display only supports two lines words at max.
This also causes overlay when the LCD pixel column size is not enough.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Tested-by: Anatolij Gustschin <agust@denx.de>
The clk_set_rate function dereferences the clk pointer without
checking whether it is NULL. This may cause problem when clk is NULL.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
We want to have the same configuration defaults for the RK3368-uQ7
as for the RK3399-Q7: this change reduces the default env-size to
8KiB to ensure that it does not overlap the boot-payload on SD/MMC
configurations.
References: commit fe529e6597 ("rockchip: rk3399-puma: reduce env size to 8kiB")
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Khadas VIM is an Open Source DIY Box manufactured by Shenzhen Wesion NOT 'Tomato'
The fix was provided by Khadas Team member 'numbqq'.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
The patch replaces the former error() by the new pr_err().
This makes the TPS65910 driver conform to Masahiro's patch
'treewide:replace with error() with pr_err()' introduced
October 2017.
Signed-off-by: Felix Brack <fb@ltec.ch>
Reviewed-by: Simon Glass <sjg@chromium.org>
Commit b6251db8c3 ("Kconfig: Introduce USE_BOOTCOMMAND and migrate
BOOTCOMMAND") removed CONFIG_BOOTCOMMAND option from
include/configs/am335x_evm.h file. But that option wasn't added to
defconfig files for BeagleBone Black board.
Because of this we can't boot Linux from SD card using just
"run bootcmd", getting next error:
** File not found /boot/undefined **
That's because "fdtfile" variable has "undefined" value by default, and
"bootcmd" doesn't call "run findfdt" command, which assigns "fdtfile" to
correct device tree file for current board name (obtained from EEPROM).
So we are forced to either call "run findfdt" command manually, or
assign manually "fdtfile=am335x-boneblack.dtb" (e.g. in uEnv.txt file).
Bring back CONFIG_BOOTCOMMAND to BBB defconfigs so that we can boot
Linux rootfs from SD card automatically without any addition actions.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
This commit clears 'ethaddr' before calling 'smc911x_initialize' to
allow the SROM MAC address to be assigned properly.
Signed-off-by: Derald D. Woods <woods.technical@gmail.com>
This commit updates the configuration files needed to support OF_CONTROL
on the OMAP3 EVM baseboard.
Additionally:
- CONFIG_SYS_THUMB_BUILD is enabled
- CONFIG_SPL_ENV_SUPPORT is enabled
Tested using GCC 7.2.0 [--with-float=hard --with-mode=thumb].
Signed-off-by: Derald D. Woods <woods.technical@gmail.com>
This commit adds OMAP3 EVM devicetree files from Linux v4.15-rc3. Note
that this is the first addition of OMAP34XX devicetree files.
Signed-off-by: Derald D. Woods <woods.technical@gmail.com>
Since commit 999a78d5cf ("scripts/dtc: Update to upstream version v1.4.5-3-gb1a60033c110")
dtc warns about:
arch/arm/dts/imx53-cx9020.dtb: Warning (interrupts_property): Missing interrupt-parent for /soc/aips@50000000/serial@53fc0000
arch/arm/dts/imx53-cx9020.dtb: Warning (interrupts_property): Missing interrupt-parent for /soc/aips@50000000/ccm@53fd4000
arch/arm/dts/imx53-cx9020.dtb: Warning (interrupts_property): Missing interrupt-parent for /soc/aips@50000000/gpio@53fe4000
arch/arm/dts/imx53-cx9020.dtb: Warning (interrupts_property): Missing interrupt-parent for /soc/aips@60000000/sdma@63fb0000
arch/arm/dts/imx53-cx9020.dtb: Warning (interrupts_property): Missing interrupt-parent for /soc/aips@60000000/ethernet@63fec000
Fix this by adding a node for the tzic interrupt controller.
Copied from "<Linux>/arch/arm/boot/dts/imx53.dts"
Signed-off-by: Patrick Bruenn <p.bruenn@beckhoff.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
The DDR DRAM calibration doesn't work on T-topology sometimes, so disable it.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
In commit 6e6cf015e7 ("Merge
git://www.denx.de/git/u-boot-imx") the line defining spl_sd
configuration for wandboard was removed, which resulted in no SPL
target being built.
Add it back.
Signed-off-by: Vagrant Cascadian <vagrant@debian.org>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Currently CONFIG_SECURE_BOOT is selecting FSL_CAAM for all i.MX devices,
this causes the following error when building mx6sl boards since
this SoC doesn't have the CAAM block:
In file included from drivers/crypto/fsl/jobdesc.c:12:0:
drivers/crypto/fsl/jobdesc.c: In function 'inline_cnstr_jobdesc_blob_dek':
include/fsl_sec.h:268:25: error: 'CAAM_ARB_BASE_ADDR' undeclared (first use
in this function)
#define SEC_MEM_PAGE1 (CAAM_ARB_BASE_ADDR + 0x1000)
^
drivers/crypto/fsl/jobdesc.c:140:21: note: in expansion of macro 'SEC_MEM_PAGE1'
memcpy((uint32_t *)SEC_MEM_PAGE1, (uint32_t *)plain_txt, in_sz);
^
include/fsl_sec.h:268:25: note: each undeclared identifier is reported only
once for each function it appears in
#define SEC_MEM_PAGE1 (CAAM_ARB_BASE_ADDR + 0x1000)
^
drivers/crypto/fsl/jobdesc.c:140:21: note: in expansion of macro 'SEC_MEM_PAGE1'
memcpy((uint32_t *)SEC_MEM_PAGE1, (uint32_t *)plain_txt, in_sz);
^
scripts/Makefile.build:280: recipe for target 'drivers/crypto/fsl/jobdesc.o'
failed
make[3]: *** [drivers/crypto/fsl/jobdesc.o] Error 1
scripts/Makefile.build:425: recipe for target 'drivers/crypto/fsl' failed
make[2]: *** [drivers/crypto/fsl] Error 2
scripts/Makefile.build:425: recipe for target 'drivers/crypto' failed
make[1]: *** [drivers/crypto] Error 2
Add HAS_CAAM configuration to avoid this error.
Signed-off-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
MX6UL contains features that MX6ULL doesn't support.
Deselect CONFIG_MX6UL and select SYS_L2CACHE_OFF and ROM_UNIFIED_SECTIONS.
The motivation for doing this change is that MX6UL supports CAAM and
MX6ULL does not.
Signed-off-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Currently the MX6SL option is selected via CONFIG_SYS_EXTRA_OPTIONS,
but it is better to select it directly via Kconfig.
Signed-off-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Secure boot is not enabled in warp imximage.cfg, add support for it.
Signed-off-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Currently only imx6sx-sdb.dtb is loaded, but if revA board is used the
correct dtb is imx6sx-sdb-reva.dtb, so make this possible.
While at it, remove an extra 'mmc dev'.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
NXP development boards based on i.MX6/i.MX7 contain the board
revision information stored in the fuses.
Introduce a common function that can be shared by different boards and
convert mx6sabreauto to use this new mechanism.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Commit 5248930ebf ("dm: imx: cm_fx6: Enable more driver model support")
enabled driver model support for MMC. Remove the old mmc init code, which
is no longer used, from the board file.
Signed-off-by: Christopher Spinrath <christopher.spinrath@rwth-aachen.de>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Commit 5248930ebf ("dm: imx: cm_fx6: Enable more driver model support")
enabled driver model support for AHCI. Remove the old, now unused, sata
init code from the board file.
Signed-off-by: Christopher Spinrath <christopher.spinrath@rwth-aachen.de>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Commit 5248930ebf ("dm: imx: cm_fx6: Enable more driver model support")
enabled driver model support for USB. But it missed to enable driver
model support for keyboards. As a result, USB keyboards do no longer
work.
Fix this by enabling driver model support for keyboards.
Fixes: 5248930ebf ("dm: imx: cm_fx6: Enable more driver model support")
Signed-off-by: Christopher Spinrath <christopher.spinrath@rwth-aachen.de>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Commit 5248930ebf ("dm: imx: cm_fx6: Enable more driver model support")
enabled driver model support for USB, thereby effectively removing USB
support because the cm_fx6 devicetree in the U-Boot does *not* enable the
USB nodes.
Reinstate the USB support by syncing the devicetree with Linux whose
devicetree enables the USB nodes properly.
More precisely, use the devicetree found in Linux v4.15-rc1 with the
following two changes:
1) Remove the audio mux; the required dt-bindings header is not
present in the U-Boot.
2) Keep the usdhc3 MMC controller node currently present in the
U-Boot's devicetree to retain the ability to boot from MMC.
Fixes: 5248930ebf ("dm: imx: cm_fx6: Enable more driver model support")
Signed-off-by: Christopher Spinrath <christopher.spinrath@rwth-aachen.de>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
We are going to be using check_time() on more than the mx53ppd, move this
function to a common location.
Signed-off-by: Martyn Welch <martyn.welch@collabora.co.uk>
There is an #ifdef and #endif with nothing in between. This patch simply
removes this dead/useless code.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
In order to provide a consistent user experience for imx board users,
remove the custom CONFIG_BOOTDELAY values from defconfig files, so that
all boards can use the default two second delay.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Freescale (NXP) boards have lots of defconfig files per board.
I used "imply PANIC_HANG" for them.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Linux device tree contains "ethernet" node for all possible
interface supported by SoC i.e. LS1046A.
It is not necessary for a SerDes protocol to support all possible
interface. So disable unavailable "ethernet" node in device tree.
Also, enable FDT_SEQ_MACADDR_FROM_ENV to fetch MAC address
sequentially from environment variables
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
"ethernet" node fix-up for device tree happens before Linux boot.
There can be requirement of updating "ethernet" node even before
fix-up. So, add support of updating "ethernet" node.
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
The MAC addresses get fixed in the device tree for "ethernet" nodes
is by using trailing number behind "ethernet" found in "/aliases".
It may not be necessary for the "ethernet" nodes to be sequential.
There can be gaps in between or any node disabled
So provide a support to fetch MAC addr sequentially from env
and apply them to "ethernet" nodes in the order they appear in
device tree only if "ethernet" is not "disabled"
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
When adding a partition, set the logical_partition member in the media
structure as mandated by the UEFI spec.
Signed-off-by: Emmanuel Vadot <manu@freebsd.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
The default value of CONFIG_SYS_BOOTM_LEN, 0x800000, causes error
when uncompressing Image.gz out of FIT image.
Uncompressing Kernel Image ... Error: inflate() returned -5
Image too large: increase CONFIG_SYS_BOOTM_LEN
and loading Image out of FIT image.
Loading Kernel Image ... Image too large: increase CONFIG_SYS_BOOTM_LEN
Must RESET board to recover
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
When booting a itb file with a Ramdisk on a imx6 based
board, U-Boot drops the warning:
Loading Kernel Image ... OK
Loading Ramdisk to 4ecf1000, end 4ef8b11f ... \
CACHE: Misaligned operation at range [4ecf1000, 4ef8b11f]
Fix it!
Signed-off-by: Heiko Schocher <hs@denx.de>
Tested-by: Ayoub Zaki <hs@denx.de>
Use dfu_alt_info_emmc variable from include/environment/ti/dfu.h file.
It was probably overlooked when extracting DFU variables to mentioned
file.
This patch fixes DFU on BeagleBone Black, so that we can use commands
like ones below to upgrade various images on eMMC:
=> setenv dfu_alt_info $dfu_alt_info_emmc
=> dfu 0 mmc 1
$ dfu-util -D MLO -a MLO.raw
$ dfu-util -D u-boot.img -a u-boot.img.raw
Without this patch, the user is forced to assign the value to
dfu_alt_info_emmc manually, which contradicts with instructions [1].
[1] http://processors.wiki.ti.com/index.php/Linux_Core_U-Boot_User%27s_Guide
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
This patch is ported from the Linux patch posted at [1] and applied to
net tree as commit f1e2400a80ff.
The purpose of this change is to fix the incorrect detection of the link
partner (LP) advertised capabilities which sometimes happens with this PHY
(roughly 1 time in a dozen)
This issue may cause the link to be negotiated at 10Mbps/Full or
10Mbps/Half when 100MBps/Full is actually possible. In some case, the link
is even completely broken and no communication is possible.
To detect the corruption, we must look for a magic undocumented bit in the
WOL bank (hint given by the SoC vendor kernel) but this is not enough to
cover all cases. We also have to look at the LPA ack. If the LP supports
Aneg but did not ack our base code when aneg is completed, we assume
something went wrong.
The detection of a corrupted LPA triggers a restart of the aneg process.
This solves the problem but may take up to 6 retries to complete.
[1] https://lkml.kernel.org/r/20171208110811.30789-1-jbrunet@baylibre.com
Fixes: 8995a96d1d ("net: phy: Add Amlogic Meson GXL Internal PHY support")
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Xilinx changes for v2018.01-rc2-v2
fpga:
- Enable loading bitstream via fit image for !xilinx platforms
zynq:
- Fix SPL SD boot mode
zynqmp:
- Not not reset in panic
- Do not use simple allocator because of fat changes
- Various dt chagnes
- modeboot variable setup
- Fix fpga loading on automotive devices
- Fix coverity issues
test:
- Fix env test for !hush case - Stephen's patch
Increase setup, assertion and hold time related to chip-select signal.
Additional delay is needed for the signal to propogate through FPGA.
This adjustment slightly increase the read and write cycle but has no
impact on burst read or write.
Signed-off-by: York Sun <york.sun@nxp.com>
Rockchip release bl31.elf file for armv8 SoCs like rk3399, rk3328,
the elf have more than one section, we need to decode it first and
packed them into u-boot.itb with its file. This script is to generate
the its script.
Need default bl31.elf in root directory of U-Boot source and dtb
as parameter.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Rockchip SoCs only need boot0 hook at SPL, and the U-Boot proper do not
need it.
The very beginning of U-Boot proper is different between armv7 and armv8:
armv7 start with ARM_VECTORS while armv8 start with 'b reset'.
Here is the map of very beginning for all cases:
armv7 SPL: TAG(overwrite 'b 1f')+'b reset' + ARM_VECTORS
armv7 U-Boot: ARM_VECTORS
armv8 SPL: TAG(overwrite 'b 1f')+'b reset' + Reserved_iram(rk3399)
armv8 U-Boot: 'b reset'
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
After adding our small zynq uboot which has hush parser off same
variable tests start to failed. Use quotes only when hush is enabled.
Reported-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Access the timestamp ref ctrl register only if runinng
at el3 level otherwise just return. This change fixes
the issue when CRL APB is marked as secure and accessing
when not in el3 causes exception.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Check all return values from file functions.
In case of negative return exit immediately.
Also change fsize return value which can't be negative.
Reported-by: Coverity (CID: 23276, 23304, 169357)
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Dont use 4K sector erase by default, Disabling this
would use 64K sector erase and decreases erase time.
Also disabled by the fact that UBIFS and JFFS2 won't work
with 4K sector erase.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Enabling all spi flashes because some of these boards can have different
flashes compared to public version.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This commit adds ENV_SIZE and ENV_OFFSET configuration items for
ARCH_ROCKCHIP, but keeps these non-visible (i.e. not prompt is given).
With these new items present, the configuration from the header files
is moved to Kconfig.
Keeping these non-visible is necessary to have the possibility to
select new default values if CONFIG_IS_IN_* is changed (interactively
or with oldconfig). Otherwise it will always be set to a previous
value if used with a prompt. As an example if we do a defconfig with
CONFIG_IS_IN_MMC and change it to CONFIG_IS_IN_SPI_FLASH via
menuconfig, ENV_SIZE and ENV_OFFSET will not be changed to the correct
values as defconfig will already have set them to the default values
of CONFIG_IS_IN_MMC in .config.
Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Patch queue for efi - 2017-12-17
A few fixes for 2018.01:
- Compile fix with helloworld example
- DP match fix (fixes FreeBSD loader and grub on block storage)
- More DP fixes for SD, block
- Fix use-after-free
The PCIe reset signal is connected to GPIO4_C6 on the Puma
module. This pin is supplied by 1.8V, but the default iodomain
setting is 3.0V and in this situation the pin is unable to go
high.
Linux assumes that this signal works in early boot
as PCIe is probed before loading the iodomain driver.
Make PCIe work in Linux by setting the gpio4cd iodomain to 1.8V.
Signed-off-by: Jakob Unterwurzacher <jakob.unterwurzacher@theobroma-systems.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Add a description for dp_part_fill().
Reword a comment in the function.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
When converting device nodes and paths to text we should
stick to the UEFI spec.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
According to the UEFI spec the numbering of partitions has to
start with 1.
Partion number 0 is reserved for the optional device path for
the complete block device.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
The SD cards and eMMC devices have different device nodes.
The current coding interpretes all MMC devices as eMMC.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
If a failure occurs when trying to load an image, it is insufficient
to free() the EFI object. We must remove it from the object list,
too. Otherwise a use after free will occur the next time we
iterate over the object list.
Furthermore errors in setting up the image should be handled.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Provide a function to remove a handle from the object list
after removing all protocols.
To avoid forward declarations other functions have to move up
in the coding.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
efi_setup_loaded_image() should return an error code indicating if
an error has occurred.
An error occurs if a protocol cannot be installed.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
When calling efi_dp_find_obj(), we usually want to find the *exact* match
of an object for a given device path. However, I ran into a nasty corner case
where I had the following objects with paths available:
Handle 0x9feffa70
/HardwareVendor(e61d73b9-a384-4acc-aeab-82e828f3628b)[0: ]/USB(6,0)/EndEntire
Handle 0x9feffb58
/HardwareVendor(e61d73b9-a384-4acc-aeab-82e828f3628b)[0: ]/USB(6,0)/HD(1,800,32000,2de808cb00000000,1,1)/EndEntire
and was searching for
/HardwareVendor(e61d73b9-a384-4acc-aeab-82e828f3628b)[0: ]/USB(6,0)/HD(1,800,32000,2de808cb00000000,1,1)/EndEntire
But because our device path search looked for any substring match, it would
return
/HardwareVendor(e61d73b9-a384-4acc-aeab-82e828f3628b)[0: ]/USB(6,0)/EndEntire
because that path is a full substring of the path we were searching for.
So this patch adapts the device path search logic to always look for exact
matches first. The way we distinguish between those cases is by looking at
whether our caller actually deals with remainders.
As a side effect, the code as is from all I can tell now never does a
substring match anymore, because it always gets called with rem=NULL, so
we always only do exact matches now.
Reported-by: Jonathan Gray <jsg@jsg.id.au>
Signed-off-by: Alexander Graf <agraf@suse.de>
The efi linker script includes sections needed for the dynamic linker.
However, in our EFI application environment we don't have a dynamic linker.
So let's remove them. That way we save on 4k padding and reduce the file
size of the hello world efi binary from ~4k to ~1k.
Signed-off-by: Alexander Graf <agraf@suse.de>
Commit bbf75dd934 ("efi_loader: output load options in helloworld")
introduced a const variable in efi_main() called loaded_image_guid which
got populated from a constant struct.
While you would usually expect a compiler to realize that this variable
should really just be a global pointer to .rodata, gcc disagrees and instead
puts it on the stack. Unfortunately in some implementations of gcc it does
so my calling memcpy() which we do not implement in our hello world
environment.
So let's explicitly move it to a global variable which in turn puts it in
.rodata reliably and gets rid of the memcpy().
Fixes: bbf75dd934 ("efi_loader: output load options in helloworld")
Reported-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Tested-by: Florian Fainelli <f.fainelli@gmail.com>
I2C reading for DIP switch setting is not reliable for LS1012ARDB
RevD and later versions. This patch is to add hwconfig support to
enable/disable eSDHC1 manually for these boards. Also drop 'status'
fix-up for eSDHC0 and leave it as it is. It shouldn't always be
fixed up with 'okay'.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Add LS1012ARDB RevC/RevC1/RevC2/RevD/RevE information and
detect it when u-boot starts up.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
This patch is to clean up definitions for I2C IO expanders.
The value 0x10 of __SW_BOOT_EMU is wrong. It should be 0x2.
Fixed it in this patch.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Function fdt_fixup_board_enet() performs fdt fixup. Only return
fdt_status_okay() when both MC is applied and DPL is deployed, else
return fdt_status_fail().
This check is added to LS1088A/LS2080A/LS2088A boards.
Signed-off-by: Yogesh Gaur <yogeshnarayan.gaur@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Remove silicon prefix. Automotive grade devices are using xazu instead
of xczu prefix.
The patch "fpga: xilinx: Check for substring in device ID validation"
(sha1: f72132673a)
enables this functionality for zynq devices that only substrings are
checked.
Unfortunately there is no way how to detect device grade that's why
this change is reasonable.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This is the same patch as was done earlier.
Please look at Linux patch:
"arm64: zynqmp: Use only earlycon bootargs instead of full one"
(sha1: f3609c8d4af28b9cc22ca49bf8e529b582ec188c)
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Remove overfetch, ratectrl, include-sg and src-issue dma properties.
Driver is not using them and they are also not documented in the binding
doc.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Kedareswara rao Appana <appanad@xilinx.com>
The at24 driver allows to register I2C EEPROM chips using different vendor
and devices, but the I2C subsystem does not take the vendor into account
when matching using the I2C table since it only has device entries.
But when matching using an OF table, both the vendor and device has to be
taken into account so the driver defines only a set of compatible strings
using the "atmel" vendor as a generic fallback for compatible I2C devices.
So add this generic fallback to the device node compatible string to make
the device to match the driver using the OF device ID table.
Signed-off-by: Javier Martinez Canillas <javier@dowhile0.org>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Setup bootmode variable based on bootmode selection.
This is helping with setting up boot method.
Also setup sdbootdevice.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Dont read boot mode register directly read it using
zynqmp_mmio_read().
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This patch is enabling support for SPL QSPI boot.
First of all it is necessary to generate atf-spi.ub which is different
format than atf-uboot.ub (this can be made as legacy image too)
ADDR=`arm-xilinx-linux-gnueabi-readelf -a bl31.elf | grep "Entry point
address" | cut -d ':' -f 2 | sed -e 's/^[ \t]*//'`
aarch64-linux-gnu-objcopy -O binary bl31.elf bl31.bin
./tools/mkimage -f auto -A arm64 -T firmware -C none -O u-boot -a $ADDR
-e $ADDR -n "atf1" -E -b arch/arm/dts/zynqmp-zcu102.dtb -d bl31.bin
atf-uboot.ub
./tools/mkimage -A arm64 -T firmware -C none -O u-boot -a $ADDR -e $ADDR
-n "atf-for-qspi" -E -d bl31.bin atf-spi.ub
This patch is using this QSPI layout with offsets:
0 boot.bin
512k atf-ub
640k u-boot.bin
1280k u-boot.img
Which corresponding by writing these images(read from MMC)
mmcinfo
sf probe
load mmc 0 10000000 boot.bin
sf erase 0 +$filesize
sf write 10000000 0 $filesize
load mmc 0 10000000 atf-spi.ub
sf erase 0x80000 +$filesize
sf write 10000000 0x80000 $filesize
load mmc 0 10000000 u-boot.bin
sf erase 0xa0000 +$filesize
sf write 10000000 0xa0000 $filesize
load mmc 0 10000000 u-boot.img
sf erase 0x140000 +$filesize
sf write 10000000 0x140000 $filesize
For testing u-boot running in EL3 you can break atf-spi.ub like this:
sf probe
sf erase 0x80000 +4
Then u-boot.img is executed.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This reference is needed for pinctrl driver where some signals can be
routed directly to platform management unit (PMU).
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This was caused by: "fs/fat: Reduce stack usage"
(sha1:2460098cffacd18729262e3ed36656e6943783ed) which converted
fat code to use malloc. But simple malloc is not freeing space
that's why full malloc implementation is needed.
Malloc space is added to RAM.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Do not perform reset when panic happens because in the next reset
panic happens again and logs are overflood by the same errors.
This can be enabled by default and reset can be performed via watchdog.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This patch is fixing two issues:
1. Insufficient stack size for fat fs buffers
2. Insufficient space in malloc area
Tested on zc702 and zc706.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This drops the limit that fpga is only loaded from FIT images for Xilinx.
This is done by moving the 'partial' check from 'common/image.c' to
'drivers/fpga/xilinx.c' (the only driver supporting partial images yet)
and supplies a weak default implementation in 'drivers/fpga/fpga.c'.
Signed-off-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
Tested-by: Michal Simek <michal.simek@xilinx.com> (On zcu102)
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Using "cpu_pos_mask()" function to detect the real online cpus,
and discard the needless cpu nodes on kernel dts.
Signed-off-by: Wenbin Song <wenbin.song@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Check LS1043A/LS2080a by device ID without using personality ID to
determine revision number. This check applies to all various
personalities of the same SoC family.
Signed-off-by: Wenbin Song <wenbin.song@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Include common config_distro_defaults.h and config_distro_bootcmd.h
for u-boot enviroments to support automatical distro boot which
scan boot.scr from external storage devices(e.g. SD and USB)
and execute autoboot script.
Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Include common config_distro_defaults.h and config_distro_bootcmd.h
for u-boot enviroments to support automatical distro boot which
scan boot.scr from external storage devices(e.g. SD and USB)
and execute autoboot script.
Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
The BRDCFG5[SPISDHC] register field of Qixis device is used
to control SPI and SDHC signal routing.
10 = Force SDHC Mode
- SPI_CS[0] is routed to CPLD for SDHC_VS use.
- SPI_CS[1] is unused.
- SPI_CS[2:3] are routed to the TDMRiser slot.
11 = Force eMMC Mode
- SPI_CS[0:3] are routed to the eMMC card.
0X = Auto Mode
- If SDHC_CS_B=0 (SDHC card installed): Use SDHC mode
described above.
- Else SDHC_CS_B=1 (no SDHC card installed): Use eMMC
mode described above.
In default the hardware uses auto mode, but sometimes we need
to use force SDHC mode to support SD card hotplug, or SD sleep
waking up in kernel. This patch is to support force SDHC mode
by hwconfig.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Texas Instrument's TPS65910 PMIC contains 3 buck DC-DC converts, one
boost DC-DC converter and 8 LDOs. This patch implements driver model
support for the TPS65910 PMIC and its regulators making the get/set
API for regulator value/enable available.
This patch depends on the patch "am33xx: Add a function to query MPU
voltage in uV" to build correctly. For boards relying on the DT
include file tps65910.dtsi the v3 patch "power: extend prefix match
to regulator-name property" and an appropriate regulator naming is
also required.
Signed-off-by: Felix Brack <fb@ltec.ch>
Reviewed-by: Simon Glass <sjg@chromium.org>
This patch changes the calls to uclass_first/next_device() in blk_first/
next_device() to use uclass_find_first/next_device() instead. These functions
don't prepare the devices, which is correct in this case.
With this patch applied, the "usb storage" command now works again as
expected:
=> usb storage
Device 0: Vendor: SanDisk Rev: 1.00 Prod: Ultra
Type: Removable Hard Disk
Capacity: 58656.0 MB = 57.2 GB (120127488 x 512)
Without this patch, it used to generate this buggy output:
=> usb storage
Card did not respond to voltage select!
mmc_init: -95, time 26
No storage devices, perhaps not 'usb start'ed..?
Signed-off-by: Stefan Roese <sr@denx.de>
Suggested-by: Simon Glass <sjg@chromium.org>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This patch extends pmic_bind_children prefix matching. In addition to
the node name the property regulator-name is used while trying to match
prefixes. This allows assigning different drivers to regulator nodes
named regulator@1 and regulator@10 for example.
I have discarded the idea of using other properties then regulator-name
as I do not see any benefit in using property compatible or even
regulator-compatible. Of course I am open to change this if there are
good reasons to do so.
Signed-off-by: Felix Brack <fb@ltec.ch>
Reviewed-by: Simon Glass <sjg@chromium.org>
The DM version of do_reset has been issuing a warm-reset, which (on
some platforms keeps GPIOs and other parts of the platform active).
This may cause unintended behaviour, as calling do_reset usually
indicates a desire to reset the board/platform and not just the CPU.
This changes do_reset to always request a COLD reset.
Note that programmatic uses can still invoke a WARM reset through
reset_cpu() or using sysreset_walk().
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Update tegra to use binman for image creation. This still includes the
current Makefile logic, but a later patch will remove this. Three output
files are created, all of which combine
SPL and U-Boot:
u-boot-tegra.bin - standard image
u-boot-dtb-tegra.bin - same as u-boot-tegra.bin
u-boot-nodtb-target.bin - includes U-Boot without the appended device tree
The latter is useful for build systems where the device is appended later,
perhaps after being modified.
Signed-off-by: Simon Glass <sjg@chromium.org>
SPL supports reading U-Boot from a RAM location. At present this is
hard-coded to the U-Boot text base address. Use binman to allow this to
come from the image file, if binman is used.
Signed-off-by: Simon Glass <sjg@chromium.org>
Allow SPL to access binman symbols and use this to get the address of
U-Boot. This falls back to CONFIG_SYS_TEXT_BASE if the binman symbol
is not available.
Signed-off-by: Simon Glass <sjg@chromium.org>
This area of the image contains symbols whose values are filled in by
binman. If this feature is not used, the table is empty.
Add this to the ARM SPL link script.
Signed-off-by: Simon Glass <sjg@chromium.org>
Binman construct images consisting of multiple binary files. These files
sometimes need to know (at run timme) where their peers are located. For
example, SPL may want to know where U-Boot is located in the image, so
that it can jump to U-Boot correctly on boot.
In general the positions where the binaries end up after binman has
finished packing them cannot be known at compile time. One reason for
this is that binman does not know the size of the binaries until
everything is compiled, linked and converted to binaries with objcopy.
To make this work, we add a feature to binman which checks each binary
for symbol names starting with '_binman'. These are then decoded to figure
out which entry and property they refer to. Then binman writes the value
of this symbol into the appropriate binary. With this, the symbol will
have the correct value at run time.
Macros are used to make this easier to use. As an example, this declares
a symbol that will access the 'u-boot-spl' entry to find the 'pos' value
(i.e. the position of SPL in the image):
binman_sym_declare(unsigned long, u_boot_spl, pos);
This converts to a symbol called '_binman_u_boot_spl_prop_pos' in any
binary that includes it. Binman then updates the value in that binary,
ensuring that it can be accessed at runtime with:
ulong u_boot_pos = binman_sym(ulong, u_boot_spl, pos);
This assigns the variable u_boot_pos to the position of SPL in the image.
Signed-off-by: Simon Glass <sjg@chromium.org>
The elf module can provide some debugging information to assist with
figuring out what is going wrong. This is also useful in tests. Update the
-D option so that it is passed through to tests as well.
Signed-off-by: Simon Glass <sjg@chromium.org>
This is only 3 bytes long which is not enough to hold two symbol values,
needed to test the binman symbols feature. Increase it to 15 bytes.
Using very small regions is useful since we can easily compare them in
tests and errors are fairly easy to diagnose.
Signed-off-by: Simon Glass <sjg@chromium.org>
For testing we need to build some ELF files containing binman symbols. Add
these to the Makefile and check in the binaries:
u_boot_binman_syms - normal, valid ELF file
u_boot_binman_syms_bad - missing the __image_copy_start symbol
u_boot_binman_syms_size - has a binman symbol with an invalid size
Signed-off-by: Simon Glass <sjg@chromium.org>
In some cases we need to read symbols from U-Boot. At present we have a
a few cases which does this via 'nm' and 'grep'.
It is better to use objdump since that tells us the size of the symbols
and also whether it is weak or not.
Add a new module which reads ELF information from files. Update existing
uses of 'nm' to use this module.
Signed-off-by: Simon Glass <sjg@chromium.org>
The old CodingStyle document has been converted to ReST and moved
elsewhere. Link to the web version of this document instead.
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
These ifdefs are protecting #include statements for files that have
never existed. AFAICT this hardware.h has been copied from the kernel
and the ifdefs have never served a role in U-Boot, so delete them.
Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Some QEMUs have a problem with time setup that's why
sleep test is failing. Introduce env__sleep_accurate
boardenv variable to have an option to skip sleep test.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
- avoid disturbing 0MiB partition size (in fact < 1MiB)
- test overlap limit between part1 and part2
- test gpt write with data with modifier 'M' for MiB
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Falcon mode was already working with SD card. This enables the
unlocking of NAND to allow the NAND read & write. This also
expands the README file based on the am335x describing how to
setup Falcon mode.
Signed-off-by: Adam Ford <aford173@gmail.com>
The Micron Flash is locked by default. This will automaticlly
unlock so manually unlocking is unnecessary in U-Boot.
Signed-off-by: Adam Ford <aford173@gmail.com>
The SPL-OS partition is 0x20000, so let's make
CONFIG_CMD_SPL_WRITE_SIZE same size. This should allow for better
falcon mode operation.
Signed-off-by: Adam Ford <aford173@gmail.com>
This symbol enables some library code used by various SATA drivers,
so make this a non-user-visible symbol select'ed by the respective
drivers, and let moveconfig handle the rest.
Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Use 'imply' here liberally to avoid the combinatorial explosion of
defconfig changes in the PowerPC boards.
Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Use 'imply' here liberally to avoid the combinatorial explosion of
defconfig changes in the PowerPC boards.
Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
The last user of this driver went away in August 2015 in commit:
b6073fd211 ("arm: Remove mx51_efikamx, mx51_efikasb boards")
Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
The last user of this driver went away in June 2017, in commit:
98f705c9ce ("powerpc: remove 4xx support")
Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
This driver really is DM GPIO one and so we need to have a correct
dependency, because DM alone doesn't provide required for CMD_GPIO
call and we're seeing build failures like this:
---------------------->8---------------------
cmd/built-in.o: In function 'do_gpio':
.../cmd/gpio.c:188: undefined reference to 'gpio_request'
...
---------------------->8---------------------
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Eugeniy Paltsev <paltsev@synopsys.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
It is tedious to define both mask and bit-shift. <linux/bitfield.h>
provides a convenient way to get access to register fields with a
single shifted mask.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Use DIV_ROUND_CLOSEST(). To make the JK value even more precise,
I used a bigger coefficient, then divide it by 512.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Commit 682e09ff9f ("ARM: uniphier: add PLL init code for LD20 SoC")
missed to write the computed value to the SSCPLLCTRL2 register.
Fixes: 682e09ff9f ("ARM: uniphier: add PLL init code for LD20 SoC")
Signed-off-by: Dai Okamura <okamura.dai@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
denali.c has no driver entry in itself. It makes sense only when
compiled together with denali_dt.c
Let NAND_DENALI_DT select NAND_DENALI, and hide NAND_DENALI from
the Kconfig menu.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Fix the link error for the combination of
CONFIG_ARCH_UNIPHIER_LD11=n
CONFIG_ARCH_UNIPHIER_LD20=n
CONFIG_ARCH_UNIPHIER_PXS3=y
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Synopsys HSDK clock controller generates and supplies clocks to various
controllers and peripherals within the SoC.
Each clock has assigned identifier and client device tree nodes can use
this identifier to specify the clock which they consume. All available
clocks are defined as preprocessor macros in the
dt-bindings/clock/snps,hsdk-cgu.h header and can be used in device
tree sources.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
dcache_exists, icache_exists, slc_exists and ioc_exists global
variables in "arch/arc/lib/cache.c" remain uninitialized if
SoC doesn't have corresponding HW.
This happens because we use the next constructions for their
definition and initialization:
-------------------------->>---------------------
int ioc_exists __section(".data");
if (/* condition */)
ioc_exists = 1;
-------------------------->>---------------------
That's quite a non-trivial issue as one may think of it.
The point is we intentionally put those variables in ".data" section
so they might survive relocation (remember we initilaize them very early
before relocation and continue to use after reloaction). While being
non-initialized and not explicitly put in .data section they would end-up
in ".bss" section which by definition is filled with zeroes.
But since we place those variables in .data section we need to care
about their proper initialization ourselves.
Also while at it we change their type to "bool" as more appropriate.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
ARCNUM [15:8] field in ARC_AUX_IDENTITY register allows us to
uniquely identify each core in a multi-core system.
I.e. with help of this macro each core may get its index in SMP system.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
DW SDIO controller has external CIU clock divider controlled via
register in the SDIO IP. Due to its unexpected default value
(we expected it to divide by 1 but in reality it divides by 8)
SDIO IP uses wrong CIU clock (it should be 100000000Hz but actual
is 12500000Hz) and works unstable (see STAR 9001204800).
So increase SDIO CIU frequency from actual 12500000Hz to 50000000Hz
by switching from the default divisor value (div-by-8) to the
minimum possible value of the divisor (div-by-2) in HSDK platform
code.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Add bits to support yet another board, the R8A77995 D3 Draak.
The DT file is from Linux 4.15-rc1 , commit
b35334447513c14a4dd55a67c269a743d4a4824b .
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Enable all logging features on sandbox so that the tests can be run.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
It is useful to display log messages on the console. Add a simple driver
to handle this.
Note that this driver outputs to the console, which may be serial or
video. It does not specifically select serial output.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This does not appear to be used by any boards. Before introducing a new
log system, remove this old one.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
With clang this gives a warning because hubsts appears to be used before
it is set, even if ultimately it is not used. Simplify the code to avoid
this problem.
Signed-off-by: Simon Glass <sjg@chromium.org>
The debug() macro now evaluates its expression so does not need #ifdef
protection. In fact the current code causes a warning with the new log
implementation. Adjust the code to fix this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Before adding new features, move these definitions to a separate header
to avoid further cluttering common.h.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
While sandbox works OK without the special-case code, it does result in
console output being stored in the pre-console buffer while sandbox starts
up. If there is a crash or a problem then there is no indication of what
is going on.
For ease of debugging it seems better to revert this change also.
This reverts commit d8c6fb8ced.
Signed-off-by: Simon Glass <sjg@chromium.org>
We cannot use sandbox memory at 0 since other things use memory at that
address. Move it up out of the way.
Note that the pre-console buffer is currently disabled with sandbox, but
this change will avoid confusion if it is manually enabled.
Signed-off-by: Simon Glass <sjg@chromium.org>
While sandbox works OK without the special-case code, it does result in
console output being stored in the pre-console buffer while sandbox starts
up. If there is a crash or a problem then there is no indication of what
is going on.
For ease of debugging it seems better to revert this change.
This reverts commit 47b98ad0f6.
Signed-off-by: Simon Glass <sjg@chromium.org>
The A33-OLinuXino defconfig was using the default CONS_INDEX value for
A33, which actually points to the R_UART, which is routed to the GPIO
header without proper pull-ups or diodes. The board has a separate
header for UART0, which are routed to pins PB0 and PB1. This header
is properly marked and is likely the first pins any user would try
to get a console.
Fix CONS_INDEX in the defconfig so the console appears on UART0.
Fixes: ca5c37026b ("sunxi: Add support for A33-OLinuXino board")
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Now that more and more devices are built using eMMC, providing a way to
easily flash the system without too much hassle seems like a right thing to
do.
Since fastboot is the most deployed tool to do that these days, we can just
rely on it to provide a way to flash the various components in the system
(SPL, U-Boot and the system itself) easily, especially since you can upload
the U-Boot hosting the fastboot "server" through FEL.
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The partitions variable is especially useful to create a partition table
from U-Boot, either directly from the U-Boot shell, or through flashing
tools like fastboot and its oem format command.
This is especially useful on devices with an eMMC you can't take out to
flash from another system, and booting a Linux system first to flash our
system then is not really practical.
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The SPL must be located at 8kB (16 sectors) offset. That's right in the
middle of the GPT, so we need to define a smaller amount of partitions to
accomodate for that location.
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
On some SoCs, the SPL needs to be located right in the middle of the GPT
partition entries.
One way to work around that is to create partition entries for a smaller
number of partitions to accomodate with where the SPL will be. Create a
Kconfig option to allow to do that.
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
sdram sub command of i2c command does not support Drivers Model.
This adds Drivers Model support to sdram sub command.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
The .probe_chip function is supposed to probe an i2c device on the bus to
determine whether a device is answering to a particular address.
at91_i2c_probe_chip() did not do anything resembling this and always
returned 0.
It looks as though at91_i2c_probe_chip() was intended to be a .probe
function for the controller, as it was copied-and-pasted to become
at91_i2c_probe() in 0bc8f640a4.
Removing the at91_i2c_probe_chip() function makes the higher layer
(i2c_probe_chip()) try a zero-length read transfer to test for the
presence of a device instead, which does work.
Signed-off-by: Alan Ott <alan@softiron.com>
Acked-by: Wenyou Yang <wenyou.yang@microchip.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
The driver must wait for TXRDY after each byte is pushed into
the i2c FIFO before pushing the next byte. Previously this was
not done for the first byte, causing a race condition with zeros
sometimes being sent for the next byte (which is typically the
first actual data byte).
Signed-off-by: Alan Ott <alan@softiron.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Add some comment describing the purpose of struct members and
functions.
Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
Change meson_i2c_xfer_msg() to return -EREMOTEIO in case of NACK, as
done by other drivers. Also, don't change the return error in
meson_i2c_xfer().
Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
The datasheet doesn't specify a suggested timeout and 500ms seems very
long: reduce it to 100ms.
Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
>From revision J the board uses new phy chip LAN8710. Compared
with RTL8201, RA17 pin is TXERR. It has pullup which causes phy
not to work. To fix this PA17 is muxed with GMAC function. This
makes the pin output-low.
Signed-off-by: Stefan Mavrodiev <stefan@olimex.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
For case when MC is loaded but DPL is not deployed perform MC
object [DPBP, DPIO, DPNI and DPRC] cleanup.
Signed-off-by: Yogesh Gaur <yogeshnarayan.gaur@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Add fall back option, to boot from NOR/QSPI/SD for LS1043, LS1046,
LS1021 in case of distro boot failure.
For LS1046, add kernel validation in case of secure boot in sd_bootcmd
and qspi_bootcmd. For LS1043 and LS1021, add kernel validation in case
of secure boot in sd_bootcmd, qspi_bootcmdand nor_bootcmd.
Signed-off-by: Vinitha Pillai <vinitha.pillai@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Adds config CONFIG_FSL_LS_PPA and CONFIG_FSL_CAAM in
LS2080AQDS and LS2080ARDB secure boot defconfig.
Removes CONFIG_FIT, as with CONFIG_FSL_LS_PPA enabled,
CONFIG_FIT is selected.
Removes CONFIG_SPL_RSA as in NOR boot SPL boot is not done.
Signed-off-by: Udit Agarwal <udit.agarwal@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Add the secure boot defconfigs for QSPI boot on LS1088ARDB
and LS1088AQDS platforms.
Signed-off-by: Udit Agarwal <udit.agarwal@nxp.com>
Signed-off-by: Vinitha Pillai-B57223 <vinitha.pillai@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Validates PPA, MC, DPC, Bootscript, DPL and Kernel images in ESBC
phase using esbc_validate command.
Enable validation of boot.scr script prior to its execution dependent
on "secureboot" flag in environment
Add header address for PPA to be validated during ESBC phase for
LS1088A platform based on LAyerscape Chasis 3.
Moves sec_init prior to ppa_init as for validation of PPA sec must
be initialised before the PPA is initialised.
Signed-off-by: Udit Agarwal <udit.agarwal@nxp.com>
Signed-off-by: Vinitha Pillai-B57223 <vinitha.pillai@nxp.com>
Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Kernel is now located at 0x1000000 instead of 0xa00000
and envirorment variables are located at 3MB offset instead of
2MB in Flash.
Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
This is suplement for patch which handle below errata:
A-009007, A-009008, A-008997, A-009798
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Instruction prefetch feature is by default enabled during core
release. This patch add support of disabling instruction prefetch
by setting core mask in PPA. Here each core mask bit represents a
core and prefetch is disabled at the time of core release.
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
IFC-NOR and QSPI-NOR signals are muxed on SoC to save pins
Add fsl_fdt_fixup_flash() to disable IFC-NOR node in dts
if QSPI is enabled and vice-versa
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Existing MC driver framework is based on MC-9.x.x flib. This patch
migrates MC obj (DPBP, DPNI, DPRC, DPMAC etc) to use latest MC flib
which is MC-10.3.0.
Changes introduced due to migration:
1. To get OBJ token, pair of create and open API replaces create APIs
2. Pair of close and destroy APIs replaces destroy APIs
3. For version read, get_version APIs replaces get_attributes APIs
4. dpni_get/reset_statistics APIs replaces dpni_get/set_counter APIs
5. Simplifies struct dpni_cfg and removes dpni_extended_cfg struct
6. Single API dpni_get_buffer_layout/set_buffer_layout replaces
dpni_get_rx/set_rx, tx related, tx_conf_buffer_layout related APIs.
New API takes a queue type as an argument.
7. Similarly dpni_get_queue/set_queue replaces
dpni_get_rx_flow/set_rx_flow , tx_flow related, tx_conf related
APIs
Signed-off-by: Yogesh Gaur <yogeshnarayan.gaur@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Unset USE_BOOTCOMMAND for all ls1088 defconfig files to fix
redefinition error. USE_BOOTCOMMAND was introduced in commit
b6251db8c3 ("Kconfig: Introduce USE_BOOTCOMMAND and migrate
BOOTCOMMAND").
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Most predefined TLB tables don't have memory coherence bit set for
SDRAM. This wasn't an issue before invalidate_dcache_range() function
was enabled. Without the coherence bit, dcache invalidation doesn't
automatically flush the cache. The coherence bit is already set when
dynamic TLB table is used. For some boards with different SPL boot
method, or with legacy fixed setting, this bit needs to be set in
TLB files.
Signed-off-by: York Sun <york.sun@nxp.com>
This issue is exposed after commit 9000eddbae ("drivers/usb/ehci:
Use platform-specific accessors"), the wrong endianness of EHCI
controller programing will cause USB function down.
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
This issue is exposed after commit 9000eddbae ("drivers/usb/ehci:
Use platform-specific accessors"), the wrong endianness of EHCI
controller programing will cause USB function down.
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Since commit 2614a20847 ("common: command: tempory buffer should
have size of command line buf"), there have been consistent Travis CI
failures on my builds (interestingly not for Tom, even though building
the same commit id) due to a SEGV in building the byteswapped
omapimage:
arm: pcm051_rev3
make[2]: *** [MLO.byteswap] Error 139
^^^ error code for a SEGV
Turns out that the word-based byte-swapping loop in omapimage.c is to
blame. With the loop condition
while (swapped <= (sbuf->st_size / sizeof(uint32_t)))
there had been one-too-many iterations for all file sizes divisible by
the sizeof(uint32_t). I.e. we had 1 iteration for 0 bytes (and also 1
through 3 bytes) and 2 iterations at 4 bytes... clearly overshooting
on 0 and 4 bytes.
This commit fixes the calculation of an up-rounded word-count and
makes sure to keep the zero-based loop-counter below the number of
words to be processed.
References: 2614a20 ("common: command: tempory buffer should have size of command line buf")
Fixes: 79b9ebb ("omapimage: Add support for byteswapped SPI images")
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Martin Elshuber <martin.elshuber@theobroma-systems.com>
Commit f5a2a93892 ("efi_loader: consistently use efi_uintn_t in boot
services") changed the internal EFI API header without adapting its existing
EFI stub users. Let's adapt the EFI stub as well.
Fixes: f5a2a93892 ("efi_loader: consistently use efi_uintn_t in boot services")
Signed-off-by: Alexander Graf <agraf@suse.de>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Odroid HC1 board is based on Odroid XU4 board, but it has no HDMI,
no eMMC, no build-in USB3.0 hub, no extension port pins, and no GPIO
button. USB3.0 ports are used for build-in JMicron USB to SATA bridge
and Gigabit R8152 ethernet chips. HC1 uses only passive cooling.
This patch also updates Odroid's ADCmax array and reduces ADC tolerance
to 1% to ensure that XU4 and HC1 revisions are properly detected.
I've tested this with XU3, XU3-lite, XU4 and HC1 boards. In case of my test
boards I got following values from ADC register: 372, 370, 1281 and 1313.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Tested-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
After updating dtc-1.4.5 version, there are too many warning.
This patch is to fix about exynos4 series.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
In Linux, the warning messages are printed out by pr_warn().
We can use Linux-like log functions in tree-wide.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
[primary] Check MMC 0:1 for /extlinux/extlinux.conf and boot
[fallback 1] Check MMC 0:1 zImage and run mmcbootz
[fallback 2] Check MMC 0:1 uImage and run mmcboot
[fallback 3] Check NAND partitions and run nandboot
If 'extlinux.conf' is not found on MMC 0, the previous boot behavior is
followed.
Signed-off-by: Derald D. Woods <woods.technical@gmail.com>
To page mapping the lowest 2 bits needs to be 0x3.
If not fix this, the final lowest 3 bits for page mapping is 0x1
which is marked as reserved.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
After relocation, when error happends, it is hard to track
ELR and LR with asm file objdumped from elf file.
So subtract the gd->reloc_off the reflect the compliation address.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
As discussed at [1], the Amlogic Meson GX SoCs can embed a BL31 firmware
and a secondary BL32 firmware.
Since mid-2017, the reserved memory address of the BL31 firmware was moved
and grown for security reasons.
But mainline U-Boot and Linux has the old address and size fixed.
These SoCs have a register interface to get the two firmware reserved
memory start and sizes.
This patch adds a dynamic reservation of the memory zones in the device tree bootmem
reserved memory zone used by the kernel in early boot.
To be complete, the memory zones are also added to the EFI reserved zones.
Depends on patchset "Add support for Amlogic GXL Based SBCs" at [2].
[1] http://lists.infradead.org/pipermail/linux-amlogic/2017-October/004860.html
[2] http://lists.infradead.org/pipermail/linux-amlogic/2017-November/005410.html
Changes since v1:
- switched the #if to if(IS_ENABLED()) to compile all code paths
- renamed function to meson_board_add_reserved_memory()
- added a mem.h header with comment
- updated all boards ft_board_setup()
Changes since RFC v2:
- reduced preprocessor load
- kept Odroid-C2 static memory mapping as exception
Changes since RFC v1:
- switch to fdt rsv mem table and efi reserve memory
- replaced in_le32 by readl()
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
[trini: Fix warning on khadas-vim over missing <asm/arch/mem.h>
Signed-off-by: Tom Rini <trini@konsulko.com>
This adds platform code for the Khadas VIM board based on a
Meson GXL (S905X) SoC with the Meson GXL configuration.
This initial submission supports UART, MMC/SDCard and Ethernet with the
Internal RMII PHY.
The meson-gxl-s905x-khadas-vim.dts is synchronised from the linux 4.13
stable tree as of 4.13.8.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
This adds platform code for the Libre Computer CC "Le Potato" board based on a
Meson GXL (S905X) SoC with the Meson GXL configuration.
This initial submission supports UART, MMC/SDCard and Ethernet with the
Internal RMII PHY.
The meson-gxl-s905x-libretech-cc.dts is synchronised from the linux 4.13
stable tree as of 4.13.8.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Switch P212 Ethernet init to the common Ethernet init function.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Switch Odroid-C2 Ethernet init to the common Ethernet init function.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Introduce a generic common Ethernet Hardware init function
common to all Amlogic GX SoCs with support for the
Internal PHY enable for GXL SoCs.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Now, lib/libfdt/fdt_wip.c is the same as scripts/dtc/libfdt/fdt_wip.c
Change the former to a wrapper of the latter.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
All the other fdt_*_region() functions are located in fdt_region.c,
while only fdt_find_regions() was added to fdt_wip.c, strangely.
Move it to the suitable place.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
In the moment our exception entry code needs 34 instructions, so we
can't use put it directly into the table entry, which offers "only"
32 instructions there. Right now we just put an unconditional branch
there, then use a macro to place the 34 instructions *per entry* after
that. That effectivly doubles the size of our exception table, which
is quite a waste, given that we use it mostly for debugging purposes.
Since the register saving part is actually identical, let's just convert
that macro into a function, and "bl" into it directly from the exception
slot, of course after having saved at least the original LR.
This saves us about 950 bytes of code, which is quite a relief for some
tight SPLs, in particular the 64-bit Allwinner ones.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Adjust this test to use the unit test framework. Drop the two existing
commands for running the tests and replace them with a single
'ut compression' command, with sub-commands.
Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: Continue to have ret = run_test_internal(...) in run_test so ret
is always initialized]
Signed-off-by: Tom Rini <trini@konsulko.com>
Include necessary headers explicitly without relying on indirect
header inclusion.
<common.h>, <malloc.h> are unneeded.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
The Linux derived log functions can be used anywhere and easily
turned on/off by CONFIG_LOGLEVEL.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
This header was renamed to rawnand.h in Linux.
The following is the corresponding commit in Linux.
commit d4092d76a4a4e57b65910899948a83cc8646c5a5
Author: Boris Brezillon <boris.brezillon@free-electrons.com>
Date: Fri Aug 4 17:29:10 2017 +0200
mtd: nand: Rename nand.h into rawnand.h
We are planning to share more code between different NAND based
devices (SPI NAND, OneNAND and raw NANDs), but before doing that
we need to move the existing include/linux/mtd/nand.h file into
include/linux/mtd/rawnand.h so we can later create a nand.h header
containing all common structure and function prototypes.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
This driver is highly dependent on the configuration from denali_dt.c
Please enable CONFIG_NAND_DENALI_DT if you use this driver.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
denali_setup_data_interface() is always used.
I put __maybe_unused for a temporal use, then forgot to delete it.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Remove unnecessary DECLARE_GLOBAL_DATA_PTR and header includes.
<common.h> has been replaced with <linux/errno.h> and <linux/printk.h>.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Commit 72443c7f7d ("mtd: cfi: Add support for status register
polling") added a feature check to determine if status register
is available for certain flash chips. The "lower software bits"
register used to determine this feature is not backward compati-
ble. Older flash chips without this feature has reserved value
0xff. Instead of checking "lower software bits" register, use
CFI primary vendor-specific extended query. Since CFI version
1.4, software features can be read from offset 0x53 according to
document AN201168 from Cypress.
Signed-off-by: York Sun <york.sun@nxp.com>
CC: Marek Vasut <marek.vasut@gmail.com>
Tested-by: Marek Vasut <marek.vasut@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
The u-boot.sym file is scanned to find unit test suites for execution. At
present it only finds those whose names start with 'dm' or 'env'. This
code is buried in the bowels of the test code so when adding a new suite
it is not easy to discover why it is ignored by the test framework.
There seems to be no need to make this restriction. Drop it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Stephen Warren <swarren@nvidia.com>
At present the test setup is somewhat mixed with the test itself. But if
the test setup fails (which it should not) then the test is actually
invalid. Put all the test buffers and sizes in a struct and separate out
the core code into a function.
This will make it easier to move the code to use the unit test framework.
Signed-off-by: Simon Glass <sjg@chromium.org>
The logic to either iterate through a list of tests or pick a named test
is common to at lest two test suits. Move this logic into a new function
and call it from the environment tests.
Signed-off-by: Simon Glass <sjg@chromium.org>
The kernel gets the ethernet MAC from the ethaddr variable, the omap boards for
devices with USB based eth adapters just set the usbethaddr which doesn't appear
to get passed to the kernel. The same Raspberry Pi code sets both ethaddr and
usbethaddr so lets do that so linux (tested 4.13 and 4.14) get a static rather
than a random MAC address, while not regressing users of usbethaddr.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
These are actually different bits, and since some monitors (Benq BL2420PT)
have modes with different HSYNC and VSYNC polarity, we should set them
independently
Tested on Pine64-LTS with Benq BL2420PT monitor.
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Some H5 boards are designed to start at 1.1V CPUx voltage (e.g. Nano Pi
NEO2), which may not work properly at 1008MHz if the chip's quality is
not so good.
Lower the default CPUx frequency of H5 to 816MHz.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Jagan Teki <jagan@openedev.com>
The DCLK_VOP_DIV_CON_MASK should cover only bits 8 through 15.
Fix this to remove an "integer-overflow on shifted constant" warning.
Fixes: 9246d9e ("rockchip: rk3128: add clock driver")
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
The PLL selector field for NANDC is only 2 bits wide.
This fixes an 'int-overflow on shift' warning.
Fixes: 9246d9e ("rockchip: rk3128: add clock driver")
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Depending on your compiler, when compiling the hello world efi binary
with -Os, gcc might think it's a smart idea to replace common patterns
such as memory copies with explicit calls to memcpy().
While that sounds great at first, we don't have any memcpy() available
in our helloworld build target. So let's indicate to gcc that we really
do want to have the code be built as freestanding.
Fixes: bbf75dd9 ("efi_loader: output load options in helloworld")
Signed-off-by: Alexander Graf <agraf@suse.de>
Commit 884bcf6f65 (efi_loader: use proper device-paths for partitions) tried
to introduce the el torito scheme to all partition table types: Spawn
individual disk objects for each partition on a disk.
Unfortunately, that code ended up creating partitions with offset=0 which meant
that anyone accessing these objects gets data from the raw block device instead
of the partition.
Furthermore, all the el torito logic to spawn devices for partitions was
duplicated. So let's merge the two code paths and give partition disk objects
good offsets to work from, so that payloads can actually make use of them.
Fixes: 884bcf6f65 (efi_loader: use proper device-paths for partitions)
Reported-by: Yousaf Kaukab <yousaf.kaukab@suse.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
Otherwise with GUID partition types you would end up with things like:
.../HD(Part0,Sig6252c819-4624-4995-8d16-abc9cd5d4130)/HD(Part0,MBRType=02,SigType=02)
Signed-off-by: Rob Clark <robdclark@gmail.com>
[agraf: rebased]
Signed-off-by: Alexander Graf <agraf@suse.de>
Provide comments for efi_convert_device_node_to_text()
and efi_convert_device_path_to_text().
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
To avoid duplicate coding provide a helper function that
initializes an EFI object and adds it to the EFI object
list.
efi_exit() is the only place where we dereference a handle
to obtain a protocol interface. Add a comment to the function.
Suggested-by: Alexander Graf <agraf@suse.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
The handle of a loaded image is the value of the handle
member of the loaded image info object and not the
address of the loaded image info.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Check that helloworld.efi returns EFI_SUCCESS.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
We need to test if we pass a valid image handle when loading
and EFI application. This cannot be done in efi_selftest as
it is not loaded as an image.
So let's enhance helloworld a bit.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Add a missing line feed for an error message.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
As the selftest is not compiled as an EFI binary we do not
need special compiler flags.
This avoids the checkarmreloc error on vexpress_ca15_tc2.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Use efi_add_protocol to install protocols.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Provide a test for the EFI_DEVICE_PATH_TO_TEXT_PROTOCOL protocol.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
The current implementation of efi_locate_device_path does not match
the UEFI specification. It completely ignores the protocol
parameters.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
We need to implement to different functions for the
EFI_DEVICE_PATH_TO_TEXT_PROTOCOL:
ConvertDeviceNodeToText
ConvertDevicePathToText
A recent patch screwed up efi_convert_device_node_to_text
to expect a device path and not a node.
The patch makes both service functions work again.
efi_convert_device_node_to_text is renamed to
efi_convert_single_device_node_to_text and
efi_convert_device_node_to_text_ext is renamed to
efi_convert_device_node_to_text to avoid future
confusion.
A test of ConvertDeviceNodeToText will be provided in
a follow-up patch.
Fixes: adae4313cd efi_loader: flesh out device-path to text
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
efi_dp_str is meant to print a device path and not a device
node.
The old coding only worked because efi_convert_device_node_to_text
was screwed up to expect paths instead of nodes.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
In the format specifier we want to specify the maximum width
in case an ending \0 is missing.
So slen must be used as precision and not as field width.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
When trying to load an image from a non-existent USB key, U-Boot v2017.11
crashes on my x86 platform:
=> load usb 0:1 03000000 abc
General Protection
EIP: 0010:[<7b59030d>] EFLAGS: 00010286
Original EIP :[<fff4330d>]
...
This used to work in v2017.09. Testing has shown, that this bug was
introduced with patch 95c5553e [efi_loader: refactor boot device and
loaded_image handling].
This patch now checks if a valid "desc" is returned from blk_get_dev()
and only continues when "desc" is available. Resulting in this cmd
output (again):
=> load usb 0:1 03000000 abc
** Bad device usb 0 **
Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Zero partition_signature in the efi_device_path_hard_drive_path
structure when signature_type is 0 (no signature) as required by the
UEFI specification.
This is required so that efi_dp_match() will work as expected
when doing memcmp() comparisons. Previously uninitialised memory
would cause it not match nodes when it should have when the signature
type was not GUID.
Corrects a problem where the loaded image protocol would not return a
device path with MEDIA_DEVICE causing the OpenBSD bootloader to fail
on rpi_3 and other targets.
v2: Also handle signature_type 1 (MBR) as described in the specification
Signed-off-by: Jonathan Gray <jsg@jsg.id.au>
Tested-by: Artturi Alm <artturi.alm@gmail.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
Use helper functions efi_created_handle and efi_add_protocol
for creating the console handles and instaling the respective
protocols.
This change is needed if we want to move from an array of
protocols to a linked list of protocols.
Eliminate EFI_PROTOCOL_OBJECT which is not used anymore.
Currently we have not defined protocol interfaces to be const.
So efi_con_out and efi_console_control cannot be defined as const.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Use helper function efi_search_protocol.
Do not print protocol guid twice in debug mode.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Use function efi_search_obj, efi_search_protocol and
efi_remove_protocol to simplify the coding.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Use helper function efi_search_protocol in efi_search.
Add missing comments.
Put default handling into default branch of switch statement.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
This patch provides helper functions to manage protocols.
efi_search_protocol - find a protocol on a handle
efi_add_protocol - install a protocol on a handle
efi_remove_protocol - remove a protocol from a handle
efi_remove_all_protocols - remove all protocols from a handle
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Use efi_uintn_t instead of unsigned long.
EFI_GRAPHICS_OUTPUT_BLT_OPERATION is an enum. If we don't
define an enum we have to pass it as u32.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
The argument of efi_search_obj is not changed so it should
be marked as const.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
efi_dp_match does not change its arguments.
So they should be marked as const.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Calloc may return NULL. So we must check the return value.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Calloc may return NULL. We should check the return value.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Calloc may return NULL. We have to check the return value.
Fixes: be8d324191 efi_loader: Add GOP support
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Implement UninstallMultipleProtocolInterfaces.
The efi_uninstall_multipled_protocol_interfaces tries to
uninstall protocols one by one. If an error occurs all
uninstalled protocols are reinstalled.
As the implementation efi_uninstall_protocol_interface is
still incomplete the function will fail.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
efi_install_protocol_interface should provide the created or
provided handle in the debug output.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
EFI_HANDLEs are used both in boottime and in runtime services.
efi_search_obj is a function that can be used to validate
handles. So let's make it accessible via efi_loader.h.
We can simplify the coding using list_for_each_entry.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Check the parameters in efi_locate_handle.
Use list_for_each_entry instead of list_for_each.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Consistenly use efi_uintn_t wherever the UEFI spec uses
UINTN in boot services interfaces.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
UINTN is used in the UEFI specification for unsigned integers
matching the bitness of the CPU.
Types in U-Boot should be lower case. The patch replaces it
by efi_uintn_t.
Suggested-by: Simon Glass <sjg@chromium.org>
Suggested-by: Rob Clark <robdclark@gmail.com>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
As we now have EFI_CALL there is no need for separate
functions efi_uninstall_protocol_interface_ext and
efi_uninstall_protocol_interface.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
As we now have EFI_CALL there is no need for separate
functions efi_install_protocol_interface_ext and
efi_install_protocol_interface.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
This unit test checks the following protocol services:
InstallProtocolInterface, UninstallProtocolInterface,
InstallMultipleProtocolsInterfaces,
UninstallMultipleProtocolsInterfaces,
HandleProtocol, ProtocolsPerHandle,
LocateHandle, LocateHandleBuffer.
As UninstallProtocolInterface and UninstallMultipleProtocolsInterfaces
are not completely implemented a TODO message will shown for
their failure.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Constants should be capitalized.
So rename the values of enum efi_locate_search_type.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
The parent_handle of the loaded image must be set.
Set the system table.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
The following services are tested:
OutputString, TestString, SetAttribute.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Clear environment variable efi_selftest before executing the
default tests.
Provide a test verifying that the EFI watchdog
reboots the system upon timeout.
The test depends on CONFIG_CMD_EFI_SELFTEST=y.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
A test is added that verifies that the watchdog timer actually
causes a reboot upon timeout. The test is only executed on
request using
setenv efi_selftest watchdog reboot
bootefi selftest
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Use environment variable bootargs used as load options
for bootefi payloads.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
After executing bootefi selftest
* restore GD
* unlink the load image handle
* return 0 or 1 and not a truncated efi_status_t.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Environment variable efi_selftest is passed as load options
to the selftest application. It is used to select a single
test to be executed.
The load options are an UTF8 string. Yet I decided to keep
the name propertiy of the tests as char[] to reduce code
size.
Special value 'list' displays a list of all available tests.
Tests get an on_request property. If this property is set
the tests are only executed if explicitly requested.
The invocation of efi_selftest is changed to reflect that
bootefi selftest with efi_selftest = 'list' will call the
Exit bootservice.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Move duplicate code to the new function efi_st_do_tests.
Suggested-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
If the compared memory areas match the return value should be 0.
We should not use the unrelated constant EFI_ST_SUCCESS.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Currently we pass bootefi_device_path and bootefi_image_path as
device and image path without initializing them. They may carry
values from previous calls to bootefi.
With the patch the variables are initialized valid dummy values.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Where ulong or unsigned long are used to hold an EFI status
code we should consistenly use efi_status_t.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Use a define to detect double inclusion of efi_loader.h.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Provide a conversion function from utf8 to utf16.
Add missing #include <linux/types.h> in include/charset.h.
Remove superfluous #include <common.h> in lib/charset.c.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
The test verifies that resetting the watchdog timer ensures
that it is not called during the timeout period.
Testing that the watchdog timer actually executes a reset
would require a test outside the efi_selftest framework.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
The watchdog is initialized with a 5 minute timeout period.
It can be reset by SetWatchdogTimer.
It is stopped by ExitBoottimeServices.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
To avoid a forward declaration move efi_search_obj before
all protocol services functions.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
On the RK3399-Q7, we want to trigger a full platform reset (so the
various software stacks supported don't have to deal with the same
complexities over and over again) in case that anything other than a
power-on reset occurred.
To do so, this defines the /config/sysreset-gpio property and has it
point to a GPIO that will perform a power-on reset of the entire
platform.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
The reset circuitry in the RK3399 only resets 'almost all logic' when
a software reset is performed. To make our software maintenance
easier in the future, we want to have the option (controlled by a DTS
property) to force all reset causes other than a power-on reset to
trigger a power-on reset via a GPIO trigger.
This adds the necessary support to the rk3399-puma (i.e. RK3399-Q7)
board-support and the documentation for the new property
(sysreset-gpio) within the /config-node.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
USB1 is connected to the on-module USB 3.0 hub and power to the hub
(actually it's a reset signal, modeled as a fixed regulator, that will
be released) should be enabled only during the first probing of the
device to avoid the hub from entering its low-power mode (where it
tries to attach on a fixed interval, but we always miss the timeslot
when U-Boot has the controller listening).
This adds a 'tsd,usb-port-power' stringlist to enable the
infrastructure in the board-specific usb_hub_reset_devices to find and
control the fixed regulator associated with control of the USB hub.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Jakob Unterwurzacher <jakob.unterwurzacher@theobroma-systems.com>
For some versions of the RK3399-Q7 (at least revisions v1.1 and v1.2
are affected), we need to turn on the power for the port connected to
the on-module USB hub only when the device is probed for the first
time to ensure that the hub does not enter a low-power mode (that
U-Boot's USB stack can't deal with).
Note that this is needed for U-Boot only, as Linux eventually manages
to attach the hub even when it has entered into its low-power state
(when the hub wakes up the next time) after a few seconds.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Jakob Unterwurzacher <jakob.unterwurzacher@theobroma-systems.com>
Even if the board-specific directory Makefile doesn't have any
targets, it still needs to exist.
This adds a minimal Makefile for the board/rockchip/evb_rk3128
directory and a evk-rk3128.c (as built-in.o needs to be built
for every directory that a Makefile gets run for).
Fixes: c7a6866 ("rockchip: rk3128: add evb-rk3128 support")
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Add dts binding header for rk3128, files origin from kernel.
Series-Changes: 2
- fix i2c address
- add saradc and usb phy node
- emmc using fifo mode for there is no dma support in rk3128 emmc
- add some clock id in cru.h
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
With some of the recent cleanups (e.g. moving the DRAM controller
drivers for Rockchip devices to drivers/ram/rockchip), the files
and paths listed in MAINTAINERS no longer covered what really is
looked after as part of the Rockchip port.
This commit updates the files/paths listed in MAINTAINERS for the
Rockchip port. I am certain, though, that this will have missed some
additional paths that should have been included...
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Rework the ULCB CPLD driver and make it into a sysreset driver,
since that is what the ULCB CPLD driver is mostly for.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
The order of members in struct hws_topology_map is cas_wl, cas_l. The
comments in the original db-88f6820-gp.c had this wrong and have been
copied to other Armada-385 based boards. Practically this hasn't made a
difference since all these boards set both cas_wl and cas_l to 0
(autodetect) but if there were ever a board that did need to set these
explicitly they would run into unexpected issued.
Update the comments to reflect the correct order of structure members.
Reported-by: Tobi Wulff <tobi.wulff@alliedtelesis.co.nz>
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
CONFIG_ENV_IS_IN_NAND has been removed in commit 2be296538e (Convert
CONFIG_ENV_IS_IN_MMC/NAND/UBI and NOWHERE to Kconfig).
CONFIG_ENV_IS_IN_SPI_FLASH has been removed in commit 91c868fe7c
(Convert CONFIG_ENV_IS_IN_SPI_FLASH to Kconfig). The environment #ifdef
is now empty. Remove it.
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Stefan Roese <sr@denx.de>
Check if we are booting from NAND and let the bootrom
continue to load the rest of the bootloader
Signed-off-by: Sean Nyekjaer <sean.nyekjaer@prevas.dk>
Signed-off-by: Stefan Roese <sr@denx.de>
It's the first 8 bits of the bootrom error register that
contain the boot error/fallback error code. Let's check that
and continue to boot from UART.
Signed-off-by: Sean Nyekjaer <sean.nyekjaer@prevas.dk>
Signed-off-by: Stefan Roese <sr@denx.de>
bbt_mirror_descr and bbt_main_descr is defined but not used
when compiling without CONFIG_SYS_NAND_USE_FLASH_BBT set.
Signed-off-by: Sean Nyekjaer <sean.nyekjaer@prevas.dk>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch removes the inclusion of the libgcc math functions and
replaces them by functions coded in C, taken from the coreboot
project. This makes U-Boot building more independent from the toolchain
installed / available on the build system.
The code taken from coreboot is authored from Vadim Bendebury
<vbendeb@chromium.org> on 2014-11-28 and committed with commit
ID e63990ef [libpayload: provide basic 64bit division implementation]
(coreboot git repository located here [1]).
I modified the code so that its checkpatch clean without any
functional changes.
[1] git://github.com/coreboot/coreboot.git
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Currently X86 does not properly support distro defaults.
This patch is only a partial fix.
It provides the name of the bootloader EFI application
for the X86 architecture.
The architecture dependent file names are defined in the UEFI
specification.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This reverts commit 13c531e52a.
The error message with FIT style image mentioned in the above commit
only happens when booting using FIT image containing bzImage kernel
and without setup node (setup.bin). The current documentation for
x86 FIT support in doc/uImage.FIT/x86-fit-boot.txt mentions that
kernel's setup.bin file is required for building x86 FIT images.
The above commit breaks FIT images generated as described in the
documentation. Revert it to allow booting with images built in the
documented way.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
Acked-by: Bin Meng <bmeng.cn@gmail.com>
x86_vendor_name is defined as
static const char *const x86_vendor_name[]
So its elements should not be compared to 0.
Remove superfluous paranthesis.
Problem identified with Coccinelle.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Adjust VGA rom address to 0xfffb0000 so that u-boot.rom image
can be built again.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
Acked-by: Bin Meng <bmeng.cn@gmail.com>
ROM has been made read-only in qemu recently (namely commit 208fa0e4:
"pc: make 'pc.rom' readonly when machine has PCI enabled"). So this
patch restores compatibility between U-Boot and qemu.
Signed-off-by: Anton Gerasimov <anton@advancedtelematic.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: mention qemu commit title in the commit message]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Before this patch one could receive following errors when executing "fatls"
command on machine with cache enabled (ex i.MX6Q) :
=> fatls mmc 0:1
CACHE: Misaligned operation at range [4f59dfc8, 4f59e7c8]
CACHE: Misaligned operation at range [4f59dfc8, 4f59e7c8]
ERROR: v7_outer_cache_inval_range - start address is not aligned - 0x4f59dfc8
ERROR: v7_outer_cache_inval_range - stop address is not aligned - 0x4f59e7c8
CACHE: Misaligned operation at range [4f59dfc8, 4f59e7c8]
CACHE: Misaligned operation at range [4f59dfc8, 4f59e7c8]
ERROR: v7_outer_cache_inval_range - start address is not aligned - 0x4f59dfc8
ERROR: v7_outer_cache_inval_range - stop address is not aligned - 0x4f59e7c8
To alleviate this problem - the calloc()s have been replaced with
malloc_cache_aligned() and memset().
After those changes the buffers are properly aligned (with both start
address and size) to SoC cache line.
Fixes: 09fa964bba ("fs/fat: Fix 'CACHE: Misaligned operation at range' warnings")
Suggested-by: Lukasz Majewski <lukma@denx.de>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
This board is based on the Atmel sama5d3 eval boards.
Supporting the following features:
- Boot from NAND Flash
- Ethernet
- FIT
- SPL
Signed-off-by: Ben Whitten <ben.whitten@lairdtech.com>
Signed-off-by: Dan Kephart <dan.kephart@lairdtech.com>
This board is based on the Atmel 9x5 eval board.
Supporting the following features:
- Boot from NAND Flash
- Ethernet
- FIT
- SPL
Signed-off-by: Ben Whitten <ben.whitten@lairdtech.com>
Signed-off-by: Dan Kephart <dan.kephart@lairdtech.com>
GCC 7.1 seems to be smart enough to track val through the various
static inline functions, but not smart enough to see that val will
always be initialised when no error is returned. This triggers
the following warning:
env/mmc.c: In function 'mmc_get_env_addr':
env/mmc.c:121:12: warning: 'val' may be used uninitialized in this function [-Wmaybe-uninitialized]
To make it easier for compiler to understand what is going on, let's
initialise val.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Building spl with CONFIG_OF_EMBED enabled results in an error message
on my board: "SPL image too big". This is because the fdtgrep build
step is only executed for CONFIG_OF_SEPARATE.
Fix this by moving the fdtgrep build step ('cmd_fdtgreo') from
scripts/Makefile.spl to dts/Makefile so that the reduced dtb is
available for all kinds of spl builds.
The resulting variable name for the embedded device tree blob changes,
too, which is why common.h and fdtdec.c have tiny changes.
Signed-off-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
In U-Boot, this device tree is compatible with both the Torpedo and
SOM-LV kits. Let's rename it in the device tree since the U-Boot code and
show a more generic OMAP3 name. The code auto detects between the two and
loads the proper DTB file for Linux. This would eliminate the SOM-LV showing
the name Torpedo during boot and hopefully eliminate some confusion.
Signed-off-by: Adam Ford <aford173@gmail.com>
It is unwise to first dereference a variable
and then to check if it was NULL.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Marek Behun <marek.behun@nic.cz>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
When copying the command line buffer the target array should
at least have the same size.
Cf. definition of console_buffer in common/cli_readline.c.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
use ALLOC_CACHE_ALIGN_BUFFER_PAD for mbr header allocation
in stack to fix alloc issue in is_gpt_valid()
this patch fix also issue for GPT partition handling
with blocksize != 512 in set_protective_mbr()
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Add a header for SAMA5D2 SMC since it's not compatible with
SAMA5D3 one.
Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com>
[wenyou: fix the wrong base address of the SMC register]
Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
The capabilities have default values which doesn't reflect the reality
when it concerns the base clock and the mul value. Use a fixe rate
for the gck. 240 MHz is an arbitrary choice, it is a multiple of the
maximum SD clock frequency handle by the controller and it allows to
get a 400 kHz clock for the card initialisation.
Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com>
Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
Differentiate the generic clock source selection value from the parent
clock index to fix the incorrect assignment of the generic clock
source selection.
Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
To get the same behavior as the Linux driver, instead of selecting
the closest inferior rate, select the closest inferior or superior
rate
Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com>
Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
What the AT91_UTMI depends on SPL_DM isn't right. AT91_UTMI is not
only used in SPL, also in other place, even if SPL_DM isn't enabled.
Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
MPU's region setup can be factorized between STM32F4/F7/H7 SoCs family
and used a common MPU's region config.
Only one exception for STM32H7 which doesn't have device area
located at 0xA000 0000.
For STM32F4, configure_clocks() need to be moved from arch_cpu_init()
to board_early_init_f().
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Vikas Manocha <vikas.manocha@st.com>
In order to factorize code between STM32F4 and STM32F7
migrate all structs related to RCC clocks in include/stm32_rcc.h
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Vikas Manocha <vikas.manocha@st.com>
MMC block needs 48Mhz source clock, for that we choose
to select the SAI PLL.
Update also stm32_clock_get_rate() to retrieve the MMC
clock source needed in MMC driver.
STM32F4 uses a different RCC variant than STM32F7. For STM32F4
sdmmc clocks bit are located into dckcfgr register whereas there
are located into dckcfgr2 registers on STM32F7.
In both registers, bits CK48MSEL and SDMMC1SEL are located at
the same position.
Signed-off-by: Christophe Priouzeau <christophe.priouzeau@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Vikas Manocha <vikas.manocha@st.com>
Like STM32H7, now STM32F4/F7 clock drivers are binded by
MFD stm32_rcc driver.
This also allows to add reset support to STM32F4/F7 SoCs family.
As Reset driver is not part of SPL supported drivers, don't bind it
in case of SPL to avoid that stm32_rcc_bind() returns an error.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Vikas Manocha <vikas.manocha@st.com>
This allows to add rcc MFD support to stm32f746-disco board
This rcc MFD driver manages clock and reset for STM32 SoCs family
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Vikas Manocha <vikas.manocha@st.com>
STM32F4 doesn't get rcc.h file, to avoid compilation
issue, migrate RCC related defines from rcc.h to driver
file and remove rcc.h file.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Vikas Manocha <vikas.manocha@st.com>
Now that clk_stm32f7.c manages clocks for both STM32F4 and F7 SoCs
rename it to a more generic clk_stm32f.c
Fix also some checkpatch errors/warnings.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Vikas Manocha <vikas.manocha@st.com>
STM32F4 and STM32F7 RCC clock IP are very similar.
Same driver can be used to managed RCC clock for
these 2 SoCs.
Differences between STM32F4 and F7 will be managed using
different compatible string :
_ overdrive clock is only supported by STM32F7
_ different sys_pll_psc parameters can be used between STM32F4
and STM32F7.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Vikas Manocha <vikas.manocha@st.com>
Align the RCC compatible string with the one used by kernel.
It will allow to use the same clock driver for STM32F4
and STM32F7 and to manage the differences between the 2 SoCs
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Vikas Manocha <vikas.manocha@st.com>
Add a dedicated stm32f7 compatible string to use clk_stm32f7
driver with both STM32F4 and STM32F7 SoCs.
It will be needed to manage differences between these 2 SoCs.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Vikas Manocha <vikas.manocha@st.com>
PWR IP is used to enable over-drive feature in
order to reach a higher frequency.
Get its base address from DT instead of hard-coded value
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Vikas Manocha <vikas.manocha@st.com>
This node is needed to enable performance mode
when system frequency is set up to 200Mhz.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Vikas Manocha <vikas.manocha@st.com>
Up to now we were able to read/write environment data from/to UBI
volumes only indirectly by gluebi driver. This driver creates NAND MTD
on top of UBI volumes, which is quite a workaroung for this use case.
Add support for direct read/write UBI volumes in order to not use
obsolete gluebi driver.
Forward-ported from this patch:
http://patchwork.ozlabs.org/patch/619305/
Original patch:
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Forward port:
Signed-off-by: S. Lockwood-Childs <sjl@vctlabs.com>
atcspi200 is Andestech spi ip which is embedded in
AE3XX and AE250 platforms. So rename as atcspi200
will be more reasonable to be used in different
platforms.
Signed-off-by: Rick Chen <rick@andestech.com>
ATCPIT100 is often used in AE3XX platform which is
based on NDS32 architecture recently. But in the future
Andestech will have AE250 platform which is embeded
ATCPIT100 timer based on RISCV architecture.
Signed-off-by: Rick Chen <rick@andestech.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
ATCPIT100 is Andestech timer IP which is embeded
in AE3XX and AE250 boards. So rename AE3XX to
ATCPIT100 will be more make sence.
Signed-off-by: rick <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
It will be work fine with unsigned long declaretion in timer
register struct when system is 32 bit. But it will not work
well when system is 64 bit. Replace it by u32 and verify both
ok in 32/64 bit.
Signed-off-by: Rick Chen <rick@andestech.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
When requesting a GPIO, set the PFC GPSR register to GPIO mode,
otherwise the GPIO cannot work.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Add hook into the PFC driver to allow the GPIO driver to toggle
GPSR registers into GPIO mode when GPIO is requested.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Add code to handle single pins nodes from DT in addition to already
support groups handling.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Stop using the old ad-hoc SH I2C driver and use the new RCar IIC
driver instead. The SH I2C driver should be deprecated and removed
eventually.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Mark the PRR as u-boot,dm-pre-reloc in all Gen3 board DTs as it is
needed very early and turn on the CONFIG_SYSCON to allow the PRR
driver to bind as a syscon uclass.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Implement DM driver for the Renesas PRR into RCar cpu info and convert
all users with DM and OF enabled to this new driver. This means all of
the boards with DM and OF enabled can fetch PRR address from DT, which
is useful on ie. V3M which has different PRR address than the rest of
Gen3 SoCs.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
As we have a proper clock framework driver, these macros are not
needed, so drop them and clean up the whitelist.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
These macros are no longer needed since the DRAM configuration is parsed
from the DT. Drop them all.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Drop the ad-hoc DRAM configuration with macros and just decode
the DRAM configuration from device tree instead. This makes it
far cleaner and easier.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Since checkboard() is gone, rmobile_sysinfo is also pointless on Gen3.
Furthermore, nuke ad-hoc CONFIG_RCAR_BOARD_STRING which is also dead.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
The checkboard() function showing hard-coded board model for which the
U-Boot was built is superseded on Gen3 by show_board_info() displaying
the Model from device tree. Add small ifdef to stop compiling the
function into U-Boot.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
We can now use rmobile_get_cpu_type() to check the CPU ID rather
than using a macro, make it so.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Since both R8A7795 and R8A7796 now use the same files, unify the
Makefile entry to CONFIG_RCAR_GEN3.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Unify the R7A7795 and R8A7796 memory maps in memmap-gen3 and, for now,
select which one is used based on which SoC is selected. Since this is
done in C code instead of statically assigned now, the decision can be
taken by PRR SoC match as well, which will be done in a subsequent patch.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Replace the ad-hoc values in the PRR CPU ID table with macros,
so that users can use rmobile_get_cpu_type() can compare the
returned value with these macros to figure out on which CPU they
are running.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Since the Gen3 clock driver now has a .remove callback, it is no
longer necessary to shut the clock down before booting Linux in the
arch_preboot_os hook. Stop using it and while doing so, remove all
the ad-hoc config options which this hook used.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
These old PFC tables are no longer needed as there is now a proper
PFC pinmux driver in drivers/pinctrl/renesas . Remove them .
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Pull out the GIC macros from the board configuration files
into the common Gen3 configuration file since these macros
are the same for all Gen3 systems.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
This command is useless on Salvator-X as it is reading DRAM info from
SPD. We have no SPD on Salvator-X.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Since the RCar Gen3 no longer uses the SH SDHI driver, but rather
uses the Matsushita SD driver, which loads all the properties from
device tree, these macros are no longer used, remove them.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Enable the Micrel KSZ90x1 driver on ULCB, since the board is populated
with KSZ9031 and without this driver, the PHY cannot be operated.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
The eMMC is 1V8 device only and the signaling is always 1V8,
fix the DT for ULCB to describe the hardware correctly.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Fix handling of the reset GPIO. Drop the _nodev() suffix from the
gpio_request_by_name() call as there is now a proper DM capable
GPIO driver. Also check if the GPIO is valid before freeing it in
remove path, otherwise U-Boot will crash.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Add driver for the RCar IIC or DVFS I2C controller. This driver is based
on the SH I2C driver, but supports DM and DT probing as well as modern
I2C framework API.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Unify the CONFIG_R8A7795 and CONFIG_R8A7796 as CONFIG_RCAR_GEN3
so that every time we add a new SoC, we won't have to add more
stuff to this list.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Add xHCI entry into the clock tables, so that the xHCI USB driver
can enable the clock for the xHCI block via clock framework.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
The MSTP registers were poked in boards/renesas/rcar-common/common.c
in arch_preboot_os hook thus far to shut down the clock before Linux
takes over. With DM, this is no longer needed and we can do the same
in the clock driver .remove callback. This patch adds such a .remove
callback for R8A7795 and R8A7796.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
It is legal to have multiple /memory nodes in a device tree . Currently,
fdtdec_setup_memory_size() only supports parsing the first node . This
patch extends the function such that if a particular /memory node does
no longer have further "reg" entries and CONFIG_NR_DRAM_BANKS still
allows for more DRAM banks, the code moves on to the next memory node
and checks it's "reg"s. This makes it possible to handle both systems
with single memory node with multiple entries and systems with multiple
memory nodes with single entry.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Simon Glass <sjg@chromium.org>
To help out with the RCar/RMobile upstreaming, I'm adding myself
as the RCar/RMobile maintainer.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Xilinx changes for v2018.1
Zynq:
- Add support for Syzygy and cc108 boards
- Add support for mini u-boot configurations (cse)
- dts updates
- config/defconfig updates in connection to Kconfig changes
- Fix psu_init handling
ZynqMP:
- SPL fixes
- Remove slcr.c
- Fixing r5 startup sequence
- Add support for external pmufw
- Add support for new ZynqMP chips
- dts updates
- Add support for zcu102 rev1.0 board
Drivers:
- nand: Support external timing setting and board init
- ahci: Fix wording
- axi_emac: Wait for bit, non processor mode, readl/write conversion
- zynq_gem: Fix SGMII/PCS support
This patch uses readl and writel instead of in_be32 and
out_be32 for io ops as these internally uses readl,
writel for microblaze and for Zynq, ZynqMP there is
no need of endianness conversion and readl, writel
should work straightaway. This patch starts supporting
the driver for Zynq and ZynqMP platforms.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Dont enable SGMII and PCS selection if internal PCS/PMA
is not used, by getting the info about internal/external
PCS/PMA usage from dt property "is-internal-phy".
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Use more accurate description for Xilinx Zynq and ZynqMP based platforms.
With using driver model there shouldn't be a need to create separate
Kconfig config options.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
The chapter in which the table explaining the image format changed
chapter as the document evolved. This should help people track the
info down faster.
Signed-off-by: Jean-Francois Dagenais <jeff.dagenais@gmail.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Sparse is return warning about this:
arch/arm/mach-zynq/slcr.c: In function 'zynq_slcr_get_mio_pin_status':
arch/arm/mach-zynq/slcr.c:185:16: warning: comparison between signed and
unsigned integer expressions [-Wsign-compare]
for (i = 0; i < ARRAY_SIZE(mio_periphs); i++) {
^
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Add proper support for EMIT_WRITE operation which is write only.
Do not use EMIT_MASKWRITE which is read-modify-write.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This patch is based on work done in topic board where the first address
word also storing operation which should be done. This is reducing size
of configuration data.
This patch is not breaking an option to copy default ps7_init_gpl* files
from hdf file but it is doing preparation for ps7_init* consolidation.
The patch is also marking ps7_config as weak function.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Add missing declaration to header.
Warning log:
arch/arm/mach-zynq/spl.c:94:12: warning: symbol 'ps7_post_config' was
not declared. Should it be static?
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Add support for non processor mode, this mode doesn't have
access to some of the registers and hence this patch
bypasses it and also length has to be calculated from
status instead of app4 in this mode.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
U-Boot is generally flashed to a MIPS Boston development board by means
of a .mcs file which Xilinx Vivado software can write to the flash
present on the board. As such we'd generally want to produce an mcs file
when building U-Boot to target the Boston board. Introduce a make target
for u-boot.mcs which generates it using the srec_cat tool available from
the SRecord project, and build it by default when srec_cat is present.
Signed-off-by: Paul Burton <paul.burton@mips.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: u-boot@lists.denx.de
Generally we load Linux kernels on Boston boards in the form of FIT
images containing a compressed kernel binary. Linux is linked at
0x80100000 and so we need to decompress the kernel binary to that
address, however this is our default load address which means that
unless explicitly avoided we hit a decompression error as the
uncompressed kernel binary overwrites its compressed version from the
FIT image.
Avoid this by adjusting CONFIG_SYS_LOAD_ADDR to 0x88000000 (or
0xffffffff88000000 for MIPS64 builds) which avoids the address overlap
between compressed & uncompressed kernel binaries.
Signed-off-by: Paul Burton <paul.burton@mips.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: u-boot@lists.denx.de
If we run on a CPU which doesn't implement a particular cache then we
would previously get stuck in an infinite loop, executing a cache op on
the first "line" of the missing cache & then incrementing the address by
0. This was being avoided for the L2 caches, but not for the L1s. Fix
this by generalising the check for a zero line size & avoiding the cache
op loop when this is the case.
Signed-off-by: Paul Burton <paul.burton@mips.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: u-boot@lists.denx.de
When writing code, for example during relocation, we ensure that the
icache has a coherent view of the new instructions with a call to
flush_cache(). This handles the bulk of the work to ensure the new
instructions will execute as expected, however it does not ensure that
the CPU pipeline doesn't already contain instructions taken from a stale
view of the affected memory. This could theoretically be a problem for
relocation, but in practice typically isn't because we sync caches for
enough code after the entry point of the newly written code that by the
time the CPU pipeline might possibly fetch any of it we'll have long ago
written it back & invalidated any stale icache entries. This is however
a problem for shorter regions of code.
In preparation for later patches which write shorter segments of code,
ensure any instruction hazards are cleared by flush_cache() by
introducing & using a new instruction_hazard_barrier() function which
makes use of the jr.hb instruction to clear the hazard.
Signed-off-by: Paul Burton <paul.burton@mips.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: u-boot@lists.denx.de
A typical use of cache maintenance functions is to force writeback of
data which a device is about to read using DMA - for example a
descriptor or command structure. Such users of cache maintenance
functions require that operations on the cache have completed before
they proceed to instruct a device to read memory. This requires that we
place a completion barrier (ie. sync instruction) between the cache ops
and whatever write informs the device to perform DMA.
Whilst strictly speaking this isn't all users of the cache maintenance
functions & we could instead place the barriers in the drivers that
require them, it would be much more invasive to do so than to just have
the barrier be the default by placing it in the cache functions
themselves. The cost is low enough that it shouldn't matter to us in any
rare cases that we use the cache functions when not performing DMA.
Signed-off-by: Paul Burton <paul.burton@mips.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: u-boot@lists.denx.de
MIPS is no longer a part of Imagination Technologies, and as such my
@imgtec.com email address will soon cease to function. This patch
updates occurrances of it with my new @mips.com email address, and adds
an entry in .mailmap such that git (& tools such as get_maintainer.pl
when examining history) will use the new address.
Signed-off-by: Paul Burton <paul.burton@mips.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: u-boot@lists.denx.de
The u-boot.lds linker script for MIPS defines a PTR_COUNT_SHIFT macro to
2 or 3 for 32 bit or 64 bit builds respectively. This macro is never
actually used though, so remove the dead code.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
The boston lowlevel_init() function zeroes the return register v0,
despite the function not being expected to return a value & that value
never being used.
Remove the redundant assignment to v0.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
This work-around has been here in U-Boot because the AIDET and GPIO
drivers were missing in the upstream Linux. Both are now available
in Linus' tree:
- drivers/irqchip/irq-uniphier-aidet.c
- drivers/gpio/gpio-uniphier.c
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
I largely reworked the Denali NAND controller driver in Linux.
This commit imports the improvements from Linux. The code is
almost synced with Linux 4.15-rc1.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Several drivers check ->chipsize to see if the third row address cycle
is needed. Instead of embedding magic sizes such as 32MB, 128MB in
drivers, introduce a new flag NAND_ROW_ADDR_3 for clean-up. Since
nand_scan_ident() knows well about the device, it can handle this
properly. The flag is set if the row address bit width is greater
than 16.
Delete comments such as "One more address cycle for ..." because
intention is now clear enough from the code.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Wenyou Yang <wenyou.yang@microchip.com>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
[Linux commit: 14157f861437ebe2d624b0a845b91bbdf8ca9a2d]
struct nand_ecc_caps was designed as flexible as possible to support
multiple stepsizes (like sunxi_nand.c).
So, we need to write multiple arrays even for the simplest case.
I guess many controllers support a single stepsize, so here is a
shorthand macro for the case.
It allows to describe like ...
NAND_ECC_CAPS_SINGLE(denali_pci_ecc_caps, denali_calc_ecc_bytes, 512, 8, 15);
... instead of
static const int denali_pci_ecc_strengths[] = {8, 15};
static const struct nand_ecc_step_info denali_pci_ecc_stepinfo = {
.stepsize = 512,
.strengths = denali_pci_ecc_strengths,
.nstrengths = ARRAY_SIZE(denali_pci_ecc_strengths),
};
static const struct nand_ecc_caps denali_pci_ecc_caps = {
.stepinfos = &denali_pci_ecc_stepinfo,
.nstepinfos = 1,
.calc_ecc_bytes = denali_calc_ecc_bytes,
};
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
[Linux commit: a03c60178c181767ecfb26fb311a88742d228118]
Driver are responsible for setting up ECC parameters correctly.
Those include:
- Check if ECC parameters specified (usually by DT) are valid
- Meet the chip's ECC requirement
- Maximize ECC strength if NAND_ECC_MAXIMIZE flag is set
The logic can be generalized by factoring out common code.
This commit adds 3 helpers to the NAND framework:
nand_check_ecc_caps - Check if preset step_size and strength are valid
nand_match_ecc_req - Match the chip's requirement
nand_maximize_ecc - Maximize the ECC strength
To use the helpers above, a driver needs to provide:
- Data array of supported ECC step size and strength
- A hook that calculates ECC bytes from the combination of
step_size and strength.
By using those helpers, code duplication among drivers will be
reduced.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
[Linux commit: 2c8f8afa7f92acb07641bf95b940d384ed1d0294]
Some NAND controllers can assign different NAND timings to different
CS lines. Pass the CS line information to ->setup_data_interface() so
that the NAND controller driver knows which CS line is concerned by
the setup_data_interface() request.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
[Linux commit: 104e442a67cfba4d0cc982384761befb917fb6a1]
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
In some cases, nand_do_{read,write}_ops is passed with unaligned
ops->datbuf. Drivers using DMA will be unhappy about unaligned
buffer.
The new struct member, buf_align, represents the minimum alignment
the driver require for the buffer. If the buffer passed from the
upper MTD layer does not have enough alignment, nand_do_*_ops will
use bufpoi.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
[Linux commit: 477544c62a84d3bacd9f90ba75ffc16c04d78071]
Drivers setting NAND_ECC_CUSTOM_PAGE_ACCESS are supposed to handle the
full read/write page sequence, and waiting for a page to actually be
programmed is part of this write-page sequence.
This is also what is done in ->write_oob_xxx() hooks, so let's do that in
->write_page_xxx() as well to make it consistent.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
[Linux commit: 41145649f4acb30249b636b945053db50c9331c5]
[masahiro:
There is no driver setting NAND_ECC_CUSTOM_PAGE_ACCESS in U-Boot.
No driver is affected by this change.]
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
The ->errstat() hook is no longer implemented NAND controller drivers.
Get rid of it before someone starts abusing it.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
[Linux commit: 7d135bcced20be2b50128432c5426a7278ec4f6d]
[masahiro: modify davinci_nand.c for U-Boot]
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Cached programming is always skipped, so drop the associated code until
we decide to really support it.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
[Linux commit: 0b4773fd1649e0d418275557723a7ef54f769dc9]
[masahiro: modify davinci_nand.c for U-Boot]
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
In order to make the ecclayout definition completely dynamic we need to
rework the way the OOB layout are defined and iterated.
Create a few mtd_ooblayout_xxx() helpers to ease OOB bytes manipulation
and hide ecclayout internals to their users.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
[Linux commit: 75eb2cec251fda33c9bb716ecc372819abb9278a]
[masahiro:
cherry-pick more code from adbbc3bc827eb1f43a932d783f09ba55c8ec8379]
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
If your controller already sends the required NAND commands when
reading or writing a page, then the framework is not supposed to
send READ0 and SEQIN/PAGEPROG respectively.
Signed-off-by: Marc Gonzalez <marc_gonzalez@sigmadesigns.com>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
[Linux commit: 3371d663bb4579f1b2003a92162edd6d90edd089]
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Add the tR_max, tBERS_max, tPROG_max and tCCS_min timings to the
nand_sdr_timings struct.
Assign default/safe values for the statically defined timings, and
extract them from the ONFI parameter table if the NAND is ONFI
compliant.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Tested-by: Marc Gonzalez <marc_gonzalez@sigmadesigns.com>
[Linux commit: 204e7ecd47e26cc12d9e8e8a7e7a2eeb9573f0ba
Fixup commit: 6d29231000bbe0fb9e4893a9c68151ffdd3b5469]
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
When changing from one data interface setting to another, one has to
ensure a specific sequence which is described in the ONFI spec.
One of these constraints is that the CE line has go high after a reset
before a command can be sent with the new data interface setting, which
is not guaranteed by the current implementation.
Rework the nand_reset() function and all the call sites to make sure the
CE line is asserted and released when required.
Also make sure to actually apply the new data interface setting on the
first die.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Fixes: d8e725dd8311 ("mtd: nand: automate NAND timings selection")
Reviewed-by: Sascha Hauer <s.hauer@pengutronix.de>
Tested-by: Marc Gonzalez <marc_gonzalez@sigmadesigns.com>
[Linux commit: 73f907fd5fa56b0066d199bdd7126bbd04f6cd7b]
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
The NAND framework provides several helpers to query timing modes supported
by a NAND chip, but this implies that all NAND controller drivers have
to implement the same timings selection dance. Also currently NAND
devices can be resetted at arbitrary places which also resets the timing
for ONFI chips to timing mode 0.
Provide a common logic to select the best timings based on ONFI or
->onfi_timing_mode_default information. Hook this into nand_reset()
to make sure the new timing is applied each time during a reset.
NAND controller willing to support timings adjustment should just
implement the ->setup_data_interface() method.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
[Linux commit: d8e725dd831186a3595036b2b1df9f68cbc6efa3]
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
struct nand_data_interface is the designated type to pass to
the NAND drivers to configure the timing. To simplify further
patches convert the onfi_sdr_timings array from type struct
nand_sdr_timings nand_data_interface.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
[Linux commit: b1dd3ca203fccd111926c3f6ac59bf903ec62b05]
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Currently we have no data structure to fully describe a NAND timing.
We only have struct nand_sdr_timings for NAND timings in SDR mode,
but nothing for DDR mode and also no container to store both types
of timing.
This patch adds struct nand_data_interface which stores the timing
type and a union of different timings. This can be used to pass to
drivers in order to configure the timing.
Add kerneldoc for struct nand_sdr_timings while touching it anyway.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
[Linux commit: eee64b700e26b9bcc6fce024681c31f5e12271fc]
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
When NAND devices are resetted some initialization may have to be done,
like for example they have to be configured for the timing mode that
shall be used. To get a common place where this initialization can be
implemented create a nand_reset() function. This currently only issues
a NAND_CMD_RESET to the NAND device. The places issuing this command
manually are replaced with a call to nand_reset().
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
[Linux commit: 2f94abfe35b210e7711af9202a3dcfc9e779219a]
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
'extern' is not necessary for function declarations. To prevent
people from adding the keyword to new declarations remove the
existing ones.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
[Linux commit: 79022591839f110f465cac0223e117b91d47d5db]
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
The generic NAND DT bindings allows one to tweak the ECC strength and
step size to their need. It can be used to lower the ECC strength to
match a bootloader/firmware config, but might also be used to get a better
reliability.
In the latter case, the user might want to use the maximum ECC strength
without having to explicitly calculate the exact value (this value not
only depends on the OOB size, but also on the NAND controller, and can
be tricky to extract).
Add a generic 'nand-ecc-maximize' DT property and the associated
NAND_ECC_MAXIMIZE flag, to let ECC controller drivers select the best
ECC strength and step-size on their own.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Rob Herring <robh@kernel.org>
[Linux commit: ba78ee00e1ff84de9b3ad33edbd3ec599099ee82]
[masahiro: of_property_read_bool -> fdt_getprop for U-Boot]
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Add stubs to the header in case CONFIG_SYS_NAND_ONFI_DETECTION is
disabled. This is much easier than adding around #ifdef to the
caller side.
Also, I removed the #ifdef around onfi_params. In Linux, onfi_params
and jedec_params are unified as union. It will be the right thing
to do.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Same macros are defined in various places. Collect them into
include/linux/bitops.h like Linux.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
These boards are on the boundary of "u-boot-nodtb.bin exceeds file
size limit" error.
Reduce the log-level to save memory footprint.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Read dma address using fdtdec_get_addr as it checks for
address cells and size cells and reads the address
properly. fdtdec_get_int always assume address is of int
size which goes wrong if using it on 64-bit architecture.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This patch makes SMMU work by moving the iommus node under the dwc3 child
entry from parent node.
Signed-off-by: Anurag Kumar Vulisha <anuragku@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This patch uncomments snps,quirk-frame-length-adjustment which has
the value to adjust the SOF/ITP generated from the controller.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This patch adds OTG interrupt support in device tree. It will add
an extra interrupt line number dedicated to OTG events. This will
enable OTG interrupts to serve in DWC3 OTG driver.
Signed-off-by: Manish Narani <mnarani@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This patch adds CCI support for USB when CCI is enabled in design.
This patch also adds 'reg' property for Xilinx USB 3.0 IP. The 'reg'
property is added in order to modify a register in that to enable
coherency in Hardware.
Also add address to unit name to avoid dtc warning
Signed-off-by: Manish Narani <mnarani@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This patch adds support for reading silicon revision using zynqmp nvmem
driver.
Signed-off-by: Anurag Kumar Vulisha <anuragku@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
The AMS includes an ADC as well as on-chip sensors that can be used to
sample external voltages and monitor on-die operating conditions, such as
temperature and supply voltage levels.
Signed-off-by: Rajnikant Bhojani <rajnikant.bhojani@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This patch sets host quirk2 bit field for No 1.8V supported in case of
1.0 silicon. The 1.0 silicon doesn't have support for UHS-I modes. This
property will ensure the SD runs on High Speed mode.
Signed-off-by: Manish Narani <mnarani@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This patch modifies the phy_zynqmp.c driver to use reset-controller
framework for asserting/de-asserting reset for High Speed modules.
Also fix documentation and dtsi.
Signed-off-by: Anurag Kumar Vulisha <anuragku@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This patch add the reset nodes in zynqmp.dtsi which are used by
reset-controller framework
Signed-off-by: Anurag Kumar Vulisha <anuragku@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Only silicon v1 requires this termination fix. With new nvmem soc
revision nvmem detection driver this can be autodetected at run time and
this flag is not needed.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Generic dtsi file can't use the same mac address for all.
U-Boot read mac from eeprom in zcu102 case and for others random mac
address is generated.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
dtc reports issues with it.
arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm016-dc2.dtb: Warning
(unit_address_format): Node
/amba/spi@ff040000/spi0_flash0@0/spi0_flash0@00000000 unit name should
not have leading 0s
arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm016-dc2.dtb: Warning
(unit_address_format): Node
/amba/spi@ff050000/spi1_flash0@0/spi1_flash0@00000000 unit name should
not have leading 0s
arch/arm64/boot/dts/xilinx/zynqmp-ep108.dtb: Warning
(unit_address_format): Node
/amba/spi@ff040000/spi0_flash0@0/spi0_flash0@00000000 unit name should
not have leading 0s
arch/arm64/boot/dts/xilinx/zynqmp-ep108.dtb: Warning
(unit_address_format): Node
/amba/spi@ff050000/spi1_flash0@0/spi1_flash0@00000000 unit name should
not have leading 0s
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Some user space libraries reading platform compatible string and based
on that changing behavior. Mark revB board with revB string.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Currently DP power domain (pd_dp) is not attached to any of the DP nodes which is
causing genpd to trigger a power down request for DP domain, making all DP related
peripherals unusable. So assign power domains for all DP related nodes to enable
proper accounting of DP power domain usage.
Signed-off-by: Jyotheeswar Reddy <jyothee@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This patch disables the smmu and also removes the mmu-masters
Signed-off-by: Naga Sureshkumar Relli <nagasure@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This patch adds the calibration property with required value,
calculated based on rtc input crystal oscillator frequency (32.768Khz).
Signed-off-by: Nava kishore Manne <navam@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
AXI master interface in CEVA AHCI controller requires two unique
Write/Read ID tags per port. This is because, ahci controller uses
different AXI ID[3:0] bits for identifying non-data transfers(like
reading descriptors, updating PRD tables, etc) and data transfers
(like sending/receiving FIS).To make SMMU work with SATA we need to
add correct SMMU stream id for SATA. SMMU stream id for SATA is
determined based on the AXI ID[1:0] as shown below
SATA SMMU ID = <TBU number>, 0011, 00, 00, AXI ID[1:0]
Note: SATA in ZynqMp uses TBU1 so TBU number = 0x1, so
SMMU ID = 001, 0011, 00, 00, AXI ID[1:0]
Since we have four different AXI ID[3:0] (2 for port0 & 2 for port1
as said above) we get four different SMMU stream id's combinations
for SATA. These AXI ID can be configured using PAXIC register.
In this patch we assumed the below AXI ID values
Read ID/ Write ID for Non-Data Port0 transfers = 0
Read ID/ Write ID for Data Port0 transfers = 1
Read ID/ Write ID for Non-Data Port1 transfers = 2
Read ID/ Write ID for Data Port1 transfers = 3
Based on the above values,SMMU stream ID's for SATA will be 0x4c0 &
0x4c1 for PORT0, 0x4c2 & 0x4c3 for PORT1. These values needed to be
added to iommus dts property. This patch does the same.
Signed-off-by: Anurag Kumar Vulisha <anuragku@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
All gpio controllers should contain this property.
This property is not checked by the code that's why this issue wasn't
found earlier.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
The correct register size is 0x10000, otherwise
it overlaps with other register space.
Signed-off-by: Hyun Kwon <hyun.kwon@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This will simplify dt overlay structure for the whole PL.
Signed-off-by: Nava kishore Manne <navam@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Extract from Linux mainline patch:
The ARM architected timer specification mandates that the interrupt
associated with each timer is level triggered (which corresponds to
the "counter >= comparator" condition).
A number of DTs are being remarkably creative, declaring the interrupt
to be edge triggered. A quick look at the TRM for the corresponding ARM
CPUs clearly shows that this is wrong, and I've corrected those.
For non-ARM designs (and in the absence of a publicly available TRM),
I've made them active low as well, which can't be completely wrong
as the GIC cannot disinguish between level low and level high.
The respective maintainers are of course welcome to prove me wrong.
While I was at it, I took the liberty to fix a couple of related issue,
such as some spurious affinity bits on ThunderX, and their complete
absence on ls1043a (both of which seem to be related to copy-pasting
from other DTs).
Acked-by: Duc Dang <dhdang@apm.com>
Acked-by: Carlo Caione <carlo@endlessm.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Acked-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
PM callbacks are delivered to the NS OS. Let the PM driver handle the
IRQ and retrieve callback data from the secure HW.
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Changed min-residence to 10ms(was 100 ms) for cpu-sleep-0.
Tried lower values 5ms and 8ms and it worked fine with Debug Off.
But to accommodate PM Debug On case, 10 ms is required. With this
change, low power idle state is into effect more frequently.
Measured boot time with PM debugs On and Off. No change observed
compared to 100ms value.
Signed-off-by: Jolly Shah <jollys@xilinx.com>
Acked-by: Will Wong <willw@xilinx.com>
Tested-by: Koteswararao Nayudu <kotin@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Version string has unused fields 31:20 which can be used for exporting 9
bits from efuse IPDISABLE regs to recognize eg/cg/ev devices.
These efuse bits are setup for certain devices.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This modifies default value of config DEFINE_TCM_OCM_MMAP
to yes if CONFIG_MP is defined MP supports needs OCM and TCM
part of memory map.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
The patch is adding external pmufw "Platform Management Unit firmware"
to boot.bin image. Boot.bin is a Xilinx format which bootrom is capable
to read and boot the system. pmufw is copied to the header data section
follows by u-boot-spl.bin. pmufw is consumed by PMU unit (Microblaze)
and SPL runs on a53-0.
This is generated command line when PMUFW_INIT_FILE is setup.
./tools/mkimage -T zynqmpimage -R ./"" -n
./"board/xilinx/zynqmp/pmufw.bin" -d spl/u-boot-spl.bin spl/boot.bin
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This patch provides a Kconfig option to use specified
memory for MMU table using reserve_mmu platform specific
routine. Here we used TCM space for MMU table.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This patch corrects the R5 release sequence by adding the
below steps.
1. Flush dcache to ensure that image loaded into memory.
2. Keep R5 reset just to ensure R5 in reset.
3. Disable caches before accessing TCM as with out this
A53 can do speculative and may result in ECC failures
if TCM's are not initialized. So, it is always better
to disable dcaches before accessing TCM and enable back.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Reported-by: John Linn <linnj@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Add configuration files/dtses for mini u-boot configurations which runs
out of OCM.
ram top is calculated from 0 that's why +#define CONFIG_SYS_SDRAM_BASE
0xfffc0000
+#define CONFIG_SYS_SDRAM_SIZE 0x40000
was hardcoded.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
cc108 board is wiring uart via PL which is good platform for SPL fpga
support.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
All these configs were moved to Kconfig that's why this empty ifdef
structure is not needed anymore.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Mention device-type = "ethernet-phy", as qemu will need this in absence
of compatible.
Signed-off-by: Sai Pavan Boddu <saipava@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
In legacy method, 1st stage bootloader was used to configure the HW
setting such as NAND timing. Hence, adding a config option in Zynq
NAND driver for the compatibility of device that using 1st stage
bootloder instead of U-boot SPL.
This commit is to add config option
CONFIG_NAND_ZYNQ_USE_BOOTLOADER1_TIMINGS that allow NAND driver use
timing values set by the 1st stage bootloader, instead of the hard-coded
values in the Zynq NAND driver.
Signed-off-by: Jeff Westfahl <jeff.westfahl@ni.com>
Signed-off-by: Wilson Lee <wilson.lee@ni.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Keng Soon Cheah <keng.soon.cheah@ni.com>
Cc: Chen Yee Chew <chen.yee.chew@ni.com>
Cc: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Scott Wood <oss@buserror.net>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
In
if (a || b)
else if (!a)
the constraint (!a) is always true if else is reached and
can be removed.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This option prevents booting on am335x_evm at least along with most
likely other platforms.
Fixes: 337bbb6297 ("spl: fit: add SPL_FIT_IMAGE_TINY config to reduce code-size")
Signed-off-by: Tom Rini <trini@konsulko.com>
While the USB HW in the RZ/A is basically the same, there are some
differences from the original versions that were in the SH SoCs.
Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
icorem6 has sd on usdhci1 which is devno 0 so return proper
devno from board_mmc_get_env_dev for icorem6 and icorem_6rqs
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Add new board names for existing board support
imx6q - icore and icore_rqs boards
imx6ul - geam6ul and isiot boards
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
As per USDHC boot eFUSE descriptions:
USDHC3 => devno 2
USDHC4 => devno 3
Linux will detect mmc0, mmc1, mmc2 based on the status
"okay" on usdhc so imx6qdl-icore-rqs.dtsi has enabled
usdhc1, usdhc3 and usdhc4.But U-Boot can detect based
on the aliases so add mmc1, mmc2 for usdhc3 and usdhc4
respectively and return the board_mmc_get_env_dev
by subtracting -1
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
before relocation pinctrl data BSS is overlapping DT area,
when .data is using uninitialized global variable,
imx6_pinctrl_soc_info. So assign them flags ZERO_OFFSET_VALID
to prevent BSS overlap
Suggested-by: Lokesh Vutla <lokeshvutla@ti.com>
Reported-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
mx6sxsabresd can run different kernel versions, such as NXP 4.1 or mainline.
Currently the rootfs location is passed via mmcblk number and the
problem with this approach is that the mmcblk number for the SD
card changes depending on the kernel version.
In order to avoid such issue, use the UUID method to specify the
rootfs location.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
imx_set_wdog_powerdown() is always used to disable the power down
enable bit, so remove the boolean parameter of the function.
It is also a bit strange to write a boolean value into registers,
so this new version makes explicit that we are writing 0.
While at it, rename it to imx_wdog_disable_powerdown().
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Clear powerdown enable bit for WDOG3 on i.MX6ULL to avoid unwanted
kernel reboots.
Suggested-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
i.MX6ULL has the same WDOG3 base address as i.MX6UL, so take this
into account in the base address definition.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
The boot (and fallback/emergency boot) concept for the RK3399-Q7
differs from Rockchip's reference platforms.
On the RK3399-Q7, some of this functionality is present in the
bootloader itself (and configurable); some is backed in hardware by
the Qseven BIOS_DISABLE signal to invoke the final stages of fallbacks
(i.e. either an external boot bypassing on-module memories or falling
back to the BROM for USB recovery).
In summary: the ADC-based boot_mode check does not apply for the
RK3399-Q7 and we therefore disable it (in this commit) by setting
CONFIG_BOOT_MODE_REG to 0.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
The ROCKCHIP_BOOT_MODE_REG option defaults to a hex value, so 0 will
show as 0x0 if a default is provided and changed via Kconfig.
However, it still will show as 0, if no default is given.
Consequently, the "is set to something other than 0" test in a
Makefile is cumbersome. Instead this check can easily be performed in
the C-code.
This removes the ifeq-check from mach-rockchip/Makefile, adds a
matching #if-check to boot_mode.c and fixes resulting link issues (if
boot_mode.o was not included due to the Makefile check) by defining a
stub function (in case the functionality is not built in) for
setup_boot_mode in boot_mode.c.
Fixes: e306779 (rockchip: make boot_mode related codes reused across all platforms)
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Existing FPGA program write is always assume RBF data >= 32 bytes, so
any rbf data less than 32 bytes writing to FPGA would be failed.
This patch enhances the FPGA program write to support rbf data with
size >= 4 bytes.
Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
This DT binding doc is porting from Linux DT binding doc.
commit 1adcbea4201a6852362aa5ece573f1f169b28113
Add a device tree bindings document for the SoCFPGA Arria10
FPGA Manager driver.
Signed-off-by: Alan Tull <atull@opensource.altera.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-By: Moritz Fischer <moritz.fischer@ettus.com>
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Increase the buffer length to be just above maximum permissible value
of 128 kiB . This increases the performance of the UMS and alike by a
factor of 2 - 2.5 as the buffers are less fragmented.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Lukasz Majewski <lukma@denx.de>
When usb_hub_reset_devices is called, it should be passed both an
indicator which hub it should operate on and what port number (local
to that hub) should be reset.
Previously, the usb_hub.c code did not include such context and
always started resets from port number 1, performing multiple
reset-requests for the same devices:
/*
* Reset any devices that may be in a bad state when applying
* the power. This is a __weak function. Resetting of the devices
* should occur in the board file of the device.
*/
for (i = 0; i < dev->maxchild; i++)
usb_hub_reset_devices(i + 1);
This adds an additional 'hub' parameter to usb_hub_reset_devices
that provides the context to fully qualify the port-number in.
Existing implementations are changed to accept and ignore the new
parameter.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Jakob Unterwurzacher <jakob.unterwurzacher@theobroma-systems.com>
Its a valid use case to call ehci_submit_async() with a NULL buffer
with length 0. E.g. from usb_set_configuration().
As invalidate_dcache_range() isn't able to judge if the address
NULL is valid or not (depending on the SoC hardware configuration it
might be valid) do the check in ehci_submit_async() as here we know
that we don't have to invalidate such a buffer.
Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com>
Currently we check in ehci_shutdown() if ctrl is NULL after
dereferencing it.
Before this we have already dereferenced ctrl, ctrl->hccr,
and ctrl->hcor in ehci_get_portsc_register(), ehci_submit_root(),
and hci_common_init().
A better approach is to already check ctrl, ctrl->hccr, and ctrl->hcor
during the initialization in ehci_register() and usb_lowlevel_init()
and signal an error here via the return code.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Add firmware V3, firmware loader and XHCI glue for the Renesas R-Car
Gen3 SoCs XHCI controller. Thus far only the R-Car Gen3 R8A7795 ES2.0+
and R8A7796 are supported.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Commit 9000eddbae ("drivers/usb/ehci: Use platform-specific accessors")
broke USB 2.0 on big-endian platforms because for them writel/readl()
does automatic conversion of BE data to LE.
Proper implementation requires to use "raw" variant of these accessors
which read/write data without messing with endianess.
While at it replace cpu_to_be32() to be32_to_cpu() in readl() to
keep sane semantics.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Marek Vasut <marex@denx.de>
Reported-by: Vladimir Boroda <boroda@yahoo.com>
Usb tree/info commands iterate over all usb uclass devices recursively.
Blk uclass devices based on struct blk_desc are created for mass storage
device, treating them as usb uclass devices based on struct usb_device
and referencing usb config interface descriptors cause crash.
To fix, ignore blk and usb_emul uclass devices in usb_show_info
and usb_tree_graph. Also avoid addition of preamble for blk uclass
child devices, otherwise tree dump gets messed up.
Signed-off-by: Suneel Garapati <suneelglinux@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The RK3399 has a total of 9 I2C controllers. To support these, the
enum in periph.h is extended and the mapping from the IRQ numbers to
the peripheral-ids is extended to ensure that pinctrl requests are
passed through to the function configuring the I2C pins.
For I2C8, the pinctrl is implemented and tested (on a RK3399-Q7) using
communication with the FAN53555 connected on I2C8.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
The RK3399 clk driver still has a left-over use of extract_bits, which
can be replaced by using bitfield_extract from include/bitfield.h.
This rewrites the invocation to use the shared function.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
A minor code-size increase from the changes for tracking the os-type
of FIT images and from infrastructure for recording the loadables into
the the loaded FDT, broke the builds for sun50i and some OMAP2+ devices.
This change adds a new config option (enabled by default for
MACH_SUN50I, MACH_SUN50I_H5 and ARCH_OMAP2PLUS) that does skips these
processing steps (bringing code size down to below the limit
again). The os-type is not evaluated, but assumed to be IH_OS_UBOOT
(i.e. taking the code-paths intended for backward-compatibility).
Note that enabling this config option precludes any useful downstream
processing, such as utilising a special calling convention for ATF or
OPTEE, based on the os-type of the loadables.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
This tracks the SPL changes for ATF for the RK3368-uQ7:
* renames ATF_SUPPORT to ATF
* drops CONFIG_SPL_ATF_TEXT_BASE (now dynamically retrieved from
the .itb file)
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This defconfig update makes use of the new features:
* CONFIG_ROCKCHIP_SPL_RESERVE_IRAM is now set to 0, as there is no
overlap between the M0 firmware and the ATF (we load this to DRAM
and relocate it to its final location within the ATF)
* tracks the ATF_SUPPORT -> ATF renaming
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
For the RK3368-uQ7, we can now update the .its file to mark the
Trusted Firmware as out 'firmware' bootable and annotate both ATF and
U-Boot with an OS-type.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This commit updates the .its file for the RK3399-Q7 to use the new
features and demonstrates how to use those:
* it marks the ATF as the 'firmware'
* it tracks the OS-type for U-Boot and ATF
* it loads the PMU (M0) firmware to DRAM and records the location
to /fit-images (where our ATF reads it from)
With the handoff of the next-stage FDT to ATF in place, we can now use
this to pass information about the load addresses and names of each
loadables to ATF: now we can load the M0 firmware into DRAM and avoid
overwriting parts of the SPL stage. This is achieved by changing our
.its-file to use an available area of DRAM as the load-address.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This tracks the SPL changes for ATF for the Firefly:
* renames ATF_SUPPORT to ATF
* drops CONFIG_SPL_ATF_TEXT_BASE
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Having CONFIG_SPL_ATF seems more natural.
Rename it, while it it is easy and there's few boards that use it
(only RK3399 and RK3368 boards).
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This adds a new interface spl_invoke_atf() that takes a spl_image_info
argument and then derives the necessary parameters for the ATF entry.
Based on the additional information recorded (into /fit-images) from
the FIT loadables, we can now easily locate the next boot stage.
We now pass a pointer to a FDT as the platform-specific parameter
pointer to ATF (so we don't run into the future headache of every
board/platform defining their own proprietary tag-structure), as
FDT access is already available in ATF.
With the necessary infrastructure in place, we can now update the
support for the ARM Trusted Firmware to dispatch into the
spl_invoke_atf function only if a IH_OS_ARM_TRUSTED_FIRMWARE image is
loaded.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
If a FDT was loaded (e.g. to append it to U-Boot image), we store it's
address and record information for all loadables into this FDT. This
allows us to easily keep track of images for multiple privilege levels
(e.g. with ATF) or of firmware images preloaded into temporary
locations (e.g. PMU firmware that may overlap the SPL stage).
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
During the loading of more complex FIT images (e.g. when the invoked
next stage needs to find additional firmware for a power-management
core... or if there are multiple images for different privilege levels
started in parallel), it is helpful to create a record of what images
are loaded where: if a FDT is loaded for one of the next stages, it
can be used to convey the status and location of loadables.
This adds a fdt_record_loadable() function that can be invoked to
record the status of each loadable below the /fit-images path.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
To better support bootin through an ATF or OPTEE, we need to
streamline some of the logic for when the FDT is appended to an image:
depending on the image type, we'd like to append the FDT not at all
(the case for the OS boot), to the 'firmware' image (if it is a
U-Boot) or to one of the loadables (if the 'firmware' is an ATF, an
OPTEE, or some other image-type and U-Boot is listed in the
loadabled).
To achieve this goal, we drop the os_boot flag and track the type of
image loaded. If it is of type IH_OS_U_BOOT, we append the FDT.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: York Sun <york.sun@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Mainly a stylistic change: convert the load_addr and entry_point
fields of struct spl_image_info to uintptr_t (from ulong).
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
When loading a full U-Boot with detached device-tree using the SPL FIT
backend, we should store the address of the FDT loaded as part of the
SPL image info: this allows us to fixup the FDT with additional info
we may want to propagate onward.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
To boot on ARMv8 systems with ARM Trusted Firmware, we need to
assemble an ATF-specific parameter structure and also provide the
address of the images started by ATF (e.g. BL3-3, which may be the
full U-Boot).
To allow us to identify an ARM Trusted Firmware contained in a FIT
image, this adds the necessary definitions.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
As per ARC HS databook (see chapter 5.3.3.2) it is required to add
3 NOPs after each write to IC_IVIC which we do from now on.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Eugeniy Paltsev <paltsev@synopsys.com>
Currently slave cores will be kick-started even if we want
to dry run bootm which is not what we really want.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Eugeniy Paltsev <paltsev@synopsys.com>
MRC (Memory Reference Code) is a binary blob used to set up the SDRAM
controller on some Intel boards. Add a test for this feature.
With this test coverage on binman is back up to 100%.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a test for this feature. It allows SPL to hold a pointer to the
microcode block. This is used for 64-bit U-Boot on x86.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a main program so that the tests can be executed directly, without
going through the main binman program.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a test that the 'entry' module works with or without importlib.
The tests are numbered so that they are executed in the correct order.
Signed-off-by: Simon Glass <sjg@chromium.org>
There is a little check at the top of entry.py which decides if importlib
is available. At present this has no test coverage. To add this we will
need to import the module twice, once with importlib and once without.
In preparation for allowing a test to control the importing of this
module, remove all global imports of the 'entry' module.
Signed-off-by: Simon Glass <sjg@chromium.org>
The tests were broken by two separate commits which adjusted the output
when boards are listed. Fix this by adding back a PowerPC board and
putting the name of each board in the test.
Fixes: b9f7d881 (powerpc, 5xx: remove some "5xx" remains)
Fixes: 8d7523c5 (buildman: Allow showing the list of boards with -n)
Signed-off-by: Simon Glass <sjg@chromium.org>
Accessing the network slows down the test and limits the environment in
which it can be run. Add an option to disable network tests.
Signed-off-by: Simon Glass <sjg@chromium.org>
This script runs the tests but does not report failure. Also it always
returns an exit code of 0 even on failure.
Fix these problems by checking the result of each test.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present these tests use the same filename as patman. This adds
confusion when running all tests, since error messages look very similar.
In fact binman tries to run the wrong tests at present.
Rename the tests.
Signed-off-by: Simon Glass <sjg@chromium.org>
These test programs are includedd as binary files in U-Boot to avoid
having to build them (and associated toolchain differences). Instructions
on building are in the files themselves, but it seems better to provide
a Makefile which can be manually run when desired.
Add a Makefile, separate from the normal build system, to handle this.
Signed-off-by: Simon Glass <sjg@chromium.org>
There is a debugging option in the Makefile to allow people to figure out
which u-boot.dtsi files are used in the build. But is it not easy to use
since it only shows files it finds, not those it is looking for. Update it
and update the mention of it to the docs.
Signed-off-by: Simon Glass <sjg@chromium.org>
A few header files still have a definition of CONFIG_ENV_SIZE, causing
warnings during buildman runs. This removes the duplicate definitions
from evb_px5.h, geekbox.h and rv1108_common.h.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Rockchip bootrom will enter download mode if it returns from
spl/tpl with a non-zero value and couldn't find a valid image
in the backup partition.
This patch provide a method to instruct the system to back to
bootrom download mode by checking the BROM_DOWNLOAD_FLAG register.
As the bootrom download function relys on some modules such as
interrupts, so we need to back to bootrom as early as possbile
before the tpl/spl code override the interrupt configurations.
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
setup_boot_mode function use the same logic but different
mode register address across all the rockchip platforms,
so it's better to make this function reused across all the
platforms, and let the mode register address setting from
the config file.
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
After applying the merged sysreset driver, there are build failures
due to an out-of-sync Makefile. This updates drivers/sysreset/Makefile
to address these build failures.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
With all targets converted to generate prepadded images, this removes
the spl_boot0 field from our config structure and removes the unused
code-path (for images that are not prepadded): i.e. spl_boot0 is now
implied as 'true' and the code is specialised by removing the other
case.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
There still are a few CONFIG_SPL_* options selected using defines from
rk3188_common.h instead of via Kconfig. This migrates those over to
Kconfig.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
The BROM supports forcing it to enter download-mode, if an appropriate
result/cmd-word is returned to it. There already is a series to
support this in review, so this prepares the (newly C-version) of the
back-to-bootrom code to accept a cmd to passed on to the BROM.
All the existing call-sites are adjusted to match the changed function
signature.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Andy Yan <andy.yan@rock-chips.com>
For the RK3188, the BROM will attempt to load up the first stage
image (SPL for the RK3188) in two steps: first 1KB to offset 0x800
in the SRAM and then the remainder to offset 0xc00 in the SRAM.
It always enters at 0x804, though.
With this changeset, the RK3188 boot removes the TPL (stub) stage and
builds a single SPL binary that utilizes the early back-to-bootrom via
the boot0-hook.
Consequently, the passing of the saved boot params via pmu->os_reg[2]
is also removed.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
The back-to-bootrom implementation for Rockchip has always relied on
the stack-pointer being valid on entry, so there was little reason to
have this as an assembly implementation.
This provides a new C-only implementation of save_boot_params and
back_to_bootrom (relying on setjmp/longjmp) and removes the older
assembly-only implementation.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Andy Yan <andy.yan@rock-chips.com>
The previous setjmp-implementation (as a static inline function that
contained an 'asm volatile' sequence) was extremely fragile: (some
versions of) GCC optimised the set of registers. One critical example
was the removal of 'r9' from the clobber list, if -ffixed-reg9 was
supplied.
To increase robustness and ensure PCS-compliant behaviour, the setjmp
and longjmp implementation are now in assembly and closely match what
one would expect to find in a libc implementation.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Andy Yan <andy.yan@rock-chips.com>
As no '.type' was set for save_boot_params_ret in start.S, binutils
did not track whether it was emitted as A32 or T32. By properly
marking save_boot_params_ret as a potential function entry, we can
make sure that the compiler will insert the appropriate instructions
for branching to save_boot_params_ret both for call-sites emitted as
A32 and T32.
Reported-by: Andy Yan <andy.yan@rock-chips.com>
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Andy Yan <andy.yan@rock-chips.com>
The save_boot_params_ret() prototype (for those of us, that have a
valid SP on entry and can implement save_boot_params() in C), was
previously only defined for !defined(CONFIG_ARM64).
This moves the declaration to a common block to ensure the prototype
is available to everyone that might need it.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Andy Yan <andy.yan@rock-chips.com>
Some Rockchip BROM versions (e.g. the RK3188 and RK3066) first read 1KB data
from NAND into SRAM and executes it. Then, following a return to bootrom, the
BROM loads additional code to SRAM (not overwriting the first block read) and
reenters at the same address as the first time.
To support booting either a TPL (on the RK3066) or SPL (on the RK3188) using
this model of having to count entries, this commit adds code to the boot0
hook to track the number of entries and handle them accordingly.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Signed-off-by: Paweł Jarosz <paweljarosz3691@gmail.com>
Tested-by: Andy Yan <andy.yan@rock-chips.com>
This updates the BCM281xx boot0-hook to the updated boot0 semantics
by emitting _start and the vector table before the boot0 hook (as
was the case before).
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
This updates the BCM235xx boot0-hook to the updated boot0 semantics
by emitting _start and the vector table before the boot0 hook (as
was the case before).
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Version-changes: 5
- ran 'whitespace-cleanup'
With the updated boot0 semantics (i.e. giving the boot0-hook control
over when and where the vector table is emitted), the boot0-hook for
the socfpga needs to be adjusted.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
With the boot0-hook inserting the additional padding to receive our
SPL magic, the SPL_TEXT_BASE can be aligned again.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Enable the spl_boot0 in SPL and use the pre-padding TAG memory,
the mkimage do not need to pad it but only need to replace the value
with correct TAG value.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
[Updated:]
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Rockchip SoCs bootrom design is like this:
- First 2KB or 4KB internal memory is for bootrom stack and heap;
- Then the first 4-byte suppose to be a TAG like 'RK33';
- The the following memory address end with '0004' is the first
instruction load and running by bootrom;
Let's use the boot0 hook to reserve the first 4-byte tag for all
the Rockchip SoCs.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
[Commit message taken from an older patch by:]
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
The '_start' is using as vector table base address, and will write
to VBAR register, so it needs to be aligned to 0x20 for armv7.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
[Updated to current code base:]
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
The boot0 hook on ARM does not insert its payload before the vector
table. This is both a mismatch with thec comment above it and
contradict usage of the boot0 hook on ARM64.
To fix this (and unify the semantics for ARM and ARM64), we change the
boot0-hook semantics on ARM to match those on ARM64:
(1) if a boot0-hook is present it is inserted at the start of
the image
(2) if a boot0-hook is present, emitting the ARM vector table
(and the _start) symbol are suppressed in vectors.S and
the boot0-hook has full control over where and when it
wants to emit these
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Configure thermal configs to remain set by default for dra7xx and am57xx
devices.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The dra7xx series of SOCs contain a temperature sensor and an
associated analog-to-digital converter (ADC) which produces
an output which is proportional to the SOC temperature.
Add support for this temperature sensor.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Old url currently returns 403; modify to url that actually works
with current state of the list server
Signed-off-by: S. Lockwood-Childs <sjl@vctlabs.com>
With commit 84d46e7e89 ("tools: env: allow to print U-Boot version")
the fw_env utilities need the version.h header file. Building only
the envtools in a pristine build directory will fail due to missing
header files.
Make sure the header files are a dependency of the envtools target.
Fixes: 84d46e7e89 ("tools: env: allow to print U-Boot version")
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
When building on a multi-core machine for an SPL-enabled board that
also uses CONFIG_OF_EMBED, the following error can be encountered
due to a race condition:
make[3]: *** No rule to make target 'spl/dts/dt.dtb.o', needed by
'spl/dts/built-in.o'. Stop.
../scripts/Makefile.spl:364: recipe for target 'spl/dts' failed
make[2]: *** [spl/dts] Error 2
make[2]: *** Waiting for unfinished jobs....
A reliable way to trigger this race condition is to add "sleep 60" to
the end of the "arch-dtbs" rule's recipe in "dts/Makefile" and to build
U-Boot against a board which uses the CONFIG_OF_EMBED and CONFIG_SPL
options using "make -j8" or a similar command.
This commit corrects this race condition via the use of CONFIG_OF_EMBED
in the same way that commit 3c00a2c8b5 ("Makefile: Correct dependency
race condition with TPL") and commit 054b3a1e80 ("dm: Makefile: Build
of-platdata before SPL") use CONFIG_OF_SEPARATE.
Signed-off-by: M. Vefa Bicakci <m.v.b@runbox.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
0 is not a pointer. So do not compare pointers to 0.
Do not return 0 from functions with a pointer return
type.
Problem identified with Coccinelle.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Add some useful static code analysis scripts for coccinelle
copied from the Linux kernel v4.14-rc8:
Warn on check against NULL before calling free.
scripts/coccinelle/free/ifnullfree.cocci
Detect superfluous NULL check for list iterator.
scripts/coccinelle/iterators/itnull.cocci
Check if list iterator is reassigned.
scripts/coccinelle/iterators/list_entry_update.cocci
Check if list iterator is used after loop.
scripts/coccinelle/iterators/use_after_iter.cocci
Find wrong argument of sizeof in allocation function:
scripts/coccinelle/misc/badty.cocci
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Coccinelle is a program for static code analysis.
For details on Coccinelle see
http://coccinelle.lip6.fr/
Add scripts/coccicheck copied from Linux kernel v4.14.
The coccicheck script executes the tests *.cocci in
directory scripts/coccinelle by calling spatch.
In Makefile add a coccicheck target. You can use it with
make coccicheck MODE=<mode>
where mode in patch, report, context, org.
Add a copy of Linux v4.14 file Documentation/dev-tools/coccinelle.rst
as doc/README.coccinelle.
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
The iterator variable of list_for_each is never NULL.
if (1 || A) is always true.
Use break if entry found.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
As per current android recommendation
https://source.android.com/devices/architecture/kernel/modular-kernels
1. Android recovery mode should contain both SOC and ODM
kernel modules in the recovery partition.
2. If a kernel module is required both in recovery and normal boot
mode, the module has to be located in recovery and vendor
partition seperately.
3. Kernel modules used in recovery mode should be independent
of vendor and odm partition
4. Recovery image should contain atleast
storage, display, keypad, battery and pmic modules.
Due to these requirements, recovery image size has increased
to >10MB.
This patch is to increase recovery partition size for TI devices
so that we dont see such flashing error
log:
sending 'recovery' (12560 KB)...
OKAY [ 0.436s]
writing 'recovery'...
FAILED (remote: too large for partition)
finished. total time: 0.458s
Signed-off-by: Praneeth Bajjuri <praneeth@ti.com>
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
ld --version | scripts/ld-version.sh
fails with
awk: scripts/ld-version.sh:
line 4: regular expression compile failed (missing '(')
.*)
So let's refresh the script from Linux kernel v4.14-rc8.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
sym_arr is of type struct symbol **.
So in malloc we need sizeof(struct symbol *).
The problem was indicated by coccinelle.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Add a driver for the I2C controller available on Amlogic Meson SoCs.
Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Currently the MX6QDL option is selected via CONFIG_SYS_EXTRA_OPTIONS,
but it is better to select it directly via Kconfig.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
The VPD data is used on a number of GE products. Move the parsing code to
a common location so that we can share this code.
Signed-off-by: Martyn Welch <martyn.welch@collabora.co.uk>
Acked-by: Stefano Babic <sbabic@denx.de>
Add support for bootcounter on an EXT filesystem.
Sync configuration whitelist.
Signed-off-by: Ian Ray <ian.ray@ge.com>
Signed-off-by: Martyn Welch <martyn.welch@collabora.co.uk>
Some fixes when reading EXT files and directory entries were identified
after using e2fuzz to corrupt an EXT3 filesystem:
- Stop reading directory entries if the offset becomes badly aligned.
- Avoid overwriting memory by clamping the length used to zero the buffer
in ext4fs_read_file. Also sanity check blocksize.
Signed-off-by: Ian Ray <ian.ray@ge.com>
Signed-off-by: Martyn Welch <martyn.welch@collabora.co.uk>
Reviewed-by: Stefano Babic <sbabic@denx.de>
This reverts commit b8b9790e23.
Some wandboard variants no longer boot after this commit, so keep
the original delay to avoid the boot regression.
Reported-by: Varga Zsolt <vazso@vazso.hu>
Tested-by: Varga Zsolt <vazso@vazso.hu>
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Command run setup_emmc will create gpt partitions for mmc 0 device
based on patitions variable.
Signed-off-by: Fabio Berton <fabio.berton@ossystems.com.br>
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Change dfu_alt_info variable to use the following altsetting:
uboot: To flash raw U-Boot
/zImage: boot: To copy kernel image
/imx6ul-pico-hobbit.dtb: To copy dtb file
rootfs: To copy rootfs
List the currently attached DFU capable USB devices running:
sudo dfu-util -l
Flash U-Boot:
sudo dfu-util -D u-boot.imx -a uboot
Copy boot files:
sudo dfu-util -D zImage -a /zImage
sudo dfu-util -D imx6ul-pico-hobbit.dtb -a /imx6ul-pico-hobbit.dtb
Flash rootfs:
sudo dfu-util -D rootfs.ext4 -a rootfs
To copy boot files you need to have a formated mmc 0:1 partition. To
format with ext4 filesystem you can use ums.
Run on target:
ums 0 mmc 0
and on host:
sudo mkfs.ext4 /dev/sdx1
Signed-off-by: Fabio Berton <fabio.berton@ossystems.com.br>
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Currently the rootfs location is passed via mmcblk number and using
the UUID method to specify the rootfs location is a better approach
working even if mmcblk number for the eMMC changes depending on the
kernel versions.
Signed-off-by: Fabio Berton <fabio.berton@ossystems.com.br>
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
We first introduce CONFIG_USE_BOOTCOMMAND, similar to
CONFIG_USE_BOOTARGS. We then migrate CONFIG_BOOTCOMMAND for most
CONFIG_DISTRO_DEFAULT users. In some cases platforms have a complex
scheme around this usage, and these have been defered for the moment so
that platform maintainers can work on a migration plan.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Since CONFIG_DEFAULT_CONSOLE is already started with "console=",
the console argument in CONFIG_EXTRA_ENV_SETTINGS is expanded to
"console=console=ttySAC1,115200n8" and this causes the wrong
console device.
#define CONFIG_DEFAULT_CONSOLE "console=ttySAC1,115200n8\0"
...
#define CONFIG_EXTRA_ENV_SETTINGS \
"console=" CONFIG_DEFAULT_CONSOLE
Signed-off-by: Dongjin Kim <tobetter@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
UARTs 1 through 5 were missing in the code - added.
Also pick the default according to the configuration setting for the
console index.
Signed-off-by: Ronald Landheer-Cieslak <ronaldlandheercieslak@eaton.com>
This patch is to change U-Boot PCI bus assignement compliant with Linux.
It means each PCIe controller's bus number is 0, not the current maximum
PCI bus number, when start to scan this controller.
Signed-off-by: Minghuan Lian <Minghuan.Lian@nxp.com>
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
While commit 36d35345b1 ("tpm: add missing va_end") added
some missing calls to va_end(), it missed a few places.
Signed-off-by: André Draszik <adraszik@tycoint.com>
Acked-by: Simon Glass <sjg@chromium.org>
TPM_NV_PER_PPREAD: physical presence needed for reading
TPM_NV_PER_WRITEDEFINE: persistent write lock by writing size 0
TPM_NV_PER_WRITEALL: write in one go
Signed-off-by: André Draszik <adraszik@tycoint.com>
Acked-by: Simon Glass <sjg@chromium.org>
Add a function to obtain random data from the TPM.
Signed-off-by: André Draszik <adraszik@tycoint.com>
Added commit message, add cast to min()
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
Allow the platform to define a partition by name at the end of which
the environment data will be located.
Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
In U-boot, serial_tstc was use to determine is there have a character in
serial console that pending for read. If there is no "pending" function
implemented in serial driver, the serial-uclass will return "true(1)"
to indicate there have a character pending to read.
Thus, read a character from nulldev serial will result in continuous
getting -EAGAIN return which might lead system to hang.
This commit is to fix a bug in nulldev serial which implement "pending"
function in nulldev serial to always indicate there is no character in
console that pending for read.
Signed-off-by: Wilson Lee <wilson.lee@ni.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Keng Soon Cheah <keng.soon.cheah@ni.com>
Cc: Chen Yee Chew <chen.yee.chew@ni.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
This is required in the case where U-Boot is typically loaded and run at
a particular address, but for some reason the RAM at that location is not
available, e.g. due to memory fragmentation loading other boot binaries or
firmware, splitting an SMP complex between various different OSs without
using e.g. the EL2 second-stage page tables to hide the memory asignments,
or due to known ECC failures.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
It can be useful to record how long tests take; this can help debug slow
running test systems or track changes in performance over time. Enhance
the test system to record timestamps while running test:
- Whenever a new log file section is started.
- After U-Boot is started and communication has been established.
- After each host or U-Boot command is executed.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Fix clock division factor initialization for RCC_PLLCFGR
registers.
PLLR bits (bit 31-28) in RCC_PLLCFGR must not be cleared,
it's a forbidden value. So update RCC_PLLCFGR using
clrsetbits_le32() to set only necessary bits fields.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Convert this driver to driver model.
This driver is also used by VEXPRESS platforms which doesn't
use driver model.
Tested on STM32F746 and STM32F769 platforms.
Signed-off-by: Christophe Priouzeau <christophe.priouzeau@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Update arm_pl180_mmci_init() prototype by adding struct mmc**
param. This is needed before converting this driver to driver model
in order to use arm_pl180_mmci_init() in driver model and in none
driver model implementation
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
This option provides better performance and should really always be
enabled. Make this be default y.
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Jeroen Hofstee <jeroen@myspectrum.nl>
This patch adds support for the Internal RMII Ethernet PHY on the
Amlogic P212 Reference Board.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
On Amlogic Meson GXL/GXM, supplementary ethernet configuration registers
were added to configure the internal RMII PHY interface.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
The Amlogic Meson GXL/GXM families embeds an internal RMII Ethernet PHY.
The PHY acts as a generic PHY but needs a slight configuration right
before it's configuration.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
lib/libfdt/ and scripts/dtc/libfdt have the same copies for the
followings 6 files:
fdt.c fdt_addresses.c fdt_empty_tree.c fdt_overlay.c fdt_strerr.c
fdt_sw.c
Make them a wrapper of scripts/dtc/libfdt/*. This is exactly what
Linux does to sync libfdt. In order to make is possible, import
<linux/libfdt.h> and <linux/libfdt_env.h> from Linux 4.14-rc5.
Unfortunately, U-Boot locally modified the following 3 files:
fdt_ro.c fdt_wip.c fdt_rw.c
The fdt_region.c is U-Boot own file.
I did not touch them in order to avoid unpredictable impact.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Add this typedef in the same place as in Linux. This is necessary
to refactor libfdt inclusion.
U-Boot also defines it in include/compiler.h. Of course it should
not do that, but I do not want to open a can of worms.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Prior to this commit, tools/Makefile pulls all libfdt files from
lib/libfdt.
lib/libfdt/ and scripts/dtc/libfdt have the same copies for the
followings 6 files:
fdt.c fdt_addresses.c fdt_empty_tree.c fdt_overlay.c fdt_strerr.c
fdt_sw.c
This commit changes them to #include ones from scripts/dtc/libfdt.
Unfortunately, U-Boot locally modified the following 3 files:
fdt_ro.c fdt_wip.c fdt_rw.c
I did not touch them in order to avoid unpredictable impact.
The fdt_region.c is U-Boot own file. This is also borrowed from
lib/libfdt/.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Fortunately, U-Boot did not modify libfdt_internal.h locally.
Change it to a wrapper of scripts/dtc/libfdt/fdt.h, which will be
periodically synced with the upstream DTC (or kernel).
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Fortunately, U-Boot did not modify fdt.h locally.
Change it to a wrapper of scripts/dtc/libfdt/fdt.h, which will be
periodically synced with the upstream DTC (or kernel).
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Currently, pylibfdt is always compiled if swig is installed on your
machine. It is really annoying because most of targets (excepts
x86, sunxi, rockchip) do not use dtoc or binman.
"checkbinman" and "checkdtoc" are wrong. It is odd that the final
build stage checks if we have built necessary tools. If your platform
depends on dtoc/binman, you must be able to build pylibfdt. If swig
is not installed, it should fail immediately.
I added PYLIBFDT, DTOC, BINMAN entries to Kconfig. They should be
property select:ed by platforms that need them. Kbuild will descend
into scripts/dtc/pylibfdt/ only when CONFIG_PYLIBFDT is enabled.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The pylibfdt is used by dtoc (and, indirectly by binman), but there
is no reason why it must be generated in the tools/ directory.
Recently, U-Boot switched over to the bundled DTC, and the directory
structure under scripts/dtc/ now mirrors the upstream DTC project.
So, scripts/dtc/pylibfdt is the best location.
I also rewrote the Makefile in a cleaner Kbuild style.
The scripts from the upstream have been moved as follows:
lib/libfdt/pylibfdt/setup.py -> scripts/dtc/pylibfdt/setup.py
lib/libfdt/pylibfdt/libfdt.i -> scripts/dtc/pylibfdt/libfdt.i_shipped
The .i_shipped is coped to .i during building because the .i must be
located in the objtree when we build it out of tree.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
This adds the following commits from upstream:
b1a6003 tests: Add a test for overlays syntactic sugar
737b2df overlay: Add syntactic sugar version of overlays
497432f checks: Use proper format modifier for size_t
22a65c5 dtc: Bump version to v1.4.5
c575d80 Add fdtoverlay to .gitignore
b6a6f94 fdtoverlay: Sanity check blob size
8c1eb15 pylibfdt: Use Python2 explicitly
ee3d26f checks: add interrupts property check
c1e7738 checks: add gpio binding properties check
b3bbac0 checks: add phandle with arg property checks
[ sync with Linux commit: 4201d057ea91c3d6efd2db65219bc91fae413bc2 ]
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
libfdt has gained some new files. We need to include them in the
kernel's copy.
Reported-by: Kyle Yan <kyan@codeaurora.org>
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
[ Linux commit: 4322323058f010274564006d61945187a15b6361 ]
This adds platform code for the Amlogic P212 reference board based on a
Meson GXL (S905X) SoC with the Meson GXL configuration.
This initial submission only supports UART and MMC/SDCard, support for the
internal Ethernet PHY in Work In Progress.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Beniamino Galvani <b.galvani@gmail.com>
Add the Amlogic Meson GXL pinctrl support based on the GXBB driver and
the synchronized DTS from Linux 4.13.5
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Beniamino Galvani <b.galvani@gmail.com>
Synchronize the Amlogic ARM64 dts from mainline Linux 4.13.5
In the preparation of the support of the Amlogic P212 board,
import the corresponding meson-gxl-s905x-p212.dts file.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Beniamino Galvani <b.galvani@gmail.com>
All regulators are hooked to EN_Pin at reset so that EN Pin controls
their state. Hook the LDO1 regulator to EN pin which at reset is not
hooked. This applies only to LP8733.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
For the DM TPS65910 driver I'm working on, querying the MPU voltage
should return a value in uV. This value can then be used by the
regulator's standard function set_value to set the MPU voltage.
Signed-off-by: Felix Brack <fb@ltec.ch>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
The offset of the permanent flags structure is in a different
place in the response compared to what the code is doing,
which gives us a completely useless result.
Fix by replacing hand-crafted code with generic parser
infrastructure.
Signed-off-by: André Draszik <adraszik@tycoint.com>
Acked-by: Simon Glass <sjg@chromium.org>
The maximum length of the name of the image is
obviously not sizeof(), which is just the
length of a pointer, but IH_NMLEN.
fixes: 62cf11c092
("SPL: Limit image name print length")
Signed-off-by: André Draszik <adraszik@tycoint.com>
Acked-by: Simon Glass <sjg@chromium.org>
This currently causes a warning in sandbox and will not do the right
thing:
drivers/core/read.c: In function ‘dev_read_addr_ptr’:
drivers/core/read.c:64:44: warning: cast to pointer from integer of
different size [-Wint-to-pointer-cast]
return (addr == FDT_ADDR_T_NONE) ? NULL : (void *)addr;
Use map_sysmem() which is the correct way to convert an address to a
pointer.
Fixes: c131c8bca8 (dm: core: add dev_read_addr_ptr())
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Since the compiler is free to place a char array to any address in
memory (in this case the stack), also to a non word aligned address the
function "fdt_prop_parse" runs into troubles upon it wants to write some
(fdt32_t *) to such a variable (if it has been placed to a none word
aligned address).
To avoid this we tell the compiler to always align this scratchpad to a
word aligned address.
Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com>
Reviewed-by: Hannes Schmelzer <oe5hpm@oevsv.at>
Tested-by: Hannes Schmelzer <oe5hpm@oevsv.at>
Reviewed-by: Simon Glass <sjg@chromium.org>
All current ClearFog SOMs have the SPI flash populated. Enable SPI flash in
the device tree.
Add an alias to the SPI bus so that the 'sf' command can probe the flash on
bus 1.
Add the "spi-flash" compatible string to make the standard SPI flash driver
probe the device.
Reviewed-by: Jagan Teki <jagan@openedev.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Stefan Roese <sr@denx.de>
The production variant of the SPI flash used by the clearfog
devices are based on winbond chips. Additionally enable
SPI_FLASH_BAR since some variants will have 16MB of flash
that requires this to be enabled.
Remove the default speed and mode; these values are taken from the
device tree when CONFIG_DM_SPI_FLASH is enabled.
Add default bus, so that 'sf' detects the SPI flash by default.
Signed-off-by: Jon Nettleton <jon@solid-run.com>
[baruch: remove speed/mode; add bus; move winbond to defconfig]
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Stefan Roese <sr@denx.de>
Enable the driver by default for the clearfog boards since the external
port is configured for XHCI.
Signed-off-by: Jon Nettleton <jon@solid-run.com>
[baruch: split from the SoC setup patch]
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Stefan Roese <sr@denx.de>
This fixes the USB 3.0 support for the a38x SOC.
Signed-off-by: Jon Nettleton <jon@solid-run.com>
[baruch: use fdt_addr_t]
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Stefan Roese <sr@denx.de>
This makes the initial changes need to support the
a38x series of SOCs. It adds the device-tree identifier
as well as changing the board_support function to take
the IO address designated by device-tree.
Signed-off-by: Jon Nettleton <jon@solid-run.com>
[baruch: use fdt_addr_t; update 37xx and 8K implementations]
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Stefan Roese <sr@denx.de>
Enable DISTRO_DEFAULTS for
mvebu_db_armada8k_defconfig
mvebu_mcbin-88f8040_defconfig
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
The board uses T-topology for the four x16 DRAM chips, so remove
the write-leveling from the SPL as that is only usefly on fly-by
topology and can be harmful on T-topology. Also update the DRAM
timing with values from calibration on multiple boards.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Update help message for "mac" command to reflect correct descriptions
and parameters.
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Value provided in MC_MEM_SIZE_ENV_VAR is in hex. Use 16 as base
in simple_strtoul.
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Distro boot support gives flexibility to run distro RFS like Ubuntu
being deployed from SD card or SATA drive. If it fails to detect
external storage, fall back to qspi/sd boot.
Enable this by default in RDB's defconfig by selecting
CONFIG_DISTRO_DEFAULTS
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: Zhang Ying <zhangying@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Currently the chipselect used to identify the corresponding NAND chip
is stored at the controller and only set during fsl_ifc_chip_init().
This way, only the last NAND chip is working, as the previous value
of cs_nand gets overwritten.
In order to solve this issue the chipselect is computed on demand by
evaluating the bank variable. Thus, the correct chipselect for each
NAND chip operation is used.
Tested on hardware with two NAND chips connected to the IFC
controller.
Signed-off-by: Kurt Kanzenbach <kurt@linutronix.de>
Acked-by: Scott Wood <oss@buserror.net>
[YS: reformatted commit message]
Reviewed-by: York Sun <york.sun@nxp.com>
The zero value returned from qbman_swp_acquire() is an error
condition meaning no free buffer for allocation.
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: Kushwaha Prabhakar <prabhakar@freescale.com>
[YS: revised commit message]
Reviewed-by: York Sun <york.sun@nxp.com>
This reverts commit c61d0009fe.
A tbs2910 board user reported a very slow console frambuffer as
regression in current u-boot. I could bisect this down to the
above mentioned commit.
This revert brings back the fast framebuffer console (one
cache flush per string in puts(), not after each char).
Reported-by: Uwe Scheffler <scheffler.u@web.de>
Signed-off-by: Soeren Moch <smoch@web.de>
Tested-by: Uwe Scheffler <scheffler.u@web.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
The eMMC is 1V8 device only and the signaling is always 1V8,
fix the DT for Salvator-X/XS to describe the hardware correctly.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
After updating u-boot from v2016.01 to 2017.09, issue with
"SATA link 0 timeout." on my Cubietruck board.
mdelay milled after moving satapwr code to board.
"sunxi: Turn satapwr on from board_init"
(sha1: 9fbb0c3aa4)
After adding the "mdelay(500);"
line that was lost in the path the error is gone.
Signed-off-by: Werner Böllmann <Werner.Boellmann@fh-dortmund.de>
[Rebased and updated change and commit message]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Only the H3/H5 SoCs have an internal PHY and its related clock and
reset controls.
Use an #ifdef to guard the internal PHY control code block so it
can be built for other SoCs, such as the A83T or A64.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
due misnaming of CONFIG_SUN4I_EMAC in include/configs/sunxi-common.h,
likely missed in:
commit 3146f0c017 ("Move PHYLIB to Kconfig")
Signed-off-by: Artturi Alm <artturi.alm@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
The following error has been observed on i.MX25 with a high-speed SDSC
card:
Data Write Failed in PIO Mode.
It was caused by the timeout set on PRSSTAT.BWEN, which was triggered
because this bit takes 15 ms to be set after writing the first block to
DATPORT with this card. Without this timeout, all the blocks are
properly written.
This timeout was implemented by decrementing a variable, so it was
depending on the CPU frequency. Fix this issue by setting this timeout
to a long enough absolute duration (500 ms).
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau.dev@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
When a high speed card is connected to mx51evk the following error is seen:
U-Boot 2017.11-rc2 (Oct 18 2017 - 13:49:26 -0200)
CPU: Freescale i.MX51 rev3.0 at 800 MHz
Reset cause: POR
Board: MX51EVK
DRAM: 512 MiB
MMC: FSL_SDHC: 0, FSL_SDHC: 1
*** Warning - read failed, using default environment
In: serial
Out: serial
Err: serial
Net: FEC
Hit any key to stop autoboot: 0
=> saveenv
Saving Environment to MMC...
Writing to MMC(0)... failed
The root cause for the failure is the eSDHC-A001 erratum:
"eSDHC-A001 : Data timeout counter (SYSCTL[DTOCV]) is not reliable for
values of 0x4,0x8, and 0xC" that is listed
on some PowerArchitecture chips:
https://www.nxp.com/files-static/32bit/doc/errata/MPC8379ECE.pdf
Even though eSDHC-A001 is not documented on the i.MX51 errata document,
I have confirmed with the NXP design team that this erratum does affect
i.MX51, so fix the problem by selecting SYS_FSL_ERRATUM_ESDHC_A001
at SoC level.
The i.MX51 ts4800 board already selects this option, but it is better
to move this selection to the i.MX51 SoC level instead.
Successfully tested with a high speed SD card on a mx51evk board.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Acked-by: Sebastien Bourdelin <sebastien.bourdelin@savoirfairelinux.com>
When a high speed card is connected to mx25 the following error is seen:
U-Boot 2017.11-rc2-00104-gb79372a (Oct 31 2017 - 11:02:22 -0200)
CPU: Freescale i.MX25 rev1.2 at 399 MHz
Reset cause: POR
Board: MX25PDK
I2C: ready
DRAM: 64 MiB
No arch specific invalidate_icache_all available!
MMC: FSL_SDHC: 0
*** Warning - read failed, using default environment
In: serial
Out: serial
Err: serial
Net: FEC
Hit any key to stop autoboot: 0
=> saveenv
Saving Environment to MMC...
Writing to MMC(0)... failed
, which prevents any usage of the SD card.
The root cause for the failure is the eSDHC-A001 erratum:
"eSDHC-A001 : Data timeout counter (SYSCTL[DTOCV]) is not reliable for
values of 0x4,0x8, and 0xC" that is listed
on some PowerArchitecture chips:
https://www.nxp.com/files-static/32bit/doc/errata/MPC8379ECE.pdf
Even though eSDHC-A001 is not documented on the i.MX25 errata document,
I have confirmed with the NXP design team that this erratum does affect
i.MX25, so fix the problem by selecting SYS_FSL_ERRATUM_ESDHC_A001
at SoC level.
Successfully tested with a high speed SD card on a mx25pdk board.
Suggested-by: Benoît Thébaudeau <benoit@wsystem.com>
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Acked-by: Sebastien Bourdelin <sebastien.bourdelin@savoirfairelinux.com>
Acked-by: Otavio Salvador <otavio@ossystems.com.br>
Tested-by: Otavio Salvador <otavio@ossystems.com.br> # mx25pdk
The motivation for moving MX25 selection to Kconfig is to be
able to better handle MX25 specific errata, so that an errata option
can be selected at SoC level instead of board level.
This selection method also aligns with the way other i.MX SoCs are
selected in U-Boot.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Acked-by: Sebastien Bourdelin <sebastien.bourdelin@savoirfairelinux.com>
Reviewed-by: Benoît Thébaudeau <benoit.thebaudeau.dev@gmail.com>
The environment storage location is selectable via Kconfig. We support
eMMC, SD and SPI-NOR as location for U-Boot. This adds support to store
the environment in the SPI-NOR additional to the default eMMC location.
Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com>
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
This change updates the USB configuration for the RK3399-Q7 in the DTS:
* fixes the OTG board configuration by enabling it ('okay')
* improves the speed of 'usb start' by disabling the unused EHCI/OHCI
controllers
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
To correctly model the usbhub_enable regulator for U-Boot, we need
to change the settings to:
* the GPIO polarity is GPIO_ACTIVE_LOW
* should be set to inactive (enable-active-low) when boot-on settings
are applied
* it can be changed at runtime (i.e. remove the always-on)
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
The fixed regulator for overriding BIOS_DISABLE had been modelling
backwards (i.e. the GPIO polarity and the enable-active-low/high
property had both been inverted), causing the 'regulator' command
to always print/expect 'disabled'/'enabled' backwards.
This fixes the mix-up and models it correctly:
* the GPIO is low-active
* the regulator should be enabled (enable-active-high) during
boot-on initialisation
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
U-Boot bundles a patched copy of libfdt, so it's wrong to attempt to
include it <like/this>. This breaks the build for me when I have dtc
fully installed in my host -- as happened earlier tonight with
Buildroot, for example.
There are several other occurrences throughout the code where '<libfdt'
matches. I'm not modifying these because I have no clue why the
<systemwide> include style is being used -- IMHO wrongly.
Signed-off-by: Jan Kundrát <jan.kundrat@cesnet.cz>
The check in part_get_info_extended() for a successful partition
searching misses a condition for extended partition. In case of
(ext_part_sector == 0), we should anyway mark the partition as found,
even if it's an extended partition, i.e. (is_extended(pt->sys_ind) == 0).
Otherwise, the extended partition (type 0x0f) will never be identified,
and the following recursive call to part_get_info_extended() will get a
wrong 'part_num' and 'which_part' parameter. In the end, all those
partitions in extended table will not be identified.
Let's add the missing OR condition of (ext_part_sector == 0) for
is_extended() check to fix the problem.
The issue is discovered by running fastboot flash to an extended
partition on eMMC.
$ fastboot flash mmcsda5 cache.img
target reported max download size of 536870912 bytes
sending 'mmcsda5' (18796 KB)...
OKAY [ 2.144s]
writing 'mmcsda5'...
FAILED (remote: cannot find partition)
finished. total time: 2.261s
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Before this patch one could receive following errors when executing
"gpt write" command on machine with cache enabled:
display5 factory > gpt write mmc ${mmcdev} ${partitions}
Writing GPT:
CACHE: Misaligned operation at range [4ef8f7f0, 4ef8f9f0]
CACHE: Misaligned operation at range [4ef8f9f8, 4ef939f8]
CACHE: Misaligned operation at range [4ef8f9f8, 4ef939f8]
CACHE: Misaligned operation at range [4ef8f7f0, 4ef8f9f0]
success!
To alleviate this problem - the calloc()s have been replaced with
malloc_cache_aligned() and memset().
After those changes the buffers are properly aligned (with both start
address and size) to SoC cache line.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
This function is called when signing configuration nodes. Adjust
the error message.
I do not know why we do not need to show the error message in case of
ENOSPC. Remove the if-conditional that seems unnecessary.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
If -K option is missing when you sign image nodes, it fails with
an unclear error message:
tools/mkimage Can't add hashes to FIT blob: -1
It is hard to figure out the cause of the failure.
In contrast, when you sign configuration nodes, -K is optional because
fit_config_process_sig() returns successfully if keydest is unset.
Probably this is a preferred behavior when you want to update FIT with
the same key; you do not have to update the public key in this case.
So, this commit changes fit_image_process_sig() to continue signing
without keydest. If ->add_verify_data() fails, show a clearer error
message, which has been borrowed from fit_config_process_sig().
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
The "algo_name" points to a property in a blob being edited. The
pointer becomes stale when fit_image_write_sig() inserts signatures.
Then crypto->add_verify_data() writes wrong data to the public key
destination.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
test_gpt generates a persistent disk image which can be re-used across
multiple test runs. Currently, if the Python code that generates the disk
image change, the image is not regenerated, which could cause test
failures e.g. if a test was updated to expect some new partition name or
size, yet the persistent disk image contained the old name or size. This
change introduces functionality to regenerate the disk image if the
instructions to generate the image have changed.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
The fw_env utility family has a default environment compiled in
which ties it quite strongly to the U-Boot source/config it has
been built with. Allow to display the U-Boot version it has been
built with using the -v/--version argument.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Designated initializers are more readable because we do not
have to check the order in the struct definitions.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
As part of my usual round of build testing, output about missing
MAINTAINERS information was not logged, and thus often overlooked.
Correct that mistake by ensuring that I log the output of
genboardscfg.py every time. As part of that, address a number of
missing MAINTAINERS entires. In the case of a missing file, I have put
the original submitter down. In the rest of the cases I have added the
config (and sometimes relevant header file) to the existing set of file
globs.
Signed-off-by: Tom Rini <trini@konsulko.com>
When HDMI is not initialized (e.g. no monitor is plugged), the current
SimpleFB code will still create a broken SimpleFB node.
Detect whether HDMI is initialized when creating SimpleFB node.
Fixes: be5b96f0e4 ("sunxi: setup simplefb for Allwinner DE2")
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Looking at the schematic, LDO15 and LDO17 are tied as a power source of a
builtin network chipset. The voltage on LDO15 is corrected to 3.3V and the
name of LDO17 is corrected to "vdd_ldo17".
Signed-off-by: Dongjin Kim <tobetter@gmail.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
We move all instances of CONFIG_MTDIDS_DEFAULT and
CONFIG_MTDPARTS_DEFAULT from the header files to the defconfig files.
There's a few cases here where we need to expand upon what was in the
header file.
Tested-by: Adam Ford <aford173@gmail.com> #omap3_logic
Signed-off-by: Tom Rini <trini@konsulko.com>
The patch:
"dm: ahci: Unwind the confusing init code"
(sha1: 7cf1afce7f)
introduce bug for ceva sata because port didn't start.
On the other hand the dwc_ahci.c was fixed correctly.
Do the same change for ceva too.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Tested-by: Mian Yousaf Kaukab <yousaf.kaukab@suse.com>
Inside setup_sata() there is a cpu type check, so there is no need to
do this check in the board file.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Inside setup_sata() there is a cpu type check, so there is no need to
do this check in the board file.
This also brings the benefit to allowing setup_sata() to be called for the
mx6qp wandboard variant.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Enable UMS and DFU, so that the eMMC can be accessed via the
USB gadget port on the board.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Commit 001cdbbb32 ("imx: mx6slevk: enable more DM drivers") breaks
MMC support in U-Boot proper on the mx6slevk_spl_defconfig target:
U-Boot SPL 2017.09-00396-g6ca43a5 (Oct 01 2017 - 16:20:18)
Trying to boot from MMC1
U-Boot 2017.09-00396-g6ca43a5 (Oct 01 2017 - 16:20:18 -0300)
CPU: Freescale i.MX6SL rev1.0 792 MHz (running at 396 MHz)
CPU: Commercial temperature grade (0C to 95C) at 33C
Reset cause: POR
Board: MX6SLEVK
I2C: ready
DRAM: 1 GiB
MMC: FSL_SDHC: 0
MMC Device 1 not found
*** Warning - No MMC card found, using default environment
As mx6slevk_spl_defconfig does not use CONFIG_DM_MMC and its
board file does not register the mmc controller for U-Boot proper,
let's fix this by adding CONFIG_DM_MMC=y and device tree support.
While at it, add more DM drivers, so that it becomes closer to
mx6slevk_defconfig.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Add support for the latest MX6QP wandboard variant.
Based on Richard Hu's work from Technexion's U-Boot tree.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
On Vybrid SoCs U-Boot gets loaded into GFX SRAM which is 512KiB.
Currently 32KiB is reserved for the IMX header. However, this is
not reflected in the size limit. In v2017.11-rc2 the actual size
limit (512KiB-32KiB) has been reached for Colibri VF61, which
lead to a successful build of U-Boot but not a working binary.
The IMX header is much smaller than 32KiB, typically around 1KiB.
Decrease the reserved size to 4KiB and specify the correct U-Boot
size limit. Apply this new base address and limit for all Vybrid
based boards.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
As reported by Jonathan Gray:
"After the recent changes to add SimpleNetworkProtocol to efi_loader
when booting off mmc via an efi payload that doesn't use
SimpleNetworkProtocol U-Boot's fec_mxc driver will now display
various "error frame" messages.
....
MMC Device 1 not found
MMC Device 2 not found
MMC Device 3 not found
Scanning disks on sata...
Found 6 disks
reading efi/boot/bootarm.efi
67372 bytes read in 32 ms (2 MiB/s)
## Starting EFI application at 12000000 ...
>> OpenBSD/armv7 BOOTARM 1.0
error frame: 0x8f57ec40 0x00003d74
error frame: 0x8f57ec40 0x00007079
error frame: 0x8f57ec40 0x00006964
error frame: 0x8f57ec40 0x00006f6f
error frame: 0x8f57ec40 0x0000726f
error frame: 0x8f57ec40 0x00002074
error frame: 0x8f57ec40 0x00006f6f"
Heinrich Schuchardt explains:
"A receive FIFO overrun can be expected if network packages are not
processed.
With the network patches we check if a package is available quite often."
Move the "error frame" messages to debug level so that a clean output
log can be seen.
Reported-by: Jonathan Gray <jsg@jsg.id.au>
Suggested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Many MAINTAINERS files are in subdirectories.
We should enable searching these.
Reported-by: Walt Feasel <waltfeasel@gmail.com>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Resort to malloc_cache_aligned() rather than malloc() which also removes
'CACHE: Misaligned operation at range' warnings.
Signed-off-by: Niko Mauno <niko.mauno@vaisala.com>
With the introduction of EFI variable support, we also wanted to persist
these EFI variables. However, the way it was implemented we ended up
persisting all U-Boot environment variables on every EFI boot.
That could potentially lead to unexpected side effects because variables
that were not supposed to be written to persisted env get written. It also
means we may end up writing the environment more often than we should.
For this release, let's just disable EFI variable persistence and instead
implement it properly for the next one.
Reported-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Fixes: ad644e7c18 ("efi_loader: efi variable support")
Signed-off-by: Alexander Graf <agraf@suse.de>
Acked-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Enable support for loadables in SEC firmware FIT image. Currently
support is added for single loadable image.
Brief description of implementation:
Add two more address pointers (loadable_h, loadable_l) as arguments to
sec_firmware_init() api.
Create new api: sec_firmware_checks_copy_loadable() to check if loadables
node is present in SEC firmware FIT image. If present, verify loadable
image and copies it to secure DDR memory.
Populate address pointers with secure DDR memory addresses where loadable
is copied.
Example use-case could be trusted OS (tee.bin) as loadables node in SEC
firmware FIT image.
Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Change DDR allocated for secure memory from 2 MB to 66 MB. This
additional 64 MB secure memory is required for trusted OS running
in Trusted Execution Environment using ARMv8 TrustZone.
Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Since TX delay is now enabled only in PHY_INTERFACE_MODE_RGMII_ID
PHY_INTERFACE_MODE_RGMII_TXID.
These change where introduced in phy driver in commit 05b29aa0cb
("net: phy: realtek: fix enabling of the TX-delay for RTL8211F").
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
On ls1012a soc, core clock source frequency is fixed at 100Mhz.
Generic timer frequency is core clock source divided by 4, which
is 25Mhz.
Signed-off-by: Tang Yuantian <andy.tang@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Memory allocated via malloc is not guaranteed to be zeroized.
So explicitly use calloc instead of malloc.
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
This macro is defined, but not referenced by anyone.
I did not touch config_whitelist.txt - the CONFIG will be dropped
by the next re-sync.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
This macro is defined, but not referenced by anyone.
I did not touch config_whitelist.txt - the CONFIG will be dropped
by the next re-sync.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Minkyu Kang <mk7.kang@samsung.com>
This macro is defined, but not referenced by anyone.
I did not touch config_whitelist.txt - the CONFIG will be dropped
by the next re-sync.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: York Sun <york.sun@nxp.com>
This macro is defined, but not referenced by anyone.
I did not touch config_whitelist.txt - the CONFIG will be dropped
by the next re-sync.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
This macro is defined, but not referenced by anyone.
I did not touch config_whitelist.txt - the CONFIG will be dropped
by the next re-sync.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
This macro is defined, but not referenced by anyone.
I did not touch config_whitelist.txt - the CONFIG will be dropped
by the next re-sync.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
This macro is defined, but not referenced by anyone.
I did not touch config_whitelist.txt - the CONFIG will be dropped
by the next re-sync.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Minkyu Kang <mk7.kang@samsung.com>
This comment creates a wrong entry in config_whitelist.txt.
I did not touch config_whitelist.txt - the CONFIG will be dropped
by the next re-sync.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
This macro is defined, but not referenced by anyone.
I did not touch config_whitelist.txt - the CONFIG will be dropped
by the next re-sync.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
This macro is defined, but not referenced by anyone.
I did not touch config_whitelist.txt - the CONFIG will be dropped
by the next re-sync.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
This macro only appears in commented-out lines. It is not referenced
by anyone.
I did not touch config_whitelist.txt - the CONFIG will be dropped
by the next re-sync.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
This macro is defined, but not referenced by anyone.
I did not touch config_whitelist.txt - the CONFIG will be dropped
by the next re-sync.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: York Sun <york.sun@nxp.com>
This macro is defined, but not referenced by anyone.
I did not touch config_whitelist.txt - the CONFIG will be dropped
by the next re-sync.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
This macro is defined, but not referenced by anyone.
I did not touch config_whitelist.txt - the CONFIG will be dropped
by the next re-sync.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Heiko Schocher<hs@denx.de>
CONFIG_SYS_I2C_FTI2C010 is not enabled by anyone.
Commit 2852709676 ("dm: i2c: Add a note to I2C drivers which need
conversion") prompted to convert this driver to DM before June 2017,
but not converted yet.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Heiko Schocher <hs@denx.de>
This driver was used by Blackfin boards, but Blackfin support is
gone. There is no user of this driver.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Heiko Schocher <hs@denx.de>
Extend DE2 driver with LCD support. Tested on Pinebook which is based
on A64 and has ANX6345 eDP bridge with eDP panel connected to it.
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
[agust: rebased v5 on u-boot-video/master]
Signed-off-by: Anatolij Gustschin <agust@denx.de>
The supported sleep states are generic on Intel processors. Move the
ASL definition to the common place.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
On some platforms (eg: Braswell), the FSP will not produce the
graphics info HOB unless you plug some cables to the display
interface (eg: HDMI) on the board. Add such notes in the FSP
video driver.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Intel Braswell FSP requires SPI controller settings to be locked down,
let's do this in the chrryhill.dts and remove previous Kconfig option.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Some Intel FSP (like Braswell) does SPI lock-down during the call
to fsp_notify(INIT_PHASE_BOOT). But before SPI lock-down is done,
it's bootloader's responsibility to configure the SPI controller's
opcode registers properly otherwise SPI controller driver doesn't
know how to communicate with the SPI flash device.
Rather than passively doing the opcode configuration, let's add a
simple DTS property "intel,spi-lock-down" and let the driver call
the opcode configuration function if required by such FSP.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This reverts commit 1e6ebee667.
It's not appropriate to call the Intel SPI driver specific stuff in
the FSP codes. We may add a simple DTS property "intel,spi-lock-down"
and let the Intel SPI driver call these stuff instead.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
In an S3 resume path, MRC cache is mandatory. Enforce the dependency
in the Kconfig.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Imply does not work for a Kconfig choice. Update ENV_IS_IN_SPI_FLASH
to be the default one for Intel Braswell.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
It was observed that when booting Linux kernel on Intel Cherry Hill
board, unexpected crash happens quite randomly. Sometimes kernel
just oops, while sometimes kernel throws MCE errors and hangs:
mce: [Hardware Error]: Machine check events logged
mce: [Hardware Error]: CPU 0: Machine Check: 0 Bank 4: c400000000010151
mce: [Hardware Error]: TSC 0 ADDR 130f3f2c0
mce: [Hardware Error]: PROCESSOR 0:406c3 TIME 1508160686 SOCKET 0 APIC 0 microcode 363
This looks like a hardware error per mcelog. After debugging, it
seems turning off turbo mode on the processor does not expose this
behavior, although U-Boot runs OK with turbo mode on. Suspect it is
related to an errata of Braswell processor.
To fix this, remove the Braswell cpu driver which does the turbo
mode configuration, and switch to use the generic cpu-x86 driver.
Also there is a configuration option in the FSP that turns on the
turbo mode and that has been turned off too.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
With latest codes on mainstream master, Intel Galileo board does not
boot unfortunately. Git biset leads to b383d6c0 "bootstage: Convert
to use malloc()".
Disable bootstage support to make it boot again. The root cause needs
to be investigated however.
Fixes: b383d6c0 ("bootstage: Convert to use malloc()")
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
This is a eDP bridge similar to ANX9804, it allows to connect eDP panels
to the chips that can output only parallel signal
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
[agust: fixed most checkpatch errors/warnings]
Signed-off-by: Anatolij Gustschin <agust@denx.de>
This header will be used in anx6345 driver
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
[agust: moved header to drivers/video]
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Add an operation to read EDID, since bridge may have ability to read
EDID from the panel that is connected to it, for example LCD<->eDP bridge.
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
As the support of EFI boot on Allwinner H3 is broken, we still need to
use simplefb to pass the framebuffer to Linux.
Add code to setup simplefb for Allwinner DE2 driver.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Add an option to indicate that the video driver should setup a SimpleFB
node that passes the video framebuffer initialized by U-Boot to the
operating system kernel.
Currently only the Allwinner DE driver uses this option, and the
definition of this option in the sunxi-common.h config header is
converted to an imply of this option from CONFIG_VIDEO_SUNXI.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The sunxi DE1 video option used to be CONFIG_VIDEO, which has the same
name as the "Enable legacy video support" option in
drivers/video/Kconfig.
Change the option name to CONFIG_VIDEO_SUNXI, which is really used by
Makefile under drivers/video/sunxi/, and defined in sunxi-common.h
when CONFIG_VIDEO is selected before this change. Now CONFIG_VIDEO_SUNXI
selects CONFIG_VIDEO and the usages of CONFIG_VIDEO in sunxi Kconfig and
config headers are all converted to use CONFIG_VIDEO_SUNXI.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
The U-Boot binary may trip over its actual allocated size in the storage.
In such a case, the environment will not be readable anymore (because
corrupted when the new image was flashed), and any attempt at using saveenv
to reconstruct the environment will result in a corrupted U-Boot binary.
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The Banana Pi M2-Magic is a small board with an Allwinner A33, an eMMC, a
wifi chip and some pin headers. Enable support for it.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Encountered an issue where fastboot can't write to NAND on a CHIP_pro,
the symbol was neither present in the board's config header, nor the
Kconfig, this patch puts it in the Kconfig and defaults on when
SUNXI_NAND is selected.
Signed-off-by: Ben Young <computermouth@crunchbangplusplus.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
As explained in arch/arm/mach-sunxi/clock_sun8i_a83t.c, clk for CPU
clusters is computed as clk = 24*n. However, the current formula is clk
= 24*(n-1).
This results in a clock set to a frequency that isn't specified as
possible for CPUs.
Let's use the correct formula.
Fixes: f542948b1e ("sunxi: clk: add basic clocks for A83T")
Signed-off-by: Quentin Schulz <quentin.schulz@free-electrons.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
The Allwinner SPI flash SPL boot support is guarded by the SPL_SPI_SUNXI
symbol. But despite its generic name, the actual only use case for this
is to provide SPI flash support to the SPL, which requires
CONFIG_SPL_SPI_FLASH_SUPPORT to be defined.
Select this symbol from the SPL_SPI_SUNXI Kconfig definition. This
avoids doing this explicitly in the defconfig, and fixes SPI booting on
the Pine64 SoPine (and -LTS version) and the OrangePi Win board (both with
SPI flash).
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Provide a Kconfig option that we can use as dependency for
features that are broken. This allows to easily disable them
without removing the code.
As no short text is supplied the option will not appear in
menuconfig.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
As you see in crypto_algos in common/image-sig.c, the algorithm
should be either "rsa2048" or "rsa4096". "rs2048" is a typo.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Both "conf_name" and "sig_name" point to the name of config node.
The latter should be the name of the signature node.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
don't use prettyprint_part_size() in create_gpt_partitions_list()
that avoid to align offset and size to 1 MiB and increase precision for
start and size.
This patch avoid the risk to change partition size and lost data during
rename or swap.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Add test of first and last LBA in gpt for rename and swap.
Only the name is expected to change, so test 3 columns
for part command
1: first LBA (start)
2: last LBA (end)
3: partition name
After rename, the last LBA change and it is a error in current U-Boot code
+ "first" = 0x7ff : invalid value (<start)
+ "second" = 0x17ff => size increasing !
Acked-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
+ test write for one partition on all the device (size=0)
+ test write with disk uuid and 2 partitions
Acked-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
the partition starting at 0x4400 is refused with overlap error:
$> gpt write mmc 0 "name=test,start=0x4400,size=0"
Writing GPT: Partition overlap
error!
even if the 0x4400 is the first available offset for LBA35 with default
value:
- MBR=LBA1
- GPT header=LBA2
- PTE= 32 LBAs (128 entry), 3 to 34
And the command to have one partition for all the disk failed also :
$> gpt write mmc 0 "name=test,size=0"
After the patch :
$> gpt write mmc 0 "name=test,size=0"
Writing GPT: success!
$> part list mmc 0
Partition Map for MMC device 0 -- Partition Type: EFI
Part Start LBA End LBA Name
Attributes
Type GUID
Partition GUID
1 0x00000022 0x01ce9fde "test"
attrs: 0x0000000000000000
type: ebd0a0a2-b9e5-4433-87c0-68b6b72699c7
type: data
guid: b4b84b8a-04e3-4000-0036-aff5c9c495b1
And 0x22 = 34 LBA => offset = 0x4400 is accepted as expected
Reviewed-by: Łukasz Majewski <lukma@denx.de>
Tested-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
add sandbox test for some gpt sub-command
- gpt read / part list : read the gpt partition created by sgdisk on host
test start, size, LBA and name output
- gpt verify : verify the gpt partition create by sgdisk on host
PS: persistent data test_gpt_disk_image.bin are udpated
Acked-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
copy the persistent gpt binary file as it can be modified during the test
that avoid issue if the test fail: the test always restart with clean file
Acked-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
RTC_CONFIG_D register contains the day within the month to generate
an alarm, not the month. This corrects the printf to indicate it.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Remove hardcoded ftd file name from environment variables.
Use CONFIG_DEFAULT_FDT_FILE macro instead.
Signed-off-by: Michal Oleszczyk <m.oleszczyk@grinn-global.com>
Commit 06ad970b53 ("powerpc: mpc85xx: Implemente workaround for CPU
erratum A-007907") clears L1CSR2 for the boot core, but other cores
don't run through the workaround. Add similar code for secondary
cores to clear DCSTASHID field in L1CSR2 register.
Signed-off-by: York Sun <york.sun@nxp.com>
All users of this macro have been converted. Remove MTDDEBUG and
related CONFIG options.
ubifs_dbg_msg_key() is kept. It is silent unless DEBUG is defined.
I am not touching scripts/config_whitelist.txt. The deprecated options
will be dropped by the next resync.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
In old days, the MTD subsystem in Linux had debug facility like
DEBUG(MTD_DEBUG_LEVEL1, ...).
They were all replaced with pr_debug() until Linux 3.2. See Linux
commit 289c05222172 ("mtd: replace DEBUG() with pr_debug()").
U-Boot still uses similar macros. Covert all of them for easier sync.
Done with the help of Coccinelle.
The semantic patch I used is as follows:
// <smpl>
@@
expression e1, e2;
@@
-MTDDEBUG(e1, e2)
+pr_debug(e2)
@@
expression e1, e2;
@@
-MTDDEBUG(e1, e2,
+pr_debug(e2,
...)
// </smpl>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Commit dd74b945af ("ARM: uniphier: use pr_() instead of printf()
where appropriate"), but I missed to update this file for some reason.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
If the environment "verify" is set to n, the image verification
is entirely skipped. Remove it as a preparation for verified boot.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
The default value of CONFIG_SYS_BOOTM_LEN, 0x800000, causes error
when uncompressing Image.gz out of FIT image.
Uncompressing Kernel Image ... Error: inflate() returned -5
Image too large: increase CONFIG_SYS_BOOTM_LEN
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
UniPhier 32-bit SoCs use CONFIG_SPL_OF_CONTROL. So, many nodes must
be marked as dm-pre-reloc to prevent fdtgrep from stripping them off.
Sprinkling U-Boot-specific properties all over the place is painful
because DT files are synced with Linux from time to time.
Split u-boot,dm-pre-reloc out to uniphier-v7-u-boot.dtsi, which is
appended to UniPhier V7 DTS before the build.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
The option is never enabled by anyone. Remove the code surrounded
by its ifdef. This should be handled by the clock/reset drivers.
CONFIG_UNIPHIER_ETH in scripts/config_whitelist.txt will be dropped
by the next resync.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
I thought commit d37d31849c ("ARM: uniphier: enable DWC3 xHCI
driver") enabled CONFIG_USB_DWC3_UNIPHIER, but CONFIG_USB_XHCI_DWC3
was missing in uniphier_v7_defconfig. Re-add.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
We add the various SMC91XX symbols to drivers/net/Kconfig and then this
converts the following to Kconfig:
CONFIG_SMC911X
CONFIG_SMC911X_BASE
CONFIG_SMC911X_16_BIT
CONFIG_SMC911X_32_BIT
Signed-off-by: Adam Ford <aford173@gmail.com>
[trini: Apply to the rest of the tree, re-squash old and new patch]
Signed-off-by: Tom Rini <trini@konsulko.com>
This converts the following to Kconfig:
CONFIG_NAND_MXC
CONFIG_NAND_OMAP_GPMC
CONFIG_NAND_OMAP_GPMC_PREFETCH
CONFIG_NAND_OMAP_ELM
CONFIG_SPL_NAND_AM33XX_BCH
CONFIG_SPL_NAND_SIMPLE
CONFIG_SYS_NAND_BUSWIDTH_16BIT
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
[trini: Finish migration of CONFIG_SPL_NAND_SIMPLE, fix some build issues,
add CONFIG_NAND_MXC so we can do CONFIG_SYS_NAND_BUSWIDTH_16BIT]
Signed-off-by: Tom Rini <trini@konsulko.com>
I've missed to add the ACPI resume support to this x86 build target.
This patch adds the ACPI resume support enabling S3 suspend /
resume.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Up to now we depended on an exported variable to build u-boot.rom.
We should be able to specify it in the configuration file, too.
With this patch this becomes possible using the new Kconfig option
CONFIG_BUILD_ROM.
This option depends on CONFIG_X86 and is selected in
qemu-x86_defconfig and qemu-x86_64_defconfig.
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Azalia configuration may be different across boards, hence it's not
appropriate to do that in the SoC level. Instead, let's make the
SoC update_fsp_azalia_configs() routine as a weak version, and do
the actual work in the board codes.
So far it seems only som-db5800-som-6867 board enables the Azalia.
Move the original codes into som-db5800-som-6867.c.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
At present we directly pass the Azalia config pointer to the FSP UPD.
This updates to use a function to do the stuff, like Braswell does.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
So far there are two copies of Azalia struct defines with one in
baytrail and the other one in braswell. This consolidates these
two into one, put it in the common place, and remove the prefix
pch_ to these structs to make their names more generic.
This also corrects reset_wait_timer from us to ms.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
This is only needed when graphics console is used. For kernel with
native graphics driver, this can be turned off to speed up.
Change this option's default to n in the Kconfig.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
It was observed that when booting a Ubuntu 16.04 kernel, doing ACPI
S3 suspend/resume sometimes causes the Ubuntu kernel hang forever.
The issue is however not reproduced with a kernel built from i386/
x86_64 defconfig configuration.
The unstability is actually caused by unexpected interrupts being
generated during the S3 resume. For some unknown reason, FSP (gold4)
for BayTrail configures the GPIO DFX5 PAD to enable level interrupt
(bit 24 and 25). As this pin keeps generating interrupts during an
S3 resume, and there is no IRQ requester in the kernel to handle it,
the kernel seems to hang and does not continue resuming.
Clear the mysterious interrupt bits for this pin.
Reported-by: Stefan Roese <sr@denx.de>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Stefan Roese <sr@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
Adjust VGA rom address to 0xfffb0000 so that u-boot.rom image
can be built again.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
As "v" is a local variable in stm32_i2c_choose_solution()
"v" has to be copied into "s" to avoid data abort in
stm32_i2c_compute_timing().
Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Reviewed-by: Patrick DELAUNAY <patrick.delaunay@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
On qemu errors like
assert 2.999650001525879 >= 3
occur.
According to the comment in the code the test is meant to be
approximate. So we should accept some milliseconds less.
Cc: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Update the script to version 0.26 (as of Linux v4.14-rc1)
Keep our "penguin_chief".
Keep our top_of_kernel_tree.
The negative forms of the command line parameters are described
when using --help.
New options are
--git-blame-signatures => when used with --git-blame,
also include all commit signers
--r => include reviewer(s) if any
--letters => print all matching 'letter' types
from all matching sections
File .get_maintainer.ignore can be used to specify
email addressees that shall be ignored.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
'commit fa24eca1f2 ("omap: Add routine for setting fastboot variables")'
adds initial support and usage of "fastboot getvar" command
for DRA75x and DRA72x devices.
and
'commit 0f9e6aee9d ("arm: dra76: Add support for ES1.0 detection")'
adds initial dra76 device definition
This patch is to extend usage of "fastboot getvar" for DRA76 device.
Signed-off-by: Praneeth Bajjuri <praneeth@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
DRA71x processors are reduced pin and software compatible
derivative of DRA72 processors. Extend support for this
revision in "getvar cpu" command.
Signed-off-by: Vishal Mahaveer <vishalm@ti.com>
[praneeth@ti.com: rebase to u-boot master]
Signed-off-by: Praneeth Bajjuri <praneeth@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Add vendor partition to Android GPT table for eMMC.
A Vendor image contains SoC-specific code and configuration.
Prior to Android 8.0, the vendor partition was optional ;
files belonging to these images were placed in boot.img or system.img
with symlinks (such as /vendor >/system/vendor ) when absent.
Android 8.0 makes the vendor partition mandatory
The goal is to modularize Android partitions with standard interface between
the Android Platform (on system.img ) and vendor-provided code(on vendor.img).
This standard interface enables the Android Platform to be updated
without affecting the SoC partitions. This makes it possible to upgrade a
device system.img from Android 8.0 to Android P while other images (such as
vendor.img) remain at Android 8.0. This modularity enables timely
Android platform upgrades (such as monthly security updates )
without requiring SoC/ODM partners to update SoC- and device-specific code.
Signed-off-by: Vishal Mahaveer <vishalm@ti.com>
Signed-off-by: Praneeth Bajjuri <praneeth@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Add vendor partition to Android GPT table for eMMC.
A Vendor image contains SoC-specific code and configuration.
Prior to Android 8.0, the vendor partition was optional ;
files belonging to these images were placed in boot.img or system.img
with symlinks (such as /vendor >/system/vendor ) when absent.
Android 8.0 makes the vendor partition mandatory
The goal is to modularize Android partitions with standard interface between
the Android Platform (on system.img ) and vendor-provided code(on vendor.img).
This standard interface enables the Android Platform to be updated
without affecting the SoC partitions. This makes it possible to upgrade a
device system.img from Android 8.0 to Android P while other images (such as
vendor.img) remain at Android 8.0. This modularity enables timely
Android platform upgrades (such as monthly security updates )
without requiring SoC/ODM partners to update SoC- and device-specific code.
Signed-off-by: Praneeth Bajjuri <praneeth@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
As the code currently stands, we first check that the length of the
given command line, along with ip_str/mac_str along with an additional 1
for the NULL termination will fit within the buffer we have, and if not,
we return an error. The way this code was originally written however
left Coverity "unhappy" due to using strcat rather than strncat.
Switching this to strncat however causes clang to be unhappy that we
aren't enforcing the "1" portion within strncat. Rather than further
re-work the code to include a "- 1" in this case as well, make the
strcat code only be done within the else side of the length test. This
keeps both clang and Coverity happy.
Fixes: 48ee0a87bc ("cmd/pxe.c: Rework initrd and bootargs handling slightly")
Signed-off-by: Tom Rini <trini@konsulko.com>
I saw a DT build issue report some time before [1]. I was able to
reproduce the bug, and figure out the root cause.
Since commit 6d427c6b1f ("binman: Automatically include a U-Boot
.dtsi file"), invalid .*.cmd files are generated.
Since that commit, DTS files are put into sed and piped to CPP.
Because CPP reads the stream from stdin, -Wp,-MD,$(depfile).pre.tmp
option generates a depfile with the target name "-". This is not
the format expected by fixdep.
Use one more temporary file instead of using pipe. With this, deps_
in the .*.cmd will be fixed. Having a temp file name in source_ is
odd, but it is unsed in the build system. Not a big deal.
[1] https://lists.denx.de/pipermail/u-boot/2017-June/294451.html
Fiexes: 6d427c6b1f ("binman: Automatically include a U-Boot .dtsi file")
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Removal of the legacy DataFlash code turned genimg_get_image() into a
no-op. Drop all calls to it and the function itself.
Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Last user of this option went away in commit:
fdc7718999 ("board: usb_a9263: Update to support DT and DM")
Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Last user of this option went away in commit:
fdc7718999 ("board: usb_a9263: Update to support DT and DM")
Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
This makes gcc no longer expect an out-of-line version of the
functions being present elsewhere.
This fixes a failure to build on several marvell targets with gcc-7 on
Debian:
https://bugs.debian.org/877963
Signed-off-by: Adrian Bunk <bunk@debian.org>
Signed-off-by: Vagrant Cascadian <vagrant@debian.org>
Hello,
I ran into a problem with the JFFS2 filesystem driver implemented in U-Boot.
I've got a NAND device that has correctable ECC errors (corrected somewhere in mtd/nand/nand_base.c).
The NAND driver tells the filesystem layer (jffs2_1pass.c) above that there occurred correctable ECC errors and returns with a "value > 0".
The JFFS2 driver recognizes the corrected ECC errors as real error and skips this block because the only accepts a "return value == 0" as correct.
This problem exists for over 8 years (I checked version 2010.09) so I'm a little bit worried that I interpreted something wrong or didn't get the whole context.
Can someone confirm this bug (and the bugfix) in the u-boot jffs2 driver?
There was a mail in 2012 that mentioned the same problem, but there was no patch:
http://u-boot.10912.n7.nabble.com/JFFS2-seems-to-drop-nand-data-with-ECC-corrections-td142008.html
Sometime after this discussion the return value of nand_read() changed from -EUCLEAN as correctable ECC error to a positive value with the count of ECC corrected errors.
With kind reguards,
Uwe Engling
MMC commands like MMC_CMD_ALL_SEND_CID or MMC_CMD_SEND_CSD can reach
500 us. This patch increases the polling status register delay to avoid
a timeout on a command.
Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Fix bit 2 name of PWR_CR3 register to match with the
last STM32H7 reference manual available here :
http://www.st.com/content/st_com/en/support/resources/
resource-selector.html?querycriteria=productId=SS1951$$
resourceCategory=technical_literature$$resourceType=reference_manual
Update also comment about voltage scaling 1 values
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Vikas Manocha <vikas.manocha@st.com>
CLK() macro is a residue of a previously reworked patch,
remove it.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Vikas Manocha <vikas.manocha@st.com>
This macro isn't used by anything, and in fact hasn't ever been used
according to the Git logs.
Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
The variable res should be initialized to 0 in these functions,
because if the searched key is not found, the variable is used
uninitialized.
Reported-by: Coverity (CID: 167335)
Reported-by: Coverity (CID: 167336)
Reported-by: Coverity (CID: 167337)
Signed-off-by: Marek Behun <marek.behun@nic.cz>
Since
rem = ((long) *tim_p) % SECSPERDAY;
the second while cycle
while (rem >= SECSPERDAY)
is dead.
Reported-by: Coverity (CID: 167334)
Signed-off-by: Marek Behun <marek.behun@nic.cz>
The test and info callbacks into the partition callback struct are
used by the "part list" command on the command line. That command
is used by the distro script.
With verb=1 set, "part list" thus throws a lot of warnings about
partitions it can't find when an upper layer searches for partitions.
So let's reduce verbosity to bring it to the same level of noise
as the other partition targets.
Signed-off-by: Alexander Graf <agraf@suse.de>
CONFIG options surrounded by
CONFIG_IS_ENABLED(...)
CONFIG_IS_BUILTIN(...)
CONFIG_IS_MODULE(...)
CONFIG_VAL(...)
need special care for proper dependency tracking.
I do not remember why, but I missed to add CONFIG_VAL(...) handling.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
All BMP files were being treated as though they had a 40 byte header.
There are several BMP header formats consisting of additional data.
This was causing some of the header to be read as color information,
skewing the color palette.
Signed-off-by: Jon Smith <jtsmith@pdiarm.com>
When compiling with W=1 the following warning is observed:
arch/arm/mach-imx/mx6/soc.c:590:6: warning: no previous prototype for ‘s_init’ [-Wmissing-prototypes] void s_init(void)
Remove this warning by adding the function prototype into include/common.h file.
Signed-off-by: Diego Dorta <diego.dorta@nxp.com>
fit_handle_file function does not quote input and output files while preparing
command to run DTC to convert .its to .itb. This results in a failure if input
or output files contain spaces in their names. Quote input and output files in
DTC command to avoid this failure.
Signed-off-by: Mirza, Taimoor <Taimoor_Mirza@mentor.com>
Upstream Linux has received a few device tree updates to the RPi
which we should propagate into the builtin U-Boot one as well to
gain hardware support.
This patch bumps the dts files to their 4.14 Linux counterparts
with the exception of sdhost on 32bit RPi versions. There we stay
with iproc as the sdhost driver is missing in U-Boot.
Signed-off-by: Alexander Graf <agraf@suse.de>
While this goes somewhat against normal coding style we should ensure
that dev_desc is not NULL before we dereference it in allocation of
legacy_mbr.
Reported-by: Coverity (CID: 167292)
Signed-off-by: Tom Rini <trini@konsulko.com>
Enable clock in the probe hook. The clock rate will be necessary
when setup_data_interface hook is supported.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
ARCH_UNIPHIER_V8_MULTI depends on !SPL, so the default may be hidden.
Use a clearer default.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
U-Boot does not support fancy clock tree structures like the Linux
common clock framework. Implement a simple clock tree model at the
driver level. With this, the clock data will be simplified.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Use dev_dbg() functions. It will be helpful to prefix log messages
with the corresponding device name when the core framework is ready.
While I am here, I renamed "dev", which was actually private data,
into "priv" because dev->dev looks confusing.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Use dev_dbg() functions. It will be helpful to prefix log messages
with the corresponding device name when the core framework is ready.
While I am here, I renamed "dev", which was actually private data,
into "priv" because dev->dev looks confusing.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Including <common.h> pulls in a lot of bloat. What this driver needs
is BIT(), so replace it with <linux/bitops.h>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Marek Vasut <marex@denx.de>
The pin data are implemented for old SoCs to specify the bit shift of
the IECTRL register. They are not wortwhile given the required memory
footprint. Delete all the pin data and enable all bits of the IECTRL
register.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Like other recenct UniPhier SoCs, the pupdctrl number of PXs3
matches to the pin number.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
First, I implemented this driver as per-bank model, but it was
a design mistake.
- There are 31 banks in the maximum case. It is painful to add
so many nodes to DT.
- The IRQ control registers are shared between banks. Per-bank
design is a problem for Linux. The counterpart for Linux turned
around to the single node model.
Rework based on the driver for Linux.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
The non-volatile storage varies board by board. The default should
be NOWHERE. Please choose a proper device via Kconfig.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Set Features (0xEF) command toggles the R/B# pin after 4 sub feature
parameters are written.
Currently, nand_command(_lp) calls chip->dev_ready immediately after
the address cycle because NAND_CMD_SET_FEATURES falls into default:
label. No wait is needed at this point.
If you see nand_onfi_set_features(), R/B# is already cared by the
chip->waitfunc call.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
[ Linux commit: c5d664aa5a4c4b257a54eb35045031630d105f49 ]
Read ID (0x90) command does not toggle the R/B# pin. Without this
patch, NAND_CMD_READID falls into the default: label, then R/B# is
checked by chip->dev_ready().
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
[ Linux commit: 3158fa0e739615769cc047d2428f30f4c3b6640e ]
Patch queue for efi - 2017-10-13
This is the second batch of amazing improvements for efi_loader in 2017.11:
- New self tests to verify our own code
- A few bug fixes
- colored text support
- event and SNP improvements, should get us close to iPXE working
When cancelling the timer we should check the return
value provided by the set_timer service.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Add support for the DHCOM i.MX6 PDK board. This board has:
- FEC ethernet
- EHCI USB host
- 3x SDMMC
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
When compiling with W=1 errors are observed:
drivers/pci/pcie_imx.c:517:12: warning: no previous prototype for ‘imx6_pcie_toggle_power’ [-Wmissing-prototypes] __weak int imx6_pcie_toggle_power(void)
drivers/pci/pcie_imx.c:528:12: warning: no previous prototype for ‘imx6_pcie_toggle_reset’ [-Wmissing-prototypes] __weak int imx6_pcie_toggle_reset(void)
Remove these warnings by adding the functions prototypes on arch-mx6/sys_proto.
Signed-off-by: Diego Dorta <diego.dorta@nxp.com>
When compiling with W=1 the following warning is observed:
arch/arm/mach-imx/mx6/clock.c:1268:5: warning: no previous prototype for ‘do_mx6_showclocks’ [-Wmissing-prototypes] int do_mx6_showclocks(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
Remove this warning by adding the function prototype into arch-mx6/clock.h file.
Signed-off-by: Diego Dorta <diego.dorta@nxp.com>
UART pinmux has been changed on the last board revision. Change
board pinmux accordingly. Console is on UART7 now, add pinmux,
base address and update console string in environment.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Stefano Babic <sbabic@denx.de>
mx6slevk can run different kernel versions, such as NXP 4.1 or mainline.
Currently the rootfs location is passed via mmcblk number and the
problem with this approach is that the mmcblk number for the SD
card changes depending on the kernel version.
In order to avoid such issue, use the UUID method to specify the
rootfs location.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
We have at least a minor count of boards, that failed to re-initialize
PCI express in the Linux kernel. Typical failure rate is 20% on affected
boards. This is mitigated by commit 6ecbe13756 ("drivers: pci: imx:
add imx_pcie_remove function").
However, at least on some i.MX6 custom boards, when calling
assert_core_reset() as part of the first-time PCIe init, read access
to PCIE_PL_PFLR simply hangs. Surround this readl() with
imx_pcie_fix_dabt_handler() does not help. For this reason, the forced
LTSSM detection is only used on the second assert_core_reset() that is
called shorly before starting the Linux kernel.
Signed-off-by: Sven-Ola Tuecke <sven-ola.tuecke@numberfour.eu>
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Tested-by: David Müller <d.mueller@elsoft.ch>
Latest wandboard hardware revision is revd1, which brings the following
new features:
- PFUZE100 PMIC
- AR8035 Ethernet PHY
- Upgrade Wifi/BT chip to BCM4339/BCM43430.
The detection mechanism is to probe the PMIC and when it is
found, then the revision of the board is revd1.
As the detection is done via PMIC, we need to print the board version
at a later stage via CONFIG_DISPLAY_BOARDINFO_LATE and also need
to disable CONFIG_DISPLAY_BOARDINFO, which is done much earlier.
Make the necessary adjustments for the AR8035 PHY to work on revd1.
Based on Richard Hu's work from Technexion's U-Boot tree.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
The changes required to use U-Boot's Serial Download Protocol
implementation are now available in upstream imx_usb_loader
repository. Update the URL accordingly.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
The configuration files imximage.cfg are used for the DDR controller
configuration.
Add DDR configuration function to replace the DDR controller
configuration in the imximage.cfg file. The function can be used for
DDR size detection.
Signed-off-by: Uri Mashiach <uri.mashiach@compulab.co.il>
The CCM_ macros use the CCM_BASE_ADDRESS macro, which doesn't exist.
Replace the CCM_BASE_ADDRESS macros with CCM_BASE_ADDR.
Signed-off-by: Uri Mashiach <uri.mashiach@compulab.co.il>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
Instead of changing mmc devno from dts nodes better
to return the detected devno so-that env trigger the same.
Cc: Stefano Babic <sbabic@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Fix for finding mmc devices on i.MX6Q icore boards
added in below comment
"icorem6: Fix to find MMC devices"
(sha1: a2b137b38d)
which is reverted in during u-boot-imx merge
" Merge git://git.denx.de/u-boot-imx"
(sha1: 6aee2ab68c)
This patch, is recreated to fix merge conflict.
Cc: Stefano Babic <sbabic@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
CONFIG_CMD_BOOTZ option has been converted to defconfig, so there
is no need to undefine it in board config file anymore.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
When compiling with W=1 the following warning is observed:
board/freescale/mx6sabresd/mx6sabresd.c:586:5: warning: no previous prototype for ‘board_ehci_hcd_init’ [-Wmissing-prototypes] int board_ehci_hcd_init(int port)
Remove this warning by including <usb/ehci-ci.h>.
Signed-off-by: Diego Dorta <diego.dorta@nxp.com>
When compiling with W=1 the following warning is observed:
board/freescale/mx6sabresd/mx6sabresd.c:601:5: warning: no previous prototype for ‘board_ehci_power’ [-Wmissing-prototypes] int board_ehci_power(int port, int on)
Remove this warning by adding the function prototype into usb/ehci-ci.h file.
Signed-off-by: Diego Dorta <diego.dorta@nxp.com>
When compiling with W=1 the following warning is observed:
board/freescale/mx6sabresd/mx6sabresd.c:680:5: warning: no previous prototype for ‘board_spi_cs_gpio’ [-Wmissing-prototypes] int board_spi_cs_gpio(unsigned bus, unsigned cs)
Remove this warning by including <asm/mach-imx/spi.h>.
Signed-off-by: Diego Dorta <diego.dorta@nxp.com>
When compiling with W=1 the following warning is observed:
arch/arm/mach-imx/mx6/soc.c:213:12: warning: no previous prototype for ‘get_board_rev’ [-Wmissing-prototypes] u32 __weak get_board_rev(void)
Fix the build warning by including <asm/bootm.h>.
Signed-off-by: Diego Dorta <diego.dorta@nxp.com>
CONFIG_CMD_BOOTZ symbol does not work in board config file
anymore, so fix this by moving it to Kconfig.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
When compiling with W=1 the following warning is observed:
board/freescale/mx6sabresd/mx6sabresd.c:266:5: warning:
no previous prototype for ‘board_mmc_get_env_dev’
[-Wmissing-prototypes] int board_mmc_get_env_dev(int devno)
Remove this warning by adding the function prototype into sys_proto.h file.
Signed-off-by: Diego Dorta <diego.dorta@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
When building with W=1 errors like the one below is seen:
board/freescale/mx6sabresd/mx6sabresd.c:546:5: warning:
no previous prototype for ‘overwrite_console’
[-Wmissing-prototypes] int overwrite_console(void)
Fix the build warnings by including <input.h>.
Signed-off-by: Diego Dorta <diego.dorta@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
CONFIG_SPL_PAD_TO is already defined inside "imx6_spl.h", so there
is no need to redefine it in the board config files.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Stefan Agner <stefan.agner@toradex.com>
This rework the board to use the generic filesystem commands instead
of forcing the use of FAT for the boot files.
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Now that it is possible to load SPL and u-boot.img via imx_usb_loader
tool, mention this method instead of the old one that relied on ymodem.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
With CONFIG_DISPLAY_CPUINFO=y we get a "Reset cause" line, which
brings important information of the reboot cause.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
There is no need call setup_display() from SPL code, so move it to
board_init(), which executes only in U-Boot proper.
Reported-by: Stefano Babic <sbabic@denx.de>
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
There is no need call setup_display() from SPL code, so move it to
board_init(), which executes only in U-Boot proper.
Reported-by: Stefano Babic <sbabic@denx.de>
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
There is no need call setup_display() from SPL code, so move it to
board_init(), which executes only in U-Boot proper.
Reported-by: Stefano Babic <sbabic@denx.de>
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
There is no need call setup_display() from SPL code, so move it to
board_init(), which executes only in U-Boot proper.
Reported-by: Stefano Babic <sbabic@denx.de>
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
There is no need call setup_display() from SPL code, so move it to
board_init(), which executes only in U-Boot proper.
Reported-by: Stefano Babic <sbabic@denx.de>
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
There is no need call setup_display() from SPL code, so move it to
board_init(), which executes only in U-Boot proper.
Reported-by: Stefano Babic <sbabic@denx.de>
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Shell.efi uses this, and supporting color attributes makes things look
nicer. Map the EFI fg/bg color attributes to ANSI escape sequences.
Not all colors have a perfect match, but spec just says "Devices
supporting a different number of text colors are required to emulate the
above colors to the best of the device’s capabilities".
Signed-off-by: Rob Clark <robdclark@gmail.com>
Tested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Alexander Graf <agraf@suse.de>
[agraf: s/unsigned/unsigned int/]
Signed-off-by: Alexander Graf <agraf@suse.de>
When we don't have a real device/image path, such as 'bootefi hello',
construct a mem-mapped device-path.
This fixes 'bootefi hello' after devicepath refactoring.
Fixes: 95c5553ea2 ("efi_loader: refactor boot device and loaded_image handling")
Signed-off-by: Rob Clark <robdclark@gmail.com>
Acked-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Commit 8e6eda7cda ("drivers/i2c/muxes/pca954x: Add pca9547 I2C mux
support") introduced a chip_desc for the pca954x devices but failed to
update pca954x_ofdata_to_platdata() to be aware of it. Make
pca954x_ofdata_to_platdata() lookup the chip_desc to validate the device
width.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Marek Behun <marek.behun@nic.cz>
The option is specified in Kconfig, but still a few config header files
are overriding the choice by #undef'ing it. Re-sync the option with
moveconfig to rid of the #undefs.
Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Having this as a 'default y' is rather annoying because it doesn't
actually compile unless other options are defined in the board header:
../cmd/bootm.c: In function 'do_imls_nor':
../cmd/bootm.c:330:7: error: 'CONFIG_SYS_MAX_FLASH_BANKS' undeclared (first use in this function); did you mean 'CONFIG_SYS_MAX_FLASH_SECT'?
i < CONFIG_SYS_MAX_FLASH_BANKS; ++i, ++info) {
Make it 'default n' so people who develop new boards that start from a
blank defconfig have one less compilation failure to debug.
Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Correct a mistake in the part number handling of commit
16a73b249d and only increment part once
per loop.
Signed-off-by: Jonathan Gray <jsg@jsg.id.au>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
The constant MAX_UTF8_PER_UTF16 is used to calculate
required memory when converting from UTF-16 to UTF-8.
If this constant is too big we waste memory.
A code point encoded by one UTF-16 symbol is converted to a
maximum of three UTF-8 symbols, e.g.
0xffff could be encoded as 0xef 0xbf 0xbf.
The first byte carries four bits, the second and third byte
carry six bits each.
A code point encoded by two UTF-16 symbols is converted to four
UTF-8 symbols.
So in this case we need a maximum of two UTF-8 symbols per
UTF-16 symbol.
As the overall maximum is three UTF-8 symobls per UTF-16 symbol
we need MAX_UTF8_PER_UTF16 = 3.
Fixes: 78178bb0c9 lib: add some utf16 handling helpers
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
When searching for partitions don't stop if a partition is not present
for a given partition number as there may be valid partitions after.
Search for up to MAX_SEARCH_PARTITIONS matching the other callers of
part_get_info().
This allows OpenBSD to boot via the efi_loader on rpi_3 again after
changes made after U-Boot 2017.09. With MBR partitioning OpenBSD will
by default use the fourth partition for the 0xA6 (OpenBSD) partition.
Signed-off-by: Jonathan Gray <jsg@jsg.id.au>
Signed-off-by: Alexander Graf <agraf@suse.de>
The ULCB CPLD support was not updated during the PFC table rework,
fix up the GPIO numbers until the CPLD support is rewritten to a
proper DM capable and DT probing driver.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Due to a conflict with recent Primary Protected Application (PPA),
PPA cannot be loaded for SPL stage, falcon boot is not enabled by
default. With compatible PPA image, to enable falcon boot, activate
these Kconfig options in defconfig
CONFIG_SPL_FIT=y
CONFIG_SPL_FSL_LS_PPA=y
CONFIG_SPL_GZIP=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_OS_BOOT=y
CONFIG_SPL_OF_LIBFDT=y
Because environment variables are not avaiable during SPL stage for
SD boot, set "boot_os=y" as default.
Signed-off-by: York Sun <york.sun@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add jump_to_image_linux() for arm64. Add "noreturn" flag to
armv8_switch_to_el2(). Add hooks to fsl-layerscape to enable falcon
boot.
Signed-off-by: York Sun <york.sun@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Łukasz Majewski <lukma@denx.de>
Tested-by: Łukasz Majewski <lukma@denx.de>
This board has soldered DDR chips. To reduce the SPL image size,
use static DDR setting instead of dynamic DDR driver.
Signed-off-by: York Sun <york.sun@nxp.com>
gd->ram_size is reduced in this function to reserve secure memory.
Avoid running this function again to further reduce memory size.
This fixes issue for SPL boot with PPA image loaded in which case
secure memory is incorrectly allocated due to repeated calling.
Signed-off-by: York Sun <york.sun@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
CONFIG_CMD_SPL_WRITE_SIZE is used for writing parameters to non-volatile
storage. So far it is only used for NAND. Fix compiling error when this
macro is not used for SD.
Signed-off-by: York Sun <york.sun@nxp.com>
CC: Anatolij Gustschin <agust@denx.de>
Commit 15eb1d43bf ("spl: reorder the assignment of board info to
global data") intended to move assignment of board info earlier,
into board_init_r(). However, function preload_console_init() is
called either from spl_board_init() or from board_init_f(). For the
latter case, the board info assignment is much earlier than proposed
board_init_r(). Create a new function to fill gd->bd and call this
function when needed.
Signed-off-by: York Sun <york.sun@nxp.com>
CC: Lokesh Vutla <lokeshvutla@ti.com>
CC: Ravi Babu <ravibabu@ti.com>
CC: Lukasz Majewski <lukma@denx.de>
CC: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The MC boot sequence is contained in mc_env_boot. Update LS1088A
boards to use this function, and hook it to reset_phy so that it's
called late enough, after the ports have been initialized, for
proper DPC / DPL fixup.
Signed-off-by: Bogdan Purcareata <bogdan.purcareata@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
This change is required due to trusted OS (OP-TEE) not being position
independent code, it requires compile time fixed base address.
To take care of this it is assumed that all layerscape armv8 platforms
has minimum 2G ddr in first region. So we can have fixed address
space (66 MB -> (2MB for PPA + 64MB for trusted OS)) allocated from
top of first 2G ddr region and compile trusted OS with this fixed
base address.
But one exception here is ls1012 where we have only 1G (rdb) or 512M
(frdm) ddr memory. For those we can have different fixed compile time
base addresses for trusted OS.
Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
CONFIG_CMD_BOOTZ symbol does not work in board config file
anymore, so fix this by moving it to Kconfig.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Rx Compliance tests may fail intermittently at high jitter
frequencies using default register values.
Program register USB_PHY_RX_OVRD_IN_HI in certain sequence
to make the Rx compliance test pass.
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Fix a bug of 'commit 8104deb2d6 ("armv8: layerscape: Adjust memory
mapping for Flash/SD card on LS1046A")' as NAND block size is 256KB
on LS1046AQDS.
Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Avoid NULL pointer dereference after setup failed due to a
missing network.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
For some functions the @return description is missing.
Fix typo.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
This fixes an issue with OpenBSD's bootloader, and I think should also
fix a similar issue with grub2 on legacy devices. In the legacy case
we were creating disk objects for the partitions, but not also the
parent device.
Reported-by: Jonathan Gray <jsg@jsg.id.au>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
When calling bootefi hello twice a kernel dump occurs.
Neither bootefi hello nor bootefi selftest have an image
device patch. So do not try to dereference the NULL
value.
Fixes: 95c5553ea2 efi_loader: refactor boot device and loaded_image handling
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
The task priority levels test uses two events one passes the
notification counter as context. The other passes NULL.
Both use the same notification function. So we need to check
for NULL here.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
If the memory regions are different efi_st_memcmp currently
returns the difference of the addresses. Insted the
difference of the first differing byte pair should be
returned.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
This patch provides an EFI application to check the correct function
of the Simple Network Protocol implementation.
It sends a DHCP request and analyzes the DHCP offer.
Different error conditions including a 10s timeout are checked.
A successful execution will look like this:
=> bootefi nettest
Scanning disk ide.blk#0...
Found 1 disks
WARNING: Invalid device tree, expect boot to fail
Network test
DHCP Discover
DHCP reply received from 192.168.76.2 (52:55:c0:a8:4c:02)
as broadcast message.
OK. The test was completed successfully.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
Add %pm as format string to print a MAC address.
This is helpful when analyzing network problems.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
Enclose definition in parantheses to allow using efi_st_error
like a void function.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
In the receive function all return values should be filled.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
The size fields in the Simple Network Protocol are all
UINTN in the UEFI spec. So use size_t.
Provide a function description of the receive function.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
The returned interrupt status was wrong.
As out transmit buffer is empty we need to always set
EFI_SIMPLE_NETWORK_TRANSMIT_INTERRUPT.
When we have received a packet we need to set
EFI_SIMPLE_NETWORK_RECEIVE_INTERRUPT.
Furthermore we should call efi_timer_check() to handle events.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
The WaitForPacket event informs that a network package has been
received by the SimpleNetworkProtocol.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
[agraf: Move is_signaled = true line into efi_net_push()]
Signed-off-by: Alexander Graf <agraf@suse.de>
A timer event is defined. The timer handler cares for receiving new
packets.
efi_timer_check is called both in efi_net_transmit and efi_net_receive
to enable events during network communication.
Calling efi_timer_check in efi_net_get_status is implemented in a
separate patch.
[agraf] This patch is needed to make efi_net_get_status() actually
report incoming packets.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
[agraf: fix spelling in comment]
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
U-Boot does not implement all functions of the simple network
protocol. The unimplemented functions return either of
EFI_SUCCESS and EFI_INVALID_PARAMETER.
The UEFI spec foresees to return EFI_UNSUPPORTED in these cases.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
The length of a MAC address is 6.
We have to set this length in the EFI_SIMPLE_NETWORK_MODE
structure of the EFI_SIMPLE_NETWORK_PROTOCOL.
Without this patch iPXE fails to initialize the network with
error message
SNP MAC(001e0633bcbf,0x0) has invalid hardware address length 0
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
Provide the simple network protocol revision.
This revision number could be used to identify backwards compatible
enhancements of the protocol.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
WaitForPacket is an event and not a function pointer.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
The UEFI spec defines parameter index of WaitForEvent as UINTN*.
So we should use size_t here.
I deliberately do not use UINTN because I hold a following patch
that will eliminate UINTN because uppercase types to not match
the U-Boot coding style.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
We need to call some boottime services internally.
Our GUIDs are stored as const efi_guid_t *.
The boottime services never change GUIDs.
So we can define the parameters as const efi_guid_t *.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
The UEFI spec defines the length parameters of CopyMem and SetMem
as UINTN. We should size_t here.
The source buffer of CopyMem should be marked as const.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
We should use the existing 64bit division instead of
reinventing the wheel.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Provide comments describing the boot service functions.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Rename counter to more illustrative names.
Update notification function description.
Simplify notification function.
Add comment for arbitrary non-zero value.
Document @return.
Use constants for return values of setup, execute, teardown.
Reported-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
Queued and signaled describe boolean states of events.
So let's use type bool and rename the structure members to is_queued
and is_signaled.
Update the comments for is_queued and is_signaled.
Reported-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Rob Clark <robdclark@gmail.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
All error messages in the selftests should use efi_st_error.
efi_st_error will print the file name and line number of the error.
Splitting message texts due to lines being over 80
characters is avoided. This resolves the issue reported
by Simon Glass in
https://lists.denx.de/pipermail/u-boot/2017-September/307387.html
Reported-by: Simon Glass <sjg@chromium.org>
Fixes: 623b3a5797 efi_selftest: provide an EFI selftest application
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
Realloc does not free the old memory area if it fails.
Identified by cppcheck.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
The livetree codepath of ofnode_get_addr_size always used the "reg"
property for of_get_property. Use the property parameter of the function
call instead and check the return value if the property exists.
Otherwise return FDT_ADDR_T_NONE.
This was discoverd while using SPI NOR with livetree.
spi_flash_decode_fdt checks for memory-map and will not fail with
livetree even if the property does not exist.
Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The size variable may not be always be a mulitple of
ARCH_DMA_MINALIGN and using it to flush cache leads to cache
misaligned warnings.
Therefore, round up the size to a multiple of ARCH_DMA_MINLAIGN
when allocating private data.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
These checks cannot fail since driver model will not call a driver's
method if it cannot fully create the driver data structures.
It is confusing to have these checks and others might copy them. Drop this
code.
Signed-off-by: Simon Glass <sjg@chromium.org>
In U-Boot -ENODEV means that there is no device. When there is a problem
with the device, drivers should return an error like -ENXIO or -EREMOTEIO.
When the device tree properties cannot be read correct , they should
return -EINVAL.
Update various GPIO drivers to follow this rule, to help with consistency
for future driver writers.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reported-by: Adam Ford <aford173@gmail.com>
These three drivers all use U_BOOT_DEVICE rather than device tree to
create devices, so have to do manual allocation of platform data. This is
not true for new platforms.
Add a more explicit comment so that people do not copy this approach with
new boards.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reported-by: Adam Ford <aford173@gmail.com>
It does not look like this driver needs to use a bind() method. It does
not manually create devices with device_bind() nor does it create devices
using U_BOOT_DEVICE(). It seems to only use device tree.
Therefore the manual allocation of platform data is not needed and is
confusing. Also platform data should be set up by the ofdata_to_platdata()
method, not bind().
Update the driver in case others use it as a model in future.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reported-by: Adam Ford <aford173@gmail.com>
Since e7881d85 "dm: mmc: Drop CONFIG_DM_MMC_OPS" DM_MMC_OPS
is no more used, remove it from STM32_SDMMC2 dependencies
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Add pinctrl and sdmmc nodes to add MMC support for
STM32H743 evaluation board.
Evaluation board needs a second pinctrl node
"pinctrl_sdmmc1_level_shifter" to drive a level shifter
on MMC bus.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
As suggested by Vikas Manocha, update embedded SRAM address
to use AXI SRAM available on D1 domain instead of using
AHB SRAM (D2 domain).
On some STM32H743 SoCs, D2 domain SRAM is accessible even if
SRAMxEN bit in AHB2ENR bits are not set whereas on others SoCs
version it's not accessible.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Vikas Manocha <vikas.manocha@st.com>
As the timer 2 is on APB1 bus, the maximum of clock frequency of APB1 timer
clock is half of SYSCLK. Then to calculate the timer prescaler for timer 2
which need to be divided by 2.
Signed-off-by: Bo Shen <voice.shen@gmail.com>
Reviewed-by: Vikas Manocha <vikas.manocha@st.com>
Check malloc() return values and properly unwind on errors so
memory allocated for fat_itr structures get freed properly.
Also fixes a leak of fsdata.fatbuf in fat_size().
Fixes: 2460098cff ("fs/fat: Reduce stack usage")
Reported-by: Coverity (CID: 167225, 167233, 167234)
Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Reviewed-by: Tom Rini <trini@konsulko.com>
The 'block' field of fat_itr needs to be properly aligned for DMA and
while it does have '__aligned(ARCH_DMA_MINALIGN)', the fat_itr structure
itself needs to be properly aligned as well.
While at it use malloc_cache_aligned() for the other aligned allocations
in the file as well.
Fixes: 2460098cff ("fs/fat: Reduce stack usage")
Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Reviewed-by: Tom Rini <trini@konsulko.com>
In the Linux Kernel on ARM64, the Image.COMPRESSION file is not
self-extracting in the way that x86 and ARM images are. So when
CMD_BOOTI is enabled we should also default to enabling CMD_UNZIP and
CONFIG_LZMA in order for the user to be able to decompress many of the
common compressions that will be done to an Image file.
Signed-off-by: Tom Rini <trini@konsulko.com>
On case-insensitive file systems we have collision between
scripts/kconfig/ directory and scripts/Kconfig file. This patch moves
scripts/Kcofnig contents to cmd/Kconfig to fix that.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com>
This driver is currently used by STM32F7 and STM32H7 SoCs.
As CONFIG_CLK and OF_CONTROL flags are set by default for these
2 SoCs, this flag becomes useless in this driver, so remove it.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
stm32f4 doesn't support FIFO and OVERRUN feature.
The enable bit is not at the same location in CR1
register than for STM32F7 and STM32H7.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Add fifo mode support for rx and tx.
As only STM32H7 supports this feature, add has_fifo flag
to uart configuration to use fifo only when possible.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
STM32F4 serial IP is similar to F7 and H7, but registers
are not located at the same offset and some feature are
only supported by F7 and H7 version.
Registers offset must be added for each version and also
some flags indicated the supported feature.
Update registers name to match with datasheet (sr to isr,
rx_dr to rdr and tx_dr to tdr) and remove unused regs
(cr2, gtpr, rtor, and rqr).
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
This patch remove the extra compatibility string "st,stm32h7-usart"
and "st,stm32f7-usart" to avoid confusion, save some time & space.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Vikas Manocha <vikas.manocha@st.com>
macro branch_if_master checks master CPU via (Aff3 & (Aff2:Aff1:Aff0))
it is simple but a little obscure.
fix by checking Affx fields within MPIDR_EL1 directly.
Signed-off-by: zijun_hu <zijun_hu@htc.com>
relocate_code() allocates 32 bytes stack frame but only 16 bytes are
freed before return. it will cause errors to possible previous frames
and doesn't make relocate_code() look like a function.
fix by freeing 32 bytes stack space
Signed-off-by: zijun_hu <zijun_hu@htc.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
the new GD address is calculated via board data BD currently
it require the new GD area locates below BD tightly, so a strict
constraint is imposed on memory layout which maybe make special
platform unpleasant.
fix it by getting new GD address from gd->new_gd directly.
Signed-off-by: zijun_hu <zijun_hu@htc.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Given how we handle the ARM toolchain we can't easily combine these two
jobs, so don't. Give xilinx/ARM a separate build.
Signed-off-by: Tom Rini <trini@konsulko.com>
The recent changes to these files did not completely fix the previous
issues, or introduced different (minor) issues. In cmd/gpt.c we need to
dereference str_disk_guid to be sure that malloc worked. In
cmd/nvedit.c we need to be careful that we can also fit in that leading
space when adding to the string. And in tools/fit_image.c we need to
re-work the error handling slightly in fit_import_data() so that we only
call munmap() once. We have two error paths here, one where we have an
fd to close and one where we do not. Adjust labels to match this.
Reported-by: Coverity (CID: 167366, 167367, 167370)
Signed-off-by: Tom Rini <trini@konsulko.com>
This board is based on Intel Tangier SoC (Intel Merrifield platform)
and may utilize ACPI powerfulness.
Bring minimum support by appending initial DSDT table for it.
Note, the addresses for generated tables are carefully chosen to avoid
any conflicts with existing shadowed BIOS data. The user have somewhat
like ~31 kB available for compiled ACPI tables that ought to be enough.
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Intel Tangier SoC is a part of Intel Merrifield platform which doesn't
utilize ACPI by default. Here is an attempt to unleash ACPI flexibility
power on Intel Merrifield based platforms.
The change brings minimum support of the devices that found on
Intel Merrifield based end user device.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
The setexpr command is useful for scripting, lets enable it for all
x86 based theadorable platforms.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This enables the easier usage of "-custom" kernel versions as well.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This is needed for the PCIe hotplug to work correctly on some boards.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
- Move SoCFPGA and K2 boards to their own job
- Expand the microblaze job to cover ARM boards from Xilinx as well.
Signed-off-by: Tom Rini <trini@konsulko.com>
As reported by Coverity, we did not free dirnode in the case of failure.
Do so now.
Reported-by: Coverity (CID: 131221)
Cc: Stefan Brüns <stefan.bruens@rwth-aachen.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Coverity has found some problems with the return paths in parts of this
code. We have a case where we were going to the wrong part of the
unwind (open() failed so we cannot close the fd), a case where we were
only free()ing our buf on the error path and finally a case where we did
not munmap in the failure path.
Reported-by: Coverity (CID: 138492, 138495, 143064)
Signed-off-by: Tom Rini <trini@konsulko.com>
For the initrd portion of handling our bootm arguments we do not have a
sufficiently long enough buffer for some improbable 64bit cases. Expand
this buffer to allow for a 64bit address and almost 256MB initrd to be
used. Make use of strncpy/strncat when constructing the values here
since we know what the worst case valid values are, length wise.
Similarly for bootargs themselves, we need to make use of strlen/sizeof
and strncpy/strncat to ensure that we don't overflow bootargs itself.
Cc: Simon Glass <sjg@chromium.org>
Cc: Alexander Graf <agraf@suse.de>
Reported-by: Coverity (CID: 131256)
Signed-off-by: Tom Rini <trini@konsulko.com>
When we have multiple messages provided, we need to be sure that we do
not exceed the length of our 'message' buffer. In the for loop, make
sure that pos is not larger than message. Only copy in at most however
much of the message buffer remains. Finally, if we have not reached the
end of the message buffer, put in a space and NULL, and if we have,
ensure the buffer is now NULL termined.
Reported-by: Coverity (CID: 165116)
Signed-off-by: Tom Rini <trini@konsulko.com>
With the overlay tests now being built in sandbox Coverity has found a
number of issues in the tests. In short, if malloc ever failed we would
leak the previous mallocs, so we need to do the usual goto pattern to
free each in turn. Finally, we always looked at the free()d location to
see how many tests had failed for the return code.
Reported-by: Coverity (CID: 167224, 167227, 167230, 167236)
Signed-off-by: Tom Rini <trini@konsulko.com>
Create a common exit for most of the error handling code in
do_rename_gpt_parts. Delete the list elements in disk_partitions
before calling INIT_LIST_HEAD from get_gpt_info() a second time.
The SIZEOF_MISMATCH error is not addressed, since that problem was
already fixed by "GPT: incomplete initialization in
allocate_disk_part".
Signed-off-by: Alison Chaiken <alison@peloton-tech.com>
Reported-by: Coverity (CID: 167222, 167235, 167237)
Reviewed-by: Tom Rini <trini@konsulko.com>
The previous commit fixed a problem in FAT code where going back to the
root directory using '..' wouldn't work correctly on FAT12 or FAT16.
Add a test to exercise this case (which was once fixed in commit
18a10d46f2 "fat: handle paths that include ../" but reintroduced due to
the directory iterator refactoring).
This test only very barely catches the problem - without the fix the
size command still gives valid output but the additional spurious
"Invalid FAT entry" error message makes it not get caught in the
'egrep -A3 ' output. I tried to make a proper test that grows the root
directory to two clusters lots of with dummy files but that causes the
write tests to crash the sandbox totally...
Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Reviewed-by: Tom Rini <trini@konsulko.com>
If we end up back in the root directory via a '..' directory entry, set
itr->is_root accordingly. Failing to do that gives spews like
"Invalid FAT entry" and being unable to access directory entries located
past the first cluster of the root directory.
Fixes: 8eafae209c ("fat/fs: convert to directory iterators")
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Currently we can only test FAT32 which is the default FAT version that
mkfs.vfat creates by default. Instead make it explicitly create either a
FAT16 or a FAT32 volume. This allows us to exercise more code, for
instance the root directory handling is done differently in FAT32 than
the older FATs.
Adding FAT12 support is a much bigger job since the test creates a 2.5GB
file and the FAT12 maximum partition size is way smaller than that.
Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Reviewed-by: Tom Rini <trini@konsulko.com>
The current code doesn't compute the group descriptor checksum correctly
for the filesystems that e2fsprogs 1.43.4 creates (they have
'Group descriptor size: 64' as reported by tune2fs). Extend the checksum
calculation to be done as ext4_group_desc_csum() does in Linux.
This fixes these errors in dmesg from running fs-test.sh and makes it
succeed again:
[1671902.620699] EXT4-fs (loop1): ext4_check_descriptors: Checksum for group 0 failed (35782!=10965)
[1671902.620706] EXT4-fs (loop1): group descriptors corrupted!
Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
The regulator bindings state that regulator prefixes are allowd to be
in upper or lower case. However pmic_bind_children from pmic_uclass uses
strncmp to compare DT node name against prefix. This comparison is case
sensitive hence the regulator driver prefix case matters.
Signed-off-by: Felix Brack <fb@ltec.ch>
When eMMC was formattaed for Linux partition table, "userdata" partition
is missing. In this case, part_get_info_by_name() iterates over all
registered drivers (which are PART_TYPE_EFI, PART_TYPE_DOS and
PART_TYPE_ISO). And when it comes to PART_TYPE_ISO (which has empty
partition table), we can see next warning in U-Boot output:
** First descriptor is NOT a primary desc on 1:1 **
This patch switches to part_get_info_by_name_type() API in order to
check only EFI partitions for "userdata" partitions. This eliminates
mentioned warning.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
There is already existing function part_get_info_by_name().
But sometimes user is particularly interested in looking for only
specific partition type. This patch implements such an API that
provides partition searching by name for specified partition type.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
When using regular $partitions variable (for Linux boot), we can see
some unwanted messages:
> ERROR: cannot find partition: 'userdata'
> at arch/arm/mach-omap2/utils.c:96/omap_mmc_get_part_size()
> Warning: fastboot.userdata_size: unable to calc
Let's remove those, as missing 'userdata' partition is correct behavior
for Linux partition, and we don't want to see some Android-related
messages in this case.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
This board builds an U-Boot binary that is bootable with QEMU's 'virt'
machine on ARM. The minimal QEMU command line is:
qemu-system-arm -machine virt,highmem=off -bios u-boot.bin
(Note that the 'highmem=off' parameter to the 'virt' machine is required for
PCI to work in U-Boot.) This command line enables the following:
- u-boot.bin loaded and executing in the emulated flash at address 0x0
- A generated device tree blob placed at the start of RAM
- A freely configurable amount of RAM, described by the DTB
- A PL011 serial port, discoverable via the DTB
- An ARMv7 architected timer
- PSCI for rebooting the system
- A generic ECAM-based PCI host controller, discoverable via the DTB
Additionally, QEMU allows plugging a bunch of useful peripherals to the PCI bus.
The following ones are supported by both U-Boot and Linux:
- To add a Serial ATA disk via an Intel ICH9 AHCI controller, pass e.g.:
-drive if=none,file=disk.img,id=mydisk -device ich9-ahci,id=ahci -device ide-drive,drive=mydisk,bus=ahci.0
- To add an Intel E1000 network adapter, pass e.g.:
-net nic,model=e1000 -net user
- To add an EHCI-compliant USB host controller, pass e.g.:
-device usb-ehci,id=ehci
- To add a NVMe disk, pass e.g.:
-drive if=none,file=disk.img,id=mydisk -device nvme,drive=mydisk,serial=foo
Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
QEMU emulates such a device with '-machine virt,highmem=off' on ARM.
The 'highmem=off' part is required for things to work as the PCI code
in U-Boot doesn't seem to support 64-bit BARs.
Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Use the new helper function to avoid boilerplate in the driver.
Note that this changes __raw_writel et al. to writel. AFAICT this is
no problem because:
- The Linux driver for the same hardware uses the non-__raw variants as
well (via pci_generic_config_write()).
- This driver seems to be used only on MIPS so far, where the __raw and
non-__raw accessors are the same.
Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This sort of pattern for implementing memory-mapped PCI config space
accesses appears in U-Boot twice already, and a third user is coming up.
So add helper functions to avoid code duplication, similar to how Linux
has pci_generic_config_write and pci_generic_config_read.
Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
In order to be able to select the right DTB, we need to have identified the
board before spl_early_init() is called.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
u-boot can be embedded within a FIT image with multiple DTBs. It then
selects at run-time which one is best suited for the platform.
Use the same principle here for the SPL: put the DTBs in a FIT image,
compress it (LZO, GZIP, or no compression) and append it at the end of the
SPL.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
[trini: Move default y of SPL_MULTI_DTB_FIT_DYN_ALLOC to it being the
default choice if SYS_MALLOC_F, drop spl.h include from lib/fdtdec.c
it's unused.]
Signed-off-by Tom Rini <trini@konsulko.com>
If board_fit_config_name_match() doesn't match any configuration node,
then use the default one (if provided).
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
If the dtb is the first data of the FIT, the its offset is 0x0. Change the
test to '<' instead of '<='
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Those 2 functions don't modify their input, we can mark it const.
This prevents compilation warnings when they are provided const input.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
CONFIG_FIT_EMBED might be confused with CONFIG_OF_EMBED, rename it
MULTI_DTB_FIT as it is able to get a DTB from a FIT image containing
multiple DTBs. Also move the option to the Kconfig dedicated to the DTS
options and create a README for this feature.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Since commit ff98cb9051 ("part: extract MBR signature from partitions")
SPL boot on i.MX6 starts to fail:
U-Boot SPL 2017.09-00221-g0d6ab32 (Oct 02 2017 - 15:13:19)
Trying to boot from MMC1
(keep in loop)
Use the original allocation scheme for the SPL case, so that MX6 boards
can boot again.
This is a temporary solution to avoid the boot regression.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Acked-by: Rob Clark <robdclark@gmail.com>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
The EFI selftest has been broken by a patch on efi-next.
We should enable CONFIG_CMD_BOOTEFI_SELFTEST on
qemu-x86_defconfig and qemu-x86_64_defconfig by default
to catch this type of problem in the Travis CI tests.
These systems typically have abundant memory so that
enabling this option should not pose a problem.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
While this came in with a default value of 6 I am lowering this to 4.
The MTD/UBI code has a large number of error messages that we include
now. In addition, "normally" warning messages are not included so this
feels like a more natural level to have.
Signed-off-by: Tom Rini <trini@konsulko.com>
As we discussed before in ML, dm_dbg() causes undefined reference
error if #define DEBUG is added to users, but not drivers/core/util.c
We do not need this macro because we can use pr_debug() instead, and
it is pretty easy to enable it for the DM core by using ccflags-y.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Copied from Linux 4.13.
Commit log of 3e9b3112ec74 of Linux explains well why this header
is useful.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Many drivers had started to use dev_err, dev_info, etc. for log
functions. Currently, we are relying on <linux/compat.h>, but I
guess the best home is <dm/device.h>, taking into account that
Linux defines them in <linux/device.h>.
For now, I am leaving the ones in <linux/compat.h> because lots of
Linux-originated code uses dev_*(), but the first argument is not
struct udevice, so we need to ignore the bogus argument. More
efforts are needed to iron out the issues.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Collect runtime BUG/WARN into a self-contained header <linux/bug.h>
to make these macros easier to use.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
As commit 84b8bf6d5d ("bug.h: move BUILD_BUG_* defines to
include/linux/bug.h") noted, include/linux/bug.h was locally
modified for U-Boot because the name conflict of error() caused
build errors at that time.
Now error() is gone, so we can fully sync BUILD_BUG* with Linux.
These macros are just compile-time utilities. Nothing depends on
platform code, so it should make sense to simply copy Linux's ones.
Please note Linux split BUILD_BUG stuff out into <linux/build_bug.h>
by commit bc6245e5efd7. Let's follow it.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
This header uses ulong, size_t, loff_t.
Include <linux/types.h> to make this header self-contained.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
This macro prevents us from using compiletime_error/assert defined
in <linux/compiler.h>.
Now we can remove it, then we will be able to import more BUILD_BUG
macros from Linux.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
U-Boot widely uses error() as a bit noisier variant of printf().
This macro causes name conflict with the following line in
include/linux/compiler-gcc.h:
# define __compiletime_error(message) __attribute__((error(message)))
This prevents us from using __compiletime_error(), and makes it
difficult to fully sync BUILD_BUG macros with Linux. (Notice
Linux's BUILD_BUG_ON_MSG is implemented by using compiletime_assert().)
Let's convert error() into now treewide-available pr_err().
Done with the help of Coccinelle, excluing tools/ directory.
The semantic patch I used is as follows:
// <smpl>
@@@@
-error
+pr_err
(...)
// </smpl>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
[trini: Re-run Coccinelle]
Signed-off-by: Tom Rini <trini@konsulko.com>
When we import code from Linux, with regular re-sync planned, we want
to use printk() and pr_*(). U-Boot does not support them in a clean
way. So, people end up with local macros, or compat headers here and
there, then we occasionally see build errors of definition conflicts.
We have include/linux/compat.h, but putting all sorts of unrelated
things into a single header is just a temporal workaround. Hence this
patch, to find the best home for all printk variants. If you want to
use printk() and friends, please include <linux/printk.h>. This header
is self-contained, and pulls in only a few headers.
When I was testing this clean-up, I noticed the image size exceeded
its platform limit on some boards. This is because all pr_*() that
were previously defined as no-op in include/linux/mtd/mtd.h (unless
CONFIG_MTD_DEBUG is set), are now enabled.
To make such boards happy, this commit also implements CONFIG_LOGLEVEL.
The concept is similar to the kernel parameter "loglevel". (Actually,
the Kconfig help message was taken from kernel-paremeter.txt of Linux)
Messages with a loglevel smaller than console loglevel will be printed.
The difference is the loglevel is build-time determined. To save the
image size, lower priority pr_*() are compiled out. I set the default
of CONFIG_LOGLEVEL to 6, i.e. pr_notice and higher priority messages
are compiled in.
I adjusted CONFIG_LOGLEVEL to avoid build error for some boards.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
[trini: Add in SPL_LOGLEVEL that is the same as LOGLEVEL]
Signed-off-by: Tom Rini <trini@konsulko.com>
<common.h> pulls in a lot of headers. Including it from every .c
file is a bad idea. We need to remove contents until it contains
nothing.
Move printf() and friends to <stdio.h>.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Add pinconf support to the PFC driver, so that it can handle DT
props bias-disable, bias-pull-up, bias-pull-down, drive-strength
and power-source.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
If the USB Ethernet gadget is not yet enabled, the call of
usb_ether_init in board/sunxi/board.c will lead to undefined reference
error when building.
Fix this problem.
Fixes: 50ddbf1199a0 ("sunxi: Register usb_ether")
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
All the new SoCs from Allwinner since the A33 have had the phy_ctl offset
at 0x410 instead of 0x404 that was used on the previous SoCs.
Instead of adding more and more special cases as the number of SoCs grow,
let's invert the test to have 0x410 by default, and the (hopefully) fixed
number of old SoCs being the exception.
Suggested-by: Siarhei Siamashka <siarhei.siamashka@gmail.com>
Suggested-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Banana Pi M1 Plus is an open-source single-board computer
that adds more connectivity to the classic board using
Allwinner A20 SOC.
Bananapi M1-Plus features:
- A20 Dual-core 1.0GHz
- 1 GB DDR3 SDRAM
- MicroSD
- 10/100/1000 Ethernet RJ45
- WiFi b/g/n
- 5V DC Micro USB power-supply
For dts file,
Sync with Linux commit f92ca09("Merge branch 'akpm/master'").
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
As we have already DRAM initialization code for V3s SoC, we can
defaultly enable SPL now on Lichee Pi Zero.
Add CONFIG_SPL in Lichee Pi Zero defconfig.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Set CONFIG_MMC_SUNXI_SLOT_EXTRA=2 to enable the eMMC controller to
access eMMC on the board.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The upstream (Linux) device tree file for the Bananapi M3 follows the
convention of using the well known brand name, instead of the vendor
name, for naming. The file was recently added to upstream in commit
359b5a1e1c2d ("ARM: sun8i: a83t: Add device tree for Sinovoip Bananapi
BPI-M3")
Rename the device tree file in U-boot to match.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
USB_GADGET will fail to compile if USB_MUSB_GADGET is not defined. Make
sure we have that condition right.
Fixes: e0ea88042d51 ("sunxi: Imply USB_ETHER")
Suggested-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The current code, if there's both an eMMC and an MMC slot available on the
board, will swap the MMC indices based on whether we booted from the eMMC
or the MMC. This way, the MMC we're supposed to boot on will always have
the index 0.
However, this causes various issues, for example when using other
components that base their behaviour on the MMC index, such as fastboot.
Let's remove that hack, and take the opposite approach. The MMC will always
have the same index, but the bootcmd will pick the same device than the one
we booted from. This is done through the introduction of the mmc_bootdev
environment variable that will be filled by the board code based on the
boot device informations we can get from the SoC.
In order to not introduce regressions, we also need to adjust the fastboot
MMC device and the environment device in order to set it to the eMMC, over
the MMC, like it used to be the case.
Tested-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Our current board code duplicates a bit the sunxi_get_boot_device logic.
Now that we can use that function in the full-flavoured U-Boot, remove that
duplication and call the function instead.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
U-Boot itself might need to identify the boot device, for example to be
able to tell where to load the kernel from when several options are
possible.
Move the logic of spl_boot_device to a function that is compiled both for
the SPL and the main binary.
Tested-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
From rev.J A20-OLinuXino-MICRO has eMMC option. For now this is
only 4GB, but in the future size may increase.
The dts file is the same from mainline kernel.
Signed-off-by: Stefan Mavrodiev <stefan@olimex.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
GPT is pretty common these days and can be useful for things like fastboot.
Add a platform imply, so that users can still opt out if they wish so.
Reviewed-by: Jagan Teki <jagan@openedev.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
CONFIG_RANDOM_UUID is used by the GPT command to generate random UUID when
none are provided.
Move that option to Kconfig.
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The kernel DT of the SinA33 has evolved quite a bit. Make sure we sync it
and its upstream DTSI to be able to use the OTG. The DTs were taken from
the 4.13 kernel release.
Reviewed-by: Łukasz Majewski <lukma@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Now that we can enable the usb_ether gadget, do it. This will be especially
useful for boards that don't have any ethernet controller, such as the ones
based on the A13 or A33.
Reviewed-by: Łukasz Majewski <lukma@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The device model was implemented so far using a hook that needed to be
called from the board support, without DT support and only for the host.
Switch to probing both in peripheral and host mode through the DT.
Reviewed-by: Łukasz Majewski <lukma@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Fastboot need a bunch of options to be operating properly, such as the
g_dnl gadget, the fastboot command, and some options that make sense. Since
fastboot is now part of Kconfig, make sure we have them right.
That will also reduce the boilerplate in the defconfigs.
Reviewed-by: Łukasz Majewski <lukma@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
A good number of our boards have USB_GADGET enabled. Imply it so that all
the boards can benefit from it, and remove some boilerplate from our
defconfigs.
Reviewed-by: Łukasz Majewski <lukma@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
All the Allwinner boards use the same manufacturer, VID and PID for the
gadgets. Make them the defaults to remove some boilerplate from our
defconfigs.
Reviewed-by: Łukasz Majewski <lukma@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The usb_ether gadget duplicates the USB settings for the manufacturer,
product ID and vendor ID.
Make sure we use the common option so that we can expect a single VID/PID
couple for a single device.
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The g_dnl USB settings for the vendor ID, product ID and manufacturer are
actually common settings that can and should be shared by all the gadgets.
Make them common by renaming them, and convert all the users.
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
We need to select an interface for the usb_ether gadget, and they haven't
been converted to Kconfig yet. Add a choice to make sure we have an option
selected, and convert all the users.
Reviewed-by: Łukasz Majewski <lukma@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
While the USB Ethernet device address is already defined in Kconfig, the
host address isn't. Convert it.
Reviewed-by: Łukasz Majewski <lukma@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The USBNET_DEVADDR has nothing to do with the USB download gadget, but
rather with the USB Ethernet gadget. Move it out of the if statement.
Acked-by: Łukasz Majewski <lukma@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The setbits/clrbits/clrsetbits macros are used widely across the tree,
let's provide implementation for them in the sandbox.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Convert the sandbox architecture to make use of the new asm-generic/io.h
to provide address mapping functions. As sandbox actually performs
non-identity mapping between physical & virtual addresses we can't
simply make use of the generic mapping functions, but are able to
implement phys_to_virt() & make use of it from map_physmem().
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
Convert the powerpc architecture to make use of the new asm-generic/io.h
to provide address mapping functions. As powerpc can actually perform
non-identity mapping between physical & virtual addresses we can't
simply make use of the generic phys_to_virt() & virt_to_phys()
functions. However since map_physmem() already effectively implemented
the same thing as virt_to_phys() we can simply implement virt_to_phys()
instead of map_physmem() & use the generic map_physmem(). We also drop
the no-op unmap_physmem().
This has only been build-tested, feedback from architecture maintainers
is welcome.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: Wolfgang Denk <wd@denx.de>
Convert the nios2 architecture to make use of the new asm-generic/io.h to
provide address mapping functions. As nios2 actually performs
non-identity mapping between physical & virtual addresses we can't
simply make use of the generic functions, with the exception of being
able to drop our no-op unmap_physmem() and definitions of unused map
flags.
Feedback from architecture maintainers is welcome.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: Thomas Chou <thomas@wytron.com.tw>
Convert the mips architecture to make use of the new asm-generic/io.h to
provide address mapping functions. As mips actually performs
non-identity mapping between physical & virtual addresses we can't
simply make use of the generic functions, with the exception of being
able to drop our no-op unmap_physmem() and definitions of unused map
flags.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Acked-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Convert the xtensa architecture to make use of the new asm-generic/io.h
to provide address mapping functions. As the generic implementations are
suitable for xtensa this is primarily a matter of moving code.
This has only been build-tested, feedback from architecture maintainers
is welcome.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: Max Filippov <jcmvbkbc@gmail.com>
Acked-by: Max Filippov <jcmvbkbc@gmail.com>
Convert the x86 architecture to make use of the new asm-generic/io.h to
provide address mapping functions. As the generic implementations are
suitable for x86 this is primarily a matter of moving code.
This has only been build-tested, feedback from architecture maintainers
is welcome.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Convert the sh architecture to make use of the new asm-generic/io.h to
provide address mapping functions. As the generic implementations are
suitable for sh this is primarily a matter of moving code.
Feedback from architecture maintainers is welcome.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Convert the nds32 architecture to make use of the new asm-generic/io.h
to provide address mapping functions. As the generic implementations are
suitable for nds32 this is primarily a matter of removing code.
Feedback from architecture maintainers is welcome.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: Macpaul Lin <macpaul@andestech.com>
Convert the microblaze architecture to make use of the new
asm-generic/io.h to provide address mapping functions. As the generic
implementations are suitable for microblaze this is primarily a matter
of removing code.
Feedback from architecture maintainers is welcome.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: Michal Simek <monstr@monstr.eu>
Convert the m68k architecture to make use of the new asm-generic/io.h to
provide address mapping functions. As the generic implementations are
suitable for m68k this is primarily a matter of emoving code.
Feedback from architecture maintainers is welcome.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: Huan Wang <alison.wang@freescale.com>
Cc: Angelo Dureghello <angelo@sysam.it>
Acked-by: Angelo Dureghello <angelo@sysam.it>
Tested-by: Angelo Dureghello <angelo@sysam.it>
Convert the arm architecture to make use of the new asm-generic/io.h to
provide address mapping functions. As the generic implementations are
suitable for arm this is primarily a matter of removing code.
This has only been build-tested, feedback from architecture maintainers
is welcome.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Reviewed-by: Simon Glass <sjg@chromium.org>
Convert the arc architecture to make use of the new asm-generic/io.h to
provide address mapping functions. As the generic implementations are
suitable for arc this is primarily a matter of removing code.
Feedback from architecture maintainers is welcome.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: Alexey Brodkin <alexey.brodkin@synopsys.com>
Acked-by: Alexey Brodkin <abrodkin@synopsys.com>
Most architectures currently supported by U-Boot use trivial
implementations of map_to_physmem & virt_to_phys which simply cast a
physical address to a pointer for use a virtual address & vice-versa.
This results in a lot of duplicate implementations of these mapping
functions.
The set of functions provided by different architectures also differs,
with some having implementations of phys_to_virt & others not. A later
patch will make use of phys_to_virt in architecture-neutral code, and so
requires that it be provided for all architectures.
This patch introduces an asm-generic/io.h which provides generic
implementations of address mapping functions, allowing the duplication
of them between architectures to be removed. Once architectures are
converted to make use of this generic header it will also ensure that
all of phys_to_virt, virt_to_phys, map_physmem & unmap_physmem are
provided. The 2 families of functions differ in that map_physmem may
create dynamic mappings whilst phys_to_virt may not & therefore is more
limited in scope but doesn't require information such as a length &
flags.
This patch doesn't convert any architectures to make use of this generic
header - later patches in the series will do so.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Alexey Brodkin <alexey.brodkin@synopsys.com>
Cc: Angelo Dureghello <angelo@sysam.it>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Macpaul Lin <macpaul@andestech.com>
Cc: Michal Simek <monstr@monstr.eu>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Thomas Chou <thomas@wytron.com.tw>
Cc: Wolfgang Denk <wd@denx.de>
Acked-by: Angelo Dureghello <angelo@sysam.it>
Tested-by: Angelo Dureghello <angelo@sysam.it>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
This adds the proper implementation for the BTRFS filesystem.
The implementation currently supports only read-only mode and
the filesystem can be only on a single device.
Checksums of data chunks is unimplemented.
Compression is implemented (ZLIB + LZO).
Signed-off-by: Marek Behun <marek.behun@nic.cz>
create mode 100644 fs/btrfs/btrfs.h
create mode 100644 fs/btrfs/chunk-map.c
create mode 100644 fs/btrfs/compression.c
create mode 100644 fs/btrfs/ctree.c
create mode 100644 fs/btrfs/dev.c
create mode 100644 fs/btrfs/dir-item.c
create mode 100644 fs/btrfs/extent-io.c
create mode 100644 fs/btrfs/hash.c
create mode 100644 fs/btrfs/inode.c
create mode 100644 fs/btrfs/root.c
create mode 100644 fs/btrfs/subvolume.c
create mode 100644 fs/btrfs/super.c
BTRFS on disk structures are stored in Little Endian. Add functions
to convert this structures to cpu and to disk format.
On Little Endian hosts, these functions do nothing.
On Big Endian the CALL_MACRO_FROM_EACH from variadic-macro.h is used
to define all the members for each structure on which cpu_to_le* or
le*_to_cpu is to be called.
Signed-off-by: Marek Behun <marek.behun@nic.cz>
create mode 100644 fs/btrfs/conv-funcs.h
Add btrfs_tree.h and ctree.h from Linux which contains constants
and structures for the BTRFS filesystem.
Signed-off-by: Marek Behun <marek.behun@nic.cz>
create mode 100644 fs/btrfs/btrfs_tree.h
create mode 100644 fs/btrfs/ctree.h
Add a header variadic-macro.h which defines the CALL_MACRO_FOR_EACH marco.
This macro can be used as follows:
#define TEST(x)
CALL_MACRO_FOR_EACH(TEST, a, b, c, d)
This will expand to
TEST(a) TEST(b) TEST(c) TEST(d)
The nice thing is that CALL_MACRO_FOR_EACH is a variadic macro, thus the
number of arguments can vary (although it has an upper limit - in this
implementation 32 arguments).
Signed-off-by: Marek Behun <marek.behun@nic.cz>
create mode 100644 include/u-boot/variadic-macro.h
The ext4, reiserfs and zfs filesystems all have their own implementation
of the same function, *_devread. Generalize this function into fs_devread
and put the code into fs/fs_internal.c.
Signed-off-by: Marek Behun <marek.behun@nic.cz>
[trini: Move fs/fs_internal.o hunk to the end of fs/Makefile as all
cases need it]
Signed-off-by: Tom Rini <trini@konsulko.com>
Add UniPhier platform specific glue layer to support USB3 Host mode
on Synopsys DWC3 IP.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Marek Vasut <marex@denx.de>
The stored 'blk' value is overwritten to 'size / 512' before it can
be used in usb_stor_set_max_xfer_blk(). This is not what we want.
In fact, when 'size' exceeds the upper limit (USHRT_MAX * 512), we
should simply assign 'size' to the upper limit.
Reported-by: Coverity (CID: 167250)
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
The 'Max Burst Size' indicates to the xHC the maximum number of
consecutive USB transactions that should be executed per scheduling
opportunity. This is a “zero-based” value, where 0 to 15 represents
burst sizes of 1 to 16, but at present this is always set to zero.
Let's program the required value according to real needs.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
USB endpoint reports the period between consecutive requests to send
or receive data as bInverval in its endpoint descriptor. So far this
is ignored by xHCI driver and the 'Interval' field in xHC's endpoint
context is always programmed to zero which means 1ms for low speed
or full speed , or 125us for high speed or super speed. We should
honor the interval by getting it from endpoint descriptor.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
USB 3.0 hubs report bit[5] in the port status change response as BH
reset. The hub shall set the C_BH_PORT_RESET field for this port.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
During usb_hub_port_connect_change(), a port reset set feature
request is issued to the port, and later a port reset clear feature
is done to the same port before the function returns. However at
the end of usb_scan_port(), we attempt to clear port reset again
on a cached port status change variable, which should not be done.
Adjust the call to clear port reset to right before the call to
usb_hub_port_connect_change().
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
In xhci_check_maxpacket(), the control endpoint 0 max packet size
is wrongly taken from the interface's endpoint descriptor. However
the default endpoint 0 does not come with an endpoint descriptor
hence is not included in the interface structure. Change to use
epmaxpacketin[0] instead.
The other bug in this routine is that when setting max packet size
to the xHC endpoint 0 context, it does not clear its previous value
at all before programming a new one.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
For xHCI it is not possible to read a device descriptor before it
has been assigned an address. That's why usb_setup_descriptor()
was called with 'do_read' being false. But we really need try to
read the device descriptor before starting any real communication
with the default control endpoint.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Full speed device endpoint 0 can have 8/16/32/64 bMaxPacketSize0.
Other speed devices report fixed value per USB spec. So it only
makes sense if we send a get device descriptor with 64 bytes to
full speed devices.
While we are here, update the comment block to be within 80 cols.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
xHCI uses normal TRBs for both bulk and interrupt. This adds the
missing interrupt transfer support to xHCI so that devices like
USB keyboard that uses interrupt transfer can work.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Normal endpoint descriptor size is 7, but for audio extension it is
9. Handle that correctly when parsing endpoint descriptor.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
At present xHCI driver assumes LS/FS devices are attached directly
to a HS hub. If they are connected to a LS/FS hub, the driver will
fail to perform the USB enumeration process on such devices.
This is fixed by looking from the device itself all the way up to
the HS hub where the TT that serves the device is located.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Now that we have changed to remove all devices under the root hub in
usb_stop(), and corrected the USB emulator select logic, it makes no
sense to do various tests based on 'usb tree' output since the order
of devices is no longer fixed. Remove these USB test cases related
to 'usb tree'.
For the USB remove test, ideally we should remove an emulator device
node from the device tree, but this is so far not working. Change to
test the 'usb stop' only.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
With the root hub unbinding in usb_stop(), there is no need to do
a Sandbox-specific reset operation. usb_emul_reset() is no longer
used anywhere, drop it.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
At present we only do device_remove() during usb stop. The DM API
device_remove() only marks the device state as inactivated, but
still keeps its USB topology (eg: parent, children, etc) in the DM
device structure. There is no issue if we only start USB subsystem
once and never stop it. But a big issue occurs when we do 'usb stop'
and 'usb start' multiple times.
Strange things may be observed with current implementation, like:
- the enumeration may report only 1 mass storage device is detected,
but the total number of USB devices is correct.
- USB keyboard does not work anymore after a bunch of 'usb reset'
even if 'usb tree' shows it is correctly identified.
- read/write flash drive via 'fatload usb' may complain "Bad device"
In fact, every time when USB host controller starts the enumeration
process, it takes random time for each USB port to show up online,
hence each USB device may appear in a different order from previous
enumeration, and gets assigned to a totally different USB address.
As a result, we end up using a stale USB topology in the DM device
structure which still reflects the previous enumeration result, and
it may create an exact same DM device name like generic_bus_0_dev_7
that is already in the DM device structure. And since the DM device
structure is there, there is no device_bind() call to bind driver to
the device during current enumeration process, eventually creating
an inconsistent software representation of the hardware topology, a
non-working USB subsystem.
The fix is to clear the unused USB topology in the usb_stop(), by
calling device_unbind() on each controller's root hub device, and
the unbinding will unbind all of its children automatically.
For Sandbox, we need scan the device tree each time when we start
the USB stack, in order to re-create the emulated USB devices and
bind drivers for them before we actually do the driver probe.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
At present the usb hub emulator always reports its downstream port
speed as full speed. Actually it is high speed for sandbox-flash,
and low speed for sandbox-keyb. We can determine the device speed
by checking its device descriptor bcdUSB field, and do the proper
hub port status report based on that.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
This can be useful outside of the sandbox usb emulation uclass
driver. Expose it as a public API with a proper prefix (usb_emul_).
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Current emulator select logic in usb_emul_find_devnum() is to test
the USB address. The USB address of the device being enumerated is
initialized to zero at the beginning of the enumeration process in
usb_setup_device(). At this point, the saved USB address in the
platform data has not been assigned to any valid USB address either.
This means: the logic will select an emulator device according to
its sequence of declaring order in the device tree. Take test.dts
for example, flash-stick@0 will be selected before flash-stick@1.
But unfortunately such logic is wrong.
In fact USB devices show up in a random order during the enumeration
which means usb_emul_find_devnum() may be called on port 3 for keyb@3
before on port 0 for flash-stick@0.
To fix this, we introduce a new emulator uclass specific platdata
to store the USB device's port number on its parent hub, and update
the logic to test the port number instead.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
At present 'usb tree' shows that the root hub on the Sandbox USB
controller is at full speed. But its device descriptor says it's
USB 2.0, so let's report it as a high speed device.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Patch queue for efi - 2017-10-01
Lots of new things this time. High level highlights are:
- Shim support (to boot Fedora)
- Initial set of unit tests
- Preparations to support UEFI Shell
With Makefiles testing for $(SPL_TPL_)SYSRESET, we need TPL_SYSRESET
for do_reset() in TPL for Rockchip SoCs.
References: 87c16d4 "drivers: spl: consistently use the $(SPL_TPL_)
macro"
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
The RK3399-Q7 requires DM regulator support in SPL, so we can use the
regulator framework to reenable the eMMC and SPI, if these had been
turned of by the BIOS_DISABLE signal.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The Makefile already tests for SPL_DM_REGULATOR_FIXED, but Kconfig
does not provide it. This adds SPL_DM_REGULATOR_FIXED to Kconfig.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The (Qseven) BIOS_DISABLE signal on the RK3399-Q7 (Puma) keeps the
eMMC and SPI in reset initially and we need to write a GPIO to turn
them on before continuing the boot-up.
This adds the DTS entries for the additional regulator and makes
pinctrl and gpio3 available during SPL. It also adds a hook to the
spl_board_init() to ensure that the regulator gets probed and enabled.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The original initialisation code for board_init() was largely lifted
from the code on the EVB. However, the RK3399-Q7 can do with a much
more concise init sequence.
This cleans up the board_init() by updating it to the essentials for
the RK3399-Q7 and getting rid of the accumulated cruft.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
In the general case, we want to continue booting the full U-Boot
(contained in a discoverable FIT image) from the same device the SPL
stage was loaded from. This prepends the 'same-as-spl' specifier to
our configurable boot-order to make this the default behaviour.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
To support the new "same-as-spl" specifier in the boot-order on the
RK3399, this implements the chip-specific mapping from the information
obtainable from the BROM to a OF path name.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
It is often desirable to configure the spl-boot-order (i.e. the order
that SPL probes devices to find the FIT image containing a full U-Boot)
such that it contains 'the same device the SPL stage was booted from'
early on. To support this, we introduce the 'same-as-spl' specifier
for the spl-boot-order property.
This commit adds:
- documentation for the new board_spl_was_booted_from() function that
individual SoCs/boards should provide, if they can determine where
the SPL was booted from
- implements the new board_spl_was_booted_from() stub function
- adds support for handling the 'same-as-spl' specifier and calling
into the per-SoC/per-board support code.
This also updates the documentation for the 'u-boot,spl-boot-order'
property.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
In the expectation that the spl-boot-order code will eventually
gain use outside of mach-rockchip: let's add documentation on the
spl_node_to_boot_device() function, which is likely to become a
publicly exported function.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The Rockchip BROM allows reading where it booted from from SRAM.
This adds the necessary definitions (as received from Kever) for
the location of this information in the RK3399's SRAM and naming
for the constants used.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The later-stage spl_board_init (as opposed to board_init_f) should set
up board-specific details: these differ between the EVB-RK3399 and the
RK3399-Q7 (Puma).
This moves spl_board_init back into the individual boards and removes
the unneeded functionality from Puma.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
CONFIG_ENV_OFFSET is already defined in
include/configs/rockchip-common.h
For CONFIG_ROCKCHIP_BACK_TO_BROM=y we redefine CONFIG_ENV_OFFSET
to an unsuitable value. We were lucky to get a compiler warning.
Remove the incorrect redefinition.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Apparently, our earlier assumption that the BROM will always set up
the iomux for SDcard communication does not always hold true: when
booting U-Boot from the on-module (on the RK3368-uQ7) eMMC, the SDcard
pins are not set up and need to be configured by the pinctrl driver to
allow SD card access.
This change implements support for setting up the SDMMC pins in
pinctrl for the RK3368.
Reported-by: Klaus Goger <klaus.goger@theobroma-systems.com>
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The RK3368-uQ7 ATF has been moved back to 0x100000 (1MB from the start
of DRAM) to avoid it overwriting the active SPL stage during FIT image
loading. This change adapts the .its to match up (again) with our ATF
repository for the RK3368-uQ7.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Since the size of SPL can't be exceeded 0x8000 bytes in RK3288,
it is not possible add new SPL features like Falcon mode or etc.
So add TPL stage so-that adding new features to SPL is possible.
- TPL: DRAM init, clocks
- SPL: MMC, falcon, etc
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Instead of directly calling into the back-to-bootrom code, the RK3399
common SPL implementation now uses BOOT_DEVICE_BOOTROM to trigger a
transfer back into the bootrom.
With this factored out, the spl_board_init function can not be
customised for each RK3399 board.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Remove a duplicate CONFIG_ENV_IS_IN_MMC assignment for the lion-rk3368
defconfig.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Enable the Rockchip SARADC driver for all Rockchip SoCs.
Note that the SARADC peripheral is available on all SoCs except the
RK3036 and RK3228. However, as this is a DM-driver, enabling by
default will not cause any function problems (and can always be
changed from defconfig, if size is a concern).
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: David Wu <david.wu@rock-chips.com>
The ADC can support some channels signal-ended some bits Successive Approximation
Register (SAR) A/D Converter, like 6-channel and 10-bit. It converts the analog
input signal into some bits binary digital codes.
Signed-off-by: David Wu <david.wu@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Add tracing printings to Linux/Android boot commands, so that we can see
what's going on. Helps to trace possible bugs on early stages and
improves the output for user (which is especially useful, because we
have a bunch of boot commands executing one by one).
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Extract commands for booting Linux from eMMC to separate command. It
seems more logical that way, and allows us to run the whole command set
from U-Boot shell with only one command.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Right now on OMAP5-based boards we have only one partition defined for
Linux boot, which is rootfs. That doesn't work with bootpart=1:2 (that
is defined in include/environment/ti/boot.h). To fix Linux boot we may
either:
1. Change bootpart to be 1:1
2. Or add preceding partition, so that rootfs is actually 1:2
Second choice seems more reasonable, as DFU is already using similar
partition table and can rely on bootpart to be 1:2.
This patch adds "bootloader" partition. So now eMMC layout for Linux
boot looks like this:
offset content size partition
(KiB) (KiB)
Reviewed-by: Tom Rini <trini@konsulko.com>
=======================================================================
0 +--------------------------------+
| MBR/GPT header | 128 -
128 +--------------------------------+
| MLO | 256 -
384 +--------------------------------+
| u-boot.img | 1792 bootloader
2176 +--------------------------------+
| //////////// hole //////////// | 256 -
2432 +--------------------------------+
| U-Boot environment | 128 -
2560 +--------------------------------+
| U-Boot environment (redundant) | 128 -
2688 +--------------------------------+
| rootfs | remaining rootfs
end +--------------------------------+
=======================================================================
Guard hole appears because U-Boot environment offset was calculated for
Android partition table, which has two additional partitions in place of
that hole ("environment" and "misc" partitions).
This patch also changes rootfs offset from 2 MiB further to 2688 KiB,
so that there won't be any collisions with U-Boot environment when we
flash rootfs.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Right now on OMAP5-based boards we have only one partition defined for
Linux boot, which is rootfs. That doesn't work with bootpart=1:2 (that
is defined in include/environment/ti/boot.h). To fix Linux boot we may
either:
1. Change bootpart to be 1:1
2. Or add preceding partition, so that rootfs is actually 1:2
Second choice seems more reasonable, as DFU is already using similar
partition table and can rely on bootpart to be 1:2.
This patch adds "bootloader" partition. So now eMMC layout for Linux
boot looks like this:
offset content size partition
(KiB) (KiB)
Reviewed-by: Tom Rini <trini@konsulko.com>
=======================================================================
0 +--------------------------------+
| MBR/GPT header | 128 -
128 +--------------------------------+
| MLO | 256 -
384 +--------------------------------+
| u-boot.img | 1792 bootloader
2176 +--------------------------------+
| //////////// hole //////////// | 256 -
2432 +--------------------------------+
| U-Boot environment | 128 -
2560 +--------------------------------+
| U-Boot environment (redundant) | 128 -
2688 +--------------------------------+
| rootfs | remaining rootfs
end +--------------------------------+
=======================================================================
Guard hole appears because U-Boot environment offset was calculated for
Android partition table, which has two additional partitions in place of
that hole ("environment" and "misc" partitions).
This patch also changes rootfs offset from 2 MiB further to 2688 KiB,
so that there won't be any collisions with U-Boot environment when we
flash rootfs.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
This re-syncs omap3 DTS file with current file from
Linux v4.14-rc1 to ensure a consistent configuration. Upstream
Linux removed the redundant Interrupt-parent property from usbhsohci,
usbhsehci, ssi_port1 and ssi_port2 sub nodes.
Signed-off-by: Karthik Tummala <karthik@techveda.org>
Add missing .priv_auto_alloc_size() callback.
Previously private struct stm32_clk was not allocate
which leads to unpredictable behaviour
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
With DM enabled, gpio numbering is assigned based on the
probed order of gpios, irrespective of the gpio base. So enable
all necessary gpios in SPL.
Fixes: edf25d94d55c (“ARM: dts: OMAP5+: Enable gpio in SPL”)
Reported-by: Gou, Hongmei <h-gou@ti.com>
Tested-by: Aparna Balasubramanian <aparnab@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Now the u-boot spi image is greater than 0x80000, increase the same
in env during spi erase.
Reported-by: Yan Liu <yan-liu@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
On all other platforms the command 'findfdt' populates the variable
'fdtfile', but on K2G we only populate 'name_fdt'. The generic boot
and automation scripts fail when 'findfdt' is not populated, fix
this for K2G.
Signed-off-by: Andrew F. Davis <afd@ti.com>
On secure devices the initial secure software may install a firewall at
the end of DRAM, define protected RAM to avoid space.
Signed-off-by: Andrew F. Davis <afd@ti.com>
This patch adds support for authentication of both plain
text and encrypted binaries. A new SECDEV package is needed
to enable encryption of binaries by default for AM3x.
The ROM authentication API detects encrypted images at
runtime and automatically decrypts the image if the
signature verification passes.
Addition of encryption on AM3x results in a change in the
image format. On AM4x, AM5x and, on AM3x devices signing
clear test images, the signature is appended to the end of the
binary.
On AM3x, when the SECDEV package is used to create signed
and encrypted images, the signature is added as a header
to the start of the binary. So the binary size calculation
has been updated to reflect this change.
The signing tools and encrypted image format for AM3x
cannot be changed to behave like AM4x and AM5x to
maintain backward compatibility with older Sitara
M-Shield releases.
Signed-off-by: Madan Srinivas <madans@ti.com>
Signed-off-by: Andrew F. Davis <afd@ti.com>
Add a new defconfig file for the AM335x High Security EVM. This config
is specific for the case of UART booting
Signed-off-by: Andrew F. Davis <afd@ti.com>
With the device tree ported from Linux 4.13, this enables
Driver Model and Device Tree support for the am3517-evm
Signed-off-by: Adam Ford <aford173@gmail.com>
Tested-by: Derald D. Woods <woods.technical@gmail.com>
To keep the DTS and DTSI files clean and in sync with Linux, new
u-boot.dtsi files are added.
There are some spacing issues in the patch, but they appear to be
present in the Linux source files. I'll try to get to fixing them there,
and do a future re-sync at a later date.
Signed-off-by: Adam Ford <aford173@gmail.com>
Tested-by: Derald D. Woods <woods.technical@gmail.com>
Corresponds to 375506d (File writing nit) from upstream
(https://github.com/ulfalizer/Kconfiglib).
Adds proper 'imply' support and fixes a few minor issues, one of which
previously triggered the following weird warning:
configs/taurus_defconfig: /tmp/tmpisI45S:6: warning: assignment to SPL_LDSCRIPT changes mode of containing choice from "arch/$(ARCH)/cpu/u-boot-spl.lds" to "y"
The change in 8639f69 (genconfig.py: Print defconfig next to warnings)
was reapplied.
tools/moveconfig.py previously depended on a hack that merged 'select's
with 'imply's. It was modified to look at the union of
Symbol.get_selected_symbols() and Symbol.get_implied_symbols(), which
should give the same behavior.
tools/genboardscfg.py was verified to produce identical board.cfg's
before and after the change.
Signed-off-by: Ulf Magnusson <ulfalizer@gmail.com>
Checkpatch can use two dictionaries for finding typos:
* scripts/spelling.txt
* /usr/share/codespell/dictionary.txt
which comes with package codespell and is selected by parameter
--codespell
If the file scripts/spelling.txt is missing, a warning is shown.
Add the spelling.txt file from the Linux kernel 4.13 source.
We can later add our own typo corrections.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: Dan Murphy <dmurphy@ti.com>
The current code wraps a pre tag inside an a tag. For some reason, this
causes at least Firefox to attempt to drag the pre section content when
using a mouse drag to select text. Re-order the tags so that the text can
be selected using the mouse, at least if you start the drag outside the
text (after the end of the line, for example).
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Some tests use external tools (executables) during their operation. Add
a test.py mark to indicate this. This allows those tests to be skipped if
the required tool is not present.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
When skipping tests, explicitly mention the board type or config option
that caused the skip. This will help people understand/fix any issues.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
On ARCH_OMAP2PLUS platforms we know what the DDR layout is going to be,
and that it is safe to use SPL_STACK_R and provide a default value for
it. select this and re-sync the defconfigs.
Signed-off-by: Tom Rini <trini@konsulko.com>
With DM now enabled with the device tree pulled from Linux, we can
enable DM_I2C in U-Boot.
Reviewed-by: Jagan Teki <jagan@openedev.com>
Signed-off-by: Adam Ford <aford173@gmail.com>
[trini: Add DM_I2C_COMPAT to da850_am18xxevm to fix warning]
Signed-off-by: Tom Rini <trini@konsulko.com>
This adds tests for clear, set-cursor and color escape sequences.
Signed-off-by: Rob Clark <robdclark@gmail.com>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
I'll need some more of this, let's not just copy-pasta the
vidconsole_put_char() loop.
Named to match vidconsole_put_char() in case that is ever useful
outside of the tests.
Signed-off-by: Rob Clark <robdclark@gmail.com>
Note that this doesn't differentiate (due to lack of information in
video_priv) between different possible component orders for 32bpp.
But the main user at this point is efi_loader, and GOP expects xBGR
so any video drivers that this is incorrect for already have problems.
(Also, conveniently, this matches what simple-framebuffer bindings
expect for kernels that use the simple-framebuffer DT binding to
take over the bootloader display.)
Signed-off-by: Rob Clark <robdclark@gmail.com>
Really just the subset that is needed by efi_console. Perhaps more will
be added later, for example color support would be useful to implement
efi_cout_set_attribute().
Signed-off-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Content can come to screen via putc() and we cannot always rely on
updates ending with a puts(). This is the case with efi_console output
to vidconsole. Fixes corruption with Shell.efi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
Convert the board to support the video driver model, add the device
tree node, and remove the unnecessary code.
Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Convert the board to support the video driver model, add the device
tree node, and remove the unnecessary code.
Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Convert the board to support the video driver model, add the device
tree node, and remove the unnecessary code.
Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Convert the board to support the video driver model, add the device
tree node, and remove the unnecessary code.
Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Convert the board to support the video driver model, add the device
tree node, and remove the unnecessary code.
Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
There is a discrepency between U-Boot and Linux on the partition map.
This enabes the MTD parts to pass MTD partition information from U-Boot to
Linux. Linux already has a pending patch to enable MTD PARTS in
davinci_all_defconfig
Reviewed-by: Jagan Teki <jagan@openedev.com>
Signed-off-by: Adam Ford <aford173@gmail.com>
With the device tree ported and DM compatible drivers, enable:
OF_CONTROL, DM_SPI, DM_SPI_FLASH and DM_SERIAL
Note: DM_SERIAL is not enabled for da850evm_direct_nor_defconfig
yet.
Reviewed-by: Jagan Teki <jagan@openedev.com>
Signed-off-by: Adam Ford <aford173@gmail.com>
The DM support is already in the driver, so add
da830-spi to the compatible list.
Reviewed-by: Jagan Teki <jagan@openedev.com>
Signed-off-by: Adam Ford <aford173@gmail.com>
A few small additional items are needed to support DM_SPI and
DM_SERIAL, so those were added to da850-evm-u-boot.dtsi
Signed-off-by: Adam Ford <aford173@gmail.com>
The MMC framework in U-Boot does not support a systematic API for
timing switch like mmc_set_timing() in Linux.
U-Boot just provides a hook to change the clock frequency via
mmc_set_clock(). It is up to drivers if additional register
settings are needed.
This driver needs to set a correct timing mode into a register when
it migrates to a different speed mode. Only increasing clock frequency
could result in setup/hold timing violation.
The timing mode should be decided by checking MMC_TIMING_* like
drivers/mmc/host/sdhci-cadence.c in Linux, but "timing" is not
supported by U-Boot for now. Just use mmc->clock to decide the
timing mode.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
If there are no CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION,
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR and CONFIG_SPL_OS_BOOT,
there is unused-function build warning. Add __maybe_unused macro
to remove the warning.
Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
This patch adds SD/MMC support for STM32H7 SoCs.
Here is an extraction of SDMMC main features, embedded in
STM32H7 SoCs.
The SD/MMC block include the following:
_ Full compliance with MultiMediaCard System Specification
Version 4.51. Card support for three different databus modes:
1-bit (default), 4-bit and 8-bit.
_ Full compatibility with previous versions of MultiMediaCards
(backward compatibility).
_ Full compliance with SD memory card specifications version 4.1.
(SDR104 SDMMC_CK speed limited to maximum allowed IO speed,
SPI mode and UHS-II mode not supported).
_ Full compliance with SDIO card specification version 4.0.
Card support for two different databus modes: 1-bit (default)
and 4-bit. (SDR104 SDMMC_CK speed limited to maximum allowed IO
speed, SPI mode and UHS-II mode not supported).
_ Data transfer up to 208 Mbyte/s for the 8 bit mode.
(depending maximum allowed IO speed).
_ Data and command output enable signals to control external
bidirectional drivers.
The current version of the SDMMC supports only one SD/SDIO/MMC card
at any one time and a stack of MMC Version 4.51 or previous.
Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
At long last, nuke all this ad-hoc setup in board files in favor of
letting PFC pinmux and GPIO drivers do the same job, but based on DT
description of the hardware rather than this board-file ugliness.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Enable the PFC pinmux and GPIO drivers and disable the SH GPIO combo
driver. This allows the drivers to obtain pinmux and GPIO configuration
from DT rather than hard-coding it in board files.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Add GPIO driver for the Renesas RCar SoCs . The driver currently supports
only the RCar Gen3 R8A7795 and R8A7796 SoCs, but is easily extensible for
the other RCar SoCs as well.
This driver is meant to replace the pinmux part of SH_GPIO_PFC driver.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Add PFC pincontrol driver for the Renesas RCar Gen3 R8A7795 and R8A7796
SoCs. This driver uses the PFC pin tables from Linux, thus letting us
share the occassional fixes to those tables. This driver also has a DT
support, so the pinmux is configured from DT instead of the ad-hoc setup
in board file.
This driver is meant to replace the pinmux part of SH_GPIO_PFC driver.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Regulators are needed for the MMC framework to let it toggle the SD power.
Enable DM regulator support and support for fixed and GPIO regulator.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
The UniPhier SD driver handles the same Matsushita IP as is used
in the Renesas RCar SoCs, yet the driver is significantly better
than the SH SDHI one. Switch over to the Uniphier driver.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
During using dwc2 usb gadget, if usb message size is too small,
following cache misaligned warning is shown:
CACHE: Misaligned operation at range [bfdbcb00, bfdbcb04]
Align size of invalidating dcache before starting DMA to remove the
warning.
Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
The choice of "USB keyboard polling" cannot be optional as without
one mechanism being set, it just doesn't work. Set the default one
to CONFIG_SYS_USB_EVENT_POLL.
Fixes: ecad7051 ("configs: Migrate all of the existing USB symbols, except fastboot")
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
When EHCD and xHCD are enabled at the same time, USB storage device
driver will fail to read/write from/to the storage device attached
to the xHCI interface, due to its transfer blocks exceeds the xHCD
driver limitation.
With driver model, we have an API to get the controller's maximum
transfer size and we can use that to determine the storage driver's
capability of read/write.
Note: the non-DM version driver is still broken with xHCD and the
intent here is not to fix the non-DM one, since the xHCD itself is
already broken in places like 3.0 hub support, etc.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
This adds a new memeber max_xfer_blk in struct us_data to record
the maximum number of transfer blocks for the storage device.
It is set per HCD setting, and so far is to 65535 for EHCD and 20
for everything else.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
EHCD can handle any transfer length as long as there is enough free
heap space left, hence set the theoretical max number SIZE_MAX.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
xHCD allocates one segment which includes 64 TRBs for each endpoint
and the last TRB in this segment is configured as a link TRB to form
a TRB ring. Each TRB can transfer up to 64K bytes, however data
buffers referenced by transfer TRBs shall not span 64KB boundaries.
Hence the maximum number of TRBs we can use in one transfer is 62.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
The HCD may have limitation on the maximum bytes to be transferred
in a USB transfer. USB class driver needs to be aware of this.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
The Linux kernel driver sets the number of event segments and entries
to 1 , while the initial import of the xhci code set that values to 3
for reasons unknown. While most controllers are fine with more event
segments with more entries, there are standard-conformant controllers
(ie. Renesas RCar xHCI) which only support 1 event segment.
Set the number of event segments and event entries back to 1 to allow
such controllers to work with U-Boot xHCI stack. Note that the Renesas
controller correctly indicates ERST Max = 1 in HCSPARAMS2[7:4] .
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
The content of Bank Address Register (BAR) is volatile. It is cleared
after power cycle or reset command (RESET F0h).
Some memories (like e.g. s25fl256s) use it to access memory larger than
0x1000000 (16 MiB).
The problem shows up when one:
1. Reads/writes/erases memory > 16 MiB
2. Calls "reset" u-boot command (which is not causing BAR to be cleared)
In the above scenario, the SoC ROM sends 0x000000 address to read SPL.
Unfortunately, the BA24 bit is still set and hence it receives content
from 0x1000000 (16 MiB) memory address.
As a result the SoC aborts and we hang. Only power cycle can take the
SoC out of this state.
How to reproduce/test:
sf probe; sf erase 0x1200000 0x800000; reset
sf probe; sf erase 0x1200000 0x800000; sf write 0x11000000 0x1200000 0x800000; reset
sf probe; sf read 0x11000000 0x1200000 0x800000; reset
Signed-off-by: Lukasz Majewski <lukma@denx.de>
[Fixed comment text on clean_bar function]
Signed-off-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
The sunxi-specific SPI load routine only knows how to load a legacy
U-Boot image.
Teach it how to handle FIT images as well, simply by providing the
existing SPL FIT loader with the right loader routine to access the SPI
NOR flash.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reported-by: Peter Kosa <kope@madnet.sk>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
memset(newpart, '\0', sizeof(newpart));
only initializes the firest 4 or 8 bytes of *newpart and not the whole
structure disk_part.
We should use sizeof(struct disk_part).
Instead of malloc and memset we can use calloc.
Identified by cppcheck.
Fixes: 09a49930e4 GPT: read partition table from device into a data structure
Reported-by: Coverity (CID: 167228)
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
The status register is optional in the AMD command sets, but it's
presence can be checked by reading out CFI table entry 0xc bit 0.
If the register is present, prefer using it's bit 7 to determine
if the flash is busy over reading the flash ; this is needed ie.
on Hyperflash memories.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Embed the flash base into struct flash_info instead of having ad-hoc
static array in the code. This does not only remove static variable,
but also allows CFI-like controllers, ie. HyperFlash ones, to use most
of the CFI flash code by populating the flash_info with matching base
address.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
The ClearFog Base boot from UART when setting the DIP switches to 01001.
Unfortunately, the SPL code sometimes fails to detect the UART boot
method at run-time. Add an alternative SAR UART boot value to fix this.
Note that this alternative value is not documented (Armada 38x Hardware
Specifications, Table 48). But experimentations showed it on the
ClearFog Base.
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Stefan Roese <sr@denx.de>
dram_ecc_scrubbing() had code to skip unused DRAM banks but it would not
work because mvebu_sdram_bs() returns 0 and the code was subtracting 1
before checking the size. Remove the -1 from the bank size and the +1
from the total which will skip unused banks and still calculate the
correct size. Put the -1 where it is needed for scrubbing via the xor
engine.
Reported-by: Joshua Scott <joshua.scott@alliedtelesis.co.nz>
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
The Armada-38x has 1.8GHz and 2.0GHz variants. Add entries for these
variants to the sar_freq_tab.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Display more information about the current RAM configuration. With these
changes the output on a 88F6820 board is
SoC: MV88F6820-A0 at 1600 MHz
DRAM: 2 GiB (800 MHz, 32-bit, ECC not enabled)
Signed-off-by: Joshua Scott <joshua.scott@alliedtelesis.co.nz>
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
These SoCs are network packet processors (switch chips) with integrated
ARMv7 cores. They share a great deal of commonality with the Armada-XP
CPUs.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
Currently, we support 2 "theadorable" MVEBU build targets. One with a
stripped down configuration (theadorable) and one with a full blown
configuration (theadorable_debug), including PCI, ethernet etc. When
we introduced these configs, the plan was to remove the debug version
at some point. But now it seems better to keep the full-blown version
and remove the "non-debug" version instead.
At a later stage, I will rename the remaining "theadorable_debug"
target into a more fitting one.
Signed-off-by: Stefan Roese <sr@denx.de>
In some of the QSPI controller version, there must be atleast
128bit data available in TX FIFO for any pop operation otherwise
error bit will be set. The code will not make any behavior change
for previous controller as the transfer data size in ipcr register
is still the same.
Patch is tested on LS1046A which do not require 16 bytes aligned and
LS1088A which require 16 bytes aligned data in TX FIFO
Signed-off-by: Suresh Gupta <suresh.gupta@nxp.com>
Signed-off-by: Anupam Kumar <anupam.kumar_1@nxp.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Spansion S25FS256S and S25FL256S flashes have equal JEDEC ID and ext ID.
As far as S25FL256S occures in spi_flash_ids before S25FS256S, U-Boot
incorrectly detects FS flash as FL. Thus its better to compare with
S25FS256S first.
Signed-off-by: Vsevolod Gribov <vgribov@larch-networks.com>
[Added S-o-b]
Signed-off-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
The flash chip is 2 MiB , organized as 32 x 64 kiB sectors .
Rectify the entry to match the datasheet, reality and Linux SNOR IDs.
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Add MT35XU512ABA1G12 parameters to NOR flash parameters array.
The MT35XU512ABA1G12 only supports 1 bit mode and 8 bits. It can't support
dual and quad. Supports subsector erase with 4KB granularity, have support
of FSR(flag status register) and flash size is 64MB.
Signed-off-by: Yogesh Gaur <yogeshnarayan.gaur@nxp.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
It is recommended to check either controller is free to take
new spi action. The IP_ACC and AHB_ACC bits indicates that
the controller is busy in IP or AHB mode respectively.
And the BUSY bit indicates that controller is currently
busy handling a transaction to an external flash device
Signed-off-by: Suresh Gupta <suresh.gupta@nxp.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Add driver model support for mxc spi driver.
Most functions are restructured to be reused by DM and non-DM.
Tested on mx6slevk/mx6qsabresd board.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
In some cases, such as FreeBSD, the path to an alternative dtc needs to
be used. Rather than override the one given in the Makefile on the
command line, make this part of the build configuration.
Signed-off-by: Tom Rini <trini@konsulko.com>
This makes us act like the Linux Kernel does and allow for dtc to be
provided externally but otherwise we use the version of dtc that is
included in the sources. This in turn means that we can drop the
checkdtc logic. We select DTC in the cases where we will need the dtc
tool provided.
Signed-off-by: Tom Rini <trini@konsulko.com>
If the clock framework provides the driver with valid clock,
enable them, otherwise the SCIF might not work if the clock
are not enabled prior to the driver probe.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
The SDxCKCR must be configured correctly, otherwise the SDIF can be
unstable. This is done in board files thus far, but those are going
away, so move the setting of SDxCKCR into the correct place.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
This adds the following commits from upstream:
fe50bd1ecc1d fdtget: Split out cell list display into a new function
62d812308d11 README: Add a note about test_tree1.dts
5bed86aee9e8 pylibfdt: Add support for fdt_subnode_offset()
46f31b65b3b3 pylibfdt: Add support for fdt_node_offset_by_phandle()
a3ae43723687 pylibfdt: Add support for fdt_parent_offset()
a198af80344c pylibfdt: Add support for fdt_get_phandle()
b9eba92ea50f tests: Return a failure code when any tests fail
155faf6cc209 pylibfdt: Use local pylibfdt module
50e5cd07f325 pylibfdt: Add a test for use of uint32_t
ab78860f09f5 pylibfdt: Add stdint include to fix uint32_t
36f511fb1113 tests: Add stacked overlay tests on fdtoverlay
1bb00655d3e5 fdt: Allow stacked overlays phandle references
a33c2247ac8d Introduce fdt_setprop_placeholder() method
0016f8c2aa32 dtc: change default phandles to ePAPR style instead of both
e3b9a9588a35 tests: fdtoverlay unit test
42409146f2db fdtoverlay: A tool that applies overlays
aae22722fc8d manual: Document missing options
13ce6e1c2fc4 dtc: fix sprintf() format string error, again
d990b8013889 Makefile: Fix build on MSYS2 and Cygwin
51f56dedf8ea Clean up shared library compile/link options
21a2bc896e3d Suppress expected error message in fdtdump test
2a42b14d0d03 dtc: check.c fix compile error
a10cb3c818d3 Fix get_node_by_path string equality check
548aea2c436a fdtdump: Discourage use of fdtdump
c2258841a785 fdtdump: Fix over-zealous version check
9067ee4be0e6 Fix a few whitespace and style nits
e56f2b07be38 pylibfdt: Use setup.py to build the swig file
896f1c133265 pylibfdt: Use Makefile constructs to implement NO_PYTHON
90db6d9989ca pylibfdt: Allow setup.py to operate stand-alone
e20d9658cd8f Add Coverity Scan support
b04a2cf08862 pylibfdt: Fix code style in setup.py
1c5170d3a466 pylibfdt: Rename libfdt.swig to libfdt.i
580a9f6c2880 Add a libfdt function to write a property placeholder
ab15256d8d02 pylibfdt: Use the call function to simplify the Makefile
9f2e3a3a1f19 pylibfdt: Use the correct libfdt version in the module
e91c652af215 pylibfdt: Enable installation of Python module
8a892fd85d94 pylibfdt: Allow building to be disabled
741cdff85d3e .travis.yml: Add builds with and without Python library prerequisites
14c4171f4f9a pylibfdt: Use package_dir to set the package directory
89a5062ab231 pylibfdt: Use environment to pass C flags and files
4e0e0d049757 pylibfdt: Allow pkg-config to be supplied in the environment
6afd7d9688f5 Correct typo: s/pylibgfdt/pylibfdt/
756ffc4f52f6 Build pylibfdt as part of the normal build process
8cb3896358e9 Adjust libfdt.h to work with swig
b40aa8359aff Mention pylibfdt in the documentation
12cfb740cc76 Add tests for pylibfdt
50f250701631 Add an initial Python library for libfdt
cdbb2b6c7a3a checks: Warn on node name unit-addresses with '0x' or leading 0s
4c15d5da17cc checks: Add bus checks for simple-bus buses
33c3985226d3 checks: Add bus checks for PCI buses
Signed-off-by: Tom Rini <trini@konsulko.com>
This adds the following commits from upstream:
558cd81bdd43 dtc: Bump version to v1.4.4
c17a811c62eb fdtput: Remove star from value_len documentation
194d5caaefcb fdtget: Use @return to document the return value
d922ecdd017b tests: Make realloc_fdt() really allocate *fdt
921cc17fec29 libfdt: overlay: Check the value of the right variable
9ffdf60bf463 dtc: Simplify asm_emit_string() implementation
881012e44386 libfdt: Change names of sparse helper macros
bad5b28049e5 Fix assorted sparse warnings
672ac09ea04d Clean up gcc attributes
49300f2ade6a dtc: Don't abuse struct fdt_reserve_entry
Signed-off-by: Tom Rini <trini@konsulko.com>
Using the update-dtc-source.sh script from Linux v4.14-rc1 import the
portions of dtc that we require. We bring in update-dtc-source.sh and
scripts/dtc/Makefile from Linux v4.14-rc1. Rework DTC_FLAGS handling to
not require a test.
Signed-off-by: Tom Rini <trini@konsulko.com>
For EFI boot GPT partition table support is needed as well
as the part command and also the SPL needs to fallback to
other boot methods after parse the SPL header.
Signed-off-by: Frank Kunz <mailinglists@kunz-im-inter.net>
CONFIG_NAND_DENALI select's CONFIG_SYS_NAND_SELF_INIT, so the
NAND initialization process is driven by the driver itself.
CONFIG_SYS_NAND_MAX_CHIPS and CONFIG_SYS_NAND_BASE are unused.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
PPA loading during SPL stage is not required for nornal
SD boot scenario.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
PPA loading during SPL stage is not required for nornal
SD boot scenario.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Current u-boot disables IFC support for SD boot on all ls1043a
boards. Actually IFC only conflicts with QSPI on ls1043a hardware.
Only when QSPI is used, IFC should be disabled. Otherwise,
the u-boot with ls1043aqds_sdcard_ifc_defconfig would not work.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
As per current implementation, default value of board env is
based on board filename i.e ls2080ardb.
With distro support changes, this env is used to decide upon
kernel dtb which is different for other SoCs (ls2088a, ls2081a)
combination supported with this board.
Add support to modify board env at runtime based on SoC type
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
For most of ls2080ardb use-cases, mc private DRAM block is required
to be of 1.75GB.
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
[YS: this reservation needs to be reduced if memory is not enough]
Reviewed-by: York Sun <york.sun@nxp.com>
Commit 0aaa1a9 added support for LS208xA devices but fixing
iommu-map property is missing. This patch adds support for
fixing iommu-map.
Signed-off-by: Bharat Bhushan <Bharat.Bhushan@nxp.com>
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
[YS: revised commit message]
Reviewed-by: York Sun <york.sun@nxp.com>
As per updated board design, different QSPI flash
is connected on boards, hence change QSPI flash type
from Micron n25q512a device to spansion s25fs512s
device in dts and config.
Signed-off-by: Santan Kumar <santan.kumar@nxp.com>
Signed-off-by: Yogesh Gaur <yogeshnarayan.gaur@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
CONFIG_DISPLAY_BOARDINFO_LATE config is used to delay
the prints of boardinfo late in cycle during uboot boot.
This feature is not required in case of QSPI_BOOT.
Signed-off-by: Santan Kumar <santan.kumar@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
It is not necessary for every SoC to have 2 SATA controller.
So put SATA1, SATA2 code under respective defines.
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
In the TI SOCs a PBIAS cell exists to provide a bias voltage to the MMC1
IO cells. Without this bias voltage these I/O cells can not function
properly. The PBIAS cell is controlled by software.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
dev_read_string_count() is used to get the number of strings in a
stringlist.
dev_read_string_index() is used to get a string in the stringlist based on
its position in the list.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Add OF match entries and quirks for Renesas RCar Gen3 controllers
into the driver. The IP this driver handles is in fact Matsushita
one and in used both in Socionext and Renesas chips.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Check if the OF match has any associated data and if so, use those
data as the controller quirks, otherwise fallback to the old method
of reading the controller version register to figure out the quirks.
This allows us to supply controller quirks on controllers which ie.
do not have version register.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
The Renesas RCar Gen3 contains the same controller, originally
Matsushita, yet the register addresses are shifted by 1 to the
left. The whole controller is also 64bit, including the data
FIFOs and RSP registers. This patch adds support for handling
the register IO by shifting the register offset by 1 in the IO
accessor functions.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
This patch prepares the driver to support controller(s) with registers
at locations shifted by constant. Pull out the readl()/writel() from
the driver into separate functions, where the adjustment of the register
offset can be easily contained.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
With support for overlays and calling the -@ flag to dtc we need to have
at least 1.4.3 available now.
Cc: Simon Glass <sjg@chromium.org>
Reported-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
common/spl/spl_fit.c:201:12: warning: passing argument 4 of ‘gunzip’
from incompatible pointer type [-Wincompatible-pointer-types]
src, &length))
Signed-off-by: York Sun <york.sun@nxp.com>
Reported-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
CC: Jean-Jacques Hiblot <jjhiblot@ti.com>
This patch provides default implementations of the two functions
set_uart_mux_conf and set_mux_conf_regs. Hence boards not using
them do not need to provide their distinct empty definitions.
Signed-off-by: Felix Brack <fb@ltec.ch>
Reviewed-by: Tom Rini <trini@konsulko.com>
This patch adapts stm32h743 disco and eval dts files to match
with U-boot requirements or add features wich are not yet
upstreamed on kernel side :
_ Add RCC clock driver node and update all clocks phandle
accordingly.
By default, on kernel side, all clocks was temporarly
configured as a phandle to timer_clk waiting for a RCC
clock driver to be available.
On U-boot side, we now have a dedicated RCC clock driver, we
can configured all clocks as phandle to this driver.
All this binding update will be available soon in a kernel tag,
as all the bindings have been acked by Rob Herring [1].
[1] http://lkml.iu.edu/hypermail/linux/kernel/1704.0/00935.html
_ Align STM32H7 serial compatible string with the one which will be
available in next kernel tag. The bindings has been acked by
Rob Herring [2].
This compatible string will be usefull to add stm32h7 specific
feature for this serial driver.
[2] https://lkml.org/lkml/2017/7/17/739
_ Add gpio compatible and aliases for stm32h743
_ Add FMC sdram node with associated new bindings value to
manage second bank (ie bank 1).
_ Add missing HSI and CSI oscillators nodes needed
by STM32H7 RCC clock driver.
Clock sources could be:
_ HSE (High Speed External)
_ HSI (High Speed Internal)
_ CSI (Low Power Internal)
These clocks can be used as clocksource in some configuration.
By default, HSE is selected as clock source.
_ Set HSE to 25Mhz for stm32h743i-disco and eval board
By default, the external oscillator frequency is defined at
25 Mhz in SoC stm32h743.dtsi file.
It has been set at 125 Mhz in kernel DT temporarly waiting for
RCC clock driver becomes available.
As in U-boot we got a RCC clock driver, the real value of HSE
clock can be used.
_ Add "u-boot,dm-pre-reloc" for rcc, fmc, fixed-clock, pinctrl,
pwrcfg and gpio nodes.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This file is imported from linux kernel v4.13
Add device tree support for STM32H743 evaluation board.
This board offers :
_ STM32H743XIH6 microcontroller with 2 Mbytes of
Flash memory and 1 Mbyte of RAM in TFBGA240+25 package
_ 5.7” 640x480 TFT color LCD with touch screen
_ Ethernet compliant with IEEE-802.3-2002
_ USB OTG HS and FS
_ I2 C compatible serial interface
_ RTC with rechargeable backup battery
_ SAI Audio DAC
_ ST-MEMS digital microphones
_ 8-Gbyte (or more) SDIO3.0 interface microSD™ card
_ 8Mx32bit SDRAM, 1Mx16bit SRAM and 8Mx16bit NOR Flash
_ 1-Gbit Twin Quad-SPI NOR Flash
_ Potentiometer
_ 4 colored user LEDs
_ Reset, wakeup, tamper or key buttons
_ Joystick with 4-direction control and selector
_ Board connectors :
Power jack
3 USB with Micro-AB
RS-232 communications
Ethernet RJ45
FD-CAN compliant connection
Stereo headset jack including analog microphone input
2 audio jacks for external speakers
microSD™ card
JTAG/SWD and ETM trace
_ Expansion connectors:
Extension connectors and memory connectors for daughterboard
or wire-wrap board
_ Flexible power-supply options: ST-LINK USB VBUS or external
sources
_ On-board ST-LINK/V2-1 debugger/programmer with USB re-enumeration
capability: mass storage, virtual COM port and debug port
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
All these files are imported from linux kernel v4.13
Add device tree support for STM32H743 SoC and discovery
board. This board offers :
_ STM32H743XIH6 microcontroller with 2 Mbytes of
Flash memory and 1 Mbyte of RAM in TFBGA240+25 package
_ 5.7” 640x480 TFT color LCD with touch screen
_ Ethernet compliant with IEEE-802.3-2002
_ USB OTG HS
_ I2 C compatible serial interface
_ ST-MEMS digital microphones
_ 8-Gbyte (or more) SDIO3.0 interface microSD™ card
_ 8Mx32bit SDRAM
_ 1-Gbit Twin Quad-SPI NOR Flash
_ Reset, wakeup, or key buttons
_ Joystick with 4-direction control and selector
_ Board connectors :
1 USB with Micro-AB
Ethernet RJ45
Stereo headset jack including analog microphone input
microSD™ card
RCA connector
JTAG/SWD and ETM trace
_ Expansion connectors:
Arduino Uno compatible Connectors
2 x PIO connectors (PMOD and PMOD+)
_ On-board ST-LINK/V2-1 debugger/programmer with USB re-enumeration
capability: mass storage, virtual COM port and debug port
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Vikas Manocha <vikas.manocha@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This patch adds the support of reset and clock control
block (rcc) found on STM32 SoCs.
This driver is similar to a MFD linux driver.
This driver supports currently STM32H7 only.
STM32F4 and STM32F7 will be migrated to this rcc MFD driver
in the future to uniformize all STM32 SoCs already upstreamed.
Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Vikas Manocha <vikas.manocha@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This driver is adapted from linux drivers/reset/reset-stm32.c
It's compatible with STM32 F4/F7/H7 SoCs.
This driver doesn't implement .of_match as it's binded
by MFD RCC driver.
To add support for each SoC family, a SoC's specific
include/dt-binfings/mfd/stm32xx-rcc.h file must be added.
This patch only includes stm32h7-rcc.h dedicated for STM32H7 SoCs.
Other SoCs support will be added in the future.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This driver implements basic clock setup, only clock gating
is implemented.
This driver doesn't implement .of_match as it's binded
by MFD RCC driver.
Files include/dt-bindings/clock/stm32h7-clks.h and
doc/device-tree-bindings/clock/st,stm32h7-rcc.txt
will be available soon in a kernel tag, as all the
bindings have been acked by Rob Herring [1].
[1] http://lkml.iu.edu/hypermail/linux/kernel/1704.0/00935.html
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
STM32F7 and STM32H7 shares the same UART block, add
STM32H7 compatible string.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Since we may jump to next stage like ATF/OP-TEE instead of U-Boot,
we need to stash the bootstage info before it.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add usb_gadget_handle_interrupts(), board_usb_init(),
board_usb_cleanup() and g_dnl_board_usb_cable_connected()
callbacks needed for FASTBOOT support
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Update ehci and ohci node's compatible string in order to
use ehci-generic and ohci-generic drivers.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
On STi 96boards, configure by default the micro USB connector
(managed by DWC3 hardware block) in peripheral mode.
This will allow to use fastboot feature.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This patch adds the ST glue logic to manage the DWC3 HC
on STiH407 SoC family. It configures the internal glue
logic and syscfg registers.
Part of this code been extracted from kernel.org driver
(drivers/usb/dwc3/dwc3-st.c)
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Enable USB Host Networking support by enabling Ethernet/USB
adaptors support and by enabling some BOOTP flags
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This is the generic phy driver for the picoPHY ports
used by USB2/1.1 controllers. It is found on STiH407 SoC
family from STMicroelectronics.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Use struct udevice* as input parameter. Previous
parameters are retrieved through plat and priv data.
This to prepare to use the reset framework.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
'default n' is the default anyway so it doesn't need to be specified
explicitly, and the rest of the file doesn't specify it either anywhere.
Drop it.
Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This field has never been used as the driver has been DM-based since the
beginning. Drop it.
Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
These take the 'struct udevice *' as an argument, not the
'struct xilinx_pcie *` which is a local variable. Fix the comments to
match the code.
Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
We have limited stack in SPL builds. Drop itrblock and move to
malloc/free of itr to move this off of the stack. As part of this fix a
double-free issue in fat_size().
Signed-off-by: Tom Rini <trini@konsulko.com>
---
Rework to use malloc/free as moving this to a global overflows some SH
targets.
efi_exit() already restores gd, so we shouldn't EFI_EXIT() on the
otherside of the longjmp().
Signed-off-by: Rob Clark <robdclark@gmail.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
ad503ffe9c6 efi_loader: refactor boot device and loaded_image handling
leads to an error when building with CONFIG_CMD_BOOTEFI_SELFTEST=y
This patch fixes the problem.
Fixes: ad503ffe9c6 efi_loader: refactor boot device and loaded_image handling
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Rob Clark <robdclark@gmail.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
Add Serial Download Protocol support (SDP), which allows loading
SPL and u-boot.img via imx_usb_loader tool as explained in
doc/README.sdp.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Instead of having every board file to add its own g_dnl_bind_fixup()
implementation, move it to the common imx6 SPL code.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Łukasz Majewski <lukma@denx.de>
Define i2c mux configuration. Add new vpd_reader which is used to read
vital product data. Read VPD from EEPROM and set eth0 MAC address.
Signed-off-by: Ian Ray <ian.ray@ge.com>
Signed-off-by: Jose Alarcon <jose.alarcon@ge.com>
1) use fputs() to reduce cache flushes from once-per-char to
once-per-string
2) handle \r, \t, and \b in addition to just \n for tracking
cursor position
3) cursor row/col are zero based, not one based
Signed-off-by: Rob Clark <robdclark@gmail.com>
[agraf: s/unsigned/unsigned int/]
Signed-off-by: Alexander Graf <agraf@suse.de>
If stdout is vidconsole, we cannot rely on ANSI escape sequences to
query the size, as vidconsole cannot reply on stdin. Instead special-
case this if stdout is vidconsole.
Signed-off-by: Rob Clark <robdclark@gmail.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
We need to do something different for vidconsole, since it cannot
respond to the query on stdin. Prep work for next patch.
Signed-off-by: Rob Clark <robdclark@gmail.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
These should be set according to the image type. Shell.efi and SCT.efi
use these fields to determine what sort of image they are loading.
Signed-off-by: Rob Clark <robdclark@gmail.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
Similar to a "real" UEFI implementation, the bootmgr looks at the
BootOrder and BootXXXX variables to try to find an EFI payload to load
and boot. This is added as a sub-command of bootefi.
The idea is that the distro bootcmd would first try loading a payload
via the bootmgr, and then if that fails (ie. first boot or corrupted
EFI variables) it would fallback to loading bootaa64.efi. (Which
would then load fallback.efi which would look for \EFI\*\boot.csv and
populate BootOrder and BootXXXX based on what it found.)
Signed-off-by: Rob Clark <robdclark@gmail.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
Add EFI variable support, mapping to u-boot environment variables.
Variables are pretty important for setting up boot order, among other
things. If the board supports saveenv, then it will be called in
ExitBootServices() to persist variables set by the efi payload. (For
example, fallback.efi configuring BootOrder and BootXXXX load-option
variables.)
Variables are *not* currently exposed at runtime, post ExitBootServices.
On boards without a dedicated device for storage, which the loaded OS
is not trying to also use, this is rather tricky. One idea, at least
for boards that can persist RAM across reboot, is to keep a "journal"
of modified variables in RAM, and then turn halt into a reboot into
u-boot, plus store variables, plus halt. Whatever the solution, it
likely involves some per-board support.
Mapping between EFI variables and u-boot variables:
efi_$guid_$varname = {attributes}(type)value
For example:
efi_8be4df61-93ca-11d2-aa0d-00e098032b8c_OsIndicationsSupported=
"{ro,boot,run}(blob)0000000000000000"
efi_8be4df61-93ca-11d2-aa0d-00e098032b8c_BootOrder=
"(blob)00010000"
The attributes are a comma separated list of these possible
attributes:
+ ro - read-only
+ boot - boot-services access
+ run - runtime access
NOTE: with current implementation, no variables are available after
ExitBootServices, and all are persisted (if possible).
If not specified, the attributes default to "{boot}".
The required type is one of:
+ utf8 - raw utf8 string
+ blob - arbitrary length hex string
Signed-off-by: Rob Clark <robdclark@gmail.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
This avoids printf() spam about file reads (such as loading an image)
into unaligned buffers (and the associated memcpy()). And generally
seems like a good idea.
Signed-off-by: Rob Clark <robdclark@gmail.com>
[agraf: use __aligned]
Signed-off-by: Alexander Graf <agraf@suse.de>
Previously we only supported the case when the EFI application loaded
the image into memory for us. But fallback.efi does not do this.
Signed-off-by: Rob Clark <robdclark@gmail.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
fallback.efi (and probably other things) use UEFI's simple-file-system
protocol and file support to search for OS's to boot.
Signed-off-by: Rob Clark <robdclark@gmail.com>
[agraf: whitespace fixes, unsigned fixes]
Signed-off-by: Alexander Graf <agraf@suse.de>
Get rid of the hacky fake boot-device and duplicate device-path
constructing (which needs to match what efi_disk and efi_net do).
Instead convert over to use efi_device_path helpers to construct
device-paths, and use that to look up the actual boot device.
Also, extract out a helper to plug things in properly to the
loaded_image. In a following patch we'll want to re-use this in
efi_load_image() to handle the case of loading an image from a
file_path.
Signed-off-by: Rob Clark <robdclark@gmail.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
Also, create disk objects for the disk itself, in addition to the
partitions. (UEFI terminology is a bit confusing, a "disk" object is
really a partition.) This helps grub properly identify the boot device
since it is trying to match up partition "disk" object with it's parent
device.
Now instead of seeing devices like:
/File(sdhci@07864000.blk)/EndEntire
/File(usb_mass_storage.lun0)/EndEntire
You see:
/ACPI(133741d0,0)/UnknownMessaging(1d)/EndEntire
/ACPI(133741d0,0)/UnknownMessaging(1d)/HD(0,800,64000,dd904a8c00000000,1,1)/EndEntire
/ACPI(133741d0,0)/UnknownMessaging(1d)/HD(1,64800,200000,dd904a8c00000000,1,1)/EndEntire
/ACPI(133741d0,0)/UnknownMessaging(1d)/HD(2,264800,19a000,dd904a8c00000000,1,1)/EndEntire
/ACPI(133741d0,0)/USB(0,0)/USB(0,0)/USB(0,0)/EndEntire
/ACPI(133741d0,0)/USB(0,0)/USB(0,0)/USB(0,0)/HD(0,800,60000,38ca680200000000,1,1)/EndEntire
/ACPI(133741d0,0)/USB(0,0)/USB(0,0)/USB(0,0)/HD(1,61000,155000,38ca680200000000,1,1)/EndEntire
/ACPI(133741d0,0)/USB(0,0)/USB(0,0)/USB(0,0)/HD(2,20fa800,1bbf8800,38ca680200000000,1,1)/EndEntire
/ACPI(133741d0,0)/USB(0,0)/USB(0,0)/USB(0,0)/HD(3,1b6800,1f44000,38ca680200000000,1,1)/EndEntire
This is on a board with single USB disk and single sd-card. The
UnknownMessaging(1d) node in the device-path is the MMC device,
but grub_efi_print_device_path() hasn't been updated yet for some
of the newer device-path sub-types.
This patch is inspired by a patch originally from Peter Jones, but
re-worked to use efi_device_path, so it doesn't much resemble the
original.
Signed-off-by: Rob Clark <robdclark@gmail.com>
[agraf: s/unsigned/unsigned int/]
Signed-off-by: Alexander Graf <agraf@suse.de>
It needs to handle more device-path node types, and also multiple levels
of path hierarchy. To simplify this, initially construct utf8 string to
a temporary buffer, and then allocate the real utf16 buffer that is
returned. This should be mostly for debugging or at least not critical-
path so an extra copy won't hurt, and is saner than the alternative.
Signed-off-by: Rob Clark <robdclark@gmail.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
This is really the same thing as the efi_device_path struct.
Signed-off-by: Rob Clark <robdclark@gmail.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
Helpers to construct device-paths from devices, partitions, files, and
for parsing and manipulating device-paths.
For non-legacy devices, this will use u-boot's device-model to construct
device-paths which include bus hierarchy to construct device-paths. For
legacy devices we still fake it, but slightly more convincingly.
Signed-off-by: Rob Clark <robdclark@gmail.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
All of the device-path related structures should be packed. UEFI
defines the device-path as a byte-aligned data structure.
Signed-off-by: Rob Clark <robdclark@gmail.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
EFI client programs need the signature information from the partition
table to determine the disk a partition is on, so we need to fill that
in here.
Signed-off-by: Peter Jones <pjones@redhat.com>
[separated from efi_loader part, and fixed build-errors for non-
CONFIG_EFI_PARTITION case]
Signed-off-by: Rob Clark <robdclark@gmail.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
Check that the notification function of an
EVT_SIGNAL_EXIT_BOOT_SERVICES event is called
exactly once.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
All events of type EVT_SIGNAL_EXIT_BOOT_SERVICES have to be
notified when ExitBootServices is invoked.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Run a 10 ms periodic timer and check that it is called 10 times
while waiting for 100 ms single shot timer.
Raise the TPL level to the level of the 10 ms timer and observe
that the notification function is not called again.
Lower the TPL level and check that the queued notification
function is called.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
This unit test uses timer events to check the implementation
of the following boottime services:
CreateEvent, CloseEvent, WaitForEvent, CheckEvent, SetTimer
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
We should be able to call efi_set_timer repeatedly.
So let us reset the signaled state here.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
For the correct implementation of the task priority level (TPL)
calling the notification function must be queued.
Add a status field 'queued' to events.
In function efi_signal_event set status queued if a notification
function exists and reset it after we have called the function.
A later patch will add a check of the TPL here.
In efi_create_event and efi_close_event unset the queued status.
In function efi_wait_for_event and efi_check_event
queue the notification function.
In efi_timer_check call the efi_notify_event
if the status queued is set.
For all timer events set status signaled.
In efi_console_timer_notify set the signaled state of the
WaitForKey event.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
A Python test script is provided that runs the EFI selftest
if CONFIG_CMD_EFI_SELFTEST=y.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
A testing framework for the EFI API is provided.
It can be executed with the 'bootefi selftest' command.
It is coded in a way that at a later stage we may turn it
into a standalone EFI application. The current build system
does not allow this yet.
All tests use a driver model and are run in three phases:
setup, execute, teardown.
A test may be setup and executed at boottime,
it may be setup at boottime and executed at runtime,
or it may be setup and executed at runtime.
After executing all tests the system is reset.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Macro EFI_CALL was introduced to call an UEFI function.
Unfortunately it does not support return values.
Most UEFI functions have a return value.
So let's rename EFI_CALL to EFI_CALL_VOID and introduce a
new EFI_CALL macro that supports return values.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Fix typo in teh EFI_BOOT_SERVICES_CODE description.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
We should use the predefined constants EFI_PAGE_SHIFT
and EFI_PAGE_MASK where applicable.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
The UEFI spec allows an EFI system partition (ESP, with the bootloader or
kernel EFI apps on it) to reside on a disk using a "legacy" MBR
partitioning scheme.
But in contrast to actual legacy disks the ESP is not marked as
"bootable" using bit 7 in byte 0 of the legacy partition entry, but is
instead using partition *type* 0xef (in contrast to 0x0b or 0x0c for a
normal FAT partition). The EFI spec isn't 100% clear on this, but it even
seems to discourage the use of the bootable flag for ESPs.
Also it seems that some EFI implementations (EDK2?) even seem to ignore
partitions marked as bootable (probably since they believe they contain
legacy boot code).
The Debian installer [1] (*not* mini.iso), for instance, contains such an
MBR, where none of the two partitions are marked bootable, but the ESP
has clearly type 0xef.
Now U-Boot cannot find the ESP on such a disk (USB flash drive) and
fails to load the EFI grub and thus the installer.
Since it all boils down to the distro bootcmds eventually calling
"part list -bootable" to find potential boot partitions, it seems logical
to just add this "partition type is 0xef" condition to the is_bootable()
implementation.
This allows the bog standard arm64 Debian-testing installer to boot from
an USB pen drive on Allwinner A64 boards (Pine64, BananaPi-M64).
(Ubuntu and other distribution installers don't have a legacy MBR, so
U-Boot falls back to El Torito there).
[1] https://cdimage.debian.org/cdimage/daily-builds/daily/arch-latest/arm64/iso-cd/
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Variable always should only be appended but not overwritten by
lib/efi_loader/Makefile.
Remove variable efiprogs which is not otherwise used.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Replace all occurences of helloworld by generalized forms.
This allows us to build additional EFI applications that are
included into the U-Boot binary without loading
scripts/Makefile.lib with specific filenames.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
In scripts/Makefile.lib we build section including helloworld.efi.
This allows to load the EFI binary with command 'bootefi hello'.
scripts/Makefile.lib contains explicit references to strings
containing helloworld and hello_world. This makes it impossible
to generalize the coding to accomodate additional built in
EFI binaries.
Let us rename the variables __efi_hello_world_* to
__efi_helloworld_*.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
The target
$(obj)/helloworld.so:
exists twice in Makefile.lib.
If you add an echo command to each of the two recipes you get
warnings like:
scripts/Makefile.lib:383: warning:
overriding recipe for target 'drivers/power/battery/helloworld.so'
scripts/Makefile.lib:379: warning:
ignoring old recipe for target 'drivers/power/battery/helloworld.so'
This patch removes the obsolete target.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Commit f494950b (efi_loader: call __efi_exit_check in efi_exit) added a call
to __efi_exit_check inside efi_exit to account for the fact that we're exiting
the efi_exit function via a longjmp call.
However, __efi_exit_check also swizzles gd to the application gd while the
longjmp will put us back into EFI context, so we need the efi (u-boot) gd.
This patch fixes that up by explicitly setting gd back to efi_gd before
doing the longjmp. It also adds a few comments on why it does that.
Signed-off-by: Alexander Graf <agraf@suse.de>
To understand what is happening in OpenProtocol or LocateProtocol
it is necessary to know the protocol interface GUID.
Let's write a debug message.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
The calls to __efi_entry_check and __efi_exit_check have to match.
If DEBUG is defined, panic() will be called otherwise.
If debugging is activated some Travis CI builds fail due to an
assertion in EFI_CALL without the patch.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Rob Clark <robdclark@gmail.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
There is no need to use attribute EFIAPI for
efi_disk_rw_blocks. It is not an API function.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Command 'bootefi hello' currently uses CONFIG_SYS_LOAD_ADDR
as loading address.
qemu machines have by default 128 MiB RAM.
CONFIG_SYS_LOAD_ADDR for x86 is 0x20000000 (512 MiB).
This causes 'bootefi hello' to fail.
We should use the environment variable loadaddr if available.
It defaults to 0x1000000 (16 MiB) on qemu_x86.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Increase serialno_str to 17 bytes so it can hold the 16 bytes long serial
nummer and the terminating null byte added by snprintf.
Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com>
The RK3368 TPL stage always returns to the BootROM, so it has no need
for the eMMC, SD and SPI nodes. This marks those nodes (that should
be included in SPL, but not TPL) as 'u-boot,dm-spl'.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
With the new 32/64bit-aware dtoc, the type of reg is fdt64_t and the
OF_PLATDATA structure layout changes. This adjusts the DMC driver for
the RK3368 to track these changes.
For the time being (i.e. until regmap_init_mem_platdata works for the
64bit case), we won't use regmap_init_mem_platdata here and simply
access of_plat.reg[] directly.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
With dtoc emitting fdt64_t for addresses (and region sizes), the array
indices for accessing the reg[] array needs to be adjusted. This
adjusts the Rockchip DM timer driver to correctly handle OF_PLATDATA
given this new structure layout.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
With the critical drivers ready for switching to a live tree, we can
now enable it in the defconfig for the RK3399-Q7.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
With the dev_read_addr_ptr function available, we can change the
efuse driver to use it (and eliminate the explicit type-cast).
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
On the RK3399-Q7, we need to turn on the on-module USB hub before using the
USB host interfaces (only the OTG interface is directly connected to the edge
connector). This drops the deprecated 'rockchip,vbus-gpio' property and uses
a fixed regulator to turn on the USB hub.
References: 26a8b80 "usb: host: xhci-rockchip: use fixed regulator to control vbus"
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The generic ehci-driver (ehci-generic.c) will try to enable the clocks
listed in the DTSI. If this fails (e.g. due to clk_enable not being
implemented in a driver and -ENOSYS being returned by the clk-uclass),
the driver will bail our and print an error message.
This implements a minimal clk_enable for the RK3399 and supports the
clocks mandatory for the EHCI controllers; as these are enabled by
default we simply return success.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
On the RK3399, we will have either OF_PLATDATA or full OF_CONTROL
enabled: this allows the use of syscon to retrieve the addresses of
GRF and SGRF (except for the early debug UART setup, which runs so
early that the device-model is not initialised).
This removes the hard-coded addresses and goes through syscon to
retrieve the base-addresses of GRF and SGRF. After that, we use
the structure definitions to locate the respective registers.
In addition to this, the inclusion of header files is also cleaned up:
- all headers are included at the beginning (there was a spurious
inclusion of the grf header from within a function)
- all #include statements for unused headers are removed
- the remaining #include statements are sorted (while keeping common.h
included in front)
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
To support bootstage recording, we want to mark our DM timer as the
tick-timer; this triggers the support for 'trying harder' to read the
timer in the Rockchip DM timer driver, even if the device model isn't
ready yet.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Remove a comment claiming that this driver only supports the RK3288,
as we also use it on the RK3368, RK3399 and (most likely) on other
variants.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Version-changes: 2
- use the dev_read_addr_ptr function in rk_gpio.c
To make the Rockchip DM timer driver useful for the timing of
bootstages, we need a few enhancements:
- This implements timer_get_boot_us.
- This avoids reinitialising the timer, if it has already been
set up (e.g. by our TPL and SPL stages). Now, we have a single
timebase ticking from TPL through the full U-Boot.
- This adds support for reading the timer even before the
device-model is ready: we find the timer via /chosen/tick-timer,
then read its address and clock-frequency, and finally read the
timeval directly).
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
The dev_read_addr_ptr() mimics the behaviour of the devfdt_get_addr_ptr(),
retrieving the first address of the node's reg-property and returning
it as a pointer (or NULL on failure).
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
When used with bootstage recording, dm_timer_init may be called
surprisingly early: i.e. before dm_root is ready. To deal with
this case, we explicitly check for this condition and return
-EAGAIN to the caller (refer to drivers/timer/rockchip_timer.c
for a case where this is needed/used).
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
This updates dm_timer_init to support a live tree and deals with
some fallout (i.e. the need to restructure the code such, that we
don't need multiple discontinuous #if CONFIG_IS_ENABLED blocks).
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
For timing our bootstages on the RK3368, which has a minimal TPL
(and where we consequently don't want to time the bootstages) and a
full-featured SPL (where we can bootstage recording), we need to
adjust the Makefile.
Use the $(SPL_TPL_) macro in the Makefile for bootstage.o
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
The NXP 4.1 kernel needs to boot with secure boot.
Add information on how to enable secure boot mode.
Signed-off-by: Vanessa Maegima <vanessa.maegima@nxp.com>
Update these macros to use all upper-case to avoid checkpatch
warnings:
ENET_25MHz,
ENET_50MHz,
ENET_125MHz,
Signed-off-by: Eric Nelson <eric@nelint.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
The current mechanism using SCR/GPR registers work well when
the serial downloader boot mode has been selected explicitly
(either via boot mode pins or using bmode command). However,
in case the system entered boot ROM due to unbootable primary
boot devices (e.g. empty eMMC), the SPL fails to detect that
it has been downloaded through serial loader and tries to
continue booting from eMMC:
Trying to boot from MMC1
mmc_load_image_raw_sector: mmc block read error
SPL: failed to boot from all boot devices
### ERROR ### Please RESET the board ###
The only known way to reliably detect USB serial downloader
is by checking the USB PHY receiver block power state...
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Tested-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Eric Nelson <eric@nelint.com>
Starting from PXs3, the bit fields of RSTCTRL, CLKCTRL registers
will change every SoC. There is no more point to define bitfields
in the common header file.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
The main difference between Pro4 and PXs2/LD6b is the Denali NAND
IP version. This is now distinguished by DT. Merge the two defconfig
files into uniphier_v7_defconfig.
Update the README.uniphier too.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
The Denali IP does not update the revision register properly.
Allow to override it with SoC data associated with compatible.
Linux had already finished big surgery of this driver, but I need
to prepare the NAND core before the full sync of the driver.
For now, I am fixing the most fatal problem on UniPhier platform.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
legacy_hole_base_k and legacy_hole_size_k are defined but
not used.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Enable this option for link so that the timer is available earlier.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
With SPL we often have limited memory and do not need very many bootstage
records. Add a separate Kconfig option for SPL.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
The CONFIG_BOOTSTAGE_USER_COUNT option is no-longer needed since we can now
support any number of user IDs. Also BOOTSTAGE_ID_COUNT is not needed now.
Drop these unused options.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
With bootstage we need access to the timer before driver model is set up.
To handle this, put the required state in global_data and provide a new
function to set up the device, separate from the driver's probe() method.
This will be used by the 'early' timer also.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Once U-Boot relocates itself the existing driver-model timer (if any) is
no-longer valid until the device is reinitialised. Any use of the device
may cause a crash. To handle this, set the timer to NULL after relocation.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This adds support to Intel Cherry Hill board, a board based on
Intel Braswell SoC. The following devices are validated:
- serial port as the serial console
- on-board Realtek 8169 ethernet controller
- SATA AHCI controller
- EMMC/SDHC controller
- USB 3.0 xHCI controller
- PCIe x1 slot with a graphics card
- ICH SPI controller with an 8MB Macronix SPI flash
- Integrated graphics device as the video console
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
FSP's built-in UPD configuration enables PUNIT power configuration,
but on B0 stepping, this causes CPU hangs in fsp_init(). Disable it.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This adds microcode device tree fragment for Braswell B0 (406C2),
C0 (406C3) and D0 (406C4) stepping SoC.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This adds initial Intel Braswell SoC support. It uses Intel FSP
to initialize the chipset.
Similar to its predecessor BayTrail, there are some work to do to
enable the legacy UART integrated in the Braswell SoC.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
FSP spec 1.1 adds 3 new APIs and their offsets are in the header.
Update the 'fsp hdr' command to show these new entries.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
When a VBT is given to an FSP that supports graphics initialization,
the FSP will produce a graphics info HOB that contains all necessary
information for the linear frame buffer of the integrated graphics
device. This adds a DM video driver for it.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Now that binman is able to recognize the Video BIOS Table entry,
add such one in the u-boot.dtsi.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This adds Kconfig options for Video BIOS Table which is normally
required if you are using an Intel FSP firmware that is complaint
with spec 1.1 or later to initialize the integrated graphics device.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This adds a new HOB type for graphics information introduced in FSP
spec 1.1. When graphics capability is included in FSP and enabled,
FSP produces an FSP_GRAPHICS_INFO_HOB as described in the EFI PI
specification which provides information about the graphics mode and
framebuffer.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
FSP spec 1.1 adds one more member to the struct common_buf to
determine the memory size that can be reserved by FSP below "top
of low usable memory" for bootloader usage. This new member uses
the reserved space so that it is still compatible with previous
FSP spec 1.0.
A new HOB (FSP_HOB_RESOURCE_OWNER_BOOTLOADER_TOLUM_GUID) is also
published when common_buf.tolum_size is valid and non zero.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Per the Intel 64 and IA-32 Architecture Software Developer's Manual,
add the reference clock for Intel Atom Processors based on the Airmont
Microarchitecture (Braswell).
This keeps in sync with Linux kernel commit:
6fcb41c: x86/tsc_msr: Add Airmont reference clock values
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Make various changes to the GPT test:
1) Reference the disk image using an absolute path in all cases. This
allows test/py to operate correctly if it's run from a directory other
than the root of the U-Boot source tree.
2) Store the disk image in the teswt/py persistent data directory. This
removes the need to re-generate it every time the tests are run.
3) Execute sgdisk using u_boot_utils.run_and_log() so that its output is
captured in the test log. This allows debugging any problems running it.
4) Make the disk image a test fixture. This removes the requirement to
always run all GPT tests, and run them in order. The current code doesn't
create the disk image if e.g. just test_gpt_uuid() is executed via the
test.py -k command-line option.
5) Use @pytest.mark.buildconfigspec for all feature dependencies, rather
than manually implementing some of them.
6) Make all tests depend on sandbox, since they use the sandbox-specific
host command.
Fixes: a2f422555f ("add pytests for 'gpt guid' command in sandbox")
Fixes: c5772188ed ("add pytests for 'gpt rename' and 'gpt swap'")
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Tom Rini <trini@konsulko.com>
Nothing CONFIG_SOC_DA830 anymore, so let's remove it and
the one remaining source file for it. It appears to have been
abandoned a while ago.
Signed-off-by: Adam Ford <aford173@gmail.com>
commit b63b995 (arm: dts: Add u-boot specific compatibles) separated out
u-boot specific compatibles from dts files.
The u-boot specifics were moved in *-u-boot.dtsi files for all dra7
platforms except dra7-evm.
Without it the SD card is broken on DRA7-evm because the regulator cannot
be enabled.
Fix it by adding the missing dra7-evm-u-boot.dtsi with the needed
properties.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
When the OP-TEE image is built for secure paging the load address may be
in SRAM, remove checks that prevent this.
Signed-off-by: Harinarayan Bhatta <harinarayan@ti.com>
Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
A new fatbuf was allocated by get_fs_info() (called by fat_itr_root()),
but not freed, resulting in eventually running out of memory. Spotted
by running 'ls -r' in a large FAT filesystem from Shell.efi.
fatbuf is mainly used to cache FAT entry lookups (get_fatent())..
possibly once fat_write.c it can move into the iterator to simplify
this.
Signed-off-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Łukasz Majewski <lukma@denx.de>
Use the clust_to_sect() helper that was introduced earlier, and add an
inverse sect_to_clust(), plus update the various spots that open-coded
this conversion previously.
Signed-off-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Noticed when comparing our output to linux. There are some lcase bits
which control whether filename and/or extension should be downcase'd.
Signed-off-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Łukasz Majewski <lukma@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add a generic implementation of 'ls' using opendir/readdir/closedir, and
replace fat's custom implementation. Other filesystems should move to
the generic implementation after they add opendir/readdir/closedir
support.
Signed-off-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Łukasz Majewski <lukma@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Implement the readdir interface using the directory iterators.
Signed-off-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Łukasz Majewski <lukma@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Needed to support efi file protocol. The fallback.efi loader wants
to be able to read the contents of the /EFI directory to find an OS
to boot.
Modelled after POSIX opendir()/readdir()/closedir(). Unlike the other
fs APIs, this is stateful (ie. state is held in the FS_DIR "directory
stream"), to avoid re-traversing of the directory structure at each
step. The directory stream must be released with closedir() when it
is no longer needed.
Signed-off-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Łukasz Majewski <lukma@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Untangle directory traversal into a simple iterator, to replace the
existing multi-purpose do_fat_read_at() + get_dentfromdir().
Signed-off-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Łukasz Majewski <lukma@denx.de>
Want to re-use this in fat dirent iterator in next patch.
Signed-off-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Łukasz Majewski <lukma@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
While there are valid reasons to use __packed, often the answer is that
you should be doing something else here instead.
This reintroduces the changes of
f503cc49a5 (Add warning for new __packed additions)
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
There is already a macro LBAFU to aid formatted print with lbaint_t
variables. Let's use it in the common block command codes.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
All these places seem to inherit the codes from the MMC driver where
a FIXME was put in the comment. However the correct operation after
read should be cache invalidate, not flush.
The underlying drivers should be responsible for the cache operation.
Remove these codes completely.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: York Sun <york.sun@nxp.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: York Sun <york.sun@nxp.com>
fdt_getprop_u32 is not exported and it's different than what the
unit test uses. Rename u32 prop access methods to something that's
unit test specific.
Signed-off-by: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
Acked-by: Simon Glass <sjg@chromium.org>
Pull some information regarding overlays from commit messages and
put them directly within the documentation. Also add some information
regarding required dtc version to properly use overlays.
Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
Acked-by: Simon Glass <sjg@chromium.org>
We have the capability to apply overlays on the command line but
we didn't have a document explaining how.
Signed-off-by: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
Reviewed-by: Łukasz Majewski
Acked-by: Simon Glass <sjg@chromium.org>
Introduce an overlay based method for constructing a base DT blob
to pass to the kernel.
It is based on a specific method now to get the FDT from a FIT image
named boot_get_fdt_fit().
Signed-off-by: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
Acked-by: Simon Glass <sjg@chromium.org>
fit_image_load() threw away the extra configuration parts when
loading. We need them around for applying extra overlays for
building the boot fdt.
Signed-off-by: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
Acked-by: Simon Glass <sjg@chromium.org>
As part of the fdt overlay support which need it, allow
a list of configurations per property.
Signed-off-by: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
Acked-by: Simon Glass <sjg@chromium.org>
The verbose overlay application method prints out more helpful
messages, so switch to it.
Signed-off-by: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
Acked-by: Simon Glass <sjg@chromium.org>
Introduce fdt_overlay_apply_verbose, a method that applies an
overlay but in the case of an error produces a helpful message.
In addition if a base tree is found to be missing the __symbols__
node the message will point out that the probable reason is that
the base tree was miscompiled without the -@ option.
Signed-off-by: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
Acked-by: Simon Glass <sjg@chromium.org>
Report Coverity log:
The code uses a variable that has not
been initialized, leading to unpredictable
or unintended results.
Reported-by: Coverity (CID: 60519)
Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Add a header that indicates that the files generated by dtoc should not be
modified.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Kever Yang <kever.yang@rock-chips.com>
The filename of the auto-generated file is the same as the file that
includes it. Even though the form is in the generated/ subdirectory, this
could be confused.
Rename the generated file to something that makes it clear it is
auto-generated.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Kever Yang <kever.yang@rock-chips.com>
At present dtoc has a very simplistic view of phandles. It assumes that
a property has only a single phandle with a single argument (i.e. two
cells per property).
This is not true in many cases. Enhance the implementation to scan all
phandles in a property and to use the correct number of arguments (which
can be 0, 1, 2 or more) when generating the C code. For the struct
definitions, use a struct which can hold the maximum number of arguments
used by the property.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Kever Yang <kever.yang@rock-chips.com>
We want to support more than one phandle argument. It makes sense to use
an array for this rather than discrete struct members. Adjust the code to
support this. Rename the member to 'arg' instead of 'id'.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Kever Yang <kever.yang@rock-chips.com>
When writing values from properties which contain phandles, dtoc currently
writes 8 phandles per line. Change this to write one phandle per line.
This helps reduce line length, since phandles are generally longer and may
have arguments.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Kever Yang <kever.yang@rock-chips.com>
Rather than naming the phandle struct according to the number of cells it
uses (e.g. struct phandle_2_cell) name it according to the number of
arguments it has (e.g. struct phandle_1_arg). This is a more intuitive
naming.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Kever Yang <kever.yang@rock-chips.com>
Update this function to return more detail about a property that contains
phandles. This will allow (in a future commit) more accurate handling of
these properties.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Kever Yang <kever.yang@rock-chips.com>
This function will need to have access to class members once we enhance it
to support multiple phandle values. In preparation for that, move it into
the class.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Kever Yang <kever.yang@rock-chips.com>
Now that the Fdt class can map phandles to the associated nodes, use that
instead of a separate implementation.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Kever Yang <kever.yang@rock-chips.com>
Add a map from phandles to nodes. This can be used by clients of the the
class instead of maintaining this themselves.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Kever Yang <kever.yang@rock-chips.com>
When using 32-bit addresses dtoc works correctly. For 64-bit addresses it
does not since it ignores the #address-cells and #size-cells properties.
Update the tool to use fdt64_t as the element type for reg properties when
either the address or size is larger than one cell. Use the correct value
so that C code can obtain the information from the device tree easily.
Alos create a new type, fdt_val_t, which is defined to either fdt32_t or
fdt64_t depending on the word size of the machine. This type corresponds
to fdt_addr_t and fdt_size_t. Unfortunately we cannot just use those types
since they are defined to phys_addr_t and phys_size_t which use
'unsigned long' in the 32-bit case, rather than 'unsigned int'.
Add tests for the four combinations of address and size values (32/32,
64/64, 32/64, 64/32). Also update existing uses for rk3399 and rk3368
which now need to use the new fdt_val_t type.
Signed-off-by: Simon Glass <sjg@chromium.org>
Suggested-by: Heiko Stuebner <heiko@sntech.de>
Reported-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Kever Yang <kever.yang@rock-chips.com>
Large arrays can result in lines with hundreds or thousands of characters
which is not very editor-friendly. To avoid this, addjust the tool to
group values 8 per line.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Kever Yang <kever.yang@rock-chips.com>
In a0f3e3df4a we switched to using the Ubuntu-provided dtc as travis
was having a problem with the number of warnings that were generated by
the newer dtc. This is no longer a concern as we now have the same
logic as Linux to enable/disable additional more stringent warnings. Go
back to building dtc from source.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested on travis-ci:
Tested-by: Simon Glass <sjg@chromium.org>
Checkpatch produces the following warning:
Unescaped left brace in regex is deprecated here
(and will be fatal in Perl 5.30), passed through in regex;
marked by <-- HERE in m/^(\+.*(?:do|\))){ <-- HERE /
at scripts/checkpatch.pl line 3348.
The curent checkpatch of the Linux kernel corrects this
bug and many others.
It provides improved colored output.
So replace checkpatch by the current Linux version.
Add an empty file scripts/const_structs.checkpatch.
We can later fill it according to our needs.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
The strto functions should honor the specified base (if non-zero) rather
than permitting a hex or octal string when the user wanted (for example)
base 10.
This has been fixed somewhere along the way in the upstream linux kernel
src tree, at some point after these was copied in to u-boot. And also
in a way that duplicates less code. So port _parse_integer_fixup_radix()
to u-boot.
Signed-off-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add unit tests for the 'gpt rename' and 'gpt swap' commands that
rely on the block device created by test/py/make_test_disk.py.
Add CONFIG_CMD_GPT_RENAME to the sandbox_defconfig. Remove the
testdisk.raw test device at the end of the tests.
Signed-off-by: Alison Chaiken <alison@peloton-tech.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Run unit tests for the 'gpt guid' command, making use of the block
device created by test/py/make_test_disk.py. Remove this device at
the end of the tests.
Signed-off-by: Alison Chaiken <alison@peloton-tech.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Provide a Python function that creates a small block device for the
purpose of testing the cmd/gpt.c or cmd/part.c functions in the u-boot
sandbox.
Signed-off-by: Alison Chaiken <alison@peloton-tech.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Commit 6ae4c3efbd ("ARM: DRA7: Add pinctrl register definitions")
has added new macros for pinmux configuration in line with the kernel
definitions. Cleanup the old pinctrl macros from the common header
file so that they are not used by any new boards.
Signed-off-by: Suman Anna <s-anna@ti.com>
Commit 6ae4c3efbd ("ARM: DRA7: Add pinctrl register definitions")
has added new macros for pinmux configuration in line with the
kernel definitions. Fixup the current pinctrl data for the CompuLab
CL-SOM-AM57x board to use these new macros to facilitate the removal
of the old macros.
NOTE:
The PEN and PDIS macro values used previously were actually defined
inversely, a value of 1 in bit position 16 actually means that the
internal pullup/pulldown is disabled and not enabled as inferred by
PEN. So, previous pinmux config data such as (PDIS | PTU) is confusing
as it actually was meant for enabling internal pullup. The data is
fixed up only to be equivalent to the previous data.
Signed-off-by: Suman Anna <s-anna@ti.com>
To remove the assignment of CONFIG_SYS_EXTRA_OPTIONS option,
which is deprecated, use the CONFIG_XXXX_BOOT options to
indicate the boot media, and the SoC is selected by the board.
Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
Use the CONFIG_XXXX_BOOT to indicate the boot media, instead of
the CONFIG_SYS_USE_XXXX option, which is declared by
CONFIG_SYS_EXTRA_OPTIONS option.
Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
As said in READRE.kconfig, include/configs/*.h will be removed
after all options are switched to Kconfig. As the first step,
remove the follow line from include/configs/*.h.
#include <asm/hardware.h>
Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
To prepare to remove the SoCs options such as SAMA5D2, SAMA5D3
and SAMA5D4 from the CONFIG_SYS_EXTRA_OPTIONS option which is
deprecated, add the SoC options to Kconfig.
Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
The SAMA5D27-SiP (System in Package) integrates the SAMA5D2
with 1Gbit DDR2-SDRAM in a single package.
The SAMA5D27 SOM1 embeds a 64Mbit QSPI flash, KSZ8081 Phy and
Mac-address EEPROM.
Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The SAMA5D2 SiP(System in Package) has different Chip IDs in the
CHIPID and CHIP_EXID registers.
Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Because before switching to a lower clock source, we must switch
the clock source first instead of last. So before configuring the
PMC_MCKR register, invoke at91_mck_init_down() first.
As said in datasheet, the the size of SPL must not exceed the maximum
size allowed(64Kbytes).
Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Refer to the commit 70f8c8316ad(PMC: add new mck function to lower
rate while switching) from AT91Bootstrap.
While switching to a lower clock source, we must switch the clock
source first instead of last. Otherwise, we could end up with
too high frequency on internal bus and peripherals.
This happens on SAMA5D2 as exitting from the ROM code.
Add a function pmc_mck_init_down() to allow this sequence.
Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
As said in 29.5.7 section of SAMA5D2 datasheet, before switching to
the crystal oscillator, a check must be carried out to ensure that
the oscillator is present and that its freqency is valid.
Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add a function to display the company's logo and board information
via the API from DM_VIDEO. This function can be shared by other
atmel boards, so locate it in board/atmel/common folder.
Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
In order to display the company's logo via the API of DM_VIDEO,
and add the logo files of both Atmel and Microchip.
Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
For sama5d2, add the sfr node with syscon support.
In order to access the SFR_UTMICKTRIM register for the utmi clock
driver, add the phandle property for the utmi node to point to the
sfr node.
Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
By default, it is assumed that the UTMI clock is generated from
a 12 MHz reference clock (MAINCK). If it's not the case, the FREQ
field of the SFR_UTMICKTRIM has to be updated to generate the UTMI
clock in the proper way.
The UTMI clock has a fixed rate of 480 MHz. In fact, there is no
multiplier we can configure. The multiplier is managed internally,
depending on the reference clock frequency, to achieve the target
of 480 MHz.
The patch is cloned from the patch of mailing-list:
[PATCH v2] clk: at91: utmi: set the mainck rate
Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
[trini: Depend on SPL_DM]
Signed-off-by: Tom Rini <trini@konsulko.com>
This section of the settings file may be missing. Handle that gracefully
rather than emitting an error.
Also update patman to write this section when a new settings file is
created.
Fixes: e11aa602 (patman: add support for omitting bouncing addresses)
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Chris Packham <judge.pckham@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
The e-mail addresses for DA8XXEVM BOARD and DA850_AM18XXEVM BOARD
are invalid.
Remove DA8XXEVM.
Update DA850_AM18XXEVM to have me be the maintainer since I work
for Logic PD and have access to OMAP-L138 and AM1808 EVM kits.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
This converts the following to Kconfig:
CONFIG_EMIF4
CONFIG_SDRC
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefano Babic <sbabic@denx.de>
There was a check for CONFIG_MAC_ADDR_IN_EEPROM and
a check for CONFIG_MAC_ADDR_IN_SPIFLASH, however
some of the EEPROM related code wasn't encapsulated
inside the #if defined statement so the EEPROM code
could get executed even when it wasn't explicitly
enabled or wanted.
Signed-off-by: Adam Ford <aford173@gmail.com>
In mancy cases both CONFIG_ENV_OFFSET and CONFIG_ENV_ADDR point
to an otherwise-unused SMNAND_ENV_OFFSET.
This patch will set both CONFIG_ENV_OFFSET and CONFIG_ENV_ADDR to
whatever value was defined by SMNAND_ENV_OFFSET.
Signed-off-by: Adam Ford <aford173@gmail.com>
The DTS files had some spacing issues and they needed fixing. This
pull re-sync's the OMAP3xx related DTS files with Linux 4.13-RC5.
To keep the DTS and DTSI files clean and in sync with Linux, new
u-boot.dtsi files are added.
Signed-off-by: Adam Ford <aford173@gmail.com>
V3: The resync broke card detect on MMC1 on Logic PD's Torpedo,
so we add the cd-invert to the Torpedo's -u-boot.dtsi file.
V2: Add the u-boot.dtsi files for OMAP3, OMAP36xx, and Torpedo
Remove the need for the second patch in the series
Either the USB and Fastboot were never finished, or somehow it got
lost. This puts enough hooks back into omap3logic to enable
fastboot and hopefully prepare it for Kconfig conversion.
Signed-off-by: Adam Ford <aford173@gmail.com>
Fix the building warning as below:
---8<----
Warning (reg_format): "reg" property in /i2c-gpio-0/pcf8563@50 has invalid length (4 bytes) (#address-cells == 2, #size-cells == 1)
Warning (avoid_default_addr_size): Relying on default #address-cells value for /i2c-gpio-0/pcf8563@50
Warning (avoid_default_addr_size): Relying on default #size-cells value for /i2c-gpio-0/pcf8563@50
--->8----
Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Some device the serial console's initialization cannot run early during
the boot process. Hence, nulldev serial device is helpful on that
situation.
For example, if the serial module was implemented in FPGA. Serial
initialization is prohibited to run until the FPGA was programmed.
This commit is to adding nulldev serial driver. This will allows the
default console to be specified as a nulldev.
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Keng Soon Cheah <keng.soon.cheah@ni.com>
Cc: Chen Yee Chew <chen.yee.chew@ni.com>
With debug enabled, SPL output following these debug prints is on the
same line and it is hard to read. Fix it.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This commit adds support for GPIO reset lines matching the
common linux "reset-gpios" devicetree binding.
Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
DRA71x processors are reduced pin and software compatible
derivative of DRA72 processors. Add support for detection
of SR2.1 version of DRA71x family of processors.
Signed-off-by: Vishal Mahaveer <vishalm@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Like the OMAP-L138 LCDK before it, let's move the da850-evm and
the variations to TI_COMMON_CMD_OPTIONS to cut back one some of the
defconfig entries.
Signed-off-by: Adam Ford <aford173@gmail.com>
Some drivers in Linux (ex. drivers/mtd/nand/denali.c) use
ioread*/iowrite* accessors. Import them to make drivers more
synced. I copied code from include/asm-generic/io.h of Linux.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Enable TI_COMMON_CMD_OPTIONS and remove similar options
from the defconfig. Updated with savedefconfig.
Signed-off-by: Adam Ford <aford173@gmail.com>
Tested-by: Derald D. Woods <woods.technical@gmail.com>
Much of the AM3517 functions are copies of the standard definitions
used in ti_omap3_common.h. Moving to include a common file
reduces the amount of duplicative code and clutter. A few
AM3517 specific functions (like EMIF4) are explictly defined
and a few items are undefined or redefined, but overall the number
of lines of code shink.
Signed-off-by: Adam Ford <aford173@gmail.com>
Tested-by: Derald D. Woods <woods.technical@gmail.com>
Add the new compatible "atmel,24mac402" to accommodate AT24MAC402.
The AT24MAC402 is a 2K Serial EEPROM and the 2-Kbit memory array
is internally organized as 16 pages of 16 bytes of EEPROM each.
The 48-bit EUI address in the AT24MAC402 are located in the extended
memory block.
Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
Add the new compatible "microchip,24aa02e48" to accommodate 24AA02E48,
the 24AA02E48 is a 2K I2C Serial EEPROM with pre-programmed globally
unique, 48-bit node address, and 8-byte page size.
Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
The PMMC firmware should be bundled with the FIT image for HS devices,
remove the steps that load and install this firmware outside of FIT.
Signed-off-by: Andrew F. Davis <afd@ti.com>
The PMMC firmware should be bundled into a FIT image on HS
devices to allow authentication/decryption, add a handler to
process this PMMC firmware.
Signed-off-by: Andrew F. Davis <afd@ti.com>
This works (roughly) the same way as linux's, but we currently always
print lower-case (ie. we just keep %pUB and %pUL for compat with linux),
mostly just because that is what uuid_bin_to_str() supports.
%pUb: 01020304-0506-0708-090a-0b0c0d0e0f10
%pUl: 04030201-0605-0807-090a-0b0c0d0e0f10
It will be used by a later efi_loader paths for efi variables and for
device-path-to-text protocol, and also quite useful for debug prints
of protocol GUIDs.
Signed-off-by: Rob Clark <robdclark@gmail.com>
Tested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
This is convenient for efi_loader which deals a lot with UTF-16. Only
enabled with CC_SHORT_WCHAR, leaving room to add a UTF-32 version when
CC_SHORT_WCHAR is not enabled.
Signed-off-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
EFI_LOADER really wants UTF-16 strings (ie. %ls and L"string" are 16bit
chars instead of 32bit chars). But rather than enabling -fshort-wchar
conditionally if EFI_LOADER is enabled, it was deemed preferrable to
globally switch.
Signed-off-by: Rob Clark <robdclark@gmail.com>
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com>
The R8A7796 XHCI USB nodes are missing from r8a7796 dtsi, add them.
These nodes don't come from mainline Linux, yet the DT binding is
similar enough to R8A7795 which already has those in mainline and
once the nodes hit mainline, this DT should be resynched.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
In order to use ehci-generic driver, move the configuration of HSUSB
block into the board file. This configuration should not have been in
the Gen3 EHCI USB driver in the first place, so move it to the board
file until there is a proper infrastructure and driver for the HSUSB
block.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
In order to use ehci-generic driver, move the configuration of HSUSB
block into the board file. This configuration should not have been in
the Gen3 EHCI USB driver in the first place, so move it to the board
file until there is a proper infrastructure and driver for the HSUSB
block.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
The R8A7796 EHCI USB nodes are missing from r8a7796 dtsi, add them.
These nodes don't come from mainline Linux, yet the DT binding is
similar enough to R8A7795 which already has those in mainline and
once the nodes hit mainline, this DT should be resynched.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Import the RCar Gen3 DTS and headers from upstream Linux kernel v4.13,
commit 569dbb88e80deb68974ef6fdd6a13edb9d686261 . This includes both M3
and H3 ULCB and Salvator-X boards.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
The use-case is that the thing that loaded u-boot already put a splash
image on screen. And we want to preserve that until grub boot menu
takes over.
Signed-off-by: Rob Clark <robdclark@gmail.com>
Not really qcom specific, but for now qcom/lk is the one firmware that
is (afaiu) setting up the appropriate dt node for pre-configured
display. Uses the generic simple-framebuffer DT bindings so this should
be useful on other platforms.
Signed-off-by: Rob Clark <robdclark@gmail.com>
The STM32 LTDC display controller provides a parallel digital RGB and
signals for horizontal, vertical synchronization, Pixel Clock and Data
Enable as output to interface directly to a variety of LCD and TFT panels.
The LTDC main features are:
- 24-bit RGB Parallel Pixel Output, Programmable timings & polarity for
HSync, VSync and Data Enable.
- 2 layers with Blending, Color Keying, Window position & size,
Dithering, Background color, Color Look-Up Table (CLUT).
- Supported layer color formats: ARGB8888, RGB888, RGB565, ARGB1555,
ARGB4444, L8 CLUT, AL44 & AL88
This LTDC driver:
- supports: RGB parallel output with timings & polarity, 1 layer
in RGB565.
- supports but with hard-coded configurations: blending, window
position & size (crop), background color.
- does not support yet: rgb888, argb8888, 8-bit clut, dithering.
This LTDC driver is compatible with all stm32 platforms with the
LTDC IP and has been tested on stm32 f746-disco board.
Signed-off-by: Philippe CORNU <philippe.cornu@st.com>
Add a driver for GPIO backlights.
It understands the standard device tree binding.
It can be used with simple-panel when PWM is not necessary.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Add a config to select individually the driver for PWM backlights.
Manage "depends on" to be backyard compatible.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
After a successful read of a UBI volume, the variable filesize is set
to the number of read bytes. To boot linux with a raw initramfs/initrd,
you must specify the exact size of the initramfs/initrd image in boot
command. If the initramfs/inird is read from UBI volume, $filesize is
required to access the number of read bytes.
Example:
ubi read ${loadaddr} kernelvol
ubi read ${fdtaddr} dtbvol
ubi read ${initrd_addr} initrdvol
bootz ${loadaddr} ${initrd_addr}:${filesize} ${fdt_addr}
Signed-off-by: Holger Dengler <dengler@linutronix.de>
Reviewed-by: Heiko Schocher <hs@denx.de>
This allows to scan the DT including all "clocks" node's sub-nodes
in which fixed-clock are defined.
All fixed-clock should be defined inside a clocks node which collect all
external oscillators. Until now, all clocks sub-nodes can't be binded except
if the "simple-bus" compatible string is added which is a hack.
Update test.dts by moving clk_fixed node inside clocks.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Currently, all fixed-clock declared in "clocks" node in device tree
can be binded by clk_fixed_rate.c driver only if each of them have
the "simple-bus" compatible string.
This constraint has been invoked here [1].
This patch offers a solution to avoid adding "simple-bus" compatible
string to nodes that are not busses.
[1] https://patchwork.ozlabs.org/patch/558837/
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Adjust this code so that it can work with Python 2 and 3.
Fixes: d73fcb1 (moveconfig: Support building a simple config database)
Reported-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a convenience macro to iterate over subnodes of a node. Make use of
this where appropriate in the code.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present we sometimes see warnings of the form:
/tmp/tmpMA89kB:36: warning: overriding the value of CMD_SPL.
Old value: "y", new value: "y".
This is not very useful as it does not show whch defconfig file it relates
to. Update the tool to show this.
Signed-off-by: Simon Glass <sjg@chromium.org>
We can use printf() to limit the string width. Adjust the code to do this
instead of using strlcpy() which is a bit clumbsy.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Convert SANDBOX_BITS_PER_LONG to Kconfig and assign it a correct
number depending on which host we are going to build and run.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
It seems most of the time we are building and running sandbox on 64-bit host.
But we do support 32-bit host as well. Introduce Kconfig option for this.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
There is an overflow problem when taking the size instead of the number
of blocks in blk_create_device(). This results in a wrong device size: the
device apparent size is its real size modulo 4GB.
Using the number of blocks instead of the device size fixes the problem and
is more coherent with the internals of the block layer.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This option is an SPL-variant of the I2C_EEPROM option to enable
the driver for generic I2C-attached EEPROMs for SPL.
Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add the code to set the ethernet mac address from eeprom by using
the common code from the common folder.
Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Replace the code to set the ethernet mac address with the code from
the common folder.
Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Create board/$(VENDOR)/common folder to accommodate the common code
shared by other atmel boards, now put the code to set ethernet mac
address from eeprom, which uses the i2c eeprom driver.
Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add support for selecting proper dtb for
am57xx BeagleBoard X15 revC u-boot from FIT
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
AM571x supports DDR running at 666MHz. Right now it is
clocked at 532MHz which is lower than what is supported.
In order to have maximum performance on AM571-IDK,
switch DDR to 666MHz.
Signed-off-by: Steve Kipisz <s-kipisz2@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Add support for selecting proper dtb for
dra76x u-boot from FIT.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Separate out u-boot specific compatibles from dts files.
This will help in syncing dts files in future.
Also these will get deleted eventually once respective drivers
are capable of handling Linux dts files.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
dra76-evm has the ddr parts connectedi running at 666MHz:
EMIF1: MT41K512M16HA-125 AIT:A x 2
EMIF2: MT41K512M8RH-125-AAT:E x 4
Add support for configuring the above DDR parts.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
dra76-evm uses lp8736 and tps65917 pmic for powering on
various peripherals. Add data for these pmics and register
for dra76-evm.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
The dra76-evm is a board based on TI's DRA76 processor
Add eeprom support
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
dra76 family is a high-performance, infotainment application
device, based on OMAP architecture on a 28-nm technology.
This contains most of the subsystems, peripherals that are
available on dra74, dra72 family. This SoC mainly features
Subsystems:
- 2 x Cortex-A15 with max speed of 1.8GHz
- 2 X DSP
- 2 X Cortex-M4 IPU
- ISS
- CAL
- DSS
- VPE
- VIP
Connectivity peripherals:
- 1 USB3.0 and 3 USB2.0 subsystems
- 1 x SATA
- 2 x PCI Express Gen2
- 3-port Gigabit ethernet switch
- 2 x CAN
- MCAN
Adding CPU detection support for the dra76 ES1.0 soc
and update prcm, control module, dplls data.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Praneeth Bajjuri <praneeth@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
LP87565 is present on dra76-evm. Select it for
TARGET_DRA7XX_EVM.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
It is not necessary that ldo1 is used to power on mmc.
So, add support for passing ldo registers for powering on mmc.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
It is not necessary all omap5+ based uses the same PMIC
to poweron mmc. So add support for enabling mmc based on board.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
CCN-504 HPF registers were believed to be accessible only from EL3.
However, recent tests proved otherwise. Remove checking for exception
level to re-enable L3 cache flushing for all levels.
Signed-off-by: York Sun <york.sun@nxp.com>
Tested-by: Zhao Qiang <qiang.zhao@nxp.com>
The pcie config space of ls1088a is different from ls2080a.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
In case high region memory doesn't have enough space for Management
Complex (MC), the return value should indicate a failure so the
caller can handle it accordingly.
Signed-off-by: York Sun <york.sun@nxp.com>
Reported-by: Ebony Zhu <ebony.zhu@nxp.com>
Rx Compliance tests may fail intermittently at high
jitter frequencies using default register values
Program register USB_PHY_RX_OVRD_IN_HI in certain sequence
to make the Rx compliance test pass.
Signed-off-by: Sriram Dash <sriram.dash@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Signed-off-by: Suresh Gupta <suresh.bhagat@nxp.com>
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
[YS: Reordered Kconfig options]
Reviewed-by: York Sun <york.sun@nxp.com>
Low Frequency Periodic Singaling (LFPS) Peak-to-Peak Differential
Output Voltage Test Compliance fails using default transmitter settings
Change config of transmitter signal swings by setting register
PCSTXSWINGFULL to 0x47 to pass compliance tests.
Signed-off-by: Sriram Dash <sriram.dash@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Signed-off-by: Suresh Gupta <suresh.gupta@nxp.com>
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
[YS: Reordered Kconfig options]
Reviewed-by: York Sun <york.sun@nxp.com>
The default setting for USB High Speed Squelch Threshold results
in a threshold close to or lower than 100mV. This leads to Receive
Compliance test failure for a 100mV threshold.
Shift the threshold from ~100mV towards ~130mV by setting SQRXTUNE
to 0x0 to pass USB High Speed Receiver Sensitivity Compliance test.
Signed-off-by: Sriram Dash <sriram.dash@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Signed-off-by: Suresh Gupta <suresh.gupta@nxp.com>
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
[YS: Reordered Kconfig options]
Reviewed-by: York Sun <york.sun@nxp.com>
USB High Speed (HS) EYE Height Adjustment
USB HS speed eye diagram fails with the default value at
many corners, particularly at a high temperature
Optimal eye at TXREFTUNE value to 0x9 is observed, change
set the same value.
Signed-off-by: Sriram Dash <sriram.dash@nxp.com>
Signed-off-by: Suresh Gupta <suresh.gupta@nxp.com>
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
[YS: Reordered Kconfig options]
Reviewed-by: York Sun <york.sun@nxp.com>
Rx Compliance tests may fail intermittently at high
jitter frequencies using default register values.
Program register USB_PHY_RX_OVRD_IN_HI in certain sequence
to make the Rx compliance test pass.
Signed-off-by: Sriram Dash <sriram.dash@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Signed-off-by: Suresh Gupta <suresh.bhagat@nxp.com>
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
[YS: Reordered Kconfig options]
Reviewed-by: York Sun <york.sun@nxp.com>
Low Frequency Periodic Signaling(LFPS) Peak-to-Peak Differential
Output Voltage Test Compliance fails using default transmitter
settings
Change config of transmitter signal swings by setting register
PCSTXSWINGFULL to 0x47 to pass compliance tests.
Signed-off-by: Sriram Dash <sriram.dash@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Signed-off-by: Suresh Gupta <suresh.gupta@nxp.com>
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
[YS: Reordered Kconfig options]
Reviewed-by: York Sun <york.sun@nxp.com>
The default setting for USB High Speed Squelch Threshold results
in a threshold close to or lower than 100mV. This leads to Receiver
Compliance test failure for a 100mV threshold.
Shift the threshold from ~100mV towards ~130mV by setting SQRXTUNE
to 0x0 to pass USB High Speed Receiver Sensitivity Compliance test.
Signed-off-by: Sriram Dash <sriram.dash@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Signed-off-by: Suresh Gupta <suresh.gupta@nxp.com>
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
[YS: Reordered Kconfig options]
Reviewed-by: York Sun <york.sun@nxp.com>
USB High Speed (HS) EYE Height Adjustment
USB HS speed eye diagram fails with the default value at
many corners, particularly at a high temperature
Optimal eye at TXREFTUNE value to 0x9 is observed, change
set the same value.
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
[YS: Reordered Kconfig options]
Reviewed-by: York Sun <york.sun@nxp.com>
This patch adds support for RGMII protocol
NXP's LDPAA2 support RGMII protocol. LS1088A is the
first Soc supporting both RGMII and SGMII.
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Signed-off-by: Amrita Kumari <amrita.kumari@nxp.com>
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
This patch add support of LS1088AQDS platform.
The LS1088A QorIQTM Development System (QDS) is a high-performance
computing, evaluation, and development platform that supports the
LS1088A QorIQ Architecture processor.
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com>
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
LS1088A is an ARMv8 implementation. The LS1088ARDB is an evaluatoin
platform that supports the LS1088A family SoCs. This patch add basic
support of the platform.
Signed-off-by: Alison Wang <alison.wang@nxp.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: Raghav Dogra <raghav.dogra@nxp.com>
Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com>
[YS: Disabled NAND in board header file]
Reviewed-by: York Sun <york.sun@nxp.com>
WIP: disable NAND for LS1088ARDB
For QSPI and IFC addresses execution shouldn't be allowed
when u-boot running from DDR. Revise the MMU final table
to enforce execute-never bits.
Signed-off-by: Suresh Gupta <suresh.gupta@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
According current code base, CONFIG_LS1012A should be
CONFIG_ARCH_LS1012A, or function fsl_fdt_disable(blob) will be
wrongly called to disable all dwc3 USB nodes on LS1012A, which
cause Linux USB function stop working at all.
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Update MC address calculation as per MC design requirement of address
as least significant 512MB address of MC private allocated memory,
i.e. address should point to end address masked with 512MB offset in
private DRAM block.
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Ashish Kumar <ashish.kumar@nxp.com>
[YS: reformatted commit message]
Reviewed-by: York Sun <york.sun@nxp.com>
LS2080 family has CCN-504 cache coherent interconnet. Other SoCs
in LSCH3 family may have differnt interconnect.
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
[YS: revised commit message]
Reviewed-by: York Sun <york.sun@nxp.com>
If CONFIG_SPL_OS_BOOT is enabled, boot OS if kernel image is found
in FIT structure.
Signed-off-by: York Sun <york.sun@nxp.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
SPL supports U-Boot image in FIT format which has data outside of
FIT structure. This adds support for embedded data for normal FIT
images.
Signed-off-by: York Sun <york.sun@nxp.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add Kconfig option SPL_GZIP and SPL_ZLIB to enable gunzip support for
SPL boot, eg. falcon boot compressed kernel image.
Signed-off-by: York Sun <york.sun@nxp.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Adds header address for PPA to be validated during ESBC phase for
ARCH_LS2088 and QSPI_BOOT. Moves sec_init prior to ppa_init(). It
must be initialized before the PPA.
Signed-off-by: Udit Agarwal <udit.agarwal@nxp.com>
[YS: revised commit message]
Reviewed-by: York Sun <york.sun@nxp.com>
Unify memory map for Layerscape based platforms. This patch includes
changes in bootscript, bootscript header and PPA header addresses
change as per unified memory map.
Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Tested-by: Vinitha Pillai <vinitha.pillai@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
QE_IRAM_READY should be set only after successfully uploading the
firmware.
Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
CoreLink Cache Coherent Interconnect (CCI) provides full cache
coherency between two clusters of multi-core CPUs and I/O coherency
for devices and I/O masters.
This patch add new config option SYS_FSL_HAS_CCI400 and moves
existing register space definaton of CCI-400 bus to fsl_immap to be
shared. CONFIG_SYS_CCI400_ADDR is replaced with SYS_CCI400_OFFSET
in Kconfig.
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
[YS: revised commit message, squashed patches for armv8 and armv7]
Reviewed-by: York Sun <york.sun@nxp.com>
MX6Q/QP IPU operates at 264MHz and MX6DL IPU at 198MHz.
When running a SPL target, which supports multiple MX6 variants we cannot
properly setup the IPU clock frequency via CONFIG_IPUV3_CLK option as
such decision is done in build-time currently.
Remove the CONFIG_IPUV3_CLK option and let the IPU clock frequency be
configured in run-time on mx6.
Reported-by: Eric Nelson <eric@nelint.com>
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Eric Nelson <eric@nelint.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
[agust: fixed #endif in cgtqmx6eval.h]
Signed-off-by: Anatolij Gustschin <agust@denx.de>
At present the IDE device number is initialized to -1, which means
we cannot type "ide read" command before setting the device number
via "ide device #".
For convenience, let's set the first device as the default one.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
When there is no CDROM inserted, the block size is zero hence there
is no need to create a BLK device for it.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This converts the IDE driver to driver model so that block read and
write are fully functional.
Fixes: b7c6baef ("x86: Convert MMC to driver model")
Reported-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
So far these are using magic numbers. Replace them with macros.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The underlying implementation for ENV_AES has security complications and
is not recommended for use. Please see CVE-2017-3225 and CVE-2017-3226
for more details. Mark this as deprecated now and delete this in the
medium term if no one comes forward to re-work the support.
Signed-off-by: Tom Rini <trini@konsulko.com>
A number of the config options for USB networking have been migrated to
Kconfig. Update README.usb to reflect this.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
This migrates ASIX, ASIX88179, MCS7830, RTL8152 and SMSC95XX to Kconfig.
Update defconfigs.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
CONFIG_USB_HOST_ETHER is the framework that the drivers are dependent on
USB_HOST_ETHER. Use this as a menu and move the existing LAN75XX and
LAN78XX options under new menu. Finally update the defconfigs that need
CONFIG_USB_HOST_ETHER.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Disable CONFIG_ARCH_FIXUP_FDT_MEMORY to prevent U-Boot from modifying
the memory {} nodes in the DT passed to the Linux kernel. The R8A779x
DT contains multiple memory {} nodes, while U-Boot only modifies the
first one and stuffs all the memory entries into it, which is wrong.
Disabling CONFIG_ARCH_FIXUP_FDT_MEMORY is the least intrusive way to
fix the issue this close to the release, while the real fix is to
extend the fdt_fixup_memory_banks() to handle multiple memory nodes
in DT.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
On RCar M3 and on RCar H3 newer than and not including ES1.0, the SD clock
must be divided by 4 rather than 2 because a hardware workaround present
only in the H3 ES1.0 has been removed from these chips. U-Boot currently
only supports M3 and H3 ES 2.0 and newer, so configure the SD pre-divider
to 4 to prevent SD instability.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
In the general case, CONFIG_NFS_READ_SIZE is unchanged from the default
of 1024. There are in fact no in-tree users that increase this size.
Adjust the comment to reflect what could be done in the future in
conjunction with CONFIG_IP_DEFRAG.
Cc: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
The old logic always enabled the TX-delay when the phy-mode was set to
PHY_INTERFACE_MODE_RGMII. With this patch we enable the TX delay for
PHY_INTERFACE_MODE_RGMII_ID and PHY_INTERFACE_MODE_RGMII_TXID and
disable it for PHY_INTERFACE_MODE_RGMII.
Based on a similar change made in the Linux Realtek PHY driver
by Martin Blumenstingl <martin.blumenstingl@googlemail.com>.
Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Acked-by: York Sun <york.sun@nxp.com>
The inline documentation of vsprintf mentions a parameter size
which does not exist in the function declaration.
int vsprintf(char *buf, const char *fmt, va_list args);
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
This reverts commit 25877d4e4c.
This is a workaround for Raspberry Pi boot failures seen when passing on
the device tree provided by the Raspberry Pi firmware at boot. Without
CONFIG_OF_EMBED, we just get stuck at "Starting kernel ..." when we try
to boot Linux with this device tree.
Signed-off-by: Paul Barker <pbarker@toganlabs.com>
Cc: Simon Glass <sjg@chromium.org>
Tested-by: Jonathan Gray <jsg@jsg.id.au>
Reviewed-by: Simon Glass <sjg@chromium.org>
Some files are generated during libfdt build. Ignore them.
This was wrongly put in the .gitignore in the root directory before.
Now let's remove entries there and put them in the right place.
Fixes: 34e2c285 ("gitignore: add intermediates from libfdt build")
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
This was broken by the recent environment refactoring. Specifically:
$ make environ
scripts/Makefile.build:59: tools/environ/Makefile: No such file or directory
make[1]: *** No rule to make target 'tools/environ/Makefile'. Stop.
make: *** [Makefile:1469: environ] Error 2
Fix this by updating the Makefile and adjusting the #include filesnames in
two C files.
Fixes: ec74f5f (Makefile: Rename 'env' target to 'environ')
Reported-by: Måns Rullgård <mans@mansr.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Since commit 842778a091 ("usb: gadget: g_dnl: only set iSerialNumber
if we have a serial#") "fastboot devices" stopped to show correct device
serial number for TI boards, showing this line instead:
???????????? fastboot
This is because serial# env variable could be set after g_dnl gadget was
initialized (e.g. by using env_set() in the board file).
To fix this, let's update internal serial number variable (g_dnl_serial)
when "serial#" env var is changed.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Cc: Felipe Balbi <felipe.balbi@linux.intel.com>
Tested-by: Heiko Schocher <hs@denx.de>
Acked-by: Łukasz Majewski <lukma@denx.de>
Reviewed-by: Marek Vasut <marex@denx.de>
With the move of environment code from common/ to env/ a number of
changes needed to be made to various make targets. We missed updating
some of the files required for out of tree builds of the tools. Correct
the 'environ' target to know that we need to work under tools/env/ still
(not tools/environ/) and then update the wrappers in env_attr.c and
env_flags.c to point to the new correct file.
Reported-by: Peter Robinson <pbrobinson@gmail.com>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
The hw can read up to 32 bytes at a time. If we need
more than one chunk, we have to enter the plain RX mode.
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
When I originally added this driver, I did some careless (and in
retrospect: mindless) copy & paste for the U_BOOT_DRIVER structure
skeletion... unfortunately, the 'arc_timer' string was committed
and slipped through all reviews.
This fixes the U_BOOT_DRIVER name to read 'rockchip_rk3368_timer'
(as originally intended).
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reported-by: Artturi Alm <artturi.alm@gmail.com>
Sometimes it's helpful to know the reset reason caused in the SoC.
Add reset reason detection for the RK3288 SoC.
This will set an environment variable which represents the reset reason.
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
The IPSR18 register bits were missing from the R8A7795 ES2.0+ PFC
tables, which triggered a BUG() in sh_pfc driver. This is because
of an out-of-bounds access to the pinmux_gpios[] array in the PFC
tables, which was too short due to the missing IPSR18 bits.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
The configuration option name is the later, so replace usage of
CONFIG_RAVB in board files with CONFIG_RENESAS_RAVB , otherwise
the RAVB pinmux is not set and ethernet does not work.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Before reading entire FIT image, add sanity check by testing image
header against FDT_MAGIC. This should help avoid problems in situations
where FIT is not yet available from storage device, for example when
performing initial programming of device.
Cc: Anatolij Gustschin <agust@denx.de>
Acked-by: Tomas Melin <tomas.melin@vaisala.com>
Boards can skip display interface init using board_video_skip().
If display interface was not initialized (e.g. no ipuv3 framebuffer
registered or IPU clock disabled), booting Linux stops due to the
crash in IPU shutdown function, when accessing IPU registers.
Check IPU clock and skip shutdown if clock is not enabled.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
When enabling CONFIG_CMD_BLOB and/or CONFIG_CMD_DEKBLOB, the build fails
with a linker error:
...
LD u-boot
arch/arm/mach-imx/built-in.o: In function `blob_encap_dek':
/home/clemens/dev/u-boot/arch/arm/mach-imx/cmd_dek.c:46: undefined
reference to `blob_dek'
This is due to an error in the Makefile, resulting in obj-yy/obj-yn/..
and fsl_blob.o is therefore not linked.
Fix it by splitting it up into two obj-y lines.
Signed-off-by: Clemens Gruber <clemens.gruber@pqgruber.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Add some documentation for the live device tree support in U-Boot. This
was missing from the initial series.
Signed-off-by: Simon Glass <sjg@chromium.org>
Suggested-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Łukasz Majewski <lukma@denx.de>
Since ee95d10 (fdt: Build the new python libfdt module), a number of
additional files are auto-generated/installed into the tools directory.
List these in .gitignore to suppress having them listed as untracked.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
References: ee95d10 (fdt: Build the new python libfdt module)
Reviewed-by: Simon Glass <sjg@chromium.org>
This commit brings things back to the well known working state of the
command.
-
With commit 9620d87259
(cmd/fdt: support single value replacement within an array)
there was an error introduced modifying (inserting) a property to a
device-tree node.
fdt_getprop(...) returnes a len with -1 for a non-existing property, but
a memcpy with len -1 isn't a good idea and things went wrong (crash).
-
Some times later Tom did repair this
with commit 99bb38e2cc
(fdt: Check for NULL return from fdt_getprop in 'fdt set')
This repairs the crash but the behaviour of the command isn't like
before, it makes it impossible to insert a property.
-
Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at>
Acked-by: Simon Glass <sjg@chromium.org>
The CONFIG_BLK conversion involves quite invasive changes in the U-Boot
code, with #ifdefs and different code paths. We should try to move over to
this soon so we can drop the old code.
Set a deadline of 9 months for this work, rounded up to the next release.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
This should not be printed by default. Prefix it with $(Q).
Fixes ee95d10b: ("fdt: Build the new python libfdt module")
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Since commit 3809e302 "Makefile: honor PYTHON configuration properly",
the build commands of libfdt are printed while previously were not.
This adds the missing '--quiet' back.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
- Pass MTDPARTS kernel arguments to kernel
- Use Kconfig CONFIG_NAND instead of CONFIG_SYS_EXTRA_OPTIONS="NAND"
- Call 'usb_stop' on kernel start
- Update Falcon mode setup to match other OMAP3 boards
- Use "uEnv.txt" as boot script instead of "boot.scr"
"lbas" with type "u16" (16 bits, unsigned) is promoted in
"lbas << ns->lba_shift" to type "int" (32 bits, signed), then
sign-extended to type "unsigned long long" (64 bits, unsigned).
If "lbas << ns->lba_shift" is greater than 0x7FFFFFFF, the upper
bits of the result will all be 1.
Fix it by casting "lbas" to "u32".
Reported-by: Coverity (CID: 166730)
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
memset() was given a sizeof(NVME_Q_NUM * sizeof(struct nvme_queue *)
to clear, which is wrong.
Reported-by: Coverity (CID: 166729)
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
According to fsync specification [1] some special files (e.g., a pipe, FIFO,
or socket) don't support synchronization and return either EROFS or EINVAL.
On the linux side the sys_fsync -> do_fsync() checks if the requested file
has f_op->fsync defined. If not it returns EINVAL [2].
This commit prevents writing error messages for files (devices), which
do not support fsync().
[1] - http://man7.org/linux/man-pages/man2/fsync.2.html
[2] - http://elixir.free-electrons.com/linux/v4.13-rc6/source/fs/sync.c#L183
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Acked-by: Michael Heimpold <mhei@heimpold.de>
Commit 4ecc988301 assumes fls is in libc
if __BSD_VISIBLE is defined. This appears to only be true on FreeBSD
and DragonFlyBSD. OpenBSD defines __BSD_VISIBLE and does not have fls
in strings.h/libc.
Switch the test for __BSD_VISIBLE to one for __DragonFly__ and
__FreeBSD__ to unbreak the build on OpenBSD.
Signed-off-by: Jonathan Gray <jsg@jsg.id.au>
This commit removes definitions of CONFIG_SYS_BARGSIZE defined to be
equal to CONFIG_SYS_CBSIZE in numerous configuration files.
We remove such definitions in two situations:
- CONFIG_SYS_CBSIZE is otherwise not defined in the board
configuration file, which means the default value of
CONFIG_SYS_CBSIZE == 256 applies. In this case, the default value
of CONFIG_SYS_BARGSIZE == 512 (common/image.c) is suitable, as it is
larger.
- CONFIG_SYS_CBSIZE is defined in the board configuration file, but
to a value equal or less than 512. In this case, the default value
of CONFIG_SYS_BARGSIZE == 512 (common.image.c) is suitable, as it
is equal or larger.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
CONFIG_SYS_BARGSIZE is already defined to 512 in common/image.c when
not defined. Therefore, there is no point in having board
configuration files define it to 512.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Now that include/config_fallbacks.h define a sane fallback for
CONFIG_SYS_MAXARGS, we can drop the definition of this constant in all
configurations that were using the default value.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
CONFIG_SYS_MAXARGS contains the maximum number of arguments accepted
by U-Boot commands. Since the vast majority of the platforms define it
to 16, it makes sense to have a default definition to 16, which will
allow to remove this definition from a significant number of
platforms.
It will allow to remove the default definition from 216 platform .h
files, leaving only 56 platforms with non-default values (15, 24, 32,
48, 64, 96, 128 or 256).
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Now that the fallback value of CONFIG_SYS_PBSIZE in
include/config_fallbacks.h has been adjusted, remove its definition
from a large number of board configuration files.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Most of the platforms are using CONFIG_SYS_CBSIZE +
sizeof(CONFIG_SYS_PROMPT) + 16 as their value for CONFIG_SYS_PBSIZE,
so let's adopt this for the fallback value of CONFIG_SYS_PBSIZE.
This will allow us to drop an explicit definition of CONFIG_SYS_PBSIZE
from a large number of platforms.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Now that include/config_fallbacks.h define a sane fallback for
CONFIG_SYS_CBSIZE, we can drop the definition of this constant in all
configurations that were using the default value.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
[trini: Drop <config.h> from stih410-b2260.h]
Signed-off-by: Tom Rini <trini@konsulko.com>
CONFIG_SYS_CBSIZE contains the buffer size for input for the
console. The vast majority of platforms define them to some reasonable
value (256, 512 or 1024 bytes), and it is quite annoying to repeat
this definition for all platforms while it isn't really HW-related.
Therefore, let's provide a sane fallback value in config_fallbacks.h,
so that platforms can rely on it instead of having to explicitly
define it.
We use 1024 when KGDB is enabled, and 256 otherwise, which is what the
majority of the platforms are doing.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
The current code checks that no partitions overlap with the GPT partition
table using the offset of the first LBA usable for that partition.
This works fine, unless you have a partition entry that is further away
than it usually is and you want to create partitions in the gap between the
GPT header and the GPT partition entries, for example to reflash a
bootloader that needs to be set there.
Rework the test to something a bit smarter that checks whether a partition
would overlap with either the GPT header or the partition entries, no
matter where it is on the disk.
Partitions that do not have a start LBA specified will still start at the
first LBA usable set in the GPT header, to avoid weird behaviours.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
The gpt_fill_pte will need to access the device block size. Let's pass the
device descriptor as an argument.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
The start variable is only used inside a loop, and is never affected inside
it, so it's a purely local variable.
In the same way the partition size is accessed several times, so we can
store it in a variable.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Add the following options to drivers/misc/Kconfig:
SYS_I2C_EEPROM_ADDR
SYS_I2C_EEPROM_BUS
SYS_EEPROM_SIZE
SYS_EEPROM_PAGE_WRITE_BITS
SYS_EEPROM_PAGE_WRITE_DELAY_MS
SYS_I2C_EEPROM_ADDR_LEN
SYS_I2C_EEPROM_ADDR_OVERFLOW
This does not migrate any boards, but provides a foundations for
those who want/need these options
Signed-off-by: Adam Ford <aford173@gmail.com>
[trini: Migrate uniphier]
Signed-off-by: Tom Rini <trini@konsulko.com>
Without ethernet cable plugged, "ip=dhcp" leads to a complete hangup in
Linux booting and the system does not boot into userland at all. Since
its not required to have an active network connection on these board,
lets remove this statement from the default environment.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
It was noticed a few times, that the reboot from Linux (reboot command)
is different from the reboot (reset command) under U-Boot. The U-Boot
version does seem to reset the board more deeply (PCI cards etc) than
the Linux reboot.
This is actually caused by missing full reset bit in the reset register
value in the ACPI FADT table.
Reported-by: Stefan Roese <sr@denx.de>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Stefan Roese <sr@denx.de>
The atomic preop register can only be written when SPI settings are
not locked, otherwise it's read-only.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
In ich_spi_xfer() when the driver presets control fields, control
variable gets assigned twice. Apparently only the last assignment
takes effect. Remove the other one.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Manually enable SYS_NAND_U_BOOT_LOCATIONS.
Set CONFIG_SYS_NAND_U_BOOT_OFFS=0x80000 and remove it from header
Signed-off-by: Adam Ford <aford173@gmail.com>
This converts the following to Kconfig:
CONFIG_SPL_OMAP3_ID_NAND
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This converts the following to Kconfig:
CONFIG_SYS_I2C_BUS_MAX
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
[trini: Fix AM43XX drop AM44XX]
Signed-off-by: Tom Rini <trini@konsulko.com>
For consistency with other platforms and in preparation of Kconfig
migration, let's change Several TI platforms that use I2C_BUS_MAX
to CONFIG_SYS_I2C_BUS_MAX
Signed-off-by: Adam Ford <aford173@gmail.com>
- Move ANDROID_IMAGE_SUPPORT to top level Kconfig under images as it's
not strictly part of fastboot.
- Add some defaults for the fastboot buffer location and size
- Migrate all options listed in cmd/fastboot/Kconfig
- Cleanup the README
Signed-off-by: Tom Rini <trini@konsulko.com>
This syncs all of the currently Kconfig'd symbols out of the headers and
into the defconfig files. This has two exceptions, first am335x_evm
needs to be converted to DM in SPL and then it can stop undef'ing
CONFIG_DM_USB. Leaving this as-is results in a build failure, and
without work, run time failure. The other case is am43xx_evm.h and in
turn am43xx_evm_usbhost_boot. The problem here is that we need DWC3 USB
host mode in SPL, but still desire to have gadget mode in U-Boot proper.
Signed-off-by: Tom Rini <trini@konsulko.com>
This reverts commit 1d20170467, reversing
changes made to 6aee2ab68c.
The mxc_ipuv3_fb.c changes introduce build failures on some targets.
Signed-off-by: Tom Rini <trini@konsulko.com>
SUNXI_GMAC was still used to configure the code where as the
same has been renamed and moved to Kconfig in below commit
"sunxi: Move SUNXI_GMAC to Kconfig"
(sha1: 4d43d065db)
Signed-off-by: Dave Prue <dave@prue.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
Tested-by: Mark Kettenis <kettenis@openbsd.org>
[Tweek commit message, config_whitelist.txt, build-whitelist.sh]
Signed-off-by: Jagan Teki <jagan@openedev.com>
When enabling the new mmc timing mode, we inadvertently clear all the
remaining bits in the new timing mode register. The bits cleared
include a default phase delay on the output clock. The BSP kernel
states that the default values are supposed to be used. Clearing them
results in decreased performance or transfer errors on some boards.
Fixes: de9b1771c3 ("mmc: sunxi: Support new mode")
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Memory dt node update introduced by spl_fixup_fdt() in below
commit was making DDR configuration in-appropriate
to boot falcon mode. Hence added dram_init_banksize for
explicit assignment of proper base and size of DDR.
"boot: fdt: Perform arch_fixup_fdt() on the given device tree for falcon boot"
(sha1: 6e7585bb64)
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
The NXP i.MX 6UL and 6ULL do not support SATA and have no SATA
boot mode, hence remove it from the boot device detecion. This
fixes a build error introduced with 3bd1642d4d ("imx: fix USB
boot mode detection for i.MX 6UL and 6ULL")
Fixes: 3bd1642d4d ("imx: fix USB boot mode detection for i.MX 6UL and 6ULL")
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Reviewed-by: Jagan Teki <jagan@openedev.com>
U-boots spi-nor support is currently considered a work in progress. For
now to avoid issues it is necessary to add a "spi-flash" compatible
string. Eventually the "jedec,spi-nor" will be sufficient when the core
U-boot code is updated to support it.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Now the entry to the NAND driver init can be is controlled by DT;
it should not hurt to compile the driver all the time.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
This imply was added when the option was moved by the moveconfig tool,
but the intention is not clear. Move it to defconfig.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
This is now set up by the pinctrl driver when the NAND driver is
probed. Remove the legacy code.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
CONFIG_NAND_DENALI select's CONFIG_SYS_NAND_SELF_INIT, so the
NAND initialization process is driven by the driver itself.
CONFIG_SYS_NAND_MAX_CHIPS and CONFIG_SYS_NAND_BASE are unused.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
The new SoC PXs3 changed the address of PLL, but still uses the
same PLL name. We can not define SC_*PLLCTRL in the common header.
Move them to per-SoC .c file. Also, fix some PLL comments.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
The #include <common.h> was added for mdelay(). Later, the declaration
of mdelay was moved to <linux/delay.h> by commit 5bc516ed66 ("delay:
collect {m, n, u}delay declarations to include/linux/delay.h").
There is no need to include <common.h> now.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
A patch for NAND uclass support was proposed about half a year ago:
https://patchwork.ozlabs.org/patch/722282/
It was not merged and I do not see on-going work for this.
Without DM-based probing, we need to set up pinctrl etc. in an ad-hoc
way and give lots of crappy CONFIG options for base addresses and
properties, which are supposed to be specified by DT. This is painful.
This commit just provides a probe hook to retrieve "reg" from DT and
allocate private data in a DM manner. This DT driver is not essentially
a NAND driver, in fact it is (ab)using UCLASS_MISC. Once UCLASS_NAND is
supported, it would be possible to migrate to it.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Linux supports platform_get_resource_byname() to look up a resource
by name.
We want a similar helper. It is useful when a device node has named
register regions.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Boards can skip display interface init using board_video_skip().
If display interface was not initialized (e.g. no ipuv3 framebuffer
registered or IPU clock disabled), booting Linux stops due to the
crash in IPU shutdown function, when accessing IPU registers.
Check IPU clock and skip shutdown if clock is not enabled.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
U-Boot proper is using DM_MMC so, enable CONFIG_BLK otherwise
find_mmc_device failed to detect MMC device.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
The soc_boot_modes array is only used by bmode command
and not needed in SPL. Don't include it into SPL.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Stefano Babic <sbabic@denx.de>
The GPT timer was already initialised in board_init_f() as
it is needed in dram init. Do not repeat timer init in
board_init_r().
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
There is no need to clear the control register 100 times in a
loop, a single zero write clears the register. I didn't find any
justification why clearing this register in a loop is needed
(no info in i.MX6 errata or GPT timer linux driver, linux driver
uses single write to clear this control register).
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
In case of 2 banks, the address space of the first CS must be defined
and not let to the higher value.
Add support for SOM with a single bank of RAM. It was tested with i.MX6Q
modules in the following configurations:
- 2 Banks, 4 GB
- 2 Banks, 1 GB
- 1 Bank, 1 GB
Signed-off-by: Stefano Babic <sbabic@denx.de>
Before reading entire FIT image, add sanity check by testing image
header against FDT_MAGIC. This should help avoid problems in situations
where FIT is not yet available from storage device, for example when
performing initial programming of device.
Cc: Anatolij Gustschin <agust@denx.de>
Acked-by: Tomas Melin <tomas.melin@vaisala.com>
We see the choice of USB_DWC3_HOST / _GADGET in drivers/usb/dwc3/Kconfig,
but we can not choose USB_DWC3_HOST unless USB_GADGET is defined.
This is strange.
Loosen the "depends on" and also move "select USB_GADGET_DUALSPEED" to
the correct place.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
The driver-model rework changed, among other things, the way the private
data were moved around. It now uses the private field in the struct mmc.
However, the mmc_create argument was changed in the process to always pass
the array we used to have to store our private structures.
The basically means that all the MMC driver instances will now have the
private data of the first instance, which obviously doesn't work very well.
Pass the proper pointer to mmc_create.
Fixes: 034e226bc7 ("dm: mmc: sunxi: Pass private data around explicitly")
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Tested-by: Chen-Yu Tsai <wens@csie.org>
Tested-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Almost all of the newer Allwinner SoCs have a new operating mode for the
eMMC clocks that needs to be enabled in both the clock and the MMC
controller.
Details about that mode are sparse, and the name itself (new mode vs old
mode) doesn't give much details, but it seems that the it changes the
sampling of the MMC clock. One side effect is also that it divides the
parent clock rate by 2.
Add support for it through a Kconfig option.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Before commit 26d6119 (fdt: Move fdt_fixup_ethernet to a common place)
the fdt_fixup_ethernet(...) was called during do_bootvx_fdt(...).
Afterwards the only (common) place for this fixup is during
image_setup_libfdt(...) and this is only called, at least on ARM
platform, from image_setup_linux(...).
All this ends up in the fact, that the fdt_fixup_ethernet(...) is only
called on booting a linux image and not on booting a vxWorks image.
We fix this with adding the fdt_fixup_ethernet(...) call again to
do_bootvx_fdt(...)
Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
The silent environment callback function does not update the silent
flag during silent env set or unset. That is because of duplicated
CONFIG keyword at preprocessor condition in silent environment
callback function and cause silent env callback unable to work.
This patch is to remove the duplicated CONFIG keywork in silent
environment callback function.
Signed-off-by: Wilson Lee <wilson.lee@ni.com>
Cc: Keng Soon Cheah <keng.soon.cheah@ni.com>
Cc: Chen Yee Chew <chen.yee.chew@ni.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
At present the NVMe uclass driver uses a global variable nvme_info
to store global information like namespace id, and NVMe controller
driver's priv struct has a blk_dev_start that is used to calculate
the namespace id based on the global information from nvme_info.
This is not a good design in the DM world and can be replaced with
the following changes:
- Encode the namespace id in the NVMe block device name during
the NVMe uclass post probe
- Extract the namespace id from the device name during the NVMe
block device probe
- Let BLK uclass calculate the devnum for us by passing -1 to
blk_create_devicef() as the devnum
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
So far cache operations are only applied on the submission queue and
completion queue, but they are missing in other places like identify
and block read/write routines.
In order to correctly operate on the caches, the DMA buffer passed
to identify routine must be allocated properly on the stack with the
existing macro ALLOC_CACHE_ALIGN_BUFFER().
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
The NVMe block read and write routines are almost the same except
the command opcode. Let's consolidate them to avoid duplication.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
NVMe driver only uses two queues. The first one is allocated to do
admin stuff, while the second one is for IO stuff. So far the driver
uses magic number (0/1) to access them. Change to use macros.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
So far the driver unconditionally delays 10ms when en/disabling the
controller and still return 0 if 10ms times out. In fact, spec defines
a timeout value in the CAP register that is the worst case time that
host software shall wait for the controller to become ready.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Capabilities register is RO and accessed at various places in the
driver. Let's cache it in the controller driver's priv struct.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
So far this is not causing any issue due to NVMe and x86 are using
the same endianness, but for correctness, it should be fixed.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
ndev->queues is a pointer to pointer, but the allocation wrongly
requests sizeof(struct nvme_queue). Fix it.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
The codes currently try to read PCI vendor id of the NVMe block
device by dm_pci_read_config16() with its parameter set as its
root complex controller (ndev->pdev) instead of itself. This is
seriously wrong. We can read the vendor id by passing the correct
udevice parameter to the dm_pci_read_config16() API, however there
is a shortcut by reading the cached vendor id from the PCI device's
struct pci_child_platdata.
While we are here fixing this bug, apparently the quirk stuff handle
codes in nvme_get_info_from_identify() never takes effect since its
logic has never been true at all. Remove these codes completely.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Since the gpr_init() function is common for boards using MX6S, MX6DL, MX6D,
MX6Q and MX6QP processors move it to the soc.c file.
Signed-off-by: Breno Lima <breno.lima@nxp.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
While it is true that we no longer have 'ppcenv' and similar sections,
including env/embedded.o at all results in the text/etc sections being
available for the rest of the link. This in turn is required for the
setup used on ms7722se. This also, likely, needs further fine-tuning.
Fixes: f40ad66fa0 ("arch/sh: don't bring common/env_embedded.o into the link")
Signed-off-by: Tom Rini <trini@konsulko.com>
In order to be able to reliably use fdt_totalsize, we must have
<libfdt.h> included.
Fixes: 767cb74a00 ("cmd: spl: provide address and size of prepared FDT ...")
Signed-off-by: Tom Rini <trini@konsulko.com>
When reworking this code to fix other issues found by Coverity, I forgot
to ensure tmp_ep was always cleared before use.
Reported-by: Coverity (CID: 166612)
Fixes: bc028345ac ("mtdparts: Fix final outstanding issue reported by Coverity")
Signed-off-by: Tom Rini <trini@konsulko.com>
When using ISO partitions with a DMA enabled block device driver
reading the ISO partition leads to unaligned DMA operations:
CACHE: Misaligned operation at range [bffb7da8, bffb85a8]
Align the buffer to make sure we pass a buffer which works for
DMA operations.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
If the kernel is configured to be built with debug symbols, or
has bug tables, comparing files may not work if line numbers
change. This makes comparing object files with these options
harder to do. Let's strip out the debug info and drop the
__bug_table here so that we don't see false positives. There may
be other things to drop later, and it may be architecture
specific, but this works for me with my ARM64 build.
[ Import Linux commit: 65ba6fa439e7c3cbf97de9dce9e7a3390ae2638c ]
Signed-off-by: Stephen Boyd <stephen.boyd@linaro.org>
Reviewed-by: Jason Cooper <jason@lakedaemon.net>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
While &p_jdb[fs->blksz] is a valid expression (it points *one* char
sized element past the end of the array, e.g. &p_jdb[fs->blksz + 1] is
invalid (according to the C standard (C99/C11)).
Changing this to tag = (struct ext3_journal_block_tag *)(p_jdb + ofs);
Cc: Stefan Brüns <stefan.bruens@rwth-aachen.de>
Suggested-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>
Reported-by: Coverity (CID: 165117, 165110)
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>
As part of fixing the previously reported issues, it was missed that in
the case of mtdparts_init() we need to make sure that tmp_ep is long
enough to contain PARTITION_MAXLEN and a NULL termination. Then, to be
sure the buffer is NULL terminated, zero the entire buffer rather than
just ensuring the first character is NULL.
Cc: Lothar Waßmann <LW@KARO-electronics.de>
Cc: Maxime Ripard <maxime.ripard@free-electrons.com>
Reported-by: Coverity (CID: 166329)
Signed-off-by: Tom Rini <trini@konsulko.com>
Writing prepared FDT to persistent storage should be possible in
scripts. Create environment variables containing address and size
of the updated FDT. Scripts can use these variables after running
'spl export fdt ...' command to write the new blob to persistent
storage.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Update igep00x0 code with the following features:
- Add board and revision detection for the boards:
- IGEP0020-RF
- IGEP0020-RC
- IGEP0030-RG
- IGEP0030-RE
- Merge IGEP0020 and IGEP0030 mux tables
- Add suport to use GPIO_126, GPIO_127 and GPIO_129
- board_name and board_rev environment variables display board and
revision informations
- Move dtb name selection from code to boot script
Signed-off-by: Pau Pajuelo <ppajuel@gmail.com>
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Tested-by: Pau Pajuelo <ppajuel@gmail.com>
Avoid cluttering board file with CONFIG_SPL_BUILD ifdefs
by moving SPL related functions into separate file.
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Tested-by: Pau Pajuelo <ppajuel@gmail.com>
Acked-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
kASLR support in kernel requires a random number to be passed via
chosen/kaslr-seed propert. sec_firmware generates this random seed
which can then be passed in the device tree node.
sec_firmware reserves JR3 for it's own usage. Node for JR3 is
removed from device-tree.
Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com>
do_switch_ecc() calls fsmc_nand_switch_ecc(), which is a direct
function call into drivers/mtd/nand/fsmc_nand.c. However, this
function is not guarded by CONFIG_NAND_FSMC, which results to a build
failure if CONFIG_NAND_FSMC is disabled.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
The code in board/spear/common/ is not board-specific but
SoC-specific. Therefore, boards from other vendors than "spear" may
want to re-use this code, which is currently difficult with the code
being placed in board/spear/common/.
Since this code really is SoC-specific, this commit moves it to
arch/arm/cpu/arm926ejs/spear/, with the rest of the SPEAr related
code.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
The function interrupt_init_cpu() is given an int return type but does
not return anything but 0. Rework this to be a void function.
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Mario Six <mario.six@gdsys.cc>
The overflow calculation was incorrect. Adding the start block of the
partition is not needed because the sectors are already relative to the
beginning of the partition. If you attempted to write a file smaller
than cur_part_info.start blocks on a full partition the old calculation
fails to catch the overflow. This would cause an infinite loop in the
determine_fatent function.
Old, incorrect calculation:
ending sector of new file = start sector + file size (in sectors)
last sector = partition start + total sectors on the partition
Adding the partition start block number is not needed because sectors
are already relative to the start of the partition.
New calculation:
ending sector of new file = start sector + file size (in sectors)
last sector = total sectors on the partition
Signed-off-by: Reno Farnesi <nfarnesi4@gmail.com>
This re-syncs AM33xx DTS file with current file from
Linux v4.13-rc4 to ensure a consistent configuration. Upstream
Linux removed the redundant Interrupt-parent property from mmc,
mac, lcdc and tscadc sub nodes.
Signed-off-by: Suniel Mahesh <sunil.m@techveda.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
This is currently disabled, so USB keyboards are not detected in U-Boot.
Enable this option to fix that.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Jonathan Gray <jsg@jsg.id.au>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Paul Barker <pbarker@toganlabs.com>
The linker script for SuperH brings the .ppcenv and .ppcenvr section
of common/env_embedded.o into the .text section. However, the .ppcenv
section is only ever filled in by env_embedded.o when
CONFIG_SYS_USE_PPCENV is defined, but no platforms in mainline U-Boot
use this.
In addition, common/env_embedded.o is not always built (when you use
CONFIG_ENV_IS_NOWHERE for example), which causes the following build
failure:
Fixes:
LD u-boot
/home/thomas/sh4aeb-linux-musl/bin/sh4aeb-linux-ld.bfd: cannot find common/env_embedded.o
We fix this by no longer adding the .ppcenv and .ppcenvr sections from
common/env_embedded.o into the .text section.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
The SuperH architecture allows to be run in either little or big
endian mode. Some SuperH SoCs get the little vs. big endian decision
through mode pins sampled at reset, so if big endian has been choosen
by HW designers, it cannot be easily changed.
Therefore, it makes sense to allow building U-Boot for SuperH in big
endian mode. To allow this, the only change needed is to adjust the
OUTPUT_FORMAT() in the linker script.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
We need the clock available very early, add the u-boot,dm-pre-reloc
DT property on those nodes, so they come up very in the process.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
The R8A7795 and R8A7796 tables use different constants to identify
clock in DT, so split the tables and use the correct constants on
R8A7795. This fixes UART clock misconfiguration on R8A7795.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
i.MX 6 serial downloader is not necessarily booting via UART but can
also boot from USB. In fact only some i.MX chips have serial
downloader support via UART (e.g. 6UL/ULL and Vybrid) but all of
them have serial downloader support via USB. Use the more appropriate
BOOT_DEVICE_BOARD define which is used for ROM provided recovery
mechanisms in general.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Add the reserved boot mode used in the bmode command for i.MX 6UL
and 6ULL as introduced in commit 3fd9579085 ("imx: mx6ull: fix USB
bmode for i.MX 6UL and 6ULL").
Also replace BMODE_UART with BMODE_RESERVED, which is more appropriate.
Commit 96aac843b6 ("imx: Use IMX6_BMODE_* macros instead of numericals")
added macros for boot modes, in the process the reserved boot mode got
named BMODE_UART. We use the reserved boot mode in the bmode command to
let the boot ROM enter serial downloader recovery mode. But this is only
a side effect, the actual boot mode is reserved...
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
To support more input characters (longer stings pasted into the U-Boot
prompt) without dropping, lets selects the recently added UART RX
buffer for these boards.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
To support more input characters (longer stings pasted into the U-Boot
prompt) without dropping, lets selects the recently added UART RX
buffer for these boards.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Pasting longer lines into the U-Boot console prompt sometimes leads to
characters missing. One problem here is the small 16-byte FIFO of the
legacy NS16550 UART, e.g. on x86 platforms.
This patch now introduces a Kconfig option to enable RX buffer support
for all DM based serial drivers. With this option enabled, I was
able paste really long lines into the U-Boot console, without any
characters missing.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Tom Rini <trini@konsulko.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
This reverts commit 6822cf3ec7.
As Bin Meng has tested and pointed out, we don't need the RX interrupt
for the RX buffer support at all. Just reading all available characters
into a buffer is sufficient to solve the problem with the dropped
characters upon long lines pasted into the U-Boot prompt. Since this
RX buffer support can be implemented in a generic way, without any
device specifica (e.g. for the ns16550), I'll post a new patch with
a new serial RX buffer support for DM, which all DM based serial
drivers can use.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Tom Rini <trini@konsulko.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Let's imply the 'pci' command to access the de facto interconnect
bus in an x86 system.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Some Intel FSP (like Braswell) does SPI lock-down during the call
to fsp_notify(INIT_PHASE_BOOT). But before SPI lock-down is done,
it's bootloader's responsibility to configure the SPI controller's
opcode registers properly otherwise SPI controller driver doesn't
know how to communicate with the SPI flash device.
This introduces a Kconfig option CONFIG_FSP_LOCKDOWN_SPI for such
FSPs. When it is on, U-Boot will configure the SPI opcode registers
before the lock-down.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
At present the ICH SPI opcode registers configuration is done in the
ich_spi_remove() routine, a little bit weird but that's how current.
Linux MTD driver works. This changes to move the opcode registers
configuration to a separate routine ich_spi_config_opcode() which
might be called by U-Boot itself as well.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
At present the ICH SPI controller driver reads the controller lock
status from its register in the probe routine and saves the lock
status to a member of priv. Later the driver uses the cached status
from priv to judge whether the controller setting is locked and do
different setup.
But such logic is only valid when there is only the SPI controller
driver that touches the SPI hardware. In fact the lock status change
can be trigged outside the driver, eg: during the fsp_notify() call
when Intel FSP is used.
This changes the driver to read the lock status every time when an
SPI transfer is initiated instead of reading the cached one.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
To i.MX7ULP, we need to create two info instances for
iomux0 and iomux1 respectively, otherwise iomuxc0/1 will
share one info instance and use one base, because imx_pinctrl_probe
will use info to store base address and etc. But iomuxc0/1
actually have different base address.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefano Babic <sbabic@denx.de>
when using SHARE_MUX_CONF_REG, wrong mask is used for
writing config value, which causes mux value is cleared.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefano Babic <sbabic@denx.de>
Some files for i.MX do not yet have the SPDX ID to reference the correct
license.
Signed-off-by: Stefano Babic <sbabic@denx.de>
Reviewed-by: Wolfgang Denk <wd@denx.de>
Enable Serial Download Protocol (SDP) in SPL and U-Boot. This is
useful to make use of imx_usb to download the complete U-Boot
(u-boot.img) after SPL has been downloaded. The U-Boot command
sdp allows to enumerate as SDP capable device again, e.g. to
download a Linux kernel and/or U-Boot script.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
Use a completely independent USB Product ID for SPL. This allows
to differentiate a SDP running in SPL and SDP running in a U-Boot
which could not read the config block successfully.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
Reviewed-by: Łukasz Majewski <lukma@denx.de>
Document the U-Boot Serial Download Protocol implementation and
some typical use cases.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Reviewed-by: Łukasz Majewski <lukma@denx.de>
Add USB serial download protocol support to SPL. If the SoC started
in recovery mode the SPL will immediately switch to SDP and wait for
further downloads/commands from the host side.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Reviewed-by: Łukasz Majewski <lukma@denx.de>
Add a new command to start USB Serial Download Protocol (SDP)
state machine.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Reviewed-by: Łukasz Majewski <lukma@denx.de>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Support U-Boot images in SPL so that u-boot.img files can be
directly downloaded and executed. Furthermore support U-Boot
scripts download and execution in full U-Boot so that custom
recovery actions can be downloaded from the host in a third
step.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Reviewed-by: Łukasz Majewski <lukma@denx.de>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Add SDP (Serial Downloader Protocol) implementation for U-Boot. The
protocol is used in NXP SoC's boot ROM and allows to download program
images. Beside that, it can also be used to read/write registers and
download complete Device Configuration Data (DCD) sets. This basic
implementation supports downloading images with the imx header format
reading and writing registers.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Reviewed-by: Łukasz Majewski <lukma@denx.de>
Move the imximage.h header file to a common location so we can make
use of it from U-Boot too.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Reviewed-by: Łukasz Majewski <lukma@denx.de>
Add an i2c mux driver providing access to i2c bus segments using a
hardware MUX sitting on a master bus and controlled through gpio pins.
E.G. something like:
---------- ---------- Bus segment 1 - - - - -
| | SCL/SDA | |-------------- | |
| |------------| |
| | | | Bus segment 2 | |
| Linux | GPIO 1..N | MUX |--------------- Devices
| |------------| | | |
| | | | Bus segment M
| | | |---------------| |
---------- ---------- - - - - -
SCL/SDA of the master I2C bus is multiplexed to bus segment 1..M
according to the settings of the GPIO pins 1..N.
Note commit log from kernel
commit 92ed1a76("i2c: Add generic I2C multiplexer using GPIO API")
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Tested-by: Peng Fan <peng.fan@nxp.com> (i.MX6QP-Sabreauto)
Cc: Heiko Schocher <hs@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Add i2c driver which can be used on both STM32F7 and STM32H7.
This I2C block supports the following features:
_ Slave and master modes
_ Multimaster capability
_ Standard-mode (up to 100 kHz)
_ Fast-mode (up to 400 kHz)
_ Fast-mode Plus (up to 1 MHz)
_ 7-bit and 10-bit addressing mode
_ Multiple 7-bit slave addresses (2 addresses, 1 with configurable mask)
_ All 7-bit addresses acknowledge mode
_ General call
_ Programmable setup and hold times
_ Easy to use event management
_ Optional clock stretching
_ Software reset
Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Otherwise:
drivers/usb/gadget/f_fastboot.c:564:32: warning: format "%lx" expects
argument of type "long unsigned int", but argument 3 has type "unsigned
int" [-Wformat=]
Signed-off-by: Tom Rini <trini@konsulko.com>
Staticize a few functions and variables which are no longer exposed.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
The db-88f6820-amc has four chips with 2Gb density giving a total of 1GB
DRAM. Update the board_topology_map to reflect the correct
configuration.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
The function blk_dread will return -ENOSYS on failure or on success the
number of blocks read, which must be the number asked to read (otherwise
it failed somewhere). Correct this check.
Cc: Lukasz Majewski <lukma@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
There is no guarantee that commands are null-terminated in the USB
request buffer, so limit the length of data that is printed.
Signed-off-by: John Keeping <john@metanate.com>
Tested-by: Steve Rae <steve.rae@raedomain.com>
Fastboot loads an image at CONFIG_FASTBOOT_BUF_ADDR, but currently
tells do_bootm() to look for an image at $loadaddr. This breaks if
CONFIG_FASTBOOT_BUF_ADDR is different from the current user-set
loadaddr.
Instead, tell do_bootm() to pick up the image where it was laoded.
Signed-off-by: Peter Chubb <peter.chubb@data61.csiro.au>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Steve Rae <steve.rae@raedomain.com>
With the change to the environment code to remove the common init stage
of pointing to the default environment and setting it as valid, combined
with the change to switch gd->env_valid from 0/1/2 to an enum we now
must set env_valid to one of the enum values rather than an int. And in
this case, not only was setting it to an int wrong, it was now the wrong
value. Finally, in the case of ENV_IS_NOWHERE we must still say that
our envionrment is invalid after init for things to continue to
function.
Fixes: 7938822a6b ("env: Drop common init() functions")
Tested-by: Marek Vasut <marek.vasut@gmail.com>
Reported-by: Marek Vasut <marek.vasut@gmail.com>
Reported-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
---
Changes in v3:
- Actually include changes for env/nowhere.c
Since commit 576e3cc700 ("usb: host: xhci-dwc3: Add dual role mode
support from DT"), warning is displayed if dr_mode is not specified.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
- Merge sys_reset data of LD4, Pro4, sLD8 and Pro5
- Merge sys_reset data of LD11 and LD20
- Use primitive UNIPHIER_RESETX() macro because bit assignments for
system reset will be changed for every SoC in the future
- Add NAND and eMMC resets
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
This reverts commit 82d075e79f.
Commit 82d075e79f ("ARM: uniphier: fix ROM boot mode for PH1-sLD3")
was a workaround for sLD3. Now the sLD3 SoC support has been removed.
Revert it to allow to simplify the init code.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
This reverts commit bcc51c1512.
Commit bcc51c1512 ("ARM: uniphier: move lowlevel debug init code
after page table switch") was intended to support lowlevel debug for
sLD3. Now the sLD3 SoC support has been removed.
Revert it to allow to enable lowlevel debug earlier.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Since commit f0776a5517 ("spl: dm: Kconfig: SPL_CLK depends on
SPL_DM"), the following warning is displayed:
$ make uniphier_v8_defconfig
warning: (ARCH_ZYNQ && ARCH_ZYNQMP && STM32F7 && CLK_UNIPHIER) selects
SPL_CLK which has unmet direct dependencies (CLK && SPL_DM)
While I am here, I am removing the prompt to make it user-unconfigurable
option so that "select CLK_UNIPHIER" can be omitted.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
since commit: b529993e02 "spl: add hierarchical defaults for SPL_LDSCRIPT"
taurus board stopped working. Use the ldscript from
arch/arm/cpu/u-boot-spl.lds (as before this patch) fixed it.
Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
CONFIG_SYS_GENERIC_GLOBAL_DATA is no longer used by any board or
platform, so support for it can be dropped.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Reviewed-by: Vladimir Zapolskiy <vz@mleia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
ATF can leave the MMC IP in a state where U-Boot mmc driver
can't enumerate the eMMC.
This patch provides a mmc0_reset_clk() function like we
already so do sd card controller which resets the IP
when entering U-Boot.
With this patch applied eMMC partitions are successfully
enumerated again.
=> mmc dev 0
switch to partitions #0, OK
mmc0(part 0) is current device
=> mmc part
Partition Map for MMC device 0 -- Partition Type: EFI
Part Start LBA End LBA Name
Attributes
Type GUID
Partition GUID
1 0x00000800 0x00000fff "vrl"
attrs: 0x0000000000000000
type: ebd0a0a2-b9e5-4433-87c0-68b6b72699c7
guid: 496847ab-56a1-4cd5-a1ad-47f4acf055c9
2 0x00001000 0x000017ff "vrl_backup"
attrs: 0x0000000000000000
type: ebd0a0a2-b9e5-4433-87c0-68b6b72699c7
guid: 61a36fc1-8efb-4899-84d8-b61642efa723
3 0x00001800 0x00001fff "mcuimage"
<snip>
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
The function blk_dread will return -ENOSYS on failure or on success the
number of blocks read, which must be the number asked to read (otherwise
it failed somewhere). Correct this check.
Signed-off-by: Tom Rini <trini@konsulko.com>
The function blk_dread will return -ENOSYS on failure or on success the
number of blocks read, which must be the number asked to read (otherwise
it failed somewhere). Correct this check.
Signed-off-by: Tom Rini <trini@konsulko.com>
The function blk_dread will return -ENOSYS on failure or on success the
number of blocks read, which must be the number asked to read (otherwise
it failed somewhere). Correct this check.
Reported-by: Coverity (CID: 166335)
Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Now that sandbox is building cmd/mtdparts.c Coverity has looked at the
code and found a number of issues. In index_partitions() it is possible
that part will be NULL, so re-work the checks and debug statements to
take this into account. We have a number of string buffers that we
print to in the exact size of, and use string functions on, so we need
to ensure they are large enough to be NULL terminated. In
device_parse() it is not possible for num_partitions to be 0 (we would
have hit a different error first) so remove logically dead code.
Finally, in parse_mtdparts() if we have an error we need to free the
memory allocated to dev.
Cc: Lothar Waßmann <LW@KARO-electronics.de>
Cc: Maxime Ripard <maxime.ripard@free-electrons.com>
Reported-by: Coverity (CID: 166334, 166333, 166332, 166329, 166328)
Signed-off-by: Tom Rini <trini@konsulko.com>
Commit 089df18bfe ("lib: move hash CONFIG options to Kconfig") moved
CONFIG_SHA1, CONFIG_SHA256, CONFIG_SHA_HW_ACCEL, and
CONFIG_SHA_PROG_HW_ACCEL config options to Kconfig. So in the case of
SPL, CONFIG_SPL_HASH_SUPPORT enables CONFIG_SHA1 and CONFIG_SHA256 which
enables SHA SW library by default. But in the case of platforms with
SHA HW library support, SHA SW library becomes redundant and increases
size of SPL by approx 18K. Rework the code so that we have named
members and only have either software or hardware versions of the
algorithm, depending on the relevant config options. Update the comment
around hash_algo to reflect this as well.
Reported-by: Sumit Garg <sumit.garg@nxp.com>
Cc: Sumit Garg <sumit.garg@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Sumit Garg <sumit.garg@nxp.com>
On some systems `python` is `python3` (for instance, Archlinux). The
`PYTHON` variable can be used to point to `python2` to have a successful
build.
The use of `PYTHON` is currently limited in the Makefile and needs to be
extended in other places:
First, pylibfdt is required to be a Python 2 binding (binman imports
pylibfdt and is only compatible Python 2), so its setup.py needs to be
called accordingly. An alternative would be to change the libfdt
setup.py shebang to python2, but the binding is actually portable. Also,
it would break on system where there is no such thing as `python2`.
Secondly, the libfdt import checks need to be done against Python 2 as
well since the Python 2 compiled modules (in this case _libdft.so) can
not be imported from Python 3.
Note on the libfdt imports: "@if ! PYTHONPATH=tools $(PYTHON) -c 'import
libfdt'; then..." is probably simpler than the currently sub-optimal
pipe.
Reviewed-by: Jonathan Gray <jsg@jsg.id.au>
fdtdec.h is included, but not used in rk3399-board-spl.c: remove the
'#include'-statement.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
UEFI API functions have different return types.
Some return a value of type EFI_STATUS other don't.
We therefore should not cast the return value of EFI_EXIT
to another type than the expression passed to EFI_EXIT.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
This changes pci_mmc driver to use PCI_CLASS_SYSTEM_SDHCI instead of
individual vendor id & device id pair to support generic PCI SD host
controller.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Sysam stmark2 board is a generic and fully (hw and sw) open board, with
a mcf54415 Coldfire CPU, 128MB of DDR2, 16MB of SPI flash and SD card
as non volatile memories, and a wifi module included on-board.
The board is actually used mainly for Coldfire custodian testing activity
related to the mcf5441x Coldfire family.
For further information please see: http://sysam.it/cff_stmark2.html
Signed-off-by: Angelo Dureghello <angelo@sysam.it>
---
Changes in v2:
- remove CMD_REGINFO
- add board information in commit message
For certain boot types and sbf, for V4 cpu's, an early ddr/sdram init
is required. This patch moves this ddr/sdram early initalization
away from start.S (to be board related).
Signed-off-by: Angelo Dureghello <angelo@sysam.it>
During the the conversion to $(SPL_TPL_), the SPL_ fragment was
left over for the NOR, XIP and YMODEM boot methods in SPL, making
these unselectable.
This commit fixes this by dropping the spurious 'SPL_' fragment
from each line.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reported-by: Bo Shen <voice.shen@gmail.com>
Fixes: f94e643 (spl: consistently use $(SPL_TPL_) to select features for SPL and TPL builds)
This patch allows to show the EXT_CSD[179] partition_config
register info, just by specifying the dev param:
U-Boot> mmc partconf 0
EXT_CSD[179], PARTITION_CONFIG:
BOOT_ACK: 0x0
BOOT_PARTITION_ENABLE: 0x0
PARTITION_ACCESS: 0x0
Signed-off-by: Angelo Dureghello <angelo@sysam.it>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
All boards which use DM_MMC have now been converted to use DM_MMC_OPS.
Drop the option and good riddance.
Signed-off-by: Simon Glass <sjg@chromium.org>
Enable driver model for MMC (including BLK), SATA and USB. Note that USB
does not yet work correctly since the nodes are disabled. Hopefully this
can be resolved by the maintainer.
Signed-off-by: Simon Glass <sjg@chromium.org>
When CONFIG_BLK is enabled our weak board_mmc_init() will not be called.
Since there is no clock driver for MX6 yet, we must manually enable the
clocks.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add support for using driver model for SATA with the cm_fx6 board. The old
code remains for now to permit testing.
Signed-off-by: Simon Glass <sjg@chromium.org>
We want to use fsl_esdhc_init() with driver model. Move the mmc_init() out
of this function so that we can use it for our common init.
Signed-off-by: Simon Glass <sjg@chromium.org>
With driver model we want to store the mmc and configuration structure in
platform data. Set up structure up and use it for non-DM as well.
Signed-off-by: Simon Glass <sjg@chromium.org>
Since esdhc_init_common() can fail it should return an error code. Update
this and also adjust the timeout mechanism to use get_timer(), which is a
more common approach.
Signed-off-by: Simon Glass <sjg@chromium.org>
Since esdhc_reset() can fail it should return an error code. Update this
and also adjust the timeout mechanism to use get_timer(), which is a more
common approach.
Signed-off-by: Simon Glass <sjg@chromium.org>
Driver model wants to use the core functions in this file but accesses the
driver-private data in a different way. Move the code into new 'common'
functions and set up stubs to call these. Also sort the operations into
alphabetical order for consistency.
Signed-off-by: Simon Glass <sjg@chromium.org>
With driver model we will not use mmc->priv to access driver-private data.
To accomodate this, update internal functions so that we can pass the
private data directly. This will allow the caller to obtain it as it
prefers.
Signed-off-by: Simon Glass <sjg@chromium.org>
Update this driver to support driver model. This involves implementing the
AHCI operations and reusing existing common code.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present the AHCI uclass is just a shell and we still use the global
functions to access SATA. Fix this by adding operations to the uclass.
Signed-off-by: Simon Glass <sjg@chromium.org>
Driver model wants to use the core functions in this file but accesses the
uclass-private data in a different way. Move the code into new 'common'
functions and set up stubs to call these.
Signed-off-by: Simon Glass <sjg@chromium.org>
This function will not be used with driver model and it relates to the
other exported functions. Move it down next to them.
Signed-off-by: Simon Glass <sjg@chromium.org>
Rename dwc_ahsata.h to indicate that it is a private header file. We plan
to create another header with some public functions.
Signed-off-by: Simon Glass <sjg@chromium.org>
There is a strange &(var) coding style in this driver. Adjust it to use
&var instead, which is more usual.
Signed-off-by: Simon Glass <sjg@chromium.org>
With driver model sata_dev_desc[] does not exist. We still want to use the
common code of this driver so update it to pass struct ahci_uc_priv * to
each of these functions, instead of an integer which must be looked up in
sata_dev_desc[].
Signed-off-by: Simon Glass <sjg@chromium.org>
Most of the casts in this driver are not necessary. With driver model we
do not cast from void *. Update the driver to follow this rule.
Signed-off-by: Simon Glass <sjg@chromium.org>
With driver model this becomes uclass-private data. Rename the parameter
varable to reflect this.
With the driver model conversion we will not have any exported functions.
Move all exported functions to be together at the end of the file so that
we can deal with them in one #ifdef block.
Signed-off-by: Simon Glass <sjg@chromium.org>
With the driver model conversion we will not have any exported functions.
Move all exported functions to be together at the end of the file so that
we can deal with them in one #ifdef block.
Signed-off-by: Simon Glass <sjg@chromium.org>
Instead of having separate code in the 'usb' command, adjust it to use
the common function.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Instead of having separate code in the 'ide' command, adjust it to use
the common function.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Instead of having separate code in the 'scsi' command, adjust it to use
the common function.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Instead of having separate code in the 'sata' command, adjust it to use
the common function.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Most block devices provide a command (e.g. 'sata', 'scsi', 'ide') and
these commands generally do the same thing. This makes it harder to
maintain this code and keep it consistent.
We now have a block device interface which is either implemented by driver
model (when CONFIG_BLK is enabled) or with a legacy interface. Therefore
it is possible to handle most of what these commands do with generic code.
Add a new generic function to process block-device commands using the
interface type and the current device number for that type.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a function to find the name of an interface type (e.g. "sata", "scsi")
from the interface type enum.
This is useful for generic code (not specific to SATA or SCSI, for
example) that wants to display the type of interface it is dealing with.
Signed-off-by: Simon Glass <sjg@chromium.org>
We cannot call dm_scan_fdt_dev() with of-platdata since there is no device
tree. Fix this with an #if check.
Fixes: 3be9a37 (dm: syscon: scan sub-nodes of the syscon node)
Signed-off-by: Simon Glass <sjg@chromium.org>
The bind() method is called before the device is probed and so the
device has no private data, should use the platform data, and set up
a new struct to hold the mmc and cfg members.
Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The command handling in this driver is awful, esp. because the driver
depends on command numbers to determine whether this is APPCMD or not.
Also, handling of command RSP response types is totally wrong.
This patch at least plucks out some of the custom command encoding and
fixes the APPCMD handling. The RSP handling still needs work, yet that
might not be needed as it turns out the uniphier-sd.c driver is in much
better shape and supports the same IP, so we might be able to just drop
this driver in favor of the uniphier one.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
On some flash (like Macronix), QE (quad enable) bit is in the same
status register as BP# bits, and we need preserve its original value
during a reboot cycle as this is required by some platforms (like
Intel ICH SPI controller working under descriptor mode).
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
[Refined code for readability]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
The load() methods have inconsistent behaviour on error. Some of them load
an empty default environment. Some load an environment containing an error
message. Others do nothing.
As a step in the right direction, have the method return an error code.
Then the caller could handle this itself in a consistent way.
Signed-off-by: Simon Glass <sjg@chromium.org>
In principle this can fail, e.g. if the index is out of range. Adjust the
driver signature to allow returning an error code.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
We are now using an env_ prefix for environment functions. Rename these
other functions as well, for consistency:
getenv_vlan()
getenv_bootm_size()
getenv_bootm_low()
getenv_bootm_mapsize()
env_get_default()
Suggested-by: Wolfgang Denk <wd@denx.de>
Signed-off-by: Simon Glass <sjg@chromium.org>
We are now using an env_ prefix for environment functions. Rename these
for consistency. Also add function comments in common.h.
Suggested-by: Wolfgang Denk <wd@denx.de>
Signed-off-by: Simon Glass <sjg@chromium.org>
We are now using an env_ prefix for environment functions. Rename these
two functions for consistency. Also add function comments in common.h.
Quite a few places use getenv() in a condition context, provoking a
warning from checkpatch. These are fixed up in this patch also.
Suggested-by: Wolfgang Denk <wd@denx.de>
Signed-off-by: Simon Glass <sjg@chromium.org>
We are now using an env_ prefix for environment functions. Rename these
commonly used functions, for consistency. Also add function comments in
common.h.
Suggested-by: Wolfgang Denk <wd@denx.de>
Signed-off-by: Simon Glass <sjg@chromium.org>
We are now using an env_ prefix for environment functions. Rename setenv()
for consistency. Also add function comments in common.h.
Suggested-by: Wolfgang Denk <wd@denx.de>
Signed-off-by: Simon Glass <sjg@chromium.org>
As M4 is sourcing UART clk from OSC, to make UART work
when M4 is enabled, need to select OSC as clk parent,
24M OSC is enough for debug UART in uboot.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
There is not LDO_SOC/PU/ARM/MMDC1 on i.MX6SLL, also no need to gate/ungate
all PFDs to make PFD working.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Under very rare timing circumstances, transitioning into streaming
mode might create a data corruption. Present on Two or more processors
or 1 core with ACP, all revisions. This erratum can be worked round
by setting bit[22] of the undocumented Diagnostic Control Register to 1.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Tom Rini <trini@konsulko.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
The ARM errata 751472, 794072, 761320 only applied
to the following configuration:
This erratum affects configurations with either:
- One processor if the ACP is present
- Two or more processors
i.MX6 family does not have the ACP and thus only the MPCore system
will be impacted, which are the i.MX6DQ, i.MX6DL, and i.MX6QP.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
The IPU AXI QoS for the i.MX6QP and i.MX6DP processors have to be set as
commented in the code:
/* set IPU AXI-id1 Qos=0x1 AXI-id0/2/3 Qos=0x7 */
Set IOMUXC_GPR6 and IOMUXC_GPR7 to 0x77177717 instead of 0x007F007F.
Signed-off-by: Breno Lima <breno.lima@nxp.com>
The IPU AXI QoS for the i.MX6QP and i.MX6DP processors have to be set as
commented in the code:
/* set IPU AXI-id1 Qos=0x1 AXI-id0/2/3 Qos=0x7 */
Set IOMUXC_GPR6 and IOMUXC_GPR7 to 0x77177717 instead of 0x007F007F.
Signed-off-by: Breno Lima <breno.lima@nxp.com>
Use the env_save() function directly now that there is only one
implementation of saveenv().
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Denk <wd@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
This is a strange name for a function that loads the environment. There is
now only one implementation of this function, so use the new env_load()
function directly instead.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
We only have a single implementation of this function now and it is called
env_get_char(). Drop the old function and the weak version.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Now that env_init() is only defined once we can drop the env_init_new()
name and just use env_init().
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
This variable is declared as a global in most environment location
drivers. But it is not used outside the drivers and most of the
declarations are unnecessary.
Also some drivers call free() on env_ptr which seems wrong since it is
not in the heap.
Drop the variable where possible, and all calls to free().
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Add a name to the driver and use that instead of the global variable
declared by each driver.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Most of the init() implementations just use the default environment.
Adjust env_init_new() to do this automatically, and drop the redundant
code.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Move over to use a the master implementation of the location drivers, with
each method calling out to the appropriate driver.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
We plan to move to a environment access via drivers for each location
where the environment can be stored. Add an implementation for this. So
far it is not used, but will be pressed into service in a future patch.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present we support multiple environment drivers but there is not way to
select between them at run time. Also settings related to the position and
size of the environment area are global (i.e. apply to all locations).
Until these limitations are removed we cannot really support more than one
environment location. Adjust the location to be a choice so that only one
can be selected. By default the environment is 'nowhere', meaning that the
environment exists only in memory and cannot be saved.
Also expand the help for the 'nowhere' option and move it to the top since
it is the default.
Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: Move all of the imply logic to default X if Y so it works again]
Signed-off-by: Tom Rini <trini@konsulko.com>
Fix USB OTG power enable aka USBO1_EN which on Apalis T30 is connected
to the T30 ball GEN2_I2C_SCL.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Set up a location driver for each supported environment location. At
present this just points to the global functions and is not used. A
later patch will switch this over to use private functions in each driver.
There are several special cases here in various drivers to handle
peculiarities of certain boards:
1. Some boards define CONFIG_ENV_IS_IN_FAT and CONFIG_SPL_ENV_SUPPORT but
do not actually load the environment in SPL. The env load code was
optimised out before but with the driver, it is not. Therefore a special
case is added to env/fat.c. The correct fix (depending on board testing
might be to disable CONFIG_SPL_ENV_SUPPORT.
2. A similar situations happens with CONFIG_ENV_IS_IN_FLASH. Some boards
do not actually load the environment in SPL, so to reduce code size we
need to drop that code. A similar fix may be possible with these boards,
or it may be possible to adjust the environment CONFIG settings.
Added to the above is that the CONFIG_SPL_ENV_SUPPORT option does not
apply when the environment is in flash.
Obviously the above has been discovered through painful and time-consuming
trial and error. Hopefully board maintainers can take a look and figure
out what is actually needed.
Signed-off-by: Simon Glass <sjg@chromium.org>
We want to use this name for all environment drivers. Update the nand
driver to use a more specific name.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
At present we have three states for the environment, numbered 0, 1 and 2.
Add an enum to record this to avoid open-coded values.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
This function is the same as env_get_char_spec() apart from dropping the
brackets. Drop the brackets from env_get_char_spec() and use that instead
of env_get_char_memory().
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
This function does nothing but call env_get_char_spec(). Drop it and
adjust its only caller.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
The check for gd->env_valid is used in both the 'if' and 'else' part of
env_get_char(). Move it into that function instead for simplicity. Drop
that code from the two leaf functions.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
This function is not used anywhere other than env_get_char(). Move the
code into that function.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
These functions are not used outside this file. Make them static and order
them to avoid forward declarations.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
About a quarter of the files in common/ relate to the environment. It
seems better to put these into their own subdirectory and remove the
prefix.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
This target stops us using 'env' as a subdirectory. It is not mentioned in
the help so seems to be an internal target. Rename it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
OLimex A64-OLinuXino is an open-source hardware board
using the Allwinner A64 SOC.
OLimex A64-OLinuXino has
- A64 Quad-core Cortex-A53 64bit
- 1GB or 2GB RAM DDR3L @ 672Mhz
- microSD slot and 4/8/16GB eMMC
- Debug TTL UART
- HDMI
- LCD
- IR receiver
- 5V DC power supply
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
NanoPi A64 is a new board of high performance with low cost
designed by FriendlyElec., using the Allwinner A64 SOC.
Nanopi A64 features
- Allwinner A64, 64-bit Quad-core Cortex-A53@648MHz to 1.152GHz, DVFS
- 1GB DDR3 RAM
- MicroSD
- Gigabit Ethernet (RTL8211E)
- Wi-Fi 802.11b/g/n
- IR receiver
- Audio In/Out
- Video In/Out
- Serial Debug Port
- microUSB 5V 2A DC power-supply
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
Also introduce CONFIG_USE_BOOTARGS option so we can control if
CONFIG_BOOTARGS defined at all.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
[trini: Resync r8a779[56]_ulcb, various ls10xx targets]
Signed-off-by: Tom Rini <trini@konsulko.com>
Even after memory free of phydev, priv is still pointing to the
obsolete address.
So update priv->phydev as NULL after memory free.
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Add support for Microchip LAN7500, LAN7800 and LAN7850,
USB to 10/100/1000 Ethernet Controllers.
Signed-off-by: Yuiko Oshino <yuiko.oshino@microchip.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Add an mii helper function to resolve flow control status per
IEEE 802.3-2005 table 28B-3.
This function was taken from the Linux source tree.
Signed-off-by: Yuiko Oshino <yuiko.oshino@microchip.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
While it is likely that this entire case is superfluous and can be
removed, correct the test now to match what is in rockchip-common.h and
makes sense based on context of the code. Otherwise we get a large
number of warnings.
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
This appears to be a simple typo that dates back to the original
implementation of board_detail in commit e79394643b ("common: Update
cmd_bdinfo for PPC").
Signed-off-by: Chris Packham <judge.packham@gmail.com>
We plan to rewrite this script to use the pytest framework. To make it
easier to review the changes, indent the code to match the next patch.
This gets all of the whitespace changes out of the way.
Signed-off-by: Simon Glass <sjg@chromium.org>
OMAP5432 did go into production with AVS class0 registers which were
mutually exclusive from AVS Class 1.5 registers.
Most OMAP5-uEVM boards use the pre-production Class1.5 which has
production efuse registers set to 0. However on production devices,
these are set to valid data.
scale_vcore logic is already smart enough to detect this and use the
"Nominal voltage" on devices that do not have efuse registers populated.
On a test production device populated as follows:
MPU OPP_NOM:
=> md.l 0x04A0021C4 1
4a0021c4: 03a003e9 ....
(0x3e9 = 1.01v) vs nom voltage of 1.06v
MPU OPP_HIGH:
=> md.l 0x04A0021C8 1
4a0021c8: 03400485 ..@.
MM OPP_NOM:
=> md.l 0x04A0021A4 1
4a0021a4: 038003d4 ....
(0x3d4 = 980mV) vs nom voltage of 1.025v
MM OPP_OD:
=> md.l 0x04A0021A8 1
4a0021a8: 03600403 ..`.
CORE OPP_NOM:
=> md.l 0x04A0021D8 1
4a0021d8: 000003cf ....
(0x3cf = 975mV) vs nom voltage of 1.040v
Since the efuse values are'nt currently used, we do not regress on
existing pre-production samples (they continue to use nominal voltage).
But on boards that do have production samples populated, we can leverage
the optimal voltages necessary for proper operation.
Tested on:
a) 720-2644-001 OMAP5UEVM with production sample.
b) 750-2628-222(A) UEVM5432G-02 with pre-production sample.
Data based on OMAP5432 Technical reference Manual SWPU282AF (May
2012-Revised Aug 2016)
NOTE: All collaterals on OMAP5432 silicon itself seems to have been
removed from ti.com, though EVM details are still available:
http://www.ti.com/tool/OMAP5432-EVM
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
A recent change adjusted a test string so that the test no-longer passes.
Fix it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reported-by: Heiko Schocher <hs@denx.de>
Fixes: b28c5fcc (test-fit.py: Minor grammar/spelling/clarification tweaks)
Convert name to show explicitly that we are using milliseconds. For a
watchdog timer this is precise enough.
No functional change intended.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
FDT_ERROR is defined as unsigned long. However, since the return value of
fdt_offset() is int, a warning will occur when compiling. Also, it is better
to use -EINVAL than FDT_ERROR.
This fixes this problem by change return value from FDT_ERROR to -EINVAL.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
CC: Franklin S Cooper Jr <fcooper@ti.com>
Reviewed-by: Franklin S Cooper Jr <fcooper@ti.com>
QEMU supports NVMe emulation. Enable the NVMe driver on QEMU x86.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Maximum Data Transfer Size (MDTS) field indicates the maximum
data transfer size between the host and the controller. The
host should not submit a command that exceeds this transfer
size. The value is in units of the minimum memory page size
and is reported as a power of two (2^n).
The spec also says: a value of 0h indicates no restrictions
on transfer size. On the real NVMe card this is normally not
0 due to hardware restrictions, but with QEMU emulated NVMe
device it reports as 0. In nvme_blk_read/write() below we
have the following algorithm for maximum number of logic
blocks per transfer:
u16 lbas = 1 << (dev->max_transfer_shift - ns->lba_shift);
dev->max_transfer_shift being 0 will for sure cause lbas to
overflow. Let's use 20. With this fix, the NVMe driver works
on QEMU emulated NVMe device.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
NVMe should use the nsze value from the queried device. This will
reflect the total number of blocks of the device and fix detecting
my Samsung 960 EVO 256GB.
Original:
Capacity: 40386.6 MB = 39.4 GB (82711872 x 512)
Fixed:
Capacity: 238475.1 MB = 232.8 GB (488397168 x 512)
Signed-off-by: Jon Nettleton <jon@solid-run.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
This adds support to detect the catchall PCI class for NVMe devices.
It allows the drivers to work with most NVMe devices that don't need
specific detection due to quirks etc.
Tested against a Samsung 960 EVO drive.
Signed-off-by: Jon Nettleton <jon@solid-run.com>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Add nvme commands in U-Boot command line.
1. "nvme scan" - scan NVMe blk devices
2. "nvme list" - show all available NVMe blk devices
3. "nvme info" - show current or a specific NVMe blk device
4. "nvme device" - show or set current device
5. "nvme part" - print partition table
6. "nvme read" - read data from NVMe blk device
7. "nvme write" - write data to NVMe blk device
Signed-off-by: Zhikang Zhang <zhikang.zhang@nxp.com>
Signed-off-by: Wenbin Song <wenbin.song@nxp.com>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
NVM Express (NVMe) is a register level interface that allows host
software to communicate with a non-volatile memory subsystem. This
interface is optimized for enterprise and client solid state drives,
typically attached to the PCI express interface.
This adds a U-Boot driver support of devices that follow the NVMe
standard [1] and supports basic read/write operations.
Tested with a 400GB Intel SSD 750 series NVMe card with controller
id 8086:0953.
[1] http://www.nvmexpress.org/resources/specifications/
Signed-off-by: Zhikang Zhang <zhikang.zhang@nxp.com>
Signed-off-by: Wenbin Song <wenbin.song@nxp.com>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
If CONFIG_MMC_DW is not defined the return value of
init_dwmmc should not rely on a random stack value.
Instead indicate that no error occured.
The problem was indicated by cppcheck.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
The if in the else branch is superfluous.
We can use a simple if.
The problem was indicated by cppcheck.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
It does not make sense to check if info is NULL after
dereferencing it.
The problem was indicated by cppcheck.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
For DEVICE_NON_SHARED the newly assigned value of attr
is overwritten due to a missing break.
The problem was indicated by cppcheck.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
It does not make sense first to dereference c and then
to check if it is NULL.
The problem was indicated by cppcheck.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
No need to assign a value to sig if the next statement using sig
is itself an assignment of a value to sig.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
This converts the following to Kconfig:
CONFIG_OMAP3_SPI
Signed-off-by: Adam Ford <aford173@gmail.com>
[trini: Minor comment tweaks]
Signed-off-by: Tom Rini <trini@konsulko.com>
Moving SPL_LDSCRIPT to Kconfig triggered an unfortunate attempt of
command substitution, as the sourced auto.conf may include $(ARCH)
which tries to execute a command 'ARCH'.
This showed up as a warning similar to the following:
include/config/auto.conf: line 209: ARCH: command not found
This change does no longer attempt to source auto.conf, but rather
passes it through awk to retrieve the values for CONFIG_LOCALVERSION
and CONFIG_LOCALVERSION_AUTO. This will also mitigate the risk of
unintended command substitution.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reported-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Klaus Goger <klaus.goger@theobroma-systems.com>
Reviewed-by: Jakob Unterwurzacher <jakob.unterwurzacher@theobroma-systems.com>
With the new way of doing things (i.e. the hierarchical selection of
SPL_LDSCRIPT via Kconfig) in place, this moves the SPL_LDSCRIPT setting
for the RK3368 from defconfig back into Kconfig.
With this done, there should be no lingering cases of SPL_LDSCRIPT
outside of Kconfig files.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
With the hierarchical defaults set up, we remove these from the header
files. To do so, I've run moveconfig on SPL_LDSCRIPT and this commits
the changes.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
With SPL_LDSCRIPT moved to Kconfig (and this being a 'string' config
node), all the lingering definitions in header files will cause
warnings/errors due to the redefinition of the configuration item.
As we don't want to pollute the defconfig files (and values should
usually be identical for entire architectures), the defaults are moved
into Kconfig. Kconfig will always pick the first default that
matches, so please keep these values at the end of each file (to allow
any board-specific Kconfig, which will be included earlier) to
override with an unconditional default setting.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
With the changes to split SPL/TPL for the RK3368, I apparently missed
some needed adjustments to the RK3188 Kconfig and rock_defconfig.
This fixes build-issues for the rock board after applying the RK3368
enablement (and SPL/TPL) set that resulted from TPL_SERIAL_SUPPORT,
TPL_ROCKCHIP_BACK_TO_BROM and TPL_TINY_MEMSET being separate symbols
now.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
When using DM timers w/ the timer0 block within the RK3368, we no
longer depend on the ARMv8 generic timer counting. This allows us to
drop the secure timer initialisation from the TPL and SPL stages.
The secure timer will later be set up by ATF, which starts the ARMv8
generic timer. Thus, there will be a dependency from Linux to the ATF
through the ARMv8 generic timer... this seems reasonable, as Linux
will require the ATF (and PSCI) to start up the secondary cores anyway
(in other words: we don't add any new dependencies).
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
There is no reasonably robust way (this will be needed so early that
diagnostics will be limited) to specify the base-address of the secure
timer through the DTS for TPL and SPL. In order to allow us a cleaner
way to structure our SPL and TPL stage, we now move to a DM timer
driver.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This adds a device-model driver for the timer block in the RK3368 (and
similar devices that share the same timer block, such as the RK3288) for
the down-counting (i.e. non-secure) timers.
This allows us to configure U-Boot for the RK3368 in such a way that
we can run with the secure timer inaccessible or uninitialised (note
that the ARMv8 generic timer does not count, if the secure timer is
not enabled).
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
To fully support DM timer in SPL and TPL, we need a few things cleaned
up and normalised:
- inclusion of the uclass and drivers should be an all-or-nothing
decision for each stage and under control of $(SPL_TPL_)TIMER
instead of having the two-level configuration with TIMER and
$(SPL_TPL_)TIMER_SUPPORT
- when $(SPL_TPL_)TIMER is enabled, the ARMv8 generic timer code can
not be compiled in
This normalises configuration to $(SPL_TPL_)TIMER and moves the config
options to drivers/timer/Kconfig (and cleans up the collateral damage
to some defconfigs that had SPL_TIMER_SUPPORT enabled).
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The timer-uclass depends on full OF_CONTROL through its interrogation
of /chosen and the code to determine the clock-frequency.
For the OF_PLATDATA case, these code-paths are disabled and it becomes
the timer driver's responsibility to correctly set the clock-frequency
in the uclass priv-data.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Splitting the feature selection for SPL and TPL, caused a few build
failures to mpx85xx boards. This fixes the fallout by adding the
needed new option names to the respective defconfig files.
Signed-off-byL Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
The ITS file generated warnings due to @<num> designations in the naming
which cause DTC to complain as follows:
Warning (unit_address_vs_reg): Node /images/uboot@1 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /images/atf@1 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /images/pmu@1 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /images/fdt@1 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /configurations/conf@1 has a unit name, but no reg property
This removes the @<num> part from the names, as we only have a single
image for each payload aspect (and only a single configuration) anyway.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
We can finally drop TPL_STACK, TPL_TEXT_BASE and TPL_MAX_SIZE off the
whitelist (this time it's really happening!) and migrate the setting
(only used on the RK3368-uQ7 so far) into Kconfig.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The RK3368 needs to have a different base-address and stack-pointer
for its TPL stage. Now that we want to do this via Kconfig, we need
to tick the appropriate 'TPL_NEEDS_...' boxes.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Now that TPL_STACK has been moved off the whitelist (ok, I'm lying:
the 'moving off the whitelist' part comes in once moveconfig
runs... which will be a few commits down the line) and added to
Kconfig, we need to test CONFIG_TPL_NEEDS_SEPARATE_STACK to see
whether the value from TPL_STACK should be used or whether we try to
inherit whatever SPL uses.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Let's clean up behind ourselves and move the (newly defined)
TPL_STACK, TPL_MAX_SIZE and TPL_TEXT_BASE into Kconfig. Given that
0x0 might be considered to be valid values for TPL_TEXT_BASE and
TPL_STACK, we need to introduce helper config options
("TPL_NEEDS_SEPARATE_...") to indicate that these symbols are used
(and not inherited from their SPL variants) for any given
target-platform.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Now that we have split up SPL_LDSCRIPT into a SPL and TPL variant and
have started to use the TPL-variant for the RK3368, it's time to clean
up behind ourselves: move both variants into Kconfig and remove them
from the whitelist.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The RK3368-uQ7 (codenamed 'Lion') is a micro-Qseven (40mm x 70mm,
MXM-230 edge connector compatible with the Qseven specification)
form-factor system-on-module based on the octo-core Rockchip RK3368.
It is designed, supported and manufactured by Theobroma Systems.
It provides the following features:
- 8x Cortex-A53 (in 2 clusters of 4 cores each)
- (on-module) up to 4GB of DDR3 memory
- (on-module) SPI-NOR flash
- (on-module) eMMC
- Gigabit Ethernet (with an on-module KSZ9031 PHY)
- USB
- HDMI
- MIPI-DSI/single-channel LVDS (muxed on the 'LVDS-A' pin-group)
- various 'slow' interfaces (e.g. UART, SPI, I2C, I2S, ...)
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
For the RK3368, we can reuse the SPI driver (although we'll have to
eventually investigate whether it can be merged with the
designware_spi.c driver) also used for the RK3288 and RK3399.
This adds the necessary compatible string to support the RK3368.
Note that the assumption that GPLL will be clocked at 594MHz is not
true for the RK3368, but this will not lead to incorrect functioning
(just to a lower-than-expected SPI operating frequency): this has been
documented in the driver, so it doesn't cause any headaches when
someone next needs to touch the clock code of this driver.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
With SPL and TPL support for the RK3368 in place, mark SPL and TPL as
supported from Kconfig for the RK3368. As this is primarily tested on
the RK3368-uQ7, we'll leave it to board's individual defconfig to
enable.
Also enable DEBUG_UART_BOARD_INIT for the RK3368, so we get output
during the early boot-up, as we turn on TPL and SPL.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Adds SPL support for the RK3368 (assuming that our TPL stage has
initialised DRAM and set up the memory firewall).
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
In order to reuse the support for the u-boot,spl-boot-order property
from the rk3399, we split it into a reusable module that can be
included by the SPL code for any of our boards.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
For full SPL support, including DRAM initialisation, we need a few
nodes from the DTS: this commit adds the DMC (DRAM controller) node,
the service_msch (memory scheduler) node and marks GRF, PMUGRF and CRU
as 'u-boot,dm-pre-reloc'. In addition to this, we also include the
dt-binding for the DMC to allow DTS files including this DTSI to refer
to the symbolic constants for the DDR3 bin and for the
memory-schedule.
Note that the DMC contains both the memory regions for the
(Designware) protocol controller as well as the DDR PHY.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This adds a DRAM controller driver for the RK3368 and places it in
drivers/ram/rockchip (where the other DM-enabled DRAM controller
drivers for rockchip devices should also be moved eventually).
At this stage, only the following feature-set is supported:
- DDR3
- 32-bit configuration (i.e. fully populated)
- dual-rank (i.e. no auto-detection of ranks)
- DDR3-1600K speed-bin
This driver expects to run from a TPL stage that will later return to
the RK3368 BROM. It communicates with later stages through the
os_reg2 in the pmugrf (i.e. using the same mechanism as Rockchip's DDR
init code).
Unlike other DMC drivers for RK32xx and RK33xx parts, the required
timings are calculated within the driver based on a target frequency
and a DDR3 speed-bin (only the DDR3-1600K speed-bin is support at this
time).
The RK3368 also has the DDRC0_CON0 (DDR ch. 0, control-register 0)
register for controlling the operation of its (single-channel) DRAM
controller in the GRF block. This provides for selecting DDR3, mobile
DDR modes, and control low-power operation.
As part of this change, DDRC0_CON0 is also added to the GRF structure
definition (at offset 0x600).
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Handling TPL and SPL in the Makefile for mach-rockchip was based on
nested if checks and/or if-else-if paths. This can be simplified and
made more readable by using $(SPL_TPL_) and by introducing
intermediate variables for the aggregation of SPL and TPL features.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The GMAC in the RK3368 once again is identical to the incarnation in
the RK3288 and the RK3399, except for where some of the configuration
and control registers are located in the GRF.
This adds the RK3368-specific logic necessary to reuse this driver.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
As SPI support may be useful in the boot-flow, this adds support for
configuring the SPI controller's clocks in the RK3368 clock driver.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
With the clock support in rk3368_clk_set_rate() conditionalized on
various feature definitions, 'priv' can remain unused (e.g. in the
SPL build when only MMC is enabled).
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
To enable the GMAC on the RK3368, we need to set up the clocking
appropriately to generate a tx_clk for the MAC.
This adds an implementation that implements the use of the <&ext_gmac>
clock (i.e. an external 125MHz clock for RGMII provided by the PHY).
This is the clock setup used by the boards currently supported by
U-Boot (i.e. Geekbox, Sheep and RK3368-uQ7).
This includes the change from commit
- rockchip: clk: rk3368: define GMAC_MUX_SEL_EXTCLK
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
As part of the DRAM initialisation process (running as part of the TPL
stage) on the RK3368, we need to set up the DRAM PLL.
This implements support for configuring the PLL to for 1200, 1332 or
1600 MHz (i.e. for DDR3-1200, DDR3-1333, DDR3-1600 operating modes).
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The original clock support for MMC/SD cards on the RK3368 suffered
from a tendency to select a divider less-or-equal to the the one
giving the requested clock-rate: this can lead to higher-than-expected
(or rather: higher than supported) clock rates for the MMC/SD
communiction.
This change rewrites the MMC/SD clock generation to:
* always generate a clock less-than-or-equal to the requested clock
* support reparenting among the CPLL, GPLL and OSC24M parents to
generate the highest clock that does not exceed the requested rate
In addition to this, the Linux DTS uses HCLK_MMC/HCLK_SDMMC instead of
SCLK_MMC/SCLK_SDMMC: to match this (and to ensure that clock setup
always works), we adjust the driver appropriately.
This includes the changes from:
- rockchip: clk: rk3368: convert MMC_PLL_SEL_* definitions to shifted-value form
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
On he RK3368, we need to temporarily disable security on the DMA
engines during TPL and SPL to allow the MMC host to DMA into DRAM. To
do so, we need to reset the two DMA engines, which in turn requires
the DMA1_SRST_REQ and DMA2_SRST_REQ constants to refer to the
appropriate bits in the CRU.
As the ATF correctly initialises security (and only leaves EL3 after
doing so), this can not pose a security issue.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
To implement a TPL stage (incl. its DRAM controller setup) for the
RK3368, we'll want to configure the DPLL (DRAM PLL).
This commit implements setting the DPLL (CLK_DDR) and provides PLL
configuration details for the common DRAM operating speeds found on
RK3368 boards.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The RK3368 has a somewhat temperamental BootROM (which I learned the
hard way) when it comes to reconfiguring the CPLL and GPLL (in fact,
experiments show that changing the GPLL broke things for me, while
changing the CPLL seems to be more benign). These should not be
modified by the SPL stage, if we intend to return to the BootROM for
chain booting the next stage.
This commit changes the clock initialisation to not change CPLL/GPLL
before returning to the BootROM (i.e. in TPL). As it's safe to change
these settings if we no longer intend to return to U-Boot, we'll run
the full PLL setup a little later (i.e. in SPL).
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
With the RK3368's limited TPL size, we'll want to use OF_PLATFDATA for
the SPL stage. This implements support for OF_PLATDATA in the clock
driver for the RK3368.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The RK3368 TRM recommends to configure the bandwith adjustment (CON2)
for PLLs to NF/2. This implements this for all reconfigurations of
PLLs and removes the 'has_bwadj' flag (as the RK3368 always has the
bandwidth-adjustment feature according to its manual).
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
To implement pinctrl support for the RK3368, we need to add the
bit-definitions to configure the IOMUX and tie these into the
pinctrl framework. This also adds the mapping from the IRQ# back
onto the periheral id for the SPI devices.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
There is no real reason to keep the bit-definitions for the IOMUX in
the grf header file (which defines the register layout of the GRF block):
these should only be used by our pinctrl driver (with the possible
exception of early debug-init code in TPL/SPL).
This moves the relevant definitions from the grf_rk3368.h header
into the pinctrl driver pinctrl_rk3368.c.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The RK3368 has two SD/MMC controllers that can be used from U-Boot
both during SPL and for booting an OS from the full bootloader stage.
While both are configured to (mostly) sensible settings from the BROM,
additional configuration for the MMC controller is needed to configure
it to 8bit mode.
This adds pinctrl support for the MMC controller.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
To add GMAC (Gigabit Ethernet) support (limited to RGMII only at this
point), we need support for additional pin-configuration. This commit
adds the pinctrl support for GMAC in RGMII mode:
* adds a PERIPH_ID_GMAC and the mapping from IRQ number to PERIPH_ID
* configures the RGMII pins
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
We will to drop device security temporarily (until the ATF initialises
it fully) from the TPL/SPL stage: this requires access to some
registers in the SGRF.
This adds the sgrf node to the rk3368.dtsi, so we can then bind a
syscon device onto it and access its memory ranges.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The RK3368 GRF header was still defines with a shifted-mask but with
non-shifted function selectors for the IOMUX defines. As the RK3368
support is still fresh enough to allow a quick change, we do this now
before having more code use this.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
In TPL we will need to configure security in the SGRF of the RK3368.
This change adds support for the SGRF as a syscon device, so we can
retrieve its address range through the syscon API in TPL (and can
avoid having to hard-code the address).
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The RK3368 has both a limited TPL size (just 0x7000 bytes) and the
added challenge of booting in AArch64, which increases the code size
for TPL (particularily when using the LP64 programming model). For
this reason we expect the RK3368 to always use OF_PLATDATA for its
TPL stage.
This change adds support for the MSCH, PMUGRF and GRF register regions
in syscon, which are necessary for initialising the RK3368's DRAM
controller.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
For the RK3368, we use a multi-stage boot-process consisting of the
following:
1. TPL: initalises DRAM, returns to boot-ROM (which then loads
the next stage and transfers control to it)
2. SPL: a full-features SPL stage including OF_CONTROL and FIT
image loading, which fetches the ATF, DTB and full U-Boot
and then transfers control to the ATF (using the BL31
parameter block to indicate the location of BL33/U-Boot)
3. ATF: sets up the secure world and exits to BL33 (i.e. a full
U-Boot) in the normal world
4. full U-Boot
TPL/SPL and the full U-Boot are built from this tree and need to
run from distinct text addresses and with distinct initial stack
pointer addresses.
This commit sets up the configuration to run:
- TPL from the SRAM at 0xff8c0000 (note that the first 0x1000
are reserved for use by the boot-ROM and contain the SP
when the TPL is entered)
- SPL from DRAM at 0x0
- U-Boot from DRAM at 0x200000
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The BootROM of the RK3368 Boot ROM does not initialise cntfrq_el0.
This change defines COUNTER_FREQUENCY, which is used by the AArch64 init
code in arch/arm/cpu/armv8/start.S to set up cntfrq_el0.
If the counter-frequency is not correctly set up, the calculation of
delays using the ARMv8 generic timer can not work correctly.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
On the RK3368 we use a TPL-stage similar to Rockchip's DDR init
(i.e. it initialises DRAM, leaves some info for the next stage and
returns to the BootROM). To allow compatibility with Rockchip's DDR
init code, we use the same register os_reg2 in pmugrf for passing
this info (i.e. DRAM size and configuration) between stages.
This change adds the definitions for os_reg[0] through os_reg[3] to
the pmugrf structure for the RK3368.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The RK3368 option in Kconfig referred to the RK3328 (copy-and-paste)
and had a few typos and unnecessarily used UTF-8 characters. While
fixing this, I also reformatted and further clarified the text
(e.g. made the grouping into a a big and little cluster of 4 cores
each explicit).
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The utility functions in sdram_common.c will be useful both for some
SPL implementations (and if unused, the linked will discard these
anyway) and for the full U-Boot stage.
This changes selects sdram_common.o through the $(SPL_TPL_) macro to
allow better control of its inclusion through the CONFIG_ROM,
CONFIG_SPL_RAM or CONFIG_TPL_RAM options.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
To simplify drivers/Makefile a bit when using TPL/SPL, we consistently
use the $(SPL_TPL_) macro to test for drivers that have separate
configuration symbols for the full U-boot, SPL and TPL stages.
Instead of explicitly repeating them in two separate if-guarded
sections of the Makefile, we can now simply list these options once.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
This adds the TPL_DRIVER_MISC_SUPPORT option to allow activation of
DRIVER_MISC_SUPPORT for devices that need it in the TPL stage.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
To allow for a finer-grained control of features for TPL and SPL
builds all modules/boot-methods/etc. need to be consistently selected
based on the $(SPL_TPL_) macros.
This allows splitting the associated config-options in Kconfig: we
don't split the Kconfig options here and now, as this should happen on
an as-needed basis, whenever someone needs a feature/boot-method/etc.
in their TPL.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
This splits the compilation of code modules for TPL and SPL for
OF_CONTROL (and related) features between TPL and SPL. The typical
use-case of this is a TPL stage that uses OF_PLATDATA at TPL and
provides full OF_CONTROL at SPL (e.g. on the RK3368).
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
As include/malloc.h already checks for SYS_MALLOC_SIMPLE using the
CONFIG_IS_ENABLED macro, we need to move to having separate entries
as we switch to fully separate configuration for SPL and TPL.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
For the bringup of the RK3368, we need to support TPL and SPL running
from different addresses... which requires both stages to use a
distinct TEXT_BASE.
This commit adds support for having a separate LDSCRIPT for TPL (which
is expected to make use of the TPL_MAX_SIZE define) and for having a
the option of defining TPL_TEXT_BASE and having the TPL stage linked
against this address.
Note that the handling of the TEXT_BASE is designed to not interfere
with the previous assumption that SPL_TEXT_BASE should be used for TPL
as well, unless TPL_TEXT_BASE is defined. For this reason, the test
in Makefile.spl uses the following (seemingly redundant checks):
1. looks for $(SPL_TPL_)TEXT_BASE
2. looks for SPL_TEXT_BASE (even when building in TPL)
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
To allow a TPL and SPL to run from different addresses/memories, we
need to split setup of the TPL and SPL stacks. To do so, we introduce
CONFIG_TPL_STACK (not listed in Kconfig) which can be used to override
the initial stack pointer for TPL.
To provide backward compatibility for existing boards, this is added
as an optional configuration item and the normal search order (i.e.
SPL_STACK, then SYS_STACK) apply if not defined.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
TPL builds today don't need to call into firmware or set up the MMU
(if this changes, it should be controlled through a config option
whether to include this or not), but include the needed support code
for this anyway. By moving these unused low-level functions into
seperate function-sections, the linker can garbage-collect the unused
sections.
Note that (if DM support is enabled), there will be a call to the
cache-flushing code from alloc_priv(...) in drivers/core/device.c.
This then add 52 bytes of binary size (an increase from 20589 to 20641
bytes) compared to completely removing this code.
Even for a feature-rich TPL (including DM support as for the RK3368),
this equates to a size difference of significantly more than 10% in
TPL binary size.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Even though there's now a TPL_DM configuration option, the spl logic
still checks for SPL_DM and thus does not pick up the proper config
option.
This introduces the use of CONFIG_IS_ENABLED(DM) in spl.c to always
pick up the desired configuration option instead of having a
hard-coded check for the SPL variant.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
For the RK3368, we want to use OF_PLATDATA in TPL, but full OF_CONTROL
in SPL: this requires the introduction of a new family of
configuration options to decouple SPL_OF_CONTROL and SPL_OF_PLATDATA
from TPL.
Consequently, Makefile.spl needs to be adjusted to test for these
configuration items through the $(SPL_TPL_) macro instead of
hard-coding the SPL variant.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
This change introduces TPL variants of the REGMAP and SYSCON config
options (i.e. TPL_REGMAP and TPL_SYSCON in analogy to SPL_REGMAP and
SPL_SYSCON) in preparation of a finer-grained feature selection for
building feature-rich TPL variants.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
SPL_REGMAP and SPL_SYSCON were marked as depending on DM, when a
stricter dependency of SPL_DM was possible. This commit makes the
prereq more specific.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
TPL_NAND_SUPPORT, TPL_SERIAL_SUPPORT, TPL_SPI_FLASH_SUPPORT and
TPL_SPI_SUPPORT refer to SPL in their help text. This fixes up
the description to correctly reference TPL.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The (upstream) changes to break up SYS_MALLOC_F_LEN for the full
U-Boot and the SPL stage, break TPL (if simple malloc is enabled in
TPL).
This adds support for a TPL-variant of SYS_MALLOC_F_LEN:
- adds TPL_SYS_MALLOC_F_LEN
- rewrites a test for CONFIG_SPL_SYS_MALLOC_F_LEN to access
CONFIG_VAL(SYS_MALLOC_F_LEN)
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
With the finer-grained control over LIBCOMMON_SUPPORT for TPL/SPL (i.e.
with the newly introduced distinction between TPL_LIBCOMMON_SUPPORT and
SPL_LIBCOMMON_SUPPORT), we can simplify the #ifdef-check to simply use
CONFIG_IS_ENABELD.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
[fixed up to use 'puts' and LIBCOMMON:]
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
The back-to-bootrom option is rather unfortunately named
CONFIG_ROCKCHIP_SPL_BACK_TO_BOOTROM
instead of
CONFIG_SPL_ROCKCHIP_BACK_TO_BOOTROM
To make is selectable through CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BOOTROM),
we need to rename it. At the same time, we introduce a TPL_ variant of
the option to give us finer-grained control over when it should be used.
This change is motivated by our RK3368 boot process, which returns to
the boot ROM only from the TPL stage, but not from the SPL stage.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
[added fix-up for evb-rk3229_defconfig and phycore-rk3288_defconfig:]
[fixed inverted CONFIG_IS_ENABLED test for rk3288:]
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
include/configs/rock.h: undef
The back-to-bootrom support for Rockchip is equivalent to an
(assembly) implementation of setjmp/longjmp (i.e. it saves the
stack-pointer, link-register and callee-saved registers). Up until
now, this had only been implemented for AArch32 (i.e. ARMv7 or older),
which puts the new ARMv8 devices (which boot in AArch64 mode) at a
slight disadvantage.
To allow use of the 'back-to-bootrom' feature on new devices (e.g. the
RK3368), this commit adds an implementation for AArch64.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
On the RK3368, we want our TPL to use the 'return to bootrom' boot
method (to have the bootrom load up the SPL stage) and then continue
with different boot methods (MMC, SPI, etc.) from SPL.
This adds the config option needed to control the availabily of the
'return to bootrom' boot-method separately for the TPL stage.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Some devices (e.g. the RK3368) have only limited SRAM, but provide
support for loading the next boot stage after our SPL performs basic
setup (e.g. DRAM).
For target systems like these, we add a boot device BOOTROM that will
invoke a board-specific hook to return to the bootrom (if supported).
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The OMAP3_SPI driver can work with or without DM_SPI. Moving this
outside of the #if DM_SPI section allows us to include it on boards
that don't support DM_SPI yet.
Signed-off-by: Adam Ford <aford173@gmail.com>
((readl(&emif4_base->sdram_iodft_tlgc) & (1<<10)) == 0x01)
is always false.
This does not match the comment
/*Wait till that bit clears*/
The problem was indicated by cppcheck.
I do not have the hardware to test if the code change below
leads to a correct system behavior.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Fixes: 00bbe96eba ("arm: omap: Unify get_device_type() function")
The control status register value is embedded in a structure somewhere
in SRAM, with the last refactoring effort. This patch allows OMAP3 EVM
(TMDSEVM3530) to boot again using the known control register base and
offset for 'readl', for the OMAP34XX case.
Signed-off-by: Derald D. Woods <woods.technical@gmail.com>
[trini: Change to if/else, add comment about it.]
Signed-off-by: Tom Rini <trini@konsulko.com>
This converts the following to Kconfig:
CONFIG_NAND
Signed-off-by: Adam Ford <aford173@gmail.com>
[trini: Sync up a few more, add imply's]
Signed-off-by: Tom Rini <trini@konsulko.com>
We should use constant EFI_PAGE_SIZE instead of 4096 where the
coding relies on 4096 being EFI_PAGE_SIZE.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
We should be consistent in the way we calculate page sizes.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
This patch brings the OMAP3 EVM to a bootable state, on master, as of
v2017.09-rc1.
Signed-off-by: Derald D. Woods <woods.technical@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
This converts the following to Kconfig:
CONFIG_CMD_SPL
Note that trats does not actually use SPL, so this option can no-longer be
set.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
This converts the following to Kconfig:
CONFIG_CMD_SCSI
Also update the Makefile to use CONFIG_CMD_SCSI instead of CONFIG_SCSI to
enable the command, fixing an earlier error.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
[trini: Rework to default y if SCSI, drop cl-som-am57x which did not use
CMD_SCSI for real]
Signed-off-by: Tom Rini <trini@konsulko.com>
Convert this option and enable it in sandbox. Also correct a bug which
was introduced with the block-device driver model conversion.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
This command is not used by any board. It also looks quite similar to the
'iod' and 'iow' commands which use the correct I/O macros.
Drop it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
This option enables the 'pci enum' command. It is only enabled by a few
board and these have not yet been converted to driver model, which always
enables this command. It seems easiest to just remove this option.
The affected boards can be converted to use driver model for PCI if
needed.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
It does not seem worth having an option to enable another sub-command in
this legacy driver. Drop this option so that the sub-command is always
available.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Synced ohci0 and ehci0 nodes from Linux for sun50i-a64.dtsi
Here is the Linux last merge tag details:
Merge: 0e91f43d e5770b7
Author: Stephen Rothwell <sfr@canb.auug.org.au>
Date: Fri Jun 9 14:59:55 2017 +1000
Merge remote-tracking branch 'staging/staging-next'
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Traditional KS2 devices supported NAND via the AEMIF peripheral. However,
66AK2G doesn't use the AEMIF but rather the GPMC for NAND. Therefore,
clarify some statements to indicate only certain devices have AEMIF and
in other places just say NAND instead of AEMIF NAND
Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
Acked-by: Roger Quadros <rogerq@ti.com>
commit f1896c45cb: spl: make SPL and normal u-boot stage use independent SYS_MALLOC_F_LEN
introduced independent SYS_MALLOC_F_LEN for SPL and U-Boot.
Use it on the smartweb board, as above commit broke
the smartweb board.
Signed-off-by: Heiko Schocher <hs@denx.de>
The 512 MB DDR version of SOM's use CS0 and CS1. CS1 is not correctly
setup in the pin muxing. This causes erratic behavior on suspend/resume
This fix has been tested on both 256 and 512 MB DDR versions.
Signed-off-by: Adam Ford <aford173@gmail.com>
The 'tests' target will run sandbox, sandbox_spl and sandbox_flattree in
test.py and in the case of sandbox_spl ensure that we just run the
specific tests for that build. Update our matrix to perform similar
test.py runs.
Signed-off-by: Tom Rini <trini@konsulko.com>
uclass_first_device() returns 0 if there is no device, but error if
there is a device that failed to probe.
Signed-off-by: Rob Clark <robdclark@gmail.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
The Ethernet function is enabled in the Orange Pi PC2 device tree and
defconfig, however, CONFIG_MACPWR is not properly set, which left the
PHY being disabled when booting, which makes the Ethernet function not
usable.
Add the proper value of this option in the PC2 defconfig.
Fixes: e7bd15ea15 ("sunxi: Add OrangePi PC 2 initial support")
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Acked-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
The PRCM of H3/H5 SoCs have a secure/non-secure switch, which controls
the access to some clock/power related registers in PRCM.
Current Linux kernel will access the CPUS (AR100) clock in the PRCM
block, so the PRCM should be switched to non-secure.
Add code to switch the PRCM to non-secure.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Tested-by: Chen-Yu Tsai <wens@csie.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Some new Allwinner SoCs' PRCM has a secure switch register, which
controls the access to some clock and power registers in PRCM block.
Add the definition of this register and its bits in the PRCM header
file.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Tested-by: Chen-Yu Tsai <wens@csie.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Using `fel-boot-lima-memtester-on-orange-pi-pc 672` on an Orange Pi
without heatsink results in the following error after a few minutes:
WRITE FAILURE: 0x00200000 != 0xffdfffff at offset 0x0137f47c (bitflip).
Also, the constructor repository (github/orangepi-xunlong) seems to
contain that 624 Mhz clock speed in its u-boot fork. It may be that 672
Mhz is the advertized overclocked speed.
According to http://linux-sunxi.org/Orange_Pi_PC#DRAM_clock_speed_limit
it may be worth decreasing that value with other Orange Pi boards.
See also e7d6aa0b74.
Signed-off-by: Clément Bœsch <u@pkh.me>
[Add s-o-b line]
Signed-off-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
The node name for the power seq pin is mmc2@0 like the mmc2_pins_a one.
This makes the original node (mmc2_pins_a) scrapped out of the dtb and
result in a unusable eMMC if U-Boot didn't configured the pins to the
correct functions.
Signed-off-by: Emmanuel Vadot <manu@bidouilliste.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Spotted this debugging OpenBSD's bootloader in qemu. (Wouldn't really
fix anything, the problem was not having any disks, but we should
probably return the correct error code.)
Signed-off-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
efi_locate_handle is called internally so it should not be
marked as EFIAPI.
The external function is efi_locate_handle_ext.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Rob Clark <robdclark@gmail.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
Allow sending restart conditions upon direction change as this is
required by some chips.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Heiko Schocher <hs@denx.de>
Reviewed-by: Heiko Schocher <hs@denxx.de>
TX drain in transmit procedure could cause issues due
to race between drain procedure and transmition of descriptor
between AGGR TXQ and physical TXQ.
TXQ will be cleared before moving to Linux by stop procedure.
Signed-off-by: Stefan Chulski <stefanc@marvell.com>
Tested-by: iSoC Platform CI <ykjenk@marvell.com>
Reviewed-by: Nadav Haklai <nadavh@marvell.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Remove IRQ configuration from U-Boot PP driver.
U-Boot don't use interrupts and configuration of IRQ in U-Boot
caused crashes in Linux shared interrupt mode.
Also interrupt use is redundant in RX routine since a single RX
queue is used.
Signed-off-by: Stefan Chulski <stefanc@marvell.com>
Tested-by: iSoC Platform CI <ykjenk@marvell.com>
Reviewed-by: Nadav Haklai <nadavh@marvell.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Stefan Roese <sr@denx.de>
U-boot use single physical tx queue with size 16 descriptors.
So aggregated tx queue size should be equal to physical tx queue
and cpu descriptor chunk(number of descriptors delivered from
physical tx queue to aggregated tx queue by one chunk) shouldn't be
larger than physical tx queue.
Fix:
Set AGGR_TXQ and CPU_DESC_CHUNK to be 16 descriptors, same as
physical TXQ.
Signed-off-by: Stefan Chulski <stefanc@marvell.com>
Tested-by: iSoC Platform CI <ykjenk@marvell.com>
Reviewed-by: Nadav Haklai <nadavh@marvell.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Issue:
BM counters were overrun by probe that called per Network interface and
caused release of wrong number of buffers during remove procedure.
Fix:
Use probe_done and num_ports to call init and remove procedure
once per communication controller.
Signed-off-by: Stefan Chulski <stefanc@marvell.com>
Tested-by: iSoC Platform CI <ykjenk@marvell.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch enables padding of packets shorter than 64B in TX(set by default).
Disabling of padding causes crashes on MACCIATO board.
Signed-off-by: Stefan Chulski <stefanc@marvell.com>
Tested-by: iSoC Platform CI <ykjenk@marvell.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Stefan Roese <sr@denx.de>
A8K marvell SoC has two South Bridge communication controllers(CP0 and CP1).
Each communication controller has packet processor ports and MDIO.
On MACHIATOBin board ports from CP1 are connected to mdio on CP0.
Issue:
Wrong base address is assigned to MDIO interface during probe.
Fix:
Get MDIO address from PHY handler parent base address.
This should be refined in the future when MDIO driver is implemented.
Signed-off-by: Stefan Chulski <stefanc@marvell.com>
Tested-by: iSoC Platform CI <ykjenk@marvell.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch add GPIO configuration support in mvpp2x driver.
Driver will handle 10G SFP gpio reset and SFP TX disable. GPIO pins should
be set in device tree.
Signed-off-by: Stefan Chulski <stefanc@marvell.com>
Tested-by: iSoC Platform CI <ykjenk@marvell.com>
Reviewed-by: Kostya Porotchkin <kostap@marvell.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Stefan Roese <sr@denx.de>
The implementation of function set_pcie_ns_access() uses a wrong
argument. The structure array ns_dev has a member 'ind' which is
initialized by CSU_CSLX_*. It should use the 'ind' directly to
address the PCIe's CSL register (CSL_base + CSU_CSLX_PCIE*).
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
[YS: Revise commit message]
Reviewed-by: York Sun <york.sun@nxp.com>
IFC and QSPI are muxed on board. Add fsl_fdt_fixup_flash() to disable
IFC node in dts if QSPI is enabled, or disable QSPI node in dts if
otherwise.
Signed-off-by: Santan Kumar <santan.kumar@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
[YS: Revise commit message]
Reviewed-by: York Sun <york.sun@nxp.com>
We shouldn't always change the status to okay. There could be
situations that the esdhc is intentionally disabled in the device
tree.
Signed-off-by: Li Yang <leoyang.li@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
This bug is brought by the commit 3d8553f0a3 (pci: layerscape: add
LS2088A series SoC pcie support), which only updated cfg_res.start
and did not update the .end field. This causes fdt_resource_size()
getting wrong value when calculate the cfg1 space address.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
[YS: Revise subject and commit message]
Reviewed-by: York Sun <york.sun@nxp.com>
Function enable_layerscape_ns_access() is alreayd called soc-wide.
Remove duplicated calling from individual boards.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
[YS: Add commit message]
Reviewed-by: York Sun <york.sun@nxp.com>
It is derived from Platform clock instead of Platform PLL frequency.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Function config_board_mux() reads env variable 'hwconfig' which is
only available after relocation for QSPI boot. Move calling
config_board_mux() to misc_init_r().
Signed-off-by: Santan Kumar <santan.kumar@nxp.com>
[YS: Revise commit message]
Reviewed-by: York Sun <york.sun@nxp.com>
Smart voltage translator is removed from LS2080ARDB/LS2088ARDB
RevF boards. It is only used on LS2081ARDB. Programming GPIO
is only required for LS2081ARDB.
Signed-off-by: Santan Kumar <santan.kumar@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
[YS: Revise commit message]
Reviewed-by: York Sun <york.sun@nxp.com>
Update the default core frequency to 1800MHZ for best performance under
SD boot and eMMC boot.
Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Commit 4483b7eb added variable vqmmc_dev but only uses it under
CONFIG_DM_REGULATOR. Add the same macro to variable declaration to
get rid of compiling warning.
Signed-off-by: York Sun <york.sun@nxp.com>
The driver is for all boards 24XX and up, so let's eliminate the
extra option called CONFIG_SYS_I2C_OMAP34XX since the driver checks
for CONFIG_OMAP34XX we don't need CONFIG_SYS_I2C_OMAP34XX.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Add missing probe function to the device driver to active a device.
Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
This patch adds the common header include file theadorable-x86-common.h
for the theadorable-x86 targets to define all common options and the
default environment.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This patch adds the infrastructure to define different config headers
with different configurations and default environment for the baseboards
that can now be selected via Kconfig. The new configuration for the
theadorable-x86-conga-qa3-e3845 is also added. Also the new defconfig
file for this new target is added.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This patch adds the infrastructure to define different config headers
with different configurations and default environment for the baseboards
that can now be selected via Kconfig. The new configuration for the
theadorable-x86-dfi-bt700 is also added.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
When CONFIG_EFI_PARTITION is not set, the following build error is
seen in arch/x86/lib/acpi_s3.c:
error: expected declaration specifiers or '...' before '*' token
static void asmlinkage (*acpi_do_wakeup)(void *vector) = (void*)WAKEUP_BASE;
This is actually caused by missing asmlinkage declaration, but with
CONFIG_EFI_PARTITION on, the declaration comes from part.h which
is included from common.h.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
This is defined twice in the same file, with the same value, likely
because of some patch merge issue. Pick the uglier one and nuke it.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Tom Rini <trini@konsulko.com>
Signed-off-by: Stefan Roese <sr@denx.de>
The I2C reading in the PEX vs SATA detection code often fails on the
first try. Try three times, as the code for EEPROM reading does.
Signed-off-by: Marek Behun <marek.behun@nic.cz>
Signed-off-by: Stefan Roese <sr@denx.de>
Neither new design uses ISA bus, nor does any U-Boot codes use these
codes. Remove them.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This adds support for Macronix flash MX25U6435F (device ID 0xc22537).
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Added the AFE (Analog Front End) settings for stability to the
Broadcom Cygnus phy. This improves the time take to perform
auto negotiation.
Signed-off-by: Arun Parameswaran <arun.parameswaran@broadcom.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
These boards will now use the ksz90x1 driver instead of the mess in
ksz8xxx. This change is needed before the two drivers can be fully
separated.
Signed-off-by: Alexandru Gagniuc <alex.g@adaptrum.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
The KS8721BL and KSZ9021 PHYs are software-incompatible, yet they
share the same ID. Drivers for bothe PHYs cannot safely coexist, so
the solution was to use #ifdefs to select between the two drivers.
As a result KSZ9031, which has a unique ID, is now caught in the
crossfire. Unless CONFIG_PHY_MICREL_KSZ9031 is defined, the KSZ9031
will not function properly, as some essential configuration code is
ifdef'd-out.
To prevent such situations, move the KSZ9000 drivers to a separate
file, and place them under a separate Kconfig option. While it is
possible to enable both KSZ8000 and KSZ9000 drivers at the same time,
the assumption is that it is highly unlikely for a system to contain
both a KSZ8000 and a KSZ9000 PHY, and that only one of the drivers
will be enabled at any given time.
Signed-off-by: Alexandru Gagniuc <alex.g@adaptrum.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
For strncpy() select a minimal string length of destination and source
strings, here DEFAULT_NAME_LEN is preferable to MAX_LEN.
Due to the NUL-terminated contents of default_string the change is
a noop, however it removes a compilation warning if SH2/3/4 platform
specific strncpy() function is used:
In file included from include/linux/string.h:21:0,
from include/common.h:28,
from net/tftp.c:9:
net/tftp.c: In function 'tftp_start':
arch/sh/include/asm/string.h:52:42: warning: array subscript is above array bounds [-Warray-bounds]
: "0" (__dest), "1" (__src), "r" (__src+__n)
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
After upgrading to GCC 7.1, the duplicate const specifies in the
r8152 driver trigger the following build warnings with buildman
(observed on a 'buildman rockchip' test)::
../drivers/usb/eth/r8152.c:62:35: warning: duplicate 'const' declaration specifier [-Wduplicate-decl-specifier]
static const struct r8152_version const r8152_versions[] = {
^~~~~
This commit fixes these by removing the duplicate 'const' specifier
from the declarations.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Previously seeded by obtaining mac addr from env. If mac addr was
never set, rand would output 0. This fix obtains the mac addr
from driver instead.
Signed-off-by: Jimmy Du <jimmy.du@ni.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
To compatible with different rockchip soc, we split the mipi dirver into
common and soc specific parts, and all the soc share the common
functions from common driver part.
Signed-off-by: Eric Gao <eric.gao@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
[agust: fix build breakage and warnings]
Signed-off-by: Anatolij Gustschin <agust@denx.de>
The environment has pretty much nothing to do with just "PPC", so
rename the macros to just __UBOOT_ENV_SECTION__ which is more
readable.
In addition, only a single macro is needed: the environment now goes
either to the default section (USE_HOSTCC is defined) or in the .text
section.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
CONFIG_SYS_USE_PPCENV is no longer used anywhere. It was used to put
the environment in the special .ppcenv section, but the last
architecture using this section (SuperH) has been changed to not use
it.
Therefore, this commit drops support for CONFIG_SYS_USE_PPCENV
entirely. We only handle two cases:
- We're building the host tool tools/envcrc, in which case the
environment is place with no special section attribute (so it
depends up in .data)
- We're building U-Boot itself, in which case the environnement is
placed in the .text section.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
This converts the following to Kconfig:
CONFIG_SYS_TEXT_BASE
The includes, whitelist, etc. were left for now but I don't get any
build errors or warnings on the omap3_logic_defconfig or
am3517_evm_defconfig builds I tried.
Signed-off-by: Adam Ford <aford173@gmail.com>
Add the dts files to support deivce tree, update the configuration
files to support the device tree and driver model. The peripheral
clock and pins configuration are handled by the clock and the pinctrl
drivers respectively.
Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add the dts files to support deivce tree, update the configuration
files to support the device tree and driver model. The peripheral
clock and pins configuration are handled by the clock and the pinctrl
drivers respectively.
Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add the dts files to support deivce tree, update the configuration
files to support the device tree and driver model. The peripheral
clock and pins configuration are handled by the clock and the pinctrl
drivers respectively.
Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add the dts files to support deivce tree, update the configuration
files to support the device tree and driver model. The peripheral
clock and pins configuration are handled by the clock and the pinctrl
drivers respectively.
Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Update the configuration files to support the device tree and driver
model. The peripheral clock and pins configuration are handled by
the clock and the pinctrl drivers respectively.
Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
To support driver model and device tree, use the SPI-flash-based
AT45xxx DataFlash driver, DataFlash is a kind of SPI flash.
Instead of ATMEL_DATAFLASH_SPI DataFlash older driver that will
be removed in the future.
Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
To support driver model and device tree, use the SPI-flash-based
AT45xxx DataFlash driver, DataFlash is a kind of SPI flash.
Instead of ATMEL_DATAFLASH_SPI DataFlash older driver that will
be removed in the future.
Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
To support driver model and device tree, use the SPI-flash-based
AT45xxx DataFlash driver, DataFlash is a kind of SPI flash.
Instead of ATMEL_DATAFLASH_SPI DataFlash older driver that will
be removed in the future.
Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add the dts files to support deivce tree, update the configuration
files to support the device tree and driver model. The peripheral
clock and pins configuration are handled by the clock and the pinctrl
drivers respectively.
Enable the early debug UART to debug problems when an ICE or other
debug mechanism is not available.
Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Strings read from devices may sometimes fail to be
NULL-terminated. The functions in lib/string.c are subject to
failure in this case. Protect against observed failures in
set_gpt_info() by switching to length-checking variants with a length
limit of the maximum possible partition table length. At the same
time, add a few checks for NULL string pointers.
Here is an example as observed in sandbox under GDB:
=> gpt verify host 0 $partitions
Program received signal SIGSEGV, Segmentation fault.
0x0000000000477747 in strlen (s=0x0) at lib/string.c:267
267 for (sc = s; *sc != '\0'; ++sc)
(gdb) bt
#0 0x0000000000477747 in strlen (s=0x0) at lib/string.c:267
#1 0x00000000004140b2 in set_gpt_info (str_part=<optimized out>,
str_disk_guid=str_disk_guid@entry=0x7fffffffdbe8, partitions=partitions@entry=0x7fffffffdbd8,
parts_count=parts_count@entry=0x7fffffffdbcf "", dev_desc=<optimized out>) at cmd/gpt.c:415
#2 0x00000000004145b9 in gpt_verify (str_part=<optimized out>, blk_dev_desc=0x7fffef09a9d0) at cmd/gpt.c:580
#3 do_gpt (cmdtp=<optimized out>, flag=<optimized out>, argc=<optimized out>, argv=0x7fffef09a8f0)
at cmd/gpt.c:783
#4 0x00000000004295b0 in cmd_call (argv=0x7fffef09a8f0, argc=0x5, flag=<optimized out>,
cmdtp=0x714e20 <_u_boot_list_2_cmd_2_gpt>) at common/command.c:500
#5 cmd_process (flag=<optimized out>, argc=0x5, argv=0x7fffef09a8f0,
repeatable=repeatable@entry=0x726c04 <flag_repeat>, ticks=ticks@entry=0x0) at common/command.c:539
Suggested-by: Lothar Waßmann <LW@karo-electronics.de>
Signed-off-by: Alison Chaiken <alison@peloton-tech.com>
This patch provides support in u-boot for renaming GPT
partitions. The renaming is accomplished via new 'gpt swap'
and 'gpt rename' commands.
The 'swap' mode returns an error if no matching partition names
are found, or if the number of partitions with one name does not equal
the number with the second name. The 'rename' variant always
succeeds as long as a partition with the provided number exists.
Rewriting the partition table has the side-effect that all partitions
end up with "msftdata" flag set. The reason is that partition type
PARTITION_BASIC_DATA_GUID is hard-coded in the gpt_fill_pte()
function. This does not appear to cause any harm.
Signed-off-by: Alison Chaiken <alison@peloton-tech.com>
Make the partition table available for modification by reading it from
the user-specified device into a linked list. Provide an accessor
function for command-line testing.
Signed-off-by: Alison Chaiken <alison@peloton-tech.com>
[trini: Make this depend on CMD_GPT_RENAME, as it is the user of this
code]
Signed-off-by: Tom Rini <trini@konsulko.com>
In order to read the GPT, modify the partition name strings, and then
write out a new GPT, the disk GUID is needed. While there is an
existing accessor for the partition UUIDs, there is none yet for the
disk GUID.
Changes since v6: none.
Signed-off-by: Alison Chaiken <alison@peloton-tech.com>
Move MAX_SEARCH_PARTITIONS to part.h so that functions in cmd
directory can find it. At the same time, increase the value to
64 since some operating systems use many, and the resources
consumed by a larger value are minimal.
Changes since v6: none.
Signed-off-by: Alison Chaiken <alison@peloton-tech.com>
Make minor changes to README.gpt and sandbox_defconfig to support
testing of the gpt command's functionality in the sandbox.
Changes since v6: none.
Signed-off-by: Alison Chaiken <alison@peloton-tech.com>
The existing partitions-list parsing in cmd/gpt.c passes a value
from gpt_default() to set_gpt_info() that README.gpt suggests
should begin with 'partitions='. Partition-list strings should
in fact begin with 'uuid_disk', as otherwise the call from
set_gpt_info() to extract_val() to find 'uuid_disk' will fail.
Change README.gpt accordingly.
Changes since v6: none.
Signed-off-by: Alison Chaiken <alison@peloton-tech.com>
With the changes to fdt_get_base_address() we need to modify the logic
in ft_verify_fdt() for how we check the validity of the CCSR address.
Tested-on: qemu-ppce500 -M mpc8544ds
Fixes: 336a44877a ("fdt: Correct fdt_get_base_address()")
Cc: York Sun <york.sun@nxp.com>
Cc: Wolfgang Denk <wd@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
The logic of what fdt_get_base_address() will search for and return has
changed. Rework get_phys_ccsrbar_addr_early() to perform the logic that
fdt_get_base_address used to perform.
Fixes: 336a44877a ("fdt: Correct fdt_get_base_address()")
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Alexander Graf <agraf@suse.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
ahci_probe_scsi() now takes a 'base' argument, and there is an API
that prepares base address for us: ahci_probe_scsi_pci().
Reported-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Since we now have clock driver on the RCar Gen3 , obtain the clock
configuration using the clock framework functions. In case this
fails, fall back to the original code for pulling the clock config
directly out of OF.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Convert the SH Serial to Kconfig using tools/moveconfig.py tool
and a bit of manual adjustment to cater for failed conversions.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Add clock driver for the RCar Gen3 R8A7795 and R8A7796 SoCs .
This driver allows reading out the clock configuration set by
previous boot stages and enabling and disabling clock using
the MSTP registers. Setting clock is not supported thus far.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Import the RCar Gen3 DTS and headers from upstream Linux kernel v4.12-rc6,
commit 6f7da290413ba713f0cdd9ff1a2a9bb129ef4f6c . This includes both M3
and H3 ULCB and Salvator-X boards.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Allow pasting extra long lines into the U-Boot console on RCar Gen3.
This is OK since we have plenty of resources and it's convenient.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Add support for Phytec pfla02, equipped with NAND.
CPU: Freescale i.MX6Q rev1.5 996 MHz (running at 792 MHz)
CPU: Automotive temperature grade (-40C to 125C) at 31C
Reset cause: POR
I2C: ready
DRAM: 1 GiB
NAND: 2048 MiB
MMC: FSL_SDHC: 0, FSL_SDHC: 1
SF: Detected n25q128 with page size 256 Bytes, erase size 64 KiB, total
16 MiB
In: serial
Out: serial
Err: serial
Net: FEC [PRIME]
Hit any key to stop autoboot: 0
Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Stefan Christ <s.christ@phytec.de>
CC: Stefan Müller-Klieser <S.Mueller-Klieser@phytec.de>
CC: Christian Hemp <C.Hemp@phytec.de>
strncat(a, b, c) appends a maximum of c characters plus the 0 byte
to a.
In board_init we first write 4 characters plus 0 byte to version.
So only ZYNQMP_VERSION_SIZE - 5 additional characters fit into
version.
The problem was indicated by cppcheck.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Modify chip_id() routine such that to handle based on
the current el. Also make it available even if FPGA is
not enabled in system such it can be used always.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This patch makes chip_id() as a global routine so that
it can be used in other places as required.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This patch modifies the chip_id routine to get either idcode or
silicon version based on the argument received.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Not using board revision is causing confusion about which board is
supported and tested. Mark dts files exactly with board revision which
was tested. When new board revision arives it can be symlink if SW view
is the same. Also add -revX suffix to compatible string because user space
tools are parsing this string and can change behavior depends of board
revision.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Remove incorrect code of writing to system timestamp
counter registers. This register writes does nothing
and can be removed.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Newer psu_init_gpl.c/h contain clock setup. Detect if
reference clock is active. If yes, skip timer setup.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Mask should start from the first bit - using 0xe is just wrong.
3bits are used that's why 0x7 mask is correct.
This patch is fixing silicon ID code detection. Previous behavior was
that bit0 was completely ignored.
Issue was found on 2eg chip detection.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
There is a need to include psu_init also in mini u-boot configuration
that's why handle psu_init via Kconfig property.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
For some mini platforms there could be a need to include psu_init.
That's why move it to board file instead of spl only file.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This patch removes ifdef around mmio read and write rotuines
and make them a single routine by checking the current el.
This patch helps to remove ifdef around invoke_smc as well.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
TCM on ZynqMP needs to be intialized in a sequence
and this patch provides a global routine to perform
this as per requirement.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This patch provides an option to include OCM and TCM memory
into MMU table with corresponding memory attributes.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Dont use local temporary buffer for printing out the
info instead use directly from memroy. This fixes the
issue of stack corruprion due to local buffer overflow.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
These macros and one variable is not used anywhere that's why
they should be removed.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Dont panic incase of mmio write/read failures instead return
error and let the peripheral driver take care of clock get
and set failures.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add support for CCF, this CCF reads the ref clocks
from dt and checks all the required clock control
registers for its source , divisors and calculates
the clock from them. This supports clock and set
functions.
Panic when read/write fails.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Make reserve_mmu a weak so that it provides an option
to customize this routine as per platform need
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The Z-Turn board is a low cost development board based on the
Xilinx Zynq SoC. While it's powerful and quite versatile, it
so far lacked upstream support.
This patch adds basic support for the Z-Turn. It does however
for now miss enablement for MIO51 reset which means that USB
and ethernet don't work. For that either FSBL or SPL need to
be adjusted. The SPL part will follow later.
Signed-off-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Distro boot allows devices to boot using standardized boot methods by
default. This can be very handy for distributions that want to run on
different platforms.
This patch moves the zynq platform to use its old, zynq specific boot
method first and then fall back to distro boot. That way supporting
Linux distributions like openSUSE is much easier.
Signed-off-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
When using EFI_LOADER, we add a few special sections for runtime code and
data which get relocated on demand when executing a target OS.
These runtime structures need to get annotated properly in the linker script.
While we do that properly in the generic one, we missed out on the zynq
specific linker script.
This patch adds the EFI runtime section annotations into the zynq linker script
so that the efi loader code actually works on that platform.
Signed-off-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Enable validation of boot.scr script prior to its execution dependent
on "secureboot" flag in environment. Also enable "secureboot=y"
flag in environment for ARM based platforms instead of bootcmd.
Signed-off-by: Vinitha Pillai <vinitha.pillai@nxp.com>
Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Include common config_distro_defaults.h and config_distro_bootcmd.h
for u-boot enviroments to support automatical distro boot which
scan boot.scr from external storage devices(e.g. SD/USB/SATA/SCSI disk)
and execute autoboot script. Tested on ls2088ardb with automatically
boot Ubuntu from SD card or USB disk, if it fails to detect external
storage disk, fall back to nor/qspi boot.
Signed-off-by: Zhang Ying-22455 <ying.zhang22455@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Enable validation of boot.scr script prior to its execution dependent
on "secureboot" flag in environment. Disable fall back option to
qspi boot in case of secure boot. Also enable "secureboot=y" flag
in environment for ARM based platforms instead of bootcmd.
Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Tested-by: Vinitha Pillai <vinitha.pillai@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Enable validation of boot.scr script prior to its execution dependent
on "secureboot" flag in environment. Disable fall back option to
qspi boot in case of secure boot. Also enable "secureboot=y" flag
in environment for ARM based platforms instead of bootcmd.
Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Tested-by: Vinitha Pillai <vinitha.pillai@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Enable validation of boot.scr script prior to its execution dependent
on "secureboot" flag in environment. Disable fall back option to
nor/qspi boot in case of secure boot. Also enable "secureboot=y"
flag in environment for ARM based platforms instead of bootcmd.
Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Tested-by: Vinitha Pillai <vinitha.pillai@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Tested on ls1046ardb with automatically boot Ubuntu from SD card or
USB disk, if it fails to detect external storage disk, fall back to
qspi boot.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Include common config_distro_defaults.h and config_distro_bootcmd.h
for u-boot enviroments to support automatical distro boot which
scan boot.scr from external storage devices(e.g. SD/USB/SATA/SCSI disk)
and execute autoboot script. Tested on ls1043ardb with automatically
boot Ubuntu from SD card or USB disk, if it fails to detect external
storage disk, fall back to nor/qspi boot.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
As per new memory layout, Update env offset
from 0x200000 to 0x300000
Signed-off-by: Santan Kumar <santan.kumar@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
The duplicate definitions for IH_ARCH_ARM and IH_ARCH_ARM64 are removed.
The definitions in <image.h> are used.
According to this modification, the comparison between os arch and cpu
arch is done in C programming instead of ASM programming.
Signed-off-by: Alison Wang <alison.wang@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Pet the watchdog once upon each command call (qspi_xfer) and during
each loop iteration in several commands.
This fixes a watchdog reset especially during erase command.
Signed-off-by: Alexander Stein <alexander.stein@systec-electronic.com>
Reviewed-by: York Sun <york.sun@nxp.com>
This patch includes common config_distro_defaults.h and
config_distro_bootcmd.h for u-boot enviroments to support distro boot
which automatically scan boot.scr from storage devices(e.g.
SD/USB/SATA/SCSI disk) and execute autoboot script on LS1021ATWR board.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
Signed-off-by: Alison Wang <alison.wang@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
After MMC is converted to DM, convert to use DM SCSI as well for all
x86 boards and imply BLK for both MMC and SCSI drivers.
CONFIG_SCSI_DEV_LIST is no longer used. Clean them up.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Convert the pci_mmc driver over to driver model and migrate all x86 boards
that use it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: remove DM_MMC from edison_defconfig]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
The value of uma_memory_size depends on an undefined value
from the stack. The value of uma_memory_size is changed but
never used.
So simply remove this superfluous code.
The problem was indicated by cppcheck.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This converts Intel ICH6 GPIO driver to Kconfig, and add it to the
imply list of platform drivers.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Only a specific type of SPI flash exists on a board, having board
Kconfig to select the SPI flash seems to make more sense. Other
flash types are not necessary except coreboot, which implies all
available flash drivers there.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
QEMU does not support ICH SPI controller yet. It's meaningless to
include SPI flash support.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
U-Boot as coreboot payload can run on any x86 hardware ideally.
Let's imply some common drivers that are useful.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Imply drivers that are working with Ivybridge platform in the
platform Kconfig.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
BayTrail integrates lots of peripherals that have U-Boot drivers.
Imply those in the platform Kconfig.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Now that all x86 boards have been converted to use DM, we can imply
these uclass drivers (DM_ETH, DM_RTC, DM_USB, DM_VIDEO) from the
top level.
Previously DM_GPIO, DM_KEYBOARD, DM_SERIAL, DM_SPI, DM_SPI_FLASH
are selected. Change to use 'imply' to allow them to be removed.
Note with this change, chromebook_link64 build fails:
common/built-in.o:(.data.env_htab+0xc): undefined reference to 'env_flags_validate'
lib/built-in.o: In function `hsearch_r':
lib/hashtable.c:380: undefined reference to 'env_callback_init'
lib/hashtable.c:382: undefined reference to 'env_flags_init'
make[1]: *** [spl/u-boot-spl] Error 1
CONFIG_SPL_ENV_SUPPORT is required for chromebook_link64 to build
again. This is just a workaround as it is not needed at all. See
commit bda40d5 "x86: qemu: Add a config for 64-bit U-Boot" for
the same issue seen on QEMU 64-bit target.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Platform knows whether MRC cache is implemented, but using it can
be a choice of a specific board.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This is architecture-dependent early initialization hence should
be put in the platform Kconfig.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
arch_misc_init() is intended to do architecture-dependent stuff.
This is required by each platform.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
CONFIG_BOARD_EARLY_INIT_F literally indicates board-specific codes
and should be not 'default y' for all x86 boards.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Intel Management Engine is required by the platform, however it's
not a must have when building a U-Boot image. For example, during
development normally programming ME firmware is a one-time effort.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Some firmwares might have another window for generated tables.
So, introduce two configuration options to select start address and
maximum length for the generated tables.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Rename try_msr_calibrate_tsc() to cpu_mhz_from_msr(), as that
better describes what the routine does.
This keeps in sync with Linux kernel commit:
02c0cd2: x86/tsc_msr: Remove irqoff around MSR-based TSC enumeration
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Atom processors use a 19.2 MHz crystal oscillator.
Early processors generate 100 MHz via 19.2 MHz * 26 / 5 = 99.84 MHz.
Later processors generate 100 MHz via 19.2 MHz * 125 / 24 = 100 MHz.
Update the Silvermont-based tables accordingly, matching the Software
Developers Manual.
Also, correct a 166 MHz entry that should have been 116 MHz, and add
a missing 80 MHz entry for VLV2.
This keeps in sync with Linux kernel commit:
05680e7: x86/tsc_msr: Correct Silvermont reference clock values
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Some processor abbreviations in the comments of freq_desc_tables[]
are obscure. This updates part of these to mention processors
that are known to us. Also expand frequency definitions.
This keeps in sync with Linux kernel commit:
9e0cae9: x86/tsc_msr: Update comments, expand definitions
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
If either ratio or freq is zero, the return value is zero. There
is no need to create a fail branch and return zero there.
This keeps in sync with Linux kernel commit:
14bb4e3: x86/tsc_msr: Remove debugging messages
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
try_msr_calibrate_tsc() is currently Intel-specific, and should not
execute on any other vendor's parts.
This keeps in sync with Linux kernel commit:
ba82683: x86/tsc_msr: Identify Intel-specific code
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Currently we read the tsc radio like this:
ratio = (MSR_PLATFORM_INFO >> 8) & 0x1f;
Thus we get bit 8-12 of MSR_PLATFORM_INFO, however according to the
Intel manual, the ratio bits are bit 8-15.
Fix this problem by masking 0xff instead.
This keeps in sync with Linux kernel commit:
886123f: x86/tsc: Read all ratio bits from MSR_PLATFORM_INFO
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
64-bit U-Boot image is a combination of 32-bit U-Boot (SPL) plus
64-bit U-Boot (proper). For the U-Boot proper, it has be compiled
to 64-bit object codes. Attempting to use a toolchain to compile
64-bit U-Boot for qemu-x86_64, like kernel.org 4.9 i386-linux-gcc,
fails with the following errors:
arch/x86/cpu/intel_common/microcode.c:79:2: error: PIC register
clobbered by 'ebx' in 'asm'
The issue is because toolchain is preconfigured to generate code
for the 32-bit architecture (i386), and currently '-m64' is missing
in the makefile fragment. Using kernel.org 4.9 x86_64-linux-gcc
works out of the box, since it is preconfigured to generate 64-bit
codes.
When compiling U-Boot SPL, '-m32' is passed to the toolchain, no
mater 32-bit (i386-linux-) or 64-bit (x86_64-linux) the toolchain
is preconfigured to generate.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
At present U-Boot x86 build is using -mpreferred-stack-boundary=2
which is 4 bytes stack boundary alignment. With 64-bit U-Boot, the
minimal required stack boundary alignment is 16 bytes.
If -mpreferred-stack-boundary is not specified, the default is 4
(16 bytes). Switch to use the default one.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Some LDOs have a bypass capability. Make sure that the bypass is disabled
when is the LDO is enabled (otherwise the voltage can't be changed).
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Keerthy <j-keerthy@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Modify palmas_mmc1_poweron_ldo() API to set the voltage based on the
voltage parameter passed as argument instead of always setting it to
3.0V. This allows MMC1 to set the LDO1 regulator voltage to 3.3V or 1.8V.
1.8V is required to add support for UHS mode.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Move this board over to driver model for MMC and SATA. This means that it
uses CONFIG_BLK as well. In SPL these options remain turned off since it
increases the code size. One option would be to use CONFIG_SPL_OF_PLATDATA
to avoid device-tree overhead.
Signed-off-by: Simon Glass <sjg@chromium.org>
This is not used in SPL so we do not need to compile it. Make this change
before adding driver-model support to the driver, to avoid build errors.
With driver model we define a U_BOOT_DRIVER() which would otherwise be
present in SPL and not be garbage-collected when building.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Add a driver-model version of this driver which mostly uses the existing
code. The old code can be removed once all boards are switched over.
Signed-off-by: Simon Glass <sjg@chromium.org>
This function has #ifdefs in it which we want to avoid for driver model.
Instead we should use different compatible strings and the .data field.
It also uses the MMC device number which is not available in driver
model except through aliases.
Move the function's into its caller so that the driver-model version can
do things its own way.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
At present the driver-private data is obtained in various functions by
various means. With driver model this is provided automatically. Without
driver model it comes from a C array declared at the top of the file.
Adjust internal functions so that they are passed the private data as
a parameter, allowing the caller to obtain it using either means.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Use the driver-model naming convention for this structure. It is data
private to the driver so the local variable should be called 'priv'.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Use the driver-model naming convention for this structure. It is data
private to the driver.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
This is expected to be attached to the uclass and the code operates that
way, but the uclass has not been updated. Fix it to avoid using memory at
address 0.
Signed-off-by: Simon Glass <sjg@chromium.org>
Fixes: 47fc61a (dm: ahci: Drop use of probe_ent)
When the SATA code was moved into drivers/ata these Kconfig options were
added to that directory. They already exist in drivers/scsi. Remove them
from drivers/ata to fix the duplication.
Signed-off-by: Simon Glass <sjg@chromium.org>
Fixes: 7f2b5f4 (sata: Move drivers into new drivers/ata directory)
This function appears to obtain the value of the 'ranges' property rather
than 'reg'. As such it does not behave as documented or expected.
In addition it picks up the second field of the property which is the size
(with prop += naddr) rather than the first which is the address.
Fix it.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present if U-Boot proper uses driver model for MMC, then SPL has to
also. While this is desirable, it places a significant barrier to moving
to driver model in some cases. For example, with a space-constrained SPL
it may be necessary to enable CONFIG_SPL_OF_PLATDATA which involves
adjusting some drivers.
Add new SPL versions of the options for DM_MMC, DM_MMC_OPS and BLK. By
default these follow their non-SPL versions, but this can be changed by
boards which need it.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present the AHCI SCSI driver only supports PCI with driver model.
Rename the existing function to indicate this and add support for adding
a non-PCI controller .
Signed-off-by: Simon Glass <sjg@chromium.org>
Migrate all remaining instances of CMD_NAND, CMD_NAND_TRIMFFS
CMD_NAND_LOCK_UNLOCK and CMD_NAND_TORTURE from the headers into the
defconfig files.
Tested-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
With driver model the serial device is often not called "serial". Mark
driver-model stdio devices so that they can be detected and we can look up
the uclass. This is a more reliable way of finding out whether the console
is connected to a serial device or not.
Signed-off-by: Simon Glass <sjg@chromium.org>
Put the check for whether a console is a serial device in a function so
that we can share the code in the two places that use it.
Signed-off-by: Simon Glass <sjg@chromium.org>
The image address passed to secure_boot_verify_image() may not be
cacheline aligned, round the address down to the nearest cacheline.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
When we have MMC available we assume that we want to put the env as a
file on FAT.
Cc: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
The main uses of CONFIG_SPL_ENV_SUPPORT are for network support and for
disabling "Falcon Mode" support at run-time. As this build enables
neither, remove this feature.
Cc: Andrew F. Davis <afd@ti.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
We rename the various FAT_ENV_xxx options to CONFIG_ENV_FAT_xxx so that
they can be modified via Kconfig. Migrate all existing users to the new
values.
Signed-off-by: Tom Rini <trini@konsulko.com>
CONFIG_TWL4030_PWM is not being used by any source, so let's remove the #define
and the whitelist entry
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Commit ca9193d2b1 ("efi_loader: gop: fixes for CONFIG_DM_VIDEO without
CONFIG_LCD") dropped the explicit (void*) cast for fb_base in efi gop support
for CONFIG_LCD without DM. This patch adds it back, eliminating the now occuring
warning again
Fixes: ca9193d2b1 ("efi_loader: gop: fixes for CONFIG_DM_VIDEO without CONFIG_LCD")
Reported-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
Patch queue for efi - 2017-07-29
A lot of EFI greatness this time around. Thanks a lot to the
two amazing new contributors
Heinrich Schuchardt and
Rob Clark
we now gain
- stable objects across multiple bootefi invocations
- fixes for shim
- fixes for ipxe
- protocol installation
- device path conversion to/from text
- working "lsefi" support in grub
- working notifiers
- various bug fixes
Some platforms might require different approach when filling memory
mappings configuration table.
Allow them to override the common method.
At the same time export acpi_create_mcfg_mmconfig().
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
In Baytrail and Quark support code acpi_fill_madt() is identical.
Deduplicate its implementation by moving to lib/acpi_tables.c.
At the same time mark acpi_fill_madt() with __weak attribute to keep a
possibility to override it in platform code
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
ACPI specification defines FADT fields marked as reserved in U-Boot.
Name these fields in accordance with ACPI specification.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
In some cases we would need build date as integer value.
Export U_BOOT_BUILD_DATE as %Y%m%d integer value.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
If ASL compiler failed by any reason do not produce output C file.
Otherwise sequential run of make will shadow the actual error in ASL,
i.e.
CC board/intel/edison/dsdt.o
board/intel/edison/dsdt.c:1:1: error: unterminated comment
/*
and user has to remove dsdt.c and run make in order to see the error again.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Change from EHCI to xHCI on the DFI BayTrail SoM.
The xHCI USB hub is connected to an GPIO on the DFI BayTrail SoM. For
correct operation, it needs to get reset upon power-up. Otherwise it
may happen that the hub is not detected after a software reboot. This
patch also configures this GPIO in the dts for correct operation.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This config option is needed on the congatec x86 BayTrail board, as
otherwise the USB hub will not get initialized correctly. This
patch selects this Kconfig option again.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
To support the Spansion SPI NOR flashes, this patch enables the support in
defconfig. This increases the U-Boot binary too much so that it does
not fit into its area in the ROM. So also move the VIDEO BIOS blob
a bit to make some space here.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Add Intel Edison board which is using U-Boot.
The patch is based on work done by the following people (in alphabetical
order):
Aiden Park <aiden.park@intel.com>
Dukjoon Jeon <dukjoon.jeon@intel.com>
eric.park <eric.park@intel.com>
Fabien Chereau <fabien.chereau@intel.com>
Felipe Balbi <felipe.balbi@linux.intel.com>
Scott D Phillips <scott.d.phillips@intel.com>
Sebastien Colleur <sebastienx.colleur@intel.com>
Steve Sakoman <steve.sakoman@intel.com>
Vincent Tinelli <vincent.tinelli@intel.com>
In case we're building for Intel Edison, we must have 4096 bytes of
zeroes in the beginning on u-boot.bin. This is done in
board/intel/edison/config.mk.
First run sets hardware_id environment variable which is read from
System Controller Unit (SCU).
Serial number (serial# environment variable) is generated based on eMMC
CID.
MAC address on USB network interface is unique to the board but kept the
same all over the time.
Set mac address from U-Boot using following scheme:
OUI = 02:00:86
next 3 bytes of MAC address set from eMMC serial number
This allows to have a unique mac address across reboot and flashing.
Signed-off-by: Vincent Tinelli <vincent.tinelli@intel.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
[bmeng: Add MAINTAINERS file for Intel Edison board]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Kbuild complains if USB is not selected before any of host driver.
warning: (X86) selects USB_EHCI_HCD which has unmet direct dependencies (USB)
warning: (X86) selects USB_EHCI_HCD which has unmet direct dependencies (USB)
Select it for X86.
Fixes: 64d6ac5bc4 ("Kconfig: USB: Migrate CONFIG_USB_EHCI_HCD users to Kconfig")
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
[bmeng: Update all x86 boards' defconfig files to remove CONFIG_USB]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
This should make it easier to see when a callback back to UEFI world
calls back in to the u-boot world, and generally match up EFI_ENTRY()
and EFI_EXIT() calls.
Signed-off-by: Rob Clark <robdclark@gmail.com>
[agraf: remove static from const var]
Signed-off-by: Alexander Graf <agraf@suse.de>
Missing an EFI_ENTRY() or doubling up EFI_EXIT() leads to non-obvious
crashes. Let's add some error checking.
Signed-off-by: Rob Clark <robdclark@gmail.com>
[agraf: fix bogus assert() and fix app_gd breakage]
Signed-off-by: Alexander Graf <agraf@suse.de>
Move clk_release_all() prototype and definition inside
OF_CONTROL flag to avoid following compilation error for
poplar platform:
aarch64: + poplar
+drivers/usb/host/built-in.o: In function `ehci_usb_remove':
+drivers/usb/host/ehci-generic.c:159: undefined reference to `clk_release_all'
+drivers/usb/host/built-in.o: In function `ehci_usb_probe':
+drivers/usb/host/ehci-generic.c:133: undefined reference to `clk_release_all'
+make[1]: *** [u-boot] Error 139
+make: *** [sub-make] Error 2
Introduced by 4e542c4 clk: add clk_release_all()
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Fix following warnings encountered with platforms
dra7xx_evm and dra7xx_hs_evm :
arm: + dra7xx_evm
+ hccr = (struct xhci_hccr *)devfdt_get_addr(dev);
+ ^
+ hcor = (struct xhci_hcor *)((phys_addr_t)hccr +
+ ^
w+drivers/usb/host/xhci-dwc3.c: In function 'xhci_dwc3_probe':
w+drivers/usb/host/xhci-dwc3.c:124:9: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
w+drivers/usb/host/xhci-dwc3.c:125:30: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast]
w+drivers/usb/host/xhci-dwc3.c:125:9: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
arm: + dra7xx_hs_evm
+ hccr = (struct xhci_hccr *)devfdt_get_addr(dev);
+ ^
+ hcor = (struct xhci_hcor *)((phys_addr_t)hccr +
+ ^
w+drivers/usb/host/xhci-dwc3.c: In function 'xhci_dwc3_probe':
w+drivers/usb/host/xhci-dwc3.c:124:9: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
w+drivers/usb/host/xhci-dwc3.c:125:30: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast]
w+drivers/usb/host/xhci-dwc3.c:125:9: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
Introduced by 7e65e84 usb: host: xhci-dwc3: Convert driver to DM
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
This driver is used to stub PHY operations in a driver (USB, SATA).
This is useful when the 'client' driver (USB, SATA, ...) uses the PHY
framework and there is no actual PHY harwdare to drive.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Call generic_phy_init() only when a PHY was found.
This will avoid a crash if no "phys" property is found in DT.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reported-by: Patrick Delaunay <patrick.delaunay@st.com>
Call generic_phy_init() only when a PHY was found.
This will avoid a crash if no "phys" property is found in DT.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reported-by: Patrick Delaunay <patrick.delaunay@st.com>
Add CONFIG_DM_USB flag to avoid following compilation errors
detected by buildman :
+drivers/usb/host/built-in.o: In function `xhci_dwc3_remove':
+drivers/usb/host/xhci-dwc3.c:168: undefined reference to `xhci_deregister'
+drivers/usb/host/built-in.o: In function `xhci_dwc3_probe':
+drivers/usb/host/xhci-dwc3.c:145: undefined reference to `usb_get_dr_mode'
+drivers/usb/host/xhci-dwc3.c:152: undefined reference to `xhci_register'
introduced by patch d5c3f014da3 "usb: host: xhci-dwc3: Convert driver to DM"
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reported-by: Ran Wang <ran.wang_1@nxp.com>
To avoid compilation breakage on platform that doesn't
support DM PHY but uses xhci-dwc3 driver, add the missing
CONFIG_PHY flag.
Introduced by patch :
84e53877 "usb: host: xhci-dwc3: Add generic PHY support"
Cc: Ran Wang <ran.wang_1@nxp.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reported-by: Ran Wang <ran.wang_1@nxp.com>
- factorize code between read and write transaction
- always use dfu_transaction_cleanup() to initialize
the internal variable: easy maintenance
- replace direct access by dfu_get_buf() and dfu_get_buf_size()
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Change long (32 bits on arm) to u64 (same type than offset)
for size and read offset r_left
So partition and device used for DFU can be greater than 4GB
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
solve issue on get_medium_size() function
the detection of error is a simple test < 0
but for ARM platform, long is 32bits and 2GB = 0x80000000
is seen as error.
I solve the issue by changing the prototype fo the function
to separate size and result.
This patch prepare the next patch with size change to u64.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Fix the memory leak by freeing the allocated out request buffer
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
So far LS/FS devices directly attached to xHC root port can be
successfully enumerated by xHCI driver, but if they are connected
behind a hub, the enumeration process fails to address the device.
It turns out xHCI driver still misses a part that in the device's
input slot context, all Transaction Translator (TT) related fields
are not programmed. The xHCI spec defines how to enable TT.
Now LS/FS devices like USB keyboard/mouse can be enumerated behind
a high speed hub.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
There is no way to know whether the attached device is a hub or
not in advance before the device's descriptor is fetched. But
once we know it's a high speed hub, per the xHCI spec, we need
to tell xHC it's a hub device by initializing hub-related fields
in the input slot context.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
After fetching hub descriptor, we need to call USB uclass operation
update_hub_device() to notify HCD to do some preparation work.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
For USB host controllers like xHC, its internal representation of
hub needs to be updated after the hub descriptor is fetched. This
adds a new op that does this.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
A high speed hub has a special responsibility to handle full speed/
low speed devices connected on downstream ports. In this case, the
hub must isolate the high speed signaling environment from the full
speed/low speed signaling environment with the help of Transaction
Translator (TT). TT details are provided by hub descriptors and we
parse and save it to hub uclass_priv for later use.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
xHCI spec says: the values of the 'route string' field shall be
initialized by the first 'Address Device' command issued to a
device slot, and shall not be modified by any other command.
So far U-Boot does not program this field, and it does not prevent
SS device directly attached to root port, or HS device behind an HS
hub, from working, due to the fact that 'route string' is used by
the xHC to target SS packets. But in order to enumerate devices
behind an SS hub, this field must be programmed.
With this commit and along with previous commits, now SS & HS devices
attached to a USB 3.0 hub can be enumerated by U-Boot.
As usual, this new feature is only available when DM is on.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
For future extension, change xhci_setup_addressable_virt_dev()
signature to accept a pointer to 'struct usb_device', instead
of its members slot_id & speed, as the struct already contains
these two plus some other useful information of the device.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
USB 3.0 hub uses a hub depth value multiplied by four as an offset
into the 'route string' to locate the bits it uses to determine the
downstream port number. We shall set the hub depth value of a USB
3.0 hub after it is configured.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
USB 3.0 hub port status field has different bit positions from 2.0
hubs. Since U-Boot only understands the old version, translate the
new one into the old one.
Since we are going to add USB 3.0 hub support, this feature is only
available with driver model USB.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Sometimes we need know if a given hub device is root hub or not.
Add a new API to test this. This removes the xHCI driver's own
version is_root_hub() and change to use the new API.
While we are here, remove the unused/commented out get_usb_device()
in the xHCI driver too.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
At present hub_port_reset() is defined in DM USB, but it is never
called hence remove it (removing another ifdefs).
While we are here, change legacy_hub_port_reset() name to
usb_hub_port_reset() to better match other function names in the
same hub module.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Use USB hub device's dev->uclass_priv to point to 'usb_hub_device'
so that with driver model usb_hub_reset() and usb_hub_allocate()
are no longer needed.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
As there is no board that currently uses xhci-pci driver without DM
USB, drop its support and leave only DM support.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
BayTrail SoC supports both EHCI and xHCI controllers. However only
one host controller (either EHCI or xHCI) can be used. To enable
HSIC and SS ports, xHCI must be used. This turns on xHCI support on
Intel MinnowMax board.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
Occasionally it was observed that on Intel MinnowMax board, with a
USB 2.0 device connected to the bottom port, when doing 'usb start'
on the xHCI controller:
scanning bus 0 for devices... cannot reset port 3!?
But neither of the two USB ports is routed to xHCI root port 3.
Adding some debug information shows that xHCI port 3 PORTSC register
mysteriously reports both CCS = 1 and CSC = 1.
This is not seen every time. After increasing the timeout to wait
for power to become stable, the issue is gone. So this indicates
current default USB power-on delay (20ms) might be at a critical
region where power is stable/unstable. U-Boot provides a mechanism
to have a environment variable to override the default one. Add
one for MinnowMax.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
USB 3.0 defines bMaxPacketSize0 field in the device descriptor as
the exponent of 2, so let's print the calculated actual size.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
Now that EHCD does not use CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS,
remove it in all boards' config files.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
EHC reports supported maximum number of ports in the HCSPARAMS
register, so it's unnecessary to use a hardcoded config option
CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
Now that xHCD does not use CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS,
remove it in all boards' config files.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
xHC reports supported maximum number of ports in the HCSPARAMS1
register, so it's unnecessary to use a hardcoded config option
CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
HCSPARAMS1:MaxPorts field specifies the maximum port number value,
and its valid values are in the range of 1 to 255.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
USB 3.0 hub port status has different bit position regarding to
port power, port speed, etc. But others are the same as 2.0 hubs.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
USB 3.0 hubs have a slightly different hub descriptor than USB 2.0
hubs, with a fixed (rather than variable length) size. Change the
host controller drivers that access those last two fields
(DeviceRemovable and PortPowerCtrlMask) to use the union.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
For accuracy, we should use 'sizeof(struct usb_port_status)' as the
wLength for 'get port status' request, although it happens to be
equal to 'sizeof(struct usb_hub_status)'.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
Testing a USB 3.0 hub by connecting it to the xHCI port on Intel
MinnowMax, when issuing 'get hub descriptor' to the hub, xHCI
reports a transfer event TRB with a completion code 6 which means
'Stall Error'.
In fact super speed USB hub descriptor type is 0x2a, not 0x29.
Sending correct SETUP packet to the hub makes it not stall anymore.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
It was observed that on Intel MinnowMax board, when xHCI is enabled
in the BayTrail SoC, with a USB 3.0 device connected to the bottom
USB 3.0 port (mapped to xHCI root port #7), its PORTSC register is
always 0x201203 (CCS = 1, CSC = 0). The root cause of such behavior
is unknown yet. Connect status change bit is set on the same port
with a USB 2.0 device (mapped to xHCI port #1, which is a different
port on the root hub).
With current logic in usb_scan_port(), the enumeration process will
abort if it does not detect a connect status change on a hub port.
However since a device connection status is correctly reported, the
enumeration process can still continue.
With this change, USB device connected to the bottom blue port on
MinnowMax board can be enumerated under either SS or HS mode.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
Tested-by: Dinh Nguyen <dinguyen@kernel.org>
A valid input slot context for a 'configure endpoint' command requires
the 'Context Entries' field to be initialized to the index of the last
valid endpoint context that is defined by the target configuration. We
set up the 'Context Entries' field, but we forget to include the input
slot context in the input control context 'Add Context flags' bitmap.
So xHC will simply ignore input slot context and continue using its own
which contains old information of the device.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
The scratchpad buffer array is used to define the locations of
statically allocated memory pages that are available for the
private use of the xHC. The xHCI spec explicitly mentions that
system software shall allocate the scratchpad buffers before
placing the xHC in to Run mode (Run/Stop (R/S) = ‘1’), however
U-Boot is missing this part.
This causes xHC on Intel platform does not respond the very first
'enable slot' command that is given to xHC and the 'enable slot'
command completion event TRB is never generated and xHC seems to
hang forever.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
In xhci_queue_command(), when the command is not 'reset endpoint',
'stop endpoint' or 'set TR dequeue pointer', endpoint ID should not
be encoded in the TRB.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
There is no member called 'dma' in struct xhci_container_ctx. Remove
the comments that mentions it.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
use array to save deasserted resets reference in order to
assert them in case of error during probe() or during driver
removal.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
use array to save enabled clocks reference in order to
disabled them in case of error during probe() or during
driver removal.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Use an array to save enabled clocks reference and deasserted resets
in order to respectively disabled and asserted them in case of error
during probe() or during driver removal.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
this allows to get file, line and function location
of the current error message.
Signed-off-by: patrice chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This function is usefull to get phandle number contained
in a property list.
For example, this allows to allocate the right amount
of memory to keep clock's reference contained into the
"clocks" property.
To implement it, either of_count_phandle_with_args() or
fdtdec_parse_phandle_with_args() are used respectively
for live tree and flat tree.
By passing index = -1, these 2 functions returns the
number of phandle contained into the property list.
Add also the dev_count_phandle_with_args() based on
ofnode_count_phandle_with_args()
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add clk_release_all() method which Disable/Free an
array of clocks that has been previously requested by
clk_request/get_by_*()
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add reset_release_all() method which Assert/Free an
array of resets signal that has been previously successfully
requested by reset_get_by_*()
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This is needed in error path to assert previously deasserted
reset by using a saved reset_ctl reference.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This allow to check if a PHY has been correctly
initialised and avoid to get access to phy struct.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
phy->dev need to be set to NULL in case of generic_phy_get_by_index()
fails. Then phy->dev can be used to check if the phy is valid
Reported-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
DWC3 dual role mode is selected using DT "dr_mode"
property. If not found, DWC3 controller is configured
in HOST mode by default
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add Driver Model support with use of generic DT
compatible string "snps,dwc3"
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
These are not needed now since the drivers now use driver model. Drop
them.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Tested-on: Beaver, Jetson-TK1
Tested-by: Stephen Warren <swarren@nvidia.com>
Convert this PMIC driver to driver model and fix up other users. The
regulator and GPIO functions are now handled by separate drivers.
Update nyan-big to work correct. Three boards will need to be updated by
the maintainers: apalis-tk1, cei-tk1-som. Also the TODO in the code re
as3722_sd_set_voltage() needs to be completed.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Tested-on: Jetson-TK1
Tested-by: Stephen Warren <swarren@nvidia.com>
This pmic includes GPIOs which should have their own driver. Add
a driver to support these.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Tested-on: Beaver, Jetson-TK1
Tested-by: Stephen Warren <swarren@nvidia.com>
This pmic includes regulators which should have their own driver. Add
a driver to support these.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Tested-on: Beaver, Jetson-TK1
Tested-by: Stephen Warren <swarren@nvidia.com>
Update the tegra pci driver to support a live device tree. Fix the check
for nvidia,num-lanes so that an error will actually be detected.
Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Tested-on: Beaver, Jetson-TK1
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Stephen Warren <swarren@nvidia.com>
Adjust this code to support a live device tree. This should be implemented
as a PHY driver but that is left as an exercise for the maintainer.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Stephen Warren <swarren@nvidia.com>
The PMC can be modelled as a syscon peripheral. Add a driver for this
so that it can be accessed by drivers when needed. Enable it for tegra124
boards.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Tested-on: Beaver, Jetson-TK1
Tested-by: Stephen Warren <swarren@nvidia.com>
Enable the debug UART in SPL to allow early serial output even if the
standard UART does not work (e.g. due to driver model problem).
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Tested-on: Beaver, Jetson-TK1
Tested-by: Stephen Warren <swarren@nvidia.com>
At present this function only supports 32-bit (single-cell) values. Update
it to support two-cell values also.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Tested-on: Beaver, Jetson-TK1
Tested-by: Stephen Warren <swarren@nvidia.com>
We sometimes need to read a resource from an arbitrary node. In any case
for consistency we should not put the live-tree switching code in
a dev_read_...() function. Update this to suit.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Tested-on: Beaver, Jetson-TK1
Tested-by: Stephen Warren <swarren@nvidia.com>
Current puts() and putc() have similar #ifdef / if() conditionals.
Make puts() iterate over putc() to avoid code duplication.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
DT property values can be strings as well as integers. This is why
of_get_property/fdt_getprop returns an opaque pointer.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Simon Glass <sjg@chromium.org>
During 'scsi reset', scsi_bus_reset() is called with udevice pointed
to NULL, which causes exception. As a temporary fix, disable the call
for DM SCSI for now.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Running 'scsi scan' command causes scsi_scan_dev() to be called,
from which device_probe() is called and consequently AHCI driver
probe routine will be called as SCSI driver's parent, and finally
ahci_probe_scsi() calls scsi_scan_dev() again.
Remove the call to scsi_scan_dev() in ahci_probe_scsi().
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Enable booting from SATA on the wandboard.
Sata support was already enabled, but distro_bootcmd is not configured
to boot from it.
Signed-off-by: Vagrant Cascadian <vagrant@debian.org>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
commit 306dd7dabd ("net: fec_mxc: fix PHY initialization bug with CONFIG_DM_ETH")
has broken the build of the fec_mxc driver with CONFIG_DM_ETH
enabled because it changed the parameters passed to *fec_get_miibus()
without changing the functions prototype.
This patch fixes up the prototype of fec_get_miibus() for the DM_ETH case.
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Rather than open-coding EFI_EXIT() + callback + EFI_ENTRY(), introduce
an EFI_CALL() macro. This makes callbacks into UEFI world (of which
there will be more in the future) more concise and easier to locate in
the code.
Signed-off-by: Rob Clark <robdclark@gmail.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
There are a couple spots doing things like:
return EFI_EXIT(some_fxn(...));
which I handn't noticed before. With addition of printing return value
in the EFI_EXIT() macro, now the fxn call was getting evaluated twice.
Which we didn't really want.
Signed-off-by: Rob Clark <robdclark@gmail.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
A few lines (defines and declarations) had been duplicated when the
puma-rk3399 board was initially merged. This removes the duplicates
and changes the style to use local constants instead of pasted
literals.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
[fixed up commit-message & converted to use 'const u32':]
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
function board_init_f_init_reserve will call memset, which
is implemented in lib, and enabled by CONFIG_SPL_LIBGENERIC_SUPPORT
in spl stage.
To reduce the code size, also enable SPL_TINY_MEMSET.
As rk3036 will return to bootrom immediately after dram
initialization, there is no need to run DM, so disable
SPL_DM_SERIAL.
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
RK3036 only has 4kb sram, the spl code will use
3.4 ~ 3.5 kb, the last 0.5kb are used for SP and
GD, so there is no space for malloc. Also, the spl
will directly return to bootrom after dram initialized,
they never need the space for malloc.
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
SPL and normal u-boot stage use different malloc pool size
configuration before relocation, so use CONFIG_VAL(SYS_MALLOC_F_LEN)
to fit different boot stage.
Signed-off-by: Andy Yan <andyshrk@gmail.com>
Changes in v3:
- use CONFIG_VAL(), which suggested by Simon
Changes in v2: None
arch/sandbox/cpu/start.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Some platforms have very limited SRAM to run SPL code, so there may
not be the same amount space for a malloc pool before relocation in
the SPL stage as the normal U-Boot stage.
Make SPL and (the full) U-Boot stage use independent SYS_MALLOC_F_LEN,
so the size of pre-relocation malloc pool can be configured memory
space independently.
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
[fixed up commit-message:]
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Some platforms have very limited SRAM to run SPL code, so there may
not be the same amount space for a malloc pool before relocation in
the SPL stage as the normal U-Boot stage.
Make SPL and (the full) U-Boot stage use independent SYS_MALLOC_F_LEN,
so the size of pre-relocation malloc pool can be configured memory
space independently.
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
[fixed up commit-message:]
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Some platforms have very limited SRAM to run SPL code, so there may
not be the same amount space for a malloc pool before relocation in
the SPL stage as the normal U-Boot stage.
Make SPL and (the full) U-Boot stage use independent SYS_MALLOC_F_LEN,
so the size of pre-relocation malloc pool can be configured memory
space independently.
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Acked-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
[fixed up commit-message:]
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Some platforms have very limited SRAM to run SPL code, so there may
not be the same amount space for a malloc pool before relocation in
the SPL stage as the normal U-Boot stage.
Make SPL and (the full) U-Boot stage use independent SYS_MALLOC_F_LEN,
so the size of pre-relocation malloc pool can be configured memory
space independently.
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
[fixed up commit-message:]
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Add the 'usbkbd' environment variable to the 'stdin', the contents of
the keyboard input can be auto-displayed on the serial terminal,so
you don't need to manually set the environment variable 'stdin'.
Signed-off-by: Leo Wen <leo.wen@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
SPL_SERIAL_SUPPORT and SPL_DRIVERS_MISC_SUPPORT were previously
enabled through rk3399_common.h. This change implies these options
through Kconfig.
These need to always be active for the RK3399, as follows:
- SPL_SERIAL_SUPPORT is needed to pass the SPL build
- SPL_DRIVERS_MISC_SUPPORT is needed to pass the SPL build
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Currently, drive-strenght to 12ma are described and supposed to be used
on RK3288. However, the pinctrl driver for this SoC only handles muxing
and pull up/pull down via PU/PD control registers. So complex IPs like
GMAC are working in normal ethernet 100mbps, but not at 1gbps typically.
This commit adds support for handling drive-strength of 12ma, when it's
defined in the DT.
Signed-off-by: Romain Perier <romain.perier@collabora.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
When creating a EFI/GUID partition map for the RK3399-Q7 through
U-Boot, the partition entries should be places at a 1MB offset from
the start of the device to give us space for the environment (at 16KB
on SD/MMC devices), the SPL stage (at 32KB on SD/MMC devices) and the
image payload (at 256KB on SD/MMC devices).
This change sets this up through the u-boot,efi-partition-entries-offset
/config property in the RK3399-Q7 DTSI.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
As our SPL stage can grow quite large (80KB+ are not unusual) on the
RK3399-Q7, the default setting for the environment location (in
include/configs/rockchip-common.h) can overlap our SPL.
This change finally makes use of the 'u-boot,mmc-env-offset' DTS
property to override the environment location and put it at 16KB into
the device, which is right before the SPL (located at 32KB).
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
This removes the unused 'rate' field from both rk3399_pmuclk_priv and
rk3399_clk_priv. I didn't bother to check where this came from (i.e.
what the historical context of these was), but only verified that
these are indeed unused across all code-paths.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The rk3368_clk_priv has two unused fields: rate, has_bwadj. This
removes them as there's no need for either (i.e. has_bwadj is always
true for the RK3368, according to its TRM).
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The clk driver for the RK3368 picked the wrong data structure's size
for its auto-alloc size: the size was calculated on the structure
representing the CRU hardware block instead of the priv structure.
As the CRU's register file is much larger than the driver's priv,
this did not cause any pain (except wasting memory).
Fix this by using the correct data structure's size.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
When building for a TPL/SPL setup (e.g. on the RK3368), we need the
TPL stage to have the extra space for for the 'Rockchip SPL name'
(i.e. 'RK33' word). Yet, the SPL will start execution at its first
word (i.e. the first word in the SPL binary needs to be a valid
instruction). To make things a bit more involved, CONFIG_SPL_BUILD
is defined both for the SPL and the TPL stage.
To avoid having to explicitly test for the first stage (TPL, if and
only if TPL and SPL are built, SPL otherwise), this commit modifies
the sequence to repeat the 'b reset' (instead of reserving 4 bytes
of undefined space) at the start of the boot0 hook: if overwritten
(and execution starts at the second word), the first instruction is
still a 'b reset'... if not overwritten, we start on a 'b reset' as
well.
This solution wouldn't even require the check whether we are in the
SPL/TPL build (i.e. CONFIG_SPL_BUILD), but we leave this check in for
documentation purposes.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add regulator-init-microvolt for driver to init the regulator,
and the min output value is not 800000mV for the PWM2 io domain has
changed to VCC3V0 instead of VCC1V8 in rockchip evb, we need to
correct it with the value measured when PWM2 output HIGH.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
The Identification Page (32 byte) is an additional page which can be written
and (later) permanently locked in Read-only mode.
phyCORE-RK3288 SoMs are using this page to describe the module variant.
This page also contains a MAC.
Our boards can be equipped with a different amount of EEPROMs. To make
this more transparent let's add an alias for the eeprom which stores the
module variant.
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
This reverts TXCLK toggling that was accidently dropped while reworking
commit 2454b719fb ("rockchip: rk3288: Add pinctrl support for the gmac
ethernet interface"). So the TX clock is enabled and we can use
GMAC_ROCKCHIP in 1Gbps when basic PINCTRL support is enabled
(!PINTRL_FULL).
Fixes: 2454b719fb ("rockchip: rk3288: Add pinctrl support for the...")
Signed-off-by: Romain Perier <romain.perier@collabora.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
We are about to reuse the rockchip timer (header file) for 64bit ARMv8
chips, so it seems a good time to make the register sizes explicit by
changing from 'unsigned int' to 'u32'.
Reorders the header-includes in rk_timer.c to ensure that 'u32' is
definded before it is used by 'asm/arch/timer.h'.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
When booting shim -> fallback -> shim -> grub -> linux the memory map is
a bit larger than the size linux passes in on the first call. But in
the EFI_BUFFER_TOO_SMALL case we were not passing back the updated size
to linux so it would loop forever.
Signed-off-by: Rob Clark <robdclark@gmail.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
In the source_file_format.txt file we talk about how to construct a
valid FIT image. While it already says to look at the source for the
full list, add kernel_noload to the explicit list of types. This is
arguably the most important type to use as most often we are including a
kernel that will run from wherever it is loaded into memory and execute.
This for example, allows you to create a single FIT image for Linux that
can be used on both OMAP and i.MX devices as the kernel will not need to
be moved in memory.
Signed-off-by: Tom Rini <trini@konsulko.com>
STM32F7 and H7 shared the same SDRAM control block.
On STM32H7 few control bits has been added.
The current driver need some minor adaptation as FMC block
enable/disable for H7.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
FMC driver is now able to discover the bank number by
parsing bank subnodes.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
FMC is able to manage 2 SDRAM banks, but the current driver
implementation is only able to manage the first SDRAM bank.
Even if only bank2 is used, some bank1 registers must be
configured.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Replace all fdtdec_get..() calls by ofnode_read...() or dev_read..().
This will allow drivers to support a live device tree.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Retrieve RAM base address from DT instead of using STM32_SDRAM_FMC
For STM32F7, FMC block base address is 0xA0000000, but SDRAM
registers are located at offset 0x140 inside FMC block.
Update the stm32_fmc_regs fields with all FMC registers
to map SDRAM registers at the right address.
These additionals registers will be used later.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Migrate all FMC defines from arch/arm/include/asm/arch-stm32f7/fmc.h
to drivers/ram/stm32_sdram.c
This will avoid to add an additionnal arch-stm32xx/fmc.h file when
a new stm32 family soc will be introduced.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Vikas Manocha <vikas.manocha@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
All drivers which was using clock_get() are now using
clk_get_rate() from clock framework, now it's safe to
remove clock_get().
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Acked-by: Vikas MANOCHA <vikas.manocha@st.com>
Replace proprietary clock_get() by clk_get_rate()
The stm32_qspi is now "generic" and can be used
by other STM32 SoCs.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Acked-by: Vikas MANOCHA <vikas.manocha@st.com>
Replace proprietary clock_get() by clk_get_rate()
The stm32x7 serial driver is now "generic" and can be used
by other STM32 SoCs.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Acked-by: Vikas MANOCHA <vikas.manocha@st.com>
This allow to remove include/dm/platform_data/serial_stm32x7.h
which was included in the past by stm32x7 driver and by
stm32f746-disco.c board file.
Since patch 42bf5e7c27 "serial: stm32f7: add device tree support"
this file is no more needed in board file.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Acked-by: Vikas MANOCHA <vikas.manocha@st.com>
clean the code by removing unused enums, structs and
defines related to clocks
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Acked-by: Vikas MANOCHA <vikas.manocha@st.com>
Add clock framework .get_rate callback.
This step will allow to convert all drivers which was using
proprietary clock_get() to use clock framework .get_rate().
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Acked-by: Vikas MANOCHA <vikas.manocha@st.com>
Retrieve RCC base address from DT, this will prepare
the ground for future STM32 SoCs support.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Acked-by: Vikas MANOCHA <vikas.manocha@st.com>
Also remove its declaration from stm32.h which
is no more needed.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Acked-by: Vikas MANOCHA <vikas.manocha@st.com>
The inline assembly functions in mon.c assume that the caller will
check for the return value in r0 according to regular ARM calling
conventions.
However, this assumption breaks down if the compiler inlines the
functions. The caller is then under no obligation to use r0 for the
result.
To fix this disconnect, we must explicitly move the return value
from the smc/bl call to the variable that the function returns.
Signed-off-by: Madan Srinivas <madans@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
The load address of ramdisk, rdaddr is 0x88080000 and fit_loadaddr
is defined as 0x88000000. This leaves only 512Kbytes for the
fit image. When the FIT images are larger than this, it will
overwite the ramdisk and cause the boot to fail.
For eg, The K2 HS fit images are a few MB and end up overwriting
the ramdsk. This patch moves the fit_loadaddr to 0x87000000,
leaving a 16MB window for the fit image. This memory can be
reclaimed once the kernel starts running.
Signed-off-by: Madan Srinivas <madans@ti.com>
On early K2 devices (eg. K2HK) the secure ROM code does not support
loading secure code to firewall protected memory, before decrypting,
authenticating and executing it.
To load the boot monitor on these devices, it is necessary to first
authenticate and run a copy loop from non-secure memory that copies
the boot monitor behind firewall protected memory, before decrypting
and executing it.
On K2G, the secure ROM does not allow secure code executing from
unprotected memory. Further, ROM first copies the signed and encrypted
image into firewall protected memory, then decrypts, authenticates
and executes it.
As a result of this, we cannot use the copy loop for K2G. The
mon_install has to be modified to pass the address the signed and
encrypted secure boot monitor image to the authentication API.
For backward compatibility with other K2 devices and K2G GP,
the mon_install API still supports a single argument. In this case
the second argument is set to 0 by u-boot and is ignored by ROM
Signed-off-by: Thanh Tran <thanh-tran@ti.com>
Signed-off-by: Madan Srinivas <madans@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
We first split the CONFIG_BOOTCOMMAND into its components to improve
readability. We then make the following order changes:
- Run findfdt first so the fdt name can be used in envboot like OMAP
- Install the boot monitor before running the PMMC so we can make any
needed secure changes before PMMC, do this on both HS and non-HS
- Move set_name_pmmc to just before get_pmmc_${boot}
Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Updates the default u-boot environment variables to support secure
boot. On secure devices, a secure boot monitor (sec-bm) needs to
be installed by u-boot.
Signed-off-by: Madan Srinivas <madans@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Updates the default u-boot environment variables to support FIT image
loading.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
BeagleBoard X15 revC board is similar to X15 revB1 except
with a SR2.0 where revB1 uses a SR1.1. Add board detection
support for revC.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
board_is*("rev", board_ti_get_rev()) uses strncmp() for
revison detection and assumes it is success if return value
is <= 0. This will fail in case of multiple versions, as
revb will be true for board_is_*revb() and board_is_*reva().
Fix it by looking for exact match of the string.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
GPIOs are now supported on Meson GXBB, enable driver and command in
the config.
Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This commit adds GPIO support to the Amlogic Meson pin controller
driver, based on code from Linux kernel.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Import Amlogic Meson DTS files from Linux kernel version 4.12
Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
As is often the case with SoC development, slightly different
products (i.e. different part number) are developed based on the
same silicon-die. Such fine grained information is unmaintainable.
Also, "SoC:" is a better fit that "CPU:".
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
It has been a while since ARM Trusted Firmware supported UniPhier SoC
family. U-Boot SPL was intended as a temporary loader that runs in
secure world. It is a maintenance headache to support two different
boot mechanisms. Secure firmware is realm of ARM Trusted Firmware
and now U-Boot only serves as a non-secure boot loader for UniPhier
ARMv8 SoCs.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Before commit 7cbc12415d ("efi_loader: initalize EFI object list
only once") we recreated the world on every bootefi invocation.
That included the object tree as well as the configuration tables.
Now however we don't recreate them, which means we must not explicitly
override the configuration tables, as otherwise we may lose our SMBIOS
table from the configuration table list on second bootefi invocation.
This patch makes bootefi call our normal configuration table modification
APIs to add/remove the FDT instead of recreating all tables from scratch.
That way the SMBIOS table gets preserved across multiple invocations.
Signed-off-by: Alexander Graf <agraf@suse.de>
The INSTALL_CONFIGURATION_TABLE callback also provides the ability to
remove table entries. This patch adds that functionality.
Signed-off-by: Alexander Graf <agraf@suse.de>
Enable FPGA driver build for Arria 10 SPL because FPGA driver is
needed by Arria 10 SPL to configure and getting DDR up before
loading U-boot into DDR and booting from there.
Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
Reviewed-by: Dinh Nguyen <dinguyen@kernel.org>
Move FPGA driver which is Gen5 specific code into Gen5 driver file
and keeping common FPGA driver intact. All the changes are still keeping
in driver/fpga/ and no functional change. Subsequent patch would move
FPGA manager driver from arch/arm into driver/fpga/.
Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
Reviewed-by: Dinh Nguyen <dinguyen@kernel.org>
Remove parameter from socfpga_bridges_reset(), and keeping this function
for single purpose which is just triggering reset on bridges.
socfpga_reset_deassert_bridges_handoff() can be called for releasing reset
on any bridges based on the bridge setting defined in fdt.
Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
Reviewed-by: Dinh Nguyen <dinguyen@kernel.org>
Probably this went unnoticed before, but it causes problems with
addition of 804b1d73 ("efi_loader: log EFI return values too")
Signed-off-by: Rob Clark <robdclark@gmail.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
The CONFIG_ENV_IS_IN_... options which have already been converted to
Kconfig only have a small amount of help. Move the rest of it over from
the README.
Signed-off-by: Simon Glass <sjg@chromium.org>
This converts the following to Kconfig:
CONFIG_ENV_IS_IN_MMC
CONFIG_ENV_IS_IN_NAND
CONFIG_ENV_IS_IN_UBI
CONFIG_ENV_IS_NOWHERE
In fact this already exists for sunxi as a 'choice' config. However not
all the choices are available in Kconfig yet so we cannot use that. It
would lead to more than one option being set.
In addition, one purpose of this series is to allow the environment to be
stored in more than one place. So the existing choice is converted to a
normal config allowing each option to be set independently.
There are not many opportunities for Kconfig updates to reduce the size of
this patch. This was tested with
./tools/moveconfig.py -i CONFIG_ENV_IS_IN_MMC
And then manual updates. This is because for CHAIN_OF_TRUST boards they
can only have ENV_IS_NOWHERE set, so we enforce that via Kconfig logic
now.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
It seems that gcc 6.3 at least is smart enough to warn about the _val
variable being unassigned in the default case in the set_hdr_field()
macro, but not smart enough to figure out that the default case is never
taken. This results in warnings such as the following:
pfx##hdr32[idx].field = _val; \
^
../tools/mips-relocs.c:51:11: note: _val was declared here
uint64_t _val; \
^
../tools/mips-relocs.c:88:2: note: in expansion of macro set_hdr_field
set_hdr_field(p, idx, field, val)
^~~~~~~~~~~~~
../tools/mips-relocs.c:408:3: note: in expansion of macro set_phdr_field
set_phdr_field(i, p_filesz, load_sz);
^~~~~~~~~~~~~~
../tools/mips-relocs.c: In function main:
../tools/mips-relocs.c:77:25: warning: _val may be used uninitialized
in this function [-Wmaybe-uninitialized]
Avoid this by assigning _val = 0 in the default case, and asserting that
we didn't actually hit it for good measure.
For reference gcc 7.1.1 seems to be smart enough to not hit the above
warning without this patch.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Fixes: 011dd93ca97a ("MIPS: Stop building position independent code")
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: u-boot@lists.denx.de
This patch fixes 2 bugs introduced by the following commit
2bb5b63 MIPS: bootm: rework and fix broken bootm code
The CONFIG_IS_ENABLED macro prepends 'CONFIG_' Hence, remove CONFIG_
from CONFIG_MIPS_BOOT_ENV_LEGACY usage.
Also, 2bb5b63 reworks bootm so that linux_env_legacy runs before
linux_cmdline_legacy. However, linux_env_legacy depends on
linux_cmdline_legacy running first as linux_cmdline_init initialilzes
linux_argp which linux_env_legacy later depends on during its
initialization.
Reorder the code so that linux_cmdline_legacy runs before
linux_env_legacy.
Signed-off-by: Zubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com>
U-Boot has up until now built with -fpic for the MIPS architecture,
producing position independent code which uses indirection through a
global offset table, making relocation fairly straightforward as it
simply involves patching up GOT entries.
Using -fpic does however have some downsides. The biggest of these is
that generated code is bloated in various ways. For example, function
calls are indirected through the GOT & the t9 register:
8f998064 lw t9,-32668(gp)
0320f809 jalr t9
Without -fpic the call is simply:
0f803f01 jal be00fc04 <puts>
This is more compact & faster (due to the lack of the load & the
dependency the jump has on its result). It is also easier to read &
debug because the disassembly shows what function is being called,
rather than just an offset from gp which would then have to be looked up
in the ELF to discover the target function.
Another disadvantage of -fpic is that each function begins with a
sequence to calculate the value of the gp register, for example:
3c1c0004 lui gp,0x4
279c3384 addiu gp,gp,13188
0399e021 addu gp,gp,t9
Without using -fpic this sequence no longer appears at the start of each
function, reducing code size considerably.
This patch switches U-Boot from building with -fpic to building with
-fno-pic, in order to gain the benefits described above. The cost of
this is an extra step during the build process to extract relocation
data from the ELF & write it into a new .rel section in a compact
format, plus the added complexity of dealing with multiple types of
relocation rather than the single type that applied to the GOT. The
benefit is smaller, cleaner, more debuggable code. The relocate_code()
function is reimplemented in C to handle the new relocation scheme,
which also makes it easier to read & debug.
Taking maltael_defconfig as an example the size of u-boot.bin built
using the Codescape MIPS 2016.05-06 toolchain (gcc 4.9.2, binutils
2.24.90) shrinks from 254KiB to 224KiB.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: u-boot@lists.denx.de
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Tested-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
shim.efi (or rather gnu-efi's LibLocateProtocol() which shim.efi uses)
resolves protocols via efi_locate_handle() so the console protocols
need to be added to the efi object list.
Signed-off-by: Rob Clark <robdclark@gmail.com>
[agraf: whitespace fixes]
Signed-off-by: Alexander Graf <agraf@suse.de>
There are a bunch of protocols which should be exposed by GUID but are
not. Add a helper macro to create an efi_object, to avoid much typing.
Note that using the pointer for efiobj->handle is semi-arbitrary. We
just need a unique value to match the efiobj supporting the protocol
with the handle that LocateHandle() returns..
See LibLocateProtocol() in gnu-efi. It does LocateHandle() to find all
the handles, and then loops over them calling HandleProtocol() with the
GUID of the protocol it is trying to find.
Signed-off-by: Rob Clark <robdclark@gmail.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
Turns out this is rather useful to tracking down where things fail.
Signed-off-by: Rob Clark <robdclark@gmail.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
Boot service ProtocolsPerHandle is implemented in
efi_protocols_per_handle.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
The above CONFIG options are in Kconfig, and now have correct depends and
inter-dependencies. Migrate these to configs/ from include/configs/. In the
case of CMD_UBIFS also change it to be a default y if CMD_UBI.
Signed-off-by: Tom Rini <trini@konsulko.com>
The first argument 'type' of CreateEvent is an 32bit unsigned
integer bitmap and not an enum.
The second argument 'type' of SetTimer take values of an
enum which is called EFI_TIMER_DELAY in the UEFI standard.
To avoid confusion rename efi_event_type to efi_timer_delay.
Reported-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
If several EFI applications are executed in sequence we want
to keep the content of the EFI object list.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
The call to efi_create_event requires notification functions
flagged as EFIAPI.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Patch has also been sent to fix grub to not ignore the error returned
and treat protocol_buffer_count as valid. But that that might take a
while to trickle into distro's, so this workaround might be useful.
Signed-off-by: Rob Clark <robdclark@gmail.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
Move the logic for converting a node to text from
efi_convert_device_path_to_text to convert_device_node_to_text.
Provide a wrapper function convert_device_node_to_text_ext.
As we use only shallow device paths so we can call
directly call efi_device_node_to_text from efi_device_path_to_text.
Add output for MAC addresses.
Add output for not yet supported types/subtypes.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
efi_get_memory_map should set a defined value for map_key.
We later can introduce the test against this value in
efi_exit_boot_services as required by the UEFI standard.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Make EFI GOP support work with DM_VIDEO but without legacy LCD.
Signed-off-by: Rob Clark <robdclark@gmail.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
Want to re-use this for file protocol, which I'm working on.
Signed-off-by: Rob Clark <robdclark@gmail.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
shim.efi, for example, actually tries to parse this, but is expecting
backslashes.
Signed-off-by: Rob Clark <robdclark@gmail.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
Remove the ARCH_SUNXI and RBTREE dependencies.
CMD_UBIFS already gets RBTREE from CMD_UBI (from MTD_UBI), and should
the first become independant from the latter, there would likely be a
dependency on MTD_UBI anyway.
Cc: Boris Brezillon <boris.brezillon@free-electrons.com>
Cc: Jagan Teki <jagan@openedev.com>
Signed-off-by: Karl Beldan <karl.beldan-ext@sagemcom.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Many configs still define CMD_MTDPARTS in their non-Kconfig but
CMD_MTDPARTS has now moved to Kconfig.
Signed-off-by: Karl Beldan <karl.beldan-ext@sagemcom.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
This missing dependency has probably remained under the radar because
MTD_PARTITIONS is still whitelisted.
Signed-off-by: Karl Beldan <karl.beldan-ext@sagemcom.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
With PowerPC 4xx support removed, we have removed xilinx-ppc support as
well, remove this file now.
Fixes 98f705c9ce ("powerpc: remove 4xx support")
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Pasting longer lines into the U-Boot console prompt sometimes leads to
characters missing. One problem here is the small 16-byte FIFO of the
legacy NS16550 UART, e.g. on x86 platforms.
This patch now introduces a Kconfig option to enable RX interrupt
buffer support for NS16550 style UARTs. With this option enabled, I was
able paste really long lines into the U-Boot console, without any
characters missing.
Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
[trini: Guard ns16550_serial_remove with
CONFIG_IS_ENABLED(SERIAL_PRESENT) to match struct assignment]
Signed-off-by: Tom Rini <trini@konsulko.com>
Fixes 4bd754d8ab ("arm: omap: Detect boot mode very early") where
the intent was to store the boot params information in a known
location and pass it to SPL very early. Unfortunately it didn't
account for OMAP3 boards.
This patch adds adds this functionality back into OMAP3 boards.
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Adam Ford <aford173@gmail.com>
commit 2eb48ff7a2 ("powerpc, 8260: remove support for mpc8260")
removed support for 8260 CPU.
This patch remove some remainders.
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
Add missing .h and add missing declarations in .h
Declare local functions as static. Make interrupt_init_cpu function
signatures consistent with how decrementer_count is declared.
Based on warnings reported by 'make C=2'
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
[trini: drop cpu_init_f as 8xx/83xx are different from the rest, rework
interrupt_init_cpu/decrementer_count]
Signed-off-by: Tom Rini <trini@konsulko.com>
Avoid unnecessary assembly functions when they can easily be written
in C.
Also remove dc_read() as it is nowhere referenced
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
All complex case have been removed and we now only support
MPC866 and MPC885 families.
So check_CPU() can be made a lot simpler.
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
reginfo command is calling mpc8xx_reginfo(), mpc85xx_reginfo()
or mpc86xx_reginfo() based on CONFIG_ symbol.
As those 3 functions can't me defined at the same time, let's
rename them print_reginfo() to avoid the #ifdefs
The name is kept generic as it is not at all dependent on
powerpc arch and any other arch could want to also print
such information.
In addition, as the Makefile compiles cmd/reginfo.c only when
CONFIG_CMD_REGINFO is set, there is no need to enclose the U_BOOT_CMD
definition inside a #ifdef CONFIG_CMD_REGINFO
Lets all remove the #ifdefs around the U_BOOT_CMD as this
file is only compiled when CONFIG_CMD_REGINFO is defined
Finally, this is a PowerPC-only command, disable it on a number of
non-PowerPC platforms.
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
Signed-off-by: Tom Rini <trini@konsulko.com>
In order to avoid TBU increment due to TBL reaching its max
and wrapping, reset TBL before resetting TBU
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
The actions inside #ifdef CONFIG_8xx in arch/powerpc/lib/time.c
can be performed before, in a 8xx dedicated function.
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
It is possible to flag MAC addresses as locally administred. In this
case they don't need to be unique. This is only allowed for interfaces
which have no connection to the outside. For the TEGR1 board we use
this feature.
Cc: Heiko Schocher <hs@denx.de>
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
If we rebrand the IVM and ethaddr was set previously we need to change
ethaddr. Otherwise we end up with a wrong MAC adress for the ethernet
interface.
Cc: Heiko Schocher <hs@denx.de>
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
It is annoying to have to set up and maintain two sets of toolchains, one
for buildman and one for moveconfig.
Adjust moveconfig to make use to buildman's toolchains. This should make
things easier.
One missing feature is the ability to specify the toolchain on the command
line with a special environment variable, e.g. CROSS_COMPILE_ARM. I'm not
sure if that is useful, but if it is it could be implemented in buildman.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Add an option to specify 'all' to enable all flags. Also print an error
if an unrecognised flag is used. At present it just prints usage
information which is not very helpful.
Signed-off-by: Simon Glass <sjg@chromium.org>
Similar to what is done with OMAP5 class boards we need to
perform fixups common to this SoC class, add support for this here
and add HS fixups.
Signed-off-by: Andrew F. Davis <afd@ti.com>
If a firmware node is already present in the FDT we will fail to create
one and so fail to add our OP-TEE node, make this fixup first check for
a firmware node and then only try to add one if it is not found.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Some of the fixups currently done for OMAP5 class boards are common to
other OMAP family devices, move these to fdt-common.c.
Signed-off-by: Andrew F. Davis <afd@ti.com>
TEE loading and firewall setup are common to all omap2 devices, move
these function out of omap5 and into mach-omap2. This allows us
to use these functions from other omap class devices.
Signed-off-by: Andrew F. Davis <afd@ti.com>
When running a 'make clean' or carelessly removing u-boot.cfg, all
future make invocations (until autoconf is regenerated) will print
an error for a missing u-boot.cfg due to missing rules and dependencies.
This commit adds (i) an explicit rule dependency from all (which will
invokes the configuration checker) to cfg, and (b) adds a rule to
invoke scripts/Makefile.autoconf to regenerate u-boot.cfg.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
FreeBSD recently switch to it's BSDL dtc. While it support most of the
features of the GPL one it still lacks the incbin directive.
Add the possibility to specify which dtc we want to use for compiling dts
and generating fit image.
Signed-off-by: Emmanuel Vadot <manu@bidouilliste.com>
Acked-by: Simon Glass <sjg@chromium.org>
The Odroid C2 has two GiB of memory with two reserved regions.
reg = <0x0 0x0 0x0 0x1000000>;
reg = <0x0 0x10000000 0x0 0x200000>;
Patch
bfcef28ae4 (arm: add initial support for Amlogic Meson and
ODROID-C2) provided function dram_init_banksize to reserve the
first 16 MiB of RAM for firmware in function dram_init_banksize
in arch/arm/mach-meson/board.c and defined
CONFIG_NR_DRAM_BANKS = 1.
With this patch dram_init_banksize is changed to additionally
reserve the 2MiB region for the ARM Trusted Firmware (BL31).
CONFIG_NR_DRAM_BANKS is set to 2.
Cc: Andreas Färber <afaerber@suse.de>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
The env_nand, env_mmc and env_ubi implementations all implement
redundancy using an identical serial-number scheme. This commit
migrates them to use the implementation in env_common, which is
functionally identical.
Signed-off-by: Fiach Antaw <fiach.antaw@uqconnect.edu.au>
Reviewed-by: Tom Rini <trini@konsulko.com>
All current environments that implement redundancy use almost
identical implementations. This patch implements the env_nand
implementation as a function in env_common, and updates the
env_export function to export an env_nand-style 'flags' field by
default.
Signed-off-by: Fiach Antaw <fiach.antaw@uqconnect.edu.au>
Reviewed-by: Tom Rini <trini@konsulko.com>
If one does not already have a rule to create a custom device node when
a given device enumerates it can be useful to have udev create a
bus path based node to the entry in /dev/bus/usb that was just
enumerated. Given that DFU itself does not require a /dev entry it is a
good idea to provide a rule that will generate one.
Signed-off-by: Tom Rini <trini@konsulko.com>
Closing a file descriptor does not guarantee that the data has been
successfully saved to disk, as the kernel might defer the write.
Signed-off-by: Michael Heimpold <mhei@heimpold.de>
In efi_set_timer we receive the trigger time in intervals of 100 ns.
We should convert it to intervals of 1000 ns by 64bit division.
The patch supplies function efi_div10 that uses multiplication to
implement the missing 64 bit division.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Set up a timer event and the WaitForKey event.
In the notify function of the timer event check for console input
and signal the WaitForKey event accordingly.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
efi_set_timer is refactored to make the function callable internally.
Wrapper function efi_set_timer_ext is provided for EFI applications.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
efi_create_event is refactored to make it possible to call it
internally. For EFI applications wrapper function
efi_create_event_ext is created.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
The UEFI standard defines the type for the tpl level as EFI_TPL
alias UINTN.
UINTN is an integer is defined as an unsigned integer of native
width. So we can use size_t for the definition.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Up to now the boot time supported only a single event.
This patch now allows four events.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
In our implementation the internal structure of events is known.
So use the known type instead of void.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
If efi_free_pool is called with argument NULL an illegal memory
access occurs.
So let's check the parameter on entry.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
The efi_loader currently stops iterating over the available
block devices stopping at the first device that fails.
This may imply that no block device is found.
With the patch efi_loader only iterates over valid devices.
It is based on patch
06d592bf52f6 (dm: core: Add uclass_first/next_device_check())
which is currently in u-boot-dm.git.
For testing I used an odroid-c2 with a dts including
&sd_emmc_a {
status = "okay";
};
This device does not exist on the board and cannot be initialized.
Without the patch:
=> bootefi hello
## Starting EFI application at 01000000 ...
WARNING: Invalid device tree, expect boot to fail
mmc_init: -95, time 1806
Found 0 disks
Hello, world!
## Application terminated, r = 0
With the patch:
=> bootefi hello
## Starting EFI application at 01000000 ...
WARNING: Invalid device tree, expect boot to fail
mmc_init: -95, time 1806
Scanning disk mmc@70000.blk...
Scanning disk mmc@72000.blk...
Card did not respond to voltage select!
mmc_init: -95, time 9
Scanning disk mmc@74000.blk...
Found 3 disks
Hello, world!
## Application terminated, r = 0
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Currenty any EFI status other than EFI_SUCCESS is reported as
Application terminated, r = -22
With the patch the status code returned by the EFI application
is printed.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
efi.h held only a few EFI status codes.
The patch adds the missing definitions for later usage.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
The Unified Extensible Firmware Interface Specification, version 2.7,
defines in chapter 2.1.2 - UEFI Application that an EFI application may
either directly return or call EFI_BOOT_SERVICES.Exit().
Unfortunately U-Boot makes the incorrect assumption that
EFI_BOOT_SERVICES.Exit() is always called.
So the following application leads to a memory exception on the aarch64
architecture when returning:
EFI_STATUS efi_main(
EFI_HANDLE handle,
EFI_SYSTEM_TABlE systable) {
return EFI_SUCCESS;
}
With this patch the entry point is stored in the image handle.
The new wrapper function do_enter is used to call the EFI entry point.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
ConvertPathToText is implemented for
* type 4 - media device path
* subtype 4 - file path
This is the kind of device path we hand out for block devices.
All other cases may be implemented later.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
[agraf: fix whitespace]
Signed-off-by: Alexander Graf <agraf@suse.de>
The UEFI specification requires that LocateProtol finds the first
handle supporting the protocol and to return a pointer to its
interface.
So we have to assign the protocols to an efi_object and not use
any separate storage.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Four protocols per object is too few to run iPXE.
Let's raise the number of protocols per object to eight.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
UEFI boot service LocateHandleBuffer is implemented by calling
efi_allocate_handle and efi_locate_handle.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
To implement LocateHandleBuffer we need to call efi_locate_handle
internally without running through EFI_EXIT.
So put EFI_ENTRY and EFI_EXIT into a new wrapper function
efi_locate_handle_ext.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Implement InstallMultipleProtocolInterfaces in function
efi_install_multiple_protocol_interfaces by repeatedly
calling efi_install_protocol_interface.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
For the implementation of UninstallMultipleProtocolInterfaces we
need to call efi_uninstall_protocol_interface. In internal calls
we should not pass through EFI_EXIT.
The patch introduces a wrapper function
efi_uninstall_protocol_interface_ext.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
For the implementation of InstallMultipleProtocolInterfaces we
need to call efi_install_protocol_interface. In internal calls
we should not pass through EFI_EXIT.
The patch introduces a wrapper function
efi_install_protocol_interface_ext.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Without the patch efi_uninstall_protocol_interface always returns an
error.
With the patch protocols without interface can be uninstalled.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
efi_install_protocol_interface up to now only returned an error code.
The patch implements the UEFI specification for InstallProtocolInterface
with the exception that it will not create new handles.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Add all parameter checks for function efi_open_protocol that do not
depend on a locking table.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
efi_open_protocol was implemented to call a protocol specific open
function to retrieve the protocol interface.
The UEFI specification does not know of such a function.
It is not possible to implement InstallProtocolInterface with the
current design.
With the patch the protocol interface itself is stored in the list
of installed protocols of an efi_object instead of an open function.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
[agraf: fix efi gop support]
Signed-off-by: Alexander Graf <agraf@suse.de>
DTB is encoded in big endian. When we retrieve property values,
we need to use fdt32_to_cpu (aka be32_to_cpu) for endian conversion.
This is a bit error-prone, but sparse is useful to detect endian
mismatch.
We need to use (fdt32_t *) instead of (u32 *) for a pointer of a
property value. Otherwise sparse warns "cast to restricted __be32".
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
get_enable should be able to return error values. Hence change
the return type to integer.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
get_enable should be able to return error values. Hence change
the return type to integer.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
get_enable should be able to return error values. Hence change
the return type to integer.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
get_enable should be able to return error values. Hence change
the return type to integer.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
get_enable should be able to return error values. Hence change
the return type to integer.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
get_enable should be able to return error values. Hence change
the return type to integer.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
get_enable should be able to return error values. Hence change
the return type to integer.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
get_enable should be able to return error values. Hence change
the return type to integer.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
get_enable should be able to return error values. Hence change
the return type to integer.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
get_enable should be able to return error values. Hence change
the return type to integer.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
get_enable should be able to return error values. Hence change
the return type to integer.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
When CONFIG_BLK is enabled, the hwpart id is different with legacy
interface, update it to kame driver work with CONFIG_BLK.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Move CONFIG_CMD_SATA option to Kconfig to fix the following build
error:
In file included from include/configs/mx6cuboxi.h:137:0,
from include/config.h:7,
from include/common.h:21,
from common/env_common.c:11:
include/config_distro_bootcmd.h:161:2: error: expected '}' before 'BOOT_TARGET_DEVICES_references_SATA_without_CONFIG_SATA'
BOOT_TARGET_DEVICES_references_SATA_without_CONFIG_SATA
Reported-by: Stefano Babic <sbabic@denx.de>
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Since commit ce412b79e7 ("drivers: net: phy: atheros: add separate
config for AR8031") Ethernet does not work on mx6sabreauto.
This commit correctly assigns ar8031_config() as the configuration
function for AR8031 in the same way as done in the Linux kernel.
However, on mx6sabreauto design we need some additional configurations,
such as enabling the 125 MHz AR8031 output and setting the TX clock
delay that need to be done in the board file.
This is the equivalent fix from commit 4b6035da48 ("mx6sabresd: Make
Ethernet functional again").
Reported-by: Miquel RAYNAL <miquel.raynal@free-electrons.com>
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Replace fdtaddr and rdaddr variable names with u-boot standard names
fdt_addr_r and ramdisk_addr_r.
This will make the use of pxe boot more easy.
Signed-off-by: Patrick Bruenn <p.bruenn@beckhoff.com>
Add support for Falcon mode and explain in the README the steps to
boot the kernel directly without loading the full U-Boot.
Signed-off-by: Diego Dorta <diego.dorta@nxp.com>
Acked-by: Fabio Estevam <fabio.estevam@nxp.com>
warp can run different kernel versions, such as NXP 4.1 or
mainline.
Currently the rootfs location is passed via mmcblk number and the
problem with this approach is that the mmcblk number for the eMMC
changes depending on the kernel version.
In order to avoid such issue, use UUID method to specify the rootfs
location.
Succesfully tested booting a NXP 4.1 and also a mainline 4.12 kernel.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Acked-by: Otavio Salvador <otavio@ossystems.com.br>
Currently the rootfs location is passed via mmcblk number and the
problem with this approach is that the mmcblk number for the eMMC
changes depending on the kernel version.
In order to avoid such issue, use UUID method to specify the rootfs
location.
Also add CONFIG_BOOTCOMMAND to run finduuid function and distro_bootcmd.
This change was made based on U-Boot commit:
- ca4f338e2e
Signed-off-by: Fabio Berton <fabio.berton@ossystems.com.br>
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Currently the rootfs location is passed via mmcblk number and the
problem with this approach is that the mmcblk number for the eMMC
changes depending on the kernel version.
In order to avoid such issue, use UUID method to specify the rootfs
location.
This change was made based on U-Boot commit:
- ca4f338e2e
Signed-off-by: Fabio Berton <fabio.berton@ossystems.com.br>
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Currently the rootfs location is passed via mmcblk number and the
problem with this approach is that the mmcblk number for the eMMC
changes depending on the kernel version.
In order to avoid such issue, use UUID method to specify the rootfs
location.
This change was made based on U-Boot commit:
- ca4f338e2e
Signed-off-by: Fabio Berton <fabio.berton@ossystems.com.br>
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
mx6sabre boards can run different kernel versions, such as NXP 4.1 or
mainline.
Currently the rootfs location is passed via mmcblk number and the
problem with this approach is that the mmcblk number for the eMMC
changes depending on the kernel version.
In order to avoid such issue, use UUID method to specify the rootfs
location.
Succesfully tested booting a NXP 4.1 and also a mainline kernel on a
mx6qsabresd and mx6dlsabreauto.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
WEIM cannot be used when I2C3 is enabled due to pin conflict, so keep
WEIM disabled by default.
I2C3 controls GPIO I2C expander (USB host and OTG have VBUS controlled by
the GPIO I2C expander), magnetometer, accelerometer.
Not disabling WEIM in U-Boot causes I2C3 to behave badly when booting
a NXP 4.1 kernel, which leads to probe failure on several devices,
including the lack of USB:
imx_usb 2184000.usb: Can't register ci_hdrc platform device, err=-517
By keeping WEIM disabled in U-Boot these kernel issues are gone.
Reported-by: Takashi Matsuzawa <tmatsuzawa@xevo.com>
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
CONFIG_SYS_FSL_ESDHC_FORCE_VSELECT is not the correct method
to set I/O to 1.8. To boards that does not support vqmmc-supply,
use vs18_enable in fsl_esdhc_cfg. If regulator is supported,
use fixed 1.8V regulator for vqmmc-supply.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Handle vqmmc supply. Some boards have a fixed I/O voltage
at 1.8V for emmc, so the usdhc also needs to be configured
as 1.8V by setting VSELECT bit. The vs18_enable is the one
that used to checking whether setting VSELECT or not in
the driver. So if vqmmc supply is 1.8V, set vs18_enable,
the driver will set VSELECT.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
When using eMMC with 1.8V I/O, the VSELECT bit need to be set in
the USDHC controller when init.
This patch adds a parameter "vs18_enable" in fsl_esdhc_cfg
structure and priv data, so each controller can have different
settings.
We could not use CONFIG_SYS_FSL_ESDHC_FORCE_VSELECT, it has problem
that it will apply to all USDHC controllers and it only set the 1.8V
at init phase. So if user does not select to the eMMC device,
the voltage on the I/O pins are not correct.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
The type should be int, not u8. cfg->wp_enable will finally be
assigned to priv->wp_enable whose type is int.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
As mx6sabreauto supports SPL now, all variants can boot using the same
defconfig.
This patch:
- Removes non-SPL targets.
- Renames target to mx6sabreauto_defconfig.
- Renames folder and board files to mx6sabreauto.
- Updates MAINTAINERS, Makefile and Kconfig accordingly.
- Removes .cfg files.
- Adds a README with instructions to build and flash SPL and u-boot.img.
Signed-off-by: Vanessa Maegima <vanessa.maegima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Add support for mx6q, mx6dl and mx6qp sabreauto boards in SPL.
Retrieved the mx6q DCD table from:
board/freescale/mx6qsabreauto/imximage.cfg
Retrieved the mx6dl DCD table from:
board/freescale/mx6qsabreauto/mx6dl.cfg
Retrieved the mx6qp DCD table from:
board/freescale/mx6qsabreauto/mx6qp.cfg
Flashed SPL and u-boot.img to an SD card and could successfully boot it
on mx6q, mx6qp and mx6dl sabreauto boards.
Signed-off-by: Vanessa Maegima <vanessa.maegima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
The Cubox-i and Hummingboard series of devices have an option of
SATA on board, and depending on how the fuses are blown even the
option to boot SPL from SATA. So enable support for it so it can
be used to boot the OS from if people desire.
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Acked-by: Fabio Estevam <fabio.estevam@nxp.com>
This change sets the VLDO4 settings output to 2.8V in PMIC
initialization so that the MIPI DSI/CSI input voltage is 2.8V
as per the schematics. The original code provides an output of
3.3V which violates the voltage mentioned in the schematics.
Signed-off-by: Gautam Bhat <mindentropy@gmail.com>
Acked-by: Fabio Estevam <fabio.estevam@nxp.com>
Currently the following build error is seen when a board using MMC SPL
is built and the MXS nand driver is also selected:
arch/arm/cpu/armv7/built-in.o: In function `arch_cpu_init':
arch/arm/cpu/armv7/mx6/soc.c:432: undefined reference to 'mxs_dma_init'
On mx6 the only user of mxs_dma_init() is the mxs nand driver, so
move it there.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
When CONFIG_DM_ETH is set, the FEC ethernet controller is reset after
the PHY has been set up and initialzed. This breaks the communication
with the PHY and results in an inoperable ethernet interface.
Do the initialization with CONFIG_DM_ETH in the same order as with
legacy ETH support to fix this.
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
imx6qdl_icore_mmc_defconfig => imx6qdl_icore_rqs_defconfig
Since icorem6_rqs support MMC/eMMC boot, so doesn't need
to name it explicitly.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Document the binding for the Broadcom STB SoCs wake-up timer node
allowing the system to generate alarms and exit low power states.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Add support for the debug UART to assist with early debugging.
Enable it for i.CoreM6 as an example.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
- Remove space between #define to macro
- Add tab between macro and value
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Move the common baud generation code into _mxc_serial_setbrg
so-that dm and non-dm can call this func.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Move the common initialization code into _mxc_serial_init
so-that dm and non-dm can call this func.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Control reg write should be part of setbrg for better
buadrate generation, so move cr1 and cr2 write to
mxc_serial_setbrg
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Use RFDIV in dm-code instead of numeric value, so-that
it can be common for dm and non-dm.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This patch will add common reg space for non-dm and
dm code and non-dm reg space can be accessed using
mxc_base.
This will
- get rid of __REG volatile assignments
- Make common reg_space by removing unneeded macros
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
i.MX 6UL and 6ULL have different boot device capabilities and
use therefor use a different boot device selection table than
other i.MX 6 devices. Particularly, the value which has been
used so far (b0001) is assigned to QSPI boot for these two
devices.
There is no common reserved value for all i.MX 6devices. Use
b0010 for i.MX 6UL and 6ULL via compile time ifdef.
Reported-by: Joël Esponde <joel.esponde@honeywell.com>
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Tested-by: Joël Esponde <joel.esponde@honeywell.com>
There is no need to add a 100us delay after the DDR initialization.
Other imx6 boards do not have such delay either, so simply remove it.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
SPL is already selected via CONFIG_SPL=y, so there is no need
to pass it inside CONFIG_SYS_EXTRA_OPTIONS.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
SPL is already selected via CONFIG_SPL=y, so there is no need
to pass it inside CONFIG_SYS_EXTRA_OPTIONS.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
SPL is already selected via CONFIG_SPL=y, so there is no need
to pass it inside CONFIG_SYS_EXTRA_OPTIONS.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
SPL is already selected via CONFIG_SPL=y, so there is no need
to pass it inside CONFIG_SYS_EXTRA_OPTIONS.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
The verify_header callback in kwbimage.c only verifies v0 headers checksum.
Running 'mkimage -l' on a v1 image gives the following misleading output:
GP Header: Size ae000000 LoadAddr 34160600
Implement support for v1 headers. For that, factor out the header checksum code
to a separate main_hdr_checksum_ok() routine. This routine relies on the fact
that the checksum field offset is the same in both v0 and v1 headers. With this
patch applied 'mkimage -l' correctly identifies the image:
Image Type: MVEBU Boot from sdio Image
Image version:1
Data Size: 398904 Bytes = 389.55 KiB = 0.38 MiB
Load Address: 007fffc0
Entry Point: 00800000
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Stefan Roese <sr@denx.de>
The offset marking in kwbimage.h is inconsistent. main_hdr_v0 uses decimals,
main_hdr_v1 uses hex without '0x' prefix, secure_hdr_v1 uses hex with '0x'
prefix. Make all offset marks hex with '0x' prefix.
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Stefan Roese <sr@denx.de>
Currently, Marvell Armada8k development board use 3 different
defconfigs:
mvebu_db-88f7040-nand_defconfig
mvebu_db-88f7040_defconfig
mvebu_db-88f8040_defconfig
Having 3 different defconfigs makes maintenance difficult.
This patch removes the defconfigs mentioned above and introduce
a new defconfig which represents the Armada8k family.
NOTE:
In order not to break automatic tools compilation,
a default device-tree is set in the defconfig (armada-8040-db).
However, when compiling u-boot, the user MUST explicitly export
the DEVICE_TREE for the requested board because using A80x0
device-tree on A70x0 might break the device.
For more information, refer to "doc/README.marvell" (intoduced
in this patch).
Change-Id: I98515b6306498358f3722ecf7ac4c87f236ebbd8
Signed-off-by: Igal Liberman <igall@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
The Turris Omnia is a open-source router created by CZ.NIC.
The code is based on the Marvell/db-88f6820-gp by Stefan Roese
with modifications from Tomas Hlavacek in the CZ.NIC turris-omnia-uboot
repository, which can be found at
https://gitlab.labs.nic.cz/turris/turris-omnia-uboot
By default, the Turris Omnia uses btrfs as the main and only filesystem,
and also loads kernel and device tree from this filesystem. Since U-Boot
does not yet support btrfs, you should not flash your Turris Omnia board
with this unless you know what you are doing.
Signed-off-by: Tomas Hlavacek <tomas.hlavacek@nic.cz>
Signed-off-by: Marek Behun <marek.behun@nic.cz>
create mode 100644 board/CZ.NIC/turris_omnia/Makefile
create mode 100644 board/CZ.NIC/turris_omnia/kwbimage.cfg
create mode 100644 board/CZ.NIC/turris_omnia/turris_omnia.c
create mode 100644 configs/turris_omnia_defconfig
create mode 100644 include/configs/turris_omnia.h
Signed-off-by: Stefan Roese <sr@denx.de>
This module can be found on the Turris Omnia board connected
via the I2C interface.
Among some cryptographic functions, the chip has a 512 bit
One Time Programmable memory, 88 byte configuration memory
and 512 byte general purpose memory.
The Turris Omnia stores serial number and device MAC address in
the OTP memory.
This commit adds basic support for reading the EEPROM and also
exposes the chips Random Number Generator.
The driver is based on code by
Josh Datko, Cryptotronix, jbd@cryptotronix.com
and also
Tomas Hlavacek, CZ.NIC, tomas.hlavacek@nic.cz
Signed-off-by: Tomas Hlavacek <tomas.hlavacek@nic.cz>
Signed-off-by: Marek Behun <marek.behun@nic.cz>
create mode 100644 drivers/misc/atsha204a-i2c.c
create mode 100644 include/atsha204a-i2c.h
Signed-off-by: Stefan Roese <sr@denx.de>
This I2C mux is found, for example, on the Turris Omnia board.
Signed-off-by: Marek Behun <marek.behun@nic.cz>
Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
This device tree is taken from mainline Linux kernel commit
7b7db5ab. Added is also a -u-boot.dtsi file with these additions:
- aliases for I2C and SPI devices are added, because i2cmux and
SPI flash doesn't work otherwise
- spi_flash node has been added so that the new DM API works
- the ATSHA204A node is added in the i2c@5 node
- "u-boot,dm-pre-reloc"s are added in needed nodes for SPL
build to work correctly
Signed-off-by: Marek Behun <marek.behun@nic.cz>
create mode 100644 arch/arm/dts/armada-385-turris-omnia-u-boot.dtsi
create mode 100644 arch/arm/dts/armada-385-turris-omnia.dts
Signed-off-by: Stefan Roese <sr@denx.de>
The Orion watchdog can be found on some Marvell Armada chips.
This driver is based on the code by Tomas Hlavacek in the CZ.NIC
turris-omnia-uboot repository, which can be found at
https://gitlab.labs.nic.cz/turris/turris-omnia-uboot, and that
one is based on code by Sylver Bruneau. His code is already in
mainline Linux kernel.
The code uses the new driver model API.
Signed-off-by: Tomas Hlavacek <tomas.hlavacek@nic.cz>
Signed-off-by: Marek Behun <marek.behun@nic.cz>
create mode 100644 drivers/watchdog/orion_wdt.c
Signed-off-by: Stefan Roese <sr@denx.de>
The DDR3 training code for Marvell A38X currently computes 1t timing
when given board topology map of the Turris Omnia, but Omnia needs 2t.
This patch adds support for enforcing the 2t timing in struct
hws_topology_map, through a new enum hws_timing, which can assume
following values:
HWS_TIM_DEFAULT - default behaviour, compute whether to enable 2t
from the number of CSs
HWS_TIM_1T - enforce 1t
HWS_TIM_2T - enforce 2t
This patch also sets all the board topology maps (db-88f6820-amc,
db-88f6820-gp, controlcenterdc and clearfog) to have timing set to
HWS_TIM_DEFAULT.
Signed-off-by: Marek Behun <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
The declaration of otg*_plat and otg*_board_data is guarded by
CONFIG_USB_MUSB_*, but their use in arch_misc_init is not. The
ifdef flow goes something like:
if (CONFIG_USB_MUSB_* && other_conditions)
declare usb_data
if (other_conditions)
use usb_data
Thus when CONFIG_USB_MUSB_* is not declared, we try to use the
data structures, but these structures aren't defined.
To fix this, move the USB initialization code into the same #ifdef
which guards the declaration of the data structures. Since the DM_USB
vs legacy cases are completely different, use two versions of
arch_misc_init(), for readability.
Signed-off-by: Alexandru Gagniuc <alex.g@adaptrum.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
When CONFIG_CMD_FASTBOOT or CONFIG_USB_FUNCTION_FASTBOOT are defined
in am335x_evm.h, a dependency on g_dnl.c is created. This in turn
creates a dependency on having USB gadget enabled.
As a result we can't create configs with USB gadget disabled.
Since these CONFIG_ variables are now part of kconfig, move them to
the board defconfigs, and out of am335x_evm.h. This both preserves
current defaults, and allows creating configs with USB gadget off.
Signed-off-by: Alexandru Gagniuc <alex.g@adaptrum.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
The TI816x has 2 GPIO banks. For bank 0 we had been clearing the enable
bit when setting BIT(8). Correct this by setting it to BIT(1) | BIT(8)
after we set and wait for BIT(1) (aka PRCM_MOD_EN). Enable GPIO1 as
well so that when CMD_GPIO is enabled it won't crash probing the second
bank. Enable CMD_GPIO on ti816x_evm.
Signed-off-by: Tom Rini <trini@konsulko.com>
The ti816x SoC revision of the ethernet IP block is handled by the
"davinci_emac" driver, rather than the "cpsw" driver as done by later
members of the family. Enable the relevant plumbing.
Signed-off-by: Sriramakrishnan <srk@ti.com>
Signed-off-by: Vitaly Wool <vitaly.wool@konsulko.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Make make nand_info array static, since all direct users of nand_info array
have been converted to use get_nand_dev_by_index() API.
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
As part of preparation for nand DM conversion the new API has been
introduced to remove direct access to nand_info array. So, use it here
instead of accessing to nand_info array directly.
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: York Sun <york.sun@nxp.com>
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
As part of preparation for nand DM conversion the new API has been
introduced to remove direct access to nand_info array. So, use it here
instead of accessing to nand_info array directly.
Reviewed-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
As part of preparation for nand DM conversion the new API has been
introduced to remove direct access to nand_info array. So, use it here
instead of accessing to nand_info array directly.
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Reviewed-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
As part of preparation for nand DM conversion the new API has been
introduced to remove direct access to nand_info array. So, use it here
instead of accessing to nand_info array directly.
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
As part of preparation for nand DM conversion the new API has been
introduced to remove direct access to nand_info array. So, use it here
instead of accessing to nand_info array directly.
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
As part of preparation for nand DM conversion the new API has been
introduced to remove direct access to nand_info array. So, use it here
instead of accessing to nand_info array directly.
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
As part of preparation for nand DM conversion the new API has been
introduced to remove direct access to nand_info array. So, use it here
instead of accessing to nand_info array directly
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
As part of preparation for nand DM conversion the new API has been
introduced to remove direct access to nand_info array. So, use it here
instead of accessing to nand_info array directly.
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
As part of preparation for nand DM conversion the new API has been
introduced to remove direct access to nand_info array. So, use it here
instead of accessing to nand_info array directly
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
As part of preparation for nand DM conversion the new API has been
introduced to remove direct access to nand_info array. So, use it here
instead of accessing to nand_info array directly.
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
As part of preparation for nand DM conversion the new API has been
introduced to remove direct access to nand_info array. So, use it here
instead of accessing to nand_info array directly.
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
As part of preparation for nand DM conversion the new API has been
introduced to remove direct access to nand_info array. So, use it here
instead of accessing to nand_info array directly.
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
As part of preparation for nand DM conversion the new API has been
introduced to remove direct access to nand_info array. So, use it here
instead of accessing to nand_info array directly.
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
As part of preparation for nand DM conversion the new API has been
introduced to remove direct access to nand_info array. So, use it here
instead of accessing to nand_info array directly.
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
As part of preparation for nand DM conversion the new API has been
introduced to remove direct access to nand_info array. So, use it here
instead of accessing to nand_info array directly.
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
nand_info is used all over the file so abstract it with
get_nand_dev_by_index() which will help for DM conversion.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
DTB is encoded in big endian. When we retrieve property values,
we need to use fdt32_to_cpu (aka be32_to_cpu) for endian conversion.
This is a bit error-prone, but sparse is useful to detect endian
mismatch.
We need to use (fdt32_t *) instead of (u32 *) for a pointer of a
property value. Otherwise sparse warns "cast to restricted __be32".
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Include <dm/util.h> to fix sparse warnings:
symbol 'dm_dump_all' was not declared. Should it be static?
symbol 'dm_dump_uclass' was not declared. Should it be static?
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
This function returns the pointer to the value of a node property.
The current name ofnode_read_prop() is confusing. Follow the naming
of_get_property() from Linux.
The return type (const u32 *) is wrong. DT property values can be
strings as well as integers. This is why of_get_property/fdt_getprop
returns an opaque pointer.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Simon Glass <sjg@chromium.org>
Fix sparse warnings "... was not declared. Should it be static?"
Also, fix redefinition of dm_warn/dm_dbg.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
While the previous pass through fixed one place where we knew that
fdt_getprop would be given a positive len, in the case of 'fdt set' we
do not, so check that we did no get NULL from fdt_getprop().
Cc: Simon Glass <sjg@chromium.org>
Reported-by: Coverity (CID: 163249)
Fixes 72c98ed1ab ("fdt: Add a check to do_fdt() for coverity")
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Many tegra boards have the console UART node disabled. With livetree this
prevents serial from working since it does not 'force' the console to be
bound. Updates the affected boards to fix this error.
The boards were checked with:
for b in $(grep tegra boards.cfg |grep -v integrator | \
awk '{print $7}' | sort); do
echo $b;
fdtgrep -c nvidia,tegra20-uart b/$b/u-boot.dtb |grep okay;
done
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Tested-on: Beaver, Jetson-TK1
This error condition should have a debug() message. Add it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Tested-on: Beaver, Jetson-TK1
Add support for a live device tree to the core serial uclass.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Tested-on: Beaver, Jetson-TK1
This function is quite long. Move the core code into a separate function
in preparation for adding livetree support.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Tested-on: Beaver, Jetson-TK1
Update this driver to support a live device tree.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Tested-on: Beaver, Jetson-TK1
Update these two files so include files in the right order.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Tested-on: Beaver, Jetson-TK1
Add some debugging to show when the backlight is enabled.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Anatolij Gustschin <agust@denx.de>
Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Tested-on: Beaver, Jetson-TK1
Update this driver to support a live device tree.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Anatolij Gustschin <agust@denx.de>
Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Tested-on: Beaver, Jetson-TK1
We should sync the display (e.g. flush cache) when backspace is pressed
to ensure that the character is erased correctly.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Anatolij Gustschin <agust@denx.de>
Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Tested-on: Beaver, Jetson-TK1
Enable full bootstage support so we can time SPL and U-Boot.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Tested-on: Beaver, Jetson-TK1
The error handling code does not current detect an error right away.
Adjust it to return immediately.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Tested-on: Beaver, Jetson-TK1
Enable this to allow debugging when the serial UART driver is
misconfigured.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Tested-on: Beaver, Jetson-TK1
Calculate the time taken to set up the LCD.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Tested-on: Beaver, Jetson-TK1
The of_n_addr_cells() and of_n_size_cells() functions are useful for
getting the size of addresses in a node, but in a few places U-Boot needs
to obtain the actual property value for a node without walking up the
stack. Add functions for this and just the existing code to use it.
Add a comment to the existing ofnode functions which do not do the right
thing with a flat tree.
This fixes a problem reading PCI addresses.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Tested-on: Beaver, Jetson-TK1
This function allows a device's status to be read. This indicates whether
the device should be enabled or disabled.
Note: In normal operation disabled devices will not be present in the
driver-model tree.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Tested-on: Beaver, Jetson-TK1
Add a function which reads resources from a device, such as the device
hardware address. This uses the "reg" property in the device.
Unlike other functions there is little sense in inlining this when
livetree is not being used because it has some logic in it and this would
just bloat the code size.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Tested-on: Beaver, Jetson-TK1
This provides a way to find the number of strings in a string list. Add it
and also fix up the comment for ofnode_read_string_index().
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Tested-on: Beaver, Jetson-TK1
If a system module is named the same as one of those used by binman we
currently pick the system module. Adjust the ordering so that our modules
are chosen instead.
The module conflict reported was 'tools' from jira-python. I cannot access
that package to test it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reported-by: Kevin Hilman <khilman@baylibre.com>
Acked-by: Kevin Hilman <khilman@baylibre.com>
Currently we have code which prints out platform data at the start of SPL.
Now that we have tests for dtoc this is probably not necessary. Drop it.
Update test_ofplatdata to check for empty output since it is useful to
check that sandbox_spl works as expected.
Signed-off-by: Simon Glass <sjg@chromium.org>
This function uses several separate string replaces where a regular
expression might seem more reasonable. Add a comment justifying the way it
is currently done.
Signed-off-by: Simon Glass <sjg@chromium.org>
Collect the main logic of dtoc into a function and put it into
dtb_platdata. This will allow tests to use this function instead of
duplicating the code themselves.
Signed-off-by: Simon Glass <sjg@chromium.org>
Rather than using static functions within the class, move them out of the
class. This will make it slightly easier for tests to call them.
Signed-off-by: Simon Glass <sjg@chromium.org>
This option is the only one actually used by the dtb_platdata class. Pass
it explicitly to avoid needing to pass the whole option object to the
constructor.
Signed-off-by: Simon Glass <sjg@chromium.org>
To simplify running tests we should move this class into its own file.
This allows the tests to import it without having to import dtoc.py, which
runs the tests.
Signed-off-by: Simon Glass <sjg@chromium.org>
By using a Kconfig parser we can find the location of each option in the
Kconfig tree. Using the information from the database we can then
automatically add an 'imply' option into the right place if requested by
the user.
Add a -a option to support adding 'imply' options. Display the location of
any existing 'imply' option so that progress can be examined. Add a -A
option to hide any existing 'imply' options so that already-completed
additions need not be considered further.
Also add documentation for this feature.
Signed-off-by: Simon Glass <sjg@chromium.org>
Sometimes it is useful to display CONFIG_TARGET or CONFIG_CMD configs. Add
an option to control this.
Also we generally ignore implying configs which affect fewer than 5
boards. But sometimes it is useful to show those those, so add an option
that reduces the minimum to two.
ERRATUM configs are never useful for implying things, so ignore those.
Signed-off-by: Simon Glass <sjg@chromium.org>
It is useful to be able to process only a subset of boards to save time.
Often that subset is defined by the defconfig files in a git commit. This
change allows things like:
# Build the database
./tools.moveconfig.py -b
# Find some implying configs
./tools/moveconfig.py -i CONFIG_X
# Add some 'imply' statements to Kconfig files
./tools/moveconfig.py -i CONFIG_X -a CONFIG_A,CONFIG_B
# Reprocess the defconfig files to see if we can drop some changes
git show --stat | ./tools/moveconfig.py -s -d -
# Update the commit, with fewer defconfig changes
gii commit -au
Where the commit contains defconfig files, this will reprocess them to
take account of the imply statements that you added.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present sandbox has a special case where it directly calls os_putc()
when it does not have a console yet.
Now that we have the pre-console buffer enabled we can drop this. Any
early characters will be buffered and output later.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Enable the pre-console buffer, displaying the model and post-relocation
console announce on sandbox. Also add a model name to the device tree.
This allows testing of these features.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
At present this feature casts the address to a pointer. Use the
map_sysmem() function so that it will work correctly on sandbox.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Add a simple test to make sure that these functions obey the buffer size
passed into them.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
At present the U-Boot banner is only displayed on the serial console. If
this is not visible to the user, the banner does not show. Some devices
have a video display which can usefully display this information.
Add a banner which is printed after relocation only on non-serial devices
if CONFIG_DISPLAY_BOARDINFO_LATE is defined.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Move the display options code into a separate function so that the U-Boot
banner can be obtained from other code. Adjust the 'version' command to
use it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
As a demonstration of how to use SCSI with driver model, move link over
to use this. This patch needs more work, but illustrates the concept.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This function should not be used with driver model. Update the code to
reflect this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Some AHCI drivers use SCSI under the hood. Rather than making the AHCI
driver be in the SCSI uclass it makes sense to have the AHCI device create
a SCSI device as a child. That way we can handle any AHCI-specific
operations rather than trying to pretend tha the device is just SCSI.
To handle this we need to provide a way for AHCI drivers to bind a SCSI
device as its child, and probe it. Add functions for this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Split out the code that scans a single SCSI bus into a separate function.
This will allow it to be used from driver model.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Change this function to return an error number instead of true/false.
This allows us to return a proper error number.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
The SCSI uclass currently has no operations. It just uses the global SCSI
functions. Fix this by adding operations to the only two drivers that use
the uclass, and replacing the global functions with those defined locally
in the SCSI code.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
With driver model we need to define implementations of exec() and
bus_reset() separately for each SCSI driver. As a first step, create a
local version of each function in the AHCI driver and call each from its
global version.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
The 'mode' parameter is actually a flag to determine whether to display
a list of devices found during the scan. Rename it to reflect this, add a
function comment and adjust callers to use a boolean.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
With driver model these functions need a device pointer. Add one even
when CONFIG_DM_SCSI is not defined. This avoids having ugly conditional
function prototypes, When CONFIG_DM_SCSI is not defined we can just ignore
the pointer.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Add operations for SCSI. These are not yet implemented, but we have the
struct.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
With driver model we cannot have static data or assume that there is only
one device of each time. Adjust the code so that 'probe_ent' is not needed
with driver model. Add a new ahci_init_dm() function which can init AHCI
for driver model without re-allocating the uclass data. Move over the only
existing driver to use this new function.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Two AHCI drivers use SCSI with CONFIG_DM_SCSI. The SCSI uclass calls
scsi_low_level_init() which is implemented by ahci.c. If
CONFIG_SCSI_AHCI_PLAT is defined it does one thing and if it is not
it does something else.
We don't need to call through scsi_low_level_init() to get the init
completed. Instead, adjust the two drivers to call into AHCI directly.
Drop the post-probe init in the SCSI uclass. This means that driver model
doesn't need to use scsi_low_level_init(). It is a legacy function and
driver model should use a driver's probe() method instead.
While we are here, add a comment to the top of the file explaining what
ahci.c does.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This code is duplicated. Create a ahci_start_ports() function to handle
this and call it from both places.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
These are very confusing without some sort of indentation. At some point
we will be able to remove them, but for now, indent them.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
With driver model we need each device to have its own state. As a step
towards this, restrict use of the global 'probe_ent' to just a few places
in the file. This will allow us to add driver-model functions which can
pass the correct data around.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This array relates to the AHCI controller so should be exist out on its
own in the file. Move it into the structure. Adjust functions that need
access to this to take the structure as a parameter.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This is not a very useful name since once it is probed it still hangs
around. With driver model we will use uclass data for this, so rename the
struct.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
At present the two driver-model SCSI drivers use device platform data to
store information that relates to the uclass. It is better to use uclass
platform data in this situation. Update the code to do this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
We should not be using typedefs in U-Boot and 'ccb' is a pretty short
name. It is also used with variables. Drop the typedef and use 'struct'
instead.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This name should be lower case. Also the _block suffix is superfluous.
Rename it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Put the driver-model declarations first since we are migrating to that.
Also drop scsi_init() when driver model is used.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
At present we have the SCSI drivers in the drivers/block and common/
directories. It is better to split them out into their own place. Use
drivers/scsi which is what Linux does.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
At present we have the SATA and PATA drivers mixed up in the drivers/block
directory. It is better to split them out into their own place. Use
drivers/ata which is what Linux does.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
At present CONFIG_CMD_SATA enables the 'sata' command which also brings
in SATA support. Some boards may wish to enable SATA without the command.
Add a separate CONFIG to permit this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This function is only defined by one driver and is empty. Move it into
the SCSI implementation itself. We could remove it, but it should be
useful for debugging.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This driver is for a PowerPC board that will likely be removed soon.
Rather than converting it to driver model, drop it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Sometimes a node will have multiple compatible strings. Drivers may use
one or the other so the best approach seems to be to #define them to be
equivalent.
Update dtoc to support this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Kever Yang <kever.yang@rock-chips.com>
Make minor changes to README.gpt and sandbox_defconfig to support
testing of the gpt command's functionality in the sandbox.
Signed-off-by: Alison Chaiken <alison@peloton-tech.com>
The instructions for creating a disk image that are presently in
README.sandbox fail because sfdisk doesn't know about GPT.
Signed-off-by: Alison Chaiken <alison@peloton-tech.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Some CONFIG options can be implied by others and this can help to reduce
the size of the defconfig files. For example, CONFIG_X86 implies
CONFIG_CMD_IRQ, so we can put 'imply CMD_IRQ' under 'config X86' and
all x86 boards will have that option, avoiding adding CONFIG_CMD_IRQ to
each of the x86 defconfig files.
Add a -i option which searches for such options.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
Add a -b option which scans all the defconfigs and builds a database of
all the CONFIG options used by each. This is useful for querying later.
At present this only works with the separate -b option, which does not
move any configs. It would be possible to adjust the script to build the
database automatically when moving configs, but this might not be useful
as the database does not change that often.
Signed-off-by: Simon Glass <sjg@chromium.org>
The newest clean-up features are not mentioned in the docs. Fix this and
add a few hints for particular workflows that are hopefully helpful.
Signed-off-by: Simon Glass <sjg@chromium.org>
It is convenient to provide the full patch to the defconfig files in some
situations, e.g. when the file was generated by a shell command (e.g.
'ls configs/zynq*').
Add support for this, and move the globbing code into a function with its
own documentation.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add aliases for mmc controller to get a fixed order with
emmc at index 0 and sdmmc at index 1.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Sometimes it is useful to iterate through all devices in a uclass and
skip over those which do not work correctly (e.g fail to probe). Add two
new functions to provide this feature.
The caller must check the return value each time to make sure that the
device is valid. But the device pointer is always returned.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add some tests which check the behaviour of uclass_first_device() and
uclass_next_device() when probing of a device fails.
Signed-off-by: Simon Glass <sjg@chromium.org>
SDMMC-PWREN is a pin to control voltage for SDMMC IO, it may
be high active or low active, the dwmmc driver always assume
the sdmmc-pwren as high active.
Kernel treat this pin as fixed regulator instead of a pin from
controller, and then it can set in dts file upon board schematic,
that's a good solution, we can also do this in u-boot.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
The phyCORE-RK3288 is a SoM (System on Module) containing a RK3288 SoC.
The module can be connected to different carrier boards.
It can be also equipped with different RAM, SPI flash and eMMC variants.
The Rapid Development Kit option is using the following setup:
- 1 GB DDR3 RAM (2 Banks)
- 1x 4 KB EEPROM
- DP83867 Gigabit Ethernet PHY
- 16 MB SPI Flash
- 4 GB eMMC Flash
Add basic support for the PCM-947 carrier board, a RK3288 based development
board made by PHYTEC. This board works in a combination with
the phyCORE-RK3288 System on Module.
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Enabling CONFIG_SPL_POWER_SUPPORT will cause a compiler warning:
‘get_ldo_reg’ defined but not used [-Wunused-function]
Let's wrap get_ldo_reg(), rk808_ldo and rk818_ldo with ENABLE_DRIVER
which is only set for non SPL builds.
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
This change migrates the USB_DWC2 configuration item to Kconfig
and runs moveconfig to adjust header files and defconfig.
Signed-off-by: Meng Dongyang <daniel.meng@rock-chips.com>
Split off into a separate patch:
Ran moveconfig to migrate other boards:
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Some address relevant varibable is defined originally as u64. To
compatible with arm32, this patch change them to uintptr_t type.
Signed-off-by: Eric Gao <eric.gao@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
According to rk3288 spec, the pwm register order is:
PWM_PWM0_CNT,
PWM_PWM0_PERIOD_HPR,
PWM_PWM0_DUTY_LPR,
PWM_PWM0_CTRL
but the source code's order is:
struct rk3288_pwm {
u32 cnt;
u32 duty_lpr;
u32 period_hpr;
u32 ctrl;
};
So, correct it here. It is the same as RK3399.
Signed-off-by: Eric Gao <eric.gao@rock-chips.com>
Edited the commit message:
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
The origin patch get rockchip dwmmc by name 'ciu', which lead
to the SPL not able to remove 'clock-names' node in dts.
I'm not saying this is not correct, but I would prefer to handle
this in dts or clock driver to save memory for SPL.
For example the rk3288 SPL size has out of memory if not enable
BACK_TO_BROM option, there are many other SoCs has less internal
memory than rk3288.
This reverts commit 480a9b834c.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Enable mmc_dw_rockchip driver, disable CONFIG_SPL_OF_PLATDATA
first for some dependence patches still not merged.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Tested-by: Vagrant Cascadian <vagrant@debian.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Rockchip rk322x sysreset is much like rk3036 and other Rockchip SoCs,
only difference is that the target register address is different.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Add sdram driver in U-Boot for get the correct sdram size from
sys_reg, so that U-Boot can co-work with Rockchip loader or SPL
to get different dram capability and then tell the kernel.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Add sdram driver in U-Boot for get the correct sdram size from
sys_reg, so that U-Boot can co-work with Rockchip loader or SPL
to get different dram capability and then tell the kernel.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
There are some functions like sdram_size_mb can be re-used for
different rockchip SoCs, just put them into common file.
Add board_get_usable_ram_top() for ram_top init base on
SDRAM_MAX_SIZE.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Added SDRAM_MAX_SIZE definition for RK3036:
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
fixup: 3036 fix for sdram_common
With the new dev_read functions available, we can convert the rockchip
architecture-specific drivers and common drivers used by these devices
over to the dev_read family of calls.
This covers the DRAM controller initialisation for the RK3188, RK3288
and RK3399... all of these read some of the tuning/setup/timing
parameters from the device-tree.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
With the new dev_read functions available, we can convert the rockchip
architecture-specific drivers and common drivers used by these devices
over to the dev_read family of calls.
This covers the serial driver (ns16550 and compatible) used for the
Rockchip devices.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
With the new dev_read functions available, we can convert the rockchip
architecture-specific drivers and common drivers used by these devices
over to the dev_read family of calls.
This covers the Gigabit Ethernet MAC (i.e. common designware driver and
rockchip-specific wrapper).
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
With the new dev_read functions available, we can convert the rockchip
architecture-specific drivers and common drivers used by these devices
over to the dev_read family of calls.
This covers the dw_mmc and sdhci wrapper drivers for Rockchip.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
With the new dev_read functions available, we can convert the rockchip
architecture-specific drivers and common drivers used by these devices
over to the dev_read family of calls.
This change covers the USB3 (xhci) driver for the Rockchip devices.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
With the new dev_read functions available, we can convert the rockchip
architecture-specific drivers and common drivers used by these devices
over to the dev_read family of calls.
This change covers the rk_spi.c (SPI driver) used in Rockchip devices.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
With the new dev_read functions available, we can convert the rockchip
architecture-specific drivers and common drivers used by these devices
over to the dev_read family of calls.
This change covers the pinctrl drivers for the Rockchip devices.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
ARCH_OMAP2 has been renamed ARCH_OMAP2PLUS in commit a93fbf4a78
("ARM: omap2+: rename config to ARCH_OMAP2PLUS and consolidate Kconfig")
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
To set wait state, a hard coded value is used instead of using
latency parameter. stm32_flash_latency_cfg() is currently used
in arch/arm/mach-stm32/stm32f4/clock.c and in
drivers/clk/clk_stm32f7.c with, in both case, "5" as parameter.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
The size of the secure image does not include the size of the
header, subtract this out before we move the image or we grab
extra data after the image.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
gpio2 is used to detect lcd based on which pin mux is done in SPL.
gpio7 is used to enable vtt regulator. Enable these two gpio nodes
in SPL.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Enable spl_early_init() so that spl can use
DT very early during boot.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
ROM stores the boot params information in a known location
and passes it to SPL. This information needs to be copied
very early during boot or else there is a chance of getting
corrupted by SPL. So move this boot device detection very early
during boot.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
This port adds support for:
1) Serial
2) eMMC
3) USB
It has been tested with ARM TRUSTED FIRMWARE running u-boot as the
BL33 executable [see board's README]
eMMC has been tested for reading and booting the loader and linux
kernels as well as saving the u-boot environment.
USB has been tested with ASIX networking adapter and SanDisk 7.4GB
drive.
PSCI has been tested via the reset call (PSCI executes from DDR)
The firwmare upgrade process has been tested via TFTP and USB FAT
filesystem containing the fastboot.bin image in one of the partitions.
Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
This driver is used in another board; remove board information from
the driver debug log.
Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
set_state_ops is kept under PINCTRL_FULL flag in order
to decrease memory footprint in some configuration.
PINCTRL_FULL can be enabled for debug purpose.
Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Include K2G ICE to OF_LIST so it can be used for runtime board
detection.
Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
K2G ICE evm will have its own dtb. Therefore, add it to the list of dtbs
located in the appended U-boot dtb FIT image. Therefore, when swapping out
dtbs K2G ICE boards can grab the correct one.
Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Add basic DT support for K2G ICE evm. Only minimal peripherals are
supported to allow console output and MMC boot.
Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Disable netcp by default like all other peripherals in the dtsi file.
Enable the peripheral explicitly in the board specific dts file.
Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Upstream Linux has the unit address being added to the various 66AK2Gx
boards dts. Therefore, update the dts to mimic this change.
Also remove memory node from the base K2G dtsi file.
Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Adding the unit address to the memory node was causing the below error:
Warning (reg_format): "reg" property in /memory has invalid length
(8 bytes) (#address-cells == 2, #size-cells == 2)
Further debugging showed that this was due to the memory node added by
default to skeleton.dtsi which was being included in keystone-k2g.dtsi.
Adding a missing node was all that was needed to remove this deprecated
dtsi file from the SoC dtsi. With skeleton.dtsi removed the dtc compiler
no longer complained about including the unit address for the memory node.
Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Enable CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG to allow "board_name" to
be set depending on the board it is being ran on.
Update findfdt to use this new dynamic board_name value to determine
which dtb should be used.
Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Certain peripherals used by K2G GP aren't used on K2G ICE evm. Or
configuration is slightly different. Therefore, use board detection to
deal with these variations.
Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Some code doesn't apply to K2G ICE evm. Therefore, use board detection to
wrap these calls.
Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Add configuration settings used by the K2G ICE evm. Also use board
detection to determine which DDR3 configuration to use.
Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Add basic pinmux data for new K2G ICE evm. Also add pinmuxing for a
generic K2G evm which includes I2C 0 and 1 used for board detection
purposes.
Since multiple K2G boards are supported that means initially generic
pinmuxing should be used when board detection hasn't ran. Once board
detection runs the proper pinmuxing can be reran to match the board
being ran on.
Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Add a function that can be used to determine if the board being ran on is
a K2G Industrial Communication Engine EVM or K2G General Purpose EVM based
on values programmed on the EEPROM.
Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Different K2G evms may need to program the various
KS2_DDRPHY_DATX8_X_OFFSET registers in different ways. Therefore, use
the mask and val registers for each KS2_DDRPHY_DATAX_X_OFFSET to
properly program the register.
Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
K2G GP doesn't require the MR2 register to be programed since the
default is good enough. However, newer K2G boards do need to change
this register value. Therefore, instead of not writing this register if
ran on a K2G board just program the value to be written to match the
default/reset value.
Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Future boards will need to configure DDR3 registers in a slightly
different manner. Support this by defining additional variables and
defines that will be utilized later.
Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Enable various config options to allow U-boot at runtime to select the
proper dtb to use from the list of dtb's within the FIT image.
Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Some K2G evms have their EEPROM programming while most do not. Therefore,
add EEPROM board detection to be used as the default method and fall back
to the alternative board detection when needed.
Also reorder board configuration. Perform bare minimal configuration
initially since board detection hasn't ran. Finish board configuration
once the board has been identified.
Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Now with support for U-boot runtime dtb selection each board needs to
define board_fit_config_name_match so U-boot can determine what the
correct dtb is within the FIT blob.
Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
For K2G, runtime DTB selection utilizes the embedded_dtb_select function.
Therefore, define the function which will perform a EEPROM read and then
retries selecting the correct dtb now that it can detect which board its
on. For other Keystone devices use an empty function since they will still
use the embedded FIT functionality but their FIT will only contain a single
dtb.
Most production K2G boards do not have their EEPROM programmed. Therefore,
perform a test to verify a K2G GP is currently being used and if it is then
set the values normally set by a EEPROM read.
Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
u-boot.bin is a copy of:
u-boot-fit-dtb.bin if CONFIG_FIT_EMBED is enabled,
u-boot-dtb.bin if CONFIG_OF_SEPARATE is enabled,
u-boot-nodtb.bin if DT is not enabled.
So, use u-boot.bin to to generate keystone images instead of
u-boot-dtb.bin
Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Add additional make targets and options for building embedded FIT U-boot
images.
Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Runtime U-boot dtb selection is generally a two step process. First step
is to simply use an initial generic dtb. The second step is to select
the dtb and perhaps execute additional code ones U-boot knows what board
it is running on. Embedded_dtb_select handles the second step by allowing
board specific code to run and perform what ever necessary configuration
that is needed.
Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
With U-boot runtime board detect for DTB selection a "default" dtb needs
to be created. This will be used temporarily until the "proper" dtb is
selected.
Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Introduce K2G evm specific dtsi file for U-boot specific configurations.
This will help seperate U-boot only configurations thus making it easier to
keep device tree files synced between U-boot and Linux.
For now only add nodes to allow i2c drivers to be probed early during
the boot process.
Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
OF_LIST will be useable by SPL and U-boot. Therefore, update its
dependency to allow it to be enable by either SPL or U-boot specific
config option.
Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Acked-by: Andrew F. Davis <afd@ti.com>
When the EEPROM is first read its contents are stored in memory as a
cache to avoid further I2C operations. To determine if the EEPROM was
previously read the easiest way is to check the memory to see if the
EEPROM's magic header value is set. Create a new function that can
determine if the EEPROM was previously read or not without having to
perform a I2C transaction.
Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
This patch gives U-boot the runtime support to have the board specific
code decide which FDT to use. This is especially useful for devices
that need this type of runtime determination and also doesn't use SPL.
Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Some platforms may append a FIT image to the U-boot image. This function
aids in parsing the FIT image and selecting the correct DTB at runtime.
Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Some of the functions within spl_fit will be used for non spl purposes.
Instead of duplicating functions simply break the functions to be reused
into its own file.
Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
[trini: Only add the new define to image.h, otherwise we see breakage
due to massive include leakage into host tools in some cases]
Signed-off-by: Tom Rini <trini@konsulko.com>
In some situations the EEPROM used for board detection may not be
programmed or simply programmed incorrectly. Therefore, it may be
necessary to "simulate" reading the contents of the EEPROM to set
appropriate variables used in the board detection code.
This may also be helpful in certain boot modes where doing i2c reads
may be costly and the config supports running only a specific board.
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Franklin S Cooper Jr. <fcooper@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
With Davinci I2C switching to device model, K2E requires U-boot specific
device tree entries. This is only required for I2C 1 which is needed
extremely early during the boot process.
Fixes: 1743d040b1 ("ARM: keystone: Enable DM_I2C by default")
Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
If the value of either "nand options" or "bbt options" has a zero in
the most significant nibble, the '0x' prefix will be isolated from the
value like shown below:
|Device 0: nand0, sector size 128 KiB
| Page size 2048 b
| OOB size 64 b
| Erase size 131072 b
| subpagesize 2048 b
| options 0x40000200
| bbt options 0x 60000
Change the format string to produce leading zeroes filling the gap.
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
This error code has not been upstreamed and is not really needed since it
is unlikely to be triggered. Drop it to maintain compatability with
upstream.
Reported-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
It's been a while since I've touched U-Boot on the Raspberry Pi and
other things have been taking my time. Drop my maintainership for this
port.
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
CS Systemes d'Information (CSSI) manufactures two boards, named MCR3000
and CMPC885 which are respectively based on MPC866 and MPC885 processors.
This patch adds support for the first board.
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
For processors whose core runs at twice the bus frequency,
the fallback frequency calculation in Linux provides a wrong
result. Therefore, U-boot needs to pass the correct value.
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
Reviewed-by: Heiko Schocher <hs@denx.de>
immap.c used to be common to several CPUs. It is now
only linked to the 8xx, so this patch moves it into
arch/powerpc/cpu/mpc8xx/
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
Reviewed-by: Heiko Schocher <hs@denx.de>
CS Systemes d'Information (CSSI) manufactures 8xx boards for
critical communication systems. Those boards have been
running U-Boot since 2010 and will have to be maintained
until at least 2027.
commit 5b8e76c35e
("powerpc, 8xx: remove support for 8xx") orphaned those boards
by removing support for the mpc8xx CPU.
This commit partially restores support for the 8xx, with the
following limitations:
- Restores support for MPC866 and MPC885 only
- Does not restore IDE, PCMCIA, I2C, USB
- Does not restore examples
- Does not restore POST
- Does not restore Ethernet on SCC
- Does not restore console on SCC
- Does not restore bedbug and kgdb support
As the 866 and 885 do not support the following features,
they are not restored either:
- VIDEO / LCD
- RTC clock
The CPM uCODE patch is not restored either, because:
- 866 and 885 already have support for I2C and SPI relocation
without a uCODE patch
- relocation of SMC, I2C or SPI is only needed for using SCCs
for Ethernet or QMC
The dynamic setup/calculation of clocks is removed, we
expect the target being use with the clock and PLPRCR register
defined in the configuration.
All the clock settings for 8xx prior to 866 is removed as
well as we now only support 866 and 885.
This code is mature and addresses mature boards. Therefore
all code enclosed in '#if 0/#endif' and '#if XX_DEBUG/#endif'
is unneeded.
The following files are not restored by this patch:
- arch/powerpc/cpu/mpc8xx/bedbug_860.c
- arch/powerpc/cpu/mpc8xx/fec.h
- arch/powerpc/cpu/mpc8xx/kgdb.S
- arch/powerpc/cpu/mpc8xx/plprcr_write.S
- arch/powerpc/cpu/mpc8xx/scc.c
- arch/powerpc/cpu/mpc8xx/upatch.c
- arch/powerpc/cpu/mpc8xx/video.c
- arch/powerpc/include/asm/status_led.h
- arch/powerpc/lib/ide.c
- arch/powerpc/lib/ide.h
- doc/README.MPC866
- drivers/pcmcia/mpc8xx_pcmcia.c
- drivers/rtc/mpc8xx.c
- drivers/usb/gadget/mpc8xx_udc.c
- drivers/video/mpc8xx_lcd.c
- examples/standalone/test_burst.c
- examples/standalone/test_burst.h
- examples/standalone/test_burst_lib.S
- examples/standalone/timer.c
- include/mpc823_lcd.h
- include/usb/mpc8xx_udc.h
- post/cpu/mpc8xx/Makefile
- post/cpu/mpc8xx/cache.c
- post/cpu/mpc8xx/cache_8xx.S
- post/cpu/mpc8xx/ether.c
- post/cpu/mpc8xx/spr.c
- post/cpu/mpc8xx/uart.c
- post/cpu/mpc8xx/usb.c
- post/cpu/mpc8xx/watchdog.c
Some of the restored files are not located in a proper location.
In order to keep traceability of the changes, they will be
moved to their correct location and moved to Kconfig in a
followup patch.
This patch also declares CSSI as point of contact for the update
of the 8xx platform, as those boards are the only ones still
being maintained on the 8xx area. A later patch will add
those boards to the tree.
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
On startup the SL50 board halt at U-Boot prompt. Use CONFIG_AUTOBOOT_KEYED
to enable autoboot for this board and define the <SPACE> key to get the
U-Boot prompt.
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
since commit
'd5abcf94c7123167725fc22ace342f0d455093c1' -
ti: boot: Register the MMC controllers in SPL in the same way as in u-boot
MMC boot on brppt1 board is broken, with this commit we make our board
working again.
Signed-off-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
There is no need to duplicate same option with different name.
Kill HW_WATCHDOG_TIMEOUT_MS in favor of WATCHDOG_TIMEOUT_MSECS.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
AVR32 is gone. It's already more than two years for no support in Buildroot,
even longer there is no support in GCC (last version is heavily patched 4.2.4).
Linux kernel v4.12 got rid of it (and v4.11 didn't build successfully).
There is no good point to keep this support in U-Boot either.
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
The current code gives a warning:
arch/arm/mach-stm32/stm32f7/soc.c: In function 'arch_cpu_init':
arch/arm/mach-stm32/stm32f7/soc.c:38:2: error: 'for' loop initial
declarations are only allowed in C99 or C11 mode
for (int i = 0; i < ARRAY_SIZE(stm32_region_config); i++)
^
arch/arm/mach-stm32/stm32f7/soc.c:38:2: note: use option -std=c99,
-std=gnu99, -std=c11 or -std=gnu11 to compile your code
Fix it by moving the declaration to the top of the function.
Signed-off-by: Simon Glass <sjg@chromium.org>
Series-cc trini
The 82xx board mgcoge3ne was removed from the codebase, so this is dead
code.
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Cc: Heiko Schocher <hs@denx.de>
Reviewed-by: Heiko Schocher <hs@denx.de>
The Odroid C2 comes with several expansion options such as an RTC module.
As these expansions are not considered in the Linux device tree they have
to be enabled via device tree overlays.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Since commit 5b9d44df23 (mkimage: Display a better list of available image
types) mkimage usage text suggest to "use -T to see a list of available image
types". Unfortunately, commit 02221f29deb8 (mkimage: Convert to use getopt())
broke that feature, because getopt() fails when -T has no option argument.
Add a pseudo image type name 'list' that lists all image types. Update the
usage text accordingly.
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
CHIP and CHIP Pro devices have options of DIP addon boards some of which need
overlays from the beginning so it makes sense to enable device tree overlays.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
96boards CE devices such as the DragonBoard and Hikey devices have numerous
mezzanine options some of which need overlays from the beginning so it makes
sense to enable device tree overlays.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
TI am33xx devices such as the BeagleBone devices have numerous cape options such
as screens some of which need overlays from the beginning so it makes sense to
enable evice tree overlays.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Raspberry Pi has numerous HAT and other HW expansion options such as screens and
cameras some of which need overlays from the beginning so it makes sense to
enable evice tree overlays.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
This actually works on snapdragon.. not sure why we weren't using it.
Fixes reboot/poweroff when using UEFI.
Signed-off-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Alexander Graf <agraf@suse.de>
Fastmap significantly reduces flash scan time, enable it by default.
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Acked-by: Heiko Schocher <hs@denx.de>
Fastmap was always enabled in ubispl, make it selectable by
CONFIG_MTD_UBI_FASTMAP.
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Acked-by: Heiko Schocher <hs@denx.de>
Add missing static to serial_stub_puts().
Unexport serial_stub_{getc,tstc} because they are used locally.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
If a relocation type is not supported loading the EFI binary
should be aborted.
Writing a message only is insufficient.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
[agraf: use a() != b coding style]
Signed-off-by: Alexander Graf <agraf@suse.de>
The efi-next tree lives on github, not the usual denx git.
Reflect this in the MAINTAINERS file so that people can
find it.
Signed-off-by: Alexander Graf <agraf@suse.de>
UEFI spec 2.7 indicates that HandleProtocol can be implemented
by calling OpenProtocol with
attributes = EFI_OPEN_PROTOCOL_BY_HANDLE_PROTOCOL.
Currently we pass attributes = 0 to efi_open_protocol. 0 is not a
valid value when calling OpenProtocol. This does not cause any errors
yet because our implementation of OpenProtocol is incomplete.
We should pass the correct value to enable a fully compliant
implementation of OpenProtocol in the future.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
There was for long time no activity in the 4xx area.
We need to go further and convert to Kconfig, but it
turned out, nobody is interested anymore in 4xx,
so remove it.
Signed-off-by: Heiko Schocher <hs@denx.de>
Add some of the invalid parameter checks described in the UEFI
specification for CreateEvent(). This does not include checking
the validity of the type and tpl parameters.
Signed-off-by: Jonathan Gray <jsg@jsg.id.au>
Acked-By: Heinrich Schuchardt <xypron.glpk@gmx.de>
[agraf: fix checkpatch.pl indent warning]
Signed-off-by: Alexander Graf <agraf@suse.de>
The UEFI specification states that the tpl, function and context
arguments are to be ignored if neither EVT_NOTIFY_WAIT or
EVT_NOTIFY_SIGNAL are specified. This matches observed behaviour with
an AMI EDK2 based UEFI implementation.
Skip calling the notify function if neither flag is present.
Signed-off-by: Jonathan Gray <jsg@jsg.id.au>
Acked-By: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
When running bootefi, we allocate new space but never check whether
the allocation succeeded. This patch adds a check so that in case
things go wrong, we at least know they did.
Signed-off-by: Alexander Graf <agraf@suse.de>
doc/README.fsl-clk was removed in commit
5b8e76c35e ("powerpc, 8xx: remove support for 8xx")
allthought CONFIG_SYS_FSL_CLK is defined in
arch/arm/cpu/armv8/fsl-layerscape/Kconfig and still in use
in the following configs:
./include/configs/mx53loco.h:21:#define CONFIG_SYS_FSL_CLK
./include/configs/m53evk.h:16:#define CONFIG_SYS_FSL_CLK
./include/configs/mx25pdk.h:17:#define CONFIG_SYS_FSL_CLK
./include/configs/usbarmory.h:14:#define CONFIG_SYS_FSL_CLK
./include/configs/ls1021aqds.h:14:#define CONFIG_SYS_FSL_CLK
./include/configs/mx53cx9020.h:22:#define CONFIG_SYS_FSL_CLK
./include/configs/colibri_vf.h:17:#define CONFIG_SYS_FSL_CLK
./include/configs/mx35pdk.h:21:#define CONFIG_SYS_FSL_CLK
./include/configs/woodburn_common.h:19:#define CONFIG_SYS_FSL_CLK
./include/configs/mx7_common.h:25:#define CONFIG_SYS_FSL_CLK
./include/configs/ls1021aiot.h:12:#define CONFIG_SYS_FSL_CLK
./include/configs/ls1021atwr.h:14:#define CONFIG_SYS_FSL_CLK
./include/configs/mx53ard.h:21:#define CONFIG_SYS_FSL_CLK
./include/configs/mx53smd.h:21:#define CONFIG_SYS_FSL_CLK
./include/configs/mx51evk.h:16:#define CONFIG_SYS_FSL_CLK
./include/configs/mx6_common.h:31:#define CONFIG_SYS_FSL_CLK
./include/configs/vf610twr.h:14:#define CONFIG_SYS_FSL_CLK
./include/configs/mx53evk.h:21:#define CONFIG_SYS_FSL_CLK
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
Reviewed-by: Heiko Schocher <hs@denx.de>
The author of the commit discovered later on that this was already being
done in cleanup_before_linux() on arch/arm/cpu/armv7m/cpu.c.
This reverts commit 8f079cccb3.
Signed-off-by: Tom Rini <trini@konsulko.com>
Discern the SoMs based on the presence of SPI flash to support both
variants of the SoM, one booting from SPI NOR and one booting from
eMMC.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Andreas Bießmann <andreas.devel@googlemail.com>
The redesigned version of the SoM which was released onto the market
does no longer contain SPI flash, but boots from the eMMC. Move the
environment storage to the eMMC.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Andreas Bießmann <andreas.devel@googlemail.com>
Continue loading U-Boot from MMC2 when the SPL was loaded using SAM-BA
loader. This allows the board to boot system from the removable media
instead of the eMMC, which is useful for commissioning purposes. When
booting from the eMMC, always boot from it as it is not possible to
boot from the SD interface directly.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Andreas Bießmann <andreas.devel@googlemail.com>
The SoM has been redesigned to work around bug in the SoC and is now
capable of booting from the eMMC. Add support for booting from eMMC.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Andreas Bießmann <andreas.devel@googlemail.com>
The SDHCI1 is the primary boot controller on rev. 2.1 SoM, which
is the version available on the market. Swap the controller order
to match this and future versions of the SoM.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Andreas Bießmann <andreas.devel@googlemail.com>
Init the controllers, otherwise the board cannot boot from SD/MMC.
This boot option is new on rev. 2.1 SoM .
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Andreas Bießmann <andreas.devel@googlemail.com>
The CAN controllers need slight delay between toggling of their reset
line. Move this action into board_init(), otherwise timer will not be
initialized and the board might hang.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Andreas Bießmann <andreas.devel@googlemail.com>
According to the datasheet, sequential mapping is used for DDR
SDRAM, while interleaved mapping is used for regular SDRAM.
Incorrect configuration of this bit does indeed cause sporadic
memory instability.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Andreas Bießmann <andreas.devel@googlemail.com>
Cc: Wenyou Yang <wenyou.yang@atmel.com>
ARC HS Development Kit board is a new low-cost
development platform sporting ARC HS38 in real silicon
with nice set of features such as:
* Quad-core ARC HS38 with 512 kB L2 cache and running @1GHz
* 4Gb of DDR (we use only lowest 1Gb out of it now)
* Lots of DesigWare peripherals
* Different connectivity modules:
- Synopsys HAPS HT3
- Arduino-compatible connector
- MikroBUS
This initial commit supports the following peripherals:
* UART (DW 8250)
* Ethernet (DW GMAC)
* SD/MMC (DW Mobile Storage)
* USB 1.1 & 2.0
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
We used to use the same memory layout and size for a couple of
boards and thus we just hardcoding IOC aperture start and size.
Now when we're getting more boards with more memory on board we
need to have an ability to set IOC so it matches real DDR layout
and size.
Even though it is not really a must but for simplicity we assume
IOC covers all the DDR we have, that gives us a chance to not
bother where DMA buffers are allocated - any part of DDR is OK.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
With deprecation of I2C EEPROM we we left without a permamnent
storage for U-Boot environment, but luckily we may simply use SD-card
with FAT partition for that.
Having environment on SD-card is much more convenient as it
allows us to preserve all the settings when moving from one board to
another. Moreover instead of 256 bytes of EEPROM we're now virtually
unlimited in stuff being placed in environment like complicated scripts
etc which are usually required in case of full-scale distros.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
With eb5ba3aefd "i2c: Drop use of CONFIG_I2C_HARD" in place we
cannot use I2C EEPROM any longer so we're dropping all references to
both EEPROM and I2C which was only used for EEPROM.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Simon Glass <sjg@chromium.org>
ARCompact cores are not supposed to be used in SMP designs
(this doesn't stop people from creation of heterogeneous chips,
for an example keep reading) so there's no point in
checking ARCNUM and halting somebody if we build for ARC700.
Moreover on AXS101 board we have ARC770 in the ASIC together with
other ARC cores and ARC770 happens to be the last node in JTAG chain
with ARCNUM = 4. And existing check halts the one and only core we
want keep running.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
since commit: f8b7fff1d5 "serial: atmel_usart: Add clk support"
taurus board comes not up anymore. Fix it.
Signed-off-by: Heiko Schocher <hs@denx.de>
Acked-by: Wenyou Yang <wenyou.yang@microchip.com>
since commit 842778a091 dfu-util shows serial="UNDEFINED".
to see here again a serial number, we have to call
g_dnl_set_serialnumber().
Signed-off-by: Heiko Schocher <hs@denx.de>
since commit: f8b7fff1d5 "serial: atmel_usart: Add clk support"
smartweb board comes not up anymore. Fix it.
Signed-off-by: Heiko Schocher <hs@denx.de>
Acked-by: Wenyou Yang <wenyou.yang@microchip.com>
fix warnings:
drivers/usb/gadget/at91_udc.c:1344:12: warning: 'at91rm9200_udc_init' defined but not used [-Wunused-function]
drivers/usb/gadget/at91_udc.c:1379:13: warning: 'at91rm9200_udc_pullup' defined but not used [-Wunused-function]
drivers/usb/gadget/at91_udc.c:1476:12: warning: 'at91sam9263_udc_init' defined but not used [-Wunused-function]
Signed-off-by: Heiko Schocher <hs@denx.de>
The CONFIG_DEFAULT_FDT_FILE expects just the file not a full path
as that might vary depending on the variant of Linux distro you
might be using.
Cc: Martin Donnelly <martin.donnelly@ge.com>
Cc: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Acked-by: Fabio Estevam <fabio.estevam@nxp.com>
Some Kconfig options are defined in a line with leading spaces/tabs.
Update build-whitelist/check-config scripts to handle such cases.
Generate a new config_whitelist.txt with new scripts.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
The origin SPL_USE_ARCH_MEMSET/MEMCPY use same prompt message
as USE_ARCH_MEMSET/MEMCPY, which makes it's hard to distinguish
them in menuconfig interface. This patch gives them different
prompt messages for spl and none-spl config.
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
After the commit SHA1: 842778a091 - the serial number descriptor is only
visible when we have non zero length of g_dnl_serial.
However, on some platforms (e.g. Siemens) the serial number is set at
g_dnl_bind_fixup(), so with the current code we will always omit the
serial (since it is not set).
This commit moves the g_dnl_bind_fixup() call before the g_dnl_serial
length test.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Acked-by: Heiko Schocher <hs@denx.de>
Tested-by: Heiko Schocher <hs@denx.de>
The ti816x SoC revision of the ethernet IP block is handled by the
"davinci_emac" driver, rather than the "cpsw" driver as done by later
members of the family. Enable the relevant plumbing.
Signed-off-by: Sriramakrishnan <srk@ti.com>
Signed-off-by: Vitaly Wool <vitaly.wool@konsulko.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
This reverts commit ddb3ac3c71.
With MMC converted to driver model, SCSI driver is broken due to
zero address access at (ops->read) in block_dread() function.
The fix (SCSI driver converted to DM) is ready in u-boot-dm branch,
but it is too late for this relese to get that in.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Fix warnings reported by sparse:
- ... was not declared. Should it be static?"
- cast to restricted __be32
While fixing those, the type conflict of cci500_init() was found.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
fix menutext for the options SPL_DM_SERIAL and TPL_DM_SERIAL.
Both have the same text as DM_SERIAL, which is
confusing.
Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
for debugging it is handy to know the fdt_blob
address. So print it in bdinfo.
Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Otherwise the loaded image would miss the efi_runtime sections, and fall
over hard when grub (for example) tried to call runtime services located
in this section.
Signed-off-by: Rob Clark <robdclark@gmail.com>
commit dfe64e2c89
Author: Sergey Lapin <slapin@ossfans.org>
Date: Mon Jan 14 03:46:50 2013 +0000
mtd: resync with Linux-3.7.1
modified onenand_block_markbad to call mtd_block_markbad,
but as _block_markbad function pointer used by mtd_block_markbad
to do actual job is by default pointing back to
onenand_block_markbad there is no way this function ever
finishes its job.
Fix it by changing function body according current (4.12-rc6)
linux implementation.
Tested on IGEPv2 board with Muxed OneNAND(DDP) 512MB containing
several unerasable blocks this function marked bad.
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Current implementation is unable to access second half of
DDP OneNAND flash (reads first half mirrored). Use block
and bufferram address calculations from onenand_base to
fix this.
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Define a default number of 1 for mmc max device if board config didn't
specify one.
Signed-off-by: Emmanuel Vadot <manu@bidouilliste.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The variable syndrome_codes is only used when DEBUG is define, add #if
guards around it in the same style as the rest of the file.
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Stefan Roese <sr@denx.de>
On the controlcenterd_36BIT_SDCARD config we get a warning about
prg_stage1_prepare being unused. Move the declaration closer to usage
and hide under the existing #if tests.
Cc: Dirk Eibach <eibach@gdsys.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Now that we can specify DT nodes that can be used in spl, mark
all necessary nodes as u-boot,dm-spl.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Now that we can specify DT nodes that can be used in spl, mark
all necessary nodes as u-boot,dm-spl.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
It has been observed that between PG1.0 and PG2.0/2.1 depending on
which device we boot from, we may see a different value here than is
documented in the TRM. Update the values for NAND and MMC1 based on
real life usage on each revision.
Signed-off-by: Tom Rini <trini@konsulko.com>
If north bridge selection register bit1 is clear, pins [10:8] are for
SDIO0 Resetn, Wakeup, and PDN while if bit1 is set, pins [10:8]are for
GPIO; when bit1 is clear, pin 9 and pin 10 can be used for uart2 RTSn
and CTSn, so bit1 should be added to uart2 group and it must be set
for both "gpio" and "uart" functions of uart2 group.
Signed-off-by: Ken Ma <make@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Kostya Porotchkin <kostap@marvell.com>
Cc: Gregory CLEMENT <gregory.clement@free-electrons.com>
Cc: Nadav Haklai <nadavh@marvell.com>
Cc: Wilson Ding <dingwei@marvell.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
As all x86 boards have been switched over to use DM USB, remove
CONFIG_USB_MAX_CONTROLLER_COUNT which is not used by DM USB.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
GPIO bank E pin 8 & 9 are used to control the on-board two USB ports
VBUS on/off. Let's configure them in the misc_init_r().
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
Xilinx changes for v2017.07
ZynqMP:
- config cleanup
- SD LS mode support
- psu_init* cleanup
- unmap OCM
- Support for SMC
Zynq:
- add ddrc to Kconfig
- add topic-miamilite board support
On ARCH_SUNXI we've been selecting these targets for a long time if
SUPPORT_SPL is set. However, Lichee Pi Zero is the first platform we've
added that does support SPL but does not build SPL and has exposed a
latent bug. Both of these symbols depend on SPL not SUPPORT_SPL, so we
need to update our select here otherwise we get a Kconfig warning.
Fixes: f02abb0608 ("sunxi: add support for Lichee Pi Zero")
Signed-off-by: Tom Rini <trini@konsulko.com>
The commit "fb82fe385173 configs: Resync defconfigs" resynced all config
files. This exposed two latent issues with the Gen3 boards in that we
had not been setting CONFIG_DEFAULT_FDT_FILE correctly and had not been
setting CONFIG_CMD_MMC. Fix both of these.
Fixes: fb82fe3851 ("configs: Resync defconfigs")
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
endian.h on FreeBSD system exist in sys/ subdirectory.
FreeBSD already have a fls function defined in strings.h which is included
in string.h if __BSD_VISIBLE is defined, as a check for this.
Signed-off-by: Emmanuel Vadot <manu@bidouilliste.com>
The driver currently does not reset bit 5 of the hostctl register even if
the MMC stack requests it. Then means that once a bus width of 8 is
selected it is not possible to change it back to 1. This breaks
'mmc rescan' which needs to start off with a bus width of 1.
The problem was surfaced by enabling CONFIG_DM_MMC_OPS on tegra. Without
this option the MMC stack fully reinits the driver on a 'mmc rescan'.
But with this option driver model does not re-probe a driver once it has
been probed once.
Fix the driver to honour the request.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Peter Chubb <peter.chubb@data61.csiro.au>
Tested-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
The topic-miamilite SoM contains a Zynq xc7z010 SoC, 1GB DDR3L RAM,
64MB dual-parallel QSPI NOR flash and clock sources.
Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Move the only use of CONFIG_SF_DUAL_FLASH to defconfig. This makes the
associated topic_miamiplus.h header obsolete, so remove that as well.
Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
If PMUFW version is not v0.3 then panic.
ZynqMP switch to CCF based clock driver which requires
PMUFW to be present at certain version.
This patch ensure that you use correct and tested PMUFW
binary.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reuse invoke_smc() routine which is already defined
instead of duplicating same at multiple places.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Define routines of mmio write and read functionalities
for zynqmp platform.
Also do not call SMC from SPL because SPL is running before ATF in EL3
that's why SMCs can't be called because there is nothing to call.
zynqmp_mmio*() are doing direct read/write accesses and this patch does
the same. PMUFW is up and running at this time and there is a way to talk
to pmufw via IPI but there is no reason to implement IPI stuff in SPL if
we need just simple read for getting clock driver to work.
Also make invoke_smc as global so that it can be reused in
multile places where ever possible.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Add Kconfig option for ddr init as this might be required
in cases like ddr less systems where we want to skip ddrc
init and this option is useful for it.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Silicon v1 didn't support SD boot mode with level shifter.
Because system can't boot any error message is not shown
that's why comment is just a record if someone tries to debug it.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
psu_init* contain sleep.h header which is not present in u-boot.
Instead of keep comment sleep.h in psu_init* it is easier to add empty
file which is included.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Drop include of netdev.h as it's a SATA driver not a network driver.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Decrease malloc size to 1MB from 256MB. Huge malloc
space is adding huge delay in mem_malloc_init() because
we are enabling CONFIG_SYS_MALLOC_CLEAR_ON_INIT
which clear the whole malloc space.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
The boot_device argument to spl_boot_mode was massively added without
actually modifying the existing functions.
This commit actually makes use of the handed value, which is the same.
Signed-off-by: Jean-Francois Dagenais <jeff.dagenais@gmail.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
When enabling both SDHCI controllers, spl_mmc.c would actually choose
device sdhci0 even if booted from sdhci1 (boot_device). This is because
spl_mmc_get_device_index(boot_device) expects BOOT_DEVICE_MMC2[_2] in
order to return index 1 instead of 0.
The #if defined(...) statement is copied from board/xilinx/zynqmp/zynqmp.c
So the key to properly enabling both controllers as boot sources is
defining both CONFIG_ZYNQ_SDHCI0 and CONFIG_ZYNQ_SDHCI1 in your board's
include/configs/*.h.
Signed-off-by: Jean-Francois Dagenais <jeff.dagenais@gmail.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Adding more targets to repository requires some additional
changes not simply just adding config file, defconfig and dts.
This patch makes this process easier by building only
particular DTB which is selected via defconfig
that Makefile doesn't need to contain all dts files in the repository.
Reported-by: Nathan Rossi <nathan@nathanrossi.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
CPU_RELEASE_ADDR is used only when CONFIG_ARMV8_MULTIENTRY
is enabled. ZynqMP is running ATF which takes care about this
that's why no need to have this macro.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Make do_usb_mass_storage() static to fix the following sparse
warning:
cmd/usb_mass_storage.c:136:5: warning: symbol 'do_usb_mass_storage' was not declared. Should it be static?
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Use NULL for pointer to fix the following sparse warning:
cmd/usb_mass_storage.c:47:15: warning: Using plain integer as NULL pointer
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
With gcc-6 and later we see warnings that at91sam9263_udc_caps and
at91rm9200_udc_caps are unused.
Fixes: 620197670a ("usb: gadget: at91_udc: add at91_udc into U-Boot")
Cc: Lukasz Majewski <lukma@denx.de>
Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Heiko Schocher <hs@denx.de>
In current code, after running the command of "usb start", the controller
will keep in otg mode and can't switch to host mode if not support
SNP/SRP capability. So add the property of "hnp-srp-disable" in the DTS
to config the contrller work in force mode of host.
Signed-off-by: Meng Dongyang <daniel.meng@rock-chips.com>
There was for long time no activity in the mpx5xxx area.
We need to go further and convert to Kconfig, but it
turned out, nobody is interested anymore in mpc5xxx,
so remove it.
Signed-off-by: Heiko Schocher <hs@denx.de>
Secure boot targets that can be loaded from an SD card FAT partition
need to be called "MLO" on the filesystem, make a copy with this name
to clarify the correct image for SD card booting.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
This define isn't used anymore in the u-boot source tree, so we drop it
from the config header.
We drop it also from the 'config_whitelist.txt'
Signed-off-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
the BMP logo loading has become obsolete and is not used any more. So we
drop the support for it.
Signed-off-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
since commit
'd5abcf94c7123167725fc22ace342f0d455093c1' -
ti: boot: Register the MMC controllers in SPL in the same way as in u-boot
MMC boot on brxre1 board is broken, with this commit we make our board
working again.
Signed-off-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Adds CONFIG_SPL_USB_GADGET_SUPPORT and CONFIG_SPL_USBETH_SUPPORT.
Removes CONFIG_SPL_NAND_SUPPORT, CONFIG_SPL_MTD_SUPPORT, and CONFIG_SPL_YMODEM_SUPPORT
to free up space to fit in RAM.
Signed-off-by: Michael Welling <mwelling@ieee.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Marek Vasut <marex@denx.de>
NanoPi NEO2 is designed and developed by FriendlyElec
using the Allwinner 64-bit H5 SOC.
NanoPi Neo2 key features
- Allwinner H5, Quad-core 64-bit Cortex-A53
- 512MB DDR3 RAM
- microSD slot
- 10/100/1000M Ethernet
- Serial Debug Port
- 5V 2A DC MicroUSB power-supply
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
Orangepi Win/WinPlus is an open-source single-board computer
using the Allwinner A64 SOC.
A64 Orangepi Win/WinPlus has
- A64 Quad-core Cortex-A53 64bit
- 1GB(Win)/2GB(Win Plus) DDR3 SDRAM
- Debug TTL UART
- Four USB 2.0
- HDMI
- LCD
- Audio and MIC
- Wifi + BT
- IR receiver
- 5V DC power supply
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
Orangepi Zero Plus 2 is an open-source single-board computer
using the Allwinner h5 SOC.
H5 Orangepi Zero Plus 2 has
- Quad-core Cortex-A53
- 512MB DDR3
- micrSD slot and 8GB eMMC
- Debug TTL UART
- HDMI
- Wifi + BT
- OTG+power supply
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
Whistler is an ancient Tegra 2 reference board. I may have been the only
person who ever used it with upstream software, and I've just recycled
the board hardware. Hence, it makes sense to remove support from software.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Enable DHCP command by default. Move environmental variable location
to before U-Boot image. Enlarge reserved mem for malloc. Update
maintainer.
Signed-off-by: York Sun <york.sun@nxp.com>
Commit a058052c changed the generic phy_reset() to clear all bits in
BMCR. This inevitably clears the ANEG bit. m88e1145 requires any
change to ANEG bit to be followed by a software reset. This seems to
be different from other PHYs. Implement read-modify-write procedure
for this PHY init.
Signed-off-by: York Sun <york.sun@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
commit 0650798824 ("board: am335x: Introduce scale_vcores")
updated voltages of each board based on efuse. It updated
beagle bone specific voltages under the condition board_is_bone().
But this is true only for BeagleBoneWhite. Due to which voltages
are not configured for BBB, BBW as wrong device is being probed.
So create a common function board_is_beaglebonex() which includes
am335x based beagle family. Use this for updating voltages.
Also remove extra if condition for selecting voltages which is
done later using a switch case and match usb current limit as
before the commit 0650798824.
Fixes: 0650798824 ("board: am335x: Introduce scale_vcores")
Reported-by: Emmanuel Vadot <manu@bidouilliste.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Use eMMC (instead of SD card) to store U-Boot environment. Use
"reserved" partition for U-Boot environment.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Lokesh Vutla <lokeshvuta@ti.com>
Increase the size of u-boot.img, so that it conforms with new DFU
configuration (see commit [1]).
[1] 7a53a1a811 ARM: ti: Update layout for MMC and eMMC (env and dfu)
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Increase the size of u-boot.img, so that it conforms with new DFU
configuration (see commit [1]).
[1] 7a53a1a811 ARM: ti: Update layout for MMC and eMMC (env and dfu)
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
refer in the README to tbots webpage, and delete
the README in tools/tbot, as the latest documentation
for tbot is on this webpage.
Signed-off-by: Heiko Schocher <hs@denx.de>
With Davinci I2C switching to device model, K2HK requires U-boot specific
device tree entries. This is only required for I2C 1 which is needed
extremely early during the boot process.
Fixes: 1743d040b1 ("ARM: keystone: Enable DM_I2C by default")
Reported-by: Yan Liu <yan-liu@ti.com>
Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
The list of symbols listed in the error message for missing Kconfig
symbols is out of sync with the symbols actually tested.
Add the missing symbols and reorder their appearance to be in sync
with the #if statement for easier checking.
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
commit 06a040a31b ("cmd: mtdparts: fix null pointer dereference in parse_mtdparts")
removed the initialization of a pointer variable, which is
subsequently used in a debug() call. This produces an uninitialized
variable warning, when compiling with DEBUG defined.
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
relocate_code() calculates the relocation offset wrt. the symbol
__image_copy_start which happens to have the same value as
CONFIG_TEXT_BASE on most systems.
When creating an i.MX boot image with an integrated IVT it is
convenient to have CONFIG_TEXT_BASE point to the start of the IVT
that is prepended to the actual code. Thus CONFIG_TEXT_BASE will
differ from __image_copy_start, while the calculation
'gd->relocaddr - __image_copy_start' still gives the right relocation
offset.
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Create exception stack in IRAM if available to facilitate debugging of
pre-relocation code by catching exceptions rather than stopping dead.
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Adjust the program counter register to point to the failing
instruction depending on the exeption type.
This makes it easier to localize the offending instruction leading to
a fatal exception.
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
The cp_delay() function was introduced because of a missing 'volatile'
attribute to the 'asm' statement in get_cr() which led to the 'mrc'
instruction in get_cr() being optimised out eventually.
This has been fixed in commit 53fd4b8c22 ("arm: mmu: Add missing volatile for reading SCTLR register")
but the bogus cp_delay() function which was introduced as a workaround
for the malfunctioning get_cr() was never removed.
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Simplify baud rate register formula and use the oversampling
uart feature.
This code is aligned with what is implemented in kernel driver
drivers/tty/serial/stm32-usart.c since kernel v4.9.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Christophe KERELLO <christophe.kerello@st.com>
Reviewed-by: Patrick DELAUNAY <patrick.delaunay@st.com>
Acked-by: Vikas MANOCHA <vikas.manocha@st.com>
stm32x7.c driver is dedicated for STM32F7.
In kernel, "st,stm32-usart" and "st,stm32-uart" compatible
strings are dedicated for STM32F4.
To keep U-boot and kernel aligned, replace the serial compatible
string from "st,stm32-usart", "st,stm32-uart" to
"st,stm32f7-usart", "st,stm32f7-uart" specific for STM32F7.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Christophe KERELLO <christophe.kerello@st.com>
Reviewed-by: Patrick DELAUNAY <patrick.delaunay@st.com>
Acked-by: Vikas MANOCHA <vikas.manocha@st.com>
Assigning a variable to itself is not necessary. Drop this and also add a
check for malloc() failure.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reported-by: Coverity (CID: 161418)
Fixes: 111bcc4 (rockchip: mkimage: pad the header to 8-bytes (using a 'nop') for RK3399)
The current implementation makes it look like the 'if (from_spl)' part is
dead code because these features are not enabled for sandbox. We could
enable it for sandbox_spl, but this is not done yet (it requires sharing
memory between SPL and U-Boot proper which is in fact supported).
It is probably nicer to avoid #ifdef anyway. Change it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reported-by: Coverity (CID: 163244)
Fixes: 824bb1b (bootstage: Support SPL)
We know that uclass_get_device() and device_find_child_by_of_offset() do
not return NULL for dev when they succeeds but coverity does not. Add an
extra check to hopefully keep it happy.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reported-by: Coverity (CID: 163246)
Fixes: 0753bc2 (dm: Simple Watchdog uclass)
We know that uclass_get_device() does not return NULL for dev when it
succeeds but coverity does not. Add an extra check to hopefully keep it
happy.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reported-by: Coverity (CID: 163247)
Fixes: 0753bc2 (dm: Simple Watchdog uclass)
We know that fdt_getprop() does not return NULL when len is > 0 but
coverity does not. Add an extra check to keep it happy.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reported-by: Coverity (CID: 163248)
We know that fdt_getprop() does not return NULL when len is > 0 but
coverity does not. Add an extra check to keep it happy.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reported-by: Coverity (CID: 163249)
Fixes: bc80295b (fdt: Add get commands to fdt)
Since the parameter can be NULL we must be careful not to dereference it
in this case.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reported-by: Coverity (CID: 163250)
Fixes: 1043d0a0 (fdt: Add fdtgrep tool)
We should not use an open-coded value here. Use sizeof() instead.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reported-by: Coverity (CID: 163252)
Fixes: 43c6bdd0 (edid: Add HDMI flag to timing info)
We know that uclass_get_device() does not return NULL for dev when it
succeeds but coverity does not. Add an extra check to hopefully keep it
happy.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reported-by: Coverity (CID: 161690)
Fixes: 43b4156 (dm: sandbox: pwm: Add a basic pwm test)
There was for long time no activity in the 5xx area.
We need to go further and convert to Kconfig, but it
turned out, nobody is interested anymore in 5xx,
so remove it.
Signed-off-by: Heiko Schocher <hs@denx.de>
There was for long time no activity in the 8260 area.
We need to go further and convert to Kconfig, but it
turned out, nobody is interested anymore in 8260,
so remove it.
Signed-off-by: Heiko Schocher <hs@denx.de>
There was for long time no activity in the 8xx area.
We need to go further and convert to Kconfig, but it
turned out, nobody is interested anymore in 8xx,
so remove it (with a heavy heart, knowing that I remove
here the root of U-Boot).
Signed-off-by: Heiko Schocher <hs@denx.de>
One can obtain those variables using next commands:
$ fastboot getvar cpu
$ fastboot getvar secure
$ fastboot getvar board_rev
$ fastboot getvar userdata_size
Those variables are needed for fastboot.sh script.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
One can obtain those variables using next commands:
$ fastboot getvar cpu
$ fastboot getvar secure
$ fastboot getvar board_rev
$ fastboot getvar userdata_size
Those variables are needed for fastboot.sh script.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
This patch reuses new option, which allows us to expose variables
from environment to "fastboot getvar" command. Those variables must be
of "fastboot.%s" format.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Using u-boot-2017.05 on i.MX6UL we ran into following problem:
Initially U-Boot could be started normally.
If we added one random command in configuration, the newly generated
image hung at startup (last output was DRAM: 256 MiB).
We tracked this down to a data abort within relocation (relocated_code).
relocated_code in arch/arm/lib/relocate.S copies 8 bytes per loop
iteration until the source pointer is equal to __image_copy_end.
In a good case __image_copy_end was aligned to 8 bytes, so the loop
stopped as suggested, but in an errornous case __image_copy_end was
not aligned to 8 bytes, so the loop ran out of bounds and caused a
data abort exception.
This patches solves the issue by aligning __image_copy_end to 8 byte
using the linker script related to arm.
I don't know if it's the correct way to solve this, so some review would
be very appreciated.
Currently we set the entry address in the psci_cpu_on function.
However R40 has a different register for this. This resulted in
an #ifdef / #else block in psci_cpu_on, which we avoided having
in the first place.
Move this part into a separate function, defined differently for
the R40 as opposed to the other single cluster platforms.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
When we don't have CONFIG_BLK defined we don't have a forward
declaration of struct udevice, and thus get a warning about it on
blk_get_from_parent(), which we only have when CONFIG_BLK is set. Move
the declaration of blk_get_from_parent() to be with the other CONFIG_BLK
parts.
Fixes 9f103b9cb5 ("dm: blk: Add a way to obtain a block device from ...")
Signed-off-by: Tom Rini <trini@konsulko.com>
The kwbimage utility fails to compile when LibreSSL is present on
the host system instead of OpenSSL. This one-line patch resolves
this.
Signed-off-by: Marek Behun <marek.behun@nic.cz>
CONFIG_FAT_WRITE is imply'ed when CONFIG_CMD_FAT
is selected (see CONFIG_TI_COMMON_CMD_OPTIONS).
Dont disable it in defconfig so the imply takes
effect and 'fatwrite' is available for users.
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
As only FIT image is supported now, this patch is to support loading
32-bit uImage, dtb and rootfs separately.
Signed-off-by: Alison Wang <alison.wang@nxp.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Like commit 3337e3af5d this enables suitable commands needed for booting
general purpose Linux distribution. This is required for example if we want
to use PXE or DHCP as default boot targets, symbols no longer enabled by
config_distro_defaults.h.
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Update the board pinmux for AM572x-evm using latest PMT[1] and the
board files named am572x_gp_evm_A3a_sr2p0 and am572x_gp_evm_A2b_sr1p1
that were autogenerated on 30th January, 2017 by
"Ahmad Rashed <a-rashed@ti.com>" and "Tom Johnson <thjohnson@ti.com>".
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Add poweroff description to Kconfig to make it selectable
via menuconfig.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Disable D-Cache is required when booting nommu Linux kernel.
(please see Linux kernel source "arch/arm/kernel/head-nommu.S")
U-Boot is enabled D-cache and I-Cache at startup.
However, it does not disable D-Cache before
booting nommu Linux kernel.
Therefore, I call dcache_disable()
when the CPU is ARMv7M to fix this problem.
Signed-off-by: Toshifumi NISHINAGA <tnishinaga.dev@gmail.com>
Refactor OMAP3/4/5 code so that we have only one get_device_type()
function for all platforms.
Details:
- Add ctrl variable for AM33xx and OMAP3 platforms (like it's done for
OMAP4/5), so we can obtain status register in common way
- For now ctrl structure for AM33xx/OMAP3 contains only status register
address
- Run hw_data_init() in order to assign ctrl to proper structure
- Remove DEVICE_MASK and DEVICE_GP definitions as they are not used
(DEVICE_TYPE_MASK and GP_DEVICE are used instead)
- Guard structs in omap_common.h with #ifdefs, because otherwise
including omap_common.h on non-omap4/5 board files breaks compilation
Buildman script was run for all OMAP boards. Result output:
arm: (for 38/616 boards)
all +352.5
bss -1.4
data +3.5
rodata +300.0
spl/u-boot-spl:all +284.7
spl/u-boot-spl:data +2.2
spl/u-boot-spl:rodata +252.0
spl/u-boot-spl:text +30.5
text +50.4
(no errors to report)
Tested on AM57x EVM and BeagleBoard xM.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
[trini: Rework the guards as to not break TI81xx]
Signed-off-by: Tom Rini <trini@konsulko.com>
Almost all users of CONFIG_AM33XX/AM43XX have been migrated. Finish
moving the last few over to Kconfig, and put all of the boards under the
appropriate Kconfig chocie now. This board choice is non-optional, so
remove that keyword on am33xx.
Signed-off-by: Tom Rini <trini@konsulko.com>
With this commit we can modify single values within an array of a dts
property.
This is useful if we have for example a pwm-backlight where we want to
modifiy the pwm frequency per u-boot script.
The pwm is described in dts like this:
backlight {
pwms = <0x0000002b 0x00000000 0x004c4b40>;
};
For changing the frequency, here the 3rd parameter, we simply type:
fdt set /backlight pwms <? ? 0x1E8480>;
For doing all this we:
- backup the property content into our 'SCRATCHPAD'
- only modify the array-cell if the new content doesn't start with '?'
Signed-off-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The build output can still produce unicode encoded output. But in
the buildman's log and err files we only want plain ASCII characters.
To handle all situations with unicode and non-unicode output, encode
the stdout and stderr strings to UTF-8 and afterwards to ASCII with
replacing all special characters.
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Build tools like Make, gcc or binutils support localized output
or unicode encoded output dependent on the default system locale.
This is not useful for buildman, where we want reproducible
warning or error messages or where the output of binutils is
further processed.
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
The display on jerry is so fast that this option is not needed. Drop it so
that the display scrolls more smoothly.
Signed-off-by: Simon Glass <sjg@chromium.org>
If U-Boot is chain-loaded from a previous boot loader we must set up the
clocks the way U-Boot wants them. Add code for this. It will do nothing if
SPL has already done the job.
Signed-off-by: Simon Glass <sjg@chromium.org>
Detect with a previous boot loader has already set up the clocks and set
them up again so that U-Boot gets what it expects.
Signed-off-by: Simon Glass <sjg@chromium.org>
Shifted masks are the standard approach with rockchip since it allows
use of the mask without shifting it each time. Update the definitions and
the driver to match.
Signed-off-by: Simon Glass <sjg@chromium.org>
On reset the standby bit is clear, but if U-Boot is chain-loaded from
another boot loader it may be set. Clear it before starting up video so
that it works correctly.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Anatolij Gustschin <agust@denx.de>
Squashed in 'rockchip: video: fix taking the VOP device out of standby':
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Add remove() methods for EDP and VOP so that U-Boot can shut down the
video on exit. This avoids leaving DMA running while booting Linux which
can cause problems if Linux uses the frame buffer for something else.
It also makes it clear what is needed to shut down video.
While we are here, make rkvop_enable() static.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Anatolij Gustschin <agust@denx.de>
Squashed in 'rockchip: video: fix taking the VOP device out of standby':
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Most Chromebooks support chain-loading U-Boot but instructions are
somewhat scattered. Add a README to hold this information within the
U-Boot tree. Also add the standard developer keys to simplify the
instructions, since they are small.
For now this only supports nyan-big.
Signed-off-by: Simon Glass <sjg@chromium.org>
The clock fix-up for tegra is still present in the code. It causes a
divide-by-zero bug after relocation when chain-loading U-Boot from
coreboot. Fix this by adding a check.
Signed-off-by: Simon Glass <sjg@chromium.org>
Fixes: 7468676 (ARM: tegra: fix clock_get_periph_rate() for UART clocks)
At present CP15 init is disabled on tegra. Use the correct option so that
this init is performed on boot. This enables the instruction cache, for
example, which is critical to the machine running at full speed.
Signed-off-by: Simon Glass <sjg@chromium.org>
If U-Boot is the secondary boot loader, or has been run from itself, the
SOR may already be powered up. Powering it up again causes a hang, so
detect this situation and skip it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Anatolij Gustschin <agust@denx.de>
Enable this so we can roughly measure CPU performance. Also enable the
cache command to allow for timing.
Signed-off-by: Simon Glass <sjg@chromium.org>
For devices that need a delay between SPI transactions we seem to need an
additional delay before the first one if the CPU is running at full speed.
Add this, under control of the existing setting. At present it will only
be enabled with the Chrome OS EC.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present the interrupt does not work and the SPI bus runs much less
quickly than it should. Add settings to fix this.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present early clock init happens in SPL. If SPL did not run (because
for example U-Boot is chain-loaded from another boot loader) then the
clocks are not set as U-Boot expects.
Add a function to detect this and call the early clock init in U-Boot
proper.
Signed-off-by: Simon Glass <sjg@chromium.org>
This file does not report a few possible errors and one message is missing
a newline. Fix these.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
If CONFIG_ARMV7_LPAE is not defined we should make sure that the feature
is disabled. This can happen if U-Boot is chain-loaded from another boot
loader which does enable LPAE.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present if CONFIG_ARMV7_LPAE is defined then mmu_setup() will use
instructions which are invalid on ARMv4T. This happens on Tegra since it
has an ARMv4T boot CPU. Add a check for the architecture version to allow
the code to be built. It will not actually be executed by the boot CPU,
but needs to compile.
Signed-off-by: Simon Glass <sjg@chromium.org>
This option allows skipping the call to lowlevel() while still performing
CP15 init. Support this on ARM720T so it can be used with Tegra.
Signed-off-by: Simon Glass <sjg@chromium.org>
Rename command ls to fsls as its conflicting with
generic file systesm command ls and this is causing
compilation failure as below, if both are enabled
and this patch fixes it.
cmd/jffs2.o:(.u_boot_list_2_cmd_2_ls+0x0):
multiple definition of `_u_boot_list_2_cmd_2_ls'
cmd/fs.o:(.u_boot_list_2_cmd_2_ls+0x0):first defined here
scripts/Makefile.build:359: recipe for target 'cmd/built-in.o'
failed
make[1]: *** [cmd/built-in.o] Error 1
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
There is some inconsistency between uses of CONFIG_RTC_DS13xx and
CONFIG_SYS_RTC_DS13xx. Address this by dropping the "SYS" from
these variables.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
With xip booting configuration, we don't need to copy the next image
(U-Boot or linux xipimage) from flash to sdram area.
Flash memory organization is like this:
spl-U-Boot: u-boot-spl.bin : 0x0800_0000
U-Boot : u-boot-dtb.bin : 0x0800_8000
linux : xipImage : 0x0800_8000
It is also possible to have U-Boot binary & linux binaries configured at
different addresses of flash memory like U-Boot at 0x0800_8000 & linux
xipImage at 0x0800_4000. But in any case, spl-U-Boot needs to be compiled for
U-Boot as next binary with SPL_OS_BOOT option disabled.
By default, spl is configured to boot linux xipImage.
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
With overrun enabled, serial port console freezes & stops receiving data with
overun error if we keep sending data.
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
Enable support for XIP (execute in place) of U-Boot or kernel image. There is
no need to copy image from flash to ram if flash supports execute in place.
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
Reviewed-by: Alexandru Gagniuc <alex.g@adaptrum.com>
This commit supports booting from stm32 internal nor flash. spl U-Boot
initializes the sdram memory, copies next image (e.g. standard U-Boot)
to sdram & then jumps to entry point.
Here are the flash memory addresses for U-Boot-spl & standard U-Boot:
- spl U-Boot : 0x0800_0000
- standard U-Boot : 0x0800_8000
To compile u-boot without spl: Remove SUPPORT_SPL configuration
(arch/arm/mach-stm32/Kconfig)
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
[trini: Rework Kconfig logic a bit]
Signed-off-by: Tom Rini <trini@konsulko.com>
Documents the externally visible functions shared between the VOP
drivers for the RK3288 and RK3399.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Documents the externally visible functions shared between the HDMI
drivers for the RK3288 and RK3399.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Fix the warning,
---8<---
CACHE: Misaligned operation at range [3fdffff0, 3fdffffc]
---<8---
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Extend DE2 driver with support for TVE driver, which will be added in
next commit. TVE unit expects data to be in YUV format, so CSC support
is also added here.
Note that HDMI driver has higher priority, so TV out is not probed if
HDMI monitor is detected.
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
In order to avoid future confusion with similary named files, rename
tve.c to tve_common.c. New name better represents the fact that this file
holds code which can be and will be shared between multiple drivers.
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The addresses of the registers in TI TPS65217 are not continuous.
There is a gap between ENABLE(0x16) and DEFUVLO(0x18). No 0x17
register available.
Fixup the enum values by adding a 'reserved' placeholder to correct
the addresses higher than 0x17.
Series-to: Heiko Schocher <hs@denx.de>
Signed-off-by: Brock Zheng Techyauld Ltd <yzheng@techyauld.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
The driver provides regulator set/get voltage
enable/disable functions for lp87565 family of PMICs.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Add support to bind the regulators/child nodes with the pmic.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
We do not need to probe the block device here, so avoid doing so. The MMC
device itself must be active, but the block device can come later.
Signed-off-by: Simon Glass <sjg@chromium.org>
Make sure that we probe the block device before using it when reading
the environment.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Many devices support a child block device (e.g. MMC, USB). Add a
convenient way to get this device given the parent device.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Add ddr voltage rail (dcdc3) configuration. Set the dcdc3
DDR supply to 1.35V.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Some boards like am437x-gp-evm require dcdc3 also to be configured
as it feeds on to ddr. Hence add the capability as well.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
R-Car Gen3 series have four SD card interfaces (SDHI0 to SDHI3),
two of which can also be used as MMC interfaces (SDHI2 and SDHI3).
This adds High-speed mode SD clock frequency between 25MHz and 50MHz,
8bit/4bit bus width, high capacity and low voltage device support.
Signed-off-by: Kouei Abe <kouei.abe.cp@renesas.com>
Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
The existing test (patman --test) only covers basic checkpatch output.
We have had some problems with unicode processing and could use test
coverage for the various tags patman supports.
Add a new functional test which runs most of the patman flow on a few
test commits and checks that the results are correct.
See the documentation in the test for a description of what it does.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
This is not a good variable name in Python because 'list' is a type. It
shows up highlighted in some editors. Rename it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Allow the add_maintainers parameter to be a list of maintainers, thus
allowing us to simulate calling the script in tests without actually
needing it to work.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
There is no need for this function to return the same object that was
passed in. Drop the return value.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Unicode characters may appear in input patches so we should not warn about
them. Drop this warning.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
This is not a good variable name in Python because 'str' is a type. It
shows up highlighted in some editors. Rename it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
The communication filter reads data in blocks and converts each block to
unicode (if necessary) one at a time. In the unlikely event that a unicode
character in the input spans a block this will not work. We get an error
like:
UnicodeDecodeError: 'utf8' codec can't decode bytes in position 1022-1023:
unexpected end of data
There is no need to change the input to unicode, so the easiest fix is to
drop this feature.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Don't mess with the email address when outputting them. Just make sure
they are encoded with utf-8.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
This change encodes the CC list to UTF-8 to avoid failures on
maintainer-addresses that include non-ASCII characters (observed on
Debian 7.11 with Python 2.7.3).
Without this, I get the following failure:
Traceback (most recent call last):
File "tools/patman/patman", line 159, in <module>
options.add_maintainers)
File "[snip]/u-boot/tools/patman/series.py", line 234, in MakeCcFile
print(commit.patch, ', '.join(set(list)), file=fd)
UnicodeEncodeError: 'ascii' codec can't encode character u'\xfc' in position 81: ordinal not in range(128)
from Heiko's email address:
[..., u'"Heiko St\xfcbner" <heiko@sntech.de>', ...]
While with this change added this encodes to:
"=?UTF-8?q?Heiko=20St=C3=BCbner?= <heiko@sntech.de>"
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Tested-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
In the case where a new build only decreases sizes and does not increase
any size we still want to report what functions have been dropped when
doing a bloat comparison.
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
In os_dirent_get_typename() we are checking that type falls within the
known values of the enum os_dirent_t. With clang-3.8 testing this value
as being >= 0 results in a warning as it will always be true. This
assumes of course that we are only given valid data. Given that we want
to sanity check the input, we change this to check that it falls within
the range of the first to the last entry in the given enum.
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
On ARM v7M, the processor will return to ARM mode when executing blx
instruction with bit 0 of the address == 0. Always set it to 1 to stay in thumb
mode.
At present, it is applied only for raw U-Boot. This patch moves it to just
before booting next image. This way armv7m will be in thumb mode for any image
like raw or image with header like zImage or standard U-Boot.
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
The SoPine is a SoM by Pine64, with an Allwinner A64 SoC, a LPDDR3 DRAM
chip, an AXP803 PMIC, a SPI NOR Flash and a MicroSD slot. The card
detect pin of the MicroSD slot is broken, however, it doesn't matter as
the design of SoPine didn't allow hot-swapping the MicroSD card (The
MicroSD slot is at the back of the SoM, and when the SoM is installed on
the baseboard, it's nearly impossible to remove the MicroSD).
The official baseboard of it is a board with nearly the same connectors
with the original Pine64+, with the MicroUSB power jack replaced, and
at the position of MicroSD slot a eMMC module slot is added.
Add support for SoPine with the official baseboard by adding its
defconfig file. It still uses the device tree of Pine64, however, it
will change after a proper device tree of SoPine with baseboard is
accepted by Linux mainline.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
[Update board/sunxi/MAINTAINERS]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
As we added LPDDR3 support in the former patch, we need a set of timing
info to really enable it.
Add the timing info used by stock boot0.
Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
Some A64 boards (SoPine and Pinebook production batch) use LPDDR3 DRAM
chips.
Add support for LPDDR3 DRAM in the DesignWare-like DRAM controller code.
Real LPDDR3 chips' support is not added yet in this commit.
Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
As we have already support for the DesignWare DRAM controller and the
integrated DDR2 chip of V3s, let's enable the SPL support for V3s.
This patch also contains the default DRAM configuration for V3s.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
The DesignWare-like DRAM code used to set the controller defaultly to
single rank mode, which makes it not able to detect the second rank.
Set the default value to dual rank, thus the rank detection code can
work and finally the rank setting will be the correct value.
Currently we know little about the dual-rank on R40, and the usage
of A15 address line seems to be breaking dual-rank support. The only R40
board currently available (Sinovoip Banana Pi M2 Ultra) uses A15 rather
than dual-rank, thus we cannot do research for it. So dual rank detection
is temporarily disabled on R40.
This change is tested on a Orange Pi One (H3, single rank), a Pine64+
2GiB version (A64, single rank) , a Pinebook early prototype with DDR3
(A64, dual rank) and a SoPine with some LPDDR3 patch (A64, dual CS pins
on one chip).
Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
DRAM chip varies, and one code cannot satisfy all DRAMs.
Add options to select a timing set.
Currently only DDR3-1333 (the original set) is added into it.
Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
The DesignWare DRAM controller used by H3 and newer SoCs use a bit to
identify whether the DRAM is half-width.
As H3 itself come with 32-bit DRAM, the two modes of the bit used to be
named "MCTL_CR_32BIT" and "MCTL_CR_16BIT", but for SoCs with 16-bit DRAM
they're really 8-bit and 16-bit.
Rename the bit's macro, and also rename the variable name in
dram_sun8i_h3.c.
This commit do not add 16-bit DRAM controller support, but the support
will be introduced in next commit.
Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
Allwinner SoCs after H3 (e.g. A64, H5, R40, V3s) uses a H3-like
DesignWare DRAM controller, which do not have official free DRAM
initialization code, but can use modified dram_sun8i_h3.c.
Add a invisible option for easier DRAM initialization code reuse.
Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
NanoPi M1 Plus is designed and developed by FriendlyElec
for professionals, enterprise users, makers and hobbyists
using the Allwinner H3 SOC.
NanoPi M1 Plus key features
- Allwinner H3, Quad-core Cortex-A7@1.2GHz
- 1GB DDR3 RAM
- 8GB eMMC
- microSD slot
- 10/100/1000M Ethernet
- Serial Debug Port
- 5V 2A DC power-supply
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
Here is additional rk3368 and rk3399 support, rv1108 support,
refactoring HDMI video (brought in from Anatolij's tree to resolve
conflicts), some mkimage fixes and a few other things.
With video output support for the RK3399-Q7 (Puma) available, we want
CMD_BMP enabled and the support for 16bit, 24bit and 32bit BMPs
defined.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Version-changes: 2
- enable SYS_WHITE_ON_BLACK via defconfig
Reviewed-by: Simon Glass <sjg@chromium.org>
The last set of rebases had dropped the 'grf' field from the common
rk_vop. Add this back to un-break the build (and driver).
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
This commit enables the RK3399 HDMI TX, which is very similar to the
one found on the RK3288. As requested by Simon, this splits the HDMI
driver into a SOC-specific portion (rk3399_hdmi.c, rk3288_hdmi.c) and
a common portion (rk_hdmi.c).
Note that the I2C communication for reading the EDID works well with
the default settings, but does not with the alternate settings used on
the RK3288... this configuration aspect is reflected by the driverdata
for the RK3399 driver.
Having some sort of DTS-based configuration for the regulator
dependencies would be nice for the future, but for now we simply use
lists of regulator names (also via driverdata) that we probe.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
To prepare for the addition of RK3399 HDMI support, the HDMI driver is
refactored and broken into a chip-specific and a generic part. This
change adds the internal interfaces, makes common/reusable functions
externally visible and splits the RK3288 driver into a separate file.
For the probing of regulators, we reuse the infrastructure created
during the VOP refactoring... i.e. we simply call into the helper
function defined for the VOP.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The Linux driver now supports higher mpixelclock settings.
Add these to rockchip_phy_config[] and rockchip_mpll_cfg[].
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This commit adds a driver for the RK3399 VOPs capable and all the
necessary plumbing to feed the HDMI encoder. For the VOP-big, this
correctly tracks the ability to feed 10bit RGB data to the encoder.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
To prepare for adding the RK3399 VOP driver (which shares most of its
registers and config logic with the RK3228 VOP), this change refactors
the driver and splits the RK3288-specific driver off.
The changes in detail are:
- introduces a data-structure for chip-specific drivers to register
features/callbacks with the common driver: at this time, this is
limited to a callback for setting the pin polarities (between the
VOP and the encoder modules) and a flag to signal 10bit RGB
capability
- refactors the probing of regulators into a helper function that
can take a list of regulator names to probe and autoset
- moves the priv data-structure into a (common) header file to be
used by the chip-specific drivers to provide base addresses to
the common driver
- uses a callback into the chip-specific driver to set pin polarities
(replacing the direct register accesses previously used)
- splits enabling the output (towards an encoder) into a separate
help function withint the common driver
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This introduces two new Kconfig options that configure the maximum
allowable framebuffer size (i.e. the memory reservation/allocation for
the framebuffer):
- VIDEO_ROCKCHIP_MAX_XRES
- VIDEO_ROCKCHIP_MAX_YRES
The resulting memory allocation will cover 4 byte per pixel for these
resolutions.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
For consistency sake (and as we are about to add new options to this
file), reformat the help for VIDEO_ROCKCHIP.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
For the RK3399-Q7, we need spl_board_init to be called during SPL
startup to set up the pinmux for the debug UART. Enable SPL_BOARD_INIT
via defconfig to ensure this function is in fact called.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
RK3288_TXCLK_DLY_ENA_GMAC_ENABLE, in GRF_SOC_CON3, is supposed to be bit
0xe and not 0xf. Otherwise, it is RGMII RX clock delayline enable and
introduces random delays and data lose.
This commit fixes the issue by replacing RK3288_TXCLK_DLY_ENA_GMAC_ENABLE
with the right shift.
Signed-off-by: Romain Perier <romain.perier@collabora.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This adds the DDR3-1866 timing via its own DTS and wires it up. This
(currently) is not the default timing for the RK3399-Q7 and should be
selected explicitly via the config (CONFIG_DEFAULT_DEVICE_TREE).
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Simon Glass <sjg@chromium.org>
This adds the DDR3-1333 timing via its own DTS and wires it up. This
is not the default timing for the RK3399-Q7 and should be selected
explicitly via the config (CONFIG_DEFAULT_DEVICE_TREE).
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Simon Glass <sjg@chromium.org>
To better support different RAM timings (DDR3-1333 and DDR3-1866 are
assembly options for the RK3399-Q7), this refactors the DTS support
and renames the default DTS variant from rk3399-puma to
rk3399-puma-ddr1600:
- changes the rk3399-puma DTS into a board-specific DTSI by removing
the inclusion of the DRAM timings
- adds a new rk3399-puma-ddr1600.dts, which includes the (new) common
board DTSI and the DDR3-1600 timing DTSI
- wires this up from arch/arm/dts/Makefile and configs/puma-rk3399_defconfig
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Simon Glass <sjg@chromium.org>
The Linux DTS for the RK3399-Q7 has moved with the times... resync
against it to ensure a consistent configuration.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This commit enables HDMI output in the DTS by adding the necessary
nodes to vopl/vopb and by adding the HDMI node.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The regs_otg field in uintptr_t of the platform data structure for
dwc2-otg has thus far been an unsigned int, but will eventually be
casted into a void*.
This raises the following error with GCC 6.3 and buildman:
../drivers/usb/gadget/dwc2_udc_otg.c: In function 'dwc2_udc_probe':
../drivers/usb/gadget/dwc2_udc_otg.c:821:8: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
reg = (struct dwc2_usbotg_reg *)pdata->regs_otg;
^
This changes regs_otg to a uintptr_t to ensure that it is large enough
to hold any valid pointer (and fix the associated warning).
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
With HDMI output for the RK3399 working, this update the RK3399-Q7
(Puma) defconfig for the new functionality:
1. enables PMIC command (to check if the HDMI voltages are correct)
+CONFIG_CMD_PMIC=y
+CONFIG_CMD_REGULATOR=y
2. enables video-output (via HDMI)
+CONFIG_DM_VIDEO=y
+CONFIG_DISPLAY=y
+CONFIG_VIDEO_ROCKCHIP=y
+CONFIG_DISPLAY_ROCKCHIP_HDMI=y
3. turns on the 'dcache'-command (for a dcache flush) for our QA to
fill the framebuffer using 'mw.l'
+CONFIG_CMD_CACHE=y
4. turns on the 'bmp'-command
+CONFIG_CMD_BMP=y
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
When enabling CONFIG_DISPLAY_ROCKCHIP_HDMI, compile-time warning for
the following implicitly defined functions are raised due to a missing
include directive:
drivers/video/rockchip/rk_hdmi.c: In function 'rk_hdmi_probe':
drivers/video/rockchip/rk_hdmi.c:150:2: warning: implicit declaration of function 'rk_setreg' [-Wimplicit-function-declaration]
rk_setreg(&priv->grf->soc_con6, 1 << 15);
^~~~~~~~~
drivers/video/rockchip/rk_hdmi.c:153:2: warning: implicit declaration of function 'rk_clrsetreg' [-Wimplicit-function-declaration]
rk_clrsetreg(&priv->grf->soc_con6, 1 << 4,
^~~~~~~~~~~~
This change fixes this by including <asm/hardware.h> in rk_hdmi.c.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Simon Glass <sjg@chromium.org>
The usb_gadget_handle_interrupts()-function is already implemented by
drivers/usb/gadget/dwc2_udc_otg.c, so we need to avoid defining it
in the evb-rk3328.c board-specific file.
This change fixes the following build error (from buildman):
drivers/usb/gadget/built-in.o: In function `usb_gadget_handle_interrupts':
build/../drivers/usb/gadget/dwc2_udc_otg.c:850: multiple definition of `usb_gadget_handle_interrupts'
board/rockchip/evb_rk3328/built-in.o:build/../board/rockchip/evb_rk3328/evb-rk3328.c:37: first defined here
make[1]: *** [u-boot] Error 1
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Simon Glass <sjg@chromium.org>
Add the compatible "rockchip,rk3328-xhci" in match table
for rk3328 to probe xhci controller. Use fixed regulator
to control the voltage of vbus and turn off vbus when
usb stop.
Signed-off-by: Meng Dongyang <daniel.meng@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add basic support for rv1108 evb, whith this patch we
can boot into u-boot console.
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
RV1108 is embedded with an ARM Cortex-A7 single core and a DSP core
from Rockchip. It is designed for varies application scenario such
as car DVR, sports DV, secure camera and UAV camera.
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add support to mkimage for rv1108 soc, the max
spl code size for rv1108 is 6kb, and the spl
code should be packed by rksd, wether boot from
emmc or spi nor flash.
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
For the RK3399-Q7 module, we use full OF_CONTROL (i.e. not
OF_PLATDATA) for SPL. In this configuration, the rockchip_dw_mmc
driver retrieves one of its clocks via clk_get_by_name and fails if
this is not possible. For this reason, we can not filter clock-names
from the device-tree nodes used for the configuration of the SPL
stage.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The RK3399-Q7 exposes I2C on its edge connector and uses it as one of
the interfaces towards the on-module STM32 (for the emulated RTC and
fan-controller).
Enable I2C and CMD_I2C support in the defconfig.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
On the RK3399-Q7, we need PMIC support (for the RK808) to enable HDMI
output, as one of the required powerrails is not enabled on boot.
For this, we need to enable the RK808 driver.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Version-changes: 3
- With the recent upstream changes to the RK808 (PMIC) driver, the
associated configuration options have been renamed to RK8XX. Track
this change in the RK3399-Q7 defconfig.
Reviewed-by: Simon Glass <sjg@chromium.org>
On the RK3399-Q7, the on-module USB3 hub is held in reset at boot-up
to save power and needs to be woken up using GPIO4A3.
Note that this is not a negated reset-signal (due to a level shifter
being needed for this signal anyway), but a negated enable-signal:
to enable, we need to output LOW (i.e. 0)... so we mark this as an
ACTIVE_LOW signal.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
With the validation done for DDR3-1866 (i.e. 933 MHz bus clock), we
can now add the timings (rk3399-sdram-ddr3-1866.dtsi) for boards built
with the DDR3-1866 option.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Revise the loop watching for a timeout on obtaining a DRAM PHY lock to
clearly state a timeout in milliseconds and use get_timer (based on
the ARMv8 architected timer) to detect a timeout.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This change restores the earlier setting of init_boot_size to include
the maximum area covered by the the boot ROM of each chip for resolve
issues with back-to-bootrom functionality reported by Kever and Heiko.
To ensure that we don't run into the same issue again in the future,
I have updated the comments accordingly and added a reference to the
mailing list archive (there's some very helpful info from Andy Yan
that provides background on the BootROM requirements regarding these
fields).
See https://lists.denx.de/pipermail/u-boot/2017-May/293267.html for
some background (by Andy Yan) of how the BootROM processes this field.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The rockchip image generation was previously missing the ability to
verify the generated header (and dump the image-type) without having
to resort to hexdump or od. Experience in our testing has showed it
to be very easy to get the rkspi and rksd images mixed up and the
lab... so we add the necessary support to have dumpimage tell us
what image type we're dealing with.
This change set adds the verify_header and print_header capability
to the rksd/rkspi image drivers (through shared code in rkcommon).
As of now, we only support images fully that are not RC4-encoded for
the SPL payload (i.e. header1 and payload). For RC4-encoded payloads,
the outer header (header0) is checked, but no detection of whether
this is a SD/MMC or SPI formatted payload takes place.
The output of dumpsys now prints the image type (spl_hdr), whether it
is a SD/MMC or SPI image, and the (padded) size of the image:
$ ./tools/dumpimage -l ./spl.img
Image Type: Rockchip RK33 (SD/MMC) boot image
^^^^^^ SD/MMC vs. SPI indication
^^^^ spl_hdr indicated by the image
Data Size: 79872 bytes
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Simon Glass <sjg@chromium.org>
Update maintainer to Kever Yang for William Zhang is not
work for this board now.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Directory board/rockchip/ are all boards for Rockchip SoCs,
so add it to maintained entry.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Send patch to Kever Yang instead of Lin Huang for Rockchip patches,
for Lin is not always working on upstream U-Boot.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Changed , to : in subject:
Signed-off-by: Simon Glass <sjg@chromium.org>
Add config of max root ports and add config to enable xhci
controller.
Signed-off-by: Meng Dongyang <daniel.meng@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add defconfig for usb and ehci and ohci controller, config maximal
number of ports of the root hub for ohci driver.
Signed-off-by: Meng Dongyang <daniel.meng@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
In rk3328, some function pin may have more than one choice, and muxed
with more than one IO, for example, the UART2 controller IO,
TX and RX, have 3 choice(setting in com_iomux):
- M0 which mux with GPIO1A0/GPIO1A1
- M1 which mux with GPIO2A0/GPIO2A1
- usb2phy which mux with USB2.0 DP/DM pin.
We should not decide which group to use in pinctrl driver,
for it may be different in different board, it should goes to board
file, and the pinctrl file should setting correct iomux depends on
the com_iomux value.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
Move GRF register bit definition into GRF header file, remove
'GRF_' prefix and add 'GPIOmXn_' as prefix for bit meaning.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
U-Boot prefer to use MASKs with SHIFT embeded, clean the Macro
definition in grf header file and pinctrl driver.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
- hclk/pclk_div range should use '<=' instead of '<'
- use GPLL for pd_bus clock source
- pd_bus HCLK/PCLK clock rate should not bigger than ACLK
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Embeded the shift in mask MACRO definition in cru header file
and clock driver.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
PX5 EVB is designed by Rockchip for automotive field
with integrated CVBS (TP2825) / MIPI DSI / CSI / LVDS
HDMI video input/output interface, audio codec ES8396,
WIFI / BT (on RTL8723BS), Gsensor BMA250E and light&proximity
sensor STK3410.
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The GeekBox is a TV box from GeekBuying, based on an MXM3 module.
The module can be used with base boards such as the GeekBox Landingship.
This adds basic support to chain-load U-Boot from Rockchip's miniloader.
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Sheep board is designed by Rockchip as a EVB for rk3368.
Currently it is able to boot a linux kernel and system
to console with the miniloader run as fist level loader.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
The RK3368 is an octa-core Cortex-A53 SoC from Rockchip.
This adds basic support to chain-load U-Boot from Rockchip's
miniloader.
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add driver to support iomux setup for the most commonly
used peripherals on rk3368.
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add driver to setup the various PLLs and peripheral
clocks on the RK3368.
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Since priv->init_voltage is an unsigned integer it can never be
negative. So the current code fails to detect a missing
'regulator-init-microvolt' property and instead misconfigures the
PWM device. Fix this by making the relevant members of
'struct pwm_regulator_info' signed integers.
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Till now get_ldo_reg did a return &rk808_ldo[num - 1]; to return
the ldo register offset but didn't take into account that its
calling functions already created the ldo as ldo = dev->driver_data - 1.
This resulted in the setting for ldo8 writing to the register of ldo7
and so on. So fix this and get the correct ldo register data.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Simon Glass <sjg@chromium.org>
With everything in place (i.e. the new efuse driver, the clk-support
for the non-secure efuse block, and the board-specific functions to
derive 'serial#' from the cpu-id within the efuses), enable this in
the RK3399-Q7 defconfig.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Simon Glass <sjg@chromium.org>
Generate a MAC address based on the cpuid available in the efuse
block: Use the first 6 byte of the cpuid's SHA256 hash and set the
locally administered bits. Also ensure that the multicast bit is
cleared.
The MAC address is only generated and set if there is no ethaddr
present in the saved environment.
Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com>
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
With our efuse driver for the RK3399 ready, we can add the
board-specific code that consumes the cpuid from the efuse block and
postprocesses it into the system serial (using the same CRC32 based
derivation as in Linux).
We expose the cpuid via two distinct environment variables:
serial# - the serial number, as derived in Linux
cpuid# - the raw 16 byte CPU id field from the fuse block
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Simon Glass <sjg@chromium.org>
This adds a simple driver for reading the efuse block of the RK3399.
It should be easy enough to add drivers for other devices (e.g. the
RK3328, RK3368, etc.) by passing the device details via driver_data.
Unlike the kernel driver (using the nvmem subsystem), we don't expose
the efuse as multiple named cells, but rather as a linear memory that
can be read using misc_read(...).
The primary use case (as of today) is the generation of a 'serial#'
(and a 'cpuid#') environment variable for the RK3399-Q7 (Puma)
system-on-module.
Note that this adds a debug-only (i.e. only if DEBUG is defined)
command 'rk3399_dump_efuses' that dumps the efuse block's content.
N.B.: The name 'rk3399_dump_efuses' was intentionally chosen to
include a SoC-name (together with a comment in the function) to
remind whoever adds support for additional SoCs that this
function currently makes assumptions regarding the size of the
fuse-box based on the RK3399. The hope is that the function is
adjusted to reflect any changes resulting from generalising the
driver for multiple SoCs and is then renamed.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Some host like SD and eMMC may use DMA to transter data to SRAM,
set memory to non-secure to make sure the address can be accessed.
The security of SRAM in OS suppose to initialized in ATF bl31, and
the SPL is before the bl31.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
The option is named PINCTRL_ROCKCHIP_RK3399 not ROCKCHIP_RK3399_PINCTRL.
Set the correct option.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Simon Glass <sjg@chromium.org>
This patch fixes the below warning by typecasting it properly
fs/ubifs/ubifs.c: In function 'ubifs_load':
fs/ubifs/ubifs.c:942:29: warning: cast to pointer from integer
of different size [-Wint-to-pointer-cast]
err = ubifs_read(filename, (void *)addr, 0, size, &actread);
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
The branch instruction only has an 11-bit relative target address, which
is sometimes not enough.
Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Rather than change asm files that come from Linux, add the symbols
to Kconfig. Since one of the symbols is for thumb2 builds, make
CPU_V7M always select them.
Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
If CONFIG_CLK flag is not set, compilation raises the
following error message:
drivers/ram/stm32_sdram.c: In function 'stm32_fmc_probe':
drivers/ram/stm32_sdram.c:154:2: error: 'ret' undeclared (first use in this function)
ret = stm32_sdram_init(dev);
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
cc: Vikas Manocha <vikas.manocha@st.com>
Mark explicitly bss sections to not be loaded at
run time.
The similar patch was done in past by:
"Fix linker scripts: add NOLOAD atribute to .bss/.sbss sections"
(sha1: 64134f0112)
The problem is related to latest toolchain added to Xilinx
v2017.1 design tools where jtag loader is trying to access
ununitialized memory.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Add support for calling poweroff in case of psci is wired.
Based on the same solution as is used for reset.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
[trini: Move all logic in to fwcall.c as other ARMs implement poweroff
via PMIC]
Signed-off-by: Tom Rini <trini@konsulko.com>
With clang-3.8 we see warnings like:
cmd/ethsw.c:304:6: warning: implicit conversion from
enumeration type 'enum ethsw_keyword_opt_id' to different enumeration type
'enum ethsw_keyword_id' [-Wenum-conversion]
ethsw_id_pvid_no,
^~~~~~~~~~~~~~~~
Because we have one enum for ethsw_keyword_id and a second enum for
ethsw_keyword_opt_id. This ends up being safe as ethsw_keyword_opt_id
explicitly starts after ethsw_keyword_id enum ends. Disable the
warning here rather than collapse these into one enum and rely on
comments to denote where optional keywords begin.
Cc: Codrin Ciubotariu <codrin.ciubotariu@freescale.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Unit tests require mallinfo which in turn requires DEBUG on
dlmalloc to be enabled.
The dependancy on CONFIG_SANDBOX is wrong.
Signed-off-by: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The dtb blob section must always be present in the resulting image.
Either if OF_EMBEDED is used or if unit tests include dtb blobs.
Signed-off-by: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
We only want to apply files such as 'omap5-u-boot.dtsi', which resides
in arch/arm/dts/ to other files in arch/arm/dts/ and not say
test/overlay/. Rework the make logic to check for -u-boot.dtsi files in
the same directory as their target dts.
Cc: Simon Glass <sjg@chromium.org>
Reported-by: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tested-by: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The problems with the current DFU layout are:
MMC: The space allocated for u-boot is too small for the latest u-boot
(>750KB). We need to increase it. eMMC uses a much bigger area (2MB).
eMMC: region "u-boot.img.raw" overlaps the environment area and the region
"spl-os-image.raw".
both: region "spl-os-image.raw" is quite small and can't handle android
kernels
Fixing this requires growing some regions and moving others.
Care has been taken to leave some room for further growth of
"spl-os-args.raw".
Also the "env" now appears in the dfu so that it's apparent that the
region is not free space that can be used to grow "u-boot.img.raw".
The MLO region is 0x100 sectors wide but the 0x100 are unused in case the
MLO comes too overflow this areas.
The total space allocated for those raw binaries is 16MB, of which 13+MB
are reserved for the kernel image.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
Much of the entries here simply depend on SPL (or TPL). Instead of this
redundancy use if SPL / if TPL to guard the rest of the choices and only
show them when we have the relevant option enabled.
Signed-off-by: Tom Rini <trini@konsulko.com>
At present bootstage only supports U-Boot proper. But SPL can also consume
boot time so it is useful to have the record start there.
Add bootstage support to SPL. Also support stashing the timing information
when SPL finishes so that it can be picked up and reported by U-Boot
proper. This provides a full boot time record, excluding only the time
taken by the boot ROM.
Signed-off-by: Simon Glass <sjg@chromium.org>
There are a few places that should use const *, such as
bootstage_unstash(). Update these to make it clearer when parameters are
changed.
Signed-off-by: Simon Glass <sjg@chromium.org>
We should return a proper error number instead of just -1. This helps the
caller to determine what when wrong. Update a few functions to fix this.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present we don't allow use of bootstage before driver model is running.
This means we cannot time the init of driver model itself.
Now that bootstage requires its own board-specific timer, we can move its
init to earlier in the sequence, both before and after relocation.
Signed-off-by: Simon Glass <sjg@chromium.org>
Some boards cannot access pre-relocation data after relocation. Reserve
space for this and copy it during preparation for relocation.
Signed-off-by: Simon Glass <sjg@chromium.org>
We can now use the record count to determine whether a record is valid or
not. Drop the test for a zero time.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present bootstage has a large array with all possible bootstage IDs
recorded. It adds times to the array element indexed by the ID. This is
inefficient because many IDs are not used during boot. We can save space
by only recording those IDs which actually have timestamps.
Update the array to use a record count, which increments with each
addition of a new timestamp. This takes longer to record a time, since it
may involve an array search. Such a search may be particularly expensive
before relocation when the CPU is running slowly or the cache is off. But
at that stage there should be very few records.
Signed-off-by: Simon Glass <sjg@chromium.org>
There are several code style and comment nits. Fix them and also remove
the comment about passing bootstage to the kernel being TBD. This is
already supported.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present bootstage uses the data section of the image to store its
information. There are a few problems with this:
- It does not work on all boards (e.g. those which run from flash before
relocation)
- Allocated strings still point back to the pre-relocation data after
relocation
Now that U-Boot has a pre-relocation malloc() we can use this instead,
with a pointer to the data in global_data. Update bootstage to do this and
set up an init routine to allocate the memory.
Now that we have a real init function, we can drop the fake 'reset' record
and add a normal one instead.
Note that part of the problem with allocated strings remains. They are
reallocated but this will only work where pre-relocation memory is
accessible after relocation.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present we provide a default version of this function for use by
bootstage. However it uses the system timer and therefore likely requires
driver model. This makes it impossible to time driver-model init.
Drop the function and require boards to provide their own. Add a sandbox
version also. There is a default implememtation in lib/time.c for boards
which use CONFIG_SYS_TIMER_COUNTER.
Signed-off-by: Simon Glass <sjg@chromium.org>
The bootelf command could, but does not, pass additional arguments along
on the command line. Make do_bootelf consume bootelf/flags/address as
needed and then pass along anything else to the ELF application we've
launched.
Reported-by: Thomas Doerfler <thomas.doerfler@embedded-brains.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
This deassert counter allow to manage "shared" reset lines
encountered in some specific case. On STiH410 SoC, DWC3,
EHCI and OHCI are all using a respective PHY, but all of
these PHYs shared a "global" reset.
Currently, during command "usb stop", all host controller are
stopped (XHCI, EHCI and OHCI). XHCI is first shutdowned, which
means that PHY global reset is asserted. Then EHCI is shutdowned,
but its PHY reset has already been asserted which make handshake()
call failed in ehci_shutdown().
This counter allows to really assert a reset lines only when the
"last" user is asserting it.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
All tests in test_hush_if_test depends on hush parser to be
present. This patch simplify test dependencies by using global
pytestmark.
Reported-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
The SD card automatic installation system depends on the default
environment of the previous U-Boot.
Add the missing environment variables.
Signed-off-by: Uri Mashiach <uri.mashiach@compulab.co.il>
Reviewed-by: Tom Rini <trini@konsulko.com>
Supported boot devices are raw QSPI and raw SD card.
Add support for a FAT16/32 file system for SD card.
The SOC's boot ROM only supports FAT file system.
Therefore remove the SPL support for the EXT file system.
Signed-off-by: Uri Mashiach <uri.mashiach@compulab.co.il>
Reviewed-by: Tom Rini <trini@konsulko.com>
We should not have an arch-specific header file in common.h. Adjust the
board files a little so it is not needed, and drop it.
Signed-off-by: Simon Glass <sjg@chromium.org>
We should not have an arch-specific header file in common.h. Instead, use
the asm/hardware.h header to provide the required declarations, and drop
the common.h changes.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
These declarations should not be in common. Remove those that are not
needed and move the others to an arch-specific location.
Signed-off-by: Simon Glass <sjg@chromium.org>
The declarations should not be in common.h. Move them to the arch-specific
headers.
Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: Fixup thinko defined(FSL_LSCH3) -> defined(CONFIG_FSL_LSCH3)]
Signed-off-by: Tom Rini <trini@konsulko.com>
Set up a new asm/ppc.h header file to hold this arch-specific stuff. It
should not be in common.h. It probably should be refactored to use
asm/arch instead, but that is a job for the maintainer.
Signed-off-by: Simon Glass <sjg@chromium.org>
With a small tweak we can avoid including these files for all boards.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
At present common.h includes various ARM-specific headers. In preparation
for dropping this, add a few explicit declarations.
Signed-off-by: Simon Glass <sjg@chromium.org>
Rather than relying on common.h to provide this include, which is going
away at some point, include it explicitly in each file.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Rather than including this arch-specific header file in common.h, include
it from within nds32's u-boot.h header.
Signed-off-by: Simon Glass <sjg@chromium.org>
Rather than including this arch-specific header file in common.h, include
it from within mips's u-boot.h header.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Rather than including this arch-specific header file in common.h, include
it from within arm's u-boot.h header.
Also drop the comment about something to be fixed. It has been there
forever and it is not clear what it means.
Signed-off-by: Simon Glass <sjg@chromium.org>
Rather than including this arch-specific header file in common.h, include
it from within x86's u-boot.h header.
Also drop the comment about something to be fixed. It is not clear what
needs fixing.
Signed-off-by: Simon Glass <sjg@chromium.org>
Rather than including this arch-specific header file in common.h, include
it from within sandbox's u-boot.h header.
Also drop the comment about something to be fixed.
Signed-off-by: Simon Glass <sjg@chromium.org>
Rather than including this arch-specific header file in common.h, include
it from within arc's u-boot.h header.
Signed-off-by: Simon Glass <sjg@chromium.org>
The symbol CONFIG_TI81XX is used for the parts that are common to the
TI816x and TI814x SoCs and are not part of CONFIG_ARCH_OMAP2PLUS nor
CONFIG_AM33XX. It however has so few uses that we can just modify the
code to check for both and drop the symbol. The symbols CONFIG_TI816X
and CONFIG_TI814X are for the repective SoCs.
Signed-off-by: Tom Rini <trini@konsulko.com>
- Switch to using <configs/ti_armv7_omap.h> and family. This lets us
drop lots of custom defines.
- Ensure that our default environment uses DEFAULT_LINUX_BOOT_ENV so
that Linux will boot correctly.
- Enable CONFIG_DISTRO_DEFAULTS
- Switch to using CONFIG_OF_CONTROL
- Various other cleanups to match other SoCs in the family line.
Signed-off-by: Tom Rini <trini@konsulko.com>
On this platform, we can trace a general failure to boot to enabling /
disabling this option. When this is enabled, we go off into the
weeds during SPL and are unable to talk with the SD card and
mmc_initialize() fails.
Signed-off-by: Tom Rini <trini@konsulko.com>
The ti816x/am389x SoC is the first generation in what U-Boot calls the
"am33xx" family. In the first generation of this family the DDR
initialization sequence is quite different from all of the subsequent
generations. Whereas with ti814x (second generation) we can easily work
the minor differenced between that and am33xx (third generation), our
attempts to do this for ti816x weren't sufficient. Rather than add a
large amount of #ifdef logic to make this different sequence work we add
a new file, ti816x_emif4.c to handle the various required undocumented
register writes and sequence and leverage what we can from
arch/arm/mach-omap2/am33xx/ddr.c still. As DDR2 has similar problems
today but I am unable to test it, we drop the DDR2 defines from the code
rather than imply that it works by leaving it. We also remove a bunch
of other untested code about changing the speed the DDR runs at.
Signed-off-by: Tom Rini <trini@konsulko.com>
Rather than have a long and if check in the Makefile, mark the default
lowlevel_init function as weak (as we do on armv8) so that SoCs can
override it if needed, and it will still be discarded if unused.
Provide a weak s_init as well to allow for this to link and be
discarded.
Signed-off-by: Tom Rini <trini@konsulko.com>
Any TFTP or DHCP boot on the Davinci OMAP-L138 LCDK board requires
that the 'ethaddr' variable be defined. There are no e-fuses to store
the ethernet mac address for this platform, and neither is a MAC
address reserved in any format. So enable random MAC address support
so that networking boot can be supported.
Signed-off-by: Suman Anna <s-anna@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
We used to have opencoded ehci_readl()/writel() which required no
external functions to be called.
Now with attempt to switch to generic readl()/writel() accessors
we see a missing declaration of those accessors in ehci-ppc4xx.
Something like that happens if applied
http://patchwork.ozlabs.org/patch/726714/:
--------------------------------->8---------------------------
CC drivers/usb/host/ehci-pci.o
In file included from drivers/usb/host/ehci-pci.c:14:0:
drivers/usb/host/ehci-pci.c: In function 'ehci_pci_init':
drivers/usb/host/ehci.h:108:36: warning: implicit declaration of function 'readl' [-Wimplicit-function-declaration]
#define ehci_readl(x) cpu_to_le32(readl(x))
^
drivers/usb/host/ehci.h:23:26: note: in definition of macro 'HC_LENGTH'
#define HC_LENGTH(p) (((p) >> 0) & 0x00ff)
^
include/linux/byteorder/generic.h:89:21: note: in expansion of macro '__cpu_to_le32'
#define cpu_to_le32 __cpu_to_le32
^~~~~~~~~~~~~
drivers/usb/host/ehci-pci.c:33:14: note: in expansion of macro 'ehci_readl'
HC_LENGTH(ehci_readl(&hccr->cr_capbase)));
^~~~~~~~~~
--------------------------------->8---------------------------
This the same fix as we have for "ehci-ppc4xx" in
83cb46c286 "ehci-ppc4xx: Prepare for usage of readl()/writel() accessors".
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefan Roese <sr@denx.de>
Remove the CONFIG_I2C_COMPAT, instead enable the CONFIG_SYS_I2C_S3C24X0.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Change the nodes relevant to mmc/sd for using DM.
compatible are also changed to each SoCs.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
First of all, it's inappropriate to call setup_internal_uart() in a
generic API fsp_init(), as CONFIG_INTERNAL_UART is an option that
is only available on BayTrail platform. Secondly even for BayTrail,
there is no need to call setup_internal_uart() at all, as Intel FSP
will do this for us.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
It was observed that when -DDEBUG is used to generate a debug build,
U-Boot does not boot on MinnowMax board. A workaround is to disable
CONFIG_DEBUG_UART. The real issue is that in order to have the debug
uart to work, BayTrail SoC needs to be configured so that its internal
uart is available to be used as the debug uart.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
At present lpe/lpss-sio/scc FSP properties are all boolean, but in
fact for "enable-lpe" it has 3 possible options. This adds macros
for these options and change the property from a boolean type to
an integer type, and change their names to explicitly indicate what
the property is really for.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Introduce various meaningful macros for FSP settings and switch over
to use them instead of magic numbers.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
"serial-debug-port-address" and "serial-debug-port-type" settings
are actually reserved in the FSP UPD data structure. Remove them.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
The default value of "fsp,mrc-init-tseg-size" should be 1 (1MB) per
FSP default settings. 0 is not valid.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Now that these symbols are in Kconfig, migrate all users. Use imply on
a number of platforms that default to having this enabled. As part of
this we must migrate some straglers for CMD_FAT and DOS_PARTITION.
Signed-off-by: Tom Rini <trini@konsulko.com>
Add fallbacks needed to keep all boards building
while they are migrated to use Kconfig symbols
instead of defines in <board>_config.h files for
FAT filesystem.
These should eventually go away once Kconfig select
or imply statements are put in place and duplicated
defines in <board>_config.h removed.
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
[trini: Update logic since CMD_FAT / CONFIG_SPL_FAT_SUPPORT are
selecting FS_FAT]
Signed-off-by: Tom Rini <trini@konsulko.com>
Since config fallbacks contained in include/config_fallbacks.h
come into k2g_evm.h file through ti_armv7_keystone2.h, it should
be the last file included.
Without this, #define of FAT_WRITE when environment is in FAT
does not happen as the environment location is decided later
in the file.
Similar issues can come with other config fallbacks implemented.
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Not all TI Keystone2 EVMs want environment in NAND flash.
K2G EVM which has an MMC/SD slot, keep environment in a
FAT partition on SD card.
Since ti_armv7_keystone2.h defines environment is in NAND,
boards which do not follow that have to #undef'ine that
configuration. This leads to ugly ordering issues around
where exactly the include of ti_armv7_keystone2.h can come
in within the k2*_evm.h files.
Move environment location to config file of each board.
This should make it easy to change it for any one board
without affecting all other boards.
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Add Kconfig symbols for various configurations
supported by FAT filesystem support code.
CONFIG_SUPPORT_VFAT has been left out since its
force enabled in include/fat.h and probably
should get removed at some point.
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
[trini: add select FS_FAT for CMD_FAT and SPL_FAT_SUPPORT]
Signed-off-by: Tom Rini <trini@konsulko.com>
On MIPS systems DMA isn't coherent with the CPU caches unless an IOCU is
present. When there is no IOCU we need to writeback or invalidate the
data caches at appropriate points. Perform this cache maintenance in
the pch_gbe driver which is used on the MIPS Boston development board.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Use the virt_to_bus & bus_to_virt functions rather than phys_to_bus &
bus_to_phys, since the addresses accessed by the CPU will be virtual
rather than physical. On MIPS physical & virtual addresses differ as we
use virtual addresses in kseg0, and attempting to use physical addresses
directly caused problems as they're in the user segment which would be
mapped via the uninitialised TLB.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
The loop to set up buffer addresses in rx descriptors always operated on
descriptor 0, rather than on each descriptor sequentially. Fix this in
order to setup correct buffer addresses for each descriptor.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Using the EG20T gigabit ethernet controller on the MIPS Boston board, we
find that we have to reset the controller in order for the RGMII link to
the PHY to become functional. Without doing so we constantly time out in
pch_gbe_mdio_ready.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Dont flush dummy descriptors as they are already
allocated from a region with dcache off. Tested
this on Zynq(zc702) and ZynqMP(zcu102) boards.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Use wait_for_bit to be non breakable as using it with
breakable causes issue of un interruptible auto negotiation.
This is due to the ctrlc pressed will taken for wait_for_bit()
abort during phy_read() and hence not coming out of
auto negotiation.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
The 88E1518 code is programming the wrong registers for rgmii-id,
rgmii-txid and rgmii-rxid interfaces.
Since the PHY defaults to rgmii-id, it would appear that the code
was previously only used with sgmii and rgmii-id interfaces.
Tested on 88E1512 PHY in rgmii-id mode which is from the same family
as 88E1518.
Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Checking if dev is NULL after dereferencing it does not make sense.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Abort CPSW driver init when auto-negotiation of link
times out. Currently, the code ignores return status
of phy_startup(), and goes ahead with network operation
(like DHCP) even though the link may be down.
Instead, abort init process if link is down or if there
is another error, so phy_startup() can easily be retried
again. This also helps quick fallback to next network interface
(like USB RNDIS) without inordinate delay.
Tested on AM571x IDK and AM335x BeagleBone black.
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Always search the PHY to determine the macb->phy_addr before using
the PHY to fix "No PHY present" error.
Fix the wrong test of the GMAC's phy interface mode, it should be
PHY_INTERFACE_MODE_RGMII.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
This patch fixes some remaining issues in the mvpp2 driver for the 10GB
support on port 0. These changes are:
- Incorrect PCS configuration
- Skip PHY configuration when no PHY is connected
- Skip GMAC configurations if 10G SFI mode set
Signed-off-by: Stefan Chulski <stefanc@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Kostya Porotchkin <kostap@marvell.com>
Cc: Nadav Haklai <nadavh@marvell.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
The .read_rom_hwaddr net_ops hook does not check the return value, which
is why it was never caught that we are currently returning 0 if the
read_rom_hwaddr function return -ENOSYS and -ENOSYS otherwise.
In this case we can simplify this by just returning the result of the
function.
Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
This change migrate the following configuration options for Kconfig:
* PHY_GIGE, indicates that a controller (with an appropriate PHY) is
Gigabit capable and enables extra support in the miiutil for
parsing the status of Gigabit PHYs
* adds configuration options for Micrel KSZ9021 and KSZ9031 GbE PHYs,
which previously had to enabled through a board-specific config file
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
This file was used to select between the normal and fallback libfdt
implementations. Now that we only have one, it is not needed.
Drop it and fix up all users.
Signed-off-by: Simon Glass <sjg@chromium.org>
Since we only have one Fdt implementation now we don't need to have a base
class. Merge the implementation and the base class together.
Signed-off-by: Simon Glass <sjg@chromium.org>
Previously we were sometimes forced to collate x86 microcode due to not
having access to the offset of each individual piece. Now that we never
use fdt_fallback, we don't have this problem. Drop this special case from
the code.
Signed-off-by: Simon Glass <sjg@chromium.org>
This is needed by binman and dtoc, so if those are being used, check that
the library is present and complain if not. Make sure that any error
appears on stderr so that buildman notices it.
This means that the fallback library (which uses fdtget) will not be used
anymore and swig will need to be installed to use binman / dtoc.
This affects any board which uses binman (currently sunxi and x86) or dtoc
(anything that uses CONFIG_SPL_OF_PLATDATA, currently some rockchip
boards).
Signed-off-by: Simon Glass <sjg@chromium.org>
The tests don't currently cover all the different property types. Add a
new test which checks each property type in turn, to make sure each has
the correct type and value.
Signed-off-by: Simon Glass <sjg@chromium.org>
Since fdt is a module it conflicts with this variable name and prevents it
being used in tests. Rename the variable.
Signed-off-by: Simon Glass <sjg@chromium.org>
Build the upstream python libfdt module. At present the legacy module is
still built and is the one that it used. Future work will switch this
over.
Signed-off-by: Simon Glass <sjg@chromium.org>
Now that this module has been accepted upstream we should stop using the
local U-Boot one. In preparation for this, rename it to indicate it is for
legacy use.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present only a subset of source files are build. Add the rest and
refactor this so that a source file list is available also. This will be
used in later commit.
Signed-off-by: Simon Glass <sjg@chromium.org>
These header files are actually part of libfdt. Move them there to make
it easier to build pylibfdt and easier to merge changes from upstream.
Update the license header to use SPDX at the same time.
Signed-off-by: Simon Glass <sjg@chromium.org>
This gives a warning with some native compilers:
lib/fdtdec.c:1203:8: warning: format ‘%llx’ expects argument of type
‘long long unsigned int’, but argument 3 has type
‘long unsigned int’ [-Wformat=]
Fix it with a cast.
Signed-off-by: Simon Glass <sjg@chromium.org>
This gives a warning with some native compilers:
cmd/pci.c:152:11: warning: format ‘%llx’ expects argument of type
‘long long unsigned int’, but argument 3 has type
‘u64 {aka long unsigned int}’ [-Wformat=]
Fix it with a cast.
Signed-off-by: Simon Glass <sjg@chromium.org>
An early version of this is available upstream. Bring it in as a starting
point. This is from dtc upstream commit e56f2b0.
Future work will plumb it into dtoc and remove the now-unnecessary local
libraries.
Signed-off-by: Simon Glass <sjg@chromium.org>
Orangepi Prime is an open-source single-board computer
using the Allwinner h5 SOC.
H5 Orangepi Prime has
- Quad-core Cortex-A53
- 2GB DDR3
- Debug TTL UART
- 1000M/100M Ethernet RJ45
- Three USB 2.0
- HDMI
- Audio and MIC
- Wifi + BT
- IR receiver
- HDMI
- Wifi + BT
Boot from MMC:
-------------
U-Boot SPL 2017.05-00662-ga3f4c05-dirty (May 25 2017 - 13:30:14)
DRAM: 2048 MiB
Trying to boot from MMC1
NOTICE: BL3-1: Running on H5 (1718) in SRAM A2 (@0x44000)
NOTICE: Configuring SPC Controller
NOTICE: BL3-1: v1.0(debug):aa75c8d
NOTICE: BL3-1: Built : 18:28:27, May 24 2017
INFO: BL3-1: Initializing runtime services
INFO: BL3-1: Preparing for EL3 exit to normal world
INFO: BL3-1: Next image address: 0x4a000000, SPSR: 0x3c9
U-Boot 2017.05-00662-ga3f4c05-dirty (May 25 2017 - 13:30:14 +0000) Allwinner Technology
CPU: Allwinner H5 (SUN50I)
Model: OrangePi Prime
DRAM: 2 GiB
MMC: SUNXI SD/MMC: 0
*** Warning - bad CRC, using default environment
In: serial
Out: serial
Err: serial
Net: phy interface7
eth0: ethernet@1c30000
starting USB...
USB0: USB EHCI 1.00
USB1: USB OHCI 1.0
scanning bus 0 for devices... 1 USB Device(s) found
scanning usb for storage devices... 0 Storage Device(s) found
Hit any key to stop autoboot: 0
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
CONFIG_SPL_BOARD_INIT is used for SPL boot. It is only enabled for
secure boot at this moment. Enable it in defconfig files for SPL
build.
Signed-off-by: York Sun <york.sun@nxp.com>
Loading PPA in SPL puts the rest of U-Boot (including RAM version
loaded later) in EL2 with MMU and cache enabled. Once PPA is loaded,
PSCI is available.
Signed-off-by: York Sun <york.sun@nxp.com>
When U-Boot boots from EL2, skip some lowlevel init code requiring
EL3, including CCI-400/CCN-504, trust zone, GIC, etc. These
initialization tasks are carried out before U-Boot runs. This applies
to the RAM version image used for SPL boot if PPA is loaded first.
Signed-off-by: York Sun <york.sun@nxp.com>
Add CONFIG_NAND_BOOT config flag to organise
NAND_BOOT specific code in config flag like
-nand-boot specfic errata errata_rcw_src()
-CONFIG_SYS_NAND_U_BOOT_DST,etc
Signed-off-by: Santan Kumar <santan.kumar@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
modify u_qe_init to upload QE firmware from SD card when it is SD
boot
Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Previous to MC v10.x, port mac address was specified via DPL. Since
newer MC versions are compatible with old style DPLs, make the u-boot
env mac addresses visible there. This applies only to DPLs that have
an older version.
DPLs use 32 bit values for specifying MAC addresses. U-boot
environment variables take precedence over the MAC addresses already
visible in the DPL/DPC.
Signed-off-by: Bogdan Purcareata <bogdan.purcareata@nxp.com>
Signed-off-by: Heinz Wrobel <heinz.wrobel@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
DPAA2 platforms boot the Management Complex based on the u-boot env
variable "mcinitcmd". Instead of doing this step on each platform
individually, define a single mc_env_boot function in the MC driver,
since it's semantically tied to it.
Call the function in a per-board reset_phy hook, as it gets called at a
later moment, when all board PHY devices have been initialized.
Signed-off-by: Bogdan Purcareata <bogdan.purcareata@nxp.com>
Signed-off-by: Heinz Wrobel <heinz.wrobel@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
The Allwinner H5 SoC is pin-compatible to the H3 SoC,
but uses Cortex-A53 cores instead.
So move the shared cpu based and peripherals nodes into
sun50i-h5.dtsi so, that it can shared among the sun50i-h5
board dts files.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
This updates sandbox to use a live device tree. This means that after
relocation (from board_init_r() onwards) it no-longer uses flat device
tree.
Signed-off-by: Simon Glass <sjg@chromium.org>
This PMIC driver (power and GPIO) is used by the sandbox SPMI tests.
Update the drivers to support a live device tree so that the tests pass.
Signed-off-by: Simon Glass <sjg@chromium.org>
Update the SPI uclass to support a live device tree. Also adjust
spi_slave_ofdata_to_platdata() to accept a device instead of a blob and
offset.
Signed-off-by: Simon Glass <sjg@chromium.org>
Update the PCI uclass to support livetree. This mostly involves fixing
the address decoding from the device tree.
Signed-off-by: Simon Glass <sjg@chromium.org>
Use ut_asserteq() to test equality since this gives a better error message
on failure. Also make a few of the tests more specific.
Signed-off-by: Simon Glass <sjg@chromium.org>
We cannot access the device tree via an offset when running in livetree
mode. Separate out that part of the bus' children tests and mark it as
for the flat tree only.
Signed-off-by: Simon Glass <sjg@chromium.org>
Update the xlate() method to use ofnode_phandle_args instead of the fdtdec
variant. This will allow drivers to support a live device tree.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add an implementation of strcspn() which returns the number of initial
characters that do not match any in a rejection list.
Signed-off-by: Simon Glass <sjg@chromium.org>
This functions works like strchr() but returns the end of the string if
the character is not found. Add an implementation of this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add some definitions and helpers for livetree in the main of.h header
file. These include:
- reading multi-cell integers
- default number of address/size cells
- functions for comparing names
Signed-off-by: Simon Glass <sjg@chromium.org>
These two functions have an of_ prefix which conflicts with naming used
in of_addr. Rename them:
fdt_read_number
fdt_support_bus_default_count_cells
Signed-off-by: Simon Glass <sjg@chromium.org>
The standard sandbox board cannot run the of-platdata test since it needs
SPL. Also, we should test the flat tree version of sandbox.
Add these tests to the default test script.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a sandbox board to test the non-livetree build (i.e. with
CONFIG_OF_FLAT disabled). This increases our build and test coverage.
Signed-off-by: Simon Glass <sjg@chromium.org>
Convert this driver to support the live device tree and remove the old
fdtdec support.
The keyboard is not yet converted.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add support for requesting GPIOs with a live device tree.
This involves adjusting the function signature for the legacy function
gpio_request_by_name_nodev(), so fix up all callers.
Signed-off-by: Simon Glass <sjg@chromium.org>
Fixes to stm32f746-disco.c:
Signed-off-by: Tom Rini <trini@konsulko.com>
Move the main part of the GPIO request function into a separate function
so that it can be used by the live tree function when added. Update the
xlate method to use a node reference.
Update all GPIO drivers to handle the modified xlate() method.
Signed-off-by: Simon Glass <sjg@chromium.org>
Some tests require either livetree or flat tree. Add flags to allow the
tests to specify this. Adjust the test runner to run with livetree (if
supported) and then flat tree.
Some video tests are quite slow and running on flat tree adds little extra
test value, so run these on livetree only.
Signed-off-by: Simon Glass <sjg@chromium.org>
It is useful to run the driver model tests with both livetree and flat
tree in case something is different between the two. Add this feature to
the test runner.
Signed-off-by: Simon Glass <sjg@chromium.org>
We want to run the same test on flat and live trees. In preparation for
this, create a new function which handles running a test.
Signed-off-by: Simon Glass <sjg@chromium.org>
Running a new test should reset the sandbox state to avoid tests
interferring with each other. Move the existing state-reset code into a
function so it can be used from tests.
Also update the code to reset the SPI devices and adjust the test code to
call it.
Signed-off-by: Simon Glass <sjg@chromium.org>
When starting up driver model with a live tree we need to scan the tree
for devices. Add code to handle this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Adjust this function to us an ofnode instead of an offset, so it can be
used with livetree. This involves updating all callers.
Signed-off-by: Simon Glass <sjg@chromium.org>
Adjust this function to use an ofnode instead of an offset, so it can be
used with livetree. This involves updating all callers.
Signed-off-by: Simon Glass <sjg@chromium.org>
When a live tree is being used we need to record the node that was used to
create the device. Update device_bind_with_driver_data() to support this.
Signed-off-by: Simon Glass <sjg@chromium.org>
When the live tree is supported some functions need to change a little.
Add an implementation which is used when not inlining these functions.
Signed-off-by: Simon Glass <sjg@chromium.org>
It is common to read a device-tree property from the node associated with
a device. Add convenience functions to do this so that drivers do not need
to deal with accessing the ofnode from the device.
These functions all start with 'dev_read_' to provide consistent naming
for all functions which read information from a device's device tree node.
These are inlined when using the flat DT to save code size. The live tree
implementation is added in a later commit.
Signed-off-by: Simon Glass <sjg@chromium.org>
Some functions deal with structured data rather than simple data types.
It makes sense to have these in their own file. For now this just has a
function to read a flashmap entry. Move the data types also.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add functions to access addresses in the device tree. These are brought
in from Linux 4.10.
Also fix up the header guard for fdtaddr.h to avoid confusion.
Signed-off-by: Simon Glass <sjg@chromium.org>
Since U-Boot supports both a live tree and a flat tree, we need an easy
way to access the tree without worrying about which is currently active.
To support this, U-Boot has the concept of an ofnode, which can refer
either to a live tree node or a flat tree node.
For the live tree, the reference contains a pointer to the node (struct
device_node *) or NULL if the node is invalid. For the flat tree, the
reference contains the node offset or -1 if the node is invalid.
Add a basic set of operations using ofnodes. These are implemented by
using either libfdt functions (in the case of a flat DT reference) or
the live-tree of_...() functions.
Note that it is not possible to have both live and flat references active
at the same time. As soon as the live tree is available, everything in
U-Boot should switch to using that. This avoids confusion and allows us to
assume that the type of a reference is simply based on whether we have a
live tree yet, or not.
Signed-off-by: Simon Glass <sjg@chromium.org>
The of_ prefix conflicts with the livetree version of this function.
Rename it to avoid problems when we add livetree support.
Signed-off-by: Simon Glass <sjg@chromium.org>
This function converts the flat device tree into a hierarchical one with
C structures and pointers. This is easier to access.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a basic assortment of functions to access the live device tree. These
come from Linux v4.9 and are modified for U-Boot to the minimum extent
possible. While these functions are now very stable in Linux, it will be
possible to merge in fixes if needed.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a Kconfig option to enable a live device tree, built at run time from
the flat tree. Also add structure definitions and a root node.
Signed-off-by: Simon Glass <sjg@chromium.org>
In linux v4.9 this returns a value. This saves checking the warning
condition twice in some code.
Update the U-Boot version to do this also.
Signed-off-by: Simon Glass <sjg@chromium.org>
Enable CONFIG_DM_MMC_OPS and CONFIG_BLK for all Tegra devices. This moves
Tegra to use driver model fully for MMC.
Signed-off-by: Simon Glass <sjg@chromium.org>
This function is called when the MMC block device is being probed. There
is a recursive call in this function since find_mmc_device() itself can
cause the MMC device to be probed.
Admittedly the MMC device should already be probed, since we would not be
probing its child otherwise, but the current code is unnecessarily
convoluted.
Rewrite this to access the MMC structure directly.
Signed-off-by: Simon Glass <sjg@chromium.org>
When binding a new MMC device, make sure that it has the required
operations. Since for now we still support *not* having the operations
(with CONFIG_DM_MMC_OPS not enabled) it makes sense to add this check.
Signed-off-by: Simon Glass <sjg@chromium.org>
The intention with block devices is that the device number (devnum field
in its descriptor) matches the alias of its parent device. For example,
with:
aliases {
mmc0 = "/sdhci@700b0600";
mmc1 = "/sdhci@700b0400";
}
we expect that the block devices for mmc0 and mmc1 would have device
numbers of 0 and 1 respectively.
Unfortunately this does not currently always happen. If there is another
MMC device earlier in the driver model data structures its block device
will be created first. It will therefore get device number 0 and mmc0
will therefore miss out. In this case the MMC device will have sequence
number 0 but its block device will not.
To avoid this, allow a device to request a device number and bump any
existing device number that is using it. This all happens during the
binding phase so it is safe to change these numbers around. This allows
device numbers to match the aliases in all circumstances.
Add a test to verify the behaviour.
Signed-off-by: Simon Glass <sjg@chromium.org>
Sometimes it is useful to be able to find a block device without also
probing it. Add a function for this as well as the associated test.
Signed-off-by: Simon Glass <sjg@chromium.org>
We should not call out to board code from drivers. With driver model,
mmc_power_init() already has code to use a named regulator, but the
legacy code path remains. Update the code to make this clear.
Signed-off-by: Simon Glass <sjg@chromium.org>
This core function will need to work with a live tree also. Update it to
accept an ofnode instead of an offset.
Signed-off-by: Simon Glass <sjg@chromium.org>
With live tree we need a struct device_node * to reference a node. With
the existing flat tree, we need an int offset. We need to unify these into
a single value which can represent both.
Add an ofnode union for this and adjust existing code to move to this.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present devices use a simple integer offset to record the device tree
node associated with the device. In preparation for supporting a live
device tree, which uses a node pointer instead, refactor existing code to
access this field through an inline function.
Signed-off-by: Simon Glass <sjg@chromium.org>
This function is only used in one place. It is better to just declare it
internally since there is a simpler replacement for use outside the
driver-model core code.
Signed-off-by: Simon Glass <sjg@chromium.org>
It is good practice to include common.h as the first header. This ensures
that required features like the DECLARE_GLOBAL_DATA_PTR macro,
configuration options and common types are available.
Fix up some files which currently don't do this. This is necessary because
driver model will soon start using global data and configuration in the
dm/read.h header file, included via dm.h. The gd->fdt_blob value will be
used to access the device tree and CONFIG options will be used to
determine whether to support inline functions in the header file.
Signed-off-by: Simon Glass <sjg@chromium.org>
This function should not be used outside the core driver-model code.
Update it to use dm_scan_fdt_dev() instead.
Signed-off-by: Simon Glass <sjg@chromium.org>
These support the flat device tree. We want to use the dev_read_..()
prefix for functions that support both flat tree and live tree. So rename
the existing functions to avoid confusion.
In the end we will have:
1. dev_read_addr...() - works on devices, supports flat/live tree
2. devfdt_get_addr...() - current functions, flat tree only
3. of_get_address() etc. - new functions, live tree only
All drivers will be written to use 1. That function will in turn call
either 2 or 3 depending on whether the flat or live tree is in use.
Note this involves changing some dead code - the imx_lpi2c.c file.
Signed-off-by: Simon Glass <sjg@chromium.org>
Move this group of address-related functions into a new file. These use
the flat device tree. Future work will provide new versions of these which
can support the live tree.
Signed-off-by: Simon Glass <sjg@chromium.org>
This header includes things that are needed to make driver build. Adjust
existing users to include that always, even if other dm/ includes are
present
Signed-off-by: Simon Glass <sjg@chromium.org>
BPI-M64 is a 64-bit quad-core mini single board computer
using the Allwinner A64 SOC.
BPI-M64 features
- 1.2 Ghz Quad-Core ARM Cortex A53
- 2GB DDR3 SDRAM with 733MHz
- MicroSD/eMMC(8GB)
- 10/100/1000Mbps ethernet (Realtek RTL8211E/D)
- Wifi + BT
- IR receiver
- Audio In/Out
- Video In/Out
- 5V 2A DC power-supply
For dts file,
Sync with Linux commit 4879b7ae("Merge tag 'dmaengine-4.12-rc1'").
Boot from MMC:
-------------
U-Boot SPL 2017.05-00667-g85dd258-dirty (May 29 2017 - 13:07:31)
DRAM: 2048 MiB
Trying to boot from MMC1
NOTICE: BL3-1: Running on A64/H64 (1689) in SRAM A2 (@0x44000)
NOTICE: Configuring SPC Controller
NOTICE: BL3-1: v1.0(debug):aa75c8d
NOTICE: BL3-1: Built : 18:28:27, May 24 2017
NOTICE: Configuring AXP PMIC
NOTICE: PMIC: setup successful
INFO: BL3-1: Initializing runtime services
INFO: BL3-1: Preparing for EL3 exit to normal world
INFO: BL3-1: Next image address: 0x4a000000, SPSR: 0x3c9
U-Boot 2017.05-00667-g85dd258-dirty (May 29 2017 - 13:07:31 +0000) Allwinner Technology
CPU: Allwinner A64 (SUN50I)
Model: BananaPi-M64
DRAM: 2 GiB
MMC: SUNXI SD/MMC: 0, SUNXI SD/MMC: 1
*** Warning - bad CRC, using default environment
In: serial
Out: serial
Err: serial
Net: No ethernet found.
starting USB...
No controllers found
Hit any key to stop autoboot: 0
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The Linux device tree for the Allwinner A64 SoC has changed a lot since
the U-Boot version was merged.
Let's replace the current DT with a exact copy of the Linux one as of:
commit c6778ff813d2ca3e3c8733c87dc8b6831a64578b
Merge: 0ff4c01 3c0e3abd
Author: Linus Torvalds <torvalds@linux-foundation.org>
Date: Tue May 9 10:07:33 2017 -0700
This is the DT used in Linux 4.12-rc1.
Since U-Boot has an Ethernet driver (while Linux does not yet), we
provide the required DT nodes for it in an ...-u-boot.dtsi file, to both
mark them as U-Boot specific and to allow easier upgrading once Linux gets
the driver and its own binding later.
Compared to the existing Ethernet DT nodes we just slightly tweak the clock
and reset nodes in there to match the new bindings used by Linux for those.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
Currently these (board agnostic) commands cannot be selected using
menuconfig and friends. Fix this the obvious way. As part of this,
don't muddle the meaning of CONFIG_HASH_VERIFY to mean both 'hash -v'
and "we have a hashing command" as this makes the Kconfig logic odd.
Signed-off-by: Daniel Thompson <daniel.thompson@linaro.org>
[trini: Re-apply, add imply for a few cases, run moveconfig.py, also
migrate CRC32_VERIFY]
Signed-off-by: Tom Rini <trini@konsulko.com>
Instead of having a peripheral clock of 50 MHz like the BCM63xx family, it
has a 48 MHz clock.
This fixes uart baud rate calculation for BCM3380.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
It's currently bugged and doesn't work for even cases.
Right shift bits instead of dividing and fix even cases.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
I missed this when I added support for BMIPS UART driver and it's needed to
achieve a real 115200 8N1 setup.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
As far as I know BCM3380 has a fixed CPU frequency since I couldn't find its
PLL registers in any documentation.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This is done in order to reuse ram size calculation for BCM6338/BCM6348
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Use a generic name for cpu_desc functions instead of using a specific SoC one.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This driver allows rebooting the SoC by calling wdt_expire_now op.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This driver allows rebooting the SoC by calling wdt_expire_now op.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This driver allows rebooting the SoC by calling wdt_expire_now op.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add a new sysreset driver that uses the recently added watchdog support.
It performs a full SoC reset by calling wdt_expire_now op.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This driver controls the watchdog present on this SoC.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This driver controls the watchdog present on this SoC.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This driver controls the watchdog present on this SoC.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This driver is a simplified version of linux/drivers/watchdog/bcm63xx_wdt.c
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
As mx6sabresd only supports SPL target now, there is no need to
keep the 'spl' in the name of the target, so simply rename it
to mx6sabresd_defconfig.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Engicam has several SOM's on i.MX6 stream, where each SOM
has one include/configs/*.h file, this patch generate single
config file for all SOM's include/configs/imx6-engicam.h
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Define FDT_ADDR based on the respective SOM, and later patches
will make use of this fdt_addr in single config file.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
- IMX_FEC_BASE: icorem6 using dts, no need for explicit base.
- CONFIG_ETHPRIME: ethprime env not using anywhere in the board.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
nand defconfig is accidentally removed from below
commit, so recover the same.
"icorem6: Make SPL to pick suitable fdt"
(sha1: 15455a6b01)
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
The maximum SD clock frequency in High Speed mode is 50 MHz. This change
makes it possible to get 48 MHz from the USB PLL (240 MHz / 5 / 1)
instead of the previous 33.25 MHz from the AHB clock (133 MHz / 2 / 2).
Signed-off-by: Benoît Thébaudeau <benoit@wsystem.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Introduce the imx_set_perclk() function to make it possible to set the
PER clocks.
Signed-off-by: Benoît Thébaudeau <benoit@wsystem.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
imx_get_perclk() used the AHB clock as the clock source for all PER
clocks, but the USB PLL output can also be a PER clock source if the
corresponding PER CLK MUX bit is set in CCM.MCR.
Signed-off-by: Benoît Thébaudeau <benoit@wsystem.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
On i.MX, SYSCTL.SDCLKFS may be set to 0 in order to make the SD clock
frequency prescaler divide by 1 in SDR mode. In DDR mode, the prescaler
can divide by up to 512. Allow both of these settings.
The maximum SD clock frequency in High Speed mode is 50 MHz. On i.MX25,
this change makes it possible to get 48 MHz from the USB PLL
(240 MHz / 5 / 1) instead of only 40 MHz from the USB PLL
(240 MHz / 3 / 2) or 33.25 MHz from the AHB clock (133 MHz / 2 / 2).
Signed-off-by: Benoît Thébaudeau <benoit@wsystem.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
The config variable CONFIG_SPL_NAND_MXS is only set in
include/configs/imx6_spl.h but used nowhere.
Remove it.
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
There is no dedicated reset signal wired up for the MX6QDL thus if the
bootloader enables the link we need some special handling to get the core
back into a state where it is safe to touch it for configuration.
While there has been some special handling in the Linux kernel to do this,
it was removed in 4.11 thus we need to do it properly in the bootloader
and therefore without this if you enable PCI in the bootloader you will hang
while booting the 4.11 kernel.
This puts the PCIe controller back into a safe state for the kernel driver
before launching the kernel.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Tested-by: Peter Senna Tschudin <peter.senna@collabora.com>
After running 'saveenv' we can no longer boot.
Adjust CONFIG_ENV_OFFSET so that U-Boot binary and the environment
section do not overlap.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
image_version_file()'s only use is to return the version number of the
specified image, and it's only called by kwbimage_generate(). This
version function mallocs "image_cfg" and reads the contents of the image
into that buffer. Before return to its caller it frees the buffer.
After extracting the version, kwb_image_generate() tries to calculate
the header size by calling image_headersz_v1(). This function now
accesses "image_cfg", which has already been freed.
Since image_version_file() is only used by a single function, inline it
into kwbimage_generate() and only free the buffer after it is no longer
needed. This also improves code readability since the code is mostly
equal to kwbimage_set_header().
Signed-off-by: Patrick Wildt <patrick@blueri.se>
Signed-off-by: Stefan Roese <sr@denx.de>
Use GPIO19 which is wired to the uSOM phy reset signal in order to reset
the uSOM's 1512 Gigabit Ethernet phy.
This GPIO is valid on ClearFog rev 2.1 and newer.
Taken from SolidRun's specialised u-boot, see
f906e3df17
Signed-off-by: Patrick Wildt <patrick@blueri.se>
Signed-off-by: Stefan Roese <sr@denx.de>
The dram_init and dram_init_banksize functions were using a board
specific implementation for decoding the memory banks from the fdt.
This change makes the dram_init* functions use a generic implementation
of decoding and populating memory bank and size data.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Nathan Rossi <nathan@nathanrossi.com>
Cc: Nadav Haklai <nadavh@marvell.com>
Cc: Kostya Porotchkin <kostap@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch enables the mvpp2 port 0 usage on the Armada 7k DB by setting
the correct PHY type (KR / SFI) for the COMPHY driver and enabling the
ethernet0 device node in the dts.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Stefan Chulski <stefanc@marvell.com>
Cc: Kostya Porotchkin <kostap@marvell.com>
Cc: Nadav Haklai <nadavh@marvell.com>
This patch enable the PINCTRL and GPIO support, including the GPIO
command on the Armada 3720 DB.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Konstantin Porotchkin <kostap@marvell.com>
Cc: Nadav Haklai <nadavh@marvell.com>
To enable support for the Armada 37xx pinctrl driver, we need to
change the Kconfig symbol for the Armada 7k/8k pinctrl driver and its
dependencies to distinguish between both platforms and drivers.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Konstantin Porotchkin <kostap@marvell.com>
Cc: Nadav Haklai <nadavh@marvell.com>
GPIO management is pretty simple and is part of the same IP than the pin
controller for the Armada 37xx SoCs. This patch adds the GPIO support to
the pinctrl-armada-37xx.c file, it also allows sharing common functions
between the gpio and the pinctrl drivers.
Ported to U-Boot based on the Linux version by Stefan Roese.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Gregory CLEMENT <gregory.clement@free-electrons.com>
Cc: Konstantin Porotchkin <kostap@marvell.com>
Cc: Nadav Haklai <nadavh@marvell.com>
The Armada 37xx SoC come with 2 pin controllers: one on the south
bridge (managing 28 pins) and one on the north bridge (managing 36 pins).
At the hardware level the controller configure the pins by group and not
pin by pin. This constraint is reflected in the design of the driver:
only the group related functions are implemented.
Ported to U-Boot based on the Linux version by Stefan Roese.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Gregory CLEMENT <gregory.clement@free-electrons.com>
Cc: Konstantin Porotchkin <kostap@marvell.com>
Cc: Nadav Haklai <nadavh@marvell.com>
Add the nodes for the two pin controller present in the Armada 37xx SoCs.
Initially the node was named gpio1 using the same name that for the
register range in the datasheet. However renaming it pinctr_nb (nb for
North Bridge) makes more sens.
Minor changes for U-Boot because of the slightly different dts version
done by Stefan Roese.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Gregory CLEMENT <gregory.clement@free-electrons.com>
Cc: Konstantin Porotchkin <kostap@marvell.com>
Cc: Nadav Haklai <nadavh@marvell.com>
NanoPi M1 is a board based on Allwinner H3 CPU.
This commit adds the support for this platform with:
- an include device tree which enables UART, LEDs, GPIO key switch,
1 USB host ports and the SD-card as a dtsi file.
- a device tree specific to this board that enables the
2 additional USB ports
- a defconfig file for minimal support
- a section in MAINTAINERS (add myself)
Synchronized with the kernel device tree, from commits:
sun8i-nanopi.dtsi: 85d2913614d9ab899d23b7ab7d22d23cf45bd1de
sun8i-h3-nanopi-m1.dts: 10efbf5f16336b7540ad6a16aa1cb0b26bab033b
Signed-off-by: Mylène Josserand <mylene.josserand@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
This introduces the ability to override the environment offets from the
device tree by setting the following nodes in '/config':
'u-boot,mmc-env-offset' - overrides CONFIG_ENV_OFFSET
'u-boot,mmc-env-offset-redundant'
- overrides CONFIG_ENV_OFFSET_REDUND
To keep with the previous logic, the CONFIG_* defines still need to
be available and the statically defined values become the defaults,
when the corresponding properties are not set in the device-tree.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Simon Glass <sjg@chromium.org>
Currently while setting the vsel value for dcdc1 and dcdc2
the driver is wrongly masking the entire 8 bits in the process
clearing PFM (bit7) field as well. Hence describe an appropriate
mask for vsel field and modify only those bits in the vsel
mask.
Source: http://www.ti.com/lit/ds/symlink/tps65218.pdf
Signed-off-by: Keerthy <j-keerthy@ti.com>
Fixes: 86db550b38 ("power: Add support for the TPS65218 PMIC")
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Number of blocks is a 9 bit field where 0 stands for a unlimited
number of blocks. Therefore the max number of blocks which can
be set is 511.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Inside of
max77686_buck_volt2hex/max77686_buck_hex2volt/max77686_ldo_volt2hex we
check that the value we calculate is >= 0 however we declare 'hex' as
unsigned int making these always true. Mark these as 'int' instead. We
also move hex_max to int as they are constants that are 0x3f/0xff.
Given that the above functions are marked as returning an int, make the
variables we assign their return value to also be int to be able to
catch the error condition now. Reported by clang-3.8.
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
In some places we check if part_config is set to MMCPART_NOAVAILABLE
(0xff). With part_config being a char this is always false. We should
be using a u8 to store this value instead, after a quick consultation
with the Linux Kernel. Reported by clang-3.8.
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
This patch adjusts memory map for secure boot headers on LS2080AQDS
and LS2080ARDB platforms. Secure boot headers are placed on NOR
flash at offset 0x00600000.
Signed-off-by: Udit Agarwal <udit.agarwal@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
This patch is to adjust the memory mapping for FLash/SD card on
LS1046AQDS and LS1046ARDB, such as FMAN firmware load address, U-Boot
start address on serial flash and environment address.
Signed-off-by: Alison Wang <alison.wang@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
This patch is to adjust the memory mapping for FLash/SD card on
LS1043AQDS and LS1043ARDB, such as PPA firmware load address, FMAN
firmware load address, QE firmware load address, U-Boot start address
on serial flash and environment address.
Signed-off-by: Alison Wang <alison.wang@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
This patch is to adjust the memory mapping for FLash/SD card on
LS1021AQDS and LS1021ATWR, such as U-Boot start address on serial
Flash, QE firmware load address and environment address.
Signed-off-by: Alison Wang <alison.wang@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
LS2081ARDB board is similar to LS2080ARDB board with few differences
It hosts LS2081A SoC
Default boot source is QSPI-boot
It does not have IFC interface
RTC and QSPI flash device are different
It provides QIXIS access via I2C
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Santan Kumar <santan.kumar@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
On the A33, uart0 is muxed on the PB pins. On SBCs these pins may be
available for use. Such is the case on the Sinlinx SinA33.
Set CONS_INDEX=1 to use uart0 as the console, matching the device tree.
Fixes: 7095f86418 ("sunxi: Convert CONS_INDEX to Kconfig")
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
The QorIQ LS2081A SoC has eight 64-bit ARM v8 Cortex A72 cores and
is built on layerscape architecture. It is 40-pin derivative of
LS2084A (non-AIOP personality of LS2088A). So feature-wise it is
same as LS2084A. LS2041A is a 4-core personality of LS2081A.
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Santan Kumar <santan.kumar@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
QSPI-boot is supported on LS2088ARDB RevF board with LS2088A SoC.
LS2088ARDB RevF Board has limitation that QIXIS can not be accessed.
CONFIG_FSL_QIXIS is not enabled.
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Suresh Gupta <suresh.gupta@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Update QIXIS related code to be executed only if CONFIG_FSL_QIXIS
flag is enabled. In case QIXIS code is not enabled, use default
sysclk value as 100MHz per board documentation.
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Earlier when MC is loaded but DPL is not deployed results in FDT
fix-up code execution hangs. For this case now print message on
console and return success instead of return -ENODEV. This update
allows fdt fixup to continue execution.
Signed-off-by: Yogesh Gaur <yogeshnarayan.gaur@nxp.com>
Signed-off-by: Priyanka Jain <Priyanka.jain@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
ls1012ardb, ls1046ardb, ls2080ardb have S25FS512S flash which does
not support Bank Address Register commands.
Signed-off-by: Suresh Gupta <suresh.gupta@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
LS2080ARDB/LS2088ARDB RevF board has smart voltage translator
which needs to be programmed to enable high speed SD interface
by setting GPIO4_10 output to zero.
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Santan Kumar <santan.kumar@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
In situations like an autobuilder we are likely to not have bl31.bin
present and thus would fail to build and propagate the error upwards.
Instead, print a big warning to stderr so that human will see that
something is wrong but complete the build.
Cc: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
trini: Make Kconfig SPL_xxx entires only show if SPL, so that we don't
get Kconfig errors on platforms without SPL, ie sandbox (without SPL).
Signed-off-by: Tom Rini <trini@konsulko.com>
The original commit for the MCF54418TWR ColdFire development board
support defined a 'CONFIG_SYS_FAULT_ECCONFIG_SYS_NO_FLASHHO_LINK_DOWN'
which obviously has a rogue 'CONFIG_SYS_NO_FLASH' embedded in the
intended 'CONFIG_SYS_FAULT_ECHO_LINK_DOWN' define.
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Rather than using CMD_JFFS2 for both the filesystem and its command, we
should have a separate option for each. This allows us to enable JFFS2
support without the command, if desired, which reduces U-Boot's size
slightly.
Signed-off-by: Simon Glass <sjg@chromium.org>
This converts the following to Kconfig:
CONFIG_CMD_IMMAP
Also move this command out of the cmd/ directory since it is
PowerPC-specific.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present IDE support is controlled by CONFIG_CMD_IDE. Add a separate
CONFIG_IDE option so that IDE support can be enabled without requiring
the 'ide' command.
Update existing users and move the ide driver into drivers/block since
it should not be in common/.
Signed-off-by: Simon Glass <sjg@chromium.org>
This converts the following to Kconfig:
CONFIG_CMD_HDMIDETECT
Note that we cannot do 'default y if VIDEO' because this option is only
enabled for a small subset of mx6 boards. Also this command is is not a
great implementation (it doesn't use driver model).
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
This converts the following to Kconfig:
CONFIG_CMD_HD44760
Also drop CONFIG_CMD_HD44780 which appears to be a typo.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present CONFIG_CMD_HASH enables the 'hash' command which also brings
in the hashing API. Some boards may wish to enable the API without the
command. Add a separate CONFIG to permit this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
This converts the following to Kconfig:
CONFIG_CMD_HASH
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
[trini: Rework slightly, enable on some boards again]
Signed-off-by: Tom Rini <trini@konsulko.com>
This converts the following to Kconfig:
CONFIG_CMD_FPGA_LOADBP
CONFIG_CMD_FPGA_LOADFS
CONFIG_CMD_FPGA_LOADMK
CONFIG_CMD_FPGA_LOADP
Signed-off-by: Simon Glass <sjg@chromium.org>
This converts the following to Kconfig:
CONFIG_CMD_ETHSW
Also enable it for sandbox to increase build coverage.
Signed-off-by: Simon Glass <sjg@chromium.org>
This converts the following to Kconfig:
CONFIG_CMD_ESBC_VALIDATE
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
This converts the following to Kconfig:
CONFIG_CMD_EEPROM
CONFIG_CMD_EEPROM_LAYOUT
CONFIG_EEPROM_LAYOUT_HELP_STRING
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
[trini: Rework Kconfig logic slightly, define EEPROM location on TI eval
platforms]
Signed-off-by: Tom Rini <trini@konsulko.com>
This is only used by one board and always set to 0x51. Drop this option.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Now that dtt is gone, this is not used. Drop it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
This subsystem is quite old. It has been replaced with a driver-model
version (UCLASS_THERMAL). Boards are free to convert to that if required,
but here is a removal patch that could be applied in the meantime.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
This subsystem has not been converted to driver model, there is only one
driver and only one board that uses it. Drop it and its CONFIG option.
Also drop the rtc4543 RTC driver since it uses TWS.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
This option is only defined to a non-default value by canyonlands, which
needs conversion to driver model (where the I2C address would be defined
by the device tree).
Drop this option.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
This converts the following to Kconfig:
CONFIG_DS4510
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
This option enables a command in the driver. But the functions defined by
the driver are not called anywhere else in U-Boot. So it does not seem
useful to have this driver without its commands.
Drop this option, move the header file out of the common include/
directory and make all the function static.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
This option is only used in one driver and is not enabled by any board. It
does not seem worth having the ability to remove this part of the support.
Drop the option.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
This option is only used in one driver and is not enabled by any board. It
does not seem worth having the ability to remove this part of the support.
Drop the option.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
This option is only used in one driver and two boards. It does not seem
worth having the ability to remove this part of the support.
Drop the option.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
We rename CONFIG_FIT_DISABLE_SHA256 to CONFIG_FIT_ENABLE_SHA256_SUPPORT which
is enabled by default and now a positive option. Convert the handful of boards
that were disabling it before to save space.
Cc: Dirk Eibach <eibach@gdsys.de>
Cc: Lukasz Dalek <luk0104@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
There is missing dependency on echo command. Mark tests which requires
echo.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
This converts the following to Kconfig:
CONFIG_SPL_BOARD_INIT
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
[trini: Update the Kconfig logic]
Signed-off-by: Tom Rini <trini@konsulko.com>
The IICDVFS(I2C) set in r8a7796.h is common in rcar-gen3.
This moves CONFIG_SYS_I2C_SH_BASE0 in rcar-gen3-base.h.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
The mcs7830_recv() (non-DM) function discards good packets and tries to
process "bad" packets due to incorrect test condition.
Fix the condition and return the proper value as described in function
doc.
Signed-off-by: Uri Mashiach <uri.mashiach@compulab.co.il>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
SDIO is not supported in u-boot, there is no point in enabling mmc3.
For this purpose, add u-boot specific dtsi that this will be included
automatically while building the dtb.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
The intention of having a -u-boot.dtsi file is to be able to make
changes to the provided upstream dts files as well as to be able to add
nodes. Change the logic for adding the file from making it the last
included file at the top of the dts to being included at the end of the
file.
Cc: Jean-Jacques Hiblot <jjhiblot@ti.com>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tested-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Update Kconfig and Makefile to enable Arria 10.
Clean up Makefile and sorting *.o alphanumerically.
Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Restructure misc driver in the preparation to support A10.
Move the Gen5 specific code to gen5 file.
Change all uint32_t_to u32.
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Restructure system manager in the preparation to support A10.
No functional change.
Change uint32_t to u32.
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Restructure reset manager driver in the preparation to support A10.
Move the Gen5 specific code to gen5 files.
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Restructure clock manager driver in the preparation to support A10.
Move the Gen5 specific code to _gen5 files.
- Change all uint32_t to u32 and change to use macro BIT(n) for bit shift.
- Check return value from wait_for_bit(). So change return type to int for
cm_write_with_phase() and cm_basic_init().
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Each time set_state is called, a new piece memory will
be allocated for pin_data, but not freed, this will
incur memory leak.
When error, the devm API could not free memory automatically.
So need call devm_kfree when error.
Issue reported by Coverity
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefan Agner <stefan.agner@toradex.com>
Cc: Stefano Babic <sbabic@denx.de>
Reset ENET_RST_B to make ENET function stable.
Since DM_GPIO enabled, we use "gpio_spi@0_5" which corresponds
to ENET_RST_B.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Enable more DM drivers. The imx I2C/MMC DM drivers needs DM_GPIO
enabled. The 74x164 drivers needs SOFT_SPI and DM_GPIO enabled.
So needs to enable them together.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Add the Kconfig entry for SOFT_SPI which uses gpio to simulate the
SPI signals. We use it for accessing 74x164 on some i.MX boards.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Jagan Teki <jagan@openedev.com>
Cc: Stefano Babic <sbabic@denx.de>
Early backports of the imx wdog external reset feature occured before the
property was accepted upstream and used 'ext-reset-output' instead of
'fsl,ext-reset-output'. In order to support older kernels remove both
properties.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Now that mx6sabresd_spl_defconfig can be used to boot all
mx6sabresd variants, the non-SPL targets can be safely removed.
Signed-off-by: Fabio Estevam <fabio.estvam@nxp.com>
Add support for the mx6dlsabresd board in SPL.
Retrieved the DCD table from:
board/freescale/mx6sabresd/mx6dlsabresd.cfg
(NXP U-Boot branch imx_v2015.04_4.1.15_1.0.0_ga)
Flashed SPL and u-boot.img to an SD card and could successfully boot it
on mx6q, mx6qp and mx6dl sabresd boards.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Currently only MX6Q/QP sabresd boards are supported in SPL.
In order to also support MX6DL we need to convert to using
IOMUX_PADS and SETUP_IOMUX_PADS macros.
Other than that move the <asm/arch/mx6-ddr.h> header inclusion to the
SPL code block in order to avoid build error.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Add runtime, modeboot env which is setting mmcboot, or
nandboot based on the bootdevice so-that conditional
macros b/w MMC and NAND for CONFIG_BOOTCOMMAND should
be avoided in config files.
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Add runtime, modeboot env which is setting mmcboot, or
nandboot based on the bootdevice so-that conditional
macros b/w MMC and NAND for CONFIG_BOOTCOMMAND should
be avoided in config files.
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Fix calculation. do_div can not handle negative values.
Use div_s64_rem to handle the calculation.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
>From IC guys:
"
After a thorough accuracy study of the Temp sense circuit,
we found that with our current equation, an average part can
read 7 degrees lower than a known forced temperature.
We also found out that the standard variance was around 2C;
which is the tightest distribution that we could create.
We need to change the temp sense equation to center the average
part around the target temperature.
"
New equation:
Tmeas = (Nmeas - n1) / slope + t1 + offset
n1= fused room count
t1= 25
offset=3.580661
slope= 0.4148468 – 0.0015423*n1
According the new equation, update the thermal driver.
c1 and c2 changed to u64 type and update comments.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Avoid transfer parameter dev_id value with "-1" to .fec_get_hwaddr(),
it should transfer fec->dev_id to get mac address from fuse.
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Acked-by: Stefano Babic <sbabic@denx.de>
The MIB RAM and FIFO receive start register does not exist on
i.MX6ULL. Accessing these register will cause enet not work well or
cause system report fault.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
- Add workaround code to make LD20 SoC boot from ARM Trusted Firmware
- Sync DT with Linux to fix DTC warnings
- Add new SoC support code
- Misc fix, updates
After speaking to Hans at FOSDEM, he is fine with transferring the
maintainership of the Pine64 boards over to me.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
With the DRAM init code and the SPL's ability to load the ATF binary as
well, we can now officially get rid of the boot0 boot method, which
involed a closed-source proprietary blob to be used.
Rework the Pine64 README file to document how to build the firmware.
Also since these instructions now cover more boards, rename the
file to README.sunxi64 to reflect this.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Now that we can store a DT name in the SPL header, use this string (if
available) when finding the right DT blob to load for U-Boot proper.
This allows a generic U-Boot (proper) image to be combined with a bunch
of supported DTs, with just the SPL (possibly only that string) to be
different.
Eventually this string can be written after the build process by some
firmware update tool.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
This patch updates the mksunxiboot tool to optionally add
the default device tree name string to the SPL header. This
information can be used by the firmware upgrade tools to
protect users from harming themselves by trying to upgrade
to an incompatible bootloader.
The primary use case here is a non-removable bootable media
(such as NAND, eMMC or SPI flash), which already may have
a properly working, but a little bit outdated bootloader
installed. For example, the user may download or build a
new U-Boot image for "Cubieboard", and then attemept to
install it on a "Cubieboard2" hardware by mistake as a
replacement for the already existing bootloader. If this
happens, the flash programming tool can identify this
problem and warn the user.
The size of the SPL header is also increased from 64 bytes
to 96 bytes to provide enough space for the device tree name
string.
[Andre: split patch to remove OF_LIST hash feature]
Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
The Allwinner SoCs with 64-bit cores use an ARM Trusted Firmware binary,
which needs to be loaded alongside U-Boot proper.
Set the respective Kconfig options to let them select this feature and
also automatically build the FIT image.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
[Rename Kconfig path to arch/arm/mach-sunxi/Kconfig]
Signed-off-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
When a board uses a FIT image to load U-Boot proper, it requires a list
of supported device trees to be supplied in CONFIG_OF_LIST, from which it
chooses the right one at runtime.
For boards with just one possible DT (like the OrangePi PC2) this
defaults to CONFIG_DEFAULT_DEVICE_TREE, but for the Pine64 with its two
possible models we provide all compatible DTs in this config symbol.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@openedev.com>
Now that the Makefile can call a generator script to build a more
advanced FIT image, let's use this feature to address the needs of
Allwinner boards with 64-bit SoCs (A64 and H5).
The (DTB stripped) U-Boot binary and the ATF are static, but we allow
an arbitrary number of supported device trees to be passed.
The script enters both a DT entry in the /images node and the respective
subnode in /configurations to support all listed DTBs.
The location of the bl31.bin image from the ARM Trusted Firmware build
can either by specified via the BL31 environment variable. If this is not
set, the script looks for bl31.bin in U-Boot's build directory (which
could be a symlink as well).
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Some platforms require more complex U-Boot images than we can easily
generate via the mkimage command line, for instance to load additional
image files.
Introduce a CONFIG_SPL_FIT_SOURCE and CONFIG_SPL_FIT_GENERATOR symbol,
which can either hold an .its source file describing the image layout,
or, in the second case, a generator tool (script) to create such
a source file. This script gets passed the list of device tree files
from the CONFIG_OF_LIST variable.
A platform or board can define either of those in their defconfig file
to allow an easy building of such an image.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
For a board or platform to support FIT loading in the SPL, it has to
provide a board_fit_config_name_match() routine, which helps to select
one of possibly multiple DTBs contained in a FIT image.
Provide a simple function which chooses the DT name U-Boot was
configured with.
If the DT name is one of the two Pine64 versions, determine the exact
model by checking the DRAM size.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@openedev.com>
The sunxi SPL was holding the detected RAM size in some local variable
only, so it wasn't accessible for other functions.
Store the value in gd->ram_size instead, so it can be used later on.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
The SPL stack is usually located at the end of SRAM A1, where it grows
towards the end of the SPL.
For the really big AArch64 binaries the stack overwrites code pretty
soon, so move the SPL stack to the end of SRAM A2, which is unused at this
time.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Jagan Teki <jagan@openedev.com>
The generic ARMv8 assembly code contains routines for setting up
a CCN interconnect, though the Freescale SoCs are the only user.
Link this code only for Freescale targets, this saves some precious
bytes in the chronically tight SPL.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Not every SoC needs to set up the GIC interrupt controller, so link
think code only when the respective config option is set.
This shaves off some bytes from the SPL code size.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
mksunxiboot limits the size of the resulting SPL binaries to pretty
conservative values to cover all SoCs and all boot media (NAND).
It turns out that we have limit checks in place in the build process,
so mksunxiboot can be relaxed and allow packaging binaries up to the
actual 32KB the mask boot ROM actually imposes.
This allows to have a bigger SPL, which is crucial for AArch64 builds.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
SPL_FIT obviously requires libfdt in SPL, so let Kconfig express that by
selecting SPL_OF_LIBFDT.
Also make the actual options that users want (SPL signature and SPL FIT
loading) visible in the menu and let them select the SPL_FIT as a
requirement.
Also remove the now redundant SPL_OF_LIBFDT from those Kconfigs that had
it in for the SPL FIT loading feature.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
[Remove change from configs/evb-rk3399_defconfig]
Signed-off-by: Jagan Teki <jagan@openedev.com>
So far we were not using the FIT image format to its full potential:
The SPL FIT loader was just loading the first image from the /images
node plus one of the listed DTBs.
Now with the refactored loader code it's easy to load an arbitrary
number of images in addition to the two mentioned above.
As described in the FIT image source file format description, iterate
over all images listed at the "loadables" property in the configuration
node and load every image at its desired location.
This allows to load any kind of images:
- firmware images to execute before U-Boot proper (for instance
ARM Trusted Firmware (ATF))
- firmware images for management processors (SCP, arisc, ...)
- firmware images for devices like WiFi controllers
- bit files for FPGAs
- additional configuration data
- kernels and/or ramdisks
The actual usage of this feature would be platform and/or board specific.
Also update the FIT documentation to mention the new SPL feature and
provide an example .its file to demonstrate its features.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Lokesh Vutla <lokeshvuta@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Tested-by: Kever Yang <kever.yang@rock-chips.com>
Tested-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
At the moment we load two images from a FIT image: the actual U-Boot
image and the .dtb file. Both times we have very similar code, that deals
with alignment requirements the media we load from imposes upon us.
Factor out this code into a new function, which we just call twice.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Tested-by: Kever Yang <kever.yang@rock-chips.com>
Tested-by: Jagan Teki <jagan@openedev.com>
Currently the SPL FIT loader always looks only for the first image in
the /images node a FIT tree, which it loads and later executes.
Generalize this by looking for a "firmware" property in the matched
configuration subnode, or, if that does not exist, for the first string
in the "loadables" property. Then using the string in that property,
load the image of that name from the /images node.
This still loads only one image at the moment, but refactors the code to
allow extending this in a following patch.
To simplify later re-usage, we also generalize the spl_fit_select_index()
function to not return the image location, but just the node offset.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Lokesh Vutla <lokeshvuta@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Tested-by: Kever Yang <kever.yang@rock-chips.com>
Tested-by: Jagan Teki <jagan@openedev.com>
Currently the SPL FIT loader uses the spl_fit_select_fdt() function to
find the offset to the right DTB within the FIT image.
For this it iterates over all subnodes of the /configuration node in
the FIT tree and compares all "description" strings therein using a
board specific matching function.
If that finds a match, it uses the string in the "fdt" property of that
subnode to locate the matching subnode in the /images node, which points
to the DTB data.
Now this works very well, but is quite specific to cover this particular
use case. To open up the door for a more generic usage, let's split this
function into:
1) a function that just returns the node offset for the matching
configuration node (spl_fit_find_config_node())
2) a function that returns the image data any given property in a given
configuration node points to, additionally using a given index into
a possbile list of strings (spl_fit_select_index())
This allows us to replace the specific function above by asking for the
image the _first string of the "fdt" property_ in the matching
configuration subnode points to.
This patch introduces no functional changes, it just refactors the code
to allow reusing it later.
(diff is overly clever here and produces a hard-to-read patch, so I
recommend to throw a look at the result instead).
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Lokesh Vutla <lokeshvuta@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Tested-by: Kever Yang <kever.yang@rock-chips.com>
Tested-by: Jagan Teki <jagan@openedev.com>
Reserve enough space below the kernel base.
The assumed address map is:
80000000 - 80ffffff : for IPP
81000000 - 81ffffff : for ARM secure
82000000 - : for Linux
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
When booting from ARM Trusted Firmware, U-Boot runs in EL1-NS.
The boot flow is as follows:
BL1 -> BL2 -> BL31 -> BL33 (i.e. U-Boot)
This boot sequence works fine for LD11 SoC (Cortex-A53), but LD20
SoC (Cortex-A72) hangs in U-Boot. The solution I found is to
read sctlr_el1 and write back the value as-is. This should be
no effect, but surprisingly fixes the problem for LD20 to boot.
I do not know why.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Remove 'pad-offset' of soc_gpio_s5_0, soc_gpio_s5_1, soc_gpio_s5_2,
pin_usb_host_en0 and pin_usb_host_en1. These offsets are actually
wrong. Correct value should be added by 0x2000, but since they
are supposed to be 'mode-gpio', 'pad-offset' is not needed at all.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add a device-tree property use-lvl-write-cache that will cause
writes to lvl to be cached instead of read from lvl before each
write. This is required on some platforms that have the register
implemented as dual read/write (such as Baytrail).
Prior to this fix the blue USB port on the Minnowboard Max was
unusable since USB_HOST_EN0 was set high then immediately set
low when USB_HOST_EN1 was written.
This also resolves the 'gpio clear | set' command warning like:
"Warning: value of pin is still 0"
Signed-off-by: George McCollister <george.mccollister@gmail.com>
<rebased on latest origin/master, fixed all baytrail boards>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
This patch adds a remove function to the Intel ICH SPI driver, that will
be called upon U-Boot exit, directly before the OS (Linux) is started.
This function takes care of configuring the BIOS registers in the SPI
controller (similar to what a "standard" BIOS or coreboot does), so that
the Linux MTD device driver is able to correctly read/write to the SPI
NOR chip. Without this, the chip is not detected at all.
Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Jagan Teki <jteki@openedev.com>
This patch adds a call to dm_remove_devices_flags() to
bootm_announce_and_cleanup() so that drivers that have one of the removal
flags set (e.g. DM_FLAG_ACTIVE_DMA_REMOVE) in their driver struct, may
do some last-stage cleanup before the OS is started.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This new flag can be added to DM device drivers, which need to do some
final configuration before U-Boot exits and the OS (e.g. Linux) is
started. The remove functions of those drivers will get called at
this stage to do these last-stage configuration steps.
Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
On my x86 platform I've noticed, that calling dm_uninit() or the new
function dm_remove_devices_flags() does not remove the desired device at
all. Debugging showed, that the serial uclass returns -EPERM in
serial_pre_remove(). This patch sets the force parameter when calling
stdio_deregister_dev() resulting in a removal of the device.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Convert the pci_mmc driver over to driver model and migrate all x86 boards
that use it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Now that we have ACPI S3 support on Intel MinnowMax board, document
some generic information of S3 and how to test it.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Stefan Roese <sr@denx.de>
U-Boot sets up the real mode interrupt handler stubs starting from
address 0x1000. In most cases, the first 640K (0x00000 - 0x9ffff)
system memory is reported as system RAM in E820 table to the OS.
(see install_e820_map() implementation for each platform). So OS
can use these memories whatever it wants.
If U-Boot is in an S3 resume path, care must be taken not to corrupt
these memorie otherwise OS data gets lost. Testing shows that, on
Microsoft Windows 10 on Intel Baytrail its wake up vector happens to
be installed at the same address 0x1000. While on Linux its wake up
vector does not overlap this memory range, but after resume kernel
checks low memory range per config option CONFIG_X86_RESERVE_LOW
which is 64K by default to see whether a memory corruption occurs
during the suspend/resume (it's harmless, but warnings are shown
in the kernel dmesg logs).
We cannot simply mark the these memory as reserved in E820 table
because such configuration makes GRUB complain: unable to allocate
real mode page. Hence we choose to back up these memories to the
place where we reserved on our stack for our S3 resume work.
Before jumping to OS wake up vector, we need restore the original
content there.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Stefan Roese <sr@denx.de>
Introduce a new CONFIG_S3_VGA_ROM_RUN option so that U-Boot can
bypass executing VGA roms in S3.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Stefan Roese <sr@denx.de>
Before jumping to OS waking up vector, we need turn on ACPI mode
for S3, just like what we do for a normal boot.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Stefan Roese <sr@denx.de>
To do something more in acpi_resume() like turning on ACPI mode,
we need locate ACPI FADT table pointer first. But currently this
is done in acpi_find_wakeup_vector().
This changes acpi_resume() signature to accept ACPI FADT pointer
as the parameter. A new API acpi_find_fadt() is introduced, and
acpi_find_wakeup_vector() is updated to use FADT pointer as the
parameter as well.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Stefan Roese <sr@denx.de>
enter_acpi_mode() is useful on other boot path like S3 resume, so
make it public.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Stefan Roese <sr@denx.de>
In enter_acpi_mode() PM1_CNT register is changed to PM1_CNT_SCI_EN
directly without preserving its previous value. Update to change
the register access to read-modify-write (RMW).
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Stefan Roese <sr@denx.de>
Call board_final_cleanup() before write_tables(), so that anything
done in board_final_cleanup() on a normal boot path is also done
on an S3 resume path.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Stefan Roese <sr@denx.de>
When SeaBIOS is being used, U-Boot reserves a memory area to be
used for configuration tables like ACPI. But it should not be
cleared otherwise ACPI table will be missing.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Stefan Roese <sr@denx.de>
At the end of pre-relocation phase, save the new stack address
to CMOS and use it as the stack on next S3 boot for fsp_init()
continuation function.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Stefan Roese <sr@denx.de>
This adds a library that provides CMOS (inside RTC SRAM) access
at a very early stage when driver model is not available yet.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Stefan Roese <sr@denx.de>
In an S3 resume path, U-Boot does everything like a cold boot except
in the last_stage_init() it jumps to the OS resume vector.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Stefan Roese <sr@denx.de>
This adds one API acpi_find_wakeup_vector() to locate OS wakeup
vector from the ACPI FACS table, to be used in the S3 boot path.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Stefan Roese <sr@denx.de>
This adds a wake up stub before jumping to OS wake up vector.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Stefan Roese <sr@denx.de>
U-Boot itself as well as everything that is consumed by U-Boot (like
heap, stack, dtb, etc) needs to be reserved and reported in the E820
table when S3 resume is on.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Stefan Roese <sr@denx.de>
When U-Boot is built without ACPI S3 support, it should not report
S3 in the ACPI table otherwise when kernel does STR it won't work.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Stefan Roese <sr@denx.de>
Add one member in the global data to store previous sleep state,
and display the state during boot in print_cpuinfo().
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Stefan Roese <sr@denx.de>
When ACPI S3 resume is turned on, we should pass different boot mode
to FSP init instead of default BOOT_FULL_CONFIG.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Stefan Roese <sr@denx.de>
This adds OS_RESUME (0x40) and RESUME_FAILURE (0xed) post codes.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Stefan Roese <sr@denx.de>
This adds APIs for determining previous sleep state from ACPI I/O
registers, as well as clearing sleep state on BayTrail SoC.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Stefan Roese <sr@denx.de>
This introduces a Kconfig option for ACPI S3 resume, as well as a
header file to include anything related to ACPI S3 resume.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Stefan Roese <sr@denx.de>
- Add #undef CONFIG_DM_MMC_OPS to omap3_logic in the SPL build case, to
match other TI platforms in the same situation.
Signed-off-by: Tom Rini <trini@konsulko.com>
To fix the timeout of sending the write command, enable the quirk
SDHCI_QUIRK_WAIT_SEND_CMD.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Newer SoCs use same TV encoder unit. Split it out so it can be reused
with new DM video driver.
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Simon Glass <sjg@chromium.org>
Due to a typo, the 24 bit-per-pixel configuration ends in 24BMP
instead of 24BPP. This change renames it throughout the source tree
for consistency and to make moving these options into Kconfig easier
and less error-prone.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
Instead of having drivers/video/rockchip/Kconfig point outside of its
hierarchy for dw_hdmi.o, we should use a configuration-option to
include the Designware HDMI support.
This change introduces a new config option (not to be selected via
menuconfig, but to be selected from a dependent video driver's
configuration option) that enables dw_hdmi.o and selects it whenever
the HDMI support for Rockchip SoCs is selected.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Some DVI monitors don't work in HDMI mode. Set it only if edid data
explicitly states that it is supported.
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Simon Glass <sjg@chromium.org>
Some DVI monitors don't show anything in HDMI mode since audio stream
confuses them. To solve this situation, this commit adds HDMI flag in
timing data and sets it accordingly during edid parsing.
First existence of extension block is checked. If it exists and it is
CEA861 extension, then data blocks are checked for presence of HDMI
vendor specific data block. If it is present, HDMI flag is set.
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Simon Glass <sjg@chromium.org>
Timing flags are never set, so they may contain garbage. Since some
drivers check them, video output may be broken on those drivers.
Initialize them to 0 and check for few common flags.
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Simon Glass <sjg@chromium.org>
Recent commits of DTC introduced new warnings checking PCI and simple
buses, unit address formatting, and stricter node and property name
checking. Disable the new DTC warnings by default. As before,
warnings are enabled with W=*. The strict node and property name
checks are a bit subjective, so they are only enabled for W=2.
(This policy reflects the commit 8654cb8d0371 of Linux.)
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Enable TI_COMMON_CMD_OPTIONS and remove similar options
from the defconfig. Updated with savedefconfig
CMD_USB isn't enabled yet. I have some testing to do with
musb.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Now that CMD_POWEROFF can turn off the twl4030, let's imply that
just incase someone wants to disable it.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Follow the exiting logic for the i.MX options when migrating this
option.
Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Marek Vasut <marex@denx.de>
The following options are migrated over fully now:
- USB_EHCI_ATMEL
- USB_EHCI_MARVELL
- USB_EHCI_MX6
- USB_EHCI_MX7
- USB_EHCI_MSM
- USB_EHCI_ZYNQ
- USB_EHCI_GENERIC
This also requires fixing the depends on USB_EHCI_MARVELL as it's used
by Orion5X and Kirkwood as well.
Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Migrate the rest of the users of CONFIG_USB_EHCI_HCD over to Kconfig.
For a few SoCs, imply or default y this if USB is enabled. In some
cases we had not already migrated to CONFIG_USB so do that as well.
Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Marek Vasut <marex@denx.de>
T1023 and T1024 have 4 SerDes lanes. Fix macro SRDS_MAX_LANES
and use this macro instead of hard-coded value in t1024_serdes.c.
Signed-off-by: Paulo Zaneti <paulo.zaneti@datacom.ind.br>
Signed-off-by: York Sun <york.sun@nxp.com>
In order to be able to migrate the various SoC EHCI CONFIG options we
first need to finish the switch from CONFIG_USB_EHCI to
CONFIG_USB_EHCI_HCD.
Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Marek Vasut <marex@denx.de>
The symbol CONFIG_OMAP3_LOGIC_USE_NEW_PRODUCT_ID was recently dropped
from usage and CONFIG_OMAP3_MICRON_DDR is unused in code.
Signed-off-by: Tom Rini <trini@konsulko.com>
The symbol CONFIG_OMAP_VC_I2C_HS_MCODE always uses the default value.
Restructure the comment and code such that if a need arises later to use
another value we can address this then.
Signed-off-by: Tom Rini <trini@konsulko.com>
Move this entry to Kconfig. As it is a hardware watchdog, select
HW_WATCHDOG. While we could default to enabling this for all platforms,
it is currently only enabled by default on AM33XX, so keep that logic
today.
Cc: Roger Meier <r.meier@siemens.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
This particular quirk is not enabled in any config files today. It does
however exist and is handled correctly in device trees and via
CONFIG_DM_SPI. So we drop the symbol now and add a comment to indicate
that any (new) boards that require this quirk need to enable DM_SPI
instead.
Signed-off-by: Tom Rini <trini@konsulko.com>
The symbols CONFIG_OMAP3_GPIO_X control if we enable the clocks for a
given GPIO bank in U-Boot. select the required banks for each target.
In some cases we need to also migrate from CONFIG_USB_EHCI (deprecated,
in include/configs/) to CONFIG_USB_EHCI_HCD as we only require the GPIO
bank to be enabled if USB is also enabled.
Signed-off-by: Tom Rini <trini@konsulko.com>
This driver is used often enough such that we want to have this enabled
by default on any ARCH_OMAP2PLUS board, and this only compiles on
ARCH_OMAP2PLUS due to required defines, so mark that as the depends.
Signed-off-by: Tom Rini <trini@konsulko.com>
We no longer have a need for a per-board CONFIG_OMAP3_xxx define (we
have CONFIG_TARGET_xxx when this is required), so drop these unused
references.
Signed-off-by: Tom Rini <trini@konsulko.com>
While there are a few different OMAP4 SoCs, today we always set
CONFIG_OMAP4430 and CONFIG_OMAP44XX. Convert the few test of
CONFIG_OMAP4430 to CONFIG_OMAP44XX.
Cc: Marek Vasut <marex@denx.de>
Cc: Paul Kocialkowski <contact@paulk.fr>
Signed-off-by: Tom Rini <trini@konsulko.com>
We make use of CONFIG_OMAP3_EVM today to know when to do a specific
tweak in MUSB. This can be tested on via CONFIG_TARGET_OMAP3_EVM
instead, so switch there so we can drop the now unused symbol
CONFIG_OMAP3_EVM. In investigating what to do about the symbol usage we
see that the cairo board defines the same function, but never called it
(as it does not define CONFIG_OMAP3_EVM) and was just returning anyhow,
so drop that function from that board.
Cc: "Albert ARIBAUD (3ADEV)" <albert.aribaud@3adev.fr>
Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
While in theory this value could be used in places outside of "omap5"
(such as OMAP4), we only make use of it today in OMAP5, so place the
Kconfig entry there. Given that Kconfig lets us provide a default, we
drop CONFIG_DEFAULT_OMAP_RESET_TIME_MAX_USEC entirely. The contents of
doc/README.omap-reset-time make a good help entry, so adjust them
slightly and delete the file. Move the comment about range to where we
use the value now, and have Kconfig enforce the upper bound.
Signed-off-by: Tom Rini <trini@konsulko.com>
In the two cases in the code where we use CONFIG_OMAP as a useful test
currently we can make use of CONFIG_ARCH_OMAP2PLUS instead. With that
changed we can drop all defines of CONFIG_OMAP. While in here,
CONFIG_OMAP3430 is only defined and then never used, so drop.
Signed-off-by: Tom Rini <trini@konsulko.com>
We have nothing defining CONFIG_OMAP243X since we dropped the omap243x
platforms, drop these tests.
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Heiko Schocher <hs@denx.de>
Drop custom command prompt string in favor
of default used by U-Boot. This helps in
easier automation setup across boards.
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Coldfire arch is not happy with timer_init since interrupt handlers
are still not set at that stage, and the boot hangs silently.
Signed-off-by: Angelo Dureghello <angelo@sysam.it>
ATF(ARM Trusted Firmware) is used by ARM arch64 SoCs, find more infomation
about ATF at: https://github.com/ARM-software/arm-trusted-firmware
SPL is considered as BL2 in ATF terminology, it needs to load other parts
of ATF binary like BL31, BL32, SCP-BL30, and BL33(U-Boot). And needs to
prepare the parameter for BL31 which including entry and image information
for all other images. Then the SPL handle PC to BL31 with the parameter,
the BL31 will do the rest of work and at last get into U-Boot(BL33).
This patch needs work with patches from Andre for SPL support multi
binary in FIT.
The entry point of bl31 and bl33 are still using hard code because we
still can not get them from the FIT image information.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Tested-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
This simplifies makefiles. Also, arrange the order of objects in
drivers/mmc/Makefile so that the framework objects are listed before
drivers.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Now CONFIG_GENERIC_MMC and CONFIG_MMC match for all defconfig.
We do not need two options for the same feature. Deprecate the
former.
This commit was generated with the sed script 's/GENERIC_MMC/MMC/'
and manual fixup of drivers/mmc/Kconfig.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
As commit 54925327fa ("mmc: move CONFIG_GENERIC_MMC to Kconfig")
addressed, this is one of the last weird defconfigs that define
CONFIG_GENERIC_MMC without CONFIG_MMC.
Now I took a closer look at this. Given that both CONFIG_CMD_MMC
and CONFIG_GENERIC_MMC are set for this defconfig, CONFIG_MMC should
be enabled.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
As commit 54925327fa ("mmc: move CONFIG_GENERIC_MMC to Kconfig")
addressed, this is one of the last weird defconfigs that define
CONFIG_GENERIC_MMC without CONFIG_MMC.
Now I took a closer look at this. Given that neither CONFIG_CMD_MMC
nor CONFIG_MMC is set for this defconfig, CONFIG_GENERIC_MMC
should be disabled.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
This driver is a counterpart of drivers/mmc/host/sdhci-cadence.c
from Linux. Some updates for v4.12-rc1 can be imported to U-Boot.
- Fix value of SDHCI_CDNS_HRS04_RDATA_SHIFT
- Add polling for ACK bit to be sure that data are written to
the PHY register
- Retrieve PHY values from DT properties instead of fixed data
The following is the list of upstream commits:
- Linux commit 4e03f628b464e0580abadf5161eaa38c61d20943
mmc: sdhci-cadence: fix bit shift of read data from PHY port
- Linux commit a0f8243229ed071c8da0ea7cedc1b7bf1b1515da
mmc: sdhci-cadence: Fix writing PHY delay
- Linux commit a89c472d8b55c5afc4c79e6e3d1338730034eb01
mmc: sdhci-cadence: Update PHY delay configuration
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
In the programmable clock mode, the SDCLK frequency is incorrectly
assigned when the maximum clock has been assigned during probe,
this causes the SDHCI not work well.
In the programmable clock mode, when calculating the SDCLK Frequency
Select, when the maximum clock has been assigned, it is the actual
value, should not be multiplied by host->clk_mul. Otherwise, the
maximum clock is multiplied host->clk_mul by the base clock achieved
from the BASECLKF field of the Capabilities 0 Register.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
This option is pretty old. It predates CONFIG_SYS_I2C which is itself
deprecated in favour of driver model. Disable it for all boards.
Also drop I2C options which depend on this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Now that we support using TI_COMMON_CMD_OPTIONS,
we dont have to enable a number of commands explicitly
in the defconfig if we enable TI_COMMON_CMD_OPTIONS.
Enable TI_COMMON_CMD_OPTIONS and regenerate the defconfig
using "make savedefconfig".
CMD_GPIO has been kept disabled because there is no GPIO
support (yet) on OMAP-L138 LCDK.
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
OMAP-L138 LCDK board can benefit from using the commonly
used commands enabled by TI_COMMON_CMD_OPTIONS.
Source the relevant Kconfig file so TI_COMMON_CMD_OPTIONS
can be enabled for OMAP-L138 LCDK board in a future patch.
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
We will see warnings such as:
net/eth_common.c:57:61: warning: data argument not used by format string [-Wformat-extra-args]
sprintf(enetvar, index ? "%s%daddr" : "%saddr", base_name, index);
~~~~~~~~ ^
With clang. In this case we do not want to re-write our code to be less
compact as the above is intentional and readable. Add a comment above
the disabling so that it's clear why we want that warning off.
Signed-off-by: Tom Rini <trini@konsulko.com>
The function tpm_xfer returns int so make 'err' be int rather than
uint32_t so that we can catch an error condition. Reported by
clang-3.8.
Signed-off-by: Tom Rini <trini@konsulko.com>
We declare that gpio_base (which is the base for counting gpios, not an
address) is unsigned. Therefore the comparison with >= 0 is always
true. As the desire is to allow for this base number to be 0, we can
just drop this check. Reported by clang-3.8.
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
We first check that if argc is less than 2 we return CMD_RET_USAGE. We
then see if argc is greater than 2 and if so call get_led_cmd() to set
'cmd' and otherwise set it to LEDST_COUNT (which will always be positive
as it's an enum with 0 already assigned). Therefore the test on if cmd
is less than 0 will always be false and simply be omitted. Reported by
clang-3.8.
Signed-off-by: Tom Rini <trini@konsulko.com>
The function cmd_get_data_size() returns an int and not unsigned. So we
should assign it to an int rather than unsigned so that we can later
compare the return value. Reported by clang-3.8.
Signed-off-by: Tom Rini <trini@konsulko.com>
On most architectures we do not call print_std_bdinfo() so mark it with
__maybe_unused. Reported by clang-3.8.
Signed-off-by: Tom Rini <trini@konsulko.com>
This particular macro hasn't been used in the code for some time, remove
these references that were missed.
Signed-off-by: Tom Rini <trini@konsulko.com>
Change tbu/l type to unsigned int.
>From the timer file for arm,
"(((unsigned long long)gd->arch.tbu) << 32) | gd->arch.tbl;" is used,
This piece code is based on tbu/tbl is 32bits, so change the type to
unsigned int.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
The function 'spin_wheel' is declared as inline, but not static and thus
we see warnings that 'w' and 'p' are declared static in a non-static
inline function. Correct this by marking spin_wheel as static inline.
Cc: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
With gcc-6 and later we may get a warning such as:
.../common/cli_readline.c:20:21: warning: ‘tab_seq’ defined but not used [-Wunused-const-variable=]
static const char tab_seq[] = " "; /* used to expand TABs */
^~~~~~~
.../common/cli_readline.c:19:19: warning: ‘erase_seq’ defined but not used [-Wunused-const-variable=]
static const char erase_seq[] = "\b \b"; /* erase sequence */
^~~~~~~~~
Because in SPL we're normally not doing interactive commands anyhow, so
lets just not compile this at all in SPL. This also means that we need
to correct the logic (and comment) about what the drivers/ddr/fsl/ and
CONFIG_FSL_DDR_INTERACTIVE requires and this will be included in SPL
there.
Signed-off-by: Tom Rini <trini@konsulko.com>
The variable netdev_ethtool_ops is not referenced, drop it. However
with gcc-6 or later we fail to even compile as we do not have the
required struct definition in U-Boot.
Cc: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
The variables SEQ_SWRESET, SEQ_ELVSS_ON, SEQ_TEMP_SWIRE, SEQ_APON and
SEQ_SLPIN are unreferenced, drop.
Cc: Anatolij Gustschin <agust@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
The variable nfc_pads is only referenced when CONFIG_CMD_NAND is set,
add a gaurd. The variable gpio_pads is never referenced, drop it. The
variable usdhc4_pads are only referenced when we do not have
CONFIG_CMD_NAND set and we are not doing an SPL build, modify the
existing guard.
Cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
The variables prg_stage2_prepare, prg_stage2_success and prg_stage_fail
are only referenced when CCDM_SECOND_STAGE is set, move these to be by
the existing guard.
Cc: Dirk Eibach <eibach@gdsys.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
The variable nfc_pads is only referenced when CONFIG_CMD_NAND is set,
move the existing guard and drop a now redundant comment. The variable
gwproto_gpio_pads is never referenced, remove it.
Cc: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
The variable usdhc2_pads is only referenced during SPL builds, add a guard.
Cc: Otavio Salvador <otavio@ossystems.com.br>
Signed-off-by: Tom Rini <trini@konsulko.com>
The variable grf is only referenced if EARLY_DEBUG is defined so move the
declaration to be under the existing guard.
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
With gcc-6 and later we see a warning about the fact that we have a
construct of "if (test);\n\tstatement". Upon reviewing the code, the
intention here is as the compiler suggests, we only want to execute the
indented statement if the test was true.
Cc: Sergei Poselenov <sposelenov@emcraft.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
The value assigned to variable 'value' is never used.
The problem was indicated by clang scan-build.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
The rsa_st struct has been made opaque in 1.1.x, add forward compatible
code to access the n, e, d members of rsa_struct.
EVP_MD_CTX_cleanup has been removed in 1.1.x and EVP_MD_CTX_reset should be
called to reinitialise an already created structure.
Signed-off-by: Jelle van der Waa <jelle@vdwaa.nl>
The rsa_st struct has been made opaque in 1.1.x, add forward compatible
code to access the n, e, d members of rsa_struct.
EVP_MD_CTX_cleanup has been removed in 1.1.x and EVP_MD_CTX_reset should be
called to reinitialise an already created structure.
The value assigned to saved_offset is never used.
The problem was indicated by clang scan-build.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
strdup uses malloc to allocate memory for str.
If we cannot bind to the generic driver we should release
the memory.
The problem was indicated by clang scan-build.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
env_attr_lookup call env_attr_walk with
callback = regex_callback.
In env_attr_walk
attributes = strchr(entry_cpy, ENV_ATTR_SEP)
will return NULL if ENV_ATTR_SEP is not found.
In the aftermath regex_callback may call
strlen(attributes)
with a NULL value which will lead to a failure.
The problem was indicated by scan-clam.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
For early debug, the following configs needs to be enabled:
CONFIG_DEBUG_UART=y
CONFIG_DEBUG_UART_OMAP=y
CONFIG_DEBUG_UART_BASE=0x44e09000
CONFIG_DEBUG_UART_CLOCK=48000000
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_DEBUG_UART_ANNOUNCE=y
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
For early debug, the following configs needs to be enabled:
CONFIG_DEBUG_UART=y
CONFIG_DEBUG_UART_OMAP=y
CONFIG_DEBUG_UART_CLOCK=48000000
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_DEBUG_UART_ANNOUNCE=y
For DRA7xx:
CONFIG_DEBUG_UART_BASE=0x4806a000
For AM57xx:
CONFIG_DEBUG_UART_BASE=0x48020000
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
am335x supports various sysclk frequencies which can be determined
using sysboot pins. PLLs should be configures based on this
sysclk frequency. Add PLL configurations for all supported
frequencies.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Update MPU frequencies and voltages as per the latest
DM[1] dated: OCT 2011 Revised APRIL 2016, Section 5.4.
Below is the consolidated data:
MPU values for PG 2.0 and later(Package ZCZ and ZCE):
-------------------------------------------------------
| | ZCZ | ZCE |
|-------------------------------------------------------|
| | VDD[V] | ARM [MHz] | VDD[V] | ARM [MHz] |
|-------|----------|------------|----------|------------|
| NITRO | 1.325 | 1000 | NA | NA |
|-------|----------|------------|----------|------------|
| TURBO | 1.26 | 800 | NA | NA |
|-------|----------|------------|----------|------------|
|OPP120 | 1.20 | 720 | NA | NA |
|-------|----------|------------|----------|------------|
|OPP100 | 1.10 | 600 | 1.10 | 600 |
|-------|----------|------------|----------|------------|
| OPP50 | 0.95 | 300 | 0.95 | 300 |
-------------------------------------------------------
There is no eFuse blown on PG1.0 Silicons due to which there is
no way to detect the maximum frequencies supported. So default
to OPP100 for which both frequency and voltages are common on both
the packages.
[1] http://www.ti.com/lit/ds/symlink/am3356.pdf
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
The SPL-DFU feature enable to load and
execute u-boot from RAM over usb from
PC using dfu-util.
Hence dfu-reset should not be issued
when dfu-util -R switch is issued.
Signed-off-by: Ravi Babu <ravibabu@ti.com>
Since SPL_DFU_SUPPORT is depends on SPL_RAM_SUPPORT,
hence select SPL_DFU_SUPPORT only when
SPL_RAM_SUPPORT is chosen.
Signed-off-by: Ravi Babu <ravibabu@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
This configuration should be valid for all F7 family devices in general.
Here is the regions info:
- Region0 : 4GB : cacheable & executable.
- Region1 : 512MB : text area : strogly ordered & executable.
- Region2 : 512MB : peripherals : device memory & non-executable.
- Region3 : 512MB : peripherals : device memory & non-executable.
- Region4 : 512MB : cortexM area: strongly ordered & non-executable.
Higher region number overrides the lower region configuration.
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
Cortex-M archs support option memory protection unit (MPU). MPU is used
to set the memory types, attributes, access permissions for different regions,
cache policies of the device.
e.g. using MPU it is possible to configure memory region as device memory
or strongly ordered, memory attributes like execute never, cache policies
like write-back or write-through.
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
Data cache memory needs to be disabled before handing over control to
linux kernel. This patch populates the cleanup_before_linux stub.
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
Add functionality to flush & invalidate all the dcache using the
prototype declared in common header file.
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
[trini: Add dummy functions for the not-enabled case]
Signed-off-by: Tom Rini <trini@konsulko.com>
CONFIG_DISTRO_DEFAULTS selects a number of things we want for Boston
defconfigs & generally describes what we want - to be able to boot an
arbitrary Linux distribution. Enable it in order to shorten the
defconfigs & to automatically keep up with any changes in the choice of
Kconfig symbols selected.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The default value of CONFIG_SYS_BOOTM_LEN is too small for typical
boston Linux kernels. Increase the limit to 64MB, which covers current
kernels with plenty of breathing room.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The boston memory map isn't suited to the simple "all memory starting
from 0" approach that the MIPS arch_fixup_fdt() implementation takes.
Instead we need to indicate the first 256MiB of DDR from 0 and the rest
from 0x90000000. Implement ft_board_setup to do that.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Move the MIPS Coherence Manager (CM) Global Configuration Registers
(GCRs) away from the region of the physical address space which the
Boston board's parallel flash is found in, such that we can access all
of flash without clobbering GCRs.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Without adding a prompt for CONFIG_MIPS_CM_BASE, Kconfig doesn't allow
defconfigs to set it. Provide the prompt in order to allow for that.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
am335x_evm SPL is very close to its limit in SRAM space.
Switch to use tiny printf to reclaim some size.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
No reason to use a separate load script for am33xx than using
omap-common load script.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
For platforms that don't use device tree in SPL the only
way to mark this driver as 'required by relocation' is
with the DM_FLAG_PRE_RELOC flag. Add this to ensure that
the driver is bound.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Add debug UART functions to permit omap specific ns16550 to
provide an early debug UART. This is mostly in common with
DEBUG_UART_NS16550 except for Mode definition register which
is required for selecting UART mode(16x auto-baud or 13x mode).
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Enables the pinctrl-single driver to support 16-bit registers. Only
32-bit registers were supported previously. Reduced width registers are
required for some platforms, such as OMAP.
Signed-off-by: James Balean <james@balean.com.au>
Cc: Felix Brack <fb@ltec.ch>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Felix Brack <fb@ltec.ch>
Tested-by: Felix Brack <fb@ltec.ch>
Reviewed-by: Simon Glass <sjg@chromium.org>
In single stage bootmode or falcon boot mode, the SPL shall update the
device tree that we load with the normal fixups done via
arch_fixup_fdt(), when possible (ie we have enough information in this
restricted environment to be able to do that still). This will include
for example updating them memory nodes.
Signed-off-by: Ravi Babu <ravibabu@ti.com>
[trini: Reword commit message]
Adding support for fdt fixup to update the
memory node in device tree for falcon boot.
This is needed for single stage or falcon
bootmode, to pass memory configuration to
kernel through DT memory node.
Signed-off-by: Ravi Babu <ravibabu@ti.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Declare the size of ddr very early in spl, so that this can be
used to enable cache.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Ravi Babu <ravibabu@ti.com>
Move the assignment of board info to global data a bit early which is
safe,
so that ram details can be used to enable caches.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Ravi Babu <ravibabu@ti.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
When OF control is enabled for the SPL stage, nodes are removed from
the DTB to reduce its size. While /chosen is kept, /config is removed.
There's no reason why /chosen should be kept over /config (and as we
would like to put properties into /config that control the SPL stage),
we add '/config' to the list of nodes to be retained for the SPL stage.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Simon Glass <sjg@chromium.org>
This adds documentation on the u-boot,spl-payload-offset property
(which overrides CONFIG_SYS_SPI_U_BOOT_OFFS during the SPI loading in
the SPL stage, if present).
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Simon Glass <sjg@chromium.org>
For the RK3399-Q7, we need some flexibility (depending on the feature
set we include in the SPL stage and how large our SPI flash is) in
positioning the SPL payload (i.e. the FIT image containing U-Boot, ATF
and the M0 payload) in our SPI flash.
To avoid having to deal with this through different U-Boot images, we
introduce a the '/config/u-boot,spl-payload-offset' property node
allow it to override the default setting.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Simon Glass <sjg@chromium.org>
At present there is not operation to invalidate a cache range. This seems
to be needed to fill out the cache operations. Add an implementation based
on the flush operation.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: York Sun <york.sun@nxp.com>
Similar to what blk_get_device_part_str() does, this patch makes
part_get_info_by_name() return the partition number in case of a match.
This is useful when the partition number is needed and not just the
descriptor.
Signed-off-by: Alex Deymo <deymo@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Update the Android image header format to the latest version published
in AOSP. The original code moved to a new repository, so this patch also
updates the reference to that path.
Signed-off-by: Alex Deymo <deymo@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Hi,
A kind reminder to look at this patch (already reviewed by Marek and acked by Lukasz), and if possible to put it in the next pull list, or the one after is timing is too short.
Thanks in advance for your time
Best Regards
Nicolas
-----Original Message-----
From: Nicolas LE BAYON
Sent: mardi 25 avril 2017 10:18
To: Nicolas LE BAYON <nicolas.le.bayon@st.com>; u-boot@lists.denx.de; lukma@denx.de; marex@denx.de
Cc: nlebayon@gmail.com; Patrice CHOTARD <patrice.chotard@st.com>; Jean-philippe ROMAIN <jean-philippe.romain@st.com>
Subject: [U-Boot][PATCH v7] usb: gadget: avoid variable name clipping in cb_getvar
From: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Instead of using a fixed-size array to store variable name, preferring a dynamic allocation treats correctly all variable name lengths.
Variable names are growing through releases and features. By this way, name clipping is prevented.
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Acked-by: Lukasz Majewski <lukma@denx.de>
Add runtime, modeboot env which is setting mmcboot, or
nandboot based on the bootdevice so-that conditional
macros b/w MMC and NAND for CONFIG_BOOTCOMMAND should
be avoided in config files.
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Add runtime, modeboot env which is setting mmcboot, or
nandboot based on the bootdevice so-that conditional
macros b/w MMC and NAND for CONFIG_BOOTCOMMAND should
be avoided in config files.
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Fix calculation. do_div can not handle negative values.
Use div_s64_rem to handle the calculation.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
>From IC guys:
"
After a thorough accuracy study of the Temp sense circuit,
we found that with our current equation, an average part can
read 7 degrees lower than a known forced temperature.
We also found out that the standard variance was around 2C;
which is the tightest distribution that we could create.
We need to change the temp sense equation to center the average
part around the target temperature.
"
New equation:
Tmeas = (Nmeas - n1) / slope + t1 + offset
n1= fused room count
t1= 25
offset=3.580661
slope= 0.4148468 – 0.0015423*n1
According the new equation, update the thermal driver.
c1 and c2 changed to u64 type and update comments.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
This adds a new firefly-rk3399 board, MIPI support for rk3399 and
rk3288, rk818 pmic support, mkimage improvements for rockchip and a few
other things.
Enable pwm0 for display of rk3399 evb board. The PWM do not have decicated
interrupt number in dts and can not get periph_id by pinctrl framework. So
init them here.
Signed-off-by: Eric Gao <eric.gao@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
plat->size here is used to reserve frame buffer space befor relocation.
our mipi panel use 24 bitwidth, and vop require 32bit align. So the frame
buffer size should be at least 1920*1200*32/8.
Signed-off-by: Eric Gao <eric.gao@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Because the bitwidth is different for different display mode, so we need
to set them according to demand.
Signed-off-by: Eric Gao <eric.gao@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add mipi display mode for rk3399 vop, so that we can use mipi panel
for display.
Signed-off-by: Eric Gao <eric.gao@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
It's caused by the difference of clk_set_rate function implement between
rk3288 andd rk3399.
clk_set_rate() of rk3288 return 0 in normal condition.
clk_set_rate() of rk3399 return input parameter in normal condition.
So check clk_set_rate's return value by IS_ERR_VALUE.
Signed-off-by: Eric Gao <eric.gao@rock-chips.com>
Since this driver can be used for rk8xx series pmic,
let's rename rk808 to rk8xx, to make it clear.
Configs parts are done by sed -i "s/RK808/RK8XX/g" `grep RK808 -lr ./`
Signed-off-by: Jacob Chen <jacob-chen@iotwrt.com>
Add support for the rk818 regulator. The regulator module consists
of 4 DCDCs, 9 LDOs, 1 switch and 1 BOOST converter which is used to
power OTG and HDMI5V.
Signed-off-by: Jacob Chen <jacob-chen@iotwrt.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The RK818 chip is a Power Management IC (PMIC) for multimedia and handheld
devices.
For boards use rk818, the input current should be set in the early stage, before
ddr initialization.
Signed-off-by: Jacob Chen <jacob-chen@iotwrt.com>
Both RK808 and RK818 chips are using a similar register map,
so we can reuse them.
I have also add reg prefix to exist registers, to keep them same style.
Signed-off-by: Jacob Chen <jacob-chen@iotwrt.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Set ethernet mac address in late init for Tinker Board,
prevents getting a random mac address each boot.
Read mac address from eeprom, first 6 bytes from m24c08@50.
Same as /etc/init.d/rockchip.sh on Tinker OS.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Simon Glass <sjg@chromium.org>
To add HDMI support for the RK3399, this commit provides the needed
pinctrl functionality to configure the HDMI I2C pins (used for reading
the screen's EDID).
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This allows requests (via the DTS) for PCLK_HDMI_CTRL/PCLK_VIO_GRF,
which are clock gates in the HDMI output path for the RK3399.
As these are enabled by default (i.e. after reset), we don't implement
any logic to actively open/close these clock gates and simply assume
that their reset-default has not been changed.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
With the RK3399 DRAM controller (DMC) driver providing all the
infrastructure, retrieve the DRAM size from the DMC init in the
board-specific code (instead of hard-coding) for the RK3399-Q7 (Puma).
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The (non-secure) efuse node in the DTS requests PCLK_EFUSE1024NS.
To allow us to add a efuse-driver (and more importantly, to allow
probes of such a driver to succeed), we need need to accept requests
for PCLK_EFUSE1024NS and return a non-error result.
As PCLK_EFUSE1024NS is enabled by default (i.e. after reset), we don't
implement any logic to manage this clock gate and simply assume that
the reset-default has not been changed.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The file is from evb-rk3399_defconfig with changes:
- use rk3399-firefly dtb
- re-order by make savedefconfig
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add test case for new interface set_invert().
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
Fix typo in subject and build error in sandbox_pwm_set_invert():
Signed-off-by: Simon Glass <sjg@chromium.org>
Rockchip pwm need to init polarity, implement pwm_set_invert()
to do it.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
The latest kernel PWM drivers enable the polarity settings. When system
run from U-Boot to kerenl, if there are differences in polarity set or
duty cycle, the PMW will re-init:
close -> set polarity and duty cycle -> enable the PWM.
The power supply controled by pwm regulator may have voltage shaking,
which lead to the system not stable.
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
Firefly-rk3399 is a bord from T-Firefly, you can find detail about
it here:
http://en.t-firefly.com/en/firenow/Firefly_RK3399/
This patch add basic node for the board and make it able to bring
up.
Peripheral/interfaces on board:
- usb hub which connect to ehci controller;
- UART2 debug
- eMMC
- PCIe
- USB 3.0 HOST, type-C port
- sdio, sd-card
- HDMI
- Ethernet
- OPTICAL
- WiFi/BT
- MIPI CSI/DSI
- IR
- EDP/DP
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
The kernel dts has update a lot since the first time we commit rk3399.dtsi,
sync with kernel for further development.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
At present dtoc assumes that nodes which are phandles do not themselves
reference other phandle nodes. Unfortunately this is not necessarilly
true. As a result we can currently output C code which does not compile
because a node declaration can be referenced before it is declared.
Adjust the code to explicitly output all phandle nodes needed by node
before the node itself is output.
This fixes building with the latest rk3399-firefly.dts from Linux, which
has reordered the nodes.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Kever Yang <kever.yang@rock-chips.com>
The code to generate the tables is quite long. Move the node-output code
into its own function.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Kever Yang <kever.yang@rock-chips.com>
The 'clock-freq-min-max' property was deprecated in the upstream
(i.e. Linux) DTS bindings in favor of the 'max-frequency' property.
With the latest RK3399 DTSI does no longer include the deprecated
property and the rockchip_dw_mmc driver requiring it to be present,
the driver doesn't bind to the node in the RK3399 DTSI any longer
(thus breaking access to the SD card on the RK3399-Q7 board).
To fix this, we implement a similar logic as in the Linux driver: if
the deprecated property is present, we issue a warning (if DEBUG is
enabled); if it is missing, we require 'max-frequency' to be set and
use it to create a min/max value-pair.
See b023030f10
for the deprecation/matching change in Linux.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
The clocking of the designware MMC controller in the upstream
(i.e. Linux) RK3399 has changed/does not match what the current DTS in
U-Boot uses: the first clock entry now is HCLK_SDMMC instead of
SCLK_SDMMC.
With the simple clock driver used for the RK3399, this needs a change
in the selector understood by the various case statements in the driver
to ensure that the driver still loads successfully.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Simon Glass <sjg@chromium.org>
There are 3 regions used by rk3399 ATF:
- bl31 code, located at 0x10000;
- cortex-m0 code and data, located at 0xff8c0000;
- bl31 data, located at 0xff8c1000 ~ 0xff8c4000;
SPL_TEXT_BASE starts from 0xff8c2000, we need to reserve memory
for ATF data, or else there will be memory corrupt after SPL
loads the ATF image.
More detail about cortex-M0 code in ATF:
https://github.com/ARM-software/arm-trusted-firmware/commit/
8382e17c4c6bffd15119dfce1ee4372e3c1a7890
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
Since our sdram driver is ready, we can use the actual size
instead of hard code.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
enable debug uart for rk3288 and print something to let people know
where we are
Signed-off-by: Eddie Cai <eddie.cai.linux@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The pwm3 on evb-rk3399 is used for pwm regulator, need to invert
the polarity to make it work correctly.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
With the validation done for DDR3-1600 (i.e. 800 MHz bus clock), we
add the timings (rk3399-sdram-ddr3-1600.dtsi) and change rk3399-puma.dts
to use these by default.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Simon Glass <sjg@chromium.org>
Drop blank line at end of file:
Signed-off-by: Simon Glass <sjg@chromium.org>
The DDR3-1333 timings for the RK3399-Q7 (Puma) has some unintended
left-over comments in them. This change cleans the file up.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Simon Glass <sjg@chromium.org>
The imagetool framework checks whether function pointer for the verify,
print and extract actions are available and will will handle their
absence appropriately.
This change removes the unnecessary functions and uses the driver
structure to convey available functionality to imagetool. This is in
fact better than having verify just return 0 (which previously broke
dumpimage, as dumpimage assumed that we had handled the image and did
not continue to probe further).
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Simon Glass <sjg@chromium.org>
Dumpimage (it invoked with "-T rkspi" or "-T rksd") would not work due
to check_params failing. These changes ensure that we can both be called
with an empty imagename.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Simon Glass <sjg@chromium.org>
This change set adds documentation to the header0 initialisation and
improves readability for the calculations of various offsets/lengths.
As the U-Boot SPL stage doesn't use any payload beyond what is covered
by init_size, we no longer add RK_MAX_BOOT_SIZE to init_boot_size.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Simon Glass <sjg@chromium.org>
The calculation of the variable header size in rkcommon_vrec_header
had been update twice in the earlier series (introducing boot0-style
images to deal with the alignment of the first instruction in 64bit
binaries). Unfortunately, I didn't update the comment twice (so it
remained out-of-date).
This change brings the comment back in-sync with what the code is
doing.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Simon Glass <sjg@chromium.org>
In (first) breaking and (then) fixing the rkspi tool, I realised that
the calculation of the required padding (for the header-size and the
2K-in-every-4K SPI layout) was not as self-explainatory as it could
have been. This change rewrites the code (using new, common functions
in rkcommon.c) and adds verbose in-line comments to ensure that we
won't fall into the same pit in the future...
Tested on the RK3399 (with has a boot0-style payload) with SD/MMC and SPI.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Simon Glass <sjg@chromium.org>
Our earlier change broke the generation of SPI images, by excluding the
2K used for header0 from the size-calculation.
This commit makes sure that these are included before calculating the
required total size (including the padding from the 2K-from-every-4K
conversion).
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Simon Glass <sjg@chromium.org>
To include the ability to load from an SPI flash in SPL, it's not
sufficient to define SPL_SPI_SUPPORT and SPL_SPI_FLASH_SUPPORT via
Kconfig... so we conditionally define SPL_SPI_LOAD if SPI support
is already enabled for SPL via Kconfig.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Simon Glass <sjg@chromium.org>
The existing Rockchip SPI (rk_spi.c) driver also matches the hardware
block found in the RK3399. This has been confirmed both with SPI NOR
flashes and general SPI transfers on the RK3399-Q7 for SPI1 and SPI5.
This change adds the 'rockchip,rk3399-spi' string to its compatible
list to allow reuse of the existing driver.
X-AffectedPlatforms: RK3399-Q7
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Jakob Unterwurzacher <jakob.unterwurzacher@theobroma-systems.com>
Acked-by: Simon Glass <sjg@chromium.org>
This commit adds support for the pin-configuration of the SPI5
controller of the RK3399 through the following changes:
* grf_rk3399.h: adds definition for configuring the SPI5 pins
in the GPIO2C group
* periph.h: defines PERIPH_ID_SPI3 through PERIPH_ID_SPI5
* pinctrl_rk3399.c: adds the reverse-mapping from the IRQ# to
PERIPH_ID_SPI5; dispatches PERIPH_ID_SPI3
through SPI5 to the appropriate pin-config
function; implements the pin-configuration
for PERIPH_ID_SPI5 using the GPIO2C group
X-AffectedPlatforms: RK3399-Q7
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Jakob Unterwurzacher <jakob.unterwurzacher@theobroma-systems.com>
Acked-by: Simon Glass <sjg@chromium.org>
The baudrate in rkspi was calculated by using an integer division
(which implicitly discarded any fractional result), then rounding to
an even number and finally clamping to 0xfffe using a bitwise AND
operator. This introduced two issues:
1) for very small baudrates (overflowing the 0xfffe range), the
bitwise-AND generates rather random-looking (wildly varying)
actual output bitrates
2) for higher baudrates, the calculation tends to 'err towards a
higher baudrate' with the actual error increasing as the dividers
become very small. E.g., with a 99MHz input clock, a request
for a 20MBit baudrate (99/20 = 4.95), a 24.75 MBit would be use
(which amounts to a 23.75% error)... for a 34 MBit request this
would be an actual outbout of 49.5 Mbit (i.e. a 45% error).
This change rewrites the divider selection (i.e. baudrate calculation)
by making sure that
a) for the normal case: the largest representable baudrate below the
requested rate will be chosen;
b) for the denormal case (i.e. when the divider can no longer be
represented), the lowest representable baudrate is chosen.
Even though the denormal case (b) may be of little concern in real
world applications (even with a 198MHz input clock, this will only
happen at below approx. 3kHz/3kBit), our board-verification team kept
complaining.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
The original clock/bitrate selection code for the rk_spi driver was a
bit limited, as it always selected a 99MHz input clock rate (which
would allow for a maximum bitrate of 49.5MBit/s), but returned -EINVAL
if a bitrate higher than 48MHz was requested.
To give us better control over the bitrate (i.e. add more operating
points, especially at "higher" bitrate---such as above 9MBit/s), we
try to choose 4x the maximum frequency (clamped to 50MBit) from the
DTS instead of 99MHz... for most use-cases this will yield a frequency
of 198MHz, but is flexible to go beyond this in future configurations.
This also rewrites the check to allow frequencies of up to half the
SPI module rate as bitrates and then clamps to whatever the DTS allows
as a maximum (board-specific) frequency and does away with the -EINVAL
when trying to select a bitrate (for cases that exceeded the hard
limit) and instead consistently clamps to the lower of the hard limit,
the soft limit for the SPI bus (from the DTS) or the soft limit for
the SPI slave device.
This replaces
"rockchip: spi: rk_spi: select 198MHz input to the SPI module for the RK3399"
"rockchip: spi: rk_spi: improve clocking code for the RK3399"
from earlier versions of this series.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
For the RK3399, i2c_set_rate (and by extension: our spi_set_rate,
which had been mindlessly following the template of the i2c_set_rate
implementation) miscalculates the rate returned due to a off-by-one
error resulting from the following sequence of events:
1. calculates 'src_div := src_freq / target_freq'
2. stores 'src_div - 1' into the register (the actual divider applied
in hardware is biased by adding 1)
3. returns the result of the DIV_RATE(src_freq, src_div) macro, which
expects the (decremented) divider from the hardware-register and
implictly adds 1 (i.e. 'DIV_RATE(freq, div) := freq / (div + 1)')
This can be observed with the SPI driver, which sets a rate of 99MHz
based on the GPLL frequency of 594MHz: the hardware generates a clock
of 99MHz (src_div is 6, the bitfield in the register correctly reads 5),
but reports a frequency of 84MHz (594 / 7) on return.
To fix, we have two options:
* either we bias (i.e. "DIV_RATE(GPLL, src_div - 1)"), which doesn't
make for a particularily nice read
* we simply call the i2c/spi_get_rate function (introducing additional
overhead for the additional register-read), which reads the divider
from the register and then passes it through the DIV_RATE macro
Given that this code is not time-critical, the more readable solution
(i.e. calling the appropriate get_rate function) is implemented in this
change.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
Acked-by: Simon Glass <sjg@chromium.org>
This change adds support for configuring the module clocks for SPI1 and
SPI5 from the 594MHz GPLL.
Note that the driver (rk_spi.c) always sets this to 99MHz, but the
implemented functionality is more general and will also support
different clock configurations.
X-AffectedPlatforms: RK3399-Q7
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Jakob Unterwurzacher <jakob.unterwurzacher@theobroma-systems.com>
Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
Acked-by: Simon Glass <sjg@chromium.org>
Modify Makefile for rockchip video driver according to Kconfig, so that
source code will not be compiled if not needed.
Signed-off-by: Eric Gao <eric.gao@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
1. add Kconfig for rockchip video driver, so that video port can be
selected as needed.
2. move VIDEO_ROCKCHIP option to new Kconfig for concision.
Signed-off-by: Eric Gao <eric.gao@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
Drop indenting in Kconfig:
Signed-off-by: Simon Glass <sjg@chromium.org>
The genunie bus clock is sclk_x for eMMC/SDMMC, add support for it.
Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
The genunie bus clock is sclk_x for eMMC/SDMMC/SDIO, add support for
it.
Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
The genunie bus clock is sclk_x for eMMC/SDMMC/SDIO, add support for
it.
Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
The genunie bus clock is sclk_x for eMMC/SDIO, add support for it.
Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
As you know, biu_clk is used for AMBA AHB/APB interface, ciu_clk is
used for communication between host and card devices. The real bus clock
is ciu, so let's rectify it.
Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
Use regulators_enable_boot_on() instead of init regulators one by one,
the interface can init all the regulators with regulator-boot-on property.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
This is a simplified version of linux/arch/mips/bcm63xx/reset.c
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This is a simplified version of linux/arch/mips/bcm63xx/clk.c
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This driver is a simplified version of linux/drivers/leds/leds-bcm6358.c
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This board has several LEDs attached to its BCM6328 led controller.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This board has several LEDs attached to its BCM6328 led controller.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This driver can control up to 24 LEDs and supports HW blinking and serial leds.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This driver can control up to 24 LEDs and supports HW blinking and serial leds.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This driver is a simplified version of linux/drivers/leds/leds-bcm6328.c,
simplified to remove HW leds and blink fallbacks.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This SoC has one gpio bank divided into two 32 bit registers, with a total of
52 GPIOs.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This SoC has one gpio bank with a total of 32 GPIOs.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This SoC has one gpio bank divided into two 32 bit registers, with a total of
40 GPIOs.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This driver is based on linux/arch/mips/bcm63xx/gpio.c, simplified to allow
defining one or two independent banks for each Broadcom SoC.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
CFE checks CPU Thread in a different way (using register $22):
mfc0 t1, C0_BCM_CONFIG, 3 # $22
li t2, CP0_CMT_TPID # (1 << 31)
and t1, t2
bnez t1, 2f # if we are running on thread 1, skip init
nop
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Use uclass_first_device and uclass_next_device in order to avoid exceptions
for drivers that aren't probed when cpu ops are requested.
Improve code style and fix indentations.
Fix incorrect line break when cpu info is not available.
Remove unneeded brackets.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
It is based on linux/drivers/tty/serial/bcm63xx_uart.c
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Avoid duplicating do_reset definition if SYSRESET is enabled for MIPS
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add a new sysreset driver based on linux/drivers/power/reset/syscon-reboot.c,
which provides a generic driver for platforms that only require writing a mask
to a regmap offset.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Commit 740d5d3 added two new features but only one feature name,
which results in NULL prints when device_id feature is selected.
Before:
HG556a # cpu detail
-1: cpu@0 BCM6358A1
ID = 0, freq = 300 MHz: L1 cache, MMU, NULL
Device ID 0x2a010
-1: cpu@1 BCM6358A1
ID = 1, freq = 300 MHz: L1 cache, MMU, NULL
Device ID 0x2a010
After:
HG556a # cpu detail
-1: cpu@0 BCM6358A1
ID = 0, freq = 300 MHz: L1 cache, MMU, Device ID
Device ID 0x2a010
-1: cpu@1 BCM6358A1
ID = 1, freq = 300 MHz: L1 cache, MMU, Device ID
Device ID 0x2a010
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
All MIPS boards that support debug uart are calling debug_uart_init right at
the beginning of board_early_init_f.
Instead of doing that, let's provide a generic call to debug_uart_init right
before the call to board_init_f if debug uart is enabled for boards without
stack in SRAM.
On the other hand, boards with stack in SRAM can call earlier (right before
low level init).
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
In order to add a generic MIPS debug_uart_init call right before the call to
board_early_init_f, we need to remove all calls to debug_uart_init from every
MIPS boards.
WDR4300 doesn't provide a board_debug_uart_init and configures pinmux in
board_early_init_f instead. Since I have no idead of what's the needed uart
pinmux config, I copied the whole pinmux config to a new function that is
called from board_early_init_f if CONFIG_DEBUG_UART_BOARD_INIT is not enabled.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
In order to add a generic MIPS debug_uart_init call right before the call to
board_early_init_f, we need to remove all calls to debug_uart_init from every
MIPS boards.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
In order to add a generic MIPS debug_uart_init call right before the call to
board_early_init_f, we need to remove all calls to debug_uart_init from every
MIPS boards.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
This way we can see output about u-boot.elf being built or not.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
This is needed in order to allow building it for other archs.
Move relocation comment to a better place.
Remove no longer needed dts FIXME.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
With the addition of Kconfig now having CONFIG_TWL4030_POWER and
with that being the default when OMAP34XX is selected, this
is no longer needed in include/configs and can be removed from the
whitelist.
This has only been tested on logic PD DM3730 using ti_omap3_common.h
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
As requested, I added the CONFIG_TWL4030_POWER to Kconfig and made it
the implied default when selecting OMAP34XX as a platform.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
With the addition of twl4030_power_off(), let's allow the 'poweroff' command
to run this function when CONFIG_CMD_POWEROFF is enabled.
Tested on a DM3730 with twl4030 PMIC.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
This patch also removes all the excessive code for NS16550 intiailization
as the device tree can do that now. This also adds DM_I2C and DM_MMC
since the overlying drivers have the built-in support already. The
corresponding include/config/omap3_logic.h also reduced in size
due to the new device tree support.
Signed-off-by: Adam Ford <aford173@gmail.com>
Changes in V2:
Retain Auto-detect ability between SOM-LV and Torpedo
Split this off from the device sub submissions
Previous commit has this combined with SOM-LV. This commit has only
the Torpedo Device Tree.
The device trees were sync'd with 4.9.y stable with two changes:
disable mmc2 and stdout-path = &uart1. Both of those two changes
will be submitted to the linux-omap list
Signed-off-by: Adam Ford <aford173@gmail.com>
Changes in V2:
Split device tree from other board
This adds the device tree. Previous commit added both boards at the
same time.
Signed-off-by: Adam Ford <aford173@gmail.com>
Changes in V2:
Split the SOM-LV from Torpedo
Some OMAP3 devices support an SMSC ethernet PHY connected to the GPMC bus.
This copies this device tree from Linux 4.9.y stable
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Many OMAP3 boards use a TWL4030 PMIC. This brings in the related
device tree information for common TWL4030 and TWL4030 with OMAP3.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
New i2c_read, i2c_write and i2c_probe functions, tested on OMAP4
(4430/60/70), OMAP5 (5430) and AM335X (3359) were added in 960187ffa125(
"ARM: OMAP: I2C: New read, write and probe functions") but not tested
on OMAP3. This patch will allow the updated drivers using device tree and
DM_I2C to operate on OMAP3.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Add device tree support to allow for CONFIG_OF_CONTROL in OMAP3630 boards.
DM3730 can use this same device tree.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Add device tree support to allow for CONFIG_OF_CONTROL in OMAP3 boards.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
This patch changes the way DM_MMC calculates offset to the base register of
MMC. Previously this was through an #ifdef but that wasn't necessary for OMAP3.
This patch will now add in the offset to the base address based on the
.compatible flags.
Signed-off-by: Adam Ford <aford173@gmail.com>
V2: Remove ifdef completely and reference offset from the omap_hsmmc_ids table.
V1: Change ifdef to ignore OMAP3
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
In some boards like the Raspberry Pi the initial bootloader will pass
a DT to the kernel. When using U-Boot as such kernel, the board code in
U-Boot should be able to provide U-Boot with this, already assembled
device tree blob.
This patch introduces a new config option CONFIG_OF_BOARD to use instead
of CONFIG_OF_EMBED or CONFIG_OF_SEPARATE which will initialize the DT
from a board-specific funtion instead of bundling one with U-Boot or as
a separated file. This allows boards like the Raspberry Pi to reuse the
device tree passed from the bootcode.bin and start.elf firmware
files, including the run-time selected device tree overlays.
Signed-off-by: Alex Deymo <deymo@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Adjust the video driver to work with driver model and move over existing
baords. There is no need to keep the old code.
We can also drop setting of CONFIG_FB_ADDR since driver model doesn't have
this problem.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Anatolij Gustschin <agust@denx.de>
Adjust this function so that we can convert it to support CONFIG_DM_VIDEO
without a lot of code duplication.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Anatolij Gustschin <agust@denx.de>
Add a function to set the video parameters to the msg handler and remove
it from the video driver.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Anatolij Gustschin <agust@denx.de>
Add a function to get the video size to the msg handler and remove it from
the video driver.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Anatolij Gustschin <agust@denx.de>
We should not use an embedded device tree on a production board. There
does not seem to be any reason for it in commit 7670909. So drop this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Convert the bcm2835 SDHCI driver over to support CONFIG_DM_MMC and move
all boards over. There is no need to keep the old code since there are no
other users.
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
The bcm283x chips provide a way for the ARM core to communicate with the
graphics processor, which is in charge of many things. This is handled by
way of a message prototcol.
At present the code for sending message (and receiving a reply) is spread
around U-Boot, primarily in the board file. This means that sending a
message from a driver requires duplicating the code.
Create a new message implementation with a function to support powering on
a subsystem as a starting point.
Signed-off-by: Simon Glass <sjg@chromium.org>
Start using driver model for USB on the Raspberry Pi. The dwc2 supports
this now so this is just a config change.
Signed-off-by: Simon Glass <sjg@chromium.org>
A common use of memmove() can be handled by memcpy(). Also memcpy()
includes an optimisation for large sizes: it copies a word at a time. So
we can get a speed-up by calling memcpy() to handle our move in this case.
Update memmove() to call memcpy() if the destination is before the source.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
On further review this returns the wrong packet length from the driver.
It may not be noticed since protocols will take care of it. Fix it by
subtracting the header length from the packet length returned.
Signed-off-by: Simon Glass <sjg@chromium.org>
Enable disk driver model for dra7xx_evm as dwc_ahci supports
driver model. As a consequence we must also enable CONFIG_BLK and
CONFIG_DM_USB.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Dropped CONFIG_SPL_PHY=y in sandbox_spl to fix build error:
Signed-off-by: Simon Glass <sjg@chromium.org>
Implement a sata driver for Synopsys DWC sata device based on
U-boot driver model.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This is needed to probe devices under that bus such as the SATA PHY.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This phy is found on omap platforms with sata capabilities.
Except for the part related to the DM and the PHY framework, the code is
basically a copy paste from arch/arm/mach-omap2/pipe3-phy.c
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Those tests check:
- the ability for a phy-user to get a phy based on its name or its index
- the ability of a phy device (provider) to manage multiple ports
- the ability to perform operations on the phy (init,deinit,on,off)
- the behavior of the uclass when optional operations are not implemented
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The PHY framework provides a set of APIs to control a PHY. This API is
derived from the linux version of the generic PHY framework.
Currently the API supports init(), deinit(), power_on, power_off() and
reset(). The framework provides a way to get a reference to a phy from the
device-tree.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The DM version of scsi_scan() is becoming a bit long, it can be split:
scsi_scan() iterates over the IDs and LUNs and for each id/lun pair calls
do_scsi_scan_one() to do the work of:
- detecting an attached drive
- creating the associated block device if a drive is found.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Enable the early debug UART to debug problems when an ICE or other
debug mechanism is not available.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Because the introduction of the pinctrl and clk drivers and the
device tree files, remove unneeded hard coded related code from
the board file.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Update the configuration files to support the device tree and driver
model. The device clock and pins configuration are handled by the
clock and the pinctrl drivers respectively.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Enable the early debug UART to debug problems when an ICE or other
debug mechanism is not available.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Since the introduction of the pinctrl and clk drivers and the
device tree files, remove unneeded hard coded related code from
the board file.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Update the configuration files to support the device tree and driver
model. The device clock and pins configuration are handled by the
clock and the pinctrl drivers respectively.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Enable the early debug UART to debug problems when an ICE or other
debug mechanism is not available.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Since the introduction of the pinctrl and clk drivers and the
device tree files, remove unneeded hard coded related code from
the board file.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Update the configuration files to support the device tree and driver
model. The device clock and pins configuration are handled by the
clock and the pinctrl drivers respectively.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Enable the early debug UART to debug problems when an ICE or other
debug mechanism is not available.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Since the introduction of the pinctrl and clk drivers and the
device tree files, remove unneeded hard coded related code from
the board file.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Update the configuration files to support the device tree and driver
model. The device clock and pins configuration are handled by the
clock and the pinctrl drivers respectively.
Because the limitation of internal SRAM size, the SPL with driver
model can't be supported, disable the SPL option.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Enable the early debug UART to debug problems when an ICE or other
debug mechanism is not available.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Since the introduction of the pinctrl and clk driver and the device
tree files, remove unneeded related code from the board file.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Update the configuration files to support the device tree and driver
model. The device clock and pins configuration are handled by the
clock and the pinctrl drivers respectively.
Because the limitation of internal SRAM size, the SPL with driver
model can't be supported, disable the SPL option.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Enable the early debug UART to debug problems when an ICE or other
debug mechanism is not available.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Since the introduction of the pinctrl and clock driver and the device
tree files, remove unneeded hard coded related code from the board
file.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Update the configuration files to support the device tree and driver
model. The device clock and pins configuration are handled by the
clock and the pinctrl drivers respectively.
Because the limitation of internal SRAM size, the SPL with driver
model can't be supported, disable the SPL option.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The device tree source files of at91sam9263ek boards are copied from
the Linux v4.10, do the changes as below.
- Add the reg property for the pinctrl node.
- Move the gpio (pioA, pioB, pioC, pioD, pioE) nodes as the pinctrl's
slibling nodes, instead of the child nodes.
- Add the "u-boot,dm-pre-reloc" property for the dbgu node are used
in board_init_f stage.
- Fix the compilation warnings.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The device tree source files of at91sam9rlek boards are copied from
the Linux v4.10, do the changes as below.
- Add the reg property for the pinctrl node.
- Move the gpio (pioA, pioB, pioC, pioD) nodes as the pinctrl's
slibling nodes, instead of the child nodes.
- Add the "u-boot,dm-pre-reloc" property for the dbgu node are used
in board_init_f stage.
- Fix the compilation warnings.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The device tree source files of at91sam9g20ek and at91sam9260ek
boards are copied from the Linux v4.10, do the changes below.
- Fix the build error for the usb0 node.
- Add the reg property for the pinctrl node.
- Move the gpio (pioA, pioB, pioC ...) nodes as the pinctrl's
slibling nodes, instead of the child nodes.
- Add the "u-boot,dm-pre-reloc" property for the dbgu node are used
in board_init_f stage.
- Add the clk pinctrl of the mmc0 node.
- Fix the compilation warnings.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The device tree source files of at91sam9m10g45ek boards are copied
from the Linux v4.10, do the changes as below.
- Add the reg property for the pinctrl node.
- Move the gpio (pioA, pioB, pioC, pioD, pioE) nodes as the pinctrl's
slibling nodes, instead of the child nodes.
- Add the "u-boot,dm-pre-reloc" property to determine which nodes
are used by the board_init_f stage.
- Fix the compilation warnings.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The device tree source files of at91sam9n12ek boards are copied from
the Linux v4.10, do the changes as below.
- Add the reg property for the pinctrl node.
- Move the gpio (pioA, pioB, pioC, pioD) nodes as the pinctrl's
slibling nodes, instead of the child nodes.
- Change the compatible of the spi flash to "spi-flash".
- Add the spi0 aliases.
- Fix the pinctrl-names of mmc0 node.
- Add the "u-boot,dm-pre-reloc" property to determine which nodes
are used by the board_init_f stage.
- Fix the compilation warnings.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The device tree source files of at91sam9x5ek board are copied from
the Linux v4.10, do the changes below.
- Add the reg property for the pinctrl node.
- Move the gpio (pioA, pioB, pioC ...) nodes as the pinctrl's
slibling nodes, instead of the child nodes.
- Add the "u-boot,dm-pre-reloc" property to determine which nodes
are used by the board_init_f stage.
- Change the compatible of the spi flash to "spi-flash".
- Add the spi0 aliases.
- Fix the compilation warnings.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add the clock support.
Note that the clock handling of the DBGU peripheral is different
from the USART.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add the uart init function to be used on both probe and the early
debug uart init. For the latter, the input clock should be from
CONFIG_DEBUG_UART_CLOCK.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add the compatible "atmel,at91rm9200-clk-master" to align with
the kernel.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Enhance the peripheral clock to support both at9sam9x5's and
at91rm9200's peripheral clock via the different compatibles.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
To avoid the failure of mdio_register(), add the remove callback
to unregister the mii_dev when removing the ethernet device.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Fixed up unused variable warning, e.g. for gurnard:
Signed-off-by: Simon Glass <sjg@chromium.org>
The sama5d36ek CMP board is the variant of sama5d3xek board.
It is equipped with the low-power DDR2 SDRAM, PMIC ACT8865, and
some power rails. The board is mainly used to measure the power
consumption. As all those changes are done in at91bootstrap,
in U-Boot, only use another device tree file, no code needed
to change.
As there is additional power consumption when enbling the USB
Host and USB device, for the power consumption measurement
intention, disable the USB host and device.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Enable config options to support the SPL, increase the malloc
memory size for the SPL and board_init_f stage and increase
the memory space for the SPL binary.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Due to the pin configuration and clock enabling is handling by the
driver, remove the unneeded hardcode uart1 init during
board_early_init_f stage.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Because the MACB driver supports the driver model and device tree,
the pins configuration and clock enabling are handled by the
pinctrl driver and clock driver, remove this hardcoded init code.
The USB Ether init code is removed as well.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Enable CONFIG_DM_ETH to make MACB to support driver model.
Because the USB Ether doesn't support driver model so far,
remove this feature.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Add the "u-boot,dm-pre-reloc" property to determine which nodes
which are needed by SPL and by the board_init_f stage.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
- Remove "probe" function from sandbox wdt driver
- Fix include order
Fixes: 0753bc2d30 ("dm: Simple Watchdog uclass")
Signed-off-by: Maxim Sloyko <maxims@google.com>
[trini: Create as the delta between v1 (applied) and v2 (should have
applied)].
Signed-off-by: Tom Rini <trini@konsulko.com>
Move existing configuration from header file to defconfig or dts as
appropriate.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Add PCIE analog parameters initialization values according to
latest ETP.
Signed-off-by: Igal Liberman <igall@marvell.com>
Reviewed-by: Stefan Roese <sr@denx.de>
No functional change.
The variable name "comphy_index" is misleading, it represents
cp index and not comphy index.
Signed-off-by: Igal Liberman <igall@marvell.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Add SFI analog parameters initialization values according to
latest ETP.
Signed-off-by: Igal Liberman <igall@marvell.com>
Reviewed-by: Stefan Roese <sr@denx.de>
since now the COMPHY can also be ignored, we must know the
state of the COMPHY. we cannot assume anymore that a missing
COMPHY is unconnected.
Signed-off-by: Yehuda Yitschak <yehuday@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Igal Liberman <igall@marvell.com>
Reviewed-by: Stefan Roese <sr@denx.de>
The comphy configuration is incorrect.
Set the correct values for SGMII.
In addition, remove xaui from the comment as it is not supported.
Signed-off-by: Yoav Gvili <ygvili@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Igal Liberman <igall@marvell.com>
Reviewed-by: Stefan Roese <sr@denx.de>
This patch adds the option to configure a comphy to 5G XFI mode.
In order to configure the comphy to 5G XFI, update
the comphy node in the device-tree:
phy2 {
phy-type = <PHY_TYPE_SFI>;
phy-speed = <PHY_SPEED_5_15625G>;
};
Signed-off-by: Igal Liberman <igall@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
Align PHY selectors register with Armada-CP-110 functional SPEC
update all relevant device trees with this change.
Signed-off-by: Hanna Hawa <hannah@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Igal Liberman <igall@marvell.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Add SATA analog parameters initialization values according to
latest ETP.
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Igal Liberman <igall@marvell.com>
Reviewed-by: Stefan Roese <sr@denx.de>
This patch fixes the following:
1. KR/SFI on lane #4 mux selector is 0x2 and not 0x1
2. Comment typo
Signed-off-by: Rabeeh Khoury <rabeeh@solid-run.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Igal Liberman <igall@marvell.com>
Reviewed-by: Stefan Roese <sr@denx.de>
This type tells u-boot to preserve the COMPHY settings as is
it is usefull in situations where the COMPHY was initialized by
earlier firmware.
Note that IGNORE is different from UNCONNECTED since setting
UNCONNECTED type will disconnect the COMPHY in the COMPHY MUX
which is a desired behaviour
Signed-off-by: Yehuda Yitschak <yehuday@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Igal Liberman <igall@marvell.com>
Reviewed-by: Stefan Roese <sr@denx.de>
UTMI_PHY_TO_USB_HOST was used in USB3 UTMI dts node only, but there will
be USB2 UTMI dts node for some SoCs that have got USB2 controller, so rename
TO_USB_HOST to TO_USB3_HOST to distinguish TO_USB2_HOST in later on patches.
Signed-off-by: zachary <zhangzg@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Igal Liberman <igall@marvell.com>
Reviewed-by: Stefan Roese <sr@denx.de>
The serdes was always configured in root complex mode.
this patch add new entry in device tree (per serdes)
which indicates whether the serdes is in end point mode.
if so, it skips the root complex configuration.
Signed-off-by: Haim Boot <hayim@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Igal Liberman <igall@marvell.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Use correct naming as done in the latest Marvell U-Boot version as well.
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Igal Liberman <igall@marvell.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Use local static counter for maintaining the COMPHY chip-ID
upon its initialization.
The dev->seq originally used as the COMPHY chip-ID depends
on the device tree scan order and produces wrong results
that breaks the deficated PHYs init flow, which in turn
breaks the USB support.
Change-Id: I4e3f7ec36590a7f95dc94d9269a3c47fb708c4a9
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Igal Liberman <igall@marvell.com>
Cc: Stefan Chulski <stefanc@marvell.com>
Cc: Nadav Haklai <nadavh@marvell.com>
Reviewed-by: Stefan Roese <sr@denx.de>
- Fix spelling error of SERDES_VERSION
- Remove superfluous definition of this macro
- Remove unnecessary include of i2c.h
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Stefan Roese <sr@denx.de>
Add NAND configuration parameters to A8K shared config file.
Add defconfig for db-88f7040 board with boot from NAND setup.
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Igal Liberman <igall@marvell.com>
Cc: Nadav Haklai <nadavh@marvell.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Add NAND to CP master device tree. Add armada-7040-db-nand
device tree for the board configured with NAND boot device.
Add comment about boot device ID to armada-7040-db DTS.
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Igal Liberman <igall@marvell.com>
Cc: Nadav Haklai <nadavh@marvell.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Implement mvebu_get_nand_clock call for A8K family.
This function is used by PXA3XX NAND driver.
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Igal Liberman <igall@marvell.com>
Cc: Nadav Haklai <nadavh@marvell.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Add PCIe initialization at early init stage.
This operation has a side effect of detecting all PCIe
plug-in cards, so the operator is not obligated to issue
"pci enum" command though CLI for this purpose.
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Igal Liberman <igall@marvell.com>
Cc: Nadav Haklai <nadavh@marvell.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Sync the default configuration of Armada-8040-DB with
Marvell u-boot-2015 standard configuration "A" for the same board.
The standard configuration "A" enables 2 PCIe slots on CP0
and 3 PCIe slots on CP1.
This is the main configuration used for u-boot and Linux tests.
This patch also re-arranges the DTS file entries by grouping
all nodes related to CP0 and CP1.
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Igal Liberman <igall@marvell.com>
Cc: Nadav Haklai <nadavh@marvell.com>
Reviewed-by: Stefan Roese <sr@denx.de>
This patch allows probing all PCIe nodes defined in DTS
even if there no device connected to such node (no link).
Without this fix the driver returns -ENODEV when the PCIe
link is down. As result the pci_init function stops
scanning bus on first empty PCIe slot and all devices
located in higher numbered buses are not discovered.
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Igal Liberman <igall@marvell.com>
Cc: Nadav Haklai <nadavh@marvell.com>
Reviewed-by: Stefan Roese <sr@denx.de>
This patch adds a remove function to the mvpp2 ethernet driver which is
called before the OS is started, doing:
- Allocate the used buffers back from the buffer manager
- Stop the BM activity
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Stefan Chulski <stefanc@marvell.com>
Cc: Kostya Porotchkin <kostap@marvell.com>
Cc: Nadav Haklai <nadavh@marvell.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Enable by default DM_I2C for all Texas Instruments Keystone 2 based
evms.
Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Enable I2C0 and I2C1 which is needed to enable usage of DM I2C.
Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Add aliases for I2C nodes required for the DM framework to probe the
davinci-i2c driver.
Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Add I2C nodes to the 66AK2Gx dtsi.
Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
In non DM I2C read operations the address length passed in during a read
operation will be used automatically. However, in DM I2C the address length
is set to a default value of one which causes problems when trying to
perform a read with a differing alen. Therefore, before the first read in a
series of read operations set the alen to the correct value.
Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Reading from the I2C EEPROM used typically requires using an address length
of 2. However, when using DM for I2C the default address length used is 1.
To fix this introduce a new function that allows the address length to be
changed. The logic to do so was copied from cmd/i2c.c.
Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Convert davinci i2c driver to driver model.
Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
The i2c driver will be converted to support device model. In preparation
for that change split the various functions into two parts. This will
allow device model specific driver to reuse the majority of the code from
the non device model implementation.
Also rename the probe function to probe_chip to better reflect its
purpose.
Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
One some keystone2 platforms like K2G ICE, there is an option
to switch between 24MHz or 25MHz as sysclk. But the existing
driver assumes it is always 24MHz. Add support for getting
all reference clocks dynamically by reading boot pins.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
K2G supports various sysclk frequencies which can be
determined using sysboot pins. PLLs should be configured
based on this sysclock frequency. Add PLL configurations
for all supported sysclk frequencies.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Enable TI_COMMON_CMD_OPTIONS on all am335x platforms.
Also sync with savedefconfig.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
[trini: Re-sync, add in boneblack*, evm_hs_{norboot,spiboot,usbspl} configs]
Signed-off-by: Tom Rini <trini@konsulko.com>
Instead of defining command options in every defconfig,
define a common Kconfig symbol that consolidates all command
options that are supported by any TI platform. Also use imply
keyword so that that specific option can be disabled if
not required.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
ARM errata 852421 and 852423 applies to r1p0, r1p1 and r1p2
revisions of Cortex-A17 processors. These workarounds
exist in Linux kernel and I thought it would be better
to add them in to U-Boot.
Signed-off-by: Nisal Menuka <nisalmenuka23@gmail.com>
Remove unnecessary apb and ahb nodes and just override necessary
nodes/values.
Signed-off-by: Maxim Sloyko <maxims@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Refactor SCU header to use consistent Mask & Shift values.
Now, consistently, to read value from SCU register, mask needs
to be applied before shift.
Signed-off-by: Maxim Sloyko <maxims@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add support for clocks needed by MACs to ast2500 clock driver.
The clocks are D2-PLL, which is used by both MACs and PCLK_MAC1 and
PCLK_MAC2 for MAC1 and MAC2 respectively.
The rate of D2-PLL is hardcoded to 250MHz -- the value used in Aspeed
SDK. It is not entirely clear from the datasheet how this clock is used
by MACs, so not clear if the rate would ever need to be different. So,
for now, hardcoding it is probably safer.
The rate of PCLK_MAC{1,2} is chosen based on MAC speed selected through
hardware strapping.
So, the network driver would only need to enable these clocks, no need
to configure the rate.
Signed-off-by: Maxim Sloyko <maxims@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add Device Model based I2C driver for ast2500/ast2400 SoCs.
The driver is very limited, it only supports master mode and
synchronous byte-by-byte reads/writes, no DMA or Pool Buffers.
Signed-off-by: Maxim Sloyko <maxims@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Heiko Schocher <hs@denx.de>
Add P-Bus Clock support to ast2500 clock driver.
This is the clock used by I2C devices.
Signed-off-by: Maxim Sloyko <maxims@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This driver uses Generic Pinctrl framework and is compatible with
the Linux driver for ast2500: it uses the same device tree
configuration.
Not all pins are supported by the driver at the moment, so it actually
compatible with ast2400. In general, however, there are differences that
in the future would be easier to maintain separately.
Signed-off-by: Maxim Sloyko <maxims@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This change switches all existing users of ast2500 Watchdog to Driver
Model based Watchdog driver.
To perform system reset Sysreset Driver uses first Watchdog device found
via uclass_first_device call. Since the system is going to be reset
anyway it does not make much difference which watchdog is used.
Instead of using Watchdog to reset itself, SDRAM driver now uses Reset
driver to do that.
These were the only users of the old Watchdog API, so that API is
removed.
This all is done in one change to avoid having to maintain dual API for
watchdog in between.
Signed-off-by: Maxim Sloyko <maxims@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add Reset Driver configuration to ast2500 SoC Device Tree and bindings
for various reset signals
Signed-off-by: Maxim Sloyko <maxims@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add Reset Driver for ast2500 SoC. This driver uses Watchdog Timer to
perform resets and thus depends on it. The actual Watchdog device used
needs to be configured in Device Tree using "aspeed,wdt" property, which
must be WDT phandle, for example:
rst: reset-controller {
compatible = "aspeed,ast2500-reset";
aspeed,wdt = <&wdt1>;
}
Signed-off-by: Maxim Sloyko <maxims@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Make functions for locking and unlocking SCU part of SCU API.
Many drivers need to modify settings in SCU and thus need to unlock it
first. This change makes it possible.
Signed-off-by: Maxim Sloyko <maxims@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This driver supports ast2500 and ast2400 SoCs.
Only ast2500 supports reset_mask and thus the option of resettting
individual peripherals using WDT.
Signed-off-by: Maxim Sloyko <maxims@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This is a simple uclass for Watchdog Timers. It has four operations:
start, restart, reset, stop. Drivers must implement start, restart and
stop operations, while implementing reset is optional: It's default
implementation expires watchdog timer in one clock tick.
Signed-off-by: Maxim Sloyko <maxims@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This patch is required for correct SPL device tree creation by fdtgrep
as fdtgrep looks for u-boot,dm-pre-reloc property of the node to include
it in the spl device tree.
Not adding it in these subnodes ignores the pin muxing of peripherals
which is almost always in the subnodes.
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
CONFIG_CMD_DATE was recently moved to Kconfig. Remove the now duplicate
description of the option.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The Kconfig description replaces the description in the README file so
as options are migrated they can be removed from the README.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
After moving to KConfig and removing from all headers options should be
removed from config_whitelist.txt so the build starts complaining if
someone adds them back.
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Avoid repetitive code dealing with asking the user for confirmation.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add an implementation of the ds1307 driver that uses the driver model
i2c APIs.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The IGEP SMARC AM335x is an industrial processor module with
following highlights:
o AM3352 TI processor (Up to AM3359)
o Cortex-A8 ARM CPU
o SMARC form factor module
o Up to 512 MB DDR3 SDRAM / 512 MB FLASH
o WiFi a/b/g/n and Bluetooth v4.0 on-board
o Ethernet 10/100/1000 Mbps and 10/100 Mbps controller on-board
o JTAG debug connector available
o Designed for industrial range purposes
Signed-off-by: Pau Pajuelo <ppajuelo@iseebcn.com>
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Tested-by: Pau Pajuelo <ppajuel@gmail.com>
Convert IGEP board to use UBI volumes for U-Boot, its environment and
kernel. With exception of first four sectors read by SoC BootROM whole
NAND is UBI managed.
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Reviewed-by: Heiko Schocher<hs@denx.de>
Tested-by: Pau Pajuelo <ppajuel@gmail.com>
Rename igep0033 to igep003x as IGEP SMARC AM335x module (igep0034)
can use the same source files.
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Tested-by: Pau Pajuelo <ppajuel@gmail.com>
nand_spl_load_image implementation was copied over into three
different drivers and now with nand_spl_read_block used for
ubispl situation gets even worse. For now use least intrusive
solution and #include the same implementation to nand drivers.
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Tested-by: Pau Pajuelo <ppajuel@gmail.com>
am33xx does not support OneNAND, but we need this define anyway
to let UBI SPL code compile.
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Tested-by: Pau Pajuelo <ppajuel@gmail.com>
This patch removes:
- CONFIG_CMD_MEM: enabled by default
- CONFIG_DESIGNWARE_ETH : not being used anywhere.
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
cc: Christophe KERELLO <christophe.kerello@st.com>
This board support stm32f7 family device stm32f769-I with 2MB internal Flash &
512KB RAM.
STM32F769 lines offer the performance of the Cortex-M7 core (with double
precision floating point unit) running up to 216 MHz.
To compile for stm32f769 board, use same defconfig as stm32f746-disco,
the only difference is to pass "DEVICE_TREE=stm32f769-disco".
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
cc: Christophe KERELLO <christophe.kerello@st.com>
The number of pins to be configured could be more than 50 e.g. in case
of sdram controller, there are about 56 pins (32 data lines, 12 address
& some control signals).
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
cc: Christophe KERELLO <christophe.kerello@st.com>
Actually the sdram memory on stm32f746 discovery board is micron part
MT48LC_4M32_B2B5_6A. This patch does the modification required in the
device tree node & driver for the same.
Also we are passing here all the timing parameters in terms of clock
cycles, so no need to convert time(ns or ms) to cycles.
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
cc: Christophe KERELLO <christophe.kerello@st.com>
All discovery boards have one user button & one user LED. Here we are
just reading the button status & switching ON the user LED.
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
cc: Christophe KERELLO <christophe.kerello@st.com>
With this gpio driver supporting DM, there is no need to enable clocks
for different gpios (for pin muxing) in the board specific code.
Need to increase the allocatable area required before relocation from 0x400 to
0xC00 becuase of 10 new gpio devices(& new gpio class) added in device tree.
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
cc: Christophe KERELLO <christophe.kerello@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Also created alias for gpios for stm32f7 discovery board. Based on these
aliases, it would be possible to get gpio devices by sequence.
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
cc: Christophe KERELLO <christophe.kerello@st.com>
As driver model takes care of pin control configuraion, this patch also
removes the sdram/fmc pin configuration.
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
cc: Christophe KERELLO <christophe.kerello@st.com>
At present fdt blob or argument address being passed to kernel is fixed at
compile time using macro CONFIG_SYS_SPL_ARGS_ADDR. FDT blob from
different media like nand, nor flash are copied to the address pointed
by the macro.
The problem is, it makes args/fdt blob compulsory to copy which is not required
in cases like for NOR Flash. This patch removes this limitation.
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
Invoke enable_usb_clocks during board_usb_init and disable_usb_clocks
during board_usb_exit to enable and disable clocks respectively.
Modifications:
* Enable USB clocks in the OMAP version of the function
board_usb_init.
* Disable USB clocks in the OMAP version of the function
board_usb_cleanup.
Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Uri Mashiach <uri.mashiach@compulab.co.il>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
A weak version of the function board_usb_init is implemented in:
common/usb.c
drivers/usb/host/xhci-omap.c
To fix the double implementations:
* Convert the board_usb_init function in drivers/usb/host/xhci-omap.c
normal (not weak).
* The function board_usb_init in drivers/usb/host/xhci-omap.c calls to
the weak function omap_xhci_board_usb_init.
* Rename board version of the function board_usb_init to
omap_xhci_board_usb_init.
Done only for boards that defines CONFIG_USB_XHCI_OMAP.
To achieve the same flexibility with the function board_usb_cleanup:
* Add a normal (not weak) implementation of the function
board_usb_cleanup in drivers/usb/host/xhci-omap.c
* The function board_usb_cleanup in drivers/usb/host/xhci-omap.c calls
to the weak function omap_xhci_board_usb_cleanup.
* Rename board version of the function board_usb_cleanup to
omap_xhci_board_usb_cleanup.
Done only for boards that defines CONFIG_USB_XHCI_OMAP.
Cc: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Uri Mashiach <uri.mashiach@compulab.co.il>
Acked-by: Marek Vasut <marex@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Roger Quadros <rogerq@ti.com>
The logical expression to check the dtb is incorrect in
load_devicetree.
The problem was indicated by cppcheck.
The inconsistent variable name dtppart is changed to dtbpart.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Hannes Schmelzer <oe5hpm@oevsv.at>
Acked-by: Hannes Schmelzer <oe5hpm@oevsv.at>
The evaluation of option -c is incorrect:
According to the C99 standard endptr in the first strtol is always
set as &endptr is not NULL.
So the first part of the or condition is always true.
If all digits in optarg are valid endptr will point to the closing \0
and the second strtol will read beyond the end of the string optarg
points to.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com>
We should not first dereference p and afterwards assert that is
was not NULL. Instead do the assert first.
The problem was indicated by cppcheck.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
In dram_init_banksize there seems to be a typo concerning
a plausibility check of the fdt.
Testing sc > 2 twice does not make any sense.
The problem was indicated by cppcheck.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
A feature rich Linux kernel needs more than 8 MiB.
Hence enlarge CONFIG_SYS_BOOTM_LEN to 64 MiB for the GXBB systems.
As all known GXBB systems have at least 512 MiB of RAM this poses no problem.
Cc: Andreas Färber <afaerber@suse.de>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Banana Pi M2 Plus is an Allwinner H3-based SBC by Sinovoip, which has
already mainline device tree file that have landed into U-Boot source
tree.
Add a defconfig file for it and add the MAINTAINERS items.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
.probe method has been assigned twice when declaring
a driver with U_BOOT_DRIVER(). Removed one of them.
Here is the last commit which had the duplicate entry:
"spi: omap3: Convert to driver model"
(sha1: 77b8d04854)
Signed-off-by: Suniel Mahesh <suniel.spartan@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
setup_flash_device selects one of two code paths depending on the driver
model being used (=CONFIG_DM_SPI_FLASH). env_relocate_spec only used
the non driver-model code path. I'm unsure why, either none of the
platforms that need relocation use the driver model, or - worse - the
driver model is not yet usable when relocating.
Signed-off-by: Andreas Fenkart <afenkart@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@openedev.com>
This is not currently implemented. Add support for this so that the
Chrome OS EC can be used reliably.
Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com>
Acked-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Before using the cs_gpio, check if the GPIO is valid or not.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Banana Pi M2 Ultra has a SATA port connected to the internal SATA
controller of R40 SoC. The controller's 1.2v VDD is connected to ELDO3
and the 2.5v VDD is connected to DLDO4.
Enable these regulators as well as the SATA support of Banana Pi M2
Ultra, by adding needed config lines into its defconfig.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
R40 has a similar SATA controller with the ones on A10/A20, but with a
reset line added (like other peripherals on sun6i+), and two extra VDD
pins added (1.2v and 2.5v).
Add clock configuration of R40 SATA.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Mention eMMC and microSD as supported devices.
They have been enabled with patch
d0c5c8d529
odroid-c2: enable new Meson GX MMC driver in board defconfig
which was accepted for u-boot-mmc.git.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
To enable automatic booting from SD card or eMMC the MMC
devices 0, 1, and 2 are added to the BOOT_TARGET_DEVICES.
Booting from SD card, eMMC, and DHCP are tried in sequence.
A missing or failing device is gracefully handled.
Cc: Andreas Färber <afaerber@suse.de>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Tested-by: Vagrant Cascadian <vagrant@debian.org>
Reviewed-by: Andreas Färber <afaerber@suse.de>
Tested-by: Andreas Färber <afaerber@suse.de>
Add warp7_secure_defconfig entry to avoid the following warning:
WARNING: no maintainers for 'warp7_secure'
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
With 3f66149d9f we no longer have a common call fdt_fixup_ethernet.
This was fine to do on PowerPC as they largely had calls already in
ft_cpu_fixup. On ARM however we largely relied on this call. Rather
than introduce a large number of changes to ft_cpu_fixup /
ft_board_fixup we recognize that this is a common enough call that we
should be doing it in a central location. Do it early enough that we
can do any further updates in ft_cpu_fixup / ft_board_fixup.
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Chen-Yu Tsai <wens@csie.org>
Cc: Maxime Ripard <maxime.ripard@free-electrons.com>
Cc: Thomas Chou <thomas@wytron.com.tw> (maintainer:NIOS)
Cc: York Sun <york.sun@nxp.com> (maintainer:POWERPC MPC85XX)
Cc: Stefan Roese <sr@denx.de> (maintainer:POWERPC PPC4XX)
Cc: Simon Glass <sjg@chromium.org>
Cc: Joakim Tjernlund <Joakim.Tjernlund@infinera.com>
Fixes: 3f66149d9f ("Remove extra fdt_fixup_ethernet() call")
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Stefan Roese <sr@denx.de>
Acked-by: York Sun <york.sun@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This converts the following to Kconfig:
CONFIG_CMD_DIAG
Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: imply CMD_DIAG on some keymile configs]
Signed-off-by: Tom Rini <trini@konsulko.com>
This converts the following to Kconfig:
CONFIG_CMD_DEKBLOB
Note: This option does not seem to actually be enabled by any board.
Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: imply under SECURE_BOOT for mx5/6/7]
Signed-off-by: Tom Rini <trini@konsulko.com>
Rather than using CMD_CRAMFS for both the filesystem and its command, we
should have a separate option for each. This allows us to enable CRAMFS
support without the command, if desired, which reduces U-Boot's size
slightly.
Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: imply FS_CRAMFS for keymile]
Signed-off-by: Tom Rini <trini@konsulko.com>
This converts the following to Kconfig:
CONFIG_CMD_CRAMFS
Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: imply CMD_CRAMFS for keymile]
Signed-off-by: Tom Rini <trini@konsulko.com>
This converts the following to Kconfig:
CONFIG_CMD_CLK
Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: imply CMD_CLK on ARCH_ZYNQ]
Signed-off-by: Tom Rini <trini@konsulko.com>
Rather than using CMD_CBFS for both the filesystem and its command, we
should have a separate option for each. This allows us to enable CBFS
support without the command, if desired, which reduces U-Boot's size
slightly.
Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: imply FS_CBFS on SYS_COREBOOT]
Signed-off-by: Tom Rini <trini@konsulko.com>
This converts the following to Kconfig:
CONFIG_CMD_CBFS
Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: imply CMD_CBFS on SYS_COREBOOT]
Signed-off-by: Tom Rini <trini@konsulko.com>
This converts the following to Kconfig:
CONFIG_SYS_WHITE_ON_BLACK
Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: Make this default y on various SoCs]
Signed-off-by: Tom Rini <trini@konsulko.com>
This converts the following to Kconfig:
CONFIG_CMD_BMP
Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: Add depends on LCD || DM_VIDEO || VIDEO]
Signed-off-by: Tom Rini <trini@konsulko.com>
This converts the following to Kconfig:
CONFIG_CMD_BMODE
Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: Make this default y and depend on mx5/6/7]
Signed-off-by: Tom Rini <trini@konsulko.com>
This converts the following to Kconfig:
CONFIG_CMD_BLOB
Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: Add imply CMD_BLOB under CHAIN_OF_TRUST]
Signed-off-by: Tom Rini <trini@konsulko.com>
This converts the following to Kconfig:
CONFIG_CMD_AES
CONFIG_AES
Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: Add select AES to CMD_AES]
Signed-off-by: Tom Rini <trini@konsulko.com>
This is only used by one board and should not be a CONFIG option. Instead
it should use the driver model pmic framework. For now, just move the
setting into the only board that uses it.
Signed-off-by: Simon Glass <sjg@chromium.org>
A few boards had not been fully re-synced with CONFIG_ARCH_MX5 / CONFIG_MX51 /
CONFIG_MX53 being in Kconfig. Do so now.
Signed-off-by: Tom Rini <trini@konsulko.com>
This commits enable DM I2C support for A64/H3/H5 SoCs.
It is not enabled globaly for all sunxi SoCs, because some boards use
PMICs which are connected through I2C. In order to keep same
functionality, PMIC drivers needs to be ported to DM too.
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
This commit adds support for DM I2C on sunxi platform. It can coexist
with old style sunxi I2C driver, because it is still used in SPL and
by some SoCs.
Because sunxi platform doesn't yet support DM clk, reset and pinctrl
driver, workaround is needed to enable clocks and set resets and
pinctrls. This is done by calling i2c_init_board() in board_init().
This means that CONFIG_I2Cx_ENABLE options needs to be correctly set
in order to use needed I2C controller.
Commit is based on the previous patch made by Philipp Tomsich
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
This commit only moves i2c_init_board() function almost to the top and
doesn't have any functional changes.
This is needed for a temporary workaround in next commit when support
for DM I2C will be introduced.
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Driver for that regulator is used only in SPL and it uses old I2C
interface. If we want to use DM I2C in U-Boot proper, compilation of
this driver has to be limited only to SPL.
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
In file ext4fs.c funtion ext4fs_read_file() compares an
unsigned expression with < 0 like below
lbaint_t blknr;
blknr = read_allocated_block(&(node->inode), i);
if (blknr < 0)
return -1;
blknr is of type ulong/uint64_t. read_allocated_block() returns
long int. So comparing blknr with < 0 will always be false. Instead
declare blknr as long int.
Similarly ext4/dev.c does a similar comparison. Drop the redundant
comparison.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Update Keystone2 secure device configs under
"TI SYSTEM SECURITY". Without this buildman keeps complaining
about the status of these boards.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Andrew F. Davis <afd@ti.com>
On ARM v7M, the processor will return to ARM mode when executing
a blx instruction with bit 0 of the address == 0. Always set it
to 1 to stay in thumb mode.
Tested on STM32f746-disco board
Similar commit:
f99993c108
Author: Matt Porter <mporter@konsulko.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
In Linux, CONFIG_ARCH_OMAP2PLUS is used for OMAP2 or later SoCs.
Rename CONFIG_ARCH_OMAP2 to CONFIG_ARCH_OMAP2PLUS to follow this
naming.
Move the OMAP2+ board/SoC choice down to mach-omap2/Kconfig to slim
down the arch/arm/Kconfig level.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
CONFIG_CMD_FS_UUID was neither whitelisted, nor was it declared in
Kconfig.
Now it can be enabled in .config and defconfig as expected.
Signed-off-by: Josua Mayer <josua.mayer97@gmail.com>
Almost all TI defconfigs enable this already, add this as a default
and remove the explicit assignment.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Finally adding support for ARC boards in TravisCI.
To build for ARC boards we need to install Synopsys prebuilt toolchain
which we do here.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Tom Rini <trini@konsulko.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
As per the DM[1] Dated June 2016–Revised February 2017, Table 5-3,
DRA71 supports the following OPPs for various voltage domains:
VDD_MPU: OPP_NOM
VDD_CORE: OPP_NOM
VDD_GPU: OPP_NOM
VDD_DSPEVE: OPP_NOM, OPP_HIGH
VDD_IVA: OPP_NOM, OPP_HIGH
This patch add support for selection of the above OPPs instead of
using OPP_NOM for all voltage domains.
[1] http://www.ti.com/lit/ds/symlink/dra718.pdf
Reported-by: Vishal Mahaveer <vishalm@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
This originally started out as
"pinctrl: Kconfig: reorder to keep Rockchip options together"
and tried to keep the Rockchip-related config options together.
However, we now rewrite all chip-specific driver selections to start
with CONFIG_PINCTRL_ (with the inadvertent changes to related
Makefiles) and sort those alphabetically. And as this already means
touching most of the file, we also reformat the help text to not exceed
80 characters (but make full use of those 80 characters).
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Simon Glass <sjg@chromium.org>
An assignment (of a value to itself) was left over (after removing and
addition from the line) from moving the common padding code into
rkcommon_vrec_header.
This change removes this to avoid a spurious warning in static code
analysis (i.e. Coverity).
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reported-by: Coverity (CID: 161418)
Reviewed-by: Tom Rini <trini@konsulko.com>
There are more and more cases where if we do not use gcc-6.0 or later we
run into problems where our binaries are too large for the targets.
Given the prevalence of gcc-6.0 or later toolchains at this point in
time, we give notice now that starting with v2018.01 we will require
gcc-6 (or later) for ARM.
Signed-off-by: Tom Rini <trini@konsulko.com>
Unfortunately a test for the PWM uclass was not included when it was
submitted. This was noticed when trying to add more functionality:
http://patchwork.ozlabs.org/patch/748172/
Add a simple test to get us started.
Signed-off-by: Simon Glass <sjg@chromium.org>
Standardise U-Boot prompt on all keystone2 platforms
instead of platform specific prompt.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
The name of the gpio bank under DM_GPIO appear to be a copy-paste error.
This changes the name of the gpio bank from am33xx_gpios to omap34xx_gpios.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
The register names and offset were not correct as per the TRM for OMAP3530
and OMAP3630. Correct the naing and offsets per the documentation
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Remove option which depends on MMC controller which is disabled for dc2.
Savedefconfig is removing it because of new dependencies.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Fixes the following problem:
zynq-uboot> run dfu_ram
Setting bus to 1
g_dnl_register: failed!, error: -19
The cause appears to be that the USB framework is looking for a usbotg aliases,
so add the alias to point to our USB device.
Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
We used to have opencoded ehci_readl()/writel() which required no
external functions to be called.
Now with attempt to switch to generic readl()/writel() accessors
we see a missing declaration of those accessors in ehci-ppc4xx.
Something like that happens if applied
http://patchwork.ozlabs.org/patch/726714/:
---------------->8---------------
CC drivers/usb/host/ehci-ppc4xx.o
drivers/usb/host/ehci-ppc4xx.c: In function 'ehci_hcd_init':
drivers/usb/host/ehci-ppc4xx.c:23:3: warning: implicit declaration of function 'readl' [-Wimplicit-function-declaration]
HC_LENGTH(ehci_readl(&(*hccr)->cr_capbase)));
^
---------------->8---------------
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefan Roese <sr@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
For id = 15 an out of bound access occurs in udc_setup_ep().
Increase the size of epinfo[] from 30 to 32 to encompass
ids 0..15.
The problem was highlighted by cppcheck.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
We want to check the result of musb_init_controller
and not the address were the result is stored.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Add support for the Terasic DE10-Nano board. The board
is based on the DE0-Nano-Soc board but adds a larger FPGA
and an HDMI output.
Signed-off-by: Dalon Westergreen <dwesterg@gmail.com>
Reviewed-by: Dinh Nguyen <dinguyen@kernel.org>
Only A23/A33 in SUN8I want a default value of CONS_INDEX of 5, for other
chips the default value is 1 like other Allwinner SoCs.
Fix this default value.
The original wrong value has lead to wrong console on H3 Orange Pi
boards.
Fixes: 7095f86418 ("sunxi: Convert CONS_INDEX to Kconfig")
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Commit 088454cd dropped return value from initram(), setting
gd->ram_size directly. Three boards were missed for SPL boot.
Signed-off-by: York Sun <york.sun@nxp.com>
PSCI can be used on both multiple and single core socs. Current
implementation only allows PSCI to work on multiple core socs.
This patch removes this restriction so that PSCI can work on
single core socs as well.
Signed-off-by: Chenhui Zhao <chenhui.zhao@nxp.com>
Signed-off-by: Tang Yuantian <andy.tang@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
The PPA is a EL3 firmware, which support PSCI, hotplug,
power-management features etc.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
The PPA is a EL3 firmware, which support PSCI, hotplug,
power-management features etc.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Since commit ce412b7, RGMII TX clock internal delay is not enabled
for AR8033 unconditionally. On LS1021ATWR board, the third port
eTSEC3 uses AR8033 in RGMII mode. The TX/RX internal delay needs to
be enabled.
This patch will set PHY_INTERFACE_MODE_RGMII_ID to enable RGMII TX/RX
clock internal delay for AR8033 on the third port.
Signed-off-by: Alison Wang <alison.wang@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Currently $fdtfile is constructed from CONFIG_DEFAULT_TREE, containing
the filename. However on arm64 that file is located in an allwinner
subdirectory.
To avoid the need for users/distros symlinking the .dtb files, prepend
the vendor directory for ARM64.
This aligns Pine64 with other boards such as Raspberry Pi 3.
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Alexander Graf <agraf@suse.de>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Before this patch, CONFIG_SYS_BOOTPARAMS_LEN was the same size as
CONFIG_SYS_MALLOC_LEN. So, if malloc() had previously been called, and
initr_malloc_bootparams() was called, it would fail with an out-of-
memory error. This patch fixes this issue by expanding the malloc pool
to 256KB.
Signed-off-by: Kyle Edwards <kyleedwardsny@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
This fixes an issue with the saveenv command causing U-Boot to no
longer work on the QEMU Mips pseudoboard. Because the offset of the
environment was being determined by CONFIG_SYS_MONITOR_LEN, and this
value was less than the actual size of U-Boot, saveenv was overwriting
parts of the U-Boot code. Because CONFIG_SYS_MONITOR_LEN is no longer
used on MIPS, this patch removes it and places the environment at the
end of the pseudoboard's 4MB flash.
Signed-off-by: Kyle Edwards <kyleedwardsny@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Lichee Pi Zero is a development board with a V3s SoC, which features
64MiB DRAM co-packaged within the SoC, a TF slot, a SPI NOR slot (not
soldered in production batch), a 40-pin RGB LCD connector and some extra
pins available as 2.54mm pins or stamp holes.
Add support for it.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Basic U-Boot support is now present for V3s.
Some memory addresses are changed specially for V3s, as the original
address map cannot fit into a so small DRAM.
As the DRAM controller code needs a big refactor, the SPL support is
disabled in this version.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
- Use - instead of @ for OPP tables
- Add input-delay properties to Cadence eMMC nodes
- Restore full license text because code-diff is annoying
- Fix NAND compatible strings
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
The SCP (System Control Processor) or what we call STM (Stand-by
MPU) is integrated in LD4, Pro4, sLD8, LD6b, LD11, and LD20.
For these SoCs, show the information if STM is enabled.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
This configuration is supposed to be used with ARM Trusted Firmware,
so the SYSTEM_RESET is implemented in BL31. Invoke PSCI instead of
U-Boot's own reset code because we need to coordinate with SCP
(System Control Processor) for the system-level power management.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Video driver for older Allwinner SoCs uses cfb console framework which
in turn uses struct ctfb_res_modes to hold timing informations. However,
DM video framework uses different structure - struct display_timing.
It makes more sense to convert lcdc to use new timing structure because
all new drivers should use DM video framework and older drivers might be
rewritten to use new framework too.
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The Bananapi M2 Ultra is the first publicly available development board
featuring the R40 SoC.
This patch add barebone dtsi/dts files for the R40 and Bananapi M2 Ultra,
as well as a defconfig for it.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The R40's CPU controls are a combination of sun6i and sun7i.
All controls are in the CPUCFG block, and it seems the R40 does not
have a PRCM block. The core reset, power gating and clamp controls
are grouped like sun6i.
Last, the R40 does not have a secure SRAM block.
This patch adds a PSCI implementation for CPU bring-up and hotplug
for the R40.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Now that we can do DRAM initialization for the R40, we can enable
SPL support for it.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The R40 seems to have a variant of the memory controller found in
the H3 and A64 SoCs. Adapt the code for use on the R40. The changes
are based on released DRAM code and comparing register dumps from
boot0.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The PIO on the R40 SoC is mostly compatible with the A20.
Only a few pin functions for mmc2 were added to the PC
pingroup, to support 8 bit eMMCs.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
These values were taken from the Banana Pi M2 Ultra fex file
found in the released vendor BSP. This is the only publicly
available R40 device at the time of this writing.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
According to the BSP released by Banana Pi, the R40 (sun8iw11p1) has
an extra "PLL lock control" register in the CCU, which controls whether
the individual PLL lock status bits in each PLL's control register work
or not.
This patch enables it for all the PLLs.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The PIO is generally compatible with the A20, except that it routes the
full 8 bits and eMMC reset pins for mmc2.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The watchdog found on the R40 SoC is the older variant found on the A20.
Add the proper "#if defines" to make it work.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The R40 SoC uses the AXP221s in I2C mode to supply power.
Some regulator's common usages have changed, and also the recommended
voltage for existing usages have changed. Update the defaults to match.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The R40 is the successor to the A20. It is a hybrid of the A20, A33
and the H3.
The R40's PIO controller is compatible with the A20,
Reuse the A20 UART and I2C muxing code by adding the R40's macro.
The display pipeline is the newer DE 2.0 variant.
Block enabling video on R40 for now.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Currently we have some lines in board/sunxi/Kconfig that are very long.
These line either provide default values for a set of SoCs, or limit
some option to a subset of sunxi SoCs.
Fortunately Kconfig makes it easy to split them. The Kconfig language
document states
If multiple dependencies are defined, they are connected with '&&'.
This means we can split existing dependencies at "&&" symbols. This
applies to both the "depends on" lines and "if" expressions.
This patch splits them up to one symbol per line. This will make it
easier to add, remove, or modify one item at a time.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Convert the CONS_INDEX configuration to Kconfig.
Update sunxi's defconfigs to remove SYS_EXTRA_OPTIONS variable not
needed anymore.
Default value is 1 except for sun5i (equals 2) and sun8i (equals 5).
Signed-off-by: Mylène Josserand <mylene.josserand@free-electrons.com>
[Maxime: Added a depends on ARCH_SUNXI to avoid build breakages]
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Convert CONFIG_RGMII to Kconfig. Thanks to that, it is possible to
update defconfig files of SYS_EXTRA_OPTIONS accordingly and
remove it when it is possible.
Signed-off-by: Mylène Josserand <mylene.josserand@free-electrons.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Convert the SUNXI_EMAC config to Kconfig. Remove it from SYS_EXTRA_OPTIONS
from many sunxi defconfig and renamed it into SUN4I_EMAC to not confuse it
with SUN8I_EMAC.
Signed-off-by: Mylène Josserand <mylene.josserand@free-electrons.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The USB_EHCI configuration is already set in this defconfig
using kconfig's config. This configuration in SYS_EXTRA_OPTIONS
must be removed and so the SYS_EXTRA_OPTIONS.
Signed-off-by: Mylène Josserand <mylene.josserand@free-electrons.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Remove the AXP209_POWER option from SYS_EXTRA_OPTIONS.
As this configuration already exists on Kconfig, we just need
to remove it from defconfig.
Signed-off-by: Mylène Josserand <mylene.josserand@free-electrons.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
At present if the return to bootrom fails (e.g. because you are not using
the Rockchip's bootrom's pointer table in MMC) then the board prints
SPL message and hangs. Print a message first if we can, to help in
understanding what happened when it hangs.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Heiko Stuebner <heiko@sntech.de>
'A || (!A && B)' is equivalent to 'A || B'.
Let's reduce the complexity of the statement in start_jr0().
The problem was indicated by cppcheck.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: York Sun <york.sun@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
After allocating sata->cmd_hdr_tbl_offset we have to check
this variable and not variable sata.
The problem was indicated by cppcheck.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
(pdimm[0].data_width >= 32) || (pdimm[0].data_width <= 40)
is always true.
We should use && here.
The problem was indicated by cppcheck.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: York Sun <york.sun@nxp.com>
The number of arguments for printf does not match the
format string.
The problem was indicated by cppcheck.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
If current_urb is NULL it should not be dereferenced.
The problem was indicated by cppcheck.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
If !parent, the changed line is not reached.
So there is no need to check the value again.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
Each call of va_start must be matched by a call of va_end.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
Linaro provides a number of pre-built GCC toolchains for both 32 and
64bit ARM. Switch to their 2017.02 release of gcc-6.3.1 for both.
Cc: Koen Kooi <koen.kooi@linaro.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Many toolchains for ARM use the 'gnueabihf' suffix rather than just
'gnueabi', so allow these to be used, but with a lower priority than
'gnueabi' ones.
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
If the system is running PSCI firmware, the System Reset function
(func ID: 0x80000009) is supposed to be handled by PSCI, that is,
the SoC/board specific reset implementation should be moved to PSCI.
U-Boot should call the PSCI service according to the arm-smccc
manner.
The arm-smccc is supported on ARMv7 or later. Especially, ARMv8
generation SoCs are likely to run ARM Trusted Firmware BL31. In
this case, U-Boot is a non-secure world boot loader, so it should
not be able to reset the system directly.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Imports ARM SMC Calling Convention code from Linux 4.11-rc6.
The files have been copied as follows:
[Linux] [U-Boot]
arch/arm/kernel/smccc-call.S -> arch/arm/cpu/armv7/smccc-call.S
arch/arm64/kernel/smccc-call.S -> arch/arm/cpu/armv8/smccc-call.S
arch/arm/include/asm/opcodes* -> arch/arm/include/asm/opcodes*
include/linux/arm-smccc.h -> include/linux/arm-smccc.h
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Handle symlinks to files in the current directory. Other cases could be
handled with additional code, but this is a start.
Add explicit errors for absolute paths and links found in the middle of
a path (directories). Other cases like '..' or '.' will result with the
file not being found as when those path components are explicitly
provided.
Add a helper to decompress a null-terminated link name which is shared
with cramfs_list_inode.
Signed-off-by: Tyler Hall <tylerwhall@gmail.com>
Using a variably-sized type is incorrect here since we're reading a
fixed file format. Fixes cramfs on 64-bit platforms.
Signed-off-by: Tyler Hall <tylerwhall@gmail.com>
As with most other commands, this needs to factor in the sysmem offset
in the sandbox or it will try to dereference the simulated physical
address directly.
Signed-off-by: Tyler Hall <tylerwhall@gmail.com>
Avoid transfer parameter dev_id value with "-1" to .fec_get_hwaddr(),
it should transfer fec->dev_id to get mac address from fuse.
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Acked-by: Stefano Babic <sbabic@denx.de>
The MIB RAM and FIFO receive start register does not exist on
i.MX6ULL. Accessing these register will cause enet not work well or
cause system report fault.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Enable this command so we can get an approximate performance measurement.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
At present on a cold reboot we must reset the CPU to get it to full speed.
With 64-bit U-Boot this happens in SPL. At present we print the banner
before doing this, the end result being that we print the banner twice.
Print the banner a little later (after the CPU is ready) to avoid this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
The Intel CPU name can have leading spaces. Remove them since they are not
useful.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
A size_t variable can never be negative.
The problem was indicated by cppcheck.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
As board-specific reset logic, it needs to issue reset signal
via CPLD when issuing 'reset' command in u-boot, this patch
solves the issue of reset command not working on T1024RDB.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
For E6500 cores, L2 cache has been used as init_ram. L1 cache is a
write through cache on E6500.If lines are not locked in both L1 and
L2 caches, crashes are observed during secure boot. This patch locks/
unlocks both L1 and L2 cache to prevent the crash.
Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Current sysclk fixing would fix all clocks with 'fixed-clock' compatible.
This patch is to fix sysclk by path to avoid any incorrect fixing.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Number of TZASC instances may vary across NXP SoCs.
So put TZASC configuration under instance specific defines.
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
- Add SD secure boot target for ls1046ardb.
- Change the u-boot size defined by a macro for copying the main
U-Boot by SPL to also include the u-boot Secure Boot header size
as header is appended to u-boot image. So header will also be
copied from SD to DDR.
- CONFIG_MAX_SPL_SIZE is limited to 90KB. SPL is copied to OCRAM
(128K) where 32K are reserved for use by boot ROM and 6K for the
header.
- Reduce the size of CAAM driver for SPL Blobification functions
and descriptors, that are not required at the time of SPL are
disabled. Further error code conversion to strings is disabled
for SPL build.
Signed-off-by: Vinitha Pillai <vinitha.pillai@nxp.com>
Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Add NAND secure boot target for ls1043ardb.
- Change the u-boot size defined by a macro for copying the main
U-Boot by SPL to also include the u-boot Secure Boot header size as
header is appended to u-boot image. So header will also be copied
from SD to DDR.
- MACRO for CONFIG_BOOTSCRIPT_COPY_RAM is enabled to copy Bootscript
from NAND to DDR. Offsets for Bootscript on NAND and DDR have been
also defined.
Signed-off-by: Vinitha Pillai <vinitha.pillai@nxp.com>
Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
- Add SD secure boot target for ls1043ardb.
- Implement FSL_LSCH2 specific spl_board_init() to setup CAAM stream
ID and corresponding stream ID in SMMU.
- Change the u-boot size defined by a macro for copying the main
U-Boot by SPL to also include the u-boot Secure Boot header size as
header is appended to u-boot image. So header will also be copied
from SD to DDR.
- CONFIG_MAX_SPL_SIZE is limited to 90KB. SPL is copied to OCRAM
(128K) where 32K are reserved for use by boot ROM and 6K for secure
boto header.
- Error messages during SPL boot are limited to error code numbers
instead of strings to reduce the size of SPL image.
Signed-off-by: Vinitha Pillai-B57223 <vinitha.pillai@nxp.com>
Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Define bootscript and its header addresses for QSPI target
Also add PPA header address in Kconfig
Signed-off-by: Vinitha Pillai <vinitha.pillai@nxp.com>
Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Using changes in this patch we were able to reduce approx 4k
size of u-boot-spl.bin image. Following is breif description of
changes to reduce SPL size:
1. Changes in board/freescale/ls1046ardb/Makefile to remove
compilation of eth.c and cpld.c in case of SPL build.
2. Changes in board/freescale/ls1046ardb/ls1046ardb.c to keep
only ddr_init and board_early_init_f funcations in case of SPL
build.
3. Changes in ls1046a_common.h & ls1046ardb.h to remove driver
specific macros due to which static data was being compiled in
case of SPL build.
4. Disable MMC driver from bieng compiled in case of SPL NAND
build and NAND driver from bieng compiled in case of SPL MMC build.
Signed-off-by: Vinitha Pillai <vinitha.pillai@nxp.com>
Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Using changes in this patch we were able to reduce approx 10k
size of u-boot-spl.bin image. Following is breif description of
changes to reduce SPL size:
1. Changes in board/freescale/ls1043ardb/Makefile to remove
compilation of eth.c and cpld.c in case of SPL build.
2. Changes in board/freescale/ls1043ardb/ls1043ardb.c to keep
only ddr_init and board_early_init_f funcations in case of SPL
build.
3. Changes in ls1043a_common.h & ls1043ardb.h to remove driver
specific macros due to which static data was being compiled in
case of SPL build.
4. Disable MMC driver from bieng compiled in case of SPL NAND
build and NAND driver from bieng compiled in case of SPL MMC build.
5. Remove I2C driver support from SPL in case of LS1043ARDB.
Signed-off-by: Vinitha Pillai <vinitha.pillai@nxp.com>
Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Depending on DDR configuration, gcc-6.x will show up unused-const-
variable messages. Use __maybe_unused specifier for all dynamic_odt
variable definitions to remove these warnings.
Memory footprint will not increase as gcc will optimize out unused
constants.
Signed-off-by: Thomas Schaefer <thomas.schaefer@kontron.com>
Signed-off-by: York Sun <york.sun@nxp.com>
2017-04-17 09:03:30 -07:00
7653 changed files with 408799 additions and 305601 deletions
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