Add myself as co-maintainer for U-Boot SPI NOR subsystem.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
[jagan: drop mtd/spi file from SPI entry]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Now that new SPI NOR layer uses stateless 4 byte opcodes by default,
don't enable SPI_FLASH_BAR. For SPI controllers that cannot support
4-byte addressing, (stm32_qspi.c, fsl_qspi.c, mtk_qspi.c, ich.c,
renesas_rpc_spi.c) add an imply clause to enable SPI_FLASH_BAR so as to
not break functionality.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Tested-by: Stefan Roese <sr@denx.de>
Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
SF_DUAL_FLASH claims to enable support for SF_DUAL_STACKED_FLASH and
SF_DUAL_PARALLEL_FLASH. But, in current U-Boot code, grepping for above
enums yield no user and therefore support seems to be incomplete. Remove
these configs so as to avoid confusion.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
SPL only needs to be able to read from SPI Flash to load next stage and
does not really need write/erase etc. Therefore in order to reduce SPI
Flash code size in SPL, enable SPI_FLASH_TINY, that only supports
reading from SPI flash, as default.
Note: Since, SPI_FLASH_TINY does not support SPI_FLASH_BAR,
SPI_FLASH_TINY is not enabled for boards with SPI controllers that
cannot support 4 byte addressing.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
Add a tiny SPI flash stack that just supports reading data/images from
SPI flash. This is useful for boards that have SPL size constraints and
would need to use SPI flash framework just to read images/data from
flash. There is approximately 1.5 to 2KB savings with this.
Based on prior work of reducing spi flash id table by
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Signed-off-by: Vignesh R <vigneshr@ti.com>
Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Tested-by: Stefan Roese <sr@denx.de>
Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
For legacy reasons, we will have to keep around U-Boot specific
SPI_FLASH_BAR and SPI_TX_BYTE. Add them back to the new framework
Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
Sync changes from Linux SPI NOR framework to add 4 byte addressing
support. This is required in order to support flashes like MT35x
that no longer support legacy Bank Address Register(BAR) way of accessing
>16MB region.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Tested-by: Stefan Roese <sr@denx.de>
Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
Many SPI controllers have special MMIO interfaces which provide
accelerated read/write access but require knowledge of flash parameters
to make use of it. Recent spi-mem layer provides a way to support such
controllers.
Therefore, add spi-mem support to spi-nor-core as a way to support SPI
controllers with MMIO interface. SPI MEM layer takes care of translating
spi_mem_ops to spi_xfer()s in case of legacy SPI controllers.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Tested-by: Stefan Roese <sr@denx.de>
Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
Current U-Boot SPI NOR support (sf layer) is quite outdated as it does not
support 4 byte addressing opcodes, SFDP table parsing and different types of
quad mode enable sequences. Many newer flashes no longer support BANK
registers used by sf layer to a access >16MB of flash address space.
So, sync SPI NOR framework from Linux v4.19 that supports all the
above features. Start with basic sync up that brings in basic framework
subsequent commits will bring in more features.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Tested-by: Stefan Roese <sr@denx.de>
Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
It is necessary to call spi_claim_bus() before starting any SPI
transactions and this restriction would also apply when calling spi-mem
operations. Therefore claim and release bus before requesting transfer
via exec_op.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Tested-by: Stefan Roese <sr@denx.de>
Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
In arch/sandbox/include/asm/types.h we have
Therefore for 32 bit Sandbox build BITS_PER_LONG turns out to be 32 as
CONFIG_PHYS64 is not set
This messes up the current logic of GENMASK macro due to mismatch b/w
size of unsigned long (64 bit) and that of BITS_PER_LONG.
Fix this by using CONFIG_SANDBOX_BITS_PER_LONG which is set to 64/32
based on the host machine on which its being compiled.
Without this patch:
GENMASK(14,0) => 0x7fffffffffff
After this patch:
GENMASK(14,0) => 0x7fff
Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
commit fdce9d35dc ("arm: dts: am33xx: Sync dts with Linux 4.20.0")
did remove the "u-boot,dm-spl" flag from the 'ocp' bus which was
introduced with
commit 19aa4ac09d ("dts: am33xx: add u-boot, dm-spl to ocp bus")
Due to this all boards having CONFIG_SPL_OF_CONTROL enabled are broken
because they cannot bind/probe the boot-media interface during SPL
stage.
This commit introduces the 'am33xx-u-boot.dtsi' which is included with
the auto include mechanism. The am33xx-u-boot-dtsi adds the important
"u-boot,dm-pre-reloc" to the 'ocp bus' (the root bus of almost all
peripherals, at least the bootable ones).
The peripherials (mmc, spi, ...) needed during SPL stage need to be
equipped with the 'u-boot,dm-pre-reloc' in their responsible dts file.
Signed-off-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
- Move Armada XP / 38x PCIe driver to DM_PCI from me
- Move Armada XP / 38x LCD driver to DM_VIDEO from me
- Add uDPU board (Armada-3720) from Vladimir
[trini: Fix warning in pci-uclass.c by removing ret from
pci_uclass_child_post_bind as it no longer calls functions with
a return code to catch.]
Signed-off-by: Tom Rini <trini@konsulko.com>II
With the new DM_VIDEO support in the Armada XP LCD driver, this patch
adds the needed DT node for the LCD controller to the theadorable dts
file. This DT property is not added to the Armada XP dtsi files, as this
LCD feature is pretty unusual for this SoC and I personally know of no
other board that uses this controller.
This patch also enables CONFIG_BMP_16BPP/24BPP/32BPP, as the "old" bmp
command supported these BMP files.
Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Acked-by: Anatolij Gustschin <agust@denx.de>
This patch moves the Armada XP video / LCD driver to DM_VIDEO. With this
move, the legacy interface board_video_init() is removed from the
theadorable board code (only user of this video driver). The support
via DT will be added in a separate patch.
This patch also enables DM_VIDEO for the theadorable board, as this is
needed to not break git bisect'ability.
Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Acked-by: Anatolij Gustschin <agust@denx.de>
This adds initial support for micro-DPU (uDPU) board which is based on Armada-3720 SoC.
micro-DPU is the single-port FTTdp "distribution point unit" made by Methode Electronics
which offers complete modularity with replaceable SFP modules both for uplink and downlink
(G.hn over twisted-pair, G.hn over coax, 1G and 2.5G Ethernet over Cat-5e cable).
On-board features:
- 512 MiB DDR3
- 2 x 2.5G SFP via HSGMII SERDES interface to the A3720 SoC
- USB 2.0 Type-C connector
- 4GB eMMC
- ETSI TS 101548 reverse powering via twisted pair (RJ45) or coax (F Type)
Cc: Luka Perkov <luka.perkov@sartura.hr>
Cc: Luis Torres <luis.torres@methode.com>
Cc: Scott Roberts <scott.roberts@telus.com>
Cc: Paul Arola <paul.arola@telus.com>
Signed-off-by: Vladimir Vid <vladimir.vid@sartura.hr>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds DM_PCI support to the MVEBU PCIe driver. This is
necessary, since all PCI drivers have to be moved to DM (driver model)
until the v2019.07 release.
To not break git bisect'ablility, this patch also moves CONFIG_PCI_MVEBU
from config headers to the defconfig files.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Dirk Eibach <dirk.eibach@gdsys.cc>
Cc: Mario Six <mario.six@gdsys.cc>
Cc: Chris Packham <chris.packham@alliedtelesis.co.nz>
Cc: Phil Sutter <phil@nwl.cc>
Cc: Marek Behún <marek.behun@nic.cz>
Cc: VlaoMao <vlaomao@gmail.com>
This function will be used by the Marvell Armada XP/38x PCIe driver,
which is moved to DM right now. So let's extract the functionality
from pci_uclass_child_post_bind() to make it available.
Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
u-boot-rockchip changes for 2019.04-rc1:
* support for Chromebook Bob
* full pinctrl driver using DTS properties
* documentation improvements
* I2S support for some Rockchip SoCs
- Various TI platforms have been updated and DTS files re-synced and
options disabled if not used or migrated to the DM versions
- Improvements to the dumpimage tool
- Rename SPL FAT/EXT filesystem support symbols for consistency and then
allow them to be used to save more space in SPL.
- More lmb fixes
- Partial migration of CONFIG_BUILD_TARGET
This adds one test case that checks that allocation with multiple
DRAM banks works correctly.
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This fixes the automatic lmb initialization and reservation for boards
with more than one DRAM bank.
This fixes the CVE-2018-18439 and -18440 fixes that only allowed to load
files into the firs DRAM bank from fs and via tftp.
Found-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Tested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Help message isn't clear over the use of the "-T" option (it's to declare
the type of image that the tool is operating on), which also is optional
as it defaults to the default image type. It's also missing a description
of the "-o" option, so add it.
Signed-off-by: Martyn Welch <martyn.welch@collabora.com>
The utility dumpimage has error paths that display the usage and others
that exit without displaying usage. Add an explicit help option to
dumpimage to display the usage and remove it's use in error paths to make
the error messages more obvious and errors paths more consistent.
Signed-off-by: Martyn Welch <martyn.welch@collabora.com>
There are 3 supported modes of operation:
1) Show version
2) List image contents
3) Extract image component
Option (1) terminates early, so only options (2) and (3) remain. Remove
redundant check for these modes.
Signed-off-by: Martyn Welch <martyn.welch@collabora.com>
The dump image utility has very confusing syntax. If called to list image
contents ("-l") it takes the image name as a positional argument. If the
utility is called to extract something from the image, the image must be
provided via the optional argument "-i" as well as the positional argument
but the value passed in the positional argument will be completely
ignored.
Simplify dumpimage by always providing the image as the first positional
argument. Assume we want to dump something from the image if we do not
provide the "-l" option for now.
Signed-off-by: Martyn Welch <martyn.welch@collabora.com>
The dumpimage utility errors out in a number of places without providing
sufficient feedback to allow the user to easily determine what they have
done wrong. Add addtional error messages to make the cause of the failure
more obvious.
Signed-off-by: Martyn Welch <martyn.welch@collabora.com>
The OMAP36 and DM37 TRM state to disable extneded drain IO before
changing the PBIAS. This patch does this before pmic writes if
the CONFIG_MMC_OMAP36XX_PINS flag is set and the cpu family is
omap36xx
Signed-off-by: Adam Ford <aford173@gmail.com>
With the latest changes to add support for the Chromebook Bob,
initialisation through debug_uart_init() did no longer get called for
other targets.
Fix this, by moving debug_uart_init() out of the Bob-specific
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
As we're working on the next update of our ATF (and U-Boot and the ATF
are out-of-sync), let's temporarily enable SPL_ATF_NO_PLATFORM_PARAM to
reduce compatibility issues.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
After the merge of the new, generic pinctrl-code, the include for
rockchip/Kconfig was missing. Add it here, so we can select the
pinctrl-driver for SPL.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
To make adding new subdirectories easier, let's enforce alphabetical
ordering of the includes of Kconfig files in the respective
subdirectories.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
This adds a MAINTAINER entry for chromebook_speedy.
Without this, we get the following warnings from the maintainers
check:
WARNING: no status info for 'chromebook_minnie'
WARNING: no maintainers for 'chromebook_minnie'
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Bob is a 10-inch chromebook produced by Asus. It has two USB 3.0 type-C
ports, 4GB of SDRAM, WiFi and a 1280x800 display. It uses its USB ports
for both power and external display. It includes a Chrome OS EC
(Cortex-M3) to provide access to the keyboard and battery functions.
Support so far includes only:
- UART
- SDRAM
- MMC, SD card
- Cros EC (but not keyboard)
Not included:
- Keyboard
- Display
- Sound
- USB
- TPM
Bob is quite similar to Kevin, the Samsung Chromebook Plus, but support
for this is not provided in this series.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Add some U-Boot-specific settings. These should really go in the
*u-boot.dtsi file, but it seems that rk3399 does not use that yet.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Allow rockchip boards to use GPIOs before driver model is ready. This is
really only useful for setting GPIOs to enable the early debug console, if
needed on some platforms.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
At present this enum is only available to rk3288. Move it so that other
rockchip SoCs can access it. It is needed for the SPL GPIO driver for
rk3999 in a later patch.
Also adjust the enum name to lower case.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Some boards use different stdio environment variables from the default.
Provide a #define for this which can be set before including the header
file.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
The u-boot,spl-boot-device property only allows MMC at present. Add SPI as
well for boards that boot from SPI flash.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Add mention of a prerequisite needed to build the image. Also adjust the
English wording in a few places.
Ideally this should move to using binman to produce images, and avoid the
manual steps.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
This file has changed upstream, with some additions and changes. Move the
U-Boot version towards this.
Some USB changes seem to be incompatible with how the bindings work on
rockchip in U-Boot. Testing is needed to make sure that USB still works
correct, and adjust the code (not device tree) if not.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
At present some Rockchip SoCs and boards are not mentioned in the README.
So that people can see which SoCs are supported, expand the list to
include everything.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
In space-constrained environments or before driver model is available, it
is sometimes necessary to set GPIO values. Add an SPL API for this, to
allow early board code to change GPIOs. The caller must provide the
register address, so that the drivers can be fairly generic.
This API can be implemented by GPIO drivers, behind a suitable guard,
like #ifdef CONFIG_SPL_BUILD.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
At present this file uses GPIO_OUTPUT and GPIO_INPUT as its sub-command
values. These are pretty generic names. Add a 'C' suffix to avoid possible
conflicts.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
It is helpful to print the clock number as well as the index, so that this
can be looked up in the binding file. Update the debug() statement to do
this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
At present this function uses printf() format strings that are not
supported in SPL, so the output just consists of %llx strings on 64-bit.
machines. Fix this by adding a special case.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
This adds support for the ASUS C201, a RK3288-based clamshell
device. The device tree comes from linus's linux tree at
3f16503b7d2274ac8cbab11163047ac0b4c66cfe. The SDRAM parameters
are for 4GB Samsung LPDDR3, decoded from coreboot's
src/mainboard/google/veyron/sdram_inf/sdram-lpddr3-samsung-4GB.inc
Signed-off-by: Marty E. Plummer <hanetzer@startmail.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
This function causes a 5-second delay and stops the display working on
minnie. This code should be in a driver and should only be enabled by
a device-tree property, so that it does not affect devices which do not
have this feature.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Jerry uses a max98090 audio codec and the internal SoC I2S peripheral.
Enable sound support and add the required device-tree pieces.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Add a sound driver for rk3288 supporting chromebook_jerry. This uses the
I2S driver, and existing audio codec and the clock/pinmux support.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Add a driver for I2S which allows audio data to be sent from the SoC to
the audio codec. The sample rate and other settings are hard-coded for now
as there is no suitable device-tree binding available.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Add support for setting pinctrl and clock for I2S on rk3288. This allows
the sound driver to operate. These settings were created by rkmux.py
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Although not required, it doesn't hurt to explicitly map the USB ports to
a USB controller. Without this, the port number will be derived from the
binding order of the peripheral devices.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
CONFIG_SPL_FS_EXT4 can be used to include/exclude the FS EXT4 from
SPL build. Excluding the FS EXT4 from SPL build can help to save 20KiB
memory.
Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Replace CONFIG_SPL_EXT_SUPPORT to CONFIG_SPLY_FS_EXT4 so both
obj-$(CONFIG_$(SPL_)FS_EXT4) and CONFIG_IS_ENABLED(FS_EXT4) can be
used to control the build in both SPL and U-Boot.
Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Most of the time SPL only needs very simple FAT reading, so having
CONFIG_IS_ENABLED(FAT_WRITE) to exclude it from SPL build would help
to save 64KiB default max clustersize from memory.
Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Replace CONFIG_SPL_FAT_SUPPORT with CONFIG_SPL_FS_FAT so
obj-$(CONFIG_$(SPL_)FS_FAT) can be used to control the build in both
SPL and U-Boot.
Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
This feature is now supported by the main config for am335x_evm:
am335x_evm_defconfig
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
The AM335x ROM boot is able to download the SPL from a RNDIS connection
on USB0. To enable a full RNDIS boot flow (romboot -> SPL -> u-boot -> ..),
we can use USB_ETHER in SPL and u-boot.
However this increase the size of the SPL past its limit. So removing the
unused SPL_EXT_SUPPORT.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
This USB port is mainly used for RNDIS and DFU. To be able to use it with
DM_USB and DM_USB_GADGET, we need to provide a dr_mode value in the DTS.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
If the host does not respond in time, the initialization fails. However
the usb ether driver will still be registered. This will make
usb_gadget_probe_driver() fail the next time the initialization is
attempted because it cannot find an available UDC.
Fixing this by calling _usb_eth_halt() when the init fails.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Acked-by: Lukasz Majewski <lukma@denx.de>
port the am335x based shc board to DM, to get rid
of DW warnings when compiling U-Boot.
- remove uneccessary board code
- adapt defconfigs
- remove unneeded defconfigs
configs/am335x_shc_prompt_defconfig
configs/am335x_shc_sdboot_prompt_defconfig
Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
add u-boot specific am335x-shc-u-boot.dtsi file,
in which we add u-boot specific adaptions.
Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
add DTS from linux tree commit
"47bfa6d9dc8c060bf56554a465c9031e286d2f80"
change for U-Boot:
switch to SPDX-license identifier.
Signed-off-by: Heiko Schocher <hs@denx.de>
This functions can be reused by other MSCC SoCs therefore,
make them more generic and move them in separate files.
Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Move file ocelot_switch to mscc_eswitch to prepare to add
new net drivers for other MSCC SoCs.
Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Testing has shown that the timer on the MT7688 platforms does not run
correctly (too fast timeout). This patch changes
CONFIG_SYS_MIPS_TIMER_FREQ from 200MHz to 290MHz which is the correct
value, as its also used in Linux.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
When power cycle the Jaguar2 boards, it couldn't read the
phys, therefore it always deduce that the board type is
pcb111.
Add a small delay after setting the gpio pins, fix the
issue.
Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
- Add features and fixups to support video on Amlogic GX SoCs
- Add video support for Amlogic GX SoC
- Add DT fixups
- Enable Video and USB Console for libretech-cc board
libretech-cc being the main device tested with CONFIG_VIDEO_MESON, let's
enable it by default.
Also enable:
- CONFIG_SYS_WHITE_ON_BLACK for prettiness
- CONFIG_VIDEO_DT_SIMPLEFB for framebuffer sharing with kernel
Signed-off-by: Maxime Jourdan <mjourdan@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
With the recent addition of the meson VPU driver, enable the following
config entries by default for meson-64 targets: CONFIG_CONSOLE_MUX,
CONFIG_SYS_CONSOLE_IS_IN_ENV.
This allows outputting the console via video if CONFIG_VIDEO_MESON is
selected.
Signed-off-by: Maxime Jourdan <mjourdan@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Allows displaying the console via video and using a USB keyboard.
Also enables CONFIG_SPLASH_SCREEN if using video.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Maxime Jourdan <mjourdan@baylibre.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
If VIDEO_MESON is enabled, we need to setup the fdt for the framebuffer.
Call meson_vpu_rsv_fb() which reserves the framebuffer memory region for
EFI, and sets up simple-framebuffer nodes if simplefb support is
enabled.
Signed-off-by: Maxime Jourdan <mjourdan@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
There's no reliable way to reuse the hhi entry from the vpu as is done
in the linux kernel, so we duplicate it here.
We will be able to sync against kernel DTS in the future when the VPU
gets based on the clock framework rather than the HHI reg.
Signed-off-by: Maxime Jourdan <mjourdan@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
The hdmi_5v regulator must be enabled to provide power to the physical HDMI
PHY and enables the HDMI 5V presence loopback for the monitor.
Fixes: b409f625a6d5 ("ARM64: dts: meson-gx: Add HDMI_5V regulator on selected boards")
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
[backport of linux commit e1f2163deac059ad39f07aba9e314ebe605d5a7a]
This adds video output support for Amlogic GXBB/GXL/GXM chips.
The supported ports are CVBS and HDMI (based on DW_HDMI).
When using HDMI, only DMT modes are supported.
There is support for simple-framebuffer (CONFIG_VIDEO_DT_SIMPLEFB)
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Jorge Ramire-Ortiz <jramirez@baylibre.com>
Signed-off-by: Maxime Jourdan <mjourdan@baylibre.com>
[narmstrong: fixed defines alignment in meson_canvas.c]
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Some IPs like the meson VPU can only feed a particular pixel format to
dw_hdmi. As of now, the driver is hardcoded to use RGB888 as input.
This commit enables different pixel format inputs, with the appropriate
CSC configuration.
Signed-off-by: Jorge Ramire-Ortiz <jramirez@baylibre.com>
Signed-off-by: Maxime Jourdan <mjourdan@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Some IPs like the meson VPU have a specific way to write to dw_hdmi
registers. Make it configurable.
Signed-off-by: Jorge Ramirez-Ortiz <jramirez@baylibre.com>
[added commit description]
Signed-off-by: Maxime Jourdan <mjourdan@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
If `make mrproper` does not delete the generated drivers/video/fonts/*.S
files a following `make tests` fails.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
This unbreaks dfu mmc_file_op which is currently broken since using the
load cmd on a buffer from heap is not allowed - added with
commit aa3c609e2b ("fs: prevent overwriting reserved memory")
Fixes: commit aa3c609e2b ("fs: prevent overwriting reserved memory")
Reported-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Lukasz Majewski <lukma@denx.de>
Enable DM_MMC for all Allwinner SoCs, this will eventually
enable BLK.
Also removed DM_MMC enablement in few parts of sunxi
configurations.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Like other Allwinner A64 boards, pinebook also need altering
auto-numbering of mmc2 to mmc1 which is available in common
sunxi dsti file, sunxi-u-boot.dtsi
Pinebook has a separate sun50i-a64-pinebook-u-boot.dtsi which
takes more precedence for u-boot.dtsi inclusion and it eventually
failed to include the sunxi-u-boot.dtsi.
So, this patch add support to include the sunxi-u-boot.dtsi in the
sun50i-a64-pinebook-u-boot.dtsi
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Vasily Khoruzhick <anarsoul@gmail.com> # Pinebook
Environment and fastboot mmc devices are configured based on the number
of mmc slots defined on particular board configs, MMC_SUNXI_SLOT_EXTRA.
If MMC_SUNXI_SLOT_EXTRA is more than 1, the default env and fastboot
mmc devices is mmc1 by assuming mmc0 is SD and mmc1 is emmc device.
But with DM_MMC the mmc devices are numbered as per the dts node
enablement. If there is a chance of having enabling all mmc nodes
in dts say mmc0, mmc1, mmc2 then the default env and fastboot devices
will failed to assign proper emmc device since mmc2 is emmc in most
of the Allwinner platforms.
So, we need to alter the auto-numbering by aliasing mmc2 to mmc1 since
aliases take precedence over auto-numbering.
If the dts enables mmc0, mmc1, mmc2, then all the nodes will probe
sequentially and auto-numbered as it is. but when aliases mmc1 with mmc2
the resulting number should be that mmc0 is till mmc0, mmc2 become mmc1
and mmc2 become mmc1
Without aliases of mmc1 = &mmc2;
-------------------------------
MMC: mmc@1c0f000: 0, mmc@1c10000: 1, mmc@1c11000: 2
With aliases of mmc1 = &mmc2;
----------------------------
MMC: Device 'mmc@1c11000': seq 1 is in use by 'mmc@1c10000'
mmc@1c0f000: 0, mmc@1c10000: 2, mmc@1c11000: 1
Loading Environment from FAT... OK
Some platforms like A20 has mmc0...mmc3, but there is no usecases now
for enabling all mmc controllers in any of A20 board dts files.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Some Allwinner clock devices have parent clocks and reset gates itself,
which need to be activated for them to work.
Add some code to just assert all resets and enable all clocks given.
This should enable the A80 MMC config clock, which requires both to be
activated. The full CCU devices typically don't require resets, and have
just fixed clocks as their parents. Since we treat both as optional and
enabling fixed clocks is a NOP, this works for all cases, without the need
to differentiate between those clock types.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Jagan Teki <jagan@openedev.com>
If a board DT describes a cd-gpios property, but also marks the storage
as non-removable, we must ignore the GPIO (as Linux does).
Teach the DM_MMC part of the Allwinner MMC driver about the
non-removable DT property, to fix DM_MMC access on the SoPine and
Pine64-LTS board.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Jagan Teki <jagan@openedev.com>
Enabling DM_MMC skips the call to mmc_pinmux_setup() in board.c, as this
is supposed to be handled by the MMC driver, using DT information.
However we don't have a pinctrl driver yet, but would still like to keep
the working pinmux setup for our MMC devices. So bring this particular
call back to the DM_MMC code flow.
When booting from either SD card or eMMC, the SPL does the setup for us,
but when booting from SPI or USB we must not skip this part.
Fixes, boot via FEL or SPI flash, where the SPL won't setup the pinmux
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Jagan Teki <jagan@openedev.com>
[jagan: add Fix details on commit message]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Now that we have the gate clocks and the reset gates in our new
Allwinner clock driver, let's make use of them in the MMC driver, when
DM_MMC is defined.
We treat the reset device as optional now, as the older SoCs don't
implement it.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset.
Connect that with the respective compatible string.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
The A80 handles resets and clock gates for the MMC devices differently,
outside of the CCU IP block. Consequently we have a separate clock
device with a separate binding for that.
Implement that with the respective clock gates and resets to allow the
A80 taking part in the DM_MMC game.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
[jagan: fix a80 mmc clock config compatible]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Add the MMC clock gates and reset bits for all the Allwinner SoCs.
This allows them to be used by the MMC driver.
We don't advertise the mod clock yet, as this is still handled by the
MMC driver.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
[jagan: add V3S, A80 gates/resets]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Enable USB host controllers for Amarula A64-Relic board,
the respective nodes are already present in DTS.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Update generation of spl binaries
- continue to generate all SPL files in spl sub-directory
- copy in root folder the needed file for user (YOCTO, buildroot):
u-boot-spl.stm32
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Adding pinconf support is necessary to enable boot from SPI
without breaking the eMMC. When booting from SPI, the ROM code
leave pull downs on the eMMC pad.
We need to set pinconf provided in DT to solve this
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
[narmstrong: added missing comma in pinctrl-meson-axg-pmx.c]
The ihs_video_out driver's error handling is incorrect in two places
(one is a missing negation, and in one place a error should be ignored).
Fix these two instances.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Current EDID detailed timing parser errors out when either
horizontal or vertical pulse sync width is 0, thus not
allowing a display with EDID listed below work properly.
EDID below works ok within Linux although it warns about
these two fields being 0. Therefore relax the checks a bit
so we can actually use this the screen out of the box.
Of-course, this display itself is somewhat quirky display with
following anti-features:
- HPD pin is not usable
- although resolution is 640x480, only top 240 pixels are visible
$ xxd -p display.edid
00ffffffffffff0005a1e00301000000150f0103800f05780a0f6ea05748
9a2610474f200000010101010101010101010101010101012a08804520e0
0b1020004000953600000018000000fd0034441a2403000a202020202020
0000001000310a20202020202020202020200000001000002a4030701300
782d1100001e006b
$ edid-decode display.edid
EDID version: 1.3
Manufacturer: AMA Model 3e0 Serial Number 1
Digital display
Maximum image size: 15 cm x 5 cm
Gamma: 2.20
RGB color display
First detailed timing is preferred timing
Display x,y Chromaticity:
Red: 0.6250, 0.3398
Green: 0.2841, 0.6044
Blue: 0.1494, 0.0644
White: 0.2802, 0.3105
Established timings supported:
640x480@60Hz 4:3 HorFreq: 31469 Hz Clock: 25.175 MHz
Standard timings supported:
Detailed mode: Clock 20.900 MHz, 149 mm x 54 mm
640 672 672 709 hborder 0
480 484 484 491 vborder 0
-hsync -vsync
VertFreq: 60 Hz, HorFreq: 29478 Hz
Monitor ranges (GTF): 52-68Hz V, 26-36kHz H, max dotclock 30MHz
Dummy block
Dummy block
Checksum: 0x6b (valid)
Signed-off-by: Priit Laes <priit.laes@paf.com>
Signed-off-by: Priit Laes <plaes@plaes.org>
When framebuffer driver init is failed, we should return the err value not 0.
So the video init can exit immediately.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
This patch enables Falcon Mode by default and updates the README
file to show instructions on how to run from the micro SD card
or eMMC. This patch also enables fatwrite to help assist with
writing the 'args' to the microSD card.
Signed-off-by: Adam Ford <aford173@gmail.com>
With the updated device trees in place, this patch enables
DM_USB which uses several regulators also enabled with this patch.
Signed-off-by: Adam Ford <aford173@gmail.com>
The i.MX6 SOM and development kits have undergone significant
updates and changes over the past few months. This re-sync's
the U-Boot with Logic PD's BSP.
Signed-off-by: Adam Ford <aford173@gmail.com>
The MMC booting wasn't previously fitting into the codespace.
This patch enables MMC booting from the baseboard by reducing
some DM overhead during SPL.
Signed-off-by: Adam Ford <aford173@gmail.com>
Switches on the IMX7 pinctrl driver for the warp7 and warp7_bl33 ports,
necessary to convert over to DM for this board.
It is necessary to switch on pinctrl and GPIO in one go.
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
This patch sets up an alias for mmc0 to usdhc3.
Before the DM conversion only usdhc3 was enabled and therefore it appeared
as MMC 0 to u-boot. After enabling MMC DM though usdhc3 defaults to MMC 2,
which left unattended would drive changes to existing warp7 bootscripts and
environment variables that rely on mmc 0.
Setup the alias of mmc0 and usdhc3 so that existing warp7 boot code will
work unmodified.
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
As pointed out by Lucas WDOD1_WDOG_ANY should be WDOG1_WDOG_ANY. Once
corrected we can import the latest kernel DTS unmodified.
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Reported-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Passover info only for revA.
move get_cpu_rev out of CONFIG_CPU to avoid build failure when using
get_cpu_rev in SPL.
Add a CONFIG_SPL_BUILD for passover usage, no need to execute it again
in normal U-Boot stage. Also if still checking passover info in normal
U-Boot stage, need to make the passover code executed after
arch_cpu_init_dm.
So to make it easy and clean, only execute the code for SPL stage.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Apply errata based on PL310 version instead of compile
time. Also set Prefetch offset to 15, since it improves
memcpy performance by 35%. Don't enable Incr double
Linefill enable since it adversely affects memcpy
performance by about 32MB/s and reads by 90MB/s. Tested
with 4K to 16MB sized src and dst aligned buffer.
Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
According to "Table 5-1. Boot Device Select" (page 335,
i.MX 6Dual/6Quad Applications Processor Reference Manual, Rev. 4, 09/2017)
the BOOT_CFG1[3] have following values (regarding EIM booting):
0 - NOR flash and 1 - ONENAND
This commit provides correct identification of the boot medium for IMX6Q
boards booting from NOR memory (MCCMON6 is one of them).
Signed-off-by: Lukasz Majewski <lukma@denx.de>
These nodes are required by CX9020 when build with CONFIG_DM_MMC=y
They are copied from Linux 4.20
Signed-off-by: Patrick Bruenn <p.bruenn@beckhoff.com>
There is no need to set the ARCH variable when building U-Boot. In fact,
the ARCH name in U-Boot is 'arm'.
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
The initialization function calls a nand_chip.scan_bbt(mtd) but
scan_bbt is never initialized resulting in an undefined function
pointer. This will direct the function pointer to nand_default_bbt
defined in the same file.
Signed-off-by: Adam Ford <aford173@gmail.com>
Acked-by: Stefan Agner <stefan.agner@toradex.com>
When building mxc_spi driver on ARM64 platforms, get below build warnings.
Fix it in this patch.
In file included from include/common.h:48:0,
from drivers/spi/mxc_spi.c:9:
drivers/spi/mxc_spi.c: In function ‘spi_xchg_single’:
drivers/spi/mxc_spi.c:232:21: warning: cast from pointer to integer of
different size [-Wpointer-to-int-cast]
_func_, bitlen, (u32)dout, (u32)din);
^
include/log.h:135:26: note: in definition of macro ‘debug_cond’
printf(pr_fmt(fmt), ##args); \
^~~~
drivers/spi/mxc_spi.c:231:2: note: in expansion of macro ‘debug’
debug("%s: bitlen %d dout 0x%x din 0x%x\n",
^~~~~
drivers/spi/mxc_spi.c:232:32: warning: cast from pointer to integer of
different size [-Wpointer-to-int-cast]
_func_, bitlen, (u32)dout, (u32)din);
^
include/log.h:135:26: note: in definition of macro ‘debug_cond’
printf(pr_fmt(fmt), ##args); \
^~~~
drivers/spi/mxc_spi.c:231:2: note: in expansion of macro ‘debug’
debug("%s: bitlen %d dout 0x%x din 0x%x\n",
^~~~~
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
At default, u-boot reserves the memory from SP - 4KB to DRAM end for
lmb in arch_lmb_reserve. So lmb won't allocate any memory from it.
But we found the 4K gap for SP is not enough now, because some FDT
updating operations are added in our u-boot before jumping to kernel,
which needs larger stack. This causes the lmb allocated memory is overwritten
by stack.
Fix the issue by implementing the board_lmb_reserve to reserve from
SP - 16KB to memory end for lmb.
Signed-off-by: Ye Li <ye.li@nxp.com>
The pinctrl supports to set any bit in input register on iMX6 if
the MSB of input value is 0xff. But the driver uses signed int for
input value, so when executing the codes below, it won't meet.
Because this is arithmetic right shift.
if (input_val >> 24 == 0xff)
Fix the issue by changing the input_val, config_val and mux_mode to u32.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Enable SPL for i.MX8QXP MEK, and currently use SPL FIT.
The SPL enable SPL_DM to use MMC/PINCTRL/POWER DOMAIN/CLK.
Note: SPL FIT could not support secure boot chain, because i.MX8/8X
only support i.MX container format. This container format has
not been upstreamed, so we use FIT for now. When SPL container
supported, we could switch to that.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Introduce u-boot dtsi for i.MX8QXP MEK board.
we do not introduce a common dtsi for SoC, because different board
has different requirement on which needs to be enabled in SPL DM.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
SPL runs in EL3 mode, except MU0_A, others are not powered on,
and could not be used. However normal U-Boot use MU1_A, so we
could not reuse the one in dts. And we could not replace the one
in dts with MU0_A, because MU0_A is reserved in secure world.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
The defconfig already use most features implied by distro defaults.
Make sure we enable all features required by distro boot by making
use of CONFIG_DISTRO_DEFAULTS.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
The colibri_imx7_defconfig is for Colibri iMX7 raw NAND devices.
Hence DFU for NAND is more useful then for MMC devices.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Access to CAAM in non-secure mode must be enabled by the boot
loader first. The U-Boot CAAM driver enables access to CAAM in
non-secure mode by default. Hence enable the CAAM driver to
allow Linux accessing CAAM directly. This prevents error
messages like the following on Linux boot:
caam 30900000.caam: Entropy delay = 3200
caam 30900000.caam: failed to acquire DECO 0
caam 30900000.caam: failed to instantiate RNG
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Use DM and device trees for raw NAND devices by default. This
fixes -74 NAND read errors since it makes sure the ECC settings
are the same as used in Linux and our downstream U-Boot.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
In preparation of adding CONFIG_DM_MMC support use separate device
trees for raw NAND and eMMC devices.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Fix mixed up boot commands between raw NAND and eMMC variant. Also
make sure that the boot_file is defined for the eMMC boot command.
Fixes: a62c60610f ("colibri_imx7_emmc: add Colibri iMX7D 1GB (eMMC) module support")
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
This reverts commit f7e475db40.
This commit breaks the boot on imx8qxp evk and it should only
be re-applied after imx8qxp evk is converted to SPL.
Revert it for now, so that imx8qxp evk can be functional.
Reported-by: Breno Lima <breno.lima@nxp.com>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Tested-by: Breno Lima <breno.lima@nxp.com>
core is of type uint64_t. So for printing we need "%"PRIu64 (not "%lu").
Without the patch a warning is issued when building on a 32bit system.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
The original definition added the string mtdparts= to the Linux Kernel
args twice: mtdparts=mtdparts=. Fix that.
Signed-off-by: Olaf Mandel <o.mandel@menlosystems.com>
Reviewed-by: Marek Vasut <marex@denx.de>
After merging the boot partition into the root partition, the splashfile
resides in the /boot subdirectory: update the default environment to
reflect that.
Signed-off-by: Olaf Mandel <o.mandel@menlosystems.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Add support for the VXT VL050-8048NT-C01 panel connected through
the 24 bit parallel LCDIF interface.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Like it was done on imx6 in commit 9236269de5 ("imx: mx6: Fix
implementantion reset_misc")
Do not call lcdif_power_down() in the SPL case to fix the following
build error:
LD spl/u-boot-spl
MKIMAGE u-boot.img
arch/arm/mach-imx/built-in.o: In function `reset_misc':
/home/fabio/ossystems/u-boot/arch/arm/mach-imx/mx7/soc.c:372: undefined reference to `lcdif_power_down'
scripts/Makefile.spl:375: recipe for target 'spl/u-boot-spl' failed
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Port for the PHYTEC phyBOARD-i.MX6UL-Segin single board computer. Based on
the PHYTEC phyCORE-i.MX6UL SOM (PCL063).
CPU: Freescale i.MX6UL rev1.2 528 MHz (running at 396 MHz)
CPU: Industrial temperature grade (-40C to 105C) at 44C
Reset cause: POR
Board: PHYTEC phyCORE-i.MX6UL
I2C: ready
DRAM: 256 MiB
NAND: 512 MiB
MMC: FSL_SDHC: 0
In: serial
Out: serial
Err: serial
Net: FEC0
Working:
- Eth0
- i2C
- MMC/SD
- NAND
- UART (1 & 5)
- USB (host & otg)
Signed-off-by: Martyn Welch <martyn.welch@collabora.com>
Currently if we have more than one phy on the MDIO bus, we do not have a
good mechanism for determining which should be used at runtime. Enable the
FEC driver to determine the address for the PHY from the device tree.
Signed-off-by: Martyn Welch <martyn.welch@collabora.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
The following NXP application notes and manual recommend to ensure the
IVT DCD pointer is Null prior to calling HAB API authenticate_image()
function:
- AN12263: HABv4 RVT Guidelines and Recommendations
- AN4581: Secure Boot on i.MX50, i.MX53, i.MX 6 and i.MX7 Series using
HABv4
- CST docs: High Assurance Boot Version 4 Application Programming
Interface Reference Manual
Commit ca89df7dd4 ("imx: hab: Convert DCD non-NULL error to warning")
converted DCD non-NULL error to warning due to the lack of documentation
at the time of first patch submission. We have warned U-Boot users since
v2018.03, and it makes sense now to follow the NXP recommendation to
ensure the IVT DCD pointer is Null.
DCD commands should only be present in the initial boot image loaded by
the SoC ROM. Starting in HAB v4.3.7 the HAB code will generate an error
if a DCD pointer is present in an image being authenticated by calling the
HAB RVT API. Older versions of HAB will process and run DCD if it is
present, and this could lead to an incorrect authentication boot flow.
Signed-off-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
slre_match() checks if caps == NULL. In this case it does not try to
update it. So there is no need to create a buffer caps which we do not
evaluate.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Change multiple usages of 'j' into 'rgn'; fix whitespace/coding style
reported by patman.
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
As a follow-up, change the name of the newly introduced function
'lmb_get_unreserved_size' to 'lmb_get_free_size', which is more
appropriate.
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
[trini: Fix test/lib/lmb.c]
Signed-off-by: Tom Rini <trini@konsulko.com>
Handle correctly directory arch/arm/mach-stm32mp/ :
Add a trailing slash to include all files
and subdirectory files.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Linux kernel binding is using atmel,24c08 compatible string. On the
other hand there is atmel,24c08a which is not listed in the kernel.
Add compatible string without "a" suffix to be compatible with Linux
kernel binding.
These eeproms are available on several ZynqMP development boards.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
The dtoc tests need to be adapted to dtoc being changed to output platdata
structs as const, which has been introduced in commit 7d05d3a8e3 ("dtoc:
make generated platdata structs const").
Fixes: 7d05d3a8e3 ("dtoc: make generated platdata structs const")
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
I'm working on getting OpenBSD to run on the Atmel SAMA5D3 Xplained.
OpenBSD uses an EFI bootloader, which requires the "load" command to
work, since "fatload" doesn't initialize the EFI memory addresses
properly. To get "load" on the SAMA5D3 version of U-Boot, I propose
adding the CONFIG_CMD_FS_GENERIC option.
Signed-off-by: Greg Czerniak <greg@czerniak.info>
This patch has been tested on the mcf54415-based stmark2
board. The eSDHC driver works reliably using DMA mode.
Signed-off-by: Angelo Dureghello <angelo@sysam.it>
In case when the environment on some location is malformed (CRC isn't
matching), there is a chance we won't be able to save the environment to
that location. For example, consider the case when we only have the
environment on eMMC, but it's zeroed out. In that case, we won't be able
to "env save" to it, because of "bad CRC" error. That's happening
because in env_load() function we consider malformed environment as
incorrect one, and defaulting to the location with highest (0)
priority, which can be different from one we are dealing with right now
(e.g., highest priority can be ENV_FAT on SD card, which is not
inserted, but we want to use ENV_MMC on eMMC, where we were booted
from).
This issue began to reproduce after commit d30ba2315a ("u-boot: remove
driver lookup loop from env_save()") on BeagleBone Black, but that
commit didn't introduce the wrong logic, it just changed the behavior
for default location to use, merely revealing this issue.
To fix that, let's implement next logic in env_load():
1. Try to find out correct environment; if found -- use it
2. If working environment wasn't found, but we found malformed one
(with bad CRC), let's use it for further "env save". But make sure
to use malformed environment location with highest priority.
3. If neither correct nor malformed environment was found, let's
default to environment location with highest priority (0)
Steps to reproduce mentioned issue on BeagleBone Black (fixed in this
patch):
1. Boot from SD card and erase eMMC in U-Boot shell:
=> mmc dev 1
=> mmc erase 0 100000
=> gpt write mmc 1 $partitions
2. Write new SPL and U-Boot to eMMC; the rest of eMMC will stay filled
with zeroes
3. Boot from eMMC; try to do:
=> env save
4. Observe the error (incorrect behavior). Correct behavior: environment
should be stored correctly on eMMC, in spite of it has "bad CRC"
Fixes: d30ba2315a ("u-boot: remove driver lookup loop from env_save()")
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Callers of env_import*() functions might want to check the case when we
have incorrect environment (with bad CRC). For example, when environment
location is being defined in env_load(), call chain may look like this:
env_load() -> drv->load() = env_mmc_load() -> env_import()
Return code will be passed from env_import() all way up to env_load().
Right now both env_mmc_load() and env_import() return -EIO error code,
so env_load() can't differentiate between two cases:
1. Driver reports the error, because device is not accessible
2. Device is actually accessible, but environment is broken
Let's return -ENOMSG in env_import(), so we can distinguish two cases
mentioned above. It will make it possible to continue working with "bad
CRC" environment (like doing "env save"), instead of considering it not
functional (implemented in subsequent patch).
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Like AM33xx and AM43xx, DRA7xx and AM57xx devices may need to
have an non-standard boot address in memory. This may be due
to the device being a high security variant, which place the
Initial SoftWare (ISW) after certificates and secure software.
Allow these devices to set this from Kconfig.
Signed-off-by: Andrew F. Davis <afd@ti.com>
CLI support with the HUSH parser is not currently SPL safe due to it's
use of realloc. That function is not defined for SPLs that use
SYS_MALLOC_SIMPLE. CLI support can be built in to SPL and some functions
do work, but use of some like run_command() will cause build to fail.
When no SPL code calls this function build works as the compiler removes
this unreachable code so the unresolved symbols are ignored.
If DFU support is enabled in SPL then MMU DFU support may get brought in
also, this code does make a call to run_command() causing build to fail
if the HUSH parser is not built-in. To break this odd and unneeded
dependency chain we use CONFIG_IS_ENABLED where appropriate to prevent
calls into HUSH code from SPL. This also removes our need to pull in the
rather unrelated source file when SPL_DFU is defined.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Do this by using $(SPL_) in Makefiles and CONFIG_IS_ENABLED in C code.
This ensures the files and features are only built into the right build
for which they are enabled. Using the macros to simplify this patch was
made possible by the config symbol rename done in the last patch.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Lukasz Majewski <lukma@denx.de>
The symbol CONFIG_SPL_DFU_SUPPORT in SPL build has the same
meaning as CONFIG_DFU in regular U-Boot. Drop the _SUPPORT
to allow for cleaner use in code.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Lukasz Majewski <lukma@denx.de>
It is not possible to link the SPL image when CONFIG_GPIO is enabled
but CONFIG_SPL_GPIO is not. Use the IS_ENABLED macro instead to
correctly check whether CONFIG_{SPL_}GPIO is enabled.
This commit fixes the following errors:
* undefined reference to `dm_gpio_get_value
* undefined reference to `gpio_request_by_name'
Signed-off-by: Fabien Parent <fparent@baylibre.com>
[trini: Move guard to fix warning in msdc_ops_get_wp()]
Signed-off-by: Tom Rini <trini@konsulko.com>
The code is checking for incomplete read when it see the INT_XFER_COMPL
flag, but it forget to first check whether there is anything left in the
FIFO to copy to the RX buffer. This means that sometimes we will get
errors because of erroneous incomplete read operation.
This commit fixes the driver re-ordering the code so that we first
check for data inside the RX fifo and only after check the status
of the INT_XFER_COMPL flag.
Signed-off-by: Fabien Parent <fparent@baylibre.com>
As Poplar supports running TF-A with OP-TEE as BL32
payload, add op-tee node in DT, which enables usage of
OP-TEE driver (which provides an interface for requesting services
from OP-TEE).
Signed-off-by: Igor Opaniuk <igor.opaniuk@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
We have converted mmc to driver model on Poplar. So let's clean up
board level mmc initialization code.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
It adds missing pinctrl headers, updates clock header and sync up Poplar
device tree with kernel 4.20 release.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* Add pinctrl node for TLMM and add mux request for uart node.
* Rename uart to the actual board uart port.
* Fix indentendation of sdhc2 node.
Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
The TLMM_GPIO_ENABLE bit is actually use to disable
the GPIO. change it to TLMM_GPIO_DISABLE so it's clearer.
Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Add pinctrl driver for Dragonboard820c, currently with only
one mux func to initialize pins for serial console.
Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
The PLL for the UART was not set, and relied on previous
initializtion made by LK. add the appropriate initialization.
Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
The imgextract command runs a number of checks of
the specified fit. Where it checks for a load address
for compressed images the logic in the expression
is inverted as fit_image_check_comp returns 1 on
success and not 0.
Deploy u-boot-spl.stm32 binary in u-boot root folder like
the rest of the boards.
This makes it more streamlined when building in Yocto, Buildroot etc..
Signed-off-by: Sean Nyekjaer <sean.nyekjaer@prevas.dk>
A few platforms recently added in CONFIG_DFU_MMC under include/configs
rather than via the defconfig, update them.
Signed-off-by: Tom Rini <trini@konsulko.com>
A couple of trivial fixes and improvements for ARC
Most notable are:
* Move of ENV_SIZE/ENV_OFFSET to Kconfig
* Fix with private structure allocation for arc_uart
* Definition of CONFIG_SYS_CACHELINE_SIZE useful for building drivers
Even though we don't use CONFIG_SYS_CACHELINE_SIZE in ARC-specific code
it is used a lot in different drivers for alignment purposes.
So we define it and make much more drivers at least compilable for ARC.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
"i" gets incremented before we're entering loop body
and effectively we iterate from 1 to 8 instead of 0 to 7.
This way we:
a) Skip the first line of struct hs_versions
b) Go over it and access memory beyond the structure
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Apparently we never allocated buffer for arc_serial_platdata
which for some reason never caused problems when executed in nSIM.
But in Qemu this causes expected problems.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
No mainline board enables CONFIG_MCAST_TFTP and there have been
compilation issues with the code for some time. Additionally, it has a
potential buffer underrun issue (reported as a side note in
CVE-2018-18439).
Remove the multicast TFTP code but keep the driver API for the future
addition of IPv6.
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
ether_crc was added to the core net code in commit 53a5c424bf
("multicast tftp: RFC2090") so that other drivers could use it. However
the only current user of it is tsec.c so move it there.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
According to the datasheet to access the extended registers we have to:
1. Write Register 31 Data = 0x0XYZ (Page 0xXYZ)
2. Read/Write the target Register Data
3. Write Register 31 Data = 0x0000 or 0xa42 (switch back to IEEE
Standard Registers)
Hook the missing functions so that we can use the `mdio rx/wx` command to
easily access the extended registers.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Some existing device trees don't specify a phy-mode so fallback to GMII
when a phy-mode is not provided.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
For KSZ9021, all skew register fields are 4-bit wide.
For KSZ9031, the clock skew register fields are 5-bit wide.
The common code in ksz90x1_of_config_group calculating the combined
register value checks if the requested value is above the maximum
and uses this maximum if so. The calculation of this maximum uses
the register width, but the check itself does not. It uses a hardcoded
value of 0xf, which is too low in case of the 5-bit clock (0x1f).
This detail was probably lost during driver unification.
Effect (only for KSZ9031 clock skews): For values greater 900 (== 0ps),
this silently results in 1860 (== +960ps) instead of the requested one.
Fix the check by using the bit width instead of hardcoded value(s).
Signed-off-by: Andreas Pretzsch <apr@cn-eng.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
With CONFIG_REGEX enabled, ETHADDR_WILDCARD is set up for up to 10
interfaces (0..9) as the number can only have one digit.
On boards with more than 10 interfaces, this leads to the protection
and format checks being absent for eth10addr and above.
Fix this by changing ETHADDR_WILDCARD from "\\d?" to "\\d*" to allow
more than one digit.
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
ETHADDR_WILDCARD is defined as the same value in both env_flags.h
and env_callback.h
As env_callback.h includes env_flags.h, remove the duplicate definition
from env_callback.h
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
When dealing with two ethernet ports and having "netretry" set
to "once", it could occur that the connection (e.g. an ARP
request) failed, hence the status of the netloop was
"NETLOOP_FAIL". Due to the setting of "netretry", the network
logic would then switch to the other network interface,
assigning "ret" with the return value of "net_start_again()".
If this call succeeded we would return 0 (i.e. success) to
the caller when in reality the network action failed.
Signed-off-by: Thomas RIENOESSL <thomas.rienoessl@bachmann.info>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Current code forces all ports on a given Ethernet device to use the same
mdio device. In practice different ports might be wired to separate mdio
devices. Move the mdio device from the container struct mvpp2 to the per
port struct mvpp2_port.
Cc: Ken Ma <make@marvell.com>
Cc: Stefan Chulski <stefanc@marvell.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Stefan Roese <sr@denx.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Current mdio base lookup code relies on a 'reg' property at the upper CP
node. There is no 'reg' property there in current DT files of Armada
CP110. Use ofnode_get_addr() instead since it provides proper DT address
translation.
Cc: Ken Ma <make@marvell.com>
Cc: Stefan Chulski <stefanc@marvell.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Stefan Roese <sr@denx.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Short frames are padded to the minimum allowed size of 60 bytes.
However, the designware driver sends old data in these padding bytes.
It is common practice to zero out these padding bytes ro prevent
leaking memory contents to other hosts.
Fix the padding code to zero out the padded bytes at the end.
Tested on socfpga gen5.
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
The designware driver has a bug in setting the tx length into the dma
descriptor: it always or's the length into the descriptor without
zeroing out the length mask before.
This results in occasional packets being transmitted with a length
greater than they should be (trailer). Due to the nature of Ethernet
allowing such a trailer, most packets seem to be parsed fine by remote
hosts, which is probably why this hasn't been noticed.
Fix this by correctly clearing the size mask before setting the new
length.
Tested on socfpga gen5.
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
The phy devices can be accessed via clause 22 or via clause 45.
This information can be deduced when we read phy id. if the phy id
is read without giving any MDIO Manageable Device Address (MMD), then
it conforms to clause 22. otherwise it conforms to clause 45.
Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
There is no i2c connected in base DT that's why disable I2C commands.
Also remove zynq_zybo which is not needed now.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Most of the memory is being consumed by device binding code,
more space needed for other data structures.
Z-turn board has already hit the limit, others may follow soon.
Measuring only the memory consumed in device_bind_common, I've got
the following results (in decimal):
root_driver: 108
mod_exp_sw: 108
amba: 120
serial@e0000000 aka uart0: 112
serial@e0001000 aka uart1: 88
spi@e000d000 aka qspi: 120
sdhci@e0100000 aka mmc0: 455
sdhci@e0100000.blk: 208
slcr@f8000000: 96
clkc@100: 72
(total) 1487 = 0x5cf of 0x600
Signed-off-by: Anton Gerasimov <tossel@gmail.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
The miamiplus can use GEM0 through MIO pins, which requires a 125 MHz TX
clock to be generated. With the IO PLL at 1200 MHz this isn't possible, so
change it to run at 1000 and adjust the divisors accordingly. Also set the
GEM0 clock source to MIO instead of EMIO.
Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
The miamiplus contains a speedgrade-2 device, which may run the CPU at 800MHz.
Change the PLL setting to 800MHz, and adapt the setpoints in the devicetree.
Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Update cadence i2c driver to support livetree
Similar changes were done by:
"net: zynq_gem: convert to use livetree"
(sha1: 26026e695a)
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Similar changes was done for Zynq in past and this patch just follow
this pattern to separate cpu code from SoC code.
Move arch/arm/cpu/armv8/zynqmp/* -> arch/arm/mach-zynqmp/*
And also fix references to these files.
Based on
"ARM: zynq: move SoC sources to mach-zynq"
(sha1: 0107f24036)
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Build warning was added by:
"fdt: Add warning about CONFIG_OF_EMBED"
(sha1: 841d5fbae4)
Zynq mini configurations are not moved yet and it is questionable if
make sense to move them too.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This patch enables CONFIG_REMAKE_ELF for Zynq platform
so that it generates u-boot.elf from binary which works
for all Zynq boards with OF_SEPARATE option enabled.
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Build warning was added by:
"fdt: Add warning about CONFIG_OF_EMBED"
(sha1: 841d5fbae4)
ZynqMP mini configurations are not moved yet and it is questionable if
make sense to move them too.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Bootrom is not capable to work with non align bootloader partition
that's why it is necessary to align it before boot.bin creation.
The patch is creating new spl/u-boot-spl-align.bin which is used only
for boot.bin.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Bootrom is not capable to work with non aligned bootloader sizes.
SPL with OF_SEPARATE generates non-align images quite often that's
why this change is required before OF_SEPARATE enableding.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Enable ISSI flash for platforms. Xilinx reference boards are also used
internally with different flash part to increase coverage that's why
enable also ISSI parts for all these boards even if that board is
released only with one part.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
When FPGA programming fails, it does so silently, unless debugging
code is enabled. This makes it hard to detect problems in production
environments.
Print the error message unconditionally so the error doesn't go
unnoticed.
Signed-off-by: Luca Ceresoli <luca@lucaceresoli.net>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This patches renames sd nodes in dts to be in line with
kernel. This patch also modifies the references for the same
in code.
It checks mmc first to have no time penalty for new DT node names based
on left-to-right expression evaluation.
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
The cache was only flushed before *transmitting* packets, but not
when receiving them, leading to an issue where new packets were
handed to the receive handler with old contents in cache. This
only happens when a lot of packets are received without sending
packages every now and then. Also flushing the receive buffers
in the transmit function makes no sense and can be removed.
Signed-off-by: Stefan Theil <stefan.theil@mixed-mode.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
There is hard dependency for CLK_ZYNQMP to have zynqmp_pmufw_version()
but also FPGA code is calling this function which is possible to use
without actual CLK_ZYNQMP firmware driver to be enabled.
This patch enables the case where only fixed-clock CLK setup is used.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This variable was incorrectly added by:
"mmc: zynq_sdhci: Add support for SD3.0"
(sha1: d1f4e39d58)
which had nothing to do with MMC power sequence provider.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This patch adds support for nand multi chip select.
Also adding CONFIG_SYS_NAND_MAX_CHIPS to Kconfig to specify maximum number
of nand chips.
Signed-off-by: Tummala Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
The FSBL copies "Total Partition Word Length" * 4 bytes from the boot.bin,
which implies that the partition size is 4 byte aligned. When writing the
partition, mkimage calculates "Total Partition Word Length" by dividing
the size by 4. This implicitly cuts unaligned bytes at the end of the
added binary.
Instead of rounding down, the size must be round up to 4 bytes and the
binary padded accordingly.
Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
Reviewed-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
- MIPS: mscc: ocelot: add ethernet switch and network support
- MIPS: mscc: add support for ServalT SoC family
- MIPS: mscc: add support for Serval SoC family
-msingle-pic-base is a new gcc(from 4.6) option for ppc and
it reduces the size of my u-boot with about 4-5 KB.
While at it, add -fno-jump-tables too to save a
few more bytes.
e5500 core:
size u-boot.bef
text data bss dec hex filename
473043 23772 307104 803919 c444f u-boot.bef
size u-boot.aft
text data bss dec hex filename
453195 23772 307104 784071 bf6c7 u-boot.aft
e500 core:
size u-boot.bef
text data bss dec hex filename
292998 17868 24968 335834 51fda u-boot.bef
size u-boot.aft
text data bss dec hex filename
288002 17868 24968 330838 50c56 u-boot.aft
Signed-off-by: Joakim Tjernlund <joakim.tjernlund@infinera.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Add board support and configuration for Jaguar2 SoC family.
The detection of the board type is based on the phy ids.
Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
As Ocelot, Servalt, Luton and Jaguar2, this family of SoCs are
found in Microsemi Switches solution.
Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Add board support, configuration and DTS for Servalt SoC
family. Currently there is one board in this family.
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
The Servalt SoC family has 36 pins. Currently there is not support
for Servalt pinctrl in Linux kernel.
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Now that network support is added for the ocelot platform, let's add it
in the default configuration.
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
On some ocelots platform a workaround is needed in order to be able to
reset the switch without resetting the DDR.
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
In the two commits:
cf3922dddc
mmc: ftsdc010_mci: Sync compatible with DT mmc node
c14e90e844
riscv: dts: Sync DT with Linux Kernel
ftsdc010_mci's compatible has been modified as
"andestech,atfsdc010" for RISC-V synchronization.
But ae3xx.dts and ag101p.dts which are used for
nds32 adp-ae3xx and adp-ag101p platforms did not
be modified correctly at that time. It will cause
mmc detection failure. Fix it here.
Signed-off-by: Rick Chen <rick@andestech.com>
Cc: Greentime Hu <greentime@andestech.com>
Add -mcmodel=large can let elf-mculib have
the same default behavior just like linux-glibc.
And it help to pass U-Boot booting sequence.
Signed-off-by: Rick Chen <rick@andestech.com>
Cc: Greentime Hu <greentime@andestech.com>
Force it to generate SW fup instruction.
It help to avoid bugs when running on no-HW-fpu board, but
compile with v3f which support HW fpu instruction.
Signed-off-by: Rick Chen <rick@andestech.com>
Cc: Greentime Hu <greentime@andestech.com>
-G0 is an old option, not support now,
So remove it.
It can help to fix compile error when
build with nds32 pre-build toolchain.
Signed-off-by: Rick Chen <rick@andestech.com>
Cc: Greentime Hu <greentime@andestech.com>
Download nds32 prebuild toolchain from github
which is base on gcc 8.0.1 version for regression.
Signed-off-by: Rick Chen <rick@andestech.com>
Cc: Greentime Hu <greentime@andestech.com>
- Sync Armada-38x dts with Linux 4.20 from Chris
- Misc changes and enhancements to Turris Mox (v4) from Marek
- Reserve PSCI area for Armada 8k from Heinrich
- New Allied Telesis x530 board (Armada-385) from Chris
- Misc minor changes (defconfig etc)
Per Heiko the original changes were correct and something is misbehaving
on his hardware.
This reverts commit 3d5931e598.
Signed-off-by: Tom Rini <trini@konsulko.com>
This is a range of stackable network switches. The SoC is Armada-385 and
there are a number of variants with differing network port
configurations. The DP variants are intended for a harsher operating
environment so they use a different i2c mux and fit industrial-temp
parts.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
An NVME drive may be installed on the MACCHIATObin board using the PCIe
slot or on the Clearfog Pro using mini a PCI-e slot. With the configuration
change it becomes usable.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
The memory area [0x4000000-0x4200000[ is occupied by the PSCI firmware. Any
attempt to access it from U-Boot leads to an immediate crash.
So let's make the same memory reservation as the vendor device tree.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
This is needed for some scenarios, such as booting large FIT image.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
Use get_ram_size to determine if the RAM size on Turris Mox is 512 MiB
or 1 GiB.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Signed-off-by: Stefan Roese <sr@denx.de>
Add support for reading One-Time Programmable memory via mailbox, which
communicates with CZ.NIC's firmware on the Secure Processor (Cortex-M3)
of Armada 3720.
Display product serial number and additional info, and also set MAC
addresses.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
Add myself as the maintainer of CZ.NIC's Turris Omnia and Turris Mox
projects.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
The Armada 37xx watchdog driver was recently accepted for mainline
kernel by watchdog subsystem maintainer, but the driver works a little
different than the one in U-Boot. This patch fixes this.
In the previous implementation there was a tiny period of time when the
watchdog was disabled and the system was vulnerables - this was during
pinging, which was done by disabling, setting, and enabling the counter.
Now pinging is done without disabling the watchdog. We use 2 counters:
Counter 1 is the watchdog counter - on expiry, the system is reset.
Counter 0 is used to reset Counter 1 to start counting from the set
timeout again. So Counter 1 is set to be reset on Counter 0 expiry event
event and pinging is done by forcing an immediate expiry event on
Counter 0.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Signed-off-by: Stefan Roese <sr@denx.de>
Add gpio command to defconfig - this can be used to detect whether the
button is pressed or light LEDs.
Add DS1307 RTC driver and the date command.
Add CONFIG_WATCHDOG, so that U-Boot calls watchdog_reset.
Add CONFIG_MISC_INIT_R so that ethernet addresses are read from OTP
before network controller is initialized.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
DTC issues a warning because #address-cells and #size-cells properties
are not set in the mdio node.
Also add ethernet1 alias.
Also add RTC node.
Also fix USB3 regulator startup delay time.
Also fix PCI Express SERDES speed to 5 GHz (this is only cosmetic, the
speed value is not used byt the comphy driver for PCI Express, but
should be 5 GHz nonetheless).
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
Check if Mox modules are connected in supported mode, then configure
the MDIO addresses of switch modules.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Signed-off-by: Stefan Roese <sr@denx.de>
When SFP module is connected directly to CPU module we want the SGMII
lane speed at 1.25 Gbps.
This is a temporary solution till there is a comphy driver in the kernel
capable of changing SGMII speed at runtime.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
Restructure the board initialization source.
Remove the module_topology environment variable since it won't be
needed.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
Sync the Armada-38x device tree files with Linux 4.20-rc5. The changes
not taken are new compatible strings for the uart and nand flash
controller. The nand binding is best updated if/when the mtd/nand
infrastructure is updated.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
-msingle-pic-base is a new gcc(from 4.6) option for ppc and
it reduces the size of my u-boot with about 4 KB.
While at it, add -fno-jump-tables too to save a
few more bytes.
Signed-off-by: Joakim Tjernlund <joakim.tjernlund@infinera.com>
Reviewed-by: Mario Six <mario.six@gdsys.cc>
Tested-by: Mario Six <mario.six@gdsys.cc> (on MPC8308)
The bounce buffer is used by a few drivers (most of the MMC drivers)
to overcome limitations in their respective DMA implementation.
This moves the configuration to Kconfig and makes it user-selectable
(even though it will be a required feature to make those drivers
work): the expected usage is for drivers depending on this to 'select'
it unconditionally from their respective Kconfig (see follow-up
patches).
This commit includes a full migration using moveconfig.py to ensure
that each commit compiles. To ensure bisectability we update
dependencies of various drivers to now select BOUNCE_BUFFER when needed.
[trini: Squash all patches to ensure bisectability]
Signed-off-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion]
Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion]
Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
- Bugfix for SPI environment optimization
- Spelling fixes
- Remove some defconfigs per various maintainers
- Minor db410, bananapi r2 fixes
- Bump QEMU to v3.1.0 for most platforms
commit 9a9d66f5ef ("env: add spi_flash_read_env function")
breaks Environment functionality, as it reads only
until 2 \0 are found, but fills the buffer with 0x0
instead 0xff which leads in an incorrect crc sum.
Fix: init the read buffer with 0xff instead 0x00
Signed-off-by: Heiko Schocher <hs@denx.de>
The am335x_evm_defconfig supports all am335x_boneblack variants. Remove
the redundant am335x_boneblack_defconfig.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
On this board SPI is only used to configure the SoC driving the LC TFT
display which is not used in U-Boot. Hence remove SPI support.
Signed-off-by: Felix Brack <fb@ltec.ch>
cmd/mtd.c:447:13: warning: ‘mtd_help_text’ defined but not used [-Wunused-variable]
static char mtd_help_text[] =
^~~~~~~~~~~~~
When SYS_LONGHELP is not defined. After looking at how other commands
work, we should surround the whole help text (even its declaration) with
an #ifdef CONFIG_SYS_LONGHELP, since it's compiled out when calling
_CMD_HELP[1] on the help text variable argument to U_BOOT_CMD.
[1] https://elixir.bootlin.com/u-boot/latest/source/include/command.h#L181
Signed-off-by: Quentin Schulz <quentin.schulz@bootlin.com>
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
This change enables setting up specific Qemu version or sha1 for new
targets which are added after (current) v3.0.0 version.
This changes is preparation step for adding new Xilinx Versal Virt
platform which was merge after v3.0.0.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
The single job for all Layerscape 10xx platforms is close to, and
sometimes exceeds the time limit for a single job configuration. Break
this down into jobs for LS101x, LS104x and LS108x instead. While in
here, in the name portion of these jobs, refer to them as NXP for ARM
and not Freescale as they've been NXP for quite some time.
Signed-off-by: Tom Rini <trini@konsulko.com>
Now Allwinner platform is all set to use Generic USB
controller drivers, so remove the legacy sunxi drivers.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Onc of key blocker for using USB Generic host controller
drivers in Allwinner are CLK and RESET drivers, now these
available for USB usage.
So switch sunxi USB use EHCI and OHCI Generic controllers.
Enabling USB is wisely a board choise, So Enable USB_OHCI_HCD
where it already have USB_EHCI_HCD
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
CLK and DM_RESET drivers are now available for all of
the Allwinner platforms, so enable them in arch/arm/Kconfig
Enabling CLK will select DM_RESET by default.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Update sun50i-a64-ccu.h from the Linux sunxi/dt64-for-4.20 tree:
commit 679294497be31596e1c9c61507746d72b6b05f26
Author: Rodrigo Exterckötter Tjäder <rodrigo@tjader.xyz>
Date: Wed Sep 26 19:48:24 2018 +0000
arm64: dts: allwinner: a64: a64-olinuxino: set the PHY TX delay
This should be a part of previous sync patch from
commit 1b39a1834e
Author: Andre Przywara <andre.przywara@arm.com>
Date: Mon Oct 29 00:56:47 2018 +0000
sunxi: A64: Update .dts/.dtsi files
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Add initial clock driver for Allwinner A80.
- Implement UART bus clocks via ccu_clk_gate table for
A80, so it can accessed in common clk enable and disable
functions from clk_sunxi.c
- Implement UART bus resets via ccu_reset table for A80,
so it can accessed in common reset deassert and assert
functions from reset-sunxi.c
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Update all A80 devicetree dtsi and dtsi files from
Linux-v4.18-rc3 with below commits.
arch/arm/boot/dts/sun9i-a80*:
commit 190e3138f9577885691540dca59c2f07540bde04
Merge: cafc87023b0d a7affb13b271
Author: Arnd Bergmann <arnd@arndb.de>
Date: Tue Mar 27 14:58:00 2018 +0200
Merge tag 'sunxi-h3-h5-for-4.17' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into next/dt
include/dt-bindings/*/sun9i-a80-*:
commit 783ab76ae553abc23f80ef7511052d055697531b
Author: Chen-Yu Tsai <wens@csie.org>
Date: Sat Jan 28 20:22:36 2017 +0800
clk: sunxi-ng: Add A80 Display Engine CCU
Note: sun9i-a80-cx-a99.dts is updated only uart0, since the same
dts is not available in Linux.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Add initial clock driver for Allwinner H6.
- Implement UART bus clocks via ccu_clk_gate table for
H6, so it can accessed in common clk enable and disable
functions from clk_sunxi.c
- Implement UART bus resets via ccu_reset table for H6,
so it can accessed in common reset deassert and assert
functions from reset-sunxi.c
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Implement UART resets for all relevant Allwinner SoC
clock drivers via ccu reset table.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Add initial clock driver for Allwinner V3S.
- Implement USB bus and USB clocks via ccu_clk_gate table
for V3S, so it can accessed in common clk enable and disable
functions from clk_sunxi.c
- Implement USB bus and USB resets via ccu_reset table
for V3S, so it can accessed in common reset deassert
and assert functions from reset-sunxi.c
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Add initial clock driver for Allwinner R40.
- Implement USB bus and USB clocks via ccu_clk_gate
for R40, so it can accessed in common clk enable
and disable functions from clk_sunxi.c
- Implement USB bus and USB resets via ccu_reset table
for R40, so it can accessed in common reset deassert
and assert functions from reset-sunxi.c
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Add initial clock driver for Allwinner A83T.
- Implement USB bus and USB clocks via ccu_clk_gate table
for A83T, so it can accessed in common clk enable and
disable functions from clk_sunxi.c
- Implement USB bus and USB resets via ccu_reset table
for A83T, so it can accessed in common reset deassert
and assert functions from reset-sunxi.c
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Add initial clock driver for Allwinner A23/A33.
- Implement USB bus and USB clocks via ccu_clk_gate table
for A23/A33, so it can accessed in common clk enable and
disable functions from clk_sunxi.c
- Implement USB bus and USB resets via ccu_reset table
for A23/A33, so it can accessed in common reset deassert
and assert functions from reset-sunxi.c
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Add initial clock driver for Allwinner A31.
- Implement USB ahb1 and USB clocks via ccu_clk_gate table
for A31, so it can accessed in common clk enable and disable
functions from clk_sunxi.c
- Implement USB ahb1 and USB resets via ccu_reset table
for A31, so it can accessed in common reset deassert
and assert functions from reset-sunxi.c
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Add initial clock driver for Allwinner A10s/A13.
- Implement USB ahb and USB clocks via ccu_clk_gate table
for A10s/A13, so it can accessed in common clk enable and
disable functions from clk_sunxi.c
- Implement USB resets via ccu_reset table for A10s/A13,
so it can accessed in common reset deassert and assert
functions from reset-sunxi.c
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Add initial clock driver for Allwinner A10/A20.
- Implement USB ahb and USB clocks via ccu_clk_gate table
for A10/A20, so it can accessed in common clk enable and
disable functions from clk_sunxi.c
- Implement USB resets via ccu_reset table for A10/A20,
so it can accessed in common reset deassert and assert
functions from reset-sunxi.c
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Add initial clock driver for Allwinner H3/H5.
- Implement USB bus and USB clocks via ccu_clk_gate table for
H3/H5, so it can accessed in common clk enable and disable
functions from clk_sunxi.c
- Implement USB bus and USB resets via ccu_reset table for
H3/H5, so it can accessed in common reset deassert and assert
functions from reset-sunxi.c
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Add common reset driver for all Allwinner SoC's.
Since CLK and RESET share common DT compatible, it is CLK driver
job is to bind the reset driver. So add CLK bind call on respective
SoC driver by passing ccu map descriptor so-that reset deassert,
deassert operations held based on ccu reset table defined from
CLK driver.
Select DM_RESET via CLK_SUNXI, this make hidden section of RESET
since CLK and RESET share common DT compatible and code.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Add initial clock driver for Allwinner A64.
Implement USB clock enable and disable functions for
OHCI, EHCI, OTG and USBPHY gate and clock registers
via ccu clk gate table.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Emlid Neutis N5 is a SoM based on Allwinner H5, has a WiFi & BT
module, DDR3 RAM and eMMC.
- add neutis-devboard target to dtb makefile
- add dtsi file for Neutis N5 needs
- add config file for Neutis N5 Dev board
Signed-off-by: Aleksandr Aleksandrov <aleksandr.aleksandrov@emlid.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
[jagan: update proper commit head]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
To use TWI0/1/2 the user can select CONFIG_I2C#_ENABLE.
However even the controller is enabled, the mux for the pins
are not set.
This patch follows the existing mux method. Since the pads are
different, separate check is added for each i2c.
Tested with A64-SOM204 board.
Signed-off-by: Stefan Mavrodiev <stefan@olimex.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
am43xx_evm_ethboot_defconfig is not being actively used and has not been
moved to DM or DT. Also, ethboot cannot be tested on AM43xx EVM as such
due EVM limitations. Therefore delete it.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
These defconfigs don't seem be actively used any more, and have not been
moved to adapt DM or DT. Therefore delete them.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
The last parameter is expected to be the imagefile. Since -E is a
flag having the output name before -p will make mkimage ignore the
external offset option.
Signed-off-by: Patrick Wildt <patrick@blueri.se>
- MIPS: mscc: various enhancements for Luton and Ocelot platforms
- MIPS: mscc: added support for Jaguar2 platform
- MIPS: optimised SPL linker script
- MIPS: bcm6368: fix restart flow issues
- MIPS: fixed CONFIG_OF_EMBED warnings for all MIPS boards
- MIPS: mt7688: small fixes and enhancements
- mmc: compile-out write support if disabled
Remove aliases property name warning while compilation:
Warning (alias_paths): /aliases: aliases property name must
include only lowercase and '-'
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Modify the RC and EP mode judge method, save the mode as a variable,
the variable will be used by other function.
Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
u-boot makes a fixup for LS1046AQDS board to setup the properties
'fixed-link' and 'phy-connection-type' to 'xgmii' but in case of
backplane mode this fixup is not correct because it causes the KR link
to fail and so it must be bypassed in order to keep the link in KR
mode as it is defined in DTS.
Signed-off-by: Florinel Iordache <florinel.iordache@nxp.com>
[YS: Fix compiling warning]
Reviewed-by: York Sun <york.sun@nxp.com>
The ICIDs for the qdma device are not configured through SCFG but
through some registers found in the actual device register block.
Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
fsl-mc lazyapply command applies dpl from efi_exit_boot_services().
Status of fsl-mc node in working fdt is updated at this stage.
However, an efi application like grub may already have copied the fdt.
So the updates to fdt done at efi_exit_boot_services() may not be
visible to the OS. Fix it by updating fdt earlier if fsl-mc lazyapply
command is used.
Fixes: b7b8410a8f (ls2080: Exit dpaa only right before exiting U-Boot)
Signed-off-by: Mian Yousaf Kaukab <ykaukab@suse.de>
Reviewed-by: York Sun <york.sun@nxp.com>
On LS1043A rev1.0 there are 4 interrupt pins for INTx, and on
rev1.1 there is only 1 for INTx, so the current fixup is inverse
of the fact.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
LS1043A/LS1023A 23x23 package silicon has different SVR:VAR_PER.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
update TFABOOT defconfig for SD boot on below NXP chasis2
and chasis3 platforms:
ls1043a, ls1046a, ls1088a and ls2088a.
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
TFABOOT support includes:
- ls2088aqds_tfa_defconfig to be loaded by trusted firmware
- environment address and size changes for TFABOOT
Signed-off-by: Pankit Garg <pankit.garg@nxp.com>
Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
TFABOOT support includes:
- ls2088ardb_tfa_defconfig to be loaded by trusted firmware
- environment address and size changes for TFABOOT
- define BOOTCOMMAND for TFABOOT
- remove EL3 specific erratas for TFABOOT
Signed-off-by: Pankit Garg <pankit.garg@nxp.com>
Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
TFABOOT support includes:
- ls1088aqds_tfa_defconfig to be loaded by trusted firmware
- environment address and size changes for TFABOOT
- MC address changes for TFABOOT
- define BOOTCOMMAND for TFABOOT
- ifc chip select changes for TFABOOT
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Signed-off-by: Pankit Garg <pankit.garg@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
TFABOOT support includes:
- ls1088ardb_tfa_defconfig to be loaded by trusted firmware
- environment address and size changes for TFABOOT
- MC address changes for TFABOOT
- define BOOTCOMMAND for TFABOOT
- ifc chip select changes for TFABOOT
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Signed-off-by: Pankit Garg <pankit.garg@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Fixes for TFABOOT framework
- update eMMC bootsrc to SD_MMC
- Increase buffer size for mcinitcmd from 256 to 512
- Fix mcinitcmd and bootcmd for Secure Boot
Signed-off-by: Pankit Garg <pankit.garg@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
This fixes 'arch_lmb_reserve()' for ARM that tries to detect in which
DRAM bank 'sp' is in.
This code failed if a bank was at the end of physical address range
(i.e. size + length overflowed to 0).
To fix this, calculate 'bank_end' as 'size + length - 1' so that such
banks end at 0xffffffff, not 0.
Fixes: 15751403b6 ("ARM: bootm: don't assume sp is in DRAM bank 0")
Reported-by: Frank Wunderlich <frank-w@public-files.de>
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
This fixes CVE-2018-18439 ("insufficient boundary checks in network
image boot") by using lmb to check for a valid range to store
received blocks.
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
[trini: Always build lib/lmb.o on LMB and lib/fdtdec.o on OF_LIBFDT]
Signed-off-by: Tom Rini <trini@konsulko.com>
lmb.h includes an extern declaration of "struct lmb lmb;" which
is not used anywhere, so remove it.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
This fixes CVE-2018-18440 ("insufficient boundary checks in filesystem
image load") by using lmb to check the load size of a file against
reserved memory addresses.
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This adds two new functions, lmb_alloc_addr and
lmb_get_unreserved_size.
lmb_alloc_addr behaves like lmb_alloc, but it tries to allocate a
pre-specified address range. Unlike lmb_reserve, this address range
must be inside one of the memory ranges that has been set up with
lmb_add.
lmb_get_unreserved_size returns the number of bytes that can be
used up to the next reserved region or the end of valid ram. This
can be 0 if the address passed is reserved.
Added test for these new functions.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
boot_fdt_add_mem_rsv_regions() adds reserved memory sections to an lmb
struct. Currently, it only parses regions described by /memreserve/
entries.
Extend this to the more commonly used scheme of the "reserved-memory"
node.
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
lmb_add_region handles overlapping regions wrong: instead of merging
or rejecting to add a new reserved region that overlaps an existing
one, it just adds the new region.
Since internally the same function is used for lmb_alloc, change
lmb_add_region to reject overlapping regions.
Also, to keep reserved memory correct after 'free', reserved entries
created by allocating memory must not set their size to a multiple
of alignment but to the original size. This ensures the reserved
region is completely removed when the caller calls 'lmb_free', as
this one takes the same size as passed to 'lmb_alloc' etc.
Add test to assert this.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
The lmb code fails if base + size of RAM overflows to zero.
Fix this by calculating end as 'base + size - 1' instead of 'base + size'
where appropriate.
Added tests to assert this is fixed.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Add basic tests for the lmb memory allocation code used to reserve and
allocate memory during boot.
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The spi_flash_read_env function is a wrapper over spi_flash_read, which
enables the env to read multiple flash page size from flash until '\0\0'
is read or the end of env partition is reached. Instead of reading the
entire env size. When it reads '\0\0', it stops reading further the env
and assumes that the rest of env is '\0'.
This is an optimization for large environments that contain few bytes
environment variables. In this case it doesn't need to read the entire
environment and only few pages.
Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Each ECC layout consumes about 2984 bytes in the .data section. Allow
to disable the default ECC layouts if a driver is known to provide its
own ECC layout.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
Set the correct power-up state (default-state) of the green power LED.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
With the new SPI NOR framework in v4.19, we need to adapt the MTD parts
so that the kernel cmdline parameter "mtdparts=" uses the correct naming
for the devices.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Add board support and configuration for Jaguar2 SOC family.
The detection of the board type in this family is based on the phy ids.
Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
As the Ocelot and Luton SoCs, this family of SoCs are found
in Microsemi Switches solution.
Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
The Jaguar2 SOC family has 63 gpio pins therefore I extended mscc-common
to support new numbe of pins and remove any platform dependency from
mscc-common.
Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
With the new mscc_bb_spi.c driver, there is no longer use for the
gpio-mscc-bitbang-spi.c driver.
Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Thes patch change the luton base device tree to use the newly added
SPI bitbang driver.
It also updates the "mscc_luton_defconfig" to use the new driver.
Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
This patch add a new SPI driver for MSCC SOCs that does not sport the
designware SPI hardware controller.
Performance gain: 7.664 seconds vs. 17.633 for 1 Mbyte write.
Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Do not build write support, unless it's enabled.
In the SPL case, this change will typically remove
precious bytes (as write support is most often
not needed in SPL).
This is important on this platform, where the maximum
SPL size is 14 KiB.
With gcc v7.3, this change saves 144 bytes producing:
size spl/u-boot-spl
text data bss dec hex filename
9240 752 712 10704 29d0 spl/u-boot-spl
To make the code easier to compile-out and more
readable, a pair of read_data/write_data helpers are created.
Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Use CONFIG_IS_ENABLED(BLK) instead of CONFIG_BLK,
in order to fix the following build issues when
CONFIG_SPL_MMC_WRITE is selected:
drivers/mmc/mmc_write.c:69:7: error: conflicting types for 'mmc_berase'
ulong mmc_berase(struct udevice *dev, lbaint_t start, lbaint_t blkcnt)
^~~~~~~~~~
In file included from drivers/mmc/mmc_write.c:15:0:
drivers/mmc/mmc_private.h:39:7: note: previous declaration of 'mmc_berase' was here
ulong mmc_berase(struct blk_desc *block_dev, lbaint_t start, lbaint_t blkcnt);
^~~~~~~~~~
drivers/mmc/mmc_write.c:187:7: error: conflicting types for 'mmc_bwrite'
ulong mmc_bwrite(struct udevice *dev, lbaint_t start, lbaint_t blkcnt,
^~~~~~~~~~
In file included from drivers/mmc/mmc_write.c:15:0:
drivers/mmc/mmc_private.h:37:7: note: previous declaration of 'mmc_bwrite' was here
ulong mmc_bwrite(struct blk_desc *block_dev, lbaint_t start, lbaint_t blkcnt,
^~~~~~~~~~
Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
There is no real difference between the generic variant and
the custom variant except that the generic variant is more
optimised. This also saves 24 Bytes in the SPL binary.
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Tested-by: Ezequiel Garcia <ezequiel@collabora.com>
Discard ABI related sections which are not required for debugging.
Rearrange debug sections similar to Linux. Remove the remaining
explicitely specified sections in the unused part because those
sections are not created anymore or because the linker puts them
by default at the end of the ELF binary.
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Tested-by: Ezequiel Garcia <ezequiel@collabora.com>
This enables the use of the MSCC serial GPIO driver to control the
LEDs on the MSCC VCoreIII 'ocelot' pcb123 and pcb120.
Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com>
This enables the use of the MSCC serial GPIO driver on the MSCC
VCoreIII 'ocelot' SOC, and add gpio-leds nodes to the pcb123 and
pcb120 DT.
Signed-off-by: Lars Povlsen <lars.povlsen@microsemi.com>
This enables the use of the MSCC serial GPIO driver to control the
LEDs on the MSCC VCoreIII 'luton' SoC.
Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com>
This enables the use of the MSCC serial GPIO driver, and add gpio-leds
nodes to the 'luton' pcb090 and pcb091 DT.
Signed-off-by: Lars Povlsen <lars.povlsen@microsemi.com>
This add support for the the MSCC serial GPIO driver in MSCC
VCoreIII-based SOCs.
By using a serial interface, the SIO controller significantly extends
the number of available GPIOs with a minimum number of additional pins
on the device. The primary purpose of the SIO controller is to connect
control signals from SFP modules and to act as an LED controller.
This adds the base driver.
Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com>
As we are moving to multi-dtb and board detection, remove static board
config options, and introduce board probing instead.
Luton: This add single-binary support for the two MSCC luton-based
reference boards - pcb090 and pcb091. The SoC chip ID is used to
determine the board type.
Ocelot: This add single-binary support for the two MSCC ocelot-based
reference boards - pcb120 and pcb123. The PHY ids on specific ports
are used to determine the board type.
Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com>
This prepares individual device trees for MSCC luton-based reference
boards - pcb090 and pcb091.
Note: Even though the devices trees are quite common, they will differ
significantly in coming patches.
Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com>
The GPIO control function can be used for controlling alternate
functions associated with a GPIO.
Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com>
Fix recent changes to serial API for driver model
Buildman clang support and a few fixes
Small fixes to 'dm tree' and regmap test
Improve sandbox build compatibility
A few other minor fixes
Add the dollar_complete() function to auto-complete arguments starting
with a '$' and use it in the cmd_auto_complete() path such that all
args starting with a $ can be auto-completed based on the available env
vars.
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
[trini: Fix some linking problems]
Signed-off-by: Tom Rini <trini@konsulko.com>
Switching private data manual allocation to driver model auto allocation
so users no longer need to deallocate themself because this would be
deallocated by driver model when the device is no longer required.
Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
It's way simpler this way, and we also gain auto-completion support for
free (MTD name auto-completion has been added with mtd_name_complete())
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Most cmd/xxx.c source files expose several commands through a single
entry point. Some of them are doing the sub-command parsing manually in
their do_<cmd>() function, others are declaring a table of sub-commands
and then use find_cmd_tbl() to delegate the request to the sub command
handler.
In either case, the amount of code to do that is not negligible and
repetitive, not to mention that almost no commands are implementing
the auto-completion hook, which means most u-boot commands lack
auto-completion.
Provide several macros to easily define commands exposing sub-commands.
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
The repeatable property is currently attached to the main command and
sub-commands have no way to change the repeatable value (the
->repeatable field in sub-command entries is ignored).
Replace the ->repeatable field by an extended ->cmd() hook (called
->cmd_rep()) which takes a new int pointer to store the repeatable cap
of the command being executed.
With this trick, we can let sub-commands decide whether they are
repeatable or not.
We also patch mmc and dtimg who are testing the ->repeatable field
directly (they now use cmd_is_repeatable() instead), and fix the help
entry manually since it doesn't use the U_BOOT_CMD() macro.
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Some commands have a table of sub-commands. With minor adjustments,
complete_cmdv() is able to provide auto-completion for sub-commands
(it's just about passing the table of commands instead of taking the
global one).
We rename this function into complete_subcmd() and implement
complete_cmdv() as a wrapper around complete_subcmdv().
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
When auto-completing command arguments, the last argument is not
necessarily the one we need to auto-complete. When the last character is
a space, a tab or '\0' what we want instead is list all possible values,
or if there's only one possible value, place this value on the command
line instead of trying to suffix the last valid argument with missing
chars.
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Cache up to 4 kiB entries. 4 kiB is the default block size on ext4, yet
the underlying block layer devices usually report support for 512B . In
most cases, the 512B support is emulated (ie. SD cards, SSDs, USB sticks
etc.) and the real block size of those devices is much bigger.
To avoid performance degradation with such devices and FS setup, bump
the maximum cache entry size to 4 kiB.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
With the current Makefile, CONFIG_BOARD_SIZE_LIMIT is used to check
the U-Boot binary without devicetree only. This produces wrong results
when OF_SEPARATE is used.
To fix this, run the CONFIG_BOARD_SIZE_LIMIT check on all .img binaries
as well.
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Based on the following Linux commits:
- 54a702f70589 ("kbuild: mark $(targets) as .SECONDARY and remove
.PRECIOUS markers")
- 8e9b61b293d9 ("kbuild: move .SECONDARY special target to
Kbuild.include")
GNU Make automatically deletes intermediate files that are updated
in a chain of pattern rules.
Example 1) %.dtb.o <- %.dtb.S <- %.dtb <- %.dts
Example 2) %.o <- %.c <- %.c_shipped
A couple of makefiles mark such targets as .PRECIOUS to prevent Make
from deleting them, but the correct way is to use .SECONDARY.
.SECONDARY
Prerequisites of this special target are treated as intermediate
files but are never automatically deleted.
.PRECIOUS
When make is interrupted during execution, it may delete the target
file it is updating if the file was modified since make started.
If you mark the file as precious, make will never delete the file
if interrupted.
Both can avoid deletion of intermediate files, but the difference is
the behavior when Make is interrupted; .SECONDARY deletes the target,
but .PRECIOUS does not.
The use of .PRECIOUS is relatively rare since we do not want to keep
partially constructed (possibly corrupted) targets.
.SECONDARY with no prerequisites causes all targets to be treated as
secondary. This agrees the policy of Kbuild.
scripts/Kbuild.include seems a suitable place to add it because it is
included from almost all sub-makes.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Linux commit 9c2af1c7377a8a6ef86e5cabf80978f3dbbb25c0
If Make gets a fatal signal while a shell is executing, it may delete
the target file that the recipe was supposed to update. This is needed
to make sure that it is remade from scratch when Make is next run; if
Make is interrupted after the recipe has begun to write the target file,
it results in an incomplete file whose time stamp is newer than that
of the prerequisites files. Make automatically deletes the incomplete
file on interrupt unless the target is marked .PRECIOUS.
The situation is just the same as when the shell fails for some reasons.
Usually when a recipe line fails, if it has changed the target file at
all, the file is corrupted, or at least it is not completely updated.
Yet the file’s time stamp says that it is now up to date, so the next
time Make runs, it will not try to update that file.
However, Make does not cater to delete the incomplete target file in
this case. We need to add .DELETE_ON_ERROR somewhere in the Makefile
to request it.
scripts/Kbuild.include seems a suitable place to add it because it is
included from almost all sub-makes.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Multiple people have reported intermittent build failure in parallel
building.
Kever Yang reported this issue some time ago [1], but I could not
get enough clue at that time.
This time, Richard Purdie provided a full build log [2], which was
very helpful for me to root-cause it.
The cause of the problem is commit 0d982c5853 ("Makefile: add
dependencies to regenerate u-boot.cfg when lost").
That commit added the 'cfg' as the prerequisite of the 'all' target,
so the parallel build tries to run it simultaneously, then regenerates
a symlink while building objects.
When u-boot.cfg is accidentally lost, let's rebuild it before
descending into any subdirectories.
Also, what is annoying is u-boot.cfg is currently regenerated every
time since it depends on FORCE. We can get rid of all the prerequisites
of u-boot.cfg because u-boot.cfg is rebuilt anyway as the byproduct of
auto.conf when a user updates the .config file.
[1] https://lists.denx.de/pipermail/u-boot/2018-June/330341.html
[2] https://autobuilder.yoctoproject.org/typhoon/#/builders/65/builds/160/steps/7/logs/step1b
Fixes: 0d982c5853 ("Makefile: add dependencies to regenerate u-boot.cfg when lost")
Reported-by: Kever Yang <kever.yang@rock-chips.com>
Reported-by: Richard Purdie <richard.purdie@linuxfoundation.org>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
If _debug_uart_putc() is called before _debug_uart_init(), the
ns16550 debug uart driver hangs in a tight loop waiting for the
tx FIFO to get empty.
As this can happen via a printf sneaking in before the port calls
debug_uart_init(), introduce a config option to ignore characters
before the debug uart is initialized.
This is done by reading the baudrate divisor and aborting if is zero.
The Kconfig option is required as reading the baudrate divisor does
not seem to work for all ns16500 compatibles (which is why the last
attempt on this has been reverted in 1a67969a99).
Tested on socfpga_cyclone5_socrates.
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
DEBUG_UART_SKIP_INIT is used only by debug UART and thus should depend
on DEBUG_UART.
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Commit 2c77c0d652 ("xyz-modem: Change getc timeout loop waiting")
fixes the loop delay when using a hw watchdog, assuming that watchdog
kicking is taken care of by getc(). But the xyzmodem driver tries to
do a getc only after confirming that a character is available like below:
while (!tstc()) {
till timeout;
}
if (tstc())
*c = getc();
and getc() does a watchdog reset only if it fails to see a character.
In this case, getc() always sees a character and never does a
watchdog reset. So to make sure that watchdog doesn't get reset
while loading the file, do a watchdog reset just before starting the
image loading.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
pylibfdt needs Python 2 to build.
Replace $(PYTHON) with $(PYTHON2) in pylibfdt Makefile
to ensure Python 2 is used to build it.
This fixes build on systems where Python 3 is the default version
of the "python" interpreter.
Reviewed-by: Simon Glass <sjg@chromium.org>
The uuid command is only really useful in U-Boot, but it's useless in
SPL. Worse yet, it pulls in various environment manipulation functions
as it call env_set(). Do not compile the command in in SPL.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Tom Rini <trini@konsulko.com>
Add support for gunzip-ing gzip-compressed uImages in the SPL Ymodem code.
Loading data over Ymodem can be gruelingly slow, gzip-ing the data can
reduce that aggravating slowness at least slightly (depends on the data,
u-boot.bin compresses to ~1/3 of it's original size on ARM64), hence add
optional support for decompressing gzip-compressed uImages.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Tom Rini <trini@konsulko.com>
The platdata initialization structs are currently generated into .rwdata.
Make sure the are put into .rodata by generating them as const.
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
test->time_ms[] is defined as unsigned. So use %u for printf().
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
gpio is defined as unsigned int. So we should use %u when calling printf().
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Building with CONFIG_OF_EMBED generates build warnings, as it should
only be used for debugging purposes.
Remove CONFIG_OF_EMBED from all stm32 config files which are using
this flag.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Make sure the block cache is cleared for the MMC device after it was
reinitialized to avoid having any stale data in the cache, like e.g.
partition tables or such.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
In case the card is removed, force-init the MMC to start the internal
machinery which deregisters and invalidate the MMC device.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
The mmc_select_mode_and_width() function can be called while the card
is in HS200/HS400 mode and can be used to downgrade the card to lower
mode, e.g. HS. This is used for example by mmc_boot_part_access_chk()
which cannot access the card in HS200/HS400 mode and which is in turn
called by saveenv if env is in the MMC.
In such case, forcing the card clock to legacy frequency cannot work.
Instead, the card must be switched to HS mode first, from which it can
then be reprogrammed as needed.
However, this procedure needs additional code changes, since the current
implementation checks whether the card correctly switched to HS mode in
mmc_set_card_speed(). The check only expects that the card will be going
to HS mode from lower modes, not from higher modes, hence add a parameter
which indicates that the HS200/HS400 to HS downgrade is happening. This
makes the code send the switch command first, reconfigure the controller
next and finally perform the EXT_CSD readback check. The last two steps
cannot be done in reverse order as the card is already in HS mode when
the clock are being switched on the controller side.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
This adds device tree for OMAP3 IGEP based boards and the DM_MMC driver.
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
The USB support for this board was never really tested, in fact, the
presence of these options are more a copy & paste error from the
Beagleboard than a feature that really was used. As doesn't work, remove
for now. If someone at some point want to add this support he'll need to
migrate the board to use CONFIG_DM_USB instead.
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
The IGEP0032 board was never officially pushed upstream and actually I
don't have access to this hardware, unless someone with the hardware
wants to start working on this doesn't makes sense have this defconfig
here. So remove it.
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Some tests have ended up using double quotes where single quotes could be
used. Adjust this for consistency with the rest of U-Boot's Python code.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Add MMC nodes for HiKey board based on HI6220 SoC. There are three MMC
controllers in this SoC, first one used for eMMC, second one used
for SD card and third one is not used by u-boot.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Updates i2c muxes drivers to support livetree.
Similar changes were done by:
"net: zynq_gem: convert to use livetree"
(sha1: 26026e695a)
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
We need to define the standalone load address to use standalone
application on qemu-riscv. Define it and set it equal to
CONFIG_SYS_LOAD_ADDR.
To not overwrite it, change the assigned of CONFIG_STANDALONE_LOAD_ADDR
in arch/riscv/config.mk to a conditional one.
Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Register x19 (s3) is a callee-saved register. It must not be used to
load and jump to exported functions without saving it beforehand.
Replace it with t0, a temporary and caller-saved register.
Change the code comment to reflect this and fix it to correctly list gp
as the register with the pointer to global data.
Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Standalone applications do not require a separate linker script and can
use the default linker script of the compiler instead. Remove the RISC-V
standalone linker script.
Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
The flush_cache() function in lib/cache.c ignores its arguments and
flushes the complete data and instruction caches. Use the
invalidate/flush_*cache_range() functions instead to only flush the
requested memory region.
This patch does not change the current behavior of U-Boot, since the
implementation of the invalidate/flush_*cache_range() functions flush
the complete data and instruction caches. It is in preparation for CPUs
with the necessary functionality for flushing a selectable memory range.
Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
The fence instruction is used to enforce device I/O and memory ordering
constraints in RISC-V. It can not be relied on to directly affect the
data cache on every CPU.
Andes' AX25 does not have a coherence agent. Its fence instruction
flushes the data cache and is used to keep data in the system coherent.
The implementation of flush_dcache_all in lib/cache.c is therefore
specific to the AX25. Move it into the AX25-specific cache.c in
cpu/ax25/.
This also adds a missing new line between flush_dcache_all and
flush_dcache_range in lib/cache.c.
Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Undefined exceptions are treated as reserved. This is not clearly
communicated to the user. Adjust the error message to clarify that a
reserved exception has occurred and add additional details.
Fixes: e8b522b ("riscv: treat undefined exception codes as reserved")
Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
With 8 bytes addressing even on 32 bit machines these checks
are no longer valid. Remove them.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
when running the date command on sandbox_defconfig an error occurs:
./u-boot -D u-boot.dtb
=> date
i2c_emul_find() No emulators for device 'rtc@43'
## Get date failed
Correct the references to the emulator devices in the sandbox device trees
using test.dts as a reference.
Fixes: 031a650e13 ("dm: sandbox: i2c: Use new emulator parent uclass")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Dropped unnecessary #address/size-cells property in i2c_emul:
Signed-off-by: Simon Glass <sjg@chromium.org>
The getconfig() comment is out of date. Fix this and add comments for
recently added functions.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
All driver-model functions should have a device as the first parameter.
Update this function accordingly.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
All driver-model functions should have a device as the first parameter.
Update this function accordingly.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
All driver-model functions should have a device as the first parameter.
Update this function accordingly.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
We should not be adding new functions to common.h. Move these recently
added functions to serial.h.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
At present this stores the error number in an unsigned int so an error is
never detected. Use the existing signed variable instead.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
At present logging does not check printf() arguments. Now that all users
have been corrected, enable this to prevent further problems.
Signed-off-by: Simon Glass <sjg@chromium.org>
The printf() string here is not actually correct. Add a cast to avoid
a warning when checking is enabled.
Signed-off-by: Simon Glass <sjg@chromium.org>
The check for CONFIG_SANDBOX_SDL in config.mk does not work since the
build config is not available by the time that file is included. Remove it
so that we always call sdl-config except when NO_SDL is used.
Signed-off-by: Simon Glass <sjg@chromium.org>
The 'done' files created by buildman may end up being empty if buildman
runs out of disk space while writing them. This error is then persistent,
since even if disk space is reclaimed and the build retries, the empty
file causes an exception in the builder thread.
Deal with this silently by doing a rebuild.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present one of the regmap tests takes 5 seconds to run since it waits
for a timeout. This should be handled using sandbox_timer_add_offset()
which advances time for test purposes.
This requires a little change to make the regmap_read_poll_timeout()
testable.
Update the macro and the test.
Fixes: ebe3497c9c ("test: regmap: add regmap_read_poll_timeout test")
Signed-off-by: Simon Glass <sjg@chromium.org>
We usually deal with hexadecimal addresses and sizes in
device-tree. Its much easier if debug logs print hexadecimal
values too.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
At present the 'Index' column assumes there is only one digit. But on some
devices (e.g. snow) there are a lot of regulators and GPIO banks. Adjust
the output to allow for two digits without messing up the display.
Also capatalise the heading to match.
Fixes: 5197dafc42 (dm: core: Widen the dump tree to show more of the
driver's name.)
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Liviu Dudau <liviu.dudau@foss.arm.com>
Default 8MB gunzip size is not enough to load the release kernel, hence
fix 64MB size for uncompressing the kernel.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
This patch replace OF_EMBED with OF_SEPARATE of defconfig files of
MediaTek boards because now OF_EMBED is only used for debugging purpose.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Enable ethernet related configs to mt7629_rfb_defconfig.
Add default IP addresses.
Enable noncached memory region required by ethernet driver.
Signed-off-by: Mark Lee <Mark-MC.Lee@mediatek.com>
Enable ethernet related configs to mt7623n_bpir2_defconfig.
Add default IP addresses.
Enable noncached memory region required by ethernet driver.
Signed-off-by: Mark Lee <Mark-MC.Lee@mediatek.com>
The ethsys contains not only the clock gating controller, but also the
reset controller for the whole ethernet subsystem and its components.
This patch adds binding of the reset controller so that the ethernet node
can have references on it.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
It enables DWC2 OTG gadget driver support for Poplar board. As
usb2_phy_init() is being always called from board_init(), we can save
the call from board_usb_init().
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Booting an image currently sets the environment variable "fdtaddr"
by calling into 'cmd/fdt.c'. As a result, linking U-Boot fails if
CMD_FDT is not enabled.
Fix this by adding 'if (CONFIG_IS_ENABLED(CMD_FDT))' to the two
places where 'set_working_fdt_addr()' is called.
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Add a test for the bootcount uclass, which uses the RTC bootcount backend
(i.e. drivers/bootcount/rtc.c is implictly also tested).
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2019-01-14 17:41:23 -05:00
1291 changed files with 44532 additions and 14709 deletions
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