Build from:
10777823fd dram_init: rk3308: Update to v2.08
Update features:
8c1b6235d0 dram_init: common: add sram base judge for arm
dfb48851bc drivers: ram: rk3308: Support for calling dram_check bin
Change-Id: Ia3c2b8ef2ddfef42d3527cf74b7053a63a228819
Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
build from:
38fed2d628d configs: Add rk3576 decom support
update feature:
Support fspi1.
Change-Id: I6f0434243326980ae7997b5b355901fd181a906c
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
build from rockit-ko commit in master branch:
db3c2c7 mcu_bin: support multiple pipe wrap version v1.7.0rc11
build from hal commit in master branch:
https://10.10.10.29/c/rk/mcu/hal/+/170393
a76806e7 project: common: riscv: change riscv toolchain to xpack
Signed-off-by: aaron.sun <aaron.sun@rock-chips.com>
Change-Id: Ie7a65d2b3d46eeea415beba8ea8bc5c97ea6d1be
Build from ATF commit:
5784c4ac0 plat: rk3576: enable stimer1 ch5 for gpu
update feature:
5784c4ac0 plat: rk3576: enable stimer1 ch5 for gpu
b5f21da68 plat: rk3576: support auto cs
93cb27b3e plat: rockchip: rk3576: litcore and bigcore use unclean src
62fa83468 plat: rk3576: sleep: Fix cpu mem cfg error when resume
61d57ae03 plat: rk3576: hptimer don't switch to 32k if ultra-sleep or normal mode
f1e8d5488 plat: rk3576: support hdcp
b9dd78c21 plat: rk3576: restore pd only in pmu_power_domains_resume
Change-Id: Id4404acf5009596666cc00a472afcbc1c0eb3c91
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
build from:
2e0089635a3 dram_init: rk3576: update to v1.02
update feature:
1. Fixed VOP will flash with POST_BUF_EMPTY, When DDR is under heavy load,
especially when GPU and RKNN are under heavy load.
Signed-off-by: CanYang He <hcy@rock-chips.com>
Change-Id: Iff402d70817a39645d61f3f28aa4a84f889f3bbe
from commit:
20b8d8f8d src: spinand: Support new device W25N01JWZEIG
update feature:
Support new SPI Flash
Change-Id: I458b0639a299722ffa3b69522b80248717f9f2ff
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
build from commit:
rtt:4f71a2d#hal:8966acbf#battery_ipc:1497fb5
build from rt-thread commit in master branch:
4f71a2d: bsp: rockchip: board: add sc450ai boardcfg
build from hal commit in master branch:
8966acbf: rv1106-mcu: Optimize bss zero init time cost
build from battery_ipc commit in master branch:
1497fb5: fastae: 2.3.2-rc1
Change-Id: I805514e21b953e20764a563176205edefff87d8a
Signed-off-by: Lan Honglin <helin.lan@rock-chips.com>
build from:
9fffbe1e78 rk3588: ddr: adjust hash description
update feature:
1. Modify the LPDDR5 frequency to improve stability.
2. Add support dram with CS0 capacity less than CS1 capacity.
3. Modify the DERATEINT.mr4_read_interval configuration.
4. Fixed derate issue with LPDDR5 of one rank.
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Change-Id: Id6f200c8ed9ec4f71f79b8050608cb928658a276
build from:
2d653b3476 rk356x: ddr: update ddrbin to v1.21
build command:
./make.sh rk3568
update feature:
1. Fixed issue that CA training may be missed during reboot.
Signed-off-by: Tang Yun ping <typ@rock-chips.com>
Change-Id: Ice4e9fbcb4304e8591c9155c09cd616d340d598a
build from:
2d653b3476 rk356x: ddr: update ddrbin to v1.21
build command:
./make.sh rk3568
update feature:
1. Fixed issue that CA training may be missed during reboot.
Signed-off-by: Tang Yun ping <typ@rock-chips.com>
Change-Id: I0db741443e2af91ce760596f8a7cae5ce13eb24c
build from:
328b43930e rk356x: ddr: en lp4/4x rx odt when freq greater than 600MHz
build command:
./make.sh rk3568
update feature:
1. Fixed 6GB LPDDR4/4x initialization failure problem.
2. LPDDR4/4X enable 780MHz read odt。
3. Eanble read/write vref training to improve
compatibility.(can be disable using ddrbin_tool).
4. Fixed issue that CA training may be missed during reboot.
Signed-off-by: Tang Yun ping <typ@rock-chips.com>
Change-Id: I6e4d68add07b38746f4aaf04591bbf090f5177f6
build from commit:
rtt:4797a34#hal:8966acbf#battery_ipc:1497fb5
build from rt-thread commit in develop branch:
4f71a2d: bsp: rockchip: board: add sc450ai boardcf
build from hal commit in master branch:
8966acbf: rv1106-mcu: Optimize bss zero init time cost
build from battery-ipc commit in master branch:
1497fb5: fastae: 2.3.2-rc1
Signed-off-by: Weiwen Chen <cww@rock-chips.com>
Change-Id: Icf935e3392e6f5a47bf172ddd523e14cc1429296
build from:
77170a5e90 rk356x: ddr: en lp4/4x rx odt when freq greater than 600MHz
build command:
./make.sh rk3568
update feature:
1. When DDR ECC is enabled, ensure the correctness of the
ECC of the pstore segment memory after restarting.
2. Update DDR3/LPDDR3 rd/wr training pattern to improve
read and write signal margin.
3. Fixed 6GB LPDDR3/4 initialization failure problem.
4. LPDDR4/4X enable 780MHz read odt。
5. Eanble read/write vref training to improve
compatibility.(can be disable using ddrbin_tool).
Signed-off-by: Tang Yun ping <typ@rock-chips.com>
Change-Id: I1ef3ac7528106b937da236529d1a2f26041b5ce0
update feature:
1. add ext_temp_ref and derate_en support for
loader parameter V1.
Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
Change-Id: I02fbac315b9f977cfb481bd1aff1429ca481d1c1
build from: develop-rk3399
56fe57e2a rockchip: add fw_version_string support
update feature:
d5c94a81c rockchip: atags: Fix last valid tag be damaged when
override tag
00daa97cb rockchip: atags: Add fwver tag support
77e684e69 rockchip: add pstore rk_atags support
9883237b5 rockchip: common: Add boot1 param for atags
8a1371323 plat: rk1808: support 2x/4x refresh for Extended
temperature range
Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
Change-Id: Ic591082ff66763cfd9abd27cb8a052506f9f3561
build from:
4d116dc75c dram init: rk1808: update ddr bin version to v1.06
update feature:
127a13a4e9 dram_init: rk1808: support 2x/4x refresh for Extended
temperature
Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
Change-Id: I726955f764fddfb0c2bdb77633d2bc386d7a1e27
from commit:
f34544a rk_boot_all
update fiture:
src: spinand: Assign global variables read address
Change-Id: I14cff3609444e0c4bad5397095ef5c8dcb3a9cb2
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
build from:
361b05c rv1108K: 2x refresh for Extended temperature range
Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
Change-Id: I593a316b6bd5f8d2bc414459695641d712a8bc54
Build from ATF commit:
46064b2d5 plat: px30: dram: support 2x/4x refresh for
Extended temperature range
update feature:
46064b2d5 plat: px30: dram: support 2x/4x refresh for
Extended temperature range
Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
Change-Id: I6878e9c95e21649df071d6b6a379417dca078f96
Build from ATF commit:
46064b2d5 plat: px30: dram: support 2x/4x refresh for
Extended temperature range
update feature:
46064b2d5 plat: px30: dram: support 2x/4x refresh for
Extended temperature range
Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
Change-Id: I8237068a156b808f4dcb5a1e99629ccbb9ab89e0
Build from:
bootloader: 35f57cde3 src: paltform: Update the version
Build command:
./tools/mk_pcie_idb.sh RK3568.
Update feature:
Update the version.
Change-Id: I41aab73ecd43800013ce245e7081dffd04eeaa42
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
Build from:
bootloader: 35f57cde3 src: paltform: Update the version
Build command:
./tools/mk_pcie_idb.sh RK3568.
Update feature:
Update the version.
Change-Id: Id2d613345d6bb396131837ba26fba9d9aa1b41f1
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
build from commit:
rtt:e31465907#hal:8966acbf#battery_ipc:1497fb5
build from rt-thread commit in develop branch:
e31465907: bsp: rockchip: camera: fix mclk is not in effect
build from hal commit in master branch:
8966acbf: rv1106-mcu: Optimize bss zero init time cost
build from battery-ipc commit in master branch:
1497fb5: fastae: 2.3.2-rc1
Signed-off-by: Weiwen Chen <cww@rock-chips.com>
Change-Id: I24fe88a2ea241768c7a9a7ae155efbce12e7ec37
Build from:
bootloader: I3e280b78 src: drivers: pcie: Fix ep bar capability
Build command:
./tools/mk_pcie_idb.sh RK3588.
Update feature:
Fix ep bar capability.
Change-Id: I77b20ffc14a8f49ffb44d5c46c766d2bc2e339b7
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
Build from:
bootloader: I3e280b78 src: drivers: pcie: Fix ep bar capability
Build command:
./tools/mk_pcie_idb.sh RK3568.
Update feature:
Fix ep bar capability.
Change-Id: I4a1abf545500be3f78a48fe91168911de65c17f0
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
build from commit:
rtt:0329fd0d9#hal:8966acbf#battery_ipc:0766081
build from rt-thread commit in develop branch:
0329fd0d9: bsp: rockchip: board: add rv1106_evb2-SC200AI-ADC
build from hal commit in master branch:
8966acbf: rv1106-mcu: Optimize bss zero init time cost
build from battery-ipc commit in master branch:
0766081: md: fix iso overflow
Signed-off-by: Weiwen Chen <cww@rock-chips.com>
Change-Id: I48829fd66fc39e6cf7a15b2c4f775c2fc6403758
build from commit:
rtt:0329fd0#hal:8966acbf#battery_ipc:0766081
build from rt-thread commit in master branch:
0329fd0: bsp: rockchip: camera: add support sc401ai thunder...
build from hal commit in master branch:
8966acbf: rv1106-mcu: Optimize bss zero init time cost
build from battery-ipc commit in master branch:
0766081: md: fix iso overflow
Signed-off-by: Wang Xiaobin <xb.wang@rock-chips.com>
Change-Id: I6e5b664bdea6b3aa3616979ca46b761546aa11bf
build from:
d5483af87d rk3588: ddr: update to v1.15
update feature:
1. avoid PHY skew value greater than dll lock value
2. fix the data training process
3. resume ZQ background calibration for LPDDR5
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Change-Id: I5857feb0a51e13d432f5bc8026263f4b57a64d6d
build from commit:
rtt:e31465907#hal:8966acbf#battery_ipc:0766081
build from rt-thread commit in develop branch:
e31465907: bsp: rockchip: camera: fix mclk is not in effect
build from hal commit in master branch:
8966acbf: rv1106-mcu: Optimize bss zero init time cost
build from battery-ipc commit in master branch:
0766081: md: fix iso overflow
Signed-off-by: Weiwen Chen <cww@rock-chips.com>
Change-Id: I5eb0f77d6e27701c56e1639b35fbd8c425754b2b
