This driver is only possible to build on ARCH_AIROHA, so update the
dependencies.
Fixes: 6134e4efd4 ("spi: airoha: Add Airoha SPI NAND driver")
Signed-off-by: Tom Rini <trini@konsulko.com>
In scmi_clk_probe(), in case of CLK_CCF is not enabled, parent private
data is not set, so in scmi_clk_gate(), an uninitialized priv struct is
retrieved.
SCMI request is performed either using scmi_clk_state_in_v1 or
scmi_clk_state_in_v2 struct depending of the unpredictable value of
priv->version which leads to error during SCMI clock enable.
Issue detected on STM32MP157C-DK2 board using the SCMI device tree
stm32mp157c-dk2-scmi.dts.
Fixes: 0619cb3203 ("firmware: scmi: Add clock v3.2 CONFIG_SET support")
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Replace %pe with %d and adjust the argument accordingly in a dev_err()
call in the pwm-aspeed driver. U-boot doesn't support the %pe format
specifier. Likely it was copied from Linux.
Signed-off-by: David Lechner <dlechner@baylibre.com>
Reviewed-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
tmp_buffer is allocated using malloc but failure
is not handled.
This commit ensures that we do not use a NULL pointer
if malloc fails.
Signed-off-by: Francois Berder <fberder@outlook.fr>
Our last sync with the kernel was 5.1.
We are so out of sync now, that tracking the patches and backporting
them one by one makes little sense and it's going to take ages.
This is an attempt to sync up Makefiles to 6.1.
Unfortunately due to sheer amount of patches this is not easy to review,
but that's what we decided during a community call for the bump to 5.1,
so we are following the same guidelines here.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>a #rebased on -next
Change mt8365_evk_defconfig to use CONFIG_OF_UPSTREAM=y and delete the
U-Boot copy of the devicetree source files for mt8365.
The upstream devicetree is identical to the U-Boot one being removed
(other than having more nodes for devices not used by U-Boot and
upstream fixed a compatible string in &scpsys, also not affecting
U-Boot).
There was one minor glitch with upstream missing a few topckgen macro
definitions, so those are added to the clock driver directly as a
workaround.
Reviewed-by: Macpaul Lin <macpaul.lin@mediatek.com>
Signed-off-by: David Lechner <dlechner@baylibre.com>
- Refactor tidss_drv to improve modularity, enabling support for more
display interfaces beyond OLDI in the future
- Add detection and initialization of active OLDI panels using the DT
- Port tidss_oldi.c from the upstream Linux kernel oldi series[0] and
derive several APIs from it to determine the dual link pixel order
- Add tidss_oldi_init() and helper routines to handle OLDI-specific
setup and move related helper routines to tidss_oldi.c
[0]: https://lore.kernel.org/all/20250528122544.817829-1-aradhya.bhatia@linux.dev/
Signed-off-by: Swamil Jain <s-jain1@ti.com>
Tested-by: Anshul Dalal <anshuld@ti.com>
Some framebuffers (i.e MediaTek) do not have regular stride - its line
length is more than the display width by 8 pixels (on MT6878). As such,
introduce the optional stride property, which fixes these framebuffers.
Signed-off-by: Igor Belwon <igor.belwon@mentallysanemainliners.org>
Julien Stephan <jstephan@baylibre.com> says:
Commit 2dcf143398 ("dm: video: Repurpose the 'displayport' uclass to 'display'")
left the display_read_edid() function unused by mistake.
This series addresses that oversight and introduces a new useful cmd.
Patch 1:
- Refactors display_read_timing() to use the existing
display_read_edid() function, eliminating redundant code.
- Marks display_read_edid() as static since it is not used outside of
the file.
Patch 2:
- Adds a new read_edid command, which can be very useful for debugging
or developing new display drivers.
- As this command uses display_read_edid(), the function is made
non-static again.
Link: https://lore.kernel.org/r/20250630-read_edid_cleanup-v1-0-ec7d425472c7@baylibre.com
Add a new command to read EDID info from connected display.
When applicable EDID can also be retrieved by commands such as:
i2c dev x
i2c edid 0x50
but the new read_edid function relies on the implementation of the
read_edid callback from DISPLAY driver.
Signed-off-by: Julien Stephan <jstephan@baylibre.com>
This driver references the SZ_ macros while relying on an indirection
inclusion of <linux/sizes.h>. Add the missing include directly.
Signed-off-by: Tom Rini <trini@konsulko.com>
The debug macros in this driver make use of the z prefix when printing
regular, non-size_t variables and this results in a warning. Drop 'z'.
Signed-off-by: Tom Rini <trini@konsulko.com>
This driver references IO macros while relying on an indirection
inclusion of <asm/io.h>. Add the missing include directly.
Signed-off-by: Tom Rini <trini@konsulko.com>
The logic for how to handle this video driver is slightly odd. Only in
the case of when CONFIG_VIDEO_LCD_PANEL_EDP_4_LANE_1620M_VIA_ANX9804 is
enabled do we need to have this file built, and otherwise we have a
dummy function in use. Correct the logic by only building this file when
needed.
Signed-off-by: Tom Rini <trini@konsulko.com>
A few video drivers cannot build without access to some platform
specific header files. Express those requirements in Kconfig as well.
Signed-off-by: Tom Rini <trini@konsulko.com>
Looking these drivers over, all of them cannot build without access to
some platform specific header files. Express those requirements in
Kconfig as well. Furthermore, update the logic a bit more to reflect
which parts are optional when other drivers are enabled and which parts
cannot be enabled (meaningfully) by themselves.
Reviewed-by: Svyatoslav Ryhel <clamor95@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Commit 2dcf143398 ("dm: video: Repurpose the 'displayport' uclass to 'display'")
left the display_read_edid() function unused by mistake.
Mark the function as static and reuse it within display_read_timing() to
avoid code duplication.
Signed-off-by: Julien Stephan <jstephan@baylibre.com>
Later versions of the datasheet makes it clear D3 do not have any
realtime module stop control registers (RMSTPCRx). Remove the
manipulation of them from the module clock table to match this.
Suggested-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Since commit a2bd99549c ("clk: renesas: Tear clock controller down
last before booting OS") enabling the module gated by bit 8 in MSTP4
prevents Linux from booting. The bits 8 and 7 of MSTP4 where only
documented in early versions of the datasheet and have since been
removed.
To allow Linux to boot update the MSTP4 enable value to reflect the
hardware default, 0x80.
Suggested-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/28866
- Swicth imx8ulp-evk to standard boot and OF_UPSTREAM.
- Cleanup of the IPUv3 video driver.
- Add support for the NXP FRDM-IMX91 board.
- Make flash.bin target available on i.MX9.
- Fix mxsfb pixel clock polarity.
Get rid of most globals that are spread around between TU's and place
them in their own structs managed by dm. Device state is now owned by
each driver instance. This design mirrors the Linux IPUv3 driver
architecture.
This work is done in preparation to migrate the driver to the clock
framework. While not the primary intent, this change also enables
multiple IPU instances to exist contemporarily.
Signed-off-by: Brian Ruley <brian.ruley@gehealthcare.com>
Bring driver up-to-date with U-Boot conventions, but also takes into
account SPL and TPL, let compiler optimize while keeping code more
readable.
Signed-off-by: Brian Ruley <brian.ruley@gehealthcare.com>
Bring the code into compliance with U-Boot's coding style guidelines for
upcoming changes. Sort includes to tidy things up and apply
{ RemoveBracesLLVM: true } to remove unnecessary blocks.
Signed-off-by: Brian Ruley <brian.ruley@gehealthcare.com>
If CONFIG_OF_PLATDATA=y , then the udevice has no valid OF node associated
with it and ofnode_valid(node) evaluates to 0. The dev_read_u32_default()
call ultimately reaches ofnode_read_u32_index() which invokes fdt_getprop()
and passes result of ofnode_to_offset(node) as an offset parameter into it.
The ofnode_to_offset(node) returns -1 for invalid node, which leads to an
fdt_getprop(..., -1, ...) invocation, which will crash sandbox with SIGSEGV
because libfdt can not handle negative node offsets without full tree check,
which U-Boot inhibits to keep size lower.
Since i2c_child_post_bind() already calls dev_has_ofnode(dev), reuse the
same call and assign i2c->speed_hz = I2C_SPEED_STANDARD_RATE in case the
device has no valid node associated with it, and do not call any of the
dev_read_*() functions for devices without valid nodes.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
The i2c_chip_of_to_plat() is called only from i2c_child_post_bind(),
inline i2c_chip_of_to_plat() into i2c_child_post_bind(). Drop the
if CONFIG_IS_ENABLED(OF_REAL) and depend on if (!dev_has_ofnode(dev))
which does check CONFIG_IS_ENABLED(OF_REAL) internally too.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
If CONFIG_OF_PLATDATA=y , then the udevice has no valid OF node associated
with it and ofnode_valid(node) evaluates to 0. The dev_read_u32_default()
call ultimately reaches ofnode_read_u32_index() which invokes fdt_getprop()
and passes result of ofnode_to_offset(node) as an offset parameter into it.
The ofnode_to_offset(node) returns -1 for invalid node, which leads to an
fdt_getprop(..., -1, ...) invocation, which will crash sandbox with SIGSEGV
because libfdt can not handle negative node offsets without full tree check,
which U-Boot inhibits to keep size lower.
Since gpio_sandbox_probe() already calls dev_has_ofnode(dev) and assigns
uc_priv->gpio_count to CONFIG_SANDBOX_GPIO_COUNT accordingly, add matching
dev_has_ofnode(dev) check into sandbox_gpio_of_to_plat() and do not call
any of the dev_read_*() functions for devices without valid nodes there
either.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
If CONFIG_OF_PLATDATA=y , then the udevice has no valid OF node associated
with it and ofnode_valid(node) evaluates to 0. The dev_read_u32_default()
call ultimately reaches ofnode_read_u32_index() which invokes fdt_getprop()
and passes result of ofnode_to_offset(node) as an offset parameter into it.
The ofnode_to_offset(node) returns -1 for invalid node, which leads to an
fdt_getprop(..., -1, ...) invocation, which will crash sandbox with SIGSEGV
because libfdt can not handle negative node offsets without full tree check,
which U-Boot inhibits to keep size lower.
Add dev_has_ofnode(dev) check and do not assign clock rate in case the
device has no valid node associated with it, and do not call any of the
dev_read_*() functions for devices without valid nodes.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
SPL_DM_PWM option simply doesn't exist. Moreover, drivers/pwm is only
included by drivers/Makefile for non-xPL stages so making
SPL_REGULATOR_PWM properly build for SPL/xPL is more involved than just
adding an SPL_DM_PWM option.
Reading the original commit (ddc824f89a ("power: regulator: Allow PWM
regulator to be omitted from SPL."), the intent seemingly wasn't to
allow building support in XPL but rather to allow removing it which is
done by using $(PHASE_) ($(SPL_) at that time) in the Makefile. If
anyone needs that, let them figure out what they need to do without
misleading potential users of this symbol by simply removing it.
Fixes: 2a846e04c6 ("power: regulator: Correct dependencies on SPL_REGULATOR_PWM")
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Anshul Dalal <anshuld@ti.com>
Reviewed-by: Kory Maincent <kory.maincent@bootlin.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
The PWM regulator driver is a uclass driver, thus requiring DM_PWM to be
enabled to be actually usable (and with the appropriate PWM controller
driver enabled as well, but that we cannot enforce easily), so let's add
this missing dependency.
Fixes: 1a01695615 ("power: regulator: add pwm regulator")
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
Reviewed-by: Anshul Dalal <anshuld@ti.com>
Reviewed-by: Kory Maincent <kory.maincent@bootlin.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
As in Linux with d78c0ced60 ("net: ravb: Make write access to CXR35 first
before accessing other EMAC register"), configure CXR31 and CXR35 correctly
on rzg2. MII mode does not work correctly unless those registers are
properly configured.
Signed-off-by: Mathieu Othacehe <othacehe@gnu.org>
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
The scsi_read function incorrectly decrements the block count twice
when handling large disks that trigger the CONFIG_SYS_64BIT_LBA code
path (reads beyond block 268,435,455). The variable 'blks' was being
decremented both inside the 64-bit LBA block and after the successful
scsi_exec() call, causing incorrect block count tracking and data
abort errors on large capacity disks.
Signed-off-by: Balaji Selvanathan <balaji.selvanathan@oss.qualcomm.com>
Tested-by: Tony Dinh <mibodhi@gmail.com>
AMD/Xilinx/FPGA changes for v2026.04-rc1
xilinx:
- Sync ESRT with detected GUID
- DT cleanups
- Add logic for FRU information multiple times
- Enable more drivers pca9541, usb5744
- Enable more commands
- Cleanup firmware DT bindings
firmware:
- Add enhancement SMC format support
clk/versal:
- Various cleanups
- Add support for Versal Gen 2
i2c:
- cdns: Add timeout for RXDV status bit polling
spi:
- cadence: Remove cdns,is-dma DT property
- cadence: Remove duplicated return
- cadence_versal: Update flash reset delay
memtop:
- Update max memory reserved spaces to 64
Versal Gen 2:
- Aligned addresses with default memory map
- Add support for reading multiboot value
MB-V:
- Make SPL smaller
- Add support for SPI
- Move SPL to run out of BRAM
ZynqMP:
- Change default load address for BL32
