Commit Graph

105784 Commits

Author SHA1 Message Date
Ferass El Hafidi
773aaf8f8c board: amlogic: add kconfig fragments for SPL
Add kconfig fragments for building SPL binaries for:
 · ODROID-C2
 · Videostrong KII Pro
 · Libre Computer LePotato (1 GB and 2 GB variants)

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Ferass El Hafidi <funderscore@postmarketos.org>
Link: https://patch.msgid.link/20251126-spl-gx-v5-8-6cbffb2451ca@postmarketos.org
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2025-12-11 11:44:41 +01:00
Ferass El Hafidi
236e4b1cc4 arm: dts: meson-gx-u-boot: add binman configuration for U-Boot SPL
Add binman configuration to meson-gx-u-boot.dtsi to automate building
bootable images using amlimage.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Ferass El Hafidi <funderscore@postmarketos.org>
Link: https://patch.msgid.link/20251126-spl-gx-v5-7-6cbffb2451ca@postmarketos.org
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2025-12-11 11:44:41 +01:00
Ferass El Hafidi
3d0a06aaec arm: dts: meson: add meson-gxbb-u-boot.dtsi
Add a common GXBB DTSI, similar to the meson-gxl-u-boot.dtsi file,
which GXBB devicetrees can include.

Signed-off-by: Ferass El Hafidi <funderscore@postmarketos.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://patch.msgid.link/20251126-spl-gx-v5-6-6cbffb2451ca@postmarketos.org
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2025-12-11 11:44:41 +01:00
Ferass El Hafidi
17d80a3b32 arm: meson: spl: add support for SPL DRAM init
Supports both GXBB and GXL SoCs.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Ferass El Hafidi <funderscore@postmarketos.org>
Link: https://patch.msgid.link/20251126-spl-gx-v5-5-6cbffb2451ca@postmarketos.org
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2025-12-11 11:44:41 +01:00
Ferass El Hafidi
f39f6eeaa8 arm: meson: initial u-boot SPL support for GX SoCs
Add initial boilerplate for U-Boot SPL support on Amlogic.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Ferass El Hafidi <funderscore@postmarketos.org>
Link: https://patch.msgid.link/20251126-spl-gx-v5-4-6cbffb2451ca@postmarketos.org
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2025-12-11 11:44:41 +01:00
Ferass El Hafidi
ec958be7cc serial: serial_meson: add minimal non-DM driver
It is very limited and minimal, only implements putc/puts.
This minimal driver is intended to be used in SPL, and other
size-constrained situations.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Ferass El Hafidi <funderscore@postmarketos.org>
Link: https://patch.msgid.link/20251126-spl-gx-v5-3-6cbffb2451ca@postmarketos.org
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2025-12-11 11:44:41 +01:00
Ferass El Hafidi
3eee9c1f61 mmc: meson_gx_mmc: add minimal non-DM driver
Add a minimal non-DM MMC driver for use in size-constrained
environments.

Signed-off-by: Ferass El Hafidi <funderscore@postmarketos.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://patch.msgid.link/20251126-spl-gx-v5-2-6cbffb2451ca@postmarketos.org
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2025-12-11 11:44:41 +01:00
Jonas Karlman
18c1654567 tools: mkimage: Add Amlogic Boot Image type
Add support for creating an Amlogic Boot Image that pass CHK in BL1 on
Amlogic AArch64 SoCs.

Images can optionally be signed for secure boot scenario, however
creation of signed images has not been implemented.

Example of how to use it:
  # Create an amlogic boot image
  tools/mkimage -T amlimage -n gxbb -d u-boot-spl.bin u-boot-amlogic.bin

  # List boot image header information
  tools/mkimage -l u-boot-amlogic.bin

  # Extract amlogic boot image payload
  tools/dumpimage -T amlimage -o bl2-payload.bin u-boot-amlogic.bin

Or with binman using something like:
  binman {
	u-boot-amlogic {
		filename = "u-boot-amlogic.bin";
		pad-byte = <0xff>;

		mkimage {
			filename = "bl2.bin";
			args = "-n", "gxbb", "-T", "amlimage";

			u-boot-spl {
			};
		};
	};
  };

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
[Ferass: check digest type in _print_header, version in _verify_image]
Signed-off-by: Ferass El Hafidi <funderscore@postmarketos.org>
Link: https://patch.msgid.link/20251126-spl-gx-v5-1-6cbffb2451ca@postmarketos.org
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2025-12-11 11:44:41 +01:00
Francois Berder
e672d4a472 board: freescale: Fix error handling in ls1088a board setup
- Add missing checks after calloc
 - Fix memory leak when handling calloc failure

Signed-off-by: Francois Berder <fberder@outlook.fr>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2025-12-11 18:42:21 +08:00
Tom Rini
a23a1e8ca5 ls1043a: Stop disabling device tree relocation
Remove setting of fdt_high to ~0, which disables device tree relocation,
from the default environment. Doing so prevents U-Boot from correcting
problems such as having an unaligned device tree and leads to various
failure modes in the OS.

Signed-off-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2025-12-11 18:42:20 +08:00
Tom Rini
d2f0eadb19 ls1012afrdm: Stop disabling device tree relocation
Remove setting of fdt_high to ~0, which disables device tree relocation,
from the default environment. Doing so prevents U-Boot from correcting
problems such as having an unaligned device tree and leads to various
failure modes in the OS.

Signed-off-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2025-12-11 18:42:20 +08:00
Jérémie Dautheribes
66be03b7ee binman: blob_dtb: improve error message when SPL is not found
When using binman with the '-a spl-dtb=y' flag, if the SPL blob is not
found, binman throws a cryptic error message:
binman: 'NoneType' object has no attribute 'startswith'

Let's improve the error message to explicitly state which SPL blob is
missing.
This is particularly useful when binman is used as a standalone tool
outside the U-Boot source tree.

Signed-off-by: Jérémie Dautheribes <jeremie.dautheribes@bootlin.com>
[trini: Add '# pragma: no cover' because coverage doesn't seem to like
the documentation about this error]
Signed-off-by: Tom Rini <trini@konsulko.com>
2025-12-10 13:45:29 -06:00
Wadim Egorov
90dc6a8b10 arch: arm: dts: k3-am642-phyboard-electra: Drop bootph properties
Remove bootph properties no longer needed. These are now handled
in upstream Linux device trees.

While at it, drop the vtt-supply which is a leftover from the
very initial prototype of this board.

Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
2025-12-10 11:59:45 -06:00
Wadim Egorov
8c5166e9fe arch: arm: dts: k3-am625-phyboard-lyra: Drop bootph properties
Remove bootph properties no longer needed. These are now handled
in upstream Linux device trees.

Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
2025-12-10 11:59:45 -06:00
Markus Schneider-Pargmann (TI.com)
5425350bf5 configs: am335x_hs_evm_spi_defconfig: Remove duplicate symbols
Remove symbols already present in the included file.

Signed-off-by: Markus Schneider-Pargmann (TI.com) <msp@baylibre.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2025-12-10 11:59:41 -06:00
Tom Rini
57ff26c424 fs/jffs2: Make depend on !64BIT
Building this code on 64bit platforms leads to warnings (and so errors
in CI). Rather than rework the code, as this is a deprecated filesystem,
don't try and disallow building on 64bit hosts.

Signed-off-by: Tom Rini <trini@konsulko.com>
2025-12-10 11:59:38 -06:00
Heinrich Schuchardt
ff80e95fed tools: use setuptools 78.1.1
CVE-2025-47273 describes a path traversal vulnerability.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2025-12-10 09:28:43 -06:00
Adriana Nicolae
93d000bc52 test: dm: fdtdec: Validate FDT size in unit test
The current FDT decoding tests calculate the memory required
for FDT manipulation by directly adding a fixed margin to
fdt_totalsize(gd->fdt_blob). The static analyzer flagged
"gd->fdt_blob->totalsize" as a tainted value being passed
to fdt_open_into().

Ensure the size is validated by checking that the total size
is within a reasonable maximum FDT limit for unit tests.

Signed-off-by: Adriana Nicolae <adriana@arista.com>
2025-12-10 09:28:40 -06:00
Beleswar Padhi
da54deb1ac configs: am43xx: Migrate to CONFIG_SYS_MEM_TOP_HIDE from CFG_PRAM
The TI AM43xx HS boards have been using CFG_PRAM to hide the top 64MB
firewalled DRAM memory from U-Boot. However, CFG_PRAM only prevents
U-Boot from relocating into that memory, but it is still open for access
for any other usage.

Therefore, migrate into using CONFIG_SYS_MEM_TOP_HIDE which reduces the
ram size itself ensuring that memory is not visible to U-Boot at all
(either for reloc, or general usage).

Signed-off-by: Beleswar Padhi <b-padhi@ti.com>
2025-12-10 09:28:37 -06:00
Heinrich Schuchardt
7da7ca7cf5 Makefile: use --output-target instead of --target
The objcopy man-page teaches:

    --target=bfdname
      Use bfdname as the object format for
      both the input and the output file

This implies for --target=efi-app-x86_64 that the input file would have
to be an EFI app.

Objcopy in binutils 2.45 checks this more strictly than previous versions
and refuses to accept an ELF file as input with --target=efi-app-x86_64.

Replace --target by --output-target for building sandbox and x86 EFI
binaries.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2025-12-10 09:06:13 -06:00
Tom Rini
fbfaf5f63e Merge tag 'u-boot-stm32-20251209' of https://source.denx.de/u-boot/custodians/u-boot-stm
CI: https://source.denx.de/u-boot/custodians/u-boot-stm/-/pipelines/28704

_ Add 1 GiB DRAM support for STM32MP13x DHCOR SoM
_ Fix 512 MiB DRAM support for STM32MP13x DHCOR SoM
_ Fix handling OPTEE in middle of the DRAM
_ Add missing debug UART build for STM32MP1 DHSOM
2025-12-10 09:05:27 -06:00
Marek Vasut
78e94666dd ARM: stm32: Add missing build of debug UART init code on DH STM32MP1 DHSOM
Commit c37a668481 ("stm32mp: fix compilation issue with DEBUG_UART")
split the debug UART initialization code into two files, but failed to
update other non-ST boards. This did not lead to noticeable breakage
until debug UART is enabled, which is not the default. Update the
Makefile accordingly to allow debug UART to work.

Fixes: c37a668481 ("stm32mp: fix compilation issue with DEBUG_UART")
Signed-off-by: Marek Vasut <marek.vasut@mailbox.org>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2025-12-09 15:24:36 +01:00
Marek Vasut
86ff2cfa80 ARM: dts: stm32: Add 1 GiB DRAM settings for DH STM32MP13xx DHCOR SoM
Add DRAM settings for 1 GiB variant of DH STM32MP13xx DHCOR SoM
and support for SoM DRAM coding HW straps decoding and automatic
DRAM configuration selection. Enable CONFIG_BOARD_EARLY_INIT_F on
all STM32MP1 DHSOM, as it is required for the HW straps decoding.

Signed-off-by: Marek Vasut <marek.vasut@mailbox.org>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2025-12-09 15:24:30 +01:00
Marek Vasut
fd26267b4c ARM: dts: stm32: Fix 512 MiB DRAM settings for DH STM32MP13xx DHCOR SoM
Update DRAM chip type and density comment for 512 MiB DRAM settings for
DH STM32MP13xx DHCOR DHSBC to match the chip on the SoM. No functional
change.

Signed-off-by: Marek Vasut <marek.vasut@mailbox.org>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2025-12-09 15:24:11 +01:00
Marek Vasut
f0baa0a668 stm32mp: Fix handling of OPTEE in the middle of DRAM
STM32MP13xx may have OPTEE-OS at 0xdd000000 even on systems with 1 GiB
of DRAM at 0xc0000000, which is not the end of DRAM anymore. This puts
the OPTEE-OS in the middle of DRAM. Currently, the code sets RAM top to
0xdd000000 and prevents the DRAM range past OPTEE at 0xe0000000..0xffffffff
from being set as cacheable and from being usable. The code also sets the
area over OPTEE as invalid region in MMU tables, which is not correct.

Adjust the code such, that it only ever sets RAM top just before OPTEE
in case the OPTEE is really at the end of DRAM, mainly to be backward
compatible. Furthermore, adjust the MMU table configuration such, that
the regions over the OPTEE are simply skipped and not reconfigured, and
the regions between end of OPTEE and RAM top are set as cacheable, if
any actually exist.

Signed-off-by: Marek Vasut <marek.vasut@mailbox.org>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Tested-by: Patrice Chotard <patrice.chotard@foss.st.com>
2025-12-09 15:24:04 +01:00
Tom Rini
e09d04dae5 Merge branch 'next' of https://source.denx.de/u-boot/custodians/u-boot-riscv into next
CI: https://source.denx.de/u-boot/custodians/u-boot-riscv/-/pipelines/28674

- riscv: Implement private GCC library
- mpfs: Add MPFS CPU Implementation
- andes: Stop disabling device tree relocation and some minor fixes
- sifive: Stop disabling device tree relocation
- starfive: Cleanup size types and typos
2025-12-08 15:10:53 -06:00
Tom Rini
59202e5ae7 Merge tag 'v2026.01-rc4' into next
Prepare v2026.01-rc4
2025-12-08 13:17:27 -06:00
Tom Rini
0e0a198a68 Prepare v2026.01-rc4
Signed-off-by: Tom Rini <trini@konsulko.com>
v2026.01-rc4
2025-12-08 12:54:47 -06:00
Yao Zi
543900ab53 MAINTAINERS: update my email address
My old mail address, ziyao@disroot.org, has stopped working. Switch to
my new address, me@ziyao.cc, and map it in .mailmap.

Signed-off-by: Yao Zi <me@ziyao.cc>
2025-12-08 12:53:25 -06:00
Pranav Tilak
f2c148e0df arm64: versal: Fix LTO for mini_ospi/mini_qspi
With LTO enabled, mini U-Boot was hanging during reloc_fdt().
The initial stack pointer was placed too low, and the FDT memcpy
destination was carved only 4KB above it. This left insufficient
margin, causing the FDT copy to overwrite the live early stack
and corrupt execution before relocation.

To fix this, increase the malloc heap from 8KB to 12KB and raise the
initial stack pointer by 4KB. Together these adjustments increase
the separation between the early stack and the FDT region during
the pre-relocation phase, eliminating the overlap and fixing the
hang on mini builds (QSPI/OSPI).

Signed-off-by: Pranav Tilak <pranav.vinaytilak@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
2025-12-08 09:05:15 -06:00
Tom Rini
ae184121e0 omap3_evm: Take over maintainership
After talking with Derald, take over the maintainership role for this
platform.

Signed-off-by: Tom Rini <trini@konsulko.com>
2025-12-08 08:48:10 -06:00
Tom Rini
976c1cb85f doc: Update urllib3 version for building
The GitHub dependabot tool has reported two "high" priority bugs,
CVE-2025-66418 and CVE-2025-66471, with this package. Update to the
patched version.

Reported-by: GitHub dependabot
Acked-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
2025-12-08 08:44:36 -06:00
Tom Rini
f21a301147 configs: Resync with savedefconfig
Resync all defconfig files using qconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2025-12-08 08:37:35 -06:00
E Shattow
2da2c01cd1 configs: starfive: enable wget https
Enable WGET_HTTPS (no CA verification; also enables dependency MBEDTLS_LIB)

Signed-off-by: E Shattow <e@freeshell.de>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2025-12-08 12:11:06 +08:00
Heinrich Schuchardt
cf386262d5 test: provide unit tests for the RISC-V private GCC library
Add unit tests for the functions for counting leading and trailing zero
bits.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2025-12-08 12:11:01 +08:00
Heinrich Schuchardt
dd0ad45920 RISC-V: implement private GCC library
The following functions are provided:

Count leading zero bits

* int __clzsi2 (unsigned int a)
* int __clzdi2 (unsigned long a)
* int __clzti2 (unsigned long long a)

Count trailing zero bits

* int __ctzsi2 (unsigned int a)
* int __ctzdi2 (unsigned long a)
* int __ctzti2 (unsigned long long a)

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2025-12-08 12:10:55 +08:00
Tom Rini
7a12507e35 sifive-unleashed: Stop disabling device tree relocation
Remove setting of fdt_high to ~0, which disables device tree relocation,
from the default environment. Doing so prevents U-Boot from correcting
problems such as having an unaligned device tree and leads to various
failure modes in the OS.

Signed-off-by: Tom Rini <trini@konsulko.com>
2025-12-08 12:10:51 +08:00
Tom Rini
17ffa78ecf ae350: Stop disabling device tree relocation
Remove setting of fdt_high to ~0, which disables device tree relocation,
from the default environment. Doing so prevents U-Boot from correcting
problems such as having an unaligned device tree and leads to various
failure modes in the OS.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2025-12-08 12:10:47 +08:00
Conor Dooley
2f7420ccaa riscv: mpfs: move SoC level options to the CPU Kconfig
There are multiple boards that use the PolarFire SoC, so extract
the Kconfig sections that are determined at a CPU level from the board
Kconfigs now that we have a CPU Kconfig.

Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
2025-12-08 12:10:43 +08:00
Conor Dooley
4d056a2037 riscv: create a custom CPU implementation for PolarFire SoC
PolarFire SoC needs a custom implementation of top_of_ram(), so stop
using the generic CPU & create a custom CPU instead.

Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2025-12-08 12:10:39 +08:00
E Shattow
87ecc2b6ca ram: starfive: fix typo for unsupported DDR size
Fix typo for "unsupport" size and improve description to Unknown DDR size.

Signed-off-by: E Shattow <e@freeshell.de>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2025-12-08 12:10:35 +08:00
E Shattow
e8874f361d ram: starfive: use SZ_8G for 8GB memory size
Replace numeric literal with SZ_8G consistent with other uses of types
from linux/types.h

Signed-off-by: E Shattow <e@freeshell.de>
Acked-by: Hal Feng <hal.feng@starfivetech.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2025-12-08 12:10:30 +08:00
E Shattow
bccbe56710 ram: starfive: drop references to 16GB memory size
16GB memory size is not addressable on StarFive JH-7110 SoC because the
DRAM uncached alias begins at +8GB offset from start of DRAM. The logic
for 16GB memory size is a fall-through to the default for an unknown size.
Let's drop this unnecessary 16GB memory size and rely on the case default.

Signed-off-by: E Shattow <e@freeshell.de>
2025-12-08 12:10:26 +08:00
Randolph
28261933c5 falcon: support booting linux from MMC/Parallel Flash
To support booting Linux from MMC, the file name should be
set up correctly. To support booting Linux from Parallel Flash,
the SPL_LOAD_FIT_ADDRESS should point to the Parallel Flash.

Signed-off-by: Randolph <randolph@andestech.com>
2025-12-08 12:10:21 +08:00
Che-Wei Chuang
281e6fa4e4 configs: Change default baud rate to 115200
Updated DTS and configuration files to set the default baud rate from 38400 to 115200.

Signed-off-by: Che-Wei Chuang <cnoize@andestech.com>
2025-12-08 12:10:17 +08:00
Leo Yu-Chi Liang
3b8a3df191 riscv: cpu: Beautify the warning message
Add '\n' to the end of the warning message.

Besides, if we enable console record utility,
missing the '\n' causes the console_record_readline
fail to recognize the end of string.

Signed-off-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2025-12-08 12:10:10 +08:00
Tom Rini
8e12d6ccb3 Merge patch series "Azure: Rework world build to directly use the container"
This series from Tom Rini <trini@konsulko.com> makes some of our Azure
jobs easier to follow by removing the abstraction of calling docker from
the job we're running and instead following normal Azure Pipelines
conventions.

Link: https://lore.kernel.org/r/20251126234959.3909571-1-trini@konsulko.com
2025-12-07 12:53:09 -06:00
Tom Rini
57753073c1 Azure: Rework binman testsuite job to directly use the container
Similar to the changes made for the world build job, rework the binman
testsuite job as well. There's no functional changes, but makes our CI
clearer to others familiar with Azure pipelines.

Signed-off-by: Tom Rini <trini@konsulko.com>
2025-12-07 08:09:12 -06:00
Tom Rini
cf3d4da03f Azure: Rework world build to directly use the container
While we had problems historically using buildman inside of a container
when invoked directly via Azure, rather than calling docker in our
script, that is no longer the case. We can make the job a bit easier to
understand by running it more normally. The challenge here is that our
container normally runs with an unprivileged user that we have populated
tools for and Azure creates and uses a new unprivileged user. Copy what
we need over to the new user.

Signed-off-by: Tom Rini <trini@konsulko.com>
2025-12-07 08:09:12 -06:00
Tom Rini
9ecb7dc4b1 Merge patch series "board: phytec: phytec_som_detection: Add missing assignment"
This series from Daniel Schultz <d.schultz@phytec.de> lays the
groundwork for the phyFLEX SOMs from phytec.

Link: https://lore.kernel.org/r/20251124082506.3376876-1-d.schultz@phytec.de
2025-12-07 08:07:36 -06:00