Commit Graph

103789 Commits

Author SHA1 Message Date
Tom Rini
8de6e8f8a0 Merge patch series "sc5xx: Add complete board support for all ADI SC5xx boards"
Greg Malysa <malysagreg@gmail.com> says:

This series adds the final pieces to enable mainline U-Boot to build and
boot all Analog Devices SC5xx SoCs and supports the associated carrier
board options. At this point it should be viable for new users for these
platforms to start with the latest version of U-Boot rather than our
vendor fork, however some features (such as OSPI support and falcon
boot) remain unavailable until we are able to unify our implementations
with the mainline implementations.

Link: https://lore.kernel.org/r/20251211080414.5363-1-malysagreg@gmail.com
[trini: Rebuild CI containers to have new tools]
Signed-off-by: Tom Rini <trini@konsulko.com>
2026-01-23 14:55:32 -06:00
Greg Malysa
b0df2df8d4 MAINTAINERS: Update ADI entries for new boards
This adds missing maintainers entries for the ADI SC5xx defconfigs and
for a device tree binding file that was previously missed.

Signed-off-by: Greg Malysa <malysagreg@gmail.com>
2026-01-23 14:20:59 -06:00
Greg Malysa
be7937847b board: adi: Add support for SC594
This adds support for the Analog Devices SC594 SOM and configurations
for using it with both the SOMCRR-EZKIT and SOMCRR-EZLITE.

Signed-off-by: Vasileios Bimpikas <vasileios.bimpikas@analog.com>
Signed-off-by: Utsav Agarwal <utsav.agarwal@analog.com>
Signed-off-by: Arturs Artamonovs <arturs.artamonovs@analog.com>
Signed-off-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
Signed-off-by: Caleb Ethridge <caleb.ethridge@analog.com>
Signed-off-by: Philip Molloy <philip.molloy@analog.com>
Signed-off-by: Greg Malysa <malysagreg@gmail.com>
2026-01-23 14:20:59 -06:00
Greg Malysa
c9e893d626 board: adi: Add support for SC598
This adds support for the Analog Devices SC598-SOM and configurations
for using it with both the SOMCRR-EZKIT and SOMCRR-EZLITE. This adds
dtsis for both Rev D (including older revisions) and Rev E SOMs, which
are not compatible due to BOM changes. Although no new Rev D SOMs are
produced as of 2025, many are in circulation, so the RevD dtsi is
included to facilitate use for existing customers.

Signed-off-by: Vasileios Bimpikas <vasileios.bimpikas@analog.com>
Signed-off-by: Utsav Agarwal <utsav.agarwal@analog.com>
Signed-off-by: Arturs Artamonovs <arturs.artamonovs@analog.com>
Signed-off-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
Signed-off-by: Caleb Ethridge <caleb.ethridge@analog.com>
Signed-off-by: Philip Molloy <philip@philipmolloy.com>
Signed-off-by: Greg Malysa <malysagreg@gmail.com>
2026-01-23 14:20:59 -06:00
Greg Malysa
e1d6232874 board: adi: Add support for SC584-ezkit
This adds support for the Analog Devices SC584-EZKIT.

Signed-off-by: Vasileios Bimpikas <vasileios.bimpikas@analog.com>
Signed-off-by: Utsav Agarwal <utsav.agarwal@analog.com>
Signed-off-by: Arturs Artamonovs <arturs.artamonovs@analog.com>
Signed-off-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
Signed-off-by: Caleb Ethridge <caleb.ethridge@analog.com>
Signed-off-by: Greg Malysa <malysagreg@gmail.com>
2026-01-23 14:20:59 -06:00
Greg Malysa
e382cb2be4 board: adi: Add support for SC589 boards
This adds support for the Analog Devices SC589-EZKIT and SC589-mini.

Signed-off-by: Vasileios Bimpikas <vasileios.bimpikas@analog.com>
Signed-off-by: Utsav Agarwal <utsav.agarwal@analog.com>
Signed-off-by: Arturs Artamonovs <arturs.artamonovs@analog.com>
Signed-off-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
Signed-off-by: Caleb Ethridge <caleb.ethridge@analog.com>
Signed-off-by: Philip Molloy <philip.molloy@analog.com>
Signed-off-by: Greg Malysa <malysagreg@gmail.com>
2026-01-23 14:20:59 -06:00
Greg Malysa
34d41f8da6 board: adi: Add support for SC573-ezkit
This adds support for the Analog Devices SC573 EZKIT.

Signed-off-by: Vasileios Bimpikas <vasileios.bimpikas@analog.com>
Signed-off-by: Utsav Agarwal <utsav.agarwal@analog.com>
Signed-off-by: Arturs Artamonovs <arturs.artamonovs@analog.com>
Signed-off-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
Signed-off-by: Caleb Ethridge <caleb.ethridge@analog.com>
Signed-off-by: Philip Molloy <philip.molloy@analog.com>
Signed-off-by: Greg Malysa <malysagreg@gmail.com>
2026-01-23 14:20:59 -06:00
Greg Malysa
48a45b74aa board: adi: Add SOMCRR infrastructure
This adds infrastructure and shared library code for building targets
that use the ADI SOMCRR-EZKIT and SOMCRR-EZLITE carrier boards. These
are not used directly as board targets in their own right.

Co-developed-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
Signed-off-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
Signed-off-by: Vasileios Bimpikas <vasileios.bimpikas@analog.com>
Signed-off-by: Utsav Agarwal <utsav.agarwal@analog.com>
Signed-off-by: Arturs Artamonovs <arturs.artamonovs@analog.com>
Signed-off-by: Greg Malysa <malysagreg@gmail.com>
2026-01-23 14:20:59 -06:00
Greg Malysa
b36007b016 docker: add Analog Devices tools to docker image
The boot ROM on Analog Devices ADSP-SC5xx SoCs requires code packaged
in the LDR format. Normally this is available as part of
our yocto-derived toolchain but, it is not a part of any other pre-made
toolchain anymore, so it is otherwise unavailable in the docker image
for CI. This patch adds a source build from the ADI maintained github
repository. In the future, a package available for install via apt will
be available, but currently there is no arm64 build upstream, so we must
build from source for the time being to support CI on both amd64 and
arm64 runners. The same ldr tool is used for arm and arm64 for all of
our boards with names adjusted to match the expected $(CROSS_COMPILE)
for these boards.

Signed-off-by: Greg Malysa <malysagreg@gmail.com>
2026-01-23 14:20:59 -06:00
Utsav Agarwal
a6927e7175 mach-sc5xx: Add preliminary support for binman
Binman is optionally supported for Analog Devices sc5xx SoCs if Yocto is
not being used to create and assemble system images. The spl LDR is
generated locally but other artifacts such as kernel FIT image and root
file system are built externally and must be supplied to binman if used.

Binman is enabled by selecting the SC5XX_USE_BINMAN config symbol and
the image structure is included in the shared sc5xx device tree.

Signed-off-by: Greg Malysa <malysagreg@gmail.com>
Signed-off-by: Utsav Agarwal <utsav.agarwal@analog.com>
2026-01-23 14:20:59 -06:00
Greg Malysa
e01743624e mach-sc5xx: Kconfig: Make EZKIT and EZLITE carriers mutually exclusive
Support for the SOM-CRR variants introduces library level changes that
are not modelled in the device tree. As a result they cannot both be
selected at the same time, so this updates the dependency in Kconfig to
prevent them from being enabled together.

Reported-by: Philip Molloy <Philip.Molloy@analog.com>
Signed-off-by: Greg Malysa <malysagreg@gmail.com>
2026-01-23 14:20:58 -06:00
Greg Malysa
ca8cceb12f mach-sc5xx: Rename SC_BOOT_MODE
The symbol SC_BOOT_MODE was named incorrectly and inconsistently with
its usage. The selected boot mode is set only by hardware and cannot be
adjusted through software (apart from the use of FORCE_BMODE to instruct
the boot rom to ignore the hardware setting when loading uboot proper,
but this cannot change how SPL is loaded).

This symbol actually controlled the BCODE (easily confused with BMODE,
shorthand for boot mode), so this renames it to SC_BCODE and updates the
help text to reflect its actual usage: the BCODE is an SoC- and boot
mode-specific setting that affects how the boot rom configures QSPI or
OSPI in order to read an LDR file from the associated peripheral.

Reported-by: Philip Molloy <Philip.Molloy@analog.com>
Signed-off-by: Greg Malysa <malysagreg@gmail.com>
2026-01-23 14:20:58 -06:00
Utsav Agarwal
280dbbbf6e mach-sc5xx: Introduce Kconfig symbols for image addresses
Add Kconfig symbols to parameterize the SPI flash layout used in a
default-ish configuration. This adds more flexibility to the default ADI
environment, enabling customers with boards based on but not identical
to an ezkit to reuse more of the infrastructure. Furthermore it allows
for yocto (the expected default) or binman (to be introduced in this
series) to configure or use the flash layout based on a single
definition of all of the parameters when creating an image.

Signed-off-by: Greg Malysa <malysagreg@gmail.com>
Signed-off-by: Utsav Agarwal <utsav.agarwal@analog.com>
2026-01-23 14:20:58 -06:00
Tom Rini
64662b99c0 Merge tag 'mmc-for-2026.04-rc1-2' of https://source.denx.de/u-boot/custodians/u-boot-mmc
CI: https://source.denx.de/u-boot/custodians/u-boot-mmc/-/pipelines/29066

- mmc: Fix sdhci-cadence6 license
- mmc: Fix sd_get_capabilities retry logic
- mmc: use max-frequency from device tree
- Clean up regulator and build fix
2026-01-22 08:36:35 -06:00
Yanir Levin
124aeeff83 mmc: Fix retry logic in sd_get_capabilities
In sd_get_capabilities an ACMD is sent (SD_CMD_APP_SEND_SCR),
which requires sending APP_CMD (MMC_CMD_APP_CMD) before.

Currently, the ACMD is retried on error, however APP_CMD isn't.
In this case, when the ACMD fails and it is tried again,
the retry attempts will not be handled as ACMD, which is wrong.

The fix performs the retry attempts on the sequence of
APP_CMD and the ACMD together.

Signed-off-by: Yanir Levin <yanir.levin@tandemg.com>
Reviewed-by: Eran Moshe <emoshe@gsitechnology.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-01-22 10:38:50 +08:00
Hal Feng
0e6ed61175 mmc: sdhci-cadence6: Fix the license to GPL-2.0+
The license of the file is not valid. Fix it to GPL-2.0+.

Fixes: fe11aa0b8c ("mmc: sdhci-cadence: Add support for Cadence sdmmc v6")
Reported-by: Quentin Schulz <quentin.schulz@cherry.de>
Reported-by: oliver Fendt <ofendt@googlemail.com>
Closes: https://lore.kernel.org/all/CAFoF8fC4foffYJgYm9CkViET83gDu05noVRxLxgs+KWXN_-LBQ@mail.gmail.com/
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Tanmay Kathpalia <tanmay.kathpalia@altera.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-01-22 10:38:49 +08:00
Tanmay Kathpalia
efc2668568 mmc: mmc-uclass: Use max-frequency from device tree with driver default fallback
Use dev_read_u32_default() instead of dev_read_u32() to read the
"max-frequency" property from device tree. This preserves the driver-set
cfg->f_max value when the optional "max-frequency" property is not
present, ensuring the controller's default frequency is used as fallback
rather than being overwritten.

Suggested-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Tanmay Kathpalia <tanmay.kathpalia@altera.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-01-22 10:38:48 +08:00
Julien Stephan
dab2c154f6 power: regulator: common: fix compilation issue
If CONFIG_DM_GPIO is not enabled, compilation fails with the following
errors:

aarch64-none-linux-gnu-ld: drivers/power/regulator/regulator_common.o: in function `regulator_common_of_to_plat':
<...>/u-boot/drivers/power/regulator/regulator_common.c:30: undefined reference to `gpio_request_by_name'
aarch64-none-linux-gnu-ld: drivers/power/regulator/regulator_common.o: in function `regulator_common_get_enable':
<...>/u-boot/drivers/power/regulator/regulator_common.c:57: undefined reference to `dm_gpio_get_value'
aarch64-none-linux-gnu-ld: drivers/power/regulator/regulator_common.o: in function `regulator_common_set_enable':
<...>/u-boot/drivers/power/regulator/regulator_common.c:92: undefined reference to `dm_gpio_set_value'
make: *** [Makefile:2029: u-boot] Error 139

Since the enable gpio is optional we can conditionally skip these calls.

Reviewed-by: Tanmay Kathpalia <tanmay.kathpalia@altera.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Julien Stephan <jstephan@baylibre.com>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-01-22 10:38:22 +08:00
Julien Stephan
0411cac161 power: regulator: common: use dm_gpio_is_valid helper
Use dm_gpio_is_valid() helper function instead of manually checking the
gpio.

Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Tanmay Kathpalia <tanmay.kathpalia@altera.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Julien Stephan <jstephan@baylibre.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-01-22 10:01:10 +08:00
Julien Stephan
7dbec4f77c power: regulator: common: remove unnecessary debug trace
Drop the ftrace like debug() that checkpatch --strict complains about:

  WARNING: Unnecessary ftrace-like logging - prefer using ftrace

Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Tanmay Kathpalia <tanmay.kathpalia@altera.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Julien Stephan <jstephan@baylibre.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-01-22 10:01:10 +08:00
David Lechner
fd871fc6bb pinctrl: mediatek: mt8365: add PUPD registers
Add pull-up/pull-down (PUPD) register definitions for mt8365.

Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-01-21 13:33:08 -06:00
David Lechner
80cb8a0e89 clk: mtk: use IS_ERR_VALUE() to check rate return values
Replace casting with long to IS_ERR_VALUE() macro to check for error
return values from rate calculation functions. This is the recommended
way to check the return value from clock rate functions.

Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-01-21 13:30:58 -06:00
David Lechner
04413ed0c1 pinctrl: mediatek: fix failing to get syscon
Replace uclass_get_device_by_ofnode() with syscon_regmap_lookup_by_phandle()
to get the "mediatek,pctl-regmap" syscon device.

Depending on probe order, uclass_get_device_by_ofnode() may fail, but
syscon_regmap_lookup_by_phandle() has logic in it to handle that case
correctly.

The previous implementation could read more than one syscon if the
"mediatek,pctl-regmap" property had more than one phandle, but the one
board with a devicetree that does that is not supported in U-Boot yet,
so we can save that for later (it may never be needed).

Fixes: 424ceba18b ("pinctrl: mediatek: support mediatek,pctl-regmap property")
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-01-21 13:30:55 -06:00
David Lechner
c196b0a688 clk: mediatek: fix mux clocks with mapped parent IDs
Pass the unmapped parent ID when setting parent for mux clocks.

For technical reasons, some Mediatek clock driver have a mapping between
the clock IDs used in the devicetree and ID used in the generic clock
framework.

The mtk_clk_mux_set_parent() function is comparing the passed mapped
parent ID against the unmapped IDs in the chip-specific data structures.
Before this change, we were passing the mapped parent ID. When there is
a mapping, this resulted in buggy behavior (usually just incorrectly
failing to find a match and returning an error). We need to pass the
unmapped ID of the parent clock instead for the matching to work
correctly.

Since the reverse lookup is a bit verbose, a helper function is added to
keep the code clean.

Fixes: b135891572 ("clk: mediatek: add of_xlate ops")
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-01-21 13:30:52 -06:00
David Lechner
9fed667f89 cmd/Kconfig: fix typo in CMD_PINMUX description
Fix typo with correct spelling of "purposes".

Also change "debug" to "debugging" while touching this since that is
the more common phrasing.

Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-01-21 13:30:49 -06:00
David Lechner
2d665b9cd3 pinctrl: mediatek: ignored error return from pupd/r1/r0
Ignore the error return value from mtk_pinconf_bias_set_pupd_r1_r0().
The PUPD/R1/R0 registers only include a small subset of the pins, so
it is normal for this function to return an error for most pins.
Therefore, this error should not be propagated.

This fixes not all pins in a pinmux group being configured in some
cases because the propagated error caused the configuration loop to
exit early.

The rest of the function is refactored to return early on errors to
improve readability.

Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-01-21 13:29:28 -06:00
David Lechner
e63e2e797e pinctrl: mediatek: set array size for reg_cals
Set the size of the reg_cals arrays to PINCTRL_PIN_REG_MAX to in all
affected mediatek pinctrl drivers. This is needed to avoid potential
out-of-bounds accesses when they is used in mtk_hw_pin_field_get().
All array members need to be initialized since the code loops from 0
to PINCTRL_PIN_REG_MAX - 1. mt7622_reg_cals was already defined this
way, but the others were not.

Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-01-21 13:29:25 -06:00
Tom Rini
712b257406 Merge patch series "clk: clk-uclass: debug message improvements"
David Lechner <dlechner@baylibre.com> says:

I needed to debug some clock issues and found some places where pointer
addresses were being printed when names were available. The addresses
are not very helpful, but the names are. So here a couple of patches to
improve that.

Link: https://lore.kernel.org/r/20260108-clk-uclass-better-debug-v1-0-265900a42fe5@baylibre.com
2026-01-21 13:25:45 -06:00
David Lechner
2540dd7be9 clk: clk-uclass: used dev name in debug message
Consistently use the device name in debug messages. The clk-uclass file
previously had a mix of printing the dev pointer and the device name.
Changing all to use the device name makes the debug messages more
useful.

Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-01-21 13:25:40 -06:00
David Lechner
ec956adf37 clk: clk-uclass: fix format specifier for ofnode name
Change the format specifier from %p to %s when printing the ofnode name
so that the actual name is printed instead of the pointer address.

Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-01-21 13:25:40 -06:00
Tom Rini
b9d4a17b90 arm: Remove remainder of ARCH_ORION5X
With commit 5663b137e6 ("arm: Remove edminiv2 board") the last
ARCH_ORION5X platform was removed. Remove the rest of the architecture
code which is now unused.

Reviewed-by: Tony Dinh <mibodhi@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2026-01-21 12:05:15 -06:00
Wadim Egorov
e1561ac2de board: phytec: Add PHYTEC mailing list to MAINTAINERS entries
PHYTEC maintains an actively monitored mailing list for upstream
activities: upstream@lists.phytec.de. Add it to the MAINTAINERS
entries for PHYTEC boards we actively develop and contribute to.

Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Acked-by: Teresa Remmet <t.remmet@phytec.de>
2026-01-21 12:05:15 -06:00
Tom Rini
019908a506 Merge patch series "configs: phycore_am6xx_a53_defconfig: Enable CMD_DDR4"
This series from Wadim Egorov <w.egorov@phytec.de> performs some
improvements to some of the phycore am6xx series devices.

Link: https://lore.kernel.org/r/20260113053531.1204984-1-w.egorov@phytec.de
2026-01-21 09:17:22 -06:00
Daniel Schultz
c620865280 configs: phycore_am62ax_r5_ethboot_defconfig: Drop NET_RANDOM_ETHADDR
BOOTP does not support dynamic lease expiration. Using random MAC
addresses on R5 network boot binaries would result in continuously
allocated IPs without proper release.

Since only one interface is enabled for network boot, rely on the
MAC address provided by the efuses instead.

Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
2026-01-21 09:17:17 -06:00
Daniel Schultz
464b64af6f configs: phycore_am62x_r5_ethboot_defconfig: Drop NET_RANDOM_ETHADDR
BOOTP does not support dynamic lease expiration. Using random MAC
addresses on R5 network boot binaries would result in continuously
allocated IPs without proper release.

Since only one interface is enabled for network boot, rely on the
MAC address provided by the efuses instead.

Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
2026-01-21 09:17:17 -06:00
Wadim Egorov
3396e7d4aa configs: phycore_am6xx_a53_defconfig: Enable CMD_DDR4
Enable command for verifying DDRSS inline ECC features.

Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
2026-01-21 09:17:17 -06:00
Tom Rini
084faca1d7 Merge patch series "Update linker scripts to ensure appended device tree is correctly aligned"
Tom Rini <trini@konsulko.com> says:

This series builds on top of what Beleswar Padhi did in [1]. While
there's still discussion about the mkimage related parts, the linker
portion appears to the reliable path forward. An alternative that I had
mentioned before, and was part of previous discussions on this topic[2]
is in the end I believe not reliable enough. While we can take an output
file and pad it to where we think it needs to be, ultimately the linker
needs to place the symbol where we want it and if that isn't where we
pad to, we have a different problem. So what this series does (but each
commit message elaborates on the arch-specific linker scripts being
inconsistent) is make sure the linker script will place the required
symbol at 8-byte alignment, and then also use an ASSERT to fail the
build if this would not be true due to some unforseen event.

[1]: https://lore.kernel.org/u-boot/20260112101102.1417970-1-b-padhi@ti.com/
[2]: https://source.denx.de/u-boot/u-boot/-/issues/30

Link: https://lore.kernel.org/r/20260115222828.3931345-1-trini@konsulko.com
2026-01-20 12:07:25 -06:00
Tom Rini
410d31bae4 x86: Update linker scripts to ensure appended device tree is aligned
With commit 0535e46d55 ("scripts/dtc: Update to upstream version
v1.7.2-35-g52f07dcca47c") it is now a fatal error to U-Boot if our
device tree is not 8-byte aligned. In commit 85f586035d ("ARM: OMAP2+:
Pad SPL binary to 8-byte alignment before DTB") Beleswar Padhi explains
that we must have ALIGN(x) statements inside of a section to ensure that
padding is included and not simply that the linker address counter is
incremented. To that end, this patch:
- Rewrite the '.rel.dyn' (u-boot.lds) to follow modern practices, and
  include the 8-byte alignment at the end of the section.
- Expands the '.dynamic' section (u-boot-64.lds) to be more readable
  when adding a second statement to the section.
- Aligns the final section before _end (for U-Boot) or _image_binary_end
  or __bss_end (for xPL phases) by 8-bytes by adding '. = ALIGN(8);' to
  the final section before the symbol or changing an existing ALIGN(4)
  statement.
- Ensure that we do have alignment by adding an ASSERT so that when not
  aligned we fail to link (and explain why).

Signed-off-by: Tom Rini <trini@konsulko.com>
2026-01-20 12:07:24 -06:00
Tom Rini
94b8145189 sandbox: Update linker scripts to ensure appended device tree is aligned
With commit 0535e46d55 ("scripts/dtc: Update to upstream version
v1.7.2-35-g52f07dcca47c") it is now a fatal error to U-Boot if our
device tree is not 8-byte aligned. In commit 85f586035d ("ARM: OMAP2+:
Pad SPL binary to 8-byte alignment before DTB") Beleswar Padhi explains
that we must have ALIGN(x) statements inside of a section to ensure that
padding is included and not simply that the linker address counter is
incremented. To that end, this patch:
- Aligns the final section before _image_binary_end (for xPL phases) by
  8-bytes by adding '. = ALIGN(8);' to the final section before the
  symbol.
- Ensure that we do have alignment by adding an ASSERT so that when not
  aligned we fail to link (and explain why).

Signed-off-by: Tom Rini <trini@konsulko.com>
2026-01-20 12:07:23 -06:00
Tom Rini
f150843499 riscv: Update linker scripts to ensure appended device tree is aligned
With commit 0535e46d55 ("scripts/dtc: Update to upstream version
v1.7.2-35-g52f07dcca47c") it is now a fatal error to U-Boot if our
device tree is not 8-byte aligned. In commit 85f586035d ("ARM: OMAP2+:
Pad SPL binary to 8-byte alignment before DTB") Beleswar Padhi explains
that we must have ALIGN(x) statements inside of a section to ensure that
padding is included and not simply that the linker address counter is
incremented. To that end, this patch:
- Aligns the final section before _end (for U-Boot) or _image_binary_end
  (for xPL phases) by 8-bytes by adding '. = ALIGN(8);' to the final
  section before the symbol.
- Remove a now-spurious  '. = ALIGN(x);' statement that was intended to
  provide the above alignments.
- Ensure that we do have alignment by adding an ASSERT so that when not
  aligned we fail to link (and explain why).

Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
2026-01-20 12:07:21 -06:00
Tom Rini
87d3780ebc powerpc: Update linker scripts to ensure appended device tree is aligned
With commit 0535e46d55 ("scripts/dtc: Update to upstream version
v1.7.2-35-g52f07dcca47c") it is now a fatal error to U-Boot if our
device tree is not 8-byte aligned. In commit 85f586035d ("ARM: OMAP2+:
Pad SPL binary to 8-byte alignment before DTB") Beleswar Padhi explains
that we must have ALIGN(x) statements inside of a section to ensure that
padding is included and not simply that the linker address counter is
incremented. To that end, this patch:
- Aligns the final section before _end by 8-bytes by adding '. =
  ALIGN(8);' or changing an existing ALIGN(4) statement.
- Ensure that we do have alignment by adding an ASSERT so that when not
  aligned we fail to link (and explain why).

Signed-off-by: Tom Rini <trini@konsulko.com>
2026-01-20 12:07:20 -06:00
Tom Rini
546d84ca0c nios2: Update linker scripts to ensure appended device tree is aligned
With commit 0535e46d55 ("scripts/dtc: Update to upstream version
v1.7.2-35-g52f07dcca47c") it is now a fatal error to U-Boot if our
device tree is not 8-byte aligned. In commit 85f586035d ("ARM: OMAP2+:
Pad SPL binary to 8-byte alignment before DTB") Beleswar Padhi explains
that we must have ALIGN(x) statements inside of a section to ensure that
padding is included and not simply that the linker address counter is
incremented. To that end, this patch:
- Aligns the final section before _end 8-bytes by adding '. = ALIGN(8);'
  to the final section before the symbol.
- Remove a now-spurious  '. = ALIGN(x);' statement that was intended to
  provide the above alignments.
- Ensure that we do have alignment by adding an ASSERT so that when not
  aligned we fail to link (and explain why).

Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
2026-01-20 12:07:17 -06:00
Tom Rini
b220a43f5a mips: Update linker scripts to ensure appended device tree is aligned
With commit 0535e46d55 ("scripts/dtc: Update to upstream version
v1.7.2-35-g52f07dcca47c") it is now a fatal error to U-Boot if our
device tree is not 8-byte aligned. In commit 85f586035d ("ARM: OMAP2+:
Pad SPL binary to 8-byte alignment before DTB") Beleswar Padhi explains
that we must have ALIGN(x) statements inside of a section to ensure that
padding is included and not simply that the linker address counter is
incremented. To that end, this patch:
- Aligns the final section before _end (for U-Boot) or _image_binary_end
  (for xPL phases) by 8-bytes by adding '. = ALIGN(8);' to the final
  section before the symbol. For SPL we need this in two places to cover
  all build configurations.
- Remove now-spurious  '. = ALIGN(x);' statements that were intended to
  provide the above alignments.
- Ensure that we do have alignment by adding an ASSERT so that when not
  aligned we fail to link (and explain why).

Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2026-01-20 12:07:16 -06:00
Tom Rini
2e52030584 microblaze: Update linker scripts to ensure appended device tree is aligned
With commit 0535e46d55 ("scripts/dtc: Update to upstream version
v1.7.2-35-g52f07dcca47c") it is now a fatal error to U-Boot if our
device tree is not 8-byte aligned. In commit 85f586035d ("ARM: OMAP2+:
Pad SPL binary to 8-byte alignment before DTB") Beleswar Padhi explains
that we must have ALIGN(x) statements inside of a section to ensure that
padding is included and not simply that the linker address counter is
incremented. To that end, this patch:
- Aligns the final section before _end (for U-Boot) or _image_binary_end
  (for xPL phases) by 8-bytes by adjusting the ALIGN(4) statement to be
  ALIGN(8) in the final section before the symbol.
- Ensure that we do have alignment by adding an ASSERT so that when not
  aligned we fail to link (and explain why).

Tested-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
2026-01-20 12:07:15 -06:00
Tom Rini
dac67bf0be m68k: Update linker scripts to ensure appended device tree is aligned
With commit 0535e46d55 ("scripts/dtc: Update to upstream version
v1.7.2-35-g52f07dcca47c") it is now a fatal error to U-Boot if our
device tree is not 8-byte aligned. In commit 85f586035d ("ARM: OMAP2+:
Pad SPL binary to 8-byte alignment before DTB") Beleswar Padhi explains
that we must have ALIGN(x) statements inside of a section to ensure that
padding is included and not simply that the linker address counter is
incremented. To that end, this patch:
- Remove part of what Marek Vasut did in commit 9ed99e2eea ("m68k:
  Assure end of U-Boot is at 8-byte aligned offset") as we now better
  understand what can trigger failure and check for it.
- Rewrite the '.dynsym' section to follow modern practices, and include
  the 8-byte alignment at the end of the section.
- Ensure that we do have alignment by adding an ASSERT so that when not
  aligned we fail to link (and explain why).

Signed-off-by: Tom Rini <trini@konsulko.com>
2026-01-20 12:07:14 -06:00
Tom Rini
8b0ebe054b arm: Update linker scripts to ensure appended device tree is aligned
With commit 0535e46d55 ("scripts/dtc: Update to upstream version
v1.7.2-35-g52f07dcca47c") it is now a fatal error to U-Boot if our
device tree is not 8-byte aligned. In commit 85f586035d ("ARM: OMAP2+:
Pad SPL binary to 8-byte alignment before DTB") Beleswar Padhi explains
that we must have ALIGN(x) statements inside of a section to ensure that
padding is included and not simply that the linker address counter is
incremented. To that end, this patch:
- Expands some linker sections to be more readable when adding a second
  statement to the section.
- Aligns the final section before _end (for U-Boot) or
  _image_binary_end or __bss_end (for xPL phases) by 8-bytes by adding
  '. = ALIGN(8);' to the final section before the symbol.
- Ensure that we do have alignment by adding an ASSERT so that when not
  aligned we fail to link (and explain why).
- Remove now-spurious  '. = ALIGN(x);' statements that were intended to
  provide the above alignments.

Tested-by: Michal Simek <michal.simek@amd.com> # Zynq
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
[trini: Also update arch/arm/cpu/armv8/u-boot.lds as Ilas requested]
Signed-off-by: Tom Rini <trini@konsulko.com>
2026-01-20 12:06:41 -06:00
Tom Rini
90efb8d394 Makefile: Have binary_size_check report only first match of _image_binary_end
If we have ASSERT macros that validate the position of
_image_binary_end, our awk expression will report a string that causes
the rest of our check to fail with garbage values. Have it exit after
the first match to fix this.

Signed-off-by: Tom Rini <trini@konsulko.com>
2026-01-20 10:19:24 -06:00
Beleswar Padhi
85f586035d ARM: OMAP2+: Pad SPL binary to 8-byte alignment before DTB
The OMAP2 SPL linker script (also used for K3 platforms) currently uses
a 4-byte alignment directive after the __u_boot_list section. This
alignment directive only advances the location counter without padding
the actual binary output.

When objcopy extracts u-boot-spl-nodtb.bin, it includes only actual
data, stopping at the last byte of __u_boot_list (e.g., 0x41c359fc),
not an aligned address (e.g., 0x41c35a00). So, when the FIT image
containing device trees is concatenated to the SPL binary, it gets
appended at this unaligned file size, causing libfdt validation failure.

To fix this, move the alignment directive into the __u_boot_list section
itself and make it 8-byte aligned as per DT spec. This forces the linker
to include padding as part of the section data, ensuring objcopy
includes the padding bytes in the binary and the appended FIT image
starts at an 8-byte aligned boundary.

Reported-by: Anshul Dalal <anshuld@ti.com>
Closes: https://lore.kernel.org/u-boot/DFJ950O0QM0D.380U0N16ZO19E@ti.com
Fixes: 0535e46d55 ("scripts/dtc: Update to upstream version v1.7.2-35-g52f07dcca47c")
Signed-off-by: Beleswar Padhi <b-padhi@ti.com>
2026-01-20 10:18:43 -06:00
Tom Rini
a4dc1c3b7d Merge tag 'efi-2026-04-rc1-2' of https://source.denx.de/u-boot/custodians/u-boot-efi
Pull request efi-2026-04-rc1-2

CI: https://source.denx.de/u-boot/custodians/u-boot-efi/-/pipelines/29050

Documentation:

* Update StarFive JH7110 common description
* Add TI AM62D documentation
* Update urllib3 version for building
* Update links to doc/develop/falcon.rst
* Describe QEMU networking
* kdoc: handle the obsolescensce of docutils.ErrorString()
* Fix typo "addtional" -> "additional" in pflash section.

UEFI:

* Fix boot failure from FIT with compressed EFI binary

Others:

* cmd/meminfo: Correct displaying addresses above 4 GiB
* test:
  - Consider configuration in meminfo test
  - Consider initf_malloc is only traced with EARLY_TRACE
  - Clean up test_trace.py code
2026-01-20 08:31:34 -06:00
E Shattow
8304f32267 doc: board: starfive: update jh7110 common description
Updates to the JH7110 common description:
- add detailed overview of JH-7110 SoC and boot process
- revise descriptions of deprecated StarFive loader modes
- refresh build directions grouped with SPL debug advice
- reduce usage instructions into common methods shared by supported boards
- cite starfive_visionfive2 board maintainer description of StarFive loader
- cite published datasheets for ambient operating temperature data

Redundant/deprecated sections of each board doc are dropped accordingly:
- deepcomputing fml13v01
- milk-v mars
- pine64 star64 (also add inclusion of JH7110 common description)
- visionfive2

Signed-off-by: E Shattow <e@freeshell.de>
2026-01-20 11:03:03 +01:00