* Patches by Udi Finkelstein, 2 June 2003:

- Added support for custom keyboards, initialized by defining a
    board-specific drv_keyboard_init as well as defining CONFIG_KEYBOARD .
  - Added support for the RBC823 board.
  - cpu/mpc8xx/lcd.c now automatically calculates the
    Horizontal Pixel Count field.

* Fix alignment problem in BOOTP (dhcp_leasetime option)
  [pointed out by Nicolas Lacressonni�re, 2 Jun 2003]

* Patch by Mark Rakes, 14 May 2003:
  add support for Intel e1000 gig cards.

* Patch by Nye Liu, 3 Jun 2003:
  fix critical typo in MAMR definition (include/mpc8xx.h)

* Fix requirement to align U-Boot image on 16 kB boundaries on PPC.

* Patch by Klaus Heydeck, 2 Jun 2003
  Minor changes for KUP4K configuration

CHANGELOG

@@ -1,7 +1,412 @@
 ======================================================================
-Changes since U-Boot 0.2.2:
+Changes since U-Boot 0.3.1:
 ======================================================================
 
+* Patches by Udi Finkelstein, 2 June 2003:
+  - Added support for custom keyboards, initialized by defining a
+    board-specific drv_keyboard_init as well as defining CONFIG_KEYBOARD .
+  - Added support for the RBC823 board.
+  - cpu/mpc8xx/lcd.c now automatically calculates the
+    Horizontal Pixel Count field.
+
+* Fix alignment problem in BOOTP (dhcp_leasetime option)
+  [pointed out by Nicolas Lacressonnière, 2 Jun 2003]
+
+* Patch by Mark Rakes, 14 May 2003:
+  add support for Intel e1000 gig cards.
+
+* Patch by Nye Liu, 3 Jun 2003:
+  fix critical typo in MAMR definition (include/mpc8xx.h)
+
+* Fix requirement to align U-Boot image on 16 kB boundaries on PPC.
+
+* Patch by Klaus Heydeck, 2 Jun 2003
+  Minor changes for KUP4K configuration
+
+* Patch by Marc Singer, 29 May 2003:
+  Fixed rarp boot method for IA32 and other little-endian CPUs.
+
+* Patch by Marc Singer, 28 May 2003:
+  Added port I/O commands.
+
+* Patch by Matthew McClintock, 28 May 2003
+  - cpu/mpc824x/start.S: fix relocation code when booting from RAM
+  - minor patches for utx8245
+
+* Patch by Daniel Engström, 28 May 2003:
+  x86 update
+
+* Patch by Dave Ellis, 9 May 2003 + 27 May 2003:
+  add nand flash support to SXNI855T configuration
+  fix/extend nand flash support:
+  - fix 'nand erase' command so does not erase bad blocks
+  - fix 'nand write' command so does not write to bad blocks
+  - fix nand_probe() so handles no flash detected properly
+  - add doc/README.nand
+  - add .jffs2 and .oob options to nand read/write
+  - add 'nand bad' command to list bad blocks
+  - add 'clean' option to 'nand erase' to write JFFS2 clean markers
+  - make NAND read/write faster
+
+* Patch by Rune Torgersen, 23 May 2003:
+  Update for MPC8266ADS board
+
+* Get (mostly) rid of CFG_MONITOR_LEN definition; compute real length
+  instead CFG_MONITOR_LEN is now only used to determine  _at_compile_
+  _time_  (!) if the environment is embedded within the U-Boot image,
+  or in a separate flash sector.
+
+* Cleanup CFG_DER #defines in config files (wd maintained only)
+
+* Fix data abort exception handling for arm920t CPU
+
+* Fix alignment problems with flash driver for TRAB board
+
+* Patch by Donald White, 21 May 2003:
+  fix calculation of base address in pci_hose_config_device()
+
+* Fix bug in command line parsing: "cmd1;cmd2" is supposed to always
+  execute "cmd2", even if "cmd1" fails. Note that this is different
+  to "run var1 var2" where the contents of "var2" will NOT be
+  executed when a command in "var1" fails.
+
+* Add zero-copy ramdisk support (requires corresponding kernel support!)
+
+* Patch by Kyle Harris, 20 May 2003:
+  In preparation for an ixp port, rename cpu/xscale and arch-xscale
+  into cpu/pxa and arch-pxa.
+
+* Patch by Stefan Roese, 23 May 2003:
+  - IBM PPC405EP port added.
+  - CONFIG_UART1_CONSOLE added. If defined internal UART1 (and not
+    UART0) is used as default U-Boot console. PPC4xx only!
+  - esd ASH405 board added (PPC405EP based).
+  - BUBINGA405EP board added (PPC405EP based - IBM Eval Board).
+  - esd CPCI405AB board added.
+  - esd PMC405 board added.
+  - Update of some esd boards.
+
+* Patch by Denis Peter, 19 Mai 2003:
+  add support for the MIP405-3 board
+
+* Patch by Dave Ellis, 22 May 2003:
+  Fix problem with only partially cleared .bss segment
+
+* Patch by Rune Torgersen, 12 May 2003:
+  get PCI to work on a MPC8266ADS board; incorporate change to
+  cpu/mpc8260/pci.c to enable overrides of PCI memory parameters
+
+* Patch by Nye Liu, 1 May 2003:
+  minor patches for the FADS8xx
+
+* Patch by Thomas Schäfer, 28 Apr 2003:
+  Fix SPD handling for 256 ECC DIMM on Walnut
+
+* Add support for arbitrary bitmaps for TRAB's  VFD command;
+  allow to pass boot bitmap addresses in environment variables;
+  allow for zero boot delay
+
+* Patch by Christian Geißinger, 19 May 2002:
+  On TRAB: wait until the dummy byte has been completely sent
+
+* Patch by David Updegraff, 22 Apr 2003:
+  update for CrayL1 board
+
+* Patch by Pantelis Antoniou, 21 Apr 2003:
+  add boot support for ARTOS (a proprietary OS)
+
+* Patch by Steven Scholz, 11 Apr 2003:
+  Add support for RTC DS1338
+
+* Patch by Rod Boyce, 24 Jan 2003:
+  Fix counting of extended partitions in diskboot command
+
+* Patch by Christophe Lindheimer, 20 May 2003:
+  allow the use of CFG_LOADS when CFG_NO_FLASH is set
+
+* Fix SDRAM timing on Purple board
+
+* Add support for CompactFlash on ATC board
+  (includes support for Intel 82365 and compatible PC Card controllers,
+  and Yenta-compatible PCI-to-CardBus controllers)
+
+* Patch by Mathijs Haarman, 08 May 2003:
+  Add lan91c96 driver (tested on Lubbock and custom PXA250 board only)
+
+* Fix problem with usage of "true" (undefined in current versions of bfd.h)
+
+* Add support for Promess ATC board
+
+* Patch by Keith Outwater, 28 Apr 2003:
+  - Miscellaneous corrections and additions to GEN860T board specific code.
+  - Added GEN860_SC variant to GEN860T.
+  - Miscellaneous corrections to GEN860T documentation.
+  - Correct duplicate entry in U-Boot CREDITS file.
+  - Add GEN860T_SC entry in MAINTAINERS file.
+  - Update CREDITS file with GEN860T_SC info.
+
+* Update Smiths Aerospace addresses in MAINTAINERS file
+
+* Fix error handling in hush's version of "run" command
+
+* LWMON extensions:
+  - Splashscreen support
+  - modem support
+  - sysmon support
+  - temperature dependend enabling of LCD
+
+* Allow booting from old "PPCBoot" disk partitions
+
+* Add support for TQM8255 Board / MPC8255 CPU
+
+======================================================================
+Changes for U-Boot 0.3.1:
+======================================================================
+
+* Make sure Block Lock Bits get cleared in R360MPI flash driver
+
+* MPC823 LCD driver: Fill color map backwards, to allow for steady
+  display when Linux takes over
+
+* Patch by Erwin Rol, 27 Feb 2003:
+  Add support for RTEMS (this time for real).
+
+* Add support for "bmp info" and "bmp display" commands to load
+  bitmap images; this can be used (for example in a "preboot"
+  command) to display a splash screen very quickly after poweron.
+
+* Add support for 133 MHz clock on INCA-IP board
+
+* Patch by Lutz Dennig, 10 Apr 2003:
+  Update for R360MPI board
+
+* Add new meaning to "autostart" environment variable:
+  If set to "no", a standalone image passed to the
+  "bootm" command will be copied to the load address
+  (and eventually uncompressed), but NOT be started.
+  This can be used to load and uncompress arbitrary
+  data.
+
+* Patch by Stefan Roese, 10 Apr 2003:
+  Changed DHCP client to use IP address from server option field #54
+  from the OFFER packet in the server option field #54 in the REQUEST
+  packet. This fixes a problem using a Windows 2000 DHCP server,
+  where the DHCP-server is not the TFTP-server.
+
+* Set max brightness for MN11236 displays on TRAB board
+
+* Add support for TQM862L modules
+
+======================================================================
+Changes for U-Boot 0.3.0:
+======================================================================
+
+* Patch by Arun Dharankar, 4 Apr 2003:
+  Add IDMA example code (tested on 8260 only)
+
+* Add support for Purple Board (MIPS64 5Kc)
+
+* Add support for MIPS64 5Kc CPUs
+
+* Fix missing setting of "loadaddr" and "bootfile" on ARM and MIPS
+
+* Patch by Denis Peter, 04 Apr 2003:
+  - update MIP405-4 board
+
+* Patch by Stefan Roese, 4 Apr 2003:
+  - U-Boot version environment variable "ver" added
+    (CONFIG_VERSION_VARIABLE).
+  - Changed PPC405GPr version from A to B.
+  - Changed CPCI405 to use CTS instead of DSR on PPC405 UART1.
+
+* Patches by Denis Peter, 03 April 2003:
+  - fix PCI IRQs on MPL boards
+  - fix two more un-relocated pointer problems
+
+* Fix behaviour of "run" command:
+  - print error message iv variable does not exist
+  - terminate processing of arguments in case of error
+
+* Patches by Peter Figuli, 10 Mar 2003
+  - Add support for BTUART on PXA platform
+  - Add support for WEP EP250 (PXA) board
+
+* Fix flash problems on INCA-IP; add tool to allow bruning images  to
+  flash using a BDI2000
+
+* Implement fix for I2C Edge Conditions problem for all boards that
+  use the bit-banging driver (common/soft_i2c.c)
+
+* Patch by Martin Winistoerfer, 23 Mar 2003
+  - Add port to MPC555/556 microcontrollers
+  - Add support for cmi customer board with
+    Intel 28F128J3A, 28F320J3A or 28F640J3A flash.
+
+* Patch by Rick Bronson, 28 Mar 2003:
+  - fix common/cmd_nand.c
+
+* Patch by Arun Dharankar, 24 Mar 2003:
+  - add threads / scheduler example code
+
+* Add patches by Robert Schwebel, 31 Mar 2003:
+  - add ctrl-c support for kermit download
+  - align bdinfo output on ARM
+  - csb226 board: bring in sync with innokom/memsetup.S
+  - csb226 board: fix MDREFR handling
+  - misc doc fixes / extensions
+  - innokom board: cleanup, MDREFR fix in memsetup.S, config update
+  - add BOOT_PROGRESS to armlinux.c
+
+* Add CPU ID, version, and clock speed for INCA-IP
+
+* Patches by Dave Ellis, 18 Mar 2003 for SXNI855T board:
+  - fix SRAM and SDRAM memory sizing
+  - add status LED support
+  - add MAC address for second (SCC1) ethernet port
+
+* Update default environment for TQM8260 board
+
+* Patch by Rick Bronson, 16 Mar 2003:
+  - Add NAND flash support for reading, writing, and erasing NAND
+    flash (certain forms of which are called SmartMedia).
+  - Add support for Atmel AT91RM9200DK ARM920T based development kit.
+
+* Patches by Robert Schwebel, 19 Mar 2003:
+  - use arm-linux-gcc as default compiler for ARM
+  - fix i2c fixup code
+  - fix missing baudrate setting
+  - added $loadaddr / CFG_LOAD_ADDR support to loadb
+  - moved "ignoring trailing characters" _before_ u-boot wants to
+    print out diagnostics messages; removes bogus characters at the
+    end of transmission
+
+* Patch by John Zhan, 18 Mar 2003:
+  Add support for SinoVee Microsystems SC8xx boards
+
+* Patch by Rolf Offermanns, 21 Mar 2003:
+  ported the dnp1110 related changes from the current armboot cvs to
+  current u-boot cvs. smc91111 does not work. problem marked in
+  smc91111.c, grep for "FIXME".
+
+* Patch by Brian Auld, 25 Mar 2003:
+  Add support for STM flash chips on ebony board
+
+* Add PCI support for MPC8250 Boards (PM825 module)
+
+* Patch by Stefan Roese, 25 Mar 2003:
+  - PCI405 update.
+
+* Patch by Stefan Roese, 20 Mar 2003:
+  - CPCI4052 update (support for revision 3).
+  - Set edge conditioning circuitry on PPC405GPr for compatibility
+    to existing PPC405GP designs.
+  - Clip udiv to 5 bits on PPC405 (serial.c).
+
+* Extend INCAIP board support:
+  - add automatic RAM size detection
+  - add "bdinfo" command
+  - pass flash address and size to Linux kernel
+  - switch to 150 MHz clock
+
+* Avoid flicker on the TRAB's VFD by synchronizing the enable with
+  the HSYNC/VSYNC. Requires new CPLD code (Version 101 for Rev. 100
+  boards, version 153 for Rev. 200 boards).
+
+* Patch by Vladimir Gurevich, 12 Mar 2003:
+  Fix relocation problem of statically initialized string pointers
+  in common/cmd_pci.c
+
+* Patch by Kai-Uwe Blöm, 12 Mar 2003:
+  Cleanup & bug fixes for JFFS2 code:
+  - the memory mangement was broken. It caused havoc on malloc by
+    writing beyond the block boundaries.
+  - the length calculation for files was wrong, sometimes resulting
+    in short file reads.
+  - data copying now optionally takes fragment version numbers into
+    account, to avoid copying from older data.
+  See doc/README.JFFS2 for details.
+
+* Patch by Josef Wagner, 12 Mar 2003:
+  - 16/32 MB and 50/80 MHz support with auto-detection for IP860
+  - ETH05 and BEDBUG support for CU824
+  - added support for MicroSys CPC45
+  - new BOOTROM/FLASH0 and DOC base for PM826
+
+* Patch by Robert Schwebel, 12 Mar 2003:
+  Fix the chpart command on innokom board
+
+* Name cleanup:
+  mv include/asm-i386/ppcboot-i386.h include/asm-i386/u-boot-i386.h
+  s/PPCBoot/U-Boot/ in some files
+  s/pImage/uImage/  in some files
+
+* Patch by Detlev Zundel, 15 Jan 2003:
+  Fix '' command line quoting
+
+* Patch by The LEOX team, 19 Jan 2003:
+  - add support for the ELPT860 board
+  - add support for Dallas ds164x RTC
+
+* Patches by David Müller, 31 Jan 2003:
+  - minimal setup for CardBus bridges
+  - add EEPROM read/write support in the CS8900 driver
+  - add support for the builtin I2C controller in the Samsung s3c24x0 chips
+  - add support for MPL's VCMA9 (Samsung s3c2410 based) board
+
+* Patch by Steven Scholz, 04 Feb 2003:
+  add support for RTC DS1307
+
+* Patch by Reinhard Meyer, 5 Feb 2003:
+  fix PLPRCR/SCCR init sequence on 8xx to allow for
+  changes of EBDF by software
+
+* Patch by Vladimir Gurevich, 07 Feb 2003:
+  "API-compatibility patch" for 4xx I2C driver
+
+* TRAB fixes / extensions:
+  - Restore VFD brightness as saved in environment
+  - add support for FGujitsu flashes
+  - make sure both buzzers are turned off (drive low level)
+
+* Patches by Robert Schwebel, 06 Mar 2003:
+  - fix bug in BOOTP code (must use NetCopyIP)
+  - update of CSB226 port
+  - clear BSS segment on XScale
+  - added support for i2c_init_board() function
+  - update to the Innokom plattform
+
+* Extend support for redundand environments for configurations where
+  environment size < sector size
+
+* Patch by Rune Torgersen, 13 Feb 2003:
+  Add support for Motorola MPC8266ADS board
+
+* Patch by Kyle Harris, 19 Feb 2003:
+  patches for the Intel lubbock board:
+  memsetup.S - general cleanup (based on Robert's csb226 code)
+  flash.c - overhaul, actually works now
+  lubbock.c - fix init funcs to return proper value
+
+* Patch by Kenneth Johansson, 26 Feb 2003:
+  - Fixed off by one in RFTA calculation.
+  - No need to abort when LDF is lower than we can program it's only
+    minimum timing so clamp it to what we can do.
+  - Takes function pointer to function for reading the spd_nvram. Usefull
+    for faking data or hardcode a module without the nvram.
+  - fix other user for above change
+  - fix some comments.
+
+* Patches by Brian Waite, 26 Feb 2003:
+  - fix port for evb64260 board
+  - fix PCI for evb64260 board
+  - fix PCI scan
+
+* Patch by Reinhard Meyer, 1 Mar 2003:
+  Add support for EMK TOP860 Module
+
+* Patch by Yuli Barcohen, 02 Mar 2003:
+  Add SPD EEPROM support for MPC8260ADS board
+
 * Patch by Robert Schwebel, 21 Jan 2003:
   - Add support for Innokom board
   - Don't complain if "install" fails
@@ -46,6 +451,10 @@ Changes since U-Boot 0.2.2:
 * Patch by Stefan Roese, 10 Feb 2003:
   Add support for 4MB and 128MB onboard SDRAM (cpu/ppc4xx/sdram.c)
 
+* Add support for MIPS32 4Kc CPUs
+
+* Add support for INCA-IP Board
+
 ======================================================================
 Changes for U-Boot 0.2.2:
 ======================================================================

CREDITS

@@ -26,6 +26,10 @@ N: Guillaume Alexandre
 E: guillaume.alexandre@gespac.ch
 D: Add PCIPPC6 configuration
 
+N: Pantelis Antoniou
+E: panto@intracom.gr
+D: NETVIA board support, ARTOS support.
+
 N: Pierre Aubert
 E: <p.aubert@staubli.com>
 D: Support for RPXClassic board
@@ -46,6 +50,10 @@ N: Raphael Bossek
 E: raphael.bossek@solutions4linux.de
 D: 8xxrom-0.3.0
 
+N: Rick Bronson
+E: rick@efn.org
+D: Atmel AT91RM9200DK and NAND support
+
 N: David Brown
 E: DBrown03@harris.com
 D: Extensions to 8xxrom-0.3.0
@@ -66,6 +74,10 @@ N: Magnus Damm
 E: eramdam@kieray1.p.y.ki.era.ericsson.se
 D: 8xxrom
 
+N: Arun Dharankar
+E: ADharankar@ATTBI.Com
+D: threads / scheduler example code
+
 N: Kári Davíðsson
 E: kd@flaga.is
 D: FLAGA DM Support
@@ -96,6 +108,10 @@ E: wg@denx.de
 D: Support for Interphase 4539 T1/E1/J1 PMC, PN62, CCM, SCM boards
 W: www.denx.de
 
+N: Peter Figuli
+E: peposh@etc.sk
+D: Support for WEP EP250 (PXA) board
+
 N: Thomas Frieden
 E: ThomasF@hyperion-entertainment.com
 D: Support for AmigaOne
@@ -166,6 +182,11 @@ N: Thomas Lange
 E: thomas@corelatus.com
 D: Support for GTH board; lots of PCMCIA fixes
 
+N: The LEOX team
+E: team@leox.org
+D: Support for LEOX boards, DS164x RTC
+W: http://www.leox.org
+
 N: Raymond Lo
 E: lo@routefree.com
 D: Support for DOS partitions
@@ -174,6 +195,10 @@ N: Dan Malek
 E: dan@netx4.com
 D: FADSROM, the grandfather of all of this
 
+N: Reinhard Meyer
+E: r.meyer@emk-elektronik.de
+D: Port to EMK TOP860 Module
+
 N: Jay Monkman
 E: jtm@smoothsmoothie.com
 D: EST SBC8260 support
@@ -191,13 +216,9 @@ E: rof@sysgo.de
 D: Initial support for SSV-DNP1110, SMC91111 driver
 W: www.elinos.com
 
-N: Keith Outwater
-E: Keith_Outwater@mvis.com
-D: Support for GEN860T board
-
 N: Keith Outwater
 E: keith_outwater@mvis.com
-D: Support for generic/custom MPC860T board (GEN860T)
+D: Support for generic/custom MPC860T boards (GEN860T, GEN860T_SC)
 
 N: Frank Panno
 E: fpanno@delphintech.com
@@ -217,6 +238,10 @@ N: Stefan Roese
 E: stefan.roese@esd-electronics.com
 D: IBM PPC401/403/405GP Support; Windows environment support
 
+N: Erwin Rol
+E: erwin@muffin.org
+D: boot support for RTEMS
+
 N: Neil Russell
 E: caret@c-side.com
 D: Author of LiMon-1.4.2, which contributed some ideas
@@ -241,14 +266,26 @@ N: Jim Thompson
 E: jim@musenki.com
 D: Support for MUSENKI board
 
+N: Rune Torgersen
+E: <runet@innovsys.com>
+D: Support for Motorola MPC8266ADS board
+
 N: David Updegraff
 E: dave@cray.com
 D: Port to Cray L1 board; DHCP vendor extensions
 
+N: Martin Winistoerfer
+E: martinwinistoerfer@gmx.ch
+D: Port to MPC555/556 microcontrollers and support for cmi board
+
 N: Christian Vejlbo
 E: christian.vejlbo@tellabs.com
 D: FADS860T ethernet support
 
+N: John Zhan
+E: zhanz@sinovee.com
+D: Support for SinoVee Microsystems SC8xx SBC
+
 N: Alex Zuepke
 E: azu@sysgo.de
 D: Overall improvements on StrongARM, ARM720TDMI; Support for Tuxscreen; initial PCMCIA support for ARM

MAINTAINERS

@@ -14,6 +14,7 @@
 
 
 #########################################################################
+# PowerPC Systems:							#
 #									#
 # Maintainer Name, Email Address					#
 #	Board			CPU					#
@@ -27,10 +28,14 @@ Pantelis Antoniou <panto@intracom.gr>
 
 	NETVIA			MPC8xx
 
-Jerry Van Baren <vanbaren_gerald@si.com>
+Jerry Van Baren <gerald.vanbaren@smiths-aerospace.com>
 
 	sacsng			MPC8260
 
+Rick Bronson <rick@efn.org>
+
+	AT91RM9200DK		at91rm9200
+
 Oliver Brown <obrown@adventnetworks.com>
 
 	gw8260			MPC8260
@@ -75,6 +80,11 @@ Wolfgang Denk <wd@denx.de>
 	CU824			MPC8240
 	Sandpoint8240		MPC8240
 
+	ATC			MPC8250
+	PM825			MPC8250
+
+	TQM8255			MPC8255
+
 	CPU86			MPC8260
 	PM826			MPC8260
 	TQM8260			MPC8260
@@ -82,7 +92,7 @@ Wolfgang Denk <wd@denx.de>
 	PCIPPC2			MPC750
 	PCIPPC6			MPC750
 
-Jon Diekema <diekema_jon@si.com>
+Jon Diekema <jon.diekema@smiths-aerospace.com>
 
 	sbc8260			MPC8260
 
@@ -136,10 +146,18 @@ Thomas Lange <thomas@corelatus.com>
 
 	GTH			MPC860
 
+The LEOX team <team@leox.org>
+
+	ELPT860			MPC860T
+
 Eran Man <eran@nbase.co.il>
 
 	EVB64260_750CX		MPC750CX
 
+Reinhard Meyer <r.meyer@emk-elektronik.de>
+
+	TOP860			MPC860
+
 Scott McNutt <smcnutt@artesyncp.com>
 
 	EBONY			PPC440GP
@@ -147,6 +165,7 @@ Scott McNutt <smcnutt@artesyncp.com>
 Keith Outwater <Keith_Outwater@mvis.com>
 
 	GEN860T			MPC860T
+	GEN860T_SC		MPC860T
 
 Frank Panno <fpanno@delphintech.com>
 
@@ -161,14 +180,19 @@ Stefan Roese <stefan.roese@esd-electronics.com>
 
 	ADCIOP			IOP480 (PPC401)
 	AR405			PPC405GP
+	ASH405			PPC405EP
 	CANBT			PPC405CR
 	CPCI405			PPC405GP
+	CPCI4052		PPC405GP
+	CPCI405AB		PPC405GP
 	CPCI440			PPC440GP
 	CPCIISER4		PPC405GP
 	DASA_SIM		IOP480 (PPC401)
 	DU405			PPC405GP
 	OCRTC			PPC405GP
 	ORSG			PPC405GP
+	PCI405			PPC405GP
+	PMC405			PPC405GP
 
 Peter De Schrijver <p2@mind.be>
 
@@ -184,6 +208,14 @@ Jim Thompson <jim@musenki.com>
 	MUSENKI			MPC8245/8241
 	Sandpoint8245		MPC8245
 
+Rune Torgersen <runet@innovsys.com>
+
+	MPC8266ADS		MPC8266
+
+John Zhan <zhanz@sinovee.com>
+
+	svm_sc8xx		MPC8xx
+
 -------------------------------------------------------------------------
 
 Unknown / orphaned boards:
@@ -220,6 +252,10 @@ Unknown / orphaned boards:
 #	Board			CPU					#
 #########################################################################
 
+Peter Figuli <peposh@etc.sk>
+
+	wepep250		xscale
+
 Marius Gröger <mag@sysgo.de>
 
 	impa7			ARM720T (EP7211)
@@ -238,6 +274,7 @@ Gary Jennejohn <gj@denx.de>
 David Müller <d.mueller@elsoft.ch>
 
 	smdk2410		ARM920T
+	VCMA9			ARM920T
 
 Rolf Offermanns <rof@sysgo.de>
 
@@ -274,6 +311,7 @@ Daniel Engstr
 Wolfgang Denk <wd@denx.de>
 
 	incaip			MIPS32 4Kc
+	purple			MIPS64 5Kc
 
 #########################################################################
 # End of MAINTAINERS list						#

MAKEALL

@@ -10,23 +10,32 @@ fi
 
 LIST=""
 
+#########################################################################
+## MPC5xx Systems
+#########################################################################
+
+LIST_5xx="	\
+	cmi_mpc5xx							\
+"
+
 #########################################################################
 ## MPC8xx Systems
 #########################################################################
 
 LIST_8xx="	\
 	ADS860		AMX860		c2mon		CCM		\
-	cogent_mpc8xx	ESTEEM192E	ETX094		FADS823		\
-	FADS850SAR	FADS860T	FLAGADM		FPS850L		\
-	GEN860T		GENIETV		GTH		hermes		\
-	IAD210		ICU862_100MHz	IP860		IVML24		\
-	IVML24_128	IVML24_256	IVMS8		IVMS8_128	\
-	IVMS8_256	KUP4K           LANTEC	        lwmon   	\
-	MBX		MBX860T		MHPC		MVS1		\
-	NETVIA		NX823		pcu_e		R360MPI		\
-	RPXClassic	RPXlite		RRvision	SM850		\
-	SPD823TS	SXNI855T	TQM823L		TQM823L_LCD	\
-	TQM850L		TQM855L		TQM860L		TQM860L_FEC	\
+	cogent_mpc8xx	ESTEEM192E	ETX094		ELPT860		\
+	FADS823		FADS850SAR	FADS860T	FLAGADM		\
+	FPS850L		GEN860T		GEN860T_SC	GENIETV		\
+	GTH		hermes		IAD210		ICU862_100MHz	\
+	IP860		IVML24		IVML24_128	IVML24_256	\
+	IVMS8		IVMS8_128	IVMS8_256	KUP4K           \
+	LANTEC	        lwmon   	MBX		MBX860T		\
+	MHPC		MVS1		NETVIA		NX823		\
+	pcu_e		R360MPI		RBC823		RPXClassic	\
+	RPXlite		RRvision	SM850		SPD823TS	\
+	svm_sc8xx	SXNI855T	TOP860		TQM823L		\
+	TQM823L_LCD	TQM850L		TQM855L		TQM860L		\
 	TTTech		v37						\
 "
 
@@ -35,12 +44,13 @@ LIST_8xx="	\
 #########################################################################
 
 LIST_4xx="	\
-	ADCIOP		AR405		CANBT		CPCI405		\
-	CPCI4052 	CPCI440         CPCIISER4	CRAYL1  	\
-	DASA_SIM	DU405    	EBONY           ERIC  		\
-	MIP405  	ML2		OCRTC		ORSG		\
-	PCI405          PIP405		W7OLMC		W7OLMG          \
-	WALNUT405							\
+	ADCIOP		AR405		ASH405          BUBINGA405EP    \
+        CANBT		CPCI405		CPCI4052 	CPCI405AB       \
+        CPCI440         CPCIISER4	CRAYL1  	DASA_SIM	\
+        DU405    	EBONY           ERIC  		MIP405  	\
+        ML2		OCRTC		ORSG		PCI405          \
+        PIP405		PMC405          W7OLMC		W7OLMG          \
+        WALNUT405	\
 "
 
 #########################################################################
@@ -48,20 +58,21 @@ LIST_4xx="	\
 #########################################################################
 
 LIST_824x="	\
-	BMW		CU824		MOUSSE		MUSENKI		\
-	OXC		PN62		Sandpoint8240	Sandpoint8245	\
-	utx8245								\
+	BMW		CPC45		CU824		MOUSSE		\
+	MUSENKI		OXC		PN62		Sandpoint8240	\
+	Sandpoint8245	utx8245						\
 "
 
 #########################################################################
-## MPC8260 Systems
+## MPC8260 Systems (includes 8250, 8255 etc.)
 #########################################################################
 
 LIST_8260="	\
-	cogent_mpc8260	CPU86		ep8260		gw8260		\
-	hymod		IPHASE4539	MPC8260ADS	PM826		\
-	ppmc8260	RPXsuper	rsdproto	sacsng		\
-	sbc8260		SCM		TQM8260				\
+	atc		cogent_mpc8260	CPU86		ep8260		\
+	gw8260		hymod		IPHASE4539	MPC8260ADS	\
+	MPC8266ADS	PM826		ppmc8260	RPXsuper	\
+	rsdproto	sacsng		sbc8260		SCM		\
+	TQM8260								\
 "
 
 #########################################################################
@@ -76,36 +87,57 @@ LIST_7xx="	\
 	BAB7xx		ELPPC						\
 "
 
-LIST_ppc="${LIST_8xx} ${LIST_824x} ${LIST_8260} \
-	  ${LIST_4xx} ${LIST_74xx} ${LIST_7xx}"
+LIST_ppc="${LIST_5xx}  ${LIST_8xx}  \
+	  ${LIST_824x} ${LIST_8260} \
+	  ${LIST_4xx}		    \
+	  ${LIST_74xx} ${LIST_7xx}"
 
 #########################################################################
 ## StrongARM Systems
 #########################################################################
 
-LIST_SA="lart shannon dnp1110"
+LIST_SA="dnp1110 lart shannon"
 
 #########################################################################
 ## ARM7 Systems
 #########################################################################
 
-LIST_ARM7="impa7 ep7312"
+LIST_ARM7="ep7312 impa7"
 
 #########################################################################
 ## ARM9 Systems
 #########################################################################
 
-LIST_ARM9="smdk2400 smdk2410 trab"
+LIST_ARM9="at91rm9200dk smdk2400 smdk2410 trab VCMA9"
 
 #########################################################################
 ## Xscale Systems
 #########################################################################
 
-LIST_xscale="lubbock cradle csb226 innokom"
+LIST_pxa="cradle csb226 innokom lubbock wepep250"
 
 
-LIST_arm="${LIST_SA} ${LIST_ARM7} ${LIST_ARM9} ${LIST_xscale}"
+LIST_arm="${LIST_SA} ${LIST_ARM7} ${LIST_ARM9} ${LIST_pxa}"
 
+#########################################################################
+## MIPS 4Kc Systems
+#########################################################################
+
+LIST_mips4kc="incaip"
+
+LIST_mips5kc="purple"
+
+LIST_mips="${LIST_mips4kc} ${LIST_mips5kc}"
+
+#########################################################################
+## i386 Systems
+#########################################################################
+
+LIST_I486="sc520_cdp sc520_spunk sc520_spunk_rel"
+
+LIST_x86="${LIST_I486}"
+
+#-----------------------------------------------------------------------
 
 #----- for now, just run PPC by default -----
 [ $# = 0 ] && set $LIST_ppc
@@ -127,7 +159,7 @@ build_target() {
 for arg in $@
 do
 	case "$arg" in
-	8xx|824x|8260|4xx|7xx|74xx|SA|ARM7|ARM9|ppc|arm|xscale)
+	5xx|8xx|824x|8260|4xx|7xx|74xx|SA|ARM7|ARM9|ppc|arm|pxa|mips|I486|x86)
 			for target in `eval echo '$LIST_'${arg}`
 			do
 				build_target ${target}

Makefile

@@ -53,29 +53,18 @@ ifndef CROSS_COMPILE
 ifeq ($(HOSTARCH),ppc)
 CROSS_COMPILE =
 else
-##  #ifeq ($(CPU),mpc8xx)
-##  CROSS_COMPILE = ppc_8xx-
-##  #endif
-##  #ifeq ($(CPU),ppc4xx)
-##  #CROSS_COMPILE = ppc_4xx-
-##  #endif
-##  #ifeq ($(CPU),mpc824x)
-##  #CROSS_COMPILE = ppc_82xx-
-##  #endif
-##  #ifeq ($(CPU),mpc8260)
-##  #CROSS_COMPILE = ppc_82xx-
-##  #endif
-##  #ifeq ($(CPU),74xx_7xx)
-##  #CROSS_COMPILE = ppc_74xx-)
-##  #endif
 ifeq ($(ARCH),ppc)
 CROSS_COMPILE = ppc_8xx-
 endif
 ifeq ($(ARCH),arm)
-CROSS_COMPILE = arm_920TDI-
+CROSS_COMPILE = arm-linux-
 endif
 ifeq ($(ARCH),i386)
-#CROSS_COMPILE = i386-elf-
+ifeq ($(HOSTARCH),i386)
+CROSS_COMPILE =
+else
+CROSS_COMPILE = i386-linux-
+endif
 endif
 ifeq ($(ARCH),mips)
 CROSS_COMPILE = mips_4KC-
@@ -183,6 +172,14 @@ unconfig:
 #========================================================================
 # PowerPC
 #========================================================================
+
+#########################################################################
+## MPC5xx Systems
+#########################################################################
+
+cmi_mpc5xx_config:	unconfig
+	@./mkconfig $(@:_config=) ppc mpc5xx cmi
+
 #########################################################################
 ## MPC8xx Systems
 #########################################################################
@@ -202,6 +199,9 @@ CCM_config:		unconfig
 cogent_mpc8xx_config:	unconfig
 	@./mkconfig $(@:_config=) ppc mpc8xx cogent
 
+ELPT860_config:		unconfig
+	@./mkconfig $(@:_config=) ppc mpc8xx elpt860 LEOX
+
 ESTEEM192E_config:	unconfig
 	@./mkconfig $(@:_config=) ppc mpc8xx esteem192e
 
@@ -216,8 +216,16 @@ FADS860T_config:	unconfig
 FLAGADM_config:	unconfig
 	@./mkconfig $(@:_config=) ppc mpc8xx flagadm
 
+xtract_GEN860T = $(subst _SC,,$(subst _config,,$1))
+
+GEN860T_SC_config	\
 GEN860T_config: unconfig
-	@./mkconfig $(@:_config=) ppc mpc8xx gen860t
+	@ >include/config.h
+	@[ -z "$(findstring _SC,$@)" ] || \
+		{ echo "#define CONFIG_SC" >>include/config.h ; \
+		  echo "With reduced H/W feature set (SC)..." ; \
+		}
+	@./mkconfig -a $(call xtract_GEN860T,$@) ppc mpc8xx gen860t
 
 GENIETV_config:	unconfig
 	@./mkconfig $(@:_config=) ppc mpc8xx genietv
@@ -306,6 +314,9 @@ pcu_e_config:		unconfig
 R360MPI_config:	unconfig
 	@./mkconfig $(@:_config=) ppc mpc8xx r360mpi
 
+RBC823_config:	unconfig
+	@./mkconfig $(@:_config=) ppc mpc8xx rbc823
+
 RPXClassic_config:	unconfig
 	@./mkconfig $(@:_config=) ppc mpc8xx RPXClassic
 
@@ -326,14 +337,22 @@ SM850_config	:	unconfig
 SPD823TS_config:	unconfig
 	@./mkconfig $(@:_config=) ppc mpc8xx spd8xx
 
+svm_sc8xx_config:	unconfig
+	@ >include/config.h
+	@./mkconfig $(@:_config=) ppc mpc8xx svm_sc8xx
+
 SXNI855T_config:	unconfig
 	@./mkconfig $(@:_config=) ppc mpc8xx sixnet
 
+# EMK MPC8xx based modules
+TOP860_config:		unconfig
+	@./mkconfig $(@:_config=) ppc mpc8xx top860 emk
+
 # Play some tricks for configuration selection
 # All boards can come with 50 MHz (default), 66MHz or 80MHz clock,
 # but only 855 and 860 boards may come with FEC
 # and 823 boards may have LCD support
-xtract_8xx = $(subst _66MHz,,$(subst _80MHz,,$(subst _LCD,,$(subst _FEC,,$(subst _config,,$1)))))
+xtract_8xx = $(subst _66MHz,,$(subst _80MHz,,$(subst _LCD,,$(subst _config,,$1))))
 
 FPS850L_config		\
 FPS860L_config		\
@@ -349,20 +368,13 @@ TQM850L_80MHz_config	\
 TQM855L_config		\
 TQM855L_66MHz_config	\
 TQM855L_80MHz_config	\
-TQM855L_FEC_config	\
-TQM855L_FEC_66MHz_config \
-TQM855L_FEC_80MHz_config \
 TQM860L_config		\
 TQM860L_66MHz_config	\
 TQM860L_80MHz_config	\
-TQM860L_FEC_config	\
-TQM860L_FEC_66MHz_config	\
-TQM860L_FEC_80MHz_config:	unconfig
+TQM862L_config		\
+TQM862L_66MHz_config	\
+TQM862L_80MHz_config:	unconfig
 	@ >include/config.h
-	@[ -z "$(findstring _FEC,$@)" ] || \
-		{ echo "#define CONFIG_FEC_ENET"	>>include/config.h ; \
-		  echo "... with FEC support" ; \
-		}
 	@[ -z "$(findstring _66MHz,$@)" ] || \
 		{ echo "#define CONFIG_66MHz"		>>include/config.h ; \
 		  echo "... with 66MHz system clock" ; \
@@ -398,11 +410,18 @@ ADCIOP_config:	unconfig
 AR405_config:	unconfig
 	@./mkconfig $(@:_config=) ppc ppc4xx ar405 esd
 
+ASH405_config:	unconfig
+	@./mkconfig $(@:_config=) ppc ppc4xx ash405 esd
+
+BUBINGA405EP_config:unconfig
+	@./mkconfig $(@:_config=) ppc ppc4xx bubinga405ep
+
 CANBT_config:	unconfig
 	@./mkconfig $(@:_config=) ppc ppc4xx canbt esd
 
-CPCI405_config		\
-CPCI4052_config:	unconfig
+CPCI405_config	\
+CPCI4052_config	\
+CPCI405AB_config:	unconfig
 	@./mkconfig $(@:_config=) ppc ppc4xx cpci405 esd
 	@echo "BOARD_REVISION = $(@:_config=)"	>>include/config.mk
 
@@ -443,6 +462,9 @@ PCI405_config:	unconfig
 PIP405_config:unconfig
 	@./mkconfig $(@:_config=) ppc ppc4xx pip405 mpl
 
+PMC405_config:	unconfig
+	@./mkconfig $(@:_config=) ppc ppc4xx pmc405 esd
+
 W7OLMC_config	\
 W7OLMG_config: unconfig
 	@./mkconfig $(@:_config=) ppc ppc4xx w7o
@@ -453,9 +475,24 @@ WALNUT405_config:unconfig
 #########################################################################
 ## MPC824x Systems
 #########################################################################
+xtract_82xx = $(subst _ROMBOOT,,$(subst _L2,,$(subst _266MHz,,$(subst _300MHz,,$(subst _config,,$1)))))
+
 BMW_config: unconfig
 	@./mkconfig $(@:_config=) ppc mpc824x bmw
 
+CPC45_config	\
+CPC45_ROMBOOT_config:	unconfig
+	@./mkconfig $(call xtract_82xx,$@) ppc mpc824x cpc45
+	@cd ./include ;				\
+	if [ "$(findstring _ROMBOOT_,$@)" ] ; then \
+		echo "CONFIG_BOOT_ROM = y" >> config.mk ; \
+		echo "... booting from 8-bit flash" ; \
+	else \
+		echo "CONFIG_BOOT_ROM = n" >> config.mk ; \
+		echo "... booting from 64-bit flash" ; \
+	fi; \
+	echo "export CONFIG_BOOT_ROM" >> config.mk;
+
 CU824_config: unconfig
 	@./mkconfig $(@:_config=) ppc mpc824x cu824
 
@@ -483,7 +520,6 @@ utx8245_config: unconfig
 #########################################################################
 ## MPC8260 Systems
 #########################################################################
-xtract_82xx = $(subst _ROMBOOT,,$(subst _L2,,$(subst _266MHz,,$(subst _300MHz,,$(subst _config,,$1)))))
 
 cogent_mpc8260_config:	unconfig
 	@./mkconfig $(@:_config=) ppc mpc8260 cogent
@@ -516,6 +552,23 @@ IPHASE4539_config:	unconfig
 MPC8260ADS_config:	unconfig
 	@./mkconfig $(@:_config=) ppc mpc8260 mpc8260ads
 
+MPC8266ADS_config:	unconfig
+	@./mkconfig $(@:_config=) ppc mpc8260 mpc8266ads
+
+PM825_config	\
+PM825_ROMBOOT_config: unconfig
+	@echo "#define CONFIG_PCI"	>include/config.h
+	@./mkconfig -a PM826 ppc mpc8260 pm826
+	@cd ./include ;				\
+	if [ "$(findstring _ROMBOOT_,$@)" ] ; then \
+		echo "CONFIG_BOOT_ROM = y" >> config.mk ; \
+		echo "... booting from 8-bit flash" ; \
+	else \
+		echo "CONFIG_BOOT_ROM = n" >> config.mk ; \
+		echo "... booting from 64-bit flash" ; \
+	fi; \
+	echo "export CONFIG_BOOT_ROM" >> config.mk; \
+
 PM826_config	\
 PM826_ROMBOOT_config: unconfig
 	@./mkconfig $(call xtract_82xx,$@) ppc mpc8260 pm826
@@ -547,10 +600,13 @@ sbc8260_config:	unconfig
 SCM_config:		unconfig
 	@./mkconfig $(@:_config=) ppc mpc8260 SCM siemens
 
+TQM8255_config	\
 TQM8260_config	\
 TQM8260_L2_config	\
+TQM8255_266MHz_config	\
 TQM8260_266MHz_config	\
 TQM8260_L2_266MHz_config \
+TQM8255_300MHz_config	\
 TQM8260_300MHz_config:	unconfig
 	@ >include/config.h
 	@if [ "$(findstring _L2_,$@)" ] ; then \
@@ -568,7 +624,12 @@ TQM8260_300MHz_config:	unconfig
 		{ echo "#define CONFIG_300MHz"	>>include/config.h ; \
 		  echo "... with 300MHz system clock" ; \
 		}
-	@./mkconfig -a $(call xtract_82xx,$@) ppc mpc8260 tqm8260
+	@[ -z "$(findstring TQM8255_,$@)" ] || \
+		{ echo "#define CONFIG_MPC8255"	>>include/config.h ; }
+	@./mkconfig -a TQM8260 ppc mpc8260 tqm8260
+
+atc_config:	unconfig
+	@./mkconfig $(@:_config=) ppc mpc8260 atc
 
 #########################################################################
 ## 74xx/7xx Systems
@@ -601,6 +662,9 @@ ELPPC_config: unconfig
 ## StrongARM Systems
 #########################################################################
 
+at91rm9200dk_config	:	unconfig
+	@./mkconfig $(@:_config=) arm at91rm9200 at91rm9200dk
+
 lart_config	:	unconfig
 	@./mkconfig $(@:_config=) arm sa1100 lart
 
@@ -631,6 +695,9 @@ trab_big_flash_config:	unconfig
 		}
 	@./mkconfig -a $(call xtract_trab,$@) arm arm920t trab
 
+VCMA9_config	:	unconfig
+	@./mkconfig $(@:_config=) arm arm920t vcma9 mpl
+
 #########################################################################
 ## ARM720T Systems
 #########################################################################
@@ -646,26 +713,35 @@ ep7312_config	:	unconfig
 #########################################################################
 
 cradle_config	:	unconfig
-	@./mkconfig $(@:_config=) arm xscale cradle
+	@./mkconfig $(@:_config=) arm pxa cradle 
 
 csb226_config	:	unconfig
-	@./mkconfig $(@:_config=) arm xscale csb226
+	@./mkconfig $(@:_config=) arm pxa csb226
 
 innokom_config	:	unconfig
-	@./mkconfig $(@:_config=) arm xscale innokom
+	@./mkconfig $(@:_config=) arm pxa innokom
 
 lubbock_config	:	unconfig
-	@./mkconfig $(@:_config=) arm xscale lubbock
+	@./mkconfig $(@:_config=) arm pxa lubbock
+
+wepep250_config	:	unconfig
+	@./mkconfig $(@:_config=) arm pxa wepep250
 
 #========================================================================
 # i386
 #========================================================================
 #########################################################################
-## AMD SC520 CDP 
+## AMD SC520 CDP
 #########################################################################
 sc520_cdp_config	:	unconfig
 	@./mkconfig $(@:_config=) i386 i386 sc520_cdp
 
+sc520_spunk_config	:	unconfig
+	@./mkconfig $(@:_config=) i386 i386 sc520_spunk
+
+sc520_spunk_rel_config	:	unconfig
+	@./mkconfig $(@:_config=) i386 i386 sc520_spunk
+
 #========================================================================
 # MIPS
 #========================================================================
@@ -676,18 +752,26 @@ sc520_cdp_config	:	unconfig
 incaip_config :		unconfig
 	@./mkconfig $(@:_config=) mips mips incaip
 
+purple_config :		unconfig
+	@./mkconfig $(@:_config=) mips mips purple
 
+#########################################################################
+#########################################################################
 
 clean:
 	find . -type f \
 		\( -name 'core' -o -name '*.bak' -o -name '*~' \
 		-o -name '*.o'  -o -name '*.a'  \) -print \
 		| xargs rm -f
-	rm -f examples/hello_world examples/timer examples/eepro100_eeprom
+	rm -f examples/hello_world examples/timer \
+	      examples/eepro100_eeprom examples/sched \
+	      examples/mem_to_mem_idma2intr examples/82559_eeprom
+
 	rm -f tools/img2srec tools/mkimage tools/envcrc tools/gen_eth_addr
 	rm -f tools/easylogo/easylogo tools/bmp_logo
 	rm -f tools/gdb/astest tools/gdb/gdbcont tools/gdb/gdbsend
 	rm -f tools/env/fw_printenv tools/env/fw_setenv
+	rm -f board/cray/L1/bootscript.c board/cray/L1/bootscript.image
 
 clobber:	clean
 	find . -type f \
@@ -696,9 +780,9 @@ clobber:	clean
 		| xargs rm -f
 	rm -f $(OBJS) *.bak tags TAGS
 	rm -fr *.*~
-	rm -f u-boot u-boot.bin u-boot.elf u-boot.srec u-boot.map System.map
+	rm -f u-boot u-boot.bin u-boot.srec u-boot.map System.map
 	rm -f tools/crc32.c tools/environment.c tools/env/crc32.c
-	rm -f cpu/mpc824x/bedbug_603e.c
+	rm -f tools/inca-swap-bytes cpu/mpc824x/bedbug_603e.c
 	rm -f include/asm/arch include/asm
 
 mrproper \

README

@@ -140,15 +140,19 @@ Directory Hierarchy:
 - tools		Tools to build S-Record or U-Boot images, etc.
 
 - cpu/74xx_7xx	Files specific to Motorola MPC74xx and 7xx CPUs
+- cpu/mpc5xx	Files specific to Motorola MPC5xx  CPUs
 - cpu/mpc8xx	Files specific to Motorola MPC8xx  CPUs
 - cpu/mpc824x	Files specific to Motorola MPC824x CPUs
 - cpu/mpc8260	Files specific to Motorola MPC8260 CPU
 - cpu/ppc4xx	Files specific to IBM	   4xx	   CPUs
 
+- board/LEOX/   Files specific to boards manufactured by The LEOX team
+- board/LEOX/elpt860	Files specific to ELPT860 boards
 - board/RPXClassic
 		Files specific to RPXClassic boards
 - board/RPXlite	Files specific to RPXlite    boards
 - board/c2mon	Files specific to c2mon	     boards
+- board/cmi	Files specific to cmi        boards
 - board/cogent	Files specific to Cogent     boards
 		(need further configuration)
 		Files specific to CPCIISER4  boards
@@ -176,7 +180,7 @@ Directory Hierarchy:
 		Files specific to EVB64260   boards
 - board/fads	Files specific to FADS	     boards
 - board/flagadm Files specific to FLAGADM    boards
-- board/gen860t Files specific to GEN860T    boards
+- board/gen860t Files specific to GEN860T and GEN860T_SC    boards
 - board/genietv Files specific to GENIETV    boards
 - board/gth	Files specific to GTH	     boards
 - board/hermes	Files specific to HERMES     boards
@@ -290,6 +294,7 @@ The following options need to be configured:
 		PowerPC based CPUs:
 		-------------------
 		CONFIG_MPC823,	CONFIG_MPC850,	CONFIG_MPC855,	CONFIG_MPC860
+	or	CONFIG_MPC5xx
 	or	CONFIG_MPC824X, CONFIG_MPC8260
 	or	CONFIG_IOP480
 	or	CONFIG_405GP
@@ -338,7 +343,8 @@ The following options need to be configured:
 		CONFIG_GTH,        CONFIG_RPXClassic, CONFIG_rsdproto,
 		CONFIG_IAD210,     CONFIG_RPXlite,    CONFIG_sbc8260,
 		CONFIG_EBONY,      CONFIG_sacsng,     CONFIG_FPS860L,
-		CONFIG_V37
+		CONFIG_V37,        CONFIG_ELPT860,    CONFIG_CMI,
+		CONFIG_NETVIA,     CONFIG_RBC823
 
 		ARM based boards:
 		-----------------
@@ -464,6 +470,13 @@ The following options need to be configured:
 		Set to 0 to disable this feature (this is the default).
 		This will also disable hardware handshake.
 
+- Console UART Number:
+		CONFIG_UART1_CONSOLE
+
+		IBM PPC4xx only.
+		If defined internal UART1 (and not UART0) is used
+		as default U-Boot console.
+
 - Boot Delay:	CONFIG_BOOTDELAY - in seconds
 		Delay before automatically booting the default image;
 		set to -1 to disable autoboot.
@@ -615,6 +628,13 @@ The following options need to be configured:
 		SIU Watchdog feature is enabled in the SYPCR
 		register.
 
+- U-Boot Version:
+		CONFIG_VERSION_VARIABLE
+		If this variable is defined, an environment variable
+		named "ver" is created by U-Boot showing the U-Boot
+		version as printed by the "version" command.
+		This variable is readonly.
+
 - Real-Time Clock:
 
 		When CFG_CMD_DATE is selected, the type of the RTC
@@ -624,7 +644,10 @@ The following options need to be configured:
 		CONFIG_RTC_MPC8xx	- use internal RTC of MPC8xx
 		CONFIG_RTC_PCF8563	- use Philips PCF8563 RTC
 		CONFIG_RTC_MC146818	- use MC146818 RTC
+		CONFIG_RTC_DS1307	- use Maxim, Inc. DS1307 RTC
 		CONFIG_RTC_DS1337	- use Maxim, Inc. DS1337 RTC
+		CONFIG_RTC_DS1338	- use Maxim, Inc. DS1338 RTC
+		CONFIG_RTC_DS164x	- use Dallas DS164x RTC
 
 - Timestamp Support:
 
@@ -665,6 +688,9 @@ The following options need to be configured:
 		CFG_SCSI_SYM53C8XX_CCF to fix clock timing (80Mhz)
 
 - NETWORK Support (PCI):
+		CONFIG_E1000
+		Support for Intel 8254x gigabit chips.
+		
 		CONFIG_EEPRO100
 		Support for Intel 82557/82559/82559ER chips.
 		Optional CONFIG_EEPRO100_SROM_WRITE enables eeprom
@@ -681,6 +707,18 @@ The following options need to be configured:
 		CONFIG_NS8382X
 		Support for National dp8382[01] gigabit chips.
 
+- NETWORK Support (other):
+
+		CONFIG_DRIVER_LAN91C96
+		Support for SMSC's LAN91C96 chips.
+
+			CONFIG_LAN91C96_BASE
+			Define this to hold the physical address
+			of the LAN91C96's I/O space
+
+			CONFIG_LAN91C96_USE_32_BIT
+			Define this to enable 32 bit addressing
+
 - USB Support:
 		At the moment only the UHCI host controller is
 		supported (PIP405, MIP405); define
@@ -726,11 +764,18 @@ The following options need to be configured:
 	16,7 Mill (24bit)     315       318       31b
 		(i.e. setenv videomode 317; saveenv; reset;)
 
-		CONFIG_VIDEO_SED13806 
+		CONFIG_VIDEO_SED13806
 		Enable Epson SED13806 driver. This driver supports 8bpp
 		and 16bpp modes defined by CONFIG_VIDEO_SED13806_8BPP
 		or CONFIG_VIDEO_SED13806_16BPP
 
+- Keyboard Support:
+                CONFIG_KEYBOARD
+
+                Define this to enable a custom keyboard support.
+                This simply calls drv_keyboard_init() which must be
+                defined in your board-specific files.
+                The only board using this so far is RBC823.
 
 - LCD Support:	CONFIG_LCD
 
@@ -775,6 +820,18 @@ The following options need to be configured:
 		Normally display is black on white background; define
 		CFG_WHITE_ON_BLACK to get it inverted.
 
+- Spash Screen Support: CONFIG_SPLASH_SCREEN
+
+                If this option is set, the environment is checked for
+                a variable "splashimage". If found, the usual display
+                of logo, copyright and system information on the LCD
+                is supressed and the BMP image at the address
+                specified in "splashimage" is loaded instead. The
+                console is redirected to the "nulldev", too. This
+                allows for a "silent" boot where a splash screen is
+                loaded very quickly after power-on.
+
+
 - Ethernet address:
 		CONFIG_ETHADDR
 		CONFIG_ETH2ADDR
@@ -897,6 +954,17 @@ The following options need to be configured:
 		controls the rate of data transfer.  The data rate thus
 		is 1 / (I2C_DELAY * 4).
 
+		CFG_I2C_INIT_BOARD
+
+                When a board is reset during an i2c bus transfer
+                chips might think that the current transfer is still
+                in progress. On some boards it is possible to access
+                the i2c SCLK line directly, either by using the
+                processor pin as a GPIO or by having a second pin
+                connected to the bus. If this option is defined a
+                custom i2c_init_board() routine in boards/xxx/board.c
+                is run early in the boot sequence.
+
 - SPI Support:	CONFIG_SPI
 
 		Enables SPI driver (so far only tested with
@@ -1043,7 +1111,7 @@ The following options need to be configured:
 
 		If CONFIG_ENV_OVERWRITE is #defined in your config
 		file, the write protection for vendor parameters is
-		completely disabled. Anybody can change or delte
+		completely disabled. Anybody can change or delete
 		these parameters.
 
 		Alternatively, if you #define _both_ CONFIG_ETHADDR
@@ -1125,13 +1193,13 @@ The following options need to be configured:
 
 	Note:
 
-		In the current implementation, the local variables
-		space and global environment variables space are
-		separated. Local variables are those you define by
-		simply typing like `name=value'. To access a local
-		variable later on, you have write `$name' or
-		`${name}'; variable directly by typing say `$name' at
-		the command prompt.
+                In the current implementation, the local variables
+                space and global environment variables space are
+                separated. Local variables are those you define by
+                simply typing `name=value'. To access a local
+                variable later on, you have write `$name' or
+                `${name}'; to execute the contents of a variable
+                directly type `$name' at the command prompt.
 
 		Global environment variables are those you use
 		setenv/printenv to work with. To run a command stored
@@ -1230,7 +1298,7 @@ The following options need to be configured:
 Modem Support:
 --------------
 
-[so far only for SMDK2400 board]
+[so far only for SMDK2400 and TRAB boards]
 
 - Modem support endable:
 		CONFIG_MODEM_SUPPORT
@@ -1331,7 +1399,10 @@ Configuration Settings:
 		CFG_FLASH_BASE when booting from flash.
 
 - CFG_MONITOR_LEN:
-		Size of memory reserved for monitor code
+                Size of memory reserved for monitor code, used to
+                determine _at_compile_time_ (!) if the environment is
+                embedded within the U-Boot image, or in a separate
+                flash sector.
 
 - CFG_MALLOC_LEN:
 		Size of DRAM reserved for malloc() use.
@@ -1437,7 +1508,7 @@ following configurations:
 
 	   These settings describe a second storage area used to hold
 	   a redundand copy of the environment data, so that there is
-	   a valid backup copy in case there is a power failur during
+	   a valid backup copy in case there is a power failure during
 	   a "saveenv" operation.
 
 BE CAREFUL! Any changes to the flash layout, and some changes to the
@@ -1517,23 +1588,20 @@ has been relocated to RAM and a RAM copy of the environment has been
 created; also, when using EEPROM you will have to use getenv_r()
 until then to read environment variables.
 
-The environment is now protected by a CRC32 checksum. Before the
-monitor is relocated into RAM, as a result of a bad CRC you will be
-working with the compiled-in default environment - *silently*!!!
-[This is necessary, because the first environment variable we need is
-the "baudrate" setting for the console - if we have a bad CRC, we
-don't have any device yet where we could complain.]
+The environment is protected by a CRC32 checksum. Before the monitor
+is relocated into RAM, as a result of a bad CRC you will be working
+with the compiled-in default environment - *silently*!!! [This is
+necessary, because the first environment variable we need is the
+"baudrate" setting for the console - if we have a bad CRC, we don't
+have any device yet where we could complain.]
 
 Note: once the monitor has been relocated, then it will complain if
 the default environment is used; a new CRC is computed as soon as you
-use the "setenv" command to modify / delete / add any environment
-variable [even when you try to delete a non-existing variable!].
-
-Note2: you must edit your u-boot.lds file to reflect this
-configuration.
+use the "saveenv" command to store a valid environment.
 
 
 Low Level (hardware related) configuration options:
+---------------------------------------------------
 
 - CFG_CACHELINE_SIZE:
 		Cache Line Size of the CPU.
@@ -1589,16 +1657,16 @@ Low Level (hardware related) configuration options:
 		- MPC824X: data cache
 		- PPC4xx:  data cache
 
-- CFG_INIT_DATA_OFFSET:
+- CFG_GBL_DATA_OFFSET:
 
 		Offset of the initial data structure in the memory
 		area defined by CFG_INIT_RAM_ADDR. Usually
-		CFG_INIT_DATA_OFFSET is chosen such that the initial
+		CFG_GBL_DATA_OFFSET is chosen such that the initial
 		data is located at the end of the available space
 		(sometimes written as (CFG_INIT_RAM_END -
 		CFG_INIT_DATA_SIZE), and the initial stack is just
 		below that area (growing from (CFG_INIT_RAM_ADDR +
-		CFG_INIT_DATA_OFFSET) downward.
+		CFG_GBL_DATA_OFFSET) downward.
 
 	Note:
 		On the MPC824X (or other systems that use the data
@@ -1662,6 +1730,16 @@ Low Level (hardware related) configuration options:
 		#define'd default value in commproc.h resp.
 		cpm_8260.h.
 
+- CFG_PCI_SLV_MEM_LOCAL, CFG_PCI_SLV_MEM_BUS, CFG_PICMR0_MASK_ATTRIB,
+  CFG_PCI_MSTR0_LOCAL, CFG_PCIMSK0_MASK, CFG_PCI_MSTR1_LOCAL,
+  CFG_PCIMSK1_MASK, CFG_PCI_MSTR_MEM_LOCAL, CFG_PCI_MSTR_MEM_BUS,
+  CFG_CPU_PCI_MEM_START, CFG_PCI_MSTR_MEM_SIZE, CFG_POCMR0_MASK_ATTRIB,
+  CFG_PCI_MSTR_MEMIO_LOCAL, CFG_PCI_MSTR_MEMIO_BUS, CPU_PCI_MEMIO_START,
+  CFG_PCI_MSTR_MEMIO_SIZE, CFG_POCMR1_MASK_ATTRIB, CFG_PCI_MSTR_IO_LOCAL,
+  CFG_PCI_MSTR_IO_BUS, CFG_CPU_PCI_IO_START, CFG_PCI_MSTR_IO_SIZE,
+  CFG_POCMR2_MASK_ATTRIB: (MPC826x only)
+		Overrides the default PCI memory map in cpu/mpc8260/pci.c if set.
+
 Building the Software:
 ======================
 
@@ -1704,6 +1782,7 @@ configurations; the following names are supported:
     FPS850L_config	  Sandpoint8240_config	sbc8260_config
     GENIETV_config	  TQM823L_config	PIP405_config
     GEN860T_config	  EBONY_config		FPS860L_config
+    ELPT860_config	  cmi_mpc5xx_config	NETVIA_config
 
 Note: for some board special configuration names may exist; check  if
       additional  information is available from the board vendor; for
@@ -1754,14 +1833,21 @@ to port U-Boot to your hardware platform. To do this, follow these
 steps:
 
 1.  Add a new configuration option for your board to the toplevel
-    "Makefile", using the existing entries as examples.
+    "Makefile" and to the "MAKEALL" script, using the existing
+    entries as examples. Note that here and at many other places
+    boards and other names are listed alphabetically sorted. Please
+    keep this order.
 2.  Create a new directory to hold your board specific code. Add any
-    files you need.
+    files you need. In your board directory, you will need at least
+    the "Makefile", a "<board>.c", "flash.c" and "u-boot.lds".
+3.  Create a new configuration file "include/configs/<board>.h" for
+    your board
 3.  If you're porting U-Boot to a new CPU, then also create a new
     directory to hold your CPU specific code. Add any files you need.
-4.  Run "make config_name" with your new name.
+4.  Run "make <board>_config" with your new name.
 5.  Type "make", and you should get a working "u-boot.srec" file
     to be installed on your target system.
+6.  Debug and solve any problems that might arise.
     [Of course, this last step is much harder than it sounds.]
 
 
@@ -1888,6 +1974,12 @@ Some configuration options can be set using Environment Variables:
 		  be automatically started (by internally calling
 		  "bootm")
 
+		  If set to "no", a standalone image passed to the
+		  "bootm" command will be copied to the load address
+		  (and eventually uncompressed), but NOT be started.
+		  This can be used to load and uncompress arbitrary
+		  data.
+
   initrd_high	- restrict positioning of initrd images:
 		  If this variable is not set, initrd images will be
 		  copied to the highest possible address in RAM; this
@@ -1909,10 +2001,18 @@ Some configuration options can be set using Environment Variables:
 
 		  setenv initrd_high 00c00000
 
+                  If you set initrd_high to 0xFFFFFFFF, this is an
+                  indication to U-Boot that all addresses are legal
+                  for the Linux kernel, including addresses in flash
+                  memory. In this case U-Boot will NOT COPY the
+                  ramdisk at all. This may be useful to reduce the
+                  boot time on your system, but requires that this
+                  feature is supported by your Linux kernel.
+
   ipaddr	- IP address; needed for tftpboot command
 
   loadaddr	- Default load address for commands like "bootp",
-		  "rarpboot", "tftpboot" or "diskboot"
+		  "rarpboot", "tftpboot", "loadb" or "diskboot"
 
   loads_echo	- see CONFIG_LOADS_ECHO
 
@@ -1950,10 +2050,59 @@ the board). U-Boot refuses to delete or overwrite these variables
 once they have been set once.
 
 
+Further special Environment Variables:
+
+  ver		- Contains the U-Boot version string as printed
+		  with the "version" command. This variable is
+		  readonly (see CONFIG_VERSION_VARIABLE).
+
+
 Please note that changes to some configuration parameters may take
 only effect after the next boot (yes, that's just like Windoze :-).
 
 
+Command Line Parsing:
+=====================
+
+There are two different command line parsers available  with  U-Boot:
+the old "simple" one, and the much more pwerful "hush" shell:
+
+Old, simple command line parser:
+--------------------------------
+
+- supports environment variables (through setenv / saveenv commands)
+- several commands on one line, separated by ';'
+- variable substitution using "... $(name) ..." syntax
+- special characters ('$', ';') can be escaped by prefixing with '\',
+  for example:
+	setenv bootcmd bootm \$(address)
+- You can also escape text by enclosing in single apostrophes, for example:
+	setenv addip 'setenv bootargs $bootargs ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname::off'
+
+Hush shell:
+-----------
+
+- similar to Bourne shell, with control structures like
+  if...then...else...fi, for...do...done; while...do...done,
+  until...do...done, ...
+- supports environment ("global") variables (through setenv / saveenv
+  commands) and local shell variables (through standard shell syntax
+  "name=value"); only environment variables can be used with "run"
+  command
+
+General rules:
+--------------
+
+(1) If a command line (or an environment variable executed by a "run"
+    command) contains several commands separated by semicolon, and
+    one of these commands fails, then the remaining commands will be
+    executed anyway.
+
+(2) If you execute several variables with one call to run (i. e.
+    calling run with a list af variables as arguments), any failing
+    command will cause "run" to terminate, i. e. the remaining
+    variables are not executed.
+
 Note for Redundant Ethernet Interfaces:
 =======================================
 
@@ -1999,8 +2148,8 @@ defines the following image properties:
 
 * Target Operating System (Provisions for OpenBSD, NetBSD, FreeBSD,
   4.4BSD, Linux, SVR4, Esix, Solaris, Irix, SCO, Dell, NCR, VxWorks,
-  LynxOS, pSOS, QNX;
-  Currently supported: Linux, NetBSD, VxWorks, QNX).
+  LynxOS, pSOS, QNX, RTEMS, ARTOS;
+  Currently supported: Linux, NetBSD, VxWorks, QNX, RTEMS, ARTOS).
 * Target CPU Architecture (Provisions for Alpha, ARM, Intel x86,
   IA64, MIPS, MIPS, PowerPC, IBM S390, SuperH, Sparc, Sparc 64 Bit;
   Currently supported: PowerPC).
@@ -2358,18 +2507,18 @@ U-Boot supports the following image types:
   	to boot over the network using BOOTP etc., where the boot
   	server provides just a single image file, but you want to get
   	for instance an OS kernel and a RAMDisk image.
-  
+
   	"Multi-File Images" start with a list of image sizes, each
   	image size (in bytes) specified by an "uint32_t" in network
   	byte order. This list is terminated by an "(uint32_t)0".
   	Immediately after the terminating 0 follow the images, one by
   	one, all aligned on "uint32_t" boundaries (size rounded up to
   	a multiple of 4 bytes).
-  
+
    "Firmware Images" are binary images containing firmware (like
   	U-Boot or FPGA images) which usually will be programmed to
   	flash memory.
-  
+
    "Script files" are command sequences that will be executed by
   	U-Boot's command interpreter; this feature is especially
   	useful when you configure U-Boot to use a real shell (hush)
@@ -2464,6 +2613,17 @@ Hit 'q':
 	[q, b, e, ?] ## Application terminated, rc = 0x0
 
 
+
+Minicom warning:
+================
+
+Over time, many people have reported problems when trying to used the
+"minicom" terminal emulation program for serial download. I (wd)
+consider minicom to be broken, and recommend not to use it. Under
+Unix, I recommend to use C-Kermit for general purpose use (and
+especially for kermit binary protocol download ("loadb" command), and
+use "cu" for S-Record download ("loads" command).
+
 NetBSD Notes:
 =============
 

board/LEOX/elpt860/Makefile

@@ -0,0 +1,47 @@
+#######################################################################
+#
+# Copyright (C) 2000, 2001, 2002, 2003
+# The LEOX team <team@leox.org>, http://www.leox.org
+#
+# LEOX.org is about the development of free hardware and software resources
+#   for system on chip.
+#
+# Description: U-Boot port on the LEOX's ELPT860 CPU board
+# ~~~~~~~~~~~
+#
+#######################################################################
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+#######################################################################
+
+include $(TOPDIR)/config.mk
+
+LIB	= lib$(BOARD).a
+
+OBJS	= $(BOARD).o flash.o
+
+$(LIB):	.depend $(OBJS)
+	$(AR) crv $@ $^
+
+#########################################################################
+
+.depend:	Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
+		$(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
+
+sinclude .depend
+
+#########################################################################

board/LEOX/elpt860/README.LEOX

@@ -0,0 +1,424 @@
+=============================================================================
+
+             U-Boot port on the LEOX's ELPT860 CPU board
+             -------------------------------------------
+
+LEOX.org is about the development of free hardware and software resources
+         for system on chip.
+
+For more information, contact The LEOX team <team@leox.org>
+
+References:
+~~~~~~~~~~
+    1) Get the last stable release from denx.de:
+           o ftp://ftp.denx.de/pub/u-boot/u-boot-0.2.0.tar.bz2
+    2) Get the current CVS snapshot:
+           o cvs -d:pserver:anonymous@cvs.u-boot.sourceforge.net:/cvsroot/u-boot login
+           o cvs -z6 -d:pserver:anonymous@cvs.u-boot.sourceforge.net:/cvsroot/u-boot co -P u-boot
+
+=============================================================================
+
+The ELPT860 CPU board has the following features:
+
+Processor:	- MPC860T @ 50MHz
+		- PowerPC Core
+		- 65 MIPS
+		- Caches: D->4KB, I->4KB
+		- CPM: 4 SCCs, 2 SMCs
+		- Ethernet 10/100
+		- SPI, I2C, PCMCIA, Parallel
+
+CPU board:	- DRAM:   16 MB
+		- FLASH: 512 KB + (2 * 4 MB)
+		- NVRAM: 128 KB
+		- 1 Serial link
+		- 2 Ethernet 10 BaseT Channels
+
+On power-up the processor jumps to the address of 0x02000100
+
+Thus, U-Boot is configured to reside in flash starting at the address of
+0x02001000.  The environment space is located in NVRAM separately from
+U-Boot, at the address of 0x03000000.
+
+=============================================================================
+
+                        U-Boot test results
+
+=============================================================================
+
+
+##################################################
+# Operation on the serial console (SMC1)
+##############################
+
+U-Boot 0.2.2 (Jan 19 2003 - 11:08:39)
+
+CPU:   XPC860xxZPnnB at 50 MHz: 4 kB I-Cache 4 kB D-Cache FEC present
+         *** Warning: CPU Core has Silicon Bugs -- Check the Errata ***
+Board: ### No HW ID - assuming ELPT860
+DRAM:  16 MB
+FLASH: 512 kB
+In:    serial
+Out:   serial
+Err:   serial
+Net:   SCC ETHERNET
+
+Type "run nfsboot" to mount root filesystem over NFS
+
+Hit any key to stop autoboot:  0
+LEOX_elpt860: help
+askenv  - get environment variables from stdin
+autoscr - run script from memory
+base    - print or set address offset
+bdinfo  - print Board Info structure
+bootm   - boot application image from memory
+bootp   - boot image via network using BootP/TFTP protocol
+bootd   - boot default, i.e., run 'bootcmd'
+cmp     - memory compare
+coninfo - print console devices and informations
+cp      - memory copy
+crc32   - checksum calculation
+echo    - echo args to console
+erase   - erase FLASH memory
+flinfo  - print FLASH memory information
+go      - start application at address 'addr'
+help    - print online help
+iminfo  - print header information for application image
+loadb   - load binary file over serial line (kermit mode)
+loads   - load S-Record file over serial line
+loop    - infinite loop on address range
+md      - memory display
+mm      - memory modify (auto-incrementing)
+mtest   - simple RAM test
+mw      - memory write (fill)
+nm      - memory modify (constant address)
+printenv- print environment variables
+protect - enable or disable FLASH write protection
+rarpboot- boot image via network using RARP/TFTP protocol
+reset   - Perform RESET of the CPU
+run     - run commands in an environment variable
+saveenv - save environment variables to persistent storage
+setenv  - set environment variables
+sleep   - delay execution for some time
+tftpboot- boot image via network using TFTP protocol
+               and env variables ipaddr and serverip
+version - print monitor version
+?       - alias for 'help'
+
+##################################################
+# Environment Variables (CFG_ENV_IS_IN_NVRAM)
+##############################
+
+LEOX_elpt860: printenv
+bootdelay=5
+loads_echo=1
+baudrate=9600
+stdin=serial
+stdout=serial
+stderr=serial
+ethaddr=00:03:ca:00:64:df
+ipaddr=192.168.0.30
+netmask=255.255.255.0
+serverip=192.168.0.1
+nfsserverip=192.168.0.1
+preboot=echo;echo Type "run nfsboot" to mount root filesystem over NFS;echo
+gatewayip=192.168.0.1
+ramargs=setenv bootargs root=/dev/ram rw
+rootargs=setenv rootpath /tftp/$(ipaddr)
+nfsargs=setenv bootargs root=/dev/nfs rw nfsroot=$(nfsserverip):$(rootpath)
+addip=setenv bootargs $(bootargs) ip=$(ipaddr):$(nfsserverip):$(gatewayip):$(netmask):$(hostname):eth0:
+ramboot=tftp 400000 /home/leox/pMulti;run ramargs;bootm
+nfsboot=tftp 400000 /home/leox/uImage;run rootargs;run nfsargs;run addip;bootm
+bootcmd=run ramboot
+clocks_in_mhz=1
+
+Environment size: 730/16380 bytes
+
+##################################################
+# Flash Memory Information
+##############################
+
+LEOX_elpt860: flinfo
+
+Bank # 1: AMD AM29F040   (4 Mbits)
+  Size: 512 KB in 8 Sectors
+  Sector Start Addresses:
+    02000000 (RO) 02010000 (RO) 02020000 (RO) 02030000 (RO) 02040000     
+    02050000      02060000      02070000     
+
+##################################################
+# Board Information Structure
+##############################
+
+LEOX_elpt860: bdinfo
+memstart    = 0x00000000
+memsize     = 0x01000000
+flashstart  = 0x02000000
+flashsize   = 0x00080000
+flashoffset = 0x00030000
+sramstart   = 0x00000000
+sramsize    = 0x00000000
+immr_base   = 0xFF000000
+bootflags   = 0x00000001
+intfreq     =     50 MHz
+busfreq     =     50 MHz
+ethaddr     = 00:03:ca:00:64:df
+IP addr     = 192.168.0.30
+baudrate    =   9600 bps
+
+##################################################
+# Image Download and run over serial port
+#    hello_world (S-Record image)
+#    ===> 1) Enter "loads" command into U-Boot monitor
+#    ===> 2) From TeraTerm's bar menu, Select 'File/Send file...'
+#            Then select 'hello_world.srec' with the file browser
+##############################
+
+U-Boot 0.2.2 (Jan 19 2003 - 11:08:39)
+
+CPU:   XPC860xxZPnnB at 50 MHz: 4 kB I-Cache 4 kB D-Cache FEC present
+         *** Warning: CPU Core has Silicon Bugs -- Check the Errata ***
+Board: ### No HW ID - assuming ELPT860
+DRAM:  16 MB
+FLASH: 512 kB
+In:    serial
+Out:   serial
+Err:   serial
+Net:   SCC ETHERNET
+
+Type "run nfsboot" to mount root filesystem over NFS
+
+Hit any key to stop autoboot:  0
+LEOX_elpt860: loads
+## Ready for S-Record download ...
+S804040004F3050154000501709905014C000501388D
+## First Load Addr = 0x00040000
+## Last  Load Addr = 0x0005018B
+## Total Size      = 0x0001018C = 65932 Bytes
+## Start Addr      = 0x00040004
+LEOX_elpt860: go 40004 This is a test !!!
+## Starting application at 0x00040004 ...
+Hello World
+argc = 6
+argv[0] = "40004"
+argv[1] = "This"
+argv[2] = "is"
+argv[3] = "a"
+argv[4] = "test"
+argv[5] = "!!!"
+argv[6] = "<NULL>"
+Hit any key to exit ...
+
+## Application terminated, rc = 0x0
+
+##################################################
+# Image download and run over ethernet interface
+#    Linux-2.4.4 (uImage) + Root filesystem mounted over NFS
+##############################
+
+U-Boot 0.2.2 (Jan 19 2003 - 11:08:39)
+
+CPU:   XPC860xxZPnnB at 50 MHz: 4 kB I-Cache 4 kB D-Cache FEC present
+         *** Warning: CPU Core has Silicon Bugs -- Check the Errata ***
+Board: ### No HW ID - assuming ELPT860
+DRAM:  16 MB
+FLASH: 512 kB
+In:    serial
+Out:   serial
+Err:   serial
+Net:   SCC ETHERNET
+
+Type "run nfsboot" to mount root filesystem over NFS
+
+Hit any key to stop autoboot:  0
+LEOX_elpt860: run nfsboot
+ARP broadcast 1
+TFTP from server 192.168.0.1; our IP address is 192.168.0.30
+Filename '/home/leox/uImage'.
+Load address: 0x400000
+Loading: #################################################################
+         #############################
+done
+Bytes transferred = 477294 (7486e hex)
+## Booting image at 00400000 ...
+   Image Name:   Linux-2.4.4
+   Image Type:   PowerPC Linux Kernel Image (gzip compressed)
+   Data Size:    477230 Bytes = 466 kB = 0 MB
+   Load Address: 00000000
+   Entry Point:  00000000
+   Verifying Checksum ... OK
+   Uncompressing Kernel Image ... OK
+Linux version 2.4.4-rthal5 (leox@p5ak6650) (gcc version 2.95.3 20010315 (release/MontaVista)) #1 Wed Jul 3 10:23:53 CEST 2002
+On node 0 totalpages: 4096
+zone(0): 4096 pages.
+zone(1): 0 pages.
+zone(2): 0 pages.
+Kernel command line: root=/dev/nfs rw nfsroot=192.168.0.1:/tftp/192.168.0.30 ip=192.168.0.30:192.168.0.1:192.168.0.1:255.255.255.0::eth0:
+rtsched version <20010618.1050.24>
+Decrementer Frequency: 3125000
+Warning: real time clock seems stuck!
+Calibrating delay loop... 49.76 BogoMIPS
+Memory: 14720k available (928k kernel code, 384k data, 44k init, 0k highmem)
+Dentry-cache hash table entries: 2048 (order: 2, 16384 bytes)
+Buffer-cache hash table entries: 1024 (order: 0, 4096 bytes)
+Page-cache hash table entries: 4096 (order: 2, 16384 bytes)
+Inode-cache hash table entries: 1024 (order: 1, 8192 bytes)
+POSIX conformance testing by UNIFIX
+Linux NET4.0 for Linux 2.4
+Based upon Swansea University Computer Society NET3.039
+Starting kswapd v1.8
+CPM UART driver version 0.03
+ttyS0 on SMC1 at 0x0280, BRG1
+block: queued sectors max/low 9701kB/3233kB, 64 slots per queue
+RAMDISK driver initialized: 16 RAM disks of 4096K size 1024 blocksize
+eth0: CPM ENET Version 0.2 on SCC1, 00:03:ca:00:64:df
+NET4: Linux TCP/IP 1.0 for NET4.0
+IP Protocols: ICMP, UDP, TCP
+IP: routing cache hash table of 512 buckets, 4Kbytes
+TCP: Hash tables configured (established 1024 bind 1024)
+NET4: Unix domain sockets 1.0/SMP for Linux NET4.0.
+Looking up port of RPC 100003/2 on 192.168.0.1
+Looking up port of RPC 100005/2 on 192.168.0.1
+VFS: Mounted root (nfs filesystem).
+Freeing unused kernel memory: 44k init
+INIT: version 2.78 booting
+                Welcome to DENX Embedded Linux Environment
+                Press 'I' to enter interactive startup.
+Mounting proc filesystem:  [  OK  ]
+Configuring kernel parameters:  [  OK  ]
+Cannot access the Hardware Clock via any known method.
+Use the --debug option to see the details of our search for an access method.
+Setting clock : Wed Dec 31 19:00:11 EST 1969 [  OK  ]
+Activating swap partitions:  [  OK  ]
+Setting hostname 192.168.0.30:  [  OK  ]
+Finding module dependencies:
+[  OK  ]
+Checking filesystems
+Checking all file systems.
+[  OK  ]
+Mounting local filesystems:  [  OK  ]
+Enabling swap space:  [  OK  ]
+INIT: Entering runlevel: 3
+Entering non-interactive startup
+Starting system logger: [  OK  ]
+Starting kernel logger: [  OK  ]
+Starting xinetd: [  OK  ]
+
+192 login: root
+Last login: Wed Dec 31 19:00:41 on ttyS0
+bash-2.04#
+
+##################################################
+# Image download and run over ethernet interface
+#    Linux-2.4.4 + Root filesystem mounted from RAM (pMulti)
+##############################
+
+U-Boot 0.2.2 (Jan 19 2003 - 11:08:39)
+
+CPU:   XPC860xxZPnnB at 50 MHz: 4 kB I-Cache 4 kB D-Cache FEC present
+         *** Warning: CPU Core has Silicon Bugs -- Check the Errata ***
+Board: ### No HW ID - assuming ELPT860
+DRAM:  16 MB
+FLASH: 512 kB
+In:    serial
+Out:   serial
+Err:   serial
+Net:   SCC ETHERNET
+
+Type "run nfsboot" to mount root filesystem over NFS
+
+Hit any key to stop autoboot:  0
+LEOX_elpt860: run ramboot
+ARP broadcast 1
+TFTP from server 192.168.0.1; our IP address is 192.168.0.30
+Filename '/home/leox/pMulti'.
+Load address: 0x400000
+Loading: #################################################################
+         #################################################################
+         #################################################################
+         #################################################################
+         #################################################################
+         ########################################################
+done
+Bytes transferred = 1947816 (1db8a8 hex)
+## Booting image at 00400000 ...
+   Image Name:   linux-2.4.4-2002-03-21 Multiboot
+   Image Type:   PowerPC Linux Multi-File Image (gzip compressed)
+   Data Size:    1947752 Bytes = 1902 kB = 1 MB
+   Load Address: 00000000
+   Entry Point:  00000000
+   Contents:
+   Image 0:   477230 Bytes = 466 kB = 0 MB
+   Image 1:  1470508 Bytes = 1436 kB = 1 MB
+   Verifying Checksum ... OK
+   Uncompressing Multi-File Image ... OK
+   Loading Ramdisk to 00e44000, end 00fab02c ... OK
+Linux version 2.4.4-rthal5 (leox@p5ak6650) (gcc version 2.95.3 20010315 (release/MontaVista)) #1 Wed Jul 3 10:23:53 CEST 2002
+On node 0 totalpages: 4096
+zone(0): 4096 pages.
+zone(1): 0 pages.
+zone(2): 0 pages.
+Kernel command line: root=/dev/ram rw
+rtsched version <20010618.1050.24>
+Decrementer Frequency: 3125000
+Warning: real time clock seems stuck!
+Calibrating delay loop... 49.76 BogoMIPS
+Memory: 13280k available (928k kernel code, 384k data, 44k init, 0k highmem)
+Dentry-cache hash table entries: 2048 (order: 2, 16384 bytes)
+Buffer-cache hash table entries: 1024 (order: 0, 4096 bytes)
+Page-cache hash table entries: 4096 (order: 2, 16384 bytes)
+Inode-cache hash table entries: 1024 (order: 1, 8192 bytes)
+POSIX conformance testing by UNIFIX
+Linux NET4.0 for Linux 2.4
+Based upon Swansea University Computer Society NET3.039
+Starting kswapd v1.8
+CPM UART driver version 0.03
+ttyS0 on SMC1 at 0x0280, BRG1
+block: queued sectors max/low 8741kB/2913kB, 64 slots per queue
+RAMDISK driver initialized: 16 RAM disks of 4096K size 1024 blocksize
+eth0: CPM ENET Version 0.2 on SCC1, 00:03:ca:00:64:df
+RAMDISK: Compressed image found at block 0
+Freeing initrd memory: 1436k freed
+NET4: Linux TCP/IP 1.0 for NET4.0
+IP Protocols: ICMP, UDP, TCP
+IP: routing cache hash table of 512 buckets, 4Kbytes
+TCP: Hash tables configured (established 1024 bind 1024)
+IP-Config: Incomplete network configuration information.
+NET4: Unix domain sockets 1.0/SMP for Linux NET4.0.
+VFS: Mounted root (ext2 filesystem).
+Freeing unused kernel memory: 44k iné
+init started:  BusyBox v0.60.2 (2002.07.01-12:06+0000) multi-call Configuring hostname
+Configuring lo...
+Configuring eth0...
+Configuring Gateway...
+
+Please press Enter to activate this console.
+
+ELPT860 login: root
+Password:
+Welcome to Linux-2.4.4 for ELPT CPU board (MPC860T @ 50MHz)
+
+                                              a8888b.
+                                             d888888b.
+                                             8P"YP"Y88
+     _      _                                8|o||o|88
+    | |    |_|                               8'    .88
+    | |     _ ____  _   _  _  _              8`._.' Y8.
+    | |    | |  _ \| | | |\ \/ /            d/      `8b.
+    | |___ | | | | | |_| |/    \          .dP   .     Y8b.
+    |_____||_|_| |_|\____|\_/\_/         d8:'   "   `::88b.
+                                        d8"           `Y88b
+                                       :8P     '       :888
+                                        8a.    :      _a88P
+                                      ._/"Yaa_ :    .| 88P|
+                                      \    YP"      `| 8P  `.
+                                      /     \._____.d|    .'
+                                      `--..__)888888P`._.'
+login[21]: root login  on `ttyS0'
+
+
+
+BusyBox v0.60.3 (2002.07.20-10:39+0000) Built-in shell (ash)
+Enter 'help' for a list of built-in commands.
+
+root@ELPT860:~ #

board/LEOX/elpt860/config.mk

@@ -0,0 +1,36 @@
+#######################################################################
+#
+# Copyright (C) 2000, 2001, 2002, 2003
+# The LEOX team <team@leox.org>, http://www.leox.org
+#
+# LEOX.org is about the development of free hardware and software resources
+#   for system on chip.
+#
+# Description: U-Boot port on the LEOX's ELPT860 CPU board
+# ~~~~~~~~~~~
+#
+#######################################################################
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+#######################################################################
+
+#
+# ELPT860 board
+#
+
+TEXT_BASE = 0x02000000
+#TEXT_BASE = 0x00FB0000

board/LEOX/elpt860/elpt860.c

@@ -0,0 +1,399 @@
+/*
+**=====================================================================
+**
+** Copyright (C) 2000, 2001, 2002, 2003
+** The LEOX team <team@leox.org>, http://www.leox.org
+**
+** LEOX.org is about the development of free hardware and software resources
+**   for system on chip.
+**
+** Description: U-Boot port on the LEOX's ELPT860 CPU board
+** ~~~~~~~~~~~
+**
+**=====================================================================
+**
+** This program is free software; you can redistribute it and/or
+** modify it under the terms of the GNU General Public License as
+** published by the Free Software Foundation; either version 2 of
+** the License, or (at your option) any later version.
+**
+** This program is distributed in the hope that it will be useful,
+** but WITHOUT ANY WARRANTY; without even the implied warranty of
+** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+** GNU General Public License for more details.
+**
+** You should have received a copy of the GNU General Public License
+** along with this program; if not, write to the Free Software
+** Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+** MA 02111-1307 USA
+**
+**=====================================================================
+*/
+
+/*
+** Note 1: In this file, you have to provide the following functions:
+** ------
+**              int             board_pre_init(void)
+**              int             checkboard(void)
+**              long int        initdram(int board_type)
+** called from 'board_init_f()' into 'common/board.c'
+**
+**              void            reset_phy(void)
+** called from 'board_init_r()' into 'common/board.c'
+*/
+
+#include <common.h>
+#include <mpc8xx.h>
+
+/* ------------------------------------------------------------------------- */
+
+static long int dram_size (long int, long int *, long int);
+
+/* ------------------------------------------------------------------------- */
+
+#define	_NOT_USED_	0xFFFFFFFF
+
+const uint init_sdram_table[] =
+{
+  /*
+   * Single Read. (Offset 0 in UPMA RAM)
+   */
+  0x0FFCCC04, 0xFFFFFC04, 0x0FFC3C04, 0xFFFFFC04,
+  0xFFFFFC04, /* last */
+  /*
+   * SDRAM Initialization (offset 5 in UPMA RAM)
+   *
+   * This is no UPM entry point. The following definition uses
+   * the remaining space to establish an initialization
+   * sequence, which is executed by a RUN command.
+   *
+   */
+  0xFFFFFC04, 0xFFFFFC04, 0x0FFC3C04,  /* last */
+  /*
+   * Burst Read. (Offset 8 in UPMA RAM)
+   */
+  0xFFFFFC04, 0xFFFFFC04, 0xFFFFFC04, 0xFFFFFC04,
+  0x0FFC3C04, 0xFFFFFC04, 0xFFFFFC04, 0xFFFFFC04,
+  0xFFFFFC04, 0x0FFC3C04, 0xFFFFFC04, 0xFFFFFC04,
+  0xFFFFFC04, 0xFFFFFC04, 0x0FFC3C04, 0xFFFFFC04, /* last */
+  /*
+   * Single Write. (Offset 18 in UPMA RAM)
+   */
+  0xFFFFFC04, 0xFFFFFC04, 0xFFFFFC04, 0x0FFC3C04,
+  0xFFFFFC04, 0xFFFFFC04, 0x0FFFFC04, 0xFFFFFC04, /* last */
+  /*
+   * Burst Write. (Offset 20 in UPMA RAM)
+   */
+  0x0FFC3C04, 0xFFFFFC04, 0xFFFFFC04, 0xFFFFFC04,
+  0xFFFFFC04, 0x0FFC3C04, 0xFFFFFC04, 0xFFFFFC04,
+  0xFFFFFC04, 0xFFFFFC04, 0xFFFFFC34, 0x0FAC0C34,
+  0xFFFFFC05, 0xFFFFFC04, 0x0FFCFC04, 0xFFFFFC05, /* last */
+};
+
+const uint sdram_table[] =
+{
+  /*
+   * Single Read. (Offset 0 in UPMA RAM)
+   */
+  0x0F0FFC24, 0x0F0CFC04, 0xFF0FFC04, 0x00AF3C04, 
+  0xFF0FFC00, /* last */
+  /*
+   * SDRAM Initialization (offset 5 in UPMA RAM)
+   *
+   * This is no UPM entry point. The following definition uses
+   * the remaining space to establish an initialization
+   * sequence, which is executed by a RUN command.
+   *
+   */
+  0x0FFCCC04, 0xFFAFFC05, 0xFFAFFC05, /* last */
+  /*
+   * Burst Read. (Offset 8 in UPMA RAM)
+   */
+  0x0F0FFC24, 0x0F0CFC04, 0xFF0FFC04, 0x00AF3C04, 
+  0xF00FFC00, 0xF00FFC00, 0xF00FFC00, 0xFF0FFC00,
+  0x0FFCCC04, 0xFFAFFC05, 0xFFAFFC04, 0xFFAFFC04, 
+  0xFFAFFC04, 0xFFAFFC04, 0xFFAFFC04, 0xFFAFFC04, /* last */
+  /*
+   * Single Write. (Offset 18 in UPMA RAM)
+   */
+  0x0F0FFC24, 0x0F0CFC04, 0xFF0FFC04, 0x00AF0C00, 
+  0xFF0FFC04, 0x0FFCCC04, 0xFFAFFC05, /* last */
+  _NOT_USED_, 
+  /*
+   * Burst Write. (Offset 20 in UPMA RAM)
+   */
+  0x0F0FFC24, 0x0F0CFC04, 0xFF0FFC00, 0x00AF0C00, 
+  0xF00FFC00, 0xF00FFC00, 0xF00FFC04, 0x0FFCCC04, 
+  0xFFAFFC04, 0xFFAFFC05, 0xFFAFFC04, 0xFFAFFC04, 
+  0xFFAFFC04, 0xFFAFFC04, 0xFFAFFC04, 0xFFAFFC04, /* last */
+  /*
+   * Refresh  (Offset 30 in UPMA RAM)
+   */
+  0x0FFC3C04, 0xFFFFFC04, 0xFFFFFC04, 0xFFFFFC04, 
+  0xFFFFFC05, 0xFFFFFC04, 0xFFFFFC05, _NOT_USED_, 
+  0xFFAFFC04, 0xFFAFFC04, 0xFFAFFC04, 0xFFAFFC04, /* last */
+  /*
+   * Exception. (Offset 3c in UPMA RAM)
+   */
+  0x0FFFFC34, 0x0FAC0C34, 0xFFFFFC05, 0xFFAFFC04, /* last */
+};
+
+/* ------------------------------------------------------------------------- */
+
+#define CFG_PC4    0x0800
+
+#define CFG_DS1    CFG_PC4
+
+/*
+ * Very early board init code (fpga boot, etc.)
+ */
+int
+board_pre_init (void)
+{
+  volatile immap_t *immr = (immap_t *) CFG_IMMR;
+
+  /* 
+   * Light up the red led on ELPT860 pcb (DS1) (PCDAT) 
+   */
+  immr->im_ioport.iop_pcdat &= ~CFG_DS1;   /* PCDAT (DS1 = 0)                */
+  immr->im_ioport.iop_pcpar &= ~CFG_DS1;   /* PCPAR (0=general purpose I/O)  */
+  immr->im_ioport.iop_pcdir |=  CFG_DS1;   /* PCDIR (I/O: 0=input, 1=output) */
+
+  return ( 0 );    /* success */
+}
+
+/*
+ * Check Board Identity:
+ *
+ * Test ELPT860 ID string
+ *
+ * Return 1 if no second DRAM bank, otherwise returns 0
+ */
+
+int 
+checkboard (void)
+{
+    unsigned char *s = getenv("serial#");
+
+    if ( !s || strncmp(s, "ELPT860", 7) )
+      printf ("### No HW ID - assuming ELPT860\n");
+    
+    return ( 0 );    /* success */
+}
+
+/* ------------------------------------------------------------------------- */
+
+long int 
+initdram (int board_type)
+{
+    volatile immap_t     *immap  = (immap_t *)CFG_IMMR;
+    volatile memctl8xx_t *memctl = &immap->im_memctl;
+    long int              size8, size9;
+    long int              size_b0 = 0;
+
+    /*
+     * This sequence initializes SDRAM chips on ELPT860 board
+     */
+    upmconfig(UPMA, (uint *)init_sdram_table, 
+	      sizeof(init_sdram_table)/sizeof(uint));
+
+    memctl->memc_mptpr = 0x0200;
+    memctl->memc_mamr  = 0x18002111;
+
+    memctl->memc_mar   = 0x00000088;
+    memctl->memc_mcr   = 0x80002000;	/* CS1: SDRAM bank 0 */
+
+    upmconfig(UPMA, (uint *)sdram_table, 
+	      sizeof(sdram_table)/sizeof(uint));
+
+    /*
+     * Preliminary prescaler for refresh (depends on number of
+     * banks): This value is selected for four cycles every 62.4 us
+     * with two SDRAM banks or four cycles every 31.2 us with one
+     * bank. It will be adjusted after memory sizing.
+     */
+    memctl->memc_mptpr = CFG_MPTPR_2BK_8K;
+
+    /*
+     * The following value is used as an address (i.e. opcode) for
+     * the LOAD MODE REGISTER COMMAND during SDRAM initialisation. If
+     * the port size is 32bit the SDRAM does NOT "see" the lower two
+     * address lines, i.e. mar=0x00000088 -> opcode=0x00000022 for
+     * MICRON SDRAMs:
+     * ->    0 00 010 0 010
+     *       |  |   | |   +- Burst Length = 4
+     *       |  |   | +----- Burst Type   = Sequential
+     *       |  |   +------- CAS Latency  = 2
+     *       |  +----------- Operating Mode = Standard
+     *       +-------------- Write Burst Mode = Programmed Burst Length
+     */
+    memctl->memc_mar   = 0x00000088;
+
+    /*
+     * Map controller banks 2 and 3 to the SDRAM banks 2 and 3 at
+     * preliminary addresses - these have to be modified after the
+     * SDRAM size has been determined.
+     */
+    memctl->memc_or1   = CFG_OR1_PRELIM;
+    memctl->memc_br1   = CFG_BR1_PRELIM;
+
+    memctl->memc_mamr  = CFG_MAMR_8COL & (~(MAMR_PTAE)); /* no refresh yet */
+
+    udelay (200);
+
+    /* perform SDRAM initializsation sequence */
+
+    memctl->memc_mcr   = 0x80002105;	/* CS1: SDRAM bank 0 */
+    udelay (1);
+    memctl->memc_mcr   = 0x80002230;	/* CS1: SDRAM bank 0 - execute twice */
+    udelay (1);
+
+    memctl->memc_mamr |= MAMR_PTAE;	/* enable refresh */
+
+    udelay (1000);
+
+    /*
+     * Check Bank 0 Memory Size for re-configuration
+     *
+     * try 8 column mode
+     */
+    size8 = dram_size (CFG_MAMR_8COL, 
+		       (ulong *) SDRAM_BASE1_PRELIM, 
+		       SDRAM_MAX_SIZE);
+
+    udelay (1000);
+
+    /*
+     * try 9 column mode
+     */
+    size9 = dram_size (CFG_MAMR_9COL, 
+		       (ulong *) SDRAM_BASE1_PRELIM, 
+		       SDRAM_MAX_SIZE);
+
+    if ( size8 < size9 )    /* leave configuration at 9 columns	*/
+      {
+	size_b0 = size9;
+	/* debug ("SDRAM Bank 0 in 9 column mode: %ld MB\n", size >> 20); */
+      } 
+    else                  /* back to 8 columns			*/
+      {
+	size_b0 = size8;
+	memctl->memc_mamr = CFG_MAMR_8COL;
+	udelay (500);
+	/* debug ("SDRAM Bank 0 in 8 column mode: %ld MB\n", size >> 20); */
+      }
+    
+    udelay (1000);
+
+    /*
+     * Adjust refresh rate depending on SDRAM type, both banks
+     * For types > 128 MBit leave it at the current (fast) rate
+     */
+    if ( size_b0 < 0x02000000 ) 
+      {
+	/* reduce to 15.6 us (62.4 us / quad) */
+	memctl->memc_mptpr = CFG_MPTPR_2BK_4K;
+	udelay (1000);
+      }
+
+    /*
+     * Final mapping: map bigger bank first
+     */
+    memctl->memc_or1 = ((-size_b0) & 0xFFFF0000) | CFG_OR_TIMING_SDRAM;
+    memctl->memc_br1 = (CFG_SDRAM_BASE & BR_BA_MSK) | BR_MS_UPMA | BR_V;
+
+    {
+      unsigned long reg;
+      
+      /* adjust refresh rate depending on SDRAM type, one bank */
+      reg = memctl->memc_mptpr;
+      reg >>= 1;	/* reduce to CFG_MPTPR_1BK_8K / _4K */
+      memctl->memc_mptpr = reg;
+    }
+
+    udelay(10000);
+    
+    return (size_b0);
+}
+
+/* ------------------------------------------------------------------------- */
+
+/*
+ * Check memory range for valid RAM. A simple memory test determines
+ * the actually available RAM size between addresses `base' and
+ * `base + maxsize'. Some (not all) hardware errors are detected:
+ * - short between address lines
+ * - short between data lines
+ */
+
+static long int 
+dram_size (long int   mamr_value, 
+	   long int  *base, 
+	   long int   maxsize)
+{
+  volatile immap_t     *immap  = (immap_t *)CFG_IMMR;
+  volatile memctl8xx_t *memctl = &immap->im_memctl;
+  volatile long int    *addr;
+  ulong                 cnt, val;
+  ulong                 save[32];    /* to make test non-destructive */
+  unsigned char         i = 0;
+  
+  memctl->memc_mamr = mamr_value;
+  
+  for (cnt = maxsize/sizeof(long); cnt > 0; cnt >>= 1) 
+    {
+      addr = base + cnt;    /* pointer arith! */
+      
+      save[i++] = *addr;
+      *addr     = ~cnt;
+    }
+  
+  /* write 0 to base address */
+  addr    = base;
+  save[i] = *addr;
+  *addr   = 0;
+  
+  /* check at base address */
+  if ( (val = *addr) != 0 ) 
+    {
+      *addr = save[i];
+
+      return (0);
+    }
+  
+  for (cnt = 1; cnt <= maxsize/sizeof(long); cnt <<= 1) 
+    {
+      addr = base + cnt;    /* pointer arith! */
+      
+      val   = *addr;
+      *addr = save[--i];
+      
+      if ( val != (~cnt) ) 
+	{
+	  return (cnt * sizeof(long));
+	}
+    }
+
+  return (maxsize);
+}
+
+/* ------------------------------------------------------------------------- */
+
+#define CFG_PA1     0x4000
+#define CFG_PA2     0x2000
+
+#define CFG_LBKs    (CFG_PA2 | CFG_PA1)
+
+void
+reset_phy (void)
+{
+  volatile immap_t *immr = (immap_t *) CFG_IMMR;
+  
+  /*
+   * Ensure LBK LXT901 ethernet 1 & 2 = 0 ... for normal loopback in effect
+   *                                          and no AUI loopback
+   */
+  immr->im_ioport.iop_padat &= ~CFG_LBKs;  /* PADAT (LBK eth 1&2 = 0)        */
+  immr->im_ioport.iop_papar &= ~CFG_LBKs;  /* PAPAR (0=general purpose I/O)  */
+  immr->im_ioport.iop_padir |=  CFG_LBKs;  /* PADIR (I/O: 0=input, 1=output) */
+}

board/LEOX/elpt860/flash.c

@@ -0,0 +1,615 @@
+/*
+**=====================================================================
+**
+** Copyright (C) 2000, 2001, 2002, 2003
+** The LEOX team <team@leox.org>, http://www.leox.org
+**
+** LEOX.org is about the development of free hardware and software resources
+**   for system on chip.
+**
+** Description: U-Boot port on the LEOX's ELPT860 CPU board
+** ~~~~~~~~~~~
+**
+**=====================================================================
+**
+** This program is free software; you can redistribute it and/or
+** modify it under the terms of the GNU General Public License as
+** published by the Free Software Foundation; either version 2 of
+** the License, or (at your option) any later version.
+**
+** This program is distributed in the hope that it will be useful,
+** but WITHOUT ANY WARRANTY; without even the implied warranty of
+** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+** GNU General Public License for more details.
+**
+** You should have received a copy of the GNU General Public License
+** along with this program; if not, write to the Free Software
+** Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+** MA 02111-1307 USA
+**
+**=====================================================================
+*/
+
+/*
+** Note 1: In this file, you have to provide the following variable:
+** ------
+**              flash_info_t    flash_info[CFG_MAX_FLASH_BANKS]
+** 'flash_info_t' structure is defined into 'include/flash.h'
+** and defined as extern into 'common/cmd_flash.c'
+**
+** Note 2: In this file, you have to provide the following functions:
+** ------
+**              unsigned long   flash_init(void)
+** called from 'board_init_r()' into 'common/board.c'
+**
+**              void            flash_print_info(flash_info_t *info)
+** called from 'do_flinfo()' into 'common/cmd_flash.c'
+**
+**              int             flash_erase(flash_info_t *info,
+**                                          int           s_first,
+**                                          int           s_last)
+** called from 'do_flerase()' & 'flash_sect_erase()' into 'common/cmd_flash.c'
+**
+**              int             write_buff (flash_info_t *info,
+**                                          uchar        *src,
+**                                          ulong         addr,
+**                                          ulong         cnt)
+** called from 'flash_write()' into 'common/cmd_flash.c'
+*/
+
+#include <common.h>
+#include <mpc8xx.h>
+
+
+#ifndef	CFG_ENV_ADDR
+#  define CFG_ENV_ADDR	(CFG_FLASH_BASE + CFG_ENV_OFFSET)
+#endif
+
+flash_info_t	flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
+
+/*-----------------------------------------------------------------------
+ * Internal Functions
+ */
+static void   flash_get_offsets (ulong base, flash_info_t *info);
+static ulong  flash_get_size (volatile unsigned char *addr, flash_info_t *info);
+
+static int write_word (flash_info_t *info, ulong dest, ulong data);
+static int write_byte (flash_info_t *info, ulong dest, uchar data);
+
+/*-----------------------------------------------------------------------
+ */
+
+unsigned long 
+flash_init (void)
+{
+  volatile immap_t     *immap  = (immap_t *)CFG_IMMR;
+  volatile memctl8xx_t *memctl = &immap->im_memctl;
+  unsigned long         size_b0;
+  int i;
+  
+  /* Init: no FLASHes known */
+  for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) 
+    {
+      flash_info[i].flash_id = FLASH_UNKNOWN;
+    }
+  
+  /* Static FLASH Bank configuration here - FIXME XXX */
+  
+  size_b0 = flash_get_size ((volatile unsigned char *)FLASH_BASE0_PRELIM, 
+			    &flash_info[0]);
+  
+  if ( flash_info[0].flash_id == FLASH_UNKNOWN ) 
+    {
+      printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
+	      size_b0, size_b0<<20);
+    }
+  
+  /* Remap FLASH according to real size */
+  memctl->memc_or0 = CFG_OR_TIMING_FLASH | (-size_b0 & OR_AM_MSK);
+  memctl->memc_br0 = (CFG_FLASH_BASE & BR_BA_MSK) | BR_MS_GPCM | BR_PS_8 | BR_V;
+  
+  /* Re-do sizing to get full correct info */
+  size_b0 = flash_get_size ((volatile unsigned char *)CFG_FLASH_BASE, 
+			    &flash_info[0]);
+  
+  flash_get_offsets (CFG_FLASH_BASE, &flash_info[0]);
+  
+#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
+  /* monitor protection ON by default */
+  flash_protect (FLAG_PROTECT_SET,
+		 CFG_MONITOR_BASE,
+		 CFG_MONITOR_BASE + monitor_flash_len-1,
+		 &flash_info[0]);
+#endif
+  
+#ifdef	CFG_ENV_IS_IN_FLASH
+  /* ENV protection ON by default */
+  flash_protect(FLAG_PROTECT_SET,
+		CFG_ENV_ADDR,
+		CFG_ENV_ADDR + CFG_ENV_SIZE-1,
+		&flash_info[0]);
+#endif
+
+  flash_info[0].size = size_b0;
+  
+  return (size_b0);
+}
+
+/*-----------------------------------------------------------------------
+ */
+static void 
+flash_get_offsets (ulong          base, 
+		   flash_info_t  *info)
+{
+  int i;
+
+#define SECTOR_64KB    0x00010000
+
+  /* set up sector start adress table */
+  for (i = 0; i < info->sector_count; i++) 
+    {
+      info->start[i] = base + (i * SECTOR_64KB);
+    }
+}
+
+/*-----------------------------------------------------------------------
+ */
+void 
+flash_print_info (flash_info_t *info)
+{
+  int i;
+  
+  if ( info->flash_id == FLASH_UNKNOWN ) 
+    {
+      printf ("missing or unknown FLASH type\n");
+      return;
+    }
+
+  switch ( info->flash_id & FLASH_VENDMASK ) 
+    {
+    case FLASH_MAN_AMD:	printf ("AMD ");		break;
+    case FLASH_MAN_FUJ:	printf ("FUJITSU ");		break;
+    case FLASH_MAN_STM: printf ("STM (Thomson) ");      break;
+    default:		printf ("Unknown Vendor ");	break;
+    }
+  
+  switch ( info->flash_id & FLASH_TYPEMASK ) 
+    {
+    case FLASH_AM040:   printf ("AM29F040   (4 Mbits)\n");
+      break;
+    default:	        printf ("Unknown Chip Type\n");
+      break;
+    }
+  
+  printf ("  Size: %ld KB in %d Sectors\n", 
+	  info->size >> 10, info->sector_count);
+  
+  printf ("  Sector Start Addresses:");
+  for (i=0; i<info->sector_count; ++i) 
+    {
+      if ((i % 5) == 0)
+	printf ("\n   ");
+      printf (" %08lX%s",
+	      info->start[i],
+	      info->protect[i] ? " (RO)" : "     "
+	      );
+    }
+  printf ("\n");
+
+  return;
+}
+
+/*-----------------------------------------------------------------------
+ */
+
+
+/*-----------------------------------------------------------------------
+ */
+
+/*
+ * The following code cannot be run from FLASH!
+ */
+
+static ulong 
+flash_get_size (volatile unsigned char *addr, 
+                flash_info_t           *info)
+{
+  short i;
+  uchar value;
+  ulong base = (ulong)addr;
+
+  /* Write auto select command: read Manufacturer ID */
+  addr[0x0555] = 0xAA;
+  addr[0x02AA] = 0x55;
+  addr[0x0555] = 0x90;
+  
+  value = addr[0];
+
+  switch ( value ) 
+    {
+      /*    case AMD_MANUFACT: */
+    case 0x01:
+      info->flash_id = FLASH_MAN_AMD;
+      break;
+      /*    case FUJ_MANUFACT: */
+    case 0x04:
+      info->flash_id = FLASH_MAN_FUJ;
+      break;
+      /*    case STM_MANUFACT: */
+    case 0x20:
+      info->flash_id = FLASH_MAN_STM;
+      break;
+
+    default:
+      info->flash_id = FLASH_UNKNOWN;
+      info->sector_count = 0;
+      info->size = 0;
+      return (0);			/* no or unknown flash	*/
+    }
+  
+  value = addr[1];			/* device ID		*/
+  
+  switch ( value ) 
+    {
+    case STM_ID_F040B:
+    case AMD_ID_F040B:
+      info->flash_id += FLASH_AM040;    /* 4 Mbits = 512k * 8  */
+      info->sector_count = 8;
+      info->size = 0x00080000;
+      break;
+
+    default:
+      info->flash_id = FLASH_UNKNOWN;
+      return (0);			/* => no or unknown flash */
+    }
+
+  /* set up sector start adress table */
+  for (i = 0; i < info->sector_count; i++) 
+    {
+      info->start[i] = base + (i * 0x00010000);
+    }
+  
+  /* check for protected sectors */
+  for (i = 0; i < info->sector_count; i++) 
+    {
+      /* read sector protection at sector address, (A7 .. A0) = 0x02 */
+      /* D0 = 1 if protected */
+      addr = (volatile unsigned char *)(info->start[i]);
+      info->protect[i] = addr[2] & 1;
+    }
+
+  /*
+   * Prevent writes to uninitialized FLASH.
+   */
+  if ( info->flash_id != FLASH_UNKNOWN ) 
+    {
+      addr = (volatile unsigned char *)info->start[0];
+      
+      *addr = 0xF0;	/* reset bank */
+    }
+  
+  return (info->size);
+}
+
+
+/*-----------------------------------------------------------------------
+ */
+
+int
+flash_erase (flash_info_t  *info, 
+	     int            s_first, 
+	     int            s_last)
+{
+  volatile unsigned char *addr = (volatile unsigned char *)(info->start[0]);
+  int flag, prot, sect, l_sect;
+  ulong start, now, last;
+  
+  if ( (s_first < 0) || (s_first > s_last) ) 
+    {
+      if ( info->flash_id == FLASH_UNKNOWN ) 
+	{
+	  printf ("- missing\n");
+	} 
+      else 
+	{
+	  printf ("- no sectors to erase\n");
+	}
+      return ( 1 );
+    }
+
+  if ( (info->flash_id == FLASH_UNKNOWN) ||
+       (info->flash_id > FLASH_AMD_COMP) ) 
+    {
+      printf ("Can't erase unknown flash type %08lx - aborted\n",
+	      info->flash_id);
+      return ( 1 );
+    }
+  
+  prot = 0;
+  for (sect=s_first; sect<=s_last; ++sect) 
+    {
+      if ( info->protect[sect] ) 
+	{
+	  prot++;
+	}
+    }
+  
+  if ( prot ) 
+    {
+      printf ("- Warning: %d protected sectors will not be erased!\n", prot);
+    } 
+  else 
+    {
+      printf ("\n");
+    }
+  
+  l_sect = -1;
+  
+  /* Disable interrupts which might cause a timeout here */
+  flag = disable_interrupts();
+  
+  addr[0x0555] = 0xAA;
+  addr[0x02AA] = 0x55;
+  addr[0x0555] = 0x80;
+  addr[0x0555] = 0xAA;
+  addr[0x02AA] = 0x55;
+  
+  /* Start erase on unprotected sectors */
+  for (sect = s_first; sect<=s_last; sect++) 
+    {
+      if (info->protect[sect] == 0)    /* not protected */
+	{
+	  addr = (volatile unsigned char *)(info->start[sect]);
+	  addr[0] = 0x30;
+	  l_sect = sect;
+	}
+    }
+  
+  /* re-enable interrupts if necessary */
+  if ( flag )
+    enable_interrupts();
+  
+  /* wait at least 80us - let's wait 1 ms */
+  udelay (1000);
+  
+  /*
+   * We wait for the last triggered sector
+   */
+  if ( l_sect < 0 )
+    goto DONE;
+  
+  start = get_timer (0);
+  last  = start;
+  addr = (volatile unsigned char *)(info->start[l_sect]);
+  while ( (addr[0] & 0x80) != 0x80 ) 
+    {
+      if ( (now = get_timer(start)) > CFG_FLASH_ERASE_TOUT ) 
+	{
+	  printf ("Timeout\n");
+	  return ( 1 );
+	}
+      /* show that we're waiting */
+      if ( (now - last) > 1000 )     /* every second */
+	{
+	  putc ('.');
+	  last = now;
+	}
+    }
+  
+DONE:
+  /* reset to read mode */
+  addr = (volatile unsigned char *)info->start[0];
+  addr[0] = 0xF0;	/* reset bank */
+  
+  printf (" done\n");
+  
+  return ( 0 );
+}
+
+/*-----------------------------------------------------------------------
+ * Copy memory to flash, returns:
+ * 0 - OK
+ * 1 - write timeout
+ * 2 - Flash not erased
+ */
+
+int 
+write_buff (flash_info_t  *info, 
+	    uchar         *src, 
+	    ulong          addr, 
+	    ulong          cnt)
+{
+  ulong cp, wp, data;
+  uchar bdata;
+  int i, l, rc;
+
+  if ( (info->flash_id & FLASH_TYPEMASK) == FLASH_AM040 )
+    {
+      /* Width of the data bus: 8 bits */
+
+      wp = addr;
+      
+      while ( cnt )
+	{
+	  bdata = *src++;
+	  
+	  if ( (rc = write_byte(info, wp, bdata)) != 0 )
+	    {
+	      return (rc);
+	    }
+	  
+	  ++wp;
+	  --cnt;
+	}
+
+      return ( 0 );
+    }
+  else
+    {
+      /* Width of the data bus: 32 bits */
+
+      wp = (addr & ~3);	/* get lower word aligned address */
+      
+      /*
+       * handle unaligned start bytes
+       */
+      if ( (l = addr - wp) != 0 ) 
+	{
+	  data = 0;
+	  for (i=0, cp=wp; i<l; ++i, ++cp) 
+	    {
+	      data = (data << 8) | (*(uchar *)cp);
+	    }
+	  for (; i<4 && cnt>0; ++i) 
+	    {
+	      data = (data << 8) | *src++;
+	      --cnt;
+	      ++cp;
+	    }
+	  for (; cnt==0 && i<4; ++i, ++cp) 
+	    {
+	      data = (data << 8) | (*(uchar *)cp);
+	    }
+	  
+	  if ( (rc = write_word(info, wp, data)) != 0 ) 
+	    {
+	      return (rc);
+	    }
+	  wp += 4;
+	}
+      
+      /*
+       * handle word aligned part
+       */
+      while ( cnt >= 4 ) 
+	{
+	  data = 0;
+	  for (i=0; i<4; ++i) 
+	    {
+	      data = (data << 8) | *src++;
+	    }
+	  if ( (rc = write_word(info, wp, data)) != 0 ) 
+	    {
+	      return (rc);
+	    }
+	  wp  += 4;
+	  cnt -= 4;
+	}
+      
+      if ( cnt == 0 ) 
+	{
+	  return (0);
+	}
+      
+      /*
+       * handle unaligned tail bytes
+       */
+      data = 0;
+      for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) 
+	{
+	  data = (data << 8) | *src++;
+	  --cnt;
+	}
+      for (; i<4; ++i, ++cp) 
+	{
+	  data = (data << 8) | (*(uchar *)cp);
+	}
+      
+      return (write_word(info, wp, data));
+    }
+}
+
+/*-----------------------------------------------------------------------
+ * Write a word to Flash, returns:
+ * 0 - OK
+ * 1 - write timeout
+ * 2 - Flash not erased
+ */
+static int 
+write_word (flash_info_t  *info, 
+	    ulong          dest, 
+	    ulong          data)
+{
+  vu_long *addr = (vu_long*)(info->start[0]);
+  ulong start;
+  int flag;
+  
+  /* Check if Flash is (sufficiently) erased */
+  if ( (*((vu_long *)dest) & data) != data ) 
+    {
+      return (2);
+    }
+  /* Disable interrupts which might cause a timeout here */
+  flag = disable_interrupts();
+  
+  addr[0x0555] = 0x00AA00AA;
+  addr[0x02AA] = 0x00550055;
+  addr[0x0555] = 0x00A000A0;
+  
+  *((vu_long *)dest) = data;
+  
+  /* re-enable interrupts if necessary */
+  if ( flag )
+    enable_interrupts();
+
+  /* data polling for D7 */
+  start = get_timer (0);
+  while ( (*((vu_long *)dest) & 0x00800080) != (data & 0x00800080) ) 
+    {
+      if ( get_timer(start) > CFG_FLASH_WRITE_TOUT ) 
+	{
+	  return (1);
+	}
+    }
+
+  return (0);
+}
+
+/*-----------------------------------------------------------------------
+ * Write a byte to Flash, returns:
+ * 0 - OK
+ * 1 - write timeout
+ * 2 - Flash not erased
+ */
+static int 
+write_byte (flash_info_t  *info, 
+	    ulong          dest, 
+	    uchar          data)
+{
+  volatile unsigned char *addr = (volatile unsigned char *)(info->start[0]);
+  ulong  start;
+  int    flag;
+  
+  /* Check if Flash is (sufficiently) erased */
+  if ( (*((volatile unsigned char *)dest) & data) != data ) 
+    {
+      return (2);
+    }
+  /* Disable interrupts which might cause a timeout here */
+  flag = disable_interrupts();
+  
+  addr[0x0555] = 0xAA;
+  addr[0x02AA] = 0x55;
+  addr[0x0555] = 0xA0;
+  
+  *((volatile unsigned char *)dest) = data;
+  
+  /* re-enable interrupts if necessary */
+  if ( flag )
+    enable_interrupts();
+
+  /* data polling for D7 */
+  start = get_timer (0);
+  while ( (*((volatile unsigned char *)dest) & 0x80) != (data & 0x80) ) 
+    {
+      if ( get_timer(start) > CFG_FLASH_WRITE_TOUT ) 
+	{
+	  return (1);
+	}
+    }
+
+  return (0);
+}
+
+/*-----------------------------------------------------------------------
+ */

board/LEOX/elpt860/u-boot.lds

@@ -0,0 +1,146 @@
+/*
+**=====================================================================
+**
+** Copyright (C) 2000, 2001, 2002, 2003
+** The LEOX team <team@leox.org>, http://www.leox.org
+**
+** LEOX.org is about the development of free hardware and software resources
+**   for system on chip.
+**
+** Description: U-Boot port on the LEOX's ELPT860 CPU board
+** ~~~~~~~~~~~
+**
+**=====================================================================
+**
+** This program is free software; you can redistribute it and/or
+** modify it under the terms of the GNU General Public License as
+** published by the Free Software Foundation; either version 2 of
+** the License, or (at your option) any later version.
+**
+** This program is distributed in the hope that it will be useful,
+** but WITHOUT ANY WARRANTY; without even the implied warranty of
+** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+** GNU General Public License for more details.
+**
+** You should have received a copy of the GNU General Public License
+** along with this program; if not, write to the Free Software
+** Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+** MA 02111-1307 USA
+**
+**=====================================================================
+*/
+
+OUTPUT_ARCH(powerpc)
+SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
+/* Do we need any of these for elf?
+   __DYNAMIC = 0;    */
+SECTIONS
+{
+  /* Read-only sections, merged into text segment: */
+  . = + SIZEOF_HEADERS;
+  .interp : { *(.interp) }
+  .hash          : { *(.hash)		}
+  .dynsym        : { *(.dynsym)		}
+  .dynstr        : { *(.dynstr)		}
+  .rel.text      : { *(.rel.text)		}
+  .rela.text     : { *(.rela.text) 	}
+  .rel.data      : { *(.rel.data)		}
+  .rela.data     : { *(.rela.data) 	}
+  .rel.rodata    : { *(.rel.rodata) 	}
+  .rela.rodata   : { *(.rela.rodata) 	}
+  .rel.got       : { *(.rel.got)		}
+  .rela.got      : { *(.rela.got)		}
+  .rel.ctors     : { *(.rel.ctors)	}
+  .rela.ctors    : { *(.rela.ctors)	}
+  .rel.dtors     : { *(.rel.dtors)	}
+  .rela.dtors    : { *(.rela.dtors)	}
+  .rel.bss       : { *(.rel.bss)		}
+  .rela.bss      : { *(.rela.bss)		}
+  .rel.plt       : { *(.rel.plt)		}
+  .rela.plt      : { *(.rela.plt)		}
+  .init          : { *(.init)	}
+  .plt : { *(.plt) }
+  .text      :
+  {
+    /* WARNING - the following is hand-optimized to fit within	*/
+    /* the sector layout of our flash chips!	XXX FIXME XXX	*/
+
+    cpu/mpc8xx/start.o			(.text)
+    common/dlmalloc.o			(.text)
+    lib_ppc/ppcstring.o			(.text)
+    lib_generic/vsprintf.o		(.text)
+    lib_generic/crc32.o			(.text)
+    lib_generic/zlib.o			(.text)
+    lib_generic/string.o		(.text)
+    lib_ppc/cache.o			(.text)
+    lib_ppc/extable.o			(.text)
+    lib_ppc/time.o			(.text)
+    lib_ppc/ticks.o			(.text)
+
+    . = env_offset;
+    common/environment.o		(.text)
+
+    *(.text)
+    *(.fixup)
+    *(.got1)
+  }
+  _etext = .;
+  PROVIDE (etext = .);
+  .rodata    :
+  {
+    *(.rodata)
+    *(.rodata1)
+  }
+  .fini      : { *(.fini)    } =0
+  .ctors     : { *(.ctors)   }
+  .dtors     : { *(.dtors)   }
+
+  /* Read-write section, merged into data segment: */
+  . = (. + 0x00FF) & 0xFFFFFF00;
+  _erotext = .;
+  PROVIDE (erotext = .);
+  .reloc   :
+  {
+    *(.got)
+    _GOT2_TABLE_ = .;
+    *(.got2)
+    _FIXUP_TABLE_ = .;
+    *(.fixup)
+  }
+  __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
+  __fixup_entries = (. - _FIXUP_TABLE_)>>2;
+
+  .data    :
+  {
+    *(.data)
+    *(.data1)
+    *(.sdata)
+    *(.sdata2)
+    *(.dynamic)
+    CONSTRUCTORS
+  }
+  _edata  =  .;
+  PROVIDE (edata = .);
+
+  __start___ex_table = .;
+  __ex_table : { *(__ex_table) }
+  __stop___ex_table = .;
+
+  . = ALIGN(256);
+  __init_begin = .;
+  .text.init : { *(.text.init) }
+  .data.init : { *(.data.init) }
+  . = ALIGN(256);
+  __init_end = .;
+
+  __bss_start = .;
+  .bss       :
+  {
+   *(.sbss) *(.scommon)
+   *(.dynbss)
+   *(.bss)
+   *(COMMON)
+  }
+  _end = . ;
+  PROVIDE (end = .);
+}

board/LEOX/elpt860/u-boot.lds.debug

@@ -0,0 +1,140 @@
+/*
+**=====================================================================
+**
+** Copyright (C) 2000, 2001, 2002, 2003
+** The LEOX team <team@leox.org>, http://www.leox.org
+**
+** LEOX.org is about the development of free hardware and software resources
+**   for system on chip.
+**
+** Description: U-Boot port on the LEOX's ELPT860 CPU board
+** ~~~~~~~~~~~
+**
+**=====================================================================
+**
+** This program is free software; you can redistribute it and/or
+** modify it under the terms of the GNU General Public License as
+** published by the Free Software Foundation; either version 2 of
+** the License, or (at your option) any later version.
+**
+** This program is distributed in the hope that it will be useful,
+** but WITHOUT ANY WARRANTY; without even the implied warranty of
+** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+** GNU General Public License for more details.
+**
+** You should have received a copy of the GNU General Public License
+** along with this program; if not, write to the Free Software
+** Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+** MA 02111-1307 USA
+**
+**=====================================================================
+*/
+
+OUTPUT_ARCH(powerpc)
+SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
+/* Do we need any of these for elf?
+   __DYNAMIC = 0;    */
+SECTIONS
+{
+  /* Read-only sections, merged into text segment: */
+  . = + SIZEOF_HEADERS;
+  .interp : { *(.interp) }
+  .hash          : { *(.hash)		}
+  .dynsym        : { *(.dynsym)		}
+  .dynstr        : { *(.dynstr)		}
+  .rel.text      : { *(.rel.text)		}
+  .rela.text     : { *(.rela.text) 	}
+  .rel.data      : { *(.rel.data)		}
+  .rela.data     : { *(.rela.data) 	}
+  .rel.rodata    : { *(.rel.rodata) 	}
+  .rela.rodata   : { *(.rela.rodata) 	}
+  .rel.got       : { *(.rel.got)		}
+  .rela.got      : { *(.rela.got)		}
+  .rel.ctors     : { *(.rel.ctors)	}
+  .rela.ctors    : { *(.rela.ctors)	}
+  .rel.dtors     : { *(.rel.dtors)	}
+  .rela.dtors    : { *(.rela.dtors)	}
+  .rel.bss       : { *(.rel.bss)		}
+  .rela.bss      : { *(.rela.bss)		}
+  .rel.plt       : { *(.rel.plt)		}
+  .rela.plt      : { *(.rela.plt)		}
+  .init          : { *(.init)	}
+  .plt : { *(.plt) }
+  .text      :
+  {
+    /* WARNING - the following is hand-optimized to fit within	*/
+    /* the sector layout of our flash chips!	XXX FIXME XXX	*/
+
+    cpu/mpc8xx/start.o		(.text)
+    common/dlmalloc.o		(.text)
+    lib_generic/vsprintf.o	(.text)
+    lib_generic/crc32.o		(.text)
+
+    . = env_offset;
+    common/environment.o	(.text)
+
+    *(.text)
+    *(.fixup)
+    *(.got1)
+  }
+  _etext = .;
+  PROVIDE (etext = .);
+  .rodata    :
+  {
+    *(.rodata)
+    *(.rodata1)
+  }
+  .fini      : { *(.fini)    } =0
+  .ctors     : { *(.ctors)   }
+  .dtors     : { *(.dtors)   }
+
+  /* Read-write section, merged into data segment: */
+  . = (. + 0x0FFF) & 0xFFFFF000;
+  _erotext = .;
+  PROVIDE (erotext = .);
+  .reloc   :
+  {
+    *(.got)
+    _GOT2_TABLE_ = .;
+    *(.got2)
+    _FIXUP_TABLE_ = .;
+    *(.fixup)
+  }
+  __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
+  __fixup_entries = (. - _FIXUP_TABLE_)>>2;
+
+  .data    :
+  {
+    *(.data)
+    *(.data1)
+    *(.sdata)
+    *(.sdata2)
+    *(.dynamic)
+    CONSTRUCTORS
+  }
+  _edata  =  .;
+  PROVIDE (edata = .);
+
+  __start___ex_table = .;
+  __ex_table : { *(__ex_table) }
+  __stop___ex_table = .;
+
+  . = ALIGN(4096);
+  __init_begin = .;
+  .text.init : { *(.text.init) }
+  .data.init : { *(.data.init) }
+  . = ALIGN(4096);
+  __init_end = .;
+
+  __bss_start = .;
+  .bss       :
+  {
+   *(.sbss) *(.scommon)
+   *(.dynbss)
+   *(.bss)
+   *(COMMON)
+  }
+  _end = . ;
+  PROVIDE (end = .);
+}
+

board/MAI/AmigaOneG3SE/flash_new.c

@@ -120,7 +120,7 @@ unsigned long flash_init (void)
 		/* monitor protection ON by default */
 		flash_protect(FLAG_PROTECT_SET,
 			      CFG_MONITOR_BASE,
-			      CFG_MONITOR_BASE + CFG_MONITOR_LEN - 1,
+			      CFG_MONITOR_BASE + monitor_flash_len - 1,
 			      &flash_info[0]);
 #endif
 

board/MAI/bios_emulator/scitech/lib/debug/linux/gcc/glibc.so/readme.txt

@@ -0,0 +1 @@
+This file is just to ensure that the directory is created.

board/MAI/bios_emulator/scitech/lib/debug/linux/gcc/libc.so/readme.txt

@@ -0,0 +1 @@
+This file is just to ensure that the directory is created.

board/MAI/bios_emulator/scitech/src/v86bios/command.c

@@ -36,6 +36,3 @@ getline(char *buf,int *num,int max_num)
     line_pointer = line_pointer + *num;
     len = len - *num;
 }
-
-
-

board/RPXClassic/flash.c

@@ -64,7 +64,7 @@ unsigned long flash_init (void)
 	/* monitor protection ON by default */
 	flash_protect(FLAG_PROTECT_SET,
 		      CFG_MONITOR_BASE,
-		      CFG_MONITOR_BASE+CFG_MONITOR_LEN-1,
+		      CFG_MONITOR_BASE+monitor_flash_len-1,
 		      &flash_info[0]);
 #endif
 

board/RPXlite/flash.c

@@ -85,7 +85,7 @@ unsigned long flash_init (void)
 	/* monitor protection ON by default */
 	flash_protect(FLAG_PROTECT_SET,
 		      CFG_MONITOR_BASE,
-		      CFG_MONITOR_BASE+CFG_MONITOR_LEN-1,
+		      CFG_MONITOR_BASE+monitor_flash_len-1,
 		      &flash_info[0]);
 #endif
 

board/RRvision/flash.c

@@ -73,7 +73,7 @@ unsigned long flash_init (void)
 	/* monitor protection ON by default */
 	flash_protect(FLAG_PROTECT_SET,
 		      CFG_MONITOR_BASE,
-		      CFG_MONITOR_BASE+CFG_MONITOR_LEN-1,
+		      CFG_MONITOR_BASE+monitor_flash_len-1,
 		      &flash_info[0]);
 #endif
 

board/at91rm9200dk/Makefile

@@ -0,0 +1,47 @@
+#
+# (C) Copyright 2003
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB	= lib$(BOARD).a
+
+OBJS	:= at91rm9200dk.o flash.o
+SOBJS	:=
+
+$(LIB):	$(OBJS) $(SOBJS)
+	$(AR) crv $@ $^
+
+clean:
+	rm -f $(SOBJS) $(OBJS)
+
+distclean:	clean
+	rm -f $(LIB) core *.bak .depend
+
+#########################################################################
+
+.depend:	Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
+		$(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
+
+-include .depend
+
+#########################################################################

board/at91rm9200dk/at91rm9200dk.c

@@ -0,0 +1,105 @@
+/*
+ * (C) Copyright 2002
+ * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
+ * Marius Groeger <mgroeger@sysgo.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/arch/AT91RM9200.h>
+
+/* ------------------------------------------------------------------------- */
+/*
+ * Miscelaneous platform dependent initialisations
+ */
+
+int board_init(void)
+  {
+  DECLARE_GLOBAL_DATA_PTR;
+
+    /* memory and cpu-speed are setup before relocation */
+    /* so we do _nothing_ here */
+
+    /* arch number of AT91RM9200DK-Board */
+    gd->bd->bi_arch_number = 251;
+    /* adress of boot parameters */
+    gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
+
+    return 0;
+}
+
+int dram_init(void)
+{
+  DECLARE_GLOBAL_DATA_PTR;
+
+  gd->bd->bi_dram[0].start = PHYS_SDRAM;
+  gd->bd->bi_dram[0].size  = PHYS_SDRAM_SIZE;
+  return 0;
+}
+
+/*
+ * Disk On Chip (NAND) Millenium initialization.
+ * The NAND lives in the CS2* space
+ */
+#if (CONFIG_COMMANDS & CFG_CMD_NAND)
+extern void
+nand_probe(ulong physadr);
+
+#define AT91_SMARTMEDIA_BASE 0x40000000  /* physical address to access memory on NCS3 */
+void
+nand_init(void)
+{
+	/* Setup Smart Media, fitst enable the address range of CS3 */
+        *AT91C_EBI_CSA |= AT91C_EBI_CS3A_SMC_SmartMedia;
+        /* set the bus interface characteristics based on
+           tDS Data Set up Time 30 - ns
+           tDH Data Hold Time 20 - ns
+           tALS ALE Set up Time 20 - ns
+           16ns at 60 MHz ~= 3  */
+/*memory mapping structures */
+#define SM_ID_RWH	(5 << 28)
+#define SM_RWH		(1 << 28)
+#define SM_RWS		(0 << 24)
+#define SM_TDF		(1 << 8)
+#define SM_NWS		(3)
+        AT91C_BASE_SMC2->SMC2_CSR[3] = ( SM_RWH|SM_RWS | AT91C_SMC2_ACSS_STANDARD |
+                                         AT91C_SMC2_DBW_8 | SM_TDF |
+                                         AT91C_SMC2_WSEN | SM_NWS);
+
+        /* enable the SMOE line PC0=SMCE, A21=CLE, A22=ALE */
+        *AT91C_PIOC_ASR = AT91C_PC0_BFCK | AT91C_PC1_BFRDY_SMOE | AT91C_PC3_BFBAA_SMWE;
+        *AT91C_PIOC_PDR = AT91C_PC0_BFCK | AT91C_PC1_BFRDY_SMOE | AT91C_PC3_BFBAA_SMWE;
+
+	/* Configure PC2 as input (signal READY of the SmartMedia) */
+        *AT91C_PIOC_PER = AT91C_PC2_BFAVD;  /* enable direct output enable */
+        *AT91C_PIOC_ODR = AT91C_PC2_BFAVD;  /* disable output */
+
+	/* Configure PB1 as input (signal Card Detect of the SmartMedia) */
+        *AT91C_PIOB_PER = AT91C_PIO_PB1;  /* enable direct output enable */
+        *AT91C_PIOB_ODR = AT91C_PIO_PB1;  /* disable output */
+
+        if (*AT91C_PIOB_PDSR & AT91C_PIO_PB1)
+          printf ("No ");
+        printf ("SmartMedia card inserted\n");
+
+	printf("Probing at 0x%.8x\n", AT91_SMARTMEDIA_BASE);
+	nand_probe(AT91_SMARTMEDIA_BASE);
+}
+#endif

board/at91rm9200dk/config.mk

@@ -0,0 +1,2 @@
+TEXT_BASE = 0x21fa0000
+

board/at91rm9200dk/flash.c

@@ -0,0 +1,397 @@
+/*
+ * (C) Copyright 2002
+ * Lineo, Inc. <www.lineo.com>
+ * Bernhard Kuhn <bkuhn@lineo.com>
+ *
+ * (C) Copyright 2002
+ * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
+ * Alex Zuepke <azu@sysgo.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+
+ulong myflush(void);
+
+
+#define FLASH_BANK_SIZE 0x200000	/* 2 MB */
+#define MAIN_SECT_SIZE  0x10000		/* 64 KB */
+
+flash_info_t    flash_info[CFG_MAX_FLASH_BANKS];
+
+
+#define CMD_READ_ARRAY		0x00F0
+#define CMD_UNLOCK1		0x00AA
+#define CMD_UNLOCK2		0x0055
+#define CMD_ERASE_SETUP		0x0080
+#define CMD_ERASE_CONFIRM	0x0030
+#define CMD_PROGRAM		0x00A0
+#define CMD_UNLOCK_BYPASS	0x0020
+
+#define MEM_FLASH_ADDR1		(*(volatile u16 *)(CFG_FLASH_BASE + (0x00005555<<1)))
+#define MEM_FLASH_ADDR2		(*(volatile u16 *)(CFG_FLASH_BASE + (0x00002AAA<<1)))
+
+#define BIT_ERASE_DONE		0x0080
+#define BIT_RDY_MASK		0x0080
+#define BIT_PROGRAM_ERROR	0x0020
+#define BIT_TIMEOUT		0x80000000 /* our flag */
+
+#define READY 1
+#define ERR   2
+#define TMO   4
+
+/*-----------------------------------------------------------------------
+ */
+
+ulong flash_init(void)
+{
+    int i, j;
+    ulong size = 0;
+
+    for (i = 0; i < CFG_MAX_FLASH_BANKS; i++)
+    {
+	ulong flashbase = 0;
+	flash_info[i].flash_id =
+	  (ATM_MANUFACT & FLASH_VENDMASK) |
+	  (ATM_ID_BV1614 & FLASH_TYPEMASK);
+	flash_info[i].size = FLASH_BANK_SIZE;
+	flash_info[i].sector_count = CFG_MAX_FLASH_SECT;
+	memset(flash_info[i].protect, 0, CFG_MAX_FLASH_SECT);
+	if (i == 0)
+	  flashbase = PHYS_FLASH_1;
+	else
+	  panic("configured to many flash banks!\n");
+	for (j = 0; j < flash_info[i].sector_count; j++)
+	{
+
+	    if (j <= 9)
+	    {
+		/* 1st to 8th are 8 KB */
+		if (j <= 7)
+		{
+		    flash_info[i].start[j] = flashbase + j*0x2000;
+		}
+
+		/* 9th and 10th are both 32 KB */
+		if ((j == 8) || (j == 9))
+		{
+			flash_info[i].start[j] = flashbase + 0x10000 + (j-8)*0x8000;
+		}
+	    }
+	    else
+	    {
+		flash_info[i].start[j] = flashbase + (j-8)*MAIN_SECT_SIZE;
+	    }
+	}
+	size += flash_info[i].size;
+    }
+
+    flash_protect(FLAG_PROTECT_SET,
+		  CFG_FLASH_BASE,
+		  CFG_ENV_ADDR - 1,
+		  &flash_info[0]);
+
+    flash_protect(FLAG_PROTECT_SET,
+		  CFG_ENV_ADDR,
+		  CFG_ENV_ADDR + CFG_ENV_SIZE - 1,
+		  &flash_info[0]);
+
+    return size;
+}
+
+/*-----------------------------------------------------------------------
+ */
+void flash_print_info  (flash_info_t *info)
+{
+    int i;
+
+    switch (info->flash_id & FLASH_VENDMASK)
+    {
+    case (ATM_MANUFACT & FLASH_VENDMASK):
+	printf("Atmel: ");
+	break;
+    default:
+	printf("Unknown Vendor ");
+	break;
+    }
+
+    switch (info->flash_id & FLASH_TYPEMASK)
+    {
+    case (ATM_ID_BV1614 & FLASH_TYPEMASK):
+	printf("AT49BV1614 (16Mbit)\n");
+	break;
+    default:
+	printf("Unknown Chip Type\n");
+	goto Done;
+	break;
+    }
+
+    printf("  Size: %ld MB in %d Sectors\n",
+	   info->size >> 20, info->sector_count);
+
+    printf("  Sector Start Addresses:");
+    for (i = 0; i < info->sector_count; i++)
+    {
+	if ((i % 5) == 0)
+	{
+	    printf ("\n   ");
+	}
+	printf (" %08lX%s", info->start[i],
+		info->protect[i] ? " (RO)" : "     ");
+    }
+    printf ("\n");
+
+Done:
+}
+
+/*-----------------------------------------------------------------------
+ */
+
+int	flash_erase (flash_info_t *info, int s_first, int s_last)
+{
+    ulong result;
+    int iflag, cflag, prot, sect;
+    int rc = ERR_OK;
+    int chip1;
+
+    /* first look for protection bits */
+
+    if (info->flash_id == FLASH_UNKNOWN)
+	return ERR_UNKNOWN_FLASH_TYPE;
+
+    if ((s_first < 0) || (s_first > s_last)) {
+	return ERR_INVAL;
+    }
+
+    if ((info->flash_id & FLASH_VENDMASK) !=
+	(ATM_MANUFACT & FLASH_VENDMASK)) {
+	return ERR_UNKNOWN_FLASH_VENDOR;
+    }
+
+    prot = 0;
+    for (sect=s_first; sect<=s_last; ++sect) {
+	if (info->protect[sect]) {
+	    prot++;
+	}
+    }
+    if (prot)
+	return ERR_PROTECTED;
+
+    /*
+     * Disable interrupts which might cause a timeout
+     * here. Remember that our exception vectors are
+     * at address 0 in the flash, and we don't want a
+     * (ticker) exception to happen while the flash
+     * chip is in programming mode.
+     */
+    cflag = icache_status();
+    icache_disable();
+    iflag = disable_interrupts();
+
+    /* Start erase on unprotected sectors */
+    for (sect = s_first; sect<=s_last && !ctrlc(); sect++)
+    {
+	printf("Erasing sector %2d ... ", sect);
+
+	/* arm simple, non interrupt dependent timer */
+	reset_timer_masked();
+
+	if (info->protect[sect] == 0)
+	{	/* not protected */
+	    volatile u16 *addr = (volatile u16 *)(info->start[sect]);
+
+	    MEM_FLASH_ADDR1 = CMD_UNLOCK1;
+	    MEM_FLASH_ADDR2 = CMD_UNLOCK2;
+	    MEM_FLASH_ADDR1 = CMD_ERASE_SETUP;
+
+	    MEM_FLASH_ADDR1 = CMD_UNLOCK1;
+	    MEM_FLASH_ADDR2 = CMD_UNLOCK2;
+	    *addr = CMD_ERASE_CONFIRM;
+
+	    /* wait until flash is ready */
+	    chip1 = 0;
+
+	    do
+	    {
+		result = *addr;
+
+		/* check timeout */
+		if (get_timer_masked() > CFG_FLASH_ERASE_TOUT)
+		{
+		    MEM_FLASH_ADDR1 = CMD_READ_ARRAY;
+		    chip1 = TMO;
+		    break;
+		}
+
+		if (!chip1 && (result & 0xFFFF) & BIT_ERASE_DONE)
+			chip1 = READY;
+
+	    }  while (!chip1);
+
+	    MEM_FLASH_ADDR1 = CMD_READ_ARRAY;
+
+	    if (chip1 == ERR)
+	    {
+		rc = ERR_PROG_ERROR;
+		goto outahere;
+	    }
+	    if (chip1 == TMO)
+	    {
+		rc = ERR_TIMOUT;
+		goto outahere;
+	    }
+
+	    printf("ok.\n");
+	}
+	else /* it was protected */
+	{
+	    printf("protected!\n");
+	}
+    }
+
+    if (ctrlc())
+      printf("User Interrupt!\n");
+
+outahere:
+    /* allow flash to settle - wait 10 ms */
+    udelay_masked(10000);
+
+    if (iflag)
+      enable_interrupts();
+
+    if (cflag)
+      icache_enable();
+
+    return rc;
+}
+
+/*-----------------------------------------------------------------------
+ * Copy memory to flash
+ */
+
+volatile static int write_word (flash_info_t *info, ulong dest, ulong data)
+{
+    volatile u16 *addr = (volatile u16 *)dest;
+    ulong result;
+    int rc = ERR_OK;
+    int cflag, iflag;
+    int chip1;
+
+    /*
+     * Check if Flash is (sufficiently) erased
+     */
+    result = *addr;
+    if ((result & data) != data)
+        return ERR_NOT_ERASED;
+
+
+    /*
+     * Disable interrupts which might cause a timeout
+     * here. Remember that our exception vectors are
+     * at address 0 in the flash, and we don't want a
+     * (ticker) exception to happen while the flash
+     * chip is in programming mode.
+     */
+    cflag = icache_status();
+    icache_disable();
+    iflag = disable_interrupts();
+
+    MEM_FLASH_ADDR1 = CMD_UNLOCK1;
+    MEM_FLASH_ADDR2 = CMD_UNLOCK2;
+    MEM_FLASH_ADDR1 = CMD_PROGRAM;
+    *addr = data;
+
+    /* arm simple, non interrupt dependent timer */
+    reset_timer_masked();
+
+    /* wait until flash is ready */
+    chip1 = 0;
+    do
+    {
+	result = *addr;
+
+	/* check timeout */
+	if (get_timer_masked() > CFG_FLASH_ERASE_TOUT)
+	{
+	    chip1 = ERR | TMO;
+	    break;
+	}
+	if (!chip1 && ((result & 0x80) == (data & 0x80)))
+		chip1 = READY;
+
+    }  while (!chip1);
+
+    *addr = CMD_READ_ARRAY;
+
+    if (chip1 == ERR || *addr != data)
+        rc = ERR_PROG_ERROR;
+
+    if (iflag)
+      enable_interrupts();
+
+    if (cflag)
+      icache_enable();
+
+    return rc;
+}
+
+/*-----------------------------------------------------------------------
+ * Copy memory to flash.
+ */
+
+int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
+{
+    ulong wp, data;
+    int rc;
+
+    if(addr & 1) {
+      printf("unaligned destination not supported\n");
+      return ERR_ALIGN;
+    };
+
+    if((int)src & 1) {
+      printf("unaligned source not supported\n");
+      return ERR_ALIGN;
+    };
+
+    wp = addr;
+
+    while (cnt >= 2) {
+	data = *((volatile u16*)src);
+	if ((rc = write_word(info, wp, data)) != 0) {
+	    return (rc);
+	}
+	src += 2;
+	wp  += 2;
+	cnt -= 2;
+    }
+
+    if(cnt == 1) {
+      data =  (*((volatile u8*)src)) | (*((volatile u8*)(wp+1)) << 8);
+	if ((rc = write_word(info, wp, data)) != 0) {
+	    return (rc);
+	}
+	src += 1;
+	wp  += 1;
+	cnt -= 1;
+    };
+
+    return ERR_OK;
+}

board/at91rm9200dk/u-boot.lds

@@ -0,0 +1,54 @@
+/*
+ * (C) Copyright 2002
+ * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
+/*OUTPUT_FORMAT("elf32-arm", "elf32-arm", "elf32-arm")*/
+OUTPUT_ARCH(arm)
+ENTRY(_start)
+SECTIONS
+{
+        . = 0x00000000;
+
+        . = ALIGN(4);
+	.text      :
+	{
+	  cpu/at91rm9200/start.o	(.text)
+	  *(.text)
+	}
+
+        . = ALIGN(4);
+        .rodata : { *(.rodata) }
+
+        . = ALIGN(4);
+        .data : { *(.data) }
+
+        . = ALIGN(4);
+        .got : { *(.got) }
+
+	armboot_end_data = .;
+
+        . = ALIGN(4);
+        .bss : { *(.bss) }
+
+	armboot_end = .;
+}

board/atc/Makefile

@@ -0,0 +1,40 @@
+#
+# (C) Copyright 2001
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB	= lib$(BOARD).a
+
+OBJS	= $(BOARD).o flash.o
+
+$(LIB):	.depend $(OBJS)
+	$(AR) crv $@ $^
+
+#########################################################################
+
+.depend:	Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
+		$(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
+
+sinclude .depend
+
+#########################################################################

board/atc/atc.c

@@ -0,0 +1,378 @@
+/*
+ * (C) Copyright 2001
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <ioports.h>
+#include <mpc8260.h>
+#include <pci.h>
+
+/*
+ * I/O Port configuration table
+ *
+ * if conf is 1, then that port pin will be configured at boot time
+ * according to the five values podr/pdir/ppar/psor/pdat for that entry
+ */
+
+const iop_conf_t iop_conf_tab[4][32] = {
+
+    /* Port A configuration */
+    {	/*	      conf ppar psor pdir podr pdat */
+	/* PA31 */ {   1,   1,   1,   0,   0,   0   }, /* FCC1 MII COL */
+	/* PA30 */ {   1,   1,   1,   0,   0,   0   }, /* FCC1 MII CRS */
+	/* PA29 */ {   1,   1,   1,   1,   0,   0   }, /* FCC1 MII TX_ER */
+	/* PA28 */ {   1,   1,   1,   1,   0,   0   }, /* FCC1 MII TX_EN */
+	/* PA27 */ {   1,   1,   1,   0,   0,   0   }, /* FCC1 MII RX_DV */
+	/* PA26 */ {   1,   1,   1,   0,   0,   0   }, /* FCC1 MII RX_ER */
+	/* PA25 */ {   1,   0,   0,   1,   0,   0   }, /* FCC2 MII MDIO */
+	/* PA24 */ {   1,   0,   0,   1,   0,   0   }, /* FCC2 MII MDC */
+	/* PA23 */ {   1,   0,   0,   1,   0,   0   }, /* FCC1 MII MDIO */
+	/* PA22 */ {   1,   0,   0,   1,   0,   0   }, /* FCC1 MII MDC */
+	/* PA21 */ {   1,   1,   0,   1,   0,   0   }, /* FCC1 MII TxD[3] */
+	/* PA20 */ {   1,   1,   0,   1,   0,   0   }, /* FCC1 MII TxD[2] */
+	/* PA19 */ {   1,   1,   0,   1,   0,   0   }, /* FCC1 MII TxD[1] */
+	/* PA18 */ {   1,   1,   0,   1,   0,   0   }, /* FCC1 MII TxD[0] */
+	/* PA17 */ {   1,   1,   0,   0,   0,   0   }, /* FCC1 MII RxD[0] */
+	/* PA16 */ {   1,   1,   0,   0,   0,   0   }, /* FCC1 MII RxD[1] */
+	/* PA15 */ {   1,   1,   0,   0,   0,   0   }, /* FCC1 MII RxD[2] */
+	/* PA14 */ {   1,   1,   0,   0,   0,   0   }, /* FCC1 MII RxD[3] */
+	/* PA13 */ {   1,   0,   0,   1,   0,   0   }, /* FCC2 MII TXSL1 */
+	/* PA12 */ {   1,   0,   0,   1,   0,   1   }, /* FCC2 MII TXSL0 */
+	/* PA11 */ {   1,   0,   0,   1,   0,   0   }, /* FCC1 MII TXSL1 */
+	/* PA10 */ {   1,   0,   0,   1,   0,   1   }, /* FCC1 MII TXSL0 */
+#if 1
+	/* PA9  */ {   0,   1,   0,   1,   0,   0   }, /* SMC2 TXD */
+	/* PA8  */ {   0,   1,   0,   0,   0,   0   }, /* SMC2 RXD */
+#else
+	/* PA9  */ {   1,   1,   0,   1,   0,   0   }, /* SMC2 TXD */
+	/* PA8  */ {   1,   1,   0,   0,   0,   0   }, /* SMC2 RXD */
+#endif
+	/* PA7  */ {   0,   0,   0,   0,   0,   0   }, /* PA7 */
+	/* PA6  */ {   1,   0,   0,   1,   0,   1   }, /* FCC2 MII PAUSE */
+	/* PA5  */ {   1,   0,   0,   1,   0,   1   }, /* FCC1 MII PAUSE */
+	/* PA4  */ {   1,   0,   0,   1,   0,   0   }, /* FCC2 MII PWRDN */
+	/* PA3  */ {   1,   0,   0,   1,   0,   0   }, /* FCC1 MII PWRDN */
+	/* PA2  */ {   0,   0,   0,   0,   0,   0   }, /* PA2 */
+	/* PA1  */ {   1,   0,   0,   0,   0,   0   }, /* FCC2 MII MDINT */
+	/* PA0  */ {   1,   0,   0,   1,   0,   0   }  /* FCC1 MII MDINT */
+    },
+
+    /* Port B configuration */
+    {   /*	      conf ppar psor pdir podr pdat */
+	/* PB31 */ {   1,   1,   0,   1,   0,   0   }, /* FCC2 MII TX_ER */
+	/* PB30 */ {   1,   1,   0,   0,   0,   0   }, /* FCC2 MII RX_DV */
+	/* PB29 */ {   1,   1,   1,   1,   0,   0   }, /* FCC2 MII TX_EN */
+	/* PB28 */ {   1,   1,   0,   0,   0,   0   }, /* FCC2 MII RX_ER */
+	/* PB27 */ {   1,   1,   0,   0,   0,   0   }, /* FCC2 MII COL */
+	/* PB26 */ {   1,   1,   0,   0,   0,   0   }, /* FCC2 MII CRS */
+	/* PB25 */ {   1,   1,   0,   1,   0,   0   }, /* FCC2 MII TxD[3] */
+	/* PB24 */ {   1,   1,   0,   1,   0,   0   }, /* FCC2 MII TxD[2] */
+	/* PB23 */ {   1,   1,   0,   1,   0,   0   }, /* FCC2 MII TxD[1] */
+	/* PB22 */ {   1,   1,   0,   1,   0,   0   }, /* FCC2 MII TxD[0] */
+	/* PB21 */ {   1,   1,   0,   0,   0,   0   }, /* FCC2 MII RxD[0] */
+	/* PB20 */ {   1,   1,   0,   0,   0,   0   }, /* FCC2 MII RxD[1] */
+	/* PB19 */ {   1,   1,   0,   0,   0,   0   }, /* FCC2 MII RxD[2] */
+	/* PB18 */ {   1,   1,   0,   0,   0,   0   }, /* FCC2 MII RxD[3] */
+	/* PB17 */ {   0,   0,   0,   0,   0,   0   }, /* PB17 */
+	/* PB16 */ {   0,   0,   0,   0,   0,   0   }, /* PB16 */
+	/* PB15 */ {   0,   0,   0,   0,   0,   0   }, /* PB15 */
+	/* PB14 */ {   0,   0,   0,   0,   0,   0   }, /* PB14 */
+	/* PB13 */ {   0,   0,   0,   0,   0,   0   }, /* PB13 */
+	/* PB12 */ {   0,   0,   0,   0,   0,   0   }, /* PB12 */
+	/* PB11 */ {   0,   0,   0,   0,   0,   0   }, /* PB11 */
+	/* PB10 */ {   0,   0,   0,   0,   0,   0   }, /* PB10 */
+	/* PB9  */ {   0,   0,   0,   0,   0,   0   }, /* PB9 */
+	/* PB8  */ {   0,   0,   0,   0,   0,   0   }, /* PB8 */
+	/* PB7  */ {   0,   0,   0,   0,   0,   0   }, /* PB7 */
+	/* PB6  */ {   0,   0,   0,   0,   0,   0   }, /* PB6 */
+	/* PB5  */ {   0,   0,   0,   0,   0,   0   }, /* PB5 */
+	/* PB4  */ {   0,   0,   0,   0,   0,   0   }, /* PB4 */
+	/* PB3  */ {   0,   0,   0,   0,   0,   0   }, /* PB3 */
+	/* PB2  */ {   0,   0,   0,   0,   0,   0   }, /* PB2 */
+	/* PB1  */ {   0,   0,   0,   0,   0,   0   }, /* PB1 */
+	/* PB0  */ {   0,   0,   0,   0,   0,   0   }  /* PB0 */
+    },
+
+    /* Port C */
+    {   /*	      conf ppar psor pdir podr pdat */
+	/* PC31 */ {   0,   0,   0,   0,   0,   0   }, /* PC31 */
+	/* PC30 */ {   0,   0,   0,   0,   0,   0   }, /* PC30 */
+	/* PC29 */ {   1,   0,   0,   0,   0,   0   }, /* SCC1 CTS */
+	/* PC28 */ {   1,   0,   0,   0,   0,   0   }, /* SCC2 CTS */
+	/* PC27 */ {   0,   0,   0,   0,   0,   0   }, /* PC27 */
+	/* PC26 */ {   0,   0,   0,   0,   0,   0   }, /* PC26 */
+	/* PC25 */ {   0,   0,   0,   0,   0,   0   }, /* PC25 */
+	/* PC24 */ {   0,   0,   0,   0,   0,   0   }, /* PC24 */
+	/* PC23 */ {   0,   0,   0,   0,   0,   0   }, /* FDC37C78 DACFD */
+	/* PC22 */ {   0,   0,   0,   0,   0,   0   }, /* FDC37C78 DNFD */
+	/* PC21 */ {   1,   1,   0,   0,   0,   0   }, /* FCC1 MII RX_CLK */
+	/* PC20 */ {   1,   1,   0,   0,   0,   0   }, /* FCC1 MII TX_CLK */
+	/* PC19 */ {   1,   1,   0,   0,   0,   0   }, /* FCC2 MII RX_CLK */
+	/* PC18 */ {   1,   1,   0,   0,   0,   0   }, /* FCC2 MII TX_CLK */
+	/* PC17 */ {   0,   0,   0,   0,   0,   0   }, /* PC17 */
+	/* PC16 */ {   0,   0,   0,   0,   0,   0   }, /* PC16 */
+#if 0
+	/* PC15 */ {   0,   0,   0,   0,   0,   0   }, /* PC15 */
+#else
+	/* PC15 */ {   1,   1,   0,   1,   0,   0   }, /* PC15 */
+#endif
+	/* PC14 */ {   0,   0,   0,   0,   0,   0   }, /* PC14 */
+	/* PC13 */ {   0,   0,   0,   0,   0,   0   }, /* PC13 */
+	/* PC12 */ {   0,   0,   0,   0,   0,   0   }, /* PC12 */
+	/* PC11 */ {   0,   0,   0,   0,   0,   0   }, /* PC11 */
+	/* PC10 */ {   0,   0,   0,   0,   0,   0   }, /* PC10 */
+	/* PC9  */ {   0,   0,   0,   0,   0,   0   }, /* FC9 */
+	/* PC8  */ {   0,   0,   0,   0,   0,   0   }, /* PC8 */
+	/* PC7  */ {   0,   0,   0,   0,   0,   0   }, /* PC7 */
+	/* PC6  */ {   0,   0,   0,   0,   0,   0   }, /* PC6 */
+	/* PC5  */ {   0,   0,   0,   0,   0,   0   }, /* PC5 */
+	/* PC4  */ {   0,   0,   0,   0,   0,   0   }, /* PC4 */
+	/* PC3  */ {   0,   0,   0,   0,   0,   0   }, /* PC3 */
+	/* PC2  */ {   0,   0,   0,   0,   0,   0   }, /* PC2 */
+	/* PC1  */ {   0,   0,   0,   0,   0,   0   }, /* PC1 */
+	/* PC0  */ {   0,   0,   0,   0,   0,   0   }, /* FDC37C78 DRQFD */
+    },
+
+    /* Port D */
+    {   /*	      conf ppar psor pdir podr pdat */
+	/* PD31 */ {   1,   1,   0,   0,   0,   0   }, /* SCC1 RXD */
+	/* PD30 */ {   1,   1,   1,   1,   0,   0   }, /* SCC1 TXD */
+	/* PD29 */ {   1,   0,   0,   1,   0,   0   }, /* SCC1 RTS */
+	/* PD28 */ {   1,   1,   0,   0,   0,   0   }, /* SCC2 RXD */
+	/* PD27 */ {   1,   1,   0,   1,   0,   0   }, /* SCC2 TXD */
+	/* PD26 */ {   1,   0,   0,   1,   0,   0   }, /* SCC2 RTS */
+	/* PD25 */ {   0,   0,   0,   0,   0,   0   }, /* PD25 */
+	/* PD24 */ {   0,   0,   0,   0,   0,   0   }, /* PD24 */
+	/* PD23 */ {   0,   0,   0,   0,   0,   0   }, /* PD23 */
+	/* PD22 */ {   0,   0,   0,   0,   0,   0   }, /* PD22 */
+	/* PD21 */ {   0,   0,   0,   0,   0,   0   }, /* PD21 */
+	/* PD20 */ {   0,   0,   0,   0,   0,   0   }, /* PD20 */
+	/* PD19 */ {   0,   0,   0,   0,   0,   0   }, /* PD19 */
+	/* PD18 */ {   0,   0,   0,   0,   0,   0   }, /* PD18 */
+	/* PD17 */ {   0,   0,   0,   0,   0,   0   }, /* PD17 */
+	/* PD16 */ {   0,   0,   0,   0,   0,   0   }, /* PD16 */
+#if defined(CONFIG_SOFT_I2C)
+	/* PD15 */ {   1,   0,   0,   1,   1,   1   }, /* I2C SDA */
+	/* PD14 */ {   1,   0,   0,   1,   1,   1   }, /* I2C SCL */
+#else
+#if defined(CONFIG_HARD_I2C)
+	/* PD15 */ {   1,   1,   1,   0,   1,   0   }, /* I2C SDA */
+	/* PD14 */ {   1,   1,   1,   0,   1,   0   }, /* I2C SCL */
+#else /* normal I/O port pins */
+	/* PD15 */ {   1,   1,   1,   0,   1,   0   }, /* I2C SDA */
+	/* PD14 */ {   1,   1,   1,   0,   1,   0   }, /* I2C SCL */
+#endif
+#endif
+	/* PD13 */ {   0,   0,   0,   0,   0,   0   }, /* PD13 */
+	/* PD12 */ {   0,   0,   0,   0,   0,   0   }, /* PD12 */
+	/* PD11 */ {   0,   0,   0,   0,   0,   0   }, /* PD11 */
+	/* PD10 */ {   0,   0,   0,   0,   0,   0   }, /* PD10 */
+	/* PD9  */ {   1,   1,   0,   1,   0,   0   }, /* SMC1 TXD */
+	/* PD8  */ {   1,   1,   0,   0,   0,   0   }, /* SMC1 RXD */
+	/* PD7  */ {   0,   0,   0,   0,   0,   0   }, /* PD7 */
+	/* PD6  */ {   0,   0,   0,   0,   0,   0   }, /* PD6 */
+	/* PD5  */ {   0,   0,   0,   0,   0,   0   }, /* PD5 */
+#if 0
+	/* PD4  */ {   0,   0,   0,   0,   0,   0   }, /* PD4 */
+#else
+	/* PD4  */ {   1,   1,   1,   0,   0,   0   }, /* PD4 */
+#endif
+	/* PD3  */ {   0,   0,   0,   0,   0,   0   }, /* PD3 */
+	/* PD2  */ {   0,   0,   0,   0,   0,   0   }, /* PD2 */
+	/* PD1  */ {   0,   0,   0,   0,   0,   0   }, /* PD1 */
+	/* PD0  */ {   0,   0,   0,   0,   0,   0   }  /* PD0 */
+    }
+};
+
+/* ------------------------------------------------------------------------- */
+
+/* Check Board Identity:
+ */
+int checkboard (void)
+{
+	printf ("Board: ATC\n");
+	return 0;
+}
+
+/* ------------------------------------------------------------------------- */
+
+/* Try SDRAM initialization with P/LSDMR=sdmr and ORx=orx
+ *
+ * This routine performs standard 8260 initialization sequence
+ * and calculates the available memory size. It may be called
+ * several times to try different SDRAM configurations on both
+ * 60x and local buses.
+ */
+static long int try_init (volatile memctl8260_t * memctl, ulong sdmr,
+			  ulong orx, volatile uchar * base)
+{
+	volatile uchar c = 0xff;
+	ulong cnt, val;
+	volatile ulong *addr;
+	volatile uint *sdmr_ptr;
+	volatile uint *orx_ptr;
+	int i;
+	ulong save[32];		/* to make test non-destructive */
+	ulong maxsize;
+
+	/* We must be able to test a location outsize the maximum legal size
+	 * to find out THAT we are outside; but this address still has to be
+	 * mapped by the controller. That means, that the initial mapping has
+	 * to be (at least) twice as large as the maximum expected size.
+	 */
+	maxsize = (1 + (~orx | 0x7fff)) / 2;
+
+	/* Since CFG_SDRAM_BASE is always 0 (??), we assume that
+	 * we are configuring CS1 if base != 0
+	 */
+	sdmr_ptr = &memctl->memc_psdmr;
+	orx_ptr = &memctl->memc_or2;
+
+	*orx_ptr = orx;
+
+	/*
+	 * Quote from 8260 UM (10.4.2 SDRAM Power-On Initialization, 10-35):
+	 *
+	 * "At system reset, initialization software must set up the
+	 *  programmable parameters in the memory controller banks registers
+	 *  (ORx, BRx, P/LSDMR). After all memory parameters are configured,
+	 *  system software should execute the following initialization sequence
+	 *  for each SDRAM device.
+	 *
+	 *  1. Issue a PRECHARGE-ALL-BANKS command
+	 *  2. Issue eight CBR REFRESH commands
+	 *  3. Issue a MODE-SET command to initialize the mode register
+	 *
+	 *  The initial commands are executed by setting P/LSDMR[OP] and
+	 *  accessing the SDRAM with a single-byte transaction."
+	 *
+	 * The appropriate BRx/ORx registers have already been set when we
+	 * get here. The SDRAM can be accessed at the address CFG_SDRAM_BASE.
+	 */
+
+	*sdmr_ptr = sdmr | PSDMR_OP_PREA;
+	*base = c;
+
+	*sdmr_ptr = sdmr | PSDMR_OP_CBRR;
+	for (i = 0; i < 8; i++)
+		*base = c;
+
+	*sdmr_ptr = sdmr | PSDMR_OP_MRW;
+	*(base + CFG_MRS_OFFS) = c;	/* setting MR on address lines */
+
+	*sdmr_ptr = sdmr | PSDMR_OP_NORM | PSDMR_RFEN;
+	*base = c;
+
+	/*
+	 * Check memory range for valid RAM. A simple memory test determines
+	 * the actually available RAM size between addresses `base' and
+	 * `base + maxsize'. Some (not all) hardware errors are detected:
+	 * - short between address lines
+	 * - short between data lines
+	 */
+	i = 0;
+	for (cnt = maxsize / sizeof (long); cnt > 0; cnt >>= 1) {
+		addr = (volatile ulong *) base + cnt;	/* pointer arith! */
+		save[i++] = *addr;
+		*addr = ~cnt;
+	}
+
+	addr = (volatile ulong *) base;
+	save[i] = *addr;
+	*addr = 0;
+
+	if ((val = *addr) != 0) {
+		*addr = save[i];
+		return (0);
+	}
+
+	for (cnt = 1; cnt <= maxsize / sizeof (long); cnt <<= 1) {
+		addr = (volatile ulong *) base + cnt;	/* pointer arith! */
+		val = *addr;
+		*addr = save[--i];
+		if (val != ~cnt) {
+			/* Write the actual size to ORx
+			 */
+			*orx_ptr = orx | ~(cnt * sizeof (long) - 1);
+			return (cnt * sizeof (long));
+		}
+	}
+	return (maxsize);
+}
+
+long int initdram (int board_type)
+{
+	volatile immap_t *immap = (immap_t *) CFG_IMMR;
+	volatile memctl8260_t *memctl = &immap->im_memctl;
+
+#ifndef CFG_RAMBOOT
+	ulong size8, size9;
+#endif
+	long psize;
+
+	psize = 8 * 1024 * 1024;
+
+	memctl->memc_mptpr = CFG_MPTPR;
+	memctl->memc_psrt = CFG_PSRT;
+
+#ifndef CFG_RAMBOOT
+	/* 60x SDRAM setup:
+	 */
+	size8 = try_init (memctl, CFG_PSDMR_8COL, CFG_OR2_8COL,
+			  (uchar *) CFG_SDRAM_BASE);
+	size9 = try_init (memctl, CFG_PSDMR_9COL, CFG_OR2_9COL,
+			  (uchar *) CFG_SDRAM_BASE);
+
+	if (size8 < size9) {
+		psize = size9;
+		printf ("(60x:9COL) ");
+	} else {
+		psize = try_init (memctl, CFG_PSDMR_8COL, CFG_OR2_8COL,
+				  (uchar *) CFG_SDRAM_BASE);
+		printf ("(60x:8COL) ");
+	}
+
+#endif	/* CFG_RAMBOOT */
+
+	icache_enable ();
+
+	return (psize);
+}
+
+#if (CONFIG_COMMANDS & CFG_CMD_DOC)
+extern void doc_probe (ulong physadr);
+void doc_init (void)
+{
+	doc_probe (CFG_DOC_BASE);
+}
+#endif
+
+#ifdef	CONFIG_PCI
+struct pci_controller hose;
+
+extern void pci_mpc8250_init(struct pci_controller *);
+
+void pci_init_board(void)
+{
+	pci_mpc8250_init(&hose);
+}
+#endif

board/atc/config.mk

@@ -0,0 +1,43 @@
+#
+# (C) Copyright 2001
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+#
+# ATC boards
+#
+
+# This should be equal to the CFG_FLASH_BASE define in config_atc.h
+# for the "final" configuration, with U-Boot in flash, or the address
+# in RAM where U-Boot is loaded at for debugging.
+#
+
+ifeq ($(CONFIG_BOOT_ROM),y)
+	TEXT_BASE := 0xFF800000
+	PLATFORM_CPPFLAGS += -DCONFIG_BOOT_ROM
+else
+	TEXT_BASE := 0xFF000000
+endif
+
+# RAM version
+#TEXT_BASE := 0x100000
+
+PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)

board/atc/flash.c

@@ -0,0 +1,663 @@
+/*
+ * (C) Copyright 2003
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+
+flash_info_t	flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips	*/
+
+/* NOTE - CONFIG_FLASH_16BIT means the CPU interface is 16-bit, it
+ *        has nothing to do with the flash chip being 8-bit or 16-bit.
+ */
+#ifdef CONFIG_FLASH_16BIT
+typedef unsigned short FLASH_PORT_WIDTH;
+typedef volatile unsigned short FLASH_PORT_WIDTHV;
+#define	FLASH_ID_MASK	0xFFFF
+#else
+typedef unsigned long FLASH_PORT_WIDTH;
+typedef volatile unsigned long FLASH_PORT_WIDTHV;
+#define	FLASH_ID_MASK	0xFFFFFFFF
+#endif
+
+#define FPW	FLASH_PORT_WIDTH
+#define FPWV	FLASH_PORT_WIDTHV
+
+#define ORMASK(size) ((-size) & OR_AM_MSK)
+
+#define FLASH_CYCLE1	0x0555
+#define FLASH_CYCLE2	0x02aa
+
+/*-----------------------------------------------------------------------
+ * Functions
+ */
+static ulong flash_get_size(FPWV *addr, flash_info_t *info);
+static void flash_reset(flash_info_t *info);
+static int write_word_intel(flash_info_t *info, FPWV *dest, FPW data);
+static int write_word_amd(flash_info_t *info, FPWV *dest, FPW data);
+static void flash_get_offsets(ulong base, flash_info_t *info);
+static flash_info_t *flash_get_info(ulong base);
+
+/*-----------------------------------------------------------------------
+ * flash_init()
+ *
+ * sets up flash_info and returns size of FLASH (bytes)
+ */
+unsigned long flash_init (void)
+{
+	unsigned long size = 0;
+	int i;
+
+	/* Init: no FLASHes known */
+	for (i=0; i < CFG_MAX_FLASH_BANKS; ++i) {
+#if 0
+		ulong flashbase = (i == 0) ? PHYS_FLASH_1 : PHYS_FLASH_2;
+#else
+		ulong flashbase = CFG_FLASH_BASE;
+#endif
+
+		memset(&flash_info[i], 0, sizeof(flash_info_t));
+
+		flash_info[i].size = 
+			flash_get_size((FPW *)flashbase, &flash_info[i]);
+
+		if (flash_info[i].flash_id == FLASH_UNKNOWN) {
+			printf ("## Unknown FLASH on Bank %d - Size = 0x%08lx\n",
+			i, flash_info[i].size);
+		}
+		
+		size += flash_info[i].size;
+	}
+
+#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
+	/* monitor protection ON by default */
+	flash_protect(FLAG_PROTECT_SET,
+		      CFG_MONITOR_BASE,
+		      CFG_MONITOR_BASE+monitor_flash_len-1,
+		      flash_get_info(CFG_MONITOR_BASE));
+#endif
+
+#ifdef	CFG_ENV_IS_IN_FLASH
+	/* ENV protection ON by default */
+	flash_protect(FLAG_PROTECT_SET,
+		      CFG_ENV_ADDR,
+		      CFG_ENV_ADDR+CFG_ENV_SIZE-1,
+		      flash_get_info(CFG_ENV_ADDR));
+#endif
+
+
+	return size ? size : 1;
+}
+
+/*-----------------------------------------------------------------------
+ */
+static void flash_reset(flash_info_t *info)
+{
+	FPWV *base = (FPWV *)(info->start[0]);
+
+	/* Put FLASH back in read mode */
+	if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL)
+		*base = (FPW)0x00FF00FF;	/* Intel Read Mode */
+	else if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_AMD)
+		*base = (FPW)0x00F000F0;	/* AMD Read Mode */
+}
+
+/*-----------------------------------------------------------------------
+ */
+static void flash_get_offsets (ulong base, flash_info_t *info)
+{
+	int i;
+
+	/* set up sector start address table */
+	if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL
+	    && (info->flash_id & FLASH_BTYPE)) {
+		int bootsect_size;	/* number of bytes/boot sector	*/
+		int sect_size;		/* number of bytes/regular sector */
+
+		bootsect_size = 0x00002000 * (sizeof(FPW)/2);
+		sect_size =     0x00010000 * (sizeof(FPW)/2);
+
+		/* set sector offsets for bottom boot block type	*/
+		for (i = 0; i < 8; ++i) {
+			info->start[i] = base + (i * bootsect_size);
+		}
+		for (i = 8; i < info->sector_count; i++) {
+			info->start[i] = base + ((i - 7) * sect_size);
+		}
+	}
+	else if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_AMD
+		 && (info->flash_id & FLASH_TYPEMASK) == FLASH_AM640U) {
+
+		int sect_size;		/* number of bytes/sector */
+
+		sect_size = 0x00010000 * (sizeof(FPW)/2);
+
+		/* set up sector start address table (uniform sector type) */
+		for( i = 0; i < info->sector_count; i++ )
+			info->start[i] = base + (i * sect_size);
+	}
+}
+
+/*-----------------------------------------------------------------------
+ */
+
+static flash_info_t *flash_get_info(ulong base)
+{
+	int i;
+	flash_info_t * info;
+	
+	for (i = 0; i < CFG_MAX_FLASH_BANKS; i ++) {
+		info = & flash_info[i];
+		if (info->start[0] <= base && base < info->start[0] + info->size)
+			break;
+	}
+	
+	return i == CFG_MAX_FLASH_BANKS ? 0 : info;
+}
+
+/*-----------------------------------------------------------------------
+ */
+
+void flash_print_info (flash_info_t *info)
+{
+	int i;
+	uchar *boottype;
+	uchar *bootletter;
+	uchar *fmt;
+	uchar botbootletter[] = "B";
+	uchar topbootletter[] = "T";
+	uchar botboottype[] = "bottom boot sector";
+	uchar topboottype[] = "top boot sector";
+
+	if (info->flash_id == FLASH_UNKNOWN) {
+		printf ("missing or unknown FLASH type\n");
+		return;
+	}
+
+	switch (info->flash_id & FLASH_VENDMASK) {
+	case FLASH_MAN_AMD:	printf ("AMD ");		break;
+	case FLASH_MAN_BM:	printf ("BRIGHT MICRO ");	break;
+	case FLASH_MAN_FUJ:	printf ("FUJITSU ");		break;
+	case FLASH_MAN_SST:	printf ("SST ");		break;
+	case FLASH_MAN_STM:	printf ("STM ");		break;
+	case FLASH_MAN_INTEL:	printf ("INTEL ");		break;
+	default:		printf ("Unknown Vendor ");	break;
+	}
+
+	/* check for top or bottom boot, if it applies */
+	if (info->flash_id & FLASH_BTYPE) {
+		boottype = botboottype;
+		bootletter = botbootletter;
+	}
+	else {
+		boottype = topboottype;
+		bootletter = topbootletter;
+	}
+
+	switch (info->flash_id & FLASH_TYPEMASK) {
+	case FLASH_AM640U:
+		fmt = "29LV641D (64 Mbit, uniform sectors)\n";
+		break;
+        case FLASH_28F800C3B:
+        case FLASH_28F800C3T:
+		fmt = "28F800C3%s (8 Mbit, %s)\n";
+		break;
+	case FLASH_INTEL800B:
+	case FLASH_INTEL800T:
+		fmt = "28F800B3%s (8 Mbit, %s)\n";
+		break;
+        case FLASH_28F160C3B:
+        case FLASH_28F160C3T:
+		fmt = "28F160C3%s (16 Mbit, %s)\n";
+		break;
+	case FLASH_INTEL160B:
+	case FLASH_INTEL160T:
+		fmt = "28F160B3%s (16 Mbit, %s)\n";
+		break;
+        case FLASH_28F320C3B:
+        case FLASH_28F320C3T:
+		fmt = "28F320C3%s (32 Mbit, %s)\n";
+		break;
+	case FLASH_INTEL320B:
+	case FLASH_INTEL320T:
+		fmt = "28F320B3%s (32 Mbit, %s)\n";
+		break;
+        case FLASH_28F640C3B:
+        case FLASH_28F640C3T:
+		fmt = "28F640C3%s (64 Mbit, %s)\n";
+		break;
+	case FLASH_INTEL640B:
+	case FLASH_INTEL640T:
+		fmt = "28F640B3%s (64 Mbit, %s)\n";
+		break;
+	default:
+		fmt = "Unknown Chip Type\n";
+		break;
+	}
+
+	printf (fmt, bootletter, boottype);
+
+	printf ("  Size: %ld MB in %d Sectors\n",
+		info->size >> 20,
+		info->sector_count);
+
+	printf ("  Sector Start Addresses:");
+
+	for (i=0; i<info->sector_count; ++i) {
+		if ((i % 5) == 0) {
+			printf ("\n   ");
+		}
+
+		printf (" %08lX%s", info->start[i],
+			info->protect[i] ? " (RO)" : "     ");
+	}
+
+	printf ("\n");
+}
+
+/*-----------------------------------------------------------------------
+ */
+
+/*
+ * The following code cannot be run from FLASH!
+ */
+
+ulong flash_get_size (FPWV *addr, flash_info_t *info)
+{
+	/* Write auto select command: read Manufacturer ID */
+
+	/* Write auto select command sequence and test FLASH answer */
+	addr[FLASH_CYCLE1] = (FPW)0x00AA00AA;	/* for AMD, Intel ignores this */
+	addr[FLASH_CYCLE2] = (FPW)0x00550055;	/* for AMD, Intel ignores this */
+	addr[FLASH_CYCLE1] = (FPW)0x00900090;	/* selects Intel or AMD */
+
+	/* The manufacturer codes are only 1 byte, so just use 1 byte.
+	 * This works for any bus width and any FLASH device width.
+	 */
+	udelay(100);
+	switch (addr[0] & 0xff) {
+
+	case (uchar)AMD_MANUFACT:
+		info->flash_id = FLASH_MAN_AMD;
+		break;
+
+	case (uchar)INTEL_MANUFACT:
+		info->flash_id = FLASH_MAN_INTEL;
+		break;
+
+	default:
+		info->flash_id = FLASH_UNKNOWN;
+		info->sector_count = 0;
+		info->size = 0;
+		break;
+	}
+
+	/* Check 16 bits or 32 bits of ID so work on 32 or 16 bit bus. */
+	if (info->flash_id != FLASH_UNKNOWN) switch (addr[1]) {
+
+	case (FPW)AMD_ID_LV640U:	/* 29LV640 and 29LV641 have same ID */
+		info->flash_id += FLASH_AM640U;
+		info->sector_count = 128;
+		info->size = 0x00800000 * (sizeof(FPW)/2);
+		break;				/* => 8 or 16 MB	*/
+
+	case (FPW)INTEL_ID_28F800C3B:
+		info->flash_id += FLASH_28F800C3B;
+		info->sector_count = 23;
+		info->size = 0x00100000 * (sizeof(FPW)/2);
+		break;				/* => 1 or 2 MB		*/
+
+	case (FPW)INTEL_ID_28F800B3B:
+		info->flash_id += FLASH_INTEL800B;
+		info->sector_count = 23;
+		info->size = 0x00100000 * (sizeof(FPW)/2);
+		break;				/* => 1 or 2 MB		*/
+
+	case (FPW)INTEL_ID_28F160C3B:
+		info->flash_id += FLASH_28F160C3B;
+		info->sector_count = 39;
+		info->size = 0x00200000 * (sizeof(FPW)/2);
+		break;				/* => 2 or 4 MB		*/
+
+	case (FPW)INTEL_ID_28F160B3B:
+		info->flash_id += FLASH_INTEL160B;
+		info->sector_count = 39;
+		info->size = 0x00200000 * (sizeof(FPW)/2);
+		break;				/* => 2 or 4 MB		*/
+
+	case (FPW)INTEL_ID_28F320C3B:
+		info->flash_id += FLASH_28F320C3B;
+		info->sector_count = 71;
+		info->size = 0x00400000 * (sizeof(FPW)/2);
+		break;				/* => 4 or 8 MB		*/
+
+	case (FPW)INTEL_ID_28F320B3B:
+		info->flash_id += FLASH_INTEL320B;
+		info->sector_count = 71;
+		info->size = 0x00400000 * (sizeof(FPW)/2);
+		break;				/* => 4 or 8 MB		*/
+
+	case (FPW)INTEL_ID_28F640C3B:
+		info->flash_id += FLASH_28F640C3B;
+		info->sector_count = 135;
+		info->size = 0x00800000 * (sizeof(FPW)/2);
+		break;				/* => 8 or 16 MB	*/
+
+	case (FPW)INTEL_ID_28F640B3B:
+		info->flash_id += FLASH_INTEL640B;
+		info->sector_count = 135;
+		info->size = 0x00800000 * (sizeof(FPW)/2);
+		break;				/* => 8 or 16 MB	*/
+
+	default:
+		info->flash_id = FLASH_UNKNOWN;
+		info->sector_count = 0;
+		info->size = 0;
+		return (0);			/* => no or unknown flash */
+	}
+
+	flash_get_offsets((ulong)addr, info);
+
+	/* Put FLASH back in read mode */
+	flash_reset(info);
+
+	return (info->size);
+}
+
+/*-----------------------------------------------------------------------
+ */
+
+int	flash_erase (flash_info_t *info, int s_first, int s_last)
+{
+	FPWV *addr;
+	int flag, prot, sect;
+	int intel = (info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL;
+	ulong start, now, last;
+	int rcode = 0;
+
+	if ((s_first < 0) || (s_first > s_last)) {
+		if (info->flash_id == FLASH_UNKNOWN) {
+			printf ("- missing\n");
+		} else {
+			printf ("- no sectors to erase\n");
+		}
+		return 1;
+	}
+
+	switch (info->flash_id & FLASH_TYPEMASK) {
+	case FLASH_INTEL800B:
+	case FLASH_INTEL160B:
+	case FLASH_INTEL320B:
+	case FLASH_INTEL640B:
+	case FLASH_28F800C3B:
+	case FLASH_28F160C3B:
+	case FLASH_28F320C3B:
+	case FLASH_28F640C3B:
+	case FLASH_AM640U:
+		break;
+	case FLASH_UNKNOWN:
+	default:
+		printf ("Can't erase unknown flash type %08lx - aborted\n",
+			info->flash_id);
+		return 1;
+	}
+
+	prot = 0;
+	for (sect=s_first; sect<=s_last; ++sect) {
+		if (info->protect[sect]) {
+			prot++;
+		}
+	}
+
+	if (prot) {
+		printf ("- Warning: %d protected sectors will not be erased!\n",
+			prot);
+	} else {
+		printf ("\n");
+	}
+
+	last  = get_timer(0);
+
+	/* Start erase on unprotected sectors */
+	for (sect = s_first; sect<=s_last && rcode == 0; sect++) {
+
+		if (info->protect[sect] != 0)	/* protected, skip it */
+			continue;
+
+		/* Disable interrupts which might cause a timeout here */
+		flag = disable_interrupts();
+
+		addr = (FPWV *)(info->start[sect]);
+		if (intel) {
+			*addr = (FPW)0x00500050; /* clear status register */
+			*addr = (FPW)0x00200020; /* erase setup */
+			*addr = (FPW)0x00D000D0; /* erase confirm */
+		}
+		else {
+			/* must be AMD style if not Intel */
+			FPWV *base;		/* first address in bank */
+
+			base = (FPWV *)(info->start[0]);
+			base[FLASH_CYCLE1] = (FPW)0x00AA00AA;	/* unlock */
+			base[FLASH_CYCLE2] = (FPW)0x00550055;	/* unlock */
+			base[FLASH_CYCLE1] = (FPW)0x00800080;	/* erase mode */
+			base[FLASH_CYCLE1] = (FPW)0x00AA00AA;	/* unlock */
+			base[FLASH_CYCLE2] = (FPW)0x00550055;	/* unlock */
+			*addr = (FPW)0x00300030;	/* erase sector */
+		}
+
+		/* re-enable interrupts if necessary */
+		if (flag)
+			enable_interrupts();
+
+		start = get_timer(0);
+
+		/* wait at least 50us for AMD, 80us for Intel.
+		 * Let's wait 1 ms.
+		 */
+		udelay (1000);
+
+		while ((*addr & (FPW)0x00800080) != (FPW)0x00800080) {
+			if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
+				printf ("Timeout\n");
+
+				if (intel) {
+					/* suspend erase	*/
+					*addr = (FPW)0x00B000B0;
+				}
+
+				flash_reset(info);	/* reset to read mode */
+				rcode = 1;		/* failed */
+				break;
+			}
+
+			/* show that we're waiting */
+			if ((get_timer(last)) > CFG_HZ) {/* every second */
+				putc ('.');
+				last = get_timer(0);
+			}
+		}
+
+		/* show that we're waiting */
+		if ((get_timer(last)) > CFG_HZ) {	/* every second */
+			putc ('.');
+			last = get_timer(0);
+		}
+
+		flash_reset(info);	/* reset to read mode	*/
+	}
+
+	printf (" done\n");
+	return rcode;
+}
+
+/*-----------------------------------------------------------------------
+ * Copy memory to flash, returns:
+ * 0 - OK
+ * 1 - write timeout
+ * 2 - Flash not erased
+ */
+int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
+{
+	FPW data = 0; /* 16 or 32 bit word, matches flash bus width on MPC8XX */
+	int bytes;	  /* number of bytes to program in current word		*/
+	int left;	  /* number of bytes left to program			*/
+	int i, res;
+
+	for (left = cnt, res = 0;
+		 left > 0 && res == 0;
+		 addr += sizeof(data), left -= sizeof(data) - bytes) {
+
+		bytes = addr & (sizeof(data) - 1);
+		addr &= ~(sizeof(data) - 1);
+
+		/* combine source and destination data so can program
+		 * an entire word of 16 or 32 bits
+		 */
+		for (i = 0; i < sizeof(data); i++) {
+			data <<= 8;
+			if (i < bytes || i - bytes >= left )
+				data += *((uchar *)addr + i);
+			else
+				data += *src++;
+		}
+
+		/* write one word to the flash */
+		switch (info->flash_id & FLASH_VENDMASK) {
+		case FLASH_MAN_AMD:
+			res = write_word_amd(info, (FPWV *)addr, data);
+			break;
+		case FLASH_MAN_INTEL:
+			res = write_word_intel(info, (FPWV *)addr, data);
+			break;
+		default:
+			/* unknown flash type, error! */
+			printf ("missing or unknown FLASH type\n");
+			res = 1;	/* not really a timeout, but gives error */
+			break;
+		}
+	}
+
+	return (res);
+}
+
+/*-----------------------------------------------------------------------
+ * Write a word to Flash for AMD FLASH
+ * A word is 16 or 32 bits, whichever the bus width of the flash bank
+ * (not an individual chip) is.
+ *
+ * returns:
+ * 0 - OK
+ * 1 - write timeout
+ * 2 - Flash not erased
+ */
+static int write_word_amd (flash_info_t *info, FPWV *dest, FPW data)
+{
+	ulong start;
+	int flag;
+	int res = 0;	/* result, assume success	*/
+	FPWV *base;		/* first address in flash bank	*/
+
+	/* Check if Flash is (sufficiently) erased */
+	if ((*dest & data) != data) {
+		return (2);
+	}
+
+
+	base = (FPWV *)(info->start[0]);
+
+	/* Disable interrupts which might cause a timeout here */
+	flag = disable_interrupts();
+
+	base[FLASH_CYCLE1] = (FPW)0x00AA00AA;	/* unlock */
+	base[FLASH_CYCLE2] = (FPW)0x00550055;	/* unlock */
+	base[FLASH_CYCLE1] = (FPW)0x00A000A0;	/* selects program mode */
+
+	*dest = data;		/* start programming the data	*/
+
+	/* re-enable interrupts if necessary */
+	if (flag)
+		enable_interrupts();
+
+	start = get_timer (0);
+
+	/* data polling for D7 */
+	while (res == 0 && (*dest & (FPW)0x00800080) != (data & (FPW)0x00800080)) {
+		if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
+			*dest = (FPW)0x00F000F0;	/* reset bank */
+			res = 1;
+		}
+	}
+
+	return (res);
+}
+
+/*-----------------------------------------------------------------------
+ * Write a word to Flash for Intel FLASH
+ * A word is 16 or 32 bits, whichever the bus width of the flash bank
+ * (not an individual chip) is.
+ *
+ * returns:
+ * 0 - OK
+ * 1 - write timeout
+ * 2 - Flash not erased
+ */
+static int write_word_intel (flash_info_t *info, FPWV *dest, FPW data)
+{
+	ulong start;
+	int flag;
+	int res = 0;	/* result, assume success	*/
+
+	/* Check if Flash is (sufficiently) erased */
+	if ((*dest & data) != data) {
+		return (2);
+	}
+
+	/* Disable interrupts which might cause a timeout here */
+	flag = disable_interrupts();
+
+	*dest = (FPW)0x00500050;	/* clear status register	*/
+	*dest = (FPW)0x00FF00FF;	/* make sure in read mode	*/
+	*dest = (FPW)0x00400040;	/* program setup		*/
+
+	*dest = data;		/* start programming the data	*/
+
+	/* re-enable interrupts if necessary */
+	if (flag)
+		enable_interrupts();
+
+	start = get_timer (0);
+
+	while (res == 0 && (*dest & (FPW)0x00800080) != (FPW)0x00800080) {
+		if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
+			*dest = (FPW)0x00B000B0;	/* Suspend program	*/
+			res = 1;
+		}
+	}
+
+	if (res == 0 && (*dest & (FPW)0x00100010))
+		res = 1;	/* write failed, time out error is close enough	*/
+
+	*dest = (FPW)0x00500050;	/* clear status register	*/
+	*dest = (FPW)0x00FF00FF;	/* make sure in read mode	*/
+
+	return (res);
+}

board/atc/u-boot.lds

@@ -0,0 +1,118 @@
+/*
+ * (C) Copyright 2001
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_ARCH(powerpc)
+SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
+/* Do we need any of these for elf?
+   __DYNAMIC = 0;    */
+SECTIONS
+{
+  /* Read-only sections, merged into text segment: */
+  . = + SIZEOF_HEADERS;
+  .interp : { *(.interp) }
+  .hash          : { *(.hash)		}
+  .dynsym        : { *(.dynsym)		}
+  .dynstr        : { *(.dynstr)		}
+  .rel.text      : { *(.rel.text)		}
+  .rela.text     : { *(.rela.text) 	}
+  .rel.data      : { *(.rel.data)		}
+  .rela.data     : { *(.rela.data) 	}
+  .rel.rodata    : { *(.rel.rodata) 	}
+  .rela.rodata   : { *(.rela.rodata) 	}
+  .rel.got       : { *(.rel.got)		}
+  .rela.got      : { *(.rela.got)		}
+  .rel.ctors     : { *(.rel.ctors)	}
+  .rela.ctors    : { *(.rela.ctors)	}
+  .rel.dtors     : { *(.rel.dtors)	}
+  .rela.dtors    : { *(.rela.dtors)	}
+  .rel.bss       : { *(.rel.bss)		}
+  .rela.bss      : { *(.rela.bss)		}
+  .rel.plt       : { *(.rel.plt)		}
+  .rela.plt      : { *(.rela.plt)		}
+  .init          : { *(.init)	}
+  .plt : { *(.plt) }
+  .text      :
+  {
+    cpu/mpc8260/start.o	(.text)
+    *(.text)
+    common/environment.o(.text)
+    *(.fixup)
+    *(.got1)
+    . = ALIGN(16);
+    *(.rodata)
+    *(.rodata1)
+  }
+  .fini      : { *(.fini)    } =0
+  .ctors     : { *(.ctors)   }
+  .dtors     : { *(.dtors)   }
+
+  /* Read-write section, merged into data segment: */
+  . = (. + 0x0FFF) & 0xFFFFF000;
+  _erotext = .;
+  PROVIDE (erotext = .);
+  .reloc   :
+  {
+    *(.got)
+    _GOT2_TABLE_ = .;
+    *(.got2)
+    _FIXUP_TABLE_ = .;
+    *(.fixup)
+  }
+  __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
+  __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
+
+  .data    :
+  {
+    *(.data)
+    *(.data1)
+    *(.sdata)
+    *(.sdata2)
+    *(.dynamic)
+    CONSTRUCTORS
+  }
+  _edata  =  .;
+  PROVIDE (edata = .);
+
+  __start___ex_table = .;
+  __ex_table : { *(__ex_table) }
+  __stop___ex_table = .;
+
+  . = ALIGN(4096);
+  __init_begin = .;
+  .text.init : { *(.text.init) }
+  .data.init : { *(.data.init) }
+  . = ALIGN(4096);
+  __init_end = .;
+
+  __bss_start = .;
+  .bss       :
+  {
+   *(.sbss) *(.scommon)
+   *(.dynbss)
+   *(.bss)
+   *(COMMON)
+  }
+  _end = . ;
+  PROVIDE (end = .);
+}
+

board/bmw/flash.c

@@ -219,7 +219,7 @@ flash_init(void)
 #if CFG_MONITOR_BASE >= CFG_FLASH_BASE
     flash_protect(FLAG_PROTECT_SET,
 		CFG_MONITOR_BASE,
-		CFG_MONITOR_BASE + CFG_MONITOR_LEN - 1,
+		CFG_MONITOR_BASE + monitor_flash_len - 1,
 		&flash_info[0]);
 #endif
 

board/bubinga405ep/Makefile

@@ -0,0 +1,47 @@
+#
+# (C) Copyright 2000
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB	= lib$(BOARD).a
+
+OBJS	= $(BOARD).o flash.o
+SOBJS	= init.o
+
+$(LIB):	$(OBJS) $(SOBJS)
+	$(AR) crv $@ $^
+
+clean:
+	rm -f $(SOBJS) $(OBJS)
+
+distclean:	clean
+	rm -f $(LIB) core *.bak .depend
+
+#########################################################################
+
+.depend:	Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
+		$(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
+
+sinclude .depend
+
+#########################################################################

board/bubinga405ep/bubinga405ep.c

@@ -0,0 +1,126 @@
+/*
+ * (C) Copyright 2000
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+long int spd_sdram (void);
+
+#include <common.h>
+#include "bubinga405ep.h"
+#include <asm/processor.h>
+
+
+int board_pre_init (void)
+{
+	mtdcr (uicsr, 0xFFFFFFFF);      /* clear all ints */
+	mtdcr (uicer, 0x00000000);      /* disable all ints */
+	mtdcr (uiccr, 0x00000010);
+	mtdcr (uicpr, 0xFFFF7FF0);      /* set int polarities */
+	mtdcr (uictr, 0x00000010);      /* set int trigger levels */
+	mtdcr (uicsr, 0xFFFFFFFF);      /* clear all ints */
+
+#if 0
+#define mtebc(reg, data)  mtdcr(ebccfga,reg);mtdcr(ebccfgd,data)
+    /* CS1 */
+	/* BAS=0xF00,BS=0x0(1MB),BU=0x3(R/W),BW=0x0( 8 bits) */
+	mtebc (pb1ap, 0x02815480);
+	mtebc (pb1cr, 0xF0018000);
+
+	p = (unsigned int*)0xEF600708;
+	t = *p;
+	t = t | 0x00000400;
+	*p = t;
+
+	/* BAS=0xF01,BS=0x0(1MB),BU=0x3(R/W),BW=0x0(8 bits) */
+	mtebc (pb2ap, 0x04815A80);
+	mtebc (pb2cr, 0xF0118000);
+
+	/* BAS=0xF02,BS=0x0(1MB),BU=0x3(R/W),BW=0x0( 8 bits) */
+	mtebc (pb3ap, 0x01815280);
+	mtebc (pb3cr, 0xF0218000);
+
+	/* BAS=0xF03,BS=0x0(1MB),BU=0x3(R/W),BW=0x0(8 bits) */
+	mtebc (pb7ap, 0x01815280);
+	mtebc (pb7cr, 0xF0318000);
+
+
+	/* set UART1 control to select CTS/RTS */
+#define FPGA_BRDC       0xF0300004
+	*(volatile char *) (FPGA_BRDC) |= 0x1;
+
+#endif
+
+	return 0;
+}
+
+
+/* ------------------------------------------------------------------------- */
+
+/*
+ * Check Board Identity:
+ */
+
+int checkboard (void)
+{
+	unsigned char *s = getenv ("serial#");
+	unsigned char *e;
+
+	puts ("Board: ");
+
+	if (!s || strncmp (s, "BUBINGA405EP", 9)) {
+		puts ("### No HW ID - assuming WALNUT405");
+	} else {
+		for (e = s; *e; ++e) {
+			if (*e == ' ')
+				break;
+		}
+		for (; s < e; ++s) {
+			putc (*s);
+		}
+	}
+	putc ('\n');
+
+	return (0);
+}
+
+
+/* -------------------------------------------------------------------------
+  initdram(int board_type) reads EEPROM via I2c. EEPROM contains all of
+  the necessary info for SDRAM controller configuration
+   ------------------------------------------------------------------------- */
+long int initdram (int board_type)
+{
+	long int ret;
+
+	ret = spd_sdram ();
+	return ret;
+}
+
+/* ------------------------------------------------------------------------- */
+
+int testdram (void)
+{
+	/* TODO: XXX XXX XXX */
+	printf ("test: xxx MB - ok\n");
+
+	return (0);
+}
+
+/* ------------------------------------------------------------------------- */

board/bubinga405ep/bubinga405ep.h

@@ -0,0 +1,44 @@
+/*
+ * (C) Copyright 2000
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/****************************************************************************
+ * FLASH Memory Map as used by TQ Monitor:
+ *
+ *                          Start Address    Length
+ * +-----------------------+ 0x4000_0000     Start of Flash -----------------
+ * | MON8xx code           | 0x4000_0100     Reset Vector
+ * +-----------------------+ 0x400?_????
+ * | (unused)              |
+ * +-----------------------+ 0x4001_FF00
+ * | Ethernet Addresses    |                 0x78
+ * +-----------------------+ 0x4001_FF78
+ * | (Reserved for MON8xx) |                 0x44
+ * +-----------------------+ 0x4001_FFBC
+ * | Lock Address          |                 0x04
+ * +-----------------------+ 0x4001_FFC0                     ^
+ * | Hardware Information  |                 0x40            | MON8xx
+ * +=======================+ 0x4002_0000 (sector border)    -----------------
+ * | Autostart Header      |                                 | Applications
+ * | ...                   |                                 v
+ *
+ *****************************************************************************/

board/bubinga405ep/config.mk

@@ -0,0 +1,29 @@
+#
+# (C) Copyright 2000
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+#
+# esd ADCIOP boards
+#
+
+#TEXT_BASE = 0xFFFE0000
+TEXT_BASE = 0xFFF80000

board/bubinga405ep/flash.c

@@ -0,0 +1,737 @@
+/*
+ * (C) Copyright 2000
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*
+ * Modified 4/5/2001
+ * Wait for completion of each sector erase command issued
+ * 4/5/2001
+ * Chris Hallinan - DS4.COM, Inc. - clh@net1plus.com
+ */
+
+#include <common.h>
+#include <ppc4xx.h>
+#include <asm/processor.h>
+
+flash_info_t	flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips	*/
+
+/*-----------------------------------------------------------------------
+ * Functions
+ */
+static ulong flash_get_size (vu_long *addr, flash_info_t *info);
+static int write_word (flash_info_t *info, ulong dest, ulong data);
+static void flash_get_offsets (ulong base, flash_info_t *info);
+
+#ifdef CONFIG_ADCIOP
+#define ADDR0           0x0aa9
+#define ADDR1           0x0556
+#define FLASH_WORD_SIZE unsigned char
+#endif
+
+#ifdef CONFIG_CPCI405
+#define ADDR0           0x5555
+#define ADDR1           0x2aaa
+#define FLASH_WORD_SIZE unsigned short
+#endif
+
+#ifdef CONFIG_WALNUT405
+#define ADDR0           0x5555
+#define ADDR1           0x2aaa
+#define FLASH_WORD_SIZE unsigned char
+#endif
+
+#ifdef CONFIG_BUBINGA405EP
+#define ADDR0           0x5555
+#define ADDR1           0x2aaa
+#define FLASH_WORD_SIZE unsigned char
+#endif
+
+
+/*-----------------------------------------------------------------------
+ */
+
+unsigned long flash_init (void)
+{
+	unsigned long size_b0, size_b1;
+	int i;
+        uint pbcr;
+        unsigned long base_b0, base_b1;
+
+	/* Init: no FLASHes known */
+	for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
+		flash_info[i].flash_id = FLASH_UNKNOWN;
+	}
+
+	/* Static FLASH Bank configuration here - FIXME XXX */
+
+	size_b0 = flash_get_size((vu_long *)FLASH_BASE0_PRELIM, &flash_info[0]);
+
+	if (flash_info[0].flash_id == FLASH_UNKNOWN) {
+		printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
+			size_b0, size_b0<<20);
+	}
+
+	/* Only one bank */
+	if (CFG_MAX_FLASH_BANKS == 1)
+	  {
+	    /* Setup offsets */
+	    flash_get_offsets (FLASH_BASE0_PRELIM, &flash_info[0]);
+
+	    /* Monitor protection ON by default */
+	    (void)flash_protect(FLAG_PROTECT_SET,
+				FLASH_BASE0_PRELIM,
+				FLASH_BASE0_PRELIM+CFG_MONITOR_LEN-1,
+				&flash_info[0]);
+	    size_b1 = 0 ;
+	    flash_info[0].size = size_b0;
+	  }
+
+	/* 2 banks */
+	else
+	  {
+	    size_b1 = flash_get_size((vu_long *)FLASH_BASE1_PRELIM, &flash_info[1]);
+
+	    /* Re-do sizing to get full correct info */
+
+	    if (size_b1)
+	      {
+		mtdcr(ebccfga, pb0cr);
+		pbcr = mfdcr(ebccfgd);
+		mtdcr(ebccfga, pb0cr);
+		base_b1 = -size_b1;
+		pbcr = (pbcr & 0x0001ffff) | base_b1 | (((size_b1/1024/1024)-1)<<17);
+		mtdcr(ebccfgd, pbcr);
+		/*          printf("pb1cr = %x\n", pbcr); */
+	      }
+
+	    if (size_b0)
+	      {
+		mtdcr(ebccfga, pb1cr);
+		pbcr = mfdcr(ebccfgd);
+		mtdcr(ebccfga, pb1cr);
+		base_b0 = base_b1 - size_b0;
+		pbcr = (pbcr & 0x0001ffff) | base_b0 | (((size_b0/1024/1024)-1)<<17);
+		mtdcr(ebccfgd, pbcr);
+		/*            printf("pb0cr = %x\n", pbcr); */
+	      }
+
+	    size_b0 = flash_get_size((vu_long *)base_b0, &flash_info[0]);
+
+	    flash_get_offsets (base_b0, &flash_info[0]);
+
+	    /* monitor protection ON by default */
+	    (void)flash_protect(FLAG_PROTECT_SET,
+				base_b0+size_b0-CFG_MONITOR_LEN,
+				base_b0+size_b0-1,
+				&flash_info[0]);
+
+	    if (size_b1) {
+	      /* Re-do sizing to get full correct info */
+	      size_b1 = flash_get_size((vu_long *)base_b1, &flash_info[1]);
+
+	      flash_get_offsets (base_b1, &flash_info[1]);
+
+	      /* monitor protection ON by default */
+	      (void)flash_protect(FLAG_PROTECT_SET,
+				  base_b1+size_b1-CFG_MONITOR_LEN,
+				  base_b1+size_b1-1,
+				  &flash_info[1]);
+	      /* monitor protection OFF by default (one is enough) */
+	      (void)flash_protect(FLAG_PROTECT_CLEAR,
+				  base_b0+size_b0-CFG_MONITOR_LEN,
+				  base_b0+size_b0-1,
+				  &flash_info[0]);
+	    } else {
+	      flash_info[1].flash_id = FLASH_UNKNOWN;
+	      flash_info[1].sector_count = -1;
+	    }
+
+	    flash_info[0].size = size_b0;
+	    flash_info[1].size = size_b1;
+	  }/* else 2 banks */
+	return (size_b0 + size_b1);
+}
+
+
+
+/*-----------------------------------------------------------------------
+ */
+static void flash_get_offsets (ulong base, flash_info_t *info)
+{
+	int i;
+
+	/* set up sector start address table */
+        if (((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) ||
+	    (info->flash_id  == FLASH_AM040)){
+	    for (i = 0; i < info->sector_count; i++)
+		info->start[i] = base + (i * 0x00010000);
+        } else {
+	    if (info->flash_id & FLASH_BTYPE) {
+		/* set sector offsets for bottom boot block type	*/
+		info->start[0] = base + 0x00000000;
+		info->start[1] = base + 0x00004000;
+		info->start[2] = base + 0x00006000;
+		info->start[3] = base + 0x00008000;
+		for (i = 4; i < info->sector_count; i++) {
+			info->start[i] = base + (i * 0x00010000) - 0x00030000;
+		}
+	    } else {
+		/* set sector offsets for top boot block type		*/
+		i = info->sector_count - 1;
+		info->start[i--] = base + info->size - 0x00004000;
+		info->start[i--] = base + info->size - 0x00006000;
+		info->start[i--] = base + info->size - 0x00008000;
+		for (; i >= 0; i--) {
+			info->start[i] = base + i * 0x00010000;
+		}
+	    }
+	}
+}
+
+/*-----------------------------------------------------------------------
+ */
+void flash_print_info  (flash_info_t *info)
+{
+	int i;
+        int k;
+        int size;
+        int erased;
+        volatile unsigned long *flash;
+
+	if (info->flash_id == FLASH_UNKNOWN) {
+		printf ("missing or unknown FLASH type\n");
+		return;
+	}
+
+	switch (info->flash_id & FLASH_VENDMASK) {
+	case FLASH_MAN_AMD:	printf ("AMD ");		break;
+	case FLASH_MAN_FUJ:	printf ("FUJITSU ");		break;
+	case FLASH_MAN_SST:	printf ("SST ");		break;
+	default:		printf ("Unknown Vendor ");	break;
+	}
+
+	switch (info->flash_id & FLASH_TYPEMASK) {
+	case FLASH_AM040:	printf ("AM29F040 (512 Kbit, uniform sector size)\n");
+				break;
+	case FLASH_AM400B:	printf ("AM29LV400B (4 Mbit, bottom boot sect)\n");
+				break;
+	case FLASH_AM400T:	printf ("AM29LV400T (4 Mbit, top boot sector)\n");
+				break;
+	case FLASH_AM800B:	printf ("AM29LV800B (8 Mbit, bottom boot sect)\n");
+				break;
+	case FLASH_AM800T:	printf ("AM29LV800T (8 Mbit, top boot sector)\n");
+				break;
+	case FLASH_AM160B:	printf ("AM29LV160B (16 Mbit, bottom boot sect)\n");
+				break;
+	case FLASH_AM160T:	printf ("AM29LV160T (16 Mbit, top boot sector)\n");
+				break;
+	case FLASH_AM320B:	printf ("AM29LV320B (32 Mbit, bottom boot sect)\n");
+				break;
+	case FLASH_AM320T:	printf ("AM29LV320T (32 Mbit, top boot sector)\n");
+				break;
+	case FLASH_SST800A:	printf ("SST39LF/VF800 (8 Mbit, uniform sector size)\n");
+				break;
+	case FLASH_SST160A:	printf ("SST39LF/VF160 (16 Mbit, uniform sector size)\n");
+				break;
+	default:		printf ("Unknown Chip Type\n");
+				break;
+	}
+
+	printf ("  Size: %ld KB in %d Sectors\n",
+		info->size >> 10, info->sector_count);
+
+	printf ("  Sector Start Addresses:");
+	for (i=0; i<info->sector_count; ++i) {
+                /*
+                 * Check if whole sector is erased
+                 */
+                if (i != (info->sector_count-1))
+                  size = info->start[i+1] - info->start[i];
+                else
+                  size = info->start[0] + info->size - info->start[i];
+                erased = 1;
+                flash = (volatile unsigned long *)info->start[i];
+                size = size >> 2;        /* divide by 4 for longword access */
+                for (k=0; k<size; k++)
+                  {
+                    if (*flash++ != 0xffffffff)
+                      {
+                        erased = 0;
+                        break;
+                      }
+                  }
+
+		if ((i % 5) == 0)
+			printf ("\n   ");
+#if 0 /* test-only */
+		printf (" %08lX%s",
+			info->start[i],
+			info->protect[i] ? " (RO)" : "     "
+#else
+		printf (" %08lX%s%s",
+			info->start[i],
+			erased ? " E" : "  ",
+			info->protect[i] ? "RO " : "   "
+#endif
+		);
+	}
+	printf ("\n");
+	return;
+}
+
+/*-----------------------------------------------------------------------
+ */
+
+
+/*-----------------------------------------------------------------------
+ */
+
+/*
+ * The following code cannot be run from FLASH!
+ */
+static ulong flash_get_size (vu_long *addr, flash_info_t *info)
+{
+	short i;
+	FLASH_WORD_SIZE value;
+	ulong base = (ulong)addr;
+        volatile FLASH_WORD_SIZE *addr2 = (FLASH_WORD_SIZE *)addr;
+
+	/* Write auto select command: read Manufacturer ID */
+	addr2[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
+	addr2[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
+	addr2[ADDR0] = (FLASH_WORD_SIZE)0x00900090;
+
+#ifdef CONFIG_ADCIOP
+	value = addr2[2];
+#else
+	value = addr2[0];
+#endif
+
+	switch (value) {
+	case (FLASH_WORD_SIZE)AMD_MANUFACT:
+		info->flash_id = FLASH_MAN_AMD;
+		break;
+	case (FLASH_WORD_SIZE)FUJ_MANUFACT:
+		info->flash_id = FLASH_MAN_FUJ;
+		break;
+	case (FLASH_WORD_SIZE)SST_MANUFACT:
+		info->flash_id = FLASH_MAN_SST;
+		break;
+	default:
+		info->flash_id = FLASH_UNKNOWN;
+		info->sector_count = 0;
+		info->size = 0;
+		return (0);			/* no or unknown flash	*/
+	}
+
+#ifdef CONFIG_ADCIOP
+	value = addr2[0];			/* device ID		*/
+        /*        printf("\ndev_code=%x\n", value); */
+#else
+	value = addr2[1];			/* device ID		*/
+#endif
+
+	switch (value) {
+	case (FLASH_WORD_SIZE)AMD_ID_F040B:
+	        info->flash_id += FLASH_AM040;
+		info->sector_count = 8;
+		info->size = 0x0080000; /* => 512 ko */
+		break;
+	case (FLASH_WORD_SIZE)AMD_ID_LV400T:
+		info->flash_id += FLASH_AM400T;
+		info->sector_count = 11;
+		info->size = 0x00080000;
+		break;				/* => 0.5 MB		*/
+
+	case (FLASH_WORD_SIZE)AMD_ID_LV400B:
+		info->flash_id += FLASH_AM400B;
+		info->sector_count = 11;
+		info->size = 0x00080000;
+		break;				/* => 0.5 MB		*/
+
+	case (FLASH_WORD_SIZE)AMD_ID_LV800T:
+		info->flash_id += FLASH_AM800T;
+		info->sector_count = 19;
+		info->size = 0x00100000;
+		break;				/* => 1 MB		*/
+
+	case (FLASH_WORD_SIZE)AMD_ID_LV800B:
+		info->flash_id += FLASH_AM800B;
+		info->sector_count = 19;
+		info->size = 0x00100000;
+		break;				/* => 1 MB		*/
+
+	case (FLASH_WORD_SIZE)AMD_ID_LV160T:
+		info->flash_id += FLASH_AM160T;
+		info->sector_count = 35;
+		info->size = 0x00200000;
+		break;				/* => 2 MB		*/
+
+	case (FLASH_WORD_SIZE)AMD_ID_LV160B:
+		info->flash_id += FLASH_AM160B;
+		info->sector_count = 35;
+		info->size = 0x00200000;
+		break;				/* => 2 MB		*/
+#if 0	/* enable when device IDs are available */
+	case (FLASH_WORD_SIZE)AMD_ID_LV320T:
+		info->flash_id += FLASH_AM320T;
+		info->sector_count = 67;
+		info->size = 0x00400000;
+		break;				/* => 4 MB		*/
+
+	case (FLASH_WORD_SIZE)AMD_ID_LV320B:
+		info->flash_id += FLASH_AM320B;
+		info->sector_count = 67;
+		info->size = 0x00400000;
+		break;				/* => 4 MB		*/
+#endif
+	case (FLASH_WORD_SIZE)SST_ID_xF800A:
+		info->flash_id += FLASH_SST800A;
+		info->sector_count = 16;
+		info->size = 0x00100000;
+		break;				/* => 1 MB		*/
+
+	case (FLASH_WORD_SIZE)SST_ID_xF160A:
+		info->flash_id += FLASH_SST160A;
+		info->sector_count = 32;
+		info->size = 0x00200000;
+		break;				/* => 2 MB		*/
+
+	default:
+		info->flash_id = FLASH_UNKNOWN;
+		return (0);			/* => no or unknown flash */
+
+	}
+
+	/* set up sector start address table */
+        if (((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) ||
+	    (info->flash_id  == FLASH_AM040)){
+	    for (i = 0; i < info->sector_count; i++)
+		info->start[i] = base + (i * 0x00010000);
+        } else {
+	    if (info->flash_id & FLASH_BTYPE) {
+		/* set sector offsets for bottom boot block type	*/
+		info->start[0] = base + 0x00000000;
+		info->start[1] = base + 0x00004000;
+		info->start[2] = base + 0x00006000;
+		info->start[3] = base + 0x00008000;
+		for (i = 4; i < info->sector_count; i++) {
+			info->start[i] = base + (i * 0x00010000) - 0x00030000;
+		}
+	    } else {
+		/* set sector offsets for top boot block type		*/
+		i = info->sector_count - 1;
+		info->start[i--] = base + info->size - 0x00004000;
+		info->start[i--] = base + info->size - 0x00006000;
+		info->start[i--] = base + info->size - 0x00008000;
+		for (; i >= 0; i--) {
+			info->start[i] = base + i * 0x00010000;
+		}
+	    }
+	}
+
+	/* check for protected sectors */
+	for (i = 0; i < info->sector_count; i++) {
+		/* read sector protection at sector address, (A7 .. A0) = 0x02 */
+		/* D0 = 1 if protected */
+#ifdef CONFIG_ADCIOP
+		addr2 = (volatile FLASH_WORD_SIZE *)(info->start[i]);
+		info->protect[i] = addr2[4] & 1;
+#else
+		addr2 = (volatile FLASH_WORD_SIZE *)(info->start[i]);
+                if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST)
+                  info->protect[i] = 0;
+                else
+                  info->protect[i] = addr2[2] & 1;
+#endif
+	}
+
+	/*
+	 * Prevent writes to uninitialized FLASH.
+	 */
+	if (info->flash_id != FLASH_UNKNOWN) {
+#if 0 /* test-only */
+#ifdef CONFIG_ADCIOP
+		addr2 = (volatile unsigned char *)info->start[0];
+                addr2[ADDR0] = 0xAA;
+                addr2[ADDR1] = 0x55;
+                addr2[ADDR0] = 0xF0;  /* reset bank */
+#else
+		addr2 = (FLASH_WORD_SIZE *)info->start[0];
+		*addr2 = (FLASH_WORD_SIZE)0x00F000F0;	/* reset bank */
+#endif
+#else /* test-only */
+		addr2 = (FLASH_WORD_SIZE *)info->start[0];
+		*addr2 = (FLASH_WORD_SIZE)0x00F000F0;	/* reset bank */
+#endif /* test-only */
+	}
+
+	return (info->size);
+}
+
+int wait_for_DQ7(flash_info_t *info, int sect)
+{
+	ulong start, now, last;
+	volatile FLASH_WORD_SIZE *addr = (FLASH_WORD_SIZE *)(info->start[sect]);
+
+	start = get_timer (0);
+    last  = start;
+    while ((addr[0] & (FLASH_WORD_SIZE)0x00800080) != (FLASH_WORD_SIZE)0x00800080) {
+        if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
+            printf ("Timeout\n");
+            return -1;
+        }
+        /* show that we're waiting */
+        if ((now - last) > 1000) {  /* every second */
+            putc ('.');
+            last = now;
+        }
+    }
+	return 0;
+}
+
+/*-----------------------------------------------------------------------
+ */
+
+int	flash_erase (flash_info_t *info, int s_first, int s_last)
+{
+	volatile FLASH_WORD_SIZE *addr = (FLASH_WORD_SIZE *)(info->start[0]);
+	volatile FLASH_WORD_SIZE *addr2;
+	int flag, prot, sect, l_sect;
+	int i;
+
+	if ((s_first < 0) || (s_first > s_last)) {
+		if (info->flash_id == FLASH_UNKNOWN) {
+			printf ("- missing\n");
+		} else {
+			printf ("- no sectors to erase\n");
+		}
+		return 1;
+	}
+
+	if (info->flash_id == FLASH_UNKNOWN) {
+		printf ("Can't erase unknown flash type - aborted\n");
+		return 1;
+	}
+
+	prot = 0;
+	for (sect=s_first; sect<=s_last; ++sect) {
+		if (info->protect[sect]) {
+			prot++;
+		}
+	}
+
+	if (prot) {
+		printf ("- Warning: %d protected sectors will not be erased!\n",
+			prot);
+	} else {
+		printf ("\n");
+	}
+
+	l_sect = -1;
+
+	/* Disable interrupts which might cause a timeout here */
+	flag = disable_interrupts();
+
+	/* Start erase on unprotected sectors */
+	for (sect = s_first; sect<=s_last; sect++) {
+		if (info->protect[sect] == 0) {	/* not protected */
+		    addr2 = (FLASH_WORD_SIZE *)(info->start[sect]);
+		    printf("Erasing sector %p\n", addr2);	/* CLH */
+
+		    if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) {
+			addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
+			addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
+			addr[ADDR0] = (FLASH_WORD_SIZE)0x00800080;
+			addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
+			addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
+			addr2[0] = (FLASH_WORD_SIZE)0x00500050;  /* block erase */
+			for (i=0; i<50; i++)
+				udelay(1000);  /* wait 1 ms */
+		    } else {
+			addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
+			addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
+			addr[ADDR0] = (FLASH_WORD_SIZE)0x00800080;
+			addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
+			addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
+			addr2[0] = (FLASH_WORD_SIZE)0x00300030;  /* sector erase */
+		    }
+		    l_sect = sect;
+		    /*
+		     * Wait for each sector to complete, it's more
+		     * reliable.  According to AMD Spec, you must
+		     * issue all erase commands within a specified
+		     * timeout.  This has been seen to fail, especially
+		     * if printf()s are included (for debug)!!
+		     */
+		    wait_for_DQ7(info, sect);
+		}
+	}
+
+	/* re-enable interrupts if necessary */
+	if (flag)
+		enable_interrupts();
+
+	/* wait at least 80us - let's wait 1 ms */
+	udelay (1000);
+
+#if 0
+	/*
+	 * We wait for the last triggered sector
+	 */
+	if (l_sect < 0)
+		goto DONE;
+	wait_for_DQ7(info, l_sect);
+
+DONE:
+#endif
+	/* reset to read mode */
+	addr = (FLASH_WORD_SIZE *)info->start[0];
+	addr[0] = (FLASH_WORD_SIZE)0x00F000F0;	/* reset bank */
+
+	printf (" done\n");
+	return 0;
+}
+
+/*-----------------------------------------------------------------------
+ * Copy memory to flash, returns:
+ * 0 - OK
+ * 1 - write timeout
+ * 2 - Flash not erased
+ */
+
+int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
+{
+	ulong cp, wp, data;
+	int i, l, rc;
+
+	wp = (addr & ~3);	/* get lower word aligned address */
+
+	/*
+	 * handle unaligned start bytes
+	 */
+	if ((l = addr - wp) != 0) {
+		data = 0;
+		for (i=0, cp=wp; i<l; ++i, ++cp) {
+			data = (data << 8) | (*(uchar *)cp);
+		}
+		for (; i<4 && cnt>0; ++i) {
+			data = (data << 8) | *src++;
+			--cnt;
+			++cp;
+		}
+		for (; cnt==0 && i<4; ++i, ++cp) {
+			data = (data << 8) | (*(uchar *)cp);
+		}
+
+		if ((rc = write_word(info, wp, data)) != 0) {
+			return (rc);
+		}
+		wp += 4;
+	}
+
+	/*
+	 * handle word aligned part
+	 */
+	while (cnt >= 4) {
+		data = 0;
+		for (i=0; i<4; ++i) {
+			data = (data << 8) | *src++;
+		}
+		if ((rc = write_word(info, wp, data)) != 0) {
+			return (rc);
+		}
+		wp  += 4;
+		cnt -= 4;
+	}
+
+	if (cnt == 0) {
+		return (0);
+	}
+
+	/*
+	 * handle unaligned tail bytes
+	 */
+	data = 0;
+	for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) {
+		data = (data << 8) | *src++;
+		--cnt;
+	}
+	for (; i<4; ++i, ++cp) {
+		data = (data << 8) | (*(uchar *)cp);
+	}
+
+	return (write_word(info, wp, data));
+}
+
+/*-----------------------------------------------------------------------
+ * Write a word to Flash, returns:
+ * 0 - OK
+ * 1 - write timeout
+ * 2 - Flash not erased
+ */
+static int write_word (flash_info_t * info, ulong dest, ulong data)
+{
+	volatile FLASH_WORD_SIZE *addr2 = (FLASH_WORD_SIZE *) (info->start[0]);
+	volatile FLASH_WORD_SIZE *dest2 = (FLASH_WORD_SIZE *) dest;
+	volatile FLASH_WORD_SIZE *data2 = (FLASH_WORD_SIZE *) & data;
+	ulong start;
+	int i;
+
+	/* Check if Flash is (sufficiently) erased */
+	if ((*((volatile FLASH_WORD_SIZE *) dest) &
+	    (FLASH_WORD_SIZE) data) != (FLASH_WORD_SIZE) data) {
+		return (2);
+	}
+
+	for (i = 0; i < 4 / sizeof (FLASH_WORD_SIZE); i++) {
+		int flag;
+
+		/* Disable interrupts which might cause a timeout here */
+		flag = disable_interrupts ();
+
+		addr2[ADDR0] = (FLASH_WORD_SIZE) 0x00AA00AA;
+		addr2[ADDR1] = (FLASH_WORD_SIZE) 0x00550055;
+		addr2[ADDR0] = (FLASH_WORD_SIZE) 0x00A000A0;
+
+		dest2[i] = data2[i];
+
+		/* re-enable interrupts if necessary */
+		if (flag)
+			enable_interrupts ();
+
+		/* data polling for D7 */
+		start = get_timer (0);
+		while ((dest2[i] & (FLASH_WORD_SIZE) 0x00800080) !=
+		       (data2[i] & (FLASH_WORD_SIZE) 0x00800080)) {
+
+			if (get_timer (start) > CFG_FLASH_WRITE_TOUT) {
+				return (1);
+			}
+		}
+	}
+
+	return (0);
+}
+
+/*-----------------------------------------------------------------------
+ */

board/bubinga405ep/init.S

@@ -0,0 +1,55 @@
+/*------------------------------------------------------------------------------+ */
+/* */
+/*       This source code has been made available to you by IBM on an AS-IS */
+/*       basis.  Anyone receiving this source is licensed under IBM */
+/*       copyrights to use it in any way he or she deems fit, including */
+/*       copying it, modifying it, compiling it, and redistributing it either */
+/*       with or without modifications.  No license under IBM patents or */
+/*       patent applications is to be implied by the copyright license. */
+/* */
+/*       Any user of this software should understand that IBM cannot provide */
+/*       technical support for this software and will not be responsible for */
+/*       any consequences resulting from the use of this software. */
+/* */
+/*       Any person who transfers this source code or any derivative work */
+/*       must include the IBM copyright notice, this paragraph, and the */
+/*       preceding two paragraphs in the transferred software. */
+/* */
+/*       COPYRIGHT   I B M   CORPORATION 1995 */
+/*       LICENSED MATERIAL  -  PROGRAM PROPERTY OF I B M */
+/*------------------------------------------------------------------------------- */
+
+/*----------------------------------------------------------------------------- */
+/* Function:     ext_bus_cntlr_init */
+/* Description:  Initializes the External Bus Controller for the external */
+/*		peripherals. IMPORTANT: For pass1 this code must run from */
+/*		cache since you can not reliably change a peripheral banks */
+/*		timing register (pbxap) while running code from that bank. */
+/*		For ex., since we are running from ROM on bank 0, we can NOT */
+/*		execute the code that modifies bank 0 timings from ROM, so */
+/*		we run it from cache. */
+/*	Bank 0 - Flash and SRAM */
+/*	Bank 1 - NVRAM/RTC */
+/*	Bank 2 - Keyboard/Mouse controller */
+/*	Bank 3 - IR controller */
+/*	Bank 4 - not used */
+/*	Bank 5 - not used */
+/*	Bank 6 - not used */
+/*	Bank 7 - FPGA registers */
+/*----------------------------------------------------------------------------- */
+#include <ppc4xx.h>
+
+#include <ppc_asm.tmpl>
+#include <ppc_defs.h>
+
+#include <asm/cache.h>
+#include <asm/mmu.h>
+
+
+/*----------------------------------------------------------------------------- */
+/* Function:     sdram_init */
+/* Description:  Dummy implementation here - done in C later */
+/*----------------------------------------------------------------------------- */
+        .globl  sdram_init
+sdram_init:
+        blr

board/bubinga405ep/u-boot.lds

@@ -0,0 +1,144 @@
+/*
+ * (C) Copyright 2000
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_ARCH(powerpc)
+SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
+/* Do we need any of these for elf?
+   __DYNAMIC = 0;    */
+SECTIONS
+{
+  .resetvec 0xFFFFFFFC :
+  {
+    *(.resetvec)
+  } = 0xffff
+
+  /* Read-only sections, merged into text segment: */
+  . = + SIZEOF_HEADERS;
+  .interp : { *(.interp) }
+  .hash          : { *(.hash)		}
+  .dynsym        : { *(.dynsym)		}
+  .dynstr        : { *(.dynstr)		}
+  .rel.text      : { *(.rel.text)		}
+  .rela.text     : { *(.rela.text) 	}
+  .rel.data      : { *(.rel.data)		}
+  .rela.data     : { *(.rela.data) 	}
+  .rel.rodata    : { *(.rel.rodata) 	}
+  .rela.rodata   : { *(.rela.rodata) 	}
+  .rel.got       : { *(.rel.got)		}
+  .rela.got      : { *(.rela.got)		}
+  .rel.ctors     : { *(.rel.ctors)	}
+  .rela.ctors    : { *(.rela.ctors)	}
+  .rel.dtors     : { *(.rel.dtors)	}
+  .rela.dtors    : { *(.rela.dtors)	}
+  .rel.bss       : { *(.rel.bss)		}
+  .rela.bss      : { *(.rela.bss)		}
+  .rel.plt       : { *(.rel.plt)		}
+  .rela.plt      : { *(.rela.plt)		}
+  .init          : { *(.init)	}
+  .plt : { *(.plt) }
+  .text      :
+  {
+    /* WARNING - the following is hand-optimized to fit within	*/
+    /* the sector layout of our flash chips!	XXX FIXME XXX	*/
+
+    cpu/ppc4xx/start.o	(.text)
+    board/bubinga405ep/init.o	(.text)
+    cpu/ppc4xx/kgdb.o	(.text)
+    cpu/ppc4xx/traps.o	(.text)
+    cpu/ppc4xx/interrupts.o	(.text)
+    cpu/ppc4xx/serial.o	(.text)
+    cpu/ppc4xx/cpu_init.o	(.text)
+    cpu/ppc4xx/speed.o	(.text)
+    cpu/ppc4xx/405gp_enet.o	(.text)
+    common/dlmalloc.o	(.text)
+    lib_generic/crc32.o		(.text)
+    lib_ppc/extable.o	(.text)
+    lib_generic/zlib.o		(.text)
+
+/*    . = env_offset;*/
+/*    common/environment.o(.text)*/
+
+    *(.text)
+    *(.fixup)
+    *(.got1)
+  }
+  _etext = .;
+  PROVIDE (etext = .);
+  .rodata    :
+  {
+    *(.rodata)
+    *(.rodata1)
+  }
+  .fini      : { *(.fini)    } =0
+  .ctors     : { *(.ctors)   }
+  .dtors     : { *(.dtors)   }
+
+  /* Read-write section, merged into data segment: */
+  . = (. + 0x00FF) & 0xFFFFFF00;
+  _erotext = .;
+  PROVIDE (erotext = .);
+  .reloc   :
+  {
+    *(.got)
+    _GOT2_TABLE_ = .;
+    *(.got2)
+    _FIXUP_TABLE_ = .;
+    *(.fixup)
+  }
+  __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
+  __fixup_entries = (. - _FIXUP_TABLE_)>>2;
+
+  .data    :
+  {
+    *(.data)
+    *(.data1)
+    *(.sdata)
+    *(.sdata2)
+    *(.dynamic)
+    CONSTRUCTORS
+  }
+  _edata  =  .;
+  PROVIDE (edata = .);
+
+  __start___ex_table = .;
+  __ex_table : { *(__ex_table) }
+  __stop___ex_table = .;
+
+  . = ALIGN(256);
+  __init_begin = .;
+  .text.init : { *(.text.init) }
+  .data.init : { *(.data.init) }
+  . = ALIGN(256);
+  __init_end = .;
+
+  __bss_start = .;
+  .bss       :
+  {
+   *(.sbss) *(.scommon)
+   *(.dynbss)
+   *(.bss)
+   *(COMMON)
+  }
+  _end = . ;
+  PROVIDE (end = .);
+}

board/bubinga405ep/u-boot.lds.debug

@@ -0,0 +1,147 @@
+/*
+ * (C) Copyright 2000
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_ARCH(powerpc)
+SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
+/* Do we need any of these for elf?
+   __DYNAMIC = 0;    */
+SECTIONS
+{
+  /* Read-only sections, merged into text segment: */
+  . = + SIZEOF_HEADERS;
+  .interp : { *(.interp) }
+  .hash          : { *(.hash)		}
+  .dynsym        : { *(.dynsym)		}
+  .dynstr        : { *(.dynstr)		}
+  .rel.text      : { *(.rel.text)		}
+  .rela.text     : { *(.rela.text) 	}
+  .rel.data      : { *(.rel.data)		}
+  .rela.data     : { *(.rela.data) 	}
+  .rel.rodata    : { *(.rel.rodata) 	}
+  .rela.rodata   : { *(.rela.rodata) 	}
+  .rel.got       : { *(.rel.got)		}
+  .rela.got      : { *(.rela.got)		}
+  .rel.ctors     : { *(.rel.ctors)	}
+  .rela.ctors    : { *(.rela.ctors)	}
+  .rel.dtors     : { *(.rel.dtors)	}
+  .rela.dtors    : { *(.rela.dtors)	}
+  .rel.bss       : { *(.rel.bss)		}
+  .rela.bss      : { *(.rela.bss)		}
+  .rel.plt       : { *(.rel.plt)		}
+  .rela.plt      : { *(.rela.plt)		}
+  .init          : { *(.init)	}
+  .plt : { *(.plt) }
+  .text      :
+  {
+    /* WARNING - the following is hand-optimized to fit within	*/
+    /* the sector layout of our flash chips!	XXX FIXME XXX	*/
+
+/*
+    cpu/ppc4xx/start.o	(.text)
+    common/dlmalloc.o	(.text)
+    lib_generic/vsprintf.o	(.text)
+    lib_generic/crc32.o		(.text)
+    lib_ppc/extable.o	(.text)
+*/
+    cpu/ppc4xx/start.o	(.text)
+    board/bubinga405ep/init.o	(.text)
+    cpu/ppc4xx/kgdb.o	(.text)
+    cpu/ppc4xx/traps.o	(.text)
+    cpu/ppc4xx/interrupts.o	(.text)
+    cpu/ppc4xx/serial.o	(.text)
+    cpu/ppc4xx/cpu_init.o	(.text)
+    cpu/ppc4xx/speed.o	(.text)
+    cpu/ppc4xx/405gp_enet.o	(.text)
+    common/dlmalloc.o	(.text)
+    lib_generic/crc32.o		(.text)
+    lib_ppc/extable.o	(.text)
+    lib_generic/zlib.o		(.text)
+
+
+    common/environment.o(.text)
+
+    *(.text)
+    *(.fixup)
+    *(.got1)
+  }
+  _etext = .;
+  PROVIDE (etext = .);
+  .rodata    :
+  {
+    *(.rodata)
+    *(.rodata1)
+  }
+  .fini      : { *(.fini)    } =0
+  .ctors     : { *(.ctors)   }
+  .dtors     : { *(.dtors)   }
+
+  /* Read-write section, merged into data segment: */
+  . = (. + 0x0FFF) & 0xFFFFF000;
+  _erotext = .;
+  PROVIDE (erotext = .);
+  .reloc   :
+  {
+    *(.got)
+    _GOT2_TABLE_ = .;
+    *(.got2)
+    _FIXUP_TABLE_ = .;
+    *(.fixup)
+  }
+  __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
+  __fixup_entries = (. - _FIXUP_TABLE_)>>2;
+
+  .data    :
+  {
+    *(.data)
+    *(.data1)
+    *(.sdata)
+    *(.sdata2)
+    *(.dynamic)
+    CONSTRUCTORS
+  }
+  _edata  =  .;
+  PROVIDE (edata = .);
+
+  __start___ex_table = .;
+  __ex_table : { *(__ex_table) }
+  __stop___ex_table = .;
+
+  . = ALIGN(4096);
+  __init_begin = .;
+  .text.init : { *(.text.init) }
+  .data.init : { *(.data.init) }
+  . = ALIGN(4096);
+  __init_end = .;
+
+  __bss_start = .;
+  .bss       :
+  {
+   *(.sbss) *(.scommon)
+   *(.dynbss)
+   *(.bss)
+   *(COMMON)
+  }
+  _end = . ;
+  PROVIDE (end = .);
+}
+

board/c2mon/flash.c

@@ -91,7 +91,7 @@ unsigned long flash_init (void)
 	/* monitor protection ON by default */
 	flash_protect(FLAG_PROTECT_SET,
 		      CFG_MONITOR_BASE,
-		      CFG_MONITOR_BASE+CFG_MONITOR_LEN-1,
+		      CFG_MONITOR_BASE+monitor_flash_len-1,
 		      &flash_info[0]);
 #endif
 
@@ -118,7 +118,7 @@ unsigned long flash_init (void)
 		/* monitor protection ON by default */
 		flash_protect(FLAG_PROTECT_SET,
 			      CFG_MONITOR_BASE,
-			      CFG_MONITOR_BASE+CFG_MONITOR_LEN-1,
+			      CFG_MONITOR_BASE+monitor_flash_len-1,
 			      &flash_info[1]);
 #endif
 

board/cmi/Makefile

@@ -0,0 +1,47 @@
+#
+# (C) Copyright 2001	Wolfgang Denk, DENX Software Engineering, wd@denx.de
+#
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB	= lib$(BOARD).a
+
+OBJS	:= flash.o cmi.o
+SOBJS	:=
+
+$(LIB):	$(OBJS)
+	$(AR) crv $@ $^
+
+clean:
+	rm -f $(SOBJS) $(OBJS)
+
+distclean:	clean
+	rm -f $(LIB) core *.bak .depend
+
+#########################################################################
+
+.depend:	Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
+		$(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
+
+-include .depend
+
+#########################################################################

board/cmi/cmi.c

@@ -0,0 +1,73 @@
+/*
+ * (C) Copyright 2003
+ * Martin Winistoerfer, martinwinistoerfer@gmx.ch.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*
+ * File:		cmi.c
+ *
+ * Discription:		For generic board specific functions
+ *
+ */
+
+
+#include <common.h>
+#include <mpc5xx.h>
+
+#define SRAM_SIZE	1024000L	/* 1M RAM available*/
+
+#if defined(__APPLE__)
+/* Leading underscore on symbols */
+#  define SYM_CHAR "_"
+#else /* No leading character on symbols */
+#  define SYM_CHAR
+#endif
+
+/*
+ * Macros to generate global absolutes.
+ */
+#define GEN_SYMNAME(str) SYM_CHAR #str
+#define GEN_VALUE(str) #str
+#define GEN_ABS(name, value) \
+		asm (".globl " GEN_SYMNAME(name)); \
+		asm (GEN_SYMNAME(name) " = " GEN_VALUE(value))
+
+/*
+ * Check the board
+ */
+int checkboard(void)
+{
+    puts ("Board: ### No HW ID - assuming CMI board\n");
+    return (0);
+}
+
+/*
+ * Get RAM size.
+ */
+long int initdram(int board_type)
+{
+	return (SRAM_SIZE);		/* We currently have a static size adapted for cmi board. */
+}
+
+/*
+ * Absolute environment address for linker file.
+ */
+GEN_ABS(env_start, CFG_ENV_OFFSET + CFG_FLASH_BASE);

board/cmi/config.mk

@@ -0,0 +1,31 @@
+#
+# (C) Copyright 2003
+# Martin Winistoerfer, martinwinistoerfer@gmx.ch.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+#
+# EPQ Board Configuration
+#
+
+# Boot from flash at location 0x00000000
+TEXT_BASE = 0x02000000
+
+PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)

board/cmi/flash.c

@@ -0,0 +1,517 @@
+/*
+ * (C) Copyright 2003
+ * Martin Winistoerfer, martinwinistoerfer@gmx.ch.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*
+ * File:		flash.c
+ *
+ * Discription:		This Driver is for 28F320J3A, 28F640J3A and
+ * 			28F128J3A Intel flashs working in 16 Bit mode.
+ *			They are single bank flashs.
+ *
+ *			Most of this code is taken from existing u-boot
+ *			source code.
+ */
+
+
+#include <common.h>
+#include <mpc5xx.h>
+
+#if defined(CFG_ENV_IS_IN_FLASH)
+# ifndef  CFG_ENV_ADDR
+#  define CFG_ENV_ADDR	(CFG_FLASH_BASE + CFG_ENV_OFFSET)
+# endif
+# ifndef  CFG_ENV_SIZE
+#  define CFG_ENV_SIZE	CFG_ENV_SECT_SIZE
+# endif
+# ifndef  CFG_ENV_SECT_SIZE
+#  define CFG_ENV_SECT_SIZE  CFG_ENV_SIZE
+# endif
+#endif
+
+#define	FLASH_ID_MASK			0xFFFF
+#define FLASH_BLOCK_SIZE		0x00010000
+#define FLASH_CMD_READ_ID		0x0090
+#define FLASH_CMD_RESET			0x00ff
+#define FLASH_CMD_BLOCK_ERASE		0x0020
+#define FLASH_CMD_ERASE_CONFIRM		0x00D0
+#define FLASH_CMD_CLEAR_STATUS		0x0050
+#define FLASH_CMD_SUSPEND_ERASE		0x00B0
+#define FLASH_CMD_WRITE			0x0040
+#define FLASH_CMD_PROTECT		0x0060
+#define FLASH_CMD_PROTECT_SET		0x0001
+#define FLASH_CMD_PROTECT_CLEAR		0x00D0
+#define FLASH_STATUS_DONE		0x0080
+
+flash_info_t	flash_info[CFG_MAX_FLASH_BANKS];
+
+/*
+ * Local function prototypes
+ */
+static ulong 	flash_get_size 		(vu_short *addr, flash_info_t *info);
+static int 	write_short 		(flash_info_t *info, ulong dest, ushort data);
+static void 	flash_get_offsets 	(ulong base, flash_info_t *info);
+
+/*
+ * Initialize flash
+ */
+
+unsigned long flash_init (void)
+{
+	unsigned long size_b0;
+	int i;
+
+	/* Init: no FLASHes known */
+	for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
+		flash_info[i].flash_id = FLASH_UNKNOWN;
+	}
+
+	/* Static FLASH Bank configuration here - FIXME XXX */
+#if 1
+	debug ("\n## Get flash bank 1 size @ 0x%08x\n",FLASH_BASE0_PRELIM);
+#endif
+	size_b0 = flash_get_size((vu_short *)FLASH_BASE0_PRELIM, &flash_info[0]);
+
+	if (flash_info[0].flash_id == FLASH_UNKNOWN) {
+		printf ("## Unknown FLASH on Bank 0: "
+			"ID 0x%lx, Size = 0x%08lx = %ld MB\n",
+			flash_info[0].flash_id,
+			size_b0, size_b0<<20);
+	}
+
+	flash_get_offsets (FLASH_BASE0_PRELIM, &flash_info[0]);
+
+	flash_info[0].size = size_b0;
+
+#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
+	/* monitor protection ON by default */
+	flash_protect(FLAG_PROTECT_SET,
+		      CFG_MONITOR_BASE,
+		      CFG_MONITOR_BASE+monitor_flash_len-1,
+		      &flash_info[0]);
+#endif
+
+#ifdef	CFG_ENV_IS_IN_FLASH
+	/* ENV protection ON by default */
+	flash_protect(FLAG_PROTECT_SET,
+		      CFG_ENV_ADDR,
+		      CFG_ENV_ADDR+CFG_ENV_SECT_SIZE-1,
+		      &flash_info[0]);
+#endif
+
+	return size_b0;
+}
+
+/*
+ * Compute start adress of each sector (block)
+ */
+
+static void flash_get_offsets (ulong base, flash_info_t *info)
+{
+	int i;
+
+	if (info->flash_id == FLASH_UNKNOWN) {
+		return;
+	}
+
+	switch (info->flash_id & FLASH_VENDMASK) {
+	case FLASH_MAN_INTEL:
+	    for (i = 0; i < info->sector_count; i++) {
+		info->start[i] = base + i * FLASH_BLOCK_SIZE;
+	    }
+	    return;
+
+	default:
+	    printf ("Don't know sector offsets for flash type 0x%lx\n",
+		info->flash_id);
+	    return;
+	}
+}
+
+/*
+ * Print flash information
+ */
+void flash_print_info  (flash_info_t *info)
+{
+	int i;
+
+	if (info->flash_id == FLASH_UNKNOWN) {
+		printf ("missing or unknown FLASH type\n");
+		return;
+	}
+
+	switch (info->flash_id & FLASH_VENDMASK) {
+	case FLASH_MAN_AMD:	printf ("AMD ");		break;
+	case FLASH_MAN_FUJ:	printf ("Fujitsu ");		break;
+	case FLASH_MAN_SST:	printf ("SST ");		break;
+	case FLASH_MAN_STM:	printf ("STM ");		break;
+	case FLASH_MAN_INTEL:	printf ("Intel ");		break;
+	case FLASH_MAN_MT:	printf ("MT ");			break;
+	default:		printf ("Unknown Vendor ");	break;
+	}
+
+	switch (info->flash_id & FLASH_TYPEMASK) {
+	case FLASH_28F320J3A:	printf ("28F320J3A (32Mbit) 16-Bit\n");
+				break;
+	case FLASH_28F640J3A:	printf ("28F640J3A (64Mbit) 16-Bit\n");
+				break;
+	case FLASH_28F128J3A:	printf ("28F128J3A (128Mbit) 16-Bit\n");
+				break;
+	default:		printf ("Unknown Chip Type\n");
+				break;
+	}
+
+	if (info->size >= (1 << 20)) {
+		i = 20;
+	} else {
+		i = 10;
+	}
+	printf ("  Size: %ld %cB in %d Sectors\n",
+		info->size >> i,
+		(i == 20) ? 'M' : 'k',
+		info->sector_count);
+
+	printf ("  Sector Start Addresses:");
+	for (i=0; i<info->sector_count; ++i) {
+		if ((i % 5) == 0)
+			printf ("\n   ");
+		printf (" %08lX%s",
+			info->start[i],
+			info->protect[i] ? " (RO)" : "     "
+		);
+	}
+	printf ("\n");
+	return;
+}
+
+/*
+ * Get size of flash in bytes.
+ * The following code cannot be run from FLASH!
+ */
+
+static ulong flash_get_size (vu_short *addr, flash_info_t *info)
+{
+	vu_short value;
+
+	/* Read Manufacturer ID */
+	addr[0] = FLASH_CMD_READ_ID;
+	value = addr[0];
+
+	switch (value) {
+	case (AMD_MANUFACT & FLASH_ID_MASK):
+		info->flash_id = FLASH_MAN_AMD;
+		break;
+	case (FUJ_MANUFACT & FLASH_ID_MASK):
+		info->flash_id = FLASH_MAN_FUJ;
+		break;
+	case (SST_MANUFACT & FLASH_ID_MASK):
+		info->flash_id = FLASH_MAN_SST;
+		break;
+	case (STM_MANUFACT & FLASH_ID_MASK):
+		info->flash_id = FLASH_MAN_STM;
+		break;
+	case (INTEL_MANUFACT & FLASH_ID_MASK):
+		info->flash_id = FLASH_MAN_INTEL;
+		break;
+	default:
+		info->flash_id = FLASH_UNKNOWN;
+		info->sector_count = 0;
+		info->size = 0;
+		addr[0] = FLASH_CMD_RESET;	/* restore read mode */
+		return (0);			/* no or unknown flash	*/
+	}
+
+	value = addr[1];			/* device ID		*/
+
+	switch (value) {
+	case (INTEL_ID_28F320J3A  & FLASH_ID_MASK):
+		info->flash_id += FLASH_28F320J3A;
+		info->sector_count = 32;
+		info->size = 0x00400000;
+		break;				/* =>  32 MBit		*/
+
+	case (INTEL_ID_28F640J3A & FLASH_ID_MASK):
+		info->flash_id += FLASH_28F640J3A;
+		info->sector_count = 64;
+		info->size = 0x00800000;
+		break;				/* => 64 MBit		*/
+
+	case (INTEL_ID_28F128J3A & FLASH_ID_MASK):
+		info->flash_id += FLASH_28F128J3A;
+		info->sector_count = 128;
+		info->size = 0x01000000;
+		break;				/* => 128 MBit		*/
+
+	default:
+		info->flash_id = FLASH_UNKNOWN;
+		addr[0] = FLASH_CMD_RESET;	/* restore read mode */
+		return (0);			/* => no or unknown flash */
+
+	}
+
+	if (info->sector_count > CFG_MAX_FLASH_SECT) {
+		printf ("** ERROR: sector count %d > max (%d) **\n",
+			info->sector_count, CFG_MAX_FLASH_SECT);
+		info->sector_count = CFG_MAX_FLASH_SECT;
+	}
+
+	addr[0] = FLASH_CMD_RESET;		/* restore read mode */
+
+	return (info->size);
+}
+
+
+/*
+ * Erase unprotected sectors
+ */
+
+int flash_erase (flash_info_t *info, int s_first, int s_last)
+{
+	int flag, prot, sect;
+	ulong start, now, last;
+
+	if ((s_first < 0) || (s_first > s_last)) {
+		if (info->flash_id == FLASH_UNKNOWN) {
+			printf ("- missing\n");
+		} else {
+			printf ("- no sectors to erase\n");
+		}
+		return 1;
+	}
+
+	if ((info->flash_id & FLASH_VENDMASK) != FLASH_MAN_INTEL) {
+		printf ("Can erase only Intel flash types - aborted\n");
+		return 1;
+	}
+
+	prot = 0;
+	for (sect=s_first; sect<=s_last; ++sect) {
+		if (info->protect[sect]) {
+			prot++;
+		}
+	}
+
+	if (prot) {
+		printf ("- Warning: %d protected sectors will not be erased!\n",
+			prot);
+	} else {
+		printf ("\n");
+	}
+
+	start = get_timer (0);
+	last  = start;
+
+	/* Start erase on unprotected sectors */
+	for (sect = s_first; sect<=s_last; sect++) {
+		if (info->protect[sect] == 0) {	/* not protected */
+			vu_short *addr = (vu_short *)(info->start[sect]);
+			unsigned long status;
+
+			/* Disable interrupts which might cause a timeout here */
+			flag = disable_interrupts();
+
+#ifdef DEBUG
+			printf("Erase sector %d at start addr 0x%08X", sect, (unsigned int)info->start[sect]);
+#endif
+
+			*addr = FLASH_CMD_CLEAR_STATUS;
+			*addr = FLASH_CMD_BLOCK_ERASE;
+			*addr = FLASH_CMD_ERASE_CONFIRM;
+
+			/* re-enable interrupts if necessary */
+			if (flag)
+				enable_interrupts();
+
+			/* wait at least 80us - let's wait 1 ms */
+			udelay (1000);
+
+			while (((status = *addr) & FLASH_STATUS_DONE) != FLASH_STATUS_DONE) {
+				if ((now=get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
+					printf("Flash erase timeout at address %lx\n", info->start[sect]);
+					*addr = FLASH_CMD_SUSPEND_ERASE;
+					*addr = FLASH_CMD_RESET;
+					return 1;
+				}
+
+				/* show that we're waiting */
+				if ((now - last) > 1000) {	/* every second */
+					putc ('.');
+					last = now;
+				}
+			}
+			*addr = FLASH_CMD_RESET;
+		}
+	}
+	printf (" done\n");
+	return 0;
+}
+
+/*
+ * Copy memory to flash, returns:
+ * 0 - OK
+ * 1 - write timeout
+ * 2 - Flash not erased
+ * 4 - Flash not identified
+ */
+
+int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
+{
+	ulong cp, wp;
+	ushort data;
+	int i, rc;
+
+	if (info->flash_id == FLASH_UNKNOWN) {
+		return 4;
+	}
+
+	wp = (addr & ~1);	/* get lower word aligned address */
+
+	/*
+	 * handle unaligned start byte
+	 */
+
+	if (addr - wp) {
+		data = 0;
+		data = (data << 8) | *src++;
+		--cnt;
+		if ((rc = write_short(info, wp, data)) != 0) {
+			return (rc);
+		}
+		wp += 2;
+	}
+
+	/*
+	 * handle word aligned part
+	 */
+
+	while (cnt >= 2) {
+		data = 0;
+		for (i=0; i<2; ++i) {
+			data = (data << 8) | *src++;
+		}
+
+		if ((rc = write_short(info, wp, data)) != 0) {
+			return (rc);
+		}
+		wp  += 2;
+		cnt -= 2;
+	}
+
+	if (cnt == 0) {
+		return (0);
+	}
+
+	/*
+	 * handle unaligned tail bytes
+	 */
+
+	data = 0;
+	for (i=0, cp=wp; i<2 && cnt>0; ++i, ++cp) {
+		data = (data << 8) | *src++;
+		--cnt;
+	}
+	for (; i<2; ++i, ++cp) {
+		data = (data << 8) | (*(uchar *)cp);
+	}
+
+	return (write_short(info, wp, data));
+
+}
+
+/*
+ * Write 16 bit (short) to flash
+ */
+
+static int write_short (flash_info_t *info, ulong dest, ushort data)
+{
+	vu_short *addr = (vu_short*)(info->start[0]);
+	ulong start;
+	int flag;
+
+	/* Check if Flash is (sufficiently) erased */
+	if ((*((vu_short *)dest) & data) != data) {
+		return (2);
+	}
+
+	/* Disable interrupts which might cause a timeout here */
+	flag = disable_interrupts();
+
+	if (!(info->flash_id & FLASH_VENDMASK)) {
+		return 4;
+	}
+        *addr = FLASH_CMD_ERASE_CONFIRM;
+	*addr = FLASH_CMD_WRITE;
+
+	*((vu_short *)dest) = data;
+
+	/* re-enable interrupts if necessary */
+	if (flag) {
+		enable_interrupts();
+	}
+
+	/* data polling for D7 */
+	start = get_timer (0);
+
+	/* wait for error or finish */
+	while(!(addr[0] & FLASH_STATUS_DONE)){
+		if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
+		  	addr[0] = FLASH_CMD_RESET;
+			return (1);
+		}
+	}
+
+	*addr = FLASH_CMD_RESET;
+	return (0);
+}
+
+/*
+ * Protects a flash sector
+ */
+
+int flash_real_protect(flash_info_t *info, long sector, int prot)
+{
+	vu_short *addr = (vu_short*)(info->start[sector]);
+	ulong start;
+
+	*addr = FLASH_CMD_CLEAR_STATUS;
+	*addr = FLASH_CMD_PROTECT;
+
+	if(prot) {
+		*addr = FLASH_CMD_PROTECT_SET;
+	} else {
+		*addr = FLASH_CMD_PROTECT_CLEAR;
+	}
+
+	/* wait for error or finish */
+	start = get_timer (0);
+	while(!(addr[0] & FLASH_STATUS_DONE)){
+		if (get_timer(start) > CFG_FLASH_ERASE_TOUT) {
+		  	printf("Flash protect timeout at address %lx\n",  info->start[sector]);
+			addr[0] = FLASH_CMD_RESET;
+			return (1);
+		}
+	}
+	/* Set software protect flag */
+	info->protect[sector] = prot;
+	*addr = FLASH_CMD_RESET;
+	return (0);
+}

board/cmi/u-boot.lds

@@ -0,0 +1,131 @@
+/*
+ * (C) Copyright 2001	Wolfgang Denk, DENX Software Engineering, wd@denx.de
+ * (C) Copyright 2003	Martin Winistoerfer, martinwinistoerfer@gmx.ch
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_ARCH(powerpc)
+SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
+/* Do we need any of these for elf?
+   __DYNAMIC = 0;    */
+SECTIONS
+{
+  /* Read-only sections, merged into text segment: */
+  . = + SIZEOF_HEADERS;
+  .interp : { *(.interp) }
+  .hash          : { *(.hash)		}
+  .dynsym        : { *(.dynsym)		}
+  .dynstr        : { *(.dynstr)		}
+  .rel.text      : { *(.rel.text)		}
+  .rela.text     : { *(.rela.text) 	}
+  .rel.data      : { *(.rel.data)		}
+  .rela.data     : { *(.rela.data) 	}
+  .rel.rodata    : { *(.rel.rodata) 	}
+  .rela.rodata   : { *(.rela.rodata) 	}
+  .rel.got       : { *(.rel.got)		}
+  .rela.got      : { *(.rela.got)		}
+  .rel.ctors     : { *(.rel.ctors)	}
+  .rela.ctors    : { *(.rela.ctors)	}
+  .rel.dtors     : { *(.rel.dtors)	}
+  .rela.dtors    : { *(.rela.dtors)	}
+  .rel.bss       : { *(.rel.bss)		}
+  .rela.bss      : { *(.rela.bss)		}
+  .rel.plt       : { *(.rel.plt)		}
+  .rela.plt      : { *(.rela.plt)		}
+  .init          : { *(.init)	}
+  .plt : { *(.plt) }
+  .text      :
+  {
+    /* WARNING - the following is hand-optimized to fit within	*/
+    /* the sector layout of our flash chips!	XXX FIXME XXX	*/
+
+    cpu/mpc5xx/start.o	(.text)
+
+    *(.text)
+    *(.fixup)
+    *(.got1)
+  }
+  _etext = .;
+  PROVIDE (etext = .);
+  .rodata    :
+  {
+    *(.rodata)
+    *(.rodata1)
+  }
+  .fini      : { *(.fini)    } =0
+  .ctors     : { *(.ctors)   }
+  .dtors     : { *(.dtors)   }
+
+  /* Read-write section, merged into data segment: */
+  . = (. + 0x00FF) & 0xFFFFFF00;
+  _erotext = .;
+  PROVIDE (erotext = .);
+  .reloc   :
+  {
+    *(.got)
+    _GOT2_TABLE_ = .;
+    *(.got2)
+    _FIXUP_TABLE_ = .;
+    *(.fixup)
+  }
+  __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
+  __fixup_entries = (. - _FIXUP_TABLE_)>>2;
+
+  .data    :
+  {
+    *(.data)
+    *(.data1)
+    *(.sdata)
+    *(.sdata2)
+    *(.dynamic)
+    CONSTRUCTORS
+  }
+  _edata  =  .;
+  PROVIDE (edata = .);
+
+  __start___ex_table = .;
+  __ex_table : { *(__ex_table) }
+  __stop___ex_table = .;
+
+  . = ALIGN(256);
+  __init_begin = .;
+  .text.init : { *(.text.init) }
+  .data.init : { *(.data.init) }
+  . = ALIGN(256);
+  __init_end = .;
+
+  __bss_start = .;
+  .bss       :
+  {
+   *(.sbss) *(.scommon)
+   *(.dynbss)
+   *(.bss)
+   *(COMMON)
+  }
+
+  _end = . ;
+  PROVIDE (end = .);
+    . = env_start;
+	.ppcenv	:
+	{
+		common/environment.o (.ppcenv)
+	}
+
+}

board/cogent/flash.c

@@ -323,7 +323,7 @@ flash_init(void)
 #if CFG_MONITOR_BASE == CFG_FLASH_BASE
 	flash_protect(FLAG_PROTECT_SET,
 		      CFG_MONITOR_BASE,
-		      CFG_MONITOR_BASE+CFG_MONITOR_LEN-1,
+		      CFG_MONITOR_BASE+monitor_flash_len-1,
 		      &flash_info[0]);
 #endif
 

board/cpc45/Makefile

@@ -0,0 +1,40 @@
+#
+# (C) Copyright 2001-2003
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB	= lib$(BOARD).a
+
+OBJS	= $(BOARD).o flash.o plx9030.o
+
+$(LIB):	.depend $(OBJS)
+	$(AR) crv $@ $^
+
+#########################################################################
+
+.depend:	Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
+		$(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
+
+sinclude .depend
+
+#########################################################################

board/cpc45/config.mk

@@ -0,0 +1,36 @@
+#
+# (C) Copyright 2001-2003
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+#
+# CPC45 board
+#
+
+
+ifeq ($(CONFIG_BOOT_ROM),y)
+	TEXT_BASE := 0xFFF00000
+	PLATFORM_CPPFLAGS += -DCONFIG_BOOT_ROM
+else
+	TEXT_BASE := 0xFFF00000
+endif
+
+PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)

board/cpc45/cpc45.c

@@ -0,0 +1,173 @@
+/*
+ * (C) Copyright 2001
+ * Rob Taylor, Flying Pig Systems. robt@flyingpig.com.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <mpc824x.h>
+#include <asm/processor.h>
+#include <pci.h>
+
+int sysControlDisplay(int digit, uchar ascii_code);			
+extern void Plx9030Init(void);
+
+	/* We have to clear the initial data area here. Couldn't have done it
+	 * earlier because DRAM had not been initialized.
+	 */
+int board_pre_init(void)
+{
+
+	/* enable DUAL UART Mode on CPC45 */
+	*(uchar*)DUART_DCR |= 0x1;	/* set DCM bit */
+
+	return 0;
+}
+
+int checkboard(void)
+{
+/*
+	char  revision = BOARD_REV;
+*/
+	ulong busfreq  = get_bus_freq(0);
+	char  buf[32];
+
+	printf("CPC45 ");
+/*
+	printf("Revision %d ", revision);
+*/
+	printf("Local Bus at %s MHz\n", strmhz(buf, busfreq));
+
+	return 0;
+}
+
+long int initdram(int board_type)
+{
+	int              i, cnt;
+	volatile uchar * base      = CFG_SDRAM_BASE;
+	volatile ulong * addr;
+	ulong            save[32];
+	ulong            val, ret  = 0;
+
+	for (i=0, cnt=(CFG_MAX_RAM_SIZE / sizeof(long)) >> 1; cnt > 0; cnt >>= 1) {
+
+		addr = (volatile ulong *)base + cnt;
+		save[i++] = *addr;
+		*addr = ~cnt;
+	}
+
+	addr = (volatile ulong *)base;
+	save[i] = *addr;
+	*addr = 0;
+
+	if (*addr != 0) {
+		*addr = save[i];
+		goto Done;
+	}
+
+	for (cnt = 1; cnt <= CFG_MAX_RAM_SIZE / sizeof(long); cnt <<= 1) {
+		addr = (volatile ulong *)base + cnt;
+		val = *addr;
+		*addr = save[--i];
+		if (val != ~cnt) {
+			ulong new_bank0_end = cnt * sizeof(long) - 1;
+			ulong mear1  = mpc824x_mpc107_getreg(MEAR1);
+			ulong emear1 = mpc824x_mpc107_getreg(EMEAR1);
+			mear1 =  (mear1  & 0xFFFFFF00) |
+			  ((new_bank0_end & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT);
+			emear1 = (emear1 & 0xFFFFFF00) |
+			  ((new_bank0_end & MICR_ADDR_MASK) >> MICR_EADDR_SHIFT);
+			mpc824x_mpc107_setreg(MEAR1,  mear1);
+			mpc824x_mpc107_setreg(EMEAR1, emear1);
+
+			ret = cnt * sizeof(long);
+			goto Done;
+		}
+	}
+
+	ret = CFG_MAX_RAM_SIZE;
+Done:
+	return ret;
+}
+
+/*
+ * Initialize PCI Devices, report devices found.
+ */
+#ifndef CONFIG_PCI_PNP
+
+static struct pci_config_table pci_sandpoint_config_table[] = {
+	{ PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 0x0f, PCI_ANY_ID,
+	  pci_cfgfunc_config_device, { PCI_ENET0_IOADDR,
+				       PCI_ENET0_MEMADDR,
+				       PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER }},
+	{ }
+};
+#endif
+
+
+struct pci_controller hose = {
+#ifndef CONFIG_PCI_PNP
+	config_table: pci_sandpoint_config_table,
+#endif
+};
+
+void pci_init_board(void)
+{
+	pci_mpc824x_init(&hose);
+
+	/* init PCI_to_LOCAL Bus BRIDGE */
+	Plx9030Init();
+
+	sysControlDisplay(0,' ');
+	sysControlDisplay(1,'C');
+	sysControlDisplay(2,'P');
+	sysControlDisplay(3,'C');
+	sysControlDisplay(4,' ');
+	sysControlDisplay(5,'4');
+	sysControlDisplay(6,'5');
+	sysControlDisplay(7,' ');
+
+}
+
+/**************************************************************************
+*
+* sysControlDisplay - controls one of the Alphanum. Display digits.
+*
+* This routine will write an ASCII character to the display digit requested.
+*
+* SEE ALSO:
+*
+* RETURNS: NA
+*/
+
+int sysControlDisplay
+    (
+    int digit, 			/* number of digit 0..7 */
+    uchar ascii_code		/* ASCII code */
+    )
+{
+	if ((digit < 0) || (digit > 7))
+		return (-1);
+
+	*((volatile uchar*)(DISP_CHR_RAM + digit)) = ascii_code;
+
+	return (0);
+}
+

board/cpc45/flash.c

@@ -0,0 +1,493 @@
+/*
+ * (C) Copyright 2001-2003
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <mpc824x.h>
+#include <asm/processor.h>
+
+#if defined(CFG_ENV_IS_IN_FLASH)
+# ifndef  CFG_ENV_ADDR
+#  define CFG_ENV_ADDR	(CFG_FLASH_BASE + CFG_ENV_OFFSET)
+# endif
+# ifndef  CFG_ENV_SIZE
+#  define CFG_ENV_SIZE	CFG_ENV_SECT_SIZE
+# endif
+# ifndef  CFG_ENV_SECT_SIZE
+#  define CFG_ENV_SECT_SIZE  CFG_ENV_SIZE
+# endif
+#endif
+
+#define FLASH_BANK_SIZE 0x800000
+#define MAIN_SECT_SIZE  0x40000
+#define PARAM_SECT_SIZE 0x8000
+
+flash_info_t    flash_info[CFG_MAX_FLASH_BANKS];
+
+static int write_data (flash_info_t *info, ulong dest, ulong *data);
+static void write_via_fpu(vu_long *addr, ulong *data);
+static __inline__ unsigned long get_msr(void);
+static __inline__ void set_msr(unsigned long msr);
+
+/*---------------------------------------------------------------------*/
+#undef	DEBUG_FLASH
+
+/*---------------------------------------------------------------------*/
+#ifdef DEBUG_FLASH
+#define DEBUGF(fmt,args...) printf(fmt ,##args)
+#else
+#define DEBUGF(fmt,args...)
+#endif
+/*---------------------------------------------------------------------*/
+
+/*-----------------------------------------------------------------------
+ */
+
+unsigned long flash_init(void)
+{
+    int i, j;
+    ulong size = 0;
+    uchar tempChar;
+
+   /* Enable flash writes on CPC45 */
+
+    tempChar = BOARD_CTRL;
+
+    tempChar |= (B_CTRL_FWPT_1 | B_CTRL_FWRE_1);
+
+    tempChar &= ~(B_CTRL_FWPT_0 | B_CTRL_FWRE_0);
+
+    BOARD_CTRL = tempChar;
+
+
+    for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) {
+    	vu_long *addr = (vu_long *)(CFG_FLASH_BASE + i * FLASH_BANK_SIZE);
+
+	addr[0] = 0x00900090;
+
+	DEBUGF ("Flash bank # %d:\n"
+		"\tManuf. ID @ 0x%08lX: 0x%08lX\n"
+		"\tDevice ID @ 0x%08lX: 0x%08lX\n",
+		i,
+		(ulong)(&addr[0]), addr[0],
+		(ulong)(&addr[2]), addr[2]);
+
+
+	if ((addr[0] == addr[1]) && (addr[0] == INTEL_MANUFACT) &&
+	    (addr[2] == addr[3]) && (addr[2] == INTEL_ID_28F160F3T))
+	{
+
+	    flash_info[i].flash_id = (FLASH_MAN_INTEL & FLASH_VENDMASK) |
+	    			     (INTEL_ID_28F160F3T & FLASH_TYPEMASK);
+
+	} else {
+	    flash_info[i].flash_id = FLASH_UNKNOWN;
+	    addr[0] = 0xFFFFFFFF;
+	    goto Done;
+	}
+
+	DEBUGF ("flash_id = 0x%08lX\n", flash_info[i].flash_id);
+
+	addr[0] = 0xFFFFFFFF;
+
+	flash_info[i].size = FLASH_BANK_SIZE;
+	flash_info[i].sector_count = CFG_MAX_FLASH_SECT;
+	memset(flash_info[i].protect, 0, CFG_MAX_FLASH_SECT);
+	for (j = 0; j < flash_info[i].sector_count; j++) {
+		if (j > 30) {
+			flash_info[i].start[j] = CFG_FLASH_BASE +
+			                         i * FLASH_BANK_SIZE +
+			                         (MAIN_SECT_SIZE * 31) + (j - 31) * PARAM_SECT_SIZE;
+		} else {
+			flash_info[i].start[j] = CFG_FLASH_BASE +
+			                         i * FLASH_BANK_SIZE +
+			                         j * MAIN_SECT_SIZE;
+		}
+	}
+	size += flash_info[i].size;
+    }
+
+    /* Protect monitor and environment sectors
+     */
+#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
+#if CFG_MONITOR_BASE >= CFG_FLASH_BASE + FLASH_BANK_SIZE
+    flash_protect(FLAG_PROTECT_SET,
+              CFG_MONITOR_BASE,
+              CFG_MONITOR_BASE + monitor_flash_len - 1,
+              &flash_info[1]);
+#else
+    flash_protect(FLAG_PROTECT_SET,
+              CFG_MONITOR_BASE,
+              CFG_MONITOR_BASE + monitor_flash_len - 1,
+              &flash_info[0]);
+#endif
+#endif
+
+#if (CFG_ENV_IS_IN_FLASH == 1) && defined(CFG_ENV_ADDR)
+#if CFG_ENV_ADDR >= CFG_FLASH_BASE + FLASH_BANK_SIZE
+    flash_protect(FLAG_PROTECT_SET,
+              CFG_ENV_ADDR,
+              CFG_ENV_ADDR + CFG_ENV_SIZE - 1,
+              &flash_info[1]);
+#else
+    flash_protect(FLAG_PROTECT_SET,
+              CFG_ENV_ADDR,
+              CFG_ENV_ADDR + CFG_ENV_SIZE - 1,
+              &flash_info[0]);
+#endif
+#endif
+
+Done:
+    return size;
+}
+
+/*-----------------------------------------------------------------------
+ */
+void flash_print_info (flash_info_t * info)
+{
+	int i;
+
+	switch ((i = info->flash_id & FLASH_VENDMASK)) {
+	case (FLASH_MAN_INTEL & FLASH_VENDMASK):
+		printf ("Intel: ");
+		break;
+	default:
+		printf ("Unknown Vendor 0x%04x ", i);
+		break;
+	}
+
+	switch ((i = info->flash_id & FLASH_TYPEMASK)) {
+	case (INTEL_ID_28F160F3T & FLASH_TYPEMASK):
+		printf ("28F160F3T (16Mbit)\n");
+		break;
+	default:
+		printf ("Unknown Chip Type 0x%04x\n", i);
+		goto Done;
+		break;
+	}
+
+	printf ("  Size: %ld MB in %d Sectors\n",
+			info->size >> 20, info->sector_count);
+
+	printf ("  Sector Start Addresses:");
+	for (i = 0; i < info->sector_count; i++) {
+		if ((i % 5) == 0) {
+			printf ("\n   ");
+		}
+		printf (" %08lX%s", info->start[i],
+				info->protect[i] ? " (RO)" : "     ");
+	}
+	printf ("\n");
+
+Done:
+	return;
+}
+
+/*-----------------------------------------------------------------------
+ */
+
+int	flash_erase (flash_info_t *info, int s_first, int s_last)
+{
+	int flag, prot, sect;
+	ulong start, now, last;
+
+	DEBUGF ("Erase flash bank %d sect %d ... %d\n",
+		info - &flash_info[0], s_first, s_last);
+
+	if ((s_first < 0) || (s_first > s_last)) {
+		if (info->flash_id == FLASH_UNKNOWN) {
+			printf ("- missing\n");
+		} else {
+			printf ("- no sectors to erase\n");
+		}
+		return 1;
+	}
+
+	if ((info->flash_id & FLASH_VENDMASK) !=
+	    (FLASH_MAN_INTEL & FLASH_VENDMASK)) {
+		printf ("Can erase only Intel flash types - aborted\n");
+		return 1;
+	}
+
+	prot = 0;
+	for (sect=s_first; sect<=s_last; ++sect) {
+		if (info->protect[sect]) {
+			prot++;
+		}
+	}
+
+	if (prot) {
+		printf ("- Warning: %d protected sectors will not be erased!\n",
+			prot);
+	} else {
+		printf ("\n");
+	}
+
+	start = get_timer (0);
+	last  = start;
+	/* Start erase on unprotected sectors */
+	for (sect = s_first; sect<=s_last; sect++) {
+		if (info->protect[sect] == 0) {	/* not protected */
+			vu_long *addr = (vu_long *)(info->start[sect]);
+
+			DEBUGF ("Erase sect %d @ 0x%08lX\n",
+				sect, (ulong)addr);
+
+			/* Disable interrupts which might cause a timeout
+			 * here.
+			 */
+			flag = disable_interrupts();
+
+			addr[0] = 0x00500050;	/* clear status register */
+			addr[0] = 0x00200020;	/* erase setup */
+			addr[0] = 0x00D000D0;	/* erase confirm */
+
+			addr[1] = 0x00500050;	/* clear status register */
+			addr[1] = 0x00200020;	/* erase setup */
+			addr[1] = 0x00D000D0;	/* erase confirm */
+
+			/* re-enable interrupts if necessary */
+			if (flag)
+				enable_interrupts();
+
+			/* wait at least 80us - let's wait 1 ms */
+			udelay (1000);
+
+			while (((addr[0] & 0x00800080) != 0x00800080) ||
+			       ((addr[1] & 0x00800080) != 0x00800080) ) {
+				if ((now=get_timer(start)) >
+				           CFG_FLASH_ERASE_TOUT) {
+					printf ("Timeout\n");
+					addr[0] = 0x00B000B0; /* suspend erase */
+					addr[0] = 0x00FF00FF; /* to read mode  */
+					return 1;
+				}
+
+				/* show that we're waiting */
+				if ((now - last) > 1000) {  /* every second  */
+					putc ('.');
+					last = now;
+				}
+			}
+
+			addr[0] = 0x00FF00FF;
+		}
+	}
+	printf (" done\n");
+	return 0;
+}
+
+/*-----------------------------------------------------------------------
+ * Copy memory to flash, returns:
+ * 0 - OK
+ * 1 - write timeout
+ * 2 - Flash not erased
+ * 4 - Flash not identified
+ */
+
+#define	FLASH_WIDTH	8	/* flash bus width in bytes */
+
+int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
+{
+	ulong wp, cp, msr;
+	int l, rc, i;
+	ulong data[2];
+	ulong *datah = &data[0];
+	ulong *datal = &data[1];
+
+	DEBUGF ("Flash write_buff: @ 0x%08lx, src 0x%08lx len %ld\n",
+		addr, (ulong)src, cnt);
+
+	if (info->flash_id == FLASH_UNKNOWN) {
+		return 4;
+	}
+
+	msr = get_msr();
+	set_msr(msr | MSR_FP);
+
+	wp = (addr & ~(FLASH_WIDTH-1));	/* get lower aligned address */
+
+	/*
+	 * handle unaligned start bytes
+	 */
+	if ((l = addr - wp) != 0) {
+		*datah = *datal = 0;
+
+		for (i = 0, cp = wp; i < l; i++, cp++) {
+			if (i >= 4) {
+				*datah = (*datah << 8) |
+				                ((*datal & 0xFF000000) >> 24);
+			}
+
+			*datal = (*datal << 8) | (*(uchar *)cp);
+		}
+		for (; i < FLASH_WIDTH && cnt > 0; ++i) {
+			char tmp;
+
+			tmp = *src;
+
+			src++;
+
+			if (i >= 4) {
+				*datah = (*datah << 8) |
+			                        ((*datal & 0xFF000000) >> 24);
+			}
+
+			*datal = (*datal << 8) | tmp;
+
+			--cnt; ++cp;
+		}
+
+		for (; cnt == 0 && i < FLASH_WIDTH; ++i, ++cp) {
+			if (i >= 4) {
+				*datah = (*datah << 8) |
+				                ((*datal & 0xFF000000) >> 24);
+			}
+
+			*datal = (*datah << 8) | (*(uchar *)cp);
+		}
+
+		if ((rc = write_data(info, wp, data)) != 0) {
+			set_msr(msr);
+			return (rc);
+		}
+
+		wp += FLASH_WIDTH;
+	}
+
+	/*
+	 * handle FLASH_WIDTH aligned part
+	 */
+	while (cnt >= FLASH_WIDTH) {
+		*datah = *(ulong *)src;
+		*datal = *(ulong *)(src + 4);
+		if ((rc = write_data(info, wp, data)) != 0) {
+			set_msr(msr);
+			return (rc);
+		}
+		wp  += FLASH_WIDTH;
+		cnt -= FLASH_WIDTH;
+		src += FLASH_WIDTH;
+	}
+
+	if (cnt == 0) {
+		set_msr(msr);
+		return (0);
+	}
+
+	/*
+	 * handle unaligned tail bytes
+	 */
+	*datah = *datal = 0;
+	for (i = 0, cp = wp; i < FLASH_WIDTH && cnt > 0; ++i, ++cp) {
+		char tmp;
+
+      		tmp = *src;
+
+		src++;
+
+		if (i >= 4) {
+			*datah = (*datah << 8) | ((*datal & 0xFF000000) >> 24);
+		}
+
+		*datal = (*datal << 8) | tmp;
+
+		--cnt;
+	}
+
+	for (; i < FLASH_WIDTH; ++i, ++cp) {
+		if (i >= 4) {
+			*datah = (*datah << 8) | ((*datal & 0xFF000000) >> 24);
+		}
+
+		*datal = (*datal << 8) | (*(uchar *)cp);
+	}
+
+	rc = write_data(info, wp, data);
+	set_msr(msr);
+
+	return (rc);
+}
+
+/*-----------------------------------------------------------------------
+ * Write a word to Flash, returns:
+ * 0 - OK
+ * 1 - write timeout
+ * 2 - Flash not erased
+ */
+static int write_data (flash_info_t *info, ulong dest, ulong *data)
+{
+	vu_long *addr = (vu_long *)dest;
+	ulong start;
+	int flag;
+
+	/* Check if Flash is (sufficiently) erased */
+	if (((addr[0] & data[0]) != data[0]) ||
+	    ((addr[1] & data[1]) != data[1]) ) {
+		return (2);
+	}
+	/* Disable interrupts which might cause a timeout here */
+	flag = disable_interrupts();
+
+	addr[0] = 0x00400040;		/* write setup */
+	write_via_fpu(addr, data);
+
+	/* re-enable interrupts if necessary */
+	if (flag)
+		enable_interrupts();
+
+	start = get_timer (0);
+
+	while (((addr[0] & 0x00800080) != 0x00800080) ||
+	       ((addr[1] & 0x00800080) != 0x00800080) ) {
+		if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
+			addr[0] = 0x00FF00FF;	/* restore read mode */
+			return (1);
+		}
+	}
+
+	addr[0] = 0x00FF00FF;	/* restore read mode */
+
+	return (0);
+}
+
+/*-----------------------------------------------------------------------
+ */
+static void write_via_fpu(vu_long *addr, ulong *data)
+{
+	__asm__ __volatile__ ("lfd  1, 0(%0)" : : "r" (data));
+	__asm__ __volatile__ ("stfd 1, 0(%0)" : : "r" (addr));
+}
+/*-----------------------------------------------------------------------
+ */
+static __inline__ unsigned long get_msr(void)
+{
+    unsigned long msr;
+
+    __asm__ __volatile__ ("mfmsr %0" : "=r" (msr) :);
+    return msr;
+}
+
+static __inline__ void set_msr(unsigned long msr)
+{
+    __asm__ __volatile__ ("mtmsr %0" : : "r" (msr));
+}

board/cpc45/plx9030.c

@@ -0,0 +1,174 @@
+/* Plx9030.c - system configuration module for PLX9030 PCI to Local Bus Bridge */
+/*
+ * (C) Copyright 2002-2003
+ * Josef Wagner, MicroSys GmbH, wagner@microsys.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ *   Date       Modification                                      by
+ * -------      ----------------------------------------------    ---
+ * 30sep02      converted from VxWorks to LINUX                   wa
+*/
+
+
+/*
+DESCRIPTION
+
+This is the configuration module for the PLX9030 PCI to Local Bus Bridge.
+It configures the Chip select lines for SRAM (CS0), ST16C552 (CS1,CS2), Display and local
+registers (CS3) on CPC45.
+*/
+
+/* includes */
+
+#include <common.h>
+#include <malloc.h>
+#include <net.h>
+#include <asm/io.h>
+#include <pci.h>
+
+/* imports */
+
+
+/* defines */
+#define	PLX9030_VENDOR_ID	0x10B5
+#define	PLX9030_DEVICE_ID	0x9030
+
+#undef PLX_DEBUG
+
+/* PLX9030 register offsets  */
+#define	P9030_LAS0RR	0x00
+#define	P9030_LAS1RR 	0x04
+#define	P9030_LAS2RR	0x08
+#define	P9030_LAS3RR	0x0c
+#define	P9030_EROMRR	0x10
+#define	P9030_LAS0BA	0x14
+#define	P9030_LAS1BA	0x18
+#define	P9030_LAS2BA	0x1c
+#define	P9030_LAS3BA	0x20
+#define	P9030_EROMBA	0x24
+#define	P9030_LAS0BRD	0x28
+#define	P9030_LAS1BRD	0x2c
+#define	P9030_LAS2BRD	0x30
+#define	P9030_LAS3BRD	0x34
+#define	P9030_EROMBRD	0x38
+#define	P9030_CS0BASE	0x3C
+#define	P9030_CS1BASE	0x40
+#define	P9030_CS2BASE	0x44
+#define	P9030_CS3BASE	0x48
+#define	P9030_INTCSR 	0x4c
+#define	P9030_CNTRL  	0x50
+#define	P9030_GPIOC	0x54
+
+/* typedefs */
+
+
+/* locals */
+
+static struct pci_device_id supported[] = {
+	{ PLX9030_VENDOR_ID, PLX9030_DEVICE_ID },
+	{ }
+};
+
+/* forward declarations */
+void sysOutLong(ulong address, ulong value);
+
+
+/***************************************************************************
+*
+* Plx9030Init - init CS0..CS3 for CPC45
+*
+*
+* RETURNS: N/A
+*/
+
+void Plx9030Init (void)
+{
+    pci_dev_t   devno;
+    ulong	membaseCsr;	  /* base address of device memory space */
+    int		idx = 0;	  /* general index */
+
+
+    /* find plx9030 device */
+
+    if ((devno = pci_find_devices(supported, idx++)) < 0)
+    {
+	printf("No PLX9030 device found !!\n");
+	return;
+    }
+
+
+#ifdef PLX_DEBUG
+	printf("PLX 9030 device found ! devno = 0x%x\n",devno);
+#endif
+
+	membaseCsr   = PCI_PLX9030_MEMADDR;
+
+	/* set base address */
+	pci_write_config_dword(devno, PCI_BASE_ADDRESS_0, membaseCsr);
+
+	/* enable mapped memory and IO addresses */
+	pci_write_config_dword(devno,
+			       PCI_COMMAND,
+			       PCI_COMMAND_MEMORY |
+			       PCI_COMMAND_MASTER);
+
+
+	/* configure GBIOC */
+	sysOutLong((membaseCsr + P9030_GPIOC),   0x00000FC0);		/* CS2/CS3 enable */
+
+	/* configure CS0 (SRAM) */
+	sysOutLong((membaseCsr + P9030_LAS0BA),  0x00000001);		/* enable space base */
+	sysOutLong((membaseCsr + P9030_LAS0RR),  0x0FE00000);		/* 2 MByte */
+	sysOutLong((membaseCsr + P9030_LAS0BRD), 0x51928900);		/* 4 wait states */
+	sysOutLong((membaseCsr + P9030_CS0BASE), 0x00100001);		/* enable 2 MByte */	
+	/* remap CS0 (SRAM) */
+	pci_write_config_dword(devno, PCI_BASE_ADDRESS_2, SRAM_BASE);
+
+	/* configure CS1 (ST16552 / CHAN A) */
+	sysOutLong((membaseCsr + P9030_LAS1BA),  0x00400001);		/* enable space base */
+	sysOutLong((membaseCsr + P9030_LAS1RR),  0x0FFFFF00);		/* 256 byte */
+	sysOutLong((membaseCsr + P9030_LAS1BRD), 0x55122900);		/* 4 wait states */
+	sysOutLong((membaseCsr + P9030_CS1BASE), 0x00400081);		/* enable 256 Byte */	
+	/* remap CS1 (ST16552 / CHAN A) */
+	/* remap CS1 (ST16552 / CHAN A) */
+	pci_write_config_dword(devno, PCI_BASE_ADDRESS_3, ST16552_A_BASE);
+
+	/* configure CS2 (ST16552 / CHAN B) */
+	sysOutLong((membaseCsr + P9030_LAS2BA),  0x00800001);		/* enable space base */
+	sysOutLong((membaseCsr + P9030_LAS2RR),  0x0FFFFF00);		/* 256 byte */
+	sysOutLong((membaseCsr + P9030_LAS2BRD), 0x55122900);		/* 4 wait states */
+	sysOutLong((membaseCsr + P9030_CS2BASE), 0x00800081);		/* enable 256 Byte */	
+	/* remap CS2 (ST16552 / CHAN B) */
+	pci_write_config_dword(devno, PCI_BASE_ADDRESS_4, ST16552_B_BASE);
+
+	/* configure CS3 (BCSR) */
+	sysOutLong((membaseCsr + P9030_LAS3BA),  0x00C00001);		/* enable space base */
+	sysOutLong((membaseCsr + P9030_LAS3RR),  0x0FFFFF00);		/* 256 byte */
+	sysOutLong((membaseCsr + P9030_LAS3BRD), 0x55357A80);		/* 9 wait states */
+	sysOutLong((membaseCsr + P9030_CS3BASE), 0x00C00081);		/* enable 256 Byte */	
+	/* remap CS3 (DISPLAY and BCSR) */
+	pci_write_config_dword(devno, PCI_BASE_ADDRESS_5, BCSR_BASE);
+}
+
+void sysOutLong(ulong address, ulong value)
+{
+	*(ulong*)address = cpu_to_le32(value);
+}
+

board/cpc45/u-boot.lds

@@ -0,0 +1,128 @@
+/*
+ * (C) Copyright 2001-2003
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_ARCH(powerpc)
+SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
+/* Do we need any of these for elf?
+   __DYNAMIC = 0;    */
+SECTIONS
+{
+  /* Read-only sections, merged into text segment: */
+  . = + SIZEOF_HEADERS;
+  .interp : { *(.interp) }
+  .hash          : { *(.hash)		}
+  .dynsym        : { *(.dynsym)		}
+  .dynstr        : { *(.dynstr)		}
+  .rel.text      : { *(.rel.text)		}
+  .rela.text     : { *(.rela.text) 	}
+  .rel.data      : { *(.rel.data)		}
+  .rela.data     : { *(.rela.data) 	}
+  .rel.rodata    : { *(.rel.rodata) 	}
+  .rela.rodata   : { *(.rela.rodata) 	}
+  .rel.got       : { *(.rel.got)		}
+  .rela.got      : { *(.rela.got)		}
+  .rel.ctors     : { *(.rel.ctors)	}
+  .rela.ctors    : { *(.rela.ctors)	}
+  .rel.dtors     : { *(.rel.dtors)	}
+  .rela.dtors    : { *(.rela.dtors)	}
+  .rel.bss       : { *(.rel.bss)		}
+  .rela.bss      : { *(.rela.bss)		}
+  .rel.plt       : { *(.rel.plt)		}
+  .rela.plt      : { *(.rela.plt)		}
+  .init          : { *(.init)	}
+  .plt : { *(.plt) }
+  .text      :
+  {
+    cpu/mpc824x/start.o	(.text)
+    lib_ppc/board.o (.text)
+    lib_ppc/ppcstring.o	(.text)
+    lib_generic/vsprintf.o	(.text)
+    lib_generic/crc32.o		(.text)
+    lib_generic/zlib.o		(.text)
+
+		. = DEFINED(env_offset) ? env_offset : .;
+    common/environment.o (.text)
+
+		*(.text)
+
+    *(.fixup)
+    *(.got1)
+    . = ALIGN(16);
+    *(.rodata)
+    *(.rodata1)
+  }
+  .fini      : { *(.fini)    } =0
+  .ctors     : { *(.ctors)   }
+  .dtors     : { *(.dtors)   }
+
+  /* Read-write section, merged into data segment: */
+  . = (. + 0x0FFF) & 0xFFFFF000;
+  _erotext = .;
+  PROVIDE (erotext = .);
+  .reloc   :
+  {
+    *(.got)
+    _GOT2_TABLE_ = .;
+    *(.got2)
+    _FIXUP_TABLE_ = .;
+    *(.fixup)
+  }
+  __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
+  __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
+
+  .data    :
+  {
+    *(.data)
+    *(.data1)
+    *(.sdata)
+    *(.sdata2)
+    *(.dynamic)
+    CONSTRUCTORS
+  }
+  _edata  =  .;
+  PROVIDE (edata = .);
+
+  __start___ex_table = .;
+  __ex_table : { *(__ex_table) }
+  __stop___ex_table = .;
+
+  . = ALIGN(4096);
+  __init_begin = .;
+  .text.init : { *(.text.init) }
+  .data.init : { *(.data.init) }
+  . = ALIGN(4096);
+  __init_end = .;
+
+  __bss_start = .;
+  .bss       :
+  {
+   *(.sbss) *(.scommon)
+   *(.dynbss)
+   *(.bss)
+   *(COMMON)
+  }
+
+  _end = . ;
+  PROVIDE (end = .);
+}
+

board/cpu86/flash.c

@@ -218,14 +218,14 @@ unsigned long flash_init (void)
 
 		flash_protect  (FLAG_PROTECT_SET,
 				CFG_MONITOR_BASE,
-				CFG_MONITOR_BASE + CFG_MONITOR_LEN - 1, &flash_info[1]
+				CFG_MONITOR_BASE + monitor_flash_len - 1, &flash_info[1]
 		);
 	}
 #else
 #if CFG_MONITOR_BASE >= CFG_FLASH_BASE
 	flash_protect (FLAG_PROTECT_SET,
 		       CFG_MONITOR_BASE,
-		       CFG_MONITOR_BASE + CFG_MONITOR_LEN - 1, &flash_info[0]
+		       CFG_MONITOR_BASE + monitor_flash_len - 1, &flash_info[0]
 	);
 #endif
 #endif

board/cradle/flash.c

@@ -73,7 +73,7 @@ ulong flash_init(void)
     */
    flash_protect(FLAG_PROTECT_SET,
                   CFG_FLASH_BASE,
-                  CFG_FLASH_BASE + _armboot_end_data - _armboot_start,
+                  CFG_FLASH_BASE + monitor_flash_len - 1,
                   &flash_info[0]);
 
    flash_protect(FLAG_PROTECT_SET,

board/cradle/u-boot.lds

@@ -31,7 +31,7 @@ SECTIONS
         . = ALIGN(4);
 	.text      :
 	{
-	  cpu/xscale/start.o	(.text)
+	  cpu/pxa/start.o	(.text)
 	  *(.text)
 	}
 
@@ -47,7 +47,9 @@ SECTIONS
 	armboot_end_data = .;
 
         . = ALIGN(4);
+	bss_start = .;
         .bss : { *(.bss) }
+	bss_end = .;
 
 	armboot_end = .;
 }

board/cray/L1/L1.c

@@ -27,7 +27,9 @@
 #include <command.h>
 #include <cmd_nvedit.h>
 #include <cmd_bootm.h>
+#include <cmd_boot.h>
 #include <rtc.h>
+#include <post.h>
 #include <net.h>
 #include <malloc.h>
 
@@ -53,17 +55,19 @@
  * space.
  * on the server this looks like:
  *
- * option space U-Boot;
- * option U-Boot.initrd    code 3 = string;
- * option U-Boot.bootcmd   code 4 = string;
- * option U-Boot.bootflags code 5 = string;
- * option U-Boot.rootdev   code 6 = string;
+ * option space CRAYL1;
+ * option CRAYL1.initrd     code 3 = string;
+ * ..etc...
  */
 #define DHCP_VENDOR_SPECX   43
 #define DHCP_VX_INITRD       3
 #define DHCP_VX_BOOTCMD      4
-#define DHCP_VX_BOOTFLAGS    5
+#define DHCP_VX_BOOTARGS     5
 #define DHCP_VX_ROOTDEV      6
+#define DHCP_VX_FROMFLASH    7
+#define DHCP_VX_BOOTSCRIPT   8
+#define DHCP_VX_RCFILE	     9
+#define DHCP_VX_MAGIC        10
 
 /* Things DHCP server can tellme about.  If there's no flash address, then
  * they dont participate in 'update' to flash, and we force their values
@@ -89,18 +93,29 @@ static dhcp_item_t Things[] = {
 /* and the other way.. */
 	{DHCP_VENDOR_SPECX, DHCP_VX_INITRD, NULL, "initrd"},
 	{DHCP_VENDOR_SPECX, DHCP_VX_BOOTCMD, NULL, "bootcmd"},
-	{DHCP_VENDOR_SPECX, DHCP_VX_BOOTFLAGS, NULL, NULL},
+	{DHCP_VENDOR_SPECX, DHCP_VX_FROMFLASH, NULL, "fromflash"},
+	{DHCP_VENDOR_SPECX, DHCP_VX_BOOTSCRIPT, NULL, "bootscript"},
+	{DHCP_VENDOR_SPECX, DHCP_VX_RCFILE, NULL, "rcfile"},
+	{DHCP_VENDOR_SPECX, DHCP_VX_BOOTARGS, NULL, "xbootargs"},
 	{DHCP_VENDOR_SPECX, DHCP_VX_ROOTDEV, NULL, NULL},
+	{DHCP_VENDOR_SPECX, DHCP_VX_MAGIC, NULL, NULL}
 };
 
 #define N_THINGS ((sizeof(Things))/(sizeof(dhcp_item_t)))
 
-static void init_ecc_sdram (void);
+extern char bootscript[];
+
+/* Here is the boot logic as HUSH script. Overridden by any TFP provided
+ * bootscript file.
+ */
+
+static void init_sdram (void);
 
 /* ------------------------------------------------------------------------- */
 int board_pre_init (void)
 {
-	init_ecc_sdram ();
+	/* Running from ROM: global data is still READONLY */
+	init_sdram ();
 	mtdcr (uicsr, 0xFFFFFFFF);	/* clear all ints */
 	mtdcr (uicer, 0x00000000);	/* disable all ints */
 	mtdcr (uiccr, 0x00000020);	/* set all but FPGA SMI to be non-critical */
@@ -116,6 +131,7 @@ int checkboard (void)
 {
 	return (0);
 }
+/* ------------------------------------------------------------------------- */
 
 /* ------------------------------------------------------------------------- */
 int misc_init_r (void)
@@ -124,6 +140,7 @@ int misc_init_r (void)
 	image_header_t *hdr;
 	time_t timestamp;
 	struct rtc_time tm;
+	char bootcmd[32];
 
 	hdr = (image_header_t *) (CFG_MONITOR_BASE - sizeof (image_header_t));
 	timestamp = (time_t) hdr->ih_time;
@@ -143,6 +160,8 @@ int misc_init_r (void)
 			setenv ("ethaddr", e);
 		}
 	}
+	sprintf (bootcmd,"autoscript %X",(unsigned)bootscript);
+	setenv ("bootcmd", bootcmd);
 	return (0);
 }
 
@@ -168,11 +187,11 @@ void rtc_reset (void)
 }
 
 /* ------------------------------------------------------------------------- */
-/*  Do sdram bank init in C so I can read it..
+/*  Do sdram bank init in C so I can read it..no console to print to yet!
  */
-static void init_ecc_sdram (void)
+static void init_sdram (void)
 {
-	unsigned long tmp, *p;
+ unsigned long tmp;
 
 	/* write SDRAM bank 0 register */
 	mtdcr (memcfga, mem_mb0cf);
@@ -202,33 +221,78 @@ static void init_ecc_sdram (void)
 	mtdcr (memcfgd, 0x90800000);
 	udelay (200);
 
-/* disable ECC on all banks */
+/* initially, disable ECC on all banks */
+	udelay (200);
 	mtdcr (memcfga, mem_ecccf);
 	tmp = mfdcr (memcfgd);
 	tmp &= 0xff0fffff;
 	mtdcr (memcfga, mem_ecccf);
 	mtdcr (memcfgd, tmp);
 
-/* set up SDRAM Controller with ECC enabled */
+	return;
+}
+
+extern int memory_post_test (int flags);
+
+int testdram (void)
+{
+ unsigned long tmp;
+	uint *pstart = (uint *) 0x00000000;
+	uint *pend = (uint *) L1_MEMSIZE;
+	uint *p;
+
+	if (getenv_r("booted",NULL,0) <= 0)
+	{
+		printf ("testdram..");
+	/*AA*/
+		for (p = pstart; p < pend; p++)
+			*p = 0xaaaaaaaa;
+		for (p = pstart; p < pend; p++) {
+			if (*p != 0xaaaaaaaa) {
+				printf ("SDRAM test fails at: %08x, was %08x expected %08x\n", 
+						(uint) p, *p, 0xaaaaaaaa);
+				return 1;
+			}
+		}
+	/*55*/
+		for (p = pstart; p < pend; p++)
+			*p = 0x55555555;
+		for (p = pstart; p < pend; p++) {
+			if (*p != 0x55555555) {
+				printf ("SDRAM test fails at: %08x, was %08x expected %08x\n", 
+						(uint) p, *p, 0x55555555);
+				return 1;
+			}
+		}
+	/*addr*/
+		for (p = pstart; p < pend; p++)
+			*p = (unsigned)p;
+		for (p = pstart; p < pend; p++) {
+			if (*p != (unsigned)p) {
+				printf ("SDRAM test fails at: %08x, was %08x expected %08x\n", 
+						(uint) p, *p, (uint)p);
+				return 1;
+			}
+		}
+		printf ("Success. ");
+	}
+	printf ("Enable ECC..");
+
 	mtdcr (memcfga, mem_mcopt1);
 	tmp = (mfdcr (memcfgd) & ~0xFFE00000) | 0x90800000;
 	mtdcr (memcfga, mem_mcopt1);
 	mtdcr (memcfgd, tmp);
 	udelay (600);
-
-/* fill all the memory */
-	for (p = (unsigned long) 0; ((unsigned long) p < L1_MEMSIZE);
-		 *p++ = 0L);
+	for (p = (unsigned long) 0; ((unsigned long) p < L1_MEMSIZE); *p++ = 0L)
+		;
 	udelay (400);
 	mtdcr (memcfga, mem_ecccf);
 	tmp = mfdcr (memcfgd);
-
-/* enable ECC on bank 0 */
 	tmp |= 0x00800000;
 	mtdcr (memcfgd, tmp);
 	udelay (400);
-
-	return;
+	printf ("enabled.\n");
+	return (0);
 }
 
 /* ------------------------------------------------------------------------- */
@@ -250,7 +314,9 @@ static u8 *dhcp_env_update (u8 thing, u8 * pop)
 
 /* set env. */
 	if (Things[thing].envname)
+	{
 		setenv (Things[thing].envname, Things[thing].dhcpvalue);
+	}
 	return (Things[thing].dhcpvalue);
 }
 
@@ -285,9 +351,9 @@ u8 *dhcp_vendorex_proc (u8 * pop)
 		     oplen -= sub_oplen, sub_op += (sub_oplen + 2)) {
 			for (thing = 0; thing < N_THINGS; thing++) {
 			    if (*sub_op == Things[thing].dhcp_vendor_option) {
-				if (!(retval = dhcp_env_update (thing, sub_op))) {
-					return NULL;
-				}
+					if (!(retval = dhcp_env_update (thing, sub_op))) {
+						return NULL;
+					}
 			    }
 			}
 		}
@@ -298,5 +364,5 @@ u8 *dhcp_vendorex_proc (u8 * pop)
 					return NULL;
 		}
 	}
-	return (thing >= N_THINGS ? NULL : pop);
+	return (pop);
 }

board/cray/L1/Makefile

@@ -26,17 +26,27 @@ include $(TOPDIR)/config.mk
 LIB	= lib$(BOARD).a
 
 OBJS	= $(BOARD).o flash.o
-SOBJS	= init.o
+SOBJS	= init.o 
 
-$(LIB):	$(OBJS) $(SOBJS)
+# HACK: depend needs bootscript.c, which needs tools/mkimage, which is not
+# built in the depend stage.  So... put bootscript.o here, not in OBJS
+$(LIB):	$(OBJS) $(SOBJS) bootscript.o
 	$(AR) crv $@ $^
 
 clean:
-	rm -f $(SOBJS) $(OBJS)
+	rm -f $(SOBJS) $(OBJS) bootscript.c bootscript.image bootscript.o
 
 distclean:	clean
 	rm -f $(LIB) core *.bak .depend
 
+$(BOARD).o : $(BOARD).c bootscript.o
+
+bootscript.c: bootscript.image
+	od -t x1 -v -A x $^ | awk -f x2c.awk > $@
+
+bootscript.image: bootscript.hush Makefile
+	-$(TOPDIR)/tools/mkimage -A ppc -O linux -T script -C none -a 0 -e 0 -n bootscript -d  bootscript.hush $@
+
 #########################################################################
 
 .depend:	Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)

board/cray/L1/bootscript.hush

@@ -0,0 +1,117 @@
+# $Header$
+# hush bootscript for PPCBOOT on L1
+# note: all #s are in hex, do _NOT_ prefix it with 0x
+
+flash_rfs=ffc00000
+flash_krl=fff00000
+tftp_addr=100000
+tftp2_addr=1000000
+
+if printenv booted
+then
+	echo already booted before
+else
+	echo first boot in environment, create and save settings
+	setenv booted OK
+	saveenv
+fi
+
+setenv autoload no
+# clear out stale env stuff, so we get fresh from dhcp.
+for setting in initrd fromflash kernel rootfs rootpath
+do
+setenv $setting
+done
+
+dhcp
+
+# if host provides us with a different bootscript, us it.
+if printenv bootscript
+	then
+	tftp $tftp_addr $bootcript
+	if imi $tftp_addr
+	then
+		autoscript $tftp_addr
+	fi
+fi
+
+# default base kernel arguments.
+setenv bootargs $xbootargs devfs=mount ip=$ipaddr:$serverip:$gatewayip:$netmask:L1:eth0:off wdt=120
+
+# Have a kernel in flash?
+if imi $flash_krl
+then
+	echo ok kernel to boot from $flash_krl
+	setenv kernel $flash_krl
+else
+	echo no kernel to boot from $flash_krl, need tftp
+fi
+
+# Have a rootfs in flash? 
+echo test for SQUASHfs at $flash_rfs
+
+if imi $flash_rfs
+then
+	echo appears to be a good initrd image at base of flash OK
+	setenv rootfs $flash_rfs
+else
+	echo no image at base of flash, need nfsroot or initrd
+fi
+
+# I boot from flash if told to and I can.
+if printenv fromflash && printenv kernel && printenv rootfs
+then
+	echo booting entirely from flash
+	setenv bootargs root=/dev/ram0 rw $bootargs
+	bootm $kernel $rootfs
+	echo oh no failed so I try some other stuff
+fi
+
+# TFTP down a kernel
+if printenv bootfile
+then 
+	tftp $tftp_addr $bootfile
+	setenv kernel $tftp_addr
+	echo I will boot the TFTP kernel
+else
+	if printenv kernel
+	then
+		echo no bootfile specified, will use one from flash
+	else
+		setenv bootfile /opt/crayx1/craymcu/l1/flash/linux.image
+		echo OH NO! we have no bootfile,nor flash kernel! try default: $bootfile
+		tftp $tftp_addr $bootfile
+		setenv kernel $tftp_addr
+	fi
+fi
+
+# the rootfs.
+if printenv rootpath
+then
+	echo rootpath is $rootpath
+	if printenv initrd
+	then 
+		echo initrd is also specified, so use $initrd
+		tftp $tftp2_addr $initrd
+		setenv bootargs root=/dev/ram0 rw cwsroot=$serverip:$rootpath $bootargs
+		bootm $kernel $tftp2_addr
+	else
+		echo initrd is not specified, so use NFSROOT $rootpat
+		setenv bootargs root=/dev/nfs ro nfsroot=$serverip:$rootpath $bootargs
+		bootm $kernel
+	fi
+else
+	echo we have no rootpath check for one in flash
+	if printenv rootfs
+	then
+		echo I will use the one in flash
+		setenv bootargs root=/dev/mtdblock/0 ro rootfstype=squashfs $bootargs
+		bootm $kernel
+	else
+		setenv rootpath /export/crayl1
+		echo OH NO! we have no rootpath,nor flash kernel! try default: $rootpath
+		setenv bootargs root=/dev/mtdblock/0 ro rootfstype=squashfs $bootargs
+		bootm $kernel
+	fi
+fi
+reset

board/cray/L1/flash.c

@@ -88,7 +88,7 @@ unsigned long flash_init (void)
 	    /* Monitor protection ON by default */
 	    (void)flash_protect(FLAG_PROTECT_SET,
 				FLASH_BASE0_PRELIM,
-				FLASH_BASE0_PRELIM+CFG_MONITOR_LEN-1,
+				FLASH_BASE0_PRELIM+monitor_flash_len-1,
 				&flash_info[0]);
 #endif
 	    size_b1 = 0 ;

board/cray/L1/patchme

@@ -0,0 +1,30 @@
+# master confi.mk
+echo "CROSS_COMPILE = powerpc-linux-"	>>include/config.mk
+
+# patch the examples/Makefile to ignore return value from OBJCOPY
+sed  -e 's/$(OBJCOPY)/-&/' < examples/Makefile > examples/makefile
+
+# add a built target for mkimage on the target architecture
+sed  -e 's/^all:.*$/all: .depend envcrc mkimage mkimage.ppc/' < tools/Makefile > tools/makefile
+
+cat <<EOF >>tools/makefile
+mkimage.ppc : mkimage.o.ppc crc32.o.ppc
+	powerpc-linux-gcc -msoft-float -Wall -Wstrict-prototypes -o \$@ \$^
+	powerpc-linux-strip $@
+
+XFLAGS="-D__KERNEL__  -I../include -DCONFIG_4xx -Wall -Wstict-prototypes"
+mkimage.o.ppc: mkimage.c
+	powerpc-linux-gcc -msoft-float -Wall -I../include -c -o \$@ \$^
+
+crc32.o.ppc: crc32.c
+	powerpc-linux-gcc -msoft-float -Wall -I../include -c -o \$@ \$^
+
+EOF
+
+# make an image by default out of the u-boot image
+sed  -e 's/^all:.*$/all: u-boot.image /' < Makefile > makefile
+cat <<EOF >>makefile
+u-boot.image:  u-boot.bin
+	tools/mkimage -A ppc -O linux -T firmware -C none -a 0 -e 0 -n U-Boot -d \$^ \$@
+
+EOF

board/cray/L1/x2c.awk

@@ -0,0 +1,6 @@
+#!/bin/awk
+BEGIN { print "unsigned char bootscript[] = { \n"}
+{ for (i = 2; i <= NF ; i++ ) printf "0x"$i","
+  print ""
+}
+END { print "\n};\n" }

board/csb226/csb226.c

@@ -32,10 +32,30 @@
 # define SHOW_BOOT_PROGRESS(arg)
 #endif
 
-/*
- * Miscelaneous platform dependent initialisations
+/** 
+ * misc_init_r: - misc initialisation routines
  */
 
+int misc_init_r(void)
+{
+#if 0	
+	uchar *str;
+	
+	/* determine if the software update key is pressed during startup */
+	/* not ported yet... */
+	if (GPLR0 & 0x00000800) {
+		printf("using bootcmd_normal (sw-update button not pressed)\n");
+		str = getenv("bootcmd_normal");
+	} else {
+		printf("using bootcmd_update (sw-update button pressed)\n");
+		str = getenv("bootcmd_update");
+	}
+
+	setenv("bootcmd",str);
+#endif	
+	return 0;
+}	
+
 
 /** 
  * board_init: - setup some data structures

board/csb226/flash.c

@@ -45,44 +45,44 @@ flash_info_t    flash_info[CFG_MAX_FLASH_BANKS];
 
 ulong flash_init(void)
 {
-    int i, j;
-    ulong size = 0;
+	int i, j;
+	ulong size = 0;
 
 	for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) {
-	ulong flashbase = 0;
-	flash_info[i].flash_id =
-	  (INTEL_MANUFACT & FLASH_VENDMASK) |
-	  (INTEL_ID_28F128J3 & FLASH_TYPEMASK);
-	flash_info[i].size = FLASH_BANK_SIZE;
-	flash_info[i].sector_count = CFG_MAX_FLASH_SECT;
-	memset(flash_info[i].protect, 0, CFG_MAX_FLASH_SECT);
+		ulong flashbase = 0;
+		flash_info[i].flash_id =
+	  		(INTEL_MANUFACT & FLASH_VENDMASK) |
+	  		(INTEL_ID_28F128J3 & FLASH_TYPEMASK);
+		flash_info[i].size = FLASH_BANK_SIZE;
+		flash_info[i].sector_count = CFG_MAX_FLASH_SECT;
+		memset(flash_info[i].protect, 0, CFG_MAX_FLASH_SECT);
 
 		switch (i) {
-           case 0:
-	        flashbase = PHYS_FLASH_1;
-                break;
-           default:
-	        panic("configured to many flash banks!\n");
-                break;
-        }
+			case 0:
+				flashbase = PHYS_FLASH_1;
+				break;
+			default:
+				panic("configured to many flash banks!\n");
+				break;
+		}
 		for (j = 0; j < flash_info[i].sector_count; j++) {
-	    flash_info[i].start[j] = flashbase + j*MAIN_SECT_SIZE;
+			flash_info[i].start[j] = flashbase + j*MAIN_SECT_SIZE;
+		}
+		size += flash_info[i].size;
 	}
-	size += flash_info[i].size;
-    }
 
 	/* Protect monitor and environment sectors */
-    flash_protect(FLAG_PROTECT_SET,
-		  CFG_FLASH_BASE,
-		  CFG_FLASH_BASE + _armboot_end_data - _armboot_start,
-		  &flash_info[0]);
+	flash_protect(FLAG_PROTECT_SET,
+			CFG_FLASH_BASE,
+			CFG_FLASH_BASE + monitor_flash_len - 1,
+			&flash_info[0]);
 
-    flash_protect(FLAG_PROTECT_SET,
-		  CFG_ENV_ADDR,
-		  CFG_ENV_ADDR + CFG_ENV_SIZE - 1,
-		  &flash_info[0]);
+	flash_protect(FLAG_PROTECT_SET,
+			CFG_ENV_ADDR,
+			CFG_ENV_ADDR + CFG_ENV_SIZE - 1,
+			&flash_info[0]);
 
-    return size;
+	return size;
 }
 
 
@@ -94,43 +94,43 @@ ulong flash_init(void)
 
 void flash_print_info  (flash_info_t *info)
 {
-    int i, j;
+	int i, j;
 
 	for (j=0; j<CFG_MAX_FLASH_BANKS; j++) {
 
 		switch (info->flash_id & FLASH_VENDMASK) {
 
-        case (INTEL_MANUFACT & FLASH_VENDMASK):
-	        printf("Intel: ");
-	        break;
-        default:
-	        printf("Unknown Vendor ");
-	        break;
-        }
+			case (INTEL_MANUFACT & FLASH_VENDMASK):
+				printf("Intel: ");
+				break;
+			default:
+				printf("Unknown Vendor ");
+				break;
+		}
 
 		switch (info->flash_id & FLASH_TYPEMASK) {
 
-        case (INTEL_ID_28F128J3 & FLASH_TYPEMASK):
-	        printf("28F128J3 (128Mbit)\n");
-	        break;
-        default:
-	        printf("Unknown Chip Type\n");
+			case (INTEL_ID_28F128J3 & FLASH_TYPEMASK):
+				printf("28F128J3 (128Mbit)\n");
+				break;
+			default:
+				printf("Unknown Chip Type\n");
 				return;
-        }
+		}
 
-        printf("  Size: %ld MB in %d Sectors\n",
-	        info->size >> 20, info->sector_count);
+		printf("  Size: %ld MB in %d Sectors\n", 
+			info->size >> 20, info->sector_count);
 
-        printf("  Sector Start Addresses:");
+		printf("  Sector Start Addresses:");
 		for (i = 0; i < info->sector_count; i++) {
 			if ((i % 5) == 0) printf ("\n   ");
 	        
-	        printf (" %08lX%s", info->start[i],
-		        info->protect[i] ? " (RO)" : "     ");
-        }
-        printf ("\n");
-        info++;
-    }
+			printf (" %08lX%s", info->start[i],
+				info->protect[i] ? " (RO)" : "     ");
+		}
+		printf ("\n");
+		info++;
+	}
 }
 
 
@@ -139,46 +139,47 @@ void flash_print_info  (flash_info_t *info)
  *
  */
 
-int	flash_erase (flash_info_t *info, int s_first, int s_last)
+int flash_erase(flash_info_t *info, int s_first, int s_last)
 {
-    int flag, prot, sect;
-    int rc = ERR_OK;
+	int flag, prot, sect;
+	int rc = ERR_OK;
 
-    if (info->flash_id == FLASH_UNKNOWN)
-	return ERR_UNKNOWN_FLASH_TYPE;
+	if (info->flash_id == FLASH_UNKNOWN)
+		return ERR_UNKNOWN_FLASH_TYPE;
 
-    if ((s_first < 0) || (s_first > s_last)) {
-	return ERR_INVAL;
-    }
+	if ((s_first < 0) || (s_first > s_last)) {
+		return ERR_INVAL;
+	}
 
 	if ((info->flash_id & FLASH_VENDMASK) != (INTEL_MANUFACT & FLASH_VENDMASK))
-	return ERR_UNKNOWN_FLASH_VENDOR;
-
-    prot = 0;
-    for (sect=s_first; sect<=s_last; ++sect) {
+		return ERR_UNKNOWN_FLASH_VENDOR;
+	
+	prot = 0;
+	for (sect=s_first; sect<=s_last; ++sect) {
 		if (info->protect[sect]) prot++;
 	}
 
 	if (prot) return ERR_PROTECTED;
 
-    /*
-     * Disable interrupts which might cause a timeout
-     * here. Remember that our exception vectors are
-     * at address 0 in the flash, and we don't want a
-     * (ticker) exception to happen while the flash
-     * chip is in programming mode.
-     */
-    flag = disable_interrupts();
+	/*
+	 * Disable interrupts which might cause a timeout
+	 * here. Remember that our exception vectors are
+	 * at address 0 in the flash, and we don't want a
+	 * (ticker) exception to happen while the flash
+	 * chip is in programming mode.
+	 */
 
-    /* Start erase on unprotected sectors */
-    for (sect = s_first; sect<=s_last && !ctrlc(); sect++) {
+	flag = disable_interrupts();
 
-	printf("Erasing sector %2d ... ", sect);
+	/* Start erase on unprotected sectors */
+	for (sect = s_first; sect<=s_last && !ctrlc(); sect++) {
 
-	/* arm simple, non interrupt dependent timer */
-	reset_timer_masked();
+		printf("Erasing sector %2d ... ", sect);
 
-	if (info->protect[sect] == 0) {	/* not protected */
+		/* arm simple, non interrupt dependent timer */
+		reset_timer_masked();
+
+		if (info->protect[sect] == 0) {	/* not protected */
 			u32 * volatile addr = (u32 * volatile)(info->start[sect]);
 
 			/* erase sector:                                    */
@@ -190,32 +191,32 @@ int	flash_erase (flash_info_t *info, int s_first, int s_last)
 			*addr = 0x00D000D0;	/* erase confirm */
 
 			while ((*addr & 0x00800080) != 0x00800080) {
-		if (get_timer_masked() > CFG_FLASH_ERASE_TOUT) {
+				if (get_timer_masked() > CFG_FLASH_ERASE_TOUT) {
 					*addr = 0x00B000B0; /* suspend erase*/
 					*addr = 0x00FF00FF; /* read mode    */
-		    rc = ERR_TIMOUT;
-		    goto outahere;
-		}
-	    }
+					rc = ERR_TIMOUT;
+					goto outahere;
+				}
+			}
 
 			*addr = 0x00500050; /* clear status register cmd.   */
 			*addr = 0x00FF00FF; /* resest to read mode          */
 
-	}
+		}
 		
-	printf("ok.\n");
-    }
+		printf("ok.\n");
+	}
 
 	if (ctrlc()) printf("User Interrupt!\n");
 
-outahere:
+	outahere:
 
-    /* allow flash to settle - wait 10 ms */
-    udelay_masked(10000);
+	/* allow flash to settle - wait 10 ms */
+	udelay_masked(10000);
 
 	if (flag) enable_interrupts();
 
-    return rc;
+	return rc;
 }
 
 
@@ -230,71 +231,71 @@ outahere:
 
 static int write_word (flash_info_t *info, ulong dest, ushort data)
 {
-    ushort *addr = (ushort *)dest, val;
-    int rc = ERR_OK;
-    int flag;
+	u32 * volatile addr = (u32 * volatile)dest, val;
+	int rc = ERR_OK;
+	int flag;
 
 	/* Check if Flash is (sufficiently) erased */
 	if ((*addr & data) != data) return ERR_NOT_ERASED;
 
-    /*
-     * Disable interrupts which might cause a timeout
-     * here. Remember that our exception vectors are
-     * at address 0 in the flash, and we don't want a
-     * (ticker) exception to happen while the flash
-     * chip is in programming mode.
-     */
-    flag = disable_interrupts();
+	/*
+	 * Disable interrupts which might cause a timeout
+	 * here. Remember that our exception vectors are
+	 * at address 0 in the flash, and we don't want a
+	 * (ticker) exception to happen while the flash
+	 * chip is in programming mode.
+	 */
+	flag = disable_interrupts();
 
-    /* clear status register command */
-    *addr = 0x50;
+	/* clear status register command */
+	*addr = 0x50;
 
-    /* program set-up command */
-    *addr = 0x40;
+	/* program set-up command */
+	*addr = 0x40;
 
-    /* latch address/data */
-    *addr = data;
+	/* latch address/data */
+	*addr = data;
 
-    /* arm simple, non interrupt dependent timer */
-    reset_timer_masked();
+	/* arm simple, non interrupt dependent timer */
+	reset_timer_masked();
 
-    /* wait while polling the status register */
+	/* wait while polling the status register */
 	while(((val = *addr) & 0x80) != 0x80) {
-	if (get_timer_masked() > CFG_FLASH_WRITE_TOUT) {
-	    rc = ERR_TIMOUT;
+		if (get_timer_masked() > CFG_FLASH_WRITE_TOUT) {
+			rc = ERR_TIMOUT;
 			*addr = 0xB0; /* suspend program command */
-	    goto outahere;
+			goto outahere;
+		}
 	}
-    }
 
-    if(val & 0x1A) {	/* check for error */
-        printf("\nFlash write error %02x at address %08lx\n",
-    	   (int)val, (unsigned long)dest);
-        if(val & (1<<3)) {
-	    printf("Voltage range error.\n");
-	    rc = ERR_PROG_ERROR;
-	    goto outahere;
-        }
-        if(val & (1<<1)) {
-	    printf("Device protect error.\n");
-	    rc = ERR_PROTECTED;
-	    goto outahere;
-        }
-        if(val & (1<<4)) {
-	    printf("Programming error.\n");
-	    rc = ERR_PROG_ERROR;
-	    goto outahere;
-        }
-        rc = ERR_PROG_ERROR;
-        goto outahere;
-    }
+	if(val & 0x1A) {	/* check for error */
+		printf("\nFlash write error %02x at address %08lx\n",
+			(int)val, (unsigned long)dest);
+		if(val & (1<<3)) {
+			printf("Voltage range error.\n");
+			rc = ERR_PROG_ERROR;
+			goto outahere;
+		}
+		if(val & (1<<1)) {
+			printf("Device protect error.\n");
+			rc = ERR_PROTECTED;
+			goto outahere;
+		}
+		if(val & (1<<4)) {
+			printf("Programming error.\n");
+			rc = ERR_PROG_ERROR;
+			goto outahere;
+		}
+		rc = ERR_PROG_ERROR;
+		goto outahere;
+	}
 
-outahere:
+	outahere:
 
 	*addr = 0xFF; /* read array command */
 	if (flag) enable_interrupts();
 
-    return rc;
+	return rc;
 }
 
 
@@ -311,63 +312,64 @@ outahere:
 
 int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
 {
-    ulong cp, wp;
-    ushort data;
-    int l;
-    int i, rc;
+	ulong cp, wp;
+	ushort data;
+	int l;
+	int i, rc;
 
-    wp = (addr & ~1);	/* get lower word aligned address */
+	wp = (addr & ~1);	/* get lower word aligned address */
 
-    /*
-     * handle unaligned start bytes
-     */
-    if ((l = addr - wp) != 0) {
-	data = 0;
-	for (i=0, cp=wp; i<l; ++i, ++cp) {
-	    data = (data >> 8) | (*(uchar *)cp << 8);
-	}
-	for (; i<2 && cnt>0; ++i) {
-	    data = (data >> 8) | (*src++ << 8);
-	    --cnt;
-	    ++cp;
-	}
-	for (; cnt==0 && i<2; ++i, ++cp) {
-	    data = (data >> 8) | (*(uchar *)cp << 8);
+	/*
+	 * handle unaligned start bytes
+	 */
+	if ((l = addr - wp) != 0) {
+		data = 0;
+		for (i=0, cp=wp; i<l; ++i, ++cp) {
+			data = (data >> 8) | (*(uchar *)cp << 8);
+		}
+		for (; i<2 && cnt>0; ++i) {
+			data = (data >> 8) | (*src++ << 8);
+			--cnt;
+			++cp;
+		}
+		for (; cnt==0 && i<2; ++i, ++cp) {
+			data = (data >> 8) | (*(uchar *)cp << 8);
+		}
+
+		if ((rc = write_word(info, wp, data)) != 0) {
+			return (rc);
+		}
+		wp += 2;
 	}
 
-	if ((rc = write_word(info, wp, data)) != 0) {
-	    return (rc);
+	/*
+	 * handle word aligned part
+	 */
+	while (cnt >= 2) {
+		/* data = *((vushort*)src); */
+		data = *((ushort*)src);
+		if ((rc = write_word(info, wp, data)) != 0) {
+			return (rc);
+		}
+		src += 2;
+		wp  += 2;
+		cnt -= 2;
 	}
-	wp += 2;
-    }
-
-    /*
-     * handle word aligned part
-     */
-    while (cnt >= 2) {
-	/* data = *((vushort*)src); */
-	data = *((ushort*)src);
-	if ((rc = write_word(info, wp, data)) != 0) {
-	    return (rc);
-	}
-	src += 2;
-	wp  += 2;
-	cnt -= 2;
-    }
 
 	if (cnt == 0) return ERR_OK;
 
-    /*
-     * handle unaligned tail bytes
-     */
-    data = 0;
-    for (i=0, cp=wp; i<2 && cnt>0; ++i, ++cp) {
-	data = (data >> 8) | (*src++ << 8);
-	--cnt;
-    }
-    for (; i<2; ++i, ++cp) {
-	data = (data >> 8) | (*(uchar *)cp << 8);
-    }
+	/*
+	 * handle unaligned tail bytes
+	 */
+	data = 0;
+	for (i=0, cp=wp; i<2 && cnt>0; ++i, ++cp) {
+		data = (data >> 8) | (*src++ << 8);
+		--cnt;
+	}
+	for (; i<2; ++i, ++cp) {
+		data = (data >> 8) | (*(uchar *)cp << 8);
+	}
 
-    return write_word(info, wp, data);
+	return write_word(info, wp, data);
 }
+

board/csb226/memsetup.S

@@ -38,6 +38,9 @@ DRAM_SIZE:  .long   CFG_DRAM_SIZE
    sub  pc,pc,#4
    .endm
 
+_TEXT_BASE:
+	.word	TEXT_BASE
+
 
 /*
  * 	Memory setup
@@ -222,24 +225,29 @@ mem_init:
         /* Step 2c: Write FLYCNFG  FIXME: what's that???                    */
         /* ---------------------------------------------------------------- */
 
+        /* test if we run from flash or RAM - RAM/BDI: don't setup RAM      */
+	adr	r3, mem_init		/* r0 <- current position of code   */
+	ldr	r2, =mem_init
+	cmp	r3, r2			/* skip init if in place            */
+	beq	initirqs
+
 
 	/* ---------------------------------------------------------------- */
         /* Step 2d: Initialize Timing for Sync Memory (SDCLK0)              */
         /* ---------------------------------------------------------------- */
 
 	/* Before accessing MDREFR we need a valid DRI field, so we set     */
-	/* this to power on defaults + DIR field.                           */
+	/* this to power on defaults + DRI field.                           */
+
+	ldr 	r3, 	=CFG_MDREFR_VAL
+	ldr	r2,	=0xFFF
+	and	r3,	r3, r2
+	ldr	r4,	=0x03ca4000
+	orr	r4,	r4,  r3
 
-	ldr	r4,	=0x03ca4fff
 	str	r4,	[r1, #MDREFR_OFFSET]	/* write back MDREFR        */
         ldr     r4,	[r1, #MDREFR_OFFSET]
 
-	ldr	r4,	=0x03ca4030
-	str	r4,	[r1, #MDREFR_OFFSET]	/* write back MDREFR        */
-	ldr	r4,	[r1, #MDREFR_OFFSET]
-
-        /* Note: preserve the mdrefr value in r4                            */
-
 
 	/* ---------------------------------------------------------------- */
 	/* Step 3: Initialize Synchronous Static Memory (Flash/Peripherals) */
@@ -258,18 +266,16 @@ mem_init:
         /* Step 4: Initialize SDRAM                                         */
         /* ---------------------------------------------------------------- */
 
-	/* Step 4a: assert MDREFR:K1RUN and MDREFR:K2RUN and configure      */
+	/* Step 4a: assert MDREFR:K?RUN and configure                       */
 	/*          MDREFR:K1DB2 and MDREFR:K2DB2 as desired.               */
 
-	orr	r4,	r4,	#(MDREFR_K1RUN|MDREFR_K0RUN)
-
-	str     r4,     [r1, #MDREFR_OFFSET]    /* write back MDREFR        */
-	ldr     r4,     [r1, #MDREFR_OFFSET]
-
+	ldr	r4,	=CFG_MDREFR_VAL
+	str	r4,	[r1, #MDREFR_OFFSET]	/* write back MDREFR        */
+	ldr	r4,	[r1, #MDREFR_OFFSET]
 
 	/* Step 4b: de-assert MDREFR:SLFRSH.                                */
 
-	bic	r4,	r4,	#(MDREFR_SLFRSH)
+	bic	r4,	r4, #(MDREFR_SLFRSH)
 
         str     r4,     [r1, #MDREFR_OFFSET]    /* write back MDREFR        */
         ldr     r4,     [r1, #MDREFR_OFFSET]
@@ -313,17 +319,23 @@ mem_init:
 	/*          documented in SDRAM data sheets. The address(es) used   */
 	/*          for this purpose must not be cacheable.                 */
 
-	ldr	r3,	=CFG_DRAM_BASE
-	str	r2,	[r3]
-	str	r2,	[r3]
-	str	r2,	[r3]
-	str	r2,	[r3]
-	str	r2,	[r3]
-	str	r2,	[r3]
-	str	r2,	[r3]
-	str	r2,	[r3]
+	/*          There should 9 writes, since the first write doesn't    */
+	/*          trigger a refresh cycle on PXA250. See Intel PXA250 and */
+	/*          PXA210 Processors Specification Update,                 */
+	/*          Jan 2003, Errata #116, page 30.                         */
 
 
+	ldr	r3,	=CFG_DRAM_BASE
+	str	r2, [r3]
+	str	r2, [r3]
+	str	r2, [r3]
+	str	r2, [r3]
+	str	r2, [r3]
+	str	r2, [r3]
+	str	r2, [r3]
+	str	r2, [r3]
+	str	r2, [r3]
+
 	/* Step 4g: Write MDCNFG with enable bits asserted                  */
 	/*          (MDCNFG:DEx set to 1).                                  */
 
@@ -339,7 +351,6 @@ mem_init:
 
 	/* We are finished with Intel's memory controller initialisation    */
 
-
 	/* ---------------------------------------------------------------- */
 	/* Disable (mask) all interrupts at interrupt controller            */
 	/* ---------------------------------------------------------------- */
@@ -378,10 +389,11 @@ initclks:
         str     r2,  [r1]
 
 	/* enable the 32Khz oscillator for RTC and PowerManager             */
+/*
         ldr     r1,  =OSCC
         mov     r2,  #OSCC_OON
         str     r2,  [r1]
-
+*/
 	/* NOTE:  spin here until OSCC.OOK get set, meaning the PLL         */
 	/* has settled.                                                     */
 60:
@@ -404,8 +416,7 @@ initclks:
 
 	/* FIXME */
 
-#define NODEBUG
-#ifdef NODEBUG
+#ifndef DEBUG
 	/*Disable software and data breakpoints */
 	mov	r0,#0
 	mcr	p15,0,r0,c14,c8,0  /* ibcr0 */
@@ -415,7 +426,6 @@ initclks:
 	/*Enable all debug functionality */
 	mov	r0,#0x80000000
 	mcr	p14,0,r0,c10,c0,0  /* dcsr */
-
 #endif
 
         /* ---------------------------------------------------------------- */

board/csb226/u-boot.lds

@@ -31,7 +31,7 @@ SECTIONS
         . = ALIGN(4);
 	.text      :
 	{
-	  cpu/xscale/start.o	(.text)
+	  cpu/pxa/start.o	(.text)
 	  *(.text)
 	}
 
@@ -47,7 +47,9 @@ SECTIONS
 	armboot_end_data = .;
 
         . = ALIGN(4);
+	bss_start = .;
         .bss : { *(.bss) }
+	bss_end = .;
 
 	armboot_end = .;
 }

board/cu824/cu824.c

@@ -98,11 +98,11 @@ Done:
  */
 #ifndef CONFIG_PCI_PNP
 static struct pci_config_table pci_sandpoint_config_table[] = {
-	{ PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
-	  PCI_BUS(CFG_ETH_DEV_FN), PCI_DEV(CFG_ETH_DEV_FN), PCI_FUNC(CFG_ETH_DEV_FN),
-	  pci_cfgfunc_config_device, { CFG_ETH_IOBASE,
-				       0,
-				       PCI_COMMAND_IO | PCI_COMMAND_MASTER }},
+	{ PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 0x0f, PCI_ANY_ID,
+	  pci_cfgfunc_config_device, { PCI_ENET0_IOADDR,
+				       PCI_ENET0_MEMADDR,
+				       PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER }},
+
 	{ }
 };
 #endif

board/cu824/flash.c

@@ -125,12 +125,12 @@ unsigned long flash_init(void)
 #if CFG_MONITOR_BASE >= CFG_FLASH_BASE + FLASH_BANK_SIZE
     flash_protect(FLAG_PROTECT_SET,
               CFG_MONITOR_BASE,
-              CFG_MONITOR_BASE + CFG_MONITOR_LEN - 1,
+              CFG_MONITOR_BASE + monitor_flash_len - 1,
               &flash_info[1]);
 #else
     flash_protect(FLAG_PROTECT_SET,
               CFG_MONITOR_BASE,
-              CFG_MONITOR_BASE + CFG_MONITOR_LEN - 1,
+              CFG_MONITOR_BASE + monitor_flash_len - 1,
               &flash_info[0]);
 #endif
 #endif

board/dnp1110/dnp1110.c

@@ -23,7 +23,7 @@
  */
 
 #include <common.h>
-
+#include <SA-1100.h>
 /* ------------------------------------------------------------------------- */
 
 
@@ -41,8 +41,9 @@ int board_init (void)
 	/* arch number of DNP1110-Board */
 	gd->bd->bi_arch_number = 255;
 
-	/* adress of boot parameters */
-	gd->bd->bi_boot_params = 0xc0000100;
+    /* flash vpp on */
+    PPDR |= 0x80;	/* assumes LCD controller is off */
+    PPSR |= 0x80;
 
 	return 0;
 }

board/dnp1110/flash.c

@@ -1,7 +1,9 @@
 /*
- * (C) Copyright 2002
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Rolf Offermanns <rof@sysgo.de>
+ * (C) Copyright 2001
+ * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
+ *
+ * (C) Copyright 2001
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  *
  * See file CREDITS for list of people who contributed to this
  * project.
@@ -23,81 +25,58 @@
  */
 
 #include <common.h>
-
-ulong myflush(void);
+#include <linux/byteorder/swab.h>
 
 
-#define FLASH_BANK_SIZE 0x800000
-#define MAIN_SECT_SIZE  0x20000
-#define PARAM_SECT_SIZE 0x4000
+flash_info_t	flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips	*/
 
-/* puzzle magic for lart
- * data_*_flash are def'd in flashasm.S
+/* Board support for 1 or 2 flash devices */
+#undef FLASH_PORT_WIDTH32
+#define FLASH_PORT_WIDTH16
+
+#ifdef FLASH_PORT_WIDTH16
+#define FLASH_PORT_WIDTH		ushort
+#define FLASH_PORT_WIDTHV		vu_short
+#define SWAP(x)               __swab16(x)
+#else
+#define FLASH_PORT_WIDTH		ulong
+#define FLASH_PORT_WIDTHV		vu_long
+#define SWAP(x)               __swab32(x)
+#endif
+
+#define FPW	   FLASH_PORT_WIDTH
+#define FPWV   FLASH_PORT_WIDTHV
+
+#define mb() __asm__ __volatile__ ("" : : : "memory")
+
+/*-----------------------------------------------------------------------
+ * Functions
  */
-
-extern u32 data_from_flash(u32);
-extern u32 data_to_flash(u32);
-
-#define PUZZLE_FROM_FLASH(x)	(x)
-#define PUZZLE_TO_FLASH(x)	(x)
-
-flash_info_t    flash_info[CFG_MAX_FLASH_BANKS];
-
-
-#define CMD_READ_ARRAY		0x00FF00FF
-#define CMD_IDENTIFY		0x00900090
-#define CMD_ERASE_SETUP		0x00200020
-#define CMD_ERASE_CONFIRM	0x00D000D0
-#define CMD_PROGRAM		0x00400040
-#define CMD_RESUME		0x00D000D0
-#define CMD_SUSPEND		0x00B000B0
-#define CMD_STATUS_READ		0x00700070
-#define CMD_STATUS_RESET	0x00500050
-
-#define BIT_BUSY		0x00800080
-#define BIT_ERASE_SUSPEND	0x00400040
-#define BIT_ERASE_ERROR		0x00200020
-#define BIT_PROGRAM_ERROR	0x00100010
-#define BIT_VPP_RANGE_ERROR	0x00080008
-#define BIT_PROGRAM_SUSPEND	0x00040004
-#define BIT_PROTECT_ERROR	0x00020002
-#define BIT_UNDEFINED		0x00010001
-
-#define BIT_SEQUENCE_ERROR	0x00300030
-#define BIT_TIMEOUT		0x80000000
+static ulong flash_get_size (FPW *addr, flash_info_t *info);
+static int   write_data (flash_info_t *info, ulong dest, FPW data);
+static void  flash_get_offsets (ulong base, flash_info_t *info);
+void inline  spin_wheel(void);
 
 /*-----------------------------------------------------------------------
  */
 
-ulong flash_init(void)
+unsigned long flash_init (void)
 {
-    int i, j;
+   int i;
     ulong size = 0;
 
     for (i = 0; i < CFG_MAX_FLASH_BANKS; i++)
     {
-	ulong flashbase = 0;
-	flash_info[i].flash_id =
-	  (INTEL_MANUFACT & FLASH_VENDMASK) |
-	  (INTEL_ID_28F160F3B & FLASH_TYPEMASK);
-	flash_info[i].size = FLASH_BANK_SIZE;
-	flash_info[i].sector_count = CFG_MAX_FLASH_SECT;
-	memset(flash_info[i].protect, 0, CFG_MAX_FLASH_SECT);
-	if (i == 0)
-	  flashbase = PHYS_FLASH_1;
-	else
-	  panic("configured to many flash banks!\n");
-	for (j = 0; j < flash_info[i].sector_count; j++)
-	{
-	    if (j <= 7)
-	    {
-		flash_info[i].start[j] = flashbase + j * PARAM_SECT_SIZE;
-	    }
-	    else
-	    {
-		flash_info[i].start[j] = flashbase + (j - 7)*MAIN_SECT_SIZE;
-	    }
-	}
+        switch (i)
+        {
+           case 0:
+            flash_get_size((FPW *)PHYS_FLASH_1, &flash_info[i]);
+	         flash_get_offsets(PHYS_FLASH_1, &flash_info[i]);
+                break;
+           default:
+	        panic("configured to many flash banks!\n");
+                break;
+        }
 	size += flash_info[i].size;
     }
 
@@ -105,7 +84,7 @@ ulong flash_init(void)
      */
     flash_protect(FLAG_PROTECT_SET,
 		  CFG_FLASH_BASE,
-		  CFG_FLASH_BASE + _armboot_end_data - _armboot_start,
+		  CFG_FLASH_BASE + monitor_flash_len  - 1,
 		  &flash_info[0]);
 
     flash_protect(FLAG_PROTECT_SET,
@@ -118,150 +97,138 @@ ulong flash_init(void)
 
 /*-----------------------------------------------------------------------
  */
-void flash_print_info  (flash_info_t *info)
+static void flash_get_offsets (ulong base, flash_info_t *info)
 {
-    int i;
+	int i;
 
-    switch (info->flash_id & FLASH_VENDMASK)
-    {
-    case (INTEL_MANUFACT & FLASH_VENDMASK):
-	printf("Intel: ");
-	break;
-    default:
-	printf("Unknown Vendor ");
-	break;
-    }
-
-    switch (info->flash_id & FLASH_TYPEMASK)
-    {
-    case (INTEL_ID_28F160F3B & FLASH_TYPEMASK):
-	printf("2x 28F160F3B (16Mbit)\n");
-	break;
-    default:
-	printf("Unknown Chip Type\n");
-	goto Done;
-	break;
-    }
-
-    printf("  Size: %ld MB in %d Sectors\n",
-	   info->size >> 20, info->sector_count);
-
-    printf("  Sector Start Addresses:");
-    for (i = 0; i < info->sector_count; i++)
-    {
-	if ((i % 5) == 0)
-	{
-	    printf ("\n   ");
+	if (info->flash_id == FLASH_UNKNOWN) {
+		return;
 	}
-	printf (" %08lX%s", info->start[i],
-		info->protect[i] ? " (RO)" : "     ");
-    }
-    printf ("\n");
 
-Done:
+	if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) {
+		for (i = 0; i < info->sector_count; i++) {
+			info->start[i] = base + (i * PHYS_FLASH_SECT_SIZE);
+			info->protect[i] = 0;
+		}
+	}
 }
 
 /*-----------------------------------------------------------------------
  */
-
-int flash_error (ulong code)
+void flash_print_info  (flash_info_t *info)
 {
-	/* Check bit patterns */
-	/* SR.7=0 is busy, SR.7=1 is ready */
-	/* all other flags indicate error on 1 */
-	/* SR.0 is undefined */
-	/* Timeout is our faked flag */
+	int i;
 
-	/* sequence is described in Intel 290644-005 document */
+	if (info->flash_id == FLASH_UNKNOWN) {
+		printf ("missing or unknown FLASH type\n");
+		return;
+        }
 
-	/* check Timeout */
-	if (code & BIT_TIMEOUT)
-	{
-		printf ("Timeout\n");
-		return ERR_TIMOUT;
+	switch (info->flash_id & FLASH_VENDMASK) {
+		case FLASH_MAN_INTEL:	printf ("INTEL ");		break;
+		default:		printf ("Unknown Vendor ");	break;
 	}
 
-	/* check Busy, SR.7 */
-	if (~code & BIT_BUSY)
-	{
-		printf ("Busy\n");
-		return ERR_PROG_ERROR;
-	}
+	switch (info->flash_id & FLASH_TYPEMASK) {
+   case FLASH_28F128J3A:
+				printf ("28F128J3A\n"); break;
+	default:		printf ("Unknown Chip Type\n"); break;
+        }
 
-	/* check Vpp low, SR.3 */
-	if (code & BIT_VPP_RANGE_ERROR)
-	{
-		printf ("Vpp range error\n");
-		return ERR_PROG_ERROR;
-	}
+	printf ("  Size: %ld MB in %d Sectors\n",
+	        info->size >> 20, info->sector_count);
 
-	/* check Device Protect Error, SR.1 */
-	if (code & BIT_PROTECT_ERROR)
-	{
-		printf ("Device protect error\n");
-		return ERR_PROG_ERROR;
-	}
-
-	/* check Command Seq Error, SR.4 & SR.5 */
-	if (code & BIT_SEQUENCE_ERROR)
-	{
-		printf ("Command seqence error\n");
-		return ERR_PROG_ERROR;
-	}
-
-	/* check Block Erase Error, SR.5 */
-	if (code & BIT_ERASE_ERROR)
-	{
-		printf ("Block erase error\n");
-		return ERR_PROG_ERROR;
-	}
-
-	/* check Program Error, SR.4 */
-	if (code & BIT_PROGRAM_ERROR)
-	{
-		printf ("Program error\n");
-		return ERR_PROG_ERROR;
-	}
-
-	/* check Block Erase Suspended, SR.6 */
-	if (code & BIT_ERASE_SUSPEND)
-	{
-		printf ("Block erase suspended\n");
-		return ERR_PROG_ERROR;
-	}
-
-	/* check Program Suspended, SR.2 */
-	if (code & BIT_PROGRAM_SUSPEND)
-	{
-		printf ("Program suspended\n");
-		return ERR_PROG_ERROR;
-	}
-
-	/* OK, no error */
-	return ERR_OK;
+	printf ("  Sector Start Addresses:");
+	for (i=0; i<info->sector_count; ++i) {
+	        if ((i % 5) == 0)
+	        printf ("\n   ");
+		printf (" %08lX%s",
+			info->start[i],
+			info->protect[i] ? " (RO)" : "     "
+		);
+        }
+        printf ("\n");
+	return;
 }
 
+/*
+ * The following code cannot be run from FLASH!
+ */
+static ulong flash_get_size (FPW *addr, flash_info_t *info)
+{
+	volatile FPW value;
+	/* Write auto select command: read Manufacturer ID */
+	addr[0x5555] = (FPW)0x00AA00AA;
+	addr[0x2AAA] = (FPW)0x00550055;
+	addr[0x5555] = (FPW)0x00900090;
+
+   mb();
+	value = addr[0];
+	
+   switch (value) {
+
+   case (FPW)INTEL_MANUFACT:
+      info->flash_id = FLASH_MAN_INTEL;
+      break;
+
+	default:
+		info->flash_id = FLASH_UNKNOWN;
+		info->sector_count = 0;
+		info->size = 0;
+		addr[0] = (FPW)0x00FF00FF;      /* restore read mode */
+		return (0);			/* no or unknown flash	*/
+	}
+
+   mb();
+	value = addr[1];			/* device ID		*/
+   switch (value) {
+
+   case (FPW)INTEL_ID_28F128J3A:
+      info->flash_id += FLASH_28F128J3A;
+      info->sector_count = 128;
+      info->size = 0x02000000;
+      break;            /* => 16 MB     */
+
+	default:
+		info->flash_id = FLASH_UNKNOWN;
+		break;
+	}
+
+	if (info->sector_count > CFG_MAX_FLASH_SECT) {
+		printf ("** ERROR: sector count %d > max (%d) **\n",
+			info->sector_count, CFG_MAX_FLASH_SECT);
+		info->sector_count = CFG_MAX_FLASH_SECT;
+    }
+
+	addr[0] = (FPW)0x00FF00FF;      /* restore read mode */
+
+	return (info->size);
+}
+
+
 /*-----------------------------------------------------------------------
  */
 
 int	flash_erase (flash_info_t *info, int s_first, int s_last)
 {
-    ulong result;
-    int iflag, cflag, prot, sect;
-    int rc = ERR_OK;
-
-    /* first look for protection bits */
-
-    if (info->flash_id == FLASH_UNKNOWN)
-	return ERR_UNKNOWN_FLASH_TYPE;
+    int flag, prot, sect;
+	ulong type, start, last;
+	int rcode = 0;
 
     if ((s_first < 0) || (s_first > s_last)) {
-	return ERR_INVAL;
+		if (info->flash_id == FLASH_UNKNOWN) {
+			printf ("- missing\n");
+		} else {
+			printf ("- no sectors to erase\n");
+		}
+		return 1;
     }
 
-    if ((info->flash_id & FLASH_VENDMASK) !=
-	(INTEL_MANUFACT & FLASH_VENDMASK)) {
-	return ERR_UNKNOWN_FLASH_VENDOR;
+	type = (info->flash_id & FLASH_VENDMASK);
+	if ((type != FLASH_MAN_INTEL)) {
+		printf ("Can't erase unknown flash type %08lx - aborted\n",
+			info->flash_id);
+		return 1;
     }
 
     prot = 0;
@@ -270,152 +237,79 @@ int	flash_erase (flash_info_t *info, int s_first, int s_last)
 	    prot++;
 	}
     }
-    if (prot)
-	return ERR_PROTECTED;
 
-    /*
-     * Disable interrupts which might cause a timeout
-     * here. Remember that our exception vectors are
-     * at address 0 in the flash, and we don't want a
-     * (ticker) exception to happen while the flash
-     * chip is in programming mode.
-     */
-    cflag = icache_status();
-    icache_disable();
-    iflag = disable_interrupts();
+	if (prot) {
+		printf ("- Warning: %d protected sectors will not be erased!\n",
+			prot);
+	} else {
+		printf ("\n");
+	}
+
+	start = get_timer (0);
+	last  = start;
+
+   /* Disable interrupts which might cause a timeout here */
+    flag = disable_interrupts();
 
     /* Start erase on unprotected sectors */
-    for (sect = s_first; sect<=s_last && !ctrlc(); sect++)
-    {
+	for (sect = s_first; sect<=s_last; sect++) {
+		if (info->protect[sect] == 0) {	/* not protected */
+			FPWV *addr = (FPWV *)(info->start[sect]);
+			FPW status;
+
 	printf("Erasing sector %2d ... ", sect);
 
 	/* arm simple, non interrupt dependent timer */
 	reset_timer_masked();
 
-	if (info->protect[sect] == 0)
-	{	/* not protected */
-	    vu_long *addr = (vu_long *)(info->start[sect]);
+			*addr = (FPW)0x00500050;	/* clear status register */
+			*addr = (FPW)0x00200020;	/* erase setup */
+			*addr = (FPW)0x00D000D0;	/* erase confirm */
 
-	    *addr = PUZZLE_TO_FLASH(CMD_STATUS_RESET);
-	    *addr = PUZZLE_TO_FLASH(CMD_ERASE_SETUP);
-	    *addr = PUZZLE_TO_FLASH(CMD_ERASE_CONFIRM);
-
-	    /* wait until flash is ready */
-	    do
-	    {
-		/* check timeout */
-		if (get_timer_masked() > CFG_FLASH_ERASE_TOUT)
-		{
-		    *addr = PUZZLE_TO_FLASH(CMD_SUSPEND);
-		    result = BIT_TIMEOUT;
-		    break;
-		}
-
-		result = PUZZLE_FROM_FLASH(*addr);
-	    }  while (~result & BIT_BUSY);
-
-	    *addr = PUZZLE_TO_FLASH(CMD_READ_ARRAY);
-
-	    if ((rc = flash_error(result)) != ERR_OK)
-	    	goto outahere;
-
-	    printf("ok.\n");
-	}
-	else /* it was protected */
-	{
-	    printf("protected!\n");
+			while (((status = *addr) & (FPW)0x00800080) != (FPW)0x00800080) {
+		if (get_timer_masked() > CFG_FLASH_ERASE_TOUT) {
+					printf ("Timeout\n");
+					*addr = (FPW)0x00B000B0; /* suspend erase	  */
+					*addr = (FPW)0x00FF00FF; /* reset to read mode */
+					rcode = 1;
+					break;
 	}
     }
 
-    if (ctrlc())
-      printf("User Interrupt!\n");
+			*addr = (FPW)0x00500050; /* clear status register cmd.   */
+			*addr = (FPW)0x00FF00FF; /* resest to read mode          */
 
-outahere:
-    /* allow flash to settle - wait 10 ms */
-    udelay_masked(10000);
-
-    if (iflag)
-      enable_interrupts();
-
-    if (cflag)
-      icache_enable();
-
-    return rc;
+			printf (" done\n");
+        }
+        }
+	return rcode;
 }
 
 /*-----------------------------------------------------------------------
- * Copy memory to flash
- */
-
-volatile static int write_word (flash_info_t *info, ulong dest, ulong data)
-{
-    vu_long *addr = (vu_long *)dest;
-    ulong result;
-    int rc = ERR_OK;
-    int cflag, iflag;
-
-    /* Check if Flash is (sufficiently) erased
-     */
-    result = PUZZLE_FROM_FLASH(*addr);
-    if ((result & data) != data)
-        return ERR_NOT_ERASED;
-
-    /*
-     * Disable interrupts which might cause a timeout
-     * here. Remember that our exception vectors are
-     * at address 0 in the flash, and we don't want a
-     * (ticker) exception to happen while the flash
-     * chip is in programming mode.
-     */
-    cflag = icache_status();
-    icache_disable();
-    iflag = disable_interrupts();
-
-    *addr = PUZZLE_TO_FLASH(CMD_STATUS_RESET);
-    *addr = PUZZLE_TO_FLASH(CMD_PROGRAM);
-    *addr = data;
-
-    /* arm simple, non interrupt dependent timer */
-    reset_timer_masked();
-
-    /* wait until flash is ready */
-    do
-    {
-	/* check timeout */
-	if (get_timer_masked() > CFG_FLASH_ERASE_TOUT)
-	{
-	    *addr = PUZZLE_TO_FLASH(CMD_SUSPEND);
-	    result = BIT_TIMEOUT;
-	    break;
-	}
-
-	result = PUZZLE_FROM_FLASH(*addr);
-    }  while (~result & BIT_BUSY);
-
-    *addr = PUZZLE_TO_FLASH(CMD_READ_ARRAY);
-
-    rc = flash_error(result);
-
-    if (iflag)
-      enable_interrupts();
-
-    if (cflag)
-      icache_enable();
-
-    return rc;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash.
+ * Copy memory to flash, returns:
+ * 0 - OK
+ * 1 - write timeout
+ * 2 - Flash not erased
+ * 4 - Flash not identified
  */
 
 int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
 {
-    ulong cp, wp, data;
-    int l;
-    int i, rc;
+    ulong cp, wp;
+	FPW data;
+	int count, i, l, rc, port_width;
 
-    wp = (addr & ~3);	/* get lower word aligned address */
+	if (info->flash_id == FLASH_UNKNOWN) {
+		return 4;
+	}
+/* get lower word aligned address */
+#ifdef FLASH_PORT_WIDTH16
+	wp = (addr & ~1);
+	port_width = 2;
+#else
+	wp = (addr & ~3);
+	port_width = 4;
+#endif
 
     /*
      * handle unaligned start bytes
@@ -423,51 +317,109 @@ int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
     if ((l = addr - wp) != 0) {
 	data = 0;
 	for (i=0, cp=wp; i<l; ++i, ++cp) {
-	    data = (data >> 8) | (*(uchar *)cp << 24);
+			data = (data << 8) | (*(uchar *)cp);
 	}
-	for (; i<4 && cnt>0; ++i) {
-	    data = (data >> 8) | (*src++ << 24);
+		for (; i<port_width && cnt>0; ++i) {
+			data = (data << 8) | *src++;
 	    --cnt;
 	    ++cp;
 	}
-	for (; cnt==0 && i<4; ++i, ++cp) {
-	    data = (data >> 8) | (*(uchar *)cp << 24);
+		for (; cnt==0 && i<port_width; ++i, ++cp) {
+			data = (data << 8) | (*(uchar *)cp);
 	}
 
-	if ((rc = write_word(info, wp, data)) != 0) {
+		if ((rc = write_data(info, wp, SWAP(data))) != 0) {
 	    return (rc);
 	}
-	wp += 4;
+		wp += port_width;
     }
 
     /*
      * handle word aligned part
      */
-    while (cnt >= 4) {
-	data = *((vu_long*)src);
-	if ((rc = write_word(info, wp, data)) != 0) {
+	count = 0;
+	while (cnt >= port_width) {
+		data = 0;
+		for (i=0; i<port_width; ++i) {
+			data = (data << 8) | *src++;
+		}
+		if ((rc = write_data(info, wp, SWAP(data))) != 0) {
 	    return (rc);
 	}
-	src += 4;
-	wp  += 4;
-	cnt -= 4;
+		wp  += port_width;
+		cnt -= port_width;
+		if (count++ > 0x800)
+		{
+         spin_wheel();
+			count = 0;
+		}
     }
 
     if (cnt == 0) {
-	return ERR_OK;
+		return (0);
     }
 
     /*
      * handle unaligned tail bytes
      */
     data = 0;
-    for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) {
-	data = (data >> 8) | (*src++ << 24);
+	for (i=0, cp=wp; i<port_width && cnt>0; ++i, ++cp) {
+		data = (data << 8) | *src++;
 	--cnt;
     }
-    for (; i<4; ++i, ++cp) {
-	data = (data >> 8) | (*(uchar *)cp << 24);
+	for (; i<port_width; ++i, ++cp) {
+		data = (data << 8) | (*(uchar *)cp);
+	}
+
+	return (write_data(info, wp, SWAP(data)));
+}
+
+/*-----------------------------------------------------------------------
+ * Write a word or halfword to Flash, returns:
+ * 0 - OK
+ * 1 - write timeout
+ * 2 - Flash not erased
+ */
+static int write_data (flash_info_t *info, ulong dest, FPW data)
+{
+	FPWV *addr = (FPWV *)dest;
+	ulong status;
+	int flag;
+
+	/* Check if Flash is (sufficiently) erased */
+	if ((*addr & data) != data) {
+		printf("not erased at %08lx (%x)\n",(ulong)addr,*addr);
+		return (2);
+	}
+	/* Disable interrupts which might cause a timeout here */
+	flag = disable_interrupts();
+
+	*addr = (FPW)0x00400040;		/* write setup */
+	*addr = data;
+
+	/* arm simple, non interrupt dependent timer */
+	reset_timer_masked();
+
+	/* wait while polling the status register */
+	while (((status = *addr) & (FPW)0x00800080) != (FPW)0x00800080) {
+		if (get_timer_masked() > CFG_FLASH_WRITE_TOUT) {
+			*addr = (FPW)0x00FF00FF;	/* restore read mode */
+			return (1);
+		}
     }
 
-    return write_word(info, wp, data);
+	*addr = (FPW)0x00FF00FF;	/* restore read mode */
+
+	return (0);
 }
+
+void inline
+spin_wheel(void)
+{
+   static int p=0;
+   static char w[] = "\\/-";
+
+   printf("\010%c", w[p]);
+   (++p == 3) ? (p = 0) : 0;
+}
+

board/dnp1110/memsetup.S

@@ -25,8 +25,8 @@
 
 
 
-#include <config.h>
-#include <version.h>
+#include "config.h"
+#include "version.h"
 
 
 /* some parameters for the board */
@@ -34,63 +34,103 @@
 MEM_BASE:	.long	0xa0000000
 MEM_START:	.long	0xc0000000
 
-#define	MDCNFG	0x00
-#define MDCAS0	0x04
-#define MDCAS1	0x08
-#define MDCAS2	0x0c
-#define MSC0	0x10
-#define MSC1	0x14
-#define MECR	0x18
+#define MDCNFG		0x00
+#define MDCAS00		0x04		/* CAS waveform rotate reg 0       */
+#define MDCAS01		0x08		/* CAS waveform rotate reg 1 bank  */
+#define MDCAS02		0x0C		/* CAS waveform rotate reg 2 bank  */
+#define MDREFR		0x1C		/* DRAM refresh control reg        */
+#define MDCAS20		0x20		/* CAS waveform rotate reg 0 bank  */ 
+#define MDCAS21		0x24		/* CAS waveform rotate reg 1 bank  */
+#define MDCAS22		0x28		/* CAS waveform rotate reg 2 bank  */
+#define MECR		0x18		/* Expansion memory (PCMCIA) bus configuration  register */
+#define MSC0		0x10		/* static memory control reg 0     */
+#define MSC1		0x14		/* static memory control reg 1     */
+#define MSC2		0x2C		/* static memory control reg 2     */
+#define SMCNFG		0x30		/* SMROM configuration reg         */
 
-mdcas0:		.long	0xc71c703f
-mdcas1:		.long	0xffc71c71
-mdcas2:		.long	0xffffffff
-/* mdcnfg:		.long   0x0bb2bcbf */
-mdcnfg:		.long	0x0334b22f	@ alt
-/* mcs0:		.long   0xfff8fff8 */
-msc0:		.long	0xad8c4888	@ alt
-mecr:		.long	0x00060006
-/* mecr:		.long	0x994a994a	@ alt */
+mdcas00:	.long	0x5555557F
+mdcas01:	.long	0x55555555
+mdcas02:	.long	0x55555555
+mdcas20:	.long	0x5555557F
+mdcas21:	.long	0x55555555
+mdcas22:	.long	0x55555555
+mdcnfg:		.long	0x0000B25C
+mdrefr:		.long	0x007000C1
+mecr:		.long	0x10841084
+msc0:		.long	0x00004774
+msc1:		.long	0x00000000
+msc2:		.long	0x00000000
+smcnfg:		.long	0x00000000
 
 /* setting up the memory */
 
 .globl memsetup
 memsetup:
-	ldr	r0, MEM_BASE
 
-	/* Setup the flash memory */
-	ldr	r1, msc0
-	str	r1, [r0, #MSC0]
+	ldr	r0, MEM_BASE
 
 	/* Set up the DRAM */
 
-	/* MDCAS0 */
-	ldr	r1, mdcas0
-	str	r1, [r0, #MDCAS0]
+	/* MDCAS00 */
+	ldr	r1, mdcas00
+	str	r1, [r0, #MDCAS00]
 
-	/* MDCAS1 */
-	ldr	r1, mdcas1
-	str	r1, [r0, #MDCAS1]
+	/* MDCAS01 */
+	ldr	r1, mdcas01
+	str	r1, [r0, #MDCAS01]
 
-	/* MDCAS2 */
-	ldr	r1, mdcas2
-	str	r1, [r0, #MDCAS2]
+	/* MDCAS02 */
+	ldr	r1, mdcas02
+	str	r1, [r0, #MDCAS02]
 
-	/* MDCNFG */
-	ldr	r1, mdcnfg
-	str	r1, [r0, #MDCNFG]
+	/* MDCAS20 */
+	ldr	r1, mdcas20
+	str	r1, [r0, #MDCAS20]
+
+	/* MDCAS21 */
+	ldr	r1, mdcas21
+	str	r1, [r0, #MDCAS21]
+
+	/* MDCAS22 */
+	ldr	r1, mdcas22
+	str	r1, [r0, #MDCAS22]
+
+	/* MDREFR */
+	ldr	r1, mdrefr
+	str	r1, [r0, #MDREFR]
 
 	/* Set up PCMCIA space */
 	ldr	r1, mecr
 	str	r1, [r0, #MECR]
 
-	/* Load something to activate bank */
-	ldr	r1, MEM_START
+	/* Setup the flash memory and other */
+	ldr	r1, msc0
+	str	r1, [r0, #MSC0]
 
+	ldr	r1, msc1
+	str	r1, [r0, #MSC1]
+
+	ldr	r1, msc2
+	str	r1, [r0, #MSC2]
+
+	ldr	r1, smcnfg
+	str	r1, [r0, #SMCNFG]
+
+	/* MDCNFG */
+	ldr	r1, mdcnfg
+	bic	r1, r1, #0x00000001
+	str	r1, [r0, #MDCNFG]
+
+	/* Load something to activate bank */
+	ldr	r2, MEM_START
 .rept	8
-	ldr	r0, [r1]
+	ldr	r1, [r2]
 .endr
 
+	/* MDCNFG */
+	ldr	r1, mdcnfg
+	orr	r1, r1, #0x00000001
+	str	r1, [r0, #MDCNFG]
+
 	/* everything is fine now */
 	mov	pc, lr
-

board/ebony/ebony.c

@@ -21,11 +21,10 @@
  */
 
 
-extern long int spd_sdram (void);
-
 #include <common.h>
 #include "ebony.h"
 #include <asm/processor.h>
+#include <spd_sdram.h>
 
 #define BOOT_SMALL_FLASH	32	/* 00100000 */
 #define FLASH_ONBD_N		2	/* 00000010 */
@@ -113,10 +112,9 @@ int checkboard (void)
 long int initdram (int board_type)
 {
 	long dram_size = 0;
-	extern long spd_sdram (void);
 
 #if defined(CONFIG_SPD_EEPROM)
-	dram_size = spd_sdram ();
+	dram_size = spd_sdram (0);
 #else
 	dram_size = fixed_sdram ();
 #endif

board/ebony/flash.c

@@ -327,6 +327,9 @@ void flash_print_info  (flash_info_t *info)
 			case (FLASH_WORD_SIZE)SST_MANUFACT:
 				info->flash_id = FLASH_MAN_SST;
 				break;
+			case (FLASH_WORD_SIZE)STM_MANUFACT:
+				info->flash_id = FLASH_MAN_STM;
+				break;
 			default:
 				info->flash_id = FLASH_UNKNOWN;
 				info->sector_count = 0;
@@ -349,6 +352,11 @@ void flash_print_info  (flash_info_t *info)
 				info->sector_count = 32;
 				info->size = 0x00200000;
 				break;				/* => 2 MB		*/
+                        case (FLASH_WORD_SIZE)STM_ID_F040B:
+                                info->flash_id += FLASH_AM040;
+                                info->sector_count = 8;
+                                info->size = 0x0080000; /* => 512 ko */
+                                break;				
 			case (FLASH_WORD_SIZE)AMD_ID_F040B:
 				info->flash_id += FLASH_AM040;
 				info->sector_count = 8;

board/eltec/bab7xx/flash.c

@@ -83,21 +83,21 @@ unsigned long flash_init (void)
     {
         (void)flash_protect(FLAG_PROTECT_SET,
                 FLASH_BASE0_PRELIM,
-                FLASH_BASE0_PRELIM+CFG_MONITOR_LEN-1,
+                FLASH_BASE0_PRELIM+monitor_flash_len-1,
                 &flash_info[0]);
     }
     if (size2 == 512*1024)
     {
         (void)flash_protect(FLAG_PROTECT_SET,
                 FLASH_BASE1_PRELIM,
-                FLASH_BASE1_PRELIM+CFG_MONITOR_LEN-1,
+                FLASH_BASE1_PRELIM+monitor_flash_len-1,
                 &flash_info[1]);
     }
     if (size2 == 4*1024*1024)
     {
         (void)flash_protect(FLAG_PROTECT_SET,
                 CFG_FLASH_BASE,
-                CFG_FLASH_BASE+CFG_MONITOR_LEN-1,
+                CFG_FLASH_BASE+monitor_flash_len-1,
                 &flash_info[1]);
     }
 

board/eltec/elppc/flash.c

@@ -83,21 +83,21 @@ unsigned long flash_init (void)
     {
         (void)flash_protect(FLAG_PROTECT_SET,
                 FLASH_BASE0_PRELIM,
-                FLASH_BASE0_PRELIM+CFG_MONITOR_LEN-1,
+                FLASH_BASE0_PRELIM+monitor_flash_len-1,
                 &flash_info[0]);
     }
     if (size2 == 512*1024)
     {
         (void)flash_protect(FLAG_PROTECT_SET,
                 FLASH_BASE1_PRELIM,
-                FLASH_BASE1_PRELIM+CFG_MONITOR_LEN-1,
+                FLASH_BASE1_PRELIM+monitor_flash_len-1,
                 &flash_info[1]);
     }
     if (size2 == 4*1024*1024)
     {
         (void)flash_protect(FLAG_PROTECT_SET,
                 CFG_FLASH_BASE,
-                CFG_FLASH_BASE+CFG_MONITOR_LEN-1,
+                CFG_FLASH_BASE+monitor_flash_len-1,
                 &flash_info[1]);
     }
 

board/eltec/mhpc/flash.c

@@ -92,7 +92,7 @@ unsigned long flash_init (void)
 	/* monitor protection ON by default */
 	(void)flash_protect(FLAG_PROTECT_SET,
 			    CFG_FLASH_BASE,
-			    CFG_FLASH_BASE+CFG_MONITOR_LEN-1,
+			    CFG_FLASH_BASE+monitor_flash_len-1,
 			    &flash_info[0]);
 
 	flash_info[0].size = size_b0;

board/emk/top860/Makefile

@@ -0,0 +1,40 @@
+#
+# (C) Copyright 2000
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB	= lib$(BOARD).a
+
+OBJS	= $(BOARD).o flash.o
+
+$(LIB):	.depend $(OBJS)
+	$(AR) crv $@ $^
+
+#########################################################################
+
+.depend:	Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
+		$(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
+
+sinclude .depend
+
+#########################################################################

board/emk/top860/config.mk

@@ -0,0 +1,28 @@
+#
+# (C) Copyright 2003
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+#
+# TOP860 board
+#
+
+TEXT_BASE = 0x80000000

board/emk/top860/flash.c

@@ -0,0 +1,490 @@
+/*
+ * (C) Copyright 2003
+ * EMK Elektronik GmbH <www.emk-elektronik.de>
+ * Reinhard Meyer <r.meyer@emk-elektronik.de>
+ *
+ * copied from the BMW Port - seems that its similiar enough
+ * to be easily adaped ;) --- Well, it turned out to become a
+ * merger between parts of the EMKstax Flash routines and the
+ * BMW funtion frames...
+ *
+ * (C) Copyright 2000
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <mpc8xx.h>
+
+#define	FLASH_WORD_SIZE		unsigned short
+#define FLASH_WORD_WIDTH	(sizeof (FLASH_WORD_SIZE))
+
+flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips    */
+
+/*-----------------------------------------------------------------------
+ * Functions
+ */
+static int write_word (flash_info_t *info, ulong dest, ulong data);
+
+
+/*****************************************************************************
+ * software product ID entry/exit
+ *****************************************************************************/
+static void FlashProductIdMode (
+	volatile FLASH_WORD_SIZE *b,
+	int on_off)
+{
+	b[0x5555] = 0xaa;
+	b[0x2aaa] = 0x55;
+	b[0x5555] = on_off ? 0x90 : 0xf0;
+}
+
+/*****************************************************************************
+ * sector erase start
+ *****************************************************************************/
+static void FlashSectorErase (
+	volatile FLASH_WORD_SIZE *b,
+	volatile FLASH_WORD_SIZE *a)
+{
+	b[0x5555] = 0xaa;
+	b[0x2aaa] = 0x55;
+	b[0x5555] = 0x80;
+	b[0x5555] = 0xaa;
+	b[0x2aaa] = 0x55;
+	a[0] = 0x30;
+}
+
+/*****************************************************************************
+ * program a word
+ *****************************************************************************/
+static void FlashProgWord (
+	volatile FLASH_WORD_SIZE *b,
+	volatile FLASH_WORD_SIZE *a,
+	FLASH_WORD_SIZE v)
+{
+	b[0x5555] = 0xaa;
+	b[0x2aaa] = 0x55;
+	b[0x5555] = 0xa0;
+	a[0] = v;
+}
+
+/*****************************************************************************
+ * reset bank, back to read mode
+ *****************************************************************************/
+static void FlashReset (volatile FLASH_WORD_SIZE *b)
+{
+	b[0] = 0xf0;
+}
+
+/*****************************************************************************
+ * identify FLASH chip
+ * this code is a stripped version of the FlashGetType() function in EMKstax
+ *****************************************************************************/
+unsigned long flash_init (void)
+{
+	volatile FLASH_WORD_SIZE * const flash = (volatile FLASH_WORD_SIZE *) CFG_FLASH_BASE;
+	FLASH_WORD_SIZE	manu, dev;
+	flash_info_t * const pflinfo = &flash_info[0];
+	int j;
+
+	/* get Id Bytes */
+	FlashProductIdMode (flash, 1);
+	manu = flash[0];
+	dev  = flash[1];
+	FlashProductIdMode (flash, 0);
+
+	pflinfo->size = 0;
+	pflinfo->sector_count = 0;
+	pflinfo->flash_id = 0xffffffff;
+	pflinfo->portwidth = FLASH_CFI_16BIT;
+	pflinfo->chipwidth = FLASH_CFI_BY16;
+
+	switch (manu&0xff)
+	{
+	case 0x01:	/* AMD */
+		pflinfo->flash_id = FLASH_MAN_AMD;
+		switch (dev&0xff)
+		{
+		case 0x49:
+			pflinfo->size = 0x00200000;
+			pflinfo->sector_count = 35;
+			pflinfo->flash_id |= FLASH_AM160B;
+			pflinfo->start[0] = CFG_FLASH_BASE;
+			pflinfo->start[1] = CFG_FLASH_BASE + 0x4000;
+			pflinfo->start[2] = CFG_FLASH_BASE + 0x6000;
+			pflinfo->start[3] = CFG_FLASH_BASE + 0x8000;
+			for (j = 4; j < 35; j++)
+			{
+				pflinfo->start[j] = CFG_FLASH_BASE + 0x00010000 * (j-3);
+			}
+			break;
+
+		case 0xf9:
+			pflinfo->size = 0x00400000;
+			pflinfo->sector_count = 71;
+			pflinfo->flash_id |= FLASH_AM320B;
+			pflinfo->start[0] = CFG_FLASH_BASE;
+			pflinfo->start[1] = CFG_FLASH_BASE + 0x4000;
+			pflinfo->start[2] = CFG_FLASH_BASE + 0x6000;
+			pflinfo->start[3] = CFG_FLASH_BASE + 0x8000;
+			for (j = 0; j < 8; j++)
+			{
+				pflinfo->start[j] = CFG_FLASH_BASE + 0x00002000 * (j);
+			}
+			for (j = 8; j < 71; j++)
+			{
+				pflinfo->start[j] = CFG_FLASH_BASE + 0x00010000 * (j-7);
+			}
+			break;
+
+		default:
+			printf ("unknown AMD dev=%x ", dev);
+			pflinfo->flash_id |= FLASH_UNKNOWN;
+		}
+		break;
+
+	default:
+		printf ("unknown manu=%x ", manu);
+	}
+	return pflinfo->size;
+}
+
+/*****************************************************************************
+ * print info about a FLASH
+ *****************************************************************************/
+void flash_print_info (flash_info_t *info)
+{
+	static const char	unk[] = "Unknown";
+	unsigned int		i;
+	const char			*mfct=unk,
+						*type=unk;
+
+	if(info->flash_id != FLASH_UNKNOWN)
+	{
+		switch (info->flash_id & FLASH_VENDMASK)
+		{
+		case FLASH_MAN_AMD:
+			mfct = "AMD";
+			break;
+		}
+
+		switch (info->flash_id & FLASH_TYPEMASK)
+		{
+		case FLASH_AM160B:
+			type = "AM29LV160B (16 Mbit, bottom boot sect)";
+			break;
+		case FLASH_AM320B:
+			type = "AM29LV320B (32 Mbit, bottom boot sect)";
+			break;
+		}
+	}
+
+	printf (
+		"\n  Brand: %s Type: %s\n"
+		"  Size: %lu KB in %d Sectors\n",
+		mfct,
+		type,
+		info->size >> 10,
+		info->sector_count
+		);
+
+	printf ("  Sector Start Addresses:");
+
+	for (i = 0; i < info->sector_count; i++)
+	{
+		unsigned long	size;
+		unsigned int	erased;
+		unsigned long	*flash = (unsigned long *) info->start[i];
+
+		/*
+		 * Check if whole sector is erased
+		 */
+		size =
+			(i != (info->sector_count - 1)) ?
+			(info->start[i + 1] - info->start[i]) >> 2 :
+		(info->start[0] + info->size - info->start[i]) >> 2;
+
+		for (
+			flash = (unsigned long *) info->start[i], erased = 1;
+				(flash != (unsigned long *) info->start[i] + size) && erased;
+					flash++
+			)
+			erased = *flash == ~0x0UL;
+
+		printf (
+			"%s %08lX %s %s",
+			(i % 5) ? "" : "\n   ",
+			info->start[i],
+			erased ? "E" : " ",
+			info->protect[i] ? "RO" : "  "
+			);
+	}
+
+	puts ("\n");
+	return;
+}
+
+/*****************************************************************************
+ * erase one or more sectors
+ *****************************************************************************/
+int	flash_erase (flash_info_t *info, int s_first, int s_last)
+{
+	volatile FLASH_WORD_SIZE	*addr = (FLASH_WORD_SIZE *)(info->start[0]);
+	int							flag,
+								prot,
+								sect,
+								l_sect;
+	ulong						start,
+								now,
+								last;
+
+	if ((s_first < 0) || (s_first > s_last))
+	{
+		if (info->flash_id == FLASH_UNKNOWN)
+		{
+			printf ("- missing\n");
+		}
+		else
+		{
+			printf ("- no sectors to erase\n");
+		}
+		return 1;
+	}
+
+	if ((info->flash_id == FLASH_UNKNOWN) ||
+		(info->flash_id > (FLASH_MAN_STM | FLASH_AMD_COMP)))
+	{
+		printf ("Can't erase unknown flash type - aborted\n");
+		return 1;
+	}
+
+	prot = 0;
+	for (sect=s_first; sect<=s_last; ++sect)
+	{
+		if (info->protect[sect])
+		{
+			prot++;
+		}
+	}
+
+	if (prot)
+	{
+		printf ("- Warning: %d protected sectors will not be erased!\n",
+			prot);
+	}
+	else
+	{
+		printf ("\n");
+	}
+
+	l_sect = -1;
+
+	/* Disable interrupts which might cause a timeout here */
+	flag = disable_interrupts();
+
+	/* Start erase on unprotected sectors */
+	for (sect = s_first; sect<=s_last; sect++)
+	{
+		if (info->protect[sect] == 0)
+		{ /* not protected */
+			FlashSectorErase ((FLASH_WORD_SIZE *)info->start[0], (FLASH_WORD_SIZE *)info->start[sect]);
+			l_sect = sect;
+		}
+	}
+
+	/* re-enable interrupts if necessary */
+	if (flag)
+		enable_interrupts();
+
+	/* wait at least 80us - let's wait 1 ms */
+	udelay (1000);
+
+	/*
+	* We wait for the last triggered sector
+	*/
+	if (l_sect < 0)
+		goto DONE;
+
+	start = get_timer (0);
+	last  = start;
+	addr = (FLASH_WORD_SIZE *)info->start[l_sect];
+	while ((addr[0] & 0x0080) != 0x0080)
+	{
+		if ((now = get_timer (start)) > CFG_FLASH_ERASE_TOUT)
+		{
+			printf ("Timeout\n");
+			return 1;
+		}
+		/* show that we're waiting */
+		if ((now - last) > 1000)
+		{  /* every second */
+			serial_putc ('.');
+			last = now;
+		}
+	}
+
+	DONE:
+	/* reset to read mode */
+	FlashReset ((FLASH_WORD_SIZE *)info->start[0]);
+
+	printf (" done\n");
+	return 0;
+}
+
+/*****************************************************************************
+ * Copy memory to flash, returns:
+ * 0 - OK
+ * 1 - write timeout
+ * 2 - Flash not erased
+ *****************************************************************************/
+int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
+{
+	ulong		cp,
+				wp,
+				data;
+	int			i,
+				l,
+				rc;
+
+	wp = (addr & ~(FLASH_WORD_WIDTH-1));   /* get lower word aligned address */
+
+	/*
+	 * handle unaligned start bytes, if there are...
+	 */
+	if ((l = addr - wp) != 0)
+	{
+		data = 0;
+		
+		/* get the current before the new data into our data word */
+		for (i=0, cp=wp; i<l; ++i, ++cp)
+		{
+			data = (data << 8) | (*(uchar *)cp);
+		}
+		
+		/* now merge the to be programmed values */
+		for (; i<4 && cnt>0; ++i, ++cp, --cnt)
+		{
+			data = (data << 8) | *src++;
+		}
+
+		/* get the current after the new data into our data word */
+		for (; cnt==0 && i<FLASH_WORD_WIDTH; ++i, ++cp)
+		{
+			data = (data << 8) | (*(uchar *)cp);
+		}
+
+		/* now write the combined word */
+		if ((rc = write_word (info, wp, data)) != 0)
+		{
+			return (rc);
+		}
+		wp += FLASH_WORD_WIDTH;
+	}
+
+	/*
+	 * handle word aligned part
+	 */
+	while (cnt >= FLASH_WORD_WIDTH)
+	{
+		data = 0;
+		for (i=0; i<FLASH_WORD_WIDTH; ++i)
+		{
+			data = (data << 8) | *src++;
+		}
+		if ((rc = write_word (info, wp, data)) != 0)
+		{
+			return (rc);
+		}
+		wp  += FLASH_WORD_WIDTH;
+		cnt -= FLASH_WORD_WIDTH;
+	}
+
+	if (cnt == 0)
+	{
+		return (0);
+	}
+
+	/*
+	 * handle unaligned tail bytes, if there are...
+	 */
+	data = 0;
+
+	/* now merge the to be programmed values */
+	for (i=0, cp=wp; i<FLASH_WORD_WIDTH && cnt>0; ++i, ++cp)
+	{
+		data = (data << 8) | *src++;
+		--cnt;
+	}
+
+	/* get the current after the new data into our data word */
+	for (; i<FLASH_WORD_WIDTH; ++i, ++cp)
+	{
+		data = (data << 8) | (*(uchar *)cp);
+	}
+
+	/* now write the combined word */
+	return (write_word (info, wp, data));
+}
+
+/*****************************************************************************
+ * Write a word to Flash, returns:
+ * 0 - OK
+ * 1 - write timeout
+ * 2 - Flash not erased
+ *****************************************************************************/
+static int write_word (flash_info_t *info, ulong dest, ulong data)
+{
+	volatile FLASH_WORD_SIZE	*addr2 = (FLASH_WORD_SIZE *)info->start[0];
+	volatile FLASH_WORD_SIZE	*dest2 = (FLASH_WORD_SIZE *)dest;
+	FLASH_WORD_SIZE				data2 = data;
+	ulong						start;
+	int							flag;
+
+	/* Check if Flash is (sufficiently) erased */
+	if ((*dest2 & data2) != data2)
+	{
+		return (2);
+	}
+	
+	/* Disable interrupts which might cause a timeout here */
+	flag = disable_interrupts ();
+
+	FlashProgWord (addr2, dest2, data2);
+
+	/* re-enable interrupts if necessary */
+	if (flag)
+		enable_interrupts ();
+
+	/* data polling for D7 */
+	start = get_timer (0);
+	while ((*dest2 & 0x0080) != (data2 & 0x0080))
+	{
+		if (get_timer (start) > CFG_FLASH_WRITE_TOUT)
+		{
+			return (1);
+		}
+	}
+
+	return (0);
+}
+
+/*-----------------------------------------------------------------------
+ */
+

board/emk/top860/top860.c

@@ -0,0 +1,187 @@
+/*
+ * (C) Copyright 2003
+ * EMK Elektronik GmbH <www.emk-elektronik.de>
+ * Reinhard Meyer <r.meyer@emk-elektronik.de>
+ *
+ * Board specific routines for the TOP860
+ *
+ * - initialisation
+ * - interface to VPD data (mac address, clock speeds)
+ * - memory controller
+ * - serial io initialisation
+ * - ethernet io initialisation
+ *
+ * -----------------------------------------------------------------
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <commproc.h>
+#include <mpc8xx.h>
+
+/*****************************************************************************
+ * UPM table for 60ns EDO RAM at 25 MHz bus/external clock
+ *****************************************************************************/
+static const uint edo_60ns_25MHz_tbl[] = {
+
+/* single read   (offset 0x00 in upm ram) */
+    0x0ff3fc04,0x08f3fc04,0x00f3fc04,0x00f3fc00,
+    0x33f7fc07,0xfffffc05,0xfffffc05,0xfffffc05,
+/* burst read    (offset 0x08 in upm ram) */
+    0x0ff3fc04,0x08f3fc04,0x00f3fc0c,0x0ff3fc40,
+    0x0cf3fc04,0x03f3fc48,0x0cf3fc04,0x03f3fc48,
+    0x0cf3fc04,0x03f3fc00,0x3ff7fc07,0xfffffc05,
+    0xfffffc05,0xfffffc05,0xfffffc05,0xfffffc05,
+/* single write  (offset 0x18 in upm ram) */
+    0x0ffffc04,0x08fffc04,0x30fffc00,0xf1fffc07,
+    0xfffffc05,0xfffffc05,0xfffffc05,0xfffffc05,
+/* burst write   (offset 0x20 in upm ram) */
+    0x0ffffc04,0x08fffc00,0x00fffc04,0x03fffc4c,
+    0x00fffc00,0x07fffc4c,0x00fffc00,0x0ffffc4c,
+    0x00fffc00,0x3ffffc07,0xfffffc05,0xfffffc05,
+    0xfffffc05,0xfffffc05,0xfffffc05,0xfffffc05,
+/* refresh       (offset 0x30 in upm ram) */
+    0xc0fffc04,0x07fffc04,0x0ffffc04,0x0ffffc04,
+    0xfffffc05,0xfffffc05,0xfffffc05,0xfffffc05,
+    0xfffffc05,0xfffffc05,0xfffffc05,0xfffffc05,
+/* exception     (offset 0x3C in upm ram) */
+    0xfffffc07,0xfffffc03,0xfffffc05,0xfffffc05,
+};
+
+/*****************************************************************************
+ * Print Board Identity
+ *****************************************************************************/
+int checkboard (void)
+{
+	puts ("Board:"CONFIG_IDENT_STRING"\n");
+	return (0);
+}
+
+/*****************************************************************************
+ * Initialize DRAM controller
+ *****************************************************************************/
+long int initdram (int board_type)
+{
+	volatile immap_t *immap = (immap_t *) CFG_IMMR;
+	volatile memctl8xx_t *memctl = &immap->im_memctl;
+
+	/*
+	 * Only initialize memory controller when running from FLASH.
+	 * When running from RAM, don't touch it.
+	 */
+	if ((ulong) initdram & 0xff000000)
+	{
+		volatile uint	*addr1, *addr2;
+		uint			i, j;
+
+		upmconfig (UPMA, (uint *) edo_60ns_25MHz_tbl,
+			sizeof (edo_60ns_25MHz_tbl) / sizeof (uint));
+		memctl->memc_mptpr = 0x0200;
+		memctl->memc_mamr = 0x0ca20330;
+		memctl->memc_or2 = -CFG_DRAM_MAX | OR_CSNT_SAM;
+		memctl->memc_br2 = CFG_DRAM_BASE | BR_MS_UPMA | BR_V;
+		/*
+		 * Do 8 read accesses to DRAM
+		 */
+		addr1 = (volatile uint*) 0;
+		addr2 = (volatile uint*) 0x00400000;
+		for (i=0, j=0; i<8; i++)
+			j = addr1[0];
+		
+		/*
+		 * Now check whether we got 4MB or 16MB populated
+		 */
+		addr1[0] = 0x12345678;
+		addr1[1] = 0x9abcdef0;
+		addr2[0] = 0xfeedc0de;
+		addr2[1] = 0x47110815;
+		if (addr1[0] == 0xfeedc0de && addr1[1] == 0x47110815)
+		{
+			/* only 4MB populated */
+			memctl->memc_or2 = -(CFG_DRAM_MAX/4) | OR_CSNT_SAM;
+		}
+	}
+
+	return -(memctl->memc_or2 & 0xffff0000);
+}
+
+/*****************************************************************************
+ * otherinits after RAM is there and we are relocated to RAM
+ * note: though this is an int function, nobody cares for the result!
+ *****************************************************************************/
+int misc_init_r (void)
+{
+	/* read 'factory' part of EEPROM */
+	uchar				buf[81];
+	uchar				*p;
+	uint				length;
+	uint				addr;
+	uint				len;
+
+	/* get length first */
+	addr = CFG_FACT_OFFSET;
+	if (eeprom_read (CFG_I2C_FACT_ADDR, addr, buf, 2))
+	{
+bailout:
+		printf ("cannot read factory configuration\n");
+		printf ("be sure to set ethaddr	yourself!\n");
+		return 0;
+	}
+	length = buf[0] + (buf[1]<<8);
+	addr += 2;
+
+	/* sanity check */
+	if (length < 20 || length > CFG_FACT_SIZE-2)
+		goto bailout;
+
+	/* read lines */
+	while (length > 0)
+	{
+		/* read one line */
+		len = length > 80 ? 80 : length;
+		if (eeprom_read (CFG_I2C_FACT_ADDR, addr, buf, len))
+			goto bailout;
+		/* mark end of buffer */
+		buf[len] = 0;
+		/* search end of line */
+		for (p=buf; *p && *p != 0x0a; p++) ;
+		if (!*p)
+			goto bailout;
+		*p++ = 0;
+		/* advance to next line start */
+		length -= p-buf;
+		addr += p-buf;
+		/*printf ("%s\n", buf);*/
+		/* search for our specific entry */
+		if (!strncmp ((char *)buf, "[RLA/lan/Ethernet] ", 19))
+		{
+			setenv ("ethaddr", buf+19);
+		} 
+		else if (!strncmp ((char *)buf, "[BOARD/SERIAL] ", 15))
+		{
+			setenv ("serial#", buf+15);
+		} 
+		else if (!strncmp ((char *)buf, "[BOARD/TYPE] ", 13))
+		{
+			setenv ("board_id", buf+13);
+		} 
+	}
+	return (0);
+}
+

board/emk/top860/u-boot.lds

@@ -0,0 +1,122 @@
+/*
+ * (C) Copyright 2000
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_ARCH(powerpc)
+SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
+/* Do we need any of these for elf?
+   __DYNAMIC = 0;    */
+SECTIONS
+{
+  /* Read-only sections, merged into text segment: */
+  . = + SIZEOF_HEADERS;
+  .interp : { *(.interp) }
+  .hash          : { *(.hash)		}
+  .dynsym        : { *(.dynsym)		}
+  .dynstr        : { *(.dynstr)		}
+  .rel.text      : { *(.rel.text)		}
+  .rela.text     : { *(.rela.text) 	}
+  .rel.data      : { *(.rel.data)		}
+  .rela.data     : { *(.rela.data) 	}
+  .rel.rodata    : { *(.rel.rodata) 	}
+  .rela.rodata   : { *(.rela.rodata) 	}
+  .rel.got       : { *(.rel.got)		}
+  .rela.got      : { *(.rela.got)		}
+  .rel.ctors     : { *(.rel.ctors)	}
+  .rela.ctors    : { *(.rela.ctors)	}
+  .rel.dtors     : { *(.rel.dtors)	}
+  .rela.dtors    : { *(.rela.dtors)	}
+  .rel.bss       : { *(.rel.bss)		}
+  .rela.bss      : { *(.rela.bss)		}
+  .rel.plt       : { *(.rel.plt)		}
+  .rela.plt      : { *(.rela.plt)		}
+  .init          : { *(.init)	}
+  .plt : { *(.plt) }
+  .text      :
+  {
+    cpu/mpc8xx/start.o	(.text)
+
+    *(.text)
+    *(.fixup)
+    *(.got1)
+  }
+  _etext = .;
+  PROVIDE (etext = .);
+  .rodata    :
+  {
+    *(.rodata)
+    *(.rodata1)
+  }
+  .fini      : { *(.fini)    } =0
+  .ctors     : { *(.ctors)   }
+  .dtors     : { *(.dtors)   }
+
+  /* Read-write section, merged into data segment: */
+  . = (. + 0x00FF) & 0xFFFFFF00;
+  _erotext = .;
+  PROVIDE (erotext = .);
+  .reloc   :
+  {
+    *(.got)
+    _GOT2_TABLE_ = .;
+    *(.got2)
+    _FIXUP_TABLE_ = .;
+    *(.fixup)
+  }
+  __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
+  __fixup_entries = (. - _FIXUP_TABLE_)>>2;
+
+  .data    :
+  {
+    *(.data)
+    *(.data1)
+    *(.sdata)
+    *(.sdata2)
+    *(.dynamic)
+    CONSTRUCTORS
+  }
+  _edata  =  .;
+  PROVIDE (edata = .);
+
+  __start___ex_table = .;
+  __ex_table : { *(__ex_table) }
+  __stop___ex_table = .;
+
+  . = ALIGN(256);
+  __init_begin = .;
+  .text.init : { *(.text.init) }
+  .data.init : { *(.data.init) }
+  . = ALIGN(256);
+  __init_end = .;
+
+  __bss_start = .;
+  .bss       :
+  {
+   *(.sbss) *(.scommon)
+   *(.dynbss)
+   *(.bss)
+   *(COMMON)
+  }
+  _end = . ;
+  PROVIDE (end = .);
+}
+

board/emk/top860/u-boot.lds.debug

@@ -0,0 +1,132 @@
+/*
+ * (C) Copyright 2000
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_ARCH(powerpc)
+SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
+/* Do we need any of these for elf?
+   __DYNAMIC = 0;    */
+SECTIONS
+{
+  /* Read-only sections, merged into text segment: */
+  . = + SIZEOF_HEADERS;
+  .interp : { *(.interp) }
+  .hash          : { *(.hash)		}
+  .dynsym        : { *(.dynsym)		}
+  .dynstr        : { *(.dynstr)		}
+  .rel.text      : { *(.rel.text)		}
+  .rela.text     : { *(.rela.text) 	}
+  .rel.data      : { *(.rel.data)		}
+  .rela.data     : { *(.rela.data) 	}
+  .rel.rodata    : { *(.rel.rodata) 	}
+  .rela.rodata   : { *(.rela.rodata) 	}
+  .rel.got       : { *(.rel.got)		}
+  .rela.got      : { *(.rela.got)		}
+  .rel.ctors     : { *(.rel.ctors)	}
+  .rela.ctors    : { *(.rela.ctors)	}
+  .rel.dtors     : { *(.rel.dtors)	}
+  .rela.dtors    : { *(.rela.dtors)	}
+  .rel.bss       : { *(.rel.bss)		}
+  .rela.bss      : { *(.rela.bss)		}
+  .rel.plt       : { *(.rel.plt)		}
+  .rela.plt      : { *(.rela.plt)		}
+  .init          : { *(.init)	}
+  .plt : { *(.plt) }
+  .text      :
+  {
+    /* WARNING - the following is hand-optimized to fit within	*/
+    /* the sector layout of our flash chips!	XXX FIXME XXX	*/
+
+    cpu/mpc8xx/start.o	(.text)
+    common/dlmalloc.o	(.text)
+    lib_generic/vsprintf.o	(.text)
+    lib_generic/crc32.o		(.text)
+    lib_ppc/extable.o	(.text)
+
+    . = env_offset;
+    common/environment.o(.text)
+
+    *(.text)
+    *(.fixup)
+    *(.got1)
+  }
+  _etext = .;
+  PROVIDE (etext = .);
+  .rodata    :
+  {
+    *(.rodata)
+    *(.rodata1)
+  }
+  .fini      : { *(.fini)    } =0
+  .ctors     : { *(.ctors)   }
+  .dtors     : { *(.dtors)   }
+
+  /* Read-write section, merged into data segment: */
+  . = (. + 0x0FFF) & 0xFFFFF000;
+  _erotext = .;
+  PROVIDE (erotext = .);
+  .reloc   :
+  {
+    *(.got)
+    _GOT2_TABLE_ = .;
+    *(.got2)
+    _FIXUP_TABLE_ = .;
+    *(.fixup)
+  }
+  __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
+  __fixup_entries = (. - _FIXUP_TABLE_)>>2;
+
+  .data    :
+  {
+    *(.data)
+    *(.data1)
+    *(.sdata)
+    *(.sdata2)
+    *(.dynamic)
+    CONSTRUCTORS
+  }
+  _edata  =  .;
+  PROVIDE (edata = .);
+
+  __start___ex_table = .;
+  __ex_table : { *(__ex_table) }
+  __stop___ex_table = .;
+
+  . = ALIGN(4096);
+  __init_begin = .;
+  .text.init : { *(.text.init) }
+  .data.init : { *(.data.init) }
+  . = ALIGN(4096);
+  __init_end = .;
+
+  __bss_start = .;
+  .bss       :
+  {
+   *(.sbss) *(.scommon)
+   *(.dynbss)
+   *(.bss)
+   *(COMMON)
+  }
+  _end = . ;
+  PROVIDE (end = .);
+}
+

board/ep7312/flash.c

@@ -61,7 +61,7 @@ ulong flash_init (void)
 	 */
 	flash_protect ( FLAG_PROTECT_SET,
 			CFG_FLASH_BASE,
-			CFG_FLASH_BASE + _armboot_end_data - _armboot_start,
+			CFG_FLASH_BASE + monitor_flash_len - 1,
 			&flash_info[0]);
 
 	flash_protect ( FLAG_PROTECT_SET,

board/ep8260/flash.c

@@ -140,7 +140,7 @@ unsigned long flash_init (void)
 #if CFG_MONITOR_BASE >= CFG_FLASH0_BASE
     flash_protect(FLAG_PROTECT_SET,
 		  CFG_MONITOR_BASE,
-		  CFG_MONITOR_BASE+CFG_MONITOR_LEN-1,
+		  CFG_MONITOR_BASE+monitor_flash_len-1,
 		  &flash_info[0]);
 #endif
 

board/eric/flash.c

@@ -83,13 +83,13 @@ unsigned long flash_init (void)
 	    /* Monitor protection ON by default */
 #if 0	    /* sand: */
 	    (void)flash_protect(FLAG_PROTECT_SET,
-				FLASH_BASE0_PRELIM-CFG_MONITOR_LEN+size_b0,
+				FLASH_BASE0_PRELIM-monitor_flash_len+size_b0,
 				FLASH_BASE0_PRELIM-1+size_b0,
 				&flash_info[0]);
 #else
 	    (void)flash_protect(FLAG_PROTECT_SET,
 		      		CFG_MONITOR_BASE,
-		      		CFG_MONITOR_BASE+CFG_MONITOR_LEN-1,
+		      		CFG_MONITOR_BASE+monitor_flash_len-1,
 		      		&flash_info[0]);
 #endif
 	    size_b1 = 0 ;
@@ -132,13 +132,13 @@ unsigned long flash_init (void)
 	    /* monitor protection ON by default */
 #if 0	    /* sand: */
 	    (void)flash_protect(FLAG_PROTECT_SET,
-				FLASH_BASE0_PRELIM-CFG_MONITOR_LEN+size_b0,
+				FLASH_BASE0_PRELIM-monitor_flash_len+size_b0,
 				FLASH_BASE0_PRELIM-1+size_b0,
 				&flash_info[0]);
 #else
 	    (void)flash_protect(FLAG_PROTECT_SET,
 		      		CFG_MONITOR_BASE,
-		      		CFG_MONITOR_BASE+CFG_MONITOR_LEN-1,
+		      		CFG_MONITOR_BASE+monitor_flash_len-1,
 		      		&flash_info[0]);
 #endif
 
@@ -150,12 +150,12 @@ unsigned long flash_init (void)
 
 	      /* monitor protection ON by default */
 	      (void)flash_protect(FLAG_PROTECT_SET,
-				  base_b1+size_b1-CFG_MONITOR_LEN,
+				  base_b1+size_b1-monitor_flash_len,
 				  base_b1+size_b1-1,
 				  &flash_info[1]);
 	      /* monitor protection OFF by default (one is enough) */
 	      (void)flash_protect(FLAG_PROTECT_CLEAR,
-				  base_b0+size_b0-CFG_MONITOR_LEN,
+				  base_b0+size_b0-monitor_flash_len,
 				  base_b0+size_b0-1,
 				  &flash_info[0]);
 	    } else {

board/esd/adciop/flash.c

@@ -80,7 +80,7 @@ unsigned long flash_init (void)
 
 	/* monitor protection ON by default */
 	flash_protect(FLAG_PROTECT_SET,
-		      FLASH_BASE0_PRELIM+size_b0-CFG_MONITOR_LEN,
+		      FLASH_BASE0_PRELIM+size_b0-monitor_flash_len,
 		      FLASH_BASE0_PRELIM+size_b0-1,
 		      &flash_info[0]);
 
@@ -93,12 +93,12 @@ unsigned long flash_init (void)
 
 		/* monitor protection ON by default */
 		flash_protect(FLAG_PROTECT_SET,
-			      FLASH_BASE0_PRELIM+size_b0+size_b1-CFG_MONITOR_LEN,
+			      FLASH_BASE0_PRELIM+size_b0+size_b1-monitor_flash_len,
 			      FLASH_BASE0_PRELIM+size_b0+size_b1-1,
 			      &flash_info[1]);
                 /* monitor protection OFF by default (one is enough) */
                 flash_protect(FLAG_PROTECT_CLEAR,
-			      FLASH_BASE0_PRELIM+size_b0-CFG_MONITOR_LEN,
+			      FLASH_BASE0_PRELIM+size_b0-monitor_flash_len,
 			      FLASH_BASE0_PRELIM+size_b0-1,
 			      &flash_info[0]);
 	} else {

board/esd/ar405/flash.c

@@ -94,7 +94,7 @@ unsigned long flash_init (void)
 
 	/* monitor protection ON by default */
 	(void)flash_protect(FLAG_PROTECT_SET,
-			    base_b0+size_b0-CFG_MONITOR_LEN,
+			    base_b0+size_b0-monitor_flash_len,
 			    base_b0+size_b0-1,
 			    &flash_info[0]);
 
@@ -106,12 +106,12 @@ unsigned long flash_init (void)
 
 		/* monitor protection ON by default */
 		(void)flash_protect(FLAG_PROTECT_SET,
-				    base_b1+size_b1-CFG_MONITOR_LEN,
+				    base_b1+size_b1-monitor_flash_len,
 				    base_b1+size_b1-1,
 				    &flash_info[1]);
                 /* monitor protection OFF by default (one is enough) */
                 (void)flash_protect(FLAG_PROTECT_CLEAR,
-                                    base_b0+size_b0-CFG_MONITOR_LEN,
+                                    base_b0+size_b0-monitor_flash_len,
                                     base_b0+size_b0-1,
                                     &flash_info[0]);
 	} else {

board/esd/ash405/Makefile

@@ -0,0 +1,46 @@
+#
+# (C) Copyright 2000
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB	= lib$(BOARD).a
+
+OBJS	= $(BOARD).o flash.o
+
+$(LIB):	$(OBJS) $(SOBJS)
+	$(AR) crv $@ $^
+
+clean:
+	rm -f $(SOBJS) $(OBJS)
+
+distclean:	clean
+	rm -f $(LIB) core *.bak .depend
+
+#########################################################################
+
+.depend:	Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
+		$(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
+
+sinclude .depend
+
+#########################################################################

board/esd/ash405/ash405.c

@@ -0,0 +1,247 @@
+/*
+ * (C) Copyright 2001-2003
+ * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/processor.h>
+#include <command.h>
+#include <cmd_boot.h>
+#include <malloc.h>
+
+/* ------------------------------------------------------------------------- */
+
+#if 0
+#define FPGA_DEBUG
+#endif
+
+/* fpga configuration data - gzip compressed and generated by bin2c */
+const unsigned char fpgadata[] =
+{
+#include "fpgadata.c"
+};
+
+/*
+ * include common fpga code (for esd boards)
+ */
+#include "../common/fpga.c"
+
+
+/* Prototypes */
+int gunzip(void *, int, unsigned char *, int *);
+
+
+int board_pre_init (void)
+{
+	/*
+	 * IRQ 0-15  405GP internally generated; active high; level sensitive
+	 * IRQ 16    405GP internally generated; active low; level sensitive
+	 * IRQ 17-24 RESERVED
+	 * IRQ 25 (EXT IRQ 0) CAN0; active low; level sensitive
+	 * IRQ 26 (EXT IRQ 1) SER0 ; active low; level sensitive
+	 * IRQ 27 (EXT IRQ 2) SER1; active low; level sensitive
+	 * IRQ 28 (EXT IRQ 3) FPGA 0; active low; level sensitive
+	 * IRQ 29 (EXT IRQ 4) FPGA 1; active low; level sensitive
+	 * IRQ 30 (EXT IRQ 5) PCI INTA; active low; level sensitive
+	 * IRQ 31 (EXT IRQ 6) COMPACT FLASH; active high; level sensitive
+	 */
+	mtdcr(uicsr, 0xFFFFFFFF);       /* clear all ints */
+	mtdcr(uicer, 0x00000000);       /* disable all ints */
+	mtdcr(uiccr, 0x00000000);       /* set all to be non-critical*/
+	mtdcr(uicpr, 0xFFFFFF81);       /* set int polarities */
+	mtdcr(uictr, 0x10000000);       /* set int trigger levels */
+	mtdcr(uicvcr, 0x00000001);      /* set vect base=0,INT0 highest priority*/
+	mtdcr(uicsr, 0xFFFFFFFF);       /* clear all ints */
+
+	/*
+	 * EBC Configuration Register: set ready timeout to 512 ebc-clks -> ca. 15 us
+	 */
+	mtebc (epcr, 0xa8400000); /* ebc always driven */
+
+	return 0;
+}
+
+
+/* ------------------------------------------------------------------------- */
+
+int misc_init_f (void)
+{
+	return 0;  /* dummy implementation */
+}
+
+
+int misc_init_r (void)
+{
+	volatile unsigned char *duart0_mcr = (unsigned char *)((ulong)DUART0_BA + 4);
+	volatile unsigned char *duart1_mcr = (unsigned char *)((ulong)DUART1_BA + 4);
+	volatile unsigned char *duart2_mcr = (unsigned char *)((ulong)DUART2_BA + 4);
+	volatile unsigned char *duart3_mcr = (unsigned char *)((ulong)DUART3_BA + 4);
+	unsigned char *dst;
+	ulong len = sizeof(fpgadata);
+	int status;
+	int index;
+	int i;
+
+	dst = malloc(CFG_FPGA_MAX_SIZE);
+	if (gunzip (dst, CFG_FPGA_MAX_SIZE, (uchar *)fpgadata, (int *)&len) != 0) {
+		printf ("GUNZIP ERROR - must RESET board to recover\n");
+		do_reset (NULL, 0, 0, NULL);
+	}
+
+	status = fpga_boot(dst, len);
+	if (status != 0) {
+		printf("\nFPGA: Booting failed ");
+		switch (status) {
+		case ERROR_FPGA_PRG_INIT_LOW:
+			printf("(Timeout: INIT not low after asserting PROGRAM*)\n ");
+			break;
+		case ERROR_FPGA_PRG_INIT_HIGH:
+			printf("(Timeout: INIT not high after deasserting PROGRAM*)\n ");
+			break;
+		case ERROR_FPGA_PRG_DONE:
+			printf("(Timeout: DONE not high after programming FPGA)\n ");
+			break;
+		}
+
+		/* display infos on fpgaimage */
+		index = 15;
+		for (i=0; i<4; i++) {
+			len = dst[index];
+			printf("FPGA: %s\n", &(dst[index+1]));
+			index += len+3;
+		}
+		putc ('\n');
+		/* delayed reboot */
+		for (i=20; i>0; i--) {
+			printf("Rebooting in %2d seconds \r",i);
+			for (index=0;index<1000;index++)
+				udelay(1000);
+		}
+		putc ('\n');
+		do_reset(NULL, 0, 0, NULL);
+	}
+
+	puts("FPGA:  ");
+
+	/* display infos on fpgaimage */
+	index = 15;
+	for (i=0; i<4; i++) {
+		len = dst[index];
+		printf("%s ", &(dst[index+1]));
+		index += len+3;
+	}
+	putc ('\n');
+
+	free(dst);
+
+	/*
+	 * Reset FPGA via FPGA_DATA pin
+	 */
+	SET_FPGA(FPGA_PRG | FPGA_CLK);
+	udelay(1000); /* wait 1ms */
+	SET_FPGA(FPGA_PRG | FPGA_CLK | FPGA_DATA);
+	udelay(1000); /* wait 1ms */
+
+	/*
+	 * Reset external DUARTs
+	 */
+	out32(GPIO0_OR, in32(GPIO0_OR) | CFG_DUART_RST); /* set reset to high */
+	udelay(10); /* wait 10us */
+	out32(GPIO0_OR, in32(GPIO0_OR) & ~CFG_DUART_RST); /* set reset to low */
+	udelay(1000); /* wait 1ms */
+
+	/*
+	 * Set NAND-FLASH GPIO signals to default
+	 */
+	out32(GPIO0_OR, in32(GPIO0_OR) & ~(CFG_NAND_CLE | CFG_NAND_ALE));
+	out32(GPIO0_OR, in32(GPIO0_OR) | CFG_NAND_CE);
+
+	/*
+	 * Enable interrupts in exar duart mcr[3]
+	 */
+	*duart0_mcr = 0x08;
+	*duart1_mcr = 0x08;
+	*duart2_mcr = 0x08;
+	*duart3_mcr = 0x08;
+
+	return (0);
+}
+
+
+/*
+ * Check Board Identity:
+ */
+
+int checkboard (void)
+{
+	unsigned char str[64];
+	int i = getenv_r ("serial#", str, sizeof(str));
+
+	puts ("Board: ");
+
+	if (i == -1) {
+		puts ("### No HW ID - assuming ASH405");
+	} else {
+		puts(str);
+	}
+
+	putc ('\n');
+
+	return 0;
+}
+
+/* ------------------------------------------------------------------------- */
+
+long int initdram (int board_type)
+{
+	unsigned long val;
+
+	mtdcr(memcfga, mem_mb0cf);
+	val = mfdcr(memcfgd);
+
+#if 0
+	printf("\nmb0cf=%x\n", val); /* test-only */
+	printf("strap=%x\n", mfdcr(strap)); /* test-only */
+#endif
+
+	return (4*1024*1024 << ((val & 0x000e0000) >> 17));
+}
+
+/* ------------------------------------------------------------------------- */
+
+int testdram (void)
+{
+	/* TODO: XXX XXX XXX */
+	printf ("test: 16 MB - ok\n");
+
+	return (0);
+}
+
+/* ------------------------------------------------------------------------- */
+
+#if (CONFIG_COMMANDS & CFG_CMD_NAND)
+extern void nand_probe(ulong physadr);
+void nand_init(void)
+{
+	printf("Probing at 0x%.8x\n", CFG_NAND_BASE);
+	nand_probe(CFG_NAND_BASE);
+}
+#endif

board/esd/ash405/config.mk

@@ -0,0 +1,28 @@
+#
+# (C) Copyright 2000
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+#
+# esd ASH405 boards
+#
+
+TEXT_BASE = 0xFFFC0000

board/esd/ash405/flash.c

@@ -0,0 +1,101 @@
+/*
+ * (C) Copyright 2001
+ * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <ppc4xx.h>
+#include <asm/processor.h>
+
+/*
+ * include common flash code (for esd boards)
+ */
+#include "../common/flash.c"
+
+/*-----------------------------------------------------------------------
+ * Functions
+ */
+static ulong flash_get_size (vu_long * addr, flash_info_t * info);
+static void flash_get_offsets (ulong base, flash_info_t * info);
+
+/*-----------------------------------------------------------------------
+ */
+
+unsigned long flash_init (void)
+{
+	unsigned long size_b0;
+	int i;
+        uint pbcr;
+        unsigned long base_b0;
+	int size_val = 0;
+
+	/* Init: no FLASHes known */
+	for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
+		flash_info[i].flash_id = FLASH_UNKNOWN;
+	}
+
+	/* Static FLASH Bank configuration here - FIXME XXX */
+
+	size_b0 = flash_get_size((vu_long *)FLASH_BASE0_PRELIM, &flash_info[0]);
+
+	if (flash_info[0].flash_id == FLASH_UNKNOWN) {
+		printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
+			size_b0, size_b0<<20);
+	}
+
+        /* Setup offsets */
+        flash_get_offsets (-size_b0, &flash_info[0]);
+
+        /* Re-do sizing to get full correct info */
+        mtdcr(ebccfga, pb0cr);
+        pbcr = mfdcr(ebccfgd);
+        mtdcr(ebccfga, pb0cr);
+        base_b0 = -size_b0;
+	switch (size_b0) {
+	case 1 << 20:
+		size_val = 0;
+		break;
+	case 2 << 20:
+		size_val = 1;
+		break;
+	case 4 << 20:
+		size_val = 2;
+		break;
+	case 8 << 20:
+		size_val = 3;
+		break;
+	case 16 << 20:
+		size_val = 4;
+		break;
+	}
+	pbcr = (pbcr & 0x0001ffff) | base_b0 | (size_val << 17);
+        mtdcr(ebccfgd, pbcr);
+
+        /* Monitor protection ON by default */
+        (void)flash_protect(FLAG_PROTECT_SET,
+                            -CFG_MONITOR_LEN,
+                            0xffffffff,
+                            &flash_info[0]);
+
+        flash_info[0].size = size_b0;
+
+	return (size_b0);
+}

board/esd/ash405/u-boot.lds

@@ -0,0 +1,142 @@
+/*
+ * (C) Copyright 2000
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_ARCH(powerpc)
+SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
+/* Do we need any of these for elf?
+   __DYNAMIC = 0;    */
+SECTIONS
+{
+  .resetvec 0xFFFFFFFC :
+  {
+    *(.resetvec)
+  } = 0xffff
+
+  /* Read-only sections, merged into text segment: */
+  . = + SIZEOF_HEADERS;
+  .interp : { *(.interp) }
+  .hash          : { *(.hash)		}
+  .dynsym        : { *(.dynsym)		}
+  .dynstr        : { *(.dynstr)		}
+  .rel.text      : { *(.rel.text)		}
+  .rela.text     : { *(.rela.text) 	}
+  .rel.data      : { *(.rel.data)		}
+  .rela.data     : { *(.rela.data) 	}
+  .rel.rodata    : { *(.rel.rodata) 	}
+  .rela.rodata   : { *(.rela.rodata) 	}
+  .rel.got       : { *(.rel.got)		}
+  .rela.got      : { *(.rela.got)		}
+  .rel.ctors     : { *(.rel.ctors)	}
+  .rela.ctors    : { *(.rela.ctors)	}
+  .rel.dtors     : { *(.rel.dtors)	}
+  .rela.dtors    : { *(.rela.dtors)	}
+  .rel.bss       : { *(.rel.bss)		}
+  .rela.bss      : { *(.rela.bss)		}
+  .rel.plt       : { *(.rel.plt)		}
+  .rela.plt      : { *(.rela.plt)		}
+  .init          : { *(.init)	}
+  .plt : { *(.plt) }
+  .text      :
+  {
+    /* WARNING - the following is hand-optimized to fit within	*/
+    /* the sector layout of our flash chips!	XXX FIXME XXX	*/
+
+    cpu/ppc4xx/start.o	(.text)
+    cpu/ppc4xx/traps.o	(.text)
+    cpu/ppc4xx/interrupts.o	(.text)
+    cpu/ppc4xx/serial.o	(.text)
+    cpu/ppc4xx/cpu_init.o	(.text)
+    cpu/ppc4xx/speed.o	(.text)
+    cpu/ppc4xx/405gp_enet.o	(.text)
+    common/dlmalloc.o	(.text)
+    lib_generic/crc32.o		(.text)
+    lib_ppc/extable.o	(.text)
+    lib_generic/zlib.o		(.text)
+
+/*    . = env_offset;*/
+/*    common/environment.o(.text)*/
+
+    *(.text)
+    *(.fixup)
+    *(.got1)
+  }
+  _etext = .;
+  PROVIDE (etext = .);
+  .rodata    :
+  {
+    *(.rodata)
+    *(.rodata1)
+  }
+  .fini      : { *(.fini)    } =0
+  .ctors     : { *(.ctors)   }
+  .dtors     : { *(.dtors)   }
+
+  /* Read-write section, merged into data segment: */
+  . = (. + 0x00FF) & 0xFFFFFF00;
+  _erotext = .;
+  PROVIDE (erotext = .);
+  .reloc   :
+  {
+    *(.got)
+    _GOT2_TABLE_ = .;
+    *(.got2)
+    _FIXUP_TABLE_ = .;
+    *(.fixup)
+  }
+  __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
+  __fixup_entries = (. - _FIXUP_TABLE_)>>2;
+
+  .data    :
+  {
+    *(.data)
+    *(.data1)
+    *(.sdata)
+    *(.sdata2)
+    *(.dynamic)
+    CONSTRUCTORS
+  }
+  _edata  =  .;
+  PROVIDE (edata = .);
+
+  __start___ex_table = .;
+  __ex_table : { *(__ex_table) }
+  __stop___ex_table = .;
+
+  . = ALIGN(256);
+  __init_begin = .;
+  .text.init : { *(.text.init) }
+  .data.init : { *(.data.init) }
+  . = ALIGN(256);
+  __init_end = .;
+
+  __bss_start = .;
+  .bss       :
+  {
+   *(.sbss) *(.scommon)
+   *(.dynbss)
+   *(.bss)
+   *(COMMON)
+  }
+  _end = . ;
+  PROVIDE (end = .);
+}

board/esd/canbt/canbt.c

@@ -114,9 +114,9 @@ int board_pre_init (void)
 	/*
 	 * Setup port pins for normal operation
 	 */
-	out32 (IBM405GP_GPIO0_ODR, 0x00000000);	/* no open drain pins */
-	out32 (IBM405GP_GPIO0_TCR, 0x07038100);	/* setup for output */
-	out32 (IBM405GP_GPIO0_OR, 0x07030100);	/* set output pins to high (default) */
+	out32 (GPIO0_ODR, 0x00000000);	/* no open drain pins */
+	out32 (GPIO0_TCR, 0x07038100);	/* setup for output */
+	out32 (GPIO0_OR, 0x07030100);	/* set output pins to high (default) */
 
 	/*
 	 * IRQ 0-15  405GP internally generated; active high; level sensitive

board/esd/canbt/flash.c

@@ -74,7 +74,7 @@ unsigned long flash_init (void)
 
         /* Monitor protection ON by default */
         (void)flash_protect(FLAG_PROTECT_SET,
-                            -CFG_MONITOR_LEN,
+                            -monitor_flash_len,
                             0xffffffff,
                             &flash_info[0]);
 

board/esd/common/fpga.c

@@ -1,5 +1,5 @@
 /*
- * (C) Copyright 2001
+ * (C) Copyright 2001-2003
  * Matthias Fuchs, esd gmbh germany, matthias.fuchs@esd-electronics.com
  * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
  *
@@ -36,11 +36,6 @@
 
 #define MAX_ONES               226
 
-#define IBM405GP_GPIO0_OR      0xef600700  /* GPIO Output */
-#define IBM405GP_GPIO0_TCR     0xef600704  /* GPIO Three-State Control */
-#define IBM405GP_GPIO0_ODR     0xef600718  /* GPIO Open Drain */
-#define IBM405GP_GPIO0_IR      0xef60071c  /* GPIO Input */
-
 #ifdef CFG_FPGA_PRG
 # define FPGA_PRG              CFG_FPGA_PRG /* FPGA program pin (ppc output)*/
 # define FPGA_CLK              CFG_FPGA_CLK /* FPGA clk pin (ppc output)    */
@@ -59,7 +54,7 @@
 #define ERROR_FPGA_PRG_INIT_HIGH -2        /* Timeout after PRG* deasserted */
 #define ERROR_FPGA_PRG_DONE      -3        /* Timeout after programming     */
 
-#define SET_FPGA(data)         out32(IBM405GP_GPIO0_OR, data)
+#define SET_FPGA(data)         out32(GPIO0_OR, data)
 
 #define FPGA_WRITE_1 {                                                    \
         SET_FPGA(FPGA_PRG |            FPGA_DATA);  /* set clock to 0 */  \
@@ -120,12 +115,12 @@ static int fpga_boot(unsigned char *fpgadata, int size)
   /*
    * Setup port pins for fpga programming
    */
-  out32(IBM405GP_GPIO0_ODR, 0x00000000);                       /* no open drain pins      */
-  out32(IBM405GP_GPIO0_TCR, FPGA_PRG | FPGA_CLK | FPGA_DATA);  /* setup for output        */
-  out32(IBM405GP_GPIO0_OR,  FPGA_PRG | FPGA_CLK | FPGA_DATA);  /* set output pins to high */
+  out32(GPIO0_ODR, 0x00000000);                                      /* no open drain pins */
+  out32(GPIO0_TCR, in32(GPIO0_TCR) | FPGA_PRG | FPGA_CLK | FPGA_DATA); /* setup for output */
+  out32(GPIO0_OR, in32(GPIO0_OR) | FPGA_PRG | FPGA_CLK | FPGA_DATA);   /* set pins to high */
 
-  DBG("%s, ",((in32(IBM405GP_GPIO0_IR) & FPGA_DONE) == 0) ? "NOT DONE" : "DONE" );
-  DBG("%s\n",((in32(IBM405GP_GPIO0_IR) & FPGA_INIT) == 0) ? "NOT INIT" : "INIT" );
+  DBG("%s, ",((in32(GPIO0_IR) & FPGA_DONE) == 0) ? "NOT DONE" : "DONE" );
+  DBG("%s\n",((in32(GPIO0_IR) & FPGA_INIT) == 0) ? "NOT INIT" : "INIT" );
 
   /*
    * Init fpga by asserting and deasserting PROGRAM*
@@ -134,7 +129,7 @@ static int fpga_boot(unsigned char *fpgadata, int size)
 
   /* Wait for FPGA init line low */
   count = 0;
-  while (in32(IBM405GP_GPIO0_IR) & FPGA_INIT)
+  while (in32(GPIO0_IR) & FPGA_INIT)
     {
       udelay(1000); /* wait 1ms */
       /* Check for timeout - 100us max, so use 3ms */
@@ -145,15 +140,15 @@ static int fpga_boot(unsigned char *fpgadata, int size)
         }
     }
 
-  DBG("%s, ",((in32(IBM405GP_GPIO0_IR) & FPGA_DONE) == 0) ? "NOT DONE" : "DONE" );
-  DBG("%s\n",((in32(IBM405GP_GPIO0_IR) & FPGA_INIT) == 0) ? "NOT INIT" : "INIT" );
+  DBG("%s, ",((in32(GPIO0_IR) & FPGA_DONE) == 0) ? "NOT DONE" : "DONE" );
+  DBG("%s\n",((in32(GPIO0_IR) & FPGA_INIT) == 0) ? "NOT INIT" : "INIT" );
 
   /* deassert PROGRAM* */
   SET_FPGA(FPGA_PRG | FPGA_CLK | FPGA_DATA);
 
   /* Wait for FPGA end of init period .  */
   count = 0;
-  while (!(in32(IBM405GP_GPIO0_IR) & FPGA_INIT))
+  while (!(in32(GPIO0_IR) & FPGA_INIT))
     {
       udelay(1000); /* wait 1ms */
       /* Check for timeout */
@@ -164,8 +159,8 @@ static int fpga_boot(unsigned char *fpgadata, int size)
         }
     }
 
-  DBG("%s, ",((in32(IBM405GP_GPIO0_IR) & FPGA_DONE) == 0) ? "NOT DONE" : "DONE" );
-  DBG("%s\n",((in32(IBM405GP_GPIO0_IR) & FPGA_INIT) == 0) ? "NOT INIT" : "INIT" );
+  DBG("%s, ",((in32(GPIO0_IR) & FPGA_DONE) == 0) ? "NOT DONE" : "DONE" );
+  DBG("%s\n",((in32(GPIO0_IR) & FPGA_INIT) == 0) ? "NOT INIT" : "INIT" );
 
   DBG("write configuration data into fpga\n");
   /* write configuration-data into fpga... */
@@ -237,8 +232,8 @@ static int fpga_boot(unsigned char *fpgadata, int size)
     }
 #endif
 
-  DBG("%s, ",((in32(IBM405GP_GPIO0_IR) & FPGA_DONE) == 0) ? "NOT DONE" : "DONE" );
-  DBG("%s\n",((in32(IBM405GP_GPIO0_IR) & FPGA_INIT) == 0) ? "NOT INIT" : "INIT" );
+  DBG("%s, ",((in32(GPIO0_IR) & FPGA_DONE) == 0) ? "NOT DONE" : "DONE" );
+  DBG("%s\n",((in32(GPIO0_IR) & FPGA_INIT) == 0) ? "NOT INIT" : "INIT" );
 
   /*
    * Check if fpga's DONE signal - correctly booted ?
@@ -246,7 +241,7 @@ static int fpga_boot(unsigned char *fpgadata, int size)
 
   /* Wait for FPGA end of programming period .  */
   count = 0;
-  while (!(in32(IBM405GP_GPIO0_IR) & FPGA_DONE))
+  while (!(in32(GPIO0_IR) & FPGA_DONE))
     {
       udelay(1000); /* wait 1ms */
       /* Check for timeout */

board/esd/cpci405/config.mk

@@ -28,5 +28,9 @@
 ifeq ($(BOARD_REVISION),CPCI4052)
 TEXT_BASE = 0xFFFC0000
 else
+ifeq ($(BOARD_REVISION),CPCI405AB)
+TEXT_BASE = 0xFFFC0000
+else
 TEXT_BASE = 0xFFFD0000
 endif
+endif

board/esd/cpci405/cpci405.c

@@ -1,5 +1,5 @@
 /*
- * (C) Copyright 2001
+ * (C) Copyright 2001-2003
  * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
  *
  * See file CREDITS for list of people who contributed to this
@@ -37,7 +37,11 @@
 const unsigned char fpgadata[] =
 {
 #ifdef CONFIG_CPCI405_VER2
-# include "fpgadata_cpci4052.c"
+# ifdef CONFIG_CPCI405AB
+#  include "fpgadata_cpci405ab.c"
+# else
+#  include "fpgadata_cpci4052.c"
+# endif
 #else
 # include "fpgadata_cpci405.c"
 #endif
@@ -50,7 +54,7 @@ const unsigned char fpgadata[] =
 
 
 /* Prototypes */
-int version2(void);
+int cpci405_version(void);
 int gunzip(void *, int, unsigned char *, int *);
 
 
@@ -74,16 +78,16 @@ int board_pre_init (void)
 	/*
 	 * First pull fpga-prg pin low, to disable fpga logic (on version 2 board)
 	 */
-	out32(IBM405GP_GPIO0_ODR, 0x00000000);        /* no open drain pins      */
-	out32(IBM405GP_GPIO0_TCR, CFG_FPGA_PRG);      /* setup for output        */
-	out32(IBM405GP_GPIO0_OR,  CFG_FPGA_PRG);      /* set output pins to high */
-	out32(IBM405GP_GPIO0_OR, 0);                  /* pull prg low            */
+	out32(GPIO0_ODR, 0x00000000);        /* no open drain pins      */
+	out32(GPIO0_TCR, CFG_FPGA_PRG);      /* setup for output        */
+	out32(GPIO0_OR,  CFG_FPGA_PRG);      /* set output pins to high */
+	out32(GPIO0_OR, 0);                  /* pull prg low            */
 
 	/*
 	 * Boot onboard FPGA
 	 */
 #ifndef CONFIG_CPCI405_VER2
-	if (!version2()) {
+	if (cpci405_version() == 1) {
 		status = fpga_boot((unsigned char *)fpgadata, sizeof(fpgadata));
 		if (status != 0) {
 			/* booting FPGA failed */
@@ -144,7 +148,11 @@ int board_pre_init (void)
 	mtdcr(uicsr, 0xFFFFFFFF);       /* clear all ints */
 	mtdcr(uicer, 0x00000000);       /* disable all ints */
 	mtdcr(uiccr, 0x00000000);       /* set all to be non-critical*/
-	mtdcr(uicpr, 0xFFFFFF81);       /* set int polarities */
+	if (cpci405_version() == 3) {
+		mtdcr(uicpr, 0xFFFFFF99);       /* set int polarities */
+	} else {
+		mtdcr(uicpr, 0xFFFFFF81);       /* set int polarities */
+	}
 	mtdcr(uictr, 0x10000000);       /* set int trigger levels */
 	mtdcr(uicvcr, 0x00000001);      /* set vect base=0,INT0 highest priority*/
 	mtdcr(uicsr, 0xFFFFFFFF);       /* clear all ints */
@@ -178,29 +186,43 @@ int cpci405_host(void)
 }
 
 
-int version2(void)
+int cpci405_version(void)
 {
 	unsigned long cntrl0Reg;
 	unsigned long value;
 
 	/*
-	 * Setup GPIO pins (CS2/GPIO11 as GPIO)
+	 * Setup GPIO pins (CS2/GPIO11 and CS3/GPIO12 as GPIO)
 	 */
 	cntrl0Reg = mfdcr(cntrl0);
-	mtdcr(cntrl0, cntrl0Reg | 0x02000000);
-
+	mtdcr(cntrl0, cntrl0Reg | 0x03000000);
+	out32(GPIO0_ODR, in32(GPIO0_ODR) & ~0x00180000);
+	out32(GPIO0_TCR, in32(GPIO0_TCR) & ~0x00180000);
 	udelay(1000);                   /* wait some time before reading input */
-	value = in32(IBM405GP_GPIO0_IR) & 0x00100000; /* test GPIO11 */
+	value = in32(GPIO0_IR) & 0x00180000;       /* get config bits */
 
 	/*
-	 * Setup GPIO pins (CS2/GPIO11 as CS again)
+	 * Restore GPIO settings
 	 */
 	mtdcr(cntrl0, cntrl0Reg);
 
-	if (value)
-		return 0;               /* no, board is version 1.x */
-	else
-		return -1;              /* yes, board is version 2.x */
+	switch (value) {
+	case 0x00180000:
+		/* CS2==1 && CS3==1 -> version 1 */
+		return 1;
+	case 0x00080000:
+		/* CS2==0 && CS3==1 -> version 2 */
+		return 2;
+	case 0x00100000:
+		/* CS2==1 && CS3==0 -> version 3 */
+		return 3;
+	case 0x00000000:
+		/* CS2==0 && CS3==0 -> version 4 */
+		return 4;
+	default:
+		/* should not be reached! */
+		return 2;
+	}
 }
 
 
@@ -216,6 +238,7 @@ int misc_init_r (void)
 
 	bd_t *bd = gd->bd;
 	char *	tmp;                    /* Temporary char pointer      */
+	unsigned long cntrl0Reg;
 
 #ifdef CONFIG_CPCI405_VER2
 	unsigned char *dst;
@@ -223,14 +246,13 @@ int misc_init_r (void)
 	int status;
 	int index;
 	int i;
-	unsigned long cntrl0Reg;
 
 	/*
 	 * On CPCI-405 version 2 the environment is saved in eeprom!
 	 * FPGA can be gzip compressed (malloc) and booted this late.
 	 */
 
-	if (version2()) {
+	if (cpci405_version() >= 2) {
 		/*
 		 * Setup GPIO pins (CS6+CS7 as GPIO)
 		 */
@@ -291,11 +313,41 @@ int misc_init_r (void)
 		putc ('\n');
 
 		free(dst);
+
+		/*
+		 * Reset FPGA via FPGA_DATA pin
+		 */
+		SET_FPGA(FPGA_PRG | FPGA_CLK);
+		udelay(1000); /* wait 1ms */
+		SET_FPGA(FPGA_PRG | FPGA_CLK | FPGA_DATA);
+		udelay(1000); /* wait 1ms */
+
+		if (cpci405_version() == 3) {
+			volatile unsigned short *fpga_mode = (unsigned short *)CFG_FPGA_BASE_ADDR;
+			volatile unsigned char *leds = (unsigned char *)CFG_LED_ADDR;
+
+			/*
+			 * Enable outputs in fpga on version 3 board
+			 */
+			*fpga_mode |= CFG_FPGA_MODE_ENABLE_OUTPUT;
+
+			/*
+			 * Set outputs to 0
+			 */
+			*leds = 0x00;
+
+			/*
+			 * Reset external DUART
+			 */
+			*fpga_mode |= CFG_FPGA_MODE_DUART_RESET;
+			udelay(100);
+			*fpga_mode &= ~(CFG_FPGA_MODE_DUART_RESET);
+		}
 	}
 	else {
-		printf("\n*** U-Boot Version does not match Board Version!\n");
-		printf("*** CPCI-405 Version 2.x detected!\n");
-		printf("*** Please use correct U-Boot version (CPCI4052)!\n\n");
+		puts("\n*** U-Boot Version does not match Board Version!\n");
+		puts("*** CPCI-405 Version 1.x detected!\n");
+		puts("*** Please use correct U-Boot version (CPCI405 instead of CPCI4052)!\n\n");
 	}
 
 #else /* CONFIG_CPCI405_VER2 */
@@ -321,14 +373,20 @@ int misc_init_r (void)
 		}
 	}
 
-	if (version2()) {
-		printf("\n*** U-Boot Version does not match Board Version!\n");
-		printf("*** CPCI-405 Board Version 1.x detected!\n");
-		printf("*** Please use correct U-Boot version (CPCI405)!\n\n");
+	if (cpci405_version() >= 2) {
+		puts("\n*** U-Boot Version does not match Board Version!\n");
+		puts("*** CPCI-405 Board Version 2.x detected!\n");
+		puts("*** Please use correct U-Boot version (CPCI4052 instead of CPCI405)!\n\n");
 	}
 
 #endif /* CONFIG_CPCI405_VER2 */
 
+	/*
+	 * Select cts (and not dsr) on uart1
+	 */
+	cntrl0Reg = mfdcr(cntrl0);
+	mtdcr(cntrl0, cntrl0Reg | 0x00001000);
+
 	/*
 	 * Write ethernet addr in NVRAM for VxWorks
 	 */
@@ -350,6 +408,7 @@ int checkboard (void)
 #endif
 	unsigned char str[64];
 	int i = getenv_r ("serial#", str, sizeof(str));
+	unsigned short ver;
 
 	puts ("Board: ");
 
@@ -359,17 +418,19 @@ int checkboard (void)
 		puts(str);
 	}
 
-	if (version2())
-		puts (" (Ver 2.x, ");
-	else
-		puts (" (Ver 1.x, ");
+	ver = cpci405_version();
+	printf(" (Ver %d.x, ", ver);
 
-#if 0
-	if ((*(unsigned short *)((unsigned long)CFG_FPGA_BASE_ADDR) + CFG_FPGA_STATUS)
-	    & CFG_FPGA_STATUS_FLASH)
-		puts ("FLASH Bank A, ");
-	else
-		puts ("FLASH Bank B, ");
+#if 0 /* test-only */
+	if (ver >= 2) {
+		volatile u16 *fpga_status = (u16 *)CFG_FPGA_BASE_ADDR + 1;
+
+		if (*fpga_status & CFG_FPGA_STATUS_FLASH) {
+			puts ("FLASH Bank B, ");
+		} else {
+			puts ("FLASH Bank A, ");
+		}
+	}
 #endif
 
 	if (ctermm2()) {
@@ -448,4 +509,44 @@ void ide_set_reset(int on)
 #endif /* CONFIG_IDE_RESET */
 #endif /* CONFIG_CPCI405_VER2 */
 
+#if 0 /* test-only */
 /* ------------------------------------------------------------------------- */
+
+u8 *dhcp_vendorex_prep (u8 * e)
+{
+	char *ptr;
+
+/* DHCP vendor-class-identifier = 60 */
+	if ((ptr = getenv ("dhcp_vendor-class-identifier"))) {
+		*e++ = 60;
+		*e++ = strlen (ptr);
+		while (*ptr)
+			*e++ = *ptr++;
+	}
+/* my DHCP_CLIENT_IDENTIFIER = 61 */
+	if ((ptr = getenv ("dhcp_client_id"))) {
+		*e++ = 61;
+		*e++ = strlen (ptr);
+		while (*ptr)
+			*e++ = *ptr++;
+	}
+
+	return e;
+}
+
+
+/* ------------------------------------------------------------------------- */
+
+u8 *dhcp_vendorex_proc (u8 * popt)
+{
+	if (*popt == 61)
+		return (u8 *)-1;
+	if (*popt == 43) {
+		printf("|%s|", popt+4); /* test-only */
+		return (u8 *)-1;
+	}
+	return NULL;
+}
+
+/* ------------------------------------------------------------------------- */
+#endif /* test-only */

board/esd/cpci405/flash.c

@@ -1,5 +1,5 @@
 /*
- * (C) Copyright 2001
+ * (C) Copyright 2001-2003
  * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
  *
  * See file CREDITS for list of people who contributed to this
@@ -39,13 +39,31 @@ static void flash_get_offsets (ulong base, flash_info_t * info);
 /*-----------------------------------------------------------------------
  */
 
+unsigned long calc_size(unsigned long size)
+{
+	switch (size) {
+	case 1 << 20:
+		return 0;
+	case 2 << 20:
+		return 1;
+	case 4 << 20:
+		return 2;
+	case 8 << 20:
+		return 3;
+	case 16 << 20:
+		return 4;
+	default:
+		return 0;
+	}
+}
+
+
 unsigned long flash_init (void)
 {
 	unsigned long size_b0, size_b1;
 	int i;
 	uint pbcr;
 	unsigned long base_b0, base_b1;
-	int size_val = 0;
 
 	/* Init: no FLASHes known */
 	for (i = 0; i < CFG_MAX_FLASH_BANKS; ++i) {
@@ -68,61 +86,37 @@ unsigned long flash_init (void)
 	/* Re-do sizing to get full correct info */
 
 	if (size_b1) {
+		if (size_b1 < (1 << 20)) {
+			/* minimum CS size on PPC405GP is 1MB !!! */
+			size_b1 = 1 << 20;
+		}
+		base_b1 = -size_b1;
 		mtdcr (ebccfga, pb0cr);
 		pbcr = mfdcr (ebccfgd);
 		mtdcr (ebccfga, pb0cr);
-		base_b1 = -size_b1;
-		switch (size_b1) {
-		case 1 << 20:
-			size_val = 0;
-			break;
-		case 2 << 20:
-			size_val = 1;
-			break;
-		case 4 << 20:
-			size_val = 2;
-			break;
-		case 8 << 20:
-			size_val = 3;
-			break;
-		case 16 << 20:
-			size_val = 4;
-			break;
-		default:
-			size_val = 0;
-			break;
-
-		}
-		pbcr = (pbcr & 0x0001ffff) | base_b1 | (size_val << 17);
+		pbcr = (pbcr & 0x0001ffff) | base_b1 | (calc_size(size_b1) << 17);
 		mtdcr (ebccfgd, pbcr);
-		/*          printf("pb1cr = %x\n", pbcr); */
+#if 0 /* test-only */
+		printf("size_b1=%x base_b1=%x pb1cr = %x\n",
+		       size_b1, base_b1, pbcr); /* test-only */
+#endif
 	}
 
 	if (size_b0) {
+		if (size_b0 < (1 << 20)) {
+			/* minimum CS size on PPC405GP is 1MB !!! */
+			size_b0 = 1 << 20;
+		}
+		base_b0 = base_b1 - size_b0;
 		mtdcr (ebccfga, pb1cr);
 		pbcr = mfdcr (ebccfgd);
 		mtdcr (ebccfga, pb1cr);
-		base_b0 = base_b1 - size_b0;
-		switch (size_b1) {
-		case 1 << 20:
-			size_val = 0;
-			break;
-		case 2 << 20:
-			size_val = 1;
-			break;
-		case 4 << 20:
-			size_val = 2;
-			break;
-		case 8 << 20:
-			size_val = 3;
-			break;
-		case 16 << 20:
-			size_val = 4;
-			break;
-		}
-		pbcr = (pbcr & 0x0001ffff) | base_b0 | (size_val << 17);
+		pbcr = (pbcr & 0x0001ffff) | base_b0 | (calc_size(size_b0) << 17);
 		mtdcr (ebccfgd, pbcr);
-		/*            printf("pb0cr = %x\n", pbcr); */
+#if 0 /* test-only */
+		printf("size_b0=%x base_b0=%x pb0cr = %x\n",
+		       size_b0, base_b0, pbcr); /* test-only */
+#endif
 	}
 
 	size_b0 = flash_get_size ((vu_long *) base_b0, &flash_info[0]);
@@ -131,7 +125,7 @@ unsigned long flash_init (void)
 
 	/* monitor protection ON by default */
 	flash_protect (FLAG_PROTECT_SET,
-			base_b0 + size_b0 - CFG_MONITOR_LEN,
+			base_b0 + size_b0 - monitor_flash_len,
 			base_b0 + size_b0 - 1, &flash_info[0]);
 
 	if (size_b1) {
@@ -142,11 +136,11 @@ unsigned long flash_init (void)
 
 		/* monitor protection ON by default */
 		flash_protect (FLAG_PROTECT_SET,
-				base_b1 + size_b1 - CFG_MONITOR_LEN,
+				base_b1 + size_b1 - monitor_flash_len,
 				base_b1 + size_b1 - 1, &flash_info[1]);
 		/* monitor protection OFF by default (one is enough) */
 		flash_protect (FLAG_PROTECT_CLEAR,
-				base_b0 + size_b0 - CFG_MONITOR_LEN,
+				base_b0 + size_b0 - monitor_flash_len,
 				base_b0 + size_b0 - 1, &flash_info[0]);
 	} else {
 		flash_info[1].flash_id = FLASH_UNKNOWN;