* Patches by Udi Finkelstein, 2 June 2003:

- Added support for custom keyboards, initialized by defining a board-specific drv_keyboard_init as well as defining CONFIG_KEYBOARD . - Added support for the RBC823 board. - cpu/mpc8xx/lcd.c now automatically calculates the Horizontal Pixel Count field. * Fix alignment problem in BOOTP (dhcp_leasetime option) [pointed out by Nicolas Lacressonni�re, 2 Jun 2003] * Patch by Mark Rakes, 14 May 2003: add support for Intel e1000 gig cards. * Patch by Nye Liu, 3 Jun 2003: fix critical typo in MAMR definition (include/mpc8xx.h) * Fix requirement to align U-Boot image on 16 kB boundaries on PPC. * Patch by Klaus Heydeck, 2 Jun 2003 Minor changes for KUP4K configuration
* Patch by Marc Singer, 29 May 2003:
2026-06-05 19:26:40 +03:00 · 2003-06-03 23:54:09 +00:00 · 2003-05-31 18:35:21 +00:00 · 2003-05-30 12:48:29 +00:00 · 2003-05-28 08:06:31 +00:00 · 2003-05-23 23:18:21 +00:00
470 changed files with 45181 additions and 14240 deletions
--- a/266
+++ b/266
@@ -1,7 +1,271 @@
 ======================================================================
-Changes since U-Boot 0.2.2:
+Changes since U-Boot 0.3.1:
 ======================================================================

+* Patches by Udi Finkelstein, 2 June 2003:
+  - Added support for custom keyboards, initialized by defining a
+    board-specific drv_keyboard_init as well as defining CONFIG_KEYBOARD .
+  - Added support for the RBC823 board.
+  - cpu/mpc8xx/lcd.c now automatically calculates the
+    Horizontal Pixel Count field.
+
+* Fix alignment problem in BOOTP (dhcp_leasetime option)
+  [pointed out by Nicolas Lacressonnière, 2 Jun 2003]
+
+* Patch by Mark Rakes, 14 May 2003:
+  add support for Intel e1000 gig cards.
+
+* Patch by Nye Liu, 3 Jun 2003:
+  fix critical typo in MAMR definition (include/mpc8xx.h)
+
+* Fix requirement to align U-Boot image on 16 kB boundaries on PPC.
+
+* Patch by Klaus Heydeck, 2 Jun 2003
+  Minor changes for KUP4K configuration
+
+* Patch by Marc Singer, 29 May 2003:
+  Fixed rarp boot method for IA32 and other little-endian CPUs.
+
+* Patch by Marc Singer, 28 May 2003:
+  Added port I/O commands.
+
+* Patch by Matthew McClintock, 28 May 2003
+  - cpu/mpc824x/start.S: fix relocation code when booting from RAM
+  - minor patches for utx8245
+
+* Patch by Daniel Engström, 28 May 2003:
+  x86 update
+
+* Patch by Dave Ellis, 9 May 2003 + 27 May 2003:
+  add nand flash support to SXNI855T configuration
+  fix/extend nand flash support:
+  - fix 'nand erase' command so does not erase bad blocks
+  - fix 'nand write' command so does not write to bad blocks
+  - fix nand_probe() so handles no flash detected properly
+  - add doc/README.nand
+  - add .jffs2 and .oob options to nand read/write
+  - add 'nand bad' command to list bad blocks
+  - add 'clean' option to 'nand erase' to write JFFS2 clean markers
+  - make NAND read/write faster
+
+* Patch by Rune Torgersen, 23 May 2003:
+  Update for MPC8266ADS board
+
+* Get (mostly) rid of CFG_MONITOR_LEN definition; compute real length
+  instead CFG_MONITOR_LEN is now only used to determine  _at_compile_
+  _time_  (!) if the environment is embedded within the U-Boot image,
+  or in a separate flash sector.
+
+* Cleanup CFG_DER #defines in config files (wd maintained only)
+
+* Fix data abort exception handling for arm920t CPU
+
+* Fix alignment problems with flash driver for TRAB board
+
+* Patch by Donald White, 21 May 2003:
+  fix calculation of base address in pci_hose_config_device()
+
+* Fix bug in command line parsing: "cmd1;cmd2" is supposed to always
+  execute "cmd2", even if "cmd1" fails. Note that this is different
+  to "run var1 var2" where the contents of "var2" will NOT be
+  executed when a command in "var1" fails.
+
+* Add zero-copy ramdisk support (requires corresponding kernel support!)
+
+* Patch by Kyle Harris, 20 May 2003:
+  In preparation for an ixp port, rename cpu/xscale and arch-xscale
+  into cpu/pxa and arch-pxa.
+
+* Patch by Stefan Roese, 23 May 2003:
+  - IBM PPC405EP port added.
+  - CONFIG_UART1_CONSOLE added. If defined internal UART1 (and not
+    UART0) is used as default U-Boot console. PPC4xx only!
+  - esd ASH405 board added (PPC405EP based).
+  - BUBINGA405EP board added (PPC405EP based - IBM Eval Board).
+  - esd CPCI405AB board added.
+  - esd PMC405 board added.
+  - Update of some esd boards.
+
+* Patch by Denis Peter, 19 Mai 2003:
+  add support for the MIP405-3 board
+
+* Patch by Dave Ellis, 22 May 2003:
+  Fix problem with only partially cleared .bss segment
+
+* Patch by Rune Torgersen, 12 May 2003:
+  get PCI to work on a MPC8266ADS board; incorporate change to
+  cpu/mpc8260/pci.c to enable overrides of PCI memory parameters
+
+* Patch by Nye Liu, 1 May 2003:
+  minor patches for the FADS8xx
+
+* Patch by Thomas Schäfer, 28 Apr 2003:
+  Fix SPD handling for 256 ECC DIMM on Walnut
+
+* Add support for arbitrary bitmaps for TRAB's  VFD command;
+  allow to pass boot bitmap addresses in environment variables;
+  allow for zero boot delay
+
+* Patch by Christian Geißinger, 19 May 2002:
+  On TRAB: wait until the dummy byte has been completely sent
+
+* Patch by David Updegraff, 22 Apr 2003:
+  update for CrayL1 board
+
+* Patch by Pantelis Antoniou, 21 Apr 2003:
+  add boot support for ARTOS (a proprietary OS)
+
+* Patch by Steven Scholz, 11 Apr 2003:
+  Add support for RTC DS1338
+
+* Patch by Rod Boyce, 24 Jan 2003:
+  Fix counting of extended partitions in diskboot command
+
+* Patch by Christophe Lindheimer, 20 May 2003:
+  allow the use of CFG_LOADS when CFG_NO_FLASH is set
+
+* Fix SDRAM timing on Purple board
+
+* Add support for CompactFlash on ATC board
+  (includes support for Intel 82365 and compatible PC Card controllers,
+  and Yenta-compatible PCI-to-CardBus controllers)
+
+* Patch by Mathijs Haarman, 08 May 2003:
+  Add lan91c96 driver (tested on Lubbock and custom PXA250 board only)
+
+* Fix problem with usage of "true" (undefined in current versions of bfd.h)
+
+* Add support for Promess ATC board
+
+* Patch by Keith Outwater, 28 Apr 2003:
+  - Miscellaneous corrections and additions to GEN860T board specific code.
+  - Added GEN860_SC variant to GEN860T.
+  - Miscellaneous corrections to GEN860T documentation.
+  - Correct duplicate entry in U-Boot CREDITS file.
+  - Add GEN860T_SC entry in MAINTAINERS file.
+  - Update CREDITS file with GEN860T_SC info.
+
+* Update Smiths Aerospace addresses in MAINTAINERS file
+
+* Fix error handling in hush's version of "run" command
+
+* LWMON extensions:
+  - Splashscreen support
+  - modem support
+  - sysmon support
+  - temperature dependend enabling of LCD
+
+* Allow booting from old "PPCBoot" disk partitions
+
+* Add support for TQM8255 Board / MPC8255 CPU
+
+======================================================================
+Changes for U-Boot 0.3.1:
+======================================================================
+
+* Make sure Block Lock Bits get cleared in R360MPI flash driver
+
+* MPC823 LCD driver: Fill color map backwards, to allow for steady
+  display when Linux takes over
+
+* Patch by Erwin Rol, 27 Feb 2003:
+  Add support for RTEMS (this time for real).
+
+* Add support for "bmp info" and "bmp display" commands to load
+  bitmap images; this can be used (for example in a "preboot"
+  command) to display a splash screen very quickly after poweron.
+
+* Add support for 133 MHz clock on INCA-IP board
+
+* Patch by Lutz Dennig, 10 Apr 2003:
+  Update for R360MPI board
+
+* Add new meaning to "autostart" environment variable:
+  If set to "no", a standalone image passed to the
+  "bootm" command will be copied to the load address
+  (and eventually uncompressed), but NOT be started.
+  This can be used to load and uncompress arbitrary
+  data.
+
+* Patch by Stefan Roese, 10 Apr 2003:
+  Changed DHCP client to use IP address from server option field #54
+  from the OFFER packet in the server option field #54 in the REQUEST
+  packet. This fixes a problem using a Windows 2000 DHCP server,
+  where the DHCP-server is not the TFTP-server.
+
+* Set max brightness for MN11236 displays on TRAB board
+
+* Add support for TQM862L modules
+
+======================================================================
+Changes for U-Boot 0.3.0:
+======================================================================
+
+* Patch by Arun Dharankar, 4 Apr 2003:
+  Add IDMA example code (tested on 8260 only)
+
+* Add support for Purple Board (MIPS64 5Kc)
+
+* Add support for MIPS64 5Kc CPUs
+
+* Fix missing setting of "loadaddr" and "bootfile" on ARM and MIPS
+
+* Patch by Denis Peter, 04 Apr 2003:
+  - update MIP405-4 board
+
+* Patch by Stefan Roese, 4 Apr 2003:
+  - U-Boot version environment variable "ver" added
+    (CONFIG_VERSION_VARIABLE).
+  - Changed PPC405GPr version from A to B.
+  - Changed CPCI405 to use CTS instead of DSR on PPC405 UART1.
+
+* Patches by Denis Peter, 03 April 2003:
+  - fix PCI IRQs on MPL boards
+  - fix two more un-relocated pointer problems
+
+* Fix behaviour of "run" command:
+  - print error message iv variable does not exist
+  - terminate processing of arguments in case of error
+
+* Patches by Peter Figuli, 10 Mar 2003
+  - Add support for BTUART on PXA platform
+  - Add support for WEP EP250 (PXA) board
+
+* Fix flash problems on INCA-IP; add tool to allow bruning images  to
+  flash using a BDI2000
+
+* Implement fix for I2C Edge Conditions problem for all boards that
+  use the bit-banging driver (common/soft_i2c.c)
+
+* Patch by Martin Winistoerfer, 23 Mar 2003
+  - Add port to MPC555/556 microcontrollers
+  - Add support for cmi customer board with
+    Intel 28F128J3A, 28F320J3A or 28F640J3A flash.
+
+* Patch by Rick Bronson, 28 Mar 2003:
+  - fix common/cmd_nand.c
+
+* Patch by Arun Dharankar, 24 Mar 2003:
+  - add threads / scheduler example code
+
+* Add patches by Robert Schwebel, 31 Mar 2003:
+  - add ctrl-c support for kermit download
+  - align bdinfo output on ARM
+  - csb226 board: bring in sync with innokom/memsetup.S
+  - csb226 board: fix MDREFR handling
+  - misc doc fixes / extensions
+  - innokom board: cleanup, MDREFR fix in memsetup.S, config update
+  - add BOOT_PROGRESS to armlinux.c
+
+* Add CPU ID, version, and clock speed for INCA-IP
+
+* Patches by Dave Ellis, 18 Mar 2003 for SXNI855T board:
+  - fix SRAM and SDRAM memory sizing
+  - add status LED support
+  - add MAC address for second (SCC1) ethernet port
+
+* Update default environment for TQM8260 board
+
 * Patch by Rick Bronson, 16 Mar 2003:
  - Add NAND flash support for reading, writing, and erasing NAND
    flash (certain forms of which are called SmartMedia).
--- a/26
+++ b/26
@@ -26,6 +26,10 @@ N: Guillaume Alexandre
 E: guillaume.alexandre@gespac.ch
 D: Add PCIPPC6 configuration

+N: Pantelis Antoniou
+E: panto@intracom.gr
+D: NETVIA board support, ARTOS support.
+
 N: Pierre Aubert
 E: <p.aubert@staubli.com>
 D: Support for RPXClassic board
@@ -70,6 +74,10 @@ N: Magnus Damm
 E: eramdam@kieray1.p.y.ki.era.ericsson.se
 D: 8xxrom

+N: Arun Dharankar
+E: ADharankar@ATTBI.Com
+D: threads / scheduler example code
+
 N: Kári Davíðsson
 E: kd@flaga.is
 D: FLAGA DM Support
@@ -100,6 +108,10 @@ E: wg@denx.de
 D: Support for Interphase 4539 T1/E1/J1 PMC, PN62, CCM, SCM boards
 W: www.denx.de

+N: Peter Figuli
+E: peposh@etc.sk
+D: Support for WEP EP250 (PXA) board
+
 N: Thomas Frieden
 E: ThomasF@hyperion-entertainment.com
 D: Support for AmigaOne
@@ -204,13 +216,9 @@ E: rof@sysgo.de
 D: Initial support for SSV-DNP1110, SMC91111 driver
 W: www.elinos.com

-N: Keith Outwater
-E: Keith_Outwater@mvis.com
-D: Support for GEN860T board
-
 N: Keith Outwater
 E: keith_outwater@mvis.com
-D: Support for generic/custom MPC860T board (GEN860T)
+D: Support for generic/custom MPC860T boards (GEN860T, GEN860T_SC)

 N: Frank Panno
 E: fpanno@delphintech.com
@@ -230,6 +238,10 @@ N: Stefan Roese
 E: stefan.roese@esd-electronics.com
 D: IBM PPC401/403/405GP Support; Windows environment support

+N: Erwin Rol
+E: erwin@muffin.org
+D: boot support for RTEMS
+
 N: Neil Russell
 E: caret@c-side.com
 D: Author of LiMon-1.4.2, which contributed some ideas
@@ -262,6 +274,10 @@ N: David Updegraff
 E: dave@cray.com
 D: Port to Cray L1 board; DHCP vendor extensions

+N: Martin Winistoerfer
+E: martinwinistoerfer@gmx.ch
+D: Port to MPC555/556 microcontrollers and support for cmi board
+
 N: Christian Vejlbo
 E: christian.vejlbo@tellabs.com
 D: FADS860T ethernet support
--- a/20
+++ b/20
@@ -28,7 +28,7 @@ Pantelis Antoniou <panto@intracom.gr>

 	NETVIA			MPC8xx

-Jerry Van Baren <vanbaren_gerald@si.com>
+Jerry Van Baren <gerald.vanbaren@smiths-aerospace.com>

 	sacsng			MPC8260

@@ -80,6 +80,11 @@ Wolfgang Denk <wd@denx.de>
 	CU824			MPC8240
 	Sandpoint8240		MPC8240

+	ATC			MPC8250
+	PM825			MPC8250
+
+	TQM8255			MPC8255
+
 	CPU86			MPC8260
 	PM826			MPC8260
 	TQM8260			MPC8260
@@ -87,7 +92,7 @@ Wolfgang Denk <wd@denx.de>
 	PCIPPC2			MPC750
 	PCIPPC6			MPC750

-Jon Diekema <diekema_jon@si.com>
+Jon Diekema <jon.diekema@smiths-aerospace.com>

 	sbc8260			MPC8260

@@ -160,6 +165,7 @@ Scott McNutt <smcnutt@artesyncp.com>
 Keith Outwater <Keith_Outwater@mvis.com>

 	GEN860T			MPC860T
+	GEN860T_SC		MPC860T

 Frank Panno <fpanno@delphintech.com>

@@ -174,14 +180,19 @@ Stefan Roese <stefan.roese@esd-electronics.com>

 	ADCIOP			IOP480 (PPC401)
 	AR405			PPC405GP
+	ASH405			PPC405EP
 	CANBT			PPC405CR
 	CPCI405			PPC405GP
+	CPCI4052		PPC405GP
+	CPCI405AB		PPC405GP
 	CPCI440			PPC440GP
 	CPCIISER4		PPC405GP
 	DASA_SIM		IOP480 (PPC401)
 	DU405			PPC405GP
 	OCRTC			PPC405GP
 	ORSG			PPC405GP
+	PCI405			PPC405GP
+	PMC405			PPC405GP

 Peter De Schrijver <p2@mind.be>

@@ -241,6 +252,10 @@ Unknown / orphaned boards:
 #	Board			CPU					#
 #########################################################################

+Peter Figuli <peposh@etc.sk>
+
+	wepep250		xscale
+
 Marius Gröger <mag@sysgo.de>

 	impa7			ARM720T (EP7211)
@@ -296,6 +311,7 @@ Daniel Engstr
 Wolfgang Denk <wd@denx.de>

 	incaip			MIPS32 4Kc
+	purple			MIPS64 5Kc

 #########################################################################
 # End of MAINTAINERS list						#
--- a/83
+++ b/83
@@ -10,6 +10,14 @@ fi

 LIST=""

+#########################################################################
+## MPC5xx Systems
+#########################################################################
+
+LIST_5xx="	\
+	cmi_mpc5xx							\
+"
+
 #########################################################################
 ## MPC8xx Systems
 #########################################################################
@@ -18,17 +26,17 @@ LIST_8xx="	\
 	ADS860		AMX860		c2mon		CCM		\
 	cogent_mpc8xx	ESTEEM192E	ETX094		ELPT860		\
 	FADS823		FADS850SAR	FADS860T	FLAGADM		\
-	FPS850L		GEN860T		GENIETV		GTH		\
-	hermes		IAD210		ICU862_100MHz	IP860		\
-	IVML24		IVML24_128	IVML24_256	IVMS8		\
-	IVMS8_128	IVMS8_256	KUP4K           LANTEC	        \
-	lwmon   	MBX		MBX860T		MHPC		\
-	MVS1		NETVIA		NX823		pcu_e		\
-	R360MPI		RPXClassic	RPXlite		RRvision	\
-	SM850		SPD823TS	svm_sc8xx	SXNI855T	\
-	TOP860		TQM823L		TQM823L_LCD	TQM850L		\
-	TQM855L		TQM860L		TQM860L_FEC	TTTech		\
-	v37								\
+	FPS850L		GEN860T		GEN860T_SC	GENIETV		\
+	GTH		hermes		IAD210		ICU862_100MHz	\
+	IP860		IVML24		IVML24_128	IVML24_256	\
+	IVMS8		IVMS8_128	IVMS8_256	KUP4K           \
+	LANTEC	        lwmon   	MBX		MBX860T		\
+	MHPC		MVS1		NETVIA		NX823		\
+	pcu_e		R360MPI		RBC823		RPXClassic	\
+	RPXlite		RRvision	SM850		SPD823TS	\
+	svm_sc8xx	SXNI855T	TOP860		TQM823L		\
+	TQM823L_LCD	TQM850L		TQM855L		TQM860L		\
+	TTTech		v37						\
 "

 #########################################################################
@@ -36,12 +44,13 @@ LIST_8xx="	\
 #########################################################################

 LIST_4xx="	\
-	ADCIOP		AR405		CANBT		CPCI405		\
-	CPCI4052 	CPCI440         CPCIISER4	CRAYL1  	\
-	DASA_SIM	DU405    	EBONY           ERIC  		\
-	MIP405  	ML2		OCRTC		ORSG		\
-	PCI405          PIP405		W7OLMC		W7OLMG          \
-	WALNUT405							\
+	ADCIOP		AR405		ASH405          BUBINGA405EP    \
+        CANBT		CPCI405		CPCI4052 	CPCI405AB       \
+        CPCI440         CPCIISER4	CRAYL1  	DASA_SIM	\
+        DU405    	EBONY           ERIC  		MIP405  	\
+        ML2		OCRTC		ORSG		PCI405          \
+        PIP405		PMC405          W7OLMC		W7OLMG          \
+        WALNUT405	\
 "

 #########################################################################
@@ -55,14 +64,15 @@ LIST_824x="	\
 "

 #########################################################################
-## MPC8260 Systems
+## MPC8260 Systems (includes 8250, 8255 etc.)
 #########################################################################

 LIST_8260="	\
-	cogent_mpc8260	CPU86		ep8260		gw8260		\
-	hymod		IPHASE4539	MPC8260ADS	MPC8266ADS	\
-	PM826		ppmc8260	RPXsuper	rsdproto	\
-	sacsng		sbc8260		SCM		TQM8260		\
+	atc		cogent_mpc8260	CPU86		ep8260		\
+	gw8260		hymod		IPHASE4539	MPC8260ADS	\
+	MPC8266ADS	PM826		ppmc8260	RPXsuper	\
+	rsdproto	sacsng		sbc8260		SCM		\
+	TQM8260								\
 "

 #########################################################################
@@ -77,14 +87,16 @@ LIST_7xx="	\
 	BAB7xx		ELPPC						\
 "

-LIST_ppc="${LIST_8xx} ${LIST_824x} ${LIST_8260} \
-	  ${LIST_4xx} ${LIST_74xx} ${LIST_7xx}"
+LIST_ppc="${LIST_5xx}  ${LIST_8xx}  \
+	  ${LIST_824x} ${LIST_8260} \
+	  ${LIST_4xx}		    \
+	  ${LIST_74xx} ${LIST_7xx}"

 #########################################################################
 ## StrongARM Systems
 #########################################################################

-LIST_SA="at91rm9200dk dnp1110 lart shannon"
+LIST_SA="dnp1110 lart shannon"

 #########################################################################
 ## ARM7 Systems
@@ -96,16 +108,16 @@ LIST_ARM7="ep7312 impa7"
 ## ARM9 Systems
 #########################################################################

-LIST_ARM9="smdk2400 smdk2410 trab VCMA9"
+LIST_ARM9="at91rm9200dk smdk2400 smdk2410 trab VCMA9"

 #########################################################################
 ## Xscale Systems
 #########################################################################

-LIST_xscale="cradle csb226 innokom lubbock"
+LIST_pxa="cradle csb226 innokom lubbock wepep250"


-LIST_arm="${LIST_SA} ${LIST_ARM7} ${LIST_ARM9} ${LIST_xscale}"
+LIST_arm="${LIST_SA} ${LIST_ARM7} ${LIST_ARM9} ${LIST_pxa}"

 #########################################################################
 ## MIPS 4Kc Systems
@@ -113,8 +125,19 @@ LIST_arm="${LIST_SA} ${LIST_ARM7} ${LIST_ARM9} ${LIST_xscale}"

 LIST_mips4kc="incaip"

-LIST_mips="${LIST_mips4kc}"
+LIST_mips5kc="purple"

+LIST_mips="${LIST_mips4kc} ${LIST_mips5kc}"
+
+#########################################################################
+## i386 Systems
+#########################################################################
+
+LIST_I486="sc520_cdp sc520_spunk sc520_spunk_rel"
+
+LIST_x86="${LIST_I486}"
+
+#-----------------------------------------------------------------------

 #----- for now, just run PPC by default -----
 [ $# = 0 ] && set $LIST_ppc
@@ -136,7 +159,7 @@ build_target() {
 for arg in $@
 do
 	case "$arg" in
-	8xx|824x|8260|4xx|7xx|74xx|SA|ARM7|ARM9|ppc|arm|xscale|mips)
+	5xx|8xx|824x|8260|4xx|7xx|74xx|SA|ARM7|ARM9|ppc|arm|pxa|mips|I486|x86)
 			for target in `eval echo '$LIST_'${arg}`
 			do
 				build_target ${target}
--- a/97
+++ b/97
@@ -60,7 +60,11 @@ ifeq ($(ARCH),arm)
 CROSS_COMPILE = arm-linux-
 endif
 ifeq ($(ARCH),i386)
-#CROSS_COMPILE = i386-elf-
+ifeq ($(HOSTARCH),i386)
+CROSS_COMPILE =
+else
+CROSS_COMPILE = i386-linux-
+endif
 endif
 ifeq ($(ARCH),mips)
 CROSS_COMPILE = mips_4KC-
@@ -168,6 +172,14 @@ unconfig:
 #========================================================================
 # PowerPC
 #========================================================================
+
+#########################################################################
+## MPC5xx Systems
+#########################################################################
+
+cmi_mpc5xx_config:	unconfig
+	@./mkconfig $(@:_config=) ppc mpc5xx cmi
+
 #########################################################################
 ## MPC8xx Systems
 #########################################################################
@@ -204,8 +216,16 @@ FADS860T_config:	unconfig
 FLAGADM_config:	unconfig
 	@./mkconfig $(@:_config=) ppc mpc8xx flagadm

+xtract_GEN860T = $(subst _SC,,$(subst _config,,$1))
+
+GEN860T_SC_config	\
 GEN860T_config: unconfig
-	@./mkconfig $(@:_config=) ppc mpc8xx gen860t
+	@ >include/config.h
+	@[ -z "$(findstring _SC,$@)" ] || \
+		{ echo "#define CONFIG_SC" >>include/config.h ; \
+		  echo "With reduced H/W feature set (SC)..." ; \
+		}
+	@./mkconfig -a $(call xtract_GEN860T,$@) ppc mpc8xx gen860t

 GENIETV_config:	unconfig
 	@./mkconfig $(@:_config=) ppc mpc8xx genietv
@@ -294,6 +314,9 @@ pcu_e_config:		unconfig
 R360MPI_config:	unconfig
 	@./mkconfig $(@:_config=) ppc mpc8xx r360mpi

+RBC823_config:	unconfig
+	@./mkconfig $(@:_config=) ppc mpc8xx rbc823
+
 RPXClassic_config:	unconfig
 	@./mkconfig $(@:_config=) ppc mpc8xx RPXClassic

@@ -329,7 +352,7 @@ TOP860_config:		unconfig
 # All boards can come with 50 MHz (default), 66MHz or 80MHz clock,
 # but only 855 and 860 boards may come with FEC
 # and 823 boards may have LCD support
-xtract_8xx = $(subst _66MHz,,$(subst _80MHz,,$(subst _LCD,,$(subst _FEC,,$(subst _config,,$1)))))
+xtract_8xx = $(subst _66MHz,,$(subst _80MHz,,$(subst _LCD,,$(subst _config,,$1))))

 FPS850L_config		\
 FPS860L_config		\
@@ -345,20 +368,13 @@ TQM850L_80MHz_config	\
 TQM855L_config		\
 TQM855L_66MHz_config	\
 TQM855L_80MHz_config	\
-TQM855L_FEC_config	\
-TQM855L_FEC_66MHz_config \
-TQM855L_FEC_80MHz_config \
 TQM860L_config		\
 TQM860L_66MHz_config	\
 TQM860L_80MHz_config	\
-TQM860L_FEC_config	\
-TQM860L_FEC_66MHz_config	\
-TQM860L_FEC_80MHz_config:	unconfig
+TQM862L_config		\
+TQM862L_66MHz_config	\
+TQM862L_80MHz_config:	unconfig
 	@ >include/config.h
-	@[ -z "$(findstring _FEC,$@)" ] || \
-		{ echo "#define CONFIG_FEC_ENET"	>>include/config.h ; \
-		  echo "... with FEC support" ; \
-		}
 	@[ -z "$(findstring _66MHz,$@)" ] || \
 		{ echo "#define CONFIG_66MHz"		>>include/config.h ; \
 		  echo "... with 66MHz system clock" ; \
@@ -394,11 +410,18 @@ ADCIOP_config:	unconfig
 AR405_config:	unconfig
 	@./mkconfig $(@:_config=) ppc ppc4xx ar405 esd

+ASH405_config:	unconfig
+	@./mkconfig $(@:_config=) ppc ppc4xx ash405 esd
+
+BUBINGA405EP_config:unconfig
+	@./mkconfig $(@:_config=) ppc ppc4xx bubinga405ep
+
 CANBT_config:	unconfig
 	@./mkconfig $(@:_config=) ppc ppc4xx canbt esd

-CPCI405_config		\
-CPCI4052_config:	unconfig
+CPCI405_config	\
+CPCI4052_config	\
+CPCI405AB_config:	unconfig
 	@./mkconfig $(@:_config=) ppc ppc4xx cpci405 esd
 	@echo "BOARD_REVISION = $(@:_config=)"	>>include/config.mk

@@ -439,6 +462,9 @@ PCI405_config:	unconfig
 PIP405_config:unconfig
 	@./mkconfig $(@:_config=) ppc ppc4xx pip405 mpl

+PMC405_config:	unconfig
+	@./mkconfig $(@:_config=) ppc ppc4xx pmc405 esd
+
 W7OLMC_config	\
 W7OLMG_config: unconfig
 	@./mkconfig $(@:_config=) ppc ppc4xx w7o
@@ -574,10 +600,13 @@ sbc8260_config:	unconfig
 SCM_config:		unconfig
 	@./mkconfig $(@:_config=) ppc mpc8260 SCM siemens

+TQM8255_config	\
 TQM8260_config	\
 TQM8260_L2_config	\
+TQM8255_266MHz_config	\
 TQM8260_266MHz_config	\
 TQM8260_L2_266MHz_config \
+TQM8255_300MHz_config	\
 TQM8260_300MHz_config:	unconfig
 	@ >include/config.h
 	@if [ "$(findstring _L2_,$@)" ] ; then \
@@ -595,7 +624,12 @@ TQM8260_300MHz_config:	unconfig
 		{ echo "#define CONFIG_300MHz"	>>include/config.h ; \
 		  echo "... with 300MHz system clock" ; \
 		}
-	@./mkconfig -a $(call xtract_82xx,$@) ppc mpc8260 tqm8260
+	@[ -z "$(findstring TQM8255_,$@)" ] || \
+		{ echo "#define CONFIG_MPC8255"	>>include/config.h ; }
+	@./mkconfig -a TQM8260 ppc mpc8260 tqm8260
+
+atc_config:	unconfig
+	@./mkconfig $(@:_config=) ppc mpc8260 atc

 #########################################################################
 ## 74xx/7xx Systems
@@ -679,16 +713,19 @@ ep7312_config	:	unconfig
 #########################################################################

 cradle_config	:	unconfig
-	@./mkconfig $(@:_config=) arm xscale cradle
+	@./mkconfig $(@:_config=) arm pxa cradle 

 csb226_config	:	unconfig
-	@./mkconfig $(@:_config=) arm xscale csb226
+	@./mkconfig $(@:_config=) arm pxa csb226

 innokom_config	:	unconfig
-	@./mkconfig $(@:_config=) arm xscale innokom
+	@./mkconfig $(@:_config=) arm pxa innokom

 lubbock_config	:	unconfig
-	@./mkconfig $(@:_config=) arm xscale lubbock
+	@./mkconfig $(@:_config=) arm pxa lubbock
+
+wepep250_config	:	unconfig
+	@./mkconfig $(@:_config=) arm pxa wepep250

 #========================================================================
 # i386
@@ -699,6 +736,12 @@ lubbock_config	:	unconfig
 sc520_cdp_config	:	unconfig
 	@./mkconfig $(@:_config=) i386 i386 sc520_cdp

+sc520_spunk_config	:	unconfig
+	@./mkconfig $(@:_config=) i386 i386 sc520_spunk
+
+sc520_spunk_rel_config	:	unconfig
+	@./mkconfig $(@:_config=) i386 i386 sc520_spunk
+
 #========================================================================
 # MIPS
 #========================================================================
@@ -709,18 +752,26 @@ sc520_cdp_config	:	unconfig
 incaip_config :		unconfig
 	@./mkconfig $(@:_config=) mips mips incaip

+purple_config :		unconfig
+	@./mkconfig $(@:_config=) mips mips purple

+#########################################################################
+#########################################################################

 clean:
 	find . -type f \
 		\( -name 'core' -o -name '*.bak' -o -name '*~' \
 		-o -name '*.o'  -o -name '*.a'  \) -print \
 		| xargs rm -f
-	rm -f examples/hello_world examples/timer examples/eepro100_eeprom
+	rm -f examples/hello_world examples/timer \
+	      examples/eepro100_eeprom examples/sched \
+	      examples/mem_to_mem_idma2intr examples/82559_eeprom
+
 	rm -f tools/img2srec tools/mkimage tools/envcrc tools/gen_eth_addr
 	rm -f tools/easylogo/easylogo tools/bmp_logo
 	rm -f tools/gdb/astest tools/gdb/gdbcont tools/gdb/gdbsend
 	rm -f tools/env/fw_printenv tools/env/fw_setenv
+	rm -f board/cray/L1/bootscript.c board/cray/L1/bootscript.image

 clobber:	clean
 	find . -type f \
@@ -729,9 +780,9 @@ clobber:	clean
 		| xargs rm -f
 	rm -f $(OBJS) *.bak tags TAGS
 	rm -fr *.*~
-	rm -f u-boot u-boot.bin u-boot.elf u-boot.srec u-boot.map System.map
+	rm -f u-boot u-boot.bin u-boot.srec u-boot.map System.map
 	rm -f tools/crc32.c tools/environment.c tools/env/crc32.c
-	rm -f cpu/mpc824x/bedbug_603e.c
+	rm -f tools/inca-swap-bytes cpu/mpc824x/bedbug_603e.c
 	rm -f include/asm/arch include/asm

 mrproper \
--- a/215
+++ b/215
@@ -140,6 +140,7 @@ Directory Hierarchy:
 - tools		Tools to build S-Record or U-Boot images, etc.

 - cpu/74xx_7xx	Files specific to Motorola MPC74xx and 7xx CPUs
+- cpu/mpc5xx	Files specific to Motorola MPC5xx  CPUs
 - cpu/mpc8xx	Files specific to Motorola MPC8xx  CPUs
 - cpu/mpc824x	Files specific to Motorola MPC824x CPUs
 - cpu/mpc8260	Files specific to Motorola MPC8260 CPU
@@ -151,6 +152,7 @@ Directory Hierarchy:
 		Files specific to RPXClassic boards
 - board/RPXlite	Files specific to RPXlite    boards
 - board/c2mon	Files specific to c2mon	     boards
+- board/cmi	Files specific to cmi        boards
 - board/cogent	Files specific to Cogent     boards
 		(need further configuration)
 		Files specific to CPCIISER4  boards
@@ -178,7 +180,7 @@ Directory Hierarchy:
 		Files specific to EVB64260   boards
 - board/fads	Files specific to FADS	     boards
 - board/flagadm Files specific to FLAGADM    boards
- board/gen860t Files specific to GEN860T    boards
+- board/gen860t Files specific to GEN860T and GEN860T_SC    boards
 - board/genietv Files specific to GENIETV    boards
 - board/gth	Files specific to GTH	     boards
 - board/hermes	Files specific to HERMES     boards
@@ -292,6 +294,7 @@ The following options need to be configured:
 		PowerPC based CPUs:
 		-------------------
 		CONFIG_MPC823,	CONFIG_MPC850,	CONFIG_MPC855,	CONFIG_MPC860
+	or	CONFIG_MPC5xx
 	or	CONFIG_MPC824X, CONFIG_MPC8260
 	or	CONFIG_IOP480
 	or	CONFIG_405GP
@@ -340,7 +343,8 @@ The following options need to be configured:
 		CONFIG_GTH,        CONFIG_RPXClassic, CONFIG_rsdproto,
 		CONFIG_IAD210,     CONFIG_RPXlite,    CONFIG_sbc8260,
 		CONFIG_EBONY,      CONFIG_sacsng,     CONFIG_FPS860L,
-		CONFIG_V37,        CONFIG_ELPT860
+		CONFIG_V37,        CONFIG_ELPT860,    CONFIG_CMI,
+		CONFIG_NETVIA,     CONFIG_RBC823

 		ARM based boards:
 		-----------------
@@ -466,6 +470,13 @@ The following options need to be configured:
 		Set to 0 to disable this feature (this is the default).
 		This will also disable hardware handshake.

+- Console UART Number:
+		CONFIG_UART1_CONSOLE
+
+		IBM PPC4xx only.
+		If defined internal UART1 (and not UART0) is used
+		as default U-Boot console.
+
 - Boot Delay:	CONFIG_BOOTDELAY - in seconds
 		Delay before automatically booting the default image;
 		set to -1 to disable autoboot.
@@ -617,6 +628,13 @@ The following options need to be configured:
 		SIU Watchdog feature is enabled in the SYPCR
 		register.

+- U-Boot Version:
+		CONFIG_VERSION_VARIABLE
+		If this variable is defined, an environment variable
+		named "ver" is created by U-Boot showing the U-Boot
+		version as printed by the "version" command.
+		This variable is readonly.
+
 - Real-Time Clock:

 		When CFG_CMD_DATE is selected, the type of the RTC
@@ -628,6 +646,7 @@ The following options need to be configured:
 		CONFIG_RTC_MC146818	- use MC146818 RTC
 		CONFIG_RTC_DS1307	- use Maxim, Inc. DS1307 RTC
 		CONFIG_RTC_DS1337	- use Maxim, Inc. DS1337 RTC
+		CONFIG_RTC_DS1338	- use Maxim, Inc. DS1338 RTC
 		CONFIG_RTC_DS164x	- use Dallas DS164x RTC

 - Timestamp Support:
@@ -669,6 +688,9 @@ The following options need to be configured:
 		CFG_SCSI_SYM53C8XX_CCF to fix clock timing (80Mhz)

 - NETWORK Support (PCI):
+		CONFIG_E1000
+		Support for Intel 8254x gigabit chips.
+		
 		CONFIG_EEPRO100
 		Support for Intel 82557/82559/82559ER chips.
 		Optional CONFIG_EEPRO100_SROM_WRITE enables eeprom
@@ -685,6 +707,18 @@ The following options need to be configured:
 		CONFIG_NS8382X
 		Support for National dp8382[01] gigabit chips.

+- NETWORK Support (other):
+
+		CONFIG_DRIVER_LAN91C96
+		Support for SMSC's LAN91C96 chips.
+
+			CONFIG_LAN91C96_BASE
+			Define this to hold the physical address
+			of the LAN91C96's I/O space
+
+			CONFIG_LAN91C96_USE_32_BIT
+			Define this to enable 32 bit addressing
+
 - USB Support:
 		At the moment only the UHCI host controller is
 		supported (PIP405, MIP405); define
@@ -730,11 +764,18 @@ The following options need to be configured:
 	16,7 Mill (24bit)     315       318       31b
 		(i.e. setenv videomode 317; saveenv; reset;)

-		CONFIG_VIDEO_SED13806 
+		CONFIG_VIDEO_SED13806
 		Enable Epson SED13806 driver. This driver supports 8bpp
 		and 16bpp modes defined by CONFIG_VIDEO_SED13806_8BPP
 		or CONFIG_VIDEO_SED13806_16BPP

+- Keyboard Support:
+                CONFIG_KEYBOARD
+
+                Define this to enable a custom keyboard support.
+                This simply calls drv_keyboard_init() which must be
+                defined in your board-specific files.
+                The only board using this so far is RBC823.

 - LCD Support:	CONFIG_LCD

@@ -779,6 +820,18 @@ The following options need to be configured:
 		Normally display is black on white background; define
 		CFG_WHITE_ON_BLACK to get it inverted.

+- Spash Screen Support: CONFIG_SPLASH_SCREEN
+
+                If this option is set, the environment is checked for
+                a variable "splashimage". If found, the usual display
+                of logo, copyright and system information on the LCD
+                is supressed and the BMP image at the address
+                specified in "splashimage" is loaded instead. The
+                console is redirected to the "nulldev", too. This
+                allows for a "silent" boot where a splash screen is
+                loaded very quickly after power-on.
+
+
 - Ethernet address:
 		CONFIG_ETHADDR
 		CONFIG_ETH2ADDR
@@ -1140,13 +1193,13 @@ The following options need to be configured:

 	Note:

-		In the current implementation, the local variables
-		space and global environment variables space are
-		separated. Local variables are those you define by
-		simply typing like `name=value'. To access a local
-		variable later on, you have write `$name' or
-		`${name}'; variable directly by typing say `$name' at
-		the command prompt.
+                In the current implementation, the local variables
+                space and global environment variables space are
+                separated. Local variables are those you define by
+                simply typing `name=value'. To access a local
+                variable later on, you have write `$name' or
+                `${name}'; to execute the contents of a variable
+                directly type `$name' at the command prompt.

 		Global environment variables are those you use
 		setenv/printenv to work with. To run a command stored
@@ -1245,7 +1298,7 @@ The following options need to be configured:
 Modem Support:
 --------------

-[so far only for SMDK2400 board]
+[so far only for SMDK2400 and TRAB boards]

 - Modem support endable:
 		CONFIG_MODEM_SUPPORT
@@ -1346,7 +1399,10 @@ Configuration Settings:
 		CFG_FLASH_BASE when booting from flash.

 - CFG_MONITOR_LEN:
-		Size of memory reserved for monitor code
+                Size of memory reserved for monitor code, used to
+                determine _at_compile_time_ (!) if the environment is
+                embedded within the U-Boot image, or in a separate
+                flash sector.

 - CFG_MALLOC_LEN:
 		Size of DRAM reserved for malloc() use.
@@ -1452,7 +1508,7 @@ following configurations:

 	   These settings describe a second storage area used to hold
 	   a redundand copy of the environment data, so that there is
-	   a valid backup copy in case there is a power failur during
+	   a valid backup copy in case there is a power failure during
 	   a "saveenv" operation.

 BE CAREFUL! Any changes to the flash layout, and some changes to the
@@ -1532,20 +1588,16 @@ has been relocated to RAM and a RAM copy of the environment has been
 created; also, when using EEPROM you will have to use getenv_r()
 until then to read environment variables.

-The environment is now protected by a CRC32 checksum. Before the
-monitor is relocated into RAM, as a result of a bad CRC you will be
-working with the compiled-in default environment - *silently*!!!
-[This is necessary, because the first environment variable we need is
-the "baudrate" setting for the console - if we have a bad CRC, we
-don't have any device yet where we could complain.]
+The environment is protected by a CRC32 checksum. Before the monitor
+is relocated into RAM, as a result of a bad CRC you will be working
+with the compiled-in default environment - *silently*!!! [This is
+necessary, because the first environment variable we need is the
+"baudrate" setting for the console - if we have a bad CRC, we don't
+have any device yet where we could complain.]

 Note: once the monitor has been relocated, then it will complain if
 the default environment is used; a new CRC is computed as soon as you
-use the "setenv" command to modify / delete / add any environment
-variable [even when you try to delete a non-existing variable!].
-
-Note2: you must edit your u-boot.lds file to reflect this
-configuration.
+use the "saveenv" command to store a valid environment.


 Low Level (hardware related) configuration options:
@@ -1605,16 +1657,16 @@ Low Level (hardware related) configuration options:
 		- MPC824X: data cache
 		- PPC4xx:  data cache

- CFG_INIT_DATA_OFFSET:
+- CFG_GBL_DATA_OFFSET:

 		Offset of the initial data structure in the memory
 		area defined by CFG_INIT_RAM_ADDR. Usually
-		CFG_INIT_DATA_OFFSET is chosen such that the initial
+		CFG_GBL_DATA_OFFSET is chosen such that the initial
 		data is located at the end of the available space
 		(sometimes written as (CFG_INIT_RAM_END -
 		CFG_INIT_DATA_SIZE), and the initial stack is just
 		below that area (growing from (CFG_INIT_RAM_ADDR +
-		CFG_INIT_DATA_OFFSET) downward.
+		CFG_GBL_DATA_OFFSET) downward.

 	Note:
 		On the MPC824X (or other systems that use the data
@@ -1678,6 +1730,16 @@ Low Level (hardware related) configuration options:
 		#define'd default value in commproc.h resp.
 		cpm_8260.h.

+- CFG_PCI_SLV_MEM_LOCAL, CFG_PCI_SLV_MEM_BUS, CFG_PICMR0_MASK_ATTRIB,
+  CFG_PCI_MSTR0_LOCAL, CFG_PCIMSK0_MASK, CFG_PCI_MSTR1_LOCAL,
+  CFG_PCIMSK1_MASK, CFG_PCI_MSTR_MEM_LOCAL, CFG_PCI_MSTR_MEM_BUS,
+  CFG_CPU_PCI_MEM_START, CFG_PCI_MSTR_MEM_SIZE, CFG_POCMR0_MASK_ATTRIB,
+  CFG_PCI_MSTR_MEMIO_LOCAL, CFG_PCI_MSTR_MEMIO_BUS, CPU_PCI_MEMIO_START,
+  CFG_PCI_MSTR_MEMIO_SIZE, CFG_POCMR1_MASK_ATTRIB, CFG_PCI_MSTR_IO_LOCAL,
+  CFG_PCI_MSTR_IO_BUS, CFG_CPU_PCI_IO_START, CFG_PCI_MSTR_IO_SIZE,
+  CFG_POCMR2_MASK_ATTRIB: (MPC826x only)
+		Overrides the default PCI memory map in cpu/mpc8260/pci.c if set.
+
 Building the Software:
 ======================

@@ -1720,7 +1782,7 @@ configurations; the following names are supported:
    FPS850L_config	  Sandpoint8240_config	sbc8260_config
    GENIETV_config	  TQM823L_config	PIP405_config
    GEN860T_config	  EBONY_config		FPS860L_config
-    ELPT860_config
+    ELPT860_config	  cmi_mpc5xx_config	NETVIA_config

 Note: for some board special configuration names may exist; check  if
      additional  information is available from the board vendor; for
@@ -1771,14 +1833,21 @@ to port U-Boot to your hardware platform. To do this, follow these
 steps:

 1.  Add a new configuration option for your board to the toplevel
-    "Makefile", using the existing entries as examples.
+    "Makefile" and to the "MAKEALL" script, using the existing
+    entries as examples. Note that here and at many other places
+    boards and other names are listed alphabetically sorted. Please
+    keep this order.
 2.  Create a new directory to hold your board specific code. Add any
-    files you need.
+    files you need. In your board directory, you will need at least
+    the "Makefile", a "<board>.c", "flash.c" and "u-boot.lds".
+3.  Create a new configuration file "include/configs/<board>.h" for
+    your board
 3.  If you're porting U-Boot to a new CPU, then also create a new
    directory to hold your CPU specific code. Add any files you need.
-4.  Run "make config_name" with your new name.
+4.  Run "make <board>_config" with your new name.
 5.  Type "make", and you should get a working "u-boot.srec" file
    to be installed on your target system.
+6.  Debug and solve any problems that might arise.
    [Of course, this last step is much harder than it sounds.]


@@ -1905,6 +1974,12 @@ Some configuration options can be set using Environment Variables:
 		  be automatically started (by internally calling
 		  "bootm")

+		  If set to "no", a standalone image passed to the
+		  "bootm" command will be copied to the load address
+		  (and eventually uncompressed), but NOT be started.
+		  This can be used to load and uncompress arbitrary
+		  data.
+
  initrd_high	- restrict positioning of initrd images:
 		  If this variable is not set, initrd images will be
 		  copied to the highest possible address in RAM; this
@@ -1926,6 +2001,14 @@ Some configuration options can be set using Environment Variables:

 		  setenv initrd_high 00c00000

+                  If you set initrd_high to 0xFFFFFFFF, this is an
+                  indication to U-Boot that all addresses are legal
+                  for the Linux kernel, including addresses in flash
+                  memory. In this case U-Boot will NOT COPY the
+                  ramdisk at all. This may be useful to reduce the
+                  boot time on your system, but requires that this
+                  feature is supported by your Linux kernel.
+
  ipaddr	- IP address; needed for tftpboot command

  loadaddr	- Default load address for commands like "bootp",
@@ -1967,10 +2050,59 @@ the board). U-Boot refuses to delete or overwrite these variables
 once they have been set once.


+Further special Environment Variables:
+
+  ver		- Contains the U-Boot version string as printed
+		  with the "version" command. This variable is
+		  readonly (see CONFIG_VERSION_VARIABLE).
+
+
 Please note that changes to some configuration parameters may take
 only effect after the next boot (yes, that's just like Windoze :-).


+Command Line Parsing:
+=====================
+
+There are two different command line parsers available  with  U-Boot:
+the old "simple" one, and the much more pwerful "hush" shell:
+
+Old, simple command line parser:
+--------------------------------
+
+- supports environment variables (through setenv / saveenv commands)
+- several commands on one line, separated by ';'
+- variable substitution using "... $(name) ..." syntax
+- special characters ('$', ';') can be escaped by prefixing with '\',
+  for example:
+	setenv bootcmd bootm \$(address)
+- You can also escape text by enclosing in single apostrophes, for example:
+	setenv addip 'setenv bootargs $bootargs ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname::off'
+
+Hush shell:
+-----------
+
+- similar to Bourne shell, with control structures like
+  if...then...else...fi, for...do...done; while...do...done,
+  until...do...done, ...
+- supports environment ("global") variables (through setenv / saveenv
+  commands) and local shell variables (through standard shell syntax
+  "name=value"); only environment variables can be used with "run"
+  command
+
+General rules:
+--------------
+
+(1) If a command line (or an environment variable executed by a "run"
+    command) contains several commands separated by semicolon, and
+    one of these commands fails, then the remaining commands will be
+    executed anyway.
+
+(2) If you execute several variables with one call to run (i. e.
+    calling run with a list af variables as arguments), any failing
+    command will cause "run" to terminate, i. e. the remaining
+    variables are not executed.
+
 Note for Redundant Ethernet Interfaces:
 =======================================

@@ -2016,8 +2148,8 @@ defines the following image properties:

 * Target Operating System (Provisions for OpenBSD, NetBSD, FreeBSD,
  4.4BSD, Linux, SVR4, Esix, Solaris, Irix, SCO, Dell, NCR, VxWorks,
-  LynxOS, pSOS, QNX;
-  Currently supported: Linux, NetBSD, VxWorks, QNX).
+  LynxOS, pSOS, QNX, RTEMS, ARTOS;
+  Currently supported: Linux, NetBSD, VxWorks, QNX, RTEMS, ARTOS).
 * Target CPU Architecture (Provisions for Alpha, ARM, Intel x86,
  IA64, MIPS, MIPS, PowerPC, IBM S390, SuperH, Sparc, Sparc 64 Bit;
  Currently supported: PowerPC).
@@ -2375,18 +2507,18 @@ U-Boot supports the following image types:
  	to boot over the network using BOOTP etc., where the boot
  	server provides just a single image file, but you want to get
  	for instance an OS kernel and a RAMDisk image.
-  
+
  	"Multi-File Images" start with a list of image sizes, each
  	image size (in bytes) specified by an "uint32_t" in network
  	byte order. This list is terminated by an "(uint32_t)0".
  	Immediately after the terminating 0 follow the images, one by
  	one, all aligned on "uint32_t" boundaries (size rounded up to
  	a multiple of 4 bytes).
-  
+
   "Firmware Images" are binary images containing firmware (like
  	U-Boot or FPGA images) which usually will be programmed to
  	flash memory.
-  
+
   "Script files" are command sequences that will be executed by
  	U-Boot's command interpreter; this feature is especially
  	useful when you configure U-Boot to use a real shell (hush)
@@ -2481,6 +2613,17 @@ Hit 'q':
 	[q, b, e, ?] ## Application terminated, rc = 0x0


+
+Minicom warning:
+================
+
+Over time, many people have reported problems when trying to used the
+"minicom" terminal emulation program for serial download. I (wd)
+consider minicom to be broken, and recommend not to use it. Under
+Unix, I recommend to use C-Kermit for general purpose use (and
+especially for kermit binary protocol download ("loadb" command), and
+use "cu" for S-Record download ("loads" command).
+
 NetBSD Notes:
 =============

--- a/board/LEOX/elpt860/flash.c
+++ b/board/LEOX/elpt860/flash.c
@@ -118,7 +118,7 @@ flash_init (void)
  /* monitor protection ON by default */
  flash_protect (FLAG_PROTECT_SET,
 		 CFG_MONITOR_BASE,
-		 CFG_MONITOR_BASE + CFG_MONITOR_LEN-1,
+		 CFG_MONITOR_BASE + monitor_flash_len-1,
 		 &flash_info[0]);
 #endif
  
--- a/board/MAI/AmigaOneG3SE/flash_new.c
+++ b/board/MAI/AmigaOneG3SE/flash_new.c
@@ -120,7 +120,7 @@ unsigned long flash_init (void)
 		/* monitor protection ON by default */
 		flash_protect(FLAG_PROTECT_SET,
 			      CFG_MONITOR_BASE,
-			      CFG_MONITOR_BASE + CFG_MONITOR_LEN - 1,
+			      CFG_MONITOR_BASE + monitor_flash_len - 1,
 			      &flash_info[0]);
 #endif

--- a/board/MAI/bios_emulator/scitech/src/v86bios/command.c
+++ b/board/MAI/bios_emulator/scitech/src/v86bios/command.c
@@ -36,6 +36,3 @@ getline(char *buf,int *num,int max_num)
    line_pointer = line_pointer + *num;
    len = len - *num;
 }
-
-
-
--- a/board/RPXClassic/flash.c
+++ b/board/RPXClassic/flash.c
@@ -64,7 +64,7 @@ unsigned long flash_init (void)
 	/* monitor protection ON by default */
 	flash_protect(FLAG_PROTECT_SET,
 		      CFG_MONITOR_BASE,
-		      CFG_MONITOR_BASE+CFG_MONITOR_LEN-1,
+		      CFG_MONITOR_BASE+monitor_flash_len-1,
 		      &flash_info[0]);
 #endif

--- a/board/RPXlite/flash.c
+++ b/board/RPXlite/flash.c
@@ -85,7 +85,7 @@ unsigned long flash_init (void)
 	/* monitor protection ON by default */
 	flash_protect(FLAG_PROTECT_SET,
 		      CFG_MONITOR_BASE,
-		      CFG_MONITOR_BASE+CFG_MONITOR_LEN-1,
+		      CFG_MONITOR_BASE+monitor_flash_len-1,
 		      &flash_info[0]);
 #endif

--- a/board/RRvision/flash.c
+++ b/board/RRvision/flash.c
@@ -73,7 +73,7 @@ unsigned long flash_init (void)
 	/* monitor protection ON by default */
 	flash_protect(FLAG_PROTECT_SET,
 		      CFG_MONITOR_BASE,
-		      CFG_MONITOR_BASE+CFG_MONITOR_LEN-1,
+		      CFG_MONITOR_BASE+monitor_flash_len-1,
 		      &flash_info[0]);
 #endif

--- a/board/at91rm9200dk/at91rm9200dk.c
+++ b/board/at91rm9200dk/at91rm9200dk.c
@@ -23,7 +23,7 @@
 */

 #include <common.h>
-#include <AT91RM9200.h>
+#include <asm/arch/AT91RM9200.h>

 /* ------------------------------------------------------------------------- */
 /*
--- a/board/atc/Makefile
+++ b/board/atc/Makefile
@@ -0,0 +1,40 @@
+#
+# (C) Copyright 2001
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB	= lib$(BOARD).a
+
+OBJS	= $(BOARD).o flash.o
+
+$(LIB):	.depend $(OBJS)
+	$(AR) crv $@ $^
+
+#########################################################################
+
+.depend:	Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
+		$(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
+
+sinclude .depend
+
+#########################################################################
--- a/board/atc/atc.c
+++ b/board/atc/atc.c
@@ -0,0 +1,378 @@
+/*
+ * (C) Copyright 2001
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <ioports.h>
+#include <mpc8260.h>
+#include <pci.h>
+
+/*
+ * I/O Port configuration table
+ *
+ * if conf is 1, then that port pin will be configured at boot time
+ * according to the five values podr/pdir/ppar/psor/pdat for that entry
+ */
+
+const iop_conf_t iop_conf_tab[4][32] = {
+
+    /* Port A configuration */
+    {	/*	      conf ppar psor pdir podr pdat */
+	/* PA31 */ {   1,   1,   1,   0,   0,   0   }, /* FCC1 MII COL */
+	/* PA30 */ {   1,   1,   1,   0,   0,   0   }, /* FCC1 MII CRS */
+	/* PA29 */ {   1,   1,   1,   1,   0,   0   }, /* FCC1 MII TX_ER */
+	/* PA28 */ {   1,   1,   1,   1,   0,   0   }, /* FCC1 MII TX_EN */
+	/* PA27 */ {   1,   1,   1,   0,   0,   0   }, /* FCC1 MII RX_DV */
+	/* PA26 */ {   1,   1,   1,   0,   0,   0   }, /* FCC1 MII RX_ER */
+	/* PA25 */ {   1,   0,   0,   1,   0,   0   }, /* FCC2 MII MDIO */
+	/* PA24 */ {   1,   0,   0,   1,   0,   0   }, /* FCC2 MII MDC */
+	/* PA23 */ {   1,   0,   0,   1,   0,   0   }, /* FCC1 MII MDIO */
+	/* PA22 */ {   1,   0,   0,   1,   0,   0   }, /* FCC1 MII MDC */
+	/* PA21 */ {   1,   1,   0,   1,   0,   0   }, /* FCC1 MII TxD[3] */
+	/* PA20 */ {   1,   1,   0,   1,   0,   0   }, /* FCC1 MII TxD[2] */
+	/* PA19 */ {   1,   1,   0,   1,   0,   0   }, /* FCC1 MII TxD[1] */
+	/* PA18 */ {   1,   1,   0,   1,   0,   0   }, /* FCC1 MII TxD[0] */
+	/* PA17 */ {   1,   1,   0,   0,   0,   0   }, /* FCC1 MII RxD[0] */
+	/* PA16 */ {   1,   1,   0,   0,   0,   0   }, /* FCC1 MII RxD[1] */
+	/* PA15 */ {   1,   1,   0,   0,   0,   0   }, /* FCC1 MII RxD[2] */
+	/* PA14 */ {   1,   1,   0,   0,   0,   0   }, /* FCC1 MII RxD[3] */
+	/* PA13 */ {   1,   0,   0,   1,   0,   0   }, /* FCC2 MII TXSL1 */
+	/* PA12 */ {   1,   0,   0,   1,   0,   1   }, /* FCC2 MII TXSL0 */
+	/* PA11 */ {   1,   0,   0,   1,   0,   0   }, /* FCC1 MII TXSL1 */
+	/* PA10 */ {   1,   0,   0,   1,   0,   1   }, /* FCC1 MII TXSL0 */
+#if 1
+	/* PA9  */ {   0,   1,   0,   1,   0,   0   }, /* SMC2 TXD */
+	/* PA8  */ {   0,   1,   0,   0,   0,   0   }, /* SMC2 RXD */
+#else
+	/* PA9  */ {   1,   1,   0,   1,   0,   0   }, /* SMC2 TXD */
+	/* PA8  */ {   1,   1,   0,   0,   0,   0   }, /* SMC2 RXD */
+#endif
+	/* PA7  */ {   0,   0,   0,   0,   0,   0   }, /* PA7 */
+	/* PA6  */ {   1,   0,   0,   1,   0,   1   }, /* FCC2 MII PAUSE */
+	/* PA5  */ {   1,   0,   0,   1,   0,   1   }, /* FCC1 MII PAUSE */
+	/* PA4  */ {   1,   0,   0,   1,   0,   0   }, /* FCC2 MII PWRDN */
+	/* PA3  */ {   1,   0,   0,   1,   0,   0   }, /* FCC1 MII PWRDN */
+	/* PA2  */ {   0,   0,   0,   0,   0,   0   }, /* PA2 */
+	/* PA1  */ {   1,   0,   0,   0,   0,   0   }, /* FCC2 MII MDINT */
+	/* PA0  */ {   1,   0,   0,   1,   0,   0   }  /* FCC1 MII MDINT */
+    },
+
+    /* Port B configuration */
+    {   /*	      conf ppar psor pdir podr pdat */
+	/* PB31 */ {   1,   1,   0,   1,   0,   0   }, /* FCC2 MII TX_ER */
+	/* PB30 */ {   1,   1,   0,   0,   0,   0   }, /* FCC2 MII RX_DV */
+	/* PB29 */ {   1,   1,   1,   1,   0,   0   }, /* FCC2 MII TX_EN */
+	/* PB28 */ {   1,   1,   0,   0,   0,   0   }, /* FCC2 MII RX_ER */
+	/* PB27 */ {   1,   1,   0,   0,   0,   0   }, /* FCC2 MII COL */
+	/* PB26 */ {   1,   1,   0,   0,   0,   0   }, /* FCC2 MII CRS */
+	/* PB25 */ {   1,   1,   0,   1,   0,   0   }, /* FCC2 MII TxD[3] */
+	/* PB24 */ {   1,   1,   0,   1,   0,   0   }, /* FCC2 MII TxD[2] */
+	/* PB23 */ {   1,   1,   0,   1,   0,   0   }, /* FCC2 MII TxD[1] */
+	/* PB22 */ {   1,   1,   0,   1,   0,   0   }, /* FCC2 MII TxD[0] */
+	/* PB21 */ {   1,   1,   0,   0,   0,   0   }, /* FCC2 MII RxD[0] */
+	/* PB20 */ {   1,   1,   0,   0,   0,   0   }, /* FCC2 MII RxD[1] */
+	/* PB19 */ {   1,   1,   0,   0,   0,   0   }, /* FCC2 MII RxD[2] */
+	/* PB18 */ {   1,   1,   0,   0,   0,   0   }, /* FCC2 MII RxD[3] */
+	/* PB17 */ {   0,   0,   0,   0,   0,   0   }, /* PB17 */
+	/* PB16 */ {   0,   0,   0,   0,   0,   0   }, /* PB16 */
+	/* PB15 */ {   0,   0,   0,   0,   0,   0   }, /* PB15 */
+	/* PB14 */ {   0,   0,   0,   0,   0,   0   }, /* PB14 */
+	/* PB13 */ {   0,   0,   0,   0,   0,   0   }, /* PB13 */
+	/* PB12 */ {   0,   0,   0,   0,   0,   0   }, /* PB12 */
+	/* PB11 */ {   0,   0,   0,   0,   0,   0   }, /* PB11 */
+	/* PB10 */ {   0,   0,   0,   0,   0,   0   }, /* PB10 */
+	/* PB9  */ {   0,   0,   0,   0,   0,   0   }, /* PB9 */
+	/* PB8  */ {   0,   0,   0,   0,   0,   0   }, /* PB8 */
+	/* PB7  */ {   0,   0,   0,   0,   0,   0   }, /* PB7 */
+	/* PB6  */ {   0,   0,   0,   0,   0,   0   }, /* PB6 */
+	/* PB5  */ {   0,   0,   0,   0,   0,   0   }, /* PB5 */
+	/* PB4  */ {   0,   0,   0,   0,   0,   0   }, /* PB4 */
+	/* PB3  */ {   0,   0,   0,   0,   0,   0   }, /* PB3 */
+	/* PB2  */ {   0,   0,   0,   0,   0,   0   }, /* PB2 */
+	/* PB1  */ {   0,   0,   0,   0,   0,   0   }, /* PB1 */
+	/* PB0  */ {   0,   0,   0,   0,   0,   0   }  /* PB0 */
+    },
+
+    /* Port C */
+    {   /*	      conf ppar psor pdir podr pdat */
+	/* PC31 */ {   0,   0,   0,   0,   0,   0   }, /* PC31 */
+	/* PC30 */ {   0,   0,   0,   0,   0,   0   }, /* PC30 */
+	/* PC29 */ {   1,   0,   0,   0,   0,   0   }, /* SCC1 CTS */
+	/* PC28 */ {   1,   0,   0,   0,   0,   0   }, /* SCC2 CTS */
+	/* PC27 */ {   0,   0,   0,   0,   0,   0   }, /* PC27 */
+	/* PC26 */ {   0,   0,   0,   0,   0,   0   }, /* PC26 */
+	/* PC25 */ {   0,   0,   0,   0,   0,   0   }, /* PC25 */
+	/* PC24 */ {   0,   0,   0,   0,   0,   0   }, /* PC24 */
+	/* PC23 */ {   0,   0,   0,   0,   0,   0   }, /* FDC37C78 DACFD */
+	/* PC22 */ {   0,   0,   0,   0,   0,   0   }, /* FDC37C78 DNFD */
+	/* PC21 */ {   1,   1,   0,   0,   0,   0   }, /* FCC1 MII RX_CLK */
+	/* PC20 */ {   1,   1,   0,   0,   0,   0   }, /* FCC1 MII TX_CLK */
+	/* PC19 */ {   1,   1,   0,   0,   0,   0   }, /* FCC2 MII RX_CLK */
+	/* PC18 */ {   1,   1,   0,   0,   0,   0   }, /* FCC2 MII TX_CLK */
+	/* PC17 */ {   0,   0,   0,   0,   0,   0   }, /* PC17 */
+	/* PC16 */ {   0,   0,   0,   0,   0,   0   }, /* PC16 */
+#if 0
+	/* PC15 */ {   0,   0,   0,   0,   0,   0   }, /* PC15 */
+#else
+	/* PC15 */ {   1,   1,   0,   1,   0,   0   }, /* PC15 */
+#endif
+	/* PC14 */ {   0,   0,   0,   0,   0,   0   }, /* PC14 */
+	/* PC13 */ {   0,   0,   0,   0,   0,   0   }, /* PC13 */
+	/* PC12 */ {   0,   0,   0,   0,   0,   0   }, /* PC12 */
+	/* PC11 */ {   0,   0,   0,   0,   0,   0   }, /* PC11 */
+	/* PC10 */ {   0,   0,   0,   0,   0,   0   }, /* PC10 */
+	/* PC9  */ {   0,   0,   0,   0,   0,   0   }, /* FC9 */
+	/* PC8  */ {   0,   0,   0,   0,   0,   0   }, /* PC8 */
+	/* PC7  */ {   0,   0,   0,   0,   0,   0   }, /* PC7 */
+	/* PC6  */ {   0,   0,   0,   0,   0,   0   }, /* PC6 */
+	/* PC5  */ {   0,   0,   0,   0,   0,   0   }, /* PC5 */
+	/* PC4  */ {   0,   0,   0,   0,   0,   0   }, /* PC4 */
+	/* PC3  */ {   0,   0,   0,   0,   0,   0   }, /* PC3 */
+	/* PC2  */ {   0,   0,   0,   0,   0,   0   }, /* PC2 */
+	/* PC1  */ {   0,   0,   0,   0,   0,   0   }, /* PC1 */
+	/* PC0  */ {   0,   0,   0,   0,   0,   0   }, /* FDC37C78 DRQFD */
+    },
+
+    /* Port D */
+    {   /*	      conf ppar psor pdir podr pdat */
+	/* PD31 */ {   1,   1,   0,   0,   0,   0   }, /* SCC1 RXD */
+	/* PD30 */ {   1,   1,   1,   1,   0,   0   }, /* SCC1 TXD */
+	/* PD29 */ {   1,   0,   0,   1,   0,   0   }, /* SCC1 RTS */
+	/* PD28 */ {   1,   1,   0,   0,   0,   0   }, /* SCC2 RXD */
+	/* PD27 */ {   1,   1,   0,   1,   0,   0   }, /* SCC2 TXD */
+	/* PD26 */ {   1,   0,   0,   1,   0,   0   }, /* SCC2 RTS */
+	/* PD25 */ {   0,   0,   0,   0,   0,   0   }, /* PD25 */
+	/* PD24 */ {   0,   0,   0,   0,   0,   0   }, /* PD24 */
+	/* PD23 */ {   0,   0,   0,   0,   0,   0   }, /* PD23 */
+	/* PD22 */ {   0,   0,   0,   0,   0,   0   }, /* PD22 */
+	/* PD21 */ {   0,   0,   0,   0,   0,   0   }, /* PD21 */
+	/* PD20 */ {   0,   0,   0,   0,   0,   0   }, /* PD20 */
+	/* PD19 */ {   0,   0,   0,   0,   0,   0   }, /* PD19 */
+	/* PD18 */ {   0,   0,   0,   0,   0,   0   }, /* PD18 */
+	/* PD17 */ {   0,   0,   0,   0,   0,   0   }, /* PD17 */
+	/* PD16 */ {   0,   0,   0,   0,   0,   0   }, /* PD16 */
+#if defined(CONFIG_SOFT_I2C)
+	/* PD15 */ {   1,   0,   0,   1,   1,   1   }, /* I2C SDA */
+	/* PD14 */ {   1,   0,   0,   1,   1,   1   }, /* I2C SCL */
+#else
+#if defined(CONFIG_HARD_I2C)
+	/* PD15 */ {   1,   1,   1,   0,   1,   0   }, /* I2C SDA */
+	/* PD14 */ {   1,   1,   1,   0,   1,   0   }, /* I2C SCL */
+#else /* normal I/O port pins */
+	/* PD15 */ {   1,   1,   1,   0,   1,   0   }, /* I2C SDA */
+	/* PD14 */ {   1,   1,   1,   0,   1,   0   }, /* I2C SCL */
+#endif
+#endif
+	/* PD13 */ {   0,   0,   0,   0,   0,   0   }, /* PD13 */
+	/* PD12 */ {   0,   0,   0,   0,   0,   0   }, /* PD12 */
+	/* PD11 */ {   0,   0,   0,   0,   0,   0   }, /* PD11 */
+	/* PD10 */ {   0,   0,   0,   0,   0,   0   }, /* PD10 */
+	/* PD9  */ {   1,   1,   0,   1,   0,   0   }, /* SMC1 TXD */
+	/* PD8  */ {   1,   1,   0,   0,   0,   0   }, /* SMC1 RXD */
+	/* PD7  */ {   0,   0,   0,   0,   0,   0   }, /* PD7 */
+	/* PD6  */ {   0,   0,   0,   0,   0,   0   }, /* PD6 */
+	/* PD5  */ {   0,   0,   0,   0,   0,   0   }, /* PD5 */
+#if 0
+	/* PD4  */ {   0,   0,   0,   0,   0,   0   }, /* PD4 */
+#else
+	/* PD4  */ {   1,   1,   1,   0,   0,   0   }, /* PD4 */
+#endif
+	/* PD3  */ {   0,   0,   0,   0,   0,   0   }, /* PD3 */
+	/* PD2  */ {   0,   0,   0,   0,   0,   0   }, /* PD2 */
+	/* PD1  */ {   0,   0,   0,   0,   0,   0   }, /* PD1 */
+	/* PD0  */ {   0,   0,   0,   0,   0,   0   }  /* PD0 */
+    }
+};
+
+/* ------------------------------------------------------------------------- */
+
+/* Check Board Identity:
+ */
+int checkboard (void)
+{
+	printf ("Board: ATC\n");
+	return 0;
+}
+
+/* ------------------------------------------------------------------------- */
+
+/* Try SDRAM initialization with P/LSDMR=sdmr and ORx=orx
+ *
+ * This routine performs standard 8260 initialization sequence
+ * and calculates the available memory size. It may be called
+ * several times to try different SDRAM configurations on both
+ * 60x and local buses.
+ */
+static long int try_init (volatile memctl8260_t * memctl, ulong sdmr,
+			  ulong orx, volatile uchar * base)
+{
+	volatile uchar c = 0xff;
+	ulong cnt, val;
+	volatile ulong *addr;
+	volatile uint *sdmr_ptr;
+	volatile uint *orx_ptr;
+	int i;
+	ulong save[32];		/* to make test non-destructive */
+	ulong maxsize;
+
+	/* We must be able to test a location outsize the maximum legal size
+	 * to find out THAT we are outside; but this address still has to be
+	 * mapped by the controller. That means, that the initial mapping has
+	 * to be (at least) twice as large as the maximum expected size.
+	 */
+	maxsize = (1 + (~orx | 0x7fff)) / 2;
+
+	/* Since CFG_SDRAM_BASE is always 0 (??), we assume that
+	 * we are configuring CS1 if base != 0
+	 */
+	sdmr_ptr = &memctl->memc_psdmr;
+	orx_ptr = &memctl->memc_or2;
+
+	*orx_ptr = orx;
+
+	/*
+	 * Quote from 8260 UM (10.4.2 SDRAM Power-On Initialization, 10-35):
+	 *
+	 * "At system reset, initialization software must set up the
+	 *  programmable parameters in the memory controller banks registers
+	 *  (ORx, BRx, P/LSDMR). After all memory parameters are configured,
+	 *  system software should execute the following initialization sequence
+	 *  for each SDRAM device.
+	 *
+	 *  1. Issue a PRECHARGE-ALL-BANKS command
+	 *  2. Issue eight CBR REFRESH commands
+	 *  3. Issue a MODE-SET command to initialize the mode register
+	 *
+	 *  The initial commands are executed by setting P/LSDMR[OP] and
+	 *  accessing the SDRAM with a single-byte transaction."
+	 *
+	 * The appropriate BRx/ORx registers have already been set when we
+	 * get here. The SDRAM can be accessed at the address CFG_SDRAM_BASE.
+	 */
+
+	*sdmr_ptr = sdmr | PSDMR_OP_PREA;
+	*base = c;
+
+	*sdmr_ptr = sdmr | PSDMR_OP_CBRR;
+	for (i = 0; i < 8; i++)
+		*base = c;
+
+	*sdmr_ptr = sdmr | PSDMR_OP_MRW;
+	*(base + CFG_MRS_OFFS) = c;	/* setting MR on address lines */
+
+	*sdmr_ptr = sdmr | PSDMR_OP_NORM | PSDMR_RFEN;
+	*base = c;
+
+	/*
+	 * Check memory range for valid RAM. A simple memory test determines
+	 * the actually available RAM size between addresses `base' and
+	 * `base + maxsize'. Some (not all) hardware errors are detected:
+	 * - short between address lines
+	 * - short between data lines
+	 */
+	i = 0;
+	for (cnt = maxsize / sizeof (long); cnt > 0; cnt >>= 1) {
+		addr = (volatile ulong *) base + cnt;	/* pointer arith! */
+		save[i++] = *addr;
+		*addr = ~cnt;
+	}
+
+	addr = (volatile ulong *) base;
+	save[i] = *addr;
+	*addr = 0;
+
+	if ((val = *addr) != 0) {
+		*addr = save[i];
+		return (0);
+	}
+
+	for (cnt = 1; cnt <= maxsize / sizeof (long); cnt <<= 1) {
+		addr = (volatile ulong *) base + cnt;	/* pointer arith! */
+		val = *addr;
+		*addr = save[--i];
+		if (val != ~cnt) {
+			/* Write the actual size to ORx
+			 */
+			*orx_ptr = orx | ~(cnt * sizeof (long) - 1);
+			return (cnt * sizeof (long));
+		}
+	}
+	return (maxsize);
+}
+
+long int initdram (int board_type)
+{
+	volatile immap_t *immap = (immap_t *) CFG_IMMR;
+	volatile memctl8260_t *memctl = &immap->im_memctl;
+
+#ifndef CFG_RAMBOOT
+	ulong size8, size9;
+#endif
+	long psize;
+
+	psize = 8 * 1024 * 1024;
+
+	memctl->memc_mptpr = CFG_MPTPR;
+	memctl->memc_psrt = CFG_PSRT;
+
+#ifndef CFG_RAMBOOT
+	/* 60x SDRAM setup:
+	 */
+	size8 = try_init (memctl, CFG_PSDMR_8COL, CFG_OR2_8COL,
+			  (uchar *) CFG_SDRAM_BASE);
+	size9 = try_init (memctl, CFG_PSDMR_9COL, CFG_OR2_9COL,
+			  (uchar *) CFG_SDRAM_BASE);
+
+	if (size8 < size9) {
+		psize = size9;
+		printf ("(60x:9COL) ");
+	} else {
+		psize = try_init (memctl, CFG_PSDMR_8COL, CFG_OR2_8COL,
+				  (uchar *) CFG_SDRAM_BASE);
+		printf ("(60x:8COL) ");
+	}
+
+#endif	/* CFG_RAMBOOT */
+
+	icache_enable ();
+
+	return (psize);
+}
+
+#if (CONFIG_COMMANDS & CFG_CMD_DOC)
+extern void doc_probe (ulong physadr);
+void doc_init (void)
+{
+	doc_probe (CFG_DOC_BASE);
+}
+#endif
+
+#ifdef	CONFIG_PCI
+struct pci_controller hose;
+
+extern void pci_mpc8250_init(struct pci_controller *);
+
+void pci_init_board(void)
+{
+	pci_mpc8250_init(&hose);
+}
+#endif
--- a/board/atc/config.mk
+++ b/board/atc/config.mk
@@ -0,0 +1,43 @@
+#
+# (C) Copyright 2001
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+#
+# ATC boards
+#
+
+# This should be equal to the CFG_FLASH_BASE define in config_atc.h
+# for the "final" configuration, with U-Boot in flash, or the address
+# in RAM where U-Boot is loaded at for debugging.
+#
+
+ifeq ($(CONFIG_BOOT_ROM),y)
+	TEXT_BASE := 0xFF800000
+	PLATFORM_CPPFLAGS += -DCONFIG_BOOT_ROM
+else
+	TEXT_BASE := 0xFF000000
+endif
+
+# RAM version
+#TEXT_BASE := 0x100000
+
+PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)
--- a/board/atc/flash.c
+++ b/board/atc/flash.c
@@ -0,0 +1,663 @@
+/*
+ * (C) Copyright 2003
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+
+flash_info_t	flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips	*/
+
+/* NOTE - CONFIG_FLASH_16BIT means the CPU interface is 16-bit, it
+ *        has nothing to do with the flash chip being 8-bit or 16-bit.
+ */
+#ifdef CONFIG_FLASH_16BIT
+typedef unsigned short FLASH_PORT_WIDTH;
+typedef volatile unsigned short FLASH_PORT_WIDTHV;
+#define	FLASH_ID_MASK	0xFFFF
+#else
+typedef unsigned long FLASH_PORT_WIDTH;
+typedef volatile unsigned long FLASH_PORT_WIDTHV;
+#define	FLASH_ID_MASK	0xFFFFFFFF
+#endif
+
+#define FPW	FLASH_PORT_WIDTH
+#define FPWV	FLASH_PORT_WIDTHV
+
+#define ORMASK(size) ((-size) & OR_AM_MSK)
+
+#define FLASH_CYCLE1	0x0555
+#define FLASH_CYCLE2	0x02aa
+
+/*-----------------------------------------------------------------------
+ * Functions
+ */
+static ulong flash_get_size(FPWV *addr, flash_info_t *info);
+static void flash_reset(flash_info_t *info);
+static int write_word_intel(flash_info_t *info, FPWV *dest, FPW data);
+static int write_word_amd(flash_info_t *info, FPWV *dest, FPW data);
+static void flash_get_offsets(ulong base, flash_info_t *info);
+static flash_info_t *flash_get_info(ulong base);
+
+/*-----------------------------------------------------------------------
+ * flash_init()
+ *
+ * sets up flash_info and returns size of FLASH (bytes)
+ */
+unsigned long flash_init (void)
+{
+	unsigned long size = 0;
+	int i;
+
+	/* Init: no FLASHes known */
+	for (i=0; i < CFG_MAX_FLASH_BANKS; ++i) {
+#if 0
+		ulong flashbase = (i == 0) ? PHYS_FLASH_1 : PHYS_FLASH_2;
+#else
+		ulong flashbase = CFG_FLASH_BASE;
+#endif
+
+		memset(&flash_info[i], 0, sizeof(flash_info_t));
+
+		flash_info[i].size = 
+			flash_get_size((FPW *)flashbase, &flash_info[i]);
+
+		if (flash_info[i].flash_id == FLASH_UNKNOWN) {
+			printf ("## Unknown FLASH on Bank %d - Size = 0x%08lx\n",
+			i, flash_info[i].size);
+		}
+		
+		size += flash_info[i].size;
+	}
+
+#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
+	/* monitor protection ON by default */
+	flash_protect(FLAG_PROTECT_SET,
+		      CFG_MONITOR_BASE,
+		      CFG_MONITOR_BASE+monitor_flash_len-1,
+		      flash_get_info(CFG_MONITOR_BASE));
+#endif
+
+#ifdef	CFG_ENV_IS_IN_FLASH
+	/* ENV protection ON by default */
+	flash_protect(FLAG_PROTECT_SET,
+		      CFG_ENV_ADDR,
+		      CFG_ENV_ADDR+CFG_ENV_SIZE-1,
+		      flash_get_info(CFG_ENV_ADDR));
+#endif
+
+
+	return size ? size : 1;
+}
+
+/*-----------------------------------------------------------------------
+ */
+static void flash_reset(flash_info_t *info)
+{
+	FPWV *base = (FPWV *)(info->start[0]);
+
+	/* Put FLASH back in read mode */
+	if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL)
+		*base = (FPW)0x00FF00FF;	/* Intel Read Mode */
+	else if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_AMD)
+		*base = (FPW)0x00F000F0;	/* AMD Read Mode */
+}
+
+/*-----------------------------------------------------------------------
+ */
+static void flash_get_offsets (ulong base, flash_info_t *info)
+{
+	int i;
+
+	/* set up sector start address table */
+	if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL
+	    && (info->flash_id & FLASH_BTYPE)) {
+		int bootsect_size;	/* number of bytes/boot sector	*/
+		int sect_size;		/* number of bytes/regular sector */
+
+		bootsect_size = 0x00002000 * (sizeof(FPW)/2);
+		sect_size =     0x00010000 * (sizeof(FPW)/2);
+
+		/* set sector offsets for bottom boot block type	*/
+		for (i = 0; i < 8; ++i) {
+			info->start[i] = base + (i * bootsect_size);
+		}
+		for (i = 8; i < info->sector_count; i++) {
+			info->start[i] = base + ((i - 7) * sect_size);
+		}
+	}
+	else if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_AMD
+		 && (info->flash_id & FLASH_TYPEMASK) == FLASH_AM640U) {
+
+		int sect_size;		/* number of bytes/sector */
+
+		sect_size = 0x00010000 * (sizeof(FPW)/2);
+
+		/* set up sector start address table (uniform sector type) */
+		for( i = 0; i < info->sector_count; i++ )
+			info->start[i] = base + (i * sect_size);
+	}
+}
+
+/*-----------------------------------------------------------------------
+ */
+
+static flash_info_t *flash_get_info(ulong base)
+{
+	int i;
+	flash_info_t * info;
+	
+	for (i = 0; i < CFG_MAX_FLASH_BANKS; i ++) {
+		info = & flash_info[i];
+		if (info->start[0] <= base && base < info->start[0] + info->size)
+			break;
+	}
+	
+	return i == CFG_MAX_FLASH_BANKS ? 0 : info;
+}
+
+/*-----------------------------------------------------------------------
+ */
+
+void flash_print_info (flash_info_t *info)
+{
+	int i;
+	uchar *boottype;
+	uchar *bootletter;
+	uchar *fmt;
+	uchar botbootletter[] = "B";
+	uchar topbootletter[] = "T";
+	uchar botboottype[] = "bottom boot sector";
+	uchar topboottype[] = "top boot sector";
+
+	if (info->flash_id == FLASH_UNKNOWN) {
+		printf ("missing or unknown FLASH type\n");
+		return;
+	}
+
+	switch (info->flash_id & FLASH_VENDMASK) {
+	case FLASH_MAN_AMD:	printf ("AMD ");		break;
+	case FLASH_MAN_BM:	printf ("BRIGHT MICRO ");	break;
+	case FLASH_MAN_FUJ:	printf ("FUJITSU ");		break;
+	case FLASH_MAN_SST:	printf ("SST ");		break;
+	case FLASH_MAN_STM:	printf ("STM ");		break;
+	case FLASH_MAN_INTEL:	printf ("INTEL ");		break;
+	default:		printf ("Unknown Vendor ");	break;
+	}
+
+	/* check for top or bottom boot, if it applies */
+	if (info->flash_id & FLASH_BTYPE) {
+		boottype = botboottype;
+		bootletter = botbootletter;
+	}
+	else {
+		boottype = topboottype;
+		bootletter = topbootletter;
+	}
+
+	switch (info->flash_id & FLASH_TYPEMASK) {
+	case FLASH_AM640U:
+		fmt = "29LV641D (64 Mbit, uniform sectors)\n";
+		break;
+        case FLASH_28F800C3B:
+        case FLASH_28F800C3T:
+		fmt = "28F800C3%s (8 Mbit, %s)\n";
+		break;
+	case FLASH_INTEL800B:
+	case FLASH_INTEL800T:
+		fmt = "28F800B3%s (8 Mbit, %s)\n";
+		break;
+        case FLASH_28F160C3B:
+        case FLASH_28F160C3T:
+		fmt = "28F160C3%s (16 Mbit, %s)\n";
+		break;
+	case FLASH_INTEL160B:
+	case FLASH_INTEL160T:
+		fmt = "28F160B3%s (16 Mbit, %s)\n";
+		break;
+        case FLASH_28F320C3B:
+        case FLASH_28F320C3T:
+		fmt = "28F320C3%s (32 Mbit, %s)\n";
+		break;
+	case FLASH_INTEL320B:
+	case FLASH_INTEL320T:
+		fmt = "28F320B3%s (32 Mbit, %s)\n";
+		break;
+        case FLASH_28F640C3B:
+        case FLASH_28F640C3T:
+		fmt = "28F640C3%s (64 Mbit, %s)\n";
+		break;
+	case FLASH_INTEL640B:
+	case FLASH_INTEL640T:
+		fmt = "28F640B3%s (64 Mbit, %s)\n";
+		break;
+	default:
+		fmt = "Unknown Chip Type\n";
+		break;
+	}
+
+	printf (fmt, bootletter, boottype);
+
+	printf ("  Size: %ld MB in %d Sectors\n",
+		info->size >> 20,
+		info->sector_count);
+
+	printf ("  Sector Start Addresses:");
+
+	for (i=0; i<info->sector_count; ++i) {
+		if ((i % 5) == 0) {
+			printf ("\n   ");
+		}
+
+		printf (" %08lX%s", info->start[i],
+			info->protect[i] ? " (RO)" : "     ");
+	}
+
+	printf ("\n");
+}
+
+/*-----------------------------------------------------------------------
+ */
+
+/*
+ * The following code cannot be run from FLASH!
+ */
+
+ulong flash_get_size (FPWV *addr, flash_info_t *info)
+{
+	/* Write auto select command: read Manufacturer ID */
+
+	/* Write auto select command sequence and test FLASH answer */
+	addr[FLASH_CYCLE1] = (FPW)0x00AA00AA;	/* for AMD, Intel ignores this */
+	addr[FLASH_CYCLE2] = (FPW)0x00550055;	/* for AMD, Intel ignores this */
+	addr[FLASH_CYCLE1] = (FPW)0x00900090;	/* selects Intel or AMD */
+
+	/* The manufacturer codes are only 1 byte, so just use 1 byte.
+	 * This works for any bus width and any FLASH device width.
+	 */
+	udelay(100);
+	switch (addr[0] & 0xff) {
+
+	case (uchar)AMD_MANUFACT:
+		info->flash_id = FLASH_MAN_AMD;
+		break;
+
+	case (uchar)INTEL_MANUFACT:
+		info->flash_id = FLASH_MAN_INTEL;
+		break;
+
+	default:
+		info->flash_id = FLASH_UNKNOWN;
+		info->sector_count = 0;
+		info->size = 0;
+		break;
+	}
+
+	/* Check 16 bits or 32 bits of ID so work on 32 or 16 bit bus. */
+	if (info->flash_id != FLASH_UNKNOWN) switch (addr[1]) {
+
+	case (FPW)AMD_ID_LV640U:	/* 29LV640 and 29LV641 have same ID */
+		info->flash_id += FLASH_AM640U;
+		info->sector_count = 128;
+		info->size = 0x00800000 * (sizeof(FPW)/2);
+		break;				/* => 8 or 16 MB	*/
+
+	case (FPW)INTEL_ID_28F800C3B:
+		info->flash_id += FLASH_28F800C3B;
+		info->sector_count = 23;
+		info->size = 0x00100000 * (sizeof(FPW)/2);
+		break;				/* => 1 or 2 MB		*/
+
+	case (FPW)INTEL_ID_28F800B3B:
+		info->flash_id += FLASH_INTEL800B;
+		info->sector_count = 23;
+		info->size = 0x00100000 * (sizeof(FPW)/2);
+		break;				/* => 1 or 2 MB		*/
+
+	case (FPW)INTEL_ID_28F160C3B:
+		info->flash_id += FLASH_28F160C3B;
+		info->sector_count = 39;
+		info->size = 0x00200000 * (sizeof(FPW)/2);
+		break;				/* => 2 or 4 MB		*/
+
+	case (FPW)INTEL_ID_28F160B3B:
+		info->flash_id += FLASH_INTEL160B;
+		info->sector_count = 39;
+		info->size = 0x00200000 * (sizeof(FPW)/2);
+		break;				/* => 2 or 4 MB		*/
+
+	case (FPW)INTEL_ID_28F320C3B:
+		info->flash_id += FLASH_28F320C3B;
+		info->sector_count = 71;
+		info->size = 0x00400000 * (sizeof(FPW)/2);
+		break;				/* => 4 or 8 MB		*/
+
+	case (FPW)INTEL_ID_28F320B3B:
+		info->flash_id += FLASH_INTEL320B;
+		info->sector_count = 71;
+		info->size = 0x00400000 * (sizeof(FPW)/2);
+		break;				/* => 4 or 8 MB		*/
+
+	case (FPW)INTEL_ID_28F640C3B:
+		info->flash_id += FLASH_28F640C3B;
+		info->sector_count = 135;
+		info->size = 0x00800000 * (sizeof(FPW)/2);
+		break;				/* => 8 or 16 MB	*/
+
+	case (FPW)INTEL_ID_28F640B3B:
+		info->flash_id += FLASH_INTEL640B;
+		info->sector_count = 135;
+		info->size = 0x00800000 * (sizeof(FPW)/2);
+		break;				/* => 8 or 16 MB	*/
+
+	default:
+		info->flash_id = FLASH_UNKNOWN;
+		info->sector_count = 0;
+		info->size = 0;
+		return (0);			/* => no or unknown flash */
+	}
+
+	flash_get_offsets((ulong)addr, info);
+
+	/* Put FLASH back in read mode */
+	flash_reset(info);
+
+	return (info->size);
+}
+
+/*-----------------------------------------------------------------------
+ */
+
+int	flash_erase (flash_info_t *info, int s_first, int s_last)
+{
+	FPWV *addr;
+	int flag, prot, sect;
+	int intel = (info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL;
+	ulong start, now, last;
+	int rcode = 0;
+
+	if ((s_first < 0) || (s_first > s_last)) {
+		if (info->flash_id == FLASH_UNKNOWN) {
+			printf ("- missing\n");
+		} else {
+			printf ("- no sectors to erase\n");
+		}
+		return 1;
+	}
+
+	switch (info->flash_id & FLASH_TYPEMASK) {
+	case FLASH_INTEL800B:
+	case FLASH_INTEL160B:
+	case FLASH_INTEL320B:
+	case FLASH_INTEL640B:
+	case FLASH_28F800C3B:
+	case FLASH_28F160C3B:
+	case FLASH_28F320C3B:
+	case FLASH_28F640C3B:
+	case FLASH_AM640U:
+		break;
+	case FLASH_UNKNOWN:
+	default:
+		printf ("Can't erase unknown flash type %08lx - aborted\n",
+			info->flash_id);
+		return 1;
+	}
+
+	prot = 0;
+	for (sect=s_first; sect<=s_last; ++sect) {
+		if (info->protect[sect]) {
+			prot++;
+		}
+	}
+
+	if (prot) {
+		printf ("- Warning: %d protected sectors will not be erased!\n",
+			prot);
+	} else {
+		printf ("\n");
+	}
+
+	last  = get_timer(0);
+
+	/* Start erase on unprotected sectors */
+	for (sect = s_first; sect<=s_last && rcode == 0; sect++) {
+
+		if (info->protect[sect] != 0)	/* protected, skip it */
+			continue;
+
+		/* Disable interrupts which might cause a timeout here */
+		flag = disable_interrupts();
+
+		addr = (FPWV *)(info->start[sect]);
+		if (intel) {
+			*addr = (FPW)0x00500050; /* clear status register */
+			*addr = (FPW)0x00200020; /* erase setup */
+			*addr = (FPW)0x00D000D0; /* erase confirm */
+		}
+		else {
+			/* must be AMD style if not Intel */
+			FPWV *base;		/* first address in bank */
+
+			base = (FPWV *)(info->start[0]);
+			base[FLASH_CYCLE1] = (FPW)0x00AA00AA;	/* unlock */
+			base[FLASH_CYCLE2] = (FPW)0x00550055;	/* unlock */
+			base[FLASH_CYCLE1] = (FPW)0x00800080;	/* erase mode */
+			base[FLASH_CYCLE1] = (FPW)0x00AA00AA;	/* unlock */
+			base[FLASH_CYCLE2] = (FPW)0x00550055;	/* unlock */
+			*addr = (FPW)0x00300030;	/* erase sector */
+		}
+
+		/* re-enable interrupts if necessary */
+		if (flag)
+			enable_interrupts();
+
+		start = get_timer(0);
+
+		/* wait at least 50us for AMD, 80us for Intel.
+		 * Let's wait 1 ms.
+		 */
+		udelay (1000);
+
+		while ((*addr & (FPW)0x00800080) != (FPW)0x00800080) {
+			if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
+				printf ("Timeout\n");
+
+				if (intel) {
+					/* suspend erase	*/
+					*addr = (FPW)0x00B000B0;
+				}
+
+				flash_reset(info);	/* reset to read mode */
+				rcode = 1;		/* failed */
+				break;
+			}
+
+			/* show that we're waiting */
+			if ((get_timer(last)) > CFG_HZ) {/* every second */
+				putc ('.');
+				last = get_timer(0);
+			}
+		}
+
+		/* show that we're waiting */
+		if ((get_timer(last)) > CFG_HZ) {	/* every second */
+			putc ('.');
+			last = get_timer(0);
+		}
+
+		flash_reset(info);	/* reset to read mode	*/
+	}
+
+	printf (" done\n");
+	return rcode;
+}
+
+/*-----------------------------------------------------------------------
+ * Copy memory to flash, returns:
+ * 0 - OK
+ * 1 - write timeout
+ * 2 - Flash not erased
+ */
+int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
+{
+	FPW data = 0; /* 16 or 32 bit word, matches flash bus width on MPC8XX */
+	int bytes;	  /* number of bytes to program in current word		*/
+	int left;	  /* number of bytes left to program			*/
+	int i, res;
+
+	for (left = cnt, res = 0;
+		 left > 0 && res == 0;
+		 addr += sizeof(data), left -= sizeof(data) - bytes) {
+
+		bytes = addr & (sizeof(data) - 1);
+		addr &= ~(sizeof(data) - 1);
+
+		/* combine source and destination data so can program
+		 * an entire word of 16 or 32 bits
+		 */
+		for (i = 0; i < sizeof(data); i++) {
+			data <<= 8;
+			if (i < bytes || i - bytes >= left )
+				data += *((uchar *)addr + i);
+			else
+				data += *src++;
+		}
+
+		/* write one word to the flash */
+		switch (info->flash_id & FLASH_VENDMASK) {
+		case FLASH_MAN_AMD:
+			res = write_word_amd(info, (FPWV *)addr, data);
+			break;
+		case FLASH_MAN_INTEL:
+			res = write_word_intel(info, (FPWV *)addr, data);
+			break;
+		default:
+			/* unknown flash type, error! */
+			printf ("missing or unknown FLASH type\n");
+			res = 1;	/* not really a timeout, but gives error */
+			break;
+		}
+	}
+
+	return (res);
+}
+
+/*-----------------------------------------------------------------------
+ * Write a word to Flash for AMD FLASH
+ * A word is 16 or 32 bits, whichever the bus width of the flash bank
+ * (not an individual chip) is.
+ *
+ * returns:
+ * 0 - OK
+ * 1 - write timeout
+ * 2 - Flash not erased
+ */
+static int write_word_amd (flash_info_t *info, FPWV *dest, FPW data)
+{
+	ulong start;
+	int flag;
+	int res = 0;	/* result, assume success	*/
+	FPWV *base;		/* first address in flash bank	*/
+
+	/* Check if Flash is (sufficiently) erased */
+	if ((*dest & data) != data) {
+		return (2);
+	}
+
+
+	base = (FPWV *)(info->start[0]);
+
+	/* Disable interrupts which might cause a timeout here */
+	flag = disable_interrupts();
+
+	base[FLASH_CYCLE1] = (FPW)0x00AA00AA;	/* unlock */
+	base[FLASH_CYCLE2] = (FPW)0x00550055;	/* unlock */
+	base[FLASH_CYCLE1] = (FPW)0x00A000A0;	/* selects program mode */
+
+	*dest = data;		/* start programming the data	*/
+
+	/* re-enable interrupts if necessary */
+	if (flag)
+		enable_interrupts();
+
+	start = get_timer (0);
+
+	/* data polling for D7 */
+	while (res == 0 && (*dest & (FPW)0x00800080) != (data & (FPW)0x00800080)) {
+		if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
+			*dest = (FPW)0x00F000F0;	/* reset bank */
+			res = 1;
+		}
+	}
+
+	return (res);
+}
+
+/*-----------------------------------------------------------------------
+ * Write a word to Flash for Intel FLASH
+ * A word is 16 or 32 bits, whichever the bus width of the flash bank
+ * (not an individual chip) is.
+ *
+ * returns:
+ * 0 - OK
+ * 1 - write timeout
+ * 2 - Flash not erased
+ */
+static int write_word_intel (flash_info_t *info, FPWV *dest, FPW data)
+{
+	ulong start;
+	int flag;
+	int res = 0;	/* result, assume success	*/
+
+	/* Check if Flash is (sufficiently) erased */
+	if ((*dest & data) != data) {
+		return (2);
+	}
+
+	/* Disable interrupts which might cause a timeout here */
+	flag = disable_interrupts();
+
+	*dest = (FPW)0x00500050;	/* clear status register	*/
+	*dest = (FPW)0x00FF00FF;	/* make sure in read mode	*/
+	*dest = (FPW)0x00400040;	/* program setup		*/
+
+	*dest = data;		/* start programming the data	*/
+
+	/* re-enable interrupts if necessary */
+	if (flag)
+		enable_interrupts();
+
+	start = get_timer (0);
+
+	while (res == 0 && (*dest & (FPW)0x00800080) != (FPW)0x00800080) {
+		if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
+			*dest = (FPW)0x00B000B0;	/* Suspend program	*/
+			res = 1;
+		}
+	}
+
+	if (res == 0 && (*dest & (FPW)0x00100010))
+		res = 1;	/* write failed, time out error is close enough	*/
+
+	*dest = (FPW)0x00500050;	/* clear status register	*/
+	*dest = (FPW)0x00FF00FF;	/* make sure in read mode	*/
+
+	return (res);
+}
--- a/board/atc/u-boot.lds
+++ b/board/atc/u-boot.lds
@@ -0,0 +1,118 @@
+/*
+ * (C) Copyright 2001
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_ARCH(powerpc)
+SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
+/* Do we need any of these for elf?
+   __DYNAMIC = 0;    */
+SECTIONS
+{
+  /* Read-only sections, merged into text segment: */
+  . = + SIZEOF_HEADERS;
+  .interp : { *(.interp) }
+  .hash          : { *(.hash)		}
+  .dynsym        : { *(.dynsym)		}
+  .dynstr        : { *(.dynstr)		}
+  .rel.text      : { *(.rel.text)		}
+  .rela.text     : { *(.rela.text) 	}
+  .rel.data      : { *(.rel.data)		}
+  .rela.data     : { *(.rela.data) 	}
+  .rel.rodata    : { *(.rel.rodata) 	}
+  .rela.rodata   : { *(.rela.rodata) 	}
+  .rel.got       : { *(.rel.got)		}
+  .rela.got      : { *(.rela.got)		}
+  .rel.ctors     : { *(.rel.ctors)	}
+  .rela.ctors    : { *(.rela.ctors)	}
+  .rel.dtors     : { *(.rel.dtors)	}
+  .rela.dtors    : { *(.rela.dtors)	}
+  .rel.bss       : { *(.rel.bss)		}
+  .rela.bss      : { *(.rela.bss)		}
+  .rel.plt       : { *(.rel.plt)		}
+  .rela.plt      : { *(.rela.plt)		}
+  .init          : { *(.init)	}
+  .plt : { *(.plt) }
+  .text      :
+  {
+    cpu/mpc8260/start.o	(.text)
+    *(.text)
+    common/environment.o(.text)
+    *(.fixup)
+    *(.got1)
+    . = ALIGN(16);
+    *(.rodata)
+    *(.rodata1)
+  }
+  .fini      : { *(.fini)    } =0
+  .ctors     : { *(.ctors)   }
+  .dtors     : { *(.dtors)   }
+
+  /* Read-write section, merged into data segment: */
+  . = (. + 0x0FFF) & 0xFFFFF000;
+  _erotext = .;
+  PROVIDE (erotext = .);
+  .reloc   :
+  {
+    *(.got)
+    _GOT2_TABLE_ = .;
+    *(.got2)
+    _FIXUP_TABLE_ = .;
+    *(.fixup)
+  }
+  __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
+  __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
+
+  .data    :
+  {
+    *(.data)
+    *(.data1)
+    *(.sdata)
+    *(.sdata2)
+    *(.dynamic)
+    CONSTRUCTORS
+  }
+  _edata  =  .;
+  PROVIDE (edata = .);
+
+  __start___ex_table = .;
+  __ex_table : { *(__ex_table) }
+  __stop___ex_table = .;
+
+  . = ALIGN(4096);
+  __init_begin = .;
+  .text.init : { *(.text.init) }
+  .data.init : { *(.data.init) }
+  . = ALIGN(4096);
+  __init_end = .;
+
+  __bss_start = .;
+  .bss       :
+  {
+   *(.sbss) *(.scommon)
+   *(.dynbss)
+   *(.bss)
+   *(COMMON)
+  }
+  _end = . ;
+  PROVIDE (end = .);
+}
+
--- a/board/bmw/flash.c
+++ b/board/bmw/flash.c
@@ -219,7 +219,7 @@ flash_init(void)
 #if CFG_MONITOR_BASE >= CFG_FLASH_BASE
    flash_protect(FLAG_PROTECT_SET,
 		CFG_MONITOR_BASE,
-		CFG_MONITOR_BASE + CFG_MONITOR_LEN - 1,
+		CFG_MONITOR_BASE + monitor_flash_len - 1,
 		&flash_info[0]);
 #endif

--- a/board/bubinga405ep/Makefile
+++ b/board/bubinga405ep/Makefile
@@ -0,0 +1,47 @@
+#
+# (C) Copyright 2000
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB	= lib$(BOARD).a
+
+OBJS	= $(BOARD).o flash.o
+SOBJS	= init.o
+
+$(LIB):	$(OBJS) $(SOBJS)
+	$(AR) crv $@ $^
+
+clean:
+	rm -f $(SOBJS) $(OBJS)
+
+distclean:	clean
+	rm -f $(LIB) core *.bak .depend
+
+#########################################################################
+
+.depend:	Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
+		$(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
+
+sinclude .depend
+
+#########################################################################
--- a/board/bubinga405ep/bubinga405ep.c
+++ b/board/bubinga405ep/bubinga405ep.c
@@ -0,0 +1,126 @@
+/*
+ * (C) Copyright 2000
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+long int spd_sdram (void);
+
+#include <common.h>
+#include "bubinga405ep.h"
+#include <asm/processor.h>
+
+
+int board_pre_init (void)
+{
+	mtdcr (uicsr, 0xFFFFFFFF);      /* clear all ints */
+	mtdcr (uicer, 0x00000000);      /* disable all ints */
+	mtdcr (uiccr, 0x00000010);
+	mtdcr (uicpr, 0xFFFF7FF0);      /* set int polarities */
+	mtdcr (uictr, 0x00000010);      /* set int trigger levels */
+	mtdcr (uicsr, 0xFFFFFFFF);      /* clear all ints */
+
+#if 0
+#define mtebc(reg, data)  mtdcr(ebccfga,reg);mtdcr(ebccfgd,data)
+    /* CS1 */
+	/* BAS=0xF00,BS=0x0(1MB),BU=0x3(R/W),BW=0x0( 8 bits) */
+	mtebc (pb1ap, 0x02815480);
+	mtebc (pb1cr, 0xF0018000);
+
+	p = (unsigned int*)0xEF600708;
+	t = *p;
+	t = t | 0x00000400;
+	*p = t;
+
+	/* BAS=0xF01,BS=0x0(1MB),BU=0x3(R/W),BW=0x0(8 bits) */
+	mtebc (pb2ap, 0x04815A80);
+	mtebc (pb2cr, 0xF0118000);
+
+	/* BAS=0xF02,BS=0x0(1MB),BU=0x3(R/W),BW=0x0( 8 bits) */
+	mtebc (pb3ap, 0x01815280);
+	mtebc (pb3cr, 0xF0218000);
+
+	/* BAS=0xF03,BS=0x0(1MB),BU=0x3(R/W),BW=0x0(8 bits) */
+	mtebc (pb7ap, 0x01815280);
+	mtebc (pb7cr, 0xF0318000);
+
+
+	/* set UART1 control to select CTS/RTS */
+#define FPGA_BRDC       0xF0300004
+	*(volatile char *) (FPGA_BRDC) |= 0x1;
+
+#endif
+
+	return 0;
+}
+
+
+/* ------------------------------------------------------------------------- */
+
+/*
+ * Check Board Identity:
+ */
+
+int checkboard (void)
+{
+	unsigned char *s = getenv ("serial#");
+	unsigned char *e;
+
+	puts ("Board: ");
+
+	if (!s || strncmp (s, "BUBINGA405EP", 9)) {
+		puts ("### No HW ID - assuming WALNUT405");
+	} else {
+		for (e = s; *e; ++e) {
+			if (*e == ' ')
+				break;
+		}
+		for (; s < e; ++s) {
+			putc (*s);
+		}
+	}
+	putc ('\n');
+
+	return (0);
+}
+
+
+/* -------------------------------------------------------------------------
+  initdram(int board_type) reads EEPROM via I2c. EEPROM contains all of
+  the necessary info for SDRAM controller configuration
+   ------------------------------------------------------------------------- */
+long int initdram (int board_type)
+{
+	long int ret;
+
+	ret = spd_sdram ();
+	return ret;
+}
+
+/* ------------------------------------------------------------------------- */
+
+int testdram (void)
+{
+	/* TODO: XXX XXX XXX */
+	printf ("test: xxx MB - ok\n");
+
+	return (0);
+}
+
+/* ------------------------------------------------------------------------- */
--- a/board/bubinga405ep/bubinga405ep.h
+++ b/board/bubinga405ep/bubinga405ep.h
@@ -0,0 +1,44 @@
+/*
+ * (C) Copyright 2000
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/****************************************************************************
+ * FLASH Memory Map as used by TQ Monitor:
+ *
+ *                          Start Address    Length
+ * +-----------------------+ 0x4000_0000     Start of Flash -----------------
+ * | MON8xx code           | 0x4000_0100     Reset Vector
+ * +-----------------------+ 0x400?_????
+ * | (unused)              |
+ * +-----------------------+ 0x4001_FF00
+ * | Ethernet Addresses    |                 0x78
+ * +-----------------------+ 0x4001_FF78
+ * | (Reserved for MON8xx) |                 0x44
+ * +-----------------------+ 0x4001_FFBC
+ * | Lock Address          |                 0x04
+ * +-----------------------+ 0x4001_FFC0                     ^
+ * | Hardware Information  |                 0x40            | MON8xx
+ * +=======================+ 0x4002_0000 (sector border)    -----------------
+ * | Autostart Header      |                                 | Applications
+ * | ...                   |                                 v
+ *
+ *****************************************************************************/
--- a/board/bubinga405ep/config.mk
+++ b/board/bubinga405ep/config.mk
@@ -0,0 +1,29 @@
+#
+# (C) Copyright 2000
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+#
+# esd ADCIOP boards
+#
+
+#TEXT_BASE = 0xFFFE0000
+TEXT_BASE = 0xFFF80000
--- a/board/bubinga405ep/flash.c
+++ b/board/bubinga405ep/flash.c
@@ -0,0 +1,737 @@
+/*
+ * (C) Copyright 2000
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*
+ * Modified 4/5/2001
+ * Wait for completion of each sector erase command issued
+ * 4/5/2001
+ * Chris Hallinan - DS4.COM, Inc. - clh@net1plus.com
+ */
+
+#include <common.h>
+#include <ppc4xx.h>
+#include <asm/processor.h>
+
+flash_info_t	flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips	*/
+
+/*-----------------------------------------------------------------------
+ * Functions
+ */
+static ulong flash_get_size (vu_long *addr, flash_info_t *info);
+static int write_word (flash_info_t *info, ulong dest, ulong data);
+static void flash_get_offsets (ulong base, flash_info_t *info);
+
+#ifdef CONFIG_ADCIOP
+#define ADDR0           0x0aa9
+#define ADDR1           0x0556
+#define FLASH_WORD_SIZE unsigned char
+#endif
+
+#ifdef CONFIG_CPCI405
+#define ADDR0           0x5555
+#define ADDR1           0x2aaa
+#define FLASH_WORD_SIZE unsigned short
+#endif
+
+#ifdef CONFIG_WALNUT405
+#define ADDR0           0x5555
+#define ADDR1           0x2aaa
+#define FLASH_WORD_SIZE unsigned char
+#endif
+
+#ifdef CONFIG_BUBINGA405EP
+#define ADDR0           0x5555
+#define ADDR1           0x2aaa
+#define FLASH_WORD_SIZE unsigned char
+#endif
+
+
+/*-----------------------------------------------------------------------
+ */
+
+unsigned long flash_init (void)
+{
+	unsigned long size_b0, size_b1;
+	int i;
+        uint pbcr;
+        unsigned long base_b0, base_b1;
+
+	/* Init: no FLASHes known */
+	for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
+		flash_info[i].flash_id = FLASH_UNKNOWN;
+	}
+
+	/* Static FLASH Bank configuration here - FIXME XXX */
+
+	size_b0 = flash_get_size((vu_long *)FLASH_BASE0_PRELIM, &flash_info[0]);
+
+	if (flash_info[0].flash_id == FLASH_UNKNOWN) {
+		printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
+			size_b0, size_b0<<20);
+	}
+
+	/* Only one bank */
+	if (CFG_MAX_FLASH_BANKS == 1)
+	  {
+	    /* Setup offsets */
+	    flash_get_offsets (FLASH_BASE0_PRELIM, &flash_info[0]);
+
+	    /* Monitor protection ON by default */
+	    (void)flash_protect(FLAG_PROTECT_SET,
+				FLASH_BASE0_PRELIM,
+				FLASH_BASE0_PRELIM+CFG_MONITOR_LEN-1,
+				&flash_info[0]);
+	    size_b1 = 0 ;
+	    flash_info[0].size = size_b0;
+	  }
+
+	/* 2 banks */
+	else
+	  {
+	    size_b1 = flash_get_size((vu_long *)FLASH_BASE1_PRELIM, &flash_info[1]);
+
+	    /* Re-do sizing to get full correct info */
+
+	    if (size_b1)
+	      {
+		mtdcr(ebccfga, pb0cr);
+		pbcr = mfdcr(ebccfgd);
+		mtdcr(ebccfga, pb0cr);
+		base_b1 = -size_b1;
+		pbcr = (pbcr & 0x0001ffff) | base_b1 | (((size_b1/1024/1024)-1)<<17);
+		mtdcr(ebccfgd, pbcr);
+		/*          printf("pb1cr = %x\n", pbcr); */
+	      }
+
+	    if (size_b0)
+	      {
+		mtdcr(ebccfga, pb1cr);
+		pbcr = mfdcr(ebccfgd);
+		mtdcr(ebccfga, pb1cr);
+		base_b0 = base_b1 - size_b0;
+		pbcr = (pbcr & 0x0001ffff) | base_b0 | (((size_b0/1024/1024)-1)<<17);
+		mtdcr(ebccfgd, pbcr);
+		/*            printf("pb0cr = %x\n", pbcr); */
+	      }
+
+	    size_b0 = flash_get_size((vu_long *)base_b0, &flash_info[0]);
+
+	    flash_get_offsets (base_b0, &flash_info[0]);
+
+	    /* monitor protection ON by default */
+	    (void)flash_protect(FLAG_PROTECT_SET,
+				base_b0+size_b0-CFG_MONITOR_LEN,
+				base_b0+size_b0-1,
+				&flash_info[0]);
+
+	    if (size_b1) {
+	      /* Re-do sizing to get full correct info */
+	      size_b1 = flash_get_size((vu_long *)base_b1, &flash_info[1]);
+
+	      flash_get_offsets (base_b1, &flash_info[1]);
+
+	      /* monitor protection ON by default */
+	      (void)flash_protect(FLAG_PROTECT_SET,
+				  base_b1+size_b1-CFG_MONITOR_LEN,
+				  base_b1+size_b1-1,
+				  &flash_info[1]);
+	      /* monitor protection OFF by default (one is enough) */
+	      (void)flash_protect(FLAG_PROTECT_CLEAR,
+				  base_b0+size_b0-CFG_MONITOR_LEN,
+				  base_b0+size_b0-1,
+				  &flash_info[0]);
+	    } else {
+	      flash_info[1].flash_id = FLASH_UNKNOWN;
+	      flash_info[1].sector_count = -1;
+	    }
+
+	    flash_info[0].size = size_b0;
+	    flash_info[1].size = size_b1;
+	  }/* else 2 banks */
+	return (size_b0 + size_b1);
+}
+
+
+
+/*-----------------------------------------------------------------------
+ */
+static void flash_get_offsets (ulong base, flash_info_t *info)
+{
+	int i;
+
+	/* set up sector start address table */
+        if (((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) ||
+	    (info->flash_id  == FLASH_AM040)){
+	    for (i = 0; i < info->sector_count; i++)
+		info->start[i] = base + (i * 0x00010000);
+        } else {
+	    if (info->flash_id & FLASH_BTYPE) {
+		/* set sector offsets for bottom boot block type	*/
+		info->start[0] = base + 0x00000000;
+		info->start[1] = base + 0x00004000;
+		info->start[2] = base + 0x00006000;
+		info->start[3] = base + 0x00008000;
+		for (i = 4; i < info->sector_count; i++) {
+			info->start[i] = base + (i * 0x00010000) - 0x00030000;
+		}
+	    } else {
+		/* set sector offsets for top boot block type		*/
+		i = info->sector_count - 1;
+		info->start[i--] = base + info->size - 0x00004000;
+		info->start[i--] = base + info->size - 0x00006000;
+		info->start[i--] = base + info->size - 0x00008000;
+		for (; i >= 0; i--) {
+			info->start[i] = base + i * 0x00010000;
+		}
+	    }
+	}
+}
+
+/*-----------------------------------------------------------------------
+ */
+void flash_print_info  (flash_info_t *info)
+{
+	int i;
+        int k;
+        int size;
+        int erased;
+        volatile unsigned long *flash;
+
+	if (info->flash_id == FLASH_UNKNOWN) {
+		printf ("missing or unknown FLASH type\n");
+		return;
+	}
+
+	switch (info->flash_id & FLASH_VENDMASK) {
+	case FLASH_MAN_AMD:	printf ("AMD ");		break;
+	case FLASH_MAN_FUJ:	printf ("FUJITSU ");		break;
+	case FLASH_MAN_SST:	printf ("SST ");		break;
+	default:		printf ("Unknown Vendor ");	break;
+	}
+
+	switch (info->flash_id & FLASH_TYPEMASK) {
+	case FLASH_AM040:	printf ("AM29F040 (512 Kbit, uniform sector size)\n");
+				break;
+	case FLASH_AM400B:	printf ("AM29LV400B (4 Mbit, bottom boot sect)\n");
+				break;
+	case FLASH_AM400T:	printf ("AM29LV400T (4 Mbit, top boot sector)\n");
+				break;
+	case FLASH_AM800B:	printf ("AM29LV800B (8 Mbit, bottom boot sect)\n");
+				break;
+	case FLASH_AM800T:	printf ("AM29LV800T (8 Mbit, top boot sector)\n");
+				break;
+	case FLASH_AM160B:	printf ("AM29LV160B (16 Mbit, bottom boot sect)\n");
+				break;
+	case FLASH_AM160T:	printf ("AM29LV160T (16 Mbit, top boot sector)\n");
+				break;
+	case FLASH_AM320B:	printf ("AM29LV320B (32 Mbit, bottom boot sect)\n");
+				break;
+	case FLASH_AM320T:	printf ("AM29LV320T (32 Mbit, top boot sector)\n");
+				break;
+	case FLASH_SST800A:	printf ("SST39LF/VF800 (8 Mbit, uniform sector size)\n");
+				break;
+	case FLASH_SST160A:	printf ("SST39LF/VF160 (16 Mbit, uniform sector size)\n");
+				break;
+	default:		printf ("Unknown Chip Type\n");
+				break;
+	}
+
+	printf ("  Size: %ld KB in %d Sectors\n",
+		info->size >> 10, info->sector_count);
+
+	printf ("  Sector Start Addresses:");
+	for (i=0; i<info->sector_count; ++i) {
+                /*
+                 * Check if whole sector is erased
+                 */
+                if (i != (info->sector_count-1))
+                  size = info->start[i+1] - info->start[i];
+                else
+                  size = info->start[0] + info->size - info->start[i];
+                erased = 1;
+                flash = (volatile unsigned long *)info->start[i];
+                size = size >> 2;        /* divide by 4 for longword access */
+                for (k=0; k<size; k++)
+                  {
+                    if (*flash++ != 0xffffffff)
+                      {
+                        erased = 0;
+                        break;
+                      }
+                  }
+
+		if ((i % 5) == 0)
+			printf ("\n   ");
+#if 0 /* test-only */
+		printf (" %08lX%s",
+			info->start[i],
+			info->protect[i] ? " (RO)" : "     "
+#else
+		printf (" %08lX%s%s",
+			info->start[i],
+			erased ? " E" : "  ",
+			info->protect[i] ? "RO " : "   "
+#endif
+		);
+	}
+	printf ("\n");
+	return;
+}
+
+/*-----------------------------------------------------------------------
+ */
+
+
+/*-----------------------------------------------------------------------
+ */
+
+/*
+ * The following code cannot be run from FLASH!
+ */
+static ulong flash_get_size (vu_long *addr, flash_info_t *info)
+{
+	short i;
+	FLASH_WORD_SIZE value;
+	ulong base = (ulong)addr;
+        volatile FLASH_WORD_SIZE *addr2 = (FLASH_WORD_SIZE *)addr;
+
+	/* Write auto select command: read Manufacturer ID */
+	addr2[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
+	addr2[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
+	addr2[ADDR0] = (FLASH_WORD_SIZE)0x00900090;
+
+#ifdef CONFIG_ADCIOP
+	value = addr2[2];
+#else
+	value = addr2[0];
+#endif
+
+	switch (value) {
+	case (FLASH_WORD_SIZE)AMD_MANUFACT:
+		info->flash_id = FLASH_MAN_AMD;
+		break;
+	case (FLASH_WORD_SIZE)FUJ_MANUFACT:
+		info->flash_id = FLASH_MAN_FUJ;
+		break;
+	case (FLASH_WORD_SIZE)SST_MANUFACT:
+		info->flash_id = FLASH_MAN_SST;
+		break;
+	default:
+		info->flash_id = FLASH_UNKNOWN;
+		info->sector_count = 0;
+		info->size = 0;
+		return (0);			/* no or unknown flash	*/
+	}
+
+#ifdef CONFIG_ADCIOP
+	value = addr2[0];			/* device ID		*/
+        /*        printf("\ndev_code=%x\n", value); */
+#else
+	value = addr2[1];			/* device ID		*/
+#endif
+
+	switch (value) {
+	case (FLASH_WORD_SIZE)AMD_ID_F040B:
+	        info->flash_id += FLASH_AM040;
+		info->sector_count = 8;
+		info->size = 0x0080000; /* => 512 ko */
+		break;
+	case (FLASH_WORD_SIZE)AMD_ID_LV400T:
+		info->flash_id += FLASH_AM400T;
+		info->sector_count = 11;
+		info->size = 0x00080000;
+		break;				/* => 0.5 MB		*/
+
+	case (FLASH_WORD_SIZE)AMD_ID_LV400B:
+		info->flash_id += FLASH_AM400B;
+		info->sector_count = 11;
+		info->size = 0x00080000;
+		break;				/* => 0.5 MB		*/
+
+	case (FLASH_WORD_SIZE)AMD_ID_LV800T:
+		info->flash_id += FLASH_AM800T;
+		info->sector_count = 19;
+		info->size = 0x00100000;
+		break;				/* => 1 MB		*/
+
+	case (FLASH_WORD_SIZE)AMD_ID_LV800B:
+		info->flash_id += FLASH_AM800B;
+		info->sector_count = 19;
+		info->size = 0x00100000;
+		break;				/* => 1 MB		*/
+
+	case (FLASH_WORD_SIZE)AMD_ID_LV160T:
+		info->flash_id += FLASH_AM160T;
+		info->sector_count = 35;
+		info->size = 0x00200000;
+		break;				/* => 2 MB		*/
+
+	case (FLASH_WORD_SIZE)AMD_ID_LV160B:
+		info->flash_id += FLASH_AM160B;
+		info->sector_count = 35;
+		info->size = 0x00200000;
+		break;				/* => 2 MB		*/
+#if 0	/* enable when device IDs are available */
+	case (FLASH_WORD_SIZE)AMD_ID_LV320T:
+		info->flash_id += FLASH_AM320T;
+		info->sector_count = 67;
+		info->size = 0x00400000;
+		break;				/* => 4 MB		*/
+
+	case (FLASH_WORD_SIZE)AMD_ID_LV320B:
+		info->flash_id += FLASH_AM320B;
+		info->sector_count = 67;
+		info->size = 0x00400000;
+		break;				/* => 4 MB		*/
+#endif
+	case (FLASH_WORD_SIZE)SST_ID_xF800A:
+		info->flash_id += FLASH_SST800A;
+		info->sector_count = 16;
+		info->size = 0x00100000;
+		break;				/* => 1 MB		*/
+
+	case (FLASH_WORD_SIZE)SST_ID_xF160A:
+		info->flash_id += FLASH_SST160A;
+		info->sector_count = 32;
+		info->size = 0x00200000;
+		break;				/* => 2 MB		*/
+
+	default:
+		info->flash_id = FLASH_UNKNOWN;
+		return (0);			/* => no or unknown flash */
+
+	}
+
+	/* set up sector start address table */
+        if (((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) ||
+	    (info->flash_id  == FLASH_AM040)){
+	    for (i = 0; i < info->sector_count; i++)
+		info->start[i] = base + (i * 0x00010000);
+        } else {
+	    if (info->flash_id & FLASH_BTYPE) {
+		/* set sector offsets for bottom boot block type	*/
+		info->start[0] = base + 0x00000000;
+		info->start[1] = base + 0x00004000;
+		info->start[2] = base + 0x00006000;
+		info->start[3] = base + 0x00008000;
+		for (i = 4; i < info->sector_count; i++) {
+			info->start[i] = base + (i * 0x00010000) - 0x00030000;
+		}
+	    } else {
+		/* set sector offsets for top boot block type		*/
+		i = info->sector_count - 1;
+		info->start[i--] = base + info->size - 0x00004000;
+		info->start[i--] = base + info->size - 0x00006000;
+		info->start[i--] = base + info->size - 0x00008000;
+		for (; i >= 0; i--) {
+			info->start[i] = base + i * 0x00010000;
+		}
+	    }
+	}
+
+	/* check for protected sectors */
+	for (i = 0; i < info->sector_count; i++) {
+		/* read sector protection at sector address, (A7 .. A0) = 0x02 */
+		/* D0 = 1 if protected */
+#ifdef CONFIG_ADCIOP
+		addr2 = (volatile FLASH_WORD_SIZE *)(info->start[i]);
+		info->protect[i] = addr2[4] & 1;
+#else
+		addr2 = (volatile FLASH_WORD_SIZE *)(info->start[i]);
+                if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST)
+                  info->protect[i] = 0;
+                else
+                  info->protect[i] = addr2[2] & 1;
+#endif
+	}
+
+	/*
+	 * Prevent writes to uninitialized FLASH.
+	 */
+	if (info->flash_id != FLASH_UNKNOWN) {
+#if 0 /* test-only */
+#ifdef CONFIG_ADCIOP
+		addr2 = (volatile unsigned char *)info->start[0];
+                addr2[ADDR0] = 0xAA;
+                addr2[ADDR1] = 0x55;
+                addr2[ADDR0] = 0xF0;  /* reset bank */
+#else
+		addr2 = (FLASH_WORD_SIZE *)info->start[0];
+		*addr2 = (FLASH_WORD_SIZE)0x00F000F0;	/* reset bank */
+#endif
+#else /* test-only */
+		addr2 = (FLASH_WORD_SIZE *)info->start[0];
+		*addr2 = (FLASH_WORD_SIZE)0x00F000F0;	/* reset bank */
+#endif /* test-only */
+	}
+
+	return (info->size);
+}
+
+int wait_for_DQ7(flash_info_t *info, int sect)
+{
+	ulong start, now, last;
+	volatile FLASH_WORD_SIZE *addr = (FLASH_WORD_SIZE *)(info->start[sect]);
+
+	start = get_timer (0);
+    last  = start;
+    while ((addr[0] & (FLASH_WORD_SIZE)0x00800080) != (FLASH_WORD_SIZE)0x00800080) {
+        if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
+            printf ("Timeout\n");
+            return -1;
+        }
+        /* show that we're waiting */
+        if ((now - last) > 1000) {  /* every second */
+            putc ('.');
+            last = now;
+        }
+    }
+	return 0;
+}
+
+/*-----------------------------------------------------------------------
+ */
+
+int	flash_erase (flash_info_t *info, int s_first, int s_last)
+{
+	volatile FLASH_WORD_SIZE *addr = (FLASH_WORD_SIZE *)(info->start[0]);
+	volatile FLASH_WORD_SIZE *addr2;
+	int flag, prot, sect, l_sect;
+	int i;
+
+	if ((s_first < 0) || (s_first > s_last)) {
+		if (info->flash_id == FLASH_UNKNOWN) {
+			printf ("- missing\n");
+		} else {
+			printf ("- no sectors to erase\n");
+		}
+		return 1;
+	}
+
+	if (info->flash_id == FLASH_UNKNOWN) {
+		printf ("Can't erase unknown flash type - aborted\n");
+		return 1;
+	}
+
+	prot = 0;
+	for (sect=s_first; sect<=s_last; ++sect) {
+		if (info->protect[sect]) {
+			prot++;
+		}
+	}
+
+	if (prot) {
+		printf ("- Warning: %d protected sectors will not be erased!\n",
+			prot);
+	} else {
+		printf ("\n");
+	}
+
+	l_sect = -1;
+
+	/* Disable interrupts which might cause a timeout here */
+	flag = disable_interrupts();
+
+	/* Start erase on unprotected sectors */
+	for (sect = s_first; sect<=s_last; sect++) {
+		if (info->protect[sect] == 0) {	/* not protected */
+		    addr2 = (FLASH_WORD_SIZE *)(info->start[sect]);
+		    printf("Erasing sector %p\n", addr2);	/* CLH */
+
+		    if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) {
+			addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
+			addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
+			addr[ADDR0] = (FLASH_WORD_SIZE)0x00800080;
+			addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
+			addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
+			addr2[0] = (FLASH_WORD_SIZE)0x00500050;  /* block erase */
+			for (i=0; i<50; i++)
+				udelay(1000);  /* wait 1 ms */
+		    } else {
+			addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
+			addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
+			addr[ADDR0] = (FLASH_WORD_SIZE)0x00800080;
+			addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
+			addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
+			addr2[0] = (FLASH_WORD_SIZE)0x00300030;  /* sector erase */
+		    }
+		    l_sect = sect;
+		    /*
+		     * Wait for each sector to complete, it's more
+		     * reliable.  According to AMD Spec, you must
+		     * issue all erase commands within a specified
+		     * timeout.  This has been seen to fail, especially
+		     * if printf()s are included (for debug)!!
+		     */
+		    wait_for_DQ7(info, sect);
+		}
+	}
+
+	/* re-enable interrupts if necessary */
+	if (flag)
+		enable_interrupts();
+
+	/* wait at least 80us - let's wait 1 ms */
+	udelay (1000);
+
+#if 0
+	/*
+	 * We wait for the last triggered sector
+	 */
+	if (l_sect < 0)
+		goto DONE;
+	wait_for_DQ7(info, l_sect);
+
+DONE:
+#endif
+	/* reset to read mode */
+	addr = (FLASH_WORD_SIZE *)info->start[0];
+	addr[0] = (FLASH_WORD_SIZE)0x00F000F0;	/* reset bank */
+
+	printf (" done\n");
+	return 0;
+}
+
+/*-----------------------------------------------------------------------
+ * Copy memory to flash, returns:
+ * 0 - OK
+ * 1 - write timeout
+ * 2 - Flash not erased
+ */
+
+int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
+{
+	ulong cp, wp, data;
+	int i, l, rc;
+
+	wp = (addr & ~3);	/* get lower word aligned address */
+
+	/*
+	 * handle unaligned start bytes
+	 */
+	if ((l = addr - wp) != 0) {
+		data = 0;
+		for (i=0, cp=wp; i<l; ++i, ++cp) {
+			data = (data << 8) | (*(uchar *)cp);
+		}
+		for (; i<4 && cnt>0; ++i) {
+			data = (data << 8) | *src++;
+			--cnt;
+			++cp;
+		}
+		for (; cnt==0 && i<4; ++i, ++cp) {
+			data = (data << 8) | (*(uchar *)cp);
+		}
+
+		if ((rc = write_word(info, wp, data)) != 0) {
+			return (rc);
+		}
+		wp += 4;
+	}
+
+	/*
+	 * handle word aligned part
+	 */
+	while (cnt >= 4) {
+		data = 0;
+		for (i=0; i<4; ++i) {
+			data = (data << 8) | *src++;
+		}
+		if ((rc = write_word(info, wp, data)) != 0) {
+			return (rc);
+		}
+		wp  += 4;
+		cnt -= 4;
+	}
+
+	if (cnt == 0) {
+		return (0);
+	}
+
+	/*
+	 * handle unaligned tail bytes
+	 */
+	data = 0;
+	for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) {
+		data = (data << 8) | *src++;
+		--cnt;
+	}
+	for (; i<4; ++i, ++cp) {
+		data = (data << 8) | (*(uchar *)cp);
+	}
+
+	return (write_word(info, wp, data));
+}
+
+/*-----------------------------------------------------------------------
+ * Write a word to Flash, returns:
+ * 0 - OK
+ * 1 - write timeout
+ * 2 - Flash not erased
+ */
+static int write_word (flash_info_t * info, ulong dest, ulong data)
+{
+	volatile FLASH_WORD_SIZE *addr2 = (FLASH_WORD_SIZE *) (info->start[0]);
+	volatile FLASH_WORD_SIZE *dest2 = (FLASH_WORD_SIZE *) dest;
+	volatile FLASH_WORD_SIZE *data2 = (FLASH_WORD_SIZE *) & data;
+	ulong start;
+	int i;
+
+	/* Check if Flash is (sufficiently) erased */
+	if ((*((volatile FLASH_WORD_SIZE *) dest) &
+	    (FLASH_WORD_SIZE) data) != (FLASH_WORD_SIZE) data) {
+		return (2);
+	}
+
+	for (i = 0; i < 4 / sizeof (FLASH_WORD_SIZE); i++) {
+		int flag;
+
+		/* Disable interrupts which might cause a timeout here */
+		flag = disable_interrupts ();
+
+		addr2[ADDR0] = (FLASH_WORD_SIZE) 0x00AA00AA;
+		addr2[ADDR1] = (FLASH_WORD_SIZE) 0x00550055;
+		addr2[ADDR0] = (FLASH_WORD_SIZE) 0x00A000A0;
+
+		dest2[i] = data2[i];
+
+		/* re-enable interrupts if necessary */
+		if (flag)
+			enable_interrupts ();
+
+		/* data polling for D7 */
+		start = get_timer (0);
+		while ((dest2[i] & (FLASH_WORD_SIZE) 0x00800080) !=
+		       (data2[i] & (FLASH_WORD_SIZE) 0x00800080)) {
+
+			if (get_timer (start) > CFG_FLASH_WRITE_TOUT) {
+				return (1);
+			}
+		}
+	}
+
+	return (0);
+}
+
+/*-----------------------------------------------------------------------
+ */
--- a/board/bubinga405ep/init.S
+++ b/board/bubinga405ep/init.S
@@ -0,0 +1,55 @@
+/*------------------------------------------------------------------------------+ */
+/* */
+/*       This source code has been made available to you by IBM on an AS-IS */
+/*       basis.  Anyone receiving this source is licensed under IBM */
+/*       copyrights to use it in any way he or she deems fit, including */
+/*       copying it, modifying it, compiling it, and redistributing it either */
+/*       with or without modifications.  No license under IBM patents or */
+/*       patent applications is to be implied by the copyright license. */
+/* */
+/*       Any user of this software should understand that IBM cannot provide */
+/*       technical support for this software and will not be responsible for */
+/*       any consequences resulting from the use of this software. */
+/* */
+/*       Any person who transfers this source code or any derivative work */
+/*       must include the IBM copyright notice, this paragraph, and the */
+/*       preceding two paragraphs in the transferred software. */
+/* */
+/*       COPYRIGHT   I B M   CORPORATION 1995 */
+/*       LICENSED MATERIAL  -  PROGRAM PROPERTY OF I B M */
+/*------------------------------------------------------------------------------- */
+
+/*----------------------------------------------------------------------------- */
+/* Function:     ext_bus_cntlr_init */
+/* Description:  Initializes the External Bus Controller for the external */
+/*		peripherals. IMPORTANT: For pass1 this code must run from */
+/*		cache since you can not reliably change a peripheral banks */
+/*		timing register (pbxap) while running code from that bank. */
+/*		For ex., since we are running from ROM on bank 0, we can NOT */
+/*		execute the code that modifies bank 0 timings from ROM, so */
+/*		we run it from cache. */
+/*	Bank 0 - Flash and SRAM */
+/*	Bank 1 - NVRAM/RTC */
+/*	Bank 2 - Keyboard/Mouse controller */
+/*	Bank 3 - IR controller */
+/*	Bank 4 - not used */
+/*	Bank 5 - not used */
+/*	Bank 6 - not used */
+/*	Bank 7 - FPGA registers */
+/*----------------------------------------------------------------------------- */
+#include <ppc4xx.h>
+
+#include <ppc_asm.tmpl>
+#include <ppc_defs.h>
+
+#include <asm/cache.h>
+#include <asm/mmu.h>
+
+
+/*----------------------------------------------------------------------------- */
+/* Function:     sdram_init */
+/* Description:  Dummy implementation here - done in C later */
+/*----------------------------------------------------------------------------- */
+        .globl  sdram_init
+sdram_init:
+        blr
--- a/board/bubinga405ep/u-boot.lds
+++ b/board/bubinga405ep/u-boot.lds
@@ -0,0 +1,144 @@
+/*
+ * (C) Copyright 2000
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_ARCH(powerpc)
+SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
+/* Do we need any of these for elf?
+   __DYNAMIC = 0;    */
+SECTIONS
+{
+  .resetvec 0xFFFFFFFC :
+  {
+    *(.resetvec)
+  } = 0xffff
+
+  /* Read-only sections, merged into text segment: */
+  . = + SIZEOF_HEADERS;
+  .interp : { *(.interp) }
+  .hash          : { *(.hash)		}
+  .dynsym        : { *(.dynsym)		}
+  .dynstr        : { *(.dynstr)		}
+  .rel.text      : { *(.rel.text)		}
+  .rela.text     : { *(.rela.text) 	}
+  .rel.data      : { *(.rel.data)		}
+  .rela.data     : { *(.rela.data) 	}
+  .rel.rodata    : { *(.rel.rodata) 	}
+  .rela.rodata   : { *(.rela.rodata) 	}
+  .rel.got       : { *(.rel.got)		}
+  .rela.got      : { *(.rela.got)		}
+  .rel.ctors     : { *(.rel.ctors)	}
+  .rela.ctors    : { *(.rela.ctors)	}
+  .rel.dtors     : { *(.rel.dtors)	}
+  .rela.dtors    : { *(.rela.dtors)	}
+  .rel.bss       : { *(.rel.bss)		}
+  .rela.bss      : { *(.rela.bss)		}
+  .rel.plt       : { *(.rel.plt)		}
+  .rela.plt      : { *(.rela.plt)		}
+  .init          : { *(.init)	}
+  .plt : { *(.plt) }
+  .text      :
+  {
+    /* WARNING - the following is hand-optimized to fit within	*/
+    /* the sector layout of our flash chips!	XXX FIXME XXX	*/
+
+    cpu/ppc4xx/start.o	(.text)
+    board/bubinga405ep/init.o	(.text)
+    cpu/ppc4xx/kgdb.o	(.text)
+    cpu/ppc4xx/traps.o	(.text)
+    cpu/ppc4xx/interrupts.o	(.text)
+    cpu/ppc4xx/serial.o	(.text)
+    cpu/ppc4xx/cpu_init.o	(.text)
+    cpu/ppc4xx/speed.o	(.text)
+    cpu/ppc4xx/405gp_enet.o	(.text)
+    common/dlmalloc.o	(.text)
+    lib_generic/crc32.o		(.text)
+    lib_ppc/extable.o	(.text)
+    lib_generic/zlib.o		(.text)
+
+/*    . = env_offset;*/
+/*    common/environment.o(.text)*/
+
+    *(.text)
+    *(.fixup)
+    *(.got1)
+  }
+  _etext = .;
+  PROVIDE (etext = .);
+  .rodata    :
+  {
+    *(.rodata)
+    *(.rodata1)
+  }
+  .fini      : { *(.fini)    } =0
+  .ctors     : { *(.ctors)   }
+  .dtors     : { *(.dtors)   }
+
+  /* Read-write section, merged into data segment: */
+  . = (. + 0x00FF) & 0xFFFFFF00;
+  _erotext = .;
+  PROVIDE (erotext = .);
+  .reloc   :
+  {
+    *(.got)
+    _GOT2_TABLE_ = .;
+    *(.got2)
+    _FIXUP_TABLE_ = .;
+    *(.fixup)
+  }
+  __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
+  __fixup_entries = (. - _FIXUP_TABLE_)>>2;
+
+  .data    :
+  {
+    *(.data)
+    *(.data1)
+    *(.sdata)
+    *(.sdata2)
+    *(.dynamic)
+    CONSTRUCTORS
+  }
+  _edata  =  .;
+  PROVIDE (edata = .);
+
+  __start___ex_table = .;
+  __ex_table : { *(__ex_table) }
+  __stop___ex_table = .;
+
+  . = ALIGN(256);
+  __init_begin = .;
+  .text.init : { *(.text.init) }
+  .data.init : { *(.data.init) }
+  . = ALIGN(256);
+  __init_end = .;
+
+  __bss_start = .;
+  .bss       :
+  {
+   *(.sbss) *(.scommon)
+   *(.dynbss)
+   *(.bss)
+   *(COMMON)
+  }
+  _end = . ;
+  PROVIDE (end = .);
+}
--- a/board/bubinga405ep/u-boot.lds.debug
+++ b/board/bubinga405ep/u-boot.lds.debug
@@ -0,0 +1,147 @@
+/*
+ * (C) Copyright 2000
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_ARCH(powerpc)
+SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
+/* Do we need any of these for elf?
+   __DYNAMIC = 0;    */
+SECTIONS
+{
+  /* Read-only sections, merged into text segment: */
+  . = + SIZEOF_HEADERS;
+  .interp : { *(.interp) }
+  .hash          : { *(.hash)		}
+  .dynsym        : { *(.dynsym)		}
+  .dynstr        : { *(.dynstr)		}
+  .rel.text      : { *(.rel.text)		}
+  .rela.text     : { *(.rela.text) 	}
+  .rel.data      : { *(.rel.data)		}
+  .rela.data     : { *(.rela.data) 	}
+  .rel.rodata    : { *(.rel.rodata) 	}
+  .rela.rodata   : { *(.rela.rodata) 	}
+  .rel.got       : { *(.rel.got)		}
+  .rela.got      : { *(.rela.got)		}
+  .rel.ctors     : { *(.rel.ctors)	}
+  .rela.ctors    : { *(.rela.ctors)	}
+  .rel.dtors     : { *(.rel.dtors)	}
+  .rela.dtors    : { *(.rela.dtors)	}
+  .rel.bss       : { *(.rel.bss)		}
+  .rela.bss      : { *(.rela.bss)		}
+  .rel.plt       : { *(.rel.plt)		}
+  .rela.plt      : { *(.rela.plt)		}
+  .init          : { *(.init)	}
+  .plt : { *(.plt) }
+  .text      :
+  {
+    /* WARNING - the following is hand-optimized to fit within	*/
+    /* the sector layout of our flash chips!	XXX FIXME XXX	*/
+
+/*
+    cpu/ppc4xx/start.o	(.text)
+    common/dlmalloc.o	(.text)
+    lib_generic/vsprintf.o	(.text)
+    lib_generic/crc32.o		(.text)
+    lib_ppc/extable.o	(.text)
+*/
+    cpu/ppc4xx/start.o	(.text)
+    board/bubinga405ep/init.o	(.text)
+    cpu/ppc4xx/kgdb.o	(.text)
+    cpu/ppc4xx/traps.o	(.text)
+    cpu/ppc4xx/interrupts.o	(.text)
+    cpu/ppc4xx/serial.o	(.text)
+    cpu/ppc4xx/cpu_init.o	(.text)
+    cpu/ppc4xx/speed.o	(.text)
+    cpu/ppc4xx/405gp_enet.o	(.text)
+    common/dlmalloc.o	(.text)
+    lib_generic/crc32.o		(.text)
+    lib_ppc/extable.o	(.text)
+    lib_generic/zlib.o		(.text)
+
+
+    common/environment.o(.text)
+
+    *(.text)
+    *(.fixup)
+    *(.got1)
+  }
+  _etext = .;
+  PROVIDE (etext = .);
+  .rodata    :
+  {
+    *(.rodata)
+    *(.rodata1)
+  }
+  .fini      : { *(.fini)    } =0
+  .ctors     : { *(.ctors)   }
+  .dtors     : { *(.dtors)   }
+
+  /* Read-write section, merged into data segment: */
+  . = (. + 0x0FFF) & 0xFFFFF000;
+  _erotext = .;
+  PROVIDE (erotext = .);
+  .reloc   :
+  {
+    *(.got)
+    _GOT2_TABLE_ = .;
+    *(.got2)
+    _FIXUP_TABLE_ = .;
+    *(.fixup)
+  }
+  __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
+  __fixup_entries = (. - _FIXUP_TABLE_)>>2;
+
+  .data    :
+  {
+    *(.data)
+    *(.data1)
+    *(.sdata)
+    *(.sdata2)
+    *(.dynamic)
+    CONSTRUCTORS
+  }
+  _edata  =  .;
+  PROVIDE (edata = .);
+
+  __start___ex_table = .;
+  __ex_table : { *(__ex_table) }
+  __stop___ex_table = .;
+
+  . = ALIGN(4096);
+  __init_begin = .;
+  .text.init : { *(.text.init) }
+  .data.init : { *(.data.init) }
+  . = ALIGN(4096);
+  __init_end = .;
+
+  __bss_start = .;
+  .bss       :
+  {
+   *(.sbss) *(.scommon)
+   *(.dynbss)
+   *(.bss)
+   *(COMMON)
+  }
+  _end = . ;
+  PROVIDE (end = .);
+}
+
--- a/board/c2mon/flash.c
+++ b/board/c2mon/flash.c
@@ -91,7 +91,7 @@ unsigned long flash_init (void)
 	/* monitor protection ON by default */
 	flash_protect(FLAG_PROTECT_SET,
 		      CFG_MONITOR_BASE,
-		      CFG_MONITOR_BASE+CFG_MONITOR_LEN-1,
+		      CFG_MONITOR_BASE+monitor_flash_len-1,
 		      &flash_info[0]);
 #endif

@@ -118,7 +118,7 @@ unsigned long flash_init (void)
 		/* monitor protection ON by default */
 		flash_protect(FLAG_PROTECT_SET,
 			      CFG_MONITOR_BASE,
-			      CFG_MONITOR_BASE+CFG_MONITOR_LEN-1,
+			      CFG_MONITOR_BASE+monitor_flash_len-1,
 			      &flash_info[1]);
 #endif

--- a/board/cmi/Makefile
+++ b/board/cmi/Makefile
@@ -0,0 +1,47 @@
+#
+# (C) Copyright 2001	Wolfgang Denk, DENX Software Engineering, wd@denx.de
+#
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB	= lib$(BOARD).a
+
+OBJS	:= flash.o cmi.o
+SOBJS	:=
+
+$(LIB):	$(OBJS)
+	$(AR) crv $@ $^
+
+clean:
+	rm -f $(SOBJS) $(OBJS)
+
+distclean:	clean
+	rm -f $(LIB) core *.bak .depend
+
+#########################################################################
+
+.depend:	Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
+		$(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
+
+-include .depend
+
+#########################################################################
--- a/board/cmi/cmi.c
+++ b/board/cmi/cmi.c
@@ -0,0 +1,73 @@
+/*
+ * (C) Copyright 2003
+ * Martin Winistoerfer, martinwinistoerfer@gmx.ch.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*
+ * File:		cmi.c
+ *
+ * Discription:		For generic board specific functions
+ *
+ */
+
+
+#include <common.h>
+#include <mpc5xx.h>
+
+#define SRAM_SIZE	1024000L	/* 1M RAM available*/
+
+#if defined(__APPLE__)
+/* Leading underscore on symbols */
+#  define SYM_CHAR "_"
+#else /* No leading character on symbols */
+#  define SYM_CHAR
+#endif
+
+/*
+ * Macros to generate global absolutes.
+ */
+#define GEN_SYMNAME(str) SYM_CHAR #str
+#define GEN_VALUE(str) #str
+#define GEN_ABS(name, value) \
+		asm (".globl " GEN_SYMNAME(name)); \
+		asm (GEN_SYMNAME(name) " = " GEN_VALUE(value))
+
+/*
+ * Check the board
+ */
+int checkboard(void)
+{
+    puts ("Board: ### No HW ID - assuming CMI board\n");
+    return (0);
+}
+
+/*
+ * Get RAM size.
+ */
+long int initdram(int board_type)
+{
+	return (SRAM_SIZE);		/* We currently have a static size adapted for cmi board. */
+}
+
+/*
+ * Absolute environment address for linker file.
+ */
+GEN_ABS(env_start, CFG_ENV_OFFSET + CFG_FLASH_BASE);
--- a/board/cmi/config.mk
+++ b/board/cmi/config.mk
@@ -0,0 +1,31 @@
+#
+# (C) Copyright 2003
+# Martin Winistoerfer, martinwinistoerfer@gmx.ch.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+#
+# EPQ Board Configuration
+#
+
+# Boot from flash at location 0x00000000
+TEXT_BASE = 0x02000000
+
+PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)
--- a/board/cmi/flash.c
+++ b/board/cmi/flash.c
@@ -0,0 +1,517 @@
+/*
+ * (C) Copyright 2003
+ * Martin Winistoerfer, martinwinistoerfer@gmx.ch.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*
+ * File:		flash.c
+ *
+ * Discription:		This Driver is for 28F320J3A, 28F640J3A and
+ * 			28F128J3A Intel flashs working in 16 Bit mode.
+ *			They are single bank flashs.
+ *
+ *			Most of this code is taken from existing u-boot
+ *			source code.
+ */
+
+
+#include <common.h>
+#include <mpc5xx.h>
+
+#if defined(CFG_ENV_IS_IN_FLASH)
+# ifndef  CFG_ENV_ADDR
+#  define CFG_ENV_ADDR	(CFG_FLASH_BASE + CFG_ENV_OFFSET)
+# endif
+# ifndef  CFG_ENV_SIZE
+#  define CFG_ENV_SIZE	CFG_ENV_SECT_SIZE
+# endif
+# ifndef  CFG_ENV_SECT_SIZE
+#  define CFG_ENV_SECT_SIZE  CFG_ENV_SIZE
+# endif
+#endif
+
+#define	FLASH_ID_MASK			0xFFFF
+#define FLASH_BLOCK_SIZE		0x00010000
+#define FLASH_CMD_READ_ID		0x0090
+#define FLASH_CMD_RESET			0x00ff
+#define FLASH_CMD_BLOCK_ERASE		0x0020
+#define FLASH_CMD_ERASE_CONFIRM		0x00D0
+#define FLASH_CMD_CLEAR_STATUS		0x0050
+#define FLASH_CMD_SUSPEND_ERASE		0x00B0
+#define FLASH_CMD_WRITE			0x0040
+#define FLASH_CMD_PROTECT		0x0060
+#define FLASH_CMD_PROTECT_SET		0x0001
+#define FLASH_CMD_PROTECT_CLEAR		0x00D0
+#define FLASH_STATUS_DONE		0x0080
+
+flash_info_t	flash_info[CFG_MAX_FLASH_BANKS];
+
+/*
+ * Local function prototypes
+ */
+static ulong 	flash_get_size 		(vu_short *addr, flash_info_t *info);
+static int 	write_short 		(flash_info_t *info, ulong dest, ushort data);
+static void 	flash_get_offsets 	(ulong base, flash_info_t *info);
+
+/*
+ * Initialize flash
+ */
+
+unsigned long flash_init (void)
+{
+	unsigned long size_b0;
+	int i;
+
+	/* Init: no FLASHes known */
+	for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
+		flash_info[i].flash_id = FLASH_UNKNOWN;
+	}
+
+	/* Static FLASH Bank configuration here - FIXME XXX */
+#if 1
+	debug ("\n## Get flash bank 1 size @ 0x%08x\n",FLASH_BASE0_PRELIM);
+#endif
+	size_b0 = flash_get_size((vu_short *)FLASH_BASE0_PRELIM, &flash_info[0]);
+
+	if (flash_info[0].flash_id == FLASH_UNKNOWN) {
+		printf ("## Unknown FLASH on Bank 0: "
+			"ID 0x%lx, Size = 0x%08lx = %ld MB\n",
+			flash_info[0].flash_id,
+			size_b0, size_b0<<20);
+	}
+
+	flash_get_offsets (FLASH_BASE0_PRELIM, &flash_info[0]);
+
+	flash_info[0].size = size_b0;
+
+#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
+	/* monitor protection ON by default */
+	flash_protect(FLAG_PROTECT_SET,
+		      CFG_MONITOR_BASE,
+		      CFG_MONITOR_BASE+monitor_flash_len-1,
+		      &flash_info[0]);
+#endif
+
+#ifdef	CFG_ENV_IS_IN_FLASH
+	/* ENV protection ON by default */
+	flash_protect(FLAG_PROTECT_SET,
+		      CFG_ENV_ADDR,
+		      CFG_ENV_ADDR+CFG_ENV_SECT_SIZE-1,
+		      &flash_info[0]);
+#endif
+
+	return size_b0;
+}
+
+/*
+ * Compute start adress of each sector (block)
+ */
+
+static void flash_get_offsets (ulong base, flash_info_t *info)
+{
+	int i;
+
+	if (info->flash_id == FLASH_UNKNOWN) {
+		return;
+	}
+
+	switch (info->flash_id & FLASH_VENDMASK) {
+	case FLASH_MAN_INTEL:
+	    for (i = 0; i < info->sector_count; i++) {
+		info->start[i] = base + i * FLASH_BLOCK_SIZE;
+	    }
+	    return;
+
+	default:
+	    printf ("Don't know sector offsets for flash type 0x%lx\n",
+		info->flash_id);
+	    return;
+	}
+}
+
+/*
+ * Print flash information
+ */
+void flash_print_info  (flash_info_t *info)
+{
+	int i;
+
+	if (info->flash_id == FLASH_UNKNOWN) {
+		printf ("missing or unknown FLASH type\n");
+		return;
+	}
+
+	switch (info->flash_id & FLASH_VENDMASK) {
+	case FLASH_MAN_AMD:	printf ("AMD ");		break;
+	case FLASH_MAN_FUJ:	printf ("Fujitsu ");		break;
+	case FLASH_MAN_SST:	printf ("SST ");		break;
+	case FLASH_MAN_STM:	printf ("STM ");		break;
+	case FLASH_MAN_INTEL:	printf ("Intel ");		break;
+	case FLASH_MAN_MT:	printf ("MT ");			break;
+	default:		printf ("Unknown Vendor ");	break;
+	}
+
+	switch (info->flash_id & FLASH_TYPEMASK) {
+	case FLASH_28F320J3A:	printf ("28F320J3A (32Mbit) 16-Bit\n");
+				break;
+	case FLASH_28F640J3A:	printf ("28F640J3A (64Mbit) 16-Bit\n");
+				break;
+	case FLASH_28F128J3A:	printf ("28F128J3A (128Mbit) 16-Bit\n");
+				break;
+	default:		printf ("Unknown Chip Type\n");
+				break;
+	}
+
+	if (info->size >= (1 << 20)) {
+		i = 20;
+	} else {
+		i = 10;
+	}
+	printf ("  Size: %ld %cB in %d Sectors\n",
+		info->size >> i,
+		(i == 20) ? 'M' : 'k',
+		info->sector_count);
+
+	printf ("  Sector Start Addresses:");
+	for (i=0; i<info->sector_count; ++i) {
+		if ((i % 5) == 0)
+			printf ("\n   ");
+		printf (" %08lX%s",
+			info->start[i],
+			info->protect[i] ? " (RO)" : "     "
+		);
+	}
+	printf ("\n");
+	return;
+}
+
+/*
+ * Get size of flash in bytes.
+ * The following code cannot be run from FLASH!
+ */
+
+static ulong flash_get_size (vu_short *addr, flash_info_t *info)
+{
+	vu_short value;
+
+	/* Read Manufacturer ID */
+	addr[0] = FLASH_CMD_READ_ID;
+	value = addr[0];
+
+	switch (value) {
+	case (AMD_MANUFACT & FLASH_ID_MASK):
+		info->flash_id = FLASH_MAN_AMD;
+		break;
+	case (FUJ_MANUFACT & FLASH_ID_MASK):
+		info->flash_id = FLASH_MAN_FUJ;
+		break;
+	case (SST_MANUFACT & FLASH_ID_MASK):
+		info->flash_id = FLASH_MAN_SST;
+		break;
+	case (STM_MANUFACT & FLASH_ID_MASK):
+		info->flash_id = FLASH_MAN_STM;
+		break;
+	case (INTEL_MANUFACT & FLASH_ID_MASK):
+		info->flash_id = FLASH_MAN_INTEL;
+		break;
+	default:
+		info->flash_id = FLASH_UNKNOWN;
+		info->sector_count = 0;
+		info->size = 0;
+		addr[0] = FLASH_CMD_RESET;	/* restore read mode */
+		return (0);			/* no or unknown flash	*/
+	}
+
+	value = addr[1];			/* device ID		*/
+
+	switch (value) {
+	case (INTEL_ID_28F320J3A  & FLASH_ID_MASK):
+		info->flash_id += FLASH_28F320J3A;
+		info->sector_count = 32;
+		info->size = 0x00400000;
+		break;				/* =>  32 MBit		*/
+
+	case (INTEL_ID_28F640J3A & FLASH_ID_MASK):
+		info->flash_id += FLASH_28F640J3A;
+		info->sector_count = 64;
+		info->size = 0x00800000;
+		break;				/* => 64 MBit		*/
+
+	case (INTEL_ID_28F128J3A & FLASH_ID_MASK):
+		info->flash_id += FLASH_28F128J3A;
+		info->sector_count = 128;
+		info->size = 0x01000000;
+		break;				/* => 128 MBit		*/
+
+	default:
+		info->flash_id = FLASH_UNKNOWN;
+		addr[0] = FLASH_CMD_RESET;	/* restore read mode */
+		return (0);			/* => no or unknown flash */
+
+	}
+
+	if (info->sector_count > CFG_MAX_FLASH_SECT) {
+		printf ("** ERROR: sector count %d > max (%d) **\n",
+			info->sector_count, CFG_MAX_FLASH_SECT);
+		info->sector_count = CFG_MAX_FLASH_SECT;
+	}
+
+	addr[0] = FLASH_CMD_RESET;		/* restore read mode */
+
+	return (info->size);
+}
+
+
+/*
+ * Erase unprotected sectors
+ */
+
+int flash_erase (flash_info_t *info, int s_first, int s_last)
+{
+	int flag, prot, sect;
+	ulong start, now, last;
+
+	if ((s_first < 0) || (s_first > s_last)) {
+		if (info->flash_id == FLASH_UNKNOWN) {
+			printf ("- missing\n");
+		} else {
+			printf ("- no sectors to erase\n");
+		}
+		return 1;
+	}
+
+	if ((info->flash_id & FLASH_VENDMASK) != FLASH_MAN_INTEL) {
+		printf ("Can erase only Intel flash types - aborted\n");
+		return 1;
+	}
+
+	prot = 0;
+	for (sect=s_first; sect<=s_last; ++sect) {
+		if (info->protect[sect]) {
+			prot++;
+		}
+	}
+
+	if (prot) {
+		printf ("- Warning: %d protected sectors will not be erased!\n",
+			prot);
+	} else {
+		printf ("\n");
+	}
+
+	start = get_timer (0);
+	last  = start;
+
+	/* Start erase on unprotected sectors */
+	for (sect = s_first; sect<=s_last; sect++) {
+		if (info->protect[sect] == 0) {	/* not protected */
+			vu_short *addr = (vu_short *)(info->start[sect]);
+			unsigned long status;
+
+			/* Disable interrupts which might cause a timeout here */
+			flag = disable_interrupts();
+
+#ifdef DEBUG
+			printf("Erase sector %d at start addr 0x%08X", sect, (unsigned int)info->start[sect]);
+#endif
+
+			*addr = FLASH_CMD_CLEAR_STATUS;
+			*addr = FLASH_CMD_BLOCK_ERASE;
+			*addr = FLASH_CMD_ERASE_CONFIRM;
+
+			/* re-enable interrupts if necessary */
+			if (flag)
+				enable_interrupts();
+
+			/* wait at least 80us - let's wait 1 ms */
+			udelay (1000);
+
+			while (((status = *addr) & FLASH_STATUS_DONE) != FLASH_STATUS_DONE) {
+				if ((now=get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
+					printf("Flash erase timeout at address %lx\n", info->start[sect]);
+					*addr = FLASH_CMD_SUSPEND_ERASE;
+					*addr = FLASH_CMD_RESET;
+					return 1;
+				}
+
+				/* show that we're waiting */
+				if ((now - last) > 1000) {	/* every second */
+					putc ('.');
+					last = now;
+				}
+			}
+			*addr = FLASH_CMD_RESET;
+		}
+	}
+	printf (" done\n");
+	return 0;
+}
+
+/*
+ * Copy memory to flash, returns:
+ * 0 - OK
+ * 1 - write timeout
+ * 2 - Flash not erased
+ * 4 - Flash not identified
+ */
+
+int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
+{
+	ulong cp, wp;
+	ushort data;
+	int i, rc;
+
+	if (info->flash_id == FLASH_UNKNOWN) {
+		return 4;
+	}
+
+	wp = (addr & ~1);	/* get lower word aligned address */
+
+	/*
+	 * handle unaligned start byte
+	 */
+
+	if (addr - wp) {
+		data = 0;
+		data = (data << 8) | *src++;
+		--cnt;
+		if ((rc = write_short(info, wp, data)) != 0) {
+			return (rc);
+		}
+		wp += 2;
+	}
+
+	/*
+	 * handle word aligned part
+	 */
+
+	while (cnt >= 2) {
+		data = 0;
+		for (i=0; i<2; ++i) {
+			data = (data << 8) | *src++;
+		}
+
+		if ((rc = write_short(info, wp, data)) != 0) {
+			return (rc);
+		}
+		wp  += 2;
+		cnt -= 2;
+	}
+
+	if (cnt == 0) {
+		return (0);
+	}
+
+	/*
+	 * handle unaligned tail bytes
+	 */
+
+	data = 0;
+	for (i=0, cp=wp; i<2 && cnt>0; ++i, ++cp) {
+		data = (data << 8) | *src++;
+		--cnt;
+	}
+	for (; i<2; ++i, ++cp) {
+		data = (data << 8) | (*(uchar *)cp);
+	}
+
+	return (write_short(info, wp, data));
+
+}
+
+/*
+ * Write 16 bit (short) to flash
+ */
+
+static int write_short (flash_info_t *info, ulong dest, ushort data)
+{
+	vu_short *addr = (vu_short*)(info->start[0]);
+	ulong start;
+	int flag;
+
+	/* Check if Flash is (sufficiently) erased */
+	if ((*((vu_short *)dest) & data) != data) {
+		return (2);
+	}
+
+	/* Disable interrupts which might cause a timeout here */
+	flag = disable_interrupts();
+
+	if (!(info->flash_id & FLASH_VENDMASK)) {
+		return 4;
+	}
+        *addr = FLASH_CMD_ERASE_CONFIRM;
+	*addr = FLASH_CMD_WRITE;
+
+	*((vu_short *)dest) = data;
+
+	/* re-enable interrupts if necessary */
+	if (flag) {
+		enable_interrupts();
+	}
+
+	/* data polling for D7 */
+	start = get_timer (0);
+
+	/* wait for error or finish */
+	while(!(addr[0] & FLASH_STATUS_DONE)){
+		if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
+		  	addr[0] = FLASH_CMD_RESET;
+			return (1);
+		}
+	}
+
+	*addr = FLASH_CMD_RESET;
+	return (0);
+}
+
+/*
+ * Protects a flash sector
+ */
+
+int flash_real_protect(flash_info_t *info, long sector, int prot)
+{
+	vu_short *addr = (vu_short*)(info->start[sector]);
+	ulong start;
+
+	*addr = FLASH_CMD_CLEAR_STATUS;
+	*addr = FLASH_CMD_PROTECT;
+
+	if(prot) {
+		*addr = FLASH_CMD_PROTECT_SET;
+	} else {
+		*addr = FLASH_CMD_PROTECT_CLEAR;
+	}
+
+	/* wait for error or finish */
+	start = get_timer (0);
+	while(!(addr[0] & FLASH_STATUS_DONE)){
+		if (get_timer(start) > CFG_FLASH_ERASE_TOUT) {
+		  	printf("Flash protect timeout at address %lx\n",  info->start[sector]);
+			addr[0] = FLASH_CMD_RESET;
+			return (1);
+		}
+	}
+	/* Set software protect flag */
+	info->protect[sector] = prot;
+	*addr = FLASH_CMD_RESET;
+	return (0);
+}
--- a/board/svm_sc8xx/ppcboot.lds.debug
+++ b/board/svm_sc8xx/ppcboot.lds.debug
@@ -1,6 +1,6 @@
 /*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ * (C) Copyright 2001	Wolfgang Denk, DENX Software Engineering, wd@denx.de
+ * (C) Copyright 2003	Martin Winistoerfer, martinwinistoerfer@gmx.ch
 *
 * See file CREDITS for list of people who contributed to this
 * project.
@@ -56,13 +56,7 @@ SECTIONS
    /* WARNING - the following is hand-optimized to fit within	*/
    /* the sector layout of our flash chips!	XXX FIXME XXX	*/

-    cpu/mpc8xx/start.o	(.text)
-    common/dlmalloc.o	(.text)
-    ppc/vsprintf.o	(.text)
-    ppc/crc32.o		(.text)
-
-    . = env_offset;
-    common/environment.o(.text)
+    cpu/mpc5xx/start.o	(.text)

    *(.text)
    *(.fixup)
@@ -80,7 +74,7 @@ SECTIONS
  .dtors     : { *(.dtors)   }

  /* Read-write section, merged into data segment: */
-  . = (. + 0x0FFF) & 0xFFFFF000;
+  . = (. + 0x00FF) & 0xFFFFFF00;
  _erotext = .;
  PROVIDE (erotext = .);
  .reloc   :
@@ -110,11 +104,11 @@ SECTIONS
  __ex_table : { *(__ex_table) }
  __stop___ex_table = .;

-  . = ALIGN(4096);
+  . = ALIGN(256);
  __init_begin = .;
  .text.init : { *(.text.init) }
  .data.init : { *(.data.init) }
-  . = ALIGN(4096);
+  . = ALIGN(256);
  __init_end = .;

  __bss_start = .;
@@ -125,7 +119,13 @@ SECTIONS
   *(.bss)
   *(COMMON)
  }
+
  _end = . ;
  PROVIDE (end = .);
-}
+    . = env_start;
+	.ppcenv	:
+	{
+		common/environment.o (.ppcenv)
+	}

+}
--- a/board/cogent/flash.c
+++ b/board/cogent/flash.c
@@ -323,7 +323,7 @@ flash_init(void)
 #if CFG_MONITOR_BASE == CFG_FLASH_BASE
 	flash_protect(FLAG_PROTECT_SET,
 		      CFG_MONITOR_BASE,
-		      CFG_MONITOR_BASE+CFG_MONITOR_LEN-1,
+		      CFG_MONITOR_BASE+monitor_flash_len-1,
 		      &flash_info[0]);
 #endif

--- a/board/cpc45/flash.c
+++ b/board/cpc45/flash.c
@@ -132,12 +132,12 @@ unsigned long flash_init(void)
 #if CFG_MONITOR_BASE >= CFG_FLASH_BASE + FLASH_BANK_SIZE
    flash_protect(FLAG_PROTECT_SET,
              CFG_MONITOR_BASE,
-              CFG_MONITOR_BASE + CFG_MONITOR_LEN - 1,
+              CFG_MONITOR_BASE + monitor_flash_len - 1,
              &flash_info[1]);
 #else
    flash_protect(FLAG_PROTECT_SET,
              CFG_MONITOR_BASE,
-              CFG_MONITOR_BASE + CFG_MONITOR_LEN - 1,
+              CFG_MONITOR_BASE + monitor_flash_len - 1,
              &flash_info[0]);
 #endif
 #endif
--- a/board/cpu86/flash.c
+++ b/board/cpu86/flash.c
@@ -218,14 +218,14 @@ unsigned long flash_init (void)

 		flash_protect  (FLAG_PROTECT_SET,
 				CFG_MONITOR_BASE,
-				CFG_MONITOR_BASE + CFG_MONITOR_LEN - 1, &flash_info[1]
+				CFG_MONITOR_BASE + monitor_flash_len - 1, &flash_info[1]
 		);
 	}
 #else
 #if CFG_MONITOR_BASE >= CFG_FLASH_BASE
 	flash_protect (FLAG_PROTECT_SET,
 		       CFG_MONITOR_BASE,
-		       CFG_MONITOR_BASE + CFG_MONITOR_LEN - 1, &flash_info[0]
+		       CFG_MONITOR_BASE + monitor_flash_len - 1, &flash_info[0]
 	);
 #endif
 #endif
--- a/board/cradle/flash.c
+++ b/board/cradle/flash.c
@@ -73,7 +73,7 @@ ulong flash_init(void)
    */
   flash_protect(FLAG_PROTECT_SET,
                  CFG_FLASH_BASE,
-                  CFG_FLASH_BASE + _armboot_end_data - _armboot_start,
+                  CFG_FLASH_BASE + monitor_flash_len - 1,
                  &flash_info[0]);

   flash_protect(FLAG_PROTECT_SET,
--- a/board/cradle/u-boot.lds
+++ b/board/cradle/u-boot.lds
@@ -31,7 +31,7 @@ SECTIONS
        . = ALIGN(4);
 	.text      :
 	{
-	  cpu/xscale/start.o	(.text)
+	  cpu/pxa/start.o	(.text)
 	  *(.text)
 	}

--- a/board/cray/L1/L1.c
+++ b/board/cray/L1/L1.c
@@ -27,7 +27,9 @@
 #include <command.h>
 #include <cmd_nvedit.h>
 #include <cmd_bootm.h>
+#include <cmd_boot.h>
 #include <rtc.h>
+#include <post.h>
 #include <net.h>
 #include <malloc.h>

@@ -53,17 +55,19 @@
 * space.
 * on the server this looks like:
 *
- * option space U-Boot;
- * option U-Boot.initrd    code 3 = string;
- * option U-Boot.bootcmd   code 4 = string;
- * option U-Boot.bootflags code 5 = string;
- * option U-Boot.rootdev   code 6 = string;
+ * option space CRAYL1;
+ * option CRAYL1.initrd     code 3 = string;
+ * ..etc...
 */
 #define DHCP_VENDOR_SPECX   43
 #define DHCP_VX_INITRD       3
 #define DHCP_VX_BOOTCMD      4
-#define DHCP_VX_BOOTFLAGS    5
+#define DHCP_VX_BOOTARGS     5
 #define DHCP_VX_ROOTDEV      6
+#define DHCP_VX_FROMFLASH    7
+#define DHCP_VX_BOOTSCRIPT   8
+#define DHCP_VX_RCFILE	     9
+#define DHCP_VX_MAGIC        10

 /* Things DHCP server can tellme about.  If there's no flash address, then
 * they dont participate in 'update' to flash, and we force their values
@@ -89,18 +93,29 @@ static dhcp_item_t Things[] = {
 /* and the other way.. */
 	{DHCP_VENDOR_SPECX, DHCP_VX_INITRD, NULL, "initrd"},
 	{DHCP_VENDOR_SPECX, DHCP_VX_BOOTCMD, NULL, "bootcmd"},
-	{DHCP_VENDOR_SPECX, DHCP_VX_BOOTFLAGS, NULL, NULL},
+	{DHCP_VENDOR_SPECX, DHCP_VX_FROMFLASH, NULL, "fromflash"},
+	{DHCP_VENDOR_SPECX, DHCP_VX_BOOTSCRIPT, NULL, "bootscript"},
+	{DHCP_VENDOR_SPECX, DHCP_VX_RCFILE, NULL, "rcfile"},
+	{DHCP_VENDOR_SPECX, DHCP_VX_BOOTARGS, NULL, "xbootargs"},
 	{DHCP_VENDOR_SPECX, DHCP_VX_ROOTDEV, NULL, NULL},
+	{DHCP_VENDOR_SPECX, DHCP_VX_MAGIC, NULL, NULL}
 };

 #define N_THINGS ((sizeof(Things))/(sizeof(dhcp_item_t)))

-static void init_ecc_sdram (void);
+extern char bootscript[];
+
+/* Here is the boot logic as HUSH script. Overridden by any TFP provided
+ * bootscript file.
+ */
+
+static void init_sdram (void);

 /* ------------------------------------------------------------------------- */
 int board_pre_init (void)
 {
-	init_ecc_sdram ();
+	/* Running from ROM: global data is still READONLY */
+	init_sdram ();
 	mtdcr (uicsr, 0xFFFFFFFF);	/* clear all ints */
 	mtdcr (uicer, 0x00000000);	/* disable all ints */
 	mtdcr (uiccr, 0x00000020);	/* set all but FPGA SMI to be non-critical */
@@ -116,6 +131,7 @@ int checkboard (void)
 {
 	return (0);
 }
+/* ------------------------------------------------------------------------- */

 /* ------------------------------------------------------------------------- */
 int misc_init_r (void)
@@ -124,6 +140,7 @@ int misc_init_r (void)
 	image_header_t *hdr;
 	time_t timestamp;
 	struct rtc_time tm;
+	char bootcmd[32];

 	hdr = (image_header_t *) (CFG_MONITOR_BASE - sizeof (image_header_t));
 	timestamp = (time_t) hdr->ih_time;
@@ -143,6 +160,8 @@ int misc_init_r (void)
 			setenv ("ethaddr", e);
 		}
 	}
+	sprintf (bootcmd,"autoscript %X",(unsigned)bootscript);
+	setenv ("bootcmd", bootcmd);
 	return (0);
 }

@@ -168,11 +187,11 @@ void rtc_reset (void)
 }

 /* ------------------------------------------------------------------------- */
-/*  Do sdram bank init in C so I can read it..
+/*  Do sdram bank init in C so I can read it..no console to print to yet!
 */
-static void init_ecc_sdram (void)
+static void init_sdram (void)
 {
-	unsigned long tmp, *p;
+ unsigned long tmp;

 	/* write SDRAM bank 0 register */
 	mtdcr (memcfga, mem_mb0cf);
@@ -202,33 +221,78 @@ static void init_ecc_sdram (void)
 	mtdcr (memcfgd, 0x90800000);
 	udelay (200);

-/* disable ECC on all banks */
+/* initially, disable ECC on all banks */
+	udelay (200);
 	mtdcr (memcfga, mem_ecccf);
 	tmp = mfdcr (memcfgd);
 	tmp &= 0xff0fffff;
 	mtdcr (memcfga, mem_ecccf);
 	mtdcr (memcfgd, tmp);

-/* set up SDRAM Controller with ECC enabled */
+	return;
+}
+
+extern int memory_post_test (int flags);
+
+int testdram (void)
+{
+ unsigned long tmp;
+	uint *pstart = (uint *) 0x00000000;
+	uint *pend = (uint *) L1_MEMSIZE;
+	uint *p;
+
+	if (getenv_r("booted",NULL,0) <= 0)
+	{
+		printf ("testdram..");
+	/*AA*/
+		for (p = pstart; p < pend; p++)
+			*p = 0xaaaaaaaa;
+		for (p = pstart; p < pend; p++) {
+			if (*p != 0xaaaaaaaa) {
+				printf ("SDRAM test fails at: %08x, was %08x expected %08x\n", 
+						(uint) p, *p, 0xaaaaaaaa);
+				return 1;
+			}
+		}
+	/*55*/
+		for (p = pstart; p < pend; p++)
+			*p = 0x55555555;
+		for (p = pstart; p < pend; p++) {
+			if (*p != 0x55555555) {
+				printf ("SDRAM test fails at: %08x, was %08x expected %08x\n", 
+						(uint) p, *p, 0x55555555);
+				return 1;
+			}
+		}
+	/*addr*/
+		for (p = pstart; p < pend; p++)
+			*p = (unsigned)p;
+		for (p = pstart; p < pend; p++) {
+			if (*p != (unsigned)p) {
+				printf ("SDRAM test fails at: %08x, was %08x expected %08x\n", 
+						(uint) p, *p, (uint)p);
+				return 1;
+			}
+		}
+		printf ("Success. ");
+	}
+	printf ("Enable ECC..");
+
 	mtdcr (memcfga, mem_mcopt1);
 	tmp = (mfdcr (memcfgd) & ~0xFFE00000) | 0x90800000;
 	mtdcr (memcfga, mem_mcopt1);
 	mtdcr (memcfgd, tmp);
 	udelay (600);
-
-/* fill all the memory */
-	for (p = (unsigned long) 0; ((unsigned long) p < L1_MEMSIZE);
-		 *p++ = 0L);
+	for (p = (unsigned long) 0; ((unsigned long) p < L1_MEMSIZE); *p++ = 0L)
+		;
 	udelay (400);
 	mtdcr (memcfga, mem_ecccf);
 	tmp = mfdcr (memcfgd);
-
-/* enable ECC on bank 0 */
 	tmp |= 0x00800000;
 	mtdcr (memcfgd, tmp);
 	udelay (400);
-
-	return;
+	printf ("enabled.\n");
+	return (0);
 }

 /* ------------------------------------------------------------------------- */
@@ -250,7 +314,9 @@ static u8 *dhcp_env_update (u8 thing, u8 * pop)

 /* set env. */
 	if (Things[thing].envname)
+	{
 		setenv (Things[thing].envname, Things[thing].dhcpvalue);
+	}
 	return (Things[thing].dhcpvalue);
 }

@@ -285,9 +351,9 @@ u8 *dhcp_vendorex_proc (u8 * pop)
 		     oplen -= sub_oplen, sub_op += (sub_oplen + 2)) {
 			for (thing = 0; thing < N_THINGS; thing++) {
 			    if (*sub_op == Things[thing].dhcp_vendor_option) {
-				if (!(retval = dhcp_env_update (thing, sub_op))) {
-					return NULL;
-				}
+					if (!(retval = dhcp_env_update (thing, sub_op))) {
+						return NULL;
+					}
 			    }
 			}
 		}
@@ -298,5 +364,5 @@ u8 *dhcp_vendorex_proc (u8 * pop)
 					return NULL;
 		}
 	}
-	return (thing >= N_THINGS ? NULL : pop);
+	return (pop);
 }
--- a/board/cray/L1/Makefile
+++ b/board/cray/L1/Makefile
@@ -26,17 +26,27 @@ include $(TOPDIR)/config.mk
 LIB	= lib$(BOARD).a

 OBJS	= $(BOARD).o flash.o
-SOBJS	= init.o
+SOBJS	= init.o 

-$(LIB):	$(OBJS) $(SOBJS)
+# HACK: depend needs bootscript.c, which needs tools/mkimage, which is not
+# built in the depend stage.  So... put bootscript.o here, not in OBJS
+$(LIB):	$(OBJS) $(SOBJS) bootscript.o
 	$(AR) crv $@ $^

 clean:
-	rm -f $(SOBJS) $(OBJS)
+	rm -f $(SOBJS) $(OBJS) bootscript.c bootscript.image bootscript.o

 distclean:	clean
 	rm -f $(LIB) core *.bak .depend

+$(BOARD).o : $(BOARD).c bootscript.o
+
+bootscript.c: bootscript.image
+	od -t x1 -v -A x $^ | awk -f x2c.awk > $@
+
+bootscript.image: bootscript.hush Makefile
+	-$(TOPDIR)/tools/mkimage -A ppc -O linux -T script -C none -a 0 -e 0 -n bootscript -d  bootscript.hush $@
+
 #########################################################################

 .depend:	Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
--- a/board/cray/L1/bootscript.hush
+++ b/board/cray/L1/bootscript.hush
@@ -0,0 +1,117 @@
+# $Header$
+# hush bootscript for PPCBOOT on L1
+# note: all #s are in hex, do _NOT_ prefix it with 0x
+
+flash_rfs=ffc00000
+flash_krl=fff00000
+tftp_addr=100000
+tftp2_addr=1000000
+
+if printenv booted
+then
+	echo already booted before
+else
+	echo first boot in environment, create and save settings
+	setenv booted OK
+	saveenv
+fi
+
+setenv autoload no
+# clear out stale env stuff, so we get fresh from dhcp.
+for setting in initrd fromflash kernel rootfs rootpath
+do
+setenv $setting
+done
+
+dhcp
+
+# if host provides us with a different bootscript, us it.
+if printenv bootscript
+	then
+	tftp $tftp_addr $bootcript
+	if imi $tftp_addr
+	then
+		autoscript $tftp_addr
+	fi
+fi
+
+# default base kernel arguments.
+setenv bootargs $xbootargs devfs=mount ip=$ipaddr:$serverip:$gatewayip:$netmask:L1:eth0:off wdt=120
+
+# Have a kernel in flash?
+if imi $flash_krl
+then
+	echo ok kernel to boot from $flash_krl
+	setenv kernel $flash_krl
+else
+	echo no kernel to boot from $flash_krl, need tftp
+fi
+
+# Have a rootfs in flash? 
+echo test for SQUASHfs at $flash_rfs
+
+if imi $flash_rfs
+then
+	echo appears to be a good initrd image at base of flash OK
+	setenv rootfs $flash_rfs
+else
+	echo no image at base of flash, need nfsroot or initrd
+fi
+
+# I boot from flash if told to and I can.
+if printenv fromflash && printenv kernel && printenv rootfs
+then
+	echo booting entirely from flash
+	setenv bootargs root=/dev/ram0 rw $bootargs
+	bootm $kernel $rootfs
+	echo oh no failed so I try some other stuff
+fi
+
+# TFTP down a kernel
+if printenv bootfile
+then 
+	tftp $tftp_addr $bootfile
+	setenv kernel $tftp_addr
+	echo I will boot the TFTP kernel
+else
+	if printenv kernel
+	then
+		echo no bootfile specified, will use one from flash
+	else
+		setenv bootfile /opt/crayx1/craymcu/l1/flash/linux.image
+		echo OH NO! we have no bootfile,nor flash kernel! try default: $bootfile
+		tftp $tftp_addr $bootfile
+		setenv kernel $tftp_addr
+	fi
+fi
+
+# the rootfs.
+if printenv rootpath
+then
+	echo rootpath is $rootpath
+	if printenv initrd
+	then 
+		echo initrd is also specified, so use $initrd
+		tftp $tftp2_addr $initrd
+		setenv bootargs root=/dev/ram0 rw cwsroot=$serverip:$rootpath $bootargs
+		bootm $kernel $tftp2_addr
+	else
+		echo initrd is not specified, so use NFSROOT $rootpat
+		setenv bootargs root=/dev/nfs ro nfsroot=$serverip:$rootpath $bootargs
+		bootm $kernel
+	fi
+else
+	echo we have no rootpath check for one in flash
+	if printenv rootfs
+	then
+		echo I will use the one in flash
+		setenv bootargs root=/dev/mtdblock/0 ro rootfstype=squashfs $bootargs
+		bootm $kernel
+	else
+		setenv rootpath /export/crayl1
+		echo OH NO! we have no rootpath,nor flash kernel! try default: $rootpath
+		setenv bootargs root=/dev/mtdblock/0 ro rootfstype=squashfs $bootargs
+		bootm $kernel
+	fi
+fi
+reset
--- a/board/cray/L1/flash.c
+++ b/board/cray/L1/flash.c
@@ -88,7 +88,7 @@ unsigned long flash_init (void)
 	    /* Monitor protection ON by default */
 	    (void)flash_protect(FLAG_PROTECT_SET,
 				FLASH_BASE0_PRELIM,
-				FLASH_BASE0_PRELIM+CFG_MONITOR_LEN-1,
+				FLASH_BASE0_PRELIM+monitor_flash_len-1,
 				&flash_info[0]);
 #endif
 	    size_b1 = 0 ;
--- a/board/cray/L1/patchme
+++ b/board/cray/L1/patchme
@@ -0,0 +1,30 @@
+# master confi.mk
+echo "CROSS_COMPILE = powerpc-linux-"	>>include/config.mk
+
+# patch the examples/Makefile to ignore return value from OBJCOPY
+sed  -e 's/$(OBJCOPY)/-&/' < examples/Makefile > examples/makefile
+
+# add a built target for mkimage on the target architecture
+sed  -e 's/^all:.*$/all: .depend envcrc mkimage mkimage.ppc/' < tools/Makefile > tools/makefile
+
+cat <<EOF >>tools/makefile
+mkimage.ppc : mkimage.o.ppc crc32.o.ppc
+	powerpc-linux-gcc -msoft-float -Wall -Wstrict-prototypes -o \$@ \$^
+	powerpc-linux-strip $@
+
+XFLAGS="-D__KERNEL__  -I../include -DCONFIG_4xx -Wall -Wstict-prototypes"
+mkimage.o.ppc: mkimage.c
+	powerpc-linux-gcc -msoft-float -Wall -I../include -c -o \$@ \$^
+
+crc32.o.ppc: crc32.c
+	powerpc-linux-gcc -msoft-float -Wall -I../include -c -o \$@ \$^
+
+EOF
+
+# make an image by default out of the u-boot image
+sed  -e 's/^all:.*$/all: u-boot.image /' < Makefile > makefile
+cat <<EOF >>makefile
+u-boot.image:  u-boot.bin
+	tools/mkimage -A ppc -O linux -T firmware -C none -a 0 -e 0 -n U-Boot -d \$^ \$@
+
+EOF
--- a/board/cray/L1/x2c.awk
+++ b/board/cray/L1/x2c.awk
@@ -0,0 +1,6 @@
+#!/bin/awk
+BEGIN { print "unsigned char bootscript[] = { \n"}
+{ for (i = 2; i <= NF ; i++ ) printf "0x"$i","
+  print ""
+}
+END { print "\n};\n" }
--- a/board/csb226/flash.c
+++ b/board/csb226/flash.c
@@ -74,7 +74,7 @@ ulong flash_init(void)
 	/* Protect monitor and environment sectors */
 	flash_protect(FLAG_PROTECT_SET,
 			CFG_FLASH_BASE,
-			CFG_FLASH_BASE + _armboot_end_data - _armboot_start,
+			CFG_FLASH_BASE + monitor_flash_len - 1,
 			&flash_info[0]);

 	flash_protect(FLAG_PROTECT_SET,
--- a/board/csb226/memsetup.S
+++ b/board/csb226/memsetup.S
@@ -38,6 +38,9 @@ DRAM_SIZE:  .long   CFG_DRAM_SIZE
   sub  pc,pc,#4
   .endm

+_TEXT_BASE:
+	.word	TEXT_BASE
+

 /*
 * 	Memory setup
@@ -222,24 +225,29 @@ mem_init:
        /* Step 2c: Write FLYCNFG  FIXME: what's that???                    */
        /* ---------------------------------------------------------------- */

+        /* test if we run from flash or RAM - RAM/BDI: don't setup RAM      */
+	adr	r3, mem_init		/* r0 <- current position of code   */
+	ldr	r2, =mem_init
+	cmp	r3, r2			/* skip init if in place            */
+	beq	initirqs
+

 	/* ---------------------------------------------------------------- */
        /* Step 2d: Initialize Timing for Sync Memory (SDCLK0)              */
        /* ---------------------------------------------------------------- */

 	/* Before accessing MDREFR we need a valid DRI field, so we set     */
-	/* this to power on defaults + DIR field.                           */
+	/* this to power on defaults + DRI field.                           */
+
+	ldr 	r3, 	=CFG_MDREFR_VAL
+	ldr	r2,	=0xFFF
+	and	r3,	r3, r2
+	ldr	r4,	=0x03ca4000
+	orr	r4,	r4,  r3

-	ldr	r4,	=0x03ca4fff
 	str	r4,	[r1, #MDREFR_OFFSET]	/* write back MDREFR        */
        ldr     r4,	[r1, #MDREFR_OFFSET]

-	ldr	r4,	=0x03ca4030
-	str	r4,	[r1, #MDREFR_OFFSET]	/* write back MDREFR        */
-	ldr	r4,	[r1, #MDREFR_OFFSET]
-
-        /* Note: preserve the mdrefr value in r4                            */
-

 	/* ---------------------------------------------------------------- */
 	/* Step 3: Initialize Synchronous Static Memory (Flash/Peripherals) */
@@ -258,18 +266,16 @@ mem_init:
        /* Step 4: Initialize SDRAM                                         */
        /* ---------------------------------------------------------------- */

-	/* Step 4a: assert MDREFR:K1RUN and MDREFR:K2RUN and configure      */
+	/* Step 4a: assert MDREFR:K?RUN and configure                       */
 	/*          MDREFR:K1DB2 and MDREFR:K2DB2 as desired.               */

-	orr	r4,	r4,	#(MDREFR_K1RUN|MDREFR_K0RUN)
-
-	str     r4,     [r1, #MDREFR_OFFSET]    /* write back MDREFR        */
-	ldr     r4,     [r1, #MDREFR_OFFSET]
-
+	ldr	r4,	=CFG_MDREFR_VAL
+	str	r4,	[r1, #MDREFR_OFFSET]	/* write back MDREFR        */
+	ldr	r4,	[r1, #MDREFR_OFFSET]

 	/* Step 4b: de-assert MDREFR:SLFRSH.                                */

-	bic	r4,	r4,	#(MDREFR_SLFRSH)
+	bic	r4,	r4, #(MDREFR_SLFRSH)

        str     r4,     [r1, #MDREFR_OFFSET]    /* write back MDREFR        */
        ldr     r4,     [r1, #MDREFR_OFFSET]
--- a/board/csb226/u-boot.lds
+++ b/board/csb226/u-boot.lds
@@ -31,7 +31,7 @@ SECTIONS
        . = ALIGN(4);
 	.text      :
 	{
-	  cpu/xscale/start.o	(.text)
+	  cpu/pxa/start.o	(.text)
 	  *(.text)
 	}

--- a/board/cu824/flash.c
+++ b/board/cu824/flash.c
@@ -125,12 +125,12 @@ unsigned long flash_init(void)
 #if CFG_MONITOR_BASE >= CFG_FLASH_BASE + FLASH_BANK_SIZE
    flash_protect(FLAG_PROTECT_SET,
              CFG_MONITOR_BASE,
-              CFG_MONITOR_BASE + CFG_MONITOR_LEN - 1,
+              CFG_MONITOR_BASE + monitor_flash_len - 1,
              &flash_info[1]);
 #else
    flash_protect(FLAG_PROTECT_SET,
              CFG_MONITOR_BASE,
-              CFG_MONITOR_BASE + CFG_MONITOR_LEN - 1,
+              CFG_MONITOR_BASE + monitor_flash_len - 1,
              &flash_info[0]);
 #endif
 #endif
--- a/board/dnp1110/flash.c
+++ b/board/dnp1110/flash.c
@@ -84,7 +84,7 @@ unsigned long flash_init (void)
     */
    flash_protect(FLAG_PROTECT_SET,
 		  CFG_FLASH_BASE,
-		  CFG_FLASH_BASE + _armboot_end_data - _armboot_start,
+		  CFG_FLASH_BASE + monitor_flash_len  - 1,
 		  &flash_info[0]);

    flash_protect(FLAG_PROTECT_SET,
--- a/board/eltec/bab7xx/flash.c
+++ b/board/eltec/bab7xx/flash.c
@@ -83,21 +83,21 @@ unsigned long flash_init (void)
    {
        (void)flash_protect(FLAG_PROTECT_SET,
                FLASH_BASE0_PRELIM,
-                FLASH_BASE0_PRELIM+CFG_MONITOR_LEN-1,
+                FLASH_BASE0_PRELIM+monitor_flash_len-1,
                &flash_info[0]);
    }
    if (size2 == 512*1024)
    {
        (void)flash_protect(FLAG_PROTECT_SET,
                FLASH_BASE1_PRELIM,
-                FLASH_BASE1_PRELIM+CFG_MONITOR_LEN-1,
+                FLASH_BASE1_PRELIM+monitor_flash_len-1,
                &flash_info[1]);
    }
    if (size2 == 4*1024*1024)
    {
        (void)flash_protect(FLAG_PROTECT_SET,
                CFG_FLASH_BASE,
-                CFG_FLASH_BASE+CFG_MONITOR_LEN-1,
+                CFG_FLASH_BASE+monitor_flash_len-1,
                &flash_info[1]);
    }

--- a/board/eltec/elppc/flash.c
+++ b/board/eltec/elppc/flash.c
@@ -83,21 +83,21 @@ unsigned long flash_init (void)
    {
        (void)flash_protect(FLAG_PROTECT_SET,
                FLASH_BASE0_PRELIM,
-                FLASH_BASE0_PRELIM+CFG_MONITOR_LEN-1,
+                FLASH_BASE0_PRELIM+monitor_flash_len-1,
                &flash_info[0]);
    }
    if (size2 == 512*1024)
    {
        (void)flash_protect(FLAG_PROTECT_SET,
                FLASH_BASE1_PRELIM,
-                FLASH_BASE1_PRELIM+CFG_MONITOR_LEN-1,
+                FLASH_BASE1_PRELIM+monitor_flash_len-1,
                &flash_info[1]);
    }
    if (size2 == 4*1024*1024)
    {
        (void)flash_protect(FLAG_PROTECT_SET,
                CFG_FLASH_BASE,
-                CFG_FLASH_BASE+CFG_MONITOR_LEN-1,
+                CFG_FLASH_BASE+monitor_flash_len-1,
                &flash_info[1]);
    }

--- a/board/eltec/mhpc/flash.c
+++ b/board/eltec/mhpc/flash.c
@@ -92,7 +92,7 @@ unsigned long flash_init (void)
 	/* monitor protection ON by default */
 	(void)flash_protect(FLAG_PROTECT_SET,
 			    CFG_FLASH_BASE,
-			    CFG_FLASH_BASE+CFG_MONITOR_LEN-1,
+			    CFG_FLASH_BASE+monitor_flash_len-1,
 			    &flash_info[0]);

 	flash_info[0].size = size_b0;
--- a/board/ep7312/flash.c
+++ b/board/ep7312/flash.c
@@ -61,7 +61,7 @@ ulong flash_init (void)
 	 */
 	flash_protect ( FLAG_PROTECT_SET,
 			CFG_FLASH_BASE,
-			CFG_FLASH_BASE + _armboot_end_data - _armboot_start,
+			CFG_FLASH_BASE + monitor_flash_len - 1,
 			&flash_info[0]);

 	flash_protect ( FLAG_PROTECT_SET,
--- a/board/ep8260/flash.c
+++ b/board/ep8260/flash.c
@@ -140,7 +140,7 @@ unsigned long flash_init (void)
 #if CFG_MONITOR_BASE >= CFG_FLASH0_BASE
    flash_protect(FLAG_PROTECT_SET,
 		  CFG_MONITOR_BASE,
-		  CFG_MONITOR_BASE+CFG_MONITOR_LEN-1,
+		  CFG_MONITOR_BASE+monitor_flash_len-1,
 		  &flash_info[0]);
 #endif

--- a/board/eric/flash.c
+++ b/board/eric/flash.c
@@ -83,13 +83,13 @@ unsigned long flash_init (void)
 	    /* Monitor protection ON by default */
 #if 0	    /* sand: */
 	    (void)flash_protect(FLAG_PROTECT_SET,
-				FLASH_BASE0_PRELIM-CFG_MONITOR_LEN+size_b0,
+				FLASH_BASE0_PRELIM-monitor_flash_len+size_b0,
 				FLASH_BASE0_PRELIM-1+size_b0,
 				&flash_info[0]);
 #else
 	    (void)flash_protect(FLAG_PROTECT_SET,
 		      		CFG_MONITOR_BASE,
-		      		CFG_MONITOR_BASE+CFG_MONITOR_LEN-1,
+		      		CFG_MONITOR_BASE+monitor_flash_len-1,
 		      		&flash_info[0]);
 #endif
 	    size_b1 = 0 ;
@@ -132,13 +132,13 @@ unsigned long flash_init (void)
 	    /* monitor protection ON by default */
 #if 0	    /* sand: */
 	    (void)flash_protect(FLAG_PROTECT_SET,
-				FLASH_BASE0_PRELIM-CFG_MONITOR_LEN+size_b0,
+				FLASH_BASE0_PRELIM-monitor_flash_len+size_b0,
 				FLASH_BASE0_PRELIM-1+size_b0,
 				&flash_info[0]);
 #else
 	    (void)flash_protect(FLAG_PROTECT_SET,
 		      		CFG_MONITOR_BASE,
-		      		CFG_MONITOR_BASE+CFG_MONITOR_LEN-1,
+		      		CFG_MONITOR_BASE+monitor_flash_len-1,
 		      		&flash_info[0]);
 #endif

@@ -150,12 +150,12 @@ unsigned long flash_init (void)

 	      /* monitor protection ON by default */
 	      (void)flash_protect(FLAG_PROTECT_SET,
-				  base_b1+size_b1-CFG_MONITOR_LEN,
+				  base_b1+size_b1-monitor_flash_len,
 				  base_b1+size_b1-1,
 				  &flash_info[1]);
 	      /* monitor protection OFF by default (one is enough) */
 	      (void)flash_protect(FLAG_PROTECT_CLEAR,
-				  base_b0+size_b0-CFG_MONITOR_LEN,
+				  base_b0+size_b0-monitor_flash_len,
 				  base_b0+size_b0-1,
 				  &flash_info[0]);
 	    } else {
--- a/board/esd/adciop/flash.c
+++ b/board/esd/adciop/flash.c
@@ -80,7 +80,7 @@ unsigned long flash_init (void)

 	/* monitor protection ON by default */
 	flash_protect(FLAG_PROTECT_SET,
-		      FLASH_BASE0_PRELIM+size_b0-CFG_MONITOR_LEN,
+		      FLASH_BASE0_PRELIM+size_b0-monitor_flash_len,
 		      FLASH_BASE0_PRELIM+size_b0-1,
 		      &flash_info[0]);

@@ -93,12 +93,12 @@ unsigned long flash_init (void)

 		/* monitor protection ON by default */
 		flash_protect(FLAG_PROTECT_SET,
-			      FLASH_BASE0_PRELIM+size_b0+size_b1-CFG_MONITOR_LEN,
+			      FLASH_BASE0_PRELIM+size_b0+size_b1-monitor_flash_len,
 			      FLASH_BASE0_PRELIM+size_b0+size_b1-1,
 			      &flash_info[1]);
                /* monitor protection OFF by default (one is enough) */
                flash_protect(FLAG_PROTECT_CLEAR,
-			      FLASH_BASE0_PRELIM+size_b0-CFG_MONITOR_LEN,
+			      FLASH_BASE0_PRELIM+size_b0-monitor_flash_len,
 			      FLASH_BASE0_PRELIM+size_b0-1,
 			      &flash_info[0]);
 	} else {
--- a/board/esd/ar405/flash.c
+++ b/board/esd/ar405/flash.c
@@ -94,7 +94,7 @@ unsigned long flash_init (void)

 	/* monitor protection ON by default */
 	(void)flash_protect(FLAG_PROTECT_SET,
-			    base_b0+size_b0-CFG_MONITOR_LEN,
+			    base_b0+size_b0-monitor_flash_len,
 			    base_b0+size_b0-1,
 			    &flash_info[0]);

@@ -106,12 +106,12 @@ unsigned long flash_init (void)

 		/* monitor protection ON by default */
 		(void)flash_protect(FLAG_PROTECT_SET,
-				    base_b1+size_b1-CFG_MONITOR_LEN,
+				    base_b1+size_b1-monitor_flash_len,
 				    base_b1+size_b1-1,
 				    &flash_info[1]);
                /* monitor protection OFF by default (one is enough) */
                (void)flash_protect(FLAG_PROTECT_CLEAR,
-                                    base_b0+size_b0-CFG_MONITOR_LEN,
+                                    base_b0+size_b0-monitor_flash_len,
                                    base_b0+size_b0-1,
                                    &flash_info[0]);
 	} else {
--- a/board/esd/ash405/Makefile
+++ b/board/esd/ash405/Makefile
@@ -0,0 +1,46 @@
+#
+# (C) Copyright 2000
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB	= lib$(BOARD).a
+
+OBJS	= $(BOARD).o flash.o
+
+$(LIB):	$(OBJS) $(SOBJS)
+	$(AR) crv $@ $^
+
+clean:
+	rm -f $(SOBJS) $(OBJS)
+
+distclean:	clean
+	rm -f $(LIB) core *.bak .depend
+
+#########################################################################
+
+.depend:	Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
+		$(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
+
+sinclude .depend
+
+#########################################################################
--- a/board/esd/ash405/ash405.c
+++ b/board/esd/ash405/ash405.c
@@ -0,0 +1,247 @@
+/*
+ * (C) Copyright 2001-2003
+ * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/processor.h>
+#include <command.h>
+#include <cmd_boot.h>
+#include <malloc.h>
+
+/* ------------------------------------------------------------------------- */
+
+#if 0
+#define FPGA_DEBUG
+#endif
+
+/* fpga configuration data - gzip compressed and generated by bin2c */
+const unsigned char fpgadata[] =
+{
+#include "fpgadata.c"
+};
+
+/*
+ * include common fpga code (for esd boards)
+ */
+#include "../common/fpga.c"
+
+
+/* Prototypes */
+int gunzip(void *, int, unsigned char *, int *);
+
+
+int board_pre_init (void)
+{
+	/*
+	 * IRQ 0-15  405GP internally generated; active high; level sensitive
+	 * IRQ 16    405GP internally generated; active low; level sensitive
+	 * IRQ 17-24 RESERVED
+	 * IRQ 25 (EXT IRQ 0) CAN0; active low; level sensitive
+	 * IRQ 26 (EXT IRQ 1) SER0 ; active low; level sensitive
+	 * IRQ 27 (EXT IRQ 2) SER1; active low; level sensitive
+	 * IRQ 28 (EXT IRQ 3) FPGA 0; active low; level sensitive
+	 * IRQ 29 (EXT IRQ 4) FPGA 1; active low; level sensitive
+	 * IRQ 30 (EXT IRQ 5) PCI INTA; active low; level sensitive
+	 * IRQ 31 (EXT IRQ 6) COMPACT FLASH; active high; level sensitive
+	 */
+	mtdcr(uicsr, 0xFFFFFFFF);       /* clear all ints */
+	mtdcr(uicer, 0x00000000);       /* disable all ints */
+	mtdcr(uiccr, 0x00000000);       /* set all to be non-critical*/
+	mtdcr(uicpr, 0xFFFFFF81);       /* set int polarities */
+	mtdcr(uictr, 0x10000000);       /* set int trigger levels */
+	mtdcr(uicvcr, 0x00000001);      /* set vect base=0,INT0 highest priority*/
+	mtdcr(uicsr, 0xFFFFFFFF);       /* clear all ints */
+
+	/*
+	 * EBC Configuration Register: set ready timeout to 512 ebc-clks -> ca. 15 us
+	 */
+	mtebc (epcr, 0xa8400000); /* ebc always driven */
+
+	return 0;
+}
+
+
+/* ------------------------------------------------------------------------- */
+
+int misc_init_f (void)
+{
+	return 0;  /* dummy implementation */
+}
+
+
+int misc_init_r (void)
+{
+	volatile unsigned char *duart0_mcr = (unsigned char *)((ulong)DUART0_BA + 4);
+	volatile unsigned char *duart1_mcr = (unsigned char *)((ulong)DUART1_BA + 4);
+	volatile unsigned char *duart2_mcr = (unsigned char *)((ulong)DUART2_BA + 4);
+	volatile unsigned char *duart3_mcr = (unsigned char *)((ulong)DUART3_BA + 4);
+	unsigned char *dst;
+	ulong len = sizeof(fpgadata);
+	int status;
+	int index;
+	int i;
+
+	dst = malloc(CFG_FPGA_MAX_SIZE);
+	if (gunzip (dst, CFG_FPGA_MAX_SIZE, (uchar *)fpgadata, (int *)&len) != 0) {
+		printf ("GUNZIP ERROR - must RESET board to recover\n");
+		do_reset (NULL, 0, 0, NULL);
+	}
+
+	status = fpga_boot(dst, len);
+	if (status != 0) {
+		printf("\nFPGA: Booting failed ");
+		switch (status) {
+		case ERROR_FPGA_PRG_INIT_LOW:
+			printf("(Timeout: INIT not low after asserting PROGRAM*)\n ");
+			break;
+		case ERROR_FPGA_PRG_INIT_HIGH:
+			printf("(Timeout: INIT not high after deasserting PROGRAM*)\n ");
+			break;
+		case ERROR_FPGA_PRG_DONE:
+			printf("(Timeout: DONE not high after programming FPGA)\n ");
+			break;
+		}
+
+		/* display infos on fpgaimage */
+		index = 15;
+		for (i=0; i<4; i++) {
+			len = dst[index];
+			printf("FPGA: %s\n", &(dst[index+1]));
+			index += len+3;
+		}
+		putc ('\n');
+		/* delayed reboot */
+		for (i=20; i>0; i--) {
+			printf("Rebooting in %2d seconds \r",i);
+			for (index=0;index<1000;index++)
+				udelay(1000);
+		}
+		putc ('\n');
+		do_reset(NULL, 0, 0, NULL);
+	}
+
+	puts("FPGA:  ");
+
+	/* display infos on fpgaimage */
+	index = 15;
+	for (i=0; i<4; i++) {
+		len = dst[index];
+		printf("%s ", &(dst[index+1]));
+		index += len+3;
+	}
+	putc ('\n');
+
+	free(dst);
+
+	/*
+	 * Reset FPGA via FPGA_DATA pin
+	 */
+	SET_FPGA(FPGA_PRG | FPGA_CLK);
+	udelay(1000); /* wait 1ms */
+	SET_FPGA(FPGA_PRG | FPGA_CLK | FPGA_DATA);
+	udelay(1000); /* wait 1ms */
+
+	/*
+	 * Reset external DUARTs
+	 */
+	out32(GPIO0_OR, in32(GPIO0_OR) | CFG_DUART_RST); /* set reset to high */
+	udelay(10); /* wait 10us */
+	out32(GPIO0_OR, in32(GPIO0_OR) & ~CFG_DUART_RST); /* set reset to low */
+	udelay(1000); /* wait 1ms */
+
+	/*
+	 * Set NAND-FLASH GPIO signals to default
+	 */
+	out32(GPIO0_OR, in32(GPIO0_OR) & ~(CFG_NAND_CLE | CFG_NAND_ALE));
+	out32(GPIO0_OR, in32(GPIO0_OR) | CFG_NAND_CE);
+
+	/*
+	 * Enable interrupts in exar duart mcr[3]
+	 */
+	*duart0_mcr = 0x08;
+	*duart1_mcr = 0x08;
+	*duart2_mcr = 0x08;
+	*duart3_mcr = 0x08;
+
+	return (0);
+}
+
+
+/*
+ * Check Board Identity:
+ */
+
+int checkboard (void)
+{
+	unsigned char str[64];
+	int i = getenv_r ("serial#", str, sizeof(str));
+
+	puts ("Board: ");
+
+	if (i == -1) {
+		puts ("### No HW ID - assuming ASH405");
+	} else {
+		puts(str);
+	}
+
+	putc ('\n');
+
+	return 0;
+}
+
+/* ------------------------------------------------------------------------- */
+
+long int initdram (int board_type)
+{
+	unsigned long val;
+
+	mtdcr(memcfga, mem_mb0cf);
+	val = mfdcr(memcfgd);
+
+#if 0
+	printf("\nmb0cf=%x\n", val); /* test-only */
+	printf("strap=%x\n", mfdcr(strap)); /* test-only */
+#endif
+
+	return (4*1024*1024 << ((val & 0x000e0000) >> 17));
+}
+
+/* ------------------------------------------------------------------------- */
+
+int testdram (void)
+{
+	/* TODO: XXX XXX XXX */
+	printf ("test: 16 MB - ok\n");
+
+	return (0);
+}
+
+/* ------------------------------------------------------------------------- */
+
+#if (CONFIG_COMMANDS & CFG_CMD_NAND)
+extern void nand_probe(ulong physadr);
+void nand_init(void)
+{
+	printf("Probing at 0x%.8x\n", CFG_NAND_BASE);
+	nand_probe(CFG_NAND_BASE);
+}
+#endif
--- a/board/esd/ash405/config.mk
+++ b/board/esd/ash405/config.mk
@@ -0,0 +1,28 @@
+#
+# (C) Copyright 2000
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+#
+# esd ASH405 boards
+#
+
+TEXT_BASE = 0xFFFC0000
--- a/board/esd/ash405/flash.c
+++ b/board/esd/ash405/flash.c
@@ -0,0 +1,101 @@
+/*
+ * (C) Copyright 2001
+ * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <ppc4xx.h>
+#include <asm/processor.h>
+
+/*
+ * include common flash code (for esd boards)
+ */
+#include "../common/flash.c"
+
+/*-----------------------------------------------------------------------
+ * Functions
+ */
+static ulong flash_get_size (vu_long * addr, flash_info_t * info);
+static void flash_get_offsets (ulong base, flash_info_t * info);
+
+/*-----------------------------------------------------------------------
+ */
+
+unsigned long flash_init (void)
+{
+	unsigned long size_b0;
+	int i;
+        uint pbcr;
+        unsigned long base_b0;
+	int size_val = 0;
+
+	/* Init: no FLASHes known */
+	for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
+		flash_info[i].flash_id = FLASH_UNKNOWN;
+	}
+
+	/* Static FLASH Bank configuration here - FIXME XXX */
+
+	size_b0 = flash_get_size((vu_long *)FLASH_BASE0_PRELIM, &flash_info[0]);
+
+	if (flash_info[0].flash_id == FLASH_UNKNOWN) {
+		printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
+			size_b0, size_b0<<20);
+	}
+
+        /* Setup offsets */
+        flash_get_offsets (-size_b0, &flash_info[0]);
+
+        /* Re-do sizing to get full correct info */
+        mtdcr(ebccfga, pb0cr);
+        pbcr = mfdcr(ebccfgd);
+        mtdcr(ebccfga, pb0cr);
+        base_b0 = -size_b0;
+	switch (size_b0) {
+	case 1 << 20:
+		size_val = 0;
+		break;
+	case 2 << 20:
+		size_val = 1;
+		break;
+	case 4 << 20:
+		size_val = 2;
+		break;
+	case 8 << 20:
+		size_val = 3;
+		break;
+	case 16 << 20:
+		size_val = 4;
+		break;
+	}
+	pbcr = (pbcr & 0x0001ffff) | base_b0 | (size_val << 17);
+        mtdcr(ebccfgd, pbcr);
+
+        /* Monitor protection ON by default */
+        (void)flash_protect(FLAG_PROTECT_SET,
+                            -CFG_MONITOR_LEN,
+                            0xffffffff,
+                            &flash_info[0]);
+
+        flash_info[0].size = size_b0;
+
+	return (size_b0);
+}
--- a/board/esd/ash405/fpgadata.c
+++ b/board/esd/ash405/fpgadata.c
--- a/board/esd/ash405/u-boot.lds
+++ b/board/esd/ash405/u-boot.lds
@@ -0,0 +1,142 @@
+/*
+ * (C) Copyright 2000
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_ARCH(powerpc)
+SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
+/* Do we need any of these for elf?
+   __DYNAMIC = 0;    */
+SECTIONS
+{
+  .resetvec 0xFFFFFFFC :
+  {
+    *(.resetvec)
+  } = 0xffff
+
+  /* Read-only sections, merged into text segment: */
+  . = + SIZEOF_HEADERS;
+  .interp : { *(.interp) }
+  .hash          : { *(.hash)		}
+  .dynsym        : { *(.dynsym)		}
+  .dynstr        : { *(.dynstr)		}
+  .rel.text      : { *(.rel.text)		}
+  .rela.text     : { *(.rela.text) 	}
+  .rel.data      : { *(.rel.data)		}
+  .rela.data     : { *(.rela.data) 	}
+  .rel.rodata    : { *(.rel.rodata) 	}
+  .rela.rodata   : { *(.rela.rodata) 	}
+  .rel.got       : { *(.rel.got)		}
+  .rela.got      : { *(.rela.got)		}
+  .rel.ctors     : { *(.rel.ctors)	}
+  .rela.ctors    : { *(.rela.ctors)	}
+  .rel.dtors     : { *(.rel.dtors)	}
+  .rela.dtors    : { *(.rela.dtors)	}
+  .rel.bss       : { *(.rel.bss)		}
+  .rela.bss      : { *(.rela.bss)		}
+  .rel.plt       : { *(.rel.plt)		}
+  .rela.plt      : { *(.rela.plt)		}
+  .init          : { *(.init)	}
+  .plt : { *(.plt) }
+  .text      :
+  {
+    /* WARNING - the following is hand-optimized to fit within	*/
+    /* the sector layout of our flash chips!	XXX FIXME XXX	*/
+
+    cpu/ppc4xx/start.o	(.text)
+    cpu/ppc4xx/traps.o	(.text)
+    cpu/ppc4xx/interrupts.o	(.text)
+    cpu/ppc4xx/serial.o	(.text)
+    cpu/ppc4xx/cpu_init.o	(.text)
+    cpu/ppc4xx/speed.o	(.text)
+    cpu/ppc4xx/405gp_enet.o	(.text)
+    common/dlmalloc.o	(.text)
+    lib_generic/crc32.o		(.text)
+    lib_ppc/extable.o	(.text)
+    lib_generic/zlib.o		(.text)
+
+/*    . = env_offset;*/
+/*    common/environment.o(.text)*/
+
+    *(.text)
+    *(.fixup)
+    *(.got1)
+  }
+  _etext = .;
+  PROVIDE (etext = .);
+  .rodata    :
+  {
+    *(.rodata)
+    *(.rodata1)
+  }
+  .fini      : { *(.fini)    } =0
+  .ctors     : { *(.ctors)   }
+  .dtors     : { *(.dtors)   }
+
+  /* Read-write section, merged into data segment: */
+  . = (. + 0x00FF) & 0xFFFFFF00;
+  _erotext = .;
+  PROVIDE (erotext = .);
+  .reloc   :
+  {
+    *(.got)
+    _GOT2_TABLE_ = .;
+    *(.got2)
+    _FIXUP_TABLE_ = .;
+    *(.fixup)
+  }
+  __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
+  __fixup_entries = (. - _FIXUP_TABLE_)>>2;
+
+  .data    :
+  {
+    *(.data)
+    *(.data1)
+    *(.sdata)
+    *(.sdata2)
+    *(.dynamic)
+    CONSTRUCTORS
+  }
+  _edata  =  .;
+  PROVIDE (edata = .);
+
+  __start___ex_table = .;
+  __ex_table : { *(__ex_table) }
+  __stop___ex_table = .;
+
+  . = ALIGN(256);
+  __init_begin = .;
+  .text.init : { *(.text.init) }
+  .data.init : { *(.data.init) }
+  . = ALIGN(256);
+  __init_end = .;
+
+  __bss_start = .;
+  .bss       :
+  {
+   *(.sbss) *(.scommon)
+   *(.dynbss)
+   *(.bss)
+   *(COMMON)
+  }
+  _end = . ;
+  PROVIDE (end = .);
+}
--- a/board/esd/canbt/canbt.c
+++ b/board/esd/canbt/canbt.c
@@ -114,9 +114,9 @@ int board_pre_init (void)
 	/*
 	 * Setup port pins for normal operation
 	 */
-	out32 (IBM405GP_GPIO0_ODR, 0x00000000);	/* no open drain pins */
-	out32 (IBM405GP_GPIO0_TCR, 0x07038100);	/* setup for output */
-	out32 (IBM405GP_GPIO0_OR, 0x07030100);	/* set output pins to high (default) */
+	out32 (GPIO0_ODR, 0x00000000);	/* no open drain pins */
+	out32 (GPIO0_TCR, 0x07038100);	/* setup for output */
+	out32 (GPIO0_OR, 0x07030100);	/* set output pins to high (default) */

 	/*
 	 * IRQ 0-15  405GP internally generated; active high; level sensitive
--- a/board/esd/canbt/flash.c
+++ b/board/esd/canbt/flash.c
@@ -74,7 +74,7 @@ unsigned long flash_init (void)

        /* Monitor protection ON by default */
        (void)flash_protect(FLAG_PROTECT_SET,
-                            -CFG_MONITOR_LEN,
+                            -monitor_flash_len,
                            0xffffffff,
                            &flash_info[0]);

--- a/board/esd/common/fpga.c
+++ b/board/esd/common/fpga.c
@@ -1,5 +1,5 @@
 /*
- * (C) Copyright 2001
+ * (C) Copyright 2001-2003
 * Matthias Fuchs, esd gmbh germany, matthias.fuchs@esd-electronics.com
 * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
 *
@@ -36,11 +36,6 @@

 #define MAX_ONES               226

-#define IBM405GP_GPIO0_OR      0xef600700  /* GPIO Output */
-#define IBM405GP_GPIO0_TCR     0xef600704  /* GPIO Three-State Control */
-#define IBM405GP_GPIO0_ODR     0xef600718  /* GPIO Open Drain */
-#define IBM405GP_GPIO0_IR      0xef60071c  /* GPIO Input */
-
 #ifdef CFG_FPGA_PRG
 # define FPGA_PRG              CFG_FPGA_PRG /* FPGA program pin (ppc output)*/
 # define FPGA_CLK              CFG_FPGA_CLK /* FPGA clk pin (ppc output)    */
@@ -59,7 +54,7 @@
 #define ERROR_FPGA_PRG_INIT_HIGH -2        /* Timeout after PRG* deasserted */
 #define ERROR_FPGA_PRG_DONE      -3        /* Timeout after programming     */

-#define SET_FPGA(data)         out32(IBM405GP_GPIO0_OR, data)
+#define SET_FPGA(data)         out32(GPIO0_OR, data)

 #define FPGA_WRITE_1 {                                                    \
        SET_FPGA(FPGA_PRG |            FPGA_DATA);  /* set clock to 0 */  \
@@ -120,12 +115,12 @@ static int fpga_boot(unsigned char *fpgadata, int size)
  /*
   * Setup port pins for fpga programming
   */
-  out32(IBM405GP_GPIO0_ODR, 0x00000000);                       /* no open drain pins      */
-  out32(IBM405GP_GPIO0_TCR, FPGA_PRG | FPGA_CLK | FPGA_DATA);  /* setup for output        */
-  out32(IBM405GP_GPIO0_OR,  FPGA_PRG | FPGA_CLK | FPGA_DATA);  /* set output pins to high */
+  out32(GPIO0_ODR, 0x00000000);                                      /* no open drain pins */
+  out32(GPIO0_TCR, in32(GPIO0_TCR) | FPGA_PRG | FPGA_CLK | FPGA_DATA); /* setup for output */
+  out32(GPIO0_OR, in32(GPIO0_OR) | FPGA_PRG | FPGA_CLK | FPGA_DATA);   /* set pins to high */

-  DBG("%s, ",((in32(IBM405GP_GPIO0_IR) & FPGA_DONE) == 0) ? "NOT DONE" : "DONE" );
-  DBG("%s\n",((in32(IBM405GP_GPIO0_IR) & FPGA_INIT) == 0) ? "NOT INIT" : "INIT" );
+  DBG("%s, ",((in32(GPIO0_IR) & FPGA_DONE) == 0) ? "NOT DONE" : "DONE" );
+  DBG("%s\n",((in32(GPIO0_IR) & FPGA_INIT) == 0) ? "NOT INIT" : "INIT" );

  /*
   * Init fpga by asserting and deasserting PROGRAM*
@@ -134,7 +129,7 @@ static int fpga_boot(unsigned char *fpgadata, int size)

  /* Wait for FPGA init line low */
  count = 0;
-  while (in32(IBM405GP_GPIO0_IR) & FPGA_INIT)
+  while (in32(GPIO0_IR) & FPGA_INIT)
    {
      udelay(1000); /* wait 1ms */
      /* Check for timeout - 100us max, so use 3ms */
@@ -145,15 +140,15 @@ static int fpga_boot(unsigned char *fpgadata, int size)
        }
    }

-  DBG("%s, ",((in32(IBM405GP_GPIO0_IR) & FPGA_DONE) == 0) ? "NOT DONE" : "DONE" );
-  DBG("%s\n",((in32(IBM405GP_GPIO0_IR) & FPGA_INIT) == 0) ? "NOT INIT" : "INIT" );
+  DBG("%s, ",((in32(GPIO0_IR) & FPGA_DONE) == 0) ? "NOT DONE" : "DONE" );
+  DBG("%s\n",((in32(GPIO0_IR) & FPGA_INIT) == 0) ? "NOT INIT" : "INIT" );

  /* deassert PROGRAM* */
  SET_FPGA(FPGA_PRG | FPGA_CLK | FPGA_DATA);

  /* Wait for FPGA end of init period .  */
  count = 0;
-  while (!(in32(IBM405GP_GPIO0_IR) & FPGA_INIT))
+  while (!(in32(GPIO0_IR) & FPGA_INIT))
    {
      udelay(1000); /* wait 1ms */
      /* Check for timeout */
@@ -164,8 +159,8 @@ static int fpga_boot(unsigned char *fpgadata, int size)
        }
    }

-  DBG("%s, ",((in32(IBM405GP_GPIO0_IR) & FPGA_DONE) == 0) ? "NOT DONE" : "DONE" );
-  DBG("%s\n",((in32(IBM405GP_GPIO0_IR) & FPGA_INIT) == 0) ? "NOT INIT" : "INIT" );
+  DBG("%s, ",((in32(GPIO0_IR) & FPGA_DONE) == 0) ? "NOT DONE" : "DONE" );
+  DBG("%s\n",((in32(GPIO0_IR) & FPGA_INIT) == 0) ? "NOT INIT" : "INIT" );

  DBG("write configuration data into fpga\n");
  /* write configuration-data into fpga... */
@@ -237,8 +232,8 @@ static int fpga_boot(unsigned char *fpgadata, int size)
    }
 #endif

-  DBG("%s, ",((in32(IBM405GP_GPIO0_IR) & FPGA_DONE) == 0) ? "NOT DONE" : "DONE" );
-  DBG("%s\n",((in32(IBM405GP_GPIO0_IR) & FPGA_INIT) == 0) ? "NOT INIT" : "INIT" );
+  DBG("%s, ",((in32(GPIO0_IR) & FPGA_DONE) == 0) ? "NOT DONE" : "DONE" );
+  DBG("%s\n",((in32(GPIO0_IR) & FPGA_INIT) == 0) ? "NOT INIT" : "INIT" );

  /*
   * Check if fpga's DONE signal - correctly booted ?
@@ -246,7 +241,7 @@ static int fpga_boot(unsigned char *fpgadata, int size)

  /* Wait for FPGA end of programming period .  */
  count = 0;
-  while (!(in32(IBM405GP_GPIO0_IR) & FPGA_DONE))
+  while (!(in32(GPIO0_IR) & FPGA_DONE))
    {
      udelay(1000); /* wait 1ms */
      /* Check for timeout */
--- a/board/esd/cpci405/config.mk
+++ b/board/esd/cpci405/config.mk
@@ -28,5 +28,9 @@
 ifeq ($(BOARD_REVISION),CPCI4052)
 TEXT_BASE = 0xFFFC0000
 else
+ifeq ($(BOARD_REVISION),CPCI405AB)
+TEXT_BASE = 0xFFFC0000
+else
 TEXT_BASE = 0xFFFD0000
 endif
+endif
--- a/board/esd/cpci405/cpci405.c
+++ b/board/esd/cpci405/cpci405.c
@@ -37,7 +37,11 @@
 const unsigned char fpgadata[] =
 {
 #ifdef CONFIG_CPCI405_VER2
-# include "fpgadata_cpci4052.c"
+# ifdef CONFIG_CPCI405AB
+#  include "fpgadata_cpci405ab.c"
+# else
+#  include "fpgadata_cpci4052.c"
+# endif
 #else
 # include "fpgadata_cpci405.c"
 #endif
@@ -74,10 +78,10 @@ int board_pre_init (void)
 	/*
 	 * First pull fpga-prg pin low, to disable fpga logic (on version 2 board)
 	 */
-	out32(IBM405GP_GPIO0_ODR, 0x00000000);        /* no open drain pins      */
-	out32(IBM405GP_GPIO0_TCR, CFG_FPGA_PRG);      /* setup for output        */
-	out32(IBM405GP_GPIO0_OR,  CFG_FPGA_PRG);      /* set output pins to high */
-	out32(IBM405GP_GPIO0_OR, 0);                  /* pull prg low            */
+	out32(GPIO0_ODR, 0x00000000);        /* no open drain pins      */
+	out32(GPIO0_TCR, CFG_FPGA_PRG);      /* setup for output        */
+	out32(GPIO0_OR,  CFG_FPGA_PRG);      /* set output pins to high */
+	out32(GPIO0_OR, 0);                  /* pull prg low            */

 	/*
 	 * Boot onboard FPGA
@@ -192,10 +196,10 @@ int cpci405_version(void)
 	 */
 	cntrl0Reg = mfdcr(cntrl0);
 	mtdcr(cntrl0, cntrl0Reg | 0x03000000);
-	out32(IBM405GP_GPIO0_ODR, in32(IBM405GP_GPIO0_ODR) & ~0x00180000);
-	out32(IBM405GP_GPIO0_TCR, in32(IBM405GP_GPIO0_TCR) & ~0x00180000);
+	out32(GPIO0_ODR, in32(GPIO0_ODR) & ~0x00180000);
+	out32(GPIO0_TCR, in32(GPIO0_TCR) & ~0x00180000);
 	udelay(1000);                   /* wait some time before reading input */
-	value = in32(IBM405GP_GPIO0_IR) & 0x00180000;       /* get config bits */
+	value = in32(GPIO0_IR) & 0x00180000;       /* get config bits */

 	/*
 	 * Restore GPIO settings
@@ -234,6 +238,7 @@ int misc_init_r (void)

 	bd_t *bd = gd->bd;
 	char *	tmp;                    /* Temporary char pointer      */
+	unsigned long cntrl0Reg;

 #ifdef CONFIG_CPCI405_VER2
 	unsigned char *dst;
@@ -241,7 +246,6 @@ int misc_init_r (void)
 	int status;
 	int index;
 	int i;
-	unsigned long cntrl0Reg;

 	/*
 	 * On CPCI-405 version 2 the environment is saved in eeprom!
@@ -377,6 +381,12 @@ int misc_init_r (void)

 #endif /* CONFIG_CPCI405_VER2 */

+	/*
+	 * Select cts (and not dsr) on uart1
+	 */
+	cntrl0Reg = mfdcr(cntrl0);
+	mtdcr(cntrl0, cntrl0Reg | 0x00001000);
+
 	/*
 	 * Write ethernet addr in NVRAM for VxWorks
 	 */
@@ -499,4 +509,44 @@ void ide_set_reset(int on)
 #endif /* CONFIG_IDE_RESET */
 #endif /* CONFIG_CPCI405_VER2 */

+#if 0 /* test-only */
 /* ------------------------------------------------------------------------- */
+
+u8 *dhcp_vendorex_prep (u8 * e)
+{
+	char *ptr;
+
+/* DHCP vendor-class-identifier = 60 */
+	if ((ptr = getenv ("dhcp_vendor-class-identifier"))) {
+		*e++ = 60;
+		*e++ = strlen (ptr);
+		while (*ptr)
+			*e++ = *ptr++;
+	}
+/* my DHCP_CLIENT_IDENTIFIER = 61 */
+	if ((ptr = getenv ("dhcp_client_id"))) {
+		*e++ = 61;
+		*e++ = strlen (ptr);
+		while (*ptr)
+			*e++ = *ptr++;
+	}
+
+	return e;
+}
+
+
+/* ------------------------------------------------------------------------- */
+
+u8 *dhcp_vendorex_proc (u8 * popt)
+{
+	if (*popt == 61)
+		return (u8 *)-1;
+	if (*popt == 43) {
+		printf("|%s|", popt+4); /* test-only */
+		return (u8 *)-1;
+	}
+	return NULL;
+}
+
+/* ------------------------------------------------------------------------- */
+#endif /* test-only */
--- a/board/esd/cpci405/flash.c
+++ b/board/esd/cpci405/flash.c
@@ -86,11 +86,11 @@ unsigned long flash_init (void)
 	/* Re-do sizing to get full correct info */

 	if (size_b1) {
-		base_b1 = -size_b1;
 		if (size_b1 < (1 << 20)) {
 			/* minimum CS size on PPC405GP is 1MB !!! */
 			size_b1 = 1 << 20;
 		}
+		base_b1 = -size_b1;
 		mtdcr (ebccfga, pb0cr);
 		pbcr = mfdcr (ebccfgd);
 		mtdcr (ebccfga, pb0cr);
@@ -103,11 +103,11 @@ unsigned long flash_init (void)
 	}

 	if (size_b0) {
-		base_b0 = base_b1 - size_b0;
 		if (size_b0 < (1 << 20)) {
 			/* minimum CS size on PPC405GP is 1MB !!! */
 			size_b0 = 1 << 20;
 		}
+		base_b0 = base_b1 - size_b0;
 		mtdcr (ebccfga, pb1cr);
 		pbcr = mfdcr (ebccfgd);
 		mtdcr (ebccfga, pb1cr);
@@ -125,7 +125,7 @@ unsigned long flash_init (void)

 	/* monitor protection ON by default */
 	flash_protect (FLAG_PROTECT_SET,
-			base_b0 + size_b0 - CFG_MONITOR_LEN,
+			base_b0 + size_b0 - monitor_flash_len,
 			base_b0 + size_b0 - 1, &flash_info[0]);

 	if (size_b1) {
@@ -136,11 +136,11 @@ unsigned long flash_init (void)

 		/* monitor protection ON by default */
 		flash_protect (FLAG_PROTECT_SET,
-				base_b1 + size_b1 - CFG_MONITOR_LEN,
+				base_b1 + size_b1 - monitor_flash_len,
 				base_b1 + size_b1 - 1, &flash_info[1]);
 		/* monitor protection OFF by default (one is enough) */
 		flash_protect (FLAG_PROTECT_CLEAR,
-				base_b0 + size_b0 - CFG_MONITOR_LEN,
+				base_b0 + size_b0 - monitor_flash_len,
 				base_b0 + size_b0 - 1, &flash_info[0]);
 	} else {
 		flash_info[1].flash_id = FLASH_UNKNOWN;
--- a/board/esd/cpci405/fpgadata_cpci405ab.c
+++ b/board/esd/cpci405/fpgadata_cpci405ab.c
--- a/board/esd/cpci440/strataflash.c
+++ b/board/esd/cpci440/strataflash.c
@@ -200,7 +200,7 @@ unsigned long flash_init (void)
 #if 0 /* test-only */
 	/* Monitor protection ON by default */
 #if (CFG_MONITOR_BASE >= CFG_FLASH_BASE)
-	for(i=0; flash_info[0].start[i] < CFG_MONITOR_BASE+CFG_MONITOR_LEN-1; i++)
+	for(i=0; flash_info[0].start[i] < CFG_MONITOR_BASE+monitor_flash_len-1; i++)
 		(void)flash_real_protect(&flash_info[0], i, 1);
 #endif
 #endif
--- a/board/esd/cpciiser4/flash.c
+++ b/board/esd/cpciiser4/flash.c
@@ -74,7 +74,7 @@ unsigned long flash_init (void)

        /* Monitor protection ON by default */
        (void)flash_protect(FLAG_PROTECT_SET,
-                            -CFG_MONITOR_LEN,
+                            -monitor_flash_len,
                            0xffffffff,
                            &flash_info[0]);

--- a/board/esd/dasa_sim/flash.c
+++ b/board/esd/dasa_sim/flash.c
@@ -67,7 +67,7 @@ unsigned long flash_init (void)

        /* Monitor protection ON by default */
        (void)flash_protect(FLAG_PROTECT_SET,
-                            -CFG_MONITOR_LEN,
+                            -monitor_flash_len,
                            0xffffffff,
                            &flash_info[0]);

--- a/board/esd/du405/flash.c
+++ b/board/esd/du405/flash.c
@@ -94,7 +94,7 @@ unsigned long flash_init (void)

 	/* monitor protection ON by default */
 	flash_protect (FLAG_PROTECT_SET,
-			base_b0 + size_b0 - CFG_MONITOR_LEN,
+			base_b0 + size_b0 - monitor_flash_len,
 			base_b0 + size_b0 - 1, &flash_info[0]);

 	if (size_b1) {
@@ -105,11 +105,11 @@ unsigned long flash_init (void)

 		/* monitor protection ON by default */
 		flash_protect (FLAG_PROTECT_SET,
-				base_b1 + size_b1 - CFG_MONITOR_LEN,
+				base_b1 + size_b1 - monitor_flash_len,
 				base_b1 + size_b1 - 1, &flash_info[1]);
 		/* monitor protection OFF by default (one is enough) */
 		flash_protect (FLAG_PROTECT_CLEAR,
-				base_b0 + size_b0 - CFG_MONITOR_LEN,
+				base_b0 + size_b0 - monitor_flash_len,
 				base_b0 + size_b0 - 1, &flash_info[0]);
 	} else {
 		flash_info[1].flash_id = FLASH_UNKNOWN;
--- a/board/esd/ocrtc/flash.c
+++ b/board/esd/ocrtc/flash.c
@@ -127,7 +127,7 @@ unsigned long flash_init (void)

 	/* monitor protection ON by default */
 	flash_protect (FLAG_PROTECT_SET,
-			base_b0 + size_b0 - CFG_MONITOR_LEN,
+			base_b0 + size_b0 - monitor_flash_len,
 			base_b0 + size_b0 - 1, &flash_info[0]);

 	if (size_b1) {
@@ -138,11 +138,11 @@ unsigned long flash_init (void)

 		/* monitor protection ON by default */
 		flash_protect (FLAG_PROTECT_SET,
-				base_b1 + size_b1 - CFG_MONITOR_LEN,
+				base_b1 + size_b1 - monitor_flash_len,
 				base_b1 + size_b1 - 1, &flash_info[1]);
 		/* monitor protection OFF by default (one is enough) */
 		flash_protect (FLAG_PROTECT_CLEAR,
-				base_b0 + size_b0 - CFG_MONITOR_LEN,
+				base_b0 + size_b0 - monitor_flash_len,
 				base_b0 + size_b0 - 1, &flash_info[0]);
 	} else {
 		flash_info[1].flash_id = FLASH_UNKNOWN;
--- a/board/esd/pci405/cmd_pci405.c
+++ b/board/esd/pci405/cmd_pci405.c
@@ -36,66 +36,7 @@

 extern int do_bootm (cmd_tbl_t *, int, int, char *[]);

-#if 0 /* test-only */
-#include "../common/fpga.c"
-void error_print(void)
-{
-	int i;
-	volatile unsigned char *ptr;
-	volatile unsigned long *ptr2;
-	
-	printf("\n 2nd SJA1000:\n");
-	ptr = 0xf0000100;
-	for (i=0; i<0x20; i++) {
-		printf("%02x ", *ptr++);
-	}

-	ptr2 = 0xf0400008;
-	printf("\nTimestamp = %x\n", *ptr2);
-	udelay(1000);
-	printf("Timestamp = %x\n", *ptr2);
-	udelay(1000);
-	printf("Timestamp = %x\n", *ptr2);
-
-#if 0 /* test-only */
-	/*
-	 * Reset FPGA via FPGA_DATA pin
-	 */
-	printf("Resetting FPGA...\n");
-	SET_FPGA(FPGA_PRG | FPGA_CLK);
-	udelay(1000); /* wait 1ms */
-	SET_FPGA(FPGA_PRG | FPGA_CLK | FPGA_DATA);
-	udelay(1000); /* wait 1ms */
-
-	do_loadpci(NULL, 0,0, NULL);
-#endif
-}
-
-void read_loop(void)
-{
-	int i;
-	volatile unsigned char *ptr;
-	volatile unsigned char val;
-	volatile unsigned long *ptr2;
-
-	printf("\nread loop on 1st sja1000...");
-	while (1) {
-		ptr = 0xf0000000;
-/*		printf("\n1st SJA1000:\n");*/
-		for (i=0; i<0x20; i++) {
-			i = i;
-			val = *ptr++;
-/*			printf("%02x ", val);*/
-		}
-
-		/* Abort if ctrl-c was pressed */
-		if (ctrlc()) {
-			puts("\nAbort\n");
-			return 0;
-		}
-	}
-}
-#endif
 /*
 * Command loadpci: wait for signal from host and boot image.
 */
@@ -110,66 +51,6 @@ int do_loadpci(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 	char str[] = "\\|/-";
 	char *local_args[2];

-#if 0 /* test-only */
-	puts("\nStarting sja1000 test...");
-	{
-		int count;
-		volatile unsigned char *ptr;
-		volatile unsigned char val;
-		volatile unsigned char val2;
-
-#if 1 /* write test */
-		ptr = 0xf0000014;
-		for (i=1; i<11; i++)
-			*ptr++ = i;
-#endif
-		
-		count = 0;
-		while (1) {
-			count++;
-#if 0 /* write test */
-			ptr = 0xf0000014;
-			for (i=1; i<11; i++)
-				*ptr++ = i;
-#endif
-#if 1 /* read test */
-			ptr = 0xf0000014;
-			for (i=1; i<11; i++) {
-				val = *ptr++;
-#if 1
-				if (val != i) {
-					ptr = 0xf0000100;
-					val = *ptr; /* trigger las */
-
-					ptr = 0xf0000014;
-					val2 = *ptr;
-
-					printf("\nERROR: count=%d: soll=%x ist=%x -> staring read loop on 1st sja1000...\n",	count, i, val);
-
-					printf("soll=%x ist=%x -> staring read loop on 1st sja1000...\n", 1, val2);
-
-					return 0; /* test-only */
-					udelay(1000);
-					error_print();
-					read_loop();
-					return 0;
-				}
-#endif
-			}
-#endif
-
-			/* Abort if ctrl-c was pressed */
-			if (ctrlc()) {
-				puts("\nAbort\n");
-				return 0;
-			}
-
-			if (!(count % 100000)) {
-				printf(".");
-			}
-		}
-	}
-#endif
 	/*
 	 * Mark sync address
 	 */
@@ -212,13 +93,13 @@ int do_loadpci(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 		printf("\nStoring PCI Configuration Regs...\n");
 	} else {
 		sprintf(addr, "%08x", *ptr);
-		
+
 		/*
 		 * Boot image
 		 */
 		printf("\nBooting image at addr 0x%s ...\n", addr);
 		setenv("loadaddr", addr);
-		
+
 		local_args[0] = argv[0];
 		local_args[1] = NULL;
 		status = do_bootm (cmdtp, 0, 1, local_args);
--- a/board/esd/pci405/flash.c
+++ b/board/esd/pci405/flash.c
@@ -91,7 +91,7 @@ unsigned long flash_init (void)

        /* Monitor protection ON by default */
        (void)flash_protect(FLAG_PROTECT_SET,
-                            -CFG_MONITOR_LEN,
+                            -monitor_flash_len,
                            0xffffffff,
                            &flash_info[0]);

--- a/board/esd/pci405/fpgadata.c
+++ b/board/esd/pci405/fpgadata.c
--- a/board/esd/pci405/pci405.c
+++ b/board/esd/pci405/pci405.c
@@ -84,6 +84,11 @@ int board_pre_init (void)
 	cntrl0Reg = mfdcr(cntrl0);
 	mtdcr(cntrl0, cntrl0Reg | 0x00008000);

+	/*
+	 * EBC Configuration Register: set ready timeout to 512 ebc-clks -> ca. 25 us
+	 */
+	mtebc (epcr, 0xa8400000); /* ebc always driven */
+
 	return 0;
 }

@@ -186,7 +191,7 @@ int misc_init_r (void)
 			}
 		}
 		mtdcr(uicsr, 0xFFFFFFFF);        /* clear all ints */
-		
+
 		*magic = 0;      /* clear pci reconfig magic again */
 	}

--- a/board/esd/pmc405/Makefile
+++ b/board/esd/pmc405/Makefile
@@ -0,0 +1,46 @@
+#
+# (C) Copyright 2000, 2001
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB	= lib$(BOARD).a
+
+OBJS	= $(BOARD).o strataflash.o
+
+$(LIB):	$(OBJS) $(SOBJS)
+	$(AR) crv $@ $^
+
+clean:
+	rm -f $(SOBJS) $(OBJS)
+
+distclean:	clean
+	rm -f $(LIB) core *.bak .depend
+
+#########################################################################
+
+.depend:	Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
+		$(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
+
+sinclude .depend
+
+#########################################################################
--- a/board/esd/pmc405/config.mk
+++ b/board/esd/pmc405/config.mk
@@ -0,0 +1,28 @@
+#
+# (C) Copyright 2000, 2001
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+#
+# esd PMC405 boards
+#
+
+TEXT_BASE = 0xFFFC0000
--- a/board/esd/pmc405/pmc405.c
+++ b/board/esd/pmc405/pmc405.c
@@ -0,0 +1,229 @@
+/*
+ * (C) Copyright 2001-2003
+ * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/processor.h>
+#include <command.h>
+#include <cmd_boot.h>
+#include <malloc.h>
+
+/* ------------------------------------------------------------------------- */
+
+
+/* Prototypes */
+int gunzip(void *, int, unsigned char *, int *);
+
+
+int board_pre_init (void)
+{
+	/*
+	 * IRQ 0-15  405GP internally generated; active high; level sensitive
+	 * IRQ 16    405GP internally generated; active low; level sensitive
+	 * IRQ 17-24 RESERVED
+	 * IRQ 25 (EXT IRQ 0) CAN0; active low; level sensitive
+	 * IRQ 26 (EXT IRQ 1) SER0 ; active low; level sensitive
+	 * IRQ 27 (EXT IRQ 2) SER1; active low; level sensitive
+	 * IRQ 28 (EXT IRQ 3) FPGA 0; active low; level sensitive
+	 * IRQ 29 (EXT IRQ 4) FPGA 1; active low; level sensitive
+	 * IRQ 30 (EXT IRQ 5) PCI INTA; active low; level sensitive
+	 * IRQ 31 (EXT IRQ 6) COMPACT FLASH; active high; level sensitive
+	 */
+	mtdcr(uicsr, 0xFFFFFFFF);       /* clear all ints */
+	mtdcr(uicer, 0x00000000);       /* disable all ints */
+	mtdcr(uiccr, 0x00000000);       /* set all to be non-critical*/
+	mtdcr(uicpr, 0xFFFFFF81);       /* set int polarities */
+	mtdcr(uictr, 0x10000000);       /* set int trigger levels */
+	mtdcr(uicvcr, 0x00000001);      /* set vect base=0,INT0 highest priority*/
+	mtdcr(uicsr, 0xFFFFFFFF);       /* clear all ints */
+
+	/*
+	 * EBC Configuration Register: set ready timeout to 512 ebc-clks -> ca. 15 us
+	 */
+	mtebc (epcr, 0xa8400000);
+
+	return 0;
+}
+
+
+/* ------------------------------------------------------------------------- */
+
+int misc_init_f (void)
+{
+	return 0;  /* dummy implementation */
+}
+
+
+int misc_init_r (void)
+{
+#if 0 /* test-only */
+	DECLARE_GLOBAL_DATA_PTR;
+	volatile unsigned short *fpga_mode =
+		(unsigned short *)((ulong)CFG_FPGA_BASE_ADDR + CFG_FPGA_CTRL);
+	volatile unsigned char *duart0_mcr =
+		(unsigned char *)((ulong)DUART0_BA + 4);
+	volatile unsigned char *duart1_mcr =
+		(unsigned char *)((ulong)DUART1_BA + 4);
+	bd_t *bd = gd->bd;
+	char *	tmp;                    /* Temporary char pointer      */
+	unsigned char *dst;
+	ulong len = sizeof(fpgadata);
+	int status;
+	int index;
+	int i;
+	unsigned long cntrl0Reg;
+
+	/*
+	 * Setup GPIO pins (CS6+CS7 as GPIO)
+	 */
+	cntrl0Reg = mfdcr(cntrl0);
+	mtdcr(cntrl0, cntrl0Reg | 0x00300000);
+
+	dst = malloc(CFG_FPGA_MAX_SIZE);
+	if (gunzip (dst, CFG_FPGA_MAX_SIZE, (uchar *)fpgadata, (int *)&len) != 0) {
+		printf ("GUNZIP ERROR - must RESET board to recover\n");
+		do_reset (NULL, 0, 0, NULL);
+	}
+
+	status = fpga_boot(dst, len);
+	if (status != 0) {
+		printf("\nFPGA: Booting failed ");
+		switch (status) {
+		case ERROR_FPGA_PRG_INIT_LOW:
+			printf("(Timeout: INIT not low after asserting PROGRAM*)\n ");
+			break;
+		case ERROR_FPGA_PRG_INIT_HIGH:
+			printf("(Timeout: INIT not high after deasserting PROGRAM*)\n ");
+			break;
+		case ERROR_FPGA_PRG_DONE:
+			printf("(Timeout: DONE not high after programming FPGA)\n ");
+			break;
+		}
+
+		/* display infos on fpgaimage */
+		index = 15;
+		for (i=0; i<4; i++) {
+			len = dst[index];
+			printf("FPGA: %s\n", &(dst[index+1]));
+			index += len+3;
+		}
+		putc ('\n');
+		/* delayed reboot */
+		for (i=20; i>0; i--) {
+			printf("Rebooting in %2d seconds \r",i);
+			for (index=0;index<1000;index++)
+				udelay(1000);
+		}
+		putc ('\n');
+		do_reset(NULL, 0, 0, NULL);
+	}
+
+	/* restore gpio/cs settings */
+	mtdcr(cntrl0, cntrl0Reg);
+
+	puts("FPGA:  ");
+
+	/* display infos on fpgaimage */
+	index = 15;
+	for (i=0; i<4; i++) {
+		len = dst[index];
+		printf("%s ", &(dst[index+1]));
+		index += len+3;
+	}
+	putc ('\n');
+
+	free(dst);
+
+	/*
+	 * Reset FPGA via FPGA_DATA pin
+	 */
+	SET_FPGA(FPGA_PRG | FPGA_CLK);
+	udelay(1000); /* wait 1ms */
+	SET_FPGA(FPGA_PRG | FPGA_CLK | FPGA_DATA);
+	udelay(1000); /* wait 1ms */
+
+	/*
+	 * Enable power on PS/2 interface
+	 */
+	*fpga_mode |= CFG_FPGA_CTRL_PS2_RESET;
+
+	/*
+	 * Enable interrupts in exar duart mcr[3]
+	 */
+	*duart0_mcr = 0x08;
+	*duart1_mcr = 0x08;
+#endif
+
+	return (0);
+}
+
+
+/*
+ * Check Board Identity:
+ */
+
+int checkboard (void)
+{
+	unsigned char str[64];
+	int i = getenv_r ("serial#", str, sizeof(str));
+
+	puts ("Board: ");
+
+	if (i == -1) {
+		puts ("### No HW ID - assuming ABG405");
+	} else {
+		puts(str);
+	}
+
+	putc ('\n');
+
+	return 0;
+}
+
+/* ------------------------------------------------------------------------- */
+
+long int initdram (int board_type)
+{
+	unsigned long val;
+
+	mtdcr(memcfga, mem_mb0cf);
+	val = mfdcr(memcfgd);
+
+#if 0
+	printf("\nmb0cf=%x\n", val); /* test-only */
+	printf("strap=%x\n", mfdcr(strap)); /* test-only */
+#endif
+
+	return (4*1024*1024 << ((val & 0x000e0000) >> 17));
+}
+
+/* ------------------------------------------------------------------------- */
+
+int testdram (void)
+{
+	/* TODO: XXX XXX XXX */
+	printf ("test: 16 MB - ok\n");
+
+	return (0);
+}
+
+/* ------------------------------------------------------------------------- */
--- a/board/esd/pmc405/strataflash.c
+++ b/board/esd/pmc405/strataflash.c
@@ -0,0 +1,796 @@
+/*
+ * (C) Copyright 2002
+ * Brad Kemp, Seranoa Networks, Brad.Kemp@seranoa.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/processor.h>
+
+#undef  DEBUG_FLASH 
+/*
+ * This file implements a Common Flash Interface (CFI) driver for ppcboot.
+ * The width of the port and the width of the chips are determined at initialization.
+ * These widths are used to calculate the address for access CFI data structures.
+ * It has been tested on an Intel Strataflash implementation.
+ *
+ * References
+ * JEDEC Standard JESD68 - Common Flash Interface (CFI)
+ * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes
+ * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets
+ * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet
+ *
+ * TODO
+ * Use Primary Extended Query table (PRI) and Alternate Algorithm Query Table (ALT) to determine if protection is available
+ * Add support for other command sets Use the PRI and ALT to determine command set
+ * Verify erase and program timeouts.
+ */
+
+#define FLASH_CMD_CFI			0x98
+#define FLASH_CMD_READ_ID		0x90
+#define FLASH_CMD_RESET			0xff
+#define FLASH_CMD_BLOCK_ERASE		0x20
+#define FLASH_CMD_ERASE_CONFIRM		0xD0
+#define FLASH_CMD_WRITE			0x40
+#define FLASH_CMD_PROTECT		0x60
+#define FLASH_CMD_PROTECT_SET		0x01
+#define FLASH_CMD_PROTECT_CLEAR		0xD0
+#define FLASH_CMD_CLEAR_STATUS		0x50
+#define FLASH_CMD_WRITE_TO_BUFFER       0xE8
+#define FLASH_CMD_WRITE_BUFFER_CONFIRM  0xD0
+
+#define FLASH_STATUS_DONE		0x80
+#define FLASH_STATUS_ESS		0x40
+#define FLASH_STATUS_ECLBS		0x20
+#define FLASH_STATUS_PSLBS		0x10
+#define FLASH_STATUS_VPENS		0x08
+#define FLASH_STATUS_PSS		0x04
+#define FLASH_STATUS_DPS		0x02
+#define FLASH_STATUS_R			0x01
+#define FLASH_STATUS_PROTECT		0x01
+
+#define FLASH_OFFSET_CFI		0x55
+#define FLASH_OFFSET_CFI_RESP		0x10
+#define FLASH_OFFSET_WTOUT		0x1F
+#define FLASH_OFFSET_WBTOUT             0x20
+#define FLASH_OFFSET_ETOUT		0x21
+#define FLASH_OFFSET_CETOUT             0x22
+#define FLASH_OFFSET_WMAX_TOUT		0x23
+#define FLASH_OFFSET_WBMAX_TOUT         0x24
+#define FLASH_OFFSET_EMAX_TOUT		0x25
+#define FLASH_OFFSET_CEMAX_TOUT         0x26
+#define FLASH_OFFSET_SIZE		0x27
+#define FLASH_OFFSET_INTERFACE          0x28
+#define FLASH_OFFSET_BUFFER_SIZE        0x2A
+#define FLASH_OFFSET_NUM_ERASE_REGIONS	0x2C
+#define FLASH_OFFSET_ERASE_REGIONS	0x2D
+#define FLASH_OFFSET_PROTECT		0x02
+#define FLASH_OFFSET_USER_PROTECTION    0x85
+#define FLASH_OFFSET_INTEL_PROTECTION   0x81
+
+
+#define FLASH_MAN_CFI			0x01000000
+
+
+
+
+typedef union {
+	unsigned char c;
+	unsigned short w;
+	unsigned long l;
+} cfiword_t;
+
+typedef union {
+	unsigned char * cp;
+	unsigned short *wp;
+	unsigned long *lp;
+} cfiptr_t;
+
+#define NUM_ERASE_REGIONS 4
+
+flash_info_t	flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips	*/
+
+
+/*-----------------------------------------------------------------------
+ * Functions
+ */
+
+
+
+static void flash_add_byte(flash_info_t *info, cfiword_t * cword, uchar c);
+static void flash_make_cmd(flash_info_t * info, uchar cmd, void * cmdbuf);
+static void flash_write_cmd(flash_info_t * info, int sect, uchar offset, uchar cmd);
+static int flash_isequal(flash_info_t * info, int sect, uchar offset, uchar cmd);
+static int flash_isset(flash_info_t * info, int sect, uchar offset, uchar cmd);
+static int flash_detect_cfi(flash_info_t * info);
+static ulong flash_get_size (ulong base, int banknum);
+static int flash_write_cfiword (flash_info_t *info, ulong dest, cfiword_t cword);
+static int flash_full_status_check(flash_info_t * info, ulong sector, ulong tout, char * prompt);
+#ifdef CFG_FLASH_USE_BUFFER_WRITE
+static int flash_write_cfibuffer(flash_info_t * info, ulong dest, uchar * cp, int len);
+#endif
+/*-----------------------------------------------------------------------
+ * create an address based on the offset and the port width
+ */
+inline uchar * flash_make_addr(flash_info_t * info, int sect, int offset)
+{
+	return ((uchar *)(info->start[sect] + (offset * info->portwidth)));
+}
+/*-----------------------------------------------------------------------
+ * read a character at a port width address
+ */
+inline uchar flash_read_uchar(flash_info_t * info, uchar offset)
+{
+	uchar *cp;
+	cp = flash_make_addr(info, 0, offset);
+	return (cp[info->portwidth - 1]);
+}
+
+/*-----------------------------------------------------------------------
+ * read a short word by swapping for ppc format.
+ */
+ushort flash_read_ushort(flash_info_t * info, int sect,  uchar offset)
+{
+    uchar * addr;
+
+    addr = flash_make_addr(info, sect, offset);
+    return ((addr[(2*info->portwidth) - 1] << 8) | addr[info->portwidth - 1]);
+
+}
+
+/*-----------------------------------------------------------------------
+ * read a long word by picking the least significant byte of each maiximum
+ * port size word. Swap for ppc format.
+ */
+ulong flash_read_long(flash_info_t * info, int sect,  uchar offset)
+{
+    uchar * addr;
+
+    addr = flash_make_addr(info, sect, offset);
+    return ( (addr[(2*info->portwidth) - 1] << 24 ) | (addr[(info->portwidth) -1] << 16) |
+	    (addr[(4*info->portwidth) - 1] << 8) | addr[(3*info->portwidth) - 1]);
+
+}
+
+/*-----------------------------------------------------------------------
+ */
+unsigned long flash_init (void)
+{
+	unsigned long size;
+	int i;
+	unsigned long  address;
+
+
+	/* The flash is positioned back to back, with the demultiplexing of the chip
+	 * based on the A24 address line.
+	 *
+	 */
+
+	address = CFG_FLASH_BASE;
+	size = 0;
+
+	/* Init: no FLASHes known */
+	for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
+		flash_info[i].flash_id = FLASH_UNKNOWN;
+		size += flash_info[i].size = flash_get_size(address, i);
+		address += CFG_FLASH_INCREMENT;
+		if (flash_info[0].flash_id == FLASH_UNKNOWN) {
+			printf ("## Unknown FLASH on Bank %d - Size = 0x%08lx = %ld MB\n",i,
+				flash_info[0].size, flash_info[i].size<<20);
+		}
+	}
+
+#if 0 /* test-only */
+	/* Monitor protection ON by default */
+#if (CFG_MONITOR_BASE >= CFG_FLASH_BASE)
+	for(i=0; flash_info[0].start[i] < CFG_MONITOR_BASE+CFG_MONITOR_LEN-1; i++)
+		(void)flash_real_protect(&flash_info[0], i, 1);
+#endif
+#else
+	/* monitor protection ON by default */
+	flash_protect (FLAG_PROTECT_SET,
+		       - CFG_MONITOR_LEN,
+		       - 1, &flash_info[1]);
+#endif
+
+	return (size);
+}
+
+/*-----------------------------------------------------------------------
+ */
+int flash_erase (flash_info_t *info, int s_first, int s_last)
+{
+	int rcode = 0;
+	int prot;
+	int sect;
+
+	if( info->flash_id != FLASH_MAN_CFI) {
+		printf ("Can't erase unknown flash type - aborted\n");
+		return 1;
+	}
+	if ((s_first < 0) || (s_first > s_last)) {
+		printf ("- no sectors to erase\n");
+		return 1;
+	}
+
+	prot = 0;
+	for (sect=s_first; sect<=s_last; ++sect) {
+		if (info->protect[sect]) {
+			prot++;
+		}
+	}
+	if (prot) {
+		printf ("- Warning: %d protected sectors will not be erased!\n",
+			prot);
+	} else {
+		printf ("\n");
+	}
+
+
+	for (sect = s_first; sect<=s_last; sect++) {
+		if (info->protect[sect] == 0) { /* not protected */
+			flash_write_cmd(info, sect, 0, FLASH_CMD_CLEAR_STATUS);
+			flash_write_cmd(info, sect, 0, FLASH_CMD_BLOCK_ERASE);
+			flash_write_cmd(info, sect, 0, FLASH_CMD_ERASE_CONFIRM);
+			
+			if(flash_full_status_check(info, sect, info->erase_blk_tout, "erase")) {
+				rcode = 1;
+			} else
+				printf(".");
+		}
+	}
+	printf (" done\n");
+	return rcode;
+}
+
+/*-----------------------------------------------------------------------
+ */
+void flash_print_info  (flash_info_t *info)
+{
+	int i;
+
+	if (info->flash_id != FLASH_MAN_CFI) {
+		printf ("missing or unknown FLASH type\n");
+		return;
+	}
+
+	printf("CFI conformant FLASH (%d x %d)",
+	       (info->portwidth	 << 3 ), (info->chipwidth  << 3 ));
+	printf ("  Size: %ld MB in %d Sectors\n",
+		info->size >> 20, info->sector_count);
+	printf(" Erase timeout %ld ms, write timeout %ld ms, buffer write timeout %ld ms, buffer size %d\n",
+	       info->erase_blk_tout, info->write_tout, info->buffer_write_tout, info->buffer_size);
+      
+	printf ("  Sector Start Addresses:");
+	for (i=0; i<info->sector_count; ++i) {
+#ifdef CFG_FLASH_EMPTY_INFO
+		int k;
+		int size;
+		int erased;
+		volatile unsigned long *flash;
+
+                /*
+                 * Check if whole sector is erased
+                 */
+                if (i != (info->sector_count-1))
+                  size = info->start[i+1] - info->start[i];
+                else
+                  size = info->start[0] + info->size - info->start[i];
+                erased = 1;
+                flash = (volatile unsigned long *)info->start[i];
+                size = size >> 2;        /* divide by 4 for longword access */
+                for (k=0; k<size; k++)
+                  {
+                    if (*flash++ != 0xffffffff)
+                      {
+                        erased = 0;
+                        break;
+                      }
+                  }
+
+		if ((i % 5) == 0)
+			printf ("\n   ");
+                /* print empty and read-only info */
+		printf (" %08lX%s%s",
+			info->start[i],
+			erased ? " E" : "  ",
+			info->protect[i] ? "RO " : "   ");
+#else
+		if ((i % 5) == 0)
+			printf ("\n   ");
+		printf (" %08lX%s",
+			info->start[i],
+			info->protect[i] ? " (RO)" : "     ");
+#endif
+	}
+	printf ("\n");
+	return;
+}
+
+/*-----------------------------------------------------------------------
+ * Copy memory to flash, returns:
+ * 0 - OK
+ * 1 - write timeout
+ * 2 - Flash not erased
+ */
+int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
+{
+	ulong wp;
+	ulong cp;
+	int aln;
+	cfiword_t cword;
+	int i, rc;
+
+	/* get lower aligned address */
+	wp = (addr & ~(info->portwidth - 1));
+
+	/* handle unaligned start */
+	if((aln = addr - wp) != 0) {
+		cword.l = 0;
+		cp = wp;
+		for(i=0;i<aln; ++i, ++cp)
+			flash_add_byte(info, &cword, (*(uchar *)cp));
+
+		for(; (i< info->portwidth) && (cnt > 0) ; i++) {
+			flash_add_byte(info, &cword, *src++);
+			cnt--;
+			cp++;
+		}
+		for(; (cnt == 0) && (i < info->portwidth); ++i, ++cp)
+			flash_add_byte(info, &cword, (*(uchar *)cp));
+		if((rc = flash_write_cfiword(info, wp, cword)) != 0)
+			return rc;
+		wp = cp;
+	}
+
+#ifdef CFG_FLASH_USE_BUFFER_WRITE
+	while(cnt >= info->portwidth) {
+		i = info->buffer_size > cnt? cnt: info->buffer_size;
+		if((rc = flash_write_cfibuffer(info, wp, src,i)) != ERR_OK)
+			return rc;
+		wp += i;
+		src += i;
+		cnt -=i;
+	}
+#else
+	/* handle the aligned part */
+	while(cnt >= info->portwidth) {
+		cword.l = 0;
+		for(i = 0; i < info->portwidth; i++) {
+			flash_add_byte(info, &cword, *src++);
+		}
+		if((rc = flash_write_cfiword(info, wp, cword)) != 0)
+			return rc;
+		wp += info->portwidth;
+		cnt -= info->portwidth;
+	}
+#endif /* CFG_FLASH_USE_BUFFER_WRITE */
+	if (cnt == 0) {
+		return (0);
+	}
+
+	/*
+	 * handle unaligned tail bytes
+	 */
+	cword.l = 0;
+	for (i=0, cp=wp; (i<info->portwidth) && (cnt>0); ++i, ++cp) {
+		flash_add_byte(info, &cword, *src++);
+		--cnt;
+	}
+	for (; i<info->portwidth; ++i, ++cp) {
+		flash_add_byte(info, & cword, (*(uchar *)cp));
+	}
+
+	return flash_write_cfiword(info, wp, cword);
+}
+
+/*-----------------------------------------------------------------------
+ */
+int flash_real_protect(flash_info_t *info, long sector, int prot)
+{
+	int retcode = 0;
+
+	flash_write_cmd(info, sector, 0, FLASH_CMD_CLEAR_STATUS);
+	flash_write_cmd(info, sector, 0, FLASH_CMD_PROTECT);
+	if(prot)
+		flash_write_cmd(info, sector, 0, FLASH_CMD_PROTECT_SET);
+	else
+		flash_write_cmd(info, sector, 0, FLASH_CMD_PROTECT_CLEAR);
+
+	if((retcode = flash_full_status_check(info, sector, info->erase_blk_tout, 
+					 prot?"protect":"unprotect")) == 0) {
+
+		info->protect[sector] = prot;
+		/* Intel's unprotect unprotects all locking */
+		if(prot == 0) {
+			int i;
+			for(i = 0 ; i<info->sector_count; i++) {
+				if(info->protect[i])
+					flash_real_protect(info, i, 1);
+			}
+		}
+	}
+
+	return retcode;
+}
+/*-----------------------------------------------------------------------
+ *  wait for XSR.7 to be set. Time out with an error if it does not.
+ *  This routine does not set the flash to read-array mode.
+ */
+static int flash_status_check(flash_info_t * info, ulong sector, ulong tout, char * prompt)
+{
+	ulong start;
+
+	/* Wait for command completion */
+	start = get_timer (0);
+	while(!flash_isset(info, sector, 0, FLASH_STATUS_DONE)) {
+		if (get_timer(start) > info->erase_blk_tout) {
+			printf("Flash %s timeout at address %lx\n", prompt, info->start[sector]);
+			flash_write_cmd(info, sector, 0, FLASH_CMD_RESET);
+			return ERR_TIMOUT;
+		}
+	}
+	return ERR_OK;
+}
+/*-----------------------------------------------------------------------
+ * Wait for XSR.7 to be set, if it times out print an error, otherwise do a full status check.
+ * This routine sets the flash to read-array mode.
+ */
+static int flash_full_status_check(flash_info_t * info, ulong sector, ulong tout, char * prompt)
+{
+	int retcode;
+	retcode = flash_status_check(info, sector, tout, prompt);
+	if((retcode == ERR_OK) && !flash_isequal(info,sector, 0, FLASH_STATUS_DONE)) {
+		retcode = ERR_INVAL;
+		printf("Flash %s error at address %lx\n", prompt,info->start[sector]);
+		if(flash_isset(info, sector, 0, FLASH_STATUS_ECLBS | FLASH_STATUS_PSLBS)){
+			printf("Command Sequence Error.\n");
+		} else if(flash_isset(info, sector, 0, FLASH_STATUS_ECLBS)){
+			printf("Block Erase Error.\n");
+		        retcode = ERR_NOT_ERASED;
+		} else if (flash_isset(info, sector, 0, FLASH_STATUS_PSLBS)) {
+			printf("Locking Error\n");
+		}
+		if(flash_isset(info, sector, 0, FLASH_STATUS_DPS)){
+			printf("Block locked.\n");
+			retcode = ERR_PROTECTED;
+		}
+		if(flash_isset(info, sector, 0, FLASH_STATUS_VPENS))
+			printf("Vpp Low Error.\n");
+	}
+	flash_write_cmd(info, sector, 0, FLASH_CMD_RESET);
+	return retcode;
+}
+/*-----------------------------------------------------------------------
+ */
+static void flash_add_byte(flash_info_t *info, cfiword_t * cword, uchar c)
+{
+	switch(info->portwidth) {
+	case FLASH_CFI_8BIT:
+		cword->c = c;
+		break;
+	case FLASH_CFI_16BIT:
+		cword->w = (cword->w << 8) | c;
+		break;
+	case FLASH_CFI_32BIT:
+		cword->l = (cword->l << 8) | c;
+	}
+}
+
+
+/*-----------------------------------------------------------------------
+ * make a proper sized command based on the port and chip widths
+ */
+static void flash_make_cmd(flash_info_t * info, uchar cmd, void * cmdbuf)
+{
+	int i;
+	uchar *cp = (uchar *)cmdbuf;
+	for(i=0; i< info->portwidth; i++)
+		*cp++ = ((i+1) % info->chipwidth) ? '\0':cmd;
+}
+
+/*
+ * Write a proper sized command to the correct address
+ */
+static void flash_write_cmd(flash_info_t * info, int sect, uchar offset, uchar cmd)
+{
+
+	volatile cfiptr_t addr;
+	cfiword_t cword;
+	addr.cp = flash_make_addr(info, sect, offset);
+	flash_make_cmd(info, cmd, &cword);
+	switch(info->portwidth) {
+	case FLASH_CFI_8BIT:
+		*addr.cp = cword.c;
+		break;
+	case FLASH_CFI_16BIT:
+		*addr.wp = cword.w;
+		break;
+	case FLASH_CFI_32BIT:
+		*addr.lp = cword.l;
+		break;
+	}
+}
+
+/*-----------------------------------------------------------------------
+ */
+static int flash_isequal(flash_info_t * info, int sect, uchar offset, uchar cmd)
+{
+	cfiptr_t cptr;
+	cfiword_t cword;
+	int retval;
+	cptr.cp = flash_make_addr(info, sect, offset);
+	flash_make_cmd(info, cmd, &cword);
+	switch(info->portwidth) {
+	case FLASH_CFI_8BIT:
+		retval = (cptr.cp[0] == cword.c);
+		break;
+	case FLASH_CFI_16BIT:
+		retval = (cptr.wp[0] == cword.w);
+		break;
+	case FLASH_CFI_32BIT:
+		retval = (cptr.lp[0] == cword.l);
+		break;
+	default:
+		retval = 0;
+		break;
+	}
+	return retval;
+}
+/*-----------------------------------------------------------------------
+ */
+static int flash_isset(flash_info_t * info, int sect, uchar offset, uchar cmd)
+{
+	cfiptr_t cptr;
+	cfiword_t cword;
+	int retval;
+	cptr.cp = flash_make_addr(info, sect, offset);
+	flash_make_cmd(info, cmd, &cword);
+	switch(info->portwidth) {
+	case FLASH_CFI_8BIT:
+		retval = ((cptr.cp[0] & cword.c) == cword.c);
+		break;
+	case FLASH_CFI_16BIT:
+		retval = ((cptr.wp[0] & cword.w) == cword.w);
+		break;
+	case FLASH_CFI_32BIT:
+		retval = ((cptr.lp[0] & cword.l) == cword.l);
+		break;
+	default:
+		retval = 0;
+		break;
+	}
+	return retval;
+}
+
+/*-----------------------------------------------------------------------
+ * detect if flash is compatible with the Common Flash Interface (CFI)
+ * http://www.jedec.org/download/search/jesd68.pdf
+ *
+*/
+static int flash_detect_cfi(flash_info_t * info)
+{
+
+	for(info->portwidth=FLASH_CFI_8BIT; info->portwidth <= FLASH_CFI_32BIT;
+	    info->portwidth <<= 1) {
+		for(info->chipwidth =FLASH_CFI_BY8;
+		    info->chipwidth <= info->portwidth;
+		    info->chipwidth <<= 1) {
+			flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
+			flash_write_cmd(info, 0, FLASH_OFFSET_CFI, FLASH_CMD_CFI);
+			if(flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP,'Q') &&
+			   flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R') &&
+			   flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y'))
+				return 1;
+		}
+	}
+	return 0;
+}
+/*
+ * The following code cannot be run from FLASH!
+ *
+ */
+static ulong flash_get_size (ulong base, int banknum)
+{
+	flash_info_t * info = &flash_info[banknum];
+	int i, j;
+	int sect_cnt;
+	unsigned long sector;
+	unsigned long tmp;
+	int size_ratio;
+	uchar num_erase_regions;
+	int  erase_region_size;
+	int  erase_region_count;
+
+	info->start[0] = base;
+
+	if(flash_detect_cfi(info)){
+#ifdef DEBUG_FLASH
+		printf("portwidth=%d chipwidth=%d\n", info->portwidth, info->chipwidth); /* test-only */
+#endif
+		size_ratio = info->portwidth / info->chipwidth;
+		num_erase_regions = flash_read_uchar(info, FLASH_OFFSET_NUM_ERASE_REGIONS);
+#ifdef DEBUG_FLASH
+		printf("found %d erase regions\n", num_erase_regions);
+#endif
+		sect_cnt = 0;
+		sector = base;
+		for(i = 0 ; i < num_erase_regions; i++) {
+			if(i > NUM_ERASE_REGIONS) {
+				printf("%d erase regions found, only %d used\n",
+				       num_erase_regions, NUM_ERASE_REGIONS);
+				break;
+			}
+			tmp = flash_read_long(info, 0, FLASH_OFFSET_ERASE_REGIONS);
+			erase_region_size = (tmp & 0xffff)? ((tmp & 0xffff) * 256): 128;
+			tmp >>= 16;
+			erase_region_count = (tmp & 0xffff) +1;
+			for(j = 0; j< erase_region_count; j++) {
+				info->start[sect_cnt] = sector;
+				sector += (erase_region_size * size_ratio);
+				info->protect[sect_cnt] = flash_isset(info, sect_cnt, FLASH_OFFSET_PROTECT, FLASH_STATUS_PROTECT);
+				sect_cnt++;
+			}
+		}
+
+		info->sector_count = sect_cnt;
+		/* multiply the size by the number of chips */
+		info->size = (1 << flash_read_uchar(info, FLASH_OFFSET_SIZE)) * size_ratio;
+		info->buffer_size = (1 << flash_read_ushort(info, 0, FLASH_OFFSET_BUFFER_SIZE));
+		tmp = 1 << flash_read_uchar(info, FLASH_OFFSET_ETOUT);
+		info->erase_blk_tout = (tmp * (1 << flash_read_uchar(info, FLASH_OFFSET_EMAX_TOUT)));
+		tmp = 1 << flash_read_uchar(info, FLASH_OFFSET_WBTOUT);
+		info->buffer_write_tout = (tmp * (1 << flash_read_uchar(info, FLASH_OFFSET_WBMAX_TOUT)));
+		tmp = 1 << flash_read_uchar(info, FLASH_OFFSET_WTOUT);
+		info->write_tout = (tmp * (1 << flash_read_uchar(info, FLASH_OFFSET_WMAX_TOUT)))/ 1000;
+		info->flash_id = FLASH_MAN_CFI;
+	}
+
+	flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
+	return(info->size);
+}
+
+
+/*-----------------------------------------------------------------------
+ */
+static int flash_write_cfiword (flash_info_t *info, ulong dest, cfiword_t cword)
+{
+
+	cfiptr_t ctladdr;
+	cfiptr_t cptr;
+	int flag;
+
+	ctladdr.cp = flash_make_addr(info, 0, 0);
+	cptr.cp = (uchar *)dest;
+
+
+	/* Check if Flash is (sufficiently) erased */
+	switch(info->portwidth) {
+	case FLASH_CFI_8BIT:
+		flag = ((cptr.cp[0] & cword.c) == cword.c);
+		break;
+	case FLASH_CFI_16BIT:
+		flag = ((cptr.wp[0] & cword.w) == cword.w);
+		break;
+	case FLASH_CFI_32BIT:
+		flag = ((cptr.lp[0] & cword.l)	== cword.l);
+		break;
+	default:
+		return 2;
+	}
+	if(!flag)
+		return 2;
+
+	/* Disable interrupts which might cause a timeout here */
+	flag = disable_interrupts();
+
+	flash_write_cmd(info, 0, 0, FLASH_CMD_CLEAR_STATUS);
+	flash_write_cmd(info, 0, 0, FLASH_CMD_WRITE);
+
+	switch(info->portwidth) {
+	case FLASH_CFI_8BIT:
+		cptr.cp[0] = cword.c;
+		break;
+	case FLASH_CFI_16BIT:
+		cptr.wp[0] = cword.w;
+		break;
+	case FLASH_CFI_32BIT:
+		cptr.lp[0] = cword.l;
+		break;
+	}
+
+	/* re-enable interrupts if necessary */
+	if(flag)
+		enable_interrupts();
+
+	return flash_full_status_check(info, 0, info->write_tout, "write");
+}
+
+#ifdef CFG_FLASH_USE_BUFFER_WRITE
+
+/* loop through the sectors from the highest address
+ * when the passed address is greater or equal to the sector address
+ * we have a match
+ */
+static int find_sector(flash_info_t *info, ulong addr)
+{
+	int sector;
+	for(sector = info->sector_count - 1; sector >= 0; sector--) {
+		if(addr >= info->start[sector]) 
+			break;
+	}
+	return sector;
+}
+
+static int flash_write_cfibuffer(flash_info_t * info, ulong dest, uchar * cp, int len)
+{
+	
+	int sector;
+	int cnt;
+	int retcode;
+	volatile cfiptr_t src;
+	volatile cfiptr_t dst;
+
+	src.cp = cp;
+	dst.cp = (uchar *)dest;
+	sector = find_sector(info, dest);
+	flash_write_cmd(info, sector, 0, FLASH_CMD_CLEAR_STATUS);
+	flash_write_cmd(info, sector, 0, FLASH_CMD_WRITE_TO_BUFFER);
+	if((retcode = flash_status_check(info, sector, info->buffer_write_tout,
+					 "write to buffer")) == ERR_OK) {
+		switch(info->portwidth) {
+		case FLASH_CFI_8BIT:
+			cnt = len;
+			break;
+		case FLASH_CFI_16BIT:
+			cnt = len >> 1;
+			break;
+		case FLASH_CFI_32BIT:
+			cnt = len >> 2;
+			break;
+		default:
+			return ERR_INVAL;
+			break;
+		}
+		flash_write_cmd(info, sector, 0, (uchar)cnt-1);
+		while(cnt-- > 0) {
+			switch(info->portwidth) {
+			case FLASH_CFI_8BIT:
+				*dst.cp++ = *src.cp++;
+				break;
+			case FLASH_CFI_16BIT:
+				*dst.wp++ = *src.wp++;
+				break;
+			case FLASH_CFI_32BIT:
+				*dst.lp++ = *src.lp++;
+				break;
+			default:
+				return ERR_INVAL;
+				break;
+			}
+		}
+		flash_write_cmd(info, sector, 0, FLASH_CMD_WRITE_BUFFER_CONFIRM);
+		retcode = flash_full_status_check(info, sector, info->buffer_write_tout,
+					     "buffer write");
+	} 
+	flash_write_cmd(info, sector, 0, FLASH_CMD_CLEAR_STATUS);
+	return retcode;
+}	
+#endif /* CFG_USE_FLASH_BUFFER_WRITE */
--- a/board/esd/pmc405/u-boot.lds
+++ b/board/esd/pmc405/u-boot.lds
@@ -0,0 +1,142 @@
+/*
+ * (C) Copyright 2000, 2001
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_ARCH(powerpc)
+SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
+/* Do we need any of these for elf?
+   __DYNAMIC = 0;    */
+SECTIONS
+{
+  .resetvec 0xFFFFFFFC :
+  {
+    *(.resetvec)
+  } = 0xffff
+
+  /* Read-only sections, merged into text segment: */
+  . = + SIZEOF_HEADERS;
+  .interp : { *(.interp) }
+  .hash          : { *(.hash)		}
+  .dynsym        : { *(.dynsym)		}
+  .dynstr        : { *(.dynstr)		}
+  .rel.text      : { *(.rel.text)		}
+  .rela.text     : { *(.rela.text) 	}
+  .rel.data      : { *(.rel.data)		}
+  .rela.data     : { *(.rela.data) 	}
+  .rel.rodata    : { *(.rel.rodata) 	}
+  .rela.rodata   : { *(.rela.rodata) 	}
+  .rel.got       : { *(.rel.got)		}
+  .rela.got      : { *(.rela.got)		}
+  .rel.ctors     : { *(.rel.ctors)	}
+  .rela.ctors    : { *(.rela.ctors)	}
+  .rel.dtors     : { *(.rel.dtors)	}
+  .rela.dtors    : { *(.rela.dtors)	}
+  .rel.bss       : { *(.rel.bss)		}
+  .rela.bss      : { *(.rela.bss)		}
+  .rel.plt       : { *(.rel.plt)		}
+  .rela.plt      : { *(.rela.plt)		}
+  .init          : { *(.init)	}
+  .plt : { *(.plt) }
+  .text      :
+  {
+    /* WARNING - the following is hand-optimized to fit within	*/
+    /* the sector layout of our flash chips!	XXX FIXME XXX	*/
+
+    cpu/ppc4xx/start.o	(.text)
+    cpu/ppc4xx/traps.o	(.text)
+    cpu/ppc4xx/interrupts.o	(.text)
+    cpu/ppc4xx/serial.o	(.text)
+    cpu/ppc4xx/cpu_init.o	(.text)
+    cpu/ppc4xx/speed.o	(.text)
+    cpu/ppc4xx/405gp_enet.o	(.text)
+    common/dlmalloc.o	(.text)
+    lib_generic/crc32.o		(.text)
+    lib_ppc/extable.o	(.text)
+    lib_generic/zlib.o		(.text)
+
+/*    . = env_offset;*/
+/*    common/environment.o(.text)*/
+
+    *(.text)
+    *(.fixup)
+    *(.got1)
+  }
+  _etext = .;
+  PROVIDE (etext = .);
+  .rodata    :
+  {
+    *(.rodata)
+    *(.rodata1)
+  }
+  .fini      : { *(.fini)    } =0
+  .ctors     : { *(.ctors)   }
+  .dtors     : { *(.dtors)   }
+
+  /* Read-write section, merged into data segment: */
+  . = (. + 0x00FF) & 0xFFFFFF00;
+  _erotext = .;
+  PROVIDE (erotext = .);
+  .reloc   :
+  {
+    *(.got)
+    _GOT2_TABLE_ = .;
+    *(.got2)
+    _FIXUP_TABLE_ = .;
+    *(.fixup)
+  }
+  __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
+  __fixup_entries = (. - _FIXUP_TABLE_)>>2;
+
+  .data    :
+  {
+    *(.data)
+    *(.data1)
+    *(.sdata)
+    *(.sdata2)
+    *(.dynamic)
+    CONSTRUCTORS
+  }
+  _edata  =  .;
+  PROVIDE (edata = .);
+
+  __start___ex_table = .;
+  __ex_table : { *(__ex_table) }
+  __stop___ex_table = .;
+
+  . = ALIGN(256);
+  __init_begin = .;
+  .text.init : { *(.text.init) }
+  .data.init : { *(.data.init) }
+  . = ALIGN(256);
+  __init_end = .;
+
+  __bss_start = .;
+  .bss       :
+  {
+   *(.sbss) *(.scommon)
+   *(.dynbss)
+   *(.bss)
+   *(COMMON)
+  }
+  _end = . ;
+  PROVIDE (end = .);
+}
--- a/board/esteem192e/flash.c
+++ b/board/esteem192e/flash.c
@@ -104,7 +104,7 @@ unsigned long flash_init (void)
 	/* monitor protection ON by default */
 	(void)flash_protect(FLAG_PROTECT_SET,
 			    CFG_MONITOR_BASE,
-			    CFG_MONITOR_BASE+CFG_MONITOR_LEN-1,
+			    CFG_MONITOR_BASE+monitor_flash_len-1,
 			    &flash_info[0]);
 #endif

@@ -124,7 +124,7 @@ unsigned long flash_init (void)
 		/* monitor protection ON by default */
 		(void)flash_protect(FLAG_PROTECT_SET,
 				    CFG_MONITOR_BASE,
-				    CFG_MONITOR_BASE+CFG_MONITOR_LEN-1,
+				    CFG_MONITOR_BASE+monitor_flash_len-1,
 				    &flash_info[1]);
 #endif
 	} else {
--- a/board/etx094/flash.c
+++ b/board/etx094/flash.c
@@ -91,7 +91,7 @@ unsigned long flash_init (void)
 	/* monitor protection ON by default */
 	flash_protect(FLAG_PROTECT_SET,
 		      CFG_MONITOR_BASE,
-		      CFG_MONITOR_BASE+CFG_MONITOR_LEN-1,
+		      CFG_MONITOR_BASE+monitor_flash_len-1,
 		      &flash_info[0]);
 #endif

@@ -115,7 +115,7 @@ unsigned long flash_init (void)
 		/* monitor protection ON by default */
 		flash_protect(FLAG_PROTECT_SET,
 			      CFG_MONITOR_BASE,
-			      CFG_MONITOR_BASE+CFG_MONITOR_LEN-1,
+			      CFG_MONITOR_BASE+monitor_flash_len-1,
 			      &flash_info[1]);
 #endif
 	} else {
--- a/board/fads/fads.c
+++ b/board/fads/fads.c
@@ -208,6 +208,7 @@ int checkboard (void)
 	case 0x22 :
 	case 0x23 :
 	case 0x24 :
+	case 0x2a :
 	case 0x3f :
 		puts ("FADS");
 		break;
--- a/board/fads/flash.c
+++ b/board/fads/flash.c
@@ -112,7 +112,7 @@ unsigned long flash_init (void)
 		/* monitor protection ON by default */
 		flash_protect(FLAG_PROTECT_SET,
 			      CFG_MONITOR_BASE,
-			      CFG_MONITOR_BASE+CFG_MONITOR_LEN-1,
+			      CFG_MONITOR_BASE+monitor_flash_len-1,
 			      &flash_info[i]);
 #endif

@@ -147,7 +147,7 @@ static void flash_get_offsets (ulong base, flash_info_t *info)
 	int i;

 	/* set up sector start address table */
-	if ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM040) {
+	if ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM040 || (info->flash_id & FLASH_TYPEMASK) == FLASH_AM080 ) {
 		/* set sector offsets for uniform sector type	*/
 		for (i = 0; i < info->sector_count; i++) {
 			info->start[i] = base + (i * 0x00040000);
@@ -179,6 +179,8 @@ void flash_print_info  (flash_info_t *info)
 	{
 		case FLASH_AM040:	printf ("29F040 or 29LV040 (4 Mbit, uniform sectors)\n");
 			break;
+		case FLASH_AM080:	printf ("29F080 or 29LV080 (8 Mbit, uniform sectors)\n");
+		                	break;
 		case FLASH_AM400B:	printf ("AM29LV400B (4 Mbit, bottom boot sect)\n");
 					break;
 		case FLASH_AM400T:	printf ("AM29LV400T (4 Mbit, top boot sector)\n");
@@ -278,6 +280,12 @@ static ulong flash_get_size (vu_long *addr, flash_info_t *info)
 			info->size = 0x00200000;
 			break;				/* => 2 MB		*/

+		case AMD_ID_F080B:
+			info->flash_id += FLASH_AM080;
+			info->sector_count =16;
+			info->size = 0x00400000;
+			break;				/* => 4 MB		*/
+
 		case AMD_ID_LV400T:
 			info->flash_id += FLASH_AM400T;
 			info->sector_count = 11;
--- a/board/flagadm/flash.c
+++ b/board/flagadm/flash.c
@@ -77,7 +77,7 @@ unsigned long flash_init (void)
 	/* monitor protection ON by default */
 	flash_protect(FLAG_PROTECT_SET,
 		      CFG_MONITOR_BASE,
-		      CFG_MONITOR_BASE+CFG_MONITOR_LEN-1,
+		      CFG_MONITOR_BASE+monitor_flash_len-1,
 		      &flash_info[0]);
 #endif

--- a/board/gen860t/README
+++ b/board/gen860t/README
@@ -1,8 +1,7 @@
-
 This directory contains board specific code for a generic MPC860T based
 embedded computer, called 'GEN860T'.  The design is generic in the sense that
 common, readily available components are used and that the architecture of the
-system is i(relatively) straightforward:
+system is relatively straightforward:

 	One eight bit wide boot (FLASH) memory
 	32 bit main memory using SDRAM
@@ -23,14 +22,14 @@ hearing from you, especially if you discover bugs or find ways to improve the
 quality of this U-Boot port.

 Here are the salient features of the system:
-Clock						:	33 Mhz oscillator
-Processor core frequency	:	66 Mhz  if in 1:2:1 mode; can also run 1:1
-Bus frequency				:	33 Mhz
+Clock						:	33.3 Mhz oscillator
+Processor core frequency	:	66.6 Mhz  if in 1:2:1 mode; can also run 1:1
+Bus frequency				:	33.3 Mhz

 Main memory:
 	Type	: SDRAM
 	Width	: 32 bits
-	Size	: 64 megabytes
+	Size	: 64 mibibytes
 	Chip	: Two Micron MT48LC16M16A2TG-7E
 	CS		: MPC860T CS1*/UPMA
 	UPMA CONNECTIONS:
@@ -42,7 +41,7 @@ Main memory:
 Boot memory:
 	Type	: FLASH
 	Width	: 8 bits
-	Size	: 16 megabytes
+	Size	: 16 mibibytes
 	Chip	: One Intel 28F128J3A (StrataFlash)
 	CS		: MPC860T CS0*/GPCM (this is the "boot" chip select)

@@ -56,7 +55,7 @@ EEPROM memory:
 Filesystem memory:
 	Type	: NAND FLASH (Toshiba)
 	Width	: 8 bits (i.e. interface to DOC is 8 bits)
-	Size	: 32 megabytes
+	Size	: 32 mibibytes
 	Chip	: One DiskOnCHip Millenium Plus (DOC 2000+)
 	CS		: MPC860T CS2*/GPCM

@@ -92,6 +91,12 @@ Miscellaneous:
 	Mil-Std 1553 databus interface on CS5*/GPCM.
 	Audio sounder (beeper) with digital volume control connected to SPKROUT.

+SC variant:
+	A reduced-feature version of the GEN860T port is also supported: GEN860T_SC.
+	The 'SC' variant only provides support for the Virtex FPGA, SDRAM main
+	memory, EEPROM and flash memory.  The system clock frequency is reduced
+	to 24 MHz.
+
 Issues:
 	The DOC 2000+ returns 0x40 as its device ID when probed using the method
 	desxribed in the DOC datasheet.  Unfortunately, the U-Boot DOC driver
@@ -105,11 +110,11 @@ Status:
 	in MTD for this device.  I wish I had known this sooner :(

 The GEN860T board specific files and configuration is based on the work
-of others who have contributed to U-Boot. The copright and license notices
+of others who have contributed to U-Boot. The copyright and license notices
 of these authors have been retained wherever their code has been reused.
 All new code to support the GEN860T board is:

-	(C) Copyright 2001-2002
+	(C) Copyright 2001-2003
 	Keith Outwater (keith_outwater@mvis.com)

 and the following license applies:
--- a/board/gen860t/flash.c
+++ b/board/gen860t/flash.c
@@ -157,7 +157,7 @@ flash_init (void)
 	 */
 	flash_protect(FLAG_PROTECT_SET,
 		      	  CFG_MONITOR_BASE,
-		      	  CFG_MONITOR_BASE + CFG_MONITOR_LEN - 1,
+		      	  CFG_MONITOR_BASE + monitor_flash_len - 1,
 		      	  &flash_info[0]);
 #endif

--- a/board/gen860t/gen860t.c
+++ b/board/gen860t/gen860t.c
@@ -271,18 +271,12 @@ misc_init_r (void)
 int
 last_stage_init(void)
 {
+#if !defined(CONFIG_SC)
 	unsigned char buf[256];
 	int i;

 	/*
-	 * Set LEDs here since status LED init code has already run
-	 */
-	status_led_set(STATUS_LED_BIT1, STATUS_LED_ON);
-	status_led_set(STATUS_LED_BIT3, STATUS_LED_ON);
-
-	/*
-	 * Turn the beeper volume all the way down in case this is a warm
-	 * boot.
+	 * Turn the beeper volume all the way down in case this is a warm boot.
 	 */
 	set_beeper_volume(-64);
 	init_beeper();
@@ -294,6 +288,18 @@ last_stage_init(void)
 	if (i > 0) {
 		do_beeper(buf);
 	}
+#endif
 	return 0;
 }
+
+/*
+ * Stub to make POST code happy.  Can't self-poweroff, so just hang.
+ */
+void
+board_poweroff(void)
+{
+	puts("### Please power off the board ###\n");
+    while (1);
+}
+
 /* vim: set ts=4 sw=4 tw=78 : */
--- a/board/gen860t/ioport.c
+++ b/board/gen860t/ioport.c
@@ -42,8 +42,9 @@
 const mpc8xx_iop_conf_t iop_conf_tab[NUM_PORTS][PORT_BITS] = {
    /*
 	 * Port A configuration
-	 * Pin		Signal				Type	Active		Initial state
-	 * PA7 		fpgaProgramLowOut	Out		Low			High
+	 * Pin	Signal					Type	Active	Initial state
+	 * PA7 	fpgaProgramLowOut		Out		Low			High
+	 * PA1 	fpgaCoreVoltageFailLow	In		Low			N/A
 	 */
    {	/*	    conf ppar psor pdir podr pdat pint	   function 		*/
 	/* N/A  */ { 0,   0,   0,   0,   0,   0,   0 }, /* No pin			*/
@@ -62,22 +63,32 @@ const mpc8xx_iop_conf_t iop_conf_tab[NUM_PORTS][PORT_BITS] = {
 	/* PA4  */ { 1,   0,   0,   1,   0,   0,   0 }, /* red bicolor LED 0*/
 	/* PA3  */ { 0,   0,   0,   0,   0,   0,   0 }, /*	*/
 	/* PA2  */ { 0,   0,   0,   0,   0,   0,   0 }, /*	*/
+#if !defined(CONFIG_SC)
+	/* PA1  */ { 1,   0,   0,   0,   0,   0,   0 }, /*	fpgaCoreVoltageFail*/
+#else
 	/* PA1  */ { 0,   0,   0,   0,   0,   0,   0 }, /*	*/
+#endif
 	/* PA0  */ { 0,   0,   0,   0,   0,   0,   0 }  /*	*/
    },

 	/*
+	 * Port B configuration
 	 * Pin		Signal			Type		Active		Initial state
 	 * PB14		docBusyLowIn	In			Low			X
 	 * PB15		gpio1Sig		Out			High		Low
 	 * PB16		fpgaDoneBi		In			High		X
-	 * PB17		swBitOkLowOut	Out			Low			Low
+	 * PB17		swBitOkLowOut	Out			Low			High
 	 * PB19		speakerVolSig	Out/Hi-Z	High/Low	High (Hi-Z)
 	 * PB22		fpgaInitLowBi	In			Low			X
 	 * PB23		batteryOkSig	In			High		X
-     */
-    {	/*	    conf ppar psor pdir podr pdat pint 	  function			*/
-	/* PB31 */ { 0,   0,   0,   0,   0,   0,   0 }, /*	*/
+	 * PB31		pulseCatcherClr	Out			High		0
+	 */
+	{	/*	    conf ppar psor pdir podr pdat pint 	  function			*/
+#if !defined(CONFIG_SC)
+	/* PB31 */ { 0,	  0,   0,   0,   0,   0,   0 }, /*	*/
+#else
+	/* PB31 */ { 1,   0,   0,   1,   0,   0,   0 }, /* pulseCatcherClr	*/
+#endif
 	/* PB30 */ { 0,   0,   0,   0,   0,   0,   0 }, /*	*/
 	/* PB29 */ { 0,   0,   0,   0,   0,   0,   0 }, /*	*/
 	/* PB28 */ { 0,   0,   0,   0,   0,   0,   0 }, /*	*/
@@ -85,19 +96,32 @@ const mpc8xx_iop_conf_t iop_conf_tab[NUM_PORTS][PORT_BITS] = {
 	/* PB26 */ { 0,   0,   0,   0,   0,   0,   0 }, /*	*/
 	/* PB25 */ { 0,   0,   0,   0,   0,   0,   0 }, /*	*/
 	/* PB24 */ { 0,   0,   0,   0,   0,   0,   0 }, /*	*/
+#if !defined(CONFIG_SC)
 	/* PB23 */ { 1,   0,   0,   0,   0,   0,   0 }, /* batteryOk		*/
+#else
+	/* PB23 */ { 0,   0,   0,   0,   0,   0,   0 }, /*	*/
+#endif
 	/* PB22 */ { 1,   0,   0,   0,   0,   0,   0 }, /* fpgaInitLowBi	*/
 	/* PB21 */ { 0,   0,   0,   0,   0,   0,   0 }, /*	*/
 	/* PB20 */ { 0,   0,   0,   0,   0,   0,   0 }, /*	*/
+#if !defined(CONFIG_SC)
 	/* PB19 */ { 1,   0,   0,   1,   1,   1,   0 }, /* speakerVol		*/
+#else
+	/* PB19 */ { 0,   0,   0,   1,   1,   1,   0 }, /*	*/
+#endif
 	/* PB18 */ { 0,   0,   0,   0,   0,   0,   0 }, /*	*/
-	/* PB17 */ { 1,   0,   0,   1,   0,   0,   0 }, /* swBitOkLow		*/
+	/* PB17 */ { 1,   0,   0,   1,   0,   1,   0 }, /* swBitOkLow		*/
 	/* PB16 */ { 1,   0,   0,   0,   0,   0,   0 }, /* fpgaDone			*/
 	/* PB15 */ { 1,   0,   0,   1,   0,   0,   0 }, /* gpio1			*/
+#if !defined(CONFIG_SC)
 	/* PB14 */ { 1,   0,   0,   0,   0,   0,   0 }  /* docBusyLow		*/
-    },
+#else
+	/* PB14 */ { 0,   0,   0,   0,   0,   0,   0 }  /* 	*/
+#endif
+	},

 	/*
+	 * Port C configuration
 	 * Pin		Signal				Type	Active		Initial state
 	 * PC4		i2cBus1EnSig		Out		High		High
 	 * PC5		i2cBus2EnSig		Out		High		High
@@ -108,29 +132,48 @@ const mpc8xx_iop_conf_t iop_conf_tab[NUM_PORTS][PORT_BITS] = {
 	 * PC12		systemBitOkIn		In		High		X
 	 * PC15		selfDreqLow			In		Low			X
 	 */
-    {	/*	    conf ppar psor pdir podr pdat pint 	  function			*/
+	{	/*	    conf ppar psor pdir podr pdat pint 	  function			*/
 	/* N/A	*/ { 0,   0,   0,   0,   0,   0,   0 }, /*	*/
 	/* N/A	*/ { 0,   0,   0,   0,   0,   0,   0 }, /*	*/
 	/* PC15 */ { 1,   0,   0,   0,   0,   0,   0 }, /* selfDreqLowIn	*/
 	/* PC14 */ { 0,   0,   0,   0,   0,   0,   0 }, /*	*/
 	/* PC13 */ { 0,   0,   0,   0,   0,   0,   0 }, /*	*/
+#if !defined(CONFIG_SC)
 	/* PC12 */ { 1,   0,   0,   0,   0,   0,   0 }, /* systemBitOkIn	*/
+#else
+	/* PC12 */ { 0,   0,   0,   0,   0,   0,   0 }, /* 	*/
+#endif
 	/* PC11 */ { 1,   0,   0,   1,   0,   1,   0 }, /* fpgaResetLowOut	*/
+#if !defined(CONFIG_SC)
 	/* PC10 */ { 1,   0,   0,   1,   0,   1,   0 }, /* i2cBus4EnSig		*/
+#else
+	/* PC10 */ { 0,   0,   0,   1,   0,   1,   0 }, /*	*/
+#endif
 	/* PC9  */ { 0,   0,   0,   0,   0,   0,   0 }, /*	*/
+#if !defined(CONFIG_SC)
 	/* PC8  */ { 1,   0,   0,   1,   0,   1,   0 }, /* i2cBus3EnSig		*/
+#else
+	/* PC8  */ { 0,   0,   0,   1,   0,   1,   0 }, /*	*/
+#endif
 	/* PC7  */ { 0,   0,   0,   0,   0,   0,   0 }, /*	*/
 	/* PC6  */ { 1,   0,   0,   1,   0,   1,   0 }, /* gpio0			*/
+#if !defined(CONFIG_SC)
 	/* PC5  */ { 1,   0,   0,   1,   0,   1,   0 }, /* i2cBus2EnSig		*/
 	/* PC4  */ { 1,   0,   0,   1,   0,   1,   0 }, /* i2cBus1EnSig		*/
+#else
+	/* PC5  */ { 0,   0,   0,   1,   0,   1,   0 }, /*	*/
+	/* PC4  */ { 0,   0,   0,   1,   0,   1,   0 }, /*	*/
+#endif
 	/* N/A  */ { 0,   0,   0,   0,   0,   0,   0 }, /*	*/
 	/* N/A  */ { 0,   0,   0,   0,   0,   0,   0 }, /*	*/
 	/* N/A  */ { 0,   0,   0,   0,   0,   0,   0 }, /*	*/
 	/* N/A  */ { 0,   0,   0,   0,   0,   0,   0 }  /*	*/
-    },
+	},

-    /* Port D configuration */
-    {	/*	    conf ppar psor pdir podr pdat pint 	   function			*/
+	/*
+	 * Port D configuration
+	 */
+	{	/*	    conf ppar psor pdir podr pdat pint 	   function			*/
 	/* N/A  */ { 0,   0,   0,   0,   0,   0,   0 }, /*	*/
 	/* N/A  */ { 0,   0,   0,   0,   0,   0,   0 }, /*	*/
 	/* PD15 */ { 0,   0,   0,   0,   0,   0,   0 }, /*	*/
@@ -149,7 +192,7 @@ const mpc8xx_iop_conf_t iop_conf_tab[NUM_PORTS][PORT_BITS] = {
 	/* N/A  */ { 0,   0,   0,   0,   0,   0,   0 }, /*	*/
 	/* N/A  */ { 0,   0,   0,   0,   0,   0,   0 }, /*	*/
 	/* N/A  */ { 0,   0,   0,   0,   0,   0,   0 }  /*	*/
-    }
+	}
 };

 /*
--- a/board/gen860t/u-boot-flashenv.lds
+++ b/board/gen860t/u-boot-flashenv.lds
@@ -0,0 +1,132 @@
+/*
+ * Linker command file for the GEN860T board when the environment is
+ * stored in flash memory.
+ *
+ * (C) Copyright 2000
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_ARCH(powerpc)
+SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
+SECTIONS
+{
+  /*
+   * Read-only sections, merged into text segment:
+   */
+  . = + SIZEOF_HEADERS;
+  .interp        : { *(.interp)		}
+  .hash          : { *(.hash)		}
+  .dynsym        : { *(.dynsym)		}
+  .dynstr        : { *(.dynstr)		}
+  .rel.text      : { *(.rel.text)	}
+  .rela.text     : { *(.rela.text) 	}
+  .rel.data      : { *(.rel.data)	}
+  .rela.data     : { *(.rela.data) 	}
+  .rel.rodata    : { *(.rel.rodata) 	}
+  .rela.rodata   : { *(.rela.rodata) 	}
+  .rel.got       : { *(.rel.got)	}
+  .rela.got      : { *(.rela.got)	}
+  .rel.ctors     : { *(.rel.ctors)	}
+  .rela.ctors    : { *(.rela.ctors)	}
+  .rel.dtors     : { *(.rel.dtors)	}
+  .rela.dtors    : { *(.rela.dtors)	}
+  .rel.bss       : { *(.rel.bss)	}
+  .rela.bss      : { *(.rela.bss)	}
+  .rel.plt       : { *(.rel.plt)	}
+  .rela.plt      : { *(.rela.plt)	}
+  .init          : { *(.init)		}
+  .plt           : { *(.plt)		}
+  .text :
+  {
+    cpu/mpc8xx/start.o	(.text)
+    *(.text)
+    *(.fixup)
+    *(.got1)
+  }
+  _etext = .;
+  PROVIDE (etext = .);
+  .rodata    :
+  {
+    *(.rodata)
+    *(.rodata1)
+  }
+  .fini      : { *(.fini)    } =0
+  .ctors     : { *(.ctors)   }
+  .dtors     : { *(.dtors)   }
+
+  /*
+   * Read-write section, merged into data segment:
+   */
+  . = (. + 0x00FF) & 0xFFFFFF00;
+  _erotext = .;
+  PROVIDE (erotext = .);
+  .reloc   :
+  {
+    *(.got)
+    _GOT2_TABLE_ = .;
+    *(.got2)
+    _FIXUP_TABLE_ = .;
+    *(.fixup)
+  }
+  __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
+  __fixup_entries = (. - _FIXUP_TABLE_)>>2;
+
+  .data:
+  {
+    *(.data)
+    *(.data1)
+    *(.sdata)
+    *(.sdata2)
+    *(.dynamic)
+    CONSTRUCTORS
+  }
+  _edata  =  .;
+  PROVIDE (edata = .);
+
+  __start___ex_table = .;
+  __ex_table : { *(__ex_table) }
+  __stop___ex_table = .;
+
+  . = ALIGN(256);
+  __init_begin = .;
+  .text.init : { *(.text.init) }
+  .data.init : { *(.data.init) }
+  . = ALIGN(256);
+  __init_end = .;
+
+  __bss_start = .;
+  .bss       :
+  {
+   *(.sbss) *(.scommon)
+   *(.dynbss)
+   *(.bss)
+   *(COMMON)
+  }
+  
+  _end = . ;
+  PROVIDE (end = .);
+
+  .ppcenv:
+  {
+    . = env_offset;
+    common/environment.o
+  }
+}
--- a/board/gen860t/u-boot.lds
+++ b/board/gen860t/u-boot.lds
@@ -56,15 +56,6 @@ SECTIONS
  .text :
  {
    cpu/mpc8xx/start.o		(.text)
-    common/dlmalloc.o		(.text)
-    lib_ppc/ppcstring.o		(.text)
-    lib_generic/vsprintf.o	(.text)
-    lib_generic/crc32.o		(.text)
-    lib_generic/zlib.o		(.text)
-
-/*    . = env_offset;
-    common/environment.o(.text) */
-
    *(.text)
    *(.fixup)
    *(.got1)
@@ -128,8 +119,6 @@ SECTIONS
   *(.bss)
   *(COMMON)
  }
-
  _end = . ;
  PROVIDE (end = .);
 }
-
--- a/board/genietv/flash.c
+++ b/board/genietv/flash.c
@@ -55,7 +55,7 @@ unsigned long flash_init (void)
 	/* Monitor protection ON by default */
 	flash_protect(FLAG_PROTECT_SET,
 		      CFG_MONITOR_BASE,
-		      CFG_MONITOR_BASE+CFG_MONITOR_LEN-1,
+		      CFG_MONITOR_BASE+monitor_flash_len-1,
 		      &flash_info[0]);
 #endif

--- a/board/gth/flash.c
+++ b/board/gth/flash.c
@@ -102,7 +102,7 @@ unsigned long flash_init (void)
 	  /* monitor protection ON by default */
 	  (void)flash_protect(FLAG_PROTECT_SET,
 			    CFG_MONITOR_BASE,
-			    CFG_MONITOR_BASE+CFG_MONITOR_LEN-1,
+			    CFG_MONITOR_BASE+monitor_flash_len-1,
 			    &flash_info[0]);
 #endif

@@ -121,7 +121,7 @@ unsigned long flash_init (void)
 		/* monitor protection ON by default */
 		(void)flash_protect(FLAG_PROTECT_SET,
 				    CFG_MONITOR_BASE,
-				    CFG_MONITOR_BASE+CFG_MONITOR_LEN-1,
+				    CFG_MONITOR_BASE+monitor_flash_len-1,
 				    &flash_info[1]);
 #endif
 	}
--- a/board/gw8260/flash.c
+++ b/board/gw8260/flash.c
@@ -96,7 +96,7 @@ unsigned long flash_init (void)
 #if CFG_MONITOR_BASE >= CFG_FLASH0_BASE
    flash_protect(FLAG_PROTECT_SET,
 		  CFG_MONITOR_BASE,
-		  CFG_MONITOR_BASE+CFG_MONITOR_LEN-1,
+		  CFG_MONITOR_BASE+monitor_flash_len-1,
 		  &flash_info[0]);
 #endif

--- a/board/hermes/flash.c
+++ b/board/hermes/flash.c
@@ -71,7 +71,7 @@ unsigned long flash_init (void)
 	/* monitor protection ON by default */
 	flash_protect(FLAG_PROTECT_SET,
 		      CFG_MONITOR_BASE,
-		      CFG_MONITOR_BASE+CFG_MONITOR_LEN-1,
+		      CFG_MONITOR_BASE+monitor_flash_len-1,
 		      &flash_info[0]);
 #endif

--- a/board/hymod/flash.c
+++ b/board/hymod/flash.c
@@ -321,7 +321,7 @@ flash_init(void)
 #if CFG_MONITOR_BASE == CFG_FLASH_BASE
 	(void)flash_protect(FLAG_PROTECT_SET,
 		      CFG_MONITOR_BASE,
-		      CFG_MONITOR_BASE+CFG_MONITOR_LEN-1,
+		      CFG_MONITOR_BASE+monitor_flash_len-1,
 		      &flash_info[0]);
 #endif

--- a/Show More
+++ b/Show More
Author	SHA1	Message	Date
wdenk	682011ff69	* Patches by Udi Finkelstein, 2 June 2003: - Added support for custom keyboards, initialized by defining a board-specific drv_keyboard_init as well as defining CONFIG_KEYBOARD . - Added support for the RBC823 board. - cpu/mpc8xx/lcd.c now automatically calculates the Horizontal Pixel Count field. * Fix alignment problem in BOOTP (dhcp_leasetime option) [pointed out by Nicolas Lacressonni�re, 2 Jun 2003] * Patch by Mark Rakes, 14 May 2003: add support for Intel e1000 gig cards. * Patch by Nye Liu, 3 Jun 2003: fix critical typo in MAMR definition (include/mpc8xx.h) * Fix requirement to align U-Boot image on 16 kB boundaries on PPC. * Patch by Klaus Heydeck, 2 Jun 2003 Minor changes for KUP4K configuration	2003-06-03 23:54:09 +00:00
wdenk	7a8e9bed17	* Patch by Marc Singer, 29 May 2003: Fixed rarp boot method for IA32 and other little-endian CPUs. * Patch by Marc Singer, 28 May 2003: Added port I/O commands. * Patch by Matthew McClintock, 28 May 2003 - cpu/mpc824x/start.S: fix relocation code when booting from RAM - minor patches for utx8245 * Patch by Daniel Engstr�m, 28 May 2003: x86 update * Patch by Dave Ellis, 9 May 2003 + 27 May 2003: add nand flash support to SXNI855T configuration fix/extend nand flash support: - fix 'nand erase' command so does not erase bad blocks - fix 'nand write' command so does not write to bad blocks - fix nand_probe() so handles no flash detected properly - add doc/README.nand - add .jffs2 and .oob options to nand read/write - add 'nand bad' command to list bad blocks - add 'clean' option to 'nand erase' to write JFFS2 clean markers - make NAND read/write faster * Patch by Rune Torgersen, 23 May 2003: Update for MPC8266ADS board	2003-05-31 18:35:21 +00:00
wdenk	3b57fe0a70	* Get (mostly) rid of CFG_MONITOR_LEN definition; compute real length instead CFG_MONITOR_LEN is now only used to determine _at_compile_ _time_ (!) if the environment is embedded within the U-Boot image, or in a separate flash sector. * Cleanup CFG_DER #defines in config files (wd maintained only)	2003-05-30 12:48:29 +00:00
wdenk	f07771cc28	* Fix data abort exception handling for arm920t CPU * Fix alignment problems with flash driver for TRAB board * Patch by Donald White, 21 May 2003: fix calculation of base address in pci_hose_config_device() * Fix bug in command line parsing: "cmd1;cmd2" is supposed to always execute "cmd2", even if "cmd1" fails. Note that this is different to "run var1 var2" where the contents of "var2" will NOT be executed when a command in "var1" fails.	2003-05-28 08:06:31 +00:00
wdenk	38b99261c1	Add zero-copy ramdisk support (requires corresponding kernel support!)	2003-05-23 23:18:21 +00:00
wdenk	4c3b21a5f9	Patch by Kyle Harris, 20 May 2003: In preparation for an ixp port, rename cpu/xscale and arch-xscale into cpu/pxa and arch-pxa.	2003-05-23 12:36:20 +00:00
stroese	d9ff6e84e4	Patch from Stefan Roese.	2003-05-23 11:49:24 +00:00
stroese	e1e89324ad	- ASH405 board added (PPC405EP based). - CPCI4052 added (PPC405GP based). - CPCI405AB added (PPC405GP based). - PCI405 added (PPC405GP based). - PMC405 added (PPC405GP based).	2003-05-23 11:43:00 +00:00
stroese	549826eaa0	- ASH405 board added (PPC405EP based). - BUBINGA405EP added (PPC405EP based). - CPCI405AB added (PPC405GP based). - PMC405 added (PPC405GP based).	2003-05-23 11:41:44 +00:00
stroese	1d49b1f365	CONFIG_UART1_CONSOLE added.	2003-05-23 11:39:05 +00:00
wdenk	33149b8812	Patch by Denis Peter, 19 Mai 2003: add support for the MIP405-3 board	2003-05-23 11:38:58 +00:00
stroese	9919f13cc1	DHCP support added.	2003-05-23 11:38:22 +00:00
stroese	071d897c96	PMC405 board added.	2003-05-23 11:35:47 +00:00
stroese	3871842529	Code cleanup.	2003-05-23 11:35:09 +00:00
stroese	b6d9e4f5af	New FPGA image with 527 support.	2003-05-23 11:34:40 +00:00
stroese	1545ad35c5	Local Bus Timeout increased.	2003-05-23 11:33:57 +00:00
stroese	c231d00f4e	Code reworked for PPC405EP support.	2003-05-23 11:32:53 +00:00
stroese	d4629c8c8d	CPCI405AB (special version of esd CPCI405) board added.	2003-05-23 11:30:39 +00:00
stroese	46578cc018	BUBINGA405EP board added (IBM PPC405EP Eval Board).	2003-05-23 11:28:55 +00:00
stroese	c93f70962b	ASH405 board added (PPC405EP based).	2003-05-23 11:27:18 +00:00
stroese	8749cfb44e	- PPC405EP support added. - CONFIG_UART1_CONSOLE added (see README).	2003-05-23 11:25:57 +00:00
stroese	b867d705b6	PPC405EP support added.	2003-05-23 11:18:02 +00:00
stroese	bedc497029	- PPC405EP support added. - "nand_init" (NAND FLASH) added.	2003-05-23 11:16:49 +00:00
wdenk	5d232d0e7e	* Patch by Dave Ellis, 22 May 2003: Fix problem with only partially cleared .bss segment * Patch by Rune Torgersen, 12 May 2003: get PCI to work on a MPC8266ADS board; incorporate change to cpu/mpc8260/pci.c to enable overrides of PCI memory parameters	2003-05-22 22:52:13 +00:00
wdenk	c8c3a8be2d	Add support for arbitrary bitmaps for TRAB's VFD command; allow to pass boot bitmap addresses in environment variables; allow for zero boot delay	2003-05-21 20:26:20 +00:00
wdenk	82226bf4d2	* Add support for arbitrary bitmaps for TRAB's VFD command * Patch by Christian Gei�inger, 19 May 2002: On TRAB: wait until the dummy byte has been completely sent	2003-05-20 20:49:01 +00:00
wdenk	7f70e85309	* Patch by David Updegraff, 22 Apr 2003: update for CrayL1 board * Patch by Pantelis Antoniou, 21 Apr 2003: add boot support for ARTOS (a proprietary OS) * Patch by Steven Scholz, 11 Apr 2003: Add support for RTC DS1338 * Patch by Rod Boyce, 24 Jan 2003: Fix counting of extended partitions in diskboot command	2003-05-20 14:25:27 +00:00
wdenk	59de2ed6b5	Patch by Christophe Lindheimer, 20 May 2003: allow the use of CFG_LOADS when CFG_NO_FLASH is set	2003-05-20 10:58:04 +00:00
wdenk	86d82762f6	Fix SDRAM timing on Purple board	2003-05-20 10:39:44 +00:00
wdenk	66fd3d1ce7	Add support for CompactFlash on ATC board (includes support for Intel 82365 and compatible PC Card controllers, and Yenta-compatible PCI-to-CardBus controllers)	2003-05-18 11:30:09 +00:00
wdenk	45219c4660	Patch by Mathijs Haarman, 08 May 2003: Add lan91c96 driver (tested on Lubbock and custom PXA250 board only)	2003-05-12 21:50:16 +00:00
wdenk	f7de16ae25	Fix SDRAM initialization	2003-05-12 09:51:52 +00:00
wdenk	d6815435c0	Add default switch settings.	2003-05-12 09:51:00 +00:00
wdenk	e600962991	Fix ATC board configuration and flash driver	2003-05-05 17:09:41 +00:00
wdenk	9c62cc58b8	Fix problem with usage of "true" (undefined in current versions of bfd.h)	2003-05-03 23:33:47 +00:00
wdenk	7aa7861471	* Add support for Promess ATC board * Patch by Keith Outwater, 28 Apr 2003: - Miscellaneous corrections and additions to GEN860T board specific code. - Added GEN860_SC variant to GEN860T. - Miscellaneous corrections to GEN860T documentation. - Correct duplicate entry in U-Boot CREDITS file. - Add GEN860T_SC entry in MAINTAINERS file. - Update CREDITS file with GEN860T_SC info. * Update Smiths Aerospace addresses in MAINTAINERS file * Fix error handling in hush's version of "run" command	2003-05-03 15:50:43 +00:00
wdenk	4532cb696e	* LWMON extensions: - Splashscreen support - modem support - sysmon support - temperature dependend enabling of LCD * Allow booting from old "PPCBoot" disk partitions * Add support for TQM8255 Board / MPC8255 CPU	2003-04-27 22:52:51 +00:00
wdenk	02c9bed451	* empty log message *	2003-04-20 17:41:25 +00:00
wdenk	53cad435bb	Make compile clean	2003-04-20 17:26:01 +00:00
wdenk	059ae173e9	Add files needed for bitmap load support	2003-04-20 16:52:09 +00:00
wdenk	824a1ebffe	Compile fixes	2003-04-20 16:49:37 +00:00
wdenk	d791b1dc3e	* Make sure Block Lock Bits get cleared in R360MPI flash driver * MPC823 LCD driver: Fill color map backwards, to allow for steady display when Linux takes over * Patch by Erwin Rol, 27 Feb 2003: Add support for RTEMS (this time for real). * Add support for "bmp info" and "bmp display" commands to load bitmap images; this can be used (for example in a "preboot" command) to display a splash screen very quickly after poweron. * Add support for 133 MHz clock on INCA-IP board	2003-04-20 14:04:18 +00:00
wdenk	4a6fd34b26	* Patch by Lutz Dennig, 10 Apr 2003: Update for R360MPI board * Add new meaning to "autostart" environment variable: If set to "no", a standalone image passed to the "bootm" command will be copied to the load address (and eventually uncompressed), but NOT be started. This can be used to load and uncompress arbitrary data. * Set max brightness for MN11236 displays on TRAB board	2003-04-12 23:38:12 +00:00
stroese	69f8f827d5	Patch from Stefan Roese.	2003-04-10 13:30:28 +00:00
stroese	759a51b4f3	Changed DHCP client to use ip address from server option field #54 from the OFFER-paket in the server option field #54 in the REQUEST-paket. This fixes a problem using a Windows 2000 DHCP server, where the DHCP-server is not the TFTP-server.	2003-04-10 13:26:44 +00:00
wdenk	d126bfbdbd	Add support for TQM862L modules	2003-04-10 11:18:18 +00:00
wdenk	60fbe25424	Prepare for 0.3.0 release * Add support for Purple Board (MIPS64 5Kc) * Add support for MIPS64 5Kc CPUs	2003-04-08 23:25:21 +00:00
wdenk	3e38691e8f	* Patch by Arun Dharankar, 4 Apr 2003: Add IDMA example code (tested on 8260 only) * Add support for Purple Board (MIPS64 5Kc) * Add support for MIPS64 5Kc CPUs * Fix missing setting of "loadaddr" and "bootfile" on ARM and MIPS * Patch by Denis Peter, 04 Apr 2003: - update MIP405-4 board * Patches by Denis Peter, 03 April 2003: - fix PCI IRQs on MPL boards - fix two more un-relocated pointer problems * Fix behaviour of "run" command: - print error message iv variable does not exist - terminate processing of arguments in case of error * Patches by Peter Figuli, 10 Mar 2003 - Add support for BTUART on PXA platform - Add support for WEP EP250 (PXA) board * Fix flash problems on INCA-IP; add tool to allow bruning images to flash using a BDI2000 * Implement fix for I2C Edge Conditions problem for all boards that use the bit-banging driver (common/soft_i2c.c) * Add patches by Robert Schwebel, 31 Mar 2003: - csb226 board: bring in sync with innokom/memsetup.S - csb226 board: fix MDREFR handling - misc doc fixes / extensions - innokom board: cleanup, MDREFR fix in memsetup.S, config update - add BOOT_PROGRESS to armlinux.c	2003-04-05 00:53:31 +00:00
stroese	36c05a80ec	Patch from Stefan Roese.	2003-04-04 16:55:30 +00:00
stroese	afcc4a7404	Changed CPCI405 to use CTS instead of DSR on PPC405 UART1.	2003-04-04 16:52:57 +00:00
stroese	9e7d5ebea9	U-Boot version environment variable "ver" added (CONFIG_VERSION_VARIABLE).	2003-04-04 16:48:07 +00:00
stroese	baa3d528fe	Changed PPC405GPr version from A to B.	2003-04-04 16:00:33 +00:00
stroese	c1551ea817	U-Boot version environment variable "ver" added (CONFIG_VERSION_VARIABLE).	2003-04-04 15:53:41 +00:00
stroese	0587597ca3	U-Boot version environment variable "ver" added (CONFIG_VERSION_VARIABLE).	2003-04-04 15:44:49 +00:00
wdenk	0db5bca807	* Patch by Martin Winistoerfer, 23 Mar 2003 - Add port to MPC555/556 microcontrollers - Add support for cmi customer board with Intel 28F128J3A, 28F320J3A or 28F640J3A flash. * Patch by Rick Bronson, 28 Mar 2003: - fix common/cmd_nand.c	2003-03-31 17:27:09 +00:00
wdenk	85ec0bcc1b	* Patch by Arun Dharankar, 24 Mar 2003: - add threads / scheduler example code * Add patches by Robert Schwebel, 31 Mar 2003: - add ctrl-c support for kermit download - align bdinfo output on ARM * Add CPU ID, version, and clock speed for INCA-IP	2003-03-31 16:34:49 +00:00
wdenk	506f044131	Patches by Dave Ellis, 18 Mar 2003 for SXNI855T board: - fix SRAM and SDRAM memory sizing - add status LED support - add MAC address for second (SCC1) ethernet port Update default environment for TQM8260 board	2003-03-28 14:40:36 +00:00