* Patches by Xianghua Xiao, 15 Oct 2003:

- Added Motorola CPU 8540/8560 support (cpu/85xx) - Added Motorola MPC8540ADS board support (board/mpc8540ads) - Added Motorola MPC8560ADS board support (board/mpc8560ads) * Minor code cleanup
* Make sure HUSH is initialized for running auto-update scripts
2026-06-13 15:03:58 +03:00 · 2003-10-15 23:53:47 +00:00 · 2003-10-14 19:43:55 +00:00 · 2003-10-10 10:05:42 +00:00 · 2003-10-09 20:09:04 +00:00 · 2003-10-09 19:00:25 +00:00
683 changed files with 124454 additions and 12301 deletions
--- a/510
+++ b/510
@@ -1,7 +1,513 @@
 ======================================================================
-Changes since U-Boot 0.4.0:
+Changes for U-Boot 1.0.0:
 ======================================================================

+* Patches by Xianghua Xiao, 15 Oct 2003:
+
+  - Added Motorola CPU 8540/8560 support (cpu/85xx)
+  - Added Motorola MPC8540ADS board support (board/mpc8540ads)
+  - Added Motorola MPC8560ADS board support (board/mpc8560ads)
+
+* Fix flash timings on TRAB board
+
+* Make sure HUSH is initialized for running auto-update scripts
+
+* Make 5200 reset command _really_ reset the board, without running
+  any other code after it
+
+* Fix errors with flash erase when range spans  across banks
+  that are mapped in reverse order
+
+* Fix flash mapping and display on P3G4 board
+
+* Patch by Kyle Harris, 15 Jul 2003:
+  - add support for Intel IXP425 CPU
+  - add support for IXDP425 eval board
+
+* Added config option CONFIG_SILENT_CONSOLE.  See doc/README.silent
+  for more information
+
+* Patch by Steven Scholz, 10 Oct 2003
+  - Add support for Altera FPGA ACEX1K
+
+* Patches by Thomas Lange, 09 Oct 2003:
+  - fix cmd_ide.c for non ppc boards (read/write functions did not
+    add ATA base address)
+  - fix for shannon board
+  - #ifdef CONFIG_IDE_8xx_DIRECT some otherwise unused code
+  - Endian swap ATA identity for all big endian CPUs, not just PPC
+  - MIPS only: New option CONFIG_MEMSIZE_IN_BYTES for passing memsize
+    args to linux
+  - add support for dbau1x00 board (MIPS32)
+
+* Patch by Sangmoon Kim, 07 Oct 2003:
+  add support for debris board
+
+* Patch by Martin Krause, 09 Oct 2003:
+  Fixes for TRAB board
+  - /board/trab/rs485.c: correct baudrate
+  - /board/trab/cmd_trab.c: bug fix for problem with timer overflow in
+    udelay(); fix some timing problems with adc controller
+  - /board/trab/trab_fkt.c: add new commands: gain, eeprom and power;
+    modify commands: touch and buzzer
+
+* Disable CONFIG_SUPPORT_VFAT when used with CONFIG_AUTO_UPDATE
+  (quick & dirty workaround for rogue pointer problem in get_vfatname());
+  Use direct function calls for auto_update instead of hush commands
+
+* Patch by Scott McNutt, 04 Oct 2003:
+  - add support for Altera Nios-32 CPU
+  - add support for Nios Cyclone Development Kit (DK-1C20)
+
+* Patch by Steven Scholz, 29 Sep 2003:
+  - A second parameter for bootm overwrites the load address for
+    "Standalone Application" images.
+  - bootm sets environment variable "filesize" to the resulting
+    (uncompressed) data length for "Standalone Application" images
+    when autostart is set to "no". Now you can do something like
+	if bootm $fpgadata $some_free_ram ; then
+		fpga load 0 $some_free_ram $filesize
+	fi
+
+* Patch by Denis Peter, 25 Sept 2003:
+  add support for the MIP405 Rev. C board
+
+* Patch by Yuli Barcohen, 25 Sep 2003:
+  add support for Zephyr Engineering ZPC.1900 board
+
+* Patch by Anders Larsen, 23 Sep 2003:
+  add CMD_PORTIO to CFG_CMD_NONSTD (commands in question are only
+  implemented for the x86 architecture)
+
+* Patch by Sangmoon Kim, 23 Sep 2003:
+  fix pll_pci_to_mem_multiplier table for MPC8245
+
+* Patch by Anders Larsen, 22 Sep 2003:
+  enable timed autoboot on PXA
+
+* Patch by David Müller, 22 Sep 2003:
+  - add $(CFLAGS) to "-print-libgcc-filename" so compiler driver
+    returns correct libgcc file path
+  - "latency" reduction of busy-loop waiting to improve "U-Boot" boot
+    time on s3c24x0 systems
+
+* Patch by Jon Diekema, 19 Sep 2003:
+  - Add CFG_FAULT_ECHO_LINK_DOWN option to echo the inverted Ethernet
+    link state to the fault LED.
+  - In NetLoop, make the Fault LED reflect the link status.  The link
+    status gets updated on entry, and on timeouts.
+
+* Patch by Anders Larsen, 18 Sep 2003:
+  allow mkimage to build and run on Cygwin-hosted systems
+
+* Patch by Frank Müller, 18 Sep 2003:
+  use bi_intfreq instead of bi_busfreq to compute fec_mii_speed in
+  cpu/mpc8xx/fec.c
+
+* Patch by Pantelis Antoniou, 16 Sep 2003:
+  add tool to compute fileds in the PLPRCR register for MPC86x
+
+* Use IH_TYPE_FILESYSTEM for TRAB "disk" images.
+
+* Fix build problems under FreeBSD
+
+* Add generic filesystem image type
+
+* Make fatload set filesize environment variable
+
+* enable basic / medium / high-end configurations for PPChameleonEVB
+  board; fix NAND code
+
+* enable TFTP client code to specify to the server the desired
+  timeout value (see RFC-2349)
+
+* Improve SDRAM setup for TRAB board
+
+* Suppress all output with splashscreen configured only if "splashimage"
+  is set
+
+* Fix problems with I2C support for mpc5200
+
+* Adapt TRAB configuration and auto_update to new memory layout
+
+* Add configuration for wtk board
+
+* Add support for the Sharp LQ065T9DR51U LCD display
+
+* Patch by Rune Torgersen, 17 Sep 2003:
+  - Fixes for MPC8266 default config
+  - Allow eth_loopback_test() on 8260 to use a subset of the FCC's
+
+* Patches by Jon Diekema, 17 Sep 2003:
+  - update README (SHOW_BOOT_PROGRESS values for cmd_nand.c and
+    env_common.c)
+  - sbc8260 tweaks
+  - adjust "help" output
+
+* Patches by Anders Larsen, 17 Sep 2003:
+  - fix spelling errors
+  - set GD_FLG_DEVINIT flag only after device function pointers
+    are valid
+  - Allow CFG_ALT_MEMTEST on systems where address zero isn't
+    writeable
+  - enable 3.rd UART (ST-UART) on PXA(XScale) CPUs
+  - trigger watchdog while waiting in serial driver
+
+* Add auto-update code for TRAB board using USB memory sticks,
+  support new configuration with more memory
+
+* disable MPC5200 bus pipelining as workaround for bus contention
+
+* Modify XLB arbiter priorities on MPC5200 so all devices use same
+  priority; configure critical interrupts to be handled like external
+  interrupts
+
+* Make IPB clock on MGT5100/MPC5200 configurable in board config file;
+  go back to 66 MHz for stability
+
+* Patches by Jon Diekema, 15 Sep 2003:
+  - add description for missing CFG_CMD_* entries in the README file
+  - sacsng tweaks
+
+* Patch by Gleb Natapov, 14 Sep 2003:
+  enable watchdog support for all MPC824x boards that have a watchdog
+
+* On MPC5200, restrict FEC to a maximum of 10 Mbps to work around the
+  "Non-octet Aligned Frame" errors we see at 100 Mbps
+
+* Patch by Sharad Gupta, 14 Sep 2003:
+  fix SPR numbers for upper BAT register ([ID]BAT[4-7][UL])
+
+* Patch by llandre, 11 Sep 2003:
+  update configuration for PPChameleonEVB board
+
+* Patch by David Müller, 13 Sep 2003:
+  various changes to VCMA9 board specific files
+
+* Add I2C support for MGT5100 / MPC5200
+
+* Patch by Rune Torgersen, 11 Sep 2003:
+  Changed default memory option on MPC8266ADS to NOT be Page Based
+  Interleave, since this doesn't work very well with the standard
+  16MB DIMM
+
+* Patch by George G. Davis, 12 Sep 2003:
+  fix Makefile settings for sk98 driver
+
+* Patch by Stefan Roese, 12 Sep 2003:
+  - new boards added: DP405, HUB405, PLU405, VOH405
+  - some esd boards updated
+  - cpu/ppc4xx/sdram.c: disable memory controller before setting
+    first values
+  - cpu/ppc4xx/405_pci.c: set vendor id on PPC405EP systems
+
+* Patch by Martin Krause, 11 Sep 2003:
+  add burn-in tests for TRAB board
+
+* Enable instruction cache on MPC5200 board
+
+* Patch by Denis Peter, 11 Sep 2003:
+  - fix USB data pointer assignment for bulk only transfer.
+  - prevent to display erased directories in FAT filesystem.
+
+* Change output format for NAND flash - make it look like for other
+  memory, too
+
+======================================================================
+Changes for U-Boot 0.4.8:
+======================================================================
+
+* Add I2C and RTC support for RMU board
+
+* Patches by Denis Peter, 9 Sep 2003:
+  add FAT support for IDE, SCSI and USB
+
+* Patches by Gleb Natapov, 2 Sep 2003:
+  - cleanup of POST code for unsupported architectures
+  - MPC824x locks way0 of data cache for use as initial RAM;
+    this patch unlocks it after relocation to RAM and invalidates
+    the locked entries.
+
+* Patch by Gleb Natapov, 30 Aug 2003:
+  new I2C driver for mpc107 bridge. Now works from flash.
+
+* Patch by Dave Ellis, 11 Aug 2003:
+  - JFFS2: fix typo in common/cmd_jffs2.c
+  - JFFS2: fix CFG_JFFS2_SORT_FRAGMENTS option
+  - JFFS2: remove node version 0 warning
+  - JFFS2: accept JFFS2 PADDING nodes
+  - SXNI855T: add AM29LV800 support
+  - SXNI855T: move environment from EEPROM to flash
+  - SXNI855T: boot from JFFS2 in NOR or NAND flash
+
+* Patch by Bill Hargen, 11 Aug 2003:
+  fixes for I2C on MPC8240
+  - fix i2c_write routine
+  - fix iprobe command
+  - eliminates use of global variables, plus dead code, cleanup.
+
+* Add support for USB Mass Storage Devices (BBB)
+  (tested with USB memory sticks only)
+
+* Avoid flicker on TRAB's VFD
+
+* Add support for SK98xx driver
+
+* Add PCI support for SL8245 board
+
+* Support IceCube board configurations with 1 x AMD AM29LV065 (8 MB)
+  or 1 x AM29LV652 (two LV065 in one chip = 16 MB);
+  Run IPB at 133 Mhz; adjust the MII clock frequency accordingly
+
+* Set BRG_CLK on PM825/826 to 64MHz (VCO_OUT / 4, instead of 16  MHz)
+  to allow for more accurate baudrate settings
+  (error now 0.7% at 115 kbps, instead of 3.5% before)
+
+* Patch by Andreas Mohr, 4 Sep 2003:
+  Fix a lot of spelling errors
+
+* Add support for PPChameleon Eval Board
+
+* Add support for P3G4 board
+
+* Fix problem with MGT5100 FEC driver: add "early" MAC address
+  initialization
+
+* Patch by Yuli Barcohen, 7 Aug 2003:
+  check BCSR to detect if the board is configured in PCI mode
+
+======================================================================
+Changes for U-Boot 0.4.7:
+======================================================================
+
+* Patch by Raghu Krishnaprasad, 7 Aug 2003:
+  add support for Adder II MPC852T module
+
+* Patch by George G. Davis, 19 Aug 2003:
+  fix TI Innovator/OMAP1510 pin configs
+
+* Patches by Kshitij, 18 Aug 2003
+  - add support for arm926ejs cpu core
+  - add support for TI OMAP 1610 Innovator Board
+
+* Patch by Yuli Barcohen, 14 Aug 2003:
+  add support for bzip2 uncompression
+
+* Add GCC library to examples/Makefile so GCC utility functions will
+  be resolved, too
+
+* Add I2C and RTC support for RMU board using software I2C driver
+  (because of better response to iprobe command); fix problem with
+  "reset" command
+
+* Patch by Matthias Fuchs, 28 Aug 2003:
+  Added CONFIG_BOOTP_DNS2 and CONFIG_BOOTP_SEND_HOSTNAME to
+  CONFIG_BOOTP_MAKS (see README).
+
+* Fix ICU862 environment problem
+
+* Fix RAM size detection for RMU board
+
+* Implement "reset" for MGT5100/MPC5200 systems
+
+======================================================================
+Changes for U-Boot 0.4.6:
+======================================================================
+
+* Make Ethernet autonegotiation on INCA-IP work for all clock rates;
+  allow selection of clock frequency as "make" target
+
+* Implement memory autosizing code for IceCube boards
+
+* Configure network port on INCA-IP for autonegotiation
+
+* Fix overflow problem in network timeout code
+
+* Patch by Richard Woodruff, 8 Aug 2003:
+  Allow crc32 to be used at address 0x000 (crc32_no_comp, too).
+
+======================================================================
+Changes for U-Boot 0.4.5:
+======================================================================
+
+* Update for TQM board defaults:
+  disable clocks_in_mhz, enable boot count limit
+
+* Removed tools/gdb from "make all" target.  Added make target "gdbtools"
+  in toplevel directory instead.  Removed astest.c from tools/gdb because
+  it is no longer relevant.
+
+* Fix PCI support for MPC5200 / IceCube Board
+
+* Map ISP1362 USB OTG controller for NSCU board
+
+* Patch by Brad Parker, 02 Aug 2003:
+  fix sc520_cdp problems
+
+* Implement Boot Cycle Detection (Req. 2.3 of OSDL CGL Reqirements)
+
+* Allow erase command to cross flash bank boundaries
+
+* Patch by Scott McNutt, 21 Jul 2003:
+  Add support for LynuxWorks Kernel Downloadable Images (KDIs).
+  Both LynxOS and BlueCat linux KDIs are supported.
+
+* Patch by Richard Woodruff, 25 Jul 2003:
+  use more reliable reset for OMAP/925T
+
+* Patch by Nye Liu, 25 Jul 2003:
+  fix typo in mpc8xx.h
+
+* Patch by Richard Woodruff, 24 Jul 2003:
+  Fixes for cmd_nand.c:
+  - Fixed null dereferece which could result in incorrect ECC values.
+  - Added support for devices with no Ready/Busy signal hooked up.
+  - Added OMAP1510 read/write protect handling.
+  - Fixed nand.h's ECCPOS. A conflict existed with POS5 and badblock
+    for non-JFFS2.
+  - Switched default ECC to be JFFS2.
+
+* Allow crc32 to be used at address 0x000
+
+* Provide consistent interface to standalone applications to access
+  the 'global_data' structure
+  Provide a doc/README.standalone more useful to users/developers.
+
+* Make IceCube MGT5100 FEC driver work
+
+* Implement new mechanism to export U-Boot's functions to standalone
+  applications: instead of using (PPC-specific) system calls we now
+  use a jump table; please see doc/README.standalone for details
+
+* Patch by Dave Westwood, 24 Jul 2003:
+  added support for Unity OS (a proprietary OS)
+
+* Patch by Detlev Zundel, 23 Jul 2003:
+  add "imls" command to print flash table of contents
+
+* Fix cold boot detection for log buffer reset
+
+* Return error for invalid length specifiers with "cp.X" etc.
+
+* Fix startup problem on MIPS
+
+* Allow for CONFIG_SPLASH_SCREEN even when no explicit
+  bitmap support is configured
+
+* Patch by Bill Hargen, 18 Jul 2003:
+  - fix endinaness problem in cpu/mpc824x/drivers/i2c/i2c1.c
+
+* Patch by Denis Peter, 18 Jul 2003:
+  - fix memory configuration for MIP405T
+  - fix printout of baudrate for "loadb <loadaddr> <baudrate>"
+
+* Cleanup of TQM82xx configurations; use "official" board types
+  to make selection easier.
+
+* Patch by Martin Krause, 17 Jul 2003:
+  add delay to get I2C working with "imm" command and s3c24x0_i2c.c
+
+* Patch by Richard Woodruff, 17 July 03:
+  - Fixed bug in OMAP1510 baud rate divisor settings.
+
+* Patch by Nye Liu, 16 July 2003:
+  MPC860FADS fixes:
+  - add MPC86xADS support (uses MPC86xADS.h)
+  - add 866P/T core support (also MPC859T/MPC859DSL/MPC852T)
+    o PLPRCR changes
+    o BRG changes (EXTAL/XTAL restricted to 10MHz)
+    o don't trust gclk() software measurement by default, depend on
+      CONFIG_8xx_GCLK_FREQ
+  - add DRAM SIMM not installed detection
+  - use more "correct" SDRAM initialization sequence
+  - allow different SDRAM sizes (8xxADS has 8M)
+  - default DER is 0
+  - remove unused MAMR defines from FADS860T.h (all done in fads.c)
+  - rename MAMR/MBMR defines to be more consistent. Should eventually
+    be merged into MxMR to better reflect the PowerQUICC datasheet.
+
+* Patch by Yuli Barcohen, 16 Jul 2003:
+  support new Motorola PQ2FADS-ZU evaluation board which replaced
+  MPC8260ADS and MPC8266ADS
+
+======================================================================
+Changes for U-Boot 0.4.4:
+======================================================================
+
+* Add support for IceCube board (with MGT5100 and MPC5200 CPUs)
+
+* Add support for MGT5100 and MPC5200 processors
+
+* Patch by Lutz Dennig, 15 Jul 2003:
+  update for R360MPI board
+
+======================================================================
+Changes for U-Boot 0.4.3:
+======================================================================
+
+* Patches by Kshitij, 04 Jul 2003
+  - added support for arm925t cpu core
+  - added support for TI OMAP 1510 Innovator Board
+
+* Patches by Martin Krause, 14 Jul 2003:
+  - add I2C support for s3c2400 systems (trab board)
+  - (re-) add "ping" to command table
+
+* Fix handling of "slow" POST routines
+
+* Patches by Yuli Barcohen, 13 Jul 2003:
+  - Correct flash and JFFS2 support for MPC8260ADS
+  - fix PVR values and clock generation for PowerQUICC II family
+    (8270/8275/8280)
+
+* Patch by Bernhard Kuhn, 08 Jul 2003:
+  - add support for M68K targets
+
+* Patch by Ken Chou, 3 Jul:
+  - Fix PCI config table for A3000
+  - Fix iobase for natsemi.c
+    (PCI_BASE_ADDRESS_0 is the IO base register for DP83815)
+
+* Allow to enable "slow" POST routines by key press on power-on
+* Fix temperature dependend switching of LCD backlight on LWMON
+* Tweak output format for LWMON
+
+* Patch by Stefan Roese, 11 Jul 2003:
+  - Fix bug in CONFIG_VERSION_VARIABLE.
+  - AR405 config updated.
+  - OCRTC/ORSG: bsp command added.
+  - ASH405 bsp update.
+
+======================================================================
+Changes for U-Boot 0.4.2:
+======================================================================
+
+* Add support for NSCU board
+
+* Add support for TQM823M, TQM850M, TQM855M and TQM860M modules
+
+* Add support for Am29LV160ML, Am29LV320ML, and Am29LV640ML
+  mirror bit flash on TQM8xxM modules
+
+* Patch by Kenneth Johansson, 30 Jun 2003:
+  get rid of MK_CMD_ENTRY macro; update doc/README.command
+
+* Patch by Seb James, 30 Jun 2003:
+  Improve documentation of I2C configuration in README
+
+* Fix problems with previous log buffer "fixes"
+
+* Fix minor help text issues
+
+* "log append" did not append a newline
+
+======================================================================
+Changes for U-Boot 0.4.1:
+======================================================================
+
+* Fix some missing commands, cleanup header files
+  (autoscript, bmp, bsp, fat, mmc, nand, portio, ...)
+
 * Rewrite command lookup and help command (fix problems with bubble
  sort when sorting command name list). Minor cleanup here and there.

@@ -10,7 +516,7 @@ Changes since U-Boot 0.4.0:
  - PIC on LWMON board needs delay after power-on
  - Add missing RSR definitions for MPC8xx
  - Improve log buffer handling: guarantee clean reset after power-on
-  - Add support for EXBITGEN board
+  - Add support for EXBITGEN board (aka "genie")
  - Add support for SL8245 board

 * Code cleanup:
--- a/33
+++ b/33
@@ -18,14 +18,14 @@ N: Dr. Bruno Achauer
 E: bruno@exet-ag.de
 D: Support for NetBSD (both as host and target system)

-N: Swen Anderson
-E: sand@peppercon.de
-D: ERIC Support
-
 N: Guillaume Alexandre
 E: guillaume.alexandre@gespac.ch
 D: Add PCIPPC6 configuration

+N: Swen Anderson
+E: sand@peppercon.de
+D: ERIC Support
+
 N: Pantelis Antoniou
 E: panto@intracom.gr
 D: NETVIA board support, ARTOS support.
@@ -75,7 +75,7 @@ E: clark@esteem.com
 D: ESTEEM192E support

 N: Magnus Damm
-E: eramdam@kieray1.p.y.ki.era.ericsson.se
+E: damm@opensource.se
 D: 8xxrom

 N: Arun Dharankar
@@ -182,13 +182,22 @@ N: Brad Kemp
 E: Brad.Kemp@seranoa.com
 D: Port to Windriver ppmc8260 board

+N: Sangmoon Kim
+E: dogoil@etinsys.com
+D: Support for debris board
+
 N: Thomas Koeller
 E: tkoeller@gmx.net
 D: Port to Motorola Sandpoint 3 (MPC8240)

+N: Raghu Krishnaprasad
+E: Raghu.Krishnaprasad@fci.com
+D: Support for Adder-II MPC852T evaluation board
+W: http://www.forcecomputers.com
+
 N: Thomas Lange
-E: thomas@corelatus.com
-D: Support for GTH board; lots of PCMCIA fixes
+E: thomas@corelatus.se
+D: Support for GTH and dbau1x00 boards; lots of PCMCIA fixes

 N: The LEOX team
 E: team@leox.org
@@ -219,6 +228,10 @@ N: David M
 E: d.mueller@elsoft.ch
 D: Support for Samsung ARM920T SMDK2410 eval board

+N: Scott McNutt
+E: smcnutt@psyent.com
+D: Support for Altera Nios-32 CPU, for Nios Cyclone Development Kit (DK-1C20)
+
 N: Rolf Offermanns
 E: rof@sysgo.de
 D: Initial support for SSV-DNP1110, SMC91111 driver
@@ -299,6 +312,6 @@ E: azu@sysgo.de
 D: Overall improvements on StrongARM, ARM720TDMI; Support for Tuxscreen; initial PCMCIA support for ARM
 W: www.elinos.com

-N: Pantelis Antoniou
-E: panto@intracom.gr
-D: NETVIA board support, ARTOS support.
+N: Xianghua Xiao
+E: x.xiao@motorola.com
+D: Support for Motorola 85xx(PowerQUICC III) chip, MPC8540ADS and MPC8560ADS boards.
--- a/48
+++ b/48
@@ -25,6 +25,10 @@ Pantelis Antoniou <panto@intracom.gr>

 	NETVIA			MPC8xx

+Yuli Barcohen <yuli@arabellasw.com>
+
+	ZPC1900			MPC8265
+
 Jerry Van Baren <gerald.vanbaren@smiths-aerospace.com>

 	sacsng			MPC8260
@@ -52,6 +56,8 @@ Wolfgang Denk <wd@denx.de>
 	FPS850L			MPC850
 	FPS860L			MPC860
 	ICU862			MPC862
+	IceCube_5100		MGT5100
+	IceCube_5200		MPC5200
 	IP860			MPC860
 	IVML24			MPC860
 	IVML24_128		MPC860
@@ -72,7 +78,6 @@ Wolfgang Denk <wd@denx.de>
 	TQM855L			MPC855
 	TQM860L			MPC860
 	TQM860L_FEC		MPC860
-	TTTech			MPC823
 	c2mon			MPC855
 	hermes			MPC860
 	lwmon			MPC823
@@ -88,9 +93,12 @@ Wolfgang Denk <wd@denx.de>
 	TQM8255			MPC8255

 	CPU86			MPC8260
+	PM825			MPC8250
 	PM826			MPC8260
 	TQM8260			MPC8260

+	P3G4			MPC7410
+
 	PCIPPC2			MPC750
 	PCIPPC6			MPC750

@@ -142,11 +150,19 @@ Brad Kemp <Brad.Kemp@seranoa.com>

 	ppmc8260		MPC8260

+Sangmoon Kim <dogoil@etinsys.com>
+
+	debris			MPC8245
+
+Raghu Krishnaprasad <raghu.krishnaprasad@fci.com>
+
+	ADDERII			MPC852T
+
 Nye Liu <nyet@zumanetworks.com>

 	ZUMA			MPC7xx_74xx

-Thomas Lange <thomas@corelatus.com>
+Thomas Lange <thomas@corelatus.se>

 	GTH			MPC860

@@ -192,11 +208,15 @@ Stefan Roese <stefan.roese@esd-electronics.com>
 	CPCI440			PPC440GP
 	CPCIISER4		PPC405GP
 	DASA_SIM		IOP480 (PPC401)
+	DP405			PPC405EP
 	DU405			PPC405GP
+	HUB405			PPC405EP
 	OCRTC			PPC405GP
 	ORSG			PPC405GP
 	PCI405			PPC405GP
+	PLU405			PPC405EP
 	PMC405			PPC405GP
+	VOH405			PPC405EP

 Peter De Schrijver <p2@mind.be>

@@ -220,6 +240,11 @@ John Zhan <zhanz@sinovee.com>

 	svm_sc8xx		MPC8xx

+Xianghua Xiao <x.xiao@motorola.com>
+
+	MPC8540ADS		MPC8540
+	MPC8560ADS		MPC8560
+
 -------------------------------------------------------------------------

 Unknown / orphaned boards:
@@ -269,12 +294,17 @@ Kyle Harris <kharris@nexus-tech.net>

 	lubbock			xscale
 	cradle			xscale
+	ixdp425			xscale

 Gary Jennejohn <gj@denx.de>

 	smdk2400		ARM920T
 	trab			ARM920T

+Kshitij Gupta <kshitij@ti.com>
+	omap1510inn		ARM925T
+	omap1610inn		ARM926EJS
+
 David Müller <d.mueller@elsoft.ch>

 	smdk2410		ARM920T
@@ -317,6 +347,20 @@ Wolfgang Denk <wd@denx.de>
 	incaip			MIPS32 4Kc
 	purple			MIPS64 5Kc

+Thomas Lange <thomas@corelatus.se>
+	dbau1x00		MIPS32 Au1000
+
+#########################################################################
+# Nios-32 Systems:							#
+#									#
+# Maintainer Name, Email Address					#
+#	Board			CPU					#
+#########################################################################
+
+Scott McNutt <smcnutt@psyent.com>
+
+	DK1C20			Nios-32
+
 #########################################################################
 # End of MAINTAINERS list						#
 #########################################################################
--- a/91
+++ b/91
@@ -18,25 +18,34 @@ LIST_5xx="	\
 	cmi_mpc5xx							\
 "

+#########################################################################
+## MPC5xxx Systems
+#########################################################################
+
+LIST_5xxx="	\
+	IceCube_5100	IceCube_5200					\
+"
+
 #########################################################################
 ## MPC8xx Systems
 #########################################################################

 LIST_8xx="	\
-	ADS860		AMX860		c2mon		CCM		\
-	cogent_mpc8xx	ESTEEM192E	ETX094		ELPT860		\
-	FADS823		FADS850SAR	FADS860T	FLAGADM		\
-	FPS850L		GEN860T		GEN860T_SC	GENIETV		\
-	GTH		hermes		IAD210		ICU862_100MHz	\
-	IP860		IVML24		IVML24_128	IVML24_256	\
-	IVMS8		IVMS8_128	IVMS8_256	KUP4K           \
-	LANTEC	        lwmon   	MBX		MBX860T		\
-	MHPC		MVS1		NETVIA		NETVIA_V2	\
-	NX823		pcu_e		R360MPI		RBC823		\
-	rmu		RPXClassic	RPXlite		RRvision	\
-	SM850		SPD823TS	svm_sc8xx	SXNI855T	\
-	TOP860		TQM823L		TQM823L_LCD	TQM850L		\
-	TQM855L		TQM860L		TTTech		v37		\
+	AdderII		ADS860		AMX860		c2mon		\
+	CCM		cogent_mpc8xx	ESTEEM192E	ETX094		\
+	ELPT860		FADS823		FADS850SAR	FADS860T	\
+	FLAGADM		FPS850L		GEN860T		GEN860T_SC	\
+	GENIETV		GTH		hermes		IAD210		\
+	ICU862_100MHz	IP860		IVML24		IVML24_128	\
+	IVML24_256	IVMS8		IVMS8_128	IVMS8_256	\
+	KUP4K           LANTEC	        lwmon   	MBX		\
+	MBX860T		MHPC		MPC86xADS	MVS1		\
+	NETVIA		NETVIA_V2	NX823		pcu_e		\
+	R360MPI		RBC823		rmu		RPXClassic	\
+	RPXlite		RRvision	SM850		SPD823TS	\
+	svm_sc8xx	SXNI855T	TOP860		TQM823L		\
+	TQM823L_LCD	TQM850L		TQM855L		TQM860L		\
+	v37								\
 "

 #########################################################################
@@ -45,12 +54,13 @@ LIST_8xx="	\

 LIST_4xx="	\
 	ADCIOP		AR405		ASH405          BUBINGA405EP    \
-        CANBT		CPCI405		CPCI4052 	CPCI405AB       \
+	CANBT		CPCI405		CPCI4052 	CPCI405AB       \
 	CPCI440         CPCIISER4	CRAYL1  	DASA_SIM	\
-        DU405    	EBONY           ERIC  		EXBITGEN	\
-	MIP405  	MIP405T		ML2		OCRTC		\
-	ORSG		PCI405		PIP405		PMC405          \
-	W7OLMC		W7OLMG          WALNUT405			\
+	DP405           DU405    	EBONY           ERIC  		\
+	EXBITGEN	HUB405          MIP405  	MIP405T		\
+	ML2		OCRTC		ORSG		PCI405		\
+	PIP405		PLU405          PMC405          PPChameleonEVB	\
+	VOH405          W7OLMC		W7OLMG          WALNUT405	\
 "

 #########################################################################
@@ -59,8 +69,9 @@ LIST_4xx="	\

 LIST_824x="	\
 	A3000           BMW		CPC45		CU824		\
-	MOUSSE          MUSENKI    	OXC		PN62		\
-	Sandpoint8240   Sandpoint8245	SL8245		utx8245		\
+	debris		MOUSSE          MUSENKI    	OXC		\
+	PN62		Sandpoint8240   Sandpoint8245	SL8245		\
+	utx8245								\
 "

 #########################################################################
@@ -72,7 +83,15 @@ LIST_8260="	\
 	gw8260		hymod		IPHASE4539	MPC8260ADS	\
 	MPC8266ADS	PM826		ppmc8260	RPXsuper	\
 	rsdproto	sacsng		sbc8260		SCM		\
-	TQM8260								\
+	TQM8260_AC	TQM8260_AD	TQM8260_AE	ZPC1900		\
+"
+
+#########################################################################
+## MPC85xx Systems (includes 8540, 8560 etc.)
+#########################################################################
+
+LIST_85xx="	\
+	MPC8540ADS	MPC8560ADS					\
 "

 #########################################################################
@@ -80,15 +99,18 @@ LIST_8260="	\
 #########################################################################

 LIST_74xx="	\
-	EVB64260	PCIPPC2		PCIPPC6		ZUMA		\
+	EVB64260	P3G4		PCIPPC2		PCIPPC6		\
+	ZUMA								\
 "

 LIST_7xx="	\
 	BAB7xx		ELPPC						\
 "

-LIST_ppc="${LIST_5xx}  ${LIST_8xx}  \
+LIST_ppc="${LIST_5xx}  ${LIST_5xxx} \
+	  ${LIST_8xx}  \
 	  ${LIST_824x} ${LIST_8260} \
+	  ${LIST_85xx}	\
 	  ${LIST_4xx}		    \
 	  ${LIST_74xx} ${LIST_7xx}"

@@ -108,7 +130,11 @@ LIST_ARM7="ep7312 impa7"
 ## ARM9 Systems
 #########################################################################

-LIST_ARM9="at91rm9200dk smdk2400 smdk2410 trab VCMA9"
+LIST_ARM9="	\
+	at91rm9200dk	omap1510inn	omap1610inn			\
+	smdk2400	smdk2410	trab				\
+	VCMA9								\
+"

 #########################################################################
 ## Xscale Systems
@@ -116,18 +142,22 @@ LIST_ARM9="at91rm9200dk smdk2400 smdk2410 trab VCMA9"

 LIST_pxa="cradle csb226 innokom lubbock wepep250"

+LIST_ixp="ixdp425"

-LIST_arm="${LIST_SA} ${LIST_ARM7} ${LIST_ARM9} ${LIST_pxa}"
+
+LIST_arm="${LIST_SA} ${LIST_ARM7} ${LIST_ARM9} ${LIST_pxa} ${LIST_ixp}"

 #########################################################################
-## MIPS 4Kc Systems
+## MIPS Systems
 #########################################################################

 LIST_mips4kc="incaip"

 LIST_mips5kc="purple"

-LIST_mips="${LIST_mips4kc} ${LIST_mips5kc}"
+LIST_au1x00="dbau1x00"
+
+LIST_mips="${LIST_mips4kc} ${LIST_mips5kc} ${LIST_au1x00}"

 #########################################################################
 ## i386 Systems
@@ -159,7 +189,10 @@ build_target() {
 for arg in $@
 do
 	case "$arg" in
-	5xx|8xx|824x|8260|4xx|7xx|74xx|SA|ARM7|ARM9|ppc|arm|pxa|mips|I486|x86)
+	ppc|5xx|5xxx|8xx|824x|8260|85xx|4xx|7xx|74xx| \
+	arm|SA|ARM7|ARM9|pxa|ixp| \
+	mips| \
+	x86|I486)
 			for target in `eval echo '$LIST_'${arg}`
 			do
 				build_target ${target}
--- a/278
+++ b/278
@@ -69,6 +69,9 @@ endif
 ifeq ($(ARCH),mips)
 CROSS_COMPILE = mips_4KC-
 endif
+ifeq ($(ARCH),nios)
+CROSS_COMPILE = nios-elf-
+endif
 endif
 endif

@@ -76,6 +79,7 @@ export	CROSS_COMPILE

 # The "tools" are needed early, so put this first
 SUBDIRS	= tools \
+	  examples \
 	  lib_generic \
 	  lib_$(ARCH) \
 	  cpu/$(CPU) \
@@ -87,9 +91,9 @@ SUBDIRS	= tools \
 	  rtc \
 	  dtt \
 	  drivers \
+	  drivers/sk98lin \
 	  post \
-	  post/cpu \
-	  examples
+	  post/cpu

 #########################################################################
 # U-Boot objects....order is important (i.e. start must be first)
@@ -102,6 +106,9 @@ endif
 ifeq ($(CPU),ppc4xx)
 OBJS +=	cpu/$(CPU)/resetvec.o
 endif
+ifeq ($(CPU),mpc85xx)
+OBJS += cpu/$(CPU)/resetvec.o
+endif

 LIBS  =	board/$(BOARDDIR)/lib$(BOARD).a
 LIBS += cpu/$(CPU)/lib$(CPU).a
@@ -112,17 +119,19 @@ LIBS += disk/libdisk.a
 LIBS += rtc/librtc.a
 LIBS += dtt/libdtt.a
 LIBS += drivers/libdrivers.a
+LIBS += drivers/sk98lin/libsk98lin.a
 LIBS += post/libpost.a post/cpu/libcpu.a
 LIBS += common/libcommon.a
 LIBS += lib_generic/libgeneric.a
+# Add GCC lib
+PLATFORM_LIBS += -L $(shell dirname `$(CC) $(CFLAGS) -print-libgcc-file-name`) -lgcc

+#########################################################################
 #########################################################################

-all:		u-boot.srec u-boot.bin System.map
+ALL = u-boot.srec u-boot.bin System.map

-install:	all
-		-cp u-boot.bin /tftpboot/u-boot.bin
-		-cp u-boot.bin /net/denx/tftpboot/u-boot.bin
+all:		$(ALL)

 u-boot.srec:	u-boot
 		$(OBJCOPY) ${OBJCFLAGS} -O srec $< $@
@@ -130,18 +139,28 @@ u-boot.srec:	u-boot
 u-boot.bin:	u-boot
 		$(OBJCOPY) ${OBJCFLAGS} -O binary $< $@

+u-boot.img:	u-boot.bin
+		./tools/mkimage -A $(ARCH) -T firmware -C none \
+		-a $(TEXT_BASE) -e 0 \
+		-n $(shell sed -n -e 's/.*U_BOOT_VERSION//p' include/version.h | \
+			sed -e 's/"[	 ]*$$/ for $(BOARD) board"/') \
+		-d $< $@
+
 u-boot.dis:	u-boot
 		$(OBJDUMP) -d $< > $@

 u-boot:		depend subdirs $(OBJS) $(LIBS) $(LDSCRIPT)
 		UNDEF_SYM=`$(OBJDUMP) -x $(LIBS) |sed  -n -e 's/.*\(__u_boot_cmd_.*\)/-u\1/p'|sort|uniq`;\
 		$(LD) $(LDFLAGS) $$UNDEF_SYM $(OBJS) \
-			--start-group $(LIBS) --end-group \
+			--start-group $(LIBS) $(PLATFORM_LIBS) --end-group \
 			-Map u-boot.map -o u-boot

 subdirs:
 		@for dir in $(SUBDIRS) ; do $(MAKE) -C $$dir || exit 1 ; done

+gdbtools:
+		$(MAKE) -C tools/gdb || exit 1
+
 depend dep:
 		@for dir in $(SUBDIRS) ; do $(MAKE) -C $$dir .depend ; done

@@ -181,10 +200,29 @@ unconfig:
 cmi_mpc5xx_config:	unconfig
 	@./mkconfig $(@:_config=) ppc mpc5xx cmi

+#########################################################################
+## MPC5xxx Systems
+#########################################################################
+IceCube_5200_config	\
+IceCube_5100_config:		unconfig
+	@ >include/config.h
+	@[ -z "$(findstring _5200,$@)" ] || \
+		{ echo "#define CONFIG_MPC5200"		>>include/config.h ; \
+		  echo "... with MPC5200 processor" ; \
+		}
+	@[ -z "$(findstring _5100,$@)" ] || \
+		{ echo "#define CONFIG_MGT5100"		>>include/config.h ; \
+		  echo "... with MGT5100 processor" ; \
+		}
+	@./mkconfig -a IceCube ppc mpc5xxx icecube
+
 #########################################################################
 ## MPC8xx Systems
 #########################################################################

+AdderII_config:	unconfig
+	@./mkconfig $(@:_config=) ppc mpc8xx adderII
+
 ADS860_config:	unconfig
 	@./mkconfig $(@:_config=) ppc mpc8xx fads

@@ -211,6 +249,7 @@ ETX094_config	:	unconfig

 FADS823_config	\
 FADS850SAR_config \
+MPC86xADS_config \
 FADS860T_config:	unconfig
 	@./mkconfig $(@:_config=) ppc mpc8xx fads

@@ -372,6 +411,7 @@ xtract_8xx = $(subst _66MHz,,$(subst _80MHz,,$(subst _100MHz,,$(subst _LCD,,$(su

 FPS850L_config		\
 FPS860L_config		\
+NSCU_config		\
 TQM823L_config		\
 TQM823L_66MHz_config	\
 TQM823L_80MHz_config	\
@@ -390,6 +430,21 @@ TQM860L_80MHz_config	\
 TQM862L_config		\
 TQM862L_66MHz_config	\
 TQM862L_80MHz_config	\
+TQM823M_config		\
+TQM823M_66MHz_config	\
+TQM823M_80MHz_config	\
+TQM850M_config		\
+TQM850M_66MHz_config	\
+TQM850M_80MHz_config	\
+TQM855M_config		\
+TQM855M_66MHz_config	\
+TQM855M_80MHz_config	\
+TQM860M_config		\
+TQM860M_66MHz_config	\
+TQM860M_80MHz_config	\
+TQM862M_config		\
+TQM862M_66MHz_config	\
+TQM862M_80MHz_config	\
 TQM862M_100MHz_config:	unconfig
 	@ >include/config.h
 	@[ -z "$(findstring _66MHz,$@)" ] || \
@@ -421,9 +476,15 @@ v37_config:	unconfig
 	@echo "#define CONFIG_SHARP_LQ084V1DG21" >>include/config.h
 	@./mkconfig $(@:_config=) ppc mpc8xx v37

+wtk_config:	unconfig
+	@echo "#define CONFIG_LCD" >include/config.h
+	@echo "#define CONFIG_SHARP_LQ065T9DR51U" >>include/config.h
+	@./mkconfig -a TQM823L ppc mpc8xx tqm8xx
+
 #########################################################################
 ## PPC4xx Systems
 #########################################################################
+xtract_4xx = $(subst _MODEL_BA,,$(subst _MODEL_ME,,$(subst _MODEL_HI,,$(subst _config,,$1))))

 ADCIOP_config:	unconfig
 	@./mkconfig $(@:_config=) ppc ppc4xx adciop esd
@@ -458,6 +519,9 @@ CRAYL1_config:unconfig
 DASA_SIM_config: unconfig
 	@./mkconfig $(@:_config=) ppc ppc4xx dasa_sim esd

+DP405_config:	unconfig
+	@./mkconfig $(@:_config=) ppc ppc4xx dp405 esd
+
 DU405_config:	unconfig
 	@./mkconfig $(@:_config=) ppc ppc4xx du405 esd

@@ -470,6 +534,9 @@ ERIC_config:unconfig
 EXBITGEN_config:unconfig
 	@./mkconfig $(@:_config=) ppc ppc4xx exbitgen

+HUB405_config:	unconfig
+	@./mkconfig $(@:_config=) ppc ppc4xx hub405 esd
+
 MIP405_config:unconfig
 	@./mkconfig $(@:_config=) ppc ppc4xx mip405 mpl

@@ -491,9 +558,34 @@ PCI405_config:	unconfig
 PIP405_config:unconfig
 	@./mkconfig $(@:_config=) ppc ppc4xx pip405 mpl

+PLU405_config:	unconfig
+	@./mkconfig $(@:_config=) ppc ppc4xx plu405 esd
+
 PMC405_config:	unconfig
 	@./mkconfig $(@:_config=) ppc ppc4xx pmc405 esd

+PPChameleonEVB_MODEL_BA_config	\
+PPChameleonEVB_MODEL_ME_config	\
+PPChameleonEVB_MODEL_HI_config	\
+PPChameleonEVB_config:	unconfig
+	@ >include/config.h
+	@[ -z "$(findstring _MODEL_BA,$@)" ] || \
+		{ echo "#define CONFIG_PPCHAMELEON_MODULE_MODEL 0" >>include/config.h ; \
+		  echo "... BASIC model" ; \
+		}
+	@[ -z "$(findstring _MODEL_ME,$@)" ] || \
+		{ echo "#define CONFIG_PPCHAMELEON_MODULE_MODEL 1" >>include/config.h ; \
+		  echo "... MEDIUM model" ; \
+		}
+	@[ -z "$(findstring _MODEL_HI,$@)" ] || \
+		{ echo "#define CONFIG_PPCHAMELEON_MODULE_MODEL 2" >>include/config.h ; \
+		  echo "... HIGH-END model" ; \
+		}
+	@./mkconfig -a $(call xtract_4xx,$@) ppc ppc4xx PPChameleonEVB dave
+
+VOH405_config:	unconfig
+	@./mkconfig $(@:_config=) ppc ppc4xx voh405 esd
+
 W7OLMC_config	\
 W7OLMG_config: unconfig
 	@./mkconfig $(@:_config=) ppc ppc4xx w7o
@@ -556,6 +648,9 @@ utx8245_config: unconfig
 ## MPC8260 Systems
 #########################################################################

+atc_config:	unconfig
+	@./mkconfig $(@:_config=) ppc mpc8260 atc
+
 cogent_mpc8260_config:	unconfig
 	@./mkconfig $(@:_config=) ppc mpc8260 cogent

@@ -635,36 +730,62 @@ sbc8260_config:	unconfig
 SCM_config:		unconfig
 	@./mkconfig $(@:_config=) ppc mpc8260 SCM siemens

-TQM8255_config	\
-TQM8260_config	\
-TQM8260_L2_config	\
-TQM8255_266MHz_config	\
-TQM8260_266MHz_config	\
-TQM8260_L2_266MHz_config \
-TQM8255_300MHz_config	\
-TQM8260_300MHz_config:	unconfig
-	@ >include/config.h
-	@if [ "$(findstring _L2_,$@)" ] ; then \
+TQM8255_AA_config \
+TQM8260_AA_config \
+TQM8260_AB_config \
+TQM8260_AC_config \
+TQM8260_AD_config \
+TQM8260_AE_config \
+TQM8260_AF_config \
+TQM8260_AG_config \
+TQM8260_AH_config \
+TQM8265_AA_config:  unconfig
+	@case "$@" in \
+	TQM8255_AA_config) CTYPE=MPC8255; CFREQ=300; CACHE=no;  BMODE=8260;;  \
+	TQM8260_AA_config) CTYPE=MPC8260; CFREQ=200; CACHE=no;  BMODE=8260;; \
+	TQM8260_AB_config) CTYPE=MPC8260; CFREQ=200; CACHE=yes; BMODE=60x;;  \
+	TQM8260_AC_config) CTYPE=MPC8260; CFREQ=200; CACHE=yes; BMODE=60x;;  \
+	TQM8260_AD_config) CTYPE=MPC8260; CFREQ=300; CACHE=no;  BMODE=60x;;  \
+	TQM8260_AE_config) CTYPE=MPC8260; CFREQ=266; CACHE=no;  BMODE=8260;; \
+	TQM8260_AF_config) CTYPE=MPC8260; CFREQ=300; CACHE=no;  BMODE=60x;;  \
+	TQM8260_AG_config) CTYPE=MPC8260; CFREQ=300; CACHE=no;  BMODE=8260;; \
+	TQM8260_AH_config) CTYPE=MPC8260; CFREQ=300; CACHE=yes; BMODE=60x;;  \
+	TQM8265_AA_config) CTYPE=MPC8265; CFREQ=300; CACHE=no;  BMODE=60x;;  \
+	esac; \
+	>include/config.h ; \
+	if [ "$${CTYPE}" != "MPC8260" ] ; then \
+		echo "#define CONFIG_$${CTYPE}"	>>include/config.h ; \
+	fi; \
+	echo "#define CONFIG_$${CFREQ}MHz"	>>include/config.h ; \
+	echo "... with $${CFREQ}MHz system clock" ; \
+	if [ "$${CACHE}" == "yes" ] ; then \
 		echo "#define CONFIG_L2_CACHE"	>>include/config.h ; \
-		echo "... with L2 Cache support (60x Bus Mode)" ; \
+		echo "... with L2 Cache support" ; \
 	else \
 		echo "#undef CONFIG_L2_CACHE"	>>include/config.h ; \
 		echo "... without L2 Cache support" ; \
+	fi; \
+	if [ "$${BMODE}" == "60x" ] ; then \
+		echo "#define CONFIG_BUSMODE_60x" >>include/config.h ; \
+		echo "... with 60x Bus Mode" ; \
+	else \
+		echo "#undef CONFIG_BUSMODE_60x"  >>include/config.h ; \
+		echo "... without 60x Bus Mode" ; \
 	fi
-	@[ -z "$(findstring _266MHz,$@)" ] || \
-		{ echo "#define CONFIG_266MHz"	>>include/config.h ; \
-		  echo "... with 266MHz system clock" ; \
-		}
-	@[ -z "$(findstring _300MHz,$@)" ] || \
-		{ echo "#define CONFIG_300MHz"	>>include/config.h ; \
-		  echo "... with 300MHz system clock" ; \
-		}
-	@[ -z "$(findstring TQM8255_,$@)" ] || \
-		{ echo "#define CONFIG_MPC8255"	>>include/config.h ; }
 	@./mkconfig -a TQM8260 ppc mpc8260 tqm8260

-atc_config:	unconfig
-	@./mkconfig $(@:_config=) ppc mpc8260 atc
+ZPC1900_config: unconfig
+	@./mkconfig $(@:_config=) ppc mpc8260 zpc1900
+
+#########################################################################
+## MPC85xx Systems
+#########################################################################
+
+MPC8540ADS_config:      unconfig
+	@./mkconfig $(@:_config=) ppc mpc85xx mpc8540ads
+
+MPC8560ADS_config:      unconfig
+	@./mkconfig $(@:_config=) ppc mpc85xx mpc8560ads

 #########################################################################
 ## 74xx/7xx Systems
@@ -673,22 +794,28 @@ atc_config:	unconfig
 AmigaOneG3SE_config:	unconfig
 	@./mkconfig $(@:_config=) ppc 74xx_7xx AmigaOneG3SE MAI

+BAB7xx_config: unconfig
+	@./mkconfig $(@:_config=) ppc 74xx_7xx bab7xx eltec
+
+debris_config: unconfig
+	@./mkconfig $(@:_config=) ppc mpc824x debris etin
+
+ELPPC_config: unconfig
+	@./mkconfig $(@:_config=) ppc 74xx_7xx elppc eltec
+
 EVB64260_config	\
 EVB64260_750CX_config:	unconfig
 	@./mkconfig EVB64260 ppc 74xx_7xx evb64260

-ZUMA_config:	unconfig
+P3G4_config: unconfig
 	@./mkconfig $(@:_config=) ppc 74xx_7xx evb64260

 PCIPPC2_config \
 PCIPPC6_config: unconfig
 	@./mkconfig $(@:_config=) ppc 74xx_7xx pcippc2

-BAB7xx_config: unconfig
-	@./mkconfig $(@:_config=) ppc 74xx_7xx bab7xx eltec
-
-ELPPC_config: unconfig
-	@./mkconfig $(@:_config=) ppc 74xx_7xx elppc eltec
+ZUMA_config:	unconfig
+	@./mkconfig $(@:_config=) ppc 74xx_7xx evb64260

 #========================================================================
 # ARM
@@ -710,10 +837,16 @@ shannon_config	:	unconfig
 	@./mkconfig $(@:_config=) arm sa1100 shannon

 #########################################################################
-## ARM920T Systems
+## ARM92xT Systems
 #########################################################################

-xtract_trab = $(subst _big_flash,,$(subst _config,,$1))
+xtract_trab = $(subst _bigram,,$(subst _bigflash,,$(subst _old,,$(subst _config,,$1))))
+
+omap1510inn_config :	unconfig
+	@./mkconfig $(@:_config=) arm arm925t omap1510inn
+
+omap1610inn_config :	unconfig
+	@./mkconfig $(@:_config=) arm arm926ejs omap1610inn

 smdk2400_config	:	unconfig
 	@./mkconfig $(@:_config=) arm arm920t smdk2400
@@ -722,11 +855,23 @@ smdk2410_config	:	unconfig
 	@./mkconfig $(@:_config=) arm arm920t smdk2410

 trab_config \
-trab_big_flash_config:	unconfig
+trab_bigram_config \
+trab_bigflash_config \
+trab_old_config:	unconfig
 	@ >include/config.h
-	@[ -z "$(findstring _big_flash,$@)" ] || \
-		{ echo "#define CONFIG_BIG_FLASH" >>include/config.h ; \
-		  echo "... with big flash support" ; \
+	@[ -z "$(findstring _bigram,$@)" ] || \
+		{ echo "#define CONFIG_FLASH_8MB" >>include/config.h ; \
+		  echo "... with 8 MB Flash, 32 MB RAM" ; \
+		}
+	@[ -z "$(findstring _bigflash,$@)" ] || \
+		{ echo "#define CONFIG_RAM_16MB" >>include/config.h ; \
+		  echo "... with 16 MB Flash, 16 MB RAM" ; \
+		  echo "TEXT_BASE = 0x0CF00000" >board/trab/config.tmp ; \
+		}
+	@[ -z "$(findstring _old,$@)" ] || \
+		{ echo "#define CONFIG_OLD_VERSION" >>include/config.h ; \
+		  echo "... with small memory configuration" ; \
+		  echo "TEXT_BASE = 0x0CF00000" >board/trab/config.tmp ; \
 		}
 	@./mkconfig -a $(call xtract_trab,$@) arm arm920t trab

@@ -756,6 +901,9 @@ csb226_config	:	unconfig
 innokom_config	:	unconfig
 	@./mkconfig $(@:_config=) arm pxa innokom

+ixdp425_config	:	unconfig
+	@./mkconfig $(@:_config=) arm ixp ixdp425
+
 lubbock_config	:	unconfig
 	@./mkconfig $(@:_config=) arm pxa lubbock

@@ -787,12 +935,51 @@ sc520_spunk_rel_config	:	unconfig
 ## MIPS32 4Kc
 #########################################################################

-incaip_config :		unconfig
-	@./mkconfig $(@:_config=) mips mips incaip
+xtract_incaip = $(subst _100MHz,,$(subst _133MHz,,$(subst _150MHz,,$(subst _config,,$1))))
+
+incaip_100MHz_config	\
+incaip_133MHz_config	\
+incaip_150MHz_config	\
+incaip_config: unconfig
+	@ >include/config.h
+	@[ -z "$(findstring _100MHz,$@)" ] || \
+		{ echo "#define CPU_CLOCK_RATE 100000000" >>include/config.h ; \
+		  echo "... with 100MHz system clock" ; \
+		}
+	@[ -z "$(findstring _133MHz,$@)" ] || \
+		{ echo "#define CPU_CLOCK_RATE 133000000" >>include/config.h ; \
+		  echo "... with 133MHz system clock" ; \
+		}
+	@[ -z "$(findstring _150MHz,$@)" ] || \
+		{ echo "#define CPU_CLOCK_RATE 150000000" >>include/config.h ; \
+		  echo "... with 150MHz system clock" ; \
+		}
+	@./mkconfig -a $(call xtract_incaip,$@) mips mips incaip
+
+#########################################################################
+## MIPS64 5Kc
+#########################################################################

 purple_config :		unconfig
 	@./mkconfig $(@:_config=) mips mips purple

+#========================================================================
+# Nios
+#========================================================================
+#########################################################################
+## Nios32
+#########################################################################
+
+DK1C20_config:	unconfig
+	@./mkconfig $(@:_config=) nios nios dk1c20
+
+
+#########################################################################
+## MIPS32 AU1000
+#########################################################################
+dbau1x00_config		: 	unconfig
+	@./mkconfig $(@:_config=) mips mips dbau1x00
+
 #########################################################################
 #########################################################################

@@ -810,6 +997,7 @@ clean:
 	rm -f tools/gdb/astest tools/gdb/gdbcont tools/gdb/gdbsend
 	rm -f tools/env/fw_printenv tools/env/fw_setenv
 	rm -f board/cray/L1/bootscript.c board/cray/L1/bootscript.image
+	rm -f board/trab/trab_fkt board/trab/config.tmp

 clobber:	clean
 	find . -type f \
@@ -818,7 +1006,7 @@ clobber:	clean
 		| xargs rm -f
 	rm -f $(OBJS) *.bak tags TAGS
 	rm -fr *.*~
-	rm -f u-boot u-boot.bin u-boot.srec u-boot.map System.map
+	rm -f u-boot u-boot.map $(ALL)
 	rm -f tools/crc32.c tools/environment.c tools/env/crc32.c
 	rm -f tools/inca-swap-bytes cpu/mpc824x/bedbug_603e.c
 	rm -f include/asm/proc include/asm/arch include/asm
--- a/271
+++ b/271
@@ -119,12 +119,12 @@ U-Boot will always have a patchlevel of "0".
 Directory Hierarchy:
 ====================

- board		Board dependend files
- common	Misc architecture independend functions
+- board		Board dependent files
+- common	Misc architecture independent functions
 - cpu		CPU specific files
 - disk		Code for disk drive partition handling
 - doc		Documentation (don't expect too much)
- drivers	Common used device drivers
+- drivers	Commonly used device drivers
 - dtt		Digital Thermometer and Thermostat drivers
 - examples	Example code for standalone applications, etc.
 - include	Header Files
@@ -140,12 +140,16 @@ Directory Hierarchy:
 - tools		Tools to build S-Record or U-Boot images, etc.

 - cpu/74xx_7xx	Files specific to Motorola MPC74xx and 7xx CPUs
+- cpu/arm925t	Files specific to ARM	   925	   CPUs
+- cpu/arm926ejs	Files specific to ARM	926	CPUs
 - cpu/mpc5xx	Files specific to Motorola MPC5xx  CPUs
 - cpu/mpc8xx	Files specific to Motorola MPC8xx  CPUs
 - cpu/mpc824x	Files specific to Motorola MPC824x CPUs
 - cpu/mpc8260	Files specific to Motorola MPC8260 CPU
+- cpu/mpc85xx	Files specific to Motorola MPC85xx CPUs
 - cpu/ppc4xx	Files specific to IBM	   4xx	   CPUs

+
 - board/LEOX/   Files specific to boards manufactured by The LEOX team
 - board/LEOX/elpt860	Files specific to ELPT860 boards
 - board/RPXClassic
@@ -195,15 +199,24 @@ Directory Hierarchy:
 - board/lwmon	Files specific to LWMON	     boards
 - board/mbx8xx	Files specific to MBX	     boards
 - board/mpc8260ads
-		Files specific to MMPC8260ADS boards
+		Files specific to MPC8260ADS and PQ2FADS-ZU boards
+- board/mpc8540ads
+		Files specific to MPC8540ADS boards
+- board/mpc8560ads
+		Files specific to MPC8560ADS boards
 - board/mpl/	Files specific to boards manufactured by MPL
 - board/mpl/common	Common files for MPL boards
 - board/mpl/pip405	Files specific to PIP405     boards
 - board/mpl/mip405	Files specific to MIP405     boards
+- board/mpl/vcma9	Files specific to VCMA9      boards
 - board/musenki	Files specific to MUSEKNI    boards
 - board/mvs1	Files specific to MVS1       boards
 - board/nx823   Files specific to NX823      boards
 - board/oxc	Files specific to OXC        boards
+- board/omap1510inn
+		Files specific to OMAP 1510 Innovator boards
+- board/omap1610inn
+		Files specific to OMAP 1610 Innovator boards
 - board/pcippc2	Files specific to PCIPPC2/PCIPPC6 boards
 - board/pm826	Files specific to PM826      boards
 - board/ppmc8260
@@ -231,6 +244,7 @@ Directory Hierarchy:
 - board/westel/	Files specific to boards manufactured by Westel Wireless
 - board/westel/amx860	Files specific to AMX860     boards
 - board/utx8245	Files specific to UTX8245   boards
+- board/zpc1900	Files specific to Zephyr Engineering ZPC.1900 board

 Software Configuration:
 =======================
@@ -297,8 +311,10 @@ The following options need to be configured:
 		CONFIG_MPC823,	CONFIG_MPC850,	CONFIG_MPC855,	CONFIG_MPC860
 	or	CONFIG_MPC5xx
 	or	CONFIG_MPC824X, CONFIG_MPC8260
+	or	CONFIG_MPC85xx
 	or	CONFIG_IOP480
 	or	CONFIG_405GP
+	or	CONFIG_405EP
 	or	CONFIG_440
 	or	CONFIG_MPC74xx
 	or	CONFIG_750FX
@@ -346,15 +362,17 @@ The following options need to be configured:
 		CONFIG_IAD210,     CONFIG_RPXlite,    CONFIG_sbc8260,
 		CONFIG_EBONY,      CONFIG_sacsng,     CONFIG_FPS860L,
 		CONFIG_V37,        CONFIG_ELPT860,    CONFIG_CMI,
-		CONFIG_NETVIA,     CONFIG_RBC823
+		CONFIG_NETVIA,     CONFIG_RBC823,     CONFIG_ZPC1900,
+		CONFIG_MPC8540ADS, CONFIG_MPC8560ADS

 		ARM based boards:
 		-----------------

 		CONFIG_HHP_CRADLE,  CONFIG_DNP1110,    CONFIG_EP7312,
 		CONFIG_IMPA7,       CONFIG_LART,       CONFIG_LUBBOCK,
+		CONFIG_INNOVATOROMAP1510,	CONFIG_INNOVATOROMAP1610
 		CONFIG_SHANNON,     CONFIG_SMDK2400,   CONFIG_SMDK2410,
-		CONFIG_TRAB,	    CONFIG_AT91RM9200DK
+		CONFIG_TRAB,	    CONFIG_VCMA9,      CONFIG_AT91RM9200DK


 - CPU Module Type: (if CONFIG_COGENT is defined)
@@ -378,16 +396,25 @@ The following options need to be configured:
 					  the lcd display every second with
 					  a "rotator" |\-/|\-/

+- Board flavour: (if CONFIG_MPC8260ADS is defined)
+		CONFIG_ADSTYPE
+		Possible values are:
+			CFG_8260ADS	- original MPC8260ADS
+			CFG_8266ADS	- MPC8266ADS (untested)
+			CFG_PQ2FADS	- PQ2FADS-ZU or PQ2FADS-VR
+
+
 - MPC824X Family Member (if CONFIG_MPC824X is defined)
-	Define exactly one of
-	CONFIG_MPC8240, CONFIG_MPC8245
+		Define exactly one of
+		CONFIG_MPC8240, CONFIG_MPC8245

 - 8xx CPU Options: (if using an 8xx cpu)
 		Define one or more of
-		CONFIG_8xx_GCLK_FREQ	- if get_gclk_freq() can not work e.g.
-					  no 32KHz reference PIT/RTC clock
+		CONFIG_8xx_GCLK_FREQ	- if get_gclk_freq() cannot work
+					  e.g. if there is no 32KHz
+					  reference PIT/RTC clock

- Clock Interface:
+- Linux Kernel Interface:
 		CONFIG_CLOCKS_IN_MHZ

 		U-Boot stores all clock information in Hz
@@ -397,11 +424,16 @@ The following options need to be configured:
 		"clocks_in_mhz" can be defined so that U-Boot
 		converts clock data to MHZ before passing it to the
 		Linux kernel.
-
 		When CONFIG_CLOCKS_IN_MHZ is defined, a definition of
 		"clocks_in_mhz=1" is  automatically  included  in  the
 		default environment.

+		CONFIG_MEMSIZE_IN_BYTES		[relevant for MIPS only]
+
+		When transfering memsize parameter to linux, some versions
+		expect it to be in bytes, others in MB.
+		Define CONFIG_MEMSIZE_IN_BYTES to make it in bytes.
+
 - Console Interface:
 		Depending on board, define exactly one serial port
 		(like CONFIG_8xx_CONS_SMC1, CONFIG_8xx_CONS_SMC2,
@@ -555,13 +587,18 @@ The following options need to be configured:
 		#define enables commands:
 		-------------------------
 		CFG_CMD_ASKENV	* ask for env variable
+		CFG_CMD_AUTOSCRIPT Autoscript Support
 		CFG_CMD_BDI	  bdinfo
 		CFG_CMD_BEDBUG	  Include BedBug Debugger
+		CFG_CMD_BMP     * BMP support
 		CFG_CMD_BOOTD	  bootd
 		CFG_CMD_CACHE	  icache, dcache
 		CFG_CMD_CONSOLE	  coninfo
 		CFG_CMD_DATE	* support for RTC, date/time...
 		CFG_CMD_DHCP	  DHCP support
+		CFG_CMD_DIAG    * Diagnostics
+		CFG_CMD_DOC     * Disk-On-Chip Support
+		CFG_CMD_DTT       Digital Therm and Thermostat
 		CFG_CMD_ECHO	* echo arguments
 		CFG_CMD_EEPROM	* EEPROM read/write support
 		CFG_CMD_ELF	  bootelf, bootvx
@@ -571,27 +608,37 @@ The following options need to be configured:
 		CFG_CMD_FDOS	* Dos diskette Support
 		CFG_CMD_FLASH	  flinfo, erase, protect
 		CFG_CMD_FPGA	  FPGA device initialization support
+		CFG_CMD_HWFLOW  * RTS/CTS hw flow control
 		CFG_CMD_I2C	* I2C serial bus support
 		CFG_CMD_IDE	* IDE harddisk support
 		CFG_CMD_IMI	  iminfo
+		CFG_CMD_IMLS      List all found images
 		CFG_CMD_IMMAP	* IMMR dump support
 		CFG_CMD_IRQ	* irqinfo
+		CFG_CMD_JFFS2   * JFFS2 Support
 		CFG_CMD_KGDB	* kgdb
 		CFG_CMD_LOADB	  loadb
 		CFG_CMD_LOADS	  loads
 		CFG_CMD_MEMORY	  md, mm, nm, mw, cp, cmp, crc, base,
 				  loop, mtest
+		CFG_CMD_MISC      Misc functions like sleep etc
 		CFG_CMD_MMC	  MMC memory mapped support
 		CFG_CMD_MII	  MII utility commands
+		CFG_CMD_NAND    * NAND support
 		CFG_CMD_NET	  bootp, tftpboot, rarpboot
 		CFG_CMD_PCI	* pciinfo
 		CFG_CMD_PCMCIA	* PCMCIA support
+		CFG_CMD_PING    * send ICMP ECHO_REQUEST to network host
+		CFG_CMD_PORTIO    Port I/O
 		CFG_CMD_REGINFO * Register dump
 		CFG_CMD_RUN	  run command in env variable
+		CFG_CMD_SAVES     save S record dump
 		CFG_CMD_SCSI	* SCSI Support
+		CFG_CMD_SDRAM   * print SDRAM configuration information
 		CFG_CMD_SETGETDCR Support for DCR Register access (4xx only)
 		CFG_CMD_SPI	* SPI serial bus support
 		CFG_CMD_USB	* USB support
+		CFG_CMD_VFD     * VFD support (TRAB)
 		CFG_CMD_BSP	* Board SPecific functions
 		-----------------------------------------------
 		CFG_CMD_ALL	all
@@ -627,7 +674,7 @@ The following options need to be configured:
 - Watchdog:
 		CONFIG_WATCHDOG
 		If this variable is defined, it enables watchdog
-		support. There must support in the platform specific
+		support. There must be support in the platform specific
 		code for a watchdog. For the 8xx and 8260 CPUs, the
 		SIU Watchdog feature is enabled in the SYPCR
 		register.
@@ -653,6 +700,9 @@ The following options need to be configured:
 		CONFIG_RTC_DS1338	- use Maxim, Inc. DS1338 RTC
 		CONFIG_RTC_DS164x	- use Dallas DS164x RTC

+		Note that if the RTC uses I2C, then the I2C interface
+		must also be configured. See I2C Support, below.
+
 - Timestamp Support:

 		When CONFIG_TIMESTAMP is selected, the timestamp
@@ -832,7 +882,7 @@ The following options need to be configured:
 		Normally display is black on white background; define
 		CFG_WHITE_ON_BLACK to get it inverted.

- Spash Screen Support: CONFIG_SPLASH_SCREEN
+- Splash Screen Support: CONFIG_SPLASH_SCREEN

 		If this option is set, the environment is checked for
 		a variable "splashimage". If found, the usual display
@@ -843,6 +893,16 @@ The following options need to be configured:
 		allows for a "silent" boot where a splash screen is
 		loaded very quickly after power-on.

+- Compression support:
+		CONFIG_BZIP2
+
+		If this option is set, support for bzip2 compressed
+		images is included. If not, only uncompressed and gzip
+		compressed images are supported.
+
+		NOTE: the bzip2 algorithm requires a lot of RAM, so
+		the malloc area (as defined by CFG_MALLOC_LEN) should
+		be at least 4MB.

 - Ethernet address:
 		CONFIG_ETHADDR
@@ -885,6 +945,29 @@ The following options need to be configured:
 		4th and following
 		BOOTP requests:		delay 0 ... 8 sec

+- DHCP Advanced Options:
+		CONFIG_BOOTP_MASK
+
+		You can fine tune the DHCP functionality by adding
+		these flags to the CONFIG_BOOTP_MASK define:
+
+		CONFIG_BOOTP_DNS2 - If a DHCP client requests the DNS
+		serverip from a DHCP server, it is possible that more
+		than one DNS serverip is offered to the client.
+		If CONFIG_BOOTP_DNS2 is enabled, the secondary DNS
+		serverip will be stored in the additional environment
+		variable "dnsip2". The first DNS serverip is always
+		stored in the variable "dnsip", when CONFIG_BOOTP_DNS
+		is added to the CONFIG_BOOTP_MASK.
+
+		CONFIG_BOOTP_SEND_HOSTNAME - Some DHCP servers are capable
+		to do a dynamic update of a DNS server. To do this, they
+		need the hostname of the DHCP requester.
+		If CONFIG_BOOP_SEND_HOSTNAME is added to the
+		CONFIG_BOOTP_MASK, the content of the "hostname"
+		environment variable is passed as option 12 to
+		the DHCP server.
+
 - Status LED:	CONFIG_STATUS_LED

 		Several configurations allow to display the current
@@ -904,29 +987,48 @@ The following options need to be configured:

 - I2C Support:	CONFIG_HARD_I2C | CONFIG_SOFT_I2C

-		Enables I2C serial bus commands.  If this is selected,
-		either CONFIG_HARD_I2C or CONFIG_SOFT_I2C must be defined
-		to include the appropriate I2C driver.
+		These enable I2C serial bus commands. Defining either of
+		(but not both of) CONFIG_HARD_I2C or CONFIG_SOFT_I2C will
+		include the appropriate I2C driver for the selected cpu.

-		See also: common/cmd_i2c.c for a description of the
+		This will allow you to use i2c commands at the u-boot
+		command line (as long as you set CFG_CMD_I2C in
+		CONFIG_COMMANDS) and communicate with i2c based realtime
+		clock chips. See common/cmd_i2c.c for a description of the
 		command line interface.

+		CONFIG_HARD_I2C	selects the CPM hardware driver for I2C.

-		CONFIG_HARD_I2C
+		CONFIG_SOFT_I2C configures u-boot to use a software (aka
+		bit-banging) driver instead of CPM or similar hardware
+		support for I2C.

-		Selects the CPM hardware driver for I2C.
+		There are several other quantities that must also be
+		defined when you define CONFIG_HARD_I2C or CONFIG_SOFT_I2C.

-		CONFIG_SOFT_I2C
+		In both cases you will need to define CFG_I2C_SPEED
+		to be the frequency (in Hz) at which you wish your i2c bus
+		to run and CFG_I2C_SLAVE to be the address of this node (ie
+		the cpu's i2c node address).

-		Use software (aka bit-banging) driver instead of CPM
-		or similar hardware support for I2C.  This is configured
-		via the following defines.
+		Now, the u-boot i2c code for the mpc8xx (cpu/mpc8xx/i2c.c)
+		sets the cpu up as a master node and so its address should
+		therefore be cleared to 0 (See, eg, MPC823e User's Manual
+		p.16-473). So, set CFG_I2C_SLAVE to 0.
+
+		That's all that's required for CONFIG_HARD_I2C.
+
+		If you use the software i2c interface (CONFIG_SOFT_I2C)
+		then the following macros need to be defined (examples are
+		from include/configs/lwmon.h):

 		I2C_INIT

-		(Optional). Any commands necessary to enable I2C
+		(Optional). Any commands necessary to enable the I2C
 		controller or configure ports.

+		eg: #define I2C_INIT (immr->im_cpm.cp_pbdir |=  PB_SCL)
+
 		I2C_PORT

 		(Only for MPC8260 CPU). The I/O port to use (the code
@@ -939,32 +1041,49 @@ The following options need to be configured:
 		(driven).  If the data line is open collector, this
 		define can be null.

+		eg: #define I2C_ACTIVE (immr->im_cpm.cp_pbdir |=  PB_SDA)
+
 		I2C_TRISTATE

 		The code necessary to make the I2C data line tri-stated
 		(inactive).  If the data line is open collector, this
 		define can be null.

+		eg: #define I2C_TRISTATE (immr->im_cpm.cp_pbdir &= ~PB_SDA)
+
 		I2C_READ

 		Code that returns TRUE if the I2C data line is high,
 		FALSE if it is low.

+		eg: #define I2C_READ ((immr->im_cpm.cp_pbdat & PB_SDA) != 0)
+
 		I2C_SDA(bit)

 		If <bit> is TRUE, sets the I2C data line high. If it
 		is FALSE, it clears it (low).

+		eg: #define I2C_SDA(bit) \
+			if(bit) immr->im_cpm.cp_pbdat |=  PB_SDA; \
+			else    immr->im_cpm.cp_pbdat &= ~PB_SDA
+
 		I2C_SCL(bit)

 		If <bit> is TRUE, sets the I2C clock line high. If it
 		is FALSE, it clears it (low).

+		eg: #define I2C_SCL(bit) \
+			if(bit) immr->im_cpm.cp_pbdat |=  PB_SCL; \
+			else    immr->im_cpm.cp_pbdat &= ~PB_SCL
+
 		I2C_DELAY

 		This delay is invoked four times per clock cycle so this
 		controls the rate of data transfer.  The data rate thus
-		is 1 / (I2C_DELAY * 4).
+		is 1 / (I2C_DELAY * 4). Often defined to be something
+		like:
+
+		#define I2C_DELAY  udelay(2)

 		CFG_I2C_INIT_BOARD

@@ -1114,7 +1233,7 @@ The following options need to be configured:

 		U-Boot considers the values of the environment
 		variables "serial#" (Board Serial Number) and
-		"ethaddr" (Ethernet Address) to bb parameters that
+		"ethaddr" (Ethernet Address) to be parameters that
 		are set once by the board vendor / manufacturer, and
 		protects these variables from casual modification by
 		the user. Once set, these variables are read-only,
@@ -1229,7 +1348,7 @@ The following options need to be configured:

 		Define this to contain any number of null terminated
 		strings (variable = value pairs) that will be part of
-		the default enviroment compiled into the boot image.
+		the default environment compiled into the boot image.

 		For example, place something like this in your
 		board's config file:
@@ -1242,7 +1361,7 @@ The following options need to be configured:
 		internal format how the environment is stored by the
 		U-Boot code. This is NOT an official, exported
 		interface! Although it is unlikely that this format
-		will change soon, but there is no guarantee either.
+		will change soon, there is no guarantee either.
 		You better know what you are doing here.

 		Note: overly (ab)use of the default environment is
@@ -1311,7 +1430,13 @@ The following options need to be configured:
   -1	common/cmd_ide.c	Read Error on boot device
   -1	common/cmd_ide.c	Image header has bad magic number

-   -1	common/cmd_nvedit.c	Environment not changable, but has bad CRC
+   -1	common/cmd_nand.c	Bad usage of "nand" command
+   -1	common/cmd_nand.c	No boot device
+   -1	common/cmd_nand.c	Unknown Chip ID on boot device
+   -1	common/cmd_nand.c	Read Error on boot device
+   -1	common/cmd_nand.c	Image header has bad magic number
+
+   -1	common/env_common.c     Environment has a bad CRC, using default


 Modem Support:
@@ -1393,6 +1518,10 @@ Configuration Settings:
 - CFG_ALT_MEMTEST:
 		Enable an alternate, more extensive memory test.

+- CFG_MEMTEST_SCRATCH:
+		Scratch address used by the alternate memory test
+		You only need to set this if address zero isn't writeable
+
 - CFG_TFTP_LOADADDR:
 		Default load address for network file downloads

@@ -1442,6 +1571,16 @@ Configuration Settings:
 - CFG_FLASH_WRITE_TOUT:
 		Timeout for Flash write operations (in ms)

+- CFG_FLASH_LOCK_TOUT
+		Timeout for Flash set sector lock bit operation (in ms)
+
+- CFG_FLASH_UNLOCK_TOUT
+		Timeout for Flash clear lock bits operation (in ms)
+
+- CFG_FLASH_PROTECTION
+		If defined, hardware flash sectors protection is used
+		instead of U-Boot software protection.
+
 - CFG_DIRECT_FLASH_TFTP:

 		Enable TFTP transfers directly to flash memory;
@@ -1624,6 +1763,14 @@ Note: once the monitor has been relocated, then it will complain if
 the default environment is used; a new CRC is computed as soon as you
 use the "saveenv" command to store a valid environment.

+- CFG_FAULT_ECHO_LINK_DOWN:
+		Echo the inverted Ethernet link state to the fault LED.
+
+		Note: If this option is active, then CFG_FAULT_MII_ADDR
+		      also needs to be defined.
+
+- CFG_FAULT_MII_ADDR:
+		MII address of the PHY to check for the Ethernet link state.

 Low Level (hardware related) configuration options:
 ---------------------------------------------------
@@ -1633,9 +1780,10 @@ Low Level (hardware related) configuration options:

 - CFG_DEFAULT_IMMR:
 		Default address of the IMMR after system reset.
-		Needed on some 8260 systems (MPC8260ADS and RPXsuper)
-		to be able to adjust the position of the IMMR
-		register after a reset.
+
+		Needed on some 8260 systems (MPC8260ADS, PQ2FADS-ZU,
+		and RPXsuper) to be able to adjust the position of
+		the IMMR register after a reset.

 - Floppy Disk Support:
 		CFG_FDC_DRIVE_NUMBER
@@ -1669,7 +1817,7 @@ Low Level (hardware related) configuration options:

 - CFG_INIT_RAM_ADDR:

-		Start address of memory area tha can be used for
+		Start address of memory area that can be used for
 		initial data and stack; please note that this must be
 		writable memory that is working WITHOUT special
 		initialization, i. e. you CANNOT use normal RAM which
@@ -1808,7 +1956,9 @@ configurations; the following names are supported:
    GENIETV_config	  TQM823L_config	PIP405_config
    GEN860T_config	  EBONY_config		FPS860L_config
    ELPT860_config	  cmi_mpc5xx_config	NETVIA_config
-    at91rm9200dk_config
+    at91rm9200dk_config	  omap1510inn_config	MPC8260ADS_config
+    omap1610inn_config	  ZPC1900_config	MPC8540ADS_config
+    MPC8560ADS_config

 Note: for some board special configuration names may exist; check  if
      additional  information is available from the board vendor; for
@@ -1841,7 +1991,7 @@ Note: for some board special configuration names may exist; check  if


 Finally, type "make all", and you should get some working U-Boot
-images ready for downlod to / installation on your system:
+images ready for download to / installation on your system:

 - "u-boot.bin" is a raw binary image
 - "u-boot" is an image in ELF binary format
@@ -1860,7 +2010,7 @@ steps:
 1.  Add a new configuration option for your board to the toplevel
    "Makefile" and to the "MAKEALL" script, using the existing
    entries as examples. Note that here and at many other places
-    boards and other names are listed alphabetically sorted. Please
+    boards and other names are listed in alphabetical sort order. Please
    keep this order.
 2.  Create a new directory to hold your board specific code. Add any
    files you need. In your board directory, you will need at least
@@ -1890,7 +2040,7 @@ cation	did not break existing code. At least make sure that *ALL* of
 the supported boards compile WITHOUT ANY compiler warnings. To do so,
 just run the "MAKEALL" script, which will configure and build U-Boot
 for ALL supported system. Be warned, this will take a while. You  can
-select	which  (cross)	compiler  to use py passing a `CROSS_COMPILE'
+select	which  (cross)	compiler  to use by passing a `CROSS_COMPILE'
 environment variable to the script, i. e. to use the cross tools from
 MontaVista's Hard Hat Linux you can type

@@ -2017,10 +2167,10 @@ Some configuration options can be set using Environment Variables:
 		  does not overwrite the U-Boot stack and data).

 		  For instance, when you have a system with 16 MB
-		  RAM, and want to reseve 4 MB from use by Linux,
+		  RAM, and want to reserve 4 MB from use by Linux,
 		  you can do this by adding "mem=12M" to the value of
 		  the "bootargs" variable. However, now you must make
-		  sure, that the initrd image is placed in the first
+		  sure that the initrd image is placed in the first
 		  12 MB as well - this can be done with

 		  setenv initrd_high 00c00000
@@ -2055,6 +2205,7 @@ depending the information provided by your boot server:

  bootfile	- see above
  dnsip		- IP address of your Domain Name Server
+  dnsip2	- IP address of your secondary Domain Name Server
  gatewayip	- IP address of the Gateway (Router) to use
  hostname	- Target hostname
  ipaddr	- see above
@@ -2088,8 +2239,8 @@ only effect after the next boot (yes, that's just like Windoze :-).
 Command Line Parsing:
 =====================

-There are two different command line parsers available  with  U-Boot:
-the old "simple" one, and the much more pwerful "hush" shell:
+There are two different command line parsers available with U-Boot:
+the old "simple" one, and the much more powerful "hush" shell:

 Old, simple command line parser:
 --------------------------------
@@ -2130,9 +2281,9 @@ General rules:
 Note for Redundant Ethernet Interfaces:
 =======================================

-Some boards come with redundand ethernet interfaces; U-Boot supports
+Some boards come with redundant ethernet interfaces; U-Boot supports
 such configurations and is capable of automatic selection of a
-"working" interface when needed. MAC assignemnt works as follows:
+"working" interface when needed. MAC assignment works as follows:

 Network interfaces are numbered eth0, eth1, eth2, ... Corresponding
 MAC addresses can be stored in the environment as "ethaddr" (=>eth0),
@@ -2172,12 +2323,11 @@ defines the following image properties:
 * Target Operating System (Provisions for OpenBSD, NetBSD, FreeBSD,
  4.4BSD, Linux, SVR4, Esix, Solaris, Irix, SCO, Dell, NCR, VxWorks,
  LynxOS, pSOS, QNX, RTEMS, ARTOS;
-  Currently supported: Linux, NetBSD, VxWorks, QNX, RTEMS, ARTOS).
+  Currently supported: Linux, NetBSD, VxWorks, QNX, RTEMS, ARTOS, LynxOS).
 * Target CPU Architecture (Provisions for Alpha, ARM, Intel x86,
  IA64, MIPS, MIPS, PowerPC, IBM S390, SuperH, Sparc, Sparc 64 Bit;
  Currently supported: PowerPC).
-* Compression Type (Provisions for uncompressed, gzip, bzip2;
-  Currently supported: uncompressed, gzip).
+* Compression Type (uncompressed, gzip, bzip2)
 * Load Address
 * Entry Point
 * Image Name
@@ -2192,21 +2342,21 @@ Linux Support:
 ==============

 Although U-Boot should support any OS or standalone application
-easily, Linux has always been in the focus during the design of
+easily, the main focus has always been on Linux during the design of
 U-Boot.

 U-Boot includes many features that so far have been part of some
 special "boot loader" code within the Linux kernel. Also, any
 "initrd" images to be used are no longer part of one big Linux image;
 instead, kernel and "initrd" are separate images. This implementation
-serves serveral purposes:
+serves several purposes:

 - the same features can be used for other OS or standalone
  applications (for instance: using compressed images to reduce the
  Flash memory footprint)

 - it becomes much easier to port new Linux kernel versions because
-  lots of low-level, hardware dependend stuff are done by U-Boot
+  lots of low-level, hardware dependent stuff are done by U-Boot

 - the same Linux kernel image can now be used with different "initrd"
  images; of course this also means that different kernel images can
@@ -2458,7 +2608,7 @@ parameters. You can check and modify this variable using the
 	...

 If you want to boot a Linux kernel with initial ram disk, you pass
-the memory addreses of both the kernel and the initrd image (PPBCOOT
+the memory addresses of both the kernel and the initrd image (PPBCOOT
 format!) to the "bootm" command:

 	=> imi 40100000 40200000
@@ -2638,7 +2788,7 @@ Hit 'q':
 Minicom warning:
 ================

-Over time, many people have reported problems when trying to used the
+Over time, many people have reported problems when trying to use the
 "minicom" terminal emulation program for serial download. I (wd)
 consider minicom to be broken, and recommend not to use it. Under
 Unix, I recommend to use C-Kermit for general purpose use (and
@@ -2706,7 +2856,7 @@ models provide on-chip memory (like the IMMR area on MPC8xx and
 MPC826x processors), on others (parts of) the data cache can be
 locked as (mis-) used as memory, etc.

-	Chris Hallinan posted a good summy of  these  issues  to  the
+	Chris Hallinan posted a good summary of  these  issues  to  the
 	u-boot-users mailing list:

 	Subject: RE: [U-Boot-Users] RE: More On Memory Bank x (nothingness)?
@@ -2752,9 +2902,9 @@ code for the initialization procedures:

 * Do not use any unitialized global data (or implicitely initialized
  as zero data - BSS segment) at all - this is undefined, initiali-
-  zation is performed later (when relocationg to RAM).
+  zation is performed later (when relocating to RAM).

-* Stack space is very limited. Avoid big data buffers or things  like
+* Stack space is very limited. Avoid big data buffers or things like
  that.

 Having only the stack as writable memory limits means we cannot use
@@ -2767,7 +2917,7 @@ the GCC compiler (Global Register Variables) to share the data: we
 place a pointer (gd) to the global data into a register which we
 reserve for this purpose.

-When chosing a register for such a purpose we are restricted  by  the
+When choosing a register for such a purpose we are restricted by the
 relevant  (E)ABI  specifications for the current architecture, and by
 GCC's implementation.

@@ -2857,7 +3007,7 @@ System Initialization:
 In the reset configuration, U-Boot starts at the reset entry point
 (on most PowerPC systens at address 0x00000100). Because of the reset
 configuration for CS0# this is a mirror of the onboard Flash memory.
-To be able to re-map memory U-Boot then jumps to it's link address.
+To be able to re-map memory U-Boot then jumps to its link address.
 To be able to implement the initialization code in C, a (small!)
 initial stack is set up in the internal Dual Ported RAM (in case CPUs
 which provide such a feature like MPC8xx or MPC8260), or in a locked
@@ -2873,7 +3023,7 @@ simple memory test is run that determines the size of the SDRAM
 banks.

 When there is more than one SDRAM bank, and the banks are of
-different size, the larger is mapped first. For equal size, the first
+different size, the largest is mapped first. For equal size, the first
 bank (CS2#) is mapped first. The first mapping is always for address
 0x00000000, with any additional banks following immediately to create
 contiguous memory starting from 0.
@@ -2999,6 +3149,11 @@ it:
  version of diff does not support these options, then get the latest
  version of GNU diff.

+  The current directory when running this command shall be the top
+  level directory of the U-Boot source tree, or it's parent directory
+  (i. e. please make sure that your patch includes sufficient
+  directory information for the affected files).
+
  We accept patches as plain text, MIME attachments or as uuencoded
  gzipped text.

--- a/board/MAI/AmigaOneG3SE/cmd_boota.c
+++ b/board/MAI/AmigaOneG3SE/cmd_boota.c
@@ -121,8 +121,8 @@ int do_boota (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
 	return 0;
 }
 #if defined(CONFIG_AMIGAONEG3SE) && (CONFIG_COMMANDS & CFG_CMD_BSP)
-cmd_tbl_t U_BOOT_CMD(BOOTA) = MK_CMD_ENTRY(
-	"boota",   3,      1,      do_boota,
+U_BOOT_CMD(
+	boota,   3,      1,      do_boota,
 	"boota   - boot an Amiga kernel\n",
 	"address disk"
 );
--- a/board/MAI/menu/cmd_menu.c
+++ b/board/MAI/menu/cmd_menu.c
@@ -8,8 +8,8 @@ int do_menu( cmd_tbl_t *cmdtp, /*bd_t *bd,*/ int flag, int argc, char *argv[] )
 }

 #if defined(CONFIG_AMIGAONEG3SE) && (CONFIG_COMMANDS & CFG_CMD_BSP)
-cmd_tbl_t U_BOOT_CMD(MENU) = MK_CMD_ENTRY(
-	"menu",   1,      1,      do_menu,
+U_BOOT_CMD(
+	menu,   1,      1,      do_menu,
 	"menu    - display BIOS setup menu\n",
 	""
 );
--- a/board/RRvision/video_ad7179.h
+++ b/board/RRvision/video_ad7179.h
@@ -0,0 +1,68 @@
+/*
+ * (C) Copyright 2003 Wolfgang Grandegger <wg@denx.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#define VIDEO_ENCODER_NAME	"Analog Devices AD7179"
+
+#define VIDEO_ENCODER_I2C_RATE	100000	/* Max rate is 100Khz	*/
+#define VIDEO_ENCODER_CB_Y_CR_Y		/* Use CB Y CR Y format...	*/
+
+#define VIDEO_MODE_YUYV		/* The only mode supported by this encoder	*/
+#undef	VIDEO_MODE_RGB
+#define VIDEO_MODE_BPP		16
+
+#ifdef	VIDEO_MODE_PAL
+#define VIDEO_ACTIVE_COLS	720
+#define VIDEO_ACTIVE_ROWS	576
+#define VIDEO_VISIBLE_COLS	640
+#define VIDEO_VISIBLE_ROWS	480
+#else
+#error "NTSC mode is not supported"
+#endif
+
+static unsigned char video_encoder_data[] = {
+				0x05, /* Mode Register 0 */
+				0x11, /* Mode Register 1 */
+				0x20, /* Mode Register 2 */
+				0x0C, /* Mode Register 3 */
+				0x01, /* Mode Register 4 */
+				0x00, /* Reserved */
+				0x00, /* Reserved */
+				0x04, /* Timing Register 0 */
+				0x00, /* Timing Register 1 */
+				0xCB, /* Subcarrier Frequency Register 0 */
+				0x0A, /* Subcarrier Frequency Register 1 */
+				0x09, /* Subcarrier Frequency Register 2 */
+				0x2A, /* Subcarrier Frequency Register 3 */
+				0x00, /* Subcarrier Phase */
+				0x00, /* Closed Captioning Ext Reg 0 */
+				0x00, /* Closed Captioning Ext Reg 1 */
+				0x00, /* Closed Captioning Reg 0 */
+				0x00, /* Closed Captioning Reg 1 */
+				0x00, /* Pedestal Control Reg 0 */
+				0x00, /* Pedestal Control Reg 1 */
+				0x00, /* Pedestal Control Reg 2 */
+				0x00, /* Pedestal Control Reg 3 */
+				0x00, /* CGMS_WSS Reg 0 */
+				0x00, /* CGMS_WSS Reg 0 */
+				0x00, /* CGMS_WSS Reg 0 */
+				0x00  /* Teletext Req. Control Reg */
+} ;
--- a/board/a3000/a3000.c
+++ b/board/a3000/a3000.c
@@ -2,6 +2,9 @@
 * (C) Copyright 2001
 * Rob Taylor, Flying Pig Systems. robt@flyingpig.com.
 *
+ * Modified during 2003 by
+ * Ken Chou, kchou@ieee.org
+ *
 * See file CREDITS for list of people who contributed to this
 * project.
 *
@@ -86,52 +89,42 @@ Done:
 /*
 * Initialize PCI Devices
 */
-#if 1
 #ifndef CONFIG_PCI_PNP
 static struct pci_config_table pci_a3000_config_table[] = {
-	{ PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
-	  0x0, 0x0, 0x0, /* unknown eth0 divice */
+	/* vendor, device, class */
+	/* bus, dev, func */
+	{ PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_83815, PCI_ANY_ID,
+	  PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,	/* dp83815 eth0 divice */
 	  pci_cfgfunc_config_device, { PCI_ENET0_IOADDR,
 				       PCI_ENET0_MEMADDR,
 				       PCI_COMMAND_IO |
 				       PCI_COMMAND_MEMORY |
 				       PCI_COMMAND_MASTER }},
 	{ PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
-	  0x0, 0x0, 0x0, /* unknown eth1 device */
+	  PCI_ANY_ID, 0x14, PCI_ANY_ID,		/* PCI slot1 */
 	  pci_cfgfunc_config_device, { PCI_ENET1_IOADDR,
 				       PCI_ENET1_MEMADDR,
 				       PCI_COMMAND_IO |
 				       PCI_COMMAND_MEMORY |
 				       PCI_COMMAND_MASTER }},
 	{ PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
-	  0x0, 0x0, 0x0, /* unknown eth1 device */
+	  PCI_ANY_ID, 0x15, PCI_ANY_ID, 	/* PCI slot2 */
 	  pci_cfgfunc_config_device, { PCI_ENET2_IOADDR,
 				       PCI_ENET2_MEMADDR,
 				       PCI_COMMAND_IO |
 				       PCI_COMMAND_MEMORY |
 				       PCI_COMMAND_MASTER }},
+	{ PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
+	  PCI_ANY_ID, 0x16, PCI_ANY_ID,		/* PCI slot3 */
+	  pci_cfgfunc_config_device, { PCI_ENET3_IOADDR,
+				       PCI_ENET3_MEMADDR,
+				       PCI_COMMAND_IO |
+				       PCI_COMMAND_MEMORY |
+				       PCI_COMMAND_MASTER }},
 	{ }
 };
 #endif

-#else
-
-#ifndef CONFIG_PCI_PNP
-static struct pci_config_table pci_a3000_config_table[] = {
-	{ PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 0x0f, PCI_ANY_ID,
-	  pci_cfgfunc_config_device, { PCI_ENET0_IOADDR,
-				       PCI_ENET0_MEMADDR,
-				       PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER }},
-	{ PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 0x10, PCI_ANY_ID,
-	  pci_cfgfunc_config_device, { PCI_ENET1_IOADDR,
-				       PCI_ENET1_MEMADDR,
-				       PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER }},
-	{ }
-};
-#endif
-
-#endif
-
 struct pci_controller hose = {
 #ifndef CONFIG_PCI_PNP
 	config_table: pci_a3000_config_table,
--- a/board/adderII/Makefile
+++ b/board/adderII/Makefile
@@ -0,0 +1,40 @@
+#
+# (C) Copyright 2000-2003
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB	= lib$(BOARD).a
+
+OBJS	= $(BOARD).o flash.o
+
+$(LIB):	.depend $(OBJS)
+	$(AR) crv $@ $(OBJS)
+
+#########################################################################
+
+.depend:	Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
+		$(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
+
+sinclude .depend
+
+#########################################################################
--- a/board/adderII/adderII.c
+++ b/board/adderII/adderII.c
@@ -0,0 +1,189 @@
+/*
+ * (C) Copyright 2000-2003
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <config.h>
+#include <mpc8xx.h>
+
+/*
+ * Check Board Identity:
+ */
+
+int checkboard( void )
+{
+	puts("Board: ");
+	puts("AdderII(MPC852T)\n" );
+
+  	return 0;
+}
+
+#if defined( CONFIG_SDRAM_50MHZ )
+
+/******************************************************************************
+** for chip Samsung K4S643232F - T70
+** this table is for 32-50MHz operation
+*******************************************************************************/
+
+#define SDRAM_MPTPRVALUE 	0x0200
+
+#define SDRAM_MAMRVALUE0 	0x00802114   /* refresh at 32MHz */
+#define SDRAM_MAMRVALUE1 	0x00802118
+
+#define SDRAM_OR1VALUE   	0xff800e00
+#define SDRAM_BR1VALUE   	0x00000081
+
+#define SDRAM_MARVALUE		94
+
+#define SDRAM_MCRVALUE0  	0x80808105
+#define SDRAM_MCRVALUE1  	0x80808130
+
+const uint sdram_table[] = {
+
+	/* single read   (offset 0x00 in upm ram) */
+       	0x1f07fc24, 0xe0aefc04, 0x10adfc04, 0xe0bbbc00,
+       	0x10f77c44, 0xf3fffc07, 0xfffffc04, 0xfffffc04,
+
+	/* burst read    (offset 0x08 in upm ram) */
+       	0x1f07fc24, 0xe0aefc04, 0x10adfc04, 0xf0affc00,
+       	0xf0affc00, 0xf0affc00, 0xf0affc00, 0x10a77c44,
+       	0xf7bffc47, 0xfffffc35, 0xfffffc34, 0xfffffc35,
+       	0xfffffc35, 0x1ff77c35, 0xfffffc34, 0x1fb57c35,
+
+	/* single write  (offset 0x18 in upm ram) */
+       	0x1f27fc24, 0xe0aebc04, 0x00b93c00, 0x13f77c47,
+       	0xfffdfc04, 0xfffffc04, 0xfffffc04, 0xfffffc04,
+
+	/* burst write   (offset 0x20 in upm ram) */
+       	0x1f07fc24, 0xeeaebc00, 0x10ad7c00, 0xf0affc00,
+       	0xf0affc00, 0xe0abbc00, 0x1fb77c47, 0xfffffc04,
+       	0xfffffc04, 0xfffffc04, 0xfffffc04, 0xfffffc04,
+       	0xfffffc04, 0xfffffc04, 0xfffffc04, 0xfffffc04,
+
+	/* refresh       (offset 0x30 in upm ram) */
+       	0x1ff5fca4, 0xfffffc04, 0xfffffc04, 0xfffffc04,
+       	0xfffffc84, 0xfffffc07, 0xfffffc04, 0xfffffc04,
+       	0xfffffc04, 0xfffffc04, 0xfffffc04, 0xfffffc04,
+
+	/* exception     (offset 0x3C in upm ram) */
+       	0xfffffc27, 0xfffffc04, 0xfffffc04, 0xfffffc04,
+};
+
+#else
+#error SDRAM not correctly configured
+#endif
+
+int _initsdram (uint base, uint noMbytes)
+{
+	volatile immap_t *immap = (immap_t *) CFG_IMMR;
+	volatile memctl8xx_t *memctl = &immap->im_memctl;
+
+	if (noMbytes != 8) {
+		return -1;
+	}
+
+	upmconfig (UPMA, (uint *) sdram_table,
+		   sizeof (sdram_table) / sizeof (uint));
+
+	memctl->memc_mptpr = SDRAM_MPTPRVALUE;
+
+	/* Configure the refresh (mostly).  This needs to be
+	 * based upon processor clock speed and optimized to provide
+	 * the highest level of performance.  For multiple banks,
+	 * this time has to be divided by the number of banks.
+	 * Although it is not clear anywhere, it appears the
+	 * refresh steps through the chip selects for this UPM
+	 * on each refresh cycle.
+	 * We have to be careful changing
+	 * UPM registers after we ask it to run these commands.
+	 */
+
+	memctl->memc_mamr = (SDRAM_MAMRVALUE0 | (SDRAM_MARVALUE << 24));
+	memctl->memc_mar = 0x0;
+	udelay (200);
+
+	/* Now run the precharge/nop/mrs commands.
+	 */
+	memctl->memc_mcr = 0x80002115;
+	udelay (200);
+
+	/* Run 8 refresh cycles */
+	memctl->memc_mcr = 0x80002380;
+	udelay (200);
+
+	memctl->memc_mar = 0x88;
+	udelay (200);
+
+	memctl->memc_mcr = 0x80002116;
+	udelay (200);
+
+	memctl->memc_or1 = SDRAM_OR1VALUE;
+	memctl->memc_br1 = SDRAM_BR1VALUE | base;
+
+	return 0;
+}
+
+void _sdramdisable( void )
+{
+	volatile immap_t     *immap = (immap_t *)CFG_IMMR;
+	volatile memctl8xx_t *memctl = &immap->im_memctl;
+
+	memctl->memc_br1 = 0x00000000;
+
+	/* maybe we should turn off upma here or something */
+}
+
+int initsdram (uint base, uint * noMbytes)
+{
+	uint m = 8;
+
+	*noMbytes = m;
+
+	if (!_initsdram (base, m)) {
+		return 0;
+	} else {
+		_sdramdisable ();
+		return -1;
+	}
+}
+
+long int initdram (int board_type)
+{
+	/* AdderII: has 8MB SDRAM */
+	uint sdramsz;
+	uint m = 0;
+
+	if (!initsdram (0x00000000, &sdramsz)) {
+		m += sdramsz;
+	} else {
+		return -1;
+	}
+	return (m << 20);
+}
+
+int testdram (void)
+{
+	/* TODO: XXX XXX XXX not an actual SDRAM test */
+	printf ("Test: 8MB SDRAM\n");
+
+	return (0);
+}
--- a/board/adderII/adderII.h
+++ b/board/adderII/adderII.h
@@ -0,0 +1,43 @@
+/*
+ * (C) Copyright 2000
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/****************************************************************************
+ * FLASH Memory Map as used by FADS Monitor:
+ *
+ *                          Start Address    Length
+ * +-----------------------+ 0xFE00_0000     Start of Flash -----------------
+ * | MON8xx code           | 0xFE00_0100     Reset Vector
+ * +-----------------------+ 0xFE0?_????
+ * | (unused)              |
+ * +-----------------------+
+ * | 			   |
+ * +-----------------------+
+ * | 			   |
+ * +-----------------------+
+ * | 			   |
+ * +-----------------------+
+ * | 			   |
+ * +=======================+
+ * | 			   |
+ * | ...                   |
+ *****************************************************************************/
--- a/board/adderII/config.mk
+++ b/board/adderII/config.mk
@@ -0,0 +1,28 @@
+#
+# (C) Copyright 2000
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+#
+# AdderII board ( Analogue-Micro )
+#
+
+TEXT_BASE = 0xFE000000
--- a/board/adderII/flash.c
+++ b/board/adderII/flash.c
@@ -0,0 +1,501 @@
+/*
+ * (C) Copyright 2000-2003
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+/******************************************************************************
+** Notes: AM29LV320DB - 90EI ( 32 Mbit device )
+** Sectors - Eight 8 Kb sector
+** 	   - Sixty three 64 Kb sector
+** Bottom boot sector
+******************************************************************************/
+#include <common.h>
+#include <mpc8xx.h>
+
+
+/******************************************************************************
+**	Defines
+******************************************************************************/
+#ifdef CONFIG_ADDERII
+
+#define ADDR0	0x0555
+#define ADDR1	0x02AA
+#define FLASH_WORD_SIZE unsigned short
+
+#endif
+
+#if defined( CFG_ENV_IS_IN_FLASH )
+# ifndef  CFG_ENV_ADDR
+#  define CFG_ENV_ADDR  ( CFG_FLASH_BASE + CFG_ENV_OFFSET )
+# endif
+# ifndef  CFG_ENV_SIZE
+#  define CFG_ENV_SIZE  CFG_ENV_SECT_SIZE
+# endif
+# ifndef  CFG_ENV_SECT_SIZE
+#  define CFG_ENV_SECT_SIZE  CFG_ENV_SIZE
+# endif
+#endif
+
+/******************************************************************************
+**	Global Parameters
+******************************************************************************/
+flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
+
+/******************************************************************************
+**	Function Prototypes
+******************************************************************************/
+static ulong flash_get_size( vu_long *addr, flash_info_t *info );
+
+static int write_word( flash_info_t *info, ulong dest, ulong data );
+
+static void flash_get_offsets( ulong base, flash_info_t *info );
+
+int wait_for_DQ7( flash_info_t *info, int sect );
+
+/******************************************************************************
+** Function :	flash_init
+** Param    :   void
+** Notes    :   Initializes the Flash Chip
+******************************************************************************/
+ulong flash_init (void)
+{
+	ulong size_b0 = -1;
+	int i;
+	volatile immap_t *immap = (immap_t *) CFG_IMMR;
+	volatile memctl8xx_t *memctl = &immap->im_memctl;
+
+	/* Set Flash to unknown */
+	for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) {
+		flash_info[i].flash_id = FLASH_UNKNOWN;
+	}
+
+	/* Get the Flash Bank Size */
+
+	size_b0 = flash_get_size ((vu_long *) (CFG_FLASH_BASE),
+				  &flash_info[0]);
+
+	if (flash_info[0].flash_id == FLASH_UNKNOWN) {
+		printf ("## UNKNOWN Flash on Bank 0 - Size = 0x%08lx = %ldMB\n",
+			size_b0, size_b0 >> 20);
+	}
+
+	/* Remap Flash according to size detected  */
+	memctl->memc_or0 = 0xFF800774;
+	memctl->memc_br0 = CFG_BR0_PRELIM;
+
+	/* Setup Flash Sector Offsets */
+
+	flash_get_offsets (CFG_FLASH_BASE, &flash_info[0]);
+
+	/* Monitor Protection ON - default */
+
+#if ( CFG_MONITOR_BASE >= CFG_FLASH_BASE  )
+	flash_protect (FLAG_PROTECT_SET, CFG_MONITOR_BASE,
+		       (CFG_MONITOR_BASE + monitor_flash_len - 1),
+		       &flash_info[0]);
+#endif
+
+	/* Protect Environment Variables */
+#ifdef CFG_ENV_IS_IN_FLASH
+	flash_protect (FLAG_PROTECT_SET, CFG_ENV_ADDR,
+		       (CFG_ENV_ADDR + CFG_ENV_SIZE - 1), &flash_info[0]);
+#endif
+
+	return size_b0;
+}
+
+/******************************************************************************
+** Function : flash_get_offsets
+** Param    : ulong base, flash_into_t *info
+** Notes    :
+******************************************************************************/
+static void flash_get_offsets (ulong base, flash_info_t * info)
+{
+	return;
+}
+
+
+/******************************************************************************
+** Function : flash_print_info
+** Param    : flash_info_t
+** Notes    :
+******************************************************************************/
+void flash_print_info (flash_info_t * info)
+{
+	int i;
+
+	if (info->flash_id == FLASH_UNKNOWN) {
+		printf ("Missing or unknown flash type\n");
+		return;
+	}
+
+	switch (info->flash_id & FLASH_VENDMASK) {
+	case FLASH_MAN_AMD:
+		printf ("AMD ");
+		break;
+	case FLASH_MAN_FUJ:
+		printf ("FUJITSU ");
+		break;
+	case FLASH_MAN_BM:
+		printf ("BRIGHT MICRO ");
+		break;
+	default:
+		printf ("Unknown Vendor ");
+		break;
+	}
+
+	switch (info->flash_id & FLASH_TYPEMASK) {
+	case FLASH_AM320B:
+		printf ("AM29LV320B (32 Mbit, bottom boot sect)\n");
+		break;
+	case FLASH_AM320T:
+		printf ("AM29LV320T (32 Mbit, top boot sector)\n");
+		break;
+	default:
+		printf ("Unknown Chip Type\n");
+		break;
+
+	}
+
+	printf ("  Size: %ld MB in %d Sectors\n", info->size >> 20,
+		info->sector_count);
+	printf ("  Sector Start Addresses:");
+
+	for (i = 0; i < info->sector_count; ++i) {
+		if ((i % 5) == 0) {
+			printf ("\n   ");
+		}
+		printf (" %08lX%s",
+			info->start[i],
+			info->protect[i] ? " (RO)" : "     ");
+	}
+	printf ("\n");
+	return;
+}
+
+/******************************************************************************
+** Function : flash_get_size
+** Param    : vu_long *addr, flash_info_t *info
+** Notes    :
+******************************************************************************/
+static ulong flash_get_size (vu_long * addr, flash_info_t * info)
+{
+	short i;
+	FLASH_WORD_SIZE manu_id, dev_id;
+	ulong base = (ulong) addr;
+	volatile FLASH_WORD_SIZE *addr2 = (FLASH_WORD_SIZE *) addr;
+
+	/* Write Auto Select Command and read Manufacturer's ID and Dev ID */
+
+	addr2[ADDR0] = (FLASH_WORD_SIZE) 0xAAAAAAAA;
+	addr2[ADDR1] = (FLASH_WORD_SIZE) 0x55555555;
+	addr2[ADDR0] = (FLASH_WORD_SIZE) 0x90909090;
+
+	manu_id = addr2[0];
+
+	switch (manu_id) {
+	case (FLASH_WORD_SIZE) AMD_MANUFACT:
+		info->flash_id = FLASH_MAN_AMD;
+		break;
+
+	default:
+		info->flash_id = FLASH_UNKNOWN;
+		info->sector_count = 0;
+		info->size = 0;
+		break;
+	}
+
+	/* Read Device Id */
+	dev_id = addr2[1];
+
+	switch (dev_id) {
+	case (FLASH_WORD_SIZE) AMD_ID_LV320B:
+		info->flash_id += FLASH_AM320B;
+		info->sector_count = 71;	/* 8 - boot sec + 63 normal */
+		info->size = 0x400000;	/* 4MByte */
+		break;
+
+	default:
+		info->flash_id = FLASH_UNKNOWN;
+		break;
+	}
+
+	/* Set up sector start Addresses */
+
+	if (info->flash_id & FLASH_BTYPE) {
+		/* set sector offsets for bottom boot block
+		 ** Eight 8 Kb Boot sectors
+		 ** Sixty Three 64Kb sectors
+		 */
+		for (i = 0; i < 8; i++) {
+			info->start[i] = base + (i * 0x00002000);
+		}
+		for (i = 8; i < info->sector_count; i++) {
+			info->start[i] = base + (i * 0x00010000) - 0x00070000;
+		}
+	}
+
+	/* Reset To read mode */
+
+	if (info->flash_id != FLASH_UNKNOWN) {
+		addr = (ulong *) info->start[0];
+		*addr = 0xF0F0F0F0;
+	}
+	return (info->size);
+}
+
+/*******************************************************************************
+** Function : flash_erase
+** Param    : flash_info_t *info, int s_first, int s_last
+** Notes    :
+******************************************************************************/
+int flash_erase (flash_info_t * info, int s_first, int s_last)
+{
+	volatile FLASH_WORD_SIZE *addr = (FLASH_WORD_SIZE *) (info->start[0]);
+	volatile FLASH_WORD_SIZE *addr2;
+	int flag, prot, sect, l_sect;
+	int i;
+
+	if ((s_first < 0) || (s_first > s_last)) {
+		if (info->flash_id == FLASH_UNKNOWN) {
+			printf ("- missing\n");
+		} else {
+			printf ("- no sectors to erase\n");
+		}
+		return 1;
+	}
+
+	if (info->flash_id == FLASH_UNKNOWN) {
+		printf ("Can't erase unknown flash type - aborted\n");
+		return 1;
+	}
+
+	prot = 0;
+	for (sect = s_first; sect <= s_last; ++sect) {
+		if (info->protect[sect]) {
+			prot++;
+		}
+	}
+
+	if (prot) {
+		printf ("Warning: %d protected sectors will not be erased!\n",
+			prot);
+	} else {
+		printf ("\n");
+	}
+
+	l_sect = -1;
+
+	/* Disable interrupts which might cause a timeout here */
+	flag = disable_interrupts ();
+
+	/* Start erase on unprotected sectors */
+	for (sect = s_first; sect <= s_last; sect++) {
+
+		if (info->protect[sect] == 0) {	/* not protected */
+			addr2 = (FLASH_WORD_SIZE *) (info->start[sect]);
+
+			if ((info->flash_id & FLASH_VENDMASK) ==
+			    FLASH_MAN_SST) {
+				addr[ADDR0] = (FLASH_WORD_SIZE) 0x00AA00AA;
+				addr[ADDR1] = (FLASH_WORD_SIZE) 0x00550055;
+				addr[ADDR0] = (FLASH_WORD_SIZE) 0x00800080;
+				addr[ADDR0] = (FLASH_WORD_SIZE) 0x00AA00AA;
+				addr[ADDR1] = (FLASH_WORD_SIZE) 0x00550055;
+				addr2[0] = (FLASH_WORD_SIZE) 0x00500050;	/* block erase */
+				for (i = 0; i < 50; i++)
+					udelay (1000);	/* wait 1 ms */
+			} else {
+				addr[ADDR0] = (FLASH_WORD_SIZE) 0x00AA00AA;
+				addr[ADDR1] = (FLASH_WORD_SIZE) 0x00550055;
+				addr[ADDR0] = (FLASH_WORD_SIZE) 0x00800080;
+				addr[ADDR0] = (FLASH_WORD_SIZE) 0x00AA00AA;
+				addr[ADDR1] = (FLASH_WORD_SIZE) 0x00550055;
+				addr2[0] = (FLASH_WORD_SIZE) 0x00300030;	/* sector erase */
+			}
+			l_sect = sect;
+			/*
+			 * Wait for each sector to complete, it's more
+			 * reliable.  According to AMD Spec, you must
+			 * issue all erase commands within a specified
+			 * timeout.  This has been seen to fail, especially
+			 * if printf()s are included (for debug)!!
+			 */
+			wait_for_DQ7 (info, sect);
+		}
+	}
+	/* re-enable interrupts if necessary */
+	if (flag)
+		enable_interrupts ();
+
+	/* wait at least 80us - let's wait 1 ms */
+	udelay (1000);
+
+	/* reset to read mode */
+	addr = (FLASH_WORD_SIZE *) info->start[0];
+	addr[0] = (FLASH_WORD_SIZE) 0x00F000F0;	/* reset bank */
+
+	printf (" done\n");
+	return 0;
+}
+
+int wait_for_DQ7 (flash_info_t * info, int sect)
+{
+	ulong start, now, last;
+	volatile FLASH_WORD_SIZE *addr =
+		(FLASH_WORD_SIZE *) (info->start[sect]);
+
+	start = get_timer (0);
+	last = start;
+	while ((addr[0] & (FLASH_WORD_SIZE) 0x00800080) !=
+	       (FLASH_WORD_SIZE) 0x00800080) {
+		if ((now = get_timer (start)) > CFG_FLASH_ERASE_TOUT) {
+			printf ("Timeout\n");
+			return -1;
+		}
+		/* show that we're waiting */
+		if ((now - last) > 1000) {
+			putc ('.');
+			last = now;
+		}
+	}
+	return 0;
+}
+
+
+/******************************************************************************
+** Function : write_buff
+** Param    : flash_info_t *info, uchar *src, ulong addr, ulong cnt
+** Notes    :
+******************************************************************************/
+int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
+{
+	ulong cp, wp, data;
+	int i, l, rc;
+
+	/* get lower word aligned address */
+	wp = (addr & ~3);
+
+	/*
+	 * handle unaligned start bytes
+	 */
+	if ((l = addr - wp) != 0) {
+		data = 0;
+		for (i = 0, cp = wp; i < l; ++i, ++cp) {
+			data = (data << 8) | (*(uchar *) cp);
+		}
+		for (; i < 4 && cnt > 0; ++i) {
+			data = (data << 8) | *src++;
+			--cnt;
+			++cp;
+		}
+		for (; cnt == 0 && i < 4; ++i, ++cp) {
+			data = (data << 8) | (*(uchar *) cp);
+		}
+
+		if ((rc = write_word (info, wp, data)) != 0) {
+			return (rc);
+		}
+		wp += 4;
+	}
+
+	/*
+	 * handle word aligned part
+	 */
+	while (cnt >= 4) {
+		data = 0;
+		for (i = 0; i < 4; ++i) {
+			data = (data << 8) | *src++;
+		}
+		if ((rc = write_word (info, wp, data)) != 0) {
+			return (rc);
+		}
+		wp += 4;
+		cnt -= 4;
+	}
+
+	if (cnt == 0) {
+		return (0);
+	}
+
+	/*
+	 * handle unaligned tail bytes
+	 */
+	data = 0;
+	for (i = 0, cp = wp; i < 4 && cnt > 0; ++i, ++cp) {
+		data = (data << 8) | *src++;
+		--cnt;
+	}
+	for (; i < 4; ++i, ++cp) {
+		data = (data << 8) | (*(uchar *) cp);
+	}
+
+	return (write_word (info, wp, data));
+}
+
+
+/******************************************************************************
+** Function : write_word
+** Param    : flash_info_t *info, ulong dest, ulong data
+** Notes    :
+******************************************************************************/
+static int write_word (flash_info_t * info, ulong dest, ulong data)
+{
+	volatile FLASH_WORD_SIZE *addr2 =
+		(FLASH_WORD_SIZE *) (info->start[0]);
+	volatile FLASH_WORD_SIZE *dest2 = (FLASH_WORD_SIZE *) dest;
+	volatile FLASH_WORD_SIZE *data2 = (FLASH_WORD_SIZE *) & data;
+	ulong start;
+	int i;
+
+	/* Check if Flash is (sufficiently) erased */
+	if ((*((volatile FLASH_WORD_SIZE *) dest) &
+	     (FLASH_WORD_SIZE) data) != (FLASH_WORD_SIZE) data) {
+		return (2);
+	}
+
+	for (i = 0; i < 4 / sizeof (FLASH_WORD_SIZE); i++) {
+		int flag;
+
+		/* Disable interrupts which might cause a timeout here */
+		flag = disable_interrupts ();
+
+		addr2[ADDR0] = (FLASH_WORD_SIZE) 0x00AA00AA;
+		addr2[ADDR1] = (FLASH_WORD_SIZE) 0x00550055;
+		addr2[ADDR0] = (FLASH_WORD_SIZE) 0x00A000A0;
+
+		dest2[i] = data2[i];
+
+		/* re-enable interrupts if necessary */
+		if (flag)
+			enable_interrupts ();
+
+		/* data polling for D7 */
+		start = get_timer (0);
+		while ((dest2[i] & (FLASH_WORD_SIZE) 0x00800080) !=
+		       (data2[i] & (FLASH_WORD_SIZE) 0x00800080)) {
+			if (get_timer (start) > CFG_FLASH_WRITE_TOUT) {
+				return (1);
+			}
+		}
+	}
+
+	return (0);
+}
--- a/board/adderII/u-boot.lds
+++ b/board/adderII/u-boot.lds
@@ -0,0 +1,146 @@
+/*
+ * (C) Copyright 2000
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_ARCH(powerpc)
+SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
+/* Do we need any of these for elf?
+   __DYNAMIC = 0;    */
+SECTIONS
+{
+  /* Read-only sections, merged into text segment: */
+  . = + SIZEOF_HEADERS;
+  .interp : { *(.interp) }
+  .hash          : { *(.hash)		}
+  .dynsym        : { *(.dynsym)		}
+  .dynstr        : { *(.dynstr)		}
+  .rel.text      : { *(.rel.text)		}
+  .rela.text     : { *(.rela.text) 	}
+  .rel.data      : { *(.rel.data)		}
+  .rela.data     : { *(.rela.data) 	}
+  .rel.rodata    : { *(.rel.rodata) 	}
+  .rela.rodata   : { *(.rela.rodata) 	}
+  .rel.got       : { *(.rel.got)		}
+  .rela.got      : { *(.rela.got)		}
+  .rel.ctors     : { *(.rel.ctors)	}
+  .rela.ctors    : { *(.rela.ctors)	}
+  .rel.dtors     : { *(.rel.dtors)	}
+  .rela.dtors    : { *(.rela.dtors)	}
+  .rel.bss       : { *(.rel.bss)		}
+  .rela.bss      : { *(.rela.bss)		}
+  .rel.plt       : { *(.rel.plt)		}
+  .rela.plt      : { *(.rela.plt)		}
+  .init          : { *(.init)	}
+  .plt : { *(.plt) }
+  .text      :
+  {
+    /* WARNING - the following is hand-optimized to fit within	*/
+    /* the sector layout of our flash chips!	XXX FIXME XXX	*/
+
+    cpu/mpc8xx/start.o	(.text)
+/*
+    cpu/mpc8xx/start.o	(.text)
+    common/dlmalloc.o	(.text)
+    lib_ppc/ppcstring.o	(.text)
+    lib_generic/vsprintf.o	(.text)
+    lib_generic/crc32.o		(.text)
+    lib_generic/zlib.o		(.text)
+
+    . = env_offset;
+    common/environment.o(.text)
+*/
+
+    *(.text)
+    *(.fixup)
+    *(.got1)
+  }
+  _etext = .;
+  PROVIDE (etext = .);
+  .rodata    :
+  {
+    *(.rodata)
+    *(.rodata1)
+    *(.rodata.str1.4)
+  }
+  .fini      : { *(.fini)    } =0
+  .ctors     : { *(.ctors)   }
+  .dtors     : { *(.dtors)   }
+
+  /* Read-write section, merged into data segment: */
+  . = (. + 0x0FFF) & 0xFFFFF000;
+  _erotext = .;
+  PROVIDE (erotext = .);
+  .reloc   :
+  {
+    *(.got)
+    _GOT2_TABLE_ = .;
+    *(.got2)
+    _FIXUP_TABLE_ = .;
+    *(.fixup)
+  }
+  __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
+  __fixup_entries = (. - _FIXUP_TABLE_)>>2;
+
+  .data    :
+  {
+    *(.data)
+    *(.data1)
+    *(.sdata)
+    *(.sdata2)
+    *(.dynamic)
+    CONSTRUCTORS
+  }
+  _edata  =  .;
+  PROVIDE (edata = .);
+
+  __u_boot_cmd_start = .;
+  .u_boot_cmd : { *(.u_boot_cmd) }
+  __u_boot_cmd_end = .;
+
+
+  __start___ex_table = .;
+  __ex_table : { *(__ex_table) }
+  __stop___ex_table = .;
+
+  . = ALIGN(256);
+  __init_begin = .;
+  .text.init : { *(.text.init) }
+  .data.init : { *(.data.init) }
+  . = ALIGN(256);
+  __init_end = .;
+
+  __bss_start = .;
+  .bss       :
+  {
+   *(.sbss) *(.scommon)
+   *(.dynbss)
+   *(.bss)
+   *(COMMON)
+  }
+  . = ALIGN(256 * 1024);
+  .ppcenv	:
+  {
+    common/environment.o (.ppcenv)
+  }
+  _end = . ;
+  PROVIDE (end = .);
+}
--- a/board/at91rm9200dk/at91rm9200dk.c
+++ b/board/at91rm9200dk/at91rm9200dk.c
@@ -66,7 +66,7 @@ int dram_init (void)
 * The NAND lives in the CS2* space
 */
 #if (CONFIG_COMMANDS & CFG_CMD_NAND)
-extern void nand_probe (ulong physadr);
+extern ulong nand_probe (ulong physadr);

 #define AT91_SMARTMEDIA_BASE 0x40000000	/* physical address to access memory on NCS3 */
 void nand_init (void)
@@ -103,10 +103,12 @@ void nand_init (void)
 	*AT91C_PIOB_ODR = AT91C_PIO_PB1;	/* disable output */

 	if (*AT91C_PIOB_PDSR & AT91C_PIO_PB1)
-		printf ("No ");
-	printf ("SmartMedia card inserted\n");
+		printf ("  No SmartMedia card inserted\n");
+#ifdef DEBUG
+	printf ("  SmartMedia card inserted\n");

 	printf ("Probing at 0x%.8x\n", AT91_SMARTMEDIA_BASE);
-	nand_probe (AT91_SMARTMEDIA_BASE);
+#endif
+	printf ("%4lu MB\n", nand_probe(AT91_SMARTMEDIA_BASE) >> 20);
 }
 #endif
--- a/board/at91rm9200dk/flash.c
+++ b/board/at91rm9200dk/flash.c
@@ -160,7 +160,7 @@ ulong flash_init (void)
 		if (i == 0)
 			flashbase = PHYS_FLASH_1;
 		else
-			panic ("configured to many flash banks!\n");
+			panic ("configured too many flash banks!\n");

 		sector = 0;
 		start_address = flashbase;
--- a/board/bmw/bmw.c
+++ b/board/bmw/bmw.c
@@ -27,7 +27,6 @@
 #include <command.h>
 #include <malloc.h>
 #include <devices.h>
-#include <syscall.h>
 #include <net.h>
 #include <version.h>
 #include <dtt.h>
--- a/board/cradle/flash.c
+++ b/board/cradle/flash.c
@@ -59,7 +59,7 @@ ulong flash_init(void)
 		flashbase = PHYS_FLASH_2;
 		break;
 	 default:
-		panic("configured to many flash banks!\n");
+		panic("configured too many flash banks!\n");
 		break;
      }
      for (j = 0; j < flash_info[i].sector_count; j++)
--- a/board/csb226/flash.c
+++ b/board/csb226/flash.c
@@ -62,7 +62,7 @@ ulong flash_init(void)
 				flashbase = PHYS_FLASH_1;
 				break;
 			default:
-				panic("configured to many flash banks!\n");
+				panic("configured too many flash banks!\n");
 				break;
 		}
 		for (j = 0; j < flash_info[i].sector_count; j++) {
--- a/board/dave/PPChameleonEVB/Makefile
+++ b/board/dave/PPChameleonEVB/Makefile
@@ -0,0 +1,46 @@
+#
+# (C) Copyright 2000
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB	= lib$(BOARD).a
+
+OBJS	= $(BOARD).o flash.o
+
+$(LIB):	$(OBJS) $(SOBJS)
+	$(AR) crv $@ $^
+
+clean:
+	rm -f $(SOBJS) $(OBJS)
+
+distclean:	clean
+	rm -f $(LIB) core *.bak .depend
+
+#########################################################################
+
+.depend:	Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
+		$(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
+
+sinclude .depend
+
+#########################################################################
--- a/board/dave/PPChameleonEVB/PPChameleonEVB.c
+++ b/board/dave/PPChameleonEVB/PPChameleonEVB.c
@@ -0,0 +1,277 @@
+/*
+ * (C) Copyright 2001-2003
+ * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/processor.h>
+#include <command.h>
+#include <malloc.h>
+
+/* ------------------------------------------------------------------------- */
+
+#if 0
+#define FPGA_DEBUG
+#endif
+
+/* fpga configuration data - gzip compressed and generated by bin2c */
+const unsigned char fpgadata[] =
+{
+#include "fpgadata.c"
+};
+
+/*
+ * include common fpga code (for esd boards)
+ */
+#include "../common/fpga.c"
+
+
+/* Prototypes */
+int gunzip(void *, int, unsigned char *, int *);
+
+
+int board_pre_init (void)
+{
+	out32(GPIO0_OR, CFG_NAND0_CE);                 /* set initial outputs     */
+	out32(GPIO0_OR, CFG_NAND1_CE);                 /* set initial outputs     */
+
+	/*
+	 * IRQ 0-15  405GP internally generated; active high; level sensitive
+	 * IRQ 16    405GP internally generated; active low; level sensitive
+	 * IRQ 17-24 RESERVED
+	 * IRQ 25 (EXT IRQ 0) CAN0; active low; level sensitive
+	 * IRQ 26 (EXT IRQ 1) SER0 ; active low; level sensitive
+	 * IRQ 27 (EXT IRQ 2) SER1; active low; level sensitive
+	 * IRQ 28 (EXT IRQ 3) FPGA 0; active low; level sensitive
+	 * IRQ 29 (EXT IRQ 4) FPGA 1; active low; level sensitive
+	 * IRQ 30 (EXT IRQ 5) PCI INTA; active low; level sensitive
+	 * IRQ 31 (EXT IRQ 6) COMPACT FLASH; active high; level sensitive
+	 */
+	mtdcr(uicsr, 0xFFFFFFFF);       /* clear all ints */
+	mtdcr(uicer, 0x00000000);       /* disable all ints */
+	mtdcr(uiccr, 0x00000000);       /* set all to be non-critical*/
+	mtdcr(uicpr, 0xFFFFFF81);       /* set int polarities */
+	mtdcr(uictr, 0x10000000);       /* set int trigger levels */
+	mtdcr(uicvcr, 0x00000001);      /* set vect base=0,INT0 highest priority*/
+	mtdcr(uicsr, 0xFFFFFFFF);       /* clear all ints */
+
+	/*
+	 * EBC Configuration Register: set ready timeout to 512 ebc-clks -> ca. 15 us
+	 */
+#if 1 /* test-only */
+	mtebc (epcr, 0xa8400000); /* ebc always driven */
+#else
+	mtebc (epcr, 0x28400000); /* ebc in high-z */
+#endif
+
+	return 0;
+}
+
+
+/* ------------------------------------------------------------------------- */
+
+int misc_init_f (void)
+{
+	return 0;  /* dummy implementation */
+}
+
+
+int misc_init_r (void)
+{
+#if 0 /* test-only */
+	DECLARE_GLOBAL_DATA_PTR;
+#if 0
+	volatile unsigned short *fpga_mode =
+		(unsigned short *)((ulong)CFG_FPGA_BASE_ADDR + CFG_FPGA_CTRL);
+	volatile unsigned char *duart0_mcr =
+		(unsigned char *)((ulong)DUART0_BA + 4);
+	volatile unsigned char *duart1_mcr =
+		(unsigned char *)((ulong)DUART1_BA + 4);
+
+	bd_t *bd = gd->bd;
+	char *	tmp;                    /* Temporary char pointer      */
+	unsigned char *dst;
+	ulong len = sizeof(fpgadata);
+	int status;
+	int index;
+	int i;
+	unsigned long cntrl0Reg;
+
+	dst = malloc(CFG_FPGA_MAX_SIZE);
+	if (gunzip (dst, CFG_FPGA_MAX_SIZE, (uchar *)fpgadata, (int *)&len) != 0) {
+		printf ("GUNZIP ERROR - must RESET board to recover\n");
+		do_reset (NULL, 0, 0, NULL);
+	}
+
+	status = fpga_boot(dst, len);
+	if (status != 0) {
+		printf("\nFPGA: Booting failed ");
+		switch (status) {
+		case ERROR_FPGA_PRG_INIT_LOW:
+			printf("(Timeout: INIT not low after asserting PROGRAM*)\n ");
+			break;
+		case ERROR_FPGA_PRG_INIT_HIGH:
+			printf("(Timeout: INIT not high after deasserting PROGRAM*)\n ");
+			break;
+		case ERROR_FPGA_PRG_DONE:
+			printf("(Timeout: DONE not high after programming FPGA)\n ");
+			break;
+		}
+
+		/* display infos on fpgaimage */
+		index = 15;
+		for (i=0; i<4; i++) {
+			len = dst[index];
+			printf("FPGA: %s\n", &(dst[index+1]));
+			index += len+3;
+		}
+		putc ('\n');
+		/* delayed reboot */
+		for (i=20; i>0; i--) {
+			printf("Rebooting in %2d seconds \r",i);
+			for (index=0;index<1000;index++)
+				udelay(1000);
+		}
+		putc ('\n');
+		do_reset(NULL, 0, 0, NULL);
+	}
+
+	puts("FPGA:  ");
+
+	/* display infos on fpgaimage */
+	index = 15;
+	for (i=0; i<4; i++) {
+		len = dst[index];
+		printf("%s ", &(dst[index+1]));
+		index += len+3;
+	}
+	putc ('\n');
+
+	free(dst);
+
+	/*
+	 * Reset FPGA via FPGA_DATA pin
+	 */
+	SET_FPGA(FPGA_PRG | FPGA_CLK);
+	udelay(1000); /* wait 1ms */
+	SET_FPGA(FPGA_PRG | FPGA_CLK | FPGA_DATA);
+	udelay(1000); /* wait 1ms */
+
+#endif
+
+#if 0
+	/*
+	 * Enable power on PS/2 interface
+	 */
+	*fpga_mode |= CFG_FPGA_CTRL_PS2_RESET;
+
+	/*
+	 * Enable interrupts in exar duart mcr[3]
+	 */
+	*duart0_mcr = 0x08;
+	*duart1_mcr = 0x08;
+#endif
+#endif
+
+	return (0);
+}
+
+
+/*
+ * Check Board Identity:
+ */
+
+int checkboard (void)
+{
+	unsigned char str[64];
+	int i = getenv_r ("serial#", str, sizeof(str));
+
+	puts ("Board: ");
+
+	if (i == -1) {
+		puts ("### No HW ID - assuming PPChameleonEVB");
+	} else {
+		puts(str);
+	}
+
+	putc ('\n');
+
+	return 0;
+}
+
+/* ------------------------------------------------------------------------- */
+
+long int initdram (int board_type)
+{
+	unsigned long val;
+
+	mtdcr(memcfga, mem_mb0cf);
+	val = mfdcr(memcfgd);
+
+#if 0 /* test-only */
+	for (;;) {
+		NAND_DISABLE_CE(1);
+		udelay(100);
+		NAND_ENABLE_CE(1);
+		udelay(100);
+	}
+#endif
+#if 0
+	printf("\nmb0cf=%x\n", val); /* test-only */
+	printf("strap=%x\n", mfdcr(strap)); /* test-only */
+#endif
+
+	return (4*1024*1024 << ((val & 0x000e0000) >> 17));
+}
+
+/* ------------------------------------------------------------------------- */
+
+int testdram (void)
+{
+	/* TODO: XXX XXX XXX */
+	printf ("test: 16 MB - ok\n");
+
+	return (0);
+}
+
+/* ------------------------------------------------------------------------- */
+
+#if (CONFIG_COMMANDS & CFG_CMD_NAND)
+extern ulong
+nand_probe(ulong physadr);
+
+void
+nand_init(void)
+{
+	ulong totlen = 0;
+
+#if (CONFIG_PPCHAMELEON_MODULE_MODEL == CONFIG_PPCHAMELEON_MODULE_ME) || \
+    (CONFIG_PPCHAMELEON_MODULE_MODEL == CONFIG_PPCHAMELEON_MODULE_HI)
+	debug ("Probing at 0x%.8x\n", CFG_NAND0_BASE);
+	totlen += nand_probe (CFG_NAND0_BASE);
+#endif	/* CONFIG_PPCHAMELEON_MODULE_ME, CONFIG_PPCHAMELEON_MODULE_HI */
+
+	debug ("Probing at 0x%.8x\n", CFG_NAND1_BASE);
+	totlen += nand_probe (CFG_NAND1_BASE);
+
+	printf ("%4lu MB\n", totlen >>20);
+}
+#endif
--- a/board/dave/PPChameleonEVB/config.mk
+++ b/board/dave/PPChameleonEVB/config.mk
@@ -0,0 +1,24 @@
+#
+# (C) Copyright 2000
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+TEXT_BASE = 0xFFFC0000
--- a/board/dave/PPChameleonEVB/flash.c
+++ b/board/dave/PPChameleonEVB/flash.c
@@ -0,0 +1,105 @@
+/*
+ * (C) Copyright 2001
+ * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <ppc4xx.h>
+#include <asm/processor.h>
+
+/*
+ * include common flash code (for esd boards)
+ */
+#include "../common/flash.c"
+
+/*-----------------------------------------------------------------------
+ * Functions
+ */
+static ulong flash_get_size (vu_long * addr, flash_info_t * info);
+static void flash_get_offsets (ulong base, flash_info_t * info);
+
+/*-----------------------------------------------------------------------
+ */
+
+unsigned long flash_init (void)
+{
+#ifdef __DEBUG_START_FROM_SRAM__
+	return CFG_DUMMY_FLASH_SIZE;
+#else
+	unsigned long size_b0;
+	int i;
+	uint pbcr;
+	unsigned long base_b0;
+	int size_val = 0;
+
+	/* Init: no FLASHes known */
+	for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
+		flash_info[i].flash_id = FLASH_UNKNOWN;
+	}
+
+	/* Static FLASH Bank configuration here - FIXME XXX */
+
+	size_b0 = flash_get_size((vu_long *)FLASH_BASE0_PRELIM, &flash_info[0]);
+
+	if (flash_info[0].flash_id == FLASH_UNKNOWN) {
+		printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
+			size_b0, size_b0<<20);
+	}
+
+	/* Setup offsets */
+	flash_get_offsets (-size_b0, &flash_info[0]);
+
+	/* Re-do sizing to get full correct info */
+	mtdcr(ebccfga, pb0cr);
+	pbcr = mfdcr(ebccfgd);
+	mtdcr(ebccfga, pb0cr);
+	base_b0 = -size_b0;
+	switch (size_b0) {
+	case 1 << 20:
+		size_val = 0;
+		break;
+	case 2 << 20:
+		size_val = 1;
+		break;
+	case 4 << 20:
+		size_val = 2;
+		break;
+	case 8 << 20:
+		size_val = 3;
+		break;
+	case 16 << 20:
+		size_val = 4;
+		break;
+	}
+	pbcr = (pbcr & 0x0001ffff) | base_b0 | (size_val << 17);
+	mtdcr(ebccfgd, pbcr);
+
+	/* Monitor protection ON by default */
+	(void)flash_protect(FLAG_PROTECT_SET,
+			    -CFG_MONITOR_LEN,
+			    0xffffffff,
+			    &flash_info[0]);
+
+	flash_info[0].size = size_b0;
+
+	return (size_b0);
+#endif
+}
--- a/board/dave/PPChameleonEVB/fpgadata.c
+++ b/board/dave/PPChameleonEVB/fpgadata.c
--- a/board/dave/PPChameleonEVB/u-boot.lds
+++ b/board/dave/PPChameleonEVB/u-boot.lds
@@ -0,0 +1,147 @@
+/*
+ * (C) Copyright 2000
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_ARCH(powerpc)
+SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
+/* Do we need any of these for elf?
+   __DYNAMIC = 0;    */
+SECTIONS
+{
+  .resetvec 0xFFFFFFFC :
+  {
+    *(.resetvec)
+  } = 0xffff
+
+  /* Read-only sections, merged into text segment: */
+  . = + SIZEOF_HEADERS;
+  .interp : { *(.interp) }
+  .hash          : { *(.hash)		}
+  .dynsym        : { *(.dynsym)		}
+  .dynstr        : { *(.dynstr)		}
+  .rel.text      : { *(.rel.text)		}
+  .rela.text     : { *(.rela.text) 	}
+  .rel.data      : { *(.rel.data)		}
+  .rela.data     : { *(.rela.data) 	}
+  .rel.rodata    : { *(.rel.rodata) 	}
+  .rela.rodata   : { *(.rela.rodata) 	}
+  .rel.got       : { *(.rel.got)		}
+  .rela.got      : { *(.rela.got)		}
+  .rel.ctors     : { *(.rel.ctors)	}
+  .rela.ctors    : { *(.rela.ctors)	}
+  .rel.dtors     : { *(.rel.dtors)	}
+  .rela.dtors    : { *(.rela.dtors)	}
+  .rel.bss       : { *(.rel.bss)		}
+  .rela.bss      : { *(.rela.bss)		}
+  .rel.plt       : { *(.rel.plt)		}
+  .rela.plt      : { *(.rela.plt)		}
+  .init          : { *(.init)	}
+  .plt : { *(.plt) }
+  .text      :
+  {
+    /* WARNING - the following is hand-optimized to fit within	*/
+    /* the sector layout of our flash chips!	XXX FIXME XXX	*/
+
+    cpu/ppc4xx/start.o	(.text)
+    cpu/ppc4xx/traps.o	(.text)
+    cpu/ppc4xx/interrupts.o	(.text)
+    cpu/ppc4xx/serial.o	(.text)
+    cpu/ppc4xx/cpu_init.o	(.text)
+    cpu/ppc4xx/speed.o	(.text)
+    cpu/ppc4xx/405gp_enet.o	(.text)
+    common/dlmalloc.o	(.text)
+    lib_generic/crc32.o		(.text)
+    lib_ppc/extable.o	(.text)
+    lib_generic/zlib.o		(.text)
+
+/*    . = env_offset;*/
+/*    common/environment.o(.text)*/
+
+    *(.text)
+    *(.fixup)
+    *(.got1)
+  }
+  _etext = .;
+  PROVIDE (etext = .);
+  .rodata    :
+  {
+    *(.rodata)
+    *(.rodata1)
+  }
+  .fini      : { *(.fini)    } =0
+  .ctors     : { *(.ctors)   }
+  .dtors     : { *(.dtors)   }
+
+  /* Read-write section, merged into data segment: */
+  . = (. + 0x00FF) & 0xFFFFFF00;
+  _erotext = .;
+  PROVIDE (erotext = .);
+  .reloc   :
+  {
+    *(.got)
+    _GOT2_TABLE_ = .;
+    *(.got2)
+    _FIXUP_TABLE_ = .;
+    *(.fixup)
+  }
+  __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
+  __fixup_entries = (. - _FIXUP_TABLE_)>>2;
+
+  .data    :
+  {
+    *(.data)
+    *(.data1)
+    *(.sdata)
+    *(.sdata2)
+    *(.dynamic)
+    CONSTRUCTORS
+  }
+  _edata  =  .;
+  PROVIDE (edata = .);
+
+  __u_boot_cmd_start = .;
+  .u_boot_cmd : { *(.u_boot_cmd) }
+  __u_boot_cmd_end = .;
+
+
+  __start___ex_table = .;
+  __ex_table : { *(__ex_table) }
+  __stop___ex_table = .;
+
+  . = ALIGN(256);
+  __init_begin = .;
+  .text.init : { *(.text.init) }
+  .data.init : { *(.data.init) }
+  . = ALIGN(256);
+  __init_end = .;
+
+  __bss_start = .;
+  .bss       :
+  {
+   *(.sbss) *(.scommon)
+   *(.dynbss)
+   *(.bss)
+   *(COMMON)
+  }
+  _end = . ;
+  PROVIDE (end = .);
+}
--- a/board/dave/common/flash.c
+++ b/board/dave/common/flash.c
@@ -0,0 +1,681 @@
+/*
+ * (C) Copyright 2001
+ * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <ppc4xx.h>
+#include <asm/processor.h>
+
+flash_info_t	flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips	*/
+
+/*-----------------------------------------------------------------------
+ * Functions
+ */
+static int write_word (flash_info_t *info, ulong dest, ulong data);
+
+/*-----------------------------------------------------------------------
+ */
+static void flash_get_offsets (ulong base, flash_info_t *info)
+{
+	int i;
+	short n;
+
+	/* set up sector start address table */
+	if (((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) ||
+	    ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM640U)) {
+	    for (i = 0; i < info->sector_count; i++)
+		info->start[i] = base + (i * 0x00010000);
+	} else if (((info->flash_id & FLASH_TYPEMASK) == FLASH_AMDL322B) ||
+		   ((info->flash_id & FLASH_TYPEMASK) == FLASH_AMDL323B) ||
+		   ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM320B) ||
+		   ((info->flash_id & FLASH_TYPEMASK) == FLASH_AMDL324B)) {
+		/* set sector offsets for bottom boot block type	*/
+		for (i=0; i<8; ++i) {		/*  8 x 8k boot sectors	*/
+			info->start[i] = base;
+			base += 8 << 10;
+		}
+		while (i < info->sector_count) {	/* 64k regular sectors	*/
+			info->start[i] = base;
+			base += 64 << 10;
+			++i;
+		}
+	} else if (((info->flash_id & FLASH_TYPEMASK) == FLASH_AMDL322T) ||
+		   ((info->flash_id & FLASH_TYPEMASK) == FLASH_AMDL323T) ||
+		   ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM320T) ||
+		   ((info->flash_id & FLASH_TYPEMASK) == FLASH_AMDL324T)) {
+		/* set sector offsets for top boot block type		*/
+		base += info->size;
+		i = info->sector_count;
+		for (n=0; n<8; ++n) {		/*  8 x 8k boot sectors	*/
+			base -= 8 << 10;
+			--i;
+			info->start[i] = base;
+		}
+		while (i > 0) {			/* 64k regular sectors	*/
+			base -= 64 << 10;
+			--i;
+			info->start[i] = base;
+		}
+	} else {
+	    if (info->flash_id & FLASH_BTYPE) {
+		/* set sector offsets for bottom boot block type	*/
+		info->start[0] = base + 0x00000000;
+		info->start[1] = base + 0x00004000;
+		info->start[2] = base + 0x00006000;
+		info->start[3] = base + 0x00008000;
+		for (i = 4; i < info->sector_count; i++) {
+			info->start[i] = base + (i * 0x00010000) - 0x00030000;
+		}
+	    } else {
+		/* set sector offsets for top boot block type		*/
+		i = info->sector_count - 1;
+		info->start[i--] = base + info->size - 0x00004000;
+		info->start[i--] = base + info->size - 0x00006000;
+		info->start[i--] = base + info->size - 0x00008000;
+		for (; i >= 0; i--) {
+			info->start[i] = base + i * 0x00010000;
+		}
+	    }
+	}
+}
+
+/*-----------------------------------------------------------------------
+ */
+void flash_print_info  (flash_info_t *info)
+{
+	int i;
+	int k;
+	int size;
+	int erased;
+	volatile unsigned long *flash;
+
+	if (info->flash_id == FLASH_UNKNOWN) {
+		printf ("missing or unknown FLASH type\n");
+		return;
+	}
+
+	switch (info->flash_id & FLASH_VENDMASK) {
+	case FLASH_MAN_AMD:	printf ("AMD ");		break;
+	case FLASH_MAN_FUJ:	printf ("FUJITSU ");		break;
+	case FLASH_MAN_SST:	printf ("SST ");		break;
+	case FLASH_MAN_STM:	printf ("ST  ");		break;
+	default:		printf ("Unknown Vendor ");	break;
+	}
+
+	switch (info->flash_id & FLASH_TYPEMASK) {
+	case FLASH_AM400B:	printf ("AM29LV400B (4 Mbit, bottom boot sect)\n");
+				break;
+	case FLASH_AM400T:	printf ("AM29LV400T (4 Mbit, top boot sector)\n");
+				break;
+	case FLASH_AM800B:	printf ("AM29LV800B (8 Mbit, bottom boot sect)\n");
+				break;
+	case FLASH_AM800T:	printf ("AM29LV800T (8 Mbit, top boot sector)\n");
+				break;
+	case FLASH_AM160B:	printf ("AM29LV160B (16 Mbit, bottom boot sect)\n");
+				break;
+	case FLASH_AM160T:	printf ("AM29LV160T (16 Mbit, top boot sector)\n");
+				break;
+	case FLASH_AM320T:	printf ("AM29LV320T (32 M, top sector)\n");
+				break;
+	case FLASH_AM320B:	printf ("AM29LV320B (32 M, bottom sector)\n");
+				break;
+	case FLASH_AMDL322T:	printf ("AM29DL322T (32 M, top sector)\n");
+				break;
+	case FLASH_AMDL322B:	printf ("AM29DL322B (32 M, bottom sector)\n");
+				break;
+	case FLASH_AMDL323T:	printf ("AM29DL323T (32 M, top sector)\n");
+				break;
+	case FLASH_AMDL323B:	printf ("AM29DL323B (32 M, bottom sector)\n");
+				break;
+	case FLASH_AM640U:	printf ("AM29LV640D (64 M, uniform sector)\n");
+				break;
+	case FLASH_SST800A:	printf ("SST39LF/VF800 (8 Mbit, uniform sector size)\n");
+				break;
+	case FLASH_SST160A:	printf ("SST39LF/VF160 (16 Mbit, uniform sector size)\n");
+				break;
+	case FLASH_STMW320DT:	printf ("M29W320DT (32 M, top sector)\n");
+				break;
+	default:		printf ("Unknown Chip Type\n");
+				break;
+	}
+
+	printf ("  Size: %ld MB in %d Sectors\n",
+		info->size >> 20, info->sector_count);
+
+	printf ("  Sector Start Addresses:");
+	for (i=0; i<info->sector_count; ++i) {
+#ifdef CFG_FLASH_EMPTY_INFO
+		/*
+		 * Check if whole sector is erased
+		 */
+		if (i != (info->sector_count-1))
+		  size = info->start[i+1] - info->start[i];
+		else
+		  size = info->start[0] + info->size - info->start[i];
+		erased = 1;
+		flash = (volatile unsigned long *)info->start[i];
+		size = size >> 2;        /* divide by 4 for longword access */
+		for (k=0; k<size; k++)
+		  {
+		    if (*flash++ != 0xffffffff)
+		      {
+			erased = 0;
+			break;
+		      }
+		  }
+
+		if ((i % 5) == 0)
+			printf ("\n   ");
+		/* print empty and read-only info */
+		printf (" %08lX%s%s",
+			info->start[i],
+			erased ? " E" : "  ",
+			info->protect[i] ? "RO " : "   ");
+#else
+		if ((i % 5) == 0)
+			printf ("\n   ");
+		printf (" %08lX%s",
+			info->start[i],
+			info->protect[i] ? " (RO)" : "     ");
+#endif
+
+	}
+	printf ("\n");
+	return;
+}
+
+/*-----------------------------------------------------------------------
+ */
+
+
+/*-----------------------------------------------------------------------
+ */
+
+/*
+ * The following code cannot be run from FLASH!
+ */
+static ulong flash_get_size (vu_long *addr, flash_info_t *info)
+{
+	short i;
+	short n;
+	CFG_FLASH_WORD_SIZE value;
+	ulong base = (ulong)addr;
+	volatile CFG_FLASH_WORD_SIZE *addr2 = (CFG_FLASH_WORD_SIZE *)addr;
+
+	/* Write auto select command: read Manufacturer ID */
+	addr2[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE)0x00AA00AA;
+	addr2[CFG_FLASH_ADDR1] = (CFG_FLASH_WORD_SIZE)0x00550055;
+	addr2[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE)0x00900090;
+
+	value = addr2[CFG_FLASH_READ0];
+
+	switch (value) {
+	case (CFG_FLASH_WORD_SIZE)AMD_MANUFACT:
+		info->flash_id = FLASH_MAN_AMD;
+		break;
+	case (CFG_FLASH_WORD_SIZE)FUJ_MANUFACT:
+		info->flash_id = FLASH_MAN_FUJ;
+		break;
+	case (CFG_FLASH_WORD_SIZE)SST_MANUFACT:
+		info->flash_id = FLASH_MAN_SST;
+		break;
+	case (CFG_FLASH_WORD_SIZE)STM_MANUFACT:
+		info->flash_id = FLASH_MAN_STM;
+		break;
+	default:
+		info->flash_id = FLASH_UNKNOWN;
+		info->sector_count = 0;
+		info->size = 0;
+		return (0);			/* no or unknown flash	*/
+	}
+
+	value = addr2[CFG_FLASH_READ1];		/* device ID		*/
+
+	switch (value) {
+	case (CFG_FLASH_WORD_SIZE)AMD_ID_LV400T:
+		info->flash_id += FLASH_AM400T;
+		info->sector_count = 11;
+		info->size = 0x00080000;
+		break;				/* => 0.5 MB		*/
+
+	case (CFG_FLASH_WORD_SIZE)AMD_ID_LV400B:
+		info->flash_id += FLASH_AM400B;
+		info->sector_count = 11;
+		info->size = 0x00080000;
+		break;				/* => 0.5 MB		*/
+
+	case (CFG_FLASH_WORD_SIZE)AMD_ID_LV800T:
+		info->flash_id += FLASH_AM800T;
+		info->sector_count = 19;
+		info->size = 0x00100000;
+		break;				/* => 1 MB		*/
+
+	case (CFG_FLASH_WORD_SIZE)AMD_ID_LV800B:
+		info->flash_id += FLASH_AM800B;
+		info->sector_count = 19;
+		info->size = 0x00100000;
+		break;				/* => 1 MB		*/
+
+	case (CFG_FLASH_WORD_SIZE)AMD_ID_LV160T:
+		info->flash_id += FLASH_AM160T;
+		info->sector_count = 35;
+		info->size = 0x00200000;
+		break;				/* => 2 MB		*/
+
+	case (CFG_FLASH_WORD_SIZE)AMD_ID_LV160B:
+		info->flash_id += FLASH_AM160B;
+		info->sector_count = 35;
+		info->size = 0x00200000;
+		break;				/* => 2 MB		*/
+
+	case (CFG_FLASH_WORD_SIZE)STM_ID_29W320DT:
+		info->flash_id += FLASH_STMW320DT;
+		info->sector_count = 67;
+		info->size = 0x00400000;  break;	/* => 4 MB	*/
+
+	case (CFG_FLASH_WORD_SIZE)AMD_ID_LV320T:
+		info->flash_id += FLASH_AM320T;
+		info->sector_count = 71;
+		info->size = 0x00400000;  break;	/* => 4 MB	*/
+
+	case (CFG_FLASH_WORD_SIZE)AMD_ID_LV320B:
+		info->flash_id += FLASH_AM320B;
+		info->sector_count = 71;
+		info->size = 0x00400000;  break;	/* => 4 MB	*/
+
+	case (CFG_FLASH_WORD_SIZE)AMD_ID_DL322T:
+		info->flash_id += FLASH_AMDL322T;
+		info->sector_count = 71;
+		info->size = 0x00400000;  break;	/* => 4 MB	*/
+
+	case (CFG_FLASH_WORD_SIZE)AMD_ID_DL322B:
+		info->flash_id += FLASH_AMDL322B;
+		info->sector_count = 71;
+		info->size = 0x00400000;  break;	/* => 4 MB	*/
+
+	case (CFG_FLASH_WORD_SIZE)AMD_ID_DL323T:
+		info->flash_id += FLASH_AMDL323T;
+		info->sector_count = 71;
+		info->size = 0x00400000;  break;	/* => 4 MB	*/
+
+	case (CFG_FLASH_WORD_SIZE)AMD_ID_DL323B:
+		info->flash_id += FLASH_AMDL323B;
+		info->sector_count = 71;
+		info->size = 0x00400000;  break;	/* => 4 MB	*/
+
+	case (CFG_FLASH_WORD_SIZE)AMD_ID_LV640U:
+		info->flash_id += FLASH_AM640U;
+		info->sector_count = 128;
+		info->size = 0x00800000;  break;	/* => 8 MB	*/
+
+	case (CFG_FLASH_WORD_SIZE)SST_ID_xF800A:
+		info->flash_id += FLASH_SST800A;
+		info->sector_count = 16;
+		info->size = 0x00100000;
+		break;				/* => 1 MB		*/
+
+	case (CFG_FLASH_WORD_SIZE)SST_ID_xF160A:
+		info->flash_id += FLASH_SST160A;
+		info->sector_count = 32;
+		info->size = 0x00200000;
+		break;				/* => 2 MB		*/
+
+	default:
+		info->flash_id = FLASH_UNKNOWN;
+		return (0);			/* => no or unknown flash */
+
+	}
+
+	/* set up sector start address table */
+	if (((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) ||
+	    ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM640U)) {
+	    for (i = 0; i < info->sector_count; i++)
+		info->start[i] = base + (i * 0x00010000);
+	} else if (((info->flash_id & FLASH_TYPEMASK) == FLASH_AMDL322B) ||
+		   ((info->flash_id & FLASH_TYPEMASK) == FLASH_AMDL323B) ||
+		   ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM320B) ||
+		   ((info->flash_id & FLASH_TYPEMASK) == FLASH_AMDL324B)) {
+		/* set sector offsets for bottom boot block type	*/
+		for (i=0; i<8; ++i) {		/*  8 x 8k boot sectors	*/
+			info->start[i] = base;
+			base += 8 << 10;
+		}
+		while (i < info->sector_count) {	/* 64k regular sectors	*/
+			info->start[i] = base;
+			base += 64 << 10;
+			++i;
+		}
+	} else if (((info->flash_id & FLASH_TYPEMASK) == FLASH_AMDL322T) ||
+		   ((info->flash_id & FLASH_TYPEMASK) == FLASH_AMDL323T) ||
+		   ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM320T) ||
+		   ((info->flash_id & FLASH_TYPEMASK) == FLASH_AMDL324T)) {
+		/* set sector offsets for top boot block type		*/
+		base += info->size;
+		i = info->sector_count;
+		for (n=0; n<8; ++n) {		/*  8 x 8k boot sectors	*/
+			base -= 8 << 10;
+			--i;
+			info->start[i] = base;
+		}
+		while (i > 0) {			/* 64k regular sectors	*/
+			base -= 64 << 10;
+			--i;
+			info->start[i] = base;
+		}
+	} else if ((info->flash_id & FLASH_TYPEMASK) == FLASH_STMW320DT) {
+		/* set sector offsets for top boot block type		*/
+		base += info->size;
+		i = info->sector_count;
+		/*  1 x 16k boot sector */
+		base -= 16 << 10;
+		--i;
+		info->start[i] = base;
+		/*  2 x 8k  boot sectors */
+		for (n=0; n<2; ++n) {
+			base -= 8 << 10;
+			--i;
+			info->start[i] = base;
+		}
+		/*  1 x 32k boot sector */
+		base -= 32 << 10;
+		--i;
+		info->start[i] = base;
+
+		while (i > 0) {			/* 64k regular sectors	*/
+			base -= 64 << 10;
+			--i;
+			info->start[i] = base;
+		}
+	} else {
+	    if (info->flash_id & FLASH_BTYPE) {
+		/* set sector offsets for bottom boot block type	*/
+		info->start[0] = base + 0x00000000;
+		info->start[1] = base + 0x00004000;
+		info->start[2] = base + 0x00006000;
+		info->start[3] = base + 0x00008000;
+		for (i = 4; i < info->sector_count; i++) {
+			info->start[i] = base + (i * 0x00010000) - 0x00030000;
+		}
+	    } else {
+		/* set sector offsets for top boot block type		*/
+		i = info->sector_count - 1;
+		info->start[i--] = base + info->size - 0x00004000;
+		info->start[i--] = base + info->size - 0x00006000;
+		info->start[i--] = base + info->size - 0x00008000;
+		for (; i >= 0; i--) {
+			info->start[i] = base + i * 0x00010000;
+		}
+	    }
+	}
+
+	/* check for protected sectors */
+	for (i = 0; i < info->sector_count; i++) {
+		/* read sector protection at sector address, (A7 .. A0) = 0x02 */
+		/* D0 = 1 if protected */
+		addr2 = (volatile CFG_FLASH_WORD_SIZE *)(info->start[i]);
+		if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST)
+		  info->protect[i] = 0;
+		else
+		  info->protect[i] = addr2[CFG_FLASH_READ2] & 1;
+	}
+
+	/*
+	 * Prevent writes to uninitialized FLASH.
+	 */
+	if (info->flash_id != FLASH_UNKNOWN) {
+		addr2 = (CFG_FLASH_WORD_SIZE *)info->start[0];
+		*addr2 = (CFG_FLASH_WORD_SIZE)0x00F000F0;	/* reset bank */
+	}
+
+	return (info->size);
+}
+
+
+/*-----------------------------------------------------------------------
+ */
+
+int	flash_erase (flash_info_t *info, int s_first, int s_last)
+{
+	volatile CFG_FLASH_WORD_SIZE *addr = (CFG_FLASH_WORD_SIZE *)(info->start[0]);
+	volatile CFG_FLASH_WORD_SIZE *addr2;
+	int flag, prot, sect, l_sect;
+	ulong start, now, last;
+	int i;
+
+	if ((s_first < 0) || (s_first > s_last)) {
+		if (info->flash_id == FLASH_UNKNOWN) {
+			printf ("- missing\n");
+		} else {
+			printf ("- no sectors to erase\n");
+		}
+		return 1;
+	}
+
+	if (info->flash_id == FLASH_UNKNOWN) {
+		printf ("Can't erase unknown flash type - aborted\n");
+		return 1;
+	}
+
+	prot = 0;
+	for (sect=s_first; sect<=s_last; ++sect) {
+		if (info->protect[sect]) {
+			prot++;
+		}
+	}
+
+	if (prot) {
+		printf ("- Warning: %d protected sectors will not be erased!\n",
+			prot);
+	} else {
+		printf ("\n");
+	}
+
+	l_sect = -1;
+
+	/* Disable interrupts which might cause a timeout here */
+	flag = disable_interrupts();
+
+	/* Start erase on unprotected sectors */
+	for (sect = s_first; sect<=s_last; sect++) {
+		if (info->protect[sect] == 0) {	/* not protected */
+		    addr2 = (CFG_FLASH_WORD_SIZE *)(info->start[sect]);
+		    if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) {
+			addr[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE)0x00AA00AA;
+			addr[CFG_FLASH_ADDR1] = (CFG_FLASH_WORD_SIZE)0x00550055;
+			addr[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE)0x00800080;
+			addr[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE)0x00AA00AA;
+			addr[CFG_FLASH_ADDR1] = (CFG_FLASH_WORD_SIZE)0x00550055;
+			addr2[0] = (CFG_FLASH_WORD_SIZE)0x00500050;  /* block erase */
+			for (i=0; i<50; i++)
+			  udelay(1000);  /* wait 1 ms */
+		    } else {
+			if (sect == s_first) {
+			    addr[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE)0x00AA00AA;
+			    addr[CFG_FLASH_ADDR1] = (CFG_FLASH_WORD_SIZE)0x00550055;
+			    addr[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE)0x00800080;
+			    addr[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE)0x00AA00AA;
+			    addr[CFG_FLASH_ADDR1] = (CFG_FLASH_WORD_SIZE)0x00550055;
+			}
+			addr2[0] = (CFG_FLASH_WORD_SIZE)0x00300030;  /* sector erase */
+		    }
+		    l_sect = sect;
+		}
+	}
+
+	/* re-enable interrupts if necessary */
+	if (flag)
+		enable_interrupts();
+
+	/* wait at least 80us - let's wait 1 ms */
+	udelay (1000);
+
+	/*
+	 * We wait for the last triggered sector
+	 */
+	if (l_sect < 0)
+		goto DONE;
+
+	start = get_timer (0);
+	last  = start;
+	addr = (CFG_FLASH_WORD_SIZE *)(info->start[l_sect]);
+	while ((addr[0] & (CFG_FLASH_WORD_SIZE)0x00800080) != (CFG_FLASH_WORD_SIZE)0x00800080) {
+		if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
+			printf ("Timeout\n");
+			return 1;
+		}
+		/* show that we're waiting */
+		if ((now - last) > 1000) {	/* every second */
+			putc ('.');
+			last = now;
+		}
+	}
+
+DONE:
+	/* reset to read mode */
+	addr = (CFG_FLASH_WORD_SIZE *)info->start[0];
+	addr[0] = (CFG_FLASH_WORD_SIZE)0x00F000F0;	/* reset bank */
+
+	printf (" done\n");
+	return 0;
+}
+
+/*-----------------------------------------------------------------------
+ * Copy memory to flash, returns:
+ * 0 - OK
+ * 1 - write timeout
+ * 2 - Flash not erased
+ */
+
+int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
+{
+	ulong cp, wp, data;
+	int i, l, rc;
+
+	wp = (addr & ~3);	/* get lower word aligned address */
+
+	/*
+	 * handle unaligned start bytes
+	 */
+	if ((l = addr - wp) != 0) {
+		data = 0;
+		for (i=0, cp=wp; i<l; ++i, ++cp) {
+			data = (data << 8) | (*(uchar *)cp);
+		}
+		for (; i<4 && cnt>0; ++i) {
+			data = (data << 8) | *src++;
+			--cnt;
+			++cp;
+		}
+		for (; cnt==0 && i<4; ++i, ++cp) {
+			data = (data << 8) | (*(uchar *)cp);
+		}
+
+		if ((rc = write_word(info, wp, data)) != 0) {
+			return (rc);
+		}
+		wp += 4;
+	}
+
+	/*
+	 * handle word aligned part
+	 */
+	while (cnt >= 4) {
+		data = 0;
+		for (i=0; i<4; ++i) {
+			data = (data << 8) | *src++;
+		}
+		if ((rc = write_word(info, wp, data)) != 0) {
+			return (rc);
+		}
+		wp  += 4;
+		cnt -= 4;
+	}
+
+	if (cnt == 0) {
+		return (0);
+	}
+
+	/*
+	 * handle unaligned tail bytes
+	 */
+	data = 0;
+	for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) {
+		data = (data << 8) | *src++;
+		--cnt;
+	}
+	for (; i<4; ++i, ++cp) {
+		data = (data << 8) | (*(uchar *)cp);
+	}
+
+	return (write_word(info, wp, data));
+}
+
+/*-----------------------------------------------------------------------
+ * Write a word to Flash, returns:
+ * 0 - OK
+ * 1 - write timeout
+ * 2 - Flash not erased
+ */
+static int write_word (flash_info_t *info, ulong dest, ulong data)
+{
+	volatile CFG_FLASH_WORD_SIZE *addr2 = (CFG_FLASH_WORD_SIZE *)(info->start[0]);
+	volatile CFG_FLASH_WORD_SIZE *dest2 = (CFG_FLASH_WORD_SIZE *)dest;
+	volatile CFG_FLASH_WORD_SIZE *data2 = (CFG_FLASH_WORD_SIZE *)&data;
+	ulong start;
+	int flag;
+	int i;
+
+	/* Check if Flash is (sufficiently) erased */
+	if ((*((volatile CFG_FLASH_WORD_SIZE *)dest) &
+	     (CFG_FLASH_WORD_SIZE)data) != (CFG_FLASH_WORD_SIZE)data) {
+		return (2);
+	}
+	/* Disable interrupts which might cause a timeout here */
+	flag = disable_interrupts();
+
+	for (i=0; i<4/sizeof(CFG_FLASH_WORD_SIZE); i++)
+	  {
+	    addr2[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE)0x00AA00AA;
+	    addr2[CFG_FLASH_ADDR1] = (CFG_FLASH_WORD_SIZE)0x00550055;
+	    addr2[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE)0x00A000A0;
+
+	    dest2[i] = data2[i];
+
+	    /* re-enable interrupts if necessary */
+	    if (flag)
+	      enable_interrupts();
+
+	    /* data polling for D7 */
+	    start = get_timer (0);
+	    while ((dest2[i] & (CFG_FLASH_WORD_SIZE)0x00800080) !=
+		   (data2[i] & (CFG_FLASH_WORD_SIZE)0x00800080)) {
+	      if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
+		return (1);
+	      }
+	    }
+	  }
+
+	return (0);
+}
+
+/*-----------------------------------------------------------------------
+ */
--- a/board/dave/common/fpga.c
+++ b/board/dave/common/fpga.c
@@ -0,0 +1,256 @@
+/*
+ * (C) Copyright 2001-2003
+ * Matthias Fuchs, esd gmbh germany, matthias.fuchs@esd-electronics.com
+ * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/processor.h>
+#include <command.h>
+
+/* ------------------------------------------------------------------------- */
+
+#ifdef FPGA_DEBUG
+#define DBG(x...) printf(x)
+#else
+#define DBG(x...)
+#endif /* DEBUG */
+
+#define MAX_ONES               226
+
+#ifdef CFG_FPGA_PRG
+# define FPGA_PRG              CFG_FPGA_PRG /* FPGA program pin (ppc output)*/
+# define FPGA_CLK              CFG_FPGA_CLK /* FPGA clk pin (ppc output)    */
+# define FPGA_DATA             CFG_FPGA_DATA /* FPGA data pin (ppc output)  */
+# define FPGA_DONE             CFG_FPGA_DONE /* FPGA done pin (ppc input)   */
+# define FPGA_INIT             CFG_FPGA_INIT /* FPGA init pin (ppc input)   */
+#else
+# define FPGA_PRG              0x04000000  /* FPGA program pin (ppc output) */
+# define FPGA_CLK              0x02000000  /* FPGA clk pin (ppc output)     */
+# define FPGA_DATA             0x01000000  /* FPGA data pin (ppc output)    */
+# define FPGA_DONE             0x00800000  /* FPGA done pin (ppc input)     */
+# define FPGA_INIT             0x00400000  /* FPGA init pin (ppc input)     */
+#endif
+
+#define ERROR_FPGA_PRG_INIT_LOW  -1        /* Timeout after PRG* asserted   */
+#define ERROR_FPGA_PRG_INIT_HIGH -2        /* Timeout after PRG* deasserted */
+#define ERROR_FPGA_PRG_DONE      -3        /* Timeout after programming     */
+
+#define SET_FPGA(data)         out32(GPIO0_OR, data)
+
+#define FPGA_WRITE_1 {                                                    \
+	SET_FPGA(FPGA_PRG |            FPGA_DATA);  /* set clock to 0 */  \
+	SET_FPGA(FPGA_PRG |            FPGA_DATA);  /* set data to 1  */  \
+	SET_FPGA(FPGA_PRG | FPGA_CLK | FPGA_DATA);  /* set clock to 1 */  \
+	SET_FPGA(FPGA_PRG | FPGA_CLK | FPGA_DATA);} /* set data to 1  */
+
+#define FPGA_WRITE_0 {                                                    \
+	SET_FPGA(FPGA_PRG |            FPGA_DATA);  /* set clock to 0 */  \
+	SET_FPGA(FPGA_PRG);                         /* set data to 0  */  \
+	SET_FPGA(FPGA_PRG | FPGA_CLK);              /* set clock to 1 */  \
+	SET_FPGA(FPGA_PRG | FPGA_CLK | FPGA_DATA);} /* set data to 1  */
+
+#if 0
+static int fpga_boot (unsigned char *fpgadata, int size)
+{
+	int i, index, len;
+	int count;
+
+#ifdef CFG_FPGA_SPARTAN2
+	int j;
+#else
+	unsigned char b;
+	int bit;
+#endif
+
+	/* display infos on fpgaimage */
+	index = 15;
+	for (i = 0; i < 4; i++) {
+		len = fpgadata[index];
+		DBG ("FPGA: %s\n", &(fpgadata[index + 1]));
+		index += len + 3;
+	}
+
+#ifdef CFG_FPGA_SPARTAN2
+	/* search for preamble 0xFFFFFFFF */
+	while (1) {
+		if ((fpgadata[index] == 0xff) && (fpgadata[index + 1] == 0xff)
+		    && (fpgadata[index + 2] == 0xff)
+		    && (fpgadata[index + 3] == 0xff))
+			break;	/* preamble found */
+		else
+			index++;
+	}
+#else
+	/* search for preamble 0xFF2X */
+	for (index = 0; index < size - 1; index++) {
+		if ((fpgadata[index] == 0xff)
+		    && ((fpgadata[index + 1] & 0xf0) == 0x30))
+			break;
+	}
+	index += 2;
+#endif
+
+	DBG ("FPGA: configdata starts at position 0x%x\n", index);
+	DBG ("FPGA: length of fpga-data %d\n", size - index);
+
+	/*
+	 * Setup port pins for fpga programming
+	 */
+	out32 (GPIO0_ODR, 0x00000000);	/* no open drain pins */
+	out32 (GPIO0_TCR, in32 (GPIO0_TCR) | FPGA_PRG | FPGA_CLK | FPGA_DATA);	/* setup for output */
+	out32 (GPIO0_OR, in32 (GPIO0_OR) | FPGA_PRG | FPGA_CLK | FPGA_DATA);	/* set pins to high */
+
+	DBG ("%s, ",
+	     ((in32 (GPIO0_IR) & FPGA_DONE) == 0) ? "NOT DONE" : "DONE");
+	DBG ("%s\n",
+	     ((in32 (GPIO0_IR) & FPGA_INIT) == 0) ? "NOT INIT" : "INIT");
+
+	/*
+	 * Init fpga by asserting and deasserting PROGRAM*
+	 */
+	SET_FPGA (FPGA_CLK | FPGA_DATA);
+
+	/* Wait for FPGA init line low */
+	count = 0;
+	while (in32 (GPIO0_IR) & FPGA_INIT) {
+		udelay (1000);	/* wait 1ms */
+		/* Check for timeout - 100us max, so use 3ms */
+		if (count++ > 3) {
+			DBG ("FPGA: Booting failed!\n");
+			return ERROR_FPGA_PRG_INIT_LOW;
+		}
+	}
+
+	DBG ("%s, ",
+	     ((in32 (GPIO0_IR) & FPGA_DONE) == 0) ? "NOT DONE" : "DONE");
+	DBG ("%s\n",
+	     ((in32 (GPIO0_IR) & FPGA_INIT) == 0) ? "NOT INIT" : "INIT");
+
+	/* deassert PROGRAM* */
+	SET_FPGA (FPGA_PRG | FPGA_CLK | FPGA_DATA);
+
+	/* Wait for FPGA end of init period .  */
+	count = 0;
+	while (!(in32 (GPIO0_IR) & FPGA_INIT)) {
+		udelay (1000);	/* wait 1ms */
+		/* Check for timeout */
+		if (count++ > 3) {
+			DBG ("FPGA: Booting failed!\n");
+			return ERROR_FPGA_PRG_INIT_HIGH;
+		}
+	}
+
+	DBG ("%s, ",
+	     ((in32 (GPIO0_IR) & FPGA_DONE) == 0) ? "NOT DONE" : "DONE");
+	DBG ("%s\n",
+	     ((in32 (GPIO0_IR) & FPGA_INIT) == 0) ? "NOT INIT" : "INIT");
+
+	DBG ("write configuration data into fpga\n");
+	/* write configuration-data into fpga... */
+
+#ifdef CFG_FPGA_SPARTAN2
+	/*
+	 * Load uncompressed image into fpga
+	 */
+	for (i = index; i < size; i++) {
+		for (j = 0; j < 8; j++) {
+			if ((fpgadata[i] & 0x80) == 0x80) {
+				FPGA_WRITE_1;
+			} else {
+				FPGA_WRITE_0;
+			}
+			fpgadata[i] <<= 1;
+		}
+	}
+#else	/* ! CFG_FPGA_SPARTAN2 */
+	/* send 0xff 0x20 */
+	FPGA_WRITE_1;
+	FPGA_WRITE_1;
+	FPGA_WRITE_1;
+	FPGA_WRITE_1;
+	FPGA_WRITE_1;
+	FPGA_WRITE_1;
+	FPGA_WRITE_1;
+	FPGA_WRITE_1;
+	FPGA_WRITE_0;
+	FPGA_WRITE_0;
+	FPGA_WRITE_1;
+	FPGA_WRITE_0;
+	FPGA_WRITE_0;
+	FPGA_WRITE_0;
+	FPGA_WRITE_0;
+	FPGA_WRITE_0;
+
+	/*
+	 ** Bit_DeCompression
+	 **   Code 1           .. maxOnes     : n                 '1's followed by '0'
+	 **        maxOnes + 1 .. maxOnes + 1 : n - 1             '1's no '0'
+	 **        maxOnes + 2 .. 254         : n - (maxOnes + 2) '0's followed by '1'
+	 **        255                        :                   '1'
+	 */
+
+	for (i = index; i < size; i++) {
+		b = fpgadata[i];
+		if ((b >= 1) && (b <= MAX_ONES)) {
+			for (bit = 0; bit < b; bit++) {
+				FPGA_WRITE_1;
+			}
+			FPGA_WRITE_0;
+		} else if (b == (MAX_ONES + 1)) {
+			for (bit = 1; bit < b; bit++) {
+				FPGA_WRITE_1;
+			}
+		} else if ((b >= (MAX_ONES + 2)) && (b <= 254)) {
+			for (bit = 0; bit < (b - (MAX_ONES + 2)); bit++) {
+				FPGA_WRITE_0;
+			}
+			FPGA_WRITE_1;
+		} else if (b == 255) {
+			FPGA_WRITE_1;
+		}
+	}
+#endif	/* CFG_FPGA_SPARTAN2 */
+
+	DBG ("%s, ",
+	     ((in32 (GPIO0_IR) & FPGA_DONE) == 0) ? "NOT DONE" : "DONE");
+	DBG ("%s\n",
+	     ((in32 (GPIO0_IR) & FPGA_INIT) == 0) ? "NOT INIT" : "INIT");
+
+	/*
+	 * Check if fpga's DONE signal - correctly booted ?
+	 */
+
+	/* Wait for FPGA end of programming period .  */
+	count = 0;
+	while (!(in32 (GPIO0_IR) & FPGA_DONE)) {
+		udelay (1000);	/* wait 1ms */
+		/* Check for timeout */
+		if (count++ > 3) {
+			DBG ("FPGA: Booting failed!\n");
+			return ERROR_FPGA_PRG_DONE;
+		}
+	}
+
+	DBG ("FPGA: Booting successful!\n");
+	return 0;
+}
+#endif	/* 0 */
--- a/board/dave/common/pci.c
+++ b/board/dave/common/pci.c
@@ -0,0 +1,202 @@
+/*
+ * (C) Copyright 2001
+ * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <ppc4xx.h>
+#include <asm/processor.h>
+#include <pci.h>
+
+
+u_long pci9054_iobase;
+
+
+#define PCI_PRIMARY_CAR	(0x500000dc) /* PCI config address reg */
+#define PCI_PRIMARY_CDR	(0x80000000) /* PCI config data    reg */
+
+
+/*-----------------------------------------------------------------------------+
+|  Subroutine:  pci9054_read_config_dword
+|  Description: Read a PCI configuration register
+|  Inputs:
+|               hose            PCI Controller
+|               dev             PCI Bus+Device+Function number
+|               offset          Configuration register number
+|               value           Address of the configuration register value
+|  Return value:
+|               0               Successful
+-----------------------------------------------------------------------------*/
+int pci9054_read_config_dword(struct pci_controller *hose,
+			      pci_dev_t dev, int offset, u32* value)
+{
+  unsigned long      conAdrVal;
+  unsigned long      val;
+
+  /* generate coded value for CON_ADR register */
+  conAdrVal = dev | (offset & 0xfc) | 0x80000000;
+
+  /* Load the CON_ADR (CAR) value first, then read from CON_DATA (CDR) */
+  *(unsigned long *)PCI_PRIMARY_CAR = conAdrVal;
+
+  /* Note: *pResult comes back as -1 if machine check happened */
+  val = in32r(PCI_PRIMARY_CDR);
+
+  *value = (unsigned long) val;
+
+  out32r(PCI_PRIMARY_CAR, 0);
+
+  if ((*(unsigned long *)0x50000304) & 0x60000000)
+    {
+      /* clear pci master/target abort bits */
+      *(unsigned long *)0x50000304 = *(unsigned long *)0x50000304;
+    }
+
+  return 0;
+}
+
+/*-----------------------------------------------------------------------------+
+|  Subroutine:  pci9054_write_config_dword
+|  Description: Write a PCI configuration register.
+|  Inputs:
+|               hose            PCI Controller
+|               dev             PCI Bus+Device+Function number
+|               offset          Configuration register number
+|               Value           Configuration register value
+|  Return value:
+|               0               Successful
+| Updated for pass2 errata #6. Need to disable interrupts and clear the
+| PCICFGADR reg after writing the PCICFGDATA reg.
+-----------------------------------------------------------------------------*/
+int pci9054_write_config_dword(struct pci_controller *hose,
+			       pci_dev_t dev, int offset, u32 value)
+{
+  unsigned long      conAdrVal;
+
+  conAdrVal = dev | (offset & 0xfc) | 0x80000000;
+
+  *(unsigned long *)PCI_PRIMARY_CAR = conAdrVal;
+
+  out32r(PCI_PRIMARY_CDR, value);
+
+  out32r(PCI_PRIMARY_CAR, 0);
+
+  /* clear pci master/target abort bits */
+  *(unsigned long *)0x50000304 = *(unsigned long *)0x50000304;
+
+  return (0);
+}
+
+/*-----------------------------------------------------------------------
+ */
+
+#ifdef CONFIG_DASA_SIM
+static void pci_dasa_sim_config_pci9054(struct pci_controller *hose, pci_dev_t dev,
+					struct pci_config_table *_)
+{
+  unsigned int iobase;
+  unsigned short status = 0;
+  unsigned char timer;
+
+  /*
+   * Configure PLX PCI9054
+   */
+  pci_read_config_word(CFG_PCI9054_DEV_FN, PCI_COMMAND, &status);
+  status |= PCI_COMMAND_MASTER | PCI_COMMAND_IO | PCI_COMMAND_MEMORY;
+  pci_write_config_word(CFG_PCI9054_DEV_FN, PCI_COMMAND, status);
+
+  /* Check the latency timer for values >= 0x60.
+   */
+  pci_read_config_byte(CFG_PCI9054_DEV_FN, PCI_LATENCY_TIMER, &timer);
+  if (timer < 0x60)
+    {
+      pci_write_config_byte(CFG_PCI9054_DEV_FN, PCI_LATENCY_TIMER, 0x60);
+    }
+
+  /* Set I/O base register.
+   */
+  pci_write_config_dword(CFG_PCI9054_DEV_FN, PCI_BASE_ADDRESS_0, CFG_PCI9054_IOBASE);
+  pci_read_config_dword(CFG_PCI9054_DEV_FN, PCI_BASE_ADDRESS_0, &iobase);
+
+  pci9054_iobase = pci_mem_to_phys(CFG_PCI9054_DEV_FN, iobase & PCI_BASE_ADDRESS_MEM_MASK);
+
+  if (pci9054_iobase == 0xffffffff)
+    {
+      printf("Error: Can not set I/O base register.\n");
+      return;
+    }
+}
+#endif
+
+static struct pci_config_table pci9054_config_table[] = {
+#ifndef CONFIG_PCI_PNP
+  { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
+    PCI_BUS(CFG_ETH_DEV_FN), PCI_DEV(CFG_ETH_DEV_FN), PCI_FUNC(CFG_ETH_DEV_FN),
+    pci_cfgfunc_config_device, { CFG_ETH_IOBASE,
+				 CFG_ETH_IOBASE,
+				 PCI_COMMAND_IO | PCI_COMMAND_MASTER }},
+#ifdef CONFIG_DASA_SIM
+  { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
+    PCI_BUS(CFG_PCI9054_DEV_FN), PCI_DEV(CFG_PCI9054_DEV_FN), PCI_FUNC(CFG_PCI9054_DEV_FN),
+    pci_dasa_sim_config_pci9054 },
+#endif
+#endif
+  { }
+};
+
+static struct pci_controller pci9054_hose = {
+  config_table: pci9054_config_table,
+};
+
+void pci_init(void)
+{
+  struct pci_controller *hose = &pci9054_hose;
+
+  /*
+   * Register the hose
+   */
+  hose->first_busno = 0;
+  hose->last_busno = 0xff;
+
+  /* System memory space */
+  pci_set_region(hose->regions + 0,
+		 0x00000000, 0x00000000, 0x01000000,
+		 PCI_REGION_MEM | PCI_REGION_MEMORY);
+
+  /* PCI Memory space */
+  pci_set_region(hose->regions + 1,
+		 0x00000000, 0xc0000000, 0x10000000,
+		 PCI_REGION_MEM);
+
+  pci_set_ops(hose,
+	      pci_hose_read_config_byte_via_dword,
+	      pci_hose_read_config_word_via_dword,
+	      pci9054_read_config_dword,
+	      pci_hose_write_config_byte_via_dword,
+	      pci_hose_write_config_word_via_dword,
+	      pci9054_write_config_dword);
+
+  hose->region_count = 2;
+
+  pci_register_hose(hose);
+
+  hose->last_busno = pci_hose_scan(hose);
+}
--- a/board/dbau1x00/Makefile
+++ b/board/dbau1x00/Makefile
@@ -0,0 +1,41 @@
+#
+# (C) Copyright 2003
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB	= lib$(BOARD).a
+
+OBJS	= $(BOARD).o flash.o
+SOBJS	= memsetup.o
+
+$(LIB):	.depend $(OBJS) $(SOBJS)
+	$(AR) crv $@ $(OBJS) $(SOBJS)
+
+#########################################################################
+
+.depend:	Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
+		$(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
+
+sinclude .depend
+
+#########################################################################
--- a/board/dbau1x00/README
+++ b/board/dbau1x00/README
@@ -0,0 +1,53 @@
+By Thomas.Lange@corelatus.se 2003-10-06
+----------------------------------------
+DbAu1000 is a development board from AMD containing
+an Alchemy AU1000 with mips32 core.
+
+Limitations & comments
+----------------------
+I assume that you set board to BIG endian!
+Little endian not tested, most probably broken.
+
+I named the board dbau1x00, to allow
+support for all three development boards
+some day ( dbau1000, dbau1100 and dbau1500 ).
+
+I only have a dbau1000, so all testing is limited
+to this board!
+
+The board has two different flash banks, that can
+be selected via dip switch. This makes it possible
+to test new bootloaders without thrashing the YAMON
+boot loader deliviered with board.
+
+Ethernet only supported for mac0.
+
+Pcmcia only supported for slot 0, only 3.3V.
+
+Pcmcia IDE tested with Sandisk Compact Flash and
+IBM microdrive.
+
+###################################
+########     NOTE!!!!!!   #########
+###################################
+If you partition a disk on another system (e.g. laptop),
+all bytes will be swapped on 16bit level when using
+PCMCIA!!!!
+
+This is probably due to an error in Au1000 chip.
+
+Solution:
+
+a) Boot via network and partition disk directly from
+dbau1x00. The endian will then be correct.
+
+b) Partition disk on "laptop" and fill it with all files
+you need. Then write a simple program that endian swaps
+whole disk,
+
+Example:
+Original "laptop" byte order:
+B0 B1 B2 B3 B4 B5 B6 B7 B8 B9...
+
+Dbau1000 byte order will then be:
+B1 B0 B3 B2 B5 B4 B7 B6 B9 B8...
--- a/board/dbau1x00/config.mk
+++ b/board/dbau1x00/config.mk
@@ -0,0 +1,32 @@
+#
+# (C) Copyright 2003
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+#
+# AMD development board AMD Alchemy DbAu1x00, MIPS32 core
+#
+
+# ROM version
+TEXT_BASE = 0xbfc00000
+
+# RAM version
+#TEXT_BASE = 0x80100000
--- a/board/dbau1x00/dbau1x00.c
+++ b/board/dbau1x00/dbau1x00.c
@@ -0,0 +1,110 @@
+/*
+ * (C) Copyright 2003
+ * Thomas.Lange@corelatus.se
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <command.h>
+#include <asm/au1x00.h>
+#include <asm/mipsregs.h>
+
+long int initdram(int board_type)
+{
+	/* Sdram is setup by assembler code */
+	/* If memory could be changed, we should return the true value here */
+	return 64*1024*1024;
+}
+
+#define BCSR_PCMCIA_PC0DRVEN		0x0010
+#define BCSR_PCMCIA_PC0RST		0x0080
+
+/* In cpu/mips/cpu.c */
+void write_one_tlb( int index, u32 pagemask, u32 hi, u32 low0, u32 low1 );
+
+int checkboard (void)
+{
+	u16 status;
+	volatile u32 *pcmcia_bcsr = (u32*)(DB1000_BCSR_ADDR+0x10);
+	volatile u32 *phy = (u32*)(DB1000_BCSR_ADDR+0xC);
+	volatile u32 *sys_counter = (volatile u32*)SYS_COUNTER_CNTRL;
+	u32 proc_id;
+
+	*sys_counter = 0x100; /* Enable 32 kHz oscillator for RTC/TOY */
+
+	proc_id = read_32bit_cp0_register(CP0_PRID);
+
+	switch(proc_id>>24){
+	case 0:
+	  puts("Board: Merlot (DbAu1000)\n");
+	  printf("CPU: Au1000 396 MHz, id: 0x%02x, rev: 0x%02x\n",
+		 (proc_id>>8)&0xFF,proc_id&0xFF);
+	  break;
+	default:
+	  printf("Unsupported cpu %d, proc_id=0x%x\n",proc_id>>24,proc_id);
+	}
+#ifdef CONFIG_IDE_PCMCIA
+	/* Enable 3.3 V on slot 0 ( VCC )
+	   No 5V */
+	status = 4;
+	*pcmcia_bcsr = status;
+
+	status |= BCSR_PCMCIA_PC0DRVEN;
+	*pcmcia_bcsr = status;
+	au_sync();
+
+	udelay(300*1000);
+
+	status |= BCSR_PCMCIA_PC0RST;
+	*pcmcia_bcsr = status;
+	au_sync();
+
+	udelay(100*1000);
+
+	/* PCMCIA is on a 36 bit physical address.
+	   We need to map it into a 32 bit addresses */
+
+#if 0
+	/* We dont need theese unless we run whole pcmcia package */
+	write_one_tlb(20,                 /* index */
+		      0x01ffe000,         /* Pagemask, 16 MB pages */
+		      CFG_PCMCIA_IO_BASE, /* Hi */
+		      0x3C000017,         /* Lo0 */
+		      0x3C200017);        /* Lo1 */
+
+	write_one_tlb(21,                   /* index */
+		      0x01ffe000,           /* Pagemask, 16 MB pages */
+		      CFG_PCMCIA_ATTR_BASE, /* Hi */
+		      0x3D000017,           /* Lo0 */
+		      0x3D200017);          /* Lo1 */
+#endif
+	write_one_tlb(22,                   /* index */
+		      0x01ffe000,           /* Pagemask, 16 MB pages */
+		      CFG_PCMCIA_MEM_ADDR,  /* Hi */
+		      0x3E000017,           /* Lo0 */
+		      0x3E200017);          /* Lo1 */
+
+	/* Release reset of ethernet PHY chips */
+	/* Always do this, because linux does not know about it */
+	*phy = 3;
+
+	return 0;
+#endif
+}
--- a/board/dbau1x00/flash.c
+++ b/board/dbau1x00/flash.c
@@ -0,0 +1,43 @@
+/*
+ * (C) Copyright 2003
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+
+flash_info_t flash_info[CFG_MAX_FLASH_BANKS];	/* info for FLASH chips */
+
+/*-----------------------------------------------------------------------
+ * flash_init()
+ *
+ * sets up flash_info and returns size of FLASH (bytes)
+ */
+unsigned long flash_init (void)
+{
+	printf ("Skipping flash_init\n");
+	return (0);
+}
+
+int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
+{
+	printf ("write_buff not implemented\n");
+	return (-1);
+}
--- a/board/dbau1x00/memsetup.S
+++ b/board/dbau1x00/memsetup.S
@@ -0,0 +1,118 @@
+/* Memory sub-system initialization code */
+
+#include <config.h>
+#include <version.h>
+#include <asm/regdef.h>
+#include <asm/au1x00.h>
+
+	.globl	memsetup
+memsetup:
+	/* First setup pll:s to make serial work ok */
+	/* We have a 12 MHz crystal */
+	li              t0, SYS_CPUPLL
+	li              t1, 0x21 /* 396 MHz */
+	sw              t1, 0(t0)
+	sync
+	nop
+
+	/* Setup AUX PLL */
+	li              t0, SYS_AUXPLL
+	li              t1, 8 /* 96 MHz */
+	sw              t1, 0(t0) /* aux pll */
+	sync
+
+/* SDCS 0,1 SDRAM */
+	li		t0, MEM_SDMODE0
+	li		t1, 0x005522AA
+	sw		t1, 0(t0)
+
+	li              t0, MEM_SDMODE1
+	li		t1, 0x005522AA
+	sw		t1, 0(t0)
+
+	li              t0, MEM_SDADDR0
+	li		t1, 0x001003F8
+	sw		t1, 0(t0)
+
+
+	li              t0, MEM_SDADDR1
+	li		t1, 0x001023F8
+	sw		t1, 0(t0)
+	sync
+
+	li              t0, MEM_SDREFCFG
+	li		t1, 0x64000C24 /* Disable */
+	sw		t1, 0(t0)
+	sync
+
+	li              t0, MEM_SDPRECMD
+	sw		zero, 0(t0)
+	sync
+
+	li              t0, MEM_SDAUTOREF
+	sw		zero, 0(t0)
+	sync
+	sw		zero, 0(t0)
+	sync
+
+	li              t0, MEM_SDREFCFG
+	li		t1, 0x66000C24 /* Enable */
+	sw		t1, 0(t0)
+	sync
+
+	li              t0, MEM_SDWRMD0
+	li		t1, 0x00000033
+	sw		t1, 0(t0)
+	sync
+
+	li              t0, MEM_SDWRMD1
+	li		t1, 0x00000033
+	sw		t1, 0(t0)
+	sync
+
+	/*  Static memory controller */
+
+	/* RCE0 AMD 29LV640M MirrorBit Flash */
+	li              t0, MEM_STCFG0
+	li		t1, 0x00000003
+	sw		t1, 0(t0)
+
+	li		t0, MEM_STTIME0
+	li		t1, 0x22080b20
+	sw		t1, 0(t0)
+
+	li		t0, MEM_STADDR0
+	li		t1, 0x11E03F80
+	sw		t1, 0(t0)
+
+	/* RCE1 CPLD Board Logic */
+	li		t0, MEM_STCFG1
+	li		t1, 0x00000080
+	sw		t1, 0(t0)
+
+	li		t0, MEM_STTIME1
+	li		t1, 0x22080a20
+	sw		t1, 0(t0)
+
+	li		t0, MEM_STADDR1
+	li		t1, 0x10c03f00
+	sw		t1, 0(t0)
+
+	/* RCE3 PCMCIA 250ns */
+	li		t0, MEM_STCFG3
+	li		t1, 0x00000002
+	sw		t1, 0(t0)
+
+
+	li		t0, MEM_STTIME3
+	li		t1, 0x280E3E07
+	sw		t1, 0(t0)
+
+	li		t0, MEM_STADDR3
+	li		t1, 0x10000000
+	sw		t1, 0(t0)
+
+	sync
+
+	j	ra
+	nop
--- a/board/dbau1x00/u-boot.lds
+++ b/board/dbau1x00/u-boot.lds
@@ -1,6 +1,6 @@
 /*
 * (C) Copyright 2003
- * Marc Singer, elf@buici.com
+ * Wolfgang Denk Engineering, <wd@denx.de>
 *
 * See file CREDITS for list of people who contributed to this
 * project.
@@ -22,31 +22,47 @@
 */

 /*
- * Memory Functions
- */
-#ifndef	_CMD_PORTIO_H
-#define _CMD_PORTIO_H
+OUTPUT_FORMAT("elf32-bigmips", "elf32-bigmips", "elf32-bigmips")
+*/
+OUTPUT_FORMAT("elf32-tradbigmips", "elf32-tradbigmips", "elf32-tradbigmips")
+OUTPUT_ARCH(mips)
+ENTRY(_start)
+SECTIONS
+{
+	. = 0x00000000;

-#if (CONFIG_COMMANDS & CFG_CMD_PORTIO)
+	. = ALIGN(4);
+	.text       :
+	{
+	  *(.text)
+	}

-#define CMD_TBL_PORTIO_OUT	MK_CMD_TBL_ENTRY(		      \
-	"out",		3,	3,	1,	do_portio_out,	      \
-	"out     - write datum to IO port\n",			      \
-	"[.b, .w, .l] port value\n    - output to IO port\n"   	      \
-),
-#define CMD_TBL_PORTIO_IN	MK_CMD_TBL_ENTRY(		      \
- 	"in",		2,	2,	1,	do_portio_in,	      \
-	"in      - read data from an IO port\n",		      \
-	"[.b, .w, .l] port\n"					      \
-	"    - read datum from IO port\n"			      \
-),
+	. = ALIGN(4);
+	.rodata  : { *(.rodata) }

-int do_portio_out (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
-int do_portio_in  (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
+	. = ALIGN(4);
+	.data  : { *(.data) }

-#else
-#define CMD_TBL_PORTIO_OUT
-#define CMD_TBL_PORTIO_IN
-#endif	/* CFG_CMD_PORTIO */
+	. = ALIGN(4);
+	.sdata  : { *(.sdata) }

-#endif	/* _CMD_PORTIO_H */
+	_gp = ALIGN(16);
+
+	__got_start = .;
+	.got  : { *(.got) }
+	__got_end = .;
+
+	.sdata  : { *(.sdata) }
+
+	__u_boot_cmd_start = .;
+	.u_boot_cmd : { *(.u_boot_cmd) }
+	__u_boot_cmd_end = .;
+
+	uboot_end_data = .;
+	num_got_entries = (__got_end - __got_start) >> 2;
+
+	. = ALIGN(4);
+	.sbss  : { *(.sbss) }
+	.bss  : { *(.bss) }
+	uboot_end = .;
+}
--- a/board/dk1c20/Makefile
+++ b/board/dk1c20/Makefile
@@ -0,0 +1,48 @@
+#
+# (C) Copyright 2001
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB	= lib$(BOARD).a
+
+OBJS	:= $(BOARD).o flash.o
+
+SOBJS  = vectors.o
+
+$(LIB):	$(OBJS) $(SOBJS)
+	$(AR) crv $@ $^
+
+clean:
+	rm -f $(SOBJS) $(OBJS)
+
+distclean:	clean
+	rm -f $(LIB) core *.bak .depend
+
+#########################################################################
+
+.depend:	Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
+		$(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
+
+-include .depend
+
+#########################################################################
--- a/board/dk1c20/config.mk
+++ b/board/dk1c20/config.mk
@@ -0,0 +1,29 @@
+#
+# (C) Copyright 2003
+# Psyent Corporation
+# Scott McNutt <smcnutt@psyent.com>
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+TEXT_BASE = 0x018c0000
+
+ifeq ($(debug),1)
+PLATFORM_CPPFLAGS += -DDEBUG
+endif
--- a/board/dk1c20/dk1c20.c
+++ b/board/dk1c20/dk1c20.c
@@ -0,0 +1,45 @@
+/*
+ * (C) Copyright 2003, Psyent Corporation <www.psyent.com>
+ * Scott McNutt <smcnutt@psyent.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+
+void _default_hdlr (void)
+{
+	printf ("default_hdlr\n");
+}
+
+int board_pre_init (void)
+{
+	return 0;
+}
+
+int checkboard (void)
+{
+	puts ("Board: Altera Nios 1C20 Development Kit\n");
+	return 0;
+}
+
+long int initdram (int board_type)
+{
+	return (0);
+}
--- a/board/dk1c20/flash.c
+++ b/board/dk1c20/flash.c
@@ -0,0 +1,226 @@
+/*
+ * (C) Copyright 2000
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+
+#include <common.h>
+#include <nios.h>
+
+/*---------------------------------------------------------------------*/
+#define BANKSZ	(8 * 1024 * 1024)
+#define SECTSZ	(64 * 1024)
+#define USERFLASH (2 * 1024 * 1024)	/* bottom 2 MB for user */
+
+flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
+
+#define FLASH_WORD_SIZE unsigned char
+
+/*---------------------------------------------------------------------*/
+
+unsigned long flash_init (void)
+{
+	int i;
+	unsigned long addr;
+	flash_info_t *fli = &flash_info[0];
+
+	fli->size = BANKSZ;
+	fli->sector_count = CFG_MAX_FLASH_SECT;
+	fli->flash_id = FLASH_MAN_AMD;
+
+	addr = CFG_FLASH_BASE;
+	for (i = 0; i < fli->sector_count; ++i) {
+		fli->start[i] = addr;
+		addr += SECTSZ;
+
+		/* Protect all but 2 MByte user area */
+		if (addr < (CFG_FLASH_BASE + USERFLASH))
+			fli->protect[i] = 0;
+		else
+			fli->protect[i] = 1;
+	}
+
+	return (BANKSZ);
+}
+
+/*--------------------------------------------------------------------*/
+void flash_print_info (flash_info_t * info)
+{
+	int i, k;
+	unsigned long size;
+	int erased;
+	volatile unsigned char *flash;
+
+	printf ("  Size: %ld KB in %d Sectors\n",
+		info->size >> 10, info->sector_count);
+	printf ("  Sector Start Addresses:");
+	for (i = 0; i < info->sector_count; ++i) {
+
+		/* Check if whole sector is erased */
+		if (i != (info->sector_count - 1))
+			size = info->start[i + 1] - info->start[i];
+		else
+			size = info->start[0] + info->size - info->start[i];
+		erased = 1;
+		flash = (volatile unsigned char *) info->start[i];
+		for (k = 0; k < size; k++) {
+			if (*flash++ != 0xff) {
+				erased = 0;
+				break;
+			}
+		}
+
+		/* Print the info */
+		if ((i % 5) == 0)
+			printf ("\n   ");
+		printf (" %08lX%s%s", info->start[i], erased ? " E" : "  ",
+			info->protect[i] ? "RO " : "   ");
+	}
+	printf ("\n");
+}
+
+/*-------------------------------------------------------------------*/
+
+
+int flash_erase (flash_info_t * info, int s_first, int s_last)
+{
+	volatile FLASH_WORD_SIZE *addr = (FLASH_WORD_SIZE *) (info->start[0]);
+	volatile FLASH_WORD_SIZE *addr2;
+	int prot, sect;
+	int any = 0;
+	unsigned oldpri;
+	ulong start;
+
+	/* Some sanity checking */
+	if ((s_first < 0) || (s_first > s_last)) {
+		printf ("- no sectors to erase\n");
+		return 1;
+	}
+
+	prot = 0;
+	for (sect = s_first; sect <= s_last; ++sect) {
+		if (info->protect[sect]) {
+			prot++;
+		}
+	}
+	if (prot) {
+		printf ("- Warning: %d protected sectors will not be erased!\n",
+			prot);
+	} else {
+		printf ("\n");
+	}
+
+	/* NOTE: disabling interrupts on Nios can be very bad since it
+	 * also disables the LO_LIMIT exception. It's better here to
+	 * set the interrupt priority to 3 & restore it when we're done.
+	 */
+	oldpri = ipri (3);
+
+	/* It's ok to erase multiple sectors provided we don't delay more
+	 * than 50 usec between cmds ... at which point the erase time-out
+	 * occurs. So don't go and put printf() calls in the loop ... it
+	 * won't be very helpful ;-)
+	 */
+	for (sect = s_first; sect <= s_last; sect++) {
+		if (info->protect[sect] == 0) {	/* not protected */
+			addr2 = (FLASH_WORD_SIZE *) (info->start[sect]);
+			*addr = 0xaa;
+			*addr = 0x55;
+			*addr = 0x80;
+			*addr = 0xaa;
+			*addr = 0x55;
+			*addr2 = 0x30;
+			any = 1;
+		}
+	}
+
+	/* Now just wait for 0xff & provide some user feedback while
+	 * we wait.
+	 */
+	if (any) {
+		addr2 = (FLASH_WORD_SIZE *) (info->start[sect]);
+		start = get_timer (0);
+		while (*addr2 != 0xff) {
+			udelay (1000 * 1000);
+			putc ('.');
+			if (get_timer (start) > CFG_FLASH_ERASE_TOUT) {
+				printf ("timeout\n");
+				return 1;
+			}
+		}
+		printf ("\n");
+	}
+
+	/* Restore interrupt priority */
+	ipri (oldpri);
+
+	return 0;
+}
+
+/*-----------------------------------------------------------------------
+ * Copy memory to flash, returns:
+ * 0 - OK
+ * 1 - write timeout
+ * 2 - Flash not erased
+ */
+
+int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
+{
+
+	vu_char *cmd = (vu_char *) info->start[0];
+	vu_char *dst = (vu_char *) addr;
+	unsigned char b;
+	unsigned oldpri;
+	ulong start;
+
+	while (cnt) {
+		/* Check for sufficient erase */
+		b = *src;
+		if ((*dst & b) != b) {
+			printf ("%02x : %02x\n", *dst, b);
+			return (2);
+		}
+
+		/* Disable interrupts other than window underflow
+		 * (interrupt priority 2)
+		 */
+		oldpri = ipri (3);
+		*cmd = 0xaa;
+		*cmd = 0x55;
+		*cmd = 0xa0;
+		*dst = b;
+
+		/* Verify write */
+		start = get_timer (0);
+		while (*dst != b) {
+			if (get_timer (start) > CFG_FLASH_WRITE_TOUT) {
+				ipri (oldpri);
+				return 1;
+			}
+		}
+		dst++;
+		src++;
+		cnt--;
+		ipri (oldpri);
+	}
+
+	return (0);
+}
--- a/board/dk1c20/u-boot.lds
+++ b/board/dk1c20/u-boot.lds
@@ -0,0 +1,69 @@
+/*
+ * (C) Copyright 2003, Psyent Corporation <www.psyent.com>
+ * Scott McNutt <smcnutt@psyent.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+
+OUTPUT_FORMAT("elf32-nios")
+OUTPUT_ARCH(nios)
+ENTRY(_start)
+
+SECTIONS
+{
+	.text :
+	{
+	  cpu/nios/start.o (.text)
+	  *(.text)
+	}
+	__text_end = .;
+
+	. = ALIGN(4);
+	.rodata :
+	{
+		*(.rodata)
+	}
+	__rodata_end = .;
+
+	. = ALIGN(4);
+	.data :
+	{
+		*(.data)
+	}
+	. = ALIGN(4);
+	__data_end = .;
+
+	__u_boot_cmd_start = .;
+	.u_boot_cmd :
+	{
+		*(.u_boot_cmd)
+	}
+	. = ALIGN(4);
+	__u_boot_cmd_end = .;
+
+	__bss_start = .;
+	. = ALIGN(4);
+	.bss :
+	{
+		*(.bss)
+	}
+	. = ALIGN(4);
+	__bss_end = .;
+}
--- a/board/dk1c20/vectors.S
+++ b/board/dk1c20/vectors.S
@@ -0,0 +1,122 @@
+/*
+ * (C) Copyright 2003, Psyent Corporation <www.psyent.com>
+ * Scott McNutt <smcnutt@psyent.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+
+/*************************************************************************
+ * Exception Vector Table
+ *
+ * This could have gone in the cpu soure tree, but the whole point of
+ * Nios is customization -- and polluting the cpu source tree with
+ * board-specific ifdef's really defeats the purpose, no? With this in
+ * the board-specific tree, each board has the freedom to organize
+ * vectors/traps, etc anyway it wants. The init code copies this table
+ * to the proper location.
+ *
+ * Each board can do what it likes here. But there are four "standard"
+ * handlers availble:
+ *
+ *	_cwp_lolimit	-Handles register window underflows.
+ *	_cwp_hilimit	-Handles register window overflows.
+ *	_timebase_int	-Increments the timebase.
+ *	_def_xhandler	-Default exception handler.
+ *
+ * _timebase_int handles a Nios Timer interrupt and increments the
+ * timestamp used for the get_timer(), reset_timer(), etc. routines. It
+ * expects the timer to be configured like the standard-32 low priority
+ * timer.
+ *
+ * _def_xhandler dispatches exceptions/traps via the external_interrupt()
+ * routine. This lets you use the irq_install_handler() and handle your
+ * interrupts/traps with code written in C.
+ ************************************************************************/
+
+	.data
+	.global _vectors
+	.align	4
+_vectors:
+
+	.long	_def_xhandler@h		/* Vector 0  - NMI */
+	.long	_cwp_lolimit@h		/* Vector 1  -  underflow */
+	.long	_cwp_hilimit@h		/* Vector 2  - overflow	*/
+
+	.long	_def_xhandler@h		/* Vector 3 - GNUPro debug */
+	.long	_def_xhandler@h		/* Vector 4 - GNUPro debug */
+	.long	_def_xhandler@h		/* Vector 5 - GNUPro debug */
+	.long	_def_xhandler@h		/* Vector 6 - future reserved */
+	.long	_def_xhandler@h		/* Vector 7 - future reserved */
+	.long	_def_xhandler@h		/* Vector 8 - future reserved */
+	.long	_def_xhandler@h		/* Vector 9 - future reserved */
+	.long	_def_xhandler@h		/* Vector 10 - future reserved */
+	.long	_def_xhandler@h		/* Vector 11 - future reserved */
+	.long	_def_xhandler@h		/* Vector 12 - future reserved */
+	.long	_def_xhandler@h		/* Vector 13 - future reserved */
+	.long	_def_xhandler@h		/* Vector 14 - future reserved */
+	.long	_def_xhandler@h		/* Vector 15 - future reserved */
+	.long	_def_xhandler@h		/* Vector 16 */
+	.long	_def_xhandler@h		/* Vector 17 */
+	.long	_def_xhandler@h		/* Vector 18 */
+	.long	_def_xhandler@h		/* Vector 19 */
+	.long	_def_xhandler@h		/* Vector 20 */
+	.long	_def_xhandler@h		/* Vector 21 */
+	.long	_def_xhandler@h		/* Vector 22 */
+	.long	_def_xhandler@h		/* Vector 23 */
+	.long	_def_xhandler@h		/* Vector 24 */
+	.long	_def_xhandler@h		/* Vector 25 */
+	.long	_def_xhandler@h		/* Vector 26 */
+	.long	_def_xhandler@h		/* Vector 27 */
+	.long	_def_xhandler@h		/* Vector 28 */
+	.long	_def_xhandler@h		/* Vector 29 */
+	.long	_def_xhandler@h		/* Vector 30 */
+	.long	_def_xhandler@h		/* Vector 31 */
+	.long	_def_xhandler@h		/* Vector 32 */
+	.long	_def_xhandler@h		/* Vector 33 */
+	.long	_def_xhandler@h		/* Vector 34 */
+	.long	_def_xhandler@h		/* Vector 35 */
+	.long	_def_xhandler@h		/* Vector 36 */
+	.long	_def_xhandler@h		/* Vector 37 */
+	.long	_def_xhandler@h		/* Vector 38 */
+	.long	_def_xhandler@h		/* Vector 39 */
+	.long	_def_xhandler@h		/* Vector 40 */
+	.long	_def_xhandler@h		/* Vector 41 */
+	.long	_def_xhandler@h		/* Vector 42 */
+	.long	_def_xhandler@h		/* Vector 43 */
+	.long	_def_xhandler@h		/* Vector 44 */
+	.long	_def_xhandler@h		/* Vector 45 */
+	.long	_def_xhandler@h		/* Vector 46 */
+	.long	_def_xhandler@h		/* Vector 47 */
+	.long	_def_xhandler@h		/* Vector 48 */
+	.long	_def_xhandler@h		/* Vector 49 */
+	.long	_timebase_int@h		/* Vector 50 - lopri timer*/
+	.long	_def_xhandler@h		/* Vector 51 */
+	.long	_def_xhandler@h		/* Vector 52 */
+	.long	_def_xhandler@h		/* Vector 53 */
+	.long	_def_xhandler@h		/* Vector 54 */
+	.long	_def_xhandler@h		/* Vector 55 */
+	.long	_def_xhandler@h		/* Vector 56 */
+	.long	_def_xhandler@h		/* Vector 57 */
+	.long	_def_xhandler@h		/* Vector 58 */
+	.long	_def_xhandler@h		/* Vector 59 */
+	.long	_def_xhandler@h		/* Vector 60 */
+	.long	_def_xhandler@h		/* Vector 61 */
+	.long	_def_xhandler@h		/* Vector 62 */
+	.long	_def_xhandler@h		/* Vector 63 */
--- a/board/dnp1110/flash.c
+++ b/board/dnp1110/flash.c
@@ -74,7 +74,7 @@ unsigned long flash_init (void)
 		 flash_get_offsets(PHYS_FLASH_1, &flash_info[i]);
 		break;
 	   default:
-		panic("configured to many flash banks!\n");
+		panic("configured too many flash banks!\n");
 		break;
 	}
 	size += flash_info[i].size;
--- a/board/eltec/bab7xx/bab7xx.c
+++ b/board/eltec/bab7xx/bab7xx.c
@@ -173,7 +173,7 @@ void after_reloc (ulong dest_addr)
    /*
     * Jump to the main U-Boot board init code
     */
-    board_init_r(gd, dest_addr);
+    board_init_r((gd_t *)gd, dest_addr);
 }

 /* ------------------------------------------------------------------------- */
--- a/board/eltec/elppc/elppc.c
+++ b/board/eltec/elppc/elppc.c
@@ -142,7 +142,7 @@ void after_reloc (ulong dest_addr)
 	/*
 	 * Jump to the main U-Boot board init code
 	 */
-	board_init_r (gd, dest_addr);
+	board_init_r ((gd_t *)gd, dest_addr);
 }

 /* ------------------------------------------------------------------------- */
--- a/board/eltec/mhpc/mhpc.c
+++ b/board/eltec/mhpc/mhpc.c
@@ -254,7 +254,7 @@ long int initdram (int board_type)
    upmconfig(UPMA, (uint *)sdram_table, sizeof(sdram_table)/sizeof(uint));

    memctl->memc_mamr  = CFG_MAMR & (~(MAMR_PTAE)); /* no refresh yet */
-    memctl->memc_mbmr  = MAMR_GPL_B4DIS;
+    memctl->memc_mbmr  = MBMR_GPL_B4DIS;	/* should this be mamr? - NTL */
    memctl->memc_mptpr = MPTPR_PTP_DIV64;
    memctl->memc_mar   = 0x00008800;

--- a/board/ep7312/flash.c
+++ b/board/ep7312/flash.c
@@ -50,7 +50,7 @@ ulong flash_init (void)
 		if (i == 0)
 			flashbase = PHYS_FLASH_1;
 		else
-			panic ("configured to many flash banks!\n");
+			panic ("configured too many flash banks!\n");
 		for (j = 0; j < flash_info[i].sector_count; j++) {
 			flash_info[i].start[j] = flashbase + j * MAIN_SECT_SIZE;
 		}
--- a/board/esd/ar405/fpgadata.c
+++ b/board/esd/ar405/fpgadata.c
@@ -8,7 +8,7 @@
 0x03,0x07,0x02,0x09,0x04,0x04,0x04,0x04,0x0e,0x04,0x04,0x09,0x03,0x07,0x02,0x04,
 0x03,0x03,0x03,0x07,0xe5,0x01,0x0d,0x02,0x02,0x03,0x02,0x02,0x03,0x02,0x02,0x03,
 0x19,0x03,0x02,0x02,0x03,0x02,0x08,0x09,0x07,0x13,0x03,0x11,0x02,0x06,0x03,0x05,
- 0x03,0x05,0x11,0x1d,0x1f,0x13,0x10,0x01,0x01,0xe2,0x4c,0xe5,0x01,0x0a,0x04,0x01,
+ 0x03,0x05,0x11,0x1d,0x1f,0x13,0x10,0x01,0x01,0xe3,0x4c,0xe5,0x01,0x0a,0x04,0x01,
 0xe5,0x05,0x01,0xe5,0x05,0x01,0xe5,0x05,0x09,0x04,0x04,0x02,0x06,0x01,0xe5,0x05,
 0x01,0x02,0x04,0x04,0x04,0x09,0x09,0x09,0x09,0x04,0x06,0x01,0x07,0x09,0x04,0x04,
 0x09,0x06,0x02,0x09,0x09,0x04,0x01,0xe7,0x03,0x04,0x07,0xe6,0x08,0x09,0x09,0x0e,
@@ -16,7 +16,7 @@
 0x03,0x05,0xe5,0x07,0xe5,0x01,0x05,0x0b,0xe5,0x07,0xe5,0x07,0x09,0x03,0x05,0xe6,
 0xe5,0x04,0xe5,0x01,0x05,0xe5,0x01,0x05,0xe5,0xe6,0x04,0x03,0x05,0xe5,0xe6,0x04,
 0xe5,0x07,0x03,0x05,0xe5,0x07,0x0b,0x01,0x0e,0x05,0x03,0x05,0x03,0x05,0x1d,0x03,
- 0x05,0x03,0x44,0xe5,0xe5,0x2e,0x1c,0x01,0x13,0x32,0x01,0xe2,0x4d,0xe5,0x0f,0x09,
+ 0x05,0x03,0x44,0xe5,0xe5,0x2e,0x1c,0x01,0x13,0x32,0x01,0xe3,0x4d,0xe5,0x0f,0x09,
 0x09,0x27,0x09,0x42,0x04,0x4a,0x44,0x01,0x01,0x01,0x12,0x09,0x09,0x01,0x06,0x01,
 0x12,0x09,0x0a,0x09,0x11,0x21,0x13,0x11,0x15,0x1d,0x1b,0x0c,0x0d,0x03,0x03,0x01,
 0x31,0x31,0x47,0x81,0xe5,0xe5,0xe5,0x77,0x3e,0xe5,0x19,0xe5,0x1b,0x3b,0xe5,0xe5,
@@ -2727,10 +2727,10 @@
 0x01,0x03,0x03,0x05,0x03,0x09,0xe5,0x07,0x09,0x09,0x01,0x07,0x09,0x07,0x01,0x09,
 0x09,0x0d,0x01,0x01,0x04,0x27,0x39,0x25,0x09,0x0b,0x09,0x09,0x02,0xe5,0x0e,0x02,
 0x07,0x0b,0x1d,0x2e,0xe5,0xe6,0x50,0xe5,0x1b,0x13,0x04,0x04,0x04,0x06,0x04,0x09,
- 0x04,0x04,0x13,0x0e,0x13,0x1d,0x27,0xe7,0x21,0xc6,0x40,0x03,0x03,0x07,0xe2,0x09,
+ 0x04,0x04,0x13,0x0e,0x13,0x1d,0x27,0xe7,0x21,0xc6,0x40,0x03,0x03,0x07,0xe3,0x09,
 0x3a,0x03,0x07,0x29,0x1f,0x25,0x0b,0x3b,0x15,0xe5,0x2d,0x01,0x27,0xe7,0x6e,0x16,
 0x05,0xe5,0x01,0x05,0x02,0x02,0x05,0x03,0x05,0xe5,0x01,0x05,0x0d,0x05,0x5c,0x06,
- 0x01,0x01,0x05,0x93,0x59,0x34,0x05,0xe5,0x01,0x04,0xe5,0xe2,0x34,0x10,0x02,0xe5,
+ 0x01,0x01,0x05,0x93,0x59,0x34,0x05,0xe5,0x01,0x04,0xe5,0xe3,0x34,0x10,0x02,0xe5,
 0x13,0x09,0x09,0x09,0x09,0x09,0x09,0x09,0x09,0x09,0x09,0x09,0x09,0x09,0x0b,0x09,
 0x09,0x09,0x09,0x09,0x09,0x09,0x09,0xe6,0x06,0x09,0x09,0x09,0x03,0x05,0x0a,0xe5,
 0xe5,0x04,0x09,0x08,0xe5,0x07,0xe5,0x08,0x08,0xe5,0x07,0xe5,0x07,0xe5,0x07,0xe5,
@@ -2747,4 +2747,4 @@
 0x05,0x02,0x02,0x03,0x02,0x02,0x03,0x02,0x02,0x01,0x07,0x03,0x02,0x02,0x02,0x04,
 0x02,0x01,0x04,0x02,0x01,0x02,0x01,0x02,0x01,0x01,0xe5,0x05,0x04,0x03,0x07,0xe5,
 0xe5,0x03,0x04,0x04,0x0b,0x02,0xe5,0x01,0xe5,0x01,0xe5,0xff,0xff,0xff,0xff,0xff,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+ 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
--- a/board/esd/ash405/ash405.c
+++ b/board/esd/ash405/ash405.c
@@ -67,7 +67,7 @@ int board_pre_init (void)
 	mtdcr(uicsr, 0xFFFFFFFF);       /* clear all ints */
 	mtdcr(uicer, 0x00000000);       /* disable all ints */
 	mtdcr(uiccr, 0x00000000);       /* set all to be non-critical*/
-	mtdcr(uicpr, 0xFFFFFF81);       /* set int polarities */
+	mtdcr(uicpr, 0xFFFFFF9F);       /* set int polarities */
 	mtdcr(uictr, 0x10000000);       /* set int trigger levels */
 	mtdcr(uicvcr, 0x00000001);      /* set vect base=0,INT0 highest priority*/
 	mtdcr(uicsr, 0xFFFFFFFF);       /* clear all ints */
@@ -246,7 +246,6 @@ void nand_init(void)
 {
 	nand_probe(CFG_NAND_BASE);
 	if (nand_dev_desc[0].ChipID != NAND_ChipID_UNKNOWN) {
-		puts("NAND:  ");
 		print_size(nand_dev_desc[0].totlen, "\n");
 	}
 }
--- a/board/esd/ash405/fpgadata.c
+++ b/board/esd/ash405/fpgadata.c
--- a/board/esd/common/xilinx_jtag/lenval.c
+++ b/board/esd/common/xilinx_jtag/lenval.c
@@ -0,0 +1,217 @@
+/*
+ * (C) Copyright 2003
+ * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*******************************************************/
+/* file: lenval.c                                      */
+/* abstract:  This file contains routines for using    */
+/*            the lenVal data structure.               */
+/*******************************************************/
+
+#include <common.h>
+#include <asm/processor.h>
+
+#include "lenval.h"
+#include "ports.h"
+
+
+/*****************************************************************************
+ * Function:     value
+ * Description:  Extract the long value from the lenval array.
+ * Parameters:   plvValue    - ptr to lenval.
+ * Returns:      long        - the extracted value.
+ *****************************************************************************/
+long value( lenVal*     plvValue )
+{
+	long    lValue;         /* result to hold the accumulated result */
+	short   sIndex;
+
+	lValue  = 0;
+	for ( sIndex = 0; sIndex < plvValue->len ; ++sIndex )
+	{
+		lValue <<= 8;                       /* shift the accumulated result */
+		lValue |= plvValue->val[ sIndex];   /* get the last byte first */
+	}
+
+	return( lValue );
+}
+
+/*****************************************************************************
+ * Function:     initLenVal
+ * Description:  Initialize the lenval array with the given value.
+ *               Assumes lValue is less than 256.
+ * Parameters:   plv         - ptr to lenval.
+ *               lValue      - the value to set.
+ * Returns:      void.
+ *****************************************************************************/
+void initLenVal( lenVal*    plv,
+		 long       lValue )
+{
+	plv->len    = 1;
+	plv->val[0] = (unsigned char)lValue;
+}
+
+/*****************************************************************************
+ * Function:     EqualLenVal
+ * Description:  Compare two lenval arrays with an optional mask.
+ * Parameters:   plvTdoExpected  - ptr to lenval #1.
+ *               plvTdoCaptured  - ptr to lenval #2.
+ *               plvTdoMask      - optional ptr to mask (=0 if no mask).
+ * Returns:      short   - 0 = mismatch; 1 = equal.
+ *****************************************************************************/
+short EqualLenVal( lenVal*  plvTdoExpected,
+		   lenVal*  plvTdoCaptured,
+		   lenVal*  plvTdoMask )
+{
+	short           sEqual;
+	short           sIndex;
+	unsigned char   ucByteVal1;
+	unsigned char   ucByteVal2;
+	unsigned char   ucByteMask;
+
+	sEqual  = 1;
+	sIndex  = plvTdoExpected->len;
+
+	while ( sEqual && sIndex-- )
+	{
+		ucByteVal1  = plvTdoExpected->val[ sIndex ];
+		ucByteVal2  = plvTdoCaptured->val[ sIndex ];
+		if ( plvTdoMask )
+		{
+			ucByteMask  = plvTdoMask->val[ sIndex ];
+			ucByteVal1  &= ucByteMask;
+			ucByteVal2  &= ucByteMask;
+		}
+		if ( ucByteVal1 != ucByteVal2 )
+		{
+			sEqual  = 0;
+		}
+	}
+
+	return( sEqual );
+}
+
+
+/*****************************************************************************
+ * Function:     RetBit
+ * Description:  return the (byte, bit) of lv (reading from left to right).
+ * Parameters:   plv     - ptr to lenval.
+ *               iByte   - the byte to get the bit from.
+ *               iBit    - the bit number (0=msb)
+ * Returns:      short   - the bit value.
+ *****************************************************************************/
+short RetBit( lenVal*   plv,
+	      int       iByte,
+	      int       iBit )
+{
+	/* assert( ( iByte >= 0 ) && ( iByte < plv->len ) ); */
+	/* assert( ( iBit >= 0 ) && ( iBit < 8 ) ); */
+	return( (short)( ( plv->val[ iByte ] >> ( 7 - iBit ) ) & 0x1 ) );
+}
+
+/*****************************************************************************
+ * Function:     SetBit
+ * Description:  set the (byte, bit) of lv equal to val
+ * Example:      SetBit("00000000",byte, 1) equals "01000000".
+ * Parameters:   plv     - ptr to lenval.
+ *               iByte   - the byte to get the bit from.
+ *               iBit    - the bit number (0=msb).
+ *               sVal    - the bit value to set.
+ * Returns:      void.
+ *****************************************************************************/
+void SetBit( lenVal*    plv,
+	     int        iByte,
+	     int        iBit,
+	     short      sVal )
+{
+	unsigned char   ucByteVal;
+	unsigned char   ucBitMask;
+
+	ucBitMask   = (unsigned char)(1 << ( 7 - iBit ));
+	ucByteVal   = (unsigned char)(plv->val[ iByte ] & (~ucBitMask));
+
+	if ( sVal )
+	{
+		ucByteVal   |= ucBitMask;
+	}
+	plv->val[ iByte ]   = ucByteVal;
+}
+
+/*****************************************************************************
+ * Function:     AddVal
+ * Description:  add val1 to val2 and store in resVal;
+ *               assumes val1 and val2  are of equal length.
+ * Parameters:   plvResVal   - ptr to result.
+ *               plvVal1     - ptr of addendum.
+ *               plvVal2     - ptr of addendum.
+ * Returns:      void.
+ *****************************************************************************/
+void addVal( lenVal*    plvResVal,
+	     lenVal*    plvVal1,
+	     lenVal*    plvVal2 )
+{
+	unsigned char   ucCarry;
+	unsigned short  usSum;
+	unsigned short  usVal1;
+	unsigned short  usVal2;
+	short           sIndex;
+
+	plvResVal->len  = plvVal1->len;         /* set up length of result */
+
+	/* start at least significant bit and add bytes    */
+	ucCarry = 0;
+	sIndex  = plvVal1->len;
+	while ( sIndex-- )
+	{
+		usVal1  = plvVal1->val[ sIndex ];   /* i'th byte of val1 */
+		usVal2  = plvVal2->val[ sIndex ];   /* i'th byte of val2 */
+
+		/* add the two bytes plus carry from previous addition */
+		usSum   = (unsigned short)( usVal1 + usVal2 + ucCarry );
+
+		/* set up carry for next byte */
+		ucCarry = (unsigned char)( ( usSum > 255 ) ? 1 : 0 );
+
+		/* set the i'th byte of the result */
+		plvResVal->val[ sIndex ]    = (unsigned char)usSum;
+	}
+}
+
+/*****************************************************************************
+ * Function:     readVal
+ * Description:  read from XSVF numBytes bytes of data into x.
+ * Parameters:   plv         - ptr to lenval in which to put the bytes read.
+ *               sNumBytes   - the number of bytes to read.
+ * Returns:      void.
+ *****************************************************************************/
+void readVal( lenVal*   plv,
+	      short     sNumBytes )
+{
+	unsigned char*  pucVal;
+
+	plv->len    = sNumBytes;        /* set the length of the lenVal        */
+	for ( pucVal = plv->val; sNumBytes; --sNumBytes, ++pucVal )
+	{
+		/* read a byte of data into the lenVal */
+		readByte( pucVal );
+	}
+}
--- a/board/esd/common/xilinx_jtag/lenval.h
+++ b/board/esd/common/xilinx_jtag/lenval.h
@@ -0,0 +1,79 @@
+/*
+ * (C) Copyright 2003
+ * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*******************************************************/
+/* file: lenval.h                                      */
+/* abstract:  This file contains a description of the  */
+/*            data structure "lenval".                 */
+/*******************************************************/
+
+#ifndef lenval_dot_h
+#define lenval_dot_h
+
+/* the lenVal structure is a byte oriented type used to store an */
+/* arbitrary length binary value. As an example, the hex value   */
+/* 0x0e3d is represented as a lenVal with len=2 (since 2 bytes   */
+/* and val[0]=0e and val[1]=3d.  val[2-MAX_LEN] are undefined    */
+
+/* maximum length (in bytes) of value to read in        */
+/* this needs to be at least 4, and longer than the     */
+/* length of the longest SDR instruction.  If there is, */
+/* only 1 device in the chain, MAX_LEN must be at least */
+/* ceil(27/8) == 4.  For 6 devices in a chain, MAX_LEN  */
+/* must be 5, for 14 devices MAX_LEN must be 6, for 20  */
+/* devices MAX_LEN must be 7, etc..                     */
+/* You can safely set MAX_LEN to a smaller number if you*/
+/* know how many devices will be in your chain.         */
+#define MAX_LEN 7000
+
+
+typedef struct var_len_byte
+{
+	short len;   /* number of chars in this value */
+	unsigned char val[MAX_LEN+1];  /* bytes of data */
+} lenVal;
+
+
+/* return the long representation of a lenVal */
+extern long value(lenVal *x);
+
+/* set lenVal equal to value */
+extern void initLenVal(lenVal *x, long value);
+
+/* check if expected equals actual (taking the mask into account) */
+extern short EqualLenVal(lenVal *expected, lenVal *actual, lenVal *mask);
+
+/* add val1+val2 and put the result in resVal */
+extern void addVal(lenVal *resVal, lenVal *val1, lenVal *val2);
+
+/* return the (byte, bit) of lv (reading from left to right) */
+extern short RetBit(lenVal *lv, int byte, int bit);
+
+/* set the (byte, bit) of lv equal to val (e.g. SetBit("00000000",byte, 1)
+   equals "01000000" */
+extern void SetBit(lenVal *lv, int byte, int bit, short val);
+
+/* read from XSVF numBytes bytes of data into x */
+extern void  readVal(lenVal *x, short numBytes);
+
+#endif
--- a/board/esd/common/xilinx_jtag/micro.c
+++ b/board/esd/common/xilinx_jtag/micro.c
--- a/board/esd/common/xilinx_jtag/micro.h
+++ b/board/esd/common/xilinx_jtag/micro.h
@@ -0,0 +1,64 @@
+/*
+ * (C) Copyright 2003
+ * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*****************************************************************************
+ * File:         micro.h
+ * Description:  This header file contains the function prototype to the
+ *               primary interface function for the XSVF player.
+ * Usage:        FIRST - PORTS.C
+ *               Customize the ports.c function implementations to establish
+ *               the correct protocol for communicating with your JTAG ports
+ *               (setPort() and readTDOBit()) and tune the waitTime() delay
+ *               function.  Also, establish access to the XSVF data source
+ *               in the readByte() function.
+ *               FINALLY - Call xsvfExecute().
+ *****************************************************************************/
+#ifndef XSVF_MICRO_H
+#define XSVF_MICRO_H
+
+/* Legacy error codes for xsvfExecute from original XSVF player v2.0 */
+#define XSVF_LEGACY_SUCCESS 1
+#define XSVF_LEGACY_ERROR   0
+
+/* 4.04 [NEW] Error codes for xsvfExecute. */
+/* Must #define XSVF_SUPPORT_ERRORCODES in micro.c to get these codes */
+#define XSVF_ERROR_NONE         0
+#define XSVF_ERROR_UNKNOWN      1
+#define XSVF_ERROR_TDOMISMATCH  2
+#define XSVF_ERROR_MAXRETRIES   3   /* TDO mismatch after max retries */
+#define XSVF_ERROR_ILLEGALCMD   4
+#define XSVF_ERROR_ILLEGALSTATE 5
+#define XSVF_ERROR_DATAOVERFLOW 6   /* Data > lenVal MAX_LEN buffer size*/
+/* Insert new errors here */
+#define XSVF_ERROR_LAST         7
+
+/*****************************************************************************
+ * Function:     xsvfExecute
+ * Description:  Process, interpret, and apply the XSVF commands.
+ *               See port.c:readByte for source of XSVF data.
+ * Parameters:   none.
+ * Returns:      int - For error codes see above.
+ *****************************************************************************/
+int xsvfExecute(void);
+
+#endif  /* XSVF_MICRO_H */
--- a/board/esd/common/xilinx_jtag/ports.c
+++ b/board/esd/common/xilinx_jtag/ports.c
@@ -0,0 +1,116 @@
+/*
+ * (C) Copyright 2003
+ * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*******************************************************/
+/* file: ports.c                                       */
+/* abstract:  This file contains the routines to       */
+/*            output values on the JTAG ports, to read */
+/*            the TDO bit, and to read a byte of data  */
+/*            from the prom                            */
+/*                                                     */
+/*******************************************************/
+
+#include <common.h>
+#include <asm/processor.h>
+
+#include "ports.h"
+
+static unsigned long output = 0;
+static int filepos = 0;
+static int oldstate = 0;
+static int newstate = 0;
+static int readptr = 0;
+
+extern long filesize;
+extern const unsigned char fpgadata[];
+
+
+/* if in debugging mode, then just set the variables */
+void setPort(short p,short val)
+{
+	if (p==TMS) {
+		if (val) {
+			output |= JTAG_TMS;
+		} else {
+			output &= ~JTAG_TMS;
+		}
+	}
+	if (p==TDI) {
+		if (val) {
+			output |= JTAG_TDI;
+		} else {
+			output &= ~JTAG_TDI;
+		}
+	}
+	if (p==TCK) {
+		if (val) {
+			output |= JTAG_TCK;
+		} else {
+			output &= ~JTAG_TCK;
+		}
+		out32(GPIO0_OR, output);
+	}
+}
+
+
+/* toggle tck LH */
+void pulseClock(void)
+{
+	setPort(TCK,0);  /* set the TCK port to low  */
+	setPort(TCK,1);  /* set the TCK port to high */
+}
+
+
+/* read in a byte of data from the prom */
+void readByte(unsigned char *data)
+{
+	/* pretend reading using a file */
+	*data = fpgadata[readptr++];
+	newstate = (100 * filepos++) / filesize;
+	if (newstate != oldstate) {
+		printf("%4d\r\r\r\r", newstate);
+		oldstate = newstate;
+	}
+}
+
+/* read the TDO bit from port */
+unsigned char readTDOBit(void)
+{
+	unsigned long inputs;
+
+	inputs = in32(GPIO0_IR);
+	if (inputs & JTAG_TDO)
+		return 1;
+	else
+		return 0;
+}
+
+
+/* Wait at least the specified number of microsec.                           */
+/* Use a timer if possible; otherwise estimate the number of instructions    */
+/* necessary to be run based on the microcontroller speed.  For this example */
+/* we pulse the TCK port a number of times based on the processor speed.     */
+void waitTime(long microsec)
+{
+	udelay(microsec); /* esd */
+}
--- a/board/esd/common/xilinx_jtag/ports.h
+++ b/board/esd/common/xilinx_jtag/ports.h
@@ -0,0 +1,62 @@
+/*
+ * (C) Copyright 2003
+ * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*******************************************************/
+/* file: ports.h                                       */
+/* abstract:  This file contains extern declarations   */
+/*            for providing stimulus to the JTAG ports.*/
+/*******************************************************/
+
+#ifndef ports_dot_h
+#define ports_dot_h
+
+/* these constants are used to send the appropriate ports to setPort */
+/* they should be enumerated types, but some of the microcontroller  */
+/* compilers don't like enumerated types */
+#define TCK (short) 0
+#define TMS (short) 1
+#define TDI (short) 2
+
+/*
+ * Use CFG_FPGA_xxx defines from board include file.
+ */
+#define JTAG_TMS   CFG_FPGA_PRG     /* output */
+#define JTAG_TCK   CFG_FPGA_CLK     /* output */
+#define JTAG_TDI   CFG_FPGA_DATA    /* output */
+#define JTAG_TDO   CFG_FPGA_DONE    /* input */
+
+/* set the port "p" (TCK, TMS, or TDI) to val (0 or 1) */
+void setPort(short p, short val);
+
+/* read the TDO bit and store it in val */
+unsigned char readTDOBit(void);
+
+/* make clock go down->up->down*/
+void pulseClock(void);
+
+/* read the next byte of data from the xsvf file */
+void readByte(unsigned char *data);
+
+void waitTime(long microsec);
+
+#endif
--- a/board/esd/cpci405/cpci405.c
+++ b/board/esd/cpci405/cpci405.c
@@ -433,7 +433,14 @@ int checkboard (void)
 #endif

 	if (ctermm2()) {
-		printf("CTERM-M2 - Id=0x%02x)", *(unsigned char *)0xf0000400);
+		unsigned char str[4];
+
+		/*
+		 * Read board-id and save in env-variable
+		 */
+		sprintf(str, "%d", *(unsigned char *)0xf0000400);
+		setenv("boardid", str);
+		printf("CTERM-M2 - Id=%s)", str);
 	} else {
 		if (cpci405_host()) {
 			puts ("PCI Host Version)");
@@ -508,44 +515,144 @@ void ide_set_reset(int on)
 #endif /* CONFIG_IDE_RESET */
 #endif /* CONFIG_CPCI405_VER2 */

-#if 0 /* test-only */
-/* ------------------------------------------------------------------------- */

-u8 *dhcp_vendorex_prep (u8 * e)
+#ifdef CONFIG_CPCI405AB
+
+#define ONE_WIRE_CLEAR   (*(volatile unsigned short *)0xf0400000 |= 0x0100)
+#define ONE_WIRE_SET     (*(volatile unsigned short *)0xf0400000 &= ~0x0100)
+#define ONE_WIRE_GET     (*(volatile unsigned short *)0xf0400002 & 0x1000)
+
+/*
+ * Generate a 1-wire reset, return 1 if no presence detect was found,
+ * return 0 otherwise.
+ * (NOTE: Does not handle alarm presence from DS2404/DS1994)
+ */
+int OWTouchReset(void)
 {
-	char *ptr;
+	int result;

-/* DHCP vendor-class-identifier = 60 */
-	if ((ptr = getenv ("dhcp_vendor-class-identifier"))) {
-		*e++ = 60;
-		*e++ = strlen (ptr);
-		while (*ptr)
-			*e++ = *ptr++;
-	}
-/* my DHCP_CLIENT_IDENTIFIER = 61 */
-	if ((ptr = getenv ("dhcp_client_id"))) {
-		*e++ = 61;
-		*e++ = strlen (ptr);
-		while (*ptr)
-			*e++ = *ptr++;
-	}
+	ONE_WIRE_CLEAR;
+	udelay(480);
+	ONE_WIRE_SET;
+	udelay(70);

-	return e;
+	result = ONE_WIRE_GET;
+
+	udelay(410);
+	return result;
 }


-/* ------------------------------------------------------------------------- */
-
-u8 *dhcp_vendorex_proc (u8 * popt)
+/*
+ * Send 1 a 1-wire write bit.
+ * Provide 10us recovery time.
+ */
+void OWWriteBit(int bit)
 {
-	if (*popt == 61)
-		return (u8 *)-1;
-	if (*popt == 43) {
-		printf("|%s|", popt+4); /* test-only */
-		return (u8 *)-1;
+	if (bit) {
+		/*
+		 * write '1' bit
+		 */
+		ONE_WIRE_CLEAR;
+		udelay(6);
+		ONE_WIRE_SET;
+		udelay(64);
+	} else {
+		/*
+		 * write '0' bit
+		 */
+		ONE_WIRE_CLEAR;
+		udelay(60);
+		ONE_WIRE_SET;
+		udelay(10);
 	}
-	return NULL;
 }

-/* ------------------------------------------------------------------------- */
-#endif /* test-only */
+
+/*
+ * Read a bit from the 1-wire bus and return it.
+ * Provide 10us recovery time.
+ */
+int OWReadBit(void)
+{
+	int result;
+
+	ONE_WIRE_CLEAR;
+	udelay(6);
+	ONE_WIRE_SET;
+	udelay(9);
+
+	result = ONE_WIRE_GET;
+
+	udelay(55);
+	return result;
+}
+
+
+void OWWriteByte(int data)
+{
+	int loop;
+
+	for (loop=0; loop<8; loop++) {
+		OWWriteBit(data & 0x01);
+		data >>= 1;
+	}
+}
+
+
+int OWReadByte(void)
+{
+	int loop, result = 0;
+
+	for (loop=0; loop<8; loop++) {
+		result >>= 1;
+		if (OWReadBit()) {
+			result |= 0x80;
+		}
+	}
+
+	return result;
+}
+
+
+int do_onewire(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+{
+	volatile unsigned short val;
+	int result;
+	int i;
+	unsigned char ow_id[6];
+	unsigned char str[32];
+	unsigned char ow_crc;
+
+	/*
+	 * Clear 1-wire bit (open drain with pull-up)
+	 */
+	val = *(volatile unsigned short *)0xf0400000;
+	val &= ~0x1000; /* clear 1-wire bit */
+	*(volatile unsigned short *)0xf0400000 = val;
+
+	result = OWTouchReset();
+	if (result != 0) {
+		puts("No 1-wire device detected!\n");
+	}
+
+	OWWriteByte(0x33); /* send read rom command */
+	OWReadByte(); /* skip family code ( == 0x01) */
+	for (i=0; i<6; i++) {
+		ow_id[i] = OWReadByte();
+	}
+	ow_crc = OWReadByte(); /* read crc */
+
+	sprintf(str, "%08X%04X", *(unsigned int *)&ow_id[0], *(unsigned short *)&ow_id[4]);
+	printf("Setting environment variable 'ow_id' to %s\n", str);
+	setenv("ow_id", str);
+
+	return 0;
+}
+U_BOOT_CMD(
+	onewire,	1,	1,	do_onewire,
+	"onewire - Read 1-write ID\n",
+	NULL
+	);
+
+#endif /* CONFIG_CPCI405AB */
--- a/board/esd/cpci405/fpgadata_cpci405ab.c
+++ b/board/esd/cpci405/fpgadata_cpci405ab.c
--- a/board/esd/dasa_sim/cmd_dasa_sim.c
+++ b/board/esd/dasa_sim/cmd_dasa_sim.c
@@ -225,8 +225,8 @@ int do_pci9054 (cmd_tbl_t * cmdtp, int flag, int argc,

 }

-cmd_tbl_t U_BOOT_CMD (pci9054) = MK_CMD_ENTRY(
-	"pci9054", 3, 1, do_pci9054,
+U_BOOT_CMD(
+	pci9054, 3, 1, do_pci9054,
 	"pci9054 - PLX PCI9054 EEPROM access\n",
 	"pci9054 info - print EEPROM values\n"
 	"pci9054 update - updates EEPROM with default values\n"
--- a/board/esd/dp405/Makefile
+++ b/board/esd/dp405/Makefile
@@ -0,0 +1,51 @@
+#
+# (C) Copyright 2000
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB	= lib$(BOARD).a
+
+# Objects for Xilinx JTAG programming (CPLD)
+CPLD    = ../common/xilinx_jtag/lenval.o \
+	  ../common/xilinx_jtag/micro.o \
+	  ../common/xilinx_jtag/ports.o
+
+OBJS	= $(BOARD).o flash.o $(CPLD)
+
+$(LIB):	$(OBJS) $(SOBJS)
+	$(AR) crv $@ $(OBJS)
+
+clean:
+	rm -f $(SOBJS) $(OBJS)
+
+distclean:	clean
+	rm -f $(LIB) core *.bak .depend
+
+#########################################################################
+
+.depend:	Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
+		$(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
+
+sinclude .depend
+
+#########################################################################
--- a/board/esd/dp405/config.mk
+++ b/board/esd/dp405/config.mk
@@ -0,0 +1,29 @@
+#
+# (C) Copyright 2000
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+#
+# esd VOH405 boards
+#
+
+TEXT_BASE = 0xFFFC0000
+#TEXT_BASE = 0x00FC0000
--- a/board/esd/dp405/dp405.c
+++ b/board/esd/dp405/dp405.c
@@ -0,0 +1,143 @@
+/*
+ * (C) Copyright 2001-2003
+ * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/processor.h>
+#include <command.h>
+#include <malloc.h>
+
+
+/* fpga configuration data - not compressed, generated by bin2c */
+const unsigned char fpgadata[] =
+{
+#include "fpgadata.c"
+};
+int filesize = sizeof(fpgadata);
+
+
+int board_pre_init (void)
+{
+	/*
+	 * IRQ 0-15  405GP internally generated; active high; level sensitive
+	 * IRQ 16    405GP internally generated; active low; level sensitive
+	 * IRQ 17-24 RESERVED
+	 * IRQ 25 (EXT IRQ 0) CAN0; active low; level sensitive
+	 * IRQ 26 (EXT IRQ 1) SER0 ; active low; level sensitive
+	 * IRQ 27 (EXT IRQ 2) SER1; active low; level sensitive
+	 * IRQ 28 (EXT IRQ 3) FPGA 0; active low; level sensitive
+	 * IRQ 29 (EXT IRQ 4) FPGA 1; active low; level sensitive
+	 * IRQ 30 (EXT IRQ 5) PCI INTA; active low; level sensitive
+	 * IRQ 31 (EXT IRQ 6) COMPACT FLASH; active high; level sensitive
+	 */
+	mtdcr(uicsr, 0xFFFFFFFF);       /* clear all ints */
+	mtdcr(uicer, 0x00000000);       /* disable all ints */
+	mtdcr(uiccr, 0x00000000);       /* set all to be non-critical*/
+	mtdcr(uicpr, 0xFFFFFF80);       /* set int polarities */
+	mtdcr(uictr, 0x10000000);       /* set int trigger levels */
+	mtdcr(uicvcr, 0x00000001);      /* set vect base=0,INT0 highest priority*/
+	mtdcr(uicsr, 0xFFFFFFFF);       /* clear all ints */
+
+	/*
+	 * EBC Configuration Register: set ready timeout to 512 ebc-clks -> ca. 15 us
+	 */
+	mtebc (epcr, 0xa8400000); /* ebc always driven */
+
+	return 0;
+}
+
+
+/* ------------------------------------------------------------------------- */
+
+int misc_init_f (void)
+{
+	return 0;  /* dummy implementation */
+}
+
+
+int misc_init_r (void)
+{
+	/*
+	 * Reset CPLD via GPIO13 (CS4) pin
+	 */
+	out32(GPIO0_OR, in32(GPIO0_OR) & ~(0x80000000 >> 13));
+	udelay(1000); /* wait 1ms */
+	out32(GPIO0_OR, in32(GPIO0_OR) | (0x80000000 >> 13));
+	udelay(1000); /* wait 1ms */
+
+	return (0);
+}
+
+
+/*
+ * Check Board Identity:
+ */
+
+int checkboard (void)
+{
+	unsigned char str[64];
+	int i = getenv_r ("serial#", str, sizeof(str));
+	unsigned char trans[16] = {0x0,0x8,0x4,0xc,0x2,0xa,0x6,0xe,
+				   0x1,0x9,0x5,0xd,0x3,0xb,0x7,0xf};
+	unsigned char id1, id2;
+
+	puts ("Board: ");
+
+	if (i == -1) {
+		puts ("### No HW ID - assuming DP405");
+	} else {
+		puts(str);
+	}
+
+	id1 = trans[(~(in32(GPIO0_IR) >> 5)) & 0x0000000f];
+	id2 = trans[(~(in32(GPIO0_IR) >> 9)) & 0x0000000f];
+	printf(" (ID=0x%1X%1X)\n", id1, id2);
+
+	return 0;
+}
+
+/* ------------------------------------------------------------------------- */
+
+long int initdram (int board_type)
+{
+	unsigned long val;
+
+	mtdcr(memcfga, mem_mb0cf);
+	val = mfdcr(memcfgd);
+
+#if 0
+	printf("\nmb0cf=%x\n", val); /* test-only */
+	printf("strap=%x\n", mfdcr(strap)); /* test-only */
+#endif
+
+	return (4*1024*1024 << ((val & 0x000e0000) >> 17));
+}
+
+/* ------------------------------------------------------------------------- */
+
+int testdram (void)
+{
+	/* TODO: XXX XXX XXX */
+	printf ("test: 16 MB - ok\n");
+
+	return (0);
+}
--- a/board/esd/dp405/flash.c
+++ b/board/esd/dp405/flash.c
@@ -0,0 +1,101 @@
+/*
+ * (C) Copyright 2001
+ * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <ppc4xx.h>
+#include <asm/processor.h>
+
+/*
+ * include common flash code (for esd boards)
+ */
+#include "../common/flash.c"
+
+/*-----------------------------------------------------------------------
+ * Functions
+ */
+static ulong flash_get_size (vu_long * addr, flash_info_t * info);
+static void flash_get_offsets (ulong base, flash_info_t * info);
+
+/*-----------------------------------------------------------------------
+ */
+
+unsigned long flash_init (void)
+{
+	unsigned long size_b0;
+	int i;
+	uint pbcr;
+	unsigned long base_b0;
+	int size_val = 0;
+
+	/* Init: no FLASHes known */
+	for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
+		flash_info[i].flash_id = FLASH_UNKNOWN;
+	}
+
+	/* Static FLASH Bank configuration here - FIXME XXX */
+
+	size_b0 = flash_get_size((vu_long *)FLASH_BASE0_PRELIM, &flash_info[0]);
+
+	if (flash_info[0].flash_id == FLASH_UNKNOWN) {
+		printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
+			size_b0, size_b0<<20);
+	}
+
+	/* Setup offsets */
+	flash_get_offsets (-size_b0, &flash_info[0]);
+
+	/* Re-do sizing to get full correct info */
+	mtdcr(ebccfga, pb0cr);
+	pbcr = mfdcr(ebccfgd);
+	mtdcr(ebccfga, pb0cr);
+	base_b0 = -size_b0;
+	switch (size_b0) {
+	case 1 << 20:
+		size_val = 0;
+		break;
+	case 2 << 20:
+		size_val = 1;
+		break;
+	case 4 << 20:
+		size_val = 2;
+		break;
+	case 8 << 20:
+		size_val = 3;
+		break;
+	case 16 << 20:
+		size_val = 4;
+		break;
+	}
+	pbcr = (pbcr & 0x0001ffff) | base_b0 | (size_val << 17);
+	mtdcr(ebccfgd, pbcr);
+
+	/* Monitor protection ON by default */
+	(void)flash_protect(FLAG_PROTECT_SET,
+			    -CFG_MONITOR_LEN,
+			    0xffffffff,
+			    &flash_info[0]);
+
+	flash_info[0].size = size_b0;
+
+	return (size_b0);
+}
--- a/board/esd/dp405/fpgadata.c
+++ b/board/esd/dp405/fpgadata.c
--- a/board/esd/dp405/u-boot.lds
+++ b/board/esd/dp405/u-boot.lds
@@ -0,0 +1,148 @@
+/*
+ * (C) Copyright 2000
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_ARCH(powerpc)
+SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
+/* Do we need any of these for elf?
+   __DYNAMIC = 0;    */
+SECTIONS
+{
+  .resetvec 0xFFFFFFFC :
+  {
+    *(.resetvec)
+  } = 0xffff
+
+  /* Read-only sections, merged into text segment: */
+  . = + SIZEOF_HEADERS;
+  .interp : { *(.interp) }
+  .hash          : { *(.hash)		}
+  .dynsym        : { *(.dynsym)		}
+  .dynstr        : { *(.dynstr)		}
+  .rel.text      : { *(.rel.text)		}
+  .rela.text     : { *(.rela.text) 	}
+  .rel.data      : { *(.rel.data)		}
+  .rela.data     : { *(.rela.data) 	}
+  .rel.rodata    : { *(.rel.rodata) 	}
+  .rela.rodata   : { *(.rela.rodata) 	}
+  .rel.got       : { *(.rel.got)		}
+  .rela.got      : { *(.rela.got)		}
+  .rel.ctors     : { *(.rel.ctors)	}
+  .rela.ctors    : { *(.rela.ctors)	}
+  .rel.dtors     : { *(.rel.dtors)	}
+  .rela.dtors    : { *(.rela.dtors)	}
+  .rel.bss       : { *(.rel.bss)		}
+  .rela.bss      : { *(.rela.bss)		}
+  .rel.plt       : { *(.rel.plt)		}
+  .rela.plt      : { *(.rela.plt)		}
+  .init          : { *(.init)	}
+  .plt : { *(.plt) }
+  .text      :
+  {
+    /* WARNING - the following is hand-optimized to fit within	*/
+    /* the sector layout of our flash chips!	XXX FIXME XXX	*/
+
+    cpu/ppc4xx/start.o	(.text)
+    cpu/ppc4xx/traps.o	(.text)
+    cpu/ppc4xx/interrupts.o	(.text)
+    cpu/ppc4xx/serial.o	(.text)
+    cpu/ppc4xx/cpu_init.o	(.text)
+    cpu/ppc4xx/speed.o	(.text)
+    cpu/ppc4xx/405gp_enet.o	(.text)
+    common/dlmalloc.o	(.text)
+    lib_generic/crc32.o		(.text)
+    lib_ppc/extable.o	(.text)
+    lib_generic/zlib.o		(.text)
+
+/*    . = env_offset;*/
+/*    common/environment.o(.text)*/
+
+    *(.text)
+    *(.fixup)
+    *(.got1)
+  }
+  _etext = .;
+  PROVIDE (etext = .);
+  .rodata    :
+  {
+    *(.rodata)
+    *(.rodata1)
+    *(.rodata.str1.4)
+  }
+  .fini      : { *(.fini)    } =0
+  .ctors     : { *(.ctors)   }
+  .dtors     : { *(.dtors)   }
+
+  /* Read-write section, merged into data segment: */
+  . = (. + 0x00FF) & 0xFFFFFF00;
+  _erotext = .;
+  PROVIDE (erotext = .);
+  .reloc   :
+  {
+    *(.got)
+    _GOT2_TABLE_ = .;
+    *(.got2)
+    _FIXUP_TABLE_ = .;
+    *(.fixup)
+  }
+  __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
+  __fixup_entries = (. - _FIXUP_TABLE_)>>2;
+
+  .data    :
+  {
+    *(.data)
+    *(.data1)
+    *(.sdata)
+    *(.sdata2)
+    *(.dynamic)
+    CONSTRUCTORS
+  }
+  _edata  =  .;
+  PROVIDE (edata = .);
+
+  __u_boot_cmd_start = .;
+  .u_boot_cmd : { *(.u_boot_cmd) }
+  __u_boot_cmd_end = .;
+
+
+  __start___ex_table = .;
+  __ex_table : { *(__ex_table) }
+  __stop___ex_table = .;
+
+  . = ALIGN(256);
+  __init_begin = .;
+  .text.init : { *(.text.init) }
+  .data.init : { *(.data.init) }
+  . = ALIGN(256);
+  __init_end = .;
+
+  __bss_start = .;
+  .bss       :
+  {
+   *(.sbss) *(.scommon)
+   *(.dynbss)
+   *(.bss)
+   *(COMMON)
+  }
+  _end = . ;
+  PROVIDE (end = .);
+}
--- a/board/esd/hub405/Makefile
+++ b/board/esd/hub405/Makefile
@@ -0,0 +1,46 @@
+#
+# (C) Copyright 2000
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB	= lib$(BOARD).a
+
+OBJS	= $(BOARD).o flash.o
+
+$(LIB):	$(OBJS) $(SOBJS)
+	$(AR) crv $@ $(OBJS)
+
+clean:
+	rm -f $(SOBJS) $(OBJS)
+
+distclean:	clean
+	rm -f $(LIB) core *.bak .depend
+
+#########################################################################
+
+.depend:	Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
+		$(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
+
+sinclude .depend
+
+#########################################################################
--- a/board/esd/hub405/config.mk
+++ b/board/esd/hub405/config.mk
@@ -0,0 +1,28 @@
+#
+# (C) Copyright 2000
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+#
+# esd HUB405 boards
+#
+
+TEXT_BASE = 0xFFFC0000
--- a/board/esd/hub405/flash.c
+++ b/board/esd/hub405/flash.c
@@ -0,0 +1,101 @@
+/*
+ * (C) Copyright 2001
+ * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <ppc4xx.h>
+#include <asm/processor.h>
+
+/*
+ * include common flash code (for esd boards)
+ */
+#include "../common/flash.c"
+
+/*-----------------------------------------------------------------------
+ * Functions
+ */
+static ulong flash_get_size (vu_long * addr, flash_info_t * info);
+static void flash_get_offsets (ulong base, flash_info_t * info);
+
+/*-----------------------------------------------------------------------
+ */
+
+unsigned long flash_init (void)
+{
+	unsigned long size_b0;
+	int i;
+	uint pbcr;
+	unsigned long base_b0;
+	int size_val = 0;
+
+	/* Init: no FLASHes known */
+	for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
+		flash_info[i].flash_id = FLASH_UNKNOWN;
+	}
+
+	/* Static FLASH Bank configuration here - FIXME XXX */
+
+	size_b0 = flash_get_size((vu_long *)FLASH_BASE0_PRELIM, &flash_info[0]);
+
+	if (flash_info[0].flash_id == FLASH_UNKNOWN) {
+		printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
+			size_b0, size_b0<<20);
+	}
+
+	/* Setup offsets */
+	flash_get_offsets (-size_b0, &flash_info[0]);
+
+	/* Re-do sizing to get full correct info */
+	mtdcr(ebccfga, pb0cr);
+	pbcr = mfdcr(ebccfgd);
+	mtdcr(ebccfga, pb0cr);
+	base_b0 = -size_b0;
+	switch (size_b0) {
+	case 1 << 20:
+		size_val = 0;
+		break;
+	case 2 << 20:
+		size_val = 1;
+		break;
+	case 4 << 20:
+		size_val = 2;
+		break;
+	case 8 << 20:
+		size_val = 3;
+		break;
+	case 16 << 20:
+		size_val = 4;
+		break;
+	}
+	pbcr = (pbcr & 0x0001ffff) | base_b0 | (size_val << 17);
+	mtdcr(ebccfgd, pbcr);
+
+	/* Monitor protection ON by default */
+	(void)flash_protect(FLAG_PROTECT_SET,
+			    -CFG_MONITOR_LEN,
+			    0xffffffff,
+			    &flash_info[0]);
+
+	flash_info[0].size = size_b0;
+
+	return (size_b0);
+}
--- a/board/esd/hub405/hub405.c
+++ b/board/esd/hub405/hub405.c
@@ -0,0 +1,166 @@
+/*
+ * (C) Copyright 2001-2003
+ * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/processor.h>
+#include <command.h>
+#include <malloc.h>
+
+/* ------------------------------------------------------------------------- */
+
+
+int board_pre_init (void)
+{
+	/*
+	 * IRQ 0-15  405GP internally generated; active high; level sensitive
+	 * IRQ 16    405GP internally generated; active low; level sensitive
+	 * IRQ 17-24 RESERVED
+	 * IRQ 25 (EXT IRQ 0) CAN0; active low; level sensitive
+	 * IRQ 26 (EXT IRQ 1) SER0 ; active low; level sensitive
+	 * IRQ 27 (EXT IRQ 2) SER1; active low; level sensitive
+	 * IRQ 28 (EXT IRQ 3) FPGA 0; active low; level sensitive
+	 * IRQ 29 (EXT IRQ 4) FPGA 1; active low; level sensitive
+	 * IRQ 30 (EXT IRQ 5) PCI INTA; active low; level sensitive
+	 * IRQ 31 (EXT IRQ 6) COMPACT FLASH; active high; level sensitive
+	 */
+	mtdcr(uicsr, 0xFFFFFFFF);       /* clear all ints */
+	mtdcr(uicer, 0x00000000);       /* disable all ints */
+	mtdcr(uiccr, 0x00000000);       /* set all to be non-critical*/
+	mtdcr(uicpr, 0xFFFFFF9F);       /* set int polarities */
+	mtdcr(uictr, 0x10000000);       /* set int trigger levels */
+	mtdcr(uicvcr, 0x00000001);      /* set vect base=0,INT0 highest priority*/
+	mtdcr(uicsr, 0xFFFFFFFF);       /* clear all ints */
+
+	/*
+	 * EBC Configuration Register: set ready timeout to 512 ebc-clks -> ca. 15 us
+	 */
+	mtebc (epcr, 0xa8400000); /* ebc always driven */
+
+	return 0;
+}
+
+
+/* ------------------------------------------------------------------------- */
+
+int misc_init_f (void)
+{
+	return 0;  /* dummy implementation */
+}
+
+
+int misc_init_r (void)
+{
+	volatile unsigned char *duart0_mcr = (unsigned char *)((ulong)DUART0_BA + 4);
+	volatile unsigned char *duart1_mcr = (unsigned char *)((ulong)DUART1_BA + 4);
+	volatile unsigned char *duart2_mcr = (unsigned char *)((ulong)DUART2_BA + 4);
+	volatile unsigned char *duart3_mcr = (unsigned char *)((ulong)DUART3_BA + 4);
+
+	/*
+	 * Reset external DUARTs
+	 */
+	out32(GPIO0_OR, in32(GPIO0_OR) | CFG_DUART_RST); /* set reset to high */
+	udelay(10); /* wait 10us */
+	out32(GPIO0_OR, in32(GPIO0_OR) & ~CFG_DUART_RST); /* set reset to low */
+	udelay(1000); /* wait 1ms */
+
+	/*
+	 * Enable interrupts in exar duart mcr[3]
+	 */
+	*duart0_mcr = 0x08;
+	*duart1_mcr = 0x08;
+	*duart2_mcr = 0x08;
+	*duart3_mcr = 0x08;
+
+	/*
+	 * Set NAND-FLASH GPIO signals to default
+	 */
+	out32(GPIO0_OR, in32(GPIO0_OR) & ~(CFG_NAND_CLE | CFG_NAND_ALE));
+	out32(GPIO0_OR, in32(GPIO0_OR) | CFG_NAND_CE);
+
+	return (0);
+}
+
+
+/*
+ * Check Board Identity:
+ */
+
+int checkboard (void)
+{
+	unsigned char str[64];
+	int i = getenv_r ("serial#", str, sizeof(str));
+
+	puts ("Board: ");
+
+	if (i == -1) {
+		puts ("### No HW ID - assuming HUB405");
+	} else {
+		puts(str);
+	}
+
+	putc ('\n');
+
+	return 0;
+}
+
+/* ------------------------------------------------------------------------- */
+
+long int initdram (int board_type)
+{
+	unsigned long val;
+
+	mtdcr(memcfga, mem_mb0cf);
+	val = mfdcr(memcfgd);
+
+#if 0
+	printf("\nmb0cf=%x\n", val); /* test-only */
+	printf("strap=%x\n", mfdcr(strap)); /* test-only */
+#endif
+
+	return (4*1024*1024 << ((val & 0x000e0000) >> 17));
+}
+
+/* ------------------------------------------------------------------------- */
+
+int testdram (void)
+{
+	/* TODO: XXX XXX XXX */
+	printf ("test: 16 MB - ok\n");
+
+	return (0);
+}
+
+/* ------------------------------------------------------------------------- */
+
+#if (CONFIG_COMMANDS & CFG_CMD_NAND)
+#include <linux/mtd/nand.h>
+extern struct nand_chip nand_dev_desc[CFG_MAX_NAND_DEVICE];
+
+void nand_init(void)
+{
+	nand_probe(CFG_NAND_BASE);
+	if (nand_dev_desc[0].ChipID != NAND_ChipID_UNKNOWN) {
+		print_size(nand_dev_desc[0].totlen, "\n");
+	}
+}
+#endif
--- a/board/esd/hub405/u-boot.lds
+++ b/board/esd/hub405/u-boot.lds
@@ -0,0 +1,147 @@
+/*
+ * (C) Copyright 2000
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_ARCH(powerpc)
+SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
+/* Do we need any of these for elf?
+   __DYNAMIC = 0;    */
+SECTIONS
+{
+  .resetvec 0xFFFFFFFC :
+  {
+    *(.resetvec)
+  } = 0xffff
+
+  /* Read-only sections, merged into text segment: */
+  . = + SIZEOF_HEADERS;
+  .interp : { *(.interp) }
+  .hash          : { *(.hash)		}
+  .dynsym        : { *(.dynsym)		}
+  .dynstr        : { *(.dynstr)		}
+  .rel.text      : { *(.rel.text)		}
+  .rela.text     : { *(.rela.text) 	}
+  .rel.data      : { *(.rel.data)		}
+  .rela.data     : { *(.rela.data) 	}
+  .rel.rodata    : { *(.rel.rodata) 	}
+  .rela.rodata   : { *(.rela.rodata) 	}
+  .rel.got       : { *(.rel.got)		}
+  .rela.got      : { *(.rela.got)		}
+  .rel.ctors     : { *(.rel.ctors)	}
+  .rela.ctors    : { *(.rela.ctors)	}
+  .rel.dtors     : { *(.rel.dtors)	}
+  .rela.dtors    : { *(.rela.dtors)	}
+  .rel.bss       : { *(.rel.bss)		}
+  .rela.bss      : { *(.rela.bss)		}
+  .rel.plt       : { *(.rel.plt)		}
+  .rela.plt      : { *(.rela.plt)		}
+  .init          : { *(.init)	}
+  .plt : { *(.plt) }
+  .text      :
+  {
+    /* WARNING - the following is hand-optimized to fit within	*/
+    /* the sector layout of our flash chips!	XXX FIXME XXX	*/
+
+    cpu/ppc4xx/start.o	(.text)
+    cpu/ppc4xx/traps.o	(.text)
+    cpu/ppc4xx/interrupts.o	(.text)
+    cpu/ppc4xx/serial.o	(.text)
+    cpu/ppc4xx/cpu_init.o	(.text)
+    cpu/ppc4xx/speed.o	(.text)
+    cpu/ppc4xx/405gp_enet.o	(.text)
+    common/dlmalloc.o	(.text)
+    lib_generic/crc32.o		(.text)
+    lib_ppc/extable.o	(.text)
+    lib_generic/zlib.o		(.text)
+
+/*    . = env_offset;*/
+/*    common/environment.o(.text)*/
+
+    *(.text)
+    *(.fixup)
+    *(.got1)
+  }
+  _etext = .;
+  PROVIDE (etext = .);
+  .rodata    :
+  {
+    *(.rodata)
+    *(.rodata1)
+    *(.rodata.str1.4)
+  }
+  .fini      : { *(.fini)    } =0
+  .ctors     : { *(.ctors)   }
+  .dtors     : { *(.dtors)   }
+
+  /* Read-write section, merged into data segment: */
+  . = (. + 0x00FF) & 0xFFFFFF00;
+  _erotext = .;
+  PROVIDE (erotext = .);
+  .reloc   :
+  {
+    *(.got)
+    _GOT2_TABLE_ = .;
+    *(.got2)
+    _FIXUP_TABLE_ = .;
+    *(.fixup)
+  }
+  __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
+  __fixup_entries = (. - _FIXUP_TABLE_)>>2;
+
+  .data    :
+  {
+    *(.data)
+    *(.data1)
+    *(.sdata)
+    *(.sdata2)
+    *(.dynamic)
+    CONSTRUCTORS
+  }
+  _edata  =  .;
+  PROVIDE (edata = .);
+
+  __u_boot_cmd_start = .;
+  .u_boot_cmd : { *(.u_boot_cmd) }
+  __u_boot_cmd_end = .;
+
+  __start___ex_table = .;
+  __ex_table : { *(__ex_table) }
+  __stop___ex_table = .;
+
+  . = ALIGN(256);
+  __init_begin = .;
+  .text.init : { *(.text.init) }
+  .data.init : { *(.data.init) }
+  . = ALIGN(256);
+  __init_end = .;
+
+  __bss_start = .;
+  .bss       :
+  {
+   *(.sbss) *(.scommon)
+   *(.dynbss)
+   *(.bss)
+   *(COMMON)
+  }
+  _end = . ;
+  PROVIDE (end = .);
+}
--- a/board/esd/ocrtc/Makefile
+++ b/board/esd/ocrtc/Makefile
@@ -25,7 +25,7 @@ include $(TOPDIR)/config.mk

 LIB	= lib$(BOARD).a

-OBJS	= $(BOARD).o flash.o
+OBJS	= $(BOARD).o flash.o cmd_ocrtc.o

 $(LIB):	$(OBJS) $(SOBJS)
 	$(AR) crv $@ $(OBJS)
--- a/board/esd/ocrtc/cmd_ocrtc.c
+++ b/board/esd/ocrtc/cmd_ocrtc.c
@@ -0,0 +1,87 @@
+/*
+ * (C) Copyright 2003
+ * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <command.h>
+#include <pci.h>
+#include <405gp_pci.h>
+
+
+#if (CONFIG_COMMANDS & CFG_CMD_BSP)
+
+#define IBM_VENDOR_ID    0x1014
+#define PPC405_DEVICE_ID 0x0156
+
+
+/*
+ * Set device number on pci board
+ */
+int do_setdevice(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+{
+	int idx = 1;	  /* start at 1 (skip device 0) */
+	pci_dev_t bdf = 0;
+	u32 addr;
+
+	while (bdf >= 0) {
+		if ((bdf = pci_find_device(IBM_VENDOR_ID, PPC405_DEVICE_ID, idx++)) < 0) {
+			break;
+		}
+		printf("Found device nr %d at %x!\n", idx-1, bdf);
+		pci_read_config_dword(bdf, PCI_BASE_ADDRESS_1, &addr);
+		addr &= ~0xf;
+		*(u32 *)addr = (bdf & 0x0000f800) >> 11;
+		printf("Wrote %x at %x!\n", (bdf & 0x0000f800) >> 11, addr);
+	}
+
+	return 0;
+}
+U_BOOT_CMD(
+	setdevice,	1,	1,	do_setdevice,
+	"setdevice - Set device number on pci adapter boards\n",
+	NULL
+);
+
+
+/*
+ * Get device number on pci board
+ */
+int do_getdevice(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+{
+	u32 device;
+	char str[32];
+
+	device = *(u32 *)0x0;
+	device = 0x16 - device;      /* calculate vxworks bp slot id */
+	sprintf(str, "%d", device);
+	setenv("slot", str);
+	printf("Variabel slot set to %x\n", device);
+
+	return 0;
+}
+U_BOOT_CMD(
+	getdevice,	1,	1,	do_getdevice,
+	"getdevice - Get device number and set slot env variable\n",
+	NULL
+);
+
+#endif
--- a/board/esd/pci405/cmd_pci405.c
+++ b/board/esd/pci405/cmd_pci405.c
@@ -107,5 +107,10 @@ int do_loadpci(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])

 	return 0;
 }
+U_BOOT_CMD(
+	loadpci,	1,	1,	do_loadpci,
+	"loadpci - Wait for pci-image and boot it\n",
+	NULL
+);

 #endif
--- a/board/esd/pci405/fpgadata.c
+++ b/board/esd/pci405/fpgadata.c
--- a/board/esd/plu405/Makefile
+++ b/board/esd/plu405/Makefile
@@ -0,0 +1,46 @@
+#
+# (C) Copyright 2000
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB	= lib$(BOARD).a
+
+OBJS	= $(BOARD).o flash.o
+
+$(LIB):	$(OBJS) $(SOBJS)
+	$(AR) crv $@ $(OBJS)
+
+clean:
+	rm -f $(SOBJS) $(OBJS)
+
+distclean:	clean
+	rm -f $(LIB) core *.bak .depend
+
+#########################################################################
+
+.depend:	Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
+		$(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
+
+sinclude .depend
+
+#########################################################################
--- a/board/esd/plu405/config.mk
+++ b/board/esd/plu405/config.mk
@@ -0,0 +1,29 @@
+#
+# (C) Copyright 2000
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+#
+# esd PLU405 boards
+#
+
+TEXT_BASE = 0xFFFC0000
+#TEXT_BASE = 0x00FC0000
--- a/board/esd/plu405/flash.c
+++ b/board/esd/plu405/flash.c
@@ -0,0 +1,101 @@
+/*
+ * (C) Copyright 2001
+ * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <ppc4xx.h>
+#include <asm/processor.h>
+
+/*
+ * include common flash code (for esd boards)
+ */
+#include "../common/flash.c"
+
+/*-----------------------------------------------------------------------
+ * Functions
+ */
+static ulong flash_get_size (vu_long * addr, flash_info_t * info);
+static void flash_get_offsets (ulong base, flash_info_t * info);
+
+/*-----------------------------------------------------------------------
+ */
+
+unsigned long flash_init (void)
+{
+	unsigned long size_b0;
+	int i;
+	uint pbcr;
+	unsigned long base_b0;
+	int size_val = 0;
+
+	/* Init: no FLASHes known */
+	for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
+		flash_info[i].flash_id = FLASH_UNKNOWN;
+	}
+
+	/* Static FLASH Bank configuration here - FIXME XXX */
+
+	size_b0 = flash_get_size((vu_long *)FLASH_BASE0_PRELIM, &flash_info[0]);
+
+	if (flash_info[0].flash_id == FLASH_UNKNOWN) {
+		printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
+			size_b0, size_b0<<20);
+	}
+
+	/* Setup offsets */
+	flash_get_offsets (-size_b0, &flash_info[0]);
+
+	/* Re-do sizing to get full correct info */
+	mtdcr(ebccfga, pb0cr);
+	pbcr = mfdcr(ebccfgd);
+	mtdcr(ebccfga, pb0cr);
+	base_b0 = -size_b0;
+	switch (size_b0) {
+	case 1 << 20:
+		size_val = 0;
+		break;
+	case 2 << 20:
+		size_val = 1;
+		break;
+	case 4 << 20:
+		size_val = 2;
+		break;
+	case 8 << 20:
+		size_val = 3;
+		break;
+	case 16 << 20:
+		size_val = 4;
+		break;
+	}
+	pbcr = (pbcr & 0x0001ffff) | base_b0 | (size_val << 17);
+	mtdcr(ebccfgd, pbcr);
+
+	/* Monitor protection ON by default */
+	(void)flash_protect(FLAG_PROTECT_SET,
+			    -CFG_MONITOR_LEN,
+			    0xffffffff,
+			    &flash_info[0]);
+
+	flash_info[0].size = size_b0;
+
+	return (size_b0);
+}
--- a/board/esd/plu405/fpgadata.c
+++ b/board/esd/plu405/fpgadata.c
--- a/board/esd/plu405/plu405.c
+++ b/board/esd/plu405/plu405.c
@@ -0,0 +1,268 @@
+/*
+ * (C) Copyright 2001-2003
+ * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/processor.h>
+#include <command.h>
+#include <malloc.h>
+
+/* ------------------------------------------------------------------------- */
+
+#if 0
+#define FPGA_DEBUG
+#endif
+
+extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
+
+/* fpga configuration data - gzip compressed and generated by bin2c */
+const unsigned char fpgadata[] =
+{
+#include "fpgadata.c"
+};
+
+/*
+ * include common fpga code (for esd boards)
+ */
+#include "../common/fpga.c"
+
+
+/* Prototypes */
+int gunzip(void *, int, unsigned char *, int *);
+
+
+int board_pre_init (void)
+{
+	/*
+	 * IRQ 0-15  405GP internally generated; active high; level sensitive
+	 * IRQ 16    405GP internally generated; active low; level sensitive
+	 * IRQ 17-24 RESERVED
+	 * IRQ 25 (EXT IRQ 0) CAN0; active low; level sensitive
+	 * IRQ 26 (EXT IRQ 1) SER0 ; active low; level sensitive
+	 * IRQ 27 (EXT IRQ 2) SER1; active low; level sensitive
+	 * IRQ 28 (EXT IRQ 3) FPGA 0; active low; level sensitive
+	 * IRQ 29 (EXT IRQ 4) FPGA 1; active low; level sensitive
+	 * IRQ 30 (EXT IRQ 5) PCI INTA; active low; level sensitive
+	 * IRQ 31 (EXT IRQ 6) COMPACT FLASH; active high; level sensitive
+	 */
+	mtdcr(uicsr, 0xFFFFFFFF);       /* clear all ints */
+	mtdcr(uicer, 0x00000000);       /* disable all ints */
+	mtdcr(uiccr, 0x00000000);       /* set all to be non-critical*/
+	mtdcr(uicpr, 0xFFFFFF99);       /* set int polarities */
+	mtdcr(uictr, 0x10000000);       /* set int trigger levels */
+	mtdcr(uicvcr, 0x00000001);      /* set vect base=0,INT0 highest priority*/
+	mtdcr(uicsr, 0xFFFFFFFF);       /* clear all ints */
+
+	/*
+	 * EBC Configuration Register: set ready timeout to 512 ebc-clks -> ca. 15 us
+	 */
+	mtebc (epcr, 0xa8400000); /* ebc always driven */
+
+	return 0;
+}
+
+
+/* ------------------------------------------------------------------------- */
+
+int misc_init_f (void)
+{
+	return 0;  /* dummy implementation */
+}
+
+
+int misc_init_r (void)
+{
+	volatile unsigned char *duart0_mcr = (unsigned char *)((ulong)DUART0_BA + 4);
+	volatile unsigned char *duart1_mcr = (unsigned char *)((ulong)DUART1_BA + 4);
+	unsigned char *dst;
+	ulong len = sizeof(fpgadata);
+	int status;
+	int index;
+	int i;
+
+#if 1 /* test-only */
+	dst = malloc(CFG_FPGA_MAX_SIZE);
+	if (gunzip (dst, CFG_FPGA_MAX_SIZE, (uchar *)fpgadata, (int *)&len) != 0) {
+		printf ("GUNZIP ERROR - must RESET board to recover\n");
+		do_reset (NULL, 0, 0, NULL);
+	}
+
+	status = fpga_boot(dst, len);
+	if (status != 0) {
+		printf("\nFPGA: Booting failed ");
+		switch (status) {
+		case ERROR_FPGA_PRG_INIT_LOW:
+			printf("(Timeout: INIT not low after asserting PROGRAM*)\n ");
+			break;
+		case ERROR_FPGA_PRG_INIT_HIGH:
+			printf("(Timeout: INIT not high after deasserting PROGRAM*)\n ");
+			break;
+		case ERROR_FPGA_PRG_DONE:
+			printf("(Timeout: DONE not high after programming FPGA)\n ");
+			break;
+		}
+
+		/* display infos on fpgaimage */
+		index = 15;
+		for (i=0; i<4; i++) {
+			len = dst[index];
+			printf("FPGA: %s\n", &(dst[index+1]));
+			index += len+3;
+		}
+		putc ('\n');
+		/* delayed reboot */
+		for (i=20; i>0; i--) {
+			printf("Rebooting in %2d seconds \r",i);
+			for (index=0;index<1000;index++)
+				udelay(1000);
+		}
+		putc ('\n');
+		do_reset(NULL, 0, 0, NULL);
+	}
+
+	puts("FPGA:  ");
+
+	/* display infos on fpgaimage */
+	index = 15;
+	for (i=0; i<4; i++) {
+		len = dst[index];
+		printf("%s ", &(dst[index+1]));
+		index += len+3;
+	}
+	putc ('\n');
+
+	free(dst);
+
+	/*
+	 * Reset FPGA via FPGA_DATA pin
+	 */
+	SET_FPGA(FPGA_PRG | FPGA_CLK);
+	udelay(1000); /* wait 1ms */
+	SET_FPGA(FPGA_PRG | FPGA_CLK | FPGA_DATA);
+	udelay(1000); /* wait 1ms */
+
+	/*
+	 * Reset external DUARTs
+	 */
+	out32(GPIO0_OR, in32(GPIO0_OR) | CFG_DUART_RST); /* set reset to high */
+	udelay(10); /* wait 10us */
+	out32(GPIO0_OR, in32(GPIO0_OR) & ~CFG_DUART_RST); /* set reset to low */
+	udelay(1000); /* wait 1ms */
+
+	/*
+	 * Set NAND-FLASH GPIO signals to default
+	 */
+	out32(GPIO0_OR, in32(GPIO0_OR) & ~(CFG_NAND_CLE | CFG_NAND_ALE));
+	out32(GPIO0_OR, in32(GPIO0_OR) | CFG_NAND_CE);
+
+	/*
+	 * Enable interrupts in exar duart mcr[3]
+	 */
+	*duart0_mcr = 0x08;
+	*duart1_mcr = 0x08;
+#endif
+
+	return (0);
+}
+
+
+/*
+ * Check Board Identity:
+ */
+
+int checkboard (void)
+{
+	unsigned char str[64];
+	int i = getenv_r ("serial#", str, sizeof(str));
+
+	puts ("Board: ");
+
+	if (i == -1) {
+		puts ("### No HW ID - assuming PLU405");
+	} else {
+		puts(str);
+	}
+
+	putc ('\n');
+
+	return 0;
+}
+
+/* ------------------------------------------------------------------------- */
+
+long int initdram (int board_type)
+{
+	unsigned long val;
+
+	mtdcr(memcfga, mem_mb0cf);
+	val = mfdcr(memcfgd);
+
+#if 0
+	printf("\nmb0cf=%x\n", val); /* test-only */
+	printf("strap=%x\n", mfdcr(strap)); /* test-only */
+#endif
+
+	return (4*1024*1024 << ((val & 0x000e0000) >> 17));
+}
+
+/* ------------------------------------------------------------------------- */
+
+int testdram (void)
+{
+	/* TODO: XXX XXX XXX */
+	printf ("test: 16 MB - ok\n");
+
+	return (0);
+}
+
+/* ------------------------------------------------------------------------- */
+
+#ifdef CONFIG_IDE_RESET
+void ide_set_reset(int on)
+{
+	volatile unsigned short *fpga_mode =
+		(unsigned short *)((ulong)CFG_FPGA_BASE_ADDR + CFG_FPGA_CTRL);
+
+	/*
+	 * Assert or deassert CompactFlash Reset Pin
+	 */
+	if (on) {		/* assert RESET */
+		*fpga_mode &= ~(CFG_FPGA_CTRL_CF_RESET);
+	} else {		/* release RESET */
+		*fpga_mode |= CFG_FPGA_CTRL_CF_RESET;
+	}
+}
+#endif /* CONFIG_IDE_RESET */
+
+
+#if (CONFIG_COMMANDS & CFG_CMD_NAND)
+#include <linux/mtd/nand.h>
+extern struct nand_chip nand_dev_desc[CFG_MAX_NAND_DEVICE];
+
+void nand_init(void)
+{
+	nand_probe(CFG_NAND_BASE);
+	if (nand_dev_desc[0].ChipID != NAND_ChipID_UNKNOWN) {
+		print_size(nand_dev_desc[0].totlen, "\n");
+	}
+}
+#endif
--- a/board/esd/plu405/u-boot.lds
+++ b/board/esd/plu405/u-boot.lds
@@ -0,0 +1,148 @@
+/*
+ * (C) Copyright 2000
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_ARCH(powerpc)
+SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
+/* Do we need any of these for elf?
+   __DYNAMIC = 0;    */
+SECTIONS
+{
+  .resetvec 0xFFFFFFFC :
+  {
+    *(.resetvec)
+  } = 0xffff
+
+  /* Read-only sections, merged into text segment: */
+  . = + SIZEOF_HEADERS;
+  .interp : { *(.interp) }
+  .hash          : { *(.hash)		}
+  .dynsym        : { *(.dynsym)		}
+  .dynstr        : { *(.dynstr)		}
+  .rel.text      : { *(.rel.text)		}
+  .rela.text     : { *(.rela.text) 	}
+  .rel.data      : { *(.rel.data)		}
+  .rela.data     : { *(.rela.data) 	}
+  .rel.rodata    : { *(.rel.rodata) 	}
+  .rela.rodata   : { *(.rela.rodata) 	}
+  .rel.got       : { *(.rel.got)		}
+  .rela.got      : { *(.rela.got)		}
+  .rel.ctors     : { *(.rel.ctors)	}
+  .rela.ctors    : { *(.rela.ctors)	}
+  .rel.dtors     : { *(.rel.dtors)	}
+  .rela.dtors    : { *(.rela.dtors)	}
+  .rel.bss       : { *(.rel.bss)		}
+  .rela.bss      : { *(.rela.bss)		}
+  .rel.plt       : { *(.rel.plt)		}
+  .rela.plt      : { *(.rela.plt)		}
+  .init          : { *(.init)	}
+  .plt : { *(.plt) }
+  .text      :
+  {
+    /* WARNING - the following is hand-optimized to fit within	*/
+    /* the sector layout of our flash chips!	XXX FIXME XXX	*/
+
+    cpu/ppc4xx/start.o	(.text)
+    cpu/ppc4xx/traps.o	(.text)
+    cpu/ppc4xx/interrupts.o	(.text)
+    cpu/ppc4xx/serial.o	(.text)
+    cpu/ppc4xx/cpu_init.o	(.text)
+    cpu/ppc4xx/speed.o	(.text)
+    cpu/ppc4xx/405gp_enet.o	(.text)
+    common/dlmalloc.o	(.text)
+    lib_generic/crc32.o		(.text)
+    lib_ppc/extable.o	(.text)
+    lib_generic/zlib.o		(.text)
+
+/*    . = env_offset;*/
+/*    common/environment.o(.text)*/
+
+    *(.text)
+    *(.fixup)
+    *(.got1)
+  }
+  _etext = .;
+  PROVIDE (etext = .);
+  .rodata    :
+  {
+    *(.rodata)
+    *(.rodata1)
+    *(.rodata.str1.4)
+  }
+  .fini      : { *(.fini)    } =0
+  .ctors     : { *(.ctors)   }
+  .dtors     : { *(.dtors)   }
+
+  /* Read-write section, merged into data segment: */
+  . = (. + 0x00FF) & 0xFFFFFF00;
+  _erotext = .;
+  PROVIDE (erotext = .);
+  .reloc   :
+  {
+    *(.got)
+    _GOT2_TABLE_ = .;
+    *(.got2)
+    _FIXUP_TABLE_ = .;
+    *(.fixup)
+  }
+  __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
+  __fixup_entries = (. - _FIXUP_TABLE_)>>2;
+
+  .data    :
+  {
+    *(.data)
+    *(.data1)
+    *(.sdata)
+    *(.sdata2)
+    *(.dynamic)
+    CONSTRUCTORS
+  }
+  _edata  =  .;
+  PROVIDE (edata = .);
+
+  __u_boot_cmd_start = .;
+  .u_boot_cmd : { *(.u_boot_cmd) }
+  __u_boot_cmd_end = .;
+
+
+  __start___ex_table = .;
+  __ex_table : { *(__ex_table) }
+  __stop___ex_table = .;
+
+  . = ALIGN(256);
+  __init_begin = .;
+  .text.init : { *(.text.init) }
+  .data.init : { *(.data.init) }
+  . = ALIGN(256);
+  __init_end = .;
+
+  __bss_start = .;
+  .bss       :
+  {
+   *(.sbss) *(.scommon)
+   *(.dynbss)
+   *(.bss)
+   *(COMMON)
+  }
+  _end = . ;
+  PROVIDE (end = .);
+}
--- a/board/esd/pmc405/Makefile
+++ b/board/esd/pmc405/Makefile
@@ -25,7 +25,12 @@ include $(TOPDIR)/config.mk

 LIB	= lib$(BOARD).a

-OBJS	= $(BOARD).o strataflash.o
+# Objects for Xilinx JTAG programming (CPLD)
+CPLD    = ../common/xilinx_jtag/lenval.o \
+	  ../common/xilinx_jtag/micro.o \
+	  ../common/xilinx_jtag/ports.o
+
+OBJS	= $(BOARD).o strataflash.o $(CPLD)

 $(LIB):	$(OBJS) $(SOBJS)
 	$(AR) crv $@ $(OBJS)
--- a/board/esd/pmc405/fpgadata.c
+++ b/board/esd/pmc405/fpgadata.c
--- a/board/esd/pmc405/pmc405.c
+++ b/board/esd/pmc405/pmc405.c
@@ -26,11 +26,13 @@
 #include <command.h>
 #include <malloc.h>

-/* ------------------------------------------------------------------------- */

-
-/* Prototypes */
-int gunzip(void *, int, unsigned char *, int *);
+/* fpga configuration data - not compressed, generated by bin2c */
+const unsigned char fpgadata[] =
+{
+#include "fpgadata.c"
+};
+int filesize = sizeof(fpgadata);


 int board_pre_init (void)
@@ -74,104 +76,6 @@ int misc_init_f (void)

 int misc_init_r (void)
 {
-#if 0 /* test-only */
-	DECLARE_GLOBAL_DATA_PTR;
-	volatile unsigned short *fpga_mode =
-		(unsigned short *)((ulong)CFG_FPGA_BASE_ADDR + CFG_FPGA_CTRL);
-	volatile unsigned char *duart0_mcr =
-		(unsigned char *)((ulong)DUART0_BA + 4);
-	volatile unsigned char *duart1_mcr =
-		(unsigned char *)((ulong)DUART1_BA + 4);
-	bd_t *bd = gd->bd;
-	char *	tmp;                    /* Temporary char pointer      */
-	unsigned char *dst;
-	ulong len = sizeof(fpgadata);
-	int status;
-	int index;
-	int i;
-	unsigned long cntrl0Reg;
-
-	/*
-	 * Setup GPIO pins (CS6+CS7 as GPIO)
-	 */
-	cntrl0Reg = mfdcr(cntrl0);
-	mtdcr(cntrl0, cntrl0Reg | 0x00300000);
-
-	dst = malloc(CFG_FPGA_MAX_SIZE);
-	if (gunzip (dst, CFG_FPGA_MAX_SIZE, (uchar *)fpgadata, (int *)&len) != 0) {
-		printf ("GUNZIP ERROR - must RESET board to recover\n");
-		do_reset (NULL, 0, 0, NULL);
-	}
-
-	status = fpga_boot(dst, len);
-	if (status != 0) {
-		printf("\nFPGA: Booting failed ");
-		switch (status) {
-		case ERROR_FPGA_PRG_INIT_LOW:
-			printf("(Timeout: INIT not low after asserting PROGRAM*)\n ");
-			break;
-		case ERROR_FPGA_PRG_INIT_HIGH:
-			printf("(Timeout: INIT not high after deasserting PROGRAM*)\n ");
-			break;
-		case ERROR_FPGA_PRG_DONE:
-			printf("(Timeout: DONE not high after programming FPGA)\n ");
-			break;
-		}
-
-		/* display infos on fpgaimage */
-		index = 15;
-		for (i=0; i<4; i++) {
-			len = dst[index];
-			printf("FPGA: %s\n", &(dst[index+1]));
-			index += len+3;
-		}
-		putc ('\n');
-		/* delayed reboot */
-		for (i=20; i>0; i--) {
-			printf("Rebooting in %2d seconds \r",i);
-			for (index=0;index<1000;index++)
-				udelay(1000);
-		}
-		putc ('\n');
-		do_reset(NULL, 0, 0, NULL);
-	}
-
-	/* restore gpio/cs settings */
-	mtdcr(cntrl0, cntrl0Reg);
-
-	puts("FPGA:  ");
-
-	/* display infos on fpgaimage */
-	index = 15;
-	for (i=0; i<4; i++) {
-		len = dst[index];
-		printf("%s ", &(dst[index+1]));
-		index += len+3;
-	}
-	putc ('\n');
-
-	free(dst);
-
-	/*
-	 * Reset FPGA via FPGA_DATA pin
-	 */
-	SET_FPGA(FPGA_PRG | FPGA_CLK);
-	udelay(1000); /* wait 1ms */
-	SET_FPGA(FPGA_PRG | FPGA_CLK | FPGA_DATA);
-	udelay(1000); /* wait 1ms */
-
-	/*
-	 * Enable power on PS/2 interface
-	 */
-	*fpga_mode |= CFG_FPGA_CTRL_PS2_RESET;
-
-	/*
-	 * Enable interrupts in exar duart mcr[3]
-	 */
-	*duart0_mcr = 0x08;
-	*duart1_mcr = 0x08;
-#endif
-
 	return (0);
 }

@@ -188,7 +92,7 @@ int checkboard (void)
 	puts ("Board: ");

 	if (i == -1) {
-		puts ("### No HW ID - assuming ABG405");
+		puts ("### No HW ID - assuming PMC405");
 	} else {
 		puts(str);
 	}
--- a/board/esd/voh405/Makefile
+++ b/board/esd/voh405/Makefile
@@ -0,0 +1,46 @@
+#
+# (C) Copyright 2000
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB	= lib$(BOARD).a
+
+OBJS	= $(BOARD).o flash.o
+
+$(LIB):	$(OBJS) $(SOBJS)
+	$(AR) crv $@ $(OBJS)
+
+clean:
+	rm -f $(SOBJS) $(OBJS)
+
+distclean:	clean
+	rm -f $(LIB) core *.bak .depend
+
+#########################################################################
+
+.depend:	Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
+		$(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
+
+sinclude .depend
+
+#########################################################################
--- a/board/esd/voh405/config.mk
+++ b/board/esd/voh405/config.mk
@@ -0,0 +1,29 @@
+#
+# (C) Copyright 2000
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+#
+# esd VOH405 boards
+#
+
+TEXT_BASE = 0xFFFC0000
+#TEXT_BASE = 0x00FC0000
--- a/board/esd/voh405/flash.c
+++ b/board/esd/voh405/flash.c
@@ -0,0 +1,101 @@
+/*
+ * (C) Copyright 2001
+ * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <ppc4xx.h>
+#include <asm/processor.h>
+
+/*
+ * include common flash code (for esd boards)
+ */
+#include "../common/flash.c"
+
+/*-----------------------------------------------------------------------
+ * Functions
+ */
+static ulong flash_get_size (vu_long * addr, flash_info_t * info);
+static void flash_get_offsets (ulong base, flash_info_t * info);
+
+/*-----------------------------------------------------------------------
+ */
+
+unsigned long flash_init (void)
+{
+	unsigned long size_b0;
+	int i;
+	uint pbcr;
+	unsigned long base_b0;
+	int size_val = 0;
+
+	/* Init: no FLASHes known */
+	for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
+		flash_info[i].flash_id = FLASH_UNKNOWN;
+	}
+
+	/* Static FLASH Bank configuration here - FIXME XXX */
+
+	size_b0 = flash_get_size((vu_long *)FLASH_BASE0_PRELIM, &flash_info[0]);
+
+	if (flash_info[0].flash_id == FLASH_UNKNOWN) {
+		printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
+			size_b0, size_b0<<20);
+	}
+
+	/* Setup offsets */
+	flash_get_offsets (-size_b0, &flash_info[0]);
+
+	/* Re-do sizing to get full correct info */
+	mtdcr(ebccfga, pb0cr);
+	pbcr = mfdcr(ebccfgd);
+	mtdcr(ebccfga, pb0cr);
+	base_b0 = -size_b0;
+	switch (size_b0) {
+	case 1 << 20:
+		size_val = 0;
+		break;
+	case 2 << 20:
+		size_val = 1;
+		break;
+	case 4 << 20:
+		size_val = 2;
+		break;
+	case 8 << 20:
+		size_val = 3;
+		break;
+	case 16 << 20:
+		size_val = 4;
+		break;
+	}
+	pbcr = (pbcr & 0x0001ffff) | base_b0 | (size_val << 17);
+	mtdcr(ebccfgd, pbcr);
+
+	/* Monitor protection ON by default */
+	(void)flash_protect(FLAG_PROTECT_SET,
+			    -CFG_MONITOR_LEN,
+			    0xffffffff,
+			    &flash_info[0]);
+
+	flash_info[0].size = size_b0;
+
+	return (size_b0);
+}
--- a/board/esd/voh405/fpgadata.c
+++ b/board/esd/voh405/fpgadata.c
--- a/board/esd/voh405/u-boot.lds
+++ b/board/esd/voh405/u-boot.lds
@@ -0,0 +1,148 @@
+/*
+ * (C) Copyright 2000
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_ARCH(powerpc)
+SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
+/* Do we need any of these for elf?
+   __DYNAMIC = 0;    */
+SECTIONS
+{
+  .resetvec 0xFFFFFFFC :
+  {
+    *(.resetvec)
+  } = 0xffff
+
+  /* Read-only sections, merged into text segment: */
+  . = + SIZEOF_HEADERS;
+  .interp : { *(.interp) }
+  .hash          : { *(.hash)		}
+  .dynsym        : { *(.dynsym)		}
+  .dynstr        : { *(.dynstr)		}
+  .rel.text      : { *(.rel.text)		}
+  .rela.text     : { *(.rela.text) 	}
+  .rel.data      : { *(.rel.data)		}
+  .rela.data     : { *(.rela.data) 	}
+  .rel.rodata    : { *(.rel.rodata) 	}
+  .rela.rodata   : { *(.rela.rodata) 	}
+  .rel.got       : { *(.rel.got)		}
+  .rela.got      : { *(.rela.got)		}
+  .rel.ctors     : { *(.rel.ctors)	}
+  .rela.ctors    : { *(.rela.ctors)	}
+  .rel.dtors     : { *(.rel.dtors)	}
+  .rela.dtors    : { *(.rela.dtors)	}
+  .rel.bss       : { *(.rel.bss)		}
+  .rela.bss      : { *(.rela.bss)		}
+  .rel.plt       : { *(.rel.plt)		}
+  .rela.plt      : { *(.rela.plt)		}
+  .init          : { *(.init)	}
+  .plt : { *(.plt) }
+  .text      :
+  {
+    /* WARNING - the following is hand-optimized to fit within	*/
+    /* the sector layout of our flash chips!	XXX FIXME XXX	*/
+
+    cpu/ppc4xx/start.o	(.text)
+    cpu/ppc4xx/traps.o	(.text)
+    cpu/ppc4xx/interrupts.o	(.text)
+    cpu/ppc4xx/serial.o	(.text)
+    cpu/ppc4xx/cpu_init.o	(.text)
+    cpu/ppc4xx/speed.o	(.text)
+    cpu/ppc4xx/405gp_enet.o	(.text)
+    common/dlmalloc.o	(.text)
+    lib_generic/crc32.o		(.text)
+    lib_ppc/extable.o	(.text)
+    lib_generic/zlib.o		(.text)
+
+/*    . = env_offset;*/
+/*    common/environment.o(.text)*/
+
+    *(.text)
+    *(.fixup)
+    *(.got1)
+  }
+  _etext = .;
+  PROVIDE (etext = .);
+  .rodata    :
+  {
+    *(.rodata)
+    *(.rodata1)
+    *(.rodata.str1.4)
+  }
+  .fini      : { *(.fini)    } =0
+  .ctors     : { *(.ctors)   }
+  .dtors     : { *(.dtors)   }
+
+  /* Read-write section, merged into data segment: */
+  . = (. + 0x00FF) & 0xFFFFFF00;
+  _erotext = .;
+  PROVIDE (erotext = .);
+  .reloc   :
+  {
+    *(.got)
+    _GOT2_TABLE_ = .;
+    *(.got2)
+    _FIXUP_TABLE_ = .;
+    *(.fixup)
+  }
+  __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
+  __fixup_entries = (. - _FIXUP_TABLE_)>>2;
+
+  .data    :
+  {
+    *(.data)
+    *(.data1)
+    *(.sdata)
+    *(.sdata2)
+    *(.dynamic)
+    CONSTRUCTORS
+  }
+  _edata  =  .;
+  PROVIDE (edata = .);
+
+  __u_boot_cmd_start = .;
+  .u_boot_cmd : { *(.u_boot_cmd) }
+  __u_boot_cmd_end = .;
+
+
+  __start___ex_table = .;
+  __ex_table : { *(__ex_table) }
+  __stop___ex_table = .;
+
+  . = ALIGN(256);
+  __init_begin = .;
+  .text.init : { *(.text.init) }
+  .data.init : { *(.data.init) }
+  . = ALIGN(256);
+  __init_end = .;
+
+  __bss_start = .;
+  .bss       :
+  {
+   *(.sbss) *(.scommon)
+   *(.dynbss)
+   *(.bss)
+   *(COMMON)
+  }
+  _end = . ;
+  PROVIDE (end = .);
+}
--- a/board/esd/voh405/voh405.c
+++ b/board/esd/voh405/voh405.c
@@ -0,0 +1,273 @@
+/*
+ * (C) Copyright 2001-2003
+ * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/processor.h>
+#include <command.h>
+#include <malloc.h>
+
+/* ------------------------------------------------------------------------- */
+
+#if 0
+#define FPGA_DEBUG
+#endif
+
+extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
+
+/* fpga configuration data - gzip compressed and generated by bin2c */
+const unsigned char fpgadata[] =
+{
+#include "fpgadata.c"
+};
+
+/*
+ * include common fpga code (for esd boards)
+ */
+#include "../common/fpga.c"
+
+
+/* Prototypes */
+int gunzip(void *, int, unsigned char *, int *);
+
+
+int board_pre_init (void)
+{
+	/*
+	 * IRQ 0-15  405GP internally generated; active high; level sensitive
+	 * IRQ 16    405GP internally generated; active low; level sensitive
+	 * IRQ 17-24 RESERVED
+	 * IRQ 25 (EXT IRQ 0) CAN0; active low; level sensitive
+	 * IRQ 26 (EXT IRQ 1) SER0 ; active low; level sensitive
+	 * IRQ 27 (EXT IRQ 2) SER1; active low; level sensitive
+	 * IRQ 28 (EXT IRQ 3) FPGA 0; active low; level sensitive
+	 * IRQ 29 (EXT IRQ 4) FPGA 1; active low; level sensitive
+	 * IRQ 30 (EXT IRQ 5) PCI INTA; active low; level sensitive
+	 * IRQ 31 (EXT IRQ 6) COMPACT FLASH; active high; level sensitive
+	 */
+	mtdcr(uicsr, 0xFFFFFFFF);       /* clear all ints */
+	mtdcr(uicer, 0x00000000);       /* disable all ints */
+	mtdcr(uiccr, 0x00000000);       /* set all to be non-critical*/
+	mtdcr(uicpr, 0xFFFFFFB5);       /* set int polarities */
+	mtdcr(uictr, 0x10000000);       /* set int trigger levels */
+	mtdcr(uicvcr, 0x00000001);      /* set vect base=0,INT0 highest priority*/
+	mtdcr(uicsr, 0xFFFFFFFF);       /* clear all ints */
+
+	/*
+	 * EBC Configuration Register: set ready timeout to 512 ebc-clks -> ca. 15 us
+	 */
+	mtebc (epcr, 0xa8400000); /* ebc always driven */
+
+	return 0;
+}
+
+
+/* ------------------------------------------------------------------------- */
+
+int misc_init_f (void)
+{
+	return 0;  /* dummy implementation */
+}
+
+
+int misc_init_r (void)
+{
+	volatile unsigned char *duart0_mcr = (unsigned char *)((ulong)DUART0_BA + 4);
+	volatile unsigned char *duart1_mcr = (unsigned char *)((ulong)DUART1_BA + 4);
+	volatile unsigned short *lcd_reg =
+		(unsigned short *)((ulong)CFG_FPGA_BASE_ADDR + CFG_FPGA_CTRL + 4);
+	unsigned char *dst;
+	ulong len = sizeof(fpgadata);
+	int status;
+	int index;
+	int i;
+
+	dst = malloc(CFG_FPGA_MAX_SIZE);
+	if (gunzip (dst, CFG_FPGA_MAX_SIZE, (uchar *)fpgadata, (int *)&len) != 0) {
+		printf ("GUNZIP ERROR - must RESET board to recover\n");
+		do_reset (NULL, 0, 0, NULL);
+	}
+
+	status = fpga_boot(dst, len);
+	if (status != 0) {
+		printf("\nFPGA: Booting failed ");
+		switch (status) {
+		case ERROR_FPGA_PRG_INIT_LOW:
+			printf("(Timeout: INIT not low after asserting PROGRAM*)\n ");
+			break;
+		case ERROR_FPGA_PRG_INIT_HIGH:
+			printf("(Timeout: INIT not high after deasserting PROGRAM*)\n ");
+			break;
+		case ERROR_FPGA_PRG_DONE:
+			printf("(Timeout: DONE not high after programming FPGA)\n ");
+			break;
+		}
+
+		/* display infos on fpgaimage */
+		index = 15;
+		for (i=0; i<4; i++) {
+			len = dst[index];
+			printf("FPGA: %s\n", &(dst[index+1]));
+			index += len+3;
+		}
+		putc ('\n');
+		/* delayed reboot */
+		for (i=20; i>0; i--) {
+			printf("Rebooting in %2d seconds \r",i);
+			for (index=0;index<1000;index++)
+				udelay(1000);
+		}
+		putc ('\n');
+		do_reset(NULL, 0, 0, NULL);
+	}
+
+	puts("FPGA:  ");
+
+	/* display infos on fpgaimage */
+	index = 15;
+	for (i=0; i<4; i++) {
+		len = dst[index];
+		printf("%s ", &(dst[index+1]));
+		index += len+3;
+	}
+	putc ('\n');
+
+	free(dst);
+
+	/*
+	 * Reset FPGA via FPGA_DATA pin
+	 */
+	SET_FPGA(FPGA_PRG | FPGA_CLK);
+	udelay(1000); /* wait 1ms */
+	SET_FPGA(FPGA_PRG | FPGA_CLK | FPGA_DATA);
+	udelay(1000); /* wait 1ms */
+
+	/*
+	 * Reset external DUARTs
+	 */
+	out32(GPIO0_OR, in32(GPIO0_OR) | CFG_DUART_RST); /* set reset to high */
+	udelay(10); /* wait 10us */
+	out32(GPIO0_OR, in32(GPIO0_OR) & ~CFG_DUART_RST); /* set reset to low */
+	udelay(1000); /* wait 1ms */
+
+	/*
+	 * Set NAND-FLASH GPIO signals to default
+	 */
+	out32(GPIO0_OR, in32(GPIO0_OR) & ~(CFG_NAND_CLE | CFG_NAND_ALE));
+	out32(GPIO0_OR, in32(GPIO0_OR) | CFG_NAND_CE);
+
+	/*
+	 * Enable interrupts in exar duart mcr[3]
+	 */
+	*duart0_mcr = 0x08;
+	*duart1_mcr = 0x08;
+
+	/*
+	 * Set default contrast voltage on epson vga controller
+	 */
+	*lcd_reg = 0x4848;
+
+	return (0);
+}
+
+
+/*
+ * Check Board Identity:
+ */
+
+int checkboard (void)
+{
+	unsigned char str[64];
+	int i = getenv_r ("serial#", str, sizeof(str));
+
+	puts ("Board: ");
+
+	if (i == -1) {
+		puts ("### No HW ID - assuming VOH405");
+	} else {
+		puts(str);
+	}
+
+	putc ('\n');
+
+	return 0;
+}
+
+/* ------------------------------------------------------------------------- */
+
+long int initdram (int board_type)
+{
+	unsigned long val;
+
+	mtdcr(memcfga, mem_mb0cf);
+	val = mfdcr(memcfgd);
+
+#if 0
+	printf("\nmb0cf=%x\n", val); /* test-only */
+	printf("strap=%x\n", mfdcr(strap)); /* test-only */
+#endif
+
+	return (4*1024*1024 << ((val & 0x000e0000) >> 17));
+}
+
+/* ------------------------------------------------------------------------- */
+
+int testdram (void)
+{
+	/* TODO: XXX XXX XXX */
+	printf ("test: 16 MB - ok\n");
+
+	return (0);
+}
+
+/* ------------------------------------------------------------------------- */
+
+#ifdef CONFIG_IDE_RESET
+void ide_set_reset(int on)
+{
+	volatile unsigned short *fpga_mode =
+		(unsigned short *)((ulong)CFG_FPGA_BASE_ADDR + CFG_FPGA_CTRL);
+
+	/*
+	 * Assert or deassert CompactFlash Reset Pin
+	 */
+	if (on) {		/* assert RESET */
+		*fpga_mode &= ~(CFG_FPGA_CTRL_CF_RESET);
+	} else {		/* release RESET */
+		*fpga_mode |= CFG_FPGA_CTRL_CF_RESET;
+	}
+}
+#endif /* CONFIG_IDE_RESET */
+
+
+#if (CONFIG_COMMANDS & CFG_CMD_NAND)
+#include <linux/mtd/nand.h>
+extern struct nand_chip nand_dev_desc[CFG_MAX_NAND_DEVICE];
+
+void nand_init(void)
+{
+	nand_probe(CFG_NAND_BASE);
+	if (nand_dev_desc[0].ChipID != NAND_ChipID_UNKNOWN) {
+		print_size(nand_dev_desc[0].totlen, "\n");
+	}
+}
+#endif
--- a/board/etin/debris/Makefile
+++ b/board/etin/debris/Makefile
@@ -0,0 +1,40 @@
+#
+# (C) Copyright 2000
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB	= lib$(BOARD).a
+
+OBJS =  $(BOARD).o flash.o phantom.o
+
+$(LIB):	.depend $(OBJS)
+	$(AR) crv $@ $(OBJS)
+
+#########################################################################
+
+.depend:	Makefile $(OBJS:.o=.c)
+		$(CC) -M $(CFLAGS) $(OBJS:.o=.c) > $@
+
+sinclude .depend
+
+#########################################################################
--- a/board/etin/debris/config.mk
+++ b/board/etin/debris/config.mk
@@ -0,0 +1,31 @@
+#
+# (C) Copyright 2000, 2001
+# Sangmoon, Etin Systems, dogoil@etinsys.com.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+#
+# Debris boards
+#
+
+#TEXT_BASE = 0x00090000
+TEXT_BASE = 0xFFF00000
+
+PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE)
--- a/board/etin/debris/debris.c
+++ b/board/etin/debris/debris.c
@@ -0,0 +1,158 @@
+/*
+ * (C) Copyright 2000
+ * Sangmoon Kim, Etin Systems. dogoil@etinsys.com.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <mpc824x.h>
+#include <pci.h>
+
+int checkboard (void)
+{
+	/*TODO: Check processor type */
+
+	puts (	"Board: Debris "
+#ifdef CONFIG_MPC8240
+		"8240"
+#endif
+#ifdef CONFIG_MPC8245
+		"8245"
+#endif
+		" ##Test not implemented yet##\n");
+	return 0;
+}
+
+#if 0 	/* NOT USED */
+int checkflash (void)
+{
+	/* TODO: XXX XXX XXX */
+	printf ("## Test not implemented yet ##\n");
+
+	return (0);
+}
+#endif
+
+long int initdram (int board_type)
+{
+	int		 i, cnt;
+	volatile uchar * base= CFG_SDRAM_BASE;
+	volatile ulong * addr;
+	ulong		 save[32];
+	ulong		 val, ret  = 0;
+
+	for (i=0, cnt=(CFG_MAX_RAM_SIZE / sizeof(long)) >> 1; cnt > 0; cnt >>= 1) {
+		addr = (volatile ulong *)base + cnt;
+		save[i++] = *addr;
+		*addr = ~cnt;
+	}
+
+	addr = (volatile ulong *)base;
+	save[i] = *addr;
+	*addr = 0;
+
+	if (*addr != 0) {
+		*addr = save[i];
+		goto Done;
+	}
+
+	for (cnt = 1; cnt <= CFG_MAX_RAM_SIZE / sizeof(long); cnt <<= 1) {
+		addr = (volatile ulong *)base + cnt;
+		val = *addr;
+		*addr = save[--i];
+		if (val != ~cnt) {
+/*			ulong new_bank0_end = cnt * sizeof(long) - 1;
+			ulong mear1  = mpc824x_mpc107_getreg(MEAR1);
+			ulong emear1 = mpc824x_mpc107_getreg(EMEAR1);
+			mear1 =  (mear1  & 0xFFFFFF00) |
+			((new_bank0_end & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT);
+			emear1 = (emear1 & 0xFFFFFF00) |
+			((new_bank0_end & MICR_ADDR_MASK) >> MICR_EADDR_SHIFT);
+			mpc824x_mpc107_setreg(MEAR1,  mear1);
+			mpc824x_mpc107_setreg(EMEAR1, emear1);*/
+
+			ret = cnt * sizeof(long);
+			goto Done;
+		}
+	}
+
+	ret = CFG_MAX_RAM_SIZE;
+Done:
+	return ret;
+}
+
+/*
+ * Initialize PCI Devices, report devices found.
+ */
+#ifndef CONFIG_PCI_PNP
+static struct pci_config_table pci_debris_config_table[] = {
+	{ PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 0x0f, PCI_ANY_ID,
+	  pci_cfgfunc_config_device, { PCI_ENET0_IOADDR,
+				       PCI_ENET0_MEMADDR,
+				       PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER }},
+	{ PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 0x10, PCI_ANY_ID,
+	  pci_cfgfunc_config_device, { PCI_ENET1_IOADDR,
+				       PCI_ENET1_MEMADDR,
+				       PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER }},
+	{ }
+};
+#endif
+
+struct pci_controller hose = {
+#ifndef CONFIG_PCI_PNP
+	config_table: pci_debris_config_table,
+#endif
+};
+
+void pci_init_board(void)
+{
+	pci_mpc824x_init(&hose);
+}
+
+void *nvram_read(void *dest, const long src, size_t count)
+{
+	volatile uchar *d = (volatile uchar*) dest;
+	volatile uchar *s = (volatile uchar*) src;
+	while(count--) {
+		*d++ = *s++;
+		asm volatile("sync");
+	}
+	return dest;
+}
+
+void nvram_write(long dest, const void *src, size_t count)
+{
+	volatile uchar *d = (volatile uchar*)dest;
+	volatile uchar *s = (volatile uchar*)src;
+	while(count--) {
+		*d++ = *s++;
+		asm volatile("sync");
+	}
+}
+
+int misc_init_r(void)
+{
+	DECLARE_GLOBAL_DATA_PTR;
+
+	/* Write ethernet addr in NVRAM for VxWorks */
+	nvram_write(CFG_ENV_ADDR + CFG_NVRAM_VXWORKS_OFFS,
+			(char*)&gd->bd->bi_enetaddr[0], 6);
+	return 0;
+}
--- a/board/etin/debris/flash.c
+++ b/board/etin/debris/flash.c
@@ -0,0 +1,720 @@
+/*
+ * board/eva/flash.c
+ *
+ * (C) Copyright 2002
+ * Sangmoon Kim, Etin Systems, dogoil@etinsys.com.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/processor.h>
+#include <asm/pci_io.h>
+#include <mpc824x.h>
+
+int (*do_flash_erase)(flash_info_t*, uint32_t, uint32_t);
+int (*write_dword)(flash_info_t*, ulong, uint64_t);
+
+typedef uint64_t cfi_word;
+
+#define cfi_read(flash, addr) *((volatile cfi_word*)(flash->start[0] + addr))
+
+#define cfi_write(flash, val, addr) \
+	move64((cfi_word*)&val, \
+			(cfi_word*)(flash->start[0] + addr))
+
+#define CMD(x) ((((cfi_word)x)<<48)|(((cfi_word)x)<<32)|(((cfi_word)x)<<16)|(((cfi_word)x)))
+
+static void write32(unsigned long addr, uint32_t value)
+{
+	*(volatile uint32_t*)(addr) = value;
+	asm volatile("sync");
+}
+
+static uint32_t read32(unsigned long addr)
+{
+	uint32_t value;
+	value = *(volatile uint32_t*)addr;
+	asm volatile("sync");
+	return value;
+}
+
+static cfi_word cfi_cmd(flash_info_t *flash, uint8_t cmd, uint32_t addr)
+{
+	uint32_t base = flash->start[0];
+	uint32_t val=(cmd << 16) | cmd;
+	addr <<= 3;
+	write32(base + addr, val);
+	return addr;
+}
+
+static uint16_t cfi_read_query(flash_info_t *flash, uint32_t addr)
+{
+	uint32_t base = flash->start[0];
+	addr <<= 3;
+	return (uint16_t)read32(base + addr);
+}
+
+flash_info_t    flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
+
+static void move64(uint64_t *src, uint64_t *dest)
+{
+	asm volatile("lfd  0, 0(3)\n\t" /* fpr0   =  *scr       */
+	 "stfd 0, 0(4)"         /* *dest  =  fpr0       */
+	 : : : "fr0" );         /* Clobbers fr0         */
+	return;
+}
+
+static int cfi_write_dword(flash_info_t *flash, ulong dest, cfi_word data)
+{
+	unsigned long start;
+	cfi_word status = 0;
+
+	status = cfi_read(flash, dest);
+	data &= status;
+
+	cfi_cmd(flash, 0x40, 0);
+	cfi_write(flash, data, dest);
+
+	udelay(10);
+	start = get_timer (0);
+	for(;;) {
+		status = cfi_read(flash, dest);
+		status &= CMD(0x80);
+		if(status == CMD(0x80))
+			break;
+		if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
+			cfi_cmd(flash, 0xff, 0);
+			return 1;
+		}
+		udelay(1);
+	}
+	cfi_cmd(flash, 0xff, 0);
+
+	return 0;
+}
+
+static int jedec_write_dword (flash_info_t *flash, ulong dest, cfi_word data)
+{
+	ulong start;
+	cfi_word status = 0;
+
+	status = cfi_read(flash, dest);
+	if(status != CMD(0xffff)) return 2;
+
+	cfi_cmd(flash, 0xaa, 0x555);
+	cfi_cmd(flash, 0x55, 0x2aa);
+	cfi_cmd(flash, 0xa0, 0x555);
+
+	cfi_write(flash, data, dest);
+
+	udelay(10);
+	start = get_timer (0);
+	status = ~data;
+	while(status != data) {
+		if (get_timer(start) > CFG_FLASH_WRITE_TOUT)
+			return 1;
+		status = cfi_read(flash, dest);
+		udelay(1);
+	}
+	return 0;
+}
+
+static __inline__ unsigned long get_msr(void)
+{
+	unsigned long msr;
+	__asm__ __volatile__ ("mfmsr %0" : "=r" (msr) :);
+	return msr;
+}
+
+static __inline__ void set_msr(unsigned long msr)
+{
+	__asm__ __volatile__ ("mtmsr %0" : : "r" (msr));
+}
+
+int write_buff (flash_info_t *flash, uchar *src, ulong addr, ulong cnt)
+{
+	ulong wp;
+	int i, s, l, rc;
+	cfi_word data;
+	uint8_t *t = (uint8_t*)&data;
+	unsigned long base = flash->start[0];
+	uint32_t msr;
+
+	if (flash->flash_id == FLASH_UNKNOWN)
+		return 4;
+
+	if (cnt == 0)
+		return 0;
+
+	addr -= base;
+
+	msr = get_msr();
+	set_msr(msr|MSR_FP);
+
+	wp = (addr & ~7);   /* get lower word aligned address */
+
+	if((addr-wp) != 0) {
+		data = cfi_read(flash, wp);
+		s = addr & 7;
+		l = ( cnt < (8-s) ) ? cnt : (8-s);
+		for(i = 0; i < l; i++)
+			t[s+i] = *src++;
+		if ((rc = write_dword(flash, wp, data)) != 0)
+			goto DONE;
+		wp += 8;
+		cnt -= l;
+	}
+
+	while (cnt >= 8) {
+		for (i = 0; i < 8; i++)
+			t[i] = *src++;
+		if ((rc = write_dword(flash, wp, data)) != 0)
+			goto DONE;
+		wp  += 8;
+		cnt -= 8;
+	}
+
+	if (cnt == 0) {
+		rc = 0;
+		goto DONE;
+	}
+
+	data = cfi_read(flash, wp);
+	for(i = 0; i < cnt; i++)
+		t[i] = *src++;
+	rc = write_dword(flash, wp, data);
+DONE:
+	set_msr(msr);
+	return rc;
+}
+
+static int cfi_erase_oneblock(flash_info_t *flash, uint32_t sect)
+{
+	int sa;
+	int flag;
+	ulong start, last, now;
+	cfi_word status;
+
+	flag = disable_interrupts();
+
+	sa = (flash->start[sect] - flash->start[0]);
+	write32(flash->start[sect], 0x00200020);
+	write32(flash->start[sect], 0x00d000d0);
+
+	if (flag)
+		enable_interrupts();
+
+	udelay(1000);
+	start = get_timer (0);
+	last  = start;
+
+	for (;;) {
+		status = cfi_read(flash, sa);
+		status &= CMD(0x80);
+		if (status == CMD(0x80))
+			break;
+		if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
+			cfi_cmd(flash, 0xff, 0);
+			printf ("Timeout\n");
+			return ERR_TIMOUT;
+		}
+
+		if ((now - last) > 1000) {
+			serial_putc ('.');
+			last = now;
+		}
+		udelay(10);
+	}
+	cfi_cmd(flash, 0xff, 0);
+	return ERR_OK;
+}
+
+static int cfi_erase(flash_info_t *flash, uint32_t s_first, uint32_t s_last)
+{
+	int sect;
+	int rc = ERR_OK;
+
+	for (sect = s_first; sect <= s_last; sect++) {
+		if (flash->protect[sect] == 0) {
+			rc = cfi_erase_oneblock(flash, sect);
+			if (rc != ERR_OK) break;
+		}
+	}
+	printf (" done\n");
+	return rc;
+}
+
+static int jedec_erase(flash_info_t *flash, uint32_t s_first, uint32_t s_last)
+{
+	int sect;
+	cfi_word status;
+	int sa = -1;
+	int flag;
+	ulong start, last, now;
+
+	flag = disable_interrupts();
+
+	cfi_cmd(flash, 0xaa, 0x555);
+	cfi_cmd(flash, 0x55, 0x2aa);
+	cfi_cmd(flash, 0x80, 0x555);
+	cfi_cmd(flash, 0xaa, 0x555);
+	cfi_cmd(flash, 0x55, 0x2aa);
+	for ( sect = s_first; sect <= s_last; sect++) {
+		if (flash->protect[sect] == 0) {
+			sa = flash->start[sect] - flash->start[0];
+			write32(flash->start[sect], 0x00300030);
+		}
+	}
+	if (flag)
+		enable_interrupts();
+
+	if (sa < 0)
+		goto DONE;
+
+	udelay (1000);
+	start = get_timer (0);
+	last  = start;
+	for(;;) {
+		status = cfi_read(flash, sa);
+		if (status == CMD(0xffff))
+			break;
+
+		if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
+			printf ("Timeout\n");
+			return ERR_TIMOUT;
+		}
+
+		if ((now - last) > 1000) {
+			serial_putc ('.');
+			last = now;
+		}
+		udelay(10);
+	}
+DONE:
+	cfi_cmd(flash, 0xf0, 0);
+
+	printf (" done\n");
+
+	return ERR_OK;
+}
+
+int flash_erase (flash_info_t *flash, int s_first, int s_last)
+{
+	int sect;
+	int prot;
+
+	if ((s_first < 0) || (s_first > s_last)) {
+		if (flash->flash_id == FLASH_UNKNOWN)
+			printf ("- missing\n");
+		else
+			printf ("- no sectors to erase\n");
+		return ERR_NOT_ERASED;
+	}
+	if (flash->flash_id == FLASH_UNKNOWN) {
+		printf ("Can't erase unknown flash type - aborted\n");
+		return ERR_NOT_ERASED;
+	}
+
+	prot = 0;
+	for (sect = s_first; sect <= s_last; sect++)
+		if (flash->protect[sect]) prot++;
+
+	if (prot)
+		printf ("- Warning: %d protected sectors will not be erased!\n",
+					                        prot);
+	else
+		printf ("\n");
+
+	return do_flash_erase(flash, s_first, s_last);
+}
+
+struct jedec_flash_info {
+	const uint16_t mfr_id;
+	const uint16_t dev_id;
+	const char *name;
+	const int DevSize;
+	const int InterfaceDesc;
+	const int NumEraseRegions;
+	const ulong regions[4];
+};
+
+#define ERASEINFO(size,blocks) (size<<8)|(blocks-1)
+
+#define SIZE_1MiB 20
+#define SIZE_2MiB 21
+#define SIZE_4MiB 22
+
+static const struct jedec_flash_info jedec_table[] = {
+	{
+		mfr_id: (uint16_t)AMD_MANUFACT,
+		dev_id: (uint16_t)AMD_ID_LV800T,
+		name: "AMD AM29LV800T",
+		DevSize: SIZE_1MiB,
+		NumEraseRegions: 4,
+		regions: {ERASEINFO(0x10000,15),
+			  ERASEINFO(0x08000,1),
+			  ERASEINFO(0x02000,2),
+			  ERASEINFO(0x04000,1)
+		}
+	}, {
+		mfr_id: (uint16_t)AMD_MANUFACT,
+		dev_id: (uint16_t)AMD_ID_LV800B,
+		name: "AMD AM29LV800B",
+		DevSize: SIZE_1MiB,
+		NumEraseRegions: 4,
+		regions: {ERASEINFO(0x10000,15),
+		          ERASEINFO(0x08000,1),
+			  ERASEINFO(0x02000,2),
+			  ERASEINFO(0x04000,1)
+		}
+	}, {
+		mfr_id: (uint16_t)AMD_MANUFACT,
+		dev_id: (uint16_t)AMD_ID_LV160T,
+		name: "AMD AM29LV160T",
+		DevSize: SIZE_2MiB,
+		NumEraseRegions: 4,
+		regions: {ERASEINFO(0x10000,31),
+		          ERASEINFO(0x08000,1),
+			  ERASEINFO(0x02000,2),
+			  ERASEINFO(0x04000,1)
+		}
+	}, {
+		mfr_id: (uint16_t)AMD_MANUFACT,
+		dev_id: (uint16_t)AMD_ID_LV160B,
+		name: "AMD AM29LV160B",
+		DevSize: SIZE_2MiB,
+		NumEraseRegions: 4,
+		regions: {ERASEINFO(0x04000,1),
+		          ERASEINFO(0x02000,2),
+			  ERASEINFO(0x08000,1),
+			  ERASEINFO(0x10000,31)
+		}
+	}, {
+		mfr_id: (uint16_t)AMD_MANUFACT,
+		dev_id: (uint16_t)AMD_ID_LV320T,
+		name: "AMD AM29LV320T",
+		DevSize: SIZE_4MiB,
+		NumEraseRegions: 2,
+		regions: {ERASEINFO(0x10000,63),
+		          ERASEINFO(0x02000,8)
+		}
+
+	}, {
+		mfr_id: (uint16_t)AMD_MANUFACT,
+		dev_id: (uint16_t)AMD_ID_LV320B,
+		name: "AMD AM29LV320B",
+		DevSize: SIZE_4MiB,
+		NumEraseRegions: 2,
+		regions: {ERASEINFO(0x02000,8),
+		          ERASEINFO(0x10000,63)
+		}
+	}
+};
+
+static ulong cfi_init(uint32_t base,  flash_info_t *flash)
+{
+	int sector;
+	int block;
+	int block_count;
+	int offset = 0;
+	int reverse = 0;
+	int primary;
+	int mfr_id;
+	int dev_id;
+
+	flash->start[0] = base;
+	cfi_cmd(flash, 0xF0, 0);
+	cfi_cmd(flash, 0x98, 0);
+	if ( !( cfi_read_query(flash, 0x10) == 'Q' &&
+		cfi_read_query(flash, 0x11) == 'R' &&
+		cfi_read_query(flash, 0x12) == 'Y' )) {
+		cfi_cmd(flash, 0xff, 0);
+		return 0;
+	}
+
+	flash->size = 1 << cfi_read_query(flash, 0x27);
+	flash->size *= 4;
+	block_count = cfi_read_query(flash, 0x2c);
+	primary = cfi_read_query(flash, 0x15);
+	if ( cfi_read_query(flash, primary + 4) == 0x30)
+		reverse = (cfi_read_query(flash, 0x1) & 0x01);
+	else
+		reverse = (cfi_read_query(flash, primary+15) == 3);
+
+	flash->sector_count = 0;
+
+	for ( block = reverse ? block_count - 1	: 0;
+		      reverse ? block >= 0	: block < block_count;
+		      reverse ? block--		: block ++) {
+		int sector_size =
+			(cfi_read_query(flash, 0x2d + block*4+2) |
+			(cfi_read_query(flash, 0x2d + block*4+3) << 8)) << 8;
+		int sector_count =
+			(cfi_read_query(flash, 0x2d + block*4+0) |
+			(cfi_read_query(flash, 0x2d + block*4+1) << 8)) + 1;
+		for(sector = 0; sector < sector_count; sector++) {
+			flash->start[flash->sector_count++] = base + offset;
+			offset += sector_size * 4;
+		}
+	}
+	mfr_id = cfi_read_query(flash, 0x00);
+	dev_id = cfi_read_query(flash, 0x01);
+
+	cfi_cmd(flash, 0xff, 0);
+
+	flash->flash_id = (mfr_id << 16) | dev_id;
+
+	for (sector = 0; sector < flash->sector_count; sector++) {
+		write32(flash->start[sector], 0x00600060);
+		write32(flash->start[sector], 0x00d000d0);
+	}
+	cfi_cmd(flash, 0xff, 0);
+
+	for (sector = 0; sector < flash->sector_count; sector++)
+		flash->protect[sector] = 0;
+
+	do_flash_erase = cfi_erase;
+	write_dword = cfi_write_dword;
+
+	return flash->size;
+}
+
+static ulong jedec_init(unsigned long base, flash_info_t *flash)
+{
+	int i;
+	int block, block_count;
+	int sector, offset;
+	int mfr_id, dev_id;
+	flash->start[0] = base;
+	cfi_cmd(flash, 0xF0, 0x000);
+	cfi_cmd(flash, 0xAA, 0x555);
+	cfi_cmd(flash, 0x55, 0x2AA);
+	cfi_cmd(flash, 0x90, 0x555);
+	mfr_id = cfi_read_query(flash, 0x000);
+	dev_id = cfi_read_query(flash, 0x0001);
+	cfi_cmd(flash, 0xf0, 0x000);
+
+	for(i=0; i<sizeof(jedec_table)/sizeof(struct jedec_flash_info); i++) {
+		if((jedec_table[i].mfr_id == mfr_id) &&
+			(jedec_table[i].dev_id == dev_id)) {
+
+			flash->flash_id = (mfr_id << 16) | dev_id;
+			flash->size = 1 << jedec_table[0].DevSize;
+			flash->size *= 4;
+			block_count = jedec_table[i].NumEraseRegions;
+			offset = 0;
+			flash->sector_count = 0;
+			for (block = 0; block < block_count; block++) {
+				int sector_size = jedec_table[i].regions[block];
+				int sector_count = (sector_size & 0xff) + 1;
+				sector_size >>= 8;
+				for (sector=0; sector<sector_count; sector++) {
+					flash->start[flash->sector_count++] =
+						base + offset;
+					offset += sector_size * 4;
+				}
+			}
+			break;
+		}
+	}
+
+	for (sector = 0; sector < flash->sector_count; sector++)
+		flash->protect[sector] = 0;
+
+	do_flash_erase = jedec_erase;
+	write_dword = jedec_write_dword;
+
+	return flash->size;
+}
+
+inline void mtibat1u(unsigned int x)
+{
+	__asm__ __volatile__ ("mtspr   530, %0" :: "r" (x));
+}
+
+inline void mtibat1l(unsigned int x)
+{
+	__asm__ __volatile__ ("mtspr   531, %0" :: "r" (x));
+}
+
+inline void mtdbat1u(unsigned int x)
+{
+	__asm__ __volatile__ ("mtspr   538, %0" :: "r" (x));
+}
+
+inline void mtdbat1l(unsigned int x)
+{
+	__asm__ __volatile__ ("mtspr   539, %0" :: "r" (x));
+}
+
+unsigned long flash_init (void)
+{
+	unsigned long size = 0;
+	int i;
+	unsigned int msr;
+
+	/* BAT1 */
+	CONFIG_WRITE_WORD(ERCR3, 0x0C00000C);
+	CONFIG_WRITE_WORD(ERCR4, 0x0800000C);
+	msr = get_msr();
+	set_msr(msr & ~(MSR_IR | MSR_DR));
+	mtibat1l(0x70000000 | BATL_PP_10 | BATL_CACHEINHIBIT);
+	mtibat1u(0x70000000 | BATU_BL_256M | BATU_VS | BATU_VP);
+	mtdbat1l(0x70000000 | BATL_PP_10 | BATL_CACHEINHIBIT);
+	mtdbat1u(0x70000000 | BATU_BL_256M | BATU_VS | BATU_VP);
+	set_msr(msr);
+
+	for (i = 0; i < CFG_MAX_FLASH_BANKS; i++)
+		flash_info[i].flash_id = FLASH_UNKNOWN;
+	size = cfi_init(FLASH_BASE0_PRELIM, &flash_info[0]);
+	if (!size)
+		size = jedec_init(FLASH_BASE0_PRELIM, &flash_info[0]);
+
+	if (flash_info[0].flash_id == FLASH_UNKNOWN)
+		printf ("# Unknown FLASH on Bank 1 - Size = 0x%08lx = %ld MB\n",
+			size, size<<20);
+
+	return size;
+}
+
+void flash_print_info  (flash_info_t *flash)
+{
+	int i;
+	int k;
+	int size;
+	int erased;
+	volatile unsigned long *p;
+
+	if (flash->flash_id == FLASH_UNKNOWN) {
+		printf ("missing or unknown FLASH type\n");
+		flash_init();
+	}
+
+	if (flash->flash_id == FLASH_UNKNOWN) {
+		printf ("missing or unknown FLASH type\n");
+		return;
+	}
+
+	switch (((flash->flash_id) >> 16) & 0xff) {
+	case 0x01:
+		printf ("AMD ");
+		break;
+	case 0x04:
+		printf("FUJITSU ");
+		break;
+	case 0x20:
+		printf("STM ");
+		break;
+	case 0xBF:
+		printf("SST ");
+		break;
+	case 0x89:
+	case 0xB0:
+		printf("INTEL ");
+		break;
+	default:
+		printf ("Unknown Vendor ");
+		break;
+	}
+
+	switch ((flash->flash_id) & 0xffff) {
+	case (uint16_t)AMD_ID_LV800T:
+		printf ("AM29LV800T\n");
+		break;
+	case (uint16_t)AMD_ID_LV800B:
+		printf ("AM29LV800B\n");
+		break;
+	case (uint16_t)AMD_ID_LV160T:
+		printf ("AM29LV160T\n");
+		break;
+	case (uint16_t)AMD_ID_LV160B:
+		printf ("AM29LV160B\n");
+		break;
+	case (uint16_t)AMD_ID_LV320T:
+		printf ("AM29LV320T\n");
+		break;
+	case (uint16_t)AMD_ID_LV320B:
+		printf ("AM29LV320B\n");
+		break;
+	case (uint16_t)INTEL_ID_28F800C3T:
+		printf ("28F800C3T\n");
+		break;
+	case (uint16_t)INTEL_ID_28F800C3B:
+		printf ("28F800C3B\n");
+		break;
+	case (uint16_t)INTEL_ID_28F160C3T:
+		printf ("28F160C3T\n");
+		break;
+	case (uint16_t)INTEL_ID_28F160C3B:
+		printf ("28F160C3B\n");
+		break;
+	case (uint16_t)INTEL_ID_28F320C3T:
+		printf ("28F320C3T\n");
+		break;
+	case (uint16_t)INTEL_ID_28F320C3B:
+		printf ("28F320C3B\n");
+		break;
+	case (uint16_t)INTEL_ID_28F640C3T:
+		printf ("28F640C3T\n");
+		break;
+	case (uint16_t)INTEL_ID_28F640C3B:
+		printf ("28F640C3B\n");
+		break;
+	default:
+		printf ("Unknown Chip Type\n");
+		break;
+	}
+
+	if (flash->size >= (1 << 20)) {
+		printf ("  Size: %ld MB in %d Sectors\n",
+				flash->size >> 20, flash->sector_count);
+	} else {
+		printf ("  Size: %ld kB in %d Sectors\n",
+				flash->size >> 10, flash->sector_count);
+	}
+
+	printf ("  Sector Start Addresses:");
+	for (i = 0; i < flash->sector_count; ++i) {
+		/* Check if whole sector is erased*/
+		if (i != (flash->sector_count-1))
+			size = flash->start[i+1] - flash->start[i];
+		else
+			size = flash->start[0] + flash->size - flash->start[i];
+
+		erased = 1;
+		p = (volatile unsigned long *)flash->start[i];
+		size = size >> 2;        /* divide by 4 for longword access */
+		for (k=0; k<size; k++) {
+			if (*p++ != 0xffffffff) {
+				erased = 0;
+				break;
+			}
+		}
+
+		if ((i % 5) == 0)
+			printf ("\n   ");
+
+		printf (" %08lX%s%s",
+			flash->start[i],
+			erased ? " E" : "  ",
+			flash->protect[i] ? "RO " : "   ");
+	}
+	printf ("\n");
+}
--- a/board/etin/debris/phantom.c
+++ b/board/etin/debris/phantom.c
@@ -0,0 +1,310 @@
+/*
+ * board/eva/phantom.c
+ *
+ * Phantom RTC device driver for EVA
+ *
+ * Author: Sangmoon Kim
+ *         dogoil@etinsys.com
+ *
+ * Copyright 2002 Etinsys Inc.
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+#include <common.h>
+#include <command.h>
+#include <rtc.h>
+
+#if (CONFIG_COMMANDS & CFG_CMD_DATE)
+
+#define RTC_BASE (CFG_NVRAM_BASE_ADDR + 0x7fff8)
+
+#define RTC_YEAR                ( RTC_BASE + 7 )
+#define RTC_MONTH               ( RTC_BASE + 6 )
+#define RTC_DAY_OF_MONTH        ( RTC_BASE + 5 )
+#define RTC_DAY_OF_WEEK         ( RTC_BASE + 4 )
+#define RTC_HOURS               ( RTC_BASE + 3 )
+#define RTC_MINUTES             ( RTC_BASE + 2 )
+#define RTC_SECONDS             ( RTC_BASE + 1 )
+#define RTC_CENTURY             ( RTC_BASE + 0 )
+
+#define RTC_CONTROLA            RTC_CENTURY
+#define RTC_CONTROLB            RTC_SECONDS
+#define RTC_CONTROLC            RTC_DAY_OF_WEEK
+
+#define RTC_CA_WRITE            0x80
+#define RTC_CA_READ             0x40
+
+#define RTC_CB_OSC_DISABLE      0x80
+
+#define RTC_CC_BATTERY_FLAG     0x80
+#define RTC_CC_FREQ_TEST        0x40
+
+
+static int phantom_flag = -1;
+static int century_flag = -1;
+
+static uchar rtc_read(unsigned int addr)
+{
+	return *(volatile unsigned char *)(addr);
+}
+
+static void rtc_write(unsigned int addr, uchar val)
+{
+	*(volatile unsigned char *)(addr) = val;
+}
+
+static unsigned char phantom_rtc_sequence[] = {
+	0xc5, 0x3a, 0xa3, 0x5c, 0xc5, 0x3a, 0xa3, 0x5c
+};
+
+static unsigned char* phantom_rtc_read(int addr, unsigned char rtc[8])
+{
+	int i, j;
+	unsigned char v;
+	unsigned char save = rtc_read(addr);
+
+	for (j = 0; j < 8; j++) {
+		v = phantom_rtc_sequence[j];
+		for (i = 0; i < 8; i++) {
+			rtc_write(addr, v & 1);
+			v >>= 1;
+		}
+	}
+	for (j = 0; j < 8; j++) {
+		v = 0;
+		for (i = 0; i < 8; i++) {
+			if(rtc_read(addr) & 1)
+				v |= 1 << i;
+		}
+		rtc[j] = v;
+	}
+	rtc_write(addr, save);
+	return rtc;
+}
+
+static void phantom_rtc_write(int addr, unsigned char rtc[8])
+{
+	int i, j;
+	unsigned char v;
+	unsigned char save = rtc_read(addr);
+	for (j = 0; j < 8; j++) {
+		v = phantom_rtc_sequence[j];
+		for (i = 0; i < 8; i++) {
+			rtc_write(addr, v & 1);
+			v >>= 1;
+		}
+	}
+	for (j = 0; j < 8; j++) {
+		v = rtc[j];
+		for (i = 0; i < 8; i++) {
+			rtc_write(addr, v & 1);
+			v >>= 1;
+		}
+	}
+	rtc_write(addr, save);
+}
+
+static int get_phantom_flag(void)
+{
+	int i;
+	unsigned char rtc[8];
+
+	phantom_rtc_read(RTC_BASE, rtc);
+
+	for(i = 1; i < 8; i++) {
+		if (rtc[i] != rtc[0])
+			return 1;
+	}
+	return 0;
+}
+
+void rtc_reset(void)
+{
+	if (phantom_flag < 0)
+		phantom_flag = get_phantom_flag();
+
+	if (phantom_flag) {
+		unsigned char rtc[8];
+		phantom_rtc_read(RTC_BASE, rtc);
+		if(rtc[4] & 0x30) {
+			printf( "real-time-clock was stopped. Now starting...\n" );
+			rtc[4] &= 0x07;
+			phantom_rtc_write(RTC_BASE, rtc);
+		}
+	} else {
+		uchar reg_a, reg_b, reg_c;
+		reg_a = rtc_read( RTC_CONTROLA );
+		reg_b = rtc_read( RTC_CONTROLB );
+
+		if ( reg_b & RTC_CB_OSC_DISABLE )
+		{
+			printf( "real-time-clock was stopped. Now starting...\n" );
+			reg_a |= RTC_CA_WRITE;
+			reg_b &= ~RTC_CB_OSC_DISABLE;
+			rtc_write( RTC_CONTROLA, reg_a );
+			rtc_write( RTC_CONTROLB, reg_b );
+		}
+
+		/* make sure read/write clock register bits are cleared */
+		reg_a &= ~( RTC_CA_WRITE | RTC_CA_READ );
+		rtc_write( RTC_CONTROLA, reg_a );
+
+		reg_c = rtc_read( RTC_CONTROLC );
+		if (( reg_c & RTC_CC_BATTERY_FLAG ) == 0 )
+			printf( "RTC battery low. Clock setting may not be reliable.\n");
+	}
+}
+
+inline unsigned bcd2bin (uchar n)
+{
+	return ((((n >> 4) & 0x0F) * 10) + (n & 0x0F));
+}
+
+inline unsigned char bin2bcd (unsigned int n)
+{
+	return (((n / 10) << 4) | (n % 10));
+}
+
+static int get_century_flag(void)
+{
+	int flag = 0;
+	int bcd, century;
+	bcd = rtc_read( RTC_CENTURY );
+	century = bcd2bin( bcd & 0x3F );
+	rtc_write( RTC_CENTURY, bin2bcd(century+1));
+	if (bcd == rtc_read( RTC_CENTURY ))
+		flag = 1;
+	rtc_write( RTC_CENTURY, bcd);
+	return flag;
+}
+
+void rtc_get( struct rtc_time *tmp)
+{
+	if (phantom_flag < 0)
+		phantom_flag = get_phantom_flag();
+
+	if (phantom_flag)
+	{
+		unsigned char rtc[8];
+
+		phantom_rtc_read(RTC_BASE, rtc);
+
+		tmp->tm_sec	= bcd2bin(rtc[1] & 0x7f);
+		tmp->tm_min	= bcd2bin(rtc[2] & 0x7f);
+		tmp->tm_hour	= bcd2bin(rtc[3] & 0x1f);
+		tmp->tm_wday	= bcd2bin(rtc[4] & 0x7);
+		tmp->tm_mday	= bcd2bin(rtc[5] & 0x3f);
+		tmp->tm_mon	= bcd2bin(rtc[6] & 0x1f);
+		tmp->tm_year	= bcd2bin(rtc[7]) + 1900;
+		tmp->tm_yday = 0;
+		tmp->tm_isdst = 0;
+
+		if( (rtc[3] & 0x80)  && (rtc[3] & 0x40) ) tmp->tm_hour += 12;
+		if (tmp->tm_year < 1970) tmp->tm_year += 100;
+	} else {
+		uchar sec, min, hour;
+		uchar mday, wday, mon, year;
+
+		int century;
+
+		uchar reg_a;
+
+		if (century_flag < 0)
+			century_flag = get_century_flag();
+
+		reg_a = rtc_read( RTC_CONTROLA );
+		/* lock clock registers for read */
+		rtc_write( RTC_CONTROLA, ( reg_a | RTC_CA_READ ));
+
+		sec     = rtc_read( RTC_SECONDS );
+		min     = rtc_read( RTC_MINUTES );
+		hour    = rtc_read( RTC_HOURS );
+		mday    = rtc_read( RTC_DAY_OF_MONTH );
+		wday    = rtc_read( RTC_DAY_OF_WEEK );
+		mon     = rtc_read( RTC_MONTH );
+		year    = rtc_read( RTC_YEAR );
+		century = rtc_read( RTC_CENTURY );
+
+		/* unlock clock registers after read */
+		rtc_write( RTC_CONTROLA, ( reg_a & ~RTC_CA_READ ));
+
+		tmp->tm_sec  = bcd2bin( sec  & 0x7F );
+		tmp->tm_min  = bcd2bin( min  & 0x7F );
+		tmp->tm_hour = bcd2bin( hour & 0x3F );
+		tmp->tm_mday = bcd2bin( mday & 0x3F );
+		tmp->tm_mon  = bcd2bin( mon & 0x1F );
+		tmp->tm_wday = bcd2bin( wday & 0x07 );
+
+		if (century_flag) {
+			tmp->tm_year = bcd2bin( year ) +
+				( bcd2bin( century & 0x3F ) * 100 );
+		} else {
+			tmp->tm_year = bcd2bin( year ) + 1900;
+			if (tmp->tm_year < 1970) tmp->tm_year += 100;
+		}
+
+		tmp->tm_yday = 0;
+		tmp->tm_isdst= 0;
+	}
+}
+
+void rtc_set( struct rtc_time *tmp )
+{
+	if (phantom_flag < 0)
+		phantom_flag = get_phantom_flag();
+
+	if (phantom_flag) {
+		uint year;
+		unsigned char rtc[8];
+
+		year = tmp->tm_year;
+		year -= (year < 2000) ? 1900 : 2000;
+
+		rtc[0] = bin2bcd(0);
+		rtc[1] = bin2bcd(tmp->tm_sec);
+		rtc[2] = bin2bcd(tmp->tm_min);
+		rtc[3] = bin2bcd(tmp->tm_hour);
+		rtc[4] = bin2bcd(tmp->tm_wday);
+		rtc[5] = bin2bcd(tmp->tm_mday);
+		rtc[6] = bin2bcd(tmp->tm_mon);
+		rtc[7] = bin2bcd(year);
+
+		phantom_rtc_write(RTC_BASE, rtc);
+	} else {
+		uchar reg_a;
+		if (century_flag < 0)
+			century_flag = get_century_flag();
+
+		/* lock clock registers for write */
+		reg_a = rtc_read( RTC_CONTROLA );
+		rtc_write( RTC_CONTROLA, ( reg_a | RTC_CA_WRITE ));
+
+		rtc_write( RTC_MONTH, bin2bcd( tmp->tm_mon ));
+
+		rtc_write( RTC_DAY_OF_WEEK, bin2bcd( tmp->tm_wday ));
+		rtc_write( RTC_DAY_OF_MONTH, bin2bcd( tmp->tm_mday ));
+		rtc_write( RTC_HOURS, bin2bcd( tmp->tm_hour ));
+		rtc_write( RTC_MINUTES, bin2bcd( tmp->tm_min ));
+		rtc_write( RTC_SECONDS, bin2bcd( tmp->tm_sec ));
+
+		/* break year up into century and year in century */
+		if (century_flag) {
+			rtc_write( RTC_YEAR, bin2bcd( tmp->tm_year % 100 ));
+			rtc_write( RTC_CENTURY, bin2bcd( tmp->tm_year / 100 ));
+			reg_a &= 0xc0;
+			reg_a |= bin2bcd( tmp->tm_year / 100 );
+		} else {
+			rtc_write(RTC_YEAR, bin2bcd(tmp->tm_year -
+				((tmp->tm_year < 2000) ? 1900 : 2000)));
+		}
+
+		/* unlock clock registers after read */
+		rtc_write( RTC_CONTROLA, ( reg_a  & ~RTC_CA_WRITE ));
+	}
+}
+
+#endif
--- a/board/etin/debris/speed.h
+++ b/board/etin/debris/speed.h
@@ -0,0 +1,54 @@
+/*
+ * (C) Copyright 2000
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*-----------------------------------------------------------------------
+ * Timer value for timer 2, ICLK = 10
+ *
+ * SPEED_FCOUNT2 =  GCLK / (16 * (TIMER_TMR_PS + 1))
+ * SPEED_TMR3_PS = (GCLK / (16 * SPEED_FCOUNT3)) - 1
+ *
+ * SPEED_FCOUNT2	timer 2 counting frequency
+ * GCLK	      		CPU clock
+ * SPEED_TMR2_PS	prescaler
+ */
+#define SPEED_TMR2_PS  	(250 - 1)	/* divide by 250	*/
+
+/*-----------------------------------------------------------------------
+ * Timer value for PIT
+ *
+ * PIT_TIME = SPEED_PITC / PITRTCLK
+ * PITRTCLK = 8192
+ */
+#define SPEED_PITC	(82 << 16)	/* start counting from 82	*/
+
+/*
+ * The new value for PTA is calculated from
+ *
+ *	PTA = (gclk * Trefresh) / (2 ^ (2 * DFBRG) * PTP * NCS)
+ *
+ * gclk		CPU clock (not bus clock !)
+ * Trefresh	Refresh cycle * 4 (four word bursts used)
+ * DFBRG	For normal mode (no clock reduction) always 0
+ * PTP		Prescaler (already adjusted for no. of banks and 4K / 8K refresh)
+ * NCS		Number of SDRAM banks (chip selects) on this UPM.
+ */
--- a/board/etin/debris/u-boot.lds
+++ b/board/etin/debris/u-boot.lds
@@ -0,0 +1,128 @@
+/*
+ * (C) Copyright 2001
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_ARCH(powerpc)
+SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
+/* Do we need any of these for elf?
+   __DYNAMIC = 0;    */
+SECTIONS
+{
+  /* Read-only sections, merged into text segment: */
+  . = + SIZEOF_HEADERS;
+  .interp : { *(.interp) }
+  .hash          : { *(.hash)		}
+  .dynsym        : { *(.dynsym)		}
+  .dynstr        : { *(.dynstr)		}
+  .rel.text      : { *(.rel.text)	}
+  .rela.text     : { *(.rela.text) 	}
+  .rel.data      : { *(.rel.data)	}
+  .rela.data     : { *(.rela.data) 	}
+  .rel.rodata    : { *(.rel.rodata) 	}
+  .rela.rodata   : { *(.rela.rodata) 	}
+  .rel.got       : { *(.rel.got)	}
+  .rela.got      : { *(.rela.got)	}
+  .rel.ctors     : { *(.rel.ctors)	}
+  .rela.ctors    : { *(.rela.ctors)	}
+  .rel.dtors     : { *(.rel.dtors)	}
+  .rela.dtors    : { *(.rela.dtors)	}
+  .rel.bss       : { *(.rel.bss)	}
+  .rela.bss      : { *(.rela.bss)	}
+  .rel.plt       : { *(.rel.plt)	}
+  .rela.plt      : { *(.rela.plt)	}
+  .init          : { *(.init)		}
+  .plt : { *(.plt) }
+  .text      :
+  {
+    cpu/mpc824x/start.o	(.text)
+    lib_ppc/board.o	(.text)
+    lib_ppc/ppcstring.o	(.text)
+
+	. = DEFINED(env_offset) ? env_offset : .;
+    common/environment.o (.text)
+
+	*(.text)
+
+    *(.fixup)
+    *(.got1)
+    . = ALIGN(16);
+    *(.rodata)
+    *(.rodata1)
+  }
+  .fini      : { *(.fini)    } =0
+  .ctors     : { *(.ctors)   }
+  .dtors     : { *(.dtors)   }
+
+  /* Read-write section, merged into data segment: */
+  . = (. + 0x0FFF) & 0xFFFFF000;
+  _erotext = .;
+  PROVIDE (erotext = .);
+  .reloc   :
+  {
+    *(.got)
+    _GOT2_TABLE_ = .;
+    *(.got2)
+    _FIXUP_TABLE_ = .;
+    *(.fixup)
+  }
+  __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
+  __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
+
+  .data    :
+  {
+    *(.data)
+    *(.data1)
+    *(.sdata)
+    *(.sdata2)
+    *(.dynamic)
+    CONSTRUCTORS
+  }
+  _edata  =  .;
+  PROVIDE (edata = .);
+
+  __u_boot_cmd_start = .;
+  .u_boot_cmd : { *(.u_boot_cmd) }
+  __u_boot_cmd_end = .;
+
+  __start___ex_table = .;
+  __ex_table : { *(__ex_table) }
+  __stop___ex_table = .;
+
+  . = ALIGN(4096);
+  __init_begin = .;
+  .text.init : { *(.text.init) }
+  .data.init : { *(.data.init) }
+  . = ALIGN(4096);
+  __init_end = .;
+
+  __bss_start = .;
+  .bss       :
+  {
+   *(.sbss) *(.scommon)
+   *(.dynbss)
+   *(.bss)
+   *(COMMON)
+  }
+
+  _end = . ;
+  PROVIDE (end = .);
+}
--- a/board/evb64260/eth.c
+++ b/board/evb64260/eth.c
@@ -22,7 +22,6 @@ Skeleton NIC driver for Etherboot

 #include <common.h>
 #include <malloc.h>
-#include <cmd_bsp.h>
 #include <galileo/gt64260R.h>
 #include <galileo/core.h>
 #include <asm/cache.h>
--- a/board/evb64260/evb64260.c
+++ b/board/evb64260/evb64260.c
@@ -237,7 +237,7 @@ int board_pre_init (void)
 	 * on-board sram on the eval board, and updates the correct
 	 * registers to boot from the sram. (device0)
 	 */
-#ifdef CONFIG_ZUMA_V2
+#if defined(CONFIG_ZUMA_V2) || defined(CONFIG_P3G4)
 	/* Zuma has no SRAM */
 	sram_boot = 0;
 #else
@@ -265,6 +265,7 @@ int board_pre_init (void)
 	GT_REG_WRITE(DEVICE_BANK2PARAMETERS, CFG_DEV2_PAR);
 #endif

+#ifdef CONFIG_EVB64260
 #ifdef CFG_32BIT_BOOT_PAR
 	/* detect if we are booting from the 32 bit flash */
 	if (GTREGREAD(DEVICE_BOOT_BANK_PARAMETERS) & (0x3 << 20)) {
@@ -280,6 +281,11 @@ int board_pre_init (void)
 	/* 8 bit boot flash only */
 	GT_REG_WRITE(DEVICE_BOOT_BANK_PARAMETERS, CFG_8BIT_BOOT_PAR);
 #endif
+#else /* CONFIG_EVB64260 not defined */
+		/* We are booting from 16-bit flash.
+		 */
+	GT_REG_WRITE(DEVICE_BOOT_BANK_PARAMETERS, CFG_16BIT_BOOT_PAR);
+#endif

 	gt_cpu_config();

@@ -329,7 +335,7 @@ after_reloc(ulong dest_addr)
 	}

 	/* now, jump to the main U-Boot board init code */
-	board_init_r (gd, dest_addr);
+	board_init_r ((gd_t *)gd, dest_addr);

 	/* NOTREACHED */
 }
@@ -351,7 +357,7 @@ checkboard (void)
 void
 debug_led(int led, int mode)
 {
-#ifndef CONFIG_ZUMA_V2
+#if !defined(CONFIG_ZUMA_V2) && !defined(CONFIG_P3G4)
 	volatile int *addr = NULL;
 	int dummy;

--- a/board/evb64260/flash.c
+++ b/board/evb64260/flash.c
@@ -54,6 +54,7 @@ flash_info_t	flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
 static ulong flash_get_size (int portwidth, vu_long *addr, flash_info_t *info);
 static int write_word (flash_info_t *info, ulong dest, ulong data);
 static void flash_get_offsets (ulong base, flash_info_t *info);
+static flash_info_t *flash_get_info(ulong base);

 /*-----------------------------------------------------------------------
 */
@@ -72,9 +73,17 @@ flash_init (void)

 	/* the boot flash */
 	base = CFG_FLASH_BASE;
-	size_b0 = flash_get_size(1, (vu_long *)base, &flash_info[0]);
+#ifndef CFG_BOOT_FLASH_WIDTH
+#define CFG_BOOT_FLASH_WIDTH	1
+#endif
+	size_b0 = flash_get_size(CFG_BOOT_FLASH_WIDTH, (vu_long *)base,
+	                         &flash_info[0]);

-	printf("[%ldkB@%lx] ", size_b0/1024, base);
+#ifndef CONFIG_P3G4
+	printf("[");
+	print_size (size_b0, "");
+	printf("@%08lX] ", base);
+#endif

 	if (flash_info[0].flash_id == FLASH_UNKNOWN) {
 		printf ("## Unknown FLASH at %08lx: Size = 0x%08lx = %ld MB\n",
@@ -85,7 +94,11 @@ flash_init (void)
 	for(i=1;i<CFG_MAX_FLASH_BANKS;i++) {
 	    unsigned long size = flash_get_size(CFG_EXTRA_FLASH_WIDTH, (vu_long *)base, &flash_info[i]);

-	    printf("[%ldMB@%lx] ", size>>20, base);
+#ifndef CONFIG_P3G4
+	    printf("[");
+	    print_size (size, "");
+	    printf("@%08lX] ", size>>20, base);
+#endif

 	    if (flash_info[i].flash_id == FLASH_UNKNOWN) {
 		if(i==1) {
@@ -98,6 +111,22 @@ flash_init (void)
 	    base+=size;
 	}

+#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
+	/* monitor protection ON by default */
+	flash_protect(FLAG_PROTECT_SET,
+	              CFG_MONITOR_BASE,
+	              CFG_MONITOR_BASE + monitor_flash_len - 1,
+	              flash_get_info(CFG_MONITOR_BASE));
+#endif
+
+#ifdef  CFG_ENV_IS_IN_FLASH
+	/* ENV protection ON by default */
+	flash_protect(FLAG_PROTECT_SET,
+	              CFG_ENV_ADDR,
+	              CFG_ENV_ADDR + CFG_ENV_SIZE - 1,
+	              flash_get_info(CFG_ENV_ADDR));
+#endif
+
 	flash_size = size_b0 + size_b1;
 	return flash_size;
 }
@@ -146,6 +175,23 @@ flash_get_offsets (ulong base, flash_info_t *info)
 	}
 }

+/*-----------------------------------------------------------------------
+ */
+
+static flash_info_t *flash_get_info(ulong base)
+{
+	int i;
+	flash_info_t * info;
+
+	for (i = 0; i < CFG_MAX_FLASH_BANKS; i ++) {
+		info = & flash_info[i];
+		if (info->start[0] <= base && base <= info->start[0] + info->size - 1)
+			break;
+	}
+
+	return i == CFG_MAX_FLASH_BANKS ? 0 : info;
+}
+
 /*-----------------------------------------------------------------------
 */
 void
@@ -247,8 +293,11 @@ static inline void flash_cmd(int width, volatile unsigned char *addr, int offset
 	    /* 2x16 */
 	    unsigned long cmd32=(cmd<<16)|cmd;
 	    *(volatile unsigned long *)(addr+offset*2)=cmd32;
+	} else if (width == 2) {
+	    /* 1x16 */
+	    *(volatile unsigned short *)((unsigned short*)addr+offset)=cmd;
 	} else {
-	    /* 1x16 or 1x8 */
+	    /* 1x8 */
 	    *(volatile unsigned char *)(addr+offset)=cmd;
 	}
 }
--- a/Show More
+++ b/Show More