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3 Commits

Author SHA1 Message Date
wdenk
ef0630617e *** empty log message *** 2003-06-27 23:21:41 +00:00
wdenk
a807645ee6 Add support for EXBITGEN board 2003-06-27 23:19:19 +00:00
wdenk
91a0ce965d Add support for SL8245 board 2003-06-27 22:44:25 +00:00
40146 changed files with 575478 additions and 8345281 deletions

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@@ -1,745 +0,0 @@
variables:
windows_vm: windows-2022
ubuntu_vm: ubuntu-24.04
macos_vm: macOS-14
ci_runner_image: trini/u-boot-gitlab-ci-runner:noble-20251013-23Jan2026
# Ensure we do a shallow clone
Agent.Source.Git.ShallowFetchDepth: 1
# Add '-u 0' options for Azure pipelines, otherwise we get "permission
# denied" error when it tries to "useradd -m -u 1001 vsts_azpcontainer",
# since our $(ci_runner_image) user is not root.
container_option: -u 0
work_dir: /u
# We define all of these as variables so we can easily reference them twice
am33xx_kirkwood: "am33xx kirkwood"
amd: "amd xilinx zynq"
amlogic_bcm: "amlogic bcm -x mips"
atmel: "atmel"
engicam_renesas: "engicam renesas"
k3_32b: "k3 -x aarch64,phytec,toradex"
k3_64b: "k3 -x armv7,phytec,toradex"
kirkwood_mvebu: "kirkwood mvebu"
layerscape_vf610: "ls1 ls2 lx2 vf610 -x phytec,toradex"
m68k_remaining_mx_xtensa: "m68k imxrt mx xtensa -x mx6,aarch64"
mips_x86: "mips x86 -x mediatek"
mx6: "mx6 -x engicam,phytec,toradex"
imx8: "imx8 -x engicam,phytec,toradex"
imx9_arc_nios2_socfpga: "imx9 arc nios2 socfpga -x phytec,toradex"
phytec_toradex: "phytec toradex"
powerpc: "powerpc"
riscv_stm32: "riscv stm32 -x engicam,xilinx"
rk3399: "rk3399"
rk352x_rk358x: "rk352 rk358"
rk356x_rk357x: "rk356 rk357"
rk3xxx_rest: "rk30 rk31 rk32 rk33 -x rk3399,phytec"
sandbox_tegra: "tegra sandbox -x toradex"
samsung_omap_mediatek: "samsung omap mediatek"
sun4i_5i: "sun4i sun5i"
sun6i_sun7i: "sun6i sun7i"
sun8i: "sun8i"
sunxi_rest: "sunxi -x sun4i,sun5i,sun6i,sun7i,sun8i"
arm_catch_all: "arm -x aarch64,am33xx,atmel,bcm,ls,lx,imx,k3,kirkwood,mvebu,mx,omap,renesas,rk,samsung,socfpga,stm32,sunxi,tegra,vf610,xilinx,zynq"
aarch64_catch_all: "aarch64 -x amd,amlogic,bcm,engicam,imx,k3,ls,lx,mediatek,mvebu,renesas,rk,samsung,socfpga,stm32,sunxi,tegra,xilinx,zynq"
stages:
- stage: testsuites
jobs:
- job: tools_only_windows
displayName: 'Ensure host tools build for Windows'
pool:
vmImage: $(windows_vm)
steps:
- powershell: |
(New-Object Net.WebClient).DownloadFile("https://github.com/msys2/msys2-installer/releases/download/2021-06-04/msys2-base-x86_64-20210604.sfx.exe", "sfx.exe")
displayName: 'Install MSYS2'
- script: |
sfx.exe -y -o%CD:~0,2%\
%CD:~0,2%\msys64\usr\bin\bash -lc " "
%CD:~0,2%\msys64\usr\bin\bash -lc "pacman --noconfirm -Syuu"
%CD:~0,2%\msys64\usr\bin\bash -lc "pacman --noconfirm -Syuu"
displayName: 'Update MSYS2'
- script: |
%CD:~0,2%\msys64\usr\bin\bash -lc "pacman --noconfirm --needed -Sy make gcc bison flex diffutils openssl-devel libgnutls-devel libutil-linux-devel"
displayName: 'Install Toolchain'
- script: |
echo make tools-only_defconfig tools-only > build-tools.sh
%CD:~0,2%\msys64\usr\bin\bash -lc "bash build-tools.sh"
displayName: 'Build Host Tools'
env:
# Tell MSYS2 we need a POSIX emulation layer
MSYSTEM: MSYS
# Tell MSYS2 not to cd our startup directory to HOME
CHERE_INVOKING: yes
- job: tools_only_macOS
displayName: 'Ensure host tools build for macOS X'
pool:
vmImage: $(macos_vm)
steps:
- script: brew install make ossp-uuid
displayName: Brew install dependencies
- script: |
gmake tools-only_config tools-only \
HOSTCFLAGS="-I/usr/local/opt/openssl@1.1/include" \
HOSTLDFLAGS="-L/usr/local/opt/openssl@1.1/lib" \
-j$(sysctl -n hw.logicalcpu)
displayName: 'Perform tools-only build'
- job: check_for_new_CONFIG_symbols_outside_Kconfig
displayName: 'Check for new CONFIG symbols outside Kconfig'
pool:
vmImage: $(ubuntu_vm)
container:
image: $(ci_runner_image)
options: $(container_option)
steps:
# If grep succeeds and finds a match the test fails as we should
# have no matches.
- script: git grep -E '^#[[:blank:]]*(define|undef)[[:blank:]]*CONFIG_'
:^doc/ :^arch/arm/dts/ :^scripts/kconfig/lkc.h
:^include/linux/kconfig.h :^tools/ :^dts/upstream/
:^lib/mbedtls/external :^lib/mbedtls/mbedtls_def_config.h &&
exit 1 || exit 0
- job: docs
displayName: 'Build documentation'
pool:
vmImage: $(ubuntu_vm)
container:
image: $(ci_runner_image)
options: $(container_option)
steps:
- script: |
set -e
python3 -m venv /tmp/venvhtml
. /tmp/venvhtml/bin/activate
pip install -r doc/sphinx/requirements.txt -r test/py/requirements.txt
make htmldocs KDOC_WERROR=1
make infodocs
- job: maintainers
displayName: 'Ensure all configs have MAINTAINERS entries'
pool:
vmImage: $(ubuntu_vm)
container:
image: $(ci_runner_image)
options: $(container_option)
steps:
- script: |
./tools/buildman/buildman --maintainer-check
- job: allyesconfig_and_tools
displayName: 'Ensure allyesconfig, tools-only and envtools build'
pool:
vmImage: $(ubuntu_vm)
container:
image: $(ci_runner_image)
options: $(container_option)
steps:
- script: |
# Allow pipefail because of how we use 'yes' here.
set +o pipefail;
yes 0 | make allyesconfig oldconfig all -j$(nproc)
make mrproper
make tools-only_config tools-only -j$(nproc)
make mrproper
make tools-only_config envtools -j$(nproc)
- job: utils
displayName: 'Run binman, buildman, dtoc, Kconfig and patman testsuites'
pool:
vmImage: $(ubuntu_vm)
container:
image: $(ci_runner_image)
options: $(container_option)
steps:
- script: |
# Configure git
git config --global user.name "Azure Pipelines"
git config --global user.email bmeng.cn@gmail.com
export USER=azure
python3 -m venv /tmp/venv
. /tmp/venv/bin/activate
pip install -r test/py/requirements.txt \
-r tools/binman/requirements.txt \
-r tools/buildman/requirements.txt \
-r tools/patman/requirements.txt \
-r tools/u_boot_pylib/requirements.txt
export UBOOT_TRAVIS_BUILD_DIR=/tmp/tools-only
export PYTHONPATH=${UBOOT_TRAVIS_BUILD_DIR}/scripts/dtc/pylibfdt
export PATH=${UBOOT_TRAVIS_BUILD_DIR}/scripts/dtc:${PATH}
./tools/buildman/buildman -T0 -o ${UBOOT_TRAVIS_BUILD_DIR} -w --board tools-only
set -ex
export TOOLPATH="--toolpath ${UBOOT_TRAVIS_BUILD_DIR}/tools --toolpath /opt/coreboot"
./tools/binman/binman ${TOOLPATH} tool -f missing
./tools/binman/binman ${TOOLPATH} test
# Avoid "Permission denied: 'cov'" error by using a temporary file
COVERAGE_FILE=/tmp/.coverage ./tools/binman/binman ${TOOLPATH} test -T
./tools/buildman/buildman -t
./tools/dtoc/dtoc -t
./tools/patman/patman test
make O=${UBOOT_TRAVIS_BUILD_DIR} testconfig
- job: pylint
displayName: Check for any pylint regressions
pool:
vmImage: $(ubuntu_vm)
container:
image: $(ci_runner_image)
options: $(container_option)
steps:
- script: |
git config --global --add safe.directory $(work_dir)
export USER=azure
python3 -m venv /tmp/venv
. /tmp/venv/bin/activate
pip install -r test/py/requirements.txt \
-r tools/binman/requirements.txt \
-r tools/buildman/requirements.txt \
-r tools/patman/requirements.txt \
-r tools/u_boot_pylib/requirements.txt \
asteval pylint==3.3.4 pyopenssl
export PATH=${PATH}:~/.local/bin
echo "[MASTER]" >> .pylintrc
echo "load-plugins=pylint.extensions.docparams" >> .pylintrc
export UBOOT_TRAVIS_BUILD_DIR=/tmp/tools-only
./tools/buildman/buildman -T0 -o ${UBOOT_TRAVIS_BUILD_DIR} -w --board tools-only
set -ex
pylint --version
export PYTHONPATH=${UBOOT_TRAVIS_BUILD_DIR}/scripts/dtc/pylibfdt
make pylint_err
- job: check_packing_of_python_tools
displayName: 'Check we can package the Python tools'
pool:
vmImage: $(ubuntu_vm)
container:
image: $(ci_runner_image)
options: $(container_option)
steps:
- script: make pip
- job: count_built_machines
displayName: 'Ensure we build all possible machines'
pool:
vmImage: $(ubuntu_vm)
container:
image: $(ci_runner_image)
options: $(container_option)
steps:
- script: |
BMANARGS="-o /tmp --dry-run -v"
# First get the total number of boards
total=$(tools/buildman/buildman ${BMANARGS} | grep "Total boards to build for each commit" | cut -d ' ' -f 8)
# Now build up the list of what each job built.
built="$(tools/buildman/buildman ${BMANARGS} $(am33xx_kirkwood) | grep '^ ')"
built="$built $(tools/buildman/buildman ${BMANARGS} $(amd) | grep '^ ')"
built="$built $(tools/buildman/buildman ${BMANARGS} $(amlogic_bcm) | grep '^ ')"
built="$built $(tools/buildman/buildman ${BMANARGS} $(atmel) | grep '^ ')"
built="$built $(tools/buildman/buildman ${BMANARGS} $(engicam_renesas) | grep '^ ')"
built="$built $(tools/buildman/buildman ${BMANARGS} $(k3_32b) | grep '^ ')"
built="$built $(tools/buildman/buildman ${BMANARGS} $(k3_64b) | grep '^ ')"
built="$built $(tools/buildman/buildman ${BMANARGS} $(kirkwood_mvebu) | grep '^ ')"
built="$built $(tools/buildman/buildman ${BMANARGS} $(layerscape_vf610) | grep '^ ')"
built="$built $(tools/buildman/buildman ${BMANARGS} $(m68k_remaining_mx_xtensa) | grep '^ ')"
built="$built $(tools/buildman/buildman ${BMANARGS} $(mips_x86) | grep '^ ')"
built="$built $(tools/buildman/buildman ${BMANARGS} $(mx6) | grep '^ ')"
built="$built $(tools/buildman/buildman ${BMANARGS} $(imx8) | grep '^ ')"
built="$built $(tools/buildman/buildman ${BMANARGS} $(imx9_arc_nios2_socfpga) | grep '^ ')"
built="$built $(tools/buildman/buildman ${BMANARGS} $(phytec_toradex) | grep '^ ')"
built="$built $(tools/buildman/buildman ${BMANARGS} $(powerpc) | grep '^ ')"
built="$built $(tools/buildman/buildman ${BMANARGS} $(riscv_stm32) | grep '^ ')"
built="$built $(tools/buildman/buildman ${BMANARGS} $(rk3399) | grep '^ ')"
built="$built $(tools/buildman/buildman ${BMANARGS} $(rk352x_rk358x) | grep '^ ')"
built="$built $(tools/buildman/buildman ${BMANARGS} $(rk356x_rk357x) | grep '^ ')"
built="$built $(tools/buildman/buildman ${BMANARGS} $(rk3xxx_rest) | grep '^ ')"
built="$built $(tools/buildman/buildman ${BMANARGS} $(sandbox_tegra) | grep '^ ')"
built="$built $(tools/buildman/buildman ${BMANARGS} $(samsung_omap_mediatek) | grep '^ ')"
built="$built $(tools/buildman/buildman ${BMANARGS} $(sun4i_5i) | grep '^ ')"
built="$built $(tools/buildman/buildman ${BMANARGS} $(sun6i_sun7i) | grep '^ ')"
built="$built $(tools/buildman/buildman ${BMANARGS} $(sun8i) | grep '^ ')"
built="$built $(tools/buildman/buildman ${BMANARGS} $(sunxi_rest) | grep '^ ')"
built="$built $(tools/buildman/buildman ${BMANARGS} $(arm_catch_all) | grep '^ ')"
built="$built $(tools/buildman/buildman ${BMANARGS} $(aarch64_catch_all) | grep '^ ')"
# Finally see how many machines that is.
actual=$(tools/buildman/buildman ${BMANARGS} $built | grep "Total boards to build for each commit" | cut -d ' ' -f 8)
echo We would build a total of $actual out of $total platforms this CI run
[ $actual -eq $total ] && exit 0 || exit 1
- job: create_test_py_wrapper_script
displayName: 'Create and stage a wrapper for test.py runs'
pool:
vmImage: $(ubuntu_vm)
steps:
- checkout: none
- script: |
cat << EOF > test.sh
#!/bin/bash
set -ex
# the below corresponds to .gitlab-ci.yml "before_script"
cd \${WORK_DIR}
git config --global --add safe.directory \${WORK_DIR}
git clone --depth=1 https://github.com/u-boot/u-boot-test-hooks /tmp/uboot-test-hooks
# qemu_arm64_lwip_defconfig is the same as qemu_arm64 but with NET_LWIP enabled.
# The test config and the boardenv file from qemu_arm64 can be re-used so create symlinks
ln -s conf.qemu_arm64 /tmp/uboot-test-hooks/bin/travis-ci/conf.qemu_arm64_lwip_na
ln -s u_boot_boardenv_qemu_arm64_na.py /tmp/uboot-test-hooks/py/travis-ci/u_boot_boardenv_qemu_arm64_lwip_na.py
ln -s travis-ci /tmp/uboot-test-hooks/bin/\`hostname\`
ln -s travis-ci /tmp/uboot-test-hooks/py/\`hostname\`
if [[ "\${TEST_PY_BD}" == "qemu-riscv32_spl" ]] || [[ "\${TEST_PY_BD}" == "xilinx_mbv32_smode" ]]; then
wget -O - https://github.com/riscv-software-src/opensbi/releases/download/v1.3.1/opensbi-1.3.1-rv-bin.tar.xz | tar -C /tmp -xJ;
export OPENSBI=/tmp/opensbi-1.3.1-rv-bin/share/opensbi/ilp32/generic/firmware/fw_dynamic.bin;
fi
if [[ "\${TEST_PY_BD}" == "qemu-riscv64_spl" ]] || [[ "\${TEST_PY_BD}" == "sifive_unleashed" ]] || [[ "\${TEST_PY_BD}" == "xilinx_mbv64_smode" ]]; then
wget -O - https://github.com/riscv-software-src/opensbi/releases/download/v1.3.1/opensbi-1.3.1-rv-bin.tar.xz | tar -C /tmp -xJ;
export OPENSBI=/tmp/opensbi-1.3.1-rv-bin/share/opensbi/lp64/generic/firmware/fw_dynamic.bin;
fi
if [[ "\${TEST_PY_BD}" == "qemu-arm-sbsa" ]]; then
wget -O /tmp/bl1.bin https://artifacts.codelinaro.org/artifactory/linaro-419-sbsa-ref/latest/tf-a/bl1.bin;
wget -O /tmp/fip.bin https://artifacts.codelinaro.org/artifactory/linaro-419-sbsa-ref/latest/tf-a/fip.bin;
export BINMAN_INDIRS=/tmp
fi
# the below corresponds to .gitlab-ci.yml "script"
cd \${WORK_DIR}
export UBOOT_TRAVIS_BUILD_DIR=/tmp/\${TEST_PY_BD}
if [ -n "\${BUILD_ENV}" ]; then
export \${BUILD_ENV};
fi
python3 -m venv /tmp/venv
. /tmp/venv/bin/activate
pip install -r tools/binman/requirements.txt \
-r tools/buildman/requirements.txt \
-r test/py/requirements.txt \
-r tools/u_boot_pylib/requirements.txt \
setuptools \
pytest-azurepipelines
tools/buildman/buildman -o \${UBOOT_TRAVIS_BUILD_DIR} -w -E -W -e --board \${TEST_PY_BD} \${OVERRIDE}
cp /opt/grub/grub_x86.efi \${UBOOT_TRAVIS_BUILD_DIR}/
cp /opt/grub/grub_x64.efi \${UBOOT_TRAVIS_BUILD_DIR}/
cp /opt/grub/grubriscv64.efi \${UBOOT_TRAVIS_BUILD_DIR}/grub_riscv64.efi
cp /opt/grub/grubaa64.efi \${UBOOT_TRAVIS_BUILD_DIR}/grub_arm64.efi
cp /opt/grub/grubarm.efi \${UBOOT_TRAVIS_BUILD_DIR}/grub_arm.efi
# create sdcard / spi-nor images for sifive unleashed using genimage
if [[ "\${TEST_PY_BD}" == "sifive_unleashed" ]]; then
mkdir -p root;
cp \${UBOOT_TRAVIS_BUILD_DIR}/spl/u-boot-spl.bin .;
cp \${UBOOT_TRAVIS_BUILD_DIR}/u-boot.itb .;
rm -rf tmp;
genimage --inputpath . --config board/sifive/unleashed/genimage_sdcard.cfg;
cp images/sdcard.img \${UBOOT_TRAVIS_BUILD_DIR}/;
rm -rf tmp;
genimage --inputpath . --config board/sifive/unleashed/genimage_spi-nor.cfg;
cp images/spi-nor.img \${UBOOT_TRAVIS_BUILD_DIR}/;
fi
if [[ "\${TEST_PY_BD}" == "coreboot" ]]; then
cp /opt/coreboot/coreboot.rom \${UBOOT_TRAVIS_BUILD_DIR}/coreboot.rom;
/opt/coreboot/cbfstool \${UBOOT_TRAVIS_BUILD_DIR}/coreboot.rom remove -n fallback/payload;
/opt/coreboot/cbfstool \${UBOOT_TRAVIS_BUILD_DIR}/coreboot.rom add-flat-binary -f \${UBOOT_TRAVIS_BUILD_DIR}/u-boot.bin -n fallback/payload -c LZMA -l 0x1110000 -e 0x1110000;
fi
# If we have TF-A binaries, we need to use them.
tfa_dir=""
rm -f /tmp/fip.bin
rm -f /tmp/bl1.bin
if [[ -d /opt/tf-a/"\${TEST_PY_BD}\${TEST_PY_ID//--id /_}" ]]; then
tfa_dir="/opt/tf-a/\${TEST_PY_BD}\${TEST_PY_ID//--id /_}";
elif [[ -d /opt/tf-a/"\${TEST_PY_BD}" ]]; then
tfa_dir="/opt/tf-a/\${TEST_PY_BD}";
fi
if [[ -n "\$tfa_dir" ]]; then
cp "\$tfa_dir"/fip.bin "\$tfa_dir"/bl1.bin /tmp/;
fi
if [ -f /tmp/fip.bin ] && [ -f /tmp/bl1.bin ]; then
export fip=/tmp/fip.bin;
export bl1=/tmp/bl1.bin;
export PATH=/opt/Base_RevC_AEMvA_pkg/models/Linux64_GCC-9.3:\${PATH};
fi
export PATH=/opt/qemu/bin:/tmp/uboot-test-hooks/bin:\${PATH}
export PYTHONPATH=/tmp/uboot-test-hooks/py/travis-ci
python3 -m http.server 80 --directory "\${UBOOT_TRAVIS_BUILD_DIR}" > /dev/null 2>&1 &
HTTP_PID=\$!
sleep 1 # Give the server a moment to start
if ps -p \${HTTP_PID} > /dev/null; then
export HTTP_PID
else
unset HTTP_PID
fi
# "\${var:+"-k \$var"}" expands to "" if \$var is empty, "-k \$var" if not
./test/py/test.py -ra -o cache_dir="\$UBOOT_TRAVIS_BUILD_DIR"/.pytest_cache --bd \${TEST_PY_BD} \${TEST_PY_ID} \${TEST_PY_EXTRA} \${TEST_PY_TEST_SPEC:+"-k \${TEST_PY_TEST_SPEC}"} --build-dir "\$UBOOT_TRAVIS_BUILD_DIR" --report-dir "\$UBOOT_TRAVIS_BUILD_DIR" --junitxml=\$(System.DefaultWorkingDirectory)/results.xml
# the below corresponds to .gitlab-ci.yml "after_script"
if [[ -n "\${HTTP_PID}" ]]; then
kill \${HTTP_PID};
fi
rm -rf /tmp/uboot-test-hooks /tmp/venv
EOF
- task: CopyFiles@2
displayName: 'Copy test.sh for later usage'
inputs:
contents: 'test.sh'
targetFolder: '$(Build.ArtifactStagingDirectory)'
- publish: '$(Build.ArtifactStagingDirectory)/test.sh'
displayName: 'Publish test.sh'
artifact: testsh
- stage: test_py_sandbox
jobs:
- job: test_py_sandbox
displayName: 'test.py for sandbox'
pool:
vmImage: $(ubuntu_vm)
strategy:
matrix:
sandbox:
TEST_PY_BD: "sandbox"
TEST_PY_EXTRA: "--timing"
# addr2line in Ubuntu 'Noble' and later are broken.
TEST_PY_TEST_SPEC: "not event_dump"
sandbox_asan:
TEST_PY_BD: "sandbox"
OVERRIDE: "-a ASAN"
TEST_PY_TEST_SPEC: "version"
sandbox_clang:
TEST_PY_BD: "sandbox"
OVERRIDE: "-O clang-20"
# addr2line in Ubuntu 'Noble' and later are broken.
TEST_PY_TEST_SPEC: "not event_dump"
sandbox_clang_asan:
TEST_PY_BD: "sandbox"
OVERRIDE: "-O clang-20 -a ASAN"
TEST_PY_TEST_SPEC: "version"
sandbox64:
TEST_PY_BD: "sandbox64"
sandbox64_clang:
TEST_PY_BD: "sandbox64"
OVERRIDE: "-O clang-20"
sandbox64_lwip:
TEST_PY_BD: "sandbox64_lwip"
sandbox_spl:
TEST_PY_BD: "sandbox_spl"
TEST_PY_TEST_SPEC: "test_ofplatdata or test_handoff or test_spl"
sandbox_vpl:
TEST_PY_BD: "sandbox_vpl"
TEST_PY_TEST_SPEC: "vpl or test_spl"
sandbox_noinst:
TEST_PY_BD: "sandbox_noinst"
TEST_PY_TEST_SPEC: "test_ofplatdata or test_handoff or test_spl"
sandbox_noinst_load_fit_full:
TEST_PY_BD: "sandbox_noinst"
TEST_PY_TEST_SPEC: "test_ofplatdata or test_handoff or test_spl"
OVERRIDE: "-a CONFIG_SPL_LOAD_FIT_FULL=y"
sandbox_flattree:
TEST_PY_BD: "sandbox_flattree"
sandbox_trace:
TEST_PY_BD: "sandbox"
BUILD_ENV: "FTRACE=1 NO_LTO=1"
TEST_PY_TEST_SPEC: "trace"
OVERRIDE: "-a CONFIG_TRACE=y -a CONFIG_TRACE_EARLY=y -a CONFIG_TRACE_EARLY_SIZE=0x01000000 -a CONFIG_TRACE_BUFFER_SIZE=0x02000000"
steps:
- download: current
artifact: testsh
- script: |
# make current directory writeable to uboot user inside the container
# as sandbox testing need create files like spi flash images, etc.
# (TODO: clean up this in the future)
chmod 777 .
chmod 755 $(Pipeline.Workspace)/testsh/test.sh
# Filesystem tests need extra docker args to run
set --
# mount -o loop needs the loop devices
if modprobe loop; then
for d in $(find /dev -maxdepth 1 -name 'loop*'); do
set -- "$@" --device $d:$d
done
fi
# Needed for mount syscall (for guestmount as well)
set -- "$@" --cap-add SYS_ADMIN
# Default apparmor profile denies mounts
set -- "$@" --security-opt apparmor=unconfined
# Some tests using libguestfs-tools need the fuse device to run
docker run "$@" --device /dev/fuse:/dev/fuse \
-v $PWD:$(work_dir) \
-v $(Pipeline.Workspace):$(Pipeline.Workspace) \
-v $(System.DefaultWorkingDirectory):$(System.DefaultWorkingDirectory) \
-e WORK_DIR="${WORK_DIR}" \
-e TEST_PY_BD="${TEST_PY_BD}" \
-e TEST_PY_ID="${TEST_PY_ID}" \
-e TEST_PY_TEST_SPEC="${TEST_PY_TEST_SPEC}" \
-e OVERRIDE="${OVERRIDE}" \
-e BUILD_ENV="${BUILD_ENV}" $(ci_runner_image) \
$(Pipeline.Workspace)/testsh/test.sh
- task: PublishTestResults@2
inputs:
testResultsFormat: 'JUnit'
testResultsFiles: 'results.xml'
- stage: test_py_qemu
jobs:
- job: test_py_qemu
displayName: 'test.py for QEMU platforms'
pool:
vmImage: $(ubuntu_vm)
strategy:
matrix:
coreboot:
TEST_PY_BD: "coreboot"
TEST_PY_ID: "--id qemu"
TEST_PY_TEST_SPEC: "not sleep"
evb_ast2500:
TEST_PY_BD: "evb-ast2500"
TEST_PY_ID: "--id qemu"
TEST_PY_TEST_SPEC: "not sleep"
vexpress_ca9x4:
TEST_PY_BD: "vexpress_ca9x4"
TEST_PY_ID: "--id qemu"
TEST_PY_TEST_SPEC: "not sleep"
vexpress_fvp:
TEST_PY_BD: "vexpress_fvp"
TEST_PY_TEST_SPEC: "not sleep and not hostfs"
vexpress_fvp_bloblist:
TEST_PY_BD: "vexpress_fvp_bloblist"
TEST_PY_TEST_SPEC: "not sleep and not hostfs"
integratorcp_cm926ejs:
TEST_PY_BD: "integratorcp_cm926ejs"
TEST_PY_ID: "--id qemu"
TEST_PY_TEST_SPEC: "not sleep"
qemu_arm:
TEST_PY_BD: "qemu_arm"
TEST_PY_TEST_SPEC: "not sleep"
qemu_arm64:
TEST_PY_BD: "qemu_arm64"
TEST_PY_TEST_SPEC: "not sleep"
OVERRIDE: "-a CONFIG_SEMIHOSTING=y"
qemu_arm64_lwip:
TEST_PY_BD: "qemu_arm64_lwip"
TEST_PY_TEST_SPEC: "test_net_dhcp or test_net_ping or test_net_tftpboot"
qemu_arm64_tfa_fw_handoff:
TEST_PY_BD: "qemu_arm64"
TEST_PY_ID: "--id fw_handoff_tfa_optee"
TEST_PY_TEST_SPEC: "test_fw_handoff"
qemu_arm_sbsa_ref:
TEST_PY_BD: "qemu-arm-sbsa"
TEST_PY_TEST_SPEC: "not sleep"
qemu_m68k:
TEST_PY_BD: "M5208EVBE"
TEST_PY_ID: "--id qemu"
TEST_PY_TEST_SPEC: "not sleep and not efi"
OVERRIDE: "-a CONFIG_M68K_QEMU=y -a ~CONFIG_MCFTMR"
qemu_m68k_virt:
TEST_PY_BD: "qemu-m68k"
TEST_PY_TEST_SPEC: "not sleep"
qemu_malta:
TEST_PY_BD: "malta"
TEST_PY_ID: "--id qemu"
TEST_PY_TEST_SPEC: "not sleep and not efi"
qemu_maltael:
TEST_PY_BD: "maltael"
TEST_PY_ID: "--id qemu"
TEST_PY_TEST_SPEC: "not sleep and not efi"
qemu_malta64:
TEST_PY_BD: "malta64"
TEST_PY_ID: "--id qemu"
TEST_PY_TEST_SPEC: "not sleep and not efi"
qemu_malta64el:
TEST_PY_BD: "malta64el"
TEST_PY_ID: "--id qemu"
TEST_PY_TEST_SPEC: "not sleep and not efi"
qemu_ppce500:
TEST_PY_BD: "qemu-ppce500"
TEST_PY_TEST_SPEC: "not sleep"
qemu_riscv32:
TEST_PY_BD: "qemu-riscv32"
TEST_PY_TEST_SPEC: "not sleep"
qemu_riscv64:
TEST_PY_BD: "qemu-riscv64"
TEST_PY_TEST_SPEC: "not sleep"
qemu_riscv32_spl:
TEST_PY_BD: "qemu-riscv32_spl"
TEST_PY_TEST_SPEC: "not sleep"
qemu_riscv64_spl:
TEST_PY_BD: "qemu-riscv64_spl"
TEST_PY_TEST_SPEC: "not sleep"
qemu_riscv64_smode:
TEST_PY_BD: "qemu-riscv64_smode"
TEST_PY_TEST_SPEC: "not sleep"
qemu_riscv64_smode_acpi:
TEST_PY_BD: "qemu-riscv64_smode_acpi"
TEST_PY_TEST_SPEC: "not sleep"
qemu_x86:
TEST_PY_BD: "qemu-x86"
TEST_PY_TEST_SPEC: "not sleep"
qemu_x86_64:
TEST_PY_BD: "qemu-x86_64"
TEST_PY_TEST_SPEC: "not sleep"
qemu_xtensa_dc233c:
TEST_PY_BD: "qemu-xtensa-dc233c"
TEST_PY_TEST_SPEC: "not sleep and not efi"
r2dplus_i82557c:
TEST_PY_BD: "r2dplus"
TEST_PY_ID: "--id i82557c_qemu"
TEST_PY_TEST_SPEC: "not sleep"
r2dplus_pcnet:
TEST_PY_BD: "r2dplus"
TEST_PY_ID: "--id pcnet_qemu"
TEST_PY_TEST_SPEC: "not sleep"
r2dplus_rtl8139:
TEST_PY_BD: "r2dplus"
TEST_PY_ID: "--id rtl8139_qemu"
TEST_PY_TEST_SPEC: "not sleep"
r2dplus_tulip:
TEST_PY_BD: "r2dplus"
TEST_PY_ID: "--id tulip_qemu"
TEST_PY_TEST_SPEC: "not sleep"
# This is broken upsteam: https://gitlab.com/qemu-project/qemu/-/issues/2945
# sifive_unleashed_sdcard:
# TEST_PY_BD: "sifive_unleashed"
# TEST_PY_ID: "--id sdcard_qemu"
# TEST_PY_TEST_SPEC: "not sleep"
sifive_unleashed_spi-nor:
TEST_PY_BD: "sifive_unleashed"
TEST_PY_ID: "--id spi-nor_qemu"
TEST_PY_TEST_SPEC: "not sleep"
xilinx_mbv32:
TEST_PY_BD: "xilinx_mbv32"
TEST_PY_ID: "--id qemu"
TEST_PY_TEST_SPEC: "not sleep"
xilinx_mbv32_smode test.py:
TEST_PY_BD: "xilinx_mbv32_smode"
TEST_PY_ID: "--id qemu"
TEST_PY_TEST_SPEC: "not sleep"
xilinx_mbv64 test.py:
TEST_PY_BD: "xilinx_mbv64"
TEST_PY_ID: "--id qemu"
TEST_PY_TEST_SPEC: "not sleep"
xilinx_mbv64_smode test.py:
TEST_PY_BD: "xilinx_mbv64_smode"
TEST_PY_ID: "--id qemu"
TEST_PY_TEST_SPEC: "not sleep"
xilinx_zynq_virt:
TEST_PY_BD: "xilinx_zynq_virt"
TEST_PY_ID: "--id qemu"
TEST_PY_TEST_SPEC: "not sleep"
xilinx_versal_virt:
TEST_PY_BD: "xilinx_versal_virt"
TEST_PY_ID: "--id qemu"
TEST_PY_TEST_SPEC: "not sleep"
OVERRIDE: "-a ~CONFIG_USB_DWC3"
xtfpga:
TEST_PY_BD: "xtfpga"
TEST_PY_ID: "--id qemu"
TEST_PY_TEST_SPEC: "not sleep"
steps:
- download: current
artifact: testsh
- script: |
# make current directory writeable to uboot user inside the container
# as sandbox testing need create files like spi flash images, etc.
# (TODO: clean up this in the future)
chmod 777 .
chmod 755 $(Pipeline.Workspace)/testsh/test.sh
# Some tests using libguestfs-tools need the fuse device to run
docker run "$@" --device /dev/fuse:/dev/fuse \
-v $PWD:$(work_dir) \
-v $(Pipeline.Workspace):$(Pipeline.Workspace) \
-v $(System.DefaultWorkingDirectory):$(System.DefaultWorkingDirectory) \
-e WORK_DIR="${WORK_DIR}" \
-e TEST_PY_BD="${TEST_PY_BD}" \
-e TEST_PY_ID="${TEST_PY_ID}" \
-e TEST_PY_TEST_SPEC="${TEST_PY_TEST_SPEC}" \
-e OVERRIDE="${OVERRIDE}" \
-e BUILD_ENV="${BUILD_ENV}" $(ci_runner_image) \
$(Pipeline.Workspace)/testsh/test.sh
retryCountOnTaskFailure: 2 # QEMU may be too slow, etc.
- task: PublishTestResults@2
inputs:
testResultsFormat: 'JUnit'
testResultsFiles: 'results.xml'
- stage: world_build
jobs:
- job: build_the_world
timeoutInMinutes: 0 # Use the maximum allowed
displayName: 'Build the World'
pool:
vmImage: $(ubuntu_vm)
container:
image: $(ci_runner_image)
options: $(container_option)
strategy:
# We split the world up in to 10 jobs as we can have at most 10
# parallel jobs going on the free tier of Azure.
matrix:
am33xx_kirkwood:
BUILDMAN: $(am33xx_kirkwood)
amd:
BUILDMAN: $(amd)
amlogic_bcm:
BUILDMAN: $(amlogic_bcm)
atmel:
BUILDMAN: $(atmel)
engicam_renesas:
BUILDMAN: $(engicam_renesas)
k3_32b:
BUILDMAN: $(k3_32b)
k3_64b:
BUILDMAN: $(k3_64b)
kirkwood_mvebu:
BUILDMAN: $(kirkwood_mvebu)
layerscape_vf610:
BUILDMAN: $(layerscape_vf610)
m68k_remaining_mx_xtensa:
BUILDMAN: $(m68k_remaining_mx_xtensa)
mips_x86:
BUILDMAN: $(mips_x86)
mx6:
BUILDMAN: $(mx6)
imx8:
BUILDMAN: $(imx8)
imx9_arc_nios2_socfpga:
BUILDMAN: $(imx9_arc_nios2_socfpga)
phytec_toradex:
BUILDMAN: $(phytec_toradex)
powerpc:
BUILDMAN: $(powerpc)
riscv_stm32:
BUILDMAN: $(riscv_stm32)
rk3399:
BUILDMAN: $(rk3399)
rk352x_rk358x:
BUILDMAN: $(rk352x_rk358x)
rk356x_rk357x:
BUILDMAN: $(rk356x_rk357x)
rk3xxx_rest:
BUILDMAN: $(rk3xxx_rest)
sandbox_tegra:
BUILDMAN: $(sandbox_tegra)
samsung_omap_mediatek:
BUILDMAN: $(samsung_omap_mediatek)
sun4i_5i:
BUILDMAN: $(sun4i_5i)
sun6i_sun7i:
BUILDMAN: $(sun6i_sun7i)
sun8i:
BUILDMAN: $(sun8i)
sunxi_rest:
BUILDMAN: $(sunxi_rest)
arm_catch_all:
BUILDMAN: $(arm_catch_all)
aarch64_catch_all:
BUILDMAN: $(aarch64_catch_all)
steps:
- script: |
set -ex
# Setup venv, perform build
python3 -m venv /tmp/venv
. /tmp/venv/bin/activate
pip install -r tools/binman/requirements.txt \
-r tools/buildman/requirements.txt \
setuptools
if [[ "${BUILDMAN}" != "" ]]; then
ret=0;
tools/buildman/buildman -o /tmp -PEWM ${BUILDMAN} ${OVERRIDE} || ret=$?;
if [[ $ret -ne 0 ]]; then
tools/buildman/buildman -o /tmp -seP ${BUILDMAN};
exit $ret;
fi;
fi

View File

@@ -1,11 +0,0 @@
# Configuration for the `b4` tool
# See https://b4.docs.kernel.org/en/latest/config.html
[b4]
send-auto-to-cmd = scripts/get_maintainer.pl --nogit --nogit-fallback --nogit-chief-penguins --norolestats --nom
send-auto-cc-cmd = scripts/get_maintainer.pl --nogit-fallback --nogit-chief-penguins --norolestats --nol
# Patchwork integration. You still need to set pw-key to your API key
pw-url = https://patchwork.ozlabs.org/
pw-project = uboot
pw-review-state = under-review
pw-accept-state = accepted

View File

@@ -1,39 +0,0 @@
# Not Linux, so don't expect a Linux tree.
--no-tree
# Temporary for false positive in checkpatch
--ignore COMPLEX_MACRO
# For CFG_SYS_I2C_NOPROBES
--ignore MULTISTATEMENT_MACRO_USE_DO_WHILE
# For simple_strtoul
--ignore CONSIDER_KSTRTO
# For min/max
--ignore MINMAX
# enable more tests
--strict
# Not Linux, so we don't recommend usleep_range() over udelay()
--ignore USLEEP_RANGE
# We also do not have a functionally different mdelay() and udelay()
--ignore LONG_UDELAY
# Ignore networking block comment style
--ignore NETWORKING_BLOCK_COMMENT_STYLE
# Ignore "WARNING: Prefer ether_addr_copy() over memcpy() if the Ethernet
# addresses are __aligned(2)".
--ignore PREFER_ETHER_ADDR_COPY
# ENOSYS is a conventionally used error, even though U-Boot lacks system calls.
--ignore ENOSYS
# A bit shorter of a description is OK with us.
--min-conf-desc-length=2
# Extra checks for U-Boot
--u-boot

View File

@@ -1,855 +0,0 @@
# SPDX-License-Identifier: GPL-2.0
#
# clang-format configuration file. Intended for clang-format >= 11.
#
# For more information, see:
#
# Documentation/dev-tools/clang-format.rst
# https://clang.llvm.org/docs/ClangFormat.html
# https://clang.llvm.org/docs/ClangFormatStyleOptions.html
#
---
AccessModifierOffset: -4
AlignAfterOpenBracket: Align
AlignConsecutiveAssignments: false
AlignConsecutiveDeclarations: false
AlignEscapedNewlines: Left
AlignOperands: true
AlignTrailingComments: false
AllowAllParametersOfDeclarationOnNextLine: false
AllowShortBlocksOnASingleLine: false
AllowShortCaseLabelsOnASingleLine: false
AllowShortFunctionsOnASingleLine: None
AllowShortIfStatementsOnASingleLine: false
AllowShortLoopsOnASingleLine: false
AlwaysBreakAfterDefinitionReturnType: None
AlwaysBreakAfterReturnType: None
AlwaysBreakBeforeMultilineStrings: false
AlwaysBreakTemplateDeclarations: false
BinPackArguments: true
BinPackParameters: true
BraceWrapping:
AfterClass: false
AfterControlStatement: false
AfterEnum: false
AfterFunction: true
AfterNamespace: true
AfterObjCDeclaration: false
AfterStruct: false
AfterUnion: false
AfterExternBlock: false
BeforeCatch: false
BeforeElse: false
IndentBraces: false
SplitEmptyFunction: true
SplitEmptyRecord: true
SplitEmptyNamespace: true
BreakBeforeBinaryOperators: None
BreakBeforeBraces: Custom
BreakBeforeInheritanceComma: false
BreakBeforeTernaryOperators: false
BreakConstructorInitializersBeforeComma: false
BreakConstructorInitializers: BeforeComma
BreakAfterJavaFieldAnnotations: false
BreakStringLiterals: false
ColumnLimit: 80
CommentPragmas: '^ IWYU pragma:'
CompactNamespaces: false
ConstructorInitializerAllOnOneLineOrOnePerLine: false
ConstructorInitializerIndentWidth: 8
ContinuationIndentWidth: 8
Cpp11BracedListStyle: false
DerivePointerAlignment: false
DisableFormat: false
ExperimentalAutoDetectBinPacking: false
FixNamespaceComments: false
# Taken from:
# git grep -h '^#define [^[:space:]]*for_each[^[:space:]]*(' include/ tools/ \
# | sed "s,^#define \([^[:space:]]*for_each[^[:space:]]*\)(.*$, - '\1'," \
# | LC_ALL=C sort -u
ForEachMacros:
- '__ata_qc_for_each'
- '__bio_for_each_bvec'
- '__bio_for_each_segment'
- '__evlist__for_each_entry'
- '__evlist__for_each_entry_continue'
- '__evlist__for_each_entry_from'
- '__evlist__for_each_entry_reverse'
- '__evlist__for_each_entry_safe'
- '__for_each_mem_range'
- '__for_each_mem_range_rev'
- '__for_each_thread'
- '__hlist_for_each_rcu'
- '__map__for_each_symbol_by_name'
- '__pci_bus_for_each_res0'
- '__pci_bus_for_each_res1'
- '__pci_dev_for_each_res0'
- '__pci_dev_for_each_res1'
- '__perf_evlist__for_each_entry'
- '__perf_evlist__for_each_entry_reverse'
- '__perf_evlist__for_each_entry_safe'
- '__rq_for_each_bio'
- '__shost_for_each_device'
- '__sym_for_each'
- '_for_each_counter'
- 'apei_estatus_for_each_section'
- 'ata_for_each_dev'
- 'ata_for_each_link'
- 'ata_qc_for_each'
- 'ata_qc_for_each_raw'
- 'ata_qc_for_each_with_internal'
- 'ax25_for_each'
- 'ax25_uid_for_each'
- 'bio_for_each_bvec'
- 'bio_for_each_bvec_all'
- 'bio_for_each_folio_all'
- 'bio_for_each_integrity_vec'
- 'bio_for_each_segment'
- 'bio_for_each_segment_all'
- 'bio_list_for_each'
- 'bip_for_each_vec'
- 'bond_for_each_slave'
- 'bond_for_each_slave_rcu'
- 'bpf_for_each'
- 'bpf_for_each_reg_in_vstate'
- 'bpf_for_each_reg_in_vstate_mask'
- 'bpf_for_each_spilled_reg'
- 'bpf_object__for_each_map'
- 'bpf_object__for_each_program'
- 'btree_for_each_safe128'
- 'btree_for_each_safe32'
- 'btree_for_each_safe64'
- 'btree_for_each_safel'
- 'card_for_each_dev'
- 'cgroup_taskset_for_each'
- 'cgroup_taskset_for_each_leader'
- 'cpu_aggr_map__for_each_idx'
- 'cpufreq_for_each_efficient_entry_idx'
- 'cpufreq_for_each_entry'
- 'cpufreq_for_each_entry_idx'
- 'cpufreq_for_each_valid_entry'
- 'cpufreq_for_each_valid_entry_idx'
- 'css_for_each_child'
- 'css_for_each_descendant_post'
- 'css_for_each_descendant_pre'
- 'damon_for_each_region'
- 'damon_for_each_region_from'
- 'damon_for_each_region_safe'
- 'damon_for_each_scheme'
- 'damon_for_each_scheme_safe'
- 'damon_for_each_target'
- 'damon_for_each_target_safe'
- 'damos_for_each_filter'
- 'damos_for_each_filter_safe'
- 'damos_for_each_ops_filter'
- 'damos_for_each_ops_filter_safe'
- 'damos_for_each_quota_goal'
- 'damos_for_each_quota_goal_safe'
- 'data__for_each_file'
- 'data__for_each_file_new'
- 'data__for_each_file_start'
- 'def_for_each_cpu'
- 'device_for_each_child_node'
- 'device_for_each_child_node_scoped'
- 'dma_fence_array_for_each'
- 'dma_fence_chain_for_each'
- 'dma_fence_unwrap_for_each'
- 'dma_resv_for_each_fence'
- 'dma_resv_for_each_fence_unlocked'
- 'do_for_each_ftrace_op'
- 'drm_atomic_crtc_for_each_plane'
- 'drm_atomic_crtc_state_for_each_plane'
- 'drm_atomic_crtc_state_for_each_plane_state'
- 'drm_atomic_for_each_plane_damage'
- 'drm_client_for_each_connector_iter'
- 'drm_client_for_each_modeset'
- 'drm_connector_for_each_possible_encoder'
- 'drm_exec_for_each_locked_object'
- 'drm_exec_for_each_locked_object_reverse'
- 'drm_for_each_bridge_in_chain'
- 'drm_for_each_connector_iter'
- 'drm_for_each_crtc'
- 'drm_for_each_crtc_reverse'
- 'drm_for_each_encoder'
- 'drm_for_each_encoder_mask'
- 'drm_for_each_fb'
- 'drm_for_each_legacy_plane'
- 'drm_for_each_plane'
- 'drm_for_each_plane_mask'
- 'drm_for_each_privobj'
- 'drm_gem_for_each_gpuvm_bo'
- 'drm_gem_for_each_gpuvm_bo_safe'
- 'drm_gpusvm_for_each_range'
- 'drm_gpuva_for_each_op'
- 'drm_gpuva_for_each_op_from_reverse'
- 'drm_gpuva_for_each_op_reverse'
- 'drm_gpuva_for_each_op_safe'
- 'drm_gpuvm_bo_for_each_va'
- 'drm_gpuvm_bo_for_each_va_safe'
- 'drm_gpuvm_for_each_va'
- 'drm_gpuvm_for_each_va_range'
- 'drm_gpuvm_for_each_va_range_safe'
- 'drm_gpuvm_for_each_va_safe'
- 'drm_mm_for_each_hole'
- 'drm_mm_for_each_node'
- 'drm_mm_for_each_node_in_range'
- 'drm_mm_for_each_node_safe'
- 'dsa_switch_for_each_available_port'
- 'dsa_switch_for_each_cpu_port'
- 'dsa_switch_for_each_cpu_port_continue_reverse'
- 'dsa_switch_for_each_port'
- 'dsa_switch_for_each_port_continue_reverse'
- 'dsa_switch_for_each_port_safe'
- 'dsa_switch_for_each_user_port'
- 'dsa_switch_for_each_user_port_continue_reverse'
- 'dsa_tree_for_each_cpu_port'
- 'dsa_tree_for_each_user_port'
- 'dsa_tree_for_each_user_port_continue_reverse'
- 'dso__for_each_symbol'
- 'elf_hash_for_each_possible'
- 'elf_symtab__for_each_symbol'
- 'evlist__for_each_cpu'
- 'evlist__for_each_entry'
- 'evlist__for_each_entry_continue'
- 'evlist__for_each_entry_from'
- 'evlist__for_each_entry_reverse'
- 'evlist__for_each_entry_safe'
- 'flow_action_for_each'
- 'for_each_acpi_consumer_dev'
- 'for_each_acpi_dev_match'
- 'for_each_active_dev_scope'
- 'for_each_active_drhd_unit'
- 'for_each_active_iommu'
- 'for_each_active_irq'
- 'for_each_active_route'
- 'for_each_aggr_pgid'
- 'for_each_alloc_capable_rdt_resource'
- 'for_each_and_bit'
- 'for_each_andnot_bit'
- 'for_each_available_child_of_node'
- 'for_each_available_child_of_node_scoped'
- 'for_each_bench'
- 'for_each_bio'
- 'for_each_board_func_rsrc'
- 'for_each_btf_ext_rec'
- 'for_each_btf_ext_sec'
- 'for_each_bvec'
- 'for_each_capable_rdt_resource'
- 'for_each_card_auxs'
- 'for_each_card_auxs_safe'
- 'for_each_card_components'
- 'for_each_card_dapms'
- 'for_each_card_pre_auxs'
- 'for_each_card_prelinks'
- 'for_each_card_rtds'
- 'for_each_card_rtds_safe'
- 'for_each_card_widgets'
- 'for_each_card_widgets_safe'
- 'for_each_cgroup_storage_type'
- 'for_each_child_of_node'
- 'for_each_child_of_node_scoped'
- 'for_each_child_of_node_with_prefix'
- 'for_each_clear_bit'
- 'for_each_clear_bit_from'
- 'for_each_clear_bitrange'
- 'for_each_clear_bitrange_from'
- 'for_each_cmd'
- 'for_each_cmsghdr'
- 'for_each_collection'
- 'for_each_comp_order'
- 'for_each_compatible_node'
- 'for_each_component_dais'
- 'for_each_component_dais_safe'
- 'for_each_conduit'
- 'for_each_console'
- 'for_each_console_srcu'
- 'for_each_cpu'
- 'for_each_cpu_and'
- 'for_each_cpu_andnot'
- 'for_each_cpu_from'
- 'for_each_cpu_or'
- 'for_each_cpu_wrap'
- 'for_each_dapm_widgets'
- 'for_each_dedup_cand'
- 'for_each_dev_addr'
- 'for_each_dev_scope'
- 'for_each_dma_cap_mask'
- 'for_each_dpcm_be'
- 'for_each_dpcm_be_rollback'
- 'for_each_dpcm_be_safe'
- 'for_each_dpcm_fe'
- 'for_each_drhd_unit'
- 'for_each_dss_dev'
- 'for_each_efi_memory_desc'
- 'for_each_efi_memory_desc_in_map'
- 'for_each_element'
- 'for_each_element_extid'
- 'for_each_element_id'
- 'for_each_enabled_cpu'
- 'for_each_endpoint_of_node'
- 'for_each_event'
- 'for_each_event_tps'
- 'for_each_evictable_lru'
- 'for_each_fib6_node_rt_rcu'
- 'for_each_fib6_walker_rt'
- 'for_each_file_lock'
- 'for_each_free_mem_pfn_range_in_zone_from'
- 'for_each_free_mem_range'
- 'for_each_free_mem_range_reverse'
- 'for_each_func_rsrc'
- 'for_each_gpiochip_node'
- 'for_each_group_evsel'
- 'for_each_group_evsel_head'
- 'for_each_group_member'
- 'for_each_group_member_head'
- 'for_each_hstate'
- 'for_each_hwgpio'
- 'for_each_hwgpio_in_range'
- 'for_each_if'
- 'for_each_inject_fn'
- 'for_each_insn'
- 'for_each_insn_op_loc'
- 'for_each_insn_prefix'
- 'for_each_intid'
- 'for_each_iommu'
- 'for_each_ip_tunnel_rcu'
- 'for_each_irq_desc'
- 'for_each_irq_nr'
- 'for_each_lang'
- 'for_each_link_ch_maps'
- 'for_each_link_codecs'
- 'for_each_link_cpus'
- 'for_each_link_platforms'
- 'for_each_lru'
- 'for_each_matching_node'
- 'for_each_matching_node_and_match'
- 'for_each_media_entity_data_link'
- 'for_each_mem_pfn_range'
- 'for_each_mem_range'
- 'for_each_mem_range_rev'
- 'for_each_mem_region'
- 'for_each_member'
- 'for_each_memory'
- 'for_each_migratetype_order'
- 'for_each_missing_reg'
- 'for_each_mle_subelement'
- 'for_each_mod_mem_type'
- 'for_each_mon_capable_rdt_resource'
- 'for_each_mp_bvec'
- 'for_each_net'
- 'for_each_net_continue_reverse'
- 'for_each_net_rcu'
- 'for_each_netdev'
- 'for_each_netdev_continue'
- 'for_each_netdev_continue_rcu'
- 'for_each_netdev_continue_reverse'
- 'for_each_netdev_dump'
- 'for_each_netdev_feature'
- 'for_each_netdev_in_bond_rcu'
- 'for_each_netdev_rcu'
- 'for_each_netdev_reverse'
- 'for_each_netdev_safe'
- 'for_each_new_connector_in_state'
- 'for_each_new_crtc_in_state'
- 'for_each_new_mst_mgr_in_state'
- 'for_each_new_plane_in_state'
- 'for_each_new_plane_in_state_reverse'
- 'for_each_new_private_obj_in_state'
- 'for_each_new_reg'
- 'for_each_nhlt_endpoint'
- 'for_each_nhlt_endpoint_fmtcfg'
- 'for_each_nhlt_fmtcfg'
- 'for_each_node'
- 'for_each_node_by_name'
- 'for_each_node_by_type'
- 'for_each_node_mask'
- 'for_each_node_numadist'
- 'for_each_node_state'
- 'for_each_node_with_cpus'
- 'for_each_node_with_property'
- 'for_each_nonreserved_multicast_dest_pgid'
- 'for_each_numa_hop_mask'
- 'for_each_of_allnodes'
- 'for_each_of_allnodes_from'
- 'for_each_of_cpu_node'
- 'for_each_of_graph_port'
- 'for_each_of_graph_port_endpoint'
- 'for_each_of_pci_range'
- 'for_each_old_connector_in_state'
- 'for_each_old_crtc_in_state'
- 'for_each_old_mst_mgr_in_state'
- 'for_each_old_plane_in_state'
- 'for_each_old_private_obj_in_state'
- 'for_each_oldnew_connector_in_state'
- 'for_each_oldnew_crtc_in_state'
- 'for_each_oldnew_mst_mgr_in_state'
- 'for_each_oldnew_plane_in_state'
- 'for_each_oldnew_plane_in_state_reverse'
- 'for_each_oldnew_private_obj_in_state'
- 'for_each_online_cpu'
- 'for_each_online_cpu_wrap'
- 'for_each_online_node'
- 'for_each_online_pgdat'
- 'for_each_or_bit'
- 'for_each_page_ext'
- 'for_each_path'
- 'for_each_pci_bridge'
- 'for_each_pci_dev'
- 'for_each_pcm_streams'
- 'for_each_physmem_range'
- 'for_each_populated_zone'
- 'for_each_possible_cpu'
- 'for_each_possible_cpu_wrap'
- 'for_each_present_blessed_reg'
- 'for_each_present_cpu'
- 'for_each_present_section_nr'
- 'for_each_prime_number'
- 'for_each_prime_number_from'
- 'for_each_probe_cache_entry'
- 'for_each_process'
- 'for_each_process_thread'
- 'for_each_prop_codec_conf'
- 'for_each_prop_dai_codec'
- 'for_each_prop_dai_cpu'
- 'for_each_prop_dlc_codecs'
- 'for_each_prop_dlc_cpus'
- 'for_each_prop_dlc_platforms'
- 'for_each_property_of_node'
- 'for_each_rdt_resource'
- 'for_each_reg'
- 'for_each_reg_filtered'
- 'for_each_reloc'
- 'for_each_reloc_from'
- 'for_each_requested_gpio'
- 'for_each_requested_gpio_in_range'
- 'for_each_reserved_child_of_node'
- 'for_each_reserved_mem_range'
- 'for_each_reserved_mem_region'
- 'for_each_rtd_ch_maps'
- 'for_each_rtd_codec_dais'
- 'for_each_rtd_components'
- 'for_each_rtd_cpu_dais'
- 'for_each_rtd_dais'
- 'for_each_rtd_dais_reverse'
- 'for_each_sband_iftype_data'
- 'for_each_script'
- 'for_each_sec'
- 'for_each_set_bit'
- 'for_each_set_bit_from'
- 'for_each_set_bit_wrap'
- 'for_each_set_bitrange'
- 'for_each_set_bitrange_from'
- 'for_each_set_clump8'
- 'for_each_sg'
- 'for_each_sg_dma_page'
- 'for_each_sg_page'
- 'for_each_sgtable_dma_page'
- 'for_each_sgtable_dma_sg'
- 'for_each_sgtable_page'
- 'for_each_sgtable_sg'
- 'for_each_sibling_event'
- 'for_each_sta_active_link'
- 'for_each_subelement'
- 'for_each_subelement_extid'
- 'for_each_subelement_id'
- 'for_each_sublist'
- 'for_each_subsystem'
- 'for_each_suite'
- 'for_each_supported_activate_fn'
- 'for_each_supported_inject_fn'
- 'for_each_sym'
- 'for_each_thread'
- 'for_each_token'
- 'for_each_unicast_dest_pgid'
- 'for_each_valid_link'
- 'for_each_vif_active_link'
- 'for_each_vma'
- 'for_each_vma_range'
- 'for_each_vsi'
- 'for_each_wakeup_source'
- 'for_each_zone'
- 'for_each_zone_zonelist'
- 'for_each_zone_zonelist_nodemask'
- 'func_for_each_insn'
- 'fwnode_for_each_available_child_node'
- 'fwnode_for_each_child_node'
- 'fwnode_for_each_parent_node'
- 'fwnode_graph_for_each_endpoint'
- 'gadget_for_each_ep'
- 'genradix_for_each'
- 'genradix_for_each_from'
- 'genradix_for_each_reverse'
- 'hash_for_each'
- 'hash_for_each_possible'
- 'hash_for_each_possible_rcu'
- 'hash_for_each_possible_rcu_notrace'
- 'hash_for_each_possible_safe'
- 'hash_for_each_rcu'
- 'hash_for_each_safe'
- 'hashmap__for_each_entry'
- 'hashmap__for_each_entry_safe'
- 'hashmap__for_each_key_entry'
- 'hashmap__for_each_key_entry_safe'
- 'hctx_for_each_ctx'
- 'hists__for_each_format'
- 'hists__for_each_sort_list'
- 'hlist_bl_for_each_entry'
- 'hlist_bl_for_each_entry_rcu'
- 'hlist_bl_for_each_entry_safe'
- 'hlist_for_each'
- 'hlist_for_each_entry'
- 'hlist_for_each_entry_continue'
- 'hlist_for_each_entry_continue_rcu'
- 'hlist_for_each_entry_continue_rcu_bh'
- 'hlist_for_each_entry_from'
- 'hlist_for_each_entry_from_rcu'
- 'hlist_for_each_entry_rcu'
- 'hlist_for_each_entry_rcu_bh'
- 'hlist_for_each_entry_rcu_notrace'
- 'hlist_for_each_entry_safe'
- 'hlist_for_each_entry_srcu'
- 'hlist_for_each_safe'
- 'hlist_nulls_for_each_entry'
- 'hlist_nulls_for_each_entry_from'
- 'hlist_nulls_for_each_entry_rcu'
- 'hlist_nulls_for_each_entry_safe'
- 'i3c_bus_for_each_i2cdev'
- 'i3c_bus_for_each_i3cdev'
- 'idr_for_each_entry'
- 'idr_for_each_entry_continue'
- 'idr_for_each_entry_continue_ul'
- 'idr_for_each_entry_ul'
- 'iio_for_each_active_channel'
- 'in_dev_for_each_ifa_rcu'
- 'in_dev_for_each_ifa_rtnl'
- 'in_dev_for_each_ifa_rtnl_net'
- 'inet_bind_bucket_for_each'
- 'interval_tree_for_each_span'
- 'intlist__for_each_entry'
- 'intlist__for_each_entry_safe'
- 'kcore_copy__for_each_phdr'
- 'key_for_each'
- 'key_for_each_safe'
- 'klp_for_each_func'
- 'klp_for_each_func_safe'
- 'klp_for_each_func_static'
- 'klp_for_each_object'
- 'klp_for_each_object_safe'
- 'klp_for_each_object_static'
- 'kunit_suite_for_each_test_case'
- 'kvm_for_each_memslot'
- 'kvm_for_each_memslot_in_gfn_range'
- 'kvm_for_each_vcpu'
- 'libbpf_nla_for_each_attr'
- 'list_for_each'
- 'list_for_each_codec'
- 'list_for_each_codec_safe'
- 'list_for_each_continue'
- 'list_for_each_entry'
- 'list_for_each_entry_continue'
- 'list_for_each_entry_continue_rcu'
- 'list_for_each_entry_continue_reverse'
- 'list_for_each_entry_from'
- 'list_for_each_entry_from_rcu'
- 'list_for_each_entry_from_reverse'
- 'list_for_each_entry_lockless'
- 'list_for_each_entry_rcu'
- 'list_for_each_entry_reverse'
- 'list_for_each_entry_safe'
- 'list_for_each_entry_safe_continue'
- 'list_for_each_entry_safe_from'
- 'list_for_each_entry_safe_reverse'
- 'list_for_each_entry_srcu'
- 'list_for_each_from'
- 'list_for_each_prev'
- 'list_for_each_prev_safe'
- 'list_for_each_rcu'
- 'list_for_each_safe'
- 'llist_for_each'
- 'llist_for_each_entry'
- 'llist_for_each_entry_safe'
- 'llist_for_each_safe'
- 'lwq_for_each_safe'
- 'map__for_each_symbol'
- 'map__for_each_symbol_by_name'
- 'mas_for_each'
- 'mas_for_each_rev'
- 'mci_for_each_dimm'
- 'media_device_for_each_entity'
- 'media_device_for_each_intf'
- 'media_device_for_each_link'
- 'media_device_for_each_pad'
- 'media_entity_for_each_pad'
- 'media_pipeline_for_each_entity'
- 'media_pipeline_for_each_pad'
- 'mlx5_lag_for_each_peer_mdev'
- 'mptcp_for_each_subflow'
- 'msi_domain_for_each_desc'
- 'msi_for_each_desc'
- 'mt_for_each'
- 'nanddev_io_for_each_block'
- 'nanddev_io_for_each_page'
- 'neigh_for_each_in_bucket'
- 'neigh_for_each_in_bucket_rcu'
- 'neigh_for_each_in_bucket_safe'
- 'netdev_for_each_lower_dev'
- 'netdev_for_each_lower_private'
- 'netdev_for_each_lower_private_rcu'
- 'netdev_for_each_mc_addr'
- 'netdev_for_each_synced_mc_addr'
- 'netdev_for_each_synced_uc_addr'
- 'netdev_for_each_uc_addr'
- 'netdev_for_each_upper_dev_rcu'
- 'netdev_hw_addr_list_for_each'
- 'nft_rule_for_each_expr'
- 'nla_for_each_attr'
- 'nla_for_each_attr_type'
- 'nla_for_each_nested'
- 'nla_for_each_nested_type'
- 'nlmsg_for_each_attr'
- 'nlmsg_for_each_msg'
- 'nr_neigh_for_each'
- 'nr_neigh_for_each_safe'
- 'nr_node_for_each'
- 'nr_node_for_each_safe'
- 'of_for_each_phandle'
- 'of_property_for_each_string'
- 'of_property_for_each_u32'
- 'pci_bus_for_each_resource'
- 'pci_dev_for_each_resource'
- 'pcl_for_each_chunk'
- 'pcl_for_each_segment'
- 'pcm_for_each_format'
- 'perf_config_items__for_each_entry'
- 'perf_config_sections__for_each_entry'
- 'perf_config_set__for_each_entry'
- 'perf_cpu_map__for_each_cpu'
- 'perf_cpu_map__for_each_cpu_skip_any'
- 'perf_cpu_map__for_each_idx'
- 'perf_evlist__for_each_entry'
- 'perf_evlist__for_each_entry_reverse'
- 'perf_evlist__for_each_entry_safe'
- 'perf_evlist__for_each_evsel'
- 'perf_evlist__for_each_mmap'
- 'perf_evsel_for_each_per_thread_period_safe'
- 'perf_hpp_list__for_each_format'
- 'perf_hpp_list__for_each_format_safe'
- 'perf_hpp_list__for_each_sort_list'
- 'perf_hpp_list__for_each_sort_list_safe'
- 'plist_for_each'
- 'plist_for_each_continue'
- 'plist_for_each_entry'
- 'plist_for_each_entry_continue'
- 'plist_for_each_entry_safe'
- 'plist_for_each_safe'
- 'pnp_for_each_card'
- 'pnp_for_each_dev'
- 'protocol_for_each_card'
- 'protocol_for_each_dev'
- 'queue_for_each_hw_ctx'
- 'radix_tree_for_each_slot'
- 'radix_tree_for_each_tagged'
- 'rb_for_each'
- 'rbtree_postorder_for_each_entry_safe'
- 'rdma_for_each_block'
- 'rdma_for_each_port'
- 'rdma_umem_for_each_dma_block'
- 'resource_list_for_each_entry'
- 'resource_list_for_each_entry_safe'
- 'rhl_for_each_entry_rcu'
- 'rhl_for_each_rcu'
- 'rht_for_each'
- 'rht_for_each_entry'
- 'rht_for_each_entry_from'
- 'rht_for_each_entry_rcu'
- 'rht_for_each_entry_rcu_from'
- 'rht_for_each_entry_safe'
- 'rht_for_each_from'
- 'rht_for_each_rcu'
- 'rht_for_each_rcu_from'
- 'rq_for_each_bvec'
- 'rq_for_each_segment'
- 'rq_list_for_each'
- 'rq_list_for_each_safe'
- 'sample_read_group__for_each'
- 'scsi_for_each_prot_sg'
- 'scsi_for_each_sg'
- 'sctp_for_each_hentry'
- 'sctp_skb_for_each'
- 'sec_for_each_insn'
- 'sec_for_each_insn_continue'
- 'sec_for_each_insn_from'
- 'sec_for_each_sym'
- 'shdma_for_each_chan'
- 'shost_for_each_device'
- 'sk_for_each'
- 'sk_for_each_bound'
- 'sk_for_each_bound_safe'
- 'sk_for_each_entry_offset_rcu'
- 'sk_for_each_from'
- 'sk_for_each_rcu'
- 'sk_for_each_safe'
- 'sk_nulls_for_each'
- 'sk_nulls_for_each_from'
- 'sk_nulls_for_each_rcu'
- 'snd_array_for_each'
- 'snd_pcm_group_for_each_entry'
- 'snd_soc_dapm_widget_for_each_path'
- 'snd_soc_dapm_widget_for_each_path_safe'
- 'snd_soc_dapm_widget_for_each_sink_path'
- 'snd_soc_dapm_widget_for_each_source_path'
- 'sparsebit_for_each_set_range'
- 'strlist__for_each_entry'
- 'strlist__for_each_entry_safe'
- 'sym_for_each_insn'
- 'sym_for_each_insn_continue_reverse'
- 'symbols__for_each_entry'
- 'tb_property_for_each'
- 'tcf_act_for_each_action'
- 'tcf_exts_for_each_action'
- 'test_suite__for_each_test_case'
- 'tool_pmu__for_each_event'
- 'ttm_bo_lru_for_each_reserved_guarded'
- 'ttm_resource_manager_for_each_res'
- 'udp_lrpa_for_each_entry_rcu'
- 'udp_portaddr_for_each_entry'
- 'udp_portaddr_for_each_entry_rcu'
- 'usb_hub_for_each_child'
- 'v4l2_device_for_each_subdev'
- 'v4l2_m2m_for_each_dst_buf'
- 'v4l2_m2m_for_each_dst_buf_safe'
- 'v4l2_m2m_for_each_src_buf'
- 'v4l2_m2m_for_each_src_buf_safe'
- 'virtio_device_for_each_vq'
- 'vkms_config_for_each_connector'
- 'vkms_config_for_each_crtc'
- 'vkms_config_for_each_encoder'
- 'vkms_config_for_each_plane'
- 'vkms_config_connector_for_each_possible_encoder'
- 'vkms_config_encoder_for_each_possible_crtc'
- 'vkms_config_plane_for_each_possible_crtc'
- 'while_for_each_ftrace_op'
- 'workloads__for_each'
- 'xa_for_each'
- 'xa_for_each_marked'
- 'xa_for_each_range'
- 'xa_for_each_start'
- 'xas_for_each'
- 'xas_for_each_conflict'
- 'xas_for_each_marked'
- 'xbc_array_for_each_value'
- 'xbc_for_each_key_value'
- 'xbc_node_for_each_array_value'
- 'xbc_node_for_each_child'
- 'xbc_node_for_each_key_value'
- 'xbc_node_for_each_subkey'
- 'ynl_attr_for_each'
- 'ynl_attr_for_each_nested'
- 'ynl_attr_for_each_payload'
- 'zorro_for_each_dev'
# U-Boot specific
- '__for_each_child_of_node'
- '__usbhs_for_each_pipe'
- '__usbhsg_for_each_uep'
- '_for_each_zynqmp_part'
- 'alist_for_each'
- 'alist_for_each_filter'
- 'cvmx_coremask_for_each_core'
- 'cvmx_coremask_for_each_node'
- 'dev_for_each_property'
- 'dev_for_each_subnode'
- 'expr_list_for_each_sym'
- 'fdt_for_each_node_by_compatible'
- 'fdt_for_each_property_offset'
- 'fdt_for_each_subnode'
- 'for_each_bin_hdr_v0'
- 'for_each_bl_params_node'
- 'for_each_child_withdel'
- 'for_each_console_dev'
- 'for_each_ext_hdr_v0'
- 'for_each_label'
- 'for_each_label_withdel'
- 'for_each_marker'
- 'for_each_marker_of_type'
- 'for_each_memory_map_entry_reversed'
- 'for_each_mmc_mode_by_pref'
- 'for_each_opt_hdr_v1'
- 'for_each_property_withdel'
- 'for_each_sd_mode_by_pref'
- 'for_each_supported_width'
- 'for_each_tpm_device'
- 'for_each_w1_device'
- 'for_each_zynqmp_image'
- 'for_each_zynqmp_part'
- 'for_each_zynqmp_part_in_image'
- 'mtd_for_each_device'
- 'ofnode_for_each_compatible_node'
- 'ofnode_for_each_prop'
- 'ofnode_for_each_subnode'
- 'pko_for_each_port'
- 'sfi_for_each_mentry'
- 'ubi_for_each_free_peb'
- 'ubi_for_each_protected_peb'
- 'ubi_for_each_scrub_peb'
- 'ubi_for_each_used_peb'
- 'ubi_rb_for_each_entry'
- 'usbhs_for_each_dfifo'
- 'usbhs_for_each_pipe'
- 'usbhs_for_each_pipe_with_dcp'
- 'usbhsg_for_each_uep'
- 'usbhsg_for_each_uep_with_dcp'
IncludeBlocks: Preserve
IncludeCategories:
- Regex: '.*'
Priority: 1
IncludeIsMainRegex: '(Test)?$'
IndentCaseLabels: false
IndentGotoLabels: false
IndentPPDirectives: None
IndentWidth: 8
IndentWrappedFunctionNames: false
JavaScriptQuotes: Leave
JavaScriptWrapImports: true
KeepEmptyLinesAtTheStartOfBlocks: false
MacroBlockBegin: ''
MacroBlockEnd: ''
MaxEmptyLinesToKeep: 1
NamespaceIndentation: None
ObjCBinPackProtocolList: Auto
ObjCBlockIndentWidth: 8
ObjCSpaceAfterProperty: true
ObjCSpaceBeforeProtocolList: true
# Taken from git's rules
PenaltyBreakAssignment: 10
PenaltyBreakBeforeFirstCallParameter: 30
PenaltyBreakComment: 10
PenaltyBreakFirstLessLess: 0
PenaltyBreakString: 10
PenaltyExcessCharacter: 100
PenaltyReturnTypeOnItsOwnLine: 60
PointerAlignment: Right
ReflowComments: false
SortIncludes: false
SortUsingDeclarations: false
SpaceAfterCStyleCast: false
SpaceAfterTemplateKeyword: true
SpaceBeforeAssignmentOperators: true
SpaceBeforeCtorInitializerColon: true
SpaceBeforeInheritanceColon: true
SpaceBeforeParens: ControlStatementsExceptForEachMacros
SpaceBeforeRangeBasedForLoopColon: true
SpaceInEmptyParentheses: false
SpacesBeforeTrailingComments: 1
SpacesInAngles: false
SpacesInContainerLiterals: false
SpacesInCStyleCastParentheses: false
SpacesInParentheses: false
SpacesInSquareBrackets: false
Standard: Cpp03
TabWidth: 8
UseTab: Always
...

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@@ -1 +0,0 @@
--find-maintainer-files --git --maintainer-path=.

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@@ -1 +0,0 @@
"Pali Rohár" <pali@kernel.org>

8
.gitattributes vendored
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@@ -1,8 +0,0 @@
# Declare files that always have LF line endings on checkout
* text eol=lf
# Denote all files that are truly binary and should not be modified
*.bin binary
*.bmp binary
*.ttf binary
*.gz binary
*.png binary

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@@ -1,6 +0,0 @@
Please do not submit a Pull Request via github. Our project makes use of
mailing lists for patch submission and review. For more details please
see https://u-boot.readthedocs.io/en/latest/develop/sending_patches.html
The only exception to this is in order to trigger a CI loop on Azure prior
to posting of patches.

141
.gitignore vendored
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@@ -1,141 +0,0 @@
#
# NOTE! Don't add files that are generated in specific
# subdirectories here. Add them in the ".gitignore" file
# in that subdirectory instead.
#
# Normal rules (sorted alphabetically)
#
.*
!.checkpatch.conf
*.a
*.asn1.[ch]
*.bin
*.bin[_.]*
*.cfgout
*.cover
*.dtb
*.dtbo
*.dtb.S
*.elf
*.exe
*.fit
*.gcda
*.gcno
*.i
*.img
*.itb
*.lex.c
*.lst
*.map
*.mod.c
*.mbx
*.o
*.o.*
*.order
*.patch
*.pem
*.s
*.su
*.swp
*.tab.[ch]
*.ti-*
# Build tree
/build*
#
# Top-level generic files
#
fit-dtb.blob*
/MLO*
/SPL*
/System.map
/boards.cfg
/mkimage*mkimage
/mkimage-in-simple-bin*
/simple-bin*
/u-boot*
/*.log
#
# We don't want to ignore the following even if they are dot-files
#
!.clang-format
!.get_maintainer.*
!.gitattributes
!.gitignore
!.mailmap
#
# Generated files
#
/spl/
/tpl/
/vpl/
/defconfig
/generated_defconfig
/Test*
/capsule*.efi-capsule
/capsule*.map
/keep-syms-lto.*
/*imx8mimage*
/*imx8mcst*
/*rcar4-sa0*
/drivers/video/u_boot_logo.S
/test/fdt_overlay/test-fdt-overlay-stacked.dtbo.S
/test/fdt_overlay/test-fdt-overlay.dtbo.S
capsule_esl_file
#
# Generated include files
#
/include/autoconf.mk*
/include/config.h
/include/config/
/include/generated/
/include/bmp_logo.h
/include/bmp_logo_data.h
# stgit generated dirs
patches-*
.stgit-edit.txt
# quilt's files
patches
series
# gdb files
.gdb_history
# cscope files
cscope.*
# tags files
/tags
/ctags
/etags
# gnu global files
GPATH
GRTAGS
GSYMS
GTAGS
*.orig
*~
\#*#
# Python cache
__pycache__
# Python code coverage output (python3-coverage html)
/htmlcov/
# pylint files
/pylint.cur
/pylint.out/
# qconfig database
/qconfig.db
# Clang's compilation database file
/compile_commands.json

View File

@@ -1,227 +0,0 @@
# Definition for the lab connected to the "sage" host and managed with labgrid
.sage_lab_template: &sage_lab_dfn
stage: sage-lab
rules:
- if: $SAGE_LAB == "1"
when: always
- if: $SAGE_LAB != "1"
when: manual
allow_failure: true
# USB can be unreliable.
retry: 2
dependencies: []
needs: [ "sandbox test.py" ]
tags: [ 'konsulko-sage-labgrid' ]
before_script:
# Clone uboot-test-hooks
- git config --global --add safe.directory "${CI_PROJECT_DIR}"
- git clone --depth=1 https://source.denx.de/u-boot/u-boot-test-hooks /tmp/uboot-test-hooks
- ln -s sage /tmp/uboot-test-hooks/bin/`hostname`
- ln -s sage /tmp/uboot-test-hooks/py/`hostname`
- export LG_ENV="/tmp/uboot-test-hooks/bin/sage/labgrid-sage-env.yaml";
export LG_COORDINATOR=172.17.0.1:20408
# Prepare python environment
- python3 -m venv /tmp/venv;
. /tmp/venv/bin/activate;
pip install -r test/py/requirements.txt -r tools/binman/requirements.txt
-r tools/buildman/requirements.txt -r tools/u_boot_pylib/requirements.txt
labgrid setuptools
# Acquire and turn on the exporter.
- labgrid-client reserve --wait board=${LABGRID_EXPORTER} &&
labgrid-client -p ${LABGRID_EXPORTER} acquire &&
labgrid-client -p ${LABGRID_EXPORTER} power on
# Prepare ssh
- mkdir --mode=0700 ~/.ssh;
printf 'Host sage-exporter-*\n\tUser labgrid\n' > ~/.ssh/config
# If we have TF-A binaries, we need to use them.
- if [[ -d /opt/tf-a/${TEST_PY_BD}${TEST_PY_ID//--id /_} ]]; then
cp /opt/tf-a/${TEST_PY_BD}${TEST_PY_ID//--id /_}/* /tmp/;
elif [[ -d /opt/tf-a/${TEST_PY_BD} ]]; then
cp /opt/tf-a/${TEST_PY_BD}/* /tmp/;
fi;
export BINMAN_INDIRS=/tmp;
script:
- export UBOOT_TRAVIS_BUILD_DIR=/tmp/${TEST_PY_BD}
# Don't stop on non-zero exit codes now, to provide as much chance as
# possible to ensure we don't leave lab resources acquired.
- set +e;
# Sage is 16 threads and has 4 devices attached, so 4 builder threads.
- tools/buildman/buildman -o ${UBOOT_TRAVIS_BUILD_DIR} -w -E -W -e
--board ${TEST_PY_BD} ${OVERRIDE} -T 4;
RC=`echo $?`;
# Wait for the exporter to have the device ready
- while test `labgrid-client resources |
grep -q ${LABGRID_EXPORTER}/${LG_PLACE}/; echo $?` -ne 0; do sleep 1;
done
# Fingerprint the exporter
- ssh-keyscan ${LABGRID_EXPORTER} > ~/.ssh/known_hosts 2>/dev/null
# If we built, run the tests and save the results.
- export PATH=/tmp/uboot-test-hooks/bin:${PATH};
export PYTHONPATH=/tmp/uboot-test-hooks/py/sage;
test $RC -eq 0 && labgrid-client reserve --wait board=${LG_PLACE} &&
labgrid-client -p ${LG_PLACE} acquire &&
./test/py/test.py -ra --bd ${TEST_PY_BD} ${TEST_PY_ID}
${TEST_PY_EXTRA:-"--capture=tee-sys"}
${TEST_PY_TEST_SPEC:+"-k ${TEST_PY_TEST_SPEC}"}
--build-dir "$UBOOT_TRAVIS_BUILD_DIR"
--junitxml=/tmp/${TEST_PY_BD}/results.xml;
RC=`echo $?`;
cp -v /tmp/${TEST_PY_BD}/*.{html,css,xml} .;
# Release and power off everything.
- labgrid-client -p ${LG_PLACE} power off
- labgrid-client -p ${LG_PLACE} release
- labgrid-client -p ${LABGRID_EXPORTER} ssh sudo poweroff && sleep 15 &&
labgrid-client -p ${LABGRID_EXPORTER} power off
- labgrid-client -p ${LABGRID_EXPORTER} release
- exit $RC
artifacts:
when: always
paths:
- "*.html"
- "*.css"
- results.xml
reports:
junit: results.xml
expire_in: 1 week
BeagleBone Black:
<<: *sage_lab_dfn
variables:
LABGRID_EXPORTER: "sage-exporter-bbb-1"
LG_PLACE: "bbb-1"
TEST_PY_BD: "am335x_evm"
OVERRIDE: "-a CMD_BOOTMENU -a CMD_LOG -a CMD_BOOTEFI_HELLO -a CMD_BOOTEFI_SELFTEST"
BeagleBone Black (lwIP):
<<: *sage_lab_dfn
needs: [ "BeagleBone Black" ]
variables:
LABGRID_EXPORTER: "sage-exporter-bbb-1"
LG_PLACE: "bbb-1"
TEST_PY_BD: "am335x_evm"
OVERRIDE: "-a CMD_BOOTMENU -a CMD_LOG -a CMD_BOOTEFI_HELLO -a CMD_BOOTEFI_SELFTEST -a NET_LWIP"
Pine64+:
<<: *sage_lab_dfn
variables:
LABGRID_EXPORTER: "sage-exporter-pine64-1"
LG_PLACE: "pine64-1"
TEST_PY_BD: "pine64_plus"
OVERRIDE: "-a CMD_BOOTMENU -a CMD_LOG"
Pine64+ (lwIP):
<<: *sage_lab_dfn
needs: [ "Pine64+" ]
variables:
LABGRID_EXPORTER: "sage-exporter-pine64-1"
LG_PLACE: "pine64-1"
TEST_PY_BD: "pine64_plus"
# Leads to crash on lwIP, needs investigation.
TEST_PY_TEST_SPEC: "not test_net_pxe_boot_config"
OVERRIDE: "-a CMD_BOOTMENU -a CMD_LOG -a NET_LWIP"
SolidRun Hummingboard 2:
<<: *sage_lab_dfn
variables:
LABGRID_EXPORTER: "sage-exporter-hb-1"
LG_PLACE: "hb-1"
TEST_PY_BD: "mx6cuboxi"
OVERRIDE: "-a UNIT_TEST -a ~CMD_EFIDEBUG -a CMD_BOOTMENU -a CMD_LOG"
SolidRun Hummingboard 2 (lwIP):
<<: *sage_lab_dfn
needs: [ "SolidRun Hummingboard 2" ]
variables:
LABGRID_EXPORTER: "sage-exporter-hb-1"
LG_PLACE: "hb-1"
TEST_PY_BD: "mx6cuboxi"
OVERRIDE: "-a UNIT_TEST -a ~CMD_EFIDEBUG -a CMD_BOOTMENU -a CMD_LOG -a NET_LWIP"
Raspberry Pi 4:
<<: *sage_lab_dfn
variables:
LABGRID_EXPORTER: "sage-exporter-rpi4-1"
LG_PLACE: "rpi4-1"
TEST_PY_BD: "rpi_4"
OVERRIDE: "-a UNIT_TEST -a ~CMD_EFIDEBUG -a CMD_BOOTMENU -a CMD_LOG -a ~CMD_BOOTEFI_SELFTEST -a CMD_TFTPPUT -a FIT -a FIT_SIGNATURE -a FIT_BEST_MATCH -a SYS_BOOTM_LEN=0x4000000 -a BOOTSTAGE -a BOOTSTAGE_STASH -a CMD_BOOTSTAGE -a BOOTSTAGE_STASH_ADDR=0x02400000"
Raspberry Pi 4 (rpi_arm64):
<<: *sage_lab_dfn
needs: [ "Raspberry Pi 4" ]
variables:
LABGRID_EXPORTER: "sage-exporter-rpi4-1"
LG_PLACE: "rpi4-1"
TEST_PY_BD: "rpi_arm64"
OVERRIDE: "-a UNIT_TEST -a ~CMD_EFIDEBUG -a CMD_BOOTMENU -a CMD_LOG -a ~CMD_BOOTEFI_SELFTEST -a CMD_TFTPPUT -a FIT -a FIT_SIGNATURE -a FIT_BEST_MATCH -a SYS_BOOTM_LEN=0x4000000 -a BOOTSTAGE -a BOOTSTAGE_STASH -a CMD_BOOTSTAGE -a BOOTSTAGE_STASH_ADDR=0x02400000"
Raspberry Pi 4 (rpi_arm64, lwIP):
<<: *sage_lab_dfn
needs: [ "Raspberry Pi 4 (rpi_arm64)" ]
variables:
LABGRID_EXPORTER: "sage-exporter-rpi4-1"
LG_PLACE: "rpi4-1"
TEST_PY_BD: "rpi_arm64"
OVERRIDE: "-a UNIT_TEST -a ~CMD_EFIDEBUG -a CMD_BOOTMENU -a CMD_LOG -a ~CMD_BOOTEFI_SELFTEST -a FIT -a FIT_SIGNATURE -a FIT_BEST_MATCH -a SYS_BOOTM_LEN=0x4000000 -a BOOTSTAGE -a BOOTSTAGE_STASH -a CMD_BOOTSTAGE -a BOOTSTAGE_STASH_ADDR=0x02400000 -a NET_LWIP"
Raspberry Pi 4 (rpi_4_32b):
<<: *sage_lab_dfn
needs: [ "Raspberry Pi 4 (rpi_arm64, lwIP)" ]
variables:
LABGRID_EXPORTER: "sage-exporter-rpi4-1"
LG_PLACE: "rpi4-1"
TEST_PY_BD: "rpi_4_32b"
OVERRIDE: "-a UNIT_TEST -a ~CMD_EFIDEBUG -a CMD_BOOTMENU -a CMD_LOG -a CMD_BOOTEFI_SELFTEST -a CMD_TFTPPUT -a FIT -a FIT_SIGNATURE -a FIT_BEST_MATCH -a SYS_BOOTM_LEN=0x4000000 -a BOOTSTAGE -a BOOTSTAGE_STASH -a CMD_BOOTSTAGE -a BOOTSTAGE_STASH_ADDR=0x02400000"
Raspberry Pi 4 (rpi_4_32b, lwIP):
<<: *sage_lab_dfn
needs: [ "Raspberry Pi 4 (rpi_4_32b)" ]
variables:
LABGRID_EXPORTER: "sage-exporter-rpi4-1"
LG_PLACE: "rpi4-1"
TEST_PY_BD: "rpi_4_32b"
OVERRIDE: "-a UNIT_TEST -a ~CMD_EFIDEBUG -a CMD_BOOTMENU -a CMD_LOG -a CMD_BOOTEFI_SELFTEST -a FIT -a FIT_SIGNATURE -a FIT_BEST_MATCH -a SYS_BOOTM_LEN=0x4000000 -a BOOTSTAGE -a BOOTSTAGE_STASH -a CMD_BOOTSTAGE -a BOOTSTAGE_STASH_ADDR=0x02400000 -a NET_LWIP"
Raspberry Pi 3:
<<: *sage_lab_dfn
variables:
LABGRID_EXPORTER: "sage-exporter-rpi3-1"
LG_PLACE: "rpi3-1"
TEST_PY_BD: "rpi_3"
OVERRIDE: "-a UNIT_TEST -a ~CMD_EFIDEBUG -a CMD_BOOTMENU -a CMD_LOG -a CMD_BOOTEFI_SELFTEST -a CMD_TFTPPUT -a FIT -a FIT_SIGNATURE -a FIT_BEST_MATCH -a SYS_BOOTM_LEN=0x4000000 -a BOOTSTAGE -a BOOTSTAGE_STASH -a CMD_BOOTSTAGE -a BOOTSTAGE_STASH_ADDR=0x02400000"
Raspberry Pi 3 (rpi_arm64):
<<: *sage_lab_dfn
needs: [ "Raspberry Pi 3" ]
variables:
LABGRID_EXPORTER: "sage-exporter-rpi3-1"
LG_PLACE: "rpi3-1"
TEST_PY_BD: "rpi_arm64"
OVERRIDE: "-a UNIT_TEST -a ~CMD_EFIDEBUG -a CMD_BOOTMENU -a CMD_LOG -a ~CMD_BOOTEFI_SELFTEST -a CMD_TFTPPUT -a FIT -a FIT_SIGNATURE -a FIT_BEST_MATCH -a SYS_BOOTM_LEN=0x4000000 -a BOOTSTAGE -a BOOTSTAGE_STASH -a CMD_BOOTSTAGE -a BOOTSTAGE_STASH_ADDR=0x02400000"
Raspberry Pi 3 (rpi_arm64, lwIP):
<<: *sage_lab_dfn
needs: [ "Raspberry Pi 3 (rpi_arm64)" ]
variables:
LABGRID_EXPORTER: "sage-exporter-rpi3-1"
LG_PLACE: "rpi3-1"
TEST_PY_BD: "rpi_arm64"
OVERRIDE: "-a UNIT_TEST -a ~CMD_EFIDEBUG -a CMD_BOOTMENU -a CMD_LOG -a ~CMD_BOOTEFI_SELFTEST -a FIT -a FIT_SIGNATURE -a FIT_BEST_MATCH -a SYS_BOOTM_LEN=0x4000000 -a BOOTSTAGE -a BOOTSTAGE_STASH -a CMD_BOOTSTAGE -a BOOTSTAGE_STASH_ADDR=0x02400000 -a NET_LWIP"
Raspberry Pi 3 (rpi_3_32b):
<<: *sage_lab_dfn
needs: [ "Raspberry Pi 3 (rpi_arm64, lwIP)" ]
variables:
LABGRID_EXPORTER: "sage-exporter-rpi3-1"
LG_PLACE: "rpi3-1"
TEST_PY_BD: "rpi_3_32b"
OVERRIDE: "-a UNIT_TEST -a ~CMD_EFIDEBUG -a CMD_BOOTMENU -a CMD_LOG -a CMD_BOOTEFI_SELFTEST -a CMD_TFTPPUT -a FIT -a FIT_SIGNATURE -a FIT_BEST_MATCH -a SYS_BOOTM_LEN=0x4000000 -a BOOTSTAGE -a BOOTSTAGE_STASH -a CMD_BOOTSTAGE -a BOOTSTAGE_STASH_ADDR=0x02400000"
Raspberry Pi 3 (rpi_3_32b, lwIP):
<<: *sage_lab_dfn
needs: [ "Raspberry Pi 3 (rpi_3_32b)" ]
variables:
LABGRID_EXPORTER: "sage-exporter-rpi3-1"
LG_PLACE: "rpi3-1"
TEST_PY_BD: "rpi_3_32b"
OVERRIDE: "-a UNIT_TEST -a ~CMD_EFIDEBUG -a CMD_BOOTMENU -a CMD_LOG -a CMD_BOOTEFI_SELFTEST -a FIT -a FIT_SIGNATURE -a FIT_BEST_MATCH -a SYS_BOOTM_LEN=0x4000000 -a BOOTSTAGE -a BOOTSTAGE_STASH -a CMD_BOOTSTAGE -a BOOTSTAGE_STASH_ADDR=0x02400000 -a NET_LWIP"

View File

@@ -1,799 +0,0 @@
# SPDX-License-Identifier: GPL-2.0+
variables:
DEFAULT_ALL_TAG: "all"
DEFAULT_AMD64_TAG: "amd64"
DEFAULT_FAST_TAG: "fast"
MIRROR_DOCKER: docker.io
SAGE_LAB: ""
SJG_LAB: ""
PLATFORM: linux/amd64,linux/arm64
default:
tags:
- ${DEFAULT_ALL_TAG}
workflow:
rules:
- when: always
# Grab our configured image. The source for this is found
# in the u-boot tree at tools/docker/Dockerfile
image: ${MIRROR_DOCKER}/trini/u-boot-gitlab-ci-runner:noble-20251013-23Jan2026
# We run some tests in different order, to catch some failures quicker.
stages:
- testsuites
- test.py
- sage-lab
- sjg-lab
- world build
.buildman_and_testpy_template: &buildman_and_testpy_dfn
stage: test.py
retry: 2 # QEMU may be too slow, etc.
needs: [ "Build allyesconfig, tools-only and envtools" ]
before_script:
# Clone uboot-test-hooks
- git config --global --add safe.directory "${CI_PROJECT_DIR}"
- git clone --depth=1 https://source.denx.de/u-boot/u-boot-test-hooks /tmp/uboot-test-hooks
# qemu_arm64_lwip_defconfig is the same as qemu_arm64 but with NET_LWIP enabled.
# The test config and the boardenv file from qemu_arm64 can be re-used so create symlinks
- ln -s conf.qemu_arm64 /tmp/uboot-test-hooks/bin/travis-ci/conf.qemu_arm64_lwip_na
- ln -s u_boot_boardenv_qemu_arm64_na.py /tmp/uboot-test-hooks/py/travis-ci/u_boot_boardenv_qemu_arm64_lwip_na.py
- ln -s travis-ci /tmp/uboot-test-hooks/bin/`hostname`
- ln -s travis-ci /tmp/uboot-test-hooks/py/`hostname`
- if [[ "${TEST_PY_BD}" == "qemu-riscv32_spl" ]] || [[ "${TEST_PY_BD}" == "xilinx_mbv32_smode" ]]; then
wget -O - https://github.com/riscv-software-src/opensbi/releases/download/v1.3.1/opensbi-1.3.1-rv-bin.tar.xz | tar -C /tmp -xJ;
export OPENSBI=/tmp/opensbi-1.3.1-rv-bin/share/opensbi/ilp32/generic/firmware/fw_dynamic.bin;
fi
- if [[ "${TEST_PY_BD}" == "qemu-riscv64_spl" ]] || [[ "${TEST_PY_BD}" == "sifive_unleashed" ]] || [[ "${TEST_PY_BD}" == "xilinx_mbv64_smode" ]]; then
wget -O - https://github.com/riscv-software-src/opensbi/releases/download/v1.3.1/opensbi-1.3.1-rv-bin.tar.xz | tar -C /tmp -xJ;
export OPENSBI=/tmp/opensbi-1.3.1-rv-bin/share/opensbi/lp64/generic/firmware/fw_dynamic.bin;
fi
- if [[ "${TEST_PY_BD}" == "qemu-arm-sbsa" ]]; then
wget -O /tmp/bl1.bin https://artifacts.codelinaro.org/artifactory/linaro-419-sbsa-ref/latest/tf-a/bl1.bin;
wget -O /tmp/fip.bin https://artifacts.codelinaro.org/artifactory/linaro-419-sbsa-ref/latest/tf-a/fip.bin;
export BINMAN_INDIRS=/tmp;
fi
# Prepare python environment
- python3 -m venv /tmp/venv;
. /tmp/venv/bin/activate;
pip install -r test/py/requirements.txt -r tools/binman/requirements.txt
-r tools/buildman/requirements.txt -r tools/u_boot_pylib/requirements.txt
setuptools
after_script:
- cp -v /tmp/${TEST_PY_BD}/*.{html,css,xml} .
- rm -rf /tmp/uboot-test-hooks /tmp/venv
script:
# If we've been asked to use clang only do one configuration.
- export UBOOT_TRAVIS_BUILD_DIR=/tmp/${TEST_PY_BD}
- echo BUILD_ENV ${BUILD_ENV}
- if [ -n "${BUILD_ENV}" ]; then
export ${BUILD_ENV};
fi
- tools/buildman/buildman -o ${UBOOT_TRAVIS_BUILD_DIR} -w -E -W -e
--board ${TEST_PY_BD} ${OVERRIDE}
- cp /opt/grub/grub_x86.efi $UBOOT_TRAVIS_BUILD_DIR/
- cp /opt/grub/grub_x64.efi $UBOOT_TRAVIS_BUILD_DIR/
- cp /opt/grub/grubriscv64.efi $UBOOT_TRAVIS_BUILD_DIR/grub_riscv64.efi
- cp /opt/grub/grubaa64.efi $UBOOT_TRAVIS_BUILD_DIR/grub_arm64.efi
- cp /opt/grub/grubarm.efi $UBOOT_TRAVIS_BUILD_DIR/grub_arm.efi
# create sdcard / spi-nor images for sifive unleashed using genimage
- if [[ "${TEST_PY_BD}" == "sifive_unleashed" ]]; then
mkdir -p root;
cp ${UBOOT_TRAVIS_BUILD_DIR}/spl/u-boot-spl.bin .;
cp ${UBOOT_TRAVIS_BUILD_DIR}/u-boot.itb .;
rm -rf tmp;
genimage --inputpath . --config board/sifive/unleashed/genimage_sdcard.cfg;
cp images/sdcard.img ${UBOOT_TRAVIS_BUILD_DIR}/;
rm -rf tmp;
genimage --inputpath . --config board/sifive/unleashed/genimage_spi-nor.cfg;
cp images/spi-nor.img ${UBOOT_TRAVIS_BUILD_DIR}/;
fi
- if [[ "${TEST_PY_BD}" == "coreboot" ]]; then
cp /opt/coreboot/coreboot.rom ${UBOOT_TRAVIS_BUILD_DIR}/coreboot.rom;
/opt/coreboot/cbfstool ${UBOOT_TRAVIS_BUILD_DIR}/coreboot.rom remove -n fallback/payload;
/opt/coreboot/cbfstool ${UBOOT_TRAVIS_BUILD_DIR}/coreboot.rom add-flat-binary -f ${UBOOT_TRAVIS_BUILD_DIR}/u-boot.bin -n fallback/payload -c LZMA -l 0x1110000 -e 0x1110000;
fi
# If we have TF-A binaries, we need to use them.
- tfa_dir=""
- rm -f /tmp/fip.bin
- rm -f /tmp/bl1.bin
- if [[ -d /opt/tf-a/"${TEST_PY_BD}${TEST_PY_ID//--id /_}" ]]; then
tfa_dir="/opt/tf-a/${TEST_PY_BD}${TEST_PY_ID//--id /_}";
elif [[ -d /opt/tf-a/"${TEST_PY_BD}" ]]; then
tfa_dir="/opt/tf-a/${TEST_PY_BD}";
fi
- if [[ -n "$tfa_dir" ]]; then
cp "$tfa_dir"/fip.bin "$tfa_dir"/bl1.bin /tmp/;
fi
- if [ -f /tmp/fip.bin ] && [ -f /tmp/bl1.bin ]; then
export fip=/tmp/fip.bin;
export bl1=/tmp/bl1.bin;
export PATH=/opt/Base_RevC_AEMvA_pkg/models/Linux64_GCC-9.3:${PATH};
fi
# "${var:+"-k $var"}" expands to "" if $var is empty, "-k $var" if not
- export PATH=/opt/qemu/bin:/tmp/uboot-test-hooks/bin:${PATH};
export PYTHONPATH=/tmp/uboot-test-hooks/py/travis-ci;
python3 -m http.server 80 --directory "${UBOOT_TRAVIS_BUILD_DIR}" > /dev/null 2>&1 &
HTTP_PID=$!;
sleep 1;
if ps -p ${HTTP_PID} > /dev/null; then
export HTTP_PID;
else
unset HTTP_PID;
fi;
./test/py/test.py -ra --bd ${TEST_PY_BD} ${TEST_PY_ID} ${TEST_PY_EXTRA}
${TEST_PY_TEST_SPEC:+"-k ${TEST_PY_TEST_SPEC}"}
--build-dir "$UBOOT_TRAVIS_BUILD_DIR"
--junitxml=/tmp/${TEST_PY_BD}/results.xml;
if [[ -n "${HTTP_PID}" ]]; then
kill ${HTTP_PID};
fi
artifacts:
when: always
paths:
- "*.html"
- "*.css"
- results.xml
reports:
junit: results.xml
expire_in: 1 week
build all platforms in a single job:
stage: world build
dependencies: []
needs: [ "sandbox test.py" ]
tags:
- ${DEFAULT_FAST_TAG}
script:
# Prepare python environment
- python3 -m venv /tmp/venv;
. /tmp/venv/bin/activate;
pip install -r tools/binman/requirements.txt
-r tools/buildman/requirements.txt
setuptools
- ret=0;
git config --global --add safe.directory "${CI_PROJECT_DIR}";
./tools/buildman/buildman -o /tmp -PEWM -x xtensa || ret=$?;
if [[ $ret -ne 0 ]]; then
./tools/buildman/buildman -o /tmp -seP;
exit $ret;
fi;
.testsuites:
stage: testsuites
check for new CONFIG symbols outside Kconfig:
extends: .testsuites
script:
- git config --global --add safe.directory "${CI_PROJECT_DIR}"
# If grep succeeds and finds a match the test fails as we should
# have no matches.
- git grep -E '^#[[:blank:]]*(define|undef)[[:blank:]]*CONFIG_'
:^doc/ :^arch/arm/dts/ :^scripts/kconfig/lkc.h
:^include/linux/kconfig.h :^tools/ :^dts/upstream/
:^lib/mbedtls/external :^lib/mbedtls/mbedtls_def_config.h &&
exit 1 || exit 0
# build documentation
docs:
extends: .testsuites
script:
- python3 -m venv /tmp/venvhtml
- . /tmp/venvhtml/bin/activate
- pip install -r doc/sphinx/requirements.txt -r test/py/requirements.txt
- make htmldocs KDOC_WERROR=1
- make infodocs
# ensure all configs have MAINTAINERS entries
Check for configs without MAINTAINERS entry:
extends: .testsuites
script:
- ./tools/buildman/buildman --maintainer-check
# Ensure host tools build
Build allyesconfig, tools-only and envtools:
extends: .testsuites
script:
# Allow pipefail because of how we use 'yes' here.
- set +o pipefail;
yes 0 | make allyesconfig oldconfig all -j$(nproc);
make mrproper;
make tools-only_config tools-only -j$(nproc);
make mrproper;
make tools-only_config envtools -j$(nproc)
Run binman, buildman, dtoc, Kconfig and patman testsuites:
extends: .testsuites
tags:
- ${DEFAULT_AMD64_TAG}
script:
- git config --global user.name "GitLab CI Runner";
git config --global user.email trini@konsulko.com;
git config --global --add safe.directory "${CI_PROJECT_DIR}";
export USER=gitlab;
python3 -m venv /tmp/venv;
. /tmp/venv/bin/activate;
pip install -r test/py/requirements.txt -r tools/binman/requirements.txt
-r tools/buildman/requirements.txt -r tools/patman/requirements.txt
-r tools/u_boot_pylib/requirements.txt;
export UBOOT_TRAVIS_BUILD_DIR=/tmp/tools-only;
export PYTHONPATH="${UBOOT_TRAVIS_BUILD_DIR}/scripts/dtc/pylibfdt";
export PATH="${UBOOT_TRAVIS_BUILD_DIR}/scripts/dtc:${PATH}";
set +e;
./tools/buildman/buildman -T0 -o ${UBOOT_TRAVIS_BUILD_DIR} -w
--board tools-only;
set -e;
export TOOLPATH="--toolpath ${UBOOT_TRAVIS_BUILD_DIR}/tools --toolpath /opt/coreboot";
./tools/binman/binman ${TOOLPATH} tool -f missing;
./tools/binman/binman ${TOOLPATH} test;
./tools/binman/binman ${TOOLPATH} test -T;
./tools/buildman/buildman -t;
./tools/dtoc/dtoc -t;
./tools/patman/patman test;
make testconfig
# Check for any pylint regressions
Run pylint:
extends: .testsuites
script:
- git config --global --add safe.directory "${CI_PROJECT_DIR}"
- python3 -m venv /tmp/venv
- . /tmp/venv/bin/activate
- pip install -r test/py/requirements.txt -r tools/binman/requirements.txt
-r tools/buildman/requirements.txt -r tools/patman/requirements.txt
-r tools/u_boot_pylib/requirements.txt asteval pylint==3.3.4 pyopenssl
- export PATH=${PATH}:~/.local/bin
- echo "[MASTER]" >> .pylintrc
- echo "load-plugins=pylint.extensions.docparams" >> .pylintrc
- export UBOOT_TRAVIS_BUILD_DIR=/tmp/tools-only
- set +e
- ./tools/buildman/buildman -T0 -o ${UBOOT_TRAVIS_BUILD_DIR} -w
--board tools-only
- set -e
- pylint --version
- export PYTHONPATH="${UBOOT_TRAVIS_BUILD_DIR}/scripts/dtc/pylibfdt"
- make pylint_err
# Check we can package the Python tools
Check packing of Python tools:
extends: .testsuites
script:
- make pip
# Test sandbox with test.py
sandbox test.py:
parallel:
matrix:
- HOST: "arm64"
- HOST: "amd64"
tags:
- ${HOST}
variables:
TEST_PY_BD: "sandbox"
TEST_PY_EXTRA: "--timing"
# addr2line in Ubuntu 'Noble' and later are broken.
TEST_PY_TEST_SPEC: "not event_dump"
<<: *buildman_and_testpy_dfn
sandbox with clang test.py:
parallel:
matrix:
- HOST: "arm64"
- HOST: "amd64"
tags:
- ${HOST}
variables:
TEST_PY_BD: "sandbox"
OVERRIDE: "-O clang-20"
# addr2line in Ubuntu 'Noble' and later are broken.
TEST_PY_TEST_SPEC: "not event_dump"
<<: *buildman_and_testpy_dfn
sandbox64 test.py:
parallel:
matrix:
- HOST: "arm64"
- HOST: "amd64"
tags:
- ${HOST}
variables:
TEST_PY_BD: "sandbox64"
<<: *buildman_and_testpy_dfn
sandbox64 with clang test.py:
parallel:
matrix:
- HOST: "arm64"
- HOST: "amd64"
tags:
- ${HOST}
variables:
TEST_PY_BD: "sandbox64"
OVERRIDE: "-O clang-20"
<<: *buildman_and_testpy_dfn
sandbox64_lwip test.py:
variables:
TEST_PY_BD: "sandbox64_lwip"
<<: *buildman_and_testpy_dfn
sandbox_spl test.py:
variables:
TEST_PY_BD: "sandbox_spl"
TEST_PY_TEST_SPEC: "test_ofplatdata or test_handoff or test_spl"
<<: *buildman_and_testpy_dfn
sandbox_noinst_test.py:
variables:
TEST_PY_BD: "sandbox_noinst"
TEST_PY_TEST_SPEC: "test_ofplatdata or test_handoff or test_spl"
<<: *buildman_and_testpy_dfn
sandbox_noinst with LOAD_FIT_FULL test.py:
variables:
TEST_PY_BD: "sandbox_noinst"
TEST_PY_TEST_SPEC: "test_ofplatdata or test_handoff or test_spl"
OVERRIDE: "-a CONFIG_SPL_LOAD_FIT_FULL=y"
<<: *buildman_and_testpy_dfn
sandbox_vpl test.py:
variables:
TEST_PY_BD: "sandbox_vpl"
TEST_PY_TEST_SPEC: "vpl or test_spl"
<<: *buildman_and_testpy_dfn
# Enable tracing and disable LTO, to ensure functions are not elided
sandbox trace_test.py:
variables:
TEST_PY_BD: "sandbox"
BUILD_ENV: "FTRACE=1 NO_LTO=1"
TEST_PY_TEST_SPEC: "trace"
OVERRIDE: "-a CONFIG_TRACE=y -a CONFIG_TRACE_EARLY=y -a CONFIG_TRACE_EARLY_SIZE=0x01000000 -a CONFIG_TRACE_BUFFER_SIZE=0x02000000"
<<: *buildman_and_testpy_dfn
evb-ast2500 test.py:
variables:
TEST_PY_BD: "evb-ast2500"
TEST_PY_TEST_SPEC: "not sleep"
TEST_PY_ID: "--id qemu"
<<: *buildman_and_testpy_dfn
sandbox_flattree test.py:
variables:
TEST_PY_BD: "sandbox_flattree"
<<: *buildman_and_testpy_dfn
vexpress_ca9x4 test.py:
variables:
TEST_PY_BD: "vexpress_ca9x4"
TEST_PY_TEST_SPEC: "not sleep"
TEST_PY_ID: "--id qemu"
<<: *buildman_and_testpy_dfn
integratorcp_cm926ejs test.py:
variables:
TEST_PY_BD: "integratorcp_cm926ejs"
TEST_PY_TEST_SPEC: "not sleep"
TEST_PY_ID: "--id qemu"
<<: *buildman_and_testpy_dfn
qemu_arm test.py:
variables:
TEST_PY_BD: "qemu_arm"
TEST_PY_TEST_SPEC: "not sleep"
<<: *buildman_and_testpy_dfn
qemu_arm64 test.py:
variables:
TEST_PY_BD: "qemu_arm64"
TEST_PY_TEST_SPEC: "not sleep"
OVERRIDE: "-a CONFIG_SEMIHOSTING=y"
<<: *buildman_and_testpy_dfn
qemu_arm64_lwip test.py:
variables:
TEST_PY_BD: "qemu_arm64_lwip"
TEST_PY_TEST_SPEC: "test_net_dhcp or test_net_ping or test_net_tftpboot"
<<: *buildman_and_testpy_dfn
qemu_arm64_tfa_fw_handoff test.py:
variables:
TEST_PY_BD: "qemu_arm64"
TEST_PY_ID: "--id fw_handoff_tfa_optee"
TEST_PY_TEST_SPEC: "test_fw_handoff"
<<: *buildman_and_testpy_dfn
qemu_arm_sbsa test.py:
variables:
TEST_PY_BD: "qemu-arm-sbsa"
TEST_PY_TEST_SPEC: "not sleep"
<<: *buildman_and_testpy_dfn
qemu_m68k test.py:
variables:
TEST_PY_BD: "M5208EVBE"
TEST_PY_ID: "--id qemu"
TEST_PY_TEST_SPEC: "not sleep and not efi"
OVERRIDE: "-a CONFIG_M68K_QEMU=y -a ~CONFIG_MCFTMR"
<<: *buildman_and_testpy_dfn
qemu_m68k_virt test.py:
variables:
TEST_PY_BD: "qemu-m68k"
TEST_PY_TEST_SPEC: "not sleep"
<<: *buildman_and_testpy_dfn
qemu_malta test.py:
variables:
TEST_PY_BD: "malta"
TEST_PY_TEST_SPEC: "not sleep and not efi"
TEST_PY_ID: "--id qemu"
<<: *buildman_and_testpy_dfn
qemu_maltael test.py:
variables:
TEST_PY_BD: "maltael"
TEST_PY_TEST_SPEC: "not sleep and not efi"
TEST_PY_ID: "--id qemu"
<<: *buildman_and_testpy_dfn
qemu_malta64 test.py:
variables:
TEST_PY_BD: "malta64"
TEST_PY_TEST_SPEC: "not sleep and not efi"
TEST_PY_ID: "--id qemu"
<<: *buildman_and_testpy_dfn
qemu_malta64el test.py:
variables:
TEST_PY_BD: "malta64el"
TEST_PY_TEST_SPEC: "not sleep and not efi"
TEST_PY_ID: "--id qemu"
<<: *buildman_and_testpy_dfn
qemu-ppce500 test.py:
variables:
TEST_PY_BD: "qemu-ppce500"
TEST_PY_TEST_SPEC: "not sleep"
<<: *buildman_and_testpy_dfn
qemu-riscv32 test.py:
variables:
TEST_PY_BD: "qemu-riscv32"
TEST_PY_TEST_SPEC: "not sleep"
<<: *buildman_and_testpy_dfn
qemu-riscv64 test.py:
variables:
TEST_PY_BD: "qemu-riscv64"
TEST_PY_TEST_SPEC: "not sleep"
<<: *buildman_and_testpy_dfn
qemu-riscv32_spl test.py:
variables:
TEST_PY_BD: "qemu-riscv32_spl"
TEST_PY_TEST_SPEC: "not sleep"
<<: *buildman_and_testpy_dfn
qemu-riscv64_spl test.py:
variables:
TEST_PY_BD: "qemu-riscv64_spl"
TEST_PY_TEST_SPEC: "not sleep"
<<: *buildman_and_testpy_dfn
qemu-riscv64_smode test.py:
variables:
TEST_PY_BD: "qemu-riscv64_smode"
TEST_PY_TEST_SPEC: "not sleep"
<<: *buildman_and_testpy_dfn
qemu-riscv64_smode_acpi test.py:
variables:
TEST_PY_BD: "qemu-riscv64_smode_acpi"
TEST_PY_TEST_SPEC: "not sleep"
<<: *buildman_and_testpy_dfn
qemu-x86 test.py:
variables:
TEST_PY_BD: "qemu-x86"
TEST_PY_TEST_SPEC: "not sleep"
<<: *buildman_and_testpy_dfn
qemu-x86_64 test.py:
variables:
TEST_PY_BD: "qemu-x86_64"
TEST_PY_TEST_SPEC: "not sleep"
<<: *buildman_and_testpy_dfn
qemu-xtensa-dc233c test.py:
variables:
TEST_PY_BD: "qemu-xtensa-dc233c"
TEST_PY_TEST_SPEC: "not sleep and not efi"
tags:
- ${DEFAULT_AMD64_TAG}
<<: *buildman_and_testpy_dfn
r2dplus_i82557c test.py:
variables:
TEST_PY_BD: "r2dplus"
TEST_PY_TEST_SPEC: "not sleep"
TEST_PY_ID: "--id i82557c_qemu"
<<: *buildman_and_testpy_dfn
r2dplus_pcnet test.py:
variables:
TEST_PY_BD: "r2dplus"
TEST_PY_TEST_SPEC: "not sleep"
TEST_PY_ID: "--id pcnet_qemu"
<<: *buildman_and_testpy_dfn
r2dplus_rtl8139 test.py:
variables:
TEST_PY_BD: "r2dplus"
TEST_PY_TEST_SPEC: "not sleep"
TEST_PY_ID: "--id rtl8139_qemu"
<<: *buildman_and_testpy_dfn
r2dplus_tulip test.py:
variables:
TEST_PY_BD: "r2dplus"
TEST_PY_TEST_SPEC: "not sleep"
TEST_PY_ID: "--id tulip_qemu"
<<: *buildman_and_testpy_dfn
# This is broken upsteam: https://gitlab.com/qemu-project/qemu/-/issues/2945
#sifive_unleashed_sdcard test.py:
# variables:
# TEST_PY_BD: "sifive_unleashed"
# TEST_PY_TEST_SPEC: "not sleep"
# TEST_PY_ID: "--id sdcard_qemu"
# <<: *buildman_and_testpy_dfn
sifive_unleashed_spi-nor test.py:
variables:
TEST_PY_BD: "sifive_unleashed"
TEST_PY_TEST_SPEC: "not sleep"
TEST_PY_ID: "--id spi-nor_qemu"
<<: *buildman_and_testpy_dfn
xilinx_mbv32 test.py:
variables:
TEST_PY_BD: "xilinx_mbv32"
TEST_PY_TEST_SPEC: "not sleep"
TEST_PY_ID: "--id qemu"
<<: *buildman_and_testpy_dfn
xilinx_mbv32_smode test.py:
variables:
TEST_PY_BD: "xilinx_mbv32_smode"
TEST_PY_TEST_SPEC: "not sleep"
TEST_PY_ID: "--id qemu"
<<: *buildman_and_testpy_dfn
xilinx_mbv64 test.py:
variables:
TEST_PY_BD: "xilinx_mbv64"
TEST_PY_TEST_SPEC: "not sleep"
TEST_PY_ID: "--id qemu"
<<: *buildman_and_testpy_dfn
xilinx_mbv64_smode test.py:
variables:
TEST_PY_BD: "xilinx_mbv64_smode"
TEST_PY_TEST_SPEC: "not sleep"
TEST_PY_ID: "--id qemu"
<<: *buildman_and_testpy_dfn
xilinx_zynq_virt test.py:
variables:
TEST_PY_BD: "xilinx_zynq_virt"
TEST_PY_TEST_SPEC: "not sleep"
TEST_PY_ID: "--id qemu"
<<: *buildman_and_testpy_dfn
xilinx_versal_virt test.py:
variables:
TEST_PY_BD: "xilinx_versal_virt"
TEST_PY_TEST_SPEC: "not sleep"
TEST_PY_ID: "--id qemu"
OVERRIDE: "-a ~CONFIG_USB_DWC3"
<<: *buildman_and_testpy_dfn
xtfpga test.py:
variables:
TEST_PY_BD: "xtfpga"
TEST_PY_TEST_SPEC: "not sleep"
TEST_PY_ID: "--id qemu"
tags:
- ${DEFAULT_AMD64_TAG}
<<: *buildman_and_testpy_dfn
coreboot test.py:
variables:
TEST_PY_BD: "coreboot"
TEST_PY_TEST_SPEC: "not sleep"
TEST_PY_ID: "--id qemu"
<<: *buildman_and_testpy_dfn
# Add sage-lab stage
include: .gitlab-ci-sage-lab.yml
.sjg_lab_template: &sjg_lab_dfn
stage: sjg-lab
rules:
- if: $SJG_LAB == "1"
when: always
- if: $SJG_LAB != "1"
when: manual
allow_failure: true
dependencies: []
needs: [ "sandbox test.py" ]
tags: [ 'lab' ]
script:
# Environment:
# SRC - source tree
# OUT - output directory for builds
- export SRC="$(pwd)"
- export OUT="${SRC}/build/${BOARD}"
- export PATH=$PATH:~/bin
- export PATH=$PATH:/vid/software/devel/ubtest/u-boot-test-hooks/bin
# Load it on the device
- ret=0
- echo "role ${ROLE}"
- export strategy="-s uboot -e off"
- export USE_LABGRID_SJG=1
# export verbose="-v"
- ${SRC}/test/py/test.py -ra --role ${ROLE} ${TEST_PY_EXTRA:-"--capture=tee-sys"}
--build-dir "${OUT}"
${TEST_PY_TEST_SPEC:+"-k ${TEST_PY_TEST_SPEC}"}
--junitxml=${OUT}/results.xml || ret=$?
- U_BOOT_BOARD_IDENTITY="${ROLE}" u-boot-test-release || true
- if [[ $ret -ne 0 ]]; then
exit $ret;
fi
artifacts:
when: always
paths:
- "build/${BOARD}/test-log.html"
- "build/${BOARD}/multiplexed_log.css"
- "build/${BOARD}/results.xml"
reports:
junit: "build/${BOARD}/results.xml"
expire_in: 1 week
rpi3:
variables:
ROLE: rpi3
<<: *sjg_lab_dfn
opi_pc:
variables:
ROLE: opi_pc
<<: *sjg_lab_dfn
pcduino3_nano:
variables:
ROLE: pcduino3_nano
<<: *sjg_lab_dfn
samus:
variables:
ROLE: samus
<<: *sjg_lab_dfn
link:
variables:
ROLE: link
<<: *sjg_lab_dfn
jerry:
variables:
ROLE: jerry
<<: *sjg_lab_dfn
minnowmax:
variables:
ROLE: minnowmax
<<: *sjg_lab_dfn
opi_pc2:
variables:
ROLE: opi_pc2
<<: *sjg_lab_dfn
bpi:
variables:
ROLE: bpi
<<: *sjg_lab_dfn
rpi2:
variables:
ROLE: rpi2
<<: *sjg_lab_dfn
bob:
variables:
ROLE: bob
<<: *sjg_lab_dfn
ff3399:
variables:
ROLE: ff3399
<<: *sjg_lab_dfn
coral:
variables:
ROLE: coral
<<: *sjg_lab_dfn
rpi3z:
variables:
ROLE: rpi3z
<<: *sjg_lab_dfn
bbb:
variables:
ROLE: bbb
<<: *sjg_lab_dfn
kevin:
variables:
ROLE: kevin
<<: *sjg_lab_dfn
pine64:
variables:
ROLE: pine64
<<: *sjg_lab_dfn
c4:
variables:
ROLE: c4
<<: *sjg_lab_dfn
rpi4:
variables:
ROLE: rpi4
<<: *sjg_lab_dfn
rpi0:
variables:
ROLE: rpi0
<<: *sjg_lab_dfn
snow:
variables:
ROLE: snow
<<: *sjg_lab_dfn
pcduino3:
variables:
ROLE: pcduino3
<<: *sjg_lab_dfn
nyan-big:
variables:
ROLE: nyan-big
<<: *sjg_lab_dfn
rpi:
variables:
ROLE: rpi
<<: *sjg_lab_dfn
# StarFive VisionFive 2
vf2:
variables:
ROLE: vf2
<<: *sjg_lab_dfn
qemu-x86_64:
variables:
ROLE: qemu-x86_64
TEST_PY_TEST_SPEC: "not sleep"
<<: *sjg_lab_dfn

172
.mailmap
View File

@@ -1,172 +0,0 @@
#
# This list is used by git-shortlog to fix a few botched name translations
# in the git archive, either because the author's full name was messed up
# and/or not always written the same way, making contributions from the
# same person appearing not to be so or badly displayed.
#
# This file is also used by scripts/get_maintainer.pl.
#
# This file can be modified by hand or updated by the following command:
# scripts/mailmapper > tmp; mv tmp .mailmap
#
# Entries in this file take one of the following forms:
# Proper Name <commit@email.xx>
# <proper@email.xx> <commit@email.xx>
# Proper Name <proper@email.xx> <commit@email.xx>
# Proper Name <proper@email.xx> Commit Name <commit@email.xx>
AKASHI Takahiro <akashi.tkhro@gmail.com> <takahiro.akashi@linaro.org>
Alexander Graf <agraf@csgraf.de> <agraf@suse.de>
Allen Martin <amartin@nvidia.com>
Amanda Baze <amanda.baze@amd.com> <nicole.baze@xilinx.com>
Amit Kumar Mahapatra <amit.kumar-mahapatra@amd.com> <amit.kumar-mahapatra@xilinx.com>
Andreas Bießmann <andreas.devel@googlemail.com>
Andreas Bießmann <andreas@biessmann.org>
Aneesh V <aneesh@ti.com>
Anup Patel <anup@brainfault.org> <anup.patel@wdc.com>
Anurag Kumar Vulisha <AnuragKumar.Vulisha@amd.com> <anurag.kumar.vulisha@xilinx.com>
Appana Durga Kedareswara rao <appana.durga.kedareswara.rao@amd.com> <appana.durga.rao@xilinx.com>
Ashok Reddy Soma <ashok.reddy.soma@amd.com> <ashok.reddy.soma@xilinx.com>
Atish Patra <atishp@atishpatra.org> <atish.patra@wdc.com>
Bernhard Messerklinger <bernhard.messerklinger@at.abb.com> <bernhard.messerklinger@br-automation.com>
Bharat Kumar Gogada <bharat.kumar.gogada@amd.com> <bharat.kumar.gogada@xilinx.com>
Bharat Kumar Gogada <bharat.kumar.gogada@amd.com> <bharatku@xilinx.com>
Bhargava Sreekantappa Gayathri <bhargava.sreekantappa-gayathri@amd.com> <bhargava.sreekantappa-gayathri@xilinx.com>
Bhupesh Sharma <bhupesh.linux@gmail.com> <bhupesh.sharma@linaro.org>
Bin Meng <bmeng.cn@gmail.com> <bin.meng@windriver.com>
Boris Brezillon <bbrezillon@kernel.org> <boris.brezillon@bootlin.com>
Boris Brezillon <bbrezillon@kernel.org> <boris.brezillon@free-electrons.com>
Casey Connolly <casey.connolly@linaro.org> <caleb.connolly@linaro.org>
Chen-Yu Tsai <wens@kernel.org> <wens@csie.org>
Christian Kohn <chris.kohn@amd.com> <christian.kohn@xilinx.com>
Christopher Obbard <christopher.obbard@linaro.org> <chris.obbard@collabora.com>
Dirk Behme <dirk.behme@googlemail.com>
<duje@dujemihanovic.xyz> <duje.mihanovic@skole.hr>
Durga Challa <durga.challa@amd.com> <vnsl.durga.challa@xilinx.com>
Eugen Hristev <ehristev@kernel.org> <eugen.hristev@microchip.com>
Eugen Hristev <ehristev@kernel.org> <eugen.hristev@linaro.org>
Eugen Hristev <ehristev@kernel.org> <eugen.hristev@collabora.com>
Fabio Estevam <fabio.estevam@nxp.com>
Greg Malysa <malysagreg@gmail.com> <greg.malysa@timesys.com>
Harini Katakam <harini.katakam@amd.com> <harini.katakam@xilinx.com>
Harsha <harsha.harsha@amd.com> <harsha.harsha@xilinx.com>
Heiko Stuebner <heiko.stuebner@cherry.de> <heiko.stuebner@theobroma-systems.com>
Heiko Schocher <hs@nabladev.com> <hs@denx.de>
Heiko Schocher <hs@nabladev.com> <hs@pollux.denx.de>
Heiko Schocher <hs@nabladev.com> <heiko.schocher@invitel.hu>
Heiko Schocher <hs@nabladev.com> <[hs@denx.de]>
Heiko Schocher <hs@nabladev.com> <hs@pollux.(none)>
Heinrich Schuchardt <xypron.glpk@gmx.de> <heinrich.schuchardt@canonical.com>
Heinrich Schuchardt <xypron.glpk@gmx.de> xypron.glpk@gmx.de <xypron.glpk@gmx.de>
Ibai Erkiaga <ibai.erkiaga-elorza@amd.com> <ibai.erkiaga-elorza@xilinx.com>
Igor Opaniuk <igor.opaniuk@gmail.com> <igor.opaniuk@linaro.org>
Igor Opaniuk <igor.opaniuk@gmail.com> <igor.opaniuk@toradex.com>
Izhar Ameer Shaikh <izhar.ameer.shaikh@amd.com> <izhar.ameer.shaikh@xilinx.com>
Jagan Teki <402jagan@gmail.com>
Jagan Teki <jaganna@gmail.com>
Jagan Teki <jaganna@xilinx.com>
Jagan Teki <jagannadh.teki@gmail.com>
Jagan Teki <jagannadha.sutradharudu-teki@xilinx.com>
Jakob Unterwurzacher <jakob.unterwurzacher@cherry.de> <jakob.unterwurzacher@theobroma-systems.com>
Javier Tia <floss@jetm.me> <javier.tia@linaro.org>
Jay Buddhabhatti <jay.buddhabhatti@amd.com> <jay.buddhabhatti@xilinx.com>
Jernej Skrabec <jernej.skrabec@gmail.com> <jernej.skrabec@siol.net>
Jerome Forissier <jerome.forissier@arm.com> <jerome@forissier.org>
Jerome Forissier <jerome.forissier@arm.com> <jerome.forissier@linaro.org>
John Linn <john.linn@amd.com> <john.linn@xilinx.com>
Jyotheeswar Reddy Mutthareddyvari <jyotheeswar.reddy.mutthareddyvari@amd.com> <jyothee@xilinx.com>
Jyotheeswar Reddy Mutthareddyvari <jyotheeswar.reddy.mutthareddyvari@amd.com> <jyotheeswar.reddy.mutthareddyvari@xilinx.com>
Kalyani Akula <kalyani.akula@amd.com> <kalyani.akula@xilinx.com>
Klaus Goger <klaus.goger@cherry.de> <klaus.goger@theobroma-systems.com>
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@@ -1,25 +0,0 @@
# .readthedocs.yml
# Read the Docs configuration file
# See https://docs.readthedocs.io/en/stable/config-file/v2.html for details
# Required
version: 2
build:
os: "ubuntu-24.04"
apt_packages:
- python3-six
tools:
python: "3.12"
# Build documentation in the docs/ directory with Sphinx
sphinx:
configuration: doc/conf.py
# Optionally build your docs in additional formats such as PDF and ePub
formats: []
python:
install:
- requirements: doc/sphinx/requirements.txt
- requirements: test/py/requirements.txt

816
CHANGELOG Normal file
View File

@@ -0,0 +1,816 @@
======================================================================
Changes since U-Boot 0.4.0:
======================================================================
* Add support for EXBITGEN board
* Add support for SL8245 board
======================================================================
Changes for U-Boot 0.4.0:
======================================================================
* Patches by Robert Schwebel, 26 Jun 2003:
- logdl
- csb226
- innokom
* Patch by Pantelis Antoniou, 25 Jun 2003:
update NetVia with V2 board support
* Header file cleanup for ARM
* Patch by Murray Jensen, 24 Jun 2003:
- make sure to use only U-boot provided header files
- fix problems with ".rodata.str1.4" section as used by GCC-3.x
* Patch by Stefan Roese, 24 Jun 2003:
- Update esd ASH405 board files.
- Update esd DASA_SIM config file.
- Add ping command to some esd boards.
* Patch by Yuli Barcohen, 23 Jun 2003:
Update for MPC8260ADS board
* Patch by Murray Jensen, 23 Jun 2003:
- cleanup of GCC 3.x compiler warnings
* Patch by Rune Torgersen, 4 Jun 2003:
add large memory support for MPC8266ADS board
* Patch by Richard Woodruff, 19 June 03:
- Enabled standard u-boot device abstraction for ARM
- Enabled console device for ARM
- Initilized bi_baudrate for ARM
* Patch by Bill Hargen, 23 Apr 2003:
fix byte order for 824x I2C addresses (write op)
* Patch by Murray Jensen, 20 Jun 2003:
- hymod update
- cleanup (especially for gcc-3.x compilers)
* Patch by Tom Guilliams, 20 Jun 2003:
added CONFIG_750FX support for IBM 750FX processors
* Patch by Devin Crumb, 02 Apr 2003:
Fix clock divider rounding problem in drivers/serial.c
* Patch by Richard Woodruff, 19 June 03:
- Fixed smc91c111 driver to sync with the u-boot environment
(driver/smc91c111.c).
- Added eth_init error return check in NetLoop (net/net.c).
* Patch by Ken Chou, 19 June 2003:
Added support for A3000 SBC board (Artis Microsystems Inc.)
* Patches by Murray Jensen, 17 Jun 2003:
- Hymod board database mods: add "who" field and new xilinx chip types
- provide new "init_cmd_timeout()" function so code external to
"common/main.c" can use the "reset_cmd_timeout()" function before
entering the main loop
- add DTT support for adm1021 (new file dtt/adm1021.c; config
slightly different. see include/configs/hymod.h for an example
(requires CONFIG_DTT_ADM1021, CONFIG_DTT_SENSORS, and
CFG_DTT_ADM1021 defined)
- add new "eeprom_probe()" function which has similar args and
behaves in a similar way to "eeprom_read()" etc.
- add 8260 FCC ethernet loopback code (new "eth_loopback_test()"
function which is enabled by defining CONFIG_ETHER_LOOPBACK_TEST)
- gdbtools copyright update
- ensure that set_msr() executes the "sync" and "isync" instructions
after the "mtmsr" instruction in cpu/mpc8260/interrupts.c
- 8260 I/O ports fix: Open Drain should be set last when configuring
- add SIU IRQ defines for 8260
- allow LDSCRIPT override and OBJCFLAGS initialization: change to
config.mk to allow board configurations to override the GNU
linker script, selected via the LDSCRIPT, make variable, and to
give an initial value to the OBJCFLAGS make variable
- 8260 i2c enhancement:
o correctly extends the timeout depending on the size of all
queued messages for both transmit and receive
o will not continue with receive if transmit times out
o ensures that the error callback is done for all queued tx
and rx messages
o correctly detects both tx and rx timeouts, only delivers one to
the callback, and does not overwrite an earlier error
o logic in i2c_probe now correct
- add "vprintf()" function so that "panic()" function can be
technically correct
- many Hymod board changes
* Patches by Robert Schwebel, 14 Jun 2003:
- add support for Logotronic DL datalogger board
- cleanup serial line after kermit binary download
- add debugX macro (debug level support)
- update mach-types.h to latest arm.linux.org.uk master list.
* Patches by David Müller, 12 Jun 2003:
- rewrite of the S3C24X0 register definitions stuff
- "driver" for the built-in S3C24X0 RTC
* Patches by Yuli Barcohen, 12 Jun 2003:
- Add MII support and Ethernet PHY initialization for MPC8260ADS board
- Fix incorrect SIUMCR initialisation caused by wrong Hard Reset
configuration word supplied by FPGA on some MPC8260ADS boards
* Patch by Pantelis Antoniou, 10 Jun 2003:
Unify status LED interface
* Add support for DS12887 RTC; add RTC support for ATC board
* Patch by Nicolas Lacressonniere, 11 Jun 2003:
Modifications for Atmel AT91RM9200DK ARM920T based development kit
- Add Atmel DataFlash support for reading and writing.
- Add possibility to boot a Linux from DataFlash with BOOTM command.
- Add Flash detection on Atmel AT91RM9200DK
(between Atmel AT49BV1614 and AT49BV1614A flashes)
- Replace old Ethernet PHY layer functions
- Change link address
* Patch by Frank Smith, 9 Jun 2003:
use CRIT_EXCEPTION for machine check on 4xx
* Patch by Detlev Zundel, 13 Jun 2003:
added implementation of the "carinfo" command in cmd_immap.c
* Fix CONFIG_NET_MULTI support in include/net.h
* Patches by Kyle Harris, 13 Mar 2003:
- Add FAT partition support
- Add command support for FAT
- Add command support for MMC
----
- Add Intel PXA support for video
- Add Intel PXA support for MMC
----
- Enable MMC and FAT for lubbock board
- Other misc changes for lubbock board
* Patch by Robert Schwebel, April 02, 2003:
fix for SMSC91111 driver
* Patch by Vladimir Gurevich, 04 Jun 2003:
make ppc405 ethernet driver compatible with CONFIG_NET_MULTI option
* Patch by Stefan Roese, 05 Jun 2003:
- PPC4xx: Fix bug for initial stack in data cache as pointed out by
Thomas Schaefer (tschaefer@giga-stream.de). Now inital stack in
data cache can be used even if the chip select is in use.
- CFG_RX_ETH_BUFFER added to set the ethernet receive buffer count
(see README for further description).
- Changed config files of CONFIG_EEPRO100 boards to use the
CFG_RX_ETH_BUFFER define.
* Add support for RMU board
* Add support for TQM862L at 100/50 MHz
* Patch by Pantelis Antoniou, 02 Jun 2003:
major reconstruction of networking code;
add "ping" support (outgoing only!)
* Patch by Denis Peter, 04 June 2003:
add support for the MIP405T board
* Patches by Udi Finkelstein, 2 June 2003:
- Added support for custom keyboards, initialized by defining a
board-specific drv_keyboard_init as well as defining CONFIG_KEYBOARD .
- Added support for the RBC823 board.
- cpu/mpc8xx/lcd.c now automatically calculates the
Horizontal Pixel Count field.
* Fix alignment problem in BOOTP (dhcp_leasetime option)
[pointed out by Nicolas Lacressonnière, 2 Jun 2003]
* Patch by Mark Rakes, 14 May 2003:
add support for Intel e1000 gig cards.
* Patch by Nye Liu, 3 Jun 2003:
fix critical typo in MAMR definition (include/mpc8xx.h)
* Fix requirement to align U-Boot image on 16 kB boundaries on PPC.
* Patch by Klaus Heydeck, 2 Jun 2003
Minor changes for KUP4K configuration
* Patch by Marc Singer, 29 May 2003:
Fixed rarp boot method for IA32 and other little-endian CPUs.
* Patch by Marc Singer, 28 May 2003:
Added port I/O commands.
* Patch by Matthew McClintock, 28 May 2003
- cpu/mpc824x/start.S: fix relocation code when booting from RAM
- minor patches for utx8245
* Patch by Daniel Engström, 28 May 2003:
x86 update
* Patch by Dave Ellis, 9 May 2003 + 27 May 2003:
add nand flash support to SXNI855T configuration
fix/extend nand flash support:
- fix 'nand erase' command so does not erase bad blocks
- fix 'nand write' command so does not write to bad blocks
- fix nand_probe() so handles no flash detected properly
- add doc/README.nand
- add .jffs2 and .oob options to nand read/write
- add 'nand bad' command to list bad blocks
- add 'clean' option to 'nand erase' to write JFFS2 clean markers
- make NAND read/write faster
* Patch by Rune Torgersen, 23 May 2003:
Update for MPC8266ADS board
* Get (mostly) rid of CFG_MONITOR_LEN definition; compute real length
instead CFG_MONITOR_LEN is now only used to determine _at_compile_
_time_ (!) if the environment is embedded within the U-Boot image,
or in a separate flash sector.
* Cleanup CFG_DER #defines in config files (wd maintained only)
* Fix data abort exception handling for arm920t CPU
* Fix alignment problems with flash driver for TRAB board
* Patch by Donald White, 21 May 2003:
fix calculation of base address in pci_hose_config_device()
* Fix bug in command line parsing: "cmd1;cmd2" is supposed to always
execute "cmd2", even if "cmd1" fails. Note that this is different
to "run var1 var2" where the contents of "var2" will NOT be
executed when a command in "var1" fails.
* Add zero-copy ramdisk support (requires corresponding kernel support!)
* Patch by Kyle Harris, 20 May 2003:
In preparation for an ixp port, rename cpu/xscale and arch-xscale
into cpu/pxa and arch-pxa.
* Patch by Stefan Roese, 23 May 2003:
- IBM PPC405EP port added.
- CONFIG_UART1_CONSOLE added. If defined internal UART1 (and not
UART0) is used as default U-Boot console. PPC4xx only!
- esd ASH405 board added (PPC405EP based).
- BUBINGA405EP board added (PPC405EP based - IBM Eval Board).
- esd CPCI405AB board added.
- esd PMC405 board added.
- Update of some esd boards.
* Patch by Denis Peter, 19 Mai 2003:
add support for the MIP405-3 board
* Patch by Dave Ellis, 22 May 2003:
Fix problem with only partially cleared .bss segment
* Patch by Rune Torgersen, 12 May 2003:
get PCI to work on a MPC8266ADS board; incorporate change to
cpu/mpc8260/pci.c to enable overrides of PCI memory parameters
* Patch by Nye Liu, 1 May 2003:
minor patches for the FADS8xx
* Patch by Thomas Schäfer, 28 Apr 2003:
Fix SPD handling for 256 ECC DIMM on Walnut
* Add support for arbitrary bitmaps for TRAB's VFD command;
allow to pass boot bitmap addresses in environment variables;
allow for zero boot delay
* Patch by Christian Geißinger, 19 May 2002:
On TRAB: wait until the dummy byte has been completely sent
* Patch by David Updegraff, 22 Apr 2003:
update for CrayL1 board
* Patch by Pantelis Antoniou, 21 Apr 2003:
add boot support for ARTOS (a proprietary OS)
* Patch by Steven Scholz, 11 Apr 2003:
Add support for RTC DS1338
* Patch by Rod Boyce, 24 Jan 2003:
Fix counting of extended partitions in diskboot command
* Patch by Christophe Lindheimer, 20 May 2003:
allow the use of CFG_LOADS when CFG_NO_FLASH is set
* Fix SDRAM timing on Purple board
* Add support for CompactFlash on ATC board
(includes support for Intel 82365 and compatible PC Card controllers,
and Yenta-compatible PCI-to-CardBus controllers)
* Patch by Mathijs Haarman, 08 May 2003:
Add lan91c96 driver (tested on Lubbock and custom PXA250 board only)
* Fix problem with usage of "true" (undefined in current versions of bfd.h)
* Add support for Promess ATC board
* Patch by Keith Outwater, 28 Apr 2003:
- Miscellaneous corrections and additions to GEN860T board specific code.
- Added GEN860_SC variant to GEN860T.
- Miscellaneous corrections to GEN860T documentation.
- Correct duplicate entry in U-Boot CREDITS file.
- Add GEN860T_SC entry in MAINTAINERS file.
- Update CREDITS file with GEN860T_SC info.
* Update Smiths Aerospace addresses in MAINTAINERS file
* Fix error handling in hush's version of "run" command
* LWMON extensions:
- Splashscreen support
- modem support
- sysmon support
- temperature dependend enabling of LCD
* Allow booting from old "PPCBoot" disk partitions
* Add support for TQM8255 Board / MPC8255 CPU
======================================================================
Changes for U-Boot 0.3.1:
======================================================================
* Make sure Block Lock Bits get cleared in R360MPI flash driver
* MPC823 LCD driver: Fill color map backwards, to allow for steady
display when Linux takes over
* Patch by Erwin Rol, 27 Feb 2003:
Add support for RTEMS (this time for real).
* Add support for "bmp info" and "bmp display" commands to load
bitmap images; this can be used (for example in a "preboot"
command) to display a splash screen very quickly after poweron.
* Add support for 133 MHz clock on INCA-IP board
* Patch by Lutz Dennig, 10 Apr 2003:
Update for R360MPI board
* Add new meaning to "autostart" environment variable:
If set to "no", a standalone image passed to the
"bootm" command will be copied to the load address
(and eventually uncompressed), but NOT be started.
This can be used to load and uncompress arbitrary
data.
* Patch by Stefan Roese, 10 Apr 2003:
Changed DHCP client to use IP address from server option field #54
from the OFFER packet in the server option field #54 in the REQUEST
packet. This fixes a problem using a Windows 2000 DHCP server,
where the DHCP-server is not the TFTP-server.
* Set max brightness for MN11236 displays on TRAB board
* Add support for TQM862L modules
======================================================================
Changes for U-Boot 0.3.0:
======================================================================
* Patch by Arun Dharankar, 4 Apr 2003:
Add IDMA example code (tested on 8260 only)
* Add support for Purple Board (MIPS64 5Kc)
* Add support for MIPS64 5Kc CPUs
* Fix missing setting of "loadaddr" and "bootfile" on ARM and MIPS
* Patch by Denis Peter, 04 Apr 2003:
- update MIP405-4 board
* Patch by Stefan Roese, 4 Apr 2003:
- U-Boot version environment variable "ver" added
(CONFIG_VERSION_VARIABLE).
- Changed PPC405GPr version from A to B.
- Changed CPCI405 to use CTS instead of DSR on PPC405 UART1.
* Patches by Denis Peter, 03 April 2003:
- fix PCI IRQs on MPL boards
- fix two more un-relocated pointer problems
* Fix behaviour of "run" command:
- print error message iv variable does not exist
- terminate processing of arguments in case of error
* Patches by Peter Figuli, 10 Mar 2003
- Add support for BTUART on PXA platform
- Add support for WEP EP250 (PXA) board
* Fix flash problems on INCA-IP; add tool to allow bruning images to
flash using a BDI2000
* Implement fix for I2C Edge Conditions problem for all boards that
use the bit-banging driver (common/soft_i2c.c)
* Patch by Martin Winistoerfer, 23 Mar 2003
- Add port to MPC555/556 microcontrollers
- Add support for cmi customer board with
Intel 28F128J3A, 28F320J3A or 28F640J3A flash.
* Patch by Rick Bronson, 28 Mar 2003:
- fix common/cmd_nand.c
* Patch by Arun Dharankar, 24 Mar 2003:
- add threads / scheduler example code
* Add patches by Robert Schwebel, 31 Mar 2003:
- add ctrl-c support for kermit download
- align bdinfo output on ARM
- csb226 board: bring in sync with innokom/memsetup.S
- csb226 board: fix MDREFR handling
- misc doc fixes / extensions
- innokom board: cleanup, MDREFR fix in memsetup.S, config update
- add BOOT_PROGRESS to armlinux.c
* Add CPU ID, version, and clock speed for INCA-IP
* Patches by Dave Ellis, 18 Mar 2003 for SXNI855T board:
- fix SRAM and SDRAM memory sizing
- add status LED support
- add MAC address for second (SCC1) ethernet port
* Update default environment for TQM8260 board
* Patch by Rick Bronson, 16 Mar 2003:
- Add NAND flash support for reading, writing, and erasing NAND
flash (certain forms of which are called SmartMedia).
- Add support for Atmel AT91RM9200DK ARM920T based development kit.
* Patches by Robert Schwebel, 19 Mar 2003:
- use arm-linux-gcc as default compiler for ARM
- fix i2c fixup code
- fix missing baudrate setting
- added $loadaddr / CFG_LOAD_ADDR support to loadb
- moved "ignoring trailing characters" _before_ u-boot wants to
print out diagnostics messages; removes bogus characters at the
end of transmission
* Patch by John Zhan, 18 Mar 2003:
Add support for SinoVee Microsystems SC8xx boards
* Patch by Rolf Offermanns, 21 Mar 2003:
ported the dnp1110 related changes from the current armboot cvs to
current u-boot cvs. smc91111 does not work. problem marked in
smc91111.c, grep for "FIXME".
* Patch by Brian Auld, 25 Mar 2003:
Add support for STM flash chips on ebony board
* Add PCI support for MPC8250 Boards (PM825 module)
* Patch by Stefan Roese, 25 Mar 2003:
- PCI405 update.
* Patch by Stefan Roese, 20 Mar 2003:
- CPCI4052 update (support for revision 3).
- Set edge conditioning circuitry on PPC405GPr for compatibility
to existing PPC405GP designs.
- Clip udiv to 5 bits on PPC405 (serial.c).
* Extend INCAIP board support:
- add automatic RAM size detection
- add "bdinfo" command
- pass flash address and size to Linux kernel
- switch to 150 MHz clock
* Avoid flicker on the TRAB's VFD by synchronizing the enable with
the HSYNC/VSYNC. Requires new CPLD code (Version 101 for Rev. 100
boards, version 153 for Rev. 200 boards).
* Patch by Vladimir Gurevich, 12 Mar 2003:
Fix relocation problem of statically initialized string pointers
in common/cmd_pci.c
* Patch by Kai-Uwe Blöm, 12 Mar 2003:
Cleanup & bug fixes for JFFS2 code:
- the memory mangement was broken. It caused havoc on malloc by
writing beyond the block boundaries.
- the length calculation for files was wrong, sometimes resulting
in short file reads.
- data copying now optionally takes fragment version numbers into
account, to avoid copying from older data.
See doc/README.JFFS2 for details.
* Patch by Josef Wagner, 12 Mar 2003:
- 16/32 MB and 50/80 MHz support with auto-detection for IP860
- ETH05 and BEDBUG support for CU824
- added support for MicroSys CPC45
- new BOOTROM/FLASH0 and DOC base for PM826
* Patch by Robert Schwebel, 12 Mar 2003:
Fix the chpart command on innokom board
* Name cleanup:
mv include/asm-i386/ppcboot-i386.h include/asm-i386/u-boot-i386.h
s/PPCBoot/U-Boot/ in some files
s/pImage/uImage/ in some files
* Patch by Detlev Zundel, 15 Jan 2003:
Fix '' command line quoting
* Patch by The LEOX team, 19 Jan 2003:
- add support for the ELPT860 board
- add support for Dallas ds164x RTC
* Patches by David Müller, 31 Jan 2003:
- minimal setup for CardBus bridges
- add EEPROM read/write support in the CS8900 driver
- add support for the builtin I2C controller in the Samsung s3c24x0 chips
- add support for MPL's VCMA9 (Samsung s3c2410 based) board
* Patch by Steven Scholz, 04 Feb 2003:
add support for RTC DS1307
* Patch by Reinhard Meyer, 5 Feb 2003:
fix PLPRCR/SCCR init sequence on 8xx to allow for
changes of EBDF by software
* Patch by Vladimir Gurevich, 07 Feb 2003:
"API-compatibility patch" for 4xx I2C driver
* TRAB fixes / extensions:
- Restore VFD brightness as saved in environment
- add support for Fujitsu flashes
- make sure both buzzers are turned off (drive low level)
* Patches by Robert Schwebel, 06 Mar 2003:
- fix bug in BOOTP code (must use NetCopyIP)
- update of CSB226 port
- clear BSS segment on XScale
- added support for i2c_init_board() function
- update to the Innokom plattform
* Extend support for redundand environments for configurations where
environment size < sector size
* Patch by Rune Torgersen, 13 Feb 2003:
Add support for Motorola MPC8266ADS board
* Patch by Kyle Harris, 19 Feb 2003:
patches for the Intel lubbock board:
memsetup.S - general cleanup (based on Robert's csb226 code)
flash.c - overhaul, actually works now
lubbock.c - fix init funcs to return proper value
* Patch by Kenneth Johansson, 26 Feb 2003:
- Fixed off by one in RFTA calculation.
- No need to abort when LDF is lower than we can program it's only
minimum timing so clamp it to what we can do.
- Takes function pointer to function for reading the spd_nvram. Usefull
for faking data or hardcode a module without the nvram.
- fix other user for above change
- fix some comments.
* Patches by Brian Waite, 26 Feb 2003:
- fix port for evb64260 board
- fix PCI for evb64260 board
- fix PCI scan
* Patch by Reinhard Meyer, 1 Mar 2003:
Add support for EMK TOP860 Module
* Patch by Yuli Barcohen, 02 Mar 2003:
Add SPD EEPROM support for MPC8260ADS board
* Patch by Robert Schwebel, 21 Jan 2003:
- Add support for Innokom board
- Don't complain if "install" fails
- README cleanup (remove duplicated lines)
- Update PXA header files
* Add documentation for existing POST code (doc/README.POST)
* Patch by Laudney Ren, 15 Jan 2003:
Fix handling of redundand environment in "tools/envcrc.c"
* Patch by Detlev Zundel, 28 Feb 2003:
Add bedbug support for 824x systems
* Add support for 16 MB flash configuration of TRAB board
* Patch by Erwin Rol, 27 Feb 2003:
Add support for RTEMS
* Add image information to README
* Patch by Stefan Roese, 18 Feb 2003:
CPCIISER4 configuration updated.
* Patch by Stefan Roese, 17 Feb 2003:
Fixed bug in ext. serial clock setup on PPC405 (since PPC440 port).
* Patch by Stefan Roese, 13 Feb 2003:
Add "pcidelay" environment variable (in ms, enabled via
CONFIG_PCI_BOOTDELAY).
PCI spec 2.2 defines, that a pci target has 2^25 pci clocks after
RST# to respond to configuration cycles (33MHz -> 1s).
* Fix dual PCMCIA slot support (when running with just one
slot populated)
* Add VFD type detection to trab board
* extend drivers/cs8900.c driver to synchronize ethaddr environment
variable with value in the EEPROM
* Patch by Stefan Roese, 10 Feb 2003:
Add support for 4MB and 128MB onboard SDRAM (cpu/ppc4xx/sdram.c)
* Add support for MIPS32 4Kc CPUs
* Add support for INCA-IP Board
======================================================================
Changes for U-Boot 0.2.2:
======================================================================
* Add dual ethernet support on PM826
* Add support for LXT971 PHY on PM826
* Patch by Tord Andersson, 16 Jan 2003:
Fix flash sector count for TQM8xxL
* Fix I2C EEPROM problem on ICU862 board (would only write the first
16 bytes out of each 32 byte block)
======================================================================
Changes for U-Boot 0.2.1:
======================================================================
* Add support for V37 board
(patch by Jón Benediktsson, 11 Dec 2002)
* Update baudrate in bd_info when it gets changed
* Add watchdog trigger points while waiting for serial port
(so far only 8xx -- needed on LWMON with 100ms watchdog)
* Improve command line tool to access the U-Boot's environment
(figuration of the utility, using a config file)
* Add single quote support for (old) command line parser
* Switch LWMON board default config from FRAM to EEPROM;
in POST, EEPROM shows up on 8 addresses
======================================================================
Changes for U-Boot 0.2.0:
======================================================================
* Use 1-byte-read instead of -write for iprobe() function
Add i2c commands to PM826 config
* extend I2C POST code: check for list on known addresses
* Improve log buffer code; use "loglevel" to decide which messages
to log on the console, too (like in Linux); get rid of "logstart"
* Add command line tool to access the U-Boot's environment
(board-specific for TRAB now, to be fixed later)
* Patch by Hans-Joerg Frieden, 06 Dec 2002
Fix misc problems with AmigaOne support
* Patch by Chris Hallinan, 3 Dec 2002:
minor cleanup to the MPC8245 EPIC driver
* Patch by Pierre Aubert , 28 Nov 2002
Add support for external (SIU) interrupts on MPC8xx
* Patch by Pierre Aubert , 28 Nov 2002
Fix nested syscalls bug in standalone applications
* Patch by David Müller, 27 Nov 2002:
fix output of "pciinfo" command for CardBus bridge devices.
* Fix bug in TQM8260 board detection - boards got stuck when board ID
was not readable
* Add LED indication for IDE activity on KUP4K board
* Fix startup problems with VFD display on TRAB
* Patch by Pierre Aubert, 20 Nov 2002
Add driver for Epson SED13806 graphic controller.
Add support for BMP logos in cfb_console driver.
* Added support for both PCMCIA slots (at the same time!) on MPC8xx
* Patch by Rod Boyce, 21 Nov 2002:
fix PCMCIA on MBX8xx board
* Patch by Pierre Aubert , 21 Nov 2002
Add CFG_CPM_POST_WORD_ADDR to make the offset of the
bootmode word in DPRAM configurable
* Patch by Daniel Engström, 18 Nov 2002:
Fixes for x86 port (mostly strings issues)
* Patch by Ken Chou, 18 Nov 2002:
Fix for natsemi NIC cards (DP83815)
* Patch by Pierre Aubert, 19 Nov 2002:
fix a bug for the MII configuration, and some warnings
* Patch by Thomas Frieden, 13 Nov 2002:
Add code for AmigaOne board
(preliminary merge to U-Boot, still WIP)
* Patch by Jon Diekema, 12 Nov 2002:
- Adding URL for IEEE OUI lookup
- Making the autoboot #defines dependent on CONFIG_AUTOBOOT_KEYED
being defined.
- In the CONFIG_EXTRA_ENV_SETTINGS #define, the root-on-initrd and
root-on-nfs macros are designed to switch how the default boot
method gets defined.
* Patch by Daniel Engström, 13 Nov 2002:
Add support for i386 architecture and AMD SC520 board
* Patch by Pierre Aubert, 12 Nov 2002:
Add support for DOS filesystem and booting from DOS floppy disk
* Patch by Jim Sandoz, 07 Nov 2002:
Increase number of network RX buffers (PKTBUFSRX in
"include/net.h") for EEPRO100 based boards (especially SP8240)
which showed "Receiver is not ready" errors when U-Boot was
processing the receive buffers slower than the network controller
was filling them.
* Patch by Andreas Oberritter, 09 Nov 2002:
Change behaviour of NetLoop(): return -1 for errors, filesize
otherwise; return code 0 is valid an means no file loaded - in this
case the environment still gets updated!
* Patches by Jon Diekema, 9 Nov 2002:
- improve ADC/DAC clocking on the SACSng board to align
the failing edges of LRCLK and SCLK
- sbc8260 configuration tweaks
- add status LED support for 82xx systems
- wire sspi/sspo commands into command handler; improved error
handlering
- add timestamp support and alternate memory test to the
SACSng configuration
* Patch by Vince Husovsky, 7 Nov 2002:
Add "-n" to linker options to get rid of "Not enough room for
program headers" problem
* Patch by David Müller, 05 Nov 2002
Rename CONFIG_PLL_INPUT_FREQ to CONFIG_SYS_CLK_FREQ
so we can use an already existing name
* Patch by Pierre Aubert, 05 Nov 2002
Hardware relatied improvments in FDC boot code
* Patch by Holger Schurig, 5 Nov 2002:
Make the PXA really change it's frequency
* Patch by Pierre Aubert, 05 Nov 2002
Add support for slave serial Spartan 2 FPGAs
* Fix uninitialized memory (MAC address) in 8xx SCC/FEC ethernet
drivers
* Add support for log buffer which can be passed to Linux kernel's
syslog mechanism; used especially for POST results.
* Patch by Klaus Heydeck, 31 Oct 2002:
Add initial support for kup4k board
* Patch by Robert Schwebel, 04 Nov 2002:
- use watchdog to reset PXA250 systems
- added progress callbacks to (some of the) ARM code
- update for Cogent CSB226 board
* Add support for FPS860 board
* Patch by Guillaume Alexandre,, 04 Nov 2002:
Improve PCI access on 32-bits Compact PCI bus
* Fix mdelay() on TRAB - this was still the debugging version with
seconds instead of ms.
* Patch by Robert Schwebel, 1 Nov 2002:
XScale related cleanup (affects all ARM boards)
* Cleanup of names and README.
======================================================================
Notes for U-Boot 0.1.0:
======================================================================
This is the initial version of "Das U-Boot", the Universal Boot Loader.
It is based on version 2.0.0 (the "Halloween Release") of PPCBoot.
For information about the history of the project please see the
PPCBoot project page at http://sourceforge.net/projects/ppcboot
======================================================================

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Licenses/gpl-2.0.txt

280
COPYING Normal file
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@@ -0,0 +1,280 @@
GNU GENERAL PUBLIC LICENSE
Version 2, June 1991
Copyright (C) 1989, 1991 Free Software Foundation, Inc.
59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
Everyone is permitted to copy and distribute verbatim copies
of this license document, but changing it is not allowed.
Preamble
The licenses for most software are designed to take away your
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Foundation's software and to any other program whose authors commit to
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TERMS AND CONDITIONS FOR COPYING, DISTRIBUTION AND MODIFICATION
0. This License applies to any program or other work which contains
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END OF TERMS AND CONDITIONS

304
CREDITS Normal file
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@@ -0,0 +1,304 @@
#
# Parts of the development effort for this project have been
# sponsored by SIEMENS AG, Austria. Thanks to SIEMENS for
# supporting an Open Source project!
#
#
# This is at least a partial credits-file of individual people that
# have contributed to the U-Boot project. It is sorted by name and
# formatted to allow easy grepping and beautification by scripts.
# The fields are: name (N), email (E), web-address (W), PGP key ID
# and fingerprint (P), description (D), and snail-mail address (S).
# Thanks,
#
# Wolfgang Denk
#----------
N: Dr. Bruno Achauer
E: bruno@exet-ag.de
D: Support for NetBSD (both as host and target system)
N: Swen Anderson
E: sand@peppercon.de
D: ERIC Support
N: Guillaume Alexandre
E: guillaume.alexandre@gespac.ch
D: Add PCIPPC6 configuration
N: Pantelis Antoniou
E: panto@intracom.gr
D: NETVIA board support, ARTOS support.
N: Pierre Aubert
E: <p.aubert@staubli.com>
D: Support for RPXClassic board
N: Jerry van Baren
E: <vanbaren@cideas.com>
D: BedBug port to 603e core (MPC82xx). Code for enhanced memory test.
N: Andre Beaudin
E: <andre.beaudin@colubris.com>
D: PCMCIA, Ethernet, TFTP
N: Jon Benediktsson
E: jonb@marel.is
D: Support for Marel V37 board
N: Raphael Bossek
E: raphael.bossek@solutions4linux.de
D: 8xxrom-0.3.0
N: Rick Bronson
E: rick@efn.org
D: Atmel AT91RM9200DK and NAND support
N: David Brown
E: DBrown03@harris.com
D: Extensions to 8xxrom-0.3.0
N: Oliver Brown
E: obrown@adventnetworks.com
D: Port to the gw8260 board
N: Jonathan De Bruyne
E: jonathan.debruyne@siemens.atea.be
D: Port to Siemens IAD210 board
N: Ken Chou
E: kchou@ieee.org
D: Support for A3000 SBC board
N: Conn Clark
E: clark@esteem.com
D: ESTEEM192E support
N: Magnus Damm
E: eramdam@kieray1.p.y.ki.era.ericsson.se
D: 8xxrom
N: Arun Dharankar
E: ADharankar@ATTBI.Com
D: threads / scheduler example code
N: Kári Davíðsson
E: kd@flaga.is
D: FLAGA DM Support
N: Wolfgang Denk
E: wd@denx.de
D: U-Boot initial version, continuing maintenance, ARMBoot merge
W: http://www.denx.de
N: Dan A. Dickey
E: ddickey@charter.net
D: FADS Support
N: James F. Dougherty
E: jfd@GigabitNetworks.COM
D: Port to the MOUSSE board
N: Dave Ellis
E: DGE@sixnetio.com
D: EEPROM Speedup, SXNI855T port
N: Daniel Engström
E: daniel@omicron.se
D: x86 port, Support for sc520_cdp board
N: Dr. Wolfgang Grandegger
E: wg@denx.de
D: Support for Interphase 4539 T1/E1/J1 PMC, PN62, CCM, SCM boards
W: www.denx.de
N: Peter Figuli
E: peposh@etc.sk
D: Support for WEP EP250 (PXA) board
N: Thomas Frieden
E: ThomasF@hyperion-entertainment.com
D: Support for AmigaOne
N: Frank Gottschling
E: fgottschling@eltec.de
D: Support for ELTEC MHPC/BAB7xx/ELPPC boards, cfb-console, i8042, SMI LynxEM
W: www.eltec.de
N: Marius Groeger
E: mgroeger@sysgo.de
D: MBX Support, board specific function interface, EST SBC8260 support; initial support for StrongARM (LART), ARM720TDMI (implementa A7)
W: www.elinos.com
N: Kirk Haderlie
E: khaderlie@vividimage.com
D: Added TFTP to 8xxrom (-> 0.3.1)
N: Chris Hallinan
E: clh@net1plus.com
D: DHCP Support
N: Anne-Sophie Harnois
E: Anne-Sophie.Harnois@nextream.fr
D: Port to Walnut405 board
N: Andreas Heppel
E: aheppel@sysgo.de
D: CPU Support for MPC 75x; board support for Eltec BAB750 [obsolete!]
N: August Hoeraendl
E: august.hoerandl@gmx.at
D: Support for the logodl board (PXA2xx)
N: Josh Huber
E: huber@alum.wpi.edu
D: Port to the Galileo Evaluation Board, and the MPC74xx cpu series.
W: http://www.mclx.com/
H: Stuart Hughes
E: stuarth@lineo.com
D: Port to MPC8260ADS board
H: Rich Ireland
E: r.ireland@computer.org
D: FPGA device configuration driver
N: Gary Jennejohn
E: garyj@jennejohn.org, gj@denx.de
D: Support for Samsung ARM920T S3C2400X, ARM920T "TRAB"
W: www.denx.de
N: Murray Jensen
E: Murray.Jensen@cmst.csiro.au
D: Initial 8260 support; GDB support
D: Port to Cogent+Hymod boards; Hymod Board Database
W: http://www.msa.cmst.csiro.au/ourstaff/MurrayJensen/mjj.html
N: Yoo. Jonghoon
E: yooth@ipone.co.kr
D: Added port to the RPXlite board
N: Brad Kemp
E: Brad.Kemp@seranoa.com
D: Port to Windriver ppmc8260 board
N: Thomas Koeller
E: tkoeller@gmx.net
D: Port to Motorola Sandpoint 3 (MPC8240)
N: Thomas Lange
E: thomas@corelatus.com
D: Support for GTH board; lots of PCMCIA fixes
N: The LEOX team
E: team@leox.org
D: Support for LEOX boards, DS164x RTC
W: http://www.leox.org
N: Raymond Lo
E: lo@routefree.com
D: Support for DOS partitions
N: Dan Malek
E: dan@netx4.com
D: FADSROM, the grandfather of all of this
N: Reinhard Meyer
E: r.meyer@emk-elektronik.de
D: Port to EMK TOP860 Module
N: Jay Monkman
E: jtm@smoothsmoothie.com
D: EST SBC8260 support
N: Frank Morauf
E: frank.morauf@salzbrenner.com
D: Support for Embedded Planet RPX Super Board
N: David Müller
E: d.mueller@elsoft.ch
D: Support for Samsung ARM920T SMDK2410 eval board
N: Rolf Offermanns
E: rof@sysgo.de
D: Initial support for SSV-DNP1110, SMC91111 driver
W: www.elinos.com
N: Keith Outwater
E: keith_outwater@mvis.com
D: Support for generic/custom MPC860T boards (GEN860T, GEN860T_SC)
N: Frank Panno
E: fpanno@delphintech.com
D: Support for Embedded Planet EP8260 Board
N: Denis Peter
E: d.peter@mpl.ch
D: Support for 4xx SCSI, floppy, CDROM, CT69000 video, ...
D: Support for PIP405 board
D: Support for MIP405 board
N: Bill Pitts
E: wlp@mindspring.com
D: BedBug embedded debugger code
N: Stefan Roese
E: stefan.roese@esd-electronics.com
D: IBM PPC401/403/405GP Support; Windows environment support
N: Erwin Rol
E: erwin@muffin.org
D: boot support for RTEMS
N: Neil Russell
E: caret@c-side.com
D: Author of LiMon-1.4.2, which contributed some ideas
N: Paolo Scaffardi
E: arsenio@tin.it
D: FADS823 configuration, MPC823 video support, I2C, wireless keyboard, lots more
N: Robert Schwebel
E: r.schwebel@pengutronix.de
D: Support for csb226, logodl and innokom boards (PXA2xx)
N: Rob Taylor
E: robt@flyingpig.com
D: Port to MBX860T and Sandpoint8240
N: Erik Theisen
E: etheisen@mindspring.com
D: MBX8xx and many other patches
N: Jim Thompson
E: jim@musenki.com
D: Support for MUSENKI board
N: Rune Torgersen
E: <runet@innovsys.com>
D: Support for Motorola MPC8266ADS board
N: David Updegraff
E: dave@cray.com
D: Port to Cray L1 board; DHCP vendor extensions
N: Martin Winistoerfer
E: martinwinistoerfer@gmx.ch
D: Port to MPC555/556 microcontrollers and support for cmi board
N: Christian Vejlbo
E: christian.vejlbo@tellabs.com
D: FADS860T ethernet support
N: John Zhan
E: zhanz@sinovee.com
D: Support for SinoVee Microsystems SC8xx SBC
N: Alex Zuepke
E: azu@sysgo.de
D: Overall improvements on StrongARM, ARM720TDMI; Support for Tuxscreen; initial PCMCIA support for ARM
W: www.elinos.com
N: Pantelis Antoniou
E: panto@intracom.gr
D: NETVIA board support, ARTOS support.

33
Kbuild
View File

@@ -1,33 +0,0 @@
# SPDX-License-Identifier: GPL-2.0
#
# Kbuild for top-level directory of U-Boot
#####
# Generate generic-asm-offsets.h
generic-offsets-file := include/generated/generic-asm-offsets.h
always-y := $(generic-offsets-file)
targets := lib/asm-offsets.s
CFLAGS_REMOVE_lib/asm-offsets.o := $(LTO_CFLAGS)
CFLAGS_REMOVE_arch/$(ARCH)/lib/asm-offsets.o := $(LTO_CFLAGS)
$(obj)/$(generic-offsets-file): $(obj)/lib/asm-offsets.s FORCE
$(call filechk,offsets,__GENERIC_ASM_OFFSETS_H__)
#####
# Generate asm-offsets.h
ifneq ($(wildcard $(srctree)/arch/$(ARCH)/lib/asm-offsets.c),)
offsets-file := include/generated/asm-offsets.h
endif
always-y += $(offsets-file)
targets += arch/$(ARCH)/lib/asm-offsets.s
CFLAGS_lib/asm-offsets.o := -DDO_DEPS_ONLY
CFLAGS_arch/$(ARCH)/lib/asm-offsets.o := -DDO_DEPS_ONLY
$(obj)/$(offsets-file): $(obj)/arch/$(ARCH)/lib/asm-offsets.s FORCE
$(call filechk,offsets,__ASM_OFFSETS_H__)

816
Kconfig
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@@ -1,816 +0,0 @@
#
# For a description of the syntax of this configuration file,
# see the file Documentation/kbuild/kconfig-language.rst in the
# Linux kernel source tree.
#
mainmenu "U-Boot $(UBOOTVERSION) Configuration"
comment "Compiler: $(CC_VERSION_TEXT)"
source "scripts/Kconfig.include"
# Allow defaults in arch-specific code to override any given here
source "arch/Kconfig"
menu "General setup"
config BROKEN
bool
help
This option cannot be enabled. It is used as dependency
for broken and incomplete features.
config DEPRECATED
bool
help
This option cannot be enabled. It it used as a dependency for
code that relies on deprecated features that will be removed and
the conversion deadline has passed.
config COMPILE_TEST
bool "Compile also drivers which will not load"
help
Some drivers can be compiled on a different platform than they are
intended to be run on. Despite they cannot be loaded there (or even
when they load they cannot be used due to missing HW support),
developers still, opposing to distributors, might want to build such
drivers to compile-test them.
If you are a developer and want to build everything available, say Y
here. If you are a user/distributor, say N here to exclude useless
drivers to be distributed.
config WERROR
bool "Compile U-Boot with warnings as errors"
default COMPILE_TEST
help
A U-Boot build should not cause any compiler warnings, and this
enables the '-Werror' flag to enforce that rule.
However, if you have a new (or very old) compiler or linker with odd
and unusual warnings, or you have some architecture with problems,
you may need to disable this config option in order to
successfully build U-Boot.
config LOCALVERSION
string "Local version - append to U-Boot release"
help
Append an extra string to the end of your U-Boot version.
This will show up in your boot log, for example.
The string you set here will be appended after the contents of
any files with a filename matching localversion* in your
object and source tree, in that order. Your total string can
be a maximum of 64 characters.
config LOCALVERSION_AUTO
bool "Automatically append version information to the version string"
default y
help
This will try to automatically determine if the current tree is a
release tree by looking for Git tags that belong to the current
top of tree revision.
A string of the format -gxxxxxxxx will be added to the localversion
if a Git-based tree is found. The string generated by this will be
appended after any matching localversion* files, and after the value
set in CONFIG_LOCALVERSION.
(The actual string used here is the first eight characters produced
by running the command:
$ git rev-parse --verify HEAD
which is done within the script "scripts/setlocalversion".)
config CC_IS_GCC
def_bool $(success,$(CC) --version | head -n 1 | grep -q gcc)
config GCC_VERSION
int
default $(shell,$(srctree)/scripts/gcc-version.sh -p $(CC) | sed 's/^0*//') if CC_IS_GCC
default 0
config CC_IS_CLANG
def_bool $(success,$(CC) --version | head -n 1 | grep -q clang)
config CLANG_VERSION
int
default $(shell,$(srctree)/scripts/clang-version.sh $(CC))
choice
prompt "Optimization level"
default CC_OPTIMIZE_FOR_SIZE
config CC_OPTIMIZE_FOR_SIZE
bool "Optimize for size"
help
Enabling this option will pass "-Os" to gcc, resulting in a smaller
U-Boot image.
This option is enabled by default for U-Boot.
config CC_OPTIMIZE_FOR_SPEED
bool "Optimize for speed"
help
Enabling this option will pass "-O2" to gcc, resulting in a faster
U-Boot image.
config CC_OPTIMIZE_FOR_DEBUG
bool "Optimize for debugging"
help
Enabling this option will pass "-Og" to gcc, enabling optimizations
which don't interfere with debugging.
endchoice
config OPTIMIZE_INLINING
bool "Allow compiler to uninline functions marked 'inline' in full U-Boot"
help
This option determines if U-Boot forces gcc to inline the functions
developers have marked 'inline'. Doing so takes away freedom from gcc to
do what it thinks is best, which is desirable in some cases for size
reasons.
config SPL_OPTIMIZE_INLINING
bool "Allow compiler to uninline functions marked 'inline' in SPL"
depends on SPL
help
This option determines if U-Boot forces gcc to inline the functions
developers have marked 'inline'. Doing so takes away freedom from gcc to
do what it thinks is best, which is desirable in some cases for size
reasons.
config TPL_OPTIMIZE_INLINING
bool "Allow compiler to uninline functions marked 'inline' in TPL"
depends on TPL
help
This option determines if U-Boot forces gcc to inline the functions
developers have marked 'inline'. Doing so takes away freedom from gcc to
do what it thinks is best, which is desirable in some cases for size
reasons.
config ARCH_SUPPORTS_LTO
bool
config LTO
bool "Enable Link Time Optimizations"
depends on ARCH_SUPPORTS_LTO
help
This option enables Link Time Optimization (LTO), a mechanism which
allows the compiler to optimize between different compilation units.
This can optimize away dead code paths, resulting in smaller binary
size (if CC_OPTIMIZE_FOR_SIZE is enabled).
This option is not available for every architecture and may
introduce bugs.
Currently, when compiling with GCC, due to a weird bug regarding
jobserver, the final linking will not respect make's --jobs argument.
Instead all available processors will be used (as reported by the
nproc command).
If unsure, say n.
config CC_COVERAGE
bool "Enable code coverage analysis"
depends on SANDBOX
help
Enabling this option will pass "--coverage" to gcc to compile
and link code instrumented for coverage analysis.
config ASAN
bool "Enable AddressSanitizer"
depends on SANDBOX
help
Enables AddressSanitizer to discover out-of-bounds accesses,
use-after-free, double-free and memory leaks.
config FUZZ
bool "Enable fuzzing"
depends on CC_IS_CLANG
depends on DM_FUZZING_ENGINE
select ASAN
help
Enables the fuzzing infrastructure to generate fuzzing data and run
fuzz tests.
config CC_HAS_ASM_INLINE
def_bool $(success,echo 'void foo(void) { asm inline (""); }' | $(CC) -x c - -c -o /dev/null)
config XEN
bool "Select U-Boot be run as a bootloader for XEN Virtual Machine"
depends on ARM64
select SSCANF
help
Enabling this option will make U-Boot be run as a bootloader
for XEN [1] Virtual Machine.
Xen is a virtual machine monitor (VMM) or a type-1 hypervisor with support
for para-virtualization. Xen can organize the safe execution of several
virtual machines on the same physical system with performance close to
native. It is used as the basis for a number of different commercial and
open source applications, such as: server virtualization, Infrastructure
as a Service (IaaS), desktop virtualization, security applications,
embedded and hardware appliances.
Xen has a special VM called Domain-0 that runs the Dom0 kernel and allows
Xen to use the device drivers for the Domain-0 kernel by default.
[1] - https://xenproject.org/
config ENV_VARS_UBOOT_CONFIG
bool "Add arch, board, vendor and soc variables to default environment"
help
Define this in order to add variables describing the
U-Boot build configuration to the default environment.
These will be named arch, cpu, board, vendor, and soc.
Enabling this option will cause the following to be defined:
- CONFIG_SYS_ARCH
- CONFIG_SYS_CPU
- CONFIG_SYS_BOARD
- CONFIG_SYS_VENDOR
- CONFIG_SYS_SOC
config NR_DRAM_BANKS
int "Number of DRAM banks"
default 1 if ARCH_SC5XX || ARCH_SUNXI || ARCH_OWL
default 2 if OMAP34XX
default 4
help
This defines the number of DRAM banks.
config SYS_BOOT_GET_CMDLINE
bool "Enable kernel command line setup"
help
Enables allocating and saving kernel cmdline in space between
"bootm_low" and "bootm_low" + BOOTMAPSZ.
config SYS_BARGSIZE
int "Size of kernel command line buffer in bytes"
depends on SYS_BOOT_GET_CMDLINE
default 512
help
Buffer size for Boot Arguments which are passed to the application
(usually a Linux kernel) when it is booted
config SYS_BOOT_GET_KBD
bool "Enable kernel board information setup"
help
Enables allocating and saving a kernel copy of the bd_info in
space between "bootm_low" and "bootm_low" + BOOTMAPSZ.
config HAS_CUSTOM_SYS_INIT_SP_ADDR
bool "Use a custom location for the initial stack pointer address"
depends on ARC || (ARM && !INIT_SP_RELATIVE) || MIPS || PPC || RISCV
default y if OMAP34XX || AM33XX || AM43XX || DRA7XX
default y if TFABOOT
help
Typically, we use an initial stack pointer address that is calculated
by taking the statically defined CFG_SYS_INIT_RAM_ADDR, adding the
statically defined CFG_SYS_INIT_RAM_SIZE and then subtracting the
build-time constant of GENERATED_GBL_DATA_SIZE. On MIPS a different
but statica calculation is performed. However, some platforms will
take a different approach. Say Y here to define the address statically
instead.
config CUSTOM_SYS_INIT_SP_ADDR
hex "Static location for the initial stack pointer"
depends on HAS_CUSTOM_SYS_INIT_SP_ADDR
default 0x4020ff00 if OMAP34XX
default 0x4030ff00 if AM33XX
default 0x4033ff00 if AM43XX
default 0x4037ff00 if DRA7XX
default TEXT_BASE if TFABOOT
config SYS_MALLOC_F
bool "Enable malloc() pool before relocation"
default y if DM
help
Before relocation, memory is very limited on many platforms. Still,
we can provide a small malloc() pool if needed. Driver model in
particular needs this to operate, so that it can allocate the
initial serial device and any others that are needed.
config SYS_MALLOC_F_LEN
hex "Size of malloc() pool before relocation"
depends on SYS_MALLOC_F
default 0x400 if M68K || PPC || ROCKCHIP_PX30 || ROCKCHIP_RK3036 || \
ROCKCHIP_RV1108
default 0x600 if ARCH_ZYNQMP_R5 || ARCH_ZYNQMP
default 0x800 if ARCH_ZYNQ || ROCKCHIP_RK3128 || ROCKCHIP_RK3188 || \
ROCKCHIP_RK322X
default 0x1000 if ARCH_MESON || ARCH_BMIPS || ARCH_MTMIPS || X86
default 0x1800 if ARCH_TEGRA
default 0x4000 if SANDBOX || RISCV || ARCH_APPLE || ROCKCHIP_RK3368 || \
ROCKCHIP_RK3399
default 0x8000 if RCAR_GEN3
default 0x10000 if ARCH_IMX8 || ARCH_IMX8M
default 0x2000
help
Size of the malloc() pool for use before relocation. If
this is defined, then a very simple malloc() implementation
will become available before relocation. The address is just
below the global data, and the stack is moved down to make
space.
This feature allocates regions with increasing addresses
within the region. calloc() is supported, but realloc()
is not available. free() is supported but does nothing.
The memory will be freed (or in fact just forgotten) when
U-Boot relocates itself.
config SYS_MALLOC_LEN
hex "Define memory for Dynamic allocation"
default 0x4000000 if SANDBOX
default 0x2000000 if ARCH_ROCKCHIP || ARCH_OMAP2PLUS || ARCH_MESON || ARCH_K3
default 0x200000 if ARCH_BMIPS || X86
default 0x4020000 if SUNXI_MINIMUM_DRAM_MB >= 256
default 0x220000 if SUNXI_MINIMUM_DRAM_MB >= 64
default 0x120000 if SUNXI_MINIMUM_DRAM_MB >= 32
default 0x400000
help
This defines memory to be allocated for Dynamic allocation
TODO: Use for other architectures
config SPL_SYS_MALLOC_F
bool "Enable malloc() pool in SPL"
depends on SPL_FRAMEWORK && SYS_MALLOC_F && SPL
default y
help
In SPL memory is very limited on many platforms. Still,
we can provide a small malloc() pool if needed. Driver model in
particular needs this to operate, so that it can allocate the
initial serial device and any others that are needed.
config SPL_SYS_MALLOC_F_LEN
hex "Size of malloc() pool in SPL"
depends on SPL_SYS_MALLOC_F
default 0x2800 if RCAR_GEN3
default 0x2000 if IMX8MQ
default SYS_MALLOC_F_LEN
help
Sets the size of the malloc() pool in SPL. This is used for
driver model and other features, which must allocate memory for
data structures.
It is possible to enable CFG_SPL_SYS_MALLOC_START to start a new
malloc() region in SDRAM once it is inited.
config TPL_SYS_MALLOC_F
bool "Enable malloc() pool in TPL"
depends on SYS_MALLOC_F && TPL
default y if SPL_SYS_MALLOC_F
help
In TPL memory is very limited on many platforms. Still,
we can provide a small malloc() pool if needed. Driver model in
particular needs this to operate, so that it can allocate the
initial serial device and any others that are needed.
config TPL_SYS_MALLOC_F_LEN
hex "Size of malloc() pool in TPL"
depends on TPL_SYS_MALLOC_F
default SPL_SYS_MALLOC_F_LEN
help
Sets the size of the malloc() pool in TPL. This is used for
driver model and other features, which must allocate memory for
data structures.
config VALGRIND
bool "Inform valgrind about memory allocations"
depends on !RISCV
help
Valgrind is an instrumentation framework for building dynamic analysis
tools. In particular, it may be used to detect memory management bugs
in U-Boot. It relies on knowing when heap blocks are allocated in
order to give accurate results. This happens automatically for
standard allocator functions provided by the host OS. However, this
doesn't automatically happen for U-Boot's malloc implementation.
Enable this option to annotate U-Boot's malloc implementation so that
it can be handled accurately by Valgrind. If you aren't planning on
using valgrind to debug U-Boot, say 'n'.
config VPL_SYS_MALLOC_F
bool "Enable malloc() pool in VPL"
depends on SYS_MALLOC_F && VPL
default y if SPL_SYS_MALLOC_F
help
In VPL memory is very limited on many platforms. Still,
we can provide a small malloc() pool if needed. Driver model in
particular needs this to operate, so that it can allocate the
initial serial device and any others that are needed.
config VPL_SYS_MALLOC_F_LEN
hex "Size of malloc() pool in VPL before relocation"
depends on VPL_SYS_MALLOC_F
default SPL_SYS_MALLOC_F_LEN
help
Sets the size of the malloc() pool in VPL. This is used for
driver model and other features, which must allocate memory for
data structures.
menuconfig EXPERT
bool "Configure standard U-Boot features (expert users)"
default y
help
This option allows certain base U-Boot options and settings
to be disabled or tweaked. This is for specialized
environments which can tolerate a "non-standard" U-Boot.
Use this only if you really know what you are doing.
if EXPERT
config SYS_MALLOC_CLEAR_ON_INIT
bool "Init with zeros the memory reserved for malloc (slow)"
default y
help
This setting is enabled by default. The reserved malloc
memory is initialized with zeros, so first malloc calls
will return the pointer to the zeroed memory. But this
slows the boot time.
It is recommended to disable it, when CONFIG_SYS_MALLOC_LEN
value, has more than few MiB, e.g. when uses bzip2 or bmp logo.
Then the boot time can be significantly reduced.
Warning:
When disabling this, please check if malloc calls, maybe
should be replaced by calloc - if one expects zeroed memory.
config SPL_SYS_MALLOC_CLEAR_ON_INIT
bool "Init with zeros the memory reserved for malloc (slow) in SPL"
depends on SPL
default SYS_MALLOC_CLEAR_ON_INIT
help
Same as SYS_MALLOC_CLEAR_ON_INIT, but for SPL. It's possible to
Enable it without SYS_MALLOC_CLEAR_ON_INIT. It's useful for boards
that must have particular memory regions zero'ed before first use.
If SYS_SPL_MALLOC_START is configured to be in such region, this
option should be enabled.
config SYS_MALLOC_DEFAULT_TO_INIT
bool "Default malloc to init while reserving the memory for it"
help
It may happen that one needs to move the dynamic allocation
from one to another memory range, eg. when moving the malloc
from the limited static to a potentially large dynamic (DDR)
memory.
If so then on top of setting the updated memory aside one
needs to bring the malloc init.
If such a scenario is sought choose yes.
config TOOLS_DEBUG
bool "Enable debug information for tools"
help
Enable generation of debug information for tools such as mkimage.
This can be used for debugging purposes. With debug information
it is possible to set breakpoints on particular lines, single-step
debug through the source code, etc.
config SKIP_EARLY_DM
bool "Skips initialising device model pre-relocation"
help
Enable this option to skip scanning and probing devices prior to
U-Boot relocation (during board_f). Unless console support is disabled
a serial port is still required, however this can be found through
/chosen/stdout-path in FDT. If the serial port relies on other devices
like clocks these will also be bound and probed on demand.
This can speed up time to interactive console by about 50%, particularly
when combined with OF_LIVE.
config SKIP_RELOCATE
bool "Skips relocation of U-Boot to end of RAM"
help
Skips relocation of U-Boot allowing for systems that have extremely
limited RAM to run U-Boot.
config SKIP_RELOCATE_CODE
bool
help
Skips relocation of U-Boot code to the end of RAM, but still does
relocate data to the end of RAM. This is mainly meant to relocate
data to read-write portion of the RAM, while the code remains in
read-only portion of the RAM from which it is allowed to execute.
This split configuration is present on various secure cores.
config SKIP_RELOCATE_CODE_DATA_OFFSET
hex
default 0x0
depends on SKIP_RELOCATE_CODE
help
Offset of the read-write memory which contains data, from read-only
memory which contains executable text.
endif # EXPERT
config PHYS_64BIT
bool "64bit physical address support"
select FDT_64BIT
help
Say Y here to support 64bit physical memory address.
This can be used not only for 64bit SoCs, but also for
large physical address extension on 32bit SoCs.
config FDT_64BIT
bool "64bit fdt address support"
help
Say Y here to support 64bit fdt addresses.
This can be used not only for 64bit SoCs, but also
for large address extensions on 32bit SoCs.
config HAS_ROM
bool
select BINMAN
help
Enables building of a u-boot.rom target. This collects U-Boot and
any necessary binary blobs.
config SPL_IMAGE
string "SPL image used in the combined SPL+U-Boot image"
default "spl/boot.bin" if ARCH_AT91 && SPL_NAND_SUPPORT
default "spl/u-boot-spl.bin"
depends on SPL
help
Select the SPL build target that shall be generated by the SPL
build process (default spl/u-boot-spl.bin). This image will be
used to generate a combined image with SPL and main U-Boot
proper as one single image.
config REMAKE_ELF
bool "Recreate an ELF image from raw U-Boot binary"
depends on !COMPILE_TEST
help
Enable this to recreate an ELF image (u-boot.elf) from the raw
U-Boot binary (u-boot.bin), which may already have been statically
relocated and may already have a device-tree appended to it.
config BUILD_TARGET
string "Build target special images"
default "u-boot-elf.srec" if RCAR_64
default "u-boot-with-spl.bin" if ARCH_AT91 && SPL_NAND_SUPPORT
default "u-boot-with-spl.bin" if MPC85xx && !E500MC && !E5500 && !E6500 && SPL
default "u-boot-with-spl.imx" if (ARCH_MX6 || ARCH_MX7) && SPL
default "u-boot-with-spl.kwb" if ARMADA_32BIT && SPL
default "u-boot-with-spl.sfp" if ARCH_SOCFPGA_ARRIA10
default "u-boot-with-spl.sfp" if ARCH_SOCFPGA_GEN5
default "u-boot.itb" if !BINMAN && SPL_LOAD_FIT && (ARCH_ROCKCHIP || \
RISCV || ARCH_ZYNQMP)
default "u-boot.kwb" if (ARCH_KIRKWOOD || ARMADA_32BIT) && !SPL
help
Some SoCs need special image types (e.g. U-Boot binary
with a special header) as build targets. By defining
CONFIG_BUILD_TARGET in the SoC / board header, this
special image will be automatically built upon calling
make / buildman.
config HAS_BOARD_SIZE_LIMIT
bool "Define a maximum size for the U-Boot image"
depends on !COMPILE_TEST
default y if RCAR_32 || RCAR_64
help
In some cases, we need to enforce a hard limit on how big the U-Boot
image itself can be.
config BOARD_SIZE_LIMIT
int "Maximum size of the U-Boot image in bytes"
default 524288 if RCAR_32
default 1048576 if RCAR_64
depends on HAS_BOARD_SIZE_LIMIT
help
Maximum size of the U-Boot image. When defined, the build system
checks that the actual size does not exceed it. This does not
include SPL nor TPL, on platforms that use that functionality, they
have separate options to restrict size.
config SYS_CUSTOM_LDSCRIPT
bool "Use a custom location for the U-Boot linker script"
depends on !COMPILE_TEST
help
Normally when linking U-Boot we will look in the board directory,
the CPU directory and finally the "cpu" directory of the architecture
for the ile "u-boot.lds" and use that as our linker. However, in
some cases we need to provide a different linker script. To do so,
enable this option and then provide the location under
CONFIG_SYS_LDSCRIPT.
config SYS_LDSCRIPT
depends on SYS_CUSTOM_LDSCRIPT
string "Custom ldscript location"
help
Path within the source tree to the linker script to use for the
main U-Boot binary.
config SYS_LOAD_ADDR
hex "Address in memory to use by default"
default 0x01000000 if ARCH_SOCFPGA
default 0x02000000 if PPC || X86
default 0x81000000 if MACH_SUNIV
default 0x22000000 if MACH_SUN9I
default 0x42000000 if ARCH_SUNXI
default 0x82000000 if ARCH_KEYSTONE || ARCH_OMAP2PLUS || ARCH_K3
default 0x82000000 if ARCH_MX6 && (MX6SL || MX6SLL || MX6SX || MX6UL || MX6ULL)
default 0x12000000 if ARCH_MX6 && !(MX6SL || MX6SLL || MX6SX || MX6UL || MX6ULL)
default 0x80800000 if ARCH_MX7
default 0x90000000 if FSL_LSCH2 || FSL_LSCH3
default 0x0 if ARCH_SC5XX
help
Address in memory to use as the default safe load address.
config ERR_PTR_OFFSET
hex
default 0x0
help
Some U-Boot pointers have redundant information, so we can use a
scheme where we can return either an error code or a pointer with the
same return value. The default implementation just casts the pointer
to a number, however, this may fail on platforms where the end of the
address range is used for valid pointers (e.g. 0xffffff00 is a valid
heap pointer in socfpga SPL).
For such platforms, this value provides an upper range of those error
pointer values - up to 'MAX_ERRNO' bytes below this value must be
unused/invalid addresses.
config PLATFORM_ELFENTRY
string
default "__start" if MIPS
default "_start"
config STACK_SIZE
hex "Define max stack size that can be used by U-Boot"
default 0x4000000 if ARCH_VERSAL_NET || ARCH_VERSAL || ARCH_ZYNQMP
default 0x200000 if MICROBLAZE
default 0x4000 if ARCH_STM32
default 0x1000000
help
Define Max stack size that can be used by U-Boot. The UEFI sub-system
considers this value when setting up the memory map. The UEFI
specification requires 128 KiB or more of available stack space. On
some boards initrd_high is calculated as base stack pointer minus this
stack size.
config SYS_MEM_TOP_HIDE
hex "Exclude some memory from U-Boot / OS information"
default 0x0
help
If set, this specified memory area will get subtracted from the top
(end) of RAM and won't get "touched" at all by U-Boot. By fixing up
gd->ram_size the OS / next stage should gets passed the now
"corrected" memory size and won't touch it either.
WARNING: Please make sure that this value is a multiple of the OS
page size.
config SYS_MONITOR_LEN
int "Maximum size in bytes reserved for U-Boot in memory"
default 1048576 if X86
default 262144 if OMAP34XX
default 786432 if ARCH_SUNXI
default 0
help
Size of memory reserved for monitor code, used to determine
_at_compile_time_ (!) if the environment is embedded within the
U-Boot image, or in a separate flash sector, among other uses where
we need to set a maximum size of the U-Boot binary itself that will
be loaded.
config MP
bool "Support for multiprocessor"
help
This provides an option to bringup different processors
in multiprocessor cases.
config HAVE_TEXT_BASE
bool
depends on !NIOS2 && !XTENSA
depends on !EFI_APP
default y
config TEXT_BASE
depends on HAVE_TEXT_BASE
default 0x0 if POSITION_INDEPENDENT
default 0x17800000 if ARCH_MX6
default 0x87800000 if ARCH_MX7
default 0x80800000 if ARCH_OMAP2PLUS || ARCH_K3
default 0x81700000 if MACH_SUNIV
default 0x2a000000 if MACH_SUN9I
default 0x4a000000 if SUNXI_MINIMUM_DRAM_MB >= 256
default 0x42e00000 if SUNXI_MINIMUM_DRAM_MB >= 64
default 0x96000000 if ARCH_SC5XX && SC59X_64
default 0xB2200000 if ARCH_SC5XX && SC59X
default 0x89200000 if ARCH_SC5XX && TARGET_SC584_EZKIT
default 0xC2200000 if ARCH_SC5XX && (TARGET_SC589_EZKIT || TARGET_SC589_MINI)
default 0x82200000 if ARCH_SC5XX && SC57X
hex "Text Base"
help
The address in memory that U-Boot will be copied and executed from
initially.
config HAVE_SYS_UBOOT_START
bool "Use custom U-Boot Start"
depends on HAVE_TEXT_BASE
help
By default, the address in memory that U-Boot will be copied from
(TEXT_BASE) and the entry point are the same. Select this to start the
execution of U-Boot from a different address.
This may be required if a header or vector table needs to be copied
but not executed.
config SYS_UBOOT_START
hex
depends on HAVE_TEXT_BASE
default TEXT_BASE
prompt "U-Boot entry" if HAVE_SYS_UBOOT_START
help
If TEXT_BASE differs from the start of execution, this sets the
address in memory that U-Boot will start execution from initially.
config HAVE_SYS_MONITOR_BASE
bool
depends on ARC || MIPS || M68K || NIOS2 || PPC || XTENSA || X86 \
|| ENV_IS_IN_FLASH || MTD_NOR_FLASH
depends on !EFI_APP
default y
config SYS_MONITOR_BASE
depends on HAVE_SYS_MONITOR_BASE
hex "Physical start address of boot monitor code"
default TEXT_BASE
help
The physical start address of boot monitor code (which is the same as
CONFIG_TEXT_BASE when linking) and the same as CFG_SYS_FLASH_BASE
when booting from flash.
config SPL_SYS_MONITOR_BASE
depends on MPC85xx && SPL && HAVE_SYS_MONITOR_BASE
hex "Physical start address of SPL monitor code"
default SPL_TEXT_BASE
config TPL_SYS_MONITOR_BASE
depends on MPC85xx && TPL && HAVE_SYS_MONITOR_BASE
hex "Physical start address of TPL monitor code"
config DYNAMIC_SYS_CLK_FREQ
bool "Determine CPU clock frequency at run-time"
depends on !COMPILE_TEST
help
Implement a get_board_sys_clk function that will determine the CPU
clock frequency at run time, rather than define it statically.
config SYS_CLK_FREQ
depends on !DYNAMIC_SYS_CLK_FREQ
int "CPU clock frequency"
default 125000000 if ARCH_LS1012A
default 100000000 if ARCH_P2020 || ARCH_T1024 || ARCH_T1042 || \
ARCH_LS1021A || FSL_LSCH2 || FSL_LSCH3
default 66666666 if ARCH_P1010 || ARCH_P1020 || ARCH_T4240
default 66660000 if ARCH_T2080
default 33333333 if RCAR_GEN3
default 24000000 if ARCH_EXYNOS
default 20000000 if RCAR_GEN2
default 0
help
A static value for the CPU frequency. Note that if not required
for a given SoC, this can be left at 0.
config HAS_LDR
bool
help
Enables building .ldr targets for U-Boot and SPL. This does not
automatically build any additional targets with make or buildman.
config LDR_CPU
string "CPU name to be passed to LDR utility."
depends on HAS_LDR
help
Set the CPU name for the -T parameter in the LDR utility. This is
generally used on processors from Analog Devices, but may be also
be useful for other vendors.
source "api/Kconfig"
endmenu # General setup
source "boot/Kconfig"
source "common/Kconfig"
source "cmd/Kconfig"
source "disk/Kconfig"
source "dts/Kconfig"
source "env/Kconfig"
source "net/Kconfig"
source "drivers/Kconfig"
source "fs/Kconfig"
source "lib/Kconfig"
source "test/Kconfig"
source "tools/Kconfig"

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@@ -1,19 +0,0 @@
GPL License Exception:
Even though U-Boot in general is covered by the GPL-2.0/GPL-2.0+,
this does *not* cover the so-called "standalone" applications that
use U-Boot services by means of the jump table provided by U-Boot
exactly for this purpose - this is merely considered normal use of
U-Boot, and does *not* fall under the heading of "derived work".
The following files define interfaces to U-Boot:
* include/image.h
* include/export.h
* arch/*/include/asm/u-boot.h
* examples/standalone/stubs.c
Including these (unmodified) files in another file is considered normal
use of U-Boot, and does *not* fall under the heading of "derived work".
-- Wolfgang Denk

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@@ -1,97 +0,0 @@
Copyright (c) 2010, Andrey Makarov (makarov@bmstu.ru, mka-at-mailru@mail.ru),
with Reserved Font Name Anka/Coder Narrow.
Copyright (c) 2011, Pablo Impallari (www.impallari.com|impallari@gmail.com),
Rodrigo Fuenzalida (www.rfuenzalida.com) with Reserved Font Name Cantora.
This Font Software is licensed under the SIL Open Font License, Version 1.1.
This license is copied below, and is also available with a FAQ at:
http://scripts.sil.org/OFL
-----------------------------------------------------------
SIL OPEN FONT LICENSE Version 1.1 - 26 February 2007
-----------------------------------------------------------
PREAMBLE
The goals of the Open Font License (OFL) are to stimulate worldwide
development of collaborative font projects, to support the font creation
efforts of academic and linguistic communities, and to provide a free and
open framework in which fonts may be shared and improved in partnership
with others.
The OFL allows the licensed fonts to be used, studied, modified and
redistributed freely as long as they are not sold by themselves. The
fonts, including any derivative works, can be bundled, embedded,
redistributed and/or sold with any software provided that any reserved
names are not used by derivative works. The fonts and derivatives,
however, cannot be released under any other type of license. The
requirement for fonts to remain under this license does not apply
to any document created using the fonts or their derivatives.
DEFINITIONS
"Font Software" refers to the set of files released by the Copyright
Holder(s) under this license and clearly marked as such. This may
include source files, build scripts and documentation.
"Reserved Font Name" refers to any names specified as such after the
copyright statement(s).
"Original Version" refers to the collection of Font Software components as
distributed by the Copyright Holder(s).
"Modified Version" refers to any derivative made by adding to, deleting,
or substituting -- in part or in whole -- any of the components of the
Original Version, by changing formats or by porting the Font Software to a
new environment.
"Author" refers to any designer, engineer, programmer, technical
writer or other person who contributed to the Font Software.
PERMISSION & CONDITIONS
Permission is hereby granted, free of charge, to any person obtaining
a copy of the Font Software, to use, study, copy, merge, embed, modify,
redistribute, and sell modified and unmodified copies of the Font
Software, subject to the following conditions:
1) Neither the Font Software nor any of its individual components,
in Original or Modified Versions, may be sold by itself.
2) Original or Modified Versions of the Font Software may be bundled,
redistributed and/or sold with any software, provided that each copy
contains the above copyright notice and this license. These can be
included either as stand-alone text files, human-readable headers or
in the appropriate machine-readable metadata fields within text or
binary files as long as those fields can be easily viewed by the user.
3) No Modified Version of the Font Software may use the Reserved Font
Name(s) unless explicit written permission is granted by the corresponding
Copyright Holder. This restriction only applies to the primary font name as
presented to the users.
4) The name(s) of the Copyright Holder(s) or the Author(s) of the Font
Software shall not be used to promote, endorse or advertise any
Modified Version, except to acknowledge the contribution(s) of the
Copyright Holder(s) and the Author(s) or with their explicit written
permission.
5) The Font Software, modified or unmodified, in part or in whole,
must be distributed entirely under this license, and must not be
distributed under any other license. The requirement for fonts to
remain under this license does not apply to any document created
using the Font Software.
TERMINATION
This license becomes null and void if any of the above conditions are
not met.
DISCLAIMER
THE FONT SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO ANY WARRANTIES OF
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT
OF COPYRIGHT, PATENT, TRADEMARK, OR OTHER RIGHT. IN NO EVENT SHALL THE
COPYRIGHT HOLDER BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
INCLUDING ANY GENERAL, SPECIAL, INDIRECT, INCIDENTAL, OR CONSEQUENTIAL
DAMAGES, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
FROM, OUT OF THE USE OR INABILITY TO USE THE FONT SOFTWARE OR FROM
OTHER DEALINGS IN THE FONT SOFTWARE.

View File

@@ -1,155 +0,0 @@
SPDX-License-Identifier: GPL-2.0
U-Boot is Free Software. It is copyrighted by Wolfgang Denk and
many others who contributed code (see the actual source code and the
git commit messages for details). You can redistribute U-Boot and/or
modify it under the terms of version 2 of the GNU General Public
License as published by the Free Software Foundation. Most of it can
also be distributed, at your option, under any later version of the
GNU General Public License -- see individual files for exceptions.
NOTE! This license does *not* cover the so-called "standalone"
applications that use U-Boot services by means of the jump table
provided by U-Boot exactly for this purpose - this is merely
considered normal use of U-Boot, and does *not* fall under the
heading of "derived work" -- see file Licenses/Exceptions for
details.
Also note that the GPL and the other licenses are copyrighted by
the Free Software Foundation and other organizations, but the
instance of code that they refer to (the U-Boot source code) is
copyrighted by me and others who actually wrote it.
-- Wolfgang Denk
Like many other projects, U-Boot has a tradition of including big
blocks of License headers in all files. This not only blows up the
source code with mostly redundant information, but also makes it very
difficult to generate License Clearing Reports. An additional problem
is that even the same licenses are referred to by a number of
slightly varying text blocks (full, abbreviated, different
indentation, line wrapping and/or white space, with obsolete address
information, ...) which makes automatic processing a nightmare.
To make this easier, such license headers in the source files will be
replaced with a single line reference to Unique License Identifiers
as defined by the Linux Foundation's SPDX project [1].
If a "SPDX-License-Identifier:" line references more than one Unique
License Identifier, then this means that the respective file can be
used under the terms of either of these licenses, i. e. with
SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
you can choose between GPL-2.0+ and BSD-3-Clause licensing.
We use the SPDX Unique License Identifiers here; these are available
at [2].
License identifier syntax
-------------------------
1. Placement:
The SPDX license identifier in U-Boot files shall be added at the first
possible line in a file which can contain a comment. For the majority
or files this is the first line, except for scripts which require the
'#!PATH_TO_INTERPRETER' in the first line. For those scripts the SPDX
identifier goes into the second line.
|
2. Style:
The SPDX license identifier is added in form of a comment. The comment
style depends on the file type::
C source: // SPDX-License-Identifier: <SPDX License Expression>
C header: /* SPDX-License-Identifier: <SPDX License Expression> */
ASM: /* SPDX-License-Identifier: <SPDX License Expression> */
scripts: # SPDX-License-Identifier: <SPDX License Expression>
.rst: .. SPDX-License-Identifier: <SPDX License Expression>
.dts{i}: // SPDX-License-Identifier: <SPDX License Expression>
If a specific tool cannot handle the standard comment style, then the
appropriate comment mechanism which the tool accepts shall be used. This
is the reason for having the "/\* \*/" style comment in C header
files. There was build breakage observed with generated .lds files where
'ld' failed to parse the C++ comment. This has been fixed by now, but
there are still older assembler tools which cannot handle C++ style
comments.
|
3. Syntax:
A <SPDX License Expression> is either an SPDX short form license
identifier found on the SPDX License List, or the combination of two
SPDX short form license identifiers separated by "WITH" when a license
exception applies. When multiple licenses apply, an expression consists
of keywords "AND", "OR" separating sub-expressions and surrounded by
"(", ")" .
License identifiers for licenses like [L]GPL with the 'or later' option
are constructed by using a "+" for indicating the 'or later' option.::
// SPDX-License-Identifier: GPL-2.0+
// SPDX-License-Identifier: LGPL-2.1+
WITH should be used when there is a modifier to a license needed.
For example, the linux kernel UAPI files use the expression::
// SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note
// SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note
Other examples using WITH exceptions found in the linux kernel are::
// SPDX-License-Identifier: GPL-2.0 WITH mif-exception
// SPDX-License-Identifier: GPL-2.0+ WITH GCC-exception-2.0
Exceptions can only be used with particular License identifiers. The
valid License identifiers are listed in the tags of the exception text
file.
OR should be used if the file is dual licensed and only one license is
to be selected. For example, some dtsi files are available under dual
licenses::
// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
Examples from U-Boot for license expressions in dual licensed files::
// SPDX-License-Identifier: GPL-2.0 OR MIT
// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
AND should be used if the file has multiple licenses whose terms all
apply to use the file. For example, if code is inherited from another
project and permission has been given to put it in U-Boot, but the
original license terms need to remain in effect::
// SPDX-License-Identifier: (GPL-2.0 WITH Linux-syscall-note) AND MIT
Another other example where both sets of license terms need to be
adhered to is::
// SPDX-License-Identifier: GPL-1.0+ AND LGPL-2.1+
[1] http://spdx.org/
[2] http://spdx.org/licenses/
Full name SPDX Identifier OSI Approved File name URI
=======================================================================================================================================
bzip2 and libbzip2 License v1.0.6 bzip2-1.0.6 bzip2-1.0.6.txt https://spdx.org/licenses/bzip2-1.0.6.html
GNU General Public License v2.0 only GPL-2.0 Y gpl-2.0.txt http://www.gnu.org/licenses/gpl-2.0.txt
GNU General Public License v2.0 or later GPL-2.0+ Y gpl-2.0.txt http://www.gnu.org/licenses/gpl-2.0.txt
GNU Library General Public License v2 or later LGPL-2.0+ Y lgpl-2.0.txt http://www.gnu.org/licenses/old-licenses/lgpl-2.0.txt
GNU Lesser General Public License v2.1 or later LGPL-2.1+ Y lgpl-2.1.txt http://www.gnu.org/licenses/old-licenses/lgpl-2.1.txt
eCos license version 2.0 eCos-2.0 eCos-2.0.txt http://www.gnu.org/licenses/ecos-license.html
BSD 2-Clause License BSD-2-Clause Y bsd-2-clause.txt http://spdx.org/licenses/BSD-2-Clause
BSD 3-clause "New" or "Revised" License BSD-3-Clause Y bsd-3-clause.txt http://spdx.org/licenses/BSD-3-Clause#licenseText
IBM PIBS (PowerPC Initialization and IBM-pibs ibm-pibs.txt
Boot Software) license
ISC License ISC Y isc.txt https://spdx.org/licenses/ISC
MIT License MIT Y mit.txt https://spdx.org/licenses/MIT.html
SIL OPEN FONT LICENSE (OFL-1.1) OFL-1.1 Y OFL.txt https://spdx.org/licenses/OFL-1.1.html
X11 License X11 x11.txt https://spdx.org/licenses/X11.html

View File

@@ -1,25 +0,0 @@
Redistribution and use in source and binary forms, with or
without modification, are permitted provided that the following
conditions are met:
1. Redistributions of source code must retain the above
copyright notice, this list of conditions and the following
disclaimer.
2. Redistributions in binary form must reproduce the above
copyright notice, this list of conditions and the following
disclaimer in the documentation and/or other materials
provided with the distribution.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

View File

@@ -1,24 +0,0 @@
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions
are met:
1. Redistributions of source code must retain the above copyright
notice, this list of conditions, and the following disclaimer,
without modification.
2. Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution.
3. The names of the above-listed copyright holders may not be used
to endorse or promote products derived from this software without
specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

View File

@@ -1,30 +0,0 @@
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions
are met:
1. Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
2. The origin of this software must not be misrepresented; you must
not claim that you wrote the original software. If you use this
software in a product, an acknowledgment in the product
documentation would be appreciated but is not required.
3. Altered source versions must be plainly marked as such, and must
not be misrepresented as being the original software.
4. The name of the author may not be used to endorse or promote
products derived from this software without specific prior written
permission.
THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

View File

@@ -1,43 +0,0 @@
Note that this license is not endorsed by the Free Software Foundation.
It is available here as a convenience to readers of [1]the license
list.
The eCos license version 2.0
This file is part of eCos, the Embedded Configurable Operating System.
Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
eCos is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License as published by the Free
Software Foundation; either version 2 or (at your option) any later
version.
eCos is distributed in the hope that it will be useful, but WITHOUT ANY
WARRANTY; without even the implied warranty of MERCHANTABILITY or
FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
for more details.
You should have received a copy of the GNU General Public License along
with eCos; if not, write to the Free Software Foundation, Inc., 51
Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
As a special exception, if other files instantiate templates or use
macros or inline functions from this file, or you compile this file and
link it with other works to produce a work based on this file, this
file does not by itself cause the resulting work to be covered by the
GNU General Public License. However the source code for this file must
still be made available in accordance with section (3) of the GNU
General Public License.
This exception does not invalidate any other reasons why a work based
on this file might be covered by the GNU General Public License.
Alternative licenses for eCos may be arranged by contacting Red Hat,
Inc. at http://sources.redhat.com/ecos/ecos-license/
-------------------------------------------
####ECOSGPLCOPYRIGHTEND####
References
1. http://www.gnu.org/licenses/license-list.html

View File

@@ -1,339 +0,0 @@
GNU GENERAL PUBLIC LICENSE
Version 2, June 1991
Copyright (C) 1989, 1991 Free Software Foundation, Inc.,
51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
Everyone is permitted to copy and distribute verbatim copies
of this license document, but changing it is not allowed.
Preamble
The licenses for most software are designed to take away your
freedom to share and change it. By contrast, the GNU General Public
License is intended to guarantee your freedom to share and change free
software--to make sure the software is free for all its users. This
General Public License applies to most of the Free Software
Foundation's software and to any other program whose authors commit to
using it. (Some other Free Software Foundation software is covered by
the GNU Lesser General Public License instead.) You can apply it to
your programs, too.
When we speak of free software, we are referring to freedom, not
price. Our General Public Licenses are designed to make sure that you
have the freedom to distribute copies of free software (and charge for
this service if you wish), that you receive source code or can get it
if you want it, that you can change the software or use pieces of it
in new free programs; and that you know you can do these things.
To protect your rights, we need to make restrictions that forbid
anyone to deny you these rights or to ask you to surrender the rights.
These restrictions translate to certain responsibilities for you if you
distribute copies of the software, or if you modify it.
For example, if you distribute copies of such a program, whether
gratis or for a fee, you must give the recipients all the rights that
you have. You must make sure that they, too, receive or can get the
source code. And you must show them these terms so they know their
rights.
We protect your rights with two steps: (1) copyright the software, and
(2) offer you this license which gives you legal permission to copy,
distribute and/or modify the software.
Also, for each author's protection and ours, we want to make certain
that everyone understands that there is no warranty for this free
software. If the software is modified by someone else and passed on, we
want its recipients to know that what they have is not the original, so
that any problems introduced by others will not reflect on the original
authors' reputations.
Finally, any free program is threatened constantly by software
patents. We wish to avoid the danger that redistributors of a free
program will individually obtain patent licenses, in effect making the
program proprietary. To prevent this, we have made it clear that any
patent must be licensed for everyone's free use or not licensed at all.
The precise terms and conditions for copying, distribution and
modification follow.
GNU GENERAL PUBLIC LICENSE
TERMS AND CONDITIONS FOR COPYING, DISTRIBUTION AND MODIFICATION
0. This License applies to any program or other work which contains
a notice placed by the copyright holder saying it may be distributed
under the terms of this General Public License. The "Program", below,
refers to any such program or work, and a "work based on the Program"
means either the Program or any derivative work under copyright law:
that is to say, a work containing the Program or a portion of it,
either verbatim or with modifications and/or translated into another
language. (Hereinafter, translation is included without limitation in
the term "modification".) Each licensee is addressed as "you".
Activities other than copying, distribution and modification are not
covered by this License; they are outside its scope. The act of
running the Program is not restricted, and the output from the Program
is covered only if its contents constitute a work based on the
Program (independent of having been made by running the Program).
Whether that is true depends on what the Program does.
1. You may copy and distribute verbatim copies of the Program's
source code as you receive it, in any medium, provided that you
conspicuously and appropriately publish on each copy an appropriate
copyright notice and disclaimer of warranty; keep intact all the
notices that refer to this License and to the absence of any warranty;
and give any other recipients of the Program a copy of this License
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END OF TERMS AND CONDITIONS
How to Apply These Terms to Your New Programs
If you develop a new program, and you want it to be of the greatest
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Also add information on how to contact you by electronic and paper mail.
If the program is interactive, make it output a short notice like this
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Gnomovision version 69, Copyright (C) year name of author
Gnomovision comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
This is free software, and you are welcome to redistribute it
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The hypothetical commands `show w' and `show c' should show the appropriate
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You should also get your employer (if you work as a programmer) or your
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Yoyodyne, Inc., hereby disclaims all copyright interest in the program
`Gnomovision' (which makes passes at compilers) written by James Hacker.
<signature of Ty Coon>, 1 April 1989
Ty Coon, President of Vice
This General Public License does not permit incorporating your program into
proprietary programs. If your program is a subroutine library, you may
consider it more useful to permit linking proprietary applications with the
library. If this is what you want to do, use the GNU Lesser General
Public License instead of this License.

View File

@@ -1,17 +0,0 @@
This source code has been made available to you by IBM on an AS-IS
basis. Anyone receiving this source is licensed under IBM
copyrights to use it in any way he or she deems fit, including
copying it, modifying it, compiling it, and redistributing it either
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preceding two paragraphs in the transferred software.
COPYRIGHT I B M CORPORATION 1995
LICENSED MATERIAL - PROGRAM PROPERTY OF I B M

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@@ -1,17 +0,0 @@
ISC License:
Copyright (c) 2004-2010 by Internet Systems Consortium, Inc. ("ISC")
Copyright (c) 1995-2003 by Internet Software Consortium
Permission to use, copy, modify, and/or distribute this software
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THE SOFTWARE IS PROVIDED "AS IS" AND ISC DISCLAIMS ALL WARRANTIES
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ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS,
WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION,
ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF
THIS SOFTWARE.

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@@ -1,481 +0,0 @@
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That's all there is to it!

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@@ -1,502 +0,0 @@
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<signature of Ty Coon>, 1 April 1990
Ty Coon, President of Vice
That's all there is to it!

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SOFTWARE.

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@@ -1,26 +0,0 @@
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copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE X
CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
Except as contained in this notice, the name of the X Consortium shall not be
used in advertising or otherwise to promote the sale, use or other dealings in
this Software without prior written authorization from the X Consortium.
X Window System is a trademark of X Consortium, Inc.

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171
MAKEALL Normal file
View File

@@ -0,0 +1,171 @@
#!/bin/sh
if [ "${CROSS_COMPILE}" ] ; then
MAKE="make CROSS_COMPILE=${CROSS_COMPILE}"
else
MAKE=make
fi
[ -d LOG ] || mkdir LOG || exit 1
LIST=""
#########################################################################
## MPC5xx Systems
#########################################################################
LIST_5xx=" \
cmi_mpc5xx \
"
#########################################################################
## MPC8xx Systems
#########################################################################
LIST_8xx=" \
ADS860 AMX860 c2mon CCM \
cogent_mpc8xx ESTEEM192E ETX094 ELPT860 \
FADS823 FADS850SAR FADS860T FLAGADM \
FPS850L GEN860T GEN860T_SC GENIETV \
GTH hermes IAD210 ICU862_100MHz \
IP860 IVML24 IVML24_128 IVML24_256 \
IVMS8 IVMS8_128 IVMS8_256 KUP4K \
LANTEC lwmon MBX MBX860T \
MHPC MVS1 NETVIA NETVIA_V2 \
NX823 pcu_e R360MPI RBC823 \
rmu RPXClassic RPXlite RRvision \
SM850 SPD823TS svm_sc8xx SXNI855T \
TOP860 TQM823L TQM823L_LCD TQM850L \
TQM855L TQM860L TTTech v37 \
"
#########################################################################
## PPC4xx Systems
#########################################################################
LIST_4xx=" \
ADCIOP AR405 ASH405 BUBINGA405EP \
CANBT CPCI405 CPCI4052 CPCI405AB \
CPCI440 CPCIISER4 CRAYL1 DASA_SIM \
DU405 EBONY ERIC EXBITGEN \
MIP405 MIP405T ML2 OCRTC \
ORSG PCI405 PIP405 PMC405 \
W7OLMC W7OLMG WALNUT405 \
"
#########################################################################
## MPC824x Systems
#########################################################################
LIST_824x=" \
A3000 BMW CPC45 CU824 \
MOUSSE MUSENKI OXC PN62 \
Sandpoint8240 Sandpoint8245 SL8245 utx8245 \
"
#########################################################################
## MPC8260 Systems (includes 8250, 8255 etc.)
#########################################################################
LIST_8260=" \
atc cogent_mpc8260 CPU86 ep8260 \
gw8260 hymod IPHASE4539 MPC8260ADS \
MPC8266ADS PM826 ppmc8260 RPXsuper \
rsdproto sacsng sbc8260 SCM \
TQM8260 \
"
#########################################################################
## 74xx/7xx Systems
#########################################################################
LIST_74xx=" \
EVB64260 PCIPPC2 PCIPPC6 ZUMA \
"
LIST_7xx=" \
BAB7xx ELPPC \
"
LIST_ppc="${LIST_5xx} ${LIST_8xx} \
${LIST_824x} ${LIST_8260} \
${LIST_4xx} \
${LIST_74xx} ${LIST_7xx}"
#########################################################################
## StrongARM Systems
#########################################################################
LIST_SA="dnp1110 lart shannon"
#########################################################################
## ARM7 Systems
#########################################################################
LIST_ARM7="ep7312 impa7"
#########################################################################
## ARM9 Systems
#########################################################################
LIST_ARM9="at91rm9200dk smdk2400 smdk2410 trab VCMA9"
#########################################################################
## Xscale Systems
#########################################################################
LIST_pxa="cradle csb226 innokom lubbock wepep250"
LIST_arm="${LIST_SA} ${LIST_ARM7} ${LIST_ARM9} ${LIST_pxa}"
#########################################################################
## MIPS 4Kc Systems
#########################################################################
LIST_mips4kc="incaip"
LIST_mips5kc="purple"
LIST_mips="${LIST_mips4kc} ${LIST_mips5kc}"
#########################################################################
## i386 Systems
#########################################################################
LIST_I486="sc520_cdp sc520_spunk sc520_spunk_rel"
LIST_x86="${LIST_I486}"
#-----------------------------------------------------------------------
#----- for now, just run PPC by default -----
[ $# = 0 ] && set $LIST_ppc
#-----------------------------------------------------------------------
build_target() {
target=$1
${MAKE} distclean >/dev/null
${MAKE} ${target}_config
${MAKE} all 2>&1 >LOG/$target.MAKELOG | tee LOG/$target.ERR
${CROSS_COMPILE:-ppc_8xx-}size u-boot | tee -a LOG/$target.MAKELOG
}
#-----------------------------------------------------------------------
for arg in $@
do
case "$arg" in
5xx|8xx|824x|8260|4xx|7xx|74xx|SA|ARM7|ARM9|ppc|arm|pxa|mips|I486|x86)
for target in `eval echo '$LIST_'${arg}`
do
build_target ${target}
done
;;
*) build_target ${arg}
;;
esac
done

3585
Makefile

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2921
README

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@@ -1,22 +0,0 @@
config API
bool "Enable U-Boot API"
depends on CC_IS_GCC
help
This option enables the U-Boot API. See api/README for more information.
menu "API"
depends on API
config SYS_MMC_MAX_DEVICE
int "Maximum number of MMC devices exposed via the API"
default 1
config EXAMPLES
bool "Compile API examples"
depends on !SANDBOX
default y if ARCH_QEMU
help
U-Boot provides an API for standalone applications. Examples are
provided in directory examples/.
endmenu

View File

@@ -1,11 +0,0 @@
# SPDX-License-Identifier: GPL-2.0-or-later
#
# (C) Copyright 2007 Semihalf
obj-y += api.o api_display.o api_net.o api_storage.o
ifeq (CONFIG_PPC,y)
obj-$(CONFIG_PPC) += api_platform-powerpc.o
else
obj-y += api_platform.o
endif

View File

@@ -1,55 +0,0 @@
U-Boot machine/arch independent API for external apps
=====================================================
1. Main assumptions
- there is a single entry point (syscall) to the API
- per current design the syscall is a C-callable function in the U-Boot
text, which might evolve into a real syscall using machine exception trap
once this initial version proves functional
- the consumer app is responsible for producing appropriate context (call
number and arguments)
- upon entry, the syscall dispatches the call to other (existing) U-Boot
functional areas like networking or storage operations
- consumer application will recognize the API is available by searching
a specified (assumed by convention) range of address space for the
signature
- the U-Boot integral part of the API is meant to be thin and non-intrusive,
leaving as much processing as possible on the consumer application side,
for example it doesn't keep states, but relies on hints from the app and
so on
- optional (CONFIG_API)
2. Calls
- console related (getc, putc, tstc etc.)
- system (reset, platform info)
- time (delay, current)
- env vars (enumerate all, get, set)
- devices (enumerate all, open, close, read, write); currently two classes
of devices are recognized and supported: network and storage (ide, scsi,
usb etc.)
3. Structure overview
- core API, integral part of U-Boot, mandatory
- implements the single entry point (mimics UNIX syscall)
- glue
- entry point at the consumer side, allows to make syscall, mandatory
part
- helper conveniency wrappers so that consumer app does not have to use
the syscall directly, but in a more friendly manner (a la libc calls),
optional part
- consumer application
- calls directly, or leverages the provided glue mid-layer

711
api/api.c
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@@ -1,711 +0,0 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* (C) Copyright 2007 Semihalf
*
* Written by: Rafal Jaworowski <raj@semihalf.com>
*/
#include <config.h>
#include <command.h>
#include <env.h>
#include <malloc.h>
#include <time.h>
#include <env_internal.h>
#include <vsprintf.h>
#include <linux/delay.h>
#include <linux/errno.h>
#include <linux/types.h>
#include <api_public.h>
#include <u-boot/crc.h>
#include "api_private.h"
#define DEBUG
#undef DEBUG
/*****************************************************************************
*
* This is the API core.
*
* API_ functions are part of U-Boot code and constitute the lowest level
* calls:
*
* - they know what values they need as arguments
* - their direct return value pertains to the API_ "shell" itself (0 on
* success, some error code otherwise)
* - if the call returns a value it is buried within arguments
*
****************************************************************************/
#ifdef DEBUG
#define debugf(fmt, args...) do { printf("%s(): ", __func__); printf(fmt, ##args); } while (0)
#else
#define debugf(fmt, args...)
#endif
typedef int (*cfp_t)(va_list argp);
static int calls_no;
/*
* pseudo signature:
*
* int API_getc(int *c)
*/
static int API_getc(va_list ap)
{
int *c;
if ((c = (int *)va_arg(ap, uintptr_t)) == NULL)
return API_EINVAL;
*c = getchar();
return 0;
}
/*
* pseudo signature:
*
* int API_tstc(int *c)
*/
static int API_tstc(va_list ap)
{
int *t;
if ((t = (int *)va_arg(ap, uintptr_t)) == NULL)
return API_EINVAL;
*t = tstc();
return 0;
}
/*
* pseudo signature:
*
* int API_putc(char *ch)
*/
static int API_putc(va_list ap)
{
char *c;
if ((c = (char *)va_arg(ap, uintptr_t)) == NULL)
return API_EINVAL;
putc(*c);
return 0;
}
/*
* pseudo signature:
*
* int API_puts(char **s)
*/
static int API_puts(va_list ap)
{
char *s;
if ((s = (char *)va_arg(ap, uintptr_t)) == NULL)
return API_EINVAL;
puts(s);
return 0;
}
/*
* pseudo signature:
*
* int API_reset(void)
*/
static int API_reset(va_list ap)
{
do_reset(NULL, 0, 0, NULL);
/* NOT REACHED */
return 0;
}
/*
* pseudo signature:
*
* int API_get_sys_info(struct sys_info *si)
*
* fill out the sys_info struct containing selected parameters about the
* machine
*/
static int API_get_sys_info(va_list ap)
{
struct sys_info *si;
si = (struct sys_info *)va_arg(ap, uintptr_t);
if (si == NULL)
return API_ENOMEM;
return (platform_sys_info(si)) ? 0 : API_ENODEV;
}
/*
* pseudo signature:
*
* int API_udelay(unsigned long *udelay)
*/
static int API_udelay(va_list ap)
{
unsigned long *d;
if ((d = (unsigned long *)va_arg(ap, unsigned long)) == NULL)
return API_EINVAL;
udelay(*d);
return 0;
}
/*
* pseudo signature:
*
* int API_get_timer(unsigned long *current, unsigned long *base)
*/
static int API_get_timer(va_list ap)
{
unsigned long *base, *cur;
cur = (unsigned long *)va_arg(ap, unsigned long);
if (cur == NULL)
return API_EINVAL;
base = (unsigned long *)va_arg(ap, unsigned long);
if (base == NULL)
return API_EINVAL;
*cur = get_timer(*base);
return 0;
}
/*****************************************************************************
*
* pseudo signature:
*
* int API_dev_enum(struct device_info *)
*
*
* cookies uniqely identify the previously enumerated device instance and
* provide a hint for what to inspect in current enum iteration:
*
* - net: &eth_device struct address from list pointed to by eth_devices
*
* - storage: struct blk_desc struct address from &ide_dev_desc[n],
* &scsi_dev_desc[n] and similar tables
*
****************************************************************************/
static int API_dev_enum(va_list ap)
{
struct device_info *di;
/* arg is ptr to the device_info struct we are going to fill out */
di = (struct device_info *)va_arg(ap, uintptr_t);
if (di == NULL)
return API_EINVAL;
if (di->cookie == NULL) {
/* start over - clean up enumeration */
dev_enum_reset(); /* XXX shouldn't the name contain 'stor'? */
debugf("RESTART ENUM\n");
/* net device enumeration first */
if (dev_enum_net(di))
return 0;
}
/*
* The hidden assumption is there can only be one active network
* device and it is identified upon enumeration (re)start, so there's
* no point in trying to find network devices in other cases than the
* (re)start and hence the 'next' device can only be storage
*/
if (!dev_enum_storage(di))
/* make sure we mark there are no more devices */
di->cookie = NULL;
return 0;
}
static int API_dev_open(va_list ap)
{
struct device_info *di;
int err = 0;
/* arg is ptr to the device_info struct */
di = (struct device_info *)va_arg(ap, uintptr_t);
if (di == NULL)
return API_EINVAL;
/* Allow only one consumer of the device at a time */
if (di->state == DEV_STA_OPEN)
return API_EBUSY;
if (di->cookie == NULL)
return API_ENODEV;
if (di->type & DEV_TYP_STOR)
err = dev_open_stor(di->cookie);
else if (di->type & DEV_TYP_NET)
err = dev_open_net(di->cookie);
else
err = API_ENODEV;
if (!err)
di->state = DEV_STA_OPEN;
return err;
}
static int API_dev_close(va_list ap)
{
struct device_info *di;
int err = 0;
/* arg is ptr to the device_info struct */
di = (struct device_info *)va_arg(ap, uintptr_t);
if (di == NULL)
return API_EINVAL;
if (di->state == DEV_STA_CLOSED)
return 0;
if (di->cookie == NULL)
return API_ENODEV;
if (di->type & DEV_TYP_STOR)
err = dev_close_stor(di->cookie);
else if (di->type & DEV_TYP_NET)
err = dev_close_net(di->cookie);
else
/*
* In case of unknown device we cannot change its state, so
* only return error code
*/
err = API_ENODEV;
if (!err)
di->state = DEV_STA_CLOSED;
return err;
}
/*
* pseudo signature:
*
* int API_dev_write(
* struct device_info *di,
* void *buf,
* int *len,
* unsigned long *start
* )
*
* buf: ptr to buffer from where to get the data to send
*
* len: ptr to length to be read
* - network: len of packet to be sent (in bytes)
* - storage: # of blocks to write (can vary in size depending on define)
*
* start: ptr to start block (only used for storage devices, ignored for
* network)
*/
static int API_dev_write(va_list ap)
{
struct device_info *di;
void *buf;
lbasize_t *len_stor, act_len_stor;
lbastart_t *start;
int *len_net;
int err = 0;
/* 1. arg is ptr to the device_info struct */
di = (struct device_info *)va_arg(ap, uintptr_t);
if (di == NULL)
return API_EINVAL;
/* XXX should we check if device is open? i.e. the ->state ? */
if (di->cookie == NULL)
return API_ENODEV;
/* 2. arg is ptr to buffer from where to get data to write */
buf = (void *)va_arg(ap, uintptr_t);
if (buf == NULL)
return API_EINVAL;
if (di->type & DEV_TYP_STOR) {
/* 3. arg - ptr to var with # of blocks to write */
len_stor = (lbasize_t *)va_arg(ap, uintptr_t);
if (!len_stor)
return API_EINVAL;
if (*len_stor <= 0)
return API_EINVAL;
/* 4. arg - ptr to var with start block */
start = (lbastart_t *)va_arg(ap, uintptr_t);
act_len_stor = dev_write_stor(di->cookie, buf, *len_stor, *start);
if (act_len_stor != *len_stor) {
debugf("write @ %llu: done %llu out of %llu blocks",
(uint64_t)blk, (uint64_t)act_len_stor,
(uint64_t)len_stor);
return API_EIO;
}
} else if (di->type & DEV_TYP_NET) {
/* 3. arg points to the var with length of packet to write */
len_net = (int *)va_arg(ap, uintptr_t);
if (!len_net)
return API_EINVAL;
if (*len_net <= 0)
return API_EINVAL;
err = dev_write_net(di->cookie, buf, *len_net);
} else
err = API_ENODEV;
return err;
}
/*
* pseudo signature:
*
* int API_dev_read(
* struct device_info *di,
* void *buf,
* size_t *len,
* unsigned long *start
* size_t *act_len
* )
*
* buf: ptr to buffer where to put the read data
*
* len: ptr to length to be read
* - network: len of packet to read (in bytes)
* - storage: # of blocks to read (can vary in size depending on define)
*
* start: ptr to start block (only used for storage devices, ignored for
* network)
*
* act_len: ptr to where to put the len actually read
*/
static int API_dev_read(va_list ap)
{
struct device_info *di;
void *buf;
lbasize_t *len_stor, *act_len_stor;
lbastart_t *start;
int *len_net, *act_len_net;
/* 1. arg is ptr to the device_info struct */
di = (struct device_info *)va_arg(ap, uintptr_t);
if (di == NULL)
return API_EINVAL;
/* XXX should we check if device is open? i.e. the ->state ? */
if (di->cookie == NULL)
return API_ENODEV;
/* 2. arg is ptr to buffer from where to put the read data */
buf = (void *)va_arg(ap, uintptr_t);
if (buf == NULL)
return API_EINVAL;
if (di->type & DEV_TYP_STOR) {
/* 3. arg - ptr to var with # of blocks to read */
len_stor = (lbasize_t *)va_arg(ap, uintptr_t);
if (!len_stor)
return API_EINVAL;
if (*len_stor <= 0)
return API_EINVAL;
/* 4. arg - ptr to var with start block */
start = (lbastart_t *)va_arg(ap, uintptr_t);
/* 5. arg - ptr to var where to put the len actually read */
act_len_stor = (lbasize_t *)va_arg(ap, uintptr_t);
if (!act_len_stor)
return API_EINVAL;
*act_len_stor = dev_read_stor(di->cookie, buf, *len_stor, *start);
} else if (di->type & DEV_TYP_NET) {
/* 3. arg points to the var with length of packet to read */
len_net = (int *)va_arg(ap, uintptr_t);
if (!len_net)
return API_EINVAL;
if (*len_net <= 0)
return API_EINVAL;
/* 4. - ptr to var where to put the len actually read */
act_len_net = (int *)va_arg(ap, uintptr_t);
if (!act_len_net)
return API_EINVAL;
*act_len_net = dev_read_net(di->cookie, buf, *len_net);
} else
return API_ENODEV;
return 0;
}
/*
* pseudo signature:
*
* int API_env_get(const char *name, char **value)
*
* name: ptr to name of env var
*/
static int API_env_get(va_list ap)
{
char *name, **value;
if ((name = (char *)va_arg(ap, uintptr_t)) == NULL)
return API_EINVAL;
if ((value = (char **)va_arg(ap, uintptr_t)) == NULL)
return API_EINVAL;
*value = env_get(name);
return 0;
}
/*
* pseudo signature:
*
* int API_env_set(const char *name, const char *value)
*
* name: ptr to name of env var
*
* value: ptr to value to be set
*/
static int API_env_set(va_list ap)
{
char *name, *value;
if ((name = (char *)va_arg(ap, uintptr_t)) == NULL)
return API_EINVAL;
if ((value = (char *)va_arg(ap, uintptr_t)) == NULL)
return API_EINVAL;
env_set(name, value);
return 0;
}
/*
* pseudo signature:
*
* int API_env_enum(const char *last, char **next)
*
* last: ptr to name of env var found in last iteration
*/
static int API_env_enum(va_list ap)
{
int i, buflen;
char *last, **next, *s;
struct env_entry *match, search;
static char *var;
last = (char *)va_arg(ap, unsigned long);
if ((next = (char **)va_arg(ap, uintptr_t)) == NULL)
return API_EINVAL;
if (last == NULL) {
var = NULL;
i = 0;
} else {
var = strdup(last);
s = strchr(var, '=');
if (s != NULL)
*s = 0;
search.key = var;
i = hsearch_r(search, ENV_FIND, &match, &env_htab, 0);
if (i == 0) {
i = API_EINVAL;
goto done;
}
}
/* match the next entry after i */
i = hmatch_r("", i, &match, &env_htab);
if (i == 0)
goto done;
buflen = strlen(match->key) + strlen(match->data) + 2;
var = realloc(var, buflen);
snprintf(var, buflen, "%s=%s", match->key, match->data);
*next = var;
return 0;
done:
free(var);
var = NULL;
*next = NULL;
return i;
}
/*
* pseudo signature:
*
* int API_display_get_info(int type, struct display_info *di)
*/
static int API_display_get_info(va_list ap)
{
int type;
struct display_info *di;
type = va_arg(ap, int);
di = va_arg(ap, struct display_info *);
return display_get_info(type, di);
}
/*
* pseudo signature:
*
* int API_display_draw_bitmap(ulong bitmap, int x, int y)
*/
static int API_display_draw_bitmap(va_list ap)
{
ulong bitmap;
int x, y;
bitmap = va_arg(ap, ulong);
x = va_arg(ap, int);
y = va_arg(ap, int);
return display_draw_bitmap(bitmap, x, y);
}
/*
* pseudo signature:
*
* void API_display_clear(void)
*/
static int API_display_clear(va_list ap)
{
display_clear();
return 0;
}
static cfp_t calls_table[API_MAXCALL] = { NULL, };
/*
* The main syscall entry point - this is not reentrant, only one call is
* serviced until finished.
*
* e.g. syscall(1, int *, u_int32_t, u_int32_t, u_int32_t, u_int32_t);
*
* call: syscall number
*
* retval: points to the return value placeholder, this is the place the
* syscall puts its return value, if NULL the caller does not
* expect a return value
*
* ... syscall arguments (variable number)
*
* returns: 0 if the call not found, 1 if serviced
*/
int syscall(int call, int *retval, ...)
{
va_list ap;
int rv;
if (call < 0 || call >= calls_no) {
debugf("invalid call #%d\n", call);
return 0;
}
if (calls_table[call] == NULL) {
debugf("syscall #%d does not have a handler\n", call);
return 0;
}
va_start(ap, retval);
rv = calls_table[call](ap);
if (retval != NULL)
*retval = rv;
return 1;
}
int api_init(void)
{
struct api_signature *sig;
/* TODO put this into linker set one day... */
calls_table[API_RSVD] = NULL;
calls_table[API_GETC] = &API_getc;
calls_table[API_PUTC] = &API_putc;
calls_table[API_TSTC] = &API_tstc;
calls_table[API_PUTS] = &API_puts;
calls_table[API_RESET] = &API_reset;
calls_table[API_GET_SYS_INFO] = &API_get_sys_info;
calls_table[API_UDELAY] = &API_udelay;
calls_table[API_GET_TIMER] = &API_get_timer;
calls_table[API_DEV_ENUM] = &API_dev_enum;
calls_table[API_DEV_OPEN] = &API_dev_open;
calls_table[API_DEV_CLOSE] = &API_dev_close;
calls_table[API_DEV_READ] = &API_dev_read;
calls_table[API_DEV_WRITE] = &API_dev_write;
calls_table[API_ENV_GET] = &API_env_get;
calls_table[API_ENV_SET] = &API_env_set;
calls_table[API_ENV_ENUM] = &API_env_enum;
calls_table[API_DISPLAY_GET_INFO] = &API_display_get_info;
calls_table[API_DISPLAY_DRAW_BITMAP] = &API_display_draw_bitmap;
calls_table[API_DISPLAY_CLEAR] = &API_display_clear;
calls_no = API_MAXCALL;
debugf("API initialized with %d calls\n", calls_no);
dev_stor_init();
/*
* Produce the signature so the API consumers can find it
*/
sig = malloc(sizeof(struct api_signature));
if (sig == NULL) {
printf("API: could not allocate memory for the signature!\n");
return -ENOMEM;
}
env_set_hex("api_address", (unsigned long)sig);
debugf("API sig @ 0x%lX\n", (unsigned long)sig);
memcpy(sig->magic, API_SIG_MAGIC, 8);
sig->version = API_SIG_VERSION;
sig->syscall = &syscall;
sig->checksum = 0;
sig->checksum = crc32(0, (unsigned char *)sig,
sizeof(struct api_signature));
debugf("syscall entry: 0x%lX\n", (unsigned long)sig->syscall);
return 0;
}
void platform_set_mr(struct sys_info *si, unsigned long start, unsigned long size,
int flags)
{
int i;
if (!si->mr || !size || (flags == 0))
return;
/* find free slot */
for (i = 0; i < si->mr_no; i++)
if (si->mr[i].flags == 0) {
/* insert new mem region */
si->mr[i].start = start;
si->mr[i].size = size;
si->mr[i].flags = flags;
return;
}
}

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@@ -1,37 +0,0 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (c) 2011 The Chromium OS Authors.
*/
#include <api_public.h>
#include <log.h>
#include <linux/types.h>
/* TODO(clchiou): add support of video device */
int display_get_info(int type, struct display_info *di)
{
if (!di)
return API_EINVAL;
switch (type) {
default:
debug("%s: unsupport display device type: %d\n",
__FILE__, type);
return API_ENODEV;
}
di->type = type;
return 0;
}
int display_draw_bitmap(ulong bitmap, int x, int y)
{
if (!bitmap)
return API_EINVAL;
return API_ENODEV;
}
void display_clear(void)
{
}

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@@ -1,113 +0,0 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* (C) Copyright 2007 Semihalf
*
* Written by: Rafal Jaworowski <raj@semihalf.com>
*/
#include <config.h>
#include <net.h>
#include <linux/types.h>
#include <api_public.h>
#define DEBUG
#undef DEBUG
#ifdef DEBUG
#define debugf(fmt, args...) do { printf("%s(): ", __func__); printf(fmt, ##args); } while (0)
#else
#define debugf(fmt, args...)
#endif
#define errf(fmt, args...) do { printf("ERROR @ %s(): ", __func__); printf(fmt, ##args); } while (0)
#if defined(CONFIG_CMD_NET) && !defined(CONFIG_DM_ETH)
static int dev_valid_net(void *cookie)
{
return ((void *)eth_get_dev() == cookie) ? 1 : 0;
}
int dev_open_net(void *cookie)
{
if (!dev_valid_net(cookie))
return API_ENODEV;
if (eth_init() < 0)
return API_EIO;
return 0;
}
int dev_close_net(void *cookie)
{
if (!dev_valid_net(cookie))
return API_ENODEV;
eth_halt();
return 0;
}
/*
* There can only be one active eth interface at a time - use what is
* currently set to eth_current
*/
int dev_enum_net(struct device_info *di)
{
struct eth_device *eth_current = eth_get_dev();
di->type = DEV_TYP_NET;
di->cookie = (void *)eth_current;
if (di->cookie == NULL)
return 0;
memcpy(di->di_net.hwaddr, eth_current->enetaddr, 6);
debugf("device found, returning cookie 0x%08x\n",
(u_int32_t)di->cookie);
return 1;
}
int dev_write_net(void *cookie, void *buf, int len)
{
/* XXX verify that cookie points to a valid net device??? */
return eth_send(buf, len);
}
int dev_read_net(void *cookie, void *buf, int len)
{
/* XXX verify that cookie points to a valid net device??? */
return eth_receive(buf, len);
}
#else
int dev_open_net(void *cookie)
{
return API_ENODEV;
}
int dev_close_net(void *cookie)
{
return API_ENODEV;
}
int dev_enum_net(struct device_info *di)
{
return 0;
}
int dev_write_net(void *cookie, void *buf, int len)
{
return API_ENODEV;
}
int dev_read_net(void *cookie, void *buf, int len)
{
return API_ENODEV;
}
#endif

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@@ -1,48 +0,0 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* (C) Copyright 2007 Semihalf
*
* Written by: Rafal Jaworowski <raj@semihalf.com>
*
* This file contains routines that fetch data from PowerPC-dependent sources
* (bd_info etc.)
*/
#include <config.h>
#include <linux/types.h>
#include <api_public.h>
#include <asm/global_data.h>
#include "api_private.h"
DECLARE_GLOBAL_DATA_PTR;
/*
* Important notice: handling of individual fields MUST be kept in sync with
* include/asm-ppc/u-boot.h and include/asm-ppc/global_data.h, so any changes
* need to reflect their current state and layout of structures involved!
*/
int platform_sys_info(struct sys_info *si)
{
si->clk_bus = gd->bus_clk;
si->clk_cpu = gd->cpu_clk;
#if defined(CONFIG_MPC8xx) || defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
#define bi_bar bi_immr_base
#elif defined(CONFIG_MPC83xx)
#define bi_bar bi_immrbar
#endif
#if defined(bi_bar)
si->bar = gd->bd->bi_bar;
#undef bi_bar
#else
si->bar = 0;
#endif
platform_set_mr(si, gd->ram_base, gd->ram_size, MR_ATTR_DRAM);
platform_set_mr(si, gd->bd->bi_flashstart, gd->bd->bi_flashsize, MR_ATTR_FLASH);
return 1;
}

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@@ -1,31 +0,0 @@
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* (C) Copyright 2007 Semihalf
*
* Written by: Rafal Jaworowski <raj@semihalf.com>
*
* This file contains a routine to fetch data from the global_data structure.
*/
#include <api_public.h>
#include <asm/global_data.h>
#include "api_private.h"
DECLARE_GLOBAL_DATA_PTR;
int platform_sys_info(struct sys_info *si)
{
int i;
si->clk_bus = gd->bus_clk;
si->clk_cpu = gd->cpu_clk;
for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++)
platform_set_mr(si, gd->bd->bi_dram[i].start,
gd->bd->bi_dram[i].size, MR_ATTR_DRAM);
platform_set_mr(si, gd->ram_base, gd->ram_size, MR_ATTR_DRAM);
platform_set_mr(si, gd->bd->bi_flashstart, gd->bd->bi_flashsize, MR_ATTR_FLASH);
return 1;
}

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@@ -1,35 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* (C) Copyright 2007 Semihalf
*
* Written by: Rafal Jaworowski <raj@semihalf.com>
*/
#ifndef _API_PRIVATE_H_
#define _API_PRIVATE_H_
int api_init(void);
void platform_set_mr(struct sys_info *, unsigned long, unsigned long, int);
int platform_sys_info(struct sys_info *);
void dev_enum_reset(void);
int dev_enum_storage(struct device_info *);
int dev_enum_net(struct device_info *);
int dev_open_stor(void *);
int dev_open_net(void *);
int dev_close_stor(void *);
int dev_close_net(void *);
lbasize_t dev_read_stor(void *, void *, lbasize_t, lbastart_t);
lbasize_t dev_write_stor(void *, void *, lbasize_t, lbastart_t);
int dev_read_net(void *, void *, int);
int dev_write_net(void *, void *, int);
void dev_stor_init(void);
int display_get_info(int type, struct display_info *di);
int display_draw_bitmap(ulong bitmap, int x, int y);
void display_clear(void);
#endif /* _API_PRIVATE_H_ */

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@@ -1,358 +0,0 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* (C) Copyright 2007-2008 Semihalf
*
* Written by: Rafal Jaworowski <raj@semihalf.com>
*/
#include <config.h>
#include <api_public.h>
#include <part.h>
#include <scsi.h>
#include <linux/types.h>
#if defined(CONFIG_CMD_USB) && defined(CONFIG_USB_STORAGE)
#include <usb.h>
#endif
#define DEBUG
#undef DEBUG
#ifdef DEBUG
#define debugf(fmt, args...) do { printf("%s(): ", __func__); printf(fmt, ##args); } while (0)
#else
#define debugf(fmt, args...)
#endif
#define errf(fmt, args...) do { printf("ERROR @ %s(): ", __func__); printf(fmt, ##args); } while (0)
#define ENUM_IDE 0
#define ENUM_USB 1
#define ENUM_SCSI 2
#define ENUM_MMC 3
#define ENUM_SATA 4
#define ENUM_MAX 5
struct stor_spec {
int max_dev;
int enum_started;
int enum_ended;
int type; /* "external" type: DT_STOR_{IDE,USB,etc} */
char *name;
};
static struct stor_spec specs[ENUM_MAX] = { { 0, 0, 0, 0, NULL }, };
void dev_stor_init(void)
{
#if defined(CONFIG_IDE)
specs[ENUM_IDE].max_dev = CONFIG_SYS_IDE_MAXDEVICE;
specs[ENUM_IDE].enum_started = 0;
specs[ENUM_IDE].enum_ended = 0;
specs[ENUM_IDE].type = DEV_TYP_STOR | DT_STOR_IDE;
specs[ENUM_IDE].name = "ide";
#endif
#if defined(CONFIG_CMD_MMC)
specs[ENUM_MMC].max_dev = CONFIG_SYS_MMC_MAX_DEVICE;
specs[ENUM_MMC].enum_started = 0;
specs[ENUM_MMC].enum_ended = 0;
specs[ENUM_MMC].type = DEV_TYP_STOR | DT_STOR_MMC;
specs[ENUM_MMC].name = "mmc";
#endif
#if defined(CONFIG_SATA)
specs[ENUM_SATA].max_dev = CONFIG_SYS_SATA_MAX_DEVICE;
specs[ENUM_SATA].enum_started = 0;
specs[ENUM_SATA].enum_ended = 0;
specs[ENUM_SATA].type = DEV_TYP_STOR | DT_STOR_SATA;
specs[ENUM_SATA].name = "sata";
#endif
#if defined(CONFIG_CMD_USB) && defined(CONFIG_USB_STORAGE)
specs[ENUM_USB].max_dev = USB_MAX_STOR_DEV;
specs[ENUM_USB].enum_started = 0;
specs[ENUM_USB].enum_ended = 0;
specs[ENUM_USB].type = DEV_TYP_STOR | DT_STOR_USB;
specs[ENUM_USB].name = "usb";
#endif
}
/*
* Finds next available device in the storage group
*
* type: storage group type - ENUM_IDE, ENUM_SCSI etc.
*
* more: returns 0/1 depending if there are more devices in this group
* available (for future iterations)
*
* returns: 0/1 depending if device found in this iteration
*/
static int dev_stor_get(int type, int *more, struct device_info *di)
{
struct blk_desc *dd;
int found = 0;
int found_last = 0;
int i = 0;
/* Wasn't configured for this type, return 0 directly */
if (specs[type].name == NULL)
return 0;
if (di->cookie != NULL) {
/* Find the last device we've returned */
for (i = 0; i < specs[type].max_dev; i++) {
if (di->cookie ==
(void *)blk_get_dev(specs[type].name, i)) {
i += 1;
found_last = 1;
break;
}
}
if (!found_last)
i = 0;
}
for (; i < specs[type].max_dev; i++) {
di->cookie = (void *)blk_get_dev(specs[type].name, i);
if (di->cookie != NULL) {
found = 1;
break;
}
}
if (i == specs[type].max_dev)
*more = 0;
else
*more = 1;
if (found) {
di->type = specs[type].type;
dd = (struct blk_desc *)di->cookie;
if (dd->type == DEV_TYPE_UNKNOWN) {
debugf("device instance exists, but is not active..");
found = 0;
} else {
di->di_stor.block_count = dd->lba;
di->di_stor.block_size = dd->blksz;
}
} else {
di->cookie = NULL;
}
return found;
}
/* returns: ENUM_IDE, ENUM_USB etc. based on struct blk_desc */
static int dev_stor_type(struct blk_desc *dd)
{
int i, j;
for (i = ENUM_IDE; i < ENUM_MAX; i++)
for (j = 0; j < specs[i].max_dev; j++)
if (dd == blk_get_dev(specs[i].name, j))
return i;
return ENUM_MAX;
}
/* returns: 0/1 whether cookie points to some device in this group */
static int dev_is_stor(int type, struct device_info *di)
{
return (dev_stor_type(di->cookie) == type) ? 1 : 0;
}
static int dev_enum_stor(int type, struct device_info *di)
{
int found = 0, more = 0;
debugf("called, type %d\n", type);
/*
* Formulae for enumerating storage devices:
* 1. if cookie (hint from previous enum call) is NULL we start again
* with enumeration, so return the first available device, done.
*
* 2. if cookie is not NULL, check if it identifies some device in
* this group:
*
* 2a. if cookie is a storage device from our group (IDE, USB etc.),
* return next available (if exists) in this group
*
* 2b. if it isn't device from our group, check if such devices were
* ever enumerated before:
* - if not, return the first available device from this group
* - else return 0
*/
if (di->cookie == NULL) {
debugf("group%d - enum restart\n", type);
/*
* 1. Enumeration (re-)started: take the first available
* device, if exists
*/
found = dev_stor_get(type, &more, di);
specs[type].enum_started = 1;
} else if (dev_is_stor(type, di)) {
debugf("group%d - enum continued for the next device\n", type);
if (specs[type].enum_ended) {
debugf("group%d - nothing more to enum!\n", type);
return 0;
}
/* 2a. Attempt to take a next available device in the group */
found = dev_stor_get(type, &more, di);
} else {
if (specs[type].enum_ended) {
debugf("group %d - already enumerated, skipping\n", type);
return 0;
}
debugf("group%d - first time enum\n", type);
if (specs[type].enum_started == 0) {
/*
* 2b. If enumerating devices in this group did not
* happen before, it means the cookie pointed to a
* device from some other group (another storage
* group, or network); in this case try to take the
* first available device from our group
*/
specs[type].enum_started = 1;
/*
* Attempt to take the first device in this group:
*'first element' flag is set
*/
found = dev_stor_get(type, &more, di);
} else {
errf("group%d - out of order iteration\n", type);
found = 0;
more = 0;
}
}
/*
* If there are no more devices in this group, consider its
* enumeration finished
*/
specs[type].enum_ended = (!more) ? 1 : 0;
if (found)
debugf("device found, returning cookie 0x%08x\n",
(u_int32_t)di->cookie);
else
debugf("no device found\n");
return found;
}
void dev_enum_reset(void)
{
int i;
for (i = 0; i < ENUM_MAX; i ++) {
specs[i].enum_started = 0;
specs[i].enum_ended = 0;
}
}
int dev_enum_storage(struct device_info *di)
{
int i;
/* check: ide, usb, scsi, mmc */
for (i = ENUM_IDE; i < ENUM_MAX; i ++) {
if (dev_enum_stor(i, di))
return 1;
}
return 0;
}
static int dev_stor_is_valid(int type, struct blk_desc *dd)
{
int i;
for (i = 0; i < specs[type].max_dev; i++)
if (dd == blk_get_dev(specs[type].name, i))
if (dd->type != DEV_TYPE_UNKNOWN)
return 1;
return 0;
}
int dev_open_stor(void *cookie)
{
int type = dev_stor_type(cookie);
if (type == ENUM_MAX)
return API_ENODEV;
if (dev_stor_is_valid(type, (struct blk_desc *)cookie))
return 0;
return API_ENODEV;
}
int dev_close_stor(void *cookie)
{
/*
* Not much to do as we actually do not alter storage devices upon
* close
*/
return 0;
}
lbasize_t dev_read_stor(void *cookie, void *buf, lbasize_t len, lbastart_t start)
{
int type;
struct blk_desc *dd = (struct blk_desc *)cookie;
if ((type = dev_stor_type(dd)) == ENUM_MAX)
return 0;
if (!dev_stor_is_valid(type, dd))
return 0;
#ifdef CONFIG_BLK
return blk_dread(dd, start, len, buf);
#else
if ((dd->block_read) == NULL) {
debugf("no block_read() for device 0x%08x\n", cookie);
return 0;
}
return dd->block_read(dd, start, len, buf);
#endif /* defined(CONFIG_BLK) */
}
lbasize_t dev_write_stor(void *cookie, void *buf, lbasize_t len, lbastart_t start)
{
struct blk_desc *dd = (struct blk_desc *)cookie;
int type = dev_stor_type(dd);
if (type == ENUM_MAX)
return 0;
if (!dev_stor_is_valid(type, dd))
return 0;
#ifdef CONFIG_BLK
return blk_dwrite(dd, start, len, buf);
#else
if (dd->block_write == NULL) {
debugf("no block_write() for device 0x%08x\n", cookie);
return 0;
}
return dd->block_write(dd, start, len, buf);
#endif /* defined(CONFIG_BLK) */
}

1
arch/.gitignore vendored
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@@ -1 +0,0 @@
/*/include/asm/arch

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@@ -1,608 +0,0 @@
config ARCH_MAP_SYSMEM
depends on SANDBOX
def_bool y
config CREATE_ARCH_SYMLINK
bool
config HAVE_ARCH_IOREMAP
bool
config HAVE_SETJMP
bool
help
The architecture supports setjmp() and longjmp().
config HAVE_INITJMP
bool
depends on HAVE_SETJMP
help
The architecture supports initjmp(), a non-standard companion to
setjmp() and longjmp().
config SUPPORT_BIG_ENDIAN
bool
config SUPPORT_LITTLE_ENDIAN
bool
default y if !SUPPORT_BIG_ENDIAN
config SYS_CACHE_SHIFT_4
bool
config SYS_CACHE_SHIFT_5
bool
config SYS_CACHE_SHIFT_6
bool
config SYS_CACHE_SHIFT_7
bool
config 32BIT
bool
config 64BIT
bool
help
Indicates that U-Boot proper will be built for a 64 bit
architecture.
config SPL_64BIT
bool
help
Indicates that SPL will be built for a 64 bit architecture.
config SYS_CACHELINE_SIZE
int
default 128 if SYS_CACHE_SHIFT_7
default 64 if SYS_CACHE_SHIFT_6
default 32 if SYS_CACHE_SHIFT_5
default 16 if SYS_CACHE_SHIFT_4
# Fall-back for MIPS and RISC-V
default 64 if RISCV
default 32 if MIPS
config SYS_DTC_PAD_BYTES
int "Size in bytes to pad device tree blob"
default 32768 if X86 && EFI_APP
default 4096 if ARC || ARM64 || M68K || MICROBLAZE || NIOS2 \
|| RISCV || SANDBOX || X86
default 0
config LINKER_LIST_ALIGN
int
default 32 if SANDBOX
default 8 if ARM64 || X86
default 4
help
Force the each linker list to be aligned to this boundary. This
is required if ll_entry_get() is used, since otherwise the linker
may add padding into the table, thus breaking it.
See linker_lists.rst for full details.
choice
prompt "Architecture select"
default SANDBOX
config ARC
bool "ARC architecture"
select ARC_TIMER
select CLK
select DM
select HAVE_PRIVATE_LIBGCC
select SUPPORT_OF_CONTROL
select SYS_CACHE_SHIFT_7
select TIMER
select SUPPORT_BIG_ENDIAN
select SUPPORT_LITTLE_ENDIAN
select SYS_BIG_ENDIAN if CPU_BIG_ENDIAN
select SYS_LITTLE_ENDIAN if !CPU_BIG_ENDIAN
config ARM
bool "ARM architecture"
select HAVE_SETJMP
select HAVE_INITJMP
select ARCH_SUPPORTS_LTO
select CREATE_ARCH_SYMLINK
select HAVE_PRIVATE_LIBGCC if !ARM64
select SUPPORT_ACPI
select SUPPORT_LITTLE_ENDIAN
select SUPPORT_OF_CONTROL
config M68K
bool "M68000 architecture"
select HAVE_PRIVATE_LIBGCC
select USE_PRIVATE_LIBGCC
select SYS_BOOT_GET_CMDLINE
select SYS_BOOT_GET_KBD
select SYS_CACHE_SHIFT_4
select SUPPORT_BIG_ENDIAN
select SUPPORT_OF_CONTROL
config MICROBLAZE
bool "MicroBlaze architecture"
select SUPPORT_BIG_ENDIAN
select SUPPORT_LITTLE_ENDIAN
select SUPPORT_OF_CONTROL
imply CMD_TIMER
imply SPL_REGMAP if SPL
imply SPL_TIMER if SPL
imply TIMER
imply XILINX_TIMER
config MIPS
bool "MIPS architecture"
select HAVE_ARCH_IOREMAP
select HAVE_PRIVATE_LIBGCC
select SUPPORT_OF_CONTROL
select SPL_SEPARATE_BSS if SPL
config NIOS2
bool "Nios II architecture"
select CPU
select DM
select DM_EVENT
select OF_CONTROL
select SUPPORT_LITTLE_ENDIAN
select SUPPORT_OF_CONTROL
imply CMD_DM
config PPC
bool "PowerPC architecture"
select HAVE_PRIVATE_LIBGCC
select SUPPORT_BIG_ENDIAN
select SUPPORT_OF_CONTROL
select SYS_BOOT_GET_CMDLINE
select SYS_BOOT_GET_KBD
config RISCV
bool "RISC-V architecture"
select CREATE_ARCH_SYMLINK
select HAVE_PRIVATE_LIBGCC if 64BIT
select HAVE_SETJMP
select HAVE_INITJMP
select SUPPORT_ACPI
select SUPPORT_LITTLE_ENDIAN
select SUPPORT_OF_CONTROL
select OF_CONTROL
select DM
select DM_EVENT
imply SPL_SEPARATE_BSS if SPL
imply DM_SERIAL
imply DM_MMC
imply DM_SPI
imply DM_SPI_FLASH
imply BLK
imply CLK
imply MTD
imply TIMER
imply CMD_DM
imply SPL_DM
imply SPL_OF_CONTROL
imply SPL_LIBCOMMON_SUPPORT
imply SPL_LIBGENERIC_SUPPORT
imply SPL_SERIAL
imply SPL_TIMER
config SANDBOX
bool "Sandbox"
select HAVE_SETJMP
select HAVE_INITJMP
select ARCH_SUPPORTS_LTO
select AXI
select BOARD_LATE_INIT
select BZIP2
select CMD_POWEROFF if CMDLINE
select DM
select DM_EVENT
select DM_FUZZING_ENGINE
select DM_GPIO
select DM_I2C
select DM_KEYBOARD
select DM_MAILBOX
select DM_RESET
select DM_SERIAL
select DM_SPI
select DM_SPI_FLASH
select GPIO
select GZIP_COMPRESSED
select I2C
select LZO
select MMC
select MTD
select OF_BOARD_SETUP
select OF_CONTROL
select PCI_ENDPOINT
select SANDBOX_RESET
select SPI
select SERIAL
select SUPPORT_OF_CONTROL
select SUPPORT_BIG_ENDIAN
select SUPPORT_LITTLE_ENDIAN
select SYSRESET
select SYSRESET_CMD_RESET
select SYSRESET_CMD_POWEROFF if SYSRESET && CMD_POWEROFF
select SYS_CACHE_SHIFT_4
select IRQ
select SUPPORT_EXTENSION_SCAN if CMDLINE
select SUPPORT_ACPI
select TIMER
select SPL_TIMER if SPL
select TPL_TIMER if TPL
select VPL_TIMER if VPL
imply BITREVERSE
select BLOBLIST
imply LTO
imply CMD_BOOTEFI_SELFTEST
imply CMD_DM
imply CMD_EXCEPTION
imply CMD_GETTIME
imply CMD_HASH
imply CMD_IO
imply CMD_IOTRACE
imply CMD_LZMADEC
imply CMD_SF
imply CMD_SF_TEST
imply CRC32_VERIFY
imply FAT_WRITE
imply FIRMWARE
imply FUZZING_ENGINE_SANDBOX
imply HASH_VERIFY
imply LZMA
imply TEE
imply AVB_VERIFY
imply LIBAVB
imply CMD_AVB
imply PARTITION_TYPE_GUID if EFI_PARTITION
imply SCP03
imply CMD_SCP03
imply UDP_FUNCTION_FASTBOOT
imply VIRTIO_MMIO
imply VIRTIO_PCI
imply VIRTIO_SANDBOX
# Re-enable this when fully implemented
# imply VIRTIO_BLK
imply VIRTIO_NET
imply SOUND
imply PCI_SANDBOX_EP
imply PCH
imply PHYLIB
imply DM_MDIO
imply DM_MDIO_MUX
imply ACPI
imply ACPI_PMC
imply ACPI_PMC_SANDBOX
imply CMD_PMC
imply CMD_CLONE
imply SILENT_CONSOLE
imply BOOTARGS_SUBST
imply PHY_FIXED
imply DM_DSA
imply CMD_EXTENSION
imply PHYSMEM
imply GENERATE_ACPI_TABLE
imply BINMAN
imply CMD_MBR
imply CMD_MMC
imply BOOTSTD_DEFAULTS if BOOTSTD_FULL && CMDLINE
imply BOOTMETH_DISTRO if BOOTSTD_FULL && CMDLINE
imply CMD_SYSBOOT if BOOTSTD_FULL
config SH
bool "SuperH architecture"
select SUPPORT_LITTLE_ENDIAN
select HAVE_PRIVATE_LIBGCC
select SUPPORT_OF_CONTROL
config X86
bool "x86 architecture"
select AHCI
select HAVE_SETJMP
select SUPPORT_SPL
select SUPPORT_TPL
select SUPPORT_LITTLE_ENDIAN
select CREATE_ARCH_SYMLINK
select DM
select HAVE_ARCH_IOMAP
select HAVE_PRIVATE_LIBGCC
select LMB_ARCH_MEM_MAP
select OF_CONTROL
select PCI
select SUPPORT_ACPI
select SUPPORT_OF_CONTROL
select SYS_CACHE_SHIFT_6
select TIMER
select USE_PRIVATE_LIBGCC
select X86_TSC_TIMER
select IRQ
imply HAS_ROM if X86_RESET_VECTOR
imply BLK
imply CMD_DM
imply CMD_FPGA_LOADMK
imply CMD_GETTIME
imply CMD_IO
imply CMD_IRQ
imply CMD_PCI
imply CMD_SF
imply CMD_SF_TEST
imply DM_GPIO
imply DM_KEYBOARD
imply DM_MMC
imply DM_RTC
imply SCSI
imply DM_SERIAL
imply MTD
imply DM_SPI
imply DM_SPI_FLASH
imply DM_USB
imply LAST_STAGE_INIT
imply VIDEO
imply SYSRESET
imply SPL_SYSRESET
imply SYSRESET_X86
imply USB_ETHER_ASIX
imply USB_ETHER_SMSC95XX
imply USB_HOST_ETHER
imply PCH
imply PHYSMEM
imply RTC_MC146818
imply ACPI
imply ACPIGEN if !QEMU && !EFI_APP
imply SYSINFO if GENERATE_SMBIOS_TABLE
imply SYSINFO_SMBIOS if GENERATE_SMBIOS_TABLE
imply TIMESTAMP
# Thing to enable for when SPL/TPL are enabled: SPL
imply SPL_DM
imply SPL_OF_LIBFDT
imply SPL_DRIVERS_MISC
imply SPL_GPIO
imply SPL_PINCTRL
imply SPL_LIBCOMMON_SUPPORT
imply SPL_LIBGENERIC_SUPPORT
imply SPL_SERIAL
imply SPL_SPI_FLASH_SUPPORT
imply SPL_SPI
imply SPL_OF_CONTROL
imply SPL_TIMER
imply SPL_REGMAP
imply SPL_SYSCON
# TPL
imply TPL_DM
imply TPL_DRIVERS_MISC
imply TPL_GPIO
imply TPL_PINCTRL
imply TPL_LIBCOMMON_SUPPORT
imply TPL_LIBGENERIC_SUPPORT
imply TPL_SERIAL
imply TPL_OF_CONTROL
imply TPL_TIMER
imply TPL_REGMAP
imply TPL_SYSCON
config XTENSA
bool "Xtensa architecture"
select CREATE_ARCH_SYMLINK
select SUPPORT_LITTLE_ENDIAN
select SUPPORT_OF_CONTROL
endchoice
config SYS_ARCH
string
help
This option should contain the architecture name to build the
appropriate arch/<CONFIG_SYS_ARCH> directory.
All the architectures should specify this option correctly.
config SYS_CPU
string
help
This option should contain the CPU name to build the correct
arch/<CONFIG_SYS_ARCH>/cpu/<CONFIG_SYS_CPU> directory.
This is optional. For those targets without the CPU directory,
leave this option empty.
config SYS_SOC
string
help
This option should contain the SoC name to build the directory
arch/<CONFIG_SYS_ARCH>/cpu/<CONFIG_SYS_CPU>/<CONFIG_SYS_SOC>.
This is optional. For those targets without the SoC directory,
leave this option empty.
config SYS_VENDOR
string
help
This option should contain the vendor name of the target board.
If it is set and
board/<CONFIG_SYS_VENDOR>/common/Makefile exists, the vendor common
directory is compiled.
If CONFIG_SYS_BOARD is also set, the sources under
board/<CONFIG_SYS_VENDOR>/<CONFIG_SYS_BOARD> directory are compiled.
This is optional. For those targets without the vendor directory,
leave this option empty.
config SYS_BOARD
string
help
This option should contain the name of the target board.
If it is set, either board/<CONFIG_SYS_VENDOR>/<CONFIG_SYS_BOARD>
or board/<CONFIG_SYS_BOARD> directory is compiled depending on
whether CONFIG_SYS_VENDOR is set or not.
This is optional. For those targets without the board directory,
leave this option empty.
config SYS_CONFIG_NAME
string "Board header file" if ARCH_MESON || ARCH_VERSAL || \
ARCH_VERSAL_NET || ARCH_ZYNQ || ARCH_ZYNQMP || \
ARCH_ZYNQMP_R5 || MICROBLAZE || NIOS2
default "meson64" if ARCH_MESON
default "microblaze-generic" if MICROBLAZE
default "xilinx_versal" if ARCH_VERSAL
default "xilinx_versal_net" if ARCH_VERSAL_NET
default "xilinx_zynqmp" if ARCH_ZYNQMP
default "xilinx_zynqmp_r5" if ARCH_ZYNQMP_R5
default "zynq-common" if ARCH_ZYNQ
help
This option should contain the base name of board header file.
The header file include/configs/<CONFIG_SYS_CONFIG_NAME>.h
should be included from include/config.h.
config SYS_DISABLE_DCACHE_OPS
bool
help
This option disables dcache flush and dcache invalidation
operations. For example, on coherent systems where cache
operatios are not required, enable this option to avoid them.
Note that, its up to the individual architectures to implement
this functionality.
config SYS_IMMR
hex "Address for the Internal Memory-Mapped Registers (IMMR) window"
depends on PPC || FSL_LSCH2 || FSL_LSCH3 || ARCH_LS1021A
default 0xFF000000 if MPC8xx
default 0xF0000000 if ARCH_MPC8313
default 0xE0000000 if MPC83xx && !ARCH_MPC8313
default 0x01000000 if ARCH_LS1021A || FSL_LSCH2 || FSL_LSCH3
default 0xFFE00000 if ARCH_P1010 || ARCH_P1011 || ARCH_P1020 || \
ARCH_P1021 || ARCH_P1024 || ARCH_P1025 || \
ARCH_P2020
default SYS_CCSRBAR_DEFAULT
help
Address for the Internal Memory-Mapped Registers (IMMR) window used
to configure the features of many Freescale / NXP SoCs.
config MONITOR_IS_IN_RAM
bool "U-Boot is loaded in to RAM by a pre-loader"
depends on M68K || NIOS2
menu "Skipping low level initialization functions"
depends on ARM || MIPS || RISCV
config SKIP_LOWLEVEL_INIT
bool "Skip calls to certain low level initialization functions"
help
If enabled, then certain low level initializations (like setting up
the memory controller) are omitted and/or U-Boot does not relocate
itself into RAM.
Normally this variable MUST NOT be defined. The only exception is
when U-Boot is loaded (to RAM) by some other boot loader or by a
debugger which performs these initializations itself.
config SPL_SKIP_LOWLEVEL_INIT
bool "Skip calls to certain low level initialization functions in SPL"
depends on SPL
help
If enabled, then certain low level initializations (like setting up
the memory controller) are omitted and/or U-Boot does not relocate
itself into RAM.
Normally this variable MUST NOT be defined. The only exception is
when U-Boot is loaded (to RAM) by some other boot loader or by a
debugger which performs these initializations itself.
config TPL_SKIP_LOWLEVEL_INIT
bool "Skip calls to certain low level initialization functions in TPL"
depends on SPL && ARM
help
If enabled, then certain low level initializations (like setting up
the memory controller) are omitted and/or U-Boot does not relocate
itself into RAM.
Normally this variable MUST NOT be defined. The only exception is
when U-Boot is loaded (to RAM) by some other boot loader or by a
debugger which performs these initializations itself.
config SKIP_LOWLEVEL_INIT_ONLY
bool "Skip call to lowlevel_init during early boot ONLY"
depends on ARM
help
This allows just the call to lowlevel_init() to be skipped. The
normal CP15 init (such as enabling the instruction cache) is still
performed.
config SPL_SKIP_LOWLEVEL_INIT_ONLY
bool "Skip call to lowlevel_init during early SPL boot ONLY"
depends on SPL && ARM
help
This allows just the call to lowlevel_init() to be skipped. The
normal CP15 init (such as enabling the instruction cache) is still
performed.
config TPL_SKIP_LOWLEVEL_INIT_ONLY
bool "Skip call to lowlevel_init during early TPL boot ONLY"
depends on TPL && ARM
help
This allows just the call to lowlevel_init() to be skipped. The
normal CP15 init (such as enabling the instruction cache) is still
performed.
endmenu
config SYS_HAS_NONCACHED_MEMORY
bool "Enable reserving a non-cached memory area for drivers"
depends on (ARM || MIPS) && (RTL8169 || MEDIATEK_ETH)
help
This is useful for drivers that would otherwise require a lot of
explicit cache maintenance. For some drivers it's also impossible to
properly maintain the cache. For example if the regions that need to
be flushed are not a multiple of the cache-line size, *and* padding
cannot be allocated between the regions to align them (i.e. if the
HW requires a contiguous array of regions, and the size of each
region is not cache-aligned), then a flush of one region may result
in overwriting data that hardware has written to another region in
the same cache-line. This can happen for example in network drivers
where descriptors for buffers are typically smaller than the CPU
cache-line (e.g. 16 bytes vs. 32 or 64 bytes).
config SYS_NONCACHED_MEMORY
hex "Size in bytes of the non-cached memory area"
depends on SYS_HAS_NONCACHED_MEMORY
default 0x100000
help
Size of non-cached memory area. This area of memory will be typically
located right below the malloc() area and mapped uncached in the MMU.
source "arch/arc/Kconfig"
source "arch/arm/Kconfig"
source "arch/m68k/Kconfig"
source "arch/microblaze/Kconfig"
source "arch/mips/Kconfig"
source "arch/nios2/Kconfig"
source "arch/powerpc/Kconfig"
source "arch/sandbox/Kconfig"
source "arch/sh/Kconfig"
source "arch/x86/Kconfig"
source "arch/xtensa/Kconfig"
source "arch/riscv/Kconfig"
if ARM || M68K || PPC
source "arch/Kconfig.nxp"
endif
source "board/keymile/Kconfig"
choice
prompt "Endianness selection"
default SYS_BIG_ENDIAN if MIPS || MICROBLAZE
default SYS_LITTLE_ENDIAN
help
Some boards can be configured for either little or big endian
byte order. These modes require different U-Boot images. In general there
is one preferred byteorder for a particular system but some systems are
just as commonly used in the one or the other endianness.
config SYS_BIG_ENDIAN
bool "Big endian"
depends on SUPPORT_BIG_ENDIAN
config SYS_LITTLE_ENDIAN
bool "Little endian"
depends on SUPPORT_LITTLE_ENDIAN
endchoice

View File

@@ -1,320 +0,0 @@
menu "Functionality shared between NXP SoCs"
config FSL_TRUST_ARCH_v1
bool
config NXP_ESBC
bool "NXP ESBC (secure boot) functionality"
select FSL_TRUST_ARCH_v1 if ARCH_P3041 || ARCH_P4080 || \
ARCH_P5040 || ARCH_P2041
help
Enable Freescale Secure Boot feature. Normally selected by defconfig.
If unsure, do not change.
menu "Chain of trust / secure boot options"
depends on !FIT_SIGNATURE && NXP_ESBC
config CHAIN_OF_TRUST
select FSL_CAAM
select ARCH_MISC_INIT
select FSL_ISBC_KEY_EXT if (ARM || FSL_CORENET) && !SYS_RAMBOOT
select FSL_SEC_MON
select SPL_BOARD_INIT if (ARM && SPL)
select SPL_HASH if (ARM && SPL)
select SHA_HW_ACCEL
select SHA_PROG_HW_ACCEL
select ENV_IS_NOWHERE
select SYS_CPC_REINIT_F if MPC85xx && !SYS_RAMBOOT
select CMD_EXT4 if ARM
select CMD_EXT4_WRITE if ARM
imply CMD_BLOB
imply CMD_HASH if ARM
def_bool y
config CMD_ESBC_VALIDATE
bool "Enable the 'esbc_validate' and 'esbc_halt' commands"
default y
help
This option enables two commands used for secure booting:
esbc_validate - validate signature using RSA verification
esbc_halt - put the core in spin loop (Secure Boot Only)
config ESBC_HDR_LS
bool
config ESBC_ADDR_64BIT
def_bool y
depends on FSL_LAYERSCAPE
help
For Layerscape based platforms, ESBC image Address in Header is 64bit.
config FSL_ISBC_KEY_EXT
bool
help
The key used for verification of next level images is picked up from
an Extension Table which has been verified by the ISBC (Internal
Secure boot Code) in boot ROM of the SoC. The feature is only
applicable in case of NOR boot and is not applicable in case of
RAMBOOT (NAND, SD, SPI). For Layerscape, this feature is available
for all device if IE Table is copied to XIP memory Also, for
Layerscape, ISBC doesn't verify this table.
config SYS_FSL_SFP_BE
def_bool y
depends on PPC || FSL_LSCH2 || ARCH_LS1021A
config SYS_FSL_SFP_LE
def_bool y
depends on !SYS_FSL_SFP_BE
choice
prompt "SFP IP revision"
default SYS_FSL_SFP_VER_3_0 if PPC
default SYS_FSL_SFP_VER_3_4
config SYS_FSL_SFP_VER_3_0
bool "SFP version 3.0"
config SYS_FSL_SFP_VER_3_2
bool "SFP version 3.2"
config SYS_FSL_SFP_VER_3_4
bool "SFP version 3.4"
endchoice
config FSL_SEC_MON
bool
help
Freescale Security Monitor block is responsible for monitoring
system states.
Security Monitor can be transitioned on any security failures,
like software violations or hardware security violations.
choice
prompt "Security monitor interaction endianess"
depends on FSL_SEC_MON
default SYS_FSL_SEC_MON_BE if PPC
default SYS_FSL_SEC_MON_LE
config SYS_FSL_SEC_MON_LE
bool "Security monitor interactions are little endian"
config SYS_FSL_SEC_MON_BE
bool "Security monitor interactions are big endian"
endchoice
config SPL_UBOOT_KEY_HASH
string "Non-SRK key hash for U-Boot public/private key pair"
depends on SPL
default ""
help
Set the key hash for U-Boot here if public/private key pair used to
sign U-Boot are different from the SRK hash put in the fuse. Example
of a key hash is
41066b564c6ffcef40ccbc1e0a5d0d519604000c785d97bbefd25e4d288d1c8b.
Otherwise leave this empty.
if PPC
config BOOTSCRIPT_COPY_RAM
bool "Secure boot copies boot script to RAM"
help
On systems that support chain of trust booting, a number of addresses
are required to set variables that are used in the copying and then
verification of different parts of the system. If enabled, the subsequent
options are for what location to use in each step.
config BS_ADDR_DEVICE
hex "Address in RAM for bs_device"
depends on BOOTSCRIPT_COPY_RAM
config BS_SIZE
hex "The size of bs_size which is the amount read from bs_device"
depends on BOOTSCRIPT_COPY_RAM
config BS_ADDR_RAM
hex "Address in RAM for bs_ram"
depends on BOOTSCRIPT_COPY_RAM
config BS_HDR_ADDR_DEVICE
hex "Address in RAM for bs_hdr_device"
depends on BOOTSCRIPT_COPY_RAM
config BS_HDR_SIZE
hex "The size of bs_hdr_size which is the amount read from bs_hdr_device"
depends on BOOTSCRIPT_COPY_RAM
config BS_HDR_ADDR_RAM
hex "Address in RAM for bs_hdr_ram"
depends on BOOTSCRIPT_COPY_RAM
config BOOTSCRIPT_HDR_ADDR
hex "CONFIG_BOOTSCRIPT_HDR_ADDR"
default BS_ADDR_RAM if BOOTSCRIPT_COPY_RAM
endif
config SYS_FSL_SRK_LE
def_bool y
depends on ARM
config KEY_REVOCATION
def_bool y
endmenu
config DEEP_SLEEP
bool "Enable SoC deep sleep feature"
depends on ARCH_T1024 || ARCH_T1040 || ARCH_T1042 || ARCH_LS1021A
default y
help
Indicates this SoC supports deep sleep feature. If deep sleep is
supported, core will start to execute uboot when wakes up.
config LAYERSCAPE_NS_ACCESS
bool "Layerscape non-secure access support"
depends on ARCH_LS1021A || FSL_LSCH2
config PCIE1
bool "PCIe controller #1"
depends on LAYERSCAPE_NS_ACCESS || PPC
config PCIE2
bool "PCIe controller #2"
depends on LAYERSCAPE_NS_ACCESS || PPC
config PCIE3
bool "PCIe controller #3"
depends on LAYERSCAPE_NS_ACCESS || PPC
config PCIE4
bool "PCIe controller #4"
depends on LAYERSCAPE_NS_ACCESS || PPC
config FSL_USE_PCA9547_MUX
bool "Enable PCA9547 I2C Mux on Freescale boards"
depends on PPC || ARCH_LS1021A || FSL_LSCH2 || FSL_LSCH3
help
This option enables the PCA9547 I2C mux on Freescale boards.
config VID
bool "Enable Freescale VID"
depends on (PPC || ARCH_LS1021A || FSL_LSCH2 || FSL_LSCH3) && (I2C || DM_I2C)
help
This option enables setting core voltage based on individual
values saved in SoC fuses.
config SPL_VID
bool "Enable Freescale VID in SPL"
depends on (PPC || ARCH_LS1021A || FSL_LSCH2 || FSL_LSCH3) && (SPL_I2C || DM_SPL_I2C)
help
This option enables setting core voltage based on individual
values saved in SoC fuses, in SPL.
if VID || SPL_VID
config VID_FLS_ENV
string "Environment variable for overriding VDD"
help
This option allows for specifying the environment variable
to check to override VDD information.
config VOL_MONITOR_INA220
bool "Enable the INA220 voltage monitor read"
help
This option enables INA220 voltage monitor read
functionality. It is used by the common VID driver.
config VOL_MONITOR_IR36021_READ
bool "Enable the IR36021 voltage monitor read"
help
This option enables IR36021 voltage monitor read
functionality. It is used by the common VID driver.
config VOL_MONITOR_IR36021_SET
bool "Enable the IR36021 voltage monitor set"
help
This option enables IR36021 voltage monitor set
functionality. It is used by the common VID driver.
config VOL_MONITOR_LTC3882_READ
bool "Enable the LTC3882 voltage monitor read"
help
This option enables LTC3882 voltage monitor read
functionality. It is used by the common VID driver.
config VOL_MONITOR_LTC3882_SET
bool "Enable the LTC3882 voltage monitor set"
help
This option enables LTC3882 voltage monitor set
functionality. It is used by the common VID driver.
config VOL_MONITOR_ISL68233_READ
bool "Enable the ISL68233 voltage monitor read"
help
This option enables ISL68233 voltage monitor read
functionality. It is used by the common VID driver.
config VOL_MONITOR_ISL68233_SET
bool "Enable the ISL68233 voltage monitor set"
help
This option enables ISL68233 voltage monitor set
functionality. It is used by the common VID driver.
endif
config SYS_FSL_NUM_CC_PLLS
int "Number of clock control PLLs"
depends on MPC85xx || FSL_LSCH2 || FSL_LSCH3 || ARCH_LS1021A || ARCH_LS1028A
default 2 if ARCH_LS1021A || ARCH_LS1028A || FSL_LSCH2
default 6 if FSL_LSCH3 || MPC85xx
config SYS_FSL_ESDHC_BE
bool
config SYS_FSL_IFC_BE
bool
config SYS_FSL_IFC_BANK_COUNT
int "Maximum banks of Integrated flash controller"
depends on ARCH_LS1043A || ARCH_LS1046A || ARCH_LS2080A || \
ARCH_LS1088A || ARCH_LS1021A || ARCH_B4860 || ARCH_B4420 || \
ARCH_T4240 || ARCH_T1040 || ARCH_T1042 || ARCH_T1024 || \
ARCH_T2080 || ARCH_C29X || ARCH_P1010 || ARCH_BSC9131 || \
ARCH_BSC9132
default 3 if ARCH_BSC9131 || ARCH_BSC9132
default 4 if ARCH_LS1043A || ARCH_LS1046A || ARCH_B4860 || \
ARCH_B4420 || ARCH_P1010
default 8 if ARCH_LS2080A || ARCH_LS1088A || ARCH_LS1021A || \
ARCH_T4240 || ARCH_T1040 || ARCH_T1042 || \
ARCH_T1024 || ARCH_T2080 || ARCH_C29X
config FSL_QIXIS
bool "Enable QIXIS support"
depends on PPC || ARCH_LS1021A || FSL_LSCH2 || FSL_LSCH3
config QIXIS_I2C_ACCESS
bool "Access to QIXIS is over i2c"
depends on FSL_QIXIS
default y
config HAS_FSL_DR_USB
def_bool y
depends on USB_EHCI_HCD && PPC
config SYS_DPAA_FMAN
bool
config SYS_FSL_SRDS_1
bool
config SYS_FSL_SRDS_2
bool
config SYS_HAS_SERDES
bool
endmenu

View File

@@ -1,193 +0,0 @@
menu "ARC architecture"
depends on ARC
config SYS_ARCH
default "arc"
config SYS_CPU
default "arcv1" if ISA_ARCOMPACT
default "arcv2" if ISA_ARCV2
choice
prompt "ARC Instruction Set"
default ISA_ARCOMPACT
config ISA_ARCOMPACT
bool "ARCompact ISA"
help
The original ARC ISA of ARC600/700 cores
config ISA_ARCV2
bool "ARC ISA v2"
help
ISA for the Next Generation ARC-HS cores
endchoice
choice
prompt "CPU selection"
default CPU_ARC770D if ISA_ARCOMPACT
default CPU_ARCHS38 if ISA_ARCV2
config CPU_ARC750D
bool "ARC 750D"
depends on ISA_ARCOMPACT
select ARC_MMU_V2
help
Choose this option to build an U-Boot for ARC750D CPU.
config CPU_ARC770D
bool "ARC 770D"
depends on ISA_ARCOMPACT
select ARC_MMU_V3
help
Choose this option to build an U-Boot for ARC770D CPU.
config CPU_ARCEM6
bool "ARC EM6"
depends on ISA_ARCV2
select ARC_MMU_ABSENT
help
Next Generation ARC Core based on ISA-v2 ISA without MMU.
config CPU_ARCHS36
bool "ARC HS36"
depends on ISA_ARCV2
select ARC_MMU_ABSENT
help
Next Generation ARC Core based on ISA-v2 ISA without MMU.
config CPU_ARCHS38
bool "ARC HS38"
depends on ISA_ARCV2
select ARC_MMU_V4
help
Next Generation ARC Core based on ISA-v2 ISA with MMU.
endchoice
choice
prompt "MMU Version"
default ARC_MMU_V3 if CPU_ARC770D
default ARC_MMU_V2 if CPU_ARC750D
default ARC_MMU_ABSENT if CPU_ARCEM6
default ARC_MMU_ABSENT if CPU_ARCHS36
default ARC_MMU_V4 if CPU_ARCHS38
config ARC_MMU_ABSENT
bool "No MMU"
help
No MMU
config ARC_MMU_V2
bool "MMU v2"
depends on CPU_ARC750D
help
Fixed the deficiency of v1 - possible thrashing in memcpy sceanrio
when 2 D-TLB and 1 I-TLB entries index into same 2way set.
config ARC_MMU_V3
bool "MMU v3"
depends on CPU_ARC770D
help
Introduced with ARC700 4.10: New Features
Variable Page size (1k-16k), var JTLB size 128 x (2 or 4)
Shared Address Spaces (SASID)
config ARC_MMU_V4
bool "MMU v4"
depends on CPU_ARCHS38
help
Introduced as a part of ARC HS38 release.
endchoice
config ARC_MMU_VER
int
default 0 if ARC_MMU_ABSENT
default 2 if ARC_MMU_V2
default 3 if ARC_MMU_V3
default 4 if ARC_MMU_V4
config CPU_BIG_ENDIAN
bool "Enable Big Endian Mode"
help
Build kernel for Big Endian Mode of ARC CPU
config SYS_ICACHE_OFF
bool "Do not enable icache"
help
Do not enable instruction cache in U-Boot.
config SPL_SYS_ICACHE_OFF
bool "Do not enable icache in SPL"
depends on SPL
default SYS_ICACHE_OFF
help
Do not enable instruction cache in SPL.
config SYS_DCACHE_OFF
bool "Do not enable dcache"
help
Do not enable data cache in U-Boot.
config SPL_SYS_DCACHE_OFF
bool "Do not enable dcache in SPL"
depends on SPL
default SYS_DCACHE_OFF
help
Do not enable data cache in SPL.
menuconfig ARC_DBG
bool "ARC debugging"
if ARC_DBG
config ARC_DBG_IOC_ENABLE
bool "Enable IO coherency unit"
depends on CPU_ARCHS38
help
Enable IO coherency unit to debug problems with caches and
DMA peripherals.
NOTE: as of today linux will not work properly if this option
is enabled in u-boot!
endif
choice
prompt "Target select"
default TARGET_AXS103
config TARGET_TB100
bool "Support tb100"
config TARGET_NSIM
bool "Support ARC simulation & prototyping platforms"
config TARGET_AXS101
bool "Support Synopsys Designware SDP board AXS101"
config TARGET_AXS103
bool "Support Synopsys Designware SDP board AXS103"
config TARGET_EMSDP
bool "Synopsys EM Software Development Platform"
select CPU_ARCEM6
config TARGET_HSDK
bool "Support Synopsys HSDK or HSDK-4xD board"
config TARGET_IOT_DEVKIT
bool "Synopsys Brite IoT Development kit"
select CPU_ARCEM6
endchoice
source "board/abilis/tb100/Kconfig"
source "board/synopsys/axs10x/Kconfig"
source "board/synopsys/emsdp/Kconfig"
source "board/synopsys/hsdk/Kconfig"
source "board/synopsys/iot_devkit/Kconfig"
source "board/synopsys/nsim/Kconfig"
endmenu

View File

@@ -1,19 +0,0 @@
# SPDX-License-Identifier: GPL-2.0+
libs-y += arch/arc/cpu/$(CPU)/
libs-y += arch/arc/lib/
# MetaWare debugger doesn't support PIE (position-independent executable)
# so the only way to load U-Boot in MDB is to fake it by:
# 1. Reset PIE flag in ELF header
# 2. Strip all debug information from elf
ifdef CONFIG_SYS_LITTLE_ENDIAN
EXEC_TYPE_OFFSET=16
else
EXEC_TYPE_OFFSET=17
endif
mdbtrick: u-boot
$(Q)printf '\x02' | dd of=u-boot bs=1 seek=$(EXEC_TYPE_OFFSET) count=1 \
conv=notrunc &> /dev/null
$(Q)$(CROSS_COMPILE)strip -g u-boot

View File

@@ -1,19 +0,0 @@
# SPDX-License-Identifier: GPL-2.0+
#
# Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
ifdef CONFIG_SYS_LITTLE_ENDIAN
KBUILD_LDFLAGS += -EL
PLATFORM_CPPFLAGS += -mlittle-endian
endif
ifdef CONFIG_SYS_BIG_ENDIAN
KBUILD_LDFLAGS += -EB
PLATFORM_CPPFLAGS += -mbig-endian
endif
PLATFORM_CPPFLAGS += -ffixed-r25 -D__ARC__ -gdwarf-2 -mno-sdata
PLATFORM_RELFLAGS += -ffunction-sections -fdata-sections -fno-common
# Needed for relocation
LDFLAGS_FINAL += -pie --gc-sections

View File

@@ -1,5 +0,0 @@
# SPDX-License-Identifier: GPL-2.0+
#
# Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
obj-y += ivt.o

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@@ -1,26 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
*/
.section .ivt, "ax",@progbits
.align 4
_ivt:
/* Critical system events */
j _start /* 0 - 0x000 */
j memory_error /* 1 - 0x008 */
j instruction_error /* 2 - 0x010 */
/* Device interrupts */
.rept 29
j interrupt_handler /* 3:31 - 0x018:0xF8 */
.endr
/* Exceptions */
j EV_MachineCheck /* 0x100, Fatal Machine check (0x20) */
j EV_TLBMissI /* 0x108, Intruction TLB miss (0x21) */
j EV_TLBMissD /* 0x110, Data TLB miss (0x22) */
j EV_TLBProtV /* 0x118, Protection Violation (0x23)
or Misaligned Access */
j EV_PrivilegeV /* 0x120, Privilege Violation (0x24) */
j EV_Trap /* 0x128, Trap exception (0x25) */
j EV_Extension /* 0x130, Extn Intruction Excp (0x26) */

View File

@@ -1,5 +0,0 @@
# SPDX-License-Identifier: GPL-2.0+
#
# Copyright (C) 2013-2015 Synopsys, Inc. All rights reserved.
obj-y += ivt.o

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@@ -1,31 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2013-2015 Synopsys, Inc. All rights reserved.
*/
.section .ivt, "a",@progbits
.align 4
/* Critical system events */
.word _start /* 0x00 - Reset */
.word memory_error /* 0x01 - Memory Error */
.word instruction_error /* 0x02 - Instruction Error */
/* Exceptions */
.word EV_MachineCheck /* 0x03 - Fatal Machine check */
.word EV_TLBMissI /* 0x04 - Intruction TLB miss */
.word EV_TLBMissD /* 0x05 - Data TLB miss */
.word EV_TLBProtV /* 0x06 - Protection Violation or Misaligned Access */
.word EV_PrivilegeV /* 0x07 - Privilege Violation */
.word EV_SWI /* 0x08 - Software Interrupt */
.word EV_Trap /* 0x09 - Trap */
.word EV_Extension /* 0x0A - Extension Intruction Exception */
.word EV_DivZero /* 0x0B - Division by Zero */
.word EV_DCError /* 0x0C - Data cache consistency error */
.word EV_Maligned /* 0x0D - Misaligned data access */
.word 0 /* 0x0E - Unused */
.word 0 /* 0x0F - Unused */
/* Device interrupts */
.rept 240
.word interrupt_handler /* 0x10 - 0xFF */
.endr

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@@ -1,63 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
*/
#include <config.h>
OUTPUT_FORMAT("elf32-littlearc", "elf32-bigarc", "elf32-littlearc")
OUTPUT_ARCH(arc)
ENTRY(_start)
SECTIONS
{
. = CONFIG_TEXT_BASE;
__image_copy_start = .;
. = ALIGN(1024);
__ivt_start = .;
.ivt :
{
KEEP(*(.ivt))
}
__ivt_end = .;
. = ALIGN(1024);
__text_start = .;
.text : {
arch/arc/lib/start.o (.text*)
*(.text*)
}
__text_end = .;
. = ALIGN(4);
.rodata : {
*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
}
. = ALIGN(4);
.data : {
*(.data*)
}
. = ALIGN(4);
__u_boot_list : {
KEEP(*(SORT(__u_boot_list*)));
}
. = ALIGN(4);
__rel_dyn_start = .;
.rela.dyn : {
*(.rela.dyn)
}
__rel_dyn_end = .;
. = ALIGN(4);
__bss_start = .;
.bss : {
*(.bss*)
}
__bss_end = .;
. = ALIGN(4);
__image_copy_end = .;
__init_end = .;
}

View File

@@ -1,14 +0,0 @@
# SPDX-License-Identifier: GPL-2.0+
dtb-$(CONFIG_TARGET_AXS101) += axs101.dtb
dtb-$(CONFIG_TARGET_AXS103) += axs103.dtb
dtb-$(CONFIG_TARGET_NSIM) += nsim.dtb
dtb-$(CONFIG_TARGET_TB100) += abilis_tb100.dtb
dtb-$(CONFIG_TARGET_EMSDP) += emsdp.dtb
dtb-$(CONFIG_TARGET_HSDK) += hsdk.dtb hsdk-4xd.dtb
dtb-$(CONFIG_TARGET_IOT_DEVKIT) += iot_devkit.dtb
include $(srctree)/scripts/Makefile.dts
# Add any required device tree compiler flags here
DTC_FLAGS += -R 4

View File

@@ -1,31 +0,0 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2015 Synopsys, Inc. (www.synopsys.com)
*/
/dts-v1/;
#include "skeleton.dtsi"
/ {
model = "abilis,tb100";
aliases {
console = &uart0;
};
cpu_card {
core_clk: core_clk {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <500000000>;
bootph-all;
};
};
uart0: serial@ff100000 {
compatible = "snps,dw-apb-uart";
reg = <0xff100000 0x1000>;
reg-shift = <2>;
reg-io-width = <4>;
};
};

View File

@@ -1,18 +0,0 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2017 Synopsys, Inc. All rights reserved.
*/
/include/ "skeleton.dtsi"
/ {
cpu_card {
core_clk: core_clk {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <750000000>;
bootph-all;
};
};
};

View File

@@ -1,18 +0,0 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2017 Synopsys, Inc. All rights reserved.
*/
/include/ "skeleton.dtsi"
/ {
cpu_card {
core_clk: core_clk {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <100000000>;
bootph-all;
};
};
};

View File

@@ -1,18 +0,0 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2017 Synopsys, Inc. All rights reserved.
*/
/dts-v1/;
/include/ "axc001.dtsi"
/include/ "axs10x_mb.dtsi"
/ {
model = "snps,axs101";
chosen {
stdout-path = &uart0;
};
};

View File

@@ -1,18 +0,0 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2017 Synopsys, Inc. All rights reserved.
*/
/dts-v1/;
/include/ "axc003.dtsi"
/include/ "axs10x_mb.dtsi"
/ {
model = "snps,axs103";
chosen {
stdout-path = &uart0;
};
};

View File

@@ -1,123 +0,0 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2017 Synopsys, Inc. All rights reserved.
*/
/ {
aliases {
spi0 = &spi0;
};
axs10x_mb@e0000000 {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x00000000 0xe0000000 0x10000000>;
bootph-all;
clocks {
compatible = "simple-bus";
bootph-all;
apbclk: apbclk {
compatible = "fixed-clock";
clock-frequency = <50000000>;
#clock-cells = <0>;
};
uartclk: uartclk {
compatible = "fixed-clock";
clock-frequency = <33333333>;
#clock-cells = <0>;
bootph-all;
};
mmcclk_ciu: mmcclk-ciu {
compatible = "fixed-clock";
/*
* DW sdio controller has external ciu clock divider
* controlled via register in SDIO IP. It divides
* sdio_ref_clk (which comes from CGU) by 16 for
* default. So default mmcclk clock (which comes
* to sdk_in) is 25000000 Hz.
*/
clock-frequency = <25000000>;
#clock-cells = <0>;
};
mmcclk_biu: mmcclk-biu {
compatible = "fixed-clock";
clock-frequency = <50000000>;
#clock-cells = <0>;
};
};
ethernet@18000 {
compatible = "snps,arc-dwmac-3.70a";
reg = < 0x18000 0x2000 >;
phy-mode = "gmii";
snps,pbl = < 32 >;
clocks = <&apbclk>;
clock-names = "stmmaceth";
max-speed = <100>;
};
ehci@40000 {
compatible = "generic-ehci";
reg = < 0x40000 0x100 >;
};
ohci@60000 {
compatible = "generic-ohci";
reg = < 0x60000 0x100 >;
};
mmc: mmc@15000 {
compatible = "snps,dw-mshc";
reg = <0x15000 0x400>;
bus-width = <4>;
clocks = <&mmcclk_biu>, <&mmcclk_ciu>;
clock-names = "biu", "ciu";
max-frequency = <25000000>;
};
uart0: serial0@22000 {
compatible = "snps,dw-apb-uart";
reg = <0x22000 0x100>;
clocks = <&uartclk>;
reg-shift = <2>;
reg-io-width = <4>;
};
spi0: spi@0 {
compatible = "snps,axs10x-spi", "snps,dw-apb-ssi";
reg = <0x0 0x100>;
#address-cells = <1>;
#size-cells = <0>;
spi-max-frequency = <4000000>;
clocks = <&apbclk>;
clock-names = "spi_clk";
num-cs = <1>;
cs-gpios = <&cs_gpio 0>;
spi_flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <4000000>;
};
};
cs_gpio: gpio@11218 {
compatible = "snps,creg-gpio";
reg = <0x11218 0x4>;
gpio-controller;
#gpio-cells = <1>;
gpio-bank-name = "axs-spi-cs";
gpio-count = <1>;
gpio-first-shift = <0>;
gpio-bit-per-line = <2>;
gpio-activate-val = <1>;
gpio-deactivate-val = <3>;
gpio-default-val = <1>;
};
};
};

View File

@@ -1,58 +0,0 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2018 Synopsys, Inc. All rights reserved.
*/
/dts-v1/;
#include "skeleton.dtsi"
/ {
model = "snps,emsdp";
#address-cells = <1>;
#size-cells = <1>;
aliases {
console = &uart0;
};
cpu_card {
core_clk: core_clk {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <40000000>;
bootph-all;
};
};
uart0: serial0@f0004000 {
compatible = "snps,dw-apb-uart";
clock-frequency = <100000000>;
reg = <0xf0004000 0x1000>;
reg-shift = <2>;
reg-io-width = <4>;
};
mmcclk_biu: mmcclk-biu {
compatible = "fixed-clock";
clock-frequency = <50000000>;
#clock-cells = <0>;
};
mmcclk_ciu: mmcclk-ciu {
compatible = "fixed-clock";
clock-frequency = <100000000>;
#clock-cells = <0>;
};
mmc: mmc0@f0010000 {
compatible = "snps,dw-mshc";
reg = <0xf0010000 0x400>;
bus-width = <4>;
fifo-depth = <256>;
clocks = <&mmcclk_biu>, <&mmcclk_ciu>;
clock-names = "biu", "ciu";
max-frequency = <25000000>;
};
};

View File

@@ -1,12 +0,0 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2020 Synopsys, Inc. All rights reserved.
* Author: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
*/
/dts-v1/;
#include "hsdk-common.dtsi"
/ {
model = "snps,hsdk-4xd";
};

View File

@@ -1,160 +0,0 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2017-2020 Synopsys, Inc. All rights reserved.
* Author: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
*/
/dts-v1/;
#include "skeleton.dtsi"
#include "dt-bindings/clock/snps,hsdk-cgu.h"
#include "dt-bindings/reset/snps,hsdk-reset.h"
/ {
#address-cells = <1>;
#size-cells = <1>;
aliases {
console = &uart0;
spi0 = &spi0;
};
cpu_card {
core_clk: core_clk {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <500000000>;
bootph-all;
};
};
clk-fmeas {
clocks = <&cgu_clk CLK_ARC_PLL>, <&cgu_clk CLK_SYS_PLL>,
<&cgu_clk CLK_TUN_PLL>, <&cgu_clk CLK_DDR_PLL>,
<&cgu_clk CLK_ARC>, <&cgu_clk CLK_HDMI_PLL>,
<&cgu_clk CLK_TUN_TUN>, <&cgu_clk CLK_HDMI>,
<&cgu_clk CLK_SYS_APB>, <&cgu_clk CLK_SYS_AXI>,
<&cgu_clk CLK_SYS_ETH>, <&cgu_clk CLK_SYS_USB>,
<&cgu_clk CLK_SYS_SDIO>, <&cgu_clk CLK_SYS_HDMI>,
<&cgu_clk CLK_SYS_GFX_CORE>, <&cgu_clk CLK_SYS_GFX_DMA>,
<&cgu_clk CLK_SYS_GFX_CFG>, <&cgu_clk CLK_SYS_DMAC_CORE>,
<&cgu_clk CLK_SYS_DMAC_CFG>, <&cgu_clk CLK_SYS_SDIO_REF>,
<&cgu_clk CLK_SYS_SPI_REF>, <&cgu_clk CLK_SYS_I2C_REF>,
<&cgu_clk CLK_SYS_UART_REF>, <&cgu_clk CLK_SYS_EBI_REF>,
<&cgu_clk CLK_TUN_ROM>, <&cgu_clk CLK_TUN_PWM>,
<&cgu_clk CLK_TUN_TIMER>;
clock-names = "cpu-pll", "sys-pll",
"tun-pll", "ddr-clk",
"cpu-clk", "hdmi-pll",
"tun-clk", "hdmi-clk",
"apb-clk", "axi-clk",
"eth-clk", "usb-clk",
"sdio-clk", "hdmi-sys-clk",
"gfx-core-clk", "gfx-dma-clk",
"gfx-cfg-clk", "dmac-core-clk",
"dmac-cfg-clk", "sdio-ref-clk",
"spi-clk", "i2c-clk",
"uart-clk", "ebi-clk",
"rom-clk", "pwm-clk",
"timer-clk";
};
cgu_clk: cgu-clk@f0000000 {
compatible = "snps,hsdk-cgu-clock";
reg = <0xf0000000 0x10>, <0xf00014B8 0x4>;
#clock-cells = <1>;
};
cgu_rst: reset-controller@f00008a0 {
compatible = "snps,hsdk-reset";
#reset-cells = <1>;
reg = <0xf00008a0 0x4>, <0xf0000ff0 0x4>;
};
uart0: serial0@f0005000 {
compatible = "snps,dw-apb-uart";
reg = <0xf0005000 0x1000>;
reg-shift = <2>;
reg-io-width = <4>;
};
ethernet@f0008000 {
#interrupt-cells = <1>;
compatible = "snps,arc-dwmac-3.70a";
reg = <0xf0008000 0x2000>;
phy-mode = "gmii";
};
ehci@f0040000 {
compatible = "generic-ehci";
reg = <0xf0040000 0x100>;
/*
* OHCI and EHCI have reset line shared so we don't add
* reset property to OHCI node as it is probed later and
* it will reset sucessfuly probed and configured EHCI HW.
*/
resets = <&cgu_rst HSDK_USB_RESET>;
};
ohci@f0060000 {
compatible = "generic-ohci";
reg = <0xf0060000 0x100>;
};
mmcclk_ciu: mmcclk-ciu {
compatible = "fixed-clock";
/*
* DW sdio controller has external ciu clock divider
* controlled via register in SDIO IP. Due to its
* unexpected default value (it should divide by 1
* but it divides by 8) SDIO IP uses wrong clock and
* works unstable (see STAR 9001204800)
* We switched to the minimum possible value of the
* divisor (div-by-2) in HSDK platform code.
* So default mmcclk ciu clock is 50000000 Hz.
*/
clock-frequency = <50000000>;
#clock-cells = <0>;
};
mmc: mmc0@f000a000 {
compatible = "snps,dw-mshc";
reg = <0xf000a000 0x400>;
bus-width = <4>;
fifo-depth = <256>;
clocks = <&cgu_clk CLK_SYS_SDIO>, <&mmcclk_ciu>;
clock-names = "biu", "ciu";
max-frequency = <25000000>;
};
spi0: spi@f0020000 {
compatible = "snps,hsdk-spi", "snps,dw-apb-ssi";
reg = <0xf0020000 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
spi-max-frequency = <4000000>;
clocks = <&cgu_clk CLK_SYS_SPI_REF>;
clock-names = "spi_clk";
num-cs = <1>;
cs-gpios = <&cs_gpio 0>;
spi_flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <4000000>;
};
};
cs_gpio: gpio@f00014b0 {
compatible = "snps,creg-gpio";
reg = <0xf00014b0 0x4>;
gpio-controller;
#gpio-cells = <1>;
gpio-bank-name = "hsdk-spi-cs";
gpio-count = <1>;
gpio-first-shift = <0>;
gpio-bit-per-line = <2>;
gpio-activate-val = <2>;
gpio-deactivate-val = <3>;
gpio-default-val = <1>;
};
};

View File

@@ -1,12 +0,0 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2017-2020 Synopsys, Inc. All rights reserved.
* Author: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
*/
/dts-v1/;
#include "hsdk-common.dtsi"
/ {
model = "snps,hsdk";
};

View File

@@ -1,67 +0,0 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2018 Synopsys, Inc. All rights reserved.
*/
/dts-v1/;
#include "skeleton.dtsi"
/ {
#address-cells = <1>;
#size-cells = <1>;
aliases {
console = &uart0;
};
cpu_card {
core_clk: core_clk {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <144000000>;
bootph-all;
};
};
uart0: serial0@80014000 {
compatible = "snps,dw-apb-uart";
clock-frequency = <16000000>;
reg = <0x80014000 0x1000>;
reg-shift = <2>;
reg-io-width = <4>;
};
usb: usb@f0040000 {
compatible = "snps,dwc2";
reg = <0xf0040000 0x10000>;
phys = <&usbphy>;
phy-names = "usb2-phy";
};
usbphy: phy {
compatible = "usb-nop-xceiv";
#phy-cells = <0>;
};
mmcclk_biu: mmcclk-biu {
compatible = "fixed-clock";
clock-frequency = <50000000>;
#clock-cells = <0>;
};
mmcclk_ciu: mmcclk-ciu {
compatible = "fixed-clock";
clock-frequency = <50000000>;
#clock-cells = <0>;
};
mmc: mmc0@f000b000 {
compatible = "snps,dw-mshc";
reg = <0xf000b000 0x400>;
bus-width = <4>;
fifo-depth = <128>;
clocks = <&mmcclk_biu>, <&mmcclk_ciu>;
clock-names = "biu", "ciu";
max-frequency = <25000000>;
};
};

View File

@@ -1,57 +0,0 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2015-2016, 2020 Synopsys, Inc. (www.synopsys.com)
*/
/dts-v1/;
#include "skeleton.dtsi"
/ {
model = "snps,nsim";
aliases {
console = &uart0;
};
cpu_card {
core_clk: core_clk {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <70000000>;
bootph-all;
};
};
uart0: serial@f0000000 {
compatible = "snps,dw-apb-uart";
reg = <0xf0000000 0x1000>;
reg-shift = <2>;
reg-io-width = <4>;
clock-frequency = <70000000>;
};
virtio0: virtio@f0100000 {
compatible = "virtio,mmio";
reg = <0xf0100000 0x2000>;
};
virtio1: virtio@f0102000 {
compatible = "virtio,mmio";
reg = <0xf0102000 0x2000>;
};
virtio2: virtio@f0104000 {
compatible = "virtio,mmio";
reg = <0xf0104000 0x2000>;
};
virtio3: virtio@f0106000 {
compatible = "virtio,mmio";
reg = <0xf0106000 0x2000>;
};
virtio4: virtio@f0108000 {
compatible = "virtio,mmio";
reg = <0xf0108000 0x2000>;
};
};

View File

@@ -1,30 +0,0 @@
/*
* Skeleton device tree; the bare minimum needed to boot; just include and
* add a compatible value. The bootloader will typically populate the memory
* node.
*/
/ {
#address-cells = <1>;
#size-cells = <1>;
chosen { };
aliases { };
cpu_card {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
bootph-all;
timer@0 {
compatible = "snps,arc-timer";
clocks = <&core_clk>;
reg = <0 1>;
};
};
memory@80000000 {
device_type = "memory";
reg = <0x80000000 0x10000000>; /* 256M */
};
};

View File

@@ -1,75 +0,0 @@
/*
* ARC Build Configuration Registers, with encoded hardware config
*
* Copyright (C) 2018 Synopsys
* Author: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
#ifndef __ARC_BCR_H
#define __ARC_BCR_H
#ifndef __ASSEMBLY__
union bcr_di_cache {
struct {
#ifdef CONFIG_SYS_BIG_ENDIAN
unsigned int pad:12, line_len:4, sz:4, config:4, ver:8;
#else
unsigned int ver:8, config:4, sz:4, line_len:4, pad:12;
#endif
} fields;
unsigned int word;
};
union bcr_slc_cfg {
struct {
#ifdef CONFIG_SYS_BIG_ENDIAN
unsigned int pad:24, way:2, lsz:2, sz:4;
#else
unsigned int sz:4, lsz:2, way:2, pad:24;
#endif
} fields;
unsigned int word;
};
union bcr_generic {
struct {
#ifdef CONFIG_SYS_BIG_ENDIAN
unsigned int pad:24, ver:8;
#else
unsigned int ver:8, pad:24;
#endif
} fields;
unsigned int word;
};
union bcr_clust_cfg {
struct {
#ifdef CONFIG_SYS_BIG_ENDIAN
unsigned int pad:7, c:1, num_entries:8, num_cores:8, ver:8;
#else
unsigned int ver:8, num_cores:8, num_entries:8, c:1, pad:7;
#endif
} fields;
unsigned int word;
};
union bcr_mmu_4 {
struct {
#ifdef CONFIG_SYS_BIG_ENDIAN
unsigned int ver:8, sasid:1, sz1:4, sz0:4, res:2, pae:1,
n_ways:2, n_entry:2, n_super:2, u_itlb:3, u_dtlb:3;
#else
/* DTLB ITLB JES JE JA */
unsigned int u_dtlb:3, u_itlb:3, n_super:2, n_entry:2, n_ways:2,
pae:1, res:2, sz0:4, sz1:4, sasid:1, ver:8;
#endif
} fields;
unsigned int word;
};
#endif /* __ASSEMBLY__ */
#endif /* __ARC_BCR_H */

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/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. All rights reserved.
*/
#ifndef _ASM_ARC_ARCREGS_H
#define _ASM_ARC_ARCREGS_H
#include <asm/cache.h>
/*
* ARC architecture has additional address space - auxiliary registers.
* These registers are mostly used for configuration purposes.
* These registers are not memory mapped and special commands are used for
* access: "lr"/"sr".
*/
/*
* Typically 8 least significant bits of Build Configuration Register (BCR)
* describe version of the HW block in question. Moreover if decoded version
* is 0 this means given HW block is absent - this is especially useful because
* we may safely read BRC regardless HW block existence while an attempt to
* access any other AUX regs associated with this HW block lead to imediate
* "instruction error" exception.
*
* I.e. before using any cofigurable HW block it's required to make sure it
* exists at all, and for that we introduce a special macro below.
*/
#define ARC_BCR_VERSION_MASK GENMASK(7, 0)
#define ARC_FEATURE_EXISTS(bcr) !!(__builtin_arc_lr(bcr) & ARC_BCR_VERSION_MASK)
#define ARC_AUX_IDENTITY 0x04
#define ARC_AUX_STATUS32 0x0a
/* STATUS32 Bits Positions */
#define STATUS_AD_BIT 19 /* Enable unaligned access */
/* Instruction cache related auxiliary registers */
#define ARC_AUX_IC_IVIC 0x10
#define ARC_AUX_IC_CTRL 0x11
#define ARC_AUX_IC_IVIL 0x19
#if (CONFIG_ARC_MMU_VER == 3)
#define ARC_AUX_IC_PTAG 0x1E
#endif
#define ARC_BCR_IC_BUILD 0x77
#define AUX_AUX_CACHE_LIMIT 0x5D
#define ARC_AUX_NON_VOLATILE_LIMIT 0x5E
/* ICCM and DCCM auxiliary registers */
#define ARC_AUX_DCCM_BASE 0x18 /* DCCM Base Addr ARCv2 */
#define ARC_AUX_ICCM_BASE 0x208 /* ICCM Base Addr ARCv2 */
/* CSM auxiliary registers */
#define ARC_AUX_CSM_ENABLE 0x9A0
/* Timer related auxiliary registers */
#define ARC_AUX_TIMER0_CNT 0x21 /* Timer 0 count */
#define ARC_AUX_TIMER0_CTRL 0x22 /* Timer 0 control */
#define ARC_AUX_TIMER0_LIMIT 0x23 /* Timer 0 limit */
#define ARC_AUX_TIMER1_CNT 0x100 /* Timer 1 count */
#define ARC_AUX_TIMER1_CTRL 0x101 /* Timer 1 control */
#define ARC_AUX_TIMER1_LIMIT 0x102 /* Timer 1 limit */
#define ARC_AUX_INTR_VEC_BASE 0x25
/* Data cache related auxiliary registers */
#define ARC_AUX_DC_IVDC 0x47
#define ARC_AUX_DC_CTRL 0x48
#define ARC_AUX_DC_IVDL 0x4A
#define ARC_AUX_DC_FLSH 0x4B
#define ARC_AUX_DC_FLDL 0x4C
#if (CONFIG_ARC_MMU_VER == 3)
#define ARC_AUX_DC_PTAG 0x5C
#endif
#define ARC_BCR_DC_BUILD 0x72
#define ARC_BCR_SLC 0xce
#define ARC_AUX_SLC_CONFIG 0x901
#define ARC_AUX_SLC_CTRL 0x903
#define ARC_AUX_SLC_FLUSH 0x904
#define ARC_AUX_SLC_INVALIDATE 0x905
#define ARC_AUX_SLC_IVDL 0x910
#define ARC_AUX_SLC_FLDL 0x912
#define ARC_AUX_SLC_RGN_START 0x914
#define ARC_AUX_SLC_RGN_START1 0x915
#define ARC_AUX_SLC_RGN_END 0x916
#define ARC_AUX_SLC_RGN_END1 0x917
#define ARC_BCR_CLUSTER 0xcf
/* MMU Management regs */
#define ARC_AUX_MMU_BCR 0x6f
/* IO coherency related auxiliary registers */
#define ARC_AUX_IO_COH_ENABLE 0x500
#define ARC_AUX_IO_COH_PARTIAL 0x501
#define ARC_AUX_IO_COH_AP0_BASE 0x508
#define ARC_AUX_IO_COH_AP0_SIZE 0x509
/* XY-memory related */
#define ARC_AUX_XY_BUILD 0x79
/* DSP-extensions related auxiliary registers */
#define ARC_AUX_DSP_BUILD 0x7A
#define ARC_AUX_DSP_CTRL 0x59F
/* ARC Subsystems related auxiliary registers */
#define ARC_AUX_SUBSYS_BUILD 0xF0
#ifndef __ASSEMBLY__
#include <linux/bitops.h>
/* Accessors for auxiliary registers */
#define read_aux_reg(reg) __builtin_arc_lr(reg)
/* gcc builtin sr needs reg param to be long immediate */
#define write_aux_reg(reg_immed, val) \
__builtin_arc_sr((unsigned int)val, reg_immed)
/* ARCNUM [15:8] - field to identify each core in a multi-core system */
#define CPU_ID_GET() ((read_aux_reg(ARC_AUX_IDENTITY) & 0xFF00) >> 8)
static const inline int is_isa_arcv2(void)
{
return IS_ENABLED(CONFIG_ISA_ARCV2);
}
static const inline int is_isa_arcompact(void)
{
return IS_ENABLED(CONFIG_ISA_ARCOMPACT);
}
#endif /* __ASSEMBLY__ */
#endif /* _ASM_ARC_ARCREGS_H */

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/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
*/
#ifndef __ASM_ARC_BITOPS_H
#define __ASM_ARC_BITOPS_H
/*
* hweightN: returns the hamming weight (i.e. the number
* of bits set) of a N-bit word
*/
#define hweight32(x) generic_hweight32(x)
#define hweight16(x) generic_hweight16(x)
#define hweight8(x) generic_hweight8(x)
#include <asm-generic/bitops/fls.h>
#include <asm-generic/bitops/__fls.h>
#include <asm-generic/bitops/fls64.h>
#include <asm-generic/bitops/__ffs.h>
#endif /* __ASM_ARC_BITOPS_H */

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/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
*/
#ifndef __ASM_ARC_BYTEORDER_H
#define __ASM_ARC_BYTEORDER_H
#include <asm/types.h>
#if defined(__GNUC__) && !defined(__STRICT_ANSI__)
#define __BYTEORDER_HAS_U64__
#define __SWAB_64_THRU_32__
#endif
#ifdef __LITTLE_ENDIAN__
#include <linux/byteorder/little_endian.h>
#else
#include <linux/byteorder/big_endian.h>
#endif /* CONFIG_SYS_BIG_ENDIAN */
#endif /* ASM_ARC_BYTEORDER_H */

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/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
*/
#ifndef __ASM_ARC_CACHE_H
#define __ASM_ARC_CACHE_H
/*
* As of today we may handle any L1 cache line length right in software.
* For that essentially cache line length is a variable not constant.
* And to satisfy users of ARCH_DMA_MINALIGN we just use largest line length
* that may exist in either L1 or L2 (AKA SLC) caches on ARC.
*/
#define ARCH_DMA_MINALIGN 128
#ifndef __ASSEMBLY__
void cache_init(void);
void flush_n_invalidate_dcache_all(void);
void sync_n_cleanup_cache_all(void);
static const inline int is_ioc_enabled(void)
{
return IS_ENABLED(CONFIG_ARC_DBG_IOC_ENABLE);
}
/*
* We export SLC control functions to use them in platform configuration code.
* They maust not be used in any generic code!
*/
void slc_enable(void);
void slc_disable(void);
#endif /* __ASSEMBLY__ */
#endif /* __ASM_ARC_CACHE_H */

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/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
*/
#ifndef __ASM_ARC_CONFIG_H_
#define __ASM_ARC_CONFIG_H_
#endif /*__ASM_ARC_CONFIG_H_ */

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/* SPDX-License-Identifier: GPL-2.0-only */

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/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
*/
#ifndef __ASM_ARC_GLOBAL_DATA_H
#define __ASM_ARC_GLOBAL_DATA_H
#include <asm/u-boot.h>
#ifndef __ASSEMBLY__
/* Architecture-specific global data */
struct arch_global_data {
int l1_line_sz;
#if defined(CONFIG_ISA_ARCV2)
int slc_line_sz;
#endif
};
#endif /* __ASSEMBLY__ */
#include <asm-generic/global_data.h>
#define DECLARE_GLOBAL_DATA_PTR register gd_t *gd asm ("r25")
#endif /* __ASM_ARC_GLOBAL_DATA_H */

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#include <asm-generic/gpio.h>

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/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2013-2014, 2020 Synopsys, Inc. All rights reserved.
*/
#ifndef __ASM_ARC_IO_H
#define __ASM_ARC_IO_H
#include <linux/types.h>
#include <asm/byteorder.h>
/*
* Compiler barrier. It prevents compiler from reordering instructions before
* and after it. It doesn't prevent HW (CPU) from any reordering though.
*/
#define __comp_b() asm volatile("" : : : "memory")
#ifdef __ARCHS__
/*
* ARCv2 based HS38 cores are in-order issue, but still weakly ordered
* due to micro-arch buffering/queuing of load/store, cache hit vs. miss ...
*
* Explicit barrier provided by DMB instruction
* - Operand supports fine grained load/store/load+store semantics
* - Ensures that selected memory operation issued before it will complete
* before any subsequent memory operation of same type
* - DMB guarantees SMP as well as local barrier semantics
* (asm-generic/barrier.h ensures sane smp_*mb if not defined here, i.e.
* UP: barrier(), SMP: smp_*mb == *mb)
* - DSYNC provides DMB+completion_of_cache_bpu_maintenance_ops hence not needed
* in the general case. Plus it only provides full barrier.
*/
#define mb() asm volatile("dmb 3\n" : : : "memory")
#define rmb() asm volatile("dmb 1\n" : : : "memory")
#define wmb() asm volatile("dmb 2\n" : : : "memory")
#else
/*
* ARCompact based cores (ARC700) only have SYNC instruction which is super
* heavy weight as it flushes the pipeline as well.
* There are no real SMP implementations of such cores.
*/
#define mb() asm volatile("sync\n" : : : "memory")
#endif
#ifdef __ARCHS__
#define __iormb() rmb()
#define __iowmb() wmb()
#else
#define __iormb() __comp_b()
#define __iowmb() __comp_b()
#endif
static inline void sync(void)
{
/* Not yet implemented */
}
/*
* We must use 'volatile' in C-version read/write IO accessors implementation
* to avoid merging several reads (writes) into one read (write), or optimizing
* them out by compiler.
* We must use compiler barriers before and after operation (read or write) so
* it won't be reordered by compiler.
*/
#define __arch_getb(a) ({ u8 __v; __comp_b(); __v = *(volatile u8 *)(a); __comp_b(); __v; })
#define __arch_getw(a) ({ u16 __v; __comp_b(); __v = *(volatile u16 *)(a); __comp_b(); __v; })
#define __arch_getl(a) ({ u32 __v; __comp_b(); __v = *(volatile u32 *)(a); __comp_b(); __v; })
#define __arch_getq(a) ({ u64 __v; __comp_b(); __v = *(volatile u64 *)(a); __comp_b(); __v; })
#define __arch_putb(v, a) ({ __comp_b(); *(volatile u8 *)(a) = (v); __comp_b(); })
#define __arch_putw(v, a) ({ __comp_b(); *(volatile u16 *)(a) = (v); __comp_b(); })
#define __arch_putl(v, a) ({ __comp_b(); *(volatile u32 *)(a) = (v); __comp_b(); })
#define __arch_putq(v, a) ({ __comp_b(); *(volatile u64 *)(a) = (v); __comp_b(); })
/*
* We add memory barriers for __raw_readX / __raw_writeX accessors same way as
* it is done for readX and writeX accessors as lots of U-Boot driver uses
* __raw_readX / __raw_writeX instead of proper accessor with barrier.
*/
#define __raw_writeb(v, c) ({ __iowmb(); __arch_putb(v, c); })
#define __raw_writew(v, c) ({ __iowmb(); __arch_putw(v, c); })
#define __raw_writel(v, c) ({ __iowmb(); __arch_putl(v, c); })
#define __raw_writeq(v, c) ({ __iowmb(); __arch_putq(v, c); })
#define __raw_readb(c) ({ u8 __v = __arch_getb(c); __iormb(); __v; })
#define __raw_readw(c) ({ u16 __v = __arch_getw(c); __iormb(); __v; })
#define __raw_readl(c) ({ u32 __v = __arch_getl(c); __iormb(); __v; })
#define __raw_readq(c) ({ u64 __v = __arch_getq(c); __iormb(); __v; })
static inline void __raw_writesb(unsigned long addr, const void *data,
int bytelen)
{
u8 *buf = (uint8_t *)data;
__iowmb();
while (bytelen--)
__arch_putb(*buf++, addr);
}
static inline void __raw_writesw(unsigned long addr, const void *data,
int wordlen)
{
u16 *buf = (uint16_t *)data;
__iowmb();
while (wordlen--)
__arch_putw(*buf++, addr);
}
static inline void __raw_writesl(unsigned long addr, const void *data,
int longlen)
{
u32 *buf = (uint32_t *)data;
__iowmb();
while (longlen--)
__arch_putl(*buf++, addr);
}
static inline void __raw_readsb(unsigned long addr, void *data, int bytelen)
{
u8 *buf = (uint8_t *)data;
while (bytelen--)
*buf++ = __arch_getb(addr);
__iormb();
}
static inline void __raw_readsw(unsigned long addr, void *data, int wordlen)
{
u16 *buf = (uint16_t *)data;
while (wordlen--)
*buf++ = __arch_getw(addr);
__iormb();
}
static inline void __raw_readsl(unsigned long addr, void *data, int longlen)
{
u32 *buf = (uint32_t *)data;
while (longlen--)
*buf++ = __arch_getl(addr);
__iormb();
}
/*
* Relaxed I/O memory access primitives. These follow the Device memory
* ordering rules but do not guarantee any ordering relative to Normal memory
* accesses.
*/
#define readb_relaxed(c) ({ u8 __r = __arch_getb(c); __r; })
#define readw_relaxed(c) ({ u16 __r = le16_to_cpu((__force __le16)__arch_getw(c)); __r; })
#define readl_relaxed(c) ({ u32 __r = le32_to_cpu((__force __le32)__arch_getl(c)); __r; })
#define readq_relaxed(c) ({ u64 __r = le64_to_cpu((__force __le64)__arch_getq(c)); __r; })
#define writeb_relaxed(v, c) ((void)__arch_putb((v), (c)))
#define writew_relaxed(v, c) ((void)__arch_putw((__force u16)cpu_to_le16(v), (c)))
#define writel_relaxed(v, c) ((void)__arch_putl((__force u32)cpu_to_le32(v), (c)))
#define writeq_relaxed(v, c) ((void)__arch_putq((__force u64)cpu_to_le64(v), (c)))
/*
* MMIO can also get buffered/optimized in micro-arch, so barriers needed
* Based on ARM model for the typical use case
*
* <ST [DMA buffer]>
* <writel MMIO "go" reg>
* or:
* <readl MMIO "status" reg>
* <LD [DMA buffer]>
*
* http://lkml.kernel.org/r/20150622133656.GG1583@arm.com
*/
#define readb(c) ({ u8 __v = readb_relaxed(c); __iormb(); __v; })
#define readw(c) ({ u16 __v = readw_relaxed(c); __iormb(); __v; })
#define readl(c) ({ u32 __v = readl_relaxed(c); __iormb(); __v; })
#define readq(c) ({ u64 __v = readq_relaxed(c); __iormb(); __v; })
#define writeb(v, c) ({ __iowmb(); writeb_relaxed(v, c); })
#define writew(v, c) ({ __iowmb(); writew_relaxed(v, c); })
#define writel(v, c) ({ __iowmb(); writel_relaxed(v, c); })
#define writeq(v, c) ({ __iowmb(); writeq_relaxed(v, c); })
#define out_arch(type, endian, a, v) __raw_write##type(cpu_to_##endian(v), a)
#define in_arch(type, endian, a) endian##_to_cpu(__raw_read##type(a))
#define out_le32(a, v) out_arch(l, le32, a, v)
#define out_le16(a, v) out_arch(w, le16, a, v)
#define in_le32(a) in_arch(l, le32, a)
#define in_le16(a) in_arch(w, le16, a)
#define out_be32(a, v) out_arch(l, be32, a, v)
#define out_be16(a, v) out_arch(w, be16, a, v)
#define in_be32(a) in_arch(l, be32, a)
#define in_be16(a) in_arch(w, be16, a)
#define out_8(a, v) __raw_writeb(v, a)
#define in_8(a) __raw_readb(a)
/*
* Clear and set bits in one shot. These macros can be used to clear and
* set multiple bits in a register using a single call. These macros can
* also be used to set a multiple-bit bit pattern using a mask, by
* specifying the mask in the 'clear' parameter and the new bit pattern
* in the 'set' parameter.
*/
#define clrbits(type, addr, clear) \
out_##type((addr), in_##type(addr) & ~(clear))
#define setbits(type, addr, set) \
out_##type((addr), in_##type(addr) | (set))
#define clrsetbits(type, addr, clear, set) \
out_##type((addr), (in_##type(addr) & ~(clear)) | (set))
#define clrbits_be32(addr, clear) clrbits(be32, addr, clear)
#define setbits_be32(addr, set) setbits(be32, addr, set)
#define clrsetbits_be32(addr, clear, set) clrsetbits(be32, addr, clear, set)
#define clrbits_le32(addr, clear) clrbits(le32, addr, clear)
#define setbits_le32(addr, set) setbits(le32, addr, set)
#define clrsetbits_le32(addr, clear, set) clrsetbits(le32, addr, clear, set)
#define clrbits_be16(addr, clear) clrbits(be16, addr, clear)
#define setbits_be16(addr, set) setbits(be16, addr, set)
#define clrsetbits_be16(addr, clear, set) clrsetbits(be16, addr, clear, set)
#define clrbits_le16(addr, clear) clrbits(le16, addr, clear)
#define setbits_le16(addr, set) setbits(le16, addr, set)
#define clrsetbits_le16(addr, clear, set) clrsetbits(le16, addr, clear, set)
#define clrbits_8(addr, clear) clrbits(8, addr, clear)
#define setbits_8(addr, set) setbits(8, addr, set)
#define clrsetbits_8(addr, clear, set) clrsetbits(8, addr, clear, set)
#include <asm-generic/io.h>
#endif /* __ASM_ARC_IO_H */

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/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2004, 2007-2010, 2011-2015 Synopsys, Inc. All rights reserved.
*/
#ifndef __ASM_ARC_LINKAGE_H
#define __ASM_ARC_LINKAGE_H
#define ASM_NL ` /* use '`' to mark new line in macro */
#endif /* __ASM_ARC_LINKAGE_H */

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/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
*/
#ifndef __ASM_ARC_POSIX_TYPES_H
#define __ASM_ARC_POSIX_TYPES_H
typedef unsigned short __kernel_dev_t;
typedef unsigned long __kernel_ino_t;
typedef unsigned short __kernel_mode_t;
typedef unsigned short __kernel_nlink_t;
typedef long __kernel_off_t;
typedef int __kernel_pid_t;
typedef unsigned short __kernel_ipc_pid_t;
typedef unsigned short __kernel_uid_t;
typedef unsigned short __kernel_gid_t;
#ifdef __GNUC__
typedef __SIZE_TYPE__ __kernel_size_t;
#else
typedef unsigned int __kernel_size_t;
#endif
typedef int __kernel_ssize_t;
typedef int __kernel_ptrdiff_t;
typedef long __kernel_time_t;
typedef long __kernel_suseconds_t;
typedef long __kernel_clock_t;
typedef int __kernel_daddr_t;
typedef char *__kernel_caddr_t;
typedef unsigned short __kernel_uid16_t;
typedef unsigned short __kernel_gid16_t;
typedef unsigned int __kernel_uid32_t;
typedef unsigned int __kernel_gid32_t;
typedef unsigned short __kernel_old_uid_t;
typedef unsigned short __kernel_old_gid_t;
#ifdef __GNUC__
typedef long long __kernel_loff_t;
#endif
#endif /* __ASM_ARC_POSIX_TYPES_H */

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/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2015 Synopsys, Inc. All rights reserved.
*/
#ifndef _ASM_ARC_PROCESSOR_H
#define _ASM_ARC_PROCESSOR_H
/* This file is required by some generic code like USB etc */
#endif /* _ASM_ARC_PROCESSOR_H */

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/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. All rights reserved.
*/
#ifndef __ASM_ARC_PTRACE_H
#define __ASM_ARC_PTRACE_H
struct pt_regs {
long bta;
long lp_start;
long lp_end;
long lp_count;
long status32;
long ret;
long blink;
long fp;
long r26; /* gp */
long r25;
long r24;
long r23;
long r22;
long r21;
long r20;
long r19;
long r18;
long r17;
long r16;
long r15;
long r14;
long r13;
long r12;
long r11;
long r10;
long r9;
long r8;
long r7;
long r6;
long r5;
long r4;
long r3;
long r2;
long r1;
long r0;
long sp;
long ecr;
};
#endif /* __ASM_ARC_PTRACE_H */

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/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
*/
#ifndef __ASM_ARC_SECTIONS_H
#define __ASM_ARC_SECTIONS_H
#include <asm-generic/sections.h>
extern char __ivt_start[];
extern char __ivt_end[];
extern char __text_end[];
#endif /* __ASM_ARC_SECTIONS_H */

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/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
*/
#ifndef __ASM_ARC_TYPES_H
#define __ASM_ARC_TYPES_H
#include <asm-generic/int-ll64.h>
typedef unsigned short umode_t;
#define BITS_PER_LONG 32
/* Dma addresses are 32-bits wide. */
typedef u32 dma_addr_t;
typedef unsigned long phys_addr_t;
typedef unsigned long phys_size_t;
#endif /* __ASM_ARC_TYPES_H */

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/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2014 Synopsys, Inc. All rights reserved.
*/
#ifndef __ASM_ARC_U_BOOT_ARC_H__
#define __ASM_ARC_U_BOOT_ARC_H__
int arch_early_init_r(void);
void board_init_f_r_trampoline(ulong) __attribute__ ((noreturn));
void board_init_f_r(void) __attribute__ ((noreturn));
#endif /* __ASM_ARC_U_BOOT_ARC_H__ */

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/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
*/
#ifndef __ASM_ARC_U_BOOT_H__
#define __ASM_ARC_U_BOOT_H__
#include <asm-generic/u-boot.h>
#include <asm/u-boot-arc.h>
/* For image.h:image_check_target_arch() */
#define IH_ARCH_DEFAULT IH_ARCH_ARC
#endif /* __ASM_ARC_U_BOOT_H__ */

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#include <asm-generic/unaligned.h>

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# SPDX-License-Identifier: GPL-2.0+
#
# Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
extra-y = start.o
head-y := start.o
obj-y += cache.o
obj-y += cpu.o
obj-y += interrupts.o
obj-y += relocate.o
obj-y += reset.o
obj-y += ints_low.o
obj-y += init_helpers.o
obj-$(CONFIG_CMD_BOOTM) += bootm.o
lib-$(CONFIG_USE_PRIVATE_LIBGCC) += _millicodethunk.o libgcc2.o

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/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 1995, 1997, 2007-2013 Free Software Foundation, Inc.
*/
/* ANSI concatenation macros. */
#define CONCAT1(a, b) CONCAT2(a, b)
#define CONCAT2(a, b) a ## b
/* Use the right prefix for global labels. */
#define SYM(x) CONCAT1 (__USER_LABEL_PREFIX__, x)
#ifndef WORKING_ASSEMBLER
#define abs_l abs
#define asl_l asl
#define mov_l mov
#endif
#define FUNC(X) .type SYM(X),@function
#define HIDDEN_FUNC(X) FUNC(X)` .hidden X
#define ENDFUNC0(X) .Lfe_##X: .size X,.Lfe_##X-X
#define ENDFUNC(X) ENDFUNC0(X)
.section .text
.align 4
.global SYM(__st_r13_to_r15)
.global SYM(__st_r13_to_r16)
.global SYM(__st_r13_to_r17)
.global SYM(__st_r13_to_r18)
.global SYM(__st_r13_to_r19)
.global SYM(__st_r13_to_r20)
.global SYM(__st_r13_to_r21)
.global SYM(__st_r13_to_r22)
.global SYM(__st_r13_to_r23)
.global SYM(__st_r13_to_r24)
.global SYM(__st_r13_to_r25)
HIDDEN_FUNC(__st_r13_to_r15)
HIDDEN_FUNC(__st_r13_to_r16)
HIDDEN_FUNC(__st_r13_to_r17)
HIDDEN_FUNC(__st_r13_to_r18)
HIDDEN_FUNC(__st_r13_to_r19)
HIDDEN_FUNC(__st_r13_to_r20)
HIDDEN_FUNC(__st_r13_to_r21)
HIDDEN_FUNC(__st_r13_to_r22)
HIDDEN_FUNC(__st_r13_to_r23)
HIDDEN_FUNC(__st_r13_to_r24)
HIDDEN_FUNC(__st_r13_to_r25)
.align 4
SYM(__st_r13_to_r25):
st r25, [sp,48]
SYM(__st_r13_to_r24):
st r24, [sp,44]
SYM(__st_r13_to_r23):
st r23, [sp,40]
SYM(__st_r13_to_r22):
st r22, [sp,36]
SYM(__st_r13_to_r21):
st r21, [sp,32]
SYM(__st_r13_to_r20):
st r20, [sp,28]
SYM(__st_r13_to_r19):
st r19, [sp,24]
SYM(__st_r13_to_r18):
st r18, [sp,20]
SYM(__st_r13_to_r17):
st r17, [sp,16]
SYM(__st_r13_to_r16):
st r16, [sp,12]
SYM(__st_r13_to_r15):
#ifdef __ARC700__
st r15, [sp,8] ; minimum function size to avoid stall: 6 bytes.
#else
st_s r15, [sp,8]
#endif
st_s r14, [sp,4]
j_s.d [%blink]
st_s r13, [sp,0]
ENDFUNC(__st_r13_to_r15)
ENDFUNC(__st_r13_to_r16)
ENDFUNC(__st_r13_to_r17)
ENDFUNC(__st_r13_to_r18)
ENDFUNC(__st_r13_to_r19)
ENDFUNC(__st_r13_to_r20)
ENDFUNC(__st_r13_to_r21)
ENDFUNC(__st_r13_to_r22)
ENDFUNC(__st_r13_to_r23)
ENDFUNC(__st_r13_to_r24)
ENDFUNC(__st_r13_to_r25)
.section .text
.align 4
; ==================================
; the loads
.global SYM(__ld_r13_to_r15)
.global SYM(__ld_r13_to_r16)
.global SYM(__ld_r13_to_r17)
.global SYM(__ld_r13_to_r18)
.global SYM(__ld_r13_to_r19)
.global SYM(__ld_r13_to_r20)
.global SYM(__ld_r13_to_r21)
.global SYM(__ld_r13_to_r22)
.global SYM(__ld_r13_to_r23)
.global SYM(__ld_r13_to_r24)
.global SYM(__ld_r13_to_r25)
HIDDEN_FUNC(__ld_r13_to_r15)
HIDDEN_FUNC(__ld_r13_to_r16)
HIDDEN_FUNC(__ld_r13_to_r17)
HIDDEN_FUNC(__ld_r13_to_r18)
HIDDEN_FUNC(__ld_r13_to_r19)
HIDDEN_FUNC(__ld_r13_to_r20)
HIDDEN_FUNC(__ld_r13_to_r21)
HIDDEN_FUNC(__ld_r13_to_r22)
HIDDEN_FUNC(__ld_r13_to_r23)
HIDDEN_FUNC(__ld_r13_to_r24)
HIDDEN_FUNC(__ld_r13_to_r25)
SYM(__ld_r13_to_r25):
ld r25, [sp,48]
SYM(__ld_r13_to_r24):
ld r24, [sp,44]
SYM(__ld_r13_to_r23):
ld r23, [sp,40]
SYM(__ld_r13_to_r22):
ld r22, [sp,36]
SYM(__ld_r13_to_r21):
ld r21, [sp,32]
SYM(__ld_r13_to_r20):
ld r20, [sp,28]
SYM(__ld_r13_to_r19):
ld r19, [sp,24]
SYM(__ld_r13_to_r18):
ld r18, [sp,20]
SYM(__ld_r13_to_r17):
ld r17, [sp,16]
SYM(__ld_r13_to_r16):
ld r16, [sp,12]
SYM(__ld_r13_to_r15):
#ifdef __ARC700__
ld r15, [sp,8] ; minimum function size to avoid stall: 6 bytes.
#else
ld_s r15, [sp,8]
#endif
ld_s r14, [sp,4]
j_s.d [%blink]
ld_s r13, [sp,0]
ENDFUNC(__ld_r13_to_r15)
ENDFUNC(__ld_r13_to_r16)
ENDFUNC(__ld_r13_to_r17)
ENDFUNC(__ld_r13_to_r18)
ENDFUNC(__ld_r13_to_r19)
ENDFUNC(__ld_r13_to_r20)
ENDFUNC(__ld_r13_to_r21)
ENDFUNC(__ld_r13_to_r22)
ENDFUNC(__ld_r13_to_r23)
ENDFUNC(__ld_r13_to_r24)
ENDFUNC(__ld_r13_to_r25)
.global SYM(__ld_r13_to_r14_ret)
.global SYM(__ld_r13_to_r15_ret)
.global SYM(__ld_r13_to_r16_ret)
.global SYM(__ld_r13_to_r17_ret)
.global SYM(__ld_r13_to_r18_ret)
.global SYM(__ld_r13_to_r19_ret)
.global SYM(__ld_r13_to_r20_ret)
.global SYM(__ld_r13_to_r21_ret)
.global SYM(__ld_r13_to_r22_ret)
.global SYM(__ld_r13_to_r23_ret)
.global SYM(__ld_r13_to_r24_ret)
.global SYM(__ld_r13_to_r25_ret)
HIDDEN_FUNC(__ld_r13_to_r14_ret)
HIDDEN_FUNC(__ld_r13_to_r15_ret)
HIDDEN_FUNC(__ld_r13_to_r16_ret)
HIDDEN_FUNC(__ld_r13_to_r17_ret)
HIDDEN_FUNC(__ld_r13_to_r18_ret)
HIDDEN_FUNC(__ld_r13_to_r19_ret)
HIDDEN_FUNC(__ld_r13_to_r20_ret)
HIDDEN_FUNC(__ld_r13_to_r21_ret)
HIDDEN_FUNC(__ld_r13_to_r22_ret)
HIDDEN_FUNC(__ld_r13_to_r23_ret)
HIDDEN_FUNC(__ld_r13_to_r24_ret)
HIDDEN_FUNC(__ld_r13_to_r25_ret)
.section .text
.align 4
SYM(__ld_r13_to_r25_ret):
ld r25, [sp,48]
SYM(__ld_r13_to_r24_ret):
ld r24, [sp,44]
SYM(__ld_r13_to_r23_ret):
ld r23, [sp,40]
SYM(__ld_r13_to_r22_ret):
ld r22, [sp,36]
SYM(__ld_r13_to_r21_ret):
ld r21, [sp,32]
SYM(__ld_r13_to_r20_ret):
ld r20, [sp,28]
SYM(__ld_r13_to_r19_ret):
ld r19, [sp,24]
SYM(__ld_r13_to_r18_ret):
ld r18, [sp,20]
SYM(__ld_r13_to_r17_ret):
ld r17, [sp,16]
SYM(__ld_r13_to_r16_ret):
ld r16, [sp,12]
SYM(__ld_r13_to_r15_ret):
ld r15, [sp,8]
SYM(__ld_r13_to_r14_ret):
ld blink,[sp,r12]
ld_s r14, [sp,4]
ld.ab r13, [sp,r12]
j_s.d [%blink]
add_s sp,sp,4
ENDFUNC(__ld_r13_to_r14_ret)
ENDFUNC(__ld_r13_to_r15_ret)
ENDFUNC(__ld_r13_to_r16_ret)
ENDFUNC(__ld_r13_to_r17_ret)
ENDFUNC(__ld_r13_to_r18_ret)
ENDFUNC(__ld_r13_to_r19_ret)
ENDFUNC(__ld_r13_to_r20_ret)
ENDFUNC(__ld_r13_to_r21_ret)
ENDFUNC(__ld_r13_to_r22_ret)
ENDFUNC(__ld_r13_to_r23_ret)
ENDFUNC(__ld_r13_to_r24_ret)
ENDFUNC(__ld_r13_to_r25_ret)

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// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
*/
#include <bootm.h>
#include <bootstage.h>
#include <env.h>
#include <image.h>
#include <irq_func.h>
#include <log.h>
#include <asm/cache.h>
static int cleanup_before_linux(void)
{
disable_interrupts();
sync_n_cleanup_cache_all();
return 0;
}
__weak int board_prep_linux(struct bootm_headers *images) { return 0; }
/* Subcommand: PREP */
static int boot_prep_linux(struct bootm_headers *images)
{
int ret;
if (IS_ENABLED(CONFIG_LMB)) {
ret = image_setup_linux(images);
if (ret)
return ret;
}
return board_prep_linux(images);
}
/* Generic implementation for single core CPU */
__weak void board_jump_and_run(ulong entry, int zero, int arch, uint params)
{
void (*kernel_entry)(int zero, int arch, uint params);
kernel_entry = (void (*)(int, int, uint))entry;
kernel_entry(zero, arch, params);
}
/* Subcommand: GO */
static void boot_jump_linux(struct bootm_headers *images, int flag)
{
ulong kernel_entry;
unsigned int r0, r2;
kernel_entry = images->ep;
debug("## Transferring control to Linux (at address %08lx)...\n",
kernel_entry);
bootstage_mark(BOOTSTAGE_ID_RUN_OS);
bootm_final(flag);
if (CONFIG_IS_ENABLED(OF_LIBFDT) && images->ft_len) {
r0 = 2;
r2 = (unsigned int)images->ft_addr;
} else {
r0 = 1;
r2 = (unsigned int)env_get("bootargs");
}
cleanup_before_linux();
if (!(flag & BOOTM_STATE_OS_FAKE_GO))
board_jump_and_run(kernel_entry, r0, 0, r2);
}
int do_bootm_linux(int flag, struct bootm_info *bmi)
{
struct bootm_headers *images = bmi->images;
/* No need for those on ARC */
if ((flag & BOOTM_STATE_OS_BD_T) || (flag & BOOTM_STATE_OS_CMDLINE))
return -1;
if (flag & BOOTM_STATE_OS_PREP)
return boot_prep_linux(images);
if (flag & (BOOTM_STATE_OS_GO | BOOTM_STATE_OS_FAKE_GO)) {
boot_jump_linux(images, flag);
return 0;
}
return -1;
}

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// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
*/
#include <config.h>
#include <cpu_func.h>
#include <asm/global_data.h>
#include <linux/bitops.h>
#include <linux/compiler.h>
#include <linux/errno.h>
#include <linux/kernel.h>
#include <linux/log2.h>
#include <asm/arcregs.h>
#include <asm/arc-bcr.h>
#include <asm/cache.h>
/*
* [ NOTE 1 ]:
* Data cache (L1 D$ or SL$) entire invalidate operation or data cache disable
* operation may result in unexpected behavior and data loss even if we flush
* data cache right before invalidation. That may happens if we store any context
* on stack (like we store BLINK register on stack before function call).
* BLINK register is the register where return address is automatically saved
* when we do function call with instructions like 'bl'.
*
* There is the real example:
* We may hang in the next code as we store any BLINK register on stack in
* invalidate_dcache_all() function.
*
* void flush_dcache_all() {
* __dc_entire_op(OP_FLUSH);
* // Other code //
* }
*
* void invalidate_dcache_all() {
* __dc_entire_op(OP_INV);
* // Other code //
* }
*
* void foo(void) {
* flush_dcache_all();
* invalidate_dcache_all();
* }
*
* Now let's see what really happens during that code execution:
*
* foo()
* |->> call flush_dcache_all
* [return address is saved to BLINK register]
* [push BLINK] (save to stack) ![point 1]
* |->> call __dc_entire_op(OP_FLUSH)
* [return address is saved to BLINK register]
* [flush L1 D$]
* return [jump to BLINK]
* <<------
* [other flush_dcache_all code]
* [pop BLINK] (get from stack)
* return [jump to BLINK]
* <<------
* |->> call invalidate_dcache_all
* [return address is saved to BLINK register]
* [push BLINK] (save to stack) ![point 2]
* |->> call __dc_entire_op(OP_FLUSH)
* [return address is saved to BLINK register]
* [invalidate L1 D$] ![point 3]
* // Oops!!!
* // We lose return address from invalidate_dcache_all function:
* // we save it to stack and invalidate L1 D$ after that!
* return [jump to BLINK]
* <<------
* [other invalidate_dcache_all code]
* [pop BLINK] (get from stack)
* // we don't have this data in L1 dcache as we invalidated it in [point 3]
* // so we get it from next memory level (for example DDR memory)
* // but in the memory we have value which we save in [point 1], which
* // is return address from flush_dcache_all function (instead of
* // address from current invalidate_dcache_all function which we
* // saved in [point 2] !)
* return [jump to BLINK]
* <<------
* // As BLINK points to invalidate_dcache_all, we call it again and
* // loop forever.
*
* Fortunately we may fix that by using flush & invalidation of D$ with a single
* one instruction (instead of flush and invalidation instructions pair) and
* enabling force function inline with '__attribute__((always_inline))' gcc
* attribute to avoid any function call (and BLINK store) between cache flush
* and disable.
*
*
* [ NOTE 2 ]:
* As of today we only support the following cache configurations on ARC.
* Other configurations may exist in HW but we don't support it in SW.
* Configuration 1:
* ______________________
* | |
* | ARC CPU |
* |______________________|
* ___|___ ___|___
* | | | |
* | L1 I$ | | L1 D$ |
* |_______| |_______|
* on/off on/off
* ___|______________|____
* | |
* | main memory |
* |______________________|
*
* Configuration 2:
* ______________________
* | |
* | ARC CPU |
* |______________________|
* ___|___ ___|___
* | | | |
* | L1 I$ | | L1 D$ |
* |_______| |_______|
* on/off on/off
* ___|______________|____
* | |
* | L2 (SL$) |
* |______________________|
* always on (ARCv2, HS < 3.0)
* on/off (ARCv2, HS >= 3.0)
* ___|______________|____
* | |
* | main memory |
* |______________________|
*
* Configuration 3:
* ______________________
* | |
* | ARC CPU |
* |______________________|
* ___|___ ___|___
* | | | |
* | L1 I$ | | L1 D$ |
* |_______| |_______|
* on/off must be on
* ___|______________|____ _______
* | | | |
* | L2 (SL$) |-----| IOC |
* |______________________| |_______|
* always must be on on/off
* ___|______________|____
* | |
* | main memory |
* |______________________|
*/
DECLARE_GLOBAL_DATA_PTR;
/* Bit values in IC_CTRL */
#define IC_CTRL_CACHE_DISABLE BIT(0)
/* Bit values in DC_CTRL */
#define DC_CTRL_CACHE_DISABLE BIT(0)
#define DC_CTRL_INV_MODE_FLUSH BIT(6)
#define DC_CTRL_FLUSH_STATUS BIT(8)
#define OP_INV BIT(0)
#define OP_FLUSH BIT(1)
#define OP_FLUSH_N_INV (OP_FLUSH | OP_INV)
/* Bit val in SLC_CONTROL */
#define SLC_CTRL_DIS 0x001
#define SLC_CTRL_IM 0x040
#define SLC_CTRL_BUSY 0x100
#define SLC_CTRL_RGN_OP_INV 0x200
#define CACHE_LINE_MASK (~(gd->arch.l1_line_sz - 1))
/*
* We don't want to use '__always_inline' macro here as it can be redefined
* to simple 'inline' in some cases which breaks stuff. See [ NOTE 1 ] for more
* details about the reasons we need to use always_inline functions.
*/
#define inlined_cachefunc inline __attribute__((always_inline))
static inlined_cachefunc void __ic_entire_invalidate(void);
static inlined_cachefunc void __dc_entire_op(const int cacheop);
static inlined_cachefunc void __slc_entire_op(const int op);
static inlined_cachefunc bool ioc_enabled(void);
static inline bool pae_exists(void)
{
/* TODO: should we compare mmu version from BCR and from CONFIG? */
#if (CONFIG_ARC_MMU_VER >= 4)
union bcr_mmu_4 mmu4;
mmu4.word = read_aux_reg(ARC_AUX_MMU_BCR);
if (mmu4.fields.pae)
return true;
#endif /* (CONFIG_ARC_MMU_VER >= 4) */
return false;
}
static inlined_cachefunc bool icache_exists(void)
{
union bcr_di_cache ibcr;
ibcr.word = read_aux_reg(ARC_BCR_IC_BUILD);
return !!ibcr.fields.ver;
}
static inlined_cachefunc bool icache_enabled(void)
{
if (!icache_exists())
return false;
return !(read_aux_reg(ARC_AUX_IC_CTRL) & IC_CTRL_CACHE_DISABLE);
}
static inlined_cachefunc bool dcache_exists(void)
{
union bcr_di_cache dbcr;
dbcr.word = read_aux_reg(ARC_BCR_DC_BUILD);
return !!dbcr.fields.ver;
}
static inlined_cachefunc bool dcache_enabled(void)
{
if (!dcache_exists())
return false;
return !(read_aux_reg(ARC_AUX_DC_CTRL) & DC_CTRL_CACHE_DISABLE);
}
static inlined_cachefunc bool slc_exists(void)
{
if (is_isa_arcv2()) {
union bcr_generic sbcr;
sbcr.word = read_aux_reg(ARC_BCR_SLC);
return !!sbcr.fields.ver;
}
return false;
}
enum slc_dis_status {
ST_SLC_MISSING = 0,
ST_SLC_NO_DISABLE_CTRL,
ST_SLC_DISABLE_CTRL
};
/*
* ARCv1 -> ST_SLC_MISSING
* ARCv2 && SLC absent -> ST_SLC_MISSING
* ARCv2 && SLC exists && SLC version <= 2 -> ST_SLC_NO_DISABLE_CTRL
* ARCv2 && SLC exists && SLC version > 2 -> ST_SLC_DISABLE_CTRL
*/
static inlined_cachefunc enum slc_dis_status slc_disable_supported(void)
{
if (is_isa_arcv2()) {
union bcr_generic sbcr;
sbcr.word = read_aux_reg(ARC_BCR_SLC);
if (sbcr.fields.ver == 0)
return ST_SLC_MISSING;
else if (sbcr.fields.ver <= 2)
return ST_SLC_NO_DISABLE_CTRL;
else
return ST_SLC_DISABLE_CTRL;
}
return ST_SLC_MISSING;
}
static inlined_cachefunc bool __slc_enabled(void)
{
return !(read_aux_reg(ARC_AUX_SLC_CTRL) & SLC_CTRL_DIS);
}
static inlined_cachefunc void __slc_enable(void)
{
unsigned int ctrl;
ctrl = read_aux_reg(ARC_AUX_SLC_CTRL);
ctrl &= ~SLC_CTRL_DIS;
write_aux_reg(ARC_AUX_SLC_CTRL, ctrl);
}
static inlined_cachefunc void __slc_disable(void)
{
unsigned int ctrl;
ctrl = read_aux_reg(ARC_AUX_SLC_CTRL);
ctrl |= SLC_CTRL_DIS;
write_aux_reg(ARC_AUX_SLC_CTRL, ctrl);
}
static inlined_cachefunc bool slc_enabled(void)
{
enum slc_dis_status slc_status = slc_disable_supported();
if (slc_status == ST_SLC_MISSING)
return false;
else if (slc_status == ST_SLC_NO_DISABLE_CTRL)
return true;
else
return __slc_enabled();
}
static inlined_cachefunc bool slc_data_bypass(void)
{
/*
* If L1 data cache is disabled SL$ is bypassed and all load/store
* requests are sent directly to main memory.
*/
return !dcache_enabled();
}
void slc_enable(void)
{
if (slc_disable_supported() != ST_SLC_DISABLE_CTRL)
return;
if (__slc_enabled())
return;
__slc_enable();
}
/* TODO: warn if we are not able to disable SLC */
void slc_disable(void)
{
if (slc_disable_supported() != ST_SLC_DISABLE_CTRL)
return;
/* we don't support SLC disabling if we use IOC */
if (ioc_enabled())
return;
if (!__slc_enabled())
return;
/*
* We need to flush L1D$ to guarantee that we won't have any
* writeback operations during SLC disabling.
*/
__dc_entire_op(OP_FLUSH);
__slc_entire_op(OP_FLUSH_N_INV);
__slc_disable();
}
static inlined_cachefunc bool ioc_exists(void)
{
if (is_isa_arcv2()) {
union bcr_clust_cfg cbcr;
cbcr.word = read_aux_reg(ARC_BCR_CLUSTER);
return cbcr.fields.c;
}
return false;
}
static inlined_cachefunc bool ioc_enabled(void)
{
/*
* We check only CONFIG option instead of IOC HW state check as IOC
* must be disabled by default.
*/
if (is_ioc_enabled())
return ioc_exists();
return false;
}
static inlined_cachefunc void __slc_entire_op(const int op)
{
unsigned int ctrl;
if (!slc_enabled())
return;
ctrl = read_aux_reg(ARC_AUX_SLC_CTRL);
if (!(op & OP_FLUSH)) /* i.e. OP_INV */
ctrl &= ~SLC_CTRL_IM; /* clear IM: Disable flush before Inv */
else
ctrl |= SLC_CTRL_IM;
write_aux_reg(ARC_AUX_SLC_CTRL, ctrl);
if (op & OP_INV) /* Inv or flush-n-inv use same cmd reg */
write_aux_reg(ARC_AUX_SLC_INVALIDATE, 0x1);
else
write_aux_reg(ARC_AUX_SLC_FLUSH, 0x1);
/* Make sure "busy" bit reports correct stataus, see STAR 9001165532 */
read_aux_reg(ARC_AUX_SLC_CTRL);
/* Important to wait for flush to complete */
while (read_aux_reg(ARC_AUX_SLC_CTRL) & SLC_CTRL_BUSY);
}
static void slc_upper_region_init(void)
{
/*
* ARC_AUX_SLC_RGN_START1 and ARC_AUX_SLC_RGN_END1 register exist
* only if PAE exists in current HW. So we had to check pae_exist
* before using them.
*/
if (!pae_exists())
return;
/*
* ARC_AUX_SLC_RGN_END1 and ARC_AUX_SLC_RGN_START1 are always == 0
* as we don't use PAE40.
*/
write_aux_reg(ARC_AUX_SLC_RGN_END1, 0);
write_aux_reg(ARC_AUX_SLC_RGN_START1, 0);
}
static void __slc_rgn_op(unsigned long paddr, unsigned long sz, const int op)
{
#ifdef CONFIG_ISA_ARCV2
unsigned int ctrl;
unsigned long end;
if (!slc_enabled())
return;
/*
* The Region Flush operation is specified by CTRL.RGN_OP[11..9]
* - b'000 (default) is Flush,
* - b'001 is Invalidate if CTRL.IM == 0
* - b'001 is Flush-n-Invalidate if CTRL.IM == 1
*/
ctrl = read_aux_reg(ARC_AUX_SLC_CTRL);
/* Don't rely on default value of IM bit */
if (!(op & OP_FLUSH)) /* i.e. OP_INV */
ctrl &= ~SLC_CTRL_IM; /* clear IM: Disable flush before Inv */
else
ctrl |= SLC_CTRL_IM;
if (op & OP_INV)
ctrl |= SLC_CTRL_RGN_OP_INV; /* Inv or flush-n-inv */
else
ctrl &= ~SLC_CTRL_RGN_OP_INV;
write_aux_reg(ARC_AUX_SLC_CTRL, ctrl);
/*
* Lower bits are ignored, no need to clip
* END needs to be setup before START (latter triggers the operation)
* END can't be same as START, so add (l2_line_sz - 1) to sz
*/
end = paddr + sz + gd->arch.slc_line_sz - 1;
/*
* Upper addresses (ARC_AUX_SLC_RGN_END1 and ARC_AUX_SLC_RGN_START1)
* are always == 0 as we don't use PAE40, so we only setup lower ones
* (ARC_AUX_SLC_RGN_END and ARC_AUX_SLC_RGN_START)
*/
write_aux_reg(ARC_AUX_SLC_RGN_END, end);
write_aux_reg(ARC_AUX_SLC_RGN_START, paddr);
/* Make sure "busy" bit reports correct stataus, see STAR 9001165532 */
read_aux_reg(ARC_AUX_SLC_CTRL);
while (read_aux_reg(ARC_AUX_SLC_CTRL) & SLC_CTRL_BUSY);
#endif /* CONFIG_ISA_ARCV2 */
}
static void arc_ioc_setup(void)
{
/* IOC Aperture start is equal to DDR start */
unsigned int ap_base = CFG_SYS_SDRAM_BASE;
/* IOC Aperture size is equal to DDR size */
long ap_size = CFG_SYS_SDRAM_SIZE;
/* Unsupported configuration. See [ NOTE 2 ] for more details. */
if (!slc_exists())
panic("Try to enable IOC but SLC is not present");
if (!slc_enabled())
panic("Try to enable IOC but SLC is disabled");
/* Unsupported configuration. See [ NOTE 2 ] for more details. */
if (!dcache_enabled())
panic("Try to enable IOC but L1 D$ is disabled");
if (!is_power_of_2(ap_size) || ap_size < 4096)
panic("IOC Aperture size must be power of 2 and bigger 4Kib");
/* IOC Aperture start must be aligned to the size of the aperture */
if (ap_base % ap_size != 0)
panic("IOC Aperture start must be aligned to the size of the aperture");
flush_n_invalidate_dcache_all();
/*
* IOC Aperture size decoded as 2 ^ (SIZE + 2) KB,
* so setting 0x11 implies 512M, 0x12 implies 1G...
*/
write_aux_reg(ARC_AUX_IO_COH_AP0_SIZE,
order_base_2(ap_size / 1024) - 2);
write_aux_reg(ARC_AUX_IO_COH_AP0_BASE, ap_base >> 12);
write_aux_reg(ARC_AUX_IO_COH_PARTIAL, 1);
write_aux_reg(ARC_AUX_IO_COH_ENABLE, 1);
}
static void read_decode_cache_bcr_arcv2(void)
{
#ifdef CONFIG_ISA_ARCV2
union bcr_slc_cfg slc_cfg;
if (slc_exists()) {
slc_cfg.word = read_aux_reg(ARC_AUX_SLC_CONFIG);
gd->arch.slc_line_sz = (slc_cfg.fields.lsz == 0) ? 128 : 64;
/*
* We don't support configuration where L1 I$ or L1 D$ is
* absent but SL$ exists. See [ NOTE 2 ] for more details.
*/
if (!icache_exists() || !dcache_exists())
panic("Unsupported cache configuration: SLC exists but one of L1 caches is absent");
}
#endif /* CONFIG_ISA_ARCV2 */
}
void read_decode_cache_bcr(void)
{
int dc_line_sz = 0, ic_line_sz = 0;
union bcr_di_cache ibcr, dbcr;
/*
* We don't care much about I$ line length really as there're
* no per-line ops on I$ instead we only do full invalidation of it
* on occasion of relocation and right before jumping to the OS.
* Still we check insane config with zero-encoded line length in
* presense of version field in I$ BCR. Just in case.
*/
ibcr.word = read_aux_reg(ARC_BCR_IC_BUILD);
if (ibcr.fields.ver) {
ic_line_sz = 8 << ibcr.fields.line_len;
if (!ic_line_sz)
panic("Instruction exists but line length is 0\n");
}
dbcr.word = read_aux_reg(ARC_BCR_DC_BUILD);
if (dbcr.fields.ver) {
gd->arch.l1_line_sz = dc_line_sz = 16 << dbcr.fields.line_len;
if (!dc_line_sz)
panic("Data cache exists but line length is 0\n");
}
}
void cache_init(void)
{
read_decode_cache_bcr();
if (is_isa_arcv2())
read_decode_cache_bcr_arcv2();
if (is_isa_arcv2() && ioc_enabled())
arc_ioc_setup();
if (is_isa_arcv2() && slc_exists())
slc_upper_region_init();
}
int icache_status(void)
{
return icache_enabled();
}
void icache_enable(void)
{
if (icache_exists())
write_aux_reg(ARC_AUX_IC_CTRL, read_aux_reg(ARC_AUX_IC_CTRL) &
~IC_CTRL_CACHE_DISABLE);
}
void icache_disable(void)
{
if (!icache_exists())
return;
__ic_entire_invalidate();
write_aux_reg(ARC_AUX_IC_CTRL, read_aux_reg(ARC_AUX_IC_CTRL) |
IC_CTRL_CACHE_DISABLE);
}
/* IC supports only invalidation */
static inlined_cachefunc void __ic_entire_invalidate(void)
{
if (!icache_enabled())
return;
/* Any write to IC_IVIC register triggers invalidation of entire I$ */
write_aux_reg(ARC_AUX_IC_IVIC, 1);
/*
* As per ARC HS databook (see chapter 5.3.3.2)
* it is required to add 3 NOPs after each write to IC_IVIC.
*/
__builtin_arc_nop();
__builtin_arc_nop();
__builtin_arc_nop();
read_aux_reg(ARC_AUX_IC_CTRL); /* blocks */
}
void invalidate_icache_all(void)
{
__ic_entire_invalidate();
/*
* If SL$ is bypassed for data it is used only for instructions,
* so we need to invalidate it too.
*/
if (is_isa_arcv2() && slc_data_bypass())
__slc_entire_op(OP_INV);
}
int dcache_status(void)
{
return dcache_enabled();
}
void dcache_enable(void)
{
if (!dcache_exists())
return;
write_aux_reg(ARC_AUX_DC_CTRL, read_aux_reg(ARC_AUX_DC_CTRL) &
~(DC_CTRL_INV_MODE_FLUSH | DC_CTRL_CACHE_DISABLE));
}
void dcache_disable(void)
{
if (!dcache_exists())
return;
__dc_entire_op(OP_FLUSH_N_INV);
/*
* As SLC will be bypassed for data after L1 D$ disable we need to
* flush it first before L1 D$ disable. Also we invalidate SLC to
* avoid any inconsistent data problems after enabling L1 D$ again with
* dcache_enable function.
*/
if (is_isa_arcv2())
__slc_entire_op(OP_FLUSH_N_INV);
write_aux_reg(ARC_AUX_DC_CTRL, read_aux_reg(ARC_AUX_DC_CTRL) |
DC_CTRL_CACHE_DISABLE);
}
/* Common Helper for Line Operations on D-cache */
static inline void __dcache_line_loop(unsigned long paddr, unsigned long sz,
const int cacheop)
{
unsigned int aux_cmd;
int num_lines;
/* d$ cmd: INV (discard or wback-n-discard) OR FLUSH (wback) */
aux_cmd = cacheop & OP_INV ? ARC_AUX_DC_IVDL : ARC_AUX_DC_FLDL;
sz += paddr & ~CACHE_LINE_MASK;
paddr &= CACHE_LINE_MASK;
num_lines = DIV_ROUND_UP(sz, gd->arch.l1_line_sz);
while (num_lines-- > 0) {
#if (CONFIG_ARC_MMU_VER == 3)
write_aux_reg(ARC_AUX_DC_PTAG, paddr);
#endif
write_aux_reg(aux_cmd, paddr);
paddr += gd->arch.l1_line_sz;
}
}
static inlined_cachefunc void __before_dc_op(const int op)
{
unsigned int ctrl;
ctrl = read_aux_reg(ARC_AUX_DC_CTRL);
/* IM bit implies flush-n-inv, instead of vanilla inv */
if (op == OP_INV)
ctrl &= ~DC_CTRL_INV_MODE_FLUSH;
else
ctrl |= DC_CTRL_INV_MODE_FLUSH;
write_aux_reg(ARC_AUX_DC_CTRL, ctrl);
}
static inlined_cachefunc void __after_dc_op(const int op)
{
if (op & OP_FLUSH) /* flush / flush-n-inv both wait */
while (read_aux_reg(ARC_AUX_DC_CTRL) & DC_CTRL_FLUSH_STATUS);
}
static inlined_cachefunc void __dc_entire_op(const int cacheop)
{
int aux;
if (!dcache_enabled())
return;
__before_dc_op(cacheop);
if (cacheop & OP_INV) /* Inv or flush-n-inv use same cmd reg */
aux = ARC_AUX_DC_IVDC;
else
aux = ARC_AUX_DC_FLSH;
write_aux_reg(aux, 0x1);
__after_dc_op(cacheop);
}
static inline void __dc_line_op(unsigned long paddr, unsigned long sz,
const int cacheop)
{
if (!dcache_enabled())
return;
__before_dc_op(cacheop);
__dcache_line_loop(paddr, sz, cacheop);
__after_dc_op(cacheop);
}
void invalidate_dcache_range(unsigned long start, unsigned long end)
{
if (start >= end)
return;
/*
* ARCv1 -> call __dc_line_op
* ARCv2 && L1 D$ disabled -> nothing
* ARCv2 && L1 D$ enabled && IOC enabled -> nothing
* ARCv2 && L1 D$ enabled && no IOC -> call __dc_line_op; call __slc_rgn_op
*/
if (!is_isa_arcv2() || !ioc_enabled())
__dc_line_op(start, end - start, OP_INV);
if (is_isa_arcv2() && !ioc_enabled() && !slc_data_bypass())
__slc_rgn_op(start, end - start, OP_INV);
}
void flush_dcache_range(unsigned long start, unsigned long end)
{
if (start >= end)
return;
/*
* ARCv1 -> call __dc_line_op
* ARCv2 && L1 D$ disabled -> nothing
* ARCv2 && L1 D$ enabled && IOC enabled -> nothing
* ARCv2 && L1 D$ enabled && no IOC -> call __dc_line_op; call __slc_rgn_op
*/
if (!is_isa_arcv2() || !ioc_enabled())
__dc_line_op(start, end - start, OP_FLUSH);
if (is_isa_arcv2() && !ioc_enabled() && !slc_data_bypass())
__slc_rgn_op(start, end - start, OP_FLUSH);
}
void flush_cache(unsigned long start, unsigned long size)
{
flush_dcache_range(start, start + size);
}
/*
* As invalidate_dcache_all() is not used in generic U-Boot code and as we
* don't need it in arch/arc code alone (invalidate without flush) we implement
* flush_n_invalidate_dcache_all (flush and invalidate in 1 operation) because
* it's much safer. See [ NOTE 1 ] for more details.
*/
void flush_n_invalidate_dcache_all(void)
{
__dc_entire_op(OP_FLUSH_N_INV);
if (is_isa_arcv2() && !slc_data_bypass())
__slc_entire_op(OP_FLUSH_N_INV);
}
void flush_dcache_all(void)
{
__dc_entire_op(OP_FLUSH);
if (is_isa_arcv2() && !slc_data_bypass())
__slc_entire_op(OP_FLUSH);
}
/*
* This is function to cleanup all caches (and therefore sync I/D caches) which
* can be used for cleanup before linux launch or to sync caches during
* relocation.
*/
void sync_n_cleanup_cache_all(void)
{
__dc_entire_op(OP_FLUSH_N_INV);
/*
* If SL$ is bypassed for data it is used only for instructions,
* and we shouldn't flush it. So invalidate it instead of flush_n_inv.
*/
if (is_isa_arcv2()) {
if (slc_data_bypass())
__slc_entire_op(OP_INV);
else
__slc_entire_op(OP_FLUSH_N_INV);
}
__ic_entire_invalidate();
}
int __weak pgprot_set_attrs(phys_addr_t addr, size_t size, enum pgprot_attrs perm)
{
return -ENOSYS;
}

View File

@@ -1,226 +0,0 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2013-2014, 2018 Synopsys, Inc. All rights reserved.
*/
#include <config.h>
#include <clock_legacy.h>
#include <init.h>
#include <malloc.h>
#include <stdio.h>
#include <asm/arcregs.h>
#include <asm/cache.h>
#include <asm/global_data.h>
#include <linux/bitops.h>
DECLARE_GLOBAL_DATA_PTR;
int arch_cpu_init(void)
{
timer_init();
gd->cpu_clk = get_board_sys_clk();
gd->ram_size = CFG_SYS_SDRAM_SIZE;
cache_init();
return 0;
}
/* This is a dummy function on arc */
int dram_init(void)
{
return 0;
}
#ifdef CONFIG_DISPLAY_CPUINFO
const char *arc_700_version(int arcver, char *name, int name_len)
{
const char *arc_ver;
switch (arcver) {
case 0x32:
arc_ver = "v4.4-4.5";
break;
case 0x33:
arc_ver = "v4.6-v4.9";
break;
case 0x34:
arc_ver = "v4.10";
break;
case 0x35:
arc_ver = "v4.11";
break;
default:
arc_ver = "unknown version";
}
snprintf(name, name_len, "ARC 700 %s", arc_ver);
return name;
}
struct em_template_t {
const bool cache;
const bool dsp;
const bool xymem;
const char name[8];
};
static const struct em_template_t em_versions[] = {
{false, false, false, "EM4"},
{true, false, false, "EM6"},
{false, true, false, "EM5D"},
{true, true, false, "EM7D"},
{false, true, true, "EM9D"},
{true, true, true, "EM11D"},
};
const char *arc_em_version(int arcver, char *name, int name_len)
{
const char *arc_name = "EM";
const char *arc_ver;
bool cache = ARC_FEATURE_EXISTS(ARC_BCR_IC_BUILD);
bool dsp = ARC_FEATURE_EXISTS(ARC_AUX_DSP_BUILD);
bool xymem = ARC_FEATURE_EXISTS(ARC_AUX_XY_BUILD);
int i;
for (i = 0; i < sizeof(em_versions) / sizeof(struct em_template_t); i++) {
if (em_versions[i].cache == cache &&
em_versions[i].dsp == dsp &&
em_versions[i].xymem == xymem) {
arc_name = em_versions[i].name;
break;
}
}
switch (arcver) {
case 0x41:
arc_ver = "v1.1a";
break;
case 0x42:
arc_ver = "v3.0";
break;
case 0x43:
arc_ver = "v4.0";
break;
case 0x44:
arc_ver = "v5.0";
break;
default:
arc_ver = "unknown version";
}
snprintf(name, name_len, "ARC %s %s", arc_name, arc_ver);
return name;
}
struct hs_template_t {
const bool cache;
const bool mmu;
const bool dual_issue;
const bool dsp;
const char name[8];
};
static const struct hs_template_t hs_versions[] = {
{false, false, false, false, "HS34"},
{true, false, false, false, "HS36"},
{true, true, false, false, "HS38"},
{false, false, true, false, "HS44"},
{true, false, true, false, "HS46"},
{true, true, true, false, "HS48"},
{false, false, true, true, "HS45D"},
{true, false, true, true, "HS47D"},
};
const char *arc_hs_version(int arcver, char *name, int name_len)
{
const char *arc_name = "HS";
const char *arc_ver;
bool cache = ARC_FEATURE_EXISTS(ARC_BCR_IC_BUILD);
bool dsp = ARC_FEATURE_EXISTS(ARC_AUX_DSP_BUILD);
bool mmu = !!read_aux_reg(ARC_AUX_MMU_BCR);
bool dual_issue = arcver == 0x54 ? true : false;
int i;
for (i = 0; i < sizeof(hs_versions) / sizeof(struct hs_template_t); i++) {
if (hs_versions[i].cache == cache &&
hs_versions[i].mmu == mmu &&
hs_versions[i].dual_issue == dual_issue &&
hs_versions[i].dsp == dsp) {
arc_name = hs_versions[i].name;
break;
}
}
switch (arcver) {
case 0x50:
arc_ver = "v1.0";
break;
case 0x51:
arc_ver = "v2.0";
break;
case 0x52:
arc_ver = "v2.1c";
break;
case 0x53:
arc_ver = "v3.0";
break;
case 0x54:
arc_ver = "v4.0";
break;
default:
arc_ver = "unknown version";
}
snprintf(name, name_len, "ARC %s %s", arc_name, arc_ver);
return name;
}
const char *decode_identity(void)
{
#define MAX_CPU_NAME_LEN 64
int arcver = read_aux_reg(ARC_AUX_IDENTITY) & 0xff;
char *name = malloc(MAX_CPU_NAME_LEN);
if (arcver >= 0x50)
return arc_hs_version(arcver, name, MAX_CPU_NAME_LEN);
else if (arcver >= 0x40)
return arc_em_version(arcver, name, MAX_CPU_NAME_LEN);
else if (arcver >= 0x30)
return arc_700_version(arcver, name, MAX_CPU_NAME_LEN);
else
return "Unknown ARC core";
}
const char *decode_subsystem(void)
{
int subsys_type = read_aux_reg(ARC_AUX_SUBSYS_BUILD) & GENMASK(3, 0);
switch (subsys_type) {
case 0: return NULL;
case 2: return "ARC Sensor & Control IP Subsystem";
case 3: return "ARC Data Fusion IP Subsystem";
case 4: return "ARC Secure Subsystem";
default: return "Unknown subsystem";
};
}
__weak int print_cpuinfo(void)
{
const char *subsys_name = decode_subsystem();
char mhz[8];
printf("CPU: %s at %s MHz\n", decode_identity(),
strmhz(mhz, gd->cpu_clk));
if (subsys_name)
printf("Subsys:%s\n", subsys_name);
return 0;
}
#endif /* CONFIG_DISPLAY_CPUINFO */

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@@ -1,14 +0,0 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2013-2015 Synopsys, Inc. All rights reserved.
*/
#include <init.h>
#include <asm/cache.h>
int init_cache_f_r(void)
{
sync_n_cleanup_cache_all();
return 0;
}

View File

@@ -1,169 +0,0 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
*/
#include <irq_func.h>
#include <vsprintf.h>
#include <asm/arcregs.h>
#include <asm/ptrace.h>
/* Bit values in STATUS32 */
#define E1_MASK (1 << 1) /* Level 1 interrupts enable */
#define E2_MASK (1 << 2) /* Level 2 interrupts enable */
int interrupt_init(void)
{
return 0;
}
/*
* returns true if interrupts had been enabled before we disabled them
*/
int disable_interrupts(void)
{
int status = read_aux_reg(ARC_AUX_STATUS32);
int state = (status & (E1_MASK | E2_MASK)) ? 1 : 0;
status &= ~(E1_MASK | E2_MASK);
/* STATUS32 register is updated indirectly with "FLAG" instruction */
__asm__("flag %0" : : "r" (status));
return state;
}
void enable_interrupts(void)
{
unsigned int status = read_aux_reg(ARC_AUX_STATUS32);
status |= E1_MASK | E2_MASK;
/* STATUS32 register is updated indirectly with "FLAG" instruction */
__asm__("flag %0" : : "r" (status));
}
static void print_reg_file(long *reg_rev, int start_num)
{
unsigned int i;
/* Print 3 registers per line */
for (i = start_num; i < start_num + 25; i++) {
printf("r%02u: 0x%08lx\t", i, (unsigned long)*reg_rev);
if (((i + 1) % 3) == 0)
printf("\n");
/* Because pt_regs has registers reversed */
reg_rev--;
}
/* Add new-line if none was inserted in the end of loop above */
if (((i + 1) % 3) != 0)
printf("\n");
}
void show_regs(struct pt_regs *regs)
{
printf("ECR:\t0x%08lx\n", regs->ecr);
printf("RET:\t0x%08lx\nBLINK:\t0x%08lx\nSTAT32:\t0x%08lx\n",
regs->ret, regs->blink, regs->status32);
printf("GP: 0x%08lx\t r25: 0x%08lx\t\n", regs->r26, regs->r25);
printf("BTA: 0x%08lx\t SP: 0x%08lx\t FP: 0x%08lx\n", regs->bta,
regs->sp, regs->fp);
printf("LPS: 0x%08lx\tLPE: 0x%08lx\tLPC: 0x%08lx\n", regs->lp_start,
regs->lp_end, regs->lp_count);
print_reg_file(&(regs->r0), 0);
}
void bad_mode(struct pt_regs *regs)
{
if (regs)
show_regs(regs);
panic("Resetting CPU ...\n");
}
void do_memory_error(unsigned long address, struct pt_regs *regs)
{
printf("Memory error exception @ 0x%lx\n", address);
bad_mode(regs);
}
void do_instruction_error(unsigned long address, struct pt_regs *regs)
{
printf("Instruction error exception @ 0x%lx\n", address);
bad_mode(regs);
}
void do_machine_check_fault(unsigned long address, struct pt_regs *regs)
{
printf("Machine check exception @ 0x%lx\n", address);
bad_mode(regs);
}
void do_interrupt_handler(void)
{
printf("Interrupt fired\n");
bad_mode(0);
}
void do_itlb_miss(struct pt_regs *regs)
{
printf("I TLB miss exception\n");
bad_mode(regs);
}
void do_dtlb_miss(struct pt_regs *regs)
{
printf("D TLB miss exception\n");
bad_mode(regs);
}
void do_tlb_prot_violation(unsigned long address, struct pt_regs *regs)
{
printf("TLB protection violation or misaligned access @ 0x%lx\n",
address);
bad_mode(regs);
}
void do_privilege_violation(struct pt_regs *regs)
{
printf("Privilege violation exception\n");
bad_mode(regs);
}
void do_trap(struct pt_regs *regs)
{
printf("Trap exception\n");
bad_mode(regs);
}
void do_extension(struct pt_regs *regs)
{
printf("Extension instruction exception\n");
bad_mode(regs);
}
#ifdef CONFIG_ISA_ARCV2
void do_swi(struct pt_regs *regs)
{
printf("Software Interrupt exception\n");
bad_mode(regs);
}
void do_divzero(unsigned long address, struct pt_regs *regs)
{
printf("Division by zero exception @ 0x%lx\n", address);
bad_mode(regs);
}
void do_dcerror(struct pt_regs *regs)
{
printf("Data cache consistency error exception\n");
bad_mode(regs);
}
void do_maligned(unsigned long address, struct pt_regs *regs)
{
printf("Misaligned data access exception @ 0x%lx\n", address);
bad_mode(regs);
}
#endif

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