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3 Commits

Author SHA1 Message Date
wdenk
ef0630617e *** empty log message *** 2003-06-27 23:21:41 +00:00
wdenk
a807645ee6 Add support for EXBITGEN board 2003-06-27 23:19:19 +00:00
wdenk
91a0ce965d Add support for SL8245 board 2003-06-27 22:44:25 +00:00
12303 changed files with 515087 additions and 1751756 deletions

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# Not Linux, so don't expect a Linux tree.
--no-tree
# Temporary for false positive in checkpatch
--ignore COMPLEX_MACRO
# For CONFIG_SYS_I2C_NOPROBES
--ignore MULTISTATEMENT_MACRO_USE_DO_WHILE
# For simple_strtoul
--ignore CONSIDER_KSTRTO
# For min/max
--ignore MINMAX
# enable more tests
--strict
# Not Linux, so we don't recommend usleep_range() over udelay()
--ignore USLEEP_RANGE
# Ignore networking block comment style
--ignore NETWORKING_BLOCK_COMMENT_STYLE

85
.gitignore vendored
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#
# NOTE! Don't add files that are generated in specific
# subdirectories here. Add them in the ".gitignore" file
# in that subdirectory instead.
#
# Normal rules
#
.*
*.o
*.o.*
*.a
*.s
*.su
*.mod.c
*.i
*.lst
*.order
*.elf
*.swp
*.bin
*.patch
*.cfgtmp
# host programs on Cygwin
*.exe
# Build tree
/build-*
#
# Top-level generic files
#
/MLO*
/SPL
/System.map
/u-boot*
/boards.cfg
#
# git files that we don't want to ignore even it they are dot-files
#
!.gitignore
!.mailmap
#
# Generated files
#
/LOG
/spl/
/tpl/
#
# Generated include files
#
/include/config/
/include/generated/
# stgit generated dirs
patches-*
.stgit-edit.txt
# quilt's files
patches
series
# gdb files
.gdb_history
# cscope files
cscope.*
# tags files
/tags
/ctags
/etags
# gnu global files
GPATH
GRTAGS
GSYMS
GTAGS
*.orig
*~
\#*#

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#
# This list is used by git-shortlog to fix a few botched name translations
# in the git archive, either because the author's full name was messed up
# and/or not always written the same way, making contributions from the
# same person appearing not to be so or badly displayed.
#
# This file can be modified by hand or updated by the following command:
# scripts/mailmapper > tmp; mv tmp .mailmap
#
Allen Martin <amartin@nvidia.com>
Andreas Bießmann <andreas.devel@googlemail.com>
Aneesh V <aneesh@ti.com>
Dirk Behme <dirk.behme@googlemail.com>
Fabio Estevam <fabio.estevam@freescale.com>
Jagannadha Sutradharudu Teki <402jagan@gmail.com>
Markus Klotzbuecher <mk@denx.de>
Prabhakar Kushwaha <prabhakar@freescale.com>
Rajeshwari Shinde <rajeshwari.s@samsung.com>
Sandeep Paulraj <s-paulraj@ti.com>
Shaohui Xie <Shaohui.Xie@freescale.com>
Stefan Roese <stroese>
Stefano Babic <sbabic@denx.de>
TsiChung Liew <Tsi-Chung.Liew@freescale.com>
Wolfgang Denk <wdenk>
York Sun <yorksun@freescale.com>
Łukasz Majewski <l.majewski@samsung.com>

816
CHANGELOG Normal file
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======================================================================
Changes since U-Boot 0.4.0:
======================================================================
* Add support for EXBITGEN board
* Add support for SL8245 board
======================================================================
Changes for U-Boot 0.4.0:
======================================================================
* Patches by Robert Schwebel, 26 Jun 2003:
- logdl
- csb226
- innokom
* Patch by Pantelis Antoniou, 25 Jun 2003:
update NetVia with V2 board support
* Header file cleanup for ARM
* Patch by Murray Jensen, 24 Jun 2003:
- make sure to use only U-boot provided header files
- fix problems with ".rodata.str1.4" section as used by GCC-3.x
* Patch by Stefan Roese, 24 Jun 2003:
- Update esd ASH405 board files.
- Update esd DASA_SIM config file.
- Add ping command to some esd boards.
* Patch by Yuli Barcohen, 23 Jun 2003:
Update for MPC8260ADS board
* Patch by Murray Jensen, 23 Jun 2003:
- cleanup of GCC 3.x compiler warnings
* Patch by Rune Torgersen, 4 Jun 2003:
add large memory support for MPC8266ADS board
* Patch by Richard Woodruff, 19 June 03:
- Enabled standard u-boot device abstraction for ARM
- Enabled console device for ARM
- Initilized bi_baudrate for ARM
* Patch by Bill Hargen, 23 Apr 2003:
fix byte order for 824x I2C addresses (write op)
* Patch by Murray Jensen, 20 Jun 2003:
- hymod update
- cleanup (especially for gcc-3.x compilers)
* Patch by Tom Guilliams, 20 Jun 2003:
added CONFIG_750FX support for IBM 750FX processors
* Patch by Devin Crumb, 02 Apr 2003:
Fix clock divider rounding problem in drivers/serial.c
* Patch by Richard Woodruff, 19 June 03:
- Fixed smc91c111 driver to sync with the u-boot environment
(driver/smc91c111.c).
- Added eth_init error return check in NetLoop (net/net.c).
* Patch by Ken Chou, 19 June 2003:
Added support for A3000 SBC board (Artis Microsystems Inc.)
* Patches by Murray Jensen, 17 Jun 2003:
- Hymod board database mods: add "who" field and new xilinx chip types
- provide new "init_cmd_timeout()" function so code external to
"common/main.c" can use the "reset_cmd_timeout()" function before
entering the main loop
- add DTT support for adm1021 (new file dtt/adm1021.c; config
slightly different. see include/configs/hymod.h for an example
(requires CONFIG_DTT_ADM1021, CONFIG_DTT_SENSORS, and
CFG_DTT_ADM1021 defined)
- add new "eeprom_probe()" function which has similar args and
behaves in a similar way to "eeprom_read()" etc.
- add 8260 FCC ethernet loopback code (new "eth_loopback_test()"
function which is enabled by defining CONFIG_ETHER_LOOPBACK_TEST)
- gdbtools copyright update
- ensure that set_msr() executes the "sync" and "isync" instructions
after the "mtmsr" instruction in cpu/mpc8260/interrupts.c
- 8260 I/O ports fix: Open Drain should be set last when configuring
- add SIU IRQ defines for 8260
- allow LDSCRIPT override and OBJCFLAGS initialization: change to
config.mk to allow board configurations to override the GNU
linker script, selected via the LDSCRIPT, make variable, and to
give an initial value to the OBJCFLAGS make variable
- 8260 i2c enhancement:
o correctly extends the timeout depending on the size of all
queued messages for both transmit and receive
o will not continue with receive if transmit times out
o ensures that the error callback is done for all queued tx
and rx messages
o correctly detects both tx and rx timeouts, only delivers one to
the callback, and does not overwrite an earlier error
o logic in i2c_probe now correct
- add "vprintf()" function so that "panic()" function can be
technically correct
- many Hymod board changes
* Patches by Robert Schwebel, 14 Jun 2003:
- add support for Logotronic DL datalogger board
- cleanup serial line after kermit binary download
- add debugX macro (debug level support)
- update mach-types.h to latest arm.linux.org.uk master list.
* Patches by David Müller, 12 Jun 2003:
- rewrite of the S3C24X0 register definitions stuff
- "driver" for the built-in S3C24X0 RTC
* Patches by Yuli Barcohen, 12 Jun 2003:
- Add MII support and Ethernet PHY initialization for MPC8260ADS board
- Fix incorrect SIUMCR initialisation caused by wrong Hard Reset
configuration word supplied by FPGA on some MPC8260ADS boards
* Patch by Pantelis Antoniou, 10 Jun 2003:
Unify status LED interface
* Add support for DS12887 RTC; add RTC support for ATC board
* Patch by Nicolas Lacressonniere, 11 Jun 2003:
Modifications for Atmel AT91RM9200DK ARM920T based development kit
- Add Atmel DataFlash support for reading and writing.
- Add possibility to boot a Linux from DataFlash with BOOTM command.
- Add Flash detection on Atmel AT91RM9200DK
(between Atmel AT49BV1614 and AT49BV1614A flashes)
- Replace old Ethernet PHY layer functions
- Change link address
* Patch by Frank Smith, 9 Jun 2003:
use CRIT_EXCEPTION for machine check on 4xx
* Patch by Detlev Zundel, 13 Jun 2003:
added implementation of the "carinfo" command in cmd_immap.c
* Fix CONFIG_NET_MULTI support in include/net.h
* Patches by Kyle Harris, 13 Mar 2003:
- Add FAT partition support
- Add command support for FAT
- Add command support for MMC
----
- Add Intel PXA support for video
- Add Intel PXA support for MMC
----
- Enable MMC and FAT for lubbock board
- Other misc changes for lubbock board
* Patch by Robert Schwebel, April 02, 2003:
fix for SMSC91111 driver
* Patch by Vladimir Gurevich, 04 Jun 2003:
make ppc405 ethernet driver compatible with CONFIG_NET_MULTI option
* Patch by Stefan Roese, 05 Jun 2003:
- PPC4xx: Fix bug for initial stack in data cache as pointed out by
Thomas Schaefer (tschaefer@giga-stream.de). Now inital stack in
data cache can be used even if the chip select is in use.
- CFG_RX_ETH_BUFFER added to set the ethernet receive buffer count
(see README for further description).
- Changed config files of CONFIG_EEPRO100 boards to use the
CFG_RX_ETH_BUFFER define.
* Add support for RMU board
* Add support for TQM862L at 100/50 MHz
* Patch by Pantelis Antoniou, 02 Jun 2003:
major reconstruction of networking code;
add "ping" support (outgoing only!)
* Patch by Denis Peter, 04 June 2003:
add support for the MIP405T board
* Patches by Udi Finkelstein, 2 June 2003:
- Added support for custom keyboards, initialized by defining a
board-specific drv_keyboard_init as well as defining CONFIG_KEYBOARD .
- Added support for the RBC823 board.
- cpu/mpc8xx/lcd.c now automatically calculates the
Horizontal Pixel Count field.
* Fix alignment problem in BOOTP (dhcp_leasetime option)
[pointed out by Nicolas Lacressonnière, 2 Jun 2003]
* Patch by Mark Rakes, 14 May 2003:
add support for Intel e1000 gig cards.
* Patch by Nye Liu, 3 Jun 2003:
fix critical typo in MAMR definition (include/mpc8xx.h)
* Fix requirement to align U-Boot image on 16 kB boundaries on PPC.
* Patch by Klaus Heydeck, 2 Jun 2003
Minor changes for KUP4K configuration
* Patch by Marc Singer, 29 May 2003:
Fixed rarp boot method for IA32 and other little-endian CPUs.
* Patch by Marc Singer, 28 May 2003:
Added port I/O commands.
* Patch by Matthew McClintock, 28 May 2003
- cpu/mpc824x/start.S: fix relocation code when booting from RAM
- minor patches for utx8245
* Patch by Daniel Engström, 28 May 2003:
x86 update
* Patch by Dave Ellis, 9 May 2003 + 27 May 2003:
add nand flash support to SXNI855T configuration
fix/extend nand flash support:
- fix 'nand erase' command so does not erase bad blocks
- fix 'nand write' command so does not write to bad blocks
- fix nand_probe() so handles no flash detected properly
- add doc/README.nand
- add .jffs2 and .oob options to nand read/write
- add 'nand bad' command to list bad blocks
- add 'clean' option to 'nand erase' to write JFFS2 clean markers
- make NAND read/write faster
* Patch by Rune Torgersen, 23 May 2003:
Update for MPC8266ADS board
* Get (mostly) rid of CFG_MONITOR_LEN definition; compute real length
instead CFG_MONITOR_LEN is now only used to determine _at_compile_
_time_ (!) if the environment is embedded within the U-Boot image,
or in a separate flash sector.
* Cleanup CFG_DER #defines in config files (wd maintained only)
* Fix data abort exception handling for arm920t CPU
* Fix alignment problems with flash driver for TRAB board
* Patch by Donald White, 21 May 2003:
fix calculation of base address in pci_hose_config_device()
* Fix bug in command line parsing: "cmd1;cmd2" is supposed to always
execute "cmd2", even if "cmd1" fails. Note that this is different
to "run var1 var2" where the contents of "var2" will NOT be
executed when a command in "var1" fails.
* Add zero-copy ramdisk support (requires corresponding kernel support!)
* Patch by Kyle Harris, 20 May 2003:
In preparation for an ixp port, rename cpu/xscale and arch-xscale
into cpu/pxa and arch-pxa.
* Patch by Stefan Roese, 23 May 2003:
- IBM PPC405EP port added.
- CONFIG_UART1_CONSOLE added. If defined internal UART1 (and not
UART0) is used as default U-Boot console. PPC4xx only!
- esd ASH405 board added (PPC405EP based).
- BUBINGA405EP board added (PPC405EP based - IBM Eval Board).
- esd CPCI405AB board added.
- esd PMC405 board added.
- Update of some esd boards.
* Patch by Denis Peter, 19 Mai 2003:
add support for the MIP405-3 board
* Patch by Dave Ellis, 22 May 2003:
Fix problem with only partially cleared .bss segment
* Patch by Rune Torgersen, 12 May 2003:
get PCI to work on a MPC8266ADS board; incorporate change to
cpu/mpc8260/pci.c to enable overrides of PCI memory parameters
* Patch by Nye Liu, 1 May 2003:
minor patches for the FADS8xx
* Patch by Thomas Schäfer, 28 Apr 2003:
Fix SPD handling for 256 ECC DIMM on Walnut
* Add support for arbitrary bitmaps for TRAB's VFD command;
allow to pass boot bitmap addresses in environment variables;
allow for zero boot delay
* Patch by Christian Geißinger, 19 May 2002:
On TRAB: wait until the dummy byte has been completely sent
* Patch by David Updegraff, 22 Apr 2003:
update for CrayL1 board
* Patch by Pantelis Antoniou, 21 Apr 2003:
add boot support for ARTOS (a proprietary OS)
* Patch by Steven Scholz, 11 Apr 2003:
Add support for RTC DS1338
* Patch by Rod Boyce, 24 Jan 2003:
Fix counting of extended partitions in diskboot command
* Patch by Christophe Lindheimer, 20 May 2003:
allow the use of CFG_LOADS when CFG_NO_FLASH is set
* Fix SDRAM timing on Purple board
* Add support for CompactFlash on ATC board
(includes support for Intel 82365 and compatible PC Card controllers,
and Yenta-compatible PCI-to-CardBus controllers)
* Patch by Mathijs Haarman, 08 May 2003:
Add lan91c96 driver (tested on Lubbock and custom PXA250 board only)
* Fix problem with usage of "true" (undefined in current versions of bfd.h)
* Add support for Promess ATC board
* Patch by Keith Outwater, 28 Apr 2003:
- Miscellaneous corrections and additions to GEN860T board specific code.
- Added GEN860_SC variant to GEN860T.
- Miscellaneous corrections to GEN860T documentation.
- Correct duplicate entry in U-Boot CREDITS file.
- Add GEN860T_SC entry in MAINTAINERS file.
- Update CREDITS file with GEN860T_SC info.
* Update Smiths Aerospace addresses in MAINTAINERS file
* Fix error handling in hush's version of "run" command
* LWMON extensions:
- Splashscreen support
- modem support
- sysmon support
- temperature dependend enabling of LCD
* Allow booting from old "PPCBoot" disk partitions
* Add support for TQM8255 Board / MPC8255 CPU
======================================================================
Changes for U-Boot 0.3.1:
======================================================================
* Make sure Block Lock Bits get cleared in R360MPI flash driver
* MPC823 LCD driver: Fill color map backwards, to allow for steady
display when Linux takes over
* Patch by Erwin Rol, 27 Feb 2003:
Add support for RTEMS (this time for real).
* Add support for "bmp info" and "bmp display" commands to load
bitmap images; this can be used (for example in a "preboot"
command) to display a splash screen very quickly after poweron.
* Add support for 133 MHz clock on INCA-IP board
* Patch by Lutz Dennig, 10 Apr 2003:
Update for R360MPI board
* Add new meaning to "autostart" environment variable:
If set to "no", a standalone image passed to the
"bootm" command will be copied to the load address
(and eventually uncompressed), but NOT be started.
This can be used to load and uncompress arbitrary
data.
* Patch by Stefan Roese, 10 Apr 2003:
Changed DHCP client to use IP address from server option field #54
from the OFFER packet in the server option field #54 in the REQUEST
packet. This fixes a problem using a Windows 2000 DHCP server,
where the DHCP-server is not the TFTP-server.
* Set max brightness for MN11236 displays on TRAB board
* Add support for TQM862L modules
======================================================================
Changes for U-Boot 0.3.0:
======================================================================
* Patch by Arun Dharankar, 4 Apr 2003:
Add IDMA example code (tested on 8260 only)
* Add support for Purple Board (MIPS64 5Kc)
* Add support for MIPS64 5Kc CPUs
* Fix missing setting of "loadaddr" and "bootfile" on ARM and MIPS
* Patch by Denis Peter, 04 Apr 2003:
- update MIP405-4 board
* Patch by Stefan Roese, 4 Apr 2003:
- U-Boot version environment variable "ver" added
(CONFIG_VERSION_VARIABLE).
- Changed PPC405GPr version from A to B.
- Changed CPCI405 to use CTS instead of DSR on PPC405 UART1.
* Patches by Denis Peter, 03 April 2003:
- fix PCI IRQs on MPL boards
- fix two more un-relocated pointer problems
* Fix behaviour of "run" command:
- print error message iv variable does not exist
- terminate processing of arguments in case of error
* Patches by Peter Figuli, 10 Mar 2003
- Add support for BTUART on PXA platform
- Add support for WEP EP250 (PXA) board
* Fix flash problems on INCA-IP; add tool to allow bruning images to
flash using a BDI2000
* Implement fix for I2C Edge Conditions problem for all boards that
use the bit-banging driver (common/soft_i2c.c)
* Patch by Martin Winistoerfer, 23 Mar 2003
- Add port to MPC555/556 microcontrollers
- Add support for cmi customer board with
Intel 28F128J3A, 28F320J3A or 28F640J3A flash.
* Patch by Rick Bronson, 28 Mar 2003:
- fix common/cmd_nand.c
* Patch by Arun Dharankar, 24 Mar 2003:
- add threads / scheduler example code
* Add patches by Robert Schwebel, 31 Mar 2003:
- add ctrl-c support for kermit download
- align bdinfo output on ARM
- csb226 board: bring in sync with innokom/memsetup.S
- csb226 board: fix MDREFR handling
- misc doc fixes / extensions
- innokom board: cleanup, MDREFR fix in memsetup.S, config update
- add BOOT_PROGRESS to armlinux.c
* Add CPU ID, version, and clock speed for INCA-IP
* Patches by Dave Ellis, 18 Mar 2003 for SXNI855T board:
- fix SRAM and SDRAM memory sizing
- add status LED support
- add MAC address for second (SCC1) ethernet port
* Update default environment for TQM8260 board
* Patch by Rick Bronson, 16 Mar 2003:
- Add NAND flash support for reading, writing, and erasing NAND
flash (certain forms of which are called SmartMedia).
- Add support for Atmel AT91RM9200DK ARM920T based development kit.
* Patches by Robert Schwebel, 19 Mar 2003:
- use arm-linux-gcc as default compiler for ARM
- fix i2c fixup code
- fix missing baudrate setting
- added $loadaddr / CFG_LOAD_ADDR support to loadb
- moved "ignoring trailing characters" _before_ u-boot wants to
print out diagnostics messages; removes bogus characters at the
end of transmission
* Patch by John Zhan, 18 Mar 2003:
Add support for SinoVee Microsystems SC8xx boards
* Patch by Rolf Offermanns, 21 Mar 2003:
ported the dnp1110 related changes from the current armboot cvs to
current u-boot cvs. smc91111 does not work. problem marked in
smc91111.c, grep for "FIXME".
* Patch by Brian Auld, 25 Mar 2003:
Add support for STM flash chips on ebony board
* Add PCI support for MPC8250 Boards (PM825 module)
* Patch by Stefan Roese, 25 Mar 2003:
- PCI405 update.
* Patch by Stefan Roese, 20 Mar 2003:
- CPCI4052 update (support for revision 3).
- Set edge conditioning circuitry on PPC405GPr for compatibility
to existing PPC405GP designs.
- Clip udiv to 5 bits on PPC405 (serial.c).
* Extend INCAIP board support:
- add automatic RAM size detection
- add "bdinfo" command
- pass flash address and size to Linux kernel
- switch to 150 MHz clock
* Avoid flicker on the TRAB's VFD by synchronizing the enable with
the HSYNC/VSYNC. Requires new CPLD code (Version 101 for Rev. 100
boards, version 153 for Rev. 200 boards).
* Patch by Vladimir Gurevich, 12 Mar 2003:
Fix relocation problem of statically initialized string pointers
in common/cmd_pci.c
* Patch by Kai-Uwe Blöm, 12 Mar 2003:
Cleanup & bug fixes for JFFS2 code:
- the memory mangement was broken. It caused havoc on malloc by
writing beyond the block boundaries.
- the length calculation for files was wrong, sometimes resulting
in short file reads.
- data copying now optionally takes fragment version numbers into
account, to avoid copying from older data.
See doc/README.JFFS2 for details.
* Patch by Josef Wagner, 12 Mar 2003:
- 16/32 MB and 50/80 MHz support with auto-detection for IP860
- ETH05 and BEDBUG support for CU824
- added support for MicroSys CPC45
- new BOOTROM/FLASH0 and DOC base for PM826
* Patch by Robert Schwebel, 12 Mar 2003:
Fix the chpart command on innokom board
* Name cleanup:
mv include/asm-i386/ppcboot-i386.h include/asm-i386/u-boot-i386.h
s/PPCBoot/U-Boot/ in some files
s/pImage/uImage/ in some files
* Patch by Detlev Zundel, 15 Jan 2003:
Fix '' command line quoting
* Patch by The LEOX team, 19 Jan 2003:
- add support for the ELPT860 board
- add support for Dallas ds164x RTC
* Patches by David Müller, 31 Jan 2003:
- minimal setup for CardBus bridges
- add EEPROM read/write support in the CS8900 driver
- add support for the builtin I2C controller in the Samsung s3c24x0 chips
- add support for MPL's VCMA9 (Samsung s3c2410 based) board
* Patch by Steven Scholz, 04 Feb 2003:
add support for RTC DS1307
* Patch by Reinhard Meyer, 5 Feb 2003:
fix PLPRCR/SCCR init sequence on 8xx to allow for
changes of EBDF by software
* Patch by Vladimir Gurevich, 07 Feb 2003:
"API-compatibility patch" for 4xx I2C driver
* TRAB fixes / extensions:
- Restore VFD brightness as saved in environment
- add support for Fujitsu flashes
- make sure both buzzers are turned off (drive low level)
* Patches by Robert Schwebel, 06 Mar 2003:
- fix bug in BOOTP code (must use NetCopyIP)
- update of CSB226 port
- clear BSS segment on XScale
- added support for i2c_init_board() function
- update to the Innokom plattform
* Extend support for redundand environments for configurations where
environment size < sector size
* Patch by Rune Torgersen, 13 Feb 2003:
Add support for Motorola MPC8266ADS board
* Patch by Kyle Harris, 19 Feb 2003:
patches for the Intel lubbock board:
memsetup.S - general cleanup (based on Robert's csb226 code)
flash.c - overhaul, actually works now
lubbock.c - fix init funcs to return proper value
* Patch by Kenneth Johansson, 26 Feb 2003:
- Fixed off by one in RFTA calculation.
- No need to abort when LDF is lower than we can program it's only
minimum timing so clamp it to what we can do.
- Takes function pointer to function for reading the spd_nvram. Usefull
for faking data or hardcode a module without the nvram.
- fix other user for above change
- fix some comments.
* Patches by Brian Waite, 26 Feb 2003:
- fix port for evb64260 board
- fix PCI for evb64260 board
- fix PCI scan
* Patch by Reinhard Meyer, 1 Mar 2003:
Add support for EMK TOP860 Module
* Patch by Yuli Barcohen, 02 Mar 2003:
Add SPD EEPROM support for MPC8260ADS board
* Patch by Robert Schwebel, 21 Jan 2003:
- Add support for Innokom board
- Don't complain if "install" fails
- README cleanup (remove duplicated lines)
- Update PXA header files
* Add documentation for existing POST code (doc/README.POST)
* Patch by Laudney Ren, 15 Jan 2003:
Fix handling of redundand environment in "tools/envcrc.c"
* Patch by Detlev Zundel, 28 Feb 2003:
Add bedbug support for 824x systems
* Add support for 16 MB flash configuration of TRAB board
* Patch by Erwin Rol, 27 Feb 2003:
Add support for RTEMS
* Add image information to README
* Patch by Stefan Roese, 18 Feb 2003:
CPCIISER4 configuration updated.
* Patch by Stefan Roese, 17 Feb 2003:
Fixed bug in ext. serial clock setup on PPC405 (since PPC440 port).
* Patch by Stefan Roese, 13 Feb 2003:
Add "pcidelay" environment variable (in ms, enabled via
CONFIG_PCI_BOOTDELAY).
PCI spec 2.2 defines, that a pci target has 2^25 pci clocks after
RST# to respond to configuration cycles (33MHz -> 1s).
* Fix dual PCMCIA slot support (when running with just one
slot populated)
* Add VFD type detection to trab board
* extend drivers/cs8900.c driver to synchronize ethaddr environment
variable with value in the EEPROM
* Patch by Stefan Roese, 10 Feb 2003:
Add support for 4MB and 128MB onboard SDRAM (cpu/ppc4xx/sdram.c)
* Add support for MIPS32 4Kc CPUs
* Add support for INCA-IP Board
======================================================================
Changes for U-Boot 0.2.2:
======================================================================
* Add dual ethernet support on PM826
* Add support for LXT971 PHY on PM826
* Patch by Tord Andersson, 16 Jan 2003:
Fix flash sector count for TQM8xxL
* Fix I2C EEPROM problem on ICU862 board (would only write the first
16 bytes out of each 32 byte block)
======================================================================
Changes for U-Boot 0.2.1:
======================================================================
* Add support for V37 board
(patch by Jón Benediktsson, 11 Dec 2002)
* Update baudrate in bd_info when it gets changed
* Add watchdog trigger points while waiting for serial port
(so far only 8xx -- needed on LWMON with 100ms watchdog)
* Improve command line tool to access the U-Boot's environment
(figuration of the utility, using a config file)
* Add single quote support for (old) command line parser
* Switch LWMON board default config from FRAM to EEPROM;
in POST, EEPROM shows up on 8 addresses
======================================================================
Changes for U-Boot 0.2.0:
======================================================================
* Use 1-byte-read instead of -write for iprobe() function
Add i2c commands to PM826 config
* extend I2C POST code: check for list on known addresses
* Improve log buffer code; use "loglevel" to decide which messages
to log on the console, too (like in Linux); get rid of "logstart"
* Add command line tool to access the U-Boot's environment
(board-specific for TRAB now, to be fixed later)
* Patch by Hans-Joerg Frieden, 06 Dec 2002
Fix misc problems with AmigaOne support
* Patch by Chris Hallinan, 3 Dec 2002:
minor cleanup to the MPC8245 EPIC driver
* Patch by Pierre Aubert , 28 Nov 2002
Add support for external (SIU) interrupts on MPC8xx
* Patch by Pierre Aubert , 28 Nov 2002
Fix nested syscalls bug in standalone applications
* Patch by David Müller, 27 Nov 2002:
fix output of "pciinfo" command for CardBus bridge devices.
* Fix bug in TQM8260 board detection - boards got stuck when board ID
was not readable
* Add LED indication for IDE activity on KUP4K board
* Fix startup problems with VFD display on TRAB
* Patch by Pierre Aubert, 20 Nov 2002
Add driver for Epson SED13806 graphic controller.
Add support for BMP logos in cfb_console driver.
* Added support for both PCMCIA slots (at the same time!) on MPC8xx
* Patch by Rod Boyce, 21 Nov 2002:
fix PCMCIA on MBX8xx board
* Patch by Pierre Aubert , 21 Nov 2002
Add CFG_CPM_POST_WORD_ADDR to make the offset of the
bootmode word in DPRAM configurable
* Patch by Daniel Engström, 18 Nov 2002:
Fixes for x86 port (mostly strings issues)
* Patch by Ken Chou, 18 Nov 2002:
Fix for natsemi NIC cards (DP83815)
* Patch by Pierre Aubert, 19 Nov 2002:
fix a bug for the MII configuration, and some warnings
* Patch by Thomas Frieden, 13 Nov 2002:
Add code for AmigaOne board
(preliminary merge to U-Boot, still WIP)
* Patch by Jon Diekema, 12 Nov 2002:
- Adding URL for IEEE OUI lookup
- Making the autoboot #defines dependent on CONFIG_AUTOBOOT_KEYED
being defined.
- In the CONFIG_EXTRA_ENV_SETTINGS #define, the root-on-initrd and
root-on-nfs macros are designed to switch how the default boot
method gets defined.
* Patch by Daniel Engström, 13 Nov 2002:
Add support for i386 architecture and AMD SC520 board
* Patch by Pierre Aubert, 12 Nov 2002:
Add support for DOS filesystem and booting from DOS floppy disk
* Patch by Jim Sandoz, 07 Nov 2002:
Increase number of network RX buffers (PKTBUFSRX in
"include/net.h") for EEPRO100 based boards (especially SP8240)
which showed "Receiver is not ready" errors when U-Boot was
processing the receive buffers slower than the network controller
was filling them.
* Patch by Andreas Oberritter, 09 Nov 2002:
Change behaviour of NetLoop(): return -1 for errors, filesize
otherwise; return code 0 is valid an means no file loaded - in this
case the environment still gets updated!
* Patches by Jon Diekema, 9 Nov 2002:
- improve ADC/DAC clocking on the SACSng board to align
the failing edges of LRCLK and SCLK
- sbc8260 configuration tweaks
- add status LED support for 82xx systems
- wire sspi/sspo commands into command handler; improved error
handlering
- add timestamp support and alternate memory test to the
SACSng configuration
* Patch by Vince Husovsky, 7 Nov 2002:
Add "-n" to linker options to get rid of "Not enough room for
program headers" problem
* Patch by David Müller, 05 Nov 2002
Rename CONFIG_PLL_INPUT_FREQ to CONFIG_SYS_CLK_FREQ
so we can use an already existing name
* Patch by Pierre Aubert, 05 Nov 2002
Hardware relatied improvments in FDC boot code
* Patch by Holger Schurig, 5 Nov 2002:
Make the PXA really change it's frequency
* Patch by Pierre Aubert, 05 Nov 2002
Add support for slave serial Spartan 2 FPGAs
* Fix uninitialized memory (MAC address) in 8xx SCC/FEC ethernet
drivers
* Add support for log buffer which can be passed to Linux kernel's
syslog mechanism; used especially for POST results.
* Patch by Klaus Heydeck, 31 Oct 2002:
Add initial support for kup4k board
* Patch by Robert Schwebel, 04 Nov 2002:
- use watchdog to reset PXA250 systems
- added progress callbacks to (some of the) ARM code
- update for Cogent CSB226 board
* Add support for FPS860 board
* Patch by Guillaume Alexandre,, 04 Nov 2002:
Improve PCI access on 32-bits Compact PCI bus
* Fix mdelay() on TRAB - this was still the debugging version with
seconds instead of ms.
* Patch by Robert Schwebel, 1 Nov 2002:
XScale related cleanup (affects all ARM boards)
* Cleanup of names and README.
======================================================================
Notes for U-Boot 0.1.0:
======================================================================
This is the initial version of "Das U-Boot", the Universal Boot Loader.
It is based on version 2.0.0 (the "Halloween Release") of PPCBoot.
For information about the history of the project please see the
PPCBoot project page at http://sourceforge.net/projects/ppcboot
======================================================================

280
COPYING Normal file
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@@ -0,0 +1,280 @@
GNU GENERAL PUBLIC LICENSE
Version 2, June 1991
Copyright (C) 1989, 1991 Free Software Foundation, Inc.
59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
Everyone is permitted to copy and distribute verbatim copies
of this license document, but changing it is not allowed.
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TERMS AND CONDITIONS FOR COPYING, DISTRIBUTION AND MODIFICATION
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END OF TERMS AND CONDITIONS

304
CREDITS Normal file
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@@ -0,0 +1,304 @@
#
# Parts of the development effort for this project have been
# sponsored by SIEMENS AG, Austria. Thanks to SIEMENS for
# supporting an Open Source project!
#
#
# This is at least a partial credits-file of individual people that
# have contributed to the U-Boot project. It is sorted by name and
# formatted to allow easy grepping and beautification by scripts.
# The fields are: name (N), email (E), web-address (W), PGP key ID
# and fingerprint (P), description (D), and snail-mail address (S).
# Thanks,
#
# Wolfgang Denk
#----------
N: Dr. Bruno Achauer
E: bruno@exet-ag.de
D: Support for NetBSD (both as host and target system)
N: Swen Anderson
E: sand@peppercon.de
D: ERIC Support
N: Guillaume Alexandre
E: guillaume.alexandre@gespac.ch
D: Add PCIPPC6 configuration
N: Pantelis Antoniou
E: panto@intracom.gr
D: NETVIA board support, ARTOS support.
N: Pierre Aubert
E: <p.aubert@staubli.com>
D: Support for RPXClassic board
N: Jerry van Baren
E: <vanbaren@cideas.com>
D: BedBug port to 603e core (MPC82xx). Code for enhanced memory test.
N: Andre Beaudin
E: <andre.beaudin@colubris.com>
D: PCMCIA, Ethernet, TFTP
N: Jon Benediktsson
E: jonb@marel.is
D: Support for Marel V37 board
N: Raphael Bossek
E: raphael.bossek@solutions4linux.de
D: 8xxrom-0.3.0
N: Rick Bronson
E: rick@efn.org
D: Atmel AT91RM9200DK and NAND support
N: David Brown
E: DBrown03@harris.com
D: Extensions to 8xxrom-0.3.0
N: Oliver Brown
E: obrown@adventnetworks.com
D: Port to the gw8260 board
N: Jonathan De Bruyne
E: jonathan.debruyne@siemens.atea.be
D: Port to Siemens IAD210 board
N: Ken Chou
E: kchou@ieee.org
D: Support for A3000 SBC board
N: Conn Clark
E: clark@esteem.com
D: ESTEEM192E support
N: Magnus Damm
E: eramdam@kieray1.p.y.ki.era.ericsson.se
D: 8xxrom
N: Arun Dharankar
E: ADharankar@ATTBI.Com
D: threads / scheduler example code
N: Kári Davíðsson
E: kd@flaga.is
D: FLAGA DM Support
N: Wolfgang Denk
E: wd@denx.de
D: U-Boot initial version, continuing maintenance, ARMBoot merge
W: http://www.denx.de
N: Dan A. Dickey
E: ddickey@charter.net
D: FADS Support
N: James F. Dougherty
E: jfd@GigabitNetworks.COM
D: Port to the MOUSSE board
N: Dave Ellis
E: DGE@sixnetio.com
D: EEPROM Speedup, SXNI855T port
N: Daniel Engström
E: daniel@omicron.se
D: x86 port, Support for sc520_cdp board
N: Dr. Wolfgang Grandegger
E: wg@denx.de
D: Support for Interphase 4539 T1/E1/J1 PMC, PN62, CCM, SCM boards
W: www.denx.de
N: Peter Figuli
E: peposh@etc.sk
D: Support for WEP EP250 (PXA) board
N: Thomas Frieden
E: ThomasF@hyperion-entertainment.com
D: Support for AmigaOne
N: Frank Gottschling
E: fgottschling@eltec.de
D: Support for ELTEC MHPC/BAB7xx/ELPPC boards, cfb-console, i8042, SMI LynxEM
W: www.eltec.de
N: Marius Groeger
E: mgroeger@sysgo.de
D: MBX Support, board specific function interface, EST SBC8260 support; initial support for StrongARM (LART), ARM720TDMI (implementa A7)
W: www.elinos.com
N: Kirk Haderlie
E: khaderlie@vividimage.com
D: Added TFTP to 8xxrom (-> 0.3.1)
N: Chris Hallinan
E: clh@net1plus.com
D: DHCP Support
N: Anne-Sophie Harnois
E: Anne-Sophie.Harnois@nextream.fr
D: Port to Walnut405 board
N: Andreas Heppel
E: aheppel@sysgo.de
D: CPU Support for MPC 75x; board support for Eltec BAB750 [obsolete!]
N: August Hoeraendl
E: august.hoerandl@gmx.at
D: Support for the logodl board (PXA2xx)
N: Josh Huber
E: huber@alum.wpi.edu
D: Port to the Galileo Evaluation Board, and the MPC74xx cpu series.
W: http://www.mclx.com/
H: Stuart Hughes
E: stuarth@lineo.com
D: Port to MPC8260ADS board
H: Rich Ireland
E: r.ireland@computer.org
D: FPGA device configuration driver
N: Gary Jennejohn
E: garyj@jennejohn.org, gj@denx.de
D: Support for Samsung ARM920T S3C2400X, ARM920T "TRAB"
W: www.denx.de
N: Murray Jensen
E: Murray.Jensen@cmst.csiro.au
D: Initial 8260 support; GDB support
D: Port to Cogent+Hymod boards; Hymod Board Database
W: http://www.msa.cmst.csiro.au/ourstaff/MurrayJensen/mjj.html
N: Yoo. Jonghoon
E: yooth@ipone.co.kr
D: Added port to the RPXlite board
N: Brad Kemp
E: Brad.Kemp@seranoa.com
D: Port to Windriver ppmc8260 board
N: Thomas Koeller
E: tkoeller@gmx.net
D: Port to Motorola Sandpoint 3 (MPC8240)
N: Thomas Lange
E: thomas@corelatus.com
D: Support for GTH board; lots of PCMCIA fixes
N: The LEOX team
E: team@leox.org
D: Support for LEOX boards, DS164x RTC
W: http://www.leox.org
N: Raymond Lo
E: lo@routefree.com
D: Support for DOS partitions
N: Dan Malek
E: dan@netx4.com
D: FADSROM, the grandfather of all of this
N: Reinhard Meyer
E: r.meyer@emk-elektronik.de
D: Port to EMK TOP860 Module
N: Jay Monkman
E: jtm@smoothsmoothie.com
D: EST SBC8260 support
N: Frank Morauf
E: frank.morauf@salzbrenner.com
D: Support for Embedded Planet RPX Super Board
N: David Müller
E: d.mueller@elsoft.ch
D: Support for Samsung ARM920T SMDK2410 eval board
N: Rolf Offermanns
E: rof@sysgo.de
D: Initial support for SSV-DNP1110, SMC91111 driver
W: www.elinos.com
N: Keith Outwater
E: keith_outwater@mvis.com
D: Support for generic/custom MPC860T boards (GEN860T, GEN860T_SC)
N: Frank Panno
E: fpanno@delphintech.com
D: Support for Embedded Planet EP8260 Board
N: Denis Peter
E: d.peter@mpl.ch
D: Support for 4xx SCSI, floppy, CDROM, CT69000 video, ...
D: Support for PIP405 board
D: Support for MIP405 board
N: Bill Pitts
E: wlp@mindspring.com
D: BedBug embedded debugger code
N: Stefan Roese
E: stefan.roese@esd-electronics.com
D: IBM PPC401/403/405GP Support; Windows environment support
N: Erwin Rol
E: erwin@muffin.org
D: boot support for RTEMS
N: Neil Russell
E: caret@c-side.com
D: Author of LiMon-1.4.2, which contributed some ideas
N: Paolo Scaffardi
E: arsenio@tin.it
D: FADS823 configuration, MPC823 video support, I2C, wireless keyboard, lots more
N: Robert Schwebel
E: r.schwebel@pengutronix.de
D: Support for csb226, logodl and innokom boards (PXA2xx)
N: Rob Taylor
E: robt@flyingpig.com
D: Port to MBX860T and Sandpoint8240
N: Erik Theisen
E: etheisen@mindspring.com
D: MBX8xx and many other patches
N: Jim Thompson
E: jim@musenki.com
D: Support for MUSENKI board
N: Rune Torgersen
E: <runet@innovsys.com>
D: Support for Motorola MPC8266ADS board
N: David Updegraff
E: dave@cray.com
D: Port to Cray L1 board; DHCP vendor extensions
N: Martin Winistoerfer
E: martinwinistoerfer@gmx.ch
D: Port to MPC555/556 microcontrollers and support for cmi board
N: Christian Vejlbo
E: christian.vejlbo@tellabs.com
D: FADS860T ethernet support
N: John Zhan
E: zhanz@sinovee.com
D: Support for SinoVee Microsystems SC8xx SBC
N: Alex Zuepke
E: azu@sysgo.de
D: Overall improvements on StrongARM, ARM720TDMI; Support for Tuxscreen; initial PCMCIA support for ARM
W: www.elinos.com
N: Pantelis Antoniou
E: panto@intracom.gr
D: NETVIA board support, ARTOS support.

88
Kbuild
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@@ -1,88 +0,0 @@
#
# Kbuild for top-level directory of U-Boot
# This file takes care of the following:
# 1) Generate generic-asm-offsets.h
# 2) Generate asm-offsets.h
#####
# 1) Generate generic-asm-offsets.h
generic-offsets-file := include/generated/generic-asm-offsets.h
always := $(generic-offsets-file)
targets := $(generic-offsets-file) lib/asm-offsets.s
quiet_cmd_generic-offsets = GEN $@
define cmd_generic-offsets
(set -e; \
echo "#ifndef __GENERIC_ASM_OFFSETS_H__"; \
echo "#define __GENERIC_ASM_OFFSETS_H__"; \
echo "/*"; \
echo " * DO NOT MODIFY."; \
echo " *"; \
echo " * This file was generated by Kbuild"; \
echo " *"; \
echo " */"; \
echo ""; \
sed -ne $(sed-y) $<; \
echo ""; \
echo "#endif" ) > $@
endef
# We use internal kbuild rules to avoid the "is up to date" message from make
lib/asm-offsets.s: lib/asm-offsets.c FORCE
$(Q)mkdir -p $(dir $@)
$(call if_changed_dep,cc_s_c)
$(obj)/$(generic-offsets-file): lib/asm-offsets.s Kbuild
$(Q)mkdir -p $(dir $@)
$(call cmd,generic-offsets)
#####
# 2) Generate asm-offsets.h
#
ifneq ($(wildcard $(srctree)/arch/$(ARCH)/lib/asm-offsets.c),)
offsets-file := include/generated/asm-offsets.h
endif
always += $(offsets-file)
targets += $(offsets-file)
targets += arch/$(ARCH)/lib/asm-offsets.s
# Default sed regexp - multiline due to syntax constraints
define sed-y
"s:[[:space:]]*\.ascii[[:space:]]*\"\(.*\)\":\1:; \
/^->/{s:->#\(.*\):/* \1 */:; \
s:^->\([^ ]*\) [\$$#]*\([-0-9]*\) \(.*\):#define \1 \2 /* \3 */:; \
s:^->\([^ ]*\) [\$$#]*\([^ ]*\) \(.*\):#define \1 \2 /* \3 */:; \
s:->::; p;}"
endef
CFLAGS_asm-offsets.o := -DDO_DEPS_ONLY
quiet_cmd_offsets = GEN $@
define cmd_offsets
(set -e; \
echo "#ifndef __ASM_OFFSETS_H__"; \
echo "#define __ASM_OFFSETS_H__"; \
echo "/*"; \
echo " * DO NOT MODIFY."; \
echo " *"; \
echo " * This file was generated by Kbuild"; \
echo " *"; \
echo " */"; \
echo ""; \
sed -ne $(sed-y) $<; \
echo ""; \
echo "#endif" ) > $@
endef
# We use internal kbuild rules to avoid the "is up to date" message from make
arch/$(ARCH)/lib/asm-offsets.s: arch/$(ARCH)/lib/asm-offsets.c FORCE
$(Q)mkdir -p $(dir $@)
$(call if_changed_dep,cc_s_c)
$(obj)/$(offsets-file): arch/$(ARCH)/lib/asm-offsets.s Kbuild
$(call cmd,offsets)

160
Kconfig
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@@ -1,160 +0,0 @@
#
# For a description of the syntax of this configuration file,
# see Documentation/kbuild/kconfig-language.txt.
#
mainmenu "U-Boot $UBOOTVERSION Configuration"
config UBOOTVERSION
string
option env="UBOOTVERSION"
config KCONFIG_OBJDIR
string
option env="KCONFIG_OBJDIR"
menu "General setup"
config LOCALVERSION
string "Local version - append to U-Boot release"
depends on !SPL_BUILD
help
Append an extra string to the end of your U-Boot version.
This will show up on your boot log, for example.
The string you set here will be appended after the contents of
any files with a filename matching localversion* in your
object and source tree, in that order. Your total string can
be a maximum of 64 characters.
config LOCALVERSION_AUTO
bool "Automatically append version information to the version string"
depends on !SPL_BUILD
default y
help
This will try to automatically determine if the current tree is a
release tree by looking for git tags that belong to the current
top of tree revision.
A string of the format -gxxxxxxxx will be added to the localversion
if a git-based tree is found. The string generated by this will be
appended after any matching localversion* files, and after the value
set in CONFIG_LOCALVERSION.
(The actual string used here is the first eight characters produced
by running the command:
$ git rev-parse --verify HEAD
which is done within the script "scripts/setlocalversion".)
config CC_OPTIMIZE_FOR_SIZE
bool "Optimize for size"
depends on !SPL_BUILD
default y
help
Enabling this option will pass "-Os" instead of "-O2" to gcc
resulting in a smaller U-Boot image.
This option is enabled by default for U-Boot.
menuconfig EXPERT
bool "Configure standard U-Boot features (expert users)"
help
This option allows certain base U-Boot options and settings
to be disabled or tweaked. This is for specialized
environments which can tolerate a "non-standard" U-Boot.
Only use this if you really know what you are doing.
endmenu # General setup
menu "Boot images"
config SPL_BUILD
bool
depends on $KCONFIG_OBJDIR="spl" || $KCONFIG_OBJDIR="tpl"
default y
config TPL_BUILD
bool
depends on $KCONFIG_OBJDIR="tpl"
default y
config SUPPORT_SPL
bool
config SUPPORT_TPL
bool
config SPL
bool
depends on SUPPORT_SPL
prompt "Enable SPL" if !SPL_BUILD
default y if SPL_BUILD
help
If you want to build SPL as well as the normal image, say Y.
config TPL
bool
depends on SPL && SUPPORT_TPL
prompt "Enable TPL" if !SPL_BUILD
default y if TPL_BUILD
default n
help
If you want to build TPL as well as the normal image and SPL, say Y.
config FIT
bool "Support Flattened Image Tree"
depends on !SPL_BUILD
help
This option allows to boot the new uImage structrure,
Flattened Image Tree. FIT is formally a FDT, which can include
images of various types (kernel, FDT blob, ramdisk, etc.)
in a single blob. To boot this new uImage structure,
pass the the address of the blob to the "bootm" command.
config FIT_VERBOSE
bool "Display verbose messages on FIT boot"
depends on FIT
config FIT_SIGNATURE
bool "Enabel signature verification of FIT uImages"
depends on FIT
help
This option enables signature verification of FIT uImages,
using a hash signed and verified using RSA.
See doc/uImage.FIT/signature.txt for more details.
config SYS_EXTRA_OPTIONS
string "Extra Options (DEPRECATED)"
depends on !SPL_BUILD
help
The old configuration infrastructure (= mkconfig + boards.cfg)
provided the extra options field. If you have something like
"HAS_BAR,BAZ=64", the optional options
#define CONFIG_HAS
#define CONFIG_BAZ 64
will be defined in include/config.h.
This option was prepared for the smooth migration from the old
configuration to Kconfig. Since this option will be removed sometime,
new boards should not use this option.
config SYS_TEXT_BASE
depends on SPARC
hex "Text Base"
help
TODO: Move CONFIG_SYS_TEXT_BASE for all the architecture
endmenu # Boot images
source "arch/Kconfig"
source "common/Kconfig"
source "dts/Kconfig"
source "net/Kconfig"
source "drivers/Kconfig"
source "fs/Kconfig"
source "lib/Kconfig"

View File

@@ -1,15 +0,0 @@
GPL License Exception:
Even though U-Boot in general is covered by the GPL-2.0/GPL-2.0+,
this does *not* cover the so-called "standalone" applications that
use U-Boot services by means of the jump table provided by U-Boot
exactly for this purpose - this is merely considered normal use of
U-Boot, and does *not* fall under the heading of "derived work".
The header files "include/image.h" and "arch/*/include/asm/u-boot.h"
define interfaces to U-Boot. Including these (unmodified) header
files in another file is considered normal use of U-Boot, and does
*not* fall under the heading of "derived work".
-- Wolfgang Denk

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@@ -1,69 +0,0 @@
U-Boot is Free Software. It is copyrighted by Wolfgang Denk and
many others who contributed code (see the actual source code and the
git commit messages for details). You can redistribute U-Boot and/or
modify it under the terms of version 2 of the GNU General Public
License as published by the Free Software Foundation. Most of it can
also be distributed, at your option, under any later version of the
GNU General Public License -- see individual files for exceptions.
NOTE! This license does *not* cover the so-called "standalone"
applications that use U-Boot services by means of the jump table
provided by U-Boot exactly for this purpose - this is merely
considered normal use of U-Boot, and does *not* fall under the
heading of "derived work" -- see file Licenses/Exceptions for
details.
Also note that the GPL and the other licenses are copyrighted by
the Free Software Foundation and other organizations, but the
instance of code that they refer to (the U-Boot source code) is
copyrighted by me and others who actually wrote it.
-- Wolfgang Denk
Like many other projects, U-Boot has a tradition of including big
blocks of License headers in all files. This not only blows up the
source code with mostly redundant information, but also makes it very
difficult to generate License Clearing Reports. An additional problem
is that even the same licenses are referred to by a number of
slightly varying text blocks (full, abbreviated, different
indentation, line wrapping and/or white space, with obsolete address
information, ...) which makes automatic processing a nightmare.
To make this easier, such license headers in the source files will be
replaced with a single line reference to Unique License Identifiers
as defined by the Linux Foundation's SPDX project [1]. For example,
in a source file the full "GPL v2.0 or later" header text will be
replaced by a single line:
SPDX-License-Identifier: GPL-2.0+
Ideally, the license terms of all files in the source tree should be
defined by such License Identifiers; in no case a file can contain
more than one such License Identifier list.
If a "SPDX-License-Identifier:" line references more than one Unique
License Identifier, then this means that the respective file can be
used under the terms of either of these licenses, i. e. with
SPDX-License-Identifier: GPL-2.0+ BSD-3-Clause
you can chose between GPL-2.0+ and BSD-3-Clause licensing.
We use the SPDX Unique License Identifiers here; these are available
at [2].
[1] http://spdx.org/
[2] http://spdx.org/licenses/
Full name SPDX Identifier OSI Approved File name URI
=======================================================================================================================================
GNU General Public License v2.0 only GPL-2.0 Y gpl-2.0.txt http://www.gnu.org/licenses/gpl-2.0.txt
GNU General Public License v2.0 or later GPL-2.0+ Y gpl-2.0.txt http://www.gnu.org/licenses/gpl-2.0.txt
GNU Library General Public License v2 or later LGPL-2.0+ Y lgpl-2.0.txt http://www.gnu.org/licenses/old-licenses/lgpl-2.0.txt
GNU Lesser General Public License v2.1 or later LGPL-2.1+ Y lgpl-2.1.txt http://www.gnu.org/licenses/old-licenses/lgpl-2.1.txt
eCos license version 2.0 eCos-2.0 eCos-2.0.txt http://www.gnu.org/licenses/ecos-license.html
BSD 2-Clause License BSD-2-Clause Y bsd-2-clause.txt http://spdx.org/licenses/BSD-2-Clause
BSD 3-clause "New" or "Revised" License BSD-3-Clause Y bsd-3-clause.txt http://spdx.org/licenses/BSD-3-Clause#licenseText
IBM PIBS (PowerPC Initialization and IBM-pibs ibm-pibs.txt
Boot Software) license
ISC License ISC Y isc.txt https://spdx.org/licenses/ISC

View File

@@ -1,25 +0,0 @@
Redistribution and use in source and binary forms, with or
without modification, are permitted provided that the following
conditions are met:
1. Redistributions of source code must retain the above
copyright notice, this list of conditions and the following
disclaimer.
2. Redistributions in binary form must reproduce the above
copyright notice, this list of conditions and the following
disclaimer in the documentation and/or other materials
provided with the distribution.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

View File

@@ -1,24 +0,0 @@
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions
are met:
1. Redistributions of source code must retain the above copyright
notice, this list of conditions, and the following disclaimer,
without modification.
2. Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution.
3. The names of the above-listed copyright holders may not be used
to endorse or promote products derived from this software without
specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

View File

@@ -1,43 +0,0 @@
Note that this license is not endorsed by the Free Software Foundation.
It is available here as a convenience to readers of [1]the license
list.
The eCos license version 2.0
This file is part of eCos, the Embedded Configurable Operating System.
Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
eCos is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License as published by the Free
Software Foundation; either version 2 or (at your option) any later
version.
eCos is distributed in the hope that it will be useful, but WITHOUT ANY
WARRANTY; without even the implied warranty of MERCHANTABILITY or
FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
for more details.
You should have received a copy of the GNU General Public License along
with eCos; if not, write to the Free Software Foundation, Inc., 51
Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
As a special exception, if other files instantiate templates or use
macros or inline functions from this file, or you compile this file and
link it with other works to produce a work based on this file, this
file does not by itself cause the resulting work to be covered by the
GNU General Public License. However the source code for this file must
still be made available in accordance with section (3) of the GNU
General Public License.
This exception does not invalidate any other reasons why a work based
on this file might be covered by the GNU General Public License.
Alternative licenses for eCos may be arranged by contacting Red Hat,
Inc. at http://sources.redhat.com/ecos/ecos-license/
-------------------------------------------
####ECOSGPLCOPYRIGHTEND####
References
1. http://www.gnu.org/licenses/license-list.html

View File

@@ -1,339 +0,0 @@
GNU GENERAL PUBLIC LICENSE
Version 2, June 1991
Copyright (C) 1989, 1991 Free Software Foundation, Inc.,
51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
Everyone is permitted to copy and distribute verbatim copies
of this license document, but changing it is not allowed.
Preamble
The licenses for most software are designed to take away your
freedom to share and change it. By contrast, the GNU General Public
License is intended to guarantee your freedom to share and change free
software--to make sure the software is free for all its users. This
General Public License applies to most of the Free Software
Foundation's software and to any other program whose authors commit to
using it. (Some other Free Software Foundation software is covered by
the GNU Lesser General Public License instead.) You can apply it to
your programs, too.
When we speak of free software, we are referring to freedom, not
price. Our General Public Licenses are designed to make sure that you
have the freedom to distribute copies of free software (and charge for
this service if you wish), that you receive source code or can get it
if you want it, that you can change the software or use pieces of it
in new free programs; and that you know you can do these things.
To protect your rights, we need to make restrictions that forbid
anyone to deny you these rights or to ask you to surrender the rights.
These restrictions translate to certain responsibilities for you if you
distribute copies of the software, or if you modify it.
For example, if you distribute copies of such a program, whether
gratis or for a fee, you must give the recipients all the rights that
you have. You must make sure that they, too, receive or can get the
source code. And you must show them these terms so they know their
rights.
We protect your rights with two steps: (1) copyright the software, and
(2) offer you this license which gives you legal permission to copy,
distribute and/or modify the software.
Also, for each author's protection and ours, we want to make certain
that everyone understands that there is no warranty for this free
software. If the software is modified by someone else and passed on, we
want its recipients to know that what they have is not the original, so
that any problems introduced by others will not reflect on the original
authors' reputations.
Finally, any free program is threatened constantly by software
patents. We wish to avoid the danger that redistributors of a free
program will individually obtain patent licenses, in effect making the
program proprietary. To prevent this, we have made it clear that any
patent must be licensed for everyone's free use or not licensed at all.
The precise terms and conditions for copying, distribution and
modification follow.
GNU GENERAL PUBLIC LICENSE
TERMS AND CONDITIONS FOR COPYING, DISTRIBUTION AND MODIFICATION
0. This License applies to any program or other work which contains
a notice placed by the copyright holder saying it may be distributed
under the terms of this General Public License. The "Program", below,
refers to any such program or work, and a "work based on the Program"
means either the Program or any derivative work under copyright law:
that is to say, a work containing the Program or a portion of it,
either verbatim or with modifications and/or translated into another
language. (Hereinafter, translation is included without limitation in
the term "modification".) Each licensee is addressed as "you".
Activities other than copying, distribution and modification are not
covered by this License; they are outside its scope. The act of
running the Program is not restricted, and the output from the Program
is covered only if its contents constitute a work based on the
Program (independent of having been made by running the Program).
Whether that is true depends on what the Program does.
1. You may copy and distribute verbatim copies of the Program's
source code as you receive it, in any medium, provided that you
conspicuously and appropriately publish on each copy an appropriate
copyright notice and disclaimer of warranty; keep intact all the
notices that refer to this License and to the absence of any warranty;
and give any other recipients of the Program a copy of this License
along with the Program.
You may charge a fee for the physical act of transferring a copy, and
you may at your option offer warranty protection in exchange for a fee.
2. You may modify your copy or copies of the Program or any portion
of it, thus forming a work based on the Program, and copy and
distribute such modifications or work under the terms of Section 1
above, provided that you also meet all of these conditions:
a) You must cause the modified files to carry prominent notices
stating that you changed the files and the date of any change.
b) You must cause any work that you distribute or publish, that in
whole or in part contains or is derived from the Program or any
part thereof, to be licensed as a whole at no charge to all third
parties under the terms of this License.
c) If the modified program normally reads commands interactively
when run, you must cause it, when started running for such
interactive use in the most ordinary way, to print or display an
announcement including an appropriate copyright notice and a
notice that there is no warranty (or else, saying that you provide
a warranty) and that users may redistribute the program under
these conditions, and telling the user how to view a copy of this
License. (Exception: if the Program itself is interactive but
does not normally print such an announcement, your work based on
the Program is not required to print an announcement.)
These requirements apply to the modified work as a whole. If
identifiable sections of that work are not derived from the Program,
and can be reasonably considered independent and separate works in
themselves, then this License, and its terms, do not apply to those
sections when you distribute them as separate works. But when you
distribute the same sections as part of a whole which is a work based
on the Program, the distribution of the whole must be on the terms of
this License, whose permissions for other licensees extend to the
entire whole, and thus to each and every part regardless of who wrote it.
Thus, it is not the intent of this section to claim rights or contest
your rights to work written entirely by you; rather, the intent is to
exercise the right to control the distribution of derivative or
collective works based on the Program.
In addition, mere aggregation of another work not based on the Program
with the Program (or with a work based on the Program) on a volume of
a storage or distribution medium does not bring the other work under
the scope of this License.
3. You may copy and distribute the Program (or a work based on it,
under Section 2) in object code or executable form under the terms of
Sections 1 and 2 above provided that you also do one of the following:
a) Accompany it with the complete corresponding machine-readable
source code, which must be distributed under the terms of Sections
1 and 2 above on a medium customarily used for software interchange; or,
b) Accompany it with a written offer, valid for at least three
years, to give any third party, for a charge no more than your
cost of physically performing source distribution, a complete
machine-readable copy of the corresponding source code, to be
distributed under the terms of Sections 1 and 2 above on a medium
customarily used for software interchange; or,
c) Accompany it with the information you received as to the offer
to distribute corresponding source code. (This alternative is
allowed only for noncommercial distribution and only if you
received the program in object code or executable form with such
an offer, in accord with Subsection b above.)
The source code for a work means the preferred form of the work for
making modifications to it. For an executable work, complete source
code means all the source code for all modules it contains, plus any
associated interface definition files, plus the scripts used to
control compilation and installation of the executable. However, as a
special exception, the source code distributed need not include
anything that is normally distributed (in either source or binary
form) with the major components (compiler, kernel, and so on) of the
operating system on which the executable runs, unless that component
itself accompanies the executable.
If distribution of executable or object code is made by offering
access to copy from a designated place, then offering equivalent
access to copy the source code from the same place counts as
distribution of the source code, even though third parties are not
compelled to copy the source along with the object code.
4. You may not copy, modify, sublicense, or distribute the Program
except as expressly provided under this License. Any attempt
otherwise to copy, modify, sublicense or distribute the Program is
void, and will automatically terminate your rights under this License.
However, parties who have received copies, or rights, from you under
this License will not have their licenses terminated so long as such
parties remain in full compliance.
5. You are not required to accept this License, since you have not
signed it. However, nothing else grants you permission to modify or
distribute the Program or its derivative works. These actions are
prohibited by law if you do not accept this License. Therefore, by
modifying or distributing the Program (or any work based on the
Program), you indicate your acceptance of this License to do so, and
all its terms and conditions for copying, distributing or modifying
the Program or works based on it.
6. Each time you redistribute the Program (or any work based on the
Program), the recipient automatically receives a license from the
original licensor to copy, distribute or modify the Program subject to
these terms and conditions. You may not impose any further
restrictions on the recipients' exercise of the rights granted herein.
You are not responsible for enforcing compliance by third parties to
this License.
7. If, as a consequence of a court judgment or allegation of patent
infringement or for any other reason (not limited to patent issues),
conditions are imposed on you (whether by court order, agreement or
otherwise) that contradict the conditions of this License, they do not
excuse you from the conditions of this License. If you cannot
distribute so as to satisfy simultaneously your obligations under this
License and any other pertinent obligations, then as a consequence you
may not distribute the Program at all. For example, if a patent
license would not permit royalty-free redistribution of the Program by
all those who receive copies directly or indirectly through you, then
the only way you could satisfy both it and this License would be to
refrain entirely from distribution of the Program.
If any portion of this section is held invalid or unenforceable under
any particular circumstance, the balance of the section is intended to
apply and the section as a whole is intended to apply in other
circumstances.
It is not the purpose of this section to induce you to infringe any
patents or other property right claims or to contest validity of any
such claims; this section has the sole purpose of protecting the
integrity of the free software distribution system, which is
implemented by public license practices. Many people have made
generous contributions to the wide range of software distributed
through that system in reliance on consistent application of that
system; it is up to the author/donor to decide if he or she is willing
to distribute software through any other system and a licensee cannot
impose that choice.
This section is intended to make thoroughly clear what is believed to
be a consequence of the rest of this License.
8. If the distribution and/or use of the Program is restricted in
certain countries either by patents or by copyrighted interfaces, the
original copyright holder who places the Program under this License
may add an explicit geographical distribution limitation excluding
those countries, so that distribution is permitted only in or among
countries not thus excluded. In such case, this License incorporates
the limitation as if written in the body of this License.
9. The Free Software Foundation may publish revised and/or new versions
of the General Public License from time to time. Such new versions will
be similar in spirit to the present version, but may differ in detail to
address new problems or concerns.
Each version is given a distinguishing version number. If the Program
specifies a version number of this License which applies to it and "any
later version", you have the option of following the terms and conditions
either of that version or of any later version published by the Free
Software Foundation. If the Program does not specify a version number of
this License, you may choose any version ever published by the Free Software
Foundation.
10. If you wish to incorporate parts of the Program into other free
programs whose distribution conditions are different, write to the author
to ask for permission. For software which is copyrighted by the Free
Software Foundation, write to the Free Software Foundation; we sometimes
make exceptions for this. Our decision will be guided by the two goals
of preserving the free status of all derivatives of our free software and
of promoting the sharing and reuse of software generally.
NO WARRANTY
11. BECAUSE THE PROGRAM IS LICENSED FREE OF CHARGE, THERE IS NO WARRANTY
FOR THE PROGRAM, TO THE EXTENT PERMITTED BY APPLICABLE LAW. EXCEPT WHEN
OTHERWISE STATED IN WRITING THE COPYRIGHT HOLDERS AND/OR OTHER PARTIES
PROVIDE THE PROGRAM "AS IS" WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESSED
OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. THE ENTIRE RISK AS
TO THE QUALITY AND PERFORMANCE OF THE PROGRAM IS WITH YOU. SHOULD THE
PROGRAM PROVE DEFECTIVE, YOU ASSUME THE COST OF ALL NECESSARY SERVICING,
REPAIR OR CORRECTION.
12. IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN WRITING
WILL ANY COPYRIGHT HOLDER, OR ANY OTHER PARTY WHO MAY MODIFY AND/OR
REDISTRIBUTE THE PROGRAM AS PERMITTED ABOVE, BE LIABLE TO YOU FOR DAMAGES,
INCLUDING ANY GENERAL, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES ARISING
OUT OF THE USE OR INABILITY TO USE THE PROGRAM (INCLUDING BUT NOT LIMITED
TO LOSS OF DATA OR DATA BEING RENDERED INACCURATE OR LOSSES SUSTAINED BY
YOU OR THIRD PARTIES OR A FAILURE OF THE PROGRAM TO OPERATE WITH ANY OTHER
PROGRAMS), EVEN IF SUCH HOLDER OR OTHER PARTY HAS BEEN ADVISED OF THE
POSSIBILITY OF SUCH DAMAGES.
END OF TERMS AND CONDITIONS
How to Apply These Terms to Your New Programs
If you develop a new program, and you want it to be of the greatest
possible use to the public, the best way to achieve this is to make it
free software which everyone can redistribute and change under these terms.
To do so, attach the following notices to the program. It is safest
to attach them to the start of each source file to most effectively
convey the exclusion of warranty; and each file should have at least
the "copyright" line and a pointer to where the full notice is found.
<one line to give the program's name and a brief idea of what it does.>
Copyright (C) <year> <name of author>
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License along
with this program; if not, write to the Free Software Foundation, Inc.,
51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
Also add information on how to contact you by electronic and paper mail.
If the program is interactive, make it output a short notice like this
when it starts in an interactive mode:
Gnomovision version 69, Copyright (C) year name of author
Gnomovision comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
This is free software, and you are welcome to redistribute it
under certain conditions; type `show c' for details.
The hypothetical commands `show w' and `show c' should show the appropriate
parts of the General Public License. Of course, the commands you use may
be called something other than `show w' and `show c'; they could even be
mouse-clicks or menu items--whatever suits your program.
You should also get your employer (if you work as a programmer) or your
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<signature of Ty Coon>, 1 April 1989
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This General Public License does not permit incorporating your program into
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consider it more useful to permit linking proprietary applications with the
library. If this is what you want to do, use the GNU Lesser General
Public License instead of this License.

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@@ -1,17 +0,0 @@
This source code has been made available to you by IBM on an AS-IS
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COPYRIGHT I B M CORPORATION 1995
LICENSED MATERIAL - PROGRAM PROPERTY OF I B M

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@@ -1,17 +0,0 @@
ISC License:
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WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION,
ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF
THIS SOFTWARE.

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That's all there is to it!

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That's all there is to it!

View File

@@ -1,431 +1,322 @@
Descriptions of section entries:
#########################################################################
# #
# Regular Maintainers for U-Boot board support: #
# #
# For any board without permanent maintainer, please contact #
# Wolfgang Denk <wd@denx.de> #
# and Cc: the <U-Boot-Users@lists.sourceforge.net> mailing lists. #
# #
# Note: lists sorted by Maintainer Name #
#########################################################################
P: Person (obsolete)
M: Mail patches to: FullName <address@domain>
L: Mailing list that is relevant to this area
W: Web-page with status/info
Q: Patchwork web based patch tracking system site
T: SCM tree type and location.
Type is one of: git, hg, quilt, stgit, topgit
S: Status, one of the following:
Supported: Someone is actually paid to look after this.
Maintained: Someone actually looks after it.
Odd Fixes: It has a maintainer but they don't have time to do
much other than throw the odd patch in. See below..
Orphan: No current maintainer [but maybe you could take the
role as you write your new code].
Obsolete: Old code. Something tagged obsolete generally means
it has been replaced by a better system and you
should be using that.
F: Files and directories with wildcard patterns.
A trailing slash includes all files and subdirectory files.
F: drivers/net/ all files in and below drivers/net
F: drivers/net/* all files in drivers/net, but not below
F: */net/* all files in "any top level directory"/net
One pattern per line. Multiple F: lines acceptable.
N: Files and directories with regex patterns.
N: [^a-z]tegra all files whose path contains the word tegra
One pattern per line. Multiple N: lines acceptable.
scripts/get_maintainer.pl has different behavior for files that
match F: pattern and matches of N: patterns. By default,
get_maintainer will not look at git log history when an F: pattern
match occurs. When an N: match occurs, git log history is used
to also notify the people that have git commit signatures.
X: Files and directories that are NOT maintained, same rules as F:
Files exclusions are tested before file matches.
Can be useful for excluding a specific subdirectory, for instance:
F: net/
X: net/ipv6/
matches all files in and below net excluding net/ipv6/
K: Keyword perl extended regex pattern to match content in a
patch or file. For instance:
K: of_get_profile
matches patches or files that contain "of_get_profile"
K: \b(printk|pr_(info|err))\b
matches patches or files that contain one or more of the words
printk, pr_info or pr_err
One regex pattern per line. Multiple K: lines acceptable.
Note: For the hard of thinking, this list is meant to remain in alphabetical
order. If you could add yourselves to it in alphabetical order that would be
so much easier [Ed]
#########################################################################
# PowerPC Systems: #
# #
# Maintainer Name, Email Address #
# Board CPU #
#########################################################################
Maintainers List (try to look for most precise areas first)
Greg Allen <gallen@arlut.utexas.edu>
-----------------------------------
ARC
M: Alexey Brodkin <alexey.brodkin@synopsys.com>
S: Maintained
T: git git://git.denx.de/u-boot-arc.git
F: arch/arc/
UTX8245 MPC8245
ARM
M: Albert Aribaud <albert.u.boot@aribaud.net>
S: Maintained
T: git git://git.denx.de/u-boot-arm.git
F: arch/arm/
Pantelis Antoniou <panto@intracom.gr>
ARM ALTERA SOCFPGA
M: Marek Vasut <marex@denx.de>
S: Maintainted
T: git git://git.denx.de/u-boot-socfpga.git
F: arch/arm/cpu/armv7/socfpga/
F: board/altera/socfpga/
NETVIA MPC8xx
ARM ATMEL AT91
M: Andreas Bießmann <andreas.devel@googlemail.com>
S: Maintained
T: git git://git.denx.de/u-boot-atmel.git
F: arch/arm/cpu/armv7/at91/
F: arch/arm/cpu/at91-common/
F: arch/arm/include/asm/arch-at91/
Jerry Van Baren <gerald.vanbaren@smiths-aerospace.com>
ARM FREESCALE IMX
M: Stefano Babic <sbabic@denx.de>
S: Maintained
T: git git://git.denx.de/u-boot-imx.git
F: arch/arm/cpu/arm1136/mx*/
F: arch/arm/cpu/arm926ejs/mx*/
F: arch/arm/cpu/arm926ejs/imx/
F: arch/arm/cpu/armv7/mx*/
F: arch/arm/cpu/armv7/vf610/
F: arch/arm/cpu/imx-common/
F: arch/arm/include/asm/arch-imx/
F: arch/arm/include/asm/arch-mx*/
F: arch/arm/include/asm/arch-vf610/
F: arch/arm/include/asm/imx-common/
sacsng MPC8260
ARM MARVELL KIRKWOOD
M: Prafulla Wadaskar <prafulla@marvell.com>
M: Luka Perkov <luka.perkov@sartura.hr>
S: Maintained
T: git git://git.denx.de/u-boot-marvell.git
F: arch/arm/cpu/arm926ejs/kirkwood/
F: arch/arm/include/asm/arch-kirkwood/
Rick Bronson <rick@efn.org>
ARM MARVELL PXA
M: Marek Vasut <marex@denx.de>
S: Maintained
T: git git://git.denx.de/u-boot-pxa.git
F: arch/arm/cpu/pxa/
F: arch/arm/include/asm/arch-pxa/
AT91RM9200DK at91rm9200
ARM SAMSUNG
M: Minkyu Kang <mk7.kang@samsung.com>
S: Maintained
T: git git://git.denx.de/u-boot-samsung.git
F: arch/arm/cpu/arm920t/s3c24x0/
F: arch/arm/cpu/armv7/exynos/
F: arch/arm/cpu/armv7/s5pc1xx/
F: arch/arm/cpu/armv7/s5p-common/
F: arch/arm/include/asm/arch-exynos/
F: arch/arm/include/asm/arch-s3c24x0/
F: arch/arm/include/asm/arch-s5pc1xx/
Oliver Brown <obrown@adventnetworks.com>
ARM STM SPEAR
M: Vipin Kumar <vipin.kumar@st.com>
S: Maintained
T: git git://git.denx.de/u-boot-stm.git
F: arch/arm/cpu/arm926ejs/spear/
F: arch/arm/include/asm/arch-spear/
gw8260 MPC8260
ARM STM STV0991
M: Vikas Manocha <vikas.manocha@st.com>
S: Maintained
F: arch/arm/cpu/armv7/stv0991/
F: arch/arm/include/asm/arch-stv0991/
Conn Clark <clark@esteem.com>
ARM SUNXI
M: Ian Campbell <ijc@hellion.org.uk>
M: Hans De Goede <hdegoede@redhat.com>
S: Maintained
T: git git://git.denx.de/u-boot-sunxi.git
F: arch/arm/cpu/armv7/sunxi/
F: arch/arm/include/asm/arch-sunxi/
ESTEEM192E MPC8xx
ARM TEGRA
M: Tom Warren <twarren@nvidia.com>
S: Maintained
T: git git://git.denx.de/u-boot-tegra.git
F: arch/arm/cpu/arm720t/tegra*/
F: arch/arm/cpu/armv7/tegra*/
F: arch/arm/cpu/tegra*/
F: arch/arm/include/asm/arch-tegra*/
Kári Davíðsson <kd@flaga.is>
ARM TI
M: Tom Rini <trini@ti.com>
S: Maintained
T: git git://git.denx.de/u-boot-ti.git
F: arch/arm/cpu/arm926ejs/davinci/
F: arch/arm/cpu/arm926ejs/omap/
F: arch/arm/cpu/armv7/omap*/
F: arch/arm/include/asm/arch-davinci/
F: arch/arm/include/asm/arch-omap*/
F: arch/arm/include/asm/ti-common/
FLAGADM MPC823
ARM UNIPHIER
M: Masahiro Yamada <yamada.m@jp.panasonic.com>
S: Maintained
T: git git://git.denx.de/u-boot-uniphier.git
F: arch/arm/cpu/armv7/uniphier/
F: arch/arm/include/asm/arch-uniphier/
F: configs/ph1_*_defconfig
F: drivers/serial/serial_uniphier.c
Wolfgang Denk <wd@denx.de>
ARM ZYNQ
M: Michal Simek <monstr@monstr.eu>
S: Maintained
F: arch/arm/cpu/armv7/zynq/
F: arch/arm/include/asm/arch-zynq/
AMX860 MPC860
ETX094 MPC850
FPS850L MPC850
FPS860L MPC860
ICU862 MPC862
IP860 MPC860
IVML24 MPC860
IVML24_128 MPC860
IVML24_256 MPC860
IVMS8 MPC860
IVMS8_128 MPC860
IVMS8_256 MPC860
LANTEC MPC850
LWMON MPC823
R360MPI MPC823
RMU MPC850
RRvision MPC823
SM850 MPC850
SPD823TS MPC823
TQM823L MPC823
TQM823L_LCD MPC823
TQM850L MPC850
TQM855L MPC855
TQM860L MPC860
TQM860L_FEC MPC860
TTTech MPC823
c2mon MPC855
hermes MPC860
lwmon MPC823
pcu_e MPC855
AVR32
M: Andreas Bießmann <andreas.devel@googlemail.com>
S: Maintained
T: git git://git.denx.de/u-boot-avr32.git
F: arch/avr32/
CU824 MPC8240
Sandpoint8240 MPC8240
SL8245 MPC8245
BLACKFIN
M: Sonic Zhang <sonic.adi@gmail.com>
S: Maintained
T: git git://git.denx.de/u-boot-blackfin.git
F: arch/blackfin/
ATC MPC8250
PM825 MPC8250
BUILDMAN
M: Simon Glass <sjg@chromium.org>
S: Maintained
F: tools/buildman/
TQM8255 MPC8255
CFI FLASH
M: Stefan Roese <sr@denx.de>
S: Maintained
T: git git://git.denx.de/u-boot-cfi-flash.git
F: drivers/mtd/cfi_flash.c
F: drivers/mtd/jedec_flash.c
CPU86 MPC8260
PM826 MPC8260
TQM8260 MPC8260
COLDFIRE
M: Huan Wang <alison.wang@freescale.com>
M: Angelo Dureghello <angelo@sysam.it>
S: Maintained
T: git git://git.denx.de/u-boot-coldfire.git
F: arch/m68k/
PCIPPC2 MPC750
PCIPPC6 MPC750
DFU
M: Lukasz Majewski <l.majewski@samsung.com>
S: Maintained
T: git git://git.denx.de/u-boot-dfu.git
F: drivers/dfu/
EXBITGEN PPC405GP
DRIVER MODEL
M: Simon Glass <sjg@chromium.org>
S: Maintained
F: drivers/core/
F: include/dm/
F: test/dm/
Jon Diekema <jon.diekema@smiths-aerospace.com>
FLATTENED DEVICE TREE
M: Simon Glass <sjg@chromium.org>
S: Maintained
T: git git://git.denx.de/u-boot-fdt.git
F: lib/fdtdec*
F: lib/libfdt/
F: include/fdt*
F: include/libfdt*
F. common/cmd_fdt.c
F: common/fdt_support.c
sbc8260 MPC8260
FREEBSD
M: Rafal Jaworowski <raj@semihalf.com>
S: Maintained
T: git git://git.denx.de/u-boot-freebsd.git
Dave Ellis <DGE@sixnetio.com>
FREESCALE QORIQ
M: York Sun <yorksun@freescale.com>
S: Maintained
T: git git://git.denx.de/u-boot-fsl-qoriq.git
SXNI855T MPC8xx
I2C
M: Heiko Schocher <hs@denx.de>
S: Maintained
T: git git://git.denx.de/u-boot-i2c.git
F: drivers/i2c/
Thomas Frieden <ThomasF@hyperion-entertainment.com>
MICROBLAZE
M: Michal Simek <monstr@monstr.eu>
S: Maintained
T: git git://git.denx.de/u-boot-microblaze.git
F: arch/microblaze/
AmigaOneG3SE MPC7xx
MIPS
M: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
S: Maintained
T: git git://git.denx.de/u-boot-mips.git
F: arch/mips/
Frank Gottschling <fgottschling@eltec.de>
MMC
M: Pantelis Antoniou <panto@antoniou-consulting.com>
S: Maintained
T: git git://git.denx.de/u-boot-mmc.git
F: drivers/mmc/
MHPC MPC8xx
OPENRISC
M: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
S: Maintained
F: arch/openrisc/
BAB7xx MPC740/MPC750
PATMAN
M: Simon Glass <sjg@chromium.org>
S: Maintained
F: tools/patman/
Wolfgang Grandegger <wg@denx.de>
POWERPC
M: Wolfgang Denk <wd@denx.de>
S: Maintained
F: arch/powerpc/
CCM MPC855
POWERPC MPC5XXX
M: Wolfgang Denk <wd@denx.de>
S: Maintained
T: git git://git.denx.de/u-boot-mpc5xxx.git
F: arch/powerpc/cpu/mpc5*/
PN62 MPC8240
POWERPC MPC8XX
M: Wolfgang Denk <wd@denx.de>
S: Maintained
T: git git://git.denx.de/u-boot-mpc8xx.git
F: arch/powerpc/cpu/mpc8xx/
IPHASE4539 MPC8260
SCM MPC8260
POWERPC MPC82XX
M: Wolfgang Denk <wd@denx.de>
S: Maintained
T: git git://git.denx.de/u-boot-mpc82xx.git
F: arch/powerpc/cpu/mpc82*/
Howard Gray <mvsensor@matrix-vision.de>
POWERPC MPC83XX
M: Kim Phillips <kim.phillips@freescale.com>
S: Maintained
T: git git://git.denx.de/u-boot-mpc83xx.git
F: arch/powerpc/cpu/mpc83xx/
F: arch/powerpc/include/asm/arch-mpc83xx/
MVS1 MPC823
POWERPC MPC85XX
M: York Sun <yorksun@freescale.com>
S: Maintained
T: git git://git.denx.de/u-boot-mpc85xx.git
F: arch/powerpc/cpu/mpc85xx/
Klaus Heydeck <heydeck@kieback-peter.de>
POWERPC MPC86XX
M: York Sun <yorksun@freescale.com>
S: Maintained
T: git git://git.denx.de/u-boot-mpc86xx.git
F: arch/powerpc/cpu/mpc86xx/
KUP4K MPC855
POWERPC PPC74XX PPC7XX
M: Wolfgang Denk <wd@denx.de>
S: Maintained
T: git git://git.denx.de/u-boot-74xx-7xx.git
F: arch/powerpc/cpu/74xx_7xx/
Murray Jensen <Murray.Jensen@cmst.csiro.au>
POWERPC PPC4XX
M: Stefan Roese <sr@denx.de>
S: Maintained
T: git git://git.denx.de/u-boot-ppc4xx.git
F: arch/powerpc/cpu/ppc4xx/
cogent_mpc8xx MPC8xx
NETWORK
M: Joe Hershberger <joe.hershberger@gmail.com>
S: Maintained
T: git git://git.denx.de/u-boot-net.git
F: drivers/net/
cogent_mpc8260 MPC8260
hymod MPC8260
NAND FLASH
M: Scott Wood <scottwood@freescale.com>
S: Maintained
T: git git://git.denx.de/u-boot-nand-flash.git
F: drivers/mtd/nand/
Brad Kemp <Brad.Kemp@seranoa.com>
NDS32
M: Macpaul Lin <macpaul@andestech.com>
S: Maintained
T: git git://git.denx.de/u-boot-nds32.git
F: arch/nds32/
ppmc8260 MPC8260
NIOS
M: Thomas Chou <thomas@wytron.com.tw>
S: Maintained
T: git git://git.denx.de/u-boot-nios.git
F: arch/nios2/
Nye Liu <nyet@zumanetworks.com>
ONENAND
M: Lukasz Majewski <l.majewski@samsung.com>
S: Maintained
T: git git://git.denx.de/u-boot-onenand.git
F: drivers/mtd/onenand/
ZUMA MPC7xx_74xx
SANDBOX
M: Simon Glass <sjg@chromium.org>
S: Maintained
F: arch/sandbox/
Thomas Lange <thomas@corelatus.com>
SH
M: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
S: Maintained
T: git git://git.denx.de/u-boot-sh.git
F: arch/sh/
GTH MPC860
SPARC
M: Daniel Hellstrom <daniel@gaisler.com>
S: Maintained
T: git git://git.denx.de/u-boot-sparc.git
F: arch/sparc/
The LEOX team <team@leox.org>
SPI
M: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
S: Maintained
T: git git://git.denx.de/u-boot-spi.git
F: drivers/mtd/spi/
F: drivers/spi/
F: include/spi*
ELPT860 MPC860T
TESTING
M: Detlev Zundel <dzu@denx.de>
S: Maintained
T: git git://git.denx.de/u-boot-testing.git
Eran Man <eran@nbase.co.il>
TQ GROUP
M: Martin Krause <martin.krause@tq-systems.de>
S: Maintained
T: git git://git.denx.de/u-boot-tq-group.git
EVB64260_750CX MPC750CX
UBI
M: Kyungmin Park <kmpark@infradead.org>
M: Heiko Schocher <hs@denx.de>
S: Maintained
T: git git://git.denx.de/u-boot-ubi.git
F: drivers/mtd/ubi/
Reinhard Meyer <r.meyer@emk-elektronik.de>
USB
M: Marek Vasut <marex@denx.de>
S: Maintained
T: git git://git.denx.de/u-boot-usb.git
F: drivers/usb/
TOP860 MPC860
VIDEO
M: Anatolij Gustschin <agust@denx.de>
S: Maintained
T: git git://git.denx.de/u-boot-video.git
F: drivers/video/
Scott McNutt <smcnutt@artesyncp.com>
X86
M: Simon Glass <sjg@chromium.org>
S: Maintained
T: git git://git.denx.de/u-boot-x86.git
F: arch/x86/
EBONY PPC440GP
THE REST
M: Tom Rini <trini@ti.com>
L: u-boot@lists.denx.de
Q: http://patchwork.ozlabs.org/project/uboot/list/
S: Maintained
T: git git://git.denx.de/u-boot.git
F: *
F: */
Keith Outwater <Keith_Outwater@mvis.com>
GEN860T MPC860T
GEN860T_SC MPC860T
Frank Panno <fpanno@delphintech.com>
ep8260 MPC8260
Denis Peter <d.peter@mpl.ch>
MIP405 PPC4xx
PIP405 PPC4xx
Stefan Roese <stefan.roese@esd-electronics.com>
ADCIOP IOP480 (PPC401)
AR405 PPC405GP
ASH405 PPC405EP
CANBT PPC405CR
CPCI405 PPC405GP
CPCI4052 PPC405GP
CPCI405AB PPC405GP
CPCI440 PPC440GP
CPCIISER4 PPC405GP
DASA_SIM IOP480 (PPC401)
DU405 PPC405GP
OCRTC PPC405GP
ORSG PPC405GP
PCI405 PPC405GP
PMC405 PPC405GP
Peter De Schrijver <p2@mind.be>
ML2 PPC4xx
Erik Theisen <etheisen@mindspring.com>
W7OLMC PPC4xx
W7OLMG PPC4xx
Jim Thompson <jim@musenki.com>
MUSENKI MPC8245/8241
Sandpoint8245 MPC8245
Rune Torgersen <runet@innovsys.com>
MPC8266ADS MPC8266
John Zhan <zhanz@sinovee.com>
svm_sc8xx MPC8xx
-------------------------------------------------------------------------
Unknown / orphaned boards:
ADS860 MPC8xx
FADS823 MPC8xx
FADS850SAR MPC8xx
FADS860T MPC8xx
GENIETV MPC8xx
IAD210 MPC8xx
MBX MPC8xx
MBX860T MPC8xx
NX823 MPC8xx
RPXClassic MPC8xx
RPXlite MPC8xx
CRAYL1 PPC4xx
ERIC PPC4xx
WALNUT405 PPC4xx
MOUSSE MPC824x
MPC8260ADS MPC8260
RPXsuper MPC8260
rsdproto MPC8260
EVB64260 MPC7xx_74xx
#########################################################################
# ARM Systems: #
# #
# Maintainer Name, Email Address #
# Board CPU #
#########################################################################
Peter Figuli <peposh@etc.sk>
wepep250 xscale
Marius Gröger <mag@sysgo.de>
impa7 ARM720T (EP7211)
ep7312 ARM720T (EP7312)
Kyle Harris <kharris@nexus-tech.net>
lubbock xscale
cradle xscale
Gary Jennejohn <gj@denx.de>
smdk2400 ARM920T
trab ARM920T
David Müller <d.mueller@elsoft.ch>
smdk2410 ARM920T
VCMA9 ARM920T
Rolf Offermanns <rof@sysgo.de>
shannon SA1100
Robert Schwebel <r.schwebel@pengutronix.de>
csb226 xscale
innokom xscale
Alex Züpke <azu@sysgo.de>
lart SA1100
dnp1110 SA1110
#########################################################################
# x86 Systems: #
# #
# Maintainer Name, Email Address #
# Board CPU #
#########################################################################
Daniel Engström <daniel@omicron.se>
sc520_cdp x86
#########################################################################
# MIPS Systems: #
# #
# Maintainer Name, Email Address #
# Board CPU #
#########################################################################
Wolfgang Denk <wd@denx.de>
incaip MIPS32 4Kc
purple MIPS64 5Kc
#########################################################################
# End of MAINTAINERS list #
#########################################################################

866
MAKEALL Executable file → Normal file
View File

@@ -1,853 +1,171 @@
#!/bin/bash
# Tool mainly for U-Boot Quality Assurance: build one or more board
# configurations with minimal verbosity, showing only warnings and
# errors.
#
# SPDX-License-Identifier: GPL-2.0+
#!/bin/sh
usage()
{
# if exiting with 0, write to stdout, else write to stderr
local ret=${1:-0}
[ "${ret}" -eq 1 ] && exec 1>&2
cat <<-EOF
Usage: MAKEALL [options] [--] [boards-to-build]
Options:
-a ARCH, --arch ARCH Build all boards with arch ARCH
-c CPU, --cpu CPU Build all boards with cpu CPU
-v VENDOR, --vendor VENDOR Build all boards with vendor VENDOR
-s SOC, --soc SOC Build all boards with soc SOC
-b BOARD, --board BOARD Build all boards with board name BOARD
-l, --list List all targets to be built
-m, --maintainers List all targets and maintainer email
-M, --mails List all targets and all affilated emails
-C, --check Enable build checking
-n, --continue Continue (skip boards already built)
-r, --rebuild-errors Rebuild any boards that errored
-h, --help This help output
Selections by these options are logically ANDed; if the same option
is used repeatedly, such selections are ORed. So "-v FOO -v BAR"
will select all configurations where the vendor is either FOO or
BAR. Any additional arguments specified on the command line are
always build additionally. See the boards.cfg file for more info.
If no boards are specified, then the default is "powerpc".
Environment variables:
BUILD_NCPUS number of parallel make jobs (default: auto)
CROSS_COMPILE cross-compiler toolchain prefix (default: "")
CROSS_COMPILE_<ARCH> cross-compiler toolchain prefix for
architecture "ARCH". Substitute "ARCH" for any
supported architecture (default: "")
MAKEALL_LOGDIR output all logs to here (default: ./LOG/)
BUILD_DIR output build directory (default: ./)
BUILD_NBUILDS number of parallel targets (default: 1)
Examples:
- build all Power Architecture boards:
MAKEALL -a powerpc
MAKEALL --arch powerpc
MAKEALL powerpc
- build all PowerPC boards manufactured by vendor "esd":
MAKEALL -a powerpc -v esd
- build all PowerPC boards manufactured either by "keymile" or "siemens":
MAKEALL -a powerpc -v keymile -v siemens
- build all Freescale boards with MPC83xx CPUs, plus all 4xx boards:
MAKEALL -c mpc83xx -v freescale 4xx
EOF
exit ${ret}
}
SHORT_OPTS="ha:c:v:s:b:lmMCnr"
LONG_OPTS="help,arch:,cpu:,vendor:,soc:,board:,list,maintainers,mails,check,continue,rebuild-errors"
# Option processing based on util-linux-2.13/getopt-parse.bash
# Note that we use `"$@"' to let each command-line parameter expand to a
# separate word. The quotes around `$@' are essential!
# We need TEMP as the `eval set --' would nuke the return value of
# getopt.
TEMP=`getopt -o ${SHORT_OPTS} --long ${LONG_OPTS} \
-n 'MAKEALL' -- "$@"`
[ $? != 0 ] && usage 1
# Note the quotes around `$TEMP': they are essential!
eval set -- "$TEMP"
SELECTED=''
ONLY_LIST=''
PRINT_MAINTS=''
MAINTAINERS_ONLY=''
CONTINUE=''
REBUILD_ERRORS=''
while true ; do
case "$1" in
-a|--arch)
# echo "Option ARCH: argument \`$2'"
if [ "$opt_a" ] ; then
opt_a="${opt_a%)} || \$2 == \"$2\")"
else
opt_a="(\$2 == \"$2\")"
fi
SELECTED='y'
shift 2 ;;
-c|--cpu)
# echo "Option CPU: argument \`$2'"
if [ "$opt_c" ] ; then
opt_c="${opt_c%)} || \$3 == \"$2\" || \$3 ~ /$2:/)"
else
opt_c="(\$3 == \"$2\" || \$3 ~ /$2:/)"
fi
SELECTED='y'
shift 2 ;;
-s|--soc)
# echo "Option SoC: argument \`$2'"
if [ "$opt_s" ] ; then
opt_s="${opt_s%)} || \$4 == \"$2\" || \$4 ~ /$2/)"
else
opt_s="(\$4 == \"$2\" || \$4 ~ /$2/)"
fi
SELECTED='y'
shift 2 ;;
-v|--vendor)
# echo "Option VENDOR: argument \`$2'"
if [ "$opt_v" ] ; then
opt_v="${opt_v%)} || \$5 == \"$2\")"
else
opt_v="(\$5 == \"$2\")"
fi
SELECTED='y'
shift 2 ;;
-b|--board)
# echo "Option BOARD: argument \`$2'"
if [ "$opt_b" ] ; then
opt_b="${opt_b%)} || \$6 == \"$2\" || \$7 == \"$2\")"
else
# We need to check the 7th field too
# for boards whose 6th field is "-"
opt_b="(\$6 == \"$2\" || \$7 == \"$2\")"
fi
SELECTED='y'
shift 2 ;;
-C|--check)
CHECK='C=1'
shift ;;
-n|--continue)
CONTINUE='y'
shift ;;
-r|--rebuild-errors)
REBUILD_ERRORS='y'
shift ;;
-l|--list)
ONLY_LIST='y'
shift ;;
-m|--maintainers)
ONLY_LIST='y'
PRINT_MAINTS='y'
MAINTAINERS_ONLY='y'
shift ;;
-M|--mails)
ONLY_LIST='y'
PRINT_MAINTS='y'
shift ;;
-h|--help)
usage ;;
--)
shift ; break ;;
*)
echo "Internal error!" >&2 ; exit 1 ;;
esac
done
GNU_MAKE=$(scripts/show-gnu-make) || {
echo "GNU Make not found" >&2
exit 1
}
# echo "Remaining arguments:"
# for arg do echo '--> '"\`$arg'" ; done
tools/genboardscfg.py || {
echo "Failed to generate boards.cfg" >&2
exit 1
}
FILTER="\$1 !~ /^#/"
[ "$opt_a" ] && FILTER="${FILTER} && $opt_a"
[ "$opt_c" ] && FILTER="${FILTER} && $opt_c"
[ "$opt_s" ] && FILTER="${FILTER} && $opt_s"
[ "$opt_v" ] && FILTER="${FILTER} && $opt_v"
[ "$opt_b" ] && FILTER="${FILTER} && $opt_b"
if [ "$SELECTED" ] ; then
SELECTED=$(awk '('"$FILTER"') { print $7 }' boards.cfg)
# Make sure some boards from boards.cfg are actually found
if [ -z "$SELECTED" ] ; then
echo "Error: No boards selected, invalid arguments"
exit 1
fi
fi
#########################################################################
# Print statistics when we exit
trap exit 1 2 3 15
trap print_stats 0
# Determine number of CPU cores if no default was set
: ${BUILD_NCPUS:="`getconf _NPROCESSORS_ONLN`"}
if [ "$BUILD_NCPUS" -gt 1 ]
then
JOBS="-j $((BUILD_NCPUS + 1))"
if [ "${CROSS_COMPILE}" ] ; then
MAKE="make CROSS_COMPILE=${CROSS_COMPILE}"
else
JOBS=""
MAKE=make
fi
if [ "${MAKEALL_LOGDIR}" ] ; then
LOG_DIR=${MAKEALL_LOGDIR}
else
LOG_DIR="LOG"
fi
: ${BUILD_NBUILDS:=1}
BUILD_MANY=0
if [ "${BUILD_NBUILDS}" -gt 1 ] ; then
BUILD_MANY=1
: ${BUILD_DIR:=./build}
mkdir -p "${BUILD_DIR}/ERR"
find "${BUILD_DIR}/ERR/" -type f -exec rm -f {} +
fi
: ${BUILD_DIR:=.}
OUTPUT_PREFIX="${BUILD_DIR}"
[ -d ${LOG_DIR} ] || mkdir "${LOG_DIR}" || exit 1
if [ "$CONTINUE" != 'y' -a "$REBUILD_ERRORS" != 'y' ] ; then
find "${LOG_DIR}/" -type f -exec rm -f {} +
fi
[ -d LOG ] || mkdir LOG || exit 1
LIST=""
# Keep track of the number of builds and errors
ERR_CNT=0
ERR_LIST=""
WRN_CNT=0
WRN_LIST=""
TOTAL_CNT=0
SKIP_CNT=0
CURRENT_CNT=0
OLDEST_IDX=1
RC=0
# Helper funcs for parsing boards.cfg
targets_by_field()
{
field=$1
regexp=$2
awk '($1 !~ /^#/ && $'"$field"' ~ /^'"$regexp"'$/) { print $7 }' \
boards.cfg
}
targets_by_arch() { targets_by_field 2 "$@" ; }
targets_by_cpu() { targets_by_field 3 "$@" ; targets_by_field 3 "$@:.*" ; }
targets_by_soc() { targets_by_field 4 "$@" ; }
#########################################################################
## MPC5xx Systems
#########################################################################
LIST_5xx="$(targets_by_cpu mpc5xx)"
#########################################################################
## MPC5xxx Systems
#########################################################################
LIST_5xxx="$(targets_by_cpu mpc5xxx)"
#########################################################################
## MPC512x Systems
#########################################################################
LIST_512x="$(targets_by_cpu mpc512x)"
LIST_5xx=" \
cmi_mpc5xx \
"
#########################################################################
## MPC8xx Systems
#########################################################################
LIST_8xx="$(targets_by_cpu mpc8xx)"
LIST_8xx=" \
ADS860 AMX860 c2mon CCM \
cogent_mpc8xx ESTEEM192E ETX094 ELPT860 \
FADS823 FADS850SAR FADS860T FLAGADM \
FPS850L GEN860T GEN860T_SC GENIETV \
GTH hermes IAD210 ICU862_100MHz \
IP860 IVML24 IVML24_128 IVML24_256 \
IVMS8 IVMS8_128 IVMS8_256 KUP4K \
LANTEC lwmon MBX MBX860T \
MHPC MVS1 NETVIA NETVIA_V2 \
NX823 pcu_e R360MPI RBC823 \
rmu RPXClassic RPXlite RRvision \
SM850 SPD823TS svm_sc8xx SXNI855T \
TOP860 TQM823L TQM823L_LCD TQM850L \
TQM855L TQM860L TTTech v37 \
"
#########################################################################
## PPC4xx Systems
#########################################################################
LIST_4xx="$(targets_by_cpu ppc4xx)"
LIST_4xx=" \
ADCIOP AR405 ASH405 BUBINGA405EP \
CANBT CPCI405 CPCI4052 CPCI405AB \
CPCI440 CPCIISER4 CRAYL1 DASA_SIM \
DU405 EBONY ERIC EXBITGEN \
MIP405 MIP405T ML2 OCRTC \
ORSG PCI405 PIP405 PMC405 \
W7OLMC W7OLMG WALNUT405 \
"
#########################################################################
## MPC824x Systems
#########################################################################
LIST_824x=" \
A3000 BMW CPC45 CU824 \
MOUSSE MUSENKI OXC PN62 \
Sandpoint8240 Sandpoint8245 SL8245 utx8245 \
"
#########################################################################
## MPC8260 Systems (includes 8250, 8255 etc.)
#########################################################################
LIST_8260="$(targets_by_cpu mpc8260)"
#########################################################################
## MPC83xx Systems (includes 8349, etc.)
#########################################################################
LIST_83xx="$(targets_by_cpu mpc83xx)"
#########################################################################
## MPC85xx Systems (includes 8540, 8560 etc.)
#########################################################################
LIST_85xx="$(targets_by_cpu mpc85xx)"
#########################################################################
## MPC86xx Systems
#########################################################################
LIST_86xx="$(targets_by_cpu mpc86xx)"
LIST_8260=" \
atc cogent_mpc8260 CPU86 ep8260 \
gw8260 hymod IPHASE4539 MPC8260ADS \
MPC8266ADS PM826 ppmc8260 RPXsuper \
rsdproto sacsng sbc8260 SCM \
TQM8260 \
"
#########################################################################
## 74xx/7xx Systems
#########################################################################
LIST_74xx_7xx="$(targets_by_cpu 74xx_7xx)"
#########################################################################
## PowerPC groups
#########################################################################
LIST_TSEC=" \
${LIST_83xx} \
${LIST_85xx} \
${LIST_86xx} \
LIST_74xx=" \
EVB64260 PCIPPC2 PCIPPC6 ZUMA \
"
LIST_powerpc=" \
${LIST_5xx} \
${LIST_512x} \
${LIST_5xxx} \
${LIST_8xx} \
${LIST_824x} \
${LIST_8260} \
${LIST_83xx} \
${LIST_85xx} \
${LIST_86xx} \
${LIST_4xx} \
${LIST_74xx_7xx}\
LIST_7xx=" \
BAB7xx ELPPC \
"
# Alias "ppc" -> "powerpc" to not break compatibility with older scripts
# still using "ppc" instead of "powerpc"
LIST_ppc=" \
${LIST_powerpc} \
"
LIST_ppc="${LIST_5xx} ${LIST_8xx} \
${LIST_824x} ${LIST_8260} \
${LIST_4xx} \
${LIST_74xx} ${LIST_7xx}"
#########################################################################
## StrongARM Systems
#########################################################################
LIST_SA="$(targets_by_cpu sa1100)"
LIST_SA="dnp1110 lart shannon"
#########################################################################
## ARM7 Systems
#########################################################################
LIST_ARM7="$(targets_by_cpu arm720t)"
LIST_ARM7="ep7312 impa7"
#########################################################################
## ARM9 Systems
#########################################################################
LIST_ARM9="$(targets_by_cpu arm920t) \
$(targets_by_cpu arm926ejs) \
$(targets_by_cpu arm946es) \
"
#########################################################################
## ARM11 Systems
#########################################################################
LIST_ARM11="$(targets_by_cpu arm1136) \
$(targets_by_cpu arm1176) \
"
#########################################################################
## ARMV7 Systems
#########################################################################
LIST_ARMV7="$(targets_by_cpu armv7)"
#########################################################################
## ARMV8 Systems
#########################################################################
LIST_ARMV8="$(targets_by_cpu armv8)"
#########################################################################
## AT91 Systems
#########################################################################
LIST_at91="$(targets_by_soc at91)"
LIST_ARM9="at91rm9200dk smdk2400 smdk2410 trab VCMA9"
#########################################################################
## Xscale Systems
#########################################################################
LIST_pxa="$(targets_by_cpu pxa)"
LIST_pxa="cradle csb226 innokom lubbock wepep250"
LIST_arm="${LIST_SA} ${LIST_ARM7} ${LIST_ARM9} ${LIST_pxa}"
#########################################################################
## SPEAr Systems
## MIPS 4Kc Systems
#########################################################################
LIST_spear="$(targets_by_soc spear)"
LIST_mips4kc="incaip"
LIST_mips5kc="purple"
LIST_mips="${LIST_mips4kc} ${LIST_mips5kc}"
#########################################################################
## ARM groups
## i386 Systems
#########################################################################
LIST_arm="$(targets_by_arch arm | \
for ARMV8_TARGET in $LIST_ARMV8; \
do sed "/$ARMV8_TARGET/d"; \
done) \
"
LIST_I486="sc520_cdp sc520_spunk sc520_spunk_rel"
#########################################################################
## MIPS Systems (default = big endian)
#########################################################################
LIST_mips="$(targets_by_arch mips)"
#########################################################################
## OpenRISC Systems
#########################################################################
LIST_openrisc="$(targets_by_arch openrisc)"
#########################################################################
## x86 Systems
#########################################################################
LIST_x86="$(targets_by_arch x86)"
#########################################################################
## Nios-II Systems
#########################################################################
LIST_nios2="$(targets_by_arch nios2)"
#########################################################################
## MicroBlaze Systems
#########################################################################
LIST_microblaze="$(targets_by_arch microblaze)"
#########################################################################
## ColdFire Systems
#########################################################################
LIST_m68k="$(targets_by_arch m68k)"
LIST_coldfire=${LIST_m68k}
#########################################################################
## AVR32 Systems
#########################################################################
LIST_avr32="$(targets_by_arch avr32)"
#########################################################################
## Blackfin Systems
#########################################################################
LIST_blackfin="$(targets_by_arch blackfin)"
#########################################################################
## SH Systems
#########################################################################
LIST_sh2="$(targets_by_cpu sh2)"
LIST_sh3="$(targets_by_cpu sh3)"
LIST_sh4="$(targets_by_cpu sh4)"
LIST_sh="$(targets_by_arch sh)"
#########################################################################
## SPARC Systems
#########################################################################
LIST_sparc="$(targets_by_arch sparc)"
#########################################################################
## NDS32 Systems
#########################################################################
LIST_nds32="$(targets_by_arch nds32)"
#########################################################################
## ARC Systems
#########################################################################
LIST_arc="$(targets_by_arch arc)"
LIST_x86="${LIST_I486}"
#-----------------------------------------------------------------------
get_target_location() {
local target=$1
local BOARD_NAME=""
local CONFIG_NAME=""
local board=""
local vendor=""
#----- for now, just run PPC by default -----
[ $# = 0 ] && set $LIST_ppc
# Automatic mode
local line=`awk '\$7 == "'"$target"'" { print \$0 }' boards.cfg`
if [ -z "${line}" ] ; then echo "" ; return ; fi
set ${line}
CONFIG_NAME="${7%_defconfig}"
[ "${BOARD_NAME}" ] || BOARD_NAME="${7%_defconfig}"
if [ $# -gt 5 ]; then
if [ "$6" = "-" ] ; then
board=${BOARD_NAME}
else
board="$6"
fi
fi
[ $# -gt 4 ] && [ "$5" != "-" ] && vendor="$5"
[ $# -gt 6 ] && [ "$8" != "-" ] && {
tmp="${8%:*}"
if [ "$tmp" ] ; then
CONFIG_NAME="$tmp"
fi
}
# Assign board directory to BOARDIR variable
if [ "${vendor}" == "-" ] ; then
BOARDDIR=${board}
else
BOARDDIR=${vendor}/${board}
fi
echo "${CONFIG_NAME}:${BOARDDIR}:${BOARD_NAME}"
}
get_target_maintainers() {
local name=`echo $1 | cut -d : -f 3`
local line=`awk '\$7 == "'"$target"'" { print \$0 }' boards.cfg`
if [ -z "${line}" ]; then
echo ""
return ;
fi
local mails=`echo ${line} | cut -d ' ' -f 9- | sed -e 's/[^<]*<//' -e 's/>.*</ /' -e 's/>[^>]*$//'`
[ "$mails" == "-" ] && mails=""
echo "$mails"
}
get_target_arch() {
local target=$1
# Automatic mode
local line=`awk '\$7 == "'"$target"'" { print \$0 }' boards.cfg`
if [ -z "${line}" ] ; then echo "" ; return ; fi
set ${line}
echo "$2"
}
list_target() {
if [ "$PRINT_MAINTS" != 'y' ] ; then
echo "$1"
return
fi
echo -n "$1:"
local loc=`get_target_location $1`
if [ -z "${loc}" ] ; then echo "ERROR" ; return ; fi
local maintainers_result=`get_target_maintainers ${loc} | tr " " "\n"`
if [ "$MAINTAINERS_ONLY" != 'y' ] ; then
local dir=`echo ${loc} | cut -d ":" -f 2`
local cfg=`echo ${loc} | cut -d ":" -f 1`
local git_result=`git log --format=%aE board/${dir} \
include/configs/${cfg}.h | grep "@"`
local git_result_recent=`echo ${git_result} | tr " " "\n" | \
head -n 3`
local git_result_top=`echo ${git_result} | tr " " "\n" | \
sort | uniq -c | sort -nr | head -n 3 | \
sed "s/^ \+[0-9]\+ \+//"`
echo -e "$git_result_recent\n$git_result_top\n$maintainers_result" | \
sort -u | tr "\n" " " | sed "s/ $//" ;
else
echo -e "$maintainers_result" | sort -u | tr "\n" " " | \
sed "s/ $//" ;
fi
echo ""
}
# Each finished build will have a file called ${donep}${n},
# where n is the index of the build. Each build
# we've already noted as finished will have ${skipp}${n}.
# The code managing the build process will use this information
# to ensure that only BUILD_NBUILDS builds are in flight at once
donep="${LOG_DIR}/._done_"
skipp="${LOG_DIR}/._skip_"
build_target_killed() {
echo "Aborted $target build."
# Remove the logs for this board since it was aborted
rm -f ${LOG_DIR}/$target.MAKELOG ${LOG_DIR}/$target.ERR
exit
}
#-----------------------------------------------------------------------
build_target() {
target=$1
build_idx=$2
if [ "$ONLY_LIST" == 'y' ] ; then
list_target ${target}
return
fi
if [ $BUILD_MANY == 1 ] ; then
output_dir="${OUTPUT_PREFIX}/${target}"
mkdir -p "${output_dir}"
trap build_target_killed TERM
else
output_dir="${OUTPUT_PREFIX}"
fi
target_arch=$(get_target_arch ${target})
eval cross_toolchain=\$CROSS_COMPILE_`echo $target_arch | tr '[:lower:]' '[:upper:]'`
if [ "${cross_toolchain}" ] ; then
MAKE="$GNU_MAKE CROSS_COMPILE=${cross_toolchain}"
elif [ "${CROSS_COMPILE}" ] ; then
MAKE="$GNU_MAKE CROSS_COMPILE=${CROSS_COMPILE}"
else
MAKE=$GNU_MAKE
fi
if [ "${output_dir}" != "." ] ; then
MAKE="${MAKE} O=${output_dir}"
fi
${MAKE} mrproper >/dev/null
echo "Building ${target} board..."
${MAKE} -s ${target}_defconfig >/dev/null
${MAKE} ${JOBS} ${CHECK} all \
>${LOG_DIR}/$target.MAKELOG 2> ${LOG_DIR}/$target.ERR
# Check for 'make' errors
if [ ${PIPESTATUS[0]} -ne 0 ] ; then
RC=1
fi
if [ $BUILD_MANY == 1 ] ; then
trap - TERM
${MAKE} -s clean
if [ -s ${LOG_DIR}/${target}.ERR ] ; then
cp ${LOG_DIR}/${target}.ERR ${OUTPUT_PREFIX}/ERR/${target}
else
rm ${LOG_DIR}/${target}.ERR
fi
else
if [ -s ${LOG_DIR}/${target}.ERR ] ; then
if grep -iw error ${LOG_DIR}/${target}.ERR ; then
: $(( ERR_CNT += 1 ))
ERR_LIST="${ERR_LIST} $target"
else
: $(( WRN_CNT += 1 ))
WRN_LIST="${WRN_LIST} $target"
fi
else
rm ${LOG_DIR}/${target}.ERR
fi
fi
OBJS=${output_dir}/u-boot
if [ -e ${output_dir}/spl/u-boot-spl ]; then
OBJS="${OBJS} ${output_dir}/spl/u-boot-spl"
fi
${CROSS_COMPILE}size ${OBJS} | tee -a ${LOG_DIR}/$target.MAKELOG
[ -e "${LOG_DIR}/${target}.ERR" ] && cat "${LOG_DIR}/${target}.ERR"
touch "${donep}${build_idx}"
}
manage_builds() {
search_idx=${OLDEST_IDX}
if [ "$ONLY_LIST" == 'y' ] ; then return ; fi
while true; do
if [ -e "${donep}${search_idx}" ] ; then
: $(( CURRENT_CNT-- ))
[ ${OLDEST_IDX} -eq ${search_idx} ] &&
: $(( OLDEST_IDX++ ))
# Only want to count it once
rm -f "${donep}${search_idx}"
touch "${skipp}${search_idx}"
elif [ -e "${skipp}${search_idx}" ] ; then
[ ${OLDEST_IDX} -eq ${search_idx} ] &&
: $(( OLDEST_IDX++ ))
fi
: $(( search_idx++ ))
if [ ${search_idx} -gt ${TOTAL_CNT} ] ; then
if [ ${CURRENT_CNT} -ge ${BUILD_NBUILDS} ] ; then
search_idx=${OLDEST_IDX}
sleep 1
else
break
fi
fi
done
}
build_targets() {
for t in "$@" ; do
# If a LIST_xxx var exists, use it. But avoid variable
# expansion in the eval when a board name contains certain
# characters that the shell interprets.
case ${t} in
*[-+=]*) list= ;;
*) list=$(eval echo '${LIST_'$t'}') ;;
esac
if [ -n "${list}" ] ; then
build_targets ${list}
else
: $((TOTAL_CNT += 1))
: $((CURRENT_CNT += 1))
rm -f "${donep}${TOTAL_CNT}"
rm -f "${skipp}${TOTAL_CNT}"
if [ "$CONTINUE" = 'y' -a -e ${LOG_DIR}/$t.MAKELOG ] ; then
: $((SKIP_CNT += 1))
touch "${donep}${TOTAL_CNT}"
elif [ "$REBUILD_ERRORS" = 'y' -a ! -e ${LOG_DIR}/$t.ERR ] ; then
: $((SKIP_CNT += 1))
touch "${donep}${TOTAL_CNT}"
else
if [ $BUILD_MANY == 1 ] ; then
build_target ${t} ${TOTAL_CNT} &
else
CUR_TGT="${t}"
build_target ${t} ${TOTAL_CNT}
CUR_TGT=''
fi
fi
fi
# We maintain a running count of all the builds we have done.
# Each finished build will have a file called ${donep}${n},
# where n is the index of the build. Each build
# we've already noted as finished will have ${skipp}${n}.
# We track the current index via TOTAL_CNT, and the oldest
# index. When we exceed the maximum number of parallel builds,
# We look from oldest to current for builds that have completed,
# and update the current count and oldest index as appropriate.
# If we've gone through the entire list, wait a second, and
# reprocess the entire list until we find a build that has
# completed
if [ ${CURRENT_CNT} -ge ${BUILD_NBUILDS} ] ; then
manage_builds
fi
done
${MAKE} distclean >/dev/null
${MAKE} ${target}_config
${MAKE} all 2>&1 >LOG/$target.MAKELOG | tee LOG/$target.ERR
${CROSS_COMPILE:-ppc_8xx-}size u-boot | tee -a LOG/$target.MAKELOG
}
#-----------------------------------------------------------------------
kill_children() {
local OS=$(uname -s)
local children=""
case "${OS}" in
"Darwin")
# Mac OS X is known to have BSD style ps
local pgid=$(ps -p $$ -o pgid | sed -e "/PGID/d")
children=$(ps -g $pgid -o pid | sed -e "/PID\|$$\|$pgid/d")
for arg in $@
do
case "$arg" in
5xx|8xx|824x|8260|4xx|7xx|74xx|SA|ARM7|ARM9|ppc|arm|pxa|mips|I486|x86)
for target in `eval echo '$LIST_'${arg}`
do
build_target ${target}
done
;;
*)
# everything else tries the GNU style
local pgid=$(ps -p $$ --no-headers -o "%r" | tr -d ' ')
children=$(pgrep -g $pgid | sed -e "/$$\|$pgid/d")
*) build_target ${arg}
;;
esac
kill $children 2> /dev/null
wait $children 2> /dev/null
exit
}
print_stats() {
if [ "$ONLY_LIST" == 'y' ] ; then return ; fi
# Only count boards that completed
: $((TOTAL_CNT = `find ${skipp}* 2> /dev/null | wc -l`))
rm -f ${donep}* ${skipp}*
if [ $BUILD_MANY == 1 ] && [ -e "${OUTPUT_PREFIX}/ERR" ] ; then
ERR_LIST=`grep -riwl error ${OUTPUT_PREFIX}/ERR/`
ERR_LIST=`for f in $ERR_LIST ; do echo -n " $(basename $f)" ; done`
ERR_CNT=`echo $ERR_LIST | wc -w | awk '{print $1}'`
WRN_LIST=`grep -riwL error ${OUTPUT_PREFIX}/ERR/`
WRN_LIST=`for f in $WRN_LIST ; do echo -n " $(basename $f)" ; done`
WRN_CNT=`echo $WRN_LIST | wc -w | awk '{print $1}'`
else
# Remove the logs for any board that was interrupted
rm -f ${LOG_DIR}/${CUR_TGT}.MAKELOG ${LOG_DIR}/${CUR_TGT}.ERR
fi
: $((TOTAL_CNT -= ${SKIP_CNT}))
echo ""
echo "--------------------- SUMMARY ----------------------------"
if [ "$CONTINUE" = 'y' -o "$REBUILD_ERRORS" = 'y' ] ; then
echo "Boards skipped: ${SKIP_CNT}"
fi
echo "Boards compiled: ${TOTAL_CNT}"
if [ ${ERR_CNT} -gt 0 ] ; then
echo "Boards with errors: ${ERR_CNT} (${ERR_LIST} )"
fi
if [ ${WRN_CNT} -gt 0 ] ; then
echo "Boards with warnings but no errors: ${WRN_CNT} (${WRN_LIST} )"
fi
echo "----------------------------------------------------------"
if [ $BUILD_MANY == 1 ] ; then
kill_children
fi
exit $RC
}
#-----------------------------------------------------------------------
# Build target groups selected by options, plus any command line args
set -- ${SELECTED} "$@"
# run PowerPC by default
[ $# = 0 ] && set -- powerpc
build_targets "$@"
wait
done

2172
Makefile

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5311
README

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View File

@@ -1,9 +0,0 @@
#
# (C) Copyright 2007 Semihalf
#
# SPDX-License-Identifier: GPL-2.0+
#
obj-y += api.o api_display.o api_net.o api_storage.o
obj-$(CONFIG_ARM) += api_platform-arm.o
obj-$(CONFIG_PPC) += api_platform-powerpc.o

View File

@@ -1,55 +0,0 @@
U-Boot machine/arch independent API for external apps
=====================================================
1. Main assumptions
- there is a single entry point (syscall) to the API
- per current design the syscall is a C-callable function in the U-Boot
text, which might evolve into a real syscall using machine exception trap
once this initial version proves functional
- the consumer app is responsible for producing appropriate context (call
number and arguments)
- upon entry, the syscall dispatches the call to other (existing) U-Boot
functional areas like networking or storage operations
- consumer application will recognize the API is available by searching
a specified (assumed by convention) range of address space for the
signature
- the U-Boot integral part of the API is meant to be thin and non-intrusive,
leaving as much processing as possible on the consumer application side,
for example it doesn't keep states, but relies on hints from the app and
so on
- optional (CONFIG_API)
2. Calls
- console related (getc, putc, tstc etc.)
- system (reset, platform info)
- time (delay, current)
- env vars (enumerate all, get, set)
- devices (enumerate all, open, close, read, write); currently two classes
of devices are recognized and supported: network and storage (ide, scsi,
usb etc.)
3. Structure overview
- core API, integral part of U-Boot, mandatory
- implements the single entry point (mimics UNIX syscall)
- glue
- entry point at the consumer side, allows to make syscall, mandatory
part
- helper conveniency wrappers so that consumer app does not have to use
the syscall directly, but in a more friendly manner (a la libc calls),
optional part
- consumer application
- calls directly, or leverages the provided glue mid-layer

691
api/api.c
View File

@@ -1,691 +0,0 @@
/*
* (C) Copyright 2007 Semihalf
*
* Written by: Rafal Jaworowski <raj@semihalf.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <config.h>
#include <command.h>
#include <common.h>
#include <malloc.h>
#include <environment.h>
#include <linux/types.h>
#include <api_public.h>
#include "api_private.h"
#define DEBUG
#undef DEBUG
/*****************************************************************************
*
* This is the API core.
*
* API_ functions are part of U-Boot code and constitute the lowest level
* calls:
*
* - they know what values they need as arguments
* - their direct return value pertains to the API_ "shell" itself (0 on
* success, some error code otherwise)
* - if the call returns a value it is buried within arguments
*
****************************************************************************/
#ifdef DEBUG
#define debugf(fmt, args...) do { printf("%s(): ", __func__); printf(fmt, ##args); } while (0)
#else
#define debugf(fmt, args...)
#endif
typedef int (*cfp_t)(va_list argp);
static int calls_no;
/*
* pseudo signature:
*
* int API_getc(int *c)
*/
static int API_getc(va_list ap)
{
int *c;
if ((c = (int *)va_arg(ap, u_int32_t)) == NULL)
return API_EINVAL;
*c = getc();
return 0;
}
/*
* pseudo signature:
*
* int API_tstc(int *c)
*/
static int API_tstc(va_list ap)
{
int *t;
if ((t = (int *)va_arg(ap, u_int32_t)) == NULL)
return API_EINVAL;
*t = tstc();
return 0;
}
/*
* pseudo signature:
*
* int API_putc(char *ch)
*/
static int API_putc(va_list ap)
{
char *c;
if ((c = (char *)va_arg(ap, u_int32_t)) == NULL)
return API_EINVAL;
putc(*c);
return 0;
}
/*
* pseudo signature:
*
* int API_puts(char **s)
*/
static int API_puts(va_list ap)
{
char *s;
if ((s = (char *)va_arg(ap, u_int32_t)) == NULL)
return API_EINVAL;
puts(s);
return 0;
}
/*
* pseudo signature:
*
* int API_reset(void)
*/
static int API_reset(va_list ap)
{
do_reset(NULL, 0, 0, NULL);
/* NOT REACHED */
return 0;
}
/*
* pseudo signature:
*
* int API_get_sys_info(struct sys_info *si)
*
* fill out the sys_info struct containing selected parameters about the
* machine
*/
static int API_get_sys_info(va_list ap)
{
struct sys_info *si;
si = (struct sys_info *)va_arg(ap, u_int32_t);
if (si == NULL)
return API_ENOMEM;
return (platform_sys_info(si)) ? 0 : API_ENODEV;
}
/*
* pseudo signature:
*
* int API_udelay(unsigned long *udelay)
*/
static int API_udelay(va_list ap)
{
unsigned long *d;
if ((d = (unsigned long *)va_arg(ap, u_int32_t)) == NULL)
return API_EINVAL;
udelay(*d);
return 0;
}
/*
* pseudo signature:
*
* int API_get_timer(unsigned long *current, unsigned long *base)
*/
static int API_get_timer(va_list ap)
{
unsigned long *base, *cur;
cur = (unsigned long *)va_arg(ap, u_int32_t);
if (cur == NULL)
return API_EINVAL;
base = (unsigned long *)va_arg(ap, u_int32_t);
if (base == NULL)
return API_EINVAL;
*cur = get_timer(*base);
return 0;
}
/*****************************************************************************
*
* pseudo signature:
*
* int API_dev_enum(struct device_info *)
*
*
* cookies uniqely identify the previously enumerated device instance and
* provide a hint for what to inspect in current enum iteration:
*
* - net: &eth_device struct address from list pointed to by eth_devices
*
* - storage: block_dev_desc_t struct address from &ide_dev_desc[n],
* &scsi_dev_desc[n] and similar tables
*
****************************************************************************/
static int API_dev_enum(va_list ap)
{
struct device_info *di;
/* arg is ptr to the device_info struct we are going to fill out */
di = (struct device_info *)va_arg(ap, u_int32_t);
if (di == NULL)
return API_EINVAL;
if (di->cookie == NULL) {
/* start over - clean up enumeration */
dev_enum_reset(); /* XXX shouldn't the name contain 'stor'? */
debugf("RESTART ENUM\n");
/* net device enumeration first */
if (dev_enum_net(di))
return 0;
}
/*
* The hidden assumption is there can only be one active network
* device and it is identified upon enumeration (re)start, so there's
* no point in trying to find network devices in other cases than the
* (re)start and hence the 'next' device can only be storage
*/
if (!dev_enum_storage(di))
/* make sure we mark there are no more devices */
di->cookie = NULL;
return 0;
}
static int API_dev_open(va_list ap)
{
struct device_info *di;
int err = 0;
/* arg is ptr to the device_info struct */
di = (struct device_info *)va_arg(ap, u_int32_t);
if (di == NULL)
return API_EINVAL;
/* Allow only one consumer of the device at a time */
if (di->state == DEV_STA_OPEN)
return API_EBUSY;
if (di->cookie == NULL)
return API_ENODEV;
if (di->type & DEV_TYP_STOR)
err = dev_open_stor(di->cookie);
else if (di->type & DEV_TYP_NET)
err = dev_open_net(di->cookie);
else
err = API_ENODEV;
if (!err)
di->state = DEV_STA_OPEN;
return err;
}
static int API_dev_close(va_list ap)
{
struct device_info *di;
int err = 0;
/* arg is ptr to the device_info struct */
di = (struct device_info *)va_arg(ap, u_int32_t);
if (di == NULL)
return API_EINVAL;
if (di->state == DEV_STA_CLOSED)
return 0;
if (di->cookie == NULL)
return API_ENODEV;
if (di->type & DEV_TYP_STOR)
err = dev_close_stor(di->cookie);
else if (di->type & DEV_TYP_NET)
err = dev_close_net(di->cookie);
else
/*
* In case of unknown device we cannot change its state, so
* only return error code
*/
err = API_ENODEV;
if (!err)
di->state = DEV_STA_CLOSED;
return err;
}
/*
* Notice: this is for sending network packets only, as U-Boot does not
* support writing to storage at the moment (12.2007)
*
* pseudo signature:
*
* int API_dev_write(
* struct device_info *di,
* void *buf,
* int *len
* )
*
* buf: ptr to buffer from where to get the data to send
*
* len: length of packet to be sent (in bytes)
*
*/
static int API_dev_write(va_list ap)
{
struct device_info *di;
void *buf;
int *len;
int err = 0;
/* 1. arg is ptr to the device_info struct */
di = (struct device_info *)va_arg(ap, u_int32_t);
if (di == NULL)
return API_EINVAL;
/* XXX should we check if device is open? i.e. the ->state ? */
if (di->cookie == NULL)
return API_ENODEV;
/* 2. arg is ptr to buffer from where to get data to write */
buf = (void *)va_arg(ap, u_int32_t);
if (buf == NULL)
return API_EINVAL;
/* 3. arg is length of buffer */
len = (int *)va_arg(ap, u_int32_t);
if (len == NULL)
return API_EINVAL;
if (*len <= 0)
return API_EINVAL;
if (di->type & DEV_TYP_STOR)
/*
* write to storage is currently not supported by U-Boot:
* no storage device implements block_write() method
*/
return API_ENODEV;
else if (di->type & DEV_TYP_NET)
err = dev_write_net(di->cookie, buf, *len);
else
err = API_ENODEV;
return err;
}
/*
* pseudo signature:
*
* int API_dev_read(
* struct device_info *di,
* void *buf,
* size_t *len,
* unsigned long *start
* size_t *act_len
* )
*
* buf: ptr to buffer where to put the read data
*
* len: ptr to length to be read
* - network: len of packet to read (in bytes)
* - storage: # of blocks to read (can vary in size depending on define)
*
* start: ptr to start block (only used for storage devices, ignored for
* network)
*
* act_len: ptr to where to put the len actually read
*/
static int API_dev_read(va_list ap)
{
struct device_info *di;
void *buf;
lbasize_t *len_stor, *act_len_stor;
lbastart_t *start;
int *len_net, *act_len_net;
/* 1. arg is ptr to the device_info struct */
di = (struct device_info *)va_arg(ap, u_int32_t);
if (di == NULL)
return API_EINVAL;
/* XXX should we check if device is open? i.e. the ->state ? */
if (di->cookie == NULL)
return API_ENODEV;
/* 2. arg is ptr to buffer from where to put the read data */
buf = (void *)va_arg(ap, u_int32_t);
if (buf == NULL)
return API_EINVAL;
if (di->type & DEV_TYP_STOR) {
/* 3. arg - ptr to var with # of blocks to read */
len_stor = (lbasize_t *)va_arg(ap, u_int32_t);
if (!len_stor)
return API_EINVAL;
if (*len_stor <= 0)
return API_EINVAL;
/* 4. arg - ptr to var with start block */
start = (lbastart_t *)va_arg(ap, u_int32_t);
/* 5. arg - ptr to var where to put the len actually read */
act_len_stor = (lbasize_t *)va_arg(ap, u_int32_t);
if (!act_len_stor)
return API_EINVAL;
*act_len_stor = dev_read_stor(di->cookie, buf, *len_stor, *start);
} else if (di->type & DEV_TYP_NET) {
/* 3. arg points to the var with length of packet to read */
len_net = (int *)va_arg(ap, u_int32_t);
if (!len_net)
return API_EINVAL;
if (*len_net <= 0)
return API_EINVAL;
/* 4. - ptr to var where to put the len actually read */
act_len_net = (int *)va_arg(ap, u_int32_t);
if (!act_len_net)
return API_EINVAL;
*act_len_net = dev_read_net(di->cookie, buf, *len_net);
} else
return API_ENODEV;
return 0;
}
/*
* pseudo signature:
*
* int API_env_get(const char *name, char **value)
*
* name: ptr to name of env var
*/
static int API_env_get(va_list ap)
{
char *name, **value;
if ((name = (char *)va_arg(ap, u_int32_t)) == NULL)
return API_EINVAL;
if ((value = (char **)va_arg(ap, u_int32_t)) == NULL)
return API_EINVAL;
*value = getenv(name);
return 0;
}
/*
* pseudo signature:
*
* int API_env_set(const char *name, const char *value)
*
* name: ptr to name of env var
*
* value: ptr to value to be set
*/
static int API_env_set(va_list ap)
{
char *name, *value;
if ((name = (char *)va_arg(ap, u_int32_t)) == NULL)
return API_EINVAL;
if ((value = (char *)va_arg(ap, u_int32_t)) == NULL)
return API_EINVAL;
setenv(name, value);
return 0;
}
/*
* pseudo signature:
*
* int API_env_enum(const char *last, char **next)
*
* last: ptr to name of env var found in last iteration
*/
static int API_env_enum(va_list ap)
{
int i, n;
char *last, **next;
last = (char *)va_arg(ap, u_int32_t);
if ((next = (char **)va_arg(ap, u_int32_t)) == NULL)
return API_EINVAL;
if (last == NULL)
/* start over */
*next = ((char *)env_get_addr(0));
else {
*next = last;
for (i = 0; env_get_char(i) != '\0'; i = n + 1) {
for (n = i; env_get_char(n) != '\0'; ++n) {
if (n >= CONFIG_ENV_SIZE) {
/* XXX shouldn't we set *next = NULL?? */
return 0;
}
}
if (envmatch((uchar *)last, i) < 0)
continue;
/* try to get next name */
i = n + 1;
if (env_get_char(i) == '\0') {
/* no more left */
*next = NULL;
return 0;
}
*next = ((char *)env_get_addr(i));
return 0;
}
}
return 0;
}
/*
* pseudo signature:
*
* int API_display_get_info(int type, struct display_info *di)
*/
static int API_display_get_info(va_list ap)
{
int type;
struct display_info *di;
type = va_arg(ap, int);
di = va_arg(ap, struct display_info *);
return display_get_info(type, di);
}
/*
* pseudo signature:
*
* int API_display_draw_bitmap(ulong bitmap, int x, int y)
*/
static int API_display_draw_bitmap(va_list ap)
{
ulong bitmap;
int x, y;
bitmap = va_arg(ap, ulong);
x = va_arg(ap, int);
y = va_arg(ap, int);
return display_draw_bitmap(bitmap, x, y);
}
/*
* pseudo signature:
*
* void API_display_clear(void)
*/
static int API_display_clear(va_list ap)
{
display_clear();
return 0;
}
static cfp_t calls_table[API_MAXCALL] = { NULL, };
/*
* The main syscall entry point - this is not reentrant, only one call is
* serviced until finished.
*
* e.g. syscall(1, int *, u_int32_t, u_int32_t, u_int32_t, u_int32_t);
*
* call: syscall number
*
* retval: points to the return value placeholder, this is the place the
* syscall puts its return value, if NULL the caller does not
* expect a return value
*
* ... syscall arguments (variable number)
*
* returns: 0 if the call not found, 1 if serviced
*/
int syscall(int call, int *retval, ...)
{
va_list ap;
int rv;
if (call < 0 || call >= calls_no) {
debugf("invalid call #%d\n", call);
return 0;
}
if (calls_table[call] == NULL) {
debugf("syscall #%d does not have a handler\n", call);
return 0;
}
va_start(ap, retval);
rv = calls_table[call](ap);
if (retval != NULL)
*retval = rv;
return 1;
}
void api_init(void)
{
struct api_signature *sig = NULL;
/* TODO put this into linker set one day... */
calls_table[API_RSVD] = NULL;
calls_table[API_GETC] = &API_getc;
calls_table[API_PUTC] = &API_putc;
calls_table[API_TSTC] = &API_tstc;
calls_table[API_PUTS] = &API_puts;
calls_table[API_RESET] = &API_reset;
calls_table[API_GET_SYS_INFO] = &API_get_sys_info;
calls_table[API_UDELAY] = &API_udelay;
calls_table[API_GET_TIMER] = &API_get_timer;
calls_table[API_DEV_ENUM] = &API_dev_enum;
calls_table[API_DEV_OPEN] = &API_dev_open;
calls_table[API_DEV_CLOSE] = &API_dev_close;
calls_table[API_DEV_READ] = &API_dev_read;
calls_table[API_DEV_WRITE] = &API_dev_write;
calls_table[API_ENV_GET] = &API_env_get;
calls_table[API_ENV_SET] = &API_env_set;
calls_table[API_ENV_ENUM] = &API_env_enum;
calls_table[API_DISPLAY_GET_INFO] = &API_display_get_info;
calls_table[API_DISPLAY_DRAW_BITMAP] = &API_display_draw_bitmap;
calls_table[API_DISPLAY_CLEAR] = &API_display_clear;
calls_no = API_MAXCALL;
debugf("API initialized with %d calls\n", calls_no);
dev_stor_init();
/*
* Produce the signature so the API consumers can find it
*/
sig = malloc(sizeof(struct api_signature));
if (sig == NULL) {
printf("API: could not allocate memory for the signature!\n");
return;
}
debugf("API sig @ 0x%08x\n", sig);
memcpy(sig->magic, API_SIG_MAGIC, 8);
sig->version = API_SIG_VERSION;
sig->syscall = &syscall;
sig->checksum = 0;
sig->checksum = crc32(0, (unsigned char *)sig,
sizeof(struct api_signature));
debugf("syscall entry: 0x%08x\n", sig->syscall);
}
void platform_set_mr(struct sys_info *si, unsigned long start, unsigned long size,
int flags)
{
int i;
if (!si->mr || !size || (flags == 0))
return;
/* find free slot */
for (i = 0; i < si->mr_no; i++)
if (si->mr[i].flags == 0) {
/* insert new mem region */
si->mr[i].start = start;
si->mr[i].size = size;
si->mr[i].flags = flags;
return;
}
}

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@@ -1,58 +0,0 @@
/*
* Copyright (c) 2011 The Chromium OS Authors.
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <api_public.h>
#include <lcd.h>
#include <video_font.h> /* Get font width and height */
/* lcd.h needs BMP_LOGO_HEIGHT to calculate CONSOLE_ROWS */
#if defined(CONFIG_LCD_LOGO) && !defined(CONFIG_LCD_INFO_BELOW_LOGO)
#include <bmp_logo.h>
#endif
/* TODO(clchiou): add support of video device */
int display_get_info(int type, struct display_info *di)
{
if (!di)
return API_EINVAL;
switch (type) {
default:
debug("%s: unsupport display device type: %d\n",
__FILE__, type);
return API_ENODEV;
#ifdef CONFIG_LCD
case DISPLAY_TYPE_LCD:
di->pixel_width = panel_info.vl_col;
di->pixel_height = panel_info.vl_row;
di->screen_rows = lcd_get_screen_rows();
di->screen_cols = lcd_get_screen_columns();
break;
#endif
}
di->type = type;
return 0;
}
int display_draw_bitmap(ulong bitmap, int x, int y)
{
if (!bitmap)
return API_EINVAL;
#ifdef CONFIG_LCD
return lcd_display_bitmap(bitmap, x, y);
#else
return API_ENODEV;
#endif
}
void display_clear(void)
{
#ifdef CONFIG_LCD
lcd_clear();
#endif
}

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@@ -1,117 +0,0 @@
/*
* (C) Copyright 2007 Semihalf
*
* Written by: Rafal Jaworowski <raj@semihalf.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <config.h>
#include <common.h>
#include <net.h>
#include <linux/types.h>
#include <api_public.h>
DECLARE_GLOBAL_DATA_PTR;
#define DEBUG
#undef DEBUG
#ifdef DEBUG
#define debugf(fmt, args...) do { printf("%s(): ", __func__); printf(fmt, ##args); } while (0)
#else
#define debugf(fmt, args...)
#endif
#define errf(fmt, args...) do { printf("ERROR @ %s(): ", __func__); printf(fmt, ##args); } while (0)
#ifdef CONFIG_CMD_NET
static int dev_valid_net(void *cookie)
{
return ((void *)eth_get_dev() == cookie) ? 1 : 0;
}
int dev_open_net(void *cookie)
{
if (!dev_valid_net(cookie))
return API_ENODEV;
if (eth_init(gd->bd) < 0)
return API_EIO;
return 0;
}
int dev_close_net(void *cookie)
{
if (!dev_valid_net(cookie))
return API_ENODEV;
eth_halt();
return 0;
}
/*
* There can only be one active eth interface at a time - use what is
* currently set to eth_current
*/
int dev_enum_net(struct device_info *di)
{
struct eth_device *eth_current = eth_get_dev();
di->type = DEV_TYP_NET;
di->cookie = (void *)eth_current;
if (di->cookie == NULL)
return 0;
memcpy(di->di_net.hwaddr, eth_current->enetaddr, 6);
debugf("device found, returning cookie 0x%08x\n",
(u_int32_t)di->cookie);
return 1;
}
int dev_write_net(void *cookie, void *buf, int len)
{
/* XXX verify that cookie points to a valid net device??? */
return eth_send(buf, len);
}
int dev_read_net(void *cookie, void *buf, int len)
{
/* XXX verify that cookie points to a valid net device??? */
return eth_receive(buf, len);
}
#else
int dev_open_net(void *cookie)
{
return API_ENODEV;
}
int dev_close_net(void *cookie)
{
return API_ENODEV;
}
int dev_enum_net(struct device_info *di)
{
return 0;
}
int dev_write_net(void *cookie, void *buf, int len)
{
return API_ENODEV;
}
int dev_read_net(void *cookie, void *buf, int len)
{
return API_ENODEV;
}
#endif

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@@ -1,37 +0,0 @@
/*
* (C) Copyright 2007 Semihalf
*
* Written by: Rafal Jaworowski <raj@semihalf.com>
*
* SPDX-License-Identifier: GPL-2.0+
*
* This file contains routines that fetch data from ARM-dependent sources
* (bd_info etc.)
*/
#include <config.h>
#include <linux/types.h>
#include <api_public.h>
#include <asm/u-boot.h>
#include <asm/global_data.h>
#include "api_private.h"
DECLARE_GLOBAL_DATA_PTR;
/*
* Important notice: handling of individual fields MUST be kept in sync with
* include/asm-arm/u-boot.h and include/asm-arm/global_data.h, so any changes
* need to reflect their current state and layout of structures involved!
*/
int platform_sys_info(struct sys_info *si)
{
int i;
for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++)
platform_set_mr(si, gd->bd->bi_dram[i].start,
gd->bd->bi_dram[i].size, MR_ATTR_DRAM);
return 1;
}

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@@ -1,54 +0,0 @@
/*
* (C) Copyright 2007 Semihalf
*
* Written by: Rafal Jaworowski <raj@semihalf.com>
*
* SPDX-License-Identifier: GPL-2.0+
*
* This file contains routines that fetch data from PowerPC-dependent sources
* (bd_info etc.)
*/
#include <config.h>
#include <linux/types.h>
#include <api_public.h>
#include <asm/u-boot.h>
#include <asm/global_data.h>
#include "api_private.h"
DECLARE_GLOBAL_DATA_PTR;
/*
* Important notice: handling of individual fields MUST be kept in sync with
* include/asm-ppc/u-boot.h and include/asm-ppc/global_data.h, so any changes
* need to reflect their current state and layout of structures involved!
*/
int platform_sys_info(struct sys_info *si)
{
si->clk_bus = gd->bus_clk;
si->clk_cpu = gd->cpu_clk;
#if defined(CONFIG_5xx) || defined(CONFIG_8xx) || defined(CONFIG_MPC8260) || \
defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
#define bi_bar bi_immr_base
#elif defined(CONFIG_MPC5xxx)
#define bi_bar bi_mbar_base
#elif defined(CONFIG_MPC83xx)
#define bi_bar bi_immrbar
#endif
#if defined(bi_bar)
si->bar = gd->bd->bi_bar;
#undef bi_bar
#else
si->bar = 0;
#endif
platform_set_mr(si, gd->bd->bi_memstart, gd->bd->bi_memsize, MR_ATTR_DRAM);
platform_set_mr(si, gd->bd->bi_flashstart, gd->bd->bi_flashsize, MR_ATTR_FLASH);
platform_set_mr(si, gd->bd->bi_sramstart, gd->bd->bi_sramsize, MR_ATTR_SRAM);
return 1;
}

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@@ -1,35 +0,0 @@
/*
* (C) Copyright 2007 Semihalf
*
* Written by: Rafal Jaworowski <raj@semihalf.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef _API_PRIVATE_H_
#define _API_PRIVATE_H_
void api_init(void);
void platform_set_mr(struct sys_info *, unsigned long, unsigned long, int);
int platform_sys_info(struct sys_info *);
void dev_enum_reset(void);
int dev_enum_storage(struct device_info *);
int dev_enum_net(struct device_info *);
int dev_open_stor(void *);
int dev_open_net(void *);
int dev_close_stor(void *);
int dev_close_net(void *);
lbasize_t dev_read_stor(void *, void *, lbasize_t, lbastart_t);
int dev_read_net(void *, void *, int);
int dev_write_net(void *, void *, int);
void dev_stor_init(void);
int display_get_info(int type, struct display_info *di);
int display_draw_bitmap(ulong bitmap, int x, int y);
void display_clear(void);
#endif /* _API_PRIVATE_H_ */

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@@ -1,373 +0,0 @@
/*
* (C) Copyright 2007-2008 Semihalf
*
* Written by: Rafal Jaworowski <raj@semihalf.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <config.h>
#include <common.h>
#include <api_public.h>
#if defined(CONFIG_CMD_USB) && defined(CONFIG_USB_STORAGE)
#include <usb.h>
#endif
#define DEBUG
#undef DEBUG
#ifdef DEBUG
#define debugf(fmt, args...) do { printf("%s(): ", __func__); printf(fmt, ##args); } while (0)
#else
#define debugf(fmt, args...)
#endif
#define errf(fmt, args...) do { printf("ERROR @ %s(): ", __func__); printf(fmt, ##args); } while (0)
#define ENUM_IDE 0
#define ENUM_USB 1
#define ENUM_SCSI 2
#define ENUM_MMC 3
#define ENUM_SATA 4
#define ENUM_MAX 5
struct stor_spec {
int max_dev;
int enum_started;
int enum_ended;
int type; /* "external" type: DT_STOR_{IDE,USB,etc} */
char *name;
};
static struct stor_spec specs[ENUM_MAX] = { { 0, 0, 0, 0, "" }, };
void dev_stor_init(void)
{
#if defined(CONFIG_CMD_IDE)
specs[ENUM_IDE].max_dev = CONFIG_SYS_IDE_MAXDEVICE;
specs[ENUM_IDE].enum_started = 0;
specs[ENUM_IDE].enum_ended = 0;
specs[ENUM_IDE].type = DEV_TYP_STOR | DT_STOR_IDE;
specs[ENUM_IDE].name = "ide";
#endif
#if defined(CONFIG_CMD_MMC)
specs[ENUM_MMC].max_dev = CONFIG_SYS_MMC_MAX_DEVICE;
specs[ENUM_MMC].enum_started = 0;
specs[ENUM_MMC].enum_ended = 0;
specs[ENUM_MMC].type = DEV_TYP_STOR | DT_STOR_MMC;
specs[ENUM_MMC].name = "mmc";
#endif
#if defined(CONFIG_CMD_SATA)
specs[ENUM_SATA].max_dev = CONFIG_SYS_SATA_MAX_DEVICE;
specs[ENUM_SATA].enum_started = 0;
specs[ENUM_SATA].enum_ended = 0;
specs[ENUM_SATA].type = DEV_TYP_STOR | DT_STOR_SATA;
specs[ENUM_SATA].name = "sata";
#endif
#if defined(CONFIG_CMD_SCSI)
specs[ENUM_SCSI].max_dev = CONFIG_SYS_SCSI_MAX_DEVICE;
specs[ENUM_SCSI].enum_started = 0;
specs[ENUM_SCSI].enum_ended = 0;
specs[ENUM_SCSI].type = DEV_TYP_STOR | DT_STOR_SCSI;
specs[ENUM_SCSI].name = "scsi";
#endif
#if defined(CONFIG_CMD_USB) && defined(CONFIG_USB_STORAGE)
specs[ENUM_USB].max_dev = USB_MAX_STOR_DEV;
specs[ENUM_USB].enum_started = 0;
specs[ENUM_USB].enum_ended = 0;
specs[ENUM_USB].type = DEV_TYP_STOR | DT_STOR_USB;
specs[ENUM_USB].name = "usb";
#endif
}
/*
* Finds next available device in the storage group
*
* type: storage group type - ENUM_IDE, ENUM_SCSI etc.
*
* first: if 1 the first device in the storage group is returned (if
* exists), if 0 the next available device is searched
*
* more: returns 0/1 depending if there are more devices in this group
* available (for future iterations)
*
* returns: 0/1 depending if device found in this iteration
*/
static int dev_stor_get(int type, int first, int *more, struct device_info *di)
{
int found = 0;
*more = 0;
int i;
block_dev_desc_t *dd;
if (first) {
di->cookie = (void *)get_dev(specs[type].name, 0);
if (di->cookie == NULL)
return 0;
else
found = 1;
} else {
for (i = 0; i < specs[type].max_dev; i++)
if (di->cookie == (void *)get_dev(specs[type].name, i)) {
/* previous cookie found -- advance to the
* next device, if possible */
if (++i >= specs[type].max_dev) {
/* out of range, no more to enum */
di->cookie = NULL;
break;
}
di->cookie = (void *)get_dev(specs[type].name, i);
if (di->cookie == NULL)
return 0;
else
found = 1;
/* provide hint if there are more devices in
* this group to enumerate */
if ((i + 1) < specs[type].max_dev)
*more = 1;
break;
}
}
if (found) {
di->type = specs[type].type;
if (di->cookie != NULL) {
dd = (block_dev_desc_t *)di->cookie;
if (dd->type == DEV_TYPE_UNKNOWN) {
debugf("device instance exists, but is not active..");
found = 0;
} else {
di->di_stor.block_count = dd->lba;
di->di_stor.block_size = dd->blksz;
}
}
} else
di->cookie = NULL;
return found;
}
/*
* returns: ENUM_IDE, ENUM_USB etc. based on block_dev_desc_t
*/
static int dev_stor_type(block_dev_desc_t *dd)
{
int i, j;
for (i = ENUM_IDE; i < ENUM_MAX; i++)
for (j = 0; j < specs[i].max_dev; j++)
if (dd == get_dev(specs[i].name, j))
return i;
return ENUM_MAX;
}
/*
* returns: 0/1 whether cookie points to some device in this group
*/
static int dev_is_stor(int type, struct device_info *di)
{
return (dev_stor_type(di->cookie) == type) ? 1 : 0;
}
static int dev_enum_stor(int type, struct device_info *di)
{
int found = 0, more = 0;
debugf("called, type %d\n", type);
/*
* Formulae for enumerating storage devices:
* 1. if cookie (hint from previous enum call) is NULL we start again
* with enumeration, so return the first available device, done.
*
* 2. if cookie is not NULL, check if it identifies some device in
* this group:
*
* 2a. if cookie is a storage device from our group (IDE, USB etc.),
* return next available (if exists) in this group
*
* 2b. if it isn't device from our group, check if such devices were
* ever enumerated before:
* - if not, return the first available device from this group
* - else return 0
*/
if (di->cookie == NULL) {
debugf("group%d - enum restart\n", type);
/*
* 1. Enumeration (re-)started: take the first available
* device, if exists
*/
found = dev_stor_get(type, 1, &more, di);
specs[type].enum_started = 1;
} else if (dev_is_stor(type, di)) {
debugf("group%d - enum continued for the next device\n", type);
if (specs[type].enum_ended) {
debugf("group%d - nothing more to enum!\n", type);
return 0;
}
/* 2a. Attempt to take a next available device in the group */
found = dev_stor_get(type, 0, &more, di);
} else {
if (specs[type].enum_ended) {
debugf("group %d - already enumerated, skipping\n", type);
return 0;
}
debugf("group%d - first time enum\n", type);
if (specs[type].enum_started == 0) {
/*
* 2b. If enumerating devices in this group did not
* happen before, it means the cookie pointed to a
* device frome some other group (another storage
* group, or network); in this case try to take the
* first available device from our group
*/
specs[type].enum_started = 1;
/*
* Attempt to take the first device in this group:
*'first element' flag is set
*/
found = dev_stor_get(type, 1, &more, di);
} else {
errf("group%d - out of order iteration\n", type);
found = 0;
more = 0;
}
}
/*
* If there are no more devices in this group, consider its
* enumeration finished
*/
specs[type].enum_ended = (!more) ? 1 : 0;
if (found)
debugf("device found, returning cookie 0x%08x\n",
(u_int32_t)di->cookie);
else
debugf("no device found\n");
return found;
}
void dev_enum_reset(void)
{
int i;
for (i = 0; i < ENUM_MAX; i ++) {
specs[i].enum_started = 0;
specs[i].enum_ended = 0;
}
}
int dev_enum_storage(struct device_info *di)
{
int i;
/*
* check: ide, usb, scsi, mmc
*/
for (i = ENUM_IDE; i < ENUM_MAX; i ++) {
if (dev_enum_stor(i, di))
return 1;
}
return 0;
}
static int dev_stor_is_valid(int type, block_dev_desc_t *dd)
{
int i;
for (i = 0; i < specs[type].max_dev; i++)
if (dd == get_dev(specs[type].name, i))
if (dd->type != DEV_TYPE_UNKNOWN)
return 1;
return 0;
}
int dev_open_stor(void *cookie)
{
int type = dev_stor_type(cookie);
if (type == ENUM_MAX)
return API_ENODEV;
if (dev_stor_is_valid(type, (block_dev_desc_t *)cookie))
return 0;
return API_ENODEV;
}
int dev_close_stor(void *cookie)
{
/*
* Not much to do as we actually do not alter storage devices upon
* close
*/
return 0;
}
static int dev_stor_index(block_dev_desc_t *dd)
{
int i, type;
type = dev_stor_type(dd);
for (i = 0; i < specs[type].max_dev; i++)
if (dd == get_dev(specs[type].name, i))
return i;
return (specs[type].max_dev);
}
lbasize_t dev_read_stor(void *cookie, void *buf, lbasize_t len, lbastart_t start)
{
int type;
block_dev_desc_t *dd = (block_dev_desc_t *)cookie;
if ((type = dev_stor_type(dd)) == ENUM_MAX)
return 0;
if (!dev_stor_is_valid(type, dd))
return 0;
if ((dd->block_read) == NULL) {
debugf("no block_read() for device 0x%08x\n", cookie);
return 0;
}
return (dd->block_read(dev_stor_index(dd), start, len, buf));
}

1
arch/.gitignore vendored
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/*/include/asm/arch

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choice
prompt "Architecture select"
default SANDBOX
config ARC
bool "ARC architecture"
config ARM
bool "ARM architecture"
select HAVE_PRIVATE_LIBGCC
select SUPPORT_OF_CONTROL
config AVR32
bool "AVR32 architecture"
config BLACKFIN
bool "Blackfin architecture"
config M68K
bool "M68000 architecture"
config MICROBLAZE
bool "MicroBlaze architecture"
select SUPPORT_OF_CONTROL
config MIPS
bool "MIPS architecture"
select HAVE_PRIVATE_LIBGCC
config NDS32
bool "NDS32 architecture"
config NIOS2
bool "Nios II architecture"
config OPENRISC
bool "OpenRISC architecture"
config PPC
bool "PowerPC architecture"
select HAVE_PRIVATE_LIBGCC
config SANDBOX
bool "Sandbox"
select SUPPORT_OF_CONTROL
config SH
bool "SuperH architecture"
select HAVE_PRIVATE_LIBGCC
config SPARC
bool "SPARC architecture"
config X86
bool "x86 architecture"
select HAVE_PRIVATE_LIBGCC
select SUPPORT_OF_CONTROL
endchoice
config SYS_ARCH
string
help
This option should contain the architecture name to build the
appropriate arch/<CONFIG_SYS_ARCH> directory.
All the architectures should specify this option correctly.
config SYS_CPU
string
help
This option should contain the CPU name to build the correct
arch/<CONFIG_SYS_ARCH>/cpu/<CONFIG_SYS_CPU> directory.
This is optional. For those targets without the CPU directory,
leave this option empty.
config SYS_SOC
string
help
This option should contain the SoC name to build the directory
arch/<CONFIG_SYS_ARCH>/cpu/<CONFIG_SYS_CPU>/<CONFIG_SYS_SOC>.
This is optional. For those targets without the SoC directory,
leave this option empty.
config SYS_VENDOR
string
help
This option should contain the vendor name of the target board.
If it is set and
board/<CONFIG_SYS_VENDOR>/common/Makefile exists, the vendor common
directory is compiled.
If CONFIG_SYS_BOARD is also set, the sources under
board/<CONFIG_SYS_VENDOR>/<CONFIG_SYS_BOARD> directory are compiled.
This is optional. For those targets without the vendor directory,
leave this option empty.
config SYS_BOARD
string
help
This option should contain the name of the target board.
If it is set, either board/<CONFIG_SYS_VENDOR>/<CONFIG_SYS_BOARD>
or board/<CONFIG_SYS_BOARD> directory is compiled depending on
whether CONFIG_SYS_VENDOR is set or not.
This is optional. For those targets without the board directory,
leave this option empty.
config SYS_CONFIG_NAME
string
help
This option should contain the base name of board header file.
The header file include/configs/<CONFIG_SYS_CONFIG_NAME>.h
should be included from include/config.h.
source "arch/arc/Kconfig"
source "arch/arm/Kconfig"
source "arch/avr32/Kconfig"
source "arch/blackfin/Kconfig"
source "arch/m68k/Kconfig"
source "arch/microblaze/Kconfig"
source "arch/mips/Kconfig"
source "arch/nds32/Kconfig"
source "arch/nios2/Kconfig"
source "arch/openrisc/Kconfig"
source "arch/powerpc/Kconfig"
source "arch/sandbox/Kconfig"
source "arch/sh/Kconfig"
source "arch/sparc/Kconfig"
source "arch/x86/Kconfig"

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menu "ARC architecture"
depends on ARC
config SYS_ARCH
default "arc"
choice
prompt "Target select"
config TARGET_TB100
bool "Support tb100"
config TARGET_ARCANGEL4
bool "Support arcangel4"
config TARGET_ARCANGEL4_BE
bool "Support arcangel4-be"
config TARGET_AXS101
bool "Support axs101"
endchoice
source "board/abilis/tb100/Kconfig"
source "board/synopsys/Kconfig"
source "board/synopsys/axs101/Kconfig"
endmenu

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#
# SPDX-License-Identifier: GPL-2.0+
#
head-y := arch/arc/cpu/$(CPU)/start.o
libs-y += arch/arc/cpu/$(CPU)/
libs-y += arch/arc/lib/
# MetaWare debugger doesn't support PIE (position-independent executable)
# so the only way to load U-Boot in MDB is to fake it by:
# 1. Reset PIE flag in ELF header
# 2. Strip all debug information from elf
ifdef CONFIG_SYS_LITTLE_ENDIAN
EXEC_TYPE_OFFSET=16
else
EXEC_TYPE_OFFSET=17
endif
mdbtrick: u-boot
$(Q)printf '\x02' | dd of=u-boot bs=1 seek=$(EXEC_TYPE_OFFSET) count=1 \
conv=notrunc &> /dev/null
$(Q)$(CROSS_COMPILE)strip -g u-boot

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@@ -1,33 +0,0 @@
#
# Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
#
# SPDX-License-Identifier: GPL-2.0+
#
ifndef CONFIG_SYS_BIG_ENDIAN
CONFIG_SYS_LITTLE_ENDIAN = 1
endif
ifdef CONFIG_SYS_LITTLE_ENDIAN
ARC_CROSS_COMPILE := arc-buildroot-linux-uclibc-
endif
ifdef CONFIG_SYS_BIG_ENDIAN
ARC_CROSS_COMPILE := arceb-buildroot-linux-uclibc-
PLATFORM_LDFLAGS += -EB
endif
ifeq ($(CROSS_COMPILE),)
CROSS_COMPILE := $(ARC_CROSS_COMPILE)
endif
PLATFORM_CPPFLAGS += -ffixed-r25 -D__ARC__ -gdwarf-2
# Needed for relocation
LDFLAGS_FINAL += -pie
# Load address for standalone apps
CONFIG_STANDALONE_LOAD_ADDR ?= 0x82000000
# Support generic board on ARC
__HAVE_ARCH_GENERIC_BOARD := y

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#
# Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
#
# SPDX-License-Identifier: GPL-2.0+
#
extra-y += start.o
obj-y += cache.o
obj-y += cpu.o
obj-y += interrupts.o
obj-y += reset.o
obj-y += timer.o

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/*
* Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <config.h>
#include <asm/arcregs.h>
/* Bit values in IC_CTRL */
#define IC_CTRL_CACHE_DISABLE (1 << 0)
/* Bit values in DC_CTRL */
#define DC_CTRL_CACHE_DISABLE (1 << 0)
#define DC_CTRL_INV_MODE_FLUSH (1 << 6)
#define DC_CTRL_FLUSH_STATUS (1 << 8)
int icache_status(void)
{
return (read_aux_reg(ARC_AUX_IC_CTRL) & IC_CTRL_CACHE_DISABLE) !=
IC_CTRL_CACHE_DISABLE;
}
void icache_enable(void)
{
write_aux_reg(ARC_AUX_IC_CTRL, read_aux_reg(ARC_AUX_IC_CTRL) &
~IC_CTRL_CACHE_DISABLE);
}
void icache_disable(void)
{
write_aux_reg(ARC_AUX_IC_CTRL, read_aux_reg(ARC_AUX_IC_CTRL) |
IC_CTRL_CACHE_DISABLE);
}
void invalidate_icache_all(void)
{
#ifndef CONFIG_SYS_ICACHE_OFF
/* Any write to IC_IVIC register triggers invalidation of entire I$ */
write_aux_reg(ARC_AUX_IC_IVIC, 1);
#endif /* CONFIG_SYS_ICACHE_OFF */
}
int dcache_status(void)
{
return (read_aux_reg(ARC_AUX_DC_CTRL) & DC_CTRL_CACHE_DISABLE) !=
DC_CTRL_CACHE_DISABLE;
}
void dcache_enable(void)
{
write_aux_reg(ARC_AUX_DC_CTRL, read_aux_reg(ARC_AUX_DC_CTRL) &
~(DC_CTRL_INV_MODE_FLUSH | DC_CTRL_CACHE_DISABLE));
}
void dcache_disable(void)
{
write_aux_reg(ARC_AUX_DC_CTRL, read_aux_reg(ARC_AUX_DC_CTRL) |
DC_CTRL_CACHE_DISABLE);
}
void flush_dcache_all(void)
{
/* Do flush of entire cache */
write_aux_reg(ARC_AUX_DC_FLSH, 1);
/* Wait flush end */
while (read_aux_reg(ARC_AUX_DC_CTRL) & DC_CTRL_FLUSH_STATUS)
;
}
#ifndef CONFIG_SYS_DCACHE_OFF
static void dcache_flush_line(unsigned addr)
{
#if (CONFIG_ARC_MMU_VER > 2)
write_aux_reg(ARC_AUX_DC_PTAG, addr);
#endif
write_aux_reg(ARC_AUX_DC_FLDL, addr);
/* Wait flush end */
while (read_aux_reg(ARC_AUX_DC_CTRL) & DC_CTRL_FLUSH_STATUS)
;
#ifndef CONFIG_SYS_ICACHE_OFF
/*
* Invalidate I$ for addresses range just flushed from D$.
* If we try to execute data flushed above it will be valid/correct
*/
#if (CONFIG_ARC_MMU_VER > 2)
write_aux_reg(ARC_AUX_IC_PTAG, addr);
#endif
write_aux_reg(ARC_AUX_IC_IVIL, addr);
#endif /* CONFIG_SYS_ICACHE_OFF */
}
#endif /* CONFIG_SYS_DCACHE_OFF */
void flush_dcache_range(unsigned long start, unsigned long end)
{
#ifndef CONFIG_SYS_DCACHE_OFF
unsigned int addr;
start = start & (~(CONFIG_SYS_CACHELINE_SIZE - 1));
end = end & (~(CONFIG_SYS_CACHELINE_SIZE - 1));
for (addr = start; addr <= end; addr += CONFIG_SYS_CACHELINE_SIZE)
dcache_flush_line(addr);
#endif /* CONFIG_SYS_DCACHE_OFF */
}
void invalidate_dcache_range(unsigned long start, unsigned long end)
{
#ifndef CONFIG_SYS_DCACHE_OFF
unsigned int addr;
start = start & (~(CONFIG_SYS_CACHELINE_SIZE - 1));
end = end & (~(CONFIG_SYS_CACHELINE_SIZE - 1));
for (addr = start; addr <= end; addr += CONFIG_SYS_CACHELINE_SIZE) {
#if (CONFIG_ARC_MMU_VER > 2)
write_aux_reg(ARC_AUX_DC_PTAG, addr);
#endif
write_aux_reg(ARC_AUX_DC_IVDL, addr);
}
#endif /* CONFIG_SYS_DCACHE_OFF */
}
void invalidate_dcache_all(void)
{
#ifndef CONFIG_SYS_DCACHE_OFF
/* Write 1 to DC_IVDC register triggers invalidation of entire D$ */
write_aux_reg(ARC_AUX_DC_IVDC, 1);
#endif /* CONFIG_SYS_DCACHE_OFF */
}
void flush_cache(unsigned long start, unsigned long size)
{
flush_dcache_range(start, start + size);
}

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#
# Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
#
# SPDX-License-Identifier: GPL-2.0+
#
PLATFORM_CPPFLAGS += -mA7

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@@ -1,47 +0,0 @@
/*
* Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <asm/arcregs.h>
#include <asm/cache.h>
DECLARE_GLOBAL_DATA_PTR;
int arch_cpu_init(void)
{
#ifdef CONFIG_SYS_ICACHE_OFF
icache_disable();
#else
icache_enable();
invalidate_icache_all();
#endif
flush_dcache_all();
#ifdef CONFIG_SYS_DCACHE_OFF
dcache_disable();
#else
dcache_enable();
#endif
timer_init();
/* In simulation (ISS) "CHIPID" and "ARCNUM" are all "ff" */
if ((read_aux_reg(ARC_AUX_IDENTITY) & 0xffffff00) == 0xffffff00)
gd->arch.running_on_hw = 0;
else
gd->arch.running_on_hw = 1;
gd->cpu_clk = CONFIG_SYS_CLK_FREQ;
gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
return 0;
}
int arch_early_init_r(void)
{
gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;
gd->bd->bi_memsize = CONFIG_SYS_SDRAM_SIZE;
return 0;
}

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/*
* Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <asm/arcregs.h>
#include <asm/ptrace.h>
/* Bit values in STATUS32 */
#define E1_MASK (1 << 1) /* Level 1 interrupts enable */
#define E2_MASK (1 << 2) /* Level 2 interrupts enable */
int interrupt_init(void)
{
return 0;
}
/*
* returns true if interrupts had been enabled before we disabled them
*/
int disable_interrupts(void)
{
int status = read_aux_reg(ARC_AUX_STATUS32);
int state = (status | E1_MASK | E2_MASK) ? 1 : 0;
status &= ~(E1_MASK | E2_MASK);
/* STATUS32 register is updated indirectly with "FLAG" instruction */
__asm__("flag %0" : : "r" (status));
return state;
}
void enable_interrupts(void)
{
unsigned int status = read_aux_reg(ARC_AUX_STATUS32);
status |= E1_MASK | E2_MASK;
/* STATUS32 register is updated indirectly with "FLAG" instruction */
__asm__("flag %0" : : "r" (status));
}
static void print_reg_file(long *reg_rev, int start_num)
{
unsigned int i;
/* Print 3 registers per line */
for (i = start_num; i < start_num + 25; i++) {
printf("r%02u: 0x%08lx\t", i, (unsigned long)*reg_rev);
if (((i + 1) % 3) == 0)
printf("\n");
/* Because pt_regs has registers reversed */
reg_rev--;
}
/* Add new-line if none was inserted in the end of loop above */
if (((i + 1) % 3) != 0)
printf("\n");
}
void show_regs(struct pt_regs *regs)
{
printf("RET:\t0x%08lx\nBLINK:\t0x%08lx\nSTAT32:\t0x%08lx\n",
regs->ret, regs->blink, regs->status32);
printf("GP: 0x%08lx\t r25: 0x%08lx\t\n", regs->r26, regs->r25);
printf("BTA: 0x%08lx\t SP: 0x%08lx\t FP: 0x%08lx\n", regs->bta,
regs->sp, regs->fp);
printf("LPS: 0x%08lx\tLPE: 0x%08lx\tLPC: 0x%08lx\n", regs->lp_start,
regs->lp_end, regs->lp_count);
print_reg_file(&(regs->r0), 0);
}
void bad_mode(struct pt_regs *regs)
{
if (regs)
show_regs(regs);
panic("Resetting CPU ...\n");
}
void do_memory_error(unsigned long address, struct pt_regs *regs)
{
printf("Memory error exception @ 0x%lx\n", address);
bad_mode(regs);
}
void do_instruction_error(unsigned long address, struct pt_regs *regs)
{
printf("Instruction error exception @ 0x%lx\n", address);
bad_mode(regs);
}
void do_machine_check_fault(unsigned long address, struct pt_regs *regs)
{
printf("Machine check exception @ 0x%lx\n", address);
bad_mode(regs);
}
void do_interrupt_handler(void)
{
printf("Interrupt fired\n");
bad_mode(0);
}
void do_itlb_miss(struct pt_regs *regs)
{
printf("I TLB miss exception\n");
bad_mode(regs);
}
void do_dtlb_miss(struct pt_regs *regs)
{
printf("D TLB miss exception\n");
bad_mode(regs);
}
void do_tlb_prot_violation(unsigned long address, struct pt_regs *regs)
{
printf("TLB protection violation or misaligned access @ 0x%lx\n",
address);
bad_mode(regs);
}
void do_privilege_violation(struct pt_regs *regs)
{
printf("Privilege violation exception\n");
bad_mode(regs);
}
void do_trap(struct pt_regs *regs)
{
printf("Trap exception\n");
bad_mode(regs);
}
void do_extension(struct pt_regs *regs)
{
printf("Extension instruction exception\n");
bad_mode(regs);
}

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@@ -1,19 +0,0 @@
/*
* Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <command.h>
#include <common.h>
int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
{
printf("Put your restart handler here\n");
#ifdef DEBUG
/* Stop debug session here */
__asm__("brk");
#endif
return 0;
}

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@@ -1,241 +0,0 @@
/*
* Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <asm-offsets.h>
#include <config.h>
#include <asm/arcregs.h>
/*
* Note on the LD/ST addressing modes with address register write-back
*
* LD.a same as LD.aw
*
* LD.a reg1, [reg2, x] => Pre Incr
* Eff Addr for load = [reg2 + x]
*
* LD.ab reg1, [reg2, x] => Post Incr
* Eff Addr for load = [reg2]
*/
.macro PUSH reg
st.a \reg, [%sp, -4]
.endm
.macro PUSHAX aux
lr %r9, [\aux]
PUSH %r9
.endm
.macro SAVE_R1_TO_R24
PUSH %r1
PUSH %r2
PUSH %r3
PUSH %r4
PUSH %r5
PUSH %r6
PUSH %r7
PUSH %r8
PUSH %r9
PUSH %r10
PUSH %r11
PUSH %r12
PUSH %r13
PUSH %r14
PUSH %r15
PUSH %r16
PUSH %r17
PUSH %r18
PUSH %r19
PUSH %r20
PUSH %r21
PUSH %r22
PUSH %r23
PUSH %r24
.endm
.macro SAVE_ALL_SYS
st %r0, [%sp]
lr %r0, [%ecr]
st %r0, [%sp, 8] /* ECR */
st %sp, [%sp, 4]
SAVE_R1_TO_R24
PUSH %r25
PUSH %gp
PUSH %fp
PUSH %blink
PUSHAX %eret
PUSHAX %erstatus
PUSH %lp_count
PUSHAX %lp_end
PUSHAX %lp_start
PUSHAX %erbta
.endm
.align 4
.globl _start
_start:
/* Critical system events */
j reset /* 0 - 0x000 */
j memory_error /* 1 - 0x008 */
j instruction_error /* 2 - 0x010 */
/* Device interrupts */
.rept 29
j interrupt_handler /* 3:31 - 0x018:0xF8 */
.endr
/* Exceptions */
j EV_MachineCheck /* 0x100, Fatal Machine check (0x20) */
j EV_TLBMissI /* 0x108, Intruction TLB miss (0x21) */
j EV_TLBMissD /* 0x110, Data TLB miss (0x22) */
j EV_TLBProtV /* 0x118, Protection Violation (0x23)
or Misaligned Access */
j EV_PrivilegeV /* 0x120, Privilege Violation (0x24) */
j EV_Trap /* 0x128, Trap exception (0x25) */
j EV_Extension /* 0x130, Extn Intruction Excp (0x26) */
memory_error:
SAVE_ALL_SYS
lr %r0, [%efa]
mov %r1, %sp
j do_memory_error
instruction_error:
SAVE_ALL_SYS
lr %r0, [%efa]
mov %r1, %sp
j do_instruction_error
interrupt_handler:
/* Todo - save and restore CPU context when interrupts will be in use */
bl do_interrupt_handler
rtie
EV_MachineCheck:
SAVE_ALL_SYS
lr %r0, [%efa]
mov %r1, %sp
j do_machine_check_fault
EV_TLBMissI:
SAVE_ALL_SYS
mov %r0, %sp
j do_itlb_miss
EV_TLBMissD:
SAVE_ALL_SYS
mov %r0, %sp
j do_dtlb_miss
EV_TLBProtV:
SAVE_ALL_SYS
lr %r0, [%efa]
mov %r1, %sp
j do_tlb_prot_violation
EV_PrivilegeV:
SAVE_ALL_SYS
mov %r0, %sp
j do_privilege_violation
EV_Trap:
SAVE_ALL_SYS
mov %r0, %sp
j do_trap
EV_Extension:
SAVE_ALL_SYS
mov %r0, %sp
j do_extension
reset:
/* Setup interrupt vector base that matches "__text_start" */
sr __text_start, [ARC_AUX_INTR_VEC_BASE]
/* Setup stack pointer */
mov %sp, CONFIG_SYS_INIT_SP_ADDR
mov %fp, %sp
/* Clear bss */
mov %r0, __bss_start
mov %r1, __bss_end
clear_bss:
st.ab 0, [%r0, 4]
brlt %r0, %r1, clear_bss
/* Zero the one and only argument of "board_init_f" */
mov_s %r0, 0
j board_init_f
/*
* void relocate_code (addr_sp, gd, addr_moni)
*
* This "function" does not return, instead it continues in RAM
* after relocating the monitor code.
*
* r0 = start_addr_sp
* r1 = new__gd
* r2 = relocaddr
*/
.align 4
.globl relocate_code
relocate_code:
/*
* r0-r12 might be clobbered by C functions
* so we use r13-r16 for storage here
*/
mov %r13, %r0 /* save addr_sp */
mov %r14, %r1 /* save addr of gd */
mov %r15, %r2 /* save addr of destination */
mov %r16, %r2 /* %r9 - relocation offset */
sub %r16, %r16, __image_copy_start
/* Set up the stack */
stack_setup:
mov %sp, %r13
mov %fp, %sp
/* Check if monitor is loaded right in place for relocation */
mov %r0, __image_copy_start
cmp %r0, %r15 /* skip relocation if code loaded */
bz do_board_init_r /* in target location already */
/* Copy data (__image_copy_start - __image_copy_end) to new location */
mov %r1, %r15
mov %r2, __image_copy_end
sub %r2, %r2, %r0 /* r3 <- amount of bytes to copy */
asr %r2, %r2, 2 /* r3 <- amount of words to copy */
mov %lp_count, %r2
lp copy_end
ld.ab %r2,[%r0,4]
st.ab %r2,[%r1,4]
copy_end:
/* Fix relocations related issues */
bl do_elf_reloc_fixups
#ifndef CONFIG_SYS_ICACHE_OFF
bl invalidate_icache_all
#endif
#ifndef CONFIG_SYS_DCACHE_OFF
bl flush_dcache_all
#endif
/* Update position of intterupt vector table */
lr %r0, [ARC_AUX_INTR_VEC_BASE] /* Read current position */
add %r0, %r0, %r16 /* Update address */
sr %r0, [ARC_AUX_INTR_VEC_BASE] /* Write new position */
do_board_init_r:
/* Prepare for exection of "board_init_r" in relocated monitor */
mov %r2, board_init_r /* old address of "board_init_r()" */
add %r2, %r2, %r16 /* new address of "board_init_r()" */
mov %r0, %r14 /* 1-st parameter: gd_t */
mov %r1, %r15 /* 2-nd parameter: dest_addr */
j [%r2]

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@@ -1,24 +0,0 @@
/*
* Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <asm/arcregs.h>
#define NH_MODE (1 << 1) /* Disable timer if CPU is halted */
int timer_init(void)
{
write_aux_reg(ARC_AUX_TIMER0_CTRL, NH_MODE);
/* Set max value for counter/timer */
write_aux_reg(ARC_AUX_TIMER0_LIMIT, 0xffffffff);
/* Set initial count value and restart counter/timer */
write_aux_reg(ARC_AUX_TIMER0_CNT, 0);
return 0;
}
unsigned long timer_read_counter(void)
{
return read_aux_reg(ARC_AUX_TIMER0_CNT);
}

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@@ -1,72 +0,0 @@
/*
* Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
OUTPUT_FORMAT("elf32-littlearc", "elf32-littlearc", "elf32-littlearc")
OUTPUT_ARCH(arc)
ENTRY(_start)
SECTIONS
{
. = ALIGN(4);
.text : {
*(.__text_start)
*(.__image_copy_start)
CPUDIR/start.o (.text*)
*(.text*)
}
. = ALIGN(4);
.text_end :
{
*(.__text_end)
}
. = ALIGN(4);
.rodata : {
*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
}
. = ALIGN(4);
.data : {
*(.data*)
}
. = ALIGN(4);
.u_boot_list : {
KEEP(*(SORT(.u_boot_list*)));
}
. = ALIGN(4);
.rel_dyn_start : {
*(.__rel_dyn_start)
}
.rela.dyn : {
*(.rela.dyn)
}
.rel_dyn_end : {
*(.__rel_dyn_end)
}
. = ALIGN(4);
.bss_start : {
*(.__bss_start);
}
.bss : {
*(.bss*)
}
.bss_end : {
*(.__bss_end);
}
. = ALIGN(4);
.image_copy_end : {
*(.__image_copy_end)
*(.__init_end)
}
}

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@@ -1,55 +0,0 @@
/*
* Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef _ASM_ARC_ARCREGS_H
#define _ASM_ARC_ARCREGS_H
/*
* ARC architecture has additional address space - auxiliary registers.
* These registers are mostly used for configuration purposes.
* These registers are not memory mapped and special commands are used for
* access: "lr"/"sr".
*/
#define ARC_AUX_IDENTITY 0x04
#define ARC_AUX_STATUS32 0x0a
/* Instruction cache related auxiliary registers */
#define ARC_AUX_IC_IVIC 0x10
#define ARC_AUX_IC_CTRL 0x11
#define ARC_AUX_IC_IVIL 0x19
#if (CONFIG_ARC_MMU_VER > 2)
#define ARC_AUX_IC_PTAG 0x1E
#endif
/* Timer related auxiliary registers */
#define ARC_AUX_TIMER0_CNT 0x21 /* Timer 0 count */
#define ARC_AUX_TIMER0_CTRL 0x22 /* Timer 0 control */
#define ARC_AUX_TIMER0_LIMIT 0x23 /* Timer 0 limit */
#define ARC_AUX_INTR_VEC_BASE 0x25
/* Data cache related auxiliary registers */
#define ARC_AUX_DC_IVDC 0x47
#define ARC_AUX_DC_CTRL 0x48
#define ARC_AUX_DC_IVDL 0x4A
#define ARC_AUX_DC_FLSH 0x4B
#define ARC_AUX_DC_FLDL 0x4C
#if (CONFIG_ARC_MMU_VER > 2)
#define ARC_AUX_DC_PTAG 0x5C
#endif
#ifndef __ASSEMBLY__
/* Accessors for auxiliary registers */
#define read_aux_reg(reg) __builtin_arc_lr(reg)
/* gcc builtin sr needs reg param to be long immediate */
#define write_aux_reg(reg_immed, val) \
__builtin_arc_sr((unsigned int)val, reg_immed)
#endif /* __ASSEMBLY__ */
#endif /* _ASM_ARC_ARCREGS_H */

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@@ -1,19 +0,0 @@
/*
* Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __ASM_ARC_BITOPS_H
#define __ASM_ARC_BITOPS_H
/*
* hweightN: returns the hamming weight (i.e. the number
* of bits set) of a N-bit word
*/
#define hweight32(x) generic_hweight32(x)
#define hweight16(x) generic_hweight16(x)
#define hweight8(x) generic_hweight8(x)
#endif /* __ASM_ARC_BITOPS_H */

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@@ -1,23 +0,0 @@
/*
* Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __ASM_ARC_BYTEORDER_H
#define __ASM_ARC_BYTEORDER_H
#include <asm/types.h>
#if defined(__GNUC__) && !defined(__STRICT_ANSI__)
#define __BYTEORDER_HAS_U64__
#define __SWAB_64_THRU_32__
#endif
#ifdef __LITTLE_ENDIAN__
#include <linux/byteorder/little_endian.h>
#else
#include <linux/byteorder/big_endian.h>
#endif /* CONFIG_SYS_BIG_ENDIAN */
#endif /* ASM_ARC_BYTEORDER_H */

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@@ -1,23 +0,0 @@
/*
* Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __ASM_ARC_CACHE_H
#define __ASM_ARC_CACHE_H
#include <config.h>
/*
* The current upper bound for ARC L1 data cache line sizes is 128 bytes.
* We use that value for aligning DMA buffers unless the board config has
* specified an alternate cache line size.
*/
#ifdef CONFIG_SYS_CACHELINE_SIZE
#define ARCH_DMA_MINALIGN CONFIG_SYS_CACHELINE_SIZE
#else
#define ARCH_DMA_MINALIGN 128
#endif
#endif /* __ASM_ARC_CACHE_H */

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@@ -1,15 +0,0 @@
/*
* Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __ASM_ARC_CONFIG_H_
#define __ASM_ARC_CONFIG_H_
#define CONFIG_SYS_GENERIC_GLOBAL_DATA
#define CONFIG_SYS_BOOT_RAMDISK_HIGH
#define CONFIG_LMB
#endif /*__ASM_ARC_CONFIG_H_ */

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@@ -1 +0,0 @@
#include <asm-generic/errno.h>

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@@ -1,19 +0,0 @@
/*
* Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __ASM_ARC_GLOBAL_DATA_H
#define __ASM_ARC_GLOBAL_DATA_H
/* Architecture-specific global data */
struct arch_global_data {
int running_on_hw;
};
#include <asm-generic/global_data.h>
#define DECLARE_GLOBAL_DATA_PTR register volatile gd_t *gd asm ("r25")
#endif /* __ASM_ARC_GLOBAL_DATA_H */

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@@ -1,218 +0,0 @@
/*
* Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __ASM_ARC_IO_H
#define __ASM_ARC_IO_H
#include <linux/types.h>
#include <asm/byteorder.h>
static inline void sync(void)
{
/* Not yet implemented */
}
static inline u8 __raw_readb(const volatile void __iomem *addr)
{
u8 b;
__asm__ __volatile__("ldb%U1 %0, %1\n"
: "=r" (b)
: "m" (*(volatile u8 __force *)addr)
: "memory");
return b;
}
static inline u16 __raw_readw(const volatile void __iomem *addr)
{
u16 s;
__asm__ __volatile__("ldw%U1 %0, %1\n"
: "=r" (s)
: "m" (*(volatile u16 __force *)addr)
: "memory");
return s;
}
static inline u32 __raw_readl(const volatile void __iomem *addr)
{
u32 w;
__asm__ __volatile__("ld%U1 %0, %1\n"
: "=r" (w)
: "m" (*(volatile u32 __force *)addr)
: "memory");
return w;
}
#define readb __raw_readb
static inline u16 readw(const volatile void __iomem *addr)
{
return __le16_to_cpu(__raw_readw(addr));
}
static inline u32 readl(const volatile void __iomem *addr)
{
return __le32_to_cpu(__raw_readl(addr));
}
static inline void __raw_writeb(u8 b, volatile void __iomem *addr)
{
__asm__ __volatile__("stb%U1 %0, %1\n"
:
: "r" (b), "m" (*(volatile u8 __force *)addr)
: "memory");
}
static inline void __raw_writew(u16 s, volatile void __iomem *addr)
{
__asm__ __volatile__("stw%U1 %0, %1\n"
:
: "r" (s), "m" (*(volatile u16 __force *)addr)
: "memory");
}
static inline void __raw_writel(u32 w, volatile void __iomem *addr)
{
__asm__ __volatile__("st%U1 %0, %1\n"
:
: "r" (w), "m" (*(volatile u32 __force *)addr)
: "memory");
}
#define writeb __raw_writeb
#define writew(b, addr) __raw_writew(__cpu_to_le16(b), addr)
#define writel(b, addr) __raw_writel(__cpu_to_le32(b), addr)
static inline int __raw_readsb(unsigned int addr, void *data, int bytelen)
{
__asm__ __volatile__ ("1:ld.di r8, [r0]\n"
"sub.f r2, r2, 1\n"
"bnz.d 1b\n"
"stb.ab r8, [r1, 1]\n"
:
: "r" (addr), "r" (data), "r" (bytelen)
: "r8");
return bytelen;
}
static inline int __raw_readsw(unsigned int addr, void *data, int wordlen)
{
__asm__ __volatile__ ("1:ld.di r8, [r0]\n"
"sub.f r2, r2, 1\n"
"bnz.d 1b\n"
"stw.ab r8, [r1, 2]\n"
:
: "r" (addr), "r" (data), "r" (wordlen)
: "r8");
return wordlen;
}
static inline int __raw_readsl(unsigned int addr, void *data, int longlen)
{
__asm__ __volatile__ ("1:ld.di r8, [r0]\n"
"sub.f r2, r2, 1\n"
"bnz.d 1b\n"
"st.ab r8, [r1, 4]\n"
:
: "r" (addr), "r" (data), "r" (longlen)
: "r8");
return longlen;
}
static inline int __raw_writesb(unsigned int addr, void *data, int bytelen)
{
__asm__ __volatile__ ("1:ldb.ab r8, [r1, 1]\n"
"sub.f r2, r2, 1\n"
"bnz.d 1b\n"
"st.di r8, [r0, 0]\n"
:
: "r" (addr), "r" (data), "r" (bytelen)
: "r8");
return bytelen;
}
static inline int __raw_writesw(unsigned int addr, void *data, int wordlen)
{
__asm__ __volatile__ ("1:ldw.ab r8, [r1, 2]\n"
"sub.f r2, r2, 1\n"
"bnz.d 1b\n"
"st.ab.di r8, [r0, 0]\n"
:
: "r" (addr), "r" (data), "r" (wordlen)
: "r8");
return wordlen;
}
static inline int __raw_writesl(unsigned int addr, void *data, int longlen)
{
__asm__ __volatile__ ("1:ld.ab r8, [r1, 4]\n"
"sub.f r2, r2, 1\n"
"bnz.d 1b\n"
"st.ab.di r8, [r0, 0]\n"
:
: "r" (addr), "r" (data), "r" (longlen)
: "r8");
return longlen;
}
#define out_arch(type, endian, a, v) __raw_write##type(cpu_to_##endian(v), a)
#define in_arch(type, endian, a) endian##_to_cpu(__raw_read##type(a))
#define out_le32(a, v) out_arch(l, le32, a, v)
#define out_le16(a, v) out_arch(w, le16, a, v)
#define in_le32(a) in_arch(l, le32, a)
#define in_le16(a) in_arch(w, le16, a)
#define out_be32(a, v) out_arch(l, be32, a, v)
#define out_be16(a, v) out_arch(w, be16, a, v)
#define in_be32(a) in_arch(l, be32, a)
#define in_be16(a) in_arch(w, be16, a)
#define out_8(a, v) __raw_writeb(v, a)
#define in_8(a) __raw_readb(a)
/*
* Clear and set bits in one shot. These macros can be used to clear and
* set multiple bits in a register using a single call. These macros can
* also be used to set a multiple-bit bit pattern using a mask, by
* specifying the mask in the 'clear' parameter and the new bit pattern
* in the 'set' parameter.
*/
#define clrbits(type, addr, clear) \
out_##type((addr), in_##type(addr) & ~(clear))
#define setbits(type, addr, set) \
out_##type((addr), in_##type(addr) | (set))
#define clrsetbits(type, addr, clear, set) \
out_##type((addr), (in_##type(addr) & ~(clear)) | (set))
#define clrbits_be32(addr, clear) clrbits(be32, addr, clear)
#define setbits_be32(addr, set) setbits(be32, addr, set)
#define clrsetbits_be32(addr, clear, set) clrsetbits(be32, addr, clear, set)
#define clrbits_le32(addr, clear) clrbits(le32, addr, clear)
#define setbits_le32(addr, set) setbits(le32, addr, set)
#define clrsetbits_le32(addr, clear, set) clrsetbits(le32, addr, clear, set)
#define clrbits_be16(addr, clear) clrbits(be16, addr, clear)
#define setbits_be16(addr, set) setbits(be16, addr, set)
#define clrsetbits_be16(addr, clear, set) clrsetbits(be16, addr, clear, set)
#define clrbits_le16(addr, clear) clrbits(le16, addr, clear)
#define setbits_le16(addr, set) setbits(le16, addr, set)
#define clrsetbits_le16(addr, clear, set) clrsetbits(le16, addr, clear, set)
#define clrbits_8(addr, clear) clrbits(8, addr, clear)
#define setbits_8(addr, set) setbits(8, addr, set)
#define clrsetbits_8(addr, clear, set) clrsetbits(8, addr, clear, set)
#endif /* __ASM_ARC_IO_H */

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@@ -1,43 +0,0 @@
/*
* Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __ASM_ARC_POSIX_TYPES_H
#define __ASM_ARC_POSIX_TYPES_H
typedef unsigned short __kernel_dev_t;
typedef unsigned long __kernel_ino_t;
typedef unsigned short __kernel_mode_t;
typedef unsigned short __kernel_nlink_t;
typedef long __kernel_off_t;
typedef int __kernel_pid_t;
typedef unsigned short __kernel_ipc_pid_t;
typedef unsigned short __kernel_uid_t;
typedef unsigned short __kernel_gid_t;
#ifdef __GNUC__
typedef __SIZE_TYPE__ __kernel_size_t;
#else
typedef unsigned int __kernel_size_t;
#endif
typedef int __kernel_ssize_t;
typedef int __kernel_ptrdiff_t;
typedef long __kernel_time_t;
typedef long __kernel_suseconds_t;
typedef long __kernel_clock_t;
typedef int __kernel_daddr_t;
typedef char *__kernel_caddr_t;
typedef unsigned short __kernel_uid16_t;
typedef unsigned short __kernel_gid16_t;
typedef unsigned int __kernel_uid32_t;
typedef unsigned int __kernel_gid32_t;
typedef unsigned short __kernel_old_uid_t;
typedef unsigned short __kernel_old_gid_t;
#ifdef __GNUC__
typedef long long __kernel_loff_t;
#endif
#endif /* __ASM_ARC_POSIX_TYPES_H */

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@@ -1,50 +0,0 @@
/*
* Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __ASM_ARC_PTRACE_H
#define __ASM_ARC_PTRACE_H
struct pt_regs {
long bta;
long lp_start;
long lp_end;
long lp_count;
long status32;
long ret;
long blink;
long fp;
long r26; /* gp */
long r25;
long r24;
long r23;
long r22;
long r21;
long r20;
long r19;
long r18;
long r17;
long r16;
long r15;
long r14;
long r13;
long r12;
long r11;
long r10;
long r9;
long r8;
long r7;
long r6;
long r5;
long r4;
long r3;
long r2;
long r1;
long r0;
long sp;
long ecr;
};
#endif /* __ASM_ARC_PTRACE_H */

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@@ -1,14 +0,0 @@
/*
* Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __ASM_ARC_SECTIONS_H
#define __ASM_ARC_SECTIONS_H
#include <asm-generic/sections.h>
extern ulong __text_end;
#endif /* __ASM_ARC_SECTIONS_H */

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@@ -1,27 +0,0 @@
/*
* Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __ASM_ARC_STRING_H
#define __ASM_ARC_STRING_H
#define __HAVE_ARCH_MEMSET
#define __HAVE_ARCH_MEMCPY
#define __HAVE_ARCH_MEMCMP
#define __HAVE_ARCH_STRCHR
#define __HAVE_ARCH_STRCPY
#define __HAVE_ARCH_STRCMP
#define __HAVE_ARCH_STRLEN
extern void *memset(void *ptr, int, __kernel_size_t);
extern void *memcpy(void *, const void *, __kernel_size_t);
extern void memzero(void *ptr, __kernel_size_t n);
extern int memcmp(const void *, const void *, __kernel_size_t);
extern char *strchr(const char *s, int c);
extern char *strcpy(char *dest, const char *src);
extern int strcmp(const char *cs, const char *ct);
extern __kernel_size_t strlen(const char *);
#endif /* __ASM_ARC_STRING_H */

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@@ -1,55 +0,0 @@
/*
* Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __ASM_ARC_TYPES_H
#define __ASM_ARC_TYPES_H
typedef unsigned short umode_t;
/*
* __xx is ok: it doesn't pollute the POSIX namespace. Use these in the
* header files exported to user space
*/
typedef __signed__ char __s8;
typedef unsigned char __u8;
typedef __signed__ short __s16;
typedef unsigned short __u16;
typedef __signed__ int __s32;
typedef unsigned int __u32;
#if defined(__GNUC__) && !defined(__STRICT_ANSI__)
typedef __signed__ long long __s64;
typedef unsigned long long __u64;
#endif
/*
* These aren't exported outside the kernel to avoid name space clashes
*/
typedef signed char s8;
typedef unsigned char u8;
typedef signed short s16;
typedef unsigned short u16;
typedef signed int s32;
typedef unsigned int u32;
typedef signed long long s64;
typedef unsigned long long u64;
#define BITS_PER_LONG 32
/* Dma addresses are 32-bits wide. */
typedef u32 dma_addr_t;
typedef unsigned long phys_addr_t;
typedef unsigned long phys_size_t;
#endif /* __ASM_ARC_TYPES_H */

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@@ -1,12 +0,0 @@
/*
* Copyright (C) 2014 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __ASM_ARC_U_BOOT_ARC_H__
#define __ASM_ARC_U_BOOT_ARC_H__
int arch_early_init_r(void);
#endif /* __ASM_ARC_U_BOOT_ARC_H__ */

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@@ -1,15 +0,0 @@
/*
* Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __ASM_ARC_U_BOOT_H__
#define __ASM_ARC_U_BOOT_H__
#include <asm-generic/u-boot.h>
/* For image.h:image_check_target_arch() */
#define IH_ARCH_DEFAULT IH_ARCH_ARC
#endif /* __ASM_ARC_U_BOOT_H__ */

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@@ -1 +0,0 @@
#include <asm-generic/unaligned.h>

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@@ -1,16 +0,0 @@
#
# Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
#
# SPDX-License-Identifier: GPL-2.0+
#
obj-y += sections.o
obj-y += relocate.o
obj-y += strchr-700.o
obj-y += strcmp.o
obj-y += strcpy-700.o
obj-y += strlen.o
obj-y += memcmp.o
obj-y += memcpy-700.o
obj-y += memset.o
obj-$(CONFIG_CMD_BOOTM) += bootm.o

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@@ -1,106 +0,0 @@
/*
* Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
DECLARE_GLOBAL_DATA_PTR;
static ulong get_sp(void)
{
ulong ret;
asm("mov %0, sp" : "=r"(ret) : );
return ret;
}
void arch_lmb_reserve(struct lmb *lmb)
{
ulong sp;
/*
* Booting a (Linux) kernel image
*
* Allocate space for command line and board info - the
* address should be as high as possible within the reach of
* the kernel (see CONFIG_SYS_BOOTMAPSZ settings), but in unused
* memory, which means far enough below the current stack
* pointer.
*/
sp = get_sp();
debug("## Current stack ends at 0x%08lx ", sp);
/* adjust sp by 4K to be safe */
sp -= 4096;
lmb_reserve(lmb, sp, (CONFIG_SYS_SDRAM_BASE + gd->ram_size - sp));
}
static int cleanup_before_linux(void)
{
disable_interrupts();
flush_dcache_all();
invalidate_icache_all();
return 0;
}
/* Subcommand: PREP */
static void boot_prep_linux(bootm_headers_t *images)
{
if (image_setup_linux(images))
hang();
}
/* Subcommand: GO */
static void boot_jump_linux(bootm_headers_t *images, int flag)
{
void (*kernel_entry)(int zero, int arch, uint params);
unsigned int r0, r2;
int fake = (flag & BOOTM_STATE_OS_FAKE_GO);
kernel_entry = (void (*)(int, int, uint))images->ep;
debug("## Transferring control to Linux (at address %08lx)...\n",
(ulong) kernel_entry);
bootstage_mark(BOOTSTAGE_ID_RUN_OS);
printf("\nStarting kernel ...%s\n\n", fake ?
"(fake run for tracing)" : "");
bootstage_mark_name(BOOTSTAGE_ID_BOOTM_HANDOFF, "start_kernel");
cleanup_before_linux();
if (IMAGE_ENABLE_OF_LIBFDT && images->ft_len) {
r0 = 2;
r2 = (unsigned int)images->ft_addr;
} else {
r0 = 1;
r2 = (unsigned int)getenv("bootargs");
}
if (!fake)
kernel_entry(r0, 0, r2);
}
int do_bootm_linux(int flag, int argc, char *argv[], bootm_headers_t *images)
{
/* No need for those on ARC */
if ((flag & BOOTM_STATE_OS_BD_T) || (flag & BOOTM_STATE_OS_CMDLINE))
return -1;
if (flag & BOOTM_STATE_OS_PREP) {
boot_prep_linux(images);
return 0;
}
if (flag & (BOOTM_STATE_OS_GO | BOOTM_STATE_OS_FAKE_GO)) {
boot_jump_linux(images, flag);
return 0;
}
boot_prep_linux(images);
boot_jump_linux(images, flag);
return 0;
}

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@@ -1,121 +0,0 @@
/*
* Copyright (C) 2004, 2007-2010, 2011-2014 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifdef __LITTLE_ENDIAN__
#define WORD2 r2
#define SHIFT r3
#else /* __BIG_ENDIAN__ */
#define WORD2 r3
#define SHIFT r2
#endif /* _ENDIAN__ */
.global memcmp
.align 4
memcmp:
or %r12, %r0, %r1
asl_s %r12, %r12, 30
sub %r3, %r2, 1
brls %r2, %r12, .Lbytewise
ld %r4, [%r0, 0]
ld %r5, [%r1, 0]
lsr.f %lp_count, %r3, 3
lpne .Loop_end
ld_s WORD2, [%r0, 4]
ld_s %r12, [%r1, 4]
brne %r4, %r5, .Leven
ld.a %r4, [%r0, 8]
ld.a %r5, [%r1, 8]
brne WORD2, %r12, .Lodd
.Loop_end:
asl_s SHIFT, SHIFT, 3
bhs_s .Last_cmp
brne %r4, %r5, .Leven
ld %r4, [%r0, 4]
ld %r5, [%r1, 4]
#ifdef __LITTLE_ENDIAN__
nop_s
/* one more load latency cycle */
.Last_cmp:
xor %r0, %r4, %r5
bset %r0, %r0, SHIFT
sub_s %r1, %r0, 1
bic_s %r1, %r1, %r0
norm %r1, %r1
b.d .Leven_cmp
and %r1, %r1, 24
.Leven:
xor %r0, %r4, %r5
sub_s %r1, %r0, 1
bic_s %r1, %r1, %r0
norm %r1, %r1
/* slow track insn */
and %r1, %r1, 24
.Leven_cmp:
asl %r2, %r4, %r1
asl %r12, %r5, %r1
lsr_s %r2, %r2, 1
lsr_s %r12, %r12, 1
j_s.d [%blink]
sub %r0, %r2, %r12
.balign 4
.Lodd:
xor %r0, WORD2, %r12
sub_s %r1, %r0, 1
bic_s %r1, %r1, %r0
norm %r1, %r1
/* slow track insn */
and %r1, %r1, 24
asl_s %r2, %r2, %r1
asl_s %r12, %r12, %r1
lsr_s %r2, %r2, 1
lsr_s %r12, %r12, 1
j_s.d [%blink]
sub %r0, %r2, %r12
#else /* __BIG_ENDIAN__ */
.Last_cmp:
neg_s SHIFT, SHIFT
lsr %r4, %r4, SHIFT
lsr %r5, %r5, SHIFT
/* slow track insn */
.Leven:
sub.f %r0, %r4, %r5
mov.ne %r0, 1
j_s.d [%blink]
bset.cs %r0, %r0, 31
.Lodd:
cmp_s WORD2, %r12
mov_s %r0, 1
j_s.d [%blink]
bset.cs %r0, %r0, 31
#endif /* _ENDIAN__ */
.balign 4
.Lbytewise:
breq %r2, 0, .Lnil
ldb %r4, [%r0, 0]
ldb %r5, [%r1, 0]
lsr.f %lp_count, %r3
lpne .Lbyte_end
ldb_s %r3, [%r0, 1]
ldb %r12, [%r1, 1]
brne %r4, %r5, .Lbyte_even
ldb.a %r4, [%r0, 2]
ldb.a %r5, [%r1, 2]
brne %r3, %r12, .Lbyte_odd
.Lbyte_end:
bcc .Lbyte_even
brne %r4, %r5, .Lbyte_even
ldb_s %r3, [%r0, 1]
ldb_s %r12, [%r1, 1]
.Lbyte_odd:
j_s.d [%blink]
sub %r0, %r3, %r12
.Lbyte_even:
j_s.d [%blink]
sub %r0, %r4, %r5
.Lnil:
j_s.d [%blink]
mov %r0, 0

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@@ -1,63 +0,0 @@
/*
* Copyright (C) 2004, 2007-2010, 2011-2014 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
.global memcpy
.align 4
memcpy:
or %r3, %r0, %r1
asl_s %r3, %r3, 30
mov_s %r5, %r0
brls.d %r2, %r3, .Lcopy_bytewise
sub.f %r3, %r2, 1
ld_s %r12, [%r1, 0]
asr.f %lp_count, %r3, 3
bbit0.d %r3, 2, .Lnox4
bmsk_s %r2, %r2, 1
st.ab %r12, [%r5, 4]
ld.a %r12, [%r1, 4]
.Lnox4:
lppnz .Lendloop
ld_s %r3, [%r1, 4]
st.ab %r12, [%r5, 4]
ld.a %r12, [%r1, 8]
st.ab %r3, [%r5, 4]
.Lendloop:
breq %r2, 0, .Last_store
ld %r3, [%r5, 0]
#ifdef __LITTLE_ENDIAN__
add3 %r2, -1, %r2
/* uses long immediate */
xor_s %r12, %r12, %r3
bmsk %r12, %r12, %r2
xor_s %r12, %r12, %r3
#else /* __BIG_ENDIAN__ */
sub3 %r2, 31, %r2
/* uses long immediate */
xor_s %r3, %r3, %r12
bmsk %r3, %r3, %r2
xor_s %r12, %r12, %r3
#endif /* _ENDIAN__ */
.Last_store:
j_s.d [%blink]
st %r12, [%r5, 0]
.balign 4
.Lcopy_bytewise:
jcs [%blink]
ldb_s %r12, [%r1, 0]
lsr.f %lp_count, %r3
bhs_s .Lnox1
stb.ab %r12, [%r5, 1]
ldb.a %r12, [%r1, 1]
.Lnox1:
lppnz .Lendbloop
ldb_s %r3, [%r1, 1]
stb.ab %r12, [%r5, 1]
ldb.a %r12, [%r1, 2]
stb.ab %r3, [%r5, 1]
.Lendbloop:
j_s.d [%blink]
stb %r12, [%r5, 0]

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@@ -1,62 +0,0 @@
/*
* Copyright (C) 2004, 2007-2010, 2011-2014 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#define SMALL 7 /* Must be at least 6 to deal with alignment/loop issues. */
.global memset
.align 4
memset:
mov_s %r4, %r0
or %r12, %r0, %r2
bmsk.f %r12, %r12, 1
extb_s %r1, %r1
asl %r3, %r1, 8
beq.d .Laligned
or_s %r1, %r1, %r3
brls %r2, SMALL, .Ltiny
add %r3, %r2, %r0
stb %r1, [%r3, -1]
bclr_s %r3, %r3, 0
stw %r1, [%r3, -2]
bmsk.f %r12, %r0, 1
add_s %r2, %r2, %r12
sub.ne %r2, %r2, 4
stb.ab %r1, [%r4, 1]
and %r4, %r4, -2
stw.ab %r1, [%r4, 2]
and %r4, %r4, -4
.balign 4
.Laligned:
asl %r3, %r1, 16
lsr.f %lp_count, %r2, 2
or_s %r1, %r1, %r3
lpne .Loop_end
st.ab %r1, [%r4, 4]
.Loop_end:
j_s [%blink]
.balign 4
.Ltiny:
mov.f %lp_count, %r2
lpne .Ltiny_end
stb.ab %r1, [%r4, 1]
.Ltiny_end:
j_s [%blink]
/*
* memzero: @r0 = mem, @r1 = size_t
* memset: @r0 = mem, @r1 = char, @r2 = size_t
*/
.global memzero
.align 4
memzero:
/* adjust bzero args to memset args */
mov %r2, %r1
mov %r1, 0
/* tail call so need to tinker with blink */
b memset

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@@ -1,76 +0,0 @@
/*
* Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <elf.h>
#include <asm/sections.h>
DECLARE_GLOBAL_DATA_PTR;
/*
* Base functionality is taken from x86 version with added ARC-specifics
*/
int do_elf_reloc_fixups(void)
{
Elf32_Rela *re_src = (Elf32_Rela *)(&__rel_dyn_start);
Elf32_Rela *re_end = (Elf32_Rela *)(&__rel_dyn_end);
Elf32_Addr *offset_ptr_rom, *last_offset = NULL;
Elf32_Addr *offset_ptr_ram;
do {
/* Get the location from the relocation entry */
offset_ptr_rom = (Elf32_Addr *)re_src->r_offset;
/* Check that the location of the relocation is in .text */
if (offset_ptr_rom >= (Elf32_Addr *)CONFIG_SYS_TEXT_BASE &&
offset_ptr_rom > last_offset) {
unsigned int val;
/* Switch to the in-RAM version */
offset_ptr_ram = (Elf32_Addr *)((ulong)offset_ptr_rom +
gd->reloc_off);
/*
* Use "memcpy" because target location might be
* 16-bit aligned on ARC so we may need to read
* byte-by-byte. On attempt to read entire word by
* CPU throws an exception
*/
memcpy(&val, offset_ptr_ram, sizeof(int));
#ifdef __LITTLE_ENDIAN__
/* If location in ".text" section swap value */
if ((unsigned int)offset_ptr_rom <
(unsigned int)&__text_end)
val = (val << 16) | (val >> 16);
#endif
/* Check that the target points into .text */
if (val >= CONFIG_SYS_TEXT_BASE && val <=
(unsigned int)&__bss_end) {
val += gd->reloc_off;
#ifdef __LITTLE_ENDIAN__
/* If location in ".text" section swap value */
if ((unsigned int)offset_ptr_rom <
(unsigned int)&__text_end)
val = (val << 16) | (val >> 16);
#endif
memcpy(offset_ptr_ram, &val, sizeof(int));
} else {
debug(" %p: rom reloc %x, ram %p, value %x, limit %x\n",
re_src, re_src->r_offset, offset_ptr_ram,
val, (unsigned int)&__bss_end);
}
} else {
debug(" %p: rom reloc %x, last %p\n", re_src,
re_src->r_offset, last_offset);
}
last_offset = offset_ptr_rom;
} while (++re_src < re_end);
return 0;
}

View File

@@ -1,21 +0,0 @@
/*
* Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
/*
* For some reason linker sets linker-generated symbols to zero in PIE mode.
* A work-around is substitution of linker-generated symbols with
* compiler-generated symbols which are properly handled by linker in PAE mode.
*/
char __bss_start[0] __attribute__((section(".__bss_start")));
char __bss_end[0] __attribute__((section(".__bss_end")));
char __image_copy_start[0] __attribute__((section(".__image_copy_start")));
char __image_copy_end[0] __attribute__((section(".__image_copy_end")));
char __rel_dyn_start[0] __attribute__((section(".__rel_dyn_start")));
char __rel_dyn_end[0] __attribute__((section(".__rel_dyn_end")));
char __text_start[0] __attribute__((section(".__text_start")));
char __text_end[0] __attribute__((section(".__text_end")));
char __init_end[0] __attribute__((section(".__init_end")));

View File

@@ -1,141 +0,0 @@
/*
* Copyright (C) 2004, 2007-2010, 2011-2014 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
/*
* ARC700 has a relatively long pipeline and branch prediction, so we want
* to avoid branches that are hard to predict. On the other hand, the
* presence of the norm instruction makes it easier to operate on whole
* words branch-free.
*/
.global strchr
.align 4
strchr:
extb_s %r1, %r1
asl %r5, %r1, 8
bmsk %r2, %r0, 1
or %r5, %r5, %r1
mov_s %r3, 0x01010101
breq.d %r2, %r0, .Laligned
asl %r4, %r5, 16
sub_s %r0, %r0, %r2
asl %r7, %r2, 3
ld_s %r2, [%r0]
#ifdef __LITTLE_ENDIAN__
asl %r7, %r3, %r7
#else /* __BIG_ENDIAN__ */
lsr %r7, %r3, %r7
#endif /* _ENDIAN__ */
or %r5, %r5, %r4
ror %r4, %r3
sub %r12, %r2, %r7
bic_s %r12, %r12, %r2
and %r12, %r12, %r4
brne.d %r12, 0, .Lfound0_ua
xor %r6, %r2, %r5
ld.a %r2, [%r0, 4]
sub %r12, %r6, %r7
bic %r12, %r12, %r6
#ifdef __LITTLE_ENDIAN__
and %r7, %r12, %r4
/* For speed, we want this branch to be unaligned. */
breq %r7, 0, .Loop
/* Likewise this one */
b .Lfound_char
#else /* __BIG_ENDIAN__ */
and %r12, %r12, %r4
/* For speed, we want this branch to be unaligned. */
breq %r12, 0, .Loop
lsr_s %r12, %r12, 7
bic %r2, %r7, %r6
b.d .Lfound_char_b
and_s %r2, %r2, %r12
#endif /* _ENDIAN__ */
/* We require this code address to be unaligned for speed... */
.Laligned:
ld_s %r2, [%r0]
or %r5, %r5, %r4
ror %r4, %r3
/* ... so that this code address is aligned, for itself and ... */
.Loop:
sub %r12, %r2, %r3
bic_s %r12, %r12, %r2
and %r12, %r12, %r4
brne.d %r12, 0, .Lfound0
xor %r6, %r2, %r5
ld.a %r2, [%r0, 4]
sub %r12, %r6, %r3
bic %r12, %r12, %r6
and %r7, %r12, %r4
breq %r7, 0, .Loop
/*
*... so that this branch is unaligned.
* Found searched-for character.
* r0 has already advanced to next word.
*/
#ifdef __LITTLE_ENDIAN__
/*
* We only need the information about the first matching byte
* (i.e. the least significant matching byte) to be exact,
* hence there is no problem with carry effects.
*/
.Lfound_char:
sub %r3, %r7, 1
bic %r3, %r3, %r7
norm %r2, %r3
sub_s %r0, %r0, 1
asr_s %r2, %r2, 3
j.d [%blink]
sub_s %r0, %r0, %r2
.balign 4
.Lfound0_ua:
mov %r3, %r7
.Lfound0:
sub %r3, %r6, %r3
bic %r3, %r3, %r6
and %r2, %r3, %r4
or_s %r12, %r12, %r2
sub_s %r3, %r12, 1
bic_s %r3, %r3, %r12
norm %r3, %r3
add_s %r0, %r0, 3
asr_s %r12, %r3, 3
asl.f 0, %r2, %r3
sub_s %r0, %r0, %r12
j_s.d [%blink]
mov.pl %r0, 0
#else /* __BIG_ENDIAN__ */
.Lfound_char:
lsr %r7, %r7, 7
bic %r2, %r7, %r6
.Lfound_char_b:
norm %r2, %r2
sub_s %r0, %r0, 4
asr_s %r2, %r2, 3
j.d [%blink]
add_s %r0, %r0, %r2
.Lfound0_ua:
mov_s %r3, %r7
.Lfound0:
asl_s %r2, %r2, 7
or %r7, %r6, %r4
bic_s %r12, %r12, %r2
sub %r2, %r7, %r3
or %r2, %r2, %r6
bic %r12, %r2, %r12
bic.f %r3, %r4, %r12
norm %r3, %r3
add.pl %r3, %r3, 1
asr_s %r12, %r3, 3
asl.f 0, %r2, %r3
add_s %r0, %r0, %r12
j_s.d [%blink]
mov.mi %r0, 0
#endif /* _ENDIAN__ */

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@@ -1,97 +0,0 @@
/*
* Copyright (C) 2004, 2007-2010, 2011-2014 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
/*
* This is optimized primarily for the ARC700.
* It would be possible to speed up the loops by one cycle / word
* respective one cycle / byte by forcing double source 1 alignment, unrolling
* by a factor of two, and speculatively loading the second word / byte of
* source 1; however, that would increase the overhead for loop setup / finish,
* and strcmp might often terminate early.
*/
.global strcmp
.align 4
strcmp:
or %r2, %r0, %r1
bmsk_s %r2, %r2, 1
brne %r2, 0, .Lcharloop
mov_s %r12, 0x01010101
ror %r5, %r12
.Lwordloop:
ld.ab %r2, [%r0, 4]
ld.ab %r3, [%r1, 4]
nop_s
sub %r4, %r2, %r12
bic %r4, %r4, %r2
and %r4, %r4, %r5
brne %r4, 0, .Lfound0
breq %r2 ,%r3, .Lwordloop
#ifdef __LITTLE_ENDIAN__
xor %r0, %r2, %r3 /* mask for difference */
sub_s %r1, %r0, 1
bic_s %r0, %r0, %r1 /* mask for least significant difference bit */
sub %r1, %r5, %r0
xor %r0, %r5, %r1 /* mask for least significant difference byte */
and_s %r2, %r2, %r0
and_s %r3, %r3, %r0
#endif /* _ENDIAN__ */
cmp_s %r2, %r3
mov_s %r0, 1
j_s.d [%blink]
bset.lo %r0, %r0, 31
.balign 4
#ifdef __LITTLE_ENDIAN__
.Lfound0:
xor %r0, %r2, %r3 /* mask for difference */
or %r0, %r0, %r4 /* or in zero indicator */
sub_s %r1, %r0, 1
bic_s %r0, %r0, %r1 /* mask for least significant difference bit */
sub %r1, %r5, %r0
xor %r0, %r5, %r1 /* mask for least significant difference byte */
and_s %r2, %r2, %r0
and_s %r3, %r3, %r0
sub.f %r0, %r2, %r3
mov.hi %r0, 1
j_s.d [%blink]
bset.lo %r0, %r0, 31
#else /* __BIG_ENDIAN__ */
/*
* The zero-detection above can mis-detect 0x01 bytes as zeroes
* because of carry-propagateion from a lower significant zero byte.
* We can compensate for this by checking that bit0 is zero.
* This compensation is not necessary in the step where we
* get a low estimate for r2, because in any affected bytes
* we already have 0x00 or 0x01, which will remain unchanged
* when bit 7 is cleared.
*/
.balign 4
.Lfound0:
lsr %r0, %r4, 8
lsr_s %r1, %r2
bic_s %r2, %r2, %r0 /* get low estimate for r2 and get ... */
bic_s %r0, %r0, %r1 /* <this is the adjusted mask for zeros> */
or_s %r3, %r3, %r0 /* ... high estimate r3 so that r2 > r3 will */
cmp_s %r3, %r2 /* ... be independent of trailing garbage */
or_s %r2, %r2, %r0 /* likewise for r3 > r2 */
bic_s %r3, %r3, %r0
rlc %r0, 0 /* r0 := r2 > r3 ? 1 : 0 */
cmp_s %r2, %r3
j_s.d [%blink]
bset.lo %r0, %r0, 31
#endif /* _ENDIAN__ */
.balign 4
.Lcharloop:
ldb.ab %r2,[%r0,1]
ldb.ab %r3,[%r1,1]
nop_s
breq %r2, 0, .Lcmpend
breq %r2, %r3, .Lcharloop
.Lcmpend:
j_s.d [%blink]
sub %r0, %r2, %r3

View File

@@ -1,67 +0,0 @@
/*
* Copyright (C) 2004, 2007-2010, 2011-2014 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
/*
* If dst and src are 4 byte aligned, copy 8 bytes at a time.
* If the src is 4, but not 8 byte aligned, we first read 4 bytes to get
* it 8 byte aligned. Thus, we can do a little read-ahead, without
* dereferencing a cache line that we should not touch.
* Note that short and long instructions have been scheduled to avoid
* branch stalls.
* The beq_s to r3z could be made unaligned & long to avoid a stall
* there, but it is not likely to be taken often, and it would also be likely
* to cost an unaligned mispredict at the next call.
*/
.global strcpy
.align 4
strcpy:
or %r2, %r0, %r1
bmsk_s %r2, %r2, 1
brne.d %r2, 0, charloop
mov_s %r10, %r0
ld_s %r3, [%r1, 0]
mov %r8, 0x01010101
bbit0.d %r1, 2, loop_start
ror %r12, %r8
sub %r2, %r3, %r8
bic_s %r2, %r2, %r3
tst_s %r2,%r12
bne r3z
mov_s %r4,%r3
.balign 4
loop:
ld.a %r3, [%r1, 4]
st.ab %r4, [%r10, 4]
loop_start:
ld.a %r4, [%r1, 4]
sub %r2, %r3, %r8
bic_s %r2, %r2, %r3
tst_s %r2, %r12
bne_s r3z
st.ab %r3, [%r10, 4]
sub %r2, %r4, %r8
bic %r2, %r2, %r4
tst %r2, %r12
beq loop
mov_s %r3, %r4
#ifdef __LITTLE_ENDIAN__
r3z: bmsk.f %r1, %r3, 7
lsr_s %r3, %r3, 8
#else /* __BIG_ENDIAN__ */
r3z: lsr.f %r1, %r3, 24
asl_s %r3, %r3, 8
#endif /* _ENDIAN__ */
bne.d r3z
stb.ab %r1, [%r10, 1]
j_s [%blink]
.balign 4
charloop:
ldb.ab %r3, [%r1, 1]
brne.d %r3, 0, charloop
stb.ab %r3, [%r10, 1]
j [%blink]

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@@ -1,80 +0,0 @@
/*
* Copyright (C) 2004, 2007-2010, 2011-2014 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
.global strlen
.align 4
strlen:
or %r3, %r0, 7
ld %r2, [%r3, -7]
ld.a %r6, [%r3, -3]
mov %r4, 0x01010101
/* uses long immediate */
#ifdef __LITTLE_ENDIAN__
asl_s %r1, %r0, 3
btst_s %r0, 2
asl %r7, %r4, %r1
ror %r5, %r4
sub %r1, %r2, %r7
bic_s %r1, %r1, %r2
mov.eq %r7, %r4
sub %r12, %r6, %r7
bic %r12, %r12, %r6
or.eq %r12, %r12, %r1
and %r12, %r12, %r5
brne %r12, 0, .Learly_end
#else /* __BIG_ENDIAN__ */
ror %r5, %r4
btst_s %r0, 2
mov_s %r1, 31
sub3 %r7, %r1, %r0
sub %r1, %r2, %r4
bic_s %r1, %r1, %r2
bmsk %r1, %r1, %r7
sub %r12, %r6, %r4
bic %r12, %r12, %r6
bmsk.ne %r12, %r12, %r7
or.eq %r12, %r12, %r1
and %r12, %r12, %r5
brne %r12, 0, .Learly_end
#endif /* _ENDIAN__ */
.Loop:
ld_s %r2, [%r3, 4]
ld.a %r6, [%r3, 8]
/* stall for load result */
sub %r1, %r2, %r4
bic_s %r1, %r1, %r2
sub %r12, %r6, %r4
bic %r12, %r12, %r6
or %r12, %r12, %r1
and %r12, %r12, %r5
breq %r12, 0, .Loop
.Lend:
and.f %r1, %r1, %r5
sub.ne %r3, %r3, 4
mov.eq %r1, %r12
#ifdef __LITTLE_ENDIAN__
sub_s %r2, %r1, 1
bic_s %r2, %r2, %r1
norm %r1, %r2
sub_s %r0, %r0, 3
lsr_s %r1, %r1, 3
sub %r0, %r3, %r0
j_s.d [%blink]
sub %r0, %r0, %r1
#else /* __BIG_ENDIAN__ */
lsr_s %r1, %r1, 7
mov.eq %r2, %r6
bic_s %r1, %r1, %r2
norm %r1, %r1
sub %r0, %r3, %r0
lsr_s %r1, %r1, 3
j_s.d [%blink]
add %r0, %r0, %r1
#endif /* _ENDIAN */
.Learly_end:
b.d .Lend
sub_s.ne %r1, %r1, %r1

View File

@@ -1,989 +0,0 @@
menu "ARM architecture"
depends on ARM
config SYS_ARCH
default "arm"
config ARM64
bool
config HAS_VBAR
bool
config CPU_ARM720T
bool
config CPU_ARM920T
bool
config CPU_ARM926EJS
bool
config CPU_ARM946ES
bool
config CPU_ARM1136
bool
config CPU_ARM1176
bool
select HAS_VBAR
config CPU_V7
bool
select HAS_VBAR
config CPU_PXA
bool
config CPU_SA1100
bool
config SYS_CPU
default "arm720t" if CPU_ARM720T
default "arm920t" if CPU_ARM920T
default "arm926ejs" if CPU_ARM926EJS
default "arm946es" if CPU_ARM946ES
default "arm1136" if CPU_ARM1136
default "arm1176" if CPU_ARM1176
default "armv7" if CPU_V7
default "pxa" if CPU_PXA
default "sa1100" if CPU_SA1100
default "armv8" if ARM64
choice
prompt "Target select"
config TARGET_INTEGRATORAP_CM720T
bool "Support integratorap_cm720t"
select CPU_ARM720T
config TARGET_INTEGRATORAP_CM920T
bool "Support integratorap_cm920t"
select CPU_ARM920T
config TARGET_INTEGRATORCP_CM920T
bool "Support integratorcp_cm920t"
select CPU_ARM920T
config TARGET_A320EVB
bool "Support a320evb"
select CPU_ARM920T
config TARGET_AT91RM9200EK
bool "Support at91rm9200ek"
select CPU_ARM920T
config TARGET_EB_CPUX9K2
bool "Support eb_cpux9k2"
select CPU_ARM920T
config TARGET_CPUAT91
bool "Support cpuat91"
select CPU_ARM920T
config TARGET_EDB93XX
bool "Support edb93xx"
select CPU_ARM920T
config TARGET_SCB9328
bool "Support scb9328"
select CPU_ARM920T
config TARGET_CM4008
bool "Support cm4008"
select CPU_ARM920T
config TARGET_CM41XX
bool "Support cm41xx"
select CPU_ARM920T
config TARGET_VCMA9
bool "Support VCMA9"
select CPU_ARM920T
config TARGET_SMDK2410
bool "Support smdk2410"
select CPU_ARM920T
config TARGET_INTEGRATORAP_CM926EJS
bool "Support integratorap_cm926ejs"
select CPU_ARM926EJS
config TARGET_INTEGRATORCP_CM926EJS
bool "Support integratorcp_cm926ejs"
select CPU_ARM926EJS
config TARGET_ASPENITE
bool "Support aspenite"
select CPU_ARM926EJS
config TARGET_GPLUGD
bool "Support gplugd"
select CPU_ARM926EJS
config TARGET_AFEB9260
bool "Support afeb9260"
select CPU_ARM926EJS
config TARGET_AT91SAM9260EK
bool "Support at91sam9260ek"
select CPU_ARM926EJS
config TARGET_AT91SAM9261EK
bool "Support at91sam9261ek"
select CPU_ARM926EJS
config TARGET_AT91SAM9263EK
bool "Support at91sam9263ek"
select CPU_ARM926EJS
config TARGET_AT91SAM9M10G45EK
bool "Support at91sam9m10g45ek"
select CPU_ARM926EJS
config TARGET_AT91SAM9N12EK
bool "Support at91sam9n12ek"
select CPU_ARM926EJS
config TARGET_AT91SAM9RLEK
bool "Support at91sam9rlek"
select CPU_ARM926EJS
config TARGET_AT91SAM9X5EK
bool "Support at91sam9x5ek"
select CPU_ARM926EJS
config TARGET_SNAPPER9260
bool "Support snapper9260"
select CPU_ARM926EJS
config TARGET_VL_MA2SC
bool "Support vl_ma2sc"
select CPU_ARM926EJS
config TARGET_SBC35_A9G20
bool "Support sbc35_a9g20"
select CPU_ARM926EJS
config TARGET_TNY_A9260
bool "Support tny_a9260"
select CPU_ARM926EJS
config TARGET_USB_A9263
bool "Support usb_a9263"
select CPU_ARM926EJS
config TARGET_ETHERNUT5
bool "Support ethernut5"
select CPU_ARM926EJS
config TARGET_MEESC
bool "Support meesc"
select CPU_ARM926EJS
config TARGET_OTC570
bool "Support otc570"
select CPU_ARM926EJS
config TARGET_CPU9260
bool "Support cpu9260"
select CPU_ARM926EJS
config TARGET_PM9261
bool "Support pm9261"
select CPU_ARM926EJS
config TARGET_PM9263
bool "Support pm9263"
select CPU_ARM926EJS
config TARGET_PM9G45
bool "Support pm9g45"
select CPU_ARM926EJS
config TARGET_CORVUS
select SUPPORT_SPL
bool "Support corvus"
select CPU_ARM926EJS
config TARGET_TAURUS
select SUPPORT_SPL
bool "Support taurus"
select CPU_ARM926EJS
config TARGET_STAMP9G20
bool "Support stamp9g20"
select CPU_ARM926EJS
config ARCH_DAVINCI
bool "TI DaVinci"
select CPU_ARM926EJS
help
Support for TI's DaVinci platform.
config KIRKWOOD
bool "Marvell Kirkwood"
select CPU_ARM926EJS
config TARGET_DB_MV784MP_GP
bool "Support db-mv784mp-gp"
select CPU_V7
config TARGET_MAXBCM
bool "Support maxbcm"
select CPU_V7
config TARGET_DEVKIT3250
bool "Support devkit3250"
select CPU_ARM926EJS
config TARGET_JADECPU
bool "Support jadecpu"
select CPU_ARM926EJS
config TARGET_MX25PDK
bool "Support mx25pdk"
select CPU_ARM926EJS
config TARGET_TX25
bool "Support tx25"
select CPU_ARM926EJS
select SUPPORT_SPL
config TARGET_ZMX25
bool "Support zmx25"
select CPU_ARM926EJS
config TARGET_APF27
bool "Support apf27"
select CPU_ARM926EJS
select SUPPORT_SPL
config TARGET_IMX27LITE
bool "Support imx27lite"
select CPU_ARM926EJS
config TARGET_MAGNESIUM
bool "Support magnesium"
select CPU_ARM926EJS
config TARGET_APX4DEVKIT
bool "Support apx4devkit"
select CPU_ARM926EJS
select SUPPORT_SPL
config TARGET_XFI3
bool "Support xfi3"
select CPU_ARM926EJS
select SUPPORT_SPL
config TARGET_M28EVK
bool "Support m28evk"
select CPU_ARM926EJS
select SUPPORT_SPL
config TARGET_MX23EVK
bool "Support mx23evk"
select CPU_ARM926EJS
select SUPPORT_SPL
config TARGET_MX28EVK
bool "Support mx28evk"
select CPU_ARM926EJS
select SUPPORT_SPL
config TARGET_MX23_OLINUXINO
bool "Support mx23_olinuxino"
select CPU_ARM926EJS
select SUPPORT_SPL
config TARGET_BG0900
bool "Support bg0900"
select CPU_ARM926EJS
select SUPPORT_SPL
config TARGET_SANSA_FUZE_PLUS
bool "Support sansa_fuze_plus"
select CPU_ARM926EJS
select SUPPORT_SPL
config TARGET_SC_SPS_1
bool "Support sc_sps_1"
select CPU_ARM926EJS
select SUPPORT_SPL
config ARCH_NOMADIK
bool "ST-Ericsson Nomadik"
select CPU_ARM926EJS
config ORION5X
bool "Marvell Orion"
select CPU_ARM926EJS
config TARGET_DKB
bool "Support dkb"
select CPU_ARM926EJS
config TARGET_SPEAR300
bool "Support spear300"
select CPU_ARM926EJS
config TARGET_SPEAR310
bool "Support spear310"
select CPU_ARM926EJS
config TARGET_SPEAR320
bool "Support spear320"
select CPU_ARM926EJS
config TARGET_SPEAR600
bool "Support spear600"
select CPU_ARM926EJS
config TARGET_STV0991
bool "Support stv0991"
select CPU_V7
config TARGET_X600
bool "Support x600"
select CPU_ARM926EJS
select SUPPORT_SPL
config ARCH_VERSATILE
bool "ARM Ltd. Versatile family"
select CPU_ARM926EJS
config TARGET_INTEGRATORCP_CM1136
bool "Support integratorcp_cm1136"
select CPU_ARM1136
config TARGET_IMX31_PHYCORE
bool "Support imx31_phycore"
select CPU_ARM1136
config TARGET_QONG
bool "Support qong"
select CPU_ARM1136
config TARGET_MX31ADS
bool "Support mx31ads"
select CPU_ARM1136
config TARGET_MX31PDK
bool "Support mx31pdk"
select CPU_ARM1136
select SUPPORT_SPL
config TARGET_TT01
bool "Support tt01"
select CPU_ARM1136
config TARGET_IMX31_LITEKIT
bool "Support imx31_litekit"
select CPU_ARM1136
config TARGET_WOODBURN
bool "Support woodburn"
select CPU_ARM1136
config TARGET_WOODBURN_SD
bool "Support woodburn_sd"
select CPU_ARM1136
select SUPPORT_SPL
config TARGET_FLEA3
bool "Support flea3"
select CPU_ARM1136
config TARGET_MX35PDK
bool "Support mx35pdk"
select CPU_ARM1136
config TARGET_RPI
bool "Support rpi"
select CPU_ARM1176
config TARGET_TNETV107X_EVM
bool "Support tnetv107x_evm"
select CPU_ARM1176
config TARGET_INTEGRATORAP_CM946ES
bool "Support integratorap_cm946es"
select CPU_ARM946ES
config TARGET_INTEGRATORCP_CM946ES
bool "Support integratorcp_cm946es"
select CPU_ARM946ES
config TARGET_VEXPRESS_CA15_TC2
bool "Support vexpress_ca15_tc2"
select CPU_V7
select CPU_V7_HAS_NONSEC
select CPU_V7_HAS_VIRT
config TARGET_VEXPRESS_CA5X2
bool "Support vexpress_ca5x2"
select CPU_V7
config TARGET_VEXPRESS_CA9X4
bool "Support vexpress_ca9x4"
select CPU_V7
config TARGET_KWB
bool "Support kwb"
select CPU_V7
select SUPPORT_SPL
config TARGET_TSERIES
bool "Support tseries"
select CPU_V7
select SUPPORT_SPL
config TARGET_CM_T335
bool "Support cm_t335"
select CPU_V7
select SUPPORT_SPL
config TARGET_PEPPER
bool "Support pepper"
select CPU_V7
select SUPPORT_SPL
config TARGET_AM335X_IGEP0033
bool "Support am335x_igep0033"
select CPU_V7
select SUPPORT_SPL
config TARGET_PCM051
bool "Support pcm051"
select CPU_V7
select SUPPORT_SPL
config TARGET_DRACO
bool "Support draco"
select CPU_V7
select SUPPORT_SPL
config TARGET_DXR2
bool "Support dxr2"
select CPU_V7
select SUPPORT_SPL
config TARGET_PXM2
bool "Support pxm2"
select CPU_V7
select SUPPORT_SPL
config TARGET_RUT
bool "Support rut"
select CPU_V7
select SUPPORT_SPL
config TARGET_PENGWYN
bool "Support pengwyn"
select CPU_V7
select SUPPORT_SPL
config TARGET_AM335X_EVM
bool "Support am335x_evm"
select CPU_V7
select SUPPORT_SPL
config TARGET_AM43XX_EVM
bool "Support am43xx_evm"
select CPU_V7
select SUPPORT_SPL
config TARGET_TI814X_EVM
bool "Support ti814x_evm"
select CPU_V7
select SUPPORT_SPL
config TARGET_TI816X_EVM
bool "Support ti816x_evm"
select CPU_V7
select SUPPORT_SPL
config TARGET_SAMA5D3_XPLAINED
bool "Support sama5d3_xplained"
select CPU_V7
select SUPPORT_SPL
config TARGET_SAMA5D3XEK
bool "Support sama5d3xek"
select CPU_V7
select SUPPORT_SPL
config TARGET_SAMA5D4_XPLAINED
bool "Support sama5d4_xplained"
select CPU_V7
config TARGET_SAMA5D4EK
bool "Support sama5d4ek"
select CPU_V7
config TARGET_BCM28155_AP
bool "Support bcm28155_ap"
select CPU_V7
config TARGET_BCMCYGNUS
bool "Support bcmcygnus"
select CPU_V7
config TARGET_BCMNSP
bool "Support bcmnsp"
select CPU_V7
config ARCH_EXYNOS
bool "Samsung EXYNOS"
select CPU_V7
config ARCH_S5PC1XX
bool "Samsung S5PC1XX"
select CPU_V7
config ARCH_HIGHBANK
bool "Calxeda Highbank"
select CPU_V7
config ARCH_KEYSTONE
bool "TI Keystone"
select CPU_V7
select SUPPORT_SPL
config TARGET_M53EVK
bool "Support m53evk"
select CPU_V7
select SUPPORT_SPL
config TARGET_IMA3_MX53
bool "Support ima3-mx53"
select CPU_V7
config TARGET_MX51EVK
bool "Support mx51evk"
select CPU_V7
config TARGET_MX53ARD
bool "Support mx53ard"
select CPU_V7
config TARGET_MX53EVK
bool "Support mx53evk"
select CPU_V7
config TARGET_MX53LOCO
bool "Support mx53loco"
select CPU_V7
config TARGET_MX53SMD
bool "Support mx53smd"
select CPU_V7
config TARGET_MX51_EFIKAMX
bool "Support mx51_efikamx"
select CPU_V7
config TARGET_VISION2
bool "Support vision2"
select CPU_V7
config TARGET_UDOO
bool "Support udoo"
select CPU_V7
config TARGET_WANDBOARD
bool "Support wandboard"
select CPU_V7
config TARGET_TITANIUM
bool "Support titanium"
select CPU_V7
config TARGET_NITROGEN6X
bool "Support nitrogen6x"
select CPU_V7
config TARGET_CGTQMX6EVAL
bool "Support cgtqmx6eval"
select CPU_V7
config TARGET_EMBESTMX6BOARDS
bool "Support embestmx6boards"
select CPU_V7
config TARGET_ARISTAINETOS
bool "Support aristainetos"
select CPU_V7
config TARGET_MX6QARM2
bool "Support mx6qarm2"
select CPU_V7
config TARGET_MX6QSABREAUTO
bool "Support mx6qsabreauto"
select CPU_V7
config TARGET_MX6SABRESD
bool "Support mx6sabresd"
select CPU_V7
select SUPPORT_SPL
config TARGET_MX6SLEVK
bool "Support mx6slevk"
select CPU_V7
config TARGET_MX6SXSABRESD
bool "Support mx6sxsabresd"
select CPU_V7
config TARGET_GW_VENTANA
bool "Support gw_ventana"
select CPU_V7
select SUPPORT_SPL
config TARGET_HUMMINGBOARD
bool "Support hummingboard"
select CPU_V7
config TARGET_KOSAGI_NOVENA
bool "Support Kosagi Novena"
select CPU_V7
select SUPPORT_SPL
config TARGET_TBS2910
bool "Support tbs2910"
select CPU_V7
config TARGET_TQMA6
bool "TQ Systems TQMa6 board"
select CPU_V7
config TARGET_OT1200
bool "Bachmann OT1200"
select CPU_V7
config OMAP34XX
bool "OMAP34XX SoC"
select CPU_V7
config OMAP44XX
bool "OMAP44XX SoC"
select CPU_V7
select SUPPORT_SPL
config OMAP54XX
bool "OMAP54XX SoC"
select CPU_V7
select SUPPORT_SPL
config RMOBILE
bool "Renesas ARM SoCs"
select CPU_V7
config TARGET_CM_FX6
bool "Support cm_fx6"
select CPU_V7
select SUPPORT_SPL
config TARGET_SOCFPGA_CYCLONE5
bool "Support socfpga_cyclone5"
select CPU_V7
select SUPPORT_SPL
config ARCH_SUNXI
bool "Support sunxi (Allwinner) SoCs"
config TARGET_SNOWBALL
bool "Support snowball"
select CPU_V7
config TARGET_U8500_HREF
bool "Support u8500_href"
select CPU_V7
config TARGET_VF610TWR
bool "Support vf610twr"
select CPU_V7
config ZYNQ
bool "Xilinx Zynq Platform"
select CPU_V7
select SUPPORT_SPL
config TEGRA
bool "NVIDIA Tegra"
select SUPPORT_SPL
select SPL
select OF_CONTROL if !SPL_BUILD
select CPU_ARM720T if SPL_BUILD
select CPU_V7 if !SPL_BUILD
config TARGET_VEXPRESS_AEMV8A
bool "Support vexpress_aemv8a"
select ARM64
config TARGET_LS2085A_EMU
bool "Support ls2085a_emu"
select ARM64
config TARGET_LS2085A_SIMU
bool "Support ls2085a_simu"
select ARM64
config TARGET_LS1021AQDS
bool "Support ls1021aqds"
select CPU_V7
select SUPPORT_SPL
config TARGET_LS1021ATWR
bool "Support ls1021atwr"
select CPU_V7
select SUPPORT_SPL
config TARGET_BALLOON3
bool "Support balloon3"
select CPU_PXA
config TARGET_H2200
bool "Support h2200"
select CPU_PXA
config TARGET_PALMLD
bool "Support palmld"
select CPU_PXA
config TARGET_PALMTC
bool "Support palmtc"
select CPU_PXA
config TARGET_PALMTREO680
bool "Support palmtreo680"
select CPU_PXA
select SUPPORT_SPL
config TARGET_PXA255_IDP
bool "Support pxa255_idp"
select CPU_PXA
config TARGET_TRIZEPSIV
bool "Support trizepsiv"
select CPU_PXA
config TARGET_VPAC270
bool "Support vpac270"
select CPU_PXA
select SUPPORT_SPL
config TARGET_XAENIAX
bool "Support xaeniax"
select CPU_PXA
config TARGET_ZIPITZ2
bool "Support zipitz2"
select CPU_PXA
config TARGET_LP8X4X
bool "Support lp8x4x"
select CPU_PXA
config TARGET_COLIBRI_PXA270
bool "Support colibri_pxa270"
select CPU_PXA
config TARGET_JORNADA
bool "Support jornada"
select CPU_SA1100
config ARCH_UNIPHIER
bool "Panasonic UniPhier platform"
select CPU_V7
select SUPPORT_SPL
select SPL
select OF_CONTROL if !SPL_BUILD
endchoice
source "arch/arm/cpu/arm926ejs/davinci/Kconfig"
source "arch/arm/cpu/armv7/exynos/Kconfig"
source "arch/arm/cpu/armv7/highbank/Kconfig"
source "arch/arm/cpu/armv7/keystone/Kconfig"
source "arch/arm/cpu/arm926ejs/kirkwood/Kconfig"
source "arch/arm/cpu/arm926ejs/nomadik/Kconfig"
source "arch/arm/cpu/armv7/omap3/Kconfig"
source "arch/arm/cpu/armv7/omap4/Kconfig"
source "arch/arm/cpu/armv7/omap5/Kconfig"
source "arch/arm/cpu/arm926ejs/orion5x/Kconfig"
source "arch/arm/cpu/armv7/rmobile/Kconfig"
source "arch/arm/cpu/armv7/s5pc1xx/Kconfig"
source "arch/arm/cpu/armv7/tegra-common/Kconfig"
source "arch/arm/cpu/armv7/uniphier/Kconfig"
source "arch/arm/cpu/arm926ejs/versatile/Kconfig"
source "arch/arm/cpu/armv7/zynq/Kconfig"
source "arch/arm/cpu/armv7/Kconfig"
source "board/aristainetos/Kconfig"
source "board/BuR/kwb/Kconfig"
source "board/BuR/tseries/Kconfig"
source "board/BuS/eb_cpux9k2/Kconfig"
source "board/BuS/vl_ma2sc/Kconfig"
source "board/CarMediaLab/flea3/Kconfig"
source "board/Marvell/aspenite/Kconfig"
source "board/Marvell/db-mv784mp-gp/Kconfig"
source "board/Marvell/dkb/Kconfig"
source "board/Marvell/gplugd/Kconfig"
source "board/afeb9260/Kconfig"
source "board/altera/socfpga/Kconfig"
source "board/armadeus/apf27/Kconfig"
source "board/armltd/integrator/Kconfig"
source "board/armltd/vexpress/Kconfig"
source "board/armltd/vexpress64/Kconfig"
source "board/atmel/at91rm9200ek/Kconfig"
source "board/atmel/at91sam9260ek/Kconfig"
source "board/atmel/at91sam9261ek/Kconfig"
source "board/atmel/at91sam9263ek/Kconfig"
source "board/atmel/at91sam9m10g45ek/Kconfig"
source "board/atmel/at91sam9n12ek/Kconfig"
source "board/atmel/at91sam9rlek/Kconfig"
source "board/atmel/at91sam9x5ek/Kconfig"
source "board/atmel/sama5d3_xplained/Kconfig"
source "board/atmel/sama5d3xek/Kconfig"
source "board/atmel/sama5d4_xplained/Kconfig"
source "board/atmel/sama5d4ek/Kconfig"
source "board/bachmann/ot1200/Kconfig"
source "board/balloon3/Kconfig"
source "board/barco/titanium/Kconfig"
source "board/bluegiga/apx4devkit/Kconfig"
source "board/bluewater/snapper9260/Kconfig"
source "board/boundary/nitrogen6x/Kconfig"
source "board/broadcom/bcm28155_ap/Kconfig"
source "board/broadcom/bcmcygnus/Kconfig"
source "board/broadcom/bcmnsp/Kconfig"
source "board/calao/sbc35_a9g20/Kconfig"
source "board/calao/tny_a9260/Kconfig"
source "board/calao/usb_a9263/Kconfig"
source "board/cirrus/edb93xx/Kconfig"
source "board/cm4008/Kconfig"
source "board/cm41xx/Kconfig"
source "board/compulab/cm_t335/Kconfig"
source "board/compulab/cm_fx6/Kconfig"
source "board/congatec/cgtqmx6eval/Kconfig"
source "board/creative/xfi3/Kconfig"
source "board/davedenx/qong/Kconfig"
source "board/denx/m28evk/Kconfig"
source "board/denx/m53evk/Kconfig"
source "board/egnite/ethernut5/Kconfig"
source "board/embest/mx6boards/Kconfig"
source "board/esd/meesc/Kconfig"
source "board/esd/otc570/Kconfig"
source "board/esg/ima3-mx53/Kconfig"
source "board/eukrea/cpu9260/Kconfig"
source "board/eukrea/cpuat91/Kconfig"
source "board/faraday/a320evb/Kconfig"
source "board/freescale/ls2085a/Kconfig"
source "board/freescale/ls1021aqds/Kconfig"
source "board/freescale/ls1021atwr/Kconfig"
source "board/freescale/mx23evk/Kconfig"
source "board/freescale/mx25pdk/Kconfig"
source "board/freescale/mx28evk/Kconfig"
source "board/freescale/mx31ads/Kconfig"
source "board/freescale/mx31pdk/Kconfig"
source "board/freescale/mx35pdk/Kconfig"
source "board/freescale/mx51evk/Kconfig"
source "board/freescale/mx53ard/Kconfig"
source "board/freescale/mx53evk/Kconfig"
source "board/freescale/mx53loco/Kconfig"
source "board/freescale/mx53smd/Kconfig"
source "board/freescale/mx6qarm2/Kconfig"
source "board/freescale/mx6qsabreauto/Kconfig"
source "board/freescale/mx6sabresd/Kconfig"
source "board/freescale/mx6slevk/Kconfig"
source "board/freescale/mx6sxsabresd/Kconfig"
source "board/freescale/vf610twr/Kconfig"
source "board/gateworks/gw_ventana/Kconfig"
source "board/genesi/mx51_efikamx/Kconfig"
source "board/gumstix/pepper/Kconfig"
source "board/h2200/Kconfig"
source "board/hale/tt01/Kconfig"
source "board/icpdas/lp8x4x/Kconfig"
source "board/imx31_phycore/Kconfig"
source "board/isee/igep0033/Kconfig"
source "board/jornada/Kconfig"
source "board/karo/tx25/Kconfig"
source "board/kosagi/novena/Kconfig"
source "board/logicpd/imx27lite/Kconfig"
source "board/logicpd/imx31_litekit/Kconfig"
source "board/maxbcm/Kconfig"
source "board/mpl/vcma9/Kconfig"
source "board/olimex/mx23_olinuxino/Kconfig"
source "board/palmld/Kconfig"
source "board/palmtc/Kconfig"
source "board/palmtreo680/Kconfig"
source "board/phytec/pcm051/Kconfig"
source "board/ppcag/bg0900/Kconfig"
source "board/pxa255_idp/Kconfig"
source "board/raspberrypi/rpi/Kconfig"
source "board/ronetix/pm9261/Kconfig"
source "board/ronetix/pm9263/Kconfig"
source "board/ronetix/pm9g45/Kconfig"
source "board/samsung/smdk2410/Kconfig"
source "board/sandisk/sansa_fuze_plus/Kconfig"
source "board/scb9328/Kconfig"
source "board/schulercontrol/sc_sps_1/Kconfig"
source "board/siemens/corvus/Kconfig"
source "board/siemens/draco/Kconfig"
source "board/siemens/pxm2/Kconfig"
source "board/siemens/rut/Kconfig"
source "board/siemens/taurus/Kconfig"
source "board/silica/pengwyn/Kconfig"
source "board/solidrun/hummingboard/Kconfig"
source "board/spear/spear300/Kconfig"
source "board/spear/spear310/Kconfig"
source "board/spear/spear320/Kconfig"
source "board/spear/spear600/Kconfig"
source "board/spear/x600/Kconfig"
source "board/st-ericsson/snowball/Kconfig"
source "board/st-ericsson/u8500/Kconfig"
source "board/st/stv0991/Kconfig"
source "board/sunxi/Kconfig"
source "board/syteco/jadecpu/Kconfig"
source "board/syteco/zmx25/Kconfig"
source "board/taskit/stamp9g20/Kconfig"
source "board/tbs/tbs2910/Kconfig"
source "board/ti/am335x/Kconfig"
source "board/ti/am43xx/Kconfig"
source "board/ti/ti814x/Kconfig"
source "board/ti/ti816x/Kconfig"
source "board/ti/tnetv107xevm/Kconfig"
source "board/timll/devkit3250/Kconfig"
source "board/toradex/colibri_pxa270/Kconfig"
source "board/tqc/tqma6/Kconfig"
source "board/trizepsiv/Kconfig"
source "board/ttcontrol/vision2/Kconfig"
source "board/udoo/Kconfig"
source "board/vpac270/Kconfig"
source "board/wandboard/Kconfig"
source "board/woodburn/Kconfig"
source "board/xaeniax/Kconfig"
source "board/zipitz2/Kconfig"
source "arch/arm/Kconfig.debug"
endmenu

View File

@@ -1,64 +0,0 @@
menu "ARM debug"
config DEBUG_LL
bool "Low-level debugging functions"
depends on !ARM64
help
Say Y here to include definitions of printascii, printch, printhex
in U-Boot. This is helpful if you are debugging code that
executes before the console is initialized.
choice
prompt "Low-level debugging port"
depends on DEBUG_LL
config DEBUG_LL_UART_8250
bool "Low-level debugging via 8250 UART"
help
Say Y here if you wish the debug print routes to direct
their output to an 8250 UART. You can use this option
to provide the parameters for the 8250 UART rather than
selecting one of the platform specific options above if
you know the parameters for the port.
This option is preferred over the platform specific
options; the platform specific options are deprecated
and will be soon removed.
endchoice
config DEBUG_LL_INCLUDE
string
depends on DEBUG_LL
default "debug/8250.S" if DEBUG_LL_UART_8250 || DEBUG_UART_8250
default "mach/debug-macro.S"
# Compatibility options for 8250
config DEBUG_UART_8250
bool
config DEBUG_UART_PHYS
hex "Physical base address of debug UART"
depends on DEBUG_LL_UART_8250 || DEBUG_UART_8250
# This is not used in U-Boot
config DEBUG_UART_VIRT
hex
default DEBUG_UART_PHYS
depends on DEBUG_LL_UART_8250 || DEBUG_UART_8250
config DEBUG_UART_8250_SHIFT
int "Register offset shift for the 8250 debug UART"
depends on DEBUG_LL_UART_8250 || DEBUG_UART_8250
default 2
config DEBUG_UART_8250_WORD
bool "Use 32-bit accesses for 8250 UART"
depends on DEBUG_LL_UART_8250 || DEBUG_UART_8250
depends on DEBUG_UART_8250_SHIFT >= 2
config DEBUG_UART_8250_FLOW_CONTROL
bool "Enable flow control for 8250 UART"
depends on DEBUG_LL_UART_8250 || DEBUG_UART_8250
endmenu

View File

@@ -1,29 +0,0 @@
#
# SPDX-License-Identifier: GPL-2.0+
#
head-y := arch/arm/cpu/$(CPU)/start.o
ifeq ($(CONFIG_SPL_BUILD),y)
ifneq ($(CONFIG_SPL_START_S_PATH),)
head-y := $(CONFIG_SPL_START_S_PATH:"%"=%)/start.o
endif
endif
libs-y += arch/arm/cpu/$(CPU)/
libs-y += arch/arm/cpu/
libs-y += arch/arm/lib/
ifeq ($(CONFIG_SPL_BUILD),y)
ifneq (,$(CONFIG_MX23)$(CONFIG_MX35)$(filter $(SOC), mx25 mx27 mx5 mx6 mx31 mx35))
libs-y += arch/arm/imx-common/
endif
else
ifneq (,$(filter $(SOC), mx25 mx27 mx5 mx6 mx31 mx35 mxs vf610))
libs-y += arch/arm/imx-common/
endif
endif
ifneq (,$(filter $(SOC), armada-xp kirkwood))
libs-y += arch/arm/mvebu-common/
endif

View File

@@ -1,137 +0,0 @@
#
# (C) Copyright 2000-2002
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# SPDX-License-Identifier: GPL-2.0+
#
ifndef CONFIG_STANDALONE_LOAD_ADDR
ifneq ($(CONFIG_OMAP_COMMON),)
CONFIG_STANDALONE_LOAD_ADDR = 0x80300000
else
CONFIG_STANDALONE_LOAD_ADDR = 0xc100000
endif
endif
LDFLAGS_FINAL += --gc-sections
PLATFORM_RELFLAGS += -ffunction-sections -fdata-sections \
-fno-common -ffixed-r9
PLATFORM_RELFLAGS += $(call cc-option, -msoft-float) \
$(call cc-option,-mshort-load-bytes,$(call cc-option,-malignment-traps,))
# Support generic board on ARM
__HAVE_ARCH_GENERIC_BOARD := y
PLATFORM_CPPFLAGS += -D__ARM__
# Choose between ARM/Thumb instruction sets
ifeq ($(CONFIG_SYS_THUMB_BUILD),y)
AFLAGS_IMPLICIT_IT := $(call as-option,-Wa$(comma)-mimplicit-it=always)
PF_CPPFLAGS_ARM := $(AFLAGS_IMPLICIT_IT) \
$(call cc-option, -mthumb -mthumb-interwork,\
$(call cc-option,-marm,)\
$(call cc-option,-mno-thumb-interwork,)\
)
else
PF_CPPFLAGS_ARM := $(call cc-option,-marm,) \
$(call cc-option,-mno-thumb-interwork,)
endif
# Only test once
ifneq ($(CONFIG_SPL_BUILD),y)
ifeq ($(CONFIG_SYS_THUMB_BUILD),y)
archprepare: checkthumb
checkthumb:
@if test "$(call cc-version)" -lt "0404"; then \
echo -n '*** Your GCC does not produce working '; \
echo 'binaries in THUMB mode.'; \
echo '*** Your board is configured for THUMB mode.'; \
false; \
fi
endif
endif
# Try if EABI is supported, else fall back to old API,
# i. e. for example:
# - with ELDK 4.2 (EABI supported), use:
# -mabi=aapcs-linux
# - with ELDK 4.1 (gcc 4.x, no EABI), use:
# -mabi=apcs-gnu
# - with ELDK 3.1 (gcc 3.x), use:
# -mapcs-32
PF_CPPFLAGS_ABI := $(call cc-option,\
-mabi=aapcs-linux,\
$(call cc-option,\
-mapcs-32,\
$(call cc-option,\
-mabi=apcs-gnu,\
)\
)\
)
PLATFORM_CPPFLAGS += $(PF_CPPFLAGS_ARM) $(PF_CPPFLAGS_ABI)
# For EABI, make sure to provide raise()
ifneq (,$(findstring -mabi=aapcs-linux,$(PLATFORM_CPPFLAGS)))
# This file is parsed many times, so the string may get added multiple
# times. Also, the prefix needs to be different based on whether
# CONFIG_SPL_BUILD is defined or not. 'filter-out' the existing entry
# before adding the correct one.
PLATFORM_LIBS := arch/arm/lib/eabi_compat.o \
$(filter-out arch/arm/lib/eabi_compat.o, $(PLATFORM_LIBS))
endif
# needed for relocation
LDFLAGS_u-boot += -pie
#
# FIXME: binutils versions < 2.22 have a bug in the assembler where
# branches to weak symbols can be incorrectly optimized in thumb mode
# to a short branch (b.n instruction) that won't reach when the symbol
# gets preempted
#
# http://sourceware.org/bugzilla/show_bug.cgi?id=12532
#
ifeq ($(CONFIG_SYS_THUMB_BUILD),y)
ifeq ($(GAS_BUG_12532),)
export GAS_BUG_12532:=$(shell if [ $(call binutils-version) -lt 0222 ] ; \
then echo y; else echo n; fi)
endif
ifeq ($(GAS_BUG_12532),y)
PLATFORM_RELFLAGS += -fno-optimize-sibling-calls
endif
endif
ifneq ($(CONFIG_SPL_BUILD),y)
# Check that only R_ARM_RELATIVE relocations are generated.
ALL-y += checkarmreloc
# The movt / movw can hardcode 16 bit parts of the addresses in the
# instruction. Relocation is not supported for that case, so disable
# such usage by requiring word relocations.
PLATFORM_CPPFLAGS += $(call cc-option, -mword-relocations)
endif
# limit ourselves to the sections we want in the .bin.
ifdef CONFIG_ARM64
OBJCOPYFLAGS += -j .text -j .rodata -j .data -j .u_boot_list -j .rela.dyn
else
OBJCOPYFLAGS += -j .text -j .secure_text -j .rodata -j .hash -j .data -j .got.plt -j .u_boot_list -j .rel.dyn
endif
ifdef CONFIG_OF_EMBED
OBJCOPYFLAGS += -j .dtb.init.rodata
endif
ifneq ($(CONFIG_IMX_CONFIG),)
ifdef CONFIG_SPL
ifndef CONFIG_SPL_BUILD
ALL-y += SPL
endif
else
ifeq ($(CONFIG_OF_SEPARATE),y)
ALL-y += u-boot-dtb.imx
else
ALL-y += u-boot.imx
endif
endif
endif

View File

@@ -1,6 +0,0 @@
obj-$(CONFIG_AT91FAMILY) += at91-common/
obj-$(CONFIG_TEGRA20) += tegra20-common/
obj-$(CONFIG_TEGRA30) += tegra30-common/
obj-$(CONFIG_TEGRA114) += tegra114-common/
obj-$(CONFIG_TEGRA124) += tegra124-common/
obj-$(CONFIG_TEGRA) += tegra-common/

View File

@@ -1,12 +0,0 @@
#
# (C) Copyright 2000-2006
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# SPDX-License-Identifier: GPL-2.0+
#
extra-y = start.o
obj-y = cpu.o
obj-$(CONFIG_MX31) += mx31/
obj-$(CONFIG_MX35) += mx35/

View File

@@ -1,9 +0,0 @@
#
# (C) Copyright 2002
# Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
#
# SPDX-License-Identifier: GPL-2.0+
#
# Make ARMv5 to allow more compilers to work, even though its v6.
PLATFORM_CPPFLAGS += -march=armv5

View File

@@ -1,160 +0,0 @@
/*
* (C) Copyright 2004 Texas Insturments
*
* (C) Copyright 2002
* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
* Marius Groeger <mgroeger@sysgo.de>
*
* (C) Copyright 2002
* Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
*
* SPDX-License-Identifier: GPL-2.0+
*/
/*
* CPU specific code
*/
#include <common.h>
#include <command.h>
#include <asm/system.h>
static void cache_flush(void);
int cleanup_before_linux (void)
{
/*
* this function is called just before we call linux
* it prepares the processor for linux
*
* we turn off caches etc ...
*/
disable_interrupts ();
#ifdef CONFIG_LCD
{
extern void lcd_disable(void);
extern void lcd_panel_disable(void);
lcd_disable(); /* proper disable of lcd & panel */
lcd_panel_disable();
}
#endif
/* turn off I/D-cache */
icache_disable();
dcache_disable();
/* flush I/D-cache */
cache_flush();
return 0;
}
static void cache_flush(void)
{
unsigned long i = 0;
/* clean entire data cache */
asm volatile("mcr p15, 0, %0, c7, c10, 0" : : "r" (i));
/* invalidate both caches and flush btb */
asm volatile("mcr p15, 0, %0, c7, c7, 0" : : "r" (i));
/* mem barrier to sync things */
asm volatile("mcr p15, 0, %0, c7, c10, 4" : : "r" (i));
}
#ifndef CONFIG_SYS_DCACHE_OFF
#ifndef CONFIG_SYS_CACHELINE_SIZE
#define CONFIG_SYS_CACHELINE_SIZE 32
#endif
void invalidate_dcache_all(void)
{
asm volatile("mcr p15, 0, %0, c7, c6, 0" : : "r" (0));
}
void flush_dcache_all(void)
{
asm volatile("mcr p15, 0, %0, c7, c10, 0" : : "r" (0));
asm volatile("mcr p15, 0, %0, c7, c10, 4" : : "r" (0));
}
static int check_cache_range(unsigned long start, unsigned long stop)
{
int ok = 1;
if (start & (CONFIG_SYS_CACHELINE_SIZE - 1))
ok = 0;
if (stop & (CONFIG_SYS_CACHELINE_SIZE - 1))
ok = 0;
if (!ok)
debug("CACHE: Misaligned operation at range [%08lx, %08lx]\n",
start, stop);
return ok;
}
void invalidate_dcache_range(unsigned long start, unsigned long stop)
{
if (!check_cache_range(start, stop))
return;
while (start < stop) {
asm volatile("mcr p15, 0, %0, c7, c6, 1" : : "r" (start));
start += CONFIG_SYS_CACHELINE_SIZE;
}
}
void flush_dcache_range(unsigned long start, unsigned long stop)
{
if (!check_cache_range(start, stop))
return;
while (start < stop) {
asm volatile("mcr p15, 0, %0, c7, c14, 1" : : "r" (start));
start += CONFIG_SYS_CACHELINE_SIZE;
}
asm volatile("mcr p15, 0, %0, c7, c10, 4" : : "r" (0));
}
void flush_cache(unsigned long start, unsigned long size)
{
flush_dcache_range(start, start + size);
}
#else /* #ifndef CONFIG_SYS_DCACHE_OFF */
void invalidate_dcache_all(void)
{
}
void flush_dcache_all(void)
{
}
void invalidate_dcache_range(unsigned long start, unsigned long stop)
{
}
void flush_dcache_range(unsigned long start, unsigned long stop)
{
}
void flush_cache(unsigned long start, unsigned long size)
{
}
#endif /* #ifndef CONFIG_SYS_DCACHE_OFF */
#if !defined(CONFIG_SYS_ICACHE_OFF) || !defined(CONFIG_SYS_DCACHE_OFF)
void enable_caches(void)
{
#ifndef CONFIG_SYS_ICACHE_OFF
icache_enable();
#endif
#ifndef CONFIG_SYS_DCACHE_OFF
dcache_enable();
#endif
}
#endif

View File

@@ -1,10 +0,0 @@
#
# (C) Copyright 2000-2006
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# SPDX-License-Identifier: GPL-2.0+
#
obj-y += generic.o
obj-y += timer.o
obj-y += devices.o

View File

@@ -1,51 +0,0 @@
/*
*
* (C) Copyright 2009 Magnus Lilja <lilja.magnus@gmail.com>
*
* (c) 2007 Pengutronix, Sascha Hauer <s.hauer@pengutronix.de>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <asm/arch/imx-regs.h>
#include <asm/arch/clock.h>
void mx31_uart1_hw_init(void)
{
/* setup pins for UART1 */
mx31_gpio_mux(MUX_RXD1__UART1_RXD_MUX);
mx31_gpio_mux(MUX_TXD1__UART1_TXD_MUX);
mx31_gpio_mux(MUX_RTS1__UART1_RTS_B);
mx31_gpio_mux(MUX_CTS1__UART1_CTS_B);
}
void mx31_uart2_hw_init(void)
{
/* setup pins for UART2 */
mx31_gpio_mux(MUX_RXD2__UART2_RXD_MUX);
mx31_gpio_mux(MUX_TXD2__UART2_TXD_MUX);
mx31_gpio_mux(MUX_RTS2__UART2_RTS_B);
mx31_gpio_mux(MUX_CTS2__UART2_CTS_B);
}
#ifdef CONFIG_MXC_SPI
/*
* Note: putting several spi setups here makes no sense as they may differ
* at board level (physical pin SS0 of CSPI2 may aswell be used as SS0 of CSPI3)
*/
void mx31_spi2_hw_init(void)
{
/* SPI2 */
mx31_gpio_mux(MUX_CSPI2_SS2__CSPI2_SS2_B);
mx31_gpio_mux(MUX_CSPI2_SCLK__CSPI2_CLK);
mx31_gpio_mux(MUX_CSPI2_SPI_RDY__CSPI2_DATAREADY_B);
mx31_gpio_mux(MUX_CSPI2_MOSI__CSPI2_MOSI);
mx31_gpio_mux(MUX_CSPI2_MISO__CSPI2_MISO);
mx31_gpio_mux(MUX_CSPI2_SS0__CSPI2_SS0_B);
mx31_gpio_mux(MUX_CSPI2_SS1__CSPI2_SS1_B);
/* start SPI2 clock */
__REG(CCM_CGR2) = __REG(CCM_CGR2) | (3 << 4);
}
#endif

View File

@@ -1,219 +0,0 @@
/*
* (C) Copyright 2007
* Sascha Hauer, Pengutronix
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <div64.h>
#include <asm/arch/imx-regs.h>
#include <asm/arch/clock.h>
#include <asm/io.h>
#include <asm/arch/sys_proto.h>
static u32 mx31_decode_pll(u32 reg, u32 infreq)
{
u32 mfi = GET_PLL_MFI(reg);
s32 mfn = GET_PLL_MFN(reg);
u32 mfd = GET_PLL_MFD(reg);
u32 pd = GET_PLL_PD(reg);
mfi = mfi <= 5 ? 5 : mfi;
mfn = mfn >= 512 ? mfn - 1024 : mfn;
mfd += 1;
pd += 1;
return lldiv(2 * (u64)infreq * (mfi * mfd + mfn),
mfd * pd);
}
static u32 mx31_get_mpl_dpdgck_clk(void)
{
u32 infreq;
if ((readl(CCM_CCMR) & CCMR_PRCS_MASK) == CCMR_FPM)
infreq = MXC_CLK32 * 1024;
else
infreq = MXC_HCLK;
return mx31_decode_pll(readl(CCM_MPCTL), infreq);
}
static u32 mx31_get_mcu_main_clk(void)
{
/* For now we assume mpl_dpdgck_clk == mcu_main_clk
* which should be correct for most boards
*/
return mx31_get_mpl_dpdgck_clk();
}
static u32 mx31_get_ipg_clk(void)
{
u32 freq = mx31_get_mcu_main_clk();
u32 pdr0 = readl(CCM_PDR0);
freq /= GET_PDR0_MAX_PODF(pdr0) + 1;
freq /= GET_PDR0_IPG_PODF(pdr0) + 1;
return freq;
}
/* hsp is the clock for the ipu */
static u32 mx31_get_hsp_clk(void)
{
u32 freq = mx31_get_mcu_main_clk();
u32 pdr0 = readl(CCM_PDR0);
freq /= GET_PDR0_HSP_PODF(pdr0) + 1;
return freq;
}
void mx31_dump_clocks(void)
{
u32 cpufreq = mx31_get_mcu_main_clk();
printf("mx31 cpu clock: %dMHz\n", cpufreq / 1000000);
printf("ipg clock : %dHz\n", mx31_get_ipg_clk());
printf("hsp clock : %dHz\n", mx31_get_hsp_clk());
}
unsigned int mxc_get_clock(enum mxc_clock clk)
{
switch (clk) {
case MXC_ARM_CLK:
return mx31_get_mcu_main_clk();
case MXC_IPG_CLK:
case MXC_IPG_PERCLK:
case MXC_CSPI_CLK:
case MXC_UART_CLK:
case MXC_ESDHC_CLK:
case MXC_I2C_CLK:
return mx31_get_ipg_clk();
case MXC_IPU_CLK:
return mx31_get_hsp_clk();
}
return -1;
}
u32 imx_get_uartclk(void)
{
return mxc_get_clock(MXC_UART_CLK);
}
void mx31_gpio_mux(unsigned long mode)
{
unsigned long reg, shift, tmp;
reg = IOMUXC_BASE + (mode & 0x1fc);
shift = (~mode & 0x3) * 8;
tmp = readl(reg);
tmp &= ~(0xff << shift);
tmp |= ((mode >> IOMUX_MODE_POS) & 0xff) << shift;
writel(tmp, reg);
}
void mx31_set_pad(enum iomux_pins pin, u32 config)
{
u32 field, l, reg;
pin &= IOMUX_PADNUM_MASK;
reg = (IOMUXC_BASE + 0x154) + (pin + 2) / 3 * 4;
field = (pin + 2) % 3;
l = readl(reg);
l &= ~(0x1ff << (field * 10));
l |= config << (field * 10);
writel(l, reg);
}
void mx31_set_gpr(enum iomux_gp_func gp, char en)
{
u32 l;
struct iomuxc_regs *iomuxc = (struct iomuxc_regs *)IOMUXC_BASE;
l = readl(&iomuxc->gpr);
if (en)
l |= gp;
else
l &= ~gp;
writel(l, &iomuxc->gpr);
}
void mxc_setup_weimcs(int cs, const struct mxc_weimcs *weimcs)
{
struct mx31_weim *weim = (struct mx31_weim *) WEIM_BASE;
struct mx31_weim_cscr *cscr = &weim->cscr[cs];
writel(weimcs->upper, &cscr->upper);
writel(weimcs->lower, &cscr->lower);
writel(weimcs->additional, &cscr->additional);
}
struct mx3_cpu_type mx31_cpu_type[] = {
{ .srev = 0x00, .v = 0x10 },
{ .srev = 0x10, .v = 0x11 },
{ .srev = 0x11, .v = 0x11 },
{ .srev = 0x12, .v = 0x1F },
{ .srev = 0x13, .v = 0x1F },
{ .srev = 0x14, .v = 0x12 },
{ .srev = 0x15, .v = 0x12 },
{ .srev = 0x28, .v = 0x20 },
{ .srev = 0x29, .v = 0x20 },
};
u32 get_cpu_rev(void)
{
u32 i, srev;
/* read SREV register from IIM module */
struct iim_regs *iim = (struct iim_regs *)MX31_IIM_BASE_ADDR;
srev = readl(&iim->iim_srev);
for (i = 0; i < ARRAY_SIZE(mx31_cpu_type); i++)
if (srev == mx31_cpu_type[i].srev)
return mx31_cpu_type[i].v;
return srev | 0x8000;
}
static char *get_reset_cause(void)
{
/* read RCSR register from CCM module */
struct clock_control_regs *ccm =
(struct clock_control_regs *)CCM_BASE;
u32 cause = readl(&ccm->rcsr) & 0x07;
switch (cause) {
case 0x0000:
return "POR";
case 0x0001:
return "RST";
case 0x0002:
return "WDOG";
case 0x0006:
return "JTAG";
case 0x0007:
return "ARM11P power gating";
default:
return "unknown reset";
}
}
#if defined(CONFIG_DISPLAY_CPUINFO)
int print_cpuinfo(void)
{
u32 srev = get_cpu_rev();
printf("CPU: Freescale i.MX31 rev %d.%d%s at %d MHz.\n",
(srev & 0xF0) >> 4, (srev & 0x0F),
((srev & 0x8000) ? " unknown" : ""),
mx31_get_mcu_main_clk() / 1000000);
printf("Reset cause: %s\n", get_reset_cause());
return 0;
}
#endif

View File

@@ -1,47 +0,0 @@
/*
* (C) Copyright 2007
* Sascha Hauer, Pengutronix
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <asm/arch/imx-regs.h>
#include <asm/io.h>
#define TIMER_BASE 0x53f90000 /* General purpose timer 1 */
/* General purpose timers registers */
#define GPTCR __REG(TIMER_BASE) /* Control register */
#define GPTPR __REG(TIMER_BASE + 0x4) /* Prescaler register */
#define GPTSR __REG(TIMER_BASE + 0x8) /* Status register */
#define GPTCNT __REG(TIMER_BASE + 0x24) /* Counter register */
/* General purpose timers bitfields */
#define GPTCR_SWR (1 << 15) /* Software reset */
#define GPTCR_FRR (1 << 9) /* Freerun / restart */
#define GPTCR_CLKSOURCE_32 (4 << 6) /* Clock source */
#define GPTCR_TEN 1 /* Timer enable */
DECLARE_GLOBAL_DATA_PTR;
/* The 32768Hz 32-bit timer overruns in 131072 seconds */
int timer_init(void)
{
int i;
/* setup GP Timer 1 */
GPTCR = GPTCR_SWR;
for (i = 0; i < 100; i++)
GPTCR = 0; /* We have no udelay by now */
GPTPR = 0; /* 32Khz */
/* Freerun Mode, PERCLK1 input */
GPTCR |= GPTCR_CLKSOURCE_32 | GPTCR_TEN;
return 0;
}
unsigned long timer_read_counter(void)
{
return GPTCNT;
}

View File

@@ -1,12 +0,0 @@
#
# (C) Copyright 2000-2006
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# (C) Copyright 2008-2009 Freescale Semiconductor, Inc.
#
# SPDX-License-Identifier: GPL-2.0+
#
obj-y += generic.o
obj-y += timer.o
obj-y += mx35_sdram.o

View File

@@ -1,547 +0,0 @@
/*
* (C) Copyright 2007
* Sascha Hauer, Pengutronix
*
* (C) Copyright 2008-2010 Freescale Semiconductor, Inc.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <div64.h>
#include <asm/io.h>
#include <asm/errno.h>
#include <asm/arch/imx-regs.h>
#include <asm/arch/crm_regs.h>
#include <asm/arch/clock.h>
#include <asm/arch/sys_proto.h>
#ifdef CONFIG_FSL_ESDHC
#include <fsl_esdhc.h>
#endif
#include <netdev.h>
#include <spl.h>
#define CLK_CODE(arm, ahb, sel) (((arm) << 16) + ((ahb) << 8) + (sel))
#define CLK_CODE_ARM(c) (((c) >> 16) & 0xFF)
#define CLK_CODE_AHB(c) (((c) >> 8) & 0xFF)
#define CLK_CODE_PATH(c) ((c) & 0xFF)
#define CCM_GET_DIVIDER(x, m, o) (((x) & (m)) >> (o))
#ifdef CONFIG_FSL_ESDHC
DECLARE_GLOBAL_DATA_PTR;
#endif
static int g_clk_mux_auto[8] = {
CLK_CODE(1, 3, 0), CLK_CODE(1, 2, 1), CLK_CODE(2, 1, 1), -1,
CLK_CODE(1, 6, 0), CLK_CODE(1, 4, 1), CLK_CODE(2, 2, 1), -1,
};
static int g_clk_mux_consumer[16] = {
CLK_CODE(1, 4, 0), CLK_CODE(1, 3, 1), CLK_CODE(1, 3, 1), -1,
-1, -1, CLK_CODE(4, 1, 0), CLK_CODE(1, 5, 0),
CLK_CODE(1, 8, 1), CLK_CODE(1, 6, 1), CLK_CODE(2, 4, 0), -1,
-1, -1, CLK_CODE(4, 2, 0), -1,
};
static int hsp_div_table[3][16] = {
{4, 3, 2, -1, -1, -1, 1, 5, 4, 3, 2, -1, -1, -1, 1, -1},
{-1, -1, -1, -1, -1, -1, -1, -1, 8, 6, 4, -1, -1, -1, 2, -1},
{3, -1, -1, -1, -1, -1, -1, -1, 3, -1, -1, -1, -1, -1, -1, -1},
};
u32 get_cpu_rev(void)
{
int reg;
struct iim_regs *iim =
(struct iim_regs *)IIM_BASE_ADDR;
reg = readl(&iim->iim_srev);
if (!reg) {
reg = readw(ROMPATCH_REV);
reg <<= 4;
} else {
reg += CHIP_REV_1_0;
}
return 0x35000 + (reg & 0xFF);
}
static u32 get_arm_div(u32 pdr0, u32 *fi, u32 *fd)
{
int *pclk_mux;
if (pdr0 & MXC_CCM_PDR0_AUTO_CON) {
pclk_mux = g_clk_mux_consumer +
((pdr0 & MXC_CCM_PDR0_CON_MUX_DIV_MASK) >>
MXC_CCM_PDR0_CON_MUX_DIV_OFFSET);
} else {
pclk_mux = g_clk_mux_auto +
((pdr0 & MXC_CCM_PDR0_AUTO_MUX_DIV_MASK) >>
MXC_CCM_PDR0_AUTO_MUX_DIV_OFFSET);
}
if ((*pclk_mux) == -1)
return -1;
if (fi && fd) {
if (!CLK_CODE_PATH(*pclk_mux)) {
*fi = *fd = 1;
return CLK_CODE_ARM(*pclk_mux);
}
if (pdr0 & MXC_CCM_PDR0_AUTO_CON) {
*fi = 3;
*fd = 4;
} else {
*fi = 2;
*fd = 3;
}
}
return CLK_CODE_ARM(*pclk_mux);
}
static int get_ahb_div(u32 pdr0)
{
int *pclk_mux;
pclk_mux = g_clk_mux_consumer +
((pdr0 & MXC_CCM_PDR0_CON_MUX_DIV_MASK) >>
MXC_CCM_PDR0_CON_MUX_DIV_OFFSET);
if ((*pclk_mux) == -1)
return -1;
return CLK_CODE_AHB(*pclk_mux);
}
static u32 decode_pll(u32 reg, u32 infreq)
{
u32 mfi = (reg >> 10) & 0xf;
s32 mfn = reg & 0x3ff;
u32 mfd = (reg >> 16) & 0x3ff;
u32 pd = (reg >> 26) & 0xf;
mfi = mfi <= 5 ? 5 : mfi;
mfn = mfn >= 512 ? mfn - 1024 : mfn;
mfd += 1;
pd += 1;
return lldiv(2 * (u64)infreq * (mfi * mfd + mfn),
mfd * pd);
}
static u32 get_mcu_main_clk(void)
{
u32 arm_div = 0, fi = 0, fd = 0;
struct ccm_regs *ccm =
(struct ccm_regs *)IMX_CCM_BASE;
arm_div = get_arm_div(readl(&ccm->pdr0), &fi, &fd);
fi *= decode_pll(readl(&ccm->mpctl), MXC_HCLK);
return fi / (arm_div * fd);
}
static u32 get_ipg_clk(void)
{
u32 freq = get_mcu_main_clk();
struct ccm_regs *ccm =
(struct ccm_regs *)IMX_CCM_BASE;
u32 pdr0 = readl(&ccm->pdr0);
return freq / (get_ahb_div(pdr0) * 2);
}
static u32 get_ipg_per_clk(void)
{
u32 freq = get_mcu_main_clk();
struct ccm_regs *ccm =
(struct ccm_regs *)IMX_CCM_BASE;
u32 pdr0 = readl(&ccm->pdr0);
u32 pdr4 = readl(&ccm->pdr4);
u32 div;
if (pdr0 & MXC_CCM_PDR0_PER_SEL) {
div = CCM_GET_DIVIDER(pdr4,
MXC_CCM_PDR4_PER0_PODF_MASK,
MXC_CCM_PDR4_PER0_PODF_OFFSET) + 1;
} else {
div = CCM_GET_DIVIDER(pdr0,
MXC_CCM_PDR0_PER_PODF_MASK,
MXC_CCM_PDR0_PER_PODF_OFFSET) + 1;
div *= get_ahb_div(pdr0);
}
return freq / div;
}
u32 imx_get_uartclk(void)
{
u32 freq;
struct ccm_regs *ccm =
(struct ccm_regs *)IMX_CCM_BASE;
u32 pdr4 = readl(&ccm->pdr4);
if (readl(&ccm->pdr3) & MXC_CCM_PDR3_UART_M_U)
freq = get_mcu_main_clk();
else
freq = decode_pll(readl(&ccm->ppctl), MXC_HCLK);
freq /= CCM_GET_DIVIDER(pdr4,
MXC_CCM_PDR4_UART_PODF_MASK,
MXC_CCM_PDR4_UART_PODF_OFFSET) + 1;
return freq;
}
unsigned int mxc_get_main_clock(enum mxc_main_clock clk)
{
u32 nfc_pdf, hsp_podf;
u32 pll, ret_val = 0, usb_podf;
struct ccm_regs *ccm =
(struct ccm_regs *)IMX_CCM_BASE;
u32 reg = readl(&ccm->pdr0);
u32 reg4 = readl(&ccm->pdr4);
reg |= 0x1;
switch (clk) {
case CPU_CLK:
ret_val = get_mcu_main_clk();
break;
case AHB_CLK:
ret_val = get_mcu_main_clk();
break;
case HSP_CLK:
if (reg & CLKMODE_CONSUMER) {
hsp_podf = (reg >> 20) & 0x3;
pll = get_mcu_main_clk();
hsp_podf = hsp_div_table[hsp_podf][(reg>>16)&0xF];
if (hsp_podf > 0) {
ret_val = pll / hsp_podf;
} else {
puts("mismatch HSP with ARM clock setting\n");
ret_val = 0;
}
} else {
ret_val = get_mcu_main_clk();
}
break;
case IPG_CLK:
ret_val = get_ipg_clk();
break;
case IPG_PER_CLK:
ret_val = get_ipg_per_clk();
break;
case NFC_CLK:
nfc_pdf = (reg4 >> 28) & 0xF;
pll = get_mcu_main_clk();
/* AHB/nfc_pdf */
ret_val = pll / (nfc_pdf + 1);
break;
case USB_CLK:
usb_podf = (reg4 >> 22) & 0x3F;
if (reg4 & 0x200)
pll = get_mcu_main_clk();
else
pll = decode_pll(readl(&ccm->ppctl), MXC_HCLK);
ret_val = pll / (usb_podf + 1);
break;
default:
printf("Unknown clock: %d\n", clk);
break;
}
return ret_val;
}
unsigned int mxc_get_peri_clock(enum mxc_peri_clock clk)
{
u32 ret_val = 0, pdf, pre_pdf, clk_sel;
struct ccm_regs *ccm =
(struct ccm_regs *)IMX_CCM_BASE;
u32 mpdr2 = readl(&ccm->pdr2);
u32 mpdr3 = readl(&ccm->pdr3);
u32 mpdr4 = readl(&ccm->pdr4);
switch (clk) {
case UART1_BAUD:
case UART2_BAUD:
case UART3_BAUD:
clk_sel = mpdr3 & (1 << 14);
pdf = (mpdr4 >> 10) & 0x3F;
ret_val = ((clk_sel != 0) ? mxc_get_main_clock(CPU_CLK) :
decode_pll(readl(&ccm->ppctl), MXC_HCLK)) / (pdf + 1);
break;
case SSI1_BAUD:
pre_pdf = (mpdr2 >> 24) & 0x7;
pdf = mpdr2 & 0x3F;
clk_sel = mpdr2 & (1 << 6);
ret_val = ((clk_sel != 0) ? mxc_get_main_clock(CPU_CLK) :
decode_pll(readl(&ccm->ppctl), MXC_HCLK)) /
((pre_pdf + 1) * (pdf + 1));
break;
case SSI2_BAUD:
pre_pdf = (mpdr2 >> 27) & 0x7;
pdf = (mpdr2 >> 8) & 0x3F;
clk_sel = mpdr2 & (1 << 6);
ret_val = ((clk_sel != 0) ? mxc_get_main_clock(CPU_CLK) :
decode_pll(readl(&ccm->ppctl), MXC_HCLK)) /
((pre_pdf + 1) * (pdf + 1));
break;
case CSI_BAUD:
clk_sel = mpdr2 & (1 << 7);
pdf = (mpdr2 >> 16) & 0x3F;
ret_val = ((clk_sel != 0) ? mxc_get_main_clock(CPU_CLK) :
decode_pll(readl(&ccm->ppctl), MXC_HCLK)) / (pdf + 1);
break;
case MSHC_CLK:
pre_pdf = readl(&ccm->pdr1);
clk_sel = (pre_pdf & 0x80);
pdf = (pre_pdf >> 22) & 0x3F;
pre_pdf = (pre_pdf >> 28) & 0x7;
ret_val = ((clk_sel != 0) ? mxc_get_main_clock(CPU_CLK) :
decode_pll(readl(&ccm->ppctl), MXC_HCLK)) /
((pre_pdf + 1) * (pdf + 1));
break;
case ESDHC1_CLK:
clk_sel = mpdr3 & 0x40;
pdf = mpdr3 & 0x3F;
ret_val = ((clk_sel != 0) ? mxc_get_main_clock(CPU_CLK) :
decode_pll(readl(&ccm->ppctl), MXC_HCLK)) / (pdf + 1);
break;
case ESDHC2_CLK:
clk_sel = mpdr3 & 0x40;
pdf = (mpdr3 >> 8) & 0x3F;
ret_val = ((clk_sel != 0) ? mxc_get_main_clock(CPU_CLK) :
decode_pll(readl(&ccm->ppctl), MXC_HCLK)) / (pdf + 1);
break;
case ESDHC3_CLK:
clk_sel = mpdr3 & 0x40;
pdf = (mpdr3 >> 16) & 0x3F;
ret_val = ((clk_sel != 0) ? mxc_get_main_clock(CPU_CLK) :
decode_pll(readl(&ccm->ppctl), MXC_HCLK)) / (pdf + 1);
break;
case SPDIF_CLK:
clk_sel = mpdr3 & 0x400000;
pre_pdf = (mpdr3 >> 29) & 0x7;
pdf = (mpdr3 >> 23) & 0x3F;
ret_val = ((clk_sel != 0) ? mxc_get_main_clock(CPU_CLK) :
decode_pll(readl(&ccm->ppctl), MXC_HCLK)) /
((pre_pdf + 1) * (pdf + 1));
break;
default:
printf("%s(): This clock: %d not supported yet\n",
__func__, clk);
break;
}
return ret_val;
}
unsigned int mxc_get_clock(enum mxc_clock clk)
{
switch (clk) {
case MXC_ARM_CLK:
return get_mcu_main_clk();
case MXC_AHB_CLK:
break;
case MXC_IPG_CLK:
return get_ipg_clk();
case MXC_IPG_PERCLK:
case MXC_I2C_CLK:
return get_ipg_per_clk();
case MXC_UART_CLK:
return imx_get_uartclk();
case MXC_ESDHC1_CLK:
return mxc_get_peri_clock(ESDHC1_CLK);
case MXC_ESDHC2_CLK:
return mxc_get_peri_clock(ESDHC2_CLK);
case MXC_ESDHC3_CLK:
return mxc_get_peri_clock(ESDHC3_CLK);
case MXC_USB_CLK:
return mxc_get_main_clock(USB_CLK);
case MXC_FEC_CLK:
return get_ipg_clk();
case MXC_CSPI_CLK:
return get_ipg_clk();
}
return -1;
}
#ifdef CONFIG_FEC_MXC
/*
* The MX35 has no fuse for MAC, return a NULL MAC
*/
void imx_get_mac_from_fuse(int dev_id, unsigned char *mac)
{
memset(mac, 0, 6);
}
u32 imx_get_fecclk(void)
{
return mxc_get_clock(MXC_IPG_CLK);
}
#endif
int do_mx35_showclocks(cmd_tbl_t *cmdtp,
int flag, int argc, char * const argv[])
{
u32 cpufreq = get_mcu_main_clk();
printf("mx35 cpu clock: %dMHz\n", cpufreq / 1000000);
printf("ipg clock : %dHz\n", get_ipg_clk());
printf("ipg per clock : %dHz\n", get_ipg_per_clk());
printf("uart clock : %dHz\n", mxc_get_clock(MXC_UART_CLK));
return 0;
}
U_BOOT_CMD(
clocks, CONFIG_SYS_MAXARGS, 1, do_mx35_showclocks,
"display clocks",
""
);
#if defined(CONFIG_DISPLAY_CPUINFO)
static char *get_reset_cause(void)
{
/* read RCSR register from CCM module */
struct ccm_regs *ccm =
(struct ccm_regs *)IMX_CCM_BASE;
u32 cause = readl(&ccm->rcsr) & 0x0F;
switch (cause) {
case 0x0000:
return "POR";
case 0x0002:
return "JTAG";
case 0x0004:
return "RST";
case 0x0008:
return "WDOG";
default:
return "unknown reset";
}
}
int print_cpuinfo(void)
{
u32 srev = get_cpu_rev();
printf("CPU: Freescale i.MX35 rev %d.%d at %d MHz.\n",
(srev & 0xF0) >> 4, (srev & 0x0F),
get_mcu_main_clk() / 1000000);
printf("Reset cause: %s\n", get_reset_cause());
return 0;
}
#endif
/*
* Initializes on-chip ethernet controllers.
* to override, implement board_eth_init()
*/
int cpu_eth_init(bd_t *bis)
{
int rc = -ENODEV;
#if defined(CONFIG_FEC_MXC)
rc = fecmxc_initialize(bis);
#endif
return rc;
}
#ifdef CONFIG_FSL_ESDHC
/*
* Initializes on-chip MMC controllers.
* to override, implement board_mmc_init()
*/
int cpu_mmc_init(bd_t *bis)
{
return fsl_esdhc_mmc_init(bis);
}
#endif
int get_clocks(void)
{
#ifdef CONFIG_FSL_ESDHC
#if CONFIG_SYS_FSL_ESDHC_ADDR == MMC_SDHC2_BASE_ADDR
gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
#elif CONFIG_SYS_FSL_ESDHC_ADDR == MMC_SDHC3_BASE_ADDR
gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
#else
gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC1_CLK);
#endif
#endif
return 0;
}
#define RCSR_MEM_CTL_WEIM 0
#define RCSR_MEM_CTL_NAND 1
#define RCSR_MEM_CTL_ATA 2
#define RCSR_MEM_CTL_EXPANSION 3
#define RCSR_MEM_TYPE_NOR 0
#define RCSR_MEM_TYPE_ONENAND 2
#define RCSR_MEM_TYPE_SD 0
#define RCSR_MEM_TYPE_I2C 2
#define RCSR_MEM_TYPE_SPI 3
u32 spl_boot_device(void)
{
struct ccm_regs *ccm =
(struct ccm_regs *)IMX_CCM_BASE;
u32 rcsr = readl(&ccm->rcsr);
u32 mem_type, mem_ctl;
/* In external mode, no boot device is returned */
if ((rcsr >> 10) & 0x03)
return BOOT_DEVICE_NONE;
mem_ctl = (rcsr >> 25) & 0x03;
mem_type = (rcsr >> 23) & 0x03;
switch (mem_ctl) {
case RCSR_MEM_CTL_WEIM:
switch (mem_type) {
case RCSR_MEM_TYPE_NOR:
return BOOT_DEVICE_NOR;
case RCSR_MEM_TYPE_ONENAND:
return BOOT_DEVICE_ONENAND;
default:
return BOOT_DEVICE_NONE;
}
case RCSR_MEM_CTL_NAND:
return BOOT_DEVICE_NAND;
case RCSR_MEM_CTL_EXPANSION:
switch (mem_type) {
case RCSR_MEM_TYPE_SD:
return BOOT_DEVICE_MMC1;
case RCSR_MEM_TYPE_I2C:
return BOOT_DEVICE_I2C;
case RCSR_MEM_TYPE_SPI:
return BOOT_DEVICE_SPI;
default:
return BOOT_DEVICE_NONE;
}
}
return BOOT_DEVICE_NONE;
}
#ifdef CONFIG_SPL_BUILD
u32 spl_boot_mode(void)
{
switch (spl_boot_device()) {
case BOOT_DEVICE_MMC1:
#ifdef CONFIG_SPL_FAT_SUPPORT
return MMCSD_MODE_FS;
#else
return MMCSD_MODE_RAW;
#endif
break;
case BOOT_DEVICE_NAND:
return 0;
break;
default:
puts("spl: ERROR: unsupported device\n");
hang();
}
}
#endif

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@@ -1,121 +0,0 @@
/*
* Copyright (C) 2012, Stefano Babic <sbabic@denx.de>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <asm/io.h>
#include <asm/errno.h>
#include <asm/arch/imx-regs.h>
#include <linux/types.h>
#include <asm/arch/sys_proto.h>
#define ESDCTL_DDR2_EMR2 0x04000000
#define ESDCTL_DDR2_EMR3 0x06000000
#define ESDCTL_PRECHARGE 0x00000400
#define ESDCTL_DDR2_EN_DLL 0x02000400
#define ESDCTL_DDR2_RESET_DLL 0x00000333
#define ESDCTL_DDR2_MR 0x00000233
#define ESDCTL_DDR2_OCD_DEFAULT 0x02000780
enum {
SMODE_NORMAL = 0,
SMODE_PRECHARGE,
SMODE_AUTO_REFRESH,
SMODE_LOAD_REG,
SMODE_MANUAL_REFRESH
};
#define set_mode(x, en, m) (x | (en << 31) | (m << 28))
static inline void dram_wait(unsigned int count)
{
volatile unsigned int wait = count;
while (wait--)
;
}
void mx3_setup_sdram_bank(u32 start_address, u32 ddr2_config,
u32 row, u32 col, u32 dsize, u32 refresh)
{
struct esdc_regs *esdc = (struct esdc_regs *)ESDCTL_BASE_ADDR;
u32 *cfg_reg, *ctl_reg;
u32 val;
u32 ctlval;
switch (start_address) {
case CSD0_BASE_ADDR:
cfg_reg = &esdc->esdcfg0;
ctl_reg = &esdc->esdctl0;
break;
case CSD1_BASE_ADDR:
cfg_reg = &esdc->esdcfg1;
ctl_reg = &esdc->esdctl1;
break;
default:
return;
}
/* The MX35 supports 11 up to 14 rows */
if (row < 11 || row > 14 || col < 8 || col > 10)
return;
ctlval = (row - 11) << 24 | (col - 8) << 20 | (dsize << 16);
/* Initialize MISC register for DDR2 */
val = ESDC_MISC_RST | ESDC_MISC_MDDR_EN | ESDC_MISC_MDDR_DL_RST |
ESDC_MISC_DDR_EN | ESDC_MISC_DDR2_EN;
writel(val, &esdc->esdmisc);
val &= ~(ESDC_MISC_RST | ESDC_MISC_MDDR_DL_RST);
writel(val, &esdc->esdmisc);
/*
* according to DDR2 specs, wait a while before
* the PRECHARGE_ALL command
*/
dram_wait(0x20000);
/* Load DDR2 config and timing */
writel(ddr2_config, cfg_reg);
/* Precharge ALL */
writel(set_mode(ctlval, 1, SMODE_PRECHARGE),
ctl_reg);
writel(0xda, start_address + ESDCTL_PRECHARGE);
/* Load mode */
writel(set_mode(ctlval, 1, SMODE_LOAD_REG),
ctl_reg);
writeb(0xda, start_address + ESDCTL_DDR2_EMR2); /* EMRS2 */
writeb(0xda, start_address + ESDCTL_DDR2_EMR3); /* EMRS3 */
writeb(0xda, start_address + ESDCTL_DDR2_EN_DLL); /* Enable DLL */
writeb(0xda, start_address + ESDCTL_DDR2_RESET_DLL); /* Reset DLL */
/* Precharge ALL */
writel(set_mode(ctlval, 1, SMODE_PRECHARGE),
ctl_reg);
writel(0xda, start_address + ESDCTL_PRECHARGE);
/* Set mode auto refresh : at least two refresh are required */
writel(set_mode(ctlval, 1, SMODE_AUTO_REFRESH),
ctl_reg);
writel(0xda, start_address);
writel(0xda, start_address);
writel(set_mode(ctlval, 1, SMODE_LOAD_REG),
ctl_reg);
writeb(0xda, start_address + ESDCTL_DDR2_MR);
writeb(0xda, start_address + ESDCTL_DDR2_OCD_DEFAULT);
/* OCD mode exit */
writeb(0xda, start_address + ESDCTL_DDR2_EN_DLL); /* Enable DLL */
/* Set normal mode */
writel(set_mode(ctlval, 1, SMODE_NORMAL) | refresh,
ctl_reg);
dram_wait(0x20000);
/* Do not set delay lines, only for MDDR */
}

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/*
* (C) Copyright 2007
* Sascha Hauer, Pengutronix
*
* (C) Copyright 2008-2009 Freescale Semiconductor, Inc.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <asm/io.h>
#include <asm/arch/imx-regs.h>
#include <asm/arch/crm_regs.h>
DECLARE_GLOBAL_DATA_PTR;
/* General purpose timers bitfields */
#define GPTCR_SWR (1<<15) /* Software reset */
#define GPTCR_FRR (1<<9) /* Freerun / restart */
#define GPTCR_CLKSOURCE_32 (4<<6) /* Clock source */
#define GPTCR_TEN (1) /* Timer enable */
/*
* nothing really to do with interrupts, just starts up a counter.
* The 32KHz 32-bit timer overruns in 134217 seconds
*/
int timer_init(void)
{
int i;
struct gpt_regs *gpt = (struct gpt_regs *)GPT1_BASE_ADDR;
struct ccm_regs *ccm = (struct ccm_regs *)CCM_BASE_ADDR;
/* setup GP Timer 1 */
writel(GPTCR_SWR, &gpt->ctrl);
writel(readl(&ccm->cgr1) | 3 << MXC_CCM_CGR1_GPT_OFFSET, &ccm->cgr1);
for (i = 0; i < 100; i++)
writel(0, &gpt->ctrl); /* We have no udelay by now */
writel(0, &gpt->pre); /* prescaler = 1 */
/* Freerun Mode, 32KHz input */
writel(readl(&gpt->ctrl) | GPTCR_CLKSOURCE_32 | GPTCR_FRR,
&gpt->ctrl);
writel(readl(&gpt->ctrl) | GPTCR_TEN, &gpt->ctrl);
return 0;
}

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/*
* armboot - Startup Code for OMP2420/ARM1136 CPU-core
*
* Copyright (c) 2004 Texas Instruments <r-woodruff2@ti.com>
*
* Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
* Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
* Copyright (c) 2002 Gary Jennejohn <garyj@denx.de>
* Copyright (c) 2003 Richard Woodruff <r-woodruff2@ti.com>
* Copyright (c) 2003 Kshitij <kshitij@ti.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <asm-offsets.h>
#include <config.h>
#include <version.h>
/*
*************************************************************************
*
* Startup Code (reset vector)
*
* do important init only if we don't start from memory!
* setup Memory and board specific bits prior to relocation.
* relocate armboot to ram
* setup stack
*
*************************************************************************
*/
.globl reset
reset:
/*
* set the cpu to SVC32 mode
*/
mrs r0,cpsr
bic r0,r0,#0x1f
orr r0,r0,#0xd3
msr cpsr,r0
/* the mask ROM code should have PLL and others stable */
#ifndef CONFIG_SKIP_LOWLEVEL_INIT
bl cpu_init_crit
#endif
bl _main
/*------------------------------------------------------------------------------*/
.globl c_runtime_cpu_setup
c_runtime_cpu_setup:
bx lr
/*
*************************************************************************
*
* CPU_init_critical registers
*
* setup important registers
* setup memory timing
*
*************************************************************************
*/
#ifndef CONFIG_SKIP_LOWLEVEL_INIT
cpu_init_crit:
/*
* flush v4 I/D caches
*/
mov r0, #0
mcr p15, 0, r0, c7, c7, 0 /* Invalidate I+D+BTB caches */
mcr p15, 0, r0, c8, c7, 0 /* Invalidate Unified TLB */
/*
* disable MMU stuff and caches
*/
mrc p15, 0, r0, c1, c0, 0
bic r0, r0, #0x00002300 @ clear bits 13, 9:8 (--V- --RS)
bic r0, r0, #0x00000087 @ clear bits 7, 2:0 (B--- -CAM)
orr r0, r0, #0x00000002 @ set bit 2 (A) Align
orr r0, r0, #0x00001000 @ set bit 12 (I) I-Cache
mcr p15, 0, r0, c1, c0, 0
/*
* Jump to board specific initialization... The Mask ROM will have already initialized
* basic memory. Go here to bump up clock rate and handle wake up conditions.
*/
mov ip, lr /* persevere link reg across call */
bl lowlevel_init /* go setup pll,mux,memory */
mov lr, ip /* restore link */
mov pc, lr /* back to my caller */
#endif /* CONFIG_SKIP_LOWLEVEL_INIT */

View File

@@ -1,51 +0,0 @@
/*
* (C) Copyright 2002
* Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
*
* (C) Copyright 2010
* Texas Instruments, <www.ti.com>
* Aneesh V <aneesh@ti.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
MEMORY { .sram : ORIGIN = CONFIG_SPL_TEXT_BASE,\
LENGTH = CONFIG_SPL_MAX_SIZE }
MEMORY { .sdram : ORIGIN = CONFIG_SPL_BSS_START_ADDR, \
LENGTH = CONFIG_SPL_BSS_MAX_SIZE }
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)
ENTRY(_start)
SECTIONS
{
.text :
{
__start = .;
*(.vectors)
arch/arm/cpu/arm1136/start.o (.text*)
*(.text*)
} >.sram
. = ALIGN(4);
.rodata : { *(SORT_BY_ALIGNMENT(.rodata*)) } >.sram
. = ALIGN(4);
.data : { *(SORT_BY_ALIGNMENT(.data*)) } >.sram
. = ALIGN(4);
__image_copy_end = .;
.end :
{
*(.__end)
}
.bss :
{
. = ALIGN(4);
__bss_start = .;
*(.bss*)
. = ALIGN(4);
__bss_end = .;
} >.sdram
}

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@@ -1,15 +0,0 @@
#
# (C) Copyright 2000-2006
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# (C) Copyright 2008
# Guennadi Liakhovetki, DENX Software Engineering, <lg@denx.de>
#
# SPDX-License-Identifier: GPL-2.0+
#
extra-y = start.o
obj-y = cpu.o
obj-$(CONFIG_BCM2835) += bcm2835/
obj-$(CONFIG_TNETV107X) += tnetv107x/

View File

@@ -1,16 +0,0 @@
#
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License
# version 2 as published by the Free Software Foundation.
#
# This program is distributed in the hope that it will be useful, but
# WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
obj-y := lowlevel_init.o
obj-y += init.o reset.o timer.o mbox.o

View File

@@ -1,24 +0,0 @@
/*
* (C) Copyright 2012 Stephen Warren
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <common.h>
int arch_cpu_init(void)
{
icache_enable();
return 0;
}

View File

@@ -1,19 +0,0 @@
/*
* (C) Copyright 2012 Stephen Warren
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
.globl lowlevel_init
lowlevel_init:
mov pc, lr

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@@ -1,153 +0,0 @@
/*
* (C) Copyright 2012 Stephen Warren
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <asm/io.h>
#include <asm/arch/mbox.h>
#define TIMEOUT 1000 /* ms */
int bcm2835_mbox_call_raw(u32 chan, u32 send, u32 *recv)
{
struct bcm2835_mbox_regs *regs =
(struct bcm2835_mbox_regs *)BCM2835_MBOX_PHYSADDR;
ulong endtime = get_timer(0) + TIMEOUT;
u32 val;
debug("time: %lu timeout: %lu\n", get_timer(0), endtime);
if (send & BCM2835_CHAN_MASK) {
printf("mbox: Illegal mbox data 0x%08x\n", send);
return -1;
}
/* Drain any stale responses */
for (;;) {
val = readl(&regs->status);
if (val & BCM2835_MBOX_STATUS_RD_EMPTY)
break;
if (get_timer(0) >= endtime) {
printf("mbox: Timeout draining stale responses\n");
return -1;
}
val = readl(&regs->read);
}
/* Wait for space to send */
for (;;) {
val = readl(&regs->status);
if (!(val & BCM2835_MBOX_STATUS_WR_FULL))
break;
if (get_timer(0) >= endtime) {
printf("mbox: Timeout waiting for send space\n");
return -1;
}
}
/* Send the request */
val = BCM2835_MBOX_PACK(chan, send);
debug("mbox: TX raw: 0x%08x\n", val);
writel(val, &regs->write);
/* Wait for the response */
for (;;) {
val = readl(&regs->status);
if (!(val & BCM2835_MBOX_STATUS_RD_EMPTY))
break;
if (get_timer(0) >= endtime) {
printf("mbox: Timeout waiting for response\n");
return -1;
}
}
/* Read the response */
val = readl(&regs->read);
debug("mbox: RX raw: 0x%08x\n", val);
/* Validate the response */
if (BCM2835_MBOX_UNPACK_CHAN(val) != chan) {
printf("mbox: Response channel mismatch\n");
return -1;
}
*recv = BCM2835_MBOX_UNPACK_DATA(val);
return 0;
}
#ifdef DEBUG
void dump_buf(struct bcm2835_mbox_hdr *buffer)
{
u32 *p;
u32 words;
int i;
p = (u32 *)buffer;
words = buffer->buf_size / 4;
for (i = 0; i < words; i++)
printf(" 0x%04x: 0x%08x\n", i * 4, p[i]);
}
#endif
int bcm2835_mbox_call_prop(u32 chan, struct bcm2835_mbox_hdr *buffer)
{
int ret;
u32 rbuffer;
struct bcm2835_mbox_tag_hdr *tag;
int tag_index;
#ifdef DEBUG
printf("mbox: TX buffer\n");
dump_buf(buffer);
#endif
ret = bcm2835_mbox_call_raw(chan, (u32)buffer, &rbuffer);
if (ret)
return ret;
if (rbuffer != (u32)buffer) {
printf("mbox: Response buffer mismatch\n");
return -1;
}
#ifdef DEBUG
printf("mbox: RX buffer\n");
dump_buf(buffer);
#endif
/* Validate overall response status */
if (buffer->code != BCM2835_MBOX_RESP_CODE_SUCCESS) {
printf("mbox: Header response code invalid\n");
return -1;
}
/* Validate each tag's response status */
tag = (void *)(buffer + 1);
tag_index = 0;
while (tag->tag) {
if (!(tag->val_len & BCM2835_MBOX_TAG_VAL_LEN_RESPONSE)) {
printf("mbox: Tag %d missing val_len response bit\n",
tag_index);
return -1;
}
/*
* Clear the reponse bit so clients can just look right at the
* length field without extra processing
*/
tag->val_len &= ~BCM2835_MBOX_TAG_VAL_LEN_RESPONSE;
tag = (void *)(((u8 *)tag) + sizeof(*tag) + tag->val_buf_size);
tag_index++;
}
return 0;
}

View File

@@ -1,35 +0,0 @@
/*
* (C) Copyright 2012 Stephen Warren
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <common.h>
#include <asm/io.h>
#include <asm/arch/wdog.h>
#define RESET_TIMEOUT 10
void reset_cpu(ulong addr)
{
struct bcm2835_wdog_regs *regs =
(struct bcm2835_wdog_regs *)BCM2835_WDOG_PHYSADDR;
uint32_t rstc;
rstc = readl(&regs->rstc);
rstc &= ~BCM2835_WDOG_RSTC_WRCFG_MASK;
rstc |= BCM2835_WDOG_RSTC_WRCFG_FULL_RESET;
writel(BCM2835_WDOG_PASSWORD | RESET_TIMEOUT, &regs->wdog);
writel(BCM2835_WDOG_PASSWORD | rstc, &regs->rstc);
}

View File

@@ -1,58 +0,0 @@
/*
* (C) Copyright 2012 Stephen Warren
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <common.h>
#include <asm/io.h>
#include <asm/arch/timer.h>
ulong get_timer_us(ulong base)
{
struct bcm2835_timer_regs *regs =
(struct bcm2835_timer_regs *)BCM2835_TIMER_PHYSADDR;
return readl(&regs->clo) - base;
}
ulong get_timer(ulong base)
{
ulong us = get_timer_us(0);
us /= (1000000 / CONFIG_SYS_HZ);
us -= base;
return us;
}
unsigned long long get_ticks(void)
{
return get_timer(0);
}
ulong get_tbclk(void)
{
return CONFIG_SYS_HZ;
}
void __udelay(unsigned long usec)
{
ulong endtime;
signed long diff;
endtime = get_timer_us(0) + usec;
do {
ulong now = get_timer_us(0);
diff = endtime - now;
} while (diff >= 0);
}

View File

@@ -1,9 +0,0 @@
#
# (C) Copyright 2002
# Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
#
# SPDX-License-Identifier: GPL-2.0+
#
# Make ARMv5 to allow more compilers to work, even though its v6.
PLATFORM_CPPFLAGS += -march=armv5t

View File

@@ -1,51 +0,0 @@
/*
* (C) Copyright 2004 Texas Insturments
*
* (C) Copyright 2002
* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
* Marius Groeger <mgroeger@sysgo.de>
*
* (C) Copyright 2002
* Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
*
* SPDX-License-Identifier: GPL-2.0+
*/
/*
* CPU specific code
*/
#include <common.h>
#include <command.h>
#include <asm/system.h>
static void cache_flush (void);
int cleanup_before_linux (void)
{
/*
* this function is called just before we call linux
* it prepares the processor for linux
*
* we turn off caches etc ...
*/
disable_interrupts ();
/* turn off I/D-cache */
icache_disable();
dcache_disable();
/* flush I/D-cache */
cache_flush();
return 0;
}
/* flush I/D-cache */
static void cache_flush (void)
{
/* invalidate both caches and flush btb */
asm ("mcr p15, 0, %0, c7, c7, 0": :"r" (0));
/* mem barrier to sync things */
asm ("mcr p15, 0, %0, c7, c10, 4": :"r" (0));
}

View File

@@ -1,135 +0,0 @@
/*
* armboot - Startup Code for ARM1176 CPU-core
*
* Copyright (c) 2007 Samsung Electronics
*
* Copyright (C) 2008
* Guennadi Liakhovetki, DENX Software Engineering, <lg@denx.de>
*
* SPDX-License-Identifier: GPL-2.0+
*
* 2007-09-21 - Restructured codes by jsgood (jsgood.yang@samsung.com)
* 2007-09-21 - Added MoviNAND and OneNAND boot codes by
* jsgood (jsgood.yang@samsung.com)
* Base codes by scsuh (sc.suh)
*/
#include <asm-offsets.h>
#include <config.h>
#include <version.h>
#ifndef CONFIG_SYS_PHY_UBOOT_BASE
#define CONFIG_SYS_PHY_UBOOT_BASE CONFIG_SYS_UBOOT_BASE
#endif
/*
*************************************************************************
*
* Startup Code (reset vector)
*
* do important init only if we don't start from memory!
* setup Memory and board specific bits prior to relocation.
* relocate armboot to ram
* setup stack
*
*************************************************************************
*/
.globl reset
reset:
/*
* set the cpu to SVC32 mode
*/
mrs r0, cpsr
bic r0, r0, #0x3f
orr r0, r0, #0xd3
msr cpsr, r0
/*
*************************************************************************
*
* CPU_init_critical registers
*
* setup important registers
* setup memory timing
*
*************************************************************************
*/
/*
* we do sys-critical inits only at reboot,
* not when booting from ram!
*/
cpu_init_crit:
/*
* When booting from NAND - it has definitely been a reset, so, no need
* to flush caches and disable the MMU
*/
#ifndef CONFIG_SPL_BUILD
/*
* flush v4 I/D caches
*/
mov r0, #0
mcr p15, 0, r0, c7, c7, 0 /* flush v3/v4 cache */
mcr p15, 0, r0, c8, c7, 0 /* flush v4 TLB */
/*
* disable MMU stuff and caches
*/
mrc p15, 0, r0, c1, c0, 0
bic r0, r0, #0x00002300 @ clear bits 13, 9:8 (--V- --RS)
bic r0, r0, #0x00000087 @ clear bits 7, 2:0 (B--- -CAM)
orr r0, r0, #0x00000002 @ set bit 2 (A) Align
orr r0, r0, #0x00001000 @ set bit 12 (I) I-Cache
/* Prepare to disable the MMU */
adr r2, mmu_disable_phys
sub r2, r2, #(CONFIG_SYS_PHY_UBOOT_BASE - CONFIG_SYS_TEXT_BASE)
b mmu_disable
.align 5
/* Run in a single cache-line */
mmu_disable:
mcr p15, 0, r0, c1, c0, 0
nop
nop
mov pc, r2
mmu_disable_phys:
#ifdef CONFIG_DISABLE_TCM
/*
* Disable the TCMs
*/
mrc p15, 0, r0, c0, c0, 2 /* Return TCM details */
cmp r0, #0
beq skip_tcmdisable
mov r1, #0
mov r2, #1
tst r0, r2
mcrne p15, 0, r1, c9, c1, 1 /* Disable Instruction TCM if present*/
tst r0, r2, LSL #16
mcrne p15, 0, r1, c9, c1, 0 /* Disable Data TCM if present*/
skip_tcmdisable:
#endif
#endif
#ifdef CONFIG_PERIPORT_REMAP
/* Peri port setup */
ldr r0, =CONFIG_PERIPORT_BASE
orr r0, r0, #CONFIG_PERIPORT_SIZE
mcr p15,0,r0,c15,c2,4
#endif
/*
* Go setup Memory and board specific bits prior to relocation.
*/
bl lowlevel_init /* go setup pll,mux,memory */
bl _main
/*------------------------------------------------------------------------------*/
.globl c_runtime_cpu_setup
c_runtime_cpu_setup:
mov pc, lr

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