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Author SHA1 Message Date
Wolfgang Denk
ca6e1c136d Prepare v2010.03
Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-03-31 23:54:39 +02:00
Heiko Schocher
8e64d6efd8 net, doc: How to setup MAC address correctly
As this seems unclear, document how the flow of setting up
the MAC address is correct.

Signed-off-by: Heiko Schocher <hs@denx.de>

Text changed slightly, adding input from Mike Frysinger.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-03-31 15:13:32 +02:00
Heiko Schocher
b78b48c6a0 net, fec_mxc: only setup the device enetaddr with eeprom value
Only fill the device enetaddr with the contents of the eeprom,
do not program it in MAC address registers

Signed-off-by: Heiko Schocher <hs@denx.de>
Acked-by: Ben Warren <biggerbadderben@gmail.com>
2010-03-31 15:13:31 +02:00
Felix Radensky
d5a64237d5 doc: Fix ramdisk examples in doc/uImage.FIT/multi.its
The ramdisk sections in doc/uImage.FIT/multi.its lack
load address and entry point properties. Using examples
from this file will result in unbootable image, u-boot
will issue the following error messages:

Can't get ramdisk subimage load address!
Ramdisk image is corrupt or invalid

This patch adds missing properties to ramdisk sections.

Signed-off-by: Felix Radensky <felix@embedded-sol.com>
2010-03-31 15:13:31 +02:00
Heiko Schocher
2d2018f3db jffs2, suen3: Fix compiler warning
$ ./MAKEALL suen3
jffs2_1pass.c: In function 'get_fl_mem':
jffs2_1pass.c:399: warning: unused variable 'id'
jffs2_1pass.c: In function 'get_node_mem':
jffs2_1pass.c:423: warning: unused variable 'id'

Signed-off-by: Heiko Schocher <hs@denx.de>
Tested-by: Tom <Tom.Rix@windriver.com>
2010-03-31 15:13:31 +02:00
Wolfgang Denk
f3dfbb6816 Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx 2010-03-30 22:22:47 +02:00
Wolfgang Denk
7d3ef4fa20 Merge branch 'master' of git://git.denx.de/u-boot-ppc4xx 2010-03-30 22:21:24 +02:00
Timur Tabi
9ff32d8ccf mpc86xx: set the DDR BATs after calculating true DDR size
After determining how much DDR is actually in the system, set DBAT0 and
IBAT0 accordingly.  This ensures that the CPU won't attempt to access
(via speculation) addresses outside of actual memory.

On 86xx systems, DBAT0 and IBAT0 (the BATs for DDR) are initialized to 2GB
and kept that way.  If the system has less than 2GB of memory (typical for
an MPC8610 HPCD), the CPU may attempt to access this memory during
speculation.  The zlib code is notorious for generating such memory reads,
and indeed on the MPC8610, uncompressing the Linux kernel causes a machine
check (without this patch).

Currently we are limited to power of two sized DDR since we only use a
single bat.  If a non-power of two size is used that is less than
CONFIG_MAX_MEM_MAPPED u-boot will crash.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-03-30 10:50:22 -05:00
Kumar Gala
33f57bd553 85xx: Fix enabling of L1 cache parity on secondary cores
Use the same code between primary and secondary cores to init the
L1 cache.  We were not enabling cache parity on the secondary cores.

Also, reworked the L1 cache init code to match the e500mc L2 init code
that first invalidates the cache and locks.  Than enables the cache and
makes sure its enabled before continuing.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-03-30 10:48:30 -05:00
Stefan Roese
1a332da61d ppc4xx: Fix problem with I2C bus >= 1 initialization
This patch fixes a problem introduced with patch eb5eb2b0
[ppc4xx: Cleanup PPC4xx I2C infrastructure]. We need to assign the I2C
base address to the "i2c" pointer inside of the controller loop.
Otherwise controller 0 is initialized multiple times instead of
initializing each I2C controller sequentially.

Tested on Katmai.

Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Heiko Schocher <hs@denx.de>
2010-03-30 13:05:05 +02:00
Heiko Schocher
24de2f4be0 bootm, linux: fix booting Multi-File Image with "kernel+ramdisk+fdt"
Booting a "Multi-File Image" including a linux kernel, ramdisk and
fdt, generated with

mkimage -A ppc \
    -O linux \
    -T multi \
    -C gzip \
    -a 00000000 \
    -e 00000000 \
    -n "kernel-2.6+initrd+dtb" \
    -d "vmlinux.bin.gz:ramdisk_image.gz:board.dtb" \
    multi.bin

actually fails, because ramdisk start and end addresses
didn;t get initialized. This patch fixes this issue.

Tested on the KUP4K board.

Signed-off-by: Heiko Schocher <hs@denx.de>
2010-03-29 14:31:42 +02:00
Wolfgang Denk
2883cc2d48 Prepare 2010.03-rc3
Update CHANGELOG

Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-03-28 00:25:14 +01:00
Wolfgang Denk
060f28532b cmd_usb.c: print debug messages only when DEBUG is defined
Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-03-28 00:19:45 +01:00
Wolfgang Denk
a574cff121 ml300: remove support for broken, orphaned board
The ml300 board has a number of issues, but nobody cares about this
long-orphaned board any more.  Remove it.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Acked-by: Michal Simek <monstr@monstr.eu>
2010-03-28 00:18:58 +01:00
Wolfgang Denk
cc3074c322 Merge branch 'master' of /home/wd/git/u-boot/custodians 2010-03-28 00:15:20 +01:00
Wolfgang Denk
04387d24a1 mkimage: fix Segmentation Fault when run without "-n name" option
The restructuring of the mkimage command in commit 89a4d6b1 ("tools:
mkimage: split code into core, default and FIT image specific")
introduced a bug that caused mkimage to segfault when run without
"-n name" option.  Initialize the imagename entry to prevent that.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-03-28 00:13:54 +01:00
Wolfgang Denk
4284f36a3e Merge branch 'master' of git://git.denx.de/u-boot-cfi-flash 2010-03-28 00:11:16 +01:00
Renato Andreola
c40c94a3d2 cfi_flash: precision and underflow problem in tout calculation
With old configuration it could happen tout=0 if CONFIG_SYS_HZ<1000.

Signed-off-by: Renato Andreola <renato.andreola@imagos.it>
Signed-off-by: Alessandro Rubini <rubini@gnudd.com>
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Signed-off-by: Stefan Roese <sr@denx.de>
2010-03-25 09:44:58 +01:00
Rupjyoti Sarmah
c550afada5 ppc4xx fix unstable 440EPx bootstrap options
440EPx fixed bootstrap options A, B, D, and E sets PLL FWDVA to a value = 1.
This results in the PLLOUTB being greater than the CPU clock frequency
resulting unstable 440EPx operation resulting in various software hang
conditions.

This patch reprograms the FWDVA satisfying the requirement of setting FWDVB
to a value greater than 1 while using one of the four deafult bootstrap options.

Signed-off-by: Rupjyoti Sarmah <rsarmah@amcc.com>
Acked-by : Victor Gallardo <vgallardo@appliedmicro.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2010-03-24 14:27:01 +01:00
Wolfgang Denk
7027d5622d Merge branch 'master' of git://git.denx.de/u-boot-video 2010-03-24 14:11:53 +01:00
Matthias Fuchs
fb508b8b39 at91: Get rid of some warnings when building for otc570
The soft-i2c code for AT91 defines I2C_SOFT_DECLARATIONS
for direct access by dereferencing a pio pointer.
The OTC570 platform uses the AT91 gpio API so it does not
need the pio variable.

Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
2010-03-24 13:06:24 +01:00
Alessandro Rubini
acb1386893 lcd: make 16bpp work
Support for 16bpp was supposed to be in the code but was not working.
This makes it work and has been tested in the nhk8815 board.

Signed-off-by: Alessandro Rubini <rubini@unipv.it>
Acked-by: Andrea Gallo <andrea.gallo@stericsson.com>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
2010-03-24 11:23:15 +01:00
Wolfgang Denk
152dda3d94 Prepare v2010.03-rc2
Update CHANGELOG

Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-03-22 23:25:00 +01:00
Matthias Kaehlcke
d650da2dd4 ep93xx timer: Fix resolution of get_ticks()
ep93xx timer: Make get_ticks() return a value in CONFIG_SYS_HZ resolution,
as announced by get_tbclk()

Signed-off-by: Matthias Kaehlcke <matthias@kaehlcke.net>
2010-03-22 11:58:28 -05:00
Matthias Kaehlcke
7e67fb5bf2 ep93xx timer: Fix possible overflow in usecs_to_ticks()
ep93xx timer: Use 64-bit values in usecs_to_ticks() in order to avoid
overflows in intermediate values

Signed-off-by: Matthias Kaehlcke <matthias@kaehlcke.net>
2010-03-22 11:58:28 -05:00
Asen Dimov
daa989b472 correct a syntax typo in at91_matrix.h
Signed-off-by: Asen Dimov <dimov@ronetix.at>
2010-03-21 22:22:53 +01:00
Jeff Angielski
322ff395c9 env: fix endian ordering in crc table
The crc table was being built as little endian for big endian
targets.  This would cause fw_printenv to always fail with
"Warning: Bad CRC, using default environment" messages.

Signed-off-by: Jeff Angielski <jeff@theptrgroup.com>
Acked-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
2010-03-21 22:22:53 +01:00
Anatolij Gustschin
51c2ac9bb5 mpc5121: cpu/mpc512x/diu.c: fix warnings
Fix warnings while compiling with CONFIG_VIDEO enabled:

diu.c: In function 'video_hw_init':
diu.c:158: warning: 'return' with no value, in function returning non-void
diu.c:162: warning: format '%ld' expects type 'long int', but argument 6 has type 'int'
diu.c:162: warning: format '%ld' expects type 'long int', but argument 7 has type 'int'

Signed-off-by: Anatolij Gustschin <agust@denx.de>
2010-03-21 22:22:53 +01:00
Anatolij Gustschin
a74908161a console.c: fix problem with splashimage
If a board uses cfb_console driver and splash image
and also defines CONFIG_SILENT_CONSOLE, the user is
locked out even if "silent" is not set. It is not
possible to get any output, neither on vga console
device nor on serial console after redirecting the
output to the serial console, since the GD_FLG_SILENT
flag remains set.

Fix the problem by redirecting the output from frame
buffer to serial console if splashimage is used.
Only suppress the output if "silent" environment
variable was set and don't set the GD_FLG_SILENT
flag arbitrarily.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
2010-03-21 22:22:53 +01:00
Thomas Weber
5647f78d04 mod change 755 => 644 for multiple files
I executed 'find . -name "*.[chS]" -perm 755 -exec chmod 644 {} \;'

Signed-off-by: Thomas Weber <swirl@gmx.li>
Add some more: neither Makefile nor config.mk need execute permissions.
Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-03-21 22:22:53 +01:00
Stefano Babic
99c006a320 mxcmmc: fix warnings due to access 32 bit registers with 16 bit accessors
Some registers of the mxcmmc driver were accessed using
16 bit accessor functions, because only the LSB is
significant. This is not needed and generates
warnings.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2010-03-21 22:22:52 +01:00
Wolfgang Denk
c96f86eefc TFTP: allow for adjustable retransmission timout
So far, TFTP negotiated a fixed retransmission timeout of 5 seconds.
In some cases (busy networks, slow TFTP servers) this caused very
slow transfers. A new environment variable "tftptimeout" allows to
set this timeout. Lowering this value may make downloads succeed
faster in networks with high packet loss rates or with unreliable
TFTP servers.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Ben Warren <biggerbadderben@gmail.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2010-03-21 22:22:44 +01:00
Wolfgang Denk
252b404d95 Fix PCI_BASE_ADDRESS_5 handling in pci_hose_config_device()
Signed-off-by: FUJITA Kazutoshi <fujita@soum.co.jp>
Signed-off-by: <wd@denx.de>
Acked-by: Stefan Roese <sr@denx.de>
2010-03-21 17:58:07 +01:00
Frans Meulenbroeks
9d90a93d36 cmd_mmc remove \n
This patch removes the \n after the help message for mmcinfo.
This resulted in an empty line being displayed after the mmcinfo line
when the help command was given.

Signed-off-by: Frans Meulenbroeks <fransmeulenbroeks@gmail.com>
2010-03-21 16:44:04 +01:00
Renato Andreola
67c7189dd3 nios2: Added support to YANU UART
Signed-off-by: Scott McNutt <smcnutt@psyent.com>
2010-03-16 16:01:29 -04:00
Thomas Chou
1e67fb32fb nios2: use generic unaligned.h
Signed-off-by: Scott McNutt <smcnutt@psyent.com>
2010-03-16 12:12:48 -04:00
Wolfgang Denk
f1fdc42e5e Merge branch 'master' of git://git.denx.de/u-boot-video 2010-03-14 00:58:30 +01:00
Mike Frysinger
05022629a2 asm-blackfin/unaligned.h: add for zlib code
The new zlib code wants asm/unaligned.h, so have the Blackfin version pull
in the asm-generic/unaligned.h.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-03-14 00:11:16 +01:00
Mike Frysinger
3adc1fda38 asm-generic/unaligned.h: dynamic default unaligned accesses
This is based on the asm-arm/unaligned.h, but made generic so all arches
that cannot do unaligned accesses can utilize it.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-03-14 00:10:09 +01:00
Matthias Weisser
be129aa718 video: Fix console display when splashscreen is used
If a splashscreen is used the console scrolling used the
scroll size as needed when a logo was displayed. This
patch sets the scroll size to the whole screen if
a splashscreen is shown.

Signed-off-by: Matthias Weisser <matthias.weisser@graf-syteco.de>
2010-03-13 16:42:25 +01:00
Wolfgang Denk
93910edb59 Prepare v2010.03-rc1
Coding style cleanup, update CHANGELOG.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-03-12 23:06:04 +01:00
Wolfgang Denk
4e72fb15c9 standalone eepro100_eeprom: fix build error
Building examples/standalone/eepro100_eeprom triggers this error:

In file included from include/common.h:629,
                 from eepro100_eeprom.c:24:
include/net.h: In function 'NetReadIP':
include/net.h:430: warning: implicit declaration of function 'memcpy'
eepro100_eeprom.c: At top level:
eepro100_eeprom.c:81: error: conflicting types for 'memcpy'
include/net.h:430: error: previous implicit declaration of 'memcpy' was here

Fix this.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-03-12 22:56:50 +01:00
Wolfgang Denk
1bb1809558 Update .gitignore's: add some generated files
Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-03-12 22:10:31 +01:00
Detlev Zundel
9c9cbe78dc mpc82xx: Remove SL8245 board and the now orpahned sk98lin network driver.
This code has compile problems and the company does not even exist any
more.  So we take the liberty to drop support for it.

Signed-off-by: Detlev Zundel <dzu@denx.de>
CC: Wolfgang Denk <wd@denx.de>
CC: Ben Warren <biggerbadderben@gmail.com>
2010-03-12 09:49:23 +01:00
Kumar Gala
ca02f6f8dc 85xx: Drop FIT support to allow u-boot image to fit in 512k
The 36-bit build exceeds the 512k size we have.  Removing FIT type image
support allows us to fit and we dont really use it.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-03-12 00:26:32 +01:00
Michael Zaidman
5f8419597f Cosmetic change - indentation correction.
Signed-off-by: Michael Zaidman <michael.zaidman@gmail.com>
2010-03-12 00:19:11 +01:00
Anatolij Gustschin
a693447cea cmd_mtdparts.c: prevent printbuffer overflows
The length of configured MTDPARTS_DEFAULT string
could be greater than console printbuffer size.
Replace printf() by puts() to avoid potential buffer
overflows.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
2010-03-12 00:18:08 +01:00
Frans Meulenbroeks
3920bbedcf Fix MPC8536DS documentation
This patch corrects small mistake in the register list in
doc/README.mpc8536ds. These registers are 32 bits and this one starts
at ....c not ....e

When using the ...c address I can boot from sd, when using the ...e
address I cannot.

Signed-off-by: Frans Meulenbroeks <fransmeulenbroeks@gmail.com>
Acked-by: Hu Mingkai <B21284@freescale.com>
2010-03-12 00:15:55 +01:00
Heiko Schocher
ab68f4dd19 doc: add README for CONFIG_HWCONFIG option
Signed-off-by: Heiko Schocher <hs@denx.de>
2010-03-12 00:09:25 +01:00
Heiko Schocher
7026ead0d3 TQM8xx: enable device tree support on all TQM8xx based boards.
Also enable support for CONFIG_HWCONFIG because we use this for
configuring if this hardware has a FEC or not.

syntax:

hwconfig=fec:on   if hardware has an fec
hwconfig=fec:off  if hardware has no fec

Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-03-12 00:06:07 +01:00
Heiko Schocher
6ed3b9d44c TQM8xx: add device tree support for TQM8xx based boards.
Also use hwconfig to configure whether the board has a FEC or not.
We then can adjust the DTS to tell Linux if there is a FEC present.

syntax:

hwconfig=fec:on   if hardware has a  FEC
hwconfig=fec:off  if hardware has no FEC

Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-03-12 00:04:52 +01:00
Wolfgang Denk
143cd21fe2 Move CONFIG_UPDATE_TFTP code after CONFIG_PREBOOT
The auto-update feature (CONFIG_UPDATE_TFTP) requires that the env
variable serverip be set for the TFTP access. If DHCP is to be used
to get the serverip env variable, this doesn't work as DHCP happens
after the auto-update attempt has run. A solution is to run DHCP in
PREBOOT, but even this is too late.

To solve this, we move update_tftp() below the PREBOOT stuff.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-03-11 23:56:03 +01:00
Mike Frysinger
1b691bb0c2 mkimage: dont force entry point with xip
Some people boot images with the entry point in the middle of the blob
(like Linux with the head code in discardable .init.text), and there is no
no real requirement that the entry point be right after the mkimage header
when doing XIP, so let people specify whatever they want.  If they do need
an entry right after the header, then they still can do that with normal
-e behavior.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-03-11 23:50:06 +01:00
Richard Retanubun
4b99327a41 PPC: Record U-Boot's relocated address in RAM and show in bdinfo.
This patch uses gd->relocaddr variable to store uboot's relocated
address in RAM and shows it in bdinfo command.

This patch moves CONFIG_AMIGAONEG3SE style copying of the address
in board_init_f to just before relocation is actually done.

Signed-off-by: Richard Retanubun <RichardRetanubun@RuggedCom.com>
Tested-by: Detlev Zundel <dzu@denx.de>
2010-03-11 23:49:16 +01:00
Wolfgang Denk
8c4444ff5e Fix memory leak in mmc_read()
There is be a path through mmc_read in drivers/mmc/mmc.c where
malloc'd memory is not freed before exiting mmc_read: it occurs if
mmc_set_blocklen() returns a non-zero value.

Reported-by: Quentin Armitage <Quentin@Armitage.org.uk>
Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-03-11 23:35:43 +01:00
Daniel Gorsulowski
6258b04e9a AT91: Update otc570 board to new SoC access
* convert otc570 board to use c stucture SoC access
* change gpio access to at91_gpio syntax

Signed-off-by: Daniel Gorsulowski <Daniel.Gorsulowski@esd.eu>
2010-03-07 12:36:37 -06:00
Jens Scharsig
7cedb29872 updates the at91 main_clock calculation
* updates the conditional main_clock calculation (if AT91_MAIN_CLOCK defined) to c structure SoC access
 * add need register flags

Signed-off-by: Jens Scharsig <js_at_ng@scharsoft.de>
2010-03-07 12:36:36 -06:00
Prafulla Wadaskar
637833c2d6 arm: kirkwood: suen3: fixed build warning
This patch fixes following build warning

Invalid Kwbimage command Type - valid names are: BOOT_FROM, NAND_ECC_MODE, NAND_PAGE_SIZE, SATA_PIO_MODE, DDR_INIT_DELAY, DATA, , spi, nand, sata, pex, uart

Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
2010-03-07 12:36:36 -06:00
Stefano Babic
e4d3449201 MX51: removed warnings for the mx51evk
The patch removes warnings at compile time and provides
some cleanup code:
- Removed comment on NAND (not yet supported) from lowlevel_init.S
- Removed NFMS bit definition from imx-regs.h
  The bit is only related to MX.25/35 and can lead to confusion
- Moved is_soc_rev() to soc specific code (removed from mx51evk.c)

Signed-off-by: Stefano Babic <sbabic@denx.de>
2010-03-07 12:36:36 -06:00
Vipin Kumar
9d69e33d8d SPEAr : Supporting new mach ids for spear310 and spear320
Supporting new machine ids for SoCs spear310 and spear320

include/asm-arm/mach-types.h has to be updated before applying
this patch for build to work

Signed-off-by: Vipin Kumar <vipin.kumar@st.com>
2010-03-07 12:36:36 -06:00
Heiko Schocher
cc0b53c8d5 arm, suen3: fix compile error, if doing not a local build
Signed-off-by: Heiko Schocher <hs@denx.de>
2010-03-07 12:36:36 -06:00
Heiko Schocher
67fa8c25f5 arm: add support for the suen3 board from keymile
Add support for the ARM part of the mgcoge2, named suen3.
This board is based on the Marvell Kirkwood (88F6281) SoC.
As there come more board variants, common config options
are collected in include/configs/km_arm.h. Also, this board
use common code for all keymile boards, which is stored in
board/keymile/common/common.c

Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Heiko Schocher <hs@denx.de>
2010-03-07 12:36:36 -06:00
John Rigby
6895d4510a Add support for KARO TX25 board
This is an i.MX25 base board with only NAND
so it uses nand_spl to boot.

Signed-off-by: John Rigby <jcrigby@gmail.com>

Tune configuration, add support for (redundant) environment in NAND.
Signed-off-by: Wolfgang Denk <wd@denx.de>

Acked-by: Wolfgang Denk <wd@denx.de>
CC: Fred Fan <fanyefeng@gmail.com>
CC: Tom <Tom.Rix@windriver.com>
2010-03-07 12:36:36 -06:00
John Rigby
740d6ae5b9 fec_mxc: add MX25 support
Use RMII for MX25
Add code to init gasket that enables RMII

Signed-off-by: John Rigby <jcrigby@gmail.com>
CC: Ben Warren <biggerbadderben@gmail.com>
2010-03-07 12:36:36 -06:00
John Rigby
cb17b92de0 fec_mxc: cleanup and factor out MX27 dependencies
general cleanup
move clock init to cpu_eth_init in cpu/arm926ejs/mx27/generic.c
make MX27 specific phy init conditional on CONFIG_MX27
replace call to imx_get_ahbclk with one to imx_get_fecclk
and define imx_get_fecclk in include/asm-arm/arch-mx27/clock.h

Signed-off-by: John Rigby <jcrigby@gmail.com>
CC: Ben Warren <biggerbadderben@gmail.com>
CC: Fred Fan <fanyefeng@gmail.com>
CC: Tom <Tom.Rix@windriver.com>
2010-03-07 12:36:36 -06:00
John Rigby
552ff8f1d9 Add support for Freescale MX25 SOC
ARM926EJS core with MX31 peripherals.

Signed-off-by: John Rigby <jcrigby@gmail.com>
Earlier Version Signed-off-by: Wolfgang Denk <wd@denx.de>
CC: Fred Fan <fanyefeng@gmail.com>
CC: Tom <Tom.Rix@windriver.com>
2010-03-07 12:36:36 -06:00
John Rigby
e911c983f4 mxc_serial replace platform specific clock
remove ifdef'd clock selection code from
serial_mxc.c and replace with call to imx_get_uartclk

Add definitions for imx_get_uartclk to imx31 and imx27
include files.

This makes it easier to add new imx platforms.

Signed-off-by: John Rigby <jcrigby@gmail.com>
2010-03-07 12:36:36 -06:00
Stefano Babic
c5fb70c911 Add initial support for Freescale mx51evk board
The patch adds initial support for the Freescale mx51evk board.
Network (FEC) and SD controller (fsl_esdhc) are supported.

Signed-off-by: Stefano Babic <sbabic@denx.de>
Signed-off-by: Fred Fan <fanyefeng@gmail.com>
2010-03-07 12:36:36 -06:00
Stefano Babic
c67bee1460 fsl_esdhc: add support for mx51 processor
The esdhc controller in the mx51 processor is quite
the same as the one in some powerpc processors
(MPC83xx, MPC85xx). This patches adapts the driver
to support the arm mx51.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2010-03-07 12:36:36 -06:00
Stefano Babic
69df00f9d9 ARM: add accessors functions
Some Freescale's processors of different architecture
have the same peripheral (eSDHC controller in PowerPC
and i.MX51). This patch adds accessors for
the internal registers of the SOCs, as already
implemented in the PowerPC architecture.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2010-03-07 12:36:36 -06:00
Stefano Babic
11fdade294 MMC: add weak function to detect MMC/SD card
Most controllers can check if there is a card in the slot.
However, they require pins that could be not available because
required by other functions and the detection of a card must
be performed in another way. This patch adds a weak function
that a board can implement to add its internal custom way
to check the presence of a MMC/SD card.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2010-03-07 12:36:36 -06:00
Stefano Babic
250de12bc2 mmc: check correctness of the voltage mask in ocr
Most cards do not answer if some reserved bits
in the ocr are set. However, some controllers
can set bit 7 (reserved for low voltages), but
how to manage low voltages SD card is not yet
specified.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2010-03-07 12:36:36 -06:00
Stefano Babic
71d64c0e4f serial_mxc: add support for MX51 processor
The patch adds support for the Freescale mx51 processor.

Signed-off-by: Stefano Babic <sbabic@denx.de>
Signed-off-by: Fred Fan <fanyefeng@gmail.com>
2010-03-07 12:36:35 -06:00
Stefano Babic
67adcee0e0 MX51: Add pin and multiplexer definitions.
The patch add header files to support the pin multiplexer
of the the Freescale i.MX51 processor.

Signed-off-by: Stefano Babic <sbabic@denx.de>
Signed-off-by: Fred Fan <fanyefeng@gmail.com>
2010-03-07 12:36:35 -06:00
Stefano Babic
fb87a1ed92 MX51: Add register definitions
The patch add header files to support the Freescale i.MX51
processor, setting definitions for internal registers.

Signed-off-by: Stefano Babic <sbabic@denx.de>
Signed-off-by: Fred Fan <fanyefeng@gmail.com>
2010-03-07 12:36:35 -06:00
Stefano Babic
64fdf452a8 MX51: Add initial support for the Freescale MX51
The patch add initial support for the Freescale i.MX51 processor
(family arm cortex_a8).

Signed-off-by: Stefano Babic <sbabic@denx.de>
Signed-off-by: Fred Fan <fanyefeng@gmail.com>
2010-03-07 12:36:35 -06:00
Matthias Kaehlcke
18ba012b9b edb93xx: Fix SDRAM initialization
edb93xx: Fix SDRAM initialization by issuing a precharge all command before
forcing the precharge and select mode register update mode before programming
the mode registers. Write to the SDRAM banks in order to force a precharge,
reading causes the edb93xx boards to hang

Signed-off-by: Matthias Kaehlcke <matthias@kaehlcke.net>
2010-03-07 12:36:35 -06:00
Anders Darander
cade7d9577 Add bootcount to AT91
Use AT91_GPBR 3 as a bootcount register.
The bootmagic and the bootcount shares AT91_GPBR 3.

Signed-off-by: Anders Darander <ad@datarespons.se>
2010-03-07 12:36:35 -06:00
Tom Rix
5f35348409 ARM Update mach-types
Fetched from http://www.arm.linux.org.uk/developer/machines/download.php
And built with

repo http://ftp.arm.linux.org.uk/pub/linux/arm/kernel/git-cur/linux-2.6-arm
commit aea187c46f7d03ce985e55eb1398d0776a15b928

Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
2010-03-07 12:36:35 -06:00
Matthias Kaehlcke
c7ad13a242 ep93xx: Refactoring of timer code
ep93xx: Refactoring of the timer code, including the following changes

 * use a free running timer instead of a periodical one
 * use unsigned long long for total number of ticks
 * hold the timer state in a structure instead of separate variables
 * increment the timer counter instead of decrementing it
 * remove unused function udelay_masked()
 * remove unused function set_timer()

Signed-off-by: Matthias Kaehlcke <matthias@kaehlcke.net>
2010-03-07 12:36:35 -06:00
Matthias Kaehlcke
d9f505e3cd ep93xx: Fix calculation of sys ticks in clk_to_systicks()
ep93xx: Use unsigned long long for calculation of sys ticks in clk_to_systicks()
for proper handling of large intermediate values

Signed-off-by: Matthias Kaehlcke <matthias@kaehlcke.net>
2010-03-07 12:36:35 -06:00
Siarhei Siamashka
041d42e789 OMAP3: workaround for ARM Cortex-A8 erratum 725233
725233: PLD instructions executed with PLD data forwarding
enabled can result in a processor deadlock

This deadlock can happen when NEON load instructions are used together
with cache preload instructions (PLD). The problematic conditions
can be triggered in-the-wild by NEON optimized functions from pixman
library (http://cgit.freedesktop.org/pixman), which perform dynamic
adjustment of prefetch distance.

The workaround disables PLD data forwarding by setting PLD_FWD bit
in L2 Cache Auxiliary Control Register as recommended in ARM Cortex-A8
errata list.

The deadlock can only happen on r1pX revisions of Cortex-A8 (used in
OMAP34xx/OMAP35xx). Performance impact of the workaround is practically
non-existant.

Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2010-03-07 12:36:35 -06:00
Achim Ehrlich
7c966a8bdf ARM change name of defines for AT91 arm926ejs
Configuration defines should be preceeded with CONFIG_SYS_. Renamed
some at91 specific defines to conform to this naming convention:

AT91_CPU_NAME to CONFIG_SYS_AT91_CPU_NAME
AT91_MAIN_CLOCK to CONFIG_SYS_AT91_MAIN_CLOCK

Signed-off-by: Achim Ehrlich <aehrlich@taskit.de>
2010-03-07 12:36:35 -06:00
Ladislav Michl
5c97a1de19 VoiceBlue: fix linker errors
linking eeprom with libgeneric.a is not really needed and causes following
error:
../../lib_generic/libgeneric.a(string.o): In function `strcmp':
/home/ladis/src/u-boot-ti/lib_generic/string.c:152: multiple definition of `strcmp'
../../examples/standalone/libstubs.a(stubs.o):include/_exports.h:24: first defined here
make[1]: *** [eeprom.srec] Error 1

Fix undefined reference to memset generated by some versions of gcc
to zero out initialized structure on the stack:
eeprom.o: In function `eeprom':
board/voiceblue/eeprom.c:152: undefined reference to `memset'
make[1]: *** [eeprom] Error 1

Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2010-03-07 12:36:35 -06:00
Ladislav Michl
a32c1e0ecd VoiceBlue: limit line lenght to 80 characters
Reindent configuration header to limit line lenght to 80 characters by
removing obvious and sometimes misleading comments.

Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2010-03-07 12:36:35 -06:00
Ladislav Michl
779b534385 netstar.h: do not exceed 80 columns
Limit line length to 80 characters mostly by removing obvious and sometimes
misleading comments. Fix indentation, too.

Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2010-03-07 12:36:35 -06:00
Sandeep Paulraj
3fca29294a DaVinci: Adding entry to MAKEALL for DM365 EVM
The patch adds an entry for the DM365 EVM to MAKEALL

Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2010-03-07 12:36:35 -06:00
Nick Thompson
37cffdad06 da830evm: Add support for TI EMAC
Adds support for ethernet networking on the da830evm platform.

This platform uses an SoC EMAC interface and a 3 port ethernet
switch as a PHY with an RMII interface. The PHY also has a i2c
interface for configuring the switch functions.

Signed-off-by: Nick Thompson <nick.thompson@ge.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2010-03-07 12:36:35 -06:00
Ladislav Michl
d8775d03f3 NetStar: make mtdparts default ready for recent kernels
Recent kernels are using generic NAND and NOR drivers. Change
default mtdparts to reflect it.

Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2010-03-07 12:36:34 -06:00
Ladislav Michl
de9a1e0d08 NetStar: fix default environment
Correct switching partitions after upgrade and make it more readable.

Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2010-03-07 12:36:34 -06:00
Ladislav Michl
3a67566c1d NetStar: eeprom - fix linker error
linking eeprom with libgeneric.a is not really needed and causes following
error:
../../lib_generic/libgeneric.a(string.o): In function `strcmp':
lib_generic/string.c:152: multiple definition of `strcmp'
../../examples/standalone/libstubs.a(stubs.o):include/_exports.h:24: first defined here
Remove eeprom linker script as well and generate entry point object
(to start application by jumping on its beginning) on the fly.
Out-of-tree build tested as well.

Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2010-03-07 12:36:34 -06:00
Ladislav Michl
308d463eaf NetStar: eeprom - be less verbose
Use shorter yet descriptive messages, replace printf() with
puts() where appropriate. This saves few bytes.

Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2010-03-07 12:36:34 -06:00
Ladislav Michl
b29ff62772 NetStar: eeprom - undefined reference to `memset'
Defining partially initialized struct eth_device on stack means
gcc has to zero out it, and some gcc versions optimize this with
an implicit call to memset. Move definition to data section
to avoid that (it has also nice side effect that we need not
to pass it to helper functions anymore)

Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2010-03-07 12:36:34 -06:00
Wolfgang Denk
ef8d008730 Merge branch 'master' of git://git.denx.de/u-boot-cfi-flash 2010-03-04 21:30:01 +01:00
Wolfgang Denk
b003bf79e3 Merge branch 'master' of git://git.denx.de/u-boot-ppc4xx 2010-03-04 21:28:46 +01:00
Wolfgang Denk
96dd0a4cbf Merge branch 'next' of git://git.denx.de/u-boot-coldfire 2010-03-04 21:24:44 +01:00
Wolfgang Denk
a43af0f223 Merge branch 'master' of git://git.denx.de/u-boot-sh 2010-03-04 21:11:55 +01:00
Wolfgang Denk
fafe2a9e23 Merge branch 'master' of git://git.denx.de/u-boot-mpc83xx 2010-03-04 21:09:02 +01:00
Wolfgang Wegner
8f9a221045 ] fix monitor protection for CONFIG_MONITOR_IS_IN_RAM
For platforms with flash below ram addresses, the current check to
activate monitor protection is wrong/insufficient. This patch fixes
CONFIG_MONITOR_IS_IN_RAM for these systems by adding a check for
this configuration.

Signed-off-by: Wolfgang Wegner <w.wegner@astro-kom.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2010-03-04 10:07:12 +01:00
Wolfgang Wegner
c7de810c79 allow MCF532x to use CONFIG_MONITOR_IS_IN_RAM
CONFIG_MONITOR_IS_IN_RAM is broken for MCF532x. This patch fixes this
 by conditionally
- removing the vector table at the beginning of code
- not overwriting the vector base register
- removing the code to re-set the PLL, which effectively disables
  SDRAM access

Signed-off-by: Wolfgang Wegner <w.wegner@astro-kom.de>
2010-03-04 01:46:53 -06:00
Richard Retanubun
bb907ab51f MCF5271-only: Added a weak board_reset function to allow custom reset
This patch adds a board_reset function to allow boards to specify
their own custom reset sequence (e.g. resetting by timing out watchdog).
Tested only on MCF5271, can be expanded if needed.

Based on Mike Frysinger's suggestion on:
http://article.gmane.org/gmane.comp.boot-loaders.u-boot/70304

Signed-off-by: Richard Retanubun <RichardRetanubun at RuggedCom.com>
2010-03-04 01:46:49 -06:00
Wolfgang Wegner
992d712950 MCF532x: make icache_enable use CONFIG_SYS_SDRAM_SIZE
in cpu/mcf532x/start.S, the function icache_enable enables the cache for
a fixed 32MB region starting at the SDRAM start address; this patch
changes the function to cover the region defined by CONFIG_SYS_SDRAM_SIZE

Signed-off-by: Wolfgang Wegner <w.wegner at astro-kom.de>
2010-03-04 01:46:21 -06:00
Wolfgang Wegner
870bf3ee60 add include/asm-m68k/unaligned.h
lib_generic/zlib.c needs include/asm/unaligned.h since commit
cd514aeb99, which broke compilation for
Coldfire/M68K. This patch adds the missing header for these
architectures.

Signed-off-by: Wolfgang Wegner <w.wegner at astro-kom.de>
2010-03-04 01:45:38 -06:00
Nobuhiro Iwamatsu
da5e083590 sh: Add asm/unaligned.h and asm/unaligned-sh4a.h from Linux kernel
zlib.c demands asm/unaligned.h. But, SH does not have these.
This commit add asm/unaligned.h and asm/unaligned-sh4a.h from Linux
kernel and modifyf for u-boot.

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2010-03-03 12:21:14 +09:00
Kim Phillips
fe389da6ae mpc83xx: fix out-of-tree mpc8315 nand build
commit 2e95004deb "mpc83xx: Add NAND boot support
for MPC8315E-RDB boards" symlinked nand_spl/board/freescale/mpc8315erdb to
mpc8313erdb in order to not duplicate code.

Since the main makefile builds nand_spl/board/$(BOARDDIR) (which makes sense),
and the board Makefile and linker script are the only two necessary files
to enable out-of-tree building, and other boards have duplicated nand makefiles
(e.g. 8536ds & 8569mds), it only seems prudent to copy these two files in the
name of the 8315 too.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Cc: Anton Vorontsov <avorontsov@ru.mvista.com>
Cc: Wolfgang Denk <wd@denx.de>
2010-03-02 11:24:40 -06:00
Kim Phillips
4e7e12dfa1 mpc83xx: vme8349: fix incorrect BR0_PRELIM port size comment
commit 98d92d8c9f "sbc8349: fix incorrect
comment" missed this one.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2010-03-02 11:24:35 -06:00
Eugene O'Brien
87800f7241 ppc4xx: Corrected EBC register bit definitions
Corrected the bit field positions of the external master priority low
and the external master priority high values in the EBC configuration
register. These bit field positions differ between PPC405 and PPC440
processors

Signed-off-by: Eugene O'Brien <eugene.obrien@advantechamt.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2010-03-02 14:12:52 +01:00
Frans Meulenbroeks
f3651764e5 cmd_itest.c: fix pointer dereferencing
fix pointer dereferencing
if the size is .b and .w an 8 or 16 bit access is done.

Signed-off-by: Frans Meulenbroeks <fransmeulenbroeks@gmail.com>
Acked-by: Detlev Zundel <dzu@denx.de>
2010-02-24 00:09:45 +01:00
Kim Phillips
0ad22703f0 tools: fix imximage warning
Fix build warning:

Configuring for MPC837XEMDS board...
imximage.c: In function `imximage_parse_cfg_file':
imximage.c:146: warning: passing argument 2 of `getline' from incompatible pointer type
/usr/include/bits/stdio.h:116: note: expected `size_t *' but argument is of type `uint32_t *'

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2010-02-24 00:06:18 +01:00
Stefano Babic
5b28e913f4 mkimage: SEGFAULT with imximage on 64 bit systems
Running mkimage to generate an imximage produces a SEGFAULT
on 64 bit machines due to pointer arithmetic limited to 32 bit.

Signed-off-by: Stefano Babic <sbabic@denx.de>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
2010-02-24 00:04:03 +01:00
Kim Phillips
ecd1a09b81 mpc83xx: remove hardcoded network addresses from config files
and avoid e.g., two identical boards from causing random networking
conflicts when hooked up to the same network.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2010-02-22 16:48:06 -06:00
Michael Zaidman
4c006dd150 Bug: do_reset issued via netconsole does not reset mpc83xx cpu.
The do_reset routine in the cpu/mpc83xx/cpu.c file does not reset
the mpc83xx cpu when issued via netconsole.

Moving the console output "resetting the board." to the beginning of
the routine before disabling interrupts solved the problem.

Signed-off-by: Michael Zaidman <michael.zaidman@gmail.com>
Acked-by: Detlev Zundel <dzu@denx.de>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2010-02-18 18:25:09 -06:00
Jens Scharsig
77e7273c40 new board (eb_cpux9k2)
* new board (eb_cpux9k2)
 * support for EB+CPUx9K2 board by BuS Elektronik GmbH & Co. KG
 * select via make eb_cpux9k2_config
 * this also demonstrates, how to use boards with AT91RM9200 cpu
   in at91 arch tree

Signed-off-by: Jens Scharsig <js_at_ng@scharsoft.de>
2010-02-12 12:36:04 -06:00
Jens Scharsig
6799a80f76 new at91_emac network driver (NET_MULTI api)
* add's at91_emac (AT91RM9200) network driver (NET_MULTI api)
 * enable driver with CONFIG_DRIVER_AT91EMAC
 * generic PHY initialization
 * modify AT91RM9200 boards to use NET_MULTI driver
 * the drivers has been tested with LXT971 Phy and DM9161 Phy at MII and RMII
   interface

Signed-off-by: Jens Scharsig <js_at_ng@scharsoft.de>
2010-02-12 12:36:04 -06:00
Jens Scharsig
98250e8e17 prepare joining at91rm9200 into at91
* prepare joining at91 and at91rm9200
 * add modified copy of soc files to cpu/arm920t/at91 to make
   possible to compile at91rm9200 boards in at91 tree instead
   of at91rm9200
 * add header files with c structure defs for AT91 MC, ST and TC
 * the new cpu files are using at91 c structure soc access
 * please read README.soc-at91 for details

Signed-off-by: Jens Scharsig <js_at_ng@scharsoft.de>
2010-02-12 12:31:55 -06:00
Jens Scharsig
1b34f00c28 update at91sam9263ek board to new SoC access
* convert at91sam9263ek board to use c stucture SoC access
 * change gpio access to at91_gpio syntax

Signed-off-by: Jens Scharsig <js_at_ng@scharsoft.de>
2010-02-12 12:31:55 -06:00
Jens Scharsig
0cf0b93161 convert common files to new SoC access
* add's a warning to all files, which need update to new SoC access
 * convert common files in cpu/../at91 and a lot of drivers to use
   c stucture SoC access

Signed-off-by: Jens Scharsig <js_at_ng@scharsoft.de>
2010-02-12 12:31:55 -06:00
Jens Scharsig
7f9e8633ac convert all at91 files to use at91_gpio driver syntax
* convert all files cpu/../at91 to use at91_gpio driver syntax
 * change AT91_PINP([A-F])(\d+) to AT91_PIO_PORT\1, \2
   this makes all 160 AT91_PINPxxx defines obsolete
 * AT91_PINPxxx defines and gpio.h can be remove, if all boards converted to new SoC access

Signed-off-by: Jens Scharsig <js_at_ng@scharsoft.de>
2010-02-12 12:31:54 -06:00
Jens Scharsig
ea8fbba731 add a new AT91 GPIO driver
* add a real AT91 GPIO driver instead of header inline code
* resolve the mixing of port and pins
* change board config files to use new driver
* add macros to gpio to realize backward compatibility

Signed-off-by: Jens Scharsig <js_at_ng@scharsoft.de>
2010-02-12 12:31:54 -06:00
Jens Scharsig
5d8e359c38 add c structures for SoC access
* add's c structures for SoC access to pheriperials head files

Signed-off-by: Jens Scharsig <js_at_ng@scharsoft.de>
2010-02-12 12:31:54 -06:00
Jens Scharsig
425de62d40 add new CONFIG_AT91_LEGACY
* add's the new temporary CONFIG_AT91_LEGACY to all board configs
 This will need for backward compatiblity, while change the SoC access
 to c structures. If CONFIG_AT91_LEGACY is defined, the deprecated
 SoC is used.

Signed-off-by: Jens Scharsig <js_at_ng@scharsoft.de>
2010-02-12 12:31:54 -06:00
Nick Thompson
3a4e43921d DA830 EVM: Enable NAND support on Spectrum Digital EVM
The EVM UI extender card has a NAND device. This change will enable
saveenv to work with NAND and Linux to be booted using:

	mtdparts default
	nboot kernel
	bootm

Signed-off-by: Nick Thompson <nick.thompson@ge.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2010-02-12 12:31:54 -06:00
Nick Thompson
6228e6389e Davinci: Add EMIF-A macros for setting chip select parameters
The patch adds EMIF-A macros for setting chip select parameters

Signed-off-by: Nick Thompson <nick.thompson@ge.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2010-02-12 12:31:54 -06:00
Sanjeev Premi
b74064a0e2 OMAP3: Avoid re-write to PRM_CLKSRC_CTRL
In function get_osc_clk_speed(), do not change/ update
the divider for SYS_CLK as it can has cascading effect
on the other derived clocks.

Sudden change in divider value can lead to inconsistent
behavior in the system - often leading to crashes.

The problem was found when working with OMAP3EVM using
DM3730 processor card.

The patch has been tested with OMAP3530 on OMAP3EVM as
well

Signed-off-by: Sanjeev Premi <premi@ti.com>
Signed-off-by: Hiremath Vaibhav <hvaibhav@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2010-02-12 12:31:54 -06:00
Magnus Lilja
eff536befd SPI: Fix 32 bit transfers in mxc_spi.c
Commit f9b6a1575d,  "i.MX31: fix SPI
driver for shorter than 32 bit" broke 32 bit transfers. This patch
makes single 32 bit transfer work again.

Transfer lengths that are known not to work will abort and print
an error message.

Tested on i.MX31 Litekit and i.MX31 PDK using 32 bit transfers to
the MC13783/ATLAS chip (using the 'date' command).

Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
2010-02-12 12:31:54 -06:00
Alessandro Rubini
39a9142203 edb93xx: enable the uart in devicecfg register
printf goes to uart1, but it will block forever waiting for
busy to go off unless the uart is enabled first.

Signed-off-by: Alessandro Rubini <rubini@gnudd.com>
2010-02-12 12:31:54 -06:00
Alessandro Rubini
822bd70db4 edb93xx: change calculation un early_udelay.h
Previous code compiled with gcc-4.2.2 makes a call to
__aeabi_uidiv to divide by 20. As a side effect it was
not inline any more, and so sdram_cfg used the stack
as well, but this is early code that has no stack yet.
The patch explicitly removes the division, so no stack is used.

The calculation of the counter calls a division by 20

Signed-off-by: Alessandro Rubini <rubini@gnudd.com>
2010-02-12 12:31:54 -06:00
Alessandro Rubini
c50a0f5039 EP93xx: fix syscon_regs definition
The structure was missing a reserved entry (not listed in the manual,
actually), so the last registers had a wrong offset. This prevented
all swlocked registers to be modified as swlock is last in the structure.

Signed-off-by: Alessandro Rubini <rubini@gnudd.com>
2010-02-12 12:31:54 -06:00
Matthias Kaehlcke
fcfb632bd1 ARM: Add support for EP93xx SoCs
Add support for the Cirrus EP93xx platform

Signed-off-by: Matthias Kaehlcke <matthias@kaehlcke.net>
Acked-by: Tom <Tom.Rix@windriver.com>
2010-02-12 12:31:54 -06:00
Matthias Kaehlcke
cf3c142ee4 Add support for EDB93xx boards
Added support for the following EDB93xx boards:

EDB9301
EDB9302
EDB9302A
EDB9307
EDB9307A
EDB93012
EDB9315
EDB9315A

Signed-off-by: Matthias Kaehlcke <matthias@kaehlcke.net>
2010-02-12 12:31:54 -06:00
Ladislav Michl
d798e27b14 NetStar: Remove debug junk leaked into eeprom utility
This patch removes debug junk leaked into eeprom utility.

Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2010-02-12 12:31:54 -06:00
Ladislav Michl
89e94d81ed NetStar: make crcit utility more readable
This patch makes the crcit utility more readable

Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2010-02-12 12:31:54 -06:00
Ladislav Michl
3843e7dc93 NetStar: Disable CONFIG_CMD_JFFS2
This patch removes "CONFIG_CMD_JFFS" from the board config

Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2010-02-12 12:31:54 -06:00
Tom Rix
632e1d9014 OMAP3 Move declaration of gpmc_cfg.
Every omap3 board config file declared the global variable gpmc_cfg.
This changes moves the declaration to a better location in the
arch dependent header file cpu.h.

Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2010-02-12 12:31:53 -06:00
Scott Ellis
093d6018cf Overo GPMC registers
Use appropriate GPMC timings for the LAN9221 controller on the
Gumstix Overo expansion boards not the values in arch-omap3/mem.h
which are for a different ethernet controller.

Signed-off-by: Scott Ellis <scott@jumpnowtek.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2010-02-12 12:31:53 -06:00
Nick Thompson
63a47dfd07 da830evm: Use table driven pin mux configuration
Tidyup the pin muxer configuration using the Davinci table driven
pinmux configuration function and data tables.

Signed-off-by: Nick Thompson <nick.thompson@ge.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2010-02-12 12:31:53 -06:00
Sekhar Nori
8ed5885693 TI DaVinci: Driver for the davinci SPI controller
This adds a driver for the SPI controller found on davinci
based SoCs from Texas Instruments.

Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2010-02-12 12:31:53 -06:00
Daniel Gorsulowski
44d8025622 at91: Add esd gmbh OTC570 board support
This patch adds support for esd gmbh OTC570 board.
The OTC570 is based on an Atmel AT91SAM9263 SoC.

Signed-off-by: Daniel Gorsulowski <Daniel.Gorsulowski@esd.eu>
2010-02-12 12:31:53 -06:00
Wolfgang Denk
0b692dcb19 Merge branch 'master' of git://git.denx.de/u-boot-net 2010-02-08 22:09:24 +01:00
Mike Frysinger
e39bf1e2a9 kgdb: cpu/mpc* cpu/74xx: include kgdb.h when needed
Commit cbb0cab1d9 broke some platforms which used kgdb code but
didn't actually include kgdb.h.  So include kgdb.h in all the relevant
traps code.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-02-08 22:05:42 +01:00
Stefan Roese
ab5a0dcb9c net: Use 0.5 sec timeout in miiphy_reset() instead of counting loop
This patch fixes a problem I've notived on a buggy PPC4xx system. This
system has problems with the PHY MDIO communication and seemed to be
stuck/crashed in miiphy_reset(). But degugging revealed, that the CPU
didn't crash, but "only" hung in this counting loop for about 2 minutes.

This patch now uses a real timeout of 0.5 seconds (as mentioned in the
comment in miiphy_reset).

Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2010-02-06 22:52:21 -08:00
Stefano Babic
4294b2485b fec_mxc: add support for MX51 processor
The patch add support for the Freescale mx51 processor
to the FEC ethernet driver.

Signed-off-by: Stefano Babic <sbabic@denx.de>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2010-02-06 22:52:18 -08:00
Siddarth Gore
e66b19ce6d NET: kirkwood-egiga smi access fix
Although the datasheet mentions seperate smi registers for each
port, using Port 1 smi register to access ethernet phys does not
work. Hence only Port 0 smi register should be used to access all
devices connected to the smi bus. This behavior is consistant with
the mv643xx driver in the linux kernel.

Signed-off-by: Siddarth Gore <gores@marvell.com>
Acked-by: Prafulla Wadaskar <prafulla@marvell.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2010-02-06 22:52:14 -08:00
Ladislav Michl
a1b322a983 ns16550: kick watchdog while waiting for a character
ns16550 busyloops waiting for incoming byte causing watchdog to reboot
while waiting for a key press. A call to WATCHDOG_RESET in NS16550_getc
loop fixes it.

Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
2010-02-03 22:46:58 +01:00
Remy Bohmer
84d36b3018 USB: usb_control_msg wait for driver ISR to set status.
This patch changes usb_control_msg back to the state prior to commit
4886720844.

The USB driver ISR routine may update the status.

Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
2010-02-03 22:06:59 +01:00
Prathap Srinivas
6e20e64f5c musb: Add host support for DM365 EVM
Add support for musb host on DM365 EVM.

Signed-off-by: Prathap Srinivas <msprathap@ti.com>
2010-02-03 22:06:59 +01:00
Cliff Cai
ec2aadb408 usb: musb: fix Blackfin DMA register padding
The conversion from offsets to C structs lost a little padding in the DMA
register map.  Accessing endpoints other than ep0 with DMA would fail as
the addresses wouldn't be adjusted correctly.

Signed-off-by: Cliff Cai <cliff.cai@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-02-03 22:06:59 +01:00
Wolfgang Denk
111d6c6ad1 Merge branch 'master' of git://git.denx.de/u-boot-ppc4xx 2010-02-03 20:22:10 +01:00
Wolfgang Denk
08254a1a97 Merge branch 'master' of git://git.denx.de/u-boot-cfi-flash 2010-02-03 20:15:46 +01:00
Wolfgang Denk
05c2f4fe29 Merge branch 'master' of git://git.denx.de/u-boot-net 2010-02-03 20:10:20 +01:00
Wolfgang Denk
5c1a1a3069 Merge branch 'master' of git://git.denx.de/u-boot-nand-flash 2010-02-03 20:05:27 +01:00
Wolfgang Denk
0ae016f1ff Merge branch 'master' of git://git.denx.de/u-boot-video 2010-02-03 20:03:46 +01:00
Wolfgang Denk
d0750bc9e5 EXBITGEN: drop support for unmaintained board
The EXBITGEN board has not been maintained for a long time; it has
build problems, but no hardware is available any more for testing.

Drop support for this board.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Acked-by: Stefan Roese <sr@denx.de>
2010-02-03 20:01:16 +01:00
Wolfgang Denk
9461a939ca mpc5xxx/cpu_init.c: fix warning: unused variable 'cdm'
Signed-off-by: Wolfgang Denk <wd@denx.de>
Acked-by: Detlev Zundel <dzu@denx.de>
2010-02-03 20:01:05 +01:00
Wolfgang Denk
13d8bfe26c mpc5xxx/cpu_init.c: fix warning: unused variable 'gpt0'
Signed-off-by: Wolfgang Denk <wd@denx.de>
Acked-by: Detlev Zundel <dzu@denx.de>
2010-02-03 20:00:14 +01:00
Matthias Fuchs
4710cee1b5 ppc4xx: Remove unused feature from AR405 board
This patch fixes building for AR405 boards by remove an unused feature.

Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
Signed-off-by: Stefan Roese <sr@denx.de>
2010-02-03 09:17:56 +01:00
Matthias Fuchs
976c21ad8e ppc4xx: Fix building for PLU405 boards
The init_coupler() function from board/esd/plu405/plu405.c
got lost somehow! This patch readds it.

Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
Signed-off-by: Stefan Roese <sr@denx.de>
2010-02-03 09:17:44 +01:00
Matthias Fuchs
59c1db6dab ppc4xx: Fix building of PMC440 board
Remove some unused features and default environment variable
to shrink the PMC440 u-boot.

Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
Signed-off-by: Stefan Roese <sr@denx.de>
2010-02-03 09:17:40 +01:00
Stefan Roese
6f6c26e430 ppc4xx: Fix compilation error on ML2 board
Recently this compilation error occurs:

Configuring for ML2 board...
traps.c: In function 'MachineCheckException':
traps.c:159: error: 'debugger_exception_handler' undeclared (first use
	in this function)
traps.c:159: error: (Each undeclared identifier is reported only once
traps.c:159: error: for each function it appears in.)

This patch now fixes it by including kgdb.h

Signed-off-by: Stefan Roese <sr@denx.de>
2010-02-03 09:17:00 +01:00
Ladislav Michl
f3dec798d9 CFI: fix eraseregions numblocks
eraseregions numblocks was sometimes one less than actual, possibly producing
erase regions with zero blocks. As MTD code touches eraseregions only if
numeraseregions is greater that zero, allocate eraseregions only for non
uniform erase size flash.

Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Signed-off-by: Stefan Roese <sr@denx.de>
2010-02-02 08:22:00 +01:00
Jens Scharsig
c041e9d212 new at91_emac network driver (NET_MULTI api)
* add's at91_emac (AT91RM9200) network driver (NET_MULTI api)
* enable driver with CONFIG_DRIVER_AT91EMAC
* generic PHY initialization
* modify AT91RM9200 boards to use NET_MULTI driver
* the drivers has been tested with LXT971 Phy and DM9161 Phy at
  MII and RMII interface

Signed-off-by: Jens Scharsig <js_at_ng@scharsoft.de>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2010-01-31 22:37:12 -08:00
Matthias Kaehlcke
594d57d0cc Add EP93xx ethernet driver
Added ethernet driver for EP93xx SoCs

Signed-off-by: Matthias Kaehlcke <matthias@kaehlcke.net>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2010-01-31 22:37:12 -08:00
Heiko Schocher
582c55a027 83xx, uec: split enet_interface in two variables
There's no sensible reason to unite speed and interface type into
one variable.  So split this variable enet_interface into two
vars: enet_interface_type, which hold the interface type and speed.

Also: add the possibility for switching between 10 and 100 MBit
interfaces on the fly, when running in FAST_ETH mode.

Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2010-01-31 22:37:12 -08:00
Nick Thompson
d7e354374c TI: DaVinci: Updating EMAC driver for DM365, DM646x and DA8XX
The EMAC IP on DM365, DM646x and DA830 is slightly different
from that on DM644x. This change updates the DaVinci EMAC driver
so that EMAC becomes operational on SOCs with EMAC v2.

Signed-off-by: Nick Thompson <nick.thompson@ge.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2010-01-31 22:37:12 -08:00
Semih Hazar
0f751d6ef3 macb: Fix mii_phy_read and mii_phy_write functions
Enabling CONFIG_CMD_MII in AVR32 boards was not possible due to
compile errors.

This patch fixes miiphy_read and miiphy_write functions and
registers them properly.

Signed-off-by: Semih Hazar <semih.hazar@indefia.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2010-01-31 22:37:12 -08:00
Peter Tyser
5f6b144221 tsec: Add TSEC_FIBER flag
The TSEC_FIBER flag should be set when a PHY is operating with an
external fiber interface.  Currently it is only used to notify a user
that the PHY is operating in fiber mode.

A short description was also added to the other TSEC flag defines so
that it is clear how they differ from one another.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2010-01-31 22:34:34 -08:00
Peter Tyser
8abb8dcc8d tsec: Add support for using the BCM5482 PHY in fiber mode
The BCM5482 PHY supports both copper and fiber as an ethernet medium.
By enabling its copper/fiber mode auto-detection feature it can
dynamically determine if it should be configured for copper or fiber.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2010-01-31 22:34:34 -08:00
Peter Tyser
c6dbdfda53 tsec: General cleanup
- Cleanup formatting of phy_info structures

- Fix lines > 80 chars

- Fix some random indentation inconsistencies

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2010-01-31 22:34:34 -08:00
Peter Tyser
e1957ef02c tsec: Make functions/data static when possible
This is generally good practice and saves ~150 bytes.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2010-01-31 22:34:34 -08:00
Peter Tyser
27165b5c32 tsec: Clean up Broadcom PHY status parsing
- Remove unnecessary printing "Enet starting in <speed>/<duplex>"
    This same information is already printed during normal ethernet
    operation in the form "Speed: 1000, full duplex".

- Add a check for link before determining link speed and duplex
    If there is no link, speed/duplex don't matter.  This also removes
    the annoying and unneeded "Auto-neg error, defaulting to 10BT/HD"
    message that occurs when no link is detected.

- Whitespace and line > 80 characters cleanup

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2010-01-31 22:34:34 -08:00
Peter Tyser
46e91674fb tsec: Force TBI PHY to 1000Mbps full duplex in SGMII mode
In SGMII mode the link between a processor's internal TBI PHY and an
external PHY should always be 1000Mbps, full duplex.  Also, the SGMII
interface between an internal TBI PHY and external PHY does not
support in-band auto-negotation.

Previously, when configured for SGMII mode a TBI PHY would attempt to
restart auto-negotation during initializtion.  This auto-negotation
between a TBI PHY and external PHY would fail and result in unusable
ethernet operation.

Forcing the TBI PHY and and external PHY to link at 1000Mbps full duplex
in SGMII mode resolves this issue of auto-negotation failing.

Note that 10Mbps and 100Mbps operation is still possible on the external
side of the external PHY even when SGMII is operating at 1000Mbps.
The SGMII interface still operates at 1000Mbps, but each byte of data
is repeated 100 or 10 times for 10/100Mbps and the external PHY handles
converting this data stream into proper 10/100Mbps signalling.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2010-01-31 22:34:34 -08:00
Seunghyeon Rhee
76771e595a NET: Fix MAC addr handling for smc911x
This patch turns off MAC address mismatch warning when
optional eeprom programmed with MAC address is not available.
In that case, smc911x's MAC address register has its default
value ff:ff:ff:ff:ff:ff and it's not a valid address. This
makes eth_initialize() show the warning which has no
meaningful information while environment variable ethaddr
overrides the address read from the register. If there's no
eeprom and the value of MAC address register is not valid
after initialization, dev->enetaddr had better not be updated
and maintain its initial value 00:00:00:00:00:00, which I
think is what eth_initialize() expects. This is not a bug fix.
Even without this patch, the driver works fine. It's just for
enhancing the way of displaying messages.

Signed-off-by: Seunghyeon Rhee <seunghyeon@lpmtec.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2010-01-31 22:34:33 -08:00
Matthias Kaehlcke
07c966066b cs8900_initialize() cleanup
cs8900_initialize(): remove unecessary calls to free() and fix memory leak

Signed-off-by: Matthias Kaehlcke <matthias@kaehlcke.net>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2010-01-31 22:34:33 -08:00
Mike Frysinger
c4168af3ba smc91111_eeprom: fix linking error
Building for a bf533-stamp ends up with this error:
smc91111_eeprom.o: In function `smc91111_eeprom':
examples/standalone/smc91111_eeprom.c:58: undefined reference to `memset'
make[2]: *** [smc91111_eeprom] Error 1

The new eth_struct definition means gcc has to zero out the structure on
the stack, and some gcc versions optimize this with an implicit call to
memset.  So tweak the structure style to avoid that gcc feature.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2010-01-31 22:34:33 -08:00
Wolfgang Denk
5f566f4547 cmd_ximg.c: fix error: 'i' undeclared
Fix compile error:

	cmd_ximg.c: In function 'do_imgextract':
	cmd_ximg.c:234: error: 'i' undeclared (first use in this function)
	cmd_ximg.c:234: error: (Each undeclared identifier is reported only once
	cmd_ximg.c:234: error: for each function it appears in.)

Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-01-31 21:51:43 +01:00
Anatolij Gustschin
a6e42ed097 lcd: remove CONFIG_ATMEL_LCD ifdefs from lcd_setfgcolor
Not all boards defining LCD_COLOR16 are able to set
lcd_color_fg/lcd_color_bg correctly. The issue seems to
be caused by CONFIG_ATMEL_LCD ifdefs in lcd_setfgcolor()
and lcd_setbgcolor(). Actually, the color values passed
to these functions are already correct, we don't need
to fix them. So remove ifdefs here.

Reported-by: Alessandro Rubini <rubini@unipv.it>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
2010-01-27 21:23:30 +01:00
Alessandro Rubini
d841978ea6 include/nomadik.h: add physical address for cldc
Signed-off-by: Alessandro Rubini <rubini@unipv.it>
Acked-by: Andrea Gallo <andrea.gallo@stericsson.com>
2010-01-27 21:23:23 +01:00
Alessandro Rubini
3e446cbdf3 video: add amba-clcd prime-cell
This adds support for the CLCD logic cell. It accepts precompiled
register values for specific configuration through a board-supplied
data structure.  It is used by the Nomadik nhk8815, added by a later
patch in this series.

Signed-off-by: Alessandro Rubini <rubini@unipv.it>
Acked-by: Andrea Gallo <andrea.gallo@stericsson.com>
2010-01-27 21:23:14 +01:00
John Rigby
b081c2e9b9 Nand mxc_nand add v1.1 controller support
Add support for version 1.1 of the nfc nand flash
controller which is on the i.mx25 soc.

Signed-off-by: John Rigby <jcrigby@gmail.com>
CC: Scott Wood <scottwood@freescale.com>
2010-01-27 14:22:41 -06:00
John Rigby
f3bb63a304 Add MX25 support to nand_spl fsl nfc driver
MX25 has a different version of the fsl_nfc
flash controller known as version 1.1.

Add support to the nand_spl fsl_nfc driver

Versioning differs from mainline mxc kernel driver
no consensus yet on if the naming here and in
Redboot or the kernel is "correct".

Signed-off-by: John Rigby <jcrigby@gmail.com>
Signed-off-by: Wolfgang Denk <wd@denx.de>
CC: Scott Wood <scottwood@freescale.com>
2010-01-27 14:22:41 -06:00
John Rigby
ef22b50370 arm926ejs: add nand_spl boot support
Add CONFIG_PRELOADER/CONFIG_NAND_SPL support for nand booting
to arm926ejs/start.S

This is derived from CONFIG_PRELOADER support in arm1136/start.S

Signed-off-by: John Rigby <jcrigby@gmail.com>
CC: Scott Wood <scottwood@freescale.com>
2010-01-27 14:22:41 -06:00
Wolfgang Denk
15b86c3d6c env_nand.c: print error message and fail gracefully
env_nand.c would crash silently if a malloc() for the environment
buffers failed; make it print an error message and fail gracefully,
i. e. use the default environment then.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Acked-by: John Rigby <jcrigby@gmail.com>
2010-01-27 14:22:41 -06:00
Liu Yu
674ef7bd02 Nand boot: Add nand boot support for MPC8569mds board
This patch add nand boot support for MPC8569mds board.

Signed-off-by: Liu Yu <yu.liu@freescale.com>
2010-01-27 14:22:40 -06:00
Wolfgang Denk
9b208ece0a Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx 2010-01-27 20:19:08 +01:00
Kumar Gala
249d4dec69 Fix compiler warning in imximage.c due to getline prototype
imximage.c: In function 'imximage_parse_cfg_file':
imximage.c:142: warning: implicit declaration of function 'getline'

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-27 20:10:01 +01:00
Kumar Gala
a9c3ac78d8 85xx: Add support for 'cpu disable' command
Support disabling of a core via user command 'cpu disable'.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-26 23:17:50 -06:00
Kumar Gala
c894852b7a 86xx: Add support for 'cpu disable' command
Support disabling of a core via user command 'cpu disable'.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-26 23:17:50 -06:00
Kumar Gala
4194b3668a Add support to disable cpu's in multicore processors
Add a disable sub-command to the cpu command that allows for disabling
cores in multicore processors.  This can be useful for systems that are
using multicore chips but aren't utilizing all the cores as a way to
reduce power and possibly improve performance.

Also updated an added missing copyright.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-26 23:17:49 -06:00
Wolfgang Denk
797312a15e Merge branch 'master' of git://git.denx.de/u-boot-mpc83xx 2010-01-26 22:32:38 +01:00
Wolfgang Denk
0a42c3a433 Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx 2010-01-26 22:29:51 +01:00
Heiko Schocher
8b1760ed9a 83xx, kmeter1: fix compile error
- delete double MTDIDS_DEFAULT and MTDPARTS_DEFAULT
  defines in board config file.
- add mising CONFIG_KM_UBI_PARTITION_NAME define

Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2010-01-26 13:50:34 -06:00
Wolfgang Wegner
5912d36507 add ability to handle compressed images to imxtract
imxtract currently can not handle compressed images. This patch adds
handling for bzip2 and zip compression. In both cases, a destination
address has to be specified for extraction.

Signed-off-by: Wolfgang Wegner <w.wegner@astro-kom.de>
2010-01-26 19:36:07 +01:00
Joakim Tjernlund
a16e9a5b5f ppc: remove -ffixed-r14 gcc option.
This is no loger needed, free up r14 for general usage.

Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
2010-01-26 19:30:16 +01:00
Joakim Tjernlund
e6bee80814 ppc: Update README about the new GOT ptr.
r14 is no longer used as non volatile GOT ptr. Instead
the volatile r12 is used so be sure to do GET_GOT in
asm code when you need to access global data.

Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
2010-01-26 19:30:15 +01:00
Joakim Tjernlund
0f8aa15917 ppc: Use r12 instead of r14 as GOT pointer.
r14 is not supposed to be clobbered by functions. Switch
to r12 and call GET_GOT when needed. This will allow u-boot
to loose the -ffixed-r14 gcc option.

Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
2010-01-26 19:30:13 +01:00
Joakim Tjernlund
fc4e188789 ppc: Loose GOT access in IRQ
Using the GOT in IRQ handlers requires r14 to be -ffixed-r14.
Avoid this by relocatate transfer_to_handler too.
This will allow to free up r14 later on.

Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
2010-01-26 19:30:12 +01:00
Vivek Mahajan
66e821ebe9 85xx/p1_p2_rdb: enable hwconfig
Signed-off-by: Vivek Mahajan <vivek.mahajan@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-25 22:14:40 -06:00
Liu Yu
46df64f22c qe: fixup the snum for MPC8569 Rev2.0
Since 1.0 and 2.0 use different snum table,
we fixup the snum value according to SPRN_SVR.

Signed-off-by: Liu Yu <yu.liu@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-25 22:14:39 -06:00
Dave Liu
0fd2fa6cce Fix the local bus divider mapping
The real clock divider is 4 times of the bits LCRR[CLKDIV],
according the latest RevF RM.

Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-25 22:14:39 -06:00
Liu Yu
c95d541e4b ppc/85xx: Add ATM config for MPC8569MDS
Signed-off-by: Liu Yu <yu.liu@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-25 22:14:35 -06:00
Liu Yu
d918038269 ppc/85xx: Add PIB/ATM support for MPC8569mds
Signed-off-by: Liu Yu <yu.liu@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-25 22:13:26 -06:00
Li Yang
1118cdbfeb fsl_esdhc: fix wrong clock mask
Fix typo in SYSCTL_CLOCK_MASK, which caused residual in high bits of SDCLKFS.

Signed-off-by: Jin Qing <B24347@freescale.com>
Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-25 22:13:26 -06:00
Kumar Gala
693416fe01 Revert "ppc/p4080: Fix reporting of PME & FM clock frequencies"
This reverts commit bc20f9a952.

The original code was correct.  I clearly need glasses or a brown
paper bag.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-25 22:13:25 -06:00
James Yang
93cedc7164 ppc/p4080: Fix mask width of RCW fields MEM_PLL_RAT, SYS_PLL_RAT
The masks for MEM_PLL_RAT and SYS_PLL_RAT should have been 5-bits
instead of 4.

Signed-off-by: James Yang <James.Yang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-25 22:13:25 -06:00
Mike Frysinger
2903ad33a7 jffs2: fix hangs/crashs when not using CONFIG_JFFS2_PART_SIZE
Commit b5b004ad8a caused the sector_size to
be calculated incorrectly when the part size was not hardcoded.  This is
because the new code relied on part->size but tried to do the calculation
before it was initialized properly, and it did not take into consideration
the magic SIZE_REMAINING define.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-01-26 00:07:50 +01:00
Mike Frysinger
64b1502133 getline: split out for darwin systems
At least on OS X 10.5 and older, getline does not exist.  So split out the
function from the mingw code so that we can pull it in for Darwin systems.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-01-26 00:07:13 +01:00
Mike Frysinger
e852d36a1e tools: give explicit libfdt paths
The current libfdt object rules hard depend implicitly on the .depend file
being correct.  If it isn't, then it is unable to properly compile the
objects.  Give it a full path like all the other implicit rules here so it
will always work in face of .depend issues.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-01-26 00:05:42 +01:00
Mike Frysinger
44431cabbb gzip/zlib: make features optional
If you really want to slim down U-Boot and you would rather use a higher
compression scheme (like LZMA), it'd be nice to disable gzip/zlib since
these code bases take up a significant amount of space.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-01-26 00:04:57 +01:00
Stefano Babic
8edcde5e4e mkimage: Add Freescale imx Boot Image support (imximage)
This patch adds support for "imximage" (MX Boot Image)
to the mkimage utility. The imximage is used on the Freescales's
MX.25, MX.35 and MX.51 processors.

Further details under doc/README.imximage.

This patch was tested on a Freescale mx51evk board.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2010-01-25 23:58:29 +01:00
Detlev Zundel
a21fb981d5 mpc5xxx: Support CPU internal watchdog.
Signed-off-by: Detlev Zundel <dzu@denx.de>
2010-01-25 23:57:39 +01:00
Detlev Zundel
82826d5422 mpc512x: Add display of reset status register
Content of the RSR is put into gd early so we can output it together
with the CPU info.  The clearing of gd in board_init_f is redundant for
this architecture as it is done in cpu_init_f so we remove it.

Signed-off-by: Detlev Zundel <dzu@denx.de>
2010-01-24 15:29:29 +01:00
Wolfgang Denk
a84b655fab Merge branch 'master-sync' of git://git.denx.de/u-boot-arm 2010-01-23 17:42:03 +01:00
Daniel Gorsulowski
a3f3897bfd at91: Enable slow master clock on meesc board
Normally the processor clock has a divisor of 2.
In some cases this this needs to be set to 4.
Check the user has set environment mdiv to 4 to change the divisor.

Signed-off-by: Daniel Gorsulowski <Daniel.Gorsulowski@esd.eu>
2010-01-23 08:15:50 -06:00
Vipin KUMAR
7da6923604 SPEAr : Support added for SPEAr320 board
SPEAr320 SoC support contains basic spear320 support along with the
usage of following drivers
- serial driver(UART)
- i2c driver
- smi driver
- nand driver(FSMC)
- usbd driver
- emi driver(cfi support)

Signed-off-by: Vipin <vipin.kumar@st.com>
2010-01-23 08:15:50 -06:00
Vipin KUMAR
080cfee714 SPEAr : Support added for SPEAr310 board
SPEAr310 SoC support contains basic spear310 support along with the
usage of following drivers
- serial driver(UART)
- i2c driver
- smi driver
- nand driver(FSMC)
- usbd driver
- emi driver(cfi support)

Signed-off-by: Vipin <vipin.kumar@st.com>
2010-01-23 08:15:50 -06:00
Vipin KUMAR
4bfacad4e7 SPEAr : emi controller initialization for CFI driver support
SPEAr310 and SPEAr320 SoCs contain an EMI controller to interface
Paraller NOR flashes. This patch adds the support for this IP

The standard CFI driver is used to interface with NOR flashes

Signed-off-by: Vipin <vipin.kumar@st.com>
2010-01-23 08:15:50 -06:00
Vipin KUMAR
7e074158ce SPEAr : Support added for SPEAr300 board
SPEAr300 SoC support contains basic spear300 support along with the
usage of following drivers
- serial driver(UART)
- i2c driver
- smi driver
- nand driver(FSMC)
- usbd driver

Signed-off-by: Vipin <vipin.kumar@st.com>
2010-01-23 08:15:50 -06:00
Vipin KUMAR
f92994f0f7 SPEAr : Support for HW mac id read/write from i2c mem
This patch adds the  support to read and write mac id from i2c
memory.
For reading:
	if (env contains ethaddr)
		pick env ethaddr
	else
		pick ethaddr from i2c memory
For writing:
	chip_config ethaddr XX:XX:XX:XX:XX:XX writes the mac id
	in i2c memory

Signed-off-by: Vipin <vipin.kumar@st.com>
2010-01-23 08:15:49 -06:00
Vipin KUMAR
566c9c16fe SPEAr : Support added for SPEAr600 board
SPEAr600 SoC support contains basic spear600 support along with the
usage of following drivers
- serial driver(UART)
- i2c driver
- smi driver
- nand driver(FSMC)
- usbd driver

Signed-off-by: Vipin <vipin.kumar@st.com>
2010-01-23 08:15:49 -06:00
Vipin KUMAR
62db1c0d79 SPEAr : usbd driver support for SPEAr SoCs
SPEAr SoCs contain a synopsys usb device controller.
USB Device IP can work in 2 modes
- DMA mode
- Slave mode

The driver adds support only for slave mode operation of usb
device IP. This driver is used along with standard USBTTY
driver to obtain a tty interface over USB on the host

Signed-off-by: Vipin <vipin.kumar@st.com>
2010-01-23 08:15:49 -06:00
Vipin KUMAR
165fa406ad SPEAr : nand driver support for SPEAr SoCs
SPEAr SoCs contain an FSMC controller which can be used to interface
with a range of memories eg. NAND, SRAM, NOR.
Currently, this driver supports interfacing FSMC with NAND memories

Signed-off-by: Vipin <vipin.kumar@st.com>
2010-01-23 08:15:49 -06:00
Vipin KUMAR
a6e34f76c5 SPEAr : smi driver support for SPEAr SoCs
SPEAr SoCs contain a serial memory interface controller. This
controller is used to interface with spi based memories.
This patch adds the driver for this IP.

Signed-off-by: Vipin <vipin.kumar@st.com>
2010-01-23 08:15:49 -06:00
Vipin KUMAR
2403f8f417 SPEAr : i2c driver support added for SPEAr SoCs
SPEAr SoCs contain a synopsys i2c controller.
This patch adds the driver for this IP.

Signed-off-by: Vipin <vipin.kumar@st.com>
2010-01-23 08:15:49 -06:00
Vipin KUMAR
81c0ebf623 SPEAr : Adding basic SPEAr architecture support.
SPEAr Architecture support added. It contains the support for
following SPEAr blocks
- Timer
- System controller
- Misc registers

Signed-off-by: Vipin <vipin.kumar@st.com>
2010-01-23 08:15:49 -06:00
Vipin KUMAR
6fffcdf8c8 SPEAr : Adding README.spear in doc
README.spear contains information about SPEAr architecture and
build options etc

Signed-off-by: Vipin <vipin.kumar@st.com>
2010-01-23 08:15:49 -06:00
Tom Rix
e4c43c20b8 ARM Update mach-types
Fetched from http://www.arm.linux.org.uk/developer/machines/download.php
And built with

repo http://ftp.arm.linux.org.uk/pub/linux/arm/kernel/git-cur/linux-2.6-arm
commit 2045124ffd1a5e46d157349016a2c50f19c8c91d

Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
2010-01-23 08:15:49 -06:00
Prafulla Wadaskar
bfb6d510e9 Kirkwood: Makefile cleanup- fixed ordering (cosmetic change)
As per coding guidlines, it is good to maintain proper ordering
in the makefiles.
This was missed during initial coding, corrected here.

This was discovered during orion5x code review
Thanks to Albert Aribaud for this.

Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
2010-01-23 08:15:48 -06:00
Prafulla Wadaskar
beca04dd24 Kirkwood: Upgated licencing for files imported from linux source to GPLv2 or later
These are few files directly imported from Linux kernel source.
Those are not modifyed at all ar per strategy.
These files contains source with GPLv2 only
whereas u-boot expects GPLv2 or latter

These files are updated for the same from prior permission from original writes

Acked-by: Nicolas Pitre <nico@marvell.com>
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
2010-01-23 08:15:48 -06:00
Minkyu Kang
d8e5f55475 s5pc1xx: update cache routines
Because of v7_flush_dcache_all is moved to omap3/cache.S
and s5pc110 needs cache routines, update s5pc1xx cache routines.

l2_cache_enable and l2_caceh_disable are moved from cache.c to cache.S
and invalidate_dcache is modified for SoC specific.

Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2010-01-23 08:15:48 -06:00
Seunghyeon Rhee
17ef9104ae samsung: fix DMC1_MEM_CFG for s3c64xx
The MSB of DMC1_MEM_CFG can be set to '1' for separate CKE control
for S3C6400. In the configuration of SMDK6400, however, two 16-bit
mDDR (SAMSUNG K4X51163) chips are used in parallel to form 32-bit
memory bus and there is no need to control CKE for each chip
separately. AFAIK, CKE1 is not at all connected. Only CKE0 is
used. Futhermore, it should be '0' always for S3C6410. When tested
with a board which has a S3C6410 and the same memory configuration,
a side effect is observed that u-boot command "reset" doesn't work
leading to system hang. Leaving the bit clear is safe in most cases.

Signed-off-by: Seunghyeon Rhee <seunghyeon@lpmtec.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2010-01-23 08:15:48 -06:00
Stefan Roese
9998b1366e ppc4xx: Kilauea: Add CPLD version detection and EBC reconfiguration
A newer CPLD version on the 405EX evaluation board requires a different
EBC controller setup for the CPLD register access. This patch adds a CPLD
version detection for Kilauea and code to reconfigure the EBC controller
(chip select 2) for the old CPLD if no new version is found.

Additionally the CPLD version is printed upon bootup:

Board: Kilauea - AMCC PPC405EX Evaluation Board (CPLD rev. 0)

Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Wolfgang Denk <wd@denx.de>
Cc: Zhang Bao Quan <bqzhang@udtech.com.cn>
2010-01-23 09:27:28 +01:00
Felix Radensky
97c9f29008 ppc4xx: Fix sending type 1 PCI transactions
The list of 4xx SoCs that should send type 1 PCI transactions
is not defined correctly. As a result PCI-PCI bridges and devices
behind them are not identified. The following 4xx variants should
send type 1 transactions: 440GX, 440GP, 440SP, 440SPE, 460EX and 460GT.

Signed-off-by: Felix Radensky <felix@embedded-sol.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2010-01-23 09:27:18 +01:00
Detlev Zundel
57ae8a5cce mpc512x: Use in/out accessors for all registers
This is not only a cosmetic change as it fixes the real bug of board
reset not working with the ELDK 4.2 toolchain.

Signed-off-by: Detlev Zundel <dzu@denx.de>
2010-01-21 23:00:45 +01:00
Mike Frysinger
c7c0d542a1 tools: allow people to compile w/out configuring
It's useful to be able to build up the host tools without having to select
a board first.  Pretty much all tools in there are config-independent
anyways.

Also add a shortcut "tools-all" to quickly build all host tools that are
actually config-independent to allow for simple test builds.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-01-21 23:00:08 +01:00
Mike Frysinger
c5a028f085 ubsha1: drop unnecessary includes/prototypes
This code doesn't use any config.h defines, and the sha1.h header already
declares a sha1_csum prototype.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-01-21 22:59:29 +01:00
Mike Frysinger
5daa1c18b6 image.h: avoid command.h for host tools
The u-boot command structures don't get used with host systems, so don't
bother including it when building host code.  This avoids an implicit need
on config.h in the process.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-01-21 22:58:49 +01:00
Matthias Weisser
34be106517 Removing Atmel from ARM926EJ-S Systems
Signed-off-by: Matthias Weisser <weisserm@arcor.de>
2010-01-21 22:52:06 +01:00
Wolfgang Denk
6409b13d65 Merge branch 'master' of /home/wd/git/u-boot/custodians 2010-01-21 22:27:59 +01:00
Wolfgang Denk
4ac63017c3 Merge branch 'master' of git://git.denx.de/u-boot-ppc4xx 2010-01-21 22:27:54 +01:00
Mike Frysinger
a16028da63 lmb: only force on arches that use it
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-01-21 22:26:00 +01:00
Mike Frysinger
dac4d7e884 sha1: add dedicated config option
The sha1 code is currently compiled for everyone, but in reality, it's
only used by the FIT code.  So make it optional just like MD5.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-01-21 22:21:22 +01:00
Wolfgang Denk
7114596a7d Merge branch 'master' of git://git.denx.de/u-boot-mips 2010-01-21 22:03:28 +01:00
Wolfgang Denk
d98acd729f Merge branch 'master' of git://git.denx.de/u-boot-nand-flash 2010-01-21 22:02:21 +01:00
Wolfgang Denk
0d131ad9be Merge branch 'master' of git://git.denx.de/u-boot-blackfin 2010-01-21 21:54:37 +01:00
Felix Radensky
33c8c66423 ppc4xx: Allow setting a single SPD EEPROM address for DDR2 DIMMs
On platforms where SPD EEPROM and another EEPROM have adjacent
I2C addresses SPD_EEPROM_ADDRESS should be defined as a single
element array, otherwise DDR2 setup code would fail with the
following error:

ERROR: Unknown DIMM detected in slot 1

However, fixing SPD_EEPROM_ADDRESS would result in another
error:

ERROR: DIMM's DDR1 and DDR2 type can not be mixed.

This happens because initdram() routine does not explicitly
initialize dimm_populated array. This patch fixes the problem.

Signed-off-by: Felix Radensky <felix@embedded-sol.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2010-01-21 08:18:37 +01:00
Felix Radensky
d98964aaac ppc4xx: Fix reporting of bootstrap options G and F on 460EX/GT
Bootstrap options G and F are reported incorrectly (G instead
of F and vice versa). This patch fixes this.

Signed-off-by: Felix Radensky <felix@embedded-sol.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2010-01-21 08:18:30 +01:00
Shinya Kuribayashi
19c2929997 MIPS: qemu_mips: Import asm/unaligned.h from the Linux kernel
with a few adjustments for U-Boot.  This fixes the following build error:

make -C lib_generic/
zlib.c:31:27: error: asm/unaligned.h: No such file or directory
zlib.c: In function 'inflate_fast':
zlib.c:641: warning: implicit declaration of function 'get_unaligned'
make[1]: *** [zlib.o] Error 1
make[1]: Leaving directory `/home/skuribay/git/u-boot.git/lib_generic'
make: *** [lib_generic/libgeneric.a] Error 2

Reported-by: Himanshu Chauhan <himanshu@symmetricore.com>
Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
2010-01-20 21:13:40 +09:00
Magnus Lilja
38a8b3eafb MX31: Activate NAND environment on i.MX31 PDK board.
Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
2010-01-19 17:08:13 -06:00
Magnus Lilja
c4832dffff MXC: Add large page oob layout for i.MX31 NAND controller.
Import the large page oob layout from Linux mxc_nand.c driver.

The CONFIG_SYS_NAND_LARGEPAGE option is used to activate
the large page oob layout. Run time detection is not supported
as this moment.

This has been tested on the i.MX31 PDK board with a large
page NAND device.

Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
2010-01-19 17:08:13 -06:00
Magnus Lilja
f6a9748e32 mxc_nand: Update driver to work with i.MX31.
Tested on i.MX31 Litekit.

Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
2010-01-19 17:08:13 -06:00
Magnus Lilja
c816dcb118 MX31: Add struct definition for clock control module in i.MX31.
Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
2010-01-19 17:08:12 -06:00
Michal Simek
50ef25ef24 microblaze: zlib needs asm/unaligned.h
Microblaze has own hw unaligned handler if is available.
Use big endian version.

Signed-off-by: Michal Simek <monstr@monstr.eu>
2010-01-19 23:22:22 +01:00
Michal Simek
5b8b83bce6 microblaze: Remove getenv_IPaddr prototype
Commit 6a45e38495
should remove reference from Microblaze too.

Signed-off-by: Michal Simek <monstr@monstr.eu>
2010-01-19 23:21:57 +01:00
Alessandro Rubini
b9e6957ca1 MAINTAINERS: fix nhk8815 board name
Signed-off-by: Alessandro Rubini <rubini@unipv.it>
2010-01-19 00:32:53 +01:00
Ben Warren
b40e2320c4 Fix breakage in SMC EEPROM standalone applications
Commit 6a45e38495 (Make getenv_IPaddr() global)
inadvertently added ' #include "net.h" ' to the standalone programs, creating
duplicate definitions of 'struct eth_device'.  This patch removes the local
definitions and removes other code that breaks due to the change in definition.

Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Acked-by: Mike Frysinger <vapier@gentoo.org>
2010-01-19 00:05:53 +01:00
Daniel Hobi
2a9987935e Makefile: fix parallel build
During parallel build, the top Makefile spawns multiple sub-makes for
targets in cpu/$(CPU) and $(dir $(LDSCRIPT)). If the .depend files are
not present in these directories, the sub-makes may end up generating
these files simultaneously which leads to corrupted content.

A typical error message is:

.depend:39: *** multiple target patterns.  Stop.

This patch serializes the creation of .depend in cpu/$(CPU) and
$(dir $(LDSCRIPT)) by adding these directories to the depend target
in the top Makefile.

Other directories in $(LIBS) are not affected since they contain only
one Make target and thus only one sub-make is spawned per directory.

Signed-off-by: Daniel Hobi <daniel.hobi@schmid-telecom.ch>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-01-18 22:25:16 +01:00
Robin Getz
f19fd87e93 Blackfin: add support for kgdb
Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-01-17 20:36:09 -05:00
Robin Getz
3869453f65 asm-generic/signal.h: import from linux
We need signal.h for Blackfin/KGDB, so import the asm-generic/signal.h
for people to leverage.

Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-01-17 20:36:05 -05:00
Heiko Schocher
88ffb2665c CRAMFS: support cramfs in RAM
cramfsls and cramfsload are added to the command list.
A cramfs placed at 'cramfs_addr' can the be listed with 'cramfsls' and files
can be loaded with 'cramfsload'. 'cramfs_addr' is an environment variable
specifying the address the cramfs is located.
This works for powerpc and for ARM.

Use CONFIG_CMD_CRAMFS.

Signed-off-by: Andreas Huber <andreas.huber@keymile.com>
Signed-off-by: Heiko Schocher <hs@denx.de>
2010-01-18 00:44:13 +01:00
Heiko Schocher
4897ee33c9 powerpc: keymile boards updates
- malloc size 4 MB for all keymile boards
- use generic FDT code for fixing up the DTS
- enable unit-led at startup for keymile boards
- remove some dts updates for keymile boards
- ppc_83xx, kmeter1: take FE/GbE PHYs out of reset
- ppc_83xx, kmeter1: change from Intel Strata to Spansion 64MB flash
  changed from Intel Strata to Spansion 64MB flash and changed flash layout.
+---------+----------+-----------------------+-----------------------------+
| name    | size     | range                 | description                 |
+---------+----------+-----------------------+-----------------------------+
| u-boot  |   768 KB | 0xf0000000-0xf00bffff | for u-boot                  |
| env     |   128 KB | 0xf00c0000-0xf00dffff | for environment             |
| envred  |   128 KB | 0xf00e0000-0xf00fffff | for environment (redundant) |
| ubi0    | 64512 KB | 0xf0100000-0xf3ffffff | ubi0 for ubi volumes        |
+---------+----------+-----------------------+-----------------------------+

Signed-off-by: Heiko Schocher <hs@denx.de>
2010-01-18 00:43:54 +01:00
Heiko Schocher
1567b596d9 env, eeprom: add redundant environment support
Add redundant environment support for environment lying on a EEPROM.

Tested on uppcoming suen3 support

Signed-off-by: Andreas Huber <andreas.huber@keymile.com>
2010-01-18 00:43:16 +01:00
Heiko Schocher
548738b4d4 cmd_eeprom: I2C updates
- CONFIG_ENV_EEPROM_IS_ON_I2C
  define this, if you have I2C and SPI activated, and your
  EEPROM, which holds the environment, is on the I2C bus.

- CONFIG_I2C_ENV_EEPROM_BUS
  if you have an Environment on an EEPROM reached over
  I2C muxes, you can now define, how to reach this
  EEPROM.

Signed-off-by: Heiko Schocher <hs@denx.de>
2010-01-18 00:42:37 +01:00
Matthias Kaehlcke
b63815e313 move definition of macros likely and unlikely to compiler.h
the macros likely and unlikely were defined in include/linux/mtd/compat.h,
but used in code not related to MTD. moved the macro definitions to compiler.h

Signed-off-by: Matthias Kaehlcke <matthias@kaehlcke.net>
2010-01-18 00:28:27 +01:00
Detlev Zundel
c3d7eec6d8 cmd_bootm.c: Change interpretation of standalone image parameters.
Current code uses the second argument to bootm for standalone images to
override the load address specified in the image instead of passing all
parameters as is to the application.  This behaviour is not documented
and not in line with how the go command works for standalone applications,
so we simply drop it.

Signed-off-by: Detlev Zundel <dzu@denx.de>
2010-01-18 00:26:36 +01:00
Detlev Zundel
8b828a8f44 cmd_bootm.c: Do not load a ramdisk when not booting a kernel.
In case we boot an image marked as 'standalone' and 'linux', the current
code erroneously tried to load a ramdisk.

Signed-off-by: Detlev Zundel <dzu@denx.de>
2010-01-18 00:26:34 +01:00
Robin Getz
16035bcd8c kgdb: update mem2hex/hex2mem funcs
Convert the funcs to do the conversion inline so that we can do the copy
all at once with memcpy.  This let's us push out an weird arch-specific
issue with accessing different regions of memory to the memcpy function
like the MMRs on Blackfin systems, and it should be a bit faster.

Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-01-18 00:24:21 +01:00
Mike Frysinger
cbb0cab1d9 kgdb: drop duplicate debugger_exception_handler
The debugger_exception_handler definition is the same for everyone, so use
the common one now.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-01-18 00:23:33 +01:00
Robin Getz
0c909551f8 kgdb: add default generic stubs
The default kgdb functions can be implemented with common U-Boot functions,
so rather than force everyone to copy & paste these things, create a set of
weak stubs.

Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-01-18 00:23:00 +01:00
Mike Frysinger
fa2744de65 netconsole: mark local funcs with static
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-01-18 00:21:49 +01:00
Michael Hennerich
7293e0577f easylogo: add support for 16-bit RGB565
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-01-18 00:21:05 +01:00
Detlev Zundel
0f597bc2a8 mpc5xxx/cpu_init.c: Convert to IO accessors.
Signed-off-by: Detlev Zundel <dzu@denx.de>
2010-01-18 00:19:57 +01:00
Detlev Zundel
18e8989062 mpc5xxx.h: Add structure definition for XLB arbiter block.
Signed-off-by: Detlev Zundel <dzu@denx.de>
2010-01-18 00:19:27 +01:00
Mike Frysinger
10c32ff59f config_defaults.h: new header for common u-boot config defaults
There are a bunch of features in U-Boot that we want to enable by default,
and it's best if we centralize them in one place rather than updating all
the board files out there.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-01-18 00:04:42 +01:00
Wolfgang Denk
3e3989619f Merge branch 'master' of git://git.denx.de/u-boot-blackfin 2010-01-17 23:08:42 +01:00
Peter Tyser
64917ca389 PCIe, USB: Replace 'end point' references with 'endpoint'
When referring to PCIe and USB 'endpoint' is the standard naming
convention.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Acked-by: Stefan Roese <sr@denx.de>
Acked-by: Remy Bohmer <linux@bohmer.net>
2010-01-17 23:06:44 +01:00
Dirk Behme
6a45e38495 Make getenv_IPaddr() global
There are boards out there that do not have network support in
U-Boot (CONFIG_CMD_NET not set), but they do so in Linux. This
makes it desirable to be able to port network configuration (like
the IP address) to the Linux kernel.

We should not make the passing of the IP configuration to Linux
dependent on U-Boot features / settings.

For this, make getenv_IPaddr() global. This fixes build error

u-boot/lib_xxx/board.c:360: undefined reference to `getenv_IPaddr'

on various architectures.

Signed-off-by: Dirk Behme <dirk.behme@googlemail.com>
Acked-by: Ben Warren <biggerbadderben@gmail.com>
2010-01-17 20:14:47 +01:00
Mike Frysinger
846a6391e4 Blackfin: drop .eh_frame from linker script
Nothing in U-Boot uses runtime C++ exceptions/unwinding, so there is no
need to list this section.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-01-17 09:17:27 -05:00
Mike Frysinger
ed912d4d65 Blackfin: use sort funcs in the linker script
This is just Blackfin catching up with every one else.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-01-17 09:17:27 -05:00
Harald Krapfenbauer
2aeda2d054 Blackfin: tcm-bf518: new board port
Signed-off-by: Harald Krapfenbauer <Harald.Krapfenbauer@bluetechnix.at>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-01-17 09:17:27 -05:00
Mike Frysinger
c46a0ebf82 Blackfin: enable JFFS summary support for ADI boards
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-01-17 09:17:27 -05:00
Mike Frysinger
912da8d606 Blackfin: bf518f-ezbrd: increase monitor length
The addition of KGDB overflowed the current linker section.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-01-17 09:17:27 -05:00
Robin Getz
03642aeee0 Blackfin: handle anomaly 05000257
Need to reload the loop counters to keep from corrupting hardware loops.

Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-01-17 09:17:27 -05:00
Robin Getz
b6db283440 Blackfin: keep hwtrace on CPLB miss
Crashes rarely happen in the CPLB miss handler compared to the rest of
U-Boot code, so disable hardware tracing when processing misses.  This
way a crash due to other functions will be shown properly.

Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-01-17 09:17:27 -05:00
Robin Getz
0097870e3d Blackfin: add a netconsole helper
Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-01-17 09:17:27 -05:00
Michael Hennerich
10eafa10be Blackfin: add support for BF527-EZKIT v2.1
The new board revision has a different LCD.

Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-01-17 09:17:27 -05:00
Cliff Cai
9442c4a133 Blackfin: bf527-ezkit/bf548-ezkit: add musb board specific initialization
Signed-off-by: Cliff Cai <cliff.cai@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-01-17 09:17:27 -05:00
Cliff Cai
581d92eefc Blackfin: bfin_spi: round up clock divider
If the requested clock cannot be exactly obtained, round it up so that we
err on the side of slightly slower rather than slightly faster.

Signed-off-by: Cliff Cai <cliff.cai@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-01-17 09:17:27 -05:00
Mike Frysinger
a52ad4f994 Blackfin: pull io funcs from linux
Some common code uses more of the io.h funcs than we currently provide, so
pull in all of the ones from the linux kernel.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-01-17 09:17:27 -05:00
Mike Frysinger
5eefe7e995 Blackfin: section off the CF/IDE io.h hacks
These need to be rethought, but until that happens, isolate the hack so
that we can extend the common code without breaking things.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-01-17 09:17:27 -05:00
Mike Frysinger
3b062da326 Blackfin: drop unused funcs from io.h
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-01-17 09:17:27 -05:00
Mike Frysinger
5f79644d26 Blackfin: bf533-stamp: split and cleanup CF/IDE code
Give the CF/IDE code its own file to keep things cleanly separated.  While
we're here, clean up the code to use common functions.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-01-17 09:17:27 -05:00
Cliff Cai
e54c820991 Blackfin: convert bfin_sdh to generic mmc
Signed-off-by: Cliff Cai <cliff.cai@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-01-17 09:17:27 -05:00
Cliff Cai
17ebd5bf33 Blackfin: bfin_spi: let boards control idle value
Some SPI devices like to see high idle values rather than low.

Signed-off-by: Cliff Cai <cliff.cai@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-01-17 09:17:27 -05:00
Mike Frysinger
ea693f22d8 Blackfin: asm/string.h: drop useless includes
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-01-17 09:17:27 -05:00
Mike Frysinger
f948158f72 Blackfin: use new bfin read/write mmr helper funcs
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-01-17 09:17:27 -05:00
Mike Frysinger
313e8aacc1 Blackfin: move watchdog config check to Makefile
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-01-17 09:17:26 -05:00
Mike Frysinger
dc6bc645e0 Blackfin: fix L1 Instruction sizes on BF52x/BF54x
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-01-17 09:17:26 -05:00
Mike Frysinger
b7659ef2e7 Blackfin: bf527-ezkit: auto-select NAND settings
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-01-17 09:17:26 -05:00
Mike Frysinger
7527feef06 Blackfin: support boards with no external memory
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-01-17 09:17:26 -05:00
Mike Frysinger
dbda2c65e5 Blackfin: re-architect initcode
The single initcode function was growing unwieldy, so split it up the
distinct steps into their own function.  This should making digesting the
result much easier on people.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-01-17 09:17:26 -05:00
Mike Frysinger
f5402d4c27 Blackfin: global_data.h: make pull in needed headers
We need the definition of bd_t in this header, so pull in asm/u-boot.h.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-01-17 09:17:26 -05:00
Mike Frysinger
fa45bd498a Blackfin: kill off useless initdram() usage
While the initdram() function makes sense on some arches, it doesn't for
Blackfin systems as it's always implemented the same way.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-01-17 09:17:26 -05:00
Mike Frysinger
b1e2c5519a Blackfin: move section length calculation to linker script
The length of the sections is fixed at link time, so let the linker do the
calculation rather than doing it ourselves at runtime.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-01-17 09:17:26 -05:00
Valentin Yakovenkov
446707c90f Blackfin: bf561-acvilon: new board port
Signed-off-by: Valentin Yakovenkov <yakovenkov@niistt.ru>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-01-17 09:17:26 -05:00
Mike Frysinger
16ada4f66f Blackfin: ADI settings: enable silent console support
Very little additional code overhead, and only works when the user sets an
env var ahead of time, so default to on makes sense.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-01-17 09:17:26 -05:00
Mike Frysinger
ac41c7a0e7 Blackfin: bf537-stamp: rename SPI/MMC define
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-01-17 09:17:26 -05:00
Harald Krapfenbauer
fd04a05b89 Blackfin: update tiny board settings (voltage/default env)
The tinyboards like to run at a little lower voltage than the default, and
they prefer to boot over the network.  For the latter, extend the common
code a little to make this easier.

Also fix the cm-bf527 env sector size while we're in here to reflect the
flash that is actually in use.

Signed-off-by: Harald Krapfenbauer <Harald.Krapfenbauer@bluetechnix.at>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-01-17 09:17:26 -05:00
Mike Frysinger
76d82187c6 Blackfin: tweak embedded LDR env config option
Use the common config option for extracting the environment for embedding
into LDR files and clarify the LDR-specific option.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-01-17 09:17:26 -05:00
Wolfgang Denk
2740544881 malloc: return NULL if not initialized yet
When malloc() was called before it was properly initialized
(as would happen if when used before relocation to RAM) it returned
random, non-NULL values, which called all kinds of difficult to debug
subsequent errors.

Make sure to return NULL when initialization was not done yet.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-01-15 13:26:20 +01:00
Wolfgang Denk
f098337152 JFFS2: drop support for LZARI compression mode
Support for LZARI compression mode was added based on a MTD CVS
snapshot of March 13, 2005. However, fs/jffs2/compr_lzari.c contains
contradictory licensing terms: the original copyright clause says "All
rights reserved. Permission granted for non-commercial use.", but
later reference to the file 'LICENCE' in the jffs2 directory was added
which says GPL v2 or later.

As no boards ever used LZARI compression, and this file is also not
present in recent MTD code, we resolve this conflict by removing the
conflicting file and references to it.

Also copy the referenced but missing file 'LICENCE' from the current
MTD source tree.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-01-15 11:16:47 +01:00
Wolfgang Denk
2ff6922280 Merge branch 'master' of git://git.denx.de/u-boot-arm 2010-01-12 23:47:03 +01:00
Wolfgang Denk
f8b365ceb6 Merge branch 'master' of git://git.denx.de/u-boot-nand-flash 2010-01-12 23:42:32 +01:00
Wolfgang Denk
c76b64666e Merge branch 'master' of git://git.denx.de/u-boot-usb 2010-01-12 23:39:08 +01:00
Wolfgang Denk
02c631e6ee Merge branch 'master' of git://git.denx.de/u-boot-mpc83xx 2010-01-12 23:30:40 +01:00
Bryan Wu
321790f61b usb: musb: add virtual root hub control support
For MUSB devices that do not support multipoint (hubs), we have to emulate
a root hub so that we can support core operations like resetting ports.

Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Cliff Cai <cliff.cai@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-01-12 20:11:27 +01:00
Chris Zhang
559e2c87e4 Adds EHCI definitions to sequoia board configuration file.
Adds required definitions for EHCI support in sequoia configuration file.
But still keeps the OHCI as default driver.

Signed-off-by: Chris Zhang <chris@seamicro.com>
2010-01-09 10:27:21 +01:00
Chris Zhang
5f82887fee Add ppc440epx USB ehci support.
Currently ppc440epx uses OHCI for USB full-speed support. This change adds
support for EHCI.

Signed-off-by: Chris Zhang <chris@seamicro.com>
2010-01-09 10:27:15 +01:00
Chris Zhang
b416191a14 Fix EHCI port reset.
In USB ehci driver, the port reset is not terminated. EHCI spec says "A host
 controller must terminate the reset and stabilize the state of the port within
 2 milliseconds". Without termination, a port stays at reset state. This is
 observed on ppc4xx(sequoia) boards.

Signed-off-by: Chris Zhang <chris@seamicro.com>
2010-01-09 10:25:43 +01:00
Sanjeev Premi
b301be0599 omap3: fix compile warning
This patch fixes this warning during compile:

omap3.c: In function 'musb_platform_init':
omap3.c:126: warning: label 'end' defined but not used

Problem reported by: Dirk Behme[dirk.behme@googlemail.com]

Signed-off-by: Sanjeev Premi <premi@ti.com>
2010-01-09 10:25:09 +01:00
Bryan Wu
e608f221c1 usb: musb: add support for Blackfin MUSB
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Cliff Cai <cliff.cai@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Remy Bohmer <linux@bohmer.net>
2010-01-09 10:25:09 +01:00
Bryan Wu
bc72a919e0 usb: musb: change rxcsr register from write to read/modify/write
The RX Control/Status register has bits that we want to preserve, so don't
just write out a single bit.  Preserve the others bits in the process.

The original code posted to the u-boot list had this behavior, but looks
like it was lost somewhere along the way to merging.

Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Cliff Cai <cliff.cai@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Remy Bohmer <linux@bohmer.net>
2010-01-09 10:25:09 +01:00
Bryan Wu
8868fd443b usb: musb: make multipoint optional
The multipoint handling under MUSB is optional, and some parts (like the
Blackfin processor) do not implement support for it.

Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Cliff Cai <cliff.cai@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Remy Bohmer <linux@bohmer.net>
2010-01-09 10:25:08 +01:00
Bryan Wu
df402ba381 usb: musb: make fifo support configurable
The dynamic FIFO handling under MUSB is optional, and some parts (like
the Blackfin processor) do not implement support for it.

Due to this, the FIFO reading/writing steps need special handling, so
mark the common versions weak so drivers can override.

Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Cliff Cai <cliff.cai@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Remy Bohmer <linux@bohmer.net>
2010-01-09 10:25:08 +01:00
Mike Frysinger
dc2cd05c91 usb: musb: make sure the register layout is packed
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Remy Bohmer <linux@bohmer.net>
2010-01-09 10:25:08 +01:00
Ajay Kumar Gupta
7b4292883b DA830: Add usb config
Adding USB configuration. Default is set for USB MSC host.

Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
Signed-off-by: Swaminathan S <swami.iyer@ti.com>
2010-01-09 10:25:07 +01:00
Ajay Kumar Gupta
7359273d94 DA8xx: Add MUSB host support
Tested USB host functionality on DA830 EVM.

Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
Signed-off-by: Swaminathan S <swami.iyer@ti.com>
2010-01-09 10:25:07 +01:00
Ajay Kumar Gupta
0b232310b2 DA8xx: Add GPIO register definitions
Added DA8xx GPIO base addresses in gpio_defs.h and pointers
to different BANKs which can be used to program GPIOs.

Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
Signed-off-by: Swaminathan S <swami.iyer@ti.com>
2010-01-09 10:25:07 +01:00
Ajay Kumar Gupta
82a821f89b DA830: Add pinmux for USB0_DRVVBUS
USB0_DRVVBUS pinmux configuration is required for USB functinality
in uboot.

Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
Signed-off-by: Swaminathan S <swami.iyer@ti.com>
2010-01-09 10:25:06 +01:00
Heiko Schocher
a3f5da1bee mpc83xx: add support configure bus parking
Add support to configure bus parking mode and master in bus arbitration
configuration (ACR). Add this for the kmeter1 port:

Configure bus arbiter with recommended values from Freescale
to improve bus latency/throughput for application with
intensive QuiccEngine activity.

Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2010-01-07 18:39:42 -06:00
Reinhard Arlt
a0daa2e06f mpc83xx: vme8349: Fix power up reset sequence for tsi148
Remove PCI reset, if there is a monarch PMC module.

Signed-off-by: Reinhard Arlt <reinhard.arlt@esd.eu>
Signed-off-by: Stefan Roese <sr@denx.de>

convert clrbits_be32 + setbits_be32 to clrsetbits_be32, use out_be32 to set gcr.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2010-01-07 18:36:30 -06:00
Reinhard Arlt
1dee9be683 mpc83xx: Add support for MPC8349 esd caddy2
The caddy2 is a variant of the already supported vme8349. So we just
add the differences to this board port. To better support those two
boards we switched from fixed SDRAM configuration to usage of
spd_sdram(). This is done by providing a board specific SPD EEPROM
routine with different values for both boards.

Signed-off-by: Reinhard Arlt <reinhard.arlt@esd.eu>
Signed-off-by: Stefan Roese <sr@denx.de>

changed to use mkconfig -t option instead, plus misc codingstyle fixes.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2010-01-07 18:34:31 -06:00
Stefan Roese
7693640acd mpc83xx: spd_sdram.c: Disable memory controller before initializing
The memory controller could already be enabled, when spd_sdram() is
called. This could be the case for example, when the SDRAM is initialized
by the JTAG debugger.

The "sync" after the register access via the accessor function is
still needed, because the macro uses the sync before the real write
is done. So until not all accesses are converted to using accessor
functions, this sync still needs to be made "manually" here.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Reinhard Arlt <reinhard.arlt@esd.eu>
Acked-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2010-01-07 18:34:30 -06:00
Anton Vorontsov
2e95004deb mpc83xx: Add NAND boot support for MPC8315E-RDB boards
The core support for NAND booting is there already, so this patch
is pretty straightforward.

There is one trick though: top level Makefile expects nand_spl to
be in nand_spl/board/$(BOARDDIR), but we can fully reuse the code
from mpc8313erdb boards, and so to not duplicate the code we just
symlink nand_spl/board/freescale/mpc8315erdb to mpc8313erdb.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>

o silence make during ln echo
o update documentation
o and avoid:

$ ./MAKEALL MPC8315ERDB_NAND
Configuring for MPC8315ERDB board...
sdram.o: In function `fixed_sdram':
/home/r1aaha/git/u-boot/nand_spl/board/freescale/mpc8313erdb/sdram.c:72: undefined reference to `udelay'

by renaming udelay -> __udelay in the spirit of commit
3eb90bad65 "Generic udelay() with watchdog
support".

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2010-01-07 18:33:52 -06:00
Sanjeev Premi
b821cead7d onenand: Fix compile errors due to FlexOneNAND
This patch fixes the compile error while trying to
compile for omap3evm.

env_onenand.c: In function 'env_relocate_spec':
env_onenand.c:70: error: 'CONFIG_ENV_ADDR_FLEX' undeclared
 (first use in this function)
env_onenand.c:70: error: (Each undeclared identifier is re
ported only once
env_onenand.c:70: error: for each function it appears in.)
env_onenand.c: In function 'saveenv':
env_onenand.c:106: error: 'CONFIG_ENV_ADDR_FLEX' undeclare
d (first use in this function)
env_onenand.c:107: error: 'CONFIG_ENV_SIZE_FLEX' undeclare
d (first use in this function)

Signed-off-by: Sanjeev Premi <premi@ti.com>
Acked-by: Tom Rix <Tom.Rix@windriver.com>
2010-01-06 16:28:00 -06:00
Nick Thompson
20da6f4d93 Davinci: davinci_nand.c performance enhancments
Introduces various optimisations that approximately triple the
read data rate from NAND when run on da830evm.

Most of these optimisations depend on the endianess of the machine
and most of them are very similar to optimisations already present
in the Linux Kernel.

Signed-off-by: Nick Thompson <nick.thompson@ge.com>
2010-01-06 16:11:16 -06:00
Tom Rix
06f95959bc ARM Update mach-types
Fetched from http://www.arm.linux.org.uk/developer/machines/download.php
And built with

repo http://ftp.arm.linux.org.uk/pub/linux/arm/kernel/git-cur/linux-2.6-arm
commit c9f937e4a3f4ebf9924ec21d80632e5eb61d949c

Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
2010-01-06 09:36:24 -06:00
Becky Bruce
8b0ab30494 ppc/p4080: Add Corenet Platform Cache (CPC) registers
Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-05 13:52:00 -06:00
Dave Liu
3e731aaba3 fsl-ddr: setup ODT_RD_CFG & ODT_WR_CFG when we interleave
In chip-select interleaving case, we also need set the ODT_RD_CFG
and ODT_WR_CFG in cs1_config register.

Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-05 13:50:07 -06:00
Dave Liu
1aa3d08a02 fsl-ddr: add override for the Rtt_Wr
Different boards may require different settings of Dynamic ODT (Rtt_Wr).
We provide a means to allow the board specific code to provide its own
value of Rtt_Wr.

Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-05 13:49:27 -06:00
Dave Liu
bdc9f7b5ea fsl-ddr: add the override for write leveling
add the override for write leveling sampling and
start time according to specific board.

Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-05 13:49:10 -06:00
Dave Liu
0a71c92c7e fsl-ddr: Fix power-down timing settings
1. TIMING_CFG_0[ACT_PD_EXIT] was set to 6 clocks, but
   It should be set to tXP parameter, tXP=max(3CK, 7.5ns)
2. TIMING_CFG_0[PRE_PD_EXIT] was set to 6 clocks, but
   It should be set to tXP (if MR0[A12]=1) else to tXPDLL parameter
   We are setting the mode register MR0[A12]='1'

Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-05 13:49:10 -06:00
Anton Vorontsov
c4ca10f1db mpc85xx: Add 4-bits eSDHC support for MPC8569E-MDS boards
Thanks to "Errata to MPC8569E PowerQUICC III Integrated Host Processor
Family Reference Manual, Rev. 0" document, which describes all eSDHC
pins, we can add 4-bits eSDHC support for MPC8569E-MDS boards.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-05 13:49:10 -06:00
Kumar Gala
bc20f9a952 ppc/p4080: Fix reporting of PME & FM clock frequencies
We incorrectly had the sense of PME_CLK_SEL, FM1_CLK_SEL, FM2_CLK_SEL
backwards so we report the wrong frequency.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-05 13:49:10 -06:00
Li Yang
de3cbd78c9 fsl_law: add SRIO2 target id and law_size_bits() macro
Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-05 13:49:09 -06:00
Kumar Gala
abc76eb6a6 ppc/85xx: Map boot page guarded for MP boot
We already map the page cache-inhibited.  There is no reason we
shouldn't also be marking it guarded to prevent speculative accesses.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-05 13:49:09 -06:00
Kumar Gala
effe4973f2 ppc: Added macro to test for specific SVR revision
Various SoC errata are specific to a given revision of silicon. This
patch gives us a simple macro to use when doing such tests.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-05 13:49:09 -06:00
Dave Liu
f5ecc6e027 p4080: add readback to bootpage translation window
We need to add the readback to bootpage translation LAW
to make it effect.

Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-05 13:49:09 -06:00
Kumar Gala
5fb6ea3ad3 ppc/85xx: Make flash TLB entry determined at runtime on FSL boards
Rather than hard coding which TLB entry the FLASH is mapped with we can
use find_tlb_idx to determine the entry.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-05 13:49:08 -06:00
Kumar Gala
783852e467 ppc/85xx: Remove CONFIG_SYS_DDR_TLB_START
Now that we dynamically determine TLB CAM entries to use we dont need
CONFIG_SYS_DDR_TLB_START anymore.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-05 13:49:08 -06:00
Kumar Gala
355f4f85e9 ppc/85xx: Make SPD DDR TLB setup code use dynamic entry allocation
Now that we track which TLB CAM entries are used we can allocate
entries on the fly.  Change the SPD DDR TLB setup code to assume
we use at most 8 TLBs (or the number free, which ever is fewer).

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-05 13:49:08 -06:00
Kumar Gala
94e9411b9d ppc/85xx: Add tracking of TLB CAM usage
We need to track which TLB CAM entries are used to allow us to
"dynamically" allocate entries later in the code.  For example the SPD
DDR code today hard codes which TLB entries it uses.  We can now make
that pick entries that are free.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-05 13:49:08 -06:00
Kumar Gala
ee53650dad ppc/8xxx: Remove is_fsl_pci_agent
All users of is_fsl_pci_agent have been converted to fsl_is_pci_agent
that uses the standard PCI programming model to determine host vs
agent/end-point.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-05 13:49:07 -06:00
Kumar Gala
7cb8f79b44 ppc/85xx: Move to using fsl_setup_hose on TQM 85xx
We can use fsl_setup_hose to determine if we are a agent/end-point or
a host.  Rather than using some SoC specific register we can just look
at the PCI cfg space of the host controller to determine this.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-05 13:49:07 -06:00
Kumar Gala
9263e829f0 ppc/85xx: Move to using fsl_setup_hose on P2020 DS
We can use fsl_setup_hose to determine if we are a agent/end-point or
a host.  Rather than using some SoC specific register we can just look
at the PCI cfg space of the host controller to determine this.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-05 13:49:07 -06:00
Kumar Gala
1e21ba8f6d ppc/85xx: Move to using fsl_setup_hose on P1/P2 RDB
We can use fsl_setup_hose to determine if we are a agent/end-point or
a host.  Rather than using some SoC specific register we can just look
at the PCI cfg space of the host controller to determine this.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-05 13:49:07 -06:00
Kumar Gala
42c01b9d1f ppc/85xx: Move to using fsl_setup_hose on MPC8572 DS
We can use fsl_setup_hose to determine if we are a agent/end-point or
a host.  Rather than using some SoC specific register we can just look
at the PCI cfg space of the host controller to determine this.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-05 13:49:06 -06:00
Kumar Gala
5e3d7050cf ppc/86xx: Clean up MPC8610 HPCD PCI setup code
Use new fsl_pci_init_port() that reduces amount of duplicated code in the
board ports, use IO accessors and clean up printing of status info.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-05 13:49:06 -06:00
Kumar Gala
7b626880b4 ppc/85xx: Clean up MPC8548 CDS PCI setup code
Use new fsl_pci_init_port() that reduces amount of duplicated code in the
board ports, use IO accessors and clean up printing of status info.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-05 13:49:06 -06:00
Kumar Gala
feadd5d53b ppc/85xx: Clean up ATUM8548 PCI setup code
Use new fsl_pci_init_port() that reduces amount of duplicated code in the
board ports, use IO accessors and clean up printing of status info.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-05 13:49:06 -06:00
Kumar Gala
4681457e2a ppc/85xx: Clean up MPC8568 MDS PCI setup code
Use new fsl_pci_init_port() that reduces amount of duplicated code in the
board ports, use IO accessors and clean up printing of status info.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-05 13:49:05 -06:00
Kumar Gala
c847e98b14 ppc/85xx: Clean up MPC8569 MDS PCI setup code
Use new fsl_pci_init_port() that reduces amount of duplicated code in the
board ports, use IO accessors and clean up printing of status info.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-05 13:49:05 -06:00
Kumar Gala
645d5a7838 ppc/85xx: Clean up MPC8544 DS PCI setup code
Use new fsl_pci_init_port() that reduces amount of duplicated code in the
board ports, use IO accessors and clean up printing of status info.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-05 13:49:05 -06:00
Mingkai Hu
8a414c4258 ppc/85xx: Clean up MPC8536 DS PCI setup code
Use new fsl_pci_init_port() that reduces amount of duplicated code in the
board ports, use IO accessors and clean up printing of status info.

Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-05 13:49:05 -06:00
Kumar Gala
3ad89c4ecb NET: Base support for etsec2.0
1. Modified the tsec_mdio structure to include the new regs
2. Modified the MDIO_BASE_ADDR so that it will handle both
older version and new version of etsec.

Signed-off-by: Sandeep Gopalpet <sandeep.kumar@freescale.com>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-05 13:49:04 -06:00
Sandeep Gopalpet
b9e186fc31 NET: Move MDIO regs out of TSEC Space
Moved the mdio regs out of the tsec structure,and
provided different offsets for tsec base and mdio
base so that provision for etsec2.0 can be provided.

This patch helps in providing the support for etsec2.0
In etsec2.0, the MDIO register space and the etsec reg
space are different.

Also, moved the TSEC_BASE_ADDR and MDIO_BASE_ADDR definitons into
platform specific files.

Signed-off-by: Sandeep Gopalpet <sandeep.kumar@freescale.com>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-05 13:49:04 -06:00
Kumar Gala
bcad21fda1 85xx: Add support to set DPAA (data path) devices clock frequencies
Set clock-frequency for Frame Manager 0/1 and Patter Match Engine on p4080.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-05 13:49:04 -06:00
Kumar Gala
178e39e199 ppc/8xxx: Don't use pci_cfg on FSL_CORENET platforms
The FSL_CORENET platforms use a completely different means to determine
which PCIe port is enabled as well as if its a host or agent/end-point.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-05 13:49:03 -06:00
Kumar Gala
11588b5dc4 ppc/p4080: Added p4080 SERDES registers & USB offset
Added immap definition for SERDES registers on p4080, the USB offset
(since it was missing) and a GPL header.

Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-05 13:49:03 -06:00
Kumar Gala
82fd1f8da9 85xx: Add support for e500mc cache stashing
The e500mc core supports the ability to stash into the L1 or L2 cache,
however we need to uniquely identify the caches with an id.

We use the following equation to set the various stash-ids:

32 + coreID*2 + 0(L1) or 1(L2)

The 0 (for L1) or 1 (for L2) matches the CT field used be various cache
control instructions.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-05 13:49:02 -06:00
Nick Thompson
26be2c53d6 Davinci: NAND enable ECC even when not in NAND boot mode
Davinci: NAND enable ECC even when not in NAND boot mode

On Davinci platforms, the default NAND device is enabled (for ECC)
in low level boot code when NAND boot mode is used. If booting in
another mode, NAND ECC is not enabled. The driver should make
sure ECC is enabled regardless of boot mode if NAND is configured
in U-Boot.

Signed-off-by: Nick Thompson <nick.thompson@ge.com>
2010-01-04 08:48:17 -06:00
Nick Thompson
97f4eb8cfb Davinci: Configurable NAND chip selects
Davinci: Configurable NAND chip selects

Add a CONFIG_SYS_NAND_CS setting to all davinci configs and
use it to setup the NAND controller in the davinci_nand
mtd driver.

Signed-off-by: Nick Thompson <nick.thompson@gefanuc.com>
2010-01-04 08:48:17 -06:00
Nick Thompson
90110e0eab Davinci: Table driven pinmux configuration
Davinci: Table driven pinmux configuration

Add code to allow pinmux_config tables to be grouped and configured
as a single resource. This removes multiple calls to the pinmux
configuration code from board_init and allows pinmuxes to be
individually configured and added by data manipulation only.

All related #ifdefs can the be removed from board_init code and
since the compiler optimises away statics, #ifdefs can be reduced in
the data definitions as well.

Signed-off-by: Nick Thompson <nick.thompson@gefanuc.com>
2010-01-04 08:48:16 -06:00
Robert P. J. Day
1270ec13d4 Remove superfluous uses of V_PROMPT macro.
A number of config files define the V_PROMPT macro for the
command-line prompt, only to immediately use that macro to define
CONFIG_SYS_PROMPT, making V_PROMPT entirely superfluous.

Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
2010-01-04 08:48:16 -06:00
Grazvydas Ignotas
8b432bebc2 pandora: don't enable VAUX3, VDAC and VPLL2 regulators
These regulators are not needed to start the kernel and only
cause "incomplete constraints" warnings from kernel, so don't
turn them on to save power.

Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
2010-01-04 08:48:16 -06:00
Grazvydas Ignotas
ead39d7aa3 TWL4030: make LEDs selectable for twl4030_led_init()
Not all boards have both LEDs hooked, so enabling both on
boards with single LED will just waste power. Make it
possible to choose LEDs by adding argument to
twl4030_led_init().

Using this turn on only LEDB for pandora, leave both LEDs
on for all other boards, as it was before this patch.

Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
2010-01-04 08:48:15 -06:00
Wolfgang Denk
6ca9da4d42 Merge branch 'master' of git://git.denx.de/u-boot-ppc4xx 2010-01-03 21:07:04 +01:00
Stefan Roese
be34fef7fd ppc4xx: alpr: Remove some not needed commands to make image fit again
The latest changes increased the size of the alpr image a bit more.
Now it doesn't fit into the 256k reserved for it. This patch now removes
the commands "ping" and "diag" which are not needed in the production
systems.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Pieter Voorthuijsen <pieter.voorthuijsen@prodrive.nl>
2009-12-22 05:53:00 +01:00
Heiko Schocher
072e754b6b i2c, ppc4xx: fix compiling KAREF and METROBOX boards.
commit eb5eb2b0f7

ppc4xx: Cleanup PPC4xx I2C infrastructure

This patch cleans up the PPC4xx I2C intrastructure:

- Use C struct to describe the I2C registers instead of defines
- Coding style cleanup (braces, whitespace, comments, line length)
- Extract common code from i2c_read() and i2c_write()
- Remove unneeded IIC defines from ppc405.h & ppc440.h

breaks comiling for the KAREF and METROBOX boards.

This patch fixes this issue.

Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2009-12-22 05:52:48 +01:00
Wolfgang Wegner
87d93a1ba2 move prototypes for gunzip() and zunzip() to common.h
Prototype for gunzip/zunzip was only in lib_generic/gunzip.c and thus
repeated in every file using it. This patch moves the prototypes to
common.h and removes all prototypes distributed anywhere else.

Signed-off-by: Wolfgang Wegner <w.wegner@astro-kom.de>
2009-12-21 21:39:59 +01:00
Wolfgang Denk
f7767c7541 Merge branch 'master' of git://git.denx.de/u-boot-usb 2009-12-21 21:01:56 +01:00
Mahavir Jain
127e10842b usb: write command for RAW partition.
This patch implements write support to usb device with raw partition.
It will be useful for filesystem write support to usb device from
u-boot in future.

Tested with writing kernel image to raw usb disk & booting with usb
read command into ram.

[Note:  run usb part to get info about start sector & number of
sectors on a partition for usb write operation.]

Signed-off-by: Mahavir Jain <mjain@marvell.com>
2009-12-20 12:53:00 +01:00
Ajay Kumar Gupta
73c8640e93 omap3evm: musb: add USB config
Added USB host and device config for host (MSC, Keyboard) and
device (ACM) functionalities.

Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
2009-12-20 12:53:00 +01:00
Tom Rix
ae4caf2fb5 OMAP3 USB Initialize twl4030 only if required
OMAP3EVM uses ISP1504 phy and so twl4030 related init is not required.

Submitted-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
2009-12-20 12:51:51 +01:00
Tom Rix
2ec1abea43 OMAP3 zoom2 Use usbtty if the debug board is not connected.
The preferred serial output comes from the debug board.
When the debug board is disconnected, fall back on using
usbtty from the usb connector on the Zoom2 board.

This shows up as /dev/ttyACM0 in a linux host.

Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
2009-12-20 12:51:51 +01:00
Tom Rix
6299487ef5 USBTTY make some function declarations easier to use.
Zoom2 needs to use these declarations and the include directory is a
better place from them than in the middle of the driver directory.
It did not make sense to create a new file for just a couple of
lines so they were appended to the serial.h

Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
2009-12-20 12:51:51 +01:00
Tom Rix
25374bfbf3 OMAP3 beagle Add usbtty configuration
The primary console of beagle is the serial header.

A secondary console is to use the usbtty.  The user can set this
manually by doing

setenv stdout usbtty; setenv stdin usbtty; setenv stderr usbtty
saveenv

usbtty will be usable by accessing the /dev/ttyACM0 on a linux host.

Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
2009-12-20 12:51:51 +01:00
Tom Rix
05be5a60e9 OMAP3 zoom1 Add usbtty configuration
The primary console of zoom1 is the serial out from the jumpers
accessed by removing the back panel.

A secondary console is to use the usbtty.  The user can set this
manually by doing

setenv stdout usbtty; setenv stdin usbtty; setenv stderr usbtty
saveenv

usbtty will be usable by accessing the /dev/ttyACM0 on a linux host.

Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
2009-12-20 12:50:53 +01:00
Tom Rix
f298e4b6dd OMAP3 Add usb device support
This change adds the usb device support for musb.

Omap3 platform support added at the same level as davinci.

The interface for usbtty to use the musb device support was added.

Verified on omap3 beagle, zoom1 and zoom2.

Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
2009-12-20 12:47:37 +01:00
Tom Rix
bffbb2a86d TWL4030 Add usb PHY support
The twl4030 provides a PHY device for connecting a link device,
like musb, to physical connection.

This change adds the twl4030 usb registers and functions for
initializing the PHY as required by omap3.

Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
2009-12-20 12:47:37 +01:00
Tom Rix
988365a204 USB add macros for debugging usb device setup.
When developing usb device features, it is useful to print out
common usb structures.

Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
2009-12-20 12:47:37 +01:00
Tom Rix
8f8bd565f3 USB Consolidate descriptor definitions
The header files usb.h and usbdescriptors.h have the same nameed
structure definitions for

usb_config_descriptor
usb_interface_descriptor
usb_endpoint_descriptor
usb_device_descriptor
usb_string_descriptor

These are out right duplicates in usb.h

usb_device_descriptor
usb_string_descriptor

This one has extra unused elements

usb_endpoint_descriptor

	unsigned char	bRefresh
	unsigned char	bSynchAddress;

These in usb.h have extra elements at the end of the usb 2.0
specified descriptor and are used.

usb_config_descriptor
usb_interface_descriptor

The change is to consolidate the definition of the descriptors
to usbdescriptors.h.  The dublicates in usb.h are removed.
The extra element structure will have their name shorted by
removing the '_descriptor' suffix.

So

usb_config_descriptor -> usb_config
usb_interface_descriptor -> usb_interface

For these, the common descriptor elements are accessed now
by an element 'desc'.

As an example

-	if (iface->bInterfaceClass != USB_CLASS_HUB)
+	if (iface->desc.bInterfaceClass != USB_CLASS_HUB)

This has been compile tested on MAKEALL arm, ppc and mips.

Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
2009-12-20 12:47:37 +01:00
Wolfgang Denk
b6535daefd Merge branch 'next' of git://git.denx.de/u-boot-net 2009-12-17 22:59:27 +01:00
Li Yang
e5e4e705ce Update Makefile for tag generating
Get tag directories from the $(__LIB) and also generate tag for .S files.

Signed-off-by: Li Yang <leoli@freescale.com>
2009-12-17 22:57:54 +01:00
Kumar Gala
d02ffbf8d7 drivers/bios_emulator: Fix compile error in .depend not being generated
make -C drivers/bios_emulator/
make[2]: Entering directory
`drivers/bios_emulator'
In file included from atibios.c:49:
biosemui.h:47:21: error: biosemu.h: No such file or directory
...
x86emu/decode.c:40:28: error: x86emu/x86emui.h: No such file or directory
...

Due to lack of proper CPPFLAGS being passed to .depend generation rule

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-12-17 22:24:36 +01:00
Wolfgang Denk
bb3bcfa242 Merge branch 'next' of ../next 2009-12-15 23:38:34 +01:00
Ben Warren
1ab70f6fff Net: Clean up LAN91C96 Support
A previous Commit converted the LAN91C96 Ethernet driver to using the
CONFIG_NET_MULTI API, but did not include full board support.  This patch
finishes the job.

Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2009-12-14 16:42:03 -08:00
Thomas Weber
076cd24cb4 net: dm9000x: fix debug output
commit 60f61e6d76 breaks compile with gcc by introducing __func__
instead of constant string "func" in the macro call but missed to change the macro.

Signed-off-by: Thomas Weber <weber@corscience.de>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2009-12-13 21:57:01 -08:00
John Ogness
c179a2896e fec_mxc: incomplete error handling
fec_init() will only allocate fec->base_ptr if it is non-NULL. But
the cleanup routine on error will free the pointer without setting
it to NULL. This means that a later call to fec_init() would result
in using an invalid pointer.

Signed-off-by: John Ogness <john.ogness@linutronix.de>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2009-12-13 21:55:15 -08:00
Reinhard Arlt
2ab4a4d095 net: e1000: Add support for the Intel 82546GB controller
This chip is equipped for example on the esd PMC-ETH2-GB board. So let's
add it to the list of supported chips to the e1000 driver.

Signed-off-by: Reinhard Arlt <reinhard.arlt@esd.eu>
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2009-12-13 21:52:30 -08:00
Remy Bohmer
aafda38fb2 Add error codes/handling for TFTP-server
Signed-off-by: Remy Bohmer <linux@bohmer.net>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2009-12-13 21:31:26 -08:00
Nishanth Menon
ac6b362a25 LAN91C96: Enable NET_MULTI LAN driver
This modification is NOT tested on any of the
platforms modified as I dont have them. please
help by testing+building+fixing

Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2009-12-13 21:31:26 -08:00
Nishanth Menon
a1725999b8 TI OMAP3: SDP3430 FIX NET_MULTI Warning
Enable the NET MULTI option and remove build warning

Tested: SDP3430

Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2009-12-13 21:31:26 -08:00
Nishanth Menon
b7ad4109da NET: LAN91C96 CONFIG_NET_MULTIify
Make the lan91c96 driver capable of CONFIG_NET_MULTI
to be clean for the new arch, add a a lil detect function
Most of the formatting change was done to keep checkpatch
silent, but a few functions and #if 0ed code which
does not make sense for NET_MULTI have been removed

Now, use the lan91c96_initialize() function to init the driver

Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2009-12-13 21:31:26 -08:00
Mike Frysinger
6ac59c5518 net: pull CONFIG checks out of source and into makefile
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2009-12-13 21:31:26 -08:00
Heiko Schocher
4b142febff common: delete CONFIG_SYS_64BIT_VSPRINTF and CONFIG_SYS_64BIT_STRTOUL
There is more and more usage of printing 64bit values,
so enable this feature generally, and delete the
CONFIG_SYS_64BIT_VSPRINTF and CONFIG_SYS_64BIT_STRTOUL
defines.

Signed-off-by: Heiko Schocher <hs@denx.de>
2009-12-08 22:14:07 +01:00
Heiko Schocher
00b6d927ba 5xxx, fdt: move fdt_fixup_memory() to cpu.c file
u-boot updates, before starting Linux, the memory node in the
DTS. As this is a "standard" feature, move this functionality
to the cpu.c file for mpc5xxx and mpc512x processors.

Signed-off-by: Heiko Schocher <hs@denx.de>
2009-12-08 22:13:02 +01:00
Wolfgang Denk
35e3717772 Merge branch 'master' of ../work into next 2009-12-07 23:42:33 +01:00
Heiko Schocher
7cb5fc15f2 mpc52xx, manroland: add some commands
add the following commands for the manroland boards:

CONFIG_CMDLINE_EDITING
CONFIG_COMMAND_HISTORY
CONFIG_AUTO_COMPLETE

Signed-off-by: Heiko Schocher <hs@denx.de>
2009-12-07 22:50:41 +01:00
Wolfgang Denk
206c00f26f Merge branch 'master' into next
Conflicts:
	lib_generic/zlib.c

Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-12-07 22:47:17 +01:00
Stefan Roese
39ff7d5f4c POST: Remove duplicated post_hotkey_pressed() functions
This patch introduces a weak default function for post_hotkey_pressed(),
returning 0, for boards without hotkey support. The long-running tests
won't be started on those boards. This default function was implemented
in many board directories. By implementing this weak default we can
remove all those duplicate versions.

Boards with hotkey support, can override this weak default function
by defining one in their board specific code.

Signed-off-by: Stefan Roese <sr@denx.de>
2009-12-07 22:44:31 +01:00
Wolfgang Denk
2a49bf3149 Merge branch 'master' into next
Conflicts:
	board/esd/plu405/plu405.c
	drivers/rtc/ftrtc010.c

Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-12-05 02:11:59 +01:00
Joakim Tjernlund
cd514aeb99 zlib: Optimize decompression
This patch optimizes the direct copy procedure.
Uses get_unaligned() but only in one place.
The copy loop just above this one can also use this
optimization, but I havn't done so as I have not tested if it
is a win there too.
On my MPC8321 this is about 17% faster on my JFFS2 root FS
than the original. No speed test has been performed in u-boot.

Size increase on ppc: 484 bytes

Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
Acked-by: Peter Korsgaard <jacmet@sunsite.dk>
2009-12-05 01:32:32 +01:00
Peter Korsgaard
20dde48bca add lzop decompression support
Add lzop decompression support to the existing lzo bitstream handling
(think gzip versus zlib), and support it for uImage decompression if
CONFIG_LZO is enabled.

Lzop doesn't compress as good as gzip (~10% worse), but decompression
is very fast (~0.7s faster here on a slow ppc). The lzop decompression
code is based on Albin Tonnerre's recent ARM Linux lzo support patch.

Cc: albin.tonnerre@free-electrons.com
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
2009-12-05 01:30:23 +01:00
Ingo van Lil
3eb90bad65 Generic udelay() with watchdog support
According to the PPC reference implementation the udelay() function is
responsible for resetting the watchdog timer as frequently as needed.
Most other architectures do not meet that requirement, so long-running
operations might result in a watchdog reset.

This patch adds a generic udelay() function which takes care of
resetting the watchdog before calling an architecture-specific
__udelay().

Signed-off-by: Ingo van Lil <inguin@gmx.de>
2009-12-05 01:08:53 +01:00
Graeme Russ
1c409bc710 i386: Final Relocation
Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
2009-12-05 01:05:39 +01:00
Graeme Russ
cabe579480 i386: Move references to link script exports
Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
2009-12-05 01:05:07 +01:00
Graeme Russ
0fc1b49ecb i386: Remove inline asm symbols from .dynsym
Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
2009-12-05 01:04:44 +01:00
Graeme Russ
564a9984bd i386: Rearrange Interupt Handling
In preperation for full relocation

Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
2009-12-05 01:04:18 +01:00
Graeme Russ
27f13075a6 i386: Fix race condition when using SC520 timers
Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
2009-12-05 01:02:58 +01:00
Graeme Russ
141a62cc12 i386: Fix global label in inline asm compile error
Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
2009-12-05 01:02:46 +01:00
Graeme Russ
4ee4e413ba i386: Reorder source objects in lib_i386 Makefile
Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
2009-12-05 01:02:30 +01:00
Graeme Russ
aea14421c5 i386: Fix link collisions resulting from gcc4.4.1 upgrade
Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
2009-12-05 01:02:19 +01:00
Graeme Russ
b4feeb4e8a i386: Fix malloc initialization
Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
2009-12-05 01:02:10 +01:00
Graeme Russ
c74bfce0fb i386: Fix dlmalloc compile warning
Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
2009-12-05 01:01:49 +01:00
Joakim Tjernlund
3ee8c12071 crc32: Impl. linux optimized crc32()
Ported over the more efficient linux crc32() function.
A quick comparsion on ppc:
After changing the old crc32 to do 4 bytes in the
inner loop to be able to compare with new version one can note:
- old inner loop has 61 insn, new has 19 insn.
- new crc32 does one 32 bit load of data to crc while
  the old does four 8 bits loads.
- size is bit bigger for the new crc32:
  1392(old) 1416(new) of text. The is because the new version
  shares code with crc32_no_comp() instead of duplicating code.
- about 33% faster on ppc:
  New > crc 0 0xfffffff -> 39 secs
  Old > crc 0 0xfffffff -> 60 secs

Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
2009-12-02 23:42:40 +01:00
Scott Wood
d984fed068 makefiles: fixes for building build tools
Currently, some of the tools instead set CC to be HOSTCC in order to re-use
some pattern rules -- but this fails when the user overrides CC on the make
command line.  Also, the HOSTCFLAGS in tools/Makefile are currently not
being used because config.mk overwrites them.

This patch adds static pattern rules for files that have been requested to
be built with the native compiler using $(HOSTSRCS) and $(HOSTOBJS), and
converts the tools to use them.

It restores easylogo to using the host compiler, which was broken by commit
38d299c2db (if this was an intentional change,
please let me know -- but it seems to be a build tool).

It restores -pedantic and the special flags for darwin and cygwin that were
requested in tools/makefile (but keeps the flags added by config.mk) --
hopefully someone can test this on those platforms.  It no longer
conditionalizes -pedantic on not being darwin; it wasn't clear that that was
intentional, and unless there's a real problem it's just inviting people to
contribute non-pedantic patches to those files (I'm not a fan of -pedantic
personally, but if it's on for one platform it should be on for all).

HOST_LDFLAGS is renamed HOSTLDFLAGS for consistency with the previous
HOST_CFLAGS to HOSTCFLAGS rename.  A new HOSTCFLAGS_NOPED is made available
for those files which currently cannot be built with -pedantic, and replaces
the old FIT_CFLAGS.

imls now uses the cross compiler properly, rather than by trying to
reconstruct CC using the typoed $(CROSS_COMPILER).

envcrc.c is now dependency-processed unconditionally -- previously it would
be built without being on (HOST)SRCS if CONFIG_ENV_IS_EMBEDDED was not
selected.

Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-12-02 22:58:46 +01:00
Mike Frysinger
bf44f3f327 exports: rewrite jump table init
The current jump table init fails to initialize a bunch of exported
symbols (forceenv/do_reset/etc...).  Rather than fix just these few
missing pieces, rewrite the code to utilize the existing list of
exported symbols -- _exports.h.  Since every exported symbol has to
be listed in this header, it makes sense to use it so that we only
ever have one list that needs to be updated and things can't fall
out of sync again.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-12-02 22:53:51 +01:00
Wolfgang Denk
57bf140ac6 Merge branch 'next-sync' of git://git.denx.de/u-boot-arm into next 2009-12-01 12:10:51 +01:00
Tom Rix
71636fa7c3 ARM Update mach-types
Fetched from http://www.arm.linux.org.uk/developer/machines/download.php
And built with

repo http://ftp.arm.linux.org.uk/pub/linux/arm/kernel/git-cur/linux-2.6-arm
commit 3fcca9ac6cbce35b3e81e247d375534117d5f4cd

Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
2009-11-29 17:56:36 -06:00
Vaibhav Hiremath
7c15121f40 omap3_mmc: Encapsulate twl4030 under option CONFIG_TWL4030_POWER
Fixes the build/compilation error if we try to re-use the omap3_mmc code
without TWL4030_POWER.

Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
2009-11-27 16:26:18 -06:00
Sandeep Paulraj
6406d6daea TI DaVinci: Adding a README for the DaVinci series of SOC's
Adding an initial README for the DaVinci series of SOC's

Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2009-11-27 16:26:18 -06:00
Jean-Christophe PLAGNIOL-VILLARD
990f569c4f avr32/hsdramc: Move conditional compilation to Makefile
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj <at> jcrosoft.com>
Cc: Haavard Skinnemoen <haavard.skinnemoen <at> atmel.com>
2009-11-27 16:26:17 -06:00
Sandeep Paulraj
3f12f5217e NAND: Add config option for imx27lite
We will get compilation warnings without
"CONFIG_SYS_64BIT_VSPRINTF" being defined
in the board config.

Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2009-11-27 16:26:17 -06:00
Po-Yu Chuang
43a5f0df2f arm: A320: Add support for Faraday A320 evaluation board
This patch adds support for A320 evaluation board from Faraday. This board
uses FA526 processor by default and has 512kB and 32MB NOR flash, 64M RAM.
FA526 is an ARMv4 processor and uses the ARM920T source in this patch.

Signed-off-by: Po-Yu Chuang <ratbert@faraday-tech.com>
2009-11-27 16:26:17 -06:00
Po-Yu Chuang
39ba774f9b arm: A320: driver for FTRTC010 real time clock
This patch adds an FTRTC010 driver for Faraday A320 evaluation board.

Signed-off-by: Po-Yu Chuang <ratbert@faraday-tech.com>
2009-11-27 16:26:17 -06:00
Sandeep Paulraj
c1ee63cee8 TI DaVinci DM646x: Enable NAND on DM6467 EVM
This patch enables NAND on the DM6467 EVM

Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2009-11-27 16:26:17 -06:00
Nishanth Menon
d414aae552 OMAP3: Fix SDRC init
Defaults are for Infineon DDR timings.
Since none of the supported boards currently do
XIP boot, these seem to be faulty. fix the values
as per the calculations(ACTIMA,B), conf
the sdrc power with pwdnen and wakeupproc bits

Signed-off-by: Nishanth Menon <nm@ti.com>
2009-11-27 16:26:17 -06:00
Nishanth Menon
30563a04bf OMAP3:SDRC: introduce DDR types
Micron DDR timings based on:
http://www.sakoman.net/cgi-bin/gitweb.cgi?p=x-load-omap3.git;a=blob;f=include/asm/arch-omap3/mem.h;h=e6fbfe3947f5d0d85fea776e30821d4017316d86;hb=HEAD

Introduce Micron DDR timings and provide
CONFIG_OMAP3_INFINEON_DDR and CONFIG_OMAP3_MICRON_DDR config
options to allow for platform files to setup their timings as
per the type of DDR selected

Reported-by: Steve Sakoman in http://www.nabble.com/forum/Permalink.jtp?root=25779518&post=25959734&page=y

Signed-off-by: Nishanth Menon <nm@ti.com>
2009-11-27 16:26:16 -06:00
Nishanth Menon
169a4c804d OMAP3:SDRC: Cleanup references to SDP
Remove SDP referenced unused defines

Signed-off-by: Nishanth Menon <nm@ti.com>
2009-11-27 16:26:16 -06:00
Sekhar Nori
2819e1365b TI DA8xx: Integrate DA830 EVM support into U-Boot
Integrate DA830 EVM support into U-Boot.

Provides initial support for TI OMAP-L137/DA830 SoC devices on a Spectrum
Digital EVM board. See http://www.spectrumdigital.com/

Signed-off-by: Nick Thompson <nick.thompson@gefanuc.com>
2009-11-27 16:26:16 -06:00
Sekhar Nori
bdc9c6c7f7 TI DA8xx: Add new directory for da830evm board
Add new directory for da830evm board

Provides initial support for TI OMAP-L137/DA830 SoC devices on a Spectrum
Digital EVM board. See http://www.spectrumdigital.com/

Provides:
Initial boot and configuration.
Support for i2c.
UART support (console).

Signed-off-by: Nick Thompson <nick.thompson@gefanuc.com>
2009-11-27 16:26:15 -06:00
Sekhar Nori
91172baf46 TI DA8xx: Add DA8xx cpu functions
Provides initial support for TI OMAP-L1x/DA8xx SoC devices.
See http://www.ti.com

Provides:
Low level initialisation.
System clock API.
Timer control.

Signed-off-by: Nick Thompson <nick.thompson@gefanuc.com>
2009-11-27 16:26:14 -06:00
Nick Thompson
bbed056e55 Add TI DA8xx support: DA8xx includes
Provides initial support for TI OMAP-L1x/DA8xx SoC devices.
See http://www.ti.com

The DA8xx devices are similar to DaVinci devices but have a differing
memory map and updated peripheral versions.

Signed-off-by: Nick Thompson <nick.thompson@gefanuc.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2009-11-27 16:26:14 -06:00
Nick Thompson
ca8480d444 TI Davinci: add a pin multiplexer configuration API
Creates a method allowing pin settings to be logically grouped into data
structure arrays and provides an API to configure the pinmux settings to
enable the relevant pin functions.

Signed-off-by: Nick Thompson <nick.thompson@gefanuc.com>
2009-11-27 16:26:14 -06:00
Nick Thompson
9868a36dfb TI Davinci timer.c: Remove volatiles and memory mapped structures
Remove volatiles and memory mapped structure accesses and replace with
readl and writel macro usage.

Signed-off-by: Nick Thompson <nick.thompson@gefanuc.com>
2009-11-27 16:26:14 -06:00
Grazvydas Ignotas
c90b32739a OMAP3: pandora: fix booting without serial attached
When the board is booted without serial cable attached (which
is how most of them will be used) UART RX is left floating and
sometimes picks noise, which interrupts countdown and enters
U-Boot prompt instead of booting the kernel.

Fix this by setting up internal pullup on UART RX pin. This
does not prevent serial from working as the internal pullup
is weak.

Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
2009-11-27 16:26:14 -06:00
kevin.morfitt@fearnside-systems.co.uk
ac67804fbb Add a unified s3c24x0 header file
This patch adds a unified s3c24x0 cpu header file that selects the header
file for the specific s3c24x0 cpu from the SOC and CPU configs defined in
board config file. This removes the current chain of s3c24-type #ifdef's
from the s3c24x0 code.

Signed-off-by: Kevin Morfitt <kevin.morfitt@fearnside-systems.co.uk>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2009-11-27 16:26:13 -06:00
Seunghyeon Rhee
a59a23d68a S3C6400/SMDK6400: fix stack_setup in start.S
Fix stack_setup to place the stack on the correct address in DRAM
accroding to U-Boot standard and remove conditional compilation by
CONFIG_MEMORY_UPPER_CODE macro that is not necessry. This macro
was introduced and used only by this board for some unclear reason.

The definition of this macro is also removed because it's not
referenced elsewhere.

Signed-off-by: Seunghyeon Rhee <seunghyeon@lpmtec.com>
Tested-by: Minkyu Kang <mk7.kang@samsung.com>
2009-11-27 16:26:13 -06:00
Minkyu Kang
9400322609 s5pc1xx: serial: fix the error check logic
Because of Frame error, Parity error and Overrun error are occured only receive
operation, need to masking when error checking.

Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2009-11-27 16:26:13 -06:00
kevin.morfitt@fearnside-systems.co.uk
9ebfdc2022 Clean-up of s3c24x0 header files
Cleans up the s3c24x0 header files:

s4c24x0.h: removes the use of 'volatile' from the S3C24X0_REG8,
S3C24X0_REG16 and S3C24X0_REG32 register typedef's. Registers are always
accessed using the IO accessor functions which cast the register address
as 'volatile' anyway so it isn't required here.

s3c2400.h and s3c2410.h: insert a blank line between the static inline
functions

Signed-off-by: Kevin Morfitt <kevin.morfitt@fearnside-systems.co.uk>
2009-11-27 16:26:13 -06:00
Minkyu Kang
47e801bec3 s3c64xx: move s3c64xx header files to asm-arm/arch-s3c64xx
This patch moves the s3c64xx header files from include/
to include/asm-arm/arch-s3c64xx

Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2009-11-27 16:26:13 -06:00
kevin.morfitt@fearnside-systems.co.uk
492fb1fdbc Move s3c24x0 header files to asm-arm/arch-s3c24x0/
This patch moves the s3c24x0 header files from include/ to
include/asm-arm/arch-s3c24x0/.

checkpatch.pl showed 2 errors and 3 warnings. The 2 errors were both due
to a non-UTF8 character in David M?ller's name:

ERROR: Invalid UTF-8, patch and commit message should be encoded in UTF-8
#489: FILE: include/asm-arm/arch-s3c24x0/s3c2410.h:3:
+ * David M?ller ELSOFT AG Switzerland. d.mueller@elsoft.ch

As David's name correctly contains a non-UTF8 character I haven't fixed
these errors.

The 3 warnings were all because of the use of 'volatile' in s3c24x0.h:

WARNING: Use of volatile is usually wrong: see Documentation/volatile-considered-harmful.txt
#673: FILE: include/asm-arm/arch-s3c24x0/s3c24x0.h:35:
+typedef volatile u8	S3C24X0_REG8;
+typedef volatile u16	S3C24X0_REG16;
+typedef volatile u32	S3C24X0_REG32;

I'll fix these errors in another patch.

Tested by running MAKEALL for ARM8 targets and ensuring there were no new
errors or warnings.

Signed-off-by: Kevin Morfitt <kevin.morfitt@fearnside-systems.co.uk>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2009-11-27 16:26:12 -06:00
Tom Rix
2d251ccaa9 ARM Update mach-types
Fetched from http://www.arm.linux.org.uk/developer/machines/download.php
And built with

repo http://ftp.arm.linux.org.uk/pub/linux/arm/kernel/git-cur/linux-2.6-arm
commit 156171c71a0dc4bce12b4408bb1591f8fe32dc1a

Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
2009-11-27 16:26:12 -06:00
Mark Asselstine
c88ed4cb2e sheevaplug: correct SDRAM address control register
value

The SheevaPlug DevKit is shipped with 4x8 by 1Gb DDR devices in
two banks for a total of 512MB of RAM. Based on this configuration
the existing values for SDRAM address control register are incorrect
and result in random kernel oops as memory is incorrectly accessed
(while for example extracting a large tarball such as a rootfs).
Based on the hardware configuration along with the supporting
documentation from Marvell these are the correct values, as
well this change mimics values previously used in Marvell's own
u-boot git tree for the SheevaPlug.

Other variants of the hardware such as the PogoPlug and TonidoPlug
may have different memory configurations but to properly support
those additional board directories should be maintained or a better
system to support other kwb*.cfg is needed.

Tested on SheevaPlug DevKit.

Signed-off-by: Mark Asselstine <mark.asselstine@windriver.com>
2009-11-27 16:26:12 -06:00
Sandeep Paulraj
9829cabbaa Fix for Void function returning value in sbc35-a9g20
Void function was returning 0 in the m41t94 rtc driver.
This makes it similar to m41t62 rtc driver.

Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2009-11-27 16:26:11 -06:00
Tom Rix
d5e2d625c7 ARM Update mach-types.h
From http://ftp.arm.linux.org.uk/pub/linux/arm/kernel/git-cur/linux-2.6-arm

Commit id 0996391139f43d032335b5360db11da62a2cbb39

Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
2009-11-27 16:26:10 -06:00
Matthias Fuchs
34ddbd171b ppc4xx: Remove autoupdate feature from PLU405 board
The autoupdate feature is not used on PLU405 boards.
So remove it.

Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
Signed-off-by: Stefan Roese <sr@denx.de>
2009-11-25 10:57:33 +01:00
Wolfgang Denk
2f6f67da1b Merge branch 'next' of git://www.denx.de/git/u-boot-ppc4xx into next 2009-11-24 23:13:06 +01:00
Stefan Roese
eb5eb2b0f7 ppc4xx: Cleanup PPC4xx I2C infrastructure
This patch cleans up the PPC4xx I2C intrastructure:

- Use C struct to describe the I2C registers instead of defines
- Coding style cleanup (braces, whitespace, comments, line length)
- Extract common code from i2c_read() and i2c_write()
- Remove unneeded IIC defines from ppc405.h & ppc440.h

Signed-off-by: Stefan Roese <sr@denx.de>
2009-11-23 16:27:02 +01:00
Stefan Roese
b2f618f215 ppc4xx: Remove some testing code from 4xx_pcie.c
This code got included accidentally.

Signed-off-by: Stefan Roese <sr@denx.de>
2009-11-23 16:25:47 +01:00
Daniel Gorsulowski
4e574c4e2d at91: Extended soft_i2c driver for AT91SAM9263 SoC
While hard_i2c support is not available
(see http://lists.denx.de/pipermail/u-boot/2009-March/049751.html),
this patch enables soft_i2c on AT91SAM9263 SoC.

Signed-off-by: Daniel Gorsulowski <Daniel.Gorsulowski@esd.eu>
2009-11-23 09:26:54 +01:00
Peter Tyser
396fd17338 Add 'true' and 'false' commands
These commands are only enabled when the hush shell is enabled and can
be useful in scripts such as:

while true do
    echo "Booting OS...";
    run $bootcmd;
    echo "Booting OS failed";
    sleep 10;
done

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2009-11-23 00:06:13 +01:00
Peter Tyser
4e1ca93b6b cmd_help: General cleanup
Shorten the overly-verbose help message of 'help' and clean up some
redundant ifdefery while we're at it.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2009-11-23 00:06:12 +01:00
Peter Tyser
6b8f5ad10f command.c: Break commands out to appropriate cmd_*.c files
command.c should contain common code related to commands, not
miscellaneous command implementations.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2009-11-23 00:06:11 +01:00
Wolfgang Denk
db6ab438d6 Merge branch 'next' of git://git.denx.de/u-boot-nand-flash into next 2009-11-21 23:17:57 +01:00
Wolfgang Denk
77b2517519 Merge branch 'next' of git://www.denx.de/git/u-boot-ppc4xx into next 2009-11-21 23:14:58 +01:00
Sandeep Paulraj
10a5a79912 NAND: Add Support for 4K page size in DaVinci NAND driver
This patch adds support for NAND devices with a page size of
4K in the DaVinci NAND driver. The layout matches the layout that TI uses
for 4K page size NAND devices in the kernel NAND driver.

Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2009-11-20 13:15:38 -06:00
Matthias Fuchs
14ce02c881 ppc4xx: Remove unused features from PMC440 board support
This patch shrinks the PMC440 u-boot binary (from next branch)
to fit into 384kB again.

Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
Signed-off-by: Stefan Roese <sr@denx.de>
2009-11-19 11:39:43 +01:00
Matthias Fuchs
629ab99b3b ppc4xx: Remove confusing comment
This is not the sequoia board.

Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
Signed-off-by: Stefan Roese <sr@denx.de>
2009-11-19 11:39:36 +01:00
Stefan Roese
79e2d8df37 ppc4xx: alpr: Remove some not needed commands to make image fit again
The latest changes in the u-boot/next branch increased the size of the
alpr image a bit more. Now it doesn't fit into the 256k reserved for it.
This patch now removes the commands "askenv" and "irq" which are not
needed in the production systems.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Pieter Voorthuijsen <pieter.voorthuijsen@prodrive.nl>
2009-11-19 11:35:52 +01:00
Stefan Roese
6c70049bd1 ppc4xx: Consolidate pci_master_init() function
This patch removes the duplicted implementations of the pci_master_init()
function by introducing a weak default function for it. It can be
overridden by a board specific version.

Signed-off-by: Stefan Roese <sr@denx.de>
2009-11-19 11:35:34 +01:00
Stefan Roese
a760b02031 ppc4xx: Consolidate pci_pre_init() function
This patch removes the duplicted implementations of the pci_pre_init()
function by introducing a weak default function for it. This weak default
has a different implementation for some PPC variants. It can be
overridden by a board specific version.

Signed-off-by: Stefan Roese <sr@denx.de>
2009-11-19 11:35:30 +01:00
Stefan Roese
1095493a5d ppc4xx: Consolidate pci_target_init() function
This patch removes the duplicted implementations of the pci_target_init()
function by introducing a weak default function for it. This weak default
has a different implementation for 440EP(x)/GR(x) PPC's. It can be
overridden by a board specific version (e.g. PMC440, korat).

Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Matthias Fuchs <matthias.fuchs@esd.eu>
2009-11-19 11:35:08 +01:00
Hui.Tang
5e1ded558b S3C2410 NAND Flash Add Missing Function
This patch add nand_read_buf() for S3C2410 NAND SPL.
In nand_spl/nand_boot.c, nand_boot() will check nand->select_chip,
so nand->select_chip should also be initialized.

Signed-off-by: Hui.Tang <zetalabs@gmail.com>
2009-11-18 14:30:13 -06:00
Sandeep Paulraj
6cd752f927 NAND: Update read_read_subpage API check
This patch updates a check condition in the NAND driver.
The check condition is similat to what is in linux/next.

Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2009-11-18 14:26:40 -06:00
Sandeep Paulraj
bb3e9828e7 NAND:Extending the nand_ecclayout structure
NANDs with page size of lesser than and equal to 2K are
reaching EOL. They are bing replaced with NANDs of
page size 4K and above.
To support this we have to extend the eccpos field

Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2009-11-18 14:26:39 -06:00
Dirk Behme
1d2e96de56 OMAP2/3: I2C: Add support for second and third bus
Add support to use second and third I2C bus, too.

Bus 0 is still the default, but by calling i2c_set_bus_num(1/2) before doing
I2C accesses, code can switch to bus 1 and 2, too. Don't forget to switch
back afterwards, then.

Signed-off-by: Dirk Behme <dirk.behme@googlemail.com>
2009-11-16 07:25:15 +01:00
Wolfgang Denk
06f43286c6 Merge branch 'master' into next 2009-11-15 23:13:40 +01:00
Amul Kumar Saha
c758e947aa ENV Variable support for Flex-OneNAND
Define and use CONFIG_ENV_ADDR_FLEX and CONFIG_ENV_SIZE_FLEX
for storing environment variables.

Signed-off-by: Rohit Hagargundgi <h.rohit@samsung.com>
Signed-off-by: Amul Kumar Saha <amul.saha@samsung.com>
2009-11-13 16:56:18 -06:00
Amul Kumar Saha
cacbe91958 Flex-OneNAND driver support
This patch adds support for Flex-OneNAND devices.

Signed-off-by: Rohit Hagargundgi <h.rohit@samsung.com>
Signed-off-by: Amul Kumar Saha <amul.saha@samsung.com>
2009-11-13 16:56:18 -06:00
Mingkai Hu
35209cbcee fsl_elbc_nand: remove the bbt descriptors relocation fixup
The commit 66372fe2 manually relocated the bbt pattern pointer,
which can be removed by using full relocation.

Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
2009-11-13 16:56:18 -06:00
Mingkai Hu
25643d4da2 ppc/85xx: make boot from NAND full relocation to RAM
Take advantage of the latest full relocation commit of PPC platform
for boot from NAND.

Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
Acked-by: Kumar Gala <galak@kernel.crashing.org>
2009-11-13 16:56:17 -06:00
David Brownell
7e86661cd7 NAND: fix "raw" reads with ECC syndrome layouts
The syndrome based page read/write routines store ECC, and possibly other
"OOB" data, right after each chunk of ECC'd data.  With ECC chunk size of
512 bytes and a large page (2KiB) NAND, the layout is:

  data-0 OOB-0 data-1 OOB-1 data-2 OOB-2 data-3 OOB-3 OOB-leftover

Where OOBx is (prepad, ECC, postpad).  However, the current "raw" routines
use a traditional layout -- data OOB, disregarding the prepad and postpad
values -- so when they're used with that type of ECC hardware, those calls
mix up the data and OOB.  Which means, in particular, that bad block
tables won't be found on startup, with data corruption and related chaos
ensuing.

The current syndrome-based drivers in mainline all seem to use one chunk
per page; presumably they haven't noticed such bugs.

Fix this, by adding read/write page_raw_syndrome() routines as siblings of
the existing non-raw routines; "raw" just means to bypass the ECC
computations, not change data and OOB layout.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2009-11-13 16:56:17 -06:00
Sandeep Paulraj
5df3c2b62c NAND: Don't walk past end of oobfree[]
When computing oobavail from the list of free areas in the OOB,
don't assume there will always be an unused slot at the end.
This syncs up with the kernel NAND driver.

Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2009-11-13 16:56:16 -06:00
Sandeep Paulraj
18b5a4b43a NAND: Update check condition for nand_read_page_hwecc API
The patch updates the check condition for determining
whether the ECC corrections has failed.
This makes it similar to what is in the kernel NAND driver.

Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2009-11-13 16:56:16 -06:00
Sandeep Paulraj
e25ee03962 NAND: Updating comments/explanations in the NAND driver
Patch updates the comments and explanations for
the arguments to various functions.

Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2009-11-13 16:56:16 -06:00
Sandeep Paulraj
aad4a28b25 NAND: Subpage shift for ecc_steps equal to 16
This was originally part of Thomas Gleixner's patch for
adding support for 4KiB pages.
This is not part of the U-Boot NAND driver so updating the
driver with this to sync up with the kernel NAND driver.

Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2009-11-13 16:56:15 -06:00
Sandeep Paulraj
36e0b98ec8 NAND: Remove commented out code
Patch removes already commented out dead code

Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2009-11-13 16:56:15 -06:00
Sandeep Paulraj
4f41e7ea1a NAND: Correct the "chip_shift" calculation
This patch updates the "chip_shift" calculation in the
NAND driver. This is being done to sync up the NAND driver with
the kernel NAND driver.

Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2009-11-13 16:56:15 -06:00
Sandeep Paulraj
aaa8eec532 NAND: Update to support 64 bit device size
This patch adds support for NANDs greater than 2 GB.
Patch is based on the MTD NAND driver in the kernel.

Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-11-13 16:56:14 -06:00
Peter Tyser
581d04f14d cmd_nand: Move conditional compilation to Makefile
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2009-11-13 16:56:14 -06:00
Peter Tyser
9574fd63a9 cmd_nand: Remove duplicate include
Also remove vague, unnecessary comment

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2009-11-13 16:56:13 -06:00
Stefan Roese
efe12bcec5 ppc4xx: Katmai: Add chip_config command
This patch removes the Katmai "bootstrap" command and replaces it
with the now common command "chip_config".

Signed-off-by: Stefan Roese <sr@denx.de>
2009-11-10 15:09:37 +01:00
Stefan Roese
cdaed5dc31 ppc4xx: Switch to I2C bus numer 0 for chip_config command
All currently available 4xx derivats have the I2C bootstrap EEPROM
located on I2C bus number 0. This patch now first sets this bus number,
so that the chip_config command also works for board with multiple
I2C busses, like Katmai.

Signed-off-by: Stefan Roese <sr@denx.de>
2009-11-10 15:09:28 +01:00
Matthias Fuchs
985edaccc4 ppc4xx: Add UBI support to PLU405 boards
-add UBI support
-increase malloc'able memory size
-cleanup MONITOR|FLASH_BASE|LEN constants

Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
Signed-off-by: Stefan Roese <sr@denx.de>
2009-11-10 15:07:03 +01:00
Stefan Roese
56f9b39d1f ppc4xx: Fix NAND booting targets after 4xx linker script consolidation
Somehow I missed the NAND booting targets in the 4xx linker script
consolidation patchset. This patch fixes this issue.

Signed-off-by: Stefan Roese <sr@denx.de>
2009-11-09 13:01:19 +01:00
Stefan Roese
9a81c61249 ppc4xx: Remove duplicated is_pci_host() functions
This patch introduces a weak default function for is_pci_host(),
returning 1. This is the default behaviour, since most boards only
implement PCI host functionality. This weak default can be overridden
by a board specific version if needed.

Signed-off-by: Stefan Roese <sr@denx.de>
2009-11-09 11:27:08 +01:00
Stefan Roese
b0b867462c ppc4xx: Consolidate 4xx PCIe board specific configuration
This patch consolidates the PPC4xx board specific PCIe configuration
code. This way the duplicated code is removed. Boards can implement a
special, non standard behaviour (e.g. number of PCIe slots, etc) by
overriding the weak default functions.

Signed-off-by: Stefan Roese <sr@denx.de>
2009-11-09 11:26:57 +01:00
Stefan Roese
2cd95a25cb ppc4xx: Remove board specific linker scripts from most PPC4xx boards
All these linker scripts can be removed since the new common ppc4xx
linker script should be able to handle all of those boards.

Please test and report problems. Thanks.

Signed-off-by: Stefan Roese <sr@denx.de>
2009-11-02 16:29:04 +01:00
Stefan Roese
4649913ea5 ppc4xx: Add common ppc4xx linker script
This linker script can be used by all PPC4xx platforms. It works for
PPC405 and PPC440 platforms. Boards which need a board specific linker
script can override this default linker script in board/*/config.mk.

Signed-off-by: Stefan Roese <sr@denx.de>
2009-11-02 16:29:04 +01:00
Stefan Roese
b1245dd3c6 ppc4xx: Add custom linker script to board/*/config.mk
These boards have special linker scripts right now. We can't use the
common 4xx linker script here. So overrride the linker script (LDSCRIPT)
in board/*/config.mk and choose the board specific version.

Signed-off-by: Stefan Roese <sr@denx.de>
2009-11-02 16:29:04 +01:00
Stefan Roese
ceaa62a6f0 ppc4xx: Fix problems in some ppc4xx board Makefiles
Some 4xx Makefiles didn't add $(SOBJ) to their board library. This was
no till now problem, since those boards included this object (init.o
most of the time) directly from their linker scripts. This patch clean
this up, so that all objects are now collected in the board library. This
is in preparation for the upcoming PPC4xx linker script consolidation.

Signed-off-by: Stefan Roese <sr@denx.de>
2009-11-02 16:29:03 +01:00
Stefan Roese
a0ff1f129a ppc4xx: sc3: Remove unreferenced external declarations from sc3.h
Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Heiko Schocher <hs@denx.de>
2009-11-02 16:29:03 +01:00
Stefan Roese
7ec1fedda6 mkconfig: Create board directory (CONFIG_BOARDDIR) in include/config.h
This patch extends the mkconfig script to automatically create a define
for the board directory in include/config.h:

#define CONFIG_BOARDDIR board/amcc/canyonlands

This is needed for the upcoming PPC4xx linker script consolidation,
where the PPC440 platforms need to include a board specific file in
the common linker script.

Signed-off-by: Stefan Roese <sr@denx.de>
2009-11-02 16:29:03 +01:00
Wolfgang Grandegger
cd12f615e4 mpc52xx: add support for the IPEK01 board
This patch adds support for the board IPEK01 based on the MPC5200.
The Futjitsu Lime graphics controller is configured in 16 bpp mode.

Signed-off-by: Wolfgang Grandegger <wg@denx.de>
2009-10-31 16:14:35 +01:00
Wolfgang Denk
d793b6bb1e Merge branch 'next' of git://git.denx.de/u-boot-video into next 2009-10-31 16:13:18 +01:00
Wolfgang Grandegger
229b6dce67 video: mb862xx: add option VIDEO_FB_16BPP_WORD_SWAP for IPEK01
In 16 bpp mode, the new IPEK01 board only requires swapping of D16 words
for D32 accesses due to the diffferent connecting to the GDC bus. This
patch introduces the configuration option VIDEO_FB_16BPP_WORD_SWAP,
which should be set for all board using the mb862xx in 16 bpp mode. For
the IPEK01, VIDEO_FB_16BPP_PIXEL_SWAP should not be set.

Signed-off-by: Wolfgang Grandegger <wg@denx.de>
2009-10-31 12:17:40 +01:00
Anatolij Gustschin
5d16ca8710 video: mb862xx: add option CONFIG_VIDEO_MB862xx_ACCEL for 32bpp mode
The new IPEK01 board can use the 32 bpp mode for the Lime graphics
controller. For this mode, video accelaration does not work. This patch
makes the accelaration configurable via CONFIG_VIDEO_MB862xx_ACCEL,
which is enabled for the lwmon5 and the socrates board for backward
compatibility.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
Signed-off-by: Wolfgang Grandegger <wg@denx.de>
2009-10-31 12:16:29 +01:00
Wolfgang Grandegger
c28d3bbe96 video: mb862xx: improve board-specific Lime configuration
To avoid board-specific code accessing the mb862xx registers directly,
the public function mb862xx_probe() has been introduced. Furthermore,
the "Change of Clock Frequency" and "Set Memory I/F Mode" registers
are now defined by CONFIG_SYS_MB862xx_CCF and CONFIG_SYS_MB862xx__MMR,
respectively. The BSPs for the socrates and lwmon5 boards have been
adapted accordingly.

Signed-off-by: Wolfgang Grandegger <wg@denx.de>
2009-10-31 12:13:28 +01:00
Valentin Yakovenkov
08ea550eef new PCA9564 i2c bridge driver
Signed-off-by: Valentin Yakovenkov <yakovenkov@niistt.ru>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-10-30 15:10:58 +01:00
Mike Frysinger
08a1c6258c Blackfin: TWI/I2C: implement bus speed get/set functions
While we're here, improve the speed calculation a bit to match the HRM.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-10-30 15:10:58 +01:00
Mike Frysinger
3814ea4f00 Blackfin: TWI/I2C: add timeout to transfer
The current transfer code relies on ctrlc() to abort transfers, but this
requires user interactivity.  Naturalize the process with a timeout.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-10-30 15:10:58 +01:00
1185 changed files with 53800 additions and 72323 deletions

6230
CHANGELOG

File diff suppressed because it is too large Load Diff

View File

@@ -36,6 +36,7 @@ Reinhard Arlt <reinhard.arlt@esd-electronics.com>
mecp5200 MPC5200
pf5200 MPC5200
caddy2 MPC8349
vme8349 MPC8349
CPCI750 PPC750FX/GX
@@ -117,7 +118,6 @@ Wolfgang Denk <wd@denx.de>
CU824 MPC8240
Sandpoint8240 MPC8240
SL8245 MPC8245
ATC MPC8250
PM825 MPC8250
@@ -133,8 +133,6 @@ Wolfgang Denk <wd@denx.de>
PCIPPC2 MPC750
PCIPPC6 MPC750
EXBITGEN PPC405GP
Jon Diekema <jon.diekema@smiths-aerospace.com>
sbc8260 MPC8260
@@ -151,6 +149,10 @@ Dave Ellis <DGE@sixnetio.com>
SXNI855T MPC8xx
Fred Fan <fanyefeng@gmail.com>
mx51evk i.MX51
Thomas Frieden <ThomasF@hyperion-entertainment.com>
AmigaOneG3SE MPC7xx
@@ -201,6 +203,8 @@ Frank Gottschling <fgottschling@eltec.de>
Wolfgang Grandegger <wg@denx.de>
ipek01 MPC5200
CCM MPC855
PN62 MPC8240
@@ -408,9 +412,9 @@ Heiko Schocher <hs@denx.de>
muas3001 MPC8270
municse MPC5200
sc3 PPC405GP
suen3 ARM926EJS (Kirkwood SoC)
uc101 MPC5200
Peter De Schrijver <p2@mind.be>
ML2 PPC4xx
@@ -543,6 +547,10 @@ Rick Bronson <rick@efn.org>
AT91RM9200DK at91rm9200
Po-Yu Chuang <ratbert@faraday-tech.com>
a320evb FA526 (ARM920T-like) (a320 SoC)
George G. Davis <gdavis@mvista.com>
assabet SA1100
@@ -567,6 +575,7 @@ Peter Figuli <peposh@etc.sk>
Daniel Gorsulowski <daniel.gorsulowski@esd.eu>
meesc ARM926EJS (AT91SAM9263 SoC)
otc570 ARM926EJS (AT91SAM9263 SoC)
Sedji Gaouaou<sedji.gaouaou@atmel.com>
at91sam9g10ek ARM926EJS (AT91SAM9G10 SoC)
@@ -591,6 +600,16 @@ Gary Jennejohn <garyj@denx.de>
smdk2400 ARM920T
trab ARM920T
Matthias Kaehlcke <matthias@kaehlcke.net>
edb9301 ARM920T (EP9301)
edb9302 ARM920T (EP9302)
edb9302a ARM920T (EP9302)
edb9307 ARM920T (EP9307)
edb9307a ARM920T (EP9307)
edb9312 ARM920T (EP9312)
edb9315 ARM920T (EP9315)
edb9315a ARM920T (EP9315)
Konstantin Kletschke <kletschke@synertronixx.de>
scb9328 ARM920T
@@ -681,6 +700,10 @@ Tom Rix <Tom.Rix@windriver.com>
omap3_zoom2 ARM CORTEX-A8 (OMAP3xx SoC)
John Rigby <jcrigby@gmail.com>
tx25 i.MX25
Stefan Roese <sr@denx.de>
ixdpg425 xscale
@@ -690,12 +713,16 @@ Stefan Roese <sr@denx.de>
Alessandro Rubini <rubini@unipv.it>
Nomadik Linux Team <STN_WMM_nomadik_linux@list.st.com>
nmdk8815 ARM926EJS (Nomadik 8815 Soc)
nhk8815 ARM926EJS (Nomadik 8815 Soc)
Steve Sakoman <sakoman@gmail.com>
omap3_overo ARM CORTEX-A8 (OMAP3xx SoC)
Jens Scharsig <esw@bus-elektronik.de>
eb_cpux9k2 ARM920T (AT91RM9200 SoC)
Robert Schwebel <r.schwebel@pengutronix.de>
csb226 xscale
@@ -712,6 +739,10 @@ Andrea Scian <andrea.scian@dave-tech.it>
B2 ARM7TDMI (S3C44B0X)
Nick Thompson <nick.thompson@gefanuc.com>
da830evm ARM926EJS (DA830/OMAP-L137)
Albin Tonnerre <albin.tonnerre@free-electrons.com>
sbc35_a9g20 ARM926EJS (AT91SAM9G20 SoC)
@@ -932,6 +963,7 @@ Blackfin Team <u-boot-devel@blackfin.uclinux.org>
BF518F-EZBRD BF518
BF526-EZBRD BF526
BF527-EZKIT BF527
BF527-EZKIT-V2 BF527
BF533-EZKIT BF533
BF533-STAMP BF533
BF537-PNAV BF537
@@ -949,6 +981,7 @@ Blackfin Team <u-boot-devel@blackfin.uclinux.org>
CM-BF537U BF537
CM-BF548 BF548
CM-BF561 BF561
TCM-BF518 BF518
TCM-BF537 BF537
Martin Strubel <strubel@section5.ch>
@@ -967,6 +1000,11 @@ Blackfin Team <u-boot-devel@blackfin.uclinux.org>
IBF-DSP561 BF561
Valentin Yakovenkov <yakovenkov@niistt.ru>
Anton Shurpin <shurpin.aa@niistt.ru>
BF561-ACVILON BF561
#########################################################################
# End of MAINTAINERS list #
#########################################################################

30
MAKEALL
View File

@@ -64,6 +64,7 @@ LIST_5xxx=" \
icecube_5100 \
icecube_5200 \
inka4x0 \
ipek01 \
lite5200b \
mcc200 \
mecp5200 \
@@ -212,7 +213,6 @@ LIST_4xx=" \
DU440 \
ebony \
ERIC \
EXBITGEN \
fx12mm \
G2000 \
gdppc440etx \
@@ -238,7 +238,6 @@ LIST_4xx=" \
MIP405 \
MIP405T \
ML2 \
ml300 \
ml507 \
ml507_flash \
neo \
@@ -312,7 +311,6 @@ LIST_824x=" \
Sandpoint8240 \
Sandpoint8245 \
sbc8240 \
SL8245 \
utx8245 \
"
@@ -357,10 +355,12 @@ LIST_8260=" \
#########################################################################
LIST_83xx=" \
caddy2 \
kmeter1 \
MPC8313ERDB_33 \
MPC8313ERDB_NAND_66 \
MPC8315ERDB \
MPC8315ERDB_NAND \
MPC8323ERDB \
MPC832XEMDS \
MPC832XEMDS_ATM \
@@ -400,6 +400,8 @@ LIST_85xx=" \
MPC8560ADS \
MPC8568MDS \
MPC8569MDS \
MPC8569MDS_ATM \
MPC8569MDS_NAND \
MPC8572DS \
MPC8572DS_36BIT \
P2020DS \
@@ -539,6 +541,7 @@ LIST_ARM7=" \
#########################################################################
LIST_ARM9=" \
a320evb \
ap920t \
ap922_XA10 \
ap926ejs \
@@ -549,6 +552,15 @@ LIST_ARM9=" \
cp926ejs \
cp946es \
cp966 \
da830evm \
edb9301 \
edb9302 \
edb9302a \
edb9307 \
edb9307a \
edb9312 \
edb9315 \
edb9315a \
imx27lite \
lpd7a400 \
mv88f6281gtw_ge \
@@ -569,6 +581,11 @@ LIST_ARM9=" \
sheevaplug \
smdk2400 \
smdk2410 \
spear300 \
spear310 \
spear320 \
spear600 \
suen3 \
trab \
VCMA9 \
versatile \
@@ -581,6 +598,7 @@ LIST_ARM9=" \
davinci_sonata \
davinci_dm355evm \
davinci_dm355leopard \
davinci_dm365evm \
davinci_dm6467evm \
"
@@ -614,6 +632,7 @@ LIST_ARM11=" \
#########################################################################
LIST_ARM_CORTEX_A8=" \
devkit8000 \
mx51evk \
omap3_beagle \
omap3_overo \
omap3_evm \
@@ -645,10 +664,12 @@ LIST_at91=" \
CPU9260 \
CPU9G20 \
csb637 \
eb_cpux9k2 \
kb9202 \
meesc \
mp2usb \
m501sk \
otc570 \
pm9261 \
pm9263 \
SBC35_A9G20 \
@@ -866,6 +887,7 @@ LIST_blackfin=" \
bf518f-ezbrd \
bf526-ezbrd \
bf527-ezkit \
bf527-ezkit-v2 \
bf533-ezkit \
bf533-stamp \
bf537-minotaur \
@@ -874,6 +896,7 @@ LIST_blackfin=" \
bf537-stamp \
bf538f-ezkit \
bf548-ezkit \
bf561-acvilon \
bf561-ezkit \
blackstamp \
cm-bf527 \
@@ -883,6 +906,7 @@ LIST_blackfin=" \
cm-bf548 \
cm-bf561 \
ibf-dsp561 \
tcm-bf518 \
tcm-bf537 \
"

148
Makefile
View File

@@ -21,8 +21,8 @@
# MA 02111-1307 USA
#
VERSION = 2009
PATCHLEVEL = 11
VERSION = 2010
PATCHLEVEL = 03
SUBLEVEL =
EXTRAVERSION =
ifneq "$(SUBLEVEL)" ""
@@ -218,7 +218,6 @@ LIBS += drivers/mtd/ubi/libubi.a
LIBS += drivers/mtd/spi/libspi_flash.a
LIBS += drivers/net/libnet.a
LIBS += drivers/net/phy/libphy.a
LIBS += drivers/net/sk98lin/libsk98lin.a
LIBS += drivers/pci/libpci.a
LIBS += drivers/pcmcia/libpcmcia.a
LIBS += drivers/power/libpower.a
@@ -230,12 +229,10 @@ ifeq ($(CPU),mpc85xx)
LIBS += drivers/qe/qe.a
LIBS += cpu/mpc8xxx/ddr/libddr.a
LIBS += cpu/mpc8xxx/lib8xxx.a
TAG_SUBDIRS += cpu/mpc8xxx
endif
ifeq ($(CPU),mpc86xx)
LIBS += cpu/mpc8xxx/ddr/libddr.a
LIBS += cpu/mpc8xxx/lib8xxx.a
TAG_SUBDIRS += cpu/mpc8xxx
endif
LIBS += drivers/rtc/librtc.a
LIBS += drivers/serial/libserial.a
@@ -243,6 +240,7 @@ LIBS += drivers/twserial/libtws.a
LIBS += drivers/usb/gadget/libusb_gadget.a
LIBS += drivers/usb/host/libusb_host.a
LIBS += drivers/usb/musb/libusb_musb.a
LIBS += drivers/usb/phy/libusb_phy.a
LIBS += drivers/video/libvideo.a
LIBS += drivers/watchdog/libwatchdog.a
LIBS += common/libcommon.a
@@ -309,7 +307,7 @@ $(obj)u-boot.bin: $(obj)u-boot
$(OBJCOPY) ${OBJCFLAGS} -O binary $< $@
$(obj)u-boot.ldr: $(obj)u-boot
$(obj)tools/envcrc --binary > $(obj)env-ldr.o
$(CREATE_LDR_ENV)
$(LDR) -T $(CONFIG_BFIN_CPU) -c $@ $< $(LDR_FLAGS)
$(obj)u-boot.ldr.hex: $(obj)u-boot.ldr
@@ -325,6 +323,10 @@ $(obj)u-boot.img: $(obj)u-boot.bin
sed -e 's/"[ ]*$$/ for $(BOARD) board"/') \
-d $< $@
$(obj)u-boot.imx: $(obj)u-boot.bin
$(obj)tools/mkimage -n $(IMX_CONFIG) -T imximage \
-e $(TEXT_BASE) -d $< $@
$(obj)u-boot.kwb: $(obj)u-boot.bin
$(obj)tools/mkimage -n $(KWD_CONFIG) -T kwbimage \
-a $(TEXT_BASE) -e $(TEXT_BASE) -d $< $@
@@ -399,54 +401,25 @@ updater:
env:
$(MAKE) -C tools/env all MTD_VERSION=${MTD_VERSION} || exit 1
# Explicitly make _depend in subdirs containing multiple targets to prevent
# parallel sub-makes creating .depend files simultaneously.
depend dep: $(TIMESTAMP_FILE) $(VERSION_FILE) $(obj)include/autoconf.mk
for dir in $(SUBDIRS) ; do $(MAKE) -C $$dir _depend ; done
for dir in $(SUBDIRS) cpu/$(CPU) $(dir $(LDSCRIPT)) ; do \
$(MAKE) -C $$dir _depend ; done
TAG_SUBDIRS = $(SUBDIRS)
TAG_SUBDIRS += $(dir $(__LIBS))
TAG_SUBDIRS += include
TAG_SUBDIRS += lib_generic board/$(BOARDDIR)
TAG_SUBDIRS += cpu/$(CPU)
TAG_SUBDIRS += lib_$(ARCH)
TAG_SUBDIRS += fs/cramfs
TAG_SUBDIRS += fs/fat
TAG_SUBDIRS += fs/fdos
TAG_SUBDIRS += fs/jffs2
TAG_SUBDIRS += fs/yaffs2
TAG_SUBDIRS += net
TAG_SUBDIRS += disk
TAG_SUBDIRS += common
TAG_SUBDIRS += drivers/bios_emulator
TAG_SUBDIRS += drivers/block
TAG_SUBDIRS += drivers/gpio
TAG_SUBDIRS += drivers/hwmon
TAG_SUBDIRS += drivers/i2c
TAG_SUBDIRS += drivers/input
TAG_SUBDIRS += drivers/misc
TAG_SUBDIRS += drivers/mmc
TAG_SUBDIRS += drivers/mtd
TAG_SUBDIRS += drivers/mtd/nand
TAG_SUBDIRS += drivers/mtd/onenand
TAG_SUBDIRS += drivers/mtd/spi
TAG_SUBDIRS += drivers/net
TAG_SUBDIRS += drivers/net/sk98lin
TAG_SUBDIRS += drivers/pci
TAG_SUBDIRS += drivers/pcmcia
TAG_SUBDIRS += drivers/qe
TAG_SUBDIRS += drivers/rtc
TAG_SUBDIRS += drivers/serial
TAG_SUBDIRS += drivers/spi
TAG_SUBDIRS += drivers/usb
TAG_SUBDIRS += drivers/video
tags ctags:
ctags -w -o $(obj)ctags `find $(SUBDIRS) $(TAG_SUBDIRS) \
-name '*.[ch]' -print`
ctags -w -o $(obj)ctags `find $(TAG_SUBDIRS) \
-name '*.[chS]' -print`
etags:
etags -a -o $(obj)etags `find $(SUBDIRS) $(TAG_SUBDIRS) \
-name '*.[ch]' -print`
etags -a -o $(obj)etags `find $(TAG_SUBDIRS) \
-name '*.[chS]' -print`
cscope:
find $(SUBDIRS) $(TAG_SUBDIRS) -name '*.[ch]' -print \
> cscope.files
find $(TAG_SUBDIRS) -name '*.[chS]' -print > cscope.files
cscope -b -q -k
SYSTEM_MAP = \
@@ -481,10 +454,15 @@ $(obj)include/autoconf.mk: $(obj)include/config.h
else # !config.mk
all $(obj)u-boot.hex $(obj)u-boot.srec $(obj)u-boot.bin \
$(obj)u-boot.img $(obj)u-boot.dis $(obj)u-boot \
$(SUBDIRS) $(TIMESTAMP_FILE) $(VERSION_FILE) gdbtools updater env depend \
dep tags ctags etags cscope $(obj)System.map:
$(filter-out tools,$(SUBDIRS)) $(TIMESTAMP_FILE) $(VERSION_FILE) gdbtools \
updater env depend dep tags ctags etags cscope $(obj)System.map:
@echo "System not configured - see README" >&2
@ exit 1
tools:
$(MAKE) -C tools
tools-all:
$(MAKE) -C tools HOST_TOOLS_ALL=y
endif # config.mk
.PHONY : CHANGELOG
@@ -606,6 +584,9 @@ jupiter_config: unconfig
inka4x0_config: unconfig
@$(MKCONFIG) inka4x0 ppc mpc5xxx inka4x0
ipek01_config: unconfig
@$(MKCONFIG) -a ipek01 ppc mpc5xxx ipek01
lite5200b_config \
lite5200b_PM_config \
lite5200b_LOWBOOT_config: unconfig
@@ -1354,9 +1335,6 @@ ebony_config: unconfig
ERIC_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc ppc4xx eric
EXBITGEN_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc ppc4xx exbitgen
fx12mm_flash_config: unconfig
@mkdir -p $(obj)include $(obj)board/xilinx/ppc405-generic
@mkdir -p $(obj)include $(obj)board/avnet/fx12mm
@@ -1457,9 +1435,6 @@ MIP405T_config: unconfig
ML2_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc ppc4xx ml2
ml300_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc ppc4xx ml300 xilinx
ml507_flash_config: unconfig
@mkdir -p $(obj)include $(obj)board/xilinx/ppc440-generic
@mkdir -p $(obj)include $(obj)board/xilinx/ml507
@@ -1762,9 +1737,6 @@ Sandpoint8245_config: unconfig
sbc8240_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc mpc824x sbc8240
SL8245_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc mpc824x sl8245
utx8245_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc mpc824x utx8245
@@ -2291,8 +2263,9 @@ MPC8313ERDB_NAND_66_config: unconfig
echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk ; \
fi ;
MPC8315ERDB_NAND_config \
MPC8315ERDB_config: unconfig
@$(MKCONFIG) -a MPC8315ERDB ppc mpc83xx mpc8315erdb freescale
@$(MKCONFIG) -t $(@:_config=) MPC8315ERDB ppc mpc83xx mpc8315erdb freescale
MPC8323ERDB_config: unconfig
@$(MKCONFIG) -a MPC8323ERDB ppc mpc83xx mpc8323erdb freescale
@@ -2426,8 +2399,19 @@ SIMPC8313_SP_config: unconfig
TQM834x_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc mpc83xx tqm834x tqc
caddy2_config \
vme8349_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc mpc83xx vme8349 esd
@$(MKCONFIG) -t $(@:_config=) vme8349 ppc mpc83xx vme8349 esd
edb9301_config \
edb9302_config \
edb9302a_config \
edb9307_config \
edb9307a_config \
edb9312_config \
edb9315_config \
edb9315a_config: unconfig
@$(MKCONFIG) -t $(@:_config=) edb93xx arm arm920t edb93xx NULL ep93xx
#########################################################################
## MPC85xx Systems
@@ -2502,8 +2486,10 @@ MPC8555CDS_config: unconfig
MPC8568MDS_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc mpc85xx mpc8568mds freescale
MPC8569MDS_ATM_config \
MPC8569MDS_NAND_config \
MPC8569MDS_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc mpc85xx mpc8569mds freescale
@$(MKCONFIG) -t $(@:_config=) MPC8569MDS ppc mpc85xx mpc8569mds freescale
MPC8572DS_36BIT_config \
MPC8572DS_config: unconfig
@@ -2693,6 +2679,9 @@ shannon_config : unconfig
## ARM92xT Systems
#########################################################################
a320evb_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm920t a320evb faraday a320
#########################################################################
## Atmel AT91RM9200 Systems
#########################################################################
@@ -2715,6 +2704,9 @@ CPUAT91_config : unconfig
csb637_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm920t csb637 NULL at91rm9200
eb_cpux9k2_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm920t eb_cpux9k2 BuS at91
kb9202_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm920t kb9202 NULL at91rm9200
@@ -2725,7 +2717,7 @@ mp2usb_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm920t mp2usb NULL at91rm9200
#########################################################################
## Atmel ARM926EJ-S Systems
## ARM926EJ-S Systems
#########################################################################
afeb9260_config: unconfig
@@ -2881,6 +2873,9 @@ at91sam9g45ekes_config : unconfig
fi;
@$(MKCONFIG) -a at91sam9m10g45ek arm arm926ejs at91sam9m10g45ek atmel at91
otc570_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm926ejs otc570 esd at91
pm9263_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm926ejs pm9263 ronetix at91
@@ -2927,6 +2922,9 @@ cp922_XA10_config \
cp1026_config: unconfig
@board/armltd/integrator/split_by_variant.sh cp $@
da830evm_config: unconfig
@$(MKCONFIG) $(@:_config=) arm arm926ejs da830evm davinci davinci
davinci_dvevm_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm926ejs dvevm davinci davinci
@@ -3047,6 +3045,17 @@ smdk2400_config : unconfig
smdk2410_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm920t smdk2410 samsung s3c24x0
spear300_config \
spear310_config \
spear320_config : unconfig
@$(MKCONFIG) -n $@ -t $(@:_config=) spear3xx arm arm926ejs $(@:_config=) spear spear
spear600_config : unconfig
@$(MKCONFIG) -n $@ -t $(@:_config=) spear6xx arm arm926ejs $(@:_config=) spear spear
suen3_config: unconfig
@$(MKCONFIG) $(@:_config=) arm arm926ejs km_arm keymile kirkwood
SX1_stdout_serial_config \
SX1_config: unconfig
@mkdir -p $(obj)include
@@ -3087,6 +3096,10 @@ trab_old_config: unconfig
}
@$(MKCONFIG) -a $(call xtract_trab,$@) arm arm920t trab NULL s3c24x0
tx25_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm926ejs tx25 karo mx25
@echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk
VCMA9_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm920t vcma9 mpl s3c24x0
@@ -3287,6 +3300,9 @@ mx31pdk_nand_config : unconfig
fi
@$(MKCONFIG) -a mx31pdk arm arm1136 mx31pdk freescale mx31
mx51evk_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm_cortexa8 mx51evk freescale mx51
omap2420h4_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm1136 omap2420h4 ti omap24xx
@@ -3547,10 +3563,11 @@ BFIN_BOARDS = bf518f-ezbrd bf526-ezbrd bf527-ezkit bf533-ezkit bf533-stamp \
bf537-pnav bf537-stamp bf538f-ezkit bf548-ezkit bf561-ezkit
# Bluetechnix tinyboards
BFIN_BOARDS += cm-bf527 cm-bf533 cm-bf537e cm-bf537u cm-bf548 cm-bf561 tcm-bf537
BFIN_BOARDS += cm-bf527 cm-bf533 cm-bf537e cm-bf537u cm-bf548 cm-bf561 \
tcm-bf518 tcm-bf537
# Misc third party boards
BFIN_BOARDS += bf537-minotaur bf537-srv1 blackstamp
BFIN_BOARDS += bf537-minotaur bf537-srv1 bf561-acvilon blackstamp
# I-SYST Micromodule
BFIN_BOARDS += ibf-dsp561
@@ -3558,6 +3575,10 @@ BFIN_BOARDS += ibf-dsp561
$(BFIN_BOARDS:%=%_config) : unconfig
@$(MKCONFIG) $(@:_config=) blackfin blackfin $(@:_config=)
bf527-ezkit-v2_config : unconfig
@$(MKCONFIG) -t BF527_EZKIT_REV_2_1 \
bf527-ezkit blackfin blackfin bf527-ezkit
#========================================================================
# AVR32
#========================================================================
@@ -3753,6 +3774,7 @@ clobber: clean
$(obj)cscope.* $(obj)*.*~
@rm -f $(obj)u-boot $(obj)u-boot.map $(obj)u-boot.hex $(ALL)
@rm -f $(obj)u-boot.kwb
@rm -f $(obj)u-boot.imx
@rm -f $(obj)tools/{env/crc32.c,inca-swap-bytes}
@rm -f $(obj)cpu/mpc824x/bedbug_603e.c
@rm -f $(obj)include/asm/proc $(obj)include/asm/arch $(obj)include/asm

55
README
View File

@@ -777,7 +777,7 @@ The following options need to be configured:
CONFIG_LBA48
Set this to enable support for disks larger than 137GB
Also look at CONFIG_SYS_64BIT_LBA ,CONFIG_SYS_64BIT_VSPRINTF and CONFIG_SYS_64BIT_STRTOUL
Also look at CONFIG_SYS_64BIT_LBA.
Whithout these , LBA48 support uses 32bit variables and will 'only'
support disks up to 2.1TB.
@@ -822,6 +822,16 @@ The following options need to be configured:
- NETWORK Support (other):
CONFIG_DRIVER_AT91EMAC
Support for AT91RM9200 EMAC.
CONFIG_RMII
Define this to use reduced MII inteface
CONFIG_DRIVER_AT91EMAC_QUIET
If this defined, the driver is quiet.
The driver doen't show link status messages.
CONFIG_DRIVER_LAN91C96
Support for SMSC's LAN91C96 chips.
@@ -2447,6 +2457,19 @@ to save the current settings.
- CONFIG_SYS_EEPROM_SIZE:
The size in bytes of the EEPROM device.
- CONFIG_ENV_EEPROM_IS_ON_I2C
define this, if you have I2C and SPI activated, and your
EEPROM, which holds the environment, is on the I2C bus.
- CONFIG_I2C_ENV_EEPROM_BUS
if you have an Environment on an EEPROM reached over
I2C muxes, you can define here, how to reach this
EEPROM. For example:
#define CONFIG_I2C_ENV_EEPROM_BUS "pca9547:70:d\0"
EEPROM which holds the environment, is reached over
a pca9547 i2c mux with address 0x70, channel 3.
- CONFIG_ENV_IS_IN_DATAFLASH:
@@ -2524,13 +2547,6 @@ use the "saveenv" command to store a valid environment.
- CONFIG_SYS_FAULT_MII_ADDR:
MII address of the PHY to check for the Ethernet link state.
- CONFIG_SYS_64BIT_VSPRINTF:
Makes vsprintf (and all *printf functions) support printing
of 64bit values by using the L quantifier
- CONFIG_SYS_64BIT_STRTOUL:
Adds simple_strtoull that returns a 64bit value
- CONFIG_NS16550_MIN_FUNCTIONS:
Define this if you desire to only have use of the NS16550_init
and NS16550_putc functions for the serial driver located at
@@ -2989,7 +3005,9 @@ environment. As long as you don't save the environment you are
working with an in-memory copy. In case the Flash area containing the
environment is erased by accident, a default environment is provided.
Some configuration options can be set using Environment Variables:
Some configuration options can be set using Environment Variables.
List of environment variables (most likely not complete):
baudrate - see CONFIG_BAUDRATE
@@ -3101,7 +3119,7 @@ Some configuration options can be set using Environment Variables:
available network interfaces.
It just stays at the currently selected interface.
netretry - When set to "no" each network operation will
netretry - When set to "no" each network operation will
either succeed or fail without retrying.
When set to "once" the network operation will
fail when all the available network interfaces
@@ -3117,7 +3135,18 @@ Some configuration options can be set using Environment Variables:
tftpdstport - If this is set, the value is used for TFTP's UDP
destination port instead of the Well Know Port 69.
vlan - When set to a value < 4095 the traffic over
tftpblocksize - Block size to use for TFTP transfers; if not set,
we use the TFTP server's default block size
tftptimeout - Retransmission timeout for TFTP packets (in milli-
seconds, minimum value is 1000 = 1 second). Defines
when a packet is considered to be lost so it has to
be retransmitted. The default is 5000 = 5 seconds.
Lowering this value may make downloads succeed
faster in networks with high packet loss rates or
with unreliable TFTP servers.
vlan - When set to a value < 4095 the traffic over
Ethernet is encapsulated/received over 802.1q
VLAN tagged frames.
@@ -3916,7 +3945,9 @@ For PowerPC, the following registers have specific use:
R30: GOT pointer
R31: frame pointer
(U-Boot also uses R14 as internal GOT pointer.)
(U-Boot also uses R12 as internal GOT pointer. r12
is a volatile register so r12 needs to be reset when
going back and forth between asm and C)
==> U-Boot will use R2 to hold a pointer to the global data

View File

@@ -0,0 +1,50 @@
#
# (C) Copyright 2003-2006
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
include $(TOPDIR)/config.mk
LIB = $(obj)lib$(BOARD).a
COBJS := cpux9k2.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS))
SOBJS := $(addprefix $(obj),$(SOBJS))
$(LIB): $(obj).depend $(OBJS) $(SOBJS)
$(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
clean:
rm -f $(SOBJS) $(OBJS)
distclean: clean
rm -f $(LIB) core *.bak .depend
#########################################################################
# defines $(obj).depend target
include $(SRCTREE)/rules.mk
sinclude $(obj).depend
#########################################################################

View File

@@ -0,0 +1 @@
TEXT_BASE = 0x23f00000

View File

@@ -0,0 +1,387 @@
/*
* (C) Copyright 2008-2009
* BuS Elektronik GmbH & Co. KG <www.bus-elektronik.de>
* Jens Scharsig <esw@bus-elektronik.de>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#include <exports.h>
#include <net.h>
#include <netdev.h>
#include <nand.h>
#include <asm/io.h>
#include <asm/arch/hardware.h>
#include <asm/arch/at91_pio.h>
#include <asm/arch/at91_pmc.h>
#include <asm/arch/at91_mc.h>
#ifdef CONFIG_STATUS_LED
#include <status_led.h>
#endif
#ifdef CONFIG_VIDEO
#include <bus_vcxk.h>
extern unsigned long display_width;
extern unsigned long display_height;
#endif
#ifdef CONFIG_CMD_NAND
void cpux9k2_nand_hw_init(void);
#endif
DECLARE_GLOBAL_DATA_PTR;
/*
* Miscelaneous platform dependent initialisations
*/
int board_init(void)
{
at91_pio_t *pio = (at91_pio_t *) AT91_PIO_BASE;
/* Enable Ctrlc */
console_init_f();
/* Correct IRDA resistor problem / Set PA23_TXD in Output */
writel(AT91_PMX_AA_TXD2, &pio->pioa.oer);
gd->bd->bi_arch_number = MACH_TYPE_EB_CPUX9K2;
/* adress of boot parameters */
gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
#ifdef CONFIG_STATUS_LED
status_led_set(STATUS_LED_BOOT, STATUS_LED_ON);
#endif
#ifdef CONFIG_CMD_NAND
cpux9k2_nand_hw_init();
#endif
return 0;
}
#ifdef CONFIG_MISC_INIT_R
int misc_init_r(void)
{
uchar mac[8];
uchar tm;
uchar midx;
uchar macn6, macn7;
#ifdef CONFIG_NET_MULTI
if (getenv("ethaddr") == NULL) {
if (i2c_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0x00,
CONFIG_SYS_I2C_EEPROM_ADDR_LEN,
(uchar *) &mac, sizeof(mac)) != 0) {
puts("Error reading MAC from EEPROM\n");
} else {
tm = 0;
macn6 = 0;
macn7 = 0xFF;
for (midx = 0; midx < 6; midx++) {
if ((mac[midx] != 0) && (mac[midx] != 0xFF))
tm++;
macn6 += mac[midx];
macn7 ^= mac[midx];
}
if ((macn6 != mac[6]) || (macn7 != mac[7]))
tm = 0;
if (tm)
eth_setenv_enetaddr("ethaddr", mac);
else
puts("Error: invalid MAC at EEPROM\n");
}
}
#endif
gd->jt[XF_do_reset] = (void *) do_reset;
#ifdef CONFIG_STATUS_LED
status_led_set(STATUS_LED_BOOT, STATUS_LED_BLINKING);
#endif
return 0;
}
#endif
#ifdef CONFIG_RESET_PHY_R
void reset_phy(void)
{
udelay(10000);
eth_init(gd->bd);
}
#endif
/*
* DRAM initialisations
*/
int dram_init(void)
{
gd->bd->bi_dram[0].start = PHYS_SDRAM;
gd->bd->bi_dram[0].size =
get_ram_size((volatile long *) PHYS_SDRAM, PHYS_SDRAM_SIZE);
return 0;
}
/*
* Ethernet initialisations
*/
#ifdef CONFIG_DRIVER_AT91EMAC
int board_eth_init(bd_t *bis)
{
int rc = 0;
rc = at91emac_register(bis, (u32) AT91_EMAC_BASE);
return rc;
}
#endif
/*
* Disk On Chip (NAND) Millenium initialization.
* The NAND lives in the CS2* space
*/
#if defined(CONFIG_CMD_NAND)
#define MASK_ALE (1 << 22) /* our ALE is AD22 */
#define MASK_CLE (1 << 21) /* our CLE is AD21 */
void cpux9k2_nand_hw_init(void)
{
unsigned long csr;
at91_pio_t *pio = (at91_pio_t *) AT91_PIO_BASE;
at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE;
at91_mc_t *mc = (at91_mc_t *) AT91_MC_BASE;
/* Setup Smart Media, fitst enable the address range of CS3 */
writel(readl(&mc->ebi.csa) | AT91_EBI_CSA_CS3A, &mc->ebi.csa);
/* RWH = 1 | RWS = 0 | TDF = 1 | NWS = 3 */
csr = AT91_SMC_CSR_RWHOLD(1) | AT91_SMC_CSR_TDF(1) |
AT91_SMC_CSR_NWS(3) |
AT91_SMC_CSR_ACSS_STANDARD | AT91_SMC_CSR_DBW_8 |
AT91_SMC_CSR_WSEN;
writel(csr, &mc->smc.csr[3]);
writel(AT91_PMX_CA_SMOE | AT91_PMX_CA_SMWE, &pio->pioc.asr);
writel(AT91_PMX_CA_BFCK | AT91_PMX_CA_SMOE | AT91_PMX_CA_SMWE,
&pio->pioc.pdr);
/* Configure PC2 as input (signal Nand READY ) */
writel(AT91_PMX_CA_BFAVD, &pio->pioc.per);
writel(AT91_PMX_CA_BFAVD, &pio->pioc.odr); /* disable output */
writel(AT91_PMX_CA_BFCK, &pio->pioc.codr);
/* PIOC clock enabling */
writel(1 << AT91_ID_PIOC, &pmc->pcer);
}
static void board_nand_hwcontrol(struct mtd_info *mtd,
int cmd, unsigned int ctrl)
{
at91_pio_t *pio = (at91_pio_t *) AT91_PIO_BASE;
struct nand_chip *this = mtd->priv;
ulong IO_ADDR_W = (ulong) this->IO_ADDR_W;
if (ctrl & NAND_CTRL_CHANGE) {
IO_ADDR_W &= ~(MASK_ALE | MASK_CLE);
if (ctrl & NAND_CLE)
IO_ADDR_W |= MASK_CLE;
if (ctrl & NAND_ALE)
IO_ADDR_W |= MASK_ALE;
if ((ctrl & NAND_NCE))
writel(1, &pio->pioc.codr);
else
writel(1, &pio->pioc.sodr);
this->IO_ADDR_W = (void *) IO_ADDR_W;
}
if (cmd != NAND_CMD_NONE)
writeb(cmd, this->IO_ADDR_W);
}
static int board_nand_dev_ready(struct mtd_info *mtd)
{
at91_pio_t *pio = (at91_pio_t *) AT91_PIO_BASE;
return ((readl(&pio->pioc.pdsr) & (1 << 2)) != 0);
}
int board_nand_init(struct nand_chip *nand)
{
cpux9k2_nand_hw_init();
nand->ecc.mode = NAND_ECC_SOFT;
nand->cmd_ctrl = board_nand_hwcontrol;
nand->dev_ready = board_nand_dev_ready;
nand->chip_delay = 20;
return 0;
}
#endif
#if defined(CONFIG_VIDEO)
/*
* drv_video_init
* FUNCTION: initialize VCxK device
*/
int drv_video_init(void)
{
#ifdef CONFIG_SPLASH_SCREEN
unsigned long splash;
#endif
char *s;
unsigned long csr;
at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE;
at91_mc_t *mc = (at91_mc_t *) AT91_MC_BASE;
printf("Init Video as ");
s = getenv("displaywidth");
if (s != NULL)
display_width = simple_strtoul(s, NULL, 10);
else
display_width = 256;
s = getenv("displayheight");
if (s != NULL)
display_height = simple_strtoul(s, NULL, 10);
else
display_height = 256;
printf("%ld x %ld pixel matrix\n", display_width, display_height);
/* RWH = 7 | RWS =7 | TDF = 15 | NWS = 0x7F */
csr = AT91_SMC_CSR_RWHOLD(7) | AT91_SMC_CSR_RWSETUP(7) |
AT91_SMC_CSR_TDF(15) | AT91_SMC_CSR_NWS(127) |
AT91_SMC_CSR_ACSS_STANDARD | AT91_SMC_CSR_DBW_16 |
AT91_SMC_CSR_BAT_16 | AT91_SMC_CSR_WSEN;
writel(csr, &mc->smc.csr[2]);
writel(1 << AT91_ID_PIOB, &pmc->pcer);
vcxk_init(display_width, display_height);
#ifdef CONFIG_SPLASH_SCREEN
s = getenv("splashimage");
if (s != NULL) {
splash = simple_strtoul(s, NULL, 16);
printf("use splashimage: %lx\n", splash);
video_display_bitmap(splash, 0, 0);
}
#endif
return 0;
}
#endif
#ifdef CONFIG_SOFT_I2C
void i2c_init_board(void)
{
u32 pin;
at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE;
at91_pio_t *pio = (at91_pio_t *) AT91_PIO_BASE;
writel(1 << AT91_ID_PIOA, &pmc->pcer);
pin = AT91_PMX_AA_TWD | AT91_PMX_AA_TWCK;
writel(pin, &pio->pioa.idr);
writel(pin, &pio->pioa.pudr);
writel(pin, &pio->pioa.per);
writel(pin, &pio->pioa.oer);
writel(pin, &pio->pioa.sodr);
}
#endif
/*--------------------------------------------------------------------------*/
#ifdef CONFIG_STATUS_LED
void __led_toggle(led_id_t mask)
{
at91_pio_t *pio = (at91_pio_t *) AT91_PIO_BASE;
if (readl(&pio->piod.odsr) & mask)
writel(mask, &pio->piod.codr);
else
writel(mask, &pio->piod.codr);
}
void __led_init(led_id_t mask, int state)
{
at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE;
at91_pio_t *pio = (at91_pio_t *) AT91_PIO_BASE;
writel(1 << AT91_ID_PIOD, &pmc->pcer); /* Enable PIOB clock */
/* Disable peripherals on LEDs */
writel(STATUS_LED_BIT | STATUS_LED_BIT1, &pio->piod.per);
/* Enable pins as outputs */
writel(STATUS_LED_BIT | STATUS_LED_BIT1, &pio->piod.oer);
/* Turn all LEDs OFF */
writel(STATUS_LED_BIT | STATUS_LED_BIT1, &pio->piod.sodr);
__led_set(mask, state);
}
void __led_set(led_id_t mask, int state)
{
at91_pio_t *pio = (at91_pio_t *) AT91_PIO_BASE;
if (state == STATUS_LED_ON)
writel(mask, &pio->piod.codr);
else
writel(mask, &pio->piod.sodr);
}
#endif
/*---------------------------------------------------------------------------*/
int do_brightness(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
int rcode = 0;
ulong side;
ulong bright;
switch (argc) {
case 3:
side = simple_strtoul(argv[1], NULL, 10);
bright = simple_strtoul(argv[2], NULL, 10);
if ((side >= 0) && (side <= 3) &&
(bright >= 0) && (bright <= 1000)) {
vcxk_setbrightness(side, bright);
rcode = 0;
} else {
printf("parameters out of range\n");
printf("Usage:\n%s\n", cmdtp->usage);
rcode = 1;
}
break;
default:
printf("Usage:\n%s\n", cmdtp->usage);
rcode = 1;
break;
}
return rcode;
}
/*---------------------------------------------------------------------------*/
U_BOOT_CMD(
bright, 3, 0, do_brightness,
"bright - sets the display brightness\n",
" <side> <0..1000>\n side: 0/3=both; 1=first; 2=second\n"
);
/* EOF cpu9k2.c */

View File

@@ -74,11 +74,11 @@ DATA 0xFFD0140C 0x00000a33 # DDR Timing (High)
# bit12-11: TW2W
# bit31-13: zero required
DATA 0xFFD01410 0x00000099 # DDR Address Control
# bit1-0: 01, Cs0width=x16
# bit3-2: 10, Cs0size=512Mb
# bit5-4: 01, Cs1width=x16
# bit7-6: 10, Cs1size=512Mb
DATA 0xFFD01410 0x000000cc # DDR Address Control
# bit1-0: 00, Cs0width=x8
# bit3-2: 11, Cs0size=1Gb
# bit5-4: 00, Cs1width=x8
# bit7-6: 11, Cs1size=1Gb
# bit9-8: 00, Cs2width=nonexistent
# bit11-10: 00, Cs2size =nonexistent
# bit13-12: 00, Cs3width=nonexistent

View File

@@ -34,3 +34,7 @@ endif
ifeq ($(debug),1)
PLATFORM_CPPFLAGS += -DDEBUG
endif
ifdef CONFIG_NAND_U_BOOT
LDSCRIPT := $(TOPDIR)/board/$(BOARDDIR)/u-boot-nand.lds
endif

View File

@@ -1,134 +0,0 @@
/*
* (C) Copyright 2000
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
OUTPUT_ARCH(powerpc)
/* Do we need any of these for elf?
__DYNAMIC = 0; */
SECTIONS
{
.resetvec 0xFFFFFFFC :
{
*(.resetvec)
} = 0xffff
/* Read-only sections, merged into text segment: */
. = + SIZEOF_HEADERS;
.interp : { *(.interp) }
.hash : { *(.hash) }
.dynsym : { *(.dynsym) }
.dynstr : { *(.dynstr) }
.rel.text : { *(.rel.text) }
.rela.text : { *(.rela.text) }
.rel.data : { *(.rel.data) }
.rela.data : { *(.rela.data) }
.rel.rodata : { *(.rel.rodata) }
.rela.rodata : { *(.rela.rodata) }
.rel.got : { *(.rel.got) }
.rela.got : { *(.rela.got) }
.rel.ctors : { *(.rel.ctors) }
.rela.ctors : { *(.rela.ctors) }
.rel.dtors : { *(.rel.dtors) }
.rela.dtors : { *(.rela.dtors) }
.rel.bss : { *(.rel.bss) }
.rela.bss : { *(.rela.bss) }
.rel.plt : { *(.rel.plt) }
.rela.plt : { *(.rela.plt) }
.init : { *(.init) }
.plt : { *(.plt) }
.text :
{
/* WARNING - the following is hand-optimized to fit within */
/* the sector layout of our flash chips! XXX FIXME XXX */
cpu/ppc4xx/start.o (.text)
*(.text)
*(.got1)
}
_etext = .;
PROVIDE (etext = .);
.rodata :
{
*(.eh_frame)
*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }
.dtors : { *(.dtors) }
/* Read-write section, merged into data segment: */
. = (. + 0x00FF) & 0xFFFFFF00;
_erotext = .;
PROVIDE (erotext = .);
.reloc :
{
*(.got)
_GOT2_TABLE_ = .;
*(.got2)
_FIXUP_TABLE_ = .;
*(.fixup)
}
__got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
__fixup_entries = (. - _FIXUP_TABLE_)>>2;
.data :
{
*(.data)
*(.data1)
*(.sdata)
*(.sdata2)
*(.dynamic)
CONSTRUCTORS
}
_edata = .;
PROVIDE (edata = .);
. = .;
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
. = .;
__start___ex_table = .;
__ex_table : { *(__ex_table) }
__stop___ex_table = .;
. = ALIGN(256);
__init_begin = .;
.text.init : { *(.text.init) }
.data.init : { *(.data.init) }
. = ALIGN(256);
__init_end = .;
__bss_start = .;
.bss (NOLOAD) :
{
*(.sbss) *(.scommon)
*(.dynbss)
*(.bss)
*(COMMON)
. = ALIGN(4);
}
_end = . ;
PROVIDE (end = .);
}

View File

@@ -466,166 +466,6 @@ phys_size_t initdram (int board_type)
#endif
}
/*************************************************************************
* pci_pre_init
*
* This routine is called just prior to registering the hose and gives
* the board the opportunity to check things. Returning a value of zero
* indicates that things are bad & PCI initialization should be aborted.
*
* Different boards may wish to customize the pci controller structure
* (add regions, override default access routines, etc) or perform
* certain pre-initialization actions.
*
************************************************************************/
#if defined(CONFIG_PCI)
int pci_pre_init(struct pci_controller *hose)
{
unsigned long addr;
/*-------------------------------------------------------------------------+
| Set priority for all PLB3 devices to 0.
| Set PLB3 arbiter to fair mode.
+-------------------------------------------------------------------------*/
mfsdr(SD0_AMP1, addr);
mtsdr(SD0_AMP1, (addr & 0x000000FF) | 0x0000FF00);
addr = mfdcr(PLB3_ACR);
mtdcr(PLB3_ACR, addr | 0x80000000);
/*-------------------------------------------------------------------------+
| Set priority for all PLB4 devices to 0.
+-------------------------------------------------------------------------*/
mfsdr(SD0_AMP0, addr);
mtsdr(SD0_AMP0, (addr & 0x000000FF) | 0x0000FF00);
addr = mfdcr(PLB4_ACR) | 0xa0000000; /* Was 0x8---- */
mtdcr(PLB4_ACR, addr);
/*-------------------------------------------------------------------------+
| Set Nebula PLB4 arbiter to fair mode.
+-------------------------------------------------------------------------*/
/* Segment0 */
addr = (mfdcr(PLB0_ACR) & ~PLB0_ACR_PPM_MASK) | PLB0_ACR_PPM_FAIR;
addr = (addr & ~PLB0_ACR_HBU_MASK) | PLB0_ACR_HBU_ENABLED;
addr = (addr & ~PLB0_ACR_RDP_MASK) | PLB0_ACR_RDP_4DEEP;
addr = (addr & ~PLB0_ACR_WRP_MASK) | PLB0_ACR_WRP_2DEEP;
mtdcr(PLB0_ACR, addr);
/* Segment1 */
addr = (mfdcr(PLB1_ACR) & ~PLB1_ACR_PPM_MASK) | PLB1_ACR_PPM_FAIR;
addr = (addr & ~PLB1_ACR_HBU_MASK) | PLB1_ACR_HBU_ENABLED;
addr = (addr & ~PLB1_ACR_RDP_MASK) | PLB1_ACR_RDP_4DEEP;
addr = (addr & ~PLB1_ACR_WRP_MASK) | PLB1_ACR_WRP_2DEEP;
mtdcr(PLB1_ACR, addr);
return 1;
}
#endif /* defined(CONFIG_PCI) */
/*************************************************************************
* pci_target_init
*
* The bootstrap configuration provides default settings for the pci
* inbound map (PIM). But the bootstrap config choices are limited and
* may not be sufficient for a given board.
*
************************************************************************/
#if defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_TARGET_INIT)
void pci_target_init(struct pci_controller *hose)
{
/*--------------------------------------------------------------------------+
* Set up Direct MMIO registers
*--------------------------------------------------------------------------*/
/*--------------------------------------------------------------------------+
| PowerPC440 EP PCI Master configuration.
| Map one 1Gig range of PLB/processor addresses to PCI memory space.
| PLB address 0xA0000000-0xDFFFFFFF ==> PCI address 0xA0000000-0xDFFFFFFF
| Use byte reversed out routines to handle endianess.
| Make this region non-prefetchable.
+--------------------------------------------------------------------------*/
out32r(PCIL0_PMM0MA, 0x00000000); /* PMM0 Mask/Attribute - disabled b4 setting */
out32r(PCIL0_PMM0LA, CONFIG_SYS_PCI_MEMBASE); /* PMM0 Local Address */
out32r(PCIL0_PMM0PCILA, CONFIG_SYS_PCI_MEMBASE); /* PMM0 PCI Low Address */
out32r(PCIL0_PMM0PCIHA, 0x00000000); /* PMM0 PCI High Address */
out32r(PCIL0_PMM0MA, 0xE0000001); /* 512M + No prefetching, and enable region */
out32r(PCIL0_PMM1MA, 0x00000000); /* PMM0 Mask/Attribute - disabled b4 setting */
out32r(PCIL0_PMM1LA, CONFIG_SYS_PCI_MEMBASE2); /* PMM0 Local Address */
out32r(PCIL0_PMM1PCILA, CONFIG_SYS_PCI_MEMBASE2); /* PMM0 PCI Low Address */
out32r(PCIL0_PMM1PCIHA, 0x00000000); /* PMM0 PCI High Address */
out32r(PCIL0_PMM1MA, 0xE0000001); /* 512M + No prefetching, and enable region */
out32r(PCIL0_PTM1MS, 0x00000001); /* Memory Size/Attribute */
out32r(PCIL0_PTM1LA, 0); /* Local Addr. Reg */
out32r(PCIL0_PTM2MS, 0); /* Memory Size/Attribute */
out32r(PCIL0_PTM2LA, 0); /* Local Addr. Reg */
/*--------------------------------------------------------------------------+
* Set up Configuration registers
*--------------------------------------------------------------------------*/
/* Program the board's subsystem id/vendor id */
pci_write_config_word(0, PCI_SUBSYSTEM_VENDOR_ID,
CONFIG_SYS_PCI_SUBSYS_VENDORID);
pci_write_config_word(0, PCI_SUBSYSTEM_ID, CONFIG_SYS_PCI_SUBSYS_ID);
/* Configure command register as bus master */
pci_write_config_word(0, PCI_COMMAND, PCI_COMMAND_MASTER);
/* 240nS PCI clock */
pci_write_config_word(0, PCI_LATENCY_TIMER, 1);
/* No error reporting */
pci_write_config_word(0, PCI_ERREN, 0);
pci_write_config_dword(0, PCI_BRDGOPT2, 0x00000101);
}
#endif /* defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_TARGET_INIT) */
/*************************************************************************
* pci_master_init
*
************************************************************************/
#if defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_MASTER_INIT)
void pci_master_init(struct pci_controller *hose)
{
unsigned short temp_short;
/*--------------------------------------------------------------------------+
| Write the PowerPC440 EP PCI Configuration regs.
| Enable PowerPC440 EP to be a master on the PCI bus (PMM).
| Enable PowerPC440 EP to act as a PCI memory target (PTM).
+--------------------------------------------------------------------------*/
pci_read_config_word(0, PCI_COMMAND, &temp_short);
pci_write_config_word(0, PCI_COMMAND,
temp_short | PCI_COMMAND_MASTER |
PCI_COMMAND_MEMORY);
}
#endif /* defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_MASTER_INIT) */
/*************************************************************************
* is_pci_host
*
* This routine is called to determine if a pci scan should be
* performed. With various hardware environments (especially cPCI and
* PPMC) it's insufficient to depend on the state of the arbiter enable
* bit in the strap register, or generic host/adapter assumptions.
*
* Rather than hard-code a bad assumption in the general 440 code, the
* 440 pci code requires the board to decide at runtime.
*
* Return 0 for adapter mode, non-zero for host (monarch) mode.
*
*
************************************************************************/
#if defined(CONFIG_PCI)
int is_pci_host(struct pci_controller *hose)
{
/* Bamboo is always configured as host. */
return (1);
}
#endif /* defined(CONFIG_PCI) */
/*----------------------------------------------------------------------------+
| is_powerpc440ep_pass1.
+----------------------------------------------------------------------------*/

View File

@@ -36,3 +36,7 @@ endif
ifeq ($(dbcr),1)
PLATFORM_CPPFLAGS += -DCONFIG_SYS_INIT_DBCR=0x8cff0000
endif
ifdef CONFIG_NAND_U_BOOT
LDSCRIPT := $(TOPDIR)/board/$(BOARDDIR)/u-boot-nand.lds
endif

View File

@@ -1,143 +0,0 @@
/*
* (C) Copyright 2002
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
OUTPUT_ARCH(powerpc)
/* Do we need any of these for elf?
__DYNAMIC = 0; */
SECTIONS
{
.resetvec 0xFFFFFFFC :
{
*(.resetvec)
} = 0xffff
.bootpg 0xFFFFF000 :
{
cpu/ppc4xx/start.o (.bootpg)
} = 0xffff
/* Read-only sections, merged into text segment: */
. = + SIZEOF_HEADERS;
.interp : { *(.interp) }
.hash : { *(.hash) }
.dynsym : { *(.dynsym) }
.dynstr : { *(.dynstr) }
.rel.text : { *(.rel.text) }
.rela.text : { *(.rela.text) }
.rel.data : { *(.rel.data) }
.rela.data : { *(.rela.data) }
.rel.rodata : { *(.rel.rodata) }
.rela.rodata : { *(.rela.rodata) }
.rel.got : { *(.rel.got) }
.rela.got : { *(.rela.got) }
.rel.ctors : { *(.rel.ctors) }
.rela.ctors : { *(.rela.ctors) }
.rel.dtors : { *(.rel.dtors) }
.rela.dtors : { *(.rela.dtors) }
.rel.bss : { *(.rel.bss) }
.rela.bss : { *(.rela.bss) }
.rel.plt : { *(.rel.plt) }
.rela.plt : { *(.rela.plt) }
.init : { *(.init) }
.plt : { *(.plt) }
.text :
{
/* WARNING - the following is hand-optimized to fit within */
/* the sector layout of our flash chips! XXX FIXME XXX */
cpu/ppc4xx/start.o (.text)
board/amcc/bamboo/init.o (.text)
board/amcc/bamboo/bamboo.o (.text)
*(.text)
*(.got1)
}
_etext = .;
PROVIDE (etext = .);
.rodata :
{
*(.eh_frame)
*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }
.dtors : { *(.dtors) }
/* Read-write section, merged into data segment: */
. = (. + 0x00FF) & 0xFFFFFF00;
_erotext = .;
PROVIDE (erotext = .);
.reloc :
{
*(.got)
_GOT2_TABLE_ = .;
*(.got2)
_FIXUP_TABLE_ = .;
*(.fixup)
}
__got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
__fixup_entries = (. - _FIXUP_TABLE_)>>2;
.data :
{
*(.data)
*(.data1)
*(.sdata)
*(.sdata2)
*(.dynamic)
CONSTRUCTORS
}
_edata = .;
PROVIDE (edata = .);
. = .;
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
. = .;
__start___ex_table = .;
__ex_table : { *(__ex_table) }
__stop___ex_table = .;
. = ALIGN(256);
__init_begin = .;
.text.init : { *(.text.init) }
.data.init : { *(.data.init) }
. = ALIGN(256);
__init_end = .;
__bss_start = .;
.bss (NOLOAD) :
{
*(.sbss) *(.scommon)
*(.dynbss)
*(.bss)
*(COMMON)
. = ALIGN(4);
}
_end = . ;
PROVIDE (end = .);
}

View File

@@ -1,134 +0,0 @@
/*
* (C) Copyright 2000
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
OUTPUT_ARCH(powerpc)
/* Do we need any of these for elf?
__DYNAMIC = 0; */
SECTIONS
{
.resetvec 0xFFFFFFFC :
{
*(.resetvec)
} = 0xffff
/* Read-only sections, merged into text segment: */
. = + SIZEOF_HEADERS;
.interp : { *(.interp) }
.hash : { *(.hash) }
.dynsym : { *(.dynsym) }
.dynstr : { *(.dynstr) }
.rel.text : { *(.rel.text) }
.rela.text : { *(.rela.text) }
.rel.data : { *(.rel.data) }
.rela.data : { *(.rela.data) }
.rel.rodata : { *(.rel.rodata) }
.rela.rodata : { *(.rela.rodata) }
.rel.got : { *(.rel.got) }
.rela.got : { *(.rela.got) }
.rel.ctors : { *(.rel.ctors) }
.rela.ctors : { *(.rela.ctors) }
.rel.dtors : { *(.rel.dtors) }
.rela.dtors : { *(.rela.dtors) }
.rel.bss : { *(.rel.bss) }
.rela.bss : { *(.rela.bss) }
.rel.plt : { *(.rel.plt) }
.rela.plt : { *(.rela.plt) }
.init : { *(.init) }
.plt : { *(.plt) }
.text :
{
/* WARNING - the following is hand-optimized to fit within */
/* the sector layout of our flash chips! XXX FIXME XXX */
cpu/ppc4xx/start.o (.text)
*(.text)
*(.got1)
}
_etext = .;
PROVIDE (etext = .);
.rodata :
{
*(.eh_frame)
*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }
.dtors : { *(.dtors) }
/* Read-write section, merged into data segment: */
. = (. + 0x00FF) & 0xFFFFFF00;
_erotext = .;
PROVIDE (erotext = .);
.reloc :
{
*(.got)
_GOT2_TABLE_ = .;
*(.got2)
_FIXUP_TABLE_ = .;
*(.fixup)
}
__got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
__fixup_entries = (. - _FIXUP_TABLE_)>>2;
.data :
{
*(.data)
*(.data1)
*(.sdata)
*(.sdata2)
*(.dynamic)
CONSTRUCTORS
}
_edata = .;
PROVIDE (edata = .);
. = .;
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
. = .;
__start___ex_table = .;
__ex_table : { *(__ex_table) }
__stop___ex_table = .;
. = ALIGN(256);
__init_begin = .;
.text.init : { *(.text.init) }
.data.init : { *(.data.init) }
. = ALIGN(256);
__init_end = .;
__bss_start = .;
.bss (NOLOAD) :
{
*(.sbss) *(.scommon)
*(.dynbss)
*(.bss)
*(COMMON)
. = ALIGN(4);
}
_end = . ;
PROVIDE (end = .);
}

View File

@@ -326,141 +326,17 @@ phys_size_t initdram(int board_type)
}
#endif
/*
* pci_target_init
*
* The bootstrap configuration provides default settings for the pci
* inbound map (PIM). But the bootstrap config choices are limited and
* may not be sufficient for a given board.
*/
#if defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_TARGET_INIT)
void pci_target_init(struct pci_controller * hose )
{
/*
* Disable everything
*/
out_le32((void *)PCIL0_PIM0SA, 0); /* disable */
out_le32((void *)PCIL0_PIM1SA, 0); /* disable */
out_le32((void *)PCIL0_PIM2SA, 0); /* disable */
out_le32((void *)PCIL0_EROMBA, 0); /* disable expansion rom */
/*
* Map all of SDRAM to PCI address 0x0000_0000. Note that the 440
* strapping options to not support sizes such as 128/256 MB.
*/
out_le32((void *)PCIL0_PIM0LAL, CONFIG_SYS_SDRAM_BASE);
out_le32((void *)PCIL0_PIM0LAH, 0);
out_le32((void *)PCIL0_PIM0SA, ~(gd->ram_size - 1) | 1);
out_le32((void *)PCIL0_BAR0, 0);
/*
* Program the board's subsystem id/vendor id
*/
out_le16((void *)PCIL0_SBSYSVID, CONFIG_SYS_PCI_SUBSYS_VENDORID);
out_le16((void *)PCIL0_SBSYSID, CONFIG_SYS_PCI_SUBSYS_DEVICEID);
out_le16((void *)PCIL0_CMD, in16r(PCIL0_CMD) | PCI_COMMAND_MEMORY);
}
#endif /* defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_TARGET_INIT) */
#if defined(CONFIG_PCI)
/*
* is_pci_host
*
* This routine is called to determine if a pci scan should be
* performed. With various hardware environments (especially cPCI and
* PPMC) it's insufficient to depend on the state of the arbiter enable
* bit in the strap register, or generic host/adapter assumptions.
*
* Rather than hard-code a bad assumption in the general 440 code, the
* 440 pci code requires the board to decide at runtime.
*
* Return 0 for adapter mode, non-zero for host (monarch) mode.
*/
int is_pci_host(struct pci_controller *hose)
int board_pcie_first(void)
{
/* Board is always configured as host. */
return (1);
}
static struct pci_controller pcie_hose[2] = {{0},{0}};
void pcie_setup_hoses(int busno)
{
struct pci_controller *hose;
int i, bus;
int ret = 0;
char *env;
unsigned int delay;
int start;
/*
* assume we're called after the PCIX hose is initialized, which takes
* bus ID 0 and therefore start numbering PCIe's from 1.
*/
bus = busno;
/*
* Canyonlands with SATA enabled has only one PCIe slot
* (2nd one).
*/
if (gd->board_type == BOARD_CANYONLANDS_SATA)
start = 1;
else
start = 0;
return 1;
for (i = start; i <= 1; i++) {
if (is_end_point(i))
ret = ppc4xx_init_pcie_endport(i);
else
ret = ppc4xx_init_pcie_rootport(i);
if (ret == -ENODEV)
continue;
if (ret) {
printf("PCIE%d: initialization as %s failed\n", i,
is_end_point(i) ? "endpoint" : "root-complex");
continue;
}
hose = &pcie_hose[i];
hose->first_busno = bus;
hose->last_busno = bus;
hose->current_busno = bus;
/* setup mem resource */
pci_set_region(hose->regions + 0,
CONFIG_SYS_PCIE_MEMBASE + i * CONFIG_SYS_PCIE_MEMSIZE,
CONFIG_SYS_PCIE_MEMBASE + i * CONFIG_SYS_PCIE_MEMSIZE,
CONFIG_SYS_PCIE_MEMSIZE,
PCI_REGION_MEM);
hose->region_count = 1;
pci_register_hose(hose);
if (is_end_point(i)) {
ppc4xx_setup_pcie_endpoint(hose, i);
/*
* Reson for no scanning is endpoint can not generate
* upstream configuration accesses.
*/
} else {
ppc4xx_setup_pcie_rootpoint(hose, i);
env = getenv ("pciscandelay");
if (env != NULL) {
delay = simple_strtoul(env, NULL, 10);
if (delay > 5)
printf("Warning, expect noticable delay before "
"PCIe scan due to 'pciscandelay' value!\n");
mdelay(delay * 1000);
}
/*
* Config access can only go down stream
*/
hose->last_busno = pci_hose_scan(hose);
bus = hose->last_busno + 1;
}
}
return 0;
}
#endif /* CONFIG_PCI */

View File

@@ -39,3 +39,7 @@ endif
ifeq ($(dbcr),1)
PLATFORM_CPPFLAGS += -DCONFIG_SYS_INIT_DBCR=0x8cff0000
endif
ifdef CONFIG_NAND_U_BOOT
LDSCRIPT := $(TOPDIR)/board/$(BOARDDIR)/u-boot-nand.lds
endif

View File

@@ -1,141 +0,0 @@
/*
* (C) Copyright 2008
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
OUTPUT_ARCH(powerpc)
/* Do we need any of these for elf?
__DYNAMIC = 0; */
SECTIONS
{
.resetvec 0xFFFFFFFC :
{
*(.resetvec)
} = 0xffff
.bootpg 0xFFFFF000 :
{
cpu/ppc4xx/start.o (.bootpg)
} = 0xffff
/* Read-only sections, merged into text segment: */
. = + SIZEOF_HEADERS;
.interp : { *(.interp) }
.hash : { *(.hash) }
.dynsym : { *(.dynsym) }
.dynstr : { *(.dynstr) }
.rel.text : { *(.rel.text) }
.rela.text : { *(.rela.text) }
.rel.data : { *(.rel.data) }
.rela.data : { *(.rela.data) }
.rel.rodata : { *(.rel.rodata) }
.rela.rodata : { *(.rela.rodata) }
.rel.got : { *(.rel.got) }
.rela.got : { *(.rela.got) }
.rel.ctors : { *(.rel.ctors) }
.rela.ctors : { *(.rela.ctors) }
.rel.dtors : { *(.rel.dtors) }
.rela.dtors : { *(.rela.dtors) }
.rel.bss : { *(.rel.bss) }
.rela.bss : { *(.rela.bss) }
.rel.plt : { *(.rel.plt) }
.rela.plt : { *(.rela.plt) }
.init : { *(.init) }
.plt : { *(.plt) }
.text :
{
/* WARNING - the following is hand-optimized to fit within */
/* the sector layout of our flash chips! XXX FIXME XXX */
cpu/ppc4xx/start.o (.text)
board/amcc/canyonlands/init.o (.text)
*(.text)
*(.got1)
}
_etext = .;
PROVIDE (etext = .);
.rodata :
{
*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }
.dtors : { *(.dtors) }
/* Read-write section, merged into data segment: */
. = (. + 0x00FF) & 0xFFFFFF00;
_erotext = .;
PROVIDE (erotext = .);
.reloc :
{
*(.got)
_GOT2_TABLE_ = .;
*(.got2)
_FIXUP_TABLE_ = .;
*(.fixup)
}
__got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
__fixup_entries = (. - _FIXUP_TABLE_)>>2;
.data :
{
*(.data)
*(.data1)
*(.sdata)
*(.sdata2)
*(.dynamic)
CONSTRUCTORS
}
_edata = .;
PROVIDE (edata = .);
. = .;
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
. = .;
__start___ex_table = .;
__ex_table : { *(__ex_table) }
__stop___ex_table = .;
. = ALIGN(256);
__init_begin = .;
.text.init : { *(.text.init) }
.data.init : { *(.data.init) }
. = ALIGN(256);
__init_end = .;
__bss_start = .;
.bss :
{
*(.sbss) *(.scommon)
*(.dynbss)
*(.bss)
*(COMMON)
. = ALIGN(4);
}
_end = . ;
PROVIDE (end = .);
}

View File

@@ -164,96 +164,3 @@ long int fixed_sdram(void)
return (128 * 1024 * 1024); /* 128 MB */
}
#endif /* !defined(CONFIG_SPD_EEPROM) */
/*************************************************************************
* pci_pre_init
*
* This routine is called just prior to registering the hose and gives
* the board the opportunity to check things. Returning a value of zero
* indicates that things are bad & PCI initialization should be aborted.
*
* Different boards may wish to customize the pci controller structure
* (add regions, override default access routines, etc) or perform
* certain pre-initialization actions.
*
************************************************************************/
#if defined(CONFIG_PCI)
int pci_pre_init(struct pci_controller *hose)
{
unsigned long strap;
/*--------------------------------------------------------------------------+
* The ebony board is always configured as the host & requires the
* PCI arbiter to be enabled.
*--------------------------------------------------------------------------*/
strap = mfdcr(CPC0_STRP1);
if ((strap & 0x00100000) == 0) {
printf("PCI: CPC0_STRP1[PAE] not set.\n");
return 0;
}
return 1;
}
#endif /* defined(CONFIG_PCI) */
/*************************************************************************
* pci_target_init
*
* The bootstrap configuration provides default settings for the pci
* inbound map (PIM). But the bootstrap config choices are limited and
* may not be sufficient for a given board.
*
************************************************************************/
#if defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_TARGET_INIT)
void pci_target_init(struct pci_controller *hose)
{
/*--------------------------------------------------------------------------+
* Disable everything
*--------------------------------------------------------------------------*/
out32r(PCIL0_PIM0SA, 0); /* disable */
out32r(PCIL0_PIM1SA, 0); /* disable */
out32r(PCIL0_PIM2SA, 0); /* disable */
out32r(PCIL0_EROMBA, 0); /* disable expansion rom */
/*--------------------------------------------------------------------------+
* Map all of SDRAM to PCI address 0x0000_0000. Note that the 440 strapping
* options to not support sizes such as 128/256 MB.
*--------------------------------------------------------------------------*/
out32r(PCIL0_PIM0LAL, CONFIG_SYS_SDRAM_BASE);
out32r(PCIL0_PIM0LAH, 0);
out32r(PCIL0_PIM0SA, ~(gd->ram_size - 1) | 1);
out32r(PCIL0_BAR0, 0);
/*--------------------------------------------------------------------------+
* Program the board's subsystem id/vendor id
*--------------------------------------------------------------------------*/
out16r(PCIL0_SBSYSVID, CONFIG_SYS_PCI_SUBSYS_VENDORID);
out16r(PCIL0_SBSYSID, CONFIG_SYS_PCI_SUBSYS_DEVICEID);
out16r(PCIL0_CMD, in16r(PCIL0_CMD) | PCI_COMMAND_MEMORY);
}
#endif /* defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_TARGET_INIT) */
/*************************************************************************
* is_pci_host
*
* This routine is called to determine if a pci scan should be
* performed. With various hardware environments (especially cPCI and
* PPMC) it's insufficient to depend on the state of the arbiter enable
* bit in the strap register, or generic host/adapter assumptions.
*
* Rather than hard-code a bad assumption in the general 440 code, the
* 440 pci code requires the board to decide at runtime.
*
* Return 0 for adapter mode, non-zero for host (monarch) mode.
*
*
************************************************************************/
#if defined(CONFIG_PCI)
int is_pci_host(struct pci_controller *hose)
{
/* The ebony board is always configured as host. */
return (1);
}
#endif /* defined(CONFIG_PCI) */

View File

@@ -1,141 +0,0 @@
/*
* (C) Copyright 2002
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
OUTPUT_ARCH(powerpc)
/* Do we need any of these for elf?
__DYNAMIC = 0; */
SECTIONS
{
.resetvec 0xFFFFFFFC :
{
*(.resetvec)
} = 0xffff
.bootpg 0xFFFFF000 :
{
cpu/ppc4xx/start.o (.bootpg)
} = 0xffff
/* Read-only sections, merged into text segment: */
. = + SIZEOF_HEADERS;
.interp : { *(.interp) }
.hash : { *(.hash) }
.dynsym : { *(.dynsym) }
.dynstr : { *(.dynstr) }
.rel.text : { *(.rel.text) }
.rela.text : { *(.rela.text) }
.rel.data : { *(.rel.data) }
.rela.data : { *(.rela.data) }
.rel.rodata : { *(.rel.rodata) }
.rela.rodata : { *(.rela.rodata) }
.rel.got : { *(.rel.got) }
.rela.got : { *(.rela.got) }
.rel.ctors : { *(.rel.ctors) }
.rela.ctors : { *(.rela.ctors) }
.rel.dtors : { *(.rel.dtors) }
.rela.dtors : { *(.rela.dtors) }
.rel.bss : { *(.rel.bss) }
.rela.bss : { *(.rela.bss) }
.rel.plt : { *(.rel.plt) }
.rela.plt : { *(.rela.plt) }
.init : { *(.init) }
.plt : { *(.plt) }
.text :
{
/* WARNING - the following is hand-optimized to fit within */
/* the sector layout of our flash chips! XXX FIXME XXX */
cpu/ppc4xx/start.o (.text)
board/amcc/ebony/init.o (.text)
*(.text)
*(.got1)
}
_etext = .;
PROVIDE (etext = .);
.rodata :
{
*(.eh_frame)
*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }
.dtors : { *(.dtors) }
/* Read-write section, merged into data segment: */
. = (. + 0x00FF) & 0xFFFFFF00;
_erotext = .;
PROVIDE (erotext = .);
.reloc :
{
*(.got)
_GOT2_TABLE_ = .;
*(.got2)
_FIXUP_TABLE_ = .;
*(.fixup)
}
__got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
__fixup_entries = (. - _FIXUP_TABLE_)>>2;
.data :
{
*(.data)
*(.data1)
*(.sdata)
*(.sdata2)
*(.dynamic)
CONSTRUCTORS
}
_edata = .;
PROVIDE (edata = .);
. = .;
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
. = .;
__start___ex_table = .;
__ex_table : { *(__ex_table) }
__stop___ex_table = .;
. = ALIGN(256);
__init_begin = .;
.text.init : { *(.text.init) }
.data.init : { *(.data.init) }
. = ALIGN(256);
__init_end = .;
__bss_start = .;
.bss (NOLOAD) :
{
*(.sbss) *(.scommon)
*(.dynbss)
*(.bss)
*(COMMON)
. = ALIGN(4);
}
_end = . ;
PROVIDE (end = .);
}

View File

@@ -25,9 +25,11 @@ include $(TOPDIR)/config.mk
LIB = $(obj)lib$(BOARD).a
COBJS = $(BOARD).o cmd_katmai.o
COBJS-y := $(BOARD).o
COBJS-$(CONFIG_CMD_CHIP_CONFIG) += chip_config.o
SOBJS = init.o
COBJS := $(COBJS-y)
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS))
SOBJS := $(addprefix $(obj),$(SOBJS))

View File

@@ -0,0 +1,55 @@
/*
* (C) Copyright 2009
* Stefan Roese, DENX Software Engineering, sr@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*
*/
#include <common.h>
#include <asm/ppc4xx_config.h>
struct ppc4xx_config ppc4xx_config_val[] = {
{
"400-133","CPU: 400 PLB: 133 OPB: 66 EBC: 66",
{ 0x86, 0x78, 0xc2, 0xc6, 0x05, 0xa5, 0x04, 0xe1 }
},
{
"500-166","CPU: 500 PLB: 166 OPB: 83 EBC: 83",
{ 0x87, 0x78, 0xf2, 0xc6, 0x05, 0xa5, 0x04, 0xe1 }
},
{
"533-133","CPU: 533 PLB: 133 OPB: 66 EBC: 66",
{ 0x87, 0x79, 0x02, 0x52, 0x05, 0xa5, 0x04, 0xe1 }
},
{
"667-133","CPU: 667 PLB: 133 OPB: 66 EBC: 66",
{ 0x87, 0x79, 0x42, 0x56, 0x05, 0xa5, 0x04, 0xe1 }
},
{
"667-166","CPU: 667 PLB: 166 OPB: 83 EBC: 83",
{ 0x87, 0x79, 0x42, 0x06, 0x05, 0xa5, 0x04, 0xe1 }
},
{
"800-160","CPU: 800 PLB: 160 OPB: 53 EBC: 17",
{ 0x86, 0x79, 0x81, 0xa7, 0x07, 0xa5, 0x04, 0xe1 }
},
};
int ppc4xx_config_count = ARRAY_SIZE(ppc4xx_config_val);

View File

@@ -1,218 +0,0 @@
/*
* (C) Copyright 2007
* Stefan Roese, DENX Software Engineering, sr@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*
*/
#include <common.h>
#include <command.h>
#include <i2c.h>
#include <asm/byteorder.h>
#define CONFIG_STRESS /* enable 667 MHz CPU freq selection */
#define DEBUG
static int do_bootstrap(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
uchar chip;
ulong data;
int nbytes;
extern char console_buffer[];
char sysClock[4];
char cpuClock[4];
char plbClock[4];
char pcixClock[4];
if (argc < 3) {
cmd_usage(cmdtp);
return 1;
}
if (strcmp(argv[2], "prom0") == 0)
chip = IIC0_BOOTPROM_ADDR;
else
chip = IIC0_ALT_BOOTPROM_ADDR;
/* on Katmai SysClk is always 33MHz */
strcpy(sysClock, "33");
do {
#ifdef CONFIG_STRESS
printf("enter cpu clock frequency 400, 500, 533, 667 MHz or quit to abort\n");
#else
printf("enter cpu clock frequency 400, 500, 533 MHz or quit to abort\n");
#endif
nbytes = readline (" ? ");
if (strcmp(console_buffer, "quit") == 0)
return 0;
if ((strcmp(console_buffer, "400") != 0) &&
(strcmp(console_buffer, "500") != 0) &&
(strcmp(console_buffer, "533") != 0)
#ifdef CONFIG_STRESS
&& (strcmp(console_buffer, "667") != 0)
#endif
) {
nbytes = 0;
}
strcpy(cpuClock, console_buffer);
} while (nbytes == 0);
if (strcmp(cpuClock, "500") == 0)
strcpy(plbClock, "166");
else if (strcmp(cpuClock, "533") == 0)
strcpy(plbClock, "133");
else {
do {
if (strcmp(cpuClock, "400") == 0)
printf("enter plb clock frequency 100, 133 MHz or quit to abort\n");
#ifdef CONFIG_STRESS
if (strcmp(cpuClock, "667") == 0)
printf("enter plb clock frequency 133, 166 MHz or quit to abort\n");
#endif
nbytes = readline (" ? ");
if (strcmp(console_buffer, "quit") == 0)
return 0;
if (strcmp(cpuClock, "400") == 0) {
if ((strcmp(console_buffer, "100") != 0) &&
(strcmp(console_buffer, "133") != 0))
nbytes = 0;
}
#ifdef CONFIG_STRESS
if (strcmp(cpuClock, "667") == 0) {
if ((strcmp(console_buffer, "133") != 0) &&
(strcmp(console_buffer, "166") != 0))
nbytes = 0;
}
#endif
strcpy(plbClock, console_buffer);
} while (nbytes == 0);
}
do {
printf("enter Pci-X clock frequency 33, 66, 100 or 133 MHz or quit to abort\n");
nbytes = readline (" ? ");
if (strcmp(console_buffer, "quit") == 0)
return 0;
if ((strcmp(console_buffer, "33") != 0) &&
(strcmp(console_buffer, "66") != 0) &&
(strcmp(console_buffer, "100") != 0) &&
(strcmp(console_buffer, "133") != 0)) {
nbytes = 0;
}
strcpy(pcixClock, console_buffer);
} while (nbytes == 0);
printf("\nsys clk = %s MHz\n", sysClock);
printf("cpu clk = %s MHz\n", cpuClock);
printf("plb clk = %s MHz\n", plbClock);
printf("Pci-X clk = %s MHz\n", pcixClock);
do {
printf("\npress [y] to write I2C bootstrap \n");
printf("or [n] to abort. \n");
printf("Don't forget to set board switches \n");
printf("according to your choice before re-starting \n");
printf("(refer to 440spe_uboot_kit_um_1_01.pdf) \n");
nbytes = readline (" ? ");
if (strcmp(console_buffer, "n") == 0)
return 0;
} while (nbytes == 0);
if (strcmp(sysClock, "33") == 0) {
if ((strcmp(cpuClock, "400") == 0) &&
(strcmp(plbClock, "100") == 0))
data = 0x8678c206;
if ((strcmp(cpuClock, "400") == 0) &&
(strcmp(plbClock, "133") == 0))
data = 0x8678c2c6;
if ((strcmp(cpuClock, "500") == 0))
data = 0x8778f2c6;
if ((strcmp(cpuClock, "533") == 0))
data = 0x87790252;
#ifdef CONFIG_STRESS
if ((strcmp(cpuClock, "667") == 0) &&
(strcmp(plbClock, "133") == 0))
data = 0x87794256;
if ((strcmp(cpuClock, "667") == 0) &&
(strcmp(plbClock, "166") == 0))
data = 0x87794206;
#endif
}
#ifdef DEBUG
printf(" pin strap0 to write in i2c = %lx\n", data);
#endif /* DEBUG */
if (i2c_write(chip, 0, 1, (uchar *)&data, 4) != 0)
printf("Error writing strap0 in %s\n", argv[2]);
if (strcmp(pcixClock, "33") == 0)
data = 0x000007E1;
if (strcmp(pcixClock, "66") == 0)
data = 0x000006E1;
if (strcmp(pcixClock, "100") == 0)
data = 0x000005E1;
if (strcmp(pcixClock, "133") == 0)
data = 0x000004E1;
if (strcmp(plbClock, "166") == 0)
/* data |= 0x05950000; */ /* this set's DDR2 clock == PLB clock */
data |= 0x05A50000; /* this set's DDR2 clock == 2 * PLB clock */
else
data |= 0x05A50000;
#ifdef DEBUG
printf(" pin strap1 to write in i2c = %lx\n", data);
#endif /* DEBUG */
udelay(1000);
if (i2c_write(chip, 4, 1, (uchar *)&data, 4) != 0)
printf("Error writing strap1 in %s\n", argv[2]);
return 0;
}
U_BOOT_CMD(
bootstrap, 3, 1, do_bootstrap,
"program the serial device strap",
"wrclk [prom0|prom1] - program the serial device strap"
);

View File

@@ -1,5 +1,5 @@
/*
* (C) Copyright 2007-2008
* (C) Copyright 2007-2009
* Stefan Roese, DENX Software Engineering, sr@denx.de.
*
* See file CREDITS for list of people who contributed to this
@@ -260,98 +260,8 @@ u32 ddr_clktr(u32 default_val) {
return (SDRAM_CLKTR_CLKP_90_DEG_ADV);
}
/*************************************************************************
* pci_pre_init
*
* This routine is called just prior to registering the hose and gives
* the board the opportunity to check things. Returning a value of zero
* indicates that things are bad & PCI initialization should be aborted.
*
* Different boards may wish to customize the pci controller structure
* (add regions, override default access routines, etc) or perform
* certain pre-initialization actions.
*
************************************************************************/
#if defined(CONFIG_PCI)
int pci_pre_init(struct pci_controller * hose )
{
unsigned long strap;
/*-------------------------------------------------------------------+
* The katmai board is always configured as the host & requires the
* PCI arbiter to be enabled.
*-------------------------------------------------------------------*/
mfsdr(SDR0_SDSTP1, strap);
if( (strap & SDR0_SDSTP1_PAE_MASK) == 0 ) {
printf("PCI: SDR0_STRP1[%08lX] - PCI Arbiter disabled.\n",strap);
return 0;
}
return 1;
}
#endif /* defined(CONFIG_PCI) */
/*************************************************************************
* pci_target_init
*
* The bootstrap configuration provides default settings for the pci
* inbound map (PIM). But the bootstrap config choices are limited and
* may not be sufficient for a given board.
*
************************************************************************/
#if defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_TARGET_INIT)
void pci_target_init(struct pci_controller * hose )
{
/*-------------------------------------------------------------------+
* Disable everything
*-------------------------------------------------------------------*/
out32r( PCIL0_PIM0SA, 0 ); /* disable */
out32r( PCIL0_PIM1SA, 0 ); /* disable */
out32r( PCIL0_PIM2SA, 0 ); /* disable */
out32r( PCIL0_EROMBA, 0 ); /* disable expansion rom */
/*-------------------------------------------------------------------+
* Map all of SDRAM to PCI address 0x0000_0000. Note that the 440
* strapping options to not support sizes such as 128/256 MB.
*-------------------------------------------------------------------*/
out32r( PCIL0_PIM0LAL, CONFIG_SYS_SDRAM_BASE );
out32r( PCIL0_PIM0LAH, 0 );
out32r( PCIL0_PIM0SA, ~(gd->ram_size - 1) | 1 );
out32r( PCIL0_BAR0, 0 );
/*-------------------------------------------------------------------+
* Program the board's subsystem id/vendor id
*-------------------------------------------------------------------*/
out16r( PCIL0_SBSYSVID, CONFIG_SYS_PCI_SUBSYS_VENDORID );
out16r( PCIL0_SBSYSID, CONFIG_SYS_PCI_SUBSYS_DEVICEID );
out16r( PCIL0_CMD, in16r(PCIL0_CMD) | PCI_COMMAND_MEMORY );
}
#endif /* defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_TARGET_INIT) */
#if defined(CONFIG_PCI)
/*************************************************************************
* is_pci_host
*
* This routine is called to determine if a pci scan should be
* performed. With various hardware environments (especially cPCI and
* PPMC) it's insufficient to depend on the state of the arbiter enable
* bit in the strap register, or generic host/adapter assumptions.
*
* Rather than hard-code a bad assumption in the general 440 code, the
* 440 pci code requires the board to decide at runtime.
*
* Return 0 for adapter mode, non-zero for host (monarch) mode.
*
*
************************************************************************/
int is_pci_host(struct pci_controller *hose)
{
/* The katmai board is always configured as host. */
return 1;
}
static int katmai_pcie_card_present(int port)
int board_pcie_card_present(int port)
{
u32 val;
@@ -367,91 +277,8 @@ static int katmai_pcie_card_present(int port)
return 0;
}
}
static struct pci_controller pcie_hose[3] = {{0},{0},{0}};
void pcie_setup_hoses(int busno)
{
struct pci_controller *hose;
int i, bus;
int ret = 0;
char *env;
unsigned int delay;
/*
* assume we're called after the PCIX hose is initialized, which takes
* bus ID 0 and therefore start numbering PCIe's from 1.
*/
bus = busno;
for (i = 0; i <= 2; i++) {
/* Check for katmai card presence */
if (!katmai_pcie_card_present(i))
continue;
if (is_end_point(i))
ret = ppc4xx_init_pcie_endport(i);
else
ret = ppc4xx_init_pcie_rootport(i);
if (ret == -ENODEV)
continue;
if (ret) {
printf("PCIE%d: initialization as %s failed\n", i,
is_end_point(i) ? "endpoint" : "root-complex");
continue;
}
hose = &pcie_hose[i];
hose->first_busno = bus;
hose->last_busno = bus;
hose->current_busno = bus;
/* setup mem resource */
pci_set_region(hose->regions + 0,
CONFIG_SYS_PCIE_MEMBASE + i * CONFIG_SYS_PCIE_MEMSIZE,
CONFIG_SYS_PCIE_MEMBASE + i * CONFIG_SYS_PCIE_MEMSIZE,
CONFIG_SYS_PCIE_MEMSIZE,
PCI_REGION_MEM);
hose->region_count = 1;
pci_register_hose(hose);
if (is_end_point(i)) {
ppc4xx_setup_pcie_endpoint(hose, i);
/*
* Reson for no scanning is endpoint can not generate
* upstream configuration accesses.
*/
} else {
ppc4xx_setup_pcie_rootpoint(hose, i);
env = getenv ("pciscandelay");
if (env != NULL) {
delay = simple_strtoul(env, NULL, 10);
if (delay > 5)
printf("Warning, expect noticable delay before "
"PCIe scan due to 'pciscandelay' value!\n");
mdelay(delay * 1000);
}
/*
* Config access can only go down stream
*/
hose->last_busno = pci_hose_scan(hose);
bus = hose->last_busno + 1;
}
}
}
#endif /* defined(CONFIG_PCI) */
#ifdef CONFIG_POST
/*
* Returns 1 if keys pressed to start the power-on long-running tests
* Called from board_init_f().
*/
int post_hotkeys_pressed(void)
{
return (ctrlc());
}
#endif
int board_eth_init(bd_t *bis)
{
cpu_eth_init(bis);

View File

@@ -1,138 +0,0 @@
/*
* (C) Copyright 2004
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
OUTPUT_ARCH(powerpc)
/* Do we need any of these for elf?
__DYNAMIC = 0; */
SECTIONS
{
.resetvec 0xFFFFFFFC :
{
*(.resetvec)
} = 0xffff
.bootpg 0xFFFFF000 :
{
cpu/ppc4xx/start.o (.bootpg)
} = 0xffff
/* Read-only sections, merged into text segment: */
. = + SIZEOF_HEADERS;
.interp : { *(.interp) }
.hash : { *(.hash) }
.dynsym : { *(.dynsym) }
.dynstr : { *(.dynstr) }
.rel.text : { *(.rel.text) }
.rela.text : { *(.rela.text) }
.rel.data : { *(.rel.data) }
.rela.data : { *(.rela.data) }
.rel.rodata : { *(.rel.rodata) }
.rela.rodata : { *(.rela.rodata) }
.rel.got : { *(.rel.got) }
.rela.got : { *(.rela.got) }
.rel.ctors : { *(.rel.ctors) }
.rela.ctors : { *(.rela.ctors) }
.rel.dtors : { *(.rel.dtors) }
.rela.dtors : { *(.rela.dtors) }
.rel.bss : { *(.rel.bss) }
.rela.bss : { *(.rela.bss) }
.rel.plt : { *(.rel.plt) }
.rela.plt : { *(.rela.plt) }
.init : { *(.init) }
.plt : { *(.plt) }
.text :
{
cpu/ppc4xx/start.o (.text)
board/amcc/katmai/init.o (.text)
*(.text)
*(.got1)
}
_etext = .;
PROVIDE (etext = .);
.rodata :
{
*(.eh_frame)
*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }
.dtors : { *(.dtors) }
/* Read-write section, merged into data segment: */
. = (. + 0x00FF) & 0xFFFFFF00;
_erotext = .;
PROVIDE (erotext = .);
.reloc :
{
*(.got)
_GOT2_TABLE_ = .;
*(.got2)
_FIXUP_TABLE_ = .;
*(.fixup)
}
__got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
__fixup_entries = (. - _FIXUP_TABLE_)>>2;
.data :
{
*(.data)
*(.data1)
*(.sdata)
*(.sdata2)
*(.dynamic)
CONSTRUCTORS
}
_edata = .;
PROVIDE (edata = .);
. = .;
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
. = .;
__start___ex_table = .;
__ex_table : { *(__ex_table) }
__stop___ex_table = .;
. = ALIGN(256);
__init_begin = .;
.text.init : { *(.text.init) }
.data.init : { *(.data.init) }
. = ALIGN(256);
__init_end = .;
__bss_start = .;
.bss (NOLOAD) :
{
*(.sbss) *(.scommon)
*(.dynbss)
*(.bss)
*(COMMON)
. = ALIGN(4);
}
_end = . ;
PROVIDE (end = .);
}

View File

@@ -30,3 +30,7 @@ endif
ifeq ($(debug),1)
PLATFORM_CPPFLAGS += -DDEBUG
endif
ifdef CONFIG_NAND_U_BOOT
LDSCRIPT := $(TOPDIR)/board/$(BOARDDIR)/u-boot-nand.lds
endif

View File

@@ -39,6 +39,37 @@ DECLARE_GLOBAL_DATA_PTR;
extern flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */
static int board_cpld_version(void)
{
u32 cpld;
cpld = in_be32((void *)CONFIG_SYS_FPGA_FIFO_BASE);
if ((cpld & CONFIG_SYS_FPGA_MAGIC_MASK) != CONFIG_SYS_FPGA_MAGIC) {
/*
* Magic not found -> "old" CPLD revision which needs
* the "old" EBC configuration
*/
mtebc(PB2AP, EBC_BXAP_BME_ENABLED | EBC_BXAP_FWT_ENCODE(5) |
EBC_BXAP_BWT_ENCODE(0) | EBC_BXAP_BCE_DISABLE |
EBC_BXAP_BCT_2TRANS | EBC_BXAP_CSN_ENCODE(0) |
EBC_BXAP_OEN_ENCODE(0) | EBC_BXAP_WBN_ENCODE(3) |
EBC_BXAP_WBF_ENCODE(0) | EBC_BXAP_TH_ENCODE(4) |
EBC_BXAP_RE_DISABLED | EBC_BXAP_SOR_DELAYED |
EBC_BXAP_BEM_WRITEONLY | EBC_BXAP_PEN_DISABLED);
/*
* Return 0 for "old" CPLD version
*/
return 0;
}
/*
* Magic found -> "new" CPLD revision which needs no new
* EBC configuration
*/
return (cpld & CONFIG_SYS_FPGA_VER_MASK) >> 8;
}
/*
* Board early initialization function
*/
@@ -208,6 +239,13 @@ int board_early_init_f (void)
val = SDR0_PFC1_USBEN | SDR0_PFC1_USBBIGEN | SDR0_PFC1_GPT_FREQ;
mtsdr(SDR0_PFC1, val);
/*
* The CPLD version detection has to be the first access to
* the CPLD, so we need to make this access this early and
* save the CPLD version for later.
*/
gd->board_type = board_cpld_version();
/*
* Configure FPGA register with PCIe reset
*/
@@ -252,15 +290,19 @@ int board_emac_count(void)
return 2;
}
static int board_pcie_count(void)
/*
* Override the weak default implementation and return the
* last PCIe slot number (max number - 1).
*/
int board_pcie_last(void)
{
/*
* 405EXr only has one EMAC interface, 405EX has two
*/
if (is_405exr())
return 1;
return 1 - 1;
else
return 2;
return 2 - 1;
}
int checkboard (void)
@@ -276,104 +318,7 @@ int checkboard (void)
puts(", serial# ");
puts(s);
}
putc('\n');
printf(" (CPLD rev. %ld)\n", gd->board_type);
return (0);
}
/*************************************************************************
* pci_pre_init
*
* This routine is called just prior to registering the hose and gives
* the board the opportunity to check things. Returning a value of zero
* indicates that things are bad & PCI initialization should be aborted.
*
* Different boards may wish to customize the pci controller structure
* (add regions, override default access routines, etc) or perform
* certain pre-initialization actions.
*
************************************************************************/
#if defined(CONFIG_PCI)
int pci_pre_init(struct pci_controller * hose )
{
return 0;
}
#endif /* defined(CONFIG_PCI) */
#ifdef CONFIG_PCI
static struct pci_controller pcie_hose[2] = {{0},{0}};
void pcie_setup_hoses(int busno)
{
struct pci_controller *hose;
int i, bus;
int ret = 0;
bus = busno;
char *env;
unsigned int delay;
for (i = 0; i < board_pcie_count(); i++) {
if (is_end_point(i))
ret = ppc4xx_init_pcie_endport(i);
else
ret = ppc4xx_init_pcie_rootport(i);
if (ret == -ENODEV)
continue;
if (ret) {
printf("PCIE%d: initialization as %s failed\n", i,
is_end_point(i) ? "endpoint" : "root-complex");
continue;
}
hose = &pcie_hose[i];
hose->first_busno = bus;
hose->last_busno = bus;
hose->current_busno = bus;
/* setup mem resource */
pci_set_region(hose->regions + 0,
CONFIG_SYS_PCIE_MEMBASE + i * CONFIG_SYS_PCIE_MEMSIZE,
CONFIG_SYS_PCIE_MEMBASE + i * CONFIG_SYS_PCIE_MEMSIZE,
CONFIG_SYS_PCIE_MEMSIZE,
PCI_REGION_MEM);
hose->region_count = 1;
pci_register_hose(hose);
if (is_end_point(i)) {
ppc4xx_setup_pcie_endpoint(hose, i);
/*
* Reson for no scanning is endpoint can not generate
* upstream configuration accesses.
*/
} else {
ppc4xx_setup_pcie_rootpoint(hose, i);
env = getenv ("pciscandelay");
if (env != NULL) {
delay = simple_strtoul(env, NULL, 10);
if (delay > 5)
printf("Warning, expect noticable delay before "
"PCIe scan due to 'pciscandelay' value!\n");
mdelay(delay * 1000);
}
/*
* Config access can only go down stream
*/
hose->last_busno = pci_hose_scan(hose);
bus = hose->last_busno + 1;
}
}
}
#endif
#if defined(CONFIG_POST)
/*
* Returns 1 if keys pressed to start the power-on long-running tests
* Called from board_init_f().
*/
int post_hotkeys_pressed(void)
{
return 0; /* No hotkeys supported */
}
#endif /* CONFIG_POST */

View File

@@ -1,134 +0,0 @@
/*
* (C) Copyright 2000
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
OUTPUT_ARCH(powerpc)
/* Do we need any of these for elf?
__DYNAMIC = 0; */
SECTIONS
{
/* To compile successfully, uncomment the following section.
* To go in ram, remove the section.
* Added by SunHe.
*/
.resetvec 0xFFFFFFFC :
{
*(.resetvec)
} = 0xffff
/* Read-only sections, merged into text segment: */
. = + SIZEOF_HEADERS;
.interp : { *(.interp) }
.hash : { *(.hash) }
.dynsym : { *(.dynsym) }
.dynstr : { *(.dynstr) }
.rel.text : { *(.rel.text) }
.rela.text : { *(.rela.text) }
.rel.data : { *(.rel.data) }
.rela.data : { *(.rela.data) }
.rel.rodata : { *(.rel.rodata) }
.rela.rodata : { *(.rela.rodata) }
.rel.got : { *(.rel.got) }
.rela.got : { *(.rela.got) }
.rel.ctors : { *(.rel.ctors) }
.rela.ctors : { *(.rela.ctors) }
.rel.dtors : { *(.rel.dtors) }
.rela.dtors : { *(.rela.dtors) }
.rel.bss : { *(.rel.bss) }
.rela.bss : { *(.rela.bss) }
.rel.plt : { *(.rel.plt) }
.rela.plt : { *(.rela.plt) }
.init : { *(.init) }
.plt : { *(.plt) }
.text :
{
cpu/ppc4xx/start.o (.text)
*(.text)
*(.got1)
}
_etext = .;
PROVIDE (etext = .);
.rodata :
{
*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }
.dtors : { *(.dtors) }
/* Read-write section, merged into data segment: */
. = (. + 0x00FF) & 0xFFFFFF00;
_erotext = .;
PROVIDE (erotext = .);
.reloc :
{
*(.got)
_GOT2_TABLE_ = .;
*(.got2)
_FIXUP_TABLE_ = .;
*(.fixup)
}
__got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
__fixup_entries = (. - _FIXUP_TABLE_)>>2;
.data :
{
*(.data)
*(.data1)
*(.sdata)
*(.sdata2)
*(.dynamic)
CONSTRUCTORS
}
_edata = .;
PROVIDE (edata = .);
. = .;
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
. = .;
__start___ex_table = .;
__ex_table : { *(__ex_table) }
__stop___ex_table = .;
. = ALIGN(256);
__init_begin = .;
.text.init : { *(.text.init) }
.data.init : { *(.data.init) }
. = ALIGN(256);
__init_end = .;
__bss_start = .;
.bss (NOLOAD) :
{
*(.sbss) *(.scommon)
*(.dynbss)
*(.bss)
*(COMMON)
. = ALIGN(4);
}
_end = . ;
PROVIDE (end = .);
}

View File

@@ -126,102 +126,6 @@ u32 ddr_clktr(u32 default_val) {
return (SDRAM_CLKTR_CLKP_180_DEG_ADV);
}
/*************************************************************************
* pci_pre_init
*
* This routine is called just prior to registering the hose and gives
* the board the opportunity to check things. Returning a value of zero
* indicates that things are bad & PCI initialization should be aborted.
*
* Different boards may wish to customize the pci controller structure
* (add regions, override default access routines, etc) or perform
* certain pre-initialization actions.
*
************************************************************************/
#if defined(CONFIG_PCI)
int pci_pre_init( struct pci_controller *hose )
{
unsigned long strap;
/*--------------------------------------------------------------------------+
* The luan board is always configured as the host & requires the
* PCI arbiter to be enabled.
*--------------------------------------------------------------------------*/
mfsdr(SDR0_SDSTP1, strap);
if( (strap & SDR0_SDSTP1_PAE_MASK) == 0 ) {
printf("PCI: SDR0_STRP1[%08lX] - PCI Arbiter disabled.\n",strap);
return 0;
}
return 1;
}
#endif /* defined(CONFIG_PCI) */
/*************************************************************************
* pci_target_init
*
* The bootstrap configuration provides default settings for the pci
* inbound map (PIM). But the bootstrap config choices are limited and
* may not be sufficient for a given board.
*
************************************************************************/
#if defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_TARGET_INIT)
void pci_target_init(struct pci_controller *hose)
{
/*--------------------------------------------------------------------------+
* Disable everything
*--------------------------------------------------------------------------*/
out32r( PCIL0_PIM0SA, 0 ); /* disable */
out32r( PCIL0_PIM1SA, 0 ); /* disable */
out32r( PCIL0_PIM2SA, 0 ); /* disable */
out32r( PCIL0_EROMBA, 0 ); /* disable expansion rom */
/*--------------------------------------------------------------------------+
* Map all of SDRAM to PCI address 0x0000_0000. Note that the 440 strapping
* options to not support sizes such as 128/256 MB.
*--------------------------------------------------------------------------*/
out32r( PCIL0_PIM0LAL, CONFIG_SYS_SDRAM_BASE );
out32r( PCIL0_PIM0LAH, 0 );
out32r( PCIL0_PIM0SA, ~(gd->ram_size - 1) | 1 );
out32r( PCIL0_BAR0, 0 );
/*--------------------------------------------------------------------------+
* Program the board's subsystem id/vendor id
*--------------------------------------------------------------------------*/
out16r( PCIL0_SBSYSVID, CONFIG_SYS_PCI_SUBSYS_VENDORID );
out16r( PCIL0_SBSYSID, CONFIG_SYS_PCI_SUBSYS_DEVICEID );
out16r( PCIL0_CMD, in16r(PCIL0_CMD) | PCI_COMMAND_MEMORY );
}
#endif /* defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_TARGET_INIT) */
/*************************************************************************
* is_pci_host
*
* This routine is called to determine if a pci scan should be
* performed. With various hardware environments (especially cPCI and
* PPMC) it's insufficient to depend on the state of the arbiter enable
* bit in the strap register, or generic host/adapter assumptions.
*
* Rather than hard-code a bad assumption in the general 440 code, the
* 440 pci code requires the board to decide at runtime.
*
* Return 0 for adapter mode, non-zero for host (monarch) mode.
*
*
************************************************************************/
#if defined(CONFIG_PCI)
int is_pci_host(struct pci_controller *hose)
{
return 1;
}
#endif /* defined(CONFIG_PCI) */
/*************************************************************************
* hw_watchdog_reset
*

View File

@@ -1,141 +0,0 @@
/*
* (C) Copyright 2002
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
OUTPUT_ARCH(powerpc)
/* Do we need any of these for elf?
__DYNAMIC = 0; */
SECTIONS
{
.resetvec 0xFFFFFFFC :
{
*(.resetvec)
} = 0xffff
.bootpg 0xFFFFF000 :
{
cpu/ppc4xx/start.o (.bootpg)
} = 0xffff
/* Read-only sections, merged into text segment: */
. = + SIZEOF_HEADERS;
.interp : { *(.interp) }
.hash : { *(.hash) }
.dynsym : { *(.dynsym) }
.dynstr : { *(.dynstr) }
.rel.text : { *(.rel.text) }
.rela.text : { *(.rela.text) }
.rel.data : { *(.rel.data) }
.rela.data : { *(.rela.data) }
.rel.rodata : { *(.rel.rodata) }
.rela.rodata : { *(.rela.rodata) }
.rel.got : { *(.rel.got) }
.rela.got : { *(.rela.got) }
.rel.ctors : { *(.rel.ctors) }
.rela.ctors : { *(.rela.ctors) }
.rel.dtors : { *(.rel.dtors) }
.rela.dtors : { *(.rela.dtors) }
.rel.bss : { *(.rel.bss) }
.rela.bss : { *(.rela.bss) }
.rel.plt : { *(.rel.plt) }
.rela.plt : { *(.rela.plt) }
.init : { *(.init) }
.plt : { *(.plt) }
.text :
{
/* WARNING - the following is hand-optimized to fit within */
/* the sector layout of our flash chips! XXX FIXME XXX */
cpu/ppc4xx/start.o (.text)
board/amcc/luan/init.o (.text)
*(.text)
*(.got1)
}
_etext = .;
PROVIDE (etext = .);
.rodata :
{
*(.eh_frame)
*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }
.dtors : { *(.dtors) }
/* Read-write section, merged into data segment: */
. = (. + 0x00FF) & 0xFFFFFF00;
_erotext = .;
PROVIDE (erotext = .);
.reloc :
{
*(.got)
_GOT2_TABLE_ = .;
*(.got2)
_FIXUP_TABLE_ = .;
*(.fixup)
}
__got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
__fixup_entries = (. - _FIXUP_TABLE_)>>2;
.data :
{
*(.data)
*(.data1)
*(.sdata)
*(.sdata2)
*(.dynamic)
CONSTRUCTORS
}
_edata = .;
PROVIDE (edata = .);
. = .;
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
. = .;
__start___ex_table = .;
__ex_table : { *(__ex_table) }
__stop___ex_table = .;
. = ALIGN(256);
__init_begin = .;
.text.init : { *(.text.init) }
.data.init : { *(.data.init) }
. = ALIGN(256);
__init_end = .;
__bss_start = .;
.bss (NOLOAD) :
{
*(.sbss) *(.scommon)
*(.dynbss)
*(.bss)
*(COMMON)
. = ALIGN(4);
}
_end = . ;
PROVIDE (end = .);
}

View File

@@ -236,100 +236,3 @@ int checkboard (void)
return (0);
}
/*************************************************************************
* pci_pre_init
*
* This routine is called just prior to registering the hose and gives
* the board the opportunity to check things. Returning a value of zero
* indicates that things are bad & PCI initialization should be aborted.
*
* Different boards may wish to customize the pci controller structure
* (add regions, override default access routines, etc) or perform
* certain pre-initialization actions.
*
************************************************************************/
#if defined(CONFIG_PCI)
int pci_pre_init(struct pci_controller * hose )
{
return 0;
}
#endif /* defined(CONFIG_PCI) */
#ifdef CONFIG_PCI
static struct pci_controller pcie_hose[2] = {{0},{0}};
void pcie_setup_hoses(int busno)
{
struct pci_controller *hose;
int i, bus;
int ret = 0;
bus = busno;
char *env;
unsigned int delay;
for (i = 0; i < 2; i++) {
if (is_end_point(i))
ret = ppc4xx_init_pcie_endport(i);
else
ret = ppc4xx_init_pcie_rootport(i);
if (ret == -ENODEV)
continue;
if (ret) {
printf("PCIE%d: initialization as %s failed\n", i,
is_end_point(i) ? "endpoint" : "root-complex");
continue;
}
hose = &pcie_hose[i];
hose->first_busno = bus;
hose->last_busno = bus;
hose->current_busno = bus;
/* setup mem resource */
pci_set_region(hose->regions + 0,
CONFIG_SYS_PCIE_MEMBASE + i * CONFIG_SYS_PCIE_MEMSIZE,
CONFIG_SYS_PCIE_MEMBASE + i * CONFIG_SYS_PCIE_MEMSIZE,
CONFIG_SYS_PCIE_MEMSIZE,
PCI_REGION_MEM);
hose->region_count = 1;
pci_register_hose(hose);
if (is_end_point(i)) {
ppc4xx_setup_pcie_endpoint(hose, i);
/*
* Reson for no scanning is endpoint can not generate
* upstream configuration accesses.
*/
} else {
ppc4xx_setup_pcie_rootpoint(hose, i);
env = getenv ("pciscandelay");
if (env != NULL) {
delay = simple_strtoul(env, NULL, 10);
if (delay > 5)
printf("Warning, expect noticable delay before "
"PCIe scan due to 'pciscandelay' value!\n");
mdelay(delay * 1000);
}
/*
* Config access can only go down stream
*/
hose->last_busno = pci_hose_scan(hose);
bus = hose->last_busno + 1;
}
}
}
#endif
#if defined(CONFIG_POST)
/*
* Returns 1 if keys pressed to start the power-on long-running tests
* Called from board_init_f().
*/
int post_hotkeys_pressed(void)
{
return 0; /* No hotkeys supported */
}
#endif /* CONFIG_POST */

View File

@@ -1,134 +0,0 @@
/*
* (C) Copyright 2000
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
OUTPUT_ARCH(powerpc)
/* Do we need any of these for elf?
__DYNAMIC = 0; */
SECTIONS
{
/* To compile successfully, uncomment the following section.
* To go in ram, remove the section.
* Added by SunHe.
*/
.resetvec 0xFFFFFFFC :
{
*(.resetvec)
} = 0xffff
/* Read-only sections, merged into text segment: */
. = + SIZEOF_HEADERS;
.interp : { *(.interp) }
.hash : { *(.hash) }
.dynsym : { *(.dynsym) }
.dynstr : { *(.dynstr) }
.rel.text : { *(.rel.text) }
.rela.text : { *(.rela.text) }
.rel.data : { *(.rel.data) }
.rela.data : { *(.rela.data) }
.rel.rodata : { *(.rel.rodata) }
.rela.rodata : { *(.rela.rodata) }
.rel.got : { *(.rel.got) }
.rela.got : { *(.rela.got) }
.rel.ctors : { *(.rel.ctors) }
.rela.ctors : { *(.rela.ctors) }
.rel.dtors : { *(.rel.dtors) }
.rela.dtors : { *(.rela.dtors) }
.rel.bss : { *(.rel.bss) }
.rela.bss : { *(.rela.bss) }
.rel.plt : { *(.rel.plt) }
.rela.plt : { *(.rela.plt) }
.init : { *(.init) }
.plt : { *(.plt) }
.text :
{
cpu/ppc4xx/start.o (.text)
*(.text)
*(.got1)
}
_etext = .;
PROVIDE (etext = .);
.rodata :
{
*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }
.dtors : { *(.dtors) }
/* Read-write section, merged into data segment: */
. = (. + 0x00FF) & 0xFFFFFF00;
_erotext = .;
PROVIDE (erotext = .);
.reloc :
{
*(.got)
_GOT2_TABLE_ = .;
*(.got2)
_FIXUP_TABLE_ = .;
*(.fixup)
}
__got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
__fixup_entries = (. - _FIXUP_TABLE_)>>2;
.data :
{
*(.data)
*(.data1)
*(.sdata)
*(.sdata2)
*(.dynamic)
CONSTRUCTORS
}
_edata = .;
PROVIDE (edata = .);
. = .;
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
. = .;
__start___ex_table = .;
__ex_table : { *(__ex_table) }
__stop___ex_table = .;
. = ALIGN(256);
__init_begin = .;
.text.init : { *(.text.init) }
.data.init : { *(.data.init) }
. = ALIGN(256);
__init_end = .;
__bss_start = .;
.bss (NOLOAD) :
{
*(.sbss) *(.scommon)
*(.dynbss)
*(.bss)
*(COMMON)
. = ALIGN(4);
}
_end = . ;
PROVIDE (end = .);
}

View File

@@ -275,102 +275,6 @@ long int fixed_sdram (void)
}
#endif /* !defined(CONFIG_SPD_EEPROM) */
/*************************************************************************
* pci_pre_init
*
* This routine is called just prior to registering the hose and gives
* the board the opportunity to check things. Returning a value of zero
* indicates that things are bad & PCI initialization should be aborted.
*
* Different boards may wish to customize the pci controller structure
* (add regions, override default access routines, etc) or perform
* certain pre-initialization actions.
*
************************************************************************/
#if defined(CONFIG_PCI)
int pci_pre_init(struct pci_controller * hose )
{
unsigned long strap;
/*--------------------------------------------------------------------------+
* The ocotea board is always configured as the host & requires the
* PCI arbiter to be enabled.
*--------------------------------------------------------------------------*/
mfsdr(SDR0_SDSTP1, strap);
if( (strap & SDR0_SDSTP1_PAE_MASK) == 0 ){
printf("PCI: SDR0_STRP1[%08lX] - PCI Arbiter disabled.\n",strap);
return 0;
}
return 1;
}
#endif /* defined(CONFIG_PCI) */
/*************************************************************************
* pci_target_init
*
* The bootstrap configuration provides default settings for the pci
* inbound map (PIM). But the bootstrap config choices are limited and
* may not be sufficient for a given board.
*
************************************************************************/
#if defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_TARGET_INIT)
void pci_target_init(struct pci_controller * hose )
{
/*--------------------------------------------------------------------------+
* Disable everything
*--------------------------------------------------------------------------*/
out32r( PCIL0_PIM0SA, 0 ); /* disable */
out32r( PCIL0_PIM1SA, 0 ); /* disable */
out32r( PCIL0_PIM2SA, 0 ); /* disable */
out32r( PCIL0_EROMBA, 0 ); /* disable expansion rom */
/*--------------------------------------------------------------------------+
* Map all of SDRAM to PCI address 0x0000_0000. Note that the 440 strapping
* options to not support sizes such as 128/256 MB.
*--------------------------------------------------------------------------*/
out32r( PCIL0_PIM0LAL, CONFIG_SYS_SDRAM_BASE );
out32r( PCIL0_PIM0LAH, 0 );
out32r( PCIL0_PIM0SA, ~(gd->ram_size - 1) | 1 );
out32r( PCIL0_BAR0, 0 );
/*--------------------------------------------------------------------------+
* Program the board's subsystem id/vendor id
*--------------------------------------------------------------------------*/
out16r( PCIL0_SBSYSVID, CONFIG_SYS_PCI_SUBSYS_VENDORID );
out16r( PCIL0_SBSYSID, CONFIG_SYS_PCI_SUBSYS_DEVICEID );
out16r( PCIL0_CMD, in16r(PCIL0_CMD) | PCI_COMMAND_MEMORY );
}
#endif /* defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_TARGET_INIT) */
/*************************************************************************
* is_pci_host
*
* This routine is called to determine if a pci scan should be
* performed. With various hardware environments (especially cPCI and
* PPMC) it's insufficient to depend on the state of the arbiter enable
* bit in the strap register, or generic host/adapter assumptions.
*
* Rather than hard-code a bad assumption in the general 440 code, the
* 440 pci code requires the board to decide at runtime.
*
* Return 0 for adapter mode, non-zero for host (monarch) mode.
*
*
************************************************************************/
#if defined(CONFIG_PCI)
int is_pci_host(struct pci_controller *hose)
{
/* The ocotea board is always configured as host. */
return(1);
}
#endif /* defined(CONFIG_PCI) */
void fpga_init(void)
{
unsigned long group;
@@ -496,15 +400,3 @@ void fpga_init(void)
return;
}
#ifdef CONFIG_POST
/*
* Returns 1 if keys pressed to start the power-on long-running tests
* Called from board_init_f().
*/
int post_hotkeys_pressed(void)
{
return (ctrlc());
}
#endif

View File

@@ -1,141 +0,0 @@
/*
* (C) Copyright 2004
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
OUTPUT_ARCH(powerpc)
/* Do we need any of these for elf?
__DYNAMIC = 0; */
SECTIONS
{
.resetvec 0xFFFFFFFC :
{
*(.resetvec)
} = 0xffff
.bootpg 0xFFFFF000 :
{
cpu/ppc4xx/start.o (.bootpg)
} = 0xffff
/* Read-only sections, merged into text segment: */
. = + SIZEOF_HEADERS;
.interp : { *(.interp) }
.hash : { *(.hash) }
.dynsym : { *(.dynsym) }
.dynstr : { *(.dynstr) }
.rel.text : { *(.rel.text) }
.rela.text : { *(.rela.text) }
.rel.data : { *(.rel.data) }
.rela.data : { *(.rela.data) }
.rel.rodata : { *(.rel.rodata) }
.rela.rodata : { *(.rela.rodata) }
.rel.got : { *(.rel.got) }
.rela.got : { *(.rela.got) }
.rel.ctors : { *(.rel.ctors) }
.rela.ctors : { *(.rela.ctors) }
.rel.dtors : { *(.rel.dtors) }
.rela.dtors : { *(.rela.dtors) }
.rel.bss : { *(.rel.bss) }
.rela.bss : { *(.rela.bss) }
.rel.plt : { *(.rel.plt) }
.rela.plt : { *(.rela.plt) }
.init : { *(.init) }
.plt : { *(.plt) }
.text :
{
/* WARNING - the following is hand-optimized to fit within */
/* the sector layout of our flash chips! XXX FIXME XXX */
cpu/ppc4xx/start.o (.text)
board/amcc/ocotea/init.o (.text)
*(.text)
*(.got1)
}
_etext = .;
PROVIDE (etext = .);
.rodata :
{
*(.eh_frame)
*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }
.dtors : { *(.dtors) }
/* Read-write section, merged into data segment: */
. = (. + 0x00FF) & 0xFFFFFF00;
_erotext = .;
PROVIDE (erotext = .);
.reloc :
{
*(.got)
_GOT2_TABLE_ = .;
*(.got2)
_FIXUP_TABLE_ = .;
*(.fixup)
}
__got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
__fixup_entries = (. - _FIXUP_TABLE_)>>2;
.data :
{
*(.data)
*(.data1)
*(.sdata)
*(.sdata2)
*(.dynamic)
CONSTRUCTORS
}
_edata = .;
PROVIDE (edata = .);
. = .;
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
. = .;
__start___ex_table = .;
__ex_table : { *(__ex_table) }
__stop___ex_table = .;
. = ALIGN(256);
__init_begin = .;
.text.init : { *(.text.init) }
.data.init : { *(.data.init) }
. = ALIGN(256);
__init_end = .;
__bss_start = .;
.bss (NOLOAD) :
{
*(.sbss) *(.scommon)
*(.dynbss)
*(.bss)
*(COMMON)
. = ALIGN(4);
}
_end = . ;
PROVIDE (end = .);
}

View File

@@ -1,145 +0,0 @@
/*
* (C) Copyright 2004
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
OUTPUT_ARCH(powerpc)
SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
/* Do we need any of these for elf?
__DYNAMIC = 0; */
SECTIONS
{
.resetvec 0xFFFFFFFC :
{
*(.resetvec)
} = 0xffff
.bootpg 0xFFFFF000 :
{
cpu/ppc4xx/start.o (.bootpg)
} = 0xffff
/* Read-only sections, merged into text segment: */
. = + SIZEOF_HEADERS;
.interp : { *(.interp) }
.hash : { *(.hash) }
.dynsym : { *(.dynsym) }
.dynstr : { *(.dynstr) }
.rel.text : { *(.rel.text) }
.rela.text : { *(.rela.text) }
.rel.data : { *(.rel.data) }
.rela.data : { *(.rela.data) }
.rel.rodata : { *(.rel.rodata) }
.rela.rodata : { *(.rela.rodata) }
.rel.got : { *(.rel.got) }
.rela.got : { *(.rela.got) }
.rel.ctors : { *(.rel.ctors) }
.rela.ctors : { *(.rela.ctors) }
.rel.dtors : { *(.rel.dtors) }
.rela.dtors : { *(.rela.dtors) }
.rel.bss : { *(.rel.bss) }
.rela.bss : { *(.rela.bss) }
.rel.plt : { *(.rel.plt) }
.rela.plt : { *(.rela.plt) }
.init : { *(.init) }
.plt : { *(.plt) }
.text :
{
/* WARNING - the following is hand-optimized to fit within */
/* the sector layout of our flash chips! XXX FIXME XXX */
cpu/ppc4xx/start.o (.text)
board/amcc/redwood/init.o (.text)
/* . = env_offset;*/
/* common/env_embedded.o(.text)*/
*(.text)
*(.got1)
}
_etext = .;
PROVIDE (etext = .);
.rodata :
{
*(.eh_frame)
*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }
.dtors : { *(.dtors) }
/* Read-write section, merged into data segment: */
. = (. + 0x00FF) & 0xFFFFFF00;
_erotext = .;
PROVIDE (erotext = .);
.reloc :
{
*(.got)
_GOT2_TABLE_ = .;
*(.got2)
_FIXUP_TABLE_ = .;
*(.fixup)
}
__got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
__fixup_entries = (. - _FIXUP_TABLE_)>>2;
.data :
{
*(.data)
*(.data1)
*(.sdata)
*(.sdata2)
*(.dynamic)
CONSTRUCTORS
}
_edata = .;
PROVIDE (edata = .);
. = .;
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
. = .;
__start___ex_table = .;
__ex_table : { *(__ex_table) }
__stop___ex_table = .;
. = ALIGN(256);
__init_begin = .;
.text.init : { *(.text.init) }
.data.init : { *(.data.init) }
. = ALIGN(256);
__init_end = .;
__bss_start = .;
.bss :
{
*(.sbss) *(.scommon)
*(.dynbss)
*(.bss)
*(COMMON)
. = ALIGN(4);
}
_end = . ;
PROVIDE (end = .);
}

View File

@@ -43,3 +43,7 @@ endif
ifeq ($(dbcr),1)
PLATFORM_CPPFLAGS += -DCONFIG_SYS_INIT_DBCR=0x8cff0000
endif
ifdef CONFIG_NAND_U_BOOT
LDSCRIPT := $(TOPDIR)/board/$(BOARDDIR)/u-boot-nand.lds
endif

View File

@@ -364,183 +364,12 @@ int checkboard(void)
/*
* Assign interrupts to PCI devices.
*/
void sequoia_pci_fixup_irq(struct pci_controller *hose, pci_dev_t dev)
void board_pci_fixup_irq(struct pci_controller *hose, pci_dev_t dev)
{
pci_hose_write_config_byte(hose, dev, PCI_INTERRUPT_LINE, VECNUM_EIRQ2);
}
#endif
/*
* pci_pre_init
*
* This routine is called just prior to registering the hose and gives
* the board the opportunity to check things. Returning a value of zero
* indicates that things are bad & PCI initialization should be aborted.
*
* Different boards may wish to customize the pci controller structure
* (add regions, override default access routines, etc) or perform
* certain pre-initialization actions.
*/
#if defined(CONFIG_PCI)
int pci_pre_init(struct pci_controller *hose)
{
unsigned long addr;
/*
* Set priority for all PLB3 devices to 0.
* Set PLB3 arbiter to fair mode.
*/
mfsdr(SD0_AMP1, addr);
mtsdr(SD0_AMP1, (addr & 0x000000FF) | 0x0000FF00);
addr = mfdcr(PLB3_ACR);
mtdcr(PLB3_ACR, addr | 0x80000000);
/*
* Set priority for all PLB4 devices to 0.
*/
mfsdr(SD0_AMP0, addr);
mtsdr(SD0_AMP0, (addr & 0x000000FF) | 0x0000FF00);
addr = mfdcr(PLB4_ACR) | 0xa0000000; /* Was 0x8---- */
mtdcr(PLB4_ACR, addr);
/*
* Set Nebula PLB4 arbiter to fair mode.
*/
/* Segment0 */
addr = (mfdcr(PLB0_ACR) & ~PLB0_ACR_PPM_MASK) | PLB0_ACR_PPM_FAIR;
addr = (addr & ~PLB0_ACR_HBU_MASK) | PLB0_ACR_HBU_ENABLED;
addr = (addr & ~PLB0_ACR_RDP_MASK) | PLB0_ACR_RDP_4DEEP;
addr = (addr & ~PLB0_ACR_WRP_MASK) | PLB0_ACR_WRP_2DEEP;
mtdcr(PLB0_ACR, addr);
/* Segment1 */
addr = (mfdcr(PLB1_ACR) & ~PLB1_ACR_PPM_MASK) | PLB1_ACR_PPM_FAIR;
addr = (addr & ~PLB1_ACR_HBU_MASK) | PLB1_ACR_HBU_ENABLED;
addr = (addr & ~PLB1_ACR_RDP_MASK) | PLB1_ACR_RDP_4DEEP;
addr = (addr & ~PLB1_ACR_WRP_MASK) | PLB1_ACR_WRP_2DEEP;
mtdcr(PLB1_ACR, addr);
#ifdef CONFIG_PCI_PNP
hose->fixup_irq = sequoia_pci_fixup_irq;
#endif
return 1;
}
#endif /* defined(CONFIG_PCI) */
/*
* pci_target_init
*
* The bootstrap configuration provides default settings for the pci
* inbound map (PIM). But the bootstrap config choices are limited and
* may not be sufficient for a given board.
*/
#if defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_TARGET_INIT)
void pci_target_init(struct pci_controller *hose)
{
/*
* Set up Direct MMIO registers
*/
/*
* PowerPC440EPX PCI Master configuration.
* Map one 1Gig range of PLB/processor addresses to PCI memory space.
* PLB address 0xA0000000-0xDFFFFFFF
* ==> PCI address 0xA0000000-0xDFFFFFFF
* Use byte reversed out routines to handle endianess.
* Make this region non-prefetchable.
*/
out32r(PCIL0_PMM0MA, 0x00000000); /* PMM0 Mask/Attribute */
/* - disabled b4 setting */
out32r(PCIL0_PMM0LA, CONFIG_SYS_PCI_MEMBASE); /* PMM0 Local Address */
out32r(PCIL0_PMM0PCILA, CONFIG_SYS_PCI_MEMBASE); /* PMM0 PCI Low Address */
out32r(PCIL0_PMM0PCIHA, 0x00000000); /* PMM0 PCI High Address */
out32r(PCIL0_PMM0MA, 0xE0000001); /* 512M + No prefetching, */
/* and enable region */
out32r(PCIL0_PMM1MA, 0x00000000); /* PMM0 Mask/Attribute */
/* - disabled b4 setting */
out32r(PCIL0_PMM1LA, CONFIG_SYS_PCI_MEMBASE2); /* PMM0 Local Address */
out32r(PCIL0_PMM1PCILA, CONFIG_SYS_PCI_MEMBASE2); /* PMM0 PCI Low Address */
out32r(PCIL0_PMM1PCIHA, 0x00000000); /* PMM0 PCI High Address */
out32r(PCIL0_PMM1MA, 0xE0000001); /* 512M + No prefetching, */
/* and enable region */
out32r(PCIL0_PTM1MS, 0x00000001); /* Memory Size/Attribute */
out32r(PCIL0_PTM1LA, 0); /* Local Addr. Reg */
out32r(PCIL0_PTM2MS, 0); /* Memory Size/Attribute */
out32r(PCIL0_PTM2LA, 0); /* Local Addr. Reg */
/*
* Set up Configuration registers
*/
/* Program the board's subsystem id/vendor id */
pci_write_config_word(0, PCI_SUBSYSTEM_VENDOR_ID,
CONFIG_SYS_PCI_SUBSYS_VENDORID);
pci_write_config_word(0, PCI_SUBSYSTEM_ID, CONFIG_SYS_PCI_SUBSYS_ID);
/* Configure command register as bus master */
pci_write_config_word(0, PCI_COMMAND, PCI_COMMAND_MASTER);
/* 240nS PCI clock */
pci_write_config_word(0, PCI_LATENCY_TIMER, 1);
/* No error reporting */
pci_write_config_word(0, PCI_ERREN, 0);
pci_write_config_dword(0, PCI_BRDGOPT2, 0x00000101);
}
#endif /* defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_TARGET_INIT) */
#if defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_MASTER_INIT)
void pci_master_init(struct pci_controller *hose)
{
unsigned short temp_short;
/*
* Write the PowerPC440 EP PCI Configuration regs.
* Enable PowerPC440 EP to be a master on the PCI bus (PMM).
* Enable PowerPC440 EP to act as a PCI memory target (PTM).
*/
pci_read_config_word(0, PCI_COMMAND, &temp_short);
pci_write_config_word(0, PCI_COMMAND,
temp_short | PCI_COMMAND_MASTER |
PCI_COMMAND_MEMORY);
}
#endif /* defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_MASTER_INIT) */
/*
* is_pci_host
*
* This routine is called to determine if a pci scan should be
* performed. With various hardware environments (especially cPCI and
* PPMC) it's insufficient to depend on the state of the arbiter enable
* bit in the strap register, or generic host/adapter assumptions.
*
* Rather than hard-code a bad assumption in the general 440 code, the
* 440 pci code requires the board to decide at runtime.
*
* Return 0 for adapter mode, non-zero for host (monarch) mode.
*/
#if defined(CONFIG_PCI)
int is_pci_host(struct pci_controller *hose)
{
/* Cactus is always configured as host. */
return (1);
}
#endif /* defined(CONFIG_PCI) */
#if defined(CONFIG_POST)
/*
* Returns 1 if keys pressed to start the power-on long-running tests
* Called from board_init_f().
*/
int post_hotkeys_pressed(void)
{
return 0; /* No hotkeys supported */
}
#endif /* CONFIG_POST */
#if defined(CONFIG_NAND_U_BOOT) || defined(CONFIG_SYS_RAMBOOT)
/*
* On NAND-booting sequoia, we need to patch the chips select numbers

View File

@@ -1,142 +0,0 @@
/*
* (C) Copyright 2002
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
OUTPUT_ARCH(powerpc)
/* Do we need any of these for elf?
__DYNAMIC = 0; */
SECTIONS
{
.resetvec 0xFFFFFFFC :
{
*(.resetvec)
} = 0xffff
.bootpg 0xFFFFF000 :
{
cpu/ppc4xx/start.o (.bootpg)
} = 0xffff
/* Read-only sections, merged into text segment: */
. = + SIZEOF_HEADERS;
.interp : { *(.interp) }
.hash : { *(.hash) }
.dynsym : { *(.dynsym) }
.dynstr : { *(.dynstr) }
.rel.text : { *(.rel.text) }
.rela.text : { *(.rela.text) }
.rel.data : { *(.rel.data) }
.rela.data : { *(.rela.data) }
.rel.rodata : { *(.rel.rodata) }
.rela.rodata : { *(.rela.rodata) }
.rel.got : { *(.rel.got) }
.rela.got : { *(.rela.got) }
.rel.ctors : { *(.rel.ctors) }
.rela.ctors : { *(.rela.ctors) }
.rel.dtors : { *(.rel.dtors) }
.rela.dtors : { *(.rela.dtors) }
.rel.bss : { *(.rel.bss) }
.rela.bss : { *(.rela.bss) }
.rel.plt : { *(.rel.plt) }
.rela.plt : { *(.rela.plt) }
.init : { *(.init) }
.plt : { *(.plt) }
.text :
{
/* WARNING - the following is hand-optimized to fit within */
/* the sector layout of our flash chips! XXX FIXME XXX */
cpu/ppc4xx/start.o (.text)
*(.text)
*(.got1)
}
_etext = .;
PROVIDE (etext = .);
.rodata :
{
*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }
.dtors : { *(.dtors) }
/* Read-write section, merged into data segment: */
. = (. + 0x00FF) & 0xFFFFFF00;
_erotext = .;
PROVIDE (erotext = .);
.reloc :
{
*(.got)
_GOT2_TABLE_ = .;
*(.got2)
_FIXUP_TABLE_ = .;
*(.fixup)
}
__got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
__fixup_entries = (. - _FIXUP_TABLE_)>>2;
.data :
{
*(.data)
*(.data1)
*(.sdata)
*(.sdata2)
*(.dynamic)
CONSTRUCTORS
}
_edata = .;
PROVIDE (edata = .);
. = .;
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
. = .;
__start___ex_table = .;
__ex_table : { *(__ex_table) }
__stop___ex_table = .;
. = ALIGN(256);
__init_begin = .;
.text.init : { *(.text.init) }
.data.init : { *(.data.init) }
. = ALIGN(256);
__init_end = .;
__bss_start = .;
.bss (NOLOAD) :
{
*(.sbss) *(.scommon)
*(.dynbss)
*(.bss)
*(COMMON)
. = ALIGN(4);
}
ppcenv_assert = ASSERT(. < 0xFFFF8000, ".bss section too big, overlaps .ppcenv section. Please update your confguration: CONFIG_SYS_MONITOR_BASE, CONFIG_SYS_MONITOR_LEN and TEXT_BASE may need to be modified.");
_end = . ;
PROVIDE (end = .);
}

View File

@@ -1,134 +0,0 @@
/*
* (C) Copyright 2000
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
OUTPUT_ARCH(powerpc)
/* Do we need any of these for elf?
__DYNAMIC = 0; */
SECTIONS
{
.resetvec 0xFFFFFFFC :
{
*(.resetvec)
} = 0xffff
/* Read-only sections, merged into text segment: */
. = + SIZEOF_HEADERS;
.interp : { *(.interp) }
.hash : { *(.hash) }
.dynsym : { *(.dynsym) }
.dynstr : { *(.dynstr) }
.rel.text : { *(.rel.text) }
.rela.text : { *(.rela.text) }
.rel.data : { *(.rel.data) }
.rela.data : { *(.rela.data) }
.rel.rodata : { *(.rel.rodata) }
.rela.rodata : { *(.rela.rodata) }
.rel.got : { *(.rel.got) }
.rela.got : { *(.rela.got) }
.rel.ctors : { *(.rel.ctors) }
.rela.ctors : { *(.rela.ctors) }
.rel.dtors : { *(.rel.dtors) }
.rela.dtors : { *(.rela.dtors) }
.rel.bss : { *(.rel.bss) }
.rela.bss : { *(.rela.bss) }
.rel.plt : { *(.rel.plt) }
.rela.plt : { *(.rela.plt) }
.init : { *(.init) }
.plt : { *(.plt) }
.text :
{
/* WARNING - the following is hand-optimized to fit within */
/* the sector layout of our flash chips! XXX FIXME XXX */
cpu/ppc4xx/start.o (.text)
*(.text)
*(.got1)
}
_etext = .;
PROVIDE (etext = .);
.rodata :
{
*(.eh_frame)
*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }
.dtors : { *(.dtors) }
/* Read-write section, merged into data segment: */
. = (. + 0x00FF) & 0xFFFFFF00;
_erotext = .;
PROVIDE (erotext = .);
.reloc :
{
*(.got)
_GOT2_TABLE_ = .;
*(.got2)
_FIXUP_TABLE_ = .;
*(.fixup)
}
__got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
__fixup_entries = (. - _FIXUP_TABLE_)>>2;
.data :
{
*(.data)
*(.data1)
*(.sdata)
*(.sdata2)
*(.dynamic)
CONSTRUCTORS
}
_edata = .;
PROVIDE (edata = .);
. = .;
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
. = .;
__start___ex_table = .;
__ex_table : { *(__ex_table) }
__stop___ex_table = .;
. = ALIGN(256);
__init_begin = .;
.text.init : { *(.text.init) }
.data.init : { *(.data.init) }
. = ALIGN(256);
__init_end = .;
__bss_start = .;
.bss (NOLOAD) :
{
*(.sbss) *(.scommon)
*(.dynbss)
*(.bss)
*(COMMON)
. = ALIGN(4);
}
_end = . ;
PROVIDE (end = .);
}

View File

@@ -209,110 +209,6 @@ int checkboard (void)
return (0);
}
/*************************************************************************
* pci_pre_init
*
* This routine is called just prior to registering the hose and gives
* the board the opportunity to check things. Returning a value of zero
* indicates that things are bad & PCI initialization should be aborted.
*
* Different boards may wish to customize the pci controller structure
* (add regions, override default access routines, etc) or perform
* certain pre-initialization actions.
*
************************************************************************/
#if defined(CONFIG_PCI)
int pci_pre_init(struct pci_controller * hose )
{
unsigned long strap;
/*--------------------------------------------------------------------------+
* The ocotea board is always configured as the host & requires the
* PCI arbiter to be enabled.
*--------------------------------------------------------------------------*/
mfsdr(SDR0_SDSTP1, strap);
if( (strap & SDR0_SDSTP1_PAE_MASK) == 0 ){
printf("PCI: SDR0_STRP1[%08lX] - PCI Arbiter disabled.\n",strap);
return 0;
}
return 1;
}
#endif /* defined(CONFIG_PCI) */
/*************************************************************************
* pci_target_init
*
* The bootstrap configuration provides default settings for the pci
* inbound map (PIM). But the bootstrap config choices are limited and
* may not be sufficient for a given board.
*
************************************************************************/
#if defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_TARGET_INIT)
void pci_target_init(struct pci_controller * hose )
{
/*--------------------------------------------------------------------------+
* Disable everything
*--------------------------------------------------------------------------*/
out32r( PCIL0_PIM0SA, 0 ); /* disable */
out32r( PCIL0_PIM1SA, 0 ); /* disable */
out32r( PCIL0_PIM2SA, 0 ); /* disable */
out32r( PCIL0_EROMBA, 0 ); /* disable expansion rom */
/*--------------------------------------------------------------------------+
* Map all of SDRAM to PCI address 0x0000_0000. Note that the 440 strapping
* options to not support sizes such as 128/256 MB.
*--------------------------------------------------------------------------*/
out32r( PCIL0_PIM0LAL, CONFIG_SYS_SDRAM_BASE );
out32r( PCIL0_PIM0LAH, 0 );
out32r( PCIL0_PIM0SA, ~(gd->ram_size - 1) | 1 );
out32r( PCIL0_BAR0, 0 );
/*--------------------------------------------------------------------------+
* Program the board's subsystem id/vendor id
*--------------------------------------------------------------------------*/
out16r( PCIL0_SBSYSVID, CONFIG_SYS_PCI_SUBSYS_VENDORID );
out16r( PCIL0_SBSYSID, CONFIG_SYS_PCI_SUBSYS_DEVICEID );
out16r( PCIL0_CMD, in16r(PCIL0_CMD) | PCI_COMMAND_MEMORY );
}
#endif /* defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_TARGET_INIT) */
/*************************************************************************
* is_pci_host
*
* This routine is called to determine if a pci scan should be
* performed. With various hardware environments (especially cPCI and
* PPMC) it's insufficient to depend on the state of the arbiter enable
* bit in the strap register, or generic host/adapter assumptions.
*
* Rather than hard-code a bad assumption in the general 440 code, the
* 440 pci code requires the board to decide at runtime.
*
* Return 0 for adapter mode, non-zero for host (monarch) mode.
*
*
************************************************************************/
#if defined(CONFIG_PCI)
int is_pci_host(struct pci_controller *hose)
{
/* The ocotea board is always configured as host. */
return(1);
}
#endif /* defined(CONFIG_PCI) */
#ifdef CONFIG_POST
/*
* Returns 1 if keys pressed to start the power-on long-running tests
* Called from board_init_f().
*/
int post_hotkeys_pressed(void)
{
return (ctrlc());
}
#endif
int board_eth_init(bd_t *bis)
{
cpu_eth_init(bis);

View File

@@ -1,141 +0,0 @@
/*
* (C) Copyright 2004
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
OUTPUT_ARCH(powerpc)
/* Do we need any of these for elf?
__DYNAMIC = 0; */
SECTIONS
{
.resetvec 0xFFFFFFFC :
{
*(.resetvec)
} = 0xffff
.bootpg 0xFFFFF000 :
{
cpu/ppc4xx/start.o (.bootpg)
} = 0xffff
/* Read-only sections, merged into text segment: */
. = + SIZEOF_HEADERS;
.interp : { *(.interp) }
.hash : { *(.hash) }
.dynsym : { *(.dynsym) }
.dynstr : { *(.dynstr) }
.rel.text : { *(.rel.text) }
.rela.text : { *(.rela.text) }
.rel.data : { *(.rel.data) }
.rela.data : { *(.rela.data) }
.rel.rodata : { *(.rel.rodata) }
.rela.rodata : { *(.rela.rodata) }
.rel.got : { *(.rel.got) }
.rela.got : { *(.rela.got) }
.rel.ctors : { *(.rel.ctors) }
.rela.ctors : { *(.rela.ctors) }
.rel.dtors : { *(.rel.dtors) }
.rela.dtors : { *(.rela.dtors) }
.rel.bss : { *(.rel.bss) }
.rela.bss : { *(.rela.bss) }
.rel.plt : { *(.rel.plt) }
.rela.plt : { *(.rela.plt) }
.init : { *(.init) }
.plt : { *(.plt) }
.text :
{
/* WARNING - the following is hand-optimized to fit within */
/* the sector layout of our flash chips! XXX FIXME XXX */
cpu/ppc4xx/start.o (.text)
board/amcc/taishan/init.o (.text)
*(.text)
*(.got1)
}
_etext = .;
PROVIDE (etext = .);
.rodata :
{
*(.eh_frame)
*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }
.dtors : { *(.dtors) }
/* Read-write section, merged into data segment: */
. = (. + 0x00FF) & 0xFFFFFF00;
_erotext = .;
PROVIDE (erotext = .);
.reloc :
{
*(.got)
_GOT2_TABLE_ = .;
*(.got2)
_FIXUP_TABLE_ = .;
*(.fixup)
}
__got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
__fixup_entries = (. - _FIXUP_TABLE_)>>2;
.data :
{
*(.data)
*(.data1)
*(.sdata)
*(.sdata2)
*(.dynamic)
CONSTRUCTORS
}
_edata = .;
PROVIDE (edata = .);
. = .;
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
. = .;
__start___ex_table = .;
__ex_table : { *(__ex_table) }
__stop___ex_table = .;
. = ALIGN(256);
__init_begin = .;
.text.init : { *(.text.init) }
.data.init : { *(.data.init) }
. = ALIGN(256);
__init_end = .;
__bss_start = .;
.bss (NOLOAD) :
{
*(.sbss) *(.scommon)
*(.dynbss)
*(.bss)
*(COMMON)
. = ALIGN(4);
}
_end = . ;
PROVIDE (end = .);
}

View File

@@ -1,135 +0,0 @@
/*
* (C) Copyright 2000
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
OUTPUT_ARCH(powerpc)
/* Do we need any of these for elf?
__DYNAMIC = 0; */
SECTIONS
{
.resetvec 0xFFFFFFFC :
{
*(.resetvec)
} = 0xffff
/* Read-only sections, merged into text segment: */
. = + SIZEOF_HEADERS;
.interp : { *(.interp) }
.hash : { *(.hash) }
.dynsym : { *(.dynsym) }
.dynstr : { *(.dynstr) }
.rel.text : { *(.rel.text) }
.rela.text : { *(.rela.text) }
.rel.data : { *(.rel.data) }
.rela.data : { *(.rela.data) }
.rel.rodata : { *(.rel.rodata) }
.rela.rodata : { *(.rela.rodata) }
.rel.got : { *(.rel.got) }
.rela.got : { *(.rela.got) }
.rel.ctors : { *(.rel.ctors) }
.rela.ctors : { *(.rela.ctors) }
.rel.dtors : { *(.rel.dtors) }
.rela.dtors : { *(.rela.dtors) }
.rel.bss : { *(.rel.bss) }
.rela.bss : { *(.rela.bss) }
.rel.plt : { *(.rel.plt) }
.rela.plt : { *(.rela.plt) }
.init : { *(.init) }
.plt : { *(.plt) }
.text :
{
/* WARNING - the following is hand-optimized to fit within */
/* the sector layout of our flash chips! XXX FIXME XXX */
cpu/ppc4xx/start.o (.text)
*(.text)
*(.got1)
}
_etext = .;
PROVIDE (etext = .);
.rodata :
{
*(.eh_frame)
*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }
.dtors : { *(.dtors) }
/* Read-write section, merged into data segment: */
. = (. + 0x00FF) & 0xFFFFFF00;
_erotext = .;
PROVIDE (erotext = .);
.reloc :
{
*(.got)
_GOT2_TABLE_ = .;
*(.got2)
_FIXUP_TABLE_ = .;
*(.fixup)
}
__got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
__fixup_entries = (. - _FIXUP_TABLE_)>>2;
.data :
{
*(.data)
*(.data1)
*(.sdata)
*(.sdata2)
*(.dynamic)
CONSTRUCTORS
}
_edata = .;
PROVIDE (edata = .);
. = .;
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
. = .;
__start___ex_table = .;
__ex_table : { *(__ex_table) }
__stop___ex_table = .;
. = ALIGN(256);
__init_begin = .;
.text.init : { *(.text.init) }
.data.init : { *(.data.init) }
. = ALIGN(256);
__init_end = .;
__bss_start = .;
.bss (NOLOAD) :
{
*(.sbss) *(.scommon)
*(.dynbss)
*(.bss)
*(COMMON)
. = ALIGN(4);
}
_end = . ;
PROVIDE (end = .);
}

View File

@@ -1,141 +0,0 @@
/*
* (C) Copyright 2002
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
OUTPUT_ARCH(powerpc)
/* Do we need any of these for elf?
__DYNAMIC = 0; */
SECTIONS
{
.resetvec 0xFFFFFFFC :
{
*(.resetvec)
} = 0xffff
.bootpg 0xFFFFF000 :
{
cpu/ppc4xx/start.o (.bootpg)
} = 0xffff
/* Read-only sections, merged into text segment: */
. = + SIZEOF_HEADERS;
.interp : { *(.interp) }
.hash : { *(.hash) }
.dynsym : { *(.dynsym) }
.dynstr : { *(.dynstr) }
.rel.text : { *(.rel.text) }
.rela.text : { *(.rela.text) }
.rel.data : { *(.rel.data) }
.rela.data : { *(.rela.data) }
.rel.rodata : { *(.rel.rodata) }
.rela.rodata : { *(.rela.rodata) }
.rel.got : { *(.rel.got) }
.rela.got : { *(.rela.got) }
.rel.ctors : { *(.rel.ctors) }
.rela.ctors : { *(.rela.ctors) }
.rel.dtors : { *(.rel.dtors) }
.rela.dtors : { *(.rela.dtors) }
.rel.bss : { *(.rel.bss) }
.rela.bss : { *(.rela.bss) }
.rel.plt : { *(.rel.plt) }
.rela.plt : { *(.rela.plt) }
.init : { *(.init) }
.plt : { *(.plt) }
.text :
{
/* WARNING - the following is hand-optimized to fit within */
/* the sector layout of our flash chips! XXX FIXME XXX */
cpu/ppc4xx/start.o (.text)
board/amcc/yosemite/init.o (.text)
*(.text)
*(.got1)
}
_etext = .;
PROVIDE (etext = .);
.rodata :
{
*(.eh_frame)
*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }
.dtors : { *(.dtors) }
/* Read-write section, merged into data segment: */
. = (. + 0x00FF) & 0xFFFFFF00;
_erotext = .;
PROVIDE (erotext = .);
.reloc :
{
*(.got)
_GOT2_TABLE_ = .;
*(.got2)
_FIXUP_TABLE_ = .;
*(.fixup)
}
__got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
__fixup_entries = (. - _FIXUP_TABLE_)>>2;
.data :
{
*(.data)
*(.data1)
*(.sdata)
*(.sdata2)
*(.dynamic)
CONSTRUCTORS
}
_edata = .;
PROVIDE (edata = .);
. = .;
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
. = .;
__start___ex_table = .;
__ex_table : { *(__ex_table) }
__stop___ex_table = .;
. = ALIGN(256);
__init_begin = .;
.text.init : { *(.text.init) }
.data.init : { *(.data.init) }
. = ALIGN(256);
__init_end = .;
__bss_start = .;
.bss (NOLOAD) :
{
*(.sbss) *(.scommon)
*(.dynbss)
*(.bss)
*(COMMON)
. = ALIGN(4);
}
_end = . ;
PROVIDE (end = .);
}

View File

@@ -352,166 +352,6 @@ phys_size_t initdram(int board)
return CONFIG_SYS_SDRAM_BANKS * (CONFIG_SYS_KBYTES_SDRAM * 1024); /* return bytes */
}
/*************************************************************************
* pci_pre_init
*
* This routine is called just prior to registering the hose and gives
* the board the opportunity to check things. Returning a value of zero
* indicates that things are bad & PCI initialization should be aborted.
*
* Different boards may wish to customize the pci controller structure
* (add regions, override default access routines, etc) or perform
* certain pre-initialization actions.
*
************************************************************************/
#if defined(CONFIG_PCI)
int pci_pre_init(struct pci_controller *hose)
{
unsigned long addr;
/*-------------------------------------------------------------------------+
| Set priority for all PLB3 devices to 0.
| Set PLB3 arbiter to fair mode.
+-------------------------------------------------------------------------*/
mfsdr(SD0_AMP1, addr);
mtsdr(SD0_AMP1, (addr & 0x000000FF) | 0x0000FF00);
addr = mfdcr(PLB3_ACR);
mtdcr(PLB3_ACR, addr | 0x80000000);
/*-------------------------------------------------------------------------+
| Set priority for all PLB4 devices to 0.
+-------------------------------------------------------------------------*/
mfsdr(SD0_AMP0, addr);
mtsdr(SD0_AMP0, (addr & 0x000000FF) | 0x0000FF00);
addr = mfdcr(PLB4_ACR) | 0xa0000000; /* Was 0x8---- */
mtdcr(PLB4_ACR, addr);
/*-------------------------------------------------------------------------+
| Set Nebula PLB4 arbiter to fair mode.
+-------------------------------------------------------------------------*/
/* Segment0 */
addr = (mfdcr(PLB0_ACR) & ~PLB0_ACR_PPM_MASK) | PLB0_ACR_PPM_FAIR;
addr = (addr & ~PLB0_ACR_HBU_MASK) | PLB0_ACR_HBU_ENABLED;
addr = (addr & ~PLB0_ACR_RDP_MASK) | PLB0_ACR_RDP_4DEEP;
addr = (addr & ~PLB0_ACR_WRP_MASK) | PLB0_ACR_WRP_2DEEP;
mtdcr(PLB0_ACR, addr);
/* Segment1 */
addr = (mfdcr(PLB1_ACR) & ~PLB1_ACR_PPM_MASK) | PLB1_ACR_PPM_FAIR;
addr = (addr & ~PLB1_ACR_HBU_MASK) | PLB1_ACR_HBU_ENABLED;
addr = (addr & ~PLB1_ACR_RDP_MASK) | PLB1_ACR_RDP_4DEEP;
addr = (addr & ~PLB1_ACR_WRP_MASK) | PLB1_ACR_WRP_2DEEP;
mtdcr(PLB1_ACR, addr);
return 1;
}
#endif /* defined(CONFIG_PCI) */
/*************************************************************************
* pci_target_init
*
* The bootstrap configuration provides default settings for the pci
* inbound map (PIM). But the bootstrap config choices are limited and
* may not be sufficient for a given board.
*
************************************************************************/
#if defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_TARGET_INIT)
void pci_target_init(struct pci_controller *hose)
{
/*--------------------------------------------------------------------------+
* Set up Direct MMIO registers
*--------------------------------------------------------------------------*/
/*--------------------------------------------------------------------------+
| PowerPC440 EP PCI Master configuration.
| Map one 1Gig range of PLB/processor addresses to PCI memory space.
| PLB address 0xA0000000-0xDFFFFFFF ==> PCI address 0xA0000000-0xDFFFFFFF
| Use byte reversed out routines to handle endianess.
| Make this region non-prefetchable.
+--------------------------------------------------------------------------*/
out32r(PCIL0_PMM0MA, 0x00000000); /* PMM0 Mask/Attribute - disabled b4 setting */
out32r(PCIL0_PMM0LA, CONFIG_SYS_PCI_MEMBASE); /* PMM0 Local Address */
out32r(PCIL0_PMM0PCILA, CONFIG_SYS_PCI_MEMBASE); /* PMM0 PCI Low Address */
out32r(PCIL0_PMM0PCIHA, 0x00000000); /* PMM0 PCI High Address */
out32r(PCIL0_PMM0MA, 0xE0000001); /* 512M + No prefetching, and enable region */
out32r(PCIL0_PMM1MA, 0x00000000); /* PMM0 Mask/Attribute - disabled b4 setting */
out32r(PCIL0_PMM1LA, CONFIG_SYS_PCI_MEMBASE2); /* PMM0 Local Address */
out32r(PCIL0_PMM1PCILA, CONFIG_SYS_PCI_MEMBASE2); /* PMM0 PCI Low Address */
out32r(PCIL0_PMM1PCIHA, 0x00000000); /* PMM0 PCI High Address */
out32r(PCIL0_PMM1MA, 0xE0000001); /* 512M + No prefetching, and enable region */
out32r(PCIL0_PTM1MS, 0x00000001); /* Memory Size/Attribute */
out32r(PCIL0_PTM1LA, 0); /* Local Addr. Reg */
out32r(PCIL0_PTM2MS, 0); /* Memory Size/Attribute */
out32r(PCIL0_PTM2LA, 0); /* Local Addr. Reg */
/*--------------------------------------------------------------------------+
* Set up Configuration registers
*--------------------------------------------------------------------------*/
/* Program the board's subsystem id/vendor id */
pci_write_config_word(0, PCI_SUBSYSTEM_VENDOR_ID,
CONFIG_SYS_PCI_SUBSYS_VENDORID);
pci_write_config_word(0, PCI_SUBSYSTEM_ID, CONFIG_SYS_PCI_SUBSYS_ID);
/* Configure command register as bus master */
pci_write_config_word(0, PCI_COMMAND, PCI_COMMAND_MASTER);
/* 240nS PCI clock */
pci_write_config_word(0, PCI_LATENCY_TIMER, 1);
/* No error reporting */
pci_write_config_word(0, PCI_ERREN, 0);
pci_write_config_dword(0, PCI_BRDGOPT2, 0x00000101);
}
#endif /* defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_TARGET_INIT) */
/*************************************************************************
* pci_master_init
*
************************************************************************/
#if defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_MASTER_INIT)
void pci_master_init(struct pci_controller *hose)
{
unsigned short temp_short;
/*--------------------------------------------------------------------------+
| Write the PowerPC440 EP PCI Configuration regs.
| Enable PowerPC440 EP to be a master on the PCI bus (PMM).
| Enable PowerPC440 EP to act as a PCI memory target (PTM).
+--------------------------------------------------------------------------*/
pci_read_config_word(0, PCI_COMMAND, &temp_short);
pci_write_config_word(0, PCI_COMMAND,
temp_short | PCI_COMMAND_MASTER |
PCI_COMMAND_MEMORY);
}
#endif /* defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_MASTER_INIT) */
/*************************************************************************
* is_pci_host
*
* This routine is called to determine if a pci scan should be
* performed. With various hardware environments (especially cPCI and
* PPMC) it's insufficient to depend on the state of the arbiter enable
* bit in the strap register, or generic host/adapter assumptions.
*
* Rather than hard-code a bad assumption in the general 440 code, the
* 440 pci code requires the board to decide at runtime.
*
* Return 0 for adapter mode, non-zero for host (monarch) mode.
*
*
************************************************************************/
#if defined(CONFIG_PCI)
int is_pci_host(struct pci_controller *hose)
{
/* Bamboo is always configured as host. */
return (1);
}
#endif /* defined(CONFIG_PCI) */
/*************************************************************************
* hw_watchdog_reset
*

View File

@@ -1,141 +0,0 @@
/*
* (C) Copyright 2004
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
OUTPUT_ARCH(powerpc)
/* Do we need any of these for elf?
__DYNAMIC = 0; */
SECTIONS
{
.resetvec 0xFFFFFFFC :
{
*(.resetvec)
} = 0xffff
.bootpg 0xFFFFF000 :
{
cpu/ppc4xx/start.o (.bootpg)
} = 0xffff
/* Read-only sections, merged into text segment: */
. = + SIZEOF_HEADERS;
.interp : { *(.interp) }
.hash : { *(.hash) }
.dynsym : { *(.dynsym) }
.dynstr : { *(.dynstr) }
.rel.text : { *(.rel.text) }
.rela.text : { *(.rela.text) }
.rel.data : { *(.rel.data) }
.rela.data : { *(.rela.data) }
.rel.rodata : { *(.rel.rodata) }
.rela.rodata : { *(.rela.rodata) }
.rel.got : { *(.rel.got) }
.rela.got : { *(.rela.got) }
.rel.ctors : { *(.rel.ctors) }
.rela.ctors : { *(.rela.ctors) }
.rel.dtors : { *(.rel.dtors) }
.rela.dtors : { *(.rela.dtors) }
.rel.bss : { *(.rel.bss) }
.rela.bss : { *(.rela.bss) }
.rel.plt : { *(.rel.plt) }
.rela.plt : { *(.rela.plt) }
.init : { *(.init) }
.plt : { *(.plt) }
.text :
{
/* WARNING - the following is hand-optimized to fit within */
/* the sector layout of our flash chips! XXX FIXME XXX */
cpu/ppc4xx/start.o (.text)
board/amcc/yucca/init.o (.text)
*(.text)
*(.got1)
}
_etext = .;
PROVIDE (etext = .);
.rodata :
{
*(.eh_frame)
*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }
.dtors : { *(.dtors) }
/* Read-write section, merged into data segment: */
. = (. + 0x00FF) & 0xFFFFFF00;
_erotext = .;
PROVIDE (erotext = .);
.reloc :
{
*(.got)
_GOT2_TABLE_ = .;
*(.got2)
_FIXUP_TABLE_ = .;
*(.fixup)
}
__got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
__fixup_entries = (. - _FIXUP_TABLE_)>>2;
.data :
{
*(.data)
*(.data1)
*(.sdata)
*(.sdata2)
*(.dynamic)
CONSTRUCTORS
}
_edata = .;
PROVIDE (edata = .);
. = .;
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
. = .;
__start___ex_table = .;
__ex_table : { *(__ex_table) }
__stop___ex_table = .;
. = ALIGN(256);
__init_begin = .;
.text.init : { *(.text.init) }
.data.init : { *(.data.init) }
. = ALIGN(256);
__init_end = .;
__bss_start = .;
.bss (NOLOAD) :
{
*(.sbss) *(.scommon)
*(.dynbss)
*(.bss)
*(COMMON)
. = ALIGN(4);
}
_end = . ;
PROVIDE (end = .);
}

View File

@@ -588,98 +588,8 @@ u32 ddr_clktr(u32 default_val) {
return default_val;
}
/*************************************************************************
* pci_pre_init
*
* This routine is called just prior to registering the hose and gives
* the board the opportunity to check things. Returning a value of zero
* indicates that things are bad & PCI initialization should be aborted.
*
* Different boards may wish to customize the pci controller structure
* (add regions, override default access routines, etc) or perform
* certain pre-initialization actions.
*
************************************************************************/
#if defined(CONFIG_PCI)
int pci_pre_init(struct pci_controller * hose )
{
unsigned long strap;
/*-------------------------------------------------------------------+
* The yucca board is always configured as the host & requires the
* PCI arbiter to be enabled.
*-------------------------------------------------------------------*/
mfsdr(SDR0_SDSTP1, strap);
if( (strap & SDR0_SDSTP1_PAE_MASK) == 0 ) {
printf("PCI: SDR0_STRP1[%08lX] - PCI Arbiter disabled.\n",strap);
return 0;
}
return 1;
}
#endif /* defined(CONFIG_PCI) */
/*************************************************************************
* pci_target_init
*
* The bootstrap configuration provides default settings for the pci
* inbound map (PIM). But the bootstrap config choices are limited and
* may not be sufficient for a given board.
*
************************************************************************/
#if defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_TARGET_INIT)
void pci_target_init(struct pci_controller * hose )
{
/*-------------------------------------------------------------------+
* Disable everything
*-------------------------------------------------------------------*/
out32r( PCIL0_PIM0SA, 0 ); /* disable */
out32r( PCIL0_PIM1SA, 0 ); /* disable */
out32r( PCIL0_PIM2SA, 0 ); /* disable */
out32r( PCIL0_EROMBA, 0 ); /* disable expansion rom */
/*-------------------------------------------------------------------+
* Map all of SDRAM to PCI address 0x0000_0000. Note that the 440
* strapping options to not support sizes such as 128/256 MB.
*-------------------------------------------------------------------*/
out32r( PCIL0_PIM0LAL, CONFIG_SYS_SDRAM_BASE );
out32r( PCIL0_PIM0LAH, 0 );
out32r( PCIL0_PIM0SA, ~(gd->ram_size - 1) | 1 );
out32r( PCIL0_BAR0, 0 );
/*-------------------------------------------------------------------+
* Program the board's subsystem id/vendor id
*-------------------------------------------------------------------*/
out16r( PCIL0_SBSYSVID, CONFIG_SYS_PCI_SUBSYS_VENDORID );
out16r( PCIL0_SBSYSID, CONFIG_SYS_PCI_SUBSYS_DEVICEID );
out16r( PCIL0_CMD, in16r(PCIL0_CMD) | PCI_COMMAND_MEMORY );
}
#endif /* defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_TARGET_INIT) */
#if defined(CONFIG_PCI)
/*************************************************************************
* is_pci_host
*
* This routine is called to determine if a pci scan should be
* performed. With various hardware environments (especially cPCI and
* PPMC) it's insufficient to depend on the state of the arbiter enable
* bit in the strap register, or generic host/adapter assumptions.
*
* Rather than hard-code a bad assumption in the general 440 code, the
* 440 pci code requires the board to decide at runtime.
*
* Return 0 for adapter mode, non-zero for host (monarch) mode.
*
*
************************************************************************/
int is_pci_host(struct pci_controller *hose)
{
/* The yucca board is always configured as host. */
return 1;
}
static int yucca_pcie_card_present(int port)
int board_pcie_card_present(int port)
{
u16 reg;
@@ -696,186 +606,55 @@ static int yucca_pcie_card_present(int port)
}
}
/*
* For the given slot, set rootpoint mode, send power to the slot,
* turn on the green LED and turn off the yellow LED, enable the clock
* and turn off reset.
*/
void yucca_setup_pcie_fpga_rootpoint(int port)
{
u16 power, clock, green_led, yellow_led, reset_off, rootpoint, endpoint;
switch(port) {
case 0:
rootpoint = FPGA_REG1C_PE0_ROOTPOINT;
endpoint = 0;
power = FPGA_REG1A_PE0_PWRON;
green_led = FPGA_REG1A_PE0_GLED;
clock = FPGA_REG1A_PE0_REFCLK_ENABLE;
yellow_led = FPGA_REG1A_PE0_YLED;
reset_off = FPGA_REG1C_PE0_PERST;
break;
case 1:
rootpoint = 0;
endpoint = FPGA_REG1C_PE1_ENDPOINT;
power = FPGA_REG1A_PE1_PWRON;
green_led = FPGA_REG1A_PE1_GLED;
clock = FPGA_REG1A_PE1_REFCLK_ENABLE;
yellow_led = FPGA_REG1A_PE1_YLED;
reset_off = FPGA_REG1C_PE1_PERST;
break;
case 2:
rootpoint = 0;
endpoint = FPGA_REG1C_PE2_ENDPOINT;
power = FPGA_REG1A_PE2_PWRON;
green_led = FPGA_REG1A_PE2_GLED;
clock = FPGA_REG1A_PE2_REFCLK_ENABLE;
yellow_led = FPGA_REG1A_PE2_YLED;
reset_off = FPGA_REG1C_PE2_PERST;
break;
default:
return;
}
out_be16((u16 *)FPGA_REG1A,
~(power | clock | green_led) &
(yellow_led | in_be16((u16 *)FPGA_REG1A)));
out_be16((u16 *)FPGA_REG1C,
~(endpoint | reset_off) &
(rootpoint | in_be16((u16 *)FPGA_REG1C)));
/*
* Leave device in reset for a while after powering on the
* slot to give it a chance to initialize.
*/
udelay(250 * 1000);
out_be16((u16 *)FPGA_REG1C, reset_off | in_be16((u16 *)FPGA_REG1C));
}
/*
* For the given slot, set endpoint mode, send power to the slot,
* turn on the green LED and turn off the yellow LED, enable the clock
* .In end point mode reset bit is read only.
* turn on the green LED and turn off the yellow LED, enable the
* clock. In endpoint mode reset bit is read only.
*/
void yucca_setup_pcie_fpga_endpoint(int port)
void board_pcie_setup_port(int port, int rootpoint)
{
u16 power, clock, green_led, yellow_led, reset_off, rootpoint, endpoint;
u16 power, clock, green_led, yellow_led,
reset_off, rp, ep;
switch(port) {
switch (port) {
case 0:
rootpoint = FPGA_REG1C_PE0_ROOTPOINT;
endpoint = 0;
power = FPGA_REG1A_PE0_PWRON;
green_led = FPGA_REG1A_PE0_GLED;
clock = FPGA_REG1A_PE0_REFCLK_ENABLE;
yellow_led = FPGA_REG1A_PE0_YLED;
reset_off = FPGA_REG1C_PE0_PERST;
rp = FPGA_REG1C_PE0_ROOTPOINT;
ep = 0;
break;
case 1:
rootpoint = 0;
endpoint = FPGA_REG1C_PE1_ENDPOINT;
power = FPGA_REG1A_PE1_PWRON;
green_led = FPGA_REG1A_PE1_GLED;
clock = FPGA_REG1A_PE1_REFCLK_ENABLE;
yellow_led = FPGA_REG1A_PE1_YLED;
reset_off = FPGA_REG1C_PE1_PERST;
rp = 0;
ep = FPGA_REG1C_PE1_ENDPOINT;
break;
case 2:
rootpoint = 0;
endpoint = FPGA_REG1C_PE2_ENDPOINT;
power = FPGA_REG1A_PE2_PWRON;
green_led = FPGA_REG1A_PE2_GLED;
clock = FPGA_REG1A_PE2_REFCLK_ENABLE;
yellow_led = FPGA_REG1A_PE2_YLED;
reset_off = FPGA_REG1C_PE2_PERST;
rp = 0;
ep = FPGA_REG1C_PE2_ENDPOINT;
break;
default:
return;
}
out_be16((u16 *)FPGA_REG1A,
~(power | clock | green_led) &
power = FPGA_REG1A_PWRON_ENCODE(port);
green_led = FPGA_REG1A_GLED_ENCODE(port);
clock = FPGA_REG1A_REFCLK_ENCODE(port);
yellow_led = FPGA_REG1A_YLED_ENCODE(port);
reset_off = FPGA_REG1C_PERST_ENCODE(port);
out_be16((u16 *)FPGA_REG1A, ~(power | clock | green_led) &
(yellow_led | in_be16((u16 *)FPGA_REG1A)));
out_be16((u16 *)FPGA_REG1C,
~(rootpoint | reset_off) &
(endpoint | in_be16((u16 *)FPGA_REG1C)));
}
out_be16((u16 *)FPGA_REG1C, ~(ep | reset_off) &
(rp | in_be16((u16 *)FPGA_REG1C)));
static struct pci_controller pcie_hose[3] = {{0},{0},{0}};
if (rootpoint) {
/*
* Leave device in reset for a while after powering on the
* slot to give it a chance to initialize.
*/
udelay(250 * 1000);
void pcie_setup_hoses(int busno)
{
struct pci_controller *hose;
int i, bus;
int ret = 0;
char *env;
unsigned int delay;
/*
* assume we're called after the PCIX hose is initialized, which takes
* bus ID 0 and therefore start numbering PCIe's from 1.
*/
bus = busno;
for (i = 0; i <= 2; i++) {
/* Check for yucca card presence */
if (!yucca_pcie_card_present(i))
continue;
if (is_end_point(i)) {
yucca_setup_pcie_fpga_endpoint(i);
ret = ppc4xx_init_pcie_endport(i);
} else {
yucca_setup_pcie_fpga_rootpoint(i);
ret = ppc4xx_init_pcie_rootport(i);
}
if (ret == -ENODEV)
continue;
if (ret) {
printf("PCIE%d: initialization as %s failed\n", i,
is_end_point(i) ? "endpoint" : "root-complex");
continue;
}
hose = &pcie_hose[i];
hose->first_busno = bus;
hose->last_busno = bus;
hose->current_busno = bus;
/* setup mem resource */
pci_set_region(hose->regions + 0,
CONFIG_SYS_PCIE_MEMBASE + i * CONFIG_SYS_PCIE_MEMSIZE,
CONFIG_SYS_PCIE_MEMBASE + i * CONFIG_SYS_PCIE_MEMSIZE,
CONFIG_SYS_PCIE_MEMSIZE,
PCI_REGION_MEM);
hose->region_count = 1;
pci_register_hose(hose);
if (is_end_point(i)) {
ppc4xx_setup_pcie_endpoint(hose, i);
/*
* Reson for no scanning is endpoint can not generate
* upstream configuration accesses.
*/
} else {
ppc4xx_setup_pcie_rootpoint(hose, i);
env = getenv("pciscandelay");
if (env != NULL) {
delay = simple_strtoul(env, NULL, 10);
if (delay > 5)
printf("Warning, expect noticable delay before "
"PCIe scan due to 'pciscandelay' value!\n");
mdelay(delay * 1000);
}
/*
* Config access can only go down stream
*/
hose->last_busno = pci_hose_scan(hose);
bus = hose->last_busno + 1;
}
out_be16((u16 *)FPGA_REG1C,
reset_off | in_be16((u16 *)FPGA_REG1C));
}
}
#endif /* defined(CONFIG_PCI) */
@@ -929,17 +708,6 @@ void fpga_init(void)
return;
}
#ifdef CONFIG_POST
/*
* Returns 1 if keys pressed to start the power-on long-running tests
* Called from board_init_f().
*/
int post_hotkeys_pressed(void)
{
return (ctrlc());
}
#endif
/*---------------------------------------------------------------------------+
| onboard_pci_arbiter_selected => from EPLD
+---------------------------------------------------------------------------*/

View File

@@ -25,3 +25,6 @@
# like it's not in RAM. This is a bit of voodoo to allow it to be
# run from RAM instead of Flash.
TEXT_BASE = 0x08000000
# Use board specific linker script
LDSCRIPT := $(SRCTREE)/board/amirix/ap1000/u-boot.lds

View File

@@ -24,6 +24,7 @@
* MA 02111-1307 USA
*/
#include <common.h>
#include <netdev.h>
#include <asm/arch/omap2420.h>
#include <asm/io.h>
#include <asm/arch/bits.h>
@@ -94,7 +95,6 @@ void s_init(void)
********************************************************/
int misc_init_r(void)
{
ether_init(); /* better done here so timers are init'ed */
return (0);
}
@@ -138,13 +138,14 @@ void wait_for_command_complete(unsigned int wd_base)
}
/*******************************************************************
* Routine:ether_init
* Routine:board_eth_init
* Description: take the Ethernet controller out of reset and wait
* for the EEPROM load to complete.
******************************************************************/
void ether_init(void)
int board_eth_init(bd_t *bis)
{
#ifdef CONFIG_DRIVER_LAN91C96
int rc = 0;
#ifdef CONFIG_LAN91C96
int cnt = 20;
__raw_writeb(0x03, OMAP2420_CTRL_BASE + 0x0f2); /*protect->gpio74 */
@@ -171,10 +172,10 @@ void ether_init(void)
mask_config_reg(ETH_CONTROL_REG, 0x01);
udelay(1000);
rc = lan91c96_initialize(0, CONFIG_LAN91C96_BASE);
eth_reset_err_out:
return;
#endif
return rc;
}
/**********************************************

View File

@@ -124,7 +124,7 @@ void set_timer (ulong ticks)
}
/* delay usec useconds */
void udelay (unsigned long usec)
void __udelay (unsigned long usec)
{
ulong tmo, tmp;

View File

@@ -25,6 +25,7 @@
*/
#include <common.h>
#include <netdev.h>
#include <SA-1100.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -117,3 +118,14 @@ dram_init(void)
return (0);
}
#ifdef CONFIG_CMD_NET
int board_eth_init(bd_t *bis)
{
int rc = 0;
#ifdef CONFIG_LAN91C96
rc = lan91c96_initialize(0, CONFIG_LAN91C96_BASE);
#endif
return rc;
}
#endif

View File

@@ -282,7 +282,7 @@ void lcd_show_board_info(void)
lcd_printf ("(C) 2008 ATMEL Corp\n");
lcd_printf ("at91support@atmel.com\n");
lcd_printf ("%s CPU at %s MHz\n",
AT91_CPU_NAME,
CONFIG_SYS_AT91_CPU_NAME,
strmhz(temp, get_cpu_clk_rate()));
dram_size = 0;

View File

@@ -23,9 +23,15 @@
*/
#include <common.h>
#include <exports.h>
#include <netdev.h>
#include <asm/arch/AT91RM9200.h>
#include <asm/io.h>
#if defined(CONFIG_DRIVER_ETHER)
#include <at91rm9200_net.h>
#include <dm9161.h>
#endif
DECLARE_GLOBAL_DATA_PTR;
@@ -95,6 +101,15 @@ void at91rm9200_GetPhyInterface(AT91PS_PhyOps p_phyops)
#endif
#endif /* CONFIG_DRIVER_ETHER */
#ifdef CONFIG_DRIVER_AT91EMAC
int board_eth_init(bd_t *bis)
{
int rc = 0;
rc = at91emac_register(bis, 0);
return rc;
}
#endif
/*
* Disk On Chip (NAND) Millenium initialization.
* The NAND lives in the CS2* space

View File

@@ -23,9 +23,14 @@
*/
#include <common.h>
#include <exports.h>
#include <netdev.h>
#include <asm/arch/AT91RM9200.h>
#include <asm/io.h>
#if defined(CONFIG_DRIVER_ETHER)
#include <at91rm9200_net.h>
#include <dm9161.h>
#endif
DECLARE_GLOBAL_DATA_PTR;
@@ -84,3 +89,12 @@ void at91rm9200_GetPhyInterface(AT91PS_PhyOps p_phyops)
p_phyops->AutoNegotiate = dm9161_AutoNegotiate;
}
#endif
#ifdef CONFIG_DRIVER_AT91EMAC
int board_eth_init(bd_t *bis)
{
int rc = 0;
rc = at91emac_register(bis, 0);
return rc;
}
#endif

View File

@@ -217,7 +217,7 @@ void lcd_show_board_info(void)
lcd_printf ("(C) 2008 ATMEL Corp\n");
lcd_printf ("at91support@atmel.com\n");
lcd_printf ("%s CPU at %s MHz\n",
AT91_CPU_NAME,
CONFIG_SYS_AT91_CPU_NAME,
strmhz(temp, get_cpu_clk_rate()));
dram_size = 0;

View File

@@ -25,13 +25,13 @@
#include <common.h>
#include <asm/sizes.h>
#include <asm/arch/at91sam9263.h>
#include <asm/arch/at91sam9263_matrix.h>
#include <asm/arch/at91sam9_smc.h>
#include <asm/arch/at91_common.h>
#include <asm/arch/at91_pmc.h>
#include <asm/arch/at91_rstc.h>
#include <asm/arch/at91_matrix.h>
#include <asm/arch/at91_pio.h>
#include <asm/arch/clk.h>
#include <asm/arch/gpio.h>
#include <asm/arch/io.h>
#include <asm/arch/hardware.h>
#include <lcd.h>
@@ -52,49 +52,57 @@ DECLARE_GLOBAL_DATA_PTR;
static void at91sam9263ek_nand_hw_init(void)
{
unsigned long csa;
at91_smc_t *smc = (at91_smc_t *) AT91_SMC0_BASE;
at91_matrix_t *matrix = (at91_matrix_t *) AT91_MATRIX_BASE;
at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE;
/* Enable CS3 */
csa = readl(&matrix->csa[0]) | AT91_MATRIX_CSA_EBI_CS3A;
writel(csa, &matrix->csa[0]);
/* Enable CS3 */
csa = at91_sys_read(AT91_MATRIX_EBI0CSA);
at91_sys_write(AT91_MATRIX_EBI0CSA,
csa | AT91_MATRIX_EBI0_CS3A_SMC_SMARTMEDIA);
/* Configure SMC CS3 for NAND/SmartMedia */
at91_sys_write(AT91_SMC_SETUP(3),
AT91_SMC_NWESETUP_(1) | AT91_SMC_NCS_WRSETUP_(0) |
AT91_SMC_NRDSETUP_(1) | AT91_SMC_NCS_RDSETUP_(0));
at91_sys_write(AT91_SMC_PULSE(3),
AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(3) |
AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(3));
at91_sys_write(AT91_SMC_CYCLE(3),
AT91_SMC_NWECYCLE_(5) | AT91_SMC_NRDCYCLE_(5));
at91_sys_write(AT91_SMC_MODE(3),
AT91_SMC_READMODE | AT91_SMC_WRITEMODE |
AT91_SMC_EXNWMODE_DISABLE |
#ifdef CONFIG_SYS_NAND_DBW_16
AT91_SMC_DBW_16 |
#else /* CONFIG_SYS_NAND_DBW_8 */
AT91_SMC_DBW_8 |
#endif
AT91_SMC_TDF_(2));
writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(0) |
AT91_SMC_SETUP_NRD(1) | AT91_SMC_SETUP_NCS_RD(0),
&smc->cs[3].setup);
at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_PIOA |
1 << AT91SAM9263_ID_PIOCDE);
writel(AT91_SMC_PULSE_NWE(3) | AT91_SMC_PULSE_NCS_WR(3) |
AT91_SMC_PULSE_NRD(3) | AT91_SMC_PULSE_NCS_RD(3),
&smc->cs[3].pulse);
writel(AT91_SMC_CYCLE_NWE(5) | AT91_SMC_CYCLE_NRD(5),
&smc->cs[3].cycle);
writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
AT91_SMC_MODE_EXNW_DISABLE |
#ifdef CONFIG_SYS_NAND_DBW_16
AT91_SMC_MODE_DBW_16 |
#else /* CONFIG_SYS_NAND_DBW_8 */
AT91_SMC_MODE_DBW_8 |
#endif
AT91_SMC_MODE_TDF_CYCLE(2),
&smc->cs[3].mode);
writel(1 << AT91SAM9263_ID_PIOA | 1 << AT91SAM9263_ID_PIOCDE,
&pmc->pcer);
/* Configure RDY/BSY */
at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1);
at91_set_pio_input(CONFIG_SYS_NAND_READY_PIN, 1);
/* Enable NandFlash */
at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
at91_set_pio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
}
#endif
#ifdef CONFIG_MACB
static void at91sam9263ek_macb_hw_init(void)
{
unsigned long rstc;
unsigned long erstl;
at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE;
at91_pio_t *pio = (at91_pio_t *) AT91_PIO_BASE;
at91_rstc_t *rstc = (at91_rstc_t *) AT91_RSTC_BASE;
/* Enable clock */
at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_EMAC);
writel(1 << AT91SAM9263_ID_EMAC, &pmc->pcer);
/*
* Disable pull-up on:
@@ -104,35 +112,27 @@ static void at91sam9263ek_macb_hw_init(void)
*
* PHY has internal pull-down
*/
writel(pin_to_mask(AT91_PIN_PC25),
pin_to_controller(AT91_PIN_PC0) + PIO_PUDR);
writel(pin_to_mask(AT91_PIN_PE25) |
pin_to_mask(AT91_PIN_PE26),
pin_to_controller(AT91_PIN_PE0) + PIO_PUDR);
rstc = at91_sys_read(AT91_RSTC_MR) & AT91_RSTC_ERSTL;
writel(1 << 25, &pio->pioc.pudr);
writel((1 << 25) | (1 <<26), &pio->pioe.pudr);
erstl = readl(&rstc->mr) & AT91_RSTC_MR_ERSTL_MASK;
/* Need to reset PHY -> 500ms reset */
at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY |
(AT91_RSTC_ERSTL & (0x0D << 8)) |
AT91_RSTC_URSTEN);
at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_EXTRST);
writel(AT91_RSTC_KEY | AT91_RSTC_MR_ERSTL(0x0D) |
AT91_RSTC_MR_URSTEN, &rstc->mr);
writel(AT91_RSTC_KEY | AT91_RSTC_CR_EXTRST, &rstc->cr);
/* Wait for end hardware reset */
while (!(at91_sys_read(AT91_RSTC_SR) & AT91_RSTC_NRSTL));
while (!(readl(&rstc->sr) & AT91_RSTC_SR_NRSTL))
;
/* Restore NRST value */
at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY |
(rstc) |
AT91_RSTC_URSTEN);
writel(AT91_RSTC_KEY | erstl | AT91_RSTC_MR_URSTEN, &rstc->mr);
/* Re-enable pull-up */
writel(pin_to_mask(AT91_PIN_PC25),
pin_to_controller(AT91_PIN_PC0) + PIO_PUER);
writel(pin_to_mask(AT91_PIN_PE25) |
pin_to_mask(AT91_PIN_PE26),
pin_to_controller(AT91_PIN_PE0) + PIO_PUER);
writel(1 << 25, &pio->pioc.puer);
writel((1 << 25) | (1 <<26), &pio->pioe.puer);
at91_macb_hw_init();
}
@@ -158,41 +158,42 @@ vidinfo_t panel_info = {
void lcd_enable(void)
{
at91_set_gpio_value(AT91_PIN_PA30, 1); /* power up */
at91_set_pio_value(AT91_PIO_PORTA, 30, 1); /* power up */
}
void lcd_disable(void)
{
at91_set_gpio_value(AT91_PIN_PA30, 0); /* power down */
at91_set_pio_value(AT91_PIO_PORTA, 30, 0); /* power down */
}
static void at91sam9263ek_lcd_hw_init(void)
{
at91_set_A_periph(AT91_PIN_PC1, 0); /* LCDHSYNC */
at91_set_A_periph(AT91_PIN_PC2, 0); /* LCDDOTCK */
at91_set_A_periph(AT91_PIN_PC3, 0); /* LCDDEN */
at91_set_B_periph(AT91_PIN_PB9, 0); /* LCDCC */
at91_set_A_periph(AT91_PIN_PC6, 0); /* LCDD2 */
at91_set_A_periph(AT91_PIN_PC7, 0); /* LCDD3 */
at91_set_A_periph(AT91_PIN_PC8, 0); /* LCDD4 */
at91_set_A_periph(AT91_PIN_PC9, 0); /* LCDD5 */
at91_set_A_periph(AT91_PIN_PC10, 0); /* LCDD6 */
at91_set_A_periph(AT91_PIN_PC11, 0); /* LCDD7 */
at91_set_A_periph(AT91_PIN_PC14, 0); /* LCDD10 */
at91_set_A_periph(AT91_PIN_PC15, 0); /* LCDD11 */
at91_set_A_periph(AT91_PIN_PC16, 0); /* LCDD12 */
at91_set_B_periph(AT91_PIN_PC12, 0); /* LCDD13 */
at91_set_A_periph(AT91_PIN_PC18, 0); /* LCDD14 */
at91_set_A_periph(AT91_PIN_PC19, 0); /* LCDD15 */
at91_set_A_periph(AT91_PIN_PC22, 0); /* LCDD18 */
at91_set_A_periph(AT91_PIN_PC23, 0); /* LCDD19 */
at91_set_A_periph(AT91_PIN_PC24, 0); /* LCDD20 */
at91_set_B_periph(AT91_PIN_PC17, 0); /* LCDD21 */
at91_set_A_periph(AT91_PIN_PC26, 0); /* LCDD22 */
at91_set_A_periph(AT91_PIN_PC27, 0); /* LCDD23 */
at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE;
at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_LCDC);
at91_set_a_periph(AT91_PIO_PORTC, 1, 0); /* LCDHSYNC */
at91_set_a_periph(AT91_PIO_PORTC, 2, 0); /* LCDDOTCK */
at91_set_a_periph(AT91_PIO_PORTC, 3, 0); /* LCDDEN */
at91_set_b_periph(AT91_PIO_PORTB, 9, 0); /* LCDCC */
at91_set_a_periph(AT91_PIO_PORTC, 6, 0); /* LCDD2 */
at91_set_a_periph(AT91_PIO_PORTC, 7, 0); /* LCDD3 */
at91_set_a_periph(AT91_PIO_PORTC, 8, 0); /* LCDD4 */
at91_set_a_periph(AT91_PIO_PORTC, 9, 0); /* LCDD5 */
at91_set_a_periph(AT91_PIO_PORTC, 10, 0); /* LCDD6 */
at91_set_a_periph(AT91_PIO_PORTC, 11, 0); /* LCDD7 */
at91_set_a_periph(AT91_PIO_PORTC, 14, 0); /* LCDD10 */
at91_set_a_periph(AT91_PIO_PORTC, 15, 0); /* LCDD11 */
at91_set_a_periph(AT91_PIO_PORTC, 16, 0); /* LCDD12 */
at91_set_b_periph(AT91_PIO_PORTC, 12, 0); /* LCDD13 */
at91_set_a_periph(AT91_PIO_PORTC, 18, 0); /* LCDD14 */
at91_set_a_periph(AT91_PIO_PORTC, 19, 0); /* LCDD15 */
at91_set_a_periph(AT91_PIO_PORTC, 22, 0); /* LCDD18 */
at91_set_a_periph(AT91_PIO_PORTC, 23, 0); /* LCDD19 */
at91_set_a_periph(AT91_PIO_PORTC, 24, 0); /* LCDD20 */
at91_set_b_periph(AT91_PIO_PORTC, 17, 0); /* LCDD21 */
at91_set_a_periph(AT91_PIO_PORTC, 26, 0); /* LCDD22 */
at91_set_a_periph(AT91_PIO_PORTC, 27, 0); /* LCDD23 */
writel(1 << AT91SAM9263_ID_LCDC, &pmc->pcer);
gd->fb_base = AT91SAM9263_SRAM0_BASE;
}
@@ -217,7 +218,7 @@ void lcd_show_board_info(void)
lcd_printf ("(C) 2008 ATMEL Corp\n");
lcd_printf ("at91support@atmel.com\n");
lcd_printf ("%s CPU at %s MHz\n",
AT91_CPU_NAME,
CONFIG_SYS_AT91_CPU_NAME,
strmhz(temp, get_cpu_clk_rate()));
dram_size = 0;
@@ -258,7 +259,7 @@ int board_init(void)
at91sam9263ek_nand_hw_init();
#endif
#ifdef CONFIG_HAS_DATAFLASH
at91_set_gpio_output(AT91_PIN_PE20, 1); /* select spi0 clock */
at91_set_pio_output(AT91_PIO_PORTE, 20, 1); /* select spi0 clock */
at91_spi0_hw_init(1 << 0);
#endif
#ifdef CONFIG_MACB
@@ -297,7 +298,7 @@ int board_eth_init(bd_t *bis)
{
int rc = 0;
#ifdef CONFIG_MACB
rc = macb_eth_initialize(0, (void *)AT91SAM9263_BASE_EMAC, 0x00);
rc = macb_eth_initialize(0, (void *) AT91_EMAC_BASE, 0x00);
#endif
return rc;
}

View File

@@ -23,22 +23,25 @@
*/
#include <common.h>
#include <asm/arch/at91sam9263.h>
#include <asm/arch/hardware.h>
#include <asm/arch/at91_pmc.h>
#include <asm/arch/at91_pio.h>
#include <asm/arch/gpio.h>
#include <asm/arch/io.h>
void coloured_LED_init(void)
{
/* Enable clock */
at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_PIOB |
1 << AT91SAM9263_ID_PIOCDE);
at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE;
at91_set_gpio_output(CONFIG_RED_LED, 1);
at91_set_gpio_output(CONFIG_GREEN_LED, 1);
at91_set_gpio_output(CONFIG_YELLOW_LED, 1);
writel(1 << AT91SAM9263_ID_PIOB | 1 << AT91SAM9263_ID_PIOCDE,
&pmc->pcer);
at91_set_gpio_value(CONFIG_RED_LED, 0);
at91_set_gpio_value(CONFIG_GREEN_LED, 1);
at91_set_gpio_value(CONFIG_YELLOW_LED, 1);
at91_set_pio_output(CONFIG_RED_LED, 1);
at91_set_pio_output(CONFIG_GREEN_LED, 1);
at91_set_pio_output(CONFIG_YELLOW_LED, 1);
at91_set_pio_value(CONFIG_RED_LED, 0);
at91_set_pio_value(CONFIG_GREEN_LED, 1);
at91_set_pio_value(CONFIG_YELLOW_LED, 1);
}

View File

@@ -217,7 +217,7 @@ void lcd_show_board_info(void)
lcd_printf ("(C) 2008 ATMEL Corp\n");
lcd_printf ("at91support@atmel.com\n");
lcd_printf ("%s CPU at %s MHz\n",
AT91_CPU_NAME,
CONFIG_SYS_AT91_CPU_NAME,
strmhz(temp, get_cpu_clk_rate()));
dram_size = 0;

View File

@@ -157,7 +157,7 @@ void lcd_show_board_info(void)
lcd_printf ("(C) 2008 ATMEL Corp\n");
lcd_printf ("at91support@atmel.com\n");
lcd_printf ("%s CPU at %s MHz\n",
AT91_CPU_NAME,
CONFIG_SYS_AT91_CPU_NAME,
strmhz(temp, get_cpu_clk_rate()));
dram_size = 0;

View File

@@ -170,22 +170,26 @@ static struct pci_controller pci2_hose;
static struct pci_controller pcie1_hose;
#endif
int first_free_busno=0;
void
pci_init_board(void)
void pci_init_board(void)
{
volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
struct fsl_pci_info pci_info[3];
u32 devdisr, pordevsr, io_sel;
u32 porpllsr, pci_agent, pci_speed, pci_32, pci_arb, pci_clk_sel;
int first_free_busno = 0;
int num = 0;
uint devdisr = gur->devdisr;
uint io_sel = (gur->pordevsr & MPC85xx_PORDEVSR_IO_SEL) >> 19;
uint host_agent = (gur->porbmsr & MPC85xx_PORBMSR_HA) >> 16;
int pcie_ep, pcie_configured;
debug (" pci_init_board: devdisr=%x, io_sel=%x, host_agent=%x\n",
devdisr, io_sel, host_agent);
devdisr = in_be32(&gur->devdisr);
pordevsr = in_be32(&gur->pordevsr);
porpllsr = in_be32(&gur->porpllsr);
io_sel = (pordevsr & MPC85xx_PORDEVSR_IO_SEL) >> 19;
debug (" pci_init_board: devdisr=%x, io_sel=%x\n", devdisr, io_sel);
/* explicitly set 'Clock out select register' to echo SYSCLK input to our CPLD */
gur->clkocr |= MPC85xx_ATUM_CLKOCR;
setbits_be32(&gur->clkocr, MPC85xx_ATUM_CLKOCR);
if (io_sel & 1) {
if (!(gur->pordevsr & MPC85xx_PORDEVSR_SGMII1_DIS))
@@ -199,145 +203,79 @@ pci_init_board(void)
}
#ifdef CONFIG_PCIE1
{
volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCIE1_ADDR;
struct pci_controller *hose = &pcie1_hose;
int pcie_ep = is_fsl_pci_agent(LAW_TRGT_IF_PCIE_1, host_agent);
int pcie_configured = is_fsl_pci_cfg(LAW_TRGT_IF_PCIE_1, io_sel);
struct pci_region *r = hose->regions;
pcie_configured = is_fsl_pci_cfg(LAW_TRGT_IF_PCIE_1, io_sel);
if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){
printf ("\n PCIE1 connected to slot as %s (base address %x)",
pcie_ep ? "End Point" : "Root Complex",
(uint)pci);
if (pci->pme_msg_det) {
pci->pme_msg_det = 0xffffffff;
debug (" with errors. Clearing. Now 0x%08x",pci->pme_msg_det);
}
printf ("\n");
SET_STD_PCIE_INFO(pci_info[num], 1);
pcie_ep = fsl_setup_hose(&pcie1_hose, pci_info[num].regs);
#ifdef CONFIG_SYS_PCIE1_MEM_BUS2
/* outbound memory */
pci_set_region(r++,
CONFIG_SYS_PCIE1_MEM_BASE,
CONFIG_SYS_PCIE1_MEM_PHYS,
CONFIG_SYS_PCIE1_MEM_SIZE,
PCI_REGION_MEM);
/* outbound io */
pci_set_region(r++,
CONFIG_SYS_PCIE1_IO_BASE,
CONFIG_SYS_PCIE1_IO_PHYS,
CONFIG_SYS_PCIE1_IO_SIZE,
PCI_REGION_IO);
#ifdef CONFIG_SYS_PCIE1_MEM_BASE2
/* outbound memory */
pci_set_region(r++,
CONFIG_SYS_PCIE1_MEM_BASE2,
pci_set_region(&pcie1_hose.regions[0],
CONFIG_SYS_PCIE1_MEM_BUS2,
CONFIG_SYS_PCIE1_MEM_PHYS2,
CONFIG_SYS_PCIE1_MEM_SIZE2,
PCI_REGION_MEM);
pcie1_hose.region_count = 1;
#endif
hose->region_count = r - hose->regions;
hose->first_busno=first_free_busno;
fsl_pci_init(hose, (u32)&pci->cfg_addr, (u32)&pci->cfg_data);
first_free_busno=hose->last_busno+1;
printf(" PCIE1 on bus %02x - %02x\n",
hose->first_busno,hose->last_busno);
printf (" PCIE1 connected to Slot as %s (base addr %lx)\n",
pcie_ep ? "Endpoint" : "Root Complex",
pci_info[num].regs);
first_free_busno = fsl_pci_init_port(&pci_info[num++],
&pcie1_hose, first_free_busno);
} else {
printf (" PCIE1: disabled\n");
}
}
puts("\n");
#else
gur->devdisr |= MPC85xx_DEVDISR_PCIE; /* disable */
setbits_be32(&gur->devdisr, MPC85xx_DEVDISR_PCIE); /* disable */
#endif
#ifdef CONFIG_PCI1
{
volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCI1_ADDR;
struct pci_controller *hose = &pci1_hose;
struct pci_region *r = hose->regions;
uint pci_agent = is_fsl_pci_agent(LAW_TRGT_IF_PCI_1, host_agent);
uint pci_speed = 33333000; /*get_clock_freq (); PCI PSPEED in [4:5] */
uint pci_32 = gur->pordevsr & MPC85xx_PORDEVSR_PCI1_PCI32; /* PORDEVSR[15] */
uint pci_arb = gur->pordevsr & MPC85xx_PORDEVSR_PCI1_ARB; /* PORDEVSR[14] */
uint pci_clk_sel = gur->porpllsr & MPC85xx_PORDEVSR_PCI1_SPD; /* PORPLLSR[16] */
pci_speed = 33333000; /*get_clock_freq (); PCI PSPEED in [4:5] */
pci_32 = pordevsr & MPC85xx_PORDEVSR_PCI1_PCI32; /* PORDEVSR[15] */
pci_arb = pordevsr & MPC85xx_PORDEVSR_PCI1_ARB;
pci_clk_sel = porpllsr & MPC85xx_PORDEVSR_PCI1_SPD;
if (!(devdisr & MPC85xx_DEVDISR_PCI1)) {
printf ("\n PCI1: %d bit, %s MHz, %s, %s, %s (base address %x)\n",
SET_STD_PCI_INFO(pci_info[num], 1);
pci_agent = fsl_setup_hose(&pci1_hose, pci_info[num].regs);
printf ("\n PCI1: %d bit, %s MHz, %s, %s, %s (base address %lx)\n",
(pci_32) ? 32 : 64,
(pci_speed == 33333000) ? "33" :
(pci_speed == 66666000) ? "66" : "unknown",
pci_clk_sel ? "sync" : "async",
pci_agent ? "agent" : "host",
pci_arb ? "arbiter" : "external-arbiter",
(uint)pci
);
pci_info[num].regs);
/* outbound memory */
pci_set_region(r++,
CONFIG_SYS_PCI1_MEM_BASE,
CONFIG_SYS_PCI1_MEM_PHYS,
CONFIG_SYS_PCI1_MEM_SIZE,
PCI_REGION_MEM);
/* outbound io */
pci_set_region(r++,
CONFIG_SYS_PCI1_IO_BASE,
CONFIG_SYS_PCI1_IO_PHYS,
CONFIG_SYS_PCI1_IO_SIZE,
PCI_REGION_IO);
hose->region_count = r - hose->regions;
hose->first_busno=first_free_busno;
fsl_pci_init(hose, (u32)&pci->cfg_addr, (u32)&pci->cfg_data);
first_free_busno=hose->last_busno+1;
printf ("PCI1 on bus %02x - %02x\n",
hose->first_busno,hose->last_busno);
first_free_busno = fsl_pci_init_port(&pci_info[num++],
&pci1_hose, first_free_busno);
} else {
printf (" PCI1: disabled\n");
printf (" PCI: disabled\n");
}
}
puts("\n");
#else
gur->devdisr |= MPC85xx_DEVDISR_PCI1; /* disable */
setbits_be32(&gur->devdisr, MPC85xx_DEVDISR_PCI1); /* disable */
#endif
#ifdef CONFIG_PCI2
{
volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCI2_ADDR;
struct pci_controller *hose = &pci2_hose;
struct pci_region *r = hose->regions;
if (!(devdisr & MPC85xx_DEVDISR_PCI2)) {
pci_set_region(r++,
CONFIG_SYS_PCI2_MEM_BASE,
CONFIG_SYS_PCI2_MEM_PHYS,
CONFIG_SYS_PCI2_MEM_SIZE,
PCI_REGION_MEM);
SET_STD_PCI_INFO(pci_info[num], 2);
pci_agent = fsl_setup_hose(&pci2_hose, pci_info[num].regs);
pci_set_region(r++,
CONFIG_SYS_PCI2_IO_BASE,
CONFIG_SYS_PCI2_IO_PHYS,
CONFIG_SYS_PCI2_IO_SIZE,
PCI_REGION_IO);
hose->region_count = r - hose->regions;
hose->first_busno=first_free_busno;
fsl_pci_init(hose, (u32)&pci->cfg_addr, (u32)&pci->cfg_data);
first_free_busno=hose->last_busno+1;
printf ("PCI2 on bus %02x - %02x\n",
hose->first_busno,hose->last_busno);
puts (" PCI2\n");
first_free_busno = fsl_pci_init_port(&pci_info[num++],
&pci1_hose, first_free_busno);
} else {
printf (" PCI2: disabled\n");
}
}
puts("\n");
#else
gur->devdisr |= MPC85xx_DEVDISR_PCI2;
setbits_be32(&gur->devdisr, MPC85xx_DEVDISR_PCI2); /* disable */
#endif
}

View File

@@ -15,6 +15,7 @@
#include <asm/blackfin.h>
#include <asm/net.h>
#include <asm/mach-common/bits/otp.h>
#include <asm/sdh.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -25,13 +26,6 @@ int checkboard(void)
return 0;
}
phys_size_t initdram(int board_type)
{
gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;
gd->bd->bi_memsize = CONFIG_SYS_MAX_RAM_SIZE;
return gd->bd->bi_memsize;
}
#if defined(CONFIG_BFIN_MAC)
static void board_init_enetaddr(uchar *mac_addr)
{
@@ -162,3 +156,10 @@ int board_early_init_f(void)
#endif
return 0;
}
#ifdef CONFIG_BFIN_SDH
int board_mmc_init(bd_t *bis)
{
return bfin_mmc_init(bis);
}
#endif

View File

@@ -24,13 +24,6 @@ int checkboard(void)
return 0;
}
phys_size_t initdram(int board_type)
{
gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;
gd->bd->bi_memsize = CONFIG_SYS_MAX_RAM_SIZE;
return gd->bd->bi_memsize;
}
#ifdef CONFIG_BFIN_MAC
static void board_init_enetaddr(uchar *mac_addr)
{

View File

@@ -24,13 +24,6 @@ int checkboard(void)
return 0;
}
phys_size_t initdram(int board_type)
{
gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;
gd->bd->bi_memsize = CONFIG_SYS_MAX_RAM_SIZE;
return gd->bd->bi_memsize;
}
#ifdef CONFIG_BFIN_MAC
static void board_init_enetaddr(uchar *mac_addr)
{
@@ -75,3 +68,16 @@ int misc_init_r(void)
return 0;
}
#ifdef CONFIG_USB_BLACKFIN
void board_musb_init(void)
{
/*
* BF527 EZ-KITs require PG13 to be high for HOST mode
*/
bfin_write_PORTG_FER(bfin_read_PORTG_FER() & ~PG13);
bfin_write_PORTGIO_DIR(bfin_read_PORTGIO_DIR() | PG13);
bfin_write_PORTGIO_SET(PG13);
SSYNC();
}
#endif

View File

@@ -12,42 +12,111 @@
#include <malloc.h>
#include <asm/blackfin.h>
#include <asm/mach-common/bits/dma.h>
#include <i2c.h>
#include <spi.h>
#include <linux/types.h>
#include <stdio_dev.h>
int gunzip(void *, int, unsigned char *, unsigned long *);
#define DMA_SIZE16 2
#include <asm/mach-common/bits/ppi.h>
#include <asm/mach-common/bits/timer.h>
#include <asm/bfin_logo_230x230.h>
#define LCD_X_RES 320 /* Horizontal Resolution */
#define LCD_Y_RES 240 /* Vertical Resolution */
#define LCD_BPP 24 /* Bit Per Pixel */
#define LCD_PIXEL_SIZE (LCD_BPP / 8)
#define DMA_BUS_SIZE 16
#define DMA_BUS_SIZE 16
#define LCD_CLK (12*1000*1000) /* 12MHz */
#ifdef CONFIG_MK_BF527_EZKIT_REV_2_1 /* lq035q1 */
#define CLOCKS_PER_PIX 3
#if !defined(CONFIG_LQ035Q1_USE_RGB888_8_BIT_PPI) && \
!defined(CONFIG_LQ035Q1_USE_RGB565_8_BIT_PPI)
# define CONFIG_LQ035Q1_USE_RGB565_8_BIT_PPI
#endif
/* Interface 16/18-bit TFT over an 8-bit wide PPI using a
* small Programmable Logic Device (CPLD)
* http://blackfin.uclinux.org/gf/project/stamp/frs/?action=FrsReleaseBrowse&frs_package_id=165
*/
#ifdef CONFIG_LQ035Q1_USE_RGB565_8_BIT_PPI
#include <asm/bfin_logo_rgb565_230x230.h>
#define LCD_BPP 16 /* Bit Per Pixel */
#define CLOCKS_PPIX 2 /* Clocks per pixel */
#define CPLD_DELAY 3 /* RGB565 pipeline delay */
#endif
#ifdef CONFIG_LQ035Q1_USE_RGB888_8_BIT_PPI
#include <asm/bfin_logo_230x230.h>
#define LCD_BPP 24 /* Bit Per Pixel */
#define CLOCKS_PPIX 3 /* Clocks per pixel */
#define CPLD_DELAY 5 /* RGB888 pipeline delay */
#endif
/*
* HS and VS timing parameters (all in number of PPI clk ticks)
*/
#define H_ACTPIX (LCD_X_RES * CLOCKS_PPIX) /* active horizontal pixel */
#define H_PERIOD (336 * CLOCKS_PPIX) /* HS period */
#define H_PULSE (2 * CLOCKS_PPIX) /* HS pulse width */
#define H_START (7 * CLOCKS_PPIX + CPLD_DELAY) /* first valid pixel */
#define U_LINE 4 /* Blanking Lines */
#define V_LINES (LCD_Y_RES + U_LINE) /* total vertical lines */
#define V_PULSE (2 * CLOCKS_PPIX) /* VS pulse width (1-5 H_PERIODs) */
#define V_PERIOD (H_PERIOD * V_LINES) /* VS period */
#define ACTIVE_VIDEO_MEM_OFFSET ((U_LINE / 2) * LCD_X_RES * (LCD_BPP / 8))
/*
* LCD Modes
*/
#define LQ035_RL (0 << 8) /* Right -> Left Scan */
#define LQ035_LR (1 << 8) /* Left -> Right Scan */
#define LQ035_TB (1 << 9) /* Top -> Botton Scan */
#define LQ035_BT (0 << 9) /* Botton -> Top Scan */
#define LQ035_BGR (1 << 11) /* Use BGR format */
#define LQ035_RGB (0 << 11) /* Use RGB format */
#define LQ035_NORM (1 << 13) /* Reversal */
#define LQ035_REV (0 << 13) /* Reversal */
#define LQ035_INDEX 0x74
#define LQ035_DATA 0x76
#define LQ035_DRIVER_OUTPUT_CTL 0x1
#define LQ035_SHUT_CTL 0x11
#define LQ035_DRIVER_OUTPUT_MASK (LQ035_LR | LQ035_TB | LQ035_BGR | LQ035_REV)
#define LQ035_DRIVER_OUTPUT_DEFAULT (0x2AEF & ~LQ035_DRIVER_OUTPUT_MASK)
#define LQ035_SHUT (1 << 0) /* Shutdown */
#define LQ035_ON (0 << 0) /* Shutdown */
#ifndef CONFIG_LQ035Q1_LCD_MODE
#define CONFIG_LQ035Q1_LCD_MODE (LQ035_NORM | LQ035_RL | LQ035_TB | LQ035_BGR)
#endif
#else /* t350mcqb */
#include <asm/bfin_logo_230x230.h>
#define LCD_BPP 24 /* Bit Per Pixel */
#define CLOCKS_PPIX 3 /* Clocks per pixel */
/* HS and VS timing parameters (all in number of PPI clk ticks) */
#define H_ACTPIX (LCD_X_RES * CLOCKS_PER_PIX) /* active horizontal pixel */
#define H_PERIOD (408 * CLOCKS_PER_PIX) /* HS period */
#define H_ACTPIX (LCD_X_RES * CLOCKS_PPIX) /* active horizontal pixel */
#define H_PERIOD (408 * CLOCKS_PPIX) /* HS period */
#define H_PULSE 90 /* HS pulse width */
#define H_START 204 /* first valid pixel */
#define U_LINE 1 /* Blanking Lines */
#define V_LINES (LCD_Y_RES + U_LINE) /* total vertical lines */
#define V_LINES (LCD_Y_RES + U_LINE) /* total vertical lines */
#define V_PULSE (3 * H_PERIOD) /* VS pulse width (1-5 H_PERIODs) */
#define V_PERIOD (H_PERIOD * V_LINES) /* VS period */
#define ACTIVE_VIDEO_MEM_OFFSET (U_LINE * H_ACTPIX)
#endif
#define LCD_PIXEL_SIZE (LCD_BPP / 8)
#define DMA_SIZE16 2
#define PPI_TX_MODE 0x2
#define PPI_XFER_TYPE_11 0xC
@@ -55,6 +124,40 @@ int gunzip(void *, int, unsigned char *, unsigned long *);
#define PPI_PACK_EN 0x80
#define PPI_POLS_1 0x8000
#ifdef CONFIG_MK_BF527_EZKIT_REV_2_1
static struct spi_slave *slave;
static int lq035q1_control(unsigned char reg, unsigned short value)
{
int ret;
u8 regs[3] = {LQ035_INDEX, 0, 0};
u8 data[3] = {LQ035_DATA, 0, 0};
u8 dummy[3];
regs[2] = reg;
data[1] = value >> 8;
data[2] = value & 0xFF;
if (!slave) {
/* FIXME: Verify the max SCK rate */
slave = spi_setup_slave(CONFIG_LQ035Q1_SPI_BUS,
CONFIG_LQ035Q1_SPI_CS, 20000000,
SPI_MODE_3);
if (!slave)
return -1;
}
if (spi_claim_bus(slave))
return -1;
ret = spi_xfer(slave, 24, regs, dummy, SPI_XFER_BEGIN | SPI_XFER_END);
ret |= spi_xfer(slave, 24, data, dummy, SPI_XFER_BEGIN | SPI_XFER_END);
spi_release_bus(slave);
return ret;
}
#endif
/* enable and disable PPI functions */
void EnablePPI(void)
{
@@ -82,7 +185,7 @@ void Init_PPI(void)
*pPPI_DELAY = H_START;
*pPPI_COUNT = (H_ACTPIX-1);
*pPPI_FRAME = 0;
*pPPI_FRAME = V_LINES;
/* PPI control, to be replaced with definitions */
*pPPI_CONTROL = PPI_TX_MODE | /* output mode , PORT_DIR */
@@ -190,9 +293,20 @@ void DisableTIMER1(void)
SSYNC();
}
void EnableTIMER12(void)
{
*pTIMER_ENABLE |= TIMEN1 | TIMEN0;
SSYNC();
}
int video_init(void *dst)
{
#ifdef CONFIG_MK_BF527_EZKIT_REV_2_1
lq035q1_control(LQ035_SHUT_CTL, LQ035_ON);
lq035q1_control(LQ035_DRIVER_OUTPUT_CTL, (CONFIG_LQ035Q1_LCD_MODE &
LQ035_DRIVER_OUTPUT_MASK) | LQ035_DRIVER_OUTPUT_DEFAULT);
#endif
Init_Ports();
Init_DMA(dst);
EnableDMA();
@@ -201,6 +315,9 @@ int video_init(void *dst)
Init_PPI();
EnablePPI();
#ifdef CONFIG_MK_BF527_EZKIT_REV_2_1
EnableTIMER12();
#else
/* Frame sync 2 (VS) needs to start at least one PPI clk earlier */
EnableTIMER1();
/* Add Some Delay ... */
@@ -211,6 +328,7 @@ int video_init(void *dst)
/* now start frame sync 1 */
EnableTIMER0();
#endif
return 0;
}

View File

@@ -39,13 +39,6 @@ int checkboard(void)
return 0;
}
phys_size_t initdram(int board_type)
{
gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;
gd->bd->bi_memsize = CONFIG_SYS_MAX_RAM_SIZE;
return gd->bd->bi_memsize;
}
/* miscellaneous platform dependent initialisations */
int misc_init_r(void)
{

View File

@@ -30,6 +30,7 @@ include $(TOPDIR)/config.mk
LIB = $(obj)lib$(BOARD).a
COBJS-y := $(BOARD).o
COBJS-$(CONFIG_STAMP_CF) += ide-cf.o
COBJS-$(CONFIG_VIDEO) += video.o
SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)

View File

@@ -39,13 +39,6 @@ int checkboard(void)
return 0;
}
phys_size_t initdram(int board_type)
{
gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;
gd->bd->bi_memsize = CONFIG_SYS_MAX_RAM_SIZE;
return gd->bd->bi_memsize;
}
/* PF0 and PF1 are used to switch between the ethernet and flash:
* PF0 PF1
* flash: 0 0
@@ -69,118 +62,11 @@ void swap_to(int device_id)
/* miscellaneous platform dependent initialisations */
int misc_init_r(void)
{
int i;
int cf_stat = 0;
/* Check whether CF card is inserted */
*pFIO_EDGE = FIO_EDGE_CF_BITS;
*pFIO_POLAR = FIO_POLAR_CF_BITS;
for (i = 0; i < 0x300; i++)
asm("nop;");
if ((*pFIO_FLAG_S) & CF_STAT_BITS) {
cf_stat = 0;
} else {
cf_stat = 1;
}
*pFIO_EDGE = FIO_EDGE_BITS;
*pFIO_POLAR = FIO_POLAR_BITS;
if (cf_stat) {
printf("Booting from COMPACT flash\n");
for (i = 0; i < 0x1000; i++)
asm("nop;");
for (i = 0; i < 0x1000; i++)
asm("nop;");
for (i = 0; i < 0x1000; i++)
asm("nop;");
serial_setbrg();
ide_init();
setenv("bootargs", "");
setenv("bootcmd",
"fatload ide 0:1 0x1000000 uImage-stamp;bootm 0x1000000;bootm 0x20100000");
} else {
printf("Booting from FLASH\n");
}
return 0;
}
#ifdef CONFIG_STAMP_CF
cf_ide_init();
#endif
#ifdef CONFIG_STAMP_CF
void cf_outb(unsigned char val, volatile unsigned char *addr)
{
/*
* Set PF1 PF0 respectively to 0 1 to divert address
* to the expansion memory banks
*/
*pFIO_FLAG_S = CF_PF0;
*pFIO_FLAG_C = CF_PF1;
SSYNC();
*(addr) = val;
SSYNC();
/* Setback PF1 PF0 to 0 0 to address external
* memory banks */
*(volatile unsigned short *)pFIO_FLAG_C = CF_PF1_PF0;
SSYNC();
}
unsigned char cf_inb(volatile unsigned char *addr)
{
volatile unsigned char c;
*pFIO_FLAG_S = CF_PF0;
*pFIO_FLAG_C = CF_PF1;
SSYNC();
c = *(addr);
SSYNC();
*pFIO_FLAG_C = CF_PF1_PF0;
SSYNC();
return c;
}
void cf_insw(unsigned short *sect_buf, unsigned short *addr, int words)
{
int i;
*pFIO_FLAG_S = CF_PF0;
*pFIO_FLAG_C = CF_PF1;
SSYNC();
for (i = 0; i < words; i++) {
*(sect_buf + i) = *(addr);
SSYNC();
}
*pFIO_FLAG_C = CF_PF1_PF0;
SSYNC();
}
void cf_outsw(unsigned short *addr, unsigned short *sect_buf, int words)
{
int i;
*pFIO_FLAG_S = CF_PF0;
*pFIO_FLAG_C = CF_PF1;
SSYNC();
for (i = 0; i < words; i++) {
*(addr) = *(sect_buf + i);
SSYNC();
}
*pFIO_FLAG_C = CF_PF1_PF0;
SSYNC();
return 0;
}
#endif

View File

@@ -0,0 +1,90 @@
/*
* CF IDE addon card code
*
* Enter bugs at http://blackfin.uclinux.org/
*
* Copyright (c) 2005-2009 Analog Devices Inc.
*
* Licensed under the GPL-2 or later.
*/
#include <common.h>
#include <config.h>
#include <asm/blackfin.h>
#include "bf533-stamp.h"
void cf_outb(unsigned char val, volatile unsigned char *addr)
{
/* "ETHERNET" means the expansion memory banks */
swap_to(ETHERNET);
*addr = val;
SSYNC();
swap_to(FLASH);
}
unsigned char cf_inb(volatile unsigned char *addr)
{
unsigned char c;
swap_to(ETHERNET);
c = *addr;
SSYNC();
swap_to(FLASH);
return c;
}
void cf_insw(unsigned short *sect_buf, unsigned short *addr, int words)
{
int i;
swap_to(ETHERNET);
for (i = 0; i < words; i++) {
*(sect_buf + i) = *addr;
SSYNC();
}
swap_to(FLASH);
}
void cf_outsw(unsigned short *addr, unsigned short *sect_buf, int words)
{
int i;
swap_to(ETHERNET);
for (i = 0; i < words; i++) {
*addr = *(sect_buf + i);
SSYNC();
}
swap_to(FLASH);
}
void cf_ide_init(void)
{
int i, cf_stat;
/* Check whether CF card is inserted */
bfin_write_FIO_EDGE(FIO_EDGE_CF_BITS);
bfin_write_FIO_POLAR(FIO_POLAR_CF_BITS);
for (i = 0; i < 0x300; i++)
asm volatile("nop;");
cf_stat = bfin_read_FIO_FLAG_S() & CF_STAT_BITS;
bfin_write_FIO_EDGE(FIO_EDGE_BITS);
bfin_write_FIO_POLAR(FIO_POLAR_BITS);
if (!cf_stat) {
for (i = 0; i < 0x3000; i++)
asm volatile("nop;");
ide_init();
}
}

View File

@@ -20,8 +20,6 @@
#include <linux/types.h>
#include <stdio_dev.h>
int gunzip(void *, int, unsigned char *, unsigned long *);
#define DMA_SIZE16 2
#include <asm/mach-common/bits/ppi.h>

View File

@@ -23,13 +23,6 @@ int checkboard(void)
return 0;
}
phys_size_t initdram(int board_type)
{
gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;
gd->bd->bi_memsize = CONFIG_SYS_MAX_RAM_SIZE;
return gd->bd->bi_memsize;
}
#ifdef CONFIG_BFIN_MAC
static void board_init_enetaddr(uchar *mac_addr)
{

View File

@@ -23,13 +23,6 @@ int checkboard(void)
return 0;
}
phys_size_t initdram(int board_type)
{
gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;
gd->bd->bi_memsize = CONFIG_SYS_MAX_RAM_SIZE;
return gd->bd->bi_memsize;
}
#ifdef CONFIG_BFIN_MAC
static void board_init_enetaddr(uchar *mac_addr)
{

View File

@@ -23,13 +23,6 @@ int checkboard(void)
return 0;
}
phys_size_t initdram(int board_type)
{
gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;
gd->bd->bi_memsize = CONFIG_SYS_MAX_RAM_SIZE;
return gd->bd->bi_memsize;
}
#ifdef CONFIG_BFIN_MAC
static void board_init_enetaddr(uchar *mac_addr)
{

View File

@@ -43,13 +43,6 @@ int checkboard(void)
return 0;
}
phys_size_t initdram(int board_type)
{
gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;
gd->bd->bi_memsize = CONFIG_SYS_MAX_RAM_SIZE;
return gd->bd->bi_memsize;
}
void board_reset(void)
{
/* workaround for weak pull ups on ssel */

View File

@@ -20,13 +20,6 @@ int checkboard(void)
return 0;
}
phys_size_t initdram(int board_type)
{
gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;
gd->bd->bi_memsize = CONFIG_SYS_MAX_RAM_SIZE;
return gd->bd->bi_memsize;
}
#ifdef CONFIG_SMC91111
int board_eth_init(bd_t *bis)
{

View File

@@ -11,6 +11,7 @@
#include <config.h>
#include <command.h>
#include <asm/blackfin.h>
#include <asm/sdh.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -21,13 +22,6 @@ int checkboard(void)
return 0;
}
phys_size_t initdram(int board_type)
{
gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;
gd->bd->bi_memsize = CONFIG_SYS_MAX_RAM_SIZE;
return gd->bd->bi_memsize;
}
int board_early_init_f(void)
{
/* Port H: PH8 - PH13 == A4 - A9
@@ -85,3 +79,26 @@ int board_eth_init(bd_t *bis)
return smc911x_initialize(0, CONFIG_SMC911X_BASE);
}
#endif
#ifdef CONFIG_BFIN_SDH
int board_mmc_init(bd_t *bis)
{
return bfin_mmc_init(bis);
}
#endif
#ifdef CONFIG_USB_BLACKFIN
void board_musb_init(void)
{
/*
* Rev 1.0 BF549 EZ-KITs require PE7 to be high for both device
* and OTG host modes, while rev 1.1 and greater require PE7 to
* be low for device mode and high for host mode. We set it high
* here because we are in host mode.
*/
bfin_write_PORTE_FER(bfin_read_PORTE_FER() & ~PE7);
bfin_write_PORTE_DIR_SET(PE7);
bfin_write_PORTE_SET(PE7);
SSYNC();
}
#endif

View File

@@ -16,8 +16,6 @@
#include <linux/types.h>
#include <stdio_dev.h>
int gunzip(void *, int, unsigned char *, unsigned long *);
#define DMA_SIZE16 2
#include <asm/mach-common/bits/eppi.h>

View File

@@ -0,0 +1,56 @@
#
# U-boot - Makefile
#
# Copyright (c) 2005-2007 Analog Device Inc.
#
# (C) Copyright 2000-2006
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# (C) Copyright 2009 CJSC "NII STT", Russia, Smolensk
#
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
include $(TOPDIR)/config.mk
LIB = $(obj)lib$(BOARD).a
COBJS-y := $(BOARD).o
SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS-y))
SOBJS := $(addprefix $(obj),$(SOBJS-y))
$(LIB): $(obj).depend $(OBJS) $(SOBJS)
$(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
clean:
rm -f $(SOBJS) $(OBJS)
distclean: clean
rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
# defines $(obj).depend target
include $(SRCTREE)/rules.mk
sinclude $(obj).depend
#########################################################################

View File

@@ -0,0 +1,51 @@
/*
* File: board/bf561-acvilon/bf561-acvilon.c
* Based on: board/bf561-ezkit/bf561-ezkit.c
* Author:
*
* Created: 2009-06-23
* Description: Acvilon System On Module board file
*
* Modified:
* Copyright 2009 CJSC "NII STT", http://www.niistt.ru/
* Copyright (c) 2005-2008 Analog Devices Inc.
*
* (C) Copyright 2000-2004
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* Bugs:
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, see the file COPYING, or write
* to the Free Software Foundation, Inc.,
* 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <common.h>
#include <netdev.h>
DECLARE_GLOBAL_DATA_PTR;
int checkboard(void)
{
printf("Board: CJSC \"NII STT\"-=Acvilon Platform=- [U-Boot]\n");
printf(" Support: http://www.niistt.ru/\n");
return 0;
}
#ifdef CONFIG_SMC911X
int board_eth_init(bd_t *bis)
{
return smc911x_initialize(0, CONFIG_SMC911X_BASE);
}
#endif

View File

@@ -0,0 +1,34 @@
#
# Copyright (c) 2005-2008 Analog Device Inc.
#
# (C) Copyright 2001
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
# This is not actually used for Blackfin boards so do not change it
#TEXT_BASE = do-not-use-me
CFLAGS_lib_generic += -O2
CFLAGS_lzma += -O2
# Set some default LDR flags based on boot mode.
LDR_FLAGS-BFIN_BOOT_PARA := --bits 16
LDR_FLAGS += $(LDR_FLAGS-$(CONFIG_BFIN_BOOT_MODE))

View File

@@ -38,13 +38,6 @@ int checkboard(void)
return 0;
}
phys_size_t initdram(int board_type)
{
gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;
gd->bd->bi_memsize = CONFIG_SYS_MAX_RAM_SIZE;
return gd->bd->bi_memsize;
}
#ifdef CONFIG_SMC91111
int board_eth_init(bd_t *bis)
{

View File

@@ -24,13 +24,6 @@ int checkboard(void)
return 0;
}
phys_size_t initdram(int board_type)
{
gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;
gd->bd->bi_memsize = CONFIG_SYS_MAX_RAM_SIZE;
return gd->bd->bi_memsize;
}
#ifdef SHARED_RESOURCES
void swap_to(int device_id)
{

View File

@@ -24,13 +24,6 @@ int checkboard(void)
return 0;
}
phys_size_t initdram(int board_type)
{
gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;
gd->bd->bi_memsize = CONFIG_SYS_MAX_RAM_SIZE;
return gd->bd->bi_memsize;
}
#ifdef CONFIG_BFIN_MAC
static void board_init_enetaddr(uchar *mac_addr)
{

View File

@@ -18,13 +18,6 @@ int checkboard(void)
return 0;
}
phys_size_t initdram(int board_type)
{
gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;
gd->bd->bi_memsize = CONFIG_SYS_MAX_RAM_SIZE;
return gd->bd->bi_memsize;
}
#ifdef CONFIG_SMC91111
int board_eth_init(bd_t *bis)
{

View File

@@ -24,13 +24,6 @@ int checkboard(void)
return 0;
}
phys_size_t initdram(int board_type)
{
gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;
gd->bd->bi_memsize = CONFIG_SYS_MAX_RAM_SIZE;
return gd->bd->bi_memsize;
}
#ifdef CONFIG_BFIN_MAC
static void board_init_enetaddr(uchar *mac_addr)
{

View File

@@ -24,13 +24,6 @@ int checkboard(void)
return 0;
}
phys_size_t initdram(int board_type)
{
gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;
gd->bd->bi_memsize = CONFIG_SYS_MAX_RAM_SIZE;
return gd->bd->bi_memsize;
}
#ifdef CONFIG_BFIN_MAC
static void board_init_enetaddr(uchar *mac_addr)
{

View File

@@ -21,13 +21,6 @@ int checkboard(void)
return 0;
}
phys_size_t initdram(int board_type)
{
gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;
gd->bd->bi_memsize = CONFIG_SYS_MAX_RAM_SIZE;
return gd->bd->bi_memsize;
}
int board_early_init_f(void)
{
/* Port H: PH8 - PH13 == A4 - A9

View File

@@ -16,8 +16,6 @@
#include <linux/types.h>
#include <stdio_dev.h>
int gunzip(void *, int, unsigned char *, unsigned long *);
#ifdef CONFIG_VIDEO
#define DMA_SIZE16 2

View File

@@ -18,13 +18,6 @@ int checkboard(void)
return 0;
}
phys_size_t initdram(int board_type)
{
gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;
gd->bd->bi_memsize = CONFIG_SYS_MAX_RAM_SIZE;
return gd->bd->bi_memsize;
}
#ifdef CONFIG_SMC91111
int board_eth_init(bd_t *bis)
{

View File

@@ -271,13 +271,6 @@ static void ft_blob_update(void *blob, bd_t *bd)
if (ret < 0)
printf("ft_blob_update(): cannot set /model property err:%s\n",
fdt_strerror(ret));
ret = fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize);
if (ret < 0) {
printf("ft_blob_update(): cannot set /memory/reg "
"property err:%s\n", fdt_strerror(ret));
}
}
#endif /* defined(CONFIG_OF_BOARD_SETUP) && defined(CONFIG_OF_LIBFDT) */
@@ -330,14 +323,6 @@ int board_early_init_r(void)
}
#ifdef CONFIG_POST
int post_hotkeys_pressed(void)
{
return 0;
}
#endif /* CONFIG_POST */
#if defined(CONFIG_POST) || defined(CONFIG_LOGBUFFER)
void post_word_store(ulong a)
{

View File

@@ -30,8 +30,12 @@
#include <common.h>
#include <asm/mach-types.h>
#include <asm/arch/AT91RM9200.h>
#include <asm/io.h>
#include <netdev.h>
#if defined(CONFIG_DRIVER_ETHER)
#include <at91rm9200_net.h>
#include <dm9161.h>
#endif
DECLARE_GLOBAL_DATA_PTR;
@@ -177,3 +181,12 @@ void at91rm9200_GetPhyInterface(AT91PS_PhyOps p_phyops)
#endif
#endif /* CONFIG_DRIVER_ETHER */
#ifdef CONFIG_DRIVER_AT91EMAC
int board_eth_init(bd_t *bis)
{
int rc = 0;
rc = at91emac_register(bis, 0);
return rc;
}
#endif

View File

@@ -1,150 +0,0 @@
/*
* (C) Copyright 2000
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
OUTPUT_ARCH(powerpc)
/* Do we need any of these for elf?
__DYNAMIC = 0; */
SECTIONS
{
.resetvec 0xFFFFFFFC :
{
*(.resetvec)
} = 0xffff
/* Read-only sections, merged into text segment: */
. = + SIZEOF_HEADERS;
.interp : { *(.interp) }
.hash : { *(.hash) }
.dynsym : { *(.dynsym) }
.dynstr : { *(.dynstr) }
.rel.text : { *(.rel.text) }
.rela.text : { *(.rela.text) }
.rel.data : { *(.rel.data) }
.rela.data : { *(.rela.data) }
.rel.rodata : { *(.rel.rodata) }
.rela.rodata : { *(.rela.rodata) }
.rel.got : { *(.rel.got) }
.rela.got : { *(.rela.got) }
.rel.ctors : { *(.rel.ctors) }
.rela.ctors : { *(.rela.ctors) }
.rel.dtors : { *(.rel.dtors) }
.rela.dtors : { *(.rela.dtors) }
.rel.bss : { *(.rel.bss) }
.rela.bss : { *(.rela.bss) }
.rel.plt : { *(.rel.plt) }
.rela.plt : { *(.rela.plt) }
.init : { *(.init) }
.plt : { *(.plt) }
.text :
{
/* WARNING - the following is hand-optimized to fit within */
/* the sector layout of our flash chips! XXX FIXME XXX */
cpu/ppc4xx/start.o (.text)
board/cray/L1/init.o (.text)
cpu/ppc4xx/traps.o (.text)
cpu/ppc4xx/interrupts.o (.text)
cpu/ppc4xx/4xx_uart.o (.text)
cpu/ppc4xx/cpu_init.o (.text)
cpu/ppc4xx/speed.o (.text)
drivers/net/4xx_enet.o (.text)
common/dlmalloc.o (.text)
lib_generic/crc32.o (.text)
lib_ppc/extable.o (.text)
lib_generic/zlib.o (.text)
/*. = env_offset;*/
common/env_embedded.o(.text)
*(.text)
*(.got1)
}
_etext = .;
PROVIDE (etext = .);
.rodata :
{
*(.eh_frame)
*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }
.dtors : { *(.dtors) }
/* Read-write section, merged into data segment: */
. = (. + 0x00FF) & 0xFFFFFF00;
_erotext = .;
PROVIDE (erotext = .);
.reloc :
{
*(.got)
_GOT2_TABLE_ = .;
*(.got2)
_FIXUP_TABLE_ = .;
*(.fixup)
}
__got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
__fixup_entries = (. - _FIXUP_TABLE_)>>2;
.data :
{
*(.data)
*(.data1)
*(.sdata)
*(.sdata2)
*(.dynamic)
CONSTRUCTORS
}
_edata = .;
PROVIDE (edata = .);
. = .;
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
. = .;
__start___ex_table = .;
__ex_table : { *(__ex_table) }
__stop___ex_table = .;
. = ALIGN(256);
__init_begin = .;
.text.init : { *(.text.init) }
.data.init : { *(.data.init) }
. = ALIGN(256);
__init_end = .;
__bss_start = .;
.bss (NOLOAD) :
{
*(.sbss) *(.scommon)
*(.dynbss)
*(.bss)
*(COMMON)
. = ALIGN(4);
}
_end = . ;
PROVIDE (end = .);
}

View File

@@ -1,151 +0,0 @@
/*
* (C) Copyright 2000-2004
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
OUTPUT_ARCH(powerpc)
/* Do we need any of these for elf?
__DYNAMIC = 0; */
SECTIONS
{
.resetvec 0xFFFFFFFC :
{
*(.resetvec)
} = 0xffff
/* Read-only sections, merged into text segment: */
. = + SIZEOF_HEADERS;
.interp : { *(.interp) }
.hash : { *(.hash) }
.dynsym : { *(.dynsym) }
.dynstr : { *(.dynstr) }
.rel.text : { *(.rel.text) }
.rela.text : { *(.rela.text) }
.rel.data : { *(.rel.data) }
.rela.data : { *(.rela.data) }
.rel.rodata : { *(.rel.rodata) }
.rela.rodata : { *(.rela.rodata) }
.rel.got : { *(.rel.got) }
.rela.got : { *(.rela.got) }
.rel.ctors : { *(.rel.ctors) }
.rela.ctors : { *(.rela.ctors) }
.rel.dtors : { *(.rel.dtors) }
.rela.dtors : { *(.rela.dtors) }
.rel.bss : { *(.rel.bss) }
.rela.bss : { *(.rela.bss) }
.rel.plt : { *(.rel.plt) }
.rela.plt : { *(.rela.plt) }
.init : { *(.init) }
.plt : { *(.plt) }
.text :
{
/* WARNING - the following is hand-optimized to fit within */
/* the sector layout of our flash chips! XXX FIXME XXX */
cpu/ppc4xx/start.o (.text)
board/csb272/init.o (.text)
cpu/ppc4xx/kgdb.o (.text)
cpu/ppc4xx/traps.o (.text)
cpu/ppc4xx/interrupts.o (.text)
cpu/ppc4xx/4xx_uart.o (.text)
cpu/ppc4xx/cpu_init.o (.text)
cpu/ppc4xx/speed.o (.text)
drivers/net/4xx_enet.o (.text)
common/dlmalloc.o (.text)
lib_generic/crc32.o (.text)
lib_ppc/extable.o (.text)
lib_ppc/board.o (.text)
lib_generic/zlib.o (.text)
/* . = env_offset;*/
/* common/env_embedded.o(.text)*/
*(.text)
*(.got1)
}
_etext = .;
PROVIDE (etext = .);
.rodata :
{
*(.eh_frame)
*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }
.dtors : { *(.dtors) }
/* Read-write section, merged into data segment: */
. = (. + 0x00FF) & 0xFFFFFF00;
_erotext = .;
PROVIDE (erotext = .);
.reloc :
{
*(.got)
_GOT2_TABLE_ = .;
*(.got2)
_FIXUP_TABLE_ = .;
*(.fixup)
}
__got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
__fixup_entries = (. - _FIXUP_TABLE_)>>2;
.data :
{
*(.data)
*(.data1)
*(.sdata)
*(.sdata2)
*(.dynamic)
CONSTRUCTORS
}
_edata = .;
PROVIDE (edata = .);
. = .;
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
. = .;
__start___ex_table = .;
__ex_table : { *(__ex_table) }
__stop___ex_table = .;
. = ALIGN(256);
__init_begin = .;
.text.init : { *(.text.init) }
.data.init : { *(.data.init) }
. = ALIGN(256);
__init_end = .;
__bss_start = .;
.bss (NOLOAD) :
{
*(.sbss) *(.scommon)
*(.dynbss)
*(.bss)
*(COMMON)
. = ALIGN(4);
}
_end = . ;
PROVIDE (end = .);
}

View File

@@ -1,151 +0,0 @@
/*
* (C) Copyright 2000-2004
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
OUTPUT_ARCH(powerpc)
/* Do we need any of these for elf?
__DYNAMIC = 0; */
SECTIONS
{
.resetvec 0xFFFFFFFC :
{
*(.resetvec)
} = 0xffff
/* Read-only sections, merged into text segment: */
. = + SIZEOF_HEADERS;
.interp : { *(.interp) }
.hash : { *(.hash) }
.dynsym : { *(.dynsym) }
.dynstr : { *(.dynstr) }
.rel.text : { *(.rel.text) }
.rela.text : { *(.rela.text) }
.rel.data : { *(.rel.data) }
.rela.data : { *(.rela.data) }
.rel.rodata : { *(.rel.rodata) }
.rela.rodata : { *(.rela.rodata) }
.rel.got : { *(.rel.got) }
.rela.got : { *(.rela.got) }
.rel.ctors : { *(.rel.ctors) }
.rela.ctors : { *(.rela.ctors) }
.rel.dtors : { *(.rel.dtors) }
.rela.dtors : { *(.rela.dtors) }
.rel.bss : { *(.rel.bss) }
.rela.bss : { *(.rela.bss) }
.rel.plt : { *(.rel.plt) }
.rela.plt : { *(.rela.plt) }
.init : { *(.init) }
.plt : { *(.plt) }
.text :
{
/* WARNING - the following is hand-optimized to fit within */
/* the sector layout of our flash chips! XXX FIXME XXX */
cpu/ppc4xx/start.o (.text)
board/csb472/init.o (.text)
cpu/ppc4xx/kgdb.o (.text)
cpu/ppc4xx/traps.o (.text)
cpu/ppc4xx/interrupts.o (.text)
cpu/ppc4xx/4xx_uart.o (.text)
cpu/ppc4xx/cpu_init.o (.text)
cpu/ppc4xx/speed.o (.text)
drivers/net/4xx_enet.o (.text)
common/dlmalloc.o (.text)
lib_generic/crc32.o (.text)
lib_ppc/extable.o (.text)
lib_ppc/board.o (.text)
lib_generic/zlib.o (.text)
/* . = env_offset;*/
/* common/env_embedded.o(.text)*/
*(.text)
*(.got1)
}
_etext = .;
PROVIDE (etext = .);
.rodata :
{
*(.eh_frame)
*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }
.dtors : { *(.dtors) }
/* Read-write section, merged into data segment: */
. = (. + 0x00FF) & 0xFFFFFF00;
_erotext = .;
PROVIDE (erotext = .);
.reloc :
{
*(.got)
_GOT2_TABLE_ = .;
*(.got2)
_FIXUP_TABLE_ = .;
*(.fixup)
}
__got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
__fixup_entries = (. - _FIXUP_TABLE_)>>2;
.data :
{
*(.data)
*(.data1)
*(.sdata)
*(.sdata2)
*(.dynamic)
CONSTRUCTORS
}
_edata = .;
PROVIDE (edata = .);
. = .;
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
. = .;
__start___ex_table = .;
__ex_table : { *(__ex_table) }
__stop___ex_table = .;
. = ALIGN(256);
__init_begin = .;
.text.init : { *(.text.init) }
.data.init : { *(.data.init) }
. = ALIGN(256);
__init_end = .;
__bss_start = .;
.bss (NOLOAD) :
{
*(.sbss) *(.scommon)
*(.dynbss)
*(.bss)
*(COMMON)
. = ALIGN(4);
}
_end = . ;
PROVIDE (end = .);
}

View File

@@ -23,8 +23,12 @@
#include <common.h>
#include <asm/arch/AT91RM9200.h>
#include <netdev.h>
#include <asm/io.h>
#if defined(CONFIG_DRIVER_ETHER)
#include <at91rm9200_net.h>
#include <bcm5221.h>
#endif
DECLARE_GLOBAL_DATA_PTR;
@@ -79,3 +83,12 @@ void at91rm9200_GetPhyInterface(AT91PS_PhyOps p_phyops)
#endif
#endif /* CONFIG_DRIVER_ETHER */
#ifdef CONFIG_DRIVER_AT91EMAC
int board_eth_init(bd_t *bis)
{
int rc = 0;
rc = at91emac_register(bis, 0);
return rc;
}
#endif

View File

@@ -25,6 +25,7 @@
*/
#include <common.h>
#include <netdev.h>
#include <asm/hardware.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -125,3 +126,14 @@ int dram_init (void)
return (0);
}
#ifdef CONFIG_CMD_NET
int board_eth_init(bd_t *bis)
{
int rc = 0;
#ifdef CONFIG_LAN91C96
rc = lan91c96_initialize(0, CONFIG_LAN91C96_BASE);
#endif
return rc;
}
#endif

View File

@@ -33,9 +33,6 @@ DECLARE_GLOBAL_DATA_PTR;
/* ------------------------------------------------------------------------- */
/* Prototypes */
int gunzip(void *, int, unsigned char *, unsigned long *);
int board_early_init_f (void)
{
out32(GPIO0_OR, CONFIG_SYS_NAND0_CE); /* set initial outputs */

View File

@@ -1,153 +0,0 @@
/*
* (C) Copyright 2000
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
OUTPUT_ARCH(powerpc)
/* Do we need any of these for elf?
__DYNAMIC = 0; */
SECTIONS
{
.resetvec 0xFFFFFFFC :
{
*(.resetvec)
} = 0xffff
/* Read-only sections, merged into text segment: */
. = + SIZEOF_HEADERS;
.interp : { *(.interp) }
.hash : { *(.hash) }
.dynsym : { *(.dynsym) }
.dynstr : { *(.dynstr) }
.rel.text : { *(.rel.text) }
.rela.text : { *(.rela.text) }
.rel.data : { *(.rel.data) }
.rela.data : { *(.rela.data) }
.rel.rodata : { *(.rel.rodata) }
.rela.rodata : { *(.rela.rodata) }
.rel.got : { *(.rel.got) }
.rela.got : { *(.rela.got) }
.rel.ctors : { *(.rel.ctors) }
.rela.ctors : { *(.rela.ctors) }
.rel.dtors : { *(.rel.dtors) }
.rela.dtors : { *(.rela.dtors) }
.rel.bss : { *(.rel.bss) }
.rela.bss : { *(.rela.bss) }
.rel.plt : { *(.rel.plt) }
.rela.plt : { *(.rela.plt) }
.init : { *(.init) }
.plt : { *(.plt) }
.text :
{
/* WARNING - the following is hand-optimized to fit within */
/* the sector layout of our flash chips! XXX FIXME XXX */
cpu/ppc4xx/start.o (.text)
cpu/ppc4xx/traps.o (.text)
cpu/ppc4xx/interrupts.o (.text)
cpu/ppc4xx/4xx_uart.o (.text)
cpu/ppc4xx/cpu_init.o (.text)
cpu/ppc4xx/speed.o (.text)
drivers/net/4xx_enet.o (.text)
common/dlmalloc.o (.text)
lib_generic/crc32.o (.text)
lib_ppc/extable.o (.text)
lib_generic/zlib.o (.text)
*(.text)
*(.got1)
}
_etext = .;
PROVIDE (etext = .);
.rodata :
{
*(.eh_frame)
*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }
.dtors : { *(.dtors) }
/* Read-write section, merged into data segment: */
. = (. + 0x00FF) & 0xFFFFFF00;
_erotext = .;
PROVIDE (erotext = .);
.reloc :
{
*(.got)
_GOT2_TABLE_ = .;
*(.got2)
_FIXUP_TABLE_ = .;
*(.fixup)
}
__got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
__fixup_entries = (. - _FIXUP_TABLE_)>>2;
.data :
{
*(.data)
*(.data1)
*(.sdata)
*(.sdata2)
*(.dynamic)
CONSTRUCTORS
}
_edata = .;
PROVIDE (edata = .);
. = .;
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
. = .;
__start___ex_table = .;
__ex_table : { *(__ex_table) }
__stop___ex_table = .;
. = ALIGN(256);
__init_begin = .;
.text.init : { *(.text.init) }
.data.init : { *(.data.init) }
. = ALIGN(256);
__init_end = .;
__bss_start = .;
.bss (NOLOAD) :
{
*(.sbss) *(.scommon)
*(.dynbss)
*(.bss)
*(COMMON)
. = ALIGN(4);
}
ppcenv_assert = ASSERT(. < 0xFFFF8000, ".bss section too big, overlaps .ppcenv section. Please update your confguration: CONFIG_SYS_MONITOR_BASE, CONFIG_SYS_MONITOR_LEN and TEXT_BASE may need to be modified.");
. = 0xFFFF8000;
.ppcenv :
{
common/env_embedded.o(.ppcenv);
}
_end = . ;
PROVIDE (end = .);
}

View File

@@ -196,6 +196,5 @@ int checkboard (void)
void ft_board_setup(void *blob, bd_t *bd)
{
ft_cpu_setup(blob, bd);
fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize);
}
#endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */

View File

@@ -1,6 +1,7 @@
/*
* Miscelaneous DaVinci functions.
*
* Copyright (C) 2009 Nick Thompson, GE Fanuc Ltd, <nick.thompson@gefanuc.com>
* Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
* Copyright (C) 2008 Lyrtech <www.lyrtech.com>
* Copyright (C) 2004 Texas Instruments.
@@ -27,7 +28,8 @@
#include <i2c.h>
#include <net.h>
#include <asm/arch/hardware.h>
#include <asm/io.h>
#include "misc.h"
DECLARE_GLOBAL_DATA_PTR;
@@ -109,3 +111,78 @@ void dv_configure_mac_address(uint8_t *rom_enetaddr)
}
#endif /* DAVINCI_EMAC */
/*
* Change the setting of a pin multiplexer field.
*
* Takes an array of pinmux settings similar to:
*
* struct pinmux_config uart_pins[] = {
* { &davinci_syscfg_regs->pinmux[8], 2, 7 },
* { &davinci_syscfg_regs->pinmux[9], 2, 0 }
* };
*
* Stepping through the array, each pinmux[n] register has the given value
* set in the pin mux field specified.
*
* The number of pins in the array must be passed (ARRAY_SIZE can provide
* this value conveniently).
*
* Returns 0 if all field numbers and values are in the correct range,
* else returns -1.
*/
int davinci_configure_pin_mux(const struct pinmux_config *pins,
const int n_pins)
{
int i;
/* check for invalid pinmux values */
for (i = 0; i < n_pins; i++) {
if (pins[i].field >= PIN_MUX_NUM_FIELDS ||
(pins[i].value & ~PIN_MUX_FIELD_MASK) != 0)
return -1;
}
/* configure the pinmuxes */
for (i = 0; i < n_pins; i++) {
const int offset = pins[i].field * PIN_MUX_FIELD_SIZE;
const unsigned int value = pins[i].value << offset;
const unsigned int mask = PIN_MUX_FIELD_MASK << offset;
const dv_reg *mux = pins[i].mux;
writel(value | (readl(mux) & (~mask)), mux);
}
return 0;
}
/*
* Configure multiple pinmux resources.
*
* Takes an pinmux_resource array of pinmux_config and pin counts:
*
* const struct pinmux_resource pinmuxes[] = {
* PINMUX_ITEM(uart_pins),
* PINMUX_ITEM(i2c_pins),
* };
*
* The number of items in the array must be passed (ARRAY_SIZE can provide
* this value conveniently).
*
* Each item entry is configured in the defined order. If configuration
* of any item fails, -1 is returned and none of the following items are
* configured. On success, 0 is returned.
*/
int davinci_configure_pin_mux_items(const struct pinmux_resource *item,
const int n_items)
{
int i;
for (i = 0; i < n_items; i++) {
if (davinci_configure_pin_mux(item[i].pins,
item[i].n_pins) != 0)
return -1;
}
return 0;
}

View File

@@ -22,8 +22,33 @@
#ifndef __MISC_H
#define __MISC_H
/* pin muxer definitions */
#define PIN_MUX_NUM_FIELDS 8 /* Per register */
#define PIN_MUX_FIELD_SIZE 4 /* n in bits */
#define PIN_MUX_FIELD_MASK ((1 << PIN_MUX_FIELD_SIZE) - 1)
/* pin definition */
struct pinmux_config {
dv_reg *mux; /* Address of mux register */
unsigned char value; /* Value to set in field */
unsigned char field; /* field number */
};
/* pin table definition */
struct pinmux_resource {
const struct pinmux_config *pins;
const int n_pins;
};
#define PINMUX_ITEM(item) { \
.pins = item, \
.n_pins = ARRAY_SIZE(item) \
}
int dvevm_read_mac_address(uint8_t *buf);
void dv_configure_mac_address(uint8_t *rom_enetaddr);
int davinci_configure_pin_mux(const struct pinmux_config *pins, int n_pins);
int davinci_configure_pin_mux_items(const struct pinmux_resource *item,
int n_items);
#endif /* __MISC_H */

View File

@@ -0,0 +1,51 @@
#
# (C) Copyright 2000, 2001, 2002
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
#
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
include $(TOPDIR)/config.mk
LIB = $(obj)lib$(BOARD).a
COBJS := da830evm.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS))
SOBJS := $(addprefix $(obj),$(SOBJS))
$(LIB): $(obj).depend $(OBJS) $(SOBJS)
$(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
clean:
rm -f $(SOBJS) $(OBJS)
distclean: clean
rm -f $(LIB) core *.bak *~ .depend
#########################################################################
# This is for $(obj).depend target
include $(SRCTREE)/rules.mk
sinclude $(obj).depend
#########################################################################

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