Prepare v2010.03

Signed-off-by: Wolfgang Denk <wd@denx.de>

CHANGELOG

@@ -1,3 +1,460 @@
+commit 8e64d6efd8d778a5f83d8bff9cd273a86dcc182f
+Author: Heiko Schocher <hs@denx.de>
+Date:	Wed Mar 31 08:34:51 2010 +0200
+
+    net, doc: How to setup MAC address correctly
+
+    As this seems unclear, document how the flow of setting up
+    the MAC address is correct.
+
+    Signed-off-by: Heiko Schocher <hs@denx.de>
+
+    Text changed slightly, adding input from Mike Frysinger.
+
+    Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit b78b48c6a0c34b2991e31fc4548aaf773d34f2b3
+Author: Heiko Schocher <hs@denx.de>
+Date:	Wed Mar 31 08:34:46 2010 +0200
+
+    net, fec_mxc: only setup the device enetaddr with eeprom value
+
+    Only fill the device enetaddr with the contents of the eeprom,
+    do not program it in MAC address registers
+
+    Signed-off-by: Heiko Schocher <hs@denx.de>
+    Acked-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit d5a64237d58ded31c2eed455c7a346e1c85f5565
+Author: Felix Radensky <felix@embedded-sol.com>
+Date:	Tue Mar 30 15:02:13 2010 +0300
+
+    doc: Fix ramdisk examples in doc/uImage.FIT/multi.its
+
+    The ramdisk sections in doc/uImage.FIT/multi.its lack
+    load address and entry point properties. Using examples
+    from this file will result in unbootable image, u-boot
+    will issue the following error messages:
+
+    Can't get ramdisk subimage load address!
+    Ramdisk image is corrupt or invalid
+
+    This patch adds missing properties to ramdisk sections.
+
+    Signed-off-by: Felix Radensky <felix@embedded-sol.com>
+
+commit 2d2018f3db5ed834bc1ee208a2c6212fdf00bca1
+Author: Heiko Schocher <heiko.schocher@invitel.hu>
+Date:	Wed Mar 24 13:22:50 2010 +0100
+
+    jffs2, suen3: Fix compiler warning
+
+    $ ./MAKEALL suen3
+    jffs2_1pass.c: In function 'get_fl_mem':
+    jffs2_1pass.c:399: warning: unused variable 'id'
+    jffs2_1pass.c: In function 'get_node_mem':
+    jffs2_1pass.c:423: warning: unused variable 'id'
+
+    Signed-off-by: Heiko Schocher <hs@denx.de>
+    Tested-by: Tom <Tom.Rix@windriver.com>
+
+commit 9ff32d8ccf0e23b5577c25610f001af8d761b4a2
+Author: Timur Tabi <timur@freescale.com>
+Date:	Mon Mar 29 12:51:07 2010 -0500
+
+    mpc86xx: set the DDR BATs after calculating true DDR size
+
+    After determining how much DDR is actually in the system, set DBAT0 and
+    IBAT0 accordingly.	This ensures that the CPU won't attempt to access
+    (via speculation) addresses outside of actual memory.
+
+    On 86xx systems, DBAT0 and IBAT0 (the BATs for DDR) are initialized to 2GB
+    and kept that way.	If the system has less than 2GB of memory (typical for
+    an MPC8610 HPCD), the CPU may attempt to access this memory during
+    speculation.  The zlib code is notorious for generating such memory reads,
+    and indeed on the MPC8610, uncompressing the Linux kernel causes a machine
+    check (without this patch).
+
+    Currently we are limited to power of two sized DDR since we only use a
+    single bat.  If a non-power of two size is used that is less than
+    CONFIG_MAX_MEM_MAPPED u-boot will crash.
+
+    Signed-off-by: Timur Tabi <timur@freescale.com>
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 33f57bd553edf29dffef5a6c7d76e169c79a6049
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date:	Fri Mar 26 15:14:43 2010 -0500
+
+    85xx: Fix enabling of L1 cache parity on secondary cores
+
+    Use the same code between primary and secondary cores to init the
+    L1 cache.  We were not enabling cache parity on the secondary cores.
+
+    Also, reworked the L1 cache init code to match the e500mc L2 init code
+    that first invalidates the cache and locks.  Than enables the cache and
+    makes sure its enabled before continuing.
+
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 1a332da61df9c38b567359af114daeaaaefaead8
+Author: Stefan Roese <sr@denx.de>
+Date:	Mon Mar 29 15:30:46 2010 +0200
+
+    ppc4xx: Fix problem with I2C bus >= 1 initialization
+
+    This patch fixes a problem introduced with patch eb5eb2b0
+    [ppc4xx: Cleanup PPC4xx I2C infrastructure]. We need to assign the I2C
+    base address to the "i2c" pointer inside of the controller loop.
+    Otherwise controller 0 is initialized multiple times instead of
+    initializing each I2C controller sequentially.
+
+    Tested on Katmai.
+
+    Signed-off-by: Stefan Roese <sr@denx.de>
+    Acked-by: Heiko Schocher <hs@denx.de>
+
+commit 24de2f4be00f81c58270d0df47296bf3a3601cef
+Author: Heiko Schocher <hs@denx.de>
+Date:	Mon Mar 29 13:15:48 2010 +0200
+
+    bootm, linux: fix booting Multi-File Image with "kernel+ramdisk+fdt"
+
+    Booting a "Multi-File Image" including a linux kernel, ramdisk and
+    fdt, generated with
+
+    mkimage -A ppc \
+	-O linux \
+	-T multi \
+	-C gzip \
+	-a 00000000 \
+	-e 00000000 \
+	-n "kernel-2.6+initrd+dtb" \
+	-d "vmlinux.bin.gz:ramdisk_image.gz:board.dtb" \
+	multi.bin
+
+    actually fails, because ramdisk start and end addresses
+    didn;t get initialized. This patch fixes this issue.
+
+    Tested on the KUP4K board.
+
+    Signed-off-by: Heiko Schocher <hs@denx.de>
+
+commit 2883cc2d48e99fd1873ef8af03fee7966611b735
+Author: Wolfgang Denk <wd@denx.de>
+Date:	Sun Mar 28 00:25:14 2010 +0100
+
+    Prepare 2010.03-rc3
+
+    Update CHANGELOG
+
+    Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 060f28532b09dd3d2c78423bdd809ac768a27629
+Author: Wolfgang Denk <wd@denx.de>
+Date:	Thu Mar 25 14:07:23 2010 +0100
+
+    cmd_usb.c: print debug messages only when DEBUG is defined
+
+    Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit a574cff121b1479c8e962b7a2a29310020387260
+Author: Wolfgang Denk <wd@denx.de>
+Date:	Wed Mar 24 12:19:19 2010 +0100
+
+    ml300: remove support for broken, orphaned board
+
+    The ml300 board has a number of issues, but nobody cares about this
+    long-orphaned board any more.  Remove it.
+
+    Signed-off-by: Wolfgang Denk <wd@denx.de>
+    Acked-by: Michal Simek <monstr@monstr.eu>
+
+commit 04387d24a17b1ee13024dd4779da4b84d47c65cc
+Author: Wolfgang Denk <wd@denx.de>
+Date:	Sat Mar 27 23:37:46 2010 +0100
+
+    mkimage: fix Segmentation Fault when run without "-n name" option
+
+    The restructuring of the mkimage command in commit 89a4d6b1 ("tools:
+    mkimage: split code into core, default and FIT image specific")
+    introduced a bug that caused mkimage to segfault when run without
+    "-n name" option.  Initialize the imagename entry to prevent that.
+
+    Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit c40c94a3d20a8616264c2dfcda85279185d69aeb
+Author: Renato Andreola <renato.andreola@imagos.it>
+Date:	Wed Mar 24 23:00:47 2010 +0800
+
+    cfi_flash: precision and underflow problem in tout calculation
+
+    With old configuration it could happen tout=0 if CONFIG_SYS_HZ<1000.
+
+    Signed-off-by: Renato Andreola <renato.andreola@imagos.it>
+    Signed-off-by: Alessandro Rubini <rubini@gnudd.com>
+    Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
+    Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit c550afada5fcad426aa6a219a329feb9eedae8b2
+Author: Rupjyoti Sarmah <rsarmah@appliedmicro.com>
+Date:	Wed Mar 24 16:52:02 2010 +0530
+
+    ppc4xx fix unstable 440EPx bootstrap options
+
+    440EPx fixed bootstrap options A, B, D, and E sets PLL FWDVA to a value = 1.
+    This results in the PLLOUTB being greater than the CPU clock frequency
+    resulting unstable 440EPx operation resulting in various software hang
+    conditions.
+
+    This patch reprograms the FWDVA satisfying the requirement of setting FWDVB
+    to a value greater than 1 while using one of the four deafult bootstrap options.
+
+    Signed-off-by: Rupjyoti Sarmah <rsarmah@amcc.com>
+    Acked-by : Victor Gallardo <vgallardo@appliedmicro.com>
+    Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit fb508b8b39a52a4063d098f5a9b4355bc5b30c14
+Author: Matthias Fuchs <matthias.fuchs@esd.eu>
+Date:	Wed Mar 24 10:16:20 2010 +0100
+
+    at91: Get rid of some warnings when building for otc570
+
+    The soft-i2c code for AT91 defines I2C_SOFT_DECLARATIONS
+    for direct access by dereferencing a pio pointer.
+    The OTC570 platform uses the AT91 gpio API so it does not
+    need the pio variable.
+
+    Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
+
+commit acb13868936a28502782a16e1edaec378e494a29
+Author: Alessandro Rubini <rubini@unipv.it>
+Date:	Sat Mar 13 17:44:08 2010 +0100
+
+    lcd: make 16bpp work
+
+    Support for 16bpp was supposed to be in the code but was not working.
+    This makes it work and has been tested in the nhk8815 board.
+
+    Signed-off-by: Alessandro Rubini <rubini@unipv.it>
+    Acked-by: Andrea Gallo <andrea.gallo@stericsson.com>
+    Signed-off-by: Anatolij Gustschin <agust@denx.de>
+
+commit 152dda3d94e97ede7af3f9560a59a659384d4585
+Author: Wolfgang Denk <wd@denx.de>
+Date:	Mon Mar 22 23:25:00 2010 +0100
+
+    Prepare v2010.03-rc2
+
+    Update CHANGELOG
+
+    Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit d650da2dd4af99967aabc43cccbd8f160eb4cea6
+Author: Matthias Kaehlcke <matthias@kaehlcke.net>
+Date:	Tue Mar 9 22:13:33 2010 +0100
+
+    ep93xx timer: Fix resolution of get_ticks()
+
+    ep93xx timer: Make get_ticks() return a value in CONFIG_SYS_HZ resolution,
+    as announced by get_tbclk()
+
+    Signed-off-by: Matthias Kaehlcke <matthias@kaehlcke.net>
+
+commit 7e67fb5bf27a07d3b8d6b97c76f7195f7d68af58
+Author: Matthias Kaehlcke <matthias@kaehlcke.net>
+Date:	Tue Mar 9 22:13:20 2010 +0100
+
+    ep93xx timer: Fix possible overflow in usecs_to_ticks()
+
+    ep93xx timer: Use 64-bit values in usecs_to_ticks() in order to avoid
+    overflows in intermediate values
+
+    Signed-off-by: Matthias Kaehlcke <matthias@kaehlcke.net>
+
+commit daa989b47297c9f73426783599c286ef3a1f3f49
+Author: Asen Dimov <dimov@ronetix.at>
+Date:	Thu Mar 18 13:41:47 2010 +0200
+
+    correct a syntax typo in at91_matrix.h
+
+    Signed-off-by: Asen Dimov <dimov@ronetix.at>
+
+commit 322ff395c9aec7b87a2211fe4333fdf44377c564
+Author: Jeff Angielski <jeff@theptrgroup.com>
+Date:	Wed Mar 17 15:09:26 2010 -0400
+
+    env: fix endian ordering in crc table
+
+    The crc table was being built as little endian for big endian
+    targets.  This would cause fw_printenv to always fail with
+    "Warning: Bad CRC, using default environment" messages.
+
+    Signed-off-by: Jeff Angielski <jeff@theptrgroup.com>
+    Acked-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
+
+commit 51c2ac9bb574c1420b993615268392b0c1f829f6
+Author: Anatolij Gustschin <agust@denx.de>
+Date:	Tue Mar 16 17:10:08 2010 +0100
+
+    mpc5121: cpu/mpc512x/diu.c: fix warnings
+
+    Fix warnings while compiling with CONFIG_VIDEO enabled:
+
+    diu.c: In function 'video_hw_init':
+    diu.c:158: warning: 'return' with no value, in function returning non-void
+    diu.c:162: warning: format '%ld' expects type 'long int', but argument 6 has type 'int'
+    diu.c:162: warning: format '%ld' expects type 'long int', but argument 7 has type 'int'
+
+    Signed-off-by: Anatolij Gustschin <agust@denx.de>
+
+commit a74908161a1b37d780d3a826a86807bbc50a3857
+Author: Anatolij Gustschin <agust@denx.de>
+Date:	Tue Mar 16 15:29:33 2010 +0100
+
+    console.c: fix problem with splashimage
+
+    If a board uses cfb_console driver and splash image
+    and also defines CONFIG_SILENT_CONSOLE, the user is
+    locked out even if "silent" is not set. It is not
+    possible to get any output, neither on vga console
+    device nor on serial console after redirecting the
+    output to the serial console, since the GD_FLG_SILENT
+    flag remains set.
+
+    Fix the problem by redirecting the output from frame
+    buffer to serial console if splashimage is used.
+    Only suppress the output if "silent" environment
+    variable was set and don't set the GD_FLG_SILENT
+    flag arbitrarily.
+
+    Signed-off-by: Anatolij Gustschin <agust@denx.de>
+
+commit 5647f78d04174b0b99857d2a7cbf25141bd14a45
+Author: Thomas Weber <swirl@gmx.li>
+Date:	Sat Mar 13 23:14:45 2010 +0100
+
+    mod change 755 => 644 for multiple files
+
+    I executed 'find . -name "*.[chS]" -perm 755 -exec chmod 644 {} \;'
+
+    Signed-off-by: Thomas Weber <swirl@gmx.li>
+    Add some more: neither Makefile nor config.mk need execute permissions.
+    Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 99c006a320ceb9ea19135ac1512e4a81e8bebb72
+Author: Stefano Babic <sbabic@denx.de>
+Date:	Sat Mar 13 21:09:00 2010 +0100
+
+    mxcmmc: fix warnings due to access 32 bit registers with 16 bit accessors
+
+    Some registers of the mxcmmc driver were accessed using
+    16 bit accessor functions, because only the LSB is
+    significant. This is not needed and generates
+    warnings.
+
+    Signed-off-by: Stefano Babic <sbabic@denx.de>
+
+commit c96f86eefc215b67dd222694ce2b6f60e6a42b0b
+Author: Wolfgang Denk <wd@denx.de>
+Date:	Sun Jan 17 23:55:53 2010 +0100
+
+    TFTP: allow for adjustable retransmission timout
+
+    So far, TFTP negotiated a fixed retransmission timeout of 5 seconds.
+    In some cases (busy networks, slow TFTP servers) this caused very
+    slow transfers. A new environment variable "tftptimeout" allows to
+    set this timeout. Lowering this value may make downloads succeed
+    faster in networks with high packet loss rates or with unreliable
+    TFTP servers.
+
+    Signed-off-by: Wolfgang Denk <wd@denx.de>
+    Cc: Ben Warren <biggerbadderben@gmail.com>
+    Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit 252b404d954f91499a4477a3e1064eb237ce5a1c
+Author: Wolfgang Denk <wd@denx.de>
+Date:	Tue Mar 9 14:27:25 2010 +0100
+
+    Fix PCI_BASE_ADDRESS_5 handling in pci_hose_config_device()
+
+    Signed-off-by: FUJITA Kazutoshi <fujita@soum.co.jp>
+    Signed-off-by: <wd@denx.de>
+    Acked-by: Stefan Roese <sr@denx.de>
+
+commit 9d90a93d367272ee65550c0c9f82615cec967c70
+Author: Frans Meulenbroeks <fransmeulenbroeks@gmail.com>
+Date:	Thu Feb 25 14:03:08 2010 +0100
+
+    cmd_mmc remove \n
+
+    This patch removes the \n after the help message for mmcinfo.
+    This resulted in an empty line being displayed after the mmcinfo line
+    when the help command was given.
+
+    Signed-off-by: Frans Meulenbroeks <fransmeulenbroeks@gmail.com>
+
+commit 67c7189dd35cb368ef665126fd17816581bd2e92
+Author: Renato Andreola <renato.andreola@imagos.it>
+Date:	Tue Mar 16 16:01:29 2010 -0400
+
+    nios2: Added support to YANU UART
+
+    Signed-off-by: Scott McNutt <smcnutt@psyent.com>
+
+commit 1e67fb32fbdae7949bb423c9e20b3f77c0a61663
+Author: Thomas Chou <thomas@wytron.com.tw>
+Date:	Tue Mar 16 12:12:48 2010 -0400
+
+    nios2: use generic unaligned.h
+
+    Signed-off-by: Scott McNutt <smcnutt@psyent.com>
+
+commit 05022629a2ca6c385dc390d32c20aa27cf5d915a
+Author: Mike Frysinger <vapier@gentoo.org>
+Date:	Thu Jan 21 05:01:15 2010 -0500
+
+    asm-blackfin/unaligned.h: add for zlib code
+
+    The new zlib code wants asm/unaligned.h, so have the Blackfin version pull
+    in the asm-generic/unaligned.h.
+
+    Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit 3adc1fda38a6aacd4aaf3c2c9cc62a1e69e6de17
+Author: Mike Frysinger <vapier@gentoo.org>
+Date:	Thu Jan 21 05:01:14 2010 -0500
+
+    asm-generic/unaligned.h: dynamic default unaligned accesses
+
+    This is based on the asm-arm/unaligned.h, but made generic so all arches
+    that cannot do unaligned accesses can utilize it.
+
+    Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit be129aa71882421ad0b50cd3762915d10ace27ad
+Author: Matthias Weisser <matthias.weisser@graf-syteco.de>
+Date:	Tue Jan 12 12:06:31 2010 +0100
+
+    video: Fix console display when splashscreen is used
+
+    If a splashscreen is used the console scrolling used the
+    scroll size as needed when a logo was displayed. This
+    patch sets the scroll size to the whole screen if
+    a splashscreen is shown.
+
+    Signed-off-by: Matthias Weisser <matthias.weisser@graf-syteco.de>
+
+commit 93910edb595a88d394da3eb2cf5148096155dfe9
+Author: Wolfgang Denk <wd@denx.de>
+Date:	Fri Mar 12 23:06:04 2010 +0100
+
+    Prepare v2010.03-rc1
+
+    Coding style cleanup, update CHANGELOG.
+
+    Signed-off-by: Wolfgang Denk <wd@denx.de>
+
 commit 4e72fb15c9073129e05820cc9c54f54bc4985835
 Author: Wolfgang Denk <wd@denx.de>
 Date:	Fri Mar 12 22:11:00 2010 +0100

MAKEALL

@@ -238,7 +238,6 @@ LIST_4xx="		\
 	MIP405		\
 	MIP405T		\
 	ML2		\
-	ml300		\
 	ml507		\
 	ml507_flash	\
 	neo		\

Makefile

@@ -24,7 +24,7 @@
 VERSION = 2010
 PATCHLEVEL = 03
 SUBLEVEL =
-EXTRAVERSION = -rc1
+EXTRAVERSION =
 ifneq "$(SUBLEVEL)" ""
 U_BOOT_VERSION = $(VERSION).$(PATCHLEVEL).$(SUBLEVEL)$(EXTRAVERSION)
 else
@@ -1435,9 +1435,6 @@ MIP405T_config:	unconfig
 ML2_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc ppc4xx ml2
 
-ml300_config:	unconfig
-	@$(MKCONFIG) $(@:_config=) ppc ppc4xx ml300 xilinx
-
 ml507_flash_config: unconfig
 	@mkdir -p $(obj)include $(obj)board/xilinx/ppc440-generic
 	@mkdir -p $(obj)include $(obj)board/xilinx/ml507

README

@@ -3005,7 +3005,9 @@ environment. As long as you don't save the environment you are
 working with an in-memory copy. In case the Flash area containing the
 environment is erased by accident, a default environment is provided.
 
-Some configuration options can be set using Environment Variables:
+Some configuration options can be set using Environment Variables.
+
+List of environment variables (most likely not complete):
 
   baudrate	- see CONFIG_BAUDRATE
 
@@ -3117,7 +3119,7 @@ Some configuration options can be set using Environment Variables:
 		  available network interfaces.
 		  It just stays at the currently selected interface.
 
-   netretry	- When set to "no" each network operation will
+  netretry	- When set to "no" each network operation will
 		  either succeed or fail without retrying.
 		  When set to "once" the network operation will
 		  fail when all the available network interfaces
@@ -3133,7 +3135,18 @@ Some configuration options can be set using Environment Variables:
   tftpdstport	- If this is set, the value is used for TFTP's UDP
 		  destination port instead of the Well Know Port 69.
 
-   vlan		- When set to a value < 4095 the traffic over
+  tftpblocksize - Block size to use for TFTP transfers; if not set,
+		  we use the TFTP server's default block size
+
+  tftptimeout	- Retransmission timeout for TFTP packets (in milli-
+		  seconds, minimum value is 1000 = 1 second). Defines
+		  when a packet is considered to be lost so it has to
+		  be retransmitted. The default is 5000 = 5 seconds.
+		  Lowering this value may make downloads succeed
+		  faster in networks with high packet loss rates or
+		  with unreliable TFTP servers.
+
+  vlan		- When set to a value < 4095 the traffic over
 		  Ethernet is encapsulated/received over 802.1q
 		  VLAN tagged frames.
 

board/freescale/mpc8610hpcd/mpc8610hpcd.c

@@ -127,6 +127,8 @@ initdram(int board_type)
 	dram_size = fixed_sdram();
 #endif
 
+	setup_ddr_bat(dram_size);
+
 	puts(" DDR: ");
 	return dram_size;
 }

board/freescale/mpc8641hpcn/mpc8641hpcn.c

@@ -74,6 +74,8 @@ initdram(int board_type)
 	dram_size = fixed_sdram();
 #endif
 
+	setup_ddr_bat(dram_size);
+
 	puts("    DDR: ");
 	return dram_size;
 }

board/xilinx/ml300/Makefile

@@ -1,70 +0,0 @@
-#
-# (C) Copyright 2000-2006
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-ifneq ($(OBJTREE),$(SRCTREE))
-$(shell mkdir -p $(obj)../common)
-$(shell mkdir -p $(obj)../xilinx_enet)
-$(shell mkdir -p $(obj)../xilinx_iic)
-endif
-
-INCS		:= -I../common -I../xilinx_enet -I../xilinx_iic
-CFLAGS		+= $(INCS)
-HOSTCFLAGS	+= $(INCS)
-
-LIB	= $(obj)lib$(BOARD).a
-
-COBJS	= $(BOARD).o \
-	  serial.o \
-	  ../xilinx_enet/emac_adapter.o  ../xilinx_enet/xemac.o \
-	  ../xilinx_enet/xemac_options.o ../xilinx_enet/xemac_polled.o \
-	  ../xilinx_enet/xemac_intr.o ../xilinx_enet/xemac_g.o \
-	  ../xilinx_enet/xemac_intr_dma.o ../xilinx_iic/iic_adapter.o \
-	  ../xilinx_iic/xiic_l.o ../common/xipif_v1_23_b.o \
-	  ../common/xbasic_types.o ../common/xdma_channel.o \
-	  ../common/xdma_channel_sg.o ../common/xpacket_fifo_v1_00_b.o \
-	  ../common/xversion.o \
-
-SOBJS	= init.o
-
-SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS	:= $(addprefix $(obj),$(COBJS))
-SOBJS	:= $(addprefix $(obj),$(SOBJS))
-
-$(LIB):	$(OBJS) $(SOBJS)
-	$(AR) $(ARFLAGS) $@ $^
-
-clean:
-	rm -f $(SOBJS) $(OBJS)
-
-distclean:	clean
-	rm -f $(LIB) core *.bak $(obj).depend
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################

board/xilinx/ml300/config.mk

@@ -1,32 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# esd ADCIOP boards
-#
-
-#TEXT_BASE = 0xFFFE0000
-TEXT_BASE = 0x04000000
-
-# Use board specific linker script
-LDSCRIPT := $(SRCTREE)/board/xilinx/ml300/u-boot.lds

board/xilinx/ml300/init.S

@@ -1,44 +0,0 @@
-/*
- * init.S: Stubs for U-Boot initialization
- *
- *     Author: Xilinx, Inc.
- *
- *
- *     This program is free software; you can redistribute it and/or modify it
- *     under the terms of the GNU General Public License as published by the
- *     Free Software Foundation; either version 2 of the License, or (at your
- *     option) any later version.
- *
- *
- *     XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" AS A
- *     COURTESY TO YOU. BY PROVIDING THIS DESIGN, CODE, OR INFORMATION AS
- *     ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, APPLICATION OR STANDARD,
- *     XILINX IS MAKING NO REPRESENTATION THAT THIS IMPLEMENTATION IS FREE
- *     FROM ANY CLAIMS OF INFRINGEMENT, AND YOU ARE RESPONSIBLE FOR OBTAINING
- *     ANY THIRD PARTY RIGHTS YOU MAY REQUIRE FOR YOUR IMPLEMENTATION.
- *     XILINX EXPRESSLY DISCLAIMS ANY WARRANTY WHATSOEVER WITH RESPECT TO
- *     THE ADEQUACY OF THE IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY
- *     WARRANTIES OR REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM
- *     CLAIMS OF INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND
- *     FITNESS FOR A PARTICULAR PURPOSE.
- *
- *
- *     Xilinx hardware products are not intended for use in life support
- *     appliances, devices, or systems. Use in such applications is
- *     expressly prohibited.
- *
- *
- *     (c) Copyright 2002-2004 Xilinx Inc.
- *     All rights reserved.
- *
- *
- *     You should have received a copy of the GNU General Public License along
- *     with this program; if not, write to the Free Software Foundation, Inc.,
- *     675 Mass Ave, Cambridge, MA 02139, USA.
- *
- *
- */
-
-	.globl ext_bus_cntlr_init
-ext_bus_cntlr_init:
-	blr

board/xilinx/ml300/ml300.c

@@ -1,128 +0,0 @@
-/*
- * ml300.c: U-Boot platform support for Xilinx ML300 board
- *
- *     Author: Xilinx, Inc.
- *
- *
- *     This program is free software; you can redistribute it and/or modify it
- *     under the terms of the GNU General Public License as published by the
- *     Free Software Foundation; either version 2 of the License, or (at your
- *     option) any later version.
- *
- *
- *     XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" AS A
- *     COURTESY TO YOU. BY PROVIDING THIS DESIGN, CODE, OR INFORMATION AS
- *     ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, APPLICATION OR STANDARD,
- *     XILINX IS MAKING NO REPRESENTATION THAT THIS IMPLEMENTATION IS FREE
- *     FROM ANY CLAIMS OF INFRINGEMENT, AND YOU ARE RESPONSIBLE FOR OBTAINING
- *     ANY THIRD PARTY RIGHTS YOU MAY REQUIRE FOR YOUR IMPLEMENTATION.
- *     XILINX EXPRESSLY DISCLAIMS ANY WARRANTY WHATSOEVER WITH RESPECT TO
- *     THE ADEQUACY OF THE IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY
- *     WARRANTIES OR REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM
- *     CLAIMS OF INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND
- *     FITNESS FOR A PARTICULAR PURPOSE.
- *
- *
- *     Xilinx hardware products are not intended for use in life support
- *     appliances, devices, or systems. Use in such applications is
- *     expressly prohibited.
- *
- *
- *     (c) Copyright 2002-2004 Xilinx Inc.
- *     All rights reserved.
- *
- *
- *     You should have received a copy of the GNU General Public License along
- *     with this program; if not, write to the Free Software Foundation, Inc.,
- *     675 Mass Ave, Cambridge, MA 02139, USA.
- *
- */
-
-#include <config.h>
-#include <common.h>
-#include <asm/processor.h>
-
-#ifdef CONFIG_ENV_IS_IN_EEPROM
-extern void convert_env(void);
-#endif
-
-int
-board_pre_init(void)
-{
-	return 0;
-}
-
-int
-checkboard(void)
-{
-	char tmp[64];		/* long enough for environment variables */
-	char *s, *e;
-	int i = getenv_r("L", tmp, sizeof (tmp));
-
-	if (i < 0) {
-		printf("### No HW ID - assuming ML300");
-	} else {
-		for (e = tmp; *e; ++e) {
-			if (*e == ' ')
-				break;
-		}
-
-		printf("### Board Serial# is ");
-
-		for (s = tmp; s < e; ++s) {
-			putc(*s);
-		}
-
-	}
-	putc('\n');
-
-	return (0);
-}
-
-phys_size_t
-initdram(int board_type)
-{
-	return 128 * 1024 * 1024;
-}
-
-int
-testdram(void)
-{
-	printf("test: xxx MB - ok\n");
-
-	return (0);
-}
-
-/* implement functions originally in cpu/ppc4xx/speed.c */
-void
-get_sys_info(sys_info_t * sysInfo)
-{
-	sysInfo->freqProcessor = XPAR_CORE_CLOCK_FREQ_HZ;
-
-	/* only correct if the PLB and OPB run at the same frequency */
-	sysInfo->freqPLB = XPAR_UARTNS550_0_CLOCK_FREQ_HZ;
-	sysInfo->freqPCI = XPAR_UARTNS550_0_CLOCK_FREQ_HZ / 3;
-}
-
-ulong
-get_PCI_freq(void)
-{
-	ulong val;
-	PPC4xx_SYS_INFO sys_info;
-
-	get_sys_info(&sys_info);
-	val = sys_info.freqPCI;
-	return val;
-}
-
-#ifdef CONFIG_MISC_INIT_R
-
-int
-misc_init_r()
-{
-	/* convert env name and value to u-boot standard */
-	convert_env();
-	return 0;
-}
-
-#endif

board/xilinx/ml300/serial.c

@@ -1,154 +0,0 @@
-/*
- *     Author: Xilinx, Inc.
- *
- *
- *     This program is free software; you can redistribute it and/or modify it
- *     under the terms of the GNU General Public License as published by the
- *     Free Software Foundation; either version 2 of the License, or (at your
- *     option) any later version.
- *
- *
- *     XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" AS A
- *     COURTESY TO YOU. BY PROVIDING THIS DESIGN, CODE, OR INFORMATION AS
- *     ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, APPLICATION OR STANDARD,
- *     XILINX IS MAKING NO REPRESENTATION THAT THIS IMPLEMENTATION IS FREE
- *     FROM ANY CLAIMS OF INFRINGEMENT, AND YOU ARE RESPONSIBLE FOR OBTAINING
- *     ANY THIRD PARTY RIGHTS YOU MAY REQUIRE FOR YOUR IMPLEMENTATION.
- *     XILINX EXPRESSLY DISCLAIMS ANY WARRANTY WHATSOEVER WITH RESPECT TO
- *     THE ADEQUACY OF THE IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY
- *     WARRANTIES OR REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM
- *     CLAIMS OF INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND
- *     FITNESS FOR A PARTICULAR PURPOSE.
- *
- *
- *     Xilinx hardware products are not intended for use in life support
- *     appliances, devices, or systems. Use in such applications is
- *     expressly prohibited.
- *
- *
- *     (c) Copyright 2002-2004 Xilinx Inc.
- *     All rights reserved.
- *
- *
- *     You should have received a copy of the GNU General Public License along
- *     with this program; if not, write to the Free Software Foundation, Inc.,
- *     675 Mass Ave, Cambridge, MA 02139, USA.
- *
- */
-
-#include <common.h>
-#include <asm/u-boot.h>
-#include <asm/processor.h>
-#include <command.h>
-#include <config.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-#define USE_CHAN1 \
-	((defined XPAR_UARTNS550_0_BASEADDR) && (defined CONFIG_SYS_INIT_CHAN1))
-#define USE_CHAN2 \
-	((defined XPAR_UARTNS550_1_BASEADDR) && (defined CONFIG_SYS_INIT_CHAN2))
-
-#if USE_CHAN1
-#include <ns16550.h>
-#endif
-
-#if USE_CHAN1
-const NS16550_t COM_PORTS[] = { (NS16550_t) (XPAR_UARTNS550_0_BASEADDR + 3)
-#if USE_CHAN2
-	    , (NS16550_t) (XPAR_UARTNS550_1_BASEADDR + 3)
-#endif
-};
-#endif
-
-int
-serial_init(void)
-{
-#if USE_CHAN1
-	int clock_divisor;
-
-	clock_divisor = XPAR_UARTNS550_0_CLOCK_FREQ_HZ / 16 / gd->baudrate;
-	(void) NS16550_init(COM_PORTS[0], clock_divisor);
-#if USE_CHAN2
-	clock_divisor = XPAR_UARTNS550_1_CLOCK_FREQ_HZ / 16 / gd->baudrate;
-	(void) NS16550_init(COM_PORTS[1], clock_divisor);
-#endif
-#endif
-	return 0;
-
-}
-
-void
-serial_putc(const char c)
-{
-	if (c == '\n')
-		NS16550_putc(COM_PORTS[CONFIG_SYS_DUART_CHAN], '\r');
-
-	NS16550_putc(COM_PORTS[CONFIG_SYS_DUART_CHAN], c);
-}
-
-int
-serial_getc(void)
-{
-	return NS16550_getc(COM_PORTS[CONFIG_SYS_DUART_CHAN]);
-}
-
-int
-serial_tstc(void)
-{
-	return NS16550_tstc(COM_PORTS[CONFIG_SYS_DUART_CHAN]);
-}
-
-void
-serial_setbrg(void)
-{
-#if USE_CHAN1
-	int clock_divisor;
-
-	clock_divisor = XPAR_UARTNS550_0_CLOCK_FREQ_HZ / 16 / gd->baudrate;
-	NS16550_reinit(COM_PORTS[0], clock_divisor);
-#if USE_CHAN2
-	clock_divisor = XPAR_UARTNS550_1_CLOCK_FREQ_HZ / 16 / gd->baudrate;
-	NS16550_reinit(COM_PORTS[1], clock_divisor);
-#endif
-#endif
-}
-
-void
-serial_puts(const char *s)
-{
-	while (*s) {
-		serial_putc(*s++);
-	}
-}
-
-#if defined(CONFIG_CMD_KGDB)
-void
-kgdb_serial_init(void)
-{
-}
-
-void
-putDebugChar(int c)
-{
-	serial_putc(c);
-}
-
-void
-putDebugStr(const char *str)
-{
-	serial_puts(str);
-}
-
-int
-getDebugChar(void)
-{
-	return serial_getc();
-}
-
-void
-kgdb_interruptible(int yes)
-{
-	return;
-}
-#endif

board/xilinx/ml300/u-boot.lds

@@ -1,146 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-ENTRY(_start)
-/* Do we need any of these for elf?
-   __DYNAMIC = 0;    */
-SECTIONS
-{
-  /* Read-only sections, merged into text segment: */
-  . = + SIZEOF_HEADERS;
-  .interp : { *(.interp) }
-  .hash          : { *(.hash)		}
-  .dynsym        : { *(.dynsym)		}
-  .dynstr        : { *(.dynstr)		}
-  .rel.text      : { *(.rel.text)		}
-  .rela.text     : { *(.rela.text)	}
-  .rel.data      : { *(.rel.data)		}
-  .rela.data     : { *(.rela.data)	}
-  .rel.rodata    : { *(.rel.rodata)	}
-  .rela.rodata   : { *(.rela.rodata)	}
-  .rel.got       : { *(.rel.got)		}
-  .rela.got      : { *(.rela.got)		}
-  .rel.ctors     : { *(.rel.ctors)	}
-  .rela.ctors    : { *(.rela.ctors)	}
-  .rel.dtors     : { *(.rel.dtors)	}
-  .rela.dtors    : { *(.rela.dtors)	}
-  .rel.bss       : { *(.rel.bss)		}
-  .rela.bss      : { *(.rela.bss)		}
-  .rel.plt       : { *(.rel.plt)		}
-  .rela.plt      : { *(.rela.plt)		}
-  .init          : { *(.init)	}
-  .plt : { *(.plt) }
-  .text      :
-  {
-    /* WARNING - the following is hand-optimized to fit within	*/
-    /* the sector layout of our flash chips!	XXX FIXME XXX	*/
-/*
-    cpu/ppc4xx/start.o	(.text)
-    board/xilinx/ml300/init.o	(.text)
-    cpu/ppc4xx/kgdb.o	(.text)
-    cpu/ppc4xx/traps.o	(.text)
-    cpu/ppc4xx/interrupts.o	(.text)
-    cpu/ppc4xx/4xx_uart.o	(.text)
-    cpu/ppc4xx/cpu_init.o	(.text)
-    cpu/ppc4xx/speed.o	(.text)
-    drivers/net/4xx_enet.o	(.text)
-    common/dlmalloc.o	(.text)
-    lib_generic/crc32.o		(.text)
-    lib_ppc/extable.o	(.text)
-    lib_generic/zlib.o		(.text)
-*/
-/*    . = env_offset;*/
-/*    common/env_embedded.o(.text)*/
-
-    *(.text)
-    *(.got1)
-  }
-  _etext = .;
-  PROVIDE (etext = .);
-  .rodata    :
-  {
-    *(.eh_frame)
-    *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
-  }
-  .fini      : { *(.fini)    } =0
-  .ctors     : { *(.ctors)   }
-  .dtors     : { *(.dtors)   }
-
-  /* Read-write section, merged into data segment: */
-  . = (. + 0x00FF) & 0xFFFFFF00;
-  _erotext = .;
-  PROVIDE (erotext = .);
-  .reloc   :
-  {
-    *(.got)
-    _GOT2_TABLE_ = .;
-    *(.got2)
-    _FIXUP_TABLE_ = .;
-    *(.fixup)
-  }
-  __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
-  __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
-  .data    :
-  {
-    *(.data)
-    *(.data1)
-    *(.sdata)
-    *(.sdata2)
-    *(.dynamic)
-    CONSTRUCTORS
-  }
-  _edata  =  .;
-  PROVIDE (edata = .);
-
-  . = .;
-  __u_boot_cmd_start = .;
-  .u_boot_cmd : { *(.u_boot_cmd) }
-  __u_boot_cmd_end = .;
-
-
-  . = .;
-  __start___ex_table = .;
-  __ex_table : { *(__ex_table) }
-  __stop___ex_table = .;
-
-  . = ALIGN(256);
-  __init_begin = .;
-  .text.init : { *(.text.init) }
-  .data.init : { *(.data.init) }
-  . = ALIGN(256);
-  __init_end = .;
-
-  __bss_start = .;
-  .bss (NOLOAD)       :
-  {
-   *(.sbss) *(.scommon)
-   *(.dynbss)
-   *(.bss)
-   *(COMMON)
-   . = ALIGN(4);
-  }
-  _end = . ;
-  PROVIDE (end = .);
-}

board/xilinx/ml300/u-boot.lds.debug

@@ -1,135 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-/* Do we need any of these for elf?
-   __DYNAMIC = 0;    */
-SECTIONS
-{
-  /* Read-only sections, merged into text segment: */
-  . = + SIZEOF_HEADERS;
-  .interp : { *(.interp) }
-  .hash          : { *(.hash)		}
-  .dynsym        : { *(.dynsym)		}
-  .dynstr        : { *(.dynstr)		}
-  .rel.text      : { *(.rel.text)		}
-  .rela.text     : { *(.rela.text)	}
-  .rel.data      : { *(.rel.data)		}
-  .rela.data     : { *(.rela.data)	}
-  .rel.rodata    : { *(.rel.rodata)	}
-  .rela.rodata   : { *(.rela.rodata)	}
-  .rel.got       : { *(.rel.got)		}
-  .rela.got      : { *(.rela.got)		}
-  .rel.ctors     : { *(.rel.ctors)	}
-  .rela.ctors    : { *(.rela.ctors)	}
-  .rel.dtors     : { *(.rel.dtors)	}
-  .rela.dtors    : { *(.rela.dtors)	}
-  .rel.bss       : { *(.rel.bss)		}
-  .rela.bss      : { *(.rela.bss)		}
-  .rel.plt       : { *(.rel.plt)		}
-  .rela.plt      : { *(.rela.plt)		}
-  .init          : { *(.init)	}
-  .plt : { *(.plt) }
-  .text      :
-  {
-    /* WARNING - the following is hand-optimized to fit within	*/
-    /* the sector layout of our flash chips!	XXX FIXME XXX	*/
-
-    mpc8xx/start.o	(.text)
-    common/dlmalloc.o	(.text)
-    lib_generic/vsprintf.o	(.text)
-    lib_generic/crc32.o		(.text)
-    lib_ppc/extable.o	(.text)
-
-    common/env_embedded.o(.text)
-
-    *(.text)
-    *(.got1)
-  }
-  _etext = .;
-  PROVIDE (etext = .);
-  .rodata    :
-  {
-    *(.rodata)
-    *(.rodata1)
-    *(.rodata.str1.4)
-    *(.eh_frame)
-  }
-  .fini      : { *(.fini)    } =0
-  .ctors     : { *(.ctors)   }
-  .dtors     : { *(.dtors)   }
-
-  /* Read-write section, merged into data segment: */
-  . = (. + 0x0FFF) & 0xFFFFF000;
-  _erotext = .;
-  PROVIDE (erotext = .);
-  .reloc   :
-  {
-    *(.got)
-    _GOT2_TABLE_ = .;
-    *(.got2)
-    _FIXUP_TABLE_ = .;
-    *(.fixup)
-  }
-  __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
-  __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
-  .data    :
-  {
-    *(.data)
-    *(.data1)
-    *(.sdata)
-    *(.sdata2)
-    *(.dynamic)
-    CONSTRUCTORS
-  }
-  _edata  =  .;
-  PROVIDE (edata = .);
-
-  __u_boot_cmd_start = .;
-  .u_boot_cmd : { *(.u_boot_cmd) }
-  __u_boot_cmd_end = .;
-
-
-  __start___ex_table = .;
-  __ex_table : { *(__ex_table) }
-  __stop___ex_table = .;
-
-  . = ALIGN(4096);
-  __init_begin = .;
-  .text.init : { *(.text.init) }
-  .data.init : { *(.data.init) }
-  . = ALIGN(4096);
-  __init_end = .;
-
-  __bss_start = .;
-  .bss       :
-  {
-   *(.sbss) *(.scommon)
-   *(.dynbss)
-   *(.bss)
-   *(COMMON)
-  }
-  _end = . ;
-  PROVIDE (end = .);
-}

board/xilinx/ml300/xparameters.h

@@ -1,196 +0,0 @@
-/*******************************************************************
-*
-* CAUTION: This file is automatically generated by libgen.
-* Version: Xilinx EDK 6.2 EDK_Gm.11
-* DO NOT EDIT.
-*
-* Copyright (c) 2003 Xilinx, Inc.  All rights reserved.
-*
-* Description: Driver parameters
-*
-*******************************************************************/
-
-/******************************************************************/
-
-/* U-Boot Redefines */
-
-/******************************************************************/
-
-#define XPAR_UARTNS550_0_BASEADDR (XPAR_OPB_UART16550_0_BASEADDR+0x1000)
-#define XPAR_UARTNS550_0_HIGHADDR XPAR_OPB_UART16550_0_HIGHADDR
-#define XPAR_UARTNS550_0_CLOCK_FREQ_HZ XPAR_XUARTNS550_CLOCK_HZ
-#define XPAR_UARTNS550_0_DEVICE_ID XPAR_OPB_UART16550_0_DEVICE_ID
-#define XPAR_UARTNS550_1_BASEADDR (XPAR_OPB_UART16550_1_BASEADDR+0x1000)
-#define XPAR_UARTNS550_1_HIGHADDR XPAR_OPB_UART16550_1_HIGHADDR
-#define XPAR_UARTNS550_1_CLOCK_FREQ_HZ XPAR_XUARTNS550_CLOCK_HZ
-#define XPAR_UARTNS550_1_DEVICE_ID XPAR_OPB_UART16550_1_DEVICE_ID
-
-/******************************************************************/
-
-#define XPAR_IIC_0_BASEADDR XPAR_OPB_IIC_0_BASEADDR
-#define XPAR_IIC_0_HIGHADDR XPAR_OPB_IIC_0_HIGHADDR
-#define XPAR_IIC_0_TEN_BIT_ADR XPAR_OPB_IIC_0_TEN_BIT_ADR
-#define XPAR_IIC_0_DEVICE_ID XPAR_OPB_IIC_0_DEVICE_ID
-
-/******************************************************************/
-
-#define XPAR_EMAC_0_BASEADDR XPAR_OPB_ETHERNET_0_BASEADDR
-#define XPAR_EMAC_0_HIGHADDR XPAR_OPB_ETHERNET_0_HIGHADDR
-#define XPAR_EMAC_0_DMA_PRESENT XPAR_OPB_ETHERNET_0_DMA_PRESENT
-#define XPAR_EMAC_0_MII_EXIST XPAR_OPB_ETHERNET_0_MII_EXIST
-#define XPAR_EMAC_0_ERR_COUNT_EXIST XPAR_OPB_ETHERNET_0_ERR_COUNT_EXIST
-#define XPAR_EMAC_0_DEVICE_ID XPAR_OPB_ETHERNET_0_DEVICE_ID
-
-/******************************************************************/
-
-#define XPAR_CORE_CLOCK_FREQ_HZ XPAR_CPU_PPC405_CORE_CLOCK_FREQ_HZ
-
-/******************************************************************/
-
-#define XPAR_PERSISTENT_0_IIC_0_BASEADDR 0x00000400
-#define XPAR_PERSISTENT_0_IIC_0_HIGHADDR 0x000007FF
-#define XPAR_PERSISTENT_0_IIC_0_EEPROMADDR 0xA0
-
-/******************************************************************/
-
-#define XPAR_XPCI_NUM_INSTANCES 1
-#define XPAR_XPCI_CLOCK_HZ 33333333
-#define XPAR_OPB_PCI_REF_0_DEVICE_ID 0
-#define XPAR_OPB_PCI_REF_0_BASEADDR 0x20000000
-#define XPAR_OPB_PCI_REF_0_HIGHADDR 0x3FFFFFFF
-#define XPAR_OPB_PCI_REF_0_CONFIG_ADDR 0x3C000000
-#define XPAR_OPB_PCI_REF_0_CONFIG_DATA 0x3C000004
-#define XPAR_OPB_PCI_REF_0_LCONFIG_ADDR 0x3E000000
-#define XPAR_OPB_PCI_REF_0_MEM_BASEADDR 0x20000000
-#define XPAR_OPB_PCI_REF_0_MEM_HIGHADDR 0x37FFFFFF
-#define XPAR_OPB_PCI_REF_0_IO_BASEADDR 0x38000000
-#define XPAR_OPB_PCI_REF_0_IO_HIGHADDR 0x3BFFFFFF
-
-/******************************************************************/
-
-#define XPAR_XEMAC_NUM_INSTANCES 1
-#define XPAR_OPB_ETHERNET_0_BASEADDR 0x60000000
-#define XPAR_OPB_ETHERNET_0_HIGHADDR 0x60003FFF
-#define XPAR_OPB_ETHERNET_0_DEVICE_ID 0
-#define XPAR_OPB_ETHERNET_0_ERR_COUNT_EXIST 1
-#define XPAR_OPB_ETHERNET_0_DMA_PRESENT 1
-#define XPAR_OPB_ETHERNET_0_MII_EXIST 1
-
-/******************************************************************/
-
-#define XPAR_MY_OPB_GPIO_0_DEVICE_ID_0 0
-#define XPAR_MY_OPB_GPIO_0_BASEADDR_0 0x90000000
-#define XPAR_MY_OPB_GPIO_0_HIGHADDR_0 (0x90000000+0x7)
-#define XPAR_MY_OPB_GPIO_0_DEVICE_ID_1 1
-#define XPAR_MY_OPB_GPIO_0_BASEADDR_1 (0x90000000+0x8)
-#define XPAR_MY_OPB_GPIO_0_HIGHADDR_1 (0x90000000+0x1F)
-#define XPAR_XGPIO_NUM_INSTANCES 2
-
-/******************************************************************/
-
-#define XPAR_XIIC_NUM_INSTANCES 1
-#define XPAR_OPB_IIC_0_BASEADDR 0xA8000000
-#define XPAR_OPB_IIC_0_HIGHADDR 0xA80001FF
-#define XPAR_OPB_IIC_0_DEVICE_ID 0
-#define XPAR_OPB_IIC_0_TEN_BIT_ADR 0
-
-/******************************************************************/
-
-#define XPAR_XUARTNS550_NUM_INSTANCES 2
-#define XPAR_XUARTNS550_CLOCK_HZ 100000000
-#define XPAR_OPB_UART16550_0_BASEADDR 0xA0000000
-#define XPAR_OPB_UART16550_0_HIGHADDR 0xA0001FFF
-#define XPAR_OPB_UART16550_0_DEVICE_ID 0
-#define XPAR_OPB_UART16550_1_BASEADDR 0xA0010000
-#define XPAR_OPB_UART16550_1_HIGHADDR 0xA0011FFF
-#define XPAR_OPB_UART16550_1_DEVICE_ID 1
-
-/******************************************************************/
-
-#define XPAR_XSPI_NUM_INSTANCES 1
-#define XPAR_OPB_SPI_0_BASEADDR 0xA4000000
-#define XPAR_OPB_SPI_0_HIGHADDR 0xA400007F
-#define XPAR_OPB_SPI_0_DEVICE_ID 0
-#define XPAR_OPB_SPI_0_FIFO_EXIST 1
-#define XPAR_OPB_SPI_0_SPI_SLAVE_ONLY 0
-#define XPAR_OPB_SPI_0_NUM_SS_BITS 1
-
-/******************************************************************/
-
-#define XPAR_XPS2_NUM_INSTANCES 2
-#define XPAR_OPB_PS2_DUAL_REF_0_DEVICE_ID_0 0
-#define XPAR_OPB_PS2_DUAL_REF_0_BASEADDR_0 0xA9000000
-#define XPAR_OPB_PS2_DUAL_REF_0_HIGHADDR_0 (0xA9000000+0x3F)
-#define XPAR_OPB_PS2_DUAL_REF_0_DEVICE_ID_1 1
-#define XPAR_OPB_PS2_DUAL_REF_0_BASEADDR_1 (0xA9000000+0x1000)
-#define XPAR_OPB_PS2_DUAL_REF_0_HIGHADDR_1 (0xA9000000+0x103F)
-
-/******************************************************************/
-
-#define XPAR_XTOUCHSCREEN_NUM_INSTANCES 1
-#define XPAR_OPB_TSD_REF_0_BASEADDR 0xAA000000
-#define XPAR_OPB_TSD_REF_0_HIGHADDR 0xAA000007
-#define XPAR_OPB_TSD_REF_0_DEVICE_ID 0
-
-/******************************************************************/
-
-#define XPAR_OPB_AC97_CONTROLLER_REF_0_BASEADDR 0xA6000000
-#define XPAR_OPB_AC97_CONTROLLER_REF_0_HIGHADDR 0xA60000FF
-#define XPAR_OPB_PAR_PORT_REF_0_BASEADDR 0x90010000
-#define XPAR_OPB_PAR_PORT_REF_0_HIGHADDR 0x900100FF
-#define XPAR_PLB_DDR_0_BASEADDR 0x00000000
-#define XPAR_PLB_DDR_0_HIGHADDR 0x0FFFFFFF
-
-/******************************************************************/
-
-#define XPAR_XINTC_HAS_IPR 1
-#define XPAR_INTC_MAX_NUM_INTR_INPUTS 18
-#define XPAR_XINTC_USE_DCR 0
-#define XPAR_XINTC_NUM_INSTANCES 1
-#define XPAR_DCR_INTC_0_BASEADDR 0xD0000FC0
-#define XPAR_DCR_INTC_0_HIGHADDR 0xD0000FDF
-#define XPAR_DCR_INTC_0_DEVICE_ID 0
-#define XPAR_DCR_INTC_0_KIND_OF_INTR 0x00038000
-
-/******************************************************************/
-
-#define XPAR_DCR_INTC_0_MISC_LOGIC_0_PHY_MII_INT_INTR 0
-#define XPAR_DCR_INTC_0_OPB_ETHERNET_0_IP2INTC_IRPT_INTR 1
-#define XPAR_DCR_INTC_0_MISC_LOGIC_0_IIC_TEMP_CRIT_INTR 2
-#define XPAR_DCR_INTC_0_MISC_LOGIC_0_IIC_IRQ_INTR 3
-#define XPAR_DCR_INTC_0_OPB_IIC_0_IP2INTC_IRPT_INTR 4
-#define XPAR_DCR_INTC_0_OPB_SYSACE_0_SYSACE_IRQ_INTR 5
-#define XPAR_DCR_INTC_0_OPB_UART16550_0_IP2INTC_IRPT_INTR 6
-#define XPAR_DCR_INTC_0_OPB_UART16550_1_IP2INTC_IRPT_INTR 7
-#define XPAR_DCR_INTC_0_OPB_PS2_DUAL_REF_0_SYS_INTR1_INTR 8
-#define XPAR_DCR_INTC_0_OPB_PS2_DUAL_REF_0_SYS_INTR2_INTR 9
-#define XPAR_DCR_INTC_0_OPB_SPI_0_IP2INTC_IRPT_INTR 10
-#define XPAR_DCR_INTC_0_OPB_TSD_REF_0_INTR_INTR 11
-#define XPAR_DCR_INTC_0_OPB_AC97_CONTROLLER_REF_0_PLAYBACK_INTERRUPT_INTR 12
-#define XPAR_DCR_INTC_0_OPB_AC97_CONTROLLER_REF_0_RECORD_INTERRUPT_INTR 13
-#define XPAR_DCR_INTC_0_OPB_PCI_REF_0_INTR_OUT_INTR 14
-#define XPAR_DCR_INTC_0_PLB2OPB_BRIDGE_0_BUS_ERROR_DET_INTR 15
-#define XPAR_DCR_INTC_0_PLB_V34_0_BUS_ERROR_DET_INTR 16
-#define XPAR_DCR_INTC_0_OPB2PLB_BRIDGE_0_BUS_ERROR_DET_INTR 17
-
-/******************************************************************/
-
-#define XPAR_XTFT_NUM_INSTANCES 1
-#define XPAR_PLB_TFT_CNTLR_REF_0_DCR_BASEADDR 0xD0000200
-#define XPAR_PLB_TFT_CNTLR_REF_0_DCR_HIGHADDR 0xD0000207
-#define XPAR_PLB_TFT_CNTLR_REF_0_DEVICE_ID 0
-
-/******************************************************************/
-
-#define XPAR_XSYSACE_MEM_WIDTH 8
-#define XPAR_XSYSACE_NUM_INSTANCES 1
-#define XPAR_OPB_SYSACE_0_BASEADDR 0xCF000000
-#define XPAR_OPB_SYSACE_0_HIGHADDR 0xCF0001FF
-#define XPAR_OPB_SYSACE_0_DEVICE_ID 0
-#define XPAR_OPB_SYSACE_0_MEM_WIDTH 8
-
-/******************************************************************/
-
-#define XPAR_CPU_PPC405_CORE_CLOCK_FREQ_HZ 300000000
-
-/******************************************************************/

board/xilinx/xilinx_iic/iic_adapter.c

@@ -1,529 +0,0 @@
-/******************************************************************************
-*
-*     Author: Xilinx, Inc.
-*
-*
-*     This program is free software; you can redistribute it and/or modify it
-*     under the terms of the GNU General Public License as published by the
-*     Free Software Foundation; either version 2 of the License, or (at your
-*     option) any later version.
-*
-*
-*     XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" AS A
-*     COURTESY TO YOU. BY PROVIDING THIS DESIGN, CODE, OR INFORMATION AS
-*     ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, APPLICATION OR STANDARD,
-*     XILINX IS MAKING NO REPRESENTATION THAT THIS IMPLEMENTATION IS FREE
-*     FROM ANY CLAIMS OF INFRINGEMENT, AND YOU ARE RESPONSIBLE FOR OBTAINING
-*     ANY THIRD PARTY RIGHTS YOU MAY REQUIRE FOR YOUR IMPLEMENTATION.
-*     XILINX EXPRESSLY DISCLAIMS ANY WARRANTY WHATSOEVER WITH RESPECT TO
-*     THE ADEQUACY OF THE IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY
-*     WARRANTIES OR REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM
-*     CLAIMS OF INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND
-*     FITNESS FOR A PARTICULAR PURPOSE.
-*
-*
-*     Xilinx hardware products are not intended for use in life support
-*     appliances, devices, or systems. Use in such applications is
-*     expressly prohibited.
-*
-*
-*     (c) Copyright 2002-2004 Xilinx Inc.
-*     All rights reserved.
-*
-*
-*     You should have received a copy of the GNU General Public License along
-*     with this program; if not, write to the Free Software Foundation, Inc.,
-*     675 Mass Ave, Cambridge, MA 02139, USA.
-*
-******************************************************************************/
-
-#include <config.h>
-#include <common.h>
-#include <environment.h>
-#include <net.h>
-
-#ifdef CONFIG_ENV_IS_IN_EEPROM
-#include <i2c.h>
-#include "xiic_l.h"
-
-#define IIC_DELAY     5000
-
-static u8 envStep = 0;		/* 0 means crc has not been read */
-const u8 hex[] = "0123456789ABCDEF"; /* lookup table for ML300 CRC */
-
-/************************************************************************
- * Use Xilinx provided driver to send data to EEPROM using iic bus.
- */
-static void
-send(u32 adr, u8 * data, u32 len)
-{
-	u8 sendBuf[34];		/* first 2-bit is address and others are data */
-	u32 pos, wlen;
-	u32 ret;
-
-	wlen = 32;
-	for (pos = 0; pos < len; pos += 32) {
-		if ((len - pos) < 32)
-			wlen = len - pos;
-
-		/* Put address and data bits together */
-		sendBuf[0] = (u8) ((adr + pos) >> 8);
-		sendBuf[1] = (u8) (adr + pos);
-		memcpy(&sendBuf[2], &data[pos], wlen);
-
-		/* Send to EEPROM through iic bus */
-		ret = XIic_Send(XPAR_IIC_0_BASEADDR, CONFIG_SYS_I2C_EEPROM_ADDR >> 1,
-				sendBuf, wlen + 2);
-
-		udelay(IIC_DELAY);
-	}
-}
-
-/************************************************************************
- * Use Xilinx provided driver to read data from EEPROM using the iic bus.
- */
-static void
-receive(u32 adr, u8 * data, u32 len)
-{
-	u8 address[2];
-	u32 ret;
-
-	address[0] = (u8) (adr >> 8);
-	address[1] = (u8) adr;
-
-	/* Provide EEPROM address */
-	ret =
-	    XIic_Send(XPAR_IIC_0_BASEADDR, CONFIG_SYS_I2C_EEPROM_ADDR >> 1, address,
-		      2);
-	/* Receive data from EEPROM */
-	ret =
-	    XIic_Recv(XPAR_IIC_0_BASEADDR, CONFIG_SYS_I2C_EEPROM_ADDR >> 1, data, len);
-}
-
-/************************************************************************
- * Convert a hexadecimal string to its equivalent integer value.
- */
-static u8
-axtoi(u8 * hexStg)
-{
-	u8 n;			/* position in string */
-	u8 m;			/* position in digit[] to shift */
-	u8 count;		/* loop index */
-	u8 intValue;		/* integer value of hex string */
-	u8 digit[2];		/* hold values to convert */
-
-	for (n = 0; n < 2; n++) {
-		if (hexStg[n] == '\0')
-			break;
-		if (hexStg[n] > 0x29 && hexStg[n] < 0x40)
-			digit[n] = hexStg[n] & 0x0f;
-		else if (hexStg[n] >= 'a' && hexStg[n] <= 'f')
-			digit[n] = (hexStg[n] & 0x0f) + 9;
-		else if (hexStg[n] >= 'A' && hexStg[n] <= 'F')
-			digit[n] = (hexStg[n] & 0x0f) + 9;
-		else
-			break;
-	}
-
-	intValue = 0;
-	count = n;
-	m = n - 1;
-	n = 0;
-	while (n < count) {
-		intValue = intValue | (digit[n] << (m << 2));
-		m--;		/* adjust the position to set */
-		n++;		/* next digit to process */
-	}
-
-	return (intValue);
-}
-
-/************************************************************************
- * Convert an integer string to its equivalent value.
- */
-static u8
-atoi(uchar * string)
-{
-	u8 res = 0;
-	while (*string >= '0' && *string <= '9') {
-		res *= 10;
-		res += *string - '0';
-		string++;
-	}
-
-	return res;
-}
-
-/************************************************************************
- * Key-value pairs are separated by "=" sign.
- */
-static void
-findKey(uchar * buffer, int *loc, u8 len)
-{
-	u32 i;
-
-	for (i = 0; i < len; i++)
-		if (buffer[i] == '=') {
-			*loc = i;
-			return;
-		}
-
-	/* return -1 is no "=" sign found */
-	*loc = -1;
-}
-
-/************************************************************************
- * Compute a new ML300 CRC when user calls the saveenv command.
- * Also update EEPROM with new CRC value.
- */
-static u8
-update_crc(u32 len, uchar * data)
-{
-	uchar temp[6] = { 'C', '=', 0x00, 0x00, 0x00, 0x00 };
-	u32 crc;		/* new crc value */
-	u32 i;
-
-	crc = 0;
-
-	/* calculate new CRC */
-	for (i = 0; i < len; i++)
-		crc += data[i];
-
-	/* CRC includes key for check sum */
-	crc += 'C' + '=';
-
-	/* compose new CRC to be updated */
-	temp[2] = hex[(crc >> 4) & 0xf];
-	temp[3] = hex[crc & 0xf];
-
-	/* check to see if env size exceeded */
-	if (len + 6 > ENV_SIZE) {
-		printf("ERROR: not enough space to store CRC on EEPROM");
-		return 1;
-	}
-
-	memcpy(data + len, temp, 6);
-	return 0;
-}
-
-/************************************************************************
- * Read out ML300 CRC and compare it with a runtime calculated ML300 CRC.
- * If equal, then pass back a u-boot CRC value, otherwise pass back
- * junk to indicate CRC error.
-*/
-static void
-read_crc(uchar * buffer, int len)
-{
-	u32 addr, n;
-	u32 crc;		/* runtime crc */
-	u8 old[2] = { 0xff, 0xff };	/* current CRC in EEPROM */
-	u8 stop;		/* indication of end of env data */
-	u8 pre;			/* previous EEPROM data bit */
-	int i, loc;
-
-	addr = CONFIG_ENV_OFFSET;	/* start from first env address */
-	n = 0;
-	pre = 1;
-	stop = 1;
-	crc = 0;
-
-	/* calculate runtime CRC according to ML300 and read back
-	   old CRC stored in the EEPROM */
-	while (n < CONFIG_ENV_SIZE) {
-		receive(addr, buffer, len);
-
-		/* found two null chars, end of env */
-		if ((pre || buffer[0]) == 0)
-			break;
-
-		findKey(buffer, &loc, len);
-
-		/* found old check sum, read and store old CRC */
-		if ((loc == 0 && pre == 'C')
-		    || (loc > 0 && buffer[loc - 1] == 'C'))
-			receive(addr + loc + 1, old, 2);
-
-		pre = buffer[len - 1];
-
-		/* calculate runtime ML300 CRC */
-		crc += buffer[0];
-		i = 1;
-		do {
-			crc += buffer[i];
-			stop = buffer[i] || buffer[i - 1];
-			i++;
-		} while (stop && (i < len));
-
-		if (stop == 0)
-			break;
-
-		n += len;
-		addr += len;
-	}
-
-	/* exclude old CRC from runtime calculation */
-	crc -= (old[0] + old[1]);
-
-	/* match CRC values, send back u-boot CRC */
-	if ((old[0] == hex[(crc >> 4) & 0xf])
-	    && (old[1] == hex[crc & 0xf])) {
-		crc = 0;
-		n = 0;
-		addr =
-		    CONFIG_ENV_OFFSET - offsetof(env_t, crc) + offsetof(env_t,
-								     data);
-		/* calculate u-boot crc */
-		while (n < ENV_SIZE) {
-			receive(addr, buffer, len);
-			crc = crc32(crc, buffer, len);
-			n += len;
-			addr += len;
-		}
-
-		memcpy(buffer, &crc, 4);
-	}
-}
-
-/************************************************************************
- * Convert IP address to hexadecimals.
- */
-static void
-ip_ml300(uchar * s, uchar * res)
-{
-	char temp[2];
-	u8 i;
-
-	res[0] = 0x00;
-
-	for (i = 0; i < 4; i++) {
-		sprintf(temp, "%02x", atoi(s));
-		s = (uchar *)strchr((char *)s, '.') + 1;
-		strcat((char *)res, temp);
-	}
-}
-
-/************************************************************************
- * Change 0xff (255), a dummy null char to 0x00.
- */
-static void
-change_null(uchar * s)
-{
-	if (s != NULL) {
-		change_null((uchar *)strchr((char *)s + 1, 255));
-		*(strchr((char *)s, 255)) = '\0';
-	}
-}
-
-/************************************************************************
- * Update environment variable name and values to u-boot standard.
- */
-void
-convert_env(void)
-{
-	char *s;		/* pointer to env value */
-	char temp[20];		/* temp storage for addresses */
-
-	/* E -> ethaddr */
-	s = getenv("E");
-	if (s != NULL) {
-		sprintf(temp, "%c%c.%c%c.%c%c.%c%c.%c%c.%c%c",
-			s[0], s[1],  s[ 2], s[ 3],
-			s[4], s[5],  s[ 6], s[ 7],
-			s[8], s[9],  s[10], s[11] );
-		setenv("ethaddr", temp);
-		setenv("E", NULL);
-	}
-
-	/* L -> serial# */
-	s = getenv("L");
-	if (s != NULL) {
-		setenv("serial#", s);
-		setenv("L", NULL);
-	}
-
-	/* I -> ipaddr */
-	s = getenv("I");
-	if (s != NULL) {
-		sprintf(temp, "%d.%d.%d.%d", axtoi((u8 *)s), axtoi((u8 *)(s + 2)),
-			axtoi((u8 *)(s + 4)), axtoi((u8 *)(s + 6)));
-		setenv("ipaddr", temp);
-		setenv("I", NULL);
-	}
-
-	/* S -> serverip */
-	s = getenv("S");
-	if (s != NULL) {
-		sprintf(temp, "%d.%d.%d.%d", axtoi((u8 *)s), axtoi((u8 *)(s + 2)),
-			axtoi((u8 *)(s + 4)), axtoi((u8 *)(s + 6)));
-		setenv("serverip", temp);
-		setenv("S", NULL);
-	}
-
-	/* A -> bootargs */
-	s = getenv("A");
-	if (s != NULL) {
-		setenv("bootargs", s);
-		setenv("A", NULL);
-	}
-
-	/* F -> bootfile */
-	s = getenv("F");
-	if (s != NULL) {
-		setenv("bootfile", s);
-		setenv("F", NULL);
-	}
-
-	/* M -> bootcmd */
-	s = getenv("M");
-	if (s != NULL) {
-		setenv("bootcmd", s);
-		setenv("M", NULL);
-	}
-
-	/* Don't include C (CRC) */
-	setenv("C", NULL);
-}
-
-/************************************************************************
- * Save user modified environment values back to EEPROM.
- */
-static void
-save_env(void)
-{
-	char eprom[ENV_SIZE];	/* buffer to be written back to EEPROM */
-	char *s, temp[20];
-	char ff[] = { 0xff, 0x00 };	/* dummy null value */
-	u32 len;		/* length of env to be written to EEPROM */
-
-	eprom[0] = 0x00;
-
-	/* ethaddr -> E */
-	s = getenv("ethaddr");
-	if (s != NULL) {
-		strcat(eprom, "E=");
-		sprintf(temp, "%c%c%c%c%c%c%c%c%c%c%c%c",
-			*s, *(s + 1), *(s + 3), *(s + 4), *(s + 6), *(s + 7),
-			*(s + 9), *(s + 10), *(s + 12), *(s + 13), *(s + 15),
-			*(s + 16));
-		strcat(eprom, temp);
-		strcat(eprom, ff);
-	}
-
-	/* serial# -> L */
-	s = getenv("serial#");
-	if (s != NULL) {
-		strcat(eprom, "L=");
-		strcat(eprom, s);
-		strcat(eprom, ff);
-	}
-
-	/* ipaddr -> I */
-	s = getenv("ipaddr");
-	if (s != NULL) {
-		strcat(eprom, "I=");
-		ip_ml300((uchar *)s, (uchar *)temp);
-		strcat(eprom, temp);
-		strcat(eprom, ff);
-	}
-
-	/* serverip -> S */
-	s = getenv("serverip");
-	if (s != NULL) {
-		strcat(eprom, "S=");
-		ip_ml300((uchar *)s, (uchar *)temp);
-		strcat(eprom, temp);
-		strcat(eprom, ff);
-	}
-
-	/* bootargs -> A */
-	s = getenv("bootargs");
-	if (s != NULL) {
-		strcat(eprom, "A=");
-		strcat(eprom, s);
-		strcat(eprom, ff);
-	}
-
-	/* bootfile -> F */
-	s = getenv("bootfile");
-	if (s != NULL) {
-		strcat(eprom, "F=");
-		strcat(eprom, s);
-		strcat(eprom, ff);
-	}
-
-	/* bootcmd -> M */
-	s = getenv("bootcmd");
-	if (s != NULL) {
-		strcat(eprom, "M=");
-		strcat(eprom, s);
-		strcat(eprom, ff);
-	}
-
-	len = strlen(eprom);	/* find env length without crc */
-	change_null((uchar *)eprom);	/* change 0xff to 0x00 */
-
-	/* update EEPROM env values if there is enough space */
-	if (update_crc(len, (uchar *)eprom) == 0)
-		send(CONFIG_ENV_OFFSET, (uchar *)eprom, len + 6);
-}
-
-/************************************************************************
- * U-boot call for EEPROM read associated activities.
- */
-int
-i2c_read(uchar chip, uint addr, int alen, uchar * buffer, int len)
-{
-
-	if (envStep == 0) {
-		/* first read call is for crc */
-		read_crc(buffer, len);
-		++envStep;
-		return 0;
-	} else if (envStep == 1) {
-		/* then read out EEPROM content for runtime u-boot CRC calculation */
-		receive(addr, buffer, len);
-
-		if (addr + len - CONFIG_ENV_OFFSET == CONFIG_ENV_SIZE)
-			/* end of runtime crc read */
-			++envStep;
-		return 0;
-	}
-
-	if (len < 2) {
-		/* when call getenv_r */
-		receive(addr, buffer, len);
-	} else if (addr + len < CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) {
-		/* calling env_relocate(), but don't read out
-		   crc value from EEPROM */
-		receive(addr, buffer + 4, len);
-	} else {
-		receive(addr, buffer + 4, len - 4);
-	}
-
-	return 0;
-
-}
-
-/************************************************************************
- * U-boot call for EEPROM write acativities.
- */
-int
-i2c_write(uchar chip, uint addr, int alen, uchar * buffer, int len)
-{
-	/* save env on last page write called by u-boot */
-	if (addr + len >= CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
-		save_env();
-
-	return 0;
-}
-
-/************************************************************************
- * Dummy function.
- */
-int
-i2c_probe(uchar chip)
-{
-	return 1;
-}
-
-#endif

common/cmd_bootm.c

@@ -291,7 +291,8 @@ static int bootm_start(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 		return 1;
 	}
 
-	if ((images.os.type == IH_TYPE_KERNEL) &&
+	if (((images.os.type == IH_TYPE_KERNEL) ||
+	     (images.os.type == IH_TYPE_MULTI)) &&
 	    (images.os.os == IH_OS_LINUX)) {
 		/* find ramdisk */
 		ret = boot_get_ramdisk (argc, argv, &images, IH_INITRD_ARCH,

common/cmd_mmc.c

@@ -136,7 +136,7 @@ int do_mmcinfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 }
 
 U_BOOT_CMD(mmcinfo, 2, 0, do_mmcinfo,
-	"mmcinfo <dev num>-- display MMC info\n",
+	"mmcinfo <dev num>-- display MMC info",
 	""
 );
 

common/cmd_usb.c

@@ -601,7 +601,7 @@ int do_usb(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 					ok++;
 					if (devno)
 						printf("\n");
-					printf("print_part of %x\n", devno);
+					debug("print_part of %x\n", devno);
 					print_part(stor_dev);
 				}
 			}
@@ -610,7 +610,7 @@ int do_usb(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 			stor_dev = usb_stor_get_dev(devno);
 			if (stor_dev->type != DEV_TYPE_UNKNOWN) {
 				ok++;
-				printf("print_part of %x\n", devno);
+				debug("print_part of %x\n", devno);
 				print_part(stor_dev);
 			}
 		}

common/console.c

@@ -659,10 +659,14 @@ int console_init_r(void)
 #ifdef CONFIG_SPLASH_SCREEN
 	/*
 	 * suppress all output if splash screen is enabled and we have
-	 * a bmp to display
+	 * a bmp to display. We redirect the output from frame buffer
+	 * console to serial console in this case or suppress it if
+	 * "silent" mode was requested.
 	 */
-	if (getenv("splashimage") != NULL)
-		gd->flags |= GD_FLG_SILENT;
+	if (getenv("splashimage") != NULL) {
+		if (!(gd->flags & GD_FLG_SILENT))
+			outputdev = search_device (DEV_FLAGS_OUTPUT, "serial");
+	}
 #endif
 
 	/* Scan devices looking for input and output devices */

common/lcd.c

@@ -63,7 +63,7 @@
 /************************************************************************/
 #ifdef CONFIG_LCD_LOGO
 # include <bmp_logo.h>		/* Get logo data, width and height	*/
-# if (CONSOLE_COLOR_WHITE >= BMP_LOGO_OFFSET)
+# if (CONSOLE_COLOR_WHITE >= BMP_LOGO_OFFSET) && (LCD_BPP != LCD_COLOR16)
 #  error Default Color Map overlaps with Logo Color Map
 # endif
 #endif
@@ -218,8 +218,12 @@ static void lcd_drawchars (ushort x, ushort y, uchar *str, int count)
 
 	for (row=0;  row < VIDEO_FONT_HEIGHT;  ++row, dest += lcd_line_length)  {
 		uchar *s = str;
-		uchar *d = dest;
 		int i;
+#if LCD_BPP == LCD_COLOR16
+		ushort *d = (ushort *)dest;
+#else
+		uchar *d = dest;
+#endif
 
 #if LCD_BPP == LCD_MONOCHROME
 		uchar rest = *d & -(1 << (8-off));
@@ -244,7 +248,7 @@ static void lcd_drawchars (ushort x, ushort y, uchar *str, int count)
 				bits <<= 1;
 			}
 #elif LCD_BPP == LCD_COLOR16
-			for (c=0; c<16; ++c) {
+			for (c=0; c<8; ++c) {
 				*d++ = (bits & 0x80) ?
 						lcd_color_fg : lcd_color_bg;
 				bits <<= 1;
@@ -521,6 +525,13 @@ void bitmap_plot (int x, int y)
 		cmap = (ushort *)&(cp->lcd_cmap[BMP_LOGO_OFFSET*sizeof(ushort)]);
 #elif defined(CONFIG_ATMEL_LCD)
 		cmap = (uint *) (panel_info.mmio + ATMEL_LCDC_LUT(0));
+#else
+		/*
+		 * default case: generic system with no cmap (most likely 16bpp)
+		 * We set cmap to the source palette, so no change is done.
+		 * This avoids even more ifdef in the next stanza
+		 */
+		cmap = bmp_logo_palette;
 #endif
 
 		WATCHDOG_RESET();
@@ -559,10 +570,15 @@ void bitmap_plot (int x, int y)
 		}
 	}
 	else { /* true color mode */
+		u16 col16;
 		fb16 = (ushort *)(lcd_base + y * lcd_line_length + x);
 		for (i=0; i<BMP_LOGO_HEIGHT; ++i) {
 			for (j=0; j<BMP_LOGO_WIDTH; j++) {
-				fb16[j] = bmp_logo_palette[(bmap[j])];
+				col16 = bmp_logo_palette[(bmap[j]-16)];
+				fb16[j] =
+					((col16 & 0x000F) << 1) |
+					((col16 & 0x00F0) << 3) |
+					((col16 & 0x0F00) << 4);
 				}
 			bmap += BMP_LOGO_WIDTH;
 			fb16 += panel_info.vl_col;

cpu/arm920t/ep93xx/timer.c

@@ -36,7 +36,7 @@
 #define TIMER_CLKSEL	(1 << 3)
 #define TIMER_ENABLE	(1 << 7)
 
-#define TIMER_FREQ			508469
+#define TIMER_FREQ			508469		/* ticks / second */
 #define TIMER_MAX_VAL			0xFFFFFFFF
 
 static struct ep93xx_timer
@@ -53,18 +53,10 @@ static inline unsigned long clk_to_systicks(unsigned long long clk_ticks)
 	return (unsigned long)sys_ticks;
 }
 
-static inline unsigned long usecs_to_ticks(unsigned long usecs)
+static inline unsigned long long usecs_to_ticks(unsigned long usecs)
 {
-	unsigned long ticks;
-
-	if (usecs >= 1000) {
-		ticks = usecs / 1000;
-		ticks *= TIMER_FREQ;
-		ticks /= 1000;
-	} else {
-		ticks = usecs * TIMER_FREQ;
-		ticks /= (1000 * 1000);
-	}
+	unsigned long long ticks = (unsigned long long)usecs * TIMER_FREQ;
+	do_div(ticks, 1000 * 1000);
 
 	return ticks;
 }
@@ -77,7 +69,7 @@ static inline unsigned long read_timer(void)
 }
 
 /*
- * timer without interrupts
+ * Get the number of ticks (in CONFIG_SYS_HZ resolution)
  */
 unsigned long long get_ticks(void)
 {
@@ -91,12 +83,12 @@ unsigned long long get_ticks(void)
 
 	timer.last_update = now;
 
-	return timer.ticks;
+	return clk_to_systicks(timer.ticks);
 }
 
 unsigned long get_timer_masked(void)
 {
-	return clk_to_systicks(get_ticks());
+	return get_ticks();
 }
 
 unsigned long get_timer(unsigned long base)
@@ -117,10 +109,13 @@ void reset_timer(void)
 
 void __udelay(unsigned long usec)
 {
-	const unsigned long target = get_ticks() + usecs_to_ticks(usec);
+	/* read the timer and update timer.ticks */
+	get_ticks();
 
-	while (get_ticks() < target)
-		/* noop */;
+	const unsigned long long target = timer.ticks + usecs_to_ticks(usec);
+
+	while (timer.ticks < target)
+		get_ticks();
 }
 
 int timer_init(void)

cpu/mpc512x/diu.c

@@ -145,10 +145,10 @@ void *video_hw_init(void)
 	struct fb_info *info;
 
 	if (mpc5121_diu_init() < 0)
-		return;
+		return NULL;
 
 	/* fill in Graphic device struct */
-	sprintf(pGD->modeIdent, "%dx%dx%d %ldkHz %ldHz",
+	sprintf(pGD->modeIdent, "%dx%dx%d %dkHz %dHz",
 		xres, yres, 32, 64, 60);
 
 	pGD->frameAdrs = (unsigned int)fsl_fb_open(&info);

cpu/mpc85xx/release.S

@@ -70,18 +70,40 @@ __secondary_start_page:
 	mttbu	r3
 
 	/* Enable/invalidate the I-Cache */
-	mfspr	r0,SPRN_L1CSR1
-	ori	r0,r0,(L1CSR1_ICFI|L1CSR1_ICE)
-	mtspr	SPRN_L1CSR1,r0
+	lis	r2,(L1CSR1_ICFI|L1CSR1_ICLFR)@h
+	ori	r2,r2,(L1CSR1_ICFI|L1CSR1_ICLFR)@l
+	mtspr	SPRN_L1CSR1,r2
+1:
+	mfspr	r3,SPRN_L1CSR1
+	and.	r1,r3,r2
+	bne	1b
+
+	lis	r3,(L1CSR1_CPE|L1CSR1_ICE)@h
+	ori	r3,r3,(L1CSR1_CPE|L1CSR1_ICE)@l
+	mtspr	SPRN_L1CSR1,r3
 	isync
+2:
+	mfspr	r3,SPRN_L1CSR1
+	andi.	r1,r3,L1CSR1_ICE@l
+	beq	2b
 
 	/* Enable/invalidate the D-Cache */
-	mfspr	r0,SPRN_L1CSR0
-	ori	r0,r0,(L1CSR0_DCFI|L1CSR0_DCE)
-	msync
-	isync
-	mtspr	SPRN_L1CSR0,r0
+	lis	r2,(L1CSR0_DCFI|L1CSR0_DCLFR)@h
+	ori	r2,r2,(L1CSR0_DCFI|L1CSR0_DCLFR)@l
+	mtspr	SPRN_L1CSR0,r2
+1:
+	mfspr	r3,SPRN_L1CSR0
+	and.	r1,r3,r2
+	bne	1b
+
+	lis	r3,(L1CSR0_CPE|L1CSR0_DCE)@h
+	ori	r3,r3,(L1CSR0_CPE|L1CSR0_DCE)@l
+	mtspr	SPRN_L1CSR0,r3
 	isync
+2:
+	mfspr	r3,SPRN_L1CSR0
+	andi.	r1,r3,L1CSR0_DCE@l
+	beq	2b
 
 #define toreset(x) (x - __secondary_start_page + 0xfffff000)
 

cpu/mpc85xx/start.S

@@ -108,13 +108,41 @@ _start_e500:
 	mtspr	L1CSR2,r2
 #endif
 
-	lis	r2,L1CSR0_CPE@H	/* enable parity */
-	ori	r2,r2,L1CSR0_DCE
-	mtspr	L1CSR0,r2	/* enable L1 Dcache */
+	/* Enable/invalidate the I-Cache */
+	lis	r2,(L1CSR1_ICFI|L1CSR1_ICLFR)@h
+	ori	r2,r2,(L1CSR1_ICFI|L1CSR1_ICLFR)@l
+	mtspr	SPRN_L1CSR1,r2
+1:
+	mfspr	r3,SPRN_L1CSR1
+	and.	r1,r3,r2
+	bne	1b
+
+	lis	r3,(L1CSR1_CPE|L1CSR1_ICE)@h
+	ori	r3,r3,(L1CSR1_CPE|L1CSR1_ICE)@l
+	mtspr	SPRN_L1CSR1,r3
 	isync
-	mtspr	L1CSR1,r2	/* enable L1 Icache */
+2:
+	mfspr	r3,SPRN_L1CSR1
+	andi.	r1,r3,L1CSR1_ICE@l
+	beq	2b
+
+	/* Enable/invalidate the D-Cache */
+	lis	r2,(L1CSR0_DCFI|L1CSR0_DCLFR)@h
+	ori	r2,r2,(L1CSR0_DCFI|L1CSR0_DCLFR)@l
+	mtspr	SPRN_L1CSR0,r2
+1:
+	mfspr	r3,SPRN_L1CSR0
+	and.	r1,r3,r2
+	bne	1b
+
+	lis	r3,(L1CSR0_CPE|L1CSR0_DCE)@h
+	ori	r3,r3,(L1CSR0_CPE|L1CSR0_DCE)@l
+	mtspr	SPRN_L1CSR0,r3
 	isync
-	msync
+2:
+	mfspr	r3,SPRN_L1CSR0
+	andi.	r1,r3,L1CSR0_DCE@l
+	beq	2b
 
 	/* Setup interrupt vectors */
 	lis	r1,TEXT_BASE@h

cpu/mpc86xx/cpu.c

@@ -1,5 +1,5 @@
 /*
- * Copyright 2006,2009 Freescale Semiconductor, Inc.
+ * Copyright 2006,2009-2010 Freescale Semiconductor, Inc.
  * Jeff Brown
  * Srikanth Srinivasan (srikanth.srinivasan@freescale.com)
  *
@@ -197,3 +197,37 @@ void mpc86xx_reginfo(void)
 	printf("\tBR7\t0x%08X\tOR7\t0x%08X \n", in_be32(&lbc->br7), in_be32(&lbc->or7));
 
 }
+
+/*
+ * Set the DDR BATs to reflect the actual size of DDR.
+ *
+ * dram_size is the actual size of DDR, in bytes
+ *
+ * Note: we assume that CONFIG_MAX_MEM_MAPPED is 2G or smaller as we only
+ * are using a single BAT to cover DDR.
+ *
+ * If this is not true, (e.g. CONFIG_MAX_MEM_MAPPED is 2GB but HID0_XBSEN
+ * is not defined) then we might have a situation where U-Boot will attempt
+ * to relocated itself outside of the region mapped by DBAT0.
+ * This will cause a machine check.
+ *
+ * Currently we are limited to power of two sized DDR since we only use a
+ * single bat.  If a non-power of two size is used that is less than
+ * CONFIG_MAX_MEM_MAPPED u-boot will crash.
+ *
+ */
+void setup_ddr_bat(phys_addr_t dram_size)
+{
+	unsigned long batu, bl;
+
+	bl = TO_BATU_BL(min(dram_size, CONFIG_MAX_MEM_MAPPED));
+
+	if (BATU_SIZE(bl) != dram_size) {
+		u64 sz = (u64)dram_size - BATU_SIZE(bl);
+		print_size(sz, " left unmapped\n");
+	}
+
+	batu = bl | BATU_VS | BATU_VP;
+	write_bat(DBAT0, batu, CONFIG_SYS_DBAT0L);
+	write_bat(IBAT0, batu, CONFIG_SYS_IBAT0L);
+}

cpu/mpc86xx/cpu_init.c

@@ -138,8 +138,12 @@ int cpu_init_r(void)
 /* Set up BAT registers */
 void setup_bats(void)
 {
+#if defined(CONFIG_SYS_DBAT0U) && defined(CONFIG_SYS_DBAT0L)
 	write_bat(DBAT0, CONFIG_SYS_DBAT0U, CONFIG_SYS_DBAT0L);
+#endif
+#if defined(CONFIG_SYS_IBAT0U) && defined(CONFIG_SYS_IBAT0L)
 	write_bat(IBAT0, CONFIG_SYS_IBAT0U, CONFIG_SYS_IBAT0L);
+#endif
 	write_bat(DBAT1, CONFIG_SYS_DBAT1U, CONFIG_SYS_DBAT1L);
 	write_bat(IBAT1, CONFIG_SYS_IBAT1U, CONFIG_SYS_IBAT1L);
 	write_bat(DBAT2, CONFIG_SYS_DBAT2U, CONFIG_SYS_DBAT2L);

cpu/nios2/serial.c

@@ -2,6 +2,9 @@
  * (C) Copyright 2004, Psyent Corporation <www.psyent.com>
  * Scott McNutt <smcnutt@psyent.com>
  *
+ * YANU Support:
+ * Copyright 2010, Renato Andreola <renato.andreola@imagos.it>
+ *
  * See file CREDITS for list of people who contributed to this
  * project.
  *
@@ -26,6 +29,7 @@
 #include <watchdog.h>
 #include <asm/io.h>
 #include <nios2-io.h>
+#include <nios2-yanu.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -74,10 +78,172 @@ int serial_getc (void)
 	return (c);
 }
 
+#elif defined(CONFIG_CONSOLE_YANU)
+/*-----------------------------------------------------------------*/
+/* YANU Imagos serial port */
+/*-----------------------------------------------------------------*/
+
+static yanu_uart_t *uart = (yanu_uart_t *)CONFIG_SYS_NIOS_CONSOLE;
+
+#if defined(CONFIG_SYS_NIOS_FIXEDBAUD)
+
+/* Everything's already setup for fixed-baud PTF assignment*/
+
+void serial_setbrg (void)
+{
+	int n, k;
+	const unsigned max_uns = 0xFFFFFFFF;
+	unsigned best_n, best_m, baud;
+
+	/* compute best N and M couple */
+	best_n = YANU_MAX_PRESCALER_N;
+	for (n = YANU_MAX_PRESCALER_N; n >= 0; n--) {
+		if ((unsigned)CONFIG_SYS_CLK_FREQ / (1 << (n + 4)) >=
+		    (unsigned)CONFIG_BAUDRATE) {
+			best_n = n;
+			break;
+		}
+	}
+	for (k = 0;; k++) {
+		if ((unsigned)CONFIG_BAUDRATE <= (max_uns >> (15+n-k)))
+			break;
+	}
+	best_m =
+	    ((unsigned)CONFIG_BAUDRATE * (1 << (15 + n - k))) /
+	    ((unsigned)CONFIG_SYS_CLK_FREQ >> k);
+
+	baud = best_m + best_n * YANU_BAUDE;
+	writel(&uart->baud, baud);
+
+	return;
+}
+
+#else
+
+void serial_setbrg (void)
+{	
+	int n, k;
+	const unsigned max_uns = 0xFFFFFFFF;
+	unsigned best_n, best_m, baud;
+
+	/* compute best N and M couple */
+	best_n = YANU_MAX_PRESCALER_N;
+	for (n = YANU_MAX_PRESCALER_N; n >= 0; n--) {
+		if ((unsigned)CONFIG_SYS_CLK_FREQ / (1 << (n + 4)) >=
+		    gd->baudrate) {
+			best_n = n;
+			break;
+		}
+	}
+	for (k = 0;; k++) {
+		if (gd->baudrate <= (max_uns >> (15+n-k)))
+			break;
+	}
+	best_m =
+	    (gd->baudrate * (1 << (15 + n - k))) /
+	    ((unsigned)CONFIG_SYS_CLK_FREQ >> k);
+
+	baud = best_m + best_n * YANU_BAUDE;
+	writel(&uart->baud, baud);
+
+	return;
+}
+
+
+#endif /* CONFIG_SYS_NIOS_FIXEDBAUD */
+
+int serial_init (void)
+{
+	unsigned action,control;
+
+	/* status register cleanup */
+	action =  YANU_ACTION_RRRDY     |
+		YANU_ACTION_RTRDY       |
+		YANU_ACTION_ROE         |
+		YANU_ACTION_RBRK        |
+		YANU_ACTION_RFE         |
+		YANU_ACTION_RPE         |
+	    YANU_ACTION_RFE | YANU_ACTION_RFIFO_CLEAR | YANU_ACTION_TFIFO_CLEAR;
+
+	writel(&uart->action, action);
+	
+	/*  control register cleanup */
+	/* no interrupts enabled */
+	/* one stop bit */
+	/* hardware flow control disabled */
+	/* 8 bits */
+	control = (0x7 << YANU_CONTROL_BITS_POS);
+	/* enven parity just to be clean */
+	control |= YANU_CONTROL_PAREVEN;
+	/* we set threshold for fifo */
+	control |= YANU_CONTROL_RDYDLY * YANU_RXFIFO_DLY;
+	control |= YANU_CONTROL_TXTHR *  YANU_TXFIFO_THR;
+
+	writel(&uart->control, control);
+
+	/* to set baud rate */
+	serial_setbrg();
+
+	return (0);
+}
+
+
+/*-----------------------------------------------------------------------
+ * YANU CONSOLE
+ *---------------------------------------------------------------------*/
+void serial_putc (char c)
+{
+	int tx_chars;
+	unsigned status;
+
+	if (c == '\n')
+		serial_putc ('\r');
+	
+	while (1) {
+		status = readl(&uart->status);
+		tx_chars = (status>>YANU_TFIFO_CHARS_POS)
+			& ((1<<YANU_TFIFO_CHARS_N)-1);
+		if (tx_chars < YANU_TXFIFO_SIZE-1)
+			break;
+		WATCHDOG_RESET ();
+	}
+
+	writel(&uart->data, (unsigned char)c);
+}
+
+void serial_puts (const char *s)
+{
+	while (*s != 0) {
+		serial_putc (*s++);
+	}
+}
+
+
+int serial_tstc(void)
+{
+	unsigned status ;
+
+	status = readl(&uart->status);
+	return (((status >> YANU_RFIFO_CHARS_POS) &
+		 ((1 << YANU_RFIFO_CHARS_N) - 1)) > 0);
+}	
+
+int serial_getc (void)
+{
+	while (serial_tstc() == 0)
+		WATCHDOG_RESET ();
+	
+	/* first we pull the char */
+	writel(&uart->action, YANU_ACTION_RFIFO_PULL);
+
+	return(readl(&uart->data) & YANU_DATA_CHAR_MASK);
+}
+
+#else /*CONFIG_CONSOLE_YANU*/
+
 /*------------------------------------------------------------------
  * UART the serial port
  *-----------------------------------------------------------------*/
-#else
 
 static nios_uart_t *uart = (nios_uart_t *) CONFIG_SYS_NIOS_CONSOLE;
 

cpu/ppc4xx/cpu_init.c

@@ -111,17 +111,72 @@ void reconfigure_pll(u32 new_cpu_freq)
 			mtcpr(CPR0_SPCID, reg);
 			reset_needed = 1;
 		}
+	}
 
-		/* Set reload inhibit so configuration will persist across
-		 * processor resets */
+	/* Get current value of FWDVA.*/
+	mfcpr(CPR0_PLLD, reg);
+	temp = (reg & PLLD_FWDVA_MASK) >> 16;
+
+	/*
+	 * Check to see if FWDVA has been set to value of 1. if it has we must
+	 * modify it.
+	 */
+	if (temp == 1) {
+		mfcpr(CPR0_PLLD, reg);
+		/* Get current value of fbdv.  */
+		temp = (reg & PLLD_FBDV_MASK) >> 24;
+		fbdv = temp ? temp : 32;
+		/* Get current value of lfbdv. */
+		temp = (reg & PLLD_LFBDV_MASK);
+		lfbdv = temp ? temp : 64;
+		/*
+		 * Load register that contains current boot strapping option.
+		 */
+		mfcpr(CPR0_ICFG, reg);
+		/* Shift strapping option into low 3 bits.*/
+		reg = (reg >> 28);
+
+		if ((reg == BOOT_STRAP_OPTION_A) || (reg == BOOT_STRAP_OPTION_B) ||
+		    (reg == BOOT_STRAP_OPTION_D) || (reg == BOOT_STRAP_OPTION_E)) {
+			/*
+			 * Get current value of FWDVA. Assign current FWDVA to
+			 * new FWDVB.
+			 */
+			mfcpr(CPR0_PLLD, reg);
+			target_fwdvb = (reg & PLLD_FWDVA_MASK) >> 16;
+			fwdvb = target_fwdvb ? target_fwdvb : 8;
+			/*
+			 * Get current value of FWDVB. Assign current FWDVB to
+			 * new FWDVA.
+			 */
+			target_fwdva = (reg & PLLD_FWDVB_MASK) >> 8;
+			fwdva = target_fwdva ? target_fwdva : 16;
+			/*
+			 * Update CPR0_PLLD with switched FWDVA and FWDVB.
+			 */
+			reg &= ~(PLLD_FWDVA_MASK | PLLD_FWDVB_MASK |
+				PLLD_FBDV_MASK | PLLD_LFBDV_MASK);
+			reg |= ((fwdva == 16 ? 0 : fwdva) << 16) |
+				((fwdvb == 8 ? 0 : fwdvb) << 8) |
+				((fbdv == 32 ? 0 : fbdv) << 24) |
+				(lfbdv == 64 ? 0 : lfbdv);
+			mtcpr(CPR0_PLLD, reg);
+			/* Acknowledge that a reset is required. */
+			reset_needed = 1;
+		}
+	}
+
+	if (reset_needed) {
+		/*
+		 * Set reload inhibit so configuration will persist across
+		 * processor resets
+		 */
 		mfcpr(CPR0_ICFG, reg);
 		reg &= ~CPR0_ICFG_RLI_MASK;
 		reg |= 1 << 31;
 		mtcpr(CPR0_ICFG, reg);
-	}
 
-	/* Reset processor if configuration changed */
-	if (reset_needed) {
+		/* Reset processor if configuration changed */
 		__asm__ __volatile__ ("sync; isync");
 		mtspr(SPRN_DBCR0, 0x20000000);
 	}

cpu/ppc4xx/i2c.c

@@ -93,7 +93,7 @@ static void _i2c_bus_reset(void)
 
 void i2c_init(int speed, int slaveaddr)
 {
-	struct ppc4xx_i2c *i2c = (struct ppc4xx_i2c *)I2C_BASE_ADDR;
+	struct ppc4xx_i2c *i2c;
 	int val, divisor;
 	int bus;
 
@@ -109,6 +109,9 @@ void i2c_init(int speed, int slaveaddr)
 	for (bus = 0; bus < CONFIG_SYS_MAX_I2C_BUS; bus++) {
 		I2C_SET_BUS(bus);
 
+		/* Set i2c pointer after calling I2C_SET_BUS() */
+		i2c = (struct ppc4xx_i2c *)I2C_BASE_ADDR;
+
 		/* Handle possible failed I2C state */
 		/* FIXME: put this into i2c_init_board()? */
 		_i2c_bus_reset();

doc/README.enetaddr

@@ -28,6 +28,17 @@ Here are the places where MAC addresses might be stored:
 	      purpose of passing this information to an OS kernel we are about
 	      to boot
 
+Correct flow of setting up the MAC address (summarized):
+
+1. Read from hardware in initialize() function
+2. Read from environment in net/eth.c after initialize()
+3. Give priority to the value in the environment if a conflict
+4. Program hardware in the device's init() function.
+
+If somebody wants to subvert the design philosophy, this can be done
+in the board-specific board_eth_init() function by calling eth_init()
+after all the NICs have been registered.
+
 -------
  Usage
 -------

doc/README.ml300

@@ -1,128 +0,0 @@
-Xilinx ML300 platform
-=====================
-
-0. Introduction
----------------
-
-The Xilinx ML300 board is based on the Virtex-II Pro FPGA with
-integrated AMCC PowerPC 405 core. The board is normally booted from
-System ACE CF. U-Boot is then run out of main memory.
-
-An FPGA is a configurable and thus very flexible device. To
-accommodate for this flexibility this port of U-Boot includes the
-required means to regenerate the drivers and configuration files if
-you decide to change the hardware design. The required steps are
-described below.
-
-
-1. Requirements
----------------
-
-To compile and run U-Boot on the Xilinx ML300 platform you need the
-following items.
-
-- A Xilinx ML300 platform (see http://www.xilinx.com/ml300)
-- EDK and ISE development tools (shipping with ML300)
-- Parallel4 cable (shipping with ML300)
-- The EDK reference design for ML300. You can get this as design #6 from
-  http://www.xilinx.com/ise/embedded/edk_examples.htm
-- A BOOTP/TFTP server
-
-
-2. Quick Start
---------------
-
-To compile and run U-Boot on ML300 follow the steps below. Make sure
-to consult the documentation for U-Boot, EDK, and the EDK reference
-design for ML300 if you have any questions.
-
-1. Implement the EDK reference design for ML300. You can use any of
-   the project files, for example from a xygwin shell:
-   $ xps -nw system_linux.xmp
-   XPS% run init_bram
-2. Configure and compile U-Boot. Change into the root directory of
-   U-Boot and run:
-   $ export CROSS_COMPILE=powerpc-eabi-
-   $ make ml300_config
-   $ make
-3. Set up the ML300, connect the Parallel4 and the serial cable. Start
-   a terminal on your host computer and set the communication
-   parameters to 9600,8N1,no handshake.
-4. Set up the BOOTP/TFTP server on your host machine. U-Boot is
-   preconfigured to use a fixed HW MAC address of 00:0A:35:00:22:01.
-5. Download the bitstream to the ML300.
-6. Use XMD to download and run U-Boot on the ML300:
-   $ xmd
-   XMD% ppcconnect
-   XMD% dow u-boot
-   XMD% run
-
-You can now make an ACE file out of bitstream and U-Boot:
-   $ xmd genace.tcl -jprog -board ml300 -hw  \
-     implementation/download.bit -elf u-boot -ace top.ace
-
-Put the ACE file onto the MicroDrive, for example into xilinx/myace,
-and reboot ML300.
-
-
-3. Generating a Custom BSP for U-Boot
--------------------------------------
-
-If you decide to change the EDK reference design for ML300 or if you
-build a new design from scratch either with the Base System Builder in
-XPS or all by hand you most likely will change the base addresses for
-the Uart and the Ethernet peripheral. If you do so you will have two
-options:
-
-1. Edit boards/xilinx/ml300/xparameters.h to reflect the changes you
-   made to your hardware.
-2. Use the MLD technology provided by Xilinx Platform Studio to make
-   the changes automatically. To do so go to the root directory of the
-   EDK reference design for ML300. Copy the Linux project file and the
-   Linux software configuration file:
-   $ cp system_linux.xmp system_uboot.xmp
-   $ cp system_linux.mss system_uboot.mss
-
-   Edit system_uboot.xmp and and have it point to system_uboot.mss for
-   the software configuration.
-
-   Then, copy the sw_services directory in
-   boards/xilinx/ml300/sw_services to the root directory of the EDK
-   reference design for ML300.
-   $ cp -R <uboot dir>/boards/xilinx/ml300/sw_services <edk dir>
-
-   Modify system_uboot.mss. Look for the Linux library definition
-   and change it to generate a BSP for U-Boot. An example, might look
-   like this:
-
-   BEGIN LIBRARY
-    PARAMETER LIBRARY_NAME = uboot
-    PARAMETER LIBRARY_VER = 1.00.a
-    PARAMETER CONNECTED_PERIPHS = (opb_uart16550_0,opb_ethernet_0)
-    PARAMETER TARGET_DIR = <uboot dir>
-   END
-
-   Now, you are ready to generate the Xilinx ML300 BSP for U-Boot:
-   $ xps -nw system_uboot.xmp
-   XPS% run libs
-
-   If all goes well the new configuration has been copied into the
-   right places within the U-Boot source tree. Recompile U-Boot and
-   run it on the ML300.
-
-
-4. ToDo
--------
-
-- Add support for all other peripherals on ML300.
-- Read the MAC address out of the IIC EEPROM.
-- Store the bootargs in the IIC EEPROM.
-
-
-5. References
--------------
-
-ML300:			http://www.xilinx.com/ml300
-EDK:			http://www.xilinx.com/edk
-ISE:			http://www.xilinx.com/ise
-Reference Design:	http://www.xilinx.com/ise/embedded/edk_examples.htm

doc/uImage.FIT/multi.its

@@ -61,6 +61,8 @@
 			arch = "ppc";
 			os = "linux";
 			compression = "gzip";
+			load = <00000000>;
+			entry = <00000000>;
 			hash@1 {
 				algo = "sha1";
 			};
@@ -73,6 +75,8 @@
 			arch = "ppc";
 			os = "linux";
 			compression = "gzip";
+			load = <00000000>;
+			entry = <00000000>;
 			hash@1 {
 				algo = "crc32";
 			};

drivers/mmc/mxcmmc.c

@@ -136,14 +136,14 @@ static void mxcmci_softreset(struct mxcmci_host *host)
 	int i;
 
 	/* reset sequence */
-	writew(STR_STP_CLK_RESET, &host->base->str_stp_clk);
-	writew(STR_STP_CLK_RESET | STR_STP_CLK_START_CLK,
+	writel(STR_STP_CLK_RESET, &host->base->str_stp_clk);
+	writel(STR_STP_CLK_RESET | STR_STP_CLK_START_CLK,
 			&host->base->str_stp_clk);
 
 	for (i = 0; i < 8; i++)
-		writew(STR_STP_CLK_START_CLK, &host->base->str_stp_clk);
+		writel(STR_STP_CLK_START_CLK, &host->base->str_stp_clk);
 
-	writew(0xff, &host->base->res_to);
+	writel(0xff, &host->base->res_to);
 }
 
 static void mxcmci_setup_data(struct mxcmci_host *host, struct mmc_data *data)
@@ -154,8 +154,8 @@ static void mxcmci_setup_data(struct mxcmci_host *host, struct mmc_data *data)
 
 	host->data = data;
 
-	writew(nob, &host->base->nob);
-	writew(blksz, &host->base->blk_len);
+	writel(nob, &host->base->nob);
+	writel(blksz, &host->base->blk_len);
 	host->datasize = datasize;
 }
 
@@ -185,9 +185,9 @@ static int mxcmci_start_cmd(struct mxcmci_host *host, struct mmc_cmd *cmd,
 		return -EINVAL;
 	}
 
-	writew(cmd->cmdidx, &host->base->cmd);
+	writel(cmd->cmdidx, &host->base->cmd);
 	writel(cmd->cmdarg, &host->base->arg);
-	writew(cmdat, &host->base->cmd_dat_cont);
+	writel(cmdat, &host->base->cmd_dat_cont);
 
 	return 0;
 }
@@ -247,14 +247,14 @@ static int mxcmci_read_response(struct mxcmci_host *host, unsigned int stat)
 	if (cmd->resp_type & MMC_RSP_PRESENT) {
 		if (cmd->resp_type & MMC_RSP_136) {
 			for (i = 0; i < 4; i++) {
-				a = readw(&host->base->res_fifo);
-				b = readw(&host->base->res_fifo);
+				a = readl(&host->base->res_fifo) & 0xFFFF;
+				b = readl(&host->base->res_fifo) & 0xFFFF;
 				resp[i] = a << 16 | b;
 			}
 		} else {
-			a = readw(&host->base->res_fifo);
-			b = readw(&host->base->res_fifo);
-			c = readw(&host->base->res_fifo);
+			a = readl(&host->base->res_fifo) & 0xFFFF;
+			b = readl(&host->base->res_fifo) & 0xFFFF;
+			c = readl(&host->base->res_fifo) & 0xFFFF;
 			resp[0] = a << 24 | b << 8 | c >> 8;
 		}
 	}
@@ -445,7 +445,7 @@ static void mxcmci_set_clk_rate(struct mxcmci_host *host, unsigned int clk_ios)
 			prescaler <<= 1;
 	}
 
-	writew((prescaler << 4) | divider, &host->base->clk_rate);
+	writel((prescaler << 4) | divider, &host->base->clk_rate);
 }
 
 static void mxcmci_set_ios(struct mmc *mmc)
@@ -458,9 +458,9 @@ static void mxcmci_set_ios(struct mmc *mmc)
 
 	if (mmc->clock) {
 		mxcmci_set_clk_rate(host, mmc->clock);
-		writew(STR_STP_CLK_START_CLK, &host->base->str_stp_clk);
+		writel(STR_STP_CLK_START_CLK, &host->base->str_stp_clk);
 	} else {
-		writew(STR_STP_CLK_STOP_CLK, &host->base->str_stp_clk);
+		writel(STR_STP_CLK_STOP_CLK, &host->base->str_stp_clk);
 	}
 
 	host->clock = mmc->clock;
@@ -472,7 +472,7 @@ static int mxcmci_init(struct mmc *mmc)
 
 	mxcmci_softreset(host);
 
-	host->rev_no = readw(&host->base->rev_no);
+	host->rev_no = readl(&host->base->rev_no);
 	if (host->rev_no != 0x400) {
 		printf("wrong rev.no. 0x%08x. aborting.\n",
 			host->rev_no);
@@ -480,7 +480,7 @@ static int mxcmci_init(struct mmc *mmc)
 	}
 
 	/* recommended in data sheet */
-	writew(0x2db4, &host->base->read_to);
+	writel(0x2db4, &host->base->read_to);
 
 	writel(0, &host->base->int_cntr);
 

drivers/mtd/cfi_flash.c

@@ -537,7 +537,10 @@ static int flash_status_check (flash_info_t * info, flash_sect_t sector,
 	ulong start;
 
 #if CONFIG_SYS_HZ != 1000
-	tout *= CONFIG_SYS_HZ/1000;
+	if ((ulong)CONFIG_SYS_HZ > 100000)
+		tout *= (ulong)CONFIG_SYS_HZ / 1000;  /* for a big HZ, avoid overflow */
+	else
+		tout = DIV_ROUND_UP(tout * (ulong)CONFIG_SYS_HZ, 1000);
 #endif
 
 	/* Wait for command completion */

drivers/net/fec_mxc.c

@@ -752,7 +752,6 @@ static int fec_probe(bd_t *bd)
 	if (fec_get_hwaddr(edev, ethaddr) == 0) {
 		printf("got MAC address from EEPROM: %pM\n", ethaddr);
 		memcpy(edev->enetaddr, ethaddr, 6);
-		fec_set_hwaddr(edev);
 	}
 
 	return 0;

drivers/pci/pci.c

@@ -388,7 +388,7 @@ int pci_hose_config_device(struct pci_controller *hose,
 
 	pci_hose_write_config_dword (hose, dev, PCI_COMMAND, 0);
 
-	for (bar = PCI_BASE_ADDRESS_0; bar < PCI_BASE_ADDRESS_5; bar += 4) {
+	for (bar = PCI_BASE_ADDRESS_0; bar <= PCI_BASE_ADDRESS_5; bar += 4) {
 		pci_hose_write_config_dword (hose, dev, bar, 0xffffffff);
 		pci_hose_read_config_dword (hose, dev, bar, &bar_response);
 

drivers/video/cfb_console.c

@@ -260,7 +260,7 @@ void	console_cursor (int state);
 #define CURSOR_ON
 #define CURSOR_OFF
 #define CURSOR_SET video_set_hw_cursor(console_col * VIDEO_FONT_WIDTH, \
-		  (console_row * VIDEO_FONT_HEIGHT) + VIDEO_LOGO_HEIGHT);
+		  (console_row * VIDEO_FONT_HEIGHT) + video_logo_height);
 #endif	/* CONFIG_VIDEO_HW_CURSOR */
 
 #ifdef	CONFIG_VIDEO_LOGO
@@ -298,7 +298,7 @@ void	console_cursor (int state);
 #define VIDEO_BURST_LEN		(VIDEO_COLS/8)
 
 #ifdef	CONFIG_VIDEO_LOGO
-#define CONSOLE_ROWS		((VIDEO_ROWS - VIDEO_LOGO_HEIGHT) / VIDEO_FONT_HEIGHT)
+#define CONSOLE_ROWS		((VIDEO_ROWS - video_logo_height) / VIDEO_FONT_HEIGHT)
 #else
 #define CONSOLE_ROWS		(VIDEO_ROWS / VIDEO_FONT_HEIGHT)
 #endif
@@ -349,6 +349,8 @@ static GraphicDevice *pGD;	/* Pointer to Graphic array */
 static void *video_fb_address;		/* frame buffer address */
 static void *video_console_address;	/* console buffer start address */
 
+static int video_logo_height = VIDEO_LOGO_HEIGHT;
+
 static int console_col = 0; /* cursor col */
 static int console_row = 0; /* cursor row */
 
@@ -527,7 +529,7 @@ static inline void video_drawstring (int xx, int yy, unsigned char *s)
 
 static void video_putchar (int xx, int yy, unsigned char c)
 {
-	video_drawchars (xx, yy + VIDEO_LOGO_HEIGHT, &c, 1);
+	video_drawchars (xx, yy + video_logo_height, &c, 1);
 }
 
 /*****************************************************************************/
@@ -620,11 +622,11 @@ static void console_scrollup (void)
 #ifdef VIDEO_HW_BITBLT
 	video_hw_bitblt (VIDEO_PIXEL_SIZE,	/* bytes per pixel */
 			 0,	/* source pos x */
-			 VIDEO_LOGO_HEIGHT + VIDEO_FONT_HEIGHT, /* source pos y */
+			 video_logo_height + VIDEO_FONT_HEIGHT, /* source pos y */
 			 0,	/* dest pos x */
-			 VIDEO_LOGO_HEIGHT,	/* dest pos y */
+			 video_logo_height,	/* dest pos y */
 			 VIDEO_VISIBLE_COLS,	/* frame width */
-			 VIDEO_VISIBLE_ROWS - VIDEO_LOGO_HEIGHT - VIDEO_FONT_HEIGHT	/* frame height */
+			 VIDEO_VISIBLE_ROWS - video_logo_height - VIDEO_FONT_HEIGHT	/* frame height */
 		);
 #else
 	memcpyl (CONSOLE_ROW_FIRST, CONSOLE_ROW_SECOND,
@@ -1101,7 +1103,7 @@ void logo_plot (void *screen, int width, int x, int y)
 
 	int xcount, i;
 	int skip   = (width - VIDEO_LOGO_WIDTH) * VIDEO_PIXEL_SIZE;
-	int ycount = VIDEO_LOGO_HEIGHT;
+	int ycount = video_logo_height;
 	unsigned char r, g, b, *logo_red, *logo_blue, *logo_green;
 	unsigned char *source;
 	unsigned char *dest = (unsigned char *)screen +
@@ -1225,6 +1227,7 @@ static void *video_logo (void)
 #endif /* CONFIG_SPLASH_SCREEN_ALIGN */
 
 		if (video_display_bitmap (addr, x, y) == 0) {
+			video_logo_height = 0;
 			return ((void *) (video_fb_address));
 		}
 	}
@@ -1249,7 +1252,7 @@ static void *video_logo (void)
 
 #ifdef CONFIG_CONSOLE_EXTRA_INFO
 	{
-		int i, n = ((VIDEO_LOGO_HEIGHT - VIDEO_FONT_HEIGHT) / VIDEO_FONT_HEIGHT);
+		int i, n = ((video_logo_height - VIDEO_FONT_HEIGHT) / VIDEO_FONT_HEIGHT);
 
 		for (i = 1; i < n; i++) {
 			video_get_info_str (i, info);
@@ -1278,7 +1281,7 @@ static void *video_logo (void)
 	}
 #endif
 
-	return (video_fb_address + VIDEO_LOGO_HEIGHT * VIDEO_LINE_LEN);
+	return (video_fb_address + video_logo_height * VIDEO_LINE_LEN);
 }
 #endif
 

fs/jffs2/jffs2_1pass.c

@@ -398,23 +398,26 @@ static inline void *get_fl_mem(u32 off, u32 size, void *ext_buf)
 {
 	struct mtdids *id = current_part->dev->id;
 
+	switch(id->type) {
 #if defined(CONFIG_CMD_FLASH)
-	if (id->type == MTD_DEV_TYPE_NOR) {
+	case MTD_DEV_TYPE_NOR:
 		return get_fl_mem_nor(off, size, ext_buf);
-	}
+		break;
 #endif
-
 #if defined(CONFIG_JFFS2_NAND) && defined(CONFIG_CMD_NAND)
-	if (id->type == MTD_DEV_TYPE_NAND)
+	case MTD_DEV_TYPE_NAND:
 		return get_fl_mem_nand(off, size, ext_buf);
+		break;
 #endif
-
 #if defined(CONFIG_CMD_ONENAND)
-	if (id->type == MTD_DEV_TYPE_ONENAND)
+	case MTD_DEV_TYPE_ONENAND:
 		return get_fl_mem_onenand(off, size, ext_buf);
+		break;
 #endif
-
-	printf("get_fl_mem: unknown device type, using raw offset!\n");
+	default:
+		printf("get_fl_mem: unknown device type, " \
+			"using raw offset!\n");
+	}
 	return (void*)off;
 }
 
@@ -422,23 +425,27 @@ static inline void *get_node_mem(u32 off, void *ext_buf)
 {
 	struct mtdids *id = current_part->dev->id;
 
+	switch(id->type) {
 #if defined(CONFIG_CMD_FLASH)
-	if (id->type == MTD_DEV_TYPE_NOR)
+	case MTD_DEV_TYPE_NOR:
 		return get_node_mem_nor(off, ext_buf);
+		break;
 #endif
-
 #if defined(CONFIG_JFFS2_NAND) && \
     defined(CONFIG_CMD_NAND)
-	if (id->type == MTD_DEV_TYPE_NAND)
+	case MTD_DEV_TYPE_NAND:
 		return get_node_mem_nand(off, ext_buf);
+		break;
 #endif
-
 #if defined(CONFIG_CMD_ONENAND)
-	if (id->type == MTD_DEV_TYPE_ONENAND)
+	case MTD_DEV_TYPE_ONENAND:
 		return get_node_mem_onenand(off, ext_buf);
+		break;
 #endif
-
-	printf("get_node_mem: unknown device type, using raw offset!\n");
+	default:
+		printf("get_fl_mem: unknown device type, " \
+			"using raw offset!\n");
+	}
 	return (void*)off;
 }
 

include/asm-arm/arch-at91/at91_matrix.h

@@ -80,7 +80,7 @@ typedef struct at91_matrix {
 	u32		mrcr;		/* 0x100 Master Remap Control */
 	u32		reserve4[3];
 #if	defined(CONFIG_AT91SAM9G45)
-	u32		ccr[52]		/* 0x110 - 0x1E0 Chip Configuration */
+	u32		ccr[52];	/* 0x110 - 0x1E0 Chip Configuration */
 	u32		womr;		/* 0x1E4 Write Protect Mode  */
 	u32		wpsr;		/* 0x1E8 Write Protect Status */
 	u32		resg45_1[10];

include/asm-blackfin/unaligned.h

@@ -0,0 +1 @@
+#include <asm-generic/unaligned.h>

include/asm-generic/unaligned.h

@@ -0,0 +1,23 @@
+#ifndef _GENERIC_UNALIGNED_H
+#define _GENERIC_UNALIGNED_H
+
+#include <asm/byteorder.h>
+
+#include <linux/unaligned/le_byteshift.h>
+#include <linux/unaligned/be_byteshift.h>
+#include <linux/unaligned/generic.h>
+
+/*
+ * Select endianness
+ */
+#if defined(__LITTLE_ENDIAN)
+#define get_unaligned	__get_unaligned_le
+#define put_unaligned	__put_unaligned_le
+#elif defined(__BIG_ENDIAN)
+#define get_unaligned	__get_unaligned_be
+#define put_unaligned	__put_unaligned_be
+#else
+#error invalid endian
+#endif
+
+#endif

include/asm-nios2/unaligned.h

@@ -0,0 +1,6 @@
+#ifndef _ASM_NIOS2_UNALIGNED_H
+#define _ASM_NIOS2_UNALIGNED_H
+
+#include <asm-generic/unaligned.h>
+
+#endif /* _ASM_NIOS2_UNALIGNED_H */

include/asm-ppc/mmu.h

@@ -213,7 +213,11 @@ extern void print_bats(void);
 #define BATL_PADDR(x) ((phys_addr_t)((x & 0xfffe0000)		\
 				     | ((x & 0x0e00ULL) << 24)	\
 				     | ((x & 0x04ULL) << 30)))
-#define BATU_SIZE(x) (1UL << (fls((x & BATU_BL_MAX) >> 2) + 17))
+#define BATU_SIZE(x) (1ULL << (fls((x & BATU_BL_MAX) >> 2) + 17))
+
+/* bytes into BATU_BL */
+#define TO_BATU_BL(x) \
+	(u32)((((1ull << __ilog2_u64((u64)x)) / (128 * 1024)) - 1) * 4)
 
 /* Used to set up SDR1 register */
 #define HASH_TABLE_SIZE_64K	0x00010000

include/asm-ppc/processor.h

@@ -485,10 +485,12 @@
 #define SPRN_L2CFG0	0x207	/* L2 Cache Configuration Register 0 */
 #define SPRN_L1CSR0	0x3f2	/* L1 Data Cache Control and Status Register 0 */
 #define   L1CSR0_CPE		0x00010000	/* Data Cache Parity Enable */
+#define   L1CSR0_DCLFR		0x00000100	/* D-Cache Lock Flash Reset */
 #define   L1CSR0_DCFI		0x00000002	/* Data Cache Flash Invalidate */
 #define   L1CSR0_DCE		0x00000001	/* Data Cache Enable */
 #define SPRN_L1CSR1	0x3f3	/* L1 Instruction Cache Control and Status Register 1 */
 #define   L1CSR1_CPE		0x00010000	/* Instruction Cache Parity Enable */
+#define   L1CSR1_ICLFR		0x00000100	/* I-Cache Lock Flash Reset */
 #define   L1CSR1_ICFI		0x00000002	/* Instruction Cache Flash Invalidate */
 #define   L1CSR1_ICE		0x00000001	/* Instruction Cache Enable */
 #define SPRN_L1CSR2	0x25e	/* L1 Data Cache Control and Status Register 2 */

include/configs/MPC8610HPCD.h

@@ -341,10 +341,8 @@
  * BAT0		2G	Cacheable, non-guarded
  * 0x0000_0000	2G	DDR
  */
-#define CONFIG_SYS_DBAT0L	(BATL_PP_RW | BATL_MEMCOHERENCE)
-#define CONFIG_SYS_DBAT0U	(BATU_BL_2G | BATU_VS | BATU_VP)
-#define CONFIG_SYS_IBAT0L	(BATL_PP_RW | BATL_MEMCOHERENCE )
-#define CONFIG_SYS_IBAT0U	CONFIG_SYS_DBAT0U
+#define CONFIG_SYS_DBAT0L	(BATL_PP_RW)
+#define CONFIG_SYS_IBAT0L	(BATL_PP_RW)
 
 /*
  * BAT1		1G	Cache-inhibited, guarded

include/configs/MPC8641HPCN.h

@@ -482,9 +482,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
  * BAT0		DDR
  */
 #define CONFIG_SYS_DBAT0L	(BATL_PP_RW | BATL_MEMCOHERENCE)
-#define CONFIG_SYS_DBAT0U	(BATU_BL_2G | BATU_VS | BATU_VP)
-#define CONFIG_SYS_IBAT0L	(BATL_PP_RW | BATL_MEMCOHERENCE )
-#define CONFIG_SYS_IBAT0U	CONFIG_SYS_DBAT0U
+#define CONFIG_SYS_IBAT0L	(BATL_PP_RW | BATL_MEMCOHERENCE)
 
 /*
  * BAT1		LBC (PIXIS/CF)

include/configs/ml300.h

@@ -1,181 +0,0 @@
-/*
- * ML300.h: ML300 specific config options
- *
- * http://www.xilinx.com/ml300
- *
- * Derived from : ML2.h
- *
- *     Author: Xilinx, Inc.
- *
- *
- *     This program is free software; you can redistribute it and/or modify it
- *     under the terms of the GNU General Public License as published by the
- *     Free Software Foundation; either version 2 of the License, or (at your
- *     option) any later version.
- *
- *
- *     XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" AS A
- *     COURTESY TO YOU. BY PROVIDING THIS DESIGN, CODE, OR INFORMATION AS
- *     ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, APPLICATION OR STANDARD,
- *     XILINX IS MAKING NO REPRESENTATION THAT THIS IMPLEMENTATION IS FREE
- *     FROM ANY CLAIMS OF INFRINGEMENT, AND YOU ARE RESPONSIBLE FOR
- *     OBTAINING ANY RIGHTS YOU MAY REQUIRE FOR YOUR IMPLEMENTATION.
- *     XILINX EXPRESSLY DISCLAIMS ANY WARRANTY WHATSOEVER WITH RESPECT TO
- *     THE ADEQUACY OF THE IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY
- *     WARRANTIES OR REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM
- *     CLAIMS OF INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND
- *     FITNESS FOR A PARTICULAR PURPOSE.
- *
- *
- *     Xilinx products are not intended for use in life support appliances,
- *     devices, or systems. Use in such applications is expressly prohibited.
- *
- *
- *     (c) Copyright 2002 Xilinx Inc.
- *     All rights reserved.
- *
- *
- *     You should have received a copy of the GNU General Public License along
- *     with this program; if not, write to the Free Software Foundation, Inc.,
- *     675 Mass Ave, Cambridge, MA 02139, USA.
- *
- */
-
-#ifndef __CONFIG_H
-#define __CONFIG_H
-
-/* #define DEBUG */
-/* #define ET_DEBUG 1 */
-
-/*
- * High Level Configuration Options
- * (easy to change)
- */
-
-#define CONFIG_405		1	/* This is a PPC405 CPU		*/
-#define CONFIG_4xx		1	/* ...member of PPC4xx family	*/
-#define CONFIG_XILINX_405	1
-#define CONFIG_XILINX_ML300	1	/* ...on a Xilinx ML300 board	*/
-
-#define CONFIG_SYSTEMACE	1
-#define CONFIG_DOS_PARTITION	1
-#define CONFIG_SYS_SYSTEMACE_BASE	XPAR_OPB_SYSACE_0_BASEADDR
-#define CONFIG_SYS_SYSTEMACE_WIDTH	XPAR_XSYSACE_MEM_WIDTH
-
-#define CONFIG_ENV_IS_IN_EEPROM	1	/* environment is in EEPROM */
-
-/* following are used only if env is in EEPROM */
-#ifdef	CONFIG_ENV_IS_IN_EEPROM
-#define CONFIG_SYS_I2C_EEPROM_ADDR	XPAR_PERSISTENT_0_IIC_0_EEPROMADDR
-#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
-#define CONFIG_ENV_OFFSET		XPAR_PERSISTENT_0_IIC_0_BASEADDR
-#define CONFIG_MISC_INIT_R	1	/* used to call out convert_env() */
-#define CONFIG_ENV_OVERWRITE	1	/* allow users to update ethaddr and serial# */
-#endif
-
-#include "../board/xilinx/ml300/xparameters.h"
-
-#define CONFIG_SYS_NO_FLASH		1	/* no flash */
-#define CONFIG_ENV_SIZE		XPAR_PERSISTENT_0_IIC_0_HIGHADDR - XPAR_PERSISTENT_0_IIC_0_BASEADDR + 1
-#define CONFIG_BAUDRATE		9600
-#define CONFIG_BOOTDELAY	3	/* autoboot after 3 seconds	*/
-
-#define CONFIG_BOOTCOMMAND	"bootp" /* autoboot command	*/
-
-#define CONFIG_BOOTARGS		"console=ttyS0,9600 ip=off " \
-				"root=/dev/xsysace/disc0/part3 rw"
-
-#define CONFIG_LOADS_ECHO	1	/* echo on for serial download	*/
-#define CONFIG_SYS_LOADS_BAUD_CHANGE	1	/* allow baudrate change	*/
-
-
-/*
- * BOOTP options
- */
-#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
-
-
-/*
- * Command line configuration.
- */
-#include <config_cmd_default.h>
-
-#define CONFIG_CMD_NET
-
-#undef CONFIG_CMD_FLASH
-#undef CONFIG_CMD_LOADS
-#undef CONFIG_CMD_FAT
-#undef CONFIG_CMD_IMLS
-
-
-/* #define CONFIG_SYS_CLK_FREQ XPAR_CORE_CLOCK_FREQ_HZ */
-/* 300000000 */
-
-/*
- * Miscellaneous configurable options
- */
-#define CONFIG_SYS_LONGHELP		/* undef to save memory		*/
-#define CONFIG_SYS_PROMPT	"=> "	/* Monitor Command Prompt	*/
-
-#define CONFIG_SYS_CBSIZE	256	/* Console I/O Buffer Size	*/
-
-#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)	/* Print Buffer Size */
-#define CONFIG_SYS_MAXARGS	16	/* max number of command args	*/
-#define CONFIG_SYS_BARGSIZE	CONFIG_SYS_CBSIZE	/* Boot Argument Buffer Size	*/
-
-#define CONFIG_SYS_MEMTEST_START	0x0400000	/* memtest works on	*/
-#define CONFIG_SYS_MEMTEST_END		0x0C00000	/* 4 ... 12 MB in DRAM	*/
-
-#define CONFIG_SYS_DUART_CHAN		0
-#define CONFIG_SYS_NS16550_REG_SIZE -4
-#define CONFIG_SYS_NS16550 1
-#define CONFIG_SYS_INIT_CHAN1	 1
-
-/* The following table includes the supported baudrates */
-#define CONFIG_SYS_BAUDRATE_TABLE  \
-    {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
-
-#define CONFIG_SYS_LOAD_ADDR		0x400000	/* default load address */
-#define CONFIG_SYS_EXTBDINFO		1	/* To use extended board_into (bd_t) */
-
-#define CONFIG_SYS_HZ		1000	/* decrementer freq: 1 ms ticks */
-
-/*-----------------------------------------------------------------------
- * Start addresses for the final memory configuration
- * (Set up by the startup code)
- * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
- */
-#define CONFIG_SYS_SDRAM_BASE		0x00000000
-#define CONFIG_SYS_MONITOR_BASE	0x04000000
-#define CONFIG_SYS_MONITOR_LEN		(192 * 1024)	/* Reserve 196 kB for Monitor	*/
-#define CONFIG_SYS_MALLOC_LEN		(128 * 1024)	/* Reserve 128 kB for malloc()	*/
-
-/*
- * For booting Linux, the board info and command line data
- * have to be in the first 8 MB of memory, since this is
- * the maximum mapped by the Linux kernel during initialization.
- */
-#define CONFIG_SYS_BOOTMAPSZ		(8 << 20)	/* Initial Memory map for Linux */
-
-/*-----------------------------------------------------------------------
- * Definitions for initial stack pointer and data area (in DPRAM)
- */
-
-#define CONFIG_SYS_INIT_RAM_ADDR	0x800000  /* inside of SDRAM */
-#define CONFIG_SYS_INIT_RAM_END	0x2000	  /* End of used area in RAM */
-#define CONFIG_SYS_GBL_DATA_SIZE	128	  /* size in bytes reserved for initial data */
-#define CONFIG_SYS_GBL_DATA_OFFSET    (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_GBL_DATA_OFFSET
-
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD	0x01	/* Normal Power-On: Boot from FLASH	*/
-#define BOOTFLAG_WARM	0x02	/* Software reboot			*/
-
-#endif				/* __CONFIG_H */

include/configs/otc570.h

@@ -102,6 +102,7 @@
 	at91_set_pio_output(AT91_PIO_PORTB, 4, 0); \
 	at91_set_pio_output(AT91_PIO_PORTB, 5, 0); \
 }
+#define I2C_SOFT_DECLARATIONS
 /* Configure data pin as output */
 #define I2C_ACTIVE		at91_set_pio_output(AT91_PIO_PORTB, 4, 0)
 /* Configure data pin as input */

include/mpc86xx.h

@@ -83,5 +83,7 @@ static __inline__ unsigned long get_l2cr (void)
    return l2cr_val;
 }
 
+void setup_ddr_bat(phys_addr_t dram_size);
+
 #endif  /* _ASMLANGUAGE */
 #endif	/* __MPC86xx_H__ */

include/nios2-yanu.h

@@ -0,0 +1,115 @@
+/*
+ * (C) Copyright 2006, Imagos S.a.s <www.imagos.it>
+ * Renato Andreola <renato.andreola@imagos.it>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*************************************************************************
+ * Altera NiosII YANU serial interface by Imagos
+ * please see  http://www.opencores.org/project,yanu for
+ * information/downloads
+ ************************************************************************/
+
+#ifndef __NIOS2_YANU_H__
+#define __NIOS2_YANU_H__
+
+#define YANU_MAX_PRESCALER_N   ((1 << 4) - 1)	/* 15 */
+#define YANU_MAX_PRESCALER_M   ((1 << 11) -1)	/* 2047 */
+#define YANU_FIFO_SIZE         (16)
+#define YANU_RXFIFO_SIZE       (YANU_FIFO_SIZE)
+#define YANU_TXFIFO_SIZE       (YANU_FIFO_SIZE)
+
+#define YANU_RXFIFO_DLY        (10*11)
+#define YANU_TXFIFO_THR        (10)
+#define YANU_DATA_CHAR_MASK    (0xFF)
+
+/* data register */
+#define YANU_DATA_OFFSET       (0)	/* data register offset */
+
+#define YANU_CONTROL_OFFSET    (4)	/* control register offset */
+/* interrupt enable */
+#define YANU_CONTROL_IE_RRDY   (1<<0)	/* ie on received character ready */
+#define YANU_CONTROL_IE_OE     (1<<1)	/* ie on rx overrun    */
+#define YANU_CONTROL_IE_BRK    (1<<2)	/* ie on break detect  */
+#define YANU_CONTROL_IE_FE     (1<<3)	/* ie on framing error */
+#define YANU_CONTROL_IE_PE     (1<<4)	/* ie on parity error  */
+#define YANU_CONTROL_IE_TRDY   (1<<5)	/* ie interrupt on tranmitter ready */
+/* control bits */
+#define YANU_CONTROL_BITS_POS  (6)	/* bits number pos */
+#define YANU_CONTROL_BITS      (1<<YANU_CONTROL_BITS_POS)	/* number of rx/tx bits per word. 3 bit unsigned integer */
+#define YANU_CONTROL_BITS_N    (3)	/* ... its bit filed length */
+#define YANU_CONTROL_PARENA    (1<<9)	/*  enable parity bit transmission/reception */
+#define YANU_CONTROL_PAREVEN   (1<<10)	/* parity even */
+#define YANU_CONTROL_STOPS     (1<<11)	/* number of stop bits */
+#define YANU_CONTROL_HHENA     (1<<12)	/* Harware Handshake enable... */
+#define YANU_CONTROL_FORCEBRK  (1<<13)	/* if set than txd = active (0) */
+/* tuning part */
+#define YANU_CONTROL_RDYDLY    (1<<14)	/* delay from "first" before setting rrdy (in bit) */
+#define YANU_CONTROL_RDYDLY_N  (8)	/* ... its bit filed length */
+#define YANU_CONTROL_TXTHR     (1<<22)	/* tx interrupt threshold: the trdy set if txfifo_chars<= txthr (chars) */
+#define YANU_CONTROL_TXTHR_N   (4)	/* ... its bit field length */
+
+#define YANU_BAUD_OFFSET  (8)	/* baud register offset */
+#define YANU_BAUDM        (1<<0)	/* baud mantissa lsb */
+#define YANU_BAUDM_N      (12)	/* ...its bit filed length */
+#define YANU_BAUDE        (1<<12)	/* baud exponent lsb */
+#define YANU_BAUDE_N      (4)	/* ...its bit field length */
+
+#define YANU_ACTION_OFFSET   (12)	/* action register... write only */
+#define YANU_ACTION_RRRDY    (1<<0)	/* reset rrdy */
+#define YANU_ACTION_ROE      (1<<1)	/* reset oe */
+#define YANU_ACTION_RBRK     (1<<2)	/* reset brk */
+#define YANU_ACTION_RFE      (1<<3)	/* reset fe  */
+#define YANU_ACTION_RPE      (1<<4)	/* reset pe  */
+#define YANU_ACTION_SRRDY    (1<<5)	/* set rrdy  */
+#define YANU_ACTION_SOE      (1<<6)	/* set oe    */
+#define YANU_ACTION_SBRK     (1<<7)	/* set brk   */
+#define YANU_ACTION_SFE      (1<<8)	/* set fe    */
+#define YANU_ACTION_SPE      (1<<9)	/* set pe    */
+#define YANU_ACTION_RFIFO_PULL  (1<<10)	/* pull a char from rx fifo we MUST do it before taking a char */
+#define YANU_ACTION_RFIFO_CLEAR (1<<11)	/* clear rx fifo */
+#define YANU_ACTION_TFIFO_CLEAR (1<<12)	/* clear tx fifo */
+#define YANU_ACTION_RTRDY       (1<<13)	/* clear trdy    */
+#define YANU_ACTION_STRDY       (1<<14)	/* set trdy      */
+
+#define YANU_STATUS_OFFSET   (16)
+#define YANU_STATUS_RRDY     (1<<0)	/* rxrdy flag */
+#define YANU_STATUS_TRDY     (1<<1)	/* txrdy flag */
+#define YANU_STATUS_OE       (1<<2)	/* rx overrun error */
+#define YANU_STATUS_BRK      (1<<3)	/* rx break detect flag */
+#define YANU_STATUS_FE       (1<<4)	/* rx framing error flag */
+#define YANU_STATUS_PE       (1<<5)	/* rx parity erro flag */
+#define YANU_RFIFO_CHARS_POS (6)
+#define YANU_RFIFO_CHARS     (1<<RFIFO_CHAR_POS)	/* number of chars into rx fifo */
+#define YANU_RFIFO_CHARS_N   (5)	/* ...its bit field length: 32 chars */
+#define YANU_TFIFO_CHARS_POS (11)
+#define YANU_TFIFO_CHARS     (1<<TFIFO_CHAR_POS)	/* number of chars into tx fifo */
+#define YANU_TFIFO_CHARS_N   (5)	/* ...its bit field length: 32 chars */
+
+typedef volatile struct yanu_uart_t {
+	volatile unsigned data;
+	volatile unsigned control;	/* control register (RW) 32-bit   */
+	volatile unsigned baud;	/* baud/prescaler register (RW) 32-bit */
+	volatile unsigned action;	/* action register (W) 32-bit */
+	volatile unsigned status;	/* status register (R) 32-bit */
+	volatile unsigned magic;	/* magic register (R) 32-bit */
+} yanu_uart_t;
+
+#endif

include/ppc440.h

@@ -68,6 +68,12 @@
 #define CPR0_SPCID	0x0120
 #define CPR0_ICFG	0x0140
 
+/* 440EPX boot strap options */
+#define BOOT_STRAP_OPTION_A	0x00000000
+#define BOOT_STRAP_OPTION_B	0x00000001
+#define BOOT_STRAP_OPTION_D	0x00000003
+#define BOOT_STRAP_OPTION_E	0x00000004
+
 /* 440gx sdr register definations */
 #define SDR0_SDSTP0	0x0020	    /* */
 #define SDR0_SDSTP1	0x0021	    /* */

lib_generic/crc32.c

@@ -163,7 +163,7 @@ const uint32_t * ZEXPORT get_crc_table()
 #endif
 
 /* ========================================================================= */
-# ifdef __LITTLE_ENDIAN
+# if __BYTE_ORDER == __LITTLE_ENDIAN
 #  define DO_CRC(x) crc = tab[(crc ^ (x)) & 255] ^ (crc >> 8)
 # else
 #  define DO_CRC(x) crc = tab[((crc >> 24) ^ (x)) & 255] ^ (crc << 8)

net/tftp.c

@@ -211,7 +211,7 @@ TftpSend (void)
 		pkt += 5 /*strlen("octet")*/ + 1;
 		strcpy ((char *)pkt, "timeout");
 		pkt += 7 /*strlen("timeout")*/ + 1;
-		sprintf((char *)pkt, "%lu", TIMEOUT / 1000);
+		sprintf((char *)pkt, "%lu", TftpTimeoutMSecs / 1000);
 		debug("send option \"timeout %s\"\n", (char *)pkt);
 		pkt += strlen((char *)pkt) + 1;
 #ifdef CONFIG_TFTP_TSIZE
@@ -413,7 +413,6 @@ TftpHandler (uchar * pkt, unsigned dest, unsigned src, unsigned len)
 		}
 
 		TftpLastBlock = TftpBlock;
-		TftpTimeoutMSecs = TIMEOUT;
 		TftpTimeoutCountMax = TIMEOUT_COUNT;
 		NetSetTimeout (TftpTimeoutMSecs, TftpTimeout);
 
@@ -528,10 +527,25 @@ TftpStart (void)
 {
 	char *ep;             /* Environment pointer */
 
-	/* Allow the user to choose tftpblocksize */
+	/*
+	 * Allow the user to choose TFTP blocksize and timeout.
+	 * TFTP protocol has a minimal timeout of 1 second.
+	 */
 	if ((ep = getenv("tftpblocksize")) != NULL)
 		TftpBlkSizeOption = simple_strtol(ep, NULL, 10);
-	debug("tftp block size is %i\n", TftpBlkSizeOption);
+
+	if ((ep = getenv("tftptimeout")) != NULL)
+		TftpTimeoutMSecs = simple_strtol(ep, NULL, 10);
+
+	if (TftpTimeoutMSecs < 1000) {
+		printf("TFTP timeout (%ld ms) too low, "
+			"set minimum = 1000 ms\n",
+			TftpTimeoutMSecs);
+		TftpTimeoutMSecs = 1000;
+	}
+
+	debug("TFTP blocksize = %i, timeout = %ld ms\n",
+		TftpBlkSizeOption, TftpTimeoutMSecs);
 
 	TftpServerIP = NetServerIP;
 	if (BootFile[0] == '\0') {
@@ -588,7 +602,6 @@ TftpStart (void)
 
 	puts ("Loading: *\b");
 
-	TftpTimeoutMSecs = TftpRRQTimeoutMSecs;
 	TftpTimeoutCountMax = TftpRRQTimeoutCountMax;
 
 	NetSetTimeout (TftpTimeoutMSecs, TftpTimeout);

tools/mkimage.c

@@ -37,6 +37,7 @@ struct mkimage_params params = {
 	.type = IH_TYPE_KERNEL,
 	.comp = IH_COMP_GZIP,
 	.dtc = MKIMAGE_DEFAULT_DTC_OPTIONS,
+	.imagename = "",
 };
 
 /*