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2172 Commits

Author SHA1 Message Date
Tom Rini
050acee119 Prepare v2020.10
Signed-off-by: Tom Rini <trini@konsulko.com>
2020-10-05 11:15:32 -04:00
Soeren Moch
0f3e2942c9 board: tbs2910: Use recommended distroboot addresses
According to doc/README.distro fdt_addr must not be set when DTB is not
available from hardware. So remove this entry.

Use address 32MB above the start of DRAM for kernel_addr_r. This way
we likely can avoid the self-relocation of the compressed kernel image
before it decompresses to offset 0x8000 from start of DRAM.

Use address 128MB above the start of DRAM for fdt_addr_r, since this is
the maximum location for the end of the kernel. So we avoid overwriting
the DTB.

Use 512k above that for ramdisk_addr_r. This should be enough for the
DTB, rest of DRAM can be used for initrd.

Place boot script / extlinux.conf at offset 0 / 1MB from start of DRAM.
This space is available for processing in U-Boot.

Signed-off-by: Soeren Moch <smoch@web.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2020-10-02 08:42:36 -04:00
Tom Rini
bb9f59f6a2 Merge tag 'u-boot-stm32-20201002' of https://gitlab.denx.de/u-boot/custodians/u-boot-stm
- Fixup SPI-NOR boot on AV96 board
2020-10-02 08:42:26 -04:00
Marek Vasut
d9839417cb ARM: dts: stm32: Add missing dm-spl props for SPI NOR on AV96
The u-boot,dm-spl DT props are missing on AV96, hence the pinmux and
flash0 nodes are not included in the reduced SPL DT. This prevents
SPI NOR boot from working at all. Fix this by filling them in.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-10-02 14:18:00 +02:00
Tom Rini
4f48163201 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-marvell
- Espressobin: Fix compatible string check
- Espressobin: Extend README for more MAC addresses
2020-10-01 08:55:20 -04:00
Tom Rini
47e180fa63 Merge tag 'late-bugfix-for-2020.10' of https://gitlab.denx.de/u-boot/custodians/u-boot-i2c
i2c late bugfix for v2020.10
- rcar_i2c: Fix i2c read/write errors
  fixes commit 7c8f821e ("i2c: rcar_i2c: Set the slave address from rcar_i2c_xfer")
2020-10-01 08:36:29 -04:00
Tom Rini
8e8dc04c3a Merge branch 'master' of git://git.denx.de/u-boot-sh 2020-10-01 08:36:09 -04:00
Andre Heider
05e7511fae arm: mvebu: Espressobin: Fix checks against machine compatible strings
The patches changing the compatible strings to the ones used by Linux have
not been merged yet, so fix the checks to use the current in-tree ones.

Reported-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Andre Heider <a.heider@gmail.com>
Reviewed-by: Pali Rohár <pali@kernel.org>
2020-10-01 10:43:43 +02:00
Pali Rohár
3dee18e2c2 arm: mvebu: Espressobin: Instructions for more MAC addresses in README.marvell
Some Espressobin boards got assigned more than one MAC address. Update
instructions how to correctly store and preserve all MAC addresses.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Andre Heider <a.heider@gmail.com>
2020-10-01 10:43:43 +02:00
Lad Prabhakar
86a73b0905 i2c: rcar_i2c: Fix i2c read/write errors
commit 7c8f821e5d ("i2c: rcar_i2c: Set the slave address from
rcar_i2c_xfer") blindly called rcar_i2c_set_addr() with read argument
always set to 1 during xfer which introduced read/write errors, whereas
earlier rcar_i2c_read_common() called rcar_i2c_set_addr() with read set to
1 and rcar_i2c_write_common() called rcar_i2c_set_addr() with read set 0.

Fixes: 7c8f821e5d ("i2c: rcar_i2c: Set the slave address from rcar_i2c_xfer")
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2020-10-01 05:41:44 +02:00
Etienne Carriere
5f9070a4a4 optee: copy FDT OP-TEE related nodes before generic FDT changes
Move call to optee_copy_fdt_nodes() introduced by commit 6ccb05eae0
before generic changes in kernel FDT so that platform specific changes
are not overridden by the changes made by this function.

Fixes: 6ccb05eae0 ("image: fdt: copy possible optee nodes to a loaded devicetree")
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-09-30 11:31:13 -04:00
Tom Rini
421ebb713b Merge branch '2020-09-29-assorted-fixes'
- Assorted typo fixes
- Correctly migrate some CONFIG_PREBOOT cases to defconfig
- Coverity issues in squashfs
2020-09-29 13:24:50 -04:00
Heinrich Schuchardt
f644081d38 video: typo Normlly
%s/Normlly/Normally/

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-09-29 13:19:08 -04:00
Naoki Hayama
499696e40a README: Fix typo in Board Initialisation Flow
I suppose 'these' might be 'there'.

Signed-off-by: Naoki Hayama <naoki.hayama@lineo.co.jp>
2020-09-29 13:19:08 -04:00
Heinrich Schuchardt
0ed375ebb1 fs/squashfs: parameter check sqfs_read_metablock()
We should check if the incoming parameter file_mapping is not NULL instead
of checking after adding an offset.

Reported-by: Coverity CID 307210
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
2020-09-29 13:19:08 -04:00
Heinrich Schuchardt
5558af16a0 mtd: fix typos in drivers/mtd/Kconfig, drivers/mtd/renesas_rpc_hf.c
Fix a typo

%s/interract/interact/

Use Samsung's capitalization of their trademarks

%s/onenand/OneNAND/
%s/Hyperflash/HyperFlash/

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
[trini: Add other Hyperflash cases as noted by Stefan]
Signed-off-by: Tom Rini <trini@konsulko.com>
2020-09-29 13:18:31 -04:00
Peter Robinson
324d77998e Define default CONFIG_PREBOOT with right config option
The 44758771ee commit removes CONFIG_PREBOOT but actually sets the USE_PREBOOT
Kconfig option which isn't CONFIG_PREBOOT and is also a bool option which means
we regress because 'usb start' isn't run when expected, it should also be run
for devices that have USB storage because keyboards aren't the only thing we
might need the USB bus for.

Fixes: 44758771ee ("arm: move CONFIG_PREBOOT="usb start" to KConfig")
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Cc: Jonas Smedegaard <dr@jones.dk>
Cc: Neil Armstrong <narmstrong@baylibre.com>
2020-09-29 13:17:33 -04:00
Tom Rini
d44d46e9fa Merge tag 'efi-2020-10-rc6' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi
Pull request for UEFI sub-system for efi-2020-10-rc6

The following UEFI related issues are fixed:

* restore the global data pointer in the RISC-V trap handler
* install EFI_RNG_PROTOCOL only if we have a random number generator
* display human readable string for EFI_RNG_PROTOCOL in efidebug command
2020-09-28 08:26:49 -04:00
Tom Rini
114c0ebcc1 Merge tag 'u-boot-amlogic-20200928' of https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic
- fix RNG driver probe & linux EFI KASLR boot on GXL, GXM, G12A, G12B & SM1 based boards
2020-09-28 08:26:34 -04:00
Heinrich Schuchardt
c48e9f310b riscv: restore global data pointer in trap handler
The gp register is used to store U-Boot's global data pointer. We should
not assume that an UEFI application leaves the gp register unchanged as
the UEFI specifications does not define who is the owner of the gp and tp
registers.

So the following sequence should be followed in the trap handler:

* save the caller's gp register
* restore the global data pointer
* serve interrupts or print crash dump and reset
* restore the caller's gp register

Cc: Abner Chang <abner.chang@hpe.com>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Rick Chen <rick@andestech.com>
2020-09-28 12:20:19 +02:00
Neil Armstrong
02d249f99e rng: meson: make core clock optional
This fixes HWRNG support on Amlogic GXL, GXM, G12A, G12B & SM1
based boards dues to the lack of the core clock in the device tree.

It was reported breaking EFI boot in the Linux EFI stub, because the
EFI_RNG_PROTOCOL didn't check for the RNG device presence before
installing itself.

The Linux amlogic,meson-rng.yaml doesn't mandate the core clock,
this the clock should be ignores if not present.

Nevertheless, the clock should be present and this should be fixed
on the Linux meson-gxl.dtsi & meson-g12-common.dtsi then synced
with U-Boot.

The change has been tested on a Khadas VIM3, which uses the common
meson-g12-common.dtsi like the Odroid-C4 & Odroid-N2 in Scott's
report, along with the RNG cmd.

Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reported-by: Scott K Logan <logans@cottsay.net>
Fixes: bc40eb278b ("drivers/rng: add Amlogic hardware RNG driver")
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Tested-by: Scott K Logan <logans@cottsay.net>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2020-09-28 09:38:11 +02:00
Heinrich Schuchardt
b59c13d42f efi_loader: installation of EFI_RNG_PROTOCOL
Having an EFI_RNG_PROTOCOL without a backing RNG device leads to failure
to boot Linux 5.8.

Only install the EFI_RNG_PROTOCOL if we have a RNG device.

Reported-by: Scott K Logan <logans@cottsay.net>
Cc: Neil Armstrong <narmstrong@baylibre.com>
Cc: Ard Biesheuvel <ardb@kernel.org>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-09-27 16:10:45 +02:00
Heinrich Schuchardt
796933510f efi_loader: efidebug display RNG protocol
Add the Random Number Generator (RNG) protocol to the GUIDs that the
'efidebug dh' protocol can replace by a text.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-09-27 16:10:45 +02:00
Lad Prabhakar
d03ad060fe board: renesas: ebisu: Drop CA57 check in reset_cpu()
Renesas Ebisu board is based on R-Car E3 SoC which has dual CA53 and
a CR7.

This patch drops check for cputype from reset_cpu() and also drops the
corresponding CA57 macros. While at it also dropped RST_RSTOUTCR macro
which is unused.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
2020-09-26 17:26:01 +02:00
Tom Rini
253388acd6 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriq
- Bug fixes related to PCIe, pfe, xfi, gpio, reset, vid, env, and usb on
  layerscape products
2020-09-25 12:55:06 -04:00
Hou Zhiqiang
8ec619f8fd pci: layerscape: Fixup PCIe EP mode DT nodes for LX2160A rev2
LX2160A rev2 uses different PCIe controller, so EP mode DT
nodes also need to be fixed up.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-09-24 20:57:32 +05:30
Kuldeep Singh
6fe7743d05 net: pfe_eth: Remove non-DM code check from pfe_spi_flash_init
CONFIG_DM_SPI_FLASH is only supported now with passing of driver
conversion deadline from non-DM to DM model. Hence, it's safe to remove
non-DM code check from pfe_spi_flash_init.

Also use CONFIG_ENV_SPI_MODE and CONFIG_ENV_SPI_MAX_HZ instead of
reading reading values from DT.

Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-09-24 20:57:32 +05:30
Kuldeep Singh
63d5344615 net: pfe_eth: Fix resoure leak in pfe_spi_flash_init
Fix Coverity issue: RESOURCE_LEAK.
leaked_storage: Variable addr going out of scope leaks the storage it
points to.

Fixes: e0152dbed6 ("net: pfe_eth: Use spi_flash_read API to access
flash memory")
Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-09-24 20:57:32 +05:30
Wasim Khan
450d491293 arm: dts: lx2160a: Add IO range
Add IO range property to fix below error on uboot
PCI: Failed autoconfig bar 18

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-09-24 20:57:32 +05:30
Madalin Bucur
858056b0e0 driver: net: fm: add support for XFI
All the 10G ports that were working in XFI mode were described as
using XGMII (as PHY_INTERFACE_MODE_XFI was not added at the time).
Add the minimal changes required for the FMan code to support XFI.

Signed-off-by: Madalin Bucur <madalin.bucur@oss.nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-09-24 20:57:32 +05:30
Chaitanya Sakinam
ad8277270a ls1012a, pfe_eth: Update probe to avoid resource leak
PFE DDR addresses are now stored on to a stack varaiable rather
dynamic allocation.

Signed-off-by: Chaitanya Sakinam <chaitanya.sakinam@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-09-24 20:57:32 +05:30
Chaitanya Sakinam
0649ab496a ls1012a, pfe_eth: correction in delay implementation
correction in delay implementation before we exit out of tx timeout.

Signed-off-by: Chaitanya Sakinam <chaitanya.sakinam@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-09-24 20:57:32 +05:30
Madalin Bucur
b750695ac9 drivers: net: phy: Use Aquantia driver for AQR113C
Add support for AQR113C PHY

Signed-off-by: Madalin Bucur <madalin.bucur@oss.nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-09-24 20:57:32 +05:30
Grigore Popescu
479cfd1fa6 drivers: net: ldpaa_eth: lx2160a: fix bug in checking if a DPMAC is enabled
The next DPMAC was always verified if it is enabled.  In case of
DPMAC@6, the DPMAC@7 is verified.  As DPMAC@7 is disabled, DPMAC@6 will
be considered disabled and not detected by uboot.

Signed-off-by: Grigore Popescu <grigore.popescu@nxp.com>
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-09-24 20:57:32 +05:30
hui.song
4e0dc38da0 armv8: dts: fsl-lx2160a: add gpio0 gpio1 gpio3 DT nodes
add gpio0 gpio1 gpio3 DT nodes to fsl-lx21600.dtsi

Signed-off-by: hui.song <hui.song_1@nxp.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-09-24 20:57:32 +05:30
Meenakshi Aggarwal
d31f3a1b62 armv8: lx2160a: fix reset sequence
Make sure that SW_RST_REQ and RST_REQ_MSK are cleared
before triggering hardware reset request.

Signed-off-by: Thirupathaiah Annapureddy <thiruan@linux.microsoft.com>
Signed-off-by: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-09-24 20:57:32 +05:30
Meenakshi Aggarwal
e5f1111a79 lx2160: Correct sd_boot environment variable
Signed-off-by: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-09-24 20:57:32 +05:30
Wasim Khan
c63edbc750 board: freescale: emc2305: Pass chip_addr to set_fan_speed
emc2305 is a common driver. It should not use platform specific
i2c address for slave device.
Pass chip_addr as agrument to emc2305_init() and set_fan_speed()
so that emc2305 driver can be used with different platforms.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-09-24 20:57:32 +05:30
Martin Kaistra
ada19fd2d2 board/freescale/lsch3: Correct entry for 0.9v
According to the reference manual of LS2088A, for a VDD voltage of
0.9V, the entry should be at 01000b.

Fixes: 4911948ec7 ("board/freescale,lsch3: Add entry for 0.9v")
Signed-off-by: Martin Kaistra <martin.kaistra@linutronix.de>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-09-24 20:57:32 +05:30
Hou Zhiqiang
af288cb291 arm64: Layerscape: Survive LPI one-way reset workaround
The workaround of LPI one-way reset issue is broken by the series:
https://patchwork.ozlabs.org/project/uboot/list/?series=192398

This patch is to add DT node for GIC RD tables and create corresponding
reserved-memory node in kernel DT to fix it.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-09-24 20:57:32 +05:30
Ran Wang
223c19076f fsl-layerscape: enable dwc3 snooping feature
Configure DWC3’s cache type to ‘cacheable’ for better
performance. Actually related register definition and values are SoC
specific, which means this setting is only applicable to Layerscape SoC,
not generic for all platforms which have integrated DWC3 IP.

Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-09-24 20:57:32 +05:30
Tom Rini
1da91d9bcd Merge https://gitlab.denx.de/u-boot/custodians/u-boot-marvell
- Enable NET_RANDOM_ETHADDR on Espressobin (Acked-by Kosta)
- Espressobin & Clearfog: fdtfile enhancements
- A37xx PCI: Disable link training when unloading driver
- A37xx: increase CONFIG_SYS_BOOTM_LEN to 64MB
- Add Macronix mx25u12835f support, used on uDPU and ESPRESSObin v7
- dns325: Correct CONFIG_NR_DRAM_BANKS parameter
2020-09-24 08:34:54 -04:00
Pali Rohár
5f50b88ab6 arm64: a37xx: pci: Disable link training when unloading driver
As required by PCI Express spec a delay for at least 100ms after
de-asserting PERST# signal is needed before link training is enabled.

Linux kernels prior to 5.8 version do not automatically disable link
training before de-asserting PERST# signal, therefore this requirement is
not fulfilled.

Above requirement is needed for proper detection of some Compex PCIe WiFi
cards. Otherwise Linux kernel cannot detect it.

To allow using those PCIe cards with older Linux kernel versions booted by
U-Boot compiled with U-Boot a37xx pci driver, disable link training in
U-Boot when unloading this pci driver.

Thanks to DM_FLAG_OS_PREPARE flag, U-Boot automatically unload this driver
when booting Linux kernel.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-09-24 10:14:06 +02:00
Tom Rini
e7e650e8bd arm: kirkwood: dns325: Correct CONFIG_NR_DRAM_BANKS parameter
Testing on a DNS-325 NAS has shown that in order for the device to work
we need to set CONFIG_NR_DRAM_BANKS to 1 and not 2.

Tested-by: Dmitry N. Kolesnikov <dk.diklab@gmail.com>
Reported-by: Dmitry N. Kolesnikov <dk.diklab@gmail.com>
Cc: Stefan Herbrechtsmeier <stefan@herbrechtsmeier.net>
Signed-off-by: Tom Rini <trini@konsulko.com>
2020-09-24 10:13:59 +02:00
Andre Heider
68e32e3443 arm: mvebu: Espressobin: Set environment variable fdtfile
Required for the generic distro mechanism.

Linux ships with 4 variants:
marvell/armada-3720-espressobin-v7-emmc.dtb
marvell/armada-3720-espressobin-v7.dtb
marvell/armada-3720-espressobin-emmc.dtb
marvell/armada-3720-espressobin.dtb

Use available information to determine the appropriate filename.

Fixes booting GRUB EFI arm64 on Fedora.

Reported-by: Dennis Gilmore <dennis@ausil.us>
Signed-off-by: Andre Heider <a.heider@gmail.com>
2020-09-24 10:13:42 +02:00
Baruch Siach
5a3f5e61ca arm: mvebu: clearfog: don't override set fdtfile env
Only set the fdtfile environment variable when not already set.

Fixes: 867572f09e ("ARM: mvebu: clearfog: run-time selection of DT file")
Cc: Joel Johnson <mrjoel@lixil.net>
Reported-by: Andre Heider <a.heider@gmail.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Andre Heider <a.heider@gmail.com>
2020-09-24 10:13:39 +02:00
Andre Heider
073ccfab5f arm: mvebu: defconfig: espressobin: enable NET_RANDOM_ETHADDR
The hardware does not provide a MAC address. Enable this so that
network access works with just the default environment.

Signed-off-by: Andre Heider <a.heider@gmail.com>
Acked-by: Konstantin Porotchkin <kostap@marvell.com>
2020-09-24 10:13:34 +02:00
Vladimir Vid
6728da5ce9 arm64: a37xx: increase CONFIG_SYS_BOOTM_LEN to 64MB
Increase max gunzip size, required for booting itb recovery images on
uDPU.

Signed-off-by: Vladimir Vid <vladimir.vid@sartura.hr>
[a.heider: adapt to mainline]
Signed-off-by: Andre Heider <a.heider@gmail.com>
2020-09-24 10:13:22 +02:00
Vladimir Vid
2781c71873 mtd: spi-nor-ids: add support for Macronix mx25u12835f flash
Some of Marvell A3700 boards use mx25u12835f, specifically uDPU
and ESPRESSObin v7.

Signed-off-by: Vladimir Vid <vladimir.vid@sartura.hr>
[a.heider: adapt commit message to mainline]
Signed-off-by: Andre Heider <a.heider@gmail.com>
2020-09-24 10:13:22 +02:00
Michael Walle
b7585aa9b1 pci: layerscape: Fix spurious writes and panic
The fdt_fixup_pcie_ls() scans all PCI devices and assumes that all PCI
root devices are layerscape PCIe controllers. Unfortunately, this is not
true for the LS1028A. There is one additional static PCI root complex
(this contains the networking devices) which has nothing to do with the
layerscape PCIe controllers. On recent U-Boot versions this results in
the following panic:

"Synchronous Abort" handler, esr 0x96000044
elr: 000000009602fa04 lr : 000000009602f9f4 (reloc)
elr: 00000000fbd73a04 lr : 00000000fbd739f4
x0 : 0080000002000101 x1 : 0000000000000000
x2 : 00000000fbde9000 x3 : 0000000000000001
x4 : 0000000000000000 x5 : 0000000000000030
x6 : 00000000fbdbd460 x7 : 00000000fbb3d3a0
x8 : 0000000000000002 x9 : 000000000000000c
x10: 00000000ffffffe8 x11: 0000000000000006
x12: 000000000001869f x13: 0000000000000a2c
x14: 00000000fbb3d2cc x15: 00000000ffffffff
x16: 0000000000010000 x17: 0000000000000000
x18: 00000000fbb3fda0 x19: 0000000000000800
x20: 0000000000000000 x21: 00000001f0000000
x22: 0000000000000800 x23: 0000000000000009
x24: 00000000fbdc3c1b x25: 00000000fbdc28e5
x26: 00000000fbdcc008 x27: 00000000fbdc16e2
x28: 000000000f000000 x29: 00000000fbb3d3a0

Code: 394072a1 f94006a0 34000041 5ac00a94 (b8336814)
Resetting CPU ...

This bug already existed in former versions, but the spurious write was
never trapped, because the destination address was a valid address (by
pure luck).

Make sure the PCI root is actually one of the expected PCIe layerscape
controllers by matching its compatible string.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Tested-by: Heiko Thiery <heiko.thiery@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-09-23 19:33:44 +05:30
Kuldeep Singh
7679afbfe3 configs: ls1012a/ls1046a: Add CONFIG_ENV_OVERWRITE in defconfig
CONFIG_ENV_OVERWRITE disables write protection on various environment
variables like "ethaddr" and "serial".

Enable this config in LS1046A and LS1012A defconfigs. This resolves an
error while setting multiple values of "ethaddr" variable.

Before the change:
=> setenv ethaddr 00:E0:0C:00:06:0
=> setenv ethaddr 00:E0:0C:00:06:1
Error: Can't overwrite "ethaddr"
Error inserting "ethaddr" variable, errno=1

After the change:
=> setenv ethaddr 00:E0:0C:00:06:0
=> setenv ethaddr 00:E0:0C:00:06:1

Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-09-23 19:33:44 +05:30
Mian Yousaf Kaukab
120e92d969 ls1028a: use default scan_dev_for_boot
scan_dev_for_efi is supposed to be called from scan_dev_for_boot.
However this call is missing for ls1028ardb and ls1028aqds boards. As
a result EFI boot doesn’t work. Fix this issue by removing custom
definition of scan_dev_for_boot and use the default definition
instead.

Signed-off-by: Mian Yousaf Kaukab <ykaukab@suse.de>
Reviewed-by: andy.tang@nxp.com
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-09-23 19:33:43 +05:30
Tom Rini
55004fa433 Merge tag 'mips-fixes-for-2020.10' of https://gitlab.denx.de/u-boot/custodians/u-boot-mips
- mips: vocore2: fix SPL image generation
- mips: vocore2: fix LZMA decompression errors
- mips: vocore2: fix console output
- mips: pic32mzda: fix DTC warnings and GPIO nodes
- mips: pic32mzda: make GPIO and MMC working again
2020-09-22 22:08:16 -04:00
Mauro Condarelli
7d1538cc9b mips: vocore2: fix various issues
- fix SPL image generation
- fix incorrect console output
- increase malloc_f and malloc_r space to fix LZMA decompression errors
- increase SPI flash clock

Signed-off-by: Mauro Condarelli <mc5686@mclink.it>
[squashed to one patch, fix commit subject and description]
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2020-09-23 00:14:56 +02:00
John Robertson
bd25f9a69f mips: dts: Fix PIC32MZDA GPIO register definitions
The GPIO bank name for banks J and K are not correct when using the
'gpio' command from the console.

The driver derives the bank name from the device tree instance string by
using the instance value and adding 'A': gpio0@xxaddrxx is Bank A,
gpio1@yyaddryy is Bank B and so on.

On the PIC32, there is no Bank I so instances 8 and 9 need to be
incremented as a minimum change.

An alternative (less opaque) implementation would be to use a bank-name
property instead but this would require modifying the driver code too.

Signed-off-by: John Robertson <john.robertson@simiatec.com>
2020-09-23 00:14:29 +02:00
John Robertson
81b543a4e6 mips: dts: Fix PIC32MZDA GPIO register definitions
GPIO state cannot be changed via the device tree (e.g. with gpio-hog) or
using the 'gpio' command from the console.

The root cause is a discrepancy between the driver and the device tree:
the driver code expects an absolute I/O address in the <reg> property,
while the device tree defines the address relative to a declaration in
the parent pinctrl node.

Changing the device tree to fix a driver issue would normally be wrong,
however:
- I have run the first version of U-Boot in which this driver appears
  (v2016.03) and the same problem exists, so this is not a regression;
- There is no code that references a parent device tree node that might
  suggest the intent of the author was to parse the DT as it exists now;
- The equivalent Linux PIC32 GPIO driver also uses absolute addresses
  for the GPIO <reg> property. This change brings the U-Boot DT more
  into line with Linux.

Additionally, the data sheet (Microchip ref. 60001361H) shows that the
register set to control a GPIO bank spans 0xE0 bytes, but the device
tree specified size is only 0x48 bytes.

Signed-off-by: John Robertson <john.robertson@simiatec.com>
2020-09-23 00:14:28 +02:00
John Robertson
0723c2ddeb mips: dts: Fix device tree warnings for PIC32MZDA
Signed-off-by: John Robertson <john.robertson@simiatec.com>
2020-09-23 00:14:28 +02:00
John Robertson
95e7141294 mips: pic32mzdask: enable CONFIG_BLK
CONFIG_BLK needs to be enabled by default to allow U-Boot to
compile after a 'make pic32mzdask_defconfig'.

Signed-off-by: John Robertson <john.robertson@simiatec.com>
2020-09-23 00:14:21 +02:00
John Robertson
69af033fb9 mips: pic32mzdask: disable SDHCI SDCD signal workaround
The PIC32MZ DA Starter Kit does not need the card detect workaround
because the SDCD signal line is connected properly. Disable the
workaround in this case.

Signed-off-by: John Robertson <john.robertson@simiatec.com>
2020-09-23 00:14:14 +02:00
John Robertson
10d65bf00b pinmux: pic32: add SDHCI pin config
The GPIO pins used by the SDHCI controller need to be configured to
allow the interface to work.

Signed-off-by: John Robertson <john.robertson@simiatec.com>
2020-09-23 00:08:52 +02:00
John Robertson
6978db36aa mmc: pic32: Refresh PIC32 MMC driver
The existing driver is not compatible with the Driver Model.

This patch makes the necessary changes while also removing obsolescent
calls/properties as follows:

- fdtdec_* calls replaced with dev_read_* equivalents;
- 'clock-freq-min-max' property replaced by querying the frequency of
  the source clock 'base_clk';
- The card detect erratum workaround is applied during probe rather than
  overriding get_cd.

The card detect workaround (Microchip ref. DS80000736E, erratum #15) is
not always needed and can be disabled using a vendor specific DT
property.

Signed-off-by: John Robertson <john.robertson@simiatec.com>
2020-09-23 00:08:52 +02:00
Tom Rini
5949f36f08 Merge branch '2020-09-22-assorted-bugfixes'
- Fix for environment location on some PowerPC boards
- Typo / documentation fix
- Two fixes for mpc8xxx
2020-09-22 16:47:48 -04:00
Chris Packham
dc8368b7ee configs: powerpc: Don't set CONFIG_ENV_ADDR for QorIQ SPIFLASH
Setting CONFIG_ENV_ADDR to something other than 0 stops gd->env_addr
from being allocated dynamically. When the environment is in SPI we need
it to be allocated as we can't use a direct memory mapped address.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
2020-09-22 11:26:19 -04:00
Heinrich Schuchardt
643b5e7ea3 disk: typo Terra Bytes
512 * 2^32 bytes equals 2 tebibytes.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-09-22 11:26:19 -04:00
Heinrich Schuchardt
4061191727 doc/build/gcc.rst: add missing apt-get *install*
The install command is missing for an apt-get command.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-09-22 11:05:32 -04:00
Rasmus Villemoes
24e8c0e3b3 gpio/mpc83xx_spisel_boot.c: include log.h
Fix build failure, it used to get this implicitly through common.h
until f7ae49fc4f (common: Drop log.h from common header).

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Heiko Schocher <hs@denx.de>
2020-09-22 11:05:32 -04:00
Rasmus Villemoes
10a6aa963c spi: mpc8xxx_spi.c: fix cs activate/deactivate
Somewhere between v2020.04 and v2020.07 the mpc8xxx_spi driver broke,
I'm guessing due to this hunk

@@ -559,6 +560,8 @@ int dm_gpio_set_dir_flags(struct gpio_desc *desc, ulong flags)
        if (ret)
                return ret;

+       /* combine the requested flags (for IN/OUT) and the descriptor flags */
+       flags |= desc->flags;
        ret = _dm_gpio_set_dir_flags(desc, flags);

from commit 695e5fd546 ("gpio: update dir_flags management"). But
the blame is mostly on the driver itself which seems rather confused:
The chip select gpios are requested with GPIOD_ACTIVE_LOW, but then in
each activate/deactivate, dm_gpio_set_dir_flags() is called with
merely GPIOD_IS_OUT, and then the driver call set_value(0) for
activate.

That used to work, but with the above hunk, the ACTIVE_LOW setting
from the request becomes persistent, so the gpio driver ends up being
asked to set the value to 1 in mpc8xxx_spi_cs_activate().

So drop the dm_gpio_set_dir_flags() calls in the activate/deactivate
functions, and use a value of 1 to mean "logically enabled".

Ideally, I think we should also drop the GPIOD_ACTIVE_LOW from the
request and make it up to the list of gpio cs in DT to indicate
whether that CS is enabled when driven low (as is of course usually
the case), but that requires changing
arch/powerpc/dts/gdsys/gazerbeam-base.dtsi among others, and I don't
have that hardware to test on. I have, however, tested our
own (mpc8309-based) hardware with this change, and I have also tested
that removing the GPIOD_ACTIVE_LOW from the request and updating our
DT as

-                       gpios = <&spisel 0 0>;
+                       gpios = <&spisel 0 GPIO_ACTIVE_LOW>;

still works.

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
2020-09-22 11:05:32 -04:00
Tom Rini
ba2a0cbb05 Prepare v2020.10-rc5
Signed-off-by: Tom Rini <trini@konsulko.com>
2020-09-21 13:45:23 -04:00
Tom Rini
d6b241bcd7 configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2020-09-21 13:45:07 -04:00
Tom Rini
10431c4eaa Merge https://gitlab.denx.de/u-boot/custodians/u-boot-x86
- Several ACPI bug fixes
- Intel edison: Move config SYS_MALLOC_LEN to Kconfig
- Use "emmc" in ApolloLake FSP devicetree bindings
2020-09-21 11:01:07 -04:00
Wolfgang Wallner
40edea3a07 x86: acpi: Add memset to initialize SPCR table
Add a missing memset to acpi_create_spcr().

The other acpi_create_xxxx() functions perform a memset on their
structures, acpi_create_spcr() does not and as a result the contents of
this table are partly uninitialized (and thus random after every reset).

Fixes: b288cd9600 ("x86: acpi: Generate SPCR table")
Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: fix the tags format in the commit message]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2020-09-21 16:41:36 +08:00
Wolfgang Wallner
3f6966ab2b x86: acpi: Fix calculation of DSDT length
Currently, the calculation for the length of the DSDT table includes any
bytes that are added for alignment, but those bytes are not initialized.

This is because the DSDT length is calculated after a call to
acpi_inc_align(). Split this up into the following sequence:

  * acpi_inc()
  * Calculate DSDT length
  * acpi_align()

Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-09-21 16:41:35 +08:00
Wolfgang Wallner
674c58c7b7 x86: fsp: Replace e-mmc with emmc in devicetree bindings
The term eMMC is used inconsistently within the FSP devicetree
bindings (e-mmc and emmc), especially for "emmc-host-max-speed"
documentation and code disagree.

Change all eMMC instances within the FSP bindings to consistently
use "emmc". The term "emmc" is already used a lot within U-Boot,
while "e-mmc" is only used in the FSP bindings.

Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: correct one typo in the commit message]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2020-09-21 16:41:35 +08:00
Andy Shevchenko
4364a3f852 cmd: acpi: Print revisions in hex format
The revisions are usually dates in hex-decimal format representing
YYYYmmdd. Print them in hex to see this clearly.

Before:
  ...
  FACP 000e5420 0000f4 (v06 U-BOOT U-BOOTBL 538970376 INTL 0)
  DSDT 000e4780 000ba0 (v02 U-BOOT U-BOOTBL 65536 INTL 538968870)
  ...
After:
  ...
  FACP 000e5420 0000f4 (v06 U-BOOT U-BOOTBL 20200908 INTL 0)
  DSDT 000e4780 000ba0 (v02 U-BOOT U-BOOTBL 10000 INTL 20200326)
  ...

Fixes: 0b885bcfd9 ("acpi: Add an acpi command")
Cc: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-09-21 16:41:35 +08:00
Andy Shevchenko
5a53441a91 x86: edison: Move config SYS_MALLOC_LEN to Kconfig
This patch moves the the config SYS_MALLOC_LEN to Kconfig
as it is already done for zynq arch in commit 01aa5b8f05
("Kconfig: Move config SYS_MALLOC_LEN to Kconfig for zynq").

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-09-21 09:47:24 +08:00
Tom Rini
400f84c5ba Merge tag 'efi-2020-10-rc5-2' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi
Pull request for UEFI sub-system for efi-2020-10-rc5 (2)

The following bugs are fixed:

* incorrect online help for setenv and env
* description of function efi_mem_carve_out()
* replace printf() by log_err() in stm32mp1_rng driver

A unit test is provided to check that the boot hart id is provided in the
RISC-V device-tree.
2020-09-19 08:35:20 -04:00
Tom Rini
667ab37d58 Merge branch '2020-09-18-assorted-bugfixes'
- SquashFS Coverity fixes
- bitflip fix in the alternate memtest command
- Disable networking on bcmstb boards where we didn't have any network
  drivers enabled.
2020-09-19 08:31:52 -04:00
Maxim Uvarov
8f0ac536d4 efi: change 'env -e -i' usage syntax
'env -e -i' syntax was changed from "," to ":". Account for this also
in the documentation.

Fixes: 2b3fbcb59f ("efi_loader: use ':' as separator for setenv -i")
Signed-off-by: Maxim Uvarov <maxim.uvarov@linaro.org>
Correct the usage description for setenv -e too.
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-09-18 22:23:58 +02:00
Heinrich Schuchardt
52a8481827 efi_selftest: check for RISC-V boot-hartid in FDT
On RISC-V check that the /chosen node has a boot-hartid property.

To run the test configure with CONFIG_CMD_BOOTEFI_SELFTEST=y and issue

    setenv efi_selftest device tree
    setenv serial# myserial
    bootefi selftest

If the test succeeds, it reports the boot-hartid, e.g.

    boot-hartid: 1

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-09-18 22:23:58 +02:00
Heinrich Schuchardt
18161a8a4e efi_selftest: rework device tree test
Allow specifying the node on which a property is searched.
Test the device tree consistency more rigorously.
Some efi_st_printf() calls have been converted to efi_st_error().

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-09-18 22:23:58 +02:00
Maxim Uvarov
ffbeafe7e2 efi_memory: refine overlap_only_ram description
Refine text for overlap_only_ram description to
match to what exactly flag does and aling description
with other functions.

Signed-off-by: Maxim Uvarov <maxim.uvarov@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-09-18 22:23:58 +02:00
Heinrich Schuchardt
cf0bf89227 rng: stm32mp1: use log() instead of printf()
The logging system provides flexible filtering and enhanced output.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Sughosh Ganu <sughosh.ganu@linaro.org>
2020-09-18 22:23:58 +02:00
Ralph Siemsen
9989fb18bd cmd: mem: fix range of bitflip test
The bitflip test uses two equal sized memory buffers. This is achieved
by splitting the range of memory into two pieces. The address of the
second buffer, as well as the length of each buffer, were not correctly
calculated. This caused bitflip test to access beyond the end of range.
This patch fixes the pointer arithmetic problem.

A second problem arises because u-boot "mtest" command expects the
ending address to be inclusive. When computing (end - start) this
results in missing 1 byte of the requested length. The bitflip test
expects a count rather than an "ending" address. Thus it fails to test
the last word of the requested range. Fixed by using (end - start + 1).

Added Kconfig option to optionally disable the bitflip test, since it
does add significantly to the time taken for "mtest".

Fixes: 8e434cb705 ("cmd: mem: Add bitflip
memory test to alternate mtest")

Signed-off-by: Ralph Siemsen <ralph.siemsen@linaro.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-09-18 16:19:58 -04:00
Thomas Fitzsimmons
e03dd8a05f configs: bcmstb: Disable networking support
Silence the "Driver Model for Ethernet drivers" migration warning for
the bcm7445 and bcm7260 ports, neither of which supports networking yet.

Signed-off-by: Thomas Fitzsimmons <fitzsim@fitzsim.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2020-09-18 16:19:58 -04:00
Joao Marcos Costa
a7dc37d38c fs/squashfs: Fix Coverity Scan defects
Fix control flow issues and null pointer dereferences.

Signed-off-by: Joao Marcos Costa <jmcosta944@gmail.com>
2020-09-18 16:19:58 -04:00
Tom Rini
98f3ee09d0 Merge tag 'u-boot-imx-20200918' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx
----------------------------------------------------------------
Fixes for 2020.10
-----------------

- Toradex boards
- mx6qsabrelite: fix env offset
- esdhc_imx: waiting for clock instead of sleep
- dyn RAM calibration for entry point i.MX6

Travis: https://travis-ci.org/github/sbabic/u-boot-imx/builds/728274602
2020-09-18 10:42:12 -04:00
Soeren Moch
4516b535bf board: tbs2910: Disable CONFIG_ENV_VARS_UBOOT_CONFIG in defconfig
This is not required for sysboot (we defined fdtfile), let's save a few
bytes in the binary image without these variables.

Signed-off-by: Soeren Moch <smoch@web.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2020-09-18 10:39:43 +02:00
Tom Rini
9de3126e80 Merge branch '2020-09-16-assorted-fixes'
- Assorted bug fixes
2020-09-17 09:53:57 -04:00
Philippe Schenker
bf46474e21 apalis-imx8qm: rename all occurences to apalis-imx8
The Toradex product is called apalis-imx8 consisting of SoM with
i.MX8QM and i.MX8QP SoCs.

Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@toradex.com>
2020-09-17 14:41:33 +02:00
Philippe Schenker
08b6a60ee8 colibri-imx8qxp: rename all occurences to colibri-imx8x
The Toradex product is called colibri-imx8x consisting of SoM with
i.MX8QXP and i.MX8DX SoCs.

Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@toradex.com>
2020-09-17 14:41:26 +02:00
Haibo Chen
f9c3a816c0 mmc: fsl_esdhc_imx: check the clock stable status after config the clock rate.
Currently, after config the clock rate, delay 10ms, this is quite a rough
method. Check the clock stable status in the present status register is
enough.

Tested-by: Ji Luo <ji.luo@nxp.com>
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
2020-09-17 14:41:07 +02:00
Marek Vasut
d1a7205532 ARM: mx6: ddr: Add support for iMX6UL/ULL/SL/SDL
This patch adds support for iMX6UL/ULL/SL/SDL MMDC into the DDR calibration
code. The difference between MX6DQ and MX6UL/ULL/SL is that the later SoCs
have 2 SDQS registers, just like MX6SX, while the MX6DQ/MX6SDL has 8.

Fixes: 4f4c128c65 ("ARM: mx6: ddr: Add support for iMX6SX")
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Eric Nelson <eric@nelint.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2020-09-17 14:40:55 +02:00
Denis Pynkin
1189bd513c mx6qsabrelite: increase the environment offset
The size of the binary created with the default U-boot config is much
greater than the default offset for environment `0x60000`.
In case if that binary is used for booting via MMC it is overlapped with
the environment stored on MMC.
This leads to U-Boot corruption while saving environment with `saveenv`
command and non-bootable SabreLite board.

The offset for environment `CONFIG_ENV_OFFSET=0x60000` was added in
commit a09fea1 but did not count in the change to `0xC0000` if option
`CONFIG_ENV_IS_IN_MMC` is used.

The offset is also used for variant with environment saving onto SPI NOR
flash (with enabled option `CONFIG_ENV_IS_IN_SPI_FLASH`). In that case the
U-Boot binary flashed on SPI NOR is also corrupted after environment
saving with the original 0x60000 offset.

Signed-off-by: Denis Pynkin <denis.pynkin@collabora.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2020-09-17 14:40:40 +02:00
Peng Fan
0098222dac imx8mp: Remove parts MIMX8ML7 and MIMX8ML5 support
Latest datasheet revE has removed MIMX8ML7D/5D/7C/5C parts, so
update u-boot to remove decoding and support for those parts.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-09-17 14:40:22 +02:00
Peng Fan
a3e7d51fd5 imx8m: clock_imx8mm: add missed return
Add missed return

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-09-17 14:40:17 +02:00
Peng Fan
ece7844d8f imx8mq: fix SSCG_PLL_REFCLK_SEL_x
Fix SSCG_PLL_REFCLK_SEL_x, the offset starts from 0, not 16

Reported-by: Coverity 3448860
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
2020-09-17 14:40:10 +02:00
Peng Fan
d81e8cf6ea imx8mq: fix FRAC_PLL_REFCLK_SEL_MASK
Coverity reported dead code, however it is FRAC_PLL_REFCLK_SEL_MASK
was wrongly set.

Reported-by: Coverity 10045172
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
2020-09-17 14:40:04 +02:00
Peng Fan
95bae9ff92 imx7: ccm: correct target interface num
According to i.MX 7Dual Applications Processor Reference Manual, Rev. 1
The target interface CCM root index ranges [0,124], so the number
should be 125.

Reported-by: Coverity 18045
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
2020-09-17 14:39:55 +02:00
Igor Opaniuk
763a4aef09 apalis_imx6: provide fdtfile in env instead of setting it in runtime
Provide fdtfile value in default env instead of setting
it dynamically in runtime.

Fixes: 85cb2bc686("apalis/colibri imx6: provide proper fdtfile value")
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
2020-09-17 14:39:09 +02:00
Igor Opaniuk
5d54d7eeb1 colibri_imx6: provide fdtfile in env instead of setting it in runtime
Provide fdtfile value in default env instead of setting
it dynamically in runtime.

Fixes: 85cb2bc686("apalis/colibri imx6: provide proper fdtfile value")
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
2020-09-17 14:39:09 +02:00
Igor Opaniuk
327381e8b5 colibri_imx7: use preboot for fdtfile evaluation
Enable and set preboot var with fdtfile evaluation.
preboot will be checked and run immediately before starting the
CONFIG_BOOTDELAY countdown and/or running the auto-boot command resp.
entering interactive mode.

This provides possibility to use different boot cmds in interactive mode
without manual setting fdtfile value, as it it's already evaluated
before entering interactive mode.

Fixes: a62c60610f("colibri_imx7_emmc: add Colibri iMX7D 1GB (eMMC) module support")
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
2020-09-17 14:39:09 +02:00
Igor Opaniuk
3ab2316a99 colibri_vf: use preboot for fdtfile evaluation
Enable and set preboot var with fdtfile evaluation.
preboot will be checked and run immediately before starting the
CONFIG_BOOTDELAY countdown and/or running the auto-boot command resp.
entering interactive mode.

This provides possibility to use different boot cmds in interactive mode
without manual setting fdtfile value, as it it's already evaluated
before entering interactive mode.

Fixes: 304042c1f3("colibri_vf: set fdtfile for distroboot")
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
2020-09-17 14:39:09 +02:00
Igor Opaniuk
2f310b7f48 colibri-imx6ull: use preboot for fdtfile evaluation
Enable and set preboot var with fdtfile evaluation.
preboot will be checked and run immediately before starting the
CONFIG_BOOTDELAY countdown and/or running the auto-boot command resp.
entering interactive mode.

This provides possibility to use different boot cmds in interactive mode
without manual setting fdtfile value, as it it's already evaluated
before entering interactive mode.

Fixes: board: 31b1e17f44("toradex: add Colibri iMX6ULL support")
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
2020-09-17 14:39:09 +02:00
Igor Opaniuk
b4c9cd6875 colibri_imx7: wrap video specific funcs with ifdefs
Wrap video specific functionality with ifdefs.

Fixes: 195011b24d("colibri-imx7: fix splash logo drawing")
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
2020-09-17 14:39:09 +02:00
Igor Opaniuk
e6fd30dd9e toradex: drop legacy show_boot_logo function and use splashscreen
Drop show_boot_logo legacy function, as splashscreen functionality can
be used instead.

Fixes: d324189772("toradex: common: show boot logo")
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
2020-09-17 14:39:09 +02:00
Igor Opaniuk
1310660f5c colibri_imx7: use splashcreen value instead of legacy function
Set proper splashscreen env value instead of calling legacy function
to show embed boot logo.

Fixes: 195011b24d("colibri-imx7: fix splash logo drawing")
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
2020-09-17 14:39:09 +02:00
Igor Opaniuk
f37aab99f2 colibri-imx6ull: use splashcreen value instead of legacy function
Set proper splashscreen env value instead of calling legacy function
to show embed boot logo.

Fixes: 391c712dde("colibri-imx6ull: show boot logo")
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
2020-09-17 14:39:09 +02:00
Heinrich Schuchardt
c6963fb88f doc: qemu: debug UART settings for QEMU ARM virt
Provide the settings for the debug UART on the QEMU ARM virt board.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-09-16 16:54:00 -04:00
Miquel Raynal
c4d0384a4a MAINTAINERS: add myself as reviewer for SquashFS
I also followed the development of the SquashFS support in U-Boot
as part of Joao Marcos internship, so I would also appreciate receiving
new contributions and bug reports related to this topic.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2020-09-16 16:54:00 -04:00
Thomas Petazzoni
42ef2edc85 MAINTAINERS: add myself as reviewer for SquashFS
As I have followed the development of the SquashFS support in U-Boot
as part of Joao Marcos work, it makes sense to get Cc'ed on
contributions/bug reports related to the squashfs support.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
2020-09-16 16:54:00 -04:00
Marek Vasut
81d0cef3b2 lib: fdt: Fix fdtdec_setup_mem..() conversion to livetree API
Repair incorrectly negated condition in the original patch which broke
DT memory node parsing on everything which has more than one DT memory
node, e.g. R-Car3.

In case multiple valid memory nodes are present in the DT, the original
patch would complete parsing cycle for the first memory node, then move
on to the next one, identify it as a valid, and end the parsing. The fix
is to invert the condition, to make the code behave as it did before the
livetree conversion, so it would continue parsing the subsequent memory
nodes as well.

Fixes: c2f0950c33 ("lib: fdt: Convert fdtdes_setup_mem..() to livetree API")
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Tested-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Michal Simek <michal.simek@xilinx.com>
2020-09-16 16:54:00 -04:00
Thirupathaiah Annapureddy
7def4e621b include: phy: fix NULL pointer check in phy_write()
phy_write() uses bus->write() instead of bus->read(). This means NULL
pointer pre-check needs to happen on bus->write instead of bus->read.

Signed-off-by: Thirupathaiah Annapureddy <thiruan@linux.microsoft.com>
Reviewed-by: Michal Simek <michal.simek@xilinx.com>
2020-09-16 16:54:00 -04:00
Baruch Siach
a8a71c9488 MAINTAINERS: update clk entry git tree
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
2020-09-16 16:54:00 -04:00
Tom Rini
b01ba776c9 Merge tag 'efi-2020-10-rc5' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi
Pull request for UEFI sub-system for efi-2020-10-rc5

The following bugs are fixed:

* unaligned access in br_i32_decode()
* missing restore of global data pointer in UEFI selftest
* missing restore of global data pointer on RISC-V in UEfI subsystem
* efi_var_mem_notify_exit_boot_services() should not be __efi_runtime
2020-09-16 08:08:06 -04:00
Tom Rini
0487bb5ecd Merge tag 'u-boot-rockchip-20200916' of https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip
- Fix rv1108 grf access issue
- make_fit_atf: ignore empty PT_LOAD segment
2020-09-16 08:07:49 -04:00
Heinrich Schuchardt
5b861eea79 rockchip: make_fit_atf: ignore empty PT_LOAD segment
The linker sometimes creates PT_LOAD segments with length (p_filesz) zero
as described in https://man7.org/linux/man-pages/man5/elf.5.html. This
leads to build failures. We should ignore empty segments.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Tested-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-09-16 16:41:30 +08:00
Kever Yang
454b792afe rockchip: rv1108: enable board early init
Enable board early init callback to init board specific hardware.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2020-09-16 16:32:01 +08:00
Kever Yang
fe4931c09a rockchip: rv1108: Enable grf as pre-reloc node
The grf node will be used before relocate, enable it in dts.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2020-09-16 16:31:18 +08:00
Kever Yang
f11f138ebf rockchip: rv1108: use correct API for board callback
Use board_early_init_f() instead of mach_cpu_init() for board, the
board_early_init_f() is used for board init and after dm_initf, while
the mach_cpu_init() is used for CPU/SOC and before dm_initf()(not able
to use syscon API).

Fixes: 9cec336708 ("rockchip: evb-rv1108: Use syscon API to get grf base")
Fixes: 4aa33690fc {"rockchip: elgin-rv1108: Use syscon API to get grf base")

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2020-09-16 16:31:17 +08:00
Tom Rini
4dcced1169 Merge tag 'mmc-2020-9-15' of https://gitlab.denx.de/u-boot/custodians/u-boot-mmc
- Use mmc_of_parse for msm_sdhci
- Add missing common host caps for xenon_sdhci.
2020-09-15 08:59:32 -04:00
Marek Vasut
0e12575645 Azure/GitLab/Travis: Add SH4 r2dplus machine with various PCI ethernet options
Add SH4 R2Dplus machine configured to test various U-Boot PCI ethernet
options -- RTL8139, EEPRO100, AMD PCnet, DEC Tulip.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-09-15 08:59:06 -04:00
Andre Heider
e79c59c0e2 mmc: xenon_sdhci: Add missing common host capabilities
Use mmc_of_parse() to set the common host properties. That includes
"bus-width", so parsing it can be removed from the driver.

But more importantly, "non-removable" is now respected, which fixes
the usage of eMMC.

Signed-off-by: Andre Heider <a.heider@gmail.com>
Reviewed-by: Konstantin Porotchkin <kostap@marvell.com>
Tested-by: Marek Behún <marek.behun@nic.cz>
2020-09-15 10:15:56 +08:00
Manivannan Sadhasivam
8505147403 mmc: msm_sdhci: Use mmc_of_parse for setting host_caps
Since the introduction of 'get_cd' callback in sdhci core,
dragonboard410c's MMC interface is broken. It turns out that 'get_cd'
callback checks for the host_caps for validating the chip select. And
since the msm_sdhci driver is not parsing the host_caps from DT, not
all of the cababilities are parsed properly. This results in the MMC
interfaces to be broken.

Hence, fix this by adding a call to 'mmc_of_parse' during driver probe.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Tested-by: Aníbal Limón <anibal.limon@linaro.org>
Reviewed-By: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2020-09-15 10:13:37 +08:00
Heinrich Schuchardt
5bf12a7859 efi_selftest: restore gd before do_reset()
Before calling do_reset() in the EFI selftest we must restore the global
data pointer.

Fixes: fa63753f86 ("efi_selftest: substitute ResetSystem() by do_reset()")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-09-14 23:28:52 +02:00
Heinrich Schuchardt
d68d7f47a9 efi_loader: save global data pointer on RISC-V
On RISC-V the global data pointer is stored in register gp. When a UEFI
binary calls the EFI API we have to restore it.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-09-14 23:28:52 +02:00
Heinrich Schuchardt
6b9966e1aa riscv: define function set_gd()
Function set_gd() is needed in the UEFI sub-system if the global data
pointer is stored in a register.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-09-14 23:28:52 +02:00
Heinrich Schuchardt
e5a31376ac efi_loader: efi_var_mem_notify_exit_boot_services
efi_var_mem_notify_exit_boot_services() is invoked when ExitBootServices()
is called by the UEFI payload.

efi_var_mem_notify_exit_boot_services() should not be defined as
__efi_runtime as it is invoking EFI_ENTRY() and EFI_EXIT() which themselves
are not __efi_runtime.

Fixes: f1f990a8c9 ("efi_loader: memory buffer for variables")
Fixes: e01aed47d6 ("efi_loader: Enable run-time variable support for tee based variables")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2020-09-14 23:28:52 +02:00
Robert Reither
8479333ce7 rsa: crash in br_i32_decode() called from rsa_gen_key_prop()
Fixes problem for unaligned 32bit big-endian access in
lib/rsa/rsa-keyprop.c.

Exchanges br_i32_decode() with get_unaligned_be32().

This will keep the unaligned access for architectures capable and will do
some byte-shift magic for the not so capable ones.

Reported-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-by: Robert Reither <robert.reither@external.thalesgroup.com>
Remove unused include.
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-09-14 23:28:52 +02:00
Tom Rini
00e5fda006 Merge branch '2020-09-12-assorted-bugfixes'
- A large assortment of minor fixes
- Documentation improvements
2020-09-14 15:39:46 -04:00
Heinrich Schuchardt
185440ffc4 test: do no assume hush parser in validate_empty()
The environment variable test uses function validate_empty() to check that
a variable is not defined. If the hush parser is not enabled, we cannot
refer to a variable by $var_name but only by ${var_name}.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: Stephen Warren <swarren@nvidia.com>
2020-09-12 10:53:01 -04:00
Heinrich Schuchardt
9a97314b5b Makefile: mrproper shall delete doc/output/
HTML documentation is generated in doc/output/. This directory shall be
deleted by 'make mrproper'

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-09-12 10:53:01 -04:00
Heinrich Schuchardt
70e38eea3a doc: describe building with GCC
Provide a description of the U-Boot build process with GCC in the HTML
documentation.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-09-12 10:53:01 -04:00
Heinrich Schuchardt
2974ba4f65 doc: describe source repository
Add a chapter to the HTML documentation describing how to retrieve the
U-Boot sources.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-09-12 10:53:01 -04:00
Mingming Lee
75fb7b9163 ARM: MediaTek: amend IC description for MediaTek MT8512
The description for MT8512  has some mistake, so correct it.

Signed-off-by: Mingming Lee <Mingming.Lee@mediatek.com>
2020-09-12 10:53:01 -04:00
Reuben Dowle
eb39d8ba5f Fix data abort caused by mis-aligning FIT data
Attempting to place device tree immediately after an image in memory can lead
to mis-aligned data accesses if that image size is not divisible by the
alignment requirements of the architecture.

Data aborts caused by this were observed on a custom Marvel A388 based system,
where the image was a uboot FIT file. The total size varies depending on the
uboot device tree size, which does not always lead to correct alignment.

The minimum alignment specified for ARM [1] and ARM64 [2] linux booting has been
used

[1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/arm/booting.rst#n126
[2] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/arm64/booting.rst#n45

Signed-off-by: Reuben Dowle <reuben.dowle@4rf.com>
2020-09-11 17:13:56 -04:00
T Karthik Reddy
1e2c5bb9e7 mtd: nand: Fix nand write error with bad block addresses above 32-bit
Nand writes should skip the bad blocks with "nand write" command.
In case of bad blocks with above 32-bit address, nand_block_isbad()
returns false due to truncated bad block address.

In below code segment,

	if (nand_block_isbad(mtd, offset & ~(mtd->erasesize - 1)))

offset is 64-bit and mtd->erasesize is 32-bit, hence the truncation is
happening. Cast 'mtd->erasesize' with loff_t to fix this issue.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-09-11 17:13:56 -04:00
Pedro Aguilar
142775a52b env: Crash in 'env import' when using checksum and a specific size
This patch adds a sanity check that avoids 'size' to overflow and crash when
importing an environment that contains a checksum. Example with the wrong size
that causes the crash:

=> env import -c 0x4100000 3 v1

This assumes that v1 has already been successfully exported with
'env export -c -s 0x100 0x4100000 v1'

Signed-off-by: Pedro Aguilar <pedro.aguilar@vimar.com>
2020-09-11 17:13:56 -04:00
Heinrich Schuchardt
21d3946840 bootm: update image OS image size when decompressing
In bootm_load_os() the OS image is decompressed. In later stages of the
boot process we need the decompressed size of the image.

Update images->os.image_len after decompression.

Passing the correct size is necessary if we want to check loaded EFI
binararies for file truncation by comparing the loaded size to the header
field SizeOfImage.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-09-11 17:13:56 -04:00
Michal Simek
91b735d11f common: Kconfig: Add dependency for default variables strings
Kconfig provides several config options for setting up default variables
but these are unused when variables are passed to U-Boot via file.
That's why cover this dependency in Kconfig.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-09-11 17:13:55 -04:00
Chuanjia Liu
9250d0bad5 PCI: mediatek: Release the resource when PCIe enable port fail
On the mt7623 platform, if one port enable fail and other port
enable succeed. It will hang on when using pci enum
because the resource was not released correctly.

Signed-off-by: Chuanjia Liu <Chuanjia.Liu@mediatek.com>
Tested-by: Frank Wunderlich <frank-w@public-files.de>
2020-09-10 15:32:09 -04:00
Tom Rini
3dd52dd69e Merge tag 'u-boot-amlogic-20200910' of https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic
- enables HDMI output & USB keyboard for Odroid-N2
- setups HDMI output background & enables USB keyboard
2020-09-10 09:04:02 -04:00
Anand Moon
92f10e6135 configs: odroid-c4: update for HDMI output background & USB keyboard
Enable options SYS_WHITE_ON_BLACK to permit HDMI background
screen from white to back, also enable USB_KEYBOARD.

Signed-off-by: Anand Moon <linux.amoon@gmail.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2020-09-10 10:51:36 +02:00
Anand Moon
3b3c048697 configs: odroid-n2: update for HDMI output & USB keyboard
Enable options to permit HDMI output on Odroid-N2 G12B boards.
Enable VPU Power Domain.
Enable USB_KEYBOARD.

Signed-off-by: Anand Moon <linux.amoon@gmail.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2020-09-10 10:51:36 +02:00
Tom Rini
a34746b86e Merge tag 'u-boot-stm32-20200909' of https://gitlab.denx.de/u-boot/custodians/u-boot-stm
- fixes on AV96 board: pull up on UART4 RX and adjust PLL4
2020-09-09 12:59:02 -04:00
Marek Vasut
b6055945d6 ARM: dts: stm32: Adjust PLL4 settings on AV96 again
PLL4Q is supplying both FDCAN and LTDC. In case HDMI is in use, the
50 MHz generated from PLL4Q cannot be divided well enough to produce
accurate clock for HDMI pixel clock. Adjust it to generate 74.25 MHz
instead. The PLL4P/PLL4R are generating 99 MHz instead of 100 MHz,
which is in tolerance for the SDMMC.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Gerald Baeza <gerald.baeza@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-09-09 15:02:23 +02:00
Marek Vasut
43e2d1dd47 ARM: dts: stm32: Pull UART4 RX high on AV96
There is no dedicated pull resistor on the AV96 UART4 (console UART)
pin. In case there is no UART adapter installed on the AV96, the line
is floating and can trigger reception of garbage characters, which in
turn can abort U-Boot autoboot. Add default pull up to mitigate this
problem.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-09-09 15:01:53 +02:00
Patrick Delaunay
cf8df34015 arm: stm32mp: cleanup test on eth_env_set_enetaddr result
Remove the unnecessary inversion on the eth_env_set_enetaddr() result which
only make complex the code of setup_mac_address() and display an invalid
value in the associated pr_err.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Marek Vasut <marex@denx.de>
2020-09-09 14:19:12 +02:00
Tom Rini
a14b71d0c2 Merge tag 'rpi-next-2020.10.2' of https://gitlab.denx.de/u-boot/custodians/u-boot-raspberrypi
- fixes for bcmgenet
- enable USB keyboard for RPi4 32 bit
2020-09-09 08:17:53 -04:00
Matthias Brugger
40877a1a94 config: Enable USB Keyboard suuport on RPi4 32 bit
Supporting USB keyboards out of the box is both handy for development
and production. Notably if u-boot is used to boot into GRUB. This patch
adds USB keyboard support for 32 bit RPi4 config.

Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2020-09-08 16:45:01 +02:00
Jason Wessel
34873f46ba bcmgenet: Add support for rgmii-rxid
The commit 57805f2270 ("net: bcmgenet: Don't set ID_MODE_DIS when
not using RGMII") needed to be extended for the case of using the
rgmii-rxid.  The latest version of the Rasbperry Pi4 dtb files for the
5.4 now specify the rgmii-rxid.

Signed-off-by: Jason Wessel <jason.wessel@windriver.com>
Tested-by: Petr Tesarik <ptesarik@suse.com>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2020-09-08 16:43:48 +02:00
Jason Wessel
ac458dc823 bcmgenet: fix DMA buffer management
This commit fixes a serious issue occurring when several network
commands are run on a raspberry pi 4 board: for instance a "dhcp"
command and then one or several "tftp" commands. In this case,
packet recv callbacks were called several times on the same packets,
and send function was failing most of the time.

note: if the boot procedure is made of a single network
command, the issue is not visible.

The issue is related to management of the packet ring buffers
(producer / consumer) and DMA.
Each time a packet is received, the ethernet device stores it
in the buffer and increments an index called RDMA_PROD_INDEX.
Each time the driver outputs a received packet, it increments
another index called RDMA_CONS_INDEX.

Between each pair of network commands, as part of the driver
'start' function, previous code tried to reset both RDMA_CONS_INDEX
and RDMA_PROD_INDEX to 0. But RDMA_PROD_INDEX cannot be written from
driver side, thus its value was actually not updated, and only
RDMA_CONS_INDEX was reset to 0. This was resulting in a major
synchronization issue between the driver and the device. Most
visible behavior was that the driver seemed to receive again the
packets from the previous commands (e.g. DHCP response packets
"received" again when performing the first TFTP command).

This fix consists in setting RDMA_CONS_INDEX to the same
value as RDMA_PROD_INDEX, when resetting the driver.

The same kind of fix was needed on the TX side, and a few variables
had to be reset accordingly (c_index, tx_index, rx_index).

The rx_index and tx_index have only 256 entries so the bottom 8 bits
must be masked off.

Originated-by: Etienne Dublé <etienne.duble@imag.fr>
Signed-off-by: Jason Wessel <jason.wessel@windriver.com>
Tested-by: Petr Tesarik <ptesarik@suse.com>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2020-09-08 16:43:02 +02:00
Tom Rini
96d66a9b8c Prepare v2020.10-rc4
Signed-off-by: Tom Rini <trini@konsulko.com>
2020-09-07 14:17:33 -04:00
Tom Rini
a475ad7f9e configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2020-09-07 14:05:55 -04:00
Tom Rini
06193ca210 Merge tag 'efi-2020-10-rc4' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi
Pull request for UEFI sub-system for efi-2020-10-rc4

Bug fixes are provided in the following areas:

* convert file system debug and print messages go log messages
* convert UEFI booting messages to log messages
* UEFI related code clean up and simplification
2020-09-07 08:49:50 -04:00
Heinrich Schuchardt
d2a885720b efi_selftest: simplify Makefile
CONFIG_EFI_LOADER cannot be selected for ARMv7-M CPUs. So don't check it in
the Makefile.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-09-06 21:21:41 +02:00
Heinrich Schuchardt
578d7cc8fa efi_loader: remove duplicate image size check
The image size is checked in efi_load_pe(). Avoid checking it twice.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-09-06 21:21:41 +02:00
Heinrich Schuchardt
5b94e26f1a efi: clean up efi command
* Eliminate superfluous enum value EFI_TABLE_END.
* Use correct variable type for the memory type.
* Check validity of memory type.
* Make efi_build_mem_table static.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-09-06 21:21:41 +02:00
Heinrich Schuchardt
0f7878b853 efi_loader: error message if image not authenticated
Currently if the bootefi command fails due to missing authentication, the
user gets no feedback.

Write a log message 'Image not authenticated' if LoadImage() fails due to
missing authentication.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-09-06 21:21:41 +02:00
Heinrich Schuchardt
24586059d3 efi_loader: log function in image loader
Use log_err() for error messages.
Replace debug() by EFI_PRINT().

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-09-06 21:21:41 +02:00
Heinrich Schuchardt
c2f010393b efi_loader: log messages for bootefi command
Write log messages when booting via the bootefi command to allow tracking
on the syslog server. Example messages are

    Booting /snp.efi

or

    Booting /MemoryMapped(0x0,0x4fe00000,0x35a40)
    Loading image failed

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-09-06 21:21:41 +02:00
Heinrich Schuchardt
0d32d8cf9d fs: convert error and debug messages to log
Use log functions for error and debug messages of the file-system.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-09-06 21:21:41 +02:00
Tom Rini
e5df264e7a Merge https://gitlab.denx.de/u-boot/custodians/u-boot-marvell
- Fix SATA issue on Armada 3720
- Enable more SPI NOR chips in espressobin defconfig
2020-09-04 10:09:14 -04:00
Konstantin Porotchkin
3e5420e99a defconfig: espressobin: Add support for ISSI SPI flashes
Enable support of ISSI SPI flashes found on EspressoBIN boards

Change-Id: I6de61c48f108fb4f410f321b9db45887d23212e5
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Reviewed-on: http://vgitil04.il.marvell.com:8080/61455
Tested-by: iSoC Platform CI <ykjenk@marvell.com>
Reviewed-by: Grzegorz Jaszczyk <jaz@semihalf.com>
Reviewed-by: Stefan Chulski <stefanc@marvell.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-09-04 14:02:00 +02:00
Konstantin Porotchkin
2f8cfd030e defconfig: espressobin: Include support for Gigadevice SPI
Include support for CONFIG_SPI_FLASH_GIGADEVICE for supporting
newly produces EspressoBin boards (v7)

Change-Id: I5d4b972cbe2ee5a9d52ce9908794ad4e1b59ee3b
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Reviewed-on: http://vgitil04.il.marvell.com:8080/61236
Tested-by: iSoC Platform CI <ykjenk@marvell.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-09-04 14:02:00 +02:00
zachary
7757c85199 phy: marvell: a3700: add sata comphy on lane 2 with invert option
- This patch moves sata phy powerup from dedicate phy to compphy
  and adds invert option for sata powerup routine.

Change-Id: I1b4e8753e2b2c14c6efa97bca2ffc7d2553d8a90
Signed-off-by: zachary <zhangzg@marvell.com>
Signed-off-by: Ken Ma <make@marvell.com>
Reviewed-on: http://vgitil04.il.marvell.com:8080/53601
Reviewed-by: Igal Liberman <igall@marvell.com>
Tested-by: Igal Liberman <igall@marvell.com>
[a.heider: adapt to mainline]
Signed-off-by: Andre Heider <a.heider@gmail.com>
Tested-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-09-04 14:02:00 +02:00
Tom Rini
9bfb567e5f Merge branch 'master' of git://git.denx.de/u-boot-usb
- Mostly DFU fixes and r8152 fixes
2020-09-03 09:48:28 -04:00
Tom Rini
7f4d3c0445 Merge branch 'master' of git://git.denx.de/u-boot-sh
- SH serial bugfix
2020-09-03 09:00:35 -04:00
Tom Rini
f766e8bced Merge branch 'for-tom' of https://github.com/lftan/u-boot
- SoCFPGA bugfix
2020-09-03 08:59:16 -04:00
Chee Hong Ang
6b6307ed22 arm: socfpga: soc64: Check FPGA Config status register before bridge reset
Instead of querying SDM for FPGA configuration status through mailbox
messages, U-Boot now checks System Manager's FPGA Config status register
for FPGA configuration status before resetting bridge.

Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
2020-09-03 11:26:07 +08:00
Tom Rini
7149077353 Azure/GitLab: Update to latest Docker container
- New base snapshot
- Fix for high UID/GID numbers on a toolchain

Signed-off-by: Tom Rini <trini@konsulko.com>
2020-09-02 09:22:29 -04:00
Tom Rini
502f0489f1 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-x86
- Fix parsing of "mtrr list" command
- Introduce USE_EARLY_BOARD_INIT option and remove dead codes for most
  x86 boards
2020-09-01 11:02:54 -04:00
Gary Bisson
293a6dfeb9 fastboot: getvar: fix partition-size return value
The size returned by 'getvar partition-size' should be in bytes, not in
blocks as fastboot uses that value to generate empty partition when
running format [1].

Note that the function was already returning the proper size in bytes
for NAND devices (see struct part_info details).

[1]
https://android.googlesource.com/platform/system/core/+/refs/heads/android10-release/fastboot/fastboot.cpp#1500

Signed-off-by: Gary Bisson <gary.bisson@boundarydevices.com>
2020-09-01 14:47:43 +02:00
yurii.pidhornyi
64af06ce91 fastboot: Fix fastboot reboot fail by changing functions order
It was revealed that when the fastboot_tx_write_str function is called
without the previously initialized fastboot_func->in_req->complete field,
a copy of in_req will be sent to the I/O requests queue without
an initialized field.

Moving a piece of code with the initializing of the
fastboot_func->in_req->complete field above transmit_tx allows to solve
this problem.

Fixes: 65c96757fe "usb: fastboot: Convert USB f_fastboot to shared fastboot"
Signed-off-by: yurii.pidhornyi <yurii.pidhornyi@globallogic.com>
2020-09-01 14:47:43 +02:00
Sherry Sun
405217a033 f_sdp: Change bInterval of interrupt endpoint to 3
Since the USB HID limits the maximum bandwidth(3072) for interrupt
endpoint transfers, when the bInterval set to 1, we can only support 3
boards to run sdp at the same time. In order to support more boards,
change the bInterval of interrupt endpoint to 3, which will not affect
the transmission speed.

Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Sherry Sun <sherry.sun@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-09-01 14:47:43 +02:00
Sherry Sun
9e06c5c55a f_sdp: Add EP1_OUT as default data receive pipe in sdp
EP0 has been used to transfer file data in sdp before, but the max
packetsize of ep0 is 64 bytes. So in order to improve the file transfer
speed, here add the EP1_OUT interrupt endpoint which max packetsize is
set to 1024 byte.

After testing, it turns out that using ep1out is twice as fast as using
ep0 while receiving data in sdp.

Signed-off-by: Sherry Sun <sherry.sun@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-09-01 14:47:43 +02:00
Peng Fan
27c803848b spl: add g_dnl_get_board_bcd_device_number
Add g_dnl_get_board_bcd_device_number, the new BCD value is used by uuu to distinguish
if the SPL supports the SDPV.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
2020-09-01 14:47:43 +02:00
Peng Fan
b0e9f3e593 f_sdp: Support searching and loading FIT or container image
Add support to f_sdp to search and load iMX8 container image or iMX8M
FIT image by new UUU command SDPV.

When using the SDPV, the uuu will continue to send out data after first
level boot loader used by ROM. This means uuu won't skip to the offset
of the second boot loader, and the padding data before second boot loader
will be sent out. So we have to search the FIT header or container header
in the buffer that SDP received.

Also change to more common method to exit f_sdp handler not depending on
SPL_FIT_FOUND flag because container loader won't set this.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-09-01 14:47:43 +02:00
Ye Li
5dee7f0b02 f_sdp: Fix wrong usb request size
Because the buffer length of sdp usb request is 65, we have to allocate
65 bytes not 64 bytes. Otherwise there is potential buffer overflow.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
2020-09-01 14:47:43 +02:00
Ye Li
d10d429112 f_sdp: Add high speed endpoint descriptor
Add HS endpoint descriptor for SDP. So that we can use high speed endpoint,
and the SDP device can send packet with 512 byte size.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
2020-09-01 14:47:43 +02:00
Frank Li
0ced2faba0 sdp: call board_usb_init at spl_sdp_load_image
Need initialize UDC before run sdp download

Signed-off-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-09-01 14:47:43 +02:00
Jassi Brar
7ed4eac43d usb: max3420: add the gadget driver
MAX3420 implements FullSpeed USB Device over SPI.
Another version MAX3421, also implements USB Host mode.
This driver should be good for the device mode of max3421 as well.

Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2020-09-01 14:47:43 +02:00
Roman Kovalivskyi
0ebf9842e5 fastboot: Add default fastboot_set_reboot_flag implementation
Default implementation of fastboot_set_reboot_flag function that depends
on "bcb" commands could be used in general case if there are no need to
make any platform-specific implementation, otherwise it could be
disabled via Kconfig option FASTBOOT_USE_BCB_SET_REBOOT_FLAG.

Please note that FASTBOOT_USE_BCB_SET_REBOOT_FLAG is mutually exclusive
with some platforms which already have their own implementation of this
function.

Signed-off-by: Roman Kovalivskyi <roman.kovalivskyi@globallogic.com>
2020-09-01 14:47:43 +02:00
Roman Kovalivskyi
2b2a771b40 fastboot: Add support for 'reboot fastboot' command
Android 10 adds support for dynamic partitions and in order to support
this userspace fastboot must be used[1]. New tool fastbootd is
included into recovery.

Userspace fastboot works from recovery and is launched if:
1) - Dynamic partitioning is enabled
2) - Boot control block has 'boot-fastboot' value into command field
The bootloader is expected to load and boot into the recovery image
upon seeing boot-fastboot in the BCB command. Recovery then parses the
BCB message and switches to fastbootd mode[2].

Please note that boot script is expected to handle 'boot-fastboot'
command in BCB and load into recovery mode.

Bootloader must support 'reboot fastboot' command which should reboot
device into userspace fastboot to accomodate those changes[3].

Another command that bootloader must support[3] is 'reboot recovery'. This
command should simply reboot device into recovery mode.

[1] - https://source.android.com/devices/bootloader/fastbootd
[2] - https://source.android.com/devices/bootloader/fastbootd#unified_fastboot_and_recovery
[3] - https://source.android.com/devices/bootloader/fastbootd#modifications_to_the_bootloader

Signed-off-by: Roman Kovalivskyi <roman.kovalivskyi@globallogic.com>
Signed-off-by: Roman Stratiienko <r.stratiienko@gmail.com>
Change-Id: I9d2bdc9a6f6f31ea98572fe155e1cc8341e9af76
2020-09-01 14:47:43 +02:00
Roman Kovalivskyi
851737ab89 fastboot: Extend fastboot_set_reboot_flag with reboot reason
Extend fastboot_set_reboot_flag arguments with reboot reason so that
it could handle different reboot cases in future.

Signed-off-by: Roman Kovalivskyi <roman.kovalivskyi@globallogic.com>
2020-09-01 14:47:43 +02:00
Heinrich Schuchardt
73f4ebb659 dfu: fix dfu tftp on sandbox
The environment variable loadaddr is in the virtual address space of the
sandbox. To get the actual memory address where the FIT image has been
loaded we have to convert this address according to the memory mapping of
the sandbox.

Equally the addresses in the *.its file have to be converted when used in
the dfu_ram driver.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-09-01 14:47:43 +02:00
Heinrich Schuchardt
9337037518 configs: qemu: enable dfu testing
For testing automated updates via dfu and mtd we need the dfu and mtd
commands as well as preboot support.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-09-01 14:47:43 +02:00
Heinrich Schuchardt
40c79420d0 dfu: DFU_MTD depends on CMD_MTDPARTS
Function mtdparts_init() is needed for the DFU MTD driver.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-09-01 14:47:43 +02:00
Heinrich Schuchardt
4e620eb98b dfu: fix typo parameteres
%s/parameteres/parameters/g

Even if a line exceeds 80 characters we should not split output strings
to make debugging easier.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-09-01 14:47:43 +02:00
Filip Brozovic
a17c0cb85e fastboot: Support defining raw partitions without a partition table
Add support for defining raw fastboot partitions in eMMC by specifying
the offset and size in an environment variable. Optionally, the eMMC
hardware partition number may also be specified.

This makes it possible to e.g. update only part of the eMMC boot
partition, instead of having to write the entire partition.

Signed-off-by: Filip Brozovic <fbrozovic@gmail.com>
2020-09-01 14:47:43 +02:00
Ye Li
1468a1cc72 usb: ci_udc: Add function to remove usb device
When unregister gadget driver in ci_udc, the usb device is not
removed or stop. This causes next "usb start" fails to work.

Add a new interface "usb_remove_ehci_gadget" in usb-uclass to
remove the usb device for DM driver. Using "usb_lowlevel_stop" for
non-DM driver.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-09-01 14:47:43 +02:00
Ye Li
213fa47dac usb: gadget: Fix controller index in UMS
The usb mass storage (f_mass_storage.c) uses fixed usb index 0,
this causes problem while CDNS3 USB controller index is 1.
Modify the API of fsg to pass the controller index.

Reviewed-by: Jun Li <jun.li@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-09-01 14:47:43 +02:00
Hayes Wang
3a41086f6a eth/r8152: support RTL8153B/RTL8154B
This is used to support RTL8153B and RTL8154B.

Signed-off-by: Hayes Wang <hayeswang@realtek.com>
2020-09-01 14:47:36 +02:00
Hayes Wang
9f6142aa0a eth/r8152: modify rtl_clear_bp function
The original rtl_clear_bp() is used to clear the firmware of both
PLA and USB MCU. The new one could clear the firmware of PLA or
USB independently. It is unnecessary to clear firmware, if there
is no one to be updated.

Besides, clear the firmware by writing the relative registers in
bulk.

Signed-off-by: Hayes Wang <hayeswang@realtek.com>
2020-09-01 14:47:36 +02:00
Hayes Wang
16b9417b6a eth/r8152: reset PHY after setting it
Some settings of PHY have to work after resetting PHY.

Signed-off-by: Hayes Wang <hayeswang@realtek.com>
2020-09-01 14:47:36 +02:00
Hayes Wang
d74a76234f eth/r8152: reset bmu after disabling Tx/Rx
Reset bmu after disabling Tx/Rx. This is used to clear the FIFO of
Tx/Rx. The remained data may be transferred after Tx/Rx is re-enabled.
And it results in garbage data.

Signed-off-by: Hayes Wang <hayeswang@realtek.com>
2020-09-01 14:47:36 +02:00
Marek Vasut
f5ba5c90d4 serial: sh: Improve FIFO empty check on RX
If the SCIF is receiving data quickly enough, it may happen that the
SCxSR_RDxF flag is cleared in sh_serial_getc_generic(), while the
FIFO still contains data. If that happens, the serial_getc_check()
reports no data in the FIFO as the flag is no longer set. Add one
more check, if the SCxSR_RDxF is not set, read out the FIFO level
and if there are still characters in the FIFO, permit reading them
out.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2020-09-01 14:46:41 +02:00
Simon Glass
1150a0b6bd x86: Drop nhlt_serialise()
This function is not actually used in U-Boot. Drop it.

Suggested-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-09-01 17:00:28 +08:00
Simon Glass
0a0cdeceec x86: pinctrl: Fix 'relatove' typo
Fix this typo in the Kconfig help.

Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-09-01 17:00:27 +08:00
Andy Shevchenko
365a581c1c x86: qemu: Remove dead code
start.S does nothing and can be safely removed. Makefile is still being used
by the build system, so simply replace the rule in it. We use stub C-file
like it's done for other boards.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-09-01 17:00:27 +08:00
Andy Shevchenko
c2addf9fc1 x86: intel: slimbootloader: Remove dead code
start.S does nothing and can be safely removed. Makefile is still being used
by the build system, so simply drop the rule from it.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Aiden Park <aiden.park@intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-09-01 13:38:41 +08:00
Andy Shevchenko
886bce1275 x86: intel: minnowmax: Remove dead code
start.S does nothing and can be safely removed. Makefile is still being used
by the build system, so simply drop the rule from it.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-09-01 13:38:41 +08:00
Andy Shevchenko
9278031ae5 x86: intel: galileo: Remove dead code
start.S does nothing and can be safely removed. Makefile is still being used
by the build system, so simply drop the rule from it.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-09-01 13:38:41 +08:00
Andy Shevchenko
b2253bcaa7 x86: intel: edison: Remove dead code
start.S does nothing and can be safely removed. Makefile is still being used
by the build system, so simply drop the rule from it.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-09-01 13:38:40 +08:00
Andy Shevchenko
e5de5e0625 x86: intel: crownbay: Remove dead code
start.S does nothing and can be safely removed. Makefile is still being used
by the build system, so simply drop the rule from it.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-09-01 13:38:40 +08:00
Andy Shevchenko
41a93718d8 x86: intel: cougarcanyon2: Remove dead code
start.S does nothing and can be safely removed. Makefile is still being used
by the build system, so simply drop the rule from it.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-09-01 13:38:40 +08:00
Andy Shevchenko
d196c18bc8 x86: intel: cherryhill: Remove dead code
start.S does nothing and can be safely removed. Makefile is still being used
by the build system, so simply drop the rule from it.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-09-01 13:38:39 +08:00
Andy Shevchenko
a97e6af422 x86: intel: bayleybay: Remove dead code
start.S does nothing and can be safely removed. Makefile is still being used
by the build system, so simply drop the rule from it.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-09-01 13:38:39 +08:00
Andy Shevchenko
2a2470eba8 x86: efi: efi-x86_payload: Remove dead code
start.S does nothing and can be safely removed. Makefile is still being used
by the build system, so simply drop the rule from it.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-09-01 13:38:39 +08:00
Andy Shevchenko
9f082a8adc x86: dfi: dfi-bt700: Remove dead code
start.S does nothing and can be safely removed. Makefile is still being used
by the build system, so simply drop the rule from it.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-09-01 13:38:39 +08:00
Andy Shevchenko
85759d04cf x86: coreboot: Remove dead code
start.S does nothing and can be safely removed. Makefile is still being used
by the build system, so simply drop the rule from it.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-09-01 13:38:38 +08:00
Andy Shevchenko
ebb2818bcb x86: congatec: conga-qeval20-qa3-e3845: Remove dead code
start.S does nothing and can be safely removed. Makefile is still being used
by the build system, so simply drop the rule from it.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-09-01 13:38:38 +08:00
Andy Shevchenko
45e2340d53 x86: advantech: som-db5800-som-6867: Remove dead code
start.S does nothing and can be safely removed. Makefile is still being used
by the build system, so simply drop the rule from it.

Cc: George McCollister <george.mccollister@gmail.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-09-01 13:38:38 +08:00
Andy Shevchenko
1d01d0c2f0 x86: Introduce USE_EARLY_BOARD_INIT option
Introduce USE_EARLY_BOARD_INIT option and select it by the actual users.

Cc: George McCollister <george.mccollister@gmail.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Aiden Park <aiden.park@intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-09-01 13:38:31 +08:00
Wolfgang Wallner
cf9f38064d x86: mtrr: Fix parsing of "mtrr list" command
The command 'mtrr' does not recognize the 'list' subcommand any more
since the code restructuring in commit b2a76b3fe7 ("x86: mtrr:
Restructure so command execution is in one place").

The if-else parsing the command arguments does not take 'list' into
account: the if-branch is intended for no subcommands, the else-branch
is intended for the non-list subcommands (which all expect additional
arguments). Calling the 'mtrr list' subcommand leads to a "return
CMD_RET_USAGE" in the else-branch.

Fix this by changing the else-branch to explicitly checking for
if (cmd != 'l').

Fixes: b2a76b3fe7 ("x86: mtrr: Restructure so command execution is in one place")
Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2020-09-01 13:24:45 +08:00
Masahiro Yamada
23e333a5c0 MAINTAINERS: step down as maintainer of UniPhier SoCs
I am leaving Socionext. Orphan the UniPhier platform until somebody
takes the role.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-08-31 17:11:24 -04:00
Tom Rini
6ade057e37 Merge tag 'ti-v2020.10-rc4' of https://gitlab.denx.de/u-boot/custodians/u-boot-ti
- Update to ABI 3.0
- Fix i2c write in eeprom driver
2020-08-31 13:06:26 -04:00
Tom Rini
123f4f84f8 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-marvell
- MVEBU Espressobin fixes and enhancements (fix switch security
  issue, enable MVNETA, enable SD-card, fix COMPHY nodes, default
  env variables, etc)
- MMC Xenon: Set signal voltage and max base clock
- a37xx PCI driver: Depend on DM_GPIO and remove #ifdef's
2020-08-31 09:43:13 -04:00
Pali Rohár
64430efe69 arm: mvebu: Espressobin: Update README.marvell file
Include information about permanent ethernet MAC address and add link how
to build ATF as U-Boot on Espressobin cannot be flashed without ATF.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-08-31 14:45:53 +02:00
Pali Rohár
6b61066210 arm: mvebu: Espressobin: Define fdt_addr and kernel_addr env aliases
Boot scripts for existing Espressobin Linux distributions, like OpenWRT,
expect that U-Boot set fdt_addr and kernel_addr envs. So add env aliases
from fdt_addr_r and kernel_addr_r values.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Andre Heider <a.heider@gmail.com>
2020-08-31 14:45:53 +02:00
Pali Rohár
996ecfd3ec arm: mvebu: Espressobin: Change default loadaddr
Current loadaddr is not writable on Espressobin and 'loadb' command cause
rebooting board. Marvell's U-Boot already set default loadaddr to value
0x06000000 [1] and after this change 'loadb' is working fine.

[1] - 0a5b159806

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Andre Heider <a.heider@gmail.com>
2020-08-31 14:45:53 +02:00
Pali Rohár
bb40fe1f6c arm: mvebu: Espressobin: Move env load addresses
According to Marvell's U-Boot description [1] current env load addresses
overlaps with ATF RT services region and TEE. Because the ATF RT service
and TEE region is going to be marked as secure and can't be overwritten,
use different different addresses for envs.

[1] - 0a5b159806

Signed-off-by: Pali Rohár <pali@kernel.org>
Tested-by: Andre Heider <a.heider@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-08-31 14:45:53 +02:00
Pali Rohár
835d969c1f arm64: a37xx: pci: Depends on DM_GPIO
For proper initialization of aardvark pci driver it is required to
de-assert reset GPIO. So depeneds on DM_GPIO option.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Andre Heider <a.heider@gmail.com>
2020-08-31 14:45:53 +02:00
Pali Rohár
a65e65939e arm: mvebu: Espressobin: Setup MTD partitions when booting kernel
Due to different partition layouts in different U-Boot versions, DTS for
Espressobin in Linux does not contain any definition of MTD partitions.
See commit https://git.kernel.org/stable/c/00954566464a4 for more details.

This patch via ft_board_setup() hook fills current partition layout used by
U-Boot, so booted kernel would see correct MTD partitions layout.

U-Boot env partition is calculated from CONFIG_ENV_OFFSET option.

First partition contains secure firmware, ARM trusted firmware and U-Boot
with checksums. So it is not possible to replace just one image (e.g.
U-Boot) without updating other parts where is stored checksum of U-Boot.
Therefore there is no extra partition defined for U-Boot and first
partition is called just 'firmware'.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Konstantin Porotchkin <kostap@marvell.com>
Tested-by: Andre Heider <a.heider@gmail.com>
2020-08-31 14:45:53 +02:00
Pali Rohár
4366082bfe arm: mvebu: Espressobin: Make SPI env offset compatible with Marvell's U-Boot
Espressobin board comes with Marvell's U-Boot version where U-Boot env is
stored in SPI at offset 0x3F0000. This patch changes env offset in
Espressobin defconfig file to match Marvell's U-Boot version.

Users who want to use previous or different env offset can still change it
in .config file when compiling U-Boot.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Konstantin Porotchkin <kostap@marvell.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Andre Heider <a.heider@gmail.com>
2020-08-31 14:45:53 +02:00
Wilson Ding
96fa3c4fda arm: dts: a37x0: enable sd card support on espressobin
Enabled SDIO slot 0 (south bridge) for SD card on
Espressobin board.

Change-Id: I51a2debf9fba276b9c4a2bc6da91328d47f443e3
Signed-off-by: Wilson Ding <dingwei@marvell.com>
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Reviewed-on: http://vgitil04.il.marvell.com:8080/60945
Tested-by: iSoC Platform CI <ykjenk@marvell.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
[pali: Define cd-gpios and enable CONFIG_DM_REGULATOR_GPIO]
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Konstantin Porotchkin <kostap@marvell.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Andre Heider <a.heider@gmail.com>
2020-08-31 14:45:53 +02:00
Evan Wang
91b85e25b6 mmc: xenon: set signal voltage and max base clock
- The SDIO signal voltage and max base clock frequency
  setting are missing in driver, which causes SDIO
  not working.
- The patch adds SDIO signal voltage switch support,
  which is based on regulator-gpio of vqmmc-supply, and
  sets the max base clock frequency.
- Fix the zero clock value in call to sdhci_setup_cfg()
  function.

Change-Id: I79c8860c65b8db166f4f70db56ede4097f71f1fa
Signed-off-by: Evan Wang <xswang@marvell.com>
Reviewed-on: http://vgitil04.il.marvell.com:8080/53589
Reviewed-by: Hua Jing <jinghua@marvell.com>
Tested-by: Hua Jing <jinghua@marvell.com>
[pali: Amended fixup patch]
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Konstantin Porotchkin <kostap@marvell.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Andre Heider <a.heider@gmail.com>
2020-08-31 14:45:53 +02:00
Pali Rohár
828d326216 arm64: a37xx: pci: Assert PERST# signal when unloading driver
This change ensures that PCIe card is put into reset state when U-Boot
stops using it.

DM_FLAG_OS_PREPARE ensures that U-Boot executes driver's remove callback
prior booting Linux kernel.

Linux kernel pci-aardvark driver needs to reset PCIe card via PERST# signal
prior initializing it. If it does not issue reset then some PCIe cards
(specially Compex WiFi cards) are not detected at all.

Putting PCIe card into reset state prior booting Linux kernel would ensure
that card would be properly reset at time when Linux kernel starts
initializing pci-aardvark driver.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Konstantin Porotchkin <kostap@marvell.com>
Tested-by: Andre Heider <a.heider@gmail.com>
2020-08-31 14:45:53 +02:00
Pali Rohár
563b85bd88 arm64: a37xx: pci: Make PCIe Reset GPIO DT compatible with Linux kernel DT
Change active-high to active-low and change DT property name from
reset-gpio to reset-gpios. This format of gpio reset is used by
pci-aardvark driver in Linux kernel.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Konstantin Porotchkin <kostap@marvell.com>
Tested-by: Andre Heider <a.heider@gmail.com>
2020-08-31 14:45:53 +02:00
Marek Behún
545591132a arm64: dts: armada-3720-espressobin: fix COMPHY nodes
This commit fixes initialization of COMPHY on EspressoBin.

Commit 22f418935b ("phy: marvell: a3700: Use comphy_mux on Armada
37xx.") introduced usage of comphy_mux on Armada 37xx comphy driver.
The lanes are defined in comphy_a3700.c as described in functional
specification, that is:
  lane 0 is SGMII1 or USB3
  lane 1 is PCIe or SGMII0
  lane 2 is SATA or USB3

But the DTS for EspressoBin configures PCIe on lane 0 and USB3 on
lane 1, which is wrong in the sense of the specification and doesn't
work with the comphy_mux code, which is 2 years now (the aardvark driver
causes synchronous abort in U-Boot).

It worked till the above mentioned commit, because the code for powering
up PCIe PHY doesn't work with lane number at all, and the code for
powering up USB3 PHY works differently only if USB3 is on lane 2, ie.
the check goes like:
  if (lane == 2)
    something
  else
    something else
so it does not differentiate between lanes 0 and 1.

In the future I shall post patches that remove the comphy_a3700 driver
and add comphy driver which uses calls to ATF, like Linux' driver does.
This will have the advantage of same DTS bindings as Linux', but till
this is done, we need this patch.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Tested-by: Pali Rohár <pali@kernel.org>
Cc: Stefan Roese <sr@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Andre Heider <a.heider@gmail.com>
2020-08-31 14:45:53 +02:00
Pali Rohár
a68676535f arm: mvebu: Espressobin: Enable CONFIG_MVNETA
Espressobin uses mvneta ethernet driver.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Andre Heider <a.heider@gmail.com>
2020-08-31 14:45:53 +02:00
Pali Rohár
48f2c8a37f arm: mvebu: Espressobin: Disallow forwarding packets between wan and lan ports
By default Topaz switch on Espressobin board forwards packets between all
ethernet ports, including CPU (port 0), wan (port 1) and lan (ports 2,3).

This default U-Boot setup is unsuitable for using Espressobin as router as
it opens security hole in forwarding all packets between wan and lan ports.
E.g. dhcp packets from wan network leaks to lan network during small time
window until U-Boot boots Linux kernel which loads network drivers which
disallows forwarding between wan and lan.

This patch fixes above problem. For Espressobin board prior putting Topaz
switch into forwarding mode, Topaz switch is reconfigured to allow
forwarding packets from wan and lan ports only to CPU port. This ensures
that packets from wan port are not forwarded to lan ports and vice-versa.
Packets from CPU port are still forwarded to all other ports, so U-Boot
network boot works with any ethernet port as before.

This problem was already discussed on Espressobin forum [1] and on
Marvell's github issue tracker [2]. As a workaround people on Espressobin
forum patched U-Boot to completely disable lan ports on Topaz switch which
prevented forwarding packets. That workaround had an issue that U-Boot was
unable to netboot via lan ports anymore. Change in this patch does not have
such issue.

This security issue has been dicussed here as well: [3].

[1] - https://web.archive.org/web/20191231164238/http://espressobin.net/forums/topic/boot-behavior-of-the-switch-and-security/
[2] - https://github.com/MarvellEmbeddedProcessors/u-boot-marvell/issues/18
[3] - https://forum.armbian.com/topic/12635-espressobin-uboot-security-concerns-switch-init-portmask/

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Andre Heider <a.heider@gmail.com>
2020-08-31 14:44:14 +02:00
Michal Simek
b892b6d1e0 ti: common: Remove additional i2c read for board detection
There shouldn't be a need to call additional i2c read if above failed
already. Based on comment it should be enough to try to detect legacy
boards which are mentioned in the comment.

Fixes: 2463f6728e ("ti: common: board_detect: Allow DM I2C without CONFIG_DM_I2C_COMPAT")
Fixes: 0bea813d00 ("ARM: omap-common: Add standard access for board description EEPROM")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-08-31 14:40:28 +05:30
Lokesh Vutla
e66ae8e16b arm: dts: k3-am65: Update the RM resource types
Update the ringacc and udma dt nodes to use the latest RM resource types
similar to the ones used in k3-j721e dt nodes.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-08-31 14:39:39 +05:30
Lokesh Vutla
4986b15485 firmware: ti_sci: Drop unused structure ti_sci_rm_type_map
struct ti_sci_rm_type_map is no longer used. Drop its definition and its
declarations.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-08-31 14:39:39 +05:30
Lokesh Vutla
2fe03a1c82 firmware: ti_sci: drop the device ids to resource id translation table
With ABI 3.0, sysfw deprecated special resource types used for AM65x
SoC. Instead started using device id as resource type similar to the
convention used in J721E SOC.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-08-31 14:39:38 +05:30
Tom Rini
9f04a634ef Merge branch '2020-08-27-misc-fixes'
- Fix for gd->ram_top and bootm_size calculations
- Assorted Kconfig entry cleanups / fixes.
- Make checkpatch.pl error on fdt_high/initrd_high=0xffffffff
- Resync scripts/setlocalversion
- Other minor bugfixes
2020-08-28 08:51:37 -04:00
Rasmus Villemoes
2ed1b242ab scripts/setlocalversion: sync with linux 5.8
The linux changes since v3.16 are

78283edf2c01 kbuild: setlocalversion: print error to STDERR
b24413180f56 License cleanup: add SPDX GPL-2.0 license identifier to files with no license
6147b1cf1965 scripts/setlocalversion: git: Make -dirty check more robust
8ef14c2c41d9 Revert "scripts/setlocalversion: git: Make -dirty check more robust"
ff64dd485730 scripts/setlocalversion: Improve -dirty check with git-status --no-optional-locks
7a82e3fa28f1 scripts/setlocalversion: clear local variable to make it work for sh
991b78fbd223 scripts: setlocalversion: fix a bashism
3c96bdd0ebfa scripts: setlocalversion: replace backquote to dollar parenthesis

and it's ff64dd485730 that is the motivation for this sync. It fixes
false positive "-dirty" added to the version string when building with
Yocto
(https://lists.openembedded.org/g/openembedded-core/message/137702).

There has been one U-Boot specific patch since this was synced with
linux 3.16: 81630a3b38 (scripts: setlocalversion: safely extract
variables from auto.conf using awk).  Keep these changes applied.

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
[trini: Re-add 81630a3b38 and reword message]
Signed-off-by: Tom Rini <trini@konsulko.com>
2020-08-27 15:55:18 -04:00
Baruch Siach
7f98b4eeee image: don't exceed gd->ram_top in bootm_size
When board_get_usable_ram_top() limits gd->ram_top, env_get_bootm_size()
must not exceed that limit. Otherwise, boot_relocate_fdt() might put fdt
out of the allowed RAM range.

The similar commit 8ce1f10cf2 ("ARM: bootm: take into account
gd->ram_top") exposed this bug.

This fixes boot on Armada 8040 based Clearfog GT-8K where ram_top is set
to 0x80000000 (2GB), but bi_dram[0].size might be up to 0xc0000000
(3GB). Note the relocated fdt address (0xbfff4000) in the console output
listed below:

Found /extlinux/extlinux.conf
Retrieving file: /extlinux/extlinux.conf
62 bytes read in 21 ms (2 KiB/s)
1:	linux
Retrieving file: /extlinux/Image
13740544 bytes read in 1266 ms (10.4 MiB/s)
Retrieving file: /extlinux/armada-8040-clearfog-gt-8k.dtb
33368 bytes read in 31 ms (1 MiB/s)
   Booting using the fdt blob at 0x4f00000
   Loading Device Tree to 00000000bfff4000, end 00000000bffff257 ... "Synchronous Abort" handler, esr 0x96000045
elr: 000000000006e1cc lr : 0000000000068fd8 (reloc)
elr: 000000007ffa91cc lr : 000000007ffa3fd8
x0 : ffffffffffffffff x1 : 00000000bfffc258
x2 : 0000000000000000 x3 : ffffffffffff7da7
x4 : 0000000004f08258 x5 : 00000000bfff4000
x6 : 00000000bfff4000 x7 : 000000000000000f
x8 : 000000007fb23bf8 x9 : 0000000000000008
x10: 00000000bffff257 x11: 00000000bffff257
x12: 0000000000000000 x13: fffffffffffff000
x14: 00000000bfff4000 x15: 0000000000000021
x16: 000000007ff7bc38 x17: 0000000000000000
x18: 000000007fb2add0 x19: 00000000bfff4000
x20: 0000000004f00000 x21: 000000000000b258
x22: 0000000058820000 x23: 0000000000000010
x24: 000000007ffe3c40 x25: 000000007fb23cb8
x26: 00000000c0000000 x27: 0000000000000000
x28: 000000007fc3fd50 x29: 000000007fb23bd0

Code: 54000061 aa0603e0 d65f03c0 38606882 (38206822)
Resetting CPU ...

Thanks to Patrice CHOTARD who directed me to the right way.

Signed-off-by: Baruch Siach <baruch@tkos.co.il>
2020-08-27 11:26:58 -04:00
Michal Simek
0b2b9b85d0 cmd: mem: Remove already removed CONFIG_SYS_MEMTEST_SCRATCH
The commit e519f03a18 ("cmd: mem: Remove CONFIG_SYS_MEMTEST_SCRATCH
mapping") removed CONFIG_SYS_MEMTEST_SCRATCH but commit 0914011310
("command: Remove the cmd_tbl_t typedef") has added it back. That's why
symbol is still in the tree that's why remove it again.

Fixes: 0914011310 ("command: Remove the cmd_tbl_t typedef
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-27 11:26:58 -04:00
Heinrich Schuchardt
de95930946 lib/rsa: correct check after allocation in fdt_add_bignum()
After allocating to pointer ctx we should check that pointer and not
another pointer already checked above.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-27 11:26:58 -04:00
Heinrich Schuchardt
4431a9889c test: undefined reference to 'sscanf'
Compiling with CONFIG_UNIT_TEST=y leads to:

aarch64-linux-gnu-ld.bfd:
test/lib/sscanf.c:50: undefined reference to `sscanf'

Add missing build dependency.

Fixes:e87dfb0526be ("lib: sscanf: add sscanf implementation")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-08-27 11:26:58 -04:00
Tom Rini
12178b51c2 checkpatch.pl: Make fdt / initrd relocation disabling an error
Entirely disabling relocation of the device tree or initrd is almost
never the right answer.  Doing this by default leads to hard to diagnose
run-time failures.

Signed-off-by: Tom Rini <trini@konsulko.com>
2020-08-27 11:26:58 -04:00
Michal Simek
076617847a env: Kconfig: Add missing dependency for ENV_IS_IN_EXT4
ENV_IS_IN_EXT4 also need to enable FS_EXT4 which is not covered in Kconfig.
Kconfig reports this as:
WARNING: unmet direct dependencies detected for EXT4_WRITE
  Depends on [n]: FS_EXT4 [=n]
  Selected by [y]:
  - ENV_IS_IN_EXT4 [=y] && !CHAIN_OF_TRUST [=n]

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2020-08-27 11:26:58 -04:00
Michal Simek
7b56432c7b arc: Kconfig: Add missing DM dependency
ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
  Depends on [n]: DM [=n]
  Selected by [y]:
  - ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-27 11:26:58 -04:00
Michal Simek
6e741cfa93 cmd: Kconfig: Change dependency for CMD_ADC
CMD_ADC selected DM_REGULATOR unconditionally without enabling DM.
That's why change select to depends on to cover it.

Kconfig is showing this issue as:
WARNING: unmet direct dependencies detected for REGMAP
  Depends on [n]: DM [=n]
  Selected by [y]:
  - DM_REGULATOR_PBIAS [=y] && DM_REGULATOR [=y]

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
[trini: Update CMD_ADC=y configs to enable DM_REGULATOR now]
Signed-off-by: Tom Rini <trini@konsulko.com>
2020-08-27 11:26:39 -04:00
Michal Simek
a261fdce38 pci: kconfig: Setup proper dependency for PCIE_ROCKCHIP
There is missing dependency for PCIE_ROCKCHIP which selects
PHY_ROCKCHIP_PCIE which directly depends on ARCH_ROCKCHIP.

WARNING: unmet direct dependencies detected for PHY_ROCKCHIP_PCIE
  Depends on [n]: ARCH_ROCKCHIP [=n]
  Selected by [y]:
  - PCIE_ROCKCHIP [=y] && PCI [=y]

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2020-08-27 11:20:33 -04:00
Ruben Di Battista
67e62c7468 drivers: usb: Fix config indentation
The indentation was messing up with the scripts/build-whitelist.sh that
was marking SYS_USB_EVENT_POLL_VIA_INT_QUEUE (and probably also the
other indented options) erroneously as ad-hoc configure option with the
following error:

```
Error: You must add new CONFIG options using Kconfig
The following new ad-hoc CONFIG options were detected:
CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE
```
2020-08-27 11:20:33 -04:00
Tom Rini
f87c80ade3 Prepare v2020.10-rc3
Signed-off-by: Tom Rini <trini@konsulko.com>
2020-08-26 17:30:22 -04:00
Tom Rini
d86bf9124f configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2020-08-26 17:26:24 -04:00
Tom Rini
7a1a01c602 Merge tag 'u-boot-imx-20200825' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx
For 2020.10
-----------

- mx6: SOCs user selectable
       Fix for imx6q_logic
       Some DM conversion
- mx7: introduce secondary boot device

Travis: https://travis-ci.org/github/sbabic/u-boot-imx/builds/720918010

Signed-off-by: Tom Rini <trini@konsulko.com>
2020-08-25 23:12:43 -04:00
Tom Rini
9f9ecd3e4d Merge https://gitlab.denx.de/u-boot/custodians/u-boot-marvell
- Add basic Marvell/Cavium OcteonTX/TX2 support (Suneel)
- Infrastructure changes to PCI uclass to support these SoC's (Suneel)
- Add PCI, MMC & watchdog driver drivers for OcteonTX/TX2 (Suneel)
- Increase CONFIG_SYS_MALLOC_F_LEN for qemu-x86 (Stefan)
2020-08-25 13:38:29 -04:00
Tom Rini
ec54217ddc Merge tag 'i2c-bugfixes-for-v2020.10' of https://gitlab.denx.de/u-boot/custodians/u-boot-i2c
i2c bugfixes for v2020.10
- fix some issues with octeon_i2c driver on ARM Octeon TX2
- fix link failure with CONFIG_SPL and CONFIG_I2C_MUX_PCA954x
2020-08-25 08:19:41 -04:00
Tom Rini
e49a9d4ddb Merge tag 'u-boot-rockchip-20200820' of https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip
- Fix rk3399 evb sdcard support
- Fix for SPL_LED support
2020-08-25 08:19:14 -04:00
Tom Rini
078656186f Merge https://gitlab.denx.de/u-boot/custodians/u-boot-riscv
- Sipeed Maix support S-mode.
- Provide command sbi.
- Use fdtdec_get_addr_size_auto_parent to get fu540 cache base address.
- Fix a compiler error with CONFIG_SPL_SMP=n.
- Fix sifive ram driver 32 compiler warnings.
- Fix kendryte/pll.h redefine nop() warning.
2020-08-25 08:18:50 -04:00
Tom Rini
8ee3a24fdc Merge branch '2020-08-24-misc-improvements'
- Squashfs compression support
- Coverity fixes
- XEN guest updates
- Finish previous MediaTek updates
- Arm Total Compute platform support
2020-08-25 08:12:05 -04:00
Stefan Roese
6944937f9c x86: qemu-x86_defconfig: Increase CONFIG_SYS_MALLOC_F_LEN
With the upcoming increase of the malloc area in U-Boot
("pci: pci-uclass: Dynamically allocate the PCI regions"), the CI QEMU
x86 test fails:

U-Boot 2020.10-rc2-g0a668f6d38 (Aug 25 2020 - 06:12:51 +0000)

alloc space exhausted
Error binding driver 'cpu_qemu': -12
Some drivers failed to bind
alloc space exhausted
initcall sequence fff6a760 failed at call fff13b3d (err=-19)

This patch now increases CONFIG_SYS_MALLOC_F_LEN to 0x1000, which is
already used on qemu-x86_64_defconfig.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
2020-08-25 11:37:57 +02:00
Grygorii Tertychnyi
acbc1d86f1 imx8m: config: convert to bootm_size
Restrict the memory range available for image processing in the
"bootm" to 256 MiB so the kernel can access it and FDT or initrd are
not overwritten on ARM64.

Signed-off-by: Grygorii Tertychnyi <grygorii.tertychnyi@leica-geosystems.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2020-08-25 10:26:38 +02:00
Adam Ford
74d8f9d562 ARM: imx6q_logic: Fix broken booting by moving fdt_addr_r address
The loading address is too close to the kernel address, so newer kernels
may overlap memory space, so loading the device tree may corrupt zImage.

This patch moves the fdt_addr_r to 0x14000000 which is also consistent
with guidance that the kernel be allocated 32MB.  This places it
in the same place as the ramdisk, so this patch moves the ramdisk address
512KB after the fdt.

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2020-08-25 10:26:31 +02:00
Fabio Estevam
821a987fec pico-imx6: Remove unneeded CONFIG_DM_MDIO
As explained in the CONFIG_DM_MDIO text inside drivers/net/Kconfig:

"Useful in particular for systems that support
DM_ETH and have a stand-alone MDIO hardware block shared by multiple
Ethernet interfaces."

i.MX6 has a single FEC instance, so there is no need to select
CONFIG_DM_MDIO.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
2020-08-25 10:26:24 +02:00
Tom Rini
f27ffe4177 arm: mx6: Make all i.MX6 SoCs user-selectable
We have a number of platforms that are a combination of a carrier board
and System-on-Module (SoM) that in turn allows for the board to have
different SoCs on it.  In some cases, this is handled via board-specific
Kconfig options.  In other cases we make use of
CONFIG_SYS_EXTRA_OPTIONS.  This latter case however can lead to invalid
configurations as we will not in turn get options that in Kconfig are
selected by or depend on that setting.

To resolve this, make the SoC option a choice in Kconfig and make boards
depend on what they can support.  This change opens us up for further
clean-ups in the cases where a single CONFIG_TARGET_xxx can support
different SoCs and today they do not, or do not cleanly do so.

Reported-by: Matt Porter <mporter@konsulko.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: "NXP i.MX U-Boot Team" <uboot-imx@nxp.com>
Cc: Soeren Moch <smoch@web.de>
Cc: Markus Niebel <Markus.Niebel@tq-group.com>
Cc: Igor Opaniuk <igor.opaniuk@toradex.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Nikita Kiryanov <nikita@compulab.co.il>
Cc: Andreas Geisreiter <ageisreiter@dh-electronics.de>
Cc: Ludwig Zenz <lzenz@dh-electronics.de>
Cc: Lukasz Majewski <lukma@denx.de>
Cc: Akshay Bhat <akshaybhat@timesys.com>
Cc: Ken Lin <Ken.Lin@advantech.com.tw>
Cc: Ian Ray <ian.ray@ge.com>
Cc: Tim Harvey <tharvey@gateworks.com>
Cc: Jagan Teki <jagan@amarulasolutions.com>
Cc: Raffaele RECALCATI <raffaele.recalcati@bticino.it>
Cc: Simone CIANNI <simone.cianni@bticino.it>
Cc: Adam Ford <aford173@gmail.com>
Cc: Marcin Niestroj <m.niestroj@grinn-global.com>
Cc: "Eric Bénard" <eric@eukrea.com>
Cc: Baruch Siach <baruch@tkos.co.il>
Cc: Jason Liu <jason.hui.liu@nxp.com>
Cc: Ye Li <ye.li@nxp.com>
Cc: Eric Nelson <eric@nelint.com>
Cc: Troy Kisky <troy.kisky@boundarydevices.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Parthiban Nallathambi <parthiban@linumiz.com>
Cc: Marek Vasut <marex@denx.de>
Cc: "Sébastien Szymanski" <sebastien.szymanski@armadeus.com>
Cc: Christian Gmeiner <christian.gmeiner@gmail.com>
Cc: Niel Fourie <lusus@denx.de>
Cc: Martyn Welch <martyn.welch@collabora.com>
Cc: Richard Hu <richard.hu@technexion.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Boris Brezillon <bbrezillon@kernel.org>
Cc: Arkadiusz Karas <arkadiusz.karas@somlabs.com>
Cc: Breno Lima <breno.lima@nxp.com>
Cc: Francesco Montefoschi <francesco.montefoschi@udoo.org>
Cc: Silvio Fricke <open-source@softing.de>
Tested-by: Matt Porter <mporter@konsulko.com> [colibri_imx6]
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Marcin Niestroj <m.niestroj@grinn-global.com>
2020-08-25 10:26:14 +02:00
Suneel Garapati
0a668f6d38 arm: octeontx2: Add support for OcteonTX2 SoC platforms
This patch adds support for all OcteonTX2 96xx/95xx
boards from Marvell.
For 96xx boards, use octeontx_96xx_defconfig and
for 95xx boards, use octeontx_95xx_defconfig.

Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
2020-08-25 08:01:16 +02:00
Suneel Garapati
03c2288070 arm: octeontx: Add support for OcteonTX SoC platforms
This patch adds support for all OcteonTX 81xx/83xx
boards from Marvell.
For 81xx boards, use octeontx_81xx_defconfig and
for 83xx boards, use octeontx_83xx_defconfig.

Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
2020-08-25 08:01:16 +02:00
Suneel Garapati
af6ba90048 watchdog: Add reset support for OcteonTX / TX2
Adds support for Core 0 watchdog poke on OcteonTX and OcteonTX2
platforms.

Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-25 08:01:16 +02:00
Suneel Garapati
708598997d mmc: Add MMC controller driver for OcteonTX / TX2
Adds support for MMC controllers found on OcteonTX or
OcteonTX2 SoC platforms.

Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
Cc: Peng Fan <peng.fan@nxp.com>
2020-08-25 08:01:16 +02:00
Suneel Garapati
638d705a54 pci: Add PCI controller driver for OcteonTX / TX2
Adds support for PCI ECAM/PEM controllers found on OcteonTX
or OcteonTX2 SoC platforms.

Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
2020-08-25 08:01:16 +02:00
Suneel Garapati
3f6f0cd8fd ata: ahci: Add BAR index quirk for Cavium PCI SATA device
For SATA controller found on OcteonTX SoC's, use non-standard PCI BAR0
instead of BAR5.

Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-25 08:01:16 +02:00
Suneel Garapati
04cd0a0fa0 arm: octeontx2: Add headers for OcteonTX2
Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
2020-08-25 08:01:16 +02:00
Suneel Garapati
387d321add arm: octeontx: Add headers for OcteonTX
Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-25 08:01:16 +02:00
Suneel Garapati
c2f45b6588 arm: include/asm/io.h: Add 64bit clrbits and setbits helpers
Add 64bit API for clrbits and setbits.

Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-25 08:01:16 +02:00
Suneel Garapati
f0c369284d pci: pci-uclass: Check validity of ofnode
Add check if the referenced ofnode is valid.

Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
2020-08-25 08:01:16 +02:00
Suneel Garapati
a3fac3f395 pci: pci-uclass: Add support for Alternate-RoutingID capability
If ARI capability is found on device, use it to update next function
number in bus scan and also helps to skip unnecessary bdf scans.

Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
2020-08-25 08:01:16 +02:00
Suneel Garapati
51eeae91c5 pci: pci-uclass: Add VF BAR map support for Enhanced Allocation
Makes dm_pci_map_bar API available to map BAR for Virtual function
PCI devices which support Enhanced Allocation.

Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
2020-08-25 08:01:16 +02:00
Suneel Garapati
b8852dcfcb pci: pci-uclass: Add support for Single-Root I/O Virtualization
SR-IOV - Single Root I/O Virtualization
PF - Physical Function VF - Virtual Function

If SR-IOV capability is present, use it to initialize Virtual Function
PCI device instances. pci_sriov_init function will read SR-IOV
registers to create VF devices under the PF PCI device and also bind
driver if available. This function needs to be invoked from Physical
function device driver which expects VF device support, creating
minimal impact on existing framework.

Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
2020-08-25 08:01:16 +02:00
Suneel Garapati
636cc1773a pci: pci-uclass: Add support for Enhanced Allocation in Bridges
If Enhanced Allocation capability is present in bridges, use it
to read the fixed sub-ordinate bus number.

Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
2020-08-25 08:01:16 +02:00
Suneel Garapati
4cf56ec07f pci: pci-uclass: Add multi entry support for memory regions
Enable PCI memory regions in ranges property to be of multiple entry.
This helps to add support for SoC's like OcteonTX/TX2 where every
peripheral is on PCI bus.

Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
2020-08-25 08:01:16 +02:00
Trommel, Kees (Contractor)
660606091f Link failure with CONFIG_SPL and CONFIG_I2C_MUX_PCA954x
Fix for the case of a U-Boot configuration with CONFIG_SPL,
CONFIG_I2C_MUX, CONFIG_I2C_MUX_PCA954x, no CONFIG_SPL_DM and no
CONFIG_SPL_I2C_MUX. Without this fix linking of pca954x fails because
dm_write_i2c does not exist because CONFIG_SPL_DM is not defined.

Signed-off-by: Kees Trommel <kees.trommel.contractor@draeger.com>
Cc:  Heiko Schocher <hs@denx.de>
2020-08-25 06:25:42 +02:00
Stefan Roese
af03bde0fa i2c: octeon_i2c: Misc fixes for ARM Octeon TX2 support
This patch fixes a few issues noticed, when testing this new driver on
ARM Octeon TX2 again. Here the details:

- Remove "common.h" header inclusion
- Use correct THP define on Octeon TX2
- Octeon TX2 uses the same compatible as Octeon TX. We can't distinguish
  both platforms this way. Remove the unused "cavium,thunder2-99xx-twsi"
  compatible and add a check to the Octeon TX2 specific
  "cavium,thunderx-i2c" so that the correct driver data is selected.
- Removed "struct pci_device_id" definition and U_BOOT_PCI_DEVICE()
  as its not needed for the PCI based probing on Octeon TX2

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Suneel Garapati <sgarapati@marvell.com>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2020-08-25 06:21:23 +02:00
Suneel Garapati
bc30140d20 pci: pci-uclass: Make DT subnode parse optional
Parse subnode DT properties only if parent node is valid.
Otherwise, assert is triggered on ofnode_valid in ofnode_first_subnode
from dev_for_each_subnode.

Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
2020-08-25 05:41:09 +02:00
Suneel Garapati
b3699a13a6 pci: pci-uclass: Fix incorrect argument in map_physmem
Fix argument ordering for map_physmem() called in dm_pci_map_ea_bar().
Additinally minor spelling correction.

Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
2020-08-25 05:41:09 +02:00
Stefan Roese
e002474158 pci: pci-uclass: Dynamically allocate the PCI regions
Instead of using a fixed length pre-allocated array of regions, this
patch moves to dynamically allocating the regions based on the number
of available regions plus the necessary regions for DRAM banks.

Since MAX_PCI_REGIONS is not needed any more, its removed completely
with this patch.

Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Thierry Reding <treding@nvidia.com>
Cc: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-08-25 05:41:09 +02:00
Stefan Roese
65f8c7edd8 ARM: renesas: Drop unnecessary function ft_board_setup()
Marek explained on IRC, that ft_board_setup() is not used / necessary
at all. So its best to just drop it completely, as it interferes with
the cleanup of CONFIG_MAX_PCI_REGIONS (completely removed).

Signed-off-by: Stefan Roese <sr@denx.de>
Suggested-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-25 05:41:09 +02:00
Stefan Roese
3b7cd265b8 pci: pci-uclass: Remove #ifdef CONFIG_NR_DRAM_BANKS as its always set
Since the migration to Kconfig, CONFIG_NR_DRAM_BANKS is configured for
all boards. Hence we can remove the conditional compilation and the code
path that will never get compiled.

Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
2020-08-25 05:41:09 +02:00
Stefan Roese
68f81b8575 dm: core: Add API to read PCI bus-range property
Add dev_read_pci_bus_range() to read bus-range property values

Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-25 05:41:09 +02:00
Suneel Garapati
1db7ee464f fdtdec: Add API to read pci bus-range property
Add fdtdec_get_pci_bus_range to read bus-range property
values.

Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-25 05:41:09 +02:00
Heinrich Schuchardt
c92b50a44b cmd: provide command sbi
Provide a command to display information about the SBI implementation.

The output might look like:

=> sbi
SBI 0.2
OpenSBI
Extensions:
  sbi_set_timer
  sbi_console_putchar
  sbi_console_getchar
  sbi_clear_ipi
  sbi_send_ipi
  sbi_remote_fence_i
  sbi_remote_sfence_vma
  sbi_remote_sfence_vma_asid
  sbi_shutdown
  SBI Base Functionality
  Timer Extension
  IPI Extension
  RFENCE Extension
  Hart State Management Extension

The command can be used to construct a unit test checking that the
communication with the SEE is working.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Tested-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Pragnesh Patel <pragnesh.patel@openfive.com>
Tested-by:  Pragnesh Patel <pragnesh.patel@openfive.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Tested-by: Rick Chen <rick@andestech.com>
2020-08-25 09:34:47 +08:00
Heinrich Schuchardt
27cef4e4a3 configs: defconfig for Sipeed Maix in S-mode
Provide a defconfig that can be used to build U-Boot for the Maix boards
running upon OpenSBI.

Update the documentation.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
2020-08-25 09:33:54 +08:00
Heinrich Schuchardt
092f15aee5 riscv: fix building with CONFIG_SPL_SMP=n
Building with CONFIG_SPL_SMP=n results in:

arch/riscv/lib/spl.c: In function ‘jump_to_image_no_args’:
arch/riscv/lib/spl.c:33:6:
error: unused variable ‘ret’ [-Werror=unused-variable]
   33 |  int ret;
      |      ^~~

Define the variable ret as __maybe_unused.

Fixes: 191636e448 ("riscv: Introduce SPL_SMP Kconfig option for U-Boot SPL")
Fixes: 8c59f2023c ("riscv: add SPL support")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Pragnesh Patel <pragnesh.patel@openfive.com>
2020-08-25 09:33:45 +08:00
Heinrich Schuchardt
183f1e2712 clk: kendryte/pll.h: do not redefine nop()
The kendryte PLL code uses nop as barrier. The macro is not defined for
the sandbox on x86 but is defined on RISC-V.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
2020-08-25 09:33:35 +08:00
Bin Meng
3ab2601052 ram: sifive: Fix compiler warnings for 32-bit
priv->info.size is of type 'size_t' but the length modifier is l.
Fix this by casting priv->info.size. Note 'z' cannot be used as
the modifier as SPL does not support that.

Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Pragnesh Patel <pragnesh.patel@openfive.com>
2020-08-25 09:33:16 +08:00
Bin Meng
52dc7ae749 riscv: fu540: Use correct API to get L2 cache controller base address
At present fdtdec_get_addr() is used to get L2 cache controller base
address. This only works for a fixed #address-cells and #size-cells.
Change to use fdtdec_get_addr_size_auto_parent() instead.

Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Pragnesh Patel <pragnesh.patel@openfive.com>
2020-08-25 09:33:16 +08:00
Tom Rini
3c0cec035e Merge tag 'efi-2020-10-rc3-3' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi
Pull request for UEFI sub-system for efi-2020-10-rc3 (3)

The following bug fixes are contained in this pull-request:

* ResetSystem() should no hang if not implemented.
* Device paths in Bootxxxx variables should be verified.
* Use ':' as separator for command setenv -e -i instead of ','.
* Correct comments for functions.
* Update UEFI documentation.
2020-08-24 17:28:18 -04:00
Anastasiia Lukianenko
3337b29144 xen: Code style conformity
Cleaning up the following:

ERROR: do not use assignment in if condition
#281: FILE: drivers/xen/pvblock.c:260:
+       if ((err = xenbus_switch_state(XBT_NIL, nodename,
CHECK:COMPARISON_TO_NULL: Comparison to NULL could be written "err"
#52: FILE: drivers/xen/pvblock.c:298:
+       if (err != NULL) {
ERROR: do not use assignment in if condition
#176: FILE: drivers/xen/gnttab.c:103:
+               if ((flags = nflags) & (GTF_reading | GTF_writing)) {
WARNING: Missing or malformed SPDX-License-Identifier tag in line 1
#329: FILE: include/xen/gnttab.h:1:
+/*
WARNING: Misplaced SPDX-License-Identifier tag - use line 1 instead
#330: FILE: include/xen/gnttab.h:2:
+ * SPDX-License-Identifier: GPL-2.0
ERROR: do not use assignment in if condition
#630: FILE: lib/sscanf.c:558:
+                               if ((n = inr) < width) {

Signed-off-by: Anastasiia Lukianenko <anastasiia_lukianenko@epam.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-24 14:11:31 -04:00
Anastasiia Lukianenko
d226b3cd25 board: xen: Remove unnecessary CONFIG_INITRD_TAG and CONFIG_CMDLINE_TAG
Signed-off-by: Anastasiia Lukianenko <anastasiia_lukianenko@epam.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-24 14:11:31 -04:00
Anastasiia Lukianenko
32eac63af3 board: xen: Remove CONFIG_CMD_RUN define and clean xenguest_arm64_defconfig
CONFIG_CMD_RUN is set on by default in Kconfig.
Create xenguest_arm64_defconfig by using savedefconfig to avoid unnecessary
options.

Signed-off-by: Anastasiia Lukianenko <anastasiia_lukianenko@epam.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-24 14:11:31 -04:00
Anastasiia Lukianenko
607274f7f6 MAINTAINERS: Add maintainers to XEN section
Signed-off-by: Anastasiia Lukianenko <anastasiia_lukianenko@epam.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-24 14:11:31 -04:00
Anastasiia Lukianenko
4da1365d5c board: xen: Remove unnecessary CONFIG_BOARD_EARLY_INIT_F define and board_early_init_f function
Signed-off-by: Anastasiia Lukianenko <anastasiia_lukianenko@epam.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2020-08-24 14:11:31 -04:00
Frank Wunderlich
35051db978 arm: dts: mt7623: add USB nodes
This adds USB nodes for MT7623/BPI-R2

Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Reviewed-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
2020-08-24 14:11:31 -04:00
Frank Wunderlich
a13666b205 arm: dts: mt7622: add USB nodes
Add DTS nodes for MT7622/BPI-R64

Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Reviewed-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
2020-08-24 14:11:31 -04:00
Frank Wunderlich
28e1b1df3b arm: dts: rename mt7622-bpi-r64.dts
rename mt7622-bpi-r64.dts to mt7622-bananapi-bpi-r64.dts
to follow naming convensions

Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
2020-08-24 14:11:31 -04:00
Frank Wunderlich
9f25aa13ea clk: mt7622: add needed clocks for ssusb-node
MT7622 needs additional clock definitions to work properly

Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
2020-08-24 14:11:31 -04:00
Frank Wunderlich
a7e0ef15dd ahci: mediatek: fix copyright and author-lines
after review of sam copyright should be on one line and link should
not between author lines

just remove the link and put ryder first as he is author of linux-driver

Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
2020-08-24 14:11:31 -04:00
Frank Wunderlich
a300d696ca reset: drop unnecessary comment for pciesys
after review from sam this comment should be removed

Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
2020-08-24 14:11:31 -04:00
Frank Wunderlich
626892a779 phy: mtk-tphy: make shared reg optional for v1
make the shared reg optional when version is v1 for sata

Suggested-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Reviewed-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
2020-08-24 14:11:31 -04:00
Joao Marcos Costa
c9875a5fe8 fs/squashfs: Fix Coverity Scan defects
Fix defects such as uninitialized variables and untrusted pointer
operations. Most part of the tainted variables and the related defects
actually comes from Linux's macro get_unaligned_le**, extensively used
in SquashFS code. Add sanity checks for those variables.

Signed-off-by: Joao Marcos Costa <joaomarcos.costa@bootlin.com>
2020-08-24 14:11:31 -04:00
AKASHI Takahiro
6b0ddd1fbc virtio_blk: set log2blksz correctly
'log2blksz' in blk_desc structure must always be initialized, otherwise
it will cause a lot of weird failures in file operations.

For example, fs_set_blk_dev[_with_part]() examines a block device against
every file system with its probe function. In particular, ext4 file
system's ext4_probe() will calls fs_devread() to fetch a super block.
If log2blksz is 0, the actual 'read' size, i.e. block_len >> log2blksz, is
much bigger than a buffer's size, and it can end up with memory corruption.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Fixes: f4802209e5 ("virtio: Add block driver support")
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-08-24 14:11:31 -04:00
Joao Marcos Costa
91f6c1ca2e test/py: Add tests for LZO and ZSTD
Improve SquashFS tests architecture. Add 'Compression' class. LZO
algorithm may crash if the file is fragmented, so the fragments are
disabled when testing LZO.

Signed-off-by: Joao Marcos Costa <joaomarcos.costa@bootlin.com>
2020-08-24 14:11:31 -04:00
Joao Marcos Costa
6dfed163bd fs/squashfs: add support for LZO decompression
Add call to lzo's lzo1x_decompress_safe() into sqfs_decompress().

U-Boot's LZO sources may still have some unsolved issues that could make the
decompression crash when dealing with fragmented files, so those should be
avoided. The "-no-fragments" option can be passed to mksquashfs.

Signed-off-by: Joao Marcos Costa <joaomarcos.costa@bootlin.com>
2020-08-24 14:11:31 -04:00
Joao Marcos Costa
9c948f536f fs/squashfs: add support for ZSTD decompression
Add call to ZSTD's ZSTD_decompressDCtx(). In this use case, the caller
can upper bound the decompressed size, which will be the SquashFS data
block (or metadata block) size, so there is no need to use streaming
API. Add ZSTD's worskpace to squashfs_ctxt structure.

Signed-off-by: Joao Marcos Costa <joaomarcos.costa@bootlin.com>
2020-08-24 14:11:31 -04:00
Joao Marcos Costa
cdc114415c fs/squashfs: replace sqfs_decompress() parameter
Replace 'u16 comp_type' by a reference to squashfs_ctxt structure.

Signed-off-by: Joao Marcos Costa <joaomarcos.costa@bootlin.com>
2020-08-24 14:11:31 -04:00
Joao Marcos Costa
10f7cf5f12 fs/squashfs: Add init and clean-up functions to decompression
Add sqfs_decompressor_init() and sqfs_decompressor_cleanup(). These
functions are called respectively in sqfs_probe() and sqfs_close(). For
now, only ZSTD requires an initialization logic. ZSTD support will be
added in a follow-up commit.

Move squashfs_ctxt definition to sqfs_filesystem.h. This structure is
passed to sqfs_decompressor_init() and sqfs_decompressor_cleanup(), so
it can no longer be local to sqfs.c.

Signed-off-by: Joao Marcos Costa <joaomarcos.costa@bootlin.com>
2020-08-24 14:11:31 -04:00
John Chau
4a1f0b80ad cmd: fix clone coverity scan
This patch fixes coverity scan MISSING_BREAK issues, and also an error
on block size check.

Signed-off-by: John Chau <john@harmon.hk>
2020-08-24 14:11:31 -04:00
Michal Simek
10e4d64e34 firmware: psci: Do not bind driver if U-Boot runs in EL3
There is no reason to bind psci driver if U-Boot runs in EL3 because
SMC/HVC instructions can't be called. That's why detect this state and
don't let user to crash from prompt by performing reset or poweroff
commands (if enabled).

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-08-24 14:11:31 -04:00
Usama Arif
565add124d board: armltd: Add support for Total Compute platform
Total Compute is based on ARM architecture and has
the following features enabled in u-boot:
- PL011 UART
- PL180 MMC
- NOR Flash
- FIT image with Signature
- AVB

Signed-off-by: Usama Arif <usama.arif@arm.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2020-08-24 14:11:31 -04:00
Usama Arif
e61b41517d avb: Make AVB independent of fastboot
AVB only uses CONFIG_FASTBOOT_BUF_ADDR from fastboot for memory.
This memory is used for assigning temporary buffers.
This can be assigned a new variable and used as CONFIG_AVB_BUF_ADDR.
This is to support future boards that support AVB but dont support
USB and therefore dont support FASTBOOT.

Signed-off-by: Usama Arif <usama.arif@arm.com>
Cc: Igor Opaniuk <igor.opaniuk@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Igor Opaniuk <igor.opaniuk@gmail.com>
[trini: Change defaults]
Signed-off-by: Tom Rini <trini@konsulko.com>
2020-08-24 14:11:13 -04:00
Heinrich Schuchardt
2b3fbcb59f efi_loader: use ':' as separator for setenv -i
setenv -e -i <address>,<filesize> can be used to set a UEFI variable
from memory.

For separating an address and a size we use ':' in most commands.
Let's do the same for setenv -e -i.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-08-24 16:37:53 +02:00
Heinrich Schuchardt
15d8f008dc efi_loader: validate device path length in boot manager
Bootxxxx variables are provided by the user and therefore cannot be
trusted. We have to validate them before usage.

A device path provided by a Bootxxxx variable must have an end node within
the indicated device path length.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-08-24 16:37:53 +02:00
Heinrich Schuchardt
5bba77e48b test: unit test for efi_dp_check_length()
Provide a unit test for function efi_dp_check_length().

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-08-24 16:37:53 +02:00
Heinrich Schuchardt
5cad4a3093 efi_loader: efi_dp_check_length()
We need to check that device paths provided via UEFI variables are not
malformed.

Provide function efi_dp_check_length() to check if a device path has an
end node within a given number of bytes.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-08-24 16:37:53 +02:00
Heinrich Schuchardt
ed0b10722c include: kernel.h: define SSIZE_MAX
Define SSIZE_MAX, the largest value fitting into a variable of type
ssize_t.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-08-24 16:37:53 +02:00
Heinrich Schuchardt
fa63753f86 efi_selftest: substitute ResetSystem() by do_reset()
If ResetSystem() is not implemented at runtime, call do_reset() after
test completion.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-08-24 16:37:53 +02:00
Heinrich Schuchardt
c06867d7f8 efi_selftest: add a test for ResetSystem()
The unit test will reset the system by calling the ResetSystem() runtime
service before or after ExitBootServices() according to the users choice
by setting environment variable efi_selftest to:

* 'reset system' or
* 'reset system runtime'.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-08-24 16:37:53 +02:00
Heinrich Schuchardt
f03a879d67 efi_loader: ResetSystem() should not hang
If ResetSystem() is not implemented at runtime, it should return instead
of hanging in an endless loop. This allows the operating system to reset
the system by other means as Linux does. It also matches what EDK II
suggests in comments for functions ResetShutdown() and ResetWarm() in
OvmfPkg/Library/ResetSystemLib/ResetSystemLib.c.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-08-24 16:37:53 +02:00
Heinrich Schuchardt
ebcbfc7d6d doc: update UEFI documentation
* UEFI variables can be persisted
* describe that the sequence of files loaded before bootefi matters

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-08-24 16:37:53 +02:00
Heinrich Schuchardt
dd12c6a446 efi_loader: remove empty comment line
Remove a line leading to a warning in make htmldocs.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-08-24 16:37:53 +02:00
Heinrich Schuchardt
72e1fcacff efi_loader: document parameters of do_bootefi_exec()
Add the missing description of the load_options parameter.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-08-24 16:37:53 +02:00
Tom Rini
1aa3966173 Merge tag 'u-boot-clk-24Aug2020' of https://gitlab.denx.de/u-boot/custodians/u-boot-clk
- Add CCF clocks definitions for iMX6Q enet (ETH)
- Several fixes for CCF framework - the most notable is the one, which
  adds get_rate helper to clk-mux.c
- Improvements for clk command - better visibility and alignment.
2020-08-24 09:06:02 -04:00
Lukasz Majewski
ebd3f1f0d0 clk: ccf: Add missing #include <dm/uclass.h> to clk-mux.c
After adding custom get_rate helper function it was necessary to include
<dm/uclass.h> to avoid warnings about missing uclass_get_device_by_name.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Series-to: u-boot
2020-08-24 11:36:34 +02:00
Patrick Delaunay
689ca8c5d1 cmd: clk: correctly handle depth for clk dump
Update depth only when clock uclass is found to have correct display
of command "clk dump".

Without this patch, the displayed depth is the binding depth for
all the uclass and that can be strange as only clock uclass nodes
are displayed.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-24 11:03:26 +02:00
Patrick Delaunay
cc6328412c cmd: clk: cosmetic: correct code alignment in show_clks
Correct code alignment in show_clks() function.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-24 11:03:26 +02:00
Dario Binacchi
12d152620d clk: ccf: mux: change the get_rate helper
The previous version of the get_rate helper does not work if the mux
clock parent is changed after the probe. This error has not been
detected because this condition has not been tested. The error occurs
because the set_parent helper does not change the parent of the clock
device but only the clock selection register. Since changing the parent
of a probed device can be tricky, the new version of the get_rate helper
provides the rate of the selected clock and not that of the parent.

Signed-off-by: Dario Binacchi <dariobin@libero.it>
2020-08-24 11:03:26 +02:00
Dario Binacchi
e3b5d74c77 clk: ccf: mux: fix access to the sandbox register
The tests developed for the mux clock are run on the sandbox. They don't
call the clk_mux_set_parent routine and therefore they do not detect
this error.

Signed-off-by: Dario Binacchi <dariobin@libero.it>
2020-08-24 11:03:26 +02:00
Dario Binacchi
40559d2774 clk: ccf: mux: fix typo
Close the opening bracket.

Signed-off-by: Dario Binacchi <dariobin@libero.it>
2020-08-24 11:03:26 +02:00
Dario Binacchi
76eaa2d0ed clk: ccf: mux: change include order
Apply u-boot coding style on include files order.

Signed-off-by: Dario Binacchi <dariobin@libero.it>
2020-08-24 11:03:26 +02:00
Dario Binacchi
7b0830d41f clk: fix the console output of clk_register
The parent->name variable can be used only in case the
uclass_get_device_by_name routine returns successfully.

Signed-off-by: Dario Binacchi <dariobin@libero.it>
2020-08-24 11:03:26 +02:00
Dario Binacchi
16bdc85b48 clk: set flags in the ccf registration routines
The top-level framework flags are passed as parameter to the common
clock framework (ccf) registration routines without being used.
Checks of the flags setting added by the patch have been added in the
ccf test.

Signed-off-by: Dario Binacchi <dariobin@libero.it>
2020-08-24 11:03:26 +02:00
Dario Binacchi
cd16c57bd0 dm: test: clk: add the test for the ccf gated clock
Unlike the other clock types, in the case of the gated clock, a new
driver has been developed which does not use the registering routine
provided by the common clock framework.
The addition of the ecspi0 clock to sandbox therefore allows testing
the ccf gate clock.

Signed-off-by: Dario Binacchi <dariobin@libero.it>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-24 11:03:26 +02:00
Lukasz Majewski
32f462ba3b clk: imx6: Add definition for IMX6QDL_CLK_ENET_REF clock
After commit 673f659732 ("net: fec_mxc: support i.MX8M with CLK_CCF") all
NXP boards, which are not IMX8 and in the same time are supporting CCF need
to provide PTP clock.

On the i.MX6Q this clock is provided with IMX6QDL_CLK_ENET_REF in the Linux
kernel's CCF.

Code in this change models the simplest case when enet reference clock is
generated from 'osc' clock.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2020-08-24 11:03:26 +02:00
Lukasz Majewski
8d540ccb11 clk: imx: Add support for pllv3 enet clock
This code has been ported from Linux kernel v5.5.5 (tag) and has been
adjusted to U-Boot's DM.

It adds support for correct recognition of IMX_PLLV3_ENET flag in the
clk-pllv3.c driver.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2020-08-24 11:03:26 +02:00
Lukasz Majewski
d71fac8479 clk: imx6: Add definition for IMX6QDL_CLK_ENET clock
After commit 673f659732 ("net: fec_mxc: support i.MX8M with CLK_CCF") all
NXP boards, which are not IMX8 and in the same time are supporting CCF
need to provide IMX6QDL_CLK_ENET.

This change defines the missing clock in i.MX6Q's CCF.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2020-08-24 11:03:26 +02:00
Heinrich Schuchardt
6befc1f900 clk: ICS8N3QV01 remove superfluous code
Do not calculate a unused value of n which is overwritten in both branches
of the subsequent if statement.

Identified by cppcheck.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
2020-08-24 11:03:26 +02:00
Tom Rini
d584648dad Merge tag 'dm-pull-22aug20' of https://gitlab.denx.de/u-boot/custodians/u-boot-dm
replace devfdt_get_addr_ptr() with dev_read_addr_ptr()
binman fixes for portage
various minor fixes
'bind' command improvements
2020-08-23 16:06:38 -04:00
Tom Rini
c84341f5ac Merge branch '2020-08-21-stdio-cleanup'
- Clean up common/stdio.c and migrate some related options to Kconfig
2020-08-23 15:53:10 -04:00
Simon Glass
4225f2f520 stdio: Tidy up the coding style
Bring the coding style in this file up to the current level.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-08-23 13:43:10 -04:00
Simon Glass
18c587d099 stdio: Drop brackets around &devs.list
These brackets are not needed. Drop them.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-08-23 13:43:10 -04:00
Simon Glass
5d4b6b1748 stdio: Update to use compiler for Kconfig checks
Drop use of the preprocessor where possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-08-23 13:43:10 -04:00
Simon Glass
3bcd0ced15 stdio: Drop #ifdefs in the header file
These prevent the use of IS_ENABLED() and are unnecessary. Drop them and
fix a few code-style nits nearby.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-08-23 13:43:10 -04:00
Simon Glass
3ca0609adc stdio: Tidy up use of CONFIG_SYS_DEVICE_NULLDEV
Now that this is in Kconfig we can move the logic at the top of the file
to Kconfig, and use if() instead of #if. Update the file with these
changes.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-08-23 13:43:10 -04:00
Simon Glass
7e15638d60 Convert CONFIG_SYS_DEVICE_NULLDEV to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_DEVICE_NULLDEV

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-08-23 13:43:10 -04:00
Simon Glass
35bd70c510 Convert CONFIG_SPLASH_SCREEN et al to Kconfig
This converts the following to Kconfig:
   CONFIG_SPLASH_SCREEN
   CONFIG_SPLASH_SCREEN_ALIGN
   CONFIG_SPLASHIMAGE_GUARD
   CONFIG_SPLASH_SOURCE

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-08-23 13:43:10 -04:00
Simon Glass
a38cc1726b moveconfig: Skip binary and ELF files
Add a few more file extensions to the list of files that should not be
processed. This avoids unicode errors, for example.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-08-23 13:43:10 -04:00
Tom Rini
a7fc1e12ad Convert CONFIG_NETCONSOLE to Kconfig
This converts the following to Kconfig:
   CONFIG_NETCONSOLE

Signed-off-by: Tom Rini <trini@konsulko.com>
2020-08-23 13:06:36 -04:00
Ovidiu Panait
a402035028 sandbox: u-boot.lds: Remove bogus __bss_start symbol
The sections described in the sandbox linker script are inserted before
data section via "INSERT BEFORE .data;". Running readelf -S on sandbox
u-boot binary shows that the bss section is located after the data
section:

  Section Headers:
  [Nr] Name              Type             Address           Offset
       Size              EntSize          Flags  Link  Info  Align
  ...
  [25] .u_boot_list      PROGBITS         000000000041d1c8  0021d1c8
       000000000000dd90  0000000000000000  WA       0     0     8
  [26] _u_boot_sandbox_g PROGBITS         000000000042af58  0022af58
       00000000000000a0  0000000000000000  WA       0     0     8
  [27] .data             PROGBITS         000000000042b000  0022b000
       000000000000f708  0000000000000000  WA       0     0     32
  [28] .bss              NOBITS           000000000043a720  0023a708
       0000000000018930  0000000000000000  WA       0     0     32

This means that the __bss_start assignment in the linker script is bogus,
as the actual bss section start is located elsewhere. Remove this
assignment, as the __bss_start symbol is not used on sandbox anyway.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
2020-08-22 08:54:51 -06:00
Ovidiu Panait
78237828a3 board_f: Remove dead code from init_func_i2c
Since commit 69153988a6 ("i2c: Finish dropping use of CONFIG_I2C_HARD")
init_func_i2c is wrapped only by "#if defined(CONFIG_SYS_I2C)". Because
of this, the second ifdef within becomes pointless:

 #if defined(CONFIG_SYS_I2C)
 static int init_func_i2c(void)
 <snip>
     #ifdef CONFIG_SYS_I2C
         ...
     #else
         ...
     #endif
 <snip>
 }
 #endif

Remove the dead #else preprocessor code.

Fixes: 69153988a6 ("i2c: Finish dropping use of CONFIG_I2C_HARD")
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
2020-08-22 08:54:51 -06:00
Simon Glass
02c102074d binman: Add a setup script for Python
Allow binman to be installed by adding a suitable setup.py script.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-08-22 08:53:38 -06:00
Simon Glass
946ec85037 dtoc: Add a setup script for Python
Allow dtoc to be installed by adding a suitable setup.py script.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-08-22 08:53:38 -06:00
Simon Glass
07237988dc binman: Correct some import statements
Some of these were not converted when binman moved to use absolute paths.
Fix them.

Also drop the import of 'test' which is a directory, not a module.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-08-22 08:53:38 -06:00
Simon Glass
87d43329ef binman: Move GetEntryModules() to control
When binman is installed its main program is in a different directory
to its modules. This means that __file__ is different and we cannot use
it to obtain the path to etype/ from main.py

To fix this, move the function to the 'control' module, since it is
installed with all the other modules, including the etype/ directory.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-08-22 08:53:38 -06:00
Masahiro Yamada
702e57e113 treewide: convert devfdt_get_addr_ptr() to dev_read_addr_ptr()
When you enable CONFIG_OF_LIVE, you will end up with a lot of
conversions.

To help this tedious work, this commit converts devfdt_get_addr_ptr()
to dev_read_addr_ptr() by coccinelle. I also removed redundant casts
because dev_read_addr_ptr() returns an opaque pointer.

To generate this commit, I ran the following semantic patch
excluding include/dm/.

  <smpl>
  @@
  type T;
  expression dev;
  @@
  -(T *)devfdt_get_addr_ptr(dev)
  +dev_read_addr_ptr(dev)
  @@
  expression dev;
  @@
  -devfdt_get_addr_ptr(dev)
  +dev_read_addr_ptr(dev)
  </smpl>

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-22 08:53:37 -06:00
Masahiro Yamada
1450bff3e4 ata: mvebu: use dev_read_addr() to get base address
It is strange to use devfdt_get_addr_ptr(), then cast the pointer
back to ulong because you could use devfdt_get_addr() without casting.

Convert it to dev_read_addr(), which is capable to CONFIG_OF_LIVE.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-08-22 08:51:44 -06:00
Masahiro Yamada
0cbf3e08fc gpio: at91: use dev_read_addr() to get base address
It is strange to use devfdt_get_addr_ptr(), then cast the pointer
back to uint32 because you could use devfdt_get_addr() without casting.

Convert it to dev_read_addr(), which is capable to CONFIG_OF_LIVE.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-22 08:51:44 -06:00
Ovidiu Panait
6e64830f0b test: dm: Add test case for devfdt_get_addr_ptr
Add flat tree test case to cover devfdt_get_addr_ptr function.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-22 08:51:43 -06:00
Ovidiu Panait
3fe69d3764 dm: core: Fix devfdt_get_addr_ptr return value
According to the description of devfdt_get_addr_ptr, this function should
return NULL on failure, but currently it returns (void *)FDT_ADDR_T_NONE.

Fix this by making devfdt_get_addr_ptr return NULL on failure, as
described in the function comments. Also, update the drivers currently
checking (void *)FDT_ADDR_T_NONE to check for NULL.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-22 07:59:14 -06:00
Patrice Chotard
02291d83fd doc: add bind/unbind command documentation
Add documentation in doc/drivel-model for the bind/unbind command.
Part of this documentation is extracted from original patch commit
message:
commit 49c752c93a ("cmd: Add bind/unbind commands to bind a device to a driver from the command line")

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-22 07:58:39 -06:00
Patrice Chotard
e37d4c4fd2 test/py: Update test_bind
As bind-test is now binded at sandbox startup and no more by
test_bind.py, bind-test nodes are not located at the end of
"dm tree" output, but can be located everywhere in the tree, so
bind-test output could either be:

 simple_bus    0  [   ]   generic_simple_bus    |-- bind-test
 phy           0  [   ]   phy_sandbox           |   |-- bind-test-child1
 simple_bus    1  [   ]   generic_simple_bus    |   `-- bind-test-child2

or:

 simple_bus    5  [   ]   generic_simple_bus    `-- bind-test
 phy           2  [   ]   phy_sandbox               |-- bind-test-child1
 simple_bus    6  [   ]   generic_simple_bus        `-- bind-test-child2

in_tree() function need to be updated to take care of that change.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-22 07:58:39 -06:00
Patrice Chotard
1f0d5885db sandbox: dts: Add compatible string for bind-test node
Usage of lists_bind_fdt() in bind command imposes to add
a compatible string for bind-test node.

Others impacts are:
  - bind-test node is binded at sandbox start, so no need to bind it
    in test_bind_unbind_with_node() test.
  - As explained just above, after sandbox start, now a phy exist.
    In test/dm/phy.c, it was verified that a third phy didn't exist,
    now we must verified that a fourth phy doesn't exist.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-22 07:58:39 -06:00
Patrice Chotard
cfa3ed4390 sandbox: phy: add driver_data for bind test cmd
Add driver data to existing compatible string "sandbox,phy".
Add an additional compatible string without driver_data

This will verify that bind command parses, finds and passes the
correct driver data to device_bind_with_driver_data() by using
driver_data in the second sandbox_phy_ids table entry.
In sandbox_phy_bind() a check is added to validate driver_data
content.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-22 07:58:39 -06:00
Patrice Chotard
84f8e36f03 cmd: bind: allow to bind driver with driver data
Initial implementation invokes device_bind_with_driver_data()
with driver_data parameter equal to 0.
For driver with driver data, the bind command can't bind
correctly this driver or even worse causes data abort as shown below:

As example, for debug purpose on STM32MP1 platform, ethernet
(dwc_eth_qos.c) driver needed to be unbinded/binded.
This driver is using driver data:

static const struct udevice_id eqos_ids[] = {
    {
        .compatible = "nvidia,tegra186-eqos",
        .data = (ulong)&eqos_tegra186_config
    },
    {
        .compatible = "snps,dwmac-4.20a",
        .data = (ulong)&eqos_stm32_config
    },

    { }
};

After unbinding/binding this driver and probing it (with the dhcp command),
we got a prefetch abort as below:

STM32MP> unbind eth ethernet@5800a000
STM32MP> bind /soc/ethernet@5800a000 eth_eqos
STM32MP> dhcp
prefetch abort
pc : [<4310801c>]          lr : [<ffc8f4ad>]
reloc pc : [<035ba01c>]    lr : [<c01414ad>]
sp : fdaf19b0  ip : ffcea83c     fp : 00000001
r10: ffcfd4a0  r9 : fdaffed0     r8 : 00000000
r7 : ffcff304  r6 : fdc63220     r5 : 00000000  r4 : fdc5b108
r3 : 43108020  r2 : 00003d39     r1 : ffcea544  r0 : fdc63220
Flags: nZCv  IRQs off  FIQs off  Mode SVC_32
Code: data abort
pc : [<ffc4f9c0>]          lr : [<ffc4f9ad>]
reloc pc : [<c01019c0>]    lr : [<c01019ad>]
sp : fdaf18b8  ip : 00000000     fp : 00000001
r10: ffcd69b2  r9 : fdaffed0     r8 : ffcd69aa
r7 : 00000000  r6 : 00000008     r5 : 4310801c  r4 : fffffffc
r3 : 00000001  r2 : 00000028     r1 : 00000000  r0 : 00000006
Flags: NzCv  IRQs on  FIQs on  Mode SVC_32 (T)
Code: 2f00 d1e9 2c00 dce9 (f855) 2024
Resetting CPU ...

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Cc: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-22 07:58:39 -06:00
Heinrich Schuchardt
ae6b33dcc3 dm: fix ofnode_read_addr/size_cells()
In the case of the live tree ofnode_read_addr_cells() and
ofnode_read_size_cells() return the #address-cells and #size-cells defined
in the parent node. With the patch the same is done for a non-live tree.

The only consumer of these functions is currently the CFI flash driver.

This patch fixes the incorrect parsing of the device tree leading to
'saveenv' failing on qemu_arm64_defconfig.

For testing qemu-system-aarch64 has to be called with

    -drive if=pflash,format=raw,index=1,file=envstore.img

to provide the flash memory. envstore.img must be 64 MiB large.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-08-22 07:58:39 -06:00
Kever Yang
b5b81f2490 rockchip: firefly-rk3288: Fix the code support for SPL_LED
Fix the build error for the wrong code when CONFIG_SPL_LED is enabled.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2020-08-21 19:56:19 +08:00
Kever Yang
e2f8ba8a5f rockchip: rk3188: Fix the code support for SPL_LED
Fix the build error for the wrong code when CONFIG_SPL_LED is enabled.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2020-08-21 19:56:19 +08:00
Kever Yang
5c5435093a rockchip: config: evb-rk3399: Add rockchip dwmmc support
This enable support for SD card on evb-rk3399.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2020-08-21 19:56:19 +08:00
Kever Yang
d6092e3229 rockchip: dts: rk3399-evb: add sdmmc node
The sdmmc node is missing after the dts sync patch:
  167efc2c7a arm64: dts: rk3399: Sync v5.7-rc1 from Linux
But we still need it for boot from SD card, so add it.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2020-08-21 19:56:19 +08:00
Tom Rini
2e6132d835 Merge tag 'xilinx-for-v2020.10-rc3' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze
Xilinx changes for v2020.10-rc3

- Fix fdtfile variable setup
- Fix bootm_*/fdt_high/initrd_high variables handling
- Fix Kconfig dependencies for Xilinx drivers
- Fix booting u-boot from lowest memory
- Fix firmware payload argument count for Versal
- Fix dfu configurations
- Fix mio_bank property handling
- Fix and align code around ID detection
- Start to use ENV_VARS_UBOOT_RUNTIME_CONFIG
- Simplify logic around reading MAC from eeprom
- Decrease malloc length for zynqmp mini qspi
- Enable preboot for ZynqMP and Versal

i2c:
- Fix i2c eeprom partitions handling

mmc:
- Fix logic around HS mode enabling and use proper functions
2020-08-20 14:46:43 -04:00
Tom Rini
2a4484a5c5 Merge branch '2020-08-19-mediatek-updates'
- Assorted updates for MediaTek platforms
2020-08-20 08:38:10 -04:00
Michal Simek
29af2ac48c clk: versal: Move pm_query_id out of clock driver
There is no reason to have firmware specific structure in clock driver.
Move it to generic location and also initialize enum values which is based
on https://lore.kernel.org/linux-arm-kernel/20200318125003.GA2727094@kroah.com/
recommended way to go to make sure that values guaranteed by compiler.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-08-20 10:57:46 +02:00
Michal Simek
b5a3387dc1 mmc: sdhci: Use upper/lower_32_bits macros
Instead of recasting and shifting use macros which are designed for taking
upper/lower 32bit value from 64bit variable.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-08-20 09:58:59 +02:00
Faiz Abbas
620bb46ead mmc: sdhci: Enable high speed conditional on the corresponding bit
The capabilities register has a field to indicate whether the host
supports high speed mode or not. Add high speed host_caps based on
this bit instead of enabling it by default.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Reviewed-by: Michal Simek <michal.simek@xilnx.com>
Tested-by: Michal Simek <michal.simek@xilnx.com>
(zcu104 with sdhci-caps-mask = <0 0x200000>;)
2020-08-20 09:58:59 +02:00
Michal Simek
2570cc6430 xilinx: common: Change bootm_size variable setting
Linux kernel for arm32 requires dtb and initrd to be placed in low memory
to work properly. This requirement is described in chapter 4b) and 5) in
Linux documentation (Documentation/arm/booting.rst).

There is an issue on arm32 with 2GB of memory that bootm_size is bigger
than Linux lowmem (for example with VMSPLIT_3G). That's why limit bootm
size on these systems not to be above 768MB.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-08-20 09:58:16 +02:00
Michal Simek
ca0f616530 xilinx: common: Check return value from variable setup
env_set..() can failed that's why check return status and report it back to
make sure that user is aware that's something went wrong.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-08-20 09:58:16 +02:00
Michal Simek
653809f43f xilinx: common: Get rid of initrd_high variable setup
When bootm_low/bootm_size are setup properly there is no need to setup any
initrd_high address. Location for initrd is determined through LMB.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-08-20 09:58:16 +02:00
Michal Simek
0bfb43dfc1 xilinx: common: Get rid of fdt_high variable
There is no need to setup this variable if bootm_low and bootm_size
variable are properly setup. If fdt_high variable is missing U-Boot is
asking LMB to return free memory which is not used.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-08-20 09:58:16 +02:00
Michal Simek
9fea3b18d6 xilinx: Change logic around zynq_board_read_rom_ethaddr()
There is no reason to build private function when
CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET is not defined. There is already weak
function which handles default case properly.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-08-20 09:49:20 +02:00
Michal Simek
62b96262b6 xilinx: Add support for ENV_VARS_UBOOT_RUNTIME_CONFIG
Start to use ENV_VARS_UBOOT_RUNTIME_CONFIG to enable/disable updating
variables with run time information.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-08-20 09:49:20 +02:00
Michal Simek
d5c42ec31b xilinx: versal: Enable i2c misc eeprom driver
Enable this driver to be able to work with i2c based eeproms on Versal.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-08-20 09:49:20 +02:00
Ibai Erkiaga
de4f748ef5 xilinx: zynqmp: fix incorrect map not align with IPI HW
Current IPI module register description is not align with IPI HW. The
registers with the wrong offset are not used so it does not cause real
issues. This patch aligns the register description.

Additionally comments added to explain why recv function does not check
any flag prior copying rx data.

Fixes: 660b0c77d8 ("mailbox: zynqmp: ipi mailbox driver")
Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-08-20 09:49:20 +02:00
Ibai Erkiaga
050f10f103 xilinx: zynqmp: remove chip_id function
Remove chip_id function and integrate the firmware call in the
zynqmp_get_silicon_idcode_name function. The change avoids querying the
firmware twice and makes the code bit more clear.

Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-08-20 09:49:20 +02:00
Ibai Erkiaga
4b2ad7b111 xilinx: zynqmp: get chip ID at EL3
Modify the board init function to allow getting the chip ID when U-Boot
proper is executed at EL3.

Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-08-20 09:49:20 +02:00
Ibai Erkiaga
21c2fc7c6a xilinx: zynqmp: get chip ID using firmware driver
Current implementation for getting chip ID uses either raw access on EL3
or a SMC call to get the silicon information. Following change
simplifies the code using always the firmware driver.

Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-08-20 09:49:20 +02:00
Ibai Erkiaga
2eabb6bfea xilinx: zynqmp: merge firmware calls for EL2 and EL3
This patch merges ZynqMP firmware calls under xilinx_pm_request in order
to make trainsparent the EL. Calls at EL3 are send through IPI messages
and EL2 through SMC calls.

The EL2 call uses fixed payload and arg size as the EL3 call. The
firmware is capable to handle PMUFW_PAYLOAD_ARG_CNT bytes but the
firmware API is limited by the SMC call size.

Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-08-20 09:49:20 +02:00
Ibai Erkiaga
f6cccbb5f2 xilinx: zynqmp: synchronize firmware call return payload
Removes duplicated definition of PAYLOAD_ARG_CNT and define it in the
firmware driver. Additionally fixes payload buffer declarations without
macro usage

Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-08-20 09:49:20 +02:00
Michal Simek
e8deb22185 mmc: zynq: Fix default value for xlnx,mio-bank
DT binding is saying that default value is 0 not -1 that's why fix it.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
2020-08-20 09:49:20 +02:00
Michal Simek
01a6da1661 xilinx: Fix xlnx,mio_bank property
s/xlnx,mio_bank/xlnx,mio-bank/g

DT binding is describing mio-bank not mio_bank that's why fix all DTSes and
also driver itself.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
2020-08-20 09:49:20 +02:00
Michal Simek
f692b479f0 i2c: eeprom: Use reg property instead of offset and size
Remove adhoc dt binding for fixed-partition definition for i2c eeprom.
fixed-partition are using reg property instead of offset/size pair.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-20 09:49:20 +02:00
Michal Simek
2d06361a11 xilinx: zynqmp: Enable DFU tftp support
Enable DFU tftp support for firmware update. Fill dfu_ram_tftp variable to
have command present for showing how to use it.

boot FIT image has been created from below fragment. Key part is that type
of image has to be firmware. Also based on experiment load property is
completely ignored and base addresses are taken from dfu_alt_info variable.

$ cat update_uboot.its
/dts-v1/;

/ {
	description = "Automatic U-Boot update";
	#address-cells = <1>;

	images {
		Image {
			description = "Kernel";
			data = /incbin/("/tftpboot/Image");
			compression = "none";
			arch = "arm64";
			type = "firmware";
			os = "linux";
			load = <0x80000>;
			entry = <0x80000>;
			hash-1 {
				algo = "sha1";
			};
		};
		system.dtb {
			description = "DTB";
			data = /incbin/("/tftpboot/system.dtb");
			compression = "none";
			arch = "arm64";
			type = "firmware";
			load = <0>;
			hash-1 {
				algo = "sha1";
			};
		};
	};
};

$ mkimage -f update_uboot.its /tftpboot/boot

When U-Boot starts get IP address and server IP.
dhcp
setenv serverip 192.168.0.105

And then run prepared command.
run dfu_ram_tftp

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-08-20 09:49:20 +02:00
Michal Simek
9643000e14 xilinx: Align dfu ram with booti command
Image should be loaded to 0x80000 address and not to $kernel_addr_r.
Also kernel_addr, fdt_addr and fdt_size in zynqmp case are not defined
that's why define it to be aligned with Versal.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-08-20 09:49:20 +02:00
Ashok Reddy Soma
8d00d224c9 arm64: zynqmp: Reduce malloc memory for mini QSPI configuration
Mini U-boot runs on lower foot print of 256KB OCM. Hence 8K memory
for malloc may not be required. Reduce it by 1.5K.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-08-20 09:49:20 +02:00
Michal Simek
22b6bb6ccd xilinx: versal: Use lowest memory for U-Boot
Find and use the lowest memory for Versal to make sure that we keep u-boot
as low as possible and never use memory above u-boot's maximum VA mapping.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-08-20 09:49:20 +02:00
Michal Simek
c2f0950c33 lib: fdt: Convert fdtdes_setup_mem..() to livetree API
Convert fdtdec_setup_mem_size_base(), get_next_memory_node(),
fdtdec_setup_memory_banksize() and fdtdec_setup_mem_size_base_lowest() to
livetree API.

Tested on ZynqMP zcu104 board.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-20 09:49:20 +02:00
Michal Simek
7fce739665 lib: fdt: Introduce fdtdec_setup_mem_size_base_lowest()
New function should be called from board dram_init() because it initialized
gd->ram_base/ram_size. It finds the lowest available memory.

On systems with multiple memory nodes finding out the first memory node by
fdtdec_setup_mem_size_base() is not enough because this memory can be above
actual U-Boot VA mapping. Currently only mapping till 39bit is supported
(Full 44bit mapping was removed by commit 7985cdf74b ("arm64: Remove
non-full-va map code")).
If DT starts with the first memory node above 39bit address then system can
be unpredictable.

The function is available only when multiple memory bank support is
enabled.

Calling fdtdec_setup_memory_banksize() from dram_init() is not possible
because fdtdec_setup_memory_banksize() is saving dram information to bd
structure which is placed on stack but not initialized at this time. Also
stack is placed at location setup in dram_init().

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-20 09:49:20 +02:00
Ibai Erkiaga
11b1dcec09 versal: fix versal PM ret payload size
The PM return payload size is defined as 4 bytes for Versal arquitecture
while the PM calls implemented both in the Versal clock driver and
ZynqMP firmware driver expects 5 bytes length.

Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-08-20 09:49:20 +02:00
T Karthik Reddy
526a67eb35 xilinx: versal: Add new versal loadpdi command
Versal loadpdi command is used for loading secure & non-secure
pdi images.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-08-20 09:49:20 +02:00
Igor Lantsman
1b208d59ba arm64: zynqmp: Fix set_fdtfile() not to break u-boots DTB
Origin function was calling strsep which replaced delimiter ',' by a null
byte ('\0'). Operation was done directly on FDT which ends up with the
following behavior:

ZynqMP>  printenv fdtfile
fdtfile=xilinx/zynqmp.dtb
ZynqMP> fdt addr $fdtcontroladdr
ZynqMP> fdt print / compatible
compatible = "xlnx", "zynqmp"

As is visible fdtfile was correctly composed but a null byte caused that
xlnx was separated from zynqmp.
This hasn't been spotted because in all Xilinx DTs there are at least 3
compatible string and only the first one was affected by this issue.
But for systems which only had one compatible string "xlnx,zynqmp" it was
causing an issue when U-Boot's DT was used by Linux kernel.

The patch removes strsep calling and strchr is called instead which just
locate the first char after deliminator ',' (variable called "name").
And using this pointer in fdtfile composing.

Fixes: 91d7e0c47f ("arm64: zynqmp: Create fdtfile from compatible string")
Reported-by: Igor Lantsman <igor.lantsman@opsys-tech.com>
Signed-off-by: Igor Lantsman <igor.lantsman@opsys-tech.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-08-20 09:49:20 +02:00
Michal Simek
834de89842 xilinx: Enable preboot feature for ZynqMP and Versal
Enable preboot functionality for ZynqMP and Versal platforms.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-08-20 09:46:55 +02:00
Michal Simek
664e16ce99 xilinx: kconfig: Change Kconfig dependencies for Xilinx drivers
Zynq/ZynqMP/Versal IPs should be possible to called also from Microblaze in
PL and vice versa. That's why change dependencies and do not limit enabling
just for some platforms.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2020-08-20 09:46:55 +02:00
Michal Simek
c8da6513c0 xilinx: Setup bootm variables
On system with PL DDR which is placed before PS DDR in DT
env_get_bootm_size() and env_get_bootm_low() without specifying bootm_low
and bootm_size variables are taking by default gd->bd->bi_dram[0].start and
gd->bd->bi_dram[0].size. As you see 0 means bank 0 which doesn't need to be
PS ddr and even can be memory above 39bit VA which is what U-Boot supports
now.
That's why setup bootm variables based on ram_base/ram_size setting to make
sure that boot images are placed to the same location as U-Boot is placed.
This location should be by default location where OS can boot from.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-08-20 09:46:55 +02:00
Frank Wunderlich
7cf8537d5e dts: r64: add sata- and asm_sel nodes
asm_sel is for switching between sata and pcie mode
on r64 there is GPIO90 connected to ASM1480 which
switches RX/TX pairs to PCIe/SATA connector
output-low means sata-controller is active

with 2020-10 now reg is also needed for the phy itself

Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
2020-08-19 17:38:15 -04:00
Frank Wunderlich
38bff327d7 ahci: mediatek: add ahci driver
add AHCI driver ported from linux

https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/ata/ahci_mtk.c

Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
2020-08-19 17:38:15 -04:00
Frank Wunderlich
fee276ee31 reset: add basic reset controller for pciesys
bind reset controller to pciesys

Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
2020-08-19 17:38:15 -04:00
Frank Wunderlich
ffbcde248d phy: mtk-tphy: add PHY_TYPE_SATA
add support for PHY_TYPE_SATA to Mediateks TPHY driver

Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Reviewed-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
2020-08-19 17:38:15 -04:00
Frank Wunderlich
362e5e1e19 arm: dts: mt7622: add SATA reset constants
add reset constants used for SATA to header file

Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
2020-08-19 17:38:14 -04:00
Frank Wunderlich
f08c2c2d87 arm: dts: mt7622: add PCIe nodes for BananaPi-R64
this patch adds PCIe-Nodes for BananaPi R64

original nodes from Chuanjia Liu for mt7622-rfb

Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
2020-08-19 17:38:14 -04:00
Frank Wunderlich
8ad2fc413f dts: r64: add r64 dts
add a separate DTS for BananaPi R64 because it has 1GB RAM and SATA-Support

Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
2020-08-19 17:38:14 -04:00
Frank Wunderlich
35d0fdbf17 arm: dts: add watchdog-node for mt7622
adding a watchdog-node to mt7622 dtsi

Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
2020-08-19 17:37:37 -04:00
Chuanjia Liu
b5d4cbbf13 configs: mt7622: add PCIe controller related configs
Add PCIe command and related configs

Signed-off-by: Chuanjia Liu <Chuanjia.Liu@mediatek.com>
Signed-off-by: Henry Yen <henry.yen@mediatek.com>
2020-08-19 17:37:37 -04:00
Chuanjia Liu
bb9d3ad521 arm: dts: mediatek: add PCIe node for MT7622
This patch adds PCIe node in dts for Mediatek MT7622 Soc.

Signed-off-by: Chuanjia Liu <Chuanjia.Liu@mediatek.com>
Signed-off-by: Henry Yen <henry.yen@mediatek.com>
2020-08-19 17:37:37 -04:00
Chuanjia Liu
91ee45d806 PCI: mediatek: Add PCIe support for MT7622
This patch adds PCIe support for the Mediatek MT7622 SOC.

Signed-off-by: Chuanjia Liu <Chuanjia.Liu@mediatek.com>
Signed-off-by: Henry Yen <henry.yen@mediatek.com>
2020-08-19 17:37:37 -04:00
Chuanjia Liu
0cc587dd86 arm: dts: mediatek: add pciesys support for MT7622 SoC
This patch adds pciesys support in dts for MediaTek MT7622 SoC.

Signed-off-by: Henry Yen <henry.yen@mediatek.com>
Signed-off-by: Chuanjia Liu <Chuanjia.Liu@mediatek.com>
2020-08-19 17:37:37 -04:00
Chuanjia Liu
c5bfe694e7 clk: mediatek: add pciesys support for MT7622 SoC
This patch adds pciesys support in clock driver for
MediaTek MT7622 SoC.

Signed-off-by: Henry Yen <henry.yen@mediatek.com>
Signed-off-by: Chuanjia Liu <Chuanjia.Liu@mediatek.com>
2020-08-19 17:37:37 -04:00
Chunfeng Yun
324220da63 pinctrl: mediatek: mt8512: fix the wrong start address of ranges
The start address of dout, pullen and pullsel ragnes are wrong,
so fix up them.

Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
2020-08-19 17:37:37 -04:00
Tom Rini
ba989cf1ca Merge tag 'uniphier-v2020.10-2' of https://gitlab.denx.de/u-boot/custodians/u-boot-uniphier
UniPhier SoC updates for v2020.10 (2nd)

 - minor code cleanups

 - sync DT with Linux
2020-08-18 21:28:49 -04:00
Wig Cheng
4992090ed4 pico-imx6ul: convert ethernet function to DM_ETH
- Remove pinmux definition from pico-imx6ul.c
- Enable NET_RANDOM_ETHADDR for temporary solution, because micrel_ksz8xxx
driver does not support DM_ETH yet, so cannot read MAC address directly.

Before enable DM_ETH:
  Net:   FEC [PRIME]

After enable DM_ETH:
  Net:
  Warning: using random MAC address - ca:3f:43:8f:67:d4
  eth1: ethernet@20b4000

Here is the test commands:
  => dhcp
  BOOTP broadcast 1
  DHCP client bound to address 10.88.88.94 (139 ms)
  *** ERROR: `serverip' not set
  Cannot autoload with TFTPGET
  => ping 8.8.8.8
  Using ethernet@20b4000 device
  host 8.8.8.8 is alive

Signed-off-by: Wig Cheng <wig.cheng@technexion.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2020-08-18 10:10:25 +02:00
Wig Cheng
d9d77a5209 configs: pico-imx6ul: convert DM_VIDEO
It's due to the warning messages issue after compiled:

  ===================== WARNING ======================
  This board does not use CONFIG_DM_VIDEO Please update
  the board to use CONFIG_DM_VIDEO before the v2019.07 release.
  Failure to update by the deadline may result in board removal.
  See doc/driver-model/migration.rst for more info.
  ====================================================

Enable DM_VIDEO can fix it on the stage of compilation.

Signed-off-by: Wig Cheng <wig.cheng@technexion.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2020-08-18 10:10:25 +02:00
Wig Cheng
6e861c35e7 configs: pico-imx6ul: convert DM_USB
Here is the test commands:

  => ums 0 mmc 0
  UMS: LUN 0, dev 0, hwpart 0, sector 0x0, count 0x710000

Signed-off-by: Wig Cheng <wig.cheng@technexion.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2020-08-18 10:10:25 +02:00
Matthias Schiffer
0c2b03cace tools/imximage: fix DCD Blocks message output order
The correct order is load address, offset, length. The order was
accidentally switched a while ago; make it match the HAB Blocks output and
what CST expects again.

Fixes: e97bdfa5da ("tools/imximage: share DCD information via Kconfig")
Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com>
2020-08-18 10:10:25 +02:00
Masahiro Yamada
65282edbdf ARM: dts: uniphier: resync DT with Linux 5.9-rc1
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-08-18 02:01:14 +09:00
Masahiro Yamada
351b74cb6d ARM: uniphier: use FIELD_GET() to get access to revision register fields
Define register fields as macros, and use FIELD_GET().

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-08-18 02:01:14 +09:00
Masahiro Yamada
26f0c8600e serial: uniphier: fix typo in comment
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-08-18 02:01:14 +09:00
Masahiro Yamada
055e5ad287 ARM: uniphier: remove unneeded header inclusion from board_late_init.c
<nand.h> is unneeded since commit 9248a78f40 ("ARM: UniPhier: remove
Denali NAND controller fixup code").

<linux/io.h> is uneeded since commit 1320fa2e55 ("ARM: uniphier:
remove workaround for the NAND write protect").

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-08-18 02:01:14 +09:00
Masahiro Yamada
2dbb6beb00 ARM: uniphier: remove unused uniphier_pin_init()
This function is unused since commit 862274913f ("bus:
uniphier-system-bus: move hardware init from board files").

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-08-18 02:01:14 +09:00
Masahiro Yamada
184831f656 ARM: uniphier: rename include guard of include/configs/uniphier.h
Make the include guard match to the file name.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-08-18 02:01:14 +09:00
Marek Vasut
af50d92ae7 ARM: imx: ddr: Add deskew register programming
Fill is code for programming the DDR_PHY_CMD_DESKEW_CONx registers,
which are optional, but can be used to fill in the byte lane delays.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: NXP i.MX U-Boot Team <uboot-imx@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
2020-08-17 17:55:49 +02:00
Marek Vasut
4b44bea701 ARM: imx: Add support for reading out the primary/secondary bmode to MX7
Implement the 'getprisec' subcommand of 'bmode' command for i.MX7 by
reading out the SRC GPR10 bit 30. This bit is either set by the BootROM
if it switched to the secondary copy due to primary copy being corrupted
OR it can be overridden by the user.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: NXP i.MX U-Boot Team <uboot-imx@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Stefano Babic <sbabic@denx.de>
2020-08-17 17:55:31 +02:00
Marek Vasut
3c0fbbfd95 ARM: imx: Add support for reading out the primary/secondary bmode
Add new 'getprisec' subcommand to 'bmode' command, which sets the return
value of the 'bmode' command to either 0 if the system booted from primary
copy or to 1 if the system booted from secondary copy. This can be used
e.g. in 'test' command to determine which copy of the system is running.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: NXP i.MX U-Boot Team <uboot-imx@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Stefano Babic <sbabic@denx.de>
2020-08-17 17:55:17 +02:00
Marek Vasut
5ec83561c4 ARM: imx: Add support for switching primary/secondary boot mode to bmode
The i.MX6/i.MX7 is capable of booting a secondary "redundant" system
image in case the primary one is corrupted. The user can force this
boot mode as well by explicitly setting SRC GPR10 bit 30. This can be
potentially useful when upgrading the bootloader itself. Expose this
functionality to the user.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: NXP i.MX U-Boot Team <uboot-imx@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Stefano Babic <sbabic@denx.de>
2020-08-17 17:54:01 +02:00
Marek Vasut
c72372d38c ARM: imx: Add bmode support for iMX7
Add the basic differentiation between i.MX6 and i.MX7 into the bmode
command, the mechanism really works almost the same on both platforms.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: NXP i.MX U-Boot Team <uboot-imx@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
2020-08-17 17:53:55 +02:00
Tom Rini
789bfb5266 Merge tag 'efi-2020-10-rc3-2' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi
Pull request for UEFI sub-system for efi-2020-10-rc3 (2)

This series includes bug fixes for:

* UEFI secure boot - images with multiple signatures
* UEFI secure boot - support for intermediate certificates
* corrections for UEFI unit tests
* missing loadaddr on MAIX board
2020-08-15 09:01:01 -04:00
Tom Rini
c0192950df Merge branch '2020-08-14-assorted-updates'
- Xen guest and some paravirt driver support.
- Aspeed SoC updates
- Broadcom IPROC PCIe RC driver
2020-08-14 15:48:56 -04:00
Michal Simek
698383fe8e cmd: demo: Remove duplicated help message for list subcommand
There is no need to show demo list description twice when help demo is
performed. The patch removes duplicated entry.

Current state:
=> help demo
demo - Driver model (dm) demo operations

Usage:
demo list                     List available demo devices
demo hello <num> [<char>]     Say hello
demo light [<num>]            Set or get the lights
demo status <num>             Get demo device status
demo list                     List available demo devices

Fixes: a02af4aeec ("dm: demo: Add a simple GPIO demonstration")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-14 15:18:30 -04:00
Anastasiia Lukianenko
8071348de4 doc: xen: Add Xen guest ARM64 board documentation
Signed-off-by: Anastasiia Lukianenko <anastasiia_lukianenko@epam.com>
2020-08-14 15:18:30 -04:00
Oleksandr Andrushchenko
d17f6698b8 board: xen: De-initialize before jumping to Linux
Free resources used by Xen board before jumping to Linux kernel.

Signed-off-by: Oleksandr Andrushchenko <oleksandr_andrushchenko@epam.com>
Signed-off-by: Anastasiia Lukianenko <anastasiia_lukianenko@epam.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-14 15:18:30 -04:00
Anastasiia Lukianenko
53d725c74e xen: pvblock: Print found devices indices
Signed-off-by: Oleksandr Andrushchenko <oleksandr_andrushchenko@epam.com>
Signed-off-by: Anastasiia Lukianenko <anastasiia_lukianenko@epam.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-14 15:18:30 -04:00
Anastasiia Lukianenko
3a739cc6c9 xen: pvblock: Implement front-back protocol and do IO
Implement Xen para-virtual frontend to backend communication
and actually read/write disk data.

This is based on mini-os implementation of the para-virtual block
frontend driver.

Signed-off-by: Oleksandr Andrushchenko <oleksandr_andrushchenko@epam.com>
Signed-off-by: Anastasiia Lukianenko <anastasiia_lukianenko@epam.com>
2020-08-14 15:18:30 -04:00
Anastasiia Lukianenko
17c96f8851 xen: pvblock: Read XenStore configuration and initialize
Read essential virtual block device configuration data from XenStore,
initialize front ring and event channel.
Update block device description with actual block size.

Use code for XenStore from mini-os.

Signed-off-by: Oleksandr Andrushchenko <oleksandr_andrushchenko@epam.com>
Signed-off-by: Anastasiia Lukianenko <anastasiia_lukianenko@epam.com>
2020-08-14 15:18:30 -04:00
Anastasiia Lukianenko
a99931319e xen: pvblock: Enumerate virtual block devices
Enumerate Xen virtual block devices found in XenStore and
instantiate pvblock devices.

Signed-off-by: Oleksandr Andrushchenko <oleksandr_andrushchenko@epam.com>
Signed-off-by: Anastasiia Lukianenko <anastasiia_lukianenko@epam.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-14 15:18:30 -04:00
Anastasiia Lukianenko
722bc5b5d9 xen: pvblock: Add initial support for para-virtualized block driver
Add initial infrastructure for Xen para-virtualized block device.
This includes compile-time configuration and the skeleton for
the future driver implementation.
Add new class UCLASS_PVBLOCK which is going to be a parent for
virtual block devices.
Add new interface type IF_TYPE_PVBLOCK.

Implement basic driver setup by reading XenStore configuration.

Signed-off-by: Andrii Anisov <andrii_anisov@epam.com>
Signed-off-by: Anastasiia Lukianenko <anastasiia_lukianenko@epam.com>
Signed-off-by: Oleksandr Andrushchenko <oleksandr_andrushchenko@epam.com>
2020-08-14 15:18:30 -04:00
Oleksandr Andrushchenko
c850674ff7 xen: Port Xen grant table driver from mini-os
Make required updates to run on u-boot.

Signed-off-by: Oleksandr Andrushchenko <oleksandr_andrushchenko@epam.com>
Signed-off-by: Anastasiia Lukianenko <anastasiia_lukianenko@epam.com>
2020-08-14 15:18:30 -04:00
Oleksandr Andrushchenko
60e49ff1f8 xen: Port Xen bus driver from mini-os
Make required updates to run on u-boot and strip test code.

Signed-off-by: Anastasiia Lukianenko <anastasiia_lukianenko@epam.com>
Signed-off-by: Oleksandr Andrushchenko <oleksandr_andrushchenko@epam.com>
2020-08-14 15:18:30 -04:00
Andrii Anisov
e87dfb0526 lib: sscanf: add sscanf implementation
Port sscanf implementation from mini-os and introduce new
Kconfig option to enable it: CONFIG_SSCANF. Disable by default.

Signed-off-by: Andrii Anisov <andrii_anisov@epam.com>
Signed-off-by: Anastasiia Lukianenko <anastasiia_lukianenko@epam.com>
Signed-off-by: Oleksandr Andrushchenko <oleksandr_andrushchenko@epam.com>
2020-08-14 15:18:30 -04:00
Oleksandr Andrushchenko
242587dca4 linux/compat.h: Add wait_event_timeout macro
Add  wait_event_timeout - sleep until a condition gets true or a
timeout elapses.

This is a stripped version of the same from Linux kernel with the
following u-boot specific modifications:
- no wait queues supported
- use u-boot timer to detect timeouts
- check for Ctrl-C pressed during wait

Signed-off-by: Oleksandr Andrushchenko <oleksandr_andrushchenko@epam.com>
Signed-off-by: Anastasiia Lukianenko <anastasiia_lukianenko@epam.com>
[trini: Drop atomic_read from gadget/ether.c as this has existed for a
        while and now causes problems]
Signed-off-by: Tom Rini <trini@konsulko.com>
2020-08-14 15:18:30 -04:00
Peng Fan
384d5cfe5d serial: serial_xen: Add Xen PV serial driver
Add support for Xen para-virtualized serial driver. This
driver fully supports serial console for the virtual machine.

Please note that as the driver is initialized late, so no banner
nor memory size is visible.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Oleksandr Andrushchenko <oleksandr_andrushchenko@epam.com>
Signed-off-by: Anastasiia Lukianenko <anastasiia_lukianenko@epam.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-14 15:18:30 -04:00
Oleksandr Andrushchenko
673fd82c50 xen: Port Xen event channel driver from mini-os
Make required updates to run on u-boot. Strip functionality
not needed by U-boot.

Signed-off-by: Oleksandr Andrushchenko <oleksandr_andrushchenko@epam.com>
Signed-off-by: Anastasiia Lukianenko <anastasiia_lukianenko@epam.com>
2020-08-14 15:18:30 -04:00
Oleksandr Andrushchenko
486544161f xen: Port Xen hypervisor related code from mini-os
Port hypervisor related code from Mini-OS. This is referencing the code
of Mini-OS from [1] by Huang Shijie and Volodymyr Babchuk which is for
ARM64.
Update essential arch code to support required bit operations, memory
barriers etc.

Copyright for the bits ported belong to at least the following authors,
please see related files for details:

Copyright (c) 2002-2003, K A Fraser
Copyright (c) 2005, Grzegorz Milos, gm281@cam.ac.uk,Intel Research Cambridge
Copyright (c) 2014, Karim Allah Ahmed <karim.allah.ahmed@gmail.com>

[1] - https://github.com/zyzii/mini-os.git

Signed-off-by: Oleksandr Andrushchenko <oleksandr_andrushchenko@epam.com>
Signed-off-by: Anastasiia Lukianenko <anastasiia_lukianenko@epam.com>
[trini: Drop wmb() from musb-net/linux-compat.h now]
Signed-off-by: Tom Rini <trini@konsulko.com>
2020-08-14 15:18:30 -04:00
Andrii Anisov
770a8eef3e board: Introduce xenguest_arm64 board
Introduce a minimal Xen guest board running as a virtual
machine under Xen Project's hypervisor [1], [2].

Part of the code is ported from Xen mini-os and also uses
work initially done by different authors from NXP: please see
relevant files for their copyrights.

[1] https://xenbits.xen.org
[2] https://wiki.xenproject.org/

Signed-off-by: Andrii Anisov <andrii_anisov@epam.com>
Signed-off-by: Oleksandr Andrushchenko <oleksandr_andrushchenko@epam.com>
Signed-off-by: Anastasiia Lukianenko <anastasiia_lukianenko@epam.com>
2020-08-14 15:18:27 -04:00
Heinrich Schuchardt
a4bda5ebab riscv: load addresses for Sipeed MAIX
Define default load addresses and the device tree name for the Sipeed MAIX.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-08-14 17:22:50 +02:00
Oleksandr Andrushchenko
365d88ac7e xen: Add essential and required interface headers
Add essential and required Xen interface headers only taken from
the stable Linux kernel stable/linux-5.7.y at commit
66dfe4522160 Linux 5.7.5.

These are better suited for U-boot than the original headers
from Xen as they are the stripped versions of the same.

At the same time use public protocols from Xen RELEASE-4.13.1, at
commit 6278553325a9 update Xen version to 4.13.1
as those have more comments in them.

Signed-off-by: Oleksandr Andrushchenko <oleksandr_andrushchenko@epam.com>
Signed-off-by: Anastasiia Lukianenko <anastasiia_lukianenko@epam.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
2020-08-14 09:46:40 -04:00
Peng Fan
751897301d Kconfig: Introduce CONFIG_XEN
Introduce CONFIG_XEN to make U-Boot could be used as bootloader
for a virtual machine.

Without bootloader, we could successfully boot up android on XEN, but
we need need bootloader to support A/B, dm verify and etc.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Oleksandr Andrushchenko <oleksandr_andrushchenko@epam.com>
Signed-off-by: Anastasiia Lukianenko <anastasiia_lukianenko@epam.com>
2020-08-14 09:46:40 -04:00
Anastasiia Lukianenko
824ed85b77 Add MIT License
Signed-off-by: Anastasiia Lukianenko <anastasiia_lukianenko@epam.com>
2020-08-14 09:46:40 -04:00
Chia-Wei, Wang
2c00c2e024 configs: evb-ast2500: Convert to OF_SEPARATE
Switch DTB provider form OF_EMBED to OF_SEPARATE
to avoid the compile warning message:

  ==================== WARNING ======================
  CONFIG_OF_EMBED is enabled. This option should only
  be used for debugging purposes. Please use
  CONFIG_OF_SEPARATE for boards in mainline.
  See doc/README.fdt-control for more info.
  ====================================================

Signed-off-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com>
2020-08-14 09:46:40 -04:00
Chia-Wei, Wang
353eedb8a0 configs: evb-ast2500: Move BOOTCOMMAND from header to defconfig
Move the BOOTCOMMAND definition from the board inclusion
header to the default configuration file.

Signed-off-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com>
2020-08-14 09:46:40 -04:00
Chia-Wei, Wang
98ef128b56 include/configs: aspeed: Remove hardcoded variables
The hardcoded platform variables such as DRAM base address are not
common to Aspeed SoCs AST24xx/AST25xx/AST26xx. This patch replaces
those hardcoded with macros defined in a newly added header, where
the basic SoC HW information are assigned accordingly.

Signed-off-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com>
2020-08-14 09:46:40 -04:00
Chia-Wei, Wang
c16f518a79 cosmetic: aspeed: ast2500: Rename board file
Rename the ast2500-board.c to board_common.c and
place the renamed file under the ast2500 folder.

Signed-off-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com>
2020-08-14 09:46:40 -04:00
Chia-Wei, Wang
611fe09577 aspeed: ast2500: Add lowlevel_init assembly
The original lowlevel_init function of AST2500 is written
in C. However, the C runtime environment is not ready until
_main execution.

This patch adds the assembly version of the lowlevel_init
function. Additional initialization to DRAM configuration
and LPC reset source are also added.

Signed-off-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com>
2020-08-14 09:46:40 -04:00
Chia-Wei, Wang
aff987c457 MAINTAINERS: Add maintainers for Aspeed SoCs
Update maintainers for Aspeed SoC platforms.

Signed-off-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com>
2020-08-14 09:46:40 -04:00
Srinath Mannam
4848704aef drivers: pcie: add Broadcom IPROC PCIe RC driver
Add support for IPROC PAXC PCIe RC driver.

Signed-off-by: Srinath Mannam <srinath.mannam@broadcom.com>
Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-14 09:43:21 -04:00
Rayagonda Kokatanur
143eb5b1ca drivers: pci: add api to get dma regions
Add api to get dma regions.

Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
2020-08-14 09:43:21 -04:00
Tom Rini
fe5c777df2 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-riscv
- Fix HiFive Unleashed the broken problem by call fix_fdt() before
  reserve_fdt().  Please refer to
  https://www.mail-archive.com/u-boot@lists.denx.de/msg379444.html for
  master u-boot broken for HiFive Unleashed.
- Add unaligned exception cmd.
- Refine sifive/fu540 spl flow.
- Add  additional crash information for efi.
- Update sipeed/maix doc.
- Two minor refine.
2020-08-14 08:38:01 -04:00
AKASHI Takahiro
0274e50e05 test/py: efi_secboot: modify 'multiple signatures' test case
The test case 5 in test_signed (multiple signatures) must be modified
and aligned with the change introduced in the previous commit
("efi_loader: signature: correct a behavior against multiple signatures").

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
2020-08-14 12:34:33 +02:00
AKASHI Takahiro
52956e535e efi_loader: signature: correct a behavior against multiple signatures
Under the current implementation, all the signatures, if any, in
a signed image must be verified before loading it.

Meanwhile, UEFI specification v2.8b section 32.5.3.3 says,
    Multiple signatures are allowed to exist in the binary’s certificate
    table (as per PE/COFF Section “Attribute Certificate Table”). Only
    one hash or signature is required to be present in db in order to pass
    validation, so long as neither the SHA-256 hash of the binary nor any
    present signature is reflected in dbx.

This patch makes the semantics of signature verification compliant with
the specification mentioned above.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reported-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-08-14 12:28:25 +02:00
Pragnesh Patel
313981c2d9 common/board_f: make sure to call fix_fdt() before reserve_fdt()
There may be a chance that board specific fix_fdt() will change the
size of FDT blob so it's safe to call reserve_fdt() after fix_fdt()
otherwise global data (gd) will overwrite with FDT blob values.

Fixes: a8492e25ac ("riscv: Expand the DT size before copy reserved memory node")

Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
2020-08-14 14:39:47 +08:00
Heinrich Schuchardt
7c6ca03eae riscv: additional crash information
If an exception occurs, the relocated program counter and return address
are required for an analysis.

With this patch you get:

    => exception undefined

    Unhandled exception: Illegal instruction
    EPC: 0000000080595908 RA: 000000008059c0c6 TVAL: 000000008030c01e
    EPC: 0000000080007908 RA: 000000008000e0c6 reloc adjusted

We can use the relocated addresses to find the involved functions in
u.boot.map:

    .text.do_undefined
                0x0000000080007908        0x8 cmd/built-in.o
    .text.cmd_process
                0x000000008000dfcc      0x11a common/built-in.o
                0x000000008000dfcc                cmd_process

If an exception occurs in an UEFI binary additionally the load addresses of
the UEFI binaries are needed. With this patch:

    => setenv efi_selftest exception
    => bootefi selftest

    Unhandled exception: Illegal instruction
    EPC: 000000008042e18a RA: 000000008042e18a TVAL: 000000008030c01e
    EPC: 000000007fea018a RA: 000000007fea018a reloc adjusted

    UEFI image [0x0000000000000000:0xffffffffffffffff] '/\selftest'
    UEFI image [0x000000008042e000:0x000000008042e43f] pc=0x18a '/bug.efi'

The value pc=0x18a matches the position of the illegal instruction in
efi_selftest_miniapp_exception.efi (loaded as /bug.efi);

    asm volatile (".word 0xffffffff\n");

    00000180   93 85 C5 11  1C 64 22 85  82 97 FF FF  FF FF 1C 64

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Tested-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Rick Chen <rick@andestech.com>
2020-08-14 14:39:41 +08:00
Heinrich Schuchardt
db3585d181 cmd: exception: unaligned data access on RISC-V
The command 'exception' can be used to test the handling of exceptions.

Currently the exception command only allows to create an illegal
instruction exception on RISC-V.

Provide a sub-command 'exception unaligned' to cause a misaligned load
address exception.

Adjust the online help for 'exception undefined'.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Rick Chen <rick@andestech.com>
2020-08-14 14:39:34 +08:00
Heinrich Schuchardt
3a85e03f83 doc: riscv: debug UART for MAIX
Provide the required settings for the debug UART.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
2020-08-14 14:39:28 +08:00
Heinrich Schuchardt
137dc153fd doc: riscv: Update documentation for Sipeed MAIX boards
The MAIXDUINO runs fine with the sipeed_maix_bitm_defconfig but a different
board id parameter should be passed to kflash.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
2020-08-14 14:39:20 +08:00
Heinrich Schuchardt
6a43e3a167 riscv: sifive: fu540: redundant initialization
We should not initialize a variable if the value is overwritten before
being read.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Tested-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Rick Chen <rick@andestech.com>
2020-08-14 14:39:14 +08:00
Heinrich Schuchardt
023dba1366 riscv: remove redundant logical constraint.
After

    if (ret) return ret;

we know that ret is zero. Don't check it again.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Rick Chen <rick@andestech.com>
2020-08-14 14:39:09 +08:00
Bin Meng
3581811dc2 riscv: sifive/fu540: Move SPL related functions to spl.c
It's better to keep all SPL related functions in the same spl.c.

Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Leo Liang <ycliang@andestech.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Tested-by: Pragnesh Patel <pragnesh.patel@sifive.com>
2020-08-14 14:38:53 +08:00
Bin Meng
50856c3f0f riscv: sifive/fu540: Drop NET_RANDOM_ETHADDR
This option was enabled during the earlier U-Boot porting time. Now
we already have the OTP driver in place and the unique MAC address
is read from the OTP, there is no need to turn on this option.

Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Leo Liang <ycliang@andestech.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Tested-by: Pragnesh Patel <pragnesh.patel@sifive.com>
2020-08-14 14:38:53 +08:00
Bin Meng
ff8e88a6d7 riscv: sifive/fu540: kconfig: Move FU540 driver related options to the SoC level
All FU540 driver related options should be in the SoC level Kconfig.

Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Tested-by: Pragnesh Patel <pragnesh.patel@sifive.com>
2020-08-14 14:38:53 +08:00
Bin Meng
d6a01704b0 riscv: sifive/fu540: spl: Rename soc_spl_init()
spl_soc_init() seems to be a better name, as all SPL functions
names start from the spl_ prefix.

Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Tested-by: Pragnesh Patel <pragnesh.patel@sifive.com>
2020-08-14 14:38:53 +08:00
Bin Meng
c4295ec849 riscv: sifive/fu540: spl: Drop our own version of board_init_f()
Use the generic board_init_f() provided by the RISC-V library codes.

Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Tested-by: Pragnesh Patel <pragnesh.patel@sifive.com>
2020-08-14 14:38:53 +08:00
Bin Meng
71672b784c riscv: Call spl_board_init_f() in the generic SPL board_init_f()
The generic SPL version of board_init_f() should give a call to
board specific codes to initialize board in the SPL phase.

Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Tested-by: Pragnesh Patel <pragnesh.patel@sifive.com>
2020-08-14 14:38:53 +08:00
AKASHI Takahiro
f68a6d5835 efi_loader: variable: fix secure state initialization
Under the new file-based variable implementation, the secure state
is always and falsely set to 0 (hence, the secure boot gets disabled)
after the reboot even if PK (and other signature database) has already
been enrolled in the previous boot.

This is because the secure state is set up *before* loading non-volatile
variables' values from saved data.

This patch fixes the order of variable initialization and secure state
initialization.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Fixes: 5f7dcf079d ("efi_loader: UEFI variable persistence")
2020-08-13 22:37:42 +02:00
AKASHI Takahiro
e1174c566a test/py: efi_secboot: add test for intermediate certificates
In this test case, an image may have a signature with additional
intermediate certificates. A chain of trust will be followed and all
the certificates in the middle of chain must be verified before loading.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
2020-08-13 22:37:36 +02:00
AKASHI Takahiro
57be8cdce3 test/py: efi_secboot: small rework for adding a new test
It won't be very useful to customize HELLO_PATH and EFI_SECBOOT_IMAGE_NAME
under the current code base. So just remove them.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
2020-08-13 22:37:36 +02:00
AKASHI Takahiro
1115edd846 efi_loader: signature: rework for intermediate certificates support
In this commit, efi_signature_verify(with_sigdb) will be re-implemented
using pcks7_verify_one() in order to support certificates chain, where
the signer's certificate will be signed by an intermediate CA (certificate
authority) and the latter's certificate will also be signed by another CA
and so on.

What we need to do here is to search for certificates in a signature,
build up a chain of certificates and verify one by one. pkcs7_verify_one()
handles most of these steps except the last one.

pkcs7_verify_one() returns, if succeeded, the last certificate to verify,
which can be either a self-signed one or one that should be signed by one
of certificates in "db". Re-worked efi_signature_verify() will take care
of this step.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
2020-08-13 22:37:36 +02:00
AKASHI Takahiro
0658bb29b0 efi_loader: variable: keep temporary buffer during the authentication
This is a bug fix; Setting an authenticated variable may fail due to
a memory corruption in the authentication.

A temporary buffer will, if needed, be allocated to parse a variable's
authentication data, and some portion of buffer, specifically signer's
certificates, will be referenced by efi_signature_verify().

So the buffer should be kept valid until the authentication process
is finished.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Tested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-08-13 22:37:36 +02:00
Heinrich Schuchardt
bc78d22d0f cmd/efidebug: missing initialization of load_options
Variable load_options must be initialized to NULL to avoid a segmentation
fault when freeing the memory this variable points to.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-08-13 22:37:36 +02:00
Tom Rini
cdcf591d9b Merge https://gitlab.denx.de/u-boot/custodians/u-boot-marvell
- Fix dtc warnings for some MVEBU boards
2020-08-13 08:25:25 -04:00
Tom Rini
6808dc62d7 Merge tag 'u-boot-stm32-20200813' of https://gitlab.denx.de/u-boot/custodians/u-boot-stm
- Use IS_ENABLED to prevent ifdef in board_key_check for STM32MP
  - Add STM32 FMC2 EBI controller driver
  - Fix dwc3-sti-glue which allows STiH410-B2260 to boot again
  - Add fitImage its entry for 587-200 DHCOR SoM
  - Add both PDK2 and DRC02 DT into DHCOM fitImage its
  - Fix DHCOM KS8851 ethernet MAC address
  - Remove stm32mp1 board.c file
  - Use const for struct node_info in board stm32mp1.c file
2020-08-13 08:11:27 -04:00
Stefan Roese
ac5cd429e3 arm: mvebu: armada-3720-turris-mox.dts: Fix dtc warning
Fix this dtc warning:
Warning (avoid_default_addr_size)

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Marek Behún <marek.behun@nic.cz>
2020-08-13 12:07:05 +02:00
Stefan Roese
fcede1e5f6 arm: mvebu: armada-388-gp.dts: Fix dtc warnings
Fix these dtc warnings:
Warning (reg_format)
Warning (avoid_default_addr_size)

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Chris Packham <judge.packham@gmail.com>
2020-08-13 12:07:05 +02:00
Stefan Roese
cc2afbd47b arm: mvebu: armada-xp-maxbcm.dts: Fix dtc warning
Fix this dtc warning:
Warning (avoid_default_addr_size)

Signed-off-by: Stefan Roese <sr@denx.de>
2020-08-13 12:07:05 +02:00
Stefan Roese
092cb733e9 arm: mvebu: armada-xp-theadorable.dts: Fix dtc warning
Fix this dtc warning:
Warning (avoid_default_addr_size)

Signed-off-by: Stefan Roese <sr@denx.de>
2020-08-13 12:07:05 +02:00
Patrick Delaunay
d0a3c4f9db board: stm32mp1: use const for struct node_info
Use const for the variable nodes in ft_board_setup,
this patch follow fdt_fixup_mtdparts prototype and no more use stack.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-08-13 10:10:33 +02:00
Patrick Delaunay
5eafc1d3d9 board: stm32mp1: remove board.c
Remove the file board/st/stm32mp1/board.c which is not more
compiled since commit 156732cc8939 ("board: stm32mp1: move the
function board_debug_uart_init in spl.c")

Fixes: 4fb46816c7 ("board: stm32mp1: move the function board_debug_uart_init in spl.c")
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-08-13 10:04:14 +02:00
Marek Vasut
9ff770b497 ARM: dts: stm32: Update eth1addr from EEPROM if eth1 present
The STM32MP1 DHCOM has two ethernet interfaces, the on-SoM DWMAC and KS8851.
Set eth1addr for the KS8851 to a MAC address of the DWMAC incremented by 1.
The MAC of the DWMAC is set from on-SoM EEPROM already, but the MAC address
of KS8851 was left uninitialized, so fix this.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-08-13 09:56:44 +02:00
Marek Vasut
b2a2911dad ARM: stm32: Add fitImage its entry for 587-200 DHCOR SoM
The new 587-200 DHCOR SoM is compatible with the 587-100 prototype,
hence just replicate the entries, as there is no pattern matching.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-08-13 09:56:01 +02:00
Marek Vasut
49650c7511 ARM: stm32: Add both PDK2 and DRC02 DT into DHCOM fitImage its
Include both PDK2 and DRC02 DTs in the DHCOM fitImage .its and implement
support in SPL to select the correct configuration entry for U-Boot by
using the machine compatible string from SPL DT.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-08-13 09:55:58 +02:00
Christophe Kerello
acdaae6390 ARM: dts: stm32: add FMC2 EBI support for stm32mp157c
This patch adds FMC2 External Bus Interface support on stm32mp157c.

Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-08-13 09:53:35 +02:00
Christophe Kerello
de1fb5fb00 configs: stm32mp: add CONFIG_STM32_FMC2_EBI
This patch enables the support of FMC2 EBI.

Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-08-13 09:53:35 +02:00
Christophe Kerello
300669acd3 board: stm32mp1: update fdt fixup partitions table
This patch adds "st,stm32mp1-fmc2-nfc" compatible string in the
fdt fixup partitions table.

Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-08-13 09:53:35 +02:00
Christophe Kerello
82bf7729a2 mtd: rawnand: stm32_fmc2: get resources from parent node
FMC2 EBI support has been added. Common resources (registers base
address and clock) can now be shared between the 2 drivers using
"st,stm32mp1-fmc2-nfc" compatible string. It means that the
common resources should now be found in the parent device when EBI
node is available.

Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-08-13 09:53:34 +02:00
Christophe Kerello
6d47598629 memory: stm32-fmc2-ebi: add STM32 FMC2 EBI controller driver
The driver adds the support for the STMicroelectronics FMC2 EBI controller
found on STM32MP SOCs.

Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-08-13 09:53:34 +02:00
Christophe Kerello
834b85c9e8 mtd: rawnand: stm32_fmc2: use clrsetbits_le32
This patch uses clrsetbits_le32 function instead of multiple instructions.

Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-08-13 09:53:34 +02:00
Christophe Kerello
158f2d44a7 mtd: rawnand: stm32_fmc2: use FIELD_PREP/FIELD_GET macros
This patch removes custom macros and uses FIELD_PREP and FIELD_GET macros.

Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-08-13 09:53:34 +02:00
Christophe Kerello
7a6b328841 mtd: rawnand: stm32_fmc2: cosmetic change to use nfc instead of fmc2 where relevant
This patch renames functions and local variables.
This cleanup is done to get all functions starting by stm32_fmc2_nfc
in the FMC2 raw NAND driver when all functions will start by
stm32_fmc2_ebi in the FMC2 EBI driver.

Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-08-13 09:53:34 +02:00
Christophe Kerello
4a470044e1 mtd: rawnand: stm32_fmc2: use FMC2_TIMEOUT_5S for timeouts
FMC2_TIMEOUT_5S will be used each time that we need to wait.
It was seen, during stress tests in an overloaded system,
that we could be close to 1 second, even if we never met this
value. To be safe, FMC2_TIMEOUT_MS is set to 5 seconds.

Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-08-13 09:53:34 +02:00
Christophe Kerello
a3899b373f mtd: rawnand: stm32_fmc2: remove useless inline comments
Remove inline comments that are useless since function label are
self explanatory.

Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-08-13 09:53:34 +02:00
Christophe Kerello
e99e812e12 mtd: rawnand: stm32_fmc2: fix a buffer overflow
The chip select defined in the device tree could only be 0 or 1.

Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-08-13 09:53:34 +02:00
Patrick Delaunay
9a2b0540dc arm: stm32mp: stm32prog: use IS_ENABLED to prevent ifdef
Use IS_ENABLED to prevent ifdef in stm32prog command.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-08-13 09:52:49 +02:00
Patrick Delaunay
4e9e358fe8 arm: stm32mp: bsec: use IS_ENABLED to prevent ifdef
Use IS_ENABLED to prevent ifdef in bsec driver.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-08-13 09:52:49 +02:00
Patrick Delaunay
06f624f28c board: stm32mp1: use IS_ENABLED to prevent ifdef in ft_board_setup
Use IS_ENABLED to prevent ifdef in ft_board_setup.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-08-13 09:52:49 +02:00
Patrick Delaunay
ebfd592f16 board: stm32mp1: use IS_ENABLED to prevent ifdef in env functions
Use IS_ENABLED to prevent ifdef in env functions:
- env_get_location
- env_ext4_get_intf
- mmc_get_env_dev

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-08-13 09:52:49 +02:00
Patrick Delaunay
72b099897a board: stm32mp1: use IS_ENABLED to prevent ifdef in board_late_init
Use IS_ENABLED to prevent ifdef in board_late_init.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-08-13 09:52:49 +02:00
Patrick Delaunay
e817c8eca5 board: stm32mp1: use IS_ENABLED to prevent ifdef in dk2_i2c1_fix
Use IS_ENABLED to prevent ifdef in dk2_i2c1_fix.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-08-13 09:52:49 +02:00
Patrick Delaunay
75f9b190e4 board: stm32mp1: use IS_ENABLED to prevent ifdef in set_dfu_alt_inf
Use CONFIG_IS_ENABLED to prevent ifdef in set_dfu_alt_inf.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-08-13 09:52:49 +02:00
Patrick Delaunay
3434bbe698 board: stm32mp1: use IS_ENABLED to prevent ifdef in sysconf_init
Use IS_ENABLED to prevent ifdef in sysconf_init.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-08-13 09:52:49 +02:00
Patrick Delaunay
feb6179ffe board: stm32mp1: use IS_ENABLED to prevent ifdef in board_check_usb_power
Use IS_ENABLED to prevent ifdef in board_check_usb_power.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-08-13 09:52:49 +02:00
Patrick Delaunay
6a8713bbe3 board: stm32mp1: use IS_ENABLED to prevent ifdef in g_dnl_board_usb_cable_connected
Use IS_ENABLED to prevent ifdef in g_dnl_board_usb_cable_connected
and in g_dnl_bind_fixup

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-08-13 09:52:48 +02:00
Patrick Delaunay
00bac2abcd board: stm32mp1: use IS_ENABLED to prevent ifdef in board_key_check
Use IS_ENABLED to prevent ifdef in board_key_check

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-08-13 09:52:48 +02:00
Patrice Chotard
f3858ce029 usb: host: dwc3-sti-glue: Fix ofnode_valid() parameter
node varaible is used as iterator into ofnode_for_each_subnode()
loop, when exiting of it, node is no more a valid ofnode.
Use dwc3_node instead as parameter of ofnode_valid()

Fixes: ac28e59a57 ("usb: Migrate to support live DT for some driver")
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Cc: Kever Yang <kever.yang@rock-chips.com>
2020-08-13 09:19:18 +02:00
Frank Wunderlich
dbfca734d0 Makefile: fix annoying sunxi hack message
every compilation shows this error

 Hack for sunxi which doesn't have a proper binman definition for
 64-bit boards

not only for sunxi-boards/arm64

fix this by changing to real comments

Fixes: 9f55ee259d0c ("Makefile: sunxi: Don't use binman to build ATF image")
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
2020-08-12 08:06:00 -04:00
Tom Rini
c25344ff9a Merge tag 'ti-v2020.10-rc3' of https://gitlab.denx.de/u-boot/custodians/u-boot-ti
- Added support for J7200 evm
- DM_ETH and DM_USB migrations for omap3
- USB DFU and mass storage support for AM65x evm
- RTI watchdog support for K3 devices
- Fix an issue with L3 cache on K3 devices
2020-08-11 23:03:46 -04:00
Vignesh Raghavendra
db6451ec0e arm: dts: k3-j7200-common-proc-board: Enable CPSW2G port
Enable CPSW2G port to support networking in U-Boot

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2020-08-11 20:34:46 +05:30
Vignesh Raghavendra
4bb4b06983 ARM: dts: k3-j7200-mcu-wakeup: Add CPSW2G support
Add MCU NAVSS, UDMA and CPSW2G DT nodes.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2020-08-11 20:34:46 +05:30
Vignesh Raghavendra
28e29fbb4f ARM: dts: k3-j7200: Add HyperBus and HyperFlash nodes
J7200 SoM has Cypress HyperFlash connected to HyperBus interface, add DT
entries for the same.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2020-08-11 20:34:46 +05:30
Vignesh Raghavendra
9e8a9b6457 ARM: dts: k3-j7200: Add wkup gpio node
Add wkup_gpio0 node required for detecting whether board mux is set
HyperFlash.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2020-08-11 20:34:46 +05:30
Vignesh Raghavendra
d2bc9875eb board: ti: j721e: Add support for HyperFlash detection
On J7200 SoC OSPI0 and HypeFlash are muxed at HW level and only one of
them can be used at any time. J7200 EVM has both HyperFlash and OSPI
flash on board. There is a user switch (SW3.1) that can be toggled to
select OSPI flash vs HyperFlash.
Read the state of this switch via wkup_gpio0_6 line and fixup the DT
nodes to select OSPI0 vs HyperFlash

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2020-08-11 20:34:46 +05:30
Vignesh Raghavendra
86c9bd4eb7 arm: dts: k3-j7200: Add USB related DT entries
Add USB related DT entries to enable USB device mode.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2020-08-11 20:34:46 +05:30
Lokesh Vutla
f8c1e893c8 configs: j7200_evm_a72: Add Initial support
Add initial A72 defconfig support.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-08-11 20:34:46 +05:30
Lokesh Vutla
02dff65efe configs: j7200_evm_r5: Add initial support
Add initial R5 defconfig support

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-08-11 20:34:46 +05:30
Dave Gerlach
7cc9855f31 arm: dts: k3-j7200: Add R5 specific dts support
Add the basic a72 basic dts for j7200. Following nodes were supported:
- UART
- MMC SD
- I2C
- TISCI communication
- LPDDR with 1600MTs configuration.

Signed-off-by: Andrew F. Davis <afd@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
2020-08-11 20:34:46 +05:30
Lokesh Vutla
a7551cf05d arm: dts: k3-j7200: Add dts support
Add the basic a72 dts for j7200. Following nodes were supported:
- UART
- MMC SD
- I2C
- TISCI communication

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Vishal Mahaveer <vishalm@ti.com>
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
2020-08-11 20:34:46 +05:30
Kishon Vijay Abraham I
837933a620 soc: soc_ti_k3: Add device identification for J7200 SoC
Add device identification for J7200 SoC

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Suman Anna <s-anna@ti.com>
2020-08-11 20:34:46 +05:30
Lokesh Vutla
6e802ef540 ram: k3-j721e: Relax version checks for memory controller
k3-j721e ddr driver sanity checks for product id and version number.
Version number gets changed for every minor update in the IP. So discard
the version check and just sanity check for product id.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-08-11 20:34:46 +05:30
Lokesh Vutla
2cf09d7bed board: ti: j7200: Add board detection support for j7200
Add board detection support for j7200 common processor board.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Reviewed-by: Suman Anna <s-anna@ti.com>
2020-08-11 20:34:46 +05:30
Lokesh Vutla
cf1d6867f7 board: ti: j7200: Introduce support for j7200 build targets
j7200-evm has minor differences with j721e-evm based on the IPs
available in the SoC. Introduce separate build targets for j7200-evm
to incorporate the differences.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Suman Anna <s-anna@ti.com>
2020-08-11 20:34:46 +05:30
Lokesh Vutla
01dbe366ba arm: mach-k3: j7200: Detect if ROM has already loaded sysfw
Detect if sysfw is already loaded by ROM and pass this information to
sysfw loader. Based on this information sysfw loader either loads the
sysfw image from boot media or just receives the boot notification
message form sysfw.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Suman Anna <s-anna@ti.com>
2020-08-11 20:34:46 +05:30
Lokesh Vutla
9c8f41beea arm: mach-k3: j7200: Add support for storing extended boot info from ROM
Starting J7200 SoC, ROM supports for loading sysfw directly from boot
image. ROM passes this information on number of images that are loaded
to bootloader at certain location. Add support for storing this
information before it gets corrupted.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Suman Anna <s-anna@ti.com>
2020-08-11 20:34:46 +05:30
Lokesh Vutla
30de1ba0d3 arm: mach-k3: j7200: Add support for SOC detection
The J7200 SoC is a part of the K3 Multicore SoC architecture platform.
It is targeted for automotive gateway, vehicle compute systems,
Vehicle-to-Vehicle (V2V) and Vehicle-to-Everything (V2X) applications.
The SoC aims to meet the complex processing needs of modern embedded
products.

Some highlights of this SoC are:
* Dual Cortex-A72s in a single cluster, two clusters of lockstep
  capable dual Cortex-R5F MCUs and a Centralized Device Management and
  Security Controller (DMSC).
* Configurable L3 Cache and IO-coherent architecture with high data
  throughput capable distributed DMA architecture under NAVSS.
* Integrated Ethernet switch supporting up to a total of 4 external ports
  in addition to legacy Ethernet switch of up to 2 ports.
* Upto 1 PCIe-GEN3 controller, 1 USB3.0 Dual-role device subsystems,
  20 MCANs, 3 McASP, eMMC and SD, OSPI/HyperBus memory controller, I3C and
  I2C, eCAP/eQEP, eHRPWM among other peripherals.
* One hardware accelerator block containing AES/DES/SHA/MD5 called SA2UL
  management.

See J7200 Technical Reference Manual (SPRUIU1, June 2020)
for further details: https://www.ti.com/lit/pdf/spruiu1

Add support for detection J7200 SoC

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
2020-08-11 20:34:46 +05:30
Lokesh Vutla
73108dcd7f arm: mach-k3: j721e: Fix unlocking control module registers
In main control mmr there is no partition 4 and partition 6 is available
only on J721e. Fix the same in ctrl_mmr_unlock function

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Suman Anna <s-anna@ti.com>
2020-08-11 20:34:46 +05:30
Lokesh Vutla
2a18be77de arm: mach-k3: j721e: Add detection for j721e
Add an api soc_is_j721e(), and use it to enable certain functionality
that is available only on j721e. This detection is needed when DT is not
available.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
2020-08-11 20:34:46 +05:30
Lokesh Vutla
dc57a554a5 arm: mach-k3: sysfw-loader: Add support for rom loading sysfw image
Starting J7200 SoC, ROM supports for loading sysfw directly from boot
image. In such cases, SPL need not load sysfw from boot media, but need
to receive boot notification message from sysfw. So separate out
remoteproc calls for system controller from sysfw loader and just
receive the boot notification if sysfw is already loaded.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Suman Anna <s-anna@ti.com>
2020-08-11 20:34:46 +05:30
Lokesh Vutla
58ccd6105c arm: mach-k3: Move mmr_unlock to a common location
mmr_unlock api is common for all k3 devices. Move it to a common
location.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Suman Anna <s-anna@ti.com>
2020-08-11 20:34:46 +05:30
Jean-Jacques Hiblot
d099db2829 arm: mach-k3: Fix platform hang when SPL_MULTI_DTB_FIT is not enabled
If SPL_MULTI_DTB_FIT is not enabled, then CONFIG_SPL_OF_LIST is not defined
And in turn tispl.bin ends up not embedding any DTB.
Fixing it by using CONFIG_DEFAULT_DEVICE_TREE if SPL_OF_LIST is empty.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-08-11 20:34:46 +05:30
Suman Anna
0526460a50 board: ti: j721e: Update fdt fixup logic for interconnect nodes
The DT nodes on J721E SoCs currently use a node name "interconnect" for
the various interconnects. This name is not following the DT schema, and
should simply be "bus". Update the fdt fixup logic to use both the current
and the expected corrected path names so that this logic won't be broken
with newer kernels.

Signed-off-by: Suman Anna <s-anna@ti.com>
2020-08-11 20:34:46 +05:30
Lokesh Vutla
b29a7cd09d board: ti: j721e: Probe eeprom only when CONFIG_TI_I2C_BOARD_DETECT is defined
Guard all eeprom probe with TI_I2C_BOARD_DETECT to avoid reading eeprom
when eeprom is not available

Reviewed-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2020-08-11 20:34:46 +05:30
Lokesh Vutla
6b889389b6 board: ti: board_detect: Add stub functions for EEPROM detection apis
Current usage of eeprom apis produce a build failure when
CONFIG_TI_I2C_BOARD_DETECT is not defined. Add stub function for these
apis to avoid build failures.

Reviewed-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-08-11 20:34:46 +05:30
Faiz Abbas
49b2830c85 configs: Add new config for supporting USB mass storage boot
Because of space constraints, create a new USB defconfig for R5 to
faciliate booting from USB mass storage devices

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
2020-08-11 20:34:46 +05:30
Faiz Abbas
cc445d70b0 configs: Add defconfig for USB DFU bootmode
Because of space constraints, create a new USB defconfig for R5 to
faciliate booting in USB peripheral (DFU) bootmode

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
2020-08-11 20:34:46 +05:30
Faiz Abbas
eb5bf2f3b6 configs: am65x_evm_a53: Enable USB Mass storage and DFU boot modes
Enable configs to facilitate booting from USB Mass Storage devices
as well as USB peripheral boot

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
2020-08-11 20:34:46 +05:30
Faiz Abbas
b528c725e7 configs: am65x_evm: Add support for DFU related configs
Add offset and environment related configs used for booting
from DFU.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
2020-08-11 20:34:46 +05:30
Faiz Abbas
c20aee3e28 arm: dts: k3-am654-base-board: Add support for USB0 in SPL
Add nodes for USB0 in SPL to enable USB host boot mode

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
2020-08-11 20:34:46 +05:30
Faiz Abbas
5251eb13bd arm: dts: k3-am654-r5-base-board: Add USB0 nodes
Add USB0 nodes and set them to host mode to support USB host and
peripheral boot modes

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
2020-08-11 20:34:46 +05:30
Faiz Abbas
897e83f0a5 arm: mach-k3: am6_init: Add support for USB boot mode
Add support for identifying USB host and device boot modes

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
2020-08-11 20:34:46 +05:30
Faiz Abbas
403fc5c9cf arm: mach-k3: am6_init: Do USB fixups to facilitate host and device boot modes
U-boot only supports either USB host or device mode for a node at a
time in dts. To support both host and dfu bootmodes, set "peripheral"
as the default dr_mode but fixup property to "host" if host bootmode
is detected.

This needs to happen before the dwc3 generic layer binds the usb device
to a host or device driver. Therefore, add an fdtdec_setup_board()
implementation to fixup the dt based on the boot mode.

Also use the same fixup function to set the USB-PCIe Serdes mux to PCIe
in both the host and device cases. This is required for accessing the
interface at USB 2.0 speeds.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
2020-08-11 20:34:46 +05:30
Faiz Abbas
febb47ac61 arm: mach-k3: am6_init: Gate mmc related configurations with the appropriate config
Gate mmc related system related configurations with DM_MMC to avoid build
errors when MMC is not enabled

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
2020-08-11 20:34:46 +05:30
Faiz Abbas
f5838b1542 arm: mach-k3: sysfw-loader: Add support to load SYSFW from USB
Add support for loading system firmware from a USB mass storage device

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
2020-08-11 20:34:46 +05:30
Faiz Abbas
f9916b6d3b armv7R: K3: am654: Use full malloc in SPL both pre and post reloc
In order to be able to use things like file system drivers early on in
SPL (before relocation) in a memory-constrained environment when DDR is
not yet available we cannot use the simple malloc scheme which does not
implement the freeing of previously allocated memory blocks. To address
this issue go ahead and enable the use of the full malloc by manually
initializing the required functionality inside board_init_f by creating
a full malloc pool inside the pre-relocation malloc pool.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
2020-08-11 20:34:46 +05:30
Faiz Abbas
39388aebed spl: usb: Only init usb once
usb_init() may be called multiple times for fetching multiple images
from SPL. Skip reinitializing USB if its already been done

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
2020-08-11 20:34:46 +05:30
Faiz Abbas
c3ab97c1dd spl: usb: Create an API spl_usb_load()
Create a new API spl_usb_load() that takes the filename as a parameter
instead of taking the default U-boot PAYLOAD_NAME

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
2020-08-11 20:34:46 +05:30
Suman Anna
fc4c380233 board: ti: am65x: Update fdt fixup logic for interconnect nodes
The DT nodes on AM65x SoCs currently use a node name "interconnect" for
the various interconnects. This name is not following the DT schema, and
should simply be "bus". Update the fdt fixup logic to use both the
current and the expected corrected path names so that this logic won't
be broken with newer kernels.

The logic also corrects the crypto node name as the DT node
unit-addresses are all expected to be lower case.

Signed-off-by: Suman Anna <s-anna@ti.com>
2020-08-11 20:34:45 +05:30
Faiz Abbas
7d6f45a210 mmc: am654_sdhci: Use MMC_MODES_END value instead of hardcoded value
The hardcoded array size leads to array overflows with changes in
speed modes enum in mmc core. Use MMC_MODES_END for otap_del_sel
array declaration to fix this.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2020-08-11 20:34:45 +05:30
Suman Anna
f3f2018f66 arm: dts: k3-j721e: Fix interconnect node names
The various CBASS interconnect nodes on K3 J721E SoCs are defined
using the node name "interconnect". This is not a valid node name
as per the dt-schema. Fix these node names to use the standard name
used for SoC interconnects, "bus".

Signed-off-by: Suman Anna <s-anna@ti.com>
2020-08-11 20:34:45 +05:30
Suman Anna
58edc6f686 arm: dts: k3-am65: Fix interconnect node names
The various CBASS interconnect nodes on K3 AM65x SoCs are defined
using the node name "interconnect". This is not a valid node name
as per the dt-schema. Fix these node names to use the standard name
used for SoC interconnects, "bus".

Signed-off-by: Suman Anna <s-anna@ti.com>
2020-08-11 20:34:45 +05:30
Derald D. Woods
5297a956cb ARM: omap3: evm: Complete DM_ETH and DM_USB migrations
This commit completes the migrations for DM_ETH and DM_USB. The board
is now consistent with omap3_beagle and other remaining OMAP3 boards.

Cc: Tom Rini <trini@konsulko.com>
Cc: Adam Ford <aford173@gmail.com>
Signed-off-by: Derald D. Woods <woods.technical@gmail.com>
2020-08-11 20:34:45 +05:30
Tom Rini
b298720900 Merge tag 'efi-2020-10-rc3' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi
Pull request for UEFI sub-system for efi-2020-10-rc3

Bugs in the UEFI sub-system are fixed:

* use the optional data of the BootXXXX variables as load options
* simplify function public_key_verify_signature()
* amend a copyright notice
2020-08-11 08:56:52 -04:00
Andrew F. Davis
864e285739 arm: mach-k3: Clean non-coherent lines out of L3 cache
When switching on or off the ARM caches some care must be taken to ensure
existing cache line allocations are not left in an inconsistent state.
An example of this is when cache lines are considered non-shared by
and L3 controller even though the lines are shared. To prevent these
and other issues all cache lines should be cleared before enabling
or disabling a coherent master's cache. ARM cores and many L3 controllers
provide a way to efficiently clean out all cache lines to allow for
this, unfortunately there is no such easy way to do this on current K3
MSMC based systems.

We could explicitly clean out every valid external address tracked by
MSMC (all of DRAM), or we could attempt to identify only the set of
addresses accessed by a given boot stage and flush only those
specifically. This patch attempts the latter. We start with cleaning the
SPL load address. More addresses can be added here later as they are
identified.

Note that we perform a flush operation for both the flush and invalidate
operations, this is not a typo. We do this to avoid the situation that
some ARM cores will promote an invalidate to a clean+invalidate, but only
emit the invalidation operation externally, leading to a loss of data.

Signed-off-by: Andrew F. Davis <afd@ti.com>
Tested-by: Faiz Abbas <faiz_abbas@ti.com>
2020-08-11 10:18:27 +05:30
Jan Kiszka
e1c3668594 arm: dts: k3: Add RTI watchdogs
Add DT entries for main domain watchdog0 and 1 instances on the J721e
well as RTI1-based watchdog on the AM65x. RTI0 does not work for this
purpose on the AM65x, so leave it out.

On AM65x, we mark the power-domain as shared because RTI firmware such
as https://github.com/siemens/k3-rti-wdt may request it as well in order
to prevent accidental shutdown of the watchdog.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
2020-08-11 10:18:27 +05:30
Jan Kiszka
d388f360ed watchdog: Add support for K3 RTI watchdog
This is based on the Linux kernel driver for the RTI watchdog.

To actually reset the system on an AM65x, it requires firmware running
on the R5 that accepts the NMI and issues the actual system reset via
TISCI. Kind of an iTCO, except that this watchdog hardware has support
for no-way-out, and only for that.

On the J721E, reset works without extra firmware help when routing the
RTI interrupt via the ESM.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
2020-08-11 10:18:27 +05:30
Tom Rini
c045207f96 Prepare v2020.10-rc2
Signed-off-by: Tom Rini <trini@konsulko.com>
2020-08-10 16:10:09 -04:00
Tom Rini
554e5514ac configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2020-08-10 15:31:07 -04:00
Joao Marcos Costa
74795f1e35 test/py: fix SquashFS tests
Use "cons.config.build_dir" instead of writing to the source directory
(read-only). This will fix the test failures in Azure.

Signed-off-by: Joao Marcos Costa <joaomarcos.costa@bootlin.com>
2020-08-10 10:37:50 -04:00
Heinrich Schuchardt
0ad64007fe efi_loader: set load options in boot manager
Up to now we used the value of the bootargs environment variable as load
options in the boot manager. This is not correct. The data has to be taken
from the Boot#### variable.

Let the boot manager copy the optional data of the EFI_LOAD_OPTION as load
options to the loaded image protocol.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-08-08 19:03:24 +02:00
Heinrich Schuchardt
1064d04920 efi_loader: factor out efi_set_load_options()
The bootefi bootmgr command has to set the load options for a loaded image
from the value of BootXXXX variable. If the boot manager is not used, the
value is set from the environment variable bootargs (or efi_selftest).

Factor out a common function efi_set_load_options().

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-08-08 19:03:24 +02:00
AKASHI Takahiro
dd92aad81c efi_loader: add copyright notice
Some amount of code was moved/derived from efi_variable.c regarding
UEFI secure boot, in particluar in the commit 012c56ac76 ("efi_loader:
restructure code for TEE variables").
So add the orignal author's copyright notice.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-08-08 19:03:24 +02:00
Heinrich Schuchardt
9bdbc8ef98 lib/crypto: simplify public_key_verify_signature
The variable region is filled but never used. Remove it.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-08-08 19:03:12 +02:00
Tom Rini
7d08077334 Convert CONFIG_SYS_MMC_ENV_DEV et al to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_MMC_ENV_DEV
   CONFIG_SYS_MMC_ENV_PART

Note that with this conversion we now have consistent behavior with
respect to ensuring that we have always selected the correct MMC
device and hardware partition.

Signed-off-by: Tom Rini <trini@konsulko.com>
2020-08-08 11:03:52 -04:00
Simon Glass
b904d79e48 Makefile: sunxi: Don't use binman to build ATF image
At present with sunxi 64-bit, the Makefile builds
u-boot-sunxi-with-spl.bin and then binman overwrites it with its own
version. But the binman definition lacks some parts, in particular
BL31.

For now, work around this with a hack.

Tested-by: Andre Przywara <andre.przywara@arm.com>
Tested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Simon Glass <sjg@chromium.org>
Fixes: 42b18df80f ("x86: Makefile: Drop explicit targets built by binman")
2020-08-08 08:31:52 -04:00
Heinrich Schuchardt
38ee01e4dd test/py: serial# cannot be overwritten on some devices
On some devices the environment variable serial# cannot be overwritten.
Set the variable only if it is not set.

For our unit test it is sufficient to test if any value for serial-number
is set.

Fixes: 8a5cdf601f ("test: efi_selftest: Do not force serial# setting")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-08-08 08:31:39 -04:00
Tom Rini
626b2df302 Merge branch '2020-08-07-misc-improvements'
- SquashFS support
- Assorted bugfixes
2020-08-08 08:28:53 -04:00
Heinrich Schuchardt
acb021e48c test: py: test_shell_run() with CONFIG_HUSH_PARSER=n
The hush parser not enabled for some boards, e.g.
sipeed_maix_bitm_defconfig.

With CONFIG_HUSH_PARSER=n a double quotation mark is not interpreted as the
beginning of a string. Use a single quotation mark instead.

Furthermore without the hush parser variables have to be referenced as
${varname}. Add the missing braces.

Reported-by: Sean Anderson <seanga2@gmail.com>
Fixes: 8b86c609b8 ("test/py: add test of basic shell functionality")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-08-07 22:31:32 -04:00
Stephen Warren
cc88625370 tests: support mkfs.ext4 without metadata_csum
Modify various test/py filesystem creation routines to support systems
that don't implement the metadata_csum ext4 feature.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2020-08-07 22:31:32 -04:00
Jway Lin
edca8edd79 board: presidio: add LED support
Add LED support for Cortina Access Presidio Engineering Board

Signed-off-by: Jway Lin <jway.lin@cortina-access.com>
Signed-off-by: Alex Nemirovsky <alex.nemirovsky@cortina-access.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

CC: Simon Glass <sjg@chromium.org>
2020-08-07 22:31:32 -04:00
Jway Lin
047e31ed4b led: led_cortina: Add CAxxx LED support
Add Cortina Access LED controller support for CAxxxx SOCs

Signed-off-by: Jway Lin <jway.lin@cortina-access.com>
Signed-off-by: Alex Nemirovsky <alex.nemirovsky@cortina-access.com>
CC: Simon Glass <sjg@chromium.org>

Add head file fixed link error and remove unused flashing function
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-07 22:31:32 -04:00
Tom Rini
e1ecfc1262 Travis: Add squashfs-tools
So that the tests we now have for squashfs can run, add squashfs-tools
for mksquashfs.

Signed-off-by: Tom Rini <trini@konsulko.com>
2020-08-07 22:31:32 -04:00
Joao Marcos Costa
f428e33b6b test/py: Add tests for the SquashFS commands
Add Python scripts to test 'ls' and 'load' commands. The scripts
generate a SquashFS image and clean the directory after the assertions,
or if an exception is raised.

Signed-off-by: Joao Marcos Costa <joaomarcos.costa@bootlin.com>
2020-08-07 22:31:32 -04:00
Joao Marcos Costa
02c366b5d5 fs/fs.c: add symbolic link case to fs_ls_generic()
Adds an 'else if' statement inside the loop to check for symbolic links.

Signed-off-by: Joao Marcos Costa <joaomarcos.costa@bootlin.com>
2020-08-07 22:31:32 -04:00
Joao Marcos Costa
3634b35089 fs/squashfs: add support for zlib decompression
Add call to zlib's 'uncompress' function. Add function to display the
right error message depending on the decompression's return value.

Signed-off-by: Joao Marcos Costa <joaomarcos.costa@bootlin.com>
2020-08-07 22:31:32 -04:00
Joao Marcos Costa
81014f73f0 include/u-boot, lib/zlib: add sources for zlib decompression
Add zlib (v1.2.11) uncompr() function to U-Boot. SquashFS depends on
this function to decompress data from a raw disk image. The actual
support for zlib into SquashFS sources will be added in a follow-up
commit.

Signed-off-by: Joao Marcos Costa <joaomarcos.costa@bootlin.com>
2020-08-07 22:31:32 -04:00
Joao Marcos Costa
bba604b65e fs/squashfs: add filesystem commands
Add 'ls' and 'load' commands.

Signed-off-by: Joao Marcos Costa <joaomarcos.costa@bootlin.com>
2020-08-07 22:31:32 -04:00
Joao Marcos Costa
c510061303 fs/squashfs: new filesystem
Add support for SquashFS filesystem. Right now, it does not support
compression but support for zlib will be added in a follow-up commit.

Signed-off-by: Joao Marcos Costa <joaomarcos.costa@bootlin.com>
2020-08-07 22:31:32 -04:00
Simon Glass
550a9e7902 cmd: Update the memory-search command
Add various fixes and improvements to this command that were missed in
the original version. Unfortunately I forgot to send v2.

- Fix Kconfig name
- Use a separate variable for the remaining search length
- Correct a minor bug
- Move into a separate test suite
- Add -q flag to the 'quiet' test to test operation when console is enabled
- Enable the feature for sandbox

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-08-07 22:31:32 -04:00
Simon Glass
132644f56e test: Add a flag for tests that need console recording
Allow tests that need console recording to be marked, so they can be
skipped if it is not available.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-08-07 22:31:32 -04:00
Simon Glass
e180c2b129 dm: Rename DM test flags to make them more generic
The test flags used by driver model are currently not available to other
tests. Rather than creating two sets of flags, make these flags generic
by changing the DM_ prefix to UT_ and moving them to the test.h header.

This will allow adding other test flags without confusion.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-08-07 22:31:32 -04:00
Simon Glass
bd34715599 console: Always define the console-recording functions
On boards without console recording these function are currently missing.
It is more convenient for them to be present but to return dummy values.
That way if we know that a test needs recording, we can check if it is
available, and skip the test if not, while avoiding #ifdefs.

Update the header file according and adjust console_record_reset_enable()
to return an error if recording is not available.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-08-07 22:31:32 -04:00
Simon Glass
33d7edfd5f test: Add a way to check part of a console line or skip it
Some lines of the output are not worth testing, or not worth testing in
their entirety. For example, when checking a hex dump we know that the
hex-dump routine can display ASCII so we only need to check the hex bytes,
not the ASCII dump. Add a new test macros which can check only part of
a console line.

Sometimes it is useful to skip a line altogether, so add a macro for that
also.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-08-07 22:31:32 -04:00
Tom Rini
7d914bc76b Merge branch '2020-08-07-mkimage-improvements'
- Assorted mkimage improvements related to FIT images and verified boot
2020-08-07 11:56:34 -04:00
Patrick Oppenlander
c995d854ef mkimage: fit: fix import of external data
The external data is located after the mmapped FDT pointed to by
'old_fdt', not in the newly created FDT we are importing into at 'fdt'.

Signed-off-by: Patrick Oppenlander <patrick.oppenlander@gmail.com>
2020-08-07 11:47:18 -04:00
Patrick Oppenlander
ef40129c33 mkimage: fit: include image cipher in configuration signature
This patch addresses issue #2 for signed configurations.

-----8<-----

Including the image cipher properties in the configuration signature
prevents an attacker from modifying cipher, key or iv properties.

Signed-off-by: Patrick Oppenlander <patrick.oppenlander@gmail.com>
Reviewed-by: Philippe Reynes <philippe.reynes@softathome.com>
2020-08-07 11:47:18 -04:00
Patrick Oppenlander
b33e5cc182 mkimage: fit: don't cipher ciphered data
Previously, mkimage -F could be run multiple times causing already
ciphered image data to be ciphered again.

Signed-off-by: Patrick Oppenlander <patrick.oppenlander@gmail.com>
Reviewed-by: Philippe Reynes <philippe.reynes@softathome.com>
2020-08-07 11:47:18 -04:00
Patrick Oppenlander
04aeebb131 mkimage: fit: handle FDT_ERR_NOSPACE when ciphering
Also replace fdt_delprop/fdt_setprop with fdt_setprop as fdt_setprop can
replace an existing property value.

Signed-off-by: Patrick Oppenlander <patrick.oppenlander@gmail.com>
Reviewed-by: Philippe Reynes <philippe.reynes@softathome.com>
2020-08-07 11:47:18 -04:00
Patrick Oppenlander
c520266f9a mkimage: fit: only process one cipher node
Previously mkimage would process any node matching the regex cipher.*
and apply the ciphers to the image data in the order they appeared in
the FDT. This meant that data could be inadvertently ciphered multiple
times.

Switch to processing a single cipher node which exactly matches
FIT_CIPHER_NODENAME.

Signed-off-by: Patrick Oppenlander <patrick.oppenlander@gmail.com>
Reviewed-by: Philippe Reynes <philippe.reynes@softathome.com>
2020-08-07 11:47:18 -04:00
Tom Rini
410cf5e05c Merge https://gitlab.denx.de/u-boot/custodians/u-boot-usb
- XHCI updates to support MIPS better
2020-08-06 23:09:32 -04:00
Tom Rini
ce2724909b Merge branch '2020-08-06-Kconfig-sram-options'
- Migrate a few SRAM related options to Kconfig, related cleanups.
2020-08-06 20:57:55 -04:00
Ovidiu Panait
276b6c943a common/board_r: Move blkcache_init call earlier in the boot sequence
blkcache_init manually relocates blkcache list pointers when
CONFIG_NEEDS_MANUAL_RELOC is enabled. However, it is called very late in
the boot sequence, which could be a problem if previous boot calls execute
blkcache operations with the non-relocated pointers. For example, mmc is
initialized earlier and might call blkcache_invalidate (in
mmc_select_hwpart()) when trying to load the environment from mmc via
env_load().

To fix this issue, move blkcache_init boot call earlier, before mmc gets
initialized.

Acked-by: Angelo Dureghello <angelo.dureghello@timesys.com>
Tested-by: Angelo Dureghello <angelo.dureghello@timesys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
2020-08-06 18:08:47 -04:00
Ovidiu Panait
365af27f0d blkcache: Extend blkcache_init to cover CONFIG_NEEDS_MANUAL_RELOC
Extend manual relocation of block_cache list pointers to all platforms that
enable CONFIG_NEEDS_MANUAL_RELOC. Remove m68k-specific checks and provide a
single implementation that adds gd->reloc_off to the pre-relocation
pointers.

Acked-by: Angelo Dureghello <angelo.dureghello@timesys.com>
Tested-by: Angelo Dureghello <angelo.dureghello@timesys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Eric Nelson <eric@nelint.com>
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
[trini: Add guard around DECLARE_GLOBAL_DATA_PTR to avoid size growth]
Signed-off-by: Tom Rini <trini@konsulko.com>
2020-08-06 18:08:22 -04:00
Ovidiu Panait
bf2fb81ad3 common/board_r: Remove initr_serial wrapper
Remove the initr_serial->serial_initialize indirection and call
serial_initialize directly.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
2020-08-06 14:27:27 -04:00
Ovidiu Panait
39a192231b drivers: serial: Make serial_initialize return int
serial_initialize is called only during the common init sequence, after
relocation (in common/board_r.c). Because it has a void return value, it
has to wrapped in initr_serial. In order to be able to get rid of this
indirection, make serial_initialize return int.

Remove extern from prototype in order to silence the following checkpatch
warning:
check: extern prototypes should be avoided in .h files

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
2020-08-06 14:27:27 -04:00
Ovidiu Panait
3a4b52a9e5 dm: blk: Use IS_ENABLED() instead of #ifdefs in blk_post_probe
Use IS_ENABLED() instead of #ifdef in blk_post_probe function.

No functional change intended.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
[trini: Fix thinko and use CONFIG_HAVE_BLOCK_DEVICE in IS_ENABLED()]
Signed-off-by: Tom Rini <trini@konsulko.com>
2020-08-06 14:26:50 -04:00
Ovidiu Panait
1532885c45 board_f: Remove setup_board_part1
Now that all arch specific code was converted to setup_bdinfo, we can
remove setup_board_part1.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
2020-08-06 14:26:35 -04:00
Ovidiu Panait
f1e504a3ea board_f: ppc: Factor out ppc-specific bdinfo setup
Factor out ppc-specific bdinfo setup from generic init sequence to
arch_setup_bdinfo in arch/powerpc/lib/bdinfo.c.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
2020-08-06 14:26:35 -04:00
Ovidiu Panait
ee9c3adc85 board_f: m68k: Factor out m68k-specific bdinfo setup
Factor out m68k-specific bdinfo setup to arch_setup_bdinfo in
arch/m68k/lib/bdinfo.c. Also, use if(IS_ENABLED()) instead of #ifdef where
possible.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
2020-08-06 14:26:35 -04:00
Ovidiu Panait
4912224216 board_f: Move sram bdinfo assignments to generic code
Move sram related bdinfo from arch-specific setup_board_part1 to generic
code in setup_bdinfo. Also use "if (IS_ENABLED(CONFIG_SYS_HAS_SRAM))"
instead of "#ifdef CONFIG_SYS_SRAM_BASE".

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
2020-08-06 14:26:35 -04:00
Ovidiu Panait
a4aa188948 board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo
Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.

Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.

For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.

Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-06 14:26:35 -04:00
Ovidiu Panait
81e7cb1e71 board_f: Introduce arch_setup_bdinfo initcall
Certain architectures (ppc, mips, sh, m68k) use setup board_part1 and
setup_board_part2 calls during pre-relocation init to populate gd->bd
boardinfo fields. This makes the generic init sequence cluttered with
arch-specific ifdefs.

In order to clean these arch-specific sequences from generic init,
introduce arch_setup_bdinfo weak initcall so that everyone can define their
own bdinfo setup routines.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
2020-08-06 14:26:35 -04:00
Ovidiu Panait
ba7431031f board_f: Introduce setup_bdinfo initcall
Introduce setup_bdinfo initcall as a generic routine to populate bdinfo
fields.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
2020-08-06 14:26:35 -04:00
Ovidiu Panait
6ecefcfb6d cmd: bdinfo: Move sram info prints to generic code
bi_sramstart and bi_sramsize are generic members of the bd_info structure,
so move the m68k/powerpc-specific prints to generic code. Also, print them
only if SRAM support is enabled via CONFIG_SYS_HAS_SRAM.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
2020-08-06 14:26:35 -04:00
Ovidiu Panait
9a17bfb642 Kconfig: Remove CONFIG_SYS_SRAM_START
Remove ad-hoc CONFIG_SYS_SRAM_START and use CONFIG_SYS_SRAM_BASE instead.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
2020-08-06 14:26:35 -04:00
Ovidiu Panait
9f63f02755 Kconfig: Convert CONFIG_SYS_SRAM_SIZE to Kconfig
This converts ad-hoc CONFIG_SYS_SRAM_SIZE to Kconfig.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
2020-08-06 14:26:35 -04:00
Ovidiu Panait
dd084b0a37 Kconfig: Convert CONFIG_SYS_SRAM_BASE to Kconfig
This converts ad-hoc CONFIG_SYS_SRAM_BASE to Kconfig.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
2020-08-06 14:26:35 -04:00
Ovidiu Panait
7be19313b3 Kconfig: Introduce CONFIG_SYS_HAS_SRAM
In order to be able to replace "#ifdef CONFIG_SYS_SRAM_BASE" sequences
with the IS_ENABLED() equivalent, introduce a new boolean Kconfig option
that signals whether the platform has SRAM support.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
2020-08-06 14:26:35 -04:00
Tom Rini
99c6953809 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-marvell
- Cleanup in Marvell bubt cmd (Tom & Jagan)
- Add a series of MikroTik CRS3xx, 98DX3236 based switches (Luka)
2020-08-06 11:06:02 -04:00
Tom Rini
96be2f0727 mvebu: bubt: Drop dead code
The code around CONFIG_SYS_MMC_ENV_PART has been untested since merge.
This can be seen by it referencing 'mmc->part_num' which was migrated
elsewhere prior to this code being merged.

Cc: Joel Johnson <mrjoel@lixil.net>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Stefan Roese <sr@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-08-06 14:12:14 +02:00
Luka Kovacic
14133650d8 arm: mvebu: Update CRS305-1G-4S board flash layout
Update the MikroTik CRS305-1G-4S flash layout to support redundant UBI
partitions.
Additionally enable the UBI commands in crs305-1g-4s_defconfig.

Signed-off-by: Luka Kovacic <luka.kovacic@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Cc: Jakov Petrina <jakov.petrina@sartura.hr>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-08-06 14:12:14 +02:00
Luka Kovacic
58091ee55b arm: mvebu: crs3xx-98dx3236: Add a maintainer
Add Luka Perkov to CRS3xx-98DX3236 MAINTAINERS.

Signed-off-by: Luka Kovacic <luka.kovacic@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Cc: Jakov Petrina <jakov.petrina@sartura.hr>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-08-06 14:12:14 +02:00
Luka Kovacic
537eaf4ea7 arm: mvebu: Add CRS328-4C-20S-4S board
MikroTik CRS328-4C-20S-4S board has a switch chip with an integrated
Marvell Prestera 98DX3236 CPU.

This commit includes two board variants, namely the factory
default one and a Bit variant. The Bit board variant has a
bigger Macronix flash.

Add basic U-Boot, UART and SPI flash support.

Signed-off-by: Luka Kovacic <luka.kovacic@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Cc: Jakov Petrina <jakov.petrina@sartura.hr>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-08-06 14:12:14 +02:00
Luka Kovacic
d4cc179fcd arm: mvebu: Add CRS326-24G-2S board
MikroTik CRS326-24G-2S board has a switch chip with an integrated
Marvell Prestera 98DX3236 CPU.

This commit includes two board variants, namely the factory
default one and a Bit variant. The Bit board variant has a
bigger Macronix flash.

Add basic U-Boot, UART and SPI flash support.

Signed-off-by: Luka Kovacic <luka.kovacic@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Cc: Jakov Petrina <jakov.petrina@sartura.hr>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-08-06 14:12:14 +02:00
Luka Kovacic
a263df59be arm: mvebu: Add CRS305-1G-4S Bit board
MikroTik CRS305-1G-4S Bit board has a switch chip with an integrated
Marvell Prestera 98DX3236 CPU.

The Bit board variant is added, which has a bigger Macronix flash.

Add basic U-Boot, UART and Winbond SPI flash support.

Signed-off-by: Luka Kovacic <luka.kovacic@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Cc: Jakov Petrina <jakov.petrina@sartura.hr>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-08-06 14:12:14 +02:00
Jagan Teki
7a7f3219a7 cmd: mvebu/bubt: Drop unused SPI_FLASH_PROTECTION
SPI_FLASH_PROTECTION config item is never used in anywhere
in the U-Boot tree.

Drop it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-08-06 14:12:14 +02:00
Tom Rini
1521326b7a Azure/Travis: Update to latest Docker image
- New bionic snapshot
- Updated sbsigntool
- Include SH4 in qemu

Signed-off-by: Tom Rini <trini@konsulko.com>
2020-08-05 19:28:49 -04:00
Tom Rini
89150a9314 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-sh
- r2dplus updates
2020-08-05 16:06:42 -04:00
Tom Rini
635dfee2cb Merge branch '2020-08-05-misc-fixes'
- A large number of assorted fixes and minor improvements
2020-08-05 16:05:33 -04:00
Simon Glass
7b27e0fe13 tools: env: Avoid an uninited warning with was_locked
Set this variable to 0 to avoid a warning about an unused variable. This
happens on gcc 7.5.0 for me.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-08-05 08:18:34 -04:00
Simon Glass
d9cd4d2a8d tools: env: Fix printf() warning in fw_env
The printf() string produces a warning about %d not matching size_t. Fix
it and put the format string on one line to avoid a checkpatch warning.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-08-05 08:18:34 -04:00
Icenowy Zheng
7f772fbcc0 ARM: add Kconfig option for PSCI 0.1
We still have some platforms that only implements functionalities in
PSCI 0.1 (e.g. Allwinner ARMv7 SoCs).

Add a Kconfig option for exporting only PSCI 0.1. The code to export
PSCI 0.1 is still available and gets activated by this patch.

In addition, default ARCH_SUNXI U-Boot PSCI implementation to export
PSCI 0.1, to fix poweroff/reboot regression on Allwinner multi-core
ARMv7 SoCs.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
2020-08-05 08:18:34 -04:00
Heinrich Schuchardt
5ce2776ae6 cmd: bdinfo: cleanup phys_addr_t output
We currently print the memory size with at least 8 hexadecimal digits.
This creates a ragged output on 64 bit boards, e.g. on a Kendryte K210:

DRAM bank   = 0x0000000000000002
-> start    = 0x0000000080600000
-> size     = 0x0000000000200000
memstart    = 0x0000000000000000
memsize     = 0x00000000
flashstart  = 0x0000000000000000
flashsize   = 0x0000000000000000
flashoffset = 0x0000000000000000

All other numbers are printed with the number of digits needed for the type
ulong. So use this value as minimum number of digits (precision) for
printing physical addresses.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-05 08:18:34 -04:00
Baruch Siach
f2d58f3bda cmd: bootz: fix device-tree overlap test
The address of the kernel image is stored in images->ep. zi_start is the
offset of execution entry in the image, which is usually 0 for ARM
zImage.

Fixes boot error when ftd is stored near RAM address 0x0:

ERROR: FDT image overlaps OS image (OS=0x0..0x5fd608)

Fixes: fbde7589ce ("common: bootm: add checks to verify if ramdisk / fdtimage overlaps OS image")
Cc: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
2020-08-05 08:18:34 -04:00
Fabio Estevam
aaa91a4e4b fit_image: Use calloc() to fix reproducibility issue
Vagrant Cascadian reported that mx6cuboxi target no longer builds
reproducibility on Debian.

One example of builds mismatches:

00096680: 696e 6700 736f 756e 642d 6461 6900 6465  ing.sound-dai.de
-00096690: 7465 6374 2d67 7069 6f73 0000            tect-gpios..
+00096690: 7465 6374 2d67 7069 6f73 0061            tect-gpios.a

This problem happens because all the buffers in fit_image.c are
allocated via malloc(), which does not zero out the allocated buffer.

Using calloc() fixes this unpredictable behaviour as it guarantees
that the allocated buffer are zero initialized.

Reported-by: Vagrant Cascadian <vagrant@reproducible-builds.org>
Suggested-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Tested-by: Vagrant Cascadian <vagrant@reproducible-builds.org>
2020-08-05 08:18:34 -04:00
Stefan Roese
b5152a653d usb: xhci: Add virt_to_phys() to support mapped platforms
Some platforms, like MIPS Octeon, use mapped addresses (virtual address
!= physical address). On these platforms we need to make sure, that the
local virtual addresses are converted to physical (DMA) addresses for
the xHCI controller. This patch adds the missing virt_to_phys() calls,
so that the correct addresses are used.

Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Marek Vasut <marex@denx.de>
2020-08-05 09:30:46 +02:00
Stefan Roese
d96f6e1c0b usb: usb-uclass.c: Drop le16_to_cpu() as values are already swapped
These values are already swapped to CPU endianess, so swapping them
again is a bug. Let's remove the swap here instead.

Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Marek Vasut <marex@denx.de>
2020-08-05 09:30:46 +02:00
Stefan Roese
61a1acb55e usb: xhci: xhci_mem_init: Use cpu_to_le64() and not xhci_writeq()
xhci_writeq() makes the CPU->LE swapping only when addressing registers
in the xHCI controller address range and not in the local memory (RAM).
We need to use cpu_to_le64() here to ensure that the conversion is done
correctly.

Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Marek Vasut <marex@denx.de>
2020-08-05 09:30:46 +02:00
Stefan Roese
543eb12ecd usb: xhci: Add missing endian conversions (cpu_to_leXX / leXX_to_cpu)
While trying to use the U-Boot xHCI driver on the MIPS Octeon platform,
which is big endian, I noticed that the driver is missing a few endian
conversion calls. This patch adds these missing endian conversion
calls.

Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Marek Vasut <marex@denx.de>
2020-08-05 09:30:46 +02:00
Brian Moyer
dfd2390dff arm: Add SPL build check to SPL early bss clear
SPL_CLEAR_BSS is called regardless of build type if
CONFIG_SPL_EARLY_BSS is defined. Add a guard for CONFIG_SPL_BUILD
to fix.

Signed-off-by: Brian Moyer <bdm310@gmail.com>
2020-08-04 23:30:02 -04:00
Heinrich Schuchardt
7f89e85631 doc: move Clang documentation to HTML
* Move README.clang to doc/build/clang.rst and reformat as
  reStructeredText.
* Indicate that -ffixed-r9 and -ffixed-x18 are used to reserve registers
  for gd.
* Minor editing.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-08-04 23:30:02 -04:00
Michal Simek
171fd224ae pinctrl: aspeed: Fix Kconfig entry indentation
Fix Kconfig entry indentation for Aspeed ast2500 pin control driver.

Fixes: 4f0e44e466 ("aspeed: AST2500 Pinctrl Driver")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-04 23:30:02 -04:00
Michal Simek
36766d39e8 Makefile.lib: Build all DTS with -@ if OF_LIBFDT_OVERLAY is enabled
The commit 47818e23a2 ("Makefile.lib: include /__symbols__ in dtb if
SPL_LOAD_FIT_APPLY_OVERLAY is enabled") enables DT building as overlays
based on symbols which depends on SPL. But there is already an option to
apply overlays in full U-Boot too.
And there are platforms which are not using SPL and there is no option to
build DTs with -@ parameter.
That's why change dependency on OF_LIBFDT_OVERLAY which is already symbol
which is selected when SPL_LOAD_FIT_APPLY_OVERLAY is enabled but also
adding support for platforms which don't enable SPL and want to work with
overlays on U-Boot prompt.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-04 23:30:02 -04:00
Michal Simek
a965f4dfb5 dt-bindings: Sync include/dt-bindings/phy/phy.h from Linux
Add 4 new phy types which are present in Linux kernel.
DP and SGMII types are used on Xilinx ZynqMP devices.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-08-04 23:30:02 -04:00
Stephen Warren
2d8e102cd2 fixdep: fix coding style in previous fix
Remove a double space introduced by my previous fixdep fix.

Fixes: 76ae74d348 ("fixdep: fix CONFIG_IS_ENABLED etc. handling")
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2020-08-04 23:30:02 -04:00
Yan Liu
c9db1a103c test/py: Add test support for three stage boot
Current pytest only support upto 2 stage boot;
Some boards like TI K3 am6/J7 boards use 3 stage
boot. This patch adds u_boot_spl2 to be able to
handle the 3-stage boot case. User needs to set
"env__spl2_skipped" in u_boot_boardenv config
file to use this support. By default it is set
to TRUE.

Signed-off-by: Yan Liu <yan-liu@ti.com>
Signed-off-by: Yan Liu <yan-liu@ti.com>
2020-08-04 23:30:02 -04:00
Jonas Smedegaard
44758771ee arm: move CONFIG_PREBOOT="usb start" to KConfig
This commit moves CONFIG_PREBOOT="usb start" to common/KConfig
for all boards also declaring USB_KEYBOARD.

Besides simplifying defconfig files, this also enables support for
board-specific CONFIG_PREBOOT for sunxi boards:
commit 37304aaf60 ("Convert CONFIG_USE_PREBOOT and CONFIG_PREBOOT to
Kconfig") intended to support CONFIG_PREBOOT, but
include/configs/sunxi-common.h hardcodes preboot as part of internally
defined CONSOLE_STDIN_SETTINGS, silently ignoring any board-specific
CONFIG_PREBOOT.

Signed-off-by: Jonas Smedegaard <dr@jones.dk>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Series-Cc: Jagan Teki <jagan@amarulasolutions.com>
Series-Cc: Lukasz Majewski <lukma@denx.de>
Series-Cc: Andre Przywara <andre.przywara@arm.com>
2020-08-04 23:30:02 -04:00
Marek Szyprowski
def7a5c00f net: ping: reset stored IP address
Reset the stored ping IP address before entering a netloop with different
protocol to ensure that it won't be interrupted by the received
correct ICMP_ECHO_REPLY packet.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
2020-08-04 23:30:02 -04:00
Patrick Delaunay
a08f2f7b94 net: dwc_eth_qos: add Kconfig option to select supported configuration
Add configuration flag to select the supported dwc driver configuration:
- CONFIG_DWC_ETH_QOS_TEGRA186
- CONFIG_DWC_ETH_QOS_IMX
- CONFIG_DWC_ETH_QOS_STM32

See Linux driver ethernet/stmicro/stmmac and associated glue layers
for other configuration examples.

This patch removes the not-selected compatibles and lets the linker remove
the unused functions to reduce the size of the driver.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-08-04 23:30:02 -04:00
Tero Kristo
9996cea75f lmb/bdinfo: dump lmb info via bdinfo
Dump lmb status from the bdinfo command. This is useful for seeing the
reserved memory regions from the u-boot cmdline.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
2020-08-04 23:30:02 -04:00
Ramon Fried
cc6b87ecaa net: tftp: Add client support for RFC 7440
Add support for RFC 7440: "TFTP Windowsize Option".

This optional feature allows the client and server
to negotiate a window size of consecutive blocks to send as an
alternative for replacing the single-block lockstep schema.

windowsize can be defined statically during compilation by
setting CONFIG_TFTP_WINDOWSIZE, or defined in runtime by
setting an environment variable: "tftpwindowsize"
If not defined, the windowsize is set to 1, meaning that it
behaves as it was never defined.

Choosing the appropriate windowsize depends on the specific
network topology, underlying NIC.
You should test various windowsize scenarios and see which
best work for you.

Setting a windowsize too big can actually decreases performance.

Signed-off-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Marek Vasut <marex@denx.de>
2020-08-04 23:30:02 -04:00
Yann Gautier
5cc7df7eba psci: put psci_method in .data section if EFI_LOADER is not enabled
Move the variable psci_method in .data section when EFI is not
activated and the psci driver safely access it before relocation.

Without this patch the variable is located in .bss section
and the psci probe requested before relocation corrupts the device
tree (probe is requested by board_f.c::print_resetinfo()).

When EFI_LOADER is activated, this variable in already located in the
.data.efi_runtime section by __efi_runtime_data.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-08-04 23:30:02 -04:00
Doyle, Patrick
06fc4573b9 Fix corner case in bad block table handling.
In the unlikely event that both blocks 10 and 11 are marked as bad (on a
32 bit machine), then the process of marking block 10 as bad stomps on
cached entry for block 11.  There are (of course) other examples.

Signed-off-by: Patrick Doyle <pdoyle@irobot.com>
Reviewed-by: Richard Weinberger <richard@nod.at>
2020-08-04 23:30:02 -04:00
John Chau
4a4830cf91 cmd: add clone command
This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.

Signed-off-by: John Chau <john@harmon.hk>
2020-08-04 23:29:59 -04:00
Jason Wessel
5b3ddb17ba fs/fat/fat.c: Do not perform zero block reads if there are no blocks left
While using u-boot with qemu's virtio driver I stumbled across a
problem reading files less than sector size.  On the real hardware the
block reader seems ok with reading zero blocks, and while we could fix
the virtio host side of qemu to deal with a zero block read instead of
crashing, the u-boot fat driver should not be doing zero block reads
in the first place.  If you ask hardware to read zero blocks you are
just going to get zero data.  There may also be other hardware that
responds similarly to the virtio interface so this is worth fixing.

Without the patch I get the following and have to restart qemu because
it dies.
---------------------------------
=> fatls virtio 0:1
       30   cmdline.txt
=> fatload virtio 0:1 ${loadaddr} cmdline.txt
qemu-system-aarch64: virtio: zero sized buffers are not allowed
---------------------------------

With the patch I get the expected results.
---------------------------------
=> fatls virtio 0:1
       30   cmdline.txt
=> fatload virtio 0:1 ${loadaddr} cmdline.txt
30 bytes read in 11 ms (2 KiB/s)
=> md.b ${loadaddr} 0x1E
40080000: 64 77 63 5f 6f 74 67 2e 6c 70 6d 5f 65 6e 61 62    dwc_otg.lpm_enab
40080010: 6c 65 3d 30 20 72 6f 6f 74 77 61 69 74 0a          le=0 rootwait.

---------------------------------

Signed-off-by: Jason Wessel <jason.wessel@windriver.com>

Signed-off-by: Jason Wessel <jason.wessel@windriver.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2020-08-04 17:53:58 -04:00
Tom Rini
f1c0b7cd4b Merge tag 'u-boot-imx-20200804' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx
For 2020.10
-----------

- fixes for Toradex board
- fix warnings from previous PR
- HAB: reset instead of panic after failure
- new board:  MYiR Tech MYS-6ULX
- mx6cuboxi: use OF_PLATDATA
- further changes for DM

Travis: https://travis-ci.org/github/sbabic/u-boot-imx/builds/714513163
2020-08-04 11:11:02 -04:00
Tom Rini
993b59f045 Merge tag 'fixes-for-2020.10-rc1' of https://gitlab.denx.de/u-boot/custodians/u-boot-video
- Fix tbs2910 vidconsole environment
- Fix ipuv3 framebuffer output on i.MX6Q/D
2020-08-04 11:07:55 -04:00
Tom Rini
4d23857abd Merge https://gitlab.denx.de/u-boot/custodians/u-boot-riscv
- add DM based reset driver for SiFive SoC's.
2020-08-04 11:07:38 -04:00
Tom Rini
bb3694d5b1 Merge tag 'mips-pull-2020-08-03' of https://gitlab.denx.de/u-boot/custodians/u-boot-mips
- doc: fix qemu-mips build instructions
- MIPS: add GPIO, CLK and SPI drivers for Octeon MIPS64
2020-08-04 11:07:16 -04:00
Tom Rini
d6faedca76 Merge branch '2020-08-01-misc-cleanups'
- Further cleanup of common.h and dm.h usage in headers
2020-08-03 22:20:22 -04:00
Simon Glass
23552ba142 checkpatch: Don't allow common.h and dm.h in headers
These headers should not be included in other header files. Add a
checkpatch rule and test for this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-08-03 22:19:54 -04:00
Simon Glass
4620d46bf0 patman: Fix up the test comments
Many of the tests have the same comment and two have the same name. Fix
this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-08-03 22:19:54 -04:00
Simon Glass
a0558aca55 dm: core: Guard against including dm.h in header files
Header files generally should not include header files just for a struct,
since forward declarations work just as well and reduce overhead.

Add a warning for dm.h being included, since this has crept into U-Boot.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-08-03 22:19:54 -04:00
Simon Glass
41ba040e16 net: Drop duplicate include of dm.h in pcnet.c
This file includes the header twice. Drop the second one.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-08-03 22:19:54 -04:00
Simon Glass
f125e3cc12 net: Drop dm.h header file in eth_phy.h
This header file should not be included in other header files. Remove it
and use a forward declaration instead.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-08-03 22:19:54 -04:00
Simon Glass
fb989e0c6c clk: Drop dm.h header file in clk-provider.h
This header file should not be included in other header files. Remove it
and use a forward declaration and un-inlining of dev_get_clk_ptr()
instead.

Fix up the kendryte header files to avoid build errors.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
2020-08-03 22:19:54 -04:00
Simon Glass
161786259c usb: Drop dm.h header file
This header file should not be included in other header files. Remove it
and use a forward declaration instead.

Also move the inline function out into a C file. We should not include C
code in headers.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-08-03 22:19:54 -04:00
Simon Glass
98eb4ce592 ufs: Drop dm.h header file
This header file should not be included in other header files. Remove it
and use a forward declaration instead.

Also drop asm/io.h

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-08-03 22:19:54 -04:00
Simon Glass
4a953b1f7e nand: Drop dm.h header file
This header file should not be included in other header files. Remove it
and use a forward declaration instead.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-08-03 22:19:54 -04:00
Simon Glass
c273da0765 adc: Drop dm.h header file
This header file should not be included in other header files. Remove it
and use a forward declaration instead.

Drop the common.h inclusion also.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-08-03 22:19:54 -04:00
Simon Glass
dcd7c906d0 mscc: Drop dm.h header file
This header file should not be included in other header files. Remove it
from each one and use a forward declaration instead.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-08-03 22:19:54 -04:00
Simon Glass
153f269ebe mediatek: Drop dm.h header file
This header file should not be included in other header files. Remove it
and use a forward declaration instead.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-08-03 22:19:54 -04:00
Simon Glass
51a4a857b3 pci: Drop dm.h inclusion from header file
The layerscape header should not include dm.h so remove it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-08-03 22:19:54 -04:00
Simon Glass
dece7747e9 liebherr: Drop duplicate dm.h inclusion
We only need to include this header once. Drop the duplicate.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-08-03 22:19:54 -04:00
Simon Glass
0eddd24e89 ti: am654: Drop duplicate dm.h inclusion
We only need to include this header once. Drop the duplicate.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-08-03 22:19:54 -04:00
Simon Glass
8b69e629dc spi: Drop duplicate dm.h inclusion
We only need to include this header once. Drop the duplicate.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-08-03 22:19:54 -04:00
Simon Glass
4426632dc8 mmc: Drop duplicate dm.h inclusion
We only need to include this header once. Drop the duplicate.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-08-03 22:19:54 -04:00
Simon Glass
ad2f4ac39b power: Tidy up inclusion of regulator_common.h
This file should not include common.h and dm.h so remove them. Also move
the inclusion of this file to after the normal includes.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2020-08-03 22:19:54 -04:00
Simon Glass
e1e10f29f9 efi: Tidy up header includes
Two files relies on efi_driver.h to include common.h and dm.h which is
incorrect. The former should always be included in a non-host C file and
the latter should be included if driver model is used.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-08-03 22:19:54 -04:00
Simon Glass
411e9eb88c w1: Drop dm.h header file
This header file should not be included in other header files. Remove it
and use a forward declaration instead.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-08-03 22:19:54 -04:00
Simon Glass
055efe5690 thermal: Drop dm.h header file
This header file should not be included in other header files. Remove it
and use a forward declaration instead.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-08-03 22:19:54 -04:00
Simon Glass
a00867b47a sf: Drop dm.h header file from spi_flash.h
This header file should not be included in other header files. Remove it
and use a forward declaration instead.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-08-03 22:19:54 -04:00
Simon Glass
2a64ada78c net: Drop dm.h header file from phy.h
This header file should not be included in other header files. Remove it
and use other headers and C inclusions instead.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-08-03 22:19:54 -04:00
Simon Glass
c2848cc2c3 fs: fs-loader: Drop dm.h header file
This header file should not be included in other header files. Remove it
and use a forward declaration instead.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-08-03 22:19:54 -04:00
Simon Glass
0e1fad4382 dm: core: Drop header files from dm/test.h
These header file should not be included in other header files. Remove
them and add to each individual file. Add test/test.h to test/ui.h since
that is a reasonable place.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-08-03 22:19:54 -04:00
Simon Glass
82a7697b5a dm: core: Drop dm.h header file from dm-demo.h
This header file should not be included in other header files. Remove it
and add it to the cmd file instead.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-08-03 22:19:54 -04:00
Simon Glass
54234592df mtd: spi: Drop SPI_XFER_MMAP*
These two defines are no-longer supported. Drop them.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-08-03 22:19:54 -04:00
Simon Glass
340fd10e7b mtd: spi-mem: Drop dm.h header file
This header file should not be included in other header files. Remove it
and use a forward declaration instead.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-08-03 22:19:54 -04:00
Simon Glass
defce58181 wdt: Drop dm.h header file
This header file should not be included in other header files. Remove it
and use a forward declaration instead.

Also remove the other headers that are not needed, since the inline code
was removed in a recent commit:

   b4d9452c4 ("watchdog: move initr_watchdog() to wdt-uclass.c")

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-08-03 22:19:54 -04:00
Simon Glass
e567ec849a mtd: spi-nor: Tidy up error handling / debug code
The -ENODEV error value in spi_nor_read_id() is incorrect since there
clearly is a device - it just cannot be supported. Use -ENOMEDIUM instead
which has the virtue of being less common.

Fix the return value in spi_nor_scan().

Also there are a few printf() statements which should be debug() since
they bloat the code with unused strings at present. Fix those while here.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-08-03 22:19:54 -04:00
Simon Glass
f38a29997d spi: Allow separate control of SPI_FLASH_TINY for SPL/TPL
In some cases SPL needs to be able to erase but TPL just needs to read.
Allow these to have separate settings for SPI_FLASH_TINY.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-08-03 22:19:54 -04:00
Sagar Shrikant Kadam
ed50d3fae4 configs: reset: fu540: enable dm reset framework for SiFive
Add necessary defconfig and Kconfig entries to enable SiFive SoC's
reset driver so as to utilise U-Boot's reset framework.

Signed-off-by: Sagar Shrikant Kadam <sagar.kadam@sifive.com>
Reviewed-by: Pragnesh Patel <Pragnesh.patel@sifive.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Tested-by: Bin Meng <bin.meng@windriver.com>
2020-08-04 09:19:41 +08:00
Sagar Shrikant Kadam
d04a46426b sifive: reset: add DM based reset driver for SiFive SoC's
PRCI module within SiFive SoC's has register with which we can
reset the sub-systems within the SoC. The resets to DDR and ethernet
sub systems within FU540-C000 SoC are active low, and are hold low
by default on power-up. Currently these are directly asserted within
prci driver via register read/write.
With the DM based reset driver support here, we bind the reset
driver with clock (prci) driver and assert the reset signals of
both sub-system's appropriately.

Signed-off-by: Sagar Shrikant Kadam <sagar.kadam@sifive.com>
Reviewed-by: Pragnesh Patel <Pragnesh.patel@sifive.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Tested-by: Bin Meng <bin.meng@windriver.com>
2020-08-04 09:19:41 +08:00
Sagar Shrikant Kadam
ea4e9570eb fu540: dtsi: add reset producer and consumer entries
The resets to DDR and ethernet sub-system are connected to
PRCI device reset control register, these reset signals
are active low and are held low at power-up. Add these reset
producer and consumer details needed by the reset driver.

Signed-off-by: Sagar Shrikant Kadam <sagar.kadam@sifive.com>
Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
2020-08-04 09:19:41 +08:00
Sagar Shrikant Kadam
d2e4398637 fu540: prci: use common reset indexes defined in binding header
Indexes of reset signals available in PRCI driver are also
defined in include/dt-bindings/reset/sifive-fu540-prci.h.
So use those instead of defining new ones again within the
fu540-prci driver.

Signed-off-by: Sagar Shrikant Kadam <sagar.kadam@sifive.com>
Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
2020-08-04 09:19:41 +08:00
Sagar Shrikant Kadam
ef9f65f389 dt-bindings: prci: add indexes for reset signals available in prci
Add bit indexes for reset signals within the PRCI module
on FU540-C000 SoC.
The DDR and ethernet sub-system's have reset signals
indicated by these reset indexes.

Signed-off-by: Sagar Shrikant Kadam <sagar.kadam@sifive.com>
Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
2020-08-04 09:19:41 +08:00
Anatolij Gustschin
3ce83ee012 video: ipuv3: fix framebuffer base address init with multiple IPUs
Since commit 7812bbdc37 ("video: Correctly handle multiple
framebuffers") the vidconsole output is missing on the primary
display on boards with two IPU units (all i.MX6Q/D based boards).
The base address of the allocated framebuffer is not correctly
programmed in the display controller. Fix it.

Reported-by: Soeren Moch <smoch@web.de>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Tested-by: Soeren Moch <smoch@web.de>
2020-08-03 23:37:31 +02:00
Soeren Moch
645d39aea3 board: tbs2910: Fix video output with existing environments
Migration to DM_VIDEO changed the output device name (in stout, stderr)
from 'vga' to 'vidconsole'. This also was adapted in the default environment.
However, existing user defined environments still use 'vga'. Enable this
workaround to map the 'vga' name to 'vidconsole'. So we get HDMI video
output also with existing legacy environments.

Signed-off-by: Soeren Moch <smoch@web.de>
2020-08-03 23:36:50 +02:00
Stefan Roese
d071ff012e mips: octeon: Update EBB7304 defconfig
This patch enables the following options for the Octeon EBB7304 EVB:

- PCI & DM_PCI
- DM_SPI_FLASH & SPI flash device support
- SPI & Octeon SPI driver
- GPIO cmd support
- I2C cmd support

Signed-off-by: Stefan Roese <sr@denx.de>
2020-08-03 21:14:49 +02:00
Stefan Roese
1015540d70 mips: octeon: Update Octeon Kconfig
This patch selects DM_SPI & DM_I2C for MIPS Octeon. DM_GPIO, DM_SERIAL
and DM_ETH are already selected.

Additionally the selections are now alphabetically sorted.

Signed-off-by: Stefan Roese <sr@denx.de>
2020-08-03 21:14:48 +02:00
Stefan Roese
9044ed2c68 mips: octeon: mrvl, octeon-ebb7304.dts: Add SPI flash DT node
Add the SPI flash DT node for the EBB7304.

Signed-off-by: Stefan Roese <sr@denx.de>
2020-08-03 21:14:48 +02:00
Stefan Roese
1032491904 mips: octeon: mrvl,cn73xx.dtsi: Add SPI DT node
Add the Octeon SPI DT node to the dtsi file.

Signed-off-by: Stefan Roese <sr@denx.de>
2020-08-03 21:14:48 +02:00
Suneel Garapati
7853cc0598 drivers: spi: Add SPI controller driver for Octeon
Adds support for SPI controllers found on Octeon II/III and Octeon TX
TX2 SoC platforms.

Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>
Cc: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2020-08-03 21:14:48 +02:00
Stefan Roese
a078c65172 mips: octeon: dts: Add Octeon clock driver DT nodes
This patch adds the DT nodes for the Octeon clock support via the
common clk_ API.

Signed-off-by: Stefan Roese <sr@denx.de>
2020-08-03 21:11:41 +02:00
Stefan Roese
b113c9b570 clk: clk_octeon: Add simple MIPS Octeon clock driver
This patch adds a simple clock driver for the Marvell Octeon MIPS SoC
family. Its for IO clock rate passing via DT in some of the Octeon
driver, like I2C. So that we don't need to use the non-mainline API
octeon_get_io_clock().

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Lukasz Majewski <lukma@denx.de>
2020-08-03 21:11:41 +02:00
Stefan Roese
7ab932825d mips: octeon: dts: Add I2C DT nodes
Add I2C DT nodes to the Octeon dts / dtsi files.

Signed-off-by: Stefan Roese <sr@denx.de>
2020-08-03 21:11:41 +02:00
Stefan Roese
fad5ec5ecd mips: octeon: mrvl,cn73xx.dtsi: Add GPIO DT nodes
Add the Octeon GPIO DT node to the dtsi file.

Signed-off-by: Stefan Roese <sr@denx.de>
2020-08-03 21:11:41 +02:00
Suneel Garapati
f7331c65b8 gpio: octeon_gpio: Add GPIO controller driver for Octeon
Add support for GPIO controllers found on Octeon II/III and Octeon TX
TX2 SoC platforms.

Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2020-08-03 21:11:41 +02:00
Heinrich Schuchardt
260ebed704 doc: qemu-mips build instructions
Correct the make commands for the defconfigs.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-08-03 20:29:55 +02:00
Wig Cheng
3e980a2d8b configs: pico-imx6: convert ethernet function to DM_ETH
Before enable _DM_ETH:
    Net:   FEC [PRIME]

After enable DM_ETH:
    Net:   eth0: ethernet@2188000

Here is the test commands:
    => dhcp
    BOOTP broadcast 1
    DHCP client bound to address 10.88.88.152 (146 ms)
    *** ERROR: `serverip' not set
    Cannot autoload with TFTPGET
    => ping 8.8.8.8
    Using ethernet@2188000 device
    host 8.8.8.8 is alive

Signed-off-by: Wig Cheng <wig.cheng@technexion.com>
2020-08-03 17:03:57 +02:00
Peng Fan
b297c0d707 imx8m: enlarge CONFIG_SYS_BOOTM_LEN
Enlarge CONFIG_SYS_BOOTM_LEN when booting FIT image with AArch32 mode
Linux kernel.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-08-03 17:03:57 +02:00
Niel Fourie
a1c6aed1de arm: imx6q: pcm058: Rework SPI NOR configuration
Enable CONFIG_SPL_DM_SPI_FLASH to be able to boot from SPI NOR,
modify the offset of U-boot proper in the SPI NOR, so the
difference in offset matches between SPL and U-boot matches that of
the SD Card, allowing u-boot-with-spl.imx to also be copied to SPI
NOR at an offset of 0x400. Update the README to reflect this
change.

Signed-off-by: Niel Fourie <lusus@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
2020-08-03 17:03:57 +02:00
Marek Vasut
1e7a69f661 ARM: imx: hab: panic on authentication failure
Instead of hang()ing the system and thus disallowing any automated
recovery possibility from a HAB authentication failure, panic() .
The panic() function can be configured to hang() the system after
printing an error message, however the default is to reset the
system instead.

This allows redundant boot to work correctly. In case the primary
or secondary image cannot be authenticated, the system reboots and
bootrom can try to start the other one.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: NXP i.MX U-Boot Team <uboot-imx@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2020-08-03 17:03:57 +02:00
Parthiban Nallathambi
10e959a1ca imx: Add MYiR Tech MYS-6ULX support
MYS-6ULX is single board computer (SBC) comes with eMMC or NAND based
on imx6ULL SoC from NXP and provision for expansion board. This
commit adds support only for SBC with NAND.

CPU:   Freescale i.MX6ULL rev1.1 528 MHz (running at 396 MHz)
CPU:   Commercial temperature grade (0C to 95C) at 45C
Reset cause: WDOG
Model: MYiR i.MX6ULL MYS-6ULX Single Board Computer with NAND
Board: MYiR MYS-6ULX 6ULL Single Board Computer
DRAM:  256 MiB
NAND:  256 MiB
MMC:   FSL_SDHC: 0
In:    serial@2020000
Out:   serial@2020000
Err:   serial@2020000
Net:   FEC0

Working:
 - Eth0
 - MMC/SD
 - NAND
 - UART 1
 - USB host

Signed-off-by: Parthiban Nallathambi <parthiban@linumiz.com>
2020-08-03 17:03:57 +02:00
Tom Rini
68941e3b2c Merge https://gitlab.denx.de/u-boot/custodians/u-boot-x86
- ApolloLake: add u64 parameters support for FSP2 bindings
- ApolloLake: add missing parameters to support full configuration of
  the latest FSP MR6 release
- Append appropriate suffixes in various assembly codes
2020-08-03 10:25:47 -04:00
Tom Rini
4dc3ba568f Merge tag 'efi-2020-10-rc2' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi
Pull request for UEFI sub-system for efi-2020-10-rc2

This series comprises error corrections for the UEFI subsystem:

* make the memory size reserved for the U-Boot stack customizable
  and reduce it for the MAIX board
* correct build dependencies for UEFI unit test
* enable read-only UEFI variable are enabled with the TEE backend
* add 10 ms wait to sysreset to fix a problem with unit testing
2020-08-03 08:01:08 -04:00
Andy Shevchenko
940185910f x86: call32: Append appropriate suffixes
Assembler is not happy:

arch/x86/cpu/call32.S: Assembler messages:
arch/x86/cpu/call32.S:36: Warning: no instruction mnemonic suffix given and no register operands; using default for `retf'

Fix this by adding appropriate suffixes to the assembler commands.

Fixes: 6f92ed8f1a ("x86: Add a way to call 32-bit code from 64-bit mode")
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-08-03 10:46:56 +08:00
Andy Shevchenko
549c6f47e6 x86: sipi_vector: Append appropriate suffixes
Assembler is not happy:

arch/x86/cpu/sipi_vector.S: Assembler messages:
arch/x86/cpu/sipi_vector.S:134: Warning: no instruction mnemonic suffix given and no register operands; using default for `cmp'
arch/x86/cpu/sipi_vector.S:139: Warning: no instruction mnemonic suffix given and no register operands; using default for `bts'
arch/x86/cpu/sipi_vector.S:157: Warning: no instruction mnemonic suffix given and no register operands; using default for `cmp'

Fix this by adding appropriate suffixes to the assembler commands.

Fixes: 45b5a37836 ("x86: Add multi-processor init")
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-08-03 10:46:56 +08:00
Bernhard Messerklinger
a0186110af arch: x86: apl: Update FSP parameters
Add missing parameters to support full configuration of the latest FSP
MR6 release.

Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-03 10:46:56 +08:00
Bernhard Messerklinger
858e5a1a8b x86: apl: fsp_bindings: Add support for u64 parameters
Add FSP_UINT64 read support as preparation for FSP-M and FSP-S parameter
update.

Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-03 10:46:56 +08:00
Wolfgang Wallner
491135805e x86: irq: Fix some typos
Fix some typos in arch/x86/include/asm/irq.h.

Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-08-03 10:46:56 +08:00
Marek Vasut
5f52d6e908 sh: r2dplus: Enable additional PCI ethernet devices
Enable these extra PCI ethernet devices, so they can be tested in CI.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2020-08-02 19:58:27 +02:00
Marek Vasut
3adaa25476 sh: r2dplus: Enable DM_SERIAL and DM_CLK
Switch r2dplus to DM and DT probing for serial and clock.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2020-08-02 19:58:27 +02:00
Marek Vasut
f70ca794be sh: r2dplus: Add SCIF1 to the basic DT
Add simple DT and clock bindings to r2dplus DT to permit U-Boot
to bind the SCIF driver via DT probing instead of hard-coded
config options.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2020-08-02 19:58:27 +02:00
Marek Vasut
3223ca99ee sh: Set gd->malloc_base if MALLOC_F_LEN is set
The gd->malloc_base must be set before the C runtime if the MALLOC_F_LEN
is non-zero, otherwise we hit assertion in dlmalloc.c initf_malloc(). So
set it.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2020-08-02 19:58:26 +02:00
Marek Vasut
7bee46fd40 sh: r2dplus: Add pci enum to preboot
The ethernet on r2dplus is on PCI bus, enumerate the PCI early
to get the ethernet operational.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2020-08-02 17:09:59 +02:00
Marek Vasut
46a378b8e3 sh: r2dplus: Switch to DM ETH
Enable DM ethernet support for the board, now that rtl8139 is converted.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2020-08-02 17:09:59 +02:00
Walter Lozano
ae28d33cde mx6cuboxi: enable OF_PLATDATA
As both MMC and GPIO driver now supports OF_PLATDATA, enable it in
defconfig in order to reduce the SPL footprint. After applying this
setting the SPL reduction is 5 KB, which partially compensates the
increment due to DM.

Signed-off-by: Walter Lozano <walter.lozano@collabora.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-02 14:51:54 +02:00
Walter Lozano
24968d9e5f drivers: rename more drivers to match compatible string
Continuing with the approach in commit <addf358bac1d2bd0> rename
additional drivers to allow the OF_PLATDATA support.

Signed-off-by: Walter Lozano <walter.lozano@collabora.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-02 14:51:08 +02:00
Walter Lozano
7142ff9ec2 mmc: fsl_esdhc_imx: add CD support when OF_PLATDATA is enabled
After enabling OF_PLATDATA support to both MMC and GPIO drivers add the
support for card detection.

Signed-off-by: Walter Lozano <walter.lozano@collabora.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-02 14:50:59 +02:00
Walter Lozano
a2845c9eeb gpio: mxc_gpio: add OF_PLATDATA support
Continuing with the OF_PLATADATA support for iMX6 to reduce SPL
footprint, add it to mxc_gpio. Thanks to this, it will be possible to
enable card detection on MMC driver.

Signed-off-by: Walter Lozano <walter.lozano@collabora.com>
2020-08-02 14:50:29 +02:00
Walter Lozano
2372177864 mmc: fsl_esdhc_imx: add OF_PLATDATA support
In order to reduce the footprint of SPL by removing dtb and library
overhead, add OF_PLATDATA support to fsl_esdhc_imx. This initial
approach does not support card detection, which will be enabled after
adding OF_PLATDATA support to GPIO.

Signed-off-by: Walter Lozano <walter.lozano@collabora.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-02 14:28:37 +02:00
Walter Lozano
45154f07f8 mmc: fsl_esdhc_imx: rename driver name to match ll_entry
As discussed in commit <addf358bac1d2bd0> rename fsl_esdhc_imx
driver to allow the OF_PLATDATA support.

Signed-off-by: Walter Lozano <walter.lozano@collabora.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-02 14:28:28 +02:00
Heinrich Schuchardt
5c2227e495 efi_selftest: block device test requires CONFIG_DOS_PARTITION
Do not execute the block device test if CONFIG_DOS_PARTITION=n.

Imply CONFIG_DOS_PARTITION in Kconfig.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-08-01 11:58:39 +02:00
Heinrich Schuchardt
a1077bf582 efi_selftest: SNP test depends on network
If CONFIG_NET=n, testing the simple network protocol makes no sense.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-08-01 11:58:39 +02:00
Heinrich Schuchardt
e20a6e4479 dm: sysreset: wait after reset message
In our Python tests we expect to see the word "resetting". It may be
truncated if we reset before the serial console buffer is transferred.

Wait for 100 ms between the "resetting ..." message and the actual reset
like we do when powering off.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-08-01 11:58:39 +02:00
Heinrich Schuchardt
a9e5aa7972 configs: reduce stack size of Sipeed MAIX
The K210 has only 8 MiB RAM thereof 2 MiB reserved for AI.

Allow only 1 MiB for the stack.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-08-01 11:58:23 +02:00
Heinrich Schuchardt
74b869bae7 efi_loader: use CONFIG_STACK_SIZE in the UEFI sub-system
The Kconfig symbol CONFIG_STACK_SIZE is used both by ARM and Microblaze
with the same meaning. Move it to menu 'General setup' so that we can use
it for all architectures.

Use the value of CONFIG_STACK_SIZE instead of a hard coded 16 MiB value for
reserving memory in the UEFI sub-system.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-08-01 11:58:23 +02:00
Heinrich Schuchardt
4f0c4be1c3 x86: rename CONFIG_STACK_SIZE
Configuration variables should have the same meaning independent of the
architecture. x86 and ARM both use CONFIG_STACK_SIZE:

* x86: U-Boot's runtime stack size during reboot
* ARM: max stack size that can be used by U-Boot

Rename the x86 configuration variable to CONFIG_STACK_SIZE_REBOOT

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-08-01 11:58:23 +02:00
Ilias Apalodimas
e01aed47d6 efi_loader: Enable run-time variable support for tee based variables
We recently added functions for storing/restoring variables
from a file to a memory backed buffer marked as __efi_runtime_data
commit f1f990a8c9 ("efi_loader: memory buffer for variables")
commit 5f7dcf079d ("efi_loader: UEFI variable persistence")

Using the same idea we now can support GetVariable() and GetNextVariable()
on the OP-TEE based variables as well.

So let's re-arrange the code a bit and move the commmon code for
accessing variables out of efi_variable.c. Create common functions for
reading variables from memory that both implementations can use on
run-time. Then just use those functions in the run-time variants of the
OP-TEE based EFI variable implementation and initialize the memory
buffer on ExitBootServices()

Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-08-01 11:57:41 +02:00
Ilias Apalodimas
db94dfbd52 efi_loader: Trim output buffer size correctly for tee variables
The current code does not trim the output buffer correctly.
In fact it doesn't trim the buffer at all, since it calculates a wrong
value for it, which isn't even applied.
So let's remove the unused temporary size variable and trim the buffer
correctly.
Since we are editing efi_get_next_variable_name_int(), fix an indentation
error along the way.

Fixes: f042e47e8f ("efi_loader: Implement EFI variable handling via OP-TEE")
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>

Remove superfluous conversion to (u8 *) for memcpy argument.
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-08-01 11:57:41 +02:00
Tom Rini
a2d051e7b6 Merge branch '2020-07-31-more-env-updates'
- Fix EFI selftest to not force setting serial# environment (and also
  get the U-Boot prompt dynamically).
- Support for append only environment and other related features.
- Improved ext4 environment support
- Fix the case of fw_setenv being used on flash devices that were not
  already locked.
2020-07-31 10:13:07 -04:00
Ivan Mikhaylov
db82015929 fw_setenv: lock the flash only if it was locked before
With current implementation of fw_setenv, it is always locks u-boot-env
region if lock interface is implemented for such mtd device. You can
not control lock of this region with fw_setenv, there is no option for
it in config or in application itself. Because of this situation may
happen problems like in this thread on xilinx forum:
https://forums.xilinx.com/t5/Embedded-Linux/Flash-be-locked-after-use-fw-setenv-from-user-space
/td-p/1027851

A short summary of that link is: some person has issue with some spi
chip which has lock interface but doesn't locks properly which leads to
lock of whole flash memory on lock of u-boot-env region. As resulted
solution hack was added into spi-nor.c driver for this chip with lock
disablement.

Instead fix this problem by adding logic to fw_setenv only lock the
flash if it was already locked when we attempted to use it.

Signed-off-by: Ivan Mikhaylov <fr0st61te@gmail.com>
2020-07-31 10:13:00 -04:00
Marek Vasut
d045cbacf2 env: Add support for explicit write access list
This option marks any U-Boot variable which does not have explicit 'w'
writeable flag set as read-only. This way the environment can be locked
down and only variables explicitly configured to be writeable can ever
be changed by either 'env import', 'env set' or loading user environment
from environment storage.

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
2020-07-31 10:13:00 -04:00
Marek Vasut
47f3b1f243 env: Add option to only ever append environment
Add configuration option which prevents the environment hash table to be
ever cleared and reloaded with different content. This is useful in case
the first environment loaded into the hash table contains e.g. sensitive
content which must not be dropped or reloaded.

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
2020-07-31 10:13:00 -04:00
Marek Vasut
890feecaab env: Discern environment coming from external storage
Add another custom environment flag which discerns environment coming
from external storage from environment set by U-Boot itself.

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
2020-07-31 10:13:00 -04:00
Marek Vasut
ef9bef2bfe env: Add H_DEFAULT flag
Add another internal environment flag which indicates that the operation
is resetting the environment to the default one. This allows the env code
to discern between import of external environment and reset to default.

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
2020-07-31 10:13:00 -04:00
Marek Vasut
0f036bf4b8 env: Warn on force access if ENV_ACCESS_IGNORE_FORCE set
If the ENV_ACCESS_IGNORE_FORCE is set, inform user that the variable
cannot be force-set if such attempt happens.

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
2020-07-31 10:13:00 -04:00
Patrick Delaunay
ef5cc2e5c6 test: sandbox: add test for erase command
Add test for the erase command tested on ENV in EXT4.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-07-31 10:13:00 -04:00
Patrick Delaunay
0718f74327 env: ext4: add support of command env erase
Add support of opts erase for env in ext4,
this opts is used by command 'env erase'.

This command only fill the env file (CONFIG_ENV_EXT4_FILE)
with 0, the CRC and the saved environment becomes invalid.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-07-31 10:13:00 -04:00
Patrick Delaunay
f6de047e02 env: ext4: introduce new function env_ext4_save_buffer
Split the function env_ext4_save to prepare the erase support.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-07-31 10:13:00 -04:00
Patrick Delaunay
ad04576b27 test: environment in ext4
Add basic test to persistent environment in ext4:
save and load in host ext4 file 'uboot.env'.

On first execution an empty EXT4 file system is created in
persistent data dir: env.ext4.img.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-07-31 10:13:00 -04:00
Patrick Delaunay
72773c0655 configs: sandbox: activate command env select and env load
Add support of environment location with the new env command:
'env select' and 'env load'

The ENV backend is selected by priority order
- 0 = "nowhere" (default at boot)
- 1 = "EXT4"

To test EXT4 env support, this backend is selected by name:
> env select EXT4

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-07-31 10:13:00 -04:00
Patrick Delaunay
4df087ccf9 configs: sandbox: activate env in ext4 support
Activate ENV in EXT4 support in sandbox.

The sandbox behavior don't change; the default environment with
the nowhere backend (CONFIG_ENV_IS_NOWHERE)is still used:
the weak function env_get_location() return ENVL_NOWHERE for priority 0.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-07-31 10:13:00 -04:00
Patrick Delaunay
a97d22ebba cmd: env: add env select command
Add the new command 'env select' to force the persistent storage
of environment, saved in gd->env_load_prio.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-07-31 10:13:00 -04:00
Patrick Delaunay
0115dd3a6a cmd: env: add env load command
Add the new command env load to load the environment from
the current location gd->env_load_prio.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-07-31 10:13:00 -04:00
Patrick Delaunay
466d9855d4 env: the ops driver load becomes mandatory in struct env_driver
The ops driver load becomes mandatory in struct env_drive,
change the comment for this ops and remove unnecessary test.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-07-31 10:13:00 -04:00
Patrick Delaunay
ad3fec2364 env: nowhere: add .load ops
Add the ops .load for nowhere ENV backend to load the
default environment.

This ops is needed for the command 'env load'

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-07-31 10:13:00 -04:00
Patrick Delaunay
6d8d8400a2 env: correctly handle env_load_prio
Only update gd->env_load_prio in generic function env_load()
and no more in the weak function env_get_location() which is
called in many place (for example in env_driver_lookup, even
for ENVOP_SAVE operation).

This patch is a preliminary step to use env_driver_lookup()/
env_get_location() in new function env_select() without
updating gd->env_load_prio.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-07-31 10:13:00 -04:00
Patrick Delaunay
22140d16e5 env: sf: avoid space in backend name
Remove space in ENV backend name for SPI Flash (SF)
to avoid issue with env select command.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-07-31 10:13:00 -04:00
Patrick Delaunay
286fee5062 env: ext4: set gd->env_valid
Add a missing initialization of gd->env_valid in env_ext4_load
as it is already done in some other env device.

Set gd->env_valid = ENV_VALID in env_ext4_save() and env_ext4_load().

This patch allows to have a correct information in 'env info' command.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-07-31 10:13:00 -04:00
Patrick Delaunay
87dac74012 env: add absolute path at CONFIG_ENV_EXT4_FILE
Add the absolute path to the default value of
CONFIG_ENV_EXT4_FILE = "/uboot.env".

This patch avoid the error :
  Saving Environment to EXT4... File System is consistent
  Please supply Absolute path

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-07-31 10:13:00 -04:00
Patrick Delaunay
879369ea92 env: add prototypes for weak function
This patch adds prototypes for several weak functions:
- env_ext4_get_intf
- env_ext4_get_dev_part
- env_get_location

It solves the following warnings when compiling with W=1
on stm32mp1 board:

board/st/stm32mp1/stm32mp1.c:849:19: warning: no previous prototype for 'env_get_location' [-Wmissing-prototypes]
 enum env_location env_get_location(enum env_operation op, int prio)
                   ^~~~~~~~~~~~~~~~
board/st/stm32mp1/stm32mp1.c:876:13: warning: no previous prototype for 'env_ext4_get_intf' [-Wmissing-prototypes]
 const char *env_ext4_get_intf(void)
             ^~~~~~~~~~~~~~~~~
board/st/stm32mp1/stm32mp1.c:889:13: warning: no previous prototype for 'env_ext4_get_dev_part' [-Wmissing-prototypes]
 const char *env_ext4_get_dev_part(void)
             ^~~~~~~~~~~~~~~~~~~~~

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-07-31 10:13:00 -04:00
Tom Rini
8a5cdf601f test: efi_selftest: Do not force serial# setting
As part of the EFI self test we set and check the serial# variable.
However, we should not be forcing this setting.  In the case where we
are allowed to change the variable it will change, and we will pass the
test.  In the case where we cannot change it, force may or may not be
allowed, depending on further environment restrictions.  Drop the -f
flag here as we do not need it.

Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
2020-07-31 10:13:00 -04:00
Heinrich Schuchardt
87438b5e14 test: do not rely on => being the prompt
In our tests we should use the customized prompt for testing.

Reported-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Tested-by: Tom Rini <trini@konsulko.com>
2020-07-31 08:44:41 -04:00
Tom Rini
719f42190d Merge tag 'dm-pull-28jul20' of git://git.denx.de/u-boot-dm
Use binman instead of one of the Rockchip build scripts
Refactor to allow any arch to create SPI-flash images
New button uclass
2020-07-29 21:16:08 -04:00
Tom Rini
7cb2060b4e Merge https://gitlab.denx.de/u-boot/custodians/u-boot-stm
- fix SPL boot issue due to early dbgmcu_init() call
- fix SPL boot issue due to dcache memory region configuration
- add support of CONFIG_ENV_IS_IN_MMC
- add specific SD/eMMC partition for U-Boot enviromnent
- enable env in SPL
- use "env info -q" to remove log during boot
- remove env location override for dh_stm32mp1
- update management of misc_read
- check result of find_mmc_device in stm32prog
- use regulator_set_enable_if_allowed for disabling vdd supply in usbphyc
- enable CMD_ADTIMG flag to handle Android images
- device tree alignment with Linux Kernel v5.8-rc1
- remove hnp-srp-disable for usbotg on dk1
- add reset support to uart nodes on stm32mp15x
- use correct weak function name spl_board_prepare_for_linux
- use cd-gpios for ST and DHSOM boards
- add seeed studio odyssey-stm32mp157c board support
- move ethernet PHY into SoM DT
- add DHSOM based DRC02 board support
2020-07-29 16:30:45 -04:00
Tom Rini
8da75b1ddf Merge branch '2020-07-29-add-brcm-ns3-support'
- Add initial Broadcom NS3 SoC support.
2020-07-29 14:24:17 -04:00
Rayagonda Kokatanur
2ae7adc659 arch: arm: use dt and UCLASS_SYSCON to get gic lpi details
Use device tree and UCLASS_SYSCON driver to get
Generic Interrupt Controller (GIC) lpi address and
maximum GIC redistributors count.

Also update Kconfig to select REGMAP and SYSCON when
GIC_V3_ITS is enabled.

Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-29 10:37:11 -04:00
Rayagonda Kokatanur
a76bfe5693 arch: arm: use dt and UCLASS_IRQ to get gic details
Use device tree and UCLASS_IRQ driver to get following
Generic Interrupt Controller (GIC) details,

-GIC Distributor interface (GICD) base address and
-GIC Redistributors (GICR) base address.

Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-29 10:37:11 -04:00
Rayagonda Kokatanur
7aa17569b0 configs: ns3: enable tee and optee driver
Enable tee and optee drivers.

Signed-off-by: Vikas Gupta <vikas.gupta@broadcom.com>
Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-29 10:37:11 -04:00
Vikas Gupta
8ed6373d31 drivers: tee: broadcom: add optee based bnxt fw load driver
Add optee based bnxt fw load driver.
bnxt is Broadcom NetXtreme controller Ethernet card.
This driver is used to load bnxt firmware binary using OpTEE.

Signed-off-by: Vikas Gupta <vikas.gupta@broadcom.com>
Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-29 10:37:11 -04:00
Pramod Kumar
2a4326ab25 board: ns3: add development keys used in FIT
Add development keys used in FIT.

Signed-off-by: Pramod Kumar <pramod.kumar@broadcom.com>
Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-29 10:37:11 -04:00
Pramod Kumar
e14563db05 board: ns3: add FIT image its file
Add FIT image its file.

Signed-off-by: Pramod Kumar <pramod.kumar@broadcom.com>
Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-29 10:37:11 -04:00
Rayagonda Kokatanur
60f2387043 configs: ns3: enable FIT config
Enable FIT config for NS3.

Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-29 10:37:11 -04:00
Rayagonda Kokatanur
db3d7fd75a configs: ns3: enable sp805 watchdog driver
Enable sp805 watchdog driver for ns3.

Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-29 10:37:11 -04:00
Rayagonda Kokatanur
0af7459a5c configs: ns3: enable EXT4 and FAT fs support
Enable EXT4 and FAT fs support for ns3.

Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-29 10:37:11 -04:00
Rayagonda Kokatanur
ead1977a8c configs: ns3: enable gpt commands
Enable gpt commands for ns3.

Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-29 10:37:11 -04:00
Rayagonda Kokatanur
232ce3eb8f configs: ns3: enable mmc commands
Enable mmc commands for NS3.

Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-29 10:37:11 -04:00
Rayagonda Kokatanur
1180ac8ad4 configs: ns3: enable BCM IPROC mmc driver
Enable BCM IPROC mmc driver ns3.
Enable DMA for MMC Host to have better reads and writes.

Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-29 10:37:11 -04:00
Rayagonda Kokatanur
3ce0808625 dt-bindings: pinctrl: add ns3 pads definition
Add NS3 pads definitions.

Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-29 10:37:11 -04:00
Rayagonda Kokatanur
7bd238b92e configs: ns3: enable pinctrl driver
Enable pinctrl driver for ns3.

Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-29 10:37:11 -04:00
Rayagonda Kokatanur
912fe3768f gpio: do not include <asm/arch/gpio.h> on TARGET_BCMNS3
As no gpio.h is defined for this architecture, to avoid
compilation failure, do not include <asm/arch/gpio.h> for
arch bcmns3.

Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-29 10:37:11 -04:00
Rayagonda Kokatanur
a7090b42af drivers: gpio: add broadcom iproc gpio driver support
Add gpio driver support for Broadcom iproc-based socs.

Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Signed-off-by: Sheetal Tigadoli <sheetal.tigadoli@broadcom.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-29 10:37:11 -04:00
Rayagonda Kokatanur
1c085cc657 MAINTAINERS: update maintainers for broadcom ns3 platform
Update MAINTAINERS for broadcom ns3 platform (TARGET_NS3).

Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-29 10:37:11 -04:00
Rayagonda Kokatanur
89bb20bd38 doc: add README doc for bcmns3 platform
Add README doc for bcmns3 platform.

Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-29 10:37:11 -04:00
Bharat Gooty
e32a25e512 include/configs: ns3: add support for flashing images
Add support for flashing images into QSPI and eMMC.

Signed-off-by: Bharat Gooty <bharat.gooty@broadcom.com>
Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-29 10:37:11 -04:00
Bharat Gooty
d5ab69a9ab include/configs: ns3: add env variables for Linux boot
Add env variables and commands for booting Linux.

Signed-off-by: Bharat Gooty <bharat.gooty@broadcom.com>
Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-29 10:37:11 -04:00
Bharat Kumar Reddy Gooty
53a3e8d469 board: ns3: limit U-boot relocation within 16MB memory
By default relocation happens to a higher address of DDR,
i.e, DDR start + DDR size.

U-Boot shall be used to collect the ramdump.
Restrict U-Boot to use only the 16MB memory, so that this
memory can be reserved. Limit relocation to happen within
16MB memory, start 0xFF00_0000 and end 0x1_0000_0000

Signed-off-by: Bharat Kumar Reddy Gooty <bharat.gooty@broadcom.com>
Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-29 10:37:11 -04:00
Rayagonda Kokatanur
c8b98482d8 board: ns3: define ddr memory layout
Add both DRAM banks memory information and
the corresponding MMU page table mappings.

Signed-off-by: Bharat Kumar Reddy Gooty <bharat.gooty@broadcom.com>
Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-29 10:37:11 -04:00
Rayagonda Kokatanur
3edecba784 dt-bindings: memory: ns3: add ddr memory definition
Add ddr memory definitions.

Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-29 10:37:11 -04:00
Rayagonda Kokatanur
3683df97df configs: ns3: enable GIC_V3 ITS
Enables the Generic Interrupt Controller (GIC) V3
Interrupt Translation Service (ITS) Locality-specific Peripheral
Interrupts (LPI) configuration table and LPI table.

Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Signed-off-by: Bharat Kumar Reddy Gooty <bharat.gooty@broadcom.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-29 10:37:11 -04:00
Rayagonda Kokatanur
f01a4e8cc9 board: ns3: program GIC LPI tables
U-boot programs the GIC LPI configuration tables and enables
the LPI table.

Signed-off-by: Bharat Kumar Reddy Gooty <bharat.gooty@broadcom.com>
Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-29 10:37:10 -04:00
Rayagonda Kokatanur
b5a152e7ca board: ns3: default reset type to L3
Default "reset" from U-Boot to L3 reset.
"reset" command with argument will trigger L1 reset.

Signed-off-by: Rajesh Ravi <rajesh.ravi@broadcom.com>
Signed-off-by: Bharat Kumar Reddy Gooty <bharat.gooty@broadcom.com>
Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-29 10:13:41 -04:00
Abhishek Shah
ef7192e404 board: ns3: add api to save boot parameters passed from BL31
Add API to save boot parameters passed from BL31

Use assembly implementation of save_boot_params instead of c function.
Because generally ATF does not set up SP_EL2 on exiting.
Thus, usage of a C function immediately after exiting with no stack
setup done by ATF explicitly, may cause SP_EL2 to be not sane,
which in turn causes a crash if this boot was not lucky to get
an SP_EL2 in valid range. Replace C implementation with assembly one
which does not use stack this early, and let u-boot to set up its stack
later.

Signed-off-by: Abhishek Shah <abhishek.shah@broadcom.com>
Signed-off-by: Rajesh Ravi <rajesh.ravi@broadcom.com>
Signed-off-by: Vladimir Olovyannikov <vladimir.olovyannikov@broadcom.com>
Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-29 10:13:41 -04:00
Rayagonda Kokatanur
69d8acc30b dt-bindings: memory: ns3: add memory definitions
Add NS3 memory definitions.

Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-29 10:13:41 -04:00
Rayagonda Kokatanur
35871ef285 configs: ns3: enable clock subsystem
Enable clock subsystem for ns3.

Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-29 10:13:40 -04:00
Rayagonda Kokatanur
5d9302d478 arm: cpu: armv8: add L3 memory flush support
Add L3 memory flush support for NS3.

Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-29 10:13:40 -04:00
Rayagonda Kokatanur
291635aecf board: ns3: add support for Broadcom Northstar 3
Add support for Broadcom Northstar 3 SoC.
NS3 is a octo-core 64-bit ARMv8 Cortex-A72 processors
targeting a broad range of networking applications.

Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-29 10:13:40 -04:00
Tom Rini
423e08cb77 Merge branch '2020-07-28-misc-soc-improvements'
- Assorted MediaTek improvements
- s5p4418 support
- QEMU ARM platform improvements
- Qualcomm IPQ40xx support
2020-07-29 09:26:11 -04:00
David Woodhouse
3fad1ca28d board: mediatek: Add support for UniElec U7623 board
This is an MT7623A-based board, very similar to the Banana Pi R2.

http://www.unielecinc.com/q/news/cn/p/product/detail.html?qd_guid=OjXwKCaRlN

Signed-off-by: David Woodhouse <dwmw2@infradead.org>
2020-07-29 08:43:40 -04:00
David Woodhouse
368ac3f205 board: mediatek: Use CONFIG_DEFAULT_FDT_FILE for default environment
Rather than hard-coding it to the Banana Pi R2.

Signed-off-by: David Woodhouse <dwmw2@infradead.org>
2020-07-29 08:43:40 -04:00
David Woodhouse
e3cc511eef board: mediatek: fix mmc_get_boot_dev() for platforms without external SD
On the UniElec U7623 board there is no external SD slot and the preloader
doesn't fill in the magic field at 0x81dffff0 to indicate that it was
booted from eMMC.

Signed-off-by: David Woodhouse <dwmw2@infradead.org>
2020-07-29 08:43:40 -04:00
Stefan Bosch
b39cacc268 arm: add (default) config for nanopi2 board
Changes in relation to FriendlyARM's U-Boot nanopi2-v2016.01:
- Configuration changed, mainly several "CONFIG_..." moved from
  s5p4418_nanopi2.h to s5p4418_nanopi2_defconfig and USB related
  configs removed because USB is not supported yet.
- s5p4418_nanopi2.h: "CONFIG_" removed from several s5p4418/nanopi2
  specific defines because the appropriate values do not need to be
  configurable.
- pinctrl is supported now, therefore "CONFIG_PINCTRL=y" added to
  s5p4418_nanopi2_defconfig.

Signed-off-by: Stefan Bosch <stefan_b@posteo.net>
2020-07-29 08:43:40 -04:00
Stefan Bosch
d1611086e0 arm: add support for SoC s5p4418 (cpu) / nanopi2 board
Changes in relation to FriendlyARM's U-Boot nanopi2-v2016.01:
- SPL not supported yet --> no spl-dir in arch/arm/cpu/armv7/s5p4418/.
  Appropriate line in Makefile removed.
- cpu.c: '#include <cpu_func.h>' added.
- arch/arm/cpu/armv7/s5p4418/u-boot.lds removed, is not required
  anylonger.
- "obj-$(CONFIG_ARCH_NEXELL) += s5p-common/" added to
  arch/arm/cpu/armv7/Makefile since s5p-common/pwm.c is used instead
  of drivers/pwm/pwm-nexell.c.
- s5p4418.dtsi: '#include "../../../include/generated/autoconf.h"'
  removed, is not necessary, error at out-of-tree building.
  '#ifdef CONFIG_CPU_NXP4330'-blocks (2x) removed. Some minor changes
  regarding mmc. 'u-boot,dm-pre-reloc' added to dp0 because of added
  DM_VIDEO support.
- board/s5p4418/ renamed to board/friendlyarm/
- All s5p4418-boards except nanopi2 removed because there is no
  possibility to test the other boards.
- Kconfig: Changes to have a structure like mach-bcm283x (RaspberryPi),
  e.g. "config ..." entries moved from/to other Kconfig.
- "CONFIG_" removed from several s5p4418/nanopi2 specific defines
  because the appropriate values do not need to be configurable.
- nanopi2/board.c: All getenv(), getenv_ulong(), setenv() and saveenv()
  renamed to env_get(), env_get_ulong(), env_set() and env_save(),
  respectively. MACH_TYPE_S5P4418 is not defined anymore, therefore
  appropriate code removed (not necessary for DT-kernels).
- nanopi2/onewire.c: All crc8() renamed to crc8_ow() because crc8() is
  already defined in lib/crc8.c (with different parameters).
- dts: "nexell,s5pxx18-i2c" used instead of "i2c-gpio", i2c0 and
  i2c1 added. gmac-, ehci- and dwc2otg-entries removed because the
  appropriate functionality is not supported yet. New mmc-property
  "mmcboost" added.
  s5p4418-pinctrl.dtsi: gmac-entries removed, mmc- and i2c-entries
  added.
- '#ifdef CONFIG...' changed to 'if (IS_ENABLED(CONFIG...))' where
  possible (and similar).

Signed-off-by: Stefan Bosch <stefan_b@posteo.net>
2020-07-29 08:43:40 -04:00
Stefan Bosch
e1e96ba6a2 video: add nexell video driver (display/video driver)
Changes in relation to FriendlyARM's U-Boot nanopi2-v2016.01:
- nexell_display.c: Changed to DM, CONFIG_FB_ADDR can not be used
  anymore because framebuffer is allocated by video_reserve() in
  video-uclass.c. Therefore code changed appropriately.
- '#ifdef CONFIG...' changed to 'if (IS_ENABLED(CONFIG...))' where
  possible (and similar).
- livetree API (dev_read_...) is used instead of fdt one (fdt...).

Signed-off-by: Stefan Bosch <stefan_b@posteo.net>
2020-07-29 08:43:40 -04:00
Stefan Bosch
9c5d377583 video: add nexell video driver (soc: dpc, makefile)
Low level functions for DPC (Display Controller) and Makefile for all
nexell video low level functions.

Signed-off-by: Stefan Bosch <stefan_b@posteo.net>
2020-07-29 08:43:40 -04:00
Stefan Bosch
ee647449c0 video: add nexell video driver (soc: lvds, hdmi)
Low level functions for LVDS and HDMI display interfaces.

Signed-off-by: Stefan Bosch <stefan_b@posteo.net>
2020-07-29 08:43:40 -04:00
Stefan Bosch
6390378408 video: add nexell video driver (soc: mlc, mipi)
Low level functions for MLC (Multi Layer Control) and MIPI (Mobile
Industry Processor Interface).

Signed-off-by: Stefan Bosch <stefan_b@posteo.net>
2020-07-29 08:43:40 -04:00
Stefan Bosch
af65f28a3a video: add nexell video driver (soc: displaytop)
Low level functions for DisplayTop (Display Topology).

Signed-off-by: Stefan Bosch <stefan_b@posteo.net>
2020-07-29 08:43:40 -04:00
Stefan Bosch
18284c1d56 pwm: add driver for nexell
Changes in relation to FriendlyARM's U-Boot nanopi2-v2016.01:
- Since drivers/pwm/pwm-nexell.c is an adapted version of
  s5p-common/pwm.c an appropriately changed version of s5p-common/pwm.c
  is used instead. Therefore arch/arm/mach-s5pc1xx/include/mach/pwm.h
  copied to arch/arm/mach-nexell/include/mach and s5p-common/Makefile
  changed appropriately.
- '#ifdef CONFIG...' changed to 'if (IS_ENABLED(CONFIG...))' where
  possible (and similar).

Signed-off-by: Stefan Bosch <stefan_b@posteo.net>
2020-07-29 08:43:40 -04:00
Stefan Bosch
8d393b2c22 pinctrl: add nexell driver
Changes in relation to FriendlyARM's U-Boot nanopi2-v2016.01:
- livetree API (dev_read_...) is used instead of fdt one (fdt...).
- doc/device-tree-bindings/pinctrl/nexell,s5pxx18-pinctrl.txt added.

Signed-off-by: Stefan Bosch <stefan_b@posteo.net>
2020-07-29 08:43:40 -04:00
Stefan Bosch
8408318943 mmc: add nexell driver
Changes in relation to FriendlyARM's U-Boot nanopi2-v2016.01:
- driver changed to DM.
- pinctrl-driver/dt is used now instead of configuring the mmc I/O-pins
  in the mmc-driver.
- nexell_dwmmc_ofdata_to_platdata() reworked, i.e. valid default values
  are used now (where possible) and the appropriate if-blocks have
  been removed.
- new dt-property "mmcboost" is used now instead of "CONFIG_BOOST_MMC"
  which was not defined anywhere.

Signed-off-by: Stefan Bosch <stefan_b@posteo.net>
2020-07-29 08:43:40 -04:00
Stefan Bosch
c25e9e04a1 i2c: add nexell driver
Changes in relation to FriendlyARM's U-Boot nanopi2-v2016.01:
- i2c/nx_i2c.c: Some adaptions mainly because of changes in
  "struct udevice".
- several Bugfixes in nx_i2c.c.
- the driver has been for s5p6818 only. Code extended appropriately
  in order s5p4418 is also working.
- "probe_chip" added.
- pinctrl-driver/dt is used instead of configuring the i2c I/O-pins
  in the i2c-driver.
- '#ifdef CONFIG...' changed to 'if (IS_ENABLED(CONFIG...))' where
  possible (and similar).
- livetree API (dev_read_...) is used instead of fdt one (fdt...).

Signed-off-by: Stefan Bosch <stefan_b@posteo.net>
2020-07-29 08:43:40 -04:00
Stefan Bosch
b8f748d6f2 gpio: add nexell driver
Changes in relation to FriendlyARM's U-Boot nanopi2-v2016.01:
- livetree API (dev_read_...) is used instead of fdt one (fdt...).

Signed-off-by: Stefan Bosch <stefan_b@posteo.net>
2020-07-29 08:43:40 -04:00
Stefan Bosch
95e9a8e2cb arm: add mach-nexell (all files except header files)
Changes in relation to FriendlyARM's U-Boot nanopi2-v2016.01:
- SPL not supported yet --> no spl-directory in arch/arm/mach-nexell.
  Appropriate line in Makefile removed.
- clock.c: 'section(".data")' added to declaration of clk_periphs[] and
  core_hz.
- Kconfig: Changes to have a structure like in mach-bcm283x/Kconfig,
  e.g. "config ..." entries moved from other Kconfig.
- timer.c: 'section(".data")' added to declaration of timestamp and
  lastdec.
- arch/arm/mach-nexell/serial.c removed because this is for the UARTs
  of the S5P6818 SoC which is not supported yet. S5P4418 UARTs are
  different, here the (existing) PL011-code is used.
- '#ifdef CONFIG...' changed to 'if (IS_ENABLED(CONFIG...))' where
  possible (and similar).

Signed-off-by: Stefan Bosch <stefan_b@posteo.net>
2020-07-29 08:43:40 -04:00
Stefan Bosch
a1ce9ed063 arm: add mach-nexell (header files)
Changes in relation to FriendlyARM's U-Boot nanopi2-v2016.01:
- DM_VIDEO support (display_dev.h).
- boot0.h added, handles NSIH --> tools/nexell obsolete.
- gpio.h: Include-path to errno.h changed.

Signed-off-by: Stefan Bosch <stefan_b@posteo.net>
2020-07-29 08:43:40 -04:00
Ard Biesheuvel
2e2c2a5e72 arm: qemu: override flash accessors to use virtualizable instructions
Some instructions in the ARM ISA have multiple output registers, such
as ldrd/ldp (load pair), where two registers are loaded from memory,
but also ldr with indexing, where the memory base register is incremented
as well when the value is loaded to the destination register.

MMIO emulation under KVM is based on using the architecturally defined
syndrome information that is provided when an exception is taken to the
hypervisor. This syndrome information describes whether the instruction
that triggered the exception is a load or a store, what the faulting
address was, and which register was the destination register.

This syndrome information can only describe one destination register, and
when the trapping instruction is one with multiple outputs, KVM throws an
error like

  kvm [615929]: Data abort outside memslots with no valid syndrome info

on the host and kills the QEMU process with the following error:

  U-Boot 2020.07-rc3-00208-g88bd5b179360-dirty (Jun 06 2020 - 11:59:22 +0200)

  DRAM:  1 GiB
  Flash: error: kvm run failed Function not implemented
  R00=00000001 R01=00000040 R02=7ee0ce20 R03=00000000
  R04=7ffd9eec R05=00000004 R06=7ffda3f8 R07=00000055
  R08=7ffd9eec R09=7ef0ded0 R10=7ee0ce20 R11=00000000
  R12=00000004 R13=7ee0cdf8 R14=00000000 R15=7ff72d08
  PSR=200001d3 --C- A svc32
  QEMU: Terminated

This means that, in order to run U-Boot in QEMU under KVM, we need to
avoid such instructions when accessing emulated devices. For the flash
in particular, which is a hybrid between a ROM (backed by a read-only
KVM memslot) when in array mode, and an emulated MMIO device (when in
write mode), we need to take care to only use instructions that KVM can
deal with when they trap.

So override the flash read accessors that are used when running on QEMU
under KVM. Note that the the 64-bit wide read and write accessors have
been omitted: they are never used when running under QEMU given that it
does not emulate CFI flash that supports it.

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
2020-07-29 08:43:40 -04:00
Ard Biesheuvel
e93626521a arm: qemu: disable the EFI workaround for older GRUB
The QEMU/mach-virt targeted port of u-boot currently only runs on
QEMU under TCG emulation, which does not model the caches at all,
and so no users can exist that are relying on the GRUB hack for
EFI boot.

We will shortly enable support for running under KVM, but the GRUB
hack (which disables all caches without doing cache cleaning by VA
during ExitBootServices()) is likely to cause more problems than it
solves, given that KVM hosts require correct maintenance if they
incorporate non-architected system caches.

So let's disable the GRUB hack by default on the QEMU/mach-virt
port.

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-07-29 08:43:40 -04:00
Ard Biesheuvel
3fa914af82 arm: qemu: implement enable_caches()
Add an override for enable_caches to enable the I and D caches, along
with the cached 1:1 mapping of all of DRAM. This is needed for running
U-Boot under virtualization with QEMU/kvm.

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
2020-07-29 08:43:40 -04:00
Ard Biesheuvel
6a690c47ce arm: qemu: enable LPAE on 32-bit
QEMU's mach-virt machine only supports selecting CPU models that
implement the virtualization extensions, and are therefore guaranteed
to support LPAE as well.

Initially, QEMU would not allow emulating these CPUs running in HYP
mode (or EL2, for AArch64), but today, it also contains a complete
implementation of the virtualization extensions themselves.

This means we could be running U-Boot in HYP mode, in which case the
LPAE long descriptor page table format is the only format that is
supported. If we are not running in HYP mode, we can use either.

So let's enable CONFIG_ARMV7_LPAE for qemu_arm_defconfig so that we
get the best support for running with the MMU and caches enabled at
any privilege level.

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Acked-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-07-29 08:43:40 -04:00
Ard Biesheuvel
6744ace5b3 arm: enable allocate-on-read for LPAE's DCACHE_WRITEBACK/_WRITETHROUGH
The LPAE versions of DCACHE_WRITEBACK and DCACHE_WRITETHROUGH are currently
defined as no-allocate for both reads and writes, which deviates from the
non-LPAE definition, and mostly defeats the purpose of enabling the caches
in the first place.

So align LPAE with !LPAE, and enable allocate-on-read for both. And while
at it, add some clarification about the meaning of the chosen values.

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
2020-07-29 08:43:40 -04:00
Robert Marko
0c7eb6e525 msm_gpio: Add support for Qualcomm IPQ40xx
Snapdragon SoCs and IPQ40xx use common TLMM IP,
so existing driver supports IPQ40xx as well.

So lets simply add a compatible for IPQ40xx.

Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Reviewed-By: Ramon Fried <rfried.dev@gmail.com>
2020-07-29 08:43:40 -04:00
Robert Marko
185dcf7f56 msm_serial: Read bit rate register value from DT
IPQ40xx and currently supported Snapdragon boards don't use the same one
so enable reading it from DT, if no DT property is found default value
is the same as the previous define.

Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Reviewed-By: Ramon Fried <rfried.dev@gmail.com>
2020-07-29 08:43:40 -04:00
Robert Marko
e479a7d52e arm: Add support for Qualcomm IPQ40xx family
This introduces initial support for the popular Qualcomm
IPQ40x8 and IPQ40x9 WiSoC series.

IPQ40xx series have 4x Cortex A7 ARM-v7A cores.
Supported are: IPQ4018, IPQ4019, IPQ4028 and IPQ4029.

IPQ40x8 and IPQ40x9 use the same cores, but differ in
addressable RAM size (1GB for IPQ40x9 and 256MB for IPQ40x8)
and supported peripherals (IPQ40x8 lacks RGMII, LCD controller
and EMMC/SDHCI controllers).

IQP4028/IPQ4029 models differ from IPQ4018/IPQ4019 only
by their rated temperatures rates with IPQ402X models being
rated for wider temperature ranges.

Initially this supports:
* Simple clock driver (Only for UART1 now, will be extended)
* Pinctrl driver (Supports UARTX and GPIO now, will be extended)
* GPIOs already supported by msm_gpio driver with updates
* UARTs already supported by serial_msm driver with updates

Further peripherals will come in later patches.

Signed-off-by: Robert Marko <robert.marko@sartura.hr>
2020-07-29 08:43:40 -04:00
David Woodhouse
e05fdd9364 pinctrl: mediatek: add PUPD/R0/R1 support for MT7623
The pins for the MMC controller weren't being set up correctly because the
pinctrl driver only sets the GPIO pullup/pulldown config and doesn't
handle the special cases with PUPD/R0/R1 control.

Signed-off-by: David Woodhouse <dwmw2@infradead.org>
Tested-by: Frank Wunderlich <frank-w@public-files.de>
2020-07-29 08:43:40 -04:00
MarkLee
f5b441fcbe arm: dts: mediatek: enable sgmii mode and mt7531 switch for mt7629
This patch enable sgmii mode and mt7531 switch support in mt7629
ethernet dts node

Signed-off-by: MarkLee <Mark-MC.Lee@mediatek.com>
2020-07-28 22:44:00 -04:00
MarkLee
f0236b7015 eth: mtk-eth: enable mt7629 sgmii mode support in mediatek eth driver
The sgmii mode init flow is almost the same for all mediatek SoC, the
only difference is the register offset(SGMSYS_GEN2_SPEED) is 0x2028
in the old chip(mt7622) but changed to 0x128 for the newer chip(mt7629
and the following chips).

Signed-off-by: MarkLee <Mark-MC.Lee@mediatek.com>
2020-07-28 22:44:00 -04:00
Heinrich Schuchardt
b9390ce51c dm: remove superfluous comment for union ofnode_union
"future live tree" does not make sense anymore as we have CONFIG_OF_LIVE.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-07-28 19:30:39 -06:00
Philippe Reynes
1d310001dc test: dm: add a test for class button
Add a test to confirm that we can read button state
using the button-gpio driver.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2020-07-28 19:30:39 -06:00
Philippe Reynes
a6c6f0f0c8 test/py: add tests for the button commands
Adds tests for the button commands.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2020-07-28 19:30:39 -06:00
Philippe Reynes
5f9228691c sandbox: enable button
Enable the support of button (driver and command) on sandbox.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2020-07-28 19:30:39 -06:00
Philippe Reynes
626ebf71cc sandbox64: enable button
Enable the support of button (driver and command) on sandbox64.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2020-07-28 19:30:39 -06:00
Philippe Reynes
bd3e4882c7 sandbox: dtsi: add buttons
Adds two buttons on sandbox so button framework may be tested.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2020-07-28 19:30:39 -06:00
Philippe Reynes
325141a6ea cmd: button: add a new 'button' command
Adds a command 'button' that provides the list of buttons
supported by the board, and the state of a button.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2020-07-28 19:30:39 -06:00
Philippe Reynes
486b973ee9 dm: button: add a driver for button driven by gpio
Add a simple driver which allows use of buttons attached to GPIOs.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2020-07-28 19:30:39 -06:00
Philippe Reynes
30d66db787 dm: button: add an uclass for button
Add a new uclass for button that implements two functions:
- button_get_by_label
- button_get_status

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2020-07-28 19:30:39 -06:00
Philippe Reynes
037a56d6b1 sandbox, test: change hog gpio
Since commit 9ba84329dc ("sandbox, test: add test for GPIO_HOG
function"), the gpio_a 0,1,2 and 3 are used by hog in test.dts.
But 2 leds 'sandbox:red' and 'sandbox:green' are using gpio_a 0
and 1. As hog always request his gpios, the led command on both
led is broken:

=> led sandbox:red
LED 'sandbox:red' not found (err=-16)

The gpio is already requested by hog, so it can't be enabled
for led 'sandbox:red'.

This commit change the gpio used by hog to 10, 11, 12 and 13,
so the led command could be used again with 'sandbox:red' and
'sandbox:green'.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
2020-07-28 19:30:39 -06:00
Heinrich Schuchardt
db4ec4269e cmd: host: return value of do_host_bind()
When trying to bind to a non-existent file the following output is
displayed:

=> host bind 0 non_existent
Failed to access host backing file 'non_existent'
exit not allowed from main input shell.

The last line is quite unexpected and due to an incorrect return value.

If do_host_bind() fails, return CMD_RET_FAILURE (= 1).

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-07-28 19:30:39 -06:00
Dan Murphy
9beacb6c02 dm: Fix build error when OF_CONTROL is not set
With OF_CONTROL disabled the build fails for
include/dm/read.h:932:10: error: ‘ENOTSUPP’ undeclared (first use in this function)
  932 |  return -ENOTSUPP;

Fixes: 45224e8f26 ("dm: core: gracefully handle alias seq without of")
Signed-off-by: Dan Murphy <dmurphy@ti.com>
2020-07-28 19:30:39 -06:00
Walter Lozano
e9ab331ca6 dtoc: remove compatible string aliases support
After latest improvements in dtoc, compatible strings are checked
against driver and driver alias list to get a valid driver name. With
this new feature the list of compatible string aliases seems not
useful any more.

Signed-off-by: Walter Lozano <walter.lozano@collabora.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-28 19:30:39 -06:00
Walter Lozano
df17cdc9cf drivers: avoid using aliases on drivers when OF_PLATDATA is enabled
After latest improvements on OF_PLATDATA struct names are generated
based on driver name instead of compatible strings. With this in mind,
using aliases in drivers are not longer needed.

This patch removes code that tried to handle these kind of aliases to
improve readability.

Signed-off-by: Walter Lozano <walter.lozano@collabora.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-28 19:30:39 -06:00
Walter Lozano
dcb3ed642b dtoc: look for compatible string aliases in driver list
Currently dtoc checks if the first compatible string in a dtb node
matches either a driver o driver alias name, without taking into account
any other compatible string in the list. In the case that no driver matches
the first compatible string a warning is printed and the U_BOOT_DEVICE is
not being declared correctly.

This patch adds dtoc's support for try all the compatible strings in the
dtb node, in an effort to find the correct driver.

Signed-off-by: Walter Lozano <walter.lozano@collabora.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-28 19:30:39 -06:00
chenshuo
6e31458435 find dtb in android boot image with header version 2 during bootm
This patch is about bootm process, android boot image and device tree.

Android 10 updates the boot image header to version 2,
which includes a section to store the device tree blob (DTB) image.

include/android_image.h has updated the struct andr_img_hdr,
but not used in bootm process. This patch avoid reporting
"Device tree not found or missing FDT support"
when bootm a correctly constructed android boot image.

Signed-off-by: chenshuo <chenshuo@eswin.com>
2020-07-28 19:30:39 -06:00
Simon Glass
6724a37a7c x86: chromebook_samus_tpl: Correct the image layout
At present there is not enough space for U-Boot due to the EFI loader.
Correct this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-28 19:30:39 -06:00
Simon Glass
9589c447e8 x86: chromebook_panther: Correct the image layout
This board does not have microcode but at present that is not supported
by Kconfig nor the binman image layout. Fix both of these.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-28 19:30:39 -06:00
Simon Glass
a9fae71142 x86: chromebook_link64: Correct the image layout
At present the image layout is not correct, since it uses the SDRAM
address of the 64-bit U-Boot as the ROM address. Fix this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-28 19:30:39 -06:00
Simon Glass
a78466af82 x86: Move the fdtmap away from the binary blobs
This causes conflicts on chromebook_link64. Move it to after U-Boot where
there should be plenty of space.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-28 19:30:39 -06:00
Simon Glass
5a1140527d rockchip: Drop the fit_spl_optee.sh script
Now that all board use binman instead of this script, drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-28 19:30:39 -06:00
Simon Glass
c67ce8fd84 rockchip: Convert evb-rk3229 over to use binman
At present this board uses a custom script to produce the .its file.
Update it to use binman instead. Binman can create all the images that
are needed.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-07-28 19:30:39 -06:00
Simon Glass
a32dd07148 rockchip: Convert evb-rk3288 over to use binman
At present this board uses a custom script to produce the .its file.
Update it to use binman instead. Binman can create all the images that
are needed.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-07-28 19:30:39 -06:00
Simon Glass
f4a43d2925 Makefile: Warn against using CONFIG_SPL_FIT_GENERATOR
This option is used to run arch-specific shell scripts which produce .its
files which are used to produce FIT images. We already have binman which
is designed to produce firmware images. It is more powerful and has tests.

So this option should be deprecated and not used. Existing uses should be
migrated.

Mentions of this in code reviews over the last year or so do not seem to
have resulted in action, and things are getting worse.

So let's add a warning.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-28 19:30:39 -06:00
Simon Glass
a8f3ace3cb Makefile: Allow CONFIG_SPL_FIT_GENERATOR to be empty
At present we use the empty string to indicate that there is no FIT
generator, but this doesn't allow an individual board to undefine it.
Create a separate bool instead.

Update the config of the boards which currently have an empty string.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-07-28 19:30:39 -06:00
Simon Glass
18e08132f2 Makefile: Fix a long line in cmd_mkfitimage
Fix this line which is over the limit.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-28 19:30:39 -06:00
Simon Glass
b47ef6b0d6 Makefile: Move CONFIG_TOOLS_DEBUG check to later
At present this is checked before the config has been loaded by the
Makefile, so it doesn't work.

Move the check to later.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-28 19:30:39 -06:00
Simon Glass
e999bea485 mediatek: Makefile: Drop explicit targets built by binman
On mediatek various files that need to be created by binman. It does not
make sense to enumerate these in the Makefile. They are described in the
configuration (devicetree) for each board and we can simply run binman
(always) to generate them.

This avoid sprinkling the Makefile with arch-specific code.

Also update the binman definition so that idbloader.img is only needed
when SPL is actually being used.

Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
2020-07-28 19:30:39 -06:00
Simon Glass
bdca932f5b tegra: Makefile: Drop explicit targets built by binman
On tegra various files that need to be created by binman. It does not make
sense to enumerate these in the Makefile. They are described in the
configuration (devicetree) for each board and we can simply run binman
(always) to generate them.

This avoid sprinkling the Makefile with arch-specific code.

Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
2020-07-28 19:30:39 -06:00
Simon Glass
e6eca3a916 sunxi: Makefile: Drop explicit targets built by binman
On sunxi various files that need to be created by binman. It does not make
sense to enumerate these in the Makefile. They are described in the
configuration (devicetree) for each board and we can simply run binman
(always) to generate them.

This avoid sprinkling the Makefile with arch-specific code.

Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
2020-07-28 19:30:39 -06:00
Simon Glass
3be8ba5ea5 x86: Drop CONFIG_BUILD_ROM and repurpose BUILD_ROM
This Kconfig is not needed anymore since U-Boot will build the ROM if the
required binary blobs exist.

The BUILD_ROM environment variable used to request that the ROM be built.
Now this always happens if the required binary blobs are available. Update
it to mean that U-Boot should fail if the ROM cannot be built. This
behaviour should be compatible with how it used to work.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-28 19:30:39 -06:00
Simon Glass
42b18df80f x86: Makefile: Drop explicit targets built by binman
On x86 various files that need to be created by binman. It does not make
sense to enumerate these in the Makefile. They are described in the
configuration (devicetree) for each board and we can simply run binman
(always) to generate them.

Update the Makefile to have a separate, final step which runs binman,
once all input dependencies are present.

This avoid sprinkling the Makefile with arch-specific code.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-07-28 19:30:39 -06:00
Simon Glass
be17bcb9af powerpc: mpc85xx: Only enable binman when it is needed
Quite a few boards using this SoC family don't use binman, yet
CONFIG_BINMAN is enabled for all of them. But the option should only be
enabled if we expect binman to produce an image. Calling binman when the
device tree is missing, etc. will cause failer.

Add a condition so that CONFIG_BINMAN is only enabled as needed.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-28 19:30:39 -06:00
Simon Glass
e6385c7e9c Makefile: Rename ALL-y to INPUTS-y
When binman is in use, most of the targets built by the Makefile are
inputs to binman. We then need a final rule to run binman to produce the
final outputs.

Rename the variable to indicate this, and add a new 'inputs' target.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-28 19:30:39 -06:00
Simon Glass
3077026ea1 tegra: Don't enable binman on ARMv8 SoCs
At present only the ARMv7 tegra SoCs actually use binman to create an
image. Change the config to reflect this, since otherwise running binman
will produce an error.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-07-28 19:30:39 -06:00
Simon Glass
1d62704d77 tegra: Drop the unused non-binman code
This has been in the Makefile long enough to ensure migration is complete.
Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-07-28 19:30:39 -06:00
Simon Glass
c4cea2bbf9 rockchip: Enable building a SPI ROM image on bob
Add a simple binman config and enable CONFIG_HAS_ROM so that U-Boot
produces a ROM for bob.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-07-28 19:30:39 -06:00
Simon Glass
9b312e26fc rockchip: Enable building a SPI ROM image on jerry
Add a simple binman config and enable CONFIG_HAS_ROM so that U-Boot
produces a ROM for jerry.

Change the binman image definition to support multiple images, since it
may be used to build both u-boot-rockchip.bin and u-boot.rom

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-07-28 19:30:39 -06:00
Simon Glass
4183eee3f6 rockchip: bob: Support SPI-flash booting
Update the config for chromebook_bob to support booting from SPI flash.
The existing SPL size is too small since ATF is needed, so double it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-07-28 19:30:39 -06:00
Simon Glass
eba768c545 rockchip: jerry: Add serial support
This option allows the serial console to work correctly. Add it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-07-28 19:30:39 -06:00
Simon Glass
aafe5c5ef8 Makefile: Allow building .rom files for non-x86 boards
Some non-x86 devices can use SPI flash to boot and need to produce images
of a fixed size to program the flash.

Add a way to handle this for non-x86 boards.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-07-28 19:30:39 -06:00
Simon Glass
fab4f3231f rockchip: Allow Bob to use SPI boot
Bob is a Chromebook and can boot from SPI flash. Add it to the condition
check for this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-07-28 19:30:39 -06:00
Simon Glass
bcd4e6f3bd x86: Change how selection of ROMs works
Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.

Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.

Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.

For now this affects only x86, but future patches will enable this for
rockchip too.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-07-28 19:30:39 -06:00
Simon Glass
38f159c05b buildman: Show the build rate at the end
It is interesting to note the number of builds completed per second to
track machine performance and build speed. Add a 'rate' value at the end
of the build to show this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-07-28 19:30:39 -06:00
Simon Glass
3918dfaa91 buildman: Correct the testOutputDir() unit test
This current fails with an error. Fix it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Fixes: 7664b03ffc ("buildman: Remove _of_#_ from results directory paths")
2020-07-28 19:30:39 -06:00
Simon Glass
5a910b92bc buildman: Allow using older versions of genboardscfg.py
Older versions of this script don't support the -q flag. Since buildman
runs this script from when it starts, we may get the old version.

Fix this in two ways:

1. Use the version from the same tree as buildman is run from, if
available
2. Failing that, allow the -q flag to be missing

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-07-28 19:30:39 -06:00
Patrick Oppenlander
56c31e5e50 sandbox: enable FIT cipher support in defconfig
Linux distributions generally use the "make defconfig && make tools-all"
recipe to generate a uboot-tools (or similar) package.

This patch enables FIT cipher support in the default mkimage build.

Signed-off-by: Patrick Oppenlander <patrick.oppenlander@gmail.com>
2020-07-28 19:30:39 -06:00
Walter Lozano
6c74d1b832 dtoc: add coverage test for unicode error
Add an additional test to dtoc in order improve the coverage,
specifically to take into account the case of unicode error when
scanning drivers.

Signed-off-by: Walter Lozano <walter.lozano@collabora.com>
2020-07-28 19:30:39 -06:00
Tom Rini
3b191c56c8 Merge branch '2020-07-28-Kconfig-migrations'
- Migration of more symbols to Kconfig
2020-07-28 18:27:34 -04:00
Peng Fan
0465f12efb configs: migrate CONFIG_SPL_LOAD_FIT_ADDRESS to defconfigs
Done with:
./tools/moveconfig.py -S SPL_LOAD_FIT_ADDRESS
./tools/moveconfig.py -S SPL_LOAD_FIT_ADDRESS -H

Signed-off-by: Peng Fan <peng.fan@nxp.com>
[trini: A few more migrations]
Signed-off-by: Tom Rini <trini@konsulko.com>
2020-07-28 16:18:10 -04:00
Peng Fan
936d07d14d Kconfig: add SPL_LOAD_FIT_ADDRESS
Add SPL_LOAD_FIT_ADDRESS to make user could add it in defconfig

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-07-28 16:18:10 -04:00
Adam Ford
acc415ac60 Convert CONFIG_SYS_MMCSD_FS_BOOT_PARTITION to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_MMCSD_FS_BOOT_PARTITION

Signed-off-by: Adam Ford <aford173@gmail.com>
2020-07-28 16:18:10 -04:00
Adam Ford
6a411dd0d2 configs: Remove dead CONFIG options
BOOTP_DEFAULT is defined in several boards, but this config
option is never checked or used.

This patch removes this config option from config files and
the whitelist.txt

Signed-off-by: Adam Ford <aford173@gmail.com>
2020-07-28 16:18:10 -04:00
Adam Ford
3275f26bb6 Convert CONFIG_BOOTP_SEND_HOSTNAME to Kconfig
This converts the following to Kconfig:
   CONFIG_BOOTP_SEND_HOSTNAME

Signed-off-by: Adam Ford <aford173@gmail.com>
2020-07-28 16:18:10 -04:00
Adam Ford
bc3cff9453 Convert CONFIG_DRIVER_TI_EMAC_USE_RMII to Kconfig
This converts the following to Kconfig:
   CONFIG_DRIVER_TI_EMAC_USE_RMII

Signed-off-by: Adam Ford <aford173@gmail.com>
2020-07-28 16:18:10 -04:00
Adam Ford
3879106414 Convert CONFIG_SPL_NAND_BASE et al to Kconfig
This converts the following to Kconfig:
   CONFIG_SPL_NAND_BASE
   CONFIG_SPL_NAND_IDENT

Signed-off-by: Adam Ford <aford173@gmail.com>
2020-07-28 16:18:10 -04:00
Adam Ford
0c4a63438c Convert CONFIG_SPL_NAND_DRIVERS et al to Kconfig
This converts the following to Kconfig:
   CONFIG_SPL_NAND_DRIVERS
   CONFIG_SPL_NAND_ECC
   CONFIG_SPL_NAND_SIMPLE

Signed-off-by: Adam Ford <aford173@gmail.com>
2020-07-28 16:18:10 -04:00
Adam Ford
e91907a146 Convert CONFIG_ENV_OVERWRITE to Kconfig
This converts the following to Kconfig:
   CONFIG_ENV_OVERWRITE

Signed-off-by: Adam Ford <aford173@gmail.com>
[trini: Rerun migration, remove some comments]
Signed-off-by: Tom Rini <trini@konsulko.com>
2020-07-28 16:18:06 -04:00
Marek Vasut
0b263a905a ARM: dts: stm32: Add DHSOM based DRC02 board
Add DT for DH DRC02 unit, which is a universal controller device.
The system has two ethernet ports, two CANs, RS485 and RS232, USB,
capacitive buttons and an OLED display.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-07-28 18:35:01 +02:00
Marek Vasut
8791cf0923 ARM: dts: stm32: Move ethernet PHY into SoM DT
The PHY and the VIO regulator is populated on the SoM, move it
into the SoM DT.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-07-28 18:35:01 +02:00
Marcin Sloniewski
87e1e0fc7f ARM: dts: stm32: add seeed studio odyssey-stm32mp157c board
This commit adds device tree files supporting
SBC from Seeed Studio based on STM32MP157C.

This works with generic stm32mp1 config.
Right now only booting from SD card is supported.

Signed-off-by: Marcin Sloniewski <marcin.sloniewski@gmail.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-07-28 18:35:01 +02:00
Patrick Delaunay
5f865bb53b Revert "ARM: dts: stm32: Reinstate card detect behavior on ST boards"
Since commit f13ff88b61 ("gpio: stm32: add ops set_dir_flags")
the gpio flags are supported by stm32 pinctrl driver.

The cd-gpios is correctly handle in U-Boot and the patch on the
device tree can be removed.

This reverts commit 792919241b.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-07-28 18:15:23 +02:00
Patrick Delaunay
ed111e4f00 Revert "ARM: dts: stm32: Reinstate card detect behavior on DHSOM"
Since commit f13ff88b61 ("gpio: stm32: add ops set_dir_flags")
the gpio flags are supported by stm32 pinctrl driver.

The cd-gpios is correctly handle in U-Boot and the patch on the
device tree can be removed.

This reverts commit 3c2e2a1a79.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-07-28 18:14:58 +02:00
Patrick Delaunay
346034a7a8 arm: stm32mp: use correct weak function name spl_board_prepare_for_linux
Replace the function spl_board_prepare_for_boot_linux by the correct
name of the weak function spl_board_prepare_for_linux defined in spl.h.

This patch avoids warning with W=1 option:

u-boot/arch/arm/mach-stm32mp/spl.c:150:6:
warning: no previous prototype for ‘spl_board_prepare_for_boot_linux’
[-Wmissing-prototypes]

Fixes: dc7e5f190d ("arm: stm32mp: activate data cache on DDR in SPL")
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-07-28 18:14:15 +02:00
Patrick Delaunay
0b73355ba2 ARM: dts: stm32: add reset support to uart nodes on stm32mp15x
STM32 serial IP can be reset via reset controller.
Add the support of reset to uart nodes on stm32mp15-u-boot.dtsi,
the ad-dons file for U-Boot.

This patch fix issues when previous UART configuration, for example
done in TF-A or ROM code, is not handled in U-Boot stm32 serial driver
init.

This reset property won't be not added in Linux kernel device tree
as this reset is not used in Linux STM32 serial driver.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-07-28 18:11:58 +02:00
Patrick Delaunay
7ecbefd3ec ARM: dts: stm32mp: remove hnp-srp-disable for usbotg on dk1
Remove hnp-srp-disable for usbotg node because this feature is only needed
for usbotg in HOST mode (in drivers/usb/host/dwc2.c)
and this feature is not activated in stm32mp15 U-Boot
(stm32mp15_basic_defconfig and stm32mp15_trusted_defconfig);
only the device mode is activated and OTG is not supported in DWC2 driver.

This patch reduces the difference between U-Boot and Linux kernel
device-tree.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-07-28 18:10:06 +02:00
Patrick Delaunay
500327e2ea ARM: dts: stm32mp1: DT alignment with Linux kernel v5.8-rc1
DT alignment with Linux kernel v5.8-rc1 for the STM32MP15x soc
device tree files and the STMicroelectronics boards device tree files.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-07-28 18:06:45 +02:00
Patrick Delaunay
6ed83edfc0 ARM: dts: rename stm32mp15xx-avenger96 ethernet0_rgmii_pins
Alignment with pins name used in Linux kernel v5.8.

It is a preleminary step for device tree alignment.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-07-28 18:06:19 +02:00
Patrick Delaunay
090f2505d9 configs: stm32mp15: activate CMD_ADTIMG
Activate the support of the command adtimg to handle android images.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-07-28 18:03:02 +02:00
Patrick Delaunay
9f9191a107 phy: usbphyc: use regulator_set_enable_if_allowed for disabling vdd supply
Use regulator_set_enable_if_allowed() api instead of regulator_set_enable()
while disabling vdd supply. This way the driver doesn't see an error
when disabling an always-on regulator.

This patch is needed since the commit f93fab3126 ("Revert 'power:
regulator: Return success on attempt to disable an always-on regulator'")
and use the API introduced by commit cc4a224af2 ("power: regulator:
Introduce regulator_set_enable_if_allowed api").

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-07-28 18:00:05 +02:00
Patrick Delaunay
ded48bec05 arm: stm32mp: stm32prog: check result of find_mmc_device
Check result of find_mmc_device() before calling mmc_init().

This patch avoid a data abort when the command try to acces
to sd/mmc device deactivated in device tree.

Fixes: aff4c5dd82 ("stm32mp: stm32prog: add MMC device")
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-07-28 17:43:46 +02:00
Patrick Delaunay
4b64265bb4 board: update test on misc_read result in board_late_init
Update management of misc_read, which now return length of data
after the commit 8729b1ae2c ("misc: Update read() and write()
methods to return bytes xfered")

Fixes: 8b8b3d6b55 ("stm32mp1: board: add environment variable for board id and board rev")

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-07-28 17:39:35 +02:00
Jakob Riepler
1e3d060501 board: dh_stm32mp1: remove env location override
Overriding the environment location is not necessary as the defconfig
for the relevant boards only enable SPI flash and nowhere sources which
are in the same order per default but having this explicit override
prevents using eMMC or SD card (or EXT4) as environment source.

Signed-off-by: Jakob Riepler <jakob.riepler@aviloo.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-07-28 17:36:27 +02:00
Patrick Delaunay
89ddbbb742 stm32mp1: use the command env info -q in env_check
Activate the new option -q in command "env info"
to avoid unnecessary trace during boot.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-07-28 17:30:53 +02:00
Patrick Delaunay
b0cbafe509 configs:stm32mp1: activate env config in SPL
Activate env config in SPL with CONFIG_SPL_ENV_SUPPORT
and use CONFIG_IS_ENABLED macro to test the activated
CONFIG_$(SPL_)ENV_IS_IN_... in env_get_location.

Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-07-28 17:21:37 +02:00
Patrick Delaunay
76db1681da stm32mp1: use a specific SD/eMMC partition for U-Boot enviromnent
Save the environment at the end of the U-Boot partition, the GPT
partition named "ssbl" in SD card or eMMC and avoid requirements
on the "bootfs" file system generated via specific raw tools
(like wic and genimage).

With the previous configuration of the U-Boot environment saved in ext4
file, U-Boot need to create/modify the file uenv.txt in the ext4 file
system; so this EXT4 file system need to be generated without some
functionality, like metadata_csum and dir_index, because they are not
supported by U-Boot.

Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-07-28 17:21:37 +02:00
Patrick Delaunay
a9addcafd1 stm32mp1: board: add support of CONFIG_ENV_IS_IN_MMC
Add support of CONFIG_ENV_IS_IN_MMC in env_get_location, used for
all mmc device (SD card and eMMC).
The 2 configs CONFIG_ENV_IS_IN_MMC and CONFIG_ENV_IS_IN_EXT4 are
incompatible.

Add the weak function mmc_get_env_dev to select the mmc boot instance.

Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-07-28 17:21:37 +02:00
Patrick Delaunay
43fe9d2fda stm32mp1: mmu_set_region_dcache_behaviour
Since commit d877f8fd0f ("arm: provide a function for boards init
code to modify MMU virtual-physical map") the parameter of
mmu_set_region_dcache_behaviour need to be MMU_SECTION_SIZE
aligned.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-07-28 17:21:37 +02:00
Patrick Delaunay
97f7e39def arm: stm32mp: move dbgmcu_init call when DT is ready
As the dbgmcu_init use the function bsec_dbgswenable which is based
on the DM and DT, its call can't be done before the spl is initialized
(driver model, DT and malloc) in board_init_f::spl_early_init().

This function call is moved later in spl_board_init().

Fixes: bd3f60d29c ("arm: stm32mp: protect DBGMCU_IDC access with BSEC")

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-07-28 17:21:37 +02:00
Tom Rini
bd33a72f83 Merge branch '2020-07-28-update-azure-tests'
- Update Azure to fix some recent issues with Windows host tool builds
2020-07-28 08:49:42 -04:00
Tom Rini
f7d0ae9c63 configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2020-07-28 08:46:52 -04:00
Bin Meng
437e70f7c3 azure: Switch to use the MSYS2 official installer as the CI base
Recent CI failures were seen [1] when building MSYS2 Windows host
tools. The error messages are something like:

  downloading mingw32.db...
  downloading mingw32.db.sig...
  error: mingw32: key "4A6129F4E4B84AE46ED7F635628F528CF3053E04" is unknown
  error: mingw32: signature from "David Macek <david.macek.0@gmail.com>" is unknown trust
  error: failed to update mingw32 (invalid or corrupted database (PGP signature))

Per the MSYS2 official news [2], this was caused by a packager
switch and several solutions were suggested, e.g.: a new package
of msys2-keyring and a new msys2 installer that includes them are
released. However right now we have been using the MSYS2 github
CI base repo [3] for the MSYS2 build in U-Boot, but per the project
information on the github webpage, it says: "This repository is
unused/deprecated and will be remove after 2021-01-01". Since it is
unmaintained it's unlikely the new PGP keys will be included in the
git repo, and the only choice is to switch to use the MSYS2 official
installer as the CI base instead.

[1] https://dev.azure.com/u-boot/u-boot/_build/results?buildId=975
[2] https://www.msys2.org/news/#2020-06-29-new-packagers
[3] https://github.com/msys2/msys2-ci-base

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-28 08:42:20 -04:00
Bin Meng
d126e3cdb7 azure: Add the missing build dependency for MSYS2 build
Package 'flex' is needed when building the U-Boot host tool, but
is currently missing in the build dependency in the CI pipeline.

This is to prepare switching to an installer based CI build.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-28 08:42:16 -04:00
Bin Meng
f7faddf632 azure: Drop 32-bit MSYS2 build
As of 2020-05-17, 32-bit MSYS2 is no longer actively supported by
the upstream [1]. Let's drop the 32-bit Windows host tool build.

[1] https://www.msys2.org/news/#2020-05-17-32-bit-msys2-no-longer-actively-supported

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-28 08:42:11 -04:00
Bin Meng
2a306a2da0 azure: Use a login shell everywhere for MSYS2 build
This simplifies things a bit to just use a login shell everywhere.

This keeps in sync with MSYS2 upstream commit:
9d11b7f0aa93 ("azure-pipelines: simplify things a bit").

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-28 08:42:07 -04:00
Tom Rini
1db942b67d Prepare v2020.10-rc1
Signed-off-by: Tom Rini <trini@konsulko.com>
2020-07-27 22:46:03 -04:00
Tom Rini
6b7937821d Merge tag 'u-boot-amlogic-20200727' of https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic
- Handle errors in Meson serial driver
- Enable HDMI, keyboard and ADC for Odroid-C2
2020-07-27 21:40:26 -04:00
Tom Rini
8d1fc6fb89 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriq
- Bug fixes and updates on ls2088a,ls1028a, ls1046a, ls1043a, ls1012a
- lx2-watchdog support
- layerscape: pci-endpoint support, spin table relocation fixes and
  cleanups
- fsl-crypto: RNG support and bug fixes
2020-07-27 15:18:15 -04:00
Dan Murphy
1351e3eb72 dm: Fix build error when OF_CONTROL is not set
With OF_CONTROL disabled the build fails for
include/dm/read.h:932:10: error: ‘ENOTSUPP’ undeclared (first use in this function)
  932 |  return -ENOTSUPP;

Fixes: 45224e8f26 ("dm: core: gracefully handle alias seq without of")
Signed-off-by: Dan Murphy <dmurphy@ti.com>
2020-07-27 21:03:15 +02:00
Tom Rini
fc3414212e travis: Install pyelftools via pip
With the migration to python3 for all of our tests, we need to install
pyelftools via pip now rather than the system tools as they will
otherwise not be present in our virtualenv.

Signed-off-by: Tom Rini <trini@konsulko.com>
---
Changes in v2: Switch to pip
2020-07-27 14:42:09 -04:00
Tom Rini
4e05c167a7 Merge tag 'dm-pull-20jul20-take2a' of https://gitlab.denx.de/u-boot/custodians/u-boot-dm
binman support for FIT
new UCLASS_SOC
patman switch 'test' command
minor fdt fixes
patman usability improvements
2020-07-27 11:15:37 -04:00
Anand Moon
95ca2df3fd configs: odroid-c2: update for HDMI output, ADC & USB keyboard
Enable options to permit HDMI output on Odroid-C2 GXBB boards.
Enable VPU Power Domain.
Enable ADC and USB_KERBOARD.

Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Anand Moon <linux.amoon@gmail.com>
2020-07-27 16:35:56 +02:00
Neil Armstrong
812196d53e serial: meson: handle RX errors
This checks and handles RX errors on the Amlogic UART controller
after experiencing errors on the Khadas VIM3 & VIM3L when UART AO A
lines are not connected.

When the RX line is not connected, the first byte is erroneous and breaks
the U-Boot autoboot, breaking automatic boot.

This checks and drops any erroneous RX byte on pending and getc callbacks
to avoid returning true to pending when an error byte is in the FIFO.

Fixes: bfcef28ae4 ("arm: add initial support for Amlogic Meson and ODROID-C2")
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Tested-by: Guillaume La Roque <glaroque@baylibre.com>
2020-07-27 16:35:56 +02:00
Tom Rini
117c7ee283 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-sh
- R8A774A1 / Beacon EmbeddedWorks RZG2M Dev Kit support
2020-07-27 09:41:18 -04:00
Tom Rini
2493ce6258 Merge branch 'net' of https://gitlab.denx.de/u-boot/custodians/u-boot-sh
- Convert dc2114x driver to DM.
2020-07-27 09:40:06 -04:00
Tom Rini
3773028fce Merge branch '2020-07-27-misc-env-improvements'
- Assorted environment fixes.
- Enhance environment in MMC and controlled via OF_CONTROL
- Allow for environment in FAT to use the same device we boot from
  rather than be hard-coded.
2020-07-27 09:25:53 -04:00
Fabio Estevam
68a699e1e8 imx8m: soc: Remove unneeded space
Checkpatch reports the following issue:

ERROR: space prohibited before that ',' (ctx:WxW)
#936: FILE: arch/arm/mach-imx/imx8m/soc.c:936:
+		      0, 0 , 0, 0, 0, 0, &res);

Remove the unneeded space.
 		           ^
Reported-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2020-07-27 14:02:37 +02:00
Fabio Estevam
6cc30b2208 imx8m: ddrphy_utils: Improve coding style
Currently checkpatch is not happy about this file:

total: 14 errors, 2 warnings, 7 checks, 359 lines checked

Improve the coding style so that it can now report:

total: 0 errors, 0 warnings, 6 checks, 360 lines checked

Reported-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2020-07-27 14:02:28 +02:00
Igor Opaniuk
195011b24d colibri-imx7: fix splash logo drawing
1. Configure white on black for video console.
2. Enable printing bmp logo during late board init stage.
3. Use iomux configuration from device tree.

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
2020-07-27 14:01:32 +02:00
Igor Opaniuk
816943cfb2 colibri-imx6ull: fix splash screen logo drawing
Configure white on black for video console.

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
2020-07-27 14:01:32 +02:00
Igor Opaniuk
391c712dde colibri-imx6ull: show boot logo
1. Show boot logo embed in U-Boot blob.
2. Drop iomux configration for LCD, and use the one provided in device
tree.

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
2020-07-27 14:01:32 +02:00
Igor Opaniuk
a5de86c1db ARM: dts: imx7-colibri: multiple node updates
1. Move u-boot specific nodes to u-boot dts include: legacy lcdif
node and aliases.
2. Add iomux configuration for LCD.
3. Drop un-needed u-boot,dm-pre-reloc for alias node.
4. Fix display-timings, use the one from Toradex downstream kernel [1]

[1]: https://git.toradex.com/cgit/linux-toradex.git/tree/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi?h=toradex_4.9-2.3.x-imx#n206
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
2020-07-27 14:01:32 +02:00
Igor Opaniuk
d324189772 toradex: common: show boot logo
Add function for showing boot logo, embed into u-boot blob.

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
2020-07-27 14:01:32 +02:00
Igor Opaniuk
07e939f0f5 ARM: dts: imx6ull-colibri: move u-boot specific node
1. Move aliases and legacy lcdif node to the u-boot specific dts include.
2. Provide proper display timings, as in the downstream Toradex kernel
[1].

[1]: https://git.toradex.com/cgit/linux-toradex.git/tree/arch/arm/boot/dts/imx6ull-colibri-eval-v3.dtsi?h=toradex_4.9-2.3.x-imx#n183
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
2020-07-27 14:00:36 +02:00
Igor Opaniuk
306ecc8431 verdin-imx8mm: add EEPROM support for carrier board
Enable these Kconfig symbols:
TDX_CFG_BLOCK_EXTRA=y
TDX_HAVE_EEPROM_EXTRA=y

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
2020-07-27 14:00:36 +02:00
Igor Opaniuk
8cc40fa2d3 ARM: dts: imx8mm-verdin: eeprom nodes adjustments
Rename EEPROM nodes.
Create aliases for EEPROM to unify their order:
    eeprom0 - on-module EEPROM
    eeprom1 - carrier-board EEPROM
    eeprom2 - MIPI-DSI to HDMI adapter EEPROM

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
2020-07-27 14:00:36 +02:00
Igor Opaniuk
717fa2c819 toradex: tdx-cfg-block: add carrier board info printing
Add carrier board info printing during boot time:

U-Boot 2020.07-rc4-02435-g1756e05 (Jun 22 2020 - 22:43:59 +0300)

CPU:   Freescale i.MX8MMQ rev1.0 at 1200 MHz
....
Carrier: Toradex Verdin Development Board V1.0A, Serial# 10622780
Verdin iMX8MM #

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
2020-07-27 14:00:36 +02:00
Igor Opaniuk
db4ab6d453 toradex: tdx-cfg-clock: add migration routine from PID8
Add migration routine from PID8 pre-stored values on EEPROM
(including sane value checks).

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
2020-07-27 14:00:36 +02:00
Igor Opaniuk
0c6b5588ef toradex: tdx-cfg-block: add support for EEPROM
This introduces support for EEPROM as a storage for the main Toradex
config block and additional config blocks on extra EEPROM chips (on
carrier board or video adapters).

To enable EEPROM as a storage for the main config block:
TDX_HAVE_EEPROM=y.

For additional EEPROMs please enable this Kconfig symbol:
TDX_CFG_BLOCK_EXTRA=y.

Information about existing EEPROM chips is provided via Device Tree
using aliases.

You can also write configuration for the carrier board using
create_carrier subcommand for cfgblock. Example:

Verdin iMX8MM # cfgblock create_carrier
Supported carrier boards:
UNKNOWN CARRIER                     = [0]
Verdin Carrier Board                = [1]
Choose your carrier board (provide ID): 1
Enter carrier board version (e.g. V1.1B): V1.0A
Enter carrier board serial number: 10622780

Also with barcode:
Verdin iMX8MM # cfgblock create carrier -y 0156100010622780

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
2020-07-27 14:00:36 +02:00
Igor Opaniuk
26921f5853 toradex: tdx-cfg-block: add carrier boards and display adapters
Add defines for supported carrier boards and display adapters.

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
2020-07-27 14:00:36 +02:00
Igor Opaniuk
c2e969378d toradex: tdx-cfg-block: add EEPROM read/store wrappers
These functions wrap functionality for storing config blocks in EEPROM.

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
2020-07-27 14:00:36 +02:00
Igor Opaniuk
fb99ac9caf imx: mx7: fix DDRC size in A7-M4 mapping table
According to i.MX 7Solo Applications Processor Reference Manual,
2.1.3 Cortex-M4 Memory Map, M4 can address only 1536MB of DDRC
(Start Address: 0x8000_0000; End Address: 0xDFFF_FFFF).
Correct DDRC size to 0x60000000.

Fixes: c0f037f6("mach-imx: bootaux: elf firmware support")
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
2020-07-27 14:00:36 +02:00
Kuldeep Singh
636999f21c configs: ls2088a: Restore CONFIG_ENV_ADDR to IFC-NOR
Restore CONFIG_ENV_ADDR value to fix boot hang with IFC-NOR
which is default boot source.

Signed-off-by: Ashish Kumar <ashish.kumar@nxp.com>
Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-07-27 14:24:15 +05:30
Zhao Qiang
5c64d07f76 arm: dts: ls1028a: Add dspi flash device node to qds
Add dspi flash device node to fsl-ls1028a-qds.dtsi

Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-07-27 14:24:15 +05:30
Zhao Qiang
e5d8fe9c9a configs: lx2160a: Enable Watchdog support
Enable support to compile SBSA driver.

Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-07-27 14:24:15 +05:30
Zhao Qiang
0b7cac71e4 arm64: lx2160a: dts: Add watchdog node
Add watchdog node which is sbsa into lx2160a dtsi

Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-07-27 14:24:15 +05:30
Zhao Qiang
f27d73e941 Watchdog: introduce ARM SBSA watchdog driver
According to Server Base System Architecture (SBSA) specification,
the SBSA Generic Watchdog has two stage timeouts: the first signal
(WS0) is for alerting the system by interrupt, the second one (WS1) is a
real hardware reset.
More details about the hardware specification of this device:
ARM DEN0029B - Server Base System Architecture (SBSA)

This driver can operate ARM SBSA Generic Watchdog as a single stage
In the single stage mode, when the timeout is reached, your system
will be reset by WS1. The first signal (WS0) is ignored.

Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-07-27 14:24:15 +05:30
Hou Zhiqiang
ed188aa886 pci: layerscape: Add specific config entry for RC and EP mode driver
Add Root Complex and Endpoint mode specific config entries, such that
it's feasible to enable the RC and/or EP mode driver indepently.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-07-27 14:24:15 +05:30
Xiaowei Bao
4085e3a46a pci_ep: layerscape: Add the PCIe EP mode support for lx2160a-v2
Add the PCIe EP mode support for lx2160a-v2 platform.

Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com>
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-07-27 14:24:15 +05:30
Xiaowei Bao
80b5a662b7 pci: layerscape: Modify the ls_pcie_dump_atu function
Modify the ls_pcie_dump_atu function, make it can print the INBOUND
windows registers.

Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com>
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-07-27 14:24:15 +05:30
Xiaowei Bao
83bf32e680 pci_ep: layerscape: Add the SRIOV VFs of PF support
Add the INBOUND configuration for VFs of PF.

Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com>
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-07-27 14:24:15 +05:30
Xiaowei Bao
78c56b29fc pci_ep: layerscape: Add Support for ls2085a and ls2080a EP mode
Due to the ls2085a and ls2080a use different way to set the BAR size,
so add the BAR size init code here.

Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com>
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-07-27 14:24:15 +05:30
Xiaowei Bao
15ce1fadf7 pci_ep: layerscape: Add the workaround for errata A-009460
The VF_BARn_REG register's Prefetchable and Type bit fields
are overwritten by a write to VF's BAR Mask register.
workaround: Before writing to the VF_BARn_MASK_REG register,
write 0b to the PCIE_MISC_CONTROL_1_OFF register.

Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com>
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-07-27 14:24:15 +05:30
Xiaowei Bao
c5174a52c2 pcie_ep: layerscape: Add the multiple function support
Add the multiple function support for Layerscape platform, some PEXs
of Layerscaple platform have more than one PF.

Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com>
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-07-27 14:24:15 +05:30
Xiaowei Bao
57fcc13738 armv8: dts: ls1046a: Add the PCIe EP node
Add the PCIe EP node for ls1046a.

Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com>
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-07-27 14:24:15 +05:30
Xiaowei Bao
fd00c53fb3 pci_ep: Add the init function
Some EP deivces need to initialize before RC scan it, e.g. NXP
layerscape platform, so add the init function in pci_ep uclass.

Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com>
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-07-27 14:24:15 +05:30
Xiaowei Bao
118e58e26e pci: layerscape: Split the EP and RC driver
Split the RC and EP driver, and reimplement the EP driver base on
the EP framework.

Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com>
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-07-27 14:24:15 +05:30
Wasim Khan
be2c7d764a arm: dts: lx2160a: Increase configuration window size
lx2160a rev2 requires 4KB space for type0 and 4KB
space for type1 iATU window. Increase configuration
size to 8KB to have sufficient space for type0
and type1 window.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-07-27 14:24:15 +05:30
Manish Tomar
11504cf584 configs:ls1046afrwy: Add tfa secure boot defonfig
Add TFA secure boot defconfig and Enables secure boot related
configs in it.

Signed-off-by: Manish Tomar <manish.tomar@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-07-27 14:23:57 +05:30
Biwen Li
3bb30b9c76 freescale: ls1043aqds: drop ifdef CONFIG_SYS_I2C
- Drop ifdef CONFIG_SYS_I2C to initialize
  baudrate of i2c

- Drop warning of i2c_early_init_f as follows,
  warning: implicit declaration of function 'i2c_early_init_f'; did you
  mean 'arch_early_init_r'? [-Wimplicit-function-declaration]

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-07-27 14:16:29 +05:30
Biwen Li
1b2bdd0605 freescale: ls1043aqds: enable secure system counter
Enable secure system counter in board_early_init_f for udelay()
to fix a bug that always return 0 by timer_read_counter()
when boot from qspi(No TFA)

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-07-27 14:16:29 +05:30
Biwen Li
51d893cd3d freescale: ls1046aqds: drop ifdef CONFIG_SYS_I2C
- Drop ifdef CONFIG_SYS_I2C to initialize
  baudrate of i2c

- Drop warning of i2c_early_init_f as follows,
  warning: implicit declaration of function 'i2c_early_init_f'; did you
  mean 'arch_early_init_r'? [-Wimplicit-function-declaration]

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-07-27 14:16:29 +05:30
Biwen Li
e70e10bc49 freescale: ls1046aqds: enable secure system counter
Enable secure system counter in board_early_init_f for udelay()
to fix a bug that always return 0 by timer_read_counter()
when boot from qspi(No TFA)

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-07-27 14:16:29 +05:30
Biwen Li
9c31c53564 i2c: mxc: move i2c_early_init_f to common function
Move i2c_early_init_f to common function
to initialize baudrate of i2c

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-07-27 14:16:29 +05:30
Michael Walle
ea95f2142e crypto/fsl: add RNG support
Register the random number generator with the rng subsystem in u-boot.
This way it can be used by EFI as well as for the 'rng' command.

Signed-off-by: Michael Walle <michael@walle.cc>
Tested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-07-27 14:16:29 +05:30
Michael Walle
b980f9e259 crypto/fsl: instantiate the RNG with prediciton resistance
If it is already instantiated tear it down first and then reinstanciate
it again with prediction resistance.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-07-27 14:16:29 +05:30
Michael Walle
c269a970f2 crypto/fsl: don't regenerate secure keys
The secure keys (TDKEK, JDKEK, TDSK) can only be generated once after a
POR. Otherwise the RNG4 will throw an error.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Horia Geantă <horia.geanta@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-07-27 14:16:29 +05:30
Michael Walle
0dc596127c crypto/fsl: support newer SEC modules
Since Era 10, the version registers changed. Add the version registers
and use them on newer modules.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Horia Geantă <horia.geanta@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-07-27 14:16:29 +05:30
Michael Walle
277405b86c crypto/fsl: export caam_get_era()
We need the era in other modules, too. For example, to get the RNG
version.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Horia Geantă <horia.geanta@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-07-27 14:16:29 +05:30
Michael Walle
9b86bf2d14 crypto/fsl: make SEC%u status line consistent
Align the status line with all the other output in U-Boot.

Before the change:
DDR    3.9 GiB (DDR3, 32-bit, CL=11, ECC on)
SEC0: RNG instantiated
WDT:   Started with servicing (60s timeout)

After the change:
DDR    3.9 GiB (DDR3, 32-bit, CL=11, ECC on)
SEC0:  RNG instantiated
WDT:   Started with servicing (60s timeout)

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Horia Geantă <horia.geanta@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-07-27 14:16:28 +05:30
Heinrich Schuchardt
317fff5909 crypto/fsl: unused value in caam_hash_update()
The value 0 assigned to final is overwritten before ever being used.

Remove the assignment.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-07-27 14:16:28 +05:30
Heinrich Schuchardt
32e4b65d96 crypto/fsl: correct printf() statement.
The sequence of arguments should match the format string.
For printing unsigned numbers we should use %u.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-07-27 14:16:28 +05:30
Hou Zhiqiang
c5f8943965 arm64: ls1043a: Remove the workaround of erratum A-009929
The workaround has been implemented in PBI phase, so remove
the duplicated implementation from U-Boot.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-07-27 14:16:28 +05:30
Kuldeep Singh
10669ed965 configs: ls1012a: Increase CONFIG_SYS_MALLOC_LEN value
Previous attempt to increase CONFIG_SYS_MALLOC_LEN was done in commit
c084a8edf4 ("configs: ls1012a: Increase CONFIG_SYS_MALLOC_LEN size")
which increased malloc memory to ~1M.

PFE firmware alone requires 3M of dynamic memory allocation and
therefore, increase the config value to a larger value i.e 5M. This size
should be enough as of now to accommodate further memory requirements.

Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-07-27 14:16:28 +05:30
Yangbo Lu
ab84f4f375 configs: lx2160aqds: enable CONFIG_BOARD_EARLY_INIT_R
Enable CONFIG_BOARD_EARLY_INIT_R for SDHC adapter card
identification and configuration.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-07-27 14:16:28 +05:30
Yangbo Lu
e1a31034a6 board: fsl: lx2160aqds: identify SDHC adapter during board init
Add support for SDHC adapter identification and configuration
during board init.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-07-27 14:16:28 +05:30
Yangbo Lu
39913acedd Move eSDHC adapter card identification to board files
The eSDHC adapter card identification and multiplexing configuration
through FPGA had been implemented in both common mmc driver and
fsl_esdhc driver. However it is proper to move these code to board
files and do it during board initialization. The FPGA registers are
also board specific.

This patch is to move eSDHC adapter card identification and
multiplexing configuration from mmc driver to specific board files.
And the option CONFIG_FSL_ESDHC_ADAPTER_IDENT is no longer needed.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
[Rebased, Removed T1040QDS change as board does not exist]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-07-27 14:16:28 +05:30
Yangbo Lu
4f73897b99 Drop global data sdhc_adapter for powerpc
The sdhc_adapter of global data has not been used, and we
do not have to use it as global data even we may need it
in the future.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-07-27 14:16:28 +05:30
Yuantian Tang
c8f8830e0b armv8: ls1028ardb: add xspi parameter to qixis command
Add xspi boot source to qixis command to let the soc boot from
flex-nor flash chip.

Signed-off-by: Yuantian Tang <andy.tang@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-07-27 14:16:28 +05:30
Chaitanya Sakinam
cb1de6067a armv8: ls1012a: RGMII ports require internal delay
The correct setting for the RGMII ports on LS1012ARDB is to
enable delay on both Rx and Tx so the interface mode used should
be PHY_INTERFACE_MODE_RGMII_ID

Signed-off-by: Chaitanya Sakinam <chaitanya.sakinam@nxp.com>
Signed-off-by: Anji J <anji.jagarlmudi@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-07-27 14:16:28 +05:30
Udit Agarwal
3fba2311a3 include/configs: ls1012a: Remove fdt_high env variable
Remove "fdt_high" environment variable to use the bootm_size
to safely contain a kernel, device tree and initrd for
relocation.

Signed-off-by: Udit Agarwal <udit.agarwal@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-07-27 14:16:28 +05:30
Zhao Qiang
72298a638c config: lx2160/2a: enable dspi
Enable dspi in lx2160aqds tfa defconfig
Enable CONFIG_SPI_FLASH_SST/EON in config file.

Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-07-27 14:16:28 +05:30
Zhao Qiang
8b307b146a armv8: dts: fsl-lx2160a: add flash node under dspi to qds dts
Add flash node under dspi into fsl-lx2160a-qds.dtsi

Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-07-27 14:16:28 +05:30
Michael Walle
30325c2c4f crypto/fsl: fix unaligned access
On aarch64 running with dcache off, will result in an unaligned access
exception:

   => dcache off
   => hash sha1 $kernel_addr_r 100
   "Synchronous Abort" handler, esr 0x96000061
   elr: 00000000960317d8 lr : 00000000960316a4 (reloc)
   elr: 00000000fbd787d8 lr : 00000000fbd786a4
   [..]

The compiler emits a "stur x1, [x0, #12]". x1 is might just be 32 bit
aligned pointer. Remove the unused u64 element from the union to drop
the minimal alignment to 32 bit. Also remove the union, because it is
no more needed.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-07-27 14:16:28 +05:30
Biwen Li
af0e08ca10 I2C: ls1043a, ls1046a: enable SYS_I2C_MXC
This enables SYS_I2C_MXC to fix a bug that
failed to boot from sd card with
image u-boot-with-spl-pbl.bin

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-07-27 14:16:28 +05:30
Michael Walle
dd6df64c68 armv8: layerscape: rework spin table
There are two issues:

 (1) The spin table doesn't convert the endianness of the jump address.
     Although there is code for it, the result isn't used at all (x0).
 (2) If something goes wrong, the function returns. But that doesn't
     make sense at all.

Use the actual converted jump address as destination to fix. If
there is an error, jump to a trap loop. And rearrange the code exception
level switching code to make it smaller and clearer.

This reduces the size of the spin table code section from 696 bytes to
424 bytes. If CONFIG_ARMV8_SWITCH_TO_EL1 the code size reduced from 696
bytes to 632 bytes.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-07-27 14:16:28 +05:30
Michael Walle
16863da82a armv8: layerscape: relocate spin table if EFI_LOADER is enabled
On ARM64, a 64kb region is reserved for the runtime services code.
Unfortunately, this code overlaps with the spin table code, which also
needs to be reserved. Thus now that the code is relocatable, allocate a
new page from EFI, copy the spin table code into it, update any pointers
to the old region and the start the secondary CPUs.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-07-27 14:16:28 +05:30
Michael Walle
308deab9b1 armv8: layerscape: clean exported symbols in spintable.S
Add a new variable secondary_boot_code_start, which holds a pointer to
the start of the spin table code. This will help to relocate the code
section. While at it, move the size variable from the end to the
beginning so there is a common section for the variables. Remove any
other symbols.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-07-27 14:16:28 +05:30
Michael Walle
2e262111ea armv8: layerscape: drop first .ltorg directive in spintable.S
Now that the spin table is in a separate module, this is no longer
necessary. Drop it.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-07-27 14:16:28 +05:30
Michael Walle
86c31dad32 armv8: layerscape: make wake_secondary_core_n() static
This function is not used outside the module. Make it static.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-07-27 14:16:28 +05:30
Michael Walle
dcfbbed570 armv8: layerscape: simplify get_spin_tbl_addr() calls
There is no need to cast around. Assign the address to the local
variable and use it.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-07-27 14:16:27 +05:30
Michael Walle
c31ac97f96 armv8: layerscape: remove determine_mp_bootpg()
Only the PowerPC architecture needs this function. Remove it.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-07-27 14:16:27 +05:30
Michael Walle
b1c41231c4 armv8: layerscape: fix alignment for spin table
Fix the alignment so it will match the comments. The spin table has to
be 8 byte aligned, so ".align 3" is enough.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-07-27 14:16:27 +05:30
Michael Walle
2eca7b9704 armv8: layerscape: load function pointer using ADR
Don't use LDR to load a pointer to a function. This will generate a
literal which cannot be relocated. Use ADR which is PC-relative and
therefore can easily be relocated.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-07-27 14:16:27 +05:30
Michael Walle
f6c62f1c9e armv8: layerscape: move spin table into own module
Move it out of lowlevel.S into spintable.S. On layerscape, the secondary
CPUs are brought up in main u-boot. This will make it possible to only
compile the spin table code for the main u-boot and omit it in SPL.

This saves about 720 bytes in the SPL.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-07-27 14:16:27 +05:30
Michael Walle
3d3fe8b12d armv8: layerscape: properly use CPU_RELEASE_ADDR
The generic armv8 code already has support to bring up the secondary
cores. Thus, don't hardcode the jump in the layerscape lowlevel_init to
the spin table code; instead just return early and let the common armv8
code handle the jump. This way we can actually use the CPU_RELEASE_ADDR
feature.

Signed-off-by: Michael Walle <michael@walle.cc>
[Rebased, Removed kontron_sl28.h change as file does not exist]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-07-27 14:16:27 +05:30
Michael Walle
ae846a6119 armv8: layerscape: pretty print info about SMP cores
Make the print of the starting address a debug output and pretty print
the info about online cores.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-07-27 14:16:27 +05:30
Michael Walle
b27f48540e armv8: layerscape: fix spin-table support
Spin tables are broken with bootefi. This is because - in contrast to
the booti call chain - there is no call to smp_kick_all_cpus(). Due to
this missing call the secondary CPUs are never released from their "wait
for interrupt state", see secondary_boot_func() in lowlevel.S.

Originally, this "wait for interrupt" is there to make sure, the spin
table is cleared before the secondary cores read it for the first time.
But the boot flow for the layerscape architecture is different from
that. The CPUs are release from their BootROM _after_ U-Boot's
spin-table is cleared, see fsl_layerscape_wake_seconday_cores() in mp.c.
Thus, there is no need to wait for this interrupt and no need for
kicking all cores on cpu_release. An atomic 64bit write to the
spin-table and a "sev" is sufficient.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-07-27 14:16:27 +05:30
Kuldeep Singh
e0152dbed6 net: pfe_eth: Use spi_flash_read API to access flash memory
Current PFE firmware access spi-nor memory directly. New spi-mem
framework does not support direct memory access. So, let's use
spi_flash_read API to access memory instead of directly using it.

Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-07-27 14:16:27 +05:30
hui.song
02decd4e0c dm: armv8: gpio: include <asm/arch/gpio.h> for fsl-layerscape
Enable the gpio feature on fsl-layerscape platform.

Signed-off-by: hui.song <hui.song_1@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-07-27 14:16:27 +05:30
hui.song
08333fa50b armv8: gpio: add gpio feature
add one struct mpc8xxx_gpio_plat to enable gpio feature.

Signed-off-by: hui.song <hui.song_1@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-07-27 14:16:26 +05:30
Era Tiwari
e08bcc0e94 configs: ls1088ardb: Add support for usb boot target
LS1088A-RDB has MMC, SCSI, DHCP as boot targets,
but the USB support was missing.
Add support for USB as Boot_targets_devices.

Signed-off-by: Era Tiwari <era.tiwari@nxp.com>
Signed-off-by: Pramod Kumar <pramod.kumar_1@nxp.com>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-07-27 14:16:26 +05:30
Michael Walle
f8c5815c1b armv8: ls1028a: move FSL_LAYERSCAPE to kconfig
CONFIG_FSL_LAYERSCAPE is available in kconfig. There is no need to
define it per board; the ls1028a_common.h is really board dependent and
only fits to the NXP eval boards. Instead select CONFIG_FSL_LAYERSCAPE
when ARCH_LS1028A is selected.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-07-27 14:16:26 +05:30
Vladimir Oltean
e7005b3e80 fsl_dspi: Introduce DT bindings for CS-SCK and SCK-CS delays
Communication with some SPI slaves just won't cut it if these delays
(before the beginning, and after the end of a transfer) are not added to
the Chip Select signal.

These are a straight copy from Linux:
Documentation/devicetree/bindings/spi/spi-fsl-dspi.txt
drivers/spi/spi-fsl-dspi.c

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-07-27 14:16:26 +05:30
Simon Glass
347e0f00e8 binman: Re-enable concurrent tests
With the change to absolute imports the concurrent tests feature
unfortunately broke. Fix it.

We cannot easy add a warning, since the output messes up tests which check
the output.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-07-26 19:59:57 -06:00
Simon Glass
52b10dd7de binman: Don't change the descriptor in tests
At present testPackX86RomMeNoDesc removes the contents of the
descriptor.bin file and testPackX86RomMeMissingDesc removes the file
completely.

If a test that relies on this file happens to run after it is removed, it
will not work. Since we have no control over the selecting of tests that
run in parallel and series, we must avoid changing the files.

Update this tests to use separate files instead.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-07-26 19:59:57 -06:00
Patrick Delaunay
5d4f7b4e2a env: mmc: add redundancy support in mmc_offset_try_partition
Manage 2 copy at the end of the partition selected by config
"u-boot,mmc-env-partition" to save the U-Boot environment,
with CONFIG_ENV_SIZE and 2*CONFIG_ENV_SIZE offset.

This patch allows to support redundancy (CONFIG_ENV_OFFSET_REDUND).

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-07-26 14:35:30 -04:00
Patrick Delaunay
76b640c3f2 env: mmc: correct the offset returned by mmc_offset_try_partition
The output of the function mmc_offset_try_partition must be a
byte offset in mmc and not a multiple of blksz.

This function is used in mmc_offset(), called by mmc_get_env_addr()
and the offset is used in write_env(), erase_env() and read_env().

In these function, blk_start = offset / mmc->read_bl_len
or /write_bl_len so this offset is not a multiple of blksz.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-07-26 14:35:30 -04:00
Patrick Delaunay
2b2f727500 env: mmc: allow support of mmc_get_env_dev with OF_CONTROL
Use the weak function mmc_get_env_dev in mmc_offset_try_partition
function to allow dynamic selection of mmc device to use
and no more use directly the define CONFIG_SYS_MMC_ENV_DEV.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-07-26 14:35:30 -04:00
Patrick Delaunay
acbf93b526 test: env: add test for env info sub-command
Add a pytest for testing the env info sub-command:

test_env_info: test command with several option that
can be executed on real hardware device without assumption

test_env_info_sandbox: test the result on sandbox
with a known ENV configuration: ready & default & persistent

The quiet option '-q' is used for support in shell test;
for example:
  if env info -p -d -q; then env save; fi

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
2020-07-26 14:35:30 -04:00
Patrick Delaunay
7d813449b8 configs: sandbox: Enable sub command 'env info'
Enable support for sub command 'env info' in sandbox
with CONFIG_CMD_NVEDIT_INFO. This is aimed primarily
at adding unit test.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-26 14:35:30 -04:00
Patrick Delaunay
2f96b3238c cmd: env: check real location for env info command
Check the current ENV location, dynamically provided by the weak
function env_get_location to be sure that the environment can be
persistent.

The compilation flag ENV_IS_IN_DEVICE is not enough when the board
dynamically select the available storage location (according boot
device for example).

This patch solves issue for stm32mp1 platform, when the boot device
is USB.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2020-07-26 14:35:30 -04:00
Patrick Delaunay
6718ebd032 cmd: env: add option for quiet output on env info
The "env info" can be use for test with -d and -p parameter,
in scripting case the output of the command is not needed.

This patch allows to deactivate this output with a new option "-q".

For example, we can save the environment if default
environment is used and persistent storage is managed with:
  if env info -p -d -q; then env save; fi

Without the quiet option, I have the unnecessary traces
First boot:
      Default environment is used
      Environment can be persisted
      Saving Environment to EXT4... File System is consistent

Next boot:
      Environment was loaded from persistent storage
      Environment can be persisted

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2020-07-26 14:35:30 -04:00
Patrick Delaunay
8968288cb4 env: add failing trace in env_save
Add trace in env save to indicate any errors to end user and avoid
silent output when the command 'env save' is not executed.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-07-26 14:35:30 -04:00
Patrick Delaunay
d5a6a5a927 env: correct overflow check of env_has_init size
Correct the overflow check of the bit-field env_has_init with
the max value of env_location= ENVL_COUNT and no more with the
size of env_locations.

This bit-field is indexed by this enumerate and not by the position in
the env_locations (only used in env_get_location) and the
2 values are different, depending of thea ctivated CONFIG_ENV_IS_ options.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-07-26 14:35:30 -04:00
David Woodhouse
6731bef696 env/fat.c: allow loading from a FAT partition on the MMC boot device
I don't want to have to specify the device; only the partition.

This allows me to use the same image on internal eMMC or SD card for
Banana Pi R2, and it finds its own environment either way.

Signed-off-by: David Woodhouse <dwmw2@infradead.org>
[trini: Add #if/#else/#endif logic around CONFIG_SYS_MMC_ENV_DEV usage,
        whitespace changes]
Signed-off-by: Tom Rini <trini@konsulko.com>
2020-07-26 14:35:12 -04:00
Masahiro Yamada
2548493ab4 treewide: convert devfdt_get_addr() to dev_read_addr()
When you enable CONFIG_OF_LIVE, you will end up with a lot of
conversions.

To generate this commit, I used coccinelle excluding drivers/core/,
include/dm/, and test/

The semantic patch that makes this change is as follows:

  <smpl>
  @@
  expression dev;
  @@
  -devfdt_get_addr(dev)
  +dev_read_addr(dev)
  </smpl>

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-07-25 14:46:57 -06:00
Masahiro Yamada
cf081a52ad treewide: remove (phys_addr_t) casts from devfdt_get_addr()
This cast is unneeded.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-07-25 14:46:57 -06:00
Masahiro Yamada
8613c8d897 treewide: convert (void *)devfdt_get_addr() to dev_read_addr_ptr()
Use the _ptr suffixed variant instead of casting. Also, convert it to
dev_read_addr_ptr(), which is safe to CONFIG_OF_LIVE.

One curious part is an error check like follows in
drivers/watchdog/omap_wdt.c:

    priv->regs = (struct wd_timer *)devfdt_get_addr(dev);
    if (!priv->regs)
            return -EINVAL;

devfdt_get_addr() returns FDT_ADDR_T_NONE (i.e. -1) on error.
So, this code does not catch any error in DT parsing.

dev_read_addr_ptr() returns NULL on error, so this error check
will work.

I generated this commit by the following command:

 $ find . -name .git -prune -o -name '*.[ch]' -type f -print | \
   xargs sed -i -e 's/([^*)]*\*)devfdt_get_addr(/dev_read_addr_ptr(/'

I manually fixed drivers/usb/host/ehci-mx6.c

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-07-25 14:46:57 -06:00
Masahiro Yamada
7d8073e7cf fdt_support: skip MTD node with "disabled" in fdt_fixup_mtdparts()
Currently, fdt_fixup_mtdparts() only checks the compatible property.
It is pointless to fix up the disabled node.

Skip the node if it has the property:

  status = "disabled"

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-25 14:46:57 -06:00
Masahiro Yamada
53a896649a fdt_support: call mtdparts_init() after finding MTD node to fix up
Platform code can call fdt_fixup_mtdparts() in order to hand U-Boot's
MTD partitions over to the Linux device tree.

Currently, fdt_fixup_mtdparts() calls mtdparts_init() in its entry.
If no target MTD device is found, an error message like follows is
displayed:

    Device nand0 not found!

This occurs when the same code (e.g. arch/arm/mach-uniphier/fdt-fixup.c)
is shared among several boards, but not all of them support an MTD device.

Parse the DT first, then call mtdparts_init() only when the target MTD
node is found.

Yet, you still need to call mtdparts_init() before device_find().

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-25 14:46:57 -06:00
Heinrich Schuchardt
331caeafad test/dm: check if devices exist
Running 'ut dm' on the sandbox without -D or -d results in segmentation
faults due to NULL pointer dereferences.

Check that device pointers are non-NULL before using them.

Use ut_assertnonnull() for pointers instead of ut_assert().

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Tested-by: Philippe Reynes <philippe.reynes@softathome.com>
2020-07-25 14:46:57 -06:00
Dave Gerlach
5ab71ea4b1 arm: mach-k3: Use SOC driver for device identification
Make use of UCLASS_SOC to find device family and revision for
print_cpuinfo.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
2020-07-25 14:46:57 -06:00
Dave Gerlach
29eb1c4aa6 configs: j721e_evm: Enable CONFIG_SOC_DEVICE and CONFIG_SOC_DEVICE_TI_K3
Enable CONFIG_SOC_DEVICE and CONFIG_SOC_DEVICE_TI_K3 so the TI K3 SoC
driver can be used for SoC detection.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
2020-07-25 14:46:57 -06:00
Dave Gerlach
bc2a293e42 configs: am65x_evm: Enable CONFIG_SOC_DEVICE and CONFIG_SOC_DEVICE_TI_K3
Enable CONFIG_SOC_DEVICE and CONFIG_SOC_DEVICE_TI_K3 so the TI K3 SoC
driver can be used for SoC detection.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
2020-07-25 14:46:57 -06:00
Dave Gerlach
e8918bccd8 arm: dts: k3-j721e-mcu-wakeup: Introduce chipid node
Introduce a chipid node to provide a UCLASS_SOC driver to identify TI K3
SoCs.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
2020-07-25 14:46:57 -06:00
Dave Gerlach
bec8b94e08 arm: dts: k3-am65-wakeup: Introduce chipid node
Introduce a chipid node to provide a UCLASS_SOC driver to identify TI K3
SoCs.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
2020-07-25 14:46:57 -06:00
Dave Gerlach
3e1b59cf3b dm: soc: Introduce soc_ti_k3 driver for TI K3 SoCs
Introduce an soc_ti_k3_driver that allows identification and selection
of SoC specific data based on the JTAG ID register for device
identification, as described for AM65x[0] and J721E[1] devices.

[0] http://www.ti.com/lit/ug/spruid7e/spruid7e.pdf
[1] http://www.ti.com/lit/ug/spruil1a/spruil1a.pdf

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
2020-07-25 14:46:57 -06:00
Dave Gerlach
21e3c219ae test: Add tests for SOC uclass
Add a sandbox SOC driver, and some tests for the SOC uclass.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
2020-07-25 14:46:57 -06:00
Dave Gerlach
6d3b82df83 dm: soc: Introduce UCLASS_SOC for SOC ID and attribute matching
Introduce UCLASS_SOC to be used for SOC identification and attribute
matching based on the SoC ID info. This allows drivers to be provided
for SoCs to retrieve SoC identifying information and also for matching
device attributes for selecting SoC specific data.

This is useful for other device drivers that may need different
parameters or quirks enabled depending on the specific device variant in
use.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
2020-07-25 14:46:57 -06:00
Dave Gerlach
726eb121b8 doc: Add new doc for soc ID driver model
Add a new documentation file for UCLASS_SOC and its usage to describe
the SoC Device ID framework that allows SoC identification and device
data matching.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-25 14:46:57 -06:00
Masahiro Yamada
8ce8e42e86 fdt_support: add static to fdt_node_set_part_info()
This function is only called from fdt_fixup_mtdpart() in the same file.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-25 14:46:57 -06:00
Nicolas Boichat
e1db5c9b08 patman: When no tracking branch is provided, tell the user
The user can either count the number of patches, or provide a
tracking branch.

Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-25 14:46:57 -06:00
Nicolas Boichat
949775689e patman: Make sure sendemail.suppresscc is (un)set correctly
Setting sendemail.suppresscc to all or cccmd leads to --cc-cmd
parameter being ignored, and emails going either nowhere, or
just to the To: line maintainer.

Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-25 14:46:57 -06:00
Michal Simek
50c7b723bd Revert "lib: fdt: Split fdtdec_setup_mem_size_base()"
This reverts commit 3ebe09d09a.

There is no user of this split function that's why remove it.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-25 14:46:57 -06:00
Michal Simek
62897c4344 Revert "lib: fdt: Split fdtdec_setup_memory_banksize()"
This reverts commit 118f4d4559.

There is no user of this split function that's why remove it.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-25 14:46:57 -06:00
Michal Simek
988341d84a ARM: rmobile: Switch back to fdtdec_setup_memory/banksize_fdt()
The commit 361377dbdb ("ARM: rmobile: Merge prior-stage firmware DT
fragment into U-Boot DT on Gen3") reverted changes introduced by commit
175f502734 ("ARM: renesas: Configure DRAM size from ATF DT fragment")
that's why there is no reason to use functions with _fdt() suffix because
parameter is gd->fdt_blob as is already for functions without _fdt()
suffix.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-25 14:46:57 -06:00
Patrick Delaunay
e5ff9ab70a Add information for skipped commit options
The unsupported Commit-xxx option are silently skipped
and removed as 're_remove=Commit-\w*', this patch adds
warning message in this case to detect misspelled issue
for the 2 supported options:
  Commit-notes:
  Commit-changes:

For example: the final 's' is missing (Commit-note:)

NB: no issue for Series-xxx option as only the supported
    options are accepted (see valid_series in series.py)

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-25 14:46:57 -06:00
Philippe Reynes
e8781dcc89 lib: libfdt: fdt_region: avoid NULL pointer access
The function fdt_find_regions look in the exclude list for each
property, even if the name is NULL. It could happen if the fit
image is corrupted. On sandbox, it generates a segfault.

To avoid this issue, if the name of a property is NULL, we report
an error and avoid looking in the exclude list.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-25 14:46:57 -06:00
Patrick Delaunay
7058dd071a patman: Detect unexpected END
Detect unexpected 'END' line when a section is not detected.

This patch detect issue when tag name for section start is misspelled,
for example 'Commit-note:' for 'Commit-notes:'

  Commit-note:
  ....
  END

Then 'Commit-note:' is removed silently by re_remove = "Commit-\w*:"
but 'END' is kept in commit message.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-25 14:46:57 -06:00
Simon Glass
961420fa5f cpu: Convert the methods to use a const udevice *
These functions should not modify the device. Convert them to const so
that callers don't need to cast if they have a const udevice *.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-07-25 14:46:57 -06:00
Simon Glass
fdc34368dd binman: Add support for generating a FIT
FIT (Flat Image Tree) is the main image format used by U-Boot. In some
cases scripts are used to create FITs within the U-Boot build system. This
is not ideal for various reasons:

- Each architecture has its own slightly different script
- There are no tests
- Some are written in shell, some in Python

To help address this, add support for FIT generation to binman. This works
by putting the FIT source directly in the binman definition, with the
ability to adjust parameters, etc. The contents of each FIT image come
from sub-entries of the image, as is normal with binman.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-07-25 14:46:57 -06:00
Simon Glass
c063917906 dtoc: Allow adding variable-sized data to a dtb
Add a method for adding a property containing arbitrary bytes. Make sure
that the tree can expand as needed in this case.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-07-25 14:46:57 -06:00
Simon Glass
152b246298 mkimage: Allow updating the FIT timestamp
Normally the FIT timestamp is created the first time mkimage is run on a
FIT, when converting the source .its to the binary .fit file. This
corresponds to using the -f flag. But if the original input to mkimage is
a binary file (already compiled) then the timestamp is assumed to have
been set previously.

Add a -t flag to allow setting the timestamp in this case.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-25 14:46:57 -06:00
Simon Glass
b3295fd4e3 binman: Allow zero-length entries to overlap
Some binary blobs unfortunately obtain their position in the image from
other binary blobs, such as Intel's 'descriptor'. In this case we cannot
rely on packing to work. It is not possible to produce a valid image in
any case, due to the missing blobs.

Allow zero-length overlaps so that this does not cause any problems.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-25 14:46:57 -06:00
Simon Glass
0ba4b3dfee binman: Allow missing Intel blobs
Update the Intel blob entries to support missing binaries.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-25 14:46:57 -06:00
Simon Glass
b1cca9552c binman: Detect when valid images are not produced
When external blobs are missing, show a message indicating that the images
are not functional.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-07-25 14:46:57 -06:00
Simon Glass
38fdb4cb35 patman: Update errors and warnings to use stderr
When warnings and errors are produced by tools they should be written to
stderr. Update the tout implementation to handle this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-25 14:46:57 -06:00
Simon Glass
4f9f1056ec binman: Allow external binaries to be missing
Sometimes it is useful to build an image even though external binaries are
not present. This allows the build system to continue to function without
these files, albeit not producing valid images.

U-Boot does with with ATF (ARM Trusted Firmware) today.

Add a new flag to binman to request this behaviour.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-25 14:46:57 -06:00
Simon Glass
04e6a6b9ec binman: Convert existing binary blobs to blob_ext
Many of the existing blobs rely on external binaries which may not be
available. Move them over to use blob_ext to indicate this.

Unfortunately cros-ec-rw cannot use this class because it inherits
another. So set the 'external' value for that class.

While we are here, drop the import of Entry since it is not used (and
pylint3 complains).

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-07-25 14:46:57 -06:00
Simon Glass
ce867ad7c8 binman: Add an etype for external binary blobs
It is useful to be able to distinguish between ordinary blobs such as
u-boot.bin and external blobs that cannot be build by the U-Boot build
system. If the external blobs are not available for some reason, then we
know that a value image cannot be built.

Introduce a new 'blob-ext' entry type for that.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-25 14:46:57 -06:00
Simon Glass
34861d506c binman: Use super() instead of specifying parent type
It is easier and less error-prone to use super() when the parent type is
needed. Update binman to remove the type names.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-25 14:46:57 -06:00
Marek Vasut
f23a785cfb net: dc2114x: Add DM support
With all the changes in place, add support for DM into the
dc2114x driver.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
2020-07-25 14:20:56 +02:00
Adam Ford
59028798ab ARM: rmobile: Add Beacon EmbeddedWorks RZG2M Dev Kit
The Beacon EmbeddedWorks kit is based on the R8A774A1 SoC also
known as the RZ/G2M.

The kit consists of a SOM + Baseboard and supports microSD,
eMMC, Ethernet, a couple celular radios, two CAN interfaces,
Bluetooth and WiFi.

Signed-off-by: Adam Ford <aford173@gmail.com>
2020-07-25 14:19:26 +02:00
Marek Vasut
bc4666acf3 net: dc2114x: Split common parts of non-DM functions out
Split the common code from the non-DM code, so it can be reused by
the DM code later. As always, the recv() function had to be split
into the actual receiving part and free_pkt part to fit with the
DM.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
2020-07-25 11:24:02 +02:00
Marek Vasut
05c4917958 net: dc2114x: Split RX path
Split the RX data check from the rest of the RX function, so that
the check can be performed separately from the processing of the
packet and the release of the received packet once the processing
is finished.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
2020-07-25 11:24:02 +02:00
Marek Vasut
32d8d11800 net: dc2114x: Add RX/TX rings into the private data
The RX/TX DMA descriptor rings are per-device-instance private data,
so move them into the private data.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
2020-07-25 11:24:02 +02:00
Marek Vasut
8a5c6f158d net: dc2114x: Pass PCI BDF into phys_to_bus()
This is a trick in preparation for adding DM support. By passing in
the PCI BDF into the phys_to_bus() macros and calling that dev, we
can substitute dev with udevice when DM support lands and do minor
adjustment to the macros to support both DM and non-DM operation.
No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
2020-07-25 11:24:02 +02:00
Marek Vasut
fcd6217813 net: dc2114x: Pass private data around
This patch replaces the various uses of struct eth_device for accessing
device private data with struct dc2114x_priv, which is compatible both
with DM and non-DM operation.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
2020-07-25 11:24:02 +02:00
Marek Vasut
2301a4be6c net: dc2114x: Introduce private data
Introduce dc2114x_priv, which is a super-structure around eth_device
and tracks per-device state and the device IO address.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
2020-07-25 11:24:02 +02:00
Marek Vasut
02b95a4b41 net: dc2114x: Use standard I/O accessors
The current dc21x4x driver accesses its memory mapped registers directly
instead of using the standard I/O accessors. This can cause problems on
some systems as the accesses can get out of order. So convert the direct
volatile dereferences to use the normal in/out macros.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
2020-07-25 11:24:02 +02:00
Marek Vasut
9b98f20494 net: dc2114x: Drop update_srom()
This code is never used, remove it.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
2020-07-25 11:24:02 +02:00
Marek Vasut
a410f13dfe net: dc2114x: Add Kconfig entries
Add Kconfig entries for the dc2114x driver and convert various boards.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
2020-07-25 11:24:02 +02:00
Marek Vasut
777aa71531 net: dc2114x: Support all DC2114x
For the usage in this driver, the chips are identical,
so support all of them.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
2020-07-25 11:24:01 +02:00
Marek Vasut
75e375b0a9 net: dc2114x: Use PCI_DEVICE() to define PCI device compat list
Use this macro to fully fill the PCI device ID table. This is mandatory
for the DM PCI support, which checks all the fields.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
2020-07-25 11:24:01 +02:00
Adam Ford
4ce9566e43 mmc: renesas-sdhi: Enable support for R8A774A1
The r8a774a1 is compatible with the generic rcar-gen3-sdhi controller.
This patch adds the compatibilty flag, to support the SDHI controller.

Signed-off-by: Adam Ford <aford173@gmail.com>
2020-07-25 11:16:40 +02:00
Adam Ford
43ef80325b pinctrl: renesas: Enable R8A774A1 PFC tables
The PFC tables for the R8A774A1 are already available, but they
not enabled.

This patch adds the Kconfig option and builds the corresponding file
when PINCTRL_PFC_R8A774A1 is enabled.

Signed-off-by: Adam Ford <aford173@gmail.com>
2020-07-25 11:16:39 +02:00
Adam Ford
e9a52c4439 clk: renesas: Add R8A774A1 clock tables
This sync's the clock tables with the official release from
Linux 5.8-RC2 and update r8a774a1_mstp_table from Ref Manual
v1.00.

Signed-off-by: Adam Ford <aford173@gmail.com>
2020-07-25 11:16:39 +02:00
Adam Ford
3aabb0c3f1 ARM: dts: r8a774a1: Import DTS from Linux 5.8-rc1
This patch imports the device tree and required bindings to permit
the device tree to build for the R8Z774A1 (RZ/G2M).

Signed-off-by: Adam Ford <aford173@gmail.com>
2020-07-25 11:16:39 +02:00
Adam Ford
dbabfcc873 ARM: renesas: Add basic R8A774A1 Support
In order to build boards based on the R8A774A1, there needs to
be a config option from which to enable other drivers and/or flags
for this SoC.

Signed-off-by: Adam Ford <aford173@gmail.com>
2020-07-25 11:16:39 +02:00
Simon Glass
73bc9e2e21 binman: Adjust pylibfdt for incremental build
If the pylibfdt shared-object file is detected, then Python assumes that
the libfdt.py file exists also.

Sometimes when an incremental build aborts, the shared-object file is
built but the libfdt.py is not. The only way out at this point is to use
'make mkproper', or similar.

Fix this by removing the .so file before it is built. This seems to make
Python rebuild everything.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-24 19:25:15 -06:00
Simon Glass
c6162cf87c binman: Fix a few typos in the entry docs
Some typos have been fixed in the generated entry docs but the code was
not updated. Fix this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-07-24 19:25:15 -06:00
Simon Glass
0dc706fe54 binman: Add support for calling mkimage
As a first step to integrating mkimage into binman, add a new entry type
that feeds data into mkimage for processing and incorporates that output
into the image.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-07-24 19:25:15 -06:00
Simon Glass
b5287c4126 binman: Set a default toolpath
When binman is run from 'make check' it is given a toolpath so that the
latest tools (e.g. mkimage) are used. When run manually with no toolpath,
it relies on the system mkimage. But this may be missing or old.

Make some effort to find the built-from-soruce version by looking in the
current directory and in the builds created by 'make check'.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-07-24 19:25:15 -06:00
Simon Glass
32eb66d2d4 binman: Specify the toolpath when running test coverage
At present binman's test coverage runs without a toolpath set. This means
that the system tools will be used. That may not be correct if they are
out of date or missing and this can result in a reduction in test coverage
below 100%.

Provide the toolpath to binman in this case.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-07-24 19:25:15 -06:00
Simon Glass
fdb3040e96 binman: Correct the search patch for pylibfdt
Now that binman uses tools/ as its base directory for importing modules,
the path to the pylibfdt build by U-Boot is incorrect. Fix it with a new
path.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-24 19:25:15 -06:00
Simon Glass
5de9b9c03c binman: cbfs: Fix IFWI typo
This comment references the wrong thing. Fix it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-24 19:25:15 -06:00
Simon Glass
6c8e0bfe6e binman: Output errors to stderr
At present binman outputs errors to stdout which means that fails are
effectively silent when printed by buildman, for example. Fix this by
outputing errors to stderr.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-24 19:25:15 -06:00
Simon Glass
0d5addaf20 .gitignore: Ignore Python 3 cache directories
These can appear when moving between branches that have different tools
in the tree. Ignore them.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-24 19:25:15 -06:00
Simon Glass
6d65ac310f dm: core Fix long line in device_bind_common()
Fix an over-length line in this function.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-24 19:25:15 -06:00
Simon Glass
c9360f1626 patman: Add a -D option to enable debugging
Most users don't want to see traceback errors. Add an option to enable
them for debugging. Disable them by default.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-07-24 19:25:15 -06:00
Simon Glass
7207e2b984 patman: Support collecting response tags in Patchstream
Collect response tags such as 'Reviewed-by' while parsing the stream.
This allows us to see what tags are present.

Add a new 'Fixes' tag also, since this is now quite common.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-07-24 19:25:15 -06:00
Simon Glass
3c541c0836 patman: Allow disabling 'bright' mode with Print output
At present all text is marked bright, which makes it stand out on the
terminal. Add a way to disable that, as is done with the Color class.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-07-24 19:25:15 -06:00
Simon Glass
6bb74de7ed patman: Add a 'test' subcommand
At present we use --test to indicate that tests should be run. It is
better to use a subcommand for list, like binman. Change it and adjust
the existing code to fit under a 'send' subcommand, the default.

Give this subcommand the same default arguments as the others.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-07-24 19:25:15 -06:00
Simon Glass
c4e79029e2 patman: Allow different commands
At present patman only does one thing so does not have any comments. We
want to add a few more command, so create a sub-parser for the default
command ('send').

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-07-24 19:25:15 -06:00
Simon Glass
fda1e372d3 patman: Convert to ArgumentParser
Convert from OptionParser to ArgumentParser to match binman. With this we
can easily add sub-commands.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-07-24 19:25:15 -06:00
Simon Glass
137947e05b patman: Allow skipping patches at the end
The -s option allows skipping patches at the top of the branch. Sometimes
there are commits at the bottom that need to be skipped. At present it is
necessary to count the number of commits and then use -c to tell patman
how many to process.

Add a -e option to easily skip a number of commits at the bottom of the
branch.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-07-24 19:25:15 -06:00
Simon Glass
262130f57c patman: Allow creating patches for another branch
Add a -b option to allow patches to be created from a branch other than
the current one.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-07-24 19:25:15 -06:00
Simon Glass
fd70986a62 patman: Add a test that uses gitpython
It is convenient to use gitpython to create a real git repo for testing
patman's operation. Add a test for this. So far it just checks that patman
produces the right number of patches for a branch.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-07-24 19:25:15 -06:00
Simon Glass
7d5b04e8a5 patman: Move main code out to a control module
To make testing easier, move the code out from main into a separate
'control' module and split it into four parts: setup, preparing patches,
checking patches and emailing patches.

Add comments and fix a few code-style issues while we are here.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-07-24 19:25:15 -06:00
Simon Glass
0b3d24a779 patman: Use test_util to show test results
This handles skipped tests correctly, so use it instead of the existing
code.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-07-24 19:25:15 -06:00
Tom Rini
ada61f1ee2 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-riscv
- Fix SiFive HiFive Unleashed board booting failure problem.
- Enable SiFive fu540 PWM driver.
- Support SiFive fu540: SPI boot.
- Update OpenSBI used for RISC-V CI testing.
- Revert "riscv: Allow use of reset drivers".
- Revert "Revert "riscv: sifive: fu540: Add gpio-restart support"".
- sysreset: syscon:
        - Don't assume default value for offset and mask property.
        - Support value property.
- qemu: Add syscon reboot and poweroff support.
- Fix SIFIVE debug serial dependency.
- Fix linking error when building u-boot-spl with no SMP support.
- AE350 use fdtdec_get_addr_size_auto_noparent to parse smc reg.
- Make memory node available to SPL in hifive-unleashed-a00-u-boot.dtsi
- SiFive fu540 avoid using hardcoded ram base and size.
2020-07-24 08:43:08 -04:00
Tom Rini
7208396bbf Revert "Merge tag 'dm-pull-20jul20' of git://git.denx.de/u-boot-dm"
This reverts commit 5d3a21df66, reversing
changes made to 56d37f1c56.

Unfortunately this is causing CI failures:
https://travis-ci.org/github/trini/u-boot/jobs/711313649

Signed-off-by: Tom Rini <trini@konsulko.com>
2020-07-24 08:42:06 -04:00
Bin Meng
ecb70bdb9f ram: sifive: Avoid using hardcoded ram base and size
At present the SiFive FU540 RAM driver uses hard-coded memory base
address and size to initialize the DDR controller. This may not be
true when this driver is used on another board based on FU540.

Update the driver to read the memory information from DT and use
that during the initialization.

Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Leo Liang <ycliang@andestech.com>
Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com>
2020-07-24 14:56:29 +08:00
Bin Meng
142dd57c5d riscv: dts: hifive-unleashed-a00: Make memory node available to SPL
Make memory node available to SPL in prepration to updates to SiFive
DDR RAM driver to read memory information from DT.

Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com>
2020-07-24 14:56:29 +08:00
Rick Chen
e8fa43182a riscv: ae350: Use fdtdec_get_addr_size_auto_noparent to parse smc reg
Use fdtdec_get_addr_size_auto_noparent to read the "reg" property
instead of fdtdec_get_addr. This will increase the compatibility
of dtb parsing.

Signed-off-by: Rick Chen <rick@andestech.com>
Acked-by: Leo Liang <ycliang@andestech.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Leo Liang <ycliang@andestech.com>
2020-07-24 14:56:24 +08:00
Leo Yu-Chi Liang
e491e15a3f riscv: Fix linking error when building u-boot-spl with no SMP support
Switch off SMP support when building u-boot-spl would cause linking error as follow:
undefined reference to 'secondary hart relocate' and 'smp_call_function'.
Add macro to wrap up proper code region that needs SMP configuration on.

Signed-off by: Leo Liang <ycliang@andestech.com>
Cc: rick@andestech.com
Reviewed-by: Bin Meng <bin.meng@windriver.com>
2020-07-24 14:56:13 +08:00
Michal Simek
27b4a4abe6 serial: Fix SIFIVE debug serial dependency
The commit 4cc24aeaf4 ("serial: Add missing Kconfig dependencies for
debug consoles") has added incorrect dependency for SIFIVE debug uart which
should depend on SIFIVE driver instead of PL01x.

Fixes: 4cc24aeaf4 ("serial: Add missing Kconfig dependencies for debug consoles")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Leo Liang <ycliang@andestech.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
2020-07-24 14:56:04 +08:00
Bin Meng
a0cc38ab44 riscv: qemu: Add syscon reboot and poweroff support
This adds syscon reboot and poweroff support to QEMU RISC-V.

Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com>
2020-07-24 14:55:55 +08:00
Bin Meng
9cdfade85e sysreset: syscon: Support value property
Per the DT binding, <mask> and <value> property can have either one
or both, and if <value> is missing, <mask> should be used, which is
what current U-Boot sysreset_syscon driver supports.

This adds support to the <value> property to the driver, and <mask>
semantics is updated to really be a mask to the value if both exist.

Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com>
2020-07-24 14:55:49 +08:00
Bin Meng
1ce8182b0f sysreset: syscon: Don't assume default value for offset and mask property
Per the DT binding, <offset> is a required property. Let's abort
the probe if it is missing. For the <mask> property, current codes
assume a default value of zero, which is not correct either.

Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com>
2020-07-24 14:55:43 +08:00
Bin Meng
265d46ba13 Revert "Revert "riscv: sifive: fu540: Add gpio-restart support""
This reverts commit 23da3c682a.

Now the build failure of sifive_fu540_defconfig board has been fixed,
revert this "revert patch".

Signed-off-by: Bin Meng <bin.meng@windriver.com>
2020-07-24 14:55:31 +08:00
Bin Meng
6b62495026 Revert "riscv: Allow use of reset drivers"
This reverts commit 958a3f464c.

A more appropriate change below is already in mainline.
Commit fd31e4fd18 ("riscv: Do not build reset.c if SYSRESET is on")

Revert this patch, so that U-Boot can be built successfully for
SiFive Fu540 board.

Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Leo Liang <ycliang@andestech.com>
2020-07-24 14:55:31 +08:00
Bin Meng
d20d0a5777 azure: gitlab: travis: Update OpenSBI used for RISC-V testing
Change to use OpenSBI release v0.8 generic platform images for QEMU
RISC-V CI testing for azure, gitlab and travis-ci.

Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2020-07-24 14:55:24 +08:00
Jagan Teki
2270ae6388 sifive: fu540: Enable SF distro bootcmd
Enable SPI flash(SF) distro boot command in Sifive FU540.

This distro boot will read the boot script at specific
location at the flash and start sourcing the same.

Included the SF device at the last of the target devices
list since all the rest of the devices on the list have
more possibility to boot the distribution due to the
size of the SPI flash is concern.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
2020-07-24 14:55:19 +08:00
Jagan Teki
ca0f93fb74 sifive: fu540: Add boot flash script offset, size
HiFive-Unleashed-A00 has SPI flash with 32MiB size.
So, let's use the script offset at the end of 4K.
This way it cannot overlap any offsets being used
by software components in flash layout.

So, SF distrocmd will pick the script at desired
script address and run.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
2020-07-24 14:55:19 +08:00
Jagan Teki
662d518e8a sifive: fu540: Mark the default env as SPI flash
Mark the default U-Boot environment as SPI flash since
this is an on board flash device.

Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Tested-by: Bin Meng <bin.meng@windriver.com>
2020-07-24 14:55:19 +08:00
Jagan Teki
ff7d25e8db env: Enable SPI flash env for SiFive FU540
SPI flash device on HiFive Unleashed has 32MiB Size.

This patch adds SPI flash environment after U-Boot proper
partition with a size of 128KiB.

SPI flash partition layout(32MiB):
    0 - 34	: reserved for GPT header
   35 - 39	: unused
   40 - 2087	: loader1 (SPL, FSBL)
 2088 - 10279	: loader2 (U-Boot proper, U-Boot)
10280 - 10535	: environment
10536 - 65494	: rootfs
65528 - 65536	: distro script

Note: the loader1 must start from 40th sector even though
there are 6 free sectors prior since 40th sector is nearest
flash sector boundary. 

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Tested-by: Bin Meng <bin.meng@windriver.com>
2020-07-24 14:55:19 +08:00
Jagan Teki
4243ff11fe sifive: fu540: Add Booting from SPI
Add booting from SPI for SiFive Unleashed board.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Tested-by: Bin Meng <bin.meng@windriver.com>
2020-07-24 14:55:19 +08:00
Jagan Teki
868e295ef7 sifive: fu540: Add runtime boot mode detection
Add support to detect boot mode at runtime for
SiFive FU540 boards.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Tested-by: Bin Meng <bin.meng@windriver.com>
2020-07-24 14:55:19 +08:00
Pragnesh Patel
3d5ac3536b riscv: sifive: fu540: Enable SiFive PWM driver
This patch enables SiFive PWM driver for the SiFive
Unleashed board.

Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
2020-07-24 14:55:11 +08:00
Bin Meng
a0018fc820 riscv: Make SiFive HiFive Unleashed board boot again
Commit 40686c394e ("riscv: Clean up IPI initialization code")
caused U-Boot failed to boot on SiFive HiFive Unleashed board.

The codes inside arch_cpu_init_dm() may call U-Boot timer APIs
before the call to riscv_init_ipi(). At that time the timer register
base (e.g.: the SiFive CLINT device in this case) is unknown yet.

It might be the name riscv_init_ipi() that misleads people to only
consider it is related to IPI, but in fact the timer capability is
provided by the same SiFive CLINT device that provides the IPI.
Timer capability is needed for both UP and SMP.

Considering that the original refactor does have benefits, that it
makes the IPI code more similar to U-Boot initialization idioms.
It also removes some quite ugly macros. Let's do the minimal revert
instead of a complete revert, plus a fixes to arch_cpu_init_dm() to
consider the SPL case.

Fixes: 40686c394e ("riscv: Clean up IPI initialization code")
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Tested-by: Leo Liang <ycliang@andestech.com>
2020-07-24 14:55:04 +08:00
Tom Rini
5d3a21df66 Merge tag 'dm-pull-20jul20' of git://git.denx.de/u-boot-dm
binman support for FIT
new UCLASS_SOC
patman switch 'test' command
minor fdt fixes
patman usability improvements
2020-07-23 15:56:06 -04:00
Tom Rini
56d37f1c56 Merge tag 'efi-2020-10-rc1-5' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi
Pull request for UEFI sub-system for efi-2020-10-rc1 (5)

The series provides bug fixes for:

* crash in OS when accessing UEFI variables
* returning from UEFI fit images to U-Boot
* error handling for variable services provided by OP-TEE
* error handling in EFI_FILE_PROTOCOL.Read()
* missing function documentation

The first patches needed to use intermediate certificates for
secure boot are added. (The rest of the series requires
updating sbsigntool in our CI systems.)

Logging is enabled in the bootefi command.
2020-07-23 08:57:35 -04:00
Tom Rini
95fc1f1647 Merge tag 'u-boot-rockchip-20200722' of https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip
- New rk3326 board: Hardkernel Odroid Go2;
- Update board config and dts for RockPI 4/N8/N10;
- Update led boot on support for roc-rk3399-pc;
- Enable SPI Flash suppor for rk3328 rock64 board;
- Update rockchip pcie phy to use generic framework;
2020-07-22 11:30:52 -04:00
Jagan Teki
8bedcf0ef9 rockchip: rock-p-n8/n10: Disable RAM_ROCKCHIP_DEBUG
Disable ram rockchip debug driver for ROCKPi N8/N10 boards
since we have verified ram in many instances with respective
U-Boot versions.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-22 20:55:13 +08:00
Jagan Teki
318392a745 arm64: dts: rockchip: Add u-boot, spl-boot-order for ROCKPi N10
Add u-boot,spl-boot-order for ROCKPi N10, so-that it can able
to boot from eMMC and SDMMC in order.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-22 20:55:13 +08:00
Jagan Teki
cfcbcb4668 rockchip: rock-pi-n10: Enable PCI/NVME
Enable PCI/NVME for M.2 Slot on RockPI-4 boards.

=> nvme info
Device 0: Vendor: 0x144d Rev: 4L1QCXB7 Prod: S35FNX0J623292
            Type: Hard Disk
            Capacity: 122104.3 MB = 119.2 GB (250069680 x 512)

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-22 20:55:13 +08:00
Suniel Mahesh
60edbfa1da rockchip: rock-pi-n8: Enable on board devices
Enable common on board devices for ROCKPi N8.

- USB 2.0 Host
- USB 2.0 OTG/Gadget
- HDMI Out

Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-22 20:55:13 +08:00
Suniel Mahesh
c997d1c87b rockchip: evb_rk3288: Add console settings
Add console settings like stdin, stdout and stderr as
usbkbd and vidconsole respectively for evb-rk3288 targets.

This would certainly help to detect the attached video
devices (like HDMI) and print the console messages on display.

Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-22 20:55:13 +08:00
Suniel Mahesh
d840cace52 rockchip: rock-pi-n10: Enable on board devices
Enable common on board devices for ROCKPi N10.

- USB 2.0 Host
- USB 3.0 Host
- USB 3.0 Gadget
- HDMI Out

Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-22 20:55:13 +08:00
Jagan Teki
e1e1c3de24 arm64: dts: rockchip: Add PCIe for RockPI N10
This patch adds support to enable PCIe for RockPI N10.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-22 20:55:13 +08:00
Jagan Teki
5217f4991e arm: dts: rockchip: Add HDMI out for RockPI N8/N10
This patch adds support to enable HDMI out for
N10 and N8 combinations SBCs.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-22 20:55:13 +08:00
Jagan Teki
87027292c1 ARM: dts: rockchip: Add USB for RockPI N8/N10
Radxa dalang carrier board has 2x USB 2.0 and 1x USB 3.0
ports.

This patch adds support to enable all these USB ports for
N10 and N8 combinations SBCs.

Note that the USB 3.0 port on RockPI N8 combination works
as USB 2.0 OTG since it is driven from RK3288.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-22 20:55:13 +08:00
Jagan Teki
4b0446d57f ARM: dts: rockchip: Add usb host0 ohci node for rk3288
rk3288 and rk3288w have a usb host0 ohci controller.

Although rk3288 ohci doesn't actually work on hardware, but
rk3288w ohci can work well.

So add usb host0 ohci node in rk3288 dtsi and the quirk in
ohci platform driver will disable ohci on rk3288.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-22 20:55:13 +08:00
Suniel Mahesh
e70d826c06 arm: dts: rockchip: Sync rk3288 dtsi from linux
This sync has changes required to use HDMI CEC pin in U-Boot.

Sync dts from linux v5.8-rc5 commit:
	"ARM: dts: rockchip: define the two possible rk3288 CEC pins"
	(sha1: 838980dd04e994bf81cf104fa01ae60802146b39)

Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
2020-07-22 20:55:13 +08:00
Jagan Teki
2710779efd ARM: dts: rockchip: Sync ROCKPi N8/N10 dts(i) from Linux
Sync ROCKPi N8/N10 dts(i) changes from Linux.

commit <afd9eb880414> ("ARM: dts: rockchip: Add Radxa Rock Pi N8 initial
support")

Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
2020-07-22 20:55:13 +08:00
Jagan Teki
6d06ea6c94 rockchip: roc-rk3399-pc: Set LED only during POR and pwr_key=y
ROC-RK3399-PC has specific set of configurations for
on-board led setup.

Due to easiness for user to know the state of the board
roc-rk339-pc board code will setup the low power led
on/off, and waiting for user to press power key and then
glow full power led.

All this needs to happen only during power-on-reset not
for soft reset or WDT.

Also, it is not a proper usage to ask the user to press
the Power key if the board connected remotely, so add
the environment variable 'pwr_key' to check as well.

So, user need to press Power key only
- during POR
- pwr_key=y

Tested-by: Suniel Mahesh <sunil@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-22 20:55:13 +08:00
Jagan Teki
e230c579a3 rockchip: Separate the reset cause from display cpuinfo
reset cause is a generic functionality based on the soc
cru registers in rockchip. This can be used for printing
the cause of reset in cpuinfo or some other place where
reset cause is needed. 

Other than cpuinfo, reset cause can also be using during
bootcount for checking the specific reset cause and glow
the led based on the reset cause.

So, let's separate the reset cause code from cpuinfo, and
add a check to build it for rk3399, rk3288 since these two
soc are supporting reset cause as of now.

Tested-by: Suniel Mahesh <sunil@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-22 20:55:13 +08:00
Jagan Teki
88132e0a28 rockchip: Don't clear the reset status reg
reset reason can be used several stages of U-Boot bootloader
like SPL, U-Boot proper based on the requirements.

Clearing the status register end of get_reset_cause will end
up showing the wrong reset cause when it read the second time.
For example, if board resets, SPL reads the reset status as
RST whereas U-Boot proper reads the status as POR.

However, based on the latest testing clearing reset status
won't be required for determine the last reset cause or
following resets.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-22 20:55:13 +08:00
Kever Yang
b24405f39b rockchip: tpl: Remove board_early_init_f()
There is no need for board_early_init_f() in TPL, anything like this
should goes to SPL.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-22 20:55:13 +08:00
Jagan Teki
9aed288060 rockchip: roc-rk3399-pc: Add custom led_setup()
roc-rk3399-pc has some specific requirements to support LEDS,
environment. board detection and etc prior to U-Boot proper.

So as of now SPL would be a better stage for these custom board
requirements to support unlike TPL. Adding few of these custom
requirements like LEDS in TPL would require extra code pulling
and also the size of TPL can grow.

So, this patch moves the leds code from TPL into SPL Board init
led_setup code.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
(split tpl.c change as separate patch)
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-22 20:55:13 +08:00
Jagan Teki
500d1e7749 rockchip: rk3399: Add weak led_setup()
Add weak led_setup() so that board which has an uncommon
led setup code that can make use of custom implementation.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-22 20:55:13 +08:00
Jagan Teki
eab5c50a3b rockchip: rk3288: Add OF board setup
The new rk3288 revision rk3288w has some changes with respect
to legacy rk3288 like hclk_vio in cru and usb host0 ohci.

Linux clock driver already handle this via rockchip,rk3288w-cru
compatible.

USB ohci host can enable via dts for rk3288w based boards.

So, add fdt board setup code to update cru compatible with
rk3288w-cru compatible if the SOC revision is RK3288W.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-22 20:55:13 +08:00
Jagan Teki
c60d1c4e17 rockchip: Add rk3288 SoC detection helper
Rockchip SoC's has a new revision chip for rk3288 SoCs.

RK3288 has a new revision chip called RK3288W which is similar
but different hclk_vio clock and fixed OHCI host.

Add common Rockchip SoC detection helper to support this rk3288w
detection.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-22 20:55:13 +08:00
Jagan Teki
1f1395405f arm64: dts: rockchip: Add Radxa ROCK Pi 4C support
Rock PI 4C has AP6256 Wifi/BT, PoE, miniDP, USB Host enabled
GPIO pin change compared to 4B, 4C.

So, add or enable difference nodes/properties in 4C dts
by including common dtsi.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-22 20:55:13 +08:00
Jagan Teki
8d7192cb7f arm64: dts: rockchip: Add ROCKPi 4A/4B support
Rock PI 4 has 3 variants of hardware platforms called
RockPI 4A, 4B, and 4C.

- Rock PI 4A has no Wif/BT.
- Rock PI 4B has AP6256 Wifi/BT, PoE.
- Rock PI 4C has AP6256 Wifi/BT, PoE, miniDP, USB Host enable
  GPIO pin change compared to 4B, 4C

So move common nodes, properties into dtsi file and include
on respective variant dts files.

Use 4B dts into default rock-pi-4 defconfig until we find any
solution for dynamic detection of these variants.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-22 20:55:13 +08:00
Kever Yang
fad823f45e rockchip: firefly-rk3399: enable CONFIG_USB_DWC3
To fix below build error:
drivers/usb/host/built-in.o: In function `xhci_dwc3_remove':
drivers/usb/host/xhci-dwc3.c:174: undefined reference to `dwc3_shutdown_phy'
drivers/usb/host/built-in.o: In function `xhci_dwc3_probe':
drivers/usb/host/xhci-dwc3.c:130: undefined reference to `dwc3_setup_phy'

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-22 20:55:13 +08:00
Kever Yang
6c041b35bf rockchip: rk3399: Add default env to support compressed kernel Image
Add default kernel_comp_addr_r and kernel_comp_size to support boot
from compressed kernel Image, this space is temporarily used during
decompress according to README.distro.

Reported-by: Tian Yuanhao <tianyuanhao@aliyun.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-22 20:22:56 +08:00
Alex Bee
90f740a06a rockchip: sdram: fix dram_init_banksize
Currently 2.5 GB is calculated as DRAM size for a 1 GB RK322x board
if CONFIG_SPL_OPTEE is set. This is troublesome when booting a
linux kernel since this size will be injected in FDT of the kernel.

gd->bd->bi_dram[0].start (which is basically CONFIG_SYS_SDRAM_BASE)
must not be taken into consideration for calculation of second bank
size, since this offset is already included in calculation of "top".

After applying this patch 992 MB (1024 MB - 32 MB reserved for
optee-os) is correctly calculated and has also been verified on
2 GB boards.

Signed-off-by: Alex Bee <knaerzche@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-22 20:22:52 +08:00
Jagan Teki
ad415c80a5 pci: rockchip: Drop legacy PHY driver
Drop the legacy PHY driver and it's associated code since
the PHY handling driver now part of Generic PHY framework.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-22 20:22:49 +08:00
Jagan Teki
ce920e0e56 pci: rockchip: Switch to generic-phy
Now, we have a PCIe PHY driver as part of the Generic
PHY framework. Let's use it instead of legacy PHY driver.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-22 20:22:47 +08:00
Jagan Teki
7bdeb4ef4c phy: Add Rockchip PCIe PHY driver
Add the Rockchip PCIe PHY driver as part of
Generic PHY framework.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-22 20:22:42 +08:00
Jagan Teki
80632e0485 rockchip: roc-rk3399-pc: Disable RAM_ROCKCHIP_DEBUG
Disable ram rockchip debug driver for roc-rk3399-pc
boards since we have verified ram in many instances
with respective U-Boot versions.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-22 20:22:36 +08:00
Kever Yang
b32858ca51 rockchip: ram: fix debug funcfion define when RAM_ROCKCHIP_DEBUG not set
The empty function define should not be in the header file, or else the
build will error with function multi definition after CONFIG_RAM_ROCKCHIP_DEBUG
is disabled.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-22 20:22:33 +08:00
Jagan Teki
40794c825f ram: rk3399: Mark existing prints via RAM_ROCKCHIP_DEBUG
Right now all these debug statements are printing on the
console to make sure proper dram initialization happens.  

Mark them into RAM_ROCKCHIP_DEBUG would be more meaningful
and work like before since the RAM_ROCKCHIP_DEBUG is by
default yet.

No functionality changes.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-22 20:22:28 +08:00
Jagan Teki
304eaae36b ram: rk3399: Drop debug stride in driver
stride debug is already present in sdram_common.c via
RAM_ROCKCHIP_DEBUG.

So, drop the redundant debug stride code in rk3399 driver.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-22 20:22:23 +08:00
Johannes Krottmayer
618db675c8 rockchip: rock64-rk3328_defconfig: Add SPI Flash support
Add U-Boot SPI Flash support for the PINE64 Rock64 board

Signed-off-by: Johannes Krottmayer <krjdev@gmail.com>
Cc: Matwey V. Kornilov <matwey.kornilov@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-22 20:22:21 +08:00
Johannes Krottmayer
61b229e24c ARM: dts: rk3328-rock64: Add SPI Flash support
Add U-Boot SPI Flash support for the PINE64 Rock64 board

Signed-off-by: Johannes Krottmayer <krjdev@gmail.com>
Cc: Matwey V. Kornilov <matwey.kornilov@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-22 20:22:16 +08:00
Johannes Krottmayer
b5716c1325 ARM: dts: rk3328: Add SPI support
Add U-Boot SPI support for the RK3328

Signed-off-by: Johannes Krottmayer <krjdev@gmail.com>
Cc: Kever Yang <kever.yang@rock-chips.com>
Cc: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
(fix checkpatch error for code ident)
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-22 20:22:07 +08:00
Johannes Krottmayer
e93d2f4e96 drivers: spi: rk_spi: Add support for RK3328
Add support for the RK3328 SPI controller

Signed-off-by: Johannes Krottmayer <krjdev@gmail.com>
Cc: Kever Yang <kever.yang@rock-chips.com>
Cc: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-22 20:22:03 +08:00
Johannes Krottmayer
19933b66f4 drivers: clk: rockchip: clk_rk3328: Add SPI support
Add SPI support for the RK3328 clock driver

Signed-off-by: Johannes Krottmayer <krjdev@gmail.com>
Cc: Kever Yang <kever.yang@rock-chips.com>
Cc: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-22 20:22:00 +08:00
Jagan Teki
d4271fa28c rockchip: roc-rk3399-pc: Update ENV offset, size
Adjust the ENV offset, size to fit into all images
on 16MB flash.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-22 20:21:54 +08:00
Jagan Teki
cbb8189b9a rockchip: roc-rk3399-pc: Enable USB Gadget
Enable DWC3 core, gadget for roc-rk3399-pc board.

This would help to use fastboot by default.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-22 20:21:52 +08:00
Jagan Teki
7ff3fc57ad rockchip: rock-pi-4: Enable HDMI output
Enable config options to get HDMI output on RockPI-4 boards.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-22 20:21:44 +08:00
Jagan Teki
be4d6b03c0 rockchip: rock-pi-4: Enable USB Gadget
Enable USB gadget for rock-pi-4 boards.

This would help to use fastboot by default.

Note: Connect the Host USB cable (Port A or C) to rock-pi-4
Upper USB 3.0 port.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-22 20:21:42 +08:00
Jagan Teki
8489b4e10d rockchip: rock-pi-4: Enable PCI/NVME
Enable PCI/NVME for M.2 Slot on RockPI-4 boards.

=> nvme info
Device 0: Vendor: 0x144d Rev: 2B2QEXM7 Prod: S4EUNG0MC10012Y
            Type: Hard Disk
            Capacity: 238475.1 MB = 232.8 GB (488397168 x 512)

Cc: Tom Cubie <tom@radxa.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-22 20:21:39 +08:00
Jagan Teki
cd7bf74e0e rockchip: rock-pi-4: Enable USB3 Host
Enable USB3.0 Host support for RockPI-4 boards.

Note that the Upper USB3.0 port is marked as otg and
lower USB3.0 port marked as host, so this below log
capture when USB3.0 mass storage plug in at lower
USB 3.0 port.

Log:
Bus usb@fe380000: USB EHCI 1.00
Bus usb@fe3c0000: USB EHCI 1.00
Bus dwc3: usb maximum-speed not found
Register 2000140 NbrPorts 2
Starting the controller
USB XHCI 1.10
Bus dwc3: usb maximum-speed not found
Register 2000140 NbrPorts 2
Starting the controller
USB XHCI 1.10
scanning bus usb@fe380000 for devices... 1 USB Device(s) found
scanning bus usb@fe3c0000 for devices... 1 USB Device(s) found
scanning bus dwc3 for devices... 1 USB Device(s) found
scanning bus dwc3 for devices... cannot reset port 1!?
2 USB Device(s) found
       scanning usb for storage devices... 1 Storage Device(s) found
=> usb tree
USB device tree:
  1  Hub (480 Mb/s, 0mA)
     u-boot EHCI Host Controller

  1  Hub (480 Mb/s, 0mA)
     u-boot EHCI Host Controller

  1  Hub (5 Gb/s, 0mA)
     U-Boot XHCI Host Controller

  1  Hub (5 Gb/s, 0mA)
  |  U-Boot XHCI Host Controller
  |
  +-2  Mass Storage (5 Gb/s, 224mA)
       SanDisk Dual Drive 040130e3ee554b7078843f4eb331646

Cc: Tom Cubie <tom@radxa.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-22 20:21:31 +08:00
Jagan Teki
3ae64582fb rockchip: rockpro64: Enable USB3.0 Host
Enable USB3.0 Host support for RockPro64 boards.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-22 20:21:27 +08:00
Heiko Stuebner
02ce99ec91 rockchip: board: add Hardkernel Odroid Go2 board
Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-22 20:21:23 +08:00
Heiko Stuebner
b75f01a918 rockchip: px30: sync Odroid Go Advance devicetree from Linux
Get the devicetree from mainline Linux and include it for U-Boot uses.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-22 20:21:08 +08:00
Heiko Stuebner
014fbd7d36 rockchip: px30: sync the main rk3326 dtsi from mainline
The rk3326 is just a trimmed down px30 from a software perspective,
so the mainline rk3326 dtsi also ist just a tiny addition.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-22 20:21:01 +08:00
AKASHI Takahiro
5ee81c6e3f lib: crypto: export and enhance pkcs7_verify_one()
The function, pkcs7_verify_one(), will be utilized to rework signature
verification logic aiming to support intermediate certificates in
"chain of trust."

To do that, its function interface is expanded, adding an extra argument
which is expected to return the last certificate in trusted chain.
Then, this last one must further be verified with signature database, db
and/or dbx.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
2020-07-22 12:37:17 +02:00
AKASHI Takahiro
05329fa4c0 lib: crypto: add pkcs7_digest()
This function was nullified when the file, pkcs7_verify.c, was imported
because it calls further linux-specific interfaces inside, hence that
could lead to more files being imported from linux.

We need this function in pkcs7_verify_one() and so simply re-implement it
here instead of re-using the code.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
2020-07-22 12:36:29 +02:00
AKASHI Takahiro
063499e38e lib: crypto: import pkcs7_verify.c from linux
The file, pkcs7_verify.c, will now be imported from linux code
(crypto/asymmetric_keys/pkcs7_verify.c in 5.7) and modified to fit
into U-Boot environment.

In particular, pkcs7_verify_one() function will be used in a later patch
to rework signature verification logic aiming to support intermediate
certificates in "chain of trust."

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
2020-07-22 12:35:45 +02:00
AKASHI Takahiro
6244b3c7d9 lib: crypto: enable x509_check_for_self_signed()
When the file, x509_public_key.c, was imported from linux code in
    commit b4adf627d5 ("lib: crypto: add x509 parser"),
x509_check_for_self_signed() was commented out for simplicity.

Now it need be enabled in order to make pkcs7_verify_one(), which will be
imported in a later patch, functional.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
2020-07-22 12:35:04 +02:00
AKASHI Takahiro
b2a1049b5c lib: crypto: add public_key_verify_signature()
This function will be called from x509_check_for_self_signed() and
pkcs7_verify_one(), which will be imported from linux in a later patch.

While it does exist in linux code and has a similar functionality of
rsa_verify(), it calls further linux-specific interfaces inside.
That could lead to more files being imported from linux.

So simply re-implement it here instead of re-using the code.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
2020-07-22 12:33:55 +02:00
AKASHI Takahiro
a58dfd2969 test/py: efi_secboot: fix additional pylint errors
This is a fixup by autopep8 after the commit ("test/py: efi_secboot:
apply autopep8").

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-07-22 12:32:42 +02:00
AKASHI Takahiro
d09745b196 test/py: efi_secboot: remove unused function
'tool_is_in_path' function is no longer used anywhere after Heinrich
has removed 'sudo' version of fixture setup.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-07-22 12:32:42 +02:00
Heinrich Schuchardt
af457cfca9 efi_loader: use logging for block device messages
Use logging instead of printf() for messages occurring when scanning block
devices during the initialization of the UEFI sub-system.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-07-22 12:32:42 +02:00
Heinrich Schuchardt
c001837400 efi_loader: use logging for bootefi command
Log messages of the bootefi command instead of simply printing them to the
console.

Do not show "## Application terminated" message when the UEFI binary
completed successfully.

Adjust the python tests testing for '## Application terminated'.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-07-22 12:32:42 +02:00
Heinrich Schuchardt
bf758125d8 efi_loader: returning from UEFI FIT images
Do not reset the board when returning from an UEFI FIT image.

For failed UEFI binary we already print the return status in efi_run_image.
Remove duplicate output.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-07-22 12:32:42 +02:00
Heinrich Schuchardt
e7d64065cb efi_loader: document efi_save_gd(), efi_restore_gd()
Provide function descriptions for efi_save_gd() and efi_restore_gd().

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-07-22 12:32:42 +02:00
Stefan Sørensen
1ef1cf1f93 efi_loader: loosen buffer parameter check in efi_file_read
When reading a directory, EFI_BUFFER_TOO_SMALL should be returned when
the supplied buffer is too small, so a use-case is to call
efi_file_read with *buffer_size=0 and buffer=NULL to obtain the needed
size before doing the actual read.

So move the buffer!=NULL check to after the buffer size has been checked.

This fix allows the Redhat shim fallback to run and e.g. Fedora 32 now
boots out of the box.

Signed-off-by: Stefan Sørensen <stefan.sorensen@spectralink.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-07-22 12:32:41 +02:00
Ilias Apalodimas
9b87d4429c efi_loader: Check for the native OP-TEE result on mm_communicate calls
Currently we only check for the return value of tee_invoke_func().
Although OP-TEE and StMM will correctly set param[1].u.value.a and we'll
eventually return an error, the correct thing to do is check for the
OP_TEE return code as well.
So let's check for that and move tee_shm_free() and tee_close_session()
before exiting with an error to make sure we always clear the registered
memory.

Fixes: f042e47e8f ("efi_loader: Implement EFI variable handling via OP-TEE")
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Use EFI_DEVICE_ERROR for TEE communication problems.
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-07-22 12:32:41 +02:00
Ilias Apalodimas
5d1f79ba43 efi_loader: Rename and correct values for ARM_SMC_MM_*
Instead of adding the definition for the specific MM SVC used in
StandAloneMM we added the one used in the standard SMC calls.
So change the value from -4 to -5 to match the correct one defined in
EDK2 and rename them to avoid future confusion

Fixes 23a397d2e2: ("efi_loader: Add headers for EDK2 StandAloneMM communication")
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-07-22 12:32:41 +02:00
Heinrich Schuchardt
ebbad02c1b efi_loader: don't use memmove() in efi_var_mem_del()
efi_var_mem_del() is in __efi_runtime because it would be needed for a
runtime implementation of SetVariable(). memmove() is not in __efi_runtime.
So we should not use it in efi_var_mem_del().

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-07-22 12:32:41 +02:00
Heinrich Schuchardt
01fa922bbb efi_loader: efi_current_var after SetVirtualAddressMap
Variable efi_current_var is a pointer to a physical memory address that
becomes invalid after SetVirtualAddressMap(). Instead of converting it via
ConvertPointer() simply set it to NULL.

Fixes: b02a707152 ("efi_loader: enable UEFI variables at runtime")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-07-22 12:32:41 +02:00
Tom Rini
e9f1f5f486 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-spi
- add new series Micron SPI NAND devices (Shivamurthy)
2020-07-21 16:13:43 -04:00
Masahiro Yamada
60e7fa8b3b treewide: convert devfdt_get_addr() to dev_read_addr()
When you enable CONFIG_OF_LIVE, you will end up with a lot of
conversions.

To generate this commit, I used coccinelle excluding drivers/core/,
include/dm/, and test/

The semantic patch that makes this change is as follows:

  <smpl>
  @@
  expression dev;
  @@
  -devfdt_get_addr(dev)
  +dev_read_addr(dev)
  </smpl>

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-07-20 11:37:47 -06:00
Masahiro Yamada
6f25e274da treewide: remove (phys_addr_t) casts from devfdt_get_addr()
This cast is unneeded.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-07-20 11:37:47 -06:00
Masahiro Yamada
3c12c62ba5 treewide: convert (void *)devfdt_get_addr() to dev_read_addr_ptr()
Use the _ptr suffixed variant instead of casting. Also, convert it to
dev_read_addr_ptr(), which is safe to CONFIG_OF_LIVE.

One curious part is an error check like follows in
drivers/watchdog/omap_wdt.c:

    priv->regs = (struct wd_timer *)devfdt_get_addr(dev);
    if (!priv->regs)
            return -EINVAL;

devfdt_get_addr() returns FDT_ADDR_T_NONE (i.e. -1) on error.
So, this code does not catch any error in DT parsing.

dev_read_addr_ptr() returns NULL on error, so this error check
will work.

I generated this commit by the following command:

 $ find . -name .git -prune -o -name '*.[ch]' -type f -print | \
   xargs sed -i -e 's/([^*)]*\*)devfdt_get_addr(/dev_read_addr_ptr(/'

I manually fixed drivers/usb/host/ehci-mx6.c

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-07-20 11:37:47 -06:00
Masahiro Yamada
6ec7545b99 fdt_support: skip MTD node with "disabled" in fdt_fixup_mtdparts()
Currently, fdt_fixup_mtdparts() only checks the compatible property.
It is pointless to fix up the disabled node.

Skip the node if it has the property:

  status = "disabled"

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-20 11:37:47 -06:00
Masahiro Yamada
245ad6c4ad fdt_support: call mtdparts_init() after finding MTD node to fix up
Platform code can call fdt_fixup_mtdparts() in order to hand U-Boot's
MTD partitions over to the Linux device tree.

Currently, fdt_fixup_mtdparts() calls mtdparts_init() in its entry.
If no target MTD device is found, an error message like follows is
displayed:

    Device nand0 not found!

This occurs when the same code (e.g. arch/arm/mach-uniphier/fdt-fixup.c)
is shared among several boards, but not all of them support an MTD device.

Parse the DT first, then call mtdparts_init() only when the target MTD
node is found.

Yet, you still need to call mtdparts_init() before device_find().

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-20 11:37:47 -06:00
Heinrich Schuchardt
105da6251a test/dm: check if devices exist
Running 'ut dm' on the sandbox without -D or -d results in segmentation
faults due to NULL pointer dereferences.

Check that device pointers are non-NULL before using them.

Use ut_assertnonnull() for pointers instead of ut_assert().

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Tested-by: Philippe Reynes <philippe.reynes@softathome.com>
2020-07-20 11:37:47 -06:00
Dave Gerlach
469f04e882 arm: mach-k3: Use SOC driver for device identification
Make use of UCLASS_SOC to find device family and revision for
print_cpuinfo.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
2020-07-20 11:37:47 -06:00
Dave Gerlach
4c2718f9b1 configs: j721e_evm: Enable CONFIG_SOC_DEVICE and CONFIG_SOC_DEVICE_TI_K3
Enable CONFIG_SOC_DEVICE and CONFIG_SOC_DEVICE_TI_K3 so the TI K3 SoC
driver can be used for SoC detection.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
2020-07-20 11:37:47 -06:00
Dave Gerlach
b6d8a26866 configs: am65x_evm: Enable CONFIG_SOC_DEVICE and CONFIG_SOC_DEVICE_TI_K3
Enable CONFIG_SOC_DEVICE and CONFIG_SOC_DEVICE_TI_K3 so the TI K3 SoC
driver can be used for SoC detection.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
2020-07-20 11:37:47 -06:00
Dave Gerlach
a1631d51ad arm: dts: k3-j721e-mcu-wakeup: Introduce chipid node
Introduce a chipid node to provide a UCLASS_SOC driver to identify TI K3
SoCs.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
2020-07-20 11:37:47 -06:00
Dave Gerlach
30402cadb3 arm: dts: k3-am65-wakeup: Introduce chipid node
Introduce a chipid node to provide a UCLASS_SOC driver to identify TI K3
SoCs.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
2020-07-20 11:37:47 -06:00
Dave Gerlach
527be812a8 dm: soc: Introduce soc_ti_k3 driver for TI K3 SoCs
Introduce an soc_ti_k3_driver that allows identification and selection
of SoC specific data based on the JTAG ID register for device
identification, as described for AM65x[0] and J721E[1] devices.

[0] http://www.ti.com/lit/ug/spruid7e/spruid7e.pdf
[1] http://www.ti.com/lit/ug/spruil1a/spruil1a.pdf

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
2020-07-20 11:37:47 -06:00
Dave Gerlach
fbde39f417 test: Add tests for SOC uclass
Add a sandbox SOC driver, and some tests for the SOC uclass.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
2020-07-20 11:37:47 -06:00
Dave Gerlach
6426a26f4c dm: soc: Introduce UCLASS_SOC for SOC ID and attribute matching
Introduce UCLASS_SOC to be used for SOC identification and attribute
matching based on the SoC ID info. This allows drivers to be provided
for SoCs to retrieve SoC identifying information and also for matching
device attributes for selecting SoC specific data.

This is useful for other device drivers that may need different
parameters or quirks enabled depending on the specific device variant in
use.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
2020-07-20 11:37:47 -06:00
Dave Gerlach
41c1a693e5 doc: Add new doc for soc ID driver model
Add a new documentation file for UCLASS_SOC and its usage to describe
the SoC Device ID framework that allows SoC identification and device
data matching.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-20 11:37:47 -06:00
Masahiro Yamada
d772db3f9a fdt_support: add static to fdt_node_set_part_info()
This function is only called from fdt_fixup_mtdpart() in the same file.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-20 11:37:47 -06:00
Nicolas Boichat
28e0367fc8 patman: When no tracking branch is provided, tell the user
The user can either count the number of patches, or provide a
tracking branch.

Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-20 11:37:47 -06:00
Nicolas Boichat
754c05caf3 patman: Make sure sendemail.suppresscc is (un)set correctly
Setting sendemail.suppresscc to all or cccmd leads to --cc-cmd
parameter being ignored, and emails going either nowhere, or
just to the To: line maintainer.

Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-20 11:37:47 -06:00
Michal Simek
b589b80971 Revert "lib: fdt: Split fdtdec_setup_mem_size_base()"
This reverts commit 3ebe09d09a.

There is no user of this split function that's why remove it.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-20 11:37:47 -06:00
Michal Simek
d4cc6f638c Revert "lib: fdt: Split fdtdec_setup_memory_banksize()"
This reverts commit 118f4d4559.

There is no user of this split function that's why remove it.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-20 11:37:47 -06:00
Michal Simek
2feb4ea9dd ARM: rmobile: Switch back to fdtdec_setup_memory/banksize_fdt()
The commit 361377dbdb ("ARM: rmobile: Merge prior-stage firmware DT
fragment into U-Boot DT on Gen3") reverted changes introduced by commit
175f502734 ("ARM: renesas: Configure DRAM size from ATF DT fragment")
that's why there is no reason to use functions with _fdt() suffix because
parameter is gd->fdt_blob as is already for functions without _fdt()
suffix.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-20 11:37:47 -06:00
Patrick Delaunay
3ce7f75f78 Add information for skipped commit options
The unsupported Commit-xxx option are silently skipped
and removed as 're_remove=Commit-\w*', this patch adds
warning message in this case to detect misspelled issue
for the 2 supported options:
  Commit-notes:
  Commit-changes:

For example: the final 's' is missing (Commit-note:)

NB: no issue for Series-xxx option as only the supported
    options are accepted (see valid_series in series.py)

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-20 11:37:47 -06:00
Philippe Reynes
2a3be302d5 lib: libfdt: fdt_region: avoid NULL pointer access
The function fdt_find_regions look in the exclude list for each
property, even if the name is NULL. It could happen if the fit
image is corrupted. On sandbox, it generates a segfault.

To avoid this issue, if the name of a property is NULL, we report
an error and avoid looking in the exclude list.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-20 11:37:47 -06:00
Patrick Delaunay
df1fa4b223 patman: Detect unexpected END
Detect unexpected 'END' line when a section is not detected.

This patch detect issue when tag name for section start is misspelled,
for example 'Commit-note:' for 'Commit-notes:'

  Commit-note:
  ....
  END

Then 'Commit-note:' is removed silently by re_remove = "Commit-\w*:"
but 'END' is kept in commit message.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-20 11:37:47 -06:00
Simon Glass
f07e58b878 cpu: Convert the methods to use a const udevice *
These functions should not modify the device. Convert them to const so
that callers don't need to cast if they have a const udevice *.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-07-20 11:37:47 -06:00
Simon Glass
3b9a87321c binman: Add support for generating a FIT
FIT (Flat Image Tree) is the main image format used by U-Boot. In some
cases scripts are used to create FITs within the U-Boot build system. This
is not ideal for various reasons:

- Each architecture has its own slightly different script
- There are no tests
- Some are written in shell, some in Python

To help address this, add support for FIT generation to binman. This works
by putting the FIT source directly in the binman definition, with the
ability to adjust parameters, etc. The contents of each FIT image come
from sub-entries of the image, as is normal with binman.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-07-20 11:37:47 -06:00
Simon Glass
1f238bd5bd dtoc: Allow adding variable-sized data to a dtb
Add a method for adding a property containing arbitrary bytes. Make sure
that the tree can expand as needed in this case.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-07-20 11:37:47 -06:00
Simon Glass
4c63d21754 mkimage: Allow updating the FIT timestamp
Normally the FIT timestamp is created the first time mkimage is run on a
FIT, when converting the source .its to the binary .fit file. This
corresponds to using the -f flag. But if the original input to mkimage is
a binary file (already compiled) then the timestamp is assumed to have
been set previously.

Add a -t flag to allow setting the timestamp in this case.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-20 11:37:47 -06:00
Simon Glass
8200d8871a binman: Allow zero-length entries to overlap
Some binary blobs unfortunately obtain their position in the image from
other binary blobs, such as Intel's 'descriptor'. In this case we cannot
rely on packing to work. It is not possible to produce a valid image in
any case, due to the missing blobs.

Allow zero-length overlaps so that this does not cause any problems.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-20 11:37:47 -06:00
Simon Glass
2f5c3a4d1d binman: Allow missing Intel blobs
Update the Intel blob entries to support missing binaries.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-20 11:37:47 -06:00
Simon Glass
13262c9362 binman: Detect when valid images are not produced
When external blobs are missing, show a message indicating that the images
are not functional.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-07-20 11:37:47 -06:00
Simon Glass
f9793a12c5 patman: Update errors and warnings to use stderr
When warnings and errors are produced by tools they should be written to
stderr. Update the tout implementation to handle this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-20 11:37:47 -06:00
Simon Glass
5f850fb9a6 binman: Allow external binaries to be missing
Sometimes it is useful to build an image even though external binaries are
not present. This allows the build system to continue to function without
these files, albeit not producing valid images.

U-Boot does with with ATF (ARM Trusted Firmware) today.

Add a new flag to binman to request this behaviour.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-20 11:37:47 -06:00
Simon Glass
894f635755 binman: Convert existing binary blobs to blob_ext
Many of the existing blobs rely on external binaries which may not be
available. Move them over to use blob_ext to indicate this.

Unfortunately cros-ec-rw cannot use this class because it inherits
another. So set the 'external' value for that class.

While we are here, drop the import of Entry since it is not used (and
pylint3 complains).

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-07-20 11:37:47 -06:00
Simon Glass
d498630ea9 binman: Add an etype for external binary blobs
It is useful to be able to distinguish between ordinary blobs such as
u-boot.bin and external blobs that cannot be build by the U-Boot build
system. If the external blobs are not available for some reason, then we
know that a value image cannot be built.

Introduce a new 'blob-ext' entry type for that.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-20 11:37:47 -06:00
Simon Glass
1216448573 binman: Use super() instead of specifying parent type
It is easier and less error-prone to use super() when the parent type is
needed. Update binman to remove the type names.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-20 11:37:47 -06:00
Simon Glass
0b9116e31a binman: Re-enable concurrent tests
With the change to absolute imports the concurrent tests feature
unfortunately broke. Fix it.

We cannot easy add a warning, since the output messes up tests which check
the output.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-07-20 11:37:47 -06:00
Simon Glass
8beed3d7ac binman: Adjust pylibfdt for incremental build
If the pylibfdt shared-object file is detected, then Python assumes that
the libfdt.py file exists also.

Sometimes when an incremental build aborts, the shared-object file is
built but the libfdt.py is not. The only way out at this point is to use
'make mkproper', or similar.

Fix this by removing the .so file before it is built. This seems to make
Python rebuild everything.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-20 11:37:47 -06:00
Simon Glass
fe04f647a2 binman: Fix a few typos in the entry docs
Some typos have been fixed in the generated entry docs but the code was
not updated. Fix this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-07-20 11:37:47 -06:00
Simon Glass
3e8fba4cd4 binman: Add support for calling mkimage
As a first step to integrating mkimage into binman, add a new entry type
that feeds data into mkimage for processing and incorporates that output
into the image.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-07-20 11:37:47 -06:00
Simon Glass
ce774e94de binman: Set a default toolpath
When binman is run from 'make check' it is given a toolpath so that the
latest tools (e.g. mkimage) are used. When run manually with no toolpath,
it relies on the system mkimage. But this may be missing or old.

Make some effort to find the built-from-soruce version by looking in the
current directory and in the builds created by 'make check'.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-07-20 11:37:47 -06:00
Simon Glass
92dee5fcc5 binman: Specify the toolpath when running test coverage
At present binman's test coverage runs without a toolpath set. This means
that the system tools will be used. That may not be correct if they are
out of date or missing and this can result in a reduction in test coverage
below 100%.

Provide the toolpath to binman in this case.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-07-20 11:37:47 -06:00
Simon Glass
5d8b338462 binman: Correct the search patch for pylibfdt
Now that binman uses tools/ as its base directory for importing modules,
the path to the pylibfdt build by U-Boot is incorrect. Fix it with a new
path.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-20 11:37:47 -06:00
Simon Glass
ccbe7dbc3f binman: cbfs: Fix IFWI typo
This comment references the wrong thing. Fix it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-20 11:37:47 -06:00
Simon Glass
de43855091 binman: Output errors to stderr
At present binman outputs errors to stdout which means that fails are
effectively silent when printed by buildman, for example. Fix this by
outputing errors to stderr.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-20 11:37:47 -06:00
Simon Glass
2a9c14526e .gitignore: Ignore Python 3 cache directories
These can appear when moving between branches that have different tools
in the tree. Ignore them.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-20 11:37:47 -06:00
Simon Glass
5d9dc917e1 dm: core Fix long line in device_bind_common()
Fix an over-length line in this function.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-20 11:37:47 -06:00
Simon Glass
0fc2e632f5 patman: Add a -D option to enable debugging
Most users don't want to see traceback errors. Add an option to enable
them for debugging. Disable them by default.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-07-20 11:37:47 -06:00
Simon Glass
df3fc0757b patman: Support collecting response tags in Patchstream
Collect response tags such as 'Reviewed-by' while parsing the stream.
This allows us to see what tags are present.

Add a new 'Fixes' tag also, since this is now quite common.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-07-20 11:37:47 -06:00
Simon Glass
ef6629128c patman: Allow disabling 'bright' mode with Print output
At present all text is marked bright, which makes it stand out on the
terminal. Add a way to disable that, as is done with the Color class.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-07-20 11:37:47 -06:00
Simon Glass
57374b09ec patman: Add a 'test' subcommand
At present we use --test to indicate that tests should be run. It is
better to use a subcommand for list, like binman. Change it and adjust
the existing code to fit under a 'send' subcommand, the default.

Give this subcommand the same default arguments as the others.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-07-20 11:37:47 -06:00
Simon Glass
4806fa3006 patman: Allow different commands
At present patman only does one thing so does not have any comments. We
want to add a few more command, so create a sub-parser for the default
command ('send').

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-07-20 11:37:47 -06:00
Simon Glass
e676fab729 patman: Convert to ArgumentParser
Convert from OptionParser to ArgumentParser to match binman. With this we
can easily add sub-commands.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-07-20 11:37:47 -06:00
Simon Glass
d9dc99e327 patman: Allow skipping patches at the end
The -s option allows skipping patches at the top of the branch. Sometimes
there are commits at the bottom that need to be skipped. At present it is
necessary to count the number of commits and then use -c to tell patman
how many to process.

Add a -e option to easily skip a number of commits at the bottom of the
branch.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-07-20 11:37:46 -06:00
Simon Glass
e9799e0890 patman: Allow creating patches for another branch
Add a -b option to allow patches to be created from a branch other than
the current one.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-07-20 11:37:46 -06:00
Simon Glass
5d597584db patman: Add a test that uses gitpython
It is convenient to use gitpython to create a real git repo for testing
patman's operation. Add a test for this. So far it just checks that patman
produces the right number of patches for a branch.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-07-20 11:37:46 -06:00
Simon Glass
f365375975 patman: Move main code out to a control module
To make testing easier, move the code out from main into a separate
'control' module and split it into four parts: setup, preparing patches,
checking patches and emailing patches.

Add comments and fix a few code-style issues while we are here.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-07-20 11:37:46 -06:00
Simon Glass
2e9a0cdfa8 patman: Use test_util to show test results
This handles skipped tests correctly, so use it instead of the existing
code.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-07-20 11:37:46 -06:00
Shivamurthy Shastri
fe48d4f996 mtd: spinand: micron: Add new Micron SPI NAND devices with multiple dies
Add device table for new Micron SPI NAND devices, which have multiple
dies.

Also, enable support to select the dies.

Signed-off-by: Shivamurthy Shastri <sshivamurthy@micron.com>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
2020-07-20 22:29:18 +05:30
Shivamurthy Shastri
1f4836b0c9 mtd: spinand: micron: Add M70A series Micron SPI NAND devices
Add device table for M70A series Micron SPI NAND devices.

Signed-off-by: Shivamurthy Shastri <sshivamurthy@micron.com>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
2020-07-20 22:28:54 +05:30
Shivamurthy Shastri
720fcb27e0 mtd: spinand: micron: identify SPI NAND device with Continuous Read mode
Add SPINAND_HAS_CR_FEAT_BIT flag to identify the SPI NAND device with
the Continuous Read mode.

Some of the Micron SPI NAND devices have the "Continuous Read" feature
enabled by default, which does not fit the subsystem needs.

In this mode, the READ CACHE command doesn't require the starting column
address. The device always output the data starting from the first
column of the cache register, and once the end of the cache register
reached, the data output continues through the next page. With the
continuous read mode, it is possible to read out the entire block using
a single READ command, and once the end of the block reached, the output
pins become High-Z state. However, during this mode the read command
doesn't output the OOB area.

Hence, we disable the feature at probe time.

Signed-off-by: Shivamurthy Shastri <sshivamurthy@micron.com>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
2020-07-20 22:28:33 +05:30
Shivamurthy Shastri
5cf049c00a mtd: spinand: micron: Add new Micron SPI NAND devices
Add device table for M79A and M78A series Micron SPI NAND devices.

Signed-off-by: Shivamurthy Shastri <sshivamurthy@micron.com>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
2020-07-20 22:28:09 +05:30
Shivamurthy Shastri
92fc25df2e mtd: spinand: micron: Describe the SPI NAND device MT29F2G01ABAGD
Add the SPI NAND device MT29F2G01ABAGD series number, size and voltage
details as a comment.

Signed-off-by: Shivamurthy Shastri <sshivamurthy@micron.com>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
2020-07-20 22:27:53 +05:30
Shivamurthy Shastri
1527ec410c mtd: spinand: micron: Generalize the OOB layout structure and function names
In order to add new Micron SPI NAND devices, we generalized the OOB
layout structure and function names.

Signed-off-by: Shivamurthy Shastri <sshivamurthy@micron.com>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
2020-07-20 22:27:29 +05:30
Tom Rini
7303ba10a4 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-x86
- dm: core: Don't show an ACPI warning if there is no ordering
- x86: Enhance MTRR functionality to support multiple CPUs
2020-07-20 09:25:32 -04:00
Simon Glass
2a3d9a7af9 x86: mtrr: Enhance 'mtrr' command to list MTRRs on any CPU
Update this command so it can list the MTRRs on a selected CPU. If
'-c all' is used, then all CPUs are listed.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-20 09:46:48 +08:00
Simon Glass
c6efee5031 x86: mp: Add more comments to the module
Add a description of how this module works and also some missing function
comments.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-20 09:46:48 +08:00
Simon Glass
f91f5ab6f0 x86: mtrr: Update 'mtrr' to allow setting MTRRs on any CPU
Add a -c option to mtrr to allow any CPU to be updated with this command.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-20 09:46:48 +08:00
Simon Glass
b2a76b3fe7 x86: mtrr: Restructure so command execution is in one place
At present do_mtrr() does the 'list' subcommand at the top and the rest
below. Update it to do them all in the same place so we can (in a later
patch) add parsing of the CPU number for all subcommands.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-20 09:46:48 +08:00
Simon Glass
e68b12805b x86: mtrr: Update the command to use the new mtrr calls
Use the multi-CPU calls to set the MTRR values. This still supports only
the boot CPU for now.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-20 09:46:47 +08:00
Simon Glass
8dda2baa97 x86: mtrr: Add support for writing to MTRRs on any CPU
To enable support for the 'mtrr' command, add a way to perform MTRR
operations on selected CPUs.

This works by setting up a little 'operation' structure and sending it
around the CPUs for action.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
2020-07-20 09:46:47 +08:00
Simon Glass
aa3a4d870e x86: mtrr: Update MTRRs on all CPUs
When the boot CPU MTRRs are updated, perform the same update on all other
CPUs so they are kept in sync.

This avoids kernel warnings about mismatched MTRRs.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-20 09:46:47 +08:00
Simon Glass
4f58f73d38 x86: coral: Update the memory map
This currently excludes the temporary memory used to start up the APs.
Add it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
2020-07-20 09:46:47 +08:00
Simon Glass
3d734b59c7 x86: Don't enable SMP in SPL
SMP should be set up in U-Boot where possible, not SPL. Disable it in SPL.
For 64-bit U-Boot we should find a way to allow SMP operations in U-Boot,
but this is somewhat more complicated. For now that is disabled too.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
2020-07-20 09:46:46 +08:00
Simon Glass
240752c612 x86: mtrr: Use MP calls to list the MTRRs
Update the mtrr command to use mp_run_on_cpus() to obtain its information.
Since the selected CPU is the boot CPU this does not change the result,
but it sets the stage for supporting other CPUs.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-20 09:46:46 +08:00
Simon Glass
0538d6833c x86: mp: Add iterators for CPUs
It is convenient to iterate through the CPUs performing work on each one
and processing the result. Add a few iterator functions which handle this.
These can be used by any client code. It can call mp_run_on_cpus() on
each CPU that is returned, handling them one at a time.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-20 09:46:46 +08:00
Simon Glass
99a573fb32 x86: mp: Park CPUs before running the OS
With the new MP features the CPUs are no-longer parked when the OS is run.
Fix this by calling a special function to park them, just before the OS is
started.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-20 09:46:46 +08:00
Simon Glass
84d3ed125a x86: mp: Allow running functions on multiple CPUs
Add a way to run a function on a selection of CPUs. This supports either
a single CPU, all CPUs, just the main CPU or just the 'APs', in Intel
terminology.

It works by writing into a mailbox and then waiting for the CPUs to notice
it, take action and indicate they are done.

When SMP is not yet enabled, this just calls the function on the main CPU.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-20 09:46:45 +08:00
Simon Glass
db3a37c711 x86: Set the SMP flag when MP init is complete
Set this flag so we can track when it is safe to use CPUs other than the
main one.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-20 09:46:45 +08:00
Simon Glass
50e9cac107 global_data: Add a generic global_data flag for SMP state
Allow keeping track of whether all CPUs have been enabled yet. This allows
us to know whether other CPUs need to be considered when updating
CPU-specific settings such as MTRRs on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-20 09:46:45 +08:00
Simon Glass
c33aa3527d x86: mp: Support APs waiting for instructions
At present the APs (non-boot CPUs) are inited once and then parked ready
for the OS to use them. However in some cases we want to send new requests
through, such as to change MTRRs and keep them consistent across CPUs.

Change the last state of the flight plan to go into a wait loop, accepting
instructions from the main CPU.

Drop cpu_map since it is not used.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-20 09:46:45 +08:00
Simon Glass
8bccbc5ac0 x86: cpu: Remove unnecessary #ifdefs
Drop some #ifdefs that are not needed or can be converted to compile-time
checks.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-20 09:46:44 +08:00
Simon Glass
20b049e885 x86: mp_init: Adjust bsp_init() to return more information
This function is misnamed since it does not actually init the BSP. Also
it is convenient to adjust it to return a little more information.

Rename and update the function, to allow it to return the BSP CPU device
and number, as well as the total number of CPUs.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-20 09:46:44 +08:00
Simon Glass
77a5e2d3bc x86: mp_init: Set up the CPU numbers at the start
At present each CPU is given a number when it starts itself up. While this
saves a tiny amount of time by doing the device-tree read in parallel, it
is confusing that the numbering happens on the fly.

Move this code into mp_init() and do it at the start.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-20 09:46:44 +08:00
Simon Glass
36c184bd0a x86: mtrr: Fix 'ensable' typo
Fix a typo in the command help.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-20 09:46:44 +08:00
Simon Glass
a6c9fd4da0 x86: mp_init: Drop the num_cpus static variable
This does not need to be global across all functions in this file. Pass a
parameter instead.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-20 09:46:43 +08:00
Simon Glass
3a5752ccff x86: mp_init: Switch parameter names in start_aps()
These parameters are named differently from elsewhere in this file. Switch
them to avoid confusion.

Also add comments to this function.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
2020-07-20 09:46:43 +08:00
Simon Glass
e624858407 x86: mp_init: Avoid declarations in header files
The functions used by the flight plan are declared in the header file but
are not used in any other file.

Move the flight plan steps down to just above where it is used so that we
can make these function static.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-20 09:46:43 +08:00
Simon Glass
78d57d63d7 x86: Move MP code into mp_init
At present the 'flight plan' for CPUs is passed into mp_init. But it is
always the same. Move it into the mp_init file so everything is in one
place. Also drop the SMI function since it does nothing. If we implement
SMIs, more refactoring will be needed anyway.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-20 09:46:42 +08:00
Simon Glass
cb1cb7146f x86: mp_init: Switch to livetree
Update this code to use livetree calls instead of flat-tree.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-20 09:46:42 +08:00
Simon Glass
d2ee543ae2 dm: core: Don't show an ACPI warning if there is no ordering
Some boards don't care about the ordering of ACPI code fragments. Change
the warning to a debug message.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-20 09:46:42 +08:00
Tom Rini
49cf75101d Merge tag 'mips-pull-2020-07-18' of https://gitlab.denx.de/u-boot/custodians/u-boot-mips
- MIPS: refactor cache init and setup in start.S
- MIPS: sync asm header files with Linux 5.7
- MIPS: add initial support for Marvell Octeon MIPS64
2020-07-18 11:34:49 -04:00
Stefan Roese
5fef24c912 mips: octeon: Add minimal Octeon 3 EBB7304 EVK support
This patch adds very basic minimal support for the Marvell Octeon 3
CN73xx based EBB7304 EVK. Please note that the basic Octeon port does
not support DDR3/4 initialization yet. To still use U-Boot on with this
port, the L2 cache (4MiB) is used as RAM. This way, U-Boot can boot
to the prompt on this board.

Supported devices:
- UART
- reset
- CFI parallel NOR flash

Signed-off-by: Stefan Roese <sr@denx.de>
2020-07-18 15:47:50 +02:00
Stefan Roese
e9609dc38b mips: octeon: use mips_mach_early_init() to copy to L2 cache
This patch adds the code to copy itself from bootrom location to a
different location (TEXT_BASE) to the Octeon platform. Its used in
this case to copy the complete U-Boot image into L2 cache, which
greatly improves the bootup time - especially in regard to the
very long and complex DDR4 init code.

The Kconfig symbol CONFIG_MIPS_MACH_EARLY_INIT is enabled with this
patch for Octeon.

Signed-off-by: Stefan Roese <sr@denx.de>
2020-07-18 15:47:50 +02:00
Stefan Roese
ff7e4f030b mips: octeon: dts: Add Octeon 3 cn73xx base dtsi file
This patch adds the base dtsi file for the Octeon 3 cn73xx SoC.

Signed-off-by: Stefan Roese <sr@denx.de>
2020-07-18 15:47:50 +02:00
Aaron Williams
0dc4ab9c43 mips: octeon: Initial minimal support for the Marvell Octeon SoC
This patch adds very basic support for the Octeon III SoCs. Only
CFI parallel NOR flash and UART is supported for now.

Please note that the basic Octeon port does not include the DDR3/4
initialization yet. This will be added in some follow-up patches
later. To still use U-Boot on with this port, the L2 cache (4MiB on
Octeon III CN73xx) is used as RAM. This way, U-Boot can boot to the
prompt on such boards.

Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2020-07-18 15:47:50 +02:00
Stefan Roese
59aea37abf sysreset: Add Octeon sysreset driver
This patch adds a UCLASS_SYSRESET sysreset driver for the Octeon SoC
family.

Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2020-07-18 14:23:25 +02:00
Stefan Roese
de34a61642 mips: Add CONFIG_MIPS_MACH_EARLY_INIT for very early mach init code
This patch adds the optional call to mips_mach_early_init() to start.S
at a very early stage. Its disabled per default. It can be used for
very early machine / platform specific init code.  Its called very
early and at this stage the PC is allowed to differ from the linking
address (CONFIG_TEXT_BASE) as no absolute jump has been performed until
this call.

It will be used by thje Octeon platform.

Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2020-07-18 14:23:25 +02:00
Daniel Schwierzeck
81d4b14f7e mips: sync asm/mipsregs.h with Linux 5.7
Sync asm/mipsregs.h with Linux 5.7. Also replace the custom
symbols EBASE_CPUNUM and EBASE_WG with the according symbols
from Linux.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
2020-07-18 14:23:25 +02:00
Daniel Schwierzeck
c0f99579fa mips: sync asm/addrspace.h with Linux 5.7
Sync asm/addrspace.h with Linux 5.7

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
2020-07-18 14:23:25 +02:00
Daniel Schwierzeck
eac800043f mips: sync asm/asm.h with Linux 5.7
Sync asm/asm.h with Linux 5.7.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
2020-07-18 14:23:25 +02:00
Daniel Schwierzeck
dd1bb42305 mips: remove deprecated UNCACHED_SDRAM() macro
This macro only served as a wrapper for CKSEG1ADDR() with an
exception for CONFIG_TB0229. CONFIG_TB0229 doesn't exist, thus
use CKSEG1ADDR() directly.

This also prepares for an upcoming asm header sync with Linux.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
2020-07-18 14:23:25 +02:00
Daniel Schwierzeck
57bfb1aed6 mips: add config options for generic cache setup code
Add an own Kconfig symbol for the initial disabling of caches
invoked from generic start code.

Also add an own Kconfig symbols for the initialization of caches
invoked from generic start code.

Until now both code paths could only be disabled with
CONFIG_SKIP_LOWLEVEL_INIT. But this is not flexible enough for
RAM boot scenarios like EJTAG or SPL payload or for machines
which don't require cache initialization or which want to
provide their own cache implementation.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
2020-07-18 14:23:25 +02:00
Daniel Schwierzeck
60772433dd mips: refactor disabling of caches
Logically this code belongs to cache_init.S.

If a complex SoC needs to replace the generic cache init,
mips_cache_disable() can now be called from custom start.S files.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
2020-07-18 14:23:25 +02:00
Daniel Schwierzeck
b55e07e565 mips: add KSEG1 wrapper for change_k0_cca
change_k0_cca() is called multiple times. Move the code for
changing to KSEG1 to a macro to avoid code duplication.

Also fix missing change to KSEG1 when changing to CONF_CM_CACHABLE_COW.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
2020-07-18 14:23:25 +02:00
Daniel Schwierzeck
54e7fbd5ad mips: start.S: remove dead code
Since commit 703ec9ddf9 ("MIPS: Stop building position independent code")
the relocation code was completely reworked and removed from start.S.
Remove some left-overs of the old code.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
2020-07-18 14:23:25 +02:00
Stefan Roese
60a0559b7f mips: cache: Make invalidate_dcache_range() weak to enable overwrite
This patch adds __weak to invalidate_dcache_range() in lib/cache.c. This
makes it possible to overwrite this function by a platforms specific
version, which will be done for Octeon.

Signed-off-by: Stefan Roese <sr@denx.de>
2020-07-18 14:23:25 +02:00
Stefan Roese
1d4ba15c6f mips: cache: Make flush_cache() weak to enable overwrite
This patch adds __weak to flush_cache() in lib/cache.c. This makes it
possible to overwrite this function by a platforms specific version,
like done with the Octeon base port.

Signed-off-by: Stefan Roese <sr@denx.de>
2020-07-18 14:23:25 +02:00
Stefan Roese
2eed3dca22 mips: cache: Allow using CONFIG_MIPS_L2_CACHE without CONFIG_MIPS_CM
This patch enables the usage of CONFIG_MIPS_L2_CACHE without
CONFIG_MIPS_CM, which is what is needed for the newly added Octeon
platform.

Signed-off-by: Stefan Roese <sr@denx.de>
2020-07-18 14:23:25 +02:00
Stefan Roese
c372813105 mips: reloc: Change R_MIPS_NONE to catch pre-reloc BSS usage
This patch changes the R_MIPS_NONE define from 0 to a magic value. This
makes it possible to better detect any forbidden pre-relocation usage
of BSS variables, as they are often zero'ed and then relocation is
stopped too early.

Additionally the error message is improved to also print the faulting
address. This helps finding the root-cause for this breakage by
comparing this address with the values in System.map.

This patch helps a lot when working on pre-relocation code, like the
Octeon DDR init code, where such variables have hit me multiple times
now.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>
2020-07-18 14:23:25 +02:00
Stefan Roese
a02bc1f992 mips: traps: Set WG bit in EBase register on Octeon
WG (bit 11) needs to be set on Octeon to enable writing bits 63:30 of
the exception base register.

Signed-off-by: Stefan Roese <sr@denx.de>
2020-07-18 14:23:25 +02:00
Stefan Roese
a414281da4 mips: time: Only compile the weak get_tbclk() when needed
This patch opts-out the compilation of get_tbclk() if
CONFIG_SYS_MIPS_TIMER_FREQ is not defined. This is used on the Octeon
platform, where the weak get_tbclk() function is overwritten by its
platform specific one.

Signed-off-by: Stefan Roese <sr@denx.de>
2020-07-18 14:23:24 +02:00
Tom Rini
1c4b5038af Merge branch '2020-07-17-misc-fixes'
A large number of assorted fixes, including but not limited to:
- Correct fixdep and CONFIG_IS_ENABLED(...)
- lz4 on big endian
- Assorted LMB hardening
- Remove bd_t typedef
2020-07-17 16:08:54 -04:00
Suneel Garapati
21fc5a1685 include: pci_ids: Add Cavium devices
Add VendorID and DeviceID for supported devices on OcteonTX/TX2
platforms.

Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2020-07-17 10:47:19 -04:00
Michal Simek
4d288dcd4c doc: fit: Write hex address as hex instead of int
When update_uboot.its is used directly there is syntax error for no reason.

Error report:
mkimage -f update_uboot.its boot
Error: update_uboot.its:18.12-13 syntax error
FATAL ERROR: Unable to parse input tree
mkimage: Can't read boot.tmp: Invalid argument

Fixes: 4bae90904b ("Automatic software update from TFTP server")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-07-17 10:47:19 -04:00
Martin Kaistra
892d461735 mtd: mtdpart: use uint64_t instead of int for cur_off
The types of "offset" and "size" of "struct mtd_partition" are uint64_t,
while mtd_parse_partitions() uses int to work with these values. When
the offset reaches 2GB, it is interpreted as a negative value, which
leads to error messages like

mtd: partition "<partition name>" is out of reach -- disabled

eg. when using the "ubi part" command.

Fix this by using uint64_t for cur_off and cur_sz.

Signed-off-by: Martin Kaistra <martin.kaistra@linutronix.de>
Reviewed-by: Kurt Kanzenbach <kurt@linutronix.de>
Reviewed-by: Heiko Schocher <hs@denx.de>
2020-07-17 10:47:19 -04:00
Holger Brunck
b72bbf575b board/km: update MAINTAINERS email
Signed-off-by: Holger Brunck <holger.brunck@hitachi-powergrids.com>
CC: Valentin Longchamp <valentin.longchamp@hitachi-powergrids.com>
2020-07-17 10:47:19 -04:00
Heinrich Schuchardt
dd43272be1 doc: correct description of crash dumps
Correct the description of the ESR register.

Fix a typo.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-07-17 10:47:19 -04:00
Stephen Warren
76ae74d348 fixdep: fix CONFIG_IS_ENABLED etc. handling
When fixdep detects CONFIG_IS_ENABLED and other similar macros, it must
parse the macro parameter to determine which actual CONFIG_ option is
being referenced. This involves moving a pointer forward through the
entire CONFIG_ option "word". Currently, the code uses variable q to walk
through the word, but doesn't actually initialize it to point at the
parameter before doing so. Consequently, the walking process immediately
fails since it sees the macro invocatoins's ( rather than the expected
alpha-numeric characters in the macro parameter. Fix this by adding the
missing initialization.

Fixes: 67f2ee86cc ("kbuild: fixdep: Resync this with v4.17")
Fixes: 7012865e96 ("gpio: fix test.py for gpio label lookup")
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-17 10:47:19 -04:00
Mylène Josserand
dd85dc55eb mkimage: Fix error message if write less data then expected
Add a new error message in case the size of data written
are shorter than the one expected.

Currently, it will lead to the following error message:

"mkimage: Write error on uImage: Success"

This is not explicit when the error is because the device
doesn't have enough space. Let's use a more understandable message:

"mkimage: Write only 4202432/4682240 bytes, probably no space left on the device"

Signed-off-by: Mylène Josserand <mylene.josserand@collabora.com>
Reviewed-by: Walter Lozano <walter.lozano@collabora.com>
2020-07-17 10:47:19 -04:00
Rasmus Villemoes
5c6a4d5a27 remove include/config_defaults.h
Since commit 4b0bcfa7c4 (Kconfig: Migrate CONFIG_BOOTM_* options),
the config_defaults.h file has been void of any actual content - and
these days, "sane defaults for everyone" is achieved by appropriate
default values in Kconfig. Remove it, and thus make every translation
unit process one less header file.

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
2020-07-17 10:47:19 -04:00
Fabio Estevam
eeda3d7497 doc: multi-dtb-fit: Remove double underscores
Remove the incorrect usage of double underscores for the
CONFIG_OF_LIST and CONFIG_SPL_OF_LIST symbols.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
2020-07-17 10:47:19 -04:00
Heinrich Schuchardt
1244f36900 fs: error handling in do_load()
If a file cannot be loaded, show an error message.
Set the EFI boot device only after successfully loading a file.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-17 10:47:19 -04:00
Masahiro Yamada
36da57aa87 asm/u-boot.h: remove bd_t definitions
All the users of bd_t were converted to struct bd_info.

Remove the definitions.

Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
2020-07-17 10:47:19 -04:00
Masahiro Yamada
bb5a2cf9f9 treewide: convert bd_t to struct bd_info manually
Some code was not converted by coccinelle, somehow.

I manually fixed up the remaining, and comments, README docs.

Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
[trini: Add arch/arm/mach-davinci/include/mach/sdmmc_defs.h and
        include/fdt_support.h]
Signed-off-by: Tom Rini <trini@konsulko.com>
2020-07-17 10:46:44 -04:00
Masahiro Yamada
b75d8dc564 treewide: convert bd_t to struct bd_info by coccinelle
The Linux coding style guide (Documentation/process/coding-style.rst)
clearly says:

  It's a **mistake** to use typedef for structures and pointers.

Besides, using typedef for structures is annoying when you try to make
headers self-contained.

Let's say you have the following function declaration in a header:

  void foo(bd_t *bd);

This is not self-contained since bd_t is not defined.

To tell the compiler what 'bd_t' is, you need to include <asm/u-boot.h>

  #include <asm/u-boot.h>
  void foo(bd_t *bd);

Then, the include direcective pulls in more bloat needlessly.

If you use 'struct bd_info' instead, it is enough to put a forward
declaration as follows:

  struct bd_info;
  void foo(struct bd_info *bd);

Right, typedef'ing bd_t is a mistake.

I used coccinelle to generate this commit.

The semantic patch that makes this change is as follows:

  <smpl>
  @@
  typedef bd_t;
  @@
  -bd_t
  +struct bd_info
  </smpl>

Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
2020-07-17 09:30:13 -04:00
Michal Simek
02ff91e8c6 arm64: Remove CONFIG_SYS_FULL_VA macro
All configurations have been removed in 2016 by commit 7985cdf74b
("arm64: Remove non-full-va map code").

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-07-17 09:30:13 -04:00
Jan Kiszka
7125d2c195 Makefile: Silence relocate-rela call
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
2020-07-17 09:30:13 -04:00
Chin Liang See
499b7493e7 lib: zlib: Remove offset pointer optimization in inftrees.c
This fixes the CVE-2016-9840. Commit imported from [1].

inftrees.c was subtracting an offset from a pointer to an array,
in order to provide a pointer that allowed indexing starting at
the offset. This is not compliant with the C standard, for which
the behavior of a pointer decremented before its allocated memory
is undefined. Per the recommendation of a security audit of the
zlib code by Trail of Bits and TrustInSoft, in support of the
Mozilla Foundation, this tiny optimization was removed, in order
to avoid the possibility of undefined behavior.

[1]: 6a043145ca

Signed-off-by: Mark Adler <madler@alumni.caltech.edu>
Signed-off-by: Chin Liang See <chin.liang.see@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2020-07-17 08:51:29 -04:00
Patrick Delaunay
b4d14bc81a Convert CONFIG_ARMV7_PSCI_1_0 and CONFIG_ARMV7_PSCI_0_2 to Kconfig
This converts the following to Kconfig:
CONFIG_ARMV7_PSCI_1_0
CONFIG_ARMV7_PSCI_0_2

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-07-17 08:51:29 -04:00
Thomas Schaefer
ea5003ad66 spl: fix ext4fs_mount return code handling
- Despite other ext4 filesystem functions, ext4fs_mount returns
  0 in case of error.
- This leads to u-boot crash in case that an SD card
  with valid partition table but without ext4 filesystem created
  in a partition is found on SD card.
- Fix this by returning a proper error code of '-1' from spl_load_image_ext
  function in case of ext4fs_mount error.

Signed-off-by: Thomas Schaefer <thomas.schaefer@kontron.com>
[hthiery: slightly reword the commit message]
Signed-off-by: Heiko Thiery <heiko.thiery@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2020-07-17 08:51:01 -04:00
Tero Kristo
9b83f9c594 cmd: booti: convert the debug print about image move to printf
Moving of the OS image may have some nasty side effects like corrupting
DTB. Convert the current debug print to printf so that the relocation of
the OS is always obvious to the user.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
2020-07-17 08:51:01 -04:00
Tero Kristo
fbde7589ce common: bootm: add checks to verify if ramdisk / fdtimage overlaps OS image
These cases are typically fatal and are difficult to debug for random
users. Add checks for detecting overlapping images and abort if overlap
is detected.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
2020-07-17 08:51:01 -04:00
Tero Kristo
19c6808d87 image: fdt: bail out with error if no boot time FDT image found
Currently the boot continues if the FDT image is clearly corrupted,
which just causes the loaded OS to hang. Abort boot properly if the FDT
is corrupted.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
2020-07-17 08:51:01 -04:00
Tom Rini
e6676a34c4 Convert CONFIG_MXC_UART to Kconfig
This converts the following to Kconfig:
   CONFIG_MXC_UART

Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
2020-07-17 08:47:29 -04:00
Rasmus Villemoes
e7885a48bb lz4: fix decompressor on big-endian powerpc
Booting an lz4-compressed kernel image fails on our powerpc board with
-EPROTONOSUPPORT. Adding a bit of debug prints, we get

  magic: 0x184d2204
  flags: 0x64
  reserved0: 1
  has_content_checksum: 1
  has_content_size: 0
  has_block_checksum: 0
  independent_blocks: 1
  version: 0
  block_descriptor: 70
  reserved1: 7
  max_block_size: 0
  reserved2: 0

So the magic is ok, but the version check fails, also some reserved
bits are apparently set. But that's because the code interprets the
"flags" and "block_descriptor" bytes wrongly:

Using bit-fields to access individual bits of an "on the wire" format
is not portable, not even when restricted to the C flavour implemented
by gcc. Quoting the gcc manual:

   * 'The order of allocation of bit-fields within a unit (C90 6.5.2.1,
     C99 and C11 6.7.2.1).'

     Determined by ABI.

and indeed, the PPC Processor ABI supplement says

   * Bit-fields are allocated from right to left (least to most
     significant) on Little-Endian implementations and from left to
     right (most to least significant) on Big-Endian implementations.

The upstream code (github.com/lz4/lz4) uses explicit shifts and masks
for encoding/decoding:

    /* FLG Byte */
    *dstPtr++ = (BYTE)(((1 & _2BITS) << 6)    /* Version('01') */
        + ((cctxPtr->prefs.frameInfo.blockMode & _1BIT ) << 5)
        + ((cctxPtr->prefs.frameInfo.blockChecksumFlag & _1BIT ) << 4)
        + ((unsigned)(cctxPtr->prefs.frameInfo.contentSize > 0) << 3)
        + ((cctxPtr->prefs.frameInfo.contentChecksumFlag & _1BIT ) << 2)
        +  (cctxPtr->prefs.frameInfo.dictID > 0) );

    /* Flags */
    {   U32 const FLG = srcPtr[4];
        U32 const version = (FLG>>6) & _2BITS;
        blockChecksumFlag = (FLG>>4) & _1BIT;
        blockMode = (FLG>>5) & _1BIT;
        contentSizeFlag = (FLG>>3) & _1BIT;
        contentChecksumFlag = (FLG>>2) & _1BIT;
        dictIDFlag = FLG & _1BIT;
        /* validate */
        if (((FLG>>1)&_1BIT) != 0) return err0r(LZ4F_ERROR_reservedFlag_set); /* Reserved bit */
        if (version != 1) return err0r(LZ4F_ERROR_headerVersion_wrong);        /* Version Number, only supported value */
    }

Do the same here, and while at it, be more careful to use unaligned
accessors to what is most likely unaligned. Also update the comment to
make it clear that it only refers to the lz4.c file, not the following
code of lz4_wrapper.c.

This has been tested partly, of course, by seeing that my
lz4-compressed kernel now boots, partly by running the (de)compression
test-suite in the (x86_64) sandbox - i.e., it should still work just
fine on little-endian hosts.

Reviewed-by: Julius Werner <jwerner@chromium.org>
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
2020-07-17 08:45:29 -04:00
Heinrich Schuchardt
aac9f284db doc: Coccinelle: move to HTML doc
Move doc/README.coccinelle to doc/develop/coccinelle.rst using the current
linux-next version of the text.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-07-17 08:45:29 -04:00
Tom Rini
7c3cc6f106 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-x86
- New timer API to allow delays with a 32-bit microsecond timer
- Add dynamic ACPI structs (DSDT/SSDT) generations to the DM core
- x86: Enable ACPI table generation by default
- x86: Enable the copy framebuffer on Coral
- x86: A few fixes to FSP2 with ApolloLake
- x86: Drop setup_pcat_compatibility()
- x86: Primary-to-Sideband Bus minor fixes
2020-07-17 08:04:48 -04:00
Tom Rini
42e7659db0 Merge tag 'u-boot-imx-20200716' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx
i.MX for 2020.10
----------------

- i.MX DDR driver fix/update for i.MX8M
- i.MX pinctrl driver fix.
- Use arm_smccc_smc to remove imx sip function
- i.MX8M clk update
- support booting aarch32 kernel on aarch64 hardware
- fused part support for i.MX8MP
- imx6: pcm058 to DM

Travis: https://travis-ci.org/github/sbabic/u-boot-imx/builds/708734785
2020-07-17 08:04:28 -04:00
Simon Glass
d40d2c5706 acpi: Enable ACPI table generation by default on x86
This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-17 14:32:24 +08:00
Simon Glass
4021ee6388 x86: Rename board_final_cleanup() to board_final_init()
This function sounds like something that is called when U-Boot is about to
jump to Linux. In fact it is an init function.

Rename it to reduce confusion.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
2020-07-17 14:32:24 +08:00
Simon Glass
22a7396f7f x86: acpi: Correct the version of the MADT
Currently U-Boot implements version 2 but reports version 4. Correct it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
2020-07-17 14:32:24 +08:00
Simon Glass
a308b1fa39 x86: Drop setup_pcat_compatibility()
This function does not exist anymore. Drop it from the header file.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-17 14:32:24 +08:00
Simon Glass
538c9b3d29 x86: Update the comment about booting for FSP2
The comment here applies only to FSP1, so update it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
2020-07-17 14:32:24 +08:00
Simon Glass
9ef168676c x86: Store the coreboot table address in global_data
At present this information is used to locate and parse the tables but is
not stored. Store it so that we can display it to the user, e.g. with the
'bdinfo' command.

Note that now the GD_FLG_SKIP_LL_INIT flag is set in get_coreboot_info(),
so it is always set when booting from coreboot.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
2020-07-17 14:32:24 +08:00
Simon Glass
487852b51b x86: apl: Adjust FSP-M code to avoid hard-coded address
Update this code to calculate the address to use, rather than hard-coding
it. Obtain the requested stack size from the FSP.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-17 14:32:24 +08:00
Simon Glass
efd3132852 x86: apl: Set the correct boot mode in the FSP-M code
If there is MRC information we should run FSP-M with a different
boot_mode flag since it is supposed to do a 'fast path' through the
memory init. Fix this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-17 14:32:24 +08:00
Simon Glass
b336a2b8f6 x86: Add debugging to table writing
Writing tables is currently pretty opaque. Add a bit of debugging to the
process so we can see what tables are written and where they start/end in
memory.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
2020-07-17 14:32:24 +08:00
Simon Glass
b95611f67e x86: apl: Fix save/restore of ITSS priorities
The FSP-S changes the ITSS priorities. The code that tries to save it
before running FSP-S and restore it afterwards does not work as U-Boot
relocates in between the save and restore. This means that the driver
data saved before relocation is lost and the new driver just sees zeroes.

Fix this by allocating space in the relocated memory for the ITSS data.
Save it there and access it from the driver after relocation.

This fixes interrupt handling on coral.

Also drop the log_msg_ret() in irq_first_device_type() since this function
can be called speculatively in places where we are not sure if there is
an interrupt controller of that type. The resulting log errors are
confusing when there is no error.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
2020-07-17 14:32:24 +08:00
Simon Glass
a8c2789c09 x86: irq: Support flags for acpi_gpe
This binding currently has a flags cell but it is not used. Make use of it
to create ACPI tables for interrupts.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
2020-07-17 14:32:24 +08:00
Simon Glass
11e27ae92b pmc: Move common registers to the header file
These registers need to be accesses from ACPI code, so move them to the
header file.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-17 14:32:24 +08:00
Simon Glass
62fba44d6d x86: apl: Hide the p2sb on exit from U-Boot
This confuses Linux's PCI probing so needs to be hidden when booting
Linux. Add a remove() method to handle this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
2020-07-17 14:32:24 +08:00
Simon Glass
f549d9bbde x86: apl: Support set_hide() in p2sb driver
Add support for this new method in the driver and in the fsp-s setup.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
2020-07-17 14:32:24 +08:00
Simon Glass
6d349e2e43 p2sb: Add a method to hide the bus
The P2SB bus needs to be hidden in some cases so that it does not get
auto-configured by Linux. Add a method for this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
2020-07-17 14:32:24 +08:00
Simon Glass
4b0ec52b9e i2c: designware_i2c: Support ACPI table generation
Update the PCI driver to generate ACPI information so that Linux has the
full information about each I2C bus.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
[bmeng: Correct one typo in dw_i2c_gen_speed_config() comments]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-17 14:32:24 +08:00
Simon Glass
c61c8efd47 i2c: Add log_ret() on error
Add a few of these calls to make it easier to see where an error occurs,
if CONFIG_LOG_ERROR_RETURN is enabled.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2020-07-17 14:32:24 +08:00
Simon Glass
767abfc6ce i2c: designware_i2c: Add a little more debugging
Add debugging for a few more values and also use log to show return values
when something goes wrong. This makes it easier to see the root cause.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2020-07-17 14:32:24 +08:00
Simon Glass
43ee86cc4b x86: gpio: Add support for obtaining ACPI info for a GPIO
Implement the method that converts a GPIO into the form used by ACPI, so
that GPIOs can be added to ACPI tables.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-17 14:32:24 +08:00
Simon Glass
eb2ebbcf56 x86: apl: Use memory-mapped access for VBT
Use the new binman memory-mapping function to access the VBT, to simplify
the code.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-17 14:32:24 +08:00
Simon Glass
31b410a68c x86: Add error checking for csrt table generation
Generation of this table can fail, so update the function to return an
error code.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
2020-07-17 14:32:24 +08:00
Simon Glass
59cf26480b x86: pinctrl: Drop the acpi_path member
This is in the device tree now, so drop the unnecessary field here.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-17 14:32:24 +08:00
Simon Glass
6b651486f5 x86: pinctrl: Set up itss in the probe() method
At present the itss is probed in the ofdata_to_platdata() method. This is
incorrect since itss is a child of p2sb which itself needs to probe the
pinctrl device. This means that p2sb is effectively not probed when the
itss is probed, so we get the wrong register address from p2sb.

Fix this by moving the itss probe to the correct place.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
2020-07-17 14:32:24 +08:00
Simon Glass
a9331a3388 x86: pinctrl: Add multi-ACPI control
Add a Kconfig to control whether pinctrl is represented as a single ACPI
device or as multiple devices. In the latter case (the default) we should
return the pin number relative to the pinctrl device.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
2020-07-17 14:32:24 +08:00
Simon Glass
05516e3d47 x86: pinctrl: Update comment for intel_pinctrl_get_pad()
Add information about what is returned on error.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-17 14:32:24 +08:00
Simon Glass
4916f4586e x86: pinctrl: Add a way to get the pinctrl reg address
At present we can query the offset of a pinctrl register within the p2sb.
For ACPI we need to get the actual address of the register. Add a function
to handle this and rename the old one to more accurately reflect its
purpose.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
2020-07-17 14:32:24 +08:00
Simon Glass
54bcca2973 sound: Add an ACPI driver for Maxim MAX98357ac
This chip is used on coral and we need to generate ACPI tables for sound
to make it work. Add a driver that does just this (i.e. at present does
not actually support playing sound).

Signed-off-by: Simon Glass <sjg@chromium.org>
[bmeng: Use the correct acpi_irq_polarity enum number]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-17 14:32:24 +08:00
Simon Glass
0324b7123e sound: Add an ACPI driver for Dialog Semicondutor da7219
This chip is used on coral and we need to generate ACPI tables for sound
to make it work. Add a driver that does just this (i.e. at present does
not actually support playing sound).

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-07-17 14:32:24 +08:00
Simon Glass
7f926c9648 x86: Add support for building up an NHLT structure
The Intel Non-High-Definition-Audio Link Table (NHLT) table describes the
audio codecs and connections in a system. Various devices can contribute
information to produce the table.

Add functions to allow adding to the structure that is eventually written
to the ACPI tables. Also add the device-tree bindings.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-07-17 14:32:24 +08:00
Simon Glass
bb6772c3ff acpi: Support writing named values
Allow writing named integers and strings to the generated ACPI code.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
[bmeng: Fix the "new blank line at EOF" warning]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-17 14:32:24 +08:00
Simon Glass
91c2f9c32e acpi: Support generation of a device
Allow writing an ACPI device to the generated ACPI code.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
[bmeng: Fix build failures on Sandbox]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-17 14:32:24 +08:00
Simon Glass
70303d2480 x86: Add bindings for NHLT
Add devicetree bindings for the Intel Non-High-Definition-Audio Link Table
(NHLT).

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-17 14:32:24 +08:00
Simon Glass
dba7ee419d acpi: mmc: Generate ACPI info for the PCI SD Card
Write required information into the SSDT to describe the SD card
card-detect pin. Since the required GPIO properties are not present in
the device-tree binding, set them manually for now.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-17 14:32:24 +08:00
Simon Glass
d7d631df2d acpi: Support generation of a generic register
Allow writing out a generic register.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
[bmeng: Fix build failures on Sandbox]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-17 14:32:24 +08:00
Simon Glass
82659cc910 acpi: Support generation of a scope
Add a function to write a scope to the generated ACPI code.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: Fix build failures on Sandbox]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-17 14:32:24 +08:00
Simon Glass
fea9651084 acpi: Export functions to write sized values
At present only acpigen_write_integer() is exported for use by other code.
But in some cases it is useful to call the specific function depending on
the size of the value.

Export these functions and add a test.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: Fix the "new blank line at EOF" warning]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-17 14:32:24 +08:00
Simon Glass
b4e8433418 dm: acpi: Add support for the NHLT table
The Intel Non-High-Definition-Audio Link Table (NHLT) table describes the
audio codecs and connections in a system. Various devices can contribute
information to produce the table.

Add core support for this, based on a structure which is built up through
calls to the driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
2020-07-17 14:32:24 +08:00
Simon Glass
f18589576c dm: core: Add a way of overriding the ACPI device path
Some devices such as GPIO need to override the normal path that would be
generated by driver model. Add a device-tree property for this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
2020-07-17 14:32:24 +08:00
Simon Glass
f02d0eb3fa dtoc: Support ACPI paths in of-platdata
The start of an ACPI path typically has backslashes in it. These are not
preserved during the translation from device tree to C code, since dtc
(correctly) uses the first backslash as an escape character, and dtoc
therefore leaves it out of the C string.

Fix this with special-case handling.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-07-17 14:32:24 +08:00
Simon Glass
8d7ff12e63 acpi: Allow creating the GNVS to fail
In some cases an internal error may prevent this from working. Update the
function return value and report the error. At present the API for writing
tables does not easily support reporting errors, but once it is fully
updated to use a context pointer, this will be easier.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
2020-07-17 14:32:24 +08:00
Simon Glass
8f9877df95 binman: Add way to locate an entry in memory
Add support for accessing an entry's contents in memory-mapped SPI flash.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-17 14:32:24 +08:00
Simon Glass
956a9082d3 binman: Refactor binman_entry_find() to allow other nodes
At present we can only read from a top-level binman node entry. Refactor
this function to produce a second local function which supports reading
from any node.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-17 14:32:24 +08:00
Simon Glass
db6fb7d152 binman: Allow setting the ROM offset
On x86 the SPI ROM can be memory-mapped, at least most of it. Add a way
to tell binman the offset from a ROM address to a RAM address.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-17 14:32:24 +08:00
Simon Glass
a4f8208919 acpi: Add an acpi command to list/dump generated ACPI items
Add a command that shows the individual blocks of data generated by each
device, effectively splitting the full table into its component parts.
This can be helpful for debugging.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-17 14:32:24 +08:00
Simon Glass
fefac0b064 dm: acpi: Enhance acpi_get_name()
For many device types it is possible to figure out the name just by
looking at its uclass or parent. Add a function to handle this, since it
allows us to cover the vast majority of cases automatically.

However it is sometimes impossible to figure out an ACPI name for a device
just by looking at its uclass. For example a touch device may have a
vendor-specific name. Add a new "acpi,name" property to allow a custom
name to be created.

With this new feature we can drop the get_name() methods in the sandbox
I2C and SPI drivers. They were only added for testing purposes. Update the
tests to use the new values.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-17 14:32:24 +08:00
Simon Glass
20349781a3 pci: Avoid a crash in device_is_on_pci_bus()
This function cannot currently be called on the root node. Add a check
for this as well as a test.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-17 14:32:24 +08:00
Simon Glass
58a6ccd34e x86: Allow devices to write to DSDT
Call the new core function to inject ASL programmatically into the DSDT.
This is made up of fragments generated by devices that have the
inject_dsdt() method. The normal, compiled ASL file is added after this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-17 14:32:24 +08:00
Simon Glass
01694589af acpi: Add support for DSDT generation
Some devices need to inject extra code into the Differentiated System
Descriptor Table (DSDT). Add a method to handle this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: correct one typo in inject_dsdt() comments]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-17 14:32:24 +08:00
Simon Glass
351fef5c57 x86: Allow devices to write an SSDT
Call the new core function to write the SSDT. This is made up of fragments
generated by devices that have the fill_ssdt() method.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-17 14:32:24 +08:00
Simon Glass
0f7b111f70 acpi: Support ordering SSDT data by device
Add a /chosen property to control the order in which the data appears
in the SSDT. This allows matching up U-Boot's output from a dump of the
known-good data obtained from within Linux.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-17 14:32:24 +08:00
Simon Glass
64ba6f43ef acpi: Record the items added to SSDT
It is useful to be able to control the order of data written to the SSDT
so that we can compare the output against known-good kernel dumps.

Add code to record each item that is added along with the device that
added it. That allows us to reorder things later if needed.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-17 14:32:24 +08:00
Simon Glass
85f2def907 x86: acpi: Move MADT down a bit
Put this table before MCFG so that it matches the order that coreboot uses
when passing tables to Linux. This is a cosmetic change since the order of
the tables does not otherwise matter.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-17 14:32:24 +08:00
Simon Glass
b5183172f0 acpi: Add support for SSDT generation
Some devices need to generate code for the Secondary System Descriptor
Table (SSDT). Add a method to handle this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-17 14:32:24 +08:00
Simon Glass
740630ba73 acpi: Add support for a generic power sequence
Add a way for devices to enable and disable themselves using ACPI code
that updates GPIOs. This takes several timing parameters and supports
enable, reset and stop.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-17 14:32:24 +08:00
Simon Glass
f8054dd8ba acpi: Add support for writing a GPIO power sequence
Power to some devices is controlled by GPIOs. Add a way to generate ACPI
code to enable and disable a GPIO so that this can be handled within an
ACPI method.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-17 14:32:24 +08:00
Simon Glass
f9189d5ada acpi: Add support for writing a Power Resource
These are used in ACPI to disable power to various pats of the system when
in sleep. Add a way to create a power resource, with the caller finishing
off the details.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-17 14:32:24 +08:00
Simon Glass
9c70e7e556 acpi: Add support for various misc ACPI opcodes
Add more functions to handle some miscellaneous ACPI opcodes.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-17 14:32:24 +08:00
Simon Glass
0667900049 acpi: Support copying properties from device tree to ACPI
Some drivers in Linux support both device tree and ACPI. U-Boot itself
uses Linux device-tree bindings for its own configuration but does not use
ACPI.

It is convenient to copy these values over to the ACPI DP table for
passing to linux. Add some convenience functions to help with this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-17 14:32:24 +08:00
Simon Glass
2357234666 acpi: Support writing a GPIO
Allowing writing out a reference to a GPIO within the ACPI output. This
can be used by ACPI code to access a GPIO at runtime.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-17 14:32:24 +08:00
Simon Glass
0e5a0a00d6 acpi: Support writing Device Properties objects via _DSD
More complex device properties can be provided to drivers via a
device-specific data (_DSD) object.

To create this we need to build it up in a separate data structure and
then generate the ACPI code, due to its recursive nature.

Add an implementation of this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-17 14:32:24 +08:00
Simon Glass
29df845204 acpi: Support writing a UUID
ACPI supports writing a UUID in a special format. Add a function to handle
this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-17 14:32:24 +08:00
Simon Glass
7aed90d44c acpi: Support writing a name
ACPI supports storing names which are made up of multiple path components.
Several special cases are supported. Add a function to emit a name.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-17 14:32:24 +08:00
Simon Glass
3df33bda5c acpi: Support writing a string
ACPI supports storing a simple null-terminated string. Add support for
this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-17 14:32:24 +08:00
Simon Glass
83b2bd5a74 acpi: Support writing an integer
ACPI supports storing integers in various ways. Add a function to handle
this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-17 14:32:24 +08:00
Simon Glass
03967ce2e5 acpigen: Support writing a package
A package collects together several elements. Add an easy way of writing
a package header and updating its length later.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-17 14:32:24 +08:00
Simon Glass
7e148f2ed3 acpigen: Support writing a length
It is convenient to write a length value for preceding a block of data.
Of course the length is not known or is hard to calculate a priori. So add
a way to mark the start on a stack, so the length can be updated when
known.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-17 14:32:24 +08:00
Simon Glass
70e5e67a4d acpi: Support generation of SPI descriptor
Add a function to write a SPI descriptor to the generated ACPI code.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-17 14:32:24 +08:00
Simon Glass
31e1787ec1 acpi: Support generation of I2C descriptor
Add a function to write a GPIO descriptor to the generated ACPI code.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-17 14:32:24 +08:00
Simon Glass
4ebc940b39 acpi: Support generation of a GPIO/irq for a device
Some devices use interrupts but some use GPIOs. Since these are fully
specified in the device tree we can automatically produce the correct ACPI
descriptor for a device.

Add a function to handle this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-17 14:32:24 +08:00
Simon Glass
a9e0a077df acpi: Support generation of GPIO descriptor
Add a function to write a GPIO descriptor to the generated ACPI code.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: Drop comment about the type always being ACPI_GPIO_TYPE_IO]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-17 14:32:24 +08:00
Simon Glass
7fb8da4ce1 acpi: Support string output
Add support for output of strings and streams of bytes.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-17 14:32:24 +08:00
Simon Glass
2912686c08 gpio: Add a method to convert a GPIO to ACPI
When generating ACPI tables we need to convert GPIOs in U-Boot to the ACPI
structures required by ACPI. This is a SoC-specific conversion and cannot
be handled by generic code, so add a new GPIO method to do the conversion.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-17 14:32:24 +08:00
Simon Glass
ff715c6f4f acpi: Support generation of interrupt descriptor
Add a function to write an interrupt descriptor to the generated ACPI
code.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-17 14:32:24 +08:00
Simon Glass
61cc93396a acpi: Support generation of ACPI code
Add a new file to handle generating ACPI code programatically. This is
used when information must be dynamically added to the tables, e.g. the
SSDT.

Initial support is just for writing simple values. Also add a 'base' value
so that the table can be freed. This likely doesn't happen in normal code,
but is nice to do in tests.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-17 14:32:24 +08:00
Simon Glass
f4955137f5 irq: Add a method to convert an interrupt to ACPI
When generating ACPI tables we need to convert IRQs in U-Boot to the ACPI
structures required by ACPI. This is a SoC-specific conversion and cannot
be handled by generic code, so add a new IRQ method to do the conversion.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-17 14:32:24 +08:00
Simon Glass
2715b3623c acpi: Add a way to check device status
At present U-Boot does not support the different ACPI status values, but
it is best to put this logic in a central place. Add a function to get the
device status.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-17 14:32:24 +08:00
Simon Glass
1361a53c1a acpi: Add a function to get a device path and scope
Add a function to build up the ACPI path for a device and another for its
scope.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-17 14:32:24 +08:00
Simon Glass
4b724a1377 dm: core: Add an ACPI name for the root node
This always has a fixed ACPI name so add it as a driver function.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-17 14:32:24 +08:00
Simon Glass
0990c894cc x86: fsp: Support a warning message when DRAM init is slow
With DDR4, Intel SOCs take quite a long time to init their memory. During
this time, if the user is watching, it looks like SPL has hung. Add a
message in this case.

This works by adding a return code to fspm_update_config() that indicates
whether MRC data was found and a new property to the device tree.

Also add one more debug message while starting.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
2020-07-17 14:32:24 +08:00
Simon Glass
ef5f5f6ca6 x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME
At present this enables a few arch-specific members of the global_data
struct which are otherwise not part of the struct. As a result we have to
use #ifdef in various places.

The cost of always having these in the struct is small. Adjust things so
that we can use compile-time code instead of #ifdefs.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-17 14:32:24 +08:00
Simon Glass
d450ce10cc coral: Enable the copy framebuffer
Enable this feature on chromebook_coral to speed up the display.

With this change, the time taken to print the environment to the display
without CONFIG_CONSOLE_SCROLL_LINES is reduced from 1830ms to 62ms.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-17 14:32:24 +08:00
Simon Glass
e1ddf67cb3 timer: Allow delays with a 32-bit microsecond timer
The current get_timer_us() uses 64-bit arithmetic on 32-bit machines.
When implementing microsecond-level timeouts, 32-bits is plenty. Add a
new function that uses an unsigned long. On 64-bit machines this is
still 64-bit, but this doesn't introduce a penalty. On 32-bit machines
it is more efficient.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-17 14:32:24 +08:00
Wolfgang Wallner
ce04a9020c x86: p2sb: make P2SB driver depend on P2SB uclass
Currently it is possible to select the P2SB driver without selecting the
P2SB uclass, which can't work. Fix this by adding a "depends on" in
Kconfig.

Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-17 14:32:24 +08:00
Wolfgang Wallner
d872e7da7a drivers: p2sb: replace Primary-to-Sideband Bus with Primary to Sideband Bridge
In Intel's documentation the term P2SB stands for "Primary to Sideband
Bridge".

Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-17 14:32:24 +08:00
Tom Rini
fee68b98fe Merge tag 'efi-2020-10-rc1-4' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi
Pull request for UEFI sub-system for efi-2020-10-rc1 (4)

Improvements for the UEFI subsystem include:

* support for read-only TEE-backed variables
* allow to compile PK, KEK, db, dbx fixed values into U-Boot
* bug fixes

Python testing related changes comprise:

* enable 'bootefi hello' for better test coverage
* remove SKIP messages in UEFI Python tests

The fitupd command is dropped.
Build errors for the lsblk command are fixed.
2020-07-16 16:35:15 -04:00
Stefano Babic
ab8b4e818c mx6memcal: fix build
Commit 4503299 has a side effect on this board, and build is broken.
Adjust mx6memcal_defconfig to build it again.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2020-07-16 15:11:18 +02:00
Heinrich Schuchardt
c70f44817d efi_loader: simplify 'printenv -e'
Currently default output of 'printenv -e' is restricted to variables with
GUID EFI_GLOBAL_VARIABLE. This excludes db and dbx. As the number of
variables is small there is no need for this restriction.

If no GUID is provided, print all matching variables irrespective of GUID.

Always show the numeric value of the GUID.

If the GUID provided to 'setenv -e' is invalid, return CMD_RET_USAGE.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-07-16 12:37:03 +02:00
Heinrich Schuchardt
627ab390d8 efi_loader: describe EFI_VAR_FILE_MAGIC
Add documentation for EFI_VAR_FILE_MAGIC used in the file format for UEFI
variables.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-07-16 12:37:03 +02:00
Heinrich Schuchardt
7dda16343d efi_loader: pre-seed UEFI variables
Include a file with the initial values for non-volatile UEFI variables
into the U-Boot binary. If this variable is set, changes to variable PK
will not be allowed.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-07-16 12:37:02 +02:00
Heinrich Schuchardt
99bfab8b58 efi_loader: identify PK, KEK, db, dbx correctly
To determine if a varible is on the of the authentication variables
PK, KEK, db, dbx we have to check both the name and the GUID.

Provide a function converting the variable-name/guid pair to an enum and
use it consistently.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-07-16 12:37:02 +02:00
Heinrich Schuchardt
be66b89da3 efi_loader: configuration of variables store
The file based and the OP-TEE based UEFI variable store are mutually
exclusive. Define them as choice options in Kconfig.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-07-16 12:37:02 +02:00
Heinrich Schuchardt
677da1c089 doc: provide links to Microsoft UEFI certificates
Some distributions provide UEFI binaries like Shim that have been signed
using a Microsoft certificate. Provide the download paths for the public
keys.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-07-16 12:37:02 +02:00
Heinrich Schuchardt
1a7b0f6e4e efi_loader: update secure state
Update the UEFI secure state when variable 'PK' is updated in the TEE
variables implementation.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2020-07-16 12:37:02 +02:00
Heinrich Schuchardt
012c56ac76 efi_loader: restructure code for TEE variables
When using secure boot functions needed both for file and TEE based UEFI
variables have to be moved to the common code module efi_var_common.c.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-07-16 12:37:02 +02:00
Ilias Apalodimas
f96744b250 efi_loader: display RO attribute with TEE-backed variables
A previous commit adds support for displaying variables RO flag.
Let's add it on the TEE backed variable storage as well.

Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-07-16 12:37:02 +02:00
Heinrich Schuchardt
f49ca85fdf efi_loader: skip warnings for network configuration
Skip messages should only be written if the setup is not suitable for
testing.

If DHCP is enabled, we should not write a skip message if no static network
configuration is supplied.

Likewise if a static network configuration is supplied, we should not write
a skip message if DHCP is not enabled.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-07-16 12:37:02 +02:00
Heinrich Schuchardt
ec5f0ed33f efi_selftest: enable 'bootefi hello'
In our Python tests we want to run 'bootefi hello'. Enable it by default
when compiling with CMD_BOOTEFI_SELFTEST.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-07-16 12:37:02 +02:00
Heinrich Schuchardt
b961d552f9 cmd: fix lsblk command
Add missing includes.
Add CMD_LSBLK to sandbox_defconfig.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-07-16 12:37:02 +02:00
Heinrich Schuchardt
a2f0b504f4 cmd: drop fitupd command
The `fitupd' command is not used by any board. The `dfu tftp' command
provides the same capabilities.

So let's drop the `fitupd' command.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-07-16 12:37:01 +02:00
Fabio Estevam
4503299119 imx6: Remove unneeded CONFIG_DM_MDIO
As explained in the CONFIG_DM_MDIO text inside drivers/net/Kconfig:

"Useful in particular for systems that support
DM_ETH and have a stand-alone MDIO hardware block shared by multiple
Ethernet interfaces."

i.MX6 has a single FEC instance, so there is no need to select
CONFIG_DM_MDIO.

Remove it from the i.MX6 defconfig files.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
2020-07-16 11:21:06 +02:00
Ilko Iliev
8794cb543f arm: dts: imx7: Fix error in coresight TPIU graph connection
OF graph endpoint connections must be bidirectional and dtc warn if they
are not. i.MX7 based DTs have an error and generate
warnings:

arch/arm/dts/imx7d-sdb.dtb: Warning (graph_endpoint):
/replicator/ports/port@0/endpoint: graph connection to node
'/soc/tpiu@30087000/port/endpoint' is not bidirectional
arch/arm/dts/imx7d-sdb.dtb: Warning (graph_endpoint):
/soc/tpiu@30087000/port/endpoint: graph connection to node
'/replicator/ports/port@1/endpoint' is not bidirectional

Signed-off-by: Ilko Iliev <iliev@ronetix.at>
2020-07-16 11:20:58 +02:00
Lukasz Majewski
949feef062 arm: Add extra boot device (UART) to run Ymodem u-boot.img boot on XEA (imx28)
This commit enables imx28 based XEA board's u-boot.sb (SPL) to download
u-boot proper (u-boot.img) via Ymodem protocol.

This is extremely useful in the recovery scenario where u-boot.sb is
downloaded via uuu utility to SDRAM [*], and then one can upload u-boot
proper via serial console to fully debrick the device.

Note - debricking procedure of imx28 devices:
- NXP's original USB based tools (like mxsldr or uuu) expect single
  u-boot.sb which is a relic of the old U-Boot (~2013) without SPL and
  U-Boot proper distinction.

[*] On Host:
------------
cat << EOF > imx28_xea.lst
uuu_version 1.3.0
SDPS: boot -f /srv/tftp/xea/u-boot.sb
SDPU: done
EOF

Please start picocom:
sudo picocom -b 115200 -s "sz -vv" /dev/ttyUSB1
sudo ./uuu/uuu -V imx28_xea.lst

On the U-boot console one shall see:
Trying to boot from UART
CCC

Then please press CTRL+A, S
and type u-boot.img

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Acked-by: Peng Fan <peng.fan@nxp.com>
2020-07-16 11:20:33 +02:00
Heiko Schocher
08556f829f imx6: aristainetos: sync defconfig with 2020.10
as patch
gpio: search for gpio label if gpio is not found through bank name

is now in mainline, but functionality is disabled, we
need to enable

CONFIG_DM_GPIO_LOOKUP_LABEL

for the aristainetos boards.

Signed-off-by: Heiko Schocher <hs@denx.de>
2020-07-16 11:20:27 +02:00
Mo, Yuezhang
ee6866e6c7 watchdog: imx: Support set timeout by wdt command
After "4b969deac0 watchdog: imx: Add DM support", the imx watchdog
can be started by wdt command. But the imx watchdog driver only
support start with the default timeout.

This commit adds the support for setting the timeout which pass from
the wdt command into the imx watchdog. If the timeout out of the
valid range(0.5~128s), start the watchdog with a timeout within the
valid range and the timeout is the one which closest to the passed
timeout.

Signed-off-by: Yuezhang.Mo <yuezhang.mo@sony.com>
Reviewed-by: Andy.Wu <Andy.Wu@sony.com>
Reviewed-by: stefano Babic <sbabic@denx.de>
2020-07-16 11:20:21 +02:00
Sébastien Szymanski
eefd93e7f8 power: pmic_pca9450: fix PCA9450A I2C address
Quoting Ye Li from NXP:

    "We have confirmed with PMIC team, 0x35 is used only on early chips
    and not used any more. 0x25 is the final address."

Fix it by merging power_pca9450a_init and power_pca9450b_init into one
function power_pca9450_init.

Signed-off-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
2020-07-16 11:20:14 +02:00
Heinrich Schuchardt
90865614b4 ARM: mx6: make CAAM usable on the i.MX6 boards
Even if the HAB fuse is not set we want to be able to use the Cryptographic
Accelerator and Assurance Module (CAAM) for generating random numbers. So
SYS_FSL_HAS_SEC should be selected even if IMX_HAB is not set.

arch_misc_init() has to be called to initialize the CAAM.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-07-16 11:20:08 +02:00
Fabio Estevam
496cb1f274 pico-imx6ul: Fix Quick Start Guide URL
The current URL for the pico imx6ul board is not valid anymore. Change
to a different URL that works.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
2020-07-16 11:20:02 +02:00
Ye Li
6103e570cd gpio: mxc_gpio: Improve to use ofdata_to_platdata
Current mxc_gpio DM driver allocates the platdata in bind function to
handle both OF_CONTROL enabled case and disabled case. This implementation
puts the devfdt_get_addr in bind, which introduces much overhead especially
in board_f phase.

Change the driver to a common way for handling the cases by using
ofdata_to_platdata and using DM framework to allocate platdata.

Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2020-07-16 11:19:57 +02:00
Ye Li
dfbdaa66b7 misc: scu_api: Add SCFW API to get the index of boot container set
Add SCFW API sc_misc_get_boot_container to get current boot container
set index.
The index value returns 1 for primary container set, 2 for secondary
container set.

Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2020-07-16 11:19:50 +02:00
Ye Li
def88bce09 spi: fsl_qspi: Support to use full AHB space on i.MX
i.MX platforms provide large AHB mapped space for QSPI, each
controller has 256MB. However, current driver only maps small
size (AHB buffer size) of AHB space, this implementation
causes i.MX failed to boot M4 with QSPI XIP image.

Add config CONFIG_FSL_QSPI_AHB_FULL_MAP (default enabled for i.MX)
to address above problem.

When the config is set:
1. Full AHB space is divided to each CS.
2. A dedicated LUT entry is used for AHB read only.
3. The MODE instruction in LUT is replaced to standard ADDR instruction
4. The address in spi_mem_op is used to SFAR and AHB read

Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Reviewed-by: Kuldeep Singh <kuldeep.singh@nxp.com>
2020-07-16 11:19:43 +02:00
Ye Li
93d6c8f7b7 spi: fsl_qspi: Add support for i.MX7ULP
Add compatible string and driver data for i.MX7ULP.
Meanwhile, the address set to SFA1AD/SFA2AD/SFB1AD/SFB2AD should
align with 1KB, because the lowest 10 bits are reserved by the
registers definition.
For i.MX7ULP which has only 128Bytes AHB buffer, must align it
when setting the registers and selecting cs.

Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Reviewed-by: Kuldeep Singh <kuldeep.singh@nxp.com>
2020-07-16 11:19:36 +02:00
Tom Rini
3b33eff3f2 Merge tag 'mmc-7-24-2020' of https://gitlab.denx.de/u-boot/custodians/u-boot-mmc
- Correct mmc_spi check condition
- Generate R1/R2/R1b response
- Read SSR for SD SPI
2020-07-15 22:41:43 -04:00
Tom Rini
47b0a49324 Merge branch '2020-07-15-ci-updates'
- Make sure GRUB is copied to the right place for CI on GitLab/Azure
- Note in our GitHub PR template that you can use this to trigger Azure CI
2020-07-15 15:48:05 -04:00
Heinrich Schuchardt
9e0f5eab44 Azure: copy GRUB to correct build path
The GRUB binaries are expected in $UBOOT_TRAVIS_BUILD_DIR.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-07-15 15:47:48 -04:00
Heinrich Schuchardt
82560ae21f .gitlab-ci.yml: copy GRUB to correct build path
The GRUB binaries are expected in $UBOOT_TRAVIS_BUILD_DIR.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-07-15 15:47:48 -04:00
Tom Rini
19d76290f0 github: azure: Update our GitHub template to note for CI
While the general policy of not taking changes to the project via pull
requests directly on GitHub has not changed, it can be useful to submit
a PR there in order to trigger a CI run on Azure.  These are run
automatically and the results are populated back to GitHub.  Add a note
to the template to reflect this.

Signed-off-by: Tom Rini <trini@konsulko.com>
2020-07-15 15:47:48 -04:00
Tom Rini
3f126c764d Merge tag 'ti-v2020.10-rc1' of https://gitlab.denx.de/u-boot/custodians/u-boot-ti
- Sync DMA and CPSW DT bindings for K3 devices
- Other minor fixes for mmc and other TI devices
2020-07-14 09:09:27 -04:00
Niel Fourie
26a6ed1b2e arm: imx6q: pcm058: Convert pcm058 to use DM with DTs
Convert pcm058 support to use device trees and the driver model.
Add rudimentary boot scripts to the environment, expand README.

Signed-off-by: Niel Fourie <lusus@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
2020-07-14 11:46:04 +02:00
Niel Fourie
7e64182ef4 arm: imx6q: pcm058: change MAINTAINER
Change the MAINTAINER of pcm058.

Signed-off-by: Niel Fourie <lusus@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
2020-07-14 11:46:04 +02:00
Niel Fourie
08310cf96e arm: dts: imx6q: Add Linux dts files for Phytec Mira
Add Phytec Mira device tree files, for use with pcm058.
>From Linux 5.6, commit 7111951b8d49 upstream

Signed-off-by: Niel Fourie <lusus@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
2020-07-14 11:46:04 +02:00
Niel Fourie
3e21810743 dts-bindings: regulator: Add dlg,da9063-regulator
Add da9063-regulator bindings from Linux 5.6:
commit 7111951b8d49 upstream

Signed-off-by: Niel Fourie <lusus@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
2020-07-14 11:46:04 +02:00
Pragnesh Patel
ed4a11cb7d mmc_spi: generate R1b response for erase and stop transmission command
As per the SD physical layer specification version 7.10, erase
command (CMD38) and stop transmission command (CMD12) will generate
R1b response.

R1b = R1 + busy signal

A non-zero value after the R1 response indicates card is ready for
next command.

Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Tested-by: Bin Meng <bin.meng@windriver.com>
2020-07-14 16:19:47 +08:00
Pragnesh Patel
6f4555af84 mmc: mmc_spi: Generate R1 response for erase block start and end address
Erase block start address (CMD32) and erase block end address (CMD33)
command will generate R1 response for mmc SPI mode.

R1 response is 1 byte long for mmc SPI, so assign 1 byte as a response
for this commands.

Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Tested-by: Bin Meng <bin.meng@windriver.com>
2020-07-14 16:19:46 +08:00
Pragnesh Patel
70f176ae82 mmc: mmc_spi: Read R2 response for send status command - CMD13
Send status command (CMD13) will send R1 response under SD mode
but R2 response under SPI mode.

R2 response is 2 bytes long, so read 2 bytes for mmc SPI mode

Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Tested-by: Bin Meng <bin.meng@windriver.com>
2020-07-14 16:19:44 +08:00
Pragnesh Patel
810bc13803 mmc: read ssr for SD spi
The content of ssr is useful only for erase operations.
This saves erase time.

Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Tested-by: Bin Meng <bin.meng@windriver.com>
2020-07-14 16:19:43 +08:00
Pragnesh Patel
a236d834fa mmc: mmc_spi: generate R1 response for different mmc SPI commands
R1 response is 1 byte long for mmc SPI commands as per the updated
physical layer specification version 7.10.

So correct the resp and resp_size for existing commands

Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Tested-by: Bin Meng <bin.meng@windriver.com>
2020-07-14 16:19:42 +08:00
Pragnesh Patel
3ba1d53c42 mmc: mmc_spi: correct the while condition
When variable i will become 0, while(i--) loop breaks but variable i will
again decrement to -1 because of i-- and that's why below condition
"if (!i && (r != resp_match_value)" will never execute, So doing "i--"
inside of while() loop solves this problem.

Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Tested-by: Bin Meng <bin.meng@windriver.com>
2020-07-14 16:19:39 +08:00
Peng Fan
86e9d7e814 imx8mm_evk: enlarge CONFIG_SYS_BOOTM_LEN
Enlarge CONFIG_SYS_BOOTM_LEN when booting FIT image with kernel.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-07-14 15:23:48 +08:00
Peng Fan
eb3967388e imx8m: implement armv8_el2_to_aarch32
Add iMX8M specific armv8_el2_to_aarch32 to let AArch64 mode U-Boot
could boot aarch32 mode linux with FIT image as below:

/dts-v1/;

/ {
        description = "Configuration to load ARM32 Linux";

        images {
                kernel@1 {
                        description = "ARM32 Linux kernel";
                        data = /incbin/("./Image");
                        type = "kernel";
                        arch = "arm";
                        os = "linux";
                        compression = "none";
                        load = <0x40008000>;
                        entry = <0x40008000>;
                        hash@1 {
                                algo = "md5";
                        };
                };
                fdt@1 {
                        description = "Flattened Device Tree blob";
                        data = /incbin/("./imx8mm-evk.dtb");
                        type = "flat_dt";
                        arch = "arm";
                        compression = "none";
                        load = <0x43000000>;
                        hash@1 {
                                algo = "md5";
                        };
                };
        };
        configurations {
                default = "config@1";

                config@1 {
                        description = "fsl-imx8mm-evk";
                        kernel = "kernel@1";
                        fdt = "fdt@1";
                };
        };
};

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-07-14 15:23:48 +08:00
Peng Fan
3c41728d80 imx8m: Refactor the OPTEE memory removal
Current codes assume the OPTEE address is at the end of first DRAM bank.
Adjust the process to allow OPTEE in the middle of first bank.

When OPTEE memory is removed from first bank, it may split the first bank
to two banks, adjust the MMU table for the split case,
Since the default CONFIG_NR_DRAM_BANKS is 4, it is enough, just enlarge
i.MX8MP evk to default to avoid issue.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Silvano di Ninno <silvano.dininno@nxp.com>
Tested-by: Silvano di Ninno <silvano.dininno@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-07-14 15:23:48 +08:00
Peng Fan
ec04ae4217 clk: imx8m: drop clk settings
We use non-dm code to configure the clk settings in order to simplify
dm clk driver in future, so remove the duplicated code from clk driver

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-07-14 15:23:47 +08:00
Peng Fan
6036dba1c8 imx8m: disable nodes before kernel/mfgtool boot for fused part
To fused part, we need to disable nodes of dtb to let kernel boot.

To mfgtool, USB issue when using super-speed for mfgtool, temporally
work around the problem to use high-speed only.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-07-14 15:23:47 +08:00
Ye Li
2707faf01f imx8mn/imx8mp: override env_get_offset and env_get_location
To use one defconfig for all boot device, we have to runtime set
env offset and return env medium according to the boot device.
This patch overrides the env_get_offset and env_get_location to
implement the feature.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-07-14 15:23:47 +08:00
Peng Fan
7a42bf0489 imx8m: power down fused cores
For non-Quad SoCs, the fused cpu cores could be powered down in SPL
to save power.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-07-14 15:23:47 +08:00
Ye Li
d1eee7eed9 imx8mp: Add fused parts support
iMX8MP has 6 fused parts in each qualification tier, with core, VPU,
ISP, NPU or DSP fused respectively.

The configuration tables for enabled modules:
MIMX8ML8DVNLZAA          Quad Core, VPU, NPU, ISP, DSP
MIMX8ML7DVNLZAA          Quad Core, NPU, ISP
MIMX8ML6DVNLZAA          Quad Core, VPU, ISP
MIMX8ML5DVNLZAA          Quad Core, VPU
MIMX8ML4DVNLZAA          Quad Lite
MIMX8ML3DVNLZAA          Dual Core, VPU, NPU, ISP, DSP

Add the support in U-Boot

Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-07-14 15:23:47 +08:00
Peng Fan
2f3c92060d imx8m: workaround ROM serror
ROM SError happens on two cases:

1. ERR050342, on iMX8MQ HDCP enabled parts ROM writes to GPV1 register, but
when ROM patch lock is fused, this write will cause SError.

2. ERR050350, on iMX8MQ/MM/MN, when the field return fuse is burned, HAB
is field return mode, but the last 4K of ROM is still protected and cause
SError.

Since ROM mask SError until ATF unmask it, so then ATF always meets the
exception. This patch works around the issue in SPL by enabling SPL
Exception vectors table and the SError exception, take the exception
to eret immediately to clear the SError.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-07-14 15:23:47 +08:00
Peng Fan
3c9221ad27 imx8m: add eqos clk
Add imx_eqos_txclk_set_rate/imx_get_eqos_csr_clk to override the
weak function in driver

Add set_clk_eqos to configure eQoS clk

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-07-14 15:23:47 +08:00
Peng Fan
3c1c28d4e0 imx8m: add sdhc/nand/ecspi clk api
Current DM CLK is a bit complicated, for simplity, let DM clk only
support enable/disable/get_rate. For the expected rate settings,
we use non-DM clk to do that. Then we could have simple DM clk for
i.MX and could also share between SPL/U-Boot proper.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-07-14 15:23:47 +08:00
Peng Fan
14254e646d imx8m: configure NoC clk
Configure NoC clk for better system performance

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-07-14 15:23:47 +08:00
Peng Fan
46a8a28bf6 imx8m: configure arm clk sources from PLL
A53 CCM root max support 1GHz, to support high freq, we need
to switch ARM clk sources from ARM PLL directly.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-07-14 15:23:47 +08:00
Ye Li
ac9a451828 clk: imx8mp: Update imx8mp ccf clock driver
Add clocks for FEC and flexspi, and add set parent clock callback,
so DTS can assign clocks

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-07-14 15:23:47 +08:00
Ye Li
4b6548d17d clk: imx8mm/8mn: Add USB clocks
Add USB relevant clocks to support usb clock settings for both
DM USB host and gadget drivers

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-07-14 15:23:47 +08:00
Ye Li
ee1f8b226f clk: clk-imx8mn: Update clock tree and support set parent
Add set clock parent support.
Add ENET and flexspi related clocks to support assigned clocks

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-07-14 15:23:47 +08:00
Peng Fan
a65409420d clk: imx8mm: Add qspi clock
Add qspi clock

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-07-14 15:23:47 +08:00
Peng Fan
7ddb4ef3e1 clk: imx8mm: fix clk set parent
Fix clk set parent, so we could still have correct clocks after
parent changing.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-07-14 15:23:47 +08:00
Peng Fan
d6498bc459 imx: remove imx sip file
We have switch to use arm_smccc_smc, no need to keep i.MX specific
sip wrapper.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-07-14 15:23:47 +08:00
Peng Fan
4b8f22de16 imx: power-domain: use arm_smccc_smc
Use arm_smccc_smc to replace call_imx_sip

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-07-14 15:23:47 +08:00
Peng Fan
c2eaa6eb09 imx8: fuse: use arm_smccc_smc
Use arm_smccc_smc to replace call_imx_sip

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-07-14 15:23:46 +08:00
Peng Fan
bf26b9421e imx: bootaux: use arm_smccc_smc
Use arm_smccc_smc to replace call_imx_sip

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-07-14 15:23:46 +08:00
Peng Fan
a2f143eaac imx8m: soc: use arm_smccc_smc
Use arm_smccc_smc to replace call_imx_sip

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-07-14 15:23:46 +08:00
Peng Fan
dc575201c8 imx8: misc: use arm_smccc_smc
Use arm_smccc_smc to replace call_imx_sip

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-07-14 15:23:46 +08:00
Peng Fan
683a91cdbd pinctrl: imx5: move soc info to data section
The soc info without initialization value should be put into
data section. The driver could be used before relocation,
with it in BSS section could cause issue, since BSS section
is not initializated and it might overwrite other areas that
used by others, such as dtb.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-07-14 15:23:46 +08:00
Peng Fan
4b8c6030da pinctrl: imx8m: move soc info to data section
The soc info without initialization value should be put into
data section. The driver could be used before relocation,
with it in BSS section could cause issue, since BSS section
is not initializated and it might overwrite other areas that
used by others, such as dtb.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-07-14 15:23:46 +08:00
Peng Fan
58db844fc8 pinctrl: imx7: move soc info to data section
The soc info without initialization value should be put into
data section. The driver could be used before relocation,
with it in BSS section could cause issue, since BSS section
is not initializated and it might overwrite other areas that
used by others, such as dtb.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-07-14 15:23:46 +08:00
Oliver Chen
b335966958 drivers: ddr: imx Workaround for i.MX8M DDRPHY rank to rank issue
Add logic to automatically update umctl2's setting based
on phy training CDD value for rank to rank space issue

Acked-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Oliver Chen <Oliver.Chen@nxp.com>
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-07-14 15:23:46 +08:00
Jian Li
3f63d27c17 imx8mp: Disables use of MR4 TUF flag (MR4[7]) bit
In uMCTL2 Databook, for LPDDR4, it is recommended to set
this register to 1. This can avoid ddr bandwidth is lower
after booting with running for a while.

Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Jian Li <jian.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-07-14 15:23:46 +08:00
Jian Li
5865d14dde imx8mp: DDR performance tunning
1. set SCHED.rdwr_idle_gap=0
2. set SCHED.pageclose=1

Reviewed-by: Jacky Bai <ping.bai@nxp.com>
Signed-off-by: Jian Li <jian.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-07-14 15:23:46 +08:00
Jian Li
dd2f41370d imx8mp: enable rd_port_urgent
Need to enable read urgent for NoC panic signal

Signed-off-by: Jian Li <jian.li@nxp.com
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-07-14 15:23:46 +08:00
Sherry Sun
f3acb02386 drivers: ddr: imx8mp: Add inline ECC feature support
the DRAM Controller in i.MX8MP will support a feature called "Inline ECC".
This is supported for all 3 supported DRAM technologies (LPDDR4, DDR4 and
DDR3L). When this feature is enabled by software, the DRAM Controller
reserves 12.5% of DRAM capacity for ECC information, and presents only
the non-ECC portion (lower 87.5% of the installed capacity of DRAM) to
the rest of the SoC.
The DRAM memory can be divided into 8 regions so that if a use case only
requires ECC protection on a subset of memory, then only that subset of
memory need support inline ECC. If this occurs, then there is no
performance penalty accessing the non-ECC-protected memory (no need to
access ECC for this portion of the memory map). This is all configured
with the DRAM Controller.

Signed-off-by: Sherry Sun <sherry.sun@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-07-14 15:23:46 +08:00
Jacky Bai
1eb325af16 driver: ddr: imx: correct the pwrctl setting of selfref_en on imx8m
The 'selfref_en' should be bit'0', so correct the setting to
enable the auto self-refresh.

Reviewed-by: Jian Li <jian.li@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-07-14 15:23:46 +08:00
Jacky Bai
355c620666 driver: ddr: imx: skip ddr_ss_gpr config on imx8mn
There is no DDR_SS_GPR0 exits on i.MX8MN, so skip setting
this register on i.MX8MN.

Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-07-14 15:23:46 +08:00
Tom Rini
959a481f8f Merge tag 'efi-2020-10-rc1-3' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi
Pull request for UEFI sub-system for efi-2020-10-rc1 (3)

Up to now UEFI variables where stored in U-Boot environment variables.
Saving UEFI variables was not possible without saving the U-Boot
environment variables. With this patch series file ubootefi.var in the
EFI system partition is used for saving UEFI variables. Furthermore the
UEFI variables are exposed for reading at runtime.

Code corrections for UEFI secure boot are provided.

A buffer overrun in the RSA library is fixed.
2020-07-13 11:29:51 -04:00
Patrick Delaunay
865fdfddce arm: k3: use correct weak function name spl_board_prepare_for_linux
Replace the function spl_board_prepare_for_boot_linux by the correct
name of the weak function spl_board_prepare_for_linux defined in spl.h.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-07-13 20:58:34 +05:30
Pali Rohár
82c829d476 mmc: omap_hsmmc: Set 3.3V for IO voltage on all places
In commit commit d2c05f50e1 ("mmc: omap_hsmmc: Set 3.3V for IO voltage")
was changed 3.0V IO voltage to 3.3V but it was not done on all places in
omap_hsmmc driver. That commit broke eMMC support on Nokia N900.

This patch fixes that problematic commit and changes 3.0V to 3.3V on all
remaining places in omap_hsmmc driver.

Fixes: d2c05f50e1 ("mmc: omap_hsmmc: Set 3.3V for IO voltage")
Signed-off-by: Pali Rohár <pali@kernel.org>
Acked-by: Pavel Machek <pavel@ucw.cz>
Reviewed-by: Faiz Abbas <faiz_abbas@ti.com>
2020-07-13 20:58:34 +05:30
Jan Kiszka
dde9da82d6 arm: k3: Consolidate and silence k3_fit_atf.sh call
Buiding u-boot-spl-k3[_HS].its is currently unconditionally verbose
about what it does. Change that by wrapping the call to k3_fit_atf.sh
into a cmd, also using that chance to reduce duplicate lines of makefile
code - only IS_HS=1 is different when CONFIG_TI_SECURE_DEVICE is on.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Acked-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-07-13 20:58:34 +05:30
Tom Rini
58ad372c49 omap3_beagle: Finish current outstanding DM migrations
At this point in time we can now remove our legacy code and switch to
enabling DM for USB and Ethernet.

Cc: Derald D. Woods <woods.technical@gmail.com>
Cc: Adam Ford <aford173@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tested-by: Derald D. Woods <woods.technical@gmail.com>
2020-07-13 20:58:34 +05:30
Adam Ford
7bb33e4684 ARM: da850-evm: Unify config options with Kconfig
There are two options that are currently whitelisted, but they
are redundant, because there are not necessary since Kconfig options
exist to basically state the same thing.

CONFIG_DIRECT_NOR_BOOT and CONFIG_USE_NOR are both set together and
only used by the da850 when booting from NOR, however the only time
CONFIG_MTD_NOR_FLASH is configured is when booting from NOR. Since
NOR doesn't need SPL, the options for SPL can be moved to a check for
building SPL instead of checking for NOR.

This patch removes the checks for these two config options and unifies
the checks around the Kconfig option of CONFIG_MTD_NOR_FLASH.

Since this board is the only board that uses these two config options,
they can be removed from the whitelist table.

Signed-off-by: Adam Ford <aford173@gmail.com>
2020-07-13 20:58:34 +05:30
Adam Ford
5f1600e03e README: davinci: Clarify when SPL is used and the target devices.
The documentation states that SPL is enabled in all config options
for the da850.  This incorrect, because devices booting from NOR
do not need the SPL to do the low level initializion because when
booting from NOR, the board is able to execute in place (XIP)

This also clarifies that SPL isn't only used for booting from SPI,
because it is also used for booting from MMC and NAND for those
devices supporting those boot options.

Signed-off-by: Adam Ford <aford173@gmail.com>
2020-07-13 20:58:34 +05:30
Vignesh Raghavendra
3f09ebfbde arm: dts: k3-am65: Sync CPSW DT node from kernel
Sync CPSW DT node from kernel and move it out of -u-boot.dtsi file.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2020-07-13 20:58:34 +05:30
Vignesh Raghavendra
aeeca07a80 arm: dts: k3-j721e: Sync CPSW DT node from kernel
Sync CPSW DT node from Kernel and move it out of -u-boot.dtsi file.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2020-07-13 20:58:34 +05:30
Vignesh Raghavendra
84228940c3 net: ti: am65-cpsw-nuss: Update driver to use kernel DT
Kernel DT has CPSW ports under ethernet-ports subnode. Update the driver
to look for the same.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2020-07-13 20:58:34 +05:30
Vignesh Raghavendra
9eab6fd526 net: ti: am65-cpsw-nuss: Set ALE default thread enable
Force default thread to be used for RX as ALE is anyways set to Bypass
mode.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2020-07-13 20:58:34 +05:30
Vignesh Raghavendra
cf9b9942bf net: ti: am65-cpsw-nuss: Remove dead code
MDIO node is not referenced further, therefore drop the dead code.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2020-07-13 20:58:34 +05:30
Vignesh Raghavendra
ddcf5318af dma: ti: k3-udma: Switch to k3_ringacc_request_rings_pair
We only request ring pairs via K3 DMA driver, switch to use the new
k3_ringacc_request_rings_pair() to simplify the code.

As a good side effect, all boot stages now use exposed RING mode which
avoid maintaining proxy mode for 32 bit R5 core.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2020-07-13 20:58:34 +05:30
Vignesh Raghavendra
7be5121719 dma: ti: k3-udma: Move RX descriptor ring entries to rflow struct
In K3 UDMA architecture, RX rings are associated with RX flows rather
than RX channels, therefore move the ring pointers to udma_rflow struct

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2020-07-13 20:58:34 +05:30
Vignesh Raghavendra
af374c24d9 dma: ti: k3-udma: Introduce udma_chan_config struct
Encapsulate channel configuration in a separate struct so as to ease
resetting of these fields with memset() and also to increase readability
of the code.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2020-07-13 20:58:34 +05:30
Vignesh Raghavendra
b3f95997ce soc: ti: k3-ringacc: Separate soc specific initialization
In preparation of adding more K3 SoCs, separate soc specific
initialization add a SoC specific initialization hook.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2020-07-13 20:58:34 +05:30
Vignesh Raghavendra
5d25784998 soc: ti: k3-ringacc: Add an API to request pair of rings
Add new API k3_ringacc_request_rings_pair() to request pair of rings at
once, as in the most case Rings are used with DMA channels which required
to request pair of rings - one to feed DMA with descriptors (TX/RX FDQ) and
one to receive completions (RX/TX CQ). This will allow to simplify Ringacc
API users.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2020-07-13 20:58:34 +05:30
Vignesh Raghavendra
db08a1df43 soc: ti: k3-ringacc: Move state tracking variables under a struct
Move the free, occ, windex and rinfex under a struct.
We can use memset to zero them and it will allow a cleaner way to extend
the variables for duplex rings.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2020-07-13 20:58:34 +05:30
Vignesh Raghavendra
99faf0df04 arm: dts: k3-am65/j721e: Sync DMA DT bindings from Kernel DT
Sync DT bindings from kernel DT and move them to out of -u-boot.dtsi
files.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
2020-07-13 20:58:34 +05:30
Vignesh Raghavendra
5c92fffab2 dma: ti: k3-udma: Update driver to use static endpoint Data
Update driver to use static PSIL endpoint Data instead of DT. This will
allow DT bindings to be in sync with kernel's DT.

Note that this patch breaks networking and OSPI boot as driver changes
are not backward compatible with existing DT. Subsequent commit will
update the DT to make it compatible with updated driver.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
2020-07-13 20:58:34 +05:30
Vignesh Raghavendra
53b04c6c09 dma: ti: Add static PSIL endpoint information
Much of PSIL endpoint configuration for a given SoC can be known at
compile time, therefore pass them for platform specific data instead of
DT.

Add per SoC's specific PSIL endpoint data. This is to bring driver in
sync with upstream DT.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
2020-07-13 20:58:34 +05:30
Tom Rini
497c7598c4 Merge branch 'master' of https://gitlab.denx.de/u-boot/custodians/u-boot-spi
- Enable DM_SPI on siemens omap boards (Jagan)
- Dropped some non-dm supported omap3 boards (Jagan)
- Dropped non-dm code in omap3 spi driver (Jagan)
- Dropped non-dm code in kirkwood spi driver (Bhargav)
2020-07-11 17:40:00 -04:00
Heinrich Schuchardt
4a3155de3d efi_selftest: adjust runtime test for variables
As variable services are available at runtime we have to expect EFI_SUCCESS
when calling the services.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-07-11 23:14:17 +02:00
Heinrich Schuchardt
b02a707152 efi_loader: enable UEFI variables at runtime
Enable UEFI variables at runtime.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-07-11 23:14:17 +02:00
Heinrich Schuchardt
ab7296c99c efi_loader: use memory based variable storage
Saving UEFI variable as encoded U-Boot environment variables does not allow
implement run-time support.

Use a memory buffer for storing UEFI variables.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-07-11 23:14:17 +02:00
Heinrich Schuchardt
f1f990a8c9 efi_loader: memory buffer for variables
Saving UEFI variable as encoded U-Boot environment variables does not allow
support at runtime.

Provide functions to manage a memory buffer with UEFI variables.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-07-11 23:14:17 +02:00
Heinrich Schuchardt
b0dd8cb407 efi_loader: new function efi_memcpy_runtime()
Provide a memcpy() function that we can use at UEFI runtime.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-07-11 23:14:17 +02:00
Heinrich Schuchardt
724d28171e efi_loader: optional pointer for ConvertPointer
If the EFI_OPTIONAL_PTR is set in DebugDisposition, a NULL pointer does not
constitute an invalid parameter.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-07-11 23:14:17 +02:00
Heinrich Schuchardt
a44d2a2399 efi_loader: export efi_convert_pointer()
We need ConvertPointer() to adjust pointers when implementing  runtime
services within U-Boot.

After ExitBootServices() gd is not available anymore. So we should not use
EFI_ENTRY() and EFI_EXIT().

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-07-11 23:14:17 +02:00
Heinrich Schuchardt
5f7dcf079d efi_loader: UEFI variable persistence
Persist non-volatile UEFI variables in a file on the EFI system partition.

The file is written whenever a non-volatile UEFI variable is changed after
initialization of the UEFI sub-system.

The file is read during the UEFI sub-system initialization to restore
non-volatile UEFI variables.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-07-11 23:14:17 +02:00
Heinrich Schuchardt
198bf6418e efi_loader: secure boot flag
In audit mode the UEFI variable SecureBoot is set to zero but the
efi_secure_boot flag is set to true.

The efi_secure_boot flag should match the UEFIvariable SecureBoot.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-07-11 23:14:17 +02:00
Heinrich Schuchardt
55a830560e efi_loader: read-only AuditMode and DeployedMode
Set the read only property of the UEFI variables AuditMode and DeployedMode
conforming to the UEFI specification.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-07-11 23:14:17 +02:00
Heinrich Schuchardt
fd7b6730ab efi_loader: value of VendorKeys
According to the UEFI specification the variable VendorKeys is 1 if the
"system is configured to use only vendor-provided keys".

As we do not supply any vendor keys yet the variable VendorKeys must be
zero.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-07-11 23:14:17 +02:00
Heinrich Schuchardt
37fa7cb045 efi_loader: keep attributes in efi_set_variable_int
Do not change the value of parameter attributes in function
efi_set_variable_int(). This allows to use it later.

Do not use variable attr for different purposes but declare separate
variables (attr and old_attr).

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-07-11 23:14:17 +02:00
Heinrich Schuchardt
dda8c7163a efi_loader: simplify boot manager
Simplify the implementation of the UEFI boot manager:

* avoid EFI_CALL for SetVariable() and GetVariable()
* remove unnecessary type conversions

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-07-11 23:14:17 +02:00
Heinrich Schuchardt
dc90e5c491 efi_loader: OsIndicationsSupported, PlatformLangCodes
UEFI variables OsIndicationsSupported, PlatformLangCodes should be read
only.

Avoid EFI_CALL() for SetVariable().

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-07-11 23:14:16 +02:00
Heinrich Schuchardt
01df8cf336 efi_loader: separate UEFI variable API from implemementation
Separate the remaining UEFI variable API functions GetNextVariableName and
QueryVariableInfo() from internal functions implementing them.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-07-11 23:14:16 +02:00
Heinrich Schuchardt
2a79c352ca efi_loader: display RO attribute in printenv -e
Let the 'printenv -e' command display the read only flag.
If the variable is time authenticated write the time stamp.

Avoid EFI_CALL() when calling SetVariable() and GetVariable().

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-07-11 23:14:16 +02:00
Heinrich Schuchardt
f2d2b3a11c efi_loader: prepare for read only OP-TEE variables
We currently have two implementations of UEFI variables:

* variables provided via an OP-TEE module
* variables stored in the U-Boot environment

Read only variables are up to now only implemented in the U-Boot
environment implementation.

Provide a common interface for both implementations that allows handling
read-only variables.

As variable access is limited to very few source files put variable
related definitions into new include efi_variable.h instead of efi_loader.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-07-11 23:14:16 +02:00
Heinrich Schuchardt
5a8d1f60b2 fs/fat: reduce data size for FAT_WRITE
Allocated tmpbuf_cluster dynamically to reduce the data size added by
compiling with CONFIG_FAT_WRITE.

Reported-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-07-11 23:14:16 +02:00
Heinrich Schuchardt
a27c78fddb efi_loader: NULL dereference in efi_convert_pointer
Avoid a possible NULL pointer dereference in efi_convert_pointer().

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-07-11 23:14:16 +02:00
Heinrich Schuchardt
1047c6e23c efi_loader: fix efi_get_child_controllers()
Don't call calloc(0, ..).
Consider return value of efi_get_child_controllers().

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-07-11 23:14:16 +02:00
Heinrich Schuchardt
39a75f5af1 efi_loader: wrong printf format in efi_image_parse
Commit 1b6c08548c ("efi_loader: image_loader: replace debug to
EFI_PRINT") leads to a build warning on 32bit systems:

lib/efi_loader/efi_image_loader.c: In function ‘efi_image_parse’:
include/efi_loader.h:123:8: warning: format ‘%lu’ expects argument
of type ‘long unsigned int’, but argument 8 has
type ‘size_t’ {aka ‘unsigned int’} [-Wformat=]

Use %zu for printing size_t.

Fixes: 1b6c08548c ("efi_loader: image_loader: replace debug to
EFI_PRINT")

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-07-11 23:14:16 +02:00
Ilias Apalodimas
ecb833a0c6 efi_loader: cleanup for tee backed variables
There's 2 variables in efi_get_next_variable_name() checking the size of
the variable name. Let's get rid of the reduntant definition and
simplitfy the code a bit.

Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-07-11 23:14:16 +02:00
AKASHI Takahiro
491bfe8606 lib: rsa: export rsa_verify_with_pkey()
This function will be used to implement public_key_verify_signature()
in a later patch. rsa_verify() is not suitable here because calculation
of message digest is not necessary.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-07-11 23:14:16 +02:00
Heinrich Schuchardt
53ce9a6ed9 test: use virt-make-fs to build image
Avoid sudo for test/py/tests/test_efi_secboot by using virt-make-fs.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-07-11 23:14:16 +02:00
AKASHI Takahiro
7fdc02b3d7 test/py: efi_secboot: add a test for verifying with digest of signed image
Signature database (db or dbx) may have not only certificates that contain
a public key for RSA decryption, but also digests of signed images.

In this test case, if database has an image's digest (EFI_CERT_SHA256_GUID)
and if the value matches to a hash value calculated from image's binary,
authentication should pass in case of db, and fail in case of dbx.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>

Use defined time stamps for sign-efi-sig-list.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-07-11 23:14:16 +02:00
AKASHI Takahiro
0c7772d40f test/py: efi_secboot: add a test for multiple signatures
In this test case, an image is signed multiple times with different
keys. If any of signatures contained is not verified, the whole
authentication check should fail.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>

Provide a defined time stamp for dbx_hash1.auth.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-07-11 23:14:16 +02:00
AKASHI Takahiro
c6361e73b5 test/py: efi_secboot: add a test against certificate revocation
Revocation database (dbx) may have not only certificates, but also
message digests of certificates with revocation time
(EFI_CERT_X509_SHA256_GUILD).

In this test case, if the database has such a digest and if the value
matches to a certificate that created a given image's signature,
authentication should fail.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>

Set defined time stamp for dbx_hash.auth.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-07-11 23:14:16 +02:00
AKASHI Takahiro
48ead6097b test/py: efi_secboot: split "signed image" test case-1 into two cases
Split the existing test case-1 into case1 and a new case-2:
case-1 for non-SecureBoot mode; case-2 for SecureBoot mode.

In addition, one corner case is added to case-2; a image is signed
but a corresponding certificate is not yet installed in "db."

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
2020-07-11 23:14:16 +02:00
AKASHI Takahiro
d863b307e8 test/py: efi_secboot: more fixes against pylint
More fixes against pylint warnings that autopep8 didn't handle
in the previous commit.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
2020-07-11 23:14:16 +02:00
AKASHI Takahiro
91d2b6216b test/py: efi_secboot: apply autopep8
Python's autopep8 can automatically correct some of warnings from pylint
and rewrite the code in a pretty print format. So just do it.

Suggested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
2020-07-11 23:14:16 +02:00
AKASHI Takahiro
7926dfb579 efi_loader: image_loader: add digest-based verification for signed image
In case that a type of certificate in "db" or "dbx" is
EFI_CERT_X509_SHA256_GUID, it is actually not a certificate which contains
a public key for RSA decryption, but a digest of image to be loaded.
If the value matches to a value calculated from a given binary image, it is
granted for loading.

With this patch, common digest check code, which used to be used for
unsigned image verification, will be extracted from
efi_signature_verify_with_sigdb() into efi_signature_lookup_digest(), and
extra step for digest check will be added to efi_image_authenticate().

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
2020-07-11 23:14:15 +02:00
AKASHI Takahiro
11bafb2596 efi_loader: image_loader: verification for all signatures should pass
A signed image may have multiple signatures in
  - each WIN_CERTIFICATE in authenticode, and/or
  - each SignerInfo in pkcs7 SignedData (of WIN_CERTIFICATE)

In the initial implementation of efi_image_authenticate(), the criteria
of verification check for multiple signatures case is a bit ambiguous
and it may cause inconsistent result.

With this patch, we will make sure that verification check in
efi_image_authenticate() should pass against all the signatures.
The only exception would be
  - the case where a digest algorithm used in signature is not supported by
    U-Boot, or
  - the case where parsing some portion of authenticode has failed
In those cases, we don't know how the signature be handled and should
just ignore them.

Please note that, due to this change, efi_signature_verify_with_sigdb()'s
function prototype will be modified, taking "dbx" as well as "db"
instead of outputing a "certificate." If "dbx" is null, the behavior would
be the exact same as before.
The function's name will be changed to efi_signature_verify() once
current efi_signature_verify() has gone due to further improvement
in intermediate certificates support.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
2020-07-11 23:14:15 +02:00
AKASHI Takahiro
1e64d0b5a4 efi_loader: signature: make efi_hash_regions more generic
There are a couple of occurrences of hash calculations in which a new
efi_hash_regions will be commonly used.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
2020-07-11 23:14:15 +02:00
AKASHI Takahiro
36b2f9da5c efi_loader: signature: fix a size check against revocation list
Since the size check against an entry in efi_search_siglist() is
incorrect, this function will never find out a to-be-matched certificate
and its associated revocation time in the signature list.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
2020-07-11 23:14:15 +02:00
AKASHI Takahiro
eb537fd7eb efi_loader: image_loader: retrieve authenticode only if it exists
Since the certificate table, which is indexed by
IMAGE_DIRECTORY_ENTRY_SECURITY and contains authenticode in PE image,
doesn't always exist, we should make sure that we will retrieve its pointer
only if it exists.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
2020-07-11 23:14:15 +02:00
AKASHI Takahiro
1a44b7059c efi_loader: image_loader: add a check against certificate type of authenticode
UEFI specification requires that we shall support three type of
certificates of authenticode in PE image:
  WIN_CERT_TYPE_EFI_GUID with the guid, EFI_CERT_TYPE_PCKS7_GUID
  WIN_CERT_TYPE_PKCS_SIGNED_DATA
  WIN_CERT_TYPE_EFI_PKCS1_15

As EDK2 does, we will support the first two that are pkcs7 SignedData.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
2020-07-11 23:14:15 +02:00
Heinrich Schuchardt
b9f217a4cb lib/crypto: use qualified path for x509_parser.h
Use the path relative to /include for x509_parser.h in pkcs7_parser.h.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-07-11 23:14:15 +02:00
Tom Rini
610e1487c8 Merge tag 'uniphier-v2020.10' of https://gitlab.denx.de/u-boot/custodians/u-boot-uniphier
UniPhier SoC updates for v2020.10

 - remove workaround for Cortex-A72

 - increase U-Boot proper size to 2MB

 - sync DT with Linux

 - add system bus controller driver

 - improve serial driver

 - add reset assertion to Denali NAND driver
2020-07-11 11:50:49 -04:00
Masahiro Yamada
5785950369 ARM: uniphier: remove NAND reset code
Now that commit 3e57f879ee ("mtd: nand: raw: denali: Assert reset
before deassert") added the reset assertion, this code in the board
file is unneeded.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-07-11 21:56:51 +09:00
Ley Foon Tan
94e8b328a7 mtd: nand: raw: denali: Wait for reset completion status
Fixed delay 200us is not working in certain platforms. Change to
poll for reset completion status to have more reliable reset process.

Controller will set the rst_comp bit in intr_status register after
controller has completed its reset and initialization process.

Tested-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Radu Bacrau <radu.bacrau@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-07-11 21:30:21 +09:00
Ley Foon Tan
3e57f879ee mtd: nand: raw: denali: Assert reset before deassert
Always put the controller in reset, then take it out of reset.
This is to make sure controller always in reset state in both SPL and
proper Uboot.

This is preparation for the next patch to poll for reset completion
(rst_comp) bit after reset.

Tested-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Radu Bacrau <radu.bacrau@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-07-11 21:30:21 +09:00
Masahiro Yamada
b053515e91 serial: uniphier: enable FIFO
This UART controller is integrated with a FIFO. Enable it.

You can put the next character into the FIFO while the transmitter
is sending out the current character. This works slightly faster.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-07-11 21:30:21 +09:00
Masahiro Yamada
26f7a7deab serial: uniphier: flush transmitter before changing hardware settings
Ensure the transmitter is empty when chaining the baudrate or any
hardware settings. If a character is remaining in the transmitter,
the console will be garbled.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-07-11 21:30:21 +09:00
Masahiro Yamada
70434ab9de serial: uniphier: use register macros instead of structure
After all, I am not a big fan of using a structure to represent the
hardware register map.

You do not need to know the entire register map.

Add only necessary register macros.

Use FIELD_PREP() instead of maintaining a pair of shift and mask.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-07-11 21:30:21 +09:00
Masahiro Yamada
d7877c985b ARM: uniphier: remove sbc/ directory
Now that this directory contains only uniphier_sbc_boot_is_swapped(),
move it to boot-device.c and delete the sbc/ directory entirely.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-07-11 21:30:21 +09:00
Masahiro Yamada
862274913f bus: uniphier-system-bus: move hardware init from board files
Move the bus initialization code to this driver from board files.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-07-11 21:30:21 +09:00
Masahiro Yamada
e2bb0be2fc bus: uniphier-system-bus: add UniPhier System Bus driver
Since commit 1517126fda ("ARM: uniphier: select DM_ETH"), DM-based
drivers/net/smc911x.c is compiled, but it is never probed because the
parent node lacks the DM-based driver.

I need a skeleton driver to populate child devices (but the next commit
will move more hardware settings to the this driver).

I put this to drivers/bus/uniphier-system-bus.c because this is the
same path as the driver in Linux kernel.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-07-11 21:30:21 +09:00
Masahiro Yamada
d69d49d3ec ARM: uniphier: remove support for NOR Flash on support card
I actually do not see this used these days because eMMC or NAND is used
for non-volatile devices. Dump the burden to maintain this crappy code.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-07-11 21:30:21 +09:00
Masahiro Yamada
f95237bb02 ARM: uniphier: remove unused uniphier_sbc_init_admulti()
This was used by the old sLD3 SoC, the support of which was removed
by commit 00aa453ebf ("ARM: uniphier: remove sLD3 SoC support").

There is no more user of this function.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-07-11 21:30:21 +09:00
Masahiro Yamada
43db571b2d ARM: uniphier: fix build error when CONFIG_MICRO_SUPPORT_CARD=n
If CONFIG_MICRO_SUPPORT_CARD is unset, the build fails due to
function redefinition.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-07-11 21:30:21 +09:00
Masahiro Yamada
0852033309 ARM: uniphier: sync with Linux 5.8-rc4
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-07-11 21:30:21 +09:00
Masahiro Yamada
56d463bdba ARM: uniphier: consolidate SoC select menu
Currently, the supports for the following two ARMv7 SoC groups
are exclusive, because the boot ROM loads the SPL to a different
address:

 - LD4, sLD8                 (SPL is loaded at 0x00040000)
 - Pro4, Pro5, PXs2, LD6b    (SPL is loaded at 0x00100000)

This limitation exists only when CONFIG_SPL=y.

Instead of using crappy CONFIG options, checking SPL and SPL_TEXT_BASE
is cleaner.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-07-11 21:30:21 +09:00
Masahiro Yamada
e3e9d5e8d7 ARM: uniphier: increase CONFIG_SYS_MONITOR_LEN to 2MB
I increased the maximum U-Boot proper size from time to time, but
configs/uniphier_v7_defconfig hit the current limit 832KB.

Some historical info:

In the initial support, the max size was 512MB.

Commit 58d702274c ("ARM: uniphier: increase CONFIG_SYS_MONITOR_LEN")
increased it to 576KB, and commit 3ce5b1a8d8 ("ARM: uniphier: move
SPL stack address") moved the SPL stack location to avoid the memory
map conflict. It was the solution to increase the size without changing
the NOR boot image map.

commit 1a4bd3a095 ("ARM: uniphier: increase CONFIG_SYS_MONITOR_LEN
again") ended up with increasing the max size again, breaking the NOR
boot image map. The limit was set to 832KB, otherwise the SPL stack
would overwrite the U-Boot proper image:
 CONFIG_SPL_STACK - CONFIG_SYS_UBOOT_BASE + sizeof(struct image_header) = 0xd0000

To increase CONFIG_SYS_MONITOR_LEN even more, the SPL stack must be
moved somewhere. I put it back to the original location prior to
commit 3ce5b1a8d8.

With this change, there is no more practical size limit.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-07-11 21:30:21 +09:00
Masahiro Yamada
1f8e6a670c Revert "ARM: uniphier: add weird workaround code for LD20"
This reverts commit 45f41c134b.

This weird workaround was the best I came up with at that time
to boot U-Boot from TF-A.

I noticed U-Boot successfully boots on LD20 (i.e. CA72 CPU) by using
the latest TF-A.

Specifically, since the following TF-A commit, U-Boot runs at EL2
instead of EL1, and this issue went away as a side-effect.

|commit f998a052fd94ea082833109f25b94ed5bfa24e8b
|Author: Masahiro Yamada <yamada.masahiro@socionext.com>
|Date:   Thu Jul 25 10:57:38 2019 +0900
|
|    uniphier: run BL33 at EL2
|
|    All the SoCs in 64-bit UniPhier SoC family support EL2.
|
|    Just hard-code MODE_EL2 instead of using el_implemented() helper.
|
|    Change-Id: I7ab48002c5205bc8c013e1b46313b57d6c431db0
|    Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

However, if I reverted that, this problem would come back, presumably
because some EL1 code in U-Boot triggers this issue.

Now that commit f8ddd8cbb5 ("arm64: issue ISB after updating system
registers") fixed this issue properly, this weird workaround is no
longer needed irrespective of the exception level at which U-Boot runs.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-07-11 21:30:21 +09:00
Tom Rini
4a9146c295 Merge tag 'dm-pull-10jul20' of https://gitlab.denx.de/u-boot/custodians/u-boot-dm
of-platdata: better phandle and compatible-string support
patman support for Python3 on Ubuntu 14.04
new checkpatch check to avoid #ifdefs
2020-07-10 16:22:57 -04:00
Heinrich Schuchardt
f309247399 CI: show skipped Python tests
Call pytest3 with argument -ra to display the reason why Python tests are
skipped.

The -r flag displays a test summary info for each test. -ra eliminates
this info for passed tests.

Pros an cons were discussed in:
https://lists.denx.de/pipermail/u-boot/2020-June/417090.html

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-07-10 16:22:37 -04:00
Tom Rini
3113c84ba2 Merge tag 'rpi-next-2020.10' of https://gitlab.denx.de/u-boot/custodians/u-boot-raspberrypi
- add support for PCI and XHCI for RPi4 (64 bit only)
- optionally reset XHCI device on registration
- enable USB_KEYBOARD for rpi_4_defconfig
2020-07-10 14:31:22 -04:00
Tom Rini
618c306790 Merge branch '2020-08-10-arbitrary-virt-phys-mappings'
- Bring in Marek Szyprowski's series to allow for arbitrary
  virtual-physical address mappings.
2020-07-10 14:30:46 -04:00
Marek Szyprowski
c1b0bcc870 config: Enable support for the XHCI controller on RPI4 board
This requires enabling BRCMSTB PCIe and XHCI_PCI drivers as well as PCI
and USB commands. To get it working one has to call the following commands:
"pci enum; usb start;", thus such commands have been added to the default
"preboot" environment variable. One has to update their environment if it
is already configured to get this feature working out of the box.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
2020-07-10 14:11:49 -04:00
Marek Szyprowski
814e1a4b8c rpi4: add a mapping for the PCIe XHCI controller MMIO registers (ARM 32bit)
Create a non-cacheable mapping for the 0x600000000 physical memory region,
where MMIO registers for the PCIe XHCI controller are instantiated by the
PCIe bridge. Due to 32bit limit in the CPU virtual address space in ARM
32bit mode, this region is mapped at 0xff800000 CPU virtual address.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
2020-07-10 14:10:43 -04:00
Seung-Woo Kim
221c5e42a6 mmc: bcm283x: fix int to pointer cast
On build with 32 bit, there is a warning for int-to-pointer-cast.
Fix the int to pointer cast by using uintptr_t.

Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
2020-07-10 14:10:43 -04:00
Marek Szyprowski
d877f8fd0f arm: provide a function for boards init code to modify MMU virtual-physical map
Provide function for setting arbitrary virtual-physical MMU mapping
and cache settings for the given region.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2020-07-10 14:10:43 -04:00
Marek Szyprowski
f5a9fcc602 arm: update comments to the common style
Update the comments in include/asm/system.h to the common style.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2020-07-10 14:10:43 -04:00
Marek Szyprowski
69be8fd164 powerpc: move ADDR_MAP to Kconfig
Move ADDR_MAP related config options from include/configs/*.h to the
proper place in lib/Kconfig. This has been done using
./tools/moveconfig.py and manual inspection of the generated changes.
This is a preparation to use ADDR_MAP helper on ARM 32bit Raspberry Pi4
board for mapping the PCIe XHCI MMIO, which is above the 4GiB identity
mapping limit.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2020-07-10 14:10:43 -04:00
Nicolas Saenz Julienne
d6ecb71a1f config: Enable USB Keyboard support on RPi4
Supporting USB keyboards out of the box is both handy for development
and production. Notably if u-boot is used to boot into GRUB.

Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[mb: drop rpi_4_32b_defconfig hunk]
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2020-07-10 11:50:36 +02:00
Nicolas Saenz Julienne
0b80371b35 usb: xhci: Add reset controller support
Some atypical users of xhci might need to manually reset their xHCI
controller before starting the HCD setup. Check if a reset controller
device is available to the PCI bus and trigger a reset.

Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
[mb: squash fix to only build xhci_reset_hw() if CONFIG_DM_BUS]
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2020-07-10 11:49:28 +02:00
Nicolas Saenz Julienne
6836d59094 configs: Enable support for reset controllers on RPi4
This is required in order to access the reset controller used to
initialize the board's xHCI chip.

Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2020-07-10 11:49:28 +02:00
Nicolas Saenz Julienne
f676eb217b reset: Add Raspberry Pi 4 firmware reset controller
Raspberry Pi 4's co-processor controls some of the board's HW
initialization process, but it's up to Linux to trigger it when
relevant. Introduce a reset controller capable of interfacing with
RPi4's co-processor that models these firmware initialization routines as
reset lines.

Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2020-07-10 11:49:28 +02:00
Nicolas Saenz Julienne
d774da08dc arm: rpi: Add function to trigger VL805's firmware load
On the Raspberry Pi 4, after a PCI reset, VL805's (a xHCI chip) firmware
may either be loaded directly from an EEPROM or, if not present, by the
SoC's VideCore (the SoC's co-processor). Introduce the function that
informs VideCore that VL805 may need its firmware loaded.

Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2020-07-10 11:49:28 +02:00
Marek Szyprowski
440bca81f0 configs: Enable support for the XHCI controller on RPI4 board (ARM 64-bit)
This requires enabling BRCMSTB PCIe and XHCI_PCI drivers as well as PCI
and USB commands. To get it working one has to call the following commands:
"pci enum; usb start;", thus such commands have been added to the default
"preboot" environment variable. One has to update their environment if it
is already configured to get this feature working out of the box.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2020-07-10 11:49:28 +02:00
Sylwester Nawrocki
7b1c3f6f65 pci: Add driver for Broadcom BCM2711 SoC PCIe controller
This patch adds basic driver PCI Express controller found on Broadcom
set-top-box SoCs, e.g. BCM2711.
The code is based on Linux upstream driver (pcie-brcmstb.c) with MSI
handling removed. The inbound access memory region is not currently
parsed from dma-ranges DT property and a fixed 3GB region is used.

The patch has been tested on RPI4 board, i.e. on BCM2711 SoC with VL805
USB Host Controller.

Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2020-07-10 11:49:28 +02:00
Sylwester Nawrocki
db75485f5c pci: Add some PCI Express capability register offset definitions
Add PCI Express capability definitions required by the Broadcom
STB PCIe controller driver.

Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2020-07-10 11:49:28 +02:00
Nicolas Saenz Julienne
c92921bb52 linux/bitfield.h: Add primitives for manipulating bitfields both in host- and fixed-endian
Imports Al Viro's original Linux commit 00b0c9b82663a, which contains
an in depth explanation and two fixes from Johannes Berg:
 e7d4a95da86e0 "bitfield: fix *_encode_bits()",
 37a3862e12382 "bitfield: add u8 helpers".

Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
[s.nawrocki: added empty lines between functions and macros]
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
[mb: squash fix including byteorder.h]
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2020-07-10 11:47:12 +02:00
Jagan Teki
18c56605c6 doc: driver-model: Update SPI migration status
All SPI drivers are converted to DM_SPI but 3 drivers
still operate in nondm mode for SPL due to footprint
constraints.

Update the migration status for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-07-10 12:39:54 +05:30
Bhargav Shah
a58c7ffcad spi: kirkwood: Drop nondm code
Drop the nondm code from kirkwood_spi.c since there
is no board or any other code using for it.

Signed-off-by: Bhargav Shah <bhargavshah1988@gmail.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-07-10 12:39:54 +05:30
Walter Lozano
6c3fc50ee5 dtoc: add test for cd-gpios
Add a test for dtoc taking into account the cd-gpios property.

Signed-off-by: Walter Lozano <walter.lozano@collabora.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-09 22:00:29 -06:00
Walter Lozano
ad34017c8c dtoc: update dtb_platdata to support cd-gpios
Currently dtoc does not support the property cd-gpios used to declare
the gpios for card detect in mmc.

This patch adds support to cd-gpios property.

Signed-off-by: Walter Lozano <walter.lozano@collabora.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-09 22:00:29 -06:00
Walter Lozano
407009a426 arm: dts: include gpio nodes for card detect
Several MMC drivers use GPIO for card detection with cd-gpios property in
the MMC node pointing to a GPIO node. However, as U-Boot tries to save
space by keeping only required nodes using u-boot* properties, several
devices tree result in having only in the MMC node but not the GPIO node
associated to cd-gpios.

This patch, fixes several ocurrence of this issue.

Signed-off-by: Walter Lozano <walter.lozano@collabora.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Adam Ford <aford173@gmail.com> #da850-evm
2020-07-09 22:00:29 -06:00
Walter Lozano
cbd484f0eb dm: doc: update of-plat with new phandle support
Update documentation to reflect the new phandle support when OF_PLATDATA
is used. Now phandles are implemented as pointers to U_BOOT_DEVICE,
which makes it possible to get a pointer to the actual device.

Signed-off-by: Walter Lozano <walter.lozano@collabora.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-09 22:00:29 -06:00
Walter Lozano
51f1263d89 dtoc: extend dtoc to use struct driver_info when linking nodes
In the current implementation, when dtoc parses a dtb to generate a struct
platdata it converts the information related to linked nodes as pointers
to struct platdata of destination nodes. By doing this, it makes
difficult to get pointer to udevices created based on these
information.

This patch extends dtoc to use struct driver_info when populating
information about linked nodes, which makes it easier to later get
the devices created. In this context, reimplement functions like
clk_get_by_index_platdata() which made use of the previous approach.

Signed-off-by: Walter Lozano <walter.lozano@collabora.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-09 22:00:29 -06:00
Walter Lozano
df29730410 sandbox: Move section u_boot_list to make it RW
In order to be able to update data in u_boot_list, move this section to
make it RW.

Signed-off-by: Walter Lozano <walter.lozano@collabora.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-09 22:00:29 -06:00
Walter Lozano
fed0f891c6 core: extend struct driver_info to point to device
Currently when creating an U_BOOT_DEVICE entry a struct driver_info
is declared, which contains the data needed to instantiate the device.
However, the actual device is created at runtime and there is no proper
way to get the device based on its struct driver_info.

This patch extends struct driver_info adding a pointer to udevice which
is populated during the bind process, allowing to generate a set of
functions to get the device based on its struct driver_info.

Signed-off-by: Walter Lozano <walter.lozano@collabora.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-09 22:00:29 -06:00
Walter Lozano
908d0243ac core: drop const for struct driver_info
In order to prepare for a new support of phandle when OF_PLATDATA is used
drop the const for struct driver_info as this struct will need to be
updated on runtime.

Signed-off-by: Walter Lozano <walter.lozano@collabora.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-09 22:00:29 -06:00
Walter Lozano
6397427c47 dm: doc: update of-plat with the support for driver aliases
Update the documentation with the support for driver aliases using
U_BOOT_DRIVER_ALIAS.

Signed-off-by: Walter Lozano <walter.lozano@collabora.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-09 22:00:29 -06:00
Walter Lozano
361e733596 dtoc: add option to disable warnings
As dtoc now performs checks for valid driver names, when running dtoc
tests several warnings arise as these tests don't use valid driver
names.

This patch adds an option to disable those warning, which is only
intended for running tests.

Signed-off-by: Walter Lozano <walter.lozano@collabora.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-09 22:00:29 -06:00
Walter Lozano
dac8228df9 dtoc: add support to scan drivers
Currently dtoc scans dtbs to convert them to struct platdata and
to generate U_BOOT_DEVICE entries. These entries need to be filled
with the driver name, but at this moment the information used is the
compatible name present in the dtb. This causes that only nodes with
a compatible name that matches a driver name generate a working
entry.

In order to improve this behaviour, this patch adds to dtoc the
capability of scan drivers source code to generate a list of valid driver
names and aliases. This allows to generate U_BOOT_DEVICE entries using
valid driver names and rise a warning in the case a name is not valid.

Signed-off-by: Walter Lozano <walter.lozano@collabora.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Open files in utf-8 mode:
Signed-off-by: Simon Glass <sjg@chromium.org>
2020-07-09 22:00:15 -06:00
Walter Lozano
addf358bac core: add support for U_BOOT_DRIVER_ALIAS
Currently when using OF_PLATDATA the binding between devices and drivers
is done trying to match the compatible string in the node with a driver
name. However, usually a single driver supports multiple compatible strings
which causes that only devices which its compatible string matches a
driver name get bound.

To overcome this issue, this patch adds the U_BOOT_DRIVER_ALIAS macro,
which generates no code at all, but allows an easy way to declare driver
name aliases. Thanks to this, dtoc could be improve to look for the driver
name based on its alias when it populates the U_BOOT_DEVICE entry.

Signed-off-by: Walter Lozano <walter.lozano@collabora.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-09 18:57:22 -06:00
Walter Lozano
ace16e88d9 dtoc: add missing code comments
Add missing information about internal class members in order to make
the code easier to follow.

Signed-off-by: Walter Lozano <walter.lozano@collabora.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-09 18:57:22 -06:00
Walter Lozano
e3e2470fdd drivers: rename drivers to match compatible string
When using OF_PLATDATA, the bind process between devices and drivers
is performed trying to match compatible string with driver names.
However driver names are not strictly defined, and also there are different
names used when declaring a driver with U_BOOT_DRIVER, the name of the
symbol used in the linker list and the used in the struct driver_info.

In order to make things a bit more clear, rename the drivers names. This
will also help for further OF_PLATDATA improvements, such as checking
for valid driver names.

Signed-off-by: Walter Lozano <walter.lozano@collabora.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add a fix for sandbox of-platdata to avoid using an invalid ANSI colour:
Signed-off-by: Simon Glass <sjg@chromium.org>
2020-07-09 18:57:22 -06:00
Bin Meng
229806f759 test/dm: fdtdec: Add tests for fdtdec_add_reserved_memory()
This adds a test case to test the functionality of the fdtdec API
fdtdec_add_reserved_memory().

Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-09 18:57:22 -06:00
Bin Meng
866f11efd7 test/dm: fdtdec: Corect a typo in dm_test_fdtdec_set_carveout()
It should be "writable".

Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-09 18:57:22 -06:00
Bin Meng
c9a1df027a test/dm: fdtdec: Add the missing gd declaration
Add DECLARE_GLOBAL_DATA_PTR since it is referenced in the test codes.

Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-09 18:57:22 -06:00
Heinrich Schuchardt
43913f01b9 cmd: fdt: remove CMD_FDT_MAX_DUMP
When printing the device tree we want to get an output that can be used as
input for the device tree compiler. This requires that we do not write
bogus lines like

    pcie@10000000 {
            interrupt-map = * 0x4000127c [0x00000280];

For instance the QEMU virt device has a property interrupt-map with 640
bytes which exceeds CMD_FDT_MAX_DUMP=64.

So lets do away with the artificial limitation to 64 bytes.

As indicated in commit f0a29d4331 ("fdt: Limit printed hex in fdt print
and list commands") if a device tree contains binary blobs, it may still
be desirable to limit the output length. Provide environment variable
fdt_max_dump for this purpose.

Fixes: 5d927b4286 ("Kconfig: Drop CONFIG_CMD_FDT_MAX_DUMP")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-09 18:57:22 -06:00
Heinrich Schuchardt
dde173a204 log: use BIT() instead of 1 <<
Use the BIT() macro when creating a bitmask for the logging fields.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-09 18:57:22 -06:00
Heinrich Schuchardt
3c21d7738a log: don't show function by default
The name of the function emitting a log message may be of interest for a
developer but is distracting for normal users. See the example below:

    try_load_entry() Booting: Debian

Make the default format for log messages customizable. By default show
only the message text.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-09 18:57:22 -06:00
Simon Glass
8af45b1f20 checkpatch: Don't warn about PREFER_IF in headers/DT files
This warning should only be displayed for C files. Fix it and update the
test.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-07-09 18:57:22 -06:00
Simon Glass
5c430761e6 patman: Add tests for the rest of the checkpatch checks
Finish off the tests for our small collection of checkpatch checks.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-07-09 18:57:22 -06:00
Simon Glass
89fb8b75bc patman: Decode output from the '--show-types' option
Collect the 'checkpatch type' from each error, warning and check. Provide
this to patman and update the uclass test to use it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-07-09 18:57:22 -06:00
Simon Glass
4148c20f53 patman: Add a test for the 'possible new uclass' check
It is quite likely that the number of U-Boot-specific tests in
checkpatch.pl will increase over time. We should have tests for these to
avoid undefined behaviour and bugs being introduced, which might cause
people to ignore the warnings.

Add a simple new class that can generate a patch with a single-line
addition in it. Use that to add a test for one of the checkpatch checks.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-07-09 18:57:22 -06:00
Simon Glass
40d9734cb1 patman: Rename test.py to test_checkpatch.py
These tests check checkpatch.pl operation and can server as our tests for
the U-Boot-specific updates to that script. Rename the file and update
comments to indicate this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-07-09 18:57:22 -06:00
Simon Glass
b48c272b1a dm: core: Correct comment on uclass_id_foreach_dev()
This parameter should be a struct uclass, not struct udevice. Correct it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com>
2020-07-09 18:57:22 -06:00
Heinrich Schuchardt
6c9e417549 log: uclass_get_name() depends on CONFIG_SPL_DM
If CONFIG_SPL_DM=n and CONFIG_SPL_LOG=y a build error occurs:

ld.bfd: common/built-in.o: in function `log_get_cat_name':
common/log.c:48: undefined reference to `uclass_get_name'
make[1]: *** [scripts/Makefile.spl:422: spl/u-boot-spl] Error 1

Call uclass_get_name() only if DM is enabled.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-09 18:57:22 -06:00
Heinrich Schuchardt
e85497a930 sandbox: make RAM size configurable
Up to now the RAM size of the sandbox is hard coded as 128 MiB. This does
not allow testing the correct handling of addresses outside the 32bit
range. 128 MiB is also rather small when tracing functions where the trace
is written to RAM.

Provide configuration variable CONFIG_SANDBOX_RAM_SIZE_MB to set the RAM
size in MiB. It defaults to 128 MiB with a minimum of 64 MiB.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-09 18:57:22 -06:00
Simon Glass
1b48782ad3 patman: Drop import of test_util in test_util
This module doesn't need to import itself. It causes problems on
very old Python 3 (e.g. 3.4.0). Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-07-09 18:57:22 -06:00
Simon Glass
dd3dac2f2c patman: Avoid importing gitutil in settings
Pass this module in so that settings does not need to import it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reported-by: Stefan Bosch <stefan_b@posteo.net>
2020-07-09 18:57:22 -06:00
Simon Glass
156e655372 patman: Pass in maintainer dirs to avoid and import
Adjust the get_maintainer module to accept a list of directories to search
for the script. This avoids needing to import gitutil.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reported-by: Stefan Bosch <stefan_b@posteo.net>
2020-07-09 18:57:22 -06:00
Simon Glass
38a9d3b31a patman: Use a dict in gitutil to avoid importing series
Only a few members of this class are used and only in a test. To avoid
importing the module, convert the test to use a dict.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reported-by: Stefan Bosch <stefan_b@posteo.net>
2020-07-09 18:57:22 -06:00
Simon Glass
ddd65b0156 patman: Avoid circular dependency between command and tools
This seems to cause problems in some cases. Split the dependency by
copying the code to command.

Reported-by: Stefan Bosch <stefan_b@posteo.net>
Signed-off-by: Simon Glass <sjg@chromium.org>
2020-07-09 18:57:21 -06:00
Simon Glass
676f98a870 patman: Drop unnecessary import in gitutil
The checkpatch module is not used, so drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reported-by: Stefan Bosch <stefan_b@posteo.net>
2020-07-09 18:57:21 -06:00
Heinrich Schuchardt
a6cfc34e36 sandbox: spi: sandbox_sf_state_name() is required
Compiling drivers/mtd/spi/sandbox.c fails when compiled with
CONFIG_LOG=n:

In file included from include/common.h:20,
                 from drivers/mtd/spi/sandbox.c:13:
drivers/mtd/spi/sandbox.c:295:15: error: format ‘%s’ expects argument of
type ‘char *’, but argument 7 has type ‘int’ [-Werror=format=]
  295 |   log_content(" cmd: transition to %s state\n",
      |               ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
include/linux/printk.h:37:21: note: in definition of macro ‘pr_fmt’
   37 | #define pr_fmt(fmt) fmt
      |                     ^~~
include/log.h:128:30: note: in expansion of macro ‘log_nop’
  128 | #define log_content(_fmt...) log_nop(LOG_CATEGORY, \
      |                              ^~~~~~~
drivers/mtd/spi/sandbox.c:295:3: note: in expansion of macro
‘log_content’
  295 |   log_content(" cmd: transition to %s state\n",
      |   ^~~~~~~~~~~
drivers/mtd/spi/sandbox.c:295:37: note: format string is defined here
  295 |   log_content(" cmd: transition to %s state\n",
      |                                    ~^
      |                                     |
      |                                     char *
      |                                    %d

Supply function sandbox_sf_state_name() independent of CONFIG_LOG.

Fixes: c3aed5db59 ("sandbox: spi: Add more logging")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-09 18:57:21 -06:00
Heinrich Schuchardt
c7e49ddc61 sandbox: handling out of memory
assert() only works in debug mode. So checking a successful memory
allocation should not use assert().

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-09 18:57:21 -06:00
Pragnesh Patel
e69d078039 mtd: spi-nor: Enable QE bit for ISSI flash in case of SFDP
Enable QE bit for ISSI flash chips.

QE enablement logic is similar to what Macronix
has, so reuse the existing code itself.

Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-07-09 20:58:06 +05:30
Johannes Holland
0e146993bb spi: add support for all spi modes with soft spi
The spi bitbanging driver did not implement all spi modes properly. Add
code to support all spi modes, honoring soft_spi_set_mode() and
defaulting to spi mode 0. Previously, CPHA was implemented inversely
(defaulting to CPHA=1) and CPOL=1 was hardcoded.

Signed-off-by: Johannes Holland <johannes.holland@infineon.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-07-09 20:58:06 +05:30
Jagan Teki
f247354708 arm: Remove mx31pdk board
DM, OF_CONTROL, DM_SPI and other driver model migration
deadlines are expired for this board.

Remove it.

Acked-by: Magnus Lilja <lilja.magnus@gmail.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-07-09 20:58:06 +05:30
Jagan Teki
5d1281296f spi: omap3: Drop nondm code
Now all boards are using this omap3 spi driver in
dm model, so drop the nondm code.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-07-09 20:58:06 +05:30
Jagan Teki
b96b0762c7 db-88f6281-bp-nand: Enable DM_SPI/SPI_FLASH
Enable DM_SPI, DM_SPI_FLASH for db-88f6281-bp-nand board.

Cc: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-07-09 20:58:06 +05:30
Jagan Teki
bb1cbb2ba6 arm: Remove pengwyn board
OF_CONTROL, DM_SPI and other driver model migration deadlines
are expired for this board.

Remove it.

Cc: Lothar Felten <lothar.felten@gmail.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-07-09 20:58:06 +05:30
Jagan Teki
bce26c45e2 arm: Remove pepper board
OF_CONTROL, DM_SPI and other driver model migration deadlines
are expired for this board.

Remove it.

Cc: Ash Charles <ash@gumstix.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-07-09 20:58:05 +05:30
Jagan Teki
37559488a9 arm: Remove bav335x board
OF_CONTROL, DM_SPI and other driver model migration deadlines
are expired for this board.

Remove it.

Cc: Gilles Gameiro <gilles@gigadevices.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-07-09 20:58:05 +05:30
Jagan Teki
45833e25fc arm: Remove cairo board
OF_CONTROL, DM_SPI and other driver model migration deadlines
are expired for this board.

Drop it.

Cc: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-07-09 20:58:05 +05:30
Jagan Teki
d78b9df763 logicpd: Drop omap3 zoom1
OF_CONTROL, DM_SPI and other driver model migration deadlines
are expired for this board.

Drop it.

Cc: Nishanth Menon <nm@ti.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-07-09 20:58:05 +05:30
Jagan Teki
ed3294d6d1 arm: Remove overo board
OF_CONTROL, DM_SPI and other driver model migration deadlines
are expired for this board.

Drop it.

Cc: Ash Charles <ash@gumstix.com>
Cc: Steve Sakoman <sakoman@gmail.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-07-09 20:58:05 +05:30
Jagan Teki
76386d6195 arm: Remove cm_t35 board
DM, DM_SPI and other driver model migration deadlines
are expired for this board.

Remove it.

Cc: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-07-09 20:58:05 +05:30
Jagan Teki
a25aea733d arm: Remove cm_t54 board
DM, DM_SPI and other driver model migration deadlines
are expired for this board.

Remove it.

Cc: Dmitry Lifshitz <lifshitz@compulab.co.il>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-07-09 20:58:05 +05:30
Jagan Teki
8c32ccd60d siemens: rut: Enable DM_SPI, DM_SPI_FLASH
Enable DM_SPI, DM_SPI_FLASH for siemens rut board.

Build is fine, but not tested.

Cc: Samuel Egli <samuel.egli@siemens.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-07-09 20:58:05 +05:30
Jagan Teki
5fe431ce4a siemens: pxm2: Enable DM_SPI, DM_SPI_FLASH
Enable DM_SPI, DM_SPI_FLASH for siemens pxm2 board.

Build is fine, but not tested.

Cc: Samuel Egli <samuel.egli@siemens.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-07-09 20:58:05 +05:30
Jagan Teki
015fa53c7d siemens: thuban: Enable DM_SPI, DM_SPI_FLASH
Enable DM_SPI, DM_SPI_FLASH for siemens thuban board.

Build is fine, but not tested.

Cc: Samuel Egli <samuel.egli@siemens.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-07-09 20:58:05 +05:30
Jagan Teki
08ab6231c7 siemens: rastaban: Enable DM_SPI, DM_SPI_FLASH
Enable DM_SPI, DM_SPI_FLASH for siemens rastaban board.

Build is fine, but not tested.

Cc: Samuel Egli <samuel.egli@siemens.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-07-09 20:58:05 +05:30
Jagan Teki
ed9d341094 siemens: etamin: Enable DM_SPI, DM_SPI_FLASH
Enable DM_SPI, DM_SPI_FLASH for siemens etamin board.

Build is fine, but not tested.

Cc: Samuel Egli <samuel.egli@siemens.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-07-09 20:58:05 +05:30
Jagan Teki
107b5cfd4b siemens: draco: Enable DM_SPI, DM_SPI_FLASH
Enable DM_SPI, DM_SPI_FLASH for siemens draco board.

Build is fine, but not tested.

Cc: Samuel Egli <samuel.egli@siemens.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-07-09 20:58:05 +05:30
Jagan Teki
492d31087f am335x: igep003x: Enable DM_SPI
Enable DM_SPI for am355x igep003x board.

Build is fine, but not tested.

Cc: Javier Martínez Canillas <javier@dowhile0.org>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-07-09 20:58:05 +05:30
Tom Rini
506d52308a Merge https://gitlab.denx.de/u-boot/custodians/u-boot-x86
- Add two- and three-argument versions of CONFIG_IS_ENABLED in
  linux/kconfig.h
- Adds a new feature which supports copying modified parts of
  the frame buffer to the uncached hardware buffer
- Enable the copy framebuffer on various x86 targets
2020-07-09 09:54:22 -04:00
Marek Szyprowski
d69ddf2494 rpi4: add a mapping for the PCIe XHCI controller MMIO registers (ARM 64bit)
Create a non-cacheable mapping for the 0x600000000 physical memory region,
where MMIO registers for the PCIe XHCI controller are instantiated by the
PCIe bridge.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Reviewed-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2020-07-09 15:46:12 +02:00
Marek Szyprowski
c44b3f523c rpi4: shorten a mapping for the DRAM
Remove the overlap between DRAM and device's IO area.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Reviewed-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2020-07-09 15:46:12 +02:00
Sylwester Nawrocki
b6687e19f9 pci: Move some PCIe register offset definitions to a common header
Some PCI Express register offsets are currently defined in multiple
drivers, move them to a common header to avoid re-definitions and
as a pre-requisite for adding new PCIe driver.
While at it replace some spaces with tabs.

Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2020-07-09 15:46:12 +02:00
Sylwester Nawrocki
8e2ab05000 usb: xhci: Use only 32-bit accesses in xhci_writeq/xhci_readq
There might be hardware configurations where 64-bit data accesses
to XHCI registers are not supported properly.  This patch removes
the readq/writeq so always two 32-bit accesses are used to read/write
64-bit XHCI registers, similarly as it is done in Linux kernel.

This patch fixes operation of the XHCI controller on RPI4 Broadcom
BCM2711 SoC based board, where the VL805 USB XHCI controller is
connected to the PCIe Root Complex, which is attached to the system
through the SCB bridge.

Even though the architecture is 64-bit the PCIe BAR is 32-bit and likely
the 64-bit wide register accesses initiated by the CPU are not properly
translated to a sequence of 32-bit PCIe accesses.
xhci_readq(), for example, always returns same value in upper and lower
32-bits, e.g. 0xabcd1234abcd1234 instead of 0x00000000abcd1234.

Cc: Sergey Temerkhanov <s.temerkhanov@gmail.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2020-07-09 15:46:12 +02:00
Sylwester Nawrocki
61293f519e usb: xhci: Add missing cache flush in the scratchpad array initialization
In current code there is no cache flush after initializing the scratchpad
buffer array with the scratchpad buffer pointers. This leads to a failure
of the "slot enable" command on the rpi4 board (Broadcom STB PCIe
controller + VL805 USB hub) - the very first TRB transfer on the command
ring fails and there is a timeout while waiting for the command completion
event. After adding the missing cache flush everything seems to be working
as expected.

Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2020-07-09 15:46:12 +02:00
Tom Rini
d9107930af Merge tag 'for-v2020.10' of https://gitlab.denx.de/u-boot/custodians/u-boot-i2c
i2c changes for v2020.10
- Add support for I2C controllers found on Octeon II/III and Octeon TX
  TX2 SoC platforms.
- Add I2C controller support for Cortina Access CAxxxx SoCs
- new rtc methods, rtc command, and tests
- imx_lpi2c: Improve the codes to use private data
- stm32f7_i2c.c: Add new compatible "st,stm32mp15-i2c"
- stm32f7_i2c.c: Add Fast Mode Plus support
- pwm: Add PWM driver for SiFive SoC
2020-07-09 08:22:44 -04:00
Tom Rini
5fb70639cc Merge https://gitlab.denx.de/u-boot/custodians/u-boot-marvell
- Armada 38x DDR3 fixes, enhancements (Chris)
- Armada 38x UTMI PHY SerDes fix (Chris)
- Helios4 update - sync with clearfog (Dennis)
- LaCie Kirkwood board rework - enable DM (Simon)
- net/mvpp2 memory init fix (Sven)
2020-07-09 08:21:26 -04:00
Sven Auhagen
3078e03516 net: mvpp2: fix second cp110 initialization
Since the mdio code got upstreamed it is not possible
to activate network ports on CP110 Master and Slave.

The problem is in mvpp2_base_probe which is called for each
CP110 and it initializes the buffer area for descs and rx_buffers.

This should only happen once though and the bd space is actually
set to 0 after the first run of the function.

This leads to an error when the second CP110 tries the initialization
again and disables all network ports on this CP110.

This patch adds a static variable to check if the buffer area is
initialized only once globally.

Signed-off-by: Sven Auhagen <sven.auhagen@voleatech.de>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-07-09 06:52:20 +02:00
Simon Guinot
21b1c75f9d arm: kirkwood: enable DM_ETH for LaCie board
This patch enables DM_ETH for the following Kirkwood-based LaCie boards:

- d2 Network v2
- Internet Space v2
- 2Big Network v2
- Network Space v2
- Network Space Lite v2
- Network Space Max v2
- Network Space Mini v2

Signed-off-by: Simon Guinot <simon.guinot@sequanux.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-07-09 06:51:20 +02:00
Simon Guinot
efa5e39a59 arm: kirkwood: enable DM_USB for LaCie board
This patch enables DM_USB and USB_STORAGE for the following
Kirkwood-based LaCie boards:

- d2 Network v2
- Internet Space v2
- 2Big Network v2
- Network Space v2
- Network Space Lite v2
- Network Space Max v2

Signed-off-by: Simon Guinot <simon.guinot@sequanux.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-07-09 06:51:20 +02:00
Simon Guinot
6620c652c9 arm: kirkwood: switch LaCie boards to sata_mv driver
This patch switches the SATA driver from mvsata_ide to sata_mv for the
following Kirkwood-based LaCie boards:

- d2 Network v2
- Internet Space v2
- 2Big Network v2
- Network Space v2
- Network Space Lite v2
- Network Space Max v2
- Network Space Mini v2

Signed-off-by: Simon Guinot <simon.guinot@sequanux.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-07-09 06:51:20 +02:00
Simon Guinot
c98b889151 arm: kirkwood: convert LaCie boards to DM_SPI_FLASH
This patch converts the following Kirkwood-based LaCie boards to DM,
DM_SPI and DM_SPI_FLASH:

- d2 Network v2
- Internet Space v2
- 2Big Network v2
- Network Space v2
- Network Space Lite v2
- Network Space Max v2
- Network Space Mini v2

Signed-off-by: Simon Guinot <simon.guinot@sequanux.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-07-09 06:51:20 +02:00
Simon Guinot
ca6f44ec19 arm: kirkwood: add DT spi0 alias to LaCie boards
The spi0 alias is needed by the environment code to retrieve the SPI
flash. This patch adds some -u-boot.dtsi files, providing the spi0
aliases, for all the following Kirkwood-based LaCie boards:

- d2 Network v2
- Internet Space v2
- 2Big Network v2
- Network Space v2
- Network Space Lite v2
- Network Space Max v2
- Network Space Mini v2

Note that this -u-boot.dtsi files will be removed as soon as the spi0
aliases will be available in the upstream Linux dtsi files.

Signed-off-by: Simon Guinot <simon.guinot@sequanux.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-07-09 06:51:20 +02:00
Dennis Gilmore
34fb7df42e arm: mvebu: helios4: sync helios4 config to clearfog and dts to kernel
The helios4 is built on the same microsom as the clearfog, by syncing the config
we enable the same featureset that exists in the som on the helios4. The current
config does not boot as some of the clearfog changes needed to be made on the
helios4 also, generally speaking most changes for the clearfog should also be
made on the helios4.

Signed-off-by: Dennis Gilmore <dennis@ausil.us>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-07-09 06:50:05 +02:00
Chris Packham
4182232158 arm: mvebu: a38x: Adjust UTMI PHY parameters
When running USB compliance tests on our Armada-385 hardware platforms
we have seen some eye mask violations. Marvell's internal documentation
says: Based on silicon test results, it is recommended to change the
impedance calibration threshold setting to 0x6 prior to calibration.

Port changes from Marvell's u-boot fork[1] to address this.

[1] - https://github.com/MarvellEmbeddedProcessors/u-boot-marvell/commit/a6221551

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-07-09 06:49:44 +02:00
Chris Packham
ec9deec400 arm: mvebu: a38x: Fix typo
Fix spelling of Alignment.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-07-09 06:49:44 +02:00
Chris Packham
485dbd3f10 mv_ddr: ddr3: Update {min,max}_read_sample calculation
Measurements on actual hardware shown that the read ODT is early by 3
clocks. Adjust the calculation to avoid this.

Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>

[upstream https://github.com/MarvellEmbeddedProcessors/mv-ddr-marvell/pull/22]
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Tested-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-07-09 06:49:44 +02:00
Chris Packham
40ed88529c mv_ddr: ddr3: Use correct bitmask for read sample delay
In the Armada 385 functional spec (MV-S109094-00 Rev. C) the read sample
delay fields are 5 bits wide. Use the correct bitmask of 0x1f when
extracting the value.

Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>

[upstream https://github.com/MarvellEmbeddedProcessors/mv-ddr-marvell/pull/22]
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-07-09 06:49:44 +02:00
Simon Glass
db17e40cca x86: apl: Re-enable loading of SPL
At present the SPL loader is not included in the TPL image so SPL cannot
be loaded. Fix it by including this file for both SPL and TPL.

Signed-off-by: Simon Glass <sjg@chromium.org>
Fixes: c87f9ce227 ("x86: Don't build some unused objects in TPL")
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-09 12:33:24 +08:00
Simon Glass
324ec5d7b4 spi: Remove unnecessary #ifdefs in header file
These prevent use of compile-time checks such as:

    if (CONFIG_IS_ENABLED(DM_SPI))

since, for example, if CONFIG_SPL_DM_SPI is not enabled then the
definitions are not included by spi.h and the C code will not build.

The #ifdefs are unnecessary since there are no conflicts with the pre-DM
code. In any case we have almost switched over to driver model for SPI.

Drop these #ifdefs from spi.h to fix a build warning on chromebook_coral
in the following patch.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-09 12:33:24 +08:00
Simon Glass
dafde79ddb bootstage: Fix 'stacked' typo
This should be 'stashed'. Fix it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-09 12:33:24 +08:00
Rasmus Villemoes
7842749c35 linux/kconfig.h: create two- and three-argument versions of CONFIG_IS_ENABLED
This adds a bunch of preprocessor magic to extend the capabilities of
CONFIG_IS_ENABLED. The existing semantics of

  CONFIG_IS_ENABLED(FOO)

expanding to a 1 or 0 (depending on build context and the defined-ness
or not of the appropriate CONFIG_FOO/CONFIG_SPL_FOO/CONFIG_TPL_FOO)
are of course preserved. With this, one is also allowed a two-argument
form

  CONFIG_IS_ENABLED(FOO, (something))

which expands to something precisely when CONFIG_IS_ENABLED(FOO) would
expand to 1, and expands to nothing otherwise. It is, in other words,
completely equivalent to the three lines

  #if CONFIG_IS_ENABLED(FOO)
  something
  #endif

The second argument must be parenthesized in order to allow any
tokens, including a trailing comma, to appear - one use case for this
is precisely to make it a bit more ergonomic to build an array and
only include certain items depending on .config. That should increase
both readability and not least "git grep"ability.

A third variant is also introduced,

  CONFIG_IS_ENABLED(FOO, (xxx), (yyy))

which corresponds to

  #if CONFIG_IS_ENABLED(FOO)
  xxx
  #else
  yyy
  #endif

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2020-07-09 12:33:24 +08:00
Rasmus Villemoes
7d78a4547d linux/kconfig.h: remove unused helper macros
U-Boot does not have loadable modules, and nothing currently uses any
of the (CONFIG_)?IS_(BUILTIN|MODULE) macros - only
the (CONFIG_)?IS_ENABLED variants are ever used.

While I understand the desire to keep this somewhat synchronized with
linux, we've already departed by the introduction of the
CONFIG_IS_ENABLED extra logic, and deleting these makes the next patch
much simpler, since I won't have to duplicate a lot of logic for no
real gain (as there are no users).

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2020-07-09 12:33:24 +08:00
Rasmus Villemoes
b4f73886c4 linux/kconfig.h: simplify logic for choosing CONFIG_{SPL_, TPL_, }*
Instead of using the arg1_or_junk trick to pick between two choices,
with a bit of duplication between the branches (and most of the
CONFIG_TPL_BUILD case being redundant, as _IS_TPL is known to be
defined to 1 in that case), simply define a prefix that we inject
between CONFIG_ and the given config symbol.

This only requires one level of indirection (to get the
_CONFIG_PREFIX macro expanded before the token concatenation takes
place), and makes it easy to, say, introduce a CONFIG_HOSTTOOL_
prefix. [I would expect most HOSTTOOL_ symbols to just be def_bool y,
but it would allow us to clean up some of the ifdef HOSTCC mess in the
sources shared between U-Boot and host tools.]

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2020-07-09 12:33:24 +08:00
Bin Meng
7d5de35b6f arm: cmd_stm32prog: Fix the CONFIG_IS_ENABLED() usage
Add parentheses around CONFIG_IS_ENABLED() in the if statement, to
fix potential build failures.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-07-09 12:33:24 +08:00
Simon Glass
5a77d09397 x86: minnowmax: Drop screen resolution to 1024x768
This seems like a more reasonable resolution for this board, since it is
quite slow. It also allows it to work with a 5" LCD display in my lab.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-09 12:33:24 +08:00
Simon Glass
6c74ee30bb minnowmax: Enable the copy framebuffer
Update the video driver to support this feature and enable it on
minnowmax to speed up the display.

With this change, the time taken to print the environment to the display
without CONFIG_CONSOLE_SCROLL_LINES is reduced from over 13 seconds to
300ms, at 1280x1024.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-09 12:33:24 +08:00
Simon Glass
a67b0db24e chromebook_link: Enable the copy framebuffer
Update the video driver to support this feature and enable it on link.
Also remove the multi-line scrolling since normal scrolling is fast enough
now.

With this change, the time taken to print the environment to the display
without CONFIG_CONSOLE_SCROLL_LINES is reduced from about 930ms to 29ms.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-09 12:33:24 +08:00
Simon Glass
08b7b65168 chromebook_samus: Enable the copy framebuffer
Update the video driver to support this feature and enable it on samus.
Also remove the multi-line scrolling since normal scrolling is fast enough
now.

With this change, the time taken to print the environment to the display
without CONFIG_CONSOLE_SCROLL_LINES is reduced from about 430ms to 12ms.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-09 12:33:24 +08:00
Simon Glass
551ca0e647 x86: video: Support copy framebuffer with probed devices
For PCI video devices that are not mentioned in the devicetree, U-Boot
does not bind a driver before relocation, since PCI is not fully probed
at that point. Furthermore it is possible for the video device to be on
a secondary bus which is not even scanned.

This is fine if the framebuffer is allocated in fixed memory, as it
normally is on x86. But when using this as a copy framebuffer, we also
need U-Boot to allocate its own cached framebuffer for working in. Since
the video driver is never bound before relocation, the framebuffer size
is never set and U-Boot does no allocation.

Add a new CONFIG option to reserve 16MB of memory for this eventuality.
This allows vesa devices to use the copy framebuffer.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-09 12:33:24 +08:00
Simon Glass
7812bbdc37 video: Correctly handle multiple framebuffers
At present video_bottom is set to the bottom of each framebuffer when it
is allocated. This is not correct, since it should hold the bottom of the
entire area available for framebuffers.

Fix this by adding a private address in the uclass which keeps track of
the next available spot for a framebuffer.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-09 12:33:24 +08:00
Simon Glass
be7418f35e x86: fsp: video: Allocate a frame buffer when needed
When the copy framebuffer is in use, we must also have the standard U-Boot
framebuffer available. Update the FSP driver to support this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-09 12:33:24 +08:00
Simon Glass
0938767da1 video: pci: Set up the copy framebuffer
When using a copy framebuffer we need to tell the video subsystem its
address. U-Boot's normally allocated framebuffer is used as the working
buffer, but nothing is displayed until it is copied to the copy
framebuffer.

For this to work the video driver must request that a framebuffer be
allocated separately from the hardware framebuffer, so add a check for
that.

Also add a log category so that logging appears correctly.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-09 12:33:24 +08:00
Simon Glass
f578ca799e video: sandbox: Add support for the copy framebuffer
Enable this feature on sandbox by updating the SDL driver to have two
framebuffers.

Update the video tests to check that the copy framebuffer is kept in sync.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
2020-07-09 12:33:24 +08:00
Simon Glass
ef45312979 video: Add comments to struct sandbox_sdl_plat
This struct is not commented but needs it. Also fix the comment in
check_vidconsole_output() about the encoding for the rotation value.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
2020-07-09 12:33:24 +08:00
Simon Glass
2b1412c8c0 video: Update the copy framebuffer when writing bitmaps
Adjust the bitmap code to sync to the copy framebuffer when done.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-09 12:33:24 +08:00
Simon Glass
c30c5f275b video: Update rotated console to support copy buffer
Update the implementation to keep a track of what it changes in the frame
buffer and then tell the copy buffer about it. Use the special
vidconsole_memmove() helper so that memmove() operations are also
reflected in the copy buffer.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-09 12:33:24 +08:00
Simon Glass
3ad740ac66 video: Update truetype console to support copy buffer
Update the implementation to keep a track of what it changes in the frame
buffer and then tell the copy buffer about it. Use the special
vidconsole_memmove() helper so that memmove() operations are also
reflected in the copy buffer.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-09 12:33:24 +08:00
Simon Glass
68f3fc767c video: Update normal console to support copy buffer
Update the implementation to keep a track of what it changes in the frame
buffer and then tell the copy buffer about it. Use the special
vidconsole_memmove() helper so that memmove() operations are also
reflected in the copy buffer.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-09 12:33:24 +08:00
Simon Glass
8c0b5d268d video: Add helpers for vidconsole for the copy framebuffer
Add a convenience function to call video_sync_copy() for a vidconsole.
Also add a memmove() helper, which does the memmove() as well as the sync.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-09 12:33:24 +08:00
Simon Glass
138dfea86f video: Clear the copy framebuffer when clearing the screen
Update video_clear() to also sync to the copy framebuffer.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-09 12:33:24 +08:00
Simon Glass
6efa809dde video: Set up the copy framebuffer when enabled
This framebuffer is separately mapped. Update the video post-probe
function to set this up.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-09 12:33:24 +08:00
Simon Glass
9beac5daf7 video: Add support for copying to a hardware framebuffer
Some architectures use a cached framebuffer and flush the cache as needed
so that changes are visible. This is supported by U-Boot.

However x86 uses an uncached framebuffer with a 'write-combining' feature
to speed up writes.  Reads are permitted but they are extremely expensive.

Unfortunately, reading from the frame buffer is quite common, e.g. to
scroll it. This makes scrolling very slow.

Add a new feature which supports copying modified parts of the frame
buffer to the uncached hardware buffer. This speeds up scrolling by at
least 10x on x86 so the extra complexity cost seems worth it.

As a starting point, add the Kconfig, update the video structures to keep
track of the buffer and add a function to do the copy.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-09 12:33:24 +08:00
Simon Glass
5a6cea37c6 video: Add a comment for struct video_uc_platdata
Add a few notes to explain the purpose of each member of this struct.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-09 12:33:24 +08:00
Simon Glass
2d7c268b59 video: Drop unnecessary #ifdef around vid_console_color()
All of the functions in this file only apply if DM_VIDEO is enabled. Drop
the #ifdef as it just clutters things up. Add the needed forward
declaration.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-09 12:33:24 +08:00
Simon Glass
9beb364a28 video: Adjust rotated console to start at right edge
At present when the console is rotated 180 degrees it starts almost a
whole character to the left of the right edge (typically 7 pixels with
an 8-pixel-wide font). On a display which aligns with the font width,
this just wastes space. On a display that does not this can result in
x_frac going negative for the final character (the one on the left
side) and the overflow -EAGAIN check at the start of the function
failing.

Change the function to start at the rightmost pixel to fix these
problems.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-09 12:33:24 +08:00
Simon Glass
a254d11dda video: Split out expression parts into variables
The functions in this file do similar things but not always in the same
way. To make the code easier to read and compare, use a separate 'linenum'
variable in every function. This is then multiplied by the line length to
get the offset within the frame buffer to modify. Also use an 'x' variable
to hold the pixel position within that line. This is multipled by the
pixel size and added to the offset.

Also move the pbytes declaration up a little with the other long lines.

A side effect of splitting out these variables is that they are promoted
to int, i.e. a signed type, from the unsigned short used in the
vidconsole_priv struct. This would be necessary should any of the
variables go negative. At present this can actually happen in
console_putc_xy_2(), if the display width is not a multiple of the
character size (see next patch).

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-09 12:33:24 +08:00
Simon Glass
6a2ea434ea sandbox: video: Allow selection of rotated console
Add a devicetree property to select a rotated console. This uses the same
encoding as vidconsole itself: 0=normal; 1=90 degrees clockwise, 2=upside
down, 3=90 degrees anticlockwise.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
2020-07-09 12:33:24 +08:00
Simon Glass
8b763dfdee video: Show an error when a vidconsole function fails
At present these functions fail silently even when debugging, which is not
very helpful. Add a way to print a message to the serial output when an
error is detected.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-09 12:33:24 +08:00
Simon Glass
493a4c8af7 console: Add a way to output to serial only
In the video drivers it is useful to print errors while debugging but
doing so risks an infinite loop as the debugging info itself may go
through the video drivers.

Add a new console function that prints information only to the serial
device, thus making it safe for use in debugging.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-09 12:33:24 +08:00
Simon Glass
3dada5a1a8 x86: fsp: Reinit the FPU after FSP meminit
The APL FSP appears to leave the FPU in a bad state in that it has
registers in use. This causes an error when the next FPU operation is
performed.

Work around this by re-resetting the FPU after calling FSP-M. This allows
the freetype console to work correctly.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-09 12:33:24 +08:00
Yash Shah
7239a610b7 pwm: Add PWM driver for SiFive SoC
Adds a PWM driver for PWM chip present in SiFive's HiFive Unleashed SoC
This driver is simple port of Linux pwm sifive driver from Linux v5.6

commit: 9e37a53eb051 ("pwm: sifive: Add a driver for SiFive SoC PWM")

Signed-off-by: Yash Shah <yash.shah@sifive.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2020-07-09 06:03:12 +02:00
Yash Shah
0dae9e24ea pwm: Add DT documentation for SiFive PWM Controller
DT documentation for PWM controller added from Linux v5.6

commit: daa78cc3408e
("pwm: sifive: Add DT documentation for SiFive PWM Controller")

Signed-off-by: Yash Shah <yash.shah@sifive.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2020-07-09 06:03:02 +02:00
Patrick Delaunay
7ce87dcff4 i2c: stm32f7: SYSCFG Fast Mode Plus support for I2C STM32F7
Read SYSCFG bindings to set Fast Mode Plus bits if Fast Mode Plus
speed is selected.

Handle the stm32mp15 specific compatible to handle FastMode+
registers handling which is different on the stm32mp15 compared
to the stm32f7 or stm32h7.
Indeed, on the stm32mp15, the FastMode+ set and clear registers
are separated while on the other platforms (F7 or H7) the control
is done in a unique register.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2020-07-09 06:02:45 +02:00
Patrick Delaunay
fb3388cd85 i2c: stm32f7: add stm32mp15 compatible
Add a new compatible "st,stm32mp15-i2c" introduced in Linux kernel v5.8

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2020-07-09 06:02:45 +02:00
Rasmus Villemoes
c203ba44f1 test: dm: rtc: add tests of rtc shell command
Add tests of the "list", "read" and "write" subcommands of the rtc
shell command.

Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
2020-07-09 06:02:45 +02:00
Rasmus Villemoes
8ce16be94b sandbox: add rtc command to defconfigs
In order to allow adding unit tests of the rtc command, add it to the
various sandbox defconfigs.

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
2020-07-09 06:02:45 +02:00
Rasmus Villemoes
baed779138 test: dm: rtc: add test of dm_rtc_read, dm_rtc_write
Define a few aux registers and check that they can be read/written
individually. Also check that one can access the time-keeping
registers directly and get the expected results.

Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
2020-07-09 06:02:45 +02:00
Rasmus Villemoes
a3e36525a9 rtc: i2c_rtc_emul: catch any write to the "reset" register
It's more natural that any write that happens to touch the reset
register should cause a reset, rather than just a write that starts at
that offset.

Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
2020-07-09 06:02:45 +02:00
Rasmus Villemoes
9fb6a41cda rtc: sandbox-rtc: fix set method
The current set method is broken; a simple test case is to first set
the date to something in April, then change the date to 31st May:

=> date 040412122020.34
Date: 2020-04-04 (Saturday)    Time: 12:12:34
=> date 053112122020.34
Date: 2020-05-01 (Friday)    Time: 12:12:34

or via the amending of the existing rtc_set_get test case similarly:

$ ./u-boot -T -v
=> ut dm rtc_set_get
Test: dm_test_rtc_set_get: rtc.c
expected: 31/08/2004 18:18:00
actual: 01/08/2004 18:18:00

The problem is that after each register write,
sandbox_i2c_rtc_complete_write() gets called and sets the internal
time from the current set of registers. However, when we get to
writing 31 to mday, the registers are in an inconsistent state (mon is
still 4), so the mktime machinery ends up translating April 31st to
May 1st. Upon the next register write, the registers are populated by
sandbox_i2c_rtc_prepare_read(), so the 31 we just wrote to mday gets
overwritten by a 1.

Fix it by writing all registers at once, and for consistency, update
the get method to retrieve them all with one "i2c transfer".

Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
2020-07-09 06:02:45 +02:00
Rasmus Villemoes
803a859884 rtc: add rtc command
Mostly as an aid for debugging RTC drivers, provide a command that can
be used to read/write arbitrary registers (assuming the driver
provides the read/write methods or their single-register-at-a-time
variants).

Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
2020-07-09 06:02:45 +02:00
Rasmus Villemoes
29f965a7ec rtc: pcf2127: provide ->write method
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
2020-07-09 06:02:45 +02:00
Rasmus Villemoes
a518dd6336 rtc: pcf2127: provide ->read method
This simply consists of renaming the existing pcf2127_read_reg()
helper to follow the naming of the other
methods (i.e. pcf2127_rtc_<method name>) and changing the type of its
"len" parameter.

Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
2020-07-09 06:02:45 +02:00
Rasmus Villemoes
5113f0b65a rtc: fall back to ->{read, write} if ->{read, write}8 are not provided
Similar to how the dm_rtc_{read,write} functions fall back to using
the {read,write}8 methods, do the opposite in the rtc_{read,write}8
functions.

This way, each driver only needs to provide either ->read8 or ->read
to make both rtc_read8() and dm_rtc_read() work - without this, a
driver that provides ->read() would most likely just duplicate the
logic here for implementing a ->read8() method in term of its ->read()
method. The same remarks of course apply to the write case.

Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
2020-07-09 06:02:45 +02:00
Rasmus Villemoes
09381829a2 rtc: add dm_rtc_write() helper
Similar to dm_rtc_read(), introduce a helper that allows the caller to
write multiple consecutive 8-bit registers with one call. If the
driver provides the ->write method, use that, otherwise loop using
->write8.

Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
2020-07-09 06:02:44 +02:00
Rasmus Villemoes
d8be08805b rtc: add dm_rtc_read helper and ->read method
Some users may want to read multiple consecutive 8-bit
registers. Instead of each caller having to implement the loop,
provide a dm_rtc_read() helper. Also, allow a driver to provide a
->read method, which can be more efficient than reading one register
at a time.

Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
2020-07-09 06:02:44 +02:00
Ye Li
35d3982e23 i2c: imx_lpi2c: Improve the codes to use private data
Current driver calls the devfdt_get_addr to get the base address
of lpi2c controller in each sub-functions. Since the devfdt_get_addr
accesses the DTB and translate the address, it introduces much
overhead.
Improve the codes to use private variable which has recorded the
base address from probe.

Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2020-07-09 06:02:44 +02:00
Alex Nemirovsky
44ad59e695 board: presidio-asic: Add I2C support
Add I2C board support for Cortina Access Presidio Engineering Board

Signed-off-by: Alex Nemirovsky <alex.nemirovsky@cortina-access.com>
CC: Heiko Schocher <hs@denx.de>
Reviewed-by: Heiko Schocher <hs@denx.de>
2020-07-09 06:02:44 +02:00
Arthur Li
7f5ea25062 i2c: i2c-cortina: added CAxxxx I2C support
Add I2C controller support for Cortina Access CAxxxx SoCs

Signed-off-by: Arthur Li <arthur.li@cortina-access.com>
Signed-off-by: Alex Nemirovsky <alex.nemirovsky@cortina-access.com>
CC: Heiko Schocher <hs@denx.de>
Reviewed-by: Heiko Schocher <hs@denx.de>

hs: fixed build error, add include log.h
2020-07-09 06:02:44 +02:00
Suneel Garapati
5c2c3e8b44 i2c: octeon_i2c: Add I2C controller driver for Octeon
Add support for I2C controllers found on Octeon II/III and Octeon TX
TX2 SoC platforms.

Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
2020-07-09 06:02:44 +02:00
Tom Rini
61608f395e Merge branch '2020-07-08-misc-features-and-fixes'
- mem cmd improvements
- TPM fixes
- SPL/NAND/FIT fixes
- RSA improvements
2020-07-08 20:20:24 -04:00
Heiko Stuebner
c89b41b4db lib: rsa: function to verify a signature against a hash
rsa_verify() expects a memory region and wants to do the hashing itself,
but there may be cases where the hashing is done via other means,
like hashing a squashfs rootfs.

So add rsa_verify_hash() to allow verifiying a signature against
an existing hash. As this entails the same verification routines
we can just move the relevant code over from rsa_verify() and also
call rsa_verify_hash() from there.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
2020-07-08 17:21:46 -04:00
Simon Glass
bdded2015c cmd: Add a memory-search command
It is useful to be able to find hex values and strings in a memory range.
Add a command to support this.

cmd: Fix 'md' and add a memory-search command
At present 'md.q' is broken. This series provides a fix for this. It also
implements a new memory-search command called 'ms'. It allows searching
memory for hex and string data.
END

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-07-08 17:21:46 -04:00
Simon Glass
a33a824227 command: Drop #ifdef for MEM_SUPPORT_64BIT_DATA
This is defined only when __lp64__ is defined. That means that ulong is
64 bits long. Therefore we don't need to use a separate u64 type on those
architectures.

Fix up the code to take advantage of that, removing the preprocessor
conditions.

Also include the header file that defines MEM_SUPPORT_64BIT_DATA. It is
included by env.h in this file, but that might not last forever.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-07-08 17:21:46 -04:00
Simon Glass
677dbf5dae display_options: Drop #ifdef for MEM_SUPPORT_64BIT_DATA
This is defined only when __lp64__ is defined. That means that ulong is
64 bits long. Therefore we don't need to use a separate u64 type on those
architectures.

Fix up the code to take advantage of that, removing the preprocessor
conditions.

Also include the missing header file that defines MEM_SUPPORT_64BIT_DATA

Fixes: 0914011310 ("command: Remove the cmd_tbl_t typedef")
Signed-off-by: Simon Glass <sjg@chromium.org>
2020-07-08 17:21:46 -04:00
Simon Glass
4680976fb6 cmd: mem: Drop #ifdef for MEM_SUPPORT_64BIT_DATA
This is defined only when __lp64__ is defined. That means that ulong is
64 bits long. Therefore we don't need to use a separate u64 type on those
architectures.

Fix up the code to take advantage of that, removing the preprocessor
conditions.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-07-08 17:21:46 -04:00
Simon Glass
76be8f75c5 cmd: mem: Use a macro to avoid #ifdef in help
It is a bit painful to have #ifdefs in the middle of the help for each
command. Add a macro to avoid this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-07-08 17:21:46 -04:00
Simon Glass
3428faf23a Update MEM_SUPPORT_64BIT_DATA to be always defined
Define this macro always so we don't need the preprocessor to check it.
Convert the users to #if instead of #ifdef.

Note that '#if MEM_SUPPORT_64BIT_DATA' does not give an error if the
macro is not define. It just assumes zero.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-07-08 17:21:46 -04:00
Dario Binacchi
84dd190244 spl: fit: improve spl_nand_fit_read(...) readability
Replacing the ret variable with err and handling first the error
condition about the value returned by the spl_nand_fit_read routine,
improves the code readability.
Furthermore, the 'else' int the 'else return ret' instruction was
useless.

cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Dario Binacchi <dariobin@libero.it>
2020-07-08 17:21:46 -04:00
Dario Binacchi
9f6a14c47f spl: fit: nand: fix fit loading in case of bad blocks
The offset at which the image to be loaded from NAND is located is
retrieved from the itb header. The presence of bad blocks in the area
of the NAND where the itb image is located could invalidate the offset
which must therefore be adjusted taking into account the state of the
sectors concerned.

cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Dario Binacchi <dariobin@libero.it>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
2020-07-08 17:21:46 -04:00
Dario Binacchi
585b468a8c spl: fit: fail fit loading in case of FDT appending error
If uboot does not embed its device tree and the FIT loading function
returns error in case of failure in the FDT append, the redundant itb
image could be loaded.

cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Dario Binacchi <dariobin@libero.it>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-08 17:21:46 -04:00
Dario Binacchi
146a17ad64 spl: fix format of function documentation
U-Boot adopted the kernel-doc annotation style.

cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Dario Binacchi <dariobin@libero.it>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-08 17:21:46 -04:00
Heiko Stuebner
c076faba14 spl: fit: select SPL_CRYPTO_SUPPORT for SPL_FIT_SIGNATURE
Verifying FIT images obviously needs the rsa parts of crypto
support and while main uboot always compiles crypto support,
it's optional for SPL and we should thus select the necessary
option to not end up in compile errors like:

    u-boot/lib/rsa/rsa-verify.c:328: undefined reference to `rsa_mod_exp'

So select SPL_CRYPTO_SUPPORT in SPL_FIT_SIGNATURE.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-08 17:21:46 -04:00
Heiko Stuebner
051cc09ea1 spl: fit: select SPL_HASH_SUPPORT for SPL_FIT_SIGNATURE
rsa-checsum needs support for hash functions or else will run into
compile errors like:
u-boot/lib/rsa/rsa-checksum.c:28: undefined reference to `hash_progressive_lookup_algo'

So similar to the main FIT_SIGNATURE entry selects HASH,
select SPL_HASH_SUPPORT for SPL_FIT_SIGNATURE.

Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-08 17:21:46 -04:00
Heiko Stuebner
1a62c23ecf lib: rsa: add documentation to padding_pss_verify to document limitations
padding_pss_verify only works with the default pss salt setting of -2
(length to be automatically determined based on the PSS block structure)
not -1 (salt length set to the maximum permissible value), which makes
verifications of signatures with that saltlen fail.

Until this gets implemented at least document this behaviour.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-08 17:21:46 -04:00
Heiko Stuebner
eda753be8a lib: rsa: free local arrays after use in rsa_gen_key_prop()
n, rr and rrtmp are used for internal calculations, but in the end
the results are copied into separately allocated elements of the
actual key_prop, so the n, rr and rrtmp elements are not used anymore
when returning from the function and should of course be freed.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-08 17:21:46 -04:00
Heiko Stuebner
49d0ea3746 lib: rsa: fix allocated size for rr and rrtmp in rsa_gen_key_prop()
When calculating rrtmp/rr rsa_gen_key_prop() tries to make
(((rlen + 31) >> 5) + 1) steps in the rr uint32_t array and
(((rlen + 7) >> 3) + 1) / 4 steps in uint32_t rrtmp[]
with rlen being num_bits * 2

On a 4096bit key this comes down to to 257 uint32_t elements
in rr and 256 elements in rrtmp but with the current allocation
rr and rrtmp only have 129 uint32_t elements.

On 2048bit keys this works by chance as the defined max_rsa_size=4096
allocates a suitable number of elements, but with an actual 4096bit key
this results in other memory parts getting overwritten.

So as suggested by Heinrich Schuchardt just use the actual bit-size
of the key as base for the size calculation, in turn making the code
compatible to any future keysizes.

Suggested-by: Heinrich Schuchardt <xypron.debian@gmx.de>
Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

rrtmp needs 2 + (((*prop)->num_bits * 2) >> 5) array elements.

Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-07-08 17:21:46 -04:00
Heiko Stuebner
8434b43730 lib: rsa: bring exp_len in line when generating a key_prop
The exponent field of struct key_prop gets allocated an uint64_t,
and the contents are positioned from the back, so an exponent of
"0x01 0x00 0x01" becomes 0x0 0x0 0x0 0x0 0x0 0x1 0x0 0x1"

Right now rsa_gen_key_prop() allocates a uint64_t but sets exp_len
to the size returned from the parser, while on the other hand the
when getting the key from the devicetree exp_len always gets set to
sizeof(uint64_t).

So bring that in line with the established code.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-08 17:21:46 -04:00
Heiko Stuebner
447b1d7580 lib: rsa: take spl/non-spl into account when building rsa_verify_with_pkey()
Right now in multiple places there are only checks for the full
CONFIG_RSA_VERIFY_WITH_PKEY option, not split into main,spl,tpl variants.

This breaks when the rsa functions get enabled for SPL, for example to
verify u-boot proper from spl.

So fix this by using the existing helpers to distinguis between
build-steps.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-08 17:21:46 -04:00
Heiko Stuebner
3075eb70c9 lib: rsa: distinguish between tpl and spl for CONFIG_RSA_VERIFY
While the SPL may want to do signature checking this won't be
the case for TPL in all cases, as TPL is mostly used when the
amount of initial memory is not enough for a full SPL.

So on a system where SPL uses DM but TPL does not we currently
end up with a TPL compile error of:

    lib/rsa/rsa-verify.c:48:25: error: dereferencing pointer to incomplete type ‘struct checksum_algo’

To prevent that change the $(SPL_) to $(SPL_TPL_) to distinguish
between both. If someone really needs FIT signature checking in
TPL as well, a new TPL_RSA_VERIFY config symbol needs to be added.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-08 17:21:46 -04:00
Heiko Stuebner
85ecfd1a12 cmd: add a panic command
Even in boot scripts it may be needed to "panic" when all options
are exhausted and the device specification specifies hanging
instead of resetting the board.

So add a new panic command that just wraps around the core panic
call in U-Boot and can take an optional message.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2020-07-08 17:21:46 -04:00
Stefan Roese
ce6515ecee debug_uart: Add CR before and after announce string
Add linefeeds before and after the announce string. This makes the
output easier to read, especially if some text follows the announce
message without a specific additional CR.

Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-08 17:21:46 -04:00
Johannes Holland
bedbb383e1 tpm: add #ifndef to fix redeclaration build errors
tpm_tis_spi.c directly includes tpm_tis.h and tpm-v2.h which both
define the same enums (see e.g. TPM_ACCESS_VALID). Add an #ifndef to
prevent redeclaration errors.

Signed-off-by: Johannes Holland <johannes.holland@infineon.com>
2020-07-08 17:21:46 -04:00
Dhananjay Phadke
06bea49809 tpm: add TPM2_GetRandom command support
Add support for TPM2 GetRandom command

Signed-off-by: Dhananjay Phadke <dphadke@linux.microsoft.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-08 15:38:32 -04:00
Bruno Thomsen
78cc3fcf08 tpm2: tis_spi: add linux compatible fallback string
This solves a compatibility issue with Linux device trees
that contain TPMv2.x hardware. So it's easier to import DTS
from upstream kernel when migrating board init from C code
to DTS.

The issue is that fallback binding is different between Linux
and u-Boot.

Linux: "tcg,tpm_tis-spi"
U-Boot: "tis,tpm2-spi"

As there are currently no in-tree users of the U-Boot binding,
it makes sense to use Linux fallback binding.

Signed-off-by: Bruno Thomsen <bruno.thomsen@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2020-07-08 15:38:32 -04:00
Tom Rini
186529953f Merge tag 'u-boot-amlogic-20200708' of https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic
- Add proper Odroid-N2 board support code
- Add support for Odroid-C4 single board computer
2020-07-08 10:40:32 -04:00
Heiko Schocher
7012865e96 gpio: fix test.py for gpio label lookup
commit 2bd261dd17 ("gpio: search for gpio label if gpio is not found through bank name")

disabled DM_GPIO_LOOKUP_LABEL which is needed
in sandbox defconfigs, as we have tests for this
functionality.

Signed-off-by: Heiko Schocher <hs@denx.de>
2020-07-08 08:49:34 -04:00
Neil Armstrong
d9c967792b ARM: dts: meson-sm1-odroid-c4: add ethernet PHY reset
The PHY needs a reset in order to be functionnal for U-Boot, add the old
PHY reset bindings for dwmac until we support the new bindings in the PHY node.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Tested-by: Anand Moon <linux.amoon@gmail.com>
2020-07-08 10:52:45 +02:00
Christian Hewitt
8888d83773 boards: amlogic: add Odroid C4 support
Odroid C4 is an Amlogic SM1 device, the board config and board documentation
are adapted from the Odroid-N2 support from the same vendor.

Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
[narmstrong: fix odroid-c4.rst typos and structure]
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Tested-by: Anand Moon <linux.amoon@gmail.com>
2020-07-08 10:52:45 +02:00
Christian Hewitt
da77a787ff ARM: dts: sync amlogic G12A/G12B/SM1 DT from Linux 5.8-rc1
This imports the changes and the new Odroid-C4 board from the Linux
commit b3a9e3b9622a ("Linux 5.8-rc1").

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Tested-by: Anand Moon <linux.amoon@gmail.com>
2020-07-08 10:52:45 +02:00
Pascal Vizeli
6de936b011 board: amlogic: Add Odroid-N2 board support
Add a proper Odroid-N2 board support to handle the Ethernet MAC
address stored in the in-SoC eFuses.

Signed-off-by: Pascal Vizeli <pvizeli@syshack.ch>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Tested-by: Anand Moon <linux.amoon@gmail.com>
2020-07-08 10:52:45 +02:00
Tom Rini
526fe06a5d Merge tag 'u-boot-rockchip-20200708' of https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip
- dts sync from kernel for rk3399 boards;
- Add Radxa Rock Pi N8, N10;
- Some feature update for Pinebook Pro;
2020-07-07 23:05:57 -04:00
Tom Rini
0b59138690 Merge branch '2020-07-07-misc-new-features'
- Improve s700 SoC support
- Fix building with clang on ARM.
- Juno platform updates
- fs/dm cmd improvements
- Other assorted improvements / fixes
2020-07-07 22:58:18 -04:00
Andre Przywara
9b9f10e3cc arm: juno: Enable SATA controller
The ARM Juno boards (-r1 and -r2) feature a Silicon Image 3132 PCIe
SATA controller soldered on the board, providing two SATA ports.

Enable the driver and the sata command in the defconfig, to be able to
load images from SATA disks.

Tested by loading kernels and Grub/EFI from an SSD and successfully
booting a Linux system (with and without using UEFI).

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
2020-07-07 18:23:48 -04:00
Andre Przywara
eb6211171d arm: juno: Enable PCI
The ARM Juno boards in their -r1 and -r2 variants sport a PCIe
controller, which we configure already in board specific code to be ECAM
compliant. Hence we can just enable the generic ECAM driver to let
U-Boot use PCIe devices.

Add the respective options to the Juno defconfig to enable the PCI
framework and the generic ECAM driver, and initialise the driver upon
loading U-Boot.

Make some functions in the Juno PCIe init code static on the way.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
2020-07-07 18:23:48 -04:00
Andre Przywara
44a4042b01 sata_sil: Enable DM_PCI operation
Even though the sata_sil driver was converted over to the driver model,
it still assumed that the PCI controller is using the legacy interface.

Allow the "devno" member to be a struct udevice pointer and use
DM_PCI_COMPAT to covert the rest of the interface.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
2020-07-07 18:23:48 -04:00
Andre Przywara
cc696e7cae arm: juno: Enable DM_ETH
The smc911X driver is now DM enabled, so we can switch the Juno board
over to use DM_ETH for the on-board Fast Ethernet device.
Works out of the box by using the DT.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
2020-07-07 18:23:48 -04:00
Andre Przywara
117a52e238 net: smc911x: Properly handle EEPROM MAC address
When compiled as a DM_ETH driver, the scm911x driver was reading the MAC
address from the optional EEPROM storage, but failed to copy this to the
platdata struct. Since it was also missing a definition of the
read_rom_hwaddr() function, the generic Ethernet code was dismissing
this MAC address, falling back to a random address or denying to start
at all.

Add an implementation of .read_rom_hwaddr, and refactor the function
reading the ROM address to be called by all interested parties.

This fixes MAC address issues when using the driver in DM_ETH "mode".

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-By: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
2020-07-07 18:23:48 -04:00
Andre Przywara
f1dd05bc34 net: dm: Remove warning about EEPROM provided MAC address
Similar to patch 821fec0ceb ("net: remove scary warning about EEPROM
provided MAC address") this removes the somewhat awkward "warning" on
boards using DM_ETH:
In many parts of the computing world having a unique MAC address
sitting in some on-NIC storage is considered the normal case.

If there is a properly provided MAC address (either from ROM or from DT),
remove the warning to not scare the user unnecessarily.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-By: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
2020-07-07 18:23:48 -04:00
Andre Przywara
220b590d5f arm: vexpress64: Fix counter frequency
The arch timer on 64-bit Arm Ltd. platforms is driven by a 24 MHz
crystal oscillator, so the frequency is not 25165824 MHz, as the current
code suggests.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
2020-07-07 18:23:48 -04:00
Heinrich Schuchardt
22a4e006be arm: use correct argument size of special registers
Compiling with clang on ARMv8 shows errors like:

./arch/arm/include/asm/system.h:162:32: note: use constraint modifier "w"
                asm volatile("msr sctlr_el1, %0" : : "r" (val) : "cc");
                                             ^~
                                             %w0

These errors are due to using an incorrect size for the variables used
for writing to and reading from special registers which have 64 bits on
ARMv8.

Mask off reserved bits when reading the exception level.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-07-07 18:23:48 -04:00
Heinrich Schuchardt
b87d8d6a0e arm: remove outdated comment concerning -ffixed-x18
Clang 9 supports -ffixed-x18.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-07 18:23:48 -04:00
Heinrich Schuchardt
7f642cb287 trace: clang compatible handling of gd register
On ARM systems gd is stored in register r9 or x18. When compiling with
clang gd is defined as a macro calling function gd_ptr(). So we can not
make assignments to gd.

Use function set_gd() for setting the register on ARM.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-07 18:23:48 -04:00
Heinrich Schuchardt
a20f0c820f fs: fat_write: fix short name creation.
Truncate file names if the buffer size is exceeded to avoid a buffer
overflow.

Use Sphinx style function description.

Add a TODO comment.

Reported-by: CID 303779
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-07 18:23:48 -04:00
Heiko Schocher
fa914675d2 test_sleep.py: make sleep time and margin configurable
make the sleep time and the margin configurable.

Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
2020-07-07 18:23:48 -04:00
Heiko Schocher
2bd261dd17 gpio: search for gpio label if gpio is not found through bank name
dm_gpio_lookup_name() searches for a gpio through
the bank name. But we have also gpio labels, and it
makes sense to search for a gpio also in the labels
we have defined, if no gpio is found through the
bank name definition.

This is useful for example if you have a wp pin on
different gpios on different board versions.

If dm_gpio_lookup_name() searches also for the gpio labels,
you can give the gpio an unique label name and search
for this label, and do not need to differ between
board revisions.

Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
[trini: Don't enable by default]
Signed-off-by: Tom Rini <trini@konsulko.com>
2020-07-07 18:23:37 -04:00
Amit Singh Tomar
4008800103 configs: Enable mac and phy configs
This patch adds MAC and PHY related configs (needed for proper
ethernet operations) for Action Semi S700 SoC.

Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
2020-07-07 17:12:01 -04:00
Amit Singh Tomar
cd2baaf777 owl: Kconfig: Enable DM eth for OWL platform
This patch selects CONFIG_DM_ETH (ethernet driver is base on DM model)
for Action semi owl SoC.

Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
2020-07-07 17:12:01 -04:00
Amit Singh Tomar
75523d54ac arm: dts: s700: add node for ethernet controller
This patch adds node for ethernet controller found on Action Semi OWL
S700 SoC.

Since, there is no upstream Linux binding exist for S700 ethernet
controller, Changes are put in u-boot specific dtsi file.

Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
2020-07-07 17:12:01 -04:00
Amit Singh Tomar
3c5c4ee35f net: designware: s700: Add glue code for S700 mac
This patchs adds glue logic to enable designware mac present on
Action Semi based S700 SoC, Configures SoC specific bits.

Undocumented bit that programs the PHY interface select register
comes from vendor source.

It has been tested on Cubieboard7-lite based on S700 SoC.

Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
2020-07-07 17:11:58 -04:00
Amit Singh Tomar
fa6539a3dc net: phy: realtek: Introduce PHY_RTL8201F_S700_RMII_TIMINGS to adjust rx/tx timings
RTL8201F PHY module found on Actions Semi Cubieboard7 seems to have
specific Rx/Tx interface timings requirement for proper PHY operations.
These timing values are not documented anywhere and picked from vendor
code.

This commits lets proper packets to be transmitted over the network.

Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
2020-07-07 16:09:22 -04:00
Amit Singh Tomar
b0778d9c2c net: phy: realtek: Add support for RTL8201F PHY module.
This patch adds support for Realtek PHY RTL8201F 10/100Mbs
(with variants: RTL8201FN and RTL8201FL) PHYceiver. It is
present on Actions Semi Cubieboard7 board.

Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
2020-07-07 16:09:22 -04:00
Amit Singh Tomar
3a21734605 clk: actions: Add Ethernet clocks
This commit adds clocks needed for ethernet operations for
Actions OWL family of SoCs (S700 and S900).

Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
2020-07-07 16:09:22 -04:00
Amit Singh Tomar
0a7ba7c53c arm: actions: remove "CONFIG_SYS_SDRAM_SIZE" for Actions Owl Semi SoCs
Now that, we calculate SDRAM size by reading DDR registers,
"CONFIG_SYS_SDRAM_SIZE" is no more needed.

This commit removes "CONFIG_SYS_SDRAM_SIZE" from common configuration
file.

Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2020-07-07 16:09:22 -04:00
Amit Singh Tomar
3ca564e96e Actions: OWL: Calculate SDRAM size
Calculate the SDRAM size from DDR capacity register registers instead
of using hard-coded value. This is quite useful to get correct size
on differnt boards based on Actions OWL family of SoCs (S700 and S900).

There is no documentation available that talks about DDR registers, and
this is very much taken from vendor source.

This commit lets Linux boot on Cubieboard7-lite(based on S700).

Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2020-07-07 16:09:22 -04:00
Robert Marko
26073f9ed3 image: Add support for ZSTD decompression
This patch adds support for ZSTD decompression of FIT images.

Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
2020-07-07 15:37:13 -04:00
Niel Fourie
e369790843 cmd: blkls: Add blkls command
Add a command to print a list of available block device drivers,
and for each, the list of known block devices.

Signed-off-by: Niel Fourie <lusus@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-07-07 15:37:13 -04:00
Niel Fourie
2e48836895 cmd: dm: Fixed/Added DM driver listing subcommands
Renamed dm "drivers" subcommand to "compat" (as it listed
compatibility strings) and prevent it from segfaulting when
drivers have no of_match populated.

Added a new "drivers" subcommand to dump a list of all known DM
drivers and for each, their uclass id, uclass driver and names of
attached devices.

Added a new "static" subcommand to dump a list of DM drivers with
statically defined platform data.

Signed-off-by: Niel Fourie <lusus@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-07 15:37:13 -04:00
Niel Fourie
2280fa56a0 cmd: fs: Add command to list supported fs types
Added command "fstypes" to list supported/included filesystems.

Signed-off-by: Niel Fourie <lusus@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
[trini: Limit to sandbox]
Signed-off-by: Tom Rini <trini@konsulko.com>
2020-07-07 15:36:59 -04:00
Niel Fourie
0ffdfbd1d0 cmd: part: Add subcommand to list supported partition tables
Add a subcommand "types" to the part command, which lists the supported
partition table types.

Signed-off-by: Niel Fourie <lusus@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-07 15:22:42 -04:00
Tom Rini
1e88e78177 Merge tag 'u-boot-stm32-20200707' of https://gitlab.denx.de/u-boot/custodians/u-boot-stm
- arch and board update for stm32mp15:
  - use OPP information in device tree for 800MHz/650MHz support
  - ram: inprovments of test command
  - solve boot on closed chip when access to DBGMCU_IDC is protected
  - stm32prog command: Add "device anme" during USB enumeration
  - update configs: activate WATCHDOG and 'env erase' command,
    increase teed partition, support SD card after NOR boot by default and
    use env info in env_check
  - some sboard cleanups: gpio hog in dh board, specific driver for
    type-c stusb1600 controller code in a driver move part of code in spl.c
    and in common directory
- fix STM32 compatible for dwc_eth_qos driver
- support of new pinctrl ops get_dir_flags/set_dir_flags in stm32 and stmfx
  drivers
- vrefbuf: fix a possible overshoot when re-enabling
2020-07-07 14:00:44 -04:00
Tom Rini
c4df37bfa9 Merge tag 'u-boot-atmel-2020.10-a' of https://gitlab.denx.de/u-boot/custodians/u-boot-atmel
First set of u-boot-atmel features for 2020.10 cycle
2020-07-07 12:55:57 -04:00
Volodymyr Babchuk
f8ddd8cbb5 arm64: issue ISB after updating system registers
ARM Architecture reference manual clearly states that PE pipeline
should be flushed after changes to some system registers. Refer to
paragraph "B2.3.5 Memory Barriers" at page B2-92 of "Arm Architecture
Reference Manual ARMv8 for ARMv8-A Architecture Profile" (ARM DDI
0487B.a).

Failing to issue instruction synchronization barrier can lead to
spurious errors, like synchronous exception when accessing FPU
registers. This is very prominent on CPUs with long instruction
pipeline, like ARM Cortex A72.

This change fixes the following U-Boot panic:

 "Synchronous Abort" handler, esr 0x1fe00000
 elr: 00000000800948cc lr : 0000000080091e04
 x0 : 00000000801ffdc8 x1 : 00000000000000c8
 x2 : 00000000800979d4 x3 : 00000000801ffc60
 x4 : 00000000801ffd40 x5 : ffffff80ffffffd8
 x6 : 00000000801ffd70 x7 : 00000000801ffd70
 x8 : 000000000000000a x9 : 0000000000000000
 x10: 0000000000000044 x11: 0000000000000000
 x12: 0000000000000000 x13: 0000000000000000
 x14: 0000000000000000 x15: 0000000000000000
 x16: 000000008008b2e0 x17: 0000000000000000
 x18: 00000000801ffec0 x19: 00000000800957b0
 x20: 00000000000000c8 x21: 00000000801ffdc8
 x22: 000000008009909e x23: 0000000000000000
 x24: 0000000000000000 x25: 0000000000000000
 x26: 0000000000000000 x27: 0000000000000000
 x28: 0000000000000000 x29: 00000000801ffc50

 Code: a94417e4 a90217e4 a9051fe6 a90617e4 (3d801fe0)

While executing instruction

 str     q0, [sp, #112]

in vsnprintf() prologue. This panic was observed only on Cortex A72 so
far.

This patch places ISBs on other strategic places as well.

Also, this probably is the right fix for the issue workarounded in the
commit 45f41c134b ("ARM: uniphier: add weird workaround code for LD20")

Reported-by: Oleksandr Andrushchenko <oleksandr_andrushchenko@epam.com>
Suggested-by: Julien Grall <julien.grall.oss@gmail.com>
Signed-off-by: Volodymyr Babchuk <volodymyr_babchuk@epam.com>
CC: Tom Rini <trini@konsulko.com>
CC: Masahiro Yamada <yamada.masahiro@socionext.com>
CC: Stefano Stabellini <sstabellini@kernel.org>
Reviewed-by: Julien Grall <julien@xen.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Tested-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-07-07 11:01:52 -04:00
Patrick Delaunay
6c393e8c0f ram: stm32mp1: add size and addr parameter to test all
Add size and addr parameter to test "All" to override the default
value (4kB and STM32_DDR_BASE) used in tests with these optional
parameters: [size] or [addr].

When other optional parameters are present before [addr],
they are replaced by default value:
- [loop] = "1"
- [pattern] = "-" (new: force default pattern)

Example to use:

DDR>test 0 1 0x20000

DDR>test 0 1 0x1000000 0xD0000000

Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-07-07 16:01:23 +02:00
Patrick Delaunay
81b66b9033 ram: stm32mp1: use the DDR size by default in the test addressBus
The test 4 = "AddressBus [size] [addr]" without parameter
detects alias for any address bit only when:
- size = real size of DDR
- addr = start of DDR = 0xC0000000

These value must be the default value when parameters are absent.

This patch sets bufsize to STM32_DDR_SIZE and get_bufsize() selects
the correct value for bufsize when this parameter is absent =
full size of the DDDR

On EV1 board :
DDR> test 4
running at 0xC0000000 length 0x40000000

On DK2 board
DDR> test 4
running at 0xC0000000 length 0x20000000

Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-07-07 16:01:23 +02:00
Patrick Delaunay
fcd4890829 ram: stm32mp1: add parameter addr in test FrequencySelectivePattern
Add a parameter addr in test FrequencySelectivePattern to select
the base address used to execute the tests.

Default value (when the parameter is absent) is STM32_DDR_BASE,
selected in get_addr() function.

Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-07-07 16:01:23 +02:00
Patrick Delaunay
1a5be5a416 ram: stm32mp1: protect minimum value in get_bufsize
Add protection on minimum value for result of get_bufsize
and check the alignment of buffer size: only multiple min_size
is allowed; only 4 bytes alignment was checked previously
(value & 0x3).

For example the "Random" test raises an issue when size is not 8 bytes
aligned because address for buffer = address + size / 2 is not word
aligned.

This patch avoid test error for unsupported size value.

Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-07-07 16:01:23 +02:00
Patrick Delaunay
c16cba88bd stm32mp1: use the command env info in env_check
Activate CMD_NVEDIT_INFO and use the new command "env info -d -p -q"
to automatically save the environment on first boot.

This patch allows to remove the env_default variable.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-07-07 16:01:23 +02:00
Patrick Delaunay
8b5206d9e4 cmd: env: use ENV_IS_IN_DEVICE in env info
Use the define ENV_IS_IN_DEVICE to test if one the
CONFIG_ENV_IS_IN_...  is defined and correct the detection of
persistent storage support in the command "env info"
if CONFIG_ENV_IS_NOWHERE is activated.

Since commit 60d5ed2593c9 ("env: allow ENV_IS_NOWHERE with
other storage target") test CONFIG_ENV_IS_NOWHERE is not
enough; see also commit 953db29a1e9c6 ("env: enable saveenv
command when one CONFIG_ENV_IS_IN is activated").

This patch avoids issue for this command in stm32mp1 platform.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-07-07 16:01:23 +02:00
Patrick Delaunay
6826d0d82b board: dh_stm32mp1: update the gpio hog support
This patch update the current gpio hog implementation with
the new API gpio_hog_probe_all() activated with CONFIG_GPIO_HOG.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-07-07 16:01:23 +02:00
Patrick Delaunay
03fb03842a board: st: move type-c stusb1600 controller code in a driver
Migrate the ST Microelectronics STUSB160X Type-C controller code in
a generic I2C driver in st/common, based on Linux one in :
drivers/usb/typec/stusb160x.c

This patch simplifies the stm32mp1 board code and allows to reuse
this STUSB160X driver in other boards.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-07-07 16:01:23 +02:00
Patrick Delaunay
d5d726d3cc configs: stm32mp1: only support SD card after NOR in bootcmd_stm32mp
In the boot command used in ST boards, bootcmd_stm32mp, only support
the SD card as second stage, where is found the bootfs with DISTRO.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-07-07 16:01:23 +02:00
Patrick Delaunay
bd3f60d29c arm: stm32mp: protect DBGMCU_IDC access with BSEC
As debugger must be totally closed on Sec closed chip,
the DBGMCU_IDC register is no more accessible (self
hosted debug is disabled with OTP).

This patch adds a function bsec_dbgswenable() to check
if the DBGMCU registers are available before to access them:
BSEC_DENABLE.DBGSWENABLE = self hosted debug status.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-07-07 16:01:23 +02:00
Patrick Delaunay
03c4e6224a arm: stm32mp: stm32prog: add "Device Name" in iproduct during DFU USB enumeration
Add "Device Name" in iproduct during DFU USB enumeration
to have this information in STM32CubeProgrammer trace
(this tools is compatible with @Name since v2.3)

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-07-07 16:01:23 +02:00
Patrick Delaunay
42400228dc board: st: stm32mp1: increase teed partition
With TEE 3.7.0, the partition teed (OP-TEE pageable
code and data) need to increase up to 512KB in NOR device.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-07-07 16:01:23 +02:00
Patrick Delaunay
6072c220bd stm32mp1: configs: activate CMD_ERASEENV
Activate the command env erase to reset the environment with the command:
> env erase

it is simpler than:
> env default -a
> env save

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-07-07 16:01:23 +02:00
Fabrice Gasnier
8b8c99bd3e power: regulator: stm32: vrefbuf: fix a possible overshoot when re-enabling
There maybe an overshoot:
- when disabling, then re-enabling vrefbuf too quickly
- or upon platform reset as external capacitor maybe slow
  discharging (VREFBUF is HiZ at reset by default).
VREFBUF is used by ADC/DAC on some boards. An overshoot on the reference
voltage make the conversions inaccurate for a short period of time. So:
- Don't put the VREFBUF in HiZ when disabling, to force an active
  discharge.
- Enforce a 1ms OFF/ON delay, also upon reset

Penalty is a 1ms delay is applied (even for a cold boot), when enabling
VREFBUF.

Fixes: 93cf0ae775 ("power: regulator: Add support for stm32-vrefbuf")

Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2020-07-07 16:01:23 +02:00
Patrick Delaunay
2ee5005dea configs: stm32mp1: activate WATCHDOG
As kernel v5.6 have a solution since so we will be able to enable
the watchdog at boot time. It is reloaded by the watchdog
framework (if CONFIG_WATCHDOG_HANDLE_BOOT_ENABLED is set) and
until the userspace watchdog daemon takes over control.

Need presence of kernel patch 85fdc63fe256 ("drivers: watchdog:
stm32_iwdg: set WDOG_HW_RUNNING at probe") integrated in v5.6-rc1.

This patch revert the previous commit ca351e705a ("stm32mp1:
deactivate WATCHDOG in defconfig").

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-07-07 16:01:23 +02:00
Patrick Delaunay
da7a0bb1f2 pinctrl: stm32: add information on pin configuration
Add information on pin configuration used for pinmux command:
- bias configuration for output (disable, pull up, pull down)
- otype for input (open drain or push pull)

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-07-07 16:01:23 +02:00
Patrick Delaunay
5593333c2e pinctrl: stmfx: add information on pin configuration
Add information on pin configuration used for pinmux command.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-07-07 16:01:23 +02:00
Patrick Delaunay
8d895efffe gpio: stmfx: add ops get_dir_flags
Add support of ops get_dir_flags() to read dir flags from
STMFX registers.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-07-07 16:01:23 +02:00
Patrick Delaunay
22b3fe4224 gpio: stmfx: add ops set_dir_flag
Manage the flags for GPIO configuration:
- open_drain, push_pull
- pull_up, pull_down

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-07-07 16:01:23 +02:00
Patrick Delaunay
fabb6e14c8 gpio: stmfx: add function stmfx_read_reg and stmfx_write_reg
Add the helper functions stmfx_read_reg() and stmfx_write_reg() to avoid
duplicated code for access to stmfx's register with mask.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-07-07 16:01:23 +02:00
Patrick Delaunay
067c7398d5 gpio: stmfx: rename function used to change pin configuration
Rename the two function used to change the pin configuration
from stmfx_pinctrl_.. stmfx_conf_... to clarify the function usage.

No functional change.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-07-07 16:01:23 +02:00
Patrick Delaunay
84115cd066 gpio: stmfx: move function to prepare new ops introduction
Move the functions stmfx_pinctrl_set_pupd and stmfx_pinctrl_set_type;
they can be used by the new ops get_dir_flags and set_dir_flags introduced
by next patch.

No functional change.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-07-07 16:01:23 +02:00
Patrick Delaunay
43efbb6a3e gpio: stm32: add ops get_dir_flags
Add ops get_dir_flags() to read dir flags from GPIO registers.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-07-07 16:01:23 +02:00
Patrick Delaunay
f13ff88b61 gpio: stm32: add ops set_dir_flags
Manage flags for GPIO configuration:
- open_drain, open_source, push_pull
- pull_up, pull_down

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-07-07 16:01:23 +02:00
Patrick Delaunay
29e4ce3c97 board: stm32mp1: update the gpio hog support
This patch updates the current gpio hog implementation and uses
the new API gpio_hog_probe_all(), activated with CONFIG_GPIO_HOG.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-07-07 16:01:23 +02:00
Patrick Delaunay
9ebc326c08 configs: stm32mp1: activate CONFIG_GPIO_HOG
This patch activates the new configuration CONFIG_GPIO_HOG.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-07-07 16:01:23 +02:00
Patrick Delaunay
4fb46816c7 board: stm32mp1: move the function board_debug_uart_init in spl.c
Move the debug function board_debug_uart_init in spl.c
as the debug_uart_init() function is called in arch_cpu_init()
only for SPL and remove the board.c file.

For TFABOOT, the UART TX pin configuration is done in TF-A.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-07-07 16:01:23 +02:00
Patrick Delaunay
4a87fea6de ARM: dts: stm32mp1: use OPP information for PLL1 settings in SPL
This patch allows to switch the CPU frequency to 800MHz on the
ST Microelectronics board (DK1/DK2 and EV1) or dh electronics SOM
using the STM32MP15x SOC and when it is supported by the HW
(for STM32MP15xD and STM32MP15xF).

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-07-07 16:01:23 +02:00
Patrick Delaunay
2f238327b7 board: stm32mp1: update vddcore in SPL
For board using STPMIC1, the vddcore is provided by BUCK1 of STPMIC1
and need to be updated for 800MHz support and only after the clock
tree initialization.

The VDDCORE voltage value is provided by clock driver, saved in global
variable opp_voltage_mv and udpated in SPL board_early_init_f(),
just after clock tree initialization.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-07-07 16:01:23 +02:00
Patrick Delaunay
d1a4b09de6 board: st: stpmic1: add function stpmic1_init
Add a function stmpic_init to early initialize the PMIC STPMIC1
- keep vdd on during the reset cycle (to avoid issue when backup battery
  is absent)
- Check if debug is enabled to program PMIC according to the bit

This patch allows to remove the compilation of spl.c file from stm32mp1
board in dh_stm32mp1.

CONFIG_SPL_BOARD_INIT is removed as the new function is called earlier
in SPL, in the function board_early_init_f.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-07-07 16:01:23 +02:00
Patrick Delaunay
4e62642aef arm: stm32mp: add weak function to save vddcore
Add a weak functions to save the vddcore voltage value provided
in the OPP node when the clock tree is initialized.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-07-07 16:01:23 +02:00
Patrick Delaunay
37ad8377af stm32mp1: clk: configure pll1 with OPP
The PLL1 node (st,pll1) is optional in device tree, the max supported
frequency define in OPP node is used when the node is absent.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-07-07 16:01:23 +02:00
Patrick Delaunay
918e9c3d63 board: st: create common file stpmic1.c
Move function board_ddr_power_init() in a new file stpmic1 in
board/st/common to avoid duplicated code in each board using
stpmic1

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-07-07 16:01:23 +02:00
Patrick Delaunay
6f2e0ad194 ARM: dts: stm32: add cpufreq support on stm32mp15x
This commit adds cpufreq support on stm32mp15x SOC. STM32 cpufreq uses
operating points V2 bindings (no legacy). Nvmem cells have to be used to
know the chip version and then which OPPs are available. Note that STM32
cpufreq driver is mainly based on "cpufreq-dt" driver.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-07-07 16:01:23 +02:00
Patrick Delaunay
95bd49a5aa arm: stm32mp: spl: add bsec driver in SPL
Add the bsec driver in SPL, as it is needed by SOC part number detection
to found the supported OPP.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-07-07 16:01:23 +02:00
Patrick Delaunay
a718a5d0f4 net: dwc_eth_qos: update the compatible supported for STM32
Update the compatible associated with the STM32 MPU glue
in the DWC ethernet driver.

The supported compatible is the specific "st,stm32mp1-dwmac"
as indicated in Linux binding
Documentation/devicetree/bindings/net/stm32-dwmac.txt
and not the "snps,dwmac-4.20a" only used to the select IP
version.

This glue is implemented in Linux kernel in:
drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c

For information in stm32mp151.dtsi, the 2 compatibles are
supported:

ethernet0: ethernet@5800a000 {
	compatible = "st,stm32mp1-dwmac", "snps,dwmac-4.20a";
	...
};

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-07-07 16:01:23 +02:00
Christian Gmeiner
1788a9697f fs: fat: fix fat iteration
According to the FAT specification it is valid to have files with an
attribute value of 0x0. This fixes a regression where different U-Boot
versions are showing different amount of files on the same storage
device. With this change U-Boot shows the same number of files and folders
as Linux and Windows.

Fixes: 39606d462c ("fs: fat: handle deleted directory entries correctly")
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2020-07-07 09:45:12 -04:00
Oleksandr Andrushchenko
53007fc1eb common/board_f: Respect original FDT size while relocating
While relocating FDT we reserve some memory for the new FDT and
set the size of the FDT with that respect. But FDT may be placed
at the end of the RAM leading to memory access beyond it.
Fix this by copying exact FDT size bytes, not the reserved size.

Signed-off-by: Oleksandr Andrushchenko <oleksandr_andrushchenko@epam.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-07 09:45:07 -04:00
Jagan Teki
ad277eb458 ARM: dts: rockchip: Add Radxa Rock Pi N8 initial support
Rock Pi N8 is a Rockchip RK3288 based SBC, which has
- VMARC RK3288 SOM (as per SMARC standard) from Vamrs.
- Compatible carrier board from Radxa.

VAMRC RK3288 SOM need to mount on top of radxa dalang
carrier board for making Rock Pi N8 SBC.

So, add initial support for Rock Pi N8 by including rk3288,
rk3288 vamrc-som and raxda dalang carrier board dtsi files.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-07 19:45:57 +08:00
Jagan Teki
9e7b9d4fc0 ARM: dts: rockchip: Add VMARC RK3288 SOM initial support
VMARC RK3288 SOM is a standard SMARC SOM design with
Rockchip RK3288 SoC, which is designed by Vamrs.

Specification:
- Rockchip RK3288
- PMIC: RK808
- SD slot, 16GiB eMMC
- 2xUSB-2.0, 1xUSB3.0
- USB-C for power supply
- Ethernet, PCIe
- HDMI, MIPI-DSI/CSI, eDP

Add initial support for VMARC RK3288 SOM, this would use
with associated carrier board.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-07 19:45:57 +08:00
Jagan Teki
1a95b1e82c ARM: dts: rockchip: radxa-dalang: Update sdmmc properties
Radxa dalang carrier boards are used to mount vmarc SoM's
of rk3399pro and rk3288 to make complete SBC.

Among these combinations, card detection gpio, max-frequency
properties are used with rk3399pro SoM but not required for
rk3288 SoM based on the hardware schematics.

So, let's move these sdmmc specific properties on associate
vmarc dtsi to make common use of dalang carrier device tree file.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-07 19:45:57 +08:00
Hugh Cole-Baker
46a8606873 rockchip: rk3399: allow deselecting SPL_ATF_NO_PLATFORM_PARAM
SPL_ATF_NO_PLATFORM_PARAM is selected by default for RK3399 configs, to
guard against issues when used with TF-A versions that perform
insufficient validation on the platform parameter. However, since commit
8109f738ffa7 "rockchip: increase FDT buffer size" in TF-A, passing a
device tree as platform parameter no longer causes problems for upstream
TF-A for RK3399.

Since SPL_ATF_NO_PLATFORM_PARAM doesn't need to be selected when using
upstream TF-A, change the Kconfig option from select to imply. It'll
still default to being selected but can be deselected by a user if they
know they will be using a compatible version of TF-A.

Signed-off-by: Hugh Cole-Baker <sigmaris@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Tested-by: Walter Lozano <walter.lozano@collabora.com>
2020-07-07 19:45:57 +08:00
Jagan Teki
b1fccd3c0c arm64: dts: rockchip: Add Radxa Rock Pi N10 initial support
Rock Pi N10 is a Rockchip RK3399Pro based SBC, which has
- VMARC RK3399Pro SOM (as per SMARC standard) from Vamrs.
- Compatible carrier board from Radxa.

VAMRC RK3399Pro SOM need to mount on top of radxa dalang
carrier board for making Rock Pi N10 SBC.

So, add initial support for Rock Pi N10 by including rk3399,
rk3399pro vamrc-som and raxda dalang carrier board dtsi files.

rk3399pro-rock-pi-n10.dts was synced from linux-next v5.7-rc1.

Tested
- ROCK PI N10 Model B
- ROCK PI N10 Model C
- Boot from SD

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-07 19:45:57 +08:00
Jagan Teki
29dac6316a ARM: dts: rockchip: Sync v5.7-rc1 Radxa Dalang Carrier
Carrier board often referred as baseboard. For making
complete SBC or any other industrial boards, these
carrier boards will be used with associated SOMs.

Radxa has Dalang carrier board which supports on-board
peripherals, ports like USB-2.0, USB-3.0, HDMI, MIPI DSI/CSI,
eDP, Ethernet, WiFi, PCIe, USB-C, 40-Pin GPIO header and etc.

Right now Dalang carrier board is used with two SBC-variants:
Rock Pi N10 => VMARC RK3399Por SOM + Dalang carrier board
Rock Pi N8  => VMARC RK3288 SOM + Dalang carrier board(+codec)

So add this carrier board dtsi as a separate file in
ARM directory, so-that the same can reuse it in both
rk3288, rk3399pro variants of Rockchip SOMs.

Sync this dtsi from linux-next v5.7-rc1.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-07 19:45:57 +08:00
Jagan Teki
f18d2663d3 arm64: dts: rockchip: Sync v5.7-rc1 VMARC RK3399Pro SOM
VMARC RK3399Pro SOM is a standard SMARC SOM design with
Rockchip RK3399Pro SoC, which is designed by Vamrs.

Specification:
- Rockchip RK3399Pro
- PMIC: RK809-3
- SD slot, 16GiB eMMC
- 2xUSB-2.0, 1xUSB3.0
- USB-C for power supply
- Ethernet, PCIe
- HDMI, MIPI-DSI/CSI, eDP

Add initial support for VMARC RK3399Pro SOM, this would use
with associated carrier board.

Sync this dtsi from linux-next v5.7-rc1.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-07 19:45:57 +08:00
Jagan Teki
889348593b arm64: dts: rockchip: Sync v5.7-rc1 rk3399pro.dtsi
Sync linux-next v5.7-rc1 rk3399pro.dtsi.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-07 19:45:57 +08:00
Peter Robinson
f9d67436ce rockchip: Pinebook Pro: Fix SPI flash and store env on it
Some minor fixes for SPI flash on the Pinebook Pro and also
default to saving environment to the SPI flash as it's
guaranteed to be on board.

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
(applied with make savedefconfig)
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-07 19:45:57 +08:00
Peter Robinson
3a57712496 rockchip: Pinebook Pro: Fix USB and the USB attached keyboard
The built in keyboard on the Pinebook Pro is attached via USB so
fix this up to ensure USB works as expected.

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-07 19:45:56 +08:00
Peter Robinson
dc38a58360 rockchip: Pinebook Pro: enable rng to provide an entropy source
Enable the rng so UEFI can provide entropy for KASLR

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-07 19:45:56 +08:00
Marcin Juszkiewicz
f81f9f0eba rockchip: rockpro64: initialize USB in preboot
With video output enabled and USB keyboard supported there is no need
for serial console. So let initialize USB subsystem so keyboard connected to
board (either directly or via hub) can be used to interrupt autoboot.

U-Boot TPL 2020.07-rc3-00123-g52d6cbd1a7 (Jun 03 2020 - 17:34:20)
Channel 0: LPDDR4, 50MHz
BW=32 Col=10 Bk=8 CS0 Row=16/15 CS=1 Die BW=16 Size=2048MB
Channel 1: LPDDR4, 50MHz
BW=32 Col=10 Bk=8 CS0 Row=16/15 CS=1 Die BW=16 Size=2048MB
256B stride
256B stride
lpddr4_set_rate: change freq to 400000000 mhz 0, 1
lpddr4_set_rate: change freq to 800000000 mhz 1, 0
Trying to boot from BOOTROM
Returning to boot ROM...

U-Boot SPL 2020.07-rc3-00123-g52d6cbd1a7 (Jun 03 2020 - 17:34:20 +0200)
Trying to boot from SPI

U-Boot 2020.07-rc3-00123-g52d6cbd1a7 (Jun 03 2020 - 17:34:20 +0200)

SoC: Rockchip rk3399
Reset cause: RST
Model: Pine64 RockPro64 v2.1
DRAM:  3.9 GiB
PMIC:  RK808
MMC:   mmc@fe310000: 2, mmc@fe320000: 1, sdhci@fe330000: 0
Loading Environment from SPI Flash... SF: Detected gd25q128 with page size 256 Bytes, erase size 4 KiB, total 16 MiB
OK
In:    serial
Out:   vidconsole
Err:   vidconsole
Model: Pine64 RockPro64 v2.1
Net:   eth0: ethernet@fe300000
starting USB...
Bus usb@fe380000: USB EHCI 1.00
Bus usb@fe3a0000: USB OHCI 1.0
Bus usb@fe3c0000: USB EHCI 1.00
Bus usb@fe3e0000: USB OHCI 1.0
Bus dwc3: Register 2000140 NbrPorts 2
Starting the controller
USB XHCI 1.10
Bus dwc3: Register 2000140 NbrPorts 2
Starting the controller
USB XHCI 1.10
scanning bus usb@fe380000 for devices... 1 USB Device(s) found
scanning bus usb@fe3a0000 for devices... 1 USB Device(s) found
scanning bus usb@fe3c0000 for devices... 1 USB Device(s) found
scanning bus usb@fe3e0000 for devices... 2 USB Device(s) found
scanning bus dwc3 for devices... 1 USB Device(s) found
scanning bus dwc3 for devices... 2 USB Device(s) found
       scanning usb for storage devices... 1 Storage Device(s) found
Hit any key to stop autoboot:  0
=>

Signed-off-by: Marcin Juszkiewicz <marcin@juszkiewicz.com.pl>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-07 19:45:56 +08:00
Tom Rini
23da3c682a Revert "riscv: sifive: fu540: Add gpio-restart support"
As part of merging the next branch in to master, the sifive_fu540 will
fail to link:
riscv64-linux-ld.bfd: lib/built-in.o: in function `panic_finish':
lib/panic.c:28: undefined reference to `do_reset'
make[2]: *** [spl/u-boot-spl] Error 1
make[1]: *** [spl/u-boot-spl] Error 2
make: *** [sub-make] Error 2

And while the "fix the build" option of enabling CONFIG_SPL_SYSRESET may
solve the issue, it is unclear that it is the correct path exactly.  For
the moment, I am reverting this commit and take a "revert the revert"
and proper fix as soon as it's available.

This reverts commit cdae446461.

Cc: Paul Walmsley <paul.walmsley@sifive.com>
Cc: Palmer Dabbelt <palmer@dabbelt.com>
Cc: Anup Patel <anup.patel@wdc.com>
Cc: Atish Patra <atish.patra@wdc.com>
Cc: Bin Meng <bin.meng@windriver.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2020-07-06 17:57:47 -04:00
Patrick Delaunay
27b5b9ec93 video: restore CONFIG_VIDCONSOLE_AS_LCD as boolean
This patch restores CONFIG_VIDCONSOLE_AS_LCD as boolean
and introduce a separate sting as CONFIG_VIDCONSOLE_AS_NAME
to search this string in stdout used as videoconsole.

This patch avoid issue with board defconfig or code expecting
CONFIG_VIDCONSOLE_AS_LCD as boolean.

Fixes: 22b897a123 ("video: extend stdout video console work-around for 'vga'")
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-07-06 16:30:00 -04:00
Tom Rini
6e7d7aa2e2 Merge branch 'next'
Merge all outstanding changes from the current next branch in now that
we have released.
2020-07-06 15:46:38 -04:00
Tom Rini
621e09cb3b Merge tag 'efi-2020-10-rc1' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi into next
Pull request for UEFI sub-system for efi-2020-10-rc1

This series comprises error corrections for the UEFI subsystem:

* correct consideration of timestamps for variable authentication
* correct collection of data regions for code authentication
* correct unit tests to test loading dbx
* enable FAT_WRITE as required by the UEFI spec

The boot manager uses log functions instead of printf() and debug().

The UEFI intialization state is exported.
2020-07-05 18:13:12 -04:00
Tom Rini
df3d0a3f95 Merge branch '2020-07-01-kconfig-etc-updates' into next
- Resync Kconfiglib with the v14.1.0 release.
- Re-sync our <linux/compiler*h> files with v5.7-rc5 from upstream.
- Fully resync checkpatch.pl with v5.7 release.

To safely to all of the above, we have a few bugfixes about functions
that need a 'static inline' but weren't.  We also stop setting
CROSS_COMPILE in arch/*/config.mk.  Finally, with the above changes
boards can now opt-in to optimizing inlining and we do this for the
socfpga stratix10 platform for space savings.
2020-07-05 18:03:32 -04:00
Heinrich Schuchardt
93f6201af7 efi_loader: imply FAT, FAT_WRITE
The UEFI spec requires support for the FAT file system.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-07-03 18:03:56 +02:00
Heinrich Schuchardt
15b1bf10d1 efi_loader: export initialization state
Export the UEFI sub-system initialization state. This will allow to treat
the setting of UEFI variables during and after initialization differently.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-07-03 18:03:56 +02:00
Heinrich Schuchardt
3a92f85f21 efi_loader: rtc_mktime() called twice
Don't call rtc_mktime() twice with the same argument in
efi_variable_authenticate().

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-07-03 18:03:47 +02:00
Heinrich Schuchardt
7a373e5435 efi_loader: use log function in boot manager
When booting via the boot manager use log function for user messages
instead of printf() and debug().

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-07-03 18:03:47 +02:00
Heinrich Schuchardt
cb7116030a efi_loader: time based authentication
When overwriting an existing time base authenticated variable we should
compare to the preceding time value and not to the start of the epoch.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-07-03 18:03:41 +02:00
Heinrich Schuchardt
33f183f68b efi_loader: add missing validation of timestamp
The UEFI specification requires that when UEFI variables are set using time
based authentication we have to check that unused fields of the timestamp
are zero

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-07-03 18:03:41 +02:00
Heinrich Schuchardt
ae54b946ca test: provide tests for efi_image_region_add()
Provide unit tests for efi_image_region_add().

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-07-03 18:03:41 +02:00
Heinrich Schuchardt
28164c925e efi_loader: fix efi_image_region_add()
Use start and end address consistently as half-open interval.
Simplify the code.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-07-03 18:03:24 +02:00
Heinrich Schuchardt
bc246c69ae test: correct time stamps for UEFI authentication
A time authenticated variable cannot be overwritten with another value
with the same time stamp. So we must ensure the correct sequence of time
stamps when generating out test data.

Using parameter -t for sign-efi-sig-list gives reproducible results and
avoids sleep statements.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-07-03 18:00:27 +02:00
AKASHI Takahiro
4edd9ccd94 test/py: efi_secboot: fix test case 1g of test_authvar
In the test case (1g) of test_authvar, "db" is mistakenly used,
and it ends up being the exact same as (1f).
So correct it as "dbx" test case.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-07-03 18:00:27 +02:00
AKASHI Takahiro
bed118fb10 test/py: efi_secboot: remove all "re.search"
Currently, we don't use any regular expression in matching outputs from
U-Boot. Since its use is just redundant, we can remove all.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-07-03 18:00:27 +02:00
AKASHI Takahiro
1b6c08548c efi_loader: image_loader: replace debug to EFI_PRINT
Just for style consistency, replace all the uses of debug() to
EFI_PRINT() in efi_image_loader.c.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-07-03 18:00:27 +02:00
AKASHI Takahiro
ce3c3865b0 efi_loader: variable: replace debug to EFI_PRINT
Just for style consistency, replace all the uses of debug() to
EFI_PRINT in efi_variable.c.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-07-03 18:00:27 +02:00
AKASHI Takahiro
3e9019d481 efi_loader: signature: replace debug to EFI_PRINT
Just for style consistency, replace all the uses of debug to
EFI_PRINT in efi_signature.c

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-07-03 18:00:27 +02:00
AKASHI Takahiro
dc2b473447 Revert "test: stabilize test_efi_secboot"
This reverts commit 5827c25458.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-07-03 18:00:27 +02:00
AKASHI Takahiro
f7a963c6af efi_loader: change efi objects initialization order
The simplest solution to revert the commit b32ac16f9a ("test/py: fix
test_efi_secboot/conftest.py") is to move efi_console_register()
forward before efi_disk_register().

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-07-03 18:00:27 +02:00
Tom Rini
785195941b Merge branch 'next' of https://gitlab.denx.de/u-boot/custodians/u-boot-riscv into next
- Add Sipeed Maix support
- Update clock handler and proper cpu features
2020-07-02 09:53:34 -04:00
Tom Rini
c57383b0c2 checkpatch.pl: Fully re-sync with v5.7
While commit 048a648298 ("checkpatch.pl: Update to v5.7") largely
re-syncs us with checkpatch.pl from v5.7 there are a number of things
missing still.  Re-copy the script and again take care to keep our
allowed debug prints and now localized checks intact.

Fixes: 048a648298 ("checkpatch.pl: Update to v5.7")
Signed-off-by: Tom Rini <trini@konsulko.com>
2020-07-01 11:48:05 -04:00
Tom Rini
61139e2a43 kconfig: show compiler version text in the top comment
This is a side-port of commit 21c54b774744 ("kconfig: show compiler
version text in the top comment") from Linux:

"The kernel configuration phase is now tightly coupled with the compiler
in use.  It will be nice to show the compiler information in Kconfig."

We have already had the required makefile logic for this and had not
included printing the value in various user and file visible places.

Cc: Masahiro Yamada <masahiroy@kernel.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
2020-07-01 11:48:05 -04:00
Tom Rini
9d0087aa0d socfpga: Enable optimized inlining on stratix10
Enable the new CONFIG_OPTIMIZE_INLINING and CONFIG_SPL_OPTIMIZE_INLINING
options for this platform.  With gcc-9.2 from kernel.org this saves us
1784 bytes in U-Boot and 80 bytes in SPL.

Cc: Marek Vasut <marex@denx.de>
Cc: Chin-Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinh.nguyen@intel.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Marek Vasut <marex@denx.de>
2020-07-01 11:48:05 -04:00
Tom Rini
72c4d40d8c compilers: Introduce options for forcing inlining on SPL/TPL
There are cases where when we allow the compiler to decide about making
inline decisions rather than forcing them it can save us space.

For now, we keep the default values for inlining that we have had
historically.

Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2020-07-01 11:48:05 -04:00
Tom Rini
1f1a0f3db3 compiler_types.h: Re-introduce CONFIG_OPTIMIZE_INLINING for U-Boot
In the Linux kernel, support for forcing inline functions to be made
inline, rather than allowing the compiler to make its own choice has
been removed.  With respect to performance, modern GCC (and Clang) do a
good job at deciding when to, or not to, inline code and there are no
run-time requirements in Linux anymore.

There is one downside to this, which is final binary size.  On average
in U-Boot removing this support grows SPL by almost 1 kilobyte.  But
there are cases where it shrinks the binary by making better inline
choices than we had forced.

Start by re-introducing CONFIG_OPTIMIZE_INLINING as a global which
essentially reverts 889b3c1245de ("compiler: remove CONFIG_OPTIMIZE_INLINING entirely")
from Linux.

Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2020-07-01 11:48:05 -04:00
Tom Rini
67f51b40ca compiler*.h: sync include/linux/compiler*.h with Linux 5.7-rc5
Copy these from Linux v5.7-rc5 tag.

This brings in some handy new attributes and is otherwise important to
keep in sync.

We drop the reference to smp_read_barrier_depends() as it is not
relevant on the architectures we support at this time, based on where
it's implemented in Linux today.  We drop the call to kasan_check_read()
as that is not relevant to U-Boot as well.

Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2020-07-01 11:48:05 -04:00
Tom Rini
8214791daa pci: rockchip: Mark inline functions as static inline
Unless we mark the function as 'static inline' it may end up being
non-inlined by the compiled and result in duplicate functions.

Cc: Jagan Teki <jagan@amarulasolutions.com>
Cc: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2020-07-01 11:48:05 -04:00
Tom Rini
6ca300aec0 socfpga: Mark socfpga_fpga_add() as static inline in the non-FPGA case
Unless we mark the function as 'static inline' it may end up being
non-inlined by the compiled and result in duplicate functions.

Cc: Marek Vasut <marex@denx.de>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Marek Vasut <marex@denx.de>
2020-07-01 10:11:03 -04:00
Tom Rini
897860ebc1 x86: Convert from ACCESS_ONCE to READ/WRITE_ONCE
In order to update our <linux/compiler.h> to a newer version that no
longer provides ACCESS_ONCE() but only READ_ONCE()/WRITE_ONCE() we need
to convert arch/x86/include/asm/atomic.h to the other macros.

Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-01 10:11:03 -04:00
Tom Rini
f2ff327e93 tegra: Convert from ACCESS_ONCE to READ/WRITE_ONCE
In order to update our <linux/compiler.h> to a newer version that no
longer provides ACCESS_ONCE() but only READ_ONCE()/WRITE_ONCE() we need
to convert arch/arm/mach-tegra/ivc.c to the other macros.

Cc: Tom Warren <twarren@nvidia.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2020-07-01 10:11:03 -04:00
Tom Rini
443f223675 Don't start ad-hoc games with -Wno-maybe-initialized
Borrowing from Linux commit 78a5255ffb6a ("Stop the ad-hoc games with -Wno-maybe-initialized")
move to have maybe-initialized warnings be handled with building with
W=2 instead of playing more guessing games with newer compilers.

Signed-off-by: Tom Rini <trini@konsulko.com>
2020-07-01 10:11:03 -04:00
Tom Rini
a9610bd8e4 kconfig: Add scripts/Kconfig.include from v4.19
As part of re-syncing our Kconfig logic up to v4.19, we had missed
adding this new file that includes helper macros.  To quote the upstream
commit e1cfdc0e72fc ("kconfig: add basic helper macros to scripts/Kconfig.include"):

Kconfig got text processing tools like we see in Make.  Add Kconfig
helper macros to scripts/Kconfig.include like we collect Makefile
macros in scripts/Kbuild.include.

Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2020-07-01 10:11:03 -04:00
Tom Rini
ddf34e7d3c kconfiglib: Update to the 14.1.0 release
A large number of changes have happened upstream since our last sync
in commit 65e05ddc1a ("kconfiglib: Update to the 12.14.0 release").

The big motivation for this sync is support for user defined macros
within Kconfig.

Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2020-07-01 10:11:03 -04:00
Tom Rini
faf002c0ab Remove CROSS_COMPILE default from arch/*/config.mk
In order to support the compiler providing information used within
Kconfig itself we cannot have the compiler be determined by
arch/*/config.mk as we will not be able to evaluate that yet.  Given
that most documentation tells people to specify CROSS_COMPILE, remove
these references.

Cc: Huan Wang <alison.wang@nxp.com>
Cc: Angelo Dureghello <angelo@sysam.it>
Cc: Michal Simek <monstr@monstr.eu>
Cc: Rick Chen <rick@andestech.com>
Cc: Thomas Chou <thomas@wytron.com.tw>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Michal Simek <michal.simek@xilinx.com>
2020-07-01 10:11:03 -04:00
Sagar Shrikant Kadam
add0dc1f7d riscv: cpu: check and append L1 cache to cpu features
All cpu cores within FU540-C000 having split I/D caches.
Set the L1 cache feature bit using the i-cache-size or d-cache-size
as one of the property from device tree indicating that L1 cache is
present on the cpu core.

=> cpu detail
  1: cpu@1      rv64imafdc
        ID = 1, freq = 999.100 MHz: L1 cache, MMU
  2: cpu@2      rv64imafdc
        ID = 2, freq = 999.100 MHz: L1 cache, MMU
  3: cpu@3      rv64imafdc
        ID = 3, freq = 999.100 MHz: L1 cache, MMU
  4: cpu@4      rv64imafdc
        ID = 4, freq = 999.100 MHz: L1 cache, MMU

Signed-off-by: Sagar Shrikant Kadam <sagar.kadam@sifive.com>
Reviewed-by: Pragnesh Patel <Pragnesh.patel@sifive.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
2020-07-01 15:01:27 +08:00
Sagar Shrikant Kadam
b6b233ddb7 riscv: cpu: correctly handle the setting of CPU_FEAT_MMU bit
The conditional check to read "mmu-type" from the device tree
is not rightly handled due to which the cpu feature doesn't include
CPU_FEAT_MMU even if it's corresponding entry is present in the device
tree.

The initialization of cpu features is now taken care in cpu-uclass
driver, so no need to zero out cpu_freq in riscv_cpu driver and can be
removed.

Signed-off-by: Sagar Shrikant Kadam <sagar.kadam@sifive.com>
Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
2020-07-01 15:01:27 +08:00
Sagar Shrikant Kadam
969251a5a4 uclass: cpu: fix to display proper CPU features
The cmd "cpu detail" fetches uninitialized cpu feature information
and thus displays wrong / inconsitent details as below.
For eg: FU540-C000 doesn't have any microcode, yet the cmd display's it.

=> cpu detail
  1: cpu@1      rv64imafdc
        ID = 1, freq = 999.100 MHz: L1 cache, MMU, Microcode, Device ID
        Microcode version 0x0
        Device ID 0x0
  2: cpu@2      rv64imafdc
        ID = 2, freq = 999.100 MHz: L1 cache, MMU, Microcode, Device ID
        Microcode version 0x0
        Device ID 0x0
  3: cpu@3      rv64imafdc
        ID = 3, freq = 999.100 MHz: L1 cache, MMU, Microcode, Device ID
        Microcode version 0x0
        Device ID 0x0
  4: cpu@4      rv64imafdc
        ID = 4, freq = 999.100 MHz: L1 cache, MMU, Microcode, Device ID
        Microcode version 0x0
        Device ID 0x0

The L1 cache or MMU entry seen above is also displayed inconsistently.
So initialize cpu information to zero into cpu-uclass itself so that
similar issues can be avoided for other CPU drivers.

We now see correct features as:
=> cpu detail
  1: cpu@1      rv64imafdc
        ID = 1, freq = 999.100 MHz
  2: cpu@2      rv64imafdc
        ID = 2, freq = 999.100 MHz
  3: cpu@3      rv64imafdc
        ID = 3, freq = 999.100 MHz
  4: cpu@4      rv64imafdc
        ID = 4, freq = 999.100 MHz

Signed-off-by: Sagar Shrikant Kadam <sagar.kadam@sifive.com>
Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
2020-07-01 15:01:27 +08:00
Sagar Shrikant Kadam
eb75ee4bd6 riscv: dts: hifive-unleashed-a00: add cpu aliases
Add cpu aliases to U-Boot specific dtsi for hifive-unleashed.
Without aliases we see that the CPU device sequence numbers are set
randomly and the cpu list/detail command will show it as follows:
=> cpu list
  1: cpu@1      rv64imafdc
  2: cpu@2      rv64imafdc
  3: cpu@3      rv64imafdc
  0: cpu@4      rv64imafdc

Seems like CPU probing with dm-model also relies on aliases as observed
in case spi. The fu540-c000-u-boot.dtsi has cpu nodes and so adding
corresponding aliases we can ensure that cpu devices are assigned
proper sequence as follows:

=> cpu list
  1: cpu@1      rv64imafdc
  2: cpu@2      rv64imafdc
  3: cpu@3      rv64imafdc
  4: cpu@4      rv64imafdc

Signed-off-by: Sagar Shrikant Kadam <sagar.kadam@sifive.com>
Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
2020-07-01 15:01:27 +08:00
Sean Anderson
a7c81fc853 riscv: Add Sipeed Maix support
The Sipeed Maix series is a collection of boards built around the RISC-V
Kendryte K210 processor. This processor contains several peripherals to
accelerate neural network processing and other "ai" tasks. This includes a
"KPU" neural network processor, an audio processor supporting beamforming
reception, and a digital video port supporting capture and output at VGA
resolution. Other peripherals include 8M of sram (accessible with and
without caching); remappable pins, including 40 GPIOs; AES, FFT, and SHA256
accelerators; a DMA controller; and I2C, I2S, and SPI controllers. Maix
peripherals vary, but include spi flash; on-board usb-serial bridges; ports
for cameras, displays, and sd cards; and ESP32 chips. Currently, only the
Sipeed Maix Bit V2.0 (bitm) is supported, but the boards are fairly
similar.

Documentation for Maix boards is located at
<http://dl.sipeed.com/MAIX/HDK/>.  Documentation for the Kendryte K210 is
located at <https://kendryte.com/downloads/>. However, hardware details are
rather lacking, so most technical reference has been taken from the
standalone sdk located at
<https://github.com/kendryte/kendryte-standalone-sdk>.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
2020-07-01 15:01:22 +08:00
Sean Anderson
de09f71108 doc: riscv: Add documentation for Sipeed Maix Bit
This patch adds documentation for the Sipeed Maix bit, and more generally
for the Kendryte K210 processor.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
2020-07-01 15:01:22 +08:00
Sean Anderson
bba8618c8e riscv: Add device tree for K210 and Sipeed Maix BitM
Where possible, I have tried to find compatible drivers based on the layout
of registers. However, many devices remain untested. All untested devices
have been left disabled, but some tentative properties (such as compatible
strings, and clocks, interrupts, and resets properties) have been added.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
2020-07-01 15:01:22 +08:00
Sean Anderson
627718626b riscv: Enable cpu clock if it is present
The cpu clock is probably already enabled if we are executing code (though
we could be executing from a different core). This patch prevents the cpu
clock or its parents from being disabled.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-01 15:01:22 +08:00
Sean Anderson
ab24017a19 riscv: Try to get cpu frequency from a "clocks" node if it exists
Instead of always using the "clock-frequency" property to determine cpu
frequency, try using a clock in "clocks" if it exists. This patch also
fixes a bug where there could be spurious higher frequencies if sizeof(u32)
!= sizeof(ulong).

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-01 15:01:22 +08:00
Sean Anderson
958a3f464c riscv: Allow use of reset drivers
Currently, one cannot use a reset driver on RISC-V. Follow the MIPS
example, and disable the default reset handler when the sysreset driver is
enabled.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-01 15:01:22 +08:00
Sean Anderson
b8bc120927 riscv: Add option to support RISC-V privileged spec 1.9
Some older processors (notably the Kendryte K210) use an older version of
the RISC-V privileged specification. The primary changes between the old
and new are in virtual memory, and in the merging of three separate counter
enable CSRs.  Using the new CSR on an old processor causes an illegal
instruction exception.  This patch adds an option to use the old CSRs
instead of the new one.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-01 15:01:22 +08:00
Sean Anderson
40686c394e riscv: Clean up IPI initialization code
The previous IPI code initialized the device whenever the first call was
made to a riscv_*_ipi function. This made it difficult to determine when
the IPI device was initialized. This patch introduces a new function
riscv_init_ipi. It is called once during arch_cpu_init_dm. In SPL, it is
called in spl_invoke_opensbi. Before this point, no riscv_*_ipi functions
should be called.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
2020-07-01 15:01:22 +08:00
Sean Anderson
9472630337 riscv: Clear pending interrupts before enabling IPIs
On some platforms (k210), the previous stage bootloader may have not
cleared pending IPIs before transferring control to U-Boot. This can cause
race conditions, as multiple harts all attempt to initialize the IPI
controller at once. This patch clears IPIs before enabling them, ensuring
that only one hart modifies shared memory at once.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
2020-07-01 15:01:21 +08:00
Sean Anderson
309c79f3de riscv: Add headers for asm/global_data.h
This header depended on bd_t and ulong, but did not include the appropriate
headers.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-01 15:01:21 +08:00
Sean Anderson
60ffcf218f lib: Always set errno in hcreate_r
This could give a confusing error message if it failed and didn't set
errno.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-01 15:01:21 +08:00
Sean Anderson
038b13ee81 reset: Add generic reset driver
This patch adds a generic reset driver. It is designed to be useful when
one has a register in a regmap which contains bits that reset other
devices. I thought this seemed like a very generic use, so here is a
generic driver. The overall structure has been modeled on the syscon-reboot
driver.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-01 15:01:21 +08:00
Sean Anderson
082faeb865 dm: Fix error handling for dev_read_addr_ptr
dev_read_addr_ptr had different semantics depending on whether OF_LIVE was
enabled. This patch converts both implementations to return NULL on error,
and converts all call sites which check for FDT_ADDR_T_NONE to check for
NULL instead. This patch also removes the call to map_physmem, since we
have dev_remap_addr* for those semantics.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-01 15:01:21 +08:00
Sean Anderson
4a3390f1d3 dm: Add support for simple-pm-bus
This type of bus is used in Linux to designate buses which have power
domains and/or clocks which need to be enabled before their child devices
can be used. Because power domains are automatically enabled before probing
in U-Boot, we just need to enable any clocks present.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-01 15:01:21 +08:00
Sean Anderson
f9c7d4f99f clk: Add K210 clock support
Due to the large number of clocks, I decided to use the CCF. The overall
structure is modeled after the imx code. Clocks parameters are stored in
several arrays, and are then instantiated at run-time. There are some
translation macros (FOOIFY()) which allow for more dense packing.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
CC: Lukasz Majewski <lukma@denx.de>
2020-07-01 15:01:21 +08:00
Sean Anderson
1a198cf886 clk: Add a bypass clock for K210
This is a small driver to do a software bypass of a clock if hardware
bypass is not working. I have tried to write this in a generic fashion, so
that it could be potentially broken out of the kendryte code at some future
date. For the K210, it is used to have aclk bypass pll0 and use in0 instead
so that the CPU keeps on working.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
CC: Lukasz Majewski <lukma@denx.de>
2020-07-01 15:01:21 +08:00
Sean Anderson
019ef9a3f3 clk: Add K210 pll support
This pll code is primarily based on the code from the kendryte standalone
sdk in lib/drivers/sysctl.c. k210_pll_calc_config is roughly analogous to
the algorithm used to set the pll frequency, but it has been completely
rewritten to be fixed-point based.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
CC: Lukasz Majewski <lukma@denx.de>
2020-07-01 15:01:21 +08:00
Sean Anderson
675d79073c clk: Fix clk_get_by_* handling of index
clk_get_by_index_nodev only ever fetched clock 1, due to passing a boolean
predicate instead of the index. Other clk_get_by_* functions got the clock
correctly, but passed a predicate instead of the index to clk_get_by_tail.
This could lead to confusing error messages.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
CC: Lukasz Majewski <lukma@denx.de>
2020-07-01 15:01:21 +08:00
Sean Anderson
5e8317a9fa clk: Check that ops of composite clock components exist before calling
clk_composite_ops was shared between all devices in the composite clock
driver.  If one clock had a feature (such as supporting set_parent) which
another clock did not, it could call a null pointer dereference.

This patch does three things
1. It adds null-pointer checks to all composite clock functions.
2. It makes clk_composite_ops const and sets its functions at compile-time.
3. It adds some basic sanity checks to num_parents.

The combined effect of these changes is that any of mux, rate, or gate can
be NULL, and composite clocks will still function normally. Previously, at
least mux had to exist, since clk_composite_get_parent was used to
determine the parent for clk_register.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Acked-by: Lukasz Majewski <lukma@denx.de>
2020-07-01 15:01:21 +08:00
Sean Anderson
78ce0bd3ac clk: Always use the supplied struct clk
CCF clocks should always use the struct clock passed to their methods for
extracting the driver-specific clock information struct. Previously, many
functions would use the clk->dev->priv if the device was bound. This could
cause problems with composite clocks. The individual clocks in a composite
clock did not have the ->dev field filled in. This was fine, because the
device-specific clock information would be used. However, since there was
no ->dev, there was no way to get the parent clock. This caused the
recalc_rate method of the CCF divider clock to fail. One option would be to
use the clk->priv field to get the composite clock and from there get the
appropriate parent device. However, this would tie the implementation to
the composite clock. In general, different devices should not rely on the
contents of ->priv from another device.

The simple solution to this problem is to just always use the supplied
struct clock. The composite clock now fills in the ->dev pointer of its
child clocks.  This allows child clocks to make calls like clk_get_parent()
without issue.

imx avoided the above problem by using a custom get_rate function with
composite clocks.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Acked-by: Lukasz Majewski <lukma@denx.de>
2020-07-01 15:01:21 +08:00
Tom Rini
e2a4d24e6b Merge branch '2020-06-30-minor-TI-board-updates' into next
- Minor updates to some platforms I am the listed maintainer of.
  Notably this removes the ti814x_evm which stopped building with the PXA
  MMC migration series (oops) but hasn't been functional in some time.
2020-06-30 15:03:25 -04:00
Tom Rini
50b5326868 ti814x: Remove platform
The TI814x (DM814x) platform is rather old and in need of a lot of
migration work.  As much of that work is well past the deadline, remove
this platform.

Signed-off-by: Tom Rini <trini@konsulko.com>
2020-06-30 15:02:45 -04:00
Tom Rini
9ccd840cca ti816x_evm: Enable DM_MMC
This platform is already using DM in general and the MMC controller is
the early generation of what is compatible with "ti,omap4-hsmmc" so
enable DM_MMC (which in turn gets BLK enabled).

Signed-off-by: Tom Rini <trini@konsulko.com>
2020-06-30 15:02:45 -04:00
Tom Rini
a3e7750d58 am335x: Update list of defconfigs
Both the am335x_boneblack and am335x_evm_usbspl configs have been gone
for a while, remove their entries from MAINTAINERS.

Signed-off-by: Tom Rini <trini@konsulko.com>
2020-06-30 13:09:26 -04:00
Tom Rini
5fdb3c0e7e Merge tag 'mips-pull-2020-06-29' of https://gitlab.denx.de/u-boot/custodians/u-boot-mips into next
- net: pcnet: cleanup and add DM support
- Makefile: add rule to build an endian-swapped U-Boot image
  used by MIPS Malta EL variants
- CI: add Qemu tests for MIPS Malta
2020-06-30 11:43:18 -04:00
Tom Rini
6b3c74428a Merge branch '2020-06-30-pxa-dm_mmc-migration' into next
- Migrate the PXA MMC driver to driver model.
2020-06-30 11:14:41 -04:00
Marcel Ziswiler
3c4aeaf7dc colibri_pxa270_defconfig: enable dm_mmc
Enable CONFIG_DM_MMC.

Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@toradex.com>
2020-06-30 11:13:23 -04:00
Marcel Ziswiler
3450f626ba colibri_pxa270: add mmc platform data
Add MMC platform data.

While at it also fix trivial checkpatch.pl issues.

Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
2020-06-30 11:13:11 -04:00
Marcel Ziswiler
885b3cdd15 colibri_pxa270_defconfig: enable cmd_dm
Enable CONFIG_CMD_DM.

Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
2020-06-30 11:13:11 -04:00
Marcel Ziswiler
290e6bb958 arm: pxa: mmc: add driver model support
Add driver model (DM) support.

Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
2020-06-30 11:13:11 -04:00
Marcel Ziswiler
9b515a81be kconfig: mmc: move pxa_mmc_generic to kconfig
Move CONFIG_PXA_MMC_GENERIC to Kconfig.

Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-06-30 11:13:11 -04:00
Marcel Ziswiler
45224e8f26 dm: core: gracefully handle alias seq without of
Gracefully handle alias seq in the platform data rather than OF case.

Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
2020-06-30 11:12:28 -04:00
Marcel Ziswiler
f992af81e9 Makefile: allow dm_mmc without of_control
Allow for CONFIG_DM_MMC with platform data rather than
CONFIG_OF_CONTROL.

Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
2020-06-30 11:12:28 -04:00
Marcel Ziswiler
4d3053a347 serial: pxa: clean-up platform data include file
Clean-up platform data include file by using BIT macro and converting
indentation with spaces to tabs.

Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
2020-06-30 11:12:28 -04:00
Marcel Ziswiler
f5624b1045 mmc: add missing space before comment delimiter
Add missing space before a comment delimiter.

Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@toradex.com>
2020-06-30 11:12:27 -04:00
Daniel Schwierzeck
e35c2a8fdd .azure-pipelines.yml: add Qemu tests for MIPS Malta board
Add Qemu tests for the MIPS Malta machine as a replacement for
the deprecated generic MIPS machine.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2020-06-29 22:40:16 +02:00
Daniel Schwierzeck
d985aaa58e .travis.yml: add Qemu tests for MIPS Malta board
Add Qemu tests for the MIPS Malta machine as a replacement for
the deprecated generic MIPS machine.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2020-06-29 22:36:36 +02:00
Daniel Schwierzeck
d8533167f5 .gitlab-ci.yml: add Qemu tests for MIPS Malta board
Add Qemu tests for the MIPS Malta machine as a replacement for
the deprecated generic MIPS machine.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2020-06-29 22:36:36 +02:00
Daniel Schwierzeck
5467434cc1 mips: malta: build u-boot-swap.bin
The Qemu Malta machine expects the firmware in Big-Endian byte order.
Therefore the Little-Endian variants of the Malta board needs to
be byte swapped.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2020-06-29 22:36:36 +02:00
Daniel Schwierzeck
b8cecd0c15 Makefile: add rule to generate u-boot-swap.bin
This rule generates an u-boot binary file where the byte endianness
is swapped. This will be used by the MIPS Malta Little-Endian variants
to be able to boot with Qemu. The Qemu Malta Machine expects the
firmware in Big-Endian order.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2020-06-29 22:36:36 +02:00
Daniel Schwierzeck
753a8922f8 tools: add script for byte endianness swapping
This can be used to swap the byte endianness of a binary file
from Little-Endian to Big-Endian or vice-versa.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2020-06-29 22:36:35 +02:00
Marek Vasut
d8553d6ee3 net: pcnet: Add Kconfig entries
Add Kconfig entries for the pcnet driver and convert MIPS malta
to use those.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-29 22:36:35 +02:00
Marek Vasut
53019cf35b net: pcnet: Add DM support
With all the changes in place, add support for DM into the
pcnet driver.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-29 22:36:35 +02:00
Marek Vasut
f5e7df58e0 net: pcnet: Split common and non-DM functions
Pull the common parts of functions out so they can be reused by both
DM and non-DM code paths. The recv() function had to be reworked to
fit into this scheme and this means it now only receives one packet
at a time instead of spinning in an endless loop.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-29 22:36:35 +02:00
Marek Vasut
6d76c9f1e6 net: pcnet: Wrap name and enetaddr into private data
Instead of using the non-DM-only name and enetaddr in struct eth_device,
add pointers into the private data which can either point to that non-DM
name or a DM one later on.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-29 22:36:35 +02:00
Marek Vasut
deca773821 net: pcnet: Wrap iobase into private data
Instead of using the non-DM-only iobase in struct eth_device, add
one into the private data to make DM and non-DM operation possible.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-29 22:36:35 +02:00
Marek Vasut
834d5cebe5 net: pcnet: Pass private data through dev->priv
Get rid of the global point to private data, and rather pass it
thought dev->priv. Also remove the unnecessary check for lp being
non-NULL, since it is always NULL at this point.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-29 22:36:35 +02:00
Marek Vasut
ab6ecbdc3c net: pcnet: Wrap devbusfn into private data
Instead of using eth_device priv for this PCI devbusfn, free it
so it could be used for driver private data, and wrap devbusfn
into those driver private data.

Note that using the name dev for the variable is a trick left for
later, when DM support is in place, so dm_pci_virt_to_mem() can be
used with minimal ifdeffery.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-29 22:36:35 +02:00
Marek Vasut
553286a63c net: pcnet: Drop useless forward declarations
Remove those as they are not needed anymore.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-29 22:36:35 +02:00
Marek Vasut
54c6067486 net: pcnet: Move initialize function at the end
Move the function at the end of the driver, so we could drop
various forward declarations later. No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-29 22:36:35 +02:00
Marek Vasut
ada6a2cea5 net: pcnet: Move private data allocation to initialize
The private data allocation does not have to be done every time the
NIC is initialized at run time, move the allocation to initialize
function, which means it will be done only once when the driver
starts.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-29 22:36:35 +02:00
Marek Vasut
0e11d79a53 net: pcnet: Replace memset+malloc with calloc
This combination of functions can be replaced with calloc(),
make it so.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-29 22:36:35 +02:00
Marek Vasut
89369b0ac2 net: pcnet: Simplify private data allocation
The current code is horribly complex. Both the RX and TX buffer
descriptors are 16 bytes in size, the init block is 32 bytes in
size, so simplify the code such that the entire private data of
the driver are allocated cache aligned and the RX and TX buffer
descriptors are part of the private data.

This removes multiple malloc calls and cache flushes.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-29 22:36:35 +02:00
Marek Vasut
d3b1df0f39 net: pcnet: Use PCI_DEVICE() to define PCI device compat list
Use this macro to fully fill the PCI device ID table. This is mandatory
for the DM PCI support, which checks all the fields.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-29 22:36:35 +02:00
Marek Vasut
b92b8f48fb net: pcnet: Drop PCNET_HAS_PROM
All of one PCNET users has this option set, make this default
and drop this config option.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-29 22:36:35 +02:00
Marek Vasut
b9c52c5090 net: pcnet: Drop typedef struct pcnet_priv_t
Use struct pcnet_priv all over the place instead.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-29 22:36:35 +02:00
Tom Rini
50c9b0e1dd Merge branch '2020-06-26-more-Kconfig-migration' into next
- Bring in the first pass at cleaning up config headers that reference
  symbols that already have Kconfig symbols.
- In order to do that, bring in the small series that adds
  CONFIG_SPL_DM_SPI_FLASH and makes more use of CONFIG_$(SPL_TPL_)DM_SPI
  in order to allow for disabling those features in SPL stuff but using
  them in full U-Boot
2020-06-29 15:58:38 -04:00
Lukasz Majewski
2896422706 spi: Move DM_SPI_FLASH and SPI_FLASH_DATAFLASH to Kconfig (for ls1021aXXX)
This patch moves the CONFIG_DM_SPI_FLASH and CONFIG_SPI_FLASH_DATAFLASH
to be defined in Kconfig, not in board specific header file
(include/configs/<board>.h).

Before this change the CONFIG_DM_SPI_FLASH was not set in .config (so it
was not possible to use CONFIG_IS_ENABLED(DM_SPI_FLASH) in SPI DM/DTS
converted drivers), but it was set in u-boot.cfg file.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
2020-06-29 13:34:43 -04:00
Lukasz Majewski
044a66cb83 spi: Move DM_SPI_FLASH to Kconfig (for NXP's ls1043a)
This patch fixes issue with defining the DM_SPI_FLASH in the
configs/include/<board.h> instead of enabling this option in Kconfig.

The problem is that CONFIG_IS_ENABLED(DM_SPI_FLASH) shows false as there
is no DM_SPI_FLASH=y in .config (but the define is set in u-boot.cfg).

As a result conversion of DM_SPI_FLASH to using CONFIG_IS_ENABLED() is not
working properly.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
2020-06-29 13:34:43 -04:00
Tom Rini
582b4f7f39 Convert CONFIG_CADENCE_QSPI to Kconfig
This converts the following to Kconfig:
   CONFIG_CADENCE_QSPI

Signed-off-by: Tom Rini <trini@konsulko.com>
2020-06-29 13:34:43 -04:00
Lukasz Majewski
56c4046038 spi: Convert CONFIG_DM_SPI* to CONFIG_$(SPL_TPL_)DM_SPI*
This change allows more fine tuning of driver model based SPI support in
SPL and TPL. It is now possible to explicitly enable/disable the DM_SPI
support in SPL and TPL via Kconfig option.

Before this change it was necessary to use:
    /* SPI Flash Configs */
    #if defined(CONFIG_SPL_BUILD)
    #undef CONFIG_DM_SPI
    #undef CONFIG_DM_SPI_FLASH
    #undef CONFIG_SPI_FLASH_MTD
    #endif

in the ./include/configs/<board>.h, which is error prone and shall be
avoided when we strive to switch to Kconfig.

The goal of this patch:

Provide distinction for DM_SPI support in both U-Boot proper and SPL (TPL).
Valid use case is when U-Boot proper wants to use DM_SPI, but SPL must
still support non DM driver.

Another use case is the conversion of non DM/DTS SPI driver to support
DM/DTS. When such driver needs to work in both SPL and U-Boot proper, the
distinction is needed in Kconfig (also if SPL version of the driver
supports OF_PLATDATA).

In the end of the day one would have to support following use cases (in
single driver file - e.g. mxs_spi.c):

- U-Boot proper driver supporting DT/DTS
- U-Boot proper driver without DT/DTS support (deprecated)
- SPL driver without DT/DTS support
- SPL (and TPL) driver with DT/DTS (when the SoC has enough resources to
  run full blown DT/DTS)
- SPL driver with DT/DTS and SPL_OF_PLATDATA (when one have constrained
  environment with no fitImage and OF_LIBFDT support).

Some boards do require SPI support (with DM) in SPL (TPL) and some only
have DM_SPI{_FLASH} defined to allow compiling SPL.

This patch converts #ifdef CONFIG_DM_SPI* to #if CONFIG_IS_ENABLED(DM_SPI)
and provides corresponding defines in Kconfig.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Tested-by: Adam Ford <aford173@gmail.com> #da850-evm
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
[trini: Fixup a few platforms]
Signed-off-by: Tom Rini <trini@konsulko.com>
2020-06-29 13:34:43 -04:00
Tom Rini
c87f9ce227 x86: Don't build some unused objects in TPL
In the future if we have separate symbols for DM_SPI_FLASH and
SPL_DM_SPI_FLASH we will not always have function declarations available
for some DM calls.  This in turn leads to build warnings but not
failures as the code isn't used and is discarded at link time.
Restructure things to not build code we won't use for TPL anyways.

Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
2020-06-29 13:34:43 -04:00
Tom Rini
8f74e659c4 spi: Enable missing CONFIG_SPL_DM_SPI support
Due to how the Makefile logic is we currently get DM_SPI support in SPL
enabled by having DM_SPI enabled for full U-Boot but not having
CONFIG_SPL_DM_SPI set.  Add this missing option to boards that were
inadvertently making use of it.

Cc: Adam Ford <aford173@gmail.com>
Cc: Akash Gajjar <akash@openedev.com>
Cc: Anatolij Gustschin <agust@denx.de>
Cc: Andy Yan <andy.yan@rock-chips.com>
Cc: Anup Patel <anup.patel@wdc.com>
Cc: Atish Patra <atish.patra@wdc.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Chee Hong Ang <chee.hong.ang@intel.com>
Cc: Chin-Liang See <clsee@altera.com>
Cc: Dalon Westergreen <dwesterg@gmail.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Eugen Hristev <eugen.hristev@microchip.com>
Cc: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Jagan Teki <jagan@amarulasolutions.com>
Cc: Klaus Goger <klaus.goger@theobroma-systems.com>
Cc: Levin Du <djw@t-chip.com.cn>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
Cc: Lokesh Vutla <lokeshvutla@ti.com>
Cc: Luca Ceresoli <luca@lucaceresoli.net>
Cc: Marek Vasut <marex@denx.de>
Cc: Michal Simek <monstr@monstr.eu>
Cc: Mike Looijmans <mike.looijmans@topic.nl>
Cc: Nicolas Ferre <nicolas.ferre@microchip.com>
Cc: Nikita Kiryanov <nikita@compulab.co.il>
Cc: Palmer Dabbelt <palmer@dabbelt.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: Paul Walmsley <paul.walmsley@sifive.com>
Cc: Pavel Machek <pavel@denx.de>
Cc: Peter Robinson <pbrobinson@gmail.com>
Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefan Roese <sr@denx.de>
Cc: Suniel Mahesh <sunil@amarulasolutions.com>
Cc: Vitaly Andrianov <vitalya@ti.com>
Cc: Wolfgang Grandegger <wg@aries-embedded.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Luca Ceresoli <luca@lucaceresoli.net>
2020-06-26 10:29:27 -04:00
Tom Rini
2254f13216 Kconfig: Remove CONFIG_CLOCKS_IN_MHZ
This variable is unset anywhere and only unset on a number of platforms.
Remove all relevant code.

Signed-off-by: Tom Rini <trini@konsulko.com>
2020-06-26 10:29:26 -04:00
Tom Rini
f399e838cf Convert CONFIG_BOOTM_NETBSD to Kconfig
This converts the following to Kconfig:
   CONFIG_BOOTM_NETBSD

Signed-off-by: Tom Rini <trini@konsulko.com>
2020-06-26 10:29:06 -04:00
Tom Rini
7d80a9cd92 arm: imx: Finish migration of CONFIG_CSF_SIZE to Kconfig
While in most cases CSF_SIZE is handled via Kconfig we have some i.MX8M
platforms that set the size based on the now-renamed CONFIG_SECURE_BOOT
symbol.  Update things so that CSF_SIZE itself depends on IMX_HAB being
enabled and provide the default value for i.MX8M family of parts.

Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Ye Li <ye.li@nxp.com>
Cc: NXP i.MX U-Boot Team <uboot-imx@nxp.com>
Fixes: d714a75fd4 ("imx: replace CONFIG_SECURE_BOOT with CONFIG_IMX_HAB")
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Reviewed-by: Ye Li <ye.li@nxp.com>
2020-06-26 10:29:06 -04:00
Tom Rini
bba4c7f952 nxp: Finish switch to CONFIG_NXP_ESBC
There are two remaining users of the CONFIG_SECURE_BOOT symbol that have
not been migrated to another symbol.  In this case, they should be using
CONFIG_NXP_ESBC as their guard.

Cc: Vladimir Oltean <olteanv@gmail.com>
Fixes: 5536c3c9d0 ("freescale/layerscape: Rename the config CONFIG_SECURE_BOOT name")
Signed-off-by: Tom Rini <trini@konsulko.com>
2020-06-26 10:29:06 -04:00
Tom Rini
0567099bea arm: imx: Finish migration from CONFIG_SECURE_BOOT to CONFIG_IMX_HAB
There are a few remaining places where we say CONFIG_SECURE_BOOT rather
than CONFIG_IMX HAB.  Update these instances.

Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: NXP i.MX U-Boot Team <uboot-imx@nxp.com>
Cc: Eddy Petrișor <eddy.petrisor@gmail.com>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Priyanka Jain <priyanka.jain@nxp.com>
Fixes: d714a75fd4 ("imx: replace CONFIG_SECURE_BOOT with CONFIG_IMX_HAB")
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
2020-06-26 10:29:06 -04:00
Tom Rini
f23476f0ba Convert CONFIG_CONSOLE_SCROLL_LINES to Kconfig
This converts the following to Kconfig:
   CONFIG_CONSOLE_SCROLL_LINES

Signed-off-by: Tom Rini <trini@konsulko.com>
2020-06-26 10:29:06 -04:00
Tom Rini
bc209fbba5 arm: toradex: Convert CONFIG_CONSOLE_MUX to Kconfig
This converts the following to Kconfig:
   CONFIG_CONSOLE_MUX

Cc: Igor Opaniuk <igor.opaniuk@toradex.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@toradex.com>
2020-06-26 10:29:06 -04:00
Tom Rini
1ca87f94b2 Convert CONFIG_CONS_INDEX to Kconfig
This converts the following to Kconfig:
   CONFIG_CONS_INDEX

Signed-off-by: Tom Rini <trini@konsulko.com>
2020-06-26 10:29:06 -04:00
Tom Rini
75bdd53d6c Convert CONFIG_CMDLINE_EDITING to Kconfig
This converts the following to Kconfig:
   CONFIG_CMDLINE_EDITING

Signed-off-by: Tom Rini <trini@konsulko.com>
2020-06-26 10:29:06 -04:00
Tom Rini
54d865b8db Convert CONFIG_BUILD_TARGET to Kconfig
This converts the following to Kconfig:
   CONFIG_BUILD_TARGET

Signed-off-by: Tom Rini <trini@konsulko.com>
2020-06-26 10:29:06 -04:00
Tom Rini
a51cff256a Convert CONFIG_BOUNCE_BUFFER to Kconfig
This converts the following to Kconfig:
   CONFIG_BOUNCE_BUFFER

Signed-off-by: Tom Rini <trini@konsulko.com>
2020-06-26 10:29:06 -04:00
Tom Rini
e2dce7a532 Convert CONFIG_BOOTP_DNS2 to Kconfig
This converts the following to Kconfig:
   CONFIG_BOOTP_DNS2
   CONFIG_BOOTP_PXE_CLIENTARCH

Signed-off-by: Tom Rini <trini@konsulko.com>
2020-06-26 10:29:05 -04:00
Tom Rini
40930837ab arm: abb secu1: Convert CONFIG_BOOTDELAY to Kconfig
This converts the following to Kconfig:
   CONFIG_BOOTDELAY

Cc: Holger Brunck <holger.brunck@ch.abb.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2020-06-26 10:29:05 -04:00
Tom Rini
53355d53a4 arm: capricorn: Convert CONFIG_BOOTCOUNT_ENV et al to Kconfig
This converts the following to Kconfig:
   CONFIG_BOOTCOUNT_ENV
   CONFIG_BOOTCOUNT_LIMIT

Cc: Anatolij Gustschin <agust@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
2020-06-26 10:29:05 -04:00
Tom Rini
05369e417f Convert CONFIG_BOARD_TYPES to Kconfig
This converts the following to Kconfig:
   CONFIG_BOARD_TYPES

Signed-off-by: Tom Rini <trini@konsulko.com>
2020-06-26 10:29:05 -04:00
Tom Rini
103354d60d Convert CONFIG_BCH to Kconfig
This converts the following to Kconfig:
   CONFIG_BCH

Signed-off-by: Tom Rini <trini@konsulko.com>
2020-06-26 10:29:05 -04:00
Tom Rini
44a666a848 Convert CONFIG_BOOTARGS to Kconfig
This converts the following to Kconfig:
   CONFIG_BOOTARGS

Signed-off-by: Tom Rini <trini@konsulko.com>
2020-06-26 10:29:05 -04:00
Tom Rini
eabbf801c6 Convert CONFIG_BOARD_EARLY_INIT_F et al to Kconfig
This converts the following to Kconfig:
   CONFIG_BOARD_EARLY_INIT_F
   CONFIG_BOARD_EARLY_INIT_R

Signed-off-by: Tom Rini <trini@konsulko.com>
2020-06-26 10:29:05 -04:00
Tom Rini
11af95a02a Convert CONFIG_BAUDRATE to Kconfig
This converts the following to Kconfig:
   CONFIG_BAUDRATE

Signed-off-by: Tom Rini <trini@konsulko.com>
2020-06-26 10:29:05 -04:00
Tom Rini
b120665fe9 bk4r1: Re-convert CONFIG_AUTOBOOT_PROMPT et al to Kconfig
This converts the following to Kconfig:
   CONFIG_AUTOBOOT_PROMPT
   CONFIG_AUTOBOOT_KEYED
   CONFIG_AUTOBOOT_STOP_STR

Signed-off-by: Tom Rini <trini@konsulko.com>
2020-06-26 10:29:05 -04:00
Tom Rini
f61e2e414c Convert CONFIG_ATMEL_USART to Kconfig
This converts the following to Kconfig:
   CONFIG_ATMEL_USART

Signed-off-by: Tom Rini <trini@konsulko.com>
2020-06-26 10:29:05 -04:00
Tom Rini
4e361cc2e4 Convert CONFIG_ATMEL_NAND_HW_PMECC et al to Kconfig
This converts the following to Kconfig:
   CONFIG_ATMEL_NAND_HW_PMECC
   CONFIG_ATMEL_NAND_HWECC
   CONFIG_NAND_ATMEL
   CONFIG_PMECC_CAP
   CONFIG_PMECC_SECTOR_SIZE

Signed-off-by: Tom Rini <trini@konsulko.com>
2020-06-26 10:29:05 -04:00
Tom Rini
a60becc8c7 Convert CONFIG_ATMEL_HLCD to Kconfig
This converts the following to Kconfig:
   CONFIG_ATMEL_HLCD

Signed-off-by: Tom Rini <trini@konsulko.com>
2020-06-26 10:29:04 -04:00
Tom Rini
348d183e54 Convert CONFIG_AT91_GPIO to Kconfig
This converts the following to Kconfig:
   CONFIG_AT91_GPIO

Signed-off-by: Tom Rini <trini@konsulko.com>
2020-06-26 10:29:04 -04:00
Tom Rini
b40fa97286 Convert CONFIG_ARM_PL180_MMCI to Kconfig
This converts the following to Kconfig:
   CONFIG_ARM_PL180_MMCI

Signed-off-by: Tom Rini <trini@konsulko.com>
2020-06-26 10:29:04 -04:00
Tom Rini
295ab895e3 Convert CONFIG_ARCH_MISC_INIT to Kconfig
This converts the following to Kconfig:
   CONFIG_ARCH_MISC_INIT

Signed-off-by: Tom Rini <trini@konsulko.com>
2020-06-26 10:29:04 -04:00
Tom Rini
0735ac8522 Convert CONFIG_AM335X_LCD to Kconfig
This converts the following to Kconfig:
   CONFIG_AM335X_LCD

Signed-off-by: Tom Rini <trini@konsulko.com>
2020-06-26 10:29:04 -04:00
Tom Rini
04f005d552 Merge branch '2020-06-25-tidy-up-bd-command' into next
- Tidy up the 'bdinfo' command so that it's both consistent for all
  architectures and sharing as much code as possible.
2020-06-25 18:15:50 -04:00
Simon Glass
c68a1ae6ab bdinfo: x86: vesa: Update fb_base to the correct value
Set this value in global_data so that it is reported correctly on x86
boards.

In fact, U-Boot allocates space for the frame buffer even though it is not
used. Then the FSP picks the address itself (e.g. 0xb0000000). So the
value set by U-Boot (high in memory with everything else that is
relocated), is not actually the correct value.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-06-25 13:24:13 -04:00
Simon Glass
aef43ea060 bdinfo: dm: Update fb_base when using driver model
Update this value with the address of a video device so that it shows with
the 'bd' command.

It would be better to obtain the address from the uclass by looking in
struct video_uc_platdata for each device. We can move over to that once
DM_VIDEO migration is complete.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-06-25 13:24:13 -04:00
Simon Glass
bda8909fcc bdinfo: Update the file comments
Update the comment at the top of the file to indicate what this file does.
Also drop the line at the bottom and an unnecessary header include.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-06-25 13:24:13 -04:00
Simon Glass
64791981eb bdinfo: m68k: ppc: Move arch-specific code from bdinfo
We don't have an easy way to share these three lines of code with two
architectures. We also want to make it clear that this code is actually
arch-specific.

So just duplicate it in each arch-specific file.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-06-25 13:24:13 -04:00
Simon Glass
1a520d949b bdinfo: m68k: Move m68k-specific info into its own file
We don't really want to have m68k-specific code in a generic file. Create
a new arch-specific function to hold it, and move it into that.

Make the function weak so that any arch can implement it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Angelo Dureghello <angelo.dureghello@timesys.com>
Tested-by: Angelo Dureghello <angelo.dureghello@timesys.com>
2020-06-25 13:24:12 -04:00
Simon Glass
79d074d301 bdinfo: ppc: Move PPC-specific info into its own file
We don't really want to have PPC-specific code in a generic file. Create
a new arch-specific function to hold it, and move it into that.

Make the function weak so that any arch can implement it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-06-25 13:24:12 -04:00
Simon Glass
59b0d7d839 bdinfo: arm: Move ARM-specific info into its own file
We don't really want to have ARM-specific code in a generic file. Create
a new arch-specific function to hold it, and move it into that.

Make the function weak so that any arch can implement it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-06-25 13:24:12 -04:00
Simon Glass
655f17ff7d bdinfo: Export some basic printing functions
At present the functions to print a number and a frequency are static. We
want to move some of the code in here to an arch-specific file. For
consistency that code should use these same functions. So export them with
an appropriate name.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-06-25 13:24:12 -04:00
Simon Glass
8a2ba581dc bdinfo: net: Inline print_eth_ip_addr()
This function only has two lines of code now, so inline it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-06-25 13:24:12 -04:00
Simon Glass
441539f90a bdinfo: net: Drop legacy ethernet bdinfo
This code pre-dates driver model and the migration date is nearly upon us.
Pare the print_eths() function down and enable it for driver model, since
it works correctly.

The IP address is already printed in print_eth_ip_addr() so we can remove
that.

Since this results in a one-line print_eths() function, inline it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-06-25 13:24:12 -04:00
Simon Glass
3c89c4c856 bdinfo: net: ppc: Drop prints for CONFIG_HAS_ETHn
These config options have not been migrated to Kconfig. This should be
handled using driver model, iterating over the available Ethernet devices.
For now, remove the code.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-06-25 13:24:12 -04:00
Simon Glass
32d0b2dfe5 bdinfo: net: ppc: Drop bi_enet1addr and other similar info
These values were 'old' in 2013 so it should be safe to remove them. They
are never set in U-Boot anyway, so the values will always be zero.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-06-25 13:24:12 -04:00
Simon Glass
db76c9bece bdinfo: Drop print_cpu_word_size()
This function only has one line of code in it so inline it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-06-25 13:24:12 -04:00
Simon Glass
aa8b758a88 bdinfo: Drop print_bi_flash()
This function only has three lines of code in it so inline it. This helps
to put all the code in one place for future partitioning.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-06-25 13:24:12 -04:00
Simon Glass
3cfbe22bf2 bdinfo: Drop print_bi_boot_params()
This function only has one line of code in it so inline it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-06-25 13:24:12 -04:00
Simon Glass
537cb0dfd2 bdinfo: sh: arc: Drop arch-specific print_bi_mem()
It isn't worth having arch-specific code for such minor output
differences. In fact it is better if all archs are consistent.

Drop the arch-specific code in print_bi_mem() and inline it to avoid a
two-line function.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Alexey Brodkin <abrodkin@synopsys.com>
2020-06-25 13:24:12 -04:00
Simon Glass
3e1cca2a2f bdinfo: ppc: Drop arch-specific print_baudrate()
This function outputs the same basic info. Since the baud rate is commonly
115200 these is often no difference. Drop the arch-specific code and
inline it to avoid a one-line function.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-06-25 13:24:12 -04:00
Simon Glass
9e24e10b7b bdinfo: Drop print_std_bdinfo()
Everything in this function is standard now so it serves no purpose. Move
it into the generic do_bdinfo() function.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-06-25 13:24:12 -04:00
Simon Glass
d67de00eb6 bdinfo: Drop unnecessary inline on functions
This serves no purpose since the compiler will inline the functions
automatically. Drop use of inline in this file.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-06-25 13:24:12 -04:00
Simon Glass
566ffde8e1 bdinfo: microblaze: sh: nios2: Drop arch-specific flash info
The differences these architectures have are minor and not worth the extra
code. Use the generic version always.

Tidy up the code style by removing unnecessary tabs.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-06-25 13:24:11 -04:00
Simon Glass
7d81641ba9 bdinfo: Drop unused __maybe_unused
Some of these are not needed now. Drop them to avoid cluttering the code.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-06-25 13:24:11 -04:00
Simon Glass
e01ce34bb0 bdinfo: Drop the option to not use the generic 'bd' command
Now that all architectures are using the generic do_bdinfo(), drop the
option to not use it. When new architectures are added, they will get at
least some useful information from the generic implementation.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-06-25 13:24:11 -04:00
Simon Glass
e227c27393 bdinfo: arc: Use the generic bd command
There is nothing new in the arc 'bd' command beyond what is already there.
Switch it over to use the generic code.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Alexey Brodkin <abrodkin@synopsys.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-06-25 13:24:11 -04:00
Simon Glass
1aeeaeb56e bdinfo: arm: Use the generic bd command
Unfortunately ARM has a lot of special stuff. Move it into the generic
function for now, so we can have it all in one place.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-06-25 13:24:11 -04:00
Simon Glass
67145d1941 bdinfo: m68k: Use the generic bd command
Unfortunately m68k has a lot of special stuff. Move it into the generic
function for now, so we can have it all in one place.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-06-25 13:24:11 -04:00
Simon Glass
2e0fa21785 bdinfo: powerpc: Use the generic bd command
Unfortunately PowerPC has a lot of special stuff. Move it into the generic
function for now, so we can have it all in one place.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-06-25 13:24:11 -04:00
Simon Glass
628c85aec0 bdinfo: riscv: Use the generic bd command
This arch has none of its own info to show. Move it over to use the
generic do_bdinfo().

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-06-25 13:24:11 -04:00
Simon Glass
aa6b898fb1 bdinfo: nds32: Use the generic bd command
This arch has none of its own info to show. Move it over to use the
generic do_bdinfo().

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-06-25 13:24:11 -04:00
Simon Glass
c66981ccbd bdinfo: sandbox: Use the generic bd command
Sandbox has a printout of 'FB base' but this code is not used since
sandbox uses driver model for everything.

Move sandbox over to use the generic do_bdinfo().

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-06-25 13:24:11 -04:00
Simon Glass
41ec71d184 bdinfo: x86: Use the generic bd command
This arch shows 'ethspeed' info but only the freescale drivers use it, so
it can be dropped.

It also calls print_bi_dram() which is safe to call from any arch since it
has an #ifdef inside it. Add this to the generic do_bdinfo() and move x86
over to use it. Put it first since pytests rely on seeing it before
memstart in find_ram_base().

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-06-25 13:24:11 -04:00
Simon Glass
f41b830f24 bdinfo: sh: Use the generic bd command
This arch has no code that is not already in the generic function. Drop
the arch-specific function and change sh over to use the generic one.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-06-25 13:24:11 -04:00
Simon Glass
271db508cc bdinfo: microblaze: Use the generic bd command
Microblaze prints out ethernet and FDT information. This is useful to
most archs, so move it into the generic code and move microblaze over to
use it.

Note that FDT information is shown for all boards, since they should be
using device tree by now.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-06-25 13:24:11 -04:00
Simon Glass
08c56d1917 bdinfo: nios2: Use the generic bd command
Nios2 currently has some code to output SRAM information which is behind
an #ifdef. No nios2 boards define this option, so the code can be removed.

Move Nios2 over to use the generic function.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-06-25 13:24:11 -04:00
Simon Glass
df529b5a77 bdinfo: mips: Use the generic bd command
MIPS currently has a few extra things which are generally useful. Add them
to the generic function and move MIPS over to use it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2020-06-25 13:24:11 -04:00
Simon Glass
1af9756db8 bdinfo: xtensa: Create a generic do_bdinfo for xtensa
This arch uses only the generic function. It would be nice if all the
archs did the same. As a first step, create a new generic function for the
'bd' command and make xtensa use it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-06-25 13:24:10 -04:00
Simon Glass
4ac06d3525 bdinfo: m68k: Drop bd_info->bi_ipbfreq
This field is not used anymore. Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-06-25 13:24:10 -04:00
Simon Glass
b46f989bb7 bdinfo: riscv: Use generic bd_info
At present riscv still uses its own private bd_info struct. Move it over
to use the generic one like other archs.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-06-25 13:24:10 -04:00
Simon Glass
5ffd5e834e bdinfo: nds32: Use generic bd_info
At present nds32 still uses its own private bd_info struct. Move it over
to use the generic one like other archs.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-06-25 13:24:10 -04:00
Simon Glass
989a9e1e87 tbs2910: Drop the 'bd' command
This board is very close to its limit. Drop this command before the bd
refactoring, which increases the size slightly on one toolchain.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-06-25 13:24:10 -04:00
Tom Rini
f0e236c8d6 Merge tag 'xilinx-for-v2020.10' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze into next
Xilinx changes for v2020.10

Versal:
- xspi bootmode fix
- Removing one clock from clk driver
- Align u-boot memory setting with OS by default
- Map TCM and OCM by default

ZynqMP:
- Minor DT improvements
- Reduce console buffer for mini configurations
- Add fix for AMS
- Add support for XDP platform

Zynq:
- Support for AES engine
- Enable bigger memory test by default
- Extend documentation for SD preparation
- Use different freq for Topic miami board

mmc:
- minor GD pointer removal

net:
- Support fixed-link cases by zynq gem
- Fix phy looking loop in axi enet driver

spi:
- Cleanup global macros for xilinx spi drivers

firmware:
- Add support for pmufw reloading

fpga:
- Improve error status reporting

common:
- Remove 4kB addition space for FDT allocation
2020-06-25 09:33:39 -04:00
Ashok Reddy Soma
b8fd54d62f common: fdt: Remove additional 4k space for fdt allocation
There is no technical reason to add additional 4k space for FDT. This space
is completely unused and just increase memory requirements. This is
problematic on systems with limited memory resources as Xilinx Zynq
CSE/ZynqMP mini and Versal mini configurations.

The patch is removing additional 4k space.

EFI code is using copy_fdt() which copy FDT to different location.
And all boot commands in case of using U-Boot's FDT pointed by
$fdtcontroladdr are copying FDT to different locations by
image_setup_libfdt().
That's why in proper flow none should modified DTB used by U-Boot that's
why there is no need for additional space.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
2020-06-25 10:09:32 +02:00
Michal Simek
e20d88bffa xilinx: zynqmp: Enable pmufw config reloading
PMU FW has functionality to accept and reload configuration object at run
time. The patch is adding support for doing it via u-boot prompt.

For example:
tftpboot 100000 pmu_obj.bin
zynqmp pmufw 100000 $filesize

The most of pmufw configurations don't allow config reloading.
Also official Xilinx PMUFW doens't support this feature properly but the
patch should open a way to call PMUFW with this request.

Here is example of PMUFW config fragment which enables config reloading.

/* SET CONFIG SECTION */
PM_CONFIG_SET_CONFIG_SECTION_ID,        /* Section ID */
PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK |
PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* Permissions to set config */

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-25 10:08:04 +02:00
Michal Simek
3ccea69fc4 arm64: zynqmp: Print multiboot reg in decimal
It is better to print multiboot value in decimal because boot images are
also composed in decimal not in hex.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-25 10:08:04 +02:00
Mike Looijmans
39c5cf0e70 topic: zynqmp: Add support for zynqmp-xilinx-xdp platform
XDP - Xilinx Drone Platform is a board for drones or other UAV.

Pinmux the SD card by default, and if the SD card detect line is high
(inactive) then pinmux the SD1 interface to EMIO instead. SD is placed on
extension card and shares connection with on board wife. That means that
when SD card is present in the board wifi can't be used.

There seems to be an issue with DDR access from PL at 2400MT/s, after
updating the PMU and ATF firmware this is causing extremely slow DDR
access. Reducing the DDR speed from 2400 to 2133 appears to solve that
issue, even though the hardware has proven to be 2400 capable.

Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24 13:11:08 +02:00
Mike Looijmans
dfbe492ede board: zynqmp: Fix for wrong AMS setting by ROM
A bug in the ZynqMP bootrom sets the PS_SYSMON_ANALOG_BUS register
at 0xFFA50914 to the wrong value 0x3201. This causes the AMS to
exchange the PS supply voltages 0 and 1. On Xilinx boards this is
not noticeable since these are tied together, it's only really
noticeable if banks 500 and 501 have different supplies. Xilinx' tech
support reported this undocumented register to be the cause, and
this patch applies a fix for all boards by programming the correct
value.

Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24 13:11:08 +02:00
Mike Looijmans
fe1eb9945b board: topic-miami: Set FCLK1 to 150MHz
In all reference designs the FCLK1 runs at 150MHz, but the bootloader
doesn't set it up like that. Set the divider to 8 to generate the
correct clock. Fixes (a.o.) the DMA speed being too slow.

Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24 13:11:08 +02:00
Patrick van Gelder
945a55050d net: xilinx: axi_emac: Fix endless loop when no PHYs are connected
The index used to iterate over the possible PHYs in axiemac_phy_init was an
unsigned int and decremented. Therefor it was always >= 0 and never exited
the loop.

Signed-off-by: Patrick van Gelder <patrick.vangelder@nl.bosch.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24 13:11:08 +02:00
Johannes Krottmayer
6b3984c631 doc: board: xilinx: zynq.rst: add description how to flash a SD card
Add a short description in the ZYNQ documentation how to prepare a SD card and
copy the related images to SD card.

Signed-off-by: Johannes Krottmayer <krjdev@gmail.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24 13:11:08 +02:00
T Karthik Reddy
33d3f8e577 arm64: xilinx: Print fpga error value in hex
Fpga returns error value when fails, error status should be
printed in hex format.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24 13:11:08 +02:00
Ashok Reddy Soma
f44bd3bcfd spi: zynq_[q]spi: Convert config's to macro's
Remove below config options and convert them to macros. They have never
been configured to different values than default one. And also it makes
sense to reduce the config_whitelist.
CONFIG_SYS_ZYNQ_SPI_WAIT
CONFIG_SYS_ZYNQ_QSPI_WAIT
CONFIG_XILINX_SPI_IDLE_VAL

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24 13:11:08 +02:00
Michal Simek
26e62cc971 net: gem: Disable PCS autonegotiation in case of fixed-link
Disable PCS autonegotiation if fixed-link node is present in device tree.
This way systems with multiple GEM instances with a combination of
SGMII-fixed and SGMII-PHY will work.

Reported-by: Goran Marinkovic <goran.marinkovic@psi.ch>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24 13:11:06 +02:00
T Karthik Reddy
7831292fc9 arm64: zynqmp: Change spi-max-frequency for qspi mini
Change mini u-boot qspi spi-max-frequency to 108Mhz, make the
frequency similar to full u-boot qspi flash spi-max-frequency.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24 13:07:58 +02:00
Saeed Nowshadi
3ab205c117 arm64: zynqmp: Fix si570 clock output names and references
Align clock output names with node references.

Signed-off-by: Saeed Nowshadi <saeed.nowshadi@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24 13:07:58 +02:00
T Karthik Reddy
052451c10b arm64: zynqmp: Reduce console buffer size
Reduce console buffer size to 1kbyte to accommodate memory
allocations in mini u-boot for zynqmp.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24 13:07:58 +02:00
Ashok Reddy Soma
a0f309ee9e arm64: versal: Enable config to map TCM and OCM
Enable CONFIG_DEFINE_TCM_OCM_MMAP to map TCM and OCM memory.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24 13:07:58 +02:00
Ashok Reddy Soma
032d9aa189 arm: zynq: Enable alternative memory test
Enable alternative memory test for zynq platforms.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24 13:07:58 +02:00
T Karthik Reddy
b80a476faa fpga: zynqpl: Add zynq aes load & loadp commands
Added support for zynq aes load & loadp commands.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24 13:07:58 +02:00
T Karthik Reddy
ca0c0e07ad fpga: zynqpl: Flush dcache only for non-bitstream data
In case of aes decryption destination address range must be flushed
before transferring decrypted data to destination.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24 13:07:58 +02:00
Ibai Erkiaga
c64afba2fb fpga: zynqpl: Check if aes engine is enabled
AES engine cannot be used if has not been enabled at boot time
with an encrypted boot image.

Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com>
Acked-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24 13:07:58 +02:00
T Karthik Reddy
1d9632a3cc fpga: zynqpl: Check fpga config completion
This patch checks fpga config completion when a bitstream is loaded
into PL.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24 13:07:58 +02:00
Siva Durga Prasad Paladugu
3427f4d204 fpga: zynqpl: Correct PL bitstream loading sequence for zynqaes
Correct the PL bitstream loading sequence for zynqaes command by
clearing the loaded PL bitstream before loading the new encrypted
bitstream using the zynq aes command. This was done by setting
the PROG_B same as in case of fpgaload commands.
This patch fixes the issue of loading the encrypted PL bitstream
onto the PL in which a bitstream has already been loaded
successfully.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24 13:07:57 +02:00
Michal Simek
4c86e0834a firmware: zynqmp: Change panic logic in zynqmp_pmufw_load_config_object()
There is no need to panic all the time when pmufw config object loading
failed. The patch improves function logic to report permission deny case
and also panic only for SPL case.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Luca Ceresoli <luca@lucaceresoli.net>
2020-06-24 13:07:57 +02:00
Rajan Vaja
2b2012d1c1 clk: versal: Remove alt_ref_clk from clock sources
alt_ref_clk is applicable only for PS extended version.
For PS base version there is no separate alt_ref_clk.
It is tied with ref_clk, so remove it from driver.

Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24 13:07:57 +02:00
Michal Simek
70014a7802 arm64: versal: Let U-Boot to update memory node by default
There is no reason not to let U-Boot to update memory node by default. In
past this was disabled by purpose to be able to test different memory
configurations from one U-Boot instance.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24 13:07:57 +02:00
Michal Simek
aeb3c386c8 mmc: zynq_sdhci: Remove global pointer
Driver is not calling gd anywhere that's why there is not need to define
it.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24 13:07:57 +02:00
Michal Simek
0ef8cd38d0 arm: versal: Fix xspi0 boot mode
Use proper number to be aligned with xspi0 boot mode.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24 13:07:57 +02:00
Tom Rini
6ccbd1590f Merge branch 'net' of https://gitlab.denx.de/u-boot/custodians/u-boot-sh into next
- Convert pcnet and eepro100 ethernet drivers to DM
2020-06-20 18:52:51 -04:00
Tom Rini
5575f79bda Merge https://gitlab.denx.de/u-boot/custodians/u-boot-spi into next
- Convert fsl_espi to driver model (Chuanhua)
- Enable am335x baltos to DM_SPI (Jagan)
- Drop few powerpc board which doesn't have DM enabled (Jagan)
2020-06-19 16:25:50 -04:00
Tom Rini
04909251fd Merge tag 'video-next' of https://gitlab.denx.de/u-boot/custodians/u-boot-video into next
- migrate remaining imx5/imx6qd boards to DM_VIDEO
- use 'vidconsole' stdout in nitrogen6x upgrade script
- add option for selection of the vidconsole commands
  lcdputs and setcurs
- allow building ipuv3 driver with disabled CONFIG_PANEL
- make backlight and panel drivers optional
- remove useless code from ipuv3 driver
- extend existing DM_VIDEO work-around for console name
  to support 'vga'
- remove non-DM code in ipuv3
2020-06-18 16:59:16 -04:00
Anatolij Gustschin
fb3dd9c005 video: ipuv3: remove non-DM code
All ipuv3 users have been converted, drop obsolete code.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
2020-06-18 19:38:50 +02:00
Anatolij Gustschin
3715791e8a imx: convert mx53loco board to DM_VIDEO
Migration to DM_VIDEO driver is long overdue. Update defconfig
to enable usage of converted ipuv3 driver DM configuration.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Jason Liu <jason.hui.liu@nxp.com>
Acked-by: Jason Liu<jason.hui.liu@nxp.com>
2020-06-18 19:38:37 +02:00
Anatolij Gustschin
ff4e52e2f1 imx: convert mx51evk board to DM_VIDEO
Migration to DM_VIDEO driver is long overdue. Update defconfig
to enable usage of converted ipuv3 driver DM configuration.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
2020-06-18 19:38:18 +02:00
Anatolij Gustschin
d37618d18d imx: convert gwventana board to DM_VIDEO
Migration to DM_VIDEO driver is long overdue. Update defconfigs
to enable usage of converted ipuv3 driver DM configuration.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Tim Harvey <tharvey@gateworks.com>
2020-06-18 19:38:07 +02:00
Anatolij Gustschin
c0d5117289 imx: convert mx6cuboxi board to DM_VIDEO
Migration to DM_VIDEO driver is long overdue. Update defconfig
to enable usage of converted ipuv3 driver DM configuration.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Baruch Siach <baruch@tkos.co.il>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
2020-06-18 19:37:58 +02:00
Anatolij Gustschin
1e916aa021 imx: convert cgtqmx6eval board to DM_VIDEO
Migration to DM_VIDEO driver is long overdue. Update defconfig
to enable usage of converted ipuv3 driver DM configuration.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Otavio Salvador <otavio@ossystems.com.br>
2020-06-18 19:37:49 +02:00
Anatolij Gustschin
bf4d323817 imx: convert dms-ba16 boards to DM_VIDEO
Migration to DM_VIDEO driver is long overdue. Update defconfigs
to enable usage of converted ipuv3 driver DM configuration.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Akshay Bhat <akshaybhat@timesys.com>
Cc: Ken Lin <Ken.Lin@advantech.com.tw>
2020-06-18 19:37:41 +02:00
Anatolij Gustschin
ddfda8ec76 imx: convert pico-imx6 to DM_VIDEO
Update defconfig to enable usage of converted ipuv3
driver DM configuration.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
2020-06-18 19:37:29 +02:00
Anatolij Gustschin
3f15df3c0b imx: convert embest boards to DM_VIDEO
Migration to DM_VIDEO driver is long overdue. Update defconfigs
to enable usage of converted ipuv3 driver DM configuration.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Eric Bénard <eric@eukrea.com>
2020-06-18 19:36:51 +02:00
Marek Vasut
d789a8259e net: pcnet: Add Kconfig entries
Add Kconfig entries for the pcnet driver and convert MIPS malta
to use those.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-18 19:34:41 +02:00
Marek Vasut
59edb2668e net: pcnet: Add DM support
With all the changes in place, add support for DM into the
pcnet driver.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-18 19:34:41 +02:00
Marek Vasut
dea9b6014b net: pcnet: Split common and non-DM functions
Pull the common parts of functions out so they can be reused by both
DM and non-DM code paths. The recv() function had to be reworked to
fit into this scheme and this means it now only receives one packet
at a time instead of spinning in an endless loop.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-18 19:34:41 +02:00
Marek Vasut
1023a1e6a9 net: pcnet: Wrap name and enetaddr into private data
Instead of using the non-DM-only name and enetaddr in struct eth_device,
add pointers into the private data which can either point to that non-DM
name or a DM one later on.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-18 19:34:41 +02:00
Marek Vasut
3b2d63a739 net: pcnet: Wrap iobase into private data
Instead of using the non-DM-only iobase in struct eth_device, add
one into the private data to make DM and non-DM operation possible.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
fdf6cbe54d net: pcnet: Pass private data through dev->priv
Get rid of the global point to private data, and rather pass it
thought dev->priv. Also remove the unnecessary check for lp being
non-NULL, since it is always NULL at this point.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
60074d9d3e net: pcnet: Wrap devbusfn into private data
Instead of using eth_device priv for this PCI devbusfn, free it
so it could be used for driver private data, and wrap devbusfn
into those driver private data.

Note that using the name dev for the variable is a trick left for
later, when DM support is in place, so dm_pci_virt_to_mem() can be
used with minimal ifdeffery.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
d20e857e6b net: pcnet: Drop useless forward declarations
Remove those as they are not needed anymore.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
69e08bd735 net: pcnet: Move initialize function at the end
Move the function at the end of the driver, so we could drop
various forward declarations later. No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
246d2bfcf2 net: pcnet: Move private data allocation to initialize
The private data allocation does not have to be done every time the
NIC is initialized at run time, move the allocation to initialize
function, which means it will be done only once when the driver
starts.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
ae38e96c23 net: pcnet: Replace memset+malloc with calloc
This combination of functions can be replaced with calloc(),
make it so.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
1c38c36eb9 net: pcnet: Simplify private data allocation
The current code is horribly complex. Both the RX and TX buffer
descriptors are 16 bytes in size, the init block is 32 bytes in
size, so simplify the code such that the entire private data of
the driver are allocated cache aligned and the RX and TX buffer
descriptors are part of the private data.

This removes multiple malloc calls and cache flushes.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
e4797c3161 net: pcnet: Use PCI_DEVICE() to define PCI device compat list
Use this macro to fully fill the PCI device ID table. This is mandatory
for the DM PCI support, which checks all the fields.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
1524e409ef net: pcnet: Drop PCNET_HAS_PROM
All of one PCNET users has this option set, make this default
and drop this config option.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
97d5c14559 net: pcnet: Drop typedef struct pcnet_priv_t
Use struct pcnet_priv all over the place instead.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
6463b73e0b net: eepro100: Add Kconfig entries
Add Kconfig entries for the eepro100 driver and convert various boards.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
af8ecdf7e5 net: eepro100: Add DM support
Add support for driver model to the driver.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
8835103e24 net: eepro100: Split common parts of non-DM functions out
Split the common code from the non-DM code, so it can be reused by
the DM code later. As always, the recv() function had to be split
into the actual receiving part and free_pkt part to fit with the
DM.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
43b738350c net: eepro100: Drop bd_t pointer from read_hw_addr()
The pointer is unused, so drop it. Rename the function to start
with the eepro100_ prefix.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
fb8307e52a net: eepro100: Add RX/TX rings into the private data
The RX/TX DMA descriptor rings are per-device-instance private data,
so move them into the private data.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
39daab2376 net: eepro100: Pass device private data into mdiobus
Instead of doing ethernet device lookup by name every time there
is an MDIO access, pass the driver private data via mdiobus priv
to the MDIO bus accessors.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
389da9743c net: eepro100: Pass device private data around
This patch replaces the various uses of struct eth_device for accessing
device private data with struct eepro100_priv, which is compatible both
with DM and non-DM operation.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
bd159c6185 net: eepro100: Introduce device private data
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
fa9e12102d net: eepro100: Pass PCI BDF into bus_to_phys()/phys_to_bus()
This is a trick in preparation for adding DM support. By passing in
the PCI BDF into the bus_to_phys()/phys_to_bus() macros and calling
that dev, we can substitute dev with udevice when DM support lands
and do minor adjustment to the macros to support both DM and non-DM
operation. No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
acdf5d8882 net: eepro100: Drop inline keyword
Drop the inline keyword from the static functions, the compiler has a
much better overview and can decide how to inline those functions much
better.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
a6c06ec8f6 net: eepro100: Fix EE_*_CMD macros
Those macros depended on specific variable names to be declared
at their usage sites, fix this by adding an argument to those
macros and also protect the argument with braces.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
66fed7300d net: eepro100: Factor out MII registration
Pull the MII registration code into a separate function. Moreover,
properly free memory in case any of the registration or allocation
functions fail, so this fixes an existing memleak.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
6c7d3f6b3f net: eepro100: Switch from malloc()+memset() to calloc()
Replace malloc()+memset() combination with calloc(), no functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
3a15684dc6 net: eepro100: Use PCI_DEVICE() to define PCI device compat list
Use this macro to fully fill the PCI device ID table. This is mandatory
for the DM PCI support, which checks all the fields.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
047a800dd6 net: eepro100: Reorder functions in the driver
Move the functions around in the driver to prepare it for DM conversion.
Drop forward declarations which are not necessary anymore. No functional
change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
d47cf87db9 net: eepro100: Remove volatile misuse
Remove all the remaining use of the 'volatile' keyword, as this is
no longer required. All the accesses which might have needed this
use of 'volatile' have been repaired properly.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
5116aae111 net: eepro100: Add cache management
Add cache invalidation and flushes wherever the DMA descriptors are
written or read, otherwise this driver cannot work reliably on any
systems where caches are enabled.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
95655b921b net: eepro100: Factor out tx_ring command issuing
This code is replicated in the driver thrice almost verbatim, factor
it out into a separate function and clean it up. No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
46df32ef2f net: eepro100: Replace purge_tx_ring() with memset()
This function zeroes-out all the descriptors in the TX ring,
use memset() instead.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
81bdeea2fe net: eepro100: Use standard I/O accessors
The current eepro100 driver accesses its memory mapped registers directly
instead of using the standard I/O accessors. This can cause problems on
some systems as the accesses can get out of order. So convert the direct
volatile dereferences to use the normal in/out macros.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
f3878f5c28 net: eepro100: Fix camelcase
This is automated cleanup via checkpatch, no functional change.
./scripts/checkpatch.pl --show-types -f drivers/net/eepro100.c
./scripts/checkpatch.pl --types INDENTED_LABEL -f --fix --fix-inplace drivers/net/eepro100.c

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
b013173079 net: eepro100: Fix remaining checkpatch issues
This is automated cleanup via checkpatch, no functional change.
./scripts/checkpatch.pl --show-types -f drivers/net/eepro100.c
./scripts/checkpatch.pl -f --fix --fix-inplace drivers/net/eepro100.c

This fixes all the remaining errors except a couple of comments which
are longer than 80 characters, all the volatile misuse and all the
camelcase, that needs a separate patch.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
614e95152d net: eepro100: Fix indented label
This is automated cleanup via checkpatch, no functional change.
./scripts/checkpatch.pl --show-types -f drivers/net/eepro100.c
./scripts/checkpatch.pl --types INDENTED_LABEL -f --fix --fix-inplace drivers/net/eepro100.c

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
7a30873585 net: eepro100: Fix pointer location
This is automated cleanup via checkpatch, no functional change.
./scripts/checkpatch.pl --show-types -f drivers/net/eepro100.c
./scripts/checkpatch.pl --types POINTER_LOCATION -f --fix --fix-inplace drivers/net/eepro100.c

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
773af836da net: eepro100: Fix parenthesis alignment
This is automated cleanup via checkpatch, no functional change.
./scripts/checkpatch.pl --show-types -f drivers/net/eepro100.c
./scripts/checkpatch.pl --types PARENTHESIS_ALIGNMENT -f --fix --fix-inplace drivers/net/eepro100.c

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
9b12ff9911 net: eepro100: Fix braces
This is automated cleanup via checkpatch, no functional change.
./scripts/checkpatch.pl --show-types -f drivers/net/eepro100.c
./scripts/checkpatch.pl --types BRACES -f --fix --fix-inplace drivers/net/eepro100.c

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
db9f1818bf net: eepro100: Fix spacing
This is automated cleanup via checkpatch, no functional change.
./scripts/checkpatch.pl --show-types -f drivers/net/eepro100.c
./scripts/checkpatch.pl --types SPACING -f --fix --fix-inplace drivers/net/eepro100.c

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
e5352c6bbe net: eepro100: Use plain debug()
Convert all the ifdef DEBUG to plain debug(), no functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18 19:34:39 +02:00
Marek Vasut
aba283d838 net: eepro100: Clean up comments
Clean the comments up to they trigger fewer checkpatch warnings,
no functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18 19:34:39 +02:00
Marek Vasut
0a5be6c5fd net: eepro100: Remove EEPRO100_SROM_WRITE
This code is never enabled, last board that used it was ELPPC which
was removed some 5 years ago, so just remove this code altogether.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18 19:34:39 +02:00
Anatolij Gustschin
513acd0445 tbs2910: migrate to DM_VIDEO
Migration to DM_VIDEO driver is long overdue, configure it in
board config files. To enable the display set stdout like:

  setenv stdout serial,vidconsole

Signed-off-by: Anatolij Gustschin <agust@denx.de>
Tested-by: Soeren Moch <smoch@web.de>
2020-06-18 19:34:20 +02:00
Anatolij Gustschin
22b897a123 video: extend stdout video console work-around for 'vga'
cfb_console driver uses 'vga' console name and we still have board
environments defining this name. Re-use existing DM_VIDEO work-
around for console name to support 'vga' name in stdout environment.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
Tested-by: Soeren Moch <smoch@web.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2020-06-18 19:30:14 +02:00
Anatolij Gustschin
db755b36d2 video: ipuv3: remove some useless code to reduce binary size
To enable DM_VIDEO we must decrease binary size to fix build
breakage for some boards, so drop not needed code. Also add
!DM_VIDEO guards which can be later removed when last non DM
users will be converted.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
2020-06-18 19:29:33 +02:00
Anatolij Gustschin
e26e520046 video: make backlight and panel drivers optional
Not all boards use these drivers, so allow to disable them to fix
building boards with U-Boot binary image size restrictions.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-06-18 19:28:36 +02:00
Anatolij Gustschin
0b12f76f72 video: ipuv3: fix building with disabled panel driver
Panel code might be disabled for some boards, make this
driver code optional.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
2020-06-18 19:27:49 +02:00
Anatolij Gustschin
39b95556f9 video: make vidconsole commands optional
Converting some boards to DM_VIDEO results in build breakage due
to increased code size. Make video console specific commands
optional to reduce binary size.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-06-18 19:26:54 +02:00
Anatolij Gustschin
ffd955c488 nitrogen6x: update video console name
After migration to DM 'vga' name is not longer supported,
Update the upgrade script to use 'vidconsole' instead.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Troy Kisky <troy.kisky@boundarydevices.com>
Acked-by: Troy Kisky <troy.kisky@boundarydevices.com>
2020-06-18 19:25:05 +02:00
Troy Kisky
59d078b2c6 board: nitrogen6x: migrate to CONFIG_DM_VIDEO
Enable driver model for Video to remove compiler warning.
To enable display, issue

setenv stdout serial,vidconsole;

Add CONFIG_DM_VIDEO to all defconfigs whose board is
nitrogen6x.
        mx6qsabrelite_defconfig
        nitrogen6dl2g_defconfig
        nitrogen6dl_defconfig
        nitrogen6q2g_defconfig
        nitrogen6q_defconfig
        nitrogen6s1g_defconfig
	nitrogen6s_defconfig

Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Tested-by: Anatolij Gustschin <agust@denx.de>
2020-06-18 19:24:33 +02:00
Jagan Teki
2a2b94a9d9 am335x: baltos: Enable DM_SPI
Enable DM_SPI for am355x baltos board.

Build is fine, but not tested.

Cc: Yegor Yefremov <yegorslists@googlemail.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Yegor Yefremov <yegorslists@googlemail.com>
2020-06-18 21:53:21 +05:30
Chuanhua Han
8d50551dc7 dm: spi: Convert Freescale ESPI driver to driver model
Modify the Freescale ESPI driver to support the driver model.
Also resolved the following problems:

===================== WARNING ======================
This board does not use CONFIG_DM_SPI. Please update
the board before v2019.04 for no dm conversion
and v2019.07 for partially dm converted drivers.
Failure to update can lead to driver/board removal
See doc/driver-model/MIGRATION.txt for more info.
====================================================
===================== WARNING ======================
This board does not use CONFIG_DM_SPI_FLASH. Please update
the board to use CONFIG_SPI_FLASH before the v2019.07 release.
Failure to update by the deadline may result in board removal.
See doc/driver-model/MIGRATION.txt for more info.
====================================================

Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com>
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-06-18 21:47:08 +05:30
Jagan Teki
47df4b5f2a powerpc: Remove TWR-P1025_defconfig board
DM_SPI and other driver model migration deadlines
are expired for this board.

Remove it.

Patch-cc: Xiaobo Xie <xiaobo.xie@nxp.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-06-18 21:47:08 +05:30
Jagan Teki
5d226cd013 powerpc: Remove T4160QDS_NAND_defconfig board
DM_SPI and other driver model migration deadlines
are expired for this board.

Remove it.

Patch-cc: Ruchika Gupta <ruchika.gupta@nxp.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-06-18 21:47:08 +05:30
Jagan Teki
ce17d99d12 powerpc: Remove T1040QDS_DDR4_defconfig board
DM_SPI and other driver model migration deadlines
are expired for this board.

Remove it.

Patch-cc: Poonam Aggrwal <poonam.aggrwal@nxp.com>
Patch-cc: Ruchika Gupta <ruchika.gupta@nxp.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-06-18 21:47:08 +05:30
Jagan Teki
7723a6deb7 powerpc: Remove T1024QDS_DDR4_SECURE_BOOT_defconfig board
DM_SPI and other driver model migration deadlines
are expired for this board.

Remove it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-06-18 21:47:08 +05:30
Jagan Teki
197fc64578 powerpc: Remove P1022DS_36BIT_NAND_defconfig board
DM_SPI and other driver model migration deadlines
are expired for this board.

Remove it.

Patch-cc: Timur Tabi <timur@tabi.org>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-06-18 21:47:08 +05:30
Jagan Teki
8429b95167 powerpc: Remove configs/MPC8536DS_36BIT_defconfig board
DM_SPI and other driver model migration deadlines
are expired for this board.

Remove it.

Patch-cc: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-06-18 21:47:08 +05:30
Jagan Teki
447ec175b2 powerpc: Remove configs/C29XPCIE_NAND_defconfig board
DM_SPI and other driver model migration deadlines
are expired for this board.

Remove it.

Patch-cc: Po Liu <po.liu@nxp.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-06-18 21:47:08 +05:30
Jagan Teki
55bcea4fb4 powerpc: Remove configs/BSC9132QDS_NAND_DDRCLK100_SECURE_defconfig board
DM_SPI and other driver model migration deadlines
are expired for this board.

Remove it.

Patch-cc: Naveen Burmi <naveen.burmi@nxp.com>
Patch-cc: Ruchika Gupta <ruchika.gupta@nxp.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-06-18 21:47:08 +05:30
Jagan Teki
f178468b5e powerpc: Remove configs/BSC9131RDB_NAND_SYSCLK100_defconfig board
DM_SPI and other driver model migration deadlines
are expired for this board.

Remove it.

Patch-cc: Poonam Aggrwal <poonam.aggrwal@nxp.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-06-18 21:47:08 +05:30
Jagan Teki
e3e6782d47 powerpc: Remove configs/B4420QDS_NAND_defconfig board
DM_SPI and other driver model migration deadlines
are expired for this board.

Remove it.

Patch-cc: Ashish Kumar <ashish.kumar@nxp.com>
Patch-cc: Ruchika Gupta <ruchika.gupta@nxp.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-06-18 21:47:08 +05:30
Tom Rini
83fdb43882 Merge tag 'ti-v2020.10-next' of https://gitlab.denx.de/u-boot/custodians/u-boot-ti into next
- DM conversion for OMAP4, OMAP5 platforms.
- Other minor fixes for Nokia RX51, am33, am57, am654.
2020-06-18 10:07:49 -04:00
Gregory CLEMENT
59dab842f9 configs: atmel: cleanup CONFIG_SPL_SEPARATE_BSS
Now that CONFIG_SPL_SEPARATE_BSS is selected for all the AT91 based
boards, cleanups the defconfigs by removing it.

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2020-06-18 14:28:37 +03:00
Gregory CLEMENT
c7c120c22b ARM: at91: Enable SPL_SEPARATE_BSS by default
According to the linker script for both armv7 and arm926ejs based SoC,
BSS section was all the time separated for SPL but this symbol was
only enabled on some boards. However, it is necessary to have it
enabled for OF_SEPARATE configuration where DTB is appended to u-boot
with DTB.

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2020-06-18 14:28:37 +03:00
Eugen Hristev
c260cb2c8c ARM: dts: sama5d3: fix gadget endpoint address warning
arch/arm/dts/sama5d36ek.dtb: Warning (graph_endpoint): /ahb/gadget@00500000/endpoint@10: graph node unit address error, expected "a"
arch/arm/dts/sama5d36ek.dtb: Warning (graph_endpoint): /ahb/gadget@00500000/endpoint@11: graph node unit address error, expected "b"
arch/arm/dts/sama5d36ek.dtb: Warning (graph_endpoint): /ahb/gadget@00500000/endpoint@12: graph node unit address error, expected "c"
arch/arm/dts/sama5d36ek.dtb: Warning (graph_endpoint): /ahb/gadget@00500000/endpoint@13: graph node unit address error, expected "d"
arch/arm/dts/sama5d36ek.dtb: Warning (graph_endpoint): /ahb/gadget@00500000/endpoint@14: graph node unit address error, expected "e"
arch/arm/dts/sama5d36ek.dtb: Warning (graph_endpoint): /ahb/gadget@00500000/endpoint@15: graph node unit address error, expected "f"

Fixed by changing address in node name to hex.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2020-06-18 14:28:37 +03:00
Eugen Hristev
4675b519c9 ARM: dts: sama5d4: fix gadget endpoint address warning
arch/arm/dts/at91-sama5d4ek.dtb: Warning (graph_endpoint): /ahb/gadget@00400000/endpoint@10: graph node unit address error, expected "a"
arch/arm/dts/at91-sama5d4ek.dtb: Warning (graph_endpoint): /ahb/gadget@00400000/endpoint@11: graph node unit address error, expected "b"
arch/arm/dts/at91-sama5d4ek.dtb: Warning (graph_endpoint): /ahb/gadget@00400000/endpoint@12: graph node unit address error, expected "c"
arch/arm/dts/at91-sama5d4ek.dtb: Warning (graph_endpoint): /ahb/gadget@00400000/endpoint@13: graph node unit address error, expected "d"
arch/arm/dts/at91-sama5d4ek.dtb: Warning (graph_endpoint): /ahb/gadget@00400000/endpoint@14: graph node unit address error, expected "e"
arch/arm/dts/at91-sama5d4ek.dtb: Warning (graph_endpoint): /ahb/gadget@00400000/endpoint@15: graph node unit address error, expected "f"

Fixed by changing address in node name to hex.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2020-06-18 14:28:37 +03:00
Harald Seiler
7a81989b7b common: hash: Remove a debug printf statement
Remove a left-over debug printf that was introduced with SHA512 support.

Fixes: d16b38f427 ("Add support for SHA384 and SHA512")
Signed-off-by: Harald Seiler <hws@denx.de>
2020-06-16 11:36:30 -04:00
Adam Ford
c0a8d6e1e6 ARM: da850-evm: Remove SPI from SPL when booting from NAND
The da850evm boots from SPI flash while the da850evm_nand_defconfig
boots from NAND and these are configs are mutually exclusive.

Since there isn't a need for SPI during SPL in the NAND configuration,
this patch removes the SPI drivers in SPL while making them still
available in U-Boot proper.  This should save some code space in SPL.

Signed-off-by: Adam Ford <aford173@gmail.com>
2020-06-16 17:00:50 +05:30
Tero Kristo
803e9a1f28 omap5: uevm: convert to device model
Convert omap5 uevm board to device model.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
2020-06-16 17:00:12 +05:30
Tero Kristo
8f1ed2e4ed omap5: Copy device tree from linux 5.7.y
Copy all the device tree files required for omap5 uevm support from
mainline Linux.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
2020-06-16 17:00:12 +05:30
Peter Ujfalusi
8812ed9725 omap4: sdp: convert to device model
Convert omap4 sdp to device model.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
2020-06-16 17:00:12 +05:30
Peter Ujfalusi
e58b697e36 omap4: Copy device tree from Linux 5.7.y for SDP4430
Copy all device tree files required for omap4 sdp4430 support from
mainline Linux.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
2020-06-16 17:00:12 +05:30
Tero Kristo
0a45375115 omap4: panda: convert to device model
Convert omap4 panda to device model.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
2020-06-16 17:00:12 +05:30
Tero Kristo
00fde6b873 omap4: Copy device tree from Linux 5.7.y
Copy all device tree files required for omap4 panda support from
mainline Linux.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
2020-06-16 17:00:12 +05:30
Andrew F. Davis
83a0e9ddaa board: ti: am654: Disable SA2UL node for HS devices
On HS devices the access to SA2UL is restricted on the non-secure
ARM side, disable the node in DT to prevent firewall violations.
We used to only disable the TRNG but now that we have full SA2UL
support in Linux, in which TRNG is a sub-module, disable both
by disabling the parent SA2UL node.

Signed-off-by: Andrew F. Davis <afd@ti.com>
2020-06-16 17:00:02 +05:30
Tom Rini
eab48865f9 net: cpsw: Add __maybe_unused to generated inlines
We generate a number of helper inline functions to make accesses easier.
However not all permutations of each function will be used and clang
will warn about unused ones.  Decorate all of them with __maybe_unused
because of this.

Cc: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
2020-06-16 17:00:02 +05:30
Tom Rini
2af17e2573 mmc: omap_hsmmc: Add guards around omap_hsmmc_get_cfg()
We only call the function omap_hsmmc_get_cfg in the case of OMAP34XX or
when we have to iodelay recalibration.  Add guards for these checks as
clang will otherwise warn.

Cc: Peng Fan <peng.fan@nxp.com>
Cc: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-06-16 17:00:02 +05:30
Tom Rini
a37f765219 gpio: omap_gpio: Fix unused function warning in non-DM case
In the case of non-DM_GPIO the function get_gpio_index() will never be
called, and clang will warn about this.  Move this to be with the other
non-DM code for easier removal later.

Cc: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-06-16 17:00:02 +05:30
Tom Rini
f18f823c13 board: ti: am335x_evm: Remove duplicate setting of bd_ram_ofs member
With clang we get a report that we are setting this member twice.
Fortunately it is to the same value, so drop the hard-coded value line.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
2020-06-16 17:00:02 +05:30
Tom Rini
e76e85c9f4 board: ti: common: Fix pointer-bool-conversion warnings
When building this code with clang-10 a number of warnings will be
generated along the lines of:
warning: address of array 'ep->version' will always evaluate to 'true'

Convert these checks to checking the strlen of the part of the array we
care about.  As this array will be null terminated previously by us,
this is safe.

Cc: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-06-16 17:00:02 +05:30
Bin Liu
5b9ee0fc6f phy: omap-usb2-phy: disable phy charger detect
AM654x PG1.0 has a silicon bug that D+ is pulled high after POR, which
could cause enumeration failure with some USB hubs.  Disabling the
USB2_PHY Charger Detect function will put D+ into the normal state.

Using property "ti,dis-chg-det-quirk" in the DT usb2-phy node to
enable this workaround for AM654x PG1.0.

Signed-off-by: Bin Liu <b-liu@ti.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Roger Quadros <rogerq@ti.com>
2020-06-16 17:00:02 +05:30
Pali Rohár
94e837b6fc Nokia RX-51: Fix checking if serial console was enabled
There was incorrect logic for parsing OMAP_TAG_UART atag.

Signed-off-by: Pali Rohár <pali@kernel.org>
2020-06-13 23:12:17 +05:30
Pali Rohár
f459d322a9 Nokia RX-51: Add link for u-boot-gen-combined script to README file
This patch updates Nokia RX-51 README file.

Signed-off-by: Pali Rohár <pali@kernel.org>
2020-06-13 23:12:17 +05:30
Andrew F. Davis
a2303f4c06 tools: k3_gen_x509_cert: Set default early HS JTAG access to disabled
When authenticating the initial boot binary the ROM will check a debug
type value in the certificate and based on that open JTAG access to that
core. This only effects HS devices as non-HS device ROM allows JTAG
by default.

This can be useful for HS developers working in the early boot stage,
before SYSFW is loaded. After that point the JTAG access can be
changed based on board configurations passed to SYSFW.

This access can also be a large security problem as JTAG access on
HS devices can be used to circumvent the chain-of-trust controls.
Accidentally leaving this open defeats the security on HS, due to this
change the default to disabled.

This should only effect those working on early HS boot code, which
is a limited crowd who will already know how to re-enable this access
as needed.

Signed-off-by: Andrew F. Davis <afd@ti.com>
2020-06-13 23:12:17 +05:30
Andrew F. Davis
0428a0b88f tools: k3_gen_x509_cert: Allow selecting early JTAG debug value
When authenticating the initial boot binary the ROM will check a debug
type value in the certificate and based on that open JTAG access to that
core.

Make this selectable in the signing tool to allow it to be enabled or
disabled based on user command line input.

This does not change the default behavior.

Signed-off-by: Andrew F. Davis <afd@ti.com>
2020-06-13 23:12:17 +05:30
Faiz Abbas
c78ae11e07 mmc: davinci_mmc: Cleanup to use dt in U-boot and static platdata in SPL
Cleanup this driver to use dt in U-boot and static platdata in SPL.
This requires the following steps:

1. Move all platdata assignment from probe() to ofdata_to_platdata().
   This function is only called in U-boot.
2. Replicate all the platdata assignment being done in
   ofdata_to_platdata() in the omapl138 board file. This data is used in
   the SPL case where SPL_OF_CONTROL is not enabled.
3. Remove SPL_OF_CONTROL and related configs from omapl138_lcdk_defconfig

This cleanup effectively reverts 3ef94715cc ('mmc: davinci: fix mmc boot in SPL')

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Tested-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
2020-06-13 23:12:17 +05:30
Luca Ceresoli
fedfa374ff board: ti: use positive logic to detect idk boards
am57x_idk_lcd_detect() exits immediately if a known board not having
an LCD is found, i.e. a non-IDK board. This is annoying as we have to
remember to add an extra OR clause for every new non-IDK board.

Add a board_is_ti_idk() macro so that the logic becomes positive (detect
LCD on IDK boards instead of not-known-without-LCD boards). Even more
important, add the macro just below the board_is_*_idk() macros, so it is
easy to remember to update it when adding a new IDK.

Signed-off-by: Luca Ceresoli <luca@lucaceresoli.net>
2020-06-13 23:12:17 +05:30
Luca Ceresoli
1c162722d7 board: ti: am57xx: use GPIO_TO_PIN() to define GPIO number
Using the macro makes code readable without the need for a comment.

Signed-off-by: Luca Ceresoli <luca@lucaceresoli.net>
2020-06-13 23:12:17 +05:30
Tom Rini
f9e3d2e147 Merge tag 'dm-pull-12jun20' of git://git.denx.de/u-boot-dm into next
patman improvements to allow it to work with Zephyr
change to how sequence numbers are assigned to devices
minor fixes and improvements
2020-06-13 09:01:01 -04:00
Tom Rini
8a1292ce3e Merge branch '2020-06-12-next-net' into next
- Merge tbs2910 distro boot support and associated clean-ups and size
  reduction.
- Assorted networking corrections / bugfixes.
- Drop smc911x standalone API example as it was likely non-functional for a
  long time.
- Enhanced support for TI PHYs
- rtl8139 DM conversion
2020-06-12 14:58:12 -04:00
Baruch Siach
f1d925d9c3 net: move random_port() to dns
The random_port() routine is not used anywhere else. Make it local to
dns.c to reduce code clutter, and shrink generated code a little.

Signed-off-by: Baruch Siach <baruch@tkos.co.il>
2020-06-12 13:17:23 -04:00
Ravik Hasija
0813921042 net: tftp: fix option validation as per RFCs
RFC2348, RFC2349:
- Option string is case in-sensitive.
- Client must generate ERR pkt in case option value mismatch in server OACK
- Fix debug print for options

Signed-off-by: Ravik Hasija <rahasij@linux.microsoft.com>
Reviewed-By: Ramon Fried <rfried.dev@gmail.com>
2020-06-12 13:17:23 -04:00
Marek Vasut
46c8b18734 net: rtl8139: Add DM support
Add support for driver model to the driver.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-12 13:17:23 -04:00
Marek Vasut
d8afb8b28e net: rtl8139: Read HW address from EEPROM only on probe
Do not re-read the HW address from the EEPROM on every start of
transfer, otherwise the user will not be able to adjust ethaddr
as needed. Read the address only once, when the card is detected.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-12 13:17:23 -04:00
Marek Vasut
2df3a51510 net: rtl8139: Use PCI_DEVICE() to define PCI device compat list
Use this macro to fully fill the PCI device ID table. This is mandatory
for the DM PCI support, which checks all the fields.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-12 13:17:23 -04:00
Marek Vasut
6a4a5c194d net: rtl8139: Split out common and non-DM functions
Split the driver into common and non-DM functionality, so that the
DM support can later re-use the common code, while we retain the
non-DM code until all the platforms are converted.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-12 13:17:23 -04:00
Marek Vasut
26f59c28bd net: rtl8139: Pass private data into rtl8139_eeprom_delay()
Instead of always calling rtl8139_eeprom_delay() with priv->ioaddr,
call it with priv and let the function access priv->ioaddr. This
reduces code duplication and has no impact, since the compiler will
inline this as needed anyway.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-12 13:17:23 -04:00
Marek Vasut
3feb6f7ff6 net: rtl8139: Introduce device private data
Introduce rtl8139_pdata, which is a super-structure around eth_device
and tracks per-device state, here the device IO address, PCI BDF, RX
and TX ring position. Pass this structure around instead of the old
non-DM eth_device in preparation for DM conversion.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-12 13:17:23 -04:00
Marek Vasut
8ff1d4a9c8 net: rtl8139: Clean up bus_to_phys()/phys_to_bus() macros
These macros depended on the dev variable being declared wherever
they were used. This is wrong and will not work with DM anyway, so
pass only the PCI BFD into these macros, which fixes the dependency
and prepares them for DM support as well.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-12 13:17:23 -04:00
Marek Vasut
f4385539f1 net: rtl8139: Use dev->iobase instead of custom ioaddr
Replace the use of custom static ioaddr variable with common dev->iobase,
no functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-12 13:17:23 -04:00
Marek Vasut
1ba8d98445 net: rtl8139: Switch from malloc()+memset() to calloc()
Replace malloc()+memset() combination with calloc(), no functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-12 13:17:23 -04:00
Marek Vasut
9962dd25b1 net: rtl8139: Factor out device name assignment
Pull the device name setting into a separate function, as this
will be shared between DM/non-DM variants.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-12 13:17:23 -04:00
Ravik Hasija
de5468e660 net: tftp: fix progress marker for file transfer
During packet sequence number wraparound the show_block_marker() API was
not called, as a result the progress marker doesn't stay within column
boundary. Use position in file instead of sequence number to align the
marker.

Signed-off-by: Ravik Hasija <rahasij@linux.microsoft.com>
Reviewed-By: Ramon Fried <rfried.dev@gmail.com>
2020-06-12 13:17:23 -04:00
Dan Murphy
8882238cc4 net: phy: Add DP8382x phy registration to TI PHY init
Add the DP8382X generic PHY registration to the TI PHY init file.

Acked-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Dan Murphy <dmurphy@ti.com>
2020-06-12 13:17:23 -04:00
Dan Murphy
bc0e578f90 net: phy: Add support for TI PHY init
ti_phy_init function was allocated to the DP83867 PHY.  This function
name is to generic for a specific PHY.  The function can be moved to a
TI specific file that can register all TI PHYs that are defined in the
defconfig.  The ti_phy_init file will contain all TI PHYs initialization
so that only phy_ti_init can be called from the framework.

In addition to the above the config flag for the DP83867 needs to be changed
in the Kconfig and dependent defconfig files. The config flag that was
used for the DP83867 was also generic in nature so a more specific
config flag for the DP83867 was created.

Acked-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Dan Murphy <dmurphy@ti.com>
2020-06-12 13:17:23 -04:00
Dan Murphy
535247a9e4 net: phy: Add helper routines to set and clear bits
Add phy_set/clear_bit helper routines so that ported drivers from the
kernel can use these functions.

Acked-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Dan Murphy <dmurphy@ti.com>
2020-06-12 13:17:23 -04:00
Dan Murphy
ea756fb8b7 net: phy: Fix kernel doc issues in phy.h
Fix kernel doc warnings in phy.h.  Mostly the warnings were due to the
return missing the semi-colon.

Acked-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Dan Murphy <dmurphy@ti.com>
2020-06-12 13:17:23 -04:00
Dan Murphy
6325c8bc48 net: phy: Add missing kernel doc to phy functions
Add kernel doc to the phy_read/write utility functions in phy.h

Acked-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Dan Murphy <dmurphy@ti.com>
2020-06-12 13:17:23 -04:00
Florin Chiculita
9c6de508a6 net: phy: add phyid search in vendor specific space
There are devices accesible through mdio clause-45, such as
retimers, that do not have PMA or PCS blocks.
This patch adds MDIO_MMD_VEND1 on the list of device addresses
where phyid is searched. Previous order of devices was kept.

Signed-off-by: Florin Chiculita <florinlaurentiu.chiculita@nxp.com>
Reviewed-by: Madalin Bucur <madalin.bucur@oss.nxp.com>
2020-06-12 13:17:23 -04:00
Tom Warren
a7a435e7d4 net: rt8169: WAR for DHCP not getting IP after kernel boot/reboot
This is a WAR for DHCP failure after rebooting from the L4T kernel. The
r8169.c kernel driver is setting bit 19 of the rt816x HW register 0xF0,
which goes by FuncEvent and MISC in various driver source/datasheets.
That bit is called RxDv_Gated_En in the r8169.c kernel driver. Clear it
here at the end of probe to ensure that U-Boot can get an IP assigned
via DHCP.

Signed-off-by: Tom Warren <twarren@nvidia.com>
2020-06-12 13:17:23 -04:00
Bryan O'Donoghue
baafd99d13 net: phy: micrel: ksz8061 implement errata 80000688A fix
Linux commit 232ba3a51cc2 ('net: phy: Micrel KSZ8061: link failure after
cable connect') implements a fix for the above errata.

This patch replicates that errata fix in an ksz8061 specific init routine.

Signed-off-by: Bryan O'Donoghue <bod@denx.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2020-06-12 13:17:23 -04:00
Marek Vasut
73d7aec0b1 net: smc911x: Drop the standalone EEPROM example
Drop the example, for two reasons. First, it is tapping directly into
the IO accessors of the SMC911x, while it should instead go through
the net device API. Second, this makes conversion of the SMC911x driver
to DM real hard.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Tom Rini <trini@konsulko.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2020-06-12 13:17:23 -04:00
Krebs, Olaf
808f13d8fc net: Fix error if some network features are disabled
If 'CONFIG_CMD_TFTPBOOT' or 'CONFIG_CMD_BOOTP' are disabled, the usage must be disabled, too!

Signed-off-by: Olaf Krebs <olaf.krebs@emh-metering.com>
CC: Joe Hershberger <joe.hershberger@ni.com>
2020-06-12 13:17:23 -04:00
Denis 'GNUtoo' Carikli
f3767bcb31 board: tbs2910: add documentation
This documents the u-boot installation procedure and the
hardware in order to get started.

Signed-off-by: Denis 'GNUtoo' Carikli <GNUtoo@cyberdimension.org>
[trini: Add MAINTAINERS entry for doc file per Soeren's request]
2020-06-12 13:17:23 -04:00
Denis 'GNUtoo' Carikli
9658884f3d board: tbs2910: Enable distro_boot support.
This keeps the compatibility with the old bootcmd.

The fdtfile environment variable also needed to be set to
imx6q-tbs2910.dtb to enable booting mainline kernels
otherwise with extlinux.conf it tries to load
mx6-tbs2910.dtb instead.

With arm-linux-gnueabi-gcc 9.2.0-1 from the Parabola
GNU/Linux distribution, we have the following size
differences:
- text: +2041 bytes
- data: 0 bytes
- bss: 0 bytes
- total: +2041 bytes

Signed-off-by: Denis 'GNUtoo' Carikli <GNUtoo@cyberdimension.org>
Reviewed-by: Soeren Moch <smoch@web.de>
2020-06-12 13:17:23 -04:00
Denis 'GNUtoo' Carikli
e63ab4527e board: tbs2910_defconfig: Add support for booting general purpose distributions
This is needed to enable distro_boot support later on.

Adding the necessary configuration to enable booting general
purpose distributions is typically done by enabling
CONFIG_DISTRO_DEFAULTS.

However the resulting image size is is already very close to
the size limit and PXE isn't strictly needed, so instead we
made sure that all the configuration selected by
CONFIG_DISTRO_DEFAULTS were selected, with the exception of
PXE related configuration (CONFIG_BOOTP_PXE and
CONFIG_CMD_PXE) that are both disabled.

With arm-linux-gnueabi-gcc 9.3.0-1 from the Parabola
GNU/Linux distribution, we have the following size
differences:
- text: +7526 bytes
- data: +28 bytes
- bss: -12 bytes
- total: +7542 bytes

Signed-off-by: Denis 'GNUtoo' Carikli <GNUtoo@cyberdimension.org>
Reviewed-by: Soeren Moch <smoch@web.de>
2020-06-12 13:17:23 -04:00
Denis 'GNUtoo' Carikli
0c7550f03a board: tbs2910: move CONFIG_BOOTCOMMAND from header to defconfig
This doesn't affect the size of the image: with
arm-linux-gnueabi-gcc 9.2.0-1 from the Parabola GNU/Linux
distribution, the text, data, bss and total sizes remain
unchanged.

Signed-off-by: Denis 'GNUtoo' Carikli <GNUtoo@cyberdimension.org>
Reviewed-by: Soeren Moch <smoch@web.de>
2020-06-12 13:17:23 -04:00
Denis 'GNUtoo' Carikli
b3e5d29379 board: tbs2910: disable CONFIG_GZIP
As that the resulting image is already very close to the
size limit, and that CONFIG_GZIP is not strictly required,
removing it shouldn't hurt.

With arm-linux-gnueabi-gcc 9.2.0-1 from the Parabola
GNU/Linux distribution we have the following size
reduction:
- text: 9752
- data: 0
- bss: 16
- total: 9768

Signed-off-by: Denis 'GNUtoo' Carikli <GNUtoo@cyberdimension.org>
Acked-by: Soeren Moch <smoch@web.de>
2020-06-12 13:17:23 -04:00
Denis 'GNUtoo' Carikli
9fd573c8fb board: tbs2910: disable loadb and loads commands
The loadb and loads commands are not needed for booting.

There are also more reliable and faster alternatives to
loadb and loads that can be used with the current configuration.

As that the resulting image is already very close to the
size limit, removing the loadb and loads commands shouldn't
hurt.

With arm-linux-gnueabi-gcc 9.2.0-1 from the Parabola
GNU/Linux distribution we have the following size
reduction:
- text: 6733 bytes
- data: 116 bytes
- bss: 1172 bytes
- total: 8021 bytes

Signed-off-by: Denis 'GNUtoo' Carikli <GNUtoo@cyberdimension.org>
Acked-by: Soeren Moch <smoch@web.de>
2020-06-12 13:17:23 -04:00
Reuben Dowle
d16b38f427 Add support for SHA384 and SHA512
The current recommendation for best security practice from the US government
is to use SHA384 for TOP SECRET [1].

This patch adds support for SHA384 and SHA512 in the hash command, and also
allows FIT images to be hashed with these algorithms, and signed with
sha384,rsaXXXX and sha512,rsaXXXX

The SHA implementation is adapted from the linux kernel implementation.

[1] Commercial National Security Algorithm Suite
http://www.iad.gov/iad/programs/iad-initiatives/cnsa-suite.cfm

Signed-off-by: Reuben Dowle <reuben.dowle@4rf.com>
2020-06-12 13:14:07 -04:00
Dario Binacchi
cea8f2c995 doc: driver-model: fix typo in design.rst
Fix the 'memeber' typo in doc/driver-model/design.rst.

Signed-off-by: Dario Binacchi <dariobin@libero.it>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-06-11 20:52:11 -06:00
Michael Walle
be1a6e9425 dm: uclass: don't assign aliased seq numbers
If there are aliases for an uclass, set the base for the "dynamically"
allocated numbers next to the highest alias.

Please note, that this might lead to holes in the sequences, depending
on the device tree. For example if there is only an alias "ethernet1",
the next device seq number would be 2.

In particular this fixes a problem with boards which are using ethernet
aliases but also might have network add-in cards like the E1000. If the
board is started with the add-in card and depending on the order of the
drivers, the E1000 might occupy the first ethernet device and mess up
all the hardware addresses, because the devices are now shifted by one.

Also adapt the test cases to the new handling and add test cases
checking the holes in the seq numbers.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Alex Marginean <alexandru.marginean@nxp.com>
Tested-by: Alex Marginean <alexandru.marginean@nxp.com>
Acked-by: Vladimir Oltean <olteanv@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Michal Simek <michal.simek@xilinx.com> [on zcu102-revA]
2020-06-11 20:52:11 -06:00
Michael Walle
0a6b75f7d8 dm: core: fix dev_read_alias_highest_id() without libfdt
If CONFIG_DM_DEV_READ_INLINE is set, dev_read_alias_highest_id() calls
libfdt_get_highest_id(). But this function is only available if we have
libfdt compiled in. If its not available return -1, which matches the
return code for no alias found.

This fixes the following error on omapl138_lcdk:
arm-linux-gnueabi-ld.bfd: drivers/built-in.o: in function `dev_read_alias_highest_id':
/home/mw/repo/u-boot/include/dm/read.h:986: undefined reference to `fdtdec_get_alias_highest_id'

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-06-11 20:52:11 -06:00
Michael Walle
c03b7612ea usb: provide a device tree node to USB devices
It is possible to specify a device tree node for an USB device. This is
useful if you have a static USB setup and want to use aliases which
point to these nodes, like on the Raspberry Pi.
The nodes are matched against their hub port number, the compatible
strings are not matched for now.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-06-11 20:52:11 -06:00
Heinrich Schuchardt
77007f9543 log: check argument of 'log level' command
Check that the argument provided to the 'log level' command is in the range
between zero and CONFIG_LOG_MAX_LEVEL.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-06-11 20:52:11 -06:00
Heinrich Schuchardt
7b6c34cb15 log: clean up Kconfig
LOG_DEFAULT_LEVEL has been chosen as 6. Adjust the default of LOG_MAX_LEVEL
to this value.

Use ranges to clamp log levels to reasonable values.

Group output options by main U-Boot, SPL, TPL, followed by other logging
options.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-06-11 20:52:11 -06:00
Heinrich Schuchardt
a7813918fe doc: move README.log to HTML documentation
Convert README.log to reStructuredText and add it to the generated HTML
documentation.

Assign doc/develop/logging.rst to the maintainer of LOGGING.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-06-11 20:52:11 -06:00
Patrick Delaunay
b44c751efe doc: log: correct option name CONFIG_LOG_MAX_LEVEL
Replace CONFIG_(SPL_)MAX_LOG_LEVEL by the correct name as defined in
common/Kconfig:
line 668:config LOG_MAX_LEVEL
line 688:config SPL_LOG_MAX_LEVEL
line 708:config TPL_LOG_MAX_LEVEL

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-06-11 20:52:11 -06:00
Pratyush Yadav
b59889bf34 regmap: Check for out-of-range offsets before mapping them
In regmap_raw_{read,write}_range(), offsets are checked to make sure
they aren't out of range. But this check happens _after_ the address is
mapped from physical memory. Input should be sanity-checked before using
it. Mapping the address before validating it leaves the door open to
passing an invalid address to map_physmem(). So check for out of range
offsets _before_ mapping them.

This fixes a segmentation fault in sandbox when -1 is used as an offset
to regmap_{read,write}().

Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
2020-06-11 20:52:11 -06:00
Marcus Comstedt
42a768c689 libfdt: Remove superfluous NUL character from overlay symbols
The symbol path already ends with a NUL character (something which is
actually checked by the code) and this NUL is included in
rel_path_len, so there is no need to add a second one.

This change fixes incorrect display in "fdt list /__symbols" after
applying an overlay with symbols.

Signed-off-by: Marcus Comstedt <marcus@mc.pp.se>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-06-11 20:52:11 -06:00
Heinrich Schuchardt
2f8f5e2353 doc: driver-model: there is no UCLASS_SATA
%s/UCLASS_SATA/UCLASS_AHCI/g

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-06-11 20:52:11 -06:00
Bin Meng
f6704c7994 fdtdec: Honor #address-cells and #size-cells in fdtdec_add_reserved_memory()
At present fdtdec_add_reserved_memory() calls fdtdec_get_addr_size()
to get address and size for the subnodes of /reserved-memory node.

We should honor #address-cells and #size-cells properties in the
parent node.

Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-06-11 20:52:11 -06:00
Bin Meng
a9ad113df0 fdtdec: Fix the types of addr and size in fdtdec_add_reserved_memory()
fdtdec_get_addr_size() expects size is of type 'fdt_size_t', and
return value is of type 'fdt_addr_t'. Adjust their types accordingly.

Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-06-11 20:52:11 -06:00
Ovidiu Panait
7664b03ffc buildman: Remove _of_#_ from results directory paths
Currently, the following scenario will rebuild the first commit even
though it is not really necessary - the commit sha or the position in the
patchset did not change:

$ git am <local-patch-0001>
$ tools/buildman/buildman -P -E -W -b master mx6
<do some more development work>
$ git am <local-patch-0002>
$ tools/buildman/buildman -P -E -W -b master mx6 <- will rebuild the first
						    commit as well, even
						    though nothing has
						    changed about it.

This is due to the fact that previous results directories get removed
when the number of commits change. By removing the _of_#_ part of the
directory path, the commits will be rebuilt only if the commit sha or the
position in the patchset changes. Also, update the testcase to reflect this
change.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
2020-06-11 20:52:11 -06:00
Simon Glass
96daa41aab patman: Complain if a checkpatch line is not understood
Rather than suffering in silence, output a warning if something about the
checkpatch output cannot be understood.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-06-11 20:52:11 -06:00
Simon Glass
37f3bb53b7 patman: Support warnings in the patch subject
Sometimes checkpatch outputs problems in the patch subject. Add support
for parsing this output and reporting it correctly.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-06-11 20:52:11 -06:00
Simon Glass
666eb15e92 patman: Handle checkpatch output with notes and code
If checkpatch is configured to output code we should ignore it. Similarly,
notes should be ignored.

Update the logic to handle these situations.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-06-11 20:52:11 -06:00
Simon Glass
7175b085e1 patman: Don't try to process checkpatch lines twice
Once we have determined what the line refers to there is no point in
processing it further. Update the logic to continue to the next line in
these cases.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-06-11 20:52:10 -06:00
Simon Glass
7d5b5e8965 patman: Support emacs mode with checkpatch
If checkpatch is run in 'emacs' mode it shows the filename at the
start of each line. Add support for this so that the warnings and errors
are correctly detected.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-06-11 20:52:10 -06:00
Simon Glass
870bd56799 patman: Fix 'warning' typo
If no warnings are detected due to checkpatch having unexpected options,
patman currently shows an error:

   TypeError: unsupported operand type(s) for +=: 'int' and 'property'

Fix this by initing the variable correctly.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-06-11 20:52:10 -06:00
Tom Rini
f191f3a102 configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2020-06-11 15:16:10 -04:00
4639 changed files with 159766 additions and 53977 deletions

View File

@@ -2,7 +2,7 @@ variables:
windows_vm: vs2017-win2016
ubuntu_vm: ubuntu-18.04
macos_vm: macOS-10.15
ci_runner_image: trini/u-boot-gitlab-ci-runner:bionic-20200526-18Jun2020
ci_runner_image: trini/u-boot-gitlab-ci-runner:bionic-20200807-02Sep2020
# Add '-u 0' options for Azure pipelines, otherwise we get "permission
# denied" error when it tries to "useradd -m -u 1001 vsts_azpcontainer",
# since our $(ci_runner_image) user is not root.
@@ -14,30 +14,20 @@ jobs:
displayName: 'Ensure host tools build for Windows'
pool:
vmImage: $(windows_vm)
strategy:
matrix:
i686:
MSYS_DIR: msys32
BASE_REPO: msys2-ci-base-i686
x86_64:
MSYS_DIR: msys64
BASE_REPO: msys2-ci-base
steps:
- script: |
git clone https://github.com/msys2/$(BASE_REPO).git %CD:~0,2%\$(MSYS_DIR)
- powershell: |
(New-Object Net.WebClient).DownloadFile("https://github.com/msys2/msys2-installer/releases/download/2020-07-20/msys2-base-x86_64-20200720.sfx.exe", "sfx.exe")
displayName: 'Install MSYS2'
- script: |
set PATH=%CD:~0,2%\$(MSYS_DIR)\usr\bin;C:\Windows\system32;C:\Windows;C:\Windows\System32\Wbem
%CD:~0,2%\$(MSYS_DIR)\usr\bin\pacman --noconfirm -Syyuu
sfx.exe -y -o%CD:~0,2%\
%CD:~0,2%\msys64\usr\bin\bash -lc "pacman --noconfirm -Syyuu"
displayName: 'Update MSYS2'
- script: |
set PATH=%CD:~0,2%\$(MSYS_DIR)\usr\bin;C:\Windows\system32;C:\Windows;C:\Windows\System32\Wbem
%CD:~0,2%\$(MSYS_DIR)\usr\bin\pacman --noconfirm --needed -S make gcc bison diffutils openssl-devel
%CD:~0,2%\msys64\usr\bin\bash -lc "pacman --noconfirm --needed -S make gcc bison flex diffutils openssl-devel"
displayName: 'Install Toolchain'
- script: |
set PATH=C:\Windows\system32;C:\Windows;C:\Windows\System32\Wbem
echo make tools-only_defconfig tools-only NO_SDL=1 > build-tools.sh
%CD:~0,2%\$(MSYS_DIR)\usr\bin\bash -lc "bash build-tools.sh"
%CD:~0,2%\msys64\usr\bin\bash -lc "bash build-tools.sh"
displayName: 'Build Host Tools'
env:
# Tell MSYS2 we need a POSIX emulation layer
@@ -158,7 +148,7 @@ jobs:
./tools/binman/binman --toolpath ${UBOOT_TRAVIS_BUILD_DIR}/tools test
./tools/buildman/buildman -t
./tools/dtoc/dtoc -t
./tools/patman/patman --test
./tools/patman/patman test
make O=${UBOOT_TRAVIS_BUILD_DIR} testconfig
EOF
cat build.sh
@@ -226,6 +216,22 @@ jobs:
qemu_mips64el:
TEST_PY_BD: "qemu_mips64el"
TEST_PY_TEST_SPEC: "not sleep"
qemu_malta:
TEST_PY_BD: "malta"
TEST_PY_ID: "--id qemu"
TEST_PY_TEST_SPEC: "not sleep and not efi"
qemu_maltael:
TEST_PY_BD: "maltael"
TEST_PY_ID: "--id qemu"
TEST_PY_TEST_SPEC: "not sleep and not efi"
qemu_malta64:
TEST_PY_BD: "malta64"
TEST_PY_ID: "--id qemu"
TEST_PY_TEST_SPEC: "not sleep and not efi"
qemu_malta64el:
TEST_PY_BD: "malta64el"
TEST_PY_ID: "--id qemu"
TEST_PY_TEST_SPEC: "not sleep and not efi"
qemu_ppce500:
TEST_PY_BD: "qemu-ppce500"
TEST_PY_TEST_SPEC: "not sleep"
@@ -247,6 +253,18 @@ jobs:
qemu_x86_64:
TEST_PY_BD: "qemu-x86_64"
TEST_PY_TEST_SPEC: "not sleep"
r2dplus_i82557c:
TEST_PY_BD: "r2dplus"
TEST_PY_ID: "--id i82557c_qemu"
r2dplus_pcnet:
TEST_PY_BD: "r2dplus"
TEST_PY_ID: "--id pcnet_qemu"
r2dplus_rtl8139:
TEST_PY_BD: "r2dplus"
TEST_PY_ID: "--id rtl8139_qemu"
r2dplus_tulip:
TEST_PY_BD: "r2dplus"
TEST_PY_ID: "--id tulip_qemu"
xilinx_zynq_virt:
TEST_PY_BD: "xilinx_zynq_virt"
TEST_PY_ID: "--id qemu"
@@ -278,29 +296,31 @@ jobs:
ln -s travis-ci /tmp/uboot-test-hooks/py/`hostname`
grub-mkimage --prefix=\"\" -o ~/grub_x86.efi -O i386-efi normal echo lsefimmap lsefi lsefisystab efinet tftp minicmd
grub-mkimage --prefix=\"\" -o ~/grub_x64.efi -O x86_64-efi normal echo lsefimmap lsefi lsefisystab efinet tftp minicmd
cp /opt/grub/grubriscv64.efi ~/grub_riscv64.efi
cp /opt/grub/grubriscv32.efi ~/grub_riscv32.efi
cp /opt/grub/grubaa64.efi ~/grub_arm64.efi
cp /opt/grub/grubarm.efi ~/grub_arm.efi
if [[ "${TEST_PY_BD}" == "qemu-riscv32_spl" ]]; then
wget -O - https://github.com/riscv/opensbi/releases/download/v0.6/opensbi-0.6-rv32-bin.tar.xz | tar -C /tmp -xJ;
export OPENSBI=/tmp/opensbi-0.6-rv32-bin/platform/qemu/virt/firmware/fw_dynamic.bin;
wget -O - https://github.com/riscv/opensbi/releases/download/v0.8/opensbi-0.8-rv-bin.tar.xz | tar -C /tmp -xJ;
export OPENSBI=/tmp/opensbi-0.8-rv-bin/share/opensbi/ilp32/generic/firmware/fw_dynamic.bin;
fi
if [[ "${TEST_PY_BD}" == "qemu-riscv64_spl" ]]; then
wget -O - https://github.com/riscv/opensbi/releases/download/v0.6/opensbi-0.6-rv64-bin.tar.xz | tar -C /tmp -xJ;
export OPENSBI=/tmp/opensbi-0.6-rv64-bin/platform/qemu/virt/firmware/fw_dynamic.bin;
wget -O - https://github.com/riscv/opensbi/releases/download/v0.8/opensbi-0.8-rv-bin.tar.xz | tar -C /tmp -xJ;
export OPENSBI=/tmp/opensbi-0.8-rv-bin/share/opensbi/lp64/generic/firmware/fw_dynamic.bin;
fi
# the below corresponds to .gitlab-ci.yml "script"
cd ${WORK_DIR}
export UBOOT_TRAVIS_BUILD_DIR=/tmp/${TEST_PY_BD};
tools/buildman/buildman -o ${UBOOT_TRAVIS_BUILD_DIR} -w -E -W -e --board ${TEST_PY_BD} ${OVERRIDE}
cp ~/grub_x86.efi ${UBOOT_TRAVIS_BUILD_DIR}/
cp ~/grub_x64.efi ${UBOOT_TRAVIS_BUILD_DIR}/
cp /opt/grub/grubriscv64.efi ${UBOOT_TRAVIS_BUILD_DIR}/grub_riscv64.efi
cp /opt/grub/grubriscv32.efi ${UBOOT_TRAVIS_BUILD_DIR}/grub_riscv32.efi
cp /opt/grub/grubaa64.efi ${UBOOT_TRAVIS_BUILD_DIR}/grub_arm64.efi
cp /opt/grub/grubarm.efi ${UBOOT_TRAVIS_BUILD_DIR}/grub_arm.efi
virtualenv -p /usr/bin/python3 /tmp/venv
. /tmp/venv/bin/activate
pip install -r test/py/requirements.txt
export PATH=/opt/qemu/bin:/tmp/uboot-test-hooks/bin:${PATH};
export PYTHONPATH=/tmp/uboot-test-hooks/py/travis-ci;
# "${var:+"-k $var"}" expands to "" if $var is empty, "-k $var" if not
./test/py/test.py --bd ${TEST_PY_BD} ${TEST_PY_ID} ${TEST_PY_TEST_SPEC:+"-k ${TEST_PY_TEST_SPEC}"} --build-dir "$UBOOT_TRAVIS_BUILD_DIR";
./test/py/test.py -ra --bd ${TEST_PY_BD} ${TEST_PY_ID} ${TEST_PY_TEST_SPEC:+"-k ${TEST_PY_TEST_SPEC}"} --build-dir "$UBOOT_TRAVIS_BUILD_DIR";
# the below corresponds to .gitlab-ci.yml "after_script"
rm -rf /tmp/uboot-test-hooks /tmp/venv
EOF

View File

@@ -1,3 +1,6 @@
Please do not submit a Pull Request via github. Our project makes use of
mailing lists for patch submission and review. For more details please
see https://www.denx.de/wiki/U-Boot/Patches
The only exception to this is in order to trigger a CI loop on Azure prior
to posting of patches.

3
.gitignore vendored
View File

@@ -92,3 +92,6 @@ GTAGS
*.orig
*~
\#*#
# Python cache
__pycache__

View File

@@ -2,7 +2,7 @@
# Grab our configured image. The source for this is found at:
# https://gitlab.denx.de/u-boot/gitlab-ci-runner
image: trini/u-boot-gitlab-ci-runner:bionic-20200526-18Jun2020
image: trini/u-boot-gitlab-ci-runner:bionic-20200807-02Sep2020
# We run some tests in different order, to catch some failures quicker.
stages:
@@ -20,17 +20,13 @@ stages:
- ln -s travis-ci /tmp/uboot-test-hooks/py/`hostname`
- grub-mkimage --prefix="" -o ~/grub_x86.efi -O i386-efi normal echo lsefimmap lsefi lsefisystab efinet tftp minicmd
- grub-mkimage --prefix="" -o ~/grub_x64.efi -O x86_64-efi normal echo lsefimmap lsefi lsefisystab efinet tftp minicmd
- cp /opt/grub/grubriscv64.efi ~/grub_riscv64.efi
- cp /opt/grub/grubriscv32.efi ~/grub_riscv32.efi
- cp /opt/grub/grubaa64.efi ~/grub_arm64.efi
- cp /opt/grub/grubarm.efi ~/grub_arm.efi
- if [[ "${TEST_PY_BD}" == "qemu-riscv32_spl" ]]; then
wget -O - https://github.com/riscv/opensbi/releases/download/v0.6/opensbi-0.6-rv32-bin.tar.xz | tar -C /tmp -xJ;
export OPENSBI=/tmp/opensbi-0.6-rv32-bin/platform/qemu/virt/firmware/fw_dynamic.bin;
wget -O - https://github.com/riscv/opensbi/releases/download/v0.8/opensbi-0.8-rv-bin.tar.xz | tar -C /tmp -xJ;
export OPENSBI=/tmp/opensbi-0.8-rv-bin/share/opensbi/ilp32/generic/firmware/fw_dynamic.bin;
fi
- if [[ "${TEST_PY_BD}" == "qemu-riscv64_spl" ]]; then
wget -O - https://github.com/riscv/opensbi/releases/download/v0.6/opensbi-0.6-rv64-bin.tar.xz | tar -C /tmp -xJ;
export OPENSBI=/tmp/opensbi-0.6-rv64-bin/platform/qemu/virt/firmware/fw_dynamic.bin;
wget -O - https://github.com/riscv/opensbi/releases/download/v0.8/opensbi-0.8-rv-bin.tar.xz | tar -C /tmp -xJ;
export OPENSBI=/tmp/opensbi-0.8-rv-bin/share/opensbi/lp64/generic/firmware/fw_dynamic.bin;
fi
after_script:
@@ -40,13 +36,19 @@ stages:
- export UBOOT_TRAVIS_BUILD_DIR=/tmp/${TEST_PY_BD}
- tools/buildman/buildman -o ${UBOOT_TRAVIS_BUILD_DIR} -w -E -W -e
--board ${TEST_PY_BD} ${OVERRIDE}
- cp ~/grub_x86.efi $UBOOT_TRAVIS_BUILD_DIR/
- cp ~/grub_x64.efi $UBOOT_TRAVIS_BUILD_DIR/
- cp /opt/grub/grubriscv64.efi $UBOOT_TRAVIS_BUILD_DIR/grub_riscv64.efi
- cp /opt/grub/grubriscv32.efi $UBOOT_TRAVIS_BUILD_DIR/grub_riscv32.efi
- cp /opt/grub/grubaa64.efi $UBOOT_TRAVIS_BUILD_DIR/grub_arm64.efi
- cp /opt/grub/grubarm.efi $UBOOT_TRAVIS_BUILD_DIR/grub_arm.efi
- virtualenv -p /usr/bin/python3 /tmp/venv
- . /tmp/venv/bin/activate
- pip install -r test/py/requirements.txt
# "${var:+"-k $var"}" expands to "" if $var is empty, "-k $var" if not
- export PATH=/opt/qemu/bin:/tmp/uboot-test-hooks/bin:${PATH};
export PYTHONPATH=/tmp/uboot-test-hooks/py/travis-ci;
./test/py/test.py --bd ${TEST_PY_BD} ${TEST_PY_ID}
./test/py/test.py -ra --bd ${TEST_PY_BD} ${TEST_PY_ID}
${TEST_PY_TEST_SPEC:+"-k ${TEST_PY_TEST_SPEC}"}
--build-dir "$UBOOT_TRAVIS_BUILD_DIR"
@@ -167,7 +169,7 @@ Run binman, buildman, dtoc, Kconfig and patman testsuites:
./tools/binman/binman --toolpath ${UBOOT_TRAVIS_BUILD_DIR}/tools test;
./tools/buildman/buildman -t;
./tools/dtoc/dtoc -t;
./tools/patman/patman --test;
./tools/patman/patman test;
make testconfig
Run tests for Nokia RX-51 (aka N900):
@@ -276,6 +278,38 @@ qemu_mips64el test.py:
TEST_PY_TEST_SPEC: "not sleep"
<<: *buildman_and_testpy_dfn
qemu_malta test.py:
tags: [ 'all' ]
variables:
TEST_PY_BD: "malta"
TEST_PY_TEST_SPEC: "not sleep and not efi"
TEST_PY_ID: "--id qemu"
<<: *buildman_and_testpy_dfn
qemu_maltael test.py:
tags: [ 'all' ]
variables:
TEST_PY_BD: "maltael"
TEST_PY_TEST_SPEC: "not sleep and not efi"
TEST_PY_ID: "--id qemu"
<<: *buildman_and_testpy_dfn
qemu_malta64 test.py:
tags: [ 'all' ]
variables:
TEST_PY_BD: "malta64"
TEST_PY_TEST_SPEC: "not sleep and not efi"
TEST_PY_ID: "--id qemu"
<<: *buildman_and_testpy_dfn
qemu_malta64el test.py:
tags: [ 'all' ]
variables:
TEST_PY_BD: "malta64el"
TEST_PY_TEST_SPEC: "not sleep and not efi"
TEST_PY_ID: "--id qemu"
<<: *buildman_and_testpy_dfn
qemu-ppce500 test.py:
tags: [ 'all' ]
variables:
@@ -325,6 +359,34 @@ qemu-x86_64 test.py:
TEST_PY_TEST_SPEC: "not sleep"
<<: *buildman_and_testpy_dfn
r2dplus_i82557c test.py:
tags: [ 'all' ]
variables:
TEST_PY_BD: "r2dplus"
TEST_PY_ID: "--id i82557c_qemu"
<<: *buildman_and_testpy_dfn
r2dplus_pcnet test.py:
tags: [ 'all' ]
variables:
TEST_PY_BD: "r2dplus"
TEST_PY_ID: "--id pcnet_qemu"
<<: *buildman_and_testpy_dfn
r2dplus_rtl8139 test.py:
tags: [ 'all' ]
variables:
TEST_PY_BD: "r2dplus"
TEST_PY_ID: "--id rtl8139_qemu"
<<: *buildman_and_testpy_dfn
r2dplus_tulip test.py:
tags: [ 'all' ]
variables:
TEST_PY_BD: "r2dplus"
TEST_PY_ID: "--id tulip_qemu"
<<: *buildman_and_testpy_dfn
xilinx_zynq_virt test.py:
tags: [ 'all' ]
variables:

View File

@@ -23,7 +23,6 @@ addons:
- build-essential
- libsdl2-dev
- python
- python-pyelftools
- python3-sphinx
- python3-virtualenv
- python3-pip
@@ -52,6 +51,7 @@ addons:
- sbsigntool
- fakeroot
- mtd-utils
- squashfs-tools
install:
# Clone uboot-test-hooks
@@ -204,12 +204,12 @@ before_script:
popd;
fi
- if [[ "${TEST_PY_BD}" == "qemu-riscv32_spl" ]]; then
wget -O - https://github.com/riscv/opensbi/releases/download/v0.6/opensbi-0.6-rv32-bin.tar.xz | tar -C /tmp -xJ;
export OPENSBI=/tmp/opensbi-0.6-rv32-bin/platform/qemu/virt/firmware/fw_dynamic.bin;
wget -O - https://github.com/riscv/opensbi/releases/download/v0.8/opensbi-0.8-rv-bin.tar.xz | tar -C /tmp -xJ;
export OPENSBI=/tmp/opensbi-0.8-rv-bin/share/opensbi/ilp32/generic/firmware/fw_dynamic.bin;
fi
- if [[ "${TEST_PY_BD}" == "qemu-riscv64_spl" ]]; then
wget -O - https://github.com/riscv/opensbi/releases/download/v0.6/opensbi-0.6-rv64-bin.tar.xz | tar -C /tmp -xJ;
export OPENSBI=/tmp/opensbi-0.6-rv64-bin/platform/qemu/virt/firmware/fw_dynamic.bin;
wget -O - https://github.com/riscv/opensbi/releases/download/v0.8/opensbi-0.8-rv-bin.tar.xz | tar -C /tmp -xJ;
export OPENSBI=/tmp/opensbi-0.8-rv-bin/share/opensbi/lp64/generic/firmware/fw_dynamic.bin;
fi
script:
@@ -250,14 +250,15 @@ script:
virtualenv -p /usr/bin/python3 /tmp/venv;
. /tmp/venv/bin/activate;
pip install -r test/py/requirements.txt;
./test/py/test.py --bd ${TEST_PY_BD} ${TEST_PY_ID}
./test/py/test.py -ra --bd ${TEST_PY_BD} ${TEST_PY_ID}
${TEST_PY_TEST_SPEC:+"-k ${TEST_PY_TEST_SPEC}"}
--build-dir "$UBOOT_TRAVIS_BUILD_DIR" || exit;
if [[ -n "${TEST_PY_TOOLS}" ]]; then
export PYTHONPATH="${UBOOT_TRAVIS_BUILD_DIR}/scripts/dtc/pylibfdt";
export PATH="${UBOOT_TRAVIS_BUILD_DIR}/scripts/dtc:${PATH}";
pip install pyelftools &&
./tools/binman/binman --toolpath ${UBOOT_TRAVIS_BUILD_DIR}/tools test &&
./tools/patman/patman --test &&
./tools/patman/patman test &&
./tools/buildman/buildman -t &&
./tools/dtoc/dtoc -t &&
make testconfig;
@@ -573,6 +574,34 @@ matrix:
TEST_PY_TEST_SPEC="not sleep"
QEMU_TARGET="mips64el-softmmu"
TOOLCHAIN="mips"
- name: "test/py qemu-malta"
env:
- TEST_PY_BD="malta"
TEST_PY_TEST_SPEC="not sleep and not efi"
TEST_PY_ID="--id qemu"
QEMU_TARGET="mips-softmmu"
TOOLCHAIN="mips"
- name: "test/py qemu-maltael"
env:
- TEST_PY_BD="maltael"
TEST_PY_TEST_SPEC="not sleep and not efi"
TEST_PY_ID="--id qemu"
QEMU_TARGET="mipsel-softmmu"
TOOLCHAIN="mips"
- name: "test/py qemu-malta64"
env:
- TEST_PY_BD="malta64"
TEST_PY_TEST_SPEC="not sleep and not efi"
TEST_PY_ID="--id qemu"
QEMU_TARGET="mips64-softmmu"
TOOLCHAIN="mips"
- name: "test/py qemu-malta64el"
env:
- TEST_PY_BD="malta64el"
TEST_PY_TEST_SPEC="not sleep and not efi"
TEST_PY_ID="--id qemu"
QEMU_TARGET="mips64el-softmmu"
TOOLCHAIN="mips"
- name: "test/py qemu-ppce500"
env:
- TEST_PY_BD="qemu-ppce500"
@@ -617,6 +646,34 @@ matrix:
QEMU_TARGET="x86_64-softmmu"
TOOLCHAIN="i386"
BUILD_ROM="yes"
- name: "test/py r2dplus_i82557c"
env:
- TEST_PY_BD="r2dplus"
TEST_PY_ID="--id i82557c_qemu"
QEMU_TARGET="sh4-softmmu"
BUILDMAN="sh -x arm"
TOOLCHAIN="sh"
- name: "test/py r2dplus_pcnet"
env:
- TEST_PY_BD="r2dplus"
TEST_PY_ID="--id pcnet_qemu"
QEMU_TARGET="sh4-softmmu"
BUILDMAN="sh -x arm"
TOOLCHAIN="sh"
- name: "test/py r2dplus_rtl8139"
env:
- TEST_PY_BD="r2dplus"
TEST_PY_ID="--id rtl8139_qemu"
QEMU_TARGET="sh4-softmmu"
BUILDMAN="sh -x arm"
TOOLCHAIN="sh"
- name: "test/py r2dplus_tulip"
env:
- TEST_PY_BD="r2dplus"
TEST_PY_ID="--id tulip_qemu"
QEMU_TARGET="sh4-softmmu"
BUILDMAN="sh -x arm"
TOOLCHAIN="sh"
- name: "test/py xilinx_zynq_virt"
env:
- TEST_PY_BD="xilinx_zynq_virt"

154
Kconfig
View File

@@ -5,6 +5,10 @@
#
mainmenu "U-Boot $(UBOOTVERSION) Configuration"
comment "Compiler: $(CC_VERSION_TEXT)"
source "scripts/Kconfig.include"
# Allow defaults in arch-specific code to override any given here
source "arch/Kconfig"
@@ -62,6 +66,35 @@ config CC_OPTIMIZE_FOR_SIZE
This option is enabled by default for U-Boot.
config OPTIMIZE_INLINING
bool "Allow compiler to uninline functions marked 'inline' in full U-Boot"
default n
help
This option determines if U-Boot forces gcc to inline the functions
developers have marked 'inline'. Doing so takes away freedom from gcc to
do what it thinks is best, which is desirable in some cases for size
reasons.
config SPL_OPTIMIZE_INLINING
bool "Allow compiler to uninline functions marked 'inline' in SPL"
depends on SPL
default n
help
This option determines if U-Boot forces gcc to inline the functions
developers have marked 'inline'. Doing so takes away freedom from gcc to
do what it thinks is best, which is desirable in some cases for size
reasons.
config TPL_OPTIMIZE_INLINING
bool "Allow compiler to uninline functions marked 'inline' in TPL"
depends on TPL
default n
help
This option determines if U-Boot forces gcc to inline the functions
developers have marked 'inline'. Doing so takes away freedom from gcc to
do what it thinks is best, which is desirable in some cases for size
reasons.
config CC_COVERAGE
bool "Enable code coverage analysis"
depends on SANDBOX
@@ -69,6 +102,27 @@ config CC_COVERAGE
Enabling this option will pass "--coverage" to gcc to compile
and link code instrumented for coverage analysis.
config CC_HAS_ASM_INLINE
def_bool $(success,echo 'void foo(void) { asm inline (""); }' | $(CC) -x c - -c -o /dev/null)
config XEN
bool "Select U-Boot be run as a bootloader for XEN Virtual Machine"
help
Enabling this option will make U-Boot be run as a bootloader
for XEN [1] Virtual Machine.
Xen is a virtual machine monitor (VMM) or a type-1 hypervisor with support
for para-virtualization. Xen can organize the safe execution of several
virtual machines on the same physical system with performance close to
native. It is used as the basis for a number of different commercial and
open source applications, such as: server virtualization, Infrastructure
as a Service (IaaS), desktop virtualization, security applications,
embedded and hardware appliances.
Xen has a special VM called Domain-0 that runs the Dom0 kernel and allows
Xen to use the device drivers for the Domain-0 kernel by default.
[1] - https://xenproject.org/
config DISTRO_DEFAULTS
bool "Select defaults suitable for booting general purpose Linux distributions"
select AUTO_COMPLETE
@@ -240,9 +294,28 @@ config PHYS_64BIT
This can be used not only for 64bit SoCs, but also for
large physical address extension on 32bit SoCs.
config HAS_ROM
bool
select BINMAN
help
Enables building of a u-boot.rom target. This collects U-Boot and
any necessary binary blobs.
config ROM_NEEDS_BLOBS
bool
depends on HAS_ROM
help
Enable this if building the u-boot.rom target needs binary blobs, and
so cannot be done normally. In this case, U-Boot will only build the
ROM if the required blobs exist. If not, you will see an warning like:
Image 'main-section' is missing external blobs and is non-functional:
intel-descriptor intel-me intel-refcode intel-vga intel-mrc
config BUILD_ROM
bool "Build U-Boot as BIOS replacement"
depends on X86
depends on HAS_ROM
default y if !ROM_NEEDS_BLOBS
help
This option allows to build a ROM version of U-Boot.
The build process generally requires several binary blobs
@@ -266,7 +339,7 @@ config BUILD_TARGET
default "u-boot-with-spl.sfp" if TARGET_SOCFPGA_GEN5
default "u-boot-spl.kwb" if ARCH_MVEBU && SPL
default "u-boot-elf.srec" if RCAR_GEN3
default "u-boot.itb" if SPL_LOAD_FIT && (ARCH_ROCKCHIP || \
default "u-boot.itb" if !BINMAN && SPL_LOAD_FIT && (ARCH_ROCKCHIP || \
ARCH_SUNXI || RISCV || ARCH_ZYNQMP)
default "u-boot.kwb" if ARCH_KIRKWOOD
default "u-boot-with-spl.bin" if ARCH_AT91 && SPL_NAND_SUPPORT
@@ -314,6 +387,41 @@ config PLATFORM_ELFENTRY
default "__start" if MIPS
default "_start"
config STACK_SIZE
hex "Define max stack size that can be used by U-Boot"
default 0x4000000 if ARCH_VERSAL || ARCH_ZYNQMP
default 0x200000 if MICROBLAZE
default 0x1000000
help
Define Max stack size that can be used by U-Boot. This value is used
by the UEFI sub-system. On some boards initrd_high is calculated as
base stack pointer minus this stack size.
config SYS_HAS_SRAM
bool
default y if TARGET_PIC32MZDASK
default y if TARGET_DEVKIT8000
default y if TARGET_TRICORDER
default n
help
Enable this to allow support for the on board SRAM.
SRAM base address is controlled by CONFIG_SYS_SRAM_BASE.
SRAM size is controlled by CONFIG_SYS_SRAM_SIZE.
config SYS_SRAM_BASE
hex
default 0x80000000 if TARGET_PIC32MZDASK
default 0x40200000 if TARGET_DEVKIT8000
default 0x40200000 if TARGET_TRICORDER
default 0x0
config SYS_SRAM_SIZE
hex
default 0x00080000 if TARGET_PIC32MZDASK
default 0x10000 if TARGET_DEVKIT8000
default 0x10000 if TARGET_TRICORDER
default 0x0
endmenu # General setup
menu "Boot images"
@@ -358,12 +466,26 @@ config FIT_ENABLE_SHA256_SUPPORT
help
Enable this to support SHA256 checksum of FIT image contents. A
SHA256 checksum is a 256-bit (32-byte) hash value used to check that
the image contents have not been corrupted. SHA256 is recommended
for use in secure applications since (as at 2016) there is no known
feasible attack that could produce a 'collision' with differing
input data. Use this for the highest security. Note that only the
SHA256 variant is supported: SHA512 and others are not currently
supported in U-Boot.
the image contents have not been corrupted.
config FIT_ENABLE_SHA384_SUPPORT
bool "Support SHA384 checksum of FIT image contents"
default n
select SHA384
help
Enable this to support SHA384 checksum of FIT image contents. A
SHA384 checksum is a 384-bit (48-byte) hash value used to check that
the image contents have not been corrupted. Use this for the highest
security.
config FIT_ENABLE_SHA512_SUPPORT
bool "Support SHA512 checksum of FIT image contents"
default n
select SHA512
help
Enable this to support SHA512 checksum of FIT image contents. A
SHA512 checksum is a 512-bit (64-byte) hash value used to check that
the image contents have not been corrupted.
config FIT_SIGNATURE
bool "Enable signature verification of FIT uImages"
@@ -459,6 +581,8 @@ config SPL_FIT_SIGNATURE
bool "Enable signature verification of FIT firmware within SPL"
depends on SPL_DM
select SPL_FIT
select SPL_CRYPTO_SUPPORT
select SPL_HASH_SUPPORT
select SPL_RSA
select SPL_RSA_VERIFY
select SPL_IMAGE_SIGN_INFO
@@ -474,6 +598,14 @@ config SPL_LOAD_FIT
particular it can handle selecting from multiple device tree
and passing the correct one to U-Boot.
config SPL_LOAD_FIT_ADDRESS
hex "load address of fit image"
depends on SPL_LOAD_FIT
default 0x0
help
Specify the load address of the fit image that will be loaded
by SPL.
config SPL_LOAD_FIT_APPLY_OVERLAY
bool "Enable SPL applying DT overlays from FIT"
depends on SPL_LOAD_FIT
@@ -525,9 +657,13 @@ config SPL_FIT_SOURCE
U-Boot FIT image. This could specify further image to load and/or
execute.
config USE_SPL_FIT_GENERATOR
bool "Use a script to generate the .its script"
default y if SPL_FIT
config SPL_FIT_GENERATOR
string ".its file generator script for U-Boot FIT image"
depends on SPL_FIT
depends on USE_SPL_FIT_GENERATOR
default "board/sunxi/mksunxi_fit_atf.sh" if SPL_LOAD_FIT && ARCH_SUNXI
default "arch/arm/mach-rockchip/make_fit_atf.py" if SPL_LOAD_FIT && ARCH_ROCKCHIP
default "arch/arm/mach-zynqmp/mkimage_fit_atf.sh" if SPL_LOAD_FIT && ARCH_ZYNQMP

View File

@@ -149,5 +149,6 @@ BSD 3-clause "New" or "Revised" License BSD-3-Clause Y bsd-3-clause.txt http:/
IBM PIBS (PowerPC Initialization and IBM-pibs ibm-pibs.txt
Boot Software) license
ISC License ISC Y isc.txt https://spdx.org/licenses/ISC
MIT License MIT Y mit.txt https://spdx.org/licenses/MIT.html
SIL OPEN FONT LICENSE (OFL-1.1) OFL-1.1 Y OFL.txt https://spdx.org/licenses/OFL-1.1.html
X11 License X11 x11.txt https://spdx.org/licenses/X11.html

20
Licenses/mit.txt Normal file
View File

@@ -0,0 +1,20 @@
MIT License
Copyright (c) 2020 EPAM Systems Inc.
Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal
in the Software without restriction, including without limitation the rights
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
copies of the Software, and to permit persons to whom the Software is
furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in all
copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
SOFTWARE.

View File

@@ -148,6 +148,18 @@ F: include/configs/meson64_android.h
F: doc/board/amlogic/
N: meson
ARM ASPEED
M: Ryan Chen <ryan_chen@aspeedtech.com>
M: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
R: Aspeed BMC SW team <BMC-SW@aspeedtech.com>
S: Maintained
F: arch/arm/mach-aspeed/
F: arch/arm/include/asm/arch-aspeed/
F: board/aspeed/
F: drivers/clk/aspeed/
F: drivers/pinctrl/aspeed/
N: aspeed
ARM BROADCOM BCM283X
M: Matthias Brugger <mbrugger@suse.com>
S: Maintained
@@ -181,7 +193,10 @@ F: board/cortina/common/
F: drivers/gpio/cortina_gpio.c
F: drivers/watchdog/cortina_wdt.c
F: drivers/serial/serial_cortina.c
F: drivers/led/led_cortina.c
F: drivers/mmc/ca_dw_mmc.c
F: drivers/i2c/i2c-cortina.c
F: drivers/i2c/i2c-cortina.h
ARM/CZ.NIC TURRIS MOX SUPPORT
M: Marek Behun <marek.behun@nic.cz>
@@ -216,6 +231,13 @@ F: arch/arm/cpu/armv8/hisilicon
F: arch/arm/include/asm/arch-hi6220/
F: arch/arm/include/asm/arch-hi3660/
ARM IPQ40XX
M: Robert Marko <robert.marko@sartura.hr>
M: Luka Kovacic <luka.kovacic@sartura.hr>
M: Luka Perkov <luka.perkov@sartura.hr>
S: Maintained
F: arch/arm/mach-ipq40xx/
ARM MARVELL KIRKWOOD ARMADA-XP ARMADA-38X ARMADA-37XX ARMADA-7K/8K
M: Stefan Roese <sr@denx.de>
S: Maintained
@@ -271,6 +293,23 @@ F: arch/arm/mach-at91/
F: board/atmel/
F: drivers/misc/microchip_flexcom.c
ARM NEXELL S5P4418
M: Stefan Bosch <stefan_b@posteo.net>
S: Maintained
F: arch/arm/cpu/armv7/s5p4418/
F: arch/arm/dts/s5p4418*
F: arch/arm/mach-nexell/
F: board/friendlyarm/
F: configs/s5p4418_nanopi2_defconfig
F: doc/README.s5p4418
F: drivers/gpio/nx_gpio.c
F: drivers/i2c/nx_i2c.c
F: drivers/mmc/nexell_dw_mmc_dm.c
F: drivers/pinctrl/nexell/
F: drivers/video/nexell/
F: drivers/video/nexell_display.c
F: include/configs/s5p4418_nanopi2.h
ARM OWL
M: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
S: Maintained
@@ -467,9 +506,7 @@ F: arch/arm/mach-u8500/
F: drivers/timer/nomadik-mtu-timer.c
ARM UNIPHIER
M: Masahiro Yamada <yamada.masahiro@socionext.com>
S: Maintained
T: git https://gitlab.denx.de/u-boot/custodians/u-boot-uniphier.git
S: Orphan (Since 2020-09)
F: arch/arm/mach-uniphier/
F: configs/uniphier_*_defconfig
N: uniphier
@@ -582,7 +619,7 @@ F: drivers/mtd/jedec_flash.c
CLOCK
M: Lukasz Majewski <lukma@denx.de>
S: Maintained
T: git git://git.denx.de/u-boot-dfu.git
T: git https://gitlab.denx.de/u-boot/custodians/u-boot-clk.git
F: drivers/clk/
F: drivers/clk/imx/
@@ -633,6 +670,7 @@ F: include/pe.h
F: include/asm-generic/pe.h
F: lib/charset.c
F: lib/efi*/
F: test/lib/efi_*
F: test/py/tests/test_efi*
F: test/py/tests/test_efi*/
F: test/unicode_ut.c
@@ -686,6 +724,7 @@ M: Priyanka Jain <priyanka.jain@nxp.com>
S: Maintained
T: git https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriq.git
F: drivers/watchdog/sp805_wdt.c
F: drivers/watchdog/sbsa_gwdt.c
I2C
M: Heiko Schocher <hs@denx.de>
@@ -699,6 +738,7 @@ S: Maintained
T: git https://gitlab.denx.de/u-boot/u-boot.git
F: common/log*
F: cmd/log.c
F: doc/develop/logging.rst
F: test/log/
F: test/py/tests/test_log.py
@@ -737,7 +777,10 @@ F: board/cortina/common/
F: drivers/gpio/cortina_gpio.c
F: drivers/watchdog/cortina_wdt.c
F: drivers/serial/serial_cortina.c
F: drivers/led/led_cortina.c
F: drivers/mmc/ca_dw_mmc.c
F: drivers/i2c/i2c-cortina.c
F: drivers/i2c/i2c-cortina.h
MIPS MSCC
M: Gregory CLEMENT <gregory.clement@bootlin.com>
@@ -764,6 +807,13 @@ M: Ezequiel Garcia <ezequiel@collabora.com>
S: Maintained
F: arch/mips/mach-jz47xx/
MIPS Octeon
M: Aaron Williams <awilliams@marvell.com>
S: Maintained
F: arch/mips/mach-octeon/
F: arch/mips/include/asm/arch-octeon/
F: arch/mips/dts/mrvl,cn73xx.dtsi
MMC
M: Peng Fan <peng.fan@nxp.com>
S: Maintained
@@ -830,7 +880,7 @@ S: Maintained
F: arch/powerpc/
POWERPC MPC8XX
M: Christophe Leroy <christophe.leroy@csgroup.eu>
M: Christophe Leroy <christophe.leroy@c-s.fr>
S: Maintained
T: git https://gitlab.denx.de/u-boot/custodians/u-boot-mpc8xx.git
F: arch/powerpc/cpu/mpc8xx/
@@ -873,6 +923,13 @@ F: arch/riscv/
F: cmd/riscv/
F: tools/prelink-riscv.c
RISC-V KENDRYTE
M: Sean Anderson <seanga2@gmail.com>
S: Maintained
F: doc/device-tree-bindings/mfd/kendryte,k210-sysctl.txt
F: drivers/clk/kendryte/
F: include/kendryte/
RNG
M: Sughosh Ganu <sughosh.ganu@linaro.org>
R: Heinrich Schuchardt <xypron.glpk@gmx.de>
@@ -924,6 +981,31 @@ S: Maintained
F: drivers/spmi/
F: include/spmi/
SQUASHFS
M: Joao Marcos Costa <joaomarcos.costa@bootlin.com>
R: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
R: Miquel Raynal <miquel.raynal@bootlin.com>
S: Maintained
F: fs/squashfs/
F: include/sqfs.h
F: cmd/sqfs.c
F: test/py/tests/test_fs/test_squashfs/
TARGET_BCMNS3
M: Bharat Gooty <bharat.gooty@broadcom.com>
M: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
S: Maintained
F: board/broadcom/bcmns3/
F: doc/README.bcmns3
F: configs/bcm_ns3_defconfig
F: include/configs/bcm_ns3.h
F: include/dt-bindings/memory/bcm-ns3-mc.h
F: arch/arm/Kconfig
F: arch/arm/dts/ns3-board.dts
F: arch/arm/dts/ns3.dtsi
F: arch/arm/cpu/armv8/bcmns3
F: arch/arm/include/asm/arch-bcmns3/
TDA19988 HDMI ENCODER
M: Liviu Dudau <liviu.dudau@foss.arm.com>
S: Maintained
@@ -1015,6 +1097,22 @@ T: git https://gitlab.denx.de/u-boot/custodians/u-boot-x86.git
F: arch/x86/
F: cmd/x86/
XEN
M: Anastasiia Lukianenko <anastasiia_lukianenko@epam.com>
M: Oleksandr Andrushchenko <oleksandr_andrushchenko@epam.com>
S: Maintained
F: arch/arm/cpu/armv8/xen/
F: arch/arm/include/asm/xen.h
F: arch/arm/include/asm/xen/
F: cmd/pvblock.c
F: drivers/serial/serial_xen.c
F: drivers/xen/
F: include/pvblock.h
F: include/xen/
F: include/xen.h
F: lib/sscanf.c
F: test/lib/sscanf.c
XTENSA
M: Max Filippov <jcmvbkbc@gmail.com>
S: Maintained

204
Makefile
View File

@@ -1,7 +1,7 @@
# SPDX-License-Identifier: GPL-2.0+
VERSION = 2020
PATCHLEVEL = 07
PATCHLEVEL = 10
SUBLEVEL =
EXTRAVERSION =
NAME =
@@ -278,7 +278,7 @@ HOST_LFS_LIBS := $(shell getconf LFS_LIBS 2>/dev/null)
HOSTCC = cc
HOSTCXX = c++
KBUILD_HOSTCFLAGS := -Wall -Wstrict-prototypes -O2 -fomit-frame-pointer \
$(if $(CONFIG_TOOLS_DEBUG),-g) $(HOST_LFS_CFLAGS) $(HOSTCFLAGS)
$(HOST_LFS_CFLAGS) $(HOSTCFLAGS)
KBUILD_HOSTCXXFLAGS := -O2 $(HOST_LFS_CFLAGS) $(HOSTCXXFLAGS)
KBUILD_HOSTLDFLAGS := $(HOST_LFS_LDFLAGS) $(HOSTLDFLAGS)
KBUILD_HOSTLDLIBS := $(HOST_LFS_LIBS) $(HOSTLDLIBS)
@@ -683,6 +683,9 @@ KBUILD_CFLAGS += $(call cc-option,-fno-delete-null-pointer-checks)
# disable stringop warnings in gcc 8+
KBUILD_CFLAGS += $(call cc-disable-warning, stringop-truncation)
# Enabled with W=2, disabled by default as noisy
KBUILD_CFLAGS += $(call cc-disable-warning, maybe-uninitialized)
# change __FILE__ to the relative path from the srctree
KBUILD_CFLAGS += $(call cc-option,-fmacro-prefix-map=$(srctree)/=)
@@ -732,6 +735,8 @@ KBUILD_CPPFLAGS += $(KCPPFLAGS)
KBUILD_AFLAGS += $(KAFLAGS)
KBUILD_CFLAGS += $(KCFLAGS)
KBUILD_HOSTCFLAGS += $(if $(CONFIG_TOOLS_DEBUG),-g)
# Use UBOOTINCLUDE when you must reference the include/ directory.
# Needed to be compatible with the O= option
UBOOTINCLUDE := \
@@ -872,86 +877,93 @@ endif
# do the relocation).
ifneq ($(CONFIG_STATIC_RELA),)
# $(1) is u-boot ELF, $(2) is u-boot bin, $(3) is text base
DO_STATIC_RELA = \
start=$$($(NM) $(1) | grep __rel_dyn_start | cut -f 1 -d ' '); \
end=$$($(NM) $(1) | grep __rel_dyn_end | cut -f 1 -d ' '); \
tools/relocate-rela $(2) $(3) $$start $$end
quiet_cmd_static_rela = RELOC $@
cmd_static_rela = \
start=$$($(NM) $(2) | grep __rel_dyn_start | cut -f 1 -d ' '); \
end=$$($(NM) $(2) | grep __rel_dyn_end | cut -f 1 -d ' '); \
tools/relocate-rela $(3) $(4) $$start $$end
else
DO_STATIC_RELA =
quiet_cmd_static_rela =
cmd_static_rela =
endif
# Always append ALL so that arch config.mk's can add custom ones
ALL-y += u-boot.srec u-boot.bin u-boot.sym System.map binary_size_check
# Always append INPUTS so that arch config.mk's can add custom ones
INPUTS-y += u-boot.srec u-boot.bin u-boot.sym System.map binary_size_check
ALL-$(CONFIG_ONENAND_U_BOOT) += u-boot-onenand.bin
INPUTS-$(CONFIG_ONENAND_U_BOOT) += u-boot-onenand.bin
ifeq ($(CONFIG_SPL_FSL_PBL),y)
ALL-$(CONFIG_RAMBOOT_PBL) += u-boot-with-spl-pbl.bin
INPUTS-$(CONFIG_RAMBOOT_PBL) += u-boot-with-spl-pbl.bin
else
ifneq ($(CONFIG_SECURE_BOOT), y)
ifneq ($(CONFIG_NXP_ESBC), y)
# For Secure Boot The Image needs to be signed and Header must also
# be included. So The image has to be built explicitly
ALL-$(CONFIG_RAMBOOT_PBL) += u-boot.pbl
INPUTS-$(CONFIG_RAMBOOT_PBL) += u-boot.pbl
endif
endif
ALL-$(CONFIG_SPL) += spl/u-boot-spl.bin
INPUTS-$(CONFIG_SPL) += spl/u-boot-spl.bin
ifeq ($(CONFIG_MX6)$(CONFIG_IMX_HAB), yy)
ALL-$(CONFIG_SPL_FRAMEWORK) += u-boot-ivt.img
INPUTS-$(CONFIG_SPL_FRAMEWORK) += u-boot-ivt.img
else
ifeq ($(CONFIG_MX7)$(CONFIG_IMX_HAB), yy)
ALL-$(CONFIG_SPL_FRAMEWORK) += u-boot-ivt.img
INPUTS-$(CONFIG_SPL_FRAMEWORK) += u-boot-ivt.img
else
ALL-$(CONFIG_SPL_FRAMEWORK) += u-boot.img
INPUTS-$(CONFIG_SPL_FRAMEWORK) += u-boot.img
endif
endif
ALL-$(CONFIG_TPL) += tpl/u-boot-tpl.bin
ALL-$(CONFIG_OF_SEPARATE) += u-boot.dtb
INPUTS-$(CONFIG_TPL) += tpl/u-boot-tpl.bin
INPUTS-$(CONFIG_OF_SEPARATE) += u-boot.dtb
ifeq ($(CONFIG_SPL_FRAMEWORK),y)
ALL-$(CONFIG_OF_SEPARATE) += u-boot-dtb.img
INPUTS-$(CONFIG_OF_SEPARATE) += u-boot-dtb.img
endif
ALL-$(CONFIG_OF_HOSTFILE) += u-boot.dtb
INPUTS-$(CONFIG_OF_HOSTFILE) += u-boot.dtb
ifneq ($(CONFIG_SPL_TARGET),)
ALL-$(CONFIG_SPL) += $(CONFIG_SPL_TARGET:"%"=%)
endif
ALL-$(CONFIG_REMAKE_ELF) += u-boot.elf
ALL-$(CONFIG_EFI_APP) += u-boot-app.efi
ALL-$(CONFIG_EFI_STUB) += u-boot-payload.efi
ifneq ($(BUILD_ROM)$(CONFIG_BUILD_ROM),)
ALL-$(CONFIG_X86_RESET_VECTOR) += u-boot.rom
endif
ifeq ($(CONFIG_SYS_COREBOOT)$(CONFIG_SPL),yy)
ALL-$(CONFIG_BINMAN) += u-boot-x86-with-spl.bin
INPUTS-$(CONFIG_SPL) += $(CONFIG_SPL_TARGET:"%"=%)
endif
INPUTS-$(CONFIG_REMAKE_ELF) += u-boot.elf
INPUTS-$(CONFIG_EFI_APP) += u-boot-app.efi
INPUTS-$(CONFIG_EFI_STUB) += u-boot-payload.efi
# Build a combined spl + u-boot image for sunxi
ifeq ($(CONFIG_ARCH_SUNXI)$(CONFIG_SPL),yy)
ALL-y += u-boot-sunxi-with-spl.bin
ifeq ($(CONFIG_ARCH_SUNXI)$(CONFIG_ARM64)$(CONFIG_SPL),yyy)
INPUTS-y += u-boot-sunxi-with-spl.bin
endif
# enable combined SPL/u-boot/dtb rules for tegra
ifeq ($(CONFIG_ARCH_TEGRA)$(CONFIG_SPL),yy)
ALL-y += u-boot-tegra.bin u-boot-nodtb-tegra.bin
ALL-$(CONFIG_OF_SEPARATE) += u-boot-dtb-tegra.bin
# Generate this input file for binman
ifeq ($(CONFIG_SPL),)
INPUTS-$(CONFIG_ARCH_MEDIATEK) += u-boot-mtk.bin
endif
ALL-$(CONFIG_ARCH_MEDIATEK) += u-boot-mtk.bin
# Add optional build target if defined in board/cpu/soc headers
ifneq ($(CONFIG_BUILD_TARGET),)
ALL-y += $(CONFIG_BUILD_TARGET:"%"=%)
INPUTS-y += $(CONFIG_BUILD_TARGET:"%"=%)
endif
ifeq ($(CONFIG_INIT_SP_RELATIVE)$(CONFIG_OF_SEPARATE),yy)
ALL-y += init_sp_bss_offset_check
INPUTS-y += init_sp_bss_offset_check
endif
ifeq ($(CONFIG_MPC85xx)$(CONFIG_OF_SEPARATE),yy)
ALL-y += u-boot-with-dtb.bin
INPUTS-y += u-boot-with-dtb.bin
endif
ifeq ($(CONFIG_ARCH_ROCKCHIP)$(CONFIG_SPL),yy)
ALL-y += u-boot-rockchip.bin
ifeq ($(CONFIG_ARCH_ROCKCHIP),y)
# On ARM64 this target is produced by binman so we don't need this dep
ifeq ($(CONFIG_ARM64),y)
ifeq ($(CONFIG_SPL),y)
# TODO: Get binman to generate this too
INPUTS-y += u-boot-rockchip.bin
endif
else
ifeq ($(CONFIG_SPL),y)
# Generate these inputs for binman which will create the output files
INPUTS-y += idbloader.img u-boot.img
endif
endif
endif
INPUTS-$(CONFIG_X86) += u-boot-x86-start16.bin u-boot-x86-reset16.bin \
$(if $(CONFIG_SPL_X86_16BIT_INIT),spl/u-boot-spl.bin) \
$(if $(CONFIG_TPL_X86_16BIT_INIT),tpl/u-boot-tpl.bin)
LDFLAGS_u-boot += $(LDFLAGS_FINAL)
@@ -987,7 +999,8 @@ cmd_mkimage = $(objtree)/tools/mkimage $(MKIMAGEFLAGS_$(@F)) -d $< $@ \
>$(MKIMAGEOUTPUT) $(if $(KBUILD_VERBOSE:0=), && cat $(MKIMAGEOUTPUT))
quiet_cmd_mkfitimage = MKIMAGE $@
cmd_mkfitimage = $(objtree)/tools/mkimage $(MKIMAGEFLAGS_$(@F)) -f $(U_BOOT_ITS) -p $(CONFIG_FIT_EXTERNAL_OFFSET) $@\
cmd_mkfitimage = $(objtree)/tools/mkimage $(MKIMAGEFLAGS_$(@F)) \
-f $(U_BOOT_ITS) -p $(CONFIG_FIT_EXTERNAL_OFFSET) $@ \
>$(MKIMAGEOUTPUT) $(if $(KBUILD_VERBOSE:0=), && cat $(MKIMAGEOUTPUT))
quiet_cmd_cat = CAT $@
@@ -1007,7 +1020,22 @@ quiet_cmd_cfgcheck = CFGCHK $2
cmd_cfgcheck = $(srctree)/scripts/check-config.sh $2 \
$(srctree)/scripts/config_whitelist.txt $(srctree)
all: $(ALL-y)
PHONY += inputs
inputs: $(INPUTS-y)
all: .binman_stamp inputs
# Hack for sunxi which doesn't have a proper binman definition for
# 64-bit boards
ifneq ($(CONFIG_ARCH_SUNXI)$(CONFIG_ARM64),yy)
ifeq ($(CONFIG_BINMAN),y)
$(call if_changed,binman)
endif
endif
# Timestamp file to make sure that binman always runs
.binman_stamp: FORCE
@touch $@
ifeq ($(CONFIG_DEPRECATED),y)
$(warning "You have deprecated configuration options enabled in your .config! Please check your configuration.")
ifeq ($(CONFIG_SPI),y)
@@ -1025,7 +1053,7 @@ ifneq ($(CONFIG_DM),y)
@echo >&2 "===================================================="
endif
ifeq ($(CONFIG_MMC),y)
ifneq ($(CONFIG_DM_MMC)$(CONFIG_OF_CONTROL)$(CONFIG_BLK),yyy)
ifneq ($(CONFIG_DM_MMC)$(CONFIG_BLK),yy)
@echo >&2 "===================== WARNING ======================"
@echo >&2 "This board does not use CONFIG_DM_MMC. Please update"
@echo >&2 "the board to use CONFIG_DM_MMC before the v2019.04 release."
@@ -1124,6 +1152,13 @@ ifneq ($(CONFIG_DM_ETH),y)
@echo >&2 "See doc/driver-model/migration.rst for more info."
@echo >&2 "===================================================="
endif
endif
ifneq ($(CONFIG_SPL_FIT_GENERATOR),)
@echo >&2 "===================== WARNING ======================"
@echo >&2 "This board uses CONFIG_SPL_FIT_GENERATOR. Please migrate"
@echo >&2 "to binman instead, to avoid the proliferation of"
@echo >&2 "arch-specific scripts with no tests."
@echo >&2 "===================================================="
endif
@# Check that this build does not use CONFIG options that we do not
@# know about unless they are in Kconfig. All the existing CONFIG
@@ -1284,7 +1319,7 @@ endif
u-boot-nodtb.bin: u-boot FORCE
$(call if_changed,objcopy)
$(call DO_STATIC_RELA,$<,$@,$(CONFIG_SYS_TEXT_BASE))
$(call cmd,static_rela,$<,$@,$(CONFIG_SYS_TEXT_BASE))
$(BOARD_SIZE_CHECK)
u-boot.ldr: u-boot
@@ -1299,7 +1334,8 @@ quiet_cmd_binman = BINMAN $@
cmd_binman = $(srctree)/tools/binman/binman $(if $(BINMAN_DEBUG),-D) \
--toolpath $(objtree)/tools \
$(if $(BINMAN_VERBOSE),-v$(BINMAN_VERBOSE)) \
build -u -d u-boot.dtb -O . -m \
build -u -d u-boot.dtb -O . \
$(if $(BUILD_ROM),,-m --allow-missing) \
-I . -I $(srctree) -I $(srctree)/board/$(BOARDDIR) \
$(BINMAN_$(@F))
@@ -1320,12 +1356,14 @@ endif
# Boards with more complex image requirements can provide an .its source file
# or a generator script
# NOTE: Please do not use this. We are migrating away from Makefile rules to use
# binman instead.
ifneq ($(CONFIG_SPL_FIT_SOURCE),"")
U_BOOT_ITS := u-boot.its
$(U_BOOT_ITS): $(subst ",,$(CONFIG_SPL_FIT_SOURCE))
$(call if_changed,copy)
else
ifneq ($(CONFIG_SPL_FIT_GENERATOR),"")
ifneq ($(CONFIG_USE_SPL_FIT_GENERATOR),)
U_BOOT_ITS := u-boot.its
ifeq ($(CONFIG_SPL_FIT_GENERATOR),"arch/arm/mach-imx/mkimage_fit_atf.sh")
U_BOOT_ITS_DEPS += u-boot-nodtb.bin
@@ -1451,10 +1489,7 @@ idbloader.img: spl/u-boot-spl.bin FORCE
$(call if_changed,mkimage)
endif
ifeq ($(CONFIG_ARM64),)
u-boot-rockchip.bin: idbloader.img u-boot.img FORCE
$(call if_changed,binman)
else
ifeq ($(CONFIG_ARM64),y)
OBJCOPYFLAGS_u-boot-rockchip.bin = -I binary -O binary \
--pad-to=$(CONFIG_SPL_PAD_TO) --gap-fill=0xff
u-boot-rockchip.bin: idbloader.img u-boot.itb FORCE
@@ -1576,26 +1611,11 @@ u-boot-br.bin: u-boot FORCE
endif
endif
# x86 uses a large ROM. We fill it with 0xff, put the 16-bit stuff (including
# reset vector) at the top, Intel ME descriptor at the bottom, and U-Boot in
# the middle. This is handled by binman based on an image description in the
# board's device tree.
ifneq ($(CONFIG_X86_RESET_VECTOR),)
rom: u-boot.rom FORCE
refcode.bin: $(srctree)/board/$(BOARDDIR)/refcode.bin FORCE
$(call if_changed,copy)
quiet_cmd_ldr = LD $@
cmd_ldr = $(LD) $(LDFLAGS_$(@F)) \
$(filter-out FORCE,$^) -o $@
u-boot.rom: u-boot-x86-start16.bin u-boot-x86-reset16.bin u-boot.bin \
$(if $(CONFIG_SPL_X86_16BIT_INIT),spl/u-boot-spl.bin) \
$(if $(CONFIG_TPL_X86_16BIT_INIT),tpl/u-boot-tpl.bin) \
$(if $(CONFIG_HAVE_REFCODE),refcode.bin) FORCE
$(call if_changed,binman)
ifdef CONFIG_X86
OBJCOPYFLAGS_u-boot-x86-start16.bin := -O binary -j .start16
u-boot-x86-start16.bin: u-boot FORCE
$(call if_changed,objcopy)
@@ -1603,41 +1623,16 @@ u-boot-x86-start16.bin: u-boot FORCE
OBJCOPYFLAGS_u-boot-x86-reset16.bin := -O binary -j .resetvec
u-boot-x86-reset16.bin: u-boot FORCE
$(call if_changed,objcopy)
endif
endif # CONFIG_X86
ifneq ($(CONFIG_ARCH_SUNXI),)
ifeq ($(CONFIG_ARM64),)
u-boot-sunxi-with-spl.bin: spl/sunxi-spl.bin u-boot.img u-boot.dtb FORCE
$(call if_changed,binman)
else
ifeq ($(CONFIG_ARM64),y)
u-boot-sunxi-with-spl.bin: spl/sunxi-spl.bin u-boot.itb FORCE
$(call if_changed,cat)
endif
endif
u-boot-x86-with-spl.bin: spl/u-boot-spl.bin u-boot.bin FORCE
$(call if_changed,binman)
ifneq ($(CONFIG_ARCH_TEGRA),)
ifneq ($(CONFIG_BINMAN),)
# Makes u-boot-dtb-tegra.bin u-boot-tegra.bin u-boot-nodtb-tegra.bin
%-dtb-tegra.bin %-tegra.bin %-nodtb-tegra.bin: \
spl/%-spl %.bin FORCE
$(call if_changed,binman)
else
OBJCOPYFLAGS_u-boot-nodtb-tegra.bin = -O binary --pad-to=$(CONFIG_SYS_TEXT_BASE)
u-boot-nodtb-tegra.bin: spl/u-boot-spl u-boot-nodtb.bin FORCE
$(call if_changed,pad_cat)
OBJCOPYFLAGS_u-boot-tegra.bin = -O binary --pad-to=$(CONFIG_SYS_TEXT_BASE)
u-boot-tegra.bin: spl/u-boot-spl u-boot.bin FORCE
$(call if_changed,pad_cat)
u-boot-dtb-tegra.bin: u-boot-tegra.bin FORCE
$(call if_changed,copy)
endif # binman
endif
OBJCOPYFLAGS_u-boot-app.efi := $(OBJCOPYFLAGS_EFI)
u-boot-app.efi: u-boot FORCE
$(call if_changed,zobjcopy)
@@ -1721,9 +1716,6 @@ u-boot-elf.lds: arch/u-boot-elf.lds prepare FORCE
ifeq ($(CONFIG_SPL),y)
spl/u-boot-spl-mtk.bin: spl/u-boot-spl
u-boot-mtk.bin: u-boot.dtb u-boot.img spl/u-boot-spl-mtk.bin FORCE
$(call if_changed,binman)
else
MKIMAGEFLAGS_u-boot-mtk.bin = -T mtk_image \
-a $(CONFIG_SYS_TEXT_BASE) -e $(CONFIG_SYS_TEXT_BASE) \
@@ -1733,6 +1725,12 @@ u-boot-mtk.bin: u-boot.bin FORCE
$(call if_changed,mkimage)
endif
quiet_cmd_endian_swap = SWAP $@
cmd_endian_swap = $(srctree)/tools/endian-swap.py $< $@
u-boot-swap.bin: u-boot.bin FORCE
$(call if_changed,endian_swap)
ARCH_POSTLINK := $(wildcard $(srctree)/arch/$(ARCH)/Makefile.postlink)
# Rule to link u-boot
@@ -2027,7 +2025,7 @@ CLEAN_FILES += include/bmp_logo.h include/bmp_logo_data.h tools/version.h \
# Directories & files removed with 'make mrproper'
MRPROPER_DIRS += include/config include/generated spl tpl \
.tmp_objdiff
.tmp_objdiff doc/output
MRPROPER_FILES += .config .config.old include/autoconf.mk* include/config.h \
ctags etags tags TAGS cscope* GPATH GTAGS GRTAGS GSYMS \
drivers/video/fonts/*.S

111
README
View File

@@ -266,7 +266,7 @@ board_init_f():
version as needed.
- preloader_console_init() can be called here in extremis
- should set up SDRAM, and anything needed to make the UART work
- these is no need to clear BSS, it will be done by crt0.S
- there is no need to clear BSS, it will be done by crt0.S
- for specific scenarios on certain architectures an early BSS *can*
be made available (via CONFIG_SPL_EARLY_BSS by moving the clearing
of BSS prior to entering board_init_f()) but doing so is discouraged.
@@ -559,19 +559,6 @@ The following options need to be configured:
such as ARM architectural timer initialization.
- Linux Kernel Interface:
CONFIG_CLOCKS_IN_MHZ
U-Boot stores all clock information in Hz
internally. For binary compatibility with older Linux
kernels (which expect the clocks passed in the
bd_info data to be in MHz) the environment variable
"clocks_in_mhz" can be defined so that U-Boot
converts clock data to MHZ before passing it to the
Linux kernel.
When CONFIG_CLOCKS_IN_MHZ is defined, a definition of
"clocks_in_mhz=1" is automatically included in the
default environment.
CONFIG_MEMSIZE_IN_BYTES [relevant for MIPS only]
When transferring memsize parameter to Linux, some versions
@@ -670,11 +657,6 @@ The following options need to be configured:
Define this variable to enable hw flow control in serial driver.
Current user of this option is drivers/serial/nsl16550.c driver
- Console Baudrate:
CONFIG_BAUDRATE - in bps
Select one of the baudrates listed in
CONFIG_SYS_BAUDRATE_TABLE, see below.
- Autoboot Command:
CONFIG_BOOTCOMMAND
Only needed when CONFIG_BOOTDELAY is enabled;
@@ -889,14 +871,6 @@ The following options need to be configured:
Allow generic access to the SPI bus on the Intel 8257x, for
example with the "sspi" command.
CONFIG_EEPRO100
Support for Intel 82557/82559/82559ER chips.
Optional CONFIG_EEPRO100_SROM_WRITE enables EEPROM
write routine for first time initialisation.
CONFIG_TULIP
Support for Digital 2114x chips.
CONFIG_NATSEMI
Support for National dp83815 chips.
@@ -1276,48 +1250,6 @@ The following options need to be configured:
Enables an 'i2c edid' command which can read EDID
information over I2C from an attached LCD display.
- Splash Screen Support: CONFIG_SPLASH_SCREEN
If this option is set, the environment is checked for
a variable "splashimage". If found, the usual display
of logo, copyright and system information on the LCD
is suppressed and the BMP image at the address
specified in "splashimage" is loaded instead. The
console is redirected to the "nulldev", too. This
allows for a "silent" boot where a splash screen is
loaded very quickly after power-on.
CONFIG_SPLASHIMAGE_GUARD
If this option is set, then U-Boot will prevent the environment
variable "splashimage" from being set to a problematic address
(see doc/README.displaying-bmps).
This option is useful for targets where, due to alignment
restrictions, an improperly aligned BMP image will cause a data
abort. If you think you will not have problems with unaligned
accesses (for example because your toolchain prevents them)
there is no need to set this option.
CONFIG_SPLASH_SCREEN_ALIGN
If this option is set the splash image can be freely positioned
on the screen. Environment variable "splashpos" specifies the
position as "x,y". If a positive number is given it is used as
number of pixel from left/top. If a negative number is given it
is used as number of pixel from right/bottom. You can also
specify 'm' for centering the image.
Example:
setenv splashpos m,m
=> image at center of screen
setenv splashpos 30,20
=> image at x = 30 and y = 20
setenv splashpos -10,m
=> vertically centered image
at x = dspWidth - bmpWidth - 9
- Gzip compressed BMP image support: CONFIG_VIDEO_BMP_GZIP
If this option is set, additionally to standard BMP
@@ -1427,7 +1359,6 @@ The following options need to be configured:
CONFIG_BOOTP_NISDOMAIN
CONFIG_BOOTP_BOOTFILESIZE
CONFIG_BOOTP_SEND_HOSTNAME
CONFIG_BOOTP_NTPSERVER
CONFIG_BOOTP_TIMEOFFSET
CONFIG_BOOTP_VENDOREX
@@ -1442,13 +1373,6 @@ The following options need to be configured:
to Link-local IP address configuration if the DHCP server
is not available.
CONFIG_BOOTP_SEND_HOSTNAME - Some DHCP servers are capable
to do a dynamic update of a DNS server. To do this, they
need the hostname of the DHCP requester.
If CONFIG_BOOTP_SEND_HOSTNAME is defined, the content
of the "hostname" environment variable is passed as
option 12 to the DHCP server.
CONFIG_BOOTP_DHCP_REQUEST_DELAY
A 32bit value in microseconds for a delay between
@@ -2283,10 +2207,6 @@ The following options need to be configured:
parameters from when MMC is being used in raw mode
(for falcon mode)
CONFIG_SYS_MMCSD_FS_BOOT_PARTITION
Partition on the MMC to load U-Boot from when the MMC is being
used in fs mode
CONFIG_SPL_FS_LOAD_PAYLOAD_NAME
Filename to read to load U-Boot when reading from filesystem
@@ -2307,24 +2227,10 @@ The following options need to be configured:
CONFIG_SPL_SKIP_RELOCATE
Avoid SPL relocation
CONFIG_SPL_NAND_BASE
Include nand_base.c in the SPL. Requires
CONFIG_SPL_NAND_DRIVERS.
CONFIG_SPL_NAND_DRIVERS
SPL uses normal NAND drivers, not minimal drivers.
CONFIG_SPL_NAND_IDENT
SPL uses the chip ID list to identify the NAND flash.
Requires CONFIG_SPL_NAND_BASE.
CONFIG_SPL_NAND_ECC
Include standard software ECC in the SPL
CONFIG_SPL_NAND_SIMPLE
Support for NAND boot using simple NAND drivers that
expose the cmd_ctrl() interface.
CONFIG_SPL_UBI
Support for a lightweight UBI (fastmap) scanner and
loader
@@ -3260,6 +3166,7 @@ md - memory display
mm - memory modify (auto-incrementing)
nm - memory modify (constant address)
mw - memory write (fill)
ms - memory search
cp - memory copy
cmp - memory compare
crc32 - checksum calculation
@@ -3495,6 +3402,11 @@ List of environment variables (most likely not complete):
downloads succeed with high packet loss rates, or with
unreliable TFTP servers or client hardware.
tftpwindowsize - if this is set, the value is used for TFTP's
window size as described by RFC 7440.
This means the count of blocks we can receive before
sending ack to server.
vlan - When set to a value < 4095 the traffic over
Ethernet is encapsulated/received over 802.1q
VLAN tagged frames.
@@ -3505,6 +3417,15 @@ List of environment variables (most likely not complete):
CONFIG_NET_RETRY_COUNT, if defined. This value has
precedence over the valu based on CONFIG_NET_RETRY_COUNT.
memmatches - Number of matches found by the last 'ms' command, in hex
memaddr - Address of the last match found by the 'ms' command, in hex,
or 0 if none
mempos - Index position of the last match found by the 'ms' command,
in units of the size (.b, .w, .l) of the search
The following image location variables contain the location of images
used in booting. The "Image" column gives the role of the image and is
not an environment variable name. The other columns are environment

View File

@@ -10,9 +10,9 @@ choice
config ARC
bool "ARC architecture"
select ARCH_EARLY_INIT_R
select ARC_TIMER
select CLK
select DM
select HAVE_PRIVATE_LIBGCC
select SUPPORT_OF_CONTROL
select TIMER
@@ -139,6 +139,7 @@ config SANDBOX
imply ACPI_PMC
imply ACPI_PMC_SANDBOX
imply CMD_PMC
imply CMD_CLONE
config SH
bool "SuperH architecture"
@@ -160,6 +161,7 @@ config X86
select TIMER
select USE_PRIVATE_LIBGCC
select X86_TSC_TIMER
imply HAS_ROM if X86_RESET_VECTOR
imply BLK
imply CMD_DM
imply CMD_FPGA_LOADMK
@@ -190,6 +192,7 @@ config X86
imply PCH
imply RTC_MC146818
imply IRQ
imply ACPIGEN if !QEMU
# Thing to enable for when SPL/TPL are enabled: SPL
imply SPL_DM

View File

@@ -25,13 +25,6 @@ int arch_cpu_init(void)
return 0;
}
int arch_early_init_r(void)
{
gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;
gd->bd->bi_memsize = CONFIG_SYS_SDRAM_SIZE;
return 0;
}
/* This is a dummy function on arc */
int dram_init(void)
{

View File

@@ -64,6 +64,8 @@ endif
config GIC_V3_ITS
bool "ARM GICV3 ITS"
select REGMAP
select SYSCON
help
ARM GICV3 Interrupt translation service (ITS).
Basic support for programming locality specific peripheral
@@ -501,23 +503,6 @@ config TPL_USE_ARCH_MEMSET
Such an implementation may be faster under some conditions
but may increase the binary size.
config SET_STACK_SIZE
bool "Enable an option to set max stack size that can be used"
default y if ARCH_VERSAL || ARCH_ZYNQMP || ARCH_ZYNQ
help
This will enable an option to set max stack size that can be
used by U-Boot.
config STACK_SIZE
hex "Define max stack size that can be used by U-Boot"
depends on SET_STACK_SIZE
default 0x4000000 if ARCH_VERSAL || ARCH_ZYNQMP
default 0x1000000 if ARCH_ZYNQ
help
Define Max stack size that can be used by U-Boot so that the
initrd_high will be calculated as base stack pointer minus this
stack size.
config ARM64_SUPPORT_AARCH32
bool "ARM64 system support AArch32 execution state"
depends on ARM64
@@ -532,6 +517,7 @@ choice
config ARCH_AT91
bool "Atmel AT91"
select SPL_BOARD_INIT if SPL && !TARGET_SMARTWEB
select SPL_SEPARATE_BSS if SPL
config TARGET_EDB93XX
bool "Support edb93xx"
@@ -549,6 +535,7 @@ config TARGET_GPLUGD
config ARCH_DAVINCI
bool "TI DaVinci"
select CPU_ARM926EJS
select SPL_DM_SPI if SPL
imply CMD_SAVES
help
Support for TI's DaVinci platform.
@@ -566,6 +553,8 @@ config ARCH_MVEBU
select DM_SERIAL
select DM_SPI
select DM_SPI_FLASH
select SPL_DM_SPI if SPL
select SPL_DM_SPI_FLASH if SPL
select OF_CONTROL
select OF_SEPARATE
select SPI
@@ -728,6 +717,15 @@ config TARGET_BCMNS2
ARMv8 Cortex-A57 processors targeting a broad range of networking
applications.
config TARGET_BCMNS3
bool "Support Broadcom NS3"
select ARM64
select BOARD_LATE_INIT
help
Support for Broadcom Northstar 3 SoCs. NS3 is a octo-core 64-bit
ARMv8 Cortex-A72 processors targeting a broad range of networking
applications.
config ARCH_EXYNOS
bool "Samsung EXYNOS"
select DM
@@ -763,6 +761,17 @@ config ARCH_INTEGRATOR
select PL01X_SERIAL
imply CMD_DM
config ARCH_IPQ40XX
bool "Qualcomm IPQ40xx SoCs"
select CPU_V7A
select DM
select DM_GPIO
select DM_SERIAL
select PINCTRL
select CLK
select OF_CONTROL
imply CMD_DM
config ARCH_KEYSTONE
bool "TI Keystone"
select CMD_POWEROFF
@@ -884,7 +893,7 @@ config ARCH_MX7
config ARCH_MX6
bool "Freescale MX6"
select CPU_V7A
select SYS_FSL_HAS_SEC if IMX_HAB
select SYS_FSL_HAS_SEC
select SYS_FSL_SEC_COMPAT_4
select SYS_FSL_SEC_LE
imply MXC_GPIO
@@ -901,9 +910,15 @@ config ARCH_MX5
select CPU_V7A
imply MXC_GPIO
config ARCH_NEXELL
bool "Nexell S5P4418/S5P6818 SoC"
select ENABLE_ARM_SOC_BOOT0_HOOK
select DM
config ARCH_OWL
bool "Actions Semi OWL SoCs"
select DM
select DM_ETH
select DM_SERIAL
select OWL_SERIAL
select CLK
@@ -985,6 +1000,8 @@ config ARCH_SOCFPGA
imply FAT_WRITE
imply SPL
imply SPL_DM
imply SPL_DM_SPI
imply SPL_DM_SPI_FLASH
imply SPL_LIBDISK_SUPPORT
imply SPL_MMC_SUPPORT
imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
@@ -1068,6 +1085,7 @@ config ARCH_VERSAL
select DM_SERIAL
select OF_CONTROL
imply BOARD_LATE_INIT
imply ENV_VARS_UBOOT_RUNTIME_CONFIG
config ARCH_VF610
bool "Freescale Vybrid"
@@ -1093,6 +1111,8 @@ config ARCH_ZYNQ
select SPL_BOARD_INIT if SPL
select SPL_CLK if SPL
select SPL_DM if SPL
select SPL_DM_SPI if SPL
select SPL_DM_SPI_FLASH if SPL
select SPL_OF_CONTROL if SPL
select SPL_SEPARATE_BSS if SPL
select SUPPORT_SPL
@@ -1101,6 +1121,7 @@ config ARCH_ZYNQ
imply CMD_CLK
imply CMD_DM
imply CMD_SPL
imply ENV_VARS_UBOOT_RUNTIME_CONFIG
imply FAT_WRITE
config ARCH_ZYNQMP_R5
@@ -1131,6 +1152,8 @@ config ARCH_ZYNQMP
select OF_CONTROL
select SPL_BOARD_INIT if SPL
select SPL_CLK if SPL
select SPL_DM_SPI if SPI
select SPL_DM_SPI_FLASH if SPL_DM_SPI
select SPL_DM_MAILBOX if SPL
select SPL_FIRMWARE if SPL
select SPL_SEPARATE_BSS if SPL
@@ -1138,6 +1161,7 @@ config ARCH_ZYNQMP
select ZYNQMP_IPI
imply BOARD_LATE_INIT
imply CMD_DM
imply ENV_VARS_UBOOT_RUNTIME_CONFIG
imply FAT_WRITE
imply MP
imply DM_USB_GADGET
@@ -1169,11 +1193,20 @@ config TARGET_VEXPRESS64_JUNO
select DM_SERIAL
select ARM_PSCI_FW
select PSCI_RESET
select DM
select DM_ETH
select BLK
select USB
select DM_USB
config TARGET_TOTAL_COMPUTE
bool "Support Total Compute Platform"
select ARM64
select PL01X_SERIAL
select DM
select DM_SERIAL
select DM_MMC
select DM_GPIO
config TARGET_LS2080A_EMU
bool "Support ls2080a_emu"
select ARCH_LS2080A
@@ -1447,6 +1480,8 @@ config TARGET_LS1021AQDS
select SUPPORT_SPL
select SYS_FSL_DDR
select FSL_DDR_INTERACTIVE
select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
select SPI_FLASH_DATAFLASH if FSL_DSPI || FSL_QSPI
imply SCSI
config TARGET_LS1021ATWR
@@ -1460,6 +1495,7 @@ config TARGET_LS1021ATWR
select CPU_V7_HAS_VIRT
select LS1_DEEP_SLEEP
select SUPPORT_SPL
select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
imply SCSI
config TARGET_LS1021ATSN
@@ -1484,6 +1520,7 @@ config TARGET_LS1021AIOT
select CPU_V7_HAS_NONSEC
select CPU_V7_HAS_VIRT
select SUPPORT_SPL
select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
imply SCSI
help
Support for Freescale LS1021AIOT platform.
@@ -1501,6 +1538,8 @@ config TARGET_LS1043AQDS
select BOARD_LATE_INIT
select SUPPORT_SPL
select FSL_DDR_INTERACTIVE if !SPL
select FSL_DSPI if !SPL_NO_DSPI
select DM_SPI_FLASH if FSL_DSPI
imply SCSI
imply SCSI_AHCI
help
@@ -1515,6 +1554,8 @@ config TARGET_LS1043ARDB
select BOARD_EARLY_INIT_F
select BOARD_LATE_INIT
select SUPPORT_SPL
select FSL_DSPI if !SPL_NO_DSPI
select DM_SPI_FLASH if FSL_DSPI
help
Support for Freescale LS1043ARDB platform.
@@ -1680,6 +1721,8 @@ config ARCH_ROCKCHIP
select OF_CONTROL
select SPI
select SPL_DM if SPL
select SPL_DM_SPI if SPL
select SPL_DM_SPI_FLASH if SPL
select SYS_MALLOC_F
select SYS_THUMB_BUILD if !ARM64
imply ADC
@@ -1694,6 +1737,24 @@ config ARCH_ROCKCHIP
imply TPL_SYSRESET
imply USB_FUNCTION_FASTBOOT
config ARCH_OCTEONTX
bool "Support OcteonTX SoCs"
select DM
select ARM64
select OF_CONTROL
select OF_LIVE
select BOARD_LATE_INIT
select SYS_CACHE_SHIFT_7
config ARCH_OCTEONTX2
bool "Support OcteonTX2 SoCs"
select DM
select ARM64
select OF_CONTROL
select OF_LIVE
select BOARD_LATE_INIT
select SYS_CACHE_SHIFT_7
config TARGET_THUNDERX_88XX
bool "Support ThunderX 88xx"
select ARM64
@@ -1718,6 +1779,14 @@ config TARGET_PRESIDIO_ASIC
bool "Support Cortina Presidio ASIC Platform"
select ARM64
config TARGET_XENGUEST_ARM64
bool "Xen guest ARM64"
select ARM64
select XEN
select OF_CONTROL
select LINUX_KERNEL_IMAGE_HEADER
select XEN_SERIAL
select SSCANF
endchoice
config ARCH_SUPPORT_TFABOOT
@@ -1772,6 +1841,8 @@ source "arch/arm/mach-highbank/Kconfig"
source "arch/arm/mach-integrator/Kconfig"
source "arch/arm/mach-ipq40xx/Kconfig"
source "arch/arm/mach-k3/Kconfig"
source "arch/arm/mach-keystone/Kconfig"
@@ -1782,6 +1853,10 @@ source "arch/arm/mach-lpc32xx/Kconfig"
source "arch/arm/mach-mvebu/Kconfig"
source "arch/arm/mach-octeontx/Kconfig"
source "arch/arm/mach-octeontx2/Kconfig"
source "arch/arm/cpu/armv7/ls102xa/Kconfig"
source "arch/arm/mach-imx/mx2/Kconfig"
@@ -1858,11 +1933,17 @@ source "arch/arm/cpu/armv8/Kconfig"
source "arch/arm/mach-imx/Kconfig"
source "arch/arm/mach-nexell/Kconfig"
source "board/armltd/total_compute/Kconfig"
source "board/bosch/shc/Kconfig"
source "board/bosch/guardian/Kconfig"
source "board/CarMediaLab/flea3/Kconfig"
source "board/Marvell/aspenite/Kconfig"
source "board/Marvell/gplugd/Kconfig"
source "board/Marvell/octeontx/Kconfig"
source "board/Marvell/octeontx2/Kconfig"
source "board/armadeus/apf27/Kconfig"
source "board/armltd/vexpress/Kconfig"
source "board/armltd/vexpress64/Kconfig"
@@ -1875,6 +1956,7 @@ source "board/broadcom/bcm968580xref/Kconfig"
source "board/broadcom/bcmcygnus/Kconfig"
source "board/broadcom/bcmnsp/Kconfig"
source "board/broadcom/bcmns2/Kconfig"
source "board/broadcom/bcmns3/Kconfig"
source "board/cavium/thunderx/Kconfig"
source "board/cirrus/edb93xx/Kconfig"
source "board/eets/pdu001/Kconfig"
@@ -1900,12 +1982,11 @@ source "board/freescale/lx2160a/Kconfig"
source "board/freescale/mx35pdk/Kconfig"
source "board/freescale/s32v234evb/Kconfig"
source "board/grinn/chiliboard/Kconfig"
source "board/gumstix/pepper/Kconfig"
source "board/hisilicon/hikey/Kconfig"
source "board/hisilicon/hikey960/Kconfig"
source "board/hisilicon/poplar/Kconfig"
source "board/isee/igep003x/Kconfig"
source "board/silica/pengwyn/Kconfig"
source "board/myir/mys_6ulx/Kconfig"
source "board/spear/spear300/Kconfig"
source "board/spear/spear310/Kconfig"
source "board/spear/spear320/Kconfig"
@@ -1913,14 +1994,15 @@ source "board/spear/spear600/Kconfig"
source "board/spear/x600/Kconfig"
source "board/st/stv0991/Kconfig"
source "board/tcl/sl50/Kconfig"
source "board/birdland/bav335x/Kconfig"
source "board/toradex/colibri_pxa270/Kconfig"
source "board/variscite/dart_6ul/Kconfig"
source "board/vscom/baltos/Kconfig"
source "board/xilinx/Kconfig"
source "board/xilinx/zynq/Kconfig"
source "board/xilinx/zynqmp/Kconfig"
source "board/xilinx/versal/Kconfig"
source "board/phytium/durian/Kconfig"
source "board/xen/xenguest_arm64/Kconfig"
source "arch/arm/Kconfig.debug"
@@ -1930,5 +2012,3 @@ config SPL_LDSCRIPT
default "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" if (ARCH_MX23 || ARCH_MX28) && !SPL_FRAMEWORK
default "arch/arm/cpu/arm1136/u-boot-spl.lds" if CPU_ARM1136
default "arch/arm/cpu/armv8/u-boot-spl.lds" if ARM64

View File

@@ -58,6 +58,7 @@ machine-$(CONFIG_ARCH_BCMSTB) += bcmstb
machine-$(CONFIG_ARCH_DAVINCI) += davinci
machine-$(CONFIG_ARCH_EXYNOS) += exynos
machine-$(CONFIG_ARCH_HIGHBANK) += highbank
machine-$(CONFIG_ARCH_IPQ40XX) += ipq40xx
machine-$(CONFIG_ARCH_K3) += k3
machine-$(CONFIG_ARCH_KEYSTONE) += keystone
machine-$(CONFIG_ARCH_KIRKWOOD) += kirkwood
@@ -65,6 +66,7 @@ machine-$(CONFIG_ARCH_LPC32XX) += lpc32xx
machine-$(CONFIG_ARCH_MEDIATEK) += mediatek
machine-$(CONFIG_ARCH_MESON) += meson
machine-$(CONFIG_ARCH_MVEBU) += mvebu
machine-$(CONFIG_ARCH_NEXELL) += nexell
machine-$(CONFIG_ARCH_OMAP2PLUS) += omap2
machine-$(CONFIG_ARCH_ORION5X) += orion5x
machine-$(CONFIG_ARCH_OWL) += owl
@@ -78,6 +80,8 @@ machine-$(CONFIG_ARCH_STM32MP) += stm32mp
machine-$(CONFIG_ARCH_SUNXI) += sunxi
machine-$(CONFIG_ARCH_TEGRA) += tegra
machine-$(CONFIG_ARCH_U8500) += u8500
machine-$(CONFIG_ARCH_OCTEONTX) += octeontx
machine-$(CONFIG_ARCH_OCTEONTX2) += octeontx2
machine-$(CONFIG_ARCH_UNIPHIER) += uniphier
machine-$(CONFIG_ARCH_VERSAL) += versal
machine-$(CONFIG_ARCH_ZYNQ) += zynq

View File

@@ -122,7 +122,7 @@ endif
ifneq ($(CONFIG_SPL_BUILD),y)
# Check that only R_ARM_RELATIVE relocations are generated.
ALL-y += checkarmreloc
INPUTS-y += checkarmreloc
# The movt / movw can hardcode 16 bit parts of the addresses in the
# instruction. Relocation is not supported for that case, so disable
# such usage by requiring word relocations.
@@ -154,17 +154,17 @@ endif
ifneq ($(CONFIG_IMX_CONFIG),)
ifdef CONFIG_SPL
ifndef CONFIG_SPL_BUILD
ALL-y += SPL
INPUTS-y += SPL
endif
else
ifeq ($(CONFIG_OF_SEPARATE),y)
ALL-y += u-boot-dtb.imx
INPUTS-y += u-boot-dtb.imx
else
ALL-y += u-boot.imx
INPUTS-y += u-boot.imx
endif
endif
ifneq ($(CONFIG_VF610),)
ALL-y += u-boot.vyb
INPUTS-y += u-boot.vyb
endif
endif

View File

@@ -439,7 +439,7 @@ int print_cpuinfo(void)
* Initializes on-chip ethernet controllers.
* to override, implement board_eth_init()
*/
int cpu_eth_init(bd_t *bis)
int cpu_eth_init(struct bd_info *bis)
{
int rc = -ENODEV;
@@ -455,7 +455,7 @@ int cpu_eth_init(bd_t *bis)
* Initializes on-chip MMC controllers.
* to override, implement board_mmc_init()
*/
int cpu_mmc_init(bd_t *bis)
int cpu_mmc_init(struct bd_info *bis)
{
return fsl_esdhc_mmc_init(bis);
}

View File

@@ -223,7 +223,7 @@ int print_cpuinfo(void)
* Initializes on-chip ethernet controllers.
* to override, implement board_eth_init()
*/
int cpu_eth_init(bd_t *bis)
int cpu_eth_init(struct bd_info *bis)
{
struct ccm_regs *ccm = (struct ccm_regs *)IMX_CCM_BASE;
ulong val;
@@ -252,7 +252,7 @@ int get_clocks(void)
* Initializes on-chip MMC controllers.
* to override, implement board_mmc_init()
*/
int cpu_mmc_init(bd_t *bis)
int cpu_mmc_init(struct bd_info *bis)
{
return fsl_esdhc_mmc_init(bis);
}

View File

@@ -177,7 +177,7 @@ int print_cpuinfo (void)
}
#endif
int cpu_eth_init(bd_t *bis)
int cpu_eth_init(struct bd_info *bis)
{
#if defined(CONFIG_FEC_MXC)
struct pll_regs *pll = (struct pll_regs *)IMX_PLL_BASE;
@@ -195,7 +195,7 @@ int cpu_eth_init(bd_t *bis)
* Initializes on-chip MMC controllers.
* to override, implement board_mmc_init()
*/
int cpu_mmc_init(bd_t *bis)
int cpu_mmc_init(struct bd_info *bis)
{
#ifdef CONFIG_MMC_MXC
return mxc_mmc_init(bis);

View File

@@ -203,7 +203,7 @@ int do_mx28_showclocks(struct cmd_tbl *cmdtp, int flag, int argc,
* Initializes on-chip ethernet controllers.
*/
#if defined(CONFIG_MX28) && defined(CONFIG_CMD_NET)
int cpu_eth_init(bd_t *bis)
int cpu_eth_init(struct bd_info *bis)
{
struct mxs_clkctrl_regs *clkctrl_regs =
(struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE;

View File

@@ -22,7 +22,7 @@
DECLARE_GLOBAL_DATA_PTR;
static gd_t gdata __section(".data");
#ifdef CONFIG_SPL_SERIAL_SUPPORT
static bd_t bdata __section(".data");
static struct bd_info bdata __section(".data");
#endif
/*

View File

@@ -41,6 +41,24 @@ config ARMV7_PSCI
help
Say Y here to enable PSCI support.
choice
prompt "Supported PSCI version"
depends on ARMV7_PSCI
default ARMV7_PSCI_0_1 if ARCH_SUNXI
default ARMV7_PSCI_1_0
help
Select the supported PSCI version.
config ARMV7_PSCI_1_0
bool "PSCI V1.0"
config ARMV7_PSCI_0_2
bool "PSCI V0.2"
config ARMV7_PSCI_0_1
bool "PSCI V0.1"
endchoice
config ARMV7_PSCI_NR_CPUS
int "Maximum supported CPUs for PSCI"
depends on ARMV7_NONSEC

View File

@@ -42,3 +42,5 @@ obj-$(CONFIG_RMOBILE) += rmobile/
obj-$(if $(filter stv0991,$(SOC)),y) += stv0991/
obj-$(CONFIG_ARCH_SUNXI) += sunxi/
obj-$(CONFIG_VF610) += vf610/
obj-$(CONFIG_ARCH_S5P4418) += s5p4418/
obj-$(CONFIG_ARCH_NEXELL) += s5p-common/

View File

@@ -293,13 +293,13 @@ int print_cpuinfo(void)
#endif
#ifdef CONFIG_FSL_ESDHC
int cpu_mmc_init(bd_t *bis)
int cpu_mmc_init(struct bd_info *bis)
{
return fsl_esdhc_mmc_init(bis);
}
#endif
int cpu_eth_init(bd_t *bis)
int cpu_eth_init(struct bd_info *bis)
{
#if defined(CONFIG_TSEC_ENET) && !defined(CONFIG_DM_ETH)
tsec_standard_init(bis);

View File

@@ -82,7 +82,7 @@ void ft_fixup_enet_phy_connect_type(void *fdt)
}
}
void ft_cpu_setup(void *blob, bd_t *bd)
void ft_cpu_setup(void *blob, struct bd_info *bd)
{
int off;
int val;

View File

@@ -3,9 +3,14 @@
# Copyright (C) 2009 Samsung Electronics
# Minkyu Kang <mk7.kang@samsung.com>
obj-y += cpu_info.o
ifdef CONFIG_ARCH_NEXELL
obj-$(CONFIG_PWM_NX) += pwm.o
obj-$(CONFIG_S5P4418_ONEWIRE) += pwm.o
else
obj-y += cpu_info.o
ifndef CONFIG_SPL_BUILD
obj-y += timer.o
obj-y += sromc.o
obj-$(CONFIG_PWM) += pwm.o
obj-y += timer.o
obj-y += sromc.o
obj-$(CONFIG_PWM) += pwm.o
endif
endif

View File

@@ -15,7 +15,11 @@
int pwm_enable(int pwm_id)
{
const struct s5p_timer *pwm =
#if defined(CONFIG_ARCH_NEXELL)
(struct s5p_timer *)PHY_BASEADDR_PWM;
#else
(struct s5p_timer *)samsung_get_base_timer();
#endif
unsigned long tcon;
tcon = readl(&pwm->tcon);
@@ -29,7 +33,11 @@ int pwm_enable(int pwm_id)
void pwm_disable(int pwm_id)
{
const struct s5p_timer *pwm =
#if defined(CONFIG_ARCH_NEXELL)
(struct s5p_timer *)PHY_BASEADDR_PWM;
#else
(struct s5p_timer *)samsung_get_base_timer();
#endif
unsigned long tcon;
tcon = readl(&pwm->tcon);
@@ -43,14 +51,43 @@ static unsigned long pwm_calc_tin(int pwm_id, unsigned long freq)
unsigned long tin_parent_rate;
unsigned int div;
tin_parent_rate = get_pwm_clk();
#if defined(CONFIG_ARCH_NEXELL)
unsigned int pre_div;
const struct s5p_timer *pwm =
(struct s5p_timer *)PHY_BASEADDR_PWM;
unsigned int val;
struct clk *clk = clk_get(CORECLK_NAME_PCLK);
tin_parent_rate = clk_get_rate(clk);
#else
tin_parent_rate = get_pwm_clk();
#endif
#if defined(CONFIG_ARCH_NEXELL)
writel(0, &pwm->tcfg0);
val = readl(&pwm->tcfg0);
if (pwm_id < 2)
div = ((val >> 0) & 0xff) + 1;
else
div = ((val >> 8) & 0xff) + 1;
writel(0, &pwm->tcfg1);
val = readl(&pwm->tcfg1);
val = (val >> MUX_DIV_SHIFT(pwm_id)) & 0xF;
pre_div = (1UL << val);
freq = tin_parent_rate / div / pre_div;
return freq;
#else
for (div = 2; div <= 16; div *= 2) {
if ((tin_parent_rate / (div << 16)) < freq)
return tin_parent_rate / div;
}
return tin_parent_rate / 16;
#endif
}
#define NS_IN_SEC 1000000000UL
@@ -58,7 +95,11 @@ static unsigned long pwm_calc_tin(int pwm_id, unsigned long freq)
int pwm_config(int pwm_id, int duty_ns, int period_ns)
{
const struct s5p_timer *pwm =
#if defined(CONFIG_ARCH_NEXELL)
(struct s5p_timer *)PHY_BASEADDR_PWM;
#else
(struct s5p_timer *)samsung_get_base_timer();
#endif
unsigned int offset;
unsigned long tin_rate;
unsigned long tin_ns;
@@ -84,7 +125,12 @@ int pwm_config(int pwm_id, int duty_ns, int period_ns)
tin_rate = pwm_calc_tin(pwm_id, frequency);
tin_ns = NS_IN_SEC / tin_rate;
tcnt = period_ns / tin_ns;
if (IS_ENABLED(CONFIG_ARCH_NEXELL))
/* The counter starts at zero. */
tcnt = (period_ns / tin_ns) - 1;
else
tcnt = period_ns / tin_ns;
/* Note, counters count down */
tcmp = duty_ns / tin_ns;
@@ -115,7 +161,11 @@ int pwm_init(int pwm_id, int div, int invert)
{
u32 val;
const struct s5p_timer *pwm =
#if defined(CONFIG_ARCH_NEXELL)
(struct s5p_timer *)PHY_BASEADDR_PWM;
#else
(struct s5p_timer *)samsung_get_base_timer();
#endif
unsigned long ticks_per_period;
unsigned int offset, prescaler;
@@ -148,7 +198,12 @@ int pwm_init(int pwm_id, int div, int invert)
ticks_per_period = -1UL;
} else {
const unsigned long pwm_hz = 1000;
#if defined(CONFIG_ARCH_NEXELL)
struct clk *clk = clk_get(CORECLK_NAME_PCLK);
unsigned long timer_rate_hz = clk_get_rate(clk) /
#else
unsigned long timer_rate_hz = get_pwm_clk() /
#endif
((prescaler + 1) * (1 << div));
ticks_per_period = timer_rate_hz / pwm_hz;

View File

@@ -0,0 +1,6 @@
# SPDX-License-Identifier: GPL-2.0+
#
# (C) Copyright 2016 Nexell
# Hyunseok, Jung <hsjung@nexell.co.kr>
obj-y += cpu.o

View File

@@ -0,0 +1,121 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* (C) Copyright 2016 Nexell
* Hyunseok, Jung <hsjung@nexell.co.kr>
*/
#include <common.h>
#include <command.h>
#include <asm/system.h>
#include <asm/cache.h>
#include <asm/sections.h>
#include <asm/io.h>
#include <asm/arch/nexell.h>
#include <asm/arch/clk.h>
#include <asm/arch/reset.h>
#include <asm/arch/tieoff.h>
#include <cpu_func.h>
#include <linux/delay.h>
DECLARE_GLOBAL_DATA_PTR;
#ifndef CONFIG_ARCH_CPU_INIT
#error must be define the macro "CONFIG_ARCH_CPU_INIT"
#endif
void s_init(void)
{
}
static void cpu_soc_init(void)
{
/*
* NOTE> ALIVE Power Gate must enable for Alive register access.
* must be clear wfi jump address
*/
writel(1, ALIVEPWRGATEREG);
writel(0xFFFFFFFF, SCR_ARM_SECOND_BOOT);
/* write 0xf0 on alive scratchpad reg for boot success check */
writel(readl(SCR_SIGNAGURE_READ) | 0xF0, (SCR_SIGNAGURE_SET));
/* set l2 cache tieoff */
nx_tieoff_set(NX_TIEOFF_CORTEXA9MP_TOP_QUADL2C_L2RET1N_0, 1);
nx_tieoff_set(NX_TIEOFF_CORTEXA9MP_TOP_QUADL2C_L2RET1N_1, 1);
}
#ifdef CONFIG_PL011_SERIAL
static void serial_device_init(void)
{
char dev[10];
int id;
sprintf(dev, "nx-uart.%d", CONFIG_CONS_INDEX);
id = RESET_ID_UART0 + CONFIG_CONS_INDEX;
struct clk *clk = clk_get((const char *)dev);
/* reset control: Low active ___|--- */
nx_rstcon_setrst(id, RSTCON_ASSERT);
udelay(10);
nx_rstcon_setrst(id, RSTCON_NEGATE);
udelay(10);
/* set clock */
clk_disable(clk);
clk_set_rate(clk, CONFIG_PL011_CLOCK);
clk_enable(clk);
}
#endif
int arch_cpu_init(void)
{
flush_dcache_all();
cpu_soc_init();
clk_init();
if (IS_ENABLED(CONFIG_PL011_SERIAL))
serial_device_init();
return 0;
}
#if defined(CONFIG_DISPLAY_CPUINFO)
int print_cpuinfo(void)
{
return 0;
}
#endif
void reset_cpu(ulong ignored)
{
void *clkpwr_reg = (void *)PHY_BASEADDR_CLKPWR;
const u32 sw_rst_enb_bitpos = 3;
const u32 sw_rst_enb_mask = 1 << sw_rst_enb_bitpos;
const u32 sw_rst_bitpos = 12;
const u32 sw_rst_mask = 1 << sw_rst_bitpos;
int pwrcont = 0x224;
int pwrmode = 0x228;
u32 read_value;
read_value = readl((void *)(clkpwr_reg + pwrcont));
read_value &= ~sw_rst_enb_mask;
read_value |= 1 << sw_rst_enb_bitpos;
writel(read_value, (void *)(clkpwr_reg + pwrcont));
writel(sw_rst_mask, (void *)(clkpwr_reg + pwrmode));
}
void enable_caches(void)
{
/* Enable D-cache. I-cache is already enabled in start.S */
dcache_enable();
}
#if defined(CONFIG_ARCH_MISC_INIT)
int arch_misc_init(void)
{
return 0;
}
#endif /* CONFIG_ARCH_MISC_INIT */

View File

@@ -341,7 +341,7 @@ int arch_misc_init(void)
}
#endif
int cpu_eth_init(bd_t *bis)
int cpu_eth_init(struct bd_info *bis)
{
int rc = -ENODEV;
@@ -353,7 +353,7 @@ int cpu_eth_init(bd_t *bis)
}
#ifdef CONFIG_FSL_ESDHC_IMX
int cpu_mmc_init(bd_t *bis)
int cpu_mmc_init(struct bd_info *bis)
{
return fsl_esdhc_mmc_init(bis);
}

View File

@@ -39,3 +39,5 @@ obj-$(CONFIG_S32V234) += s32v234/
obj-$(CONFIG_TARGET_HIKEY) += hisilicon/
obj-$(CONFIG_ARMV8_PSCI) += psci.o
obj-$(CONFIG_ARCH_SUNXI) += lowlevel_init.o
obj-$(CONFIG_TARGET_BCMNS3) += bcmns3/
obj-$(CONFIG_XEN) += xen/

View File

@@ -0,0 +1,5 @@
# SPDX-License-Identifier: GPL-2.0+
#
# Copyright 2020 Broadcom.
obj-y += lowlevel.o

View File

@@ -0,0 +1,98 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright 2020 Broadcom.
*
*/
#include <asm/macro.h>
#include <linux/linkage.h>
hnf_pstate_poll:
/* x0 has the desired status, return 0 for success, 1 for timeout
* clobber x1, x2, x3, x4, x6, x7
*/
mov x1, x0
mov x7, #0 /* flag for timeout */
mrs x3, cntpct_el0 /* read timer */
mov w0, #600
mov w6, #1000
mul w0, w0, w6
add x3, x3, x0 /* timeout after 100 microseconds */
mov x0, #0x18
movk x0, #0x6120, lsl #16 /* HNF0_PSTATE_STATUS */
mov w6, #4 /* HN-F node count */
1:
ldr x2, [x0]
cmp x2, x1 /* check status */
b.eq 2f
mrs x4, cntpct_el0
cmp x4, x3
b.ls 1b
mov x7, #1 /* timeout */
b 3f
2:
add x0, x0, #0x10000 /* move to next node */
subs w6, w6, #1
cbnz w6, 1b
3:
mov x0, x7
ret
hnf_set_pstate:
/* x0 has the desired state, clobber x1, x2, x6 */
mov x1, x0
/* power state to SFONLY */
mov w6, #4 /* HN-F node count */
mov x0, #0x10
movk x0, #0x6120, lsl #16 /* HNF0_PSTATE_REQ */
1: /* set pstate to sfonly */
ldr x2, [x0]
and x2, x2, #0xfffffffffffffffc /* & HNFPSTAT_MASK */
orr x2, x2, x1
str x2, [x0]
add x0, x0, #0x10000 /* move to next node */
subs w6, w6, #1
cbnz w6, 1b
ret
ENTRY(__asm_flush_l3_dcache)
/*
* Return status in x0
* success 0
* timeout 1 for setting SFONLY, 2 for FAM, 3 for both
*/
mov x29, lr
mov x8, #0
dsb sy
mov x0, #0x1 /* HNFPSTAT_SFONLY */
bl hnf_set_pstate
mov x0, #0x4 /* SFONLY status */
bl hnf_pstate_poll
cbz x0, 1f
mov x8, #1 /* timeout */
1:
dsb sy
mov x0, #0x3 /* HNFPSTAT_FAM */
bl hnf_set_pstate
mov x0, #0xc /* FAM status */
bl hnf_pstate_poll
cbz x0, 1f
add x8, x8, #0x2
1:
mov x0, x8
mov lr, x29
ret
ENDPROC(__asm_flush_l3_dcache)
ENTRY(save_boot_params)
/*
* void set_boot_params(uint64_t x0, uint64_t x1, uint64_t x2, uint64_t x3)
*/
adr x4, bl33_info
str x0, [x4]
b save_boot_params_ret
ENDPROC(save_boot_params)

View File

@@ -23,6 +23,7 @@ config ARCH_LS1012A
config ARCH_LS1028A
bool
select ARMV8_SET_SMPEN
select FSL_LAYERSCAPE
select FSL_LSCH3
select NXP_LSCH3_2
select SYS_FSL_HAS_CCI400
@@ -67,7 +68,6 @@ config ARCH_LS1043A
select SYS_FSL_ERRATUM_A009660 if !TFABOOT
select SYS_FSL_ERRATUM_A009663 if !TFABOOT
select SYS_FSL_ERRATUM_A009798
select SYS_FSL_ERRATUM_A009929
select SYS_FSL_ERRATUM_A009942 if !TFABOOT
select SYS_FSL_ERRATUM_A010315
select SYS_FSL_ERRATUM_A010539
@@ -75,7 +75,7 @@ config ARCH_LS1043A
select SYS_FSL_HAS_DDR4
select ARCH_EARLY_INIT_R
select BOARD_EARLY_INIT_F
select SYS_I2C_MXC if !DM_I2C
select SYS_I2C_MXC
select SYS_I2C_MXC_I2C1 if !DM_I2C
select SYS_I2C_MXC_I2C2 if !DM_I2C
select SYS_I2C_MXC_I2C3 if !DM_I2C
@@ -108,7 +108,7 @@ config ARCH_LS1046A
select SYS_FSL_SRDS_2
select ARCH_EARLY_INIT_R
select BOARD_EARLY_INIT_F
select SYS_I2C_MXC if !DM_I2C
select SYS_I2C_MXC
select SYS_I2C_MXC_I2C1 if !DM_I2C
select SYS_I2C_MXC_I2C2 if !DM_I2C
select SYS_I2C_MXC_I2C3 if !DM_I2C
@@ -591,9 +591,6 @@ config SYS_FSL_ERRATUM_A009635
config SYS_FSL_ERRATUM_A009660
bool
config SYS_FSL_ERRATUM_A009929
bool
config SYS_FSL_ERRATUM_A050382
bool

View File

@@ -6,7 +6,7 @@ obj-y += cpu.o
obj-y += lowlevel.o
obj-y += soc.o
ifndef CONFIG_SPL_BUILD
obj-$(CONFIG_MP) += mp.o
obj-$(CONFIG_MP) += mp.o spintable.o
obj-$(CONFIG_OF_LIBFDT) += fdt.o
endif
obj-$(CONFIG_SPL) += spl.o

View File

@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright 2017-2019 NXP
* Copyright 2017-2020 NXP
* Copyright 2014-2015 Freescale Semiconductor, Inc.
*/
@@ -1040,13 +1040,13 @@ int print_cpuinfo(void)
#endif
#ifdef CONFIG_FSL_ESDHC
int cpu_mmc_init(bd_t *bis)
int cpu_mmc_init(struct bd_info *bis)
{
return fsl_esdhc_mmc_init(bis);
}
#endif
int cpu_eth_init(bd_t *bis)
int cpu_eth_init(struct bd_info *bis)
{
int error = 0;
@@ -1229,13 +1229,15 @@ __efi_runtime_data u32 __iomem *rstcr = (u32 *)CONFIG_SYS_FSL_RST_ADDR;
void __efi_runtime reset_cpu(ulong addr)
{
#ifdef CONFIG_ARCH_LX2160A
/* clear the RST_REQ_MSK and SW_RST_REQ */
out_le32(rstcr, 0x0);
/* initiate the sw reset request */
out_le32(rstcr, 0x1);
#else
u32 val;
#ifdef CONFIG_ARCH_LX2160A
val = in_le32(rstcr);
val |= 0x01;
out_le32(rstcr, val);
#else
/* Raise RESET_REQ_B */
val = scfg_in32(rstcr);
val |= 0x02;

View File

@@ -54,7 +54,6 @@ void ft_fixup_cpu(void *blob)
fdt32_t *reg;
int addr_cells;
u64 val, core_id;
size_t *boot_code_size = &(__secondary_boot_code_size);
u32 mask = cpu_pos_mask();
int off_prev = -1;
@@ -145,11 +144,11 @@ remove_psci_node:
"cpu", 4);
}
fdt_add_mem_rsv(blob, (uintptr_t)&secondary_boot_code,
*boot_code_size);
fdt_add_mem_rsv(blob, (uintptr_t)secondary_boot_code_start,
secondary_boot_code_size);
#if CONFIG_IS_ENABLED(EFI_LOADER)
efi_add_memory_map((uintptr_t)&secondary_boot_code, *boot_code_size,
EFI_RESERVED_MEMORY_TYPE);
efi_add_memory_map((uintptr_t)secondary_boot_code_start,
secondary_boot_code_size, EFI_RESERVED_MEMORY_TYPE);
#endif
}
#endif
@@ -438,7 +437,7 @@ __weak void fdt_fixup_ecam(void *blob)
}
#endif
void ft_cpu_setup(void *blob, bd_t *bd)
void ft_cpu_setup(void *blob, struct bd_info *bd)
{
struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
unsigned int svr = gur_in32(&gur->svr);

View File

@@ -11,14 +11,16 @@
#include <asm/gic.h>
#include <asm/macro.h>
#include <asm/arch-fsl-layerscape/soc.h>
#ifdef CONFIG_MP
#include <asm/arch/mp.h>
#endif
#ifdef CONFIG_FSL_LSCH3
#include <asm/arch-fsl-layerscape/immap_lsch3.h>
#endif
#include <asm/u-boot.h>
.align 3
.weak secondary_boot_addr
secondary_boot_addr:
.quad 0
/* Get GIC offset
* For LS1043a rev1.0, GIC base address align with 4k.
* For LS1043a rev1.1, if DCFG_GIC400_ALIGN[GIC_ADDR_BIT]
@@ -208,8 +210,13 @@ ENTRY(lowlevel_init)
branch_if_master x0, x1, 2f
#if defined(CONFIG_MP) && defined(CONFIG_ARMV8_MULTIENTRY)
ldr x0, =secondary_boot_func
blr x0
/*
* Formerly, here was a jump to secondary_boot_func, but we just
* return early here and let the generic code in start.S handle
* the jump to secondary_boot_func.
*/
mov lr, x29 /* Restore LR */
ret
#endif
2:
@@ -419,151 +426,3 @@ ENTRY(__asm_flush_l3_dcache)
ret
ENDPROC(__asm_flush_l3_dcache)
#endif /* CONFIG_SYS_FSL_HAS_CCN504 */
#ifdef CONFIG_MP
/* Keep literals not used by the secondary boot code outside it */
.ltorg
/* Using 64 bit alignment since the spin table is accessed as data */
.align 4
.global secondary_boot_code
/* Secondary Boot Code starts here */
secondary_boot_code:
.global __spin_table
__spin_table:
.space CONFIG_MAX_CPUS*SPIN_TABLE_ELEM_SIZE
.align 2
ENTRY(secondary_boot_func)
/*
* MPIDR_EL1 Fields:
* MPIDR[1:0] = AFF0_CPUID <- Core ID (0,1)
* MPIDR[7:2] = AFF0_RES
* MPIDR[15:8] = AFF1_CLUSTERID <- Cluster ID (0,1,2,3)
* MPIDR[23:16] = AFF2_CLUSTERID
* MPIDR[24] = MT
* MPIDR[29:25] = RES0
* MPIDR[30] = U
* MPIDR[31] = ME
* MPIDR[39:32] = AFF3
*
* Linear Processor ID (LPID) calculation from MPIDR_EL1:
* (We only use AFF0_CPUID and AFF1_CLUSTERID for now
* until AFF2_CLUSTERID and AFF3 have non-zero values)
*
* LPID = MPIDR[15:8] | MPIDR[1:0]
*/
mrs x0, mpidr_el1
ubfm x1, x0, #8, #15
ubfm x2, x0, #0, #1
orr x10, x2, x1, lsl #2 /* x10 has LPID */
ubfm x9, x0, #0, #15 /* x9 contains MPIDR[15:0] */
/*
* offset of the spin table element for this core from start of spin
* table (each elem is padded to 64 bytes)
*/
lsl x1, x10, #6
ldr x0, =__spin_table
/* physical address of this cpus spin table element */
add x11, x1, x0
ldr x0, =__real_cntfrq
ldr x0, [x0]
msr cntfrq_el0, x0 /* set with real frequency */
str x9, [x11, #16] /* LPID */
mov x4, #1
str x4, [x11, #8] /* STATUS */
dsb sy
#if defined(CONFIG_GICV3)
gic_wait_for_interrupt_m x0
#elif defined(CONFIG_GICV2)
bl get_gic_offset
mov x0, x1
gic_wait_for_interrupt_m x0, w1
#endif
slave_cpu:
wfe
ldr x0, [x11]
cbz x0, slave_cpu
#ifndef CONFIG_ARMV8_SWITCH_TO_EL1
mrs x1, sctlr_el2
#else
mrs x1, sctlr_el1
#endif
tbz x1, #25, cpu_is_le
rev x0, x0 /* BE to LE conversion */
cpu_is_le:
ldr x5, [x11, #24]
cbz x5, 1f
#ifdef CONFIG_ARMV8_SWITCH_TO_EL1
adr x4, secondary_switch_to_el1
ldr x5, =ES_TO_AARCH64
#else
ldr x4, [x11]
ldr x5, =ES_TO_AARCH32
#endif
bl secondary_switch_to_el2
1:
#ifdef CONFIG_ARMV8_SWITCH_TO_EL1
adr x4, secondary_switch_to_el1
#else
ldr x4, [x11]
#endif
ldr x5, =ES_TO_AARCH64
bl secondary_switch_to_el2
ENDPROC(secondary_boot_func)
ENTRY(secondary_switch_to_el2)
switch_el x6, 1f, 0f, 0f
0: ret
1: armv8_switch_to_el2_m x4, x5, x6
ENDPROC(secondary_switch_to_el2)
ENTRY(secondary_switch_to_el1)
mrs x0, mpidr_el1
ubfm x1, x0, #8, #15
ubfm x2, x0, #0, #1
orr x10, x2, x1, lsl #2 /* x10 has LPID */
lsl x1, x10, #6
ldr x0, =__spin_table
/* physical address of this cpus spin table element */
add x11, x1, x0
ldr x4, [x11]
ldr x5, [x11, #24]
cbz x5, 2f
ldr x5, =ES_TO_AARCH32
bl switch_to_el1
2: ldr x5, =ES_TO_AARCH64
switch_to_el1:
switch_el x6, 0f, 1f, 0f
0: ret
1: armv8_switch_to_el1_m x4, x5, x6
ENDPROC(secondary_switch_to_el1)
/* Ensure that the literals used by the secondary boot code are
* assembled within it (this is required so that we can protect
* this area with a single memreserve region
*/
.ltorg
/* 64 bit alignment for elements accessed as data */
.align 4
.global __real_cntfrq
__real_cntfrq:
.quad COUNTER_FREQUENCY
.globl __secondary_boot_code_size
.type __secondary_boot_code_size, %object
/* Secondary Boot Code ends here */
__secondary_boot_code_size:
.quad .-secondary_boot_code
#endif

View File

@@ -6,6 +6,7 @@
#include <common.h>
#include <cpu_func.h>
#include <image.h>
#include <log.h>
#include <asm/cache.h>
#include <asm/io.h>
#include <asm/system.h>
@@ -14,17 +15,14 @@
#include <linux/delay.h>
#include "cpu.h"
#include <asm/arch-fsl-layerscape/soc.h>
#include <efi_loader.h>
DECLARE_GLOBAL_DATA_PTR;
void *get_spin_tbl_addr(void)
{
return &__spin_table;
}
phys_addr_t determine_mp_bootpg(void)
{
return (phys_addr_t)&secondary_boot_code;
/* the spin table is at the beginning */
return secondary_boot_code_start;
}
void update_os_arch_secondary_cores(uint8_t os_arch)
@@ -43,7 +41,7 @@ void update_os_arch_secondary_cores(uint8_t os_arch)
}
#ifdef CONFIG_FSL_LSCH3
void wake_secondary_core_n(int cluster, int core, int cluster_cores)
static void wake_secondary_core_n(int cluster, int core, int cluster_cores)
{
struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
struct ccsr_reset __iomem *rst = (void *)(CONFIG_SYS_FSL_RST_ADDR);
@@ -80,7 +78,11 @@ int fsl_layerscape_wake_seconday_cores(void)
#endif
u32 cores, cpu_up_mask = 1;
int i, timeout = 10;
u64 *table = get_spin_tbl_addr();
u64 *table;
#ifdef CONFIG_EFI_LOADER
u64 reloc_addr = U32_MAX;
efi_status_t ret;
#endif
#ifdef COUNTER_FREQUENCY_REAL
/* update for secondary cores */
@@ -89,16 +91,49 @@ int fsl_layerscape_wake_seconday_cores(void)
(unsigned long)&__real_cntfrq + 8);
#endif
#ifdef CONFIG_EFI_LOADER
/*
* EFI will reserve 64kb for its runtime services. This will probably
* overlap with our spin table code, which is why we have to relocate
* it.
* Keep this after the __real_cntfrq update, so we have it when we
* copy the complete section here.
*/
ret = efi_allocate_pages(EFI_ALLOCATE_MAX_ADDRESS,
EFI_RESERVED_MEMORY_TYPE,
efi_size_in_pages(secondary_boot_code_size),
&reloc_addr);
if (ret == EFI_SUCCESS) {
debug("Relocating spin table from %llx to %llx (size %lx)\n",
(u64)secondary_boot_code_start, reloc_addr,
secondary_boot_code_size);
memcpy((void *)reloc_addr, secondary_boot_code_start,
secondary_boot_code_size);
flush_dcache_range(reloc_addr,
reloc_addr + secondary_boot_code_size);
/* set new entry point for secondary cores */
secondary_boot_addr += (void *)reloc_addr -
secondary_boot_code_start;
flush_dcache_range((unsigned long)&secondary_boot_addr,
(unsigned long)&secondary_boot_addr + 8);
/* this will be used to reserve the memory */
secondary_boot_code_start = (void *)reloc_addr;
}
#endif
cores = cpu_mask();
/* Clear spin table so that secondary processors
* observe the correct value after waking up from wfe.
*/
table = get_spin_tbl_addr();
memset(table, 0, CONFIG_MAX_CPUS*SPIN_TABLE_ELEM_SIZE);
flush_dcache_range((unsigned long)table,
(unsigned long)table +
(CONFIG_MAX_CPUS*SPIN_TABLE_ELEM_SIZE));
printf("Waking secondary cores to start from %lx\n", gd->relocaddr);
debug("Waking secondary cores to start from %lx\n", gd->relocaddr);
#ifdef CONFIG_FSL_LSCH3
gur_out32(&gur->bootlocptrh, (u32)(gd->relocaddr >> 32));
@@ -168,11 +203,11 @@ int fsl_layerscape_wake_seconday_cores(void)
udelay(10);
}
if (timeout <= 0) {
printf("Not all cores (0x%x) are up (0x%x)\n",
cores, cpu_up_mask);
printf("CPU: Failed to bring up some cores (mask 0x%x)\n",
cores ^ cpu_up_mask);
return 1;
}
printf("All (%d) cores are up.\n", hweight32(cores));
printf("CPU: %d cores online\n", hweight32(cores));
return 0;
}
@@ -189,9 +224,9 @@ static int is_pos_valid(unsigned int pos)
int is_core_online(u64 cpu_id)
{
u64 *table;
u64 *table = get_spin_tbl_addr();
int pos = id_to_core(cpu_id);
table = (u64 *)get_spin_tbl_addr() + pos * WORDS_PER_SPIN_TABLE_ENTRY;
table += pos * WORDS_PER_SPIN_TABLE_ENTRY;
return table[SPIN_TABLE_ELEM_STATUS_IDX] == 1;
}
@@ -237,18 +272,16 @@ static int core_to_pos(int nr)
int cpu_status(u32 nr)
{
u64 *table;
u64 *table = get_spin_tbl_addr();
int pos;
if (nr == 0) {
table = (u64 *)get_spin_tbl_addr();
printf("table base @ 0x%p\n", table);
} else {
pos = core_to_pos(nr);
if (pos < 0)
return -1;
table = (u64 *)get_spin_tbl_addr() + pos *
WORDS_PER_SPIN_TABLE_ENTRY;
table += pos * WORDS_PER_SPIN_TABLE_ENTRY;
printf("table @ 0x%p\n", table);
printf(" addr - 0x%016llx\n",
table[SPIN_TABLE_ELEM_ENTRY_ADDR_IDX]);
@@ -264,7 +297,7 @@ int cpu_status(u32 nr)
int cpu_release(u32 nr, int argc, char *const argv[])
{
u64 boot_addr;
u64 *table = (u64 *)get_spin_tbl_addr();
u64 *table = get_spin_tbl_addr();
int pos;
pos = core_to_pos(nr);
@@ -277,11 +310,12 @@ int cpu_release(u32 nr, int argc, char *const argv[])
flush_dcache_range((unsigned long)table,
(unsigned long)table + SPIN_TABLE_ELEM_SIZE);
asm volatile("dsb st");
smp_kick_all_cpus(); /* only those with entry addr set will run */
/*
* When the first release command runs, all cores are set to go. Those
* without a valid entry address will be trapped by "wfe". "sev" kicks
* them off to check the address again. When set, they continue to run.
* The secondary CPUs polling the spin-table above for a non-zero
* value. To save power "wfe" is called. Thus call "sev" here to
* wake the CPUs and let them check the spin-table again (see
* slave_cpu loop in lowlevel.S)
*/
asm volatile("sev");

View File

@@ -36,42 +36,33 @@
#ifdef CONFIG_TFABOOT
#include <env_internal.h>
#endif
#include <dm.h>
#include <linux/err.h>
#if defined(CONFIG_TFABOOT) || defined(CONFIG_GIC_V3_ITS)
DECLARE_GLOBAL_DATA_PTR;
#endif
#ifdef CONFIG_GIC_V3_ITS
#define PENDTABLE_MAX_SZ ALIGN(BIT(ITS_MAX_LPI_NRBITS), SZ_64K)
#define PROPTABLE_MAX_SZ ALIGN(BIT(ITS_MAX_LPI_NRBITS) / 8, SZ_64K)
#define GIC_LPI_SIZE ALIGN(cpu_numcores() * PENDTABLE_MAX_SZ + \
PROPTABLE_MAX_SZ, SZ_1M)
static int fdt_add_resv_mem_gic_rd_tables(void *blob, u64 base, size_t size)
{
u32 phandle;
int err;
struct fdt_memory gic_rd_tables;
gic_rd_tables.start = base;
gic_rd_tables.end = base + size - 1;
err = fdtdec_add_reserved_memory(blob, "gic-rd-tables", &gic_rd_tables,
&phandle);
if (err < 0)
debug("%s: failed to add reserved memory: %d\n", __func__, err);
return err;
}
int ls_gic_rd_tables_init(void *blob)
{
u64 gic_lpi_base;
int ret;
struct fdt_memory lpi_base;
fdt_addr_t addr;
fdt_size_t size;
int offset, ret;
gic_lpi_base = ALIGN(gd->arch.resv_ram - GIC_LPI_SIZE, SZ_64K);
ret = fdt_add_resv_mem_gic_rd_tables(blob, gic_lpi_base, GIC_LPI_SIZE);
if (ret)
offset = fdt_path_offset(gd->fdt_blob, "/syscon@0x80000000");
addr = fdtdec_get_addr_size_auto_noparent(gd->fdt_blob, offset, "reg",
0, &size, false);
lpi_base.start = addr;
lpi_base.end = addr + size - 1;
ret = fdtdec_add_reserved_memory(blob, "lpi_rd_table", &lpi_base, NULL);
if (ret) {
debug("%s: failed to add reserved memory\n", __func__);
return ret;
}
ret = gic_lpi_tables_init(gic_lpi_base, cpu_numcores());
ret = gic_lpi_tables_init();
if (ret)
debug("%s: failed to init gic-lpi-tables\n", __func__);
@@ -445,20 +436,6 @@ int get_core_volt_from_fuse(void)
}
#elif defined(CONFIG_FSL_LSCH2)
static void erratum_a009929(void)
{
#ifdef CONFIG_SYS_FSL_ERRATUM_A009929
struct ccsr_gur *gur = (void *)CONFIG_SYS_FSL_GUTS_ADDR;
u32 __iomem *dcsr_cop_ccp = (void *)CONFIG_SYS_DCSR_COP_CCP_ADDR;
u32 rstrqmr1 = gur_in32(&gur->rstrqmr1);
rstrqmr1 |= 0x00000400;
gur_out32(&gur->rstrqmr1, rstrqmr1);
writel(0x01000000, dcsr_cop_ccp);
#endif
}
/*
* This erratum requires setting a value to eddrtqcr1 to optimal
* the DDR performance. The eddrtqcr1 register is in SCFG space
@@ -724,7 +701,6 @@ void fsl_lsch2_early_init_f(void)
#endif
/* Erratum */
erratum_a008850_early(); /* part 1 of 2 */
erratum_a009929();
erratum_a009660();
erratum_a010539();
erratum_a009008();
@@ -938,6 +914,38 @@ __weak int fsl_board_late_init(void)
return 0;
}
#define DWC3_GSBUSCFG0 0xc100
#define DWC3_GSBUSCFG0_CACHETYPE_SHIFT 16
#define DWC3_GSBUSCFG0_CACHETYPE(n) (((n) & 0xffff) \
<< DWC3_GSBUSCFG0_CACHETYPE_SHIFT)
void enable_dwc3_snooping(void)
{
int ret;
u32 val;
struct udevice *bus;
struct uclass *uc;
fdt_addr_t dwc3_base;
ret = uclass_get(UCLASS_USB, &uc);
if (ret)
return;
uclass_foreach_dev(bus, uc) {
if (!strcmp(bus->driver->of_match->compatible, "fsl,layerscape-dwc3")) {
dwc3_base = devfdt_get_addr(bus);
if (dwc3_base == FDT_ADDR_T_NONE) {
dev_err(bus, "dwc3 regs missing\n");
continue;
}
val = in_le32(dwc3_base + DWC3_GSBUSCFG0);
val &= ~DWC3_GSBUSCFG0_CACHETYPE(~0);
val |= DWC3_GSBUSCFG0_CACHETYPE(0x2222);
writel(val, dwc3_base + DWC3_GSBUSCFG0);
}
}
}
int board_late_init(void)
{
#ifdef CONFIG_CHAIN_OF_TRUST
@@ -975,6 +983,9 @@ int board_late_init(void)
fspi_ahb_init();
#endif
if (IS_ENABLED(CONFIG_DM))
enable_dwc3_snooping();
return fsl_board_late_init();
}
#endif

View File

@@ -0,0 +1,118 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* (C) Copyright 2014-2015 Freescale Semiconductor
* Copyright 2019 NXP
*/
#include <config.h>
#include <linux/linkage.h>
#include <asm/macro.h>
#include <asm/system.h>
#include <asm/arch/mp.h>
.align 3
.global secondary_boot_addr
secondary_boot_addr:
.quad __secondary_boot_func
.global secondary_boot_code_start
secondary_boot_code_start:
.quad __secondary_boot_code_start
.global secondary_boot_code_size
secondary_boot_code_size:
.quad __secondary_boot_code_end - __secondary_boot_code_start
/* Using 64 bit alignment since the spin table is accessed as data */
.align 3
/* Secondary Boot Code starts here */
__secondary_boot_code_start:
__spin_table:
.space CONFIG_MAX_CPUS*SPIN_TABLE_ELEM_SIZE
.align 2
__secondary_boot_func:
/*
* MPIDR_EL1 Fields:
* MPIDR[1:0] = AFF0_CPUID <- Core ID (0,1)
* MPIDR[7:2] = AFF0_RES
* MPIDR[15:8] = AFF1_CLUSTERID <- Cluster ID (0,1,2,3)
* MPIDR[23:16] = AFF2_CLUSTERID
* MPIDR[24] = MT
* MPIDR[29:25] = RES0
* MPIDR[30] = U
* MPIDR[31] = ME
* MPIDR[39:32] = AFF3
*
* Linear Processor ID (LPID) calculation from MPIDR_EL1:
* (We only use AFF0_CPUID and AFF1_CLUSTERID for now
* until AFF2_CLUSTERID and AFF3 have non-zero values)
*
* LPID = MPIDR[15:8] | MPIDR[1:0]
*/
mrs x0, mpidr_el1
ubfm x1, x0, #8, #15
ubfm x2, x0, #0, #1
orr x10, x2, x1, lsl #2 /* x10 has LPID */
ubfm x9, x0, #0, #15 /* x9 contains MPIDR[15:0] */
/*
* offset of the spin table element for this core from start of spin
* table (each elem is padded to 64 bytes)
*/
lsl x1, x10, #6
adr x0, __spin_table
/* physical address of this cpus spin table element */
add x11, x1, x0
adr x0, __real_cntfrq
ldr x0, [x0]
msr cntfrq_el0, x0 /* set with real frequency */
str x9, [x11, #16] /* LPID */
mov x4, #1
str x4, [x11, #8] /* STATUS */
dsb sy
1:
wfe
ldr x4, [x11]
cbz x4, 1b
mrs x1, sctlr_el2
tbz x1, #25, 2f
rev x4, x4 /* BE to LE conversion */
2:
ldr x6, =ES_TO_AARCH64
#ifdef CONFIG_ARMV8_SWITCH_TO_EL1
adr x5, 3f
switch_el x7, 0f, _dead_loop, _dead_loop
0: armv8_switch_to_el2_m x5, x6, x7
#endif
3:
ldr x7, [x11, #24] /* ARCH_COMP */
cbz x7, 4f
ldr x6, =ES_TO_AARCH32
4:
#ifdef CONFIG_ARMV8_SWITCH_TO_EL1
switch_el x7, _dead_loop, 0f, _dead_loop
0: armv8_switch_to_el1_m x4, x6, x7
#else
switch_el x7, 0f, _dead_loop, _dead_loop
0: armv8_switch_to_el2_m x4, x6, x7
#endif
_dead_loop:
wfe
b _dead_loop
/* Ensure that the literals used by the secondary boot code are
* assembled within it (this is required so that we can protect
* this area with a single memreserve region
*/
.ltorg
/* 64 bit alignment for elements accessed as data */
.align 3
.global __real_cntfrq
__real_cntfrq:
.quad COUNTER_FREQUENCY
/* Secondary Boot Code ends here */
__secondary_boot_code_end:

View File

@@ -333,7 +333,7 @@ int print_cpuinfo(void)
}
#endif
int cpu_eth_init(bd_t * bis)
int cpu_eth_init(struct bd_info * bis)
{
int rc = -ENODEV;

View File

@@ -120,6 +120,7 @@ pie_fixup_done:
mov x0, #3 << 20
msr cpacr_el1, x0 /* Enable FP/SIMD */
0:
isb
/*
* Enable SMPEN bit for coherency.
@@ -132,6 +133,7 @@ pie_fixup_done:
mrs x0, S3_1_c15_c2_1 /* cpuectlr_el1 */
orr x0, x0, #0x40
msr S3_1_c15_c2_1, x0
isb
1:
#endif
@@ -233,6 +235,7 @@ apply_a53_core_errata:
/* Enable data cache clean as data cache clean/invalidate */
orr x0, x0, #1 << 44
msr S3_1_c15_c2_0, x0 /* cpuactlr_el1 */
isb
#endif
b 0b
@@ -247,6 +250,7 @@ apply_a57_core_errata:
/* Disable write streaming no-allocate threshold */
orr x0, x0, #3 << 27
msr S3_1_c15_c2_0, x0 /* cpuactlr_el1 */
isb
#endif
#ifdef CONFIG_ARM_ERRATA_826974
@@ -254,6 +258,7 @@ apply_a57_core_errata:
/* Disable speculative load execution ahead of a DMB */
orr x0, x0, #1 << 59
msr S3_1_c15_c2_0, x0 /* cpuactlr_el1 */
isb
#endif
#ifdef CONFIG_ARM_ERRATA_833471
@@ -263,6 +268,7 @@ apply_a57_core_errata:
could impact performance. */
orr x0, x0, #1 << 38
msr S3_1_c15_c2_0, x0 /* cpuactlr_el1 */
isb
#endif
#ifdef CONFIG_ARM_ERRATA_829520
@@ -273,6 +279,7 @@ apply_a57_core_errata:
could impact performance. */
orr x0, x0, #1 << 4
msr S3_1_c15_c2_0, x0 /* cpuactlr_el1 */
isb
#endif
#ifdef CONFIG_ARM_ERRATA_833069
@@ -280,6 +287,7 @@ apply_a57_core_errata:
/* Disable Enable Invalidates of BTB bit */
and x0, x0, #0xE
msr S3_1_c15_c2_0, x0 /* cpuactlr_el1 */
isb
#endif
b 0b
ENDPROC(apply_core_errata)

View File

@@ -0,0 +1,6 @@
# SPDX-License-Identifier: GPL-2.0+
#
# (C) 2018 NXP
# (C) 2020 EPAM Systems Inc.
obj-y += lowlevel_init.o hypercall.o

View File

@@ -0,0 +1,79 @@
/* SPDX-License-Identifier: GPL-2.0
*
* hypercall.S
*
* Xen hypercall wrappers
*
* Stefano Stabellini <stefano.stabellini@eu.citrix.com>, Citrix, 2012
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License version 2
* as published by the Free Software Foundation; or, when distributed
* separately from the Linux kernel or incorporated into other
* software packages, subject to the following license:
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this source file (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use, copy, modify,
* merge, publish, distribute, sublicense, and/or sell copies of the Software,
* and to permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
* IN THE SOFTWARE.
*/
/*
* The Xen hypercall calling convention is very similar to the procedure
* call standard for the ARM 64-bit architecture: the first parameter is
* passed in x0, the second in x1, the third in x2, the fourth in x3 and
* the fifth in x4.
*
* The hypercall number is passed in x16.
*
* The return value is in x0.
*
* The hvc ISS is required to be 0xEA1, that is the Xen specific ARM
* hypercall tag.
*
* Parameter structs passed to hypercalls are laid out according to
* the ARM 64-bit EABI standard.
*/
#include <xen/interface/xen.h>
#define XEN_HYPERCALL_TAG 0xEA1
#define HYPERCALL_SIMPLE(hypercall) \
.globl HYPERVISOR_##hypercall; \
.align 4,0x90; \
HYPERVISOR_##hypercall: \
mov x16, #__HYPERVISOR_##hypercall; \
hvc XEN_HYPERCALL_TAG; \
ret; \
#define HYPERCALL0 HYPERCALL_SIMPLE
#define HYPERCALL1 HYPERCALL_SIMPLE
#define HYPERCALL2 HYPERCALL_SIMPLE
#define HYPERCALL3 HYPERCALL_SIMPLE
#define HYPERCALL4 HYPERCALL_SIMPLE
#define HYPERCALL5 HYPERCALL_SIMPLE
.text
HYPERCALL2(xen_version);
HYPERCALL3(console_io);
HYPERCALL3(grant_table_op);
HYPERCALL2(sched_op);
HYPERCALL2(event_channel_op);
HYPERCALL2(hvm_op);
HYPERCALL2(memory_op);

View File

@@ -0,0 +1,33 @@
/* SPDX-License-Identifier: GPL-2.0+
*
* (C) 2017 NXP
* (C) 2020 EPAM Systems Inc.
*/
#include <config.h>
.align 8
.global rom_pointer
rom_pointer:
.space 32
/*
* Routine: save_boot_params (called after reset from start.S)
*/
.global save_boot_params
save_boot_params:
/* The firmware provided ATAG/FDT address can be found in r2/x0 */
adr x1, rom_pointer
stp x0, x2, [x1], #16
stp x3, x4, [x1], #16
/* Returns */
b save_boot_params_ret
.global restore_boot_params
restore_boot_params:
adr x1, rom_pointer
ldp x0, x2, [x1], #16
ldp x3, x4, [x1], #16
ret

View File

@@ -71,7 +71,8 @@ dtb-$(CONFIG_MACH_S700) += \
dtb-$(CONFIG_ROCKCHIP_PX30) += \
px30-evb.dtb \
px30-firefly.dtb
px30-firefly.dtb \
rk3326-odroid-go2.dtb
dtb-$(CONFIG_ROCKCHIP_RK3036) += \
rk3036-sdk.dtb
@@ -92,6 +93,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3288) += \
rk3288-phycore-rdk.dtb \
rk3288-popmetal.dtb \
rk3288-rock2-square.dtb \
rk3288-rock-pi-n8.dtb \
rk3288-tinker.dtb \
rk3288-tinker-s.dtb \
rk3288-veyron-jerry.dtb \
@@ -134,14 +136,20 @@ dtb-$(CONFIG_ROCKCHIP_RK3399) += \
rk3399-puma-haikou.dtb \
rk3399-roc-pc.dtb \
rk3399-roc-pc-mezzanine.dtb \
rk3399-rock-pi-4.dtb \
rk3399-rock-pi-4a.dtb \
rk3399-rock-pi-4b.dtb \
rk3399-rock-pi-4c.dtb \
rk3399-rock960.dtb \
rk3399-rockpro64.dtb
rk3399-rockpro64.dtb \
rk3399pro-rock-pi-n10.dtb
dtb-$(CONFIG_ROCKCHIP_RV1108) += \
rv1108-elgin-r1.dtb \
rv1108-evb.dtb
dtb-$(CONFIG_ARCH_S5P4418) += \
s5p4418-nanopi2.dtb
dtb-$(CONFIG_ARCH_MESON) += \
meson-gxbb-nanopi-k2.dtb \
meson-gxbb-odroidc2.dtb \
@@ -161,6 +169,7 @@ dtb-$(CONFIG_ARCH_MESON) += \
meson-g12b-odroid-n2.dtb \
meson-g12b-a311d-khadas-vim3.dtb \
meson-sm1-khadas-vim3l.dtb \
meson-sm1-odroid-c4.dtb \
meson-sm1-sei610.dtb
dtb-$(CONFIG_ARCH_TEGRA) += tegra20-harmony.dtb \
tegra20-medcom-wide.dtb \
@@ -210,6 +219,11 @@ dtb-$(CONFIG_ARCH_MVEBU) += \
armada-8040-db.dtb \
armada-8040-mcbin.dtb \
armada-xp-crs305-1g-4s.dtb \
armada-xp-crs305-1g-4s-bit.dtb \
armada-xp-crs326-24g-2s.dtb \
armada-xp-crs326-24g-2s-bit.dtb \
armada-xp-crs328-4c-20s-4s.dtb \
armada-xp-crs328-4c-20s-4s-bit.dtb \
armada-xp-db-xc3-24g4xg.dtb \
armada-xp-gp.dtb \
armada-xp-maxbcm.dtb \
@@ -280,6 +294,7 @@ dtb-$(CONFIG_ARCH_ZYNQMP) += \
zynqmp-mini-emmc1.dtb \
zynqmp-mini-nand.dtb \
zynqmp-mini-qspi.dtb \
zynqmp-topic-miamimp-xilinx-xdp-v1r1.dtb \
zynqmp-zcu100-revC.dtb \
zynqmp-zcu102-revA.dtb \
zynqmp-zcu102-revB.dtb \
@@ -674,6 +689,7 @@ dtb-y += \
imx6q-nitrogen6x.dtb \
imx6q-novena.dtb \
imx6q-pico.dtb \
imx6q-phytec-mira-rdk-nand.dtb \
imx6q-sabreauto.dtb \
imx6q-sabrelite.dtb \
imx6q-sabresd.dtb \
@@ -710,6 +726,7 @@ dtb-$(CONFIG_MX6UL) += \
dtb-$(CONFIG_MX6ULL) += \
imx6ull-14x14-evk.dtb \
imx6ull-colibri.dtb \
imx6ull-myir-mys-6ulx-eval.dtb \
imx6ull-phytec-segin-ff-rdk-emmc.dtb \
imx6ull-dart-6ul.dtb \
imx6ull-somlabs-visionsom.dtb \
@@ -766,6 +783,7 @@ dtb-$(CONFIG_RCAR_GEN2) += \
r8a7794-silk-u-boot.dtb
dtb-$(CONFIG_RCAR_GEN3) += \
r8a774a1-beacon-rzg2m-kit.dtb \
r8a77950-ulcb-u-boot.dtb \
r8a77950-salvator-x-u-boot.dtb \
r8a77960-ulcb-u-boot.dtb \
@@ -848,6 +866,17 @@ dtb-$(CONFIG_TARGET_OMAP3_BEAGLE) += \
dtb-$(CONFIG_TARGET_OMAP3_IGEP00X0) += \
omap3-igep0020.dtb
dtb-$(CONFIG_TARGET_OMAP4_PANDA) += \
omap4-panda.dtb \
omap4-panda-es.dtb
dtb-$(CONFIG_TARGET_OMAP4_SDP4430) += \
omap4-sdp.dtb \
omap4-sdp-es23plus.dtb
dtb-$(CONFIG_TARGET_OMAP5_UEVM) += \
omap5-uevm.dtb
dtb-$(CONFIG_TARGET_SAMA5D2_PTC_EK) += \
at91-sama5d2_ptc_ek.dtb
@@ -907,6 +936,8 @@ dtb-$(CONFIG_ARCH_BCM68360) += \
dtb-$(CONFIG_ARCH_BCM6858) += \
bcm968580xref.dtb
dtb-$(CONFIG_TARGET_BCMNS3) += ns3-board.dtb
dtb-$(CONFIG_ARCH_ASPEED) += ast2500-evb.dtb
dtb-$(CONFIG_ARCH_STI) += stih410-b2260.dtb
@@ -917,15 +948,21 @@ dtb-$(CONFIG_STM32MP15x) += \
stm32mp157c-dk2.dtb \
stm32mp157c-ed1.dtb \
stm32mp157c-ev1.dtb \
stm32mp157c-odyssey.dtb \
stm32mp15xx-dhcom-drc02.dtb \
stm32mp15xx-dhcom-pdk2.dtb \
stm32mp15xx-dhcor-avenger96.dtb
dtb-$(CONFIG_SOC_K3_AM6) += k3-am654-base-board.dtb k3-am654-r5-base-board.dtb
dtb-$(CONFIG_SOC_K3_J721E) += k3-j721e-common-proc-board.dtb \
k3-j721e-r5-common-proc-board.dtb
k3-j721e-r5-common-proc-board.dtb \
k3-j7200-common-proc-board.dtb \
k3-j7200-r5-common-proc-board.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += \
mt7622-rfb.dtb \
mt7623a-unielec-u7623-02-emmc.dtb \
mt7622-bananapi-bpi-r64.dtb \
mt7623n-bananapi-bpi-r2.dtb \
mt7629-rfb.dtb \
mt8512-bm1-emmc.dtb \
@@ -944,6 +981,8 @@ dtb-$(CONFIG_TARGET_VEXPRESS_CA5X2) += vexpress-v2p-ca5s.dtb
dtb-$(CONFIG_TARGET_VEXPRESS_CA9X4) += vexpress-v2p-ca9.dtb
dtb-$(CONFIG_TARGET_VEXPRESS_CA15_TC2) += vexpress-v2p-ca15_a7.dtb
dtb-$(CONFIG_TARGET_TOTAL_COMPUTE) += total_compute.dtb
dtb-$(CONFIG_TARGET_DURIAN) += phytium-durian.dtb
dtb-$(CONFIG_TARGET_PRESIDIO_ASIC) += ca-presidio-engboard.dtb

View File

@@ -159,6 +159,6 @@
&pcie0 {
pinctrl-names = "default";
pinctrl-0 = <&pcie_pins>;
reset-gpio = <&gpiosb 3 GPIO_ACTIVE_HIGH>;
reset-gpios = <&gpiosb 3 GPIO_ACTIVE_LOW>;
status = "okay";
};

View File

@@ -67,18 +67,29 @@
device_type = "memory";
reg = <0x00000000 0x00000000 0x00000000 0x20000000>;
};
vcc_sd_reg0: regulator@0 {
compatible = "regulator-gpio";
regulator-name = "vcc_sd0";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-type = "voltage";
states = <1800000 0x1
3300000 0x0>;
gpios = <&gpionb 4 GPIO_ACTIVE_HIGH>;
};
};
&comphy {
max-lanes = <3>;
phy0 {
phy-type = <PHY_TYPE_PEX0>;
phy-speed = <PHY_SPEED_2_5G>;
phy-type = <PHY_TYPE_USB3_HOST0>;
phy-speed = <PHY_SPEED_5G>;
};
phy1 {
phy-type = <PHY_TYPE_USB3_HOST0>;
phy-speed = <PHY_SPEED_5G>;
phy-type = <PHY_TYPE_PEX0>;
phy-speed = <PHY_SPEED_2_5G>;
};
phy2 {
@@ -110,6 +121,15 @@
status = "okay";
};
&sdhci0 {
pinctrl-names = "default";
pinctrl-0 = <&sdio_pins>;
bus-width = <4>;
cd-gpios = <&gpionb 3 GPIO_ACTIVE_LOW>;
vqmmc-supply = <&vcc_sd_reg0>;
status = "okay";
};
&spi0 {
status = "okay";
pinctrl-names = "default";
@@ -145,6 +165,6 @@
&pcie0 {
pinctrl-names = "default";
pinctrl-0 = <&pcie_pins>;
reset-gpio = <&gpiosb 3 GPIO_ACTIVE_HIGH>;
reset-gpios = <&gpiosb 3 GPIO_ACTIVE_LOW>;
status = "okay";
};

View File

@@ -100,6 +100,8 @@
pinctrl-names = "default";
pinctrl-0 = <&i2c1_pins>;
status = "okay";
#address-cells = <1>;
#size-cells = <0>;
rtc@6f {
compatible = "microchip,mcp7941x";
@@ -170,6 +172,6 @@
&pcie0 {
pinctrl-names = "default";
pinctrl-0 = <&pcie_pins>;
reset-gpio = <&gpiosb 3 GPIO_ACTIVE_HIGH>;
reset-gpios = <&gpiosb 3 GPIO_ACTIVE_LOW>;
status = "disabled";
};

View File

@@ -72,6 +72,8 @@
pinctrl-0 = <&spi0_pins>;
status = "okay";
u-boot,dm-pre-reloc;
#address-cells = <1>;
#size-cells = <0>;
spi-flash@0 {
u-boot,dm-pre-reloc;

View File

@@ -14,6 +14,9 @@
&spi1 {
u-boot,dm-spl;
spi-flash@0 {
u-boot,dm-spl;
};
};
&w25q32 {
@@ -21,6 +24,18 @@
u-boot,dm-spl;
};
&gpio0 {
u-boot,dm-spl;
};
&ahci0 {
u-boot,dm-spl;
};
&ahci1 {
u-boot,dm-spl;
};
&sdhci {
u-boot,dm-spl;
};

View File

@@ -140,11 +140,6 @@
soc {
internal-regs {
i2c@11000 {
clock-frequency = <400000>;
pinctrl-0 = <&i2c0_pins>;
pinctrl-names = "default";
status = "okay";
/*
* PCA9655 GPIO expander, up to 1MHz clock.
* 0-Board Revision bit 0 #
@@ -187,8 +182,7 @@
gpio-hog;
gpios = <5 GPIO_ACTIVE_HIGH>;
input;
line-name =
"usb-overcurrent-status";
line-name = "usb-overcurrent-status";
};
};
@@ -248,7 +242,7 @@
bus-width = <4>;
cd-gpios = <&gpio0 20 GPIO_ACTIVE_LOW>;
no-1-8-v;
pinctrl-0 = <&microsom_sdhci_pins
pinctrl-0 = <&helios_sdhci_pins
&helios_sdhci_cd_pins>;
pinctrl-names = "default";
status = "okay";
@@ -286,6 +280,12 @@
marvell,pins = "mpp20";
marvell,function = "gpio";
};
helios_sdhci_pins: helios-sdhci-pins {
marvell,pins = "mpp21", "mpp28",
"mpp37", "mpp38",
"mpp39", "mpp40";
marvell,function = "sd0";
};
helios_led_pins: helios-led-pins {
marvell,pins = "mpp24", "mpp25",
"mpp49", "mpp50",

View File

@@ -0,0 +1,43 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Device Tree file for MikroTik CRS305-1G-4S+ Bit board
*
* Copyright (C) 2020 Sartura Ltd.
* Author: Luka Kovacic <luka.kovacic@sartura.hr>
*/
#include "armada-xp-crs305-1g-4s.dtsi"
/ {
model = "MikroTik CRS305-1G-4S+ Bit";
};
&spi0 {
status = "okay";
spi-flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-flash", "jedec,spi-nor";
reg = <0>; /* Chip select 0 */
spi-max-frequency = <108000000>;
m25p,fast-read;
partition@u-boot {
reg = <0x00000000 0x001f0000>;
label = "u-boot";
};
partition@u-boot-env {
reg = <0x001f0000 0x00010000>;
label = "u-boot-env";
};
partition@ubi1 {
reg = <0x00200000 0x03f00000>;
label = "ubi1";
};
partition@ubi2 {
reg = <0x04100000 0x03f00000>;
label = "ubi2";
};
};
};

View File

@@ -95,16 +95,16 @@
m25p,fast-read;
partition@u-boot {
reg = <0x00000000 0x00080000>;
reg = <0x00000000 0x001f0000>;
label = "u-boot";
};
partition@u-boot-env {
reg = <0x00080000 0x00010000>;
reg = <0x001f0000 0x00010000>;
label = "u-boot-env";
};
partition@firmware {
reg = <0x00090000 0x00f70000>;
label = "firmware";
partition@ubi1 {
reg = <0x00200000 0x00e00000>;
label = "ubi1";
};
};

View File

@@ -0,0 +1,43 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Device Tree file for MikroTik CRS326-24G-2S+ Bit board
*
* Copyright (C) 2020 Sartura Ltd.
* Author: Luka Kovacic <luka.kovacic@sartura.hr>
*/
#include "armada-xp-crs326-24g-2s.dtsi"
/ {
model = "MikroTik CRS326-24G-2S+ Bit";
};
&spi0 {
status = "okay";
spi-flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-flash", "jedec,spi-nor";
reg = <0>; /* Chip select 0 */
spi-max-frequency = <108000000>;
m25p,fast-read;
partition@u-boot {
reg = <0x00000000 0x001f0000>;
label = "u-boot";
};
partition@u-boot-env {
reg = <0x001f0000 0x00010000>;
label = "u-boot-env";
};
partition@ubi1 {
reg = <0x00200000 0x03f00000>;
label = "ubi1";
};
partition@ubi2 {
reg = <0x04100000 0x03f00000>;
label = "ubi2";
};
};
};

View File

@@ -0,0 +1,13 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
&uart0 {
u-boot,dm-pre-reloc;
};
&spi0 {
u-boot,dm-pre-reloc;
spi-flash@0 {
u-boot,dm-pre-reloc;
};
};

View File

@@ -0,0 +1,17 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Device Tree file for MikroTik CRS326-24G-2S+ board
*
* Copyright (C) 2020 Sartura Ltd.
* Author: Luka Kovacic <luka.kovacic@sartura.hr>
*/
#include "armada-xp-crs326-24g-2s.dtsi"
/ {
model = "MikroTik CRS326-24G-2S+";
};
&spi0 {
status = "okay";
};

View File

@@ -0,0 +1,110 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Device Tree file for CRS326-24G-2S board
*
* Copyright (C) 2016 Allied Telesis Labs
* Copyright (C) 2020 Sartura Ltd.
*
* Based on armada-xp-db.dts
*
* Note: this Device Tree assumes that the bootloader has remapped the
* internal registers to 0xf1000000 (instead of the default
* 0xd0000000). The 0xf1000000 is the default used by the recent,
* DT-capable, U-Boot bootloaders provided by Marvell. Some earlier
* boards were delivered with an older version of the bootloader that
* left internal registers mapped at 0xd0000000. If you are in this
* situation, you should either update your bootloader (preferred
* solution) or the below Device Tree should be adjusted.
*/
/dts-v1/;
#include "armada-xp-98dx3236.dtsi"
#include "armada-xp-crs326-24g-2s-u-boot.dtsi"
/ {
model = "CRS326-24G-2S+";
compatible = "marvell,armadaxp-98dx3236", "marvell,armadaxp-mv78260", "marvell,armadaxp", "marvell,armada-370-xp";
chosen {
stdout-path = "serial0:115200n8";
bootargs = "console=ttyS0,115200 earlyprintk";
};
aliases {
spi0 = &spi0;
};
memory {
device_type = "memory";
reg = <0 0x00000000 0 0x20000000>; /* 512 MB */
};
};
&L2 {
arm,parity-enable;
marvell,ecc-enable;
};
&devbus_bootcs {
status = "okay";
/* Device Bus parameters are required */
/* Read parameters */
devbus,bus-width = <16>;
devbus,turn-off-ps = <60000>;
devbus,badr-skew-ps = <0>;
devbus,acc-first-ps = <124000>;
devbus,acc-next-ps = <248000>;
devbus,rd-setup-ps = <0>;
devbus,rd-hold-ps = <0>;
/* Write parameters */
devbus,sync-enable = <0>;
devbus,wr-high-ps = <60000>;
devbus,wr-low-ps = <60000>;
devbus,ale-wr-ps = <60000>;
};
&uart0 {
status = "okay";
};
&uart1 {
status = "okay";
};
&i2c0 {
clock-frequency = <100000>;
status = "okay";
};
&usb0 {
status = "okay";
};
&spi0 {
status = "okay";
spi-flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-flash", "jedec,spi-nor";
reg = <0>; /* Chip select 0 */
spi-max-frequency = <108000000>;
m25p,fast-read;
partition@u-boot {
reg = <0x00000000 0x001f0000>;
label = "u-boot";
};
partition@u-boot-env {
reg = <0x001f0000 0x00010000>;
label = "u-boot-env";
};
partition@ubi1 {
reg = <0x00200000 0x00e00000>;
label = "ubi1";
};
};
};

View File

@@ -0,0 +1,43 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Device Tree file for MikroTik CRS328-4C-20S-4S+ Bit board
*
* Copyright (C) 2020 Sartura Ltd.
* Author: Luka Kovacic <luka.kovacic@sartura.hr>
*/
#include "armada-xp-crs328-4c-20s-4s.dtsi"
/ {
model = "MikroTik CRS328-4C-20S-4S+ Bit";
};
&spi0 {
status = "okay";
spi-flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-flash", "jedec,spi-nor";
reg = <0>; /* Chip select 0 */
spi-max-frequency = <108000000>;
m25p,fast-read;
partition@u-boot {
reg = <0x00000000 0x001f0000>;
label = "u-boot";
};
partition@u-boot-env {
reg = <0x001f0000 0x00010000>;
label = "u-boot-env";
};
partition@ubi1 {
reg = <0x00200000 0x03f00000>;
label = "ubi1";
};
partition@ubi2 {
reg = <0x04100000 0x03f00000>;
label = "ubi2";
};
};
};

View File

@@ -0,0 +1,13 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
&uart0 {
u-boot,dm-pre-reloc;
};
&spi0 {
u-boot,dm-pre-reloc;
spi-flash@0 {
u-boot,dm-pre-reloc;
};
};

View File

@@ -0,0 +1,17 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Device Tree file for MikroTik CRS328-4C-20S-4S+ board
*
* Copyright (C) 2020 Sartura Ltd.
* Author: Luka Kovacic <luka.kovacic@sartura.hr>
*/
#include "armada-xp-crs328-4c-20s-4s.dtsi"
/ {
model = "MikroTik CRS328-4C-20S-4S+";
};
&spi0 {
status = "okay";
};

View File

@@ -0,0 +1,110 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Device Tree file for CRS328-4C-20S-4S+ board
*
* Copyright (C) 2016 Allied Telesis Labs
* Copyright (C) 2020 Sartura Ltd.
*
* Based on armada-xp-db.dts
*
* Note: this Device Tree assumes that the bootloader has remapped the
* internal registers to 0xf1000000 (instead of the default
* 0xd0000000). The 0xf1000000 is the default used by the recent,
* DT-capable, U-Boot bootloaders provided by Marvell. Some earlier
* boards were delivered with an older version of the bootloader that
* left internal registers mapped at 0xd0000000. If you are in this
* situation, you should either update your bootloader (preferred
* solution) or the below Device Tree should be adjusted.
*/
/dts-v1/;
#include "armada-xp-98dx3236.dtsi"
#include "armada-xp-crs328-4c-20s-4s-u-boot.dtsi"
/ {
model = "CRS328-4C-20S-4S+";
compatible = "marvell,armadaxp-98dx3236", "marvell,armadaxp-mv78260", "marvell,armadaxp", "marvell,armada-370-xp";
chosen {
stdout-path = "serial0:115200n8";
bootargs = "console=ttyS0,115200 earlyprintk";
};
aliases {
spi0 = &spi0;
};
memory {
device_type = "memory";
reg = <0 0x00000000 0 0x20000000>; /* 512 MB */
};
};
&L2 {
arm,parity-enable;
marvell,ecc-enable;
};
&devbus_bootcs {
status = "okay";
/* Device Bus parameters are required */
/* Read parameters */
devbus,bus-width = <16>;
devbus,turn-off-ps = <60000>;
devbus,badr-skew-ps = <0>;
devbus,acc-first-ps = <124000>;
devbus,acc-next-ps = <248000>;
devbus,rd-setup-ps = <0>;
devbus,rd-hold-ps = <0>;
/* Write parameters */
devbus,sync-enable = <0>;
devbus,wr-high-ps = <60000>;
devbus,wr-low-ps = <60000>;
devbus,ale-wr-ps = <60000>;
};
&uart0 {
status = "okay";
};
&uart1 {
status = "okay";
};
&i2c0 {
clock-frequency = <100000>;
status = "okay";
};
&usb0 {
status = "okay";
};
&spi0 {
status = "okay";
spi-flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-flash", "jedec,spi-nor";
reg = <0>; /* Chip select 0 */
spi-max-frequency = <108000000>;
m25p,fast-read;
partition@u-boot {
reg = <0x00000000 0x001f0000>;
label = "u-boot";
};
partition@u-boot-env {
reg = <0x001f0000 0x00010000>;
label = "u-boot-env";
};
partition@ubi1 {
reg = <0x00200000 0x00e00000>;
label = "ubi1";
};
};
};

View File

@@ -177,6 +177,9 @@
};
mdio {
#address-cells = <1>;
#size-cells = <0>;
phy0: ethernet-phy@0 {
reg = <0>;
};

View File

@@ -107,6 +107,8 @@
};
mdio {
#address-cells = <1>;
#size-cells = <0>;
phy0: ethernet-phy@0 {
reg = <0>;
};

View File

@@ -51,7 +51,7 @@
/* microSD card slot */
&sdhci1 {
status = "okay";
xlnx,mio_bank = <1>;
xlnx,mio-bank = <1>;
clock-frequency = <199998000>;
max-frequency = <50000000>;
no-1-8-v;

View File

@@ -51,6 +51,6 @@
/* Micron MTFC8GAKAJCN-4M 8 GB eMMC */
&sdhci0 {
status = "okay";
xlnx,mio_bank = <0>;
xlnx,mio-bank = <0>;
clock-frequency = <199998000>;
};

View File

@@ -0,0 +1,597 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright 2020, Compass Electronics Group, LLC
*/
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
aliases {
serial0 = &scif2;
serial1 = &hscif0;
serial2 = &hscif1;
serial3 = &scif0;
serial4 = &hscif2;
serial5 = &scif5;
spi0 = &msiof0;
spi1 = &msiof1;
spi2 = &msiof2;
spi3 = &msiof3;
ethernet0 = &avb;
};
chosen {
stdout-path = "serial0:115200n8";
};
backlight: backlight {
compatible = "pwm-backlight";
power-supply = <&reg_lcd>;
enable-gpios = <&gpio_exp1 3 GPIO_ACTIVE_HIGH>;
pwms = <&pwm0 0 50000>;
brightness-levels = <0 4 8 16 32 64 128 255>;
default-brightness-level = <6>;
};
hdmi0-out {
compatible = "hdmi-connector";
type = "a";
port {
hdmi0_con: endpoint {
remote-endpoint = <&rcar_dw_hdmi0_out>;
};
};
};
keys {
compatible = "gpio-keys";
key-1 {
gpios = <&gpio4 6 GPIO_ACTIVE_LOW>;
linux,code = <KEY_1>;
label = "Switch-1";
wakeup-source;
debounce-interval = <20>;
};
key-2 {
gpios = <&gpio3 13 GPIO_ACTIVE_LOW>;
linux,code = <KEY_2>;
label = "Switch-2";
wakeup-source;
debounce-interval = <20>;
};
key-3 {
gpios = <&gpio5 17 GPIO_ACTIVE_LOW>;
linux,code = <KEY_3>;
label = "Switch-3";
wakeup-source;
debounce-interval = <20>;
};
key-4 {
gpios = <&gpio5 20 GPIO_ACTIVE_LOW>;
linux,code = <KEY_4>;
label = "Switch-4";
wakeup-source;
debounce-interval = <20>;
};
key-5 {
gpios = <&gpio5 22 GPIO_ACTIVE_LOW>;
linux,code = <KEY_5>;
label = "Switch-4";
wakeup-source;
debounce-interval = <20>;
};
};
leds {
compatible = "gpio-leds";
pinctrl-0 = <&led_pins>;
pinctrl-names = "default";
led0 {
gpios = <&gpio0 4 GPIO_ACTIVE_HIGH>;
label = "LED0";
linux,default-trigger = "heartbeat";
};
led1 {
gpios = <&gpio7 0 GPIO_ACTIVE_HIGH>;
label = "LED1";
linux,default-trigger = "heartbeat";
};
led2 {
gpios = <&gpio7 1 GPIO_ACTIVE_HIGH>;
label = "LED2";
linux,default-trigger = "heartbeat";
};
led3 {
gpios = <&gpio7 3 GPIO_ACTIVE_HIGH>;
label = "LED3";
linux,default-trigger = "heartbeat";
};
};
reg_audio: regulator_audio {
compatible = "regulator-fixed";
regulator-name = "audio-1.8V";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
gpio = <&gpio_exp2 7 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
reg_lcd: regulator-lcd {
compatible = "regulator-fixed";
regulator-name = "lcd_panel_pwr";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpio_exp1 1 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
reg_lcd_reset: regulator-lcd-reset {
compatible = "regulator-fixed";
regulator-name = "nLCD_RESET";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpio5 3 GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <&reg_lcd>;
};
reg_cam0: regulator_camera {
compatible = "regulator-fixed";
regulator-name = "reg_cam0";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
gpio = <&gpio_exp2 2 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
reg_cam1: regulator_camera {
compatible = "regulator-fixed";
regulator-name = "reg_cam1";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
gpio = <&gpio_exp2 5 GPIO_ACTIVE_HIGH>;
enable-active-high;
startup-delay-us = <100000>;
};
sound_card {
compatible = "audio-graph-card";
label = "rcar-sound";
dais = <&rsnd_port0>, <&rsnd_port1>;
};
vccq_sdhi0: regulator-vccq-sdhi0 {
compatible = "regulator-gpio";
regulator-name = "SDHI0 VccQ";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
gpios = <&gpio6 30 GPIO_ACTIVE_HIGH>;
gpios-states = <1>;
states = <3300000 1>, <1800000 0>;
regulator-always-on;
};
/* External DU dot clocks */
x302_clk: x302-clock {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <33000000>;
};
x304_clk: x304-clock {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <25000000>;
};
};
&audio_clk_a {
clock-frequency = <22579200>;
};
&audio_clk_b {
clock-frequency = <22579200>;
};
&can0 {
pinctrl-0 = <&can0_pins>;
pinctrl-names = "default";
renesas,can-clock-select = <0x0>;
status = "okay";
};
&can1 {
pinctrl-0 = <&can1_pins>;
pinctrl-names = "default";
renesas,can-clock-select = <0x0>;
status = "okay";
};
&du {
pinctrl-0 = <&du_pins>;
pinctrl-names = "default";
status = "okay";
clocks = <&cpg CPG_MOD 724>,
<&cpg CPG_MOD 723>,
<&cpg CPG_MOD 722>,
<&versaclock5 1>,
<&x302_clk>,
<&versaclock5 2>;
clock-names = "du.0", "du.1", "du.2",
"dclkin.0", "dclkin.1", "dclkin.2";
};
&ehci0 {
dr_mode = "otg";
status = "okay";
clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>, <&versaclock5 3>, <&versaclock6_bb 4>;
};
&ehci1 {
status = "okay";
clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>, <&versaclock5 4>;
};
&hdmi0 {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
dw_hdmi0_in: endpoint {
remote-endpoint = <&du_out_hdmi0>;
};
};
port@1 {
reg = <1>;
rcar_dw_hdmi0_out: endpoint {
remote-endpoint = <&hdmi0_con>;
};
};
port@2 {
/* HDMI sound */
reg = <2>;
dw_hdmi0_snd_in: endpoint {
remote-endpoint = <&rsnd_endpoint1>;
};
};
};
};
&hscif1 {
pinctrl-0 = <&hscif1_pins>;
pinctrl-names = "default";
uart-has-rtscts;
status = "okay";
};
&hsusb {
dr_mode = "otg";
status = "okay";
};
&i2c2 {
status = "okay";
clock-frequency = <100000>;
pinctrl-0 = <&i2c2_pins>;
pinctrl-names = "default";
gpio_exp2: gpio@21 {
compatible = "onnn,pca9654";
reg = <0x21>;
gpio-controller;
#gpio-cells = <2>;
};
gpio_exp3: gpio@22 {
compatible = "onnn,pca9654";
reg = <0x22>;
gpio-controller;
#gpio-cells = <2>;
};
versaclock6_bb: versaclock6_bb@6a {
compatible = "idt,5p49v6965";
reg = <0x6a>;
#clock-cells = <1>;
clocks = <&x304_clk>;
clock-names = "xin";
/* CSI0_MCLK, CSI1_MCLK, AUDIO_CLKIN, USB_HUB_MCLK_BB */
assigned-clocks = <&versaclock6_bb 1>,
<&versaclock6_bb 2>,
<&versaclock6_bb 3>,
<&versaclock6_bb 4>;
assigned-clock-rates = <24000000>, <24000000>, <24000000>, <24000000>;
};
};
&i2c0 {
status = "okay";
clock-frequency = <400000>;
pinctrl-0 = <&i2c0_pins>;
pinctrl-names = "default";
};
&i2c5 {
status = "okay";
clock-frequency = <100000>;
pinctrl-0 = <&i2c5_pins>;
pinctrl-names = "default";
codec: wm8962@1a {
compatible = "wlf,wm8962";
reg = <0x1a>;
DCVDD-supply = <&reg_audio>;
DBVDD-supply = <&reg_audio>;
AVDD-supply = <&reg_audio>;
CPVDD-supply = <&reg_audio>;
MICVDD-supply = <&reg_audio>;
PLLVDD-supply = <&reg_audio>;
SPKVDD1-supply = <&reg_audio>;
SPKVDD2-supply = <&reg_audio>;
gpio-cfg = <
0x0000 /* 0:Default */
0x0000 /* 1:Default */
0x0000 /* 2:Default */
0x0000 /* 3:Default */
0x0000 /* 4:Default */
0x0000 /* 5:Default */
>;
port {
wm8962_endpoint: endpoint {
remote-endpoint = <&rsnd_endpoint0>;
};
};
};
/* 0 - lcd_reset */
/* 1 - lcd_pwr */
/* 2 - lcd_select */
/* 3 - backlight-enable */
/* 4 - Touch_shdwn */
/* 5 - LCD_H_pol */
/* 6 - lcd_V_pol */
gpio_exp1: gpio@20 {
compatible = "onnn,pca9654";
reg = <0x20>;
gpio-controller;
#gpio-cells = <2>;
};
touchscreen@26 {
compatible = "ilitek,ili2117";
reg = <0x26>;
interrupt-parent = <&gpio5>;
interrupts = <9 IRQ_TYPE_EDGE_RISING>;
wakeup-source;
};
};
&ohci0 {
dr_mode = "otg";
status = "okay";
};
&ohci1 {
status = "okay";
};
&pciec0 {
status = "okay";
};
&pciec1 {
status = "okay";
};
&pcie_bus_clk {
clock-frequency = <100000000>;
};
&pfc {
can0_pins: can0 {
groups = "can0_data_a";
function = "can0";
};
can1_pins: can1 {
groups = "can1_data";
function = "can1";
};
du_pins: du {
groups = "du_rgb888", "du_sync", "du_clk_out_1", "du_disp";
function = "du";
};
i2c2_pins: i2c2 {
groups = "i2c2_a";
function = "i2c2";
};
i2c5_pins: i2c5 {
groups = "i2c5";
function = "i2c5";
};
led_pins: leds {
/* GP_0_4 , AVS1, AVS2, GP_7_3 */
pins = "GP_0_4", "GP_7_0", "GP_7_1", "GP_7_3";
bias-pull-down;
};
msiof1_pins: msiof1 {
groups = "msiof1_clk_g", "msiof1_rxd_g", "msiof1_txd_g";
function = "msiof1";
};
pwm0_pins: pwm0 {
groups = "pwm0";
function = "pwm0";
};
sdhi0_pins: sd0 {
groups = "sdhi0_data4", "sdhi0_ctrl";
function = "sdhi0";
power-source = <3300>;
};
sdhi0_pins_uhs: sd0_uhs {
groups = "sdhi0_data4", "sdhi0_ctrl";
function = "sdhi0";
power-source = <1800>;
};
sound_pins: sound {
groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data_a";
function = "ssi";
};
sound_clk_pins: sound_clk {
groups = "audio_clk_a_a";
function = "audio_clk";
};
usb0_pins: usb0 {
mux {
groups = "usb0";
function = "usb0";
};
};
usb1_pins: usb1 {
mux {
groups = "usb1";
function = "usb1";
};
};
usb30_pins: usb30 {
mux {
groups = "usb30";
function = "usb30";
};
};
};
&pwm0 {
pinctrl-0 = <&pwm0_pins>;
pinctrl-names = "default";
status = "okay";
};
&rcar_sound {
pinctrl-0 = <&sound_pins &sound_clk_pins>;
pinctrl-names = "default";
/* Single DAI */
#sound-dai-cells = <0>;
/* audio_clkout0/1/2/3 */
#clock-cells = <1>;
clock-frequency = <11289600>;
status = "okay";
clocks = <&cpg CPG_MOD 1005>,
<&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
<&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
<&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
<&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
<&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
<&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
<&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
<&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
<&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
<&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
<&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
<&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
<&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
<&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>,
<&cpg CPG_CORE R8A774A1_CLK_S0D4>;
ports {
#address-cells = <1>;
#size-cells = <0>;
rsnd_port0: port@0 {
reg = <0>;
rsnd_endpoint0: endpoint {
remote-endpoint = <&wm8962_endpoint>;
dai-format = "i2s";
bitclock-master = <&rsnd_endpoint0>;
frame-master = <&rsnd_endpoint0>;
playback = <&ssi1 &dvc1 &src1>;
capture = <&ssi0>;
};
};
rsnd_port1: port@1 {
reg = <0x01>;
rsnd_endpoint1: endpoint {
remote-endpoint = <&dw_hdmi0_snd_in>;
dai-format = "i2s";
bitclock-master = <&rsnd_endpoint1>;
frame-master = <&rsnd_endpoint1>;
playback = <&ssi2>;
};
};
};
};
&scif0 {
pinctrl-0 = <&scif0_pins>;
pinctrl-names = "default";
status = "okay";
};
&scif5 {
pinctrl-0 = <&scif5_pins>;
pinctrl-names = "default";
status = "okay";
};
&scif_clk {
clock-frequency = <14745600>;
};
&sdhi0 {
pinctrl-0 = <&sdhi0_pins>;
pinctrl-1 = <&sdhi0_pins_uhs>;
pinctrl-names = "default", "state_uhs";
vmmc-supply = <&reg_3p3v>;
vqmmc-supply = <&vccq_sdhi0>;
cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
bus-width = <4>;
sd-uhs-sdr50;
sd-uhs-sdr104;
status = "okay";
};
&ssi1 {
shared-pin;
};
&usb2_phy0 {
pinctrl-0 = <&usb0_pins>;
pinctrl-names = "default";
status = "okay";
};
&usb2_phy1 {
pinctrl-0 = <&usb1_pins>;
pinctrl-names = "default";
status = "okay";
};

View File

@@ -0,0 +1,312 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright 2020, Compass Electronics Group, LLC
*/
#include <dt-bindings/gpio/gpio.h>
/ {
memory@48000000 {
device_type = "memory";
/* first 128MB is reserved for secure area. */
reg = <0x0 0x48000000 0x0 0x78000000>;
};
memory@600000000 {
device_type = "memory";
reg = <0x6 0x00000000 0x0 0x80000000>;
};
osc_32k: osc_32k {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <32768>;
clock-output-names = "osc_32k";
};
reg_1p8v: regulator0 {
compatible = "regulator-fixed";
regulator-name = "fixed-1.8V";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-boot-on;
regulator-always-on;
};
reg_3p3v: regulator1 {
compatible = "regulator-fixed";
regulator-name = "fixed-3.3V";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
regulator-always-on;
};
wlan_pwrseq: wlan_pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&pca9654 1 GPIO_ACTIVE_LOW>;
clocks = <&osc_32k>;
clock-names = "ext_clock";
post-power-on-delay-ms = <80>;
};
};
&avb {
pinctrl-0 = <&avb_pins>;
pinctrl-names = "default";
phy-handle = <&phy0>;
phy-mode = "rgmii-id";
status = "okay";
phy0: ethernet-phy@0 {
reg = <0>;
interrupt-parent = <&gpio2>;
interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>;
};
};
&extal_clk {
clock-frequency = <16666666>;
};
&extalr_clk {
clock-frequency = <32768>;
};
&gpio6 {
usb_hub_reset {
gpio-hog;
gpios = <10 GPIO_ACTIVE_HIGH>;
output-high;
line-name = "usb-hub-reset";
};
};
&hscif0 {
pinctrl-0 = <&hscif0_pins>;
pinctrl-names = "default";
uart-has-rtscts;
status = "okay";
max-speed = <4000000>;
bluetooth {
compatible = "brcm,bcm43438-bt";
shutdown-gpios = <&pca9654 2 GPIO_ACTIVE_HIGH>;
host-wakeup-gpios = <&gpio1 28 GPIO_ACTIVE_HIGH>;
device-wakeup-gpios = <&pca9654 5 GPIO_ACTIVE_HIGH>;
clocks = <&osc_32k>;
clock-names = "extclk";
};
};
&hscif2 {
status = "okay";
pinctrl-0 = <&hscif2_pins>;
pinctrl-names = "default";
};
&i2c4 {
status = "okay";
clock-frequency = <400000>;
pca9654: gpio@20 {
compatible = "onnn,pca9654";
reg = <0x20>;
gpio-controller;
#gpio-cells = <2>;
gpio-line-names =
"i2c4_20_0",
"wl_reg_on",
"bt_reg_on",
"i2c4_20_3",
"i2c4_20_4",
"bt_dev_wake",
"i2c4_20_6",
"i2c4_20_7";
};
pca9654_lte: gpio@21 {
compatible = "onnn,pca9654";
reg = <0x21>;
interrupt-parent = <&gpio5>;
interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
interrupt-controller;
#interrupt-cells = <2>;
gpio-controller;
#gpio-cells = <2>;
gpio-line-names =
"i2c4_21_0",
"zoe_pwr_on",
"zoe_extint",
"zoe_reset_n",
"sara_reset",
"i2c4_21_5",
"sara_pwr_off",
"sara_networking_status";
};
eeprom@50 {
compatible = "microchip, at24c64", "atmel,24c64";
pagesize = <32>;
read-only; /* Manufacturing EEPROM programmed at factory */
reg = <0x50>;
};
rtc@51 {
compatible = "nxp,pcf85263";
reg = <0x51>;
};
versaclock5: versaclock_som@6a {
compatible = "idt,5p49v6965";
reg = <0x6a>;
#clock-cells = <1>;
clocks = <&x304_clk>;
clock-names = "xin";
/* du_dotclkin0, du_dotclkin2, usb_extal, avb_txcrefclk */
assigned-clocks = <&versaclock5 1>,
<&versaclock5 2>,
<&versaclock5 3>,
<&versaclock5 4>;
assigned-clock-rates = <33333333>, <33333333>, <50000000>, <125000000>;
};
};
&pfc {
pinctrl-0 = <&scif_clk_pins>;
pinctrl-names = "default";
avb_pins: avb {
mux {
groups = "avb_link", "avb_mdio", "avb_mii";
function = "avb";
};
pins_mdio {
groups = "avb_mdio";
drive-strength = <24>;
};
pins_mii_tx {
pins = "PIN_AVB_TX_CTL", "PIN_AVB_TXC", "PIN_AVB_TD0",
"PIN_AVB_TD1", "PIN_AVB_TD2", "PIN_AVB_TD3";
drive-strength = <12>;
};
};
scif2_pins: scif2 {
groups = "scif2_data_a";
function = "scif2";
};
hscif0_pins: hscif0 {
groups = "hscif0_data", "hscif0_ctrl";
function = "hscif0";
};
hscif1_pins: hscif1 {
groups = "hscif1_data_a", "hscif1_ctrl_a";
function = "hscif1";
};
hscif2_pins: hscif2 {
groups = "hscif2_data_a";
function = "hscif2";
};
scif0_pins: scif0 {
groups = "scif0_data";
function = "scif0";
};
scif5_pins: scif5 {
groups = "scif5_data_a";
function = "scif5";
};
scif_clk_pins: scif_clk {
groups = "scif_clk_a";
function = "scif_clk";
};
i2c0_pins: i2c0 {
groups = "i2c0";
function = "i2c0";
};
sdhi2_pins: sd2 {
groups = "sdhi2_data4", "sdhi2_ctrl";
function = "sdhi2";
power-source = <1800>;
};
sdhi3_pins: sd3 {
groups = "sdhi3_data8", "sdhi3_ctrl", "sdhi3_ds";
function = "sdhi3";
power-source = <1800>;
};
};
&scif_clk {
clock-frequency = <14745600>;
};
&scif2 {
pinctrl-0 = <&scif2_pins>;
pinctrl-names = "default";
status = "okay";
};
&sdhi2 {
pinctrl-names = "default";
pinctrl-0 = <&sdhi2_pins>;
bus-width = <4>;
vmmc-supply = <&reg_3p3v>;
vqmmc-supply = <&reg_1p8v>;
non-removable;
cap-power-off-card;
pm-ignore-notify;
keep-power-in-suspend;
mmc-pwrseq = <&wlan_pwrseq>;
status = "okay";
#address-cells = <1>;
#size-cells = <0>;
brcmf: bcrmf@1 {
reg = <1>;
compatible = "brcm,bcm4329-fmac";
interrupt-parent = <&gpio1>;
interrupts = <27 IRQ_TYPE_LEVEL_LOW>;
interrupt-names = "host-wake";
};
};
&sdhi3 {
pinctrl-0 = <&sdhi3_pins>;
pinctrl-1 = <&sdhi3_pins>;
pinctrl-names = "default", "state_uhs";
vmmc-supply = <&reg_3p3v>;
vqmmc-supply = <&reg_1p8v>;
bus-width = <8>;
mmc-hs200-1_8v;
non-removable;
fixed-emmc-driver-type = <1>;
status = "okay";
};
&usb_extal_clk {
clock-frequency = <50000000>;
};
&usb3s0_clk {
clock-frequency = <100000000>;
};
&vspb {
status = "okay";
};
&vspi0 {
status = "okay";
};

View File

@@ -64,4 +64,35 @@
spi-max-frequency = <108000000>;
};
};
leds: led-controller@f43200f0 {
compatible = "cortina,ca-leds";
reg = <0x0 0xf43200f0 0x40>;
cortina,blink-rate1 = <256>;
cortina,blink-rate2 = <512>;
led@0 {
pin = <0>;
active-low;
blink-sel =<0>;
port = <0>;
off-event = <0>;
label = "led0";
};
led@1 {
pin = <1>;
active-low;
blink-sel =<1>;
label = "led1";
};
led@2 {
pin = <2>;
active-low;
label = "led2";
};
};
};

View File

@@ -39,3 +39,7 @@
&spi1 {
u-boot,dm-spl;
};
&gpio {
u-boot,dm-spl;
};

View File

@@ -28,3 +28,7 @@
&serial2 {
u-boot,dm-spl;
};
&gpio {
u-boot,dm-spl;
};

View File

@@ -0,0 +1,68 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Common devices used in different OMAP boards
*/
/ {
elpida_ECB240ABACN: lpddr2 {
compatible = "Elpida,ECB240ABACN","jedec,lpddr2-s4";
density = <2048>;
io-width = <32>;
tRPab-min-tck = <3>;
tRCD-min-tck = <3>;
tWR-min-tck = <3>;
tRASmin-min-tck = <3>;
tRRD-min-tck = <2>;
tWTR-min-tck = <2>;
tXP-min-tck = <2>;
tRTP-min-tck = <2>;
tCKE-min-tck = <3>;
tCKESR-min-tck = <3>;
tFAW-min-tck = <8>;
timings_elpida_ECB240ABACN_400mhz: lpddr2-timings@0 {
compatible = "jedec,lpddr2-timings";
min-freq = <10000000>;
max-freq = <400000000>;
tRPab = <21000>;
tRCD = <18000>;
tWR = <15000>;
tRAS-min = <42000>;
tRRD = <10000>;
tWTR = <7500>;
tXP = <7500>;
tRTP = <7500>;
tCKESR = <15000>;
tDQSCK-max = <5500>;
tFAW = <50000>;
tZQCS = <90000>;
tZQCL = <360000>;
tZQinit = <1000000>;
tRAS-max-ns = <70000>;
tDQSCK-max-derated = <6000>;
};
timings_elpida_ECB240ABACN_200mhz: lpddr2-timings@1 {
compatible = "jedec,lpddr2-timings";
min-freq = <10000000>;
max-freq = <200000000>;
tRPab = <21000>;
tRCD = <18000>;
tWR = <15000>;
tRAS-min = <42000>;
tRRD = <10000>;
tWTR = <10000>;
tXP = <7500>;
tRTP = <7500>;
tCKESR = <15000>;
tDQSCK-max = <5500>;
tFAW = <50000>;
tZQCS = <90000>;
tZQCL = <360000>;
tZQinit = <1000000>;
tRAS-max-ns = <70000>;
tDQSCK-max-derated = <6000>;
};
};
};

View File

@@ -12,8 +12,8 @@
#include "fsl-imx8qm-apalis-u-boot.dtsi"
/ {
model = "Toradex Apalis iMX8QM";
compatible = "toradex,apalis-imx8qm", "fsl,imx8qm";
model = "Toradex Apalis iMX8";
compatible = "toradex,apalis-imx8", "fsl,imx8qm";
chosen {
bootargs = "console=ttyLP1,115200 earlycon=lpuart32,0x5a070000,115200";
@@ -38,7 +38,7 @@
<&pinctrl_qspi1a_gpios>, <&pinctrl_sata1_act>,
<&pinctrl_sim0_gpios>, <&pinctrl_usdhc1_gpios>;
apalis-imx8qm {
apalis-imx8 {
pinctrl_gpio12: gpio12grp {
fsl,pins = <
/* Apalis GPIO1 */

View File

@@ -9,8 +9,8 @@
#include "fsl-imx8qxp-colibri-u-boot.dtsi"
/ {
model = "Toradex Colibri iMX8QXP";
compatible = "toradex,colibri-imx8qxp", "fsl,imx8qxp";
model = "Toradex Colibri iMX8X";
compatible = "toradex,colibri-imx8x", "fsl,imx8qxp";
chosen {
bootargs = "console=ttyLP3,115200 earlycon=lpuart32,0x5a090000,115200";
@@ -32,7 +32,7 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hog0>, <&pinctrl_hog1>, <&pinctrl_hog2>;
colibri-imx8qxp {
colibri-imx8x {
pinctrl_lpuart0: lpuart0grp {
fsl,pins = <
SC_P_UART0_RX_ADMA_UART0_RX 0x06000020

View File

@@ -15,20 +15,94 @@
compatible = "fsl,ls1028a-qds", "fsl,ls1028a";
aliases {
spi0 = &fspi;
spi1 = &dspi0;
spi2 = &dspi1;
spi3 = &dspi2;
};
};
&dspi0 {
bus-num = <0>;
status = "okay";
dflash0: sst25wf040b {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-flash";
spi-max-frequency = <3000000>;
spi-cpol;
spi-cpha;
reg = <0>;
};
dflash1: en25s64 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-flash";
spi-max-frequency = <3000000>;
spi-cpol;
spi-cpha;
reg = <1>;
};
dflash2: n25q128a {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-flash";
spi-max-frequency = <3000000>;
spi-cpol;
spi-cpha;
reg = <2>;
};
};
&dspi1 {
bus-num = <0>;
status = "okay";
dflash3: sst25wf040b {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-flash";
spi-max-frequency = <3000000>;
spi-cpol;
spi-cpha;
reg = <0>;
};
dflash4: en25s64 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-flash";
spi-max-frequency = <3000000>;
spi-cpol;
spi-cpha;
reg = <1>;
};
dflash5: n25q128a {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-flash";
spi-max-frequency = <3000000>;
spi-cpol;
spi-cpha;
reg = <2>;
};
};
&dspi2 {
bus-num = <0>;
status = "okay";
dflash8: en25s64 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-flash";
spi-max-frequency = <3000000>;
spi-cpol;
spi-cpha;
reg = <0>;
};
};
&esdhc0 {

View File

@@ -44,6 +44,12 @@
IRQ_TYPE_LEVEL_LOW)>;
};
gic_lpi_base: syscon@0x80000000 {
compatible = "gic-lpi-base";
reg = <0x0 0x80000000 0x0 0x100000>;
max-gic-redistributors = <2>;
};
timer {
compatible = "arm,armv8-timer";
interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) |

View File

@@ -257,6 +257,17 @@
0x82000000 0x0 0x40000000 0x40 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
};
pcie_ep@3400000 {
compatible = "fsl,ls-pcie-ep";
reg = <0x00 0x03400000 0x0 0x80000
0x00 0x034c0000 0x0 0x40000
0x40 0x00000000 0x8 0x00000000>;
reg-names = "regs", "ctrl", "addr_space";
num-ib-windows = <6>;
num-ob-windows = <8>;
big-endian;
};
pcie@3500000 {
compatible = "fsl,ls-pcie", "snps,dw-pcie";
reg = <0x00 0x03500000 0x0 0x80000 /* dbi registers */
@@ -274,6 +285,17 @@
0x82000000 0x0 0x40000000 0x48 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
};
pcie_ep@3500000 {
compatible = "fsl,ls-pcie-ep";
reg = <0x00 0x03500000 0x0 0x80000
0x00 0x035c0000 0x0 0x40000
0x48 0x00000000 0x8 0x00000000>;
reg-names = "regs", "ctrl", "addr_space";
num-ib-windows = <6>;
num-ob-windows = <8>;
big-endian;
};
pcie@3600000 {
compatible = "fsl,ls-pcie", "snps,dw-pcie";
reg = <0x00 0x03600000 0x0 0x80000 /* dbi registers */
@@ -290,6 +312,17 @@
0x82000000 0x0 0x40000000 0x50 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
};
pcie_ep@3600000 {
compatible = "fsl,ls-pcie-ep";
reg = <0x00 0x03600000 0x0 0x80000
0x00 0x036c0000 0x0 0x40000
0x50 0x00000000 0x8 0x00000000>;
reg-names = "regs", "ctrl", "addr_space";
num-ib-windows = <6>;
num-ob-windows = <8>;
big-endian;
};
sata: sata@3200000 {
compatible = "fsl,ls1046a-ahci";
reg = <0x0 0x3200000 0x0 0x10000 /* ccsr sata base */

View File

@@ -26,6 +26,12 @@
interrupts = <1 9 0x4>;
};
gic_lpi_base: syscon@0x80000000 {
compatible = "gic-lpi-base";
reg = <0x0 0x80000000 0x0 0x100000>;
max-gic-redistributors = <8>;
};
timer {
compatible = "arm,armv8-timer";
interrupts = <1 13 0x8>, /* Physical Secure PPI, active-low */

View File

@@ -26,6 +26,12 @@
interrupts = <1 9 0x4>;
};
gic_lpi_base: syscon@0x80000000 {
compatible = "gic-lpi-base";
reg = <0x0 0x80000000 0x0 0x100000>;
max-gic-redistributors = <8>;
};
timer {
compatible = "arm,armv8-timer";
interrupts = <1 13 0x8>, /* Physical Secure PPI, active-low */

View File

@@ -20,6 +20,105 @@
phy-connection-type = "rgmii-id";
};
&dspi0 {
bus-num = <0>;
status = "okay";
dflash0: n25q128a {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-flash";
spi-max-frequency = <3000000>;
spi-cpol;
spi-cpha;
reg = <0>;
};
dflash1: sst25wf040b {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-flash";
spi-max-frequency = <3000000>;
spi-cpol;
spi-cpha;
reg = <1>;
};
dflash2: en25s64 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-flash";
spi-max-frequency = <3000000>;
spi-cpol;
spi-cpha;
reg = <2>;
};
};
&dspi1 {
bus-num = <0>;
status = "okay";
dflash3: n25q128a {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-flash";
spi-max-frequency = <3000000>;
spi-cpol;
spi-cpha;
reg = <0>;
};
dflash4: sst25wf040b {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-flash";
spi-max-frequency = <3000000>;
spi-cpol;
spi-cpha;
reg = <1>;
};
dflash5: en25s64 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-flash";
spi-max-frequency = <3000000>;
spi-cpol;
spi-cpha;
reg = <2>;
};
};
&dspi2 {
bus-num = <0>;
status = "okay";
dflash6: n25q128a {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-flash";
spi-max-frequency = <3000000>;
spi-cpol;
spi-cpha;
reg = <0>;
};
dflash7: sst25wf040b {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-flash";
spi-max-frequency = <3000000>;
spi-cpol;
spi-cpha;
reg = <1>;
};
dflash8: en25s64 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-flash";
spi-max-frequency = <3000000>;
spi-cpol;
spi-cpha;
reg = <2>;
};
};
&emdio1 {
status = "okay";
};

View File

@@ -43,6 +43,12 @@
interrupts = <1 9 0x4>;
};
gic_lpi_base: syscon@0x80000000 {
compatible = "gic-lpi-base";
reg = <0x0 0x80000000 0x0 0x200000>;
max-gic-redistributors = <16>;
};
timer {
compatible = "arm,armv8-timer";
interrupts = <1 13 0x8>, /* Physical Secure PPI, active-low */
@@ -193,6 +199,28 @@
num-cs = <6>;
};
gpio0: gpio@2300000 {
compatible = "fsl,qoriq-gpio";
reg = <0x0 0x2300000 0x0 0x10000>;
interrupts = <0 36 4>;
gpio-controller;
little-endian;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpio1: gpio@2310000 {
compatible = "fsl,qoriq-gpio";
reg = <0x0 0x2310000 0x0 0x10000>;
interrupts = <0 36 4>;
gpio-controller;
little-endian;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpio2: gpio@2320000 {
compatible = "fsl,qoriq-gpio";
reg = <0x0 0x2320000 0x0 0x10000>;
@@ -204,6 +232,24 @@
#interrupt-cells = <2>;
};
gpio3: gpio@2330000 {
compatible = "fsl,qoriq-gpio";
reg = <0x0 0x2330000 0x0 0x10000>;
interrupts = <0 37 4>;
gpio-controller;
little-endian;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
watchdog@23a0000 {
compatible = "arm,sbsa-gwdt";
reg = <0x0 0x23a0000 0 0x1000>,
<0x0 0x2390000 0 0x1000>;
timeout-sec = <30>;
};
usb0: usb3@3100000 {
compatible = "fsl,layerscape-dwc3";
reg = <0x0 0x3100000 0x0 0x10000>;
@@ -284,13 +330,14 @@
reg = <0x00 0x03400000 0x0 0x80000 /* PAB registers */
0x00 0x03480000 0x0 0x40000 /* LUT registers */
0x00 0x034c0000 0x0 0x40000 /* PF control registers */
0x80 0x00000000 0x0 0x1000>; /* configuration space */
0x80 0x00000000 0x0 0x2000>; /* configuration space */
reg-names = "ccsr", "lut", "pf_ctrl", "config";
#address-cells = <3>;
#size-cells = <2>;
device_type = "pci";
bus-range = <0x0 0xff>;
ranges = <0x82000000 0x0 0x40000000 0x80 0x40000000 0x0 0x40000000>;
ranges = <0x81000000 0x0 0x00000000 0x80 0x00020000 0x0 0x00010000 /* downstream I/O */
0x82000000 0x0 0x40000000 0x80 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
};
pcie@3500000 {
@@ -298,14 +345,15 @@
reg = <0x00 0x03500000 0x0 0x80000 /* PAB registers */
0x00 0x03580000 0x0 0x40000 /* LUT registers */
0x00 0x035c0000 0x0 0x40000 /* PF control registers */
0x88 0x00000000 0x0 0x1000>; /* configuration space */
0x88 0x00000000 0x0 0x2000>; /* configuration space */
reg-names = "ccsr", "lut", "pf_ctrl", "config";
#address-cells = <3>;
#size-cells = <2>;
device_type = "pci";
num-lanes = <2>;
bus-range = <0x0 0xff>;
ranges = <0x82000000 0x0 0x40000000 0x88 0x40000000 0x0 0x40000000>;
ranges = <0x81000000 0x0 0x00000000 0x88 0x00020000 0x0 0x00010000 /* downstream I/O */
0x82000000 0x0 0x40000000 0x88 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
};
pcie@3600000 {
@@ -313,13 +361,14 @@
reg = <0x00 0x03600000 0x0 0x80000 /* PAB registers */
0x00 0x03680000 0x0 0x40000 /* LUT registers */
0x00 0x036c0000 0x0 0x40000 /* PF control registers */
0x90 0x00000000 0x0 0x1000>; /* configuration space */
0x90 0x00000000 0x0 0x2000>; /* configuration space */
reg-names = "ccsr", "lut", "pf_ctrl", "config";
#address-cells = <3>;
#size-cells = <2>;
device_type = "pci";
bus-range = <0x0 0xff>;
ranges = <0x82000000 0x0 0x40000000 0x90 0x40000000 0x0 0x40000000>;
ranges = <0x81000000 0x0 0x00000000 0x90 0x00020000 0x0 0x00010000 /* downstream I/O */
0x82000000 0x0 0x40000000 0x90 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
};
pcie@3700000 {
@@ -327,13 +376,14 @@
reg = <0x00 0x03700000 0x0 0x80000 /* PAB registers */
0x00 0x03780000 0x0 0x40000 /* LUT registers */
0x00 0x037c0000 0x0 0x40000 /* PF control registers */
0x98 0x00000000 0x0 0x1000>; /* configuration space */
0x98 0x00000000 0x0 0x2000>; /* configuration space */
reg-names = "ccsr", "lut", "pf_ctrl", "config";
#address-cells = <3>;
#size-cells = <2>;
device_type = "pci";
bus-range = <0x0 0xff>;
ranges = <0x82000000 0x0 0x40000000 0x98 0x40000000 0x0 0x40000000>;
ranges = <0x81000000 0x0 0x00000000 0x98 0x00020000 0x0 0x00010000 /* downstream I/O */
0x82000000 0x0 0x40000000 0x98 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
};
pcie@3800000 {
@@ -341,13 +391,14 @@
reg = <0x00 0x03800000 0x0 0x80000 /* PAB registers */
0x00 0x03880000 0x0 0x40000 /* LUT registers */
0x00 0x038c0000 0x0 0x40000 /* PF control registers */
0xa0 0x00000000 0x0 0x1000>; /* configuration space */
0xa0 0x00000000 0x0 0x2000>; /* configuration space */
reg-names = "ccsr", "lut", "pf_ctrl", "config";
#address-cells = <3>;
#size-cells = <2>;
device_type = "pci";
bus-range = <0x0 0xff>;
ranges = <0x82000000 0x0 0x40000000 0xa0 0x40000000 0x0 0x40000000>;
ranges = <0x81000000 0x0 0x00000000 0xa0 0x00020000 0x0 0x00010000 /* downstream I/O */
0x82000000 0x0 0x40000000 0xa0 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
};
pcie@3900000 {
@@ -355,13 +406,14 @@
reg = <0x00 0x03900000 0x0 0x80000 /* PAB registers */
0x00 0x03980000 0x0 0x40000 /* LUT registers */
0x00 0x039c0000 0x0 0x40000 /* PF control registers */
0xa8 0x00000000 0x0 0x1000>; /* configuration space */
0xa8 0x00000000 0x0 0x2000>; /* configuration space */
reg-names = "ccsr", "lut", "pf_ctrl", "config";
#address-cells = <3>;
#size-cells = <2>;
device_type = "pci";
bus-range = <0x0 0xff>;
ranges = <0x82000000 0x0 0x40000000 0xa8 0x40000000 0x0 0x40000000>;
ranges = <0x81000000 0x0 0x00000000 0xa8 0x00020000 0x0 0x00010000 /* downstream I/O */
0x82000000 0x0 0x40000000 0xa8 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
};
fsl_mc: fsl-mc@80c000000 {

View File

@@ -24,15 +24,15 @@
&eeprom {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
vpd {
offset = <0>;
size = <1022>;
vpd@0 {
reg = <0 1022>;
};
bootcount: bootcount {
offset = <1022>;
size = <2>;
bootcount: bootcount@1022 {
reg = <1022 2>;
};
};
};

View File

@@ -23,15 +23,15 @@
&eeprom {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
vpd {
offset = <0>;
size = <1022>;
vpd@0 {
reg = <0 1022>;
};
bootcount: bootcount {
offset = <1022>;
size = <2>;
reg = <1022 2>;
};
};
};

View File

@@ -0,0 +1,42 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2020
* Niel Fourie, DENX Software Engineering, lusus@denx.de.
*/
#include "imx6qdl-u-boot.dtsi"
&gpio3 {
u-boot,dm-spl;
};
&gpio6 {
u-boot,dm-spl;
};
&pinctrl_uart2 {
u-boot,dm-spl;
};
&uart2 {
u-boot,dm-spl;
};
&usdhc1 {
u-boot,dm-spl;
};
&pinctrl_usdhc1 {
u-boot,dm-spl;
};
&ecspi1 {
u-boot,dm-spl;
};
&pinctrl_ecspi1 {
u-boot,dm-spl;
};
&m25p80 {
u-boot,dm-spl;
};

View File

@@ -0,0 +1,72 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (C) 2018 PHYTEC Messtechnik GmbH
* Author: Christian Hemp <c.hemp@phytec.de>
*/
/dts-v1/;
#include "imx6q.dtsi"
#include "imx6qdl-phytec-phycore-som.dtsi"
#include "imx6qdl-phytec-mira.dtsi"
/ {
model = "PHYTEC phyBOARD-Mira Quad Carrier-Board with NAND";
compatible = "phytec,imx6q-pbac06-nand", "phytec,imx6q-pbac06",
"phytec,imx6qdl-pcm058", "fsl,imx6q";
chosen {
stdout-path = &uart2;
};
};
&can1 {
status = "okay";
};
&fec {
status = "okay";
};
&gpmi {
status = "okay";
};
&hdmi {
status = "okay";
};
&i2c1 {
status = "okay";
};
&i2c2 {
status = "okay";
};
&i2c_rtc {
status = "okay";
};
&m25p80 {
status = "okay";
};
&pcie {
status = "okay";
};
&uart3 {
status = "okay";
};
&usbh1 {
status = "okay";
};
&usbotg {
status = "okay";
};
&usdhc1 {
status = "okay";
};

View File

@@ -0,0 +1,390 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (C) 2018 PHYTEC Messtechnik GmbH
* Author: Christian Hemp <c.hemp@phytec.de>
*/
/ {
aliases {
rtc0 = &i2c_rtc;
};
backlight: backlight {
compatible = "pwm-backlight";
brightness-levels = <0 4 8 16 32 64 128 255>;
default-brightness-level = <7>;
power-supply = <&reg_backlight>;
pwms = <&pwm1 0 5000000>;
status = "okay";
};
gpio_leds: leds {
compatible = "gpio-leds";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpioleds>;
status = "disabled";
red {
label = "phyboard-mira:red";
gpios = <&gpio5 22 GPIO_ACTIVE_HIGH>;
};
green {
label = "phyboard-mira:green";
gpios = <&gpio5 23 GPIO_ACTIVE_HIGH>;
};
blue {
label = "phyboard-mira:blue";
gpios = <&gpio5 24 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "mmc0";
};
};
reg_backlight: regulator-backlight {
compatible = "regulator-fixed";
regulator-name = "backlight_3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
reg_en_switch: regulator-en-switch {
compatible = "regulator-fixed";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_en_switch>;
regulator-name = "Enable Switch";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
enable-active-high;
gpio = <&gpio3 4 GPIO_ACTIVE_HIGH>;
regulator-always-on;
};
reg_flexcan1: regulator-flexcan1 {
compatible = "regulator-fixed";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_flexcan1_en>;
regulator-name = "flexcan1-reg";
regulator-min-microvolt = <1500000>;
regulator-max-microvolt = <1500000>;
gpio = <&gpio2 20 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
reg_panel: regulator-panel {
compatible = "regulator-fixed";
regulator-name = "panel-power-supply";
regulator-min-microvolt = <12000000>;
regulator-max-microvolt = <12000000>;
regulator-always-on;
};
reg_pcie: regulator-pcie {
compatible = "regulator-fixed";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pcie_reg>;
regulator-name = "mPCIe_1V5";
regulator-min-microvolt = <1500000>;
regulator-max-microvolt = <1500000>;
gpio = <&gpio3 0 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
reg_usb_h1_vbus: usb-h1-vbus {
compatible = "regulator-fixed";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usbh1_vbus>;
regulator-name = "usb_h1_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio2 18 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
reg_usbotg_vbus: usbotg-vbus {
compatible = "regulator-fixed";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usbotg_vbus>;
regulator-name = "usb_otg_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
panel {
compatible = "auo,g104sn02";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_panel_en>;
power-supply = <&reg_panel>;
enable-gpios = <&gpio2 28 GPIO_ACTIVE_LOW>;
backlight = <&backlight>;
port {
panel_in: endpoint {
remote-endpoint = <&lvds0_out>;
};
};
};
};
&can1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_flexcan1>;
xceiver-supply = <&reg_flexcan1>;
status = "disabled";
};
&hdmi {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hdmicec>;
ddc-i2c-bus = <&i2c2>;
status = "disabled";
};
&i2c1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c1>;
clock-frequency = <400000>;
status = "disabled";
stmpe: touchctrl@44 {
compatible = "st,stmpe811";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_stmpe>;
reg = <0x44>;
interrupt-parent = <&gpio7>;
interrupts = <12 IRQ_TYPE_NONE>;
status = "disabled";
stmpe_touchscreen {
compatible = "st,stmpe-ts";
st,sample-time = <4>;
st,mod-12b = <1>;
st,ref-sel = <0>;
st,adc-freq = <1>;
st,ave-ctrl = <1>;
st,touch-det-delay = <2>;
st,settling = <2>;
st,fraction-z = <7>;
st,i-drive = <1>;
};
};
i2c_rtc: rtc@68 {
compatible = "microcrystal,rv4162";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rtc_int>;
reg = <0x68>;
interrupt-parent = <&gpio7>;
interrupts = <8 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
};
&i2c2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c2>;
clock-frequency = <100000>;
status = "disabled";
};
&ldb {
status = "okay";
lvds-channel@0 {
fsl,data-mapping = "spwg";
fsl,data-width = <24>;
status = "disabled";
port@4 {
reg = <4>;
lvds0_out: endpoint {
remote-endpoint = <&panel_in>;
};
};
};
};
&pcie {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pcie>;
reset-gpio = <&gpio2 25 GPIO_ACTIVE_LOW>;
vpcie-supply = <&reg_pcie>;
status = "disabled";
};
&pwm1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm1>;
status = "okay";
};
&uart2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart2>;
status = "okay";
};
&uart3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart3>;
uart-has-rtscts;
status = "disabled";
};
&usbh1 {
vbus-supply = <&reg_usb_h1_vbus>;
disable-over-current;
status = "disabled";
};
&usbotg {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usbotg>;
vbus-supply = <&reg_usbotg_vbus>;
disable-over-current;
status = "disabled";
};
&usdhc1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc1>;
cd-gpios = <&gpio6 31 GPIO_ACTIVE_LOW>;
no-1-8-v;
status = "disabled";
};
&iomuxc {
pinctrl_panel_en: panelen1grp {
fsl,pins = <
MX6QDL_PAD_EIM_EB0__GPIO2_IO28 0xb0b1
>;
};
pinctrl_en_switch: enswitchgrp {
fsl,pins = <
MX6QDL_PAD_EIM_DA4__GPIO3_IO04 0xb0b1
>;
};
pinctrl_flexcan1: flexcan1grp {
fsl,pins = <
MX6QDL_PAD_GPIO_7__FLEXCAN1_TX 0x1b0b0
MX6QDL_PAD_GPIO_8__FLEXCAN1_RX 0x1b0b0
>;
};
pinctrl_flexcan1_en: flexcan1engrp {
fsl,pins = <
MX6QDL_PAD_EIM_A18__GPIO2_IO20 0xb0b1
>;
};
pinctrl_gpioleds: gpioledsgrp {
fsl,pins = <
MX6QDL_PAD_CSI0_DAT4__GPIO5_IO22 0x1b0b0
MX6QDL_PAD_CSI0_DAT5__GPIO5_IO23 0x1b0b0
MX6QDL_PAD_CSI0_DAT6__GPIO5_IO24 0x1b0b0
>;
};
pinctrl_hdmicec: hdmicecgrp {
fsl,pins = <
MX6QDL_PAD_KEY_ROW2__HDMI_TX_CEC_LINE 0x1f8b0
>;
};
pinctrl_i2c2: i2c2grp {
fsl,pins = <
MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
>;
};
pinctrl_i2c1: i2c1grp {
fsl,pins = <
MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
>;
};
pinctrl_pcie: pciegrp {
fsl,pins = <
MX6QDL_PAD_EIM_OE__GPIO2_IO25 0xb0b1
>;
};
pinctrl_pcie_reg: pciereggrp {
fsl,pins = <
MX6QDL_PAD_EIM_DA0__GPIO3_IO00 0xb0b1
>;
};
pinctrl_pwm1: pwm1grp {
fsl,pins = <
MX6QDL_PAD_GPIO_9__PWM1_OUT 0x1b0b1
>;
};
pinctrl_rtc_int: rtcintgrp {
fsl,pins = <
MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x1b0b0
>;
};
pinctrl_stmpe: stmpegrp {
fsl,pins = <
MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x1b0b0
>;
};
pinctrl_uart2: uart2grp {
fsl,pins = <
MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1
MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1
>;
};
pinctrl_uart3: uart3grp {
fsl,pins = <
MX6QDL_PAD_EIM_EB3__UART3_CTS_B 0x1b0b1
MX6QDL_PAD_EIM_D23__UART3_RTS_B 0x1b0b1
MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
>;
};
pinctrl_usbh1_vbus: usbh1vbusgrp {
fsl,pins = <
MX6QDL_PAD_EIM_A20__GPIO2_IO18 0xb0b1
>;
};
pinctrl_usbotg: usbotggrp {
fsl,pins = <
MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
>;
};
pinctrl_usbotg_vbus: usbotgvbusgrp {
fsl,pins = <
MX6QDL_PAD_EIM_A19__GPIO2_IO19 0xb0b1
>;
};
pinctrl_usdhc1: usdhc1grp {
fsl,pins = <
MX6QDL_PAD_SD1_CMD__SD1_CMD 0x170f9
MX6QDL_PAD_SD1_CLK__SD1_CLK 0x100f9
MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x170f9
MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x170f9
MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x170f9
MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x170f9
MX6QDL_PAD_EIM_BCLK__GPIO6_IO31 0xb0b1 /* CD */
>;
};
};

View File

@@ -0,0 +1,287 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (C) 2018 PHYTEC Messtechnik GmbH
* Author: Christian Hemp <c.hemp@phytec.de>
*/
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/regulator/dlg,da9063-regulator.h>
/ {
aliases {
rtc1 = &da9062_rtc;
rtc2 = &snvs_rtc;
};
/*
* Set the minimum memory size here and
* let the bootloader set the real size.
*/
memory@10000000 {
device_type = "memory";
reg = <0x10000000 0x8000000>;
};
gpio_leds_som: somleds {
compatible = "gpio-leds";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpioleds_som>;
som-led-green {
label = "phycore:green";
gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
};
};
};
&ecspi1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ecspi1>;
cs-gpios = <&gpio3 19 GPIO_ACTIVE_LOW>;
status = "okay";
m25p80: flash@0 {
compatible = "jedec,spi-nor";
spi-max-frequency = <20000000>;
reg = <0>;
status = "disabled";
};
};
&fec {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet>;
phy-handle = <&ethphy>;
phy-mode = "rgmii";
phy-supply = <&vdd_eth_io>;
phy-reset-gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
status = "disabled";
mdio {
#address-cells = <1>;
#size-cells = <0>;
ethphy: ethernet-phy@3 {
reg = <3>;
txc-skew-ps = <1680>;
rxc-skew-ps = <1860>;
};
};
};
&gpmi {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpmi_nand>;
nand-on-flash-bbt;
status = "disabled";
};
&i2c3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c3>;
clock-frequency = <400000>;
status = "okay";
eeprom@50 {
compatible = "atmel,24c32";
reg = <0x50>;
};
pmic@58 {
compatible = "dlg,da9062";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pmic>;
reg = <0x58>;
interrupt-parent = <&gpio1>;
interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
interrupt-controller;
da9062_rtc: rtc {
compatible = "dlg,da9062-rtc";
};
da9062_onkey: onkey {
compatible = "dlg,da9062-onkey";
};
watchdog {
compatible = "dlg,da9062-watchdog";
};
regulators {
vdd_arm: buck1 {
regulator-name = "vdd_arm";
regulator-min-microvolt = <925000>;
regulator-max-microvolt = <1380000>;
regulator-initial-mode = <DA9063_BUCK_MODE_SYNC>;
regulator-always-on;
};
vdd_soc: buck2 {
regulator-name = "vdd_soc";
regulator-min-microvolt = <1150000>;
regulator-max-microvolt = <1380000>;
regulator-initial-mode = <DA9063_BUCK_MODE_SYNC>;
regulator-always-on;
};
vdd_ddr3_1p5: buck3 {
regulator-name = "vdd_ddr3";
regulator-min-microvolt = <1500000>;
regulator-max-microvolt = <1500000>;
regulator-initial-mode = <DA9063_BUCK_MODE_SYNC>;
regulator-always-on;
};
vdd_eth_1p2: buck4 {
regulator-name = "vdd_eth";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-initial-mode = <DA9063_BUCK_MODE_SYNC>;
regulator-always-on;
};
vdd_snvs: ldo1 {
regulator-name = "vdd_snvs";
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
regulator-always-on;
};
vdd_high: ldo2 {
regulator-name = "vdd_high";
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
regulator-always-on;
};
vdd_eth_io: ldo3 {
regulator-name = "vdd_eth_io";
regulator-min-microvolt = <2500000>;
regulator-max-microvolt = <2500000>;
};
vdd_emmc_1p8: ldo4 {
regulator-name = "vdd_emmc";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
};
};
};
&reg_arm {
vin-supply = <&vdd_arm>;
};
&reg_pu {
vin-supply = <&vdd_soc>;
};
&reg_soc {
vin-supply = <&vdd_soc>;
};
&snvs_poweroff {
status = "okay";
};
&usdhc4 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc4>;
bus-width = <8>;
non-removable;
status = "disabled";
};
&iomuxc {
pinctrl_enet: enetgrp {
fsl,pins = <
MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0
MX6QDL_PAD_SD2_DAT1__GPIO1_IO14 0x1b0b0
>;
};
pinctrl_gpioleds_som: gpioledssomgrp {
fsl,pins = <
MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1b0b0
>;
};
pinctrl_gpmi_nand: gpminandgrp {
fsl,pins = <
MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1
MX6QDL_PAD_NANDF_CS2__NAND_CE2_B 0xb0b1
MX6QDL_PAD_NANDF_CS3__NAND_CE3_B 0xb0b1
MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
MX6QDL_PAD_SD4_DAT0__NAND_DQS 0x00b1
>;
};
pinctrl_i2c3: i2c3grp {
fsl,pins = <
MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1
>;
};
pinctrl_ecspi1: ecspi1grp {
fsl,pins = <
MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1
MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1
MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1
MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x1b0b0
>;
};
pinctrl_pmic: pmicgrp {
fsl,pins = <
MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b0
>;
};
pinctrl_usdhc4: usdhc4grp {
fsl,pins = <
MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059
MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059
MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059
MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059
MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059
MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059
MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17059
MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17059
MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17059
MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17059
>;
};
};

View File

@@ -3,6 +3,15 @@
* Copyright 2019 Toradex AG
*/
/ {
aliases {
u-boot,dm-pre-reloc;
mmc0 = &usdhc1;
usb0 = &usbotg1; /* required for ums */
display0 = &lcdif;
};
};
&pinctrl_uart1 {
u-boot,dm-pre-reloc;
};
@@ -10,3 +19,39 @@
&pinctrl_uart1_ctrl1 {
u-boot,dm-pre-reloc;
};
&lcdif {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_lcdif_dat
&pinctrl_lcdif_ctrl>;
status = "okay";
display = <&display0>;
u-boot,dm-pre-reloc;
display0: display0 {
bits-per-pixel = <18>;
bus-width = <24>;
status = "okay";
display-timings {
native-mode = <&timing_vga>;
timing_vga: 640x480 {
u-boot,dm-pre-reloc;
clock-frequency = <25175000>;
hactive = <640>;
vactive = <480>;
hback-porch = <40>;
hfront-porch = <24>;
vback-porch = <32>;
vfront-porch = <11>;
hsync-len = <96>;
vsync-len = <2>;
de-active = <1>;
hsync-active = <0>;
vsync-active = <0>;
pixelclk-active = <0>;
};
};
};
};

View File

@@ -8,13 +8,6 @@
#include "imx6ull.dtsi"
/ {
aliases {
u-boot,dm-pre-reloc;
mmc0 = &usdhc1;
usb0 = &usbotg1; /* required for ums */
display0 = &lcdif;
};
chosen {
stdout-path = &uart1;
};
@@ -151,42 +144,6 @@
};
};
&lcdif {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_lcdif_dat
&pinctrl_lcdif_ctrl>;
status = "okay";
display = <&display0>;
u-boot,dm-pre-reloc;
display0: display0 {
bits-per-pixel = <18>;
bus-width = <24>;
status = "okay";
display-timings {
native-mode = <&timing_vga>;
timing_vga: 640x480 {
u-boot,dm-pre-reloc;
clock-frequency = <25175000>;
hactive = <640>;
vactive = <480>;
hback-porch = <48>;
hfront-porch = <16>;
vback-porch = <33>;
vfront-porch = <10>;
hsync-len = <96>;
vsync-len = <2>;
de-active = <1>;
hsync-active = <0>;
vsync-active = <0>;
pixelclk-active = <0>;
};
};
};
};
/* PWM <A> */
&pwm4 {
pinctrl-names = "default";

View File

@@ -0,0 +1,19 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (C) 2020 Linumiz
* Author: Parthiban Nallathambi <parthiban@linumiz.com>
*/
/dts-v1/;
#include "imx6ull.dtsi"
#include "imx6ull-myir-mys-6ulx.dtsi"
#include "imx6ull-mys-6ulx-u-boot.dtsi"
/ {
model = "MYiR i.MX6ULL MYS-6ULX Single Board Computer with NAND";
compatible = "myir,imx6ull-mys-6ulx-eval", "fsl,imx6ull";
};
&gpmi {
status = "okay";
};

View File

@@ -0,0 +1,238 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (C) 2020 Linumiz
* Author: Parthiban Nallathambi <parthiban@linumiz.com>
*/
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/pwm/pwm.h>
/ {
model = "MYiR MYS-6ULX Single Board Computer";
compatible = "fsl,imx6ull";
chosen {
stdout-path = &uart1;
};
reg_vdd_5v: regulator-vdd-5v {
compatible = "regulator-fixed";
regulator-name = "VDD_5V";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
regulator-boot-on;
};
reg_vdd_3v3: regulator-vdd-3v3 {
compatible = "regulator-fixed";
regulator-name = "VDD_3V3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
vin-supply = <&reg_vdd_5v>;
};
};
&fec1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet1>;
phy-mode = "rmii";
phy-handle = <&ethphy0>;
phy-supply = <&reg_vdd_3v3>;
status = "okay";
mdio: mdio {
#address-cells = <1>;
#size-cells = <0>;
ethphy0: ethernet-phy@0 {
reg = <0>;
interrupt-parent = <&gpio5>;
interrupts = <5 IRQ_TYPE_LEVEL_LOW>;
clocks = <&clks IMX6UL_CLK_ENET_REF>;
clock-names = "rmii-ref";
};
};
};
&gpmi {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpmi_nand>;
nand-on-flash-bbt;
status = "disabled";
};
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1>;
status = "okay";
};
&usbotg1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usb_otg1_id>;
dr_mode = "otg";
status = "okay";
};
&usbotg2 {
dr_mode = "host";
disable-over-current;
status = "okay";
};
&usdhc1 {
pinctrl-names = "default", "state_100mhz", "state_200mhz";
pinctrl-0 = <&pinctrl_usdhc1>;
pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
cd-gpios = <&gpio1 19 GPIO_ACTIVE_LOW>;
no-1-8-v;
keep-power-in-suspend;
wakeup-source;
vmmc-supply = <&reg_vdd_3v3>;
status = "okay";
};
&usdhc2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc2>;
pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
pinctrl-2 = <&pinctrl_usdhc2_200mhz>;
bus-width = <8>;
non-removable;
keep-power-in-suspend;
vmmc-supply = <&reg_vdd_3v3>;
};
&iomuxc {
pinctrl_enet1: enet1grp {
fsl,pins = <
MX6UL_PAD_GPIO1_IO06__ENET1_MDIO 0x1b0b0
MX6UL_PAD_GPIO1_IO07__ENET1_MDC 0x1b0b0
MX6UL_PAD_ENET1_RX_EN__ENET1_RX_EN 0x1b0b0
MX6UL_PAD_ENET1_RX_ER__ENET1_RX_ER 0x1b0b0
MX6UL_PAD_ENET1_RX_DATA0__ENET1_RDATA00 0x1b0b0
MX6UL_PAD_ENET1_RX_DATA1__ENET1_RDATA01 0x1b0b0
MX6UL_PAD_ENET1_TX_EN__ENET1_TX_EN 0x1b0b0
MX6UL_PAD_ENET1_TX_DATA0__ENET1_TDATA00 0x1b0b0
MX6UL_PAD_ENET1_TX_DATA1__ENET1_TDATA01 0x1b0b0
MX6UL_PAD_ENET1_TX_CLK__ENET1_REF_CLK1 0x4001b031
MX6UL_PAD_SNVS_TAMPER5__GPIO5_IO05 0x1b0b0
>;
};
pinctrl_gpmi_nand: gpminandgrp {
fsl,pins = <
MX6UL_PAD_NAND_CLE__RAWNAND_CLE 0x0b0b1
MX6UL_PAD_NAND_ALE__RAWNAND_ALE 0x0b0b1
MX6UL_PAD_NAND_WP_B__RAWNAND_WP_B 0x0b0b1
MX6UL_PAD_NAND_READY_B__RAWNAND_READY_B 0x0b000
MX6UL_PAD_NAND_CE0_B__RAWNAND_CE0_B 0x0b0b1
MX6UL_PAD_NAND_RE_B__RAWNAND_RE_B 0x0b0b1
MX6UL_PAD_NAND_WE_B__RAWNAND_WE_B 0x0b0b1
MX6UL_PAD_NAND_DATA00__RAWNAND_DATA00 0x0b0b1
MX6UL_PAD_NAND_DATA01__RAWNAND_DATA01 0x0b0b1
MX6UL_PAD_NAND_DATA02__RAWNAND_DATA02 0x0b0b1
MX6UL_PAD_NAND_DATA03__RAWNAND_DATA03 0x0b0b1
MX6UL_PAD_NAND_DATA04__RAWNAND_DATA04 0x0b0b1
MX6UL_PAD_NAND_DATA05__RAWNAND_DATA05 0x0b0b1
MX6UL_PAD_NAND_DATA06__RAWNAND_DATA06 0x0b0b1
MX6UL_PAD_NAND_DATA07__RAWNAND_DATA07 0x0b0b1
>;
};
pinctrl_uart1: uart1grp {
fsl,pins = <
MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1
MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX 0x1b0b1
>;
};
pinctrl_usb_otg1_id: usbotg1idgrp {
fsl,pins = <
MX6UL_PAD_GPIO1_IO00__ANATOP_OTG1_ID 0x17059
>;
};
pinctrl_usdhc1: usdhc1grp {
fsl,pins = <
MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x17059
MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x10059
MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x17059
MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x17059
MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x17059
MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x17059
MX6UL_PAD_UART1_RTS_B__GPIO1_IO19 0x17059
>;
};
pinctrl_usdhc1_100mhz: usdhc1grp100mhz {
fsl,pins = <
MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170b9
MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x100b9
MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170b9
MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170b9
MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170b9
MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170b9
>;
};
pinctrl_usdhc1_200mhz: usdhc1grp200mhz {
fsl,pins = <
MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170f9
MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x100f9
MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170f9
MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170f9
MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170f9
MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170f9
>;
};
pinctrl_usdhc2: usdhc2grp {
fsl,pins = <
MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x10069
MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x17059
MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x17059
MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x17059
MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x17059
MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x17059
MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x17059
MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x17059
MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x17059
MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x17059
>;
};
pinctrl_usdhc2_100mhz: usdhc2grp100mhz {
fsl,pins = <
MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x100b9
MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x170b9
MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x170b9
MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x170b9
MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x170b9
MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x170b9
MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x170b9
MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x170b9
MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x170b9
MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x170b9
>;
};
pinctrl_usdhc2_200mhz: usdhc2grp200mhz {
fsl,pins = <
MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x100f9
MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x170f9
MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x170f9
MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x170f9
MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x170f9
MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x170f9
MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x170f9
MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x170f9
MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x170f9
MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x170f9
>;
};
};

View File

@@ -0,0 +1,24 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (C) 2020 Linumiz
* Author: Parthiban Nallathambi <parthiban@linumiz.com>
*/
&pinctrl_uart1 {
u-boot,dm-pre-reloc;
};
&gpmi {
u-boot,dm-spl;
u-boot,dm-pre-reloc;
};
&usdhc1 {
u-boot,dm-spl;
u-boot,dm-pre-reloc;
};
&usdhc2 {
u-boot,dm-spl;
u-boot,dm-pre-reloc;
};

View File

@@ -5,13 +5,13 @@
/dts-v1/;
#include "imx7-colibri.dtsi"
#include "imx7-colibri-u-boot.dtsi"
/ {
model = "Toradex Colibri iMX7D 1GB (eMMC)";
compatible = "toradex,imx7d-colibri-emmc", "fsl,imx7d";
aliases {
u-boot,dm-pre-reloc;
mmc0 = &usdhc3;
mmc1 = &usdhc1;
display1 = &lcdif;

View File

@@ -5,17 +5,19 @@
/dts-v1/;
#include "imx7-colibri.dtsi"
#include "imx7-colibri-u-boot.dtsi"
/ {
model = "Toradex Colibri iMX7S/D";
compatible = "toradex,imx7-colibri", "fsl,imx7";
chosen {
stdout-path = &uart1;
aliases {
display1 = &lcdif;
usb0 = &usbotg1; /* required for ums */
};
aliases {
usb0 = &usbotg1; /* required for ums */
chosen {
stdout-path = &uart1;
};
reg_5v0: regulator-5v0 {

View File

@@ -0,0 +1,39 @@
// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* Copyright 2020 Toradex
*/
&lcdif {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_lcdif_dat
&pinctrl_lcdif_ctrl>;
display = <&display0>;
u-boot,dm-pre-reloc;
display0: display0 {
bits-per-pixel = <18>;
bus-width = <18>;
status = "okay";
display-timings {
native-mode = <&timing_vga>;
timing_vga: 640x480 {
clock-frequency = <25175000>;
hactive = <640>;
vactive = <480>;
hback-porch = <40>;
hfront-porch = <24>;
vback-porch = <32>;
vfront-porch = <11>;
hsync-len = <96>;
vsync-len = <2>;
de-active = <1>;
hsync-active = <0>;
vsync-active = <0>;
pixelclk-active = <0>;
};
};
};
};

View File

@@ -172,6 +172,38 @@
>;
};
pinctrl_lcdif_dat: lcdif-dat-grp {
fsl,pins = <
MX7D_PAD_LCD_DATA00__LCD_DATA0 0x79
MX7D_PAD_LCD_DATA01__LCD_DATA1 0x79
MX7D_PAD_LCD_DATA02__LCD_DATA2 0x79
MX7D_PAD_LCD_DATA03__LCD_DATA3 0x79
MX7D_PAD_LCD_DATA04__LCD_DATA4 0x79
MX7D_PAD_LCD_DATA05__LCD_DATA5 0x79
MX7D_PAD_LCD_DATA06__LCD_DATA6 0x79
MX7D_PAD_LCD_DATA07__LCD_DATA7 0x79
MX7D_PAD_LCD_DATA08__LCD_DATA8 0x79
MX7D_PAD_LCD_DATA09__LCD_DATA9 0x79
MX7D_PAD_LCD_DATA10__LCD_DATA10 0x79
MX7D_PAD_LCD_DATA11__LCD_DATA11 0x79
MX7D_PAD_LCD_DATA12__LCD_DATA12 0x79
MX7D_PAD_LCD_DATA13__LCD_DATA13 0x79
MX7D_PAD_LCD_DATA14__LCD_DATA14 0x79
MX7D_PAD_LCD_DATA15__LCD_DATA15 0x79
MX7D_PAD_LCD_DATA16__LCD_DATA16 0x79
MX7D_PAD_LCD_DATA17__LCD_DATA17 0x79
>;
};
pinctrl_lcdif_ctrl: lcdif-ctrl-grp {
fsl,pins = <
MX7D_PAD_LCD_CLK__LCD_CLK 0x79
MX7D_PAD_LCD_ENABLE__LCD_ENABLE 0x79
MX7D_PAD_LCD_VSYNC__LCD_VSYNC 0x79
MX7D_PAD_LCD_HSYNC__LCD_HSYNC 0x79
>;
};
pinctrl_enet1: enet1grp {
fsl,pins = <
MX7D_PAD_ENET1_CRS__GPIO7_IO14 0x14
@@ -227,36 +259,3 @@
>;
};
};
&lcdif {
status = "okay";
display = <&display0>;
u-boot,dm-pre-reloc;
display0: display0 {
bits-per-pixel = <18>;
bus-width = <24>;
status = "okay";
display-timings {
native-mode = <&timing_vga>;
timing_vga: 640x480 {
u-boot,dm-pre-reloc;
clock-frequency = <25175000>;
hactive = <640>;
vactive = <480>;
hback-porch = <48>;
hfront-porch = <16>;
vback-porch = <33>;
vfront-porch = <10>;
hsync-len = <96>;
vsync-len = <2>;
de-active = <1>;
hsync-active = <0>;
vsync-active = <0>;
pixelclk-active = <0>;
};
};
};
};

View File

@@ -323,7 +323,7 @@
port {
tpiu_in_port: endpoint {
slave-mode;
remote-endpoint = <&replicator_out_port1>;
remote-endpoint = <&replicator_out_port0>;
};
};
};

View File

@@ -16,6 +16,12 @@
stdout-path = &uart1;
};
aliases {
eeprom0 = &eeprom_module;
eeprom1 = &eeprom_carrier_board;
eeprom2 = &eeprom_display_adapter;
};
/* fixed clock dedicated to SPI CAN controller */
clk20m: oscillator {
compatible = "fixed-clock";
@@ -321,8 +327,8 @@
vcc-supply = <&ldo5_reg>;
};
eeprom@50 {
compatible = "st,24c02";
eeprom_module: eeprom@50 {
compatible = "st,24c02", "atmel,24c02", "i2c-eeprom";
pagesize = <16>;
reg = <0x50>;
};
@@ -377,16 +383,16 @@
status = "okay";
};
/* EEPROM on MIPI-DSI to HDMI adapter */
eeprom_50: eeprom@50 {
compatible = "st,24c02";
/* EEPROM on display adapter (MIPI DSI Display Adapter) */
eeprom_display_adapter: eeprom@50 {
compatible = "st,24c02", "atmel,24c02", "i2c-eeprom";
pagesize = <16>;
reg = <0x50>;
};
/* EEPROM on Verdin Development board */
eeprom_57: eeprom@57 {
compatible = "st,24c02";
/* EEPROM on carrier board */
eeprom_carrier_board: eeprom@57 {
compatible = "st,24c02", "atmel,24c02", "i2c-eeprom";
pagesize = <16>;
reg = <0x57>;
};

View File

@@ -6,6 +6,20 @@
*/
&cbass_mcu {
mcu_conf: scm_conf@40f00000 {
compatible = "syscon", "simple-mfd";
reg = <0x0 0x40f00000 0x0 0x20000>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0x0 0x40f00000 0x20000>;
phy_gmii_sel: phy@4040 {
compatible = "ti,am654-phy-gmii-sel";
reg = <0x4040 0x4>;
#phy-cells = <1>;
};
};
mcu_uart0: serial@40a00000 {
compatible = "ti,am654-uart";
reg = <0x00 0x40a00000 0x00 0x100>;
@@ -102,4 +116,127 @@
#size-cells = <0>;
};
};
mcu_navss {
compatible = "simple-mfd";
#address-cells = <2>;
#size-cells = <2>;
ranges;
dma-coherent;
dma-ranges;
ti,sci-dev-id = <119>;
mcu_ringacc: ringacc@2b800000 {
compatible = "ti,am654-navss-ringacc";
reg = <0x0 0x2b800000 0x0 0x400000>,
<0x0 0x2b000000 0x0 0x400000>,
<0x0 0x28590000 0x0 0x100>,
<0x0 0x2a500000 0x0 0x40000>;
reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target";
ti,num-rings = <286>;
ti,sci-rm-range-gp-rings = <0x1>; /* GP ring range */
ti,dma-ring-reset-quirk;
ti,sci = <&dmsc>;
ti,sci-dev-id = <195>;
};
mcu_udmap: dma-controller@285c0000 {
compatible = "ti,am654-navss-mcu-udmap";
reg = <0x0 0x285c0000 0x0 0x100>,
<0x0 0x2a800000 0x0 0x40000>,
<0x0 0x2aa00000 0x0 0x40000>;
reg-names = "gcfg", "rchanrt", "tchanrt";
#dma-cells = <1>;
ti,sci = <&dmsc>;
ti,sci-dev-id = <194>;
ti,ringacc = <&mcu_ringacc>;
ti,sci-rm-range-tchan = <0xf>, /* TX_HCHAN */
<0xd>; /* TX_CHAN */
ti,sci-rm-range-rchan = <0xb>, /* RX_HCHAN */
<0xa>; /* RX_CHAN */
ti,sci-rm-range-rflow = <0x0>; /* GP RFLOW */
};
};
mcu_cpsw: ethernet@46000000 {
compatible = "ti,am654-cpsw-nuss";
#address-cells = <2>;
#size-cells = <2>;
reg = <0x0 0x46000000 0x0 0x200000>;
reg-names = "cpsw_nuss";
ranges = <0x0 0x0 0x0 0x46000000 0x0 0x200000>;
dma-coherent;
clocks = <&k3_clks 5 10>;
clock-names = "fck";
power-domains = <&k3_pds 5 TI_SCI_PD_EXCLUSIVE>;
dmas = <&mcu_udmap 0xf000>,
<&mcu_udmap 0xf001>,
<&mcu_udmap 0xf002>,
<&mcu_udmap 0xf003>,
<&mcu_udmap 0xf004>,
<&mcu_udmap 0xf005>,
<&mcu_udmap 0xf006>,
<&mcu_udmap 0xf007>,
<&mcu_udmap 0x7000>;
dma-names = "tx0", "tx1", "tx2", "tx3",
"tx4", "tx5", "tx6", "tx7",
"rx";
ethernet-ports {
#address-cells = <1>;
#size-cells = <0>;
cpsw_port1: port@1 {
reg = <1>;
ti,mac-only;
label = "port1";
ti,syscon-efuse = <&mcu_conf 0x200>;
phys = <&phy_gmii_sel 1>;
};
};
davinci_mdio: mdio@f00 {
compatible = "ti,cpsw-mdio","ti,davinci_mdio";
reg = <0x0 0xf00 0x0 0x100>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&k3_clks 5 10>;
clock-names = "fck";
bus_freq = <1000000>;
};
cpts@3d000 {
compatible = "ti,am65-cpts";
reg = <0x0 0x3d000 0x0 0x400>;
clocks = <&mcu_cpsw_cpts_mux>;
clock-names = "cpts";
interrupts-extended = <&gic500 GIC_SPI 570 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "cpts";
ti,cpts-ext-ts-inputs = <4>;
ti,cpts-periodic-outputs = <2>;
mcu_cpsw_cpts_mux: refclk-mux {
#clock-cells = <0>;
clocks = <&k3_clks 118 5>, <&k3_clks 118 11>,
<&k3_clks 118 6>, <&k3_clks 118 3>,
<&k3_clks 118 8>, <&k3_clks 118 14>,
<&k3_clks 120 3>, <&k3_clks 121 3>;
assigned-clocks = <&mcu_cpsw_cpts_mux>;
assigned-clock-parents = <&k3_clks 118 5>;
};
};
};
mcu_rti1: rti@40610000 {
compatible = "ti,j7-rti-wdt";
reg = <0x0 0x40610000 0x0 0x100>;
clocks = <&k3_clks 135 0>;
power-domains = <&k3_pds 135 TI_SCI_PD_SHARED>;
assigned-clocks = <&k3_clks 135 0>;
assigned-clock-parents = <&k3_clks 135 4>;
};
};

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