Compare commits

...

247 Commits

Author SHA1 Message Date
Tom Rini
050acee119 Prepare v2020.10
Signed-off-by: Tom Rini <trini@konsulko.com>
2020-10-05 11:15:32 -04:00
Soeren Moch
0f3e2942c9 board: tbs2910: Use recommended distroboot addresses
According to doc/README.distro fdt_addr must not be set when DTB is not
available from hardware. So remove this entry.

Use address 32MB above the start of DRAM for kernel_addr_r. This way
we likely can avoid the self-relocation of the compressed kernel image
before it decompresses to offset 0x8000 from start of DRAM.

Use address 128MB above the start of DRAM for fdt_addr_r, since this is
the maximum location for the end of the kernel. So we avoid overwriting
the DTB.

Use 512k above that for ramdisk_addr_r. This should be enough for the
DTB, rest of DRAM can be used for initrd.

Place boot script / extlinux.conf at offset 0 / 1MB from start of DRAM.
This space is available for processing in U-Boot.

Signed-off-by: Soeren Moch <smoch@web.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2020-10-02 08:42:36 -04:00
Tom Rini
bb9f59f6a2 Merge tag 'u-boot-stm32-20201002' of https://gitlab.denx.de/u-boot/custodians/u-boot-stm
- Fixup SPI-NOR boot on AV96 board
2020-10-02 08:42:26 -04:00
Marek Vasut
d9839417cb ARM: dts: stm32: Add missing dm-spl props for SPI NOR on AV96
The u-boot,dm-spl DT props are missing on AV96, hence the pinmux and
flash0 nodes are not included in the reduced SPL DT. This prevents
SPI NOR boot from working at all. Fix this by filling them in.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-10-02 14:18:00 +02:00
Tom Rini
4f48163201 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-marvell
- Espressobin: Fix compatible string check
- Espressobin: Extend README for more MAC addresses
2020-10-01 08:55:20 -04:00
Tom Rini
47e180fa63 Merge tag 'late-bugfix-for-2020.10' of https://gitlab.denx.de/u-boot/custodians/u-boot-i2c
i2c late bugfix for v2020.10
- rcar_i2c: Fix i2c read/write errors
  fixes commit 7c8f821e ("i2c: rcar_i2c: Set the slave address from rcar_i2c_xfer")
2020-10-01 08:36:29 -04:00
Tom Rini
8e8dc04c3a Merge branch 'master' of git://git.denx.de/u-boot-sh 2020-10-01 08:36:09 -04:00
Andre Heider
05e7511fae arm: mvebu: Espressobin: Fix checks against machine compatible strings
The patches changing the compatible strings to the ones used by Linux have
not been merged yet, so fix the checks to use the current in-tree ones.

Reported-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Andre Heider <a.heider@gmail.com>
Reviewed-by: Pali Rohár <pali@kernel.org>
2020-10-01 10:43:43 +02:00
Pali Rohár
3dee18e2c2 arm: mvebu: Espressobin: Instructions for more MAC addresses in README.marvell
Some Espressobin boards got assigned more than one MAC address. Update
instructions how to correctly store and preserve all MAC addresses.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Andre Heider <a.heider@gmail.com>
2020-10-01 10:43:43 +02:00
Lad Prabhakar
86a73b0905 i2c: rcar_i2c: Fix i2c read/write errors
commit 7c8f821e5d ("i2c: rcar_i2c: Set the slave address from
rcar_i2c_xfer") blindly called rcar_i2c_set_addr() with read argument
always set to 1 during xfer which introduced read/write errors, whereas
earlier rcar_i2c_read_common() called rcar_i2c_set_addr() with read set to
1 and rcar_i2c_write_common() called rcar_i2c_set_addr() with read set 0.

Fixes: 7c8f821e5d ("i2c: rcar_i2c: Set the slave address from rcar_i2c_xfer")
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2020-10-01 05:41:44 +02:00
Etienne Carriere
5f9070a4a4 optee: copy FDT OP-TEE related nodes before generic FDT changes
Move call to optee_copy_fdt_nodes() introduced by commit 6ccb05eae0
before generic changes in kernel FDT so that platform specific changes
are not overridden by the changes made by this function.

Fixes: 6ccb05eae0 ("image: fdt: copy possible optee nodes to a loaded devicetree")
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-09-30 11:31:13 -04:00
Tom Rini
421ebb713b Merge branch '2020-09-29-assorted-fixes'
- Assorted typo fixes
- Correctly migrate some CONFIG_PREBOOT cases to defconfig
- Coverity issues in squashfs
2020-09-29 13:24:50 -04:00
Heinrich Schuchardt
f644081d38 video: typo Normlly
%s/Normlly/Normally/

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-09-29 13:19:08 -04:00
Naoki Hayama
499696e40a README: Fix typo in Board Initialisation Flow
I suppose 'these' might be 'there'.

Signed-off-by: Naoki Hayama <naoki.hayama@lineo.co.jp>
2020-09-29 13:19:08 -04:00
Heinrich Schuchardt
0ed375ebb1 fs/squashfs: parameter check sqfs_read_metablock()
We should check if the incoming parameter file_mapping is not NULL instead
of checking after adding an offset.

Reported-by: Coverity CID 307210
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
2020-09-29 13:19:08 -04:00
Heinrich Schuchardt
5558af16a0 mtd: fix typos in drivers/mtd/Kconfig, drivers/mtd/renesas_rpc_hf.c
Fix a typo

%s/interract/interact/

Use Samsung's capitalization of their trademarks

%s/onenand/OneNAND/
%s/Hyperflash/HyperFlash/

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
[trini: Add other Hyperflash cases as noted by Stefan]
Signed-off-by: Tom Rini <trini@konsulko.com>
2020-09-29 13:18:31 -04:00
Peter Robinson
324d77998e Define default CONFIG_PREBOOT with right config option
The 44758771ee commit removes CONFIG_PREBOOT but actually sets the USE_PREBOOT
Kconfig option which isn't CONFIG_PREBOOT and is also a bool option which means
we regress because 'usb start' isn't run when expected, it should also be run
for devices that have USB storage because keyboards aren't the only thing we
might need the USB bus for.

Fixes: 44758771ee ("arm: move CONFIG_PREBOOT="usb start" to KConfig")
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Cc: Jonas Smedegaard <dr@jones.dk>
Cc: Neil Armstrong <narmstrong@baylibre.com>
2020-09-29 13:17:33 -04:00
Tom Rini
d44d46e9fa Merge tag 'efi-2020-10-rc6' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi
Pull request for UEFI sub-system for efi-2020-10-rc6

The following UEFI related issues are fixed:

* restore the global data pointer in the RISC-V trap handler
* install EFI_RNG_PROTOCOL only if we have a random number generator
* display human readable string for EFI_RNG_PROTOCOL in efidebug command
2020-09-28 08:26:49 -04:00
Tom Rini
114c0ebcc1 Merge tag 'u-boot-amlogic-20200928' of https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic
- fix RNG driver probe & linux EFI KASLR boot on GXL, GXM, G12A, G12B & SM1 based boards
2020-09-28 08:26:34 -04:00
Heinrich Schuchardt
c48e9f310b riscv: restore global data pointer in trap handler
The gp register is used to store U-Boot's global data pointer. We should
not assume that an UEFI application leaves the gp register unchanged as
the UEFI specifications does not define who is the owner of the gp and tp
registers.

So the following sequence should be followed in the trap handler:

* save the caller's gp register
* restore the global data pointer
* serve interrupts or print crash dump and reset
* restore the caller's gp register

Cc: Abner Chang <abner.chang@hpe.com>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Rick Chen <rick@andestech.com>
2020-09-28 12:20:19 +02:00
Neil Armstrong
02d249f99e rng: meson: make core clock optional
This fixes HWRNG support on Amlogic GXL, GXM, G12A, G12B & SM1
based boards dues to the lack of the core clock in the device tree.

It was reported breaking EFI boot in the Linux EFI stub, because the
EFI_RNG_PROTOCOL didn't check for the RNG device presence before
installing itself.

The Linux amlogic,meson-rng.yaml doesn't mandate the core clock,
this the clock should be ignores if not present.

Nevertheless, the clock should be present and this should be fixed
on the Linux meson-gxl.dtsi & meson-g12-common.dtsi then synced
with U-Boot.

The change has been tested on a Khadas VIM3, which uses the common
meson-g12-common.dtsi like the Odroid-C4 & Odroid-N2 in Scott's
report, along with the RNG cmd.

Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reported-by: Scott K Logan <logans@cottsay.net>
Fixes: bc40eb278b ("drivers/rng: add Amlogic hardware RNG driver")
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Tested-by: Scott K Logan <logans@cottsay.net>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2020-09-28 09:38:11 +02:00
Heinrich Schuchardt
b59c13d42f efi_loader: installation of EFI_RNG_PROTOCOL
Having an EFI_RNG_PROTOCOL without a backing RNG device leads to failure
to boot Linux 5.8.

Only install the EFI_RNG_PROTOCOL if we have a RNG device.

Reported-by: Scott K Logan <logans@cottsay.net>
Cc: Neil Armstrong <narmstrong@baylibre.com>
Cc: Ard Biesheuvel <ardb@kernel.org>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-09-27 16:10:45 +02:00
Heinrich Schuchardt
796933510f efi_loader: efidebug display RNG protocol
Add the Random Number Generator (RNG) protocol to the GUIDs that the
'efidebug dh' protocol can replace by a text.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-09-27 16:10:45 +02:00
Lad Prabhakar
d03ad060fe board: renesas: ebisu: Drop CA57 check in reset_cpu()
Renesas Ebisu board is based on R-Car E3 SoC which has dual CA53 and
a CR7.

This patch drops check for cputype from reset_cpu() and also drops the
corresponding CA57 macros. While at it also dropped RST_RSTOUTCR macro
which is unused.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
2020-09-26 17:26:01 +02:00
Tom Rini
253388acd6 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriq
- Bug fixes related to PCIe, pfe, xfi, gpio, reset, vid, env, and usb on
  layerscape products
2020-09-25 12:55:06 -04:00
Hou Zhiqiang
8ec619f8fd pci: layerscape: Fixup PCIe EP mode DT nodes for LX2160A rev2
LX2160A rev2 uses different PCIe controller, so EP mode DT
nodes also need to be fixed up.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-09-24 20:57:32 +05:30
Kuldeep Singh
6fe7743d05 net: pfe_eth: Remove non-DM code check from pfe_spi_flash_init
CONFIG_DM_SPI_FLASH is only supported now with passing of driver
conversion deadline from non-DM to DM model. Hence, it's safe to remove
non-DM code check from pfe_spi_flash_init.

Also use CONFIG_ENV_SPI_MODE and CONFIG_ENV_SPI_MAX_HZ instead of
reading reading values from DT.

Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-09-24 20:57:32 +05:30
Kuldeep Singh
63d5344615 net: pfe_eth: Fix resoure leak in pfe_spi_flash_init
Fix Coverity issue: RESOURCE_LEAK.
leaked_storage: Variable addr going out of scope leaks the storage it
points to.

Fixes: e0152dbed6 ("net: pfe_eth: Use spi_flash_read API to access
flash memory")
Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-09-24 20:57:32 +05:30
Wasim Khan
450d491293 arm: dts: lx2160a: Add IO range
Add IO range property to fix below error on uboot
PCI: Failed autoconfig bar 18

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-09-24 20:57:32 +05:30
Madalin Bucur
858056b0e0 driver: net: fm: add support for XFI
All the 10G ports that were working in XFI mode were described as
using XGMII (as PHY_INTERFACE_MODE_XFI was not added at the time).
Add the minimal changes required for the FMan code to support XFI.

Signed-off-by: Madalin Bucur <madalin.bucur@oss.nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-09-24 20:57:32 +05:30
Chaitanya Sakinam
ad8277270a ls1012a, pfe_eth: Update probe to avoid resource leak
PFE DDR addresses are now stored on to a stack varaiable rather
dynamic allocation.

Signed-off-by: Chaitanya Sakinam <chaitanya.sakinam@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-09-24 20:57:32 +05:30
Chaitanya Sakinam
0649ab496a ls1012a, pfe_eth: correction in delay implementation
correction in delay implementation before we exit out of tx timeout.

Signed-off-by: Chaitanya Sakinam <chaitanya.sakinam@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-09-24 20:57:32 +05:30
Madalin Bucur
b750695ac9 drivers: net: phy: Use Aquantia driver for AQR113C
Add support for AQR113C PHY

Signed-off-by: Madalin Bucur <madalin.bucur@oss.nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-09-24 20:57:32 +05:30
Grigore Popescu
479cfd1fa6 drivers: net: ldpaa_eth: lx2160a: fix bug in checking if a DPMAC is enabled
The next DPMAC was always verified if it is enabled.  In case of
DPMAC@6, the DPMAC@7 is verified.  As DPMAC@7 is disabled, DPMAC@6 will
be considered disabled and not detected by uboot.

Signed-off-by: Grigore Popescu <grigore.popescu@nxp.com>
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-09-24 20:57:32 +05:30
hui.song
4e0dc38da0 armv8: dts: fsl-lx2160a: add gpio0 gpio1 gpio3 DT nodes
add gpio0 gpio1 gpio3 DT nodes to fsl-lx21600.dtsi

Signed-off-by: hui.song <hui.song_1@nxp.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-09-24 20:57:32 +05:30
Meenakshi Aggarwal
d31f3a1b62 armv8: lx2160a: fix reset sequence
Make sure that SW_RST_REQ and RST_REQ_MSK are cleared
before triggering hardware reset request.

Signed-off-by: Thirupathaiah Annapureddy <thiruan@linux.microsoft.com>
Signed-off-by: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-09-24 20:57:32 +05:30
Meenakshi Aggarwal
e5f1111a79 lx2160: Correct sd_boot environment variable
Signed-off-by: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-09-24 20:57:32 +05:30
Wasim Khan
c63edbc750 board: freescale: emc2305: Pass chip_addr to set_fan_speed
emc2305 is a common driver. It should not use platform specific
i2c address for slave device.
Pass chip_addr as agrument to emc2305_init() and set_fan_speed()
so that emc2305 driver can be used with different platforms.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-09-24 20:57:32 +05:30
Martin Kaistra
ada19fd2d2 board/freescale/lsch3: Correct entry for 0.9v
According to the reference manual of LS2088A, for a VDD voltage of
0.9V, the entry should be at 01000b.

Fixes: 4911948ec7 ("board/freescale,lsch3: Add entry for 0.9v")
Signed-off-by: Martin Kaistra <martin.kaistra@linutronix.de>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-09-24 20:57:32 +05:30
Hou Zhiqiang
af288cb291 arm64: Layerscape: Survive LPI one-way reset workaround
The workaround of LPI one-way reset issue is broken by the series:
https://patchwork.ozlabs.org/project/uboot/list/?series=192398

This patch is to add DT node for GIC RD tables and create corresponding
reserved-memory node in kernel DT to fix it.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-09-24 20:57:32 +05:30
Ran Wang
223c19076f fsl-layerscape: enable dwc3 snooping feature
Configure DWC3’s cache type to ‘cacheable’ for better
performance. Actually related register definition and values are SoC
specific, which means this setting is only applicable to Layerscape SoC,
not generic for all platforms which have integrated DWC3 IP.

Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-09-24 20:57:32 +05:30
Tom Rini
1da91d9bcd Merge https://gitlab.denx.de/u-boot/custodians/u-boot-marvell
- Enable NET_RANDOM_ETHADDR on Espressobin (Acked-by Kosta)
- Espressobin & Clearfog: fdtfile enhancements
- A37xx PCI: Disable link training when unloading driver
- A37xx: increase CONFIG_SYS_BOOTM_LEN to 64MB
- Add Macronix mx25u12835f support, used on uDPU and ESPRESSObin v7
- dns325: Correct CONFIG_NR_DRAM_BANKS parameter
2020-09-24 08:34:54 -04:00
Pali Rohár
5f50b88ab6 arm64: a37xx: pci: Disable link training when unloading driver
As required by PCI Express spec a delay for at least 100ms after
de-asserting PERST# signal is needed before link training is enabled.

Linux kernels prior to 5.8 version do not automatically disable link
training before de-asserting PERST# signal, therefore this requirement is
not fulfilled.

Above requirement is needed for proper detection of some Compex PCIe WiFi
cards. Otherwise Linux kernel cannot detect it.

To allow using those PCIe cards with older Linux kernel versions booted by
U-Boot compiled with U-Boot a37xx pci driver, disable link training in
U-Boot when unloading this pci driver.

Thanks to DM_FLAG_OS_PREPARE flag, U-Boot automatically unload this driver
when booting Linux kernel.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-09-24 10:14:06 +02:00
Tom Rini
e7e650e8bd arm: kirkwood: dns325: Correct CONFIG_NR_DRAM_BANKS parameter
Testing on a DNS-325 NAS has shown that in order for the device to work
we need to set CONFIG_NR_DRAM_BANKS to 1 and not 2.

Tested-by: Dmitry N. Kolesnikov <dk.diklab@gmail.com>
Reported-by: Dmitry N. Kolesnikov <dk.diklab@gmail.com>
Cc: Stefan Herbrechtsmeier <stefan@herbrechtsmeier.net>
Signed-off-by: Tom Rini <trini@konsulko.com>
2020-09-24 10:13:59 +02:00
Andre Heider
68e32e3443 arm: mvebu: Espressobin: Set environment variable fdtfile
Required for the generic distro mechanism.

Linux ships with 4 variants:
marvell/armada-3720-espressobin-v7-emmc.dtb
marvell/armada-3720-espressobin-v7.dtb
marvell/armada-3720-espressobin-emmc.dtb
marvell/armada-3720-espressobin.dtb

Use available information to determine the appropriate filename.

Fixes booting GRUB EFI arm64 on Fedora.

Reported-by: Dennis Gilmore <dennis@ausil.us>
Signed-off-by: Andre Heider <a.heider@gmail.com>
2020-09-24 10:13:42 +02:00
Baruch Siach
5a3f5e61ca arm: mvebu: clearfog: don't override set fdtfile env
Only set the fdtfile environment variable when not already set.

Fixes: 867572f09e ("ARM: mvebu: clearfog: run-time selection of DT file")
Cc: Joel Johnson <mrjoel@lixil.net>
Reported-by: Andre Heider <a.heider@gmail.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Andre Heider <a.heider@gmail.com>
2020-09-24 10:13:39 +02:00
Andre Heider
073ccfab5f arm: mvebu: defconfig: espressobin: enable NET_RANDOM_ETHADDR
The hardware does not provide a MAC address. Enable this so that
network access works with just the default environment.

Signed-off-by: Andre Heider <a.heider@gmail.com>
Acked-by: Konstantin Porotchkin <kostap@marvell.com>
2020-09-24 10:13:34 +02:00
Vladimir Vid
6728da5ce9 arm64: a37xx: increase CONFIG_SYS_BOOTM_LEN to 64MB
Increase max gunzip size, required for booting itb recovery images on
uDPU.

Signed-off-by: Vladimir Vid <vladimir.vid@sartura.hr>
[a.heider: adapt to mainline]
Signed-off-by: Andre Heider <a.heider@gmail.com>
2020-09-24 10:13:22 +02:00
Vladimir Vid
2781c71873 mtd: spi-nor-ids: add support for Macronix mx25u12835f flash
Some of Marvell A3700 boards use mx25u12835f, specifically uDPU
and ESPRESSObin v7.

Signed-off-by: Vladimir Vid <vladimir.vid@sartura.hr>
[a.heider: adapt commit message to mainline]
Signed-off-by: Andre Heider <a.heider@gmail.com>
2020-09-24 10:13:22 +02:00
Michael Walle
b7585aa9b1 pci: layerscape: Fix spurious writes and panic
The fdt_fixup_pcie_ls() scans all PCI devices and assumes that all PCI
root devices are layerscape PCIe controllers. Unfortunately, this is not
true for the LS1028A. There is one additional static PCI root complex
(this contains the networking devices) which has nothing to do with the
layerscape PCIe controllers. On recent U-Boot versions this results in
the following panic:

"Synchronous Abort" handler, esr 0x96000044
elr: 000000009602fa04 lr : 000000009602f9f4 (reloc)
elr: 00000000fbd73a04 lr : 00000000fbd739f4
x0 : 0080000002000101 x1 : 0000000000000000
x2 : 00000000fbde9000 x3 : 0000000000000001
x4 : 0000000000000000 x5 : 0000000000000030
x6 : 00000000fbdbd460 x7 : 00000000fbb3d3a0
x8 : 0000000000000002 x9 : 000000000000000c
x10: 00000000ffffffe8 x11: 0000000000000006
x12: 000000000001869f x13: 0000000000000a2c
x14: 00000000fbb3d2cc x15: 00000000ffffffff
x16: 0000000000010000 x17: 0000000000000000
x18: 00000000fbb3fda0 x19: 0000000000000800
x20: 0000000000000000 x21: 00000001f0000000
x22: 0000000000000800 x23: 0000000000000009
x24: 00000000fbdc3c1b x25: 00000000fbdc28e5
x26: 00000000fbdcc008 x27: 00000000fbdc16e2
x28: 000000000f000000 x29: 00000000fbb3d3a0

Code: 394072a1 f94006a0 34000041 5ac00a94 (b8336814)
Resetting CPU ...

This bug already existed in former versions, but the spurious write was
never trapped, because the destination address was a valid address (by
pure luck).

Make sure the PCI root is actually one of the expected PCIe layerscape
controllers by matching its compatible string.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Tested-by: Heiko Thiery <heiko.thiery@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-09-23 19:33:44 +05:30
Kuldeep Singh
7679afbfe3 configs: ls1012a/ls1046a: Add CONFIG_ENV_OVERWRITE in defconfig
CONFIG_ENV_OVERWRITE disables write protection on various environment
variables like "ethaddr" and "serial".

Enable this config in LS1046A and LS1012A defconfigs. This resolves an
error while setting multiple values of "ethaddr" variable.

Before the change:
=> setenv ethaddr 00:E0:0C:00:06:0
=> setenv ethaddr 00:E0:0C:00:06:1
Error: Can't overwrite "ethaddr"
Error inserting "ethaddr" variable, errno=1

After the change:
=> setenv ethaddr 00:E0:0C:00:06:0
=> setenv ethaddr 00:E0:0C:00:06:1

Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-09-23 19:33:44 +05:30
Mian Yousaf Kaukab
120e92d969 ls1028a: use default scan_dev_for_boot
scan_dev_for_efi is supposed to be called from scan_dev_for_boot.
However this call is missing for ls1028ardb and ls1028aqds boards. As
a result EFI boot doesn’t work. Fix this issue by removing custom
definition of scan_dev_for_boot and use the default definition
instead.

Signed-off-by: Mian Yousaf Kaukab <ykaukab@suse.de>
Reviewed-by: andy.tang@nxp.com
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-09-23 19:33:43 +05:30
Tom Rini
55004fa433 Merge tag 'mips-fixes-for-2020.10' of https://gitlab.denx.de/u-boot/custodians/u-boot-mips
- mips: vocore2: fix SPL image generation
- mips: vocore2: fix LZMA decompression errors
- mips: vocore2: fix console output
- mips: pic32mzda: fix DTC warnings and GPIO nodes
- mips: pic32mzda: make GPIO and MMC working again
2020-09-22 22:08:16 -04:00
Mauro Condarelli
7d1538cc9b mips: vocore2: fix various issues
- fix SPL image generation
- fix incorrect console output
- increase malloc_f and malloc_r space to fix LZMA decompression errors
- increase SPI flash clock

Signed-off-by: Mauro Condarelli <mc5686@mclink.it>
[squashed to one patch, fix commit subject and description]
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2020-09-23 00:14:56 +02:00
John Robertson
bd25f9a69f mips: dts: Fix PIC32MZDA GPIO register definitions
The GPIO bank name for banks J and K are not correct when using the
'gpio' command from the console.

The driver derives the bank name from the device tree instance string by
using the instance value and adding 'A': gpio0@xxaddrxx is Bank A,
gpio1@yyaddryy is Bank B and so on.

On the PIC32, there is no Bank I so instances 8 and 9 need to be
incremented as a minimum change.

An alternative (less opaque) implementation would be to use a bank-name
property instead but this would require modifying the driver code too.

Signed-off-by: John Robertson <john.robertson@simiatec.com>
2020-09-23 00:14:29 +02:00
John Robertson
81b543a4e6 mips: dts: Fix PIC32MZDA GPIO register definitions
GPIO state cannot be changed via the device tree (e.g. with gpio-hog) or
using the 'gpio' command from the console.

The root cause is a discrepancy between the driver and the device tree:
the driver code expects an absolute I/O address in the <reg> property,
while the device tree defines the address relative to a declaration in
the parent pinctrl node.

Changing the device tree to fix a driver issue would normally be wrong,
however:
- I have run the first version of U-Boot in which this driver appears
  (v2016.03) and the same problem exists, so this is not a regression;
- There is no code that references a parent device tree node that might
  suggest the intent of the author was to parse the DT as it exists now;
- The equivalent Linux PIC32 GPIO driver also uses absolute addresses
  for the GPIO <reg> property. This change brings the U-Boot DT more
  into line with Linux.

Additionally, the data sheet (Microchip ref. 60001361H) shows that the
register set to control a GPIO bank spans 0xE0 bytes, but the device
tree specified size is only 0x48 bytes.

Signed-off-by: John Robertson <john.robertson@simiatec.com>
2020-09-23 00:14:28 +02:00
John Robertson
0723c2ddeb mips: dts: Fix device tree warnings for PIC32MZDA
Signed-off-by: John Robertson <john.robertson@simiatec.com>
2020-09-23 00:14:28 +02:00
John Robertson
95e7141294 mips: pic32mzdask: enable CONFIG_BLK
CONFIG_BLK needs to be enabled by default to allow U-Boot to
compile after a 'make pic32mzdask_defconfig'.

Signed-off-by: John Robertson <john.robertson@simiatec.com>
2020-09-23 00:14:21 +02:00
John Robertson
69af033fb9 mips: pic32mzdask: disable SDHCI SDCD signal workaround
The PIC32MZ DA Starter Kit does not need the card detect workaround
because the SDCD signal line is connected properly. Disable the
workaround in this case.

Signed-off-by: John Robertson <john.robertson@simiatec.com>
2020-09-23 00:14:14 +02:00
John Robertson
10d65bf00b pinmux: pic32: add SDHCI pin config
The GPIO pins used by the SDHCI controller need to be configured to
allow the interface to work.

Signed-off-by: John Robertson <john.robertson@simiatec.com>
2020-09-23 00:08:52 +02:00
John Robertson
6978db36aa mmc: pic32: Refresh PIC32 MMC driver
The existing driver is not compatible with the Driver Model.

This patch makes the necessary changes while also removing obsolescent
calls/properties as follows:

- fdtdec_* calls replaced with dev_read_* equivalents;
- 'clock-freq-min-max' property replaced by querying the frequency of
  the source clock 'base_clk';
- The card detect erratum workaround is applied during probe rather than
  overriding get_cd.

The card detect workaround (Microchip ref. DS80000736E, erratum #15) is
not always needed and can be disabled using a vendor specific DT
property.

Signed-off-by: John Robertson <john.robertson@simiatec.com>
2020-09-23 00:08:52 +02:00
Tom Rini
5949f36f08 Merge branch '2020-09-22-assorted-bugfixes'
- Fix for environment location on some PowerPC boards
- Typo / documentation fix
- Two fixes for mpc8xxx
2020-09-22 16:47:48 -04:00
Chris Packham
dc8368b7ee configs: powerpc: Don't set CONFIG_ENV_ADDR for QorIQ SPIFLASH
Setting CONFIG_ENV_ADDR to something other than 0 stops gd->env_addr
from being allocated dynamically. When the environment is in SPI we need
it to be allocated as we can't use a direct memory mapped address.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
2020-09-22 11:26:19 -04:00
Heinrich Schuchardt
643b5e7ea3 disk: typo Terra Bytes
512 * 2^32 bytes equals 2 tebibytes.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-09-22 11:26:19 -04:00
Heinrich Schuchardt
4061191727 doc/build/gcc.rst: add missing apt-get *install*
The install command is missing for an apt-get command.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-09-22 11:05:32 -04:00
Rasmus Villemoes
24e8c0e3b3 gpio/mpc83xx_spisel_boot.c: include log.h
Fix build failure, it used to get this implicitly through common.h
until f7ae49fc4f (common: Drop log.h from common header).

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Heiko Schocher <hs@denx.de>
2020-09-22 11:05:32 -04:00
Rasmus Villemoes
10a6aa963c spi: mpc8xxx_spi.c: fix cs activate/deactivate
Somewhere between v2020.04 and v2020.07 the mpc8xxx_spi driver broke,
I'm guessing due to this hunk

@@ -559,6 +560,8 @@ int dm_gpio_set_dir_flags(struct gpio_desc *desc, ulong flags)
        if (ret)
                return ret;

+       /* combine the requested flags (for IN/OUT) and the descriptor flags */
+       flags |= desc->flags;
        ret = _dm_gpio_set_dir_flags(desc, flags);

from commit 695e5fd546 ("gpio: update dir_flags management"). But
the blame is mostly on the driver itself which seems rather confused:
The chip select gpios are requested with GPIOD_ACTIVE_LOW, but then in
each activate/deactivate, dm_gpio_set_dir_flags() is called with
merely GPIOD_IS_OUT, and then the driver call set_value(0) for
activate.

That used to work, but with the above hunk, the ACTIVE_LOW setting
from the request becomes persistent, so the gpio driver ends up being
asked to set the value to 1 in mpc8xxx_spi_cs_activate().

So drop the dm_gpio_set_dir_flags() calls in the activate/deactivate
functions, and use a value of 1 to mean "logically enabled".

Ideally, I think we should also drop the GPIOD_ACTIVE_LOW from the
request and make it up to the list of gpio cs in DT to indicate
whether that CS is enabled when driven low (as is of course usually
the case), but that requires changing
arch/powerpc/dts/gdsys/gazerbeam-base.dtsi among others, and I don't
have that hardware to test on. I have, however, tested our
own (mpc8309-based) hardware with this change, and I have also tested
that removing the GPIOD_ACTIVE_LOW from the request and updating our
DT as

-                       gpios = <&spisel 0 0>;
+                       gpios = <&spisel 0 GPIO_ACTIVE_LOW>;

still works.

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
2020-09-22 11:05:32 -04:00
Tom Rini
ba2a0cbb05 Prepare v2020.10-rc5
Signed-off-by: Tom Rini <trini@konsulko.com>
2020-09-21 13:45:23 -04:00
Tom Rini
d6b241bcd7 configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2020-09-21 13:45:07 -04:00
Tom Rini
10431c4eaa Merge https://gitlab.denx.de/u-boot/custodians/u-boot-x86
- Several ACPI bug fixes
- Intel edison: Move config SYS_MALLOC_LEN to Kconfig
- Use "emmc" in ApolloLake FSP devicetree bindings
2020-09-21 11:01:07 -04:00
Wolfgang Wallner
40edea3a07 x86: acpi: Add memset to initialize SPCR table
Add a missing memset to acpi_create_spcr().

The other acpi_create_xxxx() functions perform a memset on their
structures, acpi_create_spcr() does not and as a result the contents of
this table are partly uninitialized (and thus random after every reset).

Fixes: b288cd9600 ("x86: acpi: Generate SPCR table")
Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: fix the tags format in the commit message]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2020-09-21 16:41:36 +08:00
Wolfgang Wallner
3f6966ab2b x86: acpi: Fix calculation of DSDT length
Currently, the calculation for the length of the DSDT table includes any
bytes that are added for alignment, but those bytes are not initialized.

This is because the DSDT length is calculated after a call to
acpi_inc_align(). Split this up into the following sequence:

  * acpi_inc()
  * Calculate DSDT length
  * acpi_align()

Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-09-21 16:41:35 +08:00
Wolfgang Wallner
674c58c7b7 x86: fsp: Replace e-mmc with emmc in devicetree bindings
The term eMMC is used inconsistently within the FSP devicetree
bindings (e-mmc and emmc), especially for "emmc-host-max-speed"
documentation and code disagree.

Change all eMMC instances within the FSP bindings to consistently
use "emmc". The term "emmc" is already used a lot within U-Boot,
while "e-mmc" is only used in the FSP bindings.

Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: correct one typo in the commit message]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2020-09-21 16:41:35 +08:00
Andy Shevchenko
4364a3f852 cmd: acpi: Print revisions in hex format
The revisions are usually dates in hex-decimal format representing
YYYYmmdd. Print them in hex to see this clearly.

Before:
  ...
  FACP 000e5420 0000f4 (v06 U-BOOT U-BOOTBL 538970376 INTL 0)
  DSDT 000e4780 000ba0 (v02 U-BOOT U-BOOTBL 65536 INTL 538968870)
  ...
After:
  ...
  FACP 000e5420 0000f4 (v06 U-BOOT U-BOOTBL 20200908 INTL 0)
  DSDT 000e4780 000ba0 (v02 U-BOOT U-BOOTBL 10000 INTL 20200326)
  ...

Fixes: 0b885bcfd9 ("acpi: Add an acpi command")
Cc: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-09-21 16:41:35 +08:00
Andy Shevchenko
5a53441a91 x86: edison: Move config SYS_MALLOC_LEN to Kconfig
This patch moves the the config SYS_MALLOC_LEN to Kconfig
as it is already done for zynq arch in commit 01aa5b8f05
("Kconfig: Move config SYS_MALLOC_LEN to Kconfig for zynq").

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-09-21 09:47:24 +08:00
Tom Rini
400f84c5ba Merge tag 'efi-2020-10-rc5-2' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi
Pull request for UEFI sub-system for efi-2020-10-rc5 (2)

The following bugs are fixed:

* incorrect online help for setenv and env
* description of function efi_mem_carve_out()
* replace printf() by log_err() in stm32mp1_rng driver

A unit test is provided to check that the boot hart id is provided in the
RISC-V device-tree.
2020-09-19 08:35:20 -04:00
Tom Rini
667ab37d58 Merge branch '2020-09-18-assorted-bugfixes'
- SquashFS Coverity fixes
- bitflip fix in the alternate memtest command
- Disable networking on bcmstb boards where we didn't have any network
  drivers enabled.
2020-09-19 08:31:52 -04:00
Maxim Uvarov
8f0ac536d4 efi: change 'env -e -i' usage syntax
'env -e -i' syntax was changed from "," to ":". Account for this also
in the documentation.

Fixes: 2b3fbcb59f ("efi_loader: use ':' as separator for setenv -i")
Signed-off-by: Maxim Uvarov <maxim.uvarov@linaro.org>
Correct the usage description for setenv -e too.
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-09-18 22:23:58 +02:00
Heinrich Schuchardt
52a8481827 efi_selftest: check for RISC-V boot-hartid in FDT
On RISC-V check that the /chosen node has a boot-hartid property.

To run the test configure with CONFIG_CMD_BOOTEFI_SELFTEST=y and issue

    setenv efi_selftest device tree
    setenv serial# myserial
    bootefi selftest

If the test succeeds, it reports the boot-hartid, e.g.

    boot-hartid: 1

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-09-18 22:23:58 +02:00
Heinrich Schuchardt
18161a8a4e efi_selftest: rework device tree test
Allow specifying the node on which a property is searched.
Test the device tree consistency more rigorously.
Some efi_st_printf() calls have been converted to efi_st_error().

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-09-18 22:23:58 +02:00
Maxim Uvarov
ffbeafe7e2 efi_memory: refine overlap_only_ram description
Refine text for overlap_only_ram description to
match to what exactly flag does and aling description
with other functions.

Signed-off-by: Maxim Uvarov <maxim.uvarov@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-09-18 22:23:58 +02:00
Heinrich Schuchardt
cf0bf89227 rng: stm32mp1: use log() instead of printf()
The logging system provides flexible filtering and enhanced output.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Sughosh Ganu <sughosh.ganu@linaro.org>
2020-09-18 22:23:58 +02:00
Ralph Siemsen
9989fb18bd cmd: mem: fix range of bitflip test
The bitflip test uses two equal sized memory buffers. This is achieved
by splitting the range of memory into two pieces. The address of the
second buffer, as well as the length of each buffer, were not correctly
calculated. This caused bitflip test to access beyond the end of range.
This patch fixes the pointer arithmetic problem.

A second problem arises because u-boot "mtest" command expects the
ending address to be inclusive. When computing (end - start) this
results in missing 1 byte of the requested length. The bitflip test
expects a count rather than an "ending" address. Thus it fails to test
the last word of the requested range. Fixed by using (end - start + 1).

Added Kconfig option to optionally disable the bitflip test, since it
does add significantly to the time taken for "mtest".

Fixes: 8e434cb705 ("cmd: mem: Add bitflip
memory test to alternate mtest")

Signed-off-by: Ralph Siemsen <ralph.siemsen@linaro.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-09-18 16:19:58 -04:00
Thomas Fitzsimmons
e03dd8a05f configs: bcmstb: Disable networking support
Silence the "Driver Model for Ethernet drivers" migration warning for
the bcm7445 and bcm7260 ports, neither of which supports networking yet.

Signed-off-by: Thomas Fitzsimmons <fitzsim@fitzsim.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2020-09-18 16:19:58 -04:00
Joao Marcos Costa
a7dc37d38c fs/squashfs: Fix Coverity Scan defects
Fix control flow issues and null pointer dereferences.

Signed-off-by: Joao Marcos Costa <jmcosta944@gmail.com>
2020-09-18 16:19:58 -04:00
Tom Rini
98f3ee09d0 Merge tag 'u-boot-imx-20200918' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx
----------------------------------------------------------------
Fixes for 2020.10
-----------------

- Toradex boards
- mx6qsabrelite: fix env offset
- esdhc_imx: waiting for clock instead of sleep
- dyn RAM calibration for entry point i.MX6

Travis: https://travis-ci.org/github/sbabic/u-boot-imx/builds/728274602
2020-09-18 10:42:12 -04:00
Soeren Moch
4516b535bf board: tbs2910: Disable CONFIG_ENV_VARS_UBOOT_CONFIG in defconfig
This is not required for sysboot (we defined fdtfile), let's save a few
bytes in the binary image without these variables.

Signed-off-by: Soeren Moch <smoch@web.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2020-09-18 10:39:43 +02:00
Tom Rini
9de3126e80 Merge branch '2020-09-16-assorted-fixes'
- Assorted bug fixes
2020-09-17 09:53:57 -04:00
Philippe Schenker
bf46474e21 apalis-imx8qm: rename all occurences to apalis-imx8
The Toradex product is called apalis-imx8 consisting of SoM with
i.MX8QM and i.MX8QP SoCs.

Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@toradex.com>
2020-09-17 14:41:33 +02:00
Philippe Schenker
08b6a60ee8 colibri-imx8qxp: rename all occurences to colibri-imx8x
The Toradex product is called colibri-imx8x consisting of SoM with
i.MX8QXP and i.MX8DX SoCs.

Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@toradex.com>
2020-09-17 14:41:26 +02:00
Haibo Chen
f9c3a816c0 mmc: fsl_esdhc_imx: check the clock stable status after config the clock rate.
Currently, after config the clock rate, delay 10ms, this is quite a rough
method. Check the clock stable status in the present status register is
enough.

Tested-by: Ji Luo <ji.luo@nxp.com>
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
2020-09-17 14:41:07 +02:00
Marek Vasut
d1a7205532 ARM: mx6: ddr: Add support for iMX6UL/ULL/SL/SDL
This patch adds support for iMX6UL/ULL/SL/SDL MMDC into the DDR calibration
code. The difference between MX6DQ and MX6UL/ULL/SL is that the later SoCs
have 2 SDQS registers, just like MX6SX, while the MX6DQ/MX6SDL has 8.

Fixes: 4f4c128c65 ("ARM: mx6: ddr: Add support for iMX6SX")
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Eric Nelson <eric@nelint.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2020-09-17 14:40:55 +02:00
Denis Pynkin
1189bd513c mx6qsabrelite: increase the environment offset
The size of the binary created with the default U-boot config is much
greater than the default offset for environment `0x60000`.
In case if that binary is used for booting via MMC it is overlapped with
the environment stored on MMC.
This leads to U-Boot corruption while saving environment with `saveenv`
command and non-bootable SabreLite board.

The offset for environment `CONFIG_ENV_OFFSET=0x60000` was added in
commit a09fea1 but did not count in the change to `0xC0000` if option
`CONFIG_ENV_IS_IN_MMC` is used.

The offset is also used for variant with environment saving onto SPI NOR
flash (with enabled option `CONFIG_ENV_IS_IN_SPI_FLASH`). In that case the
U-Boot binary flashed on SPI NOR is also corrupted after environment
saving with the original 0x60000 offset.

Signed-off-by: Denis Pynkin <denis.pynkin@collabora.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2020-09-17 14:40:40 +02:00
Peng Fan
0098222dac imx8mp: Remove parts MIMX8ML7 and MIMX8ML5 support
Latest datasheet revE has removed MIMX8ML7D/5D/7C/5C parts, so
update u-boot to remove decoding and support for those parts.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-09-17 14:40:22 +02:00
Peng Fan
a3e7d51fd5 imx8m: clock_imx8mm: add missed return
Add missed return

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-09-17 14:40:17 +02:00
Peng Fan
ece7844d8f imx8mq: fix SSCG_PLL_REFCLK_SEL_x
Fix SSCG_PLL_REFCLK_SEL_x, the offset starts from 0, not 16

Reported-by: Coverity 3448860
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
2020-09-17 14:40:10 +02:00
Peng Fan
d81e8cf6ea imx8mq: fix FRAC_PLL_REFCLK_SEL_MASK
Coverity reported dead code, however it is FRAC_PLL_REFCLK_SEL_MASK
was wrongly set.

Reported-by: Coverity 10045172
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
2020-09-17 14:40:04 +02:00
Peng Fan
95bae9ff92 imx7: ccm: correct target interface num
According to i.MX 7Dual Applications Processor Reference Manual, Rev. 1
The target interface CCM root index ranges [0,124], so the number
should be 125.

Reported-by: Coverity 18045
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
2020-09-17 14:39:55 +02:00
Igor Opaniuk
763a4aef09 apalis_imx6: provide fdtfile in env instead of setting it in runtime
Provide fdtfile value in default env instead of setting
it dynamically in runtime.

Fixes: 85cb2bc686("apalis/colibri imx6: provide proper fdtfile value")
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
2020-09-17 14:39:09 +02:00
Igor Opaniuk
5d54d7eeb1 colibri_imx6: provide fdtfile in env instead of setting it in runtime
Provide fdtfile value in default env instead of setting
it dynamically in runtime.

Fixes: 85cb2bc686("apalis/colibri imx6: provide proper fdtfile value")
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
2020-09-17 14:39:09 +02:00
Igor Opaniuk
327381e8b5 colibri_imx7: use preboot for fdtfile evaluation
Enable and set preboot var with fdtfile evaluation.
preboot will be checked and run immediately before starting the
CONFIG_BOOTDELAY countdown and/or running the auto-boot command resp.
entering interactive mode.

This provides possibility to use different boot cmds in interactive mode
without manual setting fdtfile value, as it it's already evaluated
before entering interactive mode.

Fixes: a62c60610f("colibri_imx7_emmc: add Colibri iMX7D 1GB (eMMC) module support")
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
2020-09-17 14:39:09 +02:00
Igor Opaniuk
3ab2316a99 colibri_vf: use preboot for fdtfile evaluation
Enable and set preboot var with fdtfile evaluation.
preboot will be checked and run immediately before starting the
CONFIG_BOOTDELAY countdown and/or running the auto-boot command resp.
entering interactive mode.

This provides possibility to use different boot cmds in interactive mode
without manual setting fdtfile value, as it it's already evaluated
before entering interactive mode.

Fixes: 304042c1f3("colibri_vf: set fdtfile for distroboot")
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
2020-09-17 14:39:09 +02:00
Igor Opaniuk
2f310b7f48 colibri-imx6ull: use preboot for fdtfile evaluation
Enable and set preboot var with fdtfile evaluation.
preboot will be checked and run immediately before starting the
CONFIG_BOOTDELAY countdown and/or running the auto-boot command resp.
entering interactive mode.

This provides possibility to use different boot cmds in interactive mode
without manual setting fdtfile value, as it it's already evaluated
before entering interactive mode.

Fixes: board: 31b1e17f44("toradex: add Colibri iMX6ULL support")
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
2020-09-17 14:39:09 +02:00
Igor Opaniuk
b4c9cd6875 colibri_imx7: wrap video specific funcs with ifdefs
Wrap video specific functionality with ifdefs.

Fixes: 195011b24d("colibri-imx7: fix splash logo drawing")
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
2020-09-17 14:39:09 +02:00
Igor Opaniuk
e6fd30dd9e toradex: drop legacy show_boot_logo function and use splashscreen
Drop show_boot_logo legacy function, as splashscreen functionality can
be used instead.

Fixes: d324189772("toradex: common: show boot logo")
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
2020-09-17 14:39:09 +02:00
Igor Opaniuk
1310660f5c colibri_imx7: use splashcreen value instead of legacy function
Set proper splashscreen env value instead of calling legacy function
to show embed boot logo.

Fixes: 195011b24d("colibri-imx7: fix splash logo drawing")
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
2020-09-17 14:39:09 +02:00
Igor Opaniuk
f37aab99f2 colibri-imx6ull: use splashcreen value instead of legacy function
Set proper splashscreen env value instead of calling legacy function
to show embed boot logo.

Fixes: 391c712dde("colibri-imx6ull: show boot logo")
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
2020-09-17 14:39:09 +02:00
Heinrich Schuchardt
c6963fb88f doc: qemu: debug UART settings for QEMU ARM virt
Provide the settings for the debug UART on the QEMU ARM virt board.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-09-16 16:54:00 -04:00
Miquel Raynal
c4d0384a4a MAINTAINERS: add myself as reviewer for SquashFS
I also followed the development of the SquashFS support in U-Boot
as part of Joao Marcos internship, so I would also appreciate receiving
new contributions and bug reports related to this topic.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2020-09-16 16:54:00 -04:00
Thomas Petazzoni
42ef2edc85 MAINTAINERS: add myself as reviewer for SquashFS
As I have followed the development of the SquashFS support in U-Boot
as part of Joao Marcos work, it makes sense to get Cc'ed on
contributions/bug reports related to the squashfs support.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
2020-09-16 16:54:00 -04:00
Marek Vasut
81d0cef3b2 lib: fdt: Fix fdtdec_setup_mem..() conversion to livetree API
Repair incorrectly negated condition in the original patch which broke
DT memory node parsing on everything which has more than one DT memory
node, e.g. R-Car3.

In case multiple valid memory nodes are present in the DT, the original
patch would complete parsing cycle for the first memory node, then move
on to the next one, identify it as a valid, and end the parsing. The fix
is to invert the condition, to make the code behave as it did before the
livetree conversion, so it would continue parsing the subsequent memory
nodes as well.

Fixes: c2f0950c33 ("lib: fdt: Convert fdtdes_setup_mem..() to livetree API")
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Tested-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Michal Simek <michal.simek@xilinx.com>
2020-09-16 16:54:00 -04:00
Thirupathaiah Annapureddy
7def4e621b include: phy: fix NULL pointer check in phy_write()
phy_write() uses bus->write() instead of bus->read(). This means NULL
pointer pre-check needs to happen on bus->write instead of bus->read.

Signed-off-by: Thirupathaiah Annapureddy <thiruan@linux.microsoft.com>
Reviewed-by: Michal Simek <michal.simek@xilinx.com>
2020-09-16 16:54:00 -04:00
Baruch Siach
a8a71c9488 MAINTAINERS: update clk entry git tree
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
2020-09-16 16:54:00 -04:00
Tom Rini
b01ba776c9 Merge tag 'efi-2020-10-rc5' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi
Pull request for UEFI sub-system for efi-2020-10-rc5

The following bugs are fixed:

* unaligned access in br_i32_decode()
* missing restore of global data pointer in UEFI selftest
* missing restore of global data pointer on RISC-V in UEfI subsystem
* efi_var_mem_notify_exit_boot_services() should not be __efi_runtime
2020-09-16 08:08:06 -04:00
Tom Rini
0487bb5ecd Merge tag 'u-boot-rockchip-20200916' of https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip
- Fix rv1108 grf access issue
- make_fit_atf: ignore empty PT_LOAD segment
2020-09-16 08:07:49 -04:00
Heinrich Schuchardt
5b861eea79 rockchip: make_fit_atf: ignore empty PT_LOAD segment
The linker sometimes creates PT_LOAD segments with length (p_filesz) zero
as described in https://man7.org/linux/man-pages/man5/elf.5.html. This
leads to build failures. We should ignore empty segments.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Tested-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-09-16 16:41:30 +08:00
Kever Yang
454b792afe rockchip: rv1108: enable board early init
Enable board early init callback to init board specific hardware.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2020-09-16 16:32:01 +08:00
Kever Yang
fe4931c09a rockchip: rv1108: Enable grf as pre-reloc node
The grf node will be used before relocate, enable it in dts.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2020-09-16 16:31:18 +08:00
Kever Yang
f11f138ebf rockchip: rv1108: use correct API for board callback
Use board_early_init_f() instead of mach_cpu_init() for board, the
board_early_init_f() is used for board init and after dm_initf, while
the mach_cpu_init() is used for CPU/SOC and before dm_initf()(not able
to use syscon API).

Fixes: 9cec336708 ("rockchip: evb-rv1108: Use syscon API to get grf base")
Fixes: 4aa33690fc {"rockchip: elgin-rv1108: Use syscon API to get grf base")

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2020-09-16 16:31:17 +08:00
Tom Rini
4dcced1169 Merge tag 'mmc-2020-9-15' of https://gitlab.denx.de/u-boot/custodians/u-boot-mmc
- Use mmc_of_parse for msm_sdhci
- Add missing common host caps for xenon_sdhci.
2020-09-15 08:59:32 -04:00
Marek Vasut
0e12575645 Azure/GitLab/Travis: Add SH4 r2dplus machine with various PCI ethernet options
Add SH4 R2Dplus machine configured to test various U-Boot PCI ethernet
options -- RTL8139, EEPRO100, AMD PCnet, DEC Tulip.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-09-15 08:59:06 -04:00
Andre Heider
e79c59c0e2 mmc: xenon_sdhci: Add missing common host capabilities
Use mmc_of_parse() to set the common host properties. That includes
"bus-width", so parsing it can be removed from the driver.

But more importantly, "non-removable" is now respected, which fixes
the usage of eMMC.

Signed-off-by: Andre Heider <a.heider@gmail.com>
Reviewed-by: Konstantin Porotchkin <kostap@marvell.com>
Tested-by: Marek Behún <marek.behun@nic.cz>
2020-09-15 10:15:56 +08:00
Manivannan Sadhasivam
8505147403 mmc: msm_sdhci: Use mmc_of_parse for setting host_caps
Since the introduction of 'get_cd' callback in sdhci core,
dragonboard410c's MMC interface is broken. It turns out that 'get_cd'
callback checks for the host_caps for validating the chip select. And
since the msm_sdhci driver is not parsing the host_caps from DT, not
all of the cababilities are parsed properly. This results in the MMC
interfaces to be broken.

Hence, fix this by adding a call to 'mmc_of_parse' during driver probe.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Tested-by: Aníbal Limón <anibal.limon@linaro.org>
Reviewed-By: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2020-09-15 10:13:37 +08:00
Heinrich Schuchardt
5bf12a7859 efi_selftest: restore gd before do_reset()
Before calling do_reset() in the EFI selftest we must restore the global
data pointer.

Fixes: fa63753f86 ("efi_selftest: substitute ResetSystem() by do_reset()")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-09-14 23:28:52 +02:00
Heinrich Schuchardt
d68d7f47a9 efi_loader: save global data pointer on RISC-V
On RISC-V the global data pointer is stored in register gp. When a UEFI
binary calls the EFI API we have to restore it.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-09-14 23:28:52 +02:00
Heinrich Schuchardt
6b9966e1aa riscv: define function set_gd()
Function set_gd() is needed in the UEFI sub-system if the global data
pointer is stored in a register.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-09-14 23:28:52 +02:00
Heinrich Schuchardt
e5a31376ac efi_loader: efi_var_mem_notify_exit_boot_services
efi_var_mem_notify_exit_boot_services() is invoked when ExitBootServices()
is called by the UEFI payload.

efi_var_mem_notify_exit_boot_services() should not be defined as
__efi_runtime as it is invoking EFI_ENTRY() and EFI_EXIT() which themselves
are not __efi_runtime.

Fixes: f1f990a8c9 ("efi_loader: memory buffer for variables")
Fixes: e01aed47d6 ("efi_loader: Enable run-time variable support for tee based variables")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2020-09-14 23:28:52 +02:00
Robert Reither
8479333ce7 rsa: crash in br_i32_decode() called from rsa_gen_key_prop()
Fixes problem for unaligned 32bit big-endian access in
lib/rsa/rsa-keyprop.c.

Exchanges br_i32_decode() with get_unaligned_be32().

This will keep the unaligned access for architectures capable and will do
some byte-shift magic for the not so capable ones.

Reported-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-by: Robert Reither <robert.reither@external.thalesgroup.com>
Remove unused include.
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-09-14 23:28:52 +02:00
Tom Rini
00e5fda006 Merge branch '2020-09-12-assorted-bugfixes'
- A large assortment of minor fixes
- Documentation improvements
2020-09-14 15:39:46 -04:00
Heinrich Schuchardt
185440ffc4 test: do no assume hush parser in validate_empty()
The environment variable test uses function validate_empty() to check that
a variable is not defined. If the hush parser is not enabled, we cannot
refer to a variable by $var_name but only by ${var_name}.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: Stephen Warren <swarren@nvidia.com>
2020-09-12 10:53:01 -04:00
Heinrich Schuchardt
9a97314b5b Makefile: mrproper shall delete doc/output/
HTML documentation is generated in doc/output/. This directory shall be
deleted by 'make mrproper'

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-09-12 10:53:01 -04:00
Heinrich Schuchardt
70e38eea3a doc: describe building with GCC
Provide a description of the U-Boot build process with GCC in the HTML
documentation.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-09-12 10:53:01 -04:00
Heinrich Schuchardt
2974ba4f65 doc: describe source repository
Add a chapter to the HTML documentation describing how to retrieve the
U-Boot sources.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-09-12 10:53:01 -04:00
Mingming Lee
75fb7b9163 ARM: MediaTek: amend IC description for MediaTek MT8512
The description for MT8512  has some mistake, so correct it.

Signed-off-by: Mingming Lee <Mingming.Lee@mediatek.com>
2020-09-12 10:53:01 -04:00
Reuben Dowle
eb39d8ba5f Fix data abort caused by mis-aligning FIT data
Attempting to place device tree immediately after an image in memory can lead
to mis-aligned data accesses if that image size is not divisible by the
alignment requirements of the architecture.

Data aborts caused by this were observed on a custom Marvel A388 based system,
where the image was a uboot FIT file. The total size varies depending on the
uboot device tree size, which does not always lead to correct alignment.

The minimum alignment specified for ARM [1] and ARM64 [2] linux booting has been
used

[1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/arm/booting.rst#n126
[2] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/arm64/booting.rst#n45

Signed-off-by: Reuben Dowle <reuben.dowle@4rf.com>
2020-09-11 17:13:56 -04:00
T Karthik Reddy
1e2c5bb9e7 mtd: nand: Fix nand write error with bad block addresses above 32-bit
Nand writes should skip the bad blocks with "nand write" command.
In case of bad blocks with above 32-bit address, nand_block_isbad()
returns false due to truncated bad block address.

In below code segment,

	if (nand_block_isbad(mtd, offset & ~(mtd->erasesize - 1)))

offset is 64-bit and mtd->erasesize is 32-bit, hence the truncation is
happening. Cast 'mtd->erasesize' with loff_t to fix this issue.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-09-11 17:13:56 -04:00
Pedro Aguilar
142775a52b env: Crash in 'env import' when using checksum and a specific size
This patch adds a sanity check that avoids 'size' to overflow and crash when
importing an environment that contains a checksum. Example with the wrong size
that causes the crash:

=> env import -c 0x4100000 3 v1

This assumes that v1 has already been successfully exported with
'env export -c -s 0x100 0x4100000 v1'

Signed-off-by: Pedro Aguilar <pedro.aguilar@vimar.com>
2020-09-11 17:13:56 -04:00
Heinrich Schuchardt
21d3946840 bootm: update image OS image size when decompressing
In bootm_load_os() the OS image is decompressed. In later stages of the
boot process we need the decompressed size of the image.

Update images->os.image_len after decompression.

Passing the correct size is necessary if we want to check loaded EFI
binararies for file truncation by comparing the loaded size to the header
field SizeOfImage.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-09-11 17:13:56 -04:00
Michal Simek
91b735d11f common: Kconfig: Add dependency for default variables strings
Kconfig provides several config options for setting up default variables
but these are unused when variables are passed to U-Boot via file.
That's why cover this dependency in Kconfig.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-09-11 17:13:55 -04:00
Chuanjia Liu
9250d0bad5 PCI: mediatek: Release the resource when PCIe enable port fail
On the mt7623 platform, if one port enable fail and other port
enable succeed. It will hang on when using pci enum
because the resource was not released correctly.

Signed-off-by: Chuanjia Liu <Chuanjia.Liu@mediatek.com>
Tested-by: Frank Wunderlich <frank-w@public-files.de>
2020-09-10 15:32:09 -04:00
Tom Rini
3dd52dd69e Merge tag 'u-boot-amlogic-20200910' of https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic
- enables HDMI output & USB keyboard for Odroid-N2
- setups HDMI output background & enables USB keyboard
2020-09-10 09:04:02 -04:00
Anand Moon
92f10e6135 configs: odroid-c4: update for HDMI output background & USB keyboard
Enable options SYS_WHITE_ON_BLACK to permit HDMI background
screen from white to back, also enable USB_KEYBOARD.

Signed-off-by: Anand Moon <linux.amoon@gmail.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2020-09-10 10:51:36 +02:00
Anand Moon
3b3c048697 configs: odroid-n2: update for HDMI output & USB keyboard
Enable options to permit HDMI output on Odroid-N2 G12B boards.
Enable VPU Power Domain.
Enable USB_KEYBOARD.

Signed-off-by: Anand Moon <linux.amoon@gmail.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2020-09-10 10:51:36 +02:00
Tom Rini
a34746b86e Merge tag 'u-boot-stm32-20200909' of https://gitlab.denx.de/u-boot/custodians/u-boot-stm
- fixes on AV96 board: pull up on UART4 RX and adjust PLL4
2020-09-09 12:59:02 -04:00
Marek Vasut
b6055945d6 ARM: dts: stm32: Adjust PLL4 settings on AV96 again
PLL4Q is supplying both FDCAN and LTDC. In case HDMI is in use, the
50 MHz generated from PLL4Q cannot be divided well enough to produce
accurate clock for HDMI pixel clock. Adjust it to generate 74.25 MHz
instead. The PLL4P/PLL4R are generating 99 MHz instead of 100 MHz,
which is in tolerance for the SDMMC.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Gerald Baeza <gerald.baeza@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-09-09 15:02:23 +02:00
Marek Vasut
43e2d1dd47 ARM: dts: stm32: Pull UART4 RX high on AV96
There is no dedicated pull resistor on the AV96 UART4 (console UART)
pin. In case there is no UART adapter installed on the AV96, the line
is floating and can trigger reception of garbage characters, which in
turn can abort U-Boot autoboot. Add default pull up to mitigate this
problem.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-09-09 15:01:53 +02:00
Patrick Delaunay
cf8df34015 arm: stm32mp: cleanup test on eth_env_set_enetaddr result
Remove the unnecessary inversion on the eth_env_set_enetaddr() result which
only make complex the code of setup_mac_address() and display an invalid
value in the associated pr_err.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Marek Vasut <marex@denx.de>
2020-09-09 14:19:12 +02:00
Tom Rini
a14b71d0c2 Merge tag 'rpi-next-2020.10.2' of https://gitlab.denx.de/u-boot/custodians/u-boot-raspberrypi
- fixes for bcmgenet
- enable USB keyboard for RPi4 32 bit
2020-09-09 08:17:53 -04:00
Matthias Brugger
40877a1a94 config: Enable USB Keyboard suuport on RPi4 32 bit
Supporting USB keyboards out of the box is both handy for development
and production. Notably if u-boot is used to boot into GRUB. This patch
adds USB keyboard support for 32 bit RPi4 config.

Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2020-09-08 16:45:01 +02:00
Jason Wessel
34873f46ba bcmgenet: Add support for rgmii-rxid
The commit 57805f2270 ("net: bcmgenet: Don't set ID_MODE_DIS when
not using RGMII") needed to be extended for the case of using the
rgmii-rxid.  The latest version of the Rasbperry Pi4 dtb files for the
5.4 now specify the rgmii-rxid.

Signed-off-by: Jason Wessel <jason.wessel@windriver.com>
Tested-by: Petr Tesarik <ptesarik@suse.com>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2020-09-08 16:43:48 +02:00
Jason Wessel
ac458dc823 bcmgenet: fix DMA buffer management
This commit fixes a serious issue occurring when several network
commands are run on a raspberry pi 4 board: for instance a "dhcp"
command and then one or several "tftp" commands. In this case,
packet recv callbacks were called several times on the same packets,
and send function was failing most of the time.

note: if the boot procedure is made of a single network
command, the issue is not visible.

The issue is related to management of the packet ring buffers
(producer / consumer) and DMA.
Each time a packet is received, the ethernet device stores it
in the buffer and increments an index called RDMA_PROD_INDEX.
Each time the driver outputs a received packet, it increments
another index called RDMA_CONS_INDEX.

Between each pair of network commands, as part of the driver
'start' function, previous code tried to reset both RDMA_CONS_INDEX
and RDMA_PROD_INDEX to 0. But RDMA_PROD_INDEX cannot be written from
driver side, thus its value was actually not updated, and only
RDMA_CONS_INDEX was reset to 0. This was resulting in a major
synchronization issue between the driver and the device. Most
visible behavior was that the driver seemed to receive again the
packets from the previous commands (e.g. DHCP response packets
"received" again when performing the first TFTP command).

This fix consists in setting RDMA_CONS_INDEX to the same
value as RDMA_PROD_INDEX, when resetting the driver.

The same kind of fix was needed on the TX side, and a few variables
had to be reset accordingly (c_index, tx_index, rx_index).

The rx_index and tx_index have only 256 entries so the bottom 8 bits
must be masked off.

Originated-by: Etienne Dublé <etienne.duble@imag.fr>
Signed-off-by: Jason Wessel <jason.wessel@windriver.com>
Tested-by: Petr Tesarik <ptesarik@suse.com>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2020-09-08 16:43:02 +02:00
Tom Rini
96d66a9b8c Prepare v2020.10-rc4
Signed-off-by: Tom Rini <trini@konsulko.com>
2020-09-07 14:17:33 -04:00
Tom Rini
a475ad7f9e configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2020-09-07 14:05:55 -04:00
Tom Rini
06193ca210 Merge tag 'efi-2020-10-rc4' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi
Pull request for UEFI sub-system for efi-2020-10-rc4

Bug fixes are provided in the following areas:

* convert file system debug and print messages go log messages
* convert UEFI booting messages to log messages
* UEFI related code clean up and simplification
2020-09-07 08:49:50 -04:00
Heinrich Schuchardt
d2a885720b efi_selftest: simplify Makefile
CONFIG_EFI_LOADER cannot be selected for ARMv7-M CPUs. So don't check it in
the Makefile.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-09-06 21:21:41 +02:00
Heinrich Schuchardt
578d7cc8fa efi_loader: remove duplicate image size check
The image size is checked in efi_load_pe(). Avoid checking it twice.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-09-06 21:21:41 +02:00
Heinrich Schuchardt
5b94e26f1a efi: clean up efi command
* Eliminate superfluous enum value EFI_TABLE_END.
* Use correct variable type for the memory type.
* Check validity of memory type.
* Make efi_build_mem_table static.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-09-06 21:21:41 +02:00
Heinrich Schuchardt
0f7878b853 efi_loader: error message if image not authenticated
Currently if the bootefi command fails due to missing authentication, the
user gets no feedback.

Write a log message 'Image not authenticated' if LoadImage() fails due to
missing authentication.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-09-06 21:21:41 +02:00
Heinrich Schuchardt
24586059d3 efi_loader: log function in image loader
Use log_err() for error messages.
Replace debug() by EFI_PRINT().

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-09-06 21:21:41 +02:00
Heinrich Schuchardt
c2f010393b efi_loader: log messages for bootefi command
Write log messages when booting via the bootefi command to allow tracking
on the syslog server. Example messages are

    Booting /snp.efi

or

    Booting /MemoryMapped(0x0,0x4fe00000,0x35a40)
    Loading image failed

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-09-06 21:21:41 +02:00
Heinrich Schuchardt
0d32d8cf9d fs: convert error and debug messages to log
Use log functions for error and debug messages of the file-system.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-09-06 21:21:41 +02:00
Tom Rini
e5df264e7a Merge https://gitlab.denx.de/u-boot/custodians/u-boot-marvell
- Fix SATA issue on Armada 3720
- Enable more SPI NOR chips in espressobin defconfig
2020-09-04 10:09:14 -04:00
Konstantin Porotchkin
3e5420e99a defconfig: espressobin: Add support for ISSI SPI flashes
Enable support of ISSI SPI flashes found on EspressoBIN boards

Change-Id: I6de61c48f108fb4f410f321b9db45887d23212e5
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Reviewed-on: http://vgitil04.il.marvell.com:8080/61455
Tested-by: iSoC Platform CI <ykjenk@marvell.com>
Reviewed-by: Grzegorz Jaszczyk <jaz@semihalf.com>
Reviewed-by: Stefan Chulski <stefanc@marvell.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-09-04 14:02:00 +02:00
Konstantin Porotchkin
2f8cfd030e defconfig: espressobin: Include support for Gigadevice SPI
Include support for CONFIG_SPI_FLASH_GIGADEVICE for supporting
newly produces EspressoBin boards (v7)

Change-Id: I5d4b972cbe2ee5a9d52ce9908794ad4e1b59ee3b
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Reviewed-on: http://vgitil04.il.marvell.com:8080/61236
Tested-by: iSoC Platform CI <ykjenk@marvell.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-09-04 14:02:00 +02:00
zachary
7757c85199 phy: marvell: a3700: add sata comphy on lane 2 with invert option
- This patch moves sata phy powerup from dedicate phy to compphy
  and adds invert option for sata powerup routine.

Change-Id: I1b4e8753e2b2c14c6efa97bca2ffc7d2553d8a90
Signed-off-by: zachary <zhangzg@marvell.com>
Signed-off-by: Ken Ma <make@marvell.com>
Reviewed-on: http://vgitil04.il.marvell.com:8080/53601
Reviewed-by: Igal Liberman <igall@marvell.com>
Tested-by: Igal Liberman <igall@marvell.com>
[a.heider: adapt to mainline]
Signed-off-by: Andre Heider <a.heider@gmail.com>
Tested-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-09-04 14:02:00 +02:00
Tom Rini
9bfb567e5f Merge branch 'master' of git://git.denx.de/u-boot-usb
- Mostly DFU fixes and r8152 fixes
2020-09-03 09:48:28 -04:00
Tom Rini
7f4d3c0445 Merge branch 'master' of git://git.denx.de/u-boot-sh
- SH serial bugfix
2020-09-03 09:00:35 -04:00
Tom Rini
f766e8bced Merge branch 'for-tom' of https://github.com/lftan/u-boot
- SoCFPGA bugfix
2020-09-03 08:59:16 -04:00
Chee Hong Ang
6b6307ed22 arm: socfpga: soc64: Check FPGA Config status register before bridge reset
Instead of querying SDM for FPGA configuration status through mailbox
messages, U-Boot now checks System Manager's FPGA Config status register
for FPGA configuration status before resetting bridge.

Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
2020-09-03 11:26:07 +08:00
Tom Rini
7149077353 Azure/GitLab: Update to latest Docker container
- New base snapshot
- Fix for high UID/GID numbers on a toolchain

Signed-off-by: Tom Rini <trini@konsulko.com>
2020-09-02 09:22:29 -04:00
Tom Rini
502f0489f1 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-x86
- Fix parsing of "mtrr list" command
- Introduce USE_EARLY_BOARD_INIT option and remove dead codes for most
  x86 boards
2020-09-01 11:02:54 -04:00
Gary Bisson
293a6dfeb9 fastboot: getvar: fix partition-size return value
The size returned by 'getvar partition-size' should be in bytes, not in
blocks as fastboot uses that value to generate empty partition when
running format [1].

Note that the function was already returning the proper size in bytes
for NAND devices (see struct part_info details).

[1]
https://android.googlesource.com/platform/system/core/+/refs/heads/android10-release/fastboot/fastboot.cpp#1500

Signed-off-by: Gary Bisson <gary.bisson@boundarydevices.com>
2020-09-01 14:47:43 +02:00
yurii.pidhornyi
64af06ce91 fastboot: Fix fastboot reboot fail by changing functions order
It was revealed that when the fastboot_tx_write_str function is called
without the previously initialized fastboot_func->in_req->complete field,
a copy of in_req will be sent to the I/O requests queue without
an initialized field.

Moving a piece of code with the initializing of the
fastboot_func->in_req->complete field above transmit_tx allows to solve
this problem.

Fixes: 65c96757fe "usb: fastboot: Convert USB f_fastboot to shared fastboot"
Signed-off-by: yurii.pidhornyi <yurii.pidhornyi@globallogic.com>
2020-09-01 14:47:43 +02:00
Sherry Sun
405217a033 f_sdp: Change bInterval of interrupt endpoint to 3
Since the USB HID limits the maximum bandwidth(3072) for interrupt
endpoint transfers, when the bInterval set to 1, we can only support 3
boards to run sdp at the same time. In order to support more boards,
change the bInterval of interrupt endpoint to 3, which will not affect
the transmission speed.

Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Sherry Sun <sherry.sun@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-09-01 14:47:43 +02:00
Sherry Sun
9e06c5c55a f_sdp: Add EP1_OUT as default data receive pipe in sdp
EP0 has been used to transfer file data in sdp before, but the max
packetsize of ep0 is 64 bytes. So in order to improve the file transfer
speed, here add the EP1_OUT interrupt endpoint which max packetsize is
set to 1024 byte.

After testing, it turns out that using ep1out is twice as fast as using
ep0 while receiving data in sdp.

Signed-off-by: Sherry Sun <sherry.sun@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-09-01 14:47:43 +02:00
Peng Fan
27c803848b spl: add g_dnl_get_board_bcd_device_number
Add g_dnl_get_board_bcd_device_number, the new BCD value is used by uuu to distinguish
if the SPL supports the SDPV.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
2020-09-01 14:47:43 +02:00
Peng Fan
b0e9f3e593 f_sdp: Support searching and loading FIT or container image
Add support to f_sdp to search and load iMX8 container image or iMX8M
FIT image by new UUU command SDPV.

When using the SDPV, the uuu will continue to send out data after first
level boot loader used by ROM. This means uuu won't skip to the offset
of the second boot loader, and the padding data before second boot loader
will be sent out. So we have to search the FIT header or container header
in the buffer that SDP received.

Also change to more common method to exit f_sdp handler not depending on
SPL_FIT_FOUND flag because container loader won't set this.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-09-01 14:47:43 +02:00
Ye Li
5dee7f0b02 f_sdp: Fix wrong usb request size
Because the buffer length of sdp usb request is 65, we have to allocate
65 bytes not 64 bytes. Otherwise there is potential buffer overflow.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
2020-09-01 14:47:43 +02:00
Ye Li
d10d429112 f_sdp: Add high speed endpoint descriptor
Add HS endpoint descriptor for SDP. So that we can use high speed endpoint,
and the SDP device can send packet with 512 byte size.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
2020-09-01 14:47:43 +02:00
Frank Li
0ced2faba0 sdp: call board_usb_init at spl_sdp_load_image
Need initialize UDC before run sdp download

Signed-off-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-09-01 14:47:43 +02:00
Jassi Brar
7ed4eac43d usb: max3420: add the gadget driver
MAX3420 implements FullSpeed USB Device over SPI.
Another version MAX3421, also implements USB Host mode.
This driver should be good for the device mode of max3421 as well.

Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2020-09-01 14:47:43 +02:00
Roman Kovalivskyi
0ebf9842e5 fastboot: Add default fastboot_set_reboot_flag implementation
Default implementation of fastboot_set_reboot_flag function that depends
on "bcb" commands could be used in general case if there are no need to
make any platform-specific implementation, otherwise it could be
disabled via Kconfig option FASTBOOT_USE_BCB_SET_REBOOT_FLAG.

Please note that FASTBOOT_USE_BCB_SET_REBOOT_FLAG is mutually exclusive
with some platforms which already have their own implementation of this
function.

Signed-off-by: Roman Kovalivskyi <roman.kovalivskyi@globallogic.com>
2020-09-01 14:47:43 +02:00
Roman Kovalivskyi
2b2a771b40 fastboot: Add support for 'reboot fastboot' command
Android 10 adds support for dynamic partitions and in order to support
this userspace fastboot must be used[1]. New tool fastbootd is
included into recovery.

Userspace fastboot works from recovery and is launched if:
1) - Dynamic partitioning is enabled
2) - Boot control block has 'boot-fastboot' value into command field
The bootloader is expected to load and boot into the recovery image
upon seeing boot-fastboot in the BCB command. Recovery then parses the
BCB message and switches to fastbootd mode[2].

Please note that boot script is expected to handle 'boot-fastboot'
command in BCB and load into recovery mode.

Bootloader must support 'reboot fastboot' command which should reboot
device into userspace fastboot to accomodate those changes[3].

Another command that bootloader must support[3] is 'reboot recovery'. This
command should simply reboot device into recovery mode.

[1] - https://source.android.com/devices/bootloader/fastbootd
[2] - https://source.android.com/devices/bootloader/fastbootd#unified_fastboot_and_recovery
[3] - https://source.android.com/devices/bootloader/fastbootd#modifications_to_the_bootloader

Signed-off-by: Roman Kovalivskyi <roman.kovalivskyi@globallogic.com>
Signed-off-by: Roman Stratiienko <r.stratiienko@gmail.com>
Change-Id: I9d2bdc9a6f6f31ea98572fe155e1cc8341e9af76
2020-09-01 14:47:43 +02:00
Roman Kovalivskyi
851737ab89 fastboot: Extend fastboot_set_reboot_flag with reboot reason
Extend fastboot_set_reboot_flag arguments with reboot reason so that
it could handle different reboot cases in future.

Signed-off-by: Roman Kovalivskyi <roman.kovalivskyi@globallogic.com>
2020-09-01 14:47:43 +02:00
Heinrich Schuchardt
73f4ebb659 dfu: fix dfu tftp on sandbox
The environment variable loadaddr is in the virtual address space of the
sandbox. To get the actual memory address where the FIT image has been
loaded we have to convert this address according to the memory mapping of
the sandbox.

Equally the addresses in the *.its file have to be converted when used in
the dfu_ram driver.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-09-01 14:47:43 +02:00
Heinrich Schuchardt
9337037518 configs: qemu: enable dfu testing
For testing automated updates via dfu and mtd we need the dfu and mtd
commands as well as preboot support.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-09-01 14:47:43 +02:00
Heinrich Schuchardt
40c79420d0 dfu: DFU_MTD depends on CMD_MTDPARTS
Function mtdparts_init() is needed for the DFU MTD driver.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-09-01 14:47:43 +02:00
Heinrich Schuchardt
4e620eb98b dfu: fix typo parameteres
%s/parameteres/parameters/g

Even if a line exceeds 80 characters we should not split output strings
to make debugging easier.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-09-01 14:47:43 +02:00
Filip Brozovic
a17c0cb85e fastboot: Support defining raw partitions without a partition table
Add support for defining raw fastboot partitions in eMMC by specifying
the offset and size in an environment variable. Optionally, the eMMC
hardware partition number may also be specified.

This makes it possible to e.g. update only part of the eMMC boot
partition, instead of having to write the entire partition.

Signed-off-by: Filip Brozovic <fbrozovic@gmail.com>
2020-09-01 14:47:43 +02:00
Ye Li
1468a1cc72 usb: ci_udc: Add function to remove usb device
When unregister gadget driver in ci_udc, the usb device is not
removed or stop. This causes next "usb start" fails to work.

Add a new interface "usb_remove_ehci_gadget" in usb-uclass to
remove the usb device for DM driver. Using "usb_lowlevel_stop" for
non-DM driver.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-09-01 14:47:43 +02:00
Ye Li
213fa47dac usb: gadget: Fix controller index in UMS
The usb mass storage (f_mass_storage.c) uses fixed usb index 0,
this causes problem while CDNS3 USB controller index is 1.
Modify the API of fsg to pass the controller index.

Reviewed-by: Jun Li <jun.li@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-09-01 14:47:43 +02:00
Hayes Wang
3a41086f6a eth/r8152: support RTL8153B/RTL8154B
This is used to support RTL8153B and RTL8154B.

Signed-off-by: Hayes Wang <hayeswang@realtek.com>
2020-09-01 14:47:36 +02:00
Hayes Wang
9f6142aa0a eth/r8152: modify rtl_clear_bp function
The original rtl_clear_bp() is used to clear the firmware of both
PLA and USB MCU. The new one could clear the firmware of PLA or
USB independently. It is unnecessary to clear firmware, if there
is no one to be updated.

Besides, clear the firmware by writing the relative registers in
bulk.

Signed-off-by: Hayes Wang <hayeswang@realtek.com>
2020-09-01 14:47:36 +02:00
Hayes Wang
16b9417b6a eth/r8152: reset PHY after setting it
Some settings of PHY have to work after resetting PHY.

Signed-off-by: Hayes Wang <hayeswang@realtek.com>
2020-09-01 14:47:36 +02:00
Hayes Wang
d74a76234f eth/r8152: reset bmu after disabling Tx/Rx
Reset bmu after disabling Tx/Rx. This is used to clear the FIFO of
Tx/Rx. The remained data may be transferred after Tx/Rx is re-enabled.
And it results in garbage data.

Signed-off-by: Hayes Wang <hayeswang@realtek.com>
2020-09-01 14:47:36 +02:00
Marek Vasut
f5ba5c90d4 serial: sh: Improve FIFO empty check on RX
If the SCIF is receiving data quickly enough, it may happen that the
SCxSR_RDxF flag is cleared in sh_serial_getc_generic(), while the
FIFO still contains data. If that happens, the serial_getc_check()
reports no data in the FIFO as the flag is no longer set. Add one
more check, if the SCxSR_RDxF is not set, read out the FIFO level
and if there are still characters in the FIFO, permit reading them
out.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2020-09-01 14:46:41 +02:00
Simon Glass
1150a0b6bd x86: Drop nhlt_serialise()
This function is not actually used in U-Boot. Drop it.

Suggested-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-09-01 17:00:28 +08:00
Simon Glass
0a0cdeceec x86: pinctrl: Fix 'relatove' typo
Fix this typo in the Kconfig help.

Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-09-01 17:00:27 +08:00
Andy Shevchenko
365a581c1c x86: qemu: Remove dead code
start.S does nothing and can be safely removed. Makefile is still being used
by the build system, so simply replace the rule in it. We use stub C-file
like it's done for other boards.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-09-01 17:00:27 +08:00
Andy Shevchenko
c2addf9fc1 x86: intel: slimbootloader: Remove dead code
start.S does nothing and can be safely removed. Makefile is still being used
by the build system, so simply drop the rule from it.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Aiden Park <aiden.park@intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-09-01 13:38:41 +08:00
Andy Shevchenko
886bce1275 x86: intel: minnowmax: Remove dead code
start.S does nothing and can be safely removed. Makefile is still being used
by the build system, so simply drop the rule from it.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-09-01 13:38:41 +08:00
Andy Shevchenko
9278031ae5 x86: intel: galileo: Remove dead code
start.S does nothing and can be safely removed. Makefile is still being used
by the build system, so simply drop the rule from it.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-09-01 13:38:41 +08:00
Andy Shevchenko
b2253bcaa7 x86: intel: edison: Remove dead code
start.S does nothing and can be safely removed. Makefile is still being used
by the build system, so simply drop the rule from it.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-09-01 13:38:40 +08:00
Andy Shevchenko
e5de5e0625 x86: intel: crownbay: Remove dead code
start.S does nothing and can be safely removed. Makefile is still being used
by the build system, so simply drop the rule from it.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-09-01 13:38:40 +08:00
Andy Shevchenko
41a93718d8 x86: intel: cougarcanyon2: Remove dead code
start.S does nothing and can be safely removed. Makefile is still being used
by the build system, so simply drop the rule from it.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-09-01 13:38:40 +08:00
Andy Shevchenko
d196c18bc8 x86: intel: cherryhill: Remove dead code
start.S does nothing and can be safely removed. Makefile is still being used
by the build system, so simply drop the rule from it.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-09-01 13:38:39 +08:00
Andy Shevchenko
a97e6af422 x86: intel: bayleybay: Remove dead code
start.S does nothing and can be safely removed. Makefile is still being used
by the build system, so simply drop the rule from it.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-09-01 13:38:39 +08:00
Andy Shevchenko
2a2470eba8 x86: efi: efi-x86_payload: Remove dead code
start.S does nothing and can be safely removed. Makefile is still being used
by the build system, so simply drop the rule from it.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-09-01 13:38:39 +08:00
Andy Shevchenko
9f082a8adc x86: dfi: dfi-bt700: Remove dead code
start.S does nothing and can be safely removed. Makefile is still being used
by the build system, so simply drop the rule from it.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-09-01 13:38:39 +08:00
Andy Shevchenko
85759d04cf x86: coreboot: Remove dead code
start.S does nothing and can be safely removed. Makefile is still being used
by the build system, so simply drop the rule from it.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-09-01 13:38:38 +08:00
Andy Shevchenko
ebb2818bcb x86: congatec: conga-qeval20-qa3-e3845: Remove dead code
start.S does nothing and can be safely removed. Makefile is still being used
by the build system, so simply drop the rule from it.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-09-01 13:38:38 +08:00
Andy Shevchenko
45e2340d53 x86: advantech: som-db5800-som-6867: Remove dead code
start.S does nothing and can be safely removed. Makefile is still being used
by the build system, so simply drop the rule from it.

Cc: George McCollister <george.mccollister@gmail.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-09-01 13:38:38 +08:00
Andy Shevchenko
1d01d0c2f0 x86: Introduce USE_EARLY_BOARD_INIT option
Introduce USE_EARLY_BOARD_INIT option and select it by the actual users.

Cc: George McCollister <george.mccollister@gmail.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Aiden Park <aiden.park@intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-09-01 13:38:31 +08:00
Wolfgang Wallner
cf9f38064d x86: mtrr: Fix parsing of "mtrr list" command
The command 'mtrr' does not recognize the 'list' subcommand any more
since the code restructuring in commit b2a76b3fe7 ("x86: mtrr:
Restructure so command execution is in one place").

The if-else parsing the command arguments does not take 'list' into
account: the if-branch is intended for no subcommands, the else-branch
is intended for the non-list subcommands (which all expect additional
arguments). Calling the 'mtrr list' subcommand leads to a "return
CMD_RET_USAGE" in the else-branch.

Fix this by changing the else-branch to explicitly checking for
if (cmd != 'l').

Fixes: b2a76b3fe7 ("x86: mtrr: Restructure so command execution is in one place")
Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2020-09-01 13:24:45 +08:00
Masahiro Yamada
23e333a5c0 MAINTAINERS: step down as maintainer of UniPhier SoCs
I am leaving Socionext. Orphan the UniPhier platform until somebody
takes the role.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-08-31 17:11:24 -04:00
Tom Rini
6ade057e37 Merge tag 'ti-v2020.10-rc4' of https://gitlab.denx.de/u-boot/custodians/u-boot-ti
- Update to ABI 3.0
- Fix i2c write in eeprom driver
2020-08-31 13:06:26 -04:00
Tom Rini
123f4f84f8 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-marvell
- MVEBU Espressobin fixes and enhancements (fix switch security
  issue, enable MVNETA, enable SD-card, fix COMPHY nodes, default
  env variables, etc)
- MMC Xenon: Set signal voltage and max base clock
- a37xx PCI driver: Depend on DM_GPIO and remove #ifdef's
2020-08-31 09:43:13 -04:00
Pali Rohár
64430efe69 arm: mvebu: Espressobin: Update README.marvell file
Include information about permanent ethernet MAC address and add link how
to build ATF as U-Boot on Espressobin cannot be flashed without ATF.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-08-31 14:45:53 +02:00
Pali Rohár
6b61066210 arm: mvebu: Espressobin: Define fdt_addr and kernel_addr env aliases
Boot scripts for existing Espressobin Linux distributions, like OpenWRT,
expect that U-Boot set fdt_addr and kernel_addr envs. So add env aliases
from fdt_addr_r and kernel_addr_r values.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Andre Heider <a.heider@gmail.com>
2020-08-31 14:45:53 +02:00
Pali Rohár
996ecfd3ec arm: mvebu: Espressobin: Change default loadaddr
Current loadaddr is not writable on Espressobin and 'loadb' command cause
rebooting board. Marvell's U-Boot already set default loadaddr to value
0x06000000 [1] and after this change 'loadb' is working fine.

[1] - 0a5b159806

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Andre Heider <a.heider@gmail.com>
2020-08-31 14:45:53 +02:00
Pali Rohár
bb40fe1f6c arm: mvebu: Espressobin: Move env load addresses
According to Marvell's U-Boot description [1] current env load addresses
overlaps with ATF RT services region and TEE. Because the ATF RT service
and TEE region is going to be marked as secure and can't be overwritten,
use different different addresses for envs.

[1] - 0a5b159806

Signed-off-by: Pali Rohár <pali@kernel.org>
Tested-by: Andre Heider <a.heider@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-08-31 14:45:53 +02:00
Pali Rohár
835d969c1f arm64: a37xx: pci: Depends on DM_GPIO
For proper initialization of aardvark pci driver it is required to
de-assert reset GPIO. So depeneds on DM_GPIO option.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Andre Heider <a.heider@gmail.com>
2020-08-31 14:45:53 +02:00
Pali Rohár
a65e65939e arm: mvebu: Espressobin: Setup MTD partitions when booting kernel
Due to different partition layouts in different U-Boot versions, DTS for
Espressobin in Linux does not contain any definition of MTD partitions.
See commit https://git.kernel.org/stable/c/00954566464a4 for more details.

This patch via ft_board_setup() hook fills current partition layout used by
U-Boot, so booted kernel would see correct MTD partitions layout.

U-Boot env partition is calculated from CONFIG_ENV_OFFSET option.

First partition contains secure firmware, ARM trusted firmware and U-Boot
with checksums. So it is not possible to replace just one image (e.g.
U-Boot) without updating other parts where is stored checksum of U-Boot.
Therefore there is no extra partition defined for U-Boot and first
partition is called just 'firmware'.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Konstantin Porotchkin <kostap@marvell.com>
Tested-by: Andre Heider <a.heider@gmail.com>
2020-08-31 14:45:53 +02:00
Pali Rohár
4366082bfe arm: mvebu: Espressobin: Make SPI env offset compatible with Marvell's U-Boot
Espressobin board comes with Marvell's U-Boot version where U-Boot env is
stored in SPI at offset 0x3F0000. This patch changes env offset in
Espressobin defconfig file to match Marvell's U-Boot version.

Users who want to use previous or different env offset can still change it
in .config file when compiling U-Boot.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Konstantin Porotchkin <kostap@marvell.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Andre Heider <a.heider@gmail.com>
2020-08-31 14:45:53 +02:00
Wilson Ding
96fa3c4fda arm: dts: a37x0: enable sd card support on espressobin
Enabled SDIO slot 0 (south bridge) for SD card on
Espressobin board.

Change-Id: I51a2debf9fba276b9c4a2bc6da91328d47f443e3
Signed-off-by: Wilson Ding <dingwei@marvell.com>
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Reviewed-on: http://vgitil04.il.marvell.com:8080/60945
Tested-by: iSoC Platform CI <ykjenk@marvell.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
[pali: Define cd-gpios and enable CONFIG_DM_REGULATOR_GPIO]
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Konstantin Porotchkin <kostap@marvell.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Andre Heider <a.heider@gmail.com>
2020-08-31 14:45:53 +02:00
Evan Wang
91b85e25b6 mmc: xenon: set signal voltage and max base clock
- The SDIO signal voltage and max base clock frequency
  setting are missing in driver, which causes SDIO
  not working.
- The patch adds SDIO signal voltage switch support,
  which is based on regulator-gpio of vqmmc-supply, and
  sets the max base clock frequency.
- Fix the zero clock value in call to sdhci_setup_cfg()
  function.

Change-Id: I79c8860c65b8db166f4f70db56ede4097f71f1fa
Signed-off-by: Evan Wang <xswang@marvell.com>
Reviewed-on: http://vgitil04.il.marvell.com:8080/53589
Reviewed-by: Hua Jing <jinghua@marvell.com>
Tested-by: Hua Jing <jinghua@marvell.com>
[pali: Amended fixup patch]
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Konstantin Porotchkin <kostap@marvell.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Andre Heider <a.heider@gmail.com>
2020-08-31 14:45:53 +02:00
Pali Rohár
828d326216 arm64: a37xx: pci: Assert PERST# signal when unloading driver
This change ensures that PCIe card is put into reset state when U-Boot
stops using it.

DM_FLAG_OS_PREPARE ensures that U-Boot executes driver's remove callback
prior booting Linux kernel.

Linux kernel pci-aardvark driver needs to reset PCIe card via PERST# signal
prior initializing it. If it does not issue reset then some PCIe cards
(specially Compex WiFi cards) are not detected at all.

Putting PCIe card into reset state prior booting Linux kernel would ensure
that card would be properly reset at time when Linux kernel starts
initializing pci-aardvark driver.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Konstantin Porotchkin <kostap@marvell.com>
Tested-by: Andre Heider <a.heider@gmail.com>
2020-08-31 14:45:53 +02:00
Pali Rohár
563b85bd88 arm64: a37xx: pci: Make PCIe Reset GPIO DT compatible with Linux kernel DT
Change active-high to active-low and change DT property name from
reset-gpio to reset-gpios. This format of gpio reset is used by
pci-aardvark driver in Linux kernel.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Konstantin Porotchkin <kostap@marvell.com>
Tested-by: Andre Heider <a.heider@gmail.com>
2020-08-31 14:45:53 +02:00
Marek Behún
545591132a arm64: dts: armada-3720-espressobin: fix COMPHY nodes
This commit fixes initialization of COMPHY on EspressoBin.

Commit 22f418935b ("phy: marvell: a3700: Use comphy_mux on Armada
37xx.") introduced usage of comphy_mux on Armada 37xx comphy driver.
The lanes are defined in comphy_a3700.c as described in functional
specification, that is:
  lane 0 is SGMII1 or USB3
  lane 1 is PCIe or SGMII0
  lane 2 is SATA or USB3

But the DTS for EspressoBin configures PCIe on lane 0 and USB3 on
lane 1, which is wrong in the sense of the specification and doesn't
work with the comphy_mux code, which is 2 years now (the aardvark driver
causes synchronous abort in U-Boot).

It worked till the above mentioned commit, because the code for powering
up PCIe PHY doesn't work with lane number at all, and the code for
powering up USB3 PHY works differently only if USB3 is on lane 2, ie.
the check goes like:
  if (lane == 2)
    something
  else
    something else
so it does not differentiate between lanes 0 and 1.

In the future I shall post patches that remove the comphy_a3700 driver
and add comphy driver which uses calls to ATF, like Linux' driver does.
This will have the advantage of same DTS bindings as Linux', but till
this is done, we need this patch.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Tested-by: Pali Rohár <pali@kernel.org>
Cc: Stefan Roese <sr@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Andre Heider <a.heider@gmail.com>
2020-08-31 14:45:53 +02:00
Pali Rohár
a68676535f arm: mvebu: Espressobin: Enable CONFIG_MVNETA
Espressobin uses mvneta ethernet driver.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Andre Heider <a.heider@gmail.com>
2020-08-31 14:45:53 +02:00
Pali Rohár
48f2c8a37f arm: mvebu: Espressobin: Disallow forwarding packets between wan and lan ports
By default Topaz switch on Espressobin board forwards packets between all
ethernet ports, including CPU (port 0), wan (port 1) and lan (ports 2,3).

This default U-Boot setup is unsuitable for using Espressobin as router as
it opens security hole in forwarding all packets between wan and lan ports.
E.g. dhcp packets from wan network leaks to lan network during small time
window until U-Boot boots Linux kernel which loads network drivers which
disallows forwarding between wan and lan.

This patch fixes above problem. For Espressobin board prior putting Topaz
switch into forwarding mode, Topaz switch is reconfigured to allow
forwarding packets from wan and lan ports only to CPU port. This ensures
that packets from wan port are not forwarded to lan ports and vice-versa.
Packets from CPU port are still forwarded to all other ports, so U-Boot
network boot works with any ethernet port as before.

This problem was already discussed on Espressobin forum [1] and on
Marvell's github issue tracker [2]. As a workaround people on Espressobin
forum patched U-Boot to completely disable lan ports on Topaz switch which
prevented forwarding packets. That workaround had an issue that U-Boot was
unable to netboot via lan ports anymore. Change in this patch does not have
such issue.

This security issue has been dicussed here as well: [3].

[1] - https://web.archive.org/web/20191231164238/http://espressobin.net/forums/topic/boot-behavior-of-the-switch-and-security/
[2] - https://github.com/MarvellEmbeddedProcessors/u-boot-marvell/issues/18
[3] - https://forum.armbian.com/topic/12635-espressobin-uboot-security-concerns-switch-init-portmask/

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Andre Heider <a.heider@gmail.com>
2020-08-31 14:44:14 +02:00
Michal Simek
b892b6d1e0 ti: common: Remove additional i2c read for board detection
There shouldn't be a need to call additional i2c read if above failed
already. Based on comment it should be enough to try to detect legacy
boards which are mentioned in the comment.

Fixes: 2463f6728e ("ti: common: board_detect: Allow DM I2C without CONFIG_DM_I2C_COMPAT")
Fixes: 0bea813d00 ("ARM: omap-common: Add standard access for board description EEPROM")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-08-31 14:40:28 +05:30
Lokesh Vutla
e66ae8e16b arm: dts: k3-am65: Update the RM resource types
Update the ringacc and udma dt nodes to use the latest RM resource types
similar to the ones used in k3-j721e dt nodes.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-08-31 14:39:39 +05:30
Lokesh Vutla
4986b15485 firmware: ti_sci: Drop unused structure ti_sci_rm_type_map
struct ti_sci_rm_type_map is no longer used. Drop its definition and its
declarations.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-08-31 14:39:39 +05:30
Lokesh Vutla
2fe03a1c82 firmware: ti_sci: drop the device ids to resource id translation table
With ABI 3.0, sysfw deprecated special resource types used for AM65x
SoC. Instead started using device id as resource type similar to the
convention used in J721E SOC.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-08-31 14:39:38 +05:30
Tom Rini
9f04a634ef Merge branch '2020-08-27-misc-fixes'
- Fix for gd->ram_top and bootm_size calculations
- Assorted Kconfig entry cleanups / fixes.
- Make checkpatch.pl error on fdt_high/initrd_high=0xffffffff
- Resync scripts/setlocalversion
- Other minor bugfixes
2020-08-28 08:51:37 -04:00
Rasmus Villemoes
2ed1b242ab scripts/setlocalversion: sync with linux 5.8
The linux changes since v3.16 are

78283edf2c01 kbuild: setlocalversion: print error to STDERR
b24413180f56 License cleanup: add SPDX GPL-2.0 license identifier to files with no license
6147b1cf1965 scripts/setlocalversion: git: Make -dirty check more robust
8ef14c2c41d9 Revert "scripts/setlocalversion: git: Make -dirty check more robust"
ff64dd485730 scripts/setlocalversion: Improve -dirty check with git-status --no-optional-locks
7a82e3fa28f1 scripts/setlocalversion: clear local variable to make it work for sh
991b78fbd223 scripts: setlocalversion: fix a bashism
3c96bdd0ebfa scripts: setlocalversion: replace backquote to dollar parenthesis

and it's ff64dd485730 that is the motivation for this sync. It fixes
false positive "-dirty" added to the version string when building with
Yocto
(https://lists.openembedded.org/g/openembedded-core/message/137702).

There has been one U-Boot specific patch since this was synced with
linux 3.16: 81630a3b38 (scripts: setlocalversion: safely extract
variables from auto.conf using awk).  Keep these changes applied.

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
[trini: Re-add 81630a3b38 and reword message]
Signed-off-by: Tom Rini <trini@konsulko.com>
2020-08-27 15:55:18 -04:00
Baruch Siach
7f98b4eeee image: don't exceed gd->ram_top in bootm_size
When board_get_usable_ram_top() limits gd->ram_top, env_get_bootm_size()
must not exceed that limit. Otherwise, boot_relocate_fdt() might put fdt
out of the allowed RAM range.

The similar commit 8ce1f10cf2 ("ARM: bootm: take into account
gd->ram_top") exposed this bug.

This fixes boot on Armada 8040 based Clearfog GT-8K where ram_top is set
to 0x80000000 (2GB), but bi_dram[0].size might be up to 0xc0000000
(3GB). Note the relocated fdt address (0xbfff4000) in the console output
listed below:

Found /extlinux/extlinux.conf
Retrieving file: /extlinux/extlinux.conf
62 bytes read in 21 ms (2 KiB/s)
1:	linux
Retrieving file: /extlinux/Image
13740544 bytes read in 1266 ms (10.4 MiB/s)
Retrieving file: /extlinux/armada-8040-clearfog-gt-8k.dtb
33368 bytes read in 31 ms (1 MiB/s)
   Booting using the fdt blob at 0x4f00000
   Loading Device Tree to 00000000bfff4000, end 00000000bffff257 ... "Synchronous Abort" handler, esr 0x96000045
elr: 000000000006e1cc lr : 0000000000068fd8 (reloc)
elr: 000000007ffa91cc lr : 000000007ffa3fd8
x0 : ffffffffffffffff x1 : 00000000bfffc258
x2 : 0000000000000000 x3 : ffffffffffff7da7
x4 : 0000000004f08258 x5 : 00000000bfff4000
x6 : 00000000bfff4000 x7 : 000000000000000f
x8 : 000000007fb23bf8 x9 : 0000000000000008
x10: 00000000bffff257 x11: 00000000bffff257
x12: 0000000000000000 x13: fffffffffffff000
x14: 00000000bfff4000 x15: 0000000000000021
x16: 000000007ff7bc38 x17: 0000000000000000
x18: 000000007fb2add0 x19: 00000000bfff4000
x20: 0000000004f00000 x21: 000000000000b258
x22: 0000000058820000 x23: 0000000000000010
x24: 000000007ffe3c40 x25: 000000007fb23cb8
x26: 00000000c0000000 x27: 0000000000000000
x28: 000000007fc3fd50 x29: 000000007fb23bd0

Code: 54000061 aa0603e0 d65f03c0 38606882 (38206822)
Resetting CPU ...

Thanks to Patrice CHOTARD who directed me to the right way.

Signed-off-by: Baruch Siach <baruch@tkos.co.il>
2020-08-27 11:26:58 -04:00
Michal Simek
0b2b9b85d0 cmd: mem: Remove already removed CONFIG_SYS_MEMTEST_SCRATCH
The commit e519f03a18 ("cmd: mem: Remove CONFIG_SYS_MEMTEST_SCRATCH
mapping") removed CONFIG_SYS_MEMTEST_SCRATCH but commit 0914011310
("command: Remove the cmd_tbl_t typedef") has added it back. That's why
symbol is still in the tree that's why remove it again.

Fixes: 0914011310 ("command: Remove the cmd_tbl_t typedef
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-27 11:26:58 -04:00
Heinrich Schuchardt
de95930946 lib/rsa: correct check after allocation in fdt_add_bignum()
After allocating to pointer ctx we should check that pointer and not
another pointer already checked above.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-27 11:26:58 -04:00
Heinrich Schuchardt
4431a9889c test: undefined reference to 'sscanf'
Compiling with CONFIG_UNIT_TEST=y leads to:

aarch64-linux-gnu-ld.bfd:
test/lib/sscanf.c:50: undefined reference to `sscanf'

Add missing build dependency.

Fixes:e87dfb0526be ("lib: sscanf: add sscanf implementation")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-08-27 11:26:58 -04:00
Tom Rini
12178b51c2 checkpatch.pl: Make fdt / initrd relocation disabling an error
Entirely disabling relocation of the device tree or initrd is almost
never the right answer.  Doing this by default leads to hard to diagnose
run-time failures.

Signed-off-by: Tom Rini <trini@konsulko.com>
2020-08-27 11:26:58 -04:00
Michal Simek
076617847a env: Kconfig: Add missing dependency for ENV_IS_IN_EXT4
ENV_IS_IN_EXT4 also need to enable FS_EXT4 which is not covered in Kconfig.
Kconfig reports this as:
WARNING: unmet direct dependencies detected for EXT4_WRITE
  Depends on [n]: FS_EXT4 [=n]
  Selected by [y]:
  - ENV_IS_IN_EXT4 [=y] && !CHAIN_OF_TRUST [=n]

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2020-08-27 11:26:58 -04:00
Michal Simek
7b56432c7b arc: Kconfig: Add missing DM dependency
ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
  Depends on [n]: DM [=n]
  Selected by [y]:
  - ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-27 11:26:58 -04:00
Michal Simek
6e741cfa93 cmd: Kconfig: Change dependency for CMD_ADC
CMD_ADC selected DM_REGULATOR unconditionally without enabling DM.
That's why change select to depends on to cover it.

Kconfig is showing this issue as:
WARNING: unmet direct dependencies detected for REGMAP
  Depends on [n]: DM [=n]
  Selected by [y]:
  - DM_REGULATOR_PBIAS [=y] && DM_REGULATOR [=y]

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
[trini: Update CMD_ADC=y configs to enable DM_REGULATOR now]
Signed-off-by: Tom Rini <trini@konsulko.com>
2020-08-27 11:26:39 -04:00
Michal Simek
a261fdce38 pci: kconfig: Setup proper dependency for PCIE_ROCKCHIP
There is missing dependency for PCIE_ROCKCHIP which selects
PHY_ROCKCHIP_PCIE which directly depends on ARCH_ROCKCHIP.

WARNING: unmet direct dependencies detected for PHY_ROCKCHIP_PCIE
  Depends on [n]: ARCH_ROCKCHIP [=n]
  Selected by [y]:
  - PCIE_ROCKCHIP [=y] && PCI [=y]

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2020-08-27 11:20:33 -04:00
Ruben Di Battista
67e62c7468 drivers: usb: Fix config indentation
The indentation was messing up with the scripts/build-whitelist.sh that
was marking SYS_USB_EVENT_POLL_VIA_INT_QUEUE (and probably also the
other indented options) erroneously as ad-hoc configure option with the
following error:

```
Error: You must add new CONFIG options using Kconfig
The following new ad-hoc CONFIG options were detected:
CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE
```
2020-08-27 11:20:33 -04:00
313 changed files with 3451 additions and 889 deletions

View File

@@ -2,7 +2,7 @@ variables:
windows_vm: vs2017-win2016
ubuntu_vm: ubuntu-18.04
macos_vm: macOS-10.15
ci_runner_image: trini/u-boot-gitlab-ci-runner:bionic-20200713-05Aug2020
ci_runner_image: trini/u-boot-gitlab-ci-runner:bionic-20200807-02Sep2020
# Add '-u 0' options for Azure pipelines, otherwise we get "permission
# denied" error when it tries to "useradd -m -u 1001 vsts_azpcontainer",
# since our $(ci_runner_image) user is not root.
@@ -253,6 +253,18 @@ jobs:
qemu_x86_64:
TEST_PY_BD: "qemu-x86_64"
TEST_PY_TEST_SPEC: "not sleep"
r2dplus_i82557c:
TEST_PY_BD: "r2dplus"
TEST_PY_ID: "--id i82557c_qemu"
r2dplus_pcnet:
TEST_PY_BD: "r2dplus"
TEST_PY_ID: "--id pcnet_qemu"
r2dplus_rtl8139:
TEST_PY_BD: "r2dplus"
TEST_PY_ID: "--id rtl8139_qemu"
r2dplus_tulip:
TEST_PY_BD: "r2dplus"
TEST_PY_ID: "--id tulip_qemu"
xilinx_zynq_virt:
TEST_PY_BD: "xilinx_zynq_virt"
TEST_PY_ID: "--id qemu"

View File

@@ -2,7 +2,7 @@
# Grab our configured image. The source for this is found at:
# https://gitlab.denx.de/u-boot/gitlab-ci-runner
image: trini/u-boot-gitlab-ci-runner:bionic-20200713-05Aug2020
image: trini/u-boot-gitlab-ci-runner:bionic-20200807-02Sep2020
# We run some tests in different order, to catch some failures quicker.
stages:
@@ -359,6 +359,34 @@ qemu-x86_64 test.py:
TEST_PY_TEST_SPEC: "not sleep"
<<: *buildman_and_testpy_dfn
r2dplus_i82557c test.py:
tags: [ 'all' ]
variables:
TEST_PY_BD: "r2dplus"
TEST_PY_ID: "--id i82557c_qemu"
<<: *buildman_and_testpy_dfn
r2dplus_pcnet test.py:
tags: [ 'all' ]
variables:
TEST_PY_BD: "r2dplus"
TEST_PY_ID: "--id pcnet_qemu"
<<: *buildman_and_testpy_dfn
r2dplus_rtl8139 test.py:
tags: [ 'all' ]
variables:
TEST_PY_BD: "r2dplus"
TEST_PY_ID: "--id rtl8139_qemu"
<<: *buildman_and_testpy_dfn
r2dplus_tulip test.py:
tags: [ 'all' ]
variables:
TEST_PY_BD: "r2dplus"
TEST_PY_ID: "--id tulip_qemu"
<<: *buildman_and_testpy_dfn
xilinx_zynq_virt test.py:
tags: [ 'all' ]
variables:

View File

@@ -646,6 +646,34 @@ matrix:
QEMU_TARGET="x86_64-softmmu"
TOOLCHAIN="i386"
BUILD_ROM="yes"
- name: "test/py r2dplus_i82557c"
env:
- TEST_PY_BD="r2dplus"
TEST_PY_ID="--id i82557c_qemu"
QEMU_TARGET="sh4-softmmu"
BUILDMAN="sh -x arm"
TOOLCHAIN="sh"
- name: "test/py r2dplus_pcnet"
env:
- TEST_PY_BD="r2dplus"
TEST_PY_ID="--id pcnet_qemu"
QEMU_TARGET="sh4-softmmu"
BUILDMAN="sh -x arm"
TOOLCHAIN="sh"
- name: "test/py r2dplus_rtl8139"
env:
- TEST_PY_BD="r2dplus"
TEST_PY_ID="--id rtl8139_qemu"
QEMU_TARGET="sh4-softmmu"
BUILDMAN="sh -x arm"
TOOLCHAIN="sh"
- name: "test/py r2dplus_tulip"
env:
- TEST_PY_BD="r2dplus"
TEST_PY_ID="--id tulip_qemu"
QEMU_TARGET="sh4-softmmu"
BUILDMAN="sh -x arm"
TOOLCHAIN="sh"
- name: "test/py xilinx_zynq_virt"
env:
- TEST_PY_BD="xilinx_zynq_virt"

View File

@@ -506,9 +506,7 @@ F: arch/arm/mach-u8500/
F: drivers/timer/nomadik-mtu-timer.c
ARM UNIPHIER
M: Masahiro Yamada <yamada.masahiro@socionext.com>
S: Maintained
T: git https://gitlab.denx.de/u-boot/custodians/u-boot-uniphier.git
S: Orphan (Since 2020-09)
F: arch/arm/mach-uniphier/
F: configs/uniphier_*_defconfig
N: uniphier
@@ -621,7 +619,7 @@ F: drivers/mtd/jedec_flash.c
CLOCK
M: Lukasz Majewski <lukma@denx.de>
S: Maintained
T: git git://git.denx.de/u-boot-dfu.git
T: git https://gitlab.denx.de/u-boot/custodians/u-boot-clk.git
F: drivers/clk/
F: drivers/clk/imx/
@@ -985,6 +983,8 @@ F: include/spmi/
SQUASHFS
M: Joao Marcos Costa <joaomarcos.costa@bootlin.com>
R: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
R: Miquel Raynal <miquel.raynal@bootlin.com>
S: Maintained
F: fs/squashfs/
F: include/sqfs.h

View File

@@ -3,7 +3,7 @@
VERSION = 2020
PATCHLEVEL = 10
SUBLEVEL =
EXTRAVERSION = -rc3
EXTRAVERSION =
NAME =
# *DOCUMENTATION*
@@ -2025,7 +2025,7 @@ CLEAN_FILES += include/bmp_logo.h include/bmp_logo_data.h tools/version.h \
# Directories & files removed with 'make mrproper'
MRPROPER_DIRS += include/config include/generated spl tpl \
.tmp_objdiff
.tmp_objdiff doc/output
MRPROPER_FILES += .config .config.old include/autoconf.mk* include/config.h \
ctags etags tags TAGS cscope* GPATH GTAGS GRTAGS GSYMS \
drivers/video/fonts/*.S

2
README
View File

@@ -266,7 +266,7 @@ board_init_f():
version as needed.
- preloader_console_init() can be called here in extremis
- should set up SDRAM, and anything needed to make the UART work
- these is no need to clear BSS, it will be done by crt0.S
- there is no need to clear BSS, it will be done by crt0.S
- for specific scenarios on certain architectures an early BSS *can*
be made available (via CONFIG_SPL_EARLY_BSS by moving the clearing
of BSS prior to entering board_init_f()) but doing so is discouraged.

View File

@@ -12,6 +12,7 @@ config ARC
bool "ARC architecture"
select ARC_TIMER
select CLK
select DM
select HAVE_PRIVATE_LIBGCC
select SUPPORT_OF_CONTROL
select TIMER

View File

@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright 2017-2019 NXP
* Copyright 2017-2020 NXP
* Copyright 2014-2015 Freescale Semiconductor, Inc.
*/
@@ -1229,13 +1229,15 @@ __efi_runtime_data u32 __iomem *rstcr = (u32 *)CONFIG_SYS_FSL_RST_ADDR;
void __efi_runtime reset_cpu(ulong addr)
{
#ifdef CONFIG_ARCH_LX2160A
/* clear the RST_REQ_MSK and SW_RST_REQ */
out_le32(rstcr, 0x0);
/* initiate the sw reset request */
out_le32(rstcr, 0x1);
#else
u32 val;
#ifdef CONFIG_ARCH_LX2160A
val = in_le32(rstcr);
val |= 0x01;
out_le32(rstcr, val);
#else
/* Raise RESET_REQ_B */
val = scfg_in32(rstcr);
val |= 0x02;

View File

@@ -36,6 +36,8 @@
#ifdef CONFIG_TFABOOT
#include <env_internal.h>
#endif
#include <dm.h>
#include <linux/err.h>
#if defined(CONFIG_TFABOOT) || defined(CONFIG_GIC_V3_ITS)
DECLARE_GLOBAL_DATA_PTR;
#endif
@@ -43,7 +45,22 @@ DECLARE_GLOBAL_DATA_PTR;
#ifdef CONFIG_GIC_V3_ITS
int ls_gic_rd_tables_init(void *blob)
{
int ret;
struct fdt_memory lpi_base;
fdt_addr_t addr;
fdt_size_t size;
int offset, ret;
offset = fdt_path_offset(gd->fdt_blob, "/syscon@0x80000000");
addr = fdtdec_get_addr_size_auto_noparent(gd->fdt_blob, offset, "reg",
0, &size, false);
lpi_base.start = addr;
lpi_base.end = addr + size - 1;
ret = fdtdec_add_reserved_memory(blob, "lpi_rd_table", &lpi_base, NULL);
if (ret) {
debug("%s: failed to add reserved memory\n", __func__);
return ret;
}
ret = gic_lpi_tables_init();
if (ret)
@@ -897,6 +914,38 @@ __weak int fsl_board_late_init(void)
return 0;
}
#define DWC3_GSBUSCFG0 0xc100
#define DWC3_GSBUSCFG0_CACHETYPE_SHIFT 16
#define DWC3_GSBUSCFG0_CACHETYPE(n) (((n) & 0xffff) \
<< DWC3_GSBUSCFG0_CACHETYPE_SHIFT)
void enable_dwc3_snooping(void)
{
int ret;
u32 val;
struct udevice *bus;
struct uclass *uc;
fdt_addr_t dwc3_base;
ret = uclass_get(UCLASS_USB, &uc);
if (ret)
return;
uclass_foreach_dev(bus, uc) {
if (!strcmp(bus->driver->of_match->compatible, "fsl,layerscape-dwc3")) {
dwc3_base = devfdt_get_addr(bus);
if (dwc3_base == FDT_ADDR_T_NONE) {
dev_err(bus, "dwc3 regs missing\n");
continue;
}
val = in_le32(dwc3_base + DWC3_GSBUSCFG0);
val &= ~DWC3_GSBUSCFG0_CACHETYPE(~0);
val |= DWC3_GSBUSCFG0_CACHETYPE(0x2222);
writel(val, dwc3_base + DWC3_GSBUSCFG0);
}
}
}
int board_late_init(void)
{
#ifdef CONFIG_CHAIN_OF_TRUST
@@ -934,6 +983,9 @@ int board_late_init(void)
fspi_ahb_init();
#endif
if (IS_ENABLED(CONFIG_DM))
enable_dwc3_snooping();
return fsl_board_late_init();
}
#endif

View File

@@ -159,6 +159,6 @@
&pcie0 {
pinctrl-names = "default";
pinctrl-0 = <&pcie_pins>;
reset-gpio = <&gpiosb 3 GPIO_ACTIVE_HIGH>;
reset-gpios = <&gpiosb 3 GPIO_ACTIVE_LOW>;
status = "okay";
};

View File

@@ -67,18 +67,29 @@
device_type = "memory";
reg = <0x00000000 0x00000000 0x00000000 0x20000000>;
};
vcc_sd_reg0: regulator@0 {
compatible = "regulator-gpio";
regulator-name = "vcc_sd0";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-type = "voltage";
states = <1800000 0x1
3300000 0x0>;
gpios = <&gpionb 4 GPIO_ACTIVE_HIGH>;
};
};
&comphy {
max-lanes = <3>;
phy0 {
phy-type = <PHY_TYPE_PEX0>;
phy-speed = <PHY_SPEED_2_5G>;
phy-type = <PHY_TYPE_USB3_HOST0>;
phy-speed = <PHY_SPEED_5G>;
};
phy1 {
phy-type = <PHY_TYPE_USB3_HOST0>;
phy-speed = <PHY_SPEED_5G>;
phy-type = <PHY_TYPE_PEX0>;
phy-speed = <PHY_SPEED_2_5G>;
};
phy2 {
@@ -110,6 +121,15 @@
status = "okay";
};
&sdhci0 {
pinctrl-names = "default";
pinctrl-0 = <&sdio_pins>;
bus-width = <4>;
cd-gpios = <&gpionb 3 GPIO_ACTIVE_LOW>;
vqmmc-supply = <&vcc_sd_reg0>;
status = "okay";
};
&spi0 {
status = "okay";
pinctrl-names = "default";
@@ -145,6 +165,6 @@
&pcie0 {
pinctrl-names = "default";
pinctrl-0 = <&pcie_pins>;
reset-gpio = <&gpiosb 3 GPIO_ACTIVE_HIGH>;
reset-gpios = <&gpiosb 3 GPIO_ACTIVE_LOW>;
status = "okay";
};

View File

@@ -172,6 +172,6 @@
&pcie0 {
pinctrl-names = "default";
pinctrl-0 = <&pcie_pins>;
reset-gpio = <&gpiosb 3 GPIO_ACTIVE_HIGH>;
reset-gpios = <&gpiosb 3 GPIO_ACTIVE_LOW>;
status = "disabled";
};

View File

@@ -12,8 +12,8 @@
#include "fsl-imx8qm-apalis-u-boot.dtsi"
/ {
model = "Toradex Apalis iMX8QM";
compatible = "toradex,apalis-imx8qm", "fsl,imx8qm";
model = "Toradex Apalis iMX8";
compatible = "toradex,apalis-imx8", "fsl,imx8qm";
chosen {
bootargs = "console=ttyLP1,115200 earlycon=lpuart32,0x5a070000,115200";
@@ -38,7 +38,7 @@
<&pinctrl_qspi1a_gpios>, <&pinctrl_sata1_act>,
<&pinctrl_sim0_gpios>, <&pinctrl_usdhc1_gpios>;
apalis-imx8qm {
apalis-imx8 {
pinctrl_gpio12: gpio12grp {
fsl,pins = <
/* Apalis GPIO1 */

View File

@@ -9,8 +9,8 @@
#include "fsl-imx8qxp-colibri-u-boot.dtsi"
/ {
model = "Toradex Colibri iMX8QXP";
compatible = "toradex,colibri-imx8qxp", "fsl,imx8qxp";
model = "Toradex Colibri iMX8X";
compatible = "toradex,colibri-imx8x", "fsl,imx8qxp";
chosen {
bootargs = "console=ttyLP3,115200 earlycon=lpuart32,0x5a090000,115200";
@@ -32,7 +32,7 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hog0>, <&pinctrl_hog1>, <&pinctrl_hog2>;
colibri-imx8qxp {
colibri-imx8x {
pinctrl_lpuart0: lpuart0grp {
fsl,pins = <
SC_P_UART0_RX_ADMA_UART0_RX 0x06000020

View File

@@ -44,6 +44,12 @@
IRQ_TYPE_LEVEL_LOW)>;
};
gic_lpi_base: syscon@0x80000000 {
compatible = "gic-lpi-base";
reg = <0x0 0x80000000 0x0 0x100000>;
max-gic-redistributors = <2>;
};
timer {
compatible = "arm,armv8-timer";
interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) |

View File

@@ -26,6 +26,12 @@
interrupts = <1 9 0x4>;
};
gic_lpi_base: syscon@0x80000000 {
compatible = "gic-lpi-base";
reg = <0x0 0x80000000 0x0 0x100000>;
max-gic-redistributors = <8>;
};
timer {
compatible = "arm,armv8-timer";
interrupts = <1 13 0x8>, /* Physical Secure PPI, active-low */

View File

@@ -26,6 +26,12 @@
interrupts = <1 9 0x4>;
};
gic_lpi_base: syscon@0x80000000 {
compatible = "gic-lpi-base";
reg = <0x0 0x80000000 0x0 0x100000>;
max-gic-redistributors = <8>;
};
timer {
compatible = "arm,armv8-timer";
interrupts = <1 13 0x8>, /* Physical Secure PPI, active-low */

View File

@@ -43,6 +43,12 @@
interrupts = <1 9 0x4>;
};
gic_lpi_base: syscon@0x80000000 {
compatible = "gic-lpi-base";
reg = <0x0 0x80000000 0x0 0x200000>;
max-gic-redistributors = <16>;
};
timer {
compatible = "arm,armv8-timer";
interrupts = <1 13 0x8>, /* Physical Secure PPI, active-low */
@@ -193,6 +199,28 @@
num-cs = <6>;
};
gpio0: gpio@2300000 {
compatible = "fsl,qoriq-gpio";
reg = <0x0 0x2300000 0x0 0x10000>;
interrupts = <0 36 4>;
gpio-controller;
little-endian;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpio1: gpio@2310000 {
compatible = "fsl,qoriq-gpio";
reg = <0x0 0x2310000 0x0 0x10000>;
interrupts = <0 36 4>;
gpio-controller;
little-endian;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpio2: gpio@2320000 {
compatible = "fsl,qoriq-gpio";
reg = <0x0 0x2320000 0x0 0x10000>;
@@ -204,6 +232,17 @@
#interrupt-cells = <2>;
};
gpio3: gpio@2330000 {
compatible = "fsl,qoriq-gpio";
reg = <0x0 0x2330000 0x0 0x10000>;
interrupts = <0 37 4>;
gpio-controller;
little-endian;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
watchdog@23a0000 {
compatible = "arm,sbsa-gwdt";
reg = <0x0 0x23a0000 0 0x1000>,
@@ -297,7 +336,8 @@
#size-cells = <2>;
device_type = "pci";
bus-range = <0x0 0xff>;
ranges = <0x82000000 0x0 0x40000000 0x80 0x40000000 0x0 0x40000000>;
ranges = <0x81000000 0x0 0x00000000 0x80 0x00020000 0x0 0x00010000 /* downstream I/O */
0x82000000 0x0 0x40000000 0x80 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
};
pcie@3500000 {
@@ -312,7 +352,8 @@
device_type = "pci";
num-lanes = <2>;
bus-range = <0x0 0xff>;
ranges = <0x82000000 0x0 0x40000000 0x88 0x40000000 0x0 0x40000000>;
ranges = <0x81000000 0x0 0x00000000 0x88 0x00020000 0x0 0x00010000 /* downstream I/O */
0x82000000 0x0 0x40000000 0x88 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
};
pcie@3600000 {
@@ -326,7 +367,8 @@
#size-cells = <2>;
device_type = "pci";
bus-range = <0x0 0xff>;
ranges = <0x82000000 0x0 0x40000000 0x90 0x40000000 0x0 0x40000000>;
ranges = <0x81000000 0x0 0x00000000 0x90 0x00020000 0x0 0x00010000 /* downstream I/O */
0x82000000 0x0 0x40000000 0x90 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
};
pcie@3700000 {
@@ -340,7 +382,8 @@
#size-cells = <2>;
device_type = "pci";
bus-range = <0x0 0xff>;
ranges = <0x82000000 0x0 0x40000000 0x98 0x40000000 0x0 0x40000000>;
ranges = <0x81000000 0x0 0x00000000 0x98 0x00020000 0x0 0x00010000 /* downstream I/O */
0x82000000 0x0 0x40000000 0x98 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
};
pcie@3800000 {
@@ -354,7 +397,8 @@
#size-cells = <2>;
device_type = "pci";
bus-range = <0x0 0xff>;
ranges = <0x82000000 0x0 0x40000000 0xa0 0x40000000 0x0 0x40000000>;
ranges = <0x81000000 0x0 0x00000000 0xa0 0x00020000 0x0 0x00010000 /* downstream I/O */
0x82000000 0x0 0x40000000 0xa0 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
};
pcie@3900000 {
@@ -368,7 +412,8 @@
#size-cells = <2>;
device_type = "pci";
bus-range = <0x0 0xff>;
ranges = <0x82000000 0x0 0x40000000 0xa8 0x40000000 0x0 0x40000000>;
ranges = <0x81000000 0x0 0x00000000 0xa8 0x00020000 0x0 0x00010000 /* downstream I/O */
0x82000000 0x0 0x40000000 0xa8 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
};
fsl_mc: fsl-mc@80c000000 {

View File

@@ -135,7 +135,7 @@
<0x0 0x2a500000 0x0 0x40000>;
reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target";
ti,num-rings = <286>;
ti,sci-rm-range-gp-rings = <0x2>; /* GP ring range */
ti,sci-rm-range-gp-rings = <0x1>; /* GP ring range */
ti,dma-ring-reset-quirk;
ti,sci = <&dmsc>;
ti,sci-dev-id = <195>;
@@ -153,11 +153,11 @@
ti,sci-dev-id = <194>;
ti,ringacc = <&mcu_ringacc>;
ti,sci-rm-range-tchan = <0x1>, /* TX_HCHAN */
<0x2>; /* TX_CHAN */
ti,sci-rm-range-rchan = <0x3>, /* RX_HCHAN */
<0x4>; /* RX_CHAN */
ti,sci-rm-range-rflow = <0x5>; /* GP RFLOW */
ti,sci-rm-range-tchan = <0xf>, /* TX_HCHAN */
<0xd>; /* TX_CHAN */
ti,sci-rm-range-rchan = <0xb>, /* RX_HCHAN */
<0xa>; /* RX_CHAN */
ti,sci-rm-range-rflow = <0x0>; /* GP RFLOW */
};
};

View File

@@ -4,3 +4,7 @@
*/
#include "rockchip-u-boot.dtsi"
&grf {
u-boot,dm-pre-reloc;
};

View File

@@ -75,6 +75,8 @@
};
pins2 {
u-boot,dm-pre-reloc;
/delete-property/ bias-disable;
bias-pull-up;
};
};

View File

@@ -21,6 +21,10 @@
};
};
&flash0 {
u-boot,dm-spl;
};
&gpiof {
snor-nwp {
gpio-hog;
@@ -49,6 +53,23 @@
u-boot,dm-spl;
};
&qspi_clk_pins_a {
u-boot,dm-spl;
pins {
u-boot,dm-spl;
};
};
&qspi_bk1_pins_a {
u-boot,dm-spl;
pins1 {
u-boot,dm-spl;
};
pins2 {
u-boot,dm-spl;
};
};
&rcc {
st,clksrc = <
CLK_MPU_PLL1P
@@ -132,11 +153,11 @@
u-boot,dm-pre-reloc;
};
/* VCO = 600.0 MHz => P = 100, Q = 50, R = 100 */
/* VCO = 600.0 MHz => P = 99, Q = 74, R = 99 */
pll4: st,pll@3 {
compatible = "st,stm32mp1-pll";
reg = <3>;
cfg = < 1 49 5 11 5 PQR(1,1,1) >;
cfg = < 3 98 5 7 5 PQR(1,1,1) >;
u-boot,dm-pre-reloc;
};
};

View File

@@ -41,9 +41,7 @@
#define MXC_CPU_IMX8MNDL 0x8f /* dummy ID */
#define MXC_CPU_IMX8MNSL 0x181 /* dummy ID */
#define MXC_CPU_IMX8MP 0x182/* dummy ID */
#define MXC_CPU_IMX8MP7 0x183 /* dummy ID */
#define MXC_CPU_IMX8MP6 0x184 /* dummy ID */
#define MXC_CPU_IMX8MP5 0x185 /* dummy ID */
#define MXC_CPU_IMX8MPL 0x186 /* dummy ID */
#define MXC_CPU_IMX8MPD 0x187 /* dummy ID */
#define MXC_CPU_IMX8QXP_A0 0x90 /* dummy ID */

View File

@@ -316,7 +316,7 @@ enum clk_src_index {
#define FRAC_PLL_LOCK_MASK BIT(31)
#define FRAC_PLL_CLKE_MASK BIT(21)
#define FRAC_PLL_PD_MASK BIT(19)
#define FRAC_PLL_REFCLK_SEL_MASK BIT(16)
#define FRAC_PLL_REFCLK_SEL_MASK (0x3 << 16)
#define FRAC_PLL_LOCK_SEL_MASK BIT(15)
#define FRAC_PLL_BYPASS_MASK BIT(14)
#define FRAC_PLL_COUNTCLK_SEL_MASK BIT(13)
@@ -358,10 +358,10 @@ enum clk_src_index {
#define SSCG_PLL_LOCK_SEL_MASK BIT(3)
#define SSCG_PLL_COUNTCLK_SEL_MASK BIT(2)
#define SSCG_PLL_REFCLK_SEL_MASK 0x3
#define SSCG_PLL_REFCLK_SEL_OSC_25M (0 << 16)
#define SSCG_PLL_REFCLK_SEL_OSC_27M BIT(16)
#define SSCG_PLL_REFCLK_SEL_HDMI_PHY_27M (2 << 16)
#define SSCG_PLL_REFCLK_SEL_CLK_PN (3 << 16)
#define SSCG_PLL_REFCLK_SEL_OSC_25M (0)
#define SSCG_PLL_REFCLK_SEL_OSC_27M (1)
#define SSCG_PLL_REFCLK_SEL_HDMI_PHY_27M (2)
#define SSCG_PLL_REFCLK_SEL_CLK_PN (3)
#define SSCG_PLL_SSDS_MASK BIT(8)
#define SSCG_PLL_SSMD_MASK (0x7 << 5)

View File

@@ -57,7 +57,7 @@ struct mxc_ccm_reg {
uint32_t reserved_0[4092];
struct mxc_ccm_ccgr ccgr_array[191]; /* offset 0x4000 */
uint32_t reserved_1[3332];
struct mxc_ccm_root_slice root[121]; /* offset 0x8000 */
struct mxc_ccm_root_slice root[125]; /* offset 0x8000 */
};

View File

@@ -67,13 +67,10 @@ struct bd_info;
#define is_imx8mndl() (is_cpu_type(MXC_CPU_IMX8MNDL))
#define is_imx8mnsl() (is_cpu_type(MXC_CPU_IMX8MNSL))
#define is_imx8mp() (is_cpu_type(MXC_CPU_IMX8MP) || is_cpu_type(MXC_CPU_IMX8MPD) || \
is_cpu_type(MXC_CPU_IMX8MPL) || is_cpu_type(MXC_CPU_IMX8MP7) || \
is_cpu_type(MXC_CPU_IMX8MP6) || is_cpu_type(MXC_CPU_IMX8MP5))
is_cpu_type(MXC_CPU_IMX8MPL) || is_cpu_type(MXC_CPU_IMX8MP6))
#define is_imx8mpd() (is_cpu_type(MXC_CPU_IMX8MPD))
#define is_imx8mpl() (is_cpu_type(MXC_CPU_IMX8MPL))
#define is_imx8mp7() (is_cpu_type(MXC_CPU_IMX8MP7))
#define is_imx8mp6() (is_cpu_type(MXC_CPU_IMX8MP6))
#define is_imx8mp5() (is_cpu_type(MXC_CPU_IMX8MP5))
#define is_imx8qxp() (is_cpu_type(MXC_CPU_IMX8QXP))

View File

@@ -102,12 +102,8 @@ const char *get_imx_type(u32 imxtype)
return "8MP Dual[3]"; /* Dual-core version of the imx8mp */
case MXC_CPU_IMX8MPL:
return "8MP Lite[4]"; /* Quad-core Lite version of the imx8mp */
case MXC_CPU_IMX8MP7:
return "8MP[7]"; /* Quad-core version of the imx8mp, VPU fused */
case MXC_CPU_IMX8MP6:
return "8MP[6]"; /* Quad-core version of the imx8mp, NPU fused */
case MXC_CPU_IMX8MP5:
return "8MP[5]"; /* Quad-core version of the imx8mp, ISP fused */
case MXC_CPU_IMX8MN:
return "8MNano Quad"; /* Quad-core version */
case MXC_CPU_IMX8MND:

View File

@@ -360,6 +360,7 @@ void init_clk_ecspi(u32 index)
clock_enable(CCGR_ECSPI2, 0);
clock_set_target_val(ECSPI2_CLK_ROOT, CLK_ROOT_ON | CLK_ROOT_SOURCE_SEL(0));
clock_enable(CCGR_ECSPI2, 1);
return;
case 2:
clock_enable(CCGR_ECSPI3, 0);
clock_set_target_val(ECSPI3_CLK_ROOT, CLK_ROOT_ON | CLK_ROOT_SOURCE_SEL(0));

View File

@@ -343,12 +343,8 @@ static u32 get_cpu_variant_type(u32 type)
switch (flag) {
case 7:
return MXC_CPU_IMX8MPL;
case 6:
return MXC_CPU_IMX8MP5;
case 2:
return MXC_CPU_IMX8MP6;
case 1:
return MXC_CPU_IMX8MP7;
default:
break;
}
@@ -889,16 +885,16 @@ usb_modify_speed:
disable_cpu_nodes(blob, 3);
#elif defined(CONFIG_IMX8MP)
if (is_imx8mpl() || is_imx8mp7())
if (is_imx8mpl())
disable_vpu_nodes(blob);
if (is_imx8mpl() || is_imx8mp6() || is_imx8mp5())
if (is_imx8mpl() || is_imx8mp6())
disable_npu_nodes(blob);
if (is_imx8mpl() || is_imx8mp5())
if (is_imx8mpl())
disable_isp_nodes(blob);
if (is_imx8mpl() || is_imx8mp7() || is_imx8mp6() || is_imx8mp5())
if (is_imx8mpl() || is_imx8mp6())
disable_dsp_nodes(blob);
if (is_imx8mpd())

View File

@@ -250,16 +250,31 @@ int mmdc_do_write_level_calibration(struct mx6_ddr_sysinfo const *sysinfo)
static void mmdc_set_sdqs(bool set)
{
struct mx6sdl_iomux_ddr_regs *mx6sdl_ddr_iomux =
(struct mx6sdl_iomux_ddr_regs *)MX6SDL_IOM_DDR_BASE;
struct mx6dq_iomux_ddr_regs *mx6dq_ddr_iomux =
(struct mx6dq_iomux_ddr_regs *)MX6DQ_IOM_DDR_BASE;
struct mx6sx_iomux_ddr_regs *mx6sx_ddr_iomux =
(struct mx6sx_iomux_ddr_regs *)MX6SX_IOM_DDR_BASE;
struct mx6sl_iomux_ddr_regs *mx6sl_ddr_iomux =
(struct mx6sl_iomux_ddr_regs *)MX6SL_IOM_DDR_BASE;
struct mx6ul_iomux_ddr_regs *mx6ul_ddr_iomux =
(struct mx6ul_iomux_ddr_regs *)MX6UL_IOM_DDR_BASE;
int i, sdqs_cnt;
u32 sdqs;
if (is_mx6sx()) {
sdqs = (u32)(&mx6sx_ddr_iomux->dram_sdqs0);
sdqs_cnt = 2;
} else if (is_mx6sl()) {
sdqs = (u32)(&mx6sl_ddr_iomux->dram_sdqs0);
sdqs_cnt = 2;
} else if (is_mx6ul() || is_mx6ull()) {
sdqs = (u32)(&mx6ul_ddr_iomux->dram_sdqs0);
sdqs_cnt = 2;
} else if (is_mx6sdl()) {
sdqs = (u32)(&mx6sdl_ddr_iomux->dram_sdqs0);
sdqs_cnt = 8;
} else { /* MX6DQ */
sdqs = (u32)(&mx6dq_ddr_iomux->dram_sdqs0);
sdqs_cnt = 8;

View File

@@ -187,6 +187,12 @@ int g_dnl_bind_fixup(struct usb_device_descriptor *dev, const char *name)
return 0;
}
#define SDPV_BCD_DEVICE 0x500
int g_dnl_get_board_bcd_device_number(int gcnum)
{
return SDPV_BCD_DEVICE;
}
#endif
#if defined(CONFIG_SPL_MMC_SUPPORT)

View File

@@ -47,10 +47,10 @@ config TARGET_MT8512
select ARM64
select MT8512
help
The MediaTek MT8512 is a ARM64-based SoC with a quad-core Cortex-A53.
The MediaTek MT8512 is a ARM64-based SoC with a dual-core Cortex-A53.
including UART, SPI, USB2.0 and OTG, SD and MMC cards, NAND, PWM,
Ethernet, IR TX/RX, I2C, I2S, S/PDIF, and built-in Wi-Fi / Bluetooth combo
chip and several DDR3 and DDR4 options.
IR RX, I2C, I2S, S/PDIF, and built-in Wi-Fi / Bluetooth digital
and several LPDDR3 and LPDDR4 options.
config TARGET_MT8516
bool "MediaTek MT8516 SoC"

View File

@@ -5,6 +5,7 @@
#include <common.h>
#include <cpu_func.h>
#include <fastboot.h>
#include <init.h>
#include <net.h>
#include <asm/arch/boot.h>
@@ -153,8 +154,11 @@ int board_late_init(void)
#if CONFIG_IS_ENABLED(FASTBOOT)
static unsigned int reboot_reason = REBOOT_REASON_NORMAL;
int fastboot_set_reboot_flag()
int fastboot_set_reboot_flag(enum fastboot_reboot_reason reason)
{
if (reason != FASTBOOT_REBOOT_REASON_BOOTLOADER)
return -ENOTSUPP;
reboot_reason = REBOOT_REASON_BOOTLOADER;
printf("Using reboot reason: 0x%x\n", reboot_reason);

View File

@@ -6,6 +6,7 @@
#include <clk.h>
#include <cpu_func.h>
#include <dm.h>
#include <fastboot.h>
#include <init.h>
#include <log.h>
#include <ram.h>
@@ -152,8 +153,11 @@ int board_usb_init(int index, enum usb_init_type init)
#endif /* CONFIG_USB_GADGET */
#if CONFIG_IS_ENABLED(FASTBOOT)
int fastboot_set_reboot_flag(void)
int fastboot_set_reboot_flag(enum fastboot_reboot_reason reason)
{
if (reason != FASTBOOT_REBOOT_REASON_BOOTLOADER)
return -ENOTSUPP;
printf("Setting reboot to fastboot flag ...\n");
/* Set boot mode to fastboot */
writel(BOOT_FASTBOOT, CONFIG_ROCKCHIP_BOOT_MODE_REG);

View File

@@ -189,8 +189,9 @@ def unpack_elf(filename):
p_type, p_flags, p_offset = struct.unpack_from('<LLQ', elf, offset)
if p_type == 1: # PT_LOAD
p_paddr, p_filesz = struct.unpack_from('<2Q', elf, offset + 0x18)
p_data = elf[p_offset:p_offset + p_filesz]
segments.append((index, e_entry, p_paddr, p_data))
if p_filesz > 0:
p_data = elf[p_offset:p_offset + p_filesz]
segments.append((index, e_entry, p_paddr, p_data))
return segments
def main():

View File

@@ -39,6 +39,11 @@ void socfpga_init_security_policies(void);
void socfpga_sdram_remap_zero(void);
#endif
#if defined(CONFIG_TARGET_SOCFPGA_STRATIX10) || \
defined(CONFIG_TARGET_SOCFPGA_AGILEX)
int is_fpga_config_ready(void);
#endif
void do_bridge_reset(int enable, unsigned int mask);
void socfpga_pl310_clear(void);
void socfpga_get_managers_addr(void);

View File

@@ -88,8 +88,12 @@ void sysmgr_pinmux_table_delay(const u32 **table, unsigned int *table_len);
#define SYSMGR_ECC_OCRAM_EN BIT(0)
#define SYSMGR_ECC_OCRAM_SERR BIT(3)
#define SYSMGR_ECC_OCRAM_DERR BIT(4)
#define SYSMGR_FPGAINTF_USEFPGA 0x1
#define SYSMGR_FPGACONFIG_FPGA_COMPLETE BIT(0)
#define SYSMGR_FPGACONFIG_EARLY_USERMODE BIT(1)
#define SYSMGR_FPGACONFIG_READY_MASK (SYSMGR_FPGACONFIG_FPGA_COMPLETE | \
SYSMGR_FPGACONFIG_EARLY_USERMODE)
#define SYSMGR_FPGAINTF_USEFPGA 0x1
#define SYSMGR_FPGAINTF_NAND BIT(4)
#define SYSMGR_FPGAINTF_SDMMC BIT(8)
#define SYSMGR_FPGAINTF_SPIM0 BIT(16)

View File

@@ -151,17 +151,19 @@ int arch_early_init_r(void)
return 0;
}
/* Return 1 if FPGA is ready otherwise return 0 */
int is_fpga_config_ready(void)
{
return (readl(socfpga_get_sysmgr_addr() + SYSMGR_SOC64_FPGA_CONFIG) &
SYSMGR_FPGACONFIG_READY_MASK) == SYSMGR_FPGACONFIG_READY_MASK;
}
void do_bridge_reset(int enable, unsigned int mask)
{
/* Check FPGA status before bridge enable */
if (enable) {
int ret = mbox_get_fpga_config_status(MBOX_RECONFIG_STATUS);
if (ret && ret != MBOX_CFGSTAT_STATE_CONFIG)
ret = mbox_get_fpga_config_status(MBOX_CONFIG_STATUS);
if (ret)
return;
if (!is_fpga_config_ready()) {
puts("FPGA not ready. Bridge reset aborted!\n");
return;
}
socfpga_bridges_reset(enable);

View File

@@ -580,8 +580,8 @@ __weak int setup_mac_address(void)
return -EINVAL;
}
pr_debug("OTP MAC address = %pM\n", enetaddr);
ret = !eth_env_set_enetaddr("ethaddr", enetaddr);
if (!ret)
ret = eth_env_set_enetaddr("ethaddr", enetaddr);
if (ret)
pr_err("Failed to set mac address %pM from OTP: %d\n",
enetaddr, ret);
#endif

View File

@@ -26,8 +26,13 @@
};
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu@0 {
compatible = "mips,mips14kc";
device-type = "cpu";
reg = <0>;
};
};
@@ -40,6 +45,7 @@
uart1: serial@1f822000 {
compatible = "microchip,pic32mzda-uart";
reg = <0x1f822000 0x50>;
interrupt-parent = <&evic>;
interrupts = <112 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
clocks = <&clock PB2CLK>;
@@ -48,6 +54,7 @@
uart2: serial@1f822200 {
compatible = "microchip,pic32mzda-uart";
reg = <0x1f822200 0x50>;
interrupt-parent = <&evic>;
interrupts = <145 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock PB2CLK>;
status = "disabled";
@@ -56,6 +63,7 @@
uart6: serial@1f822a00 {
compatible = "microchip,pic32mzda-uart";
reg = <0x1f822a00 0x50>;
interrupt-parent = <&evic>;
interrupts = <188 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock PB2CLK>;
status = "disabled";
@@ -69,6 +77,8 @@
};
pinctrl: pinctrl@1f801400 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "microchip,pic32mzda-pinctrl";
reg = <0x1f801400 0x100>, /* in */
<0x1f801500 0x200>, /* out */
@@ -76,75 +86,72 @@
reg-names = "ppsin","ppsout","port";
status = "disabled";
ranges = <0 0x1f860000 0xa00>;
#address-cells = <1>;
#size-cells = <1>;
gpioA: gpio0@0 {
gpioA: gpio0@1f860000 {
compatible = "microchip,pic32mzda-gpio";
reg = <0x000 0x48>;
reg = <0x1f860000 0xe0>;
gpio-controller;
#gpio-cells = <2>;
};
gpioB: gpio1@100 {
gpioB: gpio1@1f860100 {
compatible = "microchip,pic32mzda-gpio";
reg = <0x100 0x48>;
reg = <0x1f860100 0xe0>;
gpio-controller;
#gpio-cells = <2>;
};
gpioC: gpio2@200 {
gpioC: gpio2@1f860200 {
compatible = "microchip,pic32mzda-gpio";
reg = <0x200 0x48>;
reg = <0x1f860200 0xe0>;
gpio-controller;
#gpio-cells = <2>;
};
gpioD: gpio3@300 {
gpioD: gpio3@1f860300 {
compatible = "microchip,pic32mzda-gpio";
reg = <0x300 0x48>;
reg = <0x1f860300 0xe0>;
gpio-controller;
#gpio-cells = <2>;
};
gpioE: gpio4@400 {
gpioE: gpio4@1f860400 {
compatible = "microchip,pic32mzda-gpio";
reg = <0x400 0x48>;
reg = <0x1f860400 0xe0>;
gpio-controller;
#gpio-cells = <2>;
};
gpioF: gpio5@500 {
gpioF: gpio5@1f860500 {
compatible = "microchip,pic32mzda-gpio";
reg = <0x500 0x48>;
reg = <0x1f860500 0xe0>;
gpio-controller;
#gpio-cells = <2>;
};
gpioG: gpio6@600 {
gpioG: gpio6@1f860600 {
compatible = "microchip,pic32mzda-gpio";
reg = <0x600 0x48>;
reg = <0x1f860600 0xe0>;
gpio-controller;
#gpio-cells = <2>;
};
gpioH: gpio7@700 {
gpioH: gpio7@1f860700 {
compatible = "microchip,pic32mzda-gpio";
reg = <0x700 0x48>;
reg = <0x1f860700 0xe0>;
gpio-controller;
#gpio-cells = <2>;
};
gpioJ: gpio8@800 {
gpioJ: gpio9@1f860800 {
compatible = "microchip,pic32mzda-gpio";
reg = <0x800 0x48>;
reg = <0x1f860800 0xe0>;
gpio-controller;
#gpio-cells = <2>;
};
gpioK: gpio9@900 {
gpioK: gpio10@1f860900 {
compatible = "microchip,pic32mzda-gpio";
reg = <0x900 0x48>;
reg = <0x1f860900 0xe0>;
gpio-controller;
#gpio-cells = <2>;
};
@@ -153,6 +160,7 @@
sdhci: sdhci@1f8ec000 {
compatible = "microchip,pic32mzda-sdhci";
reg = <0x1f8ec000 0x100>;
interrupt-parent = <&evic>;
interrupts = <191 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock REF4CLK>, <&clock PB5CLK>;
clock-names = "base_clk", "sys_clk";
@@ -164,6 +172,7 @@
ethernet: ethernet@1f882000 {
compatible = "microchip,pic32mzda-eth";
reg = <0x1f882000 0x1000>;
interrupt-parent = <&evic>;
interrupts = <153 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock PB5CLK>;
status = "disabled";
@@ -176,6 +185,7 @@
reg = <0x1f8e3000 0x1000>,
<0x1f884000 0x1000>;
reg-names = "mc", "control";
interrupt-parent = <&evic>;
interrupts = <132 IRQ_TYPE_EDGE_RISING>,
<133 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock PB5CLK>;

View File

@@ -40,6 +40,7 @@
};
&sdhci {
microchip,use-sdcd;
status = "okay";
};

View File

@@ -59,7 +59,7 @@
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
spi-max-frequency = <25000000>;
spi-max-frequency = <40000000>;
reg = <0>;
};
};

View File

@@ -39,4 +39,13 @@ struct arch_global_data {
#define DECLARE_GLOBAL_DATA_PTR register gd_t *gd asm ("gp")
static inline void set_gd(volatile gd_t *gd_ptr)
{
#ifdef CONFIG_64BIT
asm volatile("ld gp, %0\n" : : "m"(gd_ptr));
#else
asm volatile("lw gp, %0\n" : : "m"(gd_ptr));
#endif
}
#endif /* __ASM_GBL_DATA_H */

View File

@@ -111,6 +111,9 @@ ulong handle_trap(ulong cause, ulong epc, ulong tval, struct pt_regs *regs)
{
ulong is_irq, irq;
/* An UEFI application may have changed gd. Restore U-Boot's gd. */
efi_restore_gd();
is_irq = (cause & MCAUSE_INT);
irq = (cause & ~MCAUSE_INT);

View File

@@ -203,6 +203,9 @@ config SPL_X86_32BIT_INIT
help
This is enabled when 32-bit init is in SPL
config USE_EARLY_BOARD_INIT
bool
config RESET_SEG_START
hex
depends on X86_RESET_VECTOR

View File

@@ -555,7 +555,7 @@ const struct fsp_binding fsp_m_bindings[] = {
}, {
.type = FSP_UINT8,
.offset = offsetof(struct fsp_m_config, e_mmc_trace_len),
.propname = "fspm,e-mmc-trace-len",
.propname = "fspm,emmc-trace-len",
}, {
.type = FSP_UINT8,
.offset = offsetof(struct fsp_m_config, skip_cse_rbp),
@@ -1465,11 +1465,11 @@ const struct fsp_binding fsp_s_bindings[] = {
}, {
.type = FSP_UINT8,
.offset = offsetof(struct fsp_s_config, e_mmc_enabled),
.propname = "fsps,e-mmc-enabled",
.propname = "fsps,emmc-enabled",
}, {
.type = FSP_UINT8,
.offset = offsetof(struct fsp_s_config, e_mmc_host_max_speed),
.propname = "fsps,e-mmc-host-max-speed",
.propname = "fsps,emmc-host-max-speed",
}, {
.type = FSP_UINT8,
.offset = offsetof(struct fsp_s_config, ufs_enabled),

View File

@@ -88,6 +88,7 @@ _start:
/* Clear the interrupt vectors */
lidt blank_idt_ptr
#ifdef CONFIG_USE_EARLY_BOARD_INIT
/*
* Critical early platform init - generally not used, we prefer init
* to happen later when we have a console, in case something goes
@@ -96,6 +97,8 @@ _start:
jmp early_board_init
.globl early_board_init_ret
early_board_init_ret:
#endif
post_code(POST_START)
/* Initialise Cache-As-RAM */

View File

@@ -137,14 +137,6 @@ int nhlt_endpoint_add_formats(struct nhlt_endpoint *endpoint,
*/
void nhlt_next_instance(struct nhlt *nhlt, int link_type);
/*
* Serialize NHLT object to ACPI table. Take in the beginning address of where
* the table will reside and return the address of the next ACPI table. On
* error 0 will be returned. The NHLT object is no longer valid after this
* function is called.
*/
uintptr_t nhlt_serialise(struct nhlt *nhlt, uintptr_t acpi_addr);
/*
* Serialize NHLT object to ACPI table. Take in the beginning address of where
* the table will reside oem_id and oem_table_id and return the address of the

View File

@@ -252,6 +252,8 @@ static void acpi_create_spcr(struct acpi_spcr *spcr)
int space_id;
int ret = -ENODEV;
memset((void *)spcr, 0, sizeof(struct acpi_spcr));
/* Fill out header fields */
acpi_fill_header(header, "SPCR");
header->length = sizeof(struct acpi_spcr);
@@ -427,7 +429,7 @@ ulong write_acpi_tables(ulong start_addr)
(char *)&AmlCode + sizeof(struct acpi_table_header),
dsdt->length - sizeof(struct acpi_table_header));
acpi_inc_align(ctx, dsdt->length - sizeof(struct acpi_table_header));
acpi_inc(ctx, dsdt->length - sizeof(struct acpi_table_header));
/* Pack GNVS into the ACPI table area */
for (i = 0; i < dsdt->length; i++) {
@@ -450,6 +452,8 @@ ulong write_acpi_tables(ulong start_addr)
dsdt->checksum = 0;
dsdt->checksum = table_compute_checksum((void *)dsdt, dsdt->length);
acpi_align(ctx);
/*
* Fill in platform-specific global NVS variables. If this fails we
* cannot return the error but this should only happen while debugging.

View File

@@ -5,6 +5,7 @@
#include <common.h>
#include <dm.h>
#include <env.h>
#include <i2c.h>
#include <init.h>
#include <phy.h>
@@ -44,11 +45,28 @@ DECLARE_GLOBAL_DATA_PTR;
/* Switch Port Registers */
#define MVEBU_SW_LINK_CTRL_REG (1)
#define MVEBU_SW_PORT_CTRL_REG (4)
#define MVEBU_SW_PORT_BASE_VLAN (6)
/* Global 2 Registers */
#define MVEBU_G2_SMI_PHY_CMD_REG (24)
#define MVEBU_G2_SMI_PHY_DATA_REG (25)
/*
* Memory Controller Registers
*
* Assembled based on public information:
* https://gitlab.nic.cz/turris/mox-boot-builder/-/blob/master/wtmi/main.c#L332-336
* https://github.com/MarvellEmbeddedProcessors/mv-ddr-marvell/blob/mv_ddr-armada-18.12/drivers/mv_ddr_mc6.h#L309-L332
*
* And checked against the written register values for the various topologies:
* https://github.com/MarvellEmbeddedProcessors/mv-ddr-marvell/blob/mv_ddr-armada-atf-mainline/a3700/mv_ddr_tim.h
*/
#define A3700_CH0_MC_CTRL2_REG MVEBU_REGISTER(0x002c4)
#define A3700_MC_CTRL2_SDRAM_TYPE_MASK 0xf
#define A3700_MC_CTRL2_SDRAM_TYPE_OFFS 4
#define A3700_MC_CTRL2_SDRAM_TYPE_DDR3 2
#define A3700_MC_CTRL2_SDRAM_TYPE_DDR4 3
int board_early_init_f(void)
{
return 0;
@@ -62,6 +80,36 @@ int board_init(void)
return 0;
}
#ifdef CONFIG_BOARD_LATE_INIT
int board_late_init(void)
{
bool ddr4, emmc;
if (env_get("fdtfile"))
return 0;
if (!of_machine_is_compatible("marvell,armada-3720-espressobin"))
return 0;
/* If the memory controller has been configured for DDR4, we're running on v7 */
ddr4 = ((readl(A3700_CH0_MC_CTRL2_REG) >> A3700_MC_CTRL2_SDRAM_TYPE_OFFS)
& A3700_MC_CTRL2_SDRAM_TYPE_MASK) == A3700_MC_CTRL2_SDRAM_TYPE_DDR4;
emmc = of_machine_is_compatible("marvell,armada-3720-espressobin-emmc");
if (ddr4 && emmc)
env_set("fdtfile", "marvell/armada-3720-espressobin-v7-emmc.dtb");
else if (ddr4)
env_set("fdtfile", "marvell/armada-3720-espressobin-v7.dtb");
else if (emmc)
env_set("fdtfile", "marvell/armada-3720-espressobin-emmc.dtb");
else
env_set("fdtfile", "marvell/armada-3720-espressobin.dtb");
return 0;
}
#endif
/* Board specific AHCI / SATA enable code */
int board_ahci_enable(void)
{
@@ -207,8 +255,16 @@ int board_network_enable(struct mii_dev *bus)
* FIXME: remove this code once Topaz driver gets available
* A3720 Community Board Only
* Configure Topaz switch (88E6341)
* Restrict output to ports 1,2,3 only from port 0 (CPU)
* Set port 0,1,2,3 to forwarding Mode (through Switch Port registers)
*/
mii_multi_chip_mode_write(bus, 1, MVEBU_PORT_CTRL_SMI_ADDR(1),
MVEBU_SW_PORT_BASE_VLAN, BIT(0));
mii_multi_chip_mode_write(bus, 1, MVEBU_PORT_CTRL_SMI_ADDR(2),
MVEBU_SW_PORT_BASE_VLAN, BIT(0));
mii_multi_chip_mode_write(bus, 1, MVEBU_PORT_CTRL_SMI_ADDR(3),
MVEBU_SW_PORT_BASE_VLAN, BIT(0));
mii_multi_chip_mode_write(bus, 1, MVEBU_PORT_CTRL_SMI_ADDR(0),
MVEBU_SW_PORT_CTRL_REG, 0x7f);
mii_multi_chip_mode_write(bus, 1, MVEBU_PORT_CTRL_SMI_ADDR(1),
@@ -234,3 +290,103 @@ int board_network_enable(struct mii_dev *bus)
return 0;
}
#if defined(CONFIG_OF_BOARD_SETUP) && defined(CONFIG_ENV_IS_IN_SPI_FLASH)
int ft_board_setup(void *blob, struct bd_info *bd)
{
int ret;
int spi_off;
int parts_off;
int part_off;
/* Fill SPI MTD partitions for Linux kernel on Espressobin */
if (!of_machine_is_compatible("marvell,armada-3720-espressobin"))
return 0;
spi_off = fdt_node_offset_by_compatible(blob, -1, "jedec,spi-nor");
if (spi_off < 0)
return 0;
/* Do not touch partitions if they are already defined */
if (fdt_subnode_offset(blob, spi_off, "partitions") >= 0)
return 0;
parts_off = fdt_add_subnode(blob, spi_off, "partitions");
if (parts_off < 0) {
printf("Can't add partitions node: %s\n", fdt_strerror(parts_off));
return 0;
}
ret = fdt_setprop_string(blob, parts_off, "compatible", "fixed-partitions");
if (ret < 0) {
printf("Can't set compatible property: %s\n", fdt_strerror(ret));
return 0;
}
ret = fdt_setprop_u32(blob, parts_off, "#address-cells", 1);
if (ret < 0) {
printf("Can't set #address-cells property: %s\n", fdt_strerror(ret));
return 0;
}
ret = fdt_setprop_u32(blob, parts_off, "#size-cells", 1);
if (ret < 0) {
printf("Can't set #size-cells property: %s\n", fdt_strerror(ret));
return 0;
}
/* Add u-boot-env partition */
part_off = fdt_add_subnode(blob, parts_off, "partition@u-boot-env");
if (part_off < 0) {
printf("Can't add partition@u-boot-env node: %s\n", fdt_strerror(part_off));
return 0;
}
ret = fdt_setprop_u32(blob, part_off, "reg", CONFIG_ENV_OFFSET);
if (ret < 0) {
printf("Can't set partition@u-boot-env reg property: %s\n", fdt_strerror(ret));
return 0;
}
ret = fdt_appendprop_u32(blob, part_off, "reg", CONFIG_ENV_SIZE);
if (ret < 0) {
printf("Can't set partition@u-boot-env reg property: %s\n", fdt_strerror(ret));
return 0;
}
ret = fdt_setprop_string(blob, part_off, "label", "u-boot-env");
if (ret < 0) {
printf("Can't set partition@u-boot-env label property: %s\n", fdt_strerror(ret));
return 0;
}
/* Add firmware partition */
part_off = fdt_add_subnode(blob, parts_off, "partition@firmware");
if (part_off < 0) {
printf("Can't add partition@firmware node: %s\n", fdt_strerror(part_off));
return 0;
}
ret = fdt_setprop_u32(blob, part_off, "reg", 0);
if (ret < 0) {
printf("Can't set partition@firmware reg property: %s\n", fdt_strerror(ret));
return 0;
}
ret = fdt_appendprop_u32(blob, part_off, "reg", CONFIG_ENV_OFFSET);
if (ret < 0) {
printf("Can't set partition@firmware reg property: %s\n", fdt_strerror(ret));
return 0;
}
ret = fdt_setprop_string(blob, part_off, "label", "firmware");
if (ret < 0) {
printf("Can't set partition@firmware label property: %s\n", fdt_strerror(ret));
return 0;
}
return 0;
}
#endif

View File

@@ -2,5 +2,5 @@
#
# Copyright (C) 2015, Google, Inc
obj-y += som-db5800-som-6867.o start.o
obj-y += som-db5800-som-6867.o
obj-$(CONFIG_GENERATE_ACPI_TABLE) += dsdt.o

View File

@@ -1,8 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2015, Google, Inc
*/
.globl early_board_init
early_board_init:
jmp early_board_init_ret

View File

@@ -8,6 +8,7 @@
#include <config.h>
#include <common.h>
#include <env.h>
#include <fastboot.h>
#include <init.h>
#include <linux/ctype.h>
#include <linux/usb/musb.h>
@@ -163,8 +164,11 @@ void get_board_serial(struct tag_serialnr *serialnr)
omap_die_id_get_board_serial(serialnr);
}
int fastboot_set_reboot_flag(void)
int fastboot_set_reboot_flag(enum fastboot_reboot_reason reason)
{
if (reason != FASTBOOT_REBOOT_REASON_BOOTLOADER)
return -ENOTSUPP;
return omap_reboot_mode_store("b");
}

View File

@@ -2,5 +2,5 @@
#
# Copyright (C) 2015, Google, Inc
obj-y += conga-qeval20-qa3.o start.o
obj-y += conga-qeval20-qa3.o
obj-$(CONFIG_GENERATE_ACPI_TABLE) += dsdt.o

View File

@@ -1,8 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2015, Google, Inc
*/
.globl early_board_init
early_board_init:
jmp early_board_init_ret

View File

@@ -10,4 +10,4 @@
# (C) Copyright 2002
# Daniel Engström, Omicron Ceti AB, daniel@omicron.se.
obj-y += start.o coreboot.o
obj-y += coreboot.o

View File

@@ -1,12 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (c) 2011 The Chromium OS Authors.
* (C) Copyright 2008
* Graeme Russ, graeme.russ@gmail.com.
*/
/* board early intialization */
.globl early_board_init
early_board_init:
/* No 32-bit board specific initialisation */
jmp early_board_init_ret

View File

@@ -2,5 +2,5 @@
#
# Copyright (C) 2015, Google, Inc
obj-y += dfi-bt700.o start.o
obj-y += dfi-bt700.o
obj-$(CONFIG_GENERATE_ACPI_TABLE) += dsdt.o

View File

@@ -1,8 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2015, Google, Inc
*/
.globl early_board_init
early_board_init:
jmp early_board_init_ret

View File

@@ -2,4 +2,4 @@
#
# Copyright (C) 2018, Bin Meng <bmeng.cn@gmail.com>
obj-y += start.o payload.o
obj-y += payload.o

View File

@@ -1,8 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2018, Bin Meng <bmeng.cn@gmail.com>
*/
.globl early_board_init
early_board_init:
jmp early_board_init_ret

View File

@@ -15,7 +15,7 @@
DECLARE_GLOBAL_DATA_PTR;
int mach_cpu_init(void)
int board_early_init_f(void)
{
struct rv1108_grf *grf;
enum {

View File

@@ -2,4 +2,4 @@
#
# Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
obj-y += start.o
obj-y += qemu-x86.o

View File

View File

@@ -1,8 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
*/
.globl early_board_init
early_board_init:
jmp early_board_init_ret

View File

@@ -1,8 +1,7 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright 2018 NXP.
* Copyright 2018-2020 NXP.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
@@ -14,7 +13,7 @@
DECLARE_GLOBAL_DATA_PTR;
void set_fan_speed(u8 data)
void set_fan_speed(u8 data, int chip_addr)
{
u8 index;
u8 Fan[NUM_OF_FANS] = {I2C_EMC2305_FAN1,
@@ -25,14 +24,14 @@ void set_fan_speed(u8 data)
for (index = 0; index < NUM_OF_FANS; index++) {
#ifndef CONFIG_DM_I2C
if (i2c_write(I2C_EMC2305_ADDR, Fan[index], 1, &data, 1) != 0) {
if (i2c_write(chip_addr, Fan[index], 1, &data, 1) != 0) {
printf("Error: failed to change fan speed @%x\n",
Fan[index]);
}
#else
struct udevice *dev;
if (i2c_get_chip_for_busnum(0, I2C_EMC2305_ADDR, 1, &dev))
if (i2c_get_chip_for_busnum(0, chip_addr, 1, &dev))
continue;
if (dm_i2c_write(dev, Fan[index], &data, 1) != 0) {
@@ -43,18 +42,18 @@ void set_fan_speed(u8 data)
}
}
void emc2305_init(void)
void emc2305_init(int chip_addr)
{
u8 data;
data = I2C_EMC2305_CMD;
#ifndef CONFIG_DM_I2C
if (i2c_write(I2C_EMC2305_ADDR, I2C_EMC2305_CONF, 1, &data, 1) != 0)
if (i2c_write(chip_addr, I2C_EMC2305_CONF, 1, &data, 1) != 0)
printf("Error: failed to configure EMC2305\n");
#else
struct udevice *dev;
if (!i2c_get_chip_for_busnum(0, I2C_EMC2305_ADDR, 1, &dev))
if (!i2c_get_chip_for_busnum(0, chip_addr, 1, &dev))
if (dm_i2c_write(dev, I2C_EMC2305_CONF, &data, 1))
printf("Error: failed to configure EMC2305\n");
#endif

View File

@@ -1,8 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright 2018 NXP
* Copyright 2018-2020 NXP
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __EMC2305_H_
@@ -17,7 +16,7 @@
#define NUM_OF_FANS 5
void emc2305_init(void);
void set_fan_speed(u8 data);
void emc2305_init(int chip_addr);
void set_fan_speed(u8 data, int chip_addr);
#endif /* __EMC2305_H_ */

View File

@@ -533,14 +533,14 @@ int adjust_vdd(ulong vdd_override)
0, /* reserved */
0, /* reserved */
0, /* reserved */
0, /* reserved */
0, /* reserved */
0, /* reserved */
9000, /* reserved */
0, /* reserved */
0, /* reserved */
0, /* reserved */
0, /* reserved */
0, /* reserved */
0, /* reserved */
0, /* reserved */
10000, /* 1.0000V */
0, /* reserved */
10250,

View File

@@ -114,8 +114,8 @@ int board_early_init_f(void)
#ifdef CONFIG_EMC2305
select_i2c_ch_pca9547(I2C_MUX_CH_EMC2305);
emc2305_init();
set_fan_speed(I2C_EMC2305_PWM);
emc2305_init(I2C_EMC2305_ADDR);
set_fan_speed(I2C_EMC2305_PWM, I2C_EMC2305_ADDR);
select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT);
#endif

View File

@@ -18,6 +18,7 @@ config SYS_TEXT_BASE
config BOARD_SPECIFIC_OPTIONS # dummy
def_bool y
select X86_RESET_VECTOR
select USE_EARLY_BOARD_INIT
select INTEL_APOLLOLAKE
select BOARD_ROMSIZE_KB_16384

View File

@@ -19,6 +19,7 @@ config SYS_TEXT_BASE
config BOARD_SPECIFIC_OPTIONS # dummy
def_bool y
select X86_RESET_VECTOR
select USE_EARLY_BOARD_INIT
select NORTHBRIDGE_INTEL_IVYBRIDGE
select HAVE_INTEL_ME
select BOARD_ROMSIZE_KB_8192

View File

@@ -19,6 +19,7 @@ config SYS_TEXT_BASE
config BOARD_SPECIFIC_OPTIONS # dummy
def_bool y
select X86_RESET_VECTOR
select USE_EARLY_BOARD_INIT
select INTEL_BROADWELL
select HAVE_INTEL_ME
select BOARD_ROMSIZE_KB_8192

View File

@@ -2,5 +2,5 @@
#
# Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
obj-y += bayleybay.o start.o
obj-y += bayleybay.o
obj-$(CONFIG_GENERATE_ACPI_TABLE) += dsdt.o

View File

@@ -1,8 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
*/
.globl early_board_init
early_board_init:
jmp early_board_init_ret

View File

@@ -2,4 +2,4 @@
#
# Copyright (C) 2017, Bin Meng <bmeng.cn@gmail.com>
obj-y += cherryhill.o start.o
obj-y += cherryhill.o

View File

@@ -1,8 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2017, Bin Meng <bmeng.cn@gmail.com>
*/
.globl early_board_init
early_board_init:
jmp early_board_init_ret

View File

@@ -2,4 +2,4 @@
#
# Copyright (C) 2016, Bin Meng <bmeng.cn@gmail.com>
obj-y += cougarcanyon2.o start.o
obj-y += cougarcanyon2.o

View File

@@ -1,8 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2016, Bin Meng <bmeng.cn@gmail.com>
*/
.globl early_board_init
early_board_init:
jmp early_board_init_ret

View File

@@ -2,4 +2,4 @@
#
# Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
obj-y += crownbay.o start.o
obj-y += crownbay.o

View File

@@ -1,8 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
*/
.globl early_board_init
early_board_init:
jmp early_board_init_ret

View File

@@ -12,6 +12,9 @@ config SYS_SOC
config SYS_CONFIG_NAME
default "edison"
config SYS_MALLOC_LEN
default 0x08000000
config SYS_TEXT_BASE
default 0x01101000

View File

@@ -4,5 +4,5 @@
# SPDX-License-Identifier: GPL-2.0+
#
obj-y += start.o edison.o
obj-y += edison.o
obj-$(CONFIG_GENERATE_ACPI_TABLE) += dsdt.o

View File

@@ -1,12 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (c) 2011 The Chromium OS Authors.
* (C) Copyright 2008
* Graeme Russ, graeme.russ@gmail.com.
*/
/* board early intialization */
.globl early_board_init
early_board_init:
/* No 32-bit board specific initialisation */
jmp early_board_init_ret

View File

@@ -2,5 +2,5 @@
#
# Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
obj-y += galileo.o start.o
obj-y += galileo.o
obj-$(CONFIG_GENERATE_ACPI_TABLE) += dsdt.o

View File

@@ -1,8 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
*/
.globl early_board_init
early_board_init:
jmp early_board_init_ret

View File

@@ -2,5 +2,5 @@
#
# Copyright (C) 2015, Google, Inc
obj-y += minnowmax.o start.o
obj-y += minnowmax.o
obj-$(CONFIG_GENERATE_ACPI_TABLE) += dsdt.o

View File

@@ -1,8 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2015, Google, Inc
*/
.globl early_board_init
early_board_init:
jmp early_board_init_ret

View File

@@ -2,4 +2,4 @@
#
# Copyright (C) 2019 Intel Corporation <www.intel.com>
obj-y += start.o slimbootloader.o
obj-y += slimbootloader.o

View File

@@ -1,9 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2019 Intel Corporation <www.intel.com>
*/
/* board early initialization */
.globl early_board_init
early_board_init:
jmp early_board_init_ret

View File

@@ -9,6 +9,7 @@
#include <common.h>
#include <dm.h>
#include <env.h>
#include <fastboot.h>
#include <init.h>
#include <linux/ctype.h>
#include <linux/usb/musb.h>
@@ -175,8 +176,11 @@ void reset_misc(void)
omap_reboot_mode_store(reboot_mode);
}
int fastboot_set_reboot_flag(void)
int fastboot_set_reboot_flag(enum fastboot_reboot_reason reason)
{
if (reason != FASTBOOT_REBOOT_REASON_BOOTLOADER)
return -ENOTSUPP;
return omap_reboot_mode_store("b");
}

View File

@@ -47,23 +47,10 @@ int board_init(void)
}
#define RST_BASE 0xE6160000
#define RST_CA57RESCNT (RST_BASE + 0x40)
#define RST_CA53RESCNT (RST_BASE + 0x44)
#define RST_RSTOUTCR (RST_BASE + 0x58)
#define RST_CA57_CODE 0xA5A5000F
#define RST_CA53_CODE 0x5A5A000F
void reset_cpu(ulong addr)
{
unsigned long midr, cputype;
asm volatile("mrs %0, midr_el1" : "=r" (midr));
cputype = (midr >> 4) & 0xfff;
if (cputype == 0xd03)
writel(RST_CA53_CODE, RST_CA53RESCNT);
else if (cputype == 0xd07)
writel(RST_CA57_CODE, RST_CA57RESCNT);
else
hang();
writel(RST_CA53_CODE, RST_CA53RESCNT);
}

View File

@@ -14,7 +14,7 @@
DECLARE_GLOBAL_DATA_PTR;
int mach_cpu_init(void)
int board_early_init_f(void)
{
struct rv1108_grf *grf;
enum {

View File

@@ -240,6 +240,9 @@ int board_eth_init(struct bd_info *bis)
int board_late_init(void)
{
if (env_get("fdtfile"))
return 0;
cf_read_tlv_data();
if (sr_product_is(&cf_tlv_data, "Clearfog Base"))

View File

@@ -9,6 +9,7 @@
#include <common.h>
#include <env.h>
#include <fastboot.h>
#include <fdt_support.h>
#include <image.h>
#include <init.h>
@@ -1172,8 +1173,11 @@ int board_fit_config_name_match(const char *name)
#endif
#if CONFIG_IS_ENABLED(FASTBOOT) && !CONFIG_IS_ENABLED(ENV_IS_NOWHERE)
int fastboot_set_reboot_flag(void)
int fastboot_set_reboot_flag(enum fastboot_reboot_reason reason)
{
if (reason != FASTBOOT_REBOOT_REASON_BOOTLOADER)
return -ENOTSUPP;
printf("Setting reboot to fastboot flag ...\n");
env_set("dofastboot", "1");
env_save();

View File

@@ -113,18 +113,15 @@ static int __maybe_unused ti_i2c_eeprom_get(int bus_addr, int dev_addr,
/* Corrupted data??? */
if (hdr_read != header) {
rc = dm_i2c_read(dev, 0, (uint8_t *)&hdr_read, 4);
/*
* read the eeprom header using i2c again, but use only a
* 1 byte address (some legacy boards need this..)
*/
if (rc) {
rc = i2c_set_chip_offset_len(dev, 1);
if (rc)
return rc;
rc = i2c_set_chip_offset_len(dev, 1);
if (rc)
return rc;
rc = dm_i2c_read(dev, 0, (uint8_t *)&hdr_read, 4);
}
rc = dm_i2c_read(dev, 0, (uint8_t *)&hdr_read, 4);
if (rc)
return rc;
}
@@ -153,16 +150,13 @@ static int __maybe_unused ti_i2c_eeprom_get(int bus_addr, int dev_addr,
/* Corrupted data??? */
if (hdr_read != header) {
rc = i2c_read(dev_addr, 0x0, byte, (uint8_t *)&hdr_read, 4);
/*
* read the eeprom header using i2c again, but use only a
* 1 byte address (some legacy boards need this..)
*/
byte = 1;
if (rc) {
rc = i2c_read(dev_addr, 0x0, byte, (uint8_t *)&hdr_read,
4);
}
rc = i2c_read(dev_addr, 0x0, byte, (uint8_t *)&hdr_read,
4);
if (rc)
return rc;
}

View File

@@ -12,6 +12,7 @@
#include <common.h>
#include <env.h>
#include <fdt_support.h>
#include <fastboot.h>
#include <image.h>
#include <init.h>
#include <spl.h>
@@ -1050,8 +1051,11 @@ int board_fit_config_name_match(const char *name)
#endif
#if CONFIG_IS_ENABLED(FASTBOOT) && !CONFIG_IS_ENABLED(ENV_IS_NOWHERE)
int fastboot_set_reboot_flag(void)
int fastboot_set_reboot_flag(enum fastboot_reboot_reason reason)
{
if (reason != FASTBOOT_REBOOT_REASON_BOOTLOADER)
return -ENOTSUPP;
printf("Setting reboot to fastboot flag ...\n");
env_set("dofastboot", "1");
env_save();

View File

@@ -5,6 +5,6 @@ S: Maintained
F: arch/arm/dts/fsl-imx8-apalis.dts
F: arch/arm/dts/fsl-imx8-apalis-u-boot.dtsi
F: board/toradex/apalis-imx8/
F: configs/apalis-imx8qm_defconfig
F: configs/apalis-imx8_defconfig
F: doc/board/toradex/apalix-imx8.rst
F: include/configs/apalis-imx8.h

View File

@@ -173,8 +173,6 @@ int board_late_init(void)
#if defined(CONFIG_DM_VIDEO)
setup_lcd();
show_boot_logo();
#endif
return 0;

View File

@@ -5,6 +5,6 @@ S: Maintained
F: arch/arm/dts/fsl-imx8x-colibri.dts
F: arch/arm/dts/fsl-imx8x-colibri-u-boot.dtsi
F: board/toradex/colibri-imx8x/
F: configs/colibri-imx8qxp_defconfig
F: configs/colibri-imx8x_defconfig
F: doc/board/toradex/colibri-imx8x.rst
F: include/configs/colibri-imx8x.h

Some files were not shown because too many files have changed in this diff Show More